From 3df4294ce83f09f23a1c42143b84e00437b246ca Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=E9=AA=B7=E9=AB=85=E5=A4=B4?=
 <74764072+DHDAXCW@users.noreply.github.com>
Date: Thu, 5 Jan 2023 10:19:17 +0800
Subject: [PATCH] Update rk3568-nanopi-r5c.dts

---
 .../arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts   | 13 +++----------
 1 file changed, 3 insertions(+), 10 deletions(-)

diff --git a/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts b/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts
index a475fe0c8..0c1899e99 100644
--- a/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts
+++ b/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-nanopi-r5c.dts
@@ -450,11 +450,9 @@
 	status = "okay";
 };
 
-&pcie2x1 {
-	num-viewport = <4>;
-	pinctrl-names = "default";
-	pinctrl-0 = <&m2_w_disable_pin>;
+&pcie2x1 
 	reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
+	vpcie3v3-supply = <&vcc3v3_pcie>;
 	status = "okay";
 };
 
@@ -467,6 +465,7 @@
 	num-lanes = <1>;
 	num-viewport = <4>;
 	reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
+	vpcie3v3-supply = <&vcc3v3_pcie>;
 	status = "okay";
 
 	pcie@10 {
@@ -541,12 +540,6 @@
 			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
-	
-	m2-pins {
-		m2_w_disable_pin: m2-w-disable-pin {
-			rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_output_high>;
-		};
-	};
 };
 
 &pmu_io_domains {