修复r5c pcie2.0和usb3.0

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骷髅头 2023-01-12 15:01:49 +08:00 committed by GitHub
parent 4538d7bb59
commit 7124e5989f
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@ -18,8 +18,8 @@
compatible = "friendlyarm,nanopi-r5c","rockchip,rk3568"; compatible = "friendlyarm,nanopi-r5c","rockchip,rk3568";
aliases { aliases {
ethernet0 = &rtl8125_2; ethernet0 = &r8125_1;
ethernet1 = &rtl8125_1; ethernet1 = &r8125_2;
mmc0 = &sdmmc0; mmc0 = &sdmmc0;
mmc1 = &sdhci; mmc1 = &sdhci;
@ -46,29 +46,29 @@
leds { leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
pinctrl-0 = <&sys_led_pin>, <&lan_led_pin>, pinctrl-0 = <&lan1_led_pin>, <&lan2_led_pin>,
<&wan_led_pin>, <&wl_led_pin>; <&sys_led_pin>, <&wan_led_pin>;
pinctrl-names = "default"; pinctrl-names = "default";
sys_led: led-0 { lan1_led: led-0 {
gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
label = "green:lan1";
};
lan2_led: led-1 {
gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
label = "green:lan2";
};
sys_led: led-2 {
gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>; gpios = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
label = "red:power"; label = "red:power";
}; };
wan_led: led-1 { wan_led: led-3 {
gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; gpios = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>;
label = "green:wan"; label = "green:wan";
}; };
lan_led: led-2 {
gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
label = "green:lan";
};
wlan_led: led-3 {
gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_HIGH>;
label = "green:wlan";
};
}; };
vdd_5v: vdd-5v { vdd_5v: vdd-5v {
@ -122,27 +122,16 @@
vin-supply = <&vcc5v0_sysp>; vin-supply = <&vcc5v0_sysp>;
}; };
vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { vcc5v0_usb_otg: vcc5v0-usb-otg {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_usb_otg_en>;
regulator-name = "vcc5v0_usb_otg"; regulator-name = "vcc5v0_usb_otg";
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
enable-active-high;
pinctrl-0 = <&vcc5v0_usb_otg_en>;
gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
vin-supply = <&vcc5v0_sysp>; vin-supply = <&vcc5v0_sysp>;
pinctrl-names = "default";
};
vcc3v3_pcie: vcc3v3-pcie {
compatible = "regulator-fixed";
enable-active-high;
gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
regulator-name = "vcc3v3_pcie";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
startup-delay-us = <5000>;
vin-supply = <&vcc3v3_sysp>;
}; };
}; };
@ -463,10 +452,11 @@
}; };
&pcie2x1 { &pcie2x1 {
num-lanes = <1>;
num-viewport = <4>; num-viewport = <4>;
pinctrl-names = "default";
pinctrl-0 = <&m2_w_disable_pin>; pinctrl-0 = <&m2_w_disable_pin>;
reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay"; status = "okay";
}; };
@ -476,42 +466,46 @@
}; };
&pcie3x1 { &pcie3x1 {
bus-range = <0x10 0x1f>;
num-lanes = <1>; num-lanes = <1>;
num-viewport = <4>; num-viewport = <4>;
reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay"; status = "okay";
pcie@10 { pcie@0,0 {
reg = <0x00100000 0 0 0 0>; reg = <0x00100000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
rtl8125_1: pcie-eth@10,0 { r8125_1: pcie@1,0 {
compatible = "pci10ec,8125"; compatible = "pci10ec,8125";
reg = <0x000000 0 0 0 0>; reg = <0x000000 0 0 0 0>;
local-mac-address = [ 00 00 00 00 00 00 ];
realtek,led-data = <0x4078>; realtek,led-data = <0x4078>;
}; };
}; };
}; };
&pcie3x2 { &pcie3x2 {
bus-range = <0x20 0x2f>;
num-lanes = <1>; num-lanes = <1>;
max-link-speed = <2>;
num-ib-windows = <8>;
num-ob-windows = <8>;
num-viewport = <4>; num-viewport = <4>;
reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie>;
status = "okay"; status = "okay";
pcie@20 { pcie@0,0 {
reg = <0x00200000 0 0 0 0>; reg = <0x00200000 0 0 0 0>;
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
rtl8125_2: pcie-eth@20,0 { r8125_2: pcie@2,0 {
compatible = "pci10ec,8125"; compatible = "pci10ec,8125";
reg = <0x000000 0 0 0 0>; reg = <0x000000 0 0 0 0>;
local-mac-address = [ 00 00 00 00 00 00 ];
realtek,led-data = <0x4078>; realtek,led-data = <0x4078>;
}; };
@ -520,21 +514,21 @@
&pinctrl { &pinctrl {
leds { leds {
lan1_led_pin: lan1-led-pin {
rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
lan2_led_pin: lan2-led-pin {
rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
sys_led_pin: sys-led-pin { sys_led_pin: sys-led-pin {
rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; rockchip,pins = <3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
}; };
lan_led_pin: lan-led-pin {
rockchip,pins = <3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
wan_led_pin: wan-led-pin { wan_led_pin: wan-led-pin {
rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
}; };
wl_led_pin: wl-led-pin {
rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
};
}; };
hym8563 { hym8563 {
@ -543,6 +537,12 @@
}; };
}; };
m2-pins {
m2_w_disable_pin: m2-w-disable-pin {
rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_output_high>;
};
};
pmic { pmic {
pmic_int: pmic_int { pmic_int: pmic_int {
rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>;
@ -553,17 +553,10 @@
vcc5v0_usb_host_en: vcc5v0_usb_host_en { vcc5v0_usb_host_en: vcc5v0_usb_host_en {
rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
}; };
vcc5v0_usb_otg_en: vcc5v0_usb_otg_en {
vcc5v0_usb_otg_en: vcc5v0-usb-otg-en {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>;
}; };
}; };
m2-pins {
m2_w_disable_pin: m2-w-disable-pin {
rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_output_high>;
};
};
}; };
&pmu_io_domains { &pmu_io_domains {
@ -578,7 +571,7 @@
}; };
&pwm0 { &pwm0 {
status = "okay"; status = "disabled";
}; };
&rng { &rng {
@ -593,12 +586,7 @@
&sdhci { &sdhci {
bus-width = <8>; bus-width = <8>;
max-frequency = <200000000>; max-frequency = <200000000>;
mmc-hs200-1_8v;
non-removable; non-removable;
supports-emmc;
non-removable;
assigned-clocks = <&cru BCLK_EMMC>, <&cru TCLK_EMMC>, <&cru CCLK_EMMC>;
assigned-clock-rates = <200000000>, <24000000>, <200000000>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>; pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd>;
status = "okay"; status = "okay";
@ -662,6 +650,7 @@
}; };
&usb2phy0_otg { &usb2phy0_otg {
phy-supply = <&vcc5v0_usb_otg>;
status = "okay"; status = "okay";
}; };
@ -670,25 +659,15 @@
}; };
&usb2phy1_host { &usb2phy1_host {
phy-supply = <&vcc5v0_usb_host>;
status = "okay"; status = "okay";
}; };
&usb2phy1_otg { &usb2phy1_otg {
phy-supply = <&vcc5v0_usb_host>;
status = "okay"; status = "okay";
}; };
&pwm0 {
status = "disabled";
};
&sata2 {
status = "disabled";
};
&sfc {
status = "disabled";
};
&vop { &vop {
assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;