From 7f11d9f3f9076bf4b31edf2b6152f54fb0252111 Mon Sep 17 00:00:00 2001 From: DHDAXCW Date: Wed, 26 Apr 2023 07:16:13 +0000 Subject: [PATCH] ??? --- package/boot/uboot-rockchip/Makefile | 4 +- .../armv8/base-files/etc/board.d/01_leds | 5 +- .../armv8/base-files/etc/board.d/02_network | 4 + .../etc/hotplug.d/net/40-net-smp-affinity | 3 +- .../boot/dts/rockchip/rk3568-hinlink-opc.dtsi | 1 - .../boot/dts/rockchip/rk3568-opc-h66k.dts | 20 +++ .../boot/dts/rockchip/rk3568-opc-h68k.dts | 148 +++++++++--------- .../boot/dts/rockchip/rk3568-opc-h69k.dts | 78 +++++++++ target/linux/rockchip/image/armv8.mk | 29 +++- ...ip-rk356x-add-support-for-new-boards.patch | 4 +- 10 files changed, 212 insertions(+), 84 deletions(-) create mode 100644 target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-opc-h66k.dts create mode 100644 target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-opc-h69k.dts diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile index 179ad6453..7020b023d 100644 --- a/package/boot/uboot-rockchip/Makefile +++ b/package/boot/uboot-rockchip/Makefile @@ -177,7 +177,9 @@ define U-Boot/opc-h68k-rk3568 BUILD_SUBTARGET:=armv8 NAME:=OPC-H68K Board BUILD_DEVICES:= \ - hinlink_opc-h68k + hinlink_opc-h66k \ + hinlink_opc-h68k \ + hinlink_opc-h69k DEPENDS:=+PACKAGE_u-boot-opc-h68k-rk3568:arm-trusted-firmware-rk3568 PKG_BUILD_DEPENDS:=arm-trusted-firmware-rockchip-vendor ATF:=rk3568_bl31_v1.28.elf diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds index 21967bcef..b9f17747f 100755 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/01_leds @@ -28,14 +28,15 @@ friendlyarm,nanopi-r5c) ucidef_set_led_netdev "lan" "LAN" "green:lan" "eth1" ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth0" ucidef_set_led_netdev "wlan" "WLAN" "green:wlan" "phy0-ap0" - ;; friendlyarm,nanopi-r5s) ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth0" ucidef_set_led_netdev "lan1" "LAN1" "green:lan1" "eth1" ucidef_set_led_netdev "lan2" "LAN2" "green:lan2" "eth2" ;; -hinlink,opc-h68k) +hinlink,opc-h66k|\ +hinlink,opc-h68k|\ +hinlink,opc-h69k) ucidef_set_led_netdev "wan" "WAN" "blue:net" "eth0" ;; esac diff --git a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network index 577a9de81..2e0a4a177 100755 --- a/target/linux/rockchip/armv8/base-files/etc/board.d/02_network +++ b/target/linux/rockchip/armv8/base-files/etc/board.d/02_network @@ -13,6 +13,7 @@ rockchip_setup_interfaces() embedfire,lubancat1|\ embedfire,lubancat1n|\ embedfire,lubancat2|\ + hinlink,opc-h66k|\ friendlyarm,nanopi-r2c|\ friendlyarm,nanopi-r2s|\ friendlyarm,nanopi-r4s|\ @@ -24,6 +25,7 @@ rockchip_setup_interfaces() ucidef_set_interfaces_lan_wan "eth1 eth2" "eth0" ;; hinlink,opc-h68k|\ + hinlink,opc-h69k|\ embedfire,lubancat2n) ucidef_set_interfaces_lan_wan "eth1 eth2 eth3" "eth0" ;; @@ -75,7 +77,9 @@ rockchip_setup_macs() embedfire,lubancat1n|\ embedfire,lubancat2|\ embedfire,lubancat2n|\ + hinlink,opc-h66k|\ hinlink,opc-h68k|\ + hinlink,opc-h69k|\ friendlyarm,nanopi-r2c|\ friendlyarm,nanopi-r2s|\ friendlyarm,nanopi-r5c|\ diff --git a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity index bc83ca050..b4e0e5170 100644 --- a/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity +++ b/target/linux/rockchip/armv8/base-files/etc/hotplug.d/net/40-net-smp-affinity @@ -60,7 +60,6 @@ friendlyarm,nanopi-r4se) set_interface_core 4 "eth0" set_interface_core 5 "eth1" ;; -firefly,rk3568-roc-pc|\ embedfire,lubancat1n|\ embedfire,lubancat2) set_interface_core 2 "eth0" @@ -68,6 +67,7 @@ embedfire,lubancat2) /usr/sbin/ethtool -K eth0 tso on sg on tx on /usr/sbin/ethtool -K eth1 tso on sg on tx on ;; +hinlink,opc-h66k|\ friendlyarm,nanopi-r5c) set_interface_core 1 "eth0-0" set_interface_core 2 "eth0-16" @@ -119,6 +119,7 @@ friendlyarm,nanopi-r5s) /usr/sbin/ethtool -K eth2 tso on sg on tx on ;; hinlink,opc-h68k|\ +hinlink,opc-h69k|\ embedfire,lubancat2n) set_interface_core 0 "eth0" set_interface_core 1 "eth1" diff --git a/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi b/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi index 1efb127cc..d42f4661b 100644 --- a/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi +++ b/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi @@ -124,7 +124,6 @@ regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; enable-active-high; - gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; startup-delay-us = <5000>; vin-supply = <&vcc5v0_sys>; }; diff --git a/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-opc-h66k.dts b/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-opc-h66k.dts new file mode 100644 index 000000000..0074551d3 --- /dev/null +++ b/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-opc-h66k.dts @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2022 AmadeusGhost + +/dts-v1/; + +#include "rk3568-hinlink-opc.dtsi" + +/ { + model = "HINLINK OPC-H66K Board"; + compatible = "hinlink,opc-h66k", "rockchip,rk3568"; + + aliases { + ethernet0 = &rtl8125_1; + ethernet1 = &rtl8125_2; + }; +}; + +&vcc3v3_pcie { + gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; +}; \ No newline at end of file diff --git a/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-opc-h68k.dts b/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-opc-h68k.dts index defff637a..b81063913 100644 --- a/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-opc-h68k.dts +++ b/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-opc-h68k.dts @@ -1,74 +1,76 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -// Copyright (c) 2022 AmadeusGhost - -/dts-v1/; - -#include "rk3568-hinlink-opc.dtsi" - -/ { - model = "HINLINK OPC-H68K Board"; - compatible = "hinlink,opc-h68k", "rockchip,rk3568"; - - aliases { - ethernet0 = &gmac0; - ethernet1 = &gmac1; - ethernet2 = &rtl8125_2; - ethernet3 = &rtl8125_1; - }; -}; - -&gmac0 { - phy-mode = "rgmii"; - clock_in_out = "output"; - snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 20000 100000>; - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; - assigned-clock-rates = <0>, <125000000>; - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus>; - tx_delay = <0x19>; - rx_delay = <0x10>; - phy-handle = <&rgmii_phy0>; - status = "okay"; -}; - -&gmac1 { - phy-mode = "rgmii"; - clock_in_out = "output"; - snps,reset-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - snps,reset-delays-us = <0 20000 100000>; - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; - assigned-clock-rates = <0>, <125000000>; - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_rgmii_bus>; - tx_delay = <0x4f>; - rx_delay = <0x26>; - phy-handle = <&rgmii_phy1>; - status = "okay"; -}; - -&mdio0 { - rgmii_phy0: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; - -&mdio1 { - rgmii_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2022 AmadeusGhost + +/dts-v1/; + +#include "rk3568-hinlink-opc.dtsi" + +/ { + model = "HINLINK OPC-H68K Board"; + compatible = "hinlink,opc-h68k", "rockchip,rk3568"; + + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1; + }; +}; + +&gmac0 { + phy-mode = "rgmii"; + clock_in_out = "output"; + snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 20000 100000>; + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; + assigned-clock-rates = <0>, <125000000>; + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + tx_delay = <0x19>; + rx_delay = <0x10>; + phy-handle = <&rgmii_phy0>; + status = "okay"; +}; + +&gmac1 { + phy-mode = "rgmii"; + clock_in_out = "output"; + snps,reset-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 20000 100000>; + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; + assigned-clock-rates = <0>, <125000000>; + pinctrl-names = "default"; + pinctrl-0 = <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus>; + tx_delay = <0x4f>; + rx_delay = <0x26>; + phy-handle = <&rgmii_phy1>; + status = "okay"; +}; + +&mdio0 { + rgmii_phy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&vcc3v3_pcie { + gpio = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; }; \ No newline at end of file diff --git a/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-opc-h69k.dts b/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-opc-h69k.dts new file mode 100644 index 000000000..6c1d92f22 --- /dev/null +++ b/target/linux/rockchip/files-6.1/arch/arm64/boot/dts/rockchip/rk3568-opc-h69k.dts @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +// Copyright (c) 2022 AmadeusGhost + +/dts-v1/; + +#include "rk3568-hinlink-opc.dtsi" + +/ { + model = "HINLINK OPC-H68K Board"; + compatible = "hinlink,opc-h68k", "rockchip,rk3568"; + + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1; + ethernet2 = &rtl8125_2; + ethernet3 = &rtl8125_1; + }; +}; + +&gmac0 { + phy-mode = "rgmii"; + clock_in_out = "output"; + snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 20000 100000>; + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; + assigned-clock-rates = <0>, <125000000>; + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + tx_delay = <0x19>; + rx_delay = <0x10>; + phy-handle = <&rgmii_phy0>; + status = "okay"; +}; + +&gmac1 { + phy-mode = "rgmii"; + clock_in_out = "output"; + snps,reset-gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + snps,reset-delays-us = <0 20000 100000>; + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; + assigned-clock-rates = <0>, <125000000>; + pinctrl-names = "default"; + pinctrl-0 = <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus>; + tx_delay = <0x4f>; + rx_delay = <0x26>; + phy-handle = <&rgmii_phy1>; + status = "okay"; +}; + +&mdio0 { + rgmii_phy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&vcc3v3_pcie { + gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; +}; \ No newline at end of file diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk index fa10a8297..bd4f18656 100644 --- a/target/linux/rockchip/image/armv8.mk +++ b/target/linux/rockchip/image/armv8.mk @@ -65,15 +65,34 @@ define Device/embedfire_lubancat2n endef #TARGET_DEVICES += embedfire_lubancat2n -define Device/hinlink_opc-h68k +define Device/hinlink_common DEVICE_VENDOR := HINLINK - DEVICE_MODEL := OPC-H68K - SOC := rk3568 UBOOT_DEVICE_NAME := opc-h68k-rk3568 IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r5s | pine64-img | gzip | append-metadata - DEVICE_PACKAGES := kmod-r8125 kmod-mt7921e kmod-ata-ahci kmod-ata-ahci-platform kmod-ata-core luci-app-usbmodem minicom fibocom-dial + DEVICE_PACKAGES := kmod-ata-ahci-platform kmod-mt7921e kmod-r8125 kmod-usb-serial-cp210x wpad-openssl endef -# TARGET_DEVICES += hinlink_opc-h68k + +define Device/hinlink_opc-h66k +$(call Device/hinlink_common) + DEVICE_MODEL := OPC-H66K + SOC := rk3568 +endef +TARGET_DEVICES += hinlink_opc-h66k + +define Device/hinlink_opc-h68k +$(call Device/hinlink_common) + DEVICE_MODEL := OPC-H68K + SOC := rk3568 +endef +TARGET_DEVICES += hinlink_opc-h68k + +define Device/hinlink_opc-h69k +$(call Device/hinlink_common) + DEVICE_MODEL := OPC-H69K + SOC := rk3568 + DEVICE_PACKAGES += kmod-usb-serial-option uqmi +endef +TARGET_DEVICES += hinlink_opc-h69k define Device/friendlyarm_nanopi-r2c DEVICE_VENDOR := FriendlyARM diff --git a/target/linux/rockchip/patches-6.1/210-rockchip-rk356x-add-support-for-new-boards.patch b/target/linux/rockchip/patches-6.1/210-rockchip-rk356x-add-support-for-new-boards.patch index 32ffca6ce..08a162846 100644 --- a/target/linux/rockchip/patches-6.1/210-rockchip-rk356x-add-support-for-new-boards.patch +++ b/target/linux/rockchip/patches-6.1/210-rockchip-rk356x-add-support-for-new-boards.patch @@ -1,6 +1,6 @@ --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -78,3 +78,11 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-so +@@ -78,3 +78,13 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-so dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb @@ -11,7 +11,9 @@ +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-lubancat2n.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5s.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-nanopi-r5c.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h66k.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h68k.dtb ++dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-opc-h69k.dtb --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi @@ -1780,6 +1780,15 @@