Nanako/DHDAXCW-Rockchip-OpenWrt
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fix gmac0

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This commit is contained in:
DHDAXCW 2024-03-21 17:23:00 +08:00
parent bd6ae62638
commit 8dc7a2a281
1 changed files with 26 additions and 0 deletions
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26
target/linux/rockchip/patches-6.1/994-drv-net-phy-add-JLSemi-jl2xxx-driver.patch
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@ -23,3 +23,29 @@
obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o
obj-$(CONFIG_LXT_PHY) += lxt.o
obj-$(CONFIG_MARVELL_10G_PHY) += marvell10g.o
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c
@@ -1730,7 +1730,7 @@ static int gmac_clk_enable(struct rk_priv_data *bsp_priv, bool enable)
bsp_priv->ops->set_clock_selection(bsp_priv,
bsp_priv->clock_input, true);
- mdelay(5);
+ usleep_range(100, 200);
bsp_priv->clk_enabled = true;
}
} else {
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
index 7c26394f6..3b9e4db37 100644
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_lib.c
@@ -22,7 +22,7 @@ int dwmac4_dma_reset(void __iomem *ioaddr)
return readl_poll_timeout(ioaddr + DMA_BUS_MODE, value,
!(value & DMA_BUS_MODE_SFT_RESET),
- 10000, 1000000);
+ 500, 1000000);
}
void dwmac4_set_rx_tail_ptr(void __iomem *ioaddr, u32 tail_ptr, u32 chan)