From d7e948ea32e8503c0b8fb6e86912c6dfdb66c4ff Mon Sep 17 00:00:00 2001 From: DHDAXCW Date: Sat, 29 Jun 2024 14:15:52 +0800 Subject: [PATCH] sync --- config/Config-build.in | 15 + config/Config-images.in | 2 +- config/Config-kernel.in | 17 +- include/kernel-5.10 | 4 +- include/kernel-5.15 | 4 +- include/kernel-5.4 | 4 +- include/package.mk | 49 +- include/target.mk | 2 +- include/u-boot.mk | 35 +- .../arm-trusted-firmware-mediatek/Makefile | 33 +- ...01-mediatek-snfi-FM35Q1GA-is-x4-only.patch | 23 + ...just-pin-drive-strength-for-Fidelix-.patch | 99 + ...just-drive-strength-to-12mA-like-old.patch | 135 + .../boot/arm-trusted-firmware-tools/Makefile | 4 +- package/boot/uboot-amlogic/Makefile | 57 + package/boot/uboot-envtools/files/ramips | 10 +- ...support-for-MediaTek-SPI-NAND-flash-.patch | 2 +- package/boot/uboot-sunxi/Makefile | 10 + package/devel/tmon/Makefile | 106 +- package/firmware/ath11k-firmware/Makefile | 24 +- package/firmware/ath11k-wifi/Makefile | 94 - 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target/linux/sunxi/patches-6.1/101-sunxi-add-get_soc_chipid-and-sunxi_get_serial.patch create mode 100644 target/linux/sunxi/patches-6.1/460-ARM-dts-suniv-add-USB-related-device-nodes.patch create mode 100644 target/linux/sunxi/patches-6.1/461-ARM-dts-suniv-add-device-tree-for-PopStick-v1_1.patch create mode 100644 target/linux/sunxi/patches-6.1/462-ARM-dts-suniv-licheepi-nano-enable-USB.patch create mode 100644 target/linux/sunxi/patches-6.1/463-f1c100s-sram-driver.patch create mode 100644 target/linux/sunxi/patches-6.1/464-f1c100s-watchdog-compat.patch create mode 100644 target/linux/sunxi/patches-6.1/501-h616-Add-cpu-frequency-scaling-support.patch create mode 100644 target/linux/sunxi/patches-6.1/502-arm64-dts-allwinner-h616-Add-cpufreq.patch create mode 100644 target/linux/sunxi/patches-6.6/008-v6.7-arm64-dts-allwinner-h616-Add-SID-controller-node.patch create mode 100644 target/linux/sunxi/patches-6.6/009-v6.9-soc-sunxi-sram-export-register-0-for-THS-on-H616.patch create mode 100644 target/linux/sunxi/patches-6.6/010-v6.8-thermal-drivers-sun8i-Add-D1-T113s-THS-controller-support.patch create mode 100644 target/linux/sunxi/patches-6.6/011-v6.9-thermal-drivers-sun8i-Explain-unknown-H6-register-value.patch create mode 100644 target/linux/sunxi/patches-6.6/012-v6.9-thermal-drivers-sun8i-Extend-H6-calibration-to-support-4.patch create mode 100644 target/linux/sunxi/patches-6.6/013-v6.9-thermal-drivers-sun8i-Add-SRAM-register-access-code.patch create mode 100644 target/linux/sunxi/patches-6.6/014-v6.9-thermal-drivers-sun8i-Add-support-for-H616-THS-controller.patch create mode 100644 target/linux/sunxi/patches-6.6/015-v6.9-thermal-drivers-sun8i-Dont-fail-probe-due-to-zone-registra.patch create mode 100644 target/linux/sunxi/patches-6.6/016-v6.9-arm64-dts-allwinner-h616-Add-thermal-sensor-and-zones.patch create mode 100644 target/linux/sunxi/patches-6.6/102-sunxi-add-OF-node-for-USB-eth-on-NanoPi-R1S-H5.patch create mode 100644 target/linux/sunxi/patches-6.6/301-orangepi_pc2_usb_otg_to_host_key_power.patch create mode 100644 target/linux/sunxi/patches-6.6/400-arm64-allwinner-a64-sopine-Add-Sopine-flash-partitio.patch create mode 100644 target/linux/sunxi/patches-6.6/410-sunxi-add-bananapi-p2-zero.patch create mode 100644 target/linux/sunxi/patches-6.6/430-arm64-dts-allwinner-a64-olinuxino-add-status-LED-ali.patch create mode 100644 target/linux/sunxi/patches-6.6/442-arm64-dts-orangepi-one-plus-enable-PWM.patch create mode 100644 target/linux/sunxi/patches-6.6/450-arm64-dts-enable-wifi-on-pine64-boards.patch create mode 100644 target/linux/sunxi/patches-6.6/501-h616-Add-cpu-frequency-scaling-support.patch create mode 100644 target/linux/sunxi/patches-6.6/502-arm64-dts-allwinner-h616-Add-cpufreq.patch create mode 100644 toolchain/musl/patches/610-add-renameat2-linux-syscall-wrapper.patch create mode 100644 tools/autoconf-archive/patches/001-fix_ax_c_float_words_bigendian.patch create mode 100644 tools/automake/patches/101-do-not-require-files.patch create mode 100644 tools/automake/patches/200-other-V-values-for-verbosity.patch delete mode 100644 tools/cpio/patches/001-duplicate-program-name.patch delete mode 100644 tools/cpio/patches/010-clang.patch diff --git a/config/Config-build.in b/config/Config-build.in index c2303637c..49f40bb00 100644 --- a/config/Config-build.in +++ b/config/Config-build.in @@ -152,6 +152,21 @@ menu "Global build settings" default n help Adds -g3 to the CFLAGS. + + config USE_GC_SECTIONS + bool + prompt "Dead code and data elimination for all packages (EXPERIMENTAL)" + help + Places functions and data items into its own sections to use the linker's + garbage collection capabilites. + Packages can choose to opt-out via setting PKG_BUILD_FLAGS:=no-gc-sections + + config USE_LTO + bool + prompt "Use the link-time optimizer for all packages (EXPERIMENTAL)" + help + Adds LTO flags to the CFLAGS and LDFLAGS. + Packages can choose to opt-out via setting PKG_BUILD_FLAGS:=no-lto config IPV6 def_bool y diff --git a/config/Config-images.in b/config/Config-images.in index e59318bba..f0627874e 100644 --- a/config/Config-images.in +++ b/config/Config-images.in @@ -303,7 +303,7 @@ menu "Target Images" default 8 if TARGET_apm821xx_sata default 64 if TARGET_bcm27xx default 32 if TARGET_rockchip - default 32 if TARGET_x86 + default 128 if TARGET_armvirt default 16 config TARGET_ROOTFS_PARTSIZE diff --git a/config/Config-kernel.in b/config/Config-kernel.in index ae845b66f..2b904b57f 100644 --- a/config/Config-kernel.in +++ b/config/Config-kernel.in @@ -50,6 +50,15 @@ config KERNEL_ARM_PMU default n depends on (arm || aarch64) +config KERNEL_RISCV_PMU + bool + select KERNEL_RISCV_PMU_SBI + depends on riscv64 + +config KERNEL_RISCV_PMU_SBI + bool + depends on riscv64 + config KERNEL_X86_VSYSCALL_EMULATION bool "Enable vsyscall emulation" default n @@ -72,6 +81,7 @@ config KERNEL_PERF_EVENTS bool "Compile the kernel with performance events and counters" default n select KERNEL_ARM_PMU if (arm || aarch64) + select KERNEL_RISCV_PMU if riscv64 config KERNEL_PROFILING bool "Compile the kernel with profiling enabled" @@ -1135,13 +1145,6 @@ config KERNEL_NET_L3_MASTER_DEV This module provides glue between core networking code and device drivers to support L3 master devices like VRF. -config KERNEL_XDP_SOCKETS - bool "XDP sockets support" - default y if KERNEL_DEBUG_INFO_BTF - help - XDP sockets allows a channel between XDP programs and - userspace applications. - config KERNEL_PAGE_POOL def_bool n diff --git a/include/kernel-5.10 b/include/kernel-5.10 index ee8bf19a0..90467d65a 100644 --- a/include/kernel-5.10 +++ b/include/kernel-5.10 @@ -1,2 +1,2 @@ -LINUX_VERSION-5.10 = .213 -LINUX_KERNEL_HASH-5.10.213 = 84cf30223239ec3333a5f7b2a7fba2042bba70d1582a139f7543956af871ad80 +LINUX_VERSION-5.10 = .220 +LINUX_KERNEL_HASH-5.10.220 = 7cc3aff924e9707a5dbf1200c79a7f01617e097b9b175d02bda8ca762aeee19b diff --git a/include/kernel-5.15 b/include/kernel-5.15 index 5436913e0..a03ed80f9 100644 --- a/include/kernel-5.15 +++ b/include/kernel-5.15 @@ -1,2 +1,2 @@ -LINUX_VERSION-5.15 = .156 -LINUX_KERNEL_HASH-5.15.156 = 9f0465d14c93691056f5f94de647601f94f083ad8ce2e5d306564394b13e7778 +LINUX_VERSION-5.15 = .161 +LINUX_KERNEL_HASH-5.15.161 = d629f78680dc4b65e3d78b61406fb7757b960c83c206e63ad8c2606b3e3c474c diff --git a/include/kernel-5.4 b/include/kernel-5.4 index a17e792d2..82c8c7418 100644 --- a/include/kernel-5.4 +++ b/include/kernel-5.4 @@ -1,2 +1,2 @@ -LINUX_VERSION-5.4 = .272 -LINUX_KERNEL_HASH-5.4.272 = 3599d5959a403e64be407d7f05e56cb270d6ddd154e89a596609919ab1e2e366 +LINUX_VERSION-5.4 = .278 +LINUX_KERNEL_HASH-5.4.278 = e5a00606115545f444ef2766af5652f5539e3c96f46a9778bede89b98ffb8588 diff --git a/include/package.mk b/include/package.mk index 368bf0d7c..75aa8aefe 100644 --- a/include/package.mk +++ b/include/package.mk @@ -11,8 +11,6 @@ include $(INCLUDE_DIR)/download.mk PKG_BUILD_DIR ?= $(BUILD_DIR)/$(if $(BUILD_VARIANT),$(PKG_NAME)-$(BUILD_VARIANT)/)$(PKG_NAME)$(if $(PKG_VERSION),-$(PKG_VERSION)) PKG_INSTALL_DIR ?= $(PKG_BUILD_DIR)/ipkg-install PKG_BUILD_PARALLEL ?= -PKG_USE_MIPS16 ?= 1 -PKG_IREMAP ?= 1 PKG_SKIP_DOWNLOAD=$(USE_SOURCE_DIR)$(USE_GIT_TREE)$(USE_GIT_SRC_CHECKOUT) MAKE_J:=$(if $(MAKE_JOBSERVER),$(MAKE_JOBSERVER) $(if $(filter 3.% 4.0 4.1,$(MAKE_VERSION)),-j)) @@ -24,17 +22,52 @@ PKG_JOBS?=-j1 else PKG_JOBS?=$(if $(PKG_BUILD_PARALLEL),$(MAKE_J),-j1) endif -ifdef CONFIG_USE_MIPS16 - ifeq ($(strip $(PKG_USE_MIPS16)),1) - TARGET_ASFLAGS_DEFAULT = $(filter-out -mips16 -minterlink-mips16,$(TARGET_CFLAGS)) - TARGET_CFLAGS += -mips16 -minterlink-mips16 - endif + +PKG_BUILD_FLAGS?= +# TODO remove this when all packages moved to PKG_BUILD_FLAGS=no-mips16 +PKG_USE_MIPS16?=1 +ifneq ($(strip $(PKG_USE_MIPS16)),1) + PKG_BUILD_FLAGS+=no-mips16 endif -ifeq ($(strip $(PKG_IREMAP)),1) + +__unknown_flags=$(filter-out no-iremap no-mips16 gc-sections no-gc-sections lto no-lto no-mold,$(PKG_BUILD_FLAGS)) +ifneq ($(__unknown_flags),) + $(error unknown PKG_BUILD_FLAGS: $(__unknown_flags)) +endif + +# $1=flagname, $2=default (0/1) +define pkg_build_flag +$(if $(filter no-$(1),$(PKG_BUILD_FLAGS)),0,$(if $(filter $(1),$(PKG_BUILD_FLAGS)),1,$(2))) +endef + +ifeq ($(call pkg_build_flag,iremap,1),1) IREMAP_CFLAGS = $(call iremap,$(PKG_BUILD_DIR),$(notdir $(PKG_BUILD_DIR))) TARGET_CFLAGS += $(IREMAP_CFLAGS) endif +ifdef CONFIG_USE_MIPS16 + ifeq ($(call pkg_build_flag,mips16,1),1) + TARGET_ASFLAGS_DEFAULT = $(filter-out -mips16 -minterlink-mips16,$(TARGET_CFLAGS)) + TARGET_CFLAGS += -mips16 -minterlink-mips16 + TARGET_CXXFLAGS += -mips16 -minterlink-mips16 + endif +endif +ifeq ($(call pkg_build_flag,gc-sections,$(if $(CONFIG_USE_GC_SECTIONS),1,0)),1) + TARGET_CFLAGS+= -ffunction-sections -fdata-sections + TARGET_CXXFLAGS+= -ffunction-sections -fdata-sections + TARGET_LDFLAGS+= -Wl,--gc-sections +endif +ifeq ($(call pkg_build_flag,lto,$(if $(CONFIG_USE_LTO),1,0)),1) + TARGET_CFLAGS+= -flto=auto -fno-fat-lto-objects + TARGET_CXXFLAGS+= -flto=auto -fno-fat-lto-objects + TARGET_LDFLAGS+= -flto=auto -fuse-linker-plugin +endif +ifdef CONFIG_USE_MOLD + ifeq ($(call pkg_build_flag,mold,1),1) + TARGET_LINKER:=mold + endif +endif + include $(INCLUDE_DIR)/hardening.mk include $(INCLUDE_DIR)/prereq.mk include $(INCLUDE_DIR)/unpack.mk diff --git a/include/target.mk b/include/target.mk index 426801b92..e5c064759 100644 --- a/include/target.mk +++ b/include/target.mk @@ -55,7 +55,7 @@ DEFAULT_PACKAGES.nas:=\ DEFAULT_PACKAGES.router:=\ dnsmasq-full firewall iptables ppp ppp-mod-pppoe \ block-mount coremark kmod-nf-nathelper kmod-nf-nathelper-extra kmod-ipt-raw kmod-tun \ - iptables-mod-tproxy iptables-mod-extra ipset ip-full default-settings luci luci-newapi \ + iptables-mod-tproxy iptables-mod-extra ipset ip-full default-settings luci \ ddns-scripts_aliyun ddns-scripts_dnspod luci-app-ddns luci-app-upnp luci-app-autoreboot \ luci-app-arpbind luci-app-filetransfer luci-app-vsftpd luci-app-ssr-plus luci-app-vlmcsd \ luci-app-accesscontrol luci-app-nlbwmon luci-app-turboacc luci-app-wol curl ca-certificates diff --git a/include/u-boot.mk b/include/u-boot.mk index 454880989..d824d97ff 100644 --- a/include/u-boot.mk +++ b/include/u-boot.mk @@ -1,5 +1,3 @@ -include $(INCLUDE_DIR)/prereq.mk - PKG_NAME ?= u-boot ifndef PKG_SOURCE_PROTO @@ -20,31 +18,6 @@ PKG_LICENSE_FILES:=Licenses/README PKG_BUILD_PARALLEL ?= 1 -ifdef UBOOT_USE_BINMAN - $(eval $(call TestHostCommand,python3-pyelftools, \ - Please install the Python3 elftools module, \ - $(STAGING_DIR_HOST)/bin/python3 -c 'import elftools')) -endif - -ifdef UBOOT_USE_INTREE_DTC - $(eval $(call TestHostCommand,python3-dev, \ - Please install the python3-dev package, \ - python3.11-config --includes 2>&1 | grep 'python3', \ - python3.10-config --includes 2>&1 | grep 'python3', \ - python3.9-config --includes 2>&1 | grep 'python3', \ - python3.8-config --includes 2>&1 | grep 'python3', \ - python3.7-config --includes 2>&1 | grep 'python3', \ - python3-config --includes 2>&1 | grep -E 'python3\.([7-9]|[0-9][0-9])\.?')) - - $(eval $(call TestHostCommand,python3-setuptools, \ - Please install the Python3 setuptools module, \ - $(STAGING_DIR_HOST)/bin/python3 -c 'import setuptools')) - - $(eval $(call TestHostCommand,swig, \ - Please install the swig package, \ - swig -version)) -endif - export GCC_HONOUR_COPTS=s define Package/u-boot/install/default @@ -69,7 +42,6 @@ endef TARGET_DEP = TARGET_$(BUILD_TARGET)$(if $(BUILD_SUBTARGET),_$(BUILD_SUBTARGET)) UBOOT_MAKE_FLAGS = \ - PATH=$(STAGING_DIR_HOST)/bin:$(PATH) \ HOSTCC="$(HOSTCC)" \ HOSTCFLAGS="$(HOST_CFLAGS) $(HOST_CPPFLAGS) -std=gnu11" \ HOSTLDFLAGS="$(HOST_LDFLAGS)" \ @@ -111,14 +83,9 @@ endef define Build/Configure/U-Boot +$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) $(UBOOT_CONFIGURE_VARS) $(UBOOT_CONFIG)_config - $(if $(strip $(UBOOT_CUSTOMIZE_CONFIG)), - $(PKG_BUILD_DIR)/scripts/config --file $(PKG_BUILD_DIR)/.config $(UBOOT_CUSTOMIZE_CONFIG) - +$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) $(UBOOT_CONFIGURE_VARS) oldconfig) endef -ifndef UBOOT_USE_INTREE_DTC - DTC=$(wildcard $(LINUX_DIR)/scripts/dtc/dtc) -endif +DTC=$(wildcard $(LINUX_DIR)/scripts/dtc/dtc) define Build/Compile/U-Boot +$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) \ diff --git a/package/boot/arm-trusted-firmware-mediatek/Makefile b/package/boot/arm-trusted-firmware-mediatek/Makefile index f77f30591..d226a655d 100644 --- a/package/boot/arm-trusted-firmware-mediatek/Makefile +++ b/package/boot/arm-trusted-firmware-mediatek/Makefile @@ -13,9 +13,9 @@ PKG_RELEASE:=2 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=https://github.com/mtk-openwrt/arm-trusted-firmware.git -PKG_SOURCE_DATE:=2023-07-24 -PKG_SOURCE_VERSION:=00ac6db375b76e57e1f5e9e9bffa033e907c3581 -PKG_MIRROR_HASH:=74fc18395532c4292f530da8d00fa1873ada4e05e600c0077a7b7f85ace0d913 +PKG_SOURCE_DATE:=2024-01-17 +PKG_SOURCE_VERSION:=bacca82a8cac369470df052a9d801a0ceb9b74ca +PKG_MIRROR_HASH:=d035c1b63a9bd71d752c90540361b66d290e7cf42dcca73259d0950af3569c79 PKG_MAINTAINER:=Daniel Golle @@ -94,6 +94,30 @@ define Trusted-Firmware-A/mt7622-sdmmc-2ddr DDR3_FLYBY:=1 endef +define Trusted-Firmware-A/mt7981-nor-ddr4 + NAME:=MediaTek MT7981 (SPI-NOR, DDR4) + BOOT_DEVICE:=nor + BUILD_SUBTARGET:=filogic + PLAT:=mt7981 + DDR_TYPE:=ddr4 +endef + +define Trusted-Firmware-A/mt7981-emmc-ddr4 + NAME:=MediaTek MT7981 (eMMC, DDR4) + BOOT_DEVICE:=emmc + BUILD_SUBTARGET:=filogic + PLAT:=mt7981 + DDR_TYPE:=ddr4 +endef + +define Trusted-Firmware-A/mt7981-spim-nand-ddr4 + NAME:=MediaTek MT7981 (SPI-NAND via SPIM, DDR4) + BOOT_DEVICE:=spim-nand + BUILD_SUBTARGET:=filogic + PLAT:=mt7981 + DDR_TYPE:=ddr4 +endef + define Trusted-Firmware-A/mt7981-nor-ddr3 NAME:=MediaTek MT7981 (SPI-NOR, DDR3) BOOT_DEVICE:=nor @@ -349,6 +373,9 @@ TFA_TARGETS:= \ mt7981-sdmmc-ddr3 \ mt7981-snand-ddr3 \ mt7981-spim-nand-ddr3 \ + mt7981-emmc-ddr4 \ + mt7981-nor-ddr4 \ + mt7981-spim-nand-ddr4 \ mt7986-emmc-ddr3 \ mt7986-nor-ddr3 \ mt7986-sdmmc-ddr3 \ diff --git a/package/boot/arm-trusted-firmware-mediatek/patches/0001-mediatek-snfi-FM35Q1GA-is-x4-only.patch b/package/boot/arm-trusted-firmware-mediatek/patches/0001-mediatek-snfi-FM35Q1GA-is-x4-only.patch new file mode 100644 index 000000000..d8ea1fa40 --- /dev/null +++ b/package/boot/arm-trusted-firmware-mediatek/patches/0001-mediatek-snfi-FM35Q1GA-is-x4-only.patch @@ -0,0 +1,23 @@ +From fb2a2b669ec9bbf5c448d4b56499bc83de075c93 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Thu, 29 Feb 2024 18:01:08 +0000 +Subject: [PATCH 1/3] mediatek: snfi: FM35Q1GA is x4-only + +Dont allow x2 read and cache read operations on FM35Q1GA. + +Signed-off-by: Daniel Golle +--- + plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-ids.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-ids.c ++++ b/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-ids.c +@@ -423,7 +423,7 @@ static const struct snand_flash_info sna + + SNAND_INFO("FM35Q1GA", SNAND_ID(SNAND_ID_DYMMY, 0xe5, 0x71), + SNAND_MEMORG_1G_2K_64, +- &snand_cap_read_from_cache_x4, ++ &snand_cap_read_from_cache_x4_only, + &snand_cap_program_load_x4), + + SNAND_INFO("PN26G01A", SNAND_ID(SNAND_ID_DYMMY, 0xa1, 0xe1), diff --git a/package/boot/arm-trusted-firmware-mediatek/patches/0002-mediatek-snfi-adjust-pin-drive-strength-for-Fidelix-.patch b/package/boot/arm-trusted-firmware-mediatek/patches/0002-mediatek-snfi-adjust-pin-drive-strength-for-Fidelix-.patch new file mode 100644 index 000000000..95e3c139f --- /dev/null +++ b/package/boot/arm-trusted-firmware-mediatek/patches/0002-mediatek-snfi-adjust-pin-drive-strength-for-Fidelix-.patch @@ -0,0 +1,99 @@ +From 6470986f037880ce76960c369d6e5a5270e7ce32 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Sun, 10 Mar 2024 15:39:07 +0000 +Subject: [PATCH 2/3] mediatek: snfi: adjust pin drive strength for Fidelix + SPI-NAND + +It seems like we might need to adjust the pin driver strength to 12mA +for Fidelix SPI-NAND chip on MT7622 to avoid SPI data corruption on +some devices. + +Signed-off-by: Daniel Golle +--- + .../apsoc_common/drivers/snfi/mtk-snand-def.h | 7 +++++ + .../apsoc_common/drivers/snfi/mtk-snand-ids.c | 4 ++- + .../apsoc_common/drivers/snfi/mtk-snand.c | 30 +++++++++++++++++++ + 3 files changed, 40 insertions(+), 1 deletion(-) + +--- a/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-def.h ++++ b/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-def.h +@@ -86,6 +86,12 @@ struct snand_mem_org { + + typedef int (*snand_select_die_t)(struct mtk_snand *snf, uint32_t dieidx); + ++enum snand_drv { ++ SNAND_DRV_NO_CHANGE = 0, ++ SNAND_DRV_8mA = 8, ++ SNAND_DRV_12mA = 12, ++}; ++ + struct snand_flash_info { + const char *model; + struct snand_id id; +@@ -93,6 +99,7 @@ struct snand_flash_info { + const struct snand_io_cap *cap_rd; + const struct snand_io_cap *cap_pl; + snand_select_die_t select_die; ++ enum snand_drv drv; + }; + + #define SNAND_INFO(_model, _id, _memorg, _cap_rd, _cap_pl, ...) \ +--- a/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-ids.c ++++ b/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-ids.c +@@ -424,7 +424,9 @@ static const struct snand_flash_info sna + SNAND_INFO("FM35Q1GA", SNAND_ID(SNAND_ID_DYMMY, 0xe5, 0x71), + SNAND_MEMORG_1G_2K_64, + &snand_cap_read_from_cache_x4_only, +- &snand_cap_program_load_x4), ++ &snand_cap_program_load_x4, ++ NULL, ++ SNAND_DRV_12mA), + + SNAND_INFO("PN26G01A", SNAND_ID(SNAND_ID_DYMMY, 0xa1, 0xe1), + SNAND_MEMORG_1G_2K_128, +--- a/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand.c ++++ b/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand.c +@@ -1845,6 +1845,33 @@ static int mtk_snand_id_probe(struct mtk + return -EINVAL; + } + ++#define MT7622_GPIO_BASE (void *)0x10211000 ++#define MT7622_GPIO_DRIV(x) (MT7622_GPIO_BASE + 0x900 + 0x10 * x) ++ ++void mtk_mt7622_snand_adjust_drive(void *dev, enum snand_drv drv) ++{ ++ uint32_t e4, e8; ++ ++ e4 = readl(MT7622_GPIO_DRIV(6)) & ~(0x3f00); ++ e8 = readl(MT7622_GPIO_DRIV(7)) & ~(0x3f00); ++ ++ switch (drv) { ++ case SNAND_DRV_8mA: ++ e4 |= 0x3f00; ++ break; ++ case SNAND_DRV_12mA: ++ e8 |= 0x3f00; ++ break; ++ default: ++ return; ++ } ++ ++ snand_log_chip(dev, "adjusting SPI-NAND pin drive strength to %umA\n", drv); ++ ++ writel(e4, MT7622_GPIO_DRIV(6)); ++ writel(e8, MT7622_GPIO_DRIV(7)); ++} ++ + int mtk_snand_init(void *dev, const struct mtk_snand_platdata *pdata, + struct mtk_snand **psnf) + { +@@ -1888,6 +1915,9 @@ int mtk_snand_init(void *dev, const stru + if (ret) + return ret; + ++ if (pdata->soc == SNAND_SOC_MT7622 && snand_info->drv) ++ mtk_mt7622_snand_adjust_drive(dev, snand_info->drv); ++ + rawpage_size = snand_info->memorg.pagesize + + snand_info->memorg.sparesize; + diff --git a/package/boot/arm-trusted-firmware-mediatek/patches/0003-mediatek-snfi-adjust-drive-strength-to-12mA-like-old.patch b/package/boot/arm-trusted-firmware-mediatek/patches/0003-mediatek-snfi-adjust-drive-strength-to-12mA-like-old.patch new file mode 100644 index 000000000..57de88f8c --- /dev/null +++ b/package/boot/arm-trusted-firmware-mediatek/patches/0003-mediatek-snfi-adjust-drive-strength-to-12mA-like-old.patch @@ -0,0 +1,135 @@ +From 40a3661bebb3d738ab95b7de66e9d8382d5b9ab1 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Sun, 10 Mar 2024 17:48:09 +0000 +Subject: [PATCH 3/3] mediatek: snfi: adjust drive strength to 12mA like old + loader does + +In addition to FM35X1GA, also change the driver strength to 12mA for +all chips where this is done by the old/legacy U-Boot: + * Winbond 512Mb + * Winbond 1Gb + * Winbond 2Gb + * GD5F4GQ4UBYIG + * GD5F4GQ4UAYIG + * GD5F1GQ4UX + * GD5F1GQ4UE + * GD5F2GQ4UX + * GD5F2GQ4UE + +Signed-off-by: Daniel Golle +--- + .../apsoc_common/drivers/snfi/mtk-snand-ids.c | 59 ++++++++++++++----- + 1 file changed, 44 insertions(+), 15 deletions(-) + +--- a/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-ids.c ++++ b/plat/mediatek/apsoc_common/drivers/snfi/mtk-snand-ids.c +@@ -80,65 +80,94 @@ static const struct snand_flash_info sna + SNAND_INFO("W25N512GV", SNAND_ID(SNAND_ID_DYMMY, 0xef, 0xaa, 0x20), + SNAND_MEMORG_512M_2K_64, + &snand_cap_read_from_cache_quad, +- &snand_cap_program_load_x4), ++ &snand_cap_program_load_x4, ++ NULL, ++ SNAND_DRV_12mA), + SNAND_INFO("W25N01GV", SNAND_ID(SNAND_ID_DYMMY, 0xef, 0xaa, 0x21), + SNAND_MEMORG_1G_2K_64, + &snand_cap_read_from_cache_quad, +- &snand_cap_program_load_x4), ++ &snand_cap_program_load_x4, ++ NULL, ++ SNAND_DRV_12mA), + SNAND_INFO("W25M02GV", SNAND_ID(SNAND_ID_DYMMY, 0xef, 0xab, 0x21), + SNAND_MEMORG_2G_2K_64_2D, + &snand_cap_read_from_cache_quad, + &snand_cap_program_load_x4, +- mtk_snand_winbond_select_die), ++ mtk_snand_winbond_select_die, ++ SNAND_DRV_12mA), + SNAND_INFO("W25N02KV", SNAND_ID(SNAND_ID_DYMMY, 0xef, 0xaa, 0x22), + SNAND_MEMORG_2G_2K_128, + &snand_cap_read_from_cache_quad, +- &snand_cap_program_load_x4), ++ &snand_cap_program_load_x4, ++ NULL, ++ SNAND_DRV_12mA), + + SNAND_INFO("GD5F1GQ4UAWxx", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0x10), + SNAND_MEMORG_1G_2K_64, + &snand_cap_read_from_cache_quad_q2d, +- &snand_cap_program_load_x4), ++ &snand_cap_program_load_x4, ++ NULL, ++ SNAND_DRV_12mA), + SNAND_INFO("GD5F1GQ4UExIG", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0xd1), + SNAND_MEMORG_1G_2K_128, + &snand_cap_read_from_cache_quad_q2d, +- &snand_cap_program_load_x4), ++ &snand_cap_program_load_x4, ++ NULL, ++ SNAND_DRV_12mA), + SNAND_INFO("GD5F1GQ4UExxH", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0xd9), + SNAND_MEMORG_1G_2K_64, + &snand_cap_read_from_cache_quad_q2d, +- &snand_cap_program_load_x4), ++ &snand_cap_program_load_x4, ++ NULL, ++ SNAND_DRV_12mA), + SNAND_INFO("GD5F1GQ4xAYIG", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0xf1), + SNAND_MEMORG_1G_2K_64, + &snand_cap_read_from_cache_quad_q2d, +- &snand_cap_program_load_x4), ++ &snand_cap_program_load_x4, ++ NULL, ++ SNAND_DRV_12mA), + SNAND_INFO("GD5F2GQ4UExIG", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0xd2), + SNAND_MEMORG_2G_2K_128, + &snand_cap_read_from_cache_quad_q2d, +- &snand_cap_program_load_x4), ++ &snand_cap_program_load_x4, ++ NULL, ++ SNAND_DRV_12mA), + SNAND_INFO("GD5F2GQ5UExxH", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0x32), + SNAND_MEMORG_2G_2K_64, + &snand_cap_read_from_cache_quad_a8d, +- &snand_cap_program_load_x4), ++ &snand_cap_program_load_x4, ++ NULL, ++ SNAND_DRV_12mA), + SNAND_INFO("GD5F2GQ4xAYIG", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0xf2), + SNAND_MEMORG_2G_2K_64, + &snand_cap_read_from_cache_quad_q2d, +- &snand_cap_program_load_x4), ++ &snand_cap_program_load_x4, ++ NULL, ++ SNAND_DRV_12mA), + SNAND_INFO("GD5F4GQ4UBxIG", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0xd4), + SNAND_MEMORG_4G_4K_256, + &snand_cap_read_from_cache_quad_q2d, +- &snand_cap_program_load_x4), ++ &snand_cap_program_load_x4, ++ NULL, ++ SNAND_DRV_12mA), + SNAND_INFO("GD5F4GQ4xAYIG", SNAND_ID(SNAND_ID_ADDR, 0xc8, 0xf4), + SNAND_MEMORG_4G_2K_64, + &snand_cap_read_from_cache_quad_q2d, +- &snand_cap_program_load_x4), ++ &snand_cap_program_load_x4, ++ NULL, ++ SNAND_DRV_12mA), + SNAND_INFO("GD5F2GQ5UExxG", SNAND_ID(SNAND_ID_DYMMY, 0xc8, 0x52), + SNAND_MEMORG_2G_2K_128, + &snand_cap_read_from_cache_quad_a8d, +- &snand_cap_program_load_x4), ++ &snand_cap_program_load_x4, ++ NULL, ++ SNAND_DRV_12mA), + SNAND_INFO("GD5F4GQ4UCxIG", SNAND_ID(SNAND_ID_DYMMY, 0xc8, 0xb4), + SNAND_MEMORG_4G_4K_256, + &snand_cap_read_from_cache_quad_q2d, +- &snand_cap_program_load_x4), ++ &snand_cap_program_load_x4, ++ NULL, ++ SNAND_DRV_12mA), + + SNAND_INFO("MX35LF1GE4AB", SNAND_ID(SNAND_ID_DYMMY, 0xc2, 0x12), + SNAND_MEMORG_1G_2K_64, diff --git a/package/boot/arm-trusted-firmware-tools/Makefile b/package/boot/arm-trusted-firmware-tools/Makefile index 81c8a99cb..209e945a0 100644 --- a/package/boot/arm-trusted-firmware-tools/Makefile +++ b/package/boot/arm-trusted-firmware-tools/Makefile @@ -8,9 +8,9 @@ include $(TOPDIR)/rules.mk PKG_NAME:=arm-trusted-firmware-tools -PKG_VERSION:=2.7 +PKG_VERSION:=2.9 PKG_RELEASE:=1 -PKG_HASH:=53422dc649153838e03820330ba17cb10afe3e330ecde0db11e4d5f1361a33e6 +PKG_HASH:=76a66a1de0c01aeb83dfc7b72b51173fe62c6e51d6fca17cc562393117bed08b PKG_MAINTAINER:=Daniel Golle PKG_HOST_ONLY:=1 diff --git a/package/boot/uboot-amlogic/Makefile b/package/boot/uboot-amlogic/Makefile new file mode 100644 index 000000000..93e8f3bdb --- /dev/null +++ b/package/boot/uboot-amlogic/Makefile @@ -0,0 +1,57 @@ +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# +include $(TOPDIR)/rules.mk + +PKG_VERSION:=20240315 +PKG_RELEASE:=$(AUTORELEASE) + +PKG_SOURCE_PROTO:=default +PKG_SOURCE:=ophub-uboot-prebuilt-git-$(PKG_VERSION).tar.gz +PKG_SOURCE_VERSION:=abe491ab386607f9ab0d66728e5766bc5d7e8a20 +PKG_SOURCE_URL_FILE:=$(PKG_SOURCE_VERSION).tar.gz +PKG_SOURCE_URL:=https://github.com/ophub/u-boot/archive/ +PKG_HASH:=3f98f5728f48d13f33cf4fd21fb6032a625ad3c61aa2e8073dda821f71f067ec + +PKG_MAINTAINER:=ophub + +include $(INCLUDE_DIR)/u-boot.mk +include $(INCLUDE_DIR)/package.mk + +TAR_OPTIONS:=--strip-components 1 $(TAR_OPTIONS) +TAR_CMD=$(HOST_TAR) -C $(1) $(TAR_OPTIONS) + +define U-Boot/Default + BUILD_TARGET:=amlogic + UENV:=default + HIDDEN:=1 + DEFAULT:=y +endef + +define U-Boot/phicomm-n1 + NAME:=Phicomm N1 + OVERLAY:=u-boot-n1.bin + BUILD_SUBTARGET:=mesongx + BUILD_DEVICES:=phicomm_n1 +endef + +UBOOT_TARGETS := phicomm-n1 + +define Build/Configure + true +endef + +define Build/Compile + true +endef + +define Build/InstallDev + $(INSTALL_DIR) $(STAGING_DIR_IMAGE) + $(CP) $(PKG_BUILD_DIR)/u-boot/amlogic/overload/$(OVERLAY) $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-u-boot-overlay.bin +endef + +define Package/u-boot/install/default +endef + +$(eval $(call BuildPackage/U-Boot)) diff --git a/package/boot/uboot-envtools/files/ramips b/package/boot/uboot-envtools/files/ramips index 4323a2574..f2bc3555f 100644 --- a/package/boot/uboot-envtools/files/ramips +++ b/package/boot/uboot-envtools/files/ramips @@ -42,16 +42,18 @@ zbtlink,zbt-wg2626|\ zte,mf283plus) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x10000" ;; +h3c,tx1800-plus|\ +h3c,tx1801-plus|\ +h3c,tx1806|\ +jcg,q20) + ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000" + ;; hootoo,ht-tm05|\ ravpower,rp-wd03) idx="$(find_mtd_index u-boot-env)" [ -n "$idx" ] && \ ubootenv_add_uci_config "/dev/mtd$idx" "0x4000" "0x1000" "0x1000" ;; -c-life,xg1|\ -jcg,q20) - ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000" - ;; linksys,ea7300-v1|\ linksys,ea7500-v2|\ linksys,ea8100-v1|\ diff --git a/package/boot/uboot-mediatek/patches/100-02-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch b/package/boot/uboot-mediatek/patches/100-02-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch index 05138d984..42908621c 100644 --- a/package/boot/uboot-mediatek/patches/100-02-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch +++ b/package/boot/uboot-mediatek/patches/100-02-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch @@ -1213,7 +1213,7 @@ Signed-off-by: Weijie Gao + + SNAND_INFO("FM35Q1GA", SNAND_ID(SNAND_ID_DYMMY, 0xe5, 0x71), + SNAND_MEMORG_1G_2K_64, -+ &snand_cap_read_from_cache_x4, ++ &snand_cap_read_from_cache_x4_only, + &snand_cap_program_load_x4), + + SNAND_INFO("PN26G01A", SNAND_ID(SNAND_ID_DYMMY, 0xa1, 0xe1), diff --git a/package/boot/uboot-sunxi/Makefile b/package/boot/uboot-sunxi/Makefile index 15593399d..19731ed40 100644 --- a/package/boot/uboot-sunxi/Makefile +++ b/package/boot/uboot-sunxi/Makefile @@ -337,6 +337,15 @@ define U-Boot/orangepi_zero2 ATF:=h616 endef +define U-Boot/orangepi_zero3 + BUILD_SUBTARGET:=cortexa53 + NAME:=Xunlong Orange Pi Zero3 + BUILD_DEVICES:=xunlong_orangepi-zero3 + DEPENDS:=+PACKAGE_u-boot-orangepi_zero3:trusted-firmware-a-sunxi-h616 + UENV:=h616 + ATF:=h616 +endef + define U-Boot/Bananapi_M2_Ultra BUILD_SUBTARGET:=cortexa7 NAME:=Bananapi M2 Ultra @@ -400,6 +409,7 @@ UBOOT_TARGETS := \ orangepi_2 \ orangepi_pc2 \ orangepi_zero2 \ + orangepi_zero3 \ pangolin \ pine64_plus \ Sinovoip_BPI_M3 \ diff --git a/package/devel/tmon/Makefile b/package/devel/tmon/Makefile index f0ad9dc57..6f9182ce9 100644 --- a/package/devel/tmon/Makefile +++ b/package/devel/tmon/Makefile @@ -1,53 +1,53 @@ -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/kernel.mk - -PKG_NAME:=tmon -PKG_VERSION:=$(LINUX_VERSION) -PKG_RELEASE:=1 - -PKG_MAINTAINER:=Florian Eckert -PKG_LICENSE:=GPL-2.0-only - -include $(INCLUDE_DIR)/package.mk - -define Package/tmon - SECTION:=devel - CATEGORY:=Development - TITLE:=Thermal monitoring and testing tool - VERSION:=$(LINUX_VERSION)-$(PKG_RELEASE) - URL:=http://www.kernel.org - DEPENDS:=+libncursesw -endef - -define Package/tmon/description - As hardware vendors cope with the thermal constraints on their products, - more and more sensors are added, new cooling capabilities are introduced. - To expose such relationship to the userspace, Linux generic thermal layer - introduced sysfs entry at /sys/class/thermal with a matrix of symbolic - links, trip point bindings, and device instances. To traverse such - matrix by hand is not a trivial task. - 'TMON' is conceived as a tool to help visualize, tune, and test the - complex thermal subsystem. -endef - -MAKE_FLAGS = \ - ARCH="$(LINUX_KARCH)" \ - CROSS_COMPILE="$(TARGET_CROSS)" \ - CC="$(TARGET_CC)" \ - CFLAGS="$(TARGET_CFLAGS) $(TARGET_CPPFLAGS)" \ - LDFLAGS="$(TARGET_LDFLAGS)" - -define Build/Compile - -$(MAKE) clean \ - -C $(LINUX_DIR)/tools/thermal/tmon - +$(MAKE_FLAGS) $(MAKE) \ - -C $(LINUX_DIR)/tools/thermal/tmon -endef - -define Package/tmon/install - $(INSTALL_DIR) $(1)/usr/bin - $(INSTALL_BIN) $(LINUX_DIR)/tools/thermal/tmon/tmon \ - $(1)/usr/bin/ -endef - -$(eval $(call BuildPackage,tmon)) +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk + +PKG_NAME:=tmon +PKG_VERSION:=$(LINUX_VERSION) +PKG_RELEASE:=1 + +PKG_MAINTAINER:=Florian Eckert +PKG_LICENSE:=GPL-2.0-only + +include $(INCLUDE_DIR)/package.mk + +define Package/tmon + SECTION:=devel + CATEGORY:=Development + TITLE:=Thermal monitoring and testing tool + VERSION:=$(LINUX_VERSION)-$(PKG_RELEASE) + URL:=http://www.kernel.org + DEPENDS:=+libncursesw +endef + +define Package/tmon/description + As hardware vendors cope with the thermal constraints on their products, + more and more sensors are added, new cooling capabilities are introduced. + To expose such relationship to the userspace, Linux generic thermal layer + introduced sysfs entry at /sys/class/thermal with a matrix of symbolic + links, trip point bindings, and device instances. To traverse such + matrix by hand is not a trivial task. + 'TMON' is conceived as a tool to help visualize, tune, and test the + complex thermal subsystem. +endef + +MAKE_FLAGS = \ + ARCH="$(LINUX_KARCH)" \ + CROSS_COMPILE="$(TARGET_CROSS)" \ + CC="$(TARGET_CC)" \ + CFLAGS="$(TARGET_CFLAGS) $(TARGET_CPPFLAGS)" \ + LDFLAGS="$(TARGET_LDFLAGS)" + +define Build/Compile + -$(MAKE) clean \ + -C $(LINUX_DIR)/tools/thermal/tmon + +$(MAKE_FLAGS) $(MAKE) \ + -C $(LINUX_DIR)/tools/thermal/tmon +endef + +define Package/tmon/install + $(INSTALL_DIR) $(1)/usr/bin + $(INSTALL_BIN) $(LINUX_DIR)/tools/thermal/tmon/tmon \ + $(1)/usr/bin/ +endef + +$(eval $(call BuildPackage,tmon)) diff --git a/package/firmware/ath11k-firmware/Makefile b/package/firmware/ath11k-firmware/Makefile index ea4977aa6..0e1c548e2 100644 --- a/package/firmware/ath11k-firmware/Makefile +++ b/package/firmware/ath11k-firmware/Makefile @@ -8,9 +8,9 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ath11k-firmware -PKG_SOURCE_DATE:=2023-08-22 -PKG_SOURCE_VERSION:=d8f82a98ff1aef330d65d8b5660b46d1a9809ee3 -PKG_MIRROR_HASH:=3dba19449758c3b17f117990d7ad4086554e012b579f1de16e9d9196a7fbaaa7 +PKG_SOURCE_DATE:=2023-03-31 +PKG_SOURCE_VERSION:=a039049a9349722fa5c74185452ab04644a0d351 +PKG_MIRROR_HASH:=ed401e3f6e91d70565b3396139193f7e815f410db93700697205ac8ed1b828c5 PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git @@ -32,6 +32,11 @@ define Package/ath11k-firmware-default DEPENDS:= endef +define Package/ath11k-firmware-ipq6018 +$(Package/ath11k-firmware-default) + TITLE:=IPQ6018 ath11k firmware +endef + define Package/ath11k-firmware-ipq8074 $(Package/ath11k-firmware-default) TITLE:=IPQ8074 ath11k firmware @@ -57,21 +62,30 @@ define Download/qcn9074-board endef $(eval $(call Download,qcn9074-board)) +define Package/ath11k-firmware-ipq6018/install + $(INSTALL_DIR) $(1)/lib/firmware/IPQ6018 + $(INSTALL_DIR) $(1)/lib/firmware/ath11k/IPQ6018/hw1.0 + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/ath11k-firmware/IPQ6018/hw1.0/2.5.0.1/WLAN.HK.2.5.0.1-01208-QCAHKSWPL_SILICONZ-1/* \ + $(1)/lib/firmware/IPQ6018/ +endef + define Package/ath11k-firmware-ipq8074/install $(INSTALL_DIR) $(1)/lib/firmware/IPQ8074 $(INSTALL_DATA) \ - $(PKG_BUILD_DIR)/ath11k-firmware/IPQ8074/hw2.0/2.9.0.1/WLAN.HK.2.9.0.1-01890-QCAHKSWPL_SILICONZ-1/* \ + $(PKG_BUILD_DIR)/ath11k-firmware/IPQ8074/hw2.0/testing/2.9.0.1/WLAN.HK.2.9.0.1-01385-QCAHKSWPL_SILICONZ-1/* \ $(1)/lib/firmware/IPQ8074/ endef define Package/ath11k-firmware-qcn9074/install $(INSTALL_DIR) $(1)/lib/firmware/ath11k/QCN9074/hw1.0 $(INSTALL_DATA) \ - $(PKG_BUILD_DIR)/ath11k-firmware/QCN9074/hw1.0/2.9.0.1/WLAN.HK.2.9.0.1-01890-QCAHKSWPL_SILICONZ-1/* \ + $(PKG_BUILD_DIR)/ath11k-firmware/QCN9074/hw1.0/testing/2.9.0.1/WLAN.HK.2.9.0.1-01385-QCAHKSWPL_SILICONZ-1/* \ $(1)/lib/firmware/ath11k/QCN9074/hw1.0/ $(INSTALL_BIN) \ $(DL_DIR)/$(QCN9074_BOARD_FILE) $(1)/lib/firmware/ath11k/QCN9074/hw1.0/board-2.bin endef +$(eval $(call BuildPackage,ath11k-firmware-ipq6018)) $(eval $(call BuildPackage,ath11k-firmware-ipq8074)) $(eval $(call BuildPackage,ath11k-firmware-qcn9074)) diff --git a/package/firmware/ath11k-wifi/Makefile b/package/firmware/ath11k-wifi/Makefile deleted file mode 100644 index 2c33df970..000000000 --- a/package/firmware/ath11k-wifi/Makefile +++ /dev/null @@ -1,94 +0,0 @@ -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/version.mk - -PKG_NAME:=ath11k-wifi -PKG_RELEASE:=1 -PKG_FLAGS:=nonshared - -include $(INCLUDE_DIR)/package.mk - -define Build/Prepare - mkdir -p $(PKG_BUILD_DIR) -endef - -define Build/Compile -endef - -# Use ath10k-bdencoder from https://github.com/qca/qca-swiss-army-knife.git -# to generate the board-* files here. -# -# This is intended to be used on an interim basis until device-specific -# board data for new devices is available through the upstream compilation -# -# Please send a mail with your device-specific board files upstream. -# You can find instructions and examples on the linux-wireless wiki: -# - -ALLWIFIBOARDS:= \ - edgecore-eap102 \ - gl-ax1800 \ - gl-axt1800 \ - qihoo_v6 - -ALLWIFIPACKAGES:=$(foreach BOARD,$(ALLWIFIBOARDS),ath11k-wifi-$(BOARD)) - -define Package/ath11k-wifi-default - SUBMENU:=ath11k Board-Specific Overrides - SECTION:=firmware - CATEGORY:=Firmware - DEPENDS:=@TARGET_ipq60xx - TITLE:=Custom Board -endef - -define ath11k-wifi-install-one-to - $(INSTALL_DIR) $(2)/lib/firmware/ath11k/$(3)/ - $(INSTALL_DATA) $(1) $(2)/lib/firmware/ath11k/$(3)/board-2.bin -endef - -define ath11k-wifi-install-one - $(if $(filter $(suffix $(1)),.IPQ6018 .ipq6018),\ - $(call ath11k-wifi-install-one-to,$(1),$(2),IPQ6018/hw1.0),\ - $(error Unrecognized board-file suffix '$(suffix $(1))' for '$(1)')\ - ) - -endef -# Blank line required at end of above define due to foreach context - -define generate-ath11k-wifi-package - define Package/ath11k-wifi-$(1) - $(call Package/ath11k-wifi-default) - TITLE:=board-2.bin Overrides for $(2) - CONFLICTS:=$(PREV_BOARD) - endef - - define Package/ath11k-wifi-$(1)/description -The $(2) requires board-specific, reference ("cal") data -that is not yet present in the upstream wireless firmware distribution. - -This package supplies board-2.bin file(s) that, in the interim, -overwrite those supplied by the ath10k-firmware-* packages. - -This is package is only necessary for the $(2). - -Do not install it for any other device! - endef - - define Package/ath11k-wifi-$(1)/install-overlay - $$$$(foreach IPQ_WIFI_BOARD_FILE,$$$$(wildcard board-$(1).*),\ - $$$$(call ath11k-wifi-install-one,$$$$(IPQ_WIFI_BOARD_FILE),$$(1))) - endef - - PREV_BOARD+=ath11k-wifi-$(1) -endef - -# Add board name to ALLWIFIBOARDS -# Place files in this directory as board-. -# Add $(eval $(call generate-ath11k-wifi-package,,)) - -$(eval $(call generate-ath11k-wifi-package,edgecore-eap102,Edgecore EAP102)) -$(eval $(call generate-ath11k-wifi-package,gl-ax1800,Gl.iNET AX1800)) -$(eval $(call generate-ath11k-wifi-package,gl-axt1800,Gl.iNET AXT1800)) -$(eval $(call generate-ath11k-wifi-package,qihoo_v6,QIHOO 360V6)) - - -$(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE)))) diff --git a/package/firmware/ath11k-wifi/board-2.bin.IPQ6018 b/package/firmware/ath11k-wifi/board-2.bin.IPQ6018 deleted file mode 100644 index 8c384dc89b367f1aab745d0e004bbd29c767432a..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 787208 zcmeFa3wTr4nJ)b8E%_p2jBMl!;249AEfb)|TmuFyUu7)G!j^5>aT5oeVkk_UYnekPmU}|pl`ET;S2ufFYH9D@y~JrX zDR`q|er~_@=1tf2ZC`fd-d)Rg^zG_jzN>drxyH8NaNSM48r7{8Ze_P?4e4~PqLA(G ztkvz>Ylrq4)?Pcc*Dme#YTcS&mqcrrdAlWG0(p3UF7{%rO zpH#g%*(FKYR>*)d(qgNdsz3Q^Bu~WXWza1_G?|r8v6-4 zfG8jehytR(#1-hj?|AfJ>fFTrNXtu00bfgad*8qVM~T5GFdGr+g|1(Iv0`?1w;W+Kok%KL;+Di6c7bO0Z~8{5Cud5Q9u+B1w;W+ zKok%KL;+Di6c7bO0a4&`P{2V0+WDudJt;LUJ!6hDGi$CZJ0~}9-uwmmR}?HPT(r0d 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UMAC,MAC0,MAC1 -//seq_start; -//seq_type:mem_req; -//memory size always given in KB. beow example reserves 3 buffers segments of 16 KB. -//sink:etr_ddr,0x1,0x1000; -//seq_end; -//Below commands to enable Event traces on UMAC,MAC0,MAC1 -seq_start; -seq_type:mac_event_trace; -sink:etr_ddr; -subsys_cfg_start:mac0; -hwsch:0x1, 0x000FFFF1,0x1036052C,0x0,0x0; -rxdma:0x2, 0x3400,0x8000,0x0,0x0; -crypto:0x3, 0xF79B3770,0x0,0x0,0x0; -txpcu:0x4, 0xD687F4E7,0x20000092,0x0,0x0; -txole:0x5, 0x640F0622,0x2,0x0,0x0; -pdg:0x6, 0x3C800706,0x0,0x0,0x0; -subsys_cfg_end:mac0; -subsys_cfg_start:mac1; -hwsch:0x7, 0x000FFFF1,0x1036052C,0x0,0x0; -rxdma:0x8, 0x3400,0x8000,0x0,0x0; -crypto:0x9, 0xF79B3770,0x0,0x0,0x0; -txpcu:0xA, 0xD687F4E7,0x20000092,0x0,0x0; -txole:0xB, 0x640F0622,0x2,0x0,0x0; -pdg:0xC, 0x3C800706,0x0,0x0,0x0; -subsys_cfg_end:mac1; -swap:0xFFFFFFFF; -trigger_start:trc; -wfi:0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF; -ts0:0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF; -ts1:0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF; -ts2:0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF; -ts3:0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF; -ts4:0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF; -trigger_end:trc; -memw:0xFFFFFFFF,0xFFFFFFFF; -seq_end; -// Below commands to enable obo trace on the mac0 -//seq_start; -//seq_type:mac_obo_trace; -//sink:etb_wcss; -//subsys_cfg_start:mac0; -//hwsch:0x1,0xABCDABCD; -//subsys_cfg_end:mac0; -//swap:0xABCDABCD; -//trigger_start:trc; -//wfi:0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF; -//ts0:0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF; -//ts1:0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF; -//ts2:0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF; -//ts3:0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF; -//ts4:0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF,0xFFFFFFFF; -//trigger_end:trc; -//memw:0xFFFFFFFF,0xFFFFFFFF; -//seq_end; -// Below commands to enable TLV trace on the mac0 -//seq_start; -//seq_type:mac_tlv_trace; -//sink:etb_wcss; -//subsys_cfg_start:mac0; -//tlv_port:PDG_TXDMA_TLV; -//subsys_cfg_end:mac0; -//seq_end; -// Below commands to enable q6 etm -//seq_start; -//seq_type:q6_etm_trace; -//sink:etr_ddr; -//seq_end; -// Below commands to enable umac noc traces -//seq_start; -//seq_type:umac_noc_trace; -//sink:etb_wcss; -//ctrl:0x12; -//port_sel:0x4; -//lut:0xA; -//routeid_base:0x01000000; -//routeid_mask:0x01c00000; -//addr_lo:0x0; -//addr_hi:0x0; -//win_size:0x25; -//req_opcode:0x3; -//res_status:0x3; -//fltr_len:0xF; -//async_period:0xC; -//seq_end; -// Below commands to enable umac noc traces -//seq_start; -//seq_type:phy_tlv_trace; -//sink:etr_ddr; -//seq_end; -//seq_start; -//seq_type:phy_event_trace; -//sink:etr_ddr; -//phya:0x1,0x1; -//phyb:0x1,0x1; -//seq_end; diff --git a/package/firmware/b43legacy-firmware/Makefile b/package/firmware/b43legacy-firmware/Makefile deleted file mode 100755 index b7f325e13..000000000 --- a/package/firmware/b43legacy-firmware/Makefile +++ /dev/null @@ -1,72 +0,0 @@ -# -# Copyright (C) 2016 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -include $(TOPDIR)/rules.mk - -PKG_NAME:=b43legacy-firmware -PKG_VERSION:=3.130.20.0 -PKG_RELEASE:=1 - -PKG_SOURCE:=wl_apsta-$(PKG_VERSION).o -PKG_SOURCE_URL:=@OPENWRT -PKG_HASH:=7dba610b1d96dd14e901bcbce14cd6ecd1b1ac6f5c0035b0d6b6dc46a7c3ef90 - -include $(INCLUDE_DIR)/package.mk - -define Package/b43legacy-firmware - SECTION:=firmware - CATEGORY:=Firmware - URL:=$(PKG_SOURCE_URL) - TITLE:=Broadcom bcm43xx b43legacy firmware -endef - -define Package/b43legacy-firmware/config - if PACKAGE_b43legacy-firmware - - config B43LEGACY_FW_SQUASH - bool "Remove unnecessary firmware files" - default y - help - This options allows you to remove unnecessary b43legacy firmware files - from the final rootfs image. This can reduce the rootfs size by - up to 50k. - - If unsure, say Y. - - config B43LEGACY_FW_SQUASH_COREREVS - string "Core revisions to include" - depends on B43LEGACY_FW_SQUASH - default "1,2,3,4" - help - This is a comma separated list of core revision numbers. - - Example (keep files for rev4 only): - 4 - - Example (keep files for rev2 and rev4): - 2,4 - - endif -endef - -define Build/Prepare - mkdir -p $(PKG_BUILD_DIR) -endef - -define Build/Compile - -endef - -define Package/b43legacy-firmware/install - $(INSTALL_DIR) $(1)/lib/firmware - b43-fwcutter --unsupported -w $(1)/lib/firmware/ $(DL_DIR)/$(PKG_SOURCE) - ifneq ($(CONFIG_B43LEGACY_FW_SQUASH),) - b43-fwsquash.py "G" "$(CONFIG_B43LEGACY_FW_SQUASH_COREREVS)" "$(1)/lib/firmware/b43legacy" - endif -endef - -$(eval $(call BuildPackage,b43legacy-firmware)) diff --git a/package/firmware/cypress-firmware/Makefile b/package/firmware/cypress-firmware/Makefile index c5f41e0cb..6a14ff993 100644 --- a/package/firmware/cypress-firmware/Makefile +++ b/package/firmware/cypress-firmware/Makefile @@ -1,19 +1,14 @@ -# -# Copyright (C) 2019-2020 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# +# SPDX-License-Identifier: GPL-2.0-or-later include $(TOPDIR)/rules.mk PKG_NAME:=cypress-firmware -PKG_VERSION:=5.4.18-2021_0812 +PKG_VERSION:=5.10.9-2022_0909 PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://github.com/Infineon/ifx-linux-firmware/ -PKG_MIRROR_HASH:=ac882b482dd401b53cdecc6004cd2bd3d65e888c19206dcf10931a28033ada4d +PKG_MIRROR_HASH:=944faae3a80013f1a963b6692d7f50a38c97edcf91fd163de521df755e6922b5 PKG_SOURCE_VERSION:=release-v$(PKG_VERSION) PKG_MAINTAINER:=Álvaro Fernández Rojas @@ -38,12 +33,19 @@ define Package/cypress-firmware-43012-sdio endef define Package/cypress-firmware-43012-sdio/install - $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DIR) $(1)/lib/firmware/cypress $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac43012-sdio.bin \ - $(1)/lib/firmware/brcm/brcmfmac43012-sdio.bin + $(1)/lib/firmware/cypress/ $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac43012-sdio.clm_blob \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac43012-sdio.bin \ + $(1)/lib/firmware/brcm/brcmfmac43012-sdio.bin + $(LN) \ + ../cypress/cyfmac43012-sdio.clm_blob \ $(1)/lib/firmware/brcm/brcmfmac43012-sdio.clm_blob endef @@ -56,9 +58,13 @@ define Package/cypress-firmware-43340-sdio endef define Package/cypress-firmware-43340-sdio/install - $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DIR) $(1)/lib/firmware/cypress $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac43340-sdio.bin \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac43340-sdio.bin \ $(1)/lib/firmware/brcm/brcmfmac43340-sdio.bin endef @@ -73,9 +79,13 @@ define Package/cypress-firmware-43362-sdio endef define Package/cypress-firmware-43362-sdio/install - $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DIR) $(1)/lib/firmware/cypress $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac43362-sdio.bin \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac43362-sdio.bin \ $(1)/lib/firmware/brcm/brcmfmac43362-sdio.bin endef @@ -85,12 +95,18 @@ $(eval $(call BuildPackage,cypress-firmware-43362-sdio)) define Package/cypress-firmware-4339-sdio $(Package/cypress-firmware-default) TITLE:=CYW4339 FullMac SDIO firmware + PROVIDES:=brcmfmac-firmware-4339-sdio + CONFLICTS:=brcmfmac-firmware-4339-sdio endef define Package/cypress-firmware-4339-sdio/install - $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DIR) $(1)/lib/firmware/cypress $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac4339-sdio.bin \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac4339-sdio.bin \ $(1)/lib/firmware/brcm/brcmfmac4339-sdio.bin endef @@ -105,17 +121,49 @@ define Package/cypress-firmware-43430-sdio endef define Package/cypress-firmware-43430-sdio/install - $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DIR) $(1)/lib/firmware/cypress $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac43430-sdio.bin \ - $(1)/lib/firmware/brcm/brcmfmac43430-sdio.bin + $(1)/lib/firmware/cypress/ $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac43430-sdio.clm_blob \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac43430-sdio.bin \ + $(1)/lib/firmware/brcm/brcmfmac43430-sdio.bin + $(LN) \ + ../cypress/cyfmac43430-sdio.clm_blob \ $(1)/lib/firmware/brcm/brcmfmac43430-sdio.clm_blob endef $(eval $(call BuildPackage,cypress-firmware-43430-sdio)) +# Cypress 43439 SDIO Firmware +define Package/cypress-firmware-43439-sdio + $(Package/cypress-firmware-default) + TITLE:=CYW43439 FullMac SDIO firmware +endef + +define Package/cypress-firmware-43439-sdio/install + $(INSTALL_DIR) $(1)/lib/firmware/cypress + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/firmware/cyfmac43439-sdio.bin \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/firmware/cyfmac43439-sdio.clm_blob \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac43439-sdio.bin \ + $(1)/lib/firmware/brcm/brcmfmac43439-sdio.bin + $(LN) \ + ../cypress/cyfmac43439-sdio.clm_blob \ + $(1)/lib/firmware/brcm/brcmfmac43439-sdio.clm_blob +endef + +$(eval $(call BuildPackage,cypress-firmware-43439-sdio)) + # Cypress 43455 SDIO Firmware define Package/cypress-firmware-43455-sdio $(Package/cypress-firmware-default) @@ -125,12 +173,19 @@ define Package/cypress-firmware-43455-sdio endef define Package/cypress-firmware-43455-sdio/install - $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DIR) $(1)/lib/firmware/cypress $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac43455-sdio.bin \ - $(1)/lib/firmware/brcm/brcmfmac43455-sdio.bin + $(1)/lib/firmware/cypress/ $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac43455-sdio.clm_blob \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac43455-sdio.bin \ + $(1)/lib/firmware/brcm/brcmfmac43455-sdio.bin + $(LN) \ + ../cypress/cyfmac43455-sdio.clm_blob \ $(1)/lib/firmware/brcm/brcmfmac43455-sdio.clm_blob endef @@ -143,12 +198,19 @@ define Package/cypress-firmware-4354-sdio endef define Package/cypress-firmware-4354-sdio/install - $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DIR) $(1)/lib/firmware/cypress $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac4354-sdio.bin \ - $(1)/lib/firmware/brcm/brcmfmac4354-sdio.bin + $(1)/lib/firmware/cypress/ $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac4354-sdio.clm_blob \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac4354-sdio.bin \ + $(1)/lib/firmware/brcm/brcmfmac4354-sdio.bin + $(LN) \ + ../cypress/cyfmac4354-sdio.clm_blob \ $(1)/lib/firmware/brcm/brcmfmac4354-sdio.clm_blob endef @@ -161,12 +223,19 @@ define Package/cypress-firmware-4356-pcie endef define Package/cypress-firmware-4356-pcie/install - $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DIR) $(1)/lib/firmware/cypress $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac4356-pcie.bin \ - $(1)/lib/firmware/brcm/brcmfmac4356-pcie.bin + $(1)/lib/firmware/cypress/ $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac4356-pcie.clm_blob \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac4356-pcie.bin \ + $(1)/lib/firmware/brcm/brcmfmac4356-pcie.bin + $(LN) \ + ../cypress/cyfmac4356-pcie.clm_blob \ $(1)/lib/firmware/brcm/brcmfmac4356-pcie.clm_blob endef @@ -179,12 +248,19 @@ define Package/cypress-firmware-4356-sdio endef define Package/cypress-firmware-4356-sdio/install - $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DIR) $(1)/lib/firmware/cypress $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac4356-sdio.bin \ - $(1)/lib/firmware/brcm/brcmfmac4356-sdio.bin + $(1)/lib/firmware/cypress/ $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac4356-sdio.clm_blob \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac4356-sdio.bin \ + $(1)/lib/firmware/brcm/brcmfmac4356-sdio.bin + $(LN) \ + ../cypress/cyfmac4356-sdio.clm_blob \ $(1)/lib/firmware/brcm/brcmfmac4356-sdio.clm_blob endef @@ -197,17 +273,49 @@ define Package/cypress-firmware-43570-pcie endef define Package/cypress-firmware-43570-pcie/install - $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DIR) $(1)/lib/firmware/cypress $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac43570-pcie.bin \ - $(1)/lib/firmware/brcm/brcmfmac43570-pcie.bin + $(1)/lib/firmware/cypress/ $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac43570-pcie.clm_blob \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac43570-pcie.bin \ + $(1)/lib/firmware/brcm/brcmfmac43570-pcie.bin + $(LN) \ + ../cypress/cyfmac43570-pcie.clm_blob \ $(1)/lib/firmware/brcm/brcmfmac43570-pcie.clm_blob endef $(eval $(call BuildPackage,cypress-firmware-43570-pcie)) +# Cypress 4373 PCIe Firmware +define Package/cypress-firmware-4373-pcie + $(Package/cypress-firmware-default) + TITLE:=CYW4373 FullMac PCIe firmware +endef + +define Package/cypress-firmware-4373-pcie/install + $(INSTALL_DIR) $(1)/lib/firmware/cypress + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/firmware/cyfmac4373-pcie.bin \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/firmware/cyfmac4373-pcie.clm_blob \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac4373-pcie.bin \ + $(1)/lib/firmware/brcm/brcmfmac4373-pcie.bin + $(LN) \ + ../cypress/cyfmac4373-pcie.clm_blob \ + $(1)/lib/firmware/brcm/brcmfmac4373-pcie.clm_blob +endef + +$(eval $(call BuildPackage,cypress-firmware-4373-pcie)) + # Cypress 4373 SDIO Firmware define Package/cypress-firmware-4373-sdio $(Package/cypress-firmware-default) @@ -215,12 +323,19 @@ define Package/cypress-firmware-4373-sdio endef define Package/cypress-firmware-4373-sdio/install - $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DIR) $(1)/lib/firmware/cypress $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac4373-sdio.bin \ - $(1)/lib/firmware/brcm/brcmfmac4373-sdio.bin + $(1)/lib/firmware/cypress/ $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac4373-sdio.clm_blob \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac4373-sdio.bin \ + $(1)/lib/firmware/brcm/brcmfmac4373-sdio.bin + $(LN) \ + ../cypress/cyfmac4373-sdio.clm_blob \ $(1)/lib/firmware/brcm/brcmfmac4373-sdio.clm_blob endef @@ -233,12 +348,19 @@ define Package/cypress-firmware-4373-usb endef define Package/cypress-firmware-4373-usb/install - $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DIR) $(1)/lib/firmware/cypress $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac4373-usb.bin \ - $(1)/lib/firmware/brcm/brcmfmac4373-usb.bin + $(1)/lib/firmware/cypress/ $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac4373.clm_blob \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac4373-usb.bin \ + $(1)/lib/firmware/brcm/brcmfmac4373-usb.bin + $(LN) \ + ../cypress/cyfmac4373.clm_blob \ $(1)/lib/firmware/brcm/brcmfmac4373.clm_blob endef @@ -251,13 +373,114 @@ define Package/cypress-firmware-54591-pcie endef define Package/cypress-firmware-54591-pcie/install - $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(INSTALL_DIR) $(1)/lib/firmware/cypress $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac54591-pcie.bin \ - $(1)/lib/firmware/brcm/brcmfmac54591-pcie.bin + $(1)/lib/firmware/cypress/ $(INSTALL_DATA) \ $(PKG_BUILD_DIR)/firmware/cyfmac54591-pcie.clm_blob \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac54591-pcie.bin \ + $(1)/lib/firmware/brcm/brcmfmac54591-pcie.bin + $(LN) \ + ../cypress/cyfmac54591-pcie.clm_blob \ $(1)/lib/firmware/brcm/brcmfmac54591-pcie.clm_blob endef $(eval $(call BuildPackage,cypress-firmware-54591-pcie)) + +# Cypress 54591 SDIO Firmware +define Package/cypress-firmware-54591-sdio + $(Package/cypress-firmware-default) + TITLE:=CYW54591 FullMac SDIO firmware +endef + +define Package/cypress-firmware-54591-sdio/install + $(INSTALL_DIR) $(1)/lib/firmware/cypress + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/firmware/cyfmac54591-sdio.bin \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/firmware/cyfmac54591-sdio.clm_blob \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac54591-sdio.bin \ + $(1)/lib/firmware/brcm/brcmfmac54591-sdio.bin + $(LN) \ + ../cypress/cyfmac54591-sdio.clm_blob \ + $(1)/lib/firmware/brcm/brcmfmac54591-sdio.clm_blob +endef + +$(eval $(call BuildPackage,cypress-firmware-54591-sdio)) + +# Cypress 55560 PCIe Firmware +define Package/cypress-firmware-55560-pcie + $(Package/cypress-firmware-default) + TITLE:=CYW55560 FullMac PCIe firmware +endef + +define Package/cypress-firmware-55560-pcie/install + $(INSTALL_DIR) $(1)/lib/firmware/cypress + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/firmware/cyfmac55560-pcie.trxse \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac55560-pcie.trxse \ + $(1)/lib/firmware/brcm/brcmfmac55560-pcie.trxse +endef + +$(eval $(call BuildPackage,cypress-firmware-55560-pcie)) + +# Cypress 55572 PCIe Firmware +define Package/cypress-firmware-55572-pcie + $(Package/cypress-firmware-default) + TITLE:=CYW55572 FullMac PCIe firmware +endef + +define Package/cypress-firmware-55572-pcie/install + $(INSTALL_DIR) $(1)/lib/firmware/cypress + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/firmware/cyfmac55572-pcie.trxse \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/firmware/cyfmac55572-pcie.clm_blob \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac55572-pcie.trxse \ + $(1)/lib/firmware/brcm/brcmfmac55572-pcie.trxse + $(LN) \ + ../cypress/cyfmac55572-pcie.clm_blob \ + $(1)/lib/firmware/brcm/brcmfmac55572-pcie.clm_blob +endef + +$(eval $(call BuildPackage,cypress-firmware-55572-pcie)) + +# Cypress 55572 SDIO Firmware +define Package/cypress-firmware-55572-sdio + $(Package/cypress-firmware-default) + TITLE:=CYW55572 FullMac SDIO firmware +endef + +define Package/cypress-firmware-55572-sdio/install + $(INSTALL_DIR) $(1)/lib/firmware/cypress + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/firmware/cyfmac55572-sdio.trxse \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/firmware/cyfmac55572-sdio.clm_blob \ + $(1)/lib/firmware/cypress/ + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) \ + ../cypress/cyfmac55572-sdio.trxse \ + $(1)/lib/firmware/brcm/brcmfmac55572-sdio.trxse + $(LN) \ + ../cypress/cyfmac55572-sdio.clm_blob \ + $(1)/lib/firmware/brcm/brcmfmac55572-sdio.clm_blob +endef + +$(eval $(call BuildPackage,cypress-firmware-55572-sdio)) diff --git a/package/firmware/cypress-nvram/Makefile b/package/firmware/cypress-nvram/Makefile index 806bfa2d9..dcf09d959 100644 --- a/package/firmware/cypress-nvram/Makefile +++ b/package/firmware/cypress-nvram/Makefile @@ -1,108 +1,38 @@ -# -# Copyright (C) 2019 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# +# SPDX-License-Identifier: GPL-2.0-or-later include $(TOPDIR)/rules.mk PKG_NAME:=cypress-nvram -PKG_SOURCE_DATE:=2019-09-03 -PKG_SOURCE_VERSION:=e7b78df22f2a0c5f56abb7b5880661611de35e5f -PKG_MIRROR_HASH:=1cb20a749696852be0a512d51961365dd9c031362af0af1a2b9f5a3fb894885f -PKG_RELEASE:=2 - -PKG_SOURCE_PROTO:=git -PKG_SOURCE_URL:=https://github.com/openwrt/cypress-nvram.git +PKG_RELEASE:=7 PKG_MAINTAINER:=Álvaro Fernández Rojas -PKG_FLAGS:=nonshared - include $(INCLUDE_DIR)/package.mk define Package/cypress-nvram-default SECTION:=firmware CATEGORY:=Firmware - URL:=https://community.cypress.com/community/linux endef define Build/Compile true endef -# Cypress 43430 SDIO Raspberry Pi 3B NVRAM -define Package/cypress-nvram-43430-sdio-rpi-3b +# Cypress 4339 SDIO NVRAM +define Package/cypress-nvram-4339-sdio $(Package/cypress-nvram-default) - TITLE:=CYW43430 NVRAM for Raspberry Pi 3B - DEPENDS:=@TARGET_bcm27xx - PROVIDES:=brcmfmac-firmware-43430-sdio-rpi-3b - CONFLICTS:=brcmfmac-firmware-43430-sdio-rpi-3b + TITLE:=BCM4339 SDIO NVRAM + CONFLICTS:=brcmfmac-nvram-4339-sdio endef -define Package/cypress-nvram-43430-sdio-rpi-3b/install +define Package/cypress-nvram-4339-sdio/install $(INSTALL_DIR) $(1)/lib/firmware/brcm $(INSTALL_DATA) \ - $(PKG_BUILD_DIR)/brcmfmac43430-sdio.raspberrypi,3-model-b.txt \ - $(1)/lib/firmware/brcm/brcmfmac43430-sdio.raspberrypi,3-model-b.txt + ./files/brcmfmac4339-sdio.AP6335.txt \ + $(1)/lib/firmware/brcm/ + $(LN) \ + brcmfmac4339-sdio.AP6335.txt \ + $(1)/lib/firmware/brcm/brcmfmac4339-sdio.technexion,imx7d-pico-pi.txt endef -$(eval $(call BuildPackage,cypress-nvram-43430-sdio-rpi-3b)) - -# Cypress 43430 SDIO Raspberry Pi Zero W NVRAM -define Package/cypress-nvram-43430-sdio-rpi-zero-w - $(Package/cypress-nvram-default) - TITLE:=CYW43430 NVRAM for Raspberry Pi Zero W - DEPENDS:=@TARGET_bcm27xx - PROVIDES:=brcmfmac-firmware-43430-sdio-rpi-zero-w - CONFLICTS:=brcmfmac-firmware-43430-sdio-rpi-zero-w -endef - -define Package/cypress-nvram-43430-sdio-rpi-zero-w/install - $(INSTALL_DIR) $(1)/lib/firmware/brcm - $(INSTALL_DATA) \ - $(PKG_BUILD_DIR)/brcmfmac43430-sdio.raspberrypi,model-zero-w.txt \ - $(1)/lib/firmware/brcm/brcmfmac43430-sdio.raspberrypi,model-zero-w.txt -endef - -$(eval $(call BuildPackage,cypress-nvram-43430-sdio-rpi-zero-w)) - -# Cypress 43455 SDIO Raspberry Pi 3B+ NVRAM -define Package/cypress-nvram-43455-sdio-rpi-3b-plus - $(Package/cypress-nvram-default) - TITLE:=CYW43455 NVRAM for Raspberry Pi 3B+ - DEPENDS:=@TARGET_bcm27xx - PROVIDES:=brcmfmac-firmware-43455-sdio-rpi-3b-plus - CONFLICTS:=brcmfmac-firmware-43455-sdio-rpi-3b-plus -endef - -define Package/cypress-nvram-43455-sdio-rpi-3b-plus/install - $(INSTALL_DIR) $(1)/lib/firmware/brcm - $(INSTALL_DATA) \ - $(PKG_BUILD_DIR)/brcmfmac43455-sdio.raspberrypi,3-model-b-plus.txt \ - $(1)/lib/firmware/brcm/brcmfmac43455-sdio.raspberrypi,3-model-b-plus.txt -endef - -$(eval $(call BuildPackage,cypress-nvram-43455-sdio-rpi-3b-plus)) - -# Cypress 43455 SDIO Raspberry Pi 4B NVRAM -define Package/cypress-nvram-43455-sdio-rpi-4b - $(Package/cypress-nvram-default) - TITLE:=CYW43455 NVRAM for Raspberry Pi 4B - DEPENDS:=@TARGET_bcm27xx - PROVIDES:=brcmfmac-firmware-43455-sdio-rpi-4b - CONFLICTS:=brcmfmac-firmware-43455-sdio-rpi-4b -endef - -define Package/cypress-nvram-43455-sdio-rpi-4b/install - $(INSTALL_DIR) $(1)/lib/firmware/brcm - $(INSTALL_DATA) \ - $(PKG_BUILD_DIR)/brcmfmac43455-sdio.raspberrypi,4-model-b.txt \ - $(1)/lib/firmware/brcm/brcmfmac43455-sdio.raspberrypi,4-model-b.txt - $(INSTALL_DATA) \ - $(PKG_BUILD_DIR)/brcmfmac43455-sdio.raspberrypi,4-model-b.txt \ - $(1)/lib/firmware/brcm/brcmfmac43455-sdio.raspberrypi,4-compute-module.txt -endef - -$(eval $(call BuildPackage,cypress-nvram-43455-sdio-rpi-4b)) +$(eval $(call BuildPackage,cypress-nvram-4339-sdio)) diff --git a/package/firmware/cypress-nvram/files/brcmfmac4339-sdio.AP6335.txt b/package/firmware/cypress-nvram/files/brcmfmac4339-sdio.AP6335.txt new file mode 100644 index 000000000..1ddd92950 --- /dev/null +++ b/package/firmware/cypress-nvram/files/brcmfmac4339-sdio.AP6335.txt @@ -0,0 +1,99 @@ +#AP6335_NVRAM_V1.5_03112014 +NVRAMRev=$Rev: 410316 $ +sromrev=11 +boardrev=0x1203 +boardtype=0x06c5 +boardflags=0x00000c01 +boardflags2=0x00002000 +boardflags3=0x101188 +macaddr=00:90:4c:c5:12:38 +ccode=0 +regrev=0 +antswitch=0 +pdgain2g=7 +pdgain5g=7 +tworangetssi2g=0 +tworangetssi5g=0 +femctrl=7 +pcieingress_war=15 +vendid=0x14e4 +devid=0x43ae +manfid=0x2d0 +nocrc=1 +otpimagesize=502 +xtalfreq=37400 +extpagain2g=2 +pdetrange2g=2 +extpagain5g=2 +pdetrange5g=2 +rxgains2gelnagaina0=0 +rxgains2gtrisoa0=7 +rxgains2gtrelnabypa0=0 +rxgains5gelnagaina0=0 +rxgains5gtrisoa0=11 +rxgains5gtrelnabypa0=0 +rxchain=1 +txchain=1 +aa2g=1 +aa5g=1 +tssipos5g=0 +tssipos2g=0 +pa2ga0=-161,6269,-723 +pa2gccka0=-116,7568,-852 +pa5ga0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D +pa5gbw40a0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D +pa5gbw80a0=0xFF61,0x163C,0xFD55,0xFF5D,0x1671,0xFD4F,0xFF5F,0x16CA,0xFD45,0xFF60,0x1676,0xFD4D +pdoffset40ma0=0 +pdoffset80ma0=0 +pdoffsetcckma0=0 +maxp2ga0=75 +maxp5ga0=64,64,72,72 +cckbw202gpo=0x0000 +cckbw20ul2gpo=0x0 +mcsbw202gpo=0x99445533 +mcsbw402gpo=0x99775533 +dot11agofdmhrbw202gpo=0x2233 +ofdmlrbw202gpo=0x0000 +tssifloor2g=500 +mcsbw205glpo=0x66333330 +mcsbw405glpo=0x66665530 +mcsbw805glpo=0xAA555530 +mcsbw1605glpo=0x99555530 +mcsbw205gmpo=0x99BB5530 +mcsbw405gmpo=0x99BB5530 +mcsbw805gmpo=0xEE555530 +mcsbw1605gmpo=0x99555530 +mcsbw205ghpo=0x99995530 +mcsbw405ghpo=0x99BB5530 +mcsbw805ghpo=0xEE555530 +mcsbw1605ghpo=0x99555530 +mcslr5glpo=0x0000 +mcslr5gmpo=0x0000 +mcslr5ghpo=0x0000 +sb20in40hrrpo=0x0 +sb20in80and160hr5glpo=0x0 +sb40and80hr5glpo=0x0 +sb20in80and160hr5gmpo=0x0 +sb40and80hr5gmpo=0x0 +sb20in80and160hr5ghpo=0x0 +sb40and80hr5ghpo=0x0 +sb20in40lrpo=0x0 +sb20in80and160lr5glpo=0x0 +sb40and80lr5glpo=0x0 +sb20in80and160lr5gmpo=0x0 +sb40and80lr5gmpo=0x0 +sb20in80and160lr5ghpo=0x0 +sb40and80lr5ghpo=0x0 +dot11agduphrpo=0x0 +dot11agduplrpo=0x0 +phycal_tempdelta=25 +cckdigfilttype=2 +pacalidx2g=65 +dacrate2g=160 +swctrlmap_5g=0x00000008,0x00000010,0x00000008,0x000000,0x038 +swctrlmap_2g=0x00000001,0x00000002,0x00000001,0x040002,0x0ff +swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000 +swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000 +rssicorrnorm_c0=3,3 +rssicorrnorm5g_c0=2,3,4,2,3,3,0,1,2,0,1,2 +muxenab=0x10 diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile index 3729ee65f..b79ccf647 100644 --- a/package/firmware/ipq-wifi/Makefile +++ b/package/firmware/ipq-wifi/Makefile @@ -2,13 +2,13 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/version.mk PKG_NAME:=ipq-wifi -PKG_RELEASE:=2 +PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware/qca-wireless.git -PKG_SOURCE_DATE:=2023-06-03 -PKG_SOURCE_VERSION:=cd9c30ca47b8e5388b770c523a7f6b8b969e2f92 -PKG_MIRROR_HASH:=45e623fcc512b514ade0f22e217275536aa8de4afba7dfdb11696482b8fa71a2 +PKG_SOURCE_DATE:=2024-04-16 +PKG_SOURCE_VERSION:=1d51799e6768a304da7840b8346e7487efd77f49 +PKG_MIRROR_HASH:=9cf0917532283c1a1708643022a5ed1ec4af6bb9ebaff57fc2f0f2c229f2469e PKG_FLAGS:=nonshared @@ -28,21 +28,38 @@ endef # ALLWIFIBOARDS:= \ + arcadyan_aw1000 \ buffalo_wxr-5950ax12 \ compex_wpq873 \ dynalink_dl-wrx36 \ edgecore_eap102 \ edimax_cax1800 \ + glinet_gl-ax1800 \ + glinet_gl-axt1800 \ + jdcloud_ax1800pro \ + jdcloud_ax6600 \ + linksys_mr7350 \ + linksys_mx4200 \ + linksys_mx5300 \ + netgear_lbr20 \ netgear_rax120v2 \ + netgear_wax214 \ netgear_wax218 \ - p2w_r619ac \ + netgear_wax620 \ + netgear_wax630 \ prpl_haze \ + qihoo_360v6 \ qnap_301w \ + redmi_ax5-jdcloud \ redmi_ax6 \ wallys_dr40x9 \ xiaomi_ax3600 \ xiaomi_ax9000 \ - zte_mf289f \ + xiaomi_rm1800 \ + yuncore_ax880 \ + yuncore_fap650 \ + zte_mf269 \ + zte_mf287 \ zte_mf287plus \ zyxel_nbg7815 @@ -52,7 +69,7 @@ define Package/ipq-wifi-default SUBMENU:=ath10k Board-Specific Overrides SECTION:=firmware CATEGORY:=Firmware - DEPENDS:=@(TARGET_ipq40xx||TARGET_ipq806x||TARGET_ipq807x) + DEPENDS:=@(TARGET_ipq40xx||TARGET_ipq806x||TARGET_qualcommax) TITLE:=Custom Board endef @@ -77,12 +94,14 @@ define ipq-wifi-install-one $(call ipq-wifi-install-one-to,$(1),$(2),QCA9984/hw1.0),\ $(if $(filter $(suffix $(1)),.QCA99X0 .qca99x0),\ $(call ipq-wifi-install-one-to,$(1),$(2),QCA99X0/hw2.0),\ + $(if $(filter $(suffix $(1)),.IPQ6018 .ipq6018),\ + $(call ipq-wifi-install-ath11-one-to,$(1),$(2),IPQ6018/hw1.0),\ $(if $(filter $(suffix $(1)),.IPQ8074 .ipq8074),\ $(call ipq-wifi-install-ath11-one-to,$(1),$(2),IPQ8074/hw2.0),\ $(if $(filter $(suffix $(1)),.QCN9074 .qcn9074),\ $(call ipq-wifi-install-ath11-one-to,$(1),$(2),QCN9074/hw1.0),\ $(error Unrecognized board-file suffix '$(suffix $(1))' for '$(1)')\ - ))))))) + )))))))) endef # Blank line required at end of above define due to foreach context @@ -118,21 +137,38 @@ endef # Place files in this directory as board-. # Add $(eval $(call generate-ipq-wifi-package,,)) +$(eval $(call generate-ipq-wifi-package,arcadyan_aw1000,Arcadyan AW1000)) $(eval $(call generate-ipq-wifi-package,buffalo_wxr-5950ax12,Buffalo WXR-5950AX12)) $(eval $(call generate-ipq-wifi-package,compex_wpq873,Compex WPQ-873)) $(eval $(call generate-ipq-wifi-package,dynalink_dl-wrx36,Dynalink DL-WRX36)) $(eval $(call generate-ipq-wifi-package,edgecore_eap102,Edgecore EAP102)) $(eval $(call generate-ipq-wifi-package,edimax_cax1800,Edimax CAX1800)) +$(eval $(call generate-ipq-wifi-package,glinet_gl-ax1800,GL.iNet GL-AX1800)) +$(eval $(call generate-ipq-wifi-package,glinet_gl-axt1800,GL.iNet GL-AXT1800)) +$(eval $(call generate-ipq-wifi-package,jdcloud_ax1800pro,JDCloud AX1800 Pro)) +$(eval $(call generate-ipq-wifi-package,jdcloud_ax6600,JDCloud AX6600)) +$(eval $(call generate-ipq-wifi-package,linksys_mr7350,Linksys MR7350)) +$(eval $(call generate-ipq-wifi-package,linksys_mx4200,Linksys MX4200)) +$(eval $(call generate-ipq-wifi-package,linksys_mx5300,Linksys MX5300)) +$(eval $(call generate-ipq-wifi-package,netgear_lbr20,Netgear LBR20)) $(eval $(call generate-ipq-wifi-package,netgear_rax120v2,Netgear RAX120v2)) +$(eval $(call generate-ipq-wifi-package,netgear_wax214,Netgear WAX214)) $(eval $(call generate-ipq-wifi-package,netgear_wax218,Netgear WAX218)) -$(eval $(call generate-ipq-wifi-package,p2w_r619ac,P&W R619AC)) +$(eval $(call generate-ipq-wifi-package,netgear_wax620,Netgear WAX620)) +$(eval $(call generate-ipq-wifi-package,netgear_wax630,Netgear WAX630)) +$(eval $(call generate-ipq-wifi-package,qihoo_360v6,Qihoo 360V6)) $(eval $(call generate-ipq-wifi-package,qnap_301w,QNAP 301w)) $(eval $(call generate-ipq-wifi-package,prpl_haze,prpl Haze)) +$(eval $(call generate-ipq-wifi-package,redmi_ax5-jdcloud,Redmi AX5 JDCloud)) $(eval $(call generate-ipq-wifi-package,redmi_ax6,Redmi AX6)) $(eval $(call generate-ipq-wifi-package,wallys_dr40x9,Wallys DR40X9)) $(eval $(call generate-ipq-wifi-package,xiaomi_ax3600,Xiaomi AX3600)) $(eval $(call generate-ipq-wifi-package,xiaomi_ax9000,Xiaomi AX9000)) -$(eval $(call generate-ipq-wifi-package,zte_mf289f,ZTE MF289F)) +$(eval $(call generate-ipq-wifi-package,xiaomi_rm1800,Xiaomi RM1800)) +$(eval $(call generate-ipq-wifi-package,yuncore_ax880,Yuncore AX880)) +$(eval $(call generate-ipq-wifi-package,yuncore_fap650,Yuncore FAP650)) +$(eval $(call generate-ipq-wifi-package,zte_mf269,ZTE MF269)) +$(eval $(call generate-ipq-wifi-package,zte_mf287,ZTE MF287)) $(eval $(call generate-ipq-wifi-package,zte_mf287plus,ZTE MF287Plus)) $(eval $(call generate-ipq-wifi-package,zyxel_nbg7815,Zyxel NBG7815)) diff --git a/package/firmware/ipq-wifi/board-8dev_habanero-dvk.qca4019 b/package/firmware/ipq-wifi/board-8dev_habanero-dvk.qca4019 deleted file mode 100644 index 9048239cf9f59bbc4df70251b73adfe93382ae62..0000000000000000000000000000000000000000 GIT binary patch literal 0 HcmV?d00001 literal 24324 zcmeHPT~HHQ7H$v(T^#9r^?ZseRolU-oSuOzqUxmM`n9bGRSp<_L3270F3Tp{yvUL=H7KH$#B5iTDwMvO%di)w;L3p+->C ztQOWbsI@|M-QFZ?tEQz|SBE!~(*$kRI(7B&lY1p~^=<0f`c|Q$x~BSgy{@I%56r;= z^RW`27W?@@+s;x_!|}Njq~K5mK|6y$4JZ_XcBNQrz_}nkKLwu(f>Kga{`J#OP!@GN z^!o2tvh8IX)x{vsM1Nb^ZGg}O{S0X3Irr_|OQ%ACH~7m=xQ%vxxz2WJ@q!l`iMe(z zP050Y*OI`-P$`ZQ*Loj&p%?eeu`of~u{dh;g#Q4LC;c`;A8r3EzHDsdZ1KyfxxPM) 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+PKG_HASH:=bf0f239dc0801e9d6bf5d5fb3e2f549575632cf4688f4348184199cb02c2bcd7 PKG_MAINTAINER:=Felix Fietkau diff --git a/package/firmware/linux-firmware/airoha.mk b/package/firmware/linux-firmware/airoha.mk new file mode 100644 index 000000000..627541ba9 --- /dev/null +++ b/package/firmware/linux-firmware/airoha.mk @@ -0,0 +1,8 @@ +Package/en8811h-firmware = $(call Package/firmware-default,Airoha EN8811H PHY firmware) +define Package/en8811h-firmware/install + $(INSTALL_DIR) $(1)/lib/firmware/airoha + $(CP) \ + $(PKG_BUILD_DIR)/airoha/*.bin \ + $(1)/lib/firmware/airoha +endef +$(eval $(call BuildPackage,en8811h-firmware)) diff --git a/package/firmware/linux-firmware/brcm_firmware/ap6236/brcmfmac43430-sdio.bin b/package/firmware/linux-firmware/brcm_firmware/ap6236/brcmfmac43430-sdio.bin old mode 100644 new mode 100755 diff --git a/package/firmware/linux-firmware/brcm_firmware/ap6236/brcmfmac43430-sdio.txt b/package/firmware/linux-firmware/brcm_firmware/ap6236/brcmfmac43430-sdio.txt old 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HcmV?d00001 diff --git a/package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c b/package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c index 45a20f1c3..c9c4fc5d6 100644 --- a/package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c +++ b/package/kernel/gpio-button-hotplug/src/gpio-button-hotplug.c @@ -540,7 +540,7 @@ static int gpio_keys_button_probe(struct platform_device *pdev, #if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 3, 0) bdata->gpiod = devm_fwnode_gpiod_get(dev, - of_fwnode_handle(child), "gpios", GPIOD_IN, + of_fwnode_handle(child), NULL, GPIOD_IN, desc); #else bdata->gpiod = devm_gpiod_get_from_of_node(dev, diff --git a/package/kernel/linux/modules/block.mk b/package/kernel/linux/modules/block.mk index ff3a7df22..7773624a5 100644 --- a/package/kernel/linux/modules/block.mk +++ b/package/kernel/linux/modules/block.mk @@ -89,6 +89,18 @@ endef $(eval $(call KernelPackage,ata-artop)) +define KernelPackage/ata-ahci-dwc + TITLE:=Synopsys DWC AHCI SATA + KCONFIG:= \ + CONFIG_AHCI_DWC \ + CONFIG_SATA_HOST=y + FILES:=$(LINUX_DIR)/drivers/ata/ahci_dwc.ko + DEPENDS:=+kmod-ata-ahci-platform + AUTOLOAD:=$(call AutoLoad,41,ahci_dwc,1) + $(call AddDepends/ata,@TARGET_rockchip) +endef + +$(eval $(call KernelPackage,ata-ahci-dwc)) define KernelPackage/ata-nvidia-sata TITLE:=Nvidia Serial ATA support diff --git a/package/kernel/linux/modules/video.mk b/package/kernel/linux/modules/video.mk index 9704bb7ee..d6412ffad 100644 --- a/package/kernel/linux/modules/video.mk +++ b/package/kernel/linux/modules/video.mk @@ -79,6 +79,7 @@ define KernelPackage/fb DEPENDS:=@DISPLAY_SUPPORT KCONFIG:= \ CONFIG_FB \ + CONFIG_FB_DEVICE=y \ CONFIG_FB_MXS=n \ CONFIG_FB_SM750=n \ CONFIG_FRAMEBUFFER_CONSOLE=y \ diff --git a/package/kernel/mac80211/Makefile b/package/kernel/mac80211/Makefile index a7472ee77..e2d4aeff5 100644 --- a/package/kernel/mac80211/Makefile +++ b/package/kernel/mac80211/Makefile @@ -1,5 +1,5 @@ # -# Copyright (C) 2007-2015 OpenWrt.org +# Copyright (C) 2007-2023 OpenWrt.org # # This is free software, licensed under the GNU General Public License v2. # See /LICENSE for more information. @@ -11,7 +11,7 @@ include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=mac80211 PKG_VERSION:=6.1.24 -PKG_RELEASE:=4 +PKG_RELEASE:=3 # PKG_SOURCE_URL:=@KERNEL/linux/kernel/projects/backports/stable/v5.15.58/ PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources/ PKG_HASH:=5d39aca7e34c33cb9b3e366117b2e86841b7bdd37933679d6b1e61be6b150648 @@ -180,7 +180,7 @@ endef define KernelPackage/rsi91x $(call KernelPackage/mac80211/Default) TITLE:=Redpine Signals Inc 91x WLAN driver support - DEPENDS+= +kmod-mac80211 +rs9113-firmware + DEPENDS+= +kmod-mac80211 +rs9113-firmware +@DRIVER_11N_SUPPORT FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/rsi/rsi_91x.ko endef @@ -204,7 +204,7 @@ endef define KernelPackage/wlcore $(call KernelPackage/mac80211/Default) TITLE:=TI common driver part - DEPENDS+= +kmod-mmc +kmod-mac80211 + DEPENDS+= +kmod-mmc +kmod-mac80211 +@DRIVER_11N_SUPPORT FILES:= \ $(PKG_BUILD_DIR)/drivers/net/wireless/ti/wlcore/wlcore.ko \ $(PKG_BUILD_DIR)/drivers/net/wireless/ti/wlcore/wlcore_sdio.ko diff --git a/package/kernel/mac80211/ath.mk b/package/kernel/mac80211/ath.mk index c75630a8b..6f5d17cef 100644 --- a/package/kernel/mac80211/ath.mk +++ b/package/kernel/mac80211/ath.mk @@ -1,6 +1,7 @@ PKG_DRIVERS += \ - ath ath5k ath6kl ath6kl-sdio ath6kl-usb ath9k ath9k-common ath9k-htc ath10k ath10k-smallbuffers \ - ath11k ath11k-ahb ath11k-pci carl9170 owl-loader ar5523 wil6210 + ath ath5k ath6kl ath6kl-sdio ath6kl-usb ath9k ath9k-common ath9k-htc \ + ath10k ath10k-pci ath10k-sdio ath10k-smallbuffers ath11k ath11k-ahb \ + ath11k-pci ar5523 carl9170 owl-loader wil6210 PKG_CONFIG_DEPENDS += \ CONFIG_PACKAGE_ATH_DEBUG \ @@ -58,8 +59,11 @@ config-$(CONFIG_ATH10K_THERMAL) += ATH10K_THERMAL config-$(CONFIG_ATH11K_THERMAL) += ATH11K_THERMAL config-$(call config_package,ath9k-htc) += ATH9K_HTC -config-$(call config_package,ath10k) += ATH10K ATH10K_PCI +config-$(call config_package,ath10k) += ATH10K +config-$(call config_package,ath10k-pci) += ATH10K_PCI +config-$(call config_package,ath10k-sdio) += ATH10K_SDIO config-$(call config_package,ath10k-smallbuffers) += ATH10K ATH10K_PCI ATH10K_SMALLBUFFERS + config-$(call config_package,ath11k) += ATH11K config-$(call config_package,ath11k-ahb) += ATH11K_AHB config-$(call config_package,ath11k-pci) += ATH11K_PCI @@ -98,7 +102,7 @@ define KernelPackage/ath/config bool "Atheros wireless debugging" help Say Y, if you want to debug atheros wireless drivers. - Only ath9k & ath10k make use of this. + Only ath9k & ath10k & ath11k make use of this. config PACKAGE_ATH_DFS bool "Enable DFS support" @@ -161,7 +165,7 @@ define KernelPackage/ath6kl TITLE:=Atheros FullMAC wireless devices (common code for ath6kl_sdio and ath6kl_usb) URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath6kl HIDDEN:=1 - DEPENDS+= +kmod-ath + DEPENDS+= +kmod-ath +@DRIVER_11N_SUPPORT FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath6kl/ath6kl_core.ko endef @@ -262,20 +266,17 @@ define KernelPackage/ath10k $(call KernelPackage/mac80211/Default) TITLE:=Atheros 802.11ac wireless cards support URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath10k - DEPENDS+= @PCI_SUPPORT +kmod-ath +@DRIVER_11AC_SUPPORT \ + DEPENDS+= +kmod-ath +@DRIVER_11N_SUPPORT +@DRIVER_11AC_SUPPORT \ +ATH10K_THERMAL:kmod-hwmon-core +ATH10K_THERMAL:kmod-thermal FILES:= \ - $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath10k/ath10k_core.ko \ - $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath10k/ath10k_pci.ko - AUTOLOAD:=$(call AutoProbe,ath10k_core ath10k_pci) + $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath10k/ath10k_core.ko + AUTOLOAD:=$(call AutoProbe,ath10k_core) MODPARAMS.ath10k_core:=frame_mode=2 - VARIANT:=regular endef define KernelPackage/ath10k/description This module adds support for wireless adapters based on -Atheros IEEE 802.11ac family of chipsets. For now only -PCI is supported. +Atheros IEEE 802.11ac family of chipsets. endef define KernelPackage/ath10k/config @@ -287,12 +288,42 @@ define KernelPackage/ath10k/config config ATH10K_THERMAL bool "Enable thermal sensors and throttling support" + default y depends on PACKAGE_kmod-ath10k || PACKAGE_kmod-ath10k-smallbuffers endef +define KernelPackage/ath10k-pci + $(call KernelPackage/mac80211/Default) + TITLE:=Atheros 802.11ac PCIE wireless cards support + URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath10k + DEPENDS+= @PCI_SUPPORT kmod-ath10k + FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath10k/ath10k_pci.ko + AUTOLOAD:=$(call AutoProbe,ath10k_pci) + VARIANT:=regular +endef + +define KernelPackage/ath10k-pci/description +This module adds support for wireless adapters based on +Atheros IEEE 802.11ac family of chipsets with PCIE bus. +endef + +define KernelPackage/ath10k-sdio + $(call KernelPackage/mac80211/Default) + TITLE:=Atheros 802.11ac SDIO wireless cards support + URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath10k + DEPENDS+= kmod-ath10k +kmod-mmc + FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath10k/ath10k_sdio.ko + AUTOLOAD:=$(call AutoProbe,ath10k_sdio) +endef + +define KernelPackage/ath10k-sdio/description +This module adds support for wireless adapters based on +Atheros IEEE 802.11ac family of chipsets with SDIO bus. +endef + define KernelPackage/ath10k-smallbuffers - $(call KernelPackage/ath10k) + $(call KernelPackage/ath10k-pci) TITLE+= (small buffers for low-RAM devices) VARIANT:=smallbuffers endef @@ -305,6 +336,7 @@ define KernelPackage/ath11k +kmod-crypto-michael-mic +ATH11K_THERMAL:kmod-hwmon-core +ATH11K_THERMAL:kmod-thermal FILES:=$(PKG_BUILD_DIR)/drivers/soc/qcom/qmi_helpers.ko \ $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath11k/ath11k.ko + MODPARAMS.ath11k:=frame_mode=2 endef define KernelPackage/ath11k/description diff --git a/package/kernel/mac80211/broadcom.mk b/package/kernel/mac80211/broadcom.mk index cf80ad2d3..a36f92477 100644 --- a/package/kernel/mac80211/broadcom.mk +++ b/package/kernel/mac80211/broadcom.mk @@ -245,11 +245,11 @@ config PACKAGE_B43_USE_BCMA This allows choosing buses that b43 should support. config PACKAGE_B43_BUSES_BCMA_AND_SSB - depends on !TARGET_bcm47xx_legacy && !TARGET_bcm47xx_mips74k && !TARGET_bcm53xx && !TARGET_bmips + depends on !TARGET_bcm47xx_legacy && !TARGET_bcm47xx_mips74k && !TARGET_bcm53xx bool "BCMA and SSB" config PACKAGE_B43_BUSES_BCMA - depends on !TARGET_bcm47xx_legacy && !TARGET_bmips_bcm6358 && !TARGET_bmips_bcm6368 + depends on !TARGET_bcm47xx_legacy bool "BCMA only" config PACKAGE_B43_BUSES_SSB @@ -430,8 +430,9 @@ define KernelPackage/brcmfmac/config config BRCMFMAC_SDIO bool "Enable SDIO bus interface support" default y if TARGET_bcm27xx - default y if TARGET_imx_cortexa7 default y if TARGET_sunxi + default y if TARGET_rockchip + default y if TARGET_amlogic default n help Enable support for cards attached to an SDIO bus. diff --git a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh index 5aaba9af2..469d4264a 100644 --- a/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh +++ b/package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh @@ -140,8 +140,8 @@ mac80211_hostapd_setup_base() { [ -n "$acs_exclude_dfs" ] && [ "$acs_exclude_dfs" -gt 0 ] && append base_cfg "acs_exclude_dfs=1" "$N" - json_get_vars noscan ht_coex min_tx_power:0 tx_burst - json_get_values ht_capab_list ht_capab + json_get_vars noscan ht_coex vendor_vht min_tx_power:0 + json_get_values ht_capab_list ht_capab tx_burst json_get_values channel_list channels [ "$auto_channel" = 0 ] && [ -z "$channel_list" ] && \ @@ -293,7 +293,7 @@ mac80211_hostapd_setup_base() { } [ "$hwmode" = "a" ] || enable_ac=0 - if [ "$enable_ac" != "0" ]; then + if [ "$enable_ac" != "0" -o "$vendor_vht" = "1" ]; then json_get_vars \ rxldpc:1 \ short_gi_80:1 \ @@ -581,77 +581,15 @@ mac80211_generate_mac() { $(( (0x$6 + $id) % 0x100 )) } -get_board_phy_name() ( - local path="$1" - local fallback_phy="" - - __check_phy() { - local val="$1" - local key="$2" - local ref_path="$3" - - json_select "$key" - json_get_values path - json_select .. - - [ "${ref_path%+*}" = "$path" ] && fallback_phy=$key - [ "$ref_path" = "$path" ] || return 0 - - echo "$key" - exit - } - - json_load_file /etc/board.json - json_for_each_item __check_phy wlan "$path" - [ -n "$fallback_phy" ] && echo "${fallback_phy}.${path##*+}" -) - -rename_board_phy_by_path() { - local path="$1" - - local new_phy="$(get_board_phy_name "$path")" - [ -z "$new_phy" -o "$new_phy" = "$phy" ] && return - - iw "$phy" set name "$new_phy" && phy="$new_phy" -} - -rename_board_phy_by_name() ( - local phy="$1" - local suffix="${phy##*.}" - [ "$suffix" = "$phy" ] && suffix= - - json_load_file /etc/board.json - json_select wlan - json_select "${phy%.*}" || return 0 - json_get_values path - - prev_phy="$(iwinfo nl80211 phyname "path=$path${suffix:++$suffix}")" - [ -n "$prev_phy" ] || return 0 - - [ "$prev_phy" = "$phy" ] && return 0 - - iw "$prev_phy" set name "$phy" -) - find_phy() { - [ -n "$phy" ] && { - rename_board_phy_by_name "$phy" - [ -d /sys/class/ieee80211/$phy ] && return 0 - } + [ -n "$phy" -a -d /sys/class/ieee80211/$phy ] && return 0 [ -n "$path" ] && { phy="$(iwinfo nl80211 phyname "path=$path")" - [ -n "$phy" ] && { - rename_board_phy_by_path "$path" - return 0 - } + [ -n "$phy" ] && return 0 } [ -n "$macaddr" ] && { for phy in $(ls /sys/class/ieee80211 2>/dev/null); do - grep -i -q "$macaddr" "/sys/class/ieee80211/${phy}/macaddress" && { - path="$(iwinfo nl80211 path "$phy")" - rename_board_phy_by_path "$path" - return 0 - } + grep -i -q "$macaddr" "/sys/class/ieee80211/${phy}/macaddress" && return 0 done } return 1 @@ -729,28 +667,13 @@ mac80211_iw_interface_add() { return $rc } -mac80211_set_ifname() { - local phy="$1" - local prefix="$2" - eval "ifname=\"$phy-$prefix\${idx_$prefix:-0}\"; idx_$prefix=\$((\${idx_$prefix:-0 } + 1))" -} - mac80211_prepare_vif() { json_select config json_get_vars ifname mode ssid wds powersave macaddr enable wpa_psk_file vlan_file - [ -n "$ifname" ] || { - local prefix; - - case "$mode" in - ap|sta|mesh) prefix=$mode;; - adhoc) prefix=ibss;; - monitor) prefix=mon;; - esac - - mac80211_set_ifname "$phy" "$prefix" - } + [ -n "$ifname" ] || ifname="wlan${phy#phy}${if_idx:+-$if_idx}" + if_idx=$((${if_idx:-0} + 1)) set_default wds 0 set_default powersave 0 @@ -1033,7 +956,7 @@ mac80211_setup_vif() { mesh) wireless_vif_parse_encryption [ -z "$htmode" ] && htmode="NOHT"; - if wpa_supplicant -vmesh || [ "$wpa" -gt 0 -o "$auto_channel" -gt 0 ] || chan_is_dfs "$phy" "$channel"; then + if [ "$wpa" -gt 0 -o "$auto_channel" -gt 0 ] || chan_is_dfs "$phy" "$channel"; then mac80211_setup_supplicant $vif_enable || failed=1 else mac80211_setup_mesh $vif_enable diff --git a/package/kernel/mac80211/files/lib/wifi/mac80211.sh b/package/kernel/mac80211/files/lib/wifi/mac80211.sh index 7ed914b6a..4c5981850 100644 --- a/package/kernel/mac80211/files/lib/wifi/mac80211.sh +++ b/package/kernel/mac80211/files/lib/wifi/mac80211.sh @@ -2,48 +2,60 @@ append DRIVERS "mac80211" -check_mac80211_device() { - local device="$1" - local path="$2" - local macaddr="$3" - - [ -n "$found" ] && return 0 - - phy_path= - config_get phy "$device" phy - json_select wlan - [ -n "$phy" ] && case "$phy" in - phy*) - [ -d /sys/class/ieee80211/$phy ] && \ - phy_path="$(iwinfo nl80211 path "$dev")" - ;; - *) - if json_is_a "$phy" object; then - json_select "$phy" - json_get_var phy_path path - json_select .. - elif json_is_a "${phy%.*}" object; then - json_select "${phy%.*}" - json_get_var phy_path path - json_select .. - phy_path="$phy_path+${phy##*.}" - fi - ;; - esac - json_select .. - [ -n "$phy_path" ] || config_get phy_path "$device" path - [ -n "$path" -a "$phy_path" = "$path" ] && { - found=1 - return 0 +lookup_phy() { + [ -n "$phy" ] && { + [ -d /sys/class/ieee80211/$phy ] && return } - config_get dev_macaddr "$device" macaddr + local devpath + config_get devpath "$device" path + [ -n "$devpath" ] && { + phy="$(iwinfo nl80211 phyname "path=$devpath")" + [ -n "$phy" ] && return + } - [ -n "$macaddr" -a "$dev_macaddr" = "$macaddr" ] && found=1 + local macaddr="$(config_get "$device" macaddr | tr 'A-Z' 'a-z')" + [ -n "$macaddr" ] && { + for _phy in /sys/class/ieee80211/*; do + [ -e "$_phy" ] || continue + + [ "$macaddr" = "$(cat ${_phy}/macaddress)" ] || continue + phy="${_phy##*/}" + return + done + } + phy= + return +} + +find_mac80211_phy() { + local device="$1" + + config_get phy "$device" phy + lookup_phy + [ -n "$phy" -a -d "/sys/class/ieee80211/$phy" ] || { + echo "PHY for wifi device $1 not found" + return 1 + } + config_set "$device" phy "$phy" + + config_get macaddr "$device" macaddr + [ -z "$macaddr" ] && { + config_set "$device" macaddr "$(cat /sys/class/ieee80211/${phy}/macaddress)" + } return 0 } +check_mac80211_device() { + config_get phy "$1" phy + [ -z "$phy" ] && { + find_mac80211_phy "$1" >/dev/null || return 0 + config_get phy "$1" phy + } + [ "$phy" = "$dev" ] && found=1 +} + __get_band_defaults() { local phy="$1" @@ -123,41 +135,24 @@ get_band_defaults() { done } -check_devidx() { - case "$1" in - radio[0-9]*) - local idx="${1#radio}" - [ "$devidx" -ge "${1#radio}" ] && devidx=$((idx + 1)) - ;; - esac -} - -check_board_phy() { - local name="$2" - - json_select "$name" - json_get_var phy_path path - json_select .. - - if [ "$path" = "$phy_path" ]; then - board_dev="$name" - elif [ "${path%+*}" = "$phy_path" ]; then - fallback_board_dev="$name.${path#*+}" - fi -} - detect_mac80211() { devidx=0 config_load wireless - config_foreach check_devidx wifi-device - - json_load_file /etc/board.json + while :; do + config_get type "radio$devidx" type + [ -n "$type" ] || break + devidx=$(($devidx + 1)) + done for _dev in /sys/class/ieee80211/*; do [ -e "$_dev" ] || continue dev="${_dev##*/}" + found=0 + config_foreach check_mac80211_device wifi-device + [ "$found" -gt 0 ] && continue + mode_band="" channel="" htmode="" @@ -166,53 +161,31 @@ detect_mac80211() { get_band_defaults "$dev" path="$(iwinfo nl80211 path "$dev")" - macaddr="$(cat /sys/class/ieee80211/${dev}/macaddress)" - - # work around phy rename related race condition - [ -n "$path" -o -n "$macaddr" ] || continue - - board_dev= - fallback_board_dev= - json_for_each_item check_board_phy wlan - [ -n "$board_dev" ] || board_dev="$fallback_board_dev" - [ -n "$board_dev" ] && dev="$board_dev" - - found= - config_foreach check_mac80211_device wifi-device "$path" "$macaddr" - [ -n "$found" ] && continue - - name="radio${devidx}" - devidx=$(($devidx + 1)) - case "$dev" in - phy*) - if [ -n "$path" ]; then - dev_id="set wireless.${name}.path='$path'" - else - dev_id="set wireless.${name}.macaddr='$macaddr'" - fi - ;; - *) - dev_id="set wireless.${name}.phy='$dev'" - ;; - esac + if [ -n "$path" ]; then + dev_id="set wireless.radio${devidx}.path='$path'" + else + dev_id="set wireless.radio${devidx}.macaddr=$(cat /sys/class/ieee80211/${dev}/macaddress)" + fi uci -q batch <<-EOF - set wireless.${name}=wifi-device - set wireless.${name}.type=mac80211 + set wireless.radio${devidx}=wifi-device + set wireless.radio${devidx}.type=mac80211 ${dev_id} - set wireless.${name}.channel=${channel} - set wireless.${name}.band=${mode_band} - set wireless.${name}.htmode=$htmode - set wireless.${name}.disabled=0 - set wireless.${name}.country=US + set wireless.radio${devidx}.channel=${channel} + set wireless.radio${devidx}.band=${mode_band} + set wireless.radio${devidx}.htmode=$htmode + set wireless.radio${devidx}.disabled=0 + set wireless.radio${devidx}.country=US - set wireless.default_${name}=wifi-iface - set wireless.default_${name}.device=${name} - set wireless.default_${name}.network=lan - set wireless.default_${name}.mode=ap - set wireless.default_${name}.ssid=OpenWrt - set wireless.default_${name}.encryption=none + set wireless.default_radio${devidx}=wifi-iface + set wireless.default_radio${devidx}.device=radio${devidx} + set wireless.default_radio${devidx}.network=lan + set wireless.default_radio${devidx}.mode=ap + set wireless.default_radio${devidx}.ssid=OpenWrt + set wireless.default_radio${devidx}.encryption=none EOF uci -q commit wireless + + devidx=$(($devidx + 1)) done } diff --git a/package/kernel/mac80211/patches/ath10k/911-ath10k-disable-caldata-prefetch-for-sdio-bus.patch b/package/kernel/mac80211/patches/ath10k/911-ath10k-disable-caldata-prefetch-for-sdio-bus.patch new file mode 100644 index 000000000..8ca8f3b55 --- /dev/null +++ b/package/kernel/mac80211/patches/ath10k/911-ath10k-disable-caldata-prefetch-for-sdio-bus.patch @@ -0,0 +1,12 @@ +--- a/drivers/net/wireless/ath/ath10k/debug.c ++++ b/drivers/net/wireless/ath/ath10k/debug.c +@@ -1260,6 +1260,9 @@ static int ath10k_debug_cal_data_fetch(s + if (ar->hw_params.cal_data_len == 0) + return -EOPNOTSUPP; + ++ if (ar->hif.bus == ATH10K_BUS_SDIO) ++ return -EINVAL; ++ + hi_addr = host_interest_item_address(HI_ITEM(hi_board_data)); + + ret = ath10k_hif_diag_read(ar, hi_addr, &addr, sizeof(addr)); diff --git a/package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch b/package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch index 7a38cf3e4..f5e702195 100644 --- a/package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch +++ b/package/kernel/mac80211/patches/ath10k/921-ath10k_init_devices_synchronously.patch @@ -14,7 +14,7 @@ Signed-off-by: Sven Eckelmann --- a/drivers/net/wireless/ath/ath10k/core.c +++ b/drivers/net/wireless/ath/ath10k/core.c -@@ -3516,6 +3516,16 @@ int ath10k_core_register(struct ath10k * +@@ -3516,6 +3516,17 @@ int ath10k_core_register(struct ath10k * queue_work(ar->workqueue, &ar->register_work); @@ -26,7 +26,8 @@ Signed-off-by: Sven Eckelmann + * Forcing the work to be done immediately works around this problem + * but may also delay the boot when firmware images cannot be found. + */ -+ flush_workqueue(ar->workqueue); ++ if (ar->hif.bus != ATH10K_BUS_SDIO) ++ flush_workqueue(ar->workqueue); + return 0; } diff --git a/package/kernel/mac80211/patches/ath10k/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch b/package/kernel/mac80211/patches/ath10k/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch index 1c1630c05..fd5b44811 100644 --- a/package/kernel/mac80211/patches/ath10k/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch +++ b/package/kernel/mac80211/patches/ath10k/974-ath10k_add-LED-and-GPIO-controlling-support-for-various-chipsets.patch @@ -202,7 +202,7 @@ v13: err_spectral_destroy: ath10k_spectral_destroy(ar); err_debug_destroy: -@@ -3537,6 +3556,8 @@ void ath10k_core_unregister(struct ath10 +@@ -3538,6 +3557,8 @@ void ath10k_core_unregister(struct ath10 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) return; diff --git a/package/kernel/mac80211/patches/ath10k/985-ath10k-allow-vht-on-2g.patch b/package/kernel/mac80211/patches/ath10k/985-ath10k-allow-vht-on-2g.patch new file mode 100644 index 000000000..3fb26bff9 --- /dev/null +++ b/package/kernel/mac80211/patches/ath10k/985-ath10k-allow-vht-on-2g.patch @@ -0,0 +1,10 @@ +--- a/drivers/net/wireless/ath/ath10k/mac.c ++++ b/drivers/net/wireless/ath/ath10k/mac.c +@@ -5034,6 +5034,7 @@ static void ath10k_mac_setup_ht_vht_cap( + if (ar->phy_capability & WHAL_WLAN_11G_CAPABILITY) { + band = &ar->mac.sbands[NL80211_BAND_2GHZ]; + band->ht_cap = ht_cap; ++ band->vht_cap = vht_cap; + } + if (ar->phy_capability & WHAL_WLAN_11A_CAPABILITY) { + band = &ar->mac.sbands[NL80211_BAND_5GHZ]; diff --git a/package/kernel/mac80211/patches/ath10k/988-ath10k-always-use-mac80211-loss-detection.patch b/package/kernel/mac80211/patches/ath10k/988-ath10k-always-use-mac80211-loss-detection.patch new file mode 100644 index 000000000..f4b1ded15 --- /dev/null +++ b/package/kernel/mac80211/patches/ath10k/988-ath10k-always-use-mac80211-loss-detection.patch @@ -0,0 +1,28 @@ +From f7d6edafe4358e3880a26775cfde4cd5c71ba063 Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Wed, 5 Jul 2023 01:30:29 +0200 +Subject: [PATCH] ath10k: always use mac80211 loss detection + +ath10k does not report excessive loss in case of broken block-ack +sessions. The loss is communicated to the host-os, but ath10k does not +trigger a low-ack events by itself. + +The mac80211 framework for loss detection however detects this +circumstance well in case of ath10k. So use it regardless of ath10k's +own loss detection mechanism. + +Signed-off-by: David Bauer +--- + drivers/net/wireless/ath/ath10k/mac.c | 1 - + 1 file changed, 1 deletion(-) + +--- a/drivers/net/wireless/ath/ath10k/mac.c ++++ b/drivers/net/wireless/ath/ath10k/mac.c +@@ -10081,7 +10081,6 @@ int ath10k_mac_register(struct ath10k *a + ieee80211_hw_set(ar->hw, CHANCTX_STA_CSA); + ieee80211_hw_set(ar->hw, QUEUE_CONTROL); + ieee80211_hw_set(ar->hw, SUPPORTS_TX_FRAG); +- ieee80211_hw_set(ar->hw, REPORTS_LOW_ACK); + + if (!test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) + ieee80211_hw_set(ar->hw, SW_CRYPTO_CONTROL); diff --git a/package/kernel/mac80211/patches/ath11k/0085-wifi-ath11k-fix-memory-leak-in-WMI-firmware-stats.patch b/package/kernel/mac80211/patches/ath11k/0085-wifi-ath11k-fix-memory-leak-in-WMI-firmware-stats.patch new file mode 100644 index 000000000..dde30b962 --- /dev/null +++ b/package/kernel/mac80211/patches/ath11k/0085-wifi-ath11k-fix-memory-leak-in-WMI-firmware-stats.patch @@ -0,0 +1,51 @@ +From 6aafa1c2d3e3fea2ebe84c018003f2a91722e607 Mon Sep 17 00:00:00 2001 +From: P Praneesh +Date: Tue, 6 Jun 2023 14:41:28 +0530 +Subject: [PATCH] wifi: ath11k: fix memory leak in WMI firmware stats + +Memory allocated for firmware pdev, vdev and beacon statistics +are not released during rmmod. + +Fix it by calling ath11k_fw_stats_free() function before hardware +unregister. + +While at it, avoid calling ath11k_fw_stats_free() while processing +the firmware stats received in the WMI event because the local list +is getting spliced and reinitialised and hence there are no elements +in the list after splicing. + +Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1 + +Signed-off-by: P Praneesh +Signed-off-by: Aditya Kumar Singh +Signed-off-by: Kalle Valo +Link: https://lore.kernel.org/r/20230606091128.14202-1-quic_adisi@quicinc.com +--- + drivers/net/wireless/ath/ath11k/mac.c | 1 + + drivers/net/wireless/ath/ath11k/wmi.c | 5 +++++ + 2 files changed, 6 insertions(+) + +--- a/drivers/net/wireless/ath/ath11k/mac.c ++++ b/drivers/net/wireless/ath/ath11k/mac.c +@@ -9792,6 +9792,7 @@ void ath11k_mac_destroy(struct ath11k_ba + if (!ar) + continue; + ++ ath11k_fw_stats_free(&ar->fw_stats); + ieee80211_free_hw(ar->hw); + pdev->ar = NULL; + } +--- a/drivers/net/wireless/ath/ath11k/wmi.c ++++ b/drivers/net/wireless/ath/ath11k/wmi.c +@@ -8119,6 +8119,11 @@ complete: + rcu_read_unlock(); + spin_unlock_bh(&ar->data_lock); + ++ /* Since the stats's pdev, vdev and beacon list are spliced and reinitialised ++ * at this point, no need to free the individual list. ++ */ ++ return; ++ + free: + ath11k_fw_stats_free(&stats); + } diff --git a/package/kernel/mac80211/patches/ath11k/0086-wifi-ath11k-Add-missing-check-for-ioremap.patch b/package/kernel/mac80211/patches/ath11k/0086-wifi-ath11k-Add-missing-check-for-ioremap.patch new file mode 100644 index 000000000..e536c3bd6 --- /dev/null +++ b/package/kernel/mac80211/patches/ath11k/0086-wifi-ath11k-Add-missing-check-for-ioremap.patch @@ -0,0 +1,38 @@ +From 16e0077e14a73866e9b0f4a6bf4ad3d4a5cb0f2a Mon Sep 17 00:00:00 2001 +From: Jiasheng Jiang +Date: Tue, 13 Jun 2023 12:19:40 +0300 +Subject: [PATCH] wifi: ath11k: Add missing check for ioremap + +Add check for ioremap() and return the error if it fails in order to +guarantee the success of ioremap(), same as in +ath11k_qmi_load_file_target_mem(). + +Fixes: 6ac04bdc5edb ("ath11k: Use reserved host DDR addresses from DT for PCI devices") +Signed-off-by: Jiasheng Jiang +Signed-off-by: Kalle Valo +Link: https://lore.kernel.org/r/20230608022858.27405-1-jiasheng@iscas.ac.cn +--- + drivers/net/wireless/ath/ath11k/qmi.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/net/wireless/ath/ath11k/qmi.c ++++ b/drivers/net/wireless/ath/ath11k/qmi.c +@@ -2061,6 +2061,9 @@ static int ath11k_qmi_assign_target_mem_ + ab->qmi.target_mem[idx].iaddr = + ioremap(ab->qmi.target_mem[idx].paddr, + ab->qmi.target_mem[i].size); ++ if (!ab->qmi.target_mem[idx].iaddr) ++ return -EIO; ++ + ab->qmi.target_mem[idx].size = ab->qmi.target_mem[i].size; + host_ddr_sz = ab->qmi.target_mem[i].size; + ab->qmi.target_mem[idx].type = ab->qmi.target_mem[i].type; +@@ -2086,6 +2089,8 @@ static int ath11k_qmi_assign_target_mem_ + ab->qmi.target_mem[idx].iaddr = + ioremap(ab->qmi.target_mem[idx].paddr, + ab->qmi.target_mem[i].size); ++ if (!ab->qmi.target_mem[idx].iaddr) ++ return -EIO; + } else { + ab->qmi.target_mem[idx].paddr = + ATH11K_QMI_CALDB_ADDRESS; diff --git a/package/kernel/mac80211/patches/ath11k/0087-wifi-ath11k-Add-missing-ops-config-for-IPQ5018-in.patch b/package/kernel/mac80211/patches/ath11k/0087-wifi-ath11k-Add-missing-ops-config-for-IPQ5018-in.patch new file mode 100644 index 000000000..fa539ef45 --- /dev/null +++ b/package/kernel/mac80211/patches/ath11k/0087-wifi-ath11k-Add-missing-ops-config-for-IPQ5018-in.patch @@ -0,0 +1,30 @@ +From 469ddb20cae61cad9c4f208a4c8682305905a511 Mon Sep 17 00:00:00 2001 +From: Ziyang Huang +Date: Thu, 15 Jun 2023 14:41:47 +0300 +Subject: [PATCH] wifi: ath11k: Add missing ops config for IPQ5018 in + ath11k_ahb_probe() + +Without this patch, the IPQ5018 WiFi will fail and print the following +logs: + + [ 11.033179] ath11k c000000.wifi: unsupported device type 7 + [ 11.033223] ath11k: probe of c000000.wifi failed with error -95 + +Fixes: 25edca7bb18a ("wifi: ath11k: add ipq5018 device support") +Signed-off-by: Ziyang Huang +Signed-off-by: Kalle Valo +Link: https://lore.kernel.org/r/TYZPR01MB5556D7AA10ABEDDDD2D8F39EC953A@TYZPR01MB5556.apcprd01.prod.exchangelabs.com +--- + drivers/net/wireless/ath/ath11k/ahb.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/net/wireless/ath/ath11k/ahb.c ++++ b/drivers/net/wireless/ath/ath11k/ahb.c +@@ -1127,6 +1127,7 @@ static int ath11k_ahb_probe(struct platf + switch (hw_rev) { + case ATH11K_HW_IPQ8074: + case ATH11K_HW_IPQ6018_HW10: ++ case ATH11K_HW_IPQ5018_HW10: + hif_ops = &ath11k_ahb_hif_ops_ipq8074; + pci_ops = NULL; + break; diff --git a/package/kernel/mac80211/patches/ath11k/0088-wifi-ath11k-Restart-firmware-after-cold-boot-calibration.patch b/package/kernel/mac80211/patches/ath11k/0088-wifi-ath11k-Restart-firmware-after-cold-boot-calibration.patch new file mode 100644 index 000000000..4a9385218 --- /dev/null +++ b/package/kernel/mac80211/patches/ath11k/0088-wifi-ath11k-Restart-firmware-after-cold-boot-calibration.patch @@ -0,0 +1,47 @@ +From 80c5390e1f5e5b16d820512265530ef26073d8e0 Mon Sep 17 00:00:00 2001 +From: Ziyang Huang +Date: Thu, 15 Jun 2023 14:41:48 +0300 +Subject: [PATCH] wifi: ath11k: Restart firmware after cold boot calibration + for IPQ5018 + +Restart is required after cold boot calibration on IPQ5018. Otherwise, +we get the following exception: + + [ 14.412829] qcom-q6-mpd cd00000.remoteproc: fatal error received: err_smem_ver.2.1: + [ 14.412829] QC Image Version : QC_IMAGE_VERSION_STRING=WLAN.HK.2.6.0.1-00974-QCAHKSWPL_SILICONZ-1 + [ 14.412829] Image Variant : IMAGE_VARIANT_STRING=5018.wlanfw2.map_spr_spr_evalQ + [ 14.412829] DALSysLogEvent.c:174 Assertion 0 failed param0 :zero,param1 :zero,param2 :zero + [ 14.412829] Thread ID : 0x00000048 Thread name : WLAN RT0 Process ID : 0x00000001 Process name :wlan0 + [ 14.412829] + [ 14.412829] Registers: + [ 14.412829] SP : 0x4c81c120 + [ 14.412829] FP : 0x4c81c138 + [ 14.412829] PC : 0xb022c590 + [ 14.412829] SSR : 0x00000000 + [ 14.412829] BADVA : 0x00000000 + [ 14.412829] LR : 0xb0008490 + [ 14.412829] + [ 14.412829] StackDump + [ 14.412829] from:0x4c81c120 + [ 14.412829] to: 0x00000000: + [ 14.412829] + [ 14.463006] remoteproc remoteproc0: crash detected in cd00000.remoteproc: type fatal error + +Fixes: 8dfe875aa24a ("wifi: ath11k: update hw params for IPQ5018") +Signed-off-by: Ziyang Huang +Signed-off-by: Kalle Valo +Link: https://lore.kernel.org/r/TYZPR01MB55566969818BD4B49E770445C953A@TYZPR01MB5556.apcprd01.prod.exchangelabs.com +--- + drivers/net/wireless/ath/ath11k/core.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/net/wireless/ath/ath11k/core.c ++++ b/drivers/net/wireless/ath/ath11k/core.c +@@ -668,6 +668,7 @@ static const struct ath11k_hw_params ath + .hal_params = &ath11k_hw_hal_params_ipq8074, + .single_pdev_only = false, + .cold_boot_calib = true, ++ .cbcal_restart_fw = true, + .fix_l1ss = true, + .supports_dynamic_smps_6ghz = false, + .alloc_cacheable_memory = true, diff --git a/package/kernel/mac80211/patches/ath11k/0089-wifi-ath11k-Add-missing-hw_ops-get_ring_selector-for.patch b/package/kernel/mac80211/patches/ath11k/0089-wifi-ath11k-Add-missing-hw_ops-get_ring_selector-for.patch new file mode 100644 index 000000000..cb6667f14 --- /dev/null +++ b/package/kernel/mac80211/patches/ath11k/0089-wifi-ath11k-Add-missing-hw_ops-get_ring_selector-for.patch @@ -0,0 +1,58 @@ +From ce282d8de71f07f0056ea319541141152c65f552 Mon Sep 17 00:00:00 2001 +From: Ziyang Huang +Date: Thu, 15 Jun 2023 14:41:48 +0300 +Subject: [PATCH] wifi: ath11k: Add missing hw_ops->get_ring_selector() for + IPQ5018 + +During sending data after clients connected, hw_ops->get_ring_selector() +will be called. But for IPQ5018, this member isn't set, and the +following NULL pointer exception will be occurred: + + [ 38.840478] 8<--- cut here --- + [ 38.840517] Unable to handle kernel NULL pointer dereference at virtual address 00000000 + ... + [ 38.923161] PC is at 0x0 + [ 38.927930] LR is at ath11k_dp_tx+0x70/0x730 [ath11k] + ... + [ 39.063264] Process hostapd (pid: 1034, stack limit = 0x801ceb3d) + [ 39.068994] Stack: (0x856a9a68 to 0x856aa000) + ... + [ 39.438467] [<7f323804>] (ath11k_dp_tx [ath11k]) from [<7f314e6c>] (ath11k_mac_op_tx+0x80/0x190 [ath11k]) + [ 39.446607] [<7f314e6c>] (ath11k_mac_op_tx [ath11k]) from [<7f17dbe0>] (ieee80211_handle_wake_tx_queue+0x7c/0xc0 [mac80211]) + [ 39.456162] [<7f17dbe0>] (ieee80211_handle_wake_tx_queue [mac80211]) from [<7f174450>] (ieee80211_probereq_get+0x584/0x704 [mac80211]) + [ 39.467443] [<7f174450>] (ieee80211_probereq_get [mac80211]) from [<7f178c40>] (ieee80211_tx_prepare_skb+0x1f8/0x248 [mac80211]) + [ 39.479334] [<7f178c40>] (ieee80211_tx_prepare_skb [mac80211]) from [<7f179e28>] (__ieee80211_subif_start_xmit+0x32c/0x3d4 [mac80211]) + [ 39.491053] [<7f179e28>] (__ieee80211_subif_start_xmit [mac80211]) from [<7f17af08>] (ieee80211_tx_control_port+0x19c/0x288 [mac80211]) + [ 39.502946] [<7f17af08>] (ieee80211_tx_control_port [mac80211]) from [<7f0fc704>] (nl80211_tx_control_port+0x174/0x1d4 [cfg80211]) + [ 39.515017] [<7f0fc704>] (nl80211_tx_control_port [cfg80211]) from [<808ceac4>] (genl_rcv_msg+0x154/0x340) + [ 39.526814] [<808ceac4>] (genl_rcv_msg) from [<808cdb74>] (netlink_rcv_skb+0xb8/0x11c) + [ 39.536446] [<808cdb74>] (netlink_rcv_skb) from [<808ce1d0>] (genl_rcv+0x28/0x34) + [ 39.544344] [<808ce1d0>] (genl_rcv) from [<808cd234>] (netlink_unicast+0x174/0x274) + [ 39.551895] [<808cd234>] (netlink_unicast) from [<808cd510>] (netlink_sendmsg+0x1dc/0x440) + [ 39.559362] [<808cd510>] (netlink_sendmsg) from [<808596e0>] (____sys_sendmsg+0x1a8/0x1fc) + [ 39.567697] [<808596e0>] (____sys_sendmsg) from [<8085b1a8>] (___sys_sendmsg+0xa4/0xdc) + [ 39.575941] [<8085b1a8>] (___sys_sendmsg) from [<8085b310>] (sys_sendmsg+0x44/0x74) + [ 39.583841] [<8085b310>] (sys_sendmsg) from [<80300060>] (ret_fast_syscall+0x0/0x40) + ... + [ 39.620734] Code: bad PC value + [ 39.625869] ---[ end trace 8aef983ad3cbc032 ]--- + +Fixes: ba60f2793d3a ("wifi: ath11k: initialize hw_ops for IPQ5018") +Signed-off-by: Ziyang Huang +Signed-off-by: Kalle Valo +Link: https://lore.kernel.org/r/TYZPR01MB5556D6E3F63EAB5129D11420C953A@TYZPR01MB5556.apcprd01.prod.exchangelabs.com +--- + drivers/net/wireless/ath/ath11k/hw.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/wireless/ath/ath11k/hw.c ++++ b/drivers/net/wireless/ath/ath11k/hw.c +@@ -1178,7 +1178,7 @@ const struct ath11k_hw_ops ipq5018_ops = + .mpdu_info_get_peerid = ath11k_hw_ipq8074_mpdu_info_get_peerid, + .rx_desc_mac_addr2_valid = ath11k_hw_ipq9074_rx_desc_mac_addr2_valid, + .rx_desc_mpdu_start_addr2 = ath11k_hw_ipq9074_rx_desc_mpdu_start_addr2, +- ++ .get_ring_selector = ath11k_hw_ipq8074_get_tcl_ring_selector, + }; + + #define ATH11K_TX_RING_MASK_0 BIT(0) diff --git a/package/kernel/mac80211/patches/ath11k/0090-Revert-wifi-ath11k-Enable-threaded-NAPI.patch b/package/kernel/mac80211/patches/ath11k/0090-Revert-wifi-ath11k-Enable-threaded-NAPI.patch new file mode 100644 index 000000000..313c18c55 --- /dev/null +++ b/package/kernel/mac80211/patches/ath11k/0090-Revert-wifi-ath11k-Enable-threaded-NAPI.patch @@ -0,0 +1,44 @@ +From d265ebe41c911314bd273c218a37088835959fa1 Mon Sep 17 00:00:00 2001 +From: Kalle Valo +Date: Thu, 20 Jul 2023 18:14:44 +0300 +Subject: [PATCH] Revert "wifi: ath11k: Enable threaded NAPI" + +This reverts commit 13aa2fb692d3717767303817f35b3e650109add3. + +This commit broke QCN9074 initialisation: + +[ 358.960477] ath11k_pci 0000:04:00.0: ce desc not available for wmi command 36866 +[ 358.960481] ath11k_pci 0000:04:00.0: failed to send WMI_STA_POWERSAVE_PARAM_CMDID +[ 358.960484] ath11k_pci 0000:04:00.0: could not set uapsd params -105 + +As there's no fix available let's just revert it to get QCN9074 working again. + +Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217536 +Signed-off-by: Kalle Valo +Signed-off-by: Kalle Valo +Link: https://lore.kernel.org/r/20230720151444.2016637-1-kvalo@kernel.org +--- + drivers/net/wireless/ath/ath11k/ahb.c | 1 - + drivers/net/wireless/ath/ath11k/pcic.c | 1 - + 2 files changed, 2 deletions(-) + +--- a/drivers/net/wireless/ath/ath11k/ahb.c ++++ b/drivers/net/wireless/ath/ath11k/ahb.c +@@ -376,7 +376,6 @@ static void ath11k_ahb_ext_irq_enable(st + struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i]; + + if (!irq_grp->napi_enabled) { +- dev_set_threaded(&irq_grp->napi_ndev, true); + napi_enable(&irq_grp->napi); + irq_grp->napi_enabled = true; + } +--- a/drivers/net/wireless/ath/ath11k/pcic.c ++++ b/drivers/net/wireless/ath/ath11k/pcic.c +@@ -466,7 +466,6 @@ void ath11k_pcic_ext_irq_enable(struct a + struct ath11k_ext_irq_grp *irq_grp = &ab->ext_irq_grp[i]; + + if (!irq_grp->napi_enabled) { +- dev_set_threaded(&irq_grp->napi_ndev, true); + napi_enable(&irq_grp->napi); + irq_grp->napi_enabled = true; + } diff --git a/package/kernel/mac80211/patches/ath11k/0091-wifi-ath11k-Split-coldboot-calibration-hw_param.patch b/package/kernel/mac80211/patches/ath11k/0091-wifi-ath11k-Split-coldboot-calibration-hw_param.patch new file mode 100644 index 000000000..470535468 --- /dev/null +++ b/package/kernel/mac80211/patches/ath11k/0091-wifi-ath11k-Split-coldboot-calibration-hw_param.patch @@ -0,0 +1,180 @@ +From 011e5a3052a22d3758d17442bf0c04c68bf79bea Mon Sep 17 00:00:00 2001 +From: Seevalamuthu Mariappan +Date: Wed, 26 Jul 2023 19:40:30 +0530 +Subject: [PATCH 3/5] wifi: ath11k: Split coldboot calibration hw_param + +QCN9074 enables coldboot calibration only in Factory Test Mode (FTM). +Hence, split cold_boot_calib to two hw_params for mission and FTM +mode. + +Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1 + +Signed-off-by: Seevalamuthu Mariappan +Signed-off-by: Raj Kumar Bhagat +Signed-off-by: Kalle Valo +Link: https://lore.kernel.org/r/20230726141032.3061-2-quic_rajkbhag@quicinc.com +--- + drivers/net/wireless/ath/ath11k/ahb.c | 3 +-- + drivers/net/wireless/ath/ath11k/core.c | 36 ++++++++++++++++++++------ + drivers/net/wireless/ath/ath11k/core.h | 1 + + drivers/net/wireless/ath/ath11k/hw.h | 3 ++- + drivers/net/wireless/ath/ath11k/qmi.c | 6 ++--- + 5 files changed, 35 insertions(+), 14 deletions(-) + +--- a/drivers/net/wireless/ath/ath11k/ahb.c ++++ b/drivers/net/wireless/ath/ath11k/ahb.c +@@ -422,8 +422,7 @@ static int ath11k_ahb_fwreset_from_cold_ + { + int timeout; + +- if (ath11k_cold_boot_cal == 0 || ab->qmi.cal_done || +- ab->hw_params.cold_boot_calib == 0 || ++ if (!ath11k_core_coldboot_cal_support(ab) || ab->qmi.cal_done || + ab->hw_params.cbcal_restart_fw == 0) + return 0; + +--- a/drivers/net/wireless/ath/ath11k/core.c ++++ b/drivers/net/wireless/ath/ath11k/core.c +@@ -86,7 +86,8 @@ static const struct ath11k_hw_params ath + .supports_shadow_regs = false, + .idle_ps = false, + .supports_sta_ps = false, +- .cold_boot_calib = true, ++ .coldboot_cal_mm = true, ++ .coldboot_cal_ftm = true, + .cbcal_restart_fw = true, + .fw_mem_mode = 0, + .num_vdevs = 16 + 1, +@@ -167,7 +168,8 @@ static const struct ath11k_hw_params ath + .supports_shadow_regs = false, + .idle_ps = false, + .supports_sta_ps = false, +- .cold_boot_calib = true, ++ .coldboot_cal_mm = true, ++ .coldboot_cal_ftm = true, + .cbcal_restart_fw = true, + .fw_mem_mode = 0, + .num_vdevs = 16 + 1, +@@ -248,7 +250,8 @@ static const struct ath11k_hw_params ath + .supports_shadow_regs = true, + .idle_ps = true, + .supports_sta_ps = true, +- .cold_boot_calib = false, ++ .coldboot_cal_mm = false, ++ .coldboot_cal_ftm = false, + .cbcal_restart_fw = false, + .fw_mem_mode = 0, + .num_vdevs = 16 + 1, +@@ -332,7 +335,8 @@ static const struct ath11k_hw_params ath + .supports_shadow_regs = false, + .idle_ps = false, + .supports_sta_ps = false, +- .cold_boot_calib = false, ++ .coldboot_cal_mm = false, ++ .coldboot_cal_ftm = false, + .cbcal_restart_fw = false, + .fw_mem_mode = 2, + .num_vdevs = 8, +@@ -413,7 +417,8 @@ static const struct ath11k_hw_params ath + .supports_shadow_regs = true, + .idle_ps = true, + .supports_sta_ps = true, +- .cold_boot_calib = false, ++ .coldboot_cal_mm = false, ++ .coldboot_cal_ftm = false, + .cbcal_restart_fw = false, + .fw_mem_mode = 0, + .num_vdevs = 16 + 1, +@@ -495,7 +500,8 @@ static const struct ath11k_hw_params ath + .supports_shadow_regs = true, + .idle_ps = true, + .supports_sta_ps = true, +- .cold_boot_calib = false, ++ .coldboot_cal_mm = false, ++ .coldboot_cal_ftm = false, + .cbcal_restart_fw = false, + .fw_mem_mode = 0, + .num_vdevs = 16 + 1, +@@ -578,7 +584,8 @@ static const struct ath11k_hw_params ath + .supports_shadow_regs = true, + .idle_ps = true, + .supports_sta_ps = true, +- .cold_boot_calib = true, ++ .coldboot_cal_mm = true, ++ .coldboot_cal_ftm = true, + .cbcal_restart_fw = false, + .fw_mem_mode = 0, + .num_vdevs = 16 + 1, +@@ -667,7 +674,8 @@ static const struct ath11k_hw_params ath + .supports_suspend = false, + .hal_params = &ath11k_hw_hal_params_ipq8074, + .single_pdev_only = false, +- .cold_boot_calib = true, ++ .coldboot_cal_mm = true, ++ .coldboot_cal_ftm = true, + .cbcal_restart_fw = true, + .fix_l1ss = true, + .supports_dynamic_smps_6ghz = false, +@@ -749,6 +757,18 @@ void ath11k_fw_stats_free(struct ath11k_ + ath11k_fw_stats_bcn_free(&stats->bcn); + } + ++bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab) ++{ ++ if (!ath11k_cold_boot_cal) ++ return false; ++ ++ if (ath11k_ftm_mode) ++ return ab->hw_params.coldboot_cal_ftm; ++ ++ else ++ return ab->hw_params.coldboot_cal_mm; ++} ++ + int ath11k_core_suspend(struct ath11k_base *ab) + { + int ret; +--- a/drivers/net/wireless/ath/ath11k/core.h ++++ b/drivers/net/wireless/ath/ath11k/core.h +@@ -1186,6 +1186,7 @@ void ath11k_core_halt(struct ath11k *ar) + int ath11k_core_resume(struct ath11k_base *ab); + int ath11k_core_suspend(struct ath11k_base *ab); + void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab); ++bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab); + + const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab, + const char *filename); +--- a/drivers/net/wireless/ath/ath11k/hw.h ++++ b/drivers/net/wireless/ath/ath11k/hw.h +@@ -187,7 +187,8 @@ struct ath11k_hw_params { + bool supports_shadow_regs; + bool idle_ps; + bool supports_sta_ps; +- bool cold_boot_calib; ++ bool coldboot_cal_mm; ++ bool coldboot_cal_ftm; + bool cbcal_restart_fw; + int fw_mem_mode; + u32 num_vdevs; +--- a/drivers/net/wireless/ath/ath11k/qmi.c ++++ b/drivers/net/wireless/ath/ath11k/qmi.c +@@ -2082,7 +2082,7 @@ static int ath11k_qmi_assign_target_mem_ + return -EINVAL; + } + +- if (ath11k_cold_boot_cal && ab->hw_params.cold_boot_calib) { ++ if (ath11k_core_coldboot_cal_support(ab)) { + if (hremote_node) { + ab->qmi.target_mem[idx].paddr = + res.start + host_ddr_sz; +@@ -3212,8 +3212,8 @@ static void ath11k_qmi_driver_event_work + break; + } + +- if (ath11k_cold_boot_cal && ab->qmi.cal_done == 0 && +- ab->hw_params.cold_boot_calib) { ++ if (ab->qmi.cal_done == 0 && ++ ath11k_core_coldboot_cal_support(ab)) { + ath11k_qmi_process_coldboot_calibration(ab); + } else { + clear_bit(ATH11K_FLAG_CRASH_FLUSH, diff --git a/package/kernel/mac80211/patches/ath11k/0092-wifi-ath11k-Add-coldboot-calibration-support-for-QCN.patch b/package/kernel/mac80211/patches/ath11k/0092-wifi-ath11k-Add-coldboot-calibration-support-for-QCN.patch new file mode 100644 index 000000000..31b11ddee --- /dev/null +++ b/package/kernel/mac80211/patches/ath11k/0092-wifi-ath11k-Add-coldboot-calibration-support-for-QCN.patch @@ -0,0 +1,176 @@ +From bdfc967bf5fcd762473a01d39edb81f1165ba290 Mon Sep 17 00:00:00 2001 +From: Anilkumar Kolli +Date: Wed, 26 Jul 2023 19:40:31 +0530 +Subject: [PATCH 4/5] wifi: ath11k: Add coldboot calibration support for + QCN9074 + +QCN9074 supports 6 GHz, which has increased number of channels +compared to 5 GHz/2 GHz. So, to support coldboot calibration in +QCN9074 ATH11K_COLD_BOOT_FW_RESET_DELAY extended to 60 seconds. To +avoid code redundancy, fwreset_from_cold_boot moved to QMI and made +common for both ahb and pci. Coldboot calibration is enabled only in +FTM mode for QCN9074. QCN9074 requires firmware restart after coldboot, +hence enable cbcal_restart_fw in hw_params. + +This support can be enabled/disabled using hw params for different +hardware. Currently it is not enabled for QCA6390. + +Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1 + +Signed-off-by: Anilkumar Kolli +Signed-off-by: Seevalamuthu Mariappan +Signed-off-by: Raj Kumar Bhagat +Signed-off-by: Kalle Valo +Link: https://lore.kernel.org/r/20230726141032.3061-3-quic_rajkbhag@quicinc.com +--- + drivers/net/wireless/ath/ath11k/ahb.c | 28 ++------------------------ + drivers/net/wireless/ath/ath11k/core.c | 4 ++-- + drivers/net/wireless/ath/ath11k/pci.c | 2 ++ + drivers/net/wireless/ath/ath11k/qmi.c | 28 ++++++++++++++++++++++++++ + drivers/net/wireless/ath/ath11k/qmi.h | 3 ++- + 5 files changed, 36 insertions(+), 29 deletions(-) + +--- a/drivers/net/wireless/ath/ath11k/ahb.c ++++ b/drivers/net/wireless/ath/ath11k/ahb.c +@@ -14,6 +14,7 @@ + #include "ahb.h" + #include "debug.h" + #include "hif.h" ++#include "qmi.h" + #include + #include "pcic.h" + #include +@@ -418,31 +419,6 @@ static void ath11k_ahb_power_down(struct + rproc_shutdown(ab_ahb->tgt_rproc); + } + +-static int ath11k_ahb_fwreset_from_cold_boot(struct ath11k_base *ab) +-{ +- int timeout; +- +- if (!ath11k_core_coldboot_cal_support(ab) || ab->qmi.cal_done || +- ab->hw_params.cbcal_restart_fw == 0) +- return 0; +- +- ath11k_dbg(ab, ATH11K_DBG_AHB, "wait for cold boot done\n"); +- timeout = wait_event_timeout(ab->qmi.cold_boot_waitq, +- (ab->qmi.cal_done == 1), +- ATH11K_COLD_BOOT_FW_RESET_DELAY); +- if (timeout <= 0) { +- ath11k_cold_boot_cal = 0; +- ath11k_warn(ab, "Coldboot Calibration failed timed out\n"); +- } +- +- /* reset the firmware */ +- ath11k_ahb_power_down(ab); +- ath11k_ahb_power_up(ab); +- +- ath11k_dbg(ab, ATH11K_DBG_AHB, "exited from cold boot mode\n"); +- return 0; +-} +- + static void ath11k_ahb_init_qmi_ce_config(struct ath11k_base *ab) + { + struct ath11k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg; +@@ -1225,7 +1201,7 @@ static int ath11k_ahb_probe(struct platf + goto err_ce_free; + } + +- ath11k_ahb_fwreset_from_cold_boot(ab); ++ ath11k_qmi_fwreset_from_cold_boot(ab); + + return 0; + +--- a/drivers/net/wireless/ath/ath11k/core.c ++++ b/drivers/net/wireless/ath/ath11k/core.c +@@ -336,8 +336,8 @@ static const struct ath11k_hw_params ath + .idle_ps = false, + .supports_sta_ps = false, + .coldboot_cal_mm = false, +- .coldboot_cal_ftm = false, +- .cbcal_restart_fw = false, ++ .coldboot_cal_ftm = true, ++ .cbcal_restart_fw = true, + .fw_mem_mode = 2, + .num_vdevs = 8, + .num_peers = 128, +--- a/drivers/net/wireless/ath/ath11k/pci.c ++++ b/drivers/net/wireless/ath/ath11k/pci.c +@@ -15,6 +15,7 @@ + #include "mhi.h" + #include "debug.h" + #include "pcic.h" ++#include "qmi.h" + + #define ATH11K_PCI_BAR_NUM 0 + #define ATH11K_PCI_DMA_MASK 32 +@@ -897,6 +898,7 @@ unsupported_wcn6855_soc: + ath11k_err(ab, "failed to init core: %d\n", ret); + goto err_irq_affinity_cleanup; + } ++ ath11k_qmi_fwreset_from_cold_boot(ab); + return 0; + + err_irq_affinity_cleanup: +--- a/drivers/net/wireless/ath/ath11k/qmi.c ++++ b/drivers/net/wireless/ath/ath11k/qmi.c +@@ -9,6 +9,7 @@ + #include "qmi.h" + #include "core.h" + #include "debug.h" ++#include "hif.h" + #include + #include + #include +@@ -2842,6 +2843,33 @@ int ath11k_qmi_firmware_start(struct ath + return 0; + } + ++int ath11k_qmi_fwreset_from_cold_boot(struct ath11k_base *ab) ++{ ++ int timeout; ++ ++ if (!ath11k_core_coldboot_cal_support(ab) || ab->qmi.cal_done || ++ ab->hw_params.cbcal_restart_fw == 0) ++ return 0; ++ ++ ath11k_dbg(ab, ATH11K_DBG_QMI, "wait for cold boot done\n"); ++ ++ timeout = wait_event_timeout(ab->qmi.cold_boot_waitq, ++ (ab->qmi.cal_done == 1), ++ ATH11K_COLD_BOOT_FW_RESET_DELAY); ++ ++ if (timeout <= 0) { ++ ath11k_warn(ab, "Coldboot Calibration timed out\n"); ++ return -ETIMEDOUT; ++ } ++ ++ /* reset the firmware */ ++ ath11k_hif_power_down(ab); ++ ath11k_hif_power_up(ab); ++ ath11k_dbg(ab, ATH11K_DBG_QMI, "exit wait for cold boot done\n"); ++ return 0; ++} ++EXPORT_SYMBOL(ath11k_qmi_fwreset_from_cold_boot); ++ + static int ath11k_qmi_process_coldboot_calibration(struct ath11k_base *ab) + { + int timeout; +--- a/drivers/net/wireless/ath/ath11k/qmi.h ++++ b/drivers/net/wireless/ath/ath11k/qmi.h +@@ -37,7 +37,7 @@ + + #define QMI_WLANFW_MAX_DATA_SIZE_V01 6144 + #define ATH11K_FIRMWARE_MODE_OFF 4 +-#define ATH11K_COLD_BOOT_FW_RESET_DELAY (40 * HZ) ++#define ATH11K_COLD_BOOT_FW_RESET_DELAY (60 * HZ) + + #define ATH11K_QMI_DEVICE_BAR_SIZE 0x200000 + +@@ -519,5 +519,6 @@ void ath11k_qmi_msg_recv_work(struct wor + void ath11k_qmi_deinit_service(struct ath11k_base *ab); + int ath11k_qmi_init_service(struct ath11k_base *ab); + void ath11k_qmi_free_resource(struct ath11k_base *ab); ++int ath11k_qmi_fwreset_from_cold_boot(struct ath11k_base *ab); + + #endif diff --git a/package/kernel/mac80211/patches/ath11k/0093-wifi-ath11k-Remove-cal_done-check-during-probe.patch b/package/kernel/mac80211/patches/ath11k/0093-wifi-ath11k-Remove-cal_done-check-during-probe.patch new file mode 100644 index 000000000..513ea3f0b --- /dev/null +++ b/package/kernel/mac80211/patches/ath11k/0093-wifi-ath11k-Remove-cal_done-check-during-probe.patch @@ -0,0 +1,33 @@ +From 13329d0cb7212b058bd8451a99d215a8f97645ea Mon Sep 17 00:00:00 2001 +From: Seevalamuthu Mariappan +Date: Wed, 26 Jul 2023 19:40:32 +0530 +Subject: [PATCH] wifi: ath11k: Remove cal_done check during probe + +In some race conditions, calibration done QMI message is received even +before host wait starts for calibration to be done. +Due to this, resetting firmware was not performed after calibration. + +Hence, remove cal_done check in ath11k_qmi_fwreset_from_cold_boot() +as this is called only from probe. + +Tested-on: QCN9074 hw1.0 PCI WLAN.HK.2.7.0.1-01744-QCAHKSWPL_SILICONZ-1 + +Signed-off-by: Seevalamuthu Mariappan +Signed-off-by: Raj Kumar Bhagat +Signed-off-by: Kalle Valo +Link: https://lore.kernel.org/r/20230726141032.3061-4-quic_rajkbhag@quicinc.com +--- + drivers/net/wireless/ath/ath11k/qmi.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/wireless/ath/ath11k/qmi.c ++++ b/drivers/net/wireless/ath/ath11k/qmi.c +@@ -2847,7 +2847,7 @@ int ath11k_qmi_fwreset_from_cold_boot(st + { + int timeout; + +- if (!ath11k_core_coldboot_cal_support(ab) || ab->qmi.cal_done || ++ if (!ath11k_core_coldboot_cal_support(ab) || + ab->hw_params.cbcal_restart_fw == 0) + return 0; + diff --git a/package/kernel/mac80211/patches/ath11k/0094-wifi-ath11k-mhi-add-a-warning-message-for-MHI_CB_EE.patch b/package/kernel/mac80211/patches/ath11k/0094-wifi-ath11k-mhi-add-a-warning-message-for-MHI_CB_EE.patch new file mode 100644 index 000000000..e1286c953 --- /dev/null +++ b/package/kernel/mac80211/patches/ath11k/0094-wifi-ath11k-mhi-add-a-warning-message-for-MHI_CB_EE.patch @@ -0,0 +1,34 @@ +From 4a93b554cf9fa64faa7cf164c0d32fc3ce67108b Mon Sep 17 00:00:00 2001 +From: Arowa Suliman +Date: Sat, 26 Aug 2023 08:42:42 +0300 +Subject: [PATCH] wifi: ath11k: mhi: add a warning message for MHI_CB_EE_RDDM + crash + +Currently, the ath11k driver does not print a crash signature when a +MHI_CB_EE_RDDM crash happens. Checked by triggering a simulated crash using the +command and checking dmesg for logs: + +echo assert > /sys/kernel/debug/ath11k/../simulate_fw_crash + +Add a warning when firmware crash MHI_CB_EE_RDDM happens. + +Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.23 + +Signed-off-by: Arowa Suliman +Reviewed-by: Jeff Johnson +Signed-off-by: Kalle Valo +Link: https://lore.kernel.org/r/20230714001126.463127-1-arowa@chromium.org +--- + drivers/net/wireless/ath/ath11k/mhi.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/net/wireless/ath/ath11k/mhi.c ++++ b/drivers/net/wireless/ath/ath11k/mhi.c +@@ -333,6 +333,7 @@ static void ath11k_mhi_op_status_cb(stru + ath11k_warn(ab, "firmware crashed: MHI_CB_SYS_ERROR\n"); + break; + case MHI_CB_EE_RDDM: ++ ath11k_warn(ab, "firmware crashed: MHI_CB_EE_RDDM\n"); + if (!(test_bit(ATH11K_FLAG_UNREGISTERING, &ab->dev_flags))) + queue_work(ab->workqueue_aux, &ab->reset_work); + break; diff --git a/package/kernel/mac80211/patches/ath11k/0095-wifi-ath11k-add-chip-id-board-name-while-searching-b.patch b/package/kernel/mac80211/patches/ath11k/0095-wifi-ath11k-add-chip-id-board-name-while-searching-b.patch new file mode 100644 index 000000000..662e28f4e --- /dev/null +++ b/package/kernel/mac80211/patches/ath11k/0095-wifi-ath11k-add-chip-id-board-name-while-searching-b.patch @@ -0,0 +1,214 @@ +From 1133af5aea588a58043244a4ecb5ce511b310356 Mon Sep 17 00:00:00 2001 +From: Wen Gong +Date: Wed, 30 Aug 2023 02:02:26 -0400 +Subject: [PATCH] wifi: ath11k: add chip id board name while searching + board-2.bin for WCN6855 + +Sometimes board-2.bin does not have the board data which matched the +parameters such as bus type, vendor, device, subsystem-vendor, +subsystem-device, qmi-chip-id and qmi-board-id, then wlan will load fail. + +Hence add another type which only matches the bus type and qmi-chip-id, +then the ratio of missing board data reduced. + +Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.23 + +Signed-off-by: Wen Gong +Signed-off-by: Kalle Valo +Link: https://lore.kernel.org/r/20230830060226.18664-1-quic_wgong@quicinc.com +--- + drivers/net/wireless/ath/ath11k/core.c | 108 ++++++++++++++++++++----- + 1 file changed, 87 insertions(+), 21 deletions(-) + +--- a/drivers/net/wireless/ath/ath11k/core.c ++++ b/drivers/net/wireless/ath/ath11k/core.c +@@ -985,9 +985,15 @@ int ath11k_core_check_dt(struct ath11k_b + return 0; + } + ++enum ath11k_bdf_name_type { ++ ATH11K_BDF_NAME_FULL, ++ ATH11K_BDF_NAME_BUS_NAME, ++ ATH11K_BDF_NAME_CHIP_ID, ++}; ++ + static int __ath11k_core_create_board_name(struct ath11k_base *ab, char *name, + size_t name_len, bool with_variant, +- bool bus_type_mode) ++ enum ath11k_bdf_name_type name_type) + { + /* strlen(',variant=') + strlen(ab->qmi.target.bdf_ext) */ + char variant[9 + ATH11K_QMI_BDF_EXT_STR_LENGTH] = { 0 }; +@@ -998,11 +1004,8 @@ static int __ath11k_core_create_board_na + + switch (ab->id.bdf_search) { + case ATH11K_BDF_SEARCH_BUS_AND_BOARD: +- if (bus_type_mode) +- scnprintf(name, name_len, +- "bus=%s", +- ath11k_bus_str(ab->hif.bus)); +- else ++ switch (name_type) { ++ case ATH11K_BDF_NAME_FULL: + scnprintf(name, name_len, + "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x,qmi-chip-id=%d,qmi-board-id=%d%s", + ath11k_bus_str(ab->hif.bus), +@@ -1012,6 +1015,19 @@ static int __ath11k_core_create_board_na + ab->qmi.target.chip_id, + ab->qmi.target.board_id, + variant); ++ break; ++ case ATH11K_BDF_NAME_BUS_NAME: ++ scnprintf(name, name_len, ++ "bus=%s", ++ ath11k_bus_str(ab->hif.bus)); ++ break; ++ case ATH11K_BDF_NAME_CHIP_ID: ++ scnprintf(name, name_len, ++ "bus=%s,qmi-chip-id=%d", ++ ath11k_bus_str(ab->hif.bus), ++ ab->qmi.target.chip_id); ++ break; ++ } + break; + default: + scnprintf(name, name_len, +@@ -1030,19 +1046,29 @@ static int __ath11k_core_create_board_na + static int ath11k_core_create_board_name(struct ath11k_base *ab, char *name, + size_t name_len) + { +- return __ath11k_core_create_board_name(ab, name, name_len, true, false); ++ return __ath11k_core_create_board_name(ab, name, name_len, true, ++ ATH11K_BDF_NAME_FULL); + } + + static int ath11k_core_create_fallback_board_name(struct ath11k_base *ab, char *name, + size_t name_len) + { +- return __ath11k_core_create_board_name(ab, name, name_len, false, false); ++ return __ath11k_core_create_board_name(ab, name, name_len, false, ++ ATH11K_BDF_NAME_FULL); + } + + static int ath11k_core_create_bus_type_board_name(struct ath11k_base *ab, char *name, + size_t name_len) + { +- return __ath11k_core_create_board_name(ab, name, name_len, false, true); ++ return __ath11k_core_create_board_name(ab, name, name_len, false, ++ ATH11K_BDF_NAME_BUS_NAME); ++} ++ ++static int ath11k_core_create_chip_id_board_name(struct ath11k_base *ab, char *name, ++ size_t name_len) ++{ ++ return __ath11k_core_create_board_name(ab, name, name_len, false, ++ ATH11K_BDF_NAME_CHIP_ID); + } + + const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab, +@@ -1289,16 +1315,21 @@ int ath11k_core_fetch_board_data_api_1(s + #define BOARD_NAME_SIZE 200 + int ath11k_core_fetch_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd) + { +- char boardname[BOARD_NAME_SIZE], fallback_boardname[BOARD_NAME_SIZE]; ++ char *boardname = NULL, *fallback_boardname = NULL, *chip_id_boardname = NULL; + char *filename, filepath[100]; +- int ret; ++ int ret = 0; + + filename = ATH11K_BOARD_API2_FILE; ++ boardname = kzalloc(BOARD_NAME_SIZE, GFP_KERNEL); ++ if (!boardname) { ++ ret = -ENOMEM; ++ goto exit; ++ } + +- ret = ath11k_core_create_board_name(ab, boardname, sizeof(boardname)); ++ ret = ath11k_core_create_board_name(ab, boardname, BOARD_NAME_SIZE); + if (ret) { + ath11k_err(ab, "failed to create board name: %d", ret); +- return ret; ++ goto exit; + } + + ab->bd_api = 2; +@@ -1307,13 +1338,19 @@ int ath11k_core_fetch_bdf(struct ath11k_ + ATH11K_BD_IE_BOARD_NAME, + ATH11K_BD_IE_BOARD_DATA); + if (!ret) +- goto success; ++ goto exit; ++ ++ fallback_boardname = kzalloc(BOARD_NAME_SIZE, GFP_KERNEL); ++ if (!fallback_boardname) { ++ ret = -ENOMEM; ++ goto exit; ++ } + + ret = ath11k_core_create_fallback_board_name(ab, fallback_boardname, +- sizeof(fallback_boardname)); ++ BOARD_NAME_SIZE); + if (ret) { + ath11k_err(ab, "failed to create fallback board name: %d", ret); +- return ret; ++ goto exit; + } + + ret = ath11k_core_fetch_board_data_api_n(ab, bd, fallback_boardname, +@@ -1321,7 +1358,28 @@ int ath11k_core_fetch_bdf(struct ath11k_ + ATH11K_BD_IE_BOARD_NAME, + ATH11K_BD_IE_BOARD_DATA); + if (!ret) +- goto success; ++ goto exit; ++ ++ chip_id_boardname = kzalloc(BOARD_NAME_SIZE, GFP_KERNEL); ++ if (!chip_id_boardname) { ++ ret = -ENOMEM; ++ goto exit; ++ } ++ ++ ret = ath11k_core_create_chip_id_board_name(ab, chip_id_boardname, ++ BOARD_NAME_SIZE); ++ if (ret) { ++ ath11k_err(ab, "failed to create chip id board name: %d", ret); ++ goto exit; ++ } ++ ++ ret = ath11k_core_fetch_board_data_api_n(ab, bd, chip_id_boardname, ++ ATH11K_BD_IE_BOARD, ++ ATH11K_BD_IE_BOARD_NAME, ++ ATH11K_BD_IE_BOARD_DATA); ++ ++ if (!ret) ++ goto exit; + + ab->bd_api = 1; + ret = ath11k_core_fetch_board_data_api_1(ab, bd, ATH11K_DEFAULT_BOARD_FILE); +@@ -1334,14 +1392,22 @@ int ath11k_core_fetch_bdf(struct ath11k_ + ath11k_err(ab, "failed to fetch board data for %s from %s\n", + fallback_boardname, filepath); + ++ ath11k_err(ab, "failed to fetch board data for %s from %s\n", ++ chip_id_boardname, filepath); ++ + ath11k_err(ab, "failed to fetch board.bin from %s\n", + ab->hw_params.fw.dir); +- return ret; + } + +-success: +- ath11k_dbg(ab, ATH11K_DBG_BOOT, "using board api %d\n", ab->bd_api); +- return 0; ++exit: ++ kfree(boardname); ++ kfree(fallback_boardname); ++ kfree(chip_id_boardname); ++ ++ if (!ret) ++ ath11k_dbg(ab, ATH11K_DBG_BOOT, "using board api %d\n", ab->bd_api); ++ ++ return ret; + } + + int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd) diff --git a/package/kernel/mac80211/patches/ath11k/0096-wifi-ath11k-fix-boot-failure-with-one-MSI-vector.patch b/package/kernel/mac80211/patches/ath11k/0096-wifi-ath11k-fix-boot-failure-with-one-MSI-vector.patch new file mode 100644 index 000000000..9101a1ea1 --- /dev/null +++ b/package/kernel/mac80211/patches/ath11k/0096-wifi-ath11k-fix-boot-failure-with-one-MSI-vector.patch @@ -0,0 +1,103 @@ +From 39564b475ac5a589e6c22c43a08cbd283c295d2c Mon Sep 17 00:00:00 2001 +From: Baochen Qiang +Date: Thu, 7 Sep 2023 09:56:06 +0800 +Subject: [PATCH] wifi: ath11k: fix boot failure with one MSI vector + +Commit 5b32b6dd96633 ("ath11k: Remove core PCI references from +PCI common code") breaks with one MSI vector because it moves +affinity setting after IRQ request, see below log: + +[ 1417.278835] ath11k_pci 0000:02:00.0: failed to receive control response completion, polling.. +[ 1418.302829] ath11k_pci 0000:02:00.0: Service connect timeout +[ 1418.302833] ath11k_pci 0000:02:00.0: failed to connect to HTT: -110 +[ 1418.303669] ath11k_pci 0000:02:00.0: failed to start core: -110 + +The detail is, if do affinity request after IRQ activated, +which is done in request_irq(), kernel caches that request and +returns success directly. Later when a subsequent MHI interrupt is +fired, kernel will do the real affinity setting work, as a result, +changs the MSI vector. However at that time host has configured +old vector to hardware, so host never receives CE or DP interrupts. + +Fix it by setting affinity before registering MHI controller +where host is, for the first time, doing IRQ request. + +Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3 +Tested-on: WCN6855 hw2.1 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3.6510.23 +Tested-on: WCN6750 hw1.0 AHB WLAN.MSL.1.0.1-01160-QCAMSLSWPLZ-1 + +Fixes: 5b32b6dd9663 ("ath11k: Remove core PCI references from PCI common code") +Signed-off-by: Baochen Qiang +Acked-by: Jeff Johnson +Signed-off-by: Kalle Valo +Link: https://lore.kernel.org/r/20230907015606.16297-1-quic_bqiang@quicinc.com +--- + drivers/net/wireless/ath/ath11k/pci.c | 24 ++++++++++++------------ + 1 file changed, 12 insertions(+), 12 deletions(-) + +--- a/drivers/net/wireless/ath/ath11k/pci.c ++++ b/drivers/net/wireless/ath/ath11k/pci.c +@@ -852,10 +852,16 @@ unsupported_wcn6855_soc: + if (ret) + goto err_pci_disable_msi; + ++ ret = ath11k_pci_set_irq_affinity_hint(ab_pci, cpumask_of(0)); ++ if (ret) { ++ ath11k_err(ab, "failed to set irq affinity %d\n", ret); ++ goto err_pci_disable_msi; ++ } ++ + ret = ath11k_mhi_register(ab_pci); + if (ret) { + ath11k_err(ab, "failed to register mhi: %d\n", ret); +- goto err_pci_disable_msi; ++ goto err_irq_affinity_cleanup; + } + + ret = ath11k_hal_srng_init(ab); +@@ -876,12 +882,6 @@ unsupported_wcn6855_soc: + goto err_ce_free; + } + +- ret = ath11k_pci_set_irq_affinity_hint(ab_pci, cpumask_of(0)); +- if (ret) { +- ath11k_err(ab, "failed to set irq affinity %d\n", ret); +- goto err_free_irq; +- } +- + /* kernel may allocate a dummy vector before request_irq and + * then allocate a real vector when request_irq is called. + * So get msi_data here again to avoid spurious interrupt +@@ -890,20 +890,17 @@ unsupported_wcn6855_soc: + ret = ath11k_pci_config_msi_data(ab_pci); + if (ret) { + ath11k_err(ab, "failed to config msi_data: %d\n", ret); +- goto err_irq_affinity_cleanup; ++ goto err_free_irq; + } + + ret = ath11k_core_init(ab); + if (ret) { + ath11k_err(ab, "failed to init core: %d\n", ret); +- goto err_irq_affinity_cleanup; ++ goto err_free_irq; + } + ath11k_qmi_fwreset_from_cold_boot(ab); + return 0; + +-err_irq_affinity_cleanup: +- ath11k_pci_set_irq_affinity_hint(ab_pci, NULL); +- + err_free_irq: + ath11k_pcic_free_irq(ab); + +@@ -916,6 +913,9 @@ err_hal_srng_deinit: + err_mhi_unregister: + ath11k_mhi_unregister(ab_pci); + ++err_irq_affinity_cleanup: ++ ath11k_pci_set_irq_affinity_hint(ab_pci, NULL); ++ + err_pci_disable_msi: + ath11k_pci_free_msi(ab_pci); + diff --git a/package/kernel/mac80211/patches/ath11k/100-wifi-ath11k-use-unique-QRTR-instance-ID.patch b/package/kernel/mac80211/patches/ath11k/100-wifi-ath11k-use-unique-QRTR-instance-ID.patch index 39d5a61d5..30472b322 100644 --- a/package/kernel/mac80211/patches/ath11k/100-wifi-ath11k-use-unique-QRTR-instance-ID.patch +++ b/package/kernel/mac80211/patches/ath11k/100-wifi-ath11k-use-unique-QRTR-instance-ID.patch @@ -93,7 +93,7 @@ Signed-off-by: Robert Marko default: return "UNKNOWN"; } -@@ -336,27 +366,14 @@ static void ath11k_mhi_op_status_cb(stru +@@ -337,27 +367,14 @@ static void ath11k_mhi_op_status_cb(stru if (!(test_bit(ATH11K_FLAG_UNREGISTERING, &ab->dev_flags))) queue_work(ab->workqueue_aux, &ab->reset_work); break; @@ -138,7 +138,7 @@ Signed-off-by: Robert Marko int ath11k_mhi_register(struct ath11k_pci *ar_pci); --- a/drivers/net/wireless/ath/ath11k/pci.c +++ b/drivers/net/wireless/ath/ath11k/pci.c -@@ -370,13 +370,20 @@ static void ath11k_pci_sw_reset(struct a +@@ -371,13 +371,20 @@ static void ath11k_pci_sw_reset(struct a static void ath11k_pci_init_qmi_ce_config(struct ath11k_base *ab) { struct ath11k_qmi_ce_cfg *cfg = &ab->qmi.ce_cfg; diff --git a/package/kernel/mac80211/patches/ath11k/901-wifi-ath11k-pci-fix-compilation-in-5.16-and-older.patch b/package/kernel/mac80211/patches/ath11k/901-wifi-ath11k-pci-fix-compilation-in-5.16-and-older.patch index 721565638..9a0ca8009 100644 --- a/package/kernel/mac80211/patches/ath11k/901-wifi-ath11k-pci-fix-compilation-in-5.16-and-older.patch +++ b/package/kernel/mac80211/patches/ath11k/901-wifi-ath11k-pci-fix-compilation-in-5.16-and-older.patch @@ -15,7 +15,7 @@ Signed-off-by: Robert Marko --- a/drivers/net/wireless/ath/ath11k/pci.c +++ b/drivers/net/wireless/ath/ath11k/pci.c -@@ -458,7 +458,11 @@ static int ath11k_pci_alloc_msi(struct a +@@ -459,7 +459,11 @@ static int ath11k_pci_alloc_msi(struct a pci_read_config_dword(pci_dev, pci_dev->msi_cap + PCI_MSI_ADDRESS_LO, &ab->pci.msi.addr_lo); diff --git a/package/kernel/mac80211/patches/ath11k/902-ath11k-Disable-coldboot-calibration-for-IPQ8074.patch b/package/kernel/mac80211/patches/ath11k/902-ath11k-Disable-coldboot-calibration-for-IPQ8074.patch index 5454fa75e..0c92fa914 100644 --- a/package/kernel/mac80211/patches/ath11k/902-ath11k-Disable-coldboot-calibration-for-IPQ8074.patch +++ b/package/kernel/mac80211/patches/ath11k/902-ath11k-Disable-coldboot-calibration-for-IPQ8074.patch @@ -13,12 +13,14 @@ Signed-off-by: Robert Marko --- a/drivers/net/wireless/ath/ath11k/core.c +++ b/drivers/net/wireless/ath/ath11k/core.c -@@ -86,7 +86,7 @@ static const struct ath11k_hw_params ath +@@ -86,8 +86,8 @@ static const struct ath11k_hw_params ath .supports_shadow_regs = false, .idle_ps = false, .supports_sta_ps = false, -- .cold_boot_calib = true, -+ .cold_boot_calib = false, +- .coldboot_cal_mm = true, +- .coldboot_cal_ftm = true, ++ .coldboot_cal_mm = false, ++ .coldboot_cal_ftm = false, .cbcal_restart_fw = true, .fw_mem_mode = 0, .num_vdevs = 16 + 1, diff --git a/package/kernel/mac80211/patches/ath11k/903-ath11k-support-setting-FW-memory-mode-via-DT.patch b/package/kernel/mac80211/patches/ath11k/903-ath11k-support-setting-FW-memory-mode-via-DT.patch index 22c2493ca..71373b213 100644 --- a/package/kernel/mac80211/patches/ath11k/903-ath11k-support-setting-FW-memory-mode-via-DT.patch +++ b/package/kernel/mac80211/patches/ath11k/903-ath11k-support-setting-FW-memory-mode-via-DT.patch @@ -31,7 +31,7 @@ Signed-off-by: Robert Marko { .hw_rev = ATH11K_HW_IPQ8074, .name = "ipq8074 hw2.0", -@@ -1953,7 +1953,8 @@ static void ath11k_core_reset(struct wor +@@ -2040,7 +2040,8 @@ static void ath11k_core_reset(struct wor static int ath11k_init_hw_params(struct ath11k_base *ab) { const struct ath11k_hw_params *hw_params = NULL; @@ -41,7 +41,7 @@ Signed-off-by: Robert Marko for (i = 0; i < ARRAY_SIZE(ath11k_hw_params); i++) { hw_params = &ath11k_hw_params[i]; -@@ -1969,7 +1970,30 @@ static int ath11k_init_hw_params(struct +@@ -2056,7 +2057,31 @@ static int ath11k_init_hw_params(struct ab->hw_params = *hw_params; @@ -62,7 +62,8 @@ Signed-off-by: Robert Marko + ab->hw_params.fw_mem_mode = 2; + ab->hw_params.num_vdevs = 8; + ab->hw_params.num_peers = 128; -+ ab->hw_params.cold_boot_calib = false; ++ ab->hw_params.coldboot_cal_mm = false; ++ ab->hw_params.coldboot_cal_ftm = false; + } else + ath11k_info(ab, "Unsupported FW memory mode: %u\n", fw_mem_mode); + } diff --git a/package/kernel/mac80211/patches/ath11k/906-ath11k-Disable-coldboot-calibration-for-IPQ6018.patch b/package/kernel/mac80211/patches/ath11k/906-ath11k-Disable-coldboot-calibration-for-IPQ6018.patch new file mode 100644 index 000000000..39a11d722 --- /dev/null +++ b/package/kernel/mac80211/patches/ath11k/906-ath11k-Disable-coldboot-calibration-for-IPQ6018.patch @@ -0,0 +1,13 @@ +--- a/drivers/net/wireless/ath/ath11k/core.c ++++ b/drivers/net/wireless/ath/ath11k/core.c +@@ -168,8 +168,8 @@ static struct ath11k_hw_params ath11k_hw + .supports_shadow_regs = false, + .idle_ps = false, + .supports_sta_ps = false, +- .coldboot_cal_mm = true, +- .coldboot_cal_ftm = true, ++ .coldboot_cal_mm = false, ++ .coldboot_cal_ftm = false, + .cbcal_restart_fw = true, + .fw_mem_mode = 0, + .num_vdevs = 16 + 1, diff --git a/package/kernel/mac80211/patches/ath9k/500-ath9k_eeprom_debugfs.patch b/package/kernel/mac80211/patches/ath9k/500-ath9k_eeprom_debugfs.patch index 2f5e75be8..e2bbb4a1b 100644 --- a/package/kernel/mac80211/patches/ath9k/500-ath9k_eeprom_debugfs.patch +++ b/package/kernel/mac80211/patches/ath9k/500-ath9k_eeprom_debugfs.patch @@ -1,6 +1,6 @@ --- a/drivers/net/wireless/ath/ath9k/debug.c +++ b/drivers/net/wireless/ath/ath9k/debug.c -@@ -1413,6 +1413,54 @@ void ath9k_deinit_debug(struct ath_softc +@@ -1413,6 +1413,53 @@ void ath9k_deinit_debug(struct ath_softc ath9k_cmn_spectral_deinit_debug(&sc->spec_priv); } @@ -39,8 +39,7 @@ + } else { + bytes = 2; + } -+ if (copy_to_user(user_buf, from, bytes)) -+ return -EFAULT; ++ copy_to_user(user_buf, from, bytes); + user_buf += bytes; + } + return *ppos - pos; @@ -55,7 +54,7 @@ int ath9k_init_debug(struct ath_hw *ah) { struct ath_common *common = ath9k_hw_common(ah); -@@ -1432,6 +1480,8 @@ int ath9k_init_debug(struct ath_hw *ah) +@@ -1432,6 +1479,8 @@ int ath9k_init_debug(struct ath_hw *ah) ath9k_tx99_init_debug(sc); ath9k_cmn_spectral_init_debug(&sc->spec_priv, sc->debug.debugfs_phy); diff --git a/package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch b/package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch index a871e458a..0c8b6920c 100644 --- a/package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch +++ b/package/kernel/mac80211/patches/ath9k/512-ath9k_channelbw_debugfs.patch @@ -1,6 +1,6 @@ --- a/drivers/net/wireless/ath/ath9k/debug.c +++ b/drivers/net/wireless/ath/ath9k/debug.c -@@ -1461,6 +1461,52 @@ static const struct file_operations fops +@@ -1460,6 +1460,52 @@ static const struct file_operations fops .owner = THIS_MODULE }; @@ -53,7 +53,7 @@ int ath9k_init_debug(struct ath_hw *ah) { struct ath_common *common = ath9k_hw_common(ah); -@@ -1482,6 +1528,8 @@ int ath9k_init_debug(struct ath_hw *ah) +@@ -1481,6 +1527,8 @@ int ath9k_init_debug(struct ath_hw *ah) debugfs_create_file("eeprom", S_IRUSR, sc->debug.debugfs_phy, sc, &fops_eeprom); diff --git a/package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch b/package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch index 74506657e..1fe004102 100644 --- a/package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch +++ b/package/kernel/mac80211/patches/ath9k/530-ath9k_extra_leds.patch @@ -192,7 +192,7 @@ #endif --- a/drivers/net/wireless/ath/ath9k/debug.c +++ b/drivers/net/wireless/ath/ath9k/debug.c -@@ -1506,6 +1506,61 @@ static const struct file_operations fops +@@ -1505,6 +1505,61 @@ static const struct file_operations fops .llseek = default_llseek, }; @@ -254,7 +254,7 @@ int ath9k_init_debug(struct ath_hw *ah) { -@@ -1530,6 +1585,10 @@ int ath9k_init_debug(struct ath_hw *ah) +@@ -1529,6 +1584,10 @@ int ath9k_init_debug(struct ath_hw *ah) &fops_eeprom); debugfs_create_file("chanbw", S_IRUSR | S_IWUSR, sc->debug.debugfs_phy, sc, &fops_chanbw); diff --git a/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch b/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch index e09bbc08e..70f7ee365 100644 --- a/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch +++ b/package/kernel/mac80211/patches/ath9k/542-ath9k_debugfs_diag.patch @@ -1,6 +1,6 @@ --- a/drivers/net/wireless/ath/ath9k/debug.c +++ b/drivers/net/wireless/ath/ath9k/debug.c -@@ -1562,6 +1562,50 @@ static const struct file_operations fops +@@ -1561,6 +1561,50 @@ static const struct file_operations fops #endif @@ -51,7 +51,7 @@ int ath9k_init_debug(struct ath_hw *ah) { struct ath_common *common = ath9k_hw_common(ah); -@@ -1589,6 +1633,8 @@ int ath9k_init_debug(struct ath_hw *ah) +@@ -1588,6 +1632,8 @@ int ath9k_init_debug(struct ath_hw *ah) debugfs_create_file("gpio_led", S_IWUSR, sc->debug.debugfs_phy, sc, &fops_gpio_led); #endif diff --git a/package/kernel/mac80211/patches/brcm/860-brcmfmac-register-wiphy-s-during-module_init.patch b/package/kernel/mac80211/patches/brcm/860-brcmfmac-register-wiphy-s-during-module_init.patch new file mode 100644 index 000000000..9d0f3e20b --- /dev/null +++ b/package/kernel/mac80211/patches/brcm/860-brcmfmac-register-wiphy-s-during-module_init.patch @@ -0,0 +1,64 @@ +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Mon, 8 Jun 2015 16:11:40 +0200 +Subject: [PATCH] brcmfmac: register wiphy(s) during module_init +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This is needed by OpenWrt which expects all PHYs to be created after +module loads successfully. + +Signed-off-by: Rafał Miłecki +--- + +--- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c ++++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/firmware.c +@@ -459,6 +459,7 @@ struct brcmf_fw { + u32 curpos; + unsigned int board_index; + void (*done)(struct device *dev, int err, struct brcmf_fw_request *req); ++ struct completion *completion; + }; + + #ifdef CONFIG_EFI +@@ -686,6 +687,8 @@ static void brcmf_fw_request_done(const + fwctx->req = NULL; + } + fwctx->done(fwctx->dev, ret, fwctx->req); ++ if (fwctx->completion) ++ complete(fwctx->completion); + kfree(fwctx); + } + +@@ -751,6 +754,8 @@ int brcmf_fw_get_firmwares(struct device + { + struct brcmf_fw_item *first = &req->items[0]; + struct brcmf_fw *fwctx; ++ struct completion completion; ++ unsigned long time_left; + char *alt_path = NULL; + int ret; + +@@ -768,6 +773,9 @@ int brcmf_fw_get_firmwares(struct device + fwctx->dev = dev; + fwctx->req = req; + fwctx->done = fw_cb; ++ ++ init_completion(&completion); ++ fwctx->completion = &completion; + + /* First try alternative board-specific path if any */ + if (fwctx->req->board_types[0]) +@@ -787,6 +795,12 @@ int brcmf_fw_get_firmwares(struct device + if (ret < 0) + brcmf_fw_request_done(NULL, fwctx); + ++ ++ time_left = wait_for_completion_timeout(&completion, ++ msecs_to_jiffies(5000)); ++ if (!time_left && fwctx) ++ fwctx->completion = NULL; ++ + return 0; + } + diff --git a/package/kernel/mac80211/patches/brcm/865-brcmfmac-Read-alternative-firmware-names-from-DT.patch b/package/kernel/mac80211/patches/brcm/865-brcmfmac-Read-alternative-firmware-names-from-DT.patch index 8df285f8b..8ed81f600 100644 --- a/package/kernel/mac80211/patches/brcm/865-brcmfmac-Read-alternative-firmware-names-from-DT.patch +++ b/package/kernel/mac80211/patches/brcm/865-brcmfmac-Read-alternative-firmware-names-from-DT.patch @@ -65,26 +65,22 @@ Signed-off-by: Phil Elwell +} --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.h +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/of.h -@@ -5,9 +5,20 @@ +@@ -5,9 +5,16 @@ #ifdef CONFIG_OF void brcmf_of_probe(struct device *dev, enum brcmf_bus_type bus_type, struct brcmf_mp_device *settings); -+#ifdef CPTCFG_BRCMFMAC_SDIO +struct brcmf_firmware_mapping * +brcmf_of_fwnames(struct device *dev, u32 *map_count); -+#endif #else static void brcmf_of_probe(struct device *dev, enum brcmf_bus_type bus_type, struct brcmf_mp_device *settings) { } -+#ifdef CPTCFG_BRCMFMAC_SDIO +static struct brcmf_firmware_mapping * +brcmf_of_fwnames(struct device *dev, u32 *map_count) +{ + return NULL; +} -+#endif #endif /* CONFIG_OF */ --- a/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c +++ b/drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c diff --git a/package/kernel/mac80211/patches/build/050-lib80211_option.patch b/package/kernel/mac80211/patches/build/050-lib80211_option.patch new file mode 100644 index 000000000..c1b1bc757 --- /dev/null +++ b/package/kernel/mac80211/patches/build/050-lib80211_option.patch @@ -0,0 +1,34 @@ +--- a/net/wireless/Kconfig ++++ b/net/wireless/Kconfig +@@ -188,7 +188,7 @@ config CFG80211_WEXT_EXPORT + endif # CFG80211 + + config LIB80211 +- tristate ++ tristate "lib80211" + depends on m + default n + help +@@ -198,19 +198,19 @@ config LIB80211 + Drivers should select this themselves if needed. + + config LIB80211_CRYPT_WEP +- tristate ++ tristate "lib80211 WEP support" + depends on m + select BPAUTO_CRYPTO_LIB_ARC4 + + config LIB80211_CRYPT_CCMP +- tristate ++ tristate "lib80211 CCMP support" + depends on m + depends on CRYPTO + depends on CRYPTO_AES + depends on CRYPTO_CCM + + config LIB80211_CRYPT_TKIP +- tristate ++ tristate "lib80211 TKIP support" + depends on m + select BPAUTO_CRYPTO_LIB_ARC4 + diff --git a/package/kernel/mac80211/patches/build/099-netlink-range.patch b/package/kernel/mac80211/patches/build/099-netlink-range.patch new file mode 100644 index 000000000..0df2b38fa --- /dev/null +++ b/package/kernel/mac80211/patches/build/099-netlink-range.patch @@ -0,0 +1,91 @@ +--- a/net/wireless/nl80211.c ++++ b/net/wireless/nl80211.c +@@ -421,8 +421,13 @@ static const struct nla_policy + nl80211_fils_discovery_policy[NL80211_FILS_DISCOVERY_ATTR_MAX + 1] = { + [NL80211_FILS_DISCOVERY_ATTR_INT_MIN] = NLA_POLICY_MAX(NLA_U32, 10000), + [NL80211_FILS_DISCOVERY_ATTR_INT_MAX] = NLA_POLICY_MAX(NLA_U32, 10000), ++#if LINUX_VERSION_IS_GEQ(5,10,0) + [NL80211_FILS_DISCOVERY_ATTR_TMPL] = + NLA_POLICY_BINARY_RANGE(NL80211_FILS_DISCOVERY_TMPL_MIN_LEN, IEEE80211_MAX_DATA_LEN), ++#else ++ [NL80211_FILS_DISCOVERY_ATTR_TMPL] = { .type = NLA_BINARY, ++ .len = IEEE80211_MAX_DATA_LEN }, ++#endif + }; + + static const struct nla_policy +@@ -533,7 +538,11 @@ static const struct nla_policy nl80211_p + [NL80211_ATTR_MPATH_NEXT_HOP] = NLA_POLICY_ETH_ADDR_COMPAT, + + /* allow 3 for NUL-termination, we used to declare this NLA_STRING */ ++#if LINUX_VERSION_IS_GEQ(5,10,0) + [NL80211_ATTR_REG_ALPHA2] = NLA_POLICY_BINARY_RANGE(2, 3), ++#else ++ [NL80211_ATTR_REG_ALPHA2] = { .type = NLA_STRING, .len = 2 }, ++#endif + [NL80211_ATTR_REG_RULES] = { .type = NLA_NESTED }, + + [NL80211_ATTR_BSS_CTS_PROT] = { .type = NLA_U8 }, +@@ -679,14 +688,24 @@ static const struct nla_policy nl80211_p + * The value of the Length field of the Supported Operating + * Classes element is between 2 and 253. + */ ++#if LINUX_VERSION_IS_GEQ(5,10,0) + [NL80211_ATTR_STA_SUPPORTED_OPER_CLASSES] = + NLA_POLICY_BINARY_RANGE(2, 253), ++#else ++ [NL80211_ATTR_STA_SUPPORTED_OPER_CLASSES] = ++ { .type = NLA_BINARY }, ++#endif + [NL80211_ATTR_HANDLE_DFS] = { .type = NLA_FLAG }, + [NL80211_ATTR_OPMODE_NOTIF] = { .type = NLA_U8 }, + [NL80211_ATTR_VENDOR_ID] = { .type = NLA_U32 }, + [NL80211_ATTR_VENDOR_SUBCMD] = { .type = NLA_U32 }, + [NL80211_ATTR_VENDOR_DATA] = { .type = NLA_BINARY }, ++#if LINUX_VERSION_IS_GEQ(5,10,0) + [NL80211_ATTR_QOS_MAP] = NLA_POLICY_BINARY_RANGE(IEEE80211_QOS_MAP_LEN_MIN, IEEE80211_QOS_MAP_LEN_MAX), ++#else ++ [NL80211_ATTR_QOS_MAP] = { .type = NLA_BINARY, ++ .len = IEEE80211_QOS_MAP_LEN_MAX }, ++#endif + [NL80211_ATTR_MAC_HINT] = NLA_POLICY_EXACT_LEN_WARN(ETH_ALEN), + [NL80211_ATTR_WIPHY_FREQ_HINT] = { .type = NLA_U32 }, + [NL80211_ATTR_TDLS_PEER_CAPABILITY] = { .type = NLA_U32 }, +@@ -741,9 +760,14 @@ static const struct nla_policy nl80211_p + [NL80211_ATTR_TXQ_LIMIT] = { .type = NLA_U32 }, + [NL80211_ATTR_TXQ_MEMORY_LIMIT] = { .type = NLA_U32 }, + [NL80211_ATTR_TXQ_QUANTUM] = { .type = NLA_U32 }, ++#if LINUX_VERSION_IS_GEQ(5,10,0) + [NL80211_ATTR_HE_CAPABILITY] = + NLA_POLICY_VALIDATE_FN(NLA_BINARY, validate_he_capa, + NL80211_HE_MAX_CAPABILITY_LEN), ++#else ++ [NL80211_ATTR_HE_CAPABILITY] = { .type = NLA_BINARY, ++ .len = NL80211_HE_MAX_CAPABILITY_LEN }, ++#endif + [NL80211_ATTR_FTM_RESPONDER] = + NLA_POLICY_NESTED(nl80211_ftm_responder_policy), + [NL80211_ATTR_TIMEOUT] = NLA_POLICY_MIN(NLA_U32, 1), +@@ -16392,9 +16416,11 @@ static const struct genl_ops nl80211_ops + /* can be retrieved by unprivileged users */ + .internal_flags = IFLAGS(NL80211_FLAG_NEED_WIPHY), + }, ++#if LINUX_VERSION_IS_GEQ(5,10,0) + }; + + static const struct genl_small_ops nl80211_small_ops[] = { ++#endif + { + .cmd = NL80211_CMD_SET_WIPHY, + .validate = GENL_DONT_VALIDATE_STRICT | GENL_DONT_VALIDATE_DUMP, +@@ -17231,8 +17257,10 @@ static struct genl_family nl80211_fam __ + .module = THIS_MODULE, + .ops = nl80211_ops, + .n_ops = ARRAY_SIZE(nl80211_ops), ++#if LINUX_VERSION_IS_GEQ(5,10,0) + .small_ops = nl80211_small_ops, + .n_small_ops = ARRAY_SIZE(nl80211_small_ops), ++#endif + #if LINUX_VERSION_IS_GEQ(6,1,0) + .resv_start_op = NL80211_CMD_REMOVE_LINK_STA + 1, + #endif diff --git a/package/kernel/mac80211/patches/build/990-add_kernel_6.6_support.patch b/package/kernel/mac80211/patches/build/990-add_kernel_6.6_support.patch new file mode 100644 index 000000000..2ced0316d --- /dev/null +++ b/package/kernel/mac80211/patches/build/990-add_kernel_6.6_support.patch @@ -0,0 +1,113 @@ +--- a/net/wireless/sysfs.c ++++ b/net/wireless/sysfs.c +@@ -148,12 +148,21 @@ static SIMPLE_DEV_PM_OPS(wiphy_pm_ops, w + #define WIPHY_PM_OPS NULL + #endif + ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 4, 0) ++static const void *wiphy_namespace(const struct device *d) ++{ ++ struct wiphy *wiphy = container_of(d, struct wiphy, dev); ++ ++ return wiphy_net(wiphy); ++} ++#else + static const void *wiphy_namespace(struct device *d) + { + struct wiphy *wiphy = container_of(d, struct wiphy, dev); + + return wiphy_net(wiphy); + } ++#endif + + struct class ieee80211_class = { + .name = "ieee80211", +--- a/net/wireless/nl80211.c ++++ b/net/wireless/nl80211.c +@@ -16158,8 +16158,14 @@ static u32 nl80211_internal_flags[] = { + #undef SELECTOR + }; + ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 4, 0) ++static int nl80211_pre_doit(const struct genl_split_ops *ops, ++ struct sk_buff *skb, ++ struct genl_info *info) ++#else + static int nl80211_pre_doit(const struct genl_ops *ops, struct sk_buff *skb, + struct genl_info *info) ++#endif + { + struct cfg80211_registered_device *rdev = NULL; + struct wireless_dev *wdev = NULL; +@@ -16259,8 +16265,14 @@ out_unlock: + return err; + } + ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 4, 0) ++static void nl80211_post_doit(const struct genl_split_ops *ops, ++ struct sk_buff *skb, ++ struct genl_info *info) ++#else + static void nl80211_post_doit(const struct genl_ops *ops, struct sk_buff *skb, + struct genl_info *info) ++#endif + { + u32 internal_flags = nl80211_internal_flags[ops->internal_flags]; + +--- a/net/mac80211/tx.c ++++ b/net/mac80211/tx.c +@@ -27,6 +27,10 @@ + #include + #include + ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 4, 0) ++#include ++#endif ++ + #include "ieee80211_i.h" + #include "driver-ops.h" + #include "led.h" +--- a/drivers/net/wireless/intel/iwlwifi/mvm/tx.c ++++ b/drivers/net/wireless/intel/iwlwifi/mvm/tx.c +@@ -10,6 +10,10 @@ + #include + #include + ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 4, 0) ++#include ++#endif ++ + #include "iwl-trans.h" + #include "iwl-eeprom-parse.h" + #include "mvm.h" +--- a/include/net/mac80211.h ++++ b/include/net/mac80211.h +@@ -1435,6 +1435,7 @@ enum mac80211_rx_encoding { + RX_ENC_HT, + RX_ENC_VHT, + RX_ENC_HE, ++ RX_ENC_EHT, + }; + + /** +@@ -1497,8 +1498,18 @@ struct ieee80211_rx_status { + u32 flag; + u16 freq: 13, freq_offset: 1; + u8 enc_flags; +- u8 encoding:2, bw:3, he_ru:3; +- u8 he_gi:2, he_dcm:1; ++ u8 encoding:3, bw:4; ++ union { ++ struct { ++ u8 he_ru:3; ++ u8 he_gi:2; ++ u8 he_dcm:1; ++ }; ++ struct { ++ u8 ru:4; ++ u8 gi:2; ++ } eht; ++ }; + u8 rate_idx; + u8 nss; + u8 rx_flags; diff --git a/package/kernel/mac80211/patches/rtl/001-wifi-rtw88-fix-race-condition-when-doing-H2C-command.patch b/package/kernel/mac80211/patches/rtl/001-wifi-rtw88-fix-race-condition-when-doing-H2C-command.patch deleted file mode 100644 index 2c7cdf852..000000000 --- a/package/kernel/mac80211/patches/rtl/001-wifi-rtw88-fix-race-condition-when-doing-H2C-command.patch +++ /dev/null @@ -1,73 +0,0 @@ -From dee121b45dd1eef42b5da093bf1ebeb80a7955bb Mon Sep 17 00:00:00 2001 -From: Ji-Pin Jou -Date: Thu, 24 Nov 2022 14:44:42 +0800 -Subject: [PATCH 01/13] wifi: rtw88: fix race condition when doing H2C command - -For SDIO/USB interface, since the tranferring speed is slower than -that in PCIE, it may have race condition when the driver sets down -H2C command to the FW. - -In the function rtw_fw_send_h2c_command, before the patch, box_reg -is written first, then box_ex_reg is written. FW starts to work and -fetch the value of box_ex_reg, when the most significant byte of -box_reg(4 bytes) is written. Meanwhile, for SDIO/USB interface, -since the transferring speed is slow, the driver is still in writing -the new value of box_ex_reg through the bus, and FW may get the -wrong value of box_ex_reg at the moment. - -To prevent the above driver/FW racing situation, box_ex_reg is -written first then box_reg. Furthermore, it is written in 4 bytes at -a time, instead of written in one byte one by one. It can increase -the speed for SDIO/USB interface. - -Signed-off-by: Ji-Pin Jou -Signed-off-by: Ping-Ke Shih -Tested-by: Sascha Hauer -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221124064442.28042-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/fw.c | 8 +++----- - drivers/net/wireless/realtek/rtw88/fw.h | 5 +++++ - 2 files changed, 8 insertions(+), 5 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/fw.c -+++ b/drivers/net/wireless/realtek/rtw88/fw.c -@@ -311,10 +311,10 @@ EXPORT_SYMBOL(rtw_fw_c2h_cmd_isr); - static void rtw_fw_send_h2c_command(struct rtw_dev *rtwdev, - u8 *h2c) - { -+ struct rtw_h2c_cmd *h2c_cmd = (struct rtw_h2c_cmd *)h2c; - u8 box; - u8 box_state; - u32 box_reg, box_ex_reg; -- int idx; - int ret; - - rtw_dbg(rtwdev, RTW_DBG_FW, -@@ -356,10 +356,8 @@ static void rtw_fw_send_h2c_command(stru - goto out; - } - -- for (idx = 0; idx < 4; idx++) -- rtw_write8(rtwdev, box_reg + idx, h2c[idx]); -- for (idx = 0; idx < 4; idx++) -- rtw_write8(rtwdev, box_ex_reg + idx, h2c[idx + 4]); -+ rtw_write32(rtwdev, box_ex_reg, le32_to_cpu(h2c_cmd->msg_ext)); -+ rtw_write32(rtwdev, box_reg, le32_to_cpu(h2c_cmd->msg)); - - if (++rtwdev->h2c.last_box_num >= 4) - rtwdev->h2c.last_box_num = 0; ---- a/drivers/net/wireless/realtek/rtw88/fw.h -+++ b/drivers/net/wireless/realtek/rtw88/fw.h -@@ -81,6 +81,11 @@ struct rtw_c2h_adaptivity { - u8 option; - } __packed; - -+struct rtw_h2c_cmd { -+ __le32 msg; -+ __le32 msg_ext; -+} __packed; -+ - enum rtw_rsvd_packet_type { - RSVD_BEACON, - RSVD_DUMMY, diff --git a/package/kernel/mac80211/patches/rtl/002-wifi-rtw88-8821c-enable-BT-device-recovery-mechanism.patch b/package/kernel/mac80211/patches/rtl/002-wifi-rtw88-8821c-enable-BT-device-recovery-mechanism.patch deleted file mode 100644 index 9149e989d..000000000 --- a/package/kernel/mac80211/patches/rtl/002-wifi-rtw88-8821c-enable-BT-device-recovery-mechanism.patch +++ /dev/null @@ -1,100 +0,0 @@ -From 91759247856dc65b69f71812a0903f59680f9890 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 28 Nov 2022 15:56:53 +0800 -Subject: [PATCH 02/13] wifi: rtw88: 8821c: enable BT device recovery mechanism - -8821ce is a combo card, and BT is a USB device that could get card lost -during stress test, and need WiFi firmware to detect and recover it, so -driver sends a H2C to enable this mechanism. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221128075653.5221-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/fw.c | 10 ++++++++++ - drivers/net/wireless/realtek/rtw88/fw.h | 6 ++++++ - drivers/net/wireless/realtek/rtw88/mac.c | 18 +++++++++++++++++- - 3 files changed, 33 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/fw.c -+++ b/drivers/net/wireless/realtek/rtw88/fw.c -@@ -822,6 +822,16 @@ void rtw_fw_set_nlo_info(struct rtw_dev - rtw_fw_send_h2c_command(rtwdev, h2c_pkt); - } - -+void rtw_fw_set_recover_bt_device(struct rtw_dev *rtwdev) -+{ -+ u8 h2c_pkt[H2C_PKT_SIZE] = {0}; -+ -+ SET_H2C_CMD_ID_CLASS(h2c_pkt, H2C_CMD_RECOVER_BT_DEV); -+ SET_RECOVER_BT_DEV_EN(h2c_pkt, 1); -+ -+ rtw_fw_send_h2c_command(rtwdev, h2c_pkt); -+} -+ - void rtw_fw_set_pg_info(struct rtw_dev *rtwdev) - { - struct rtw_lps_conf *conf = &rtwdev->lps_conf; ---- a/drivers/net/wireless/realtek/rtw88/fw.h -+++ b/drivers/net/wireless/realtek/rtw88/fw.h -@@ -555,6 +555,8 @@ static inline void rtw_h2c_pkt_set_heade - #define H2C_CMD_AOAC_GLOBAL_INFO 0x82 - #define H2C_CMD_NLO_INFO 0x8C - -+#define H2C_CMD_RECOVER_BT_DEV 0xD1 -+ - #define SET_H2C_CMD_ID_CLASS(h2c_pkt, value) \ - le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(7, 0)) - -@@ -754,6 +756,9 @@ static inline void rtw_h2c_pkt_set_heade - #define SET_NLO_LOC_NLO_INFO(h2c_pkt, value) \ - le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, GENMASK(23, 16)) - -+#define SET_RECOVER_BT_DEV_EN(h2c_pkt, value) \ -+ le32p_replace_bits((__le32 *)(h2c_pkt) + 0x00, value, BIT(8)) -+ - #define GET_FW_DUMP_LEN(_header) \ - le32_get_bits(*((__le32 *)(_header) + 0x00), GENMASK(15, 0)) - #define GET_FW_DUMP_SEQ(_header) \ -@@ -843,6 +848,7 @@ void rtw_fw_set_aoac_global_info_cmd(str - u8 group_key_enc); - - void rtw_fw_set_nlo_info(struct rtw_dev *rtwdev, bool enable); -+void rtw_fw_set_recover_bt_device(struct rtw_dev *rtwdev); - void rtw_fw_update_pkt_probe_req(struct rtw_dev *rtwdev, - struct cfg80211_ssid *ssid); - void rtw_fw_channel_switch(struct rtw_dev *rtwdev, bool enable); ---- a/drivers/net/wireless/realtek/rtw88/mac.c -+++ b/drivers/net/wireless/realtek/rtw88/mac.c -@@ -916,7 +916,8 @@ out: - return ret; - } - --int rtw_download_firmware(struct rtw_dev *rtwdev, struct rtw_fw_state *fw) -+static -+int _rtw_download_firmware(struct rtw_dev *rtwdev, struct rtw_fw_state *fw) - { - if (rtw_chip_wcpu_11n(rtwdev)) - return __rtw_download_firmware_legacy(rtwdev, fw); -@@ -924,6 +925,21 @@ int rtw_download_firmware(struct rtw_dev - return __rtw_download_firmware(rtwdev, fw); - } - -+int rtw_download_firmware(struct rtw_dev *rtwdev, struct rtw_fw_state *fw) -+{ -+ int ret; -+ -+ ret = _rtw_download_firmware(rtwdev, fw); -+ if (ret) -+ return ret; -+ -+ if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_PCIE && -+ rtwdev->chip->id == RTW_CHIP_TYPE_8821C) -+ rtw_fw_set_recover_bt_device(rtwdev); -+ -+ return 0; -+} -+ - static u32 get_priority_queues(struct rtw_dev *rtwdev, u32 queues) - { - const struct rtw_rqpn *rqpn = rtwdev->fifo.rqpn; diff --git a/package/kernel/mac80211/patches/rtl/003-wifi-rtw88-print-firmware-type-in-info-message.patch b/package/kernel/mac80211/patches/rtl/003-wifi-rtw88-print-firmware-type-in-info-message.patch deleted file mode 100644 index 2bc94f353..000000000 --- a/package/kernel/mac80211/patches/rtl/003-wifi-rtw88-print-firmware-type-in-info-message.patch +++ /dev/null @@ -1,56 +0,0 @@ -From a02233a1346132efe6dda33237a0b07771fbb09b Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 2 Dec 2022 09:12:14 +0100 -Subject: [PATCH 03/13] wifi: rtw88: print firmware type in info message - -It's confusing to read two different firmware versions in the syslog -for the same device: - -rtw_8822cu 2-1:1.2: Firmware version 9.9.4, H2C version 15 -rtw_8822cu 2-1:1.2: Firmware version 9.9.11, H2C version 15 - -Print the firmware type in this message to make clear these are really -two different firmwares for different purposes: - -rtw_8822cu 1-1.4:1.2: WOW Firmware version 9.9.4, H2C version 15 -rtw_8822cu 1-1.4:1.2: Firmware version 9.9.11, H2C version 15 - -Signed-off-by: Sascha Hauer -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202081224.2779981-2-s.hauer@pengutronix.de ---- - drivers/net/wireless/realtek/rtw88/main.c | 4 +++- - drivers/net/wireless/realtek/rtw88/main.h | 1 + - 2 files changed, 4 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -1731,7 +1731,8 @@ static void rtw_load_firmware_cb(const s - update_firmware_info(rtwdev, fw); - complete_all(&fw->completion); - -- rtw_info(rtwdev, "Firmware version %u.%u.%u, H2C version %u\n", -+ rtw_info(rtwdev, "%sFirmware version %u.%u.%u, H2C version %u\n", -+ fw->type == RTW_WOWLAN_FW ? "WOW " : "", - fw->version, fw->sub_version, fw->sub_index, fw->h2c_version); - } - -@@ -1757,6 +1758,7 @@ static int rtw_load_firmware(struct rtw_ - return -ENOENT; - } - -+ fw->type = type; - fw->rtwdev = rtwdev; - init_completion(&fw->completion); - ---- a/drivers/net/wireless/realtek/rtw88/main.h -+++ b/drivers/net/wireless/realtek/rtw88/main.h -@@ -1851,6 +1851,7 @@ struct rtw_fw_state { - u16 h2c_version; - u32 feature; - u32 feature_ext; -+ enum rtw_fw_type type; - }; - - enum rtw_sar_sources { diff --git a/package/kernel/mac80211/patches/rtl/004-wifi-rtw88-Call-rtw_fw_beacon_filter_config-with-rtw.patch b/package/kernel/mac80211/patches/rtl/004-wifi-rtw88-Call-rtw_fw_beacon_filter_config-with-rtw.patch deleted file mode 100644 index cb78356f7..000000000 --- a/package/kernel/mac80211/patches/rtl/004-wifi-rtw88-Call-rtw_fw_beacon_filter_config-with-rtw.patch +++ /dev/null @@ -1,30 +0,0 @@ -From ca6f02262c480ed49c5c6e41a0634c75b9a47dca Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 2 Dec 2022 09:12:15 +0100 -Subject: [PATCH 04/13] wifi: rtw88: Call rtw_fw_beacon_filter_config() with - rtwdev->mutex held - -rtw_fw_beacon_filter_config() is called once with rtwdev->mutex held -and once without the mutex held. Call it consistently with rtwdev->mutex -held. - -Signed-off-by: Sascha Hauer -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202081224.2779981-3-s.hauer@pengutronix.de ---- - drivers/net/wireless/realtek/rtw88/mac80211.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c -@@ -487,8 +487,8 @@ static int rtw_ops_sta_remove(struct iee - { - struct rtw_dev *rtwdev = hw->priv; - -- rtw_fw_beacon_filter_config(rtwdev, false, vif); - mutex_lock(&rtwdev->mutex); -+ rtw_fw_beacon_filter_config(rtwdev, false, vif); - rtw_sta_remove(rtwdev, sta, true); - mutex_unlock(&rtwdev->mutex); - diff --git a/package/kernel/mac80211/patches/rtl/005-wifi-rtw88-Drop-rf_lock.patch b/package/kernel/mac80211/patches/rtl/005-wifi-rtw88-Drop-rf_lock.patch deleted file mode 100644 index 2c0ffd8f2..000000000 --- a/package/kernel/mac80211/patches/rtl/005-wifi-rtw88-Drop-rf_lock.patch +++ /dev/null @@ -1,132 +0,0 @@ -From 293a0c7587a4dbfa700e23bc93f80dd2ad40ed59 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 2 Dec 2022 09:12:16 +0100 -Subject: [PATCH 05/13] wifi: rtw88: Drop rf_lock - -The rtwdev->rf_lock spinlock protects the rf register accesses in -rtw_read_rf() and rtw_write_rf(). Most callers of these functions hold -rtwdev->mutex already with the exception of the callsites in the debugfs -code. The debugfs code doesn't justify an extra lock, so acquire the mutex -there as well before calling rf register accessors and drop the now -unnecessary spinlock. - -Signed-off-by: Sascha Hauer -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202081224.2779981-4-s.hauer@pengutronix.de ---- - drivers/net/wireless/realtek/rtw88/debug.c | 11 +++++++++++ - drivers/net/wireless/realtek/rtw88/hci.h | 9 +++------ - drivers/net/wireless/realtek/rtw88/main.c | 1 - - drivers/net/wireless/realtek/rtw88/main.h | 3 --- - 4 files changed, 14 insertions(+), 10 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/debug.c -+++ b/drivers/net/wireless/realtek/rtw88/debug.c -@@ -144,7 +144,9 @@ static int rtw_debugfs_get_rf_read(struc - addr = debugfs_priv->rf_addr; - mask = debugfs_priv->rf_mask; - -+ mutex_lock(&rtwdev->mutex); - val = rtw_read_rf(rtwdev, path, addr, mask); -+ mutex_unlock(&rtwdev->mutex); - - seq_printf(m, "rf_read path:%d addr:0x%08x mask:0x%08x val=0x%08x\n", - path, addr, mask, val); -@@ -414,7 +416,9 @@ static ssize_t rtw_debugfs_set_rf_write( - return count; - } - -+ mutex_lock(&rtwdev->mutex); - rtw_write_rf(rtwdev, path, addr, mask, val); -+ mutex_unlock(&rtwdev->mutex); - rtw_dbg(rtwdev, RTW_DBG_DEBUGFS, - "write_rf path:%d addr:0x%08x mask:0x%08x, val:0x%08x\n", - path, addr, mask, val); -@@ -519,6 +523,8 @@ static int rtw_debug_get_rf_dump(struct - u32 addr, offset, data; - u8 path; - -+ mutex_lock(&rtwdev->mutex); -+ - for (path = 0; path < rtwdev->hal.rf_path_num; path++) { - seq_printf(m, "RF path:%d\n", path); - for (addr = 0; addr < 0x100; addr += 4) { -@@ -533,6 +539,8 @@ static int rtw_debug_get_rf_dump(struct - seq_puts(m, "\n"); - } - -+ mutex_unlock(&rtwdev->mutex); -+ - return 0; - } - -@@ -1026,6 +1034,8 @@ static void dump_gapk_status(struct rtw_ - dm_info->dm_flags & BIT(RTW_DM_CAP_TXGAPK) ? '-' : '+', - rtw_dm_cap_strs[RTW_DM_CAP_TXGAPK]); - -+ mutex_lock(&rtwdev->mutex); -+ - for (path = 0; path < rtwdev->hal.rf_path_num; path++) { - val = rtw_read_rf(rtwdev, path, RF_GAINTX, RFREG_MASK); - seq_printf(m, "path %d:\n0x%x = 0x%x\n", path, RF_GAINTX, val); -@@ -1035,6 +1045,7 @@ static void dump_gapk_status(struct rtw_ - txgapk->rf3f_fs[path][i], i); - seq_puts(m, "\n"); - } -+ mutex_unlock(&rtwdev->mutex); - } - - static int rtw_debugfs_get_dm_cap(struct seq_file *m, void *v) ---- a/drivers/net/wireless/realtek/rtw88/hci.h -+++ b/drivers/net/wireless/realtek/rtw88/hci.h -@@ -166,12 +166,11 @@ static inline u32 - rtw_read_rf(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path, - u32 addr, u32 mask) - { -- unsigned long flags; - u32 val; - -- spin_lock_irqsave(&rtwdev->rf_lock, flags); -+ lockdep_assert_held(&rtwdev->mutex); -+ - val = rtwdev->chip->ops->read_rf(rtwdev, rf_path, addr, mask); -- spin_unlock_irqrestore(&rtwdev->rf_lock, flags); - - return val; - } -@@ -180,11 +179,9 @@ static inline void - rtw_write_rf(struct rtw_dev *rtwdev, enum rtw_rf_path rf_path, - u32 addr, u32 mask, u32 data) - { -- unsigned long flags; -+ lockdep_assert_held(&rtwdev->mutex); - -- spin_lock_irqsave(&rtwdev->rf_lock, flags); - rtwdev->chip->ops->write_rf(rtwdev, rf_path, addr, mask, data); -- spin_unlock_irqrestore(&rtwdev->rf_lock, flags); - } - - static inline u32 ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -2067,7 +2067,6 @@ int rtw_core_init(struct rtw_dev *rtwdev - skb_queue_head_init(&rtwdev->coex.queue); - skb_queue_head_init(&rtwdev->tx_report.queue); - -- spin_lock_init(&rtwdev->rf_lock); - spin_lock_init(&rtwdev->h2c.lock); - spin_lock_init(&rtwdev->txq_lock); - spin_lock_init(&rtwdev->tx_report.q_lock); ---- a/drivers/net/wireless/realtek/rtw88/main.h -+++ b/drivers/net/wireless/realtek/rtw88/main.h -@@ -1995,9 +1995,6 @@ struct rtw_dev { - /* ensures exclusive access from mac80211 callbacks */ - struct mutex mutex; - -- /* read/write rf register */ -- spinlock_t rf_lock; -- - /* watch dog every 2 sec */ - struct delayed_work watch_dog_work; - u32 watch_dog_cnt; diff --git a/package/kernel/mac80211/patches/rtl/006-wifi-rtw88-Drop-h2c.lock.patch b/package/kernel/mac80211/patches/rtl/006-wifi-rtw88-Drop-h2c.lock.patch deleted file mode 100644 index 9363596c0..000000000 --- a/package/kernel/mac80211/patches/rtl/006-wifi-rtw88-Drop-h2c.lock.patch +++ /dev/null @@ -1,110 +0,0 @@ -From 0c42222e7ba7fc209474ade5f8e082360ba17d13 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 2 Dec 2022 09:12:17 +0100 -Subject: [PATCH 06/13] wifi: rtw88: Drop h2c.lock - -The h2c.lock spinlock is used in rtw_fw_send_h2c_command() and -rtw_fw_send_h2c_packet(). Most callers call this with rtwdev->mutex -held, except from one callsite in the debugfs code. The debugfs code -alone doesn't justify the extra lock, so acquire rtwdev->mutex in -debugfs and drop the now unnecessary spinlock. - -Signed-off-by: Sascha Hauer -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202081224.2779981-5-s.hauer@pengutronix.de ---- - drivers/net/wireless/realtek/rtw88/debug.c | 2 ++ - drivers/net/wireless/realtek/rtw88/fw.c | 13 ++++--------- - drivers/net/wireless/realtek/rtw88/main.c | 1 - - drivers/net/wireless/realtek/rtw88/main.h | 2 -- - 4 files changed, 6 insertions(+), 12 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/debug.c -+++ b/drivers/net/wireless/realtek/rtw88/debug.c -@@ -392,7 +392,9 @@ static ssize_t rtw_debugfs_set_h2c(struc - return -EINVAL; - } - -+ mutex_lock(&rtwdev->mutex); - rtw_fw_h2c_cmd_dbg(rtwdev, param); -+ mutex_unlock(&rtwdev->mutex); - - return count; - } ---- a/drivers/net/wireless/realtek/rtw88/fw.c -+++ b/drivers/net/wireless/realtek/rtw88/fw.c -@@ -322,7 +322,7 @@ static void rtw_fw_send_h2c_command(stru - h2c[3], h2c[2], h2c[1], h2c[0], - h2c[7], h2c[6], h2c[5], h2c[4]); - -- spin_lock(&rtwdev->h2c.lock); -+ lockdep_assert_held(&rtwdev->mutex); - - box = rtwdev->h2c.last_box_num; - switch (box) { -@@ -344,7 +344,7 @@ static void rtw_fw_send_h2c_command(stru - break; - default: - WARN(1, "invalid h2c mail box number\n"); -- goto out; -+ return; - } - - ret = read_poll_timeout_atomic(rtw_read8, box_state, -@@ -353,7 +353,7 @@ static void rtw_fw_send_h2c_command(stru - - if (ret) { - rtw_err(rtwdev, "failed to send h2c command\n"); -- goto out; -+ return; - } - - rtw_write32(rtwdev, box_ex_reg, le32_to_cpu(h2c_cmd->msg_ext)); -@@ -361,9 +361,6 @@ static void rtw_fw_send_h2c_command(stru - - if (++rtwdev->h2c.last_box_num >= 4) - rtwdev->h2c.last_box_num = 0; -- --out: -- spin_unlock(&rtwdev->h2c.lock); - } - - void rtw_fw_h2c_cmd_dbg(struct rtw_dev *rtwdev, u8 *h2c) -@@ -375,15 +372,13 @@ static void rtw_fw_send_h2c_packet(struc - { - int ret; - -- spin_lock(&rtwdev->h2c.lock); -+ lockdep_assert_held(&rtwdev->mutex); - - FW_OFFLOAD_H2C_SET_SEQ_NUM(h2c_pkt, rtwdev->h2c.seq); - ret = rtw_hci_write_data_h2c(rtwdev, h2c_pkt, H2C_PKT_SIZE); - if (ret) - rtw_err(rtwdev, "failed to send h2c packet\n"); - rtwdev->h2c.seq++; -- -- spin_unlock(&rtwdev->h2c.lock); - } - - void ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -2067,7 +2067,6 @@ int rtw_core_init(struct rtw_dev *rtwdev - skb_queue_head_init(&rtwdev->coex.queue); - skb_queue_head_init(&rtwdev->tx_report.queue); - -- spin_lock_init(&rtwdev->h2c.lock); - spin_lock_init(&rtwdev->txq_lock); - spin_lock_init(&rtwdev->tx_report.q_lock); - ---- a/drivers/net/wireless/realtek/rtw88/main.h -+++ b/drivers/net/wireless/realtek/rtw88/main.h -@@ -2020,8 +2020,6 @@ struct rtw_dev { - struct { - /* incicate the mail box to use with fw */ - u8 last_box_num; -- /* protect to send h2c to fw */ -- spinlock_t lock; - u32 seq; - } h2c; - diff --git a/package/kernel/mac80211/patches/rtl/007-wifi-rtw88-Drop-coex-mutex.patch b/package/kernel/mac80211/patches/rtl/007-wifi-rtw88-Drop-coex-mutex.patch deleted file mode 100644 index f2bdaaf20..000000000 --- a/package/kernel/mac80211/patches/rtl/007-wifi-rtw88-Drop-coex-mutex.patch +++ /dev/null @@ -1,81 +0,0 @@ -From aa3b7995ddabf832581c542fc198d1f2e7afac28 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 2 Dec 2022 09:12:18 +0100 -Subject: [PATCH 07/13] wifi: rtw88: Drop coex mutex - -coex->mutex is used in rtw_coex_info_request() only. Most callers of this -function hold rtwdev->mutex already, except for one callsite in the -debugfs code. The debugfs code alone doesn't justify the extra lock, so -acquire rtwdev->mutex there as well and drop the now unnecessary -spinlock. - -Signed-off-by: Sascha Hauer -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202081224.2779981-6-s.hauer@pengutronix.de ---- - drivers/net/wireless/realtek/rtw88/coex.c | 3 +-- - drivers/net/wireless/realtek/rtw88/debug.c | 2 ++ - drivers/net/wireless/realtek/rtw88/main.c | 2 -- - drivers/net/wireless/realtek/rtw88/main.h | 2 -- - 4 files changed, 3 insertions(+), 6 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/coex.c -+++ b/drivers/net/wireless/realtek/rtw88/coex.c -@@ -633,7 +633,7 @@ static struct sk_buff *rtw_coex_info_req - struct rtw_coex *coex = &rtwdev->coex; - struct sk_buff *skb_resp = NULL; - -- mutex_lock(&coex->mutex); -+ lockdep_assert_held(&rtwdev->mutex); - - rtw_fw_query_bt_mp_info(rtwdev, req); - -@@ -650,7 +650,6 @@ static struct sk_buff *rtw_coex_info_req - } - - out: -- mutex_unlock(&coex->mutex); - return skb_resp; - } - ---- a/drivers/net/wireless/realtek/rtw88/debug.c -+++ b/drivers/net/wireless/realtek/rtw88/debug.c -@@ -841,7 +841,9 @@ static int rtw_debugfs_get_coex_info(str - struct rtw_debugfs_priv *debugfs_priv = m->private; - struct rtw_dev *rtwdev = debugfs_priv->rtwdev; - -+ mutex_lock(&rtwdev->mutex); - rtw_coex_display_coex_info(rtwdev, m); -+ mutex_unlock(&rtwdev->mutex); - - return 0; - } ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -2071,7 +2071,6 @@ int rtw_core_init(struct rtw_dev *rtwdev - spin_lock_init(&rtwdev->tx_report.q_lock); - - mutex_init(&rtwdev->mutex); -- mutex_init(&rtwdev->coex.mutex); - mutex_init(&rtwdev->hal.tx_power_mutex); - - init_waitqueue_head(&rtwdev->coex.wait); -@@ -2143,7 +2142,6 @@ void rtw_core_deinit(struct rtw_dev *rtw - } - - mutex_destroy(&rtwdev->mutex); -- mutex_destroy(&rtwdev->coex.mutex); - mutex_destroy(&rtwdev->hal.tx_power_mutex); - } - EXPORT_SYMBOL(rtw_core_deinit); ---- a/drivers/net/wireless/realtek/rtw88/main.h -+++ b/drivers/net/wireless/realtek/rtw88/main.h -@@ -1501,8 +1501,6 @@ struct rtw_coex_stat { - }; - - struct rtw_coex { -- /* protects coex info request section */ -- struct mutex mutex; - struct sk_buff_head queue; - wait_queue_head_t wait; - diff --git a/package/kernel/mac80211/patches/rtl/008-wifi-rtw88-iterate-over-vif-sta-list-non-atomically.patch b/package/kernel/mac80211/patches/rtl/008-wifi-rtw88-iterate-over-vif-sta-list-non-atomically.patch deleted file mode 100644 index a55ce7614..000000000 --- a/package/kernel/mac80211/patches/rtl/008-wifi-rtw88-iterate-over-vif-sta-list-non-atomically.patch +++ /dev/null @@ -1,204 +0,0 @@ -From 392cb1f93f3b5bf702ac3b6b110bb4e33df7ae32 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 2 Dec 2022 09:12:19 +0100 -Subject: [PATCH 08/13] wifi: rtw88: iterate over vif/sta list non-atomically - -The driver uses ieee80211_iterate_active_interfaces_atomic() -and ieee80211_iterate_stations_atomic() in several places and does -register accesses in the iterators. This doesn't cope with upcoming -USB support as registers can only be accessed non-atomically. - -Split these into a two stage process: First use the atomic iterator -functions to collect all active interfaces or stations on a list, then -iterate over the list non-atomically and call the iterator on each -entry. - -Signed-off-by: Sascha Hauer -Suggested-by: Ping-Ke shih -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202081224.2779981-7-s.hauer@pengutronix.de ---- - drivers/net/wireless/realtek/rtw88/phy.c | 6 +- - drivers/net/wireless/realtek/rtw88/ps.c | 2 +- - drivers/net/wireless/realtek/rtw88/util.c | 103 ++++++++++++++++++++++ - drivers/net/wireless/realtek/rtw88/util.h | 12 ++- - 4 files changed, 116 insertions(+), 7 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/phy.c -+++ b/drivers/net/wireless/realtek/rtw88/phy.c -@@ -300,7 +300,7 @@ static void rtw_phy_stat_rssi(struct rtw - - data.rtwdev = rtwdev; - data.min_rssi = U8_MAX; -- rtw_iterate_stas_atomic(rtwdev, rtw_phy_stat_rssi_iter, &data); -+ rtw_iterate_stas(rtwdev, rtw_phy_stat_rssi_iter, &data); - - dm_info->pre_min_rssi = dm_info->min_rssi; - dm_info->min_rssi = data.min_rssi; -@@ -544,7 +544,7 @@ static void rtw_phy_ra_info_update(struc - if (rtwdev->watch_dog_cnt & 0x3) - return; - -- rtw_iterate_stas_atomic(rtwdev, rtw_phy_ra_info_update_iter, rtwdev); -+ rtw_iterate_stas(rtwdev, rtw_phy_ra_info_update_iter, rtwdev); - } - - static u32 rtw_phy_get_rrsr_mask(struct rtw_dev *rtwdev, u8 rate_idx) -@@ -597,7 +597,7 @@ static void rtw_phy_rrsr_update(struct r - struct rtw_dm_info *dm_info = &rtwdev->dm_info; - - dm_info->rrsr_mask_min = RRSR_RATE_ORDER_MAX; -- rtw_iterate_stas_atomic(rtwdev, rtw_phy_rrsr_mask_min_iter, rtwdev); -+ rtw_iterate_stas(rtwdev, rtw_phy_rrsr_mask_min_iter, rtwdev); - rtw_write32(rtwdev, REG_RRSR, dm_info->rrsr_val_init & dm_info->rrsr_mask_min); - } - ---- a/drivers/net/wireless/realtek/rtw88/ps.c -+++ b/drivers/net/wireless/realtek/rtw88/ps.c -@@ -61,7 +61,7 @@ int rtw_leave_ips(struct rtw_dev *rtwdev - return ret; - } - -- rtw_iterate_vifs_atomic(rtwdev, rtw_restore_port_cfg_iter, rtwdev); -+ rtw_iterate_vifs(rtwdev, rtw_restore_port_cfg_iter, rtwdev); - - rtw_coex_ips_notify(rtwdev, COEX_IPS_LEAVE); - ---- a/drivers/net/wireless/realtek/rtw88/util.c -+++ b/drivers/net/wireless/realtek/rtw88/util.c -@@ -105,3 +105,106 @@ void rtw_desc_to_mcsrate(u16 rate, u8 *m - *mcs = rate - DESC_RATEMCS0; - } - } -+ -+struct rtw_stas_entry { -+ struct list_head list; -+ struct ieee80211_sta *sta; -+}; -+ -+struct rtw_iter_stas_data { -+ struct rtw_dev *rtwdev; -+ struct list_head list; -+}; -+ -+static void rtw_collect_sta_iter(void *data, struct ieee80211_sta *sta) -+{ -+ struct rtw_iter_stas_data *iter_stas = data; -+ struct rtw_stas_entry *stas_entry; -+ -+ stas_entry = kmalloc(sizeof(*stas_entry), GFP_ATOMIC); -+ if (!stas_entry) -+ return; -+ -+ stas_entry->sta = sta; -+ list_add_tail(&stas_entry->list, &iter_stas->list); -+} -+ -+void rtw_iterate_stas(struct rtw_dev *rtwdev, -+ void (*iterator)(void *data, -+ struct ieee80211_sta *sta), -+ void *data) -+{ -+ struct rtw_iter_stas_data iter_data; -+ struct rtw_stas_entry *sta_entry, *tmp; -+ -+ /* &rtwdev->mutex makes sure no stations can be removed between -+ * collecting the stations and iterating over them. -+ */ -+ lockdep_assert_held(&rtwdev->mutex); -+ -+ iter_data.rtwdev = rtwdev; -+ INIT_LIST_HEAD(&iter_data.list); -+ -+ ieee80211_iterate_stations_atomic(rtwdev->hw, rtw_collect_sta_iter, -+ &iter_data); -+ -+ list_for_each_entry_safe(sta_entry, tmp, &iter_data.list, -+ list) { -+ list_del_init(&sta_entry->list); -+ iterator(data, sta_entry->sta); -+ kfree(sta_entry); -+ } -+} -+ -+struct rtw_vifs_entry { -+ struct list_head list; -+ struct ieee80211_vif *vif; -+ u8 mac[ETH_ALEN]; -+}; -+ -+struct rtw_iter_vifs_data { -+ struct rtw_dev *rtwdev; -+ struct list_head list; -+}; -+ -+static void rtw_collect_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif) -+{ -+ struct rtw_iter_vifs_data *iter_stas = data; -+ struct rtw_vifs_entry *vifs_entry; -+ -+ vifs_entry = kmalloc(sizeof(*vifs_entry), GFP_ATOMIC); -+ if (!vifs_entry) -+ return; -+ -+ vifs_entry->vif = vif; -+ ether_addr_copy(vifs_entry->mac, mac); -+ list_add_tail(&vifs_entry->list, &iter_stas->list); -+} -+ -+void rtw_iterate_vifs(struct rtw_dev *rtwdev, -+ void (*iterator)(void *data, u8 *mac, -+ struct ieee80211_vif *vif), -+ void *data) -+{ -+ struct rtw_iter_vifs_data iter_data; -+ struct rtw_vifs_entry *vif_entry, *tmp; -+ -+ /* &rtwdev->mutex makes sure no interfaces can be removed between -+ * collecting the interfaces and iterating over them. -+ */ -+ lockdep_assert_held(&rtwdev->mutex); -+ -+ iter_data.rtwdev = rtwdev; -+ INIT_LIST_HEAD(&iter_data.list); -+ -+ ieee80211_iterate_active_interfaces_atomic(rtwdev->hw, -+ IEEE80211_IFACE_ITER_NORMAL, -+ rtw_collect_vif_iter, &iter_data); -+ -+ list_for_each_entry_safe(vif_entry, tmp, &iter_data.list, -+ list) { -+ list_del_init(&vif_entry->list); -+ iterator(data, vif_entry->mac, vif_entry->vif); -+ kfree(vif_entry); -+ } -+} ---- a/drivers/net/wireless/realtek/rtw88/util.h -+++ b/drivers/net/wireless/realtek/rtw88/util.h -@@ -7,9 +7,6 @@ - - struct rtw_dev; - --#define rtw_iterate_vifs(rtwdev, iterator, data) \ -- ieee80211_iterate_active_interfaces(rtwdev->hw, \ -- IEEE80211_IFACE_ITER_NORMAL, iterator, data) - #define rtw_iterate_vifs_atomic(rtwdev, iterator, data) \ - ieee80211_iterate_active_interfaces_atomic(rtwdev->hw, \ - IEEE80211_IFACE_ITER_NORMAL, iterator, data) -@@ -20,6 +17,15 @@ struct rtw_dev; - #define rtw_iterate_keys_rcu(rtwdev, vif, iterator, data) \ - ieee80211_iter_keys_rcu((rtwdev)->hw, vif, iterator, data) - -+void rtw_iterate_vifs(struct rtw_dev *rtwdev, -+ void (*iterator)(void *data, u8 *mac, -+ struct ieee80211_vif *vif), -+ void *data); -+void rtw_iterate_stas(struct rtw_dev *rtwdev, -+ void (*iterator)(void *data, -+ struct ieee80211_sta *sta), -+ void *data); -+ - static inline u8 *get_hdr_bssid(struct ieee80211_hdr *hdr) - { - __le16 fc = hdr->frame_control; diff --git a/package/kernel/mac80211/patches/rtl/009-wifi-rtw88-Add-common-USB-chip-support.patch b/package/kernel/mac80211/patches/rtl/009-wifi-rtw88-Add-common-USB-chip-support.patch deleted file mode 100644 index 0f5942482..000000000 --- a/package/kernel/mac80211/patches/rtl/009-wifi-rtw88-Add-common-USB-chip-support.patch +++ /dev/null @@ -1,1155 +0,0 @@ -From 173bc31bc0189616c8b09edbbd919493632070ed Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 2 Dec 2022 09:12:20 +0100 -Subject: [PATCH 09/13] wifi: rtw88: Add common USB chip support - -Add the common bits and pieces to add USB support to the RTW88 driver. -This is based on https://github.com/ulli-kroll/rtw88-usb.git which -itself is first written by Neo Jou. - -Signed-off-by: neo_jou -Signed-off-by: Hans Ulli Kroll -Signed-off-by: Sascha Hauer -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202081224.2779981-8-s.hauer@pengutronix.de ---- - drivers/net/wireless/realtek/rtw88/Kconfig | 4 + - drivers/net/wireless/realtek/rtw88/Makefile | 3 + - drivers/net/wireless/realtek/rtw88/mac.c | 3 + - drivers/net/wireless/realtek/rtw88/main.c | 4 + - drivers/net/wireless/realtek/rtw88/main.h | 4 + - drivers/net/wireless/realtek/rtw88/reg.h | 1 + - drivers/net/wireless/realtek/rtw88/tx.h | 31 + - drivers/net/wireless/realtek/rtw88/usb.c | 911 ++++++++++++++++++++ - drivers/net/wireless/realtek/rtw88/usb.h | 107 +++ - 9 files changed, 1068 insertions(+) - create mode 100644 drivers/net/wireless/realtek/rtw88/usb.c - create mode 100644 drivers/net/wireless/realtek/rtw88/usb.h - ---- a/drivers/net/wireless/realtek/rtw88/Kconfig -+++ b/drivers/net/wireless/realtek/rtw88/Kconfig -@@ -19,6 +19,10 @@ config RTW88_PCI - tristate - depends on m - -+config RTW88_USB -+ tristate -+ depends on m -+ - config RTW88_8822B - tristate - depends on m ---- a/drivers/net/wireless/realtek/rtw88/Makefile -+++ b/drivers/net/wireless/realtek/rtw88/Makefile -@@ -46,3 +46,6 @@ rtw88_8821ce-objs := rtw8821ce.o - - obj-$(CPTCFG_RTW88_PCI) += rtw88_pci.o - rtw88_pci-objs := pci.o -+ -+obj-$(CPTCFG_RTW88_USB) += rtw88_usb.o -+rtw88_usb-objs := usb.o ---- a/drivers/net/wireless/realtek/rtw88/mac.c -+++ b/drivers/net/wireless/realtek/rtw88/mac.c -@@ -1058,6 +1058,9 @@ static int txdma_queue_mapping(struct rt - if (rtw_chip_wcpu_11ac(rtwdev)) - rtw_write32(rtwdev, REG_H2CQ_CSR, BIT_H2CQ_FULL); - -+ if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_USB) -+ rtw_write8_set(rtwdev, REG_TXDMA_PQ_MAP, BIT_RXDMA_ARBBW_EN); -+ - return 0; - } - ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -1783,6 +1783,10 @@ static int rtw_chip_parameter_setup(stru - rtwdev->hci.rpwm_addr = 0x03d9; - rtwdev->hci.cpwm_addr = 0x03da; - break; -+ case RTW_HCI_TYPE_USB: -+ rtwdev->hci.rpwm_addr = 0xfe58; -+ rtwdev->hci.cpwm_addr = 0xfe57; -+ break; - default: - rtw_err(rtwdev, "unsupported hci type\n"); - return -EINVAL; ---- a/drivers/net/wireless/realtek/rtw88/main.h -+++ b/drivers/net/wireless/realtek/rtw88/main.h -@@ -871,6 +871,10 @@ struct rtw_chip_ops { - bool is_tx2_path); - void (*config_txrx_mode)(struct rtw_dev *rtwdev, u8 tx_path, - u8 rx_path, bool is_tx2_path); -+ /* for USB/SDIO only */ -+ void (*fill_txdesc_checksum)(struct rtw_dev *rtwdev, -+ struct rtw_tx_pkt_info *pkt_info, -+ u8 *txdesc); - - /* for coex */ - void (*coex_set_init)(struct rtw_dev *rtwdev); ---- a/drivers/net/wireless/realtek/rtw88/reg.h -+++ b/drivers/net/wireless/realtek/rtw88/reg.h -@@ -184,6 +184,7 @@ - #define BIT_TXDMA_VIQ_MAP(x) \ - (((x) & BIT_MASK_TXDMA_VIQ_MAP) << BIT_SHIFT_TXDMA_VIQ_MAP) - #define REG_TXDMA_PQ_MAP 0x010C -+#define BIT_RXDMA_ARBBW_EN BIT(0) - #define BIT_SHIFT_TXDMA_BEQ_MAP 8 - #define BIT_MASK_TXDMA_BEQ_MAP 0x3 - #define BIT_TXDMA_BEQ_MAP(x) \ ---- a/drivers/net/wireless/realtek/rtw88/tx.h -+++ b/drivers/net/wireless/realtek/rtw88/tx.h -@@ -71,6 +71,14 @@ - le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(15)) - #define SET_TX_DESC_BT_NULL(txdesc, value) \ - le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(23)) -+#define SET_TX_DESC_TXDESC_CHECKSUM(txdesc, value) \ -+ le32p_replace_bits((__le32 *)(txdesc) + 0x07, value, GENMASK(15, 0)) -+#define SET_TX_DESC_DMA_TXAGG_NUM(txdesc, value) \ -+ le32p_replace_bits((__le32 *)(txdesc) + 0x07, value, GENMASK(31, 24)) -+#define GET_TX_DESC_PKT_OFFSET(txdesc) \ -+ le32_get_bits(*((__le32 *)(txdesc) + 0x01), GENMASK(28, 24)) -+#define GET_TX_DESC_QSEL(txdesc) \ -+ le32_get_bits(*((__le32 *)(txdesc) + 0x01), GENMASK(12, 8)) - - enum rtw_tx_desc_queue_select { - TX_DESC_QSEL_TID0 = 0, -@@ -123,4 +131,27 @@ rtw_tx_write_data_h2c_get(struct rtw_dev - struct rtw_tx_pkt_info *pkt_info, - u8 *buf, u32 size); - -+static inline -+void fill_txdesc_checksum_common(u8 *txdesc, size_t words) -+{ -+ __le16 chksum = 0; -+ __le16 *data = (__le16 *)(txdesc); -+ -+ SET_TX_DESC_TXDESC_CHECKSUM(txdesc, 0x0000); -+ -+ while (words--) -+ chksum ^= *data++; -+ -+ SET_TX_DESC_TXDESC_CHECKSUM(txdesc, __le16_to_cpu(chksum)); -+} -+ -+static inline void rtw_tx_fill_txdesc_checksum(struct rtw_dev *rtwdev, -+ struct rtw_tx_pkt_info *pkt_info, -+ u8 *txdesc) -+{ -+ const struct rtw_chip_info *chip = rtwdev->chip; -+ -+ chip->ops->fill_txdesc_checksum(rtwdev, pkt_info, txdesc); -+} -+ - #endif ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw88/usb.c -@@ -0,0 +1,899 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2018-2019 Realtek Corporation -+ */ -+ -+#include -+#include -+#include -+#include "main.h" -+#include "debug.h" -+#include "reg.h" -+#include "tx.h" -+#include "rx.h" -+#include "fw.h" -+#include "ps.h" -+#include "usb.h" -+ -+#define RTW_USB_MAX_RXQ_LEN 512 -+ -+struct rtw_usb_txcb { -+ struct rtw_dev *rtwdev; -+ struct sk_buff_head tx_ack_queue; -+}; -+ -+static void rtw_usb_fill_tx_checksum(struct rtw_usb *rtwusb, -+ struct sk_buff *skb, int agg_num) -+{ -+ struct rtw_dev *rtwdev = rtwusb->rtwdev; -+ struct rtw_tx_pkt_info pkt_info; -+ -+ SET_TX_DESC_DMA_TXAGG_NUM(skb->data, agg_num); -+ pkt_info.pkt_offset = GET_TX_DESC_PKT_OFFSET(skb->data); -+ rtw_tx_fill_txdesc_checksum(rtwdev, &pkt_info, skb->data); -+} -+ -+static u32 rtw_usb_read(struct rtw_dev *rtwdev, u32 addr, u16 len) -+{ -+ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); -+ struct usb_device *udev = rtwusb->udev; -+ __le32 *data; -+ unsigned long flags; -+ int idx, ret; -+ static int count; -+ -+ spin_lock_irqsave(&rtwusb->usb_lock, flags); -+ -+ idx = rtwusb->usb_data_index; -+ rtwusb->usb_data_index = (idx + 1) & (RTW_USB_MAX_RXTX_COUNT - 1); -+ -+ spin_unlock_irqrestore(&rtwusb->usb_lock, flags); -+ -+ data = &rtwusb->usb_data[idx]; -+ -+ ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0), -+ RTW_USB_CMD_REQ, RTW_USB_CMD_READ, addr, -+ RTW_USB_VENQT_CMD_IDX, data, len, 1000); -+ if (ret < 0 && ret != -ENODEV && count++ < 4) -+ rtw_err(rtwdev, "read register 0x%x failed with %d\n", -+ addr, ret); -+ -+ return le32_to_cpu(*data); -+} -+ -+static u8 rtw_usb_read8(struct rtw_dev *rtwdev, u32 addr) -+{ -+ return (u8)rtw_usb_read(rtwdev, addr, 1); -+} -+ -+static u16 rtw_usb_read16(struct rtw_dev *rtwdev, u32 addr) -+{ -+ return (u16)rtw_usb_read(rtwdev, addr, 2); -+} -+ -+static u32 rtw_usb_read32(struct rtw_dev *rtwdev, u32 addr) -+{ -+ return (u32)rtw_usb_read(rtwdev, addr, 4); -+} -+ -+static void rtw_usb_write(struct rtw_dev *rtwdev, u32 addr, u32 val, int len) -+{ -+ struct rtw_usb *rtwusb = (struct rtw_usb *)rtwdev->priv; -+ struct usb_device *udev = rtwusb->udev; -+ unsigned long flags; -+ __le32 *data; -+ int idx, ret; -+ static int count; -+ -+ spin_lock_irqsave(&rtwusb->usb_lock, flags); -+ -+ idx = rtwusb->usb_data_index; -+ rtwusb->usb_data_index = (idx + 1) & (RTW_USB_MAX_RXTX_COUNT - 1); -+ -+ spin_unlock_irqrestore(&rtwusb->usb_lock, flags); -+ -+ data = &rtwusb->usb_data[idx]; -+ -+ *data = cpu_to_le32(val); -+ -+ ret = usb_control_msg(udev, usb_sndctrlpipe(udev, 0), -+ RTW_USB_CMD_REQ, RTW_USB_CMD_WRITE, -+ addr, 0, data, len, 30000); -+ if (ret < 0 && ret != -ENODEV && count++ < 4) -+ rtw_err(rtwdev, "write register 0x%x failed with %d\n", -+ addr, ret); -+} -+ -+static void rtw_usb_write8(struct rtw_dev *rtwdev, u32 addr, u8 val) -+{ -+ rtw_usb_write(rtwdev, addr, val, 1); -+} -+ -+static void rtw_usb_write16(struct rtw_dev *rtwdev, u32 addr, u16 val) -+{ -+ rtw_usb_write(rtwdev, addr, val, 2); -+} -+ -+static void rtw_usb_write32(struct rtw_dev *rtwdev, u32 addr, u32 val) -+{ -+ rtw_usb_write(rtwdev, addr, val, 4); -+} -+ -+static int rtw_usb_parse(struct rtw_dev *rtwdev, -+ struct usb_interface *interface) -+{ -+ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); -+ struct usb_host_interface *host_interface = &interface->altsetting[0]; -+ struct usb_interface_descriptor *interface_desc = &host_interface->desc; -+ struct usb_endpoint_descriptor *endpoint; -+ struct usb_device *usbd = interface_to_usbdev(interface); -+ int num_out_pipes = 0; -+ int i; -+ u8 num; -+ -+ for (i = 0; i < interface_desc->bNumEndpoints; i++) { -+ endpoint = &host_interface->endpoint[i].desc; -+ num = usb_endpoint_num(endpoint); -+ -+ if (usb_endpoint_dir_in(endpoint) && -+ usb_endpoint_xfer_bulk(endpoint)) { -+ if (rtwusb->pipe_in) { -+ rtw_err(rtwdev, "IN pipes overflow\n"); -+ return -EINVAL; -+ } -+ -+ rtwusb->pipe_in = num; -+ } -+ -+ if (usb_endpoint_dir_in(endpoint) && -+ usb_endpoint_xfer_int(endpoint)) { -+ if (rtwusb->pipe_interrupt) { -+ rtw_err(rtwdev, "INT pipes overflow\n"); -+ return -EINVAL; -+ } -+ -+ rtwusb->pipe_interrupt = num; -+ } -+ -+ if (usb_endpoint_dir_out(endpoint) && -+ usb_endpoint_xfer_bulk(endpoint)) { -+ if (num_out_pipes >= ARRAY_SIZE(rtwusb->out_ep)) { -+ rtw_err(rtwdev, "OUT pipes overflow\n"); -+ return -EINVAL; -+ } -+ -+ rtwusb->out_ep[num_out_pipes++] = num; -+ } -+ } -+ -+ switch (usbd->speed) { -+ case USB_SPEED_LOW: -+ case USB_SPEED_FULL: -+ rtwusb->bulkout_size = RTW_USB_FULL_SPEED_BULK_SIZE; -+ break; -+ case USB_SPEED_HIGH: -+ rtwusb->bulkout_size = RTW_USB_HIGH_SPEED_BULK_SIZE; -+ break; -+ case USB_SPEED_SUPER: -+ rtwusb->bulkout_size = RTW_USB_SUPER_SPEED_BULK_SIZE; -+ break; -+ default: -+ rtw_err(rtwdev, "failed to detect usb speed\n"); -+ return -EINVAL; -+ } -+ -+ rtwdev->hci.bulkout_num = num_out_pipes; -+ -+ switch (num_out_pipes) { -+ case 4: -+ case 3: -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID0] = 2; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID1] = 2; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID2] = 2; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID3] = 2; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID4] = 1; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID5] = 1; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID6] = 0; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID7] = 0; -+ break; -+ case 2: -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID0] = 1; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID1] = 1; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID2] = 1; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID3] = 1; -+ break; -+ case 1: -+ break; -+ default: -+ rtw_err(rtwdev, "failed to get out_pipes(%d)\n", num_out_pipes); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static void rtw_usb_write_port_tx_complete(struct urb *urb) -+{ -+ struct rtw_usb_txcb *txcb = urb->context; -+ struct rtw_dev *rtwdev = txcb->rtwdev; -+ struct ieee80211_hw *hw = rtwdev->hw; -+ -+ while (true) { -+ struct sk_buff *skb = skb_dequeue(&txcb->tx_ack_queue); -+ struct ieee80211_tx_info *info; -+ struct rtw_usb_tx_data *tx_data; -+ -+ if (!skb) -+ break; -+ -+ info = IEEE80211_SKB_CB(skb); -+ tx_data = rtw_usb_get_tx_data(skb); -+ -+ /* enqueue to wait for tx report */ -+ if (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) { -+ rtw_tx_report_enqueue(rtwdev, skb, tx_data->sn); -+ continue; -+ } -+ -+ /* always ACK for others, then they won't be marked as drop */ -+ ieee80211_tx_info_clear_status(info); -+ if (info->flags & IEEE80211_TX_CTL_NO_ACK) -+ info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; -+ else -+ info->flags |= IEEE80211_TX_STAT_ACK; -+ -+ ieee80211_tx_status_irqsafe(hw, skb); -+ } -+ -+ kfree(txcb); -+} -+ -+static int qsel_to_ep(struct rtw_usb *rtwusb, unsigned int qsel) -+{ -+ if (qsel >= ARRAY_SIZE(rtwusb->qsel_to_ep)) -+ return 0; -+ -+ return rtwusb->qsel_to_ep[qsel]; -+} -+ -+static int rtw_usb_write_port(struct rtw_dev *rtwdev, u8 qsel, struct sk_buff *skb, -+ usb_complete_t cb, void *context) -+{ -+ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); -+ struct usb_device *usbd = rtwusb->udev; -+ struct urb *urb; -+ unsigned int pipe; -+ int ret; -+ int ep = qsel_to_ep(rtwusb, qsel); -+ -+ pipe = usb_sndbulkpipe(usbd, rtwusb->out_ep[ep]); -+ urb = usb_alloc_urb(0, GFP_ATOMIC); -+ if (!urb) -+ return -ENOMEM; -+ -+ usb_fill_bulk_urb(urb, usbd, pipe, skb->data, skb->len, cb, context); -+ urb->transfer_flags |= URB_ZERO_PACKET; -+ ret = usb_submit_urb(urb, GFP_ATOMIC); -+ -+ usb_free_urb(urb); -+ -+ return ret; -+} -+ -+static bool rtw_usb_tx_agg_skb(struct rtw_usb *rtwusb, struct sk_buff_head *list) -+{ -+ struct rtw_dev *rtwdev = rtwusb->rtwdev; -+ struct rtw_usb_txcb *txcb; -+ struct sk_buff *skb_head; -+ struct sk_buff *skb_iter; -+ int agg_num = 0; -+ unsigned int align_next = 0; -+ -+ if (skb_queue_empty(list)) -+ return false; -+ -+ txcb = kmalloc(sizeof(*txcb), GFP_ATOMIC); -+ if (!txcb) -+ return false; -+ -+ txcb->rtwdev = rtwdev; -+ skb_queue_head_init(&txcb->tx_ack_queue); -+ -+ skb_iter = skb_dequeue(list); -+ -+ if (skb_queue_empty(list)) { -+ skb_head = skb_iter; -+ goto queue; -+ } -+ -+ skb_head = dev_alloc_skb(RTW_USB_MAX_XMITBUF_SZ); -+ if (!skb_head) { -+ skb_head = skb_iter; -+ goto queue; -+ } -+ -+ while (skb_iter) { -+ unsigned long flags; -+ -+ skb_put(skb_head, align_next); -+ skb_put_data(skb_head, skb_iter->data, skb_iter->len); -+ -+ align_next = ALIGN(skb_iter->len, 8) - skb_iter->len; -+ -+ agg_num++; -+ -+ skb_queue_tail(&txcb->tx_ack_queue, skb_iter); -+ -+ spin_lock_irqsave(&list->lock, flags); -+ -+ skb_iter = skb_peek(list); -+ -+ if (skb_iter && skb_iter->len + skb_head->len <= RTW_USB_MAX_XMITBUF_SZ) -+ __skb_unlink(skb_iter, list); -+ else -+ skb_iter = NULL; -+ spin_unlock_irqrestore(&list->lock, flags); -+ } -+ -+ if (agg_num > 1) -+ rtw_usb_fill_tx_checksum(rtwusb, skb_head, agg_num); -+ -+queue: -+ skb_queue_tail(&txcb->tx_ack_queue, skb_head); -+ -+ rtw_usb_write_port(rtwdev, GET_TX_DESC_QSEL(skb_head->data), skb_head, -+ rtw_usb_write_port_tx_complete, txcb); -+ -+ return true; -+} -+ -+static void rtw_usb_tx_handler(struct work_struct *work) -+{ -+ struct rtw_usb *rtwusb = container_of(work, struct rtw_usb, tx_work); -+ int i, limit; -+ -+ for (i = ARRAY_SIZE(rtwusb->tx_queue) - 1; i >= 0; i--) { -+ for (limit = 0; limit < 200; limit++) { -+ struct sk_buff_head *list = &rtwusb->tx_queue[i]; -+ -+ if (!rtw_usb_tx_agg_skb(rtwusb, list)) -+ break; -+ } -+ } -+} -+ -+static void rtw_usb_tx_queue_purge(struct rtw_usb *rtwusb) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(rtwusb->tx_queue); i++) -+ skb_queue_purge(&rtwusb->tx_queue[i]); -+} -+ -+static void rtw_usb_write_port_complete(struct urb *urb) -+{ -+ struct sk_buff *skb = urb->context; -+ -+ dev_kfree_skb_any(skb); -+} -+ -+static int rtw_usb_write_data(struct rtw_dev *rtwdev, -+ struct rtw_tx_pkt_info *pkt_info, -+ u8 *buf) -+{ -+ const struct rtw_chip_info *chip = rtwdev->chip; -+ struct sk_buff *skb; -+ unsigned int desclen, headsize, size; -+ u8 qsel; -+ int ret = 0; -+ -+ size = pkt_info->tx_pkt_size; -+ qsel = pkt_info->qsel; -+ desclen = chip->tx_pkt_desc_sz; -+ headsize = pkt_info->offset ? pkt_info->offset : desclen; -+ -+ skb = dev_alloc_skb(headsize + size); -+ if (unlikely(!skb)) -+ return -ENOMEM; -+ -+ skb_reserve(skb, headsize); -+ skb_put_data(skb, buf, size); -+ skb_push(skb, headsize); -+ memset(skb->data, 0, headsize); -+ rtw_tx_fill_tx_desc(pkt_info, skb); -+ rtw_tx_fill_txdesc_checksum(rtwdev, pkt_info, skb->data); -+ -+ ret = rtw_usb_write_port(rtwdev, qsel, skb, -+ rtw_usb_write_port_complete, skb); -+ if (unlikely(ret)) -+ rtw_err(rtwdev, "failed to do USB write, ret=%d\n", ret); -+ -+ return ret; -+} -+ -+static int rtw_usb_write_data_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, -+ u32 size) -+{ -+ const struct rtw_chip_info *chip = rtwdev->chip; -+ struct rtw_tx_pkt_info pkt_info = {0}; -+ -+ pkt_info.tx_pkt_size = size; -+ pkt_info.qsel = TX_DESC_QSEL_BEACON; -+ pkt_info.offset = chip->tx_pkt_desc_sz; -+ -+ return rtw_usb_write_data(rtwdev, &pkt_info, buf); -+} -+ -+static int rtw_usb_write_data_h2c(struct rtw_dev *rtwdev, u8 *buf, u32 size) -+{ -+ struct rtw_tx_pkt_info pkt_info = {0}; -+ -+ pkt_info.tx_pkt_size = size; -+ pkt_info.qsel = TX_DESC_QSEL_H2C; -+ -+ return rtw_usb_write_data(rtwdev, &pkt_info, buf); -+} -+ -+static u8 rtw_usb_tx_queue_mapping_to_qsel(struct sk_buff *skb) -+{ -+ struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; -+ __le16 fc = hdr->frame_control; -+ u8 qsel; -+ -+ if (unlikely(ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))) -+ qsel = TX_DESC_QSEL_MGMT; -+ else if (skb_get_queue_mapping(skb) <= IEEE80211_AC_BK) -+ qsel = skb->priority; -+ else -+ qsel = TX_DESC_QSEL_BEACON; -+ -+ return qsel; -+} -+ -+static int rtw_usb_tx_write(struct rtw_dev *rtwdev, -+ struct rtw_tx_pkt_info *pkt_info, -+ struct sk_buff *skb) -+{ -+ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); -+ const struct rtw_chip_info *chip = rtwdev->chip; -+ struct rtw_usb_tx_data *tx_data; -+ u8 *pkt_desc; -+ int ep; -+ -+ pkt_info->qsel = rtw_usb_tx_queue_mapping_to_qsel(skb); -+ pkt_desc = skb_push(skb, chip->tx_pkt_desc_sz); -+ memset(pkt_desc, 0, chip->tx_pkt_desc_sz); -+ ep = qsel_to_ep(rtwusb, pkt_info->qsel); -+ rtw_tx_fill_tx_desc(pkt_info, skb); -+ rtw_tx_fill_txdesc_checksum(rtwdev, pkt_info, skb->data); -+ tx_data = rtw_usb_get_tx_data(skb); -+ tx_data->sn = pkt_info->sn; -+ -+ skb_queue_tail(&rtwusb->tx_queue[ep], skb); -+ -+ return 0; -+} -+ -+static void rtw_usb_tx_kick_off(struct rtw_dev *rtwdev) -+{ -+ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); -+ -+ queue_work(rtwusb->txwq, &rtwusb->tx_work); -+} -+ -+static void rtw_usb_rx_handler(struct work_struct *work) -+{ -+ struct rtw_usb *rtwusb = container_of(work, struct rtw_usb, rx_work); -+ struct rtw_dev *rtwdev = rtwusb->rtwdev; -+ const struct rtw_chip_info *chip = rtwdev->chip; -+ struct rtw_rx_pkt_stat pkt_stat; -+ struct ieee80211_rx_status rx_status; -+ struct sk_buff *skb; -+ u32 pkt_desc_sz = chip->rx_pkt_desc_sz; -+ u32 pkt_offset; -+ u8 *rx_desc; -+ int limit; -+ -+ for (limit = 0; limit < 200; limit++) { -+ skb = skb_dequeue(&rtwusb->rx_queue); -+ if (!skb) -+ break; -+ -+ rx_desc = skb->data; -+ chip->ops->query_rx_desc(rtwdev, rx_desc, &pkt_stat, -+ &rx_status); -+ pkt_offset = pkt_desc_sz + pkt_stat.drv_info_sz + -+ pkt_stat.shift; -+ -+ if (pkt_stat.is_c2h) { -+ skb_put(skb, pkt_stat.pkt_len + pkt_offset); -+ rtw_fw_c2h_cmd_rx_irqsafe(rtwdev, pkt_offset, skb); -+ continue; -+ } -+ -+ if (skb_queue_len(&rtwusb->rx_queue) >= RTW_USB_MAX_RXQ_LEN) { -+ rtw_err(rtwdev, "failed to get rx_queue, overflow\n"); -+ dev_kfree_skb_any(skb); -+ continue; -+ } -+ -+ skb_put(skb, pkt_stat.pkt_len); -+ skb_reserve(skb, pkt_offset); -+ memcpy(skb->cb, &rx_status, sizeof(rx_status)); -+ ieee80211_rx_irqsafe(rtwdev->hw, skb); -+ } -+} -+ -+static void rtw_usb_read_port_complete(struct urb *urb); -+ -+static void rtw_usb_rx_resubmit(struct rtw_usb *rtwusb, struct rx_usb_ctrl_block *rxcb) -+{ -+ struct rtw_dev *rtwdev = rtwusb->rtwdev; -+ int error; -+ -+ rxcb->rx_skb = alloc_skb(RTW_USB_MAX_RECVBUF_SZ, GFP_ATOMIC); -+ if (!rxcb->rx_skb) -+ return; -+ -+ usb_fill_bulk_urb(rxcb->rx_urb, rtwusb->udev, -+ usb_rcvbulkpipe(rtwusb->udev, rtwusb->pipe_in), -+ rxcb->rx_skb->data, RTW_USB_MAX_RECVBUF_SZ, -+ rtw_usb_read_port_complete, rxcb); -+ -+ error = usb_submit_urb(rxcb->rx_urb, GFP_ATOMIC); -+ if (error) { -+ kfree_skb(rxcb->rx_skb); -+ if (error != -ENODEV) -+ rtw_err(rtwdev, "Err sending rx data urb %d\n", -+ error); -+ } -+} -+ -+static void rtw_usb_read_port_complete(struct urb *urb) -+{ -+ struct rx_usb_ctrl_block *rxcb = urb->context; -+ struct rtw_dev *rtwdev = rxcb->rtwdev; -+ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); -+ struct sk_buff *skb = rxcb->rx_skb; -+ -+ if (urb->status == 0) { -+ if (urb->actual_length >= RTW_USB_MAX_RECVBUF_SZ || -+ urb->actual_length < 24) { -+ rtw_err(rtwdev, "failed to get urb length:%d\n", -+ urb->actual_length); -+ if (skb) -+ dev_kfree_skb_any(skb); -+ } else { -+ skb_queue_tail(&rtwusb->rx_queue, skb); -+ queue_work(rtwusb->rxwq, &rtwusb->rx_work); -+ } -+ rtw_usb_rx_resubmit(rtwusb, rxcb); -+ } else { -+ switch (urb->status) { -+ case -EINVAL: -+ case -EPIPE: -+ case -ENODEV: -+ case -ESHUTDOWN: -+ case -ENOENT: -+ case -EPROTO: -+ case -EILSEQ: -+ case -ETIME: -+ case -ECOMM: -+ case -EOVERFLOW: -+ case -EINPROGRESS: -+ break; -+ default: -+ rtw_err(rtwdev, "status %d\n", urb->status); -+ break; -+ } -+ if (skb) -+ dev_kfree_skb_any(skb); -+ } -+} -+ -+static void rtw_usb_cancel_rx_bufs(struct rtw_usb *rtwusb) -+{ -+ struct rx_usb_ctrl_block *rxcb; -+ int i; -+ -+ for (i = 0; i < RTW_USB_RXCB_NUM; i++) { -+ rxcb = &rtwusb->rx_cb[i]; -+ if (rxcb->rx_urb) -+ usb_kill_urb(rxcb->rx_urb); -+ } -+} -+ -+static void rtw_usb_free_rx_bufs(struct rtw_usb *rtwusb) -+{ -+ struct rx_usb_ctrl_block *rxcb; -+ int i; -+ -+ for (i = 0; i < RTW_USB_RXCB_NUM; i++) { -+ rxcb = &rtwusb->rx_cb[i]; -+ if (rxcb->rx_urb) { -+ usb_kill_urb(rxcb->rx_urb); -+ usb_free_urb(rxcb->rx_urb); -+ } -+ } -+} -+ -+static int rtw_usb_alloc_rx_bufs(struct rtw_usb *rtwusb) -+{ -+ int i; -+ -+ for (i = 0; i < RTW_USB_RXCB_NUM; i++) { -+ struct rx_usb_ctrl_block *rxcb = &rtwusb->rx_cb[i]; -+ -+ rxcb->n = i; -+ rxcb->rtwdev = rtwusb->rtwdev; -+ rxcb->rx_urb = usb_alloc_urb(0, GFP_KERNEL); -+ if (!rxcb->rx_urb) -+ goto err; -+ } -+ -+ return 0; -+err: -+ rtw_usb_free_rx_bufs(rtwusb); -+ return -ENOMEM; -+} -+ -+static int rtw_usb_setup(struct rtw_dev *rtwdev) -+{ -+ /* empty function for rtw_hci_ops */ -+ return 0; -+} -+ -+static int rtw_usb_start(struct rtw_dev *rtwdev) -+{ -+ return 0; -+} -+ -+static void rtw_usb_stop(struct rtw_dev *rtwdev) -+{ -+} -+ -+static void rtw_usb_deep_ps(struct rtw_dev *rtwdev, bool enter) -+{ -+ /* empty function for rtw_hci_ops */ -+} -+ -+static void rtw_usb_link_ps(struct rtw_dev *rtwdev, bool enter) -+{ -+ /* empty function for rtw_hci_ops */ -+} -+ -+static void rtw_usb_interface_cfg(struct rtw_dev *rtwdev) -+{ -+ /* empty function for rtw_hci_ops */ -+} -+ -+static struct rtw_hci_ops rtw_usb_ops = { -+ .tx_write = rtw_usb_tx_write, -+ .tx_kick_off = rtw_usb_tx_kick_off, -+ .setup = rtw_usb_setup, -+ .start = rtw_usb_start, -+ .stop = rtw_usb_stop, -+ .deep_ps = rtw_usb_deep_ps, -+ .link_ps = rtw_usb_link_ps, -+ .interface_cfg = rtw_usb_interface_cfg, -+ -+ .write8 = rtw_usb_write8, -+ .write16 = rtw_usb_write16, -+ .write32 = rtw_usb_write32, -+ .read8 = rtw_usb_read8, -+ .read16 = rtw_usb_read16, -+ .read32 = rtw_usb_read32, -+ -+ .write_data_rsvd_page = rtw_usb_write_data_rsvd_page, -+ .write_data_h2c = rtw_usb_write_data_h2c, -+}; -+ -+static int rtw_usb_init_rx(struct rtw_dev *rtwdev) -+{ -+ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); -+ int i; -+ -+ rtwusb->rxwq = create_singlethread_workqueue("rtw88_usb: rx wq"); -+ if (!rtwusb->rxwq) { -+ rtw_err(rtwdev, "failed to create RX work queue\n"); -+ return -ENOMEM; -+ } -+ -+ skb_queue_head_init(&rtwusb->rx_queue); -+ -+ INIT_WORK(&rtwusb->rx_work, rtw_usb_rx_handler); -+ -+ for (i = 0; i < RTW_USB_RXCB_NUM; i++) { -+ struct rx_usb_ctrl_block *rxcb = &rtwusb->rx_cb[i]; -+ -+ rtw_usb_rx_resubmit(rtwusb, rxcb); -+ } -+ -+ return 0; -+} -+ -+static void rtw_usb_deinit_rx(struct rtw_dev *rtwdev) -+{ -+ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); -+ -+ skb_queue_purge(&rtwusb->rx_queue); -+ -+ flush_workqueue(rtwusb->rxwq); -+ destroy_workqueue(rtwusb->rxwq); -+} -+ -+static int rtw_usb_init_tx(struct rtw_dev *rtwdev) -+{ -+ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); -+ int i; -+ -+ rtwusb->txwq = create_singlethread_workqueue("rtw88_usb: tx wq"); -+ if (!rtwusb->txwq) { -+ rtw_err(rtwdev, "failed to create TX work queue\n"); -+ return -ENOMEM; -+ } -+ -+ for (i = 0; i < ARRAY_SIZE(rtwusb->tx_queue); i++) -+ skb_queue_head_init(&rtwusb->tx_queue[i]); -+ -+ INIT_WORK(&rtwusb->tx_work, rtw_usb_tx_handler); -+ -+ return 0; -+} -+ -+static void rtw_usb_deinit_tx(struct rtw_dev *rtwdev) -+{ -+ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); -+ -+ rtw_usb_tx_queue_purge(rtwusb); -+ flush_workqueue(rtwusb->txwq); -+ destroy_workqueue(rtwusb->txwq); -+} -+ -+static int rtw_usb_intf_init(struct rtw_dev *rtwdev, -+ struct usb_interface *intf) -+{ -+ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); -+ struct usb_device *udev = usb_get_dev(interface_to_usbdev(intf)); -+ int ret; -+ -+ rtwusb->udev = udev; -+ ret = rtw_usb_parse(rtwdev, intf); -+ if (ret) -+ return ret; -+ -+ rtwusb->usb_data = kcalloc(RTW_USB_MAX_RXTX_COUNT, sizeof(u32), -+ GFP_KERNEL); -+ if (!rtwusb->usb_data) -+ return -ENOMEM; -+ -+ usb_set_intfdata(intf, rtwdev->hw); -+ -+ SET_IEEE80211_DEV(rtwdev->hw, &intf->dev); -+ spin_lock_init(&rtwusb->usb_lock); -+ -+ return 0; -+} -+ -+static void rtw_usb_intf_deinit(struct rtw_dev *rtwdev, -+ struct usb_interface *intf) -+{ -+ struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); -+ -+ usb_put_dev(rtwusb->udev); -+ usb_set_intfdata(intf, NULL); -+} -+ -+int rtw_usb_probe(struct usb_interface *intf, const struct usb_device_id *id) -+{ -+ struct rtw_dev *rtwdev; -+ struct ieee80211_hw *hw; -+ struct rtw_usb *rtwusb; -+ int drv_data_size; -+ int ret; -+ -+ drv_data_size = sizeof(struct rtw_dev) + sizeof(struct rtw_usb); -+ hw = ieee80211_alloc_hw(drv_data_size, &rtw_ops); -+ if (!hw) -+ return -ENOMEM; -+ -+ rtwdev = hw->priv; -+ rtwdev->hw = hw; -+ rtwdev->dev = &intf->dev; -+ rtwdev->chip = (struct rtw_chip_info *)id->driver_info; -+ rtwdev->hci.ops = &rtw_usb_ops; -+ rtwdev->hci.type = RTW_HCI_TYPE_USB; -+ -+ rtwusb = rtw_get_usb_priv(rtwdev); -+ rtwusb->rtwdev = rtwdev; -+ -+ ret = rtw_usb_alloc_rx_bufs(rtwusb); -+ if (ret) -+ return ret; -+ -+ ret = rtw_core_init(rtwdev); -+ if (ret) -+ goto err_release_hw; -+ -+ ret = rtw_usb_intf_init(rtwdev, intf); -+ if (ret) { -+ rtw_err(rtwdev, "failed to init USB interface\n"); -+ goto err_deinit_core; -+ } -+ -+ ret = rtw_usb_init_tx(rtwdev); -+ if (ret) { -+ rtw_err(rtwdev, "failed to init USB TX\n"); -+ goto err_destroy_usb; -+ } -+ -+ ret = rtw_usb_init_rx(rtwdev); -+ if (ret) { -+ rtw_err(rtwdev, "failed to init USB RX\n"); -+ goto err_destroy_txwq; -+ } -+ -+ ret = rtw_chip_info_setup(rtwdev); -+ if (ret) { -+ rtw_err(rtwdev, "failed to setup chip information\n"); -+ goto err_destroy_rxwq; -+ } -+ -+ ret = rtw_register_hw(rtwdev, rtwdev->hw); -+ if (ret) { -+ rtw_err(rtwdev, "failed to register hw\n"); -+ goto err_destroy_rxwq; -+ } -+ -+ return 0; -+ -+err_destroy_rxwq: -+ rtw_usb_deinit_rx(rtwdev); -+ -+err_destroy_txwq: -+ rtw_usb_deinit_tx(rtwdev); -+ -+err_destroy_usb: -+ rtw_usb_intf_deinit(rtwdev, intf); -+ -+err_deinit_core: -+ rtw_core_deinit(rtwdev); -+ -+err_release_hw: -+ ieee80211_free_hw(hw); -+ -+ return ret; -+} -+EXPORT_SYMBOL(rtw_usb_probe); -+ -+void rtw_usb_disconnect(struct usb_interface *intf) -+{ -+ struct ieee80211_hw *hw = usb_get_intfdata(intf); -+ struct rtw_dev *rtwdev; -+ struct rtw_usb *rtwusb; -+ -+ if (!hw) -+ return; -+ -+ rtwdev = hw->priv; -+ rtwusb = rtw_get_usb_priv(rtwdev); -+ -+ rtw_usb_cancel_rx_bufs(rtwusb); -+ -+ rtw_unregister_hw(rtwdev, hw); -+ rtw_usb_deinit_tx(rtwdev); -+ rtw_usb_deinit_rx(rtwdev); -+ -+ if (rtwusb->udev->state != USB_STATE_NOTATTACHED) -+ usb_reset_device(rtwusb->udev); -+ -+ rtw_usb_free_rx_bufs(rtwusb); -+ -+ rtw_usb_intf_deinit(rtwdev, intf); -+ rtw_core_deinit(rtwdev); -+ ieee80211_free_hw(hw); -+} -+EXPORT_SYMBOL(rtw_usb_disconnect); -+ -+MODULE_AUTHOR("Realtek Corporation"); -+MODULE_DESCRIPTION("Realtek 802.11ac wireless USB driver"); -+MODULE_LICENSE("Dual BSD/GPL"); ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw88/usb.h -@@ -0,0 +1,107 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2018-2019 Realtek Corporation -+ */ -+ -+#ifndef __RTW_USB_H_ -+#define __RTW_USB_H_ -+ -+#define FW_8192C_START_ADDRESS 0x1000 -+#define FW_8192C_END_ADDRESS 0x5fff -+ -+#define RTW_USB_MAX_RXTX_COUNT 128 -+#define RTW_USB_VENQT_MAX_BUF_SIZE 254 -+#define MAX_USBCTRL_VENDORREQ_TIMES 10 -+ -+#define RTW_USB_CMD_READ 0xc0 -+#define RTW_USB_CMD_WRITE 0x40 -+#define RTW_USB_CMD_REQ 0x05 -+ -+#define RTW_USB_VENQT_CMD_IDX 0x00 -+ -+#define RTW_USB_SUPER_SPEED_BULK_SIZE 1024 -+#define RTW_USB_HIGH_SPEED_BULK_SIZE 512 -+#define RTW_USB_FULL_SPEED_BULK_SIZE 64 -+ -+#define RTW_USB_TX_SEL_HQ BIT(0) -+#define RTW_USB_TX_SEL_LQ BIT(1) -+#define RTW_USB_TX_SEL_NQ BIT(2) -+#define RTW_USB_TX_SEL_EQ BIT(3) -+ -+#define RTW_USB_BULK_IN_ADDR 0x80 -+#define RTW_USB_INT_IN_ADDR 0x81 -+ -+#define RTW_USB_HW_QUEUE_ENTRY 8 -+ -+#define RTW_USB_PACKET_OFFSET_SZ 8 -+#define RTW_USB_MAX_XMITBUF_SZ (1024 * 20) -+#define RTW_USB_MAX_RECVBUF_SZ 32768 -+ -+#define RTW_USB_RECVBUFF_ALIGN_SZ 8 -+ -+#define RTW_USB_RXAGG_SIZE 6 -+#define RTW_USB_RXAGG_TIMEOUT 10 -+ -+#define RTW_USB_RXCB_NUM 4 -+ -+#define RTW_USB_EP_MAX 4 -+ -+#define TX_DESC_QSEL_MAX 20 -+ -+#define RTW_USB_VENDOR_ID_REALTEK 0x0bda -+ -+static inline struct rtw_usb *rtw_get_usb_priv(struct rtw_dev *rtwdev) -+{ -+ return (struct rtw_usb *)rtwdev->priv; -+} -+ -+struct rx_usb_ctrl_block { -+ struct rtw_dev *rtwdev; -+ struct urb *rx_urb; -+ struct sk_buff *rx_skb; -+ int n; -+}; -+ -+struct rtw_usb_tx_data { -+ u8 sn; -+}; -+ -+struct rtw_usb { -+ struct rtw_dev *rtwdev; -+ struct usb_device *udev; -+ -+ /* protects usb_data_index */ -+ spinlock_t usb_lock; -+ __le32 *usb_data; -+ unsigned int usb_data_index; -+ -+ u32 bulkout_size; -+ u8 pipe_interrupt; -+ u8 pipe_in; -+ u8 out_ep[RTW_USB_EP_MAX]; -+ u8 qsel_to_ep[TX_DESC_QSEL_MAX]; -+ u8 usb_txagg_num; -+ -+ struct workqueue_struct *txwq, *rxwq; -+ -+ struct sk_buff_head tx_queue[RTW_USB_EP_MAX]; -+ struct work_struct tx_work; -+ -+ struct rx_usb_ctrl_block rx_cb[RTW_USB_RXCB_NUM]; -+ struct sk_buff_head rx_queue; -+ struct work_struct rx_work; -+}; -+ -+static inline struct rtw_usb_tx_data *rtw_usb_get_tx_data(struct sk_buff *skb) -+{ -+ struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); -+ -+ BUILD_BUG_ON(sizeof(struct rtw_usb_tx_data) > -+ sizeof(info->status.status_driver_data)); -+ -+ return (struct rtw_usb_tx_data *)info->status.status_driver_data; -+} -+ -+int rtw_usb_probe(struct usb_interface *intf, const struct usb_device_id *id); -+void rtw_usb_disconnect(struct usb_interface *intf); -+ -+#endif diff --git a/package/kernel/mac80211/patches/rtl/010-wifi-rtw88-Add-rtw8821cu-chipset-support.patch b/package/kernel/mac80211/patches/rtl/010-wifi-rtw88-Add-rtw8821cu-chipset-support.patch deleted file mode 100644 index 17c9bb16b..000000000 --- a/package/kernel/mac80211/patches/rtl/010-wifi-rtw88-Add-rtw8821cu-chipset-support.patch +++ /dev/null @@ -1,197 +0,0 @@ -From ee542f62f5ba5cf88a21e638b387c9a3b85687a5 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 2 Dec 2022 09:12:21 +0100 -Subject: [PATCH 10/13] wifi: rtw88: Add rtw8821cu chipset support - -Add support for the rtw8821cu chipset based on -https://github.com/ulli-kroll/rtw88-usb.git - -Signed-off-by: Sascha Hauer -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202081224.2779981-9-s.hauer@pengutronix.de ---- - drivers/net/wireless/realtek/rtw88/Kconfig | 11 ++++ - drivers/net/wireless/realtek/rtw88/Makefile | 3 ++ - drivers/net/wireless/realtek/rtw88/rtw8821c.c | 18 +++++++ - drivers/net/wireless/realtek/rtw88/rtw8821c.h | 21 ++++++++ - .../net/wireless/realtek/rtw88/rtw8821cu.c | 50 +++++++++++++++++++ - 5 files changed, 103 insertions(+) - create mode 100644 drivers/net/wireless/realtek/rtw88/rtw8821cu.c - ---- a/drivers/net/wireless/realtek/rtw88/Kconfig -+++ b/drivers/net/wireless/realtek/rtw88/Kconfig -@@ -87,6 +87,17 @@ config RTW88_8821CE - - 802.11ac PCIe wireless network adapter - -+config RTW88_8821CU -+ tristate "Realtek 8821CU USB wireless network adapter" -+ depends on USB -+ select RTW88_CORE -+ select RTW88_USB -+ select RTW88_8821C -+ help -+ Select this option will enable support for 8821CU chipset -+ -+ 802.11ac USB wireless network adapter -+ - config RTW88_DEBUG - bool "Realtek rtw88 debug support" - depends on RTW88_CORE ---- a/drivers/net/wireless/realtek/rtw88/Makefile -+++ b/drivers/net/wireless/realtek/rtw88/Makefile -@@ -44,6 +44,9 @@ rtw88_8821c-objs := rtw8821c.o rtw8821c - obj-$(CPTCFG_RTW88_8821CE) += rtw88_8821ce.o - rtw88_8821ce-objs := rtw8821ce.o - -+obj-$(CPTCFG_RTW88_8821CU) += rtw88_8821cu.o -+rtw88_8821cu-objs := rtw8821cu.o -+ - obj-$(CPTCFG_RTW88_PCI) += rtw88_pci.o - rtw88_pci-objs := pci.o - ---- a/drivers/net/wireless/realtek/rtw88/rtw8821c.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8821c.c -@@ -26,6 +26,12 @@ static void rtw8821ce_efuse_parsing(stru - ether_addr_copy(efuse->addr, map->e.mac_addr); - } - -+static void rtw8821cu_efuse_parsing(struct rtw_efuse *efuse, -+ struct rtw8821c_efuse *map) -+{ -+ ether_addr_copy(efuse->addr, map->u.mac_addr); -+} -+ - enum rtw8821ce_rf_set { - SWITCH_TO_BTG, - SWITCH_TO_WLG, -@@ -68,6 +74,9 @@ static int rtw8821c_read_efuse(struct rt - case RTW_HCI_TYPE_PCIE: - rtw8821ce_efuse_parsing(efuse, map); - break; -+ case RTW_HCI_TYPE_USB: -+ rtw8821cu_efuse_parsing(efuse, map); -+ break; - default: - /* unsupported now */ - return -ENOTSUPP; -@@ -1148,6 +1157,13 @@ static void rtw8821c_phy_cck_pd_set(stru - dm_info->cck_pd_default + new_lvl * 2); - } - -+static void rtw8821c_fill_txdesc_checksum(struct rtw_dev *rtwdev, -+ struct rtw_tx_pkt_info *pkt_info, -+ u8 *txdesc) -+{ -+ fill_txdesc_checksum_common(txdesc, 16); -+} -+ - static struct rtw_pwr_seq_cmd trans_carddis_to_cardemu_8821c[] = { - {0x0086, - RTW_PWR_CUT_ALL_MSK, -@@ -1521,6 +1537,7 @@ static const struct rtw_rfe_def rtw8821c - [2] = RTW_DEF_RFE_EXT(8821c, 0, 0, 2), - [4] = RTW_DEF_RFE_EXT(8821c, 0, 0, 2), - [6] = RTW_DEF_RFE(8821c, 0, 0), -+ [34] = RTW_DEF_RFE(8821c, 0, 0), - }; - - static struct rtw_hw_reg rtw8821c_dig[] = { -@@ -1595,6 +1612,7 @@ static struct rtw_chip_ops rtw8821c_ops - .config_bfee = rtw8821c_bf_config_bfee, - .set_gid_table = rtw_bf_set_gid_table, - .cfg_csi_rate = rtw_bf_cfg_csi_rate, -+ .fill_txdesc_checksum = rtw8821c_fill_txdesc_checksum, - - .coex_set_init = rtw8821c_coex_cfg_init, - .coex_set_ant_switch = rtw8821c_coex_cfg_ant_switch, ---- a/drivers/net/wireless/realtek/rtw88/rtw8821c.h -+++ b/drivers/net/wireless/realtek/rtw88/rtw8821c.h -@@ -9,6 +9,26 @@ - - #define RCR_VHT_ACK BIT(26) - -+struct rtw8821cu_efuse { -+ u8 res4[4]; /* 0xd0 */ -+ u8 usb_optional_function; -+ u8 res5[0x1e]; -+ u8 res6[2]; -+ u8 serial[0x0b]; /* 0xf5 */ -+ u8 vid; /* 0x100 */ -+ u8 res7; -+ u8 pid; -+ u8 res8[4]; -+ u8 mac_addr[ETH_ALEN]; /* 0x107 */ -+ u8 res9[2]; -+ u8 vendor_name[0x07]; -+ u8 res10[2]; -+ u8 device_name[0x14]; -+ u8 res11[0xcf]; -+ u8 package_type; /* 0x1fb */ -+ u8 res12[0x4]; -+}; -+ - struct rtw8821ce_efuse { - u8 mac_addr[ETH_ALEN]; /* 0xd0 */ - u8 vender_id[2]; -@@ -73,6 +93,7 @@ struct rtw8821c_efuse { - u8 res[3]; - union { - struct rtw8821ce_efuse e; -+ struct rtw8821cu_efuse u; - }; - }; - ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw88/rtw8821cu.c -@@ -0,0 +1,50 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2018-2019 Realtek Corporation -+ */ -+ -+#include -+#include -+#include "main.h" -+#include "rtw8821c.h" -+#include "usb.h" -+ -+static const struct usb_device_id rtw_8821cu_id_table[] = { -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xb82b, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xb820, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc821, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc820, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc82a, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc82b, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8821CU */ -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc811, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8811CU */ -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0x8811, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* 8811CU */ -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0x2006, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8821c_hw_spec) }, /* TOTOLINK A650UA v3 */ -+ {}, -+}; -+MODULE_DEVICE_TABLE(usb, rtw_8821cu_id_table); -+ -+static int rtw_8821cu_probe(struct usb_interface *intf, -+ const struct usb_device_id *id) -+{ -+ return rtw_usb_probe(intf, id); -+} -+ -+static struct usb_driver rtw_8821cu_driver = { -+ .name = "rtw_8821cu", -+ .id_table = rtw_8821cu_id_table, -+ .probe = rtw_8821cu_probe, -+ .disconnect = rtw_usb_disconnect, -+}; -+module_usb_driver(rtw_8821cu_driver); -+ -+MODULE_AUTHOR("Hans Ulli Kroll "); -+MODULE_DESCRIPTION("Realtek 802.11ac wireless 8821cu driver"); -+MODULE_LICENSE("Dual BSD/GPL"); diff --git a/package/kernel/mac80211/patches/rtl/011-wifi-rtw88-Add-rtw8822bu-chipset-support.patch b/package/kernel/mac80211/patches/rtl/011-wifi-rtw88-Add-rtw8822bu-chipset-support.patch deleted file mode 100644 index 6fe4e9749..000000000 --- a/package/kernel/mac80211/patches/rtl/011-wifi-rtw88-Add-rtw8822bu-chipset-support.patch +++ /dev/null @@ -1,194 +0,0 @@ -From 02fbb82275b164606edd12fa03e10a3e5a070b02 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 2 Dec 2022 09:12:22 +0100 -Subject: [PATCH 11/13] wifi: rtw88: Add rtw8822bu chipset support - -Add support for the rtw8822bu chipset based on -https://github.com/ulli-kroll/rtw88-usb.git - -Signed-off-by: Sascha Hauer -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202081224.2779981-10-s.hauer@pengutronix.de ---- - drivers/net/wireless/realtek/rtw88/Kconfig | 12 +++ - drivers/net/wireless/realtek/rtw88/Makefile | 3 + - drivers/net/wireless/realtek/rtw88/rtw8822b.c | 19 ++++ - .../net/wireless/realtek/rtw88/rtw8822bu.c | 90 +++++++++++++++++++ - 4 files changed, 124 insertions(+) - create mode 100644 drivers/net/wireless/realtek/rtw88/rtw8822bu.c - ---- a/drivers/net/wireless/realtek/rtw88/Kconfig -+++ b/drivers/net/wireless/realtek/rtw88/Kconfig -@@ -51,6 +51,18 @@ config RTW88_8822BE - - 802.11ac PCIe wireless network adapter - -+config RTW88_8822BU -+ tristate "Realtek 8822BU USB wireless network adapter" -+ depends on m -+ depends on USB -+ select RTW88_CORE -+ select RTW88_USB -+ select RTW88_8822B -+ help -+ Select this option will enable support for 8822BU chipset -+ -+ 802.11ac USB wireless network adapter -+ - config RTW88_8822CE - tristate "Realtek 8822CE PCI wireless network adapter" - depends on m ---- a/drivers/net/wireless/realtek/rtw88/Makefile -+++ b/drivers/net/wireless/realtek/rtw88/Makefile -@@ -26,6 +26,9 @@ rtw88_8822b-objs := rtw8822b.o rtw8822b - obj-$(CPTCFG_RTW88_8822BE) += rtw88_8822be.o - rtw88_8822be-objs := rtw8822be.o - -+obj-$(CPTCFG_RTW88_8822BU) += rtw88_8822bu.o -+rtw88_8822bu-objs := rtw8822bu.o -+ - obj-$(CPTCFG_RTW88_8822C) += rtw88_8822c.o - rtw88_8822c-objs := rtw8822c.o rtw8822c_table.o - ---- a/drivers/net/wireless/realtek/rtw88/rtw8822b.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8822b.c -@@ -26,6 +26,12 @@ static void rtw8822be_efuse_parsing(stru - ether_addr_copy(efuse->addr, map->e.mac_addr); - } - -+static void rtw8822bu_efuse_parsing(struct rtw_efuse *efuse, -+ struct rtw8822b_efuse *map) -+{ -+ ether_addr_copy(efuse->addr, map->u.mac_addr); -+} -+ - static int rtw8822b_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) - { - struct rtw_efuse *efuse = &rtwdev->efuse; -@@ -56,6 +62,9 @@ static int rtw8822b_read_efuse(struct rt - case RTW_HCI_TYPE_PCIE: - rtw8822be_efuse_parsing(efuse, map); - break; -+ case RTW_HCI_TYPE_USB: -+ rtw8822bu_efuse_parsing(efuse, map); -+ break; - default: - /* unsupported now */ - return -ENOTSUPP; -@@ -1588,6 +1597,15 @@ static void rtw8822b_adaptivity(struct r - rtw_phy_set_edcca_th(rtwdev, l2h, h2l); - } - -+static void rtw8822b_fill_txdesc_checksum(struct rtw_dev *rtwdev, -+ struct rtw_tx_pkt_info *pkt_info, -+ u8 *txdesc) -+{ -+ size_t words = 32 / 2; /* calculate the first 32 bytes (16 words) */ -+ -+ fill_txdesc_checksum_common(txdesc, words); -+} -+ - static const struct rtw_pwr_seq_cmd trans_carddis_to_cardemu_8822b[] = { - {0x0086, - RTW_PWR_CUT_ALL_MSK, -@@ -2163,6 +2181,7 @@ static struct rtw_chip_ops rtw8822b_ops - .cfg_csi_rate = rtw_bf_cfg_csi_rate, - .adaptivity_init = rtw8822b_adaptivity_init, - .adaptivity = rtw8822b_adaptivity, -+ .fill_txdesc_checksum = rtw8822b_fill_txdesc_checksum, - - .coex_set_init = rtw8822b_coex_cfg_init, - .coex_set_ant_switch = rtw8822b_coex_cfg_ant_switch, ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw88/rtw8822bu.c -@@ -0,0 +1,90 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2018-2019 Realtek Corporation -+ */ -+ -+#include -+#include -+#include "main.h" -+#include "rtw8822b.h" -+#include "usb.h" -+ -+static const struct usb_device_id rtw_8822bu_id_table[] = { -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xb812, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xb82c, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0x2102, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* CCNC */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xb822, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Edimax EW-7822ULC */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xc822, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Edimax EW-7822UTC */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xd822, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Edimax */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xe822, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Edimax */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xf822, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Edimax EW-7822UAD */ -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xb81a, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Default ID */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x0b05, 0x1841, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* ASUS AC1300 USB-AC55 B1 */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x0b05, 0x184c, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* ASUS U2 */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x0B05, 0x19aa, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* ASUS - USB-AC58 rev A1 */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x0B05, 0x1870, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* ASUS */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x0B05, 0x1874, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* ASUS */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x331e, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Dlink - DWA-181 */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x331c, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Dlink - DWA-182 - D1 */ -+ {USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x331f, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec)}, /* Dlink - DWA-183 D Ver */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x13b1, 0x0043, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Linksys WUSB6400M */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x13b1, 0x0045, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Linksys WUSB3600 v2 */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x012d, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-Link Archer T3U v1 */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x0138, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-Link Archer T3U Plus v1 */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x0115, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-Link Archer T4U V3 */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x012e, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-LINK */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x0116, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-LINK */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x2357, 0x0117, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TP-LINK */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x0846, 0x9055, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Netgear A6150 */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x0e66, 0x0025, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* Hawking HW12ACU */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x04ca, 0x8602, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* LiteOn */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x20f4, 0x808a, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822b_hw_spec) }, /* TRENDnet TEW-808UBM */ -+ {}, -+}; -+MODULE_DEVICE_TABLE(usb, rtw_8822bu_id_table); -+ -+static int rtw8822bu_probe(struct usb_interface *intf, -+ const struct usb_device_id *id) -+{ -+ return rtw_usb_probe(intf, id); -+} -+ -+static struct usb_driver rtw_8822bu_driver = { -+ .name = "rtw_8822bu", -+ .id_table = rtw_8822bu_id_table, -+ .probe = rtw8822bu_probe, -+ .disconnect = rtw_usb_disconnect, -+}; -+module_usb_driver(rtw_8822bu_driver); -+ -+MODULE_AUTHOR("Realtek Corporation"); -+MODULE_DESCRIPTION("Realtek 802.11ac wireless 8822bu driver"); -+MODULE_LICENSE("Dual BSD/GPL"); diff --git a/package/kernel/mac80211/patches/rtl/012-wifi-rtw88-Add-rtw8822cu-chipset-support.patch b/package/kernel/mac80211/patches/rtl/012-wifi-rtw88-Add-rtw8822cu-chipset-support.patch deleted file mode 100644 index 438127b9d..000000000 --- a/package/kernel/mac80211/patches/rtl/012-wifi-rtw88-Add-rtw8822cu-chipset-support.patch +++ /dev/null @@ -1,160 +0,0 @@ -From 39c7486c66bd76d182c0ad02d440d7207bccb89e Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 2 Dec 2022 09:12:23 +0100 -Subject: [PATCH 12/13] wifi: rtw88: Add rtw8822cu chipset support - -Add support for the rtw8822cu chipset based on -https://github.com/ulli-kroll/rtw88-usb.git - -Signed-off-by: Sascha Hauer -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202081224.2779981-11-s.hauer@pengutronix.de ---- - drivers/net/wireless/realtek/rtw88/Kconfig | 12 +++++ - drivers/net/wireless/realtek/rtw88/Makefile | 3 ++ - drivers/net/wireless/realtek/rtw88/rtw8822c.c | 24 ++++++++++ - .../net/wireless/realtek/rtw88/rtw8822cu.c | 44 +++++++++++++++++++ - 4 files changed, 83 insertions(+) - create mode 100644 drivers/net/wireless/realtek/rtw88/rtw8822cu.c - ---- a/drivers/net/wireless/realtek/rtw88/Kconfig -+++ b/drivers/net/wireless/realtek/rtw88/Kconfig -@@ -75,6 +75,18 @@ config RTW88_8822CE - - 802.11ac PCIe wireless network adapter - -+config RTW88_8822CU -+ tristate "Realtek 8822CU USB wireless network adapter" -+ depends on m -+ depends on USB -+ select RTW88_CORE -+ select RTW88_USB -+ select RTW88_8822C -+ help -+ Select this option will enable support for 8822CU chipset -+ -+ 802.11ac USB wireless network adapter -+ - config RTW88_8723DE - tristate "Realtek 8723DE PCI wireless network adapter" - depends on m ---- a/drivers/net/wireless/realtek/rtw88/Makefile -+++ b/drivers/net/wireless/realtek/rtw88/Makefile -@@ -35,6 +35,9 @@ rtw88_8822c-objs := rtw8822c.o rtw8822c - obj-$(CPTCFG_RTW88_8822CE) += rtw88_8822ce.o - rtw88_8822ce-objs := rtw8822ce.o - -+obj-$(CPTCFG_RTW88_8822CU) += rtw88_8822cu.o -+rtw88_8822cu-objs := rtw8822cu.o -+ - obj-$(CPTCFG_RTW88_8723D) += rtw88_8723d.o - rtw88_8723d-objs := rtw8723d.o rtw8723d_table.o - ---- a/drivers/net/wireless/realtek/rtw88/rtw8822c.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.c -@@ -29,6 +29,12 @@ static void rtw8822ce_efuse_parsing(stru - ether_addr_copy(efuse->addr, map->e.mac_addr); - } - -+static void rtw8822cu_efuse_parsing(struct rtw_efuse *efuse, -+ struct rtw8822c_efuse *map) -+{ -+ ether_addr_copy(efuse->addr, map->u.mac_addr); -+} -+ - static int rtw8822c_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) - { - struct rtw_efuse *efuse = &rtwdev->efuse; -@@ -58,6 +64,9 @@ static int rtw8822c_read_efuse(struct rt - case RTW_HCI_TYPE_PCIE: - rtw8822ce_efuse_parsing(efuse, map); - break; -+ case RTW_HCI_TYPE_USB: -+ rtw8822cu_efuse_parsing(efuse, map); -+ break; - default: - /* unsupported now */ - return -ENOTSUPP; -@@ -4557,6 +4566,18 @@ static void rtw8822c_adaptivity(struct r - rtw_phy_set_edcca_th(rtwdev, l2h, h2l); - } - -+static void rtw8822c_fill_txdesc_checksum(struct rtw_dev *rtwdev, -+ struct rtw_tx_pkt_info *pkt_info, -+ u8 *txdesc) -+{ -+ const struct rtw_chip_info *chip = rtwdev->chip; -+ size_t words; -+ -+ words = (pkt_info->pkt_offset * 8 + chip->tx_pkt_desc_sz) / 2; -+ -+ fill_txdesc_checksum_common(txdesc, words); -+} -+ - static const struct rtw_pwr_seq_cmd trans_carddis_to_cardemu_8822c[] = { - {0x0086, - RTW_PWR_CUT_ALL_MSK, -@@ -4895,6 +4916,8 @@ static const struct rtw_rfe_def rtw8822c - [0] = RTW_DEF_RFE(8822c, 0, 0), - [1] = RTW_DEF_RFE(8822c, 0, 0), - [2] = RTW_DEF_RFE(8822c, 0, 0), -+ [3] = RTW_DEF_RFE(8822c, 0, 0), -+ [4] = RTW_DEF_RFE(8822c, 0, 0), - [5] = RTW_DEF_RFE(8822c, 0, 5), - [6] = RTW_DEF_RFE(8822c, 0, 0), - }; -@@ -4978,6 +5001,7 @@ static struct rtw_chip_ops rtw8822c_ops - .cfo_track = rtw8822c_cfo_track, - .config_tx_path = rtw8822c_config_tx_path, - .config_txrx_mode = rtw8822c_config_trx_mode, -+ .fill_txdesc_checksum = rtw8822c_fill_txdesc_checksum, - - .coex_set_init = rtw8822c_coex_cfg_init, - .coex_set_ant_switch = NULL, ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw88/rtw8822cu.c -@@ -0,0 +1,44 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2018-2019 Realtek Corporation -+ */ -+ -+#include -+#include -+#include "main.h" -+#include "rtw8822c.h" -+#include "usb.h" -+ -+static const struct usb_device_id rtw_8822cu_id_table[] = { -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc82c, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc812, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xc82e, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xd820, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xd82b, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, -+ { USB_DEVICE_AND_INTERFACE_INFO(0x13b1, 0x0043, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8822c_hw_spec) }, /* Alpha - Alpha */ -+ {}, -+}; -+MODULE_DEVICE_TABLE(usb, rtw_8822cu_id_table); -+ -+static int rtw8822bu_probe(struct usb_interface *intf, -+ const struct usb_device_id *id) -+{ -+ return rtw_usb_probe(intf, id); -+} -+ -+static struct usb_driver rtw_8822cu_driver = { -+ .name = "rtw_8822cu", -+ .id_table = rtw_8822cu_id_table, -+ .probe = rtw8822bu_probe, -+ .disconnect = rtw_usb_disconnect, -+}; -+module_usb_driver(rtw_8822cu_driver); -+ -+MODULE_AUTHOR("Realtek Corporation"); -+MODULE_DESCRIPTION("Realtek 802.11ac wireless 8822cu driver"); -+MODULE_LICENSE("Dual BSD/GPL"); diff --git a/package/kernel/mac80211/patches/rtl/013-wifi-rtw88-Add-rtw8723du-chipset-support.patch b/package/kernel/mac80211/patches/rtl/013-wifi-rtw88-Add-rtw8723du-chipset-support.patch deleted file mode 100644 index b1ebdb3d8..000000000 --- a/package/kernel/mac80211/patches/rtl/013-wifi-rtw88-Add-rtw8723du-chipset-support.patch +++ /dev/null @@ -1,187 +0,0 @@ -From 8f9245f0ac82177554d990f12d5a9071db6305e4 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Fri, 2 Dec 2022 09:12:24 +0100 -Subject: [PATCH 13/13] wifi: rtw88: Add rtw8723du chipset support - -Add support for the rtw8723du chipset based on -https://github.com/ulli-kroll/rtw88-usb.git - -Signed-off-by: Sascha Hauer -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202081224.2779981-12-s.hauer@pengutronix.de ---- - drivers/net/wireless/realtek/rtw88/Kconfig | 13 +++++++ - drivers/net/wireless/realtek/rtw88/Makefile | 3 ++ - drivers/net/wireless/realtek/rtw88/rtw8723d.c | 28 +++++++++++++++ - drivers/net/wireless/realtek/rtw88/rtw8723d.h | 13 ++++++- - .../net/wireless/realtek/rtw88/rtw8723du.c | 36 +++++++++++++++++++ - 5 files changed, 92 insertions(+), 1 deletion(-) - create mode 100644 drivers/net/wireless/realtek/rtw88/rtw8723du.c - ---- a/drivers/net/wireless/realtek/rtw88/Kconfig -+++ b/drivers/net/wireless/realtek/rtw88/Kconfig -@@ -99,6 +99,18 @@ config RTW88_8723DE - - 802.11n PCIe wireless network adapter - -+config RTW88_8723DU -+ tristate "Realtek 8723DU USB wireless network adapter" -+ depends on m -+ depends on USB -+ select RTW88_CORE -+ select RTW88_USB -+ select RTW88_8723D -+ help -+ Select this option will enable support for 8723DU chipset -+ -+ 802.11n USB wireless network adapter -+ - config RTW88_8821CE - tristate "Realtek 8821CE PCI wireless network adapter" - depends on m -@@ -113,6 +125,7 @@ config RTW88_8821CE - - config RTW88_8821CU - tristate "Realtek 8821CU USB wireless network adapter" -+ depends on m - depends on USB - select RTW88_CORE - select RTW88_USB ---- a/drivers/net/wireless/realtek/rtw88/Makefile -+++ b/drivers/net/wireless/realtek/rtw88/Makefile -@@ -44,6 +44,9 @@ rtw88_8723d-objs := rtw8723d.o rtw8723d - obj-$(CPTCFG_RTW88_8723DE) += rtw88_8723de.o - rtw88_8723de-objs := rtw8723de.o - -+obj-$(CPTCFG_RTW88_8723DU) += rtw88_8723du.o -+rtw88_8723du-objs := rtw8723du.o -+ - obj-$(CPTCFG_RTW88_8821C) += rtw88_8821c.o - rtw88_8821c-objs := rtw8821c.o rtw8821c_table.o - ---- a/drivers/net/wireless/realtek/rtw88/rtw8723d.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8723d.c -@@ -210,6 +210,12 @@ static void rtw8723de_efuse_parsing(stru - ether_addr_copy(efuse->addr, map->e.mac_addr); - } - -+static void rtw8723du_efuse_parsing(struct rtw_efuse *efuse, -+ struct rtw8723d_efuse *map) -+{ -+ ether_addr_copy(efuse->addr, map->u.mac_addr); -+} -+ - static int rtw8723d_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) - { - struct rtw_efuse *efuse = &rtwdev->efuse; -@@ -239,6 +245,9 @@ static int rtw8723d_read_efuse(struct rt - case RTW_HCI_TYPE_PCIE: - rtw8723de_efuse_parsing(efuse, map); - break; -+ case RTW_HCI_TYPE_USB: -+ rtw8723du_efuse_parsing(efuse, map); -+ break; - default: - /* unsupported now */ - return -ENOTSUPP; -@@ -1945,6 +1954,24 @@ static void rtw8723d_pwr_track(struct rt - dm_info->pwr_trk_triggered = false; - } - -+static void rtw8723d_fill_txdesc_checksum(struct rtw_dev *rtwdev, -+ struct rtw_tx_pkt_info *pkt_info, -+ u8 *txdesc) -+{ -+ size_t words = 32 / 2; /* calculate the first 32 bytes (16 words) */ -+ __le16 chksum = 0; -+ __le16 *data = (__le16 *)(txdesc); -+ -+ SET_TX_DESC_TXDESC_CHECKSUM(txdesc, 0x0000); -+ -+ while (words--) -+ chksum ^= *data++; -+ -+ chksum = ~chksum; -+ -+ SET_TX_DESC_TXDESC_CHECKSUM(txdesc, __le16_to_cpu(chksum)); -+} -+ - static struct rtw_chip_ops rtw8723d_ops = { - .phy_set_param = rtw8723d_phy_set_param, - .read_efuse = rtw8723d_read_efuse, -@@ -1965,6 +1992,7 @@ static struct rtw_chip_ops rtw8723d_ops - .config_bfee = NULL, - .set_gid_table = NULL, - .cfg_csi_rate = NULL, -+ .fill_txdesc_checksum = rtw8723d_fill_txdesc_checksum, - - .coex_set_init = rtw8723d_coex_cfg_init, - .coex_set_ant_switch = NULL, ---- a/drivers/net/wireless/realtek/rtw88/rtw8723d.h -+++ b/drivers/net/wireless/realtek/rtw88/rtw8723d.h -@@ -41,6 +41,14 @@ struct rtw8723de_efuse { - u8 sub_device_id[2]; - }; - -+struct rtw8723du_efuse { -+ u8 res4[48]; /* 0xd0 */ -+ u8 vender_id[2]; /* 0x100 */ -+ u8 product_id[2]; /* 0x102 */ -+ u8 usb_option; /* 0x104 */ -+ u8 mac_addr[ETH_ALEN]; /* 0x107 */ -+}; -+ - struct rtw8723d_efuse { - __le16 rtl_id; - u8 rsvd[2]; -@@ -69,7 +77,10 @@ struct rtw8723d_efuse { - u8 rfe_option; - u8 country_code[2]; - u8 res[3]; -- struct rtw8723de_efuse e; -+ union { -+ struct rtw8723de_efuse e; -+ struct rtw8723du_efuse u; -+ }; - }; - - extern const struct rtw_chip_info rtw8723d_hw_spec; ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw88/rtw8723du.c -@@ -0,0 +1,36 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2018-2019 Realtek Corporation -+ */ -+ -+#include -+#include -+#include "main.h" -+#include "rtw8723d.h" -+#include "usb.h" -+ -+static const struct usb_device_id rtw_8723du_id_table[] = { -+ { USB_DEVICE_AND_INTERFACE_INFO(RTW_USB_VENDOR_ID_REALTEK, 0xd723, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8723d_hw_spec) }, /* 8723DU 1*1 */ -+ { USB_DEVICE_AND_INTERFACE_INFO(0x7392, 0xd611, 0xff, 0xff, 0xff), -+ .driver_info = (kernel_ulong_t)&(rtw8723d_hw_spec) }, /* Edimax EW-7611ULB V2 */ -+ { }, -+}; -+MODULE_DEVICE_TABLE(usb, rtw_8723du_id_table); -+ -+static int rtw8723du_probe(struct usb_interface *intf, -+ const struct usb_device_id *id) -+{ -+ return rtw_usb_probe(intf, id); -+} -+ -+static struct usb_driver rtw_8723du_driver = { -+ .name = "rtw_8723du", -+ .id_table = rtw_8723du_id_table, -+ .probe = rtw8723du_probe, -+ .disconnect = rtw_usb_disconnect, -+}; -+module_usb_driver(rtw_8723du_driver); -+ -+MODULE_AUTHOR("Hans Ulli Kroll "); -+MODULE_DESCRIPTION("Realtek 802.11n wireless 8723du driver"); -+MODULE_LICENSE("Dual BSD/GPL"); diff --git a/package/kernel/mac80211/patches/rtl/014-backports-rtw88-21cu-22cu-22bu-8723du.patch b/package/kernel/mac80211/patches/rtl/014-backports-rtw88-21cu-22cu-22bu-8723du.patch deleted file mode 100644 index d453f05ad..000000000 --- a/package/kernel/mac80211/patches/rtl/014-backports-rtw88-21cu-22cu-22bu-8723du.patch +++ /dev/null @@ -1,70 +0,0 @@ ---- a/Kconfig.local -+++ b/Kconfig.local -@@ -1135,15 +1135,30 @@ config BACKPORTED_RTW88_CORE - config BACKPORTED_RTW88_PCI - tristate - default RTW88_PCI -+config BACKPORTED_RTW88_USB -+ tristate -+ default RTW88_USB -+config BACKPORTED_RTW88_8821CU -+ tristate -+ default RTW88_8821CU - config BACKPORTED_RTW88_8822B - tristate - default RTW88_8822B -+config BACKPORTED_RTW88_8822BU -+ tristate -+ default RTW88_8822BU - config BACKPORTED_RTW88_8822C - tristate - default RTW88_8822C -+config BACKPORTED_RTW88_8822CU -+ tristate -+ default RTW88_8822CU - config BACKPORTED_RTW88_8723D - tristate - default RTW88_8723D -+config BACKPORTED_RTW88_8723DU -+ tristate -+ default RTW88_8723DU - config BACKPORTED_RTW88_8821C - tristate - default RTW88_8821C ---- a/defconfigs/wifi -+++ b/defconfigs/wifi -@@ -120,9 +120,13 @@ CPTCFG_RTL8821AE=m - CPTCFG_RTL8XXXU=m - CPTCFG_RTLWIFI=m - CPTCFG_RTW88_8723DE=m -+CPTCFG_RTW88_8723DU=m - CPTCFG_RTW88_8821CE=m -+CPTCFG_RTW88_8821CU=m - CPTCFG_RTW88_8822BE=m -+CPTCFG_RTW88_8822BU=m - CPTCFG_RTW88_8822CE=m -+CPTCFG_RTW88_8822CU=m - CPTCFG_RTW88=m - CPTCFG_SSB=m - CPTCFG_SSB_PCMCIAHOST=y ---- a/local-symbols -+++ b/local-symbols -@@ -375,13 +375,18 @@ RTL8XXXU_UNTESTED= - RTW88= - RTW88_CORE= - RTW88_PCI= -+RTW88_USB= - RTW88_8822B= - RTW88_8822C= - RTW88_8723D= - RTW88_8821C= -+RTW88_8821CU= - RTW88_8822BE= -+RTW88_8822BU= - RTW88_8822CE= -+RTW88_8822CU= - RTW88_8723DE= -+RTW88_8723DU= - RTW88_8821CE= - RTW88_DEBUG= - RTW88_DEBUGFS= diff --git a/package/kernel/mac80211/patches/rtl/015-wifi-rtw88-Move-register-access-from-rtw_bf_assoc-ou.patch b/package/kernel/mac80211/patches/rtl/015-wifi-rtw88-Move-register-access-from-rtw_bf_assoc-ou.patch deleted file mode 100644 index e3edfe98d..000000000 --- a/package/kernel/mac80211/patches/rtl/015-wifi-rtw88-Move-register-access-from-rtw_bf_assoc-ou.patch +++ /dev/null @@ -1,72 +0,0 @@ -From 8a1e2fd8e2da5c8b8c438e20ebffef6881cc9ab8 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sun, 8 Jan 2023 22:13:22 +0100 -Subject: [PATCH] wifi: rtw88: Move register access from rtw_bf_assoc() outside - the RCU - -USB and (upcoming) SDIO support may sleep in the read/write handlers. -Shrink the RCU critical section so it only cover the call to -ieee80211_find_sta() and finding the ic_vht_cap/vht_cap based on the -found station. This moves the chip's BFEE configuration outside the -rcu_read_lock section and thus prevent "scheduling while atomic" or -"Voluntary context switch within RCU read-side critical section!" -warnings when accessing the registers using an SDIO card (which is -where this issue has been spotted in the real world - but it also -affects USB cards). - -Reviewed-by: Ping-Ke Shih -Tested-by: Sascha Hauer -Signed-off-by: Martin Blumenstingl -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230108211324.442823-2-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/bf.c | 13 +++++++------ - 1 file changed, 7 insertions(+), 6 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/bf.c -+++ b/drivers/net/wireless/realtek/rtw88/bf.c -@@ -49,19 +49,23 @@ void rtw_bf_assoc(struct rtw_dev *rtwdev - - sta = ieee80211_find_sta(vif, bssid); - if (!sta) { -+ rcu_read_unlock(); -+ - rtw_warn(rtwdev, "failed to find station entry for bss %pM\n", - bssid); -- goto out_unlock; -+ return; - } - - ic_vht_cap = &hw->wiphy->bands[NL80211_BAND_5GHZ]->vht_cap; - vht_cap = &sta->deflink.vht_cap; - -+ rcu_read_unlock(); -+ - if ((ic_vht_cap->cap & IEEE80211_VHT_CAP_MU_BEAMFORMEE_CAPABLE) && - (vht_cap->cap & IEEE80211_VHT_CAP_MU_BEAMFORMER_CAPABLE)) { - if (bfinfo->bfer_mu_cnt >= chip->bfer_mu_max_num) { - rtw_dbg(rtwdev, RTW_DBG_BF, "mu bfer number over limit\n"); -- goto out_unlock; -+ return; - } - - ether_addr_copy(bfee->mac_addr, bssid); -@@ -75,7 +79,7 @@ void rtw_bf_assoc(struct rtw_dev *rtwdev - (vht_cap->cap & IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE)) { - if (bfinfo->bfer_su_cnt >= chip->bfer_su_max_num) { - rtw_dbg(rtwdev, RTW_DBG_BF, "su bfer number over limit\n"); -- goto out_unlock; -+ return; - } - - sound_dim = vht_cap->cap & -@@ -98,9 +102,6 @@ void rtw_bf_assoc(struct rtw_dev *rtwdev - - rtw_chip_config_bfee(rtwdev, rtwvif, bfee, true); - } -- --out_unlock: -- rcu_read_unlock(); - } - - void rtw_bf_init_bfer_entry_mu(struct rtw_dev *rtwdev, diff --git a/package/kernel/mac80211/patches/rtl/016-wifi-rtw88-Use-rtw_iterate_vifs-for-rtw_vif_watch_do.patch b/package/kernel/mac80211/patches/rtl/016-wifi-rtw88-Use-rtw_iterate_vifs-for-rtw_vif_watch_do.patch deleted file mode 100644 index f9a6fff21..000000000 --- a/package/kernel/mac80211/patches/rtl/016-wifi-rtw88-Use-rtw_iterate_vifs-for-rtw_vif_watch_do.patch +++ /dev/null @@ -1,39 +0,0 @@ -From 313f6dc7c5ed723d0c5691553eff4c0090f16bb8 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sun, 8 Jan 2023 22:13:23 +0100 -Subject: [PATCH] wifi: rtw88: Use rtw_iterate_vifs() for - rtw_vif_watch_dog_iter() - -USB and (upcoming) SDIO support may sleep in the read/write handlers. -Make rtw_watch_dog_work() use rtw_iterate_vifs() to prevent "scheduling -while atomic" or "Voluntary context switch within RCU read-side -critical section!" warnings when accessing the registers using an SDIO -card (which is where this issue has been spotted in the real world but -it also affects USB cards). - -Fixes: 78d5bf925f30 ("wifi: rtw88: iterate over vif/sta list non-atomically") -Suggested-by: Ping-Ke Shih -Reviewed-by: Ping-Ke Shih -Tested-by: Sascha Hauer -Signed-off-by: Martin Blumenstingl -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230108211324.442823-3-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/main.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -241,8 +241,10 @@ static void rtw_watch_dog_work(struct wo - rtw_phy_dynamic_mechanism(rtwdev); - - data.rtwdev = rtwdev; -- /* use atomic version to avoid taking local->iflist_mtx mutex */ -- rtw_iterate_vifs_atomic(rtwdev, rtw_vif_watch_dog_iter, &data); -+ /* rtw_iterate_vifs internally uses an atomic iterator which is needed -+ * to avoid taking local->iflist_mtx mutex -+ */ -+ rtw_iterate_vifs(rtwdev, rtw_vif_watch_dog_iter, &data); - - /* fw supports only one station associated to enter lps, if there are - * more than two stations associated to the AP, then we can not enter diff --git a/package/kernel/mac80211/patches/rtl/017-wifi-rtw88-Use-non-atomic-sta-iterator-in-rtw_ra_mas.patch b/package/kernel/mac80211/patches/rtl/017-wifi-rtw88-Use-non-atomic-sta-iterator-in-rtw_ra_mas.patch deleted file mode 100644 index 240742382..000000000 --- a/package/kernel/mac80211/patches/rtl/017-wifi-rtw88-Use-non-atomic-sta-iterator-in-rtw_ra_mas.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 2931978cd74f4a643deeea5b211523001d95aa44 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sun, 8 Jan 2023 22:13:24 +0100 -Subject: [PATCH] wifi: rtw88: Use non-atomic sta iterator in - rtw_ra_mask_info_update() - -USB and (upcoming) SDIO support may sleep in the read/write handlers. -Use non-atomic rtw_iterate_stas() in rtw_ra_mask_info_update() because -the iterator function rtw_ra_mask_info_update_iter() needs to read and -write registers from within rtw_update_sta_info(). Using the non-atomic -iterator ensures that we can sleep during USB and SDIO register reads -and writes. This fixes "scheduling while atomic" or "Voluntary context -switch within RCU read-side critical section!" warnings as seen by SDIO -card users (but it also affects USB cards). - -Fixes: 78d5bf925f30 ("wifi: rtw88: iterate over vif/sta list non-atomically") -Suggested-by: Ping-Ke Shih -Reviewed-by: Ping-Ke Shih -Tested-by: Sascha Hauer -Signed-off-by: Martin Blumenstingl -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230108211324.442823-4-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/mac80211.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c -@@ -737,7 +737,7 @@ static void rtw_ra_mask_info_update(stru - br_data.rtwdev = rtwdev; - br_data.vif = vif; - br_data.mask = mask; -- rtw_iterate_stas_atomic(rtwdev, rtw_ra_mask_info_update_iter, &br_data); -+ rtw_iterate_stas(rtwdev, rtw_ra_mask_info_update_iter, &br_data); - } - - static int rtw_ops_set_bitrate_mask(struct ieee80211_hw *hw, -@@ -746,7 +746,9 @@ static int rtw_ops_set_bitrate_mask(stru - { - struct rtw_dev *rtwdev = hw->priv; - -+ mutex_lock(&rtwdev->mutex); - rtw_ra_mask_info_update(rtwdev, vif, mask); -+ mutex_unlock(&rtwdev->mutex); - - return 0; - } diff --git a/package/kernel/mac80211/patches/rtl/018-wifi-rtw88-pci-Use-enum-type-for-rtw_hw_queue_mappin.patch b/package/kernel/mac80211/patches/rtl/018-wifi-rtw88-pci-Use-enum-type-for-rtw_hw_queue_mappin.patch deleted file mode 100644 index 4cbd371d2..000000000 --- a/package/kernel/mac80211/patches/rtl/018-wifi-rtw88-pci-Use-enum-type-for-rtw_hw_queue_mappin.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 6152b649a70861e72220de9f9abf2fe570967493 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sun, 5 Feb 2023 00:29:58 +0100 -Subject: [PATCH] wifi: rtw88: pci: Use enum type for rtw_hw_queue_mapping() - and ac_to_hwq - -rtw_hw_queue_mapping() and ac_to_hwq[] hold values of type enum -rtw_tx_queue_type. Change their types to reflect this to make it easier -to understand this part of the code. - -While here, also change the array to be static const as it is not -supposed to be modified at runtime. - -Signed-off-by: Martin Blumenstingl -Reviewed-by: Simon Horman -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230204233001.1511643-2-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/pci.c | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/pci.c -+++ b/drivers/net/wireless/realtek/rtw88/pci.c -@@ -669,7 +669,7 @@ static void rtw_pci_deep_ps(struct rtw_d - spin_unlock_bh(&rtwpci->irq_lock); - } - --static u8 ac_to_hwq[] = { -+static const enum rtw_tx_queue_type ac_to_hwq[] = { - [IEEE80211_AC_VO] = RTW_TX_QUEUE_VO, - [IEEE80211_AC_VI] = RTW_TX_QUEUE_VI, - [IEEE80211_AC_BE] = RTW_TX_QUEUE_BE, -@@ -678,12 +678,12 @@ static u8 ac_to_hwq[] = { - - static_assert(ARRAY_SIZE(ac_to_hwq) == IEEE80211_NUM_ACS); - --static u8 rtw_hw_queue_mapping(struct sk_buff *skb) -+static enum rtw_tx_queue_type rtw_hw_queue_mapping(struct sk_buff *skb) - { - struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; - __le16 fc = hdr->frame_control; - u8 q_mapping = skb_get_queue_mapping(skb); -- u8 queue; -+ enum rtw_tx_queue_type queue; - - if (unlikely(ieee80211_is_beacon(fc))) - queue = RTW_TX_QUEUE_BCN; diff --git a/package/kernel/mac80211/patches/rtl/019-wifi-rtw88-pci-Change-queue-datatype-to-enum-rtw_tx_.patch b/package/kernel/mac80211/patches/rtl/019-wifi-rtw88-pci-Change-queue-datatype-to-enum-rtw_tx_.patch deleted file mode 100644 index 0dba4d8d1..000000000 --- a/package/kernel/mac80211/patches/rtl/019-wifi-rtw88-pci-Change-queue-datatype-to-enum-rtw_tx_.patch +++ /dev/null @@ -1,89 +0,0 @@ -From c90897960c19f5bad59fcd391901ac1b7787c50b Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sun, 5 Feb 2023 00:29:59 +0100 -Subject: [PATCH] wifi: rtw88: pci: Change queue datatype to enum - rtw_tx_queue_type - -This makes it easier to understand which values are allowed for the -"queue" variable when using the enum instead of an u8. - -Acked-by: Ping-Ke Shih -Signed-off-by: Martin Blumenstingl -Reviewed-by: Simon Horman -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230204233001.1511643-3-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/pci.c | 17 ++++++++++------- - 1 file changed, 10 insertions(+), 7 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/pci.c -+++ b/drivers/net/wireless/realtek/rtw88/pci.c -@@ -30,7 +30,8 @@ static u32 rtw_pci_tx_queue_idx_addr[] = - [RTW_TX_QUEUE_H2C] = RTK_PCI_TXBD_IDX_H2CQ, - }; - --static u8 rtw_pci_get_tx_qsel(struct sk_buff *skb, u8 queue) -+static u8 rtw_pci_get_tx_qsel(struct sk_buff *skb, -+ enum rtw_tx_queue_type queue) - { - switch (queue) { - case RTW_TX_QUEUE_BCN: -@@ -542,7 +543,7 @@ static int rtw_pci_setup(struct rtw_dev - static void rtw_pci_dma_release(struct rtw_dev *rtwdev, struct rtw_pci *rtwpci) - { - struct rtw_pci_tx_ring *tx_ring; -- u8 queue; -+ enum rtw_tx_queue_type queue; - - rtw_pci_reset_trx_ring(rtwdev); - for (queue = 0; queue < RTK_MAX_TX_QUEUE_NUM; queue++) { -@@ -608,8 +609,8 @@ static void rtw_pci_deep_ps_enter(struct - { - struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; - struct rtw_pci_tx_ring *tx_ring; -+ enum rtw_tx_queue_type queue; - bool tx_empty = true; -- u8 queue; - - if (rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_TX_WAKE)) - goto enter_deep_ps; -@@ -803,7 +804,8 @@ static void rtw_pci_flush_queues(struct - __rtw_pci_flush_queues(rtwdev, pci_queues, drop); - } - --static void rtw_pci_tx_kick_off_queue(struct rtw_dev *rtwdev, u8 queue) -+static void rtw_pci_tx_kick_off_queue(struct rtw_dev *rtwdev, -+ enum rtw_tx_queue_type queue) - { - struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; - struct rtw_pci_tx_ring *ring; -@@ -822,7 +824,7 @@ static void rtw_pci_tx_kick_off_queue(st - static void rtw_pci_tx_kick_off(struct rtw_dev *rtwdev) - { - struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; -- u8 queue; -+ enum rtw_tx_queue_type queue; - - for (queue = 0; queue < RTK_MAX_TX_QUEUE_NUM; queue++) - if (test_and_clear_bit(queue, rtwpci->tx_queued)) -@@ -831,7 +833,8 @@ static void rtw_pci_tx_kick_off(struct r - - static int rtw_pci_tx_write_data(struct rtw_dev *rtwdev, - struct rtw_tx_pkt_info *pkt_info, -- struct sk_buff *skb, u8 queue) -+ struct sk_buff *skb, -+ enum rtw_tx_queue_type queue) - { - struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; - const struct rtw_chip_info *chip = rtwdev->chip; -@@ -949,9 +952,9 @@ static int rtw_pci_tx_write(struct rtw_d - struct rtw_tx_pkt_info *pkt_info, - struct sk_buff *skb) - { -+ enum rtw_tx_queue_type queue = rtw_hw_queue_mapping(skb); - struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; - struct rtw_pci_tx_ring *ring; -- u8 queue = rtw_hw_queue_mapping(skb); - int ret; - - ret = rtw_pci_tx_write_data(rtwdev, pkt_info, skb, queue); diff --git a/package/kernel/mac80211/patches/rtl/020-wifi-rtw88-Move-enum-rtw_tx_queue_type-mapping-code-.patch b/package/kernel/mac80211/patches/rtl/020-wifi-rtw88-Move-enum-rtw_tx_queue_type-mapping-code-.patch deleted file mode 100644 index 1bed8f454..000000000 --- a/package/kernel/mac80211/patches/rtl/020-wifi-rtw88-Move-enum-rtw_tx_queue_type-mapping-code-.patch +++ /dev/null @@ -1,140 +0,0 @@ -From 7b6e9df91133e13ce7d980fcdb55cc7f26099106 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sun, 5 Feb 2023 00:30:00 +0100 -Subject: [PATCH] wifi: rtw88: Move enum rtw_tx_queue_type mapping code to - tx.{c,h} - -This code is not specific to the PCIe bus type but can be re-used by USB -and SDIO bus types. Move it to tx.{c,h} to avoid code-duplication in the -future. While here, add checking of the ac argument in -rtw_tx_ac_to_hwq() so we're not accessing entries beyond the end of the -array. - -Signed-off-by: Martin Blumenstingl -Reviewed-by: Simon Horman -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230204233001.1511643-4-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/pci.c | 35 ++------------------ - drivers/net/wireless/realtek/rtw88/tx.c | 41 ++++++++++++++++++++++++ - drivers/net/wireless/realtek/rtw88/tx.h | 3 ++ - 3 files changed, 46 insertions(+), 33 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/pci.c -+++ b/drivers/net/wireless/realtek/rtw88/pci.c -@@ -670,37 +670,6 @@ static void rtw_pci_deep_ps(struct rtw_d - spin_unlock_bh(&rtwpci->irq_lock); - } - --static const enum rtw_tx_queue_type ac_to_hwq[] = { -- [IEEE80211_AC_VO] = RTW_TX_QUEUE_VO, -- [IEEE80211_AC_VI] = RTW_TX_QUEUE_VI, -- [IEEE80211_AC_BE] = RTW_TX_QUEUE_BE, -- [IEEE80211_AC_BK] = RTW_TX_QUEUE_BK, --}; -- --static_assert(ARRAY_SIZE(ac_to_hwq) == IEEE80211_NUM_ACS); -- --static enum rtw_tx_queue_type rtw_hw_queue_mapping(struct sk_buff *skb) --{ -- struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; -- __le16 fc = hdr->frame_control; -- u8 q_mapping = skb_get_queue_mapping(skb); -- enum rtw_tx_queue_type queue; -- -- if (unlikely(ieee80211_is_beacon(fc))) -- queue = RTW_TX_QUEUE_BCN; -- else if (unlikely(ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))) -- queue = RTW_TX_QUEUE_MGMT; -- else if (is_broadcast_ether_addr(hdr->addr1) || -- is_multicast_ether_addr(hdr->addr1)) -- queue = RTW_TX_QUEUE_HI0; -- else if (WARN_ON_ONCE(q_mapping >= ARRAY_SIZE(ac_to_hwq))) -- queue = ac_to_hwq[IEEE80211_AC_BE]; -- else -- queue = ac_to_hwq[q_mapping]; -- -- return queue; --} -- - static void rtw_pci_release_rsvd_page(struct rtw_pci *rtwpci, - struct rtw_pci_tx_ring *ring) - { -@@ -798,7 +767,7 @@ static void rtw_pci_flush_queues(struct - } else { - for (i = 0; i < rtwdev->hw->queues; i++) - if (queues & BIT(i)) -- pci_queues |= BIT(ac_to_hwq[i]); -+ pci_queues |= BIT(rtw_tx_ac_to_hwq(i)); - } - - __rtw_pci_flush_queues(rtwdev, pci_queues, drop); -@@ -952,7 +921,7 @@ static int rtw_pci_tx_write(struct rtw_d - struct rtw_tx_pkt_info *pkt_info, - struct sk_buff *skb) - { -- enum rtw_tx_queue_type queue = rtw_hw_queue_mapping(skb); -+ enum rtw_tx_queue_type queue = rtw_tx_queue_mapping(skb); - struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv; - struct rtw_pci_tx_ring *ring; - int ret; ---- a/drivers/net/wireless/realtek/rtw88/tx.c -+++ b/drivers/net/wireless/realtek/rtw88/tx.c -@@ -682,3 +682,44 @@ void rtw_txq_cleanup(struct rtw_dev *rtw - list_del_init(&rtwtxq->list); - spin_unlock_bh(&rtwdev->txq_lock); - } -+ -+static const enum rtw_tx_queue_type ac_to_hwq[] = { -+ [IEEE80211_AC_VO] = RTW_TX_QUEUE_VO, -+ [IEEE80211_AC_VI] = RTW_TX_QUEUE_VI, -+ [IEEE80211_AC_BE] = RTW_TX_QUEUE_BE, -+ [IEEE80211_AC_BK] = RTW_TX_QUEUE_BK, -+}; -+ -+static_assert(ARRAY_SIZE(ac_to_hwq) == IEEE80211_NUM_ACS); -+ -+enum rtw_tx_queue_type rtw_tx_ac_to_hwq(enum ieee80211_ac_numbers ac) -+{ -+ if (WARN_ON(unlikely(ac >= IEEE80211_NUM_ACS))) -+ return RTW_TX_QUEUE_BE; -+ -+ return ac_to_hwq[ac]; -+} -+EXPORT_SYMBOL(rtw_tx_ac_to_hwq); -+ -+enum rtw_tx_queue_type rtw_tx_queue_mapping(struct sk_buff *skb) -+{ -+ struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; -+ __le16 fc = hdr->frame_control; -+ u8 q_mapping = skb_get_queue_mapping(skb); -+ enum rtw_tx_queue_type queue; -+ -+ if (unlikely(ieee80211_is_beacon(fc))) -+ queue = RTW_TX_QUEUE_BCN; -+ else if (unlikely(ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))) -+ queue = RTW_TX_QUEUE_MGMT; -+ else if (is_broadcast_ether_addr(hdr->addr1) || -+ is_multicast_ether_addr(hdr->addr1)) -+ queue = RTW_TX_QUEUE_HI0; -+ else if (WARN_ON_ONCE(q_mapping >= ARRAY_SIZE(ac_to_hwq))) -+ queue = ac_to_hwq[IEEE80211_AC_BE]; -+ else -+ queue = ac_to_hwq[q_mapping]; -+ -+ return queue; -+} -+EXPORT_SYMBOL(rtw_tx_queue_mapping); ---- a/drivers/net/wireless/realtek/rtw88/tx.h -+++ b/drivers/net/wireless/realtek/rtw88/tx.h -@@ -131,6 +131,9 @@ rtw_tx_write_data_h2c_get(struct rtw_dev - struct rtw_tx_pkt_info *pkt_info, - u8 *buf, u32 size); - -+enum rtw_tx_queue_type rtw_tx_ac_to_hwq(enum ieee80211_ac_numbers ac); -+enum rtw_tx_queue_type rtw_tx_queue_mapping(struct sk_buff *skb); -+ - static inline - void fill_txdesc_checksum_common(u8 *txdesc, size_t words) - { diff --git a/package/kernel/mac80211/patches/rtl/021-49-wifi-rtw88-mac-Use-existing-macros-in-rtw_pwr_seq_pa.patch b/package/kernel/mac80211/patches/rtl/021-49-wifi-rtw88-mac-Use-existing-macros-in-rtw_pwr_seq_pa.patch deleted file mode 100644 index 1770d70dc..000000000 --- a/package/kernel/mac80211/patches/rtl/021-49-wifi-rtw88-mac-Use-existing-macros-in-rtw_pwr_seq_pa.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 24d54855ff36c7c6256cb48b735a927090142a51 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sun, 5 Feb 2023 00:30:01 +0100 -Subject: [PATCH 49/85] wifi: rtw88: mac: Use existing macros in - rtw_pwr_seq_parser() - -Replace the magic numbers for the intf_mask with their existing -RTW_PWR_INTF_PCI_MSK and RTW_PWR_INTF_USB_MSK macros to make the code -easier to understand. - -Acked-by: Ping-Ke Shih -Signed-off-by: Martin Blumenstingl -Reviewed-by: Simon Horman -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230204233001.1511643-5-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/mac.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/mac.c -+++ b/drivers/net/wireless/realtek/rtw88/mac.c -@@ -217,10 +217,10 @@ static int rtw_pwr_seq_parser(struct rtw - cut_mask = cut_version_to_mask(cut); - switch (rtw_hci_type(rtwdev)) { - case RTW_HCI_TYPE_PCIE: -- intf_mask = BIT(2); -+ intf_mask = RTW_PWR_INTF_PCI_MSK; - break; - case RTW_HCI_TYPE_USB: -- intf_mask = BIT(1); -+ intf_mask = RTW_PWR_INTF_USB_MSK; - break; - default: - return -EINVAL; diff --git a/package/kernel/mac80211/patches/rtl/021-54-wifi-rtw88-mac-Add-support-for-the-SDIO-HCI-in-rtw_p.patch b/package/kernel/mac80211/patches/rtl/021-54-wifi-rtw88-mac-Add-support-for-the-SDIO-HCI-in-rtw_p.patch deleted file mode 100644 index 0549207db..000000000 --- a/package/kernel/mac80211/patches/rtl/021-54-wifi-rtw88-mac-Add-support-for-the-SDIO-HCI-in-rtw_p.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 96c79da2e4d1a25e73916c656fe4ccf7fc8176ae Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sat, 18 Feb 2023 16:29:40 +0100 -Subject: [PATCH 54/85] wifi: rtw88: mac: Add support for the SDIO HCI in - rtw_pwr_seq_parser() - -rtw_pwr_seq_parser() needs to know about the HCI bus interface mask for -the SDIO bus so it can parse the chip state change sequences. - -Signed-off-by: Martin Blumenstingl -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230218152944.48842-2-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/mac.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw88/mac.c -+++ b/drivers/net/wireless/realtek/rtw88/mac.c -@@ -222,6 +222,9 @@ static int rtw_pwr_seq_parser(struct rtw - case RTW_HCI_TYPE_USB: - intf_mask = RTW_PWR_INTF_USB_MSK; - break; -+ case RTW_HCI_TYPE_SDIO: -+ intf_mask = RTW_PWR_INTF_SDIO_MSK; -+ break; - default: - return -EINVAL; - } diff --git a/package/kernel/mac80211/patches/rtl/021-55-wifi-rtw88-mac-Add-SDIO-HCI-support-in-the-TX-page-t.patch b/package/kernel/mac80211/patches/rtl/021-55-wifi-rtw88-mac-Add-SDIO-HCI-support-in-the-TX-page-t.patch deleted file mode 100644 index 074fcdc82..000000000 --- a/package/kernel/mac80211/patches/rtl/021-55-wifi-rtw88-mac-Add-SDIO-HCI-support-in-the-TX-page-t.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 8599ea40582d49afe437badde76e31bd7429c607 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sat, 18 Feb 2023 16:29:41 +0100 -Subject: [PATCH 55/85] wifi: rtw88: mac: Add SDIO HCI support in the TX/page - table setup - -txdma_queue_mapping() and priority_queue_cfg() can use the first entry -of each chip's rqpn_table and page_table. Add this mapping so data -transmission is possible on SDIO based chipsets. - -Signed-off-by: Martin Blumenstingl -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230218152944.48842-3-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/mac.c | 6 ++++++ - 1 file changed, 6 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw88/mac.c -+++ b/drivers/net/wireless/realtek/rtw88/mac.c -@@ -1043,6 +1043,9 @@ static int txdma_queue_mapping(struct rt - else - return -EINVAL; - break; -+ case RTW_HCI_TYPE_SDIO: -+ rqpn = &chip->rqpn_table[0]; -+ break; - default: - return -EINVAL; - } -@@ -1205,6 +1208,9 @@ static int priority_queue_cfg(struct rtw - else - return -EINVAL; - break; -+ case RTW_HCI_TYPE_SDIO: -+ pg_tbl = &chip->page_table[0]; -+ break; - default: - return -EINVAL; - } diff --git a/package/kernel/mac80211/patches/rtl/021-56-wifi-rtw88-rtw8821c-Implement-RTL8821CS-SDIO-efuse-p.patch b/package/kernel/mac80211/patches/rtl/021-56-wifi-rtw88-rtw8821c-Implement-RTL8821CS-SDIO-efuse-p.patch deleted file mode 100644 index c8f6f3c9d..000000000 --- a/package/kernel/mac80211/patches/rtl/021-56-wifi-rtw88-rtw8821c-Implement-RTL8821CS-SDIO-efuse-p.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 64e9d564653566812dfade36d20f1794407e6ca1 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sat, 18 Feb 2023 16:29:42 +0100 -Subject: [PATCH 56/85] wifi: rtw88: rtw8821c: Implement RTL8821CS (SDIO) efuse - parsing - -The efuse of the SDIO RTL8821CS chip has only one known member: the mac -address is at offset 0x11a. Add a struct rtw8821cs_efuse describing this -and use it for copying the mac address when the SDIO bus is used. - -Signed-off-by: Martin Blumenstingl -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230218152944.48842-4-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/rtw8821c.c | 9 +++++++++ - drivers/net/wireless/realtek/rtw88/rtw8821c.h | 6 ++++++ - 2 files changed, 15 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw88/rtw8821c.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8821c.c -@@ -32,6 +32,12 @@ static void rtw8821cu_efuse_parsing(stru - ether_addr_copy(efuse->addr, map->u.mac_addr); - } - -+static void rtw8821cs_efuse_parsing(struct rtw_efuse *efuse, -+ struct rtw8821c_efuse *map) -+{ -+ ether_addr_copy(efuse->addr, map->s.mac_addr); -+} -+ - enum rtw8821ce_rf_set { - SWITCH_TO_BTG, - SWITCH_TO_WLG, -@@ -77,6 +83,9 @@ static int rtw8821c_read_efuse(struct rt - case RTW_HCI_TYPE_USB: - rtw8821cu_efuse_parsing(efuse, map); - break; -+ case RTW_HCI_TYPE_SDIO: -+ rtw8821cs_efuse_parsing(efuse, map); -+ break; - default: - /* unsupported now */ - return -ENOTSUPP; ---- a/drivers/net/wireless/realtek/rtw88/rtw8821c.h -+++ b/drivers/net/wireless/realtek/rtw88/rtw8821c.h -@@ -65,6 +65,11 @@ struct rtw8821ce_efuse { - u8 res7; - }; - -+struct rtw8821cs_efuse { -+ u8 res4[0x4a]; /* 0xd0 */ -+ u8 mac_addr[ETH_ALEN]; /* 0x11a */ -+} __packed; -+ - struct rtw8821c_efuse { - __le16 rtl_id; - u8 res0[0x0e]; -@@ -94,6 +99,7 @@ struct rtw8821c_efuse { - union { - struct rtw8821ce_efuse e; - struct rtw8821cu_efuse u; -+ struct rtw8821cs_efuse s; - }; - }; - diff --git a/package/kernel/mac80211/patches/rtl/021-57-wifi-rtw88-rtw8822b-Implement-RTL8822BS-SDIO-efuse-p.patch b/package/kernel/mac80211/patches/rtl/021-57-wifi-rtw88-rtw8822b-Implement-RTL8822BS-SDIO-efuse-p.patch deleted file mode 100644 index 62704ac82..000000000 --- a/package/kernel/mac80211/patches/rtl/021-57-wifi-rtw88-rtw8822b-Implement-RTL8822BS-SDIO-efuse-p.patch +++ /dev/null @@ -1,69 +0,0 @@ -From 9e688784b8a13515ee186d0ee1cfab12b6d05241 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sat, 18 Feb 2023 16:29:43 +0100 -Subject: [PATCH 57/85] wifi: rtw88: rtw8822b: Implement RTL8822BS (SDIO) efuse - parsing - -The efuse of the SDIO RTL8822BS chip has only one known member: the mac -address is at offset 0x11a. Add a struct rtw8822bs_efuse describing this -and use it for copying the mac address when the SDIO bus is used. - -Signed-off-by: Martin Blumenstingl -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230218152944.48842-5-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/rtw8822b.c | 9 +++++++++ - drivers/net/wireless/realtek/rtw88/rtw8822b.h | 8 +++++++- - 2 files changed, 16 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/rtw8822b.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8822b.c -@@ -32,6 +32,12 @@ static void rtw8822bu_efuse_parsing(stru - ether_addr_copy(efuse->addr, map->u.mac_addr); - } - -+static void rtw8822bs_efuse_parsing(struct rtw_efuse *efuse, -+ struct rtw8822b_efuse *map) -+{ -+ ether_addr_copy(efuse->addr, map->s.mac_addr); -+} -+ - static int rtw8822b_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) - { - struct rtw_efuse *efuse = &rtwdev->efuse; -@@ -65,6 +71,9 @@ static int rtw8822b_read_efuse(struct rt - case RTW_HCI_TYPE_USB: - rtw8822bu_efuse_parsing(efuse, map); - break; -+ case RTW_HCI_TYPE_SDIO: -+ rtw8822bs_efuse_parsing(efuse, map); -+ break; - default: - /* unsupported now */ - return -ENOTSUPP; ---- a/drivers/net/wireless/realtek/rtw88/rtw8822b.h -+++ b/drivers/net/wireless/realtek/rtw88/rtw8822b.h -@@ -65,6 +65,11 @@ struct rtw8822be_efuse { - u8 res7; - }; - -+struct rtw8822bs_efuse { -+ u8 res4[0x4a]; /* 0xd0 */ -+ u8 mac_addr[ETH_ALEN]; /* 0x11a */ -+} __packed; -+ - struct rtw8822b_efuse { - __le16 rtl_id; - u8 res0[0x0e]; -@@ -92,8 +97,9 @@ struct rtw8822b_efuse { - u8 country_code[2]; - u8 res[3]; - union { -- struct rtw8822bu_efuse u; - struct rtw8822be_efuse e; -+ struct rtw8822bu_efuse u; -+ struct rtw8822bs_efuse s; - }; - }; - diff --git a/package/kernel/mac80211/patches/rtl/021-58-wifi-rtw88-rtw8822c-Implement-RTL8822CS-SDIO-efuse-p.patch b/package/kernel/mac80211/patches/rtl/021-58-wifi-rtw88-rtw8822c-Implement-RTL8822CS-SDIO-efuse-p.patch deleted file mode 100644 index b09f16d9b..000000000 --- a/package/kernel/mac80211/patches/rtl/021-58-wifi-rtw88-rtw8822c-Implement-RTL8822CS-SDIO-efuse-p.patch +++ /dev/null @@ -1,69 +0,0 @@ -From ad0a677bce20c7fa2e8af3fd7f23c0686018202b Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sat, 18 Feb 2023 16:29:44 +0100 -Subject: [PATCH 58/85] wifi: rtw88: rtw8822c: Implement RTL8822CS (SDIO) efuse - parsing - -The efuse of the SDIO RTL8822CS chip has only one known member: the mac -address is at offset 0x16a. Add a struct rtw8822cs_efuse describing this -and use it for copying the mac address when the SDIO bus is used. - -Signed-off-by: Martin Blumenstingl -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230218152944.48842-6-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/rtw8822c.c | 9 +++++++++ - drivers/net/wireless/realtek/rtw88/rtw8822c.h | 8 +++++++- - 2 files changed, 16 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/rtw8822c.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.c -@@ -35,6 +35,12 @@ static void rtw8822cu_efuse_parsing(stru - ether_addr_copy(efuse->addr, map->u.mac_addr); - } - -+static void rtw8822cs_efuse_parsing(struct rtw_efuse *efuse, -+ struct rtw8822c_efuse *map) -+{ -+ ether_addr_copy(efuse->addr, map->s.mac_addr); -+} -+ - static int rtw8822c_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) - { - struct rtw_efuse *efuse = &rtwdev->efuse; -@@ -67,6 +73,9 @@ static int rtw8822c_read_efuse(struct rt - case RTW_HCI_TYPE_USB: - rtw8822cu_efuse_parsing(efuse, map); - break; -+ case RTW_HCI_TYPE_SDIO: -+ rtw8822cs_efuse_parsing(efuse, map); -+ break; - default: - /* unsupported now */ - return -ENOTSUPP; ---- a/drivers/net/wireless/realtek/rtw88/rtw8822c.h -+++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.h -@@ -16,6 +16,11 @@ struct rtw8822cu_efuse { - u8 res2[0x3d]; - }; - -+struct rtw8822cs_efuse { -+ u8 res0[0x4a]; /* 0x120 */ -+ u8 mac_addr[ETH_ALEN]; /* 0x16a */ -+} __packed; -+ - struct rtw8822ce_efuse { - u8 mac_addr[ETH_ALEN]; /* 0x120 */ - u8 vender_id[2]; -@@ -91,8 +96,9 @@ struct rtw8822c_efuse { - u8 res9; - u8 res10[0x42]; - union { -- struct rtw8822cu_efuse u; - struct rtw8822ce_efuse e; -+ struct rtw8822cu_efuse u; -+ struct rtw8822cs_efuse s; - }; - }; - diff --git a/package/kernel/mac80211/patches/rtl/021-59-wifi-rtw88-mac-Return-the-original-error-from-rtw_pw.patch b/package/kernel/mac80211/patches/rtl/021-59-wifi-rtw88-mac-Return-the-original-error-from-rtw_pw.patch deleted file mode 100644 index 6417ea8ef..000000000 --- a/package/kernel/mac80211/patches/rtl/021-59-wifi-rtw88-mac-Return-the-original-error-from-rtw_pw.patch +++ /dev/null @@ -1,30 +0,0 @@ -From b7ed9fa2cb76ca7a3c3cd4a6d35748fe1fbda9f6 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sun, 26 Feb 2023 23:10:03 +0100 -Subject: [PATCH 59/85] wifi: rtw88: mac: Return the original error from - rtw_pwr_seq_parser() - -rtw_pwr_seq_parser() calls rtw_sub_pwr_seq_parser() which can either -return -EBUSY, -EINVAL or 0. Propagate the original error code instead -of unconditionally returning -EBUSY in case of an error. - -Fixes: e3037485c68e ("rtw88: new Realtek 802.11ac driver") -Signed-off-by: Martin Blumenstingl -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230226221004.138331-2-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/mac.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/mac.c -+++ b/drivers/net/wireless/realtek/rtw88/mac.c -@@ -236,7 +236,7 @@ static int rtw_pwr_seq_parser(struct rtw - - ret = rtw_sub_pwr_seq_parser(rtwdev, intf_mask, cut_mask, cmd); - if (ret) -- return -EBUSY; -+ return ret; - - idx++; - } while (1); diff --git a/package/kernel/mac80211/patches/rtl/021-60-wifi-rtw88-mac-Return-the-original-error-from-rtw_ma.patch b/package/kernel/mac80211/patches/rtl/021-60-wifi-rtw88-mac-Return-the-original-error-from-rtw_ma.patch deleted file mode 100644 index c867fc403..000000000 --- a/package/kernel/mac80211/patches/rtl/021-60-wifi-rtw88-mac-Return-the-original-error-from-rtw_ma.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 15c8e267dfa62f207ee1db666c822324e3362b84 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Sun, 26 Feb 2023 23:10:04 +0100 -Subject: [PATCH 60/85] wifi: rtw88: mac: Return the original error from - rtw_mac_power_switch() - -rtw_mac_power_switch() calls rtw_pwr_seq_parser() which can return --EINVAL, -EBUSY or 0. Propagate the original error code instead of -unconditionally returning -EINVAL in case of an error. - -Fixes: e3037485c68e ("rtw88: new Realtek 802.11ac driver") -Signed-off-by: Martin Blumenstingl -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230226221004.138331-3-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/mac.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/mac.c -+++ b/drivers/net/wireless/realtek/rtw88/mac.c -@@ -250,6 +250,7 @@ static int rtw_mac_power_switch(struct r - const struct rtw_pwr_seq_cmd **pwr_seq; - u8 rpwm; - bool cur_pwr; -+ int ret; - - if (rtw_chip_wcpu_11ac(rtwdev)) { - rpwm = rtw_read8(rtwdev, rtwdev->hci.rpwm_addr); -@@ -273,8 +274,9 @@ static int rtw_mac_power_switch(struct r - return -EALREADY; - - pwr_seq = pwr_on ? chip->pwr_on_seq : chip->pwr_off_seq; -- if (rtw_pwr_seq_parser(rtwdev, pwr_seq)) -- return -EINVAL; -+ ret = rtw_pwr_seq_parser(rtwdev, pwr_seq); -+ if (ret) -+ return ret; - - if (pwr_on) - set_bit(RTW_FLAG_POWERON, rtwdev->flags); diff --git a/package/kernel/mac80211/patches/rtl/021-wifi-rtw88-fix-memory-leak-in-rtw_usb_probe.patch b/package/kernel/mac80211/patches/rtl/021-wifi-rtw88-fix-memory-leak-in-rtw_usb_probe.patch deleted file mode 100644 index dab0daa4a..000000000 --- a/package/kernel/mac80211/patches/rtl/021-wifi-rtw88-fix-memory-leak-in-rtw_usb_probe.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 48181d285623198c33bb9698992502687b258efa Mon Sep 17 00:00:00 2001 -From: Dongliang Mu -Date: Thu, 9 Mar 2023 10:16:36 +0800 -Subject: [PATCH] wifi: rtw88: fix memory leak in rtw_usb_probe() - -drivers/net/wireless/realtek/rtw88/usb.c:876 rtw_usb_probe() -warn: 'hw' from ieee80211_alloc_hw() not released on lines: 811 - -Fix this by modifying return to a goto statement. - -Signed-off-by: Dongliang Mu -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230309021636.528601-1-dzm91@hust.edu.cn ---- - drivers/net/wireless/realtek/rtw88/usb.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/usb.c -+++ b/drivers/net/wireless/realtek/rtw88/usb.c -@@ -808,7 +808,7 @@ int rtw_usb_probe(struct usb_interface * - - ret = rtw_usb_alloc_rx_bufs(rtwusb); - if (ret) -- return ret; -+ goto err_release_hw; - - ret = rtw_core_init(rtwdev); - if (ret) diff --git a/package/kernel/mac80211/patches/rtl/022-wifi-rtw88-remove-unused-rtw_pci_get_tx_desc-functio.patch b/package/kernel/mac80211/patches/rtl/022-wifi-rtw88-remove-unused-rtw_pci_get_tx_desc-functio.patch deleted file mode 100644 index 1d1cf9d97..000000000 --- a/package/kernel/mac80211/patches/rtl/022-wifi-rtw88-remove-unused-rtw_pci_get_tx_desc-functio.patch +++ /dev/null @@ -1,36 +0,0 @@ -From c9b6111a6f94bd186d1f0f7a04a9b37030a27738 Mon Sep 17 00:00:00 2001 -From: Tom Rix -Date: Mon, 20 Mar 2023 19:34:48 -0400 -Subject: [PATCH 22/45] wifi: rtw88: remove unused rtw_pci_get_tx_desc function - -clang with W=1 reports -drivers/net/wireless/realtek/rtw88/pci.c:92:21: error: - unused function 'rtw_pci_get_tx_desc' [-Werror,-Wunused-function] -static inline void *rtw_pci_get_tx_desc(struct rtw_pci_tx_ring *tx_ring, u8 idx) - ^ -This function is not used, so remove it. - -Signed-off-by: Tom Rix -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230320233448.1729899-1-trix@redhat.com ---- - drivers/net/wireless/realtek/rtw88/pci.c | 7 ------- - 1 file changed, 7 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/pci.c -+++ b/drivers/net/wireless/realtek/rtw88/pci.c -@@ -89,13 +89,6 @@ static void rtw_pci_write32(struct rtw_d - writel(val, rtwpci->mmap + addr); - } - --static inline void *rtw_pci_get_tx_desc(struct rtw_pci_tx_ring *tx_ring, u8 idx) --{ -- int offset = tx_ring->r.desc_size * idx; -- -- return tx_ring->r.head + offset; --} -- - static void rtw_pci_free_tx_ring_skbs(struct rtw_dev *rtwdev, - struct rtw_pci_tx_ring *tx_ring) - { diff --git a/package/kernel/mac80211/patches/rtl/023-wifi-rtw88-Remove-redundant-pci_clear_master.patch b/package/kernel/mac80211/patches/rtl/023-wifi-rtw88-Remove-redundant-pci_clear_master.patch deleted file mode 100644 index 790581b9f..000000000 --- a/package/kernel/mac80211/patches/rtl/023-wifi-rtw88-Remove-redundant-pci_clear_master.patch +++ /dev/null @@ -1,42 +0,0 @@ -From e665c6d67e541ac7520fa8c5175ad2c0213f247e Mon Sep 17 00:00:00 2001 -From: Cai Huoqing -Date: Thu, 23 Mar 2023 19:26:12 +0800 -Subject: [PATCH 23/45] wifi: rtw88: Remove redundant pci_clear_master - -Remove pci_clear_master to simplify the code, -the bus-mastering is also cleared in do_pci_disable_device, -like this: -./drivers/pci/pci.c:2197 -static void do_pci_disable_device(struct pci_dev *dev) -{ - u16 pci_command; - - pci_read_config_word(dev, PCI_COMMAND, &pci_command); - if (pci_command & PCI_COMMAND_MASTER) { - pci_command &= ~PCI_COMMAND_MASTER; - pci_write_config_word(dev, PCI_COMMAND, pci_command); - } - - pcibios_disable_device(dev); -}. -And dev->is_busmaster is set to 0 in pci_disable_device. - -Signed-off-by: Cai Huoqing -Reviewed-by: Simon Horman -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230323112613.7550-4-cai.huoqing@linux.dev ---- - drivers/net/wireless/realtek/rtw88/pci.c | 1 - - 1 file changed, 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/pci.c -+++ b/drivers/net/wireless/realtek/rtw88/pci.c -@@ -1545,7 +1545,6 @@ static int rtw_pci_claim(struct rtw_dev - - static void rtw_pci_declaim(struct rtw_dev *rtwdev, struct pci_dev *pdev) - { -- pci_clear_master(pdev); - pci_disable_device(pdev); - } - diff --git a/package/kernel/mac80211/patches/rtl/024-wifi-rtw88-Clear-RTW_FLAG_POWERON-early-in-rtw_mac_p.patch b/package/kernel/mac80211/patches/rtl/024-wifi-rtw88-Clear-RTW_FLAG_POWERON-early-in-rtw_mac_p.patch deleted file mode 100644 index 9df21636b..000000000 --- a/package/kernel/mac80211/patches/rtl/024-wifi-rtw88-Clear-RTW_FLAG_POWERON-early-in-rtw_mac_p.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 6a92566088b1a37c1cf2c4b6b5fb733dc5bdc6a6 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Wed, 5 Apr 2023 22:07:21 +0200 -Subject: [PATCH 24/45] wifi: rtw88: Clear RTW_FLAG_POWERON early in - rtw_mac_power_switch() - -The SDIO HCI implementation needs to know when the MAC is powered on. -This is needed because 32-bit register access has to be split into 4x -8-bit register access when the MAC is not fully powered on or while -powering off. When the MAC is powered on 32-bit register access can be -used to reduce the number of transfers but splitting into 4x 8-bit -register access still works in that case. - -During the power on sequence is how RTW_FLAG_POWERON is only set when -the power on sequence has completed successfully. During power off -however RTW_FLAG_POWERON is set. This means that the upcoming SDIO HCI -implementation does not know that it has to use 4x 8-bit register -accessors. Clear the RTW_FLAG_POWERON flag early when powering off the -MAC so the whole power off sequence is processed with RTW_FLAG_POWERON -unset. This will make it possible to use the RTW_FLAG_POWERON flag in -the upcoming SDIO HCI implementation. - -Note that a failure in rtw_pwr_seq_parser() while applying -chip->pwr_off_seq can theoretically result in the RTW_FLAG_POWERON -flag being cleared while the chip is still powered on. However, -depending on when the failure occurs in the power off sequence the -chip may be on or off. Even the original approach of clearing -RTW_FLAG_POWERON only when the power off sequence has been applied -successfully could end up in some corner case where the chip is -powered off but RTW_FLAG_POWERON was not cleared. - -Reviewed-by: Ping-Ke Shih -Signed-off-by: Martin Blumenstingl -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230405200729.632435-2-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/mac.c | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/mac.c -+++ b/drivers/net/wireless/realtek/rtw88/mac.c -@@ -273,6 +273,9 @@ static int rtw_mac_power_switch(struct r - if (pwr_on == cur_pwr) - return -EALREADY; - -+ if (!pwr_on) -+ clear_bit(RTW_FLAG_POWERON, rtwdev->flags); -+ - pwr_seq = pwr_on ? chip->pwr_on_seq : chip->pwr_off_seq; - ret = rtw_pwr_seq_parser(rtwdev, pwr_seq); - if (ret) -@@ -280,8 +283,6 @@ static int rtw_mac_power_switch(struct r - - if (pwr_on) - set_bit(RTW_FLAG_POWERON, rtwdev->flags); -- else -- clear_bit(RTW_FLAG_POWERON, rtwdev->flags); - - return 0; - } diff --git a/package/kernel/mac80211/patches/rtl/025-wifi-rtw88-sdio-Add-HCI-implementation-for-SDIO-base.patch b/package/kernel/mac80211/patches/rtl/025-wifi-rtw88-sdio-Add-HCI-implementation-for-SDIO-base.patch deleted file mode 100644 index 9401f20ad..000000000 --- a/package/kernel/mac80211/patches/rtl/025-wifi-rtw88-sdio-Add-HCI-implementation-for-SDIO-base.patch +++ /dev/null @@ -1,1719 +0,0 @@ -From 65371a3f14e73979958aea0db1e3bb456a296149 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Wed, 5 Apr 2023 22:07:22 +0200 -Subject: [PATCH 25/45] wifi: rtw88: sdio: Add HCI implementation for SDIO - based chipsets - -Add a sub-driver for SDIO based chipsets which implements the following -functionality: -- register accessors for 8, 16 and 32 bits for all states of the card - (including usage of 4x 8 bit access for one 32 bit buffer if the card - is not fully powered on yet - or if it's fully powered on then 1x 32 - bit access is used) -- checking whether there's space in the TX FIFO queue to transmit data -- transfers from the host to the device for actual network traffic, - reserved pages (for firmware download) and H2C (host-to-card) - transfers -- receiving data from the device -- deep power saving state - -The transmit path is optimized so DMA-capable SDIO host controllers can -directly use the buffers provided because the buffer's physical -addresses are 8 byte aligned. - -The receive path is prepared to support RX aggregation where the -chipset combines multiple MAC frames into one bigger buffer to reduce -SDIO transfer overhead. - -Co-developed-by: Jernej Skrabec -Signed-off-by: Jernej Skrabec -Reviewed-by: Ulf Hansson -Signed-off-by: Martin Blumenstingl -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230405200729.632435-3-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/Kconfig | 3 + - drivers/net/wireless/realtek/rtw88/Makefile | 3 + - drivers/net/wireless/realtek/rtw88/debug.h | 1 + - drivers/net/wireless/realtek/rtw88/mac.c | 1 + - drivers/net/wireless/realtek/rtw88/mac.h | 1 - - drivers/net/wireless/realtek/rtw88/reg.h | 12 + - drivers/net/wireless/realtek/rtw88/sdio.c | 1394 +++++++++++++++++++ - drivers/net/wireless/realtek/rtw88/sdio.h | 178 +++ - 8 files changed, 1592 insertions(+), 1 deletion(-) - create mode 100644 drivers/net/wireless/realtek/rtw88/sdio.c - create mode 100644 drivers/net/wireless/realtek/rtw88/sdio.h - ---- a/drivers/net/wireless/realtek/rtw88/Kconfig -+++ b/drivers/net/wireless/realtek/rtw88/Kconfig -@@ -19,6 +19,11 @@ config RTW88_PCI - tristate - depends on m - -+config RTW88_SDIO -+ tristate -+ depends on m -+ -+ - config RTW88_USB - tristate - depends on m ---- a/drivers/net/wireless/realtek/rtw88/Makefile -+++ b/drivers/net/wireless/realtek/rtw88/Makefile -@@ -59,5 +59,8 @@ rtw88_8821cu-objs := rtw8821cu.o - obj-$(CPTCFG_RTW88_PCI) += rtw88_pci.o - rtw88_pci-objs := pci.o - -+obj-$(CPTCFG_RTW88_SDIO) += rtw88_sdio.o -+rtw88_sdio-objs := sdio.o -+ - obj-$(CPTCFG_RTW88_USB) += rtw88_usb.o - rtw88_usb-objs := usb.o ---- a/drivers/net/wireless/realtek/rtw88/debug.h -+++ b/drivers/net/wireless/realtek/rtw88/debug.h -@@ -24,6 +24,7 @@ enum rtw_debug_mask { - RTW_DBG_ADAPTIVITY = 0x00008000, - RTW_DBG_HW_SCAN = 0x00010000, - RTW_DBG_STATE = 0x00020000, -+ RTW_DBG_SDIO = 0x00040000, - - RTW_DBG_ALL = 0xffffffff - }; ---- a/drivers/net/wireless/realtek/rtw88/mac.c -+++ b/drivers/net/wireless/realtek/rtw88/mac.c -@@ -7,6 +7,7 @@ - #include "reg.h" - #include "fw.h" - #include "debug.h" -+#include "sdio.h" - - void rtw_set_channel_mac(struct rtw_dev *rtwdev, u8 channel, u8 bw, - u8 primary_ch_idx) ---- a/drivers/net/wireless/realtek/rtw88/mac.h -+++ b/drivers/net/wireless/realtek/rtw88/mac.h -@@ -7,7 +7,6 @@ - - #define RTW_HW_PORT_NUM 5 - #define cut_version_to_mask(cut) (0x1 << ((cut) + 1)) --#define SDIO_LOCAL_OFFSET 0x10250000 - #define DDMA_POLLING_COUNT 1000 - #define C2H_PKT_BUF 256 - #define REPORT_BUF 128 ---- a/drivers/net/wireless/realtek/rtw88/reg.h -+++ b/drivers/net/wireless/realtek/rtw88/reg.h -@@ -87,6 +87,7 @@ - #define BIT_LTE_MUX_CTRL_PATH BIT(26) - #define REG_HCI_OPT_CTRL 0x0074 - #define BIT_USB_SUS_DIS BIT(8) -+#define BIT_SDIO_PAD_E5 BIT(18) - - #define REG_AFE_CTRL_4 0x0078 - #define BIT_CK320M_AFE_EN BIT(4) -@@ -185,6 +186,9 @@ - (((x) & BIT_MASK_TXDMA_VIQ_MAP) << BIT_SHIFT_TXDMA_VIQ_MAP) - #define REG_TXDMA_PQ_MAP 0x010C - #define BIT_RXDMA_ARBBW_EN BIT(0) -+#define BIT_RXSHFT_EN BIT(1) -+#define BIT_RXDMA_AGG_EN BIT(2) -+#define BIT_TXDMA_BW_EN BIT(3) - #define BIT_SHIFT_TXDMA_BEQ_MAP 8 - #define BIT_MASK_TXDMA_BEQ_MAP 0x3 - #define BIT_TXDMA_BEQ_MAP(x) \ -@@ -283,10 +287,18 @@ - #define REG_H2C_TAIL 0x0248 - #define REG_H2C_READ_ADDR 0x024C - #define REG_H2C_INFO 0x0254 -+#define REG_RXDMA_AGG_PG_TH 0x0280 -+#define BIT_RXDMA_AGG_PG_TH GENMASK(7, 0) -+#define BIT_DMA_AGG_TO_V1 GENMASK(15, 8) -+#define BIT_EN_PRE_CALC BIT(29) - #define REG_RXPKT_NUM 0x0284 - #define BIT_RXDMA_REQ BIT(19) - #define BIT_RW_RELEASE BIT(18) - #define BIT_RXDMA_IDLE BIT(17) -+#define REG_RXDMA_STATUS 0x0288 -+#define REG_RXDMA_DPR 0x028C -+#define REG_RXDMA_MODE 0x0290 -+#define BIT_DMA_MODE BIT(1) - #define REG_RXPKTNUM 0x02B0 - - #define REG_INT_MIG 0x0304 ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw88/sdio.c -@@ -0,0 +1,1394 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright (C) 2021 Martin Blumenstingl -+ * Copyright (C) 2021 Jernej Skrabec -+ * -+ * Based on rtw88/pci.c: -+ * Copyright(c) 2018-2019 Realtek Corporation -+ */ -+ -+#include -+#include -+#include -+#include "main.h" -+#include "debug.h" -+#include "fw.h" -+#include "ps.h" -+#include "reg.h" -+#include "rx.h" -+#include "sdio.h" -+#include "tx.h" -+ -+#define RTW_SDIO_INDIRECT_RW_RETRIES 50 -+ -+static bool rtw_sdio_is_bus_addr(u32 addr) -+{ -+ return !!(addr & RTW_SDIO_BUS_MSK); -+} -+ -+static bool rtw_sdio_bus_claim_needed(struct rtw_sdio *rtwsdio) -+{ -+ return !rtwsdio->irq_thread || -+ rtwsdio->irq_thread != current; -+} -+ -+static u32 rtw_sdio_to_bus_offset(struct rtw_dev *rtwdev, u32 addr) -+{ -+ switch (addr & RTW_SDIO_BUS_MSK) { -+ case WLAN_IOREG_OFFSET: -+ addr &= WLAN_IOREG_REG_MSK; -+ addr |= FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, -+ REG_SDIO_CMD_ADDR_MAC_REG); -+ break; -+ case SDIO_LOCAL_OFFSET: -+ addr &= SDIO_LOCAL_REG_MSK; -+ addr |= FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, -+ REG_SDIO_CMD_ADDR_SDIO_REG); -+ break; -+ default: -+ rtw_warn(rtwdev, "Cannot convert addr 0x%08x to bus offset", -+ addr); -+ } -+ -+ return addr; -+} -+ -+static bool rtw_sdio_use_memcpy_io(struct rtw_dev *rtwdev, u32 addr, -+ u8 alignment) -+{ -+ return IS_ALIGNED(addr, alignment) && -+ test_bit(RTW_FLAG_POWERON, rtwdev->flags); -+} -+ -+static void rtw_sdio_writel(struct rtw_dev *rtwdev, u32 val, u32 addr, -+ int *err_ret) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ u8 buf[4]; -+ int i; -+ -+ if (rtw_sdio_use_memcpy_io(rtwdev, addr, 4)) { -+ sdio_writel(rtwsdio->sdio_func, val, addr, err_ret); -+ return; -+ } -+ -+ *(__le32 *)buf = cpu_to_le32(val); -+ -+ for (i = 0; i < 4; i++) { -+ sdio_writeb(rtwsdio->sdio_func, buf[i], addr + i, err_ret); -+ if (*err_ret) -+ return; -+ } -+} -+ -+static void rtw_sdio_writew(struct rtw_dev *rtwdev, u16 val, u32 addr, -+ int *err_ret) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ u8 buf[2]; -+ int i; -+ -+ if (rtw_sdio_use_memcpy_io(rtwdev, addr, 2)) { -+ sdio_writew(rtwsdio->sdio_func, val, addr, err_ret); -+ return; -+ } -+ -+ *(__le16 *)buf = cpu_to_le16(val); -+ -+ for (i = 0; i < 2; i++) { -+ sdio_writeb(rtwsdio->sdio_func, buf[i], addr + i, err_ret); -+ if (*err_ret) -+ return; -+ } -+} -+ -+static u32 rtw_sdio_readl(struct rtw_dev *rtwdev, u32 addr, int *err_ret) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ u8 buf[4]; -+ int i; -+ -+ if (rtw_sdio_use_memcpy_io(rtwdev, addr, 4)) -+ return sdio_readl(rtwsdio->sdio_func, addr, err_ret); -+ -+ for (i = 0; i < 4; i++) { -+ buf[i] = sdio_readb(rtwsdio->sdio_func, addr + i, err_ret); -+ if (*err_ret) -+ return 0; -+ } -+ -+ return le32_to_cpu(*(__le32 *)buf); -+} -+ -+static u16 rtw_sdio_readw(struct rtw_dev *rtwdev, u32 addr, int *err_ret) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ u8 buf[2]; -+ int i; -+ -+ if (rtw_sdio_use_memcpy_io(rtwdev, addr, 2)) -+ return sdio_readw(rtwsdio->sdio_func, addr, err_ret); -+ -+ for (i = 0; i < 2; i++) { -+ buf[i] = sdio_readb(rtwsdio->sdio_func, addr + i, err_ret); -+ if (*err_ret) -+ return 0; -+ } -+ -+ return le16_to_cpu(*(__le16 *)buf); -+} -+ -+static u32 rtw_sdio_to_io_address(struct rtw_dev *rtwdev, u32 addr, -+ bool direct) -+{ -+ if (!direct) -+ return addr; -+ -+ if (!rtw_sdio_is_bus_addr(addr)) -+ addr |= WLAN_IOREG_OFFSET; -+ -+ return rtw_sdio_to_bus_offset(rtwdev, addr); -+} -+ -+static bool rtw_sdio_use_direct_io(struct rtw_dev *rtwdev, u32 addr) -+{ -+ return !rtw_sdio_is_sdio30_supported(rtwdev) || -+ rtw_sdio_is_bus_addr(addr); -+} -+ -+static int rtw_sdio_indirect_reg_cfg(struct rtw_dev *rtwdev, u32 addr, u32 cfg) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ unsigned int retry; -+ u32 reg_cfg; -+ int ret; -+ u8 tmp; -+ -+ reg_cfg = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_CFG); -+ -+ rtw_sdio_writel(rtwdev, addr | cfg | BIT_SDIO_INDIRECT_REG_CFG_UNK20, -+ reg_cfg, &ret); -+ if (ret) -+ return ret; -+ -+ for (retry = 0; retry < RTW_SDIO_INDIRECT_RW_RETRIES; retry++) { -+ tmp = sdio_readb(rtwsdio->sdio_func, reg_cfg + 2, &ret); -+ if (!ret && (tmp & BIT(4))) -+ return 0; -+ } -+ -+ return -ETIMEDOUT; -+} -+ -+static u8 rtw_sdio_indirect_read8(struct rtw_dev *rtwdev, u32 addr, -+ int *err_ret) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ u32 reg_data; -+ -+ *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, -+ BIT_SDIO_INDIRECT_REG_CFG_READ); -+ if (*err_ret) -+ return 0; -+ -+ reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); -+ return sdio_readb(rtwsdio->sdio_func, reg_data, err_ret); -+} -+ -+static int rtw_sdio_indirect_read_bytes(struct rtw_dev *rtwdev, u32 addr, -+ u8 *buf, int count) -+{ -+ int i, ret = 0; -+ -+ for (i = 0; i < count; i++) { -+ buf[i] = rtw_sdio_indirect_read8(rtwdev, addr + i, &ret); -+ if (ret) -+ break; -+ } -+ -+ return ret; -+} -+ -+static u16 rtw_sdio_indirect_read16(struct rtw_dev *rtwdev, u32 addr, -+ int *err_ret) -+{ -+ u32 reg_data; -+ u8 buf[2]; -+ -+ if (!IS_ALIGNED(addr, 2)) { -+ *err_ret = rtw_sdio_indirect_read_bytes(rtwdev, addr, buf, 2); -+ if (*err_ret) -+ return 0; -+ -+ return le16_to_cpu(*(__le16 *)buf); -+ } -+ -+ *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, -+ BIT_SDIO_INDIRECT_REG_CFG_READ); -+ if (*err_ret) -+ return 0; -+ -+ reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); -+ return rtw_sdio_readw(rtwdev, reg_data, err_ret); -+} -+ -+static u32 rtw_sdio_indirect_read32(struct rtw_dev *rtwdev, u32 addr, -+ int *err_ret) -+{ -+ u32 reg_data; -+ u8 buf[4]; -+ -+ if (!IS_ALIGNED(addr, 4)) { -+ *err_ret = rtw_sdio_indirect_read_bytes(rtwdev, addr, buf, 4); -+ if (*err_ret) -+ return 0; -+ -+ return le32_to_cpu(*(__le32 *)buf); -+ } -+ -+ *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, -+ BIT_SDIO_INDIRECT_REG_CFG_READ); -+ if (*err_ret) -+ return 0; -+ -+ reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); -+ return rtw_sdio_readl(rtwdev, reg_data, err_ret); -+} -+ -+static u8 rtw_sdio_read8(struct rtw_dev *rtwdev, u32 addr) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ bool direct, bus_claim; -+ int ret; -+ u8 val; -+ -+ direct = rtw_sdio_use_direct_io(rtwdev, addr); -+ addr = rtw_sdio_to_io_address(rtwdev, addr, direct); -+ bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); -+ -+ if (bus_claim) -+ sdio_claim_host(rtwsdio->sdio_func); -+ -+ if (direct) -+ val = sdio_readb(rtwsdio->sdio_func, addr, &ret); -+ else -+ val = rtw_sdio_indirect_read8(rtwdev, addr, &ret); -+ -+ if (bus_claim) -+ sdio_release_host(rtwsdio->sdio_func); -+ -+ if (ret) -+ rtw_warn(rtwdev, "sdio read8 failed (0x%x): %d", addr, ret); -+ -+ return val; -+} -+ -+static u16 rtw_sdio_read16(struct rtw_dev *rtwdev, u32 addr) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ bool direct, bus_claim; -+ int ret; -+ u16 val; -+ -+ direct = rtw_sdio_use_direct_io(rtwdev, addr); -+ addr = rtw_sdio_to_io_address(rtwdev, addr, direct); -+ bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); -+ -+ if (bus_claim) -+ sdio_claim_host(rtwsdio->sdio_func); -+ -+ if (direct) -+ val = rtw_sdio_readw(rtwdev, addr, &ret); -+ else -+ val = rtw_sdio_indirect_read16(rtwdev, addr, &ret); -+ -+ if (bus_claim) -+ sdio_release_host(rtwsdio->sdio_func); -+ -+ if (ret) -+ rtw_warn(rtwdev, "sdio read16 failed (0x%x): %d", addr, ret); -+ -+ return val; -+} -+ -+static u32 rtw_sdio_read32(struct rtw_dev *rtwdev, u32 addr) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ bool direct, bus_claim; -+ u32 val; -+ int ret; -+ -+ direct = rtw_sdio_use_direct_io(rtwdev, addr); -+ addr = rtw_sdio_to_io_address(rtwdev, addr, direct); -+ bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); -+ -+ if (bus_claim) -+ sdio_claim_host(rtwsdio->sdio_func); -+ -+ if (direct) -+ val = rtw_sdio_readl(rtwdev, addr, &ret); -+ else -+ val = rtw_sdio_indirect_read32(rtwdev, addr, &ret); -+ -+ if (bus_claim) -+ sdio_release_host(rtwsdio->sdio_func); -+ -+ if (ret) -+ rtw_warn(rtwdev, "sdio read32 failed (0x%x): %d", addr, ret); -+ -+ return val; -+} -+ -+static void rtw_sdio_indirect_write8(struct rtw_dev *rtwdev, u8 val, u32 addr, -+ int *err_ret) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ u32 reg_data; -+ -+ reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); -+ sdio_writeb(rtwsdio->sdio_func, val, reg_data, err_ret); -+ if (*err_ret) -+ return; -+ -+ *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, -+ BIT_SDIO_INDIRECT_REG_CFG_WRITE); -+} -+ -+static void rtw_sdio_indirect_write16(struct rtw_dev *rtwdev, u16 val, u32 addr, -+ int *err_ret) -+{ -+ u32 reg_data; -+ -+ if (!IS_ALIGNED(addr, 2)) { -+ addr = rtw_sdio_to_io_address(rtwdev, addr, true); -+ rtw_sdio_writew(rtwdev, val, addr, err_ret); -+ return; -+ } -+ -+ reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); -+ rtw_sdio_writew(rtwdev, val, reg_data, err_ret); -+ if (*err_ret) -+ return; -+ -+ *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, -+ BIT_SDIO_INDIRECT_REG_CFG_WRITE | -+ BIT_SDIO_INDIRECT_REG_CFG_WORD); -+} -+ -+static void rtw_sdio_indirect_write32(struct rtw_dev *rtwdev, u32 val, -+ u32 addr, int *err_ret) -+{ -+ u32 reg_data; -+ -+ if (!IS_ALIGNED(addr, 4)) { -+ addr = rtw_sdio_to_io_address(rtwdev, addr, true); -+ rtw_sdio_writel(rtwdev, val, addr, err_ret); -+ return; -+ } -+ -+ reg_data = rtw_sdio_to_bus_offset(rtwdev, REG_SDIO_INDIRECT_REG_DATA); -+ rtw_sdio_writel(rtwdev, val, reg_data, err_ret); -+ -+ *err_ret = rtw_sdio_indirect_reg_cfg(rtwdev, addr, -+ BIT_SDIO_INDIRECT_REG_CFG_WRITE | -+ BIT_SDIO_INDIRECT_REG_CFG_DWORD); -+} -+ -+static void rtw_sdio_write8(struct rtw_dev *rtwdev, u32 addr, u8 val) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ bool direct, bus_claim; -+ int ret; -+ -+ direct = rtw_sdio_use_direct_io(rtwdev, addr); -+ addr = rtw_sdio_to_io_address(rtwdev, addr, direct); -+ bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); -+ -+ if (bus_claim) -+ sdio_claim_host(rtwsdio->sdio_func); -+ -+ if (direct) -+ sdio_writeb(rtwsdio->sdio_func, val, addr, &ret); -+ else -+ rtw_sdio_indirect_write8(rtwdev, val, addr, &ret); -+ -+ if (bus_claim) -+ sdio_release_host(rtwsdio->sdio_func); -+ -+ if (ret) -+ rtw_warn(rtwdev, "sdio write8 failed (0x%x): %d", addr, ret); -+} -+ -+static void rtw_sdio_write16(struct rtw_dev *rtwdev, u32 addr, u16 val) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ bool direct, bus_claim; -+ int ret; -+ -+ direct = rtw_sdio_use_direct_io(rtwdev, addr); -+ addr = rtw_sdio_to_io_address(rtwdev, addr, direct); -+ bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); -+ -+ if (bus_claim) -+ sdio_claim_host(rtwsdio->sdio_func); -+ -+ if (direct) -+ rtw_sdio_writew(rtwdev, val, addr, &ret); -+ else -+ rtw_sdio_indirect_write16(rtwdev, val, addr, &ret); -+ -+ if (bus_claim) -+ sdio_release_host(rtwsdio->sdio_func); -+ -+ if (ret) -+ rtw_warn(rtwdev, "sdio write16 failed (0x%x): %d", addr, ret); -+} -+ -+static void rtw_sdio_write32(struct rtw_dev *rtwdev, u32 addr, u32 val) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ bool direct, bus_claim; -+ int ret; -+ -+ direct = rtw_sdio_use_direct_io(rtwdev, addr); -+ addr = rtw_sdio_to_io_address(rtwdev, addr, direct); -+ bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); -+ -+ if (bus_claim) -+ sdio_claim_host(rtwsdio->sdio_func); -+ -+ if (direct) -+ rtw_sdio_writel(rtwdev, val, addr, &ret); -+ else -+ rtw_sdio_indirect_write32(rtwdev, val, addr, &ret); -+ -+ if (bus_claim) -+ sdio_release_host(rtwsdio->sdio_func); -+ -+ if (ret) -+ rtw_warn(rtwdev, "sdio write32 failed (0x%x): %d", addr, ret); -+} -+ -+static u32 rtw_sdio_get_tx_addr(struct rtw_dev *rtwdev, size_t size, -+ enum rtw_tx_queue_type queue) -+{ -+ u32 txaddr; -+ -+ switch (queue) { -+ case RTW_TX_QUEUE_BCN: -+ case RTW_TX_QUEUE_H2C: -+ case RTW_TX_QUEUE_HI0: -+ txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, -+ REG_SDIO_CMD_ADDR_TXFF_HIGH); -+ break; -+ case RTW_TX_QUEUE_VI: -+ case RTW_TX_QUEUE_VO: -+ txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, -+ REG_SDIO_CMD_ADDR_TXFF_NORMAL); -+ break; -+ case RTW_TX_QUEUE_BE: -+ case RTW_TX_QUEUE_BK: -+ txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, -+ REG_SDIO_CMD_ADDR_TXFF_LOW); -+ break; -+ case RTW_TX_QUEUE_MGMT: -+ txaddr = FIELD_PREP(REG_SDIO_CMD_ADDR_MSK, -+ REG_SDIO_CMD_ADDR_TXFF_EXTRA); -+ break; -+ default: -+ rtw_warn(rtwdev, "Unsupported queue for TX addr: 0x%02x\n", -+ queue); -+ return 0; -+ } -+ -+ txaddr += DIV_ROUND_UP(size, 4); -+ -+ return txaddr; -+}; -+ -+static int rtw_sdio_read_port(struct rtw_dev *rtwdev, u8 *buf, size_t count) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ bool bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); -+ u32 rxaddr = rtwsdio->rx_addr++; -+ int ret; -+ -+ if (bus_claim) -+ sdio_claim_host(rtwsdio->sdio_func); -+ -+ ret = sdio_memcpy_fromio(rtwsdio->sdio_func, buf, -+ RTW_SDIO_ADDR_RX_RX0FF_GEN(rxaddr), count); -+ if (ret) -+ rtw_warn(rtwdev, -+ "Failed to read %zu byte(s) from SDIO port 0x%08x", -+ count, rxaddr); -+ -+ if (bus_claim) -+ sdio_release_host(rtwsdio->sdio_func); -+ -+ return ret; -+} -+ -+static int rtw_sdio_check_free_txpg(struct rtw_dev *rtwdev, u8 queue, -+ size_t count) -+{ -+ unsigned int pages_free, pages_needed; -+ -+ if (rtw_chip_wcpu_11n(rtwdev)) { -+ u32 free_txpg; -+ -+ free_txpg = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG); -+ -+ switch (queue) { -+ case RTW_TX_QUEUE_BCN: -+ case RTW_TX_QUEUE_H2C: -+ case RTW_TX_QUEUE_HI0: -+ case RTW_TX_QUEUE_MGMT: -+ /* high */ -+ pages_free = free_txpg & 0xff; -+ break; -+ case RTW_TX_QUEUE_VI: -+ case RTW_TX_QUEUE_VO: -+ /* normal */ -+ pages_free = (free_txpg >> 8) & 0xff; -+ break; -+ case RTW_TX_QUEUE_BE: -+ case RTW_TX_QUEUE_BK: -+ /* low */ -+ pages_free = (free_txpg >> 16) & 0xff; -+ break; -+ default: -+ rtw_warn(rtwdev, "Unknown mapping for queue %u\n", queue); -+ return -EINVAL; -+ } -+ -+ /* add the pages from the public queue */ -+ pages_free += (free_txpg >> 24) & 0xff; -+ } else { -+ u32 free_txpg[3]; -+ -+ free_txpg[0] = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG); -+ free_txpg[1] = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG + 4); -+ free_txpg[2] = rtw_sdio_read32(rtwdev, REG_SDIO_FREE_TXPG + 8); -+ -+ switch (queue) { -+ case RTW_TX_QUEUE_BCN: -+ case RTW_TX_QUEUE_H2C: -+ case RTW_TX_QUEUE_HI0: -+ /* high */ -+ pages_free = free_txpg[0] & 0xfff; -+ break; -+ case RTW_TX_QUEUE_VI: -+ case RTW_TX_QUEUE_VO: -+ /* normal */ -+ pages_free = (free_txpg[0] >> 16) & 0xfff; -+ break; -+ case RTW_TX_QUEUE_BE: -+ case RTW_TX_QUEUE_BK: -+ /* low */ -+ pages_free = free_txpg[1] & 0xfff; -+ break; -+ case RTW_TX_QUEUE_MGMT: -+ /* extra */ -+ pages_free = free_txpg[2] & 0xfff; -+ break; -+ default: -+ rtw_warn(rtwdev, "Unknown mapping for queue %u\n", queue); -+ return -EINVAL; -+ } -+ -+ /* add the pages from the public queue */ -+ pages_free += (free_txpg[1] >> 16) & 0xfff; -+ } -+ -+ pages_needed = DIV_ROUND_UP(count, rtwdev->chip->page_size); -+ -+ if (pages_needed > pages_free) { -+ rtw_dbg(rtwdev, RTW_DBG_SDIO, -+ "Not enough free pages (%u needed, %u free) in queue %u for %zu bytes\n", -+ pages_needed, pages_free, queue, count); -+ return -EBUSY; -+ } -+ -+ return 0; -+} -+ -+static int rtw_sdio_write_port(struct rtw_dev *rtwdev, struct sk_buff *skb, -+ enum rtw_tx_queue_type queue) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ bool bus_claim; -+ size_t txsize; -+ u32 txaddr; -+ int ret; -+ -+ txaddr = rtw_sdio_get_tx_addr(rtwdev, skb->len, queue); -+ if (!txaddr) -+ return -EINVAL; -+ -+ txsize = sdio_align_size(rtwsdio->sdio_func, skb->len); -+ -+ ret = rtw_sdio_check_free_txpg(rtwdev, queue, txsize); -+ if (ret) -+ return ret; -+ -+ if (!IS_ALIGNED((unsigned long)skb->data, RTW_SDIO_DATA_PTR_ALIGN)) -+ rtw_warn(rtwdev, "Got unaligned SKB in %s() for queue %u\n", -+ __func__, queue); -+ -+ bus_claim = rtw_sdio_bus_claim_needed(rtwsdio); -+ -+ if (bus_claim) -+ sdio_claim_host(rtwsdio->sdio_func); -+ -+ ret = sdio_memcpy_toio(rtwsdio->sdio_func, txaddr, skb->data, txsize); -+ -+ if (bus_claim) -+ sdio_release_host(rtwsdio->sdio_func); -+ -+ if (ret) -+ rtw_warn(rtwdev, -+ "Failed to write %zu byte(s) to SDIO port 0x%08x", -+ txsize, txaddr); -+ -+ return ret; -+} -+ -+static void rtw_sdio_init(struct rtw_dev *rtwdev) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ -+ rtwsdio->irq_mask = REG_SDIO_HIMR_RX_REQUEST | REG_SDIO_HIMR_CPWM1; -+} -+ -+static void rtw_sdio_enable_rx_aggregation(struct rtw_dev *rtwdev) -+{ -+ u8 size, timeout; -+ -+ if (rtw_chip_wcpu_11n(rtwdev)) { -+ size = 0x6; -+ timeout = 0x6; -+ } else { -+ size = 0xff; -+ timeout = 0x1; -+ } -+ -+ /* Make the firmware honor the size limit configured below */ -+ rtw_write32_set(rtwdev, REG_RXDMA_AGG_PG_TH, BIT_EN_PRE_CALC); -+ -+ rtw_write8_set(rtwdev, REG_TXDMA_PQ_MAP, BIT_RXDMA_AGG_EN); -+ -+ rtw_write16(rtwdev, REG_RXDMA_AGG_PG_TH, -+ FIELD_PREP(BIT_RXDMA_AGG_PG_TH, size) | -+ FIELD_PREP(BIT_DMA_AGG_TO_V1, timeout)); -+ -+ rtw_write8_set(rtwdev, REG_RXDMA_MODE, BIT_DMA_MODE); -+} -+ -+static void rtw_sdio_enable_interrupt(struct rtw_dev *rtwdev) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ -+ rtw_write32(rtwdev, REG_SDIO_HIMR, rtwsdio->irq_mask); -+} -+ -+static void rtw_sdio_disable_interrupt(struct rtw_dev *rtwdev) -+{ -+ rtw_write32(rtwdev, REG_SDIO_HIMR, 0x0); -+} -+ -+static u8 rtw_sdio_get_tx_qsel(struct rtw_dev *rtwdev, struct sk_buff *skb, -+ u8 queue) -+{ -+ switch (queue) { -+ case RTW_TX_QUEUE_BCN: -+ return TX_DESC_QSEL_BEACON; -+ case RTW_TX_QUEUE_H2C: -+ return TX_DESC_QSEL_H2C; -+ case RTW_TX_QUEUE_MGMT: -+ if (rtw_chip_wcpu_11n(rtwdev)) -+ return TX_DESC_QSEL_HIGH; -+ else -+ return TX_DESC_QSEL_MGMT; -+ case RTW_TX_QUEUE_HI0: -+ return TX_DESC_QSEL_HIGH; -+ default: -+ return skb->priority; -+ } -+} -+ -+static int rtw_sdio_setup(struct rtw_dev *rtwdev) -+{ -+ /* nothing to do */ -+ return 0; -+} -+ -+static int rtw_sdio_start(struct rtw_dev *rtwdev) -+{ -+ rtw_sdio_enable_rx_aggregation(rtwdev); -+ rtw_sdio_enable_interrupt(rtwdev); -+ -+ return 0; -+} -+ -+static void rtw_sdio_stop(struct rtw_dev *rtwdev) -+{ -+ rtw_sdio_disable_interrupt(rtwdev); -+} -+ -+static void rtw_sdio_deep_ps_enter(struct rtw_dev *rtwdev) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ bool tx_empty = true; -+ u8 queue; -+ -+ if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_TX_WAKE)) { -+ /* Deep PS state is not allowed to TX-DMA */ -+ for (queue = 0; queue < RTK_MAX_TX_QUEUE_NUM; queue++) { -+ /* BCN queue is rsvd page, does not have DMA interrupt -+ * H2C queue is managed by firmware -+ */ -+ if (queue == RTW_TX_QUEUE_BCN || -+ queue == RTW_TX_QUEUE_H2C) -+ continue; -+ -+ /* check if there is any skb DMAing */ -+ if (skb_queue_len(&rtwsdio->tx_queue[queue])) { -+ tx_empty = false; -+ break; -+ } -+ } -+ } -+ -+ if (!tx_empty) { -+ rtw_dbg(rtwdev, RTW_DBG_PS, -+ "TX path not empty, cannot enter deep power save state\n"); -+ return; -+ } -+ -+ set_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags); -+ rtw_power_mode_change(rtwdev, true); -+} -+ -+static void rtw_sdio_deep_ps_leave(struct rtw_dev *rtwdev) -+{ -+ if (test_and_clear_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags)) -+ rtw_power_mode_change(rtwdev, false); -+} -+ -+static void rtw_sdio_deep_ps(struct rtw_dev *rtwdev, bool enter) -+{ -+ if (enter && !test_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags)) -+ rtw_sdio_deep_ps_enter(rtwdev); -+ -+ if (!enter && test_bit(RTW_FLAG_LEISURE_PS_DEEP, rtwdev->flags)) -+ rtw_sdio_deep_ps_leave(rtwdev); -+} -+ -+static void rtw_sdio_tx_kick_off(struct rtw_dev *rtwdev) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ -+ queue_work(rtwsdio->txwq, &rtwsdio->tx_handler_data->work); -+} -+ -+static void rtw_sdio_link_ps(struct rtw_dev *rtwdev, bool enter) -+{ -+ /* nothing to do */ -+} -+ -+static void rtw_sdio_interface_cfg(struct rtw_dev *rtwdev) -+{ -+ u32 val; -+ -+ rtw_read32(rtwdev, REG_SDIO_FREE_TXPG); -+ -+ val = rtw_read32(rtwdev, REG_SDIO_TX_CTRL); -+ val &= 0xfff8; -+ rtw_write32(rtwdev, REG_SDIO_TX_CTRL, val); -+} -+ -+static struct rtw_sdio_tx_data *rtw_sdio_get_tx_data(struct sk_buff *skb) -+{ -+ struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); -+ -+ BUILD_BUG_ON(sizeof(struct rtw_sdio_tx_data) > -+ sizeof(info->status.status_driver_data)); -+ -+ return (struct rtw_sdio_tx_data *)info->status.status_driver_data; -+} -+ -+static void rtw_sdio_tx_skb_prepare(struct rtw_dev *rtwdev, -+ struct rtw_tx_pkt_info *pkt_info, -+ struct sk_buff *skb, -+ enum rtw_tx_queue_type queue) -+{ -+ const struct rtw_chip_info *chip = rtwdev->chip; -+ unsigned long data_addr, aligned_addr; -+ size_t offset; -+ u8 *pkt_desc; -+ -+ pkt_desc = skb_push(skb, chip->tx_pkt_desc_sz); -+ -+ data_addr = (unsigned long)pkt_desc; -+ aligned_addr = ALIGN(data_addr, RTW_SDIO_DATA_PTR_ALIGN); -+ -+ if (data_addr != aligned_addr) { -+ /* Ensure that the start of the pkt_desc is always aligned at -+ * RTW_SDIO_DATA_PTR_ALIGN. -+ */ -+ offset = RTW_SDIO_DATA_PTR_ALIGN - (aligned_addr - data_addr); -+ -+ pkt_desc = skb_push(skb, offset); -+ -+ /* By inserting padding to align the start of the pkt_desc we -+ * need to inform the firmware that the actual data starts at -+ * a different offset than normal. -+ */ -+ pkt_info->offset += offset; -+ } -+ -+ memset(pkt_desc, 0, chip->tx_pkt_desc_sz); -+ -+ pkt_info->qsel = rtw_sdio_get_tx_qsel(rtwdev, skb, queue); -+ -+ rtw_tx_fill_tx_desc(pkt_info, skb); -+ rtw_tx_fill_txdesc_checksum(rtwdev, pkt_info, pkt_desc); -+} -+ -+static int rtw_sdio_write_data(struct rtw_dev *rtwdev, -+ struct rtw_tx_pkt_info *pkt_info, -+ struct sk_buff *skb, -+ enum rtw_tx_queue_type queue) -+{ -+ int ret; -+ -+ rtw_sdio_tx_skb_prepare(rtwdev, pkt_info, skb, queue); -+ -+ ret = rtw_sdio_write_port(rtwdev, skb, queue); -+ dev_kfree_skb_any(skb); -+ -+ return ret; -+} -+ -+static int rtw_sdio_write_data_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, -+ u32 size) -+{ -+ struct rtw_tx_pkt_info pkt_info = {}; -+ struct sk_buff *skb; -+ -+ skb = rtw_tx_write_data_rsvd_page_get(rtwdev, &pkt_info, buf, size); -+ if (!skb) -+ return -ENOMEM; -+ -+ return rtw_sdio_write_data(rtwdev, &pkt_info, skb, RTW_TX_QUEUE_BCN); -+} -+ -+static int rtw_sdio_write_data_h2c(struct rtw_dev *rtwdev, u8 *buf, u32 size) -+{ -+ struct rtw_tx_pkt_info pkt_info = {}; -+ struct sk_buff *skb; -+ -+ skb = rtw_tx_write_data_h2c_get(rtwdev, &pkt_info, buf, size); -+ if (!skb) -+ return -ENOMEM; -+ -+ return rtw_sdio_write_data(rtwdev, &pkt_info, skb, RTW_TX_QUEUE_H2C); -+} -+ -+static int rtw_sdio_tx_write(struct rtw_dev *rtwdev, -+ struct rtw_tx_pkt_info *pkt_info, -+ struct sk_buff *skb) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ enum rtw_tx_queue_type queue = rtw_tx_queue_mapping(skb); -+ struct rtw_sdio_tx_data *tx_data; -+ -+ rtw_sdio_tx_skb_prepare(rtwdev, pkt_info, skb, queue); -+ -+ tx_data = rtw_sdio_get_tx_data(skb); -+ tx_data->sn = pkt_info->sn; -+ -+ skb_queue_tail(&rtwsdio->tx_queue[queue], skb); -+ -+ return 0; -+} -+ -+static void rtw_sdio_tx_err_isr(struct rtw_dev *rtwdev) -+{ -+ u32 val = rtw_read32(rtwdev, REG_TXDMA_STATUS); -+ -+ rtw_write32(rtwdev, REG_TXDMA_STATUS, val); -+} -+ -+static void rtw_sdio_rx_skb(struct rtw_dev *rtwdev, struct sk_buff *skb, -+ u32 pkt_offset, struct rtw_rx_pkt_stat *pkt_stat, -+ struct ieee80211_rx_status *rx_status) -+{ -+ *IEEE80211_SKB_RXCB(skb) = *rx_status; -+ -+ if (pkt_stat->is_c2h) { -+ skb_put(skb, pkt_stat->pkt_len + pkt_offset); -+ rtw_fw_c2h_cmd_rx_irqsafe(rtwdev, pkt_offset, skb); -+ return; -+ } -+ -+ skb_put(skb, pkt_stat->pkt_len); -+ skb_reserve(skb, pkt_offset); -+ -+ rtw_rx_stats(rtwdev, pkt_stat->vif, skb); -+ -+ ieee80211_rx_irqsafe(rtwdev->hw, skb); -+} -+ -+static void rtw_sdio_rxfifo_recv(struct rtw_dev *rtwdev, u32 rx_len) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ const struct rtw_chip_info *chip = rtwdev->chip; -+ u32 pkt_desc_sz = chip->rx_pkt_desc_sz; -+ struct ieee80211_rx_status rx_status; -+ struct rtw_rx_pkt_stat pkt_stat; -+ struct sk_buff *skb, *split_skb; -+ u32 pkt_offset, curr_pkt_len; -+ size_t bufsz; -+ u8 *rx_desc; -+ int ret; -+ -+ bufsz = sdio_align_size(rtwsdio->sdio_func, rx_len); -+ -+ skb = dev_alloc_skb(bufsz); -+ if (!skb) -+ return; -+ -+ ret = rtw_sdio_read_port(rtwdev, skb->data, bufsz); -+ if (ret) { -+ dev_kfree_skb_any(skb); -+ return; -+ } -+ -+ while (true) { -+ rx_desc = skb->data; -+ chip->ops->query_rx_desc(rtwdev, rx_desc, &pkt_stat, -+ &rx_status); -+ pkt_offset = pkt_desc_sz + pkt_stat.drv_info_sz + -+ pkt_stat.shift; -+ -+ curr_pkt_len = ALIGN(pkt_offset + pkt_stat.pkt_len, -+ RTW_SDIO_DATA_PTR_ALIGN); -+ -+ if ((curr_pkt_len + pkt_desc_sz) >= rx_len) { -+ /* Use the original skb (with it's adjusted offset) -+ * when processing the last (or even the only) entry to -+ * have it's memory freed automatically. -+ */ -+ rtw_sdio_rx_skb(rtwdev, skb, pkt_offset, &pkt_stat, -+ &rx_status); -+ break; -+ } -+ -+ split_skb = dev_alloc_skb(curr_pkt_len); -+ if (!split_skb) { -+ rtw_sdio_rx_skb(rtwdev, skb, pkt_offset, &pkt_stat, -+ &rx_status); -+ break; -+ } -+ -+ skb_copy_header(split_skb, skb); -+ memcpy(split_skb->data, skb->data, curr_pkt_len); -+ -+ rtw_sdio_rx_skb(rtwdev, split_skb, pkt_offset, &pkt_stat, -+ &rx_status); -+ -+ /* Move to the start of the next RX descriptor */ -+ skb_reserve(skb, curr_pkt_len); -+ rx_len -= curr_pkt_len; -+ } -+} -+ -+static void rtw_sdio_rx_isr(struct rtw_dev *rtwdev) -+{ -+ u32 rx_len, total_rx_bytes = 0; -+ -+ while (total_rx_bytes < SZ_64K) { -+ if (rtw_chip_wcpu_11n(rtwdev)) -+ rx_len = rtw_read16(rtwdev, REG_SDIO_RX0_REQ_LEN); -+ else -+ rx_len = rtw_read32(rtwdev, REG_SDIO_RX0_REQ_LEN); -+ -+ if (!rx_len) -+ break; -+ -+ rtw_sdio_rxfifo_recv(rtwdev, rx_len); -+ -+ total_rx_bytes += rx_len; -+ } -+} -+ -+static void rtw_sdio_handle_interrupt(struct sdio_func *sdio_func) -+{ -+ struct ieee80211_hw *hw = sdio_get_drvdata(sdio_func); -+ struct rtw_sdio *rtwsdio; -+ struct rtw_dev *rtwdev; -+ u32 hisr; -+ -+ rtwdev = hw->priv; -+ rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ -+ rtwsdio->irq_thread = current; -+ -+ hisr = rtw_read32(rtwdev, REG_SDIO_HISR); -+ -+ if (hisr & REG_SDIO_HISR_TXERR) -+ rtw_sdio_tx_err_isr(rtwdev); -+ if (hisr & REG_SDIO_HISR_RX_REQUEST) { -+ hisr &= ~REG_SDIO_HISR_RX_REQUEST; -+ rtw_sdio_rx_isr(rtwdev); -+ } -+ -+ rtw_write32(rtwdev, REG_SDIO_HISR, hisr); -+ -+ rtwsdio->irq_thread = NULL; -+} -+ -+static int __maybe_unused rtw_sdio_suspend(struct device *dev) -+{ -+ struct sdio_func *func = dev_to_sdio_func(dev); -+ struct ieee80211_hw *hw = dev_get_drvdata(dev); -+ struct rtw_dev *rtwdev = hw->priv; -+ int ret; -+ -+ ret = sdio_set_host_pm_flags(func, MMC_PM_KEEP_POWER); -+ if (ret) -+ rtw_err(rtwdev, "Failed to host PM flag MMC_PM_KEEP_POWER"); -+ -+ return ret; -+} -+ -+static int __maybe_unused rtw_sdio_resume(struct device *dev) -+{ -+ return 0; -+} -+ -+SIMPLE_DEV_PM_OPS(rtw_sdio_pm_ops, rtw_sdio_suspend, rtw_sdio_resume); -+EXPORT_SYMBOL(rtw_sdio_pm_ops); -+ -+static int rtw_sdio_claim(struct rtw_dev *rtwdev, struct sdio_func *sdio_func) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ int ret; -+ -+ sdio_claim_host(sdio_func); -+ -+ ret = sdio_enable_func(sdio_func); -+ if (ret) { -+ rtw_err(rtwdev, "Failed to enable SDIO func"); -+ goto err_release_host; -+ } -+ -+ ret = sdio_set_block_size(sdio_func, RTW_SDIO_BLOCK_SIZE); -+ if (ret) { -+ rtw_err(rtwdev, "Failed to set SDIO block size to 512"); -+ goto err_disable_func; -+ } -+ -+ rtwsdio->sdio_func = sdio_func; -+ -+ rtwsdio->sdio3_bus_mode = mmc_card_uhs(sdio_func->card); -+ -+ sdio_set_drvdata(sdio_func, rtwdev->hw); -+ SET_IEEE80211_DEV(rtwdev->hw, &sdio_func->dev); -+ -+ sdio_release_host(sdio_func); -+ -+ return 0; -+ -+err_disable_func: -+ sdio_disable_func(sdio_func); -+err_release_host: -+ sdio_release_host(sdio_func); -+ return ret; -+} -+ -+static void rtw_sdio_declaim(struct rtw_dev *rtwdev, -+ struct sdio_func *sdio_func) -+{ -+ sdio_claim_host(sdio_func); -+ sdio_disable_func(sdio_func); -+ sdio_release_host(sdio_func); -+} -+ -+static struct rtw_hci_ops rtw_sdio_ops = { -+ .tx_write = rtw_sdio_tx_write, -+ .tx_kick_off = rtw_sdio_tx_kick_off, -+ .setup = rtw_sdio_setup, -+ .start = rtw_sdio_start, -+ .stop = rtw_sdio_stop, -+ .deep_ps = rtw_sdio_deep_ps, -+ .link_ps = rtw_sdio_link_ps, -+ .interface_cfg = rtw_sdio_interface_cfg, -+ -+ .read8 = rtw_sdio_read8, -+ .read16 = rtw_sdio_read16, -+ .read32 = rtw_sdio_read32, -+ .write8 = rtw_sdio_write8, -+ .write16 = rtw_sdio_write16, -+ .write32 = rtw_sdio_write32, -+ .write_data_rsvd_page = rtw_sdio_write_data_rsvd_page, -+ .write_data_h2c = rtw_sdio_write_data_h2c, -+}; -+ -+static int rtw_sdio_request_irq(struct rtw_dev *rtwdev, -+ struct sdio_func *sdio_func) -+{ -+ int ret; -+ -+ sdio_claim_host(sdio_func); -+ ret = sdio_claim_irq(sdio_func, &rtw_sdio_handle_interrupt); -+ sdio_release_host(sdio_func); -+ -+ if (ret) { -+ rtw_err(rtwdev, "failed to claim SDIO IRQ"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static void rtw_sdio_indicate_tx_status(struct rtw_dev *rtwdev, -+ struct sk_buff *skb) -+{ -+ struct rtw_sdio_tx_data *tx_data = rtw_sdio_get_tx_data(skb); -+ struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); -+ struct ieee80211_hw *hw = rtwdev->hw; -+ -+ /* enqueue to wait for tx report */ -+ if (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) { -+ rtw_tx_report_enqueue(rtwdev, skb, tx_data->sn); -+ return; -+ } -+ -+ /* always ACK for others, then they won't be marked as drop */ -+ ieee80211_tx_info_clear_status(info); -+ if (info->flags & IEEE80211_TX_CTL_NO_ACK) -+ info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; -+ else -+ info->flags |= IEEE80211_TX_STAT_ACK; -+ -+ ieee80211_tx_status_irqsafe(hw, skb); -+} -+ -+static void rtw_sdio_process_tx_queue(struct rtw_dev *rtwdev, -+ enum rtw_tx_queue_type queue) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ struct sk_buff *skb; -+ int ret; -+ -+ skb = skb_dequeue(&rtwsdio->tx_queue[queue]); -+ if (!skb) -+ return; -+ -+ ret = rtw_sdio_write_port(rtwdev, skb, queue); -+ if (ret) { -+ skb_queue_head(&rtwsdio->tx_queue[queue], skb); -+ return; -+ } -+ -+ if (queue <= RTW_TX_QUEUE_VO) -+ rtw_sdio_indicate_tx_status(rtwdev, skb); -+ else -+ dev_kfree_skb_any(skb); -+} -+ -+static void rtw_sdio_tx_handler(struct work_struct *work) -+{ -+ struct rtw_sdio_work_data *work_data = -+ container_of(work, struct rtw_sdio_work_data, work); -+ struct rtw_sdio *rtwsdio; -+ struct rtw_dev *rtwdev; -+ int limit, queue; -+ -+ rtwdev = work_data->rtwdev; -+ rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ -+ if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_TX_WAKE)) -+ rtw_sdio_deep_ps_leave(rtwdev); -+ -+ for (queue = RTK_MAX_TX_QUEUE_NUM - 1; queue >= 0; queue--) { -+ for (limit = 0; limit < 1000; limit++) { -+ rtw_sdio_process_tx_queue(rtwdev, queue); -+ -+ if (skb_queue_empty(&rtwsdio->tx_queue[queue])) -+ break; -+ } -+ } -+} -+ -+static void rtw_sdio_free_irq(struct rtw_dev *rtwdev, -+ struct sdio_func *sdio_func) -+{ -+ sdio_claim_host(sdio_func); -+ sdio_release_irq(sdio_func); -+ sdio_release_host(sdio_func); -+} -+ -+static int rtw_sdio_init_tx(struct rtw_dev *rtwdev) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ int i; -+ -+ rtwsdio->txwq = create_singlethread_workqueue("rtw88_sdio: tx wq"); -+ if (!rtwsdio->txwq) { -+ rtw_err(rtwdev, "failed to create TX work queue\n"); -+ return -ENOMEM; -+ } -+ -+ for (i = 0; i < RTK_MAX_TX_QUEUE_NUM; i++) -+ skb_queue_head_init(&rtwsdio->tx_queue[i]); -+ rtwsdio->tx_handler_data = kmalloc(sizeof(*rtwsdio->tx_handler_data), -+ GFP_KERNEL); -+ if (!rtwsdio->tx_handler_data) -+ goto err_destroy_wq; -+ -+ rtwsdio->tx_handler_data->rtwdev = rtwdev; -+ INIT_WORK(&rtwsdio->tx_handler_data->work, rtw_sdio_tx_handler); -+ -+ return 0; -+ -+err_destroy_wq: -+ destroy_workqueue(rtwsdio->txwq); -+ return -ENOMEM; -+} -+ -+static void rtw_sdio_deinit_tx(struct rtw_dev *rtwdev) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ int i; -+ -+ for (i = 0; i < RTK_MAX_TX_QUEUE_NUM; i++) -+ skb_queue_purge(&rtwsdio->tx_queue[i]); -+ -+ flush_workqueue(rtwsdio->txwq); -+ destroy_workqueue(rtwsdio->txwq); -+ kfree(rtwsdio->tx_handler_data); -+} -+ -+int rtw_sdio_probe(struct sdio_func *sdio_func, -+ const struct sdio_device_id *id) -+{ -+ struct ieee80211_hw *hw; -+ struct rtw_dev *rtwdev; -+ int drv_data_size; -+ int ret; -+ -+ drv_data_size = sizeof(struct rtw_dev) + sizeof(struct rtw_sdio); -+ hw = ieee80211_alloc_hw(drv_data_size, &rtw_ops); -+ if (!hw) { -+ dev_err(&sdio_func->dev, "failed to allocate hw"); -+ return -ENOMEM; -+ } -+ -+ rtwdev = hw->priv; -+ rtwdev->hw = hw; -+ rtwdev->dev = &sdio_func->dev; -+ rtwdev->chip = (struct rtw_chip_info *)id->driver_data; -+ rtwdev->hci.ops = &rtw_sdio_ops; -+ rtwdev->hci.type = RTW_HCI_TYPE_SDIO; -+ -+ ret = rtw_core_init(rtwdev); -+ if (ret) -+ goto err_release_hw; -+ -+ rtw_dbg(rtwdev, RTW_DBG_SDIO, -+ "rtw88 SDIO probe: vendor=0x%04x device=%04x class=%02x", -+ id->vendor, id->device, id->class); -+ -+ ret = rtw_sdio_claim(rtwdev, sdio_func); -+ if (ret) { -+ rtw_err(rtwdev, "failed to claim SDIO device"); -+ goto err_deinit_core; -+ } -+ -+ rtw_sdio_init(rtwdev); -+ -+ ret = rtw_sdio_init_tx(rtwdev); -+ if (ret) { -+ rtw_err(rtwdev, "failed to init SDIO TX queue\n"); -+ goto err_sdio_declaim; -+ } -+ -+ ret = rtw_chip_info_setup(rtwdev); -+ if (ret) { -+ rtw_err(rtwdev, "failed to setup chip information"); -+ goto err_destroy_txwq; -+ } -+ -+ ret = rtw_sdio_request_irq(rtwdev, sdio_func); -+ if (ret) -+ goto err_destroy_txwq; -+ -+ ret = rtw_register_hw(rtwdev, hw); -+ if (ret) { -+ rtw_err(rtwdev, "failed to register hw"); -+ goto err_free_irq; -+ } -+ -+ return 0; -+ -+err_free_irq: -+ rtw_sdio_free_irq(rtwdev, sdio_func); -+err_destroy_txwq: -+ rtw_sdio_deinit_tx(rtwdev); -+err_sdio_declaim: -+ rtw_sdio_declaim(rtwdev, sdio_func); -+err_deinit_core: -+ rtw_core_deinit(rtwdev); -+err_release_hw: -+ ieee80211_free_hw(hw); -+ -+ return ret; -+} -+EXPORT_SYMBOL(rtw_sdio_probe); -+ -+void rtw_sdio_remove(struct sdio_func *sdio_func) -+{ -+ struct ieee80211_hw *hw = sdio_get_drvdata(sdio_func); -+ struct rtw_dev *rtwdev; -+ -+ if (!hw) -+ return; -+ -+ rtwdev = hw->priv; -+ -+ rtw_unregister_hw(rtwdev, hw); -+ rtw_sdio_disable_interrupt(rtwdev); -+ rtw_sdio_free_irq(rtwdev, sdio_func); -+ rtw_sdio_declaim(rtwdev, sdio_func); -+ rtw_sdio_deinit_tx(rtwdev); -+ rtw_core_deinit(rtwdev); -+ ieee80211_free_hw(hw); -+} -+EXPORT_SYMBOL(rtw_sdio_remove); -+ -+void rtw_sdio_shutdown(struct device *dev) -+{ -+ struct sdio_func *sdio_func = dev_to_sdio_func(dev); -+ const struct rtw_chip_info *chip; -+ struct ieee80211_hw *hw; -+ struct rtw_dev *rtwdev; -+ -+ hw = sdio_get_drvdata(sdio_func); -+ if (!hw) -+ return; -+ -+ rtwdev = hw->priv; -+ chip = rtwdev->chip; -+ -+ if (chip->ops->shutdown) -+ chip->ops->shutdown(rtwdev); -+} -+EXPORT_SYMBOL(rtw_sdio_shutdown); -+ -+MODULE_AUTHOR("Martin Blumenstingl"); -+MODULE_AUTHOR("Jernej Skrabec"); -+MODULE_DESCRIPTION("Realtek 802.11ac wireless SDIO driver"); -+MODULE_LICENSE("Dual BSD/GPL"); ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw88/sdio.h -@@ -0,0 +1,178 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright (C) 2021 Martin Blumenstingl -+ * Copyright (C) 2021 Jernej Skrabec -+ */ -+ -+#ifndef __REG_SDIO_H_ -+#define __REG_SDIO_H_ -+ -+/* I/O bus domain address mapping */ -+#define SDIO_LOCAL_OFFSET 0x10250000 -+#define WLAN_IOREG_OFFSET 0x10260000 -+#define FIRMWARE_FIFO_OFFSET 0x10270000 -+#define TX_HIQ_OFFSET 0x10310000 -+#define TX_MIQ_OFFSET 0x10320000 -+#define TX_LOQ_OFFSET 0x10330000 -+#define TX_EPQ_OFFSET 0x10350000 -+#define RX_RX0FF_OFFSET 0x10340000 -+ -+#define RTW_SDIO_BUS_MSK 0xffff0000 -+#define SDIO_LOCAL_REG_MSK 0x00000fff -+#define WLAN_IOREG_REG_MSK 0x0000ffff -+ -+/* SDIO Tx Control */ -+#define REG_SDIO_TX_CTRL (SDIO_LOCAL_OFFSET + 0x0000) -+ -+/*SDIO status timeout*/ -+#define REG_SDIO_TIMEOUT (SDIO_LOCAL_OFFSET + 0x0002) -+ -+/* SDIO Host Interrupt Mask */ -+#define REG_SDIO_HIMR (SDIO_LOCAL_OFFSET + 0x0014) -+#define REG_SDIO_HIMR_RX_REQUEST BIT(0) -+#define REG_SDIO_HIMR_AVAL BIT(1) -+#define REG_SDIO_HIMR_TXERR BIT(2) -+#define REG_SDIO_HIMR_RXERR BIT(3) -+#define REG_SDIO_HIMR_TXFOVW BIT(4) -+#define REG_SDIO_HIMR_RXFOVW BIT(5) -+#define REG_SDIO_HIMR_TXBCNOK BIT(6) -+#define REG_SDIO_HIMR_TXBCNERR BIT(7) -+#define REG_SDIO_HIMR_BCNERLY_INT BIT(16) -+#define REG_SDIO_HIMR_C2HCMD BIT(17) -+#define REG_SDIO_HIMR_CPWM1 BIT(18) -+#define REG_SDIO_HIMR_CPWM2 BIT(19) -+#define REG_SDIO_HIMR_HSISR_IND BIT(20) -+#define REG_SDIO_HIMR_GTINT3_IND BIT(21) -+#define REG_SDIO_HIMR_GTINT4_IND BIT(22) -+#define REG_SDIO_HIMR_PSTIMEOUT BIT(23) -+#define REG_SDIO_HIMR_OCPINT BIT(24) -+#define REG_SDIO_HIMR_ATIMEND BIT(25) -+#define REG_SDIO_HIMR_ATIMEND_E BIT(26) -+#define REG_SDIO_HIMR_CTWEND BIT(27) -+/* the following two are RTL8188 SDIO Specific */ -+#define REG_SDIO_HIMR_MCU_ERR BIT(28) -+#define REG_SDIO_HIMR_TSF_BIT32_TOGGLE BIT(29) -+ -+/* SDIO Host Interrupt Service Routine */ -+#define REG_SDIO_HISR (SDIO_LOCAL_OFFSET + 0x0018) -+#define REG_SDIO_HISR_RX_REQUEST BIT(0) -+#define REG_SDIO_HISR_AVAL BIT(1) -+#define REG_SDIO_HISR_TXERR BIT(2) -+#define REG_SDIO_HISR_RXERR BIT(3) -+#define REG_SDIO_HISR_TXFOVW BIT(4) -+#define REG_SDIO_HISR_RXFOVW BIT(5) -+#define REG_SDIO_HISR_TXBCNOK BIT(6) -+#define REG_SDIO_HISR_TXBCNERR BIT(7) -+#define REG_SDIO_HISR_BCNERLY_INT BIT(16) -+#define REG_SDIO_HISR_C2HCMD BIT(17) -+#define REG_SDIO_HISR_CPWM1 BIT(18) -+#define REG_SDIO_HISR_CPWM2 BIT(19) -+#define REG_SDIO_HISR_HSISR_IND BIT(20) -+#define REG_SDIO_HISR_GTINT3_IND BIT(21) -+#define REG_SDIO_HISR_GTINT4_IND BIT(22) -+#define REG_SDIO_HISR_PSTIMEOUT BIT(23) -+#define REG_SDIO_HISR_OCPINT BIT(24) -+#define REG_SDIO_HISR_ATIMEND BIT(25) -+#define REG_SDIO_HISR_ATIMEND_E BIT(26) -+#define REG_SDIO_HISR_CTWEND BIT(27) -+/* the following two are RTL8188 SDIO Specific */ -+#define REG_SDIO_HISR_MCU_ERR BIT(28) -+#define REG_SDIO_HISR_TSF_BIT32_TOGGLE BIT(29) -+ -+/* HCI Current Power Mode */ -+#define REG_SDIO_HCPWM (SDIO_LOCAL_OFFSET + 0x0019) -+/* RXDMA Request Length */ -+#define REG_SDIO_RX0_REQ_LEN (SDIO_LOCAL_OFFSET + 0x001C) -+/* OQT Free Page */ -+#define REG_SDIO_OQT_FREE_PG (SDIO_LOCAL_OFFSET + 0x001E) -+/* Free Tx Buffer Page */ -+#define REG_SDIO_FREE_TXPG (SDIO_LOCAL_OFFSET + 0x0020) -+/* HCI Current Power Mode 1 */ -+#define REG_SDIO_HCPWM1 (SDIO_LOCAL_OFFSET + 0x0024) -+/* HCI Current Power Mode 2 */ -+#define REG_SDIO_HCPWM2 (SDIO_LOCAL_OFFSET + 0x0026) -+/* Free Tx Page Sequence */ -+#define REG_SDIO_FREE_TXPG_SEQ (SDIO_LOCAL_OFFSET + 0x0028) -+/* HTSF Information */ -+#define REG_SDIO_HTSFR_INFO (SDIO_LOCAL_OFFSET + 0x0030) -+#define REG_SDIO_HCPWM1_V2 (SDIO_LOCAL_OFFSET + 0x0038) -+/* H2C */ -+#define REG_SDIO_H2C (SDIO_LOCAL_OFFSET + 0x0060) -+/* HCI Request Power Mode 1 */ -+#define REG_SDIO_HRPWM1 (SDIO_LOCAL_OFFSET + 0x0080) -+/* HCI Request Power Mode 2 */ -+#define REG_SDIO_HRPWM2 (SDIO_LOCAL_OFFSET + 0x0082) -+/* HCI Power Save Clock */ -+#define REG_SDIO_HPS_CLKR (SDIO_LOCAL_OFFSET + 0x0084) -+/* SDIO HCI Suspend Control */ -+#define REG_SDIO_HSUS_CTRL (SDIO_LOCAL_OFFSET + 0x0086) -+#define BIT_HCI_SUS_REQ BIT(0) -+#define BIT_HCI_RESUME_RDY BIT(1) -+/* SDIO Host Extension Interrupt Mask Always */ -+#define REG_SDIO_HIMR_ON (SDIO_LOCAL_OFFSET + 0x0090) -+/* SDIO Host Extension Interrupt Status Always */ -+#define REG_SDIO_HISR_ON (SDIO_LOCAL_OFFSET + 0x0091) -+ -+#define REG_SDIO_INDIRECT_REG_CFG (SDIO_LOCAL_OFFSET + 0x0040) -+#define BIT_SDIO_INDIRECT_REG_CFG_WORD BIT(16) -+#define BIT_SDIO_INDIRECT_REG_CFG_DWORD BIT(17) -+#define BIT_SDIO_INDIRECT_REG_CFG_WRITE BIT(18) -+#define BIT_SDIO_INDIRECT_REG_CFG_READ BIT(19) -+#define BIT_SDIO_INDIRECT_REG_CFG_UNK20 BIT(20) -+#define REG_SDIO_INDIRECT_REG_DATA (SDIO_LOCAL_OFFSET + 0x0044) -+ -+/* Sdio Address for SDIO Local Reg, TRX FIFO, MAC Reg */ -+#define REG_SDIO_CMD_ADDR_MSK GENMASK(16, 13) -+#define REG_SDIO_CMD_ADDR_SDIO_REG 0 -+#define REG_SDIO_CMD_ADDR_MAC_REG 8 -+#define REG_SDIO_CMD_ADDR_TXFF_HIGH 4 -+#define REG_SDIO_CMD_ADDR_TXFF_LOW 6 -+#define REG_SDIO_CMD_ADDR_TXFF_NORMAL 5 -+#define REG_SDIO_CMD_ADDR_TXFF_EXTRA 7 -+#define REG_SDIO_CMD_ADDR_RXFF 7 -+ -+#define RTW_SDIO_BLOCK_SIZE 512 -+#define RTW_SDIO_ADDR_RX_RX0FF_GEN(_id) (0x0e000 | ((_id) & 0x3)) -+ -+#define RTW_SDIO_DATA_PTR_ALIGN 8 -+ -+struct sdio_func; -+struct sdio_device_id; -+ -+struct rtw_sdio_tx_data { -+ u8 sn; -+}; -+ -+struct rtw_sdio_work_data { -+ struct work_struct work; -+ struct rtw_dev *rtwdev; -+}; -+ -+struct rtw_sdio { -+ struct sdio_func *sdio_func; -+ -+ u32 irq_mask; -+ u8 rx_addr; -+ bool sdio3_bus_mode; -+ -+ void *irq_thread; -+ -+ struct workqueue_struct *txwq; -+ struct rtw_sdio_work_data *tx_handler_data; -+ struct sk_buff_head tx_queue[RTK_MAX_TX_QUEUE_NUM]; -+}; -+ -+extern const struct dev_pm_ops rtw_sdio_pm_ops; -+ -+int rtw_sdio_probe(struct sdio_func *sdio_func, -+ const struct sdio_device_id *id); -+void rtw_sdio_remove(struct sdio_func *sdio_func); -+void rtw_sdio_shutdown(struct device *dev); -+ -+static inline bool rtw_sdio_is_sdio30_supported(struct rtw_dev *rtwdev) -+{ -+ struct rtw_sdio *rtwsdio = (struct rtw_sdio *)rtwdev->priv; -+ -+ return rtwsdio->sdio3_bus_mode; -+} -+ -+#endif diff --git a/package/kernel/mac80211/patches/rtl/026-wifi-rtw88-mac-Support-SDIO-specific-bits-in-the-pow.patch b/package/kernel/mac80211/patches/rtl/026-wifi-rtw88-mac-Support-SDIO-specific-bits-in-the-pow.patch deleted file mode 100644 index 534836590..000000000 --- a/package/kernel/mac80211/patches/rtl/026-wifi-rtw88-mac-Support-SDIO-specific-bits-in-the-pow.patch +++ /dev/null @@ -1,119 +0,0 @@ -From b722e5b130bcaa8224c93c6625685d8276742cbd Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Wed, 5 Apr 2023 22:07:23 +0200 -Subject: [PATCH 26/45] wifi: rtw88: mac: Support SDIO specific bits in the - power on sequence - -Add the code specific to SDIO HCI in the MAC power on sequence. This is -based on the RTL8822BS and RTL8822CS vendor drivers. - -Co-developed-by: Jernej Skrabec -Signed-off-by: Jernej Skrabec -Reviewed-by: Ping-Ke Shih -Signed-off-by: Martin Blumenstingl -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230405200729.632435-4-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/mac.c | 47 +++++++++++++++++++++--- - 1 file changed, 42 insertions(+), 5 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/mac.c -+++ b/drivers/net/wireless/realtek/rtw88/mac.c -@@ -61,6 +61,7 @@ EXPORT_SYMBOL(rtw_set_channel_mac); - - static int rtw_mac_pre_system_cfg(struct rtw_dev *rtwdev) - { -+ unsigned int retry; - u32 value32; - u8 value8; - -@@ -78,6 +79,28 @@ static int rtw_mac_pre_system_cfg(struct - case RTW_HCI_TYPE_PCIE: - rtw_write32_set(rtwdev, REG_HCI_OPT_CTRL, BIT_USB_SUS_DIS); - break; -+ case RTW_HCI_TYPE_SDIO: -+ rtw_write8_clr(rtwdev, REG_SDIO_HSUS_CTRL, BIT_HCI_SUS_REQ); -+ -+ for (retry = 0; retry < RTW_PWR_POLLING_CNT; retry++) { -+ if (rtw_read8(rtwdev, REG_SDIO_HSUS_CTRL) & BIT_HCI_RESUME_RDY) -+ break; -+ -+ usleep_range(10, 50); -+ } -+ -+ if (retry == RTW_PWR_POLLING_CNT) { -+ rtw_err(rtwdev, "failed to poll REG_SDIO_HSUS_CTRL[1]"); -+ return -ETIMEDOUT; -+ } -+ -+ if (rtw_sdio_is_sdio30_supported(rtwdev)) -+ rtw_write8_set(rtwdev, REG_HCI_OPT_CTRL + 2, -+ BIT_SDIO_PAD_E5 >> 16); -+ else -+ rtw_write8_clr(rtwdev, REG_HCI_OPT_CTRL + 2, -+ BIT_SDIO_PAD_E5 >> 16); -+ break; - case RTW_HCI_TYPE_USB: - break; - default: -@@ -249,6 +272,7 @@ static int rtw_mac_power_switch(struct r - { - const struct rtw_chip_info *chip = rtwdev->chip; - const struct rtw_pwr_seq_cmd **pwr_seq; -+ u32 imr = 0; - u8 rpwm; - bool cur_pwr; - int ret; -@@ -274,18 +298,24 @@ static int rtw_mac_power_switch(struct r - if (pwr_on == cur_pwr) - return -EALREADY; - -+ if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) { -+ imr = rtw_read32(rtwdev, REG_SDIO_HIMR); -+ rtw_write32(rtwdev, REG_SDIO_HIMR, 0); -+ } -+ - if (!pwr_on) - clear_bit(RTW_FLAG_POWERON, rtwdev->flags); - - pwr_seq = pwr_on ? chip->pwr_on_seq : chip->pwr_off_seq; - ret = rtw_pwr_seq_parser(rtwdev, pwr_seq); -- if (ret) -- return ret; - -- if (pwr_on) -+ if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) -+ rtw_write32(rtwdev, REG_SDIO_HIMR, imr); -+ -+ if (!ret && pwr_on) - set_bit(RTW_FLAG_POWERON, rtwdev->flags); - -- return 0; -+ return ret; - } - - static int __rtw_mac_init_system_cfg(struct rtw_dev *rtwdev) -@@ -456,6 +486,9 @@ static void download_firmware_reg_backup - rtw_write16(rtwdev, REG_FIFOPAGE_INFO_1, 0x200); - rtw_write32(rtwdev, REG_RQPN_CTRL_2, bckp[bckp_idx - 1].val); - -+ if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) -+ rtw_read32(rtwdev, REG_SDIO_FREE_TXPG); -+ - /* Disable beacon related functions */ - tmp = rtw_read8(rtwdev, REG_BCN_CTRL); - bckp[bckp_idx].len = 1; -@@ -1068,8 +1101,12 @@ static int txdma_queue_mapping(struct rt - if (rtw_chip_wcpu_11ac(rtwdev)) - rtw_write32(rtwdev, REG_H2CQ_CSR, BIT_H2CQ_FULL); - -- if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_USB) -+ if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) { -+ rtw_read32(rtwdev, REG_SDIO_FREE_TXPG); -+ rtw_write32(rtwdev, REG_SDIO_TX_CTRL, 0); -+ } else if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_USB) { - rtw_write8_set(rtwdev, REG_TXDMA_PQ_MAP, BIT_RXDMA_ARBBW_EN); -+ } - - return 0; - } diff --git a/package/kernel/mac80211/patches/rtl/027-wifi-rtw88-main-Add-the-cpwm-rpwm-_addr-for-SDIO-bas.patch b/package/kernel/mac80211/patches/rtl/027-wifi-rtw88-main-Add-the-cpwm-rpwm-_addr-for-SDIO-bas.patch deleted file mode 100644 index 4f7fe2fa9..000000000 --- a/package/kernel/mac80211/patches/rtl/027-wifi-rtw88-main-Add-the-cpwm-rpwm-_addr-for-SDIO-bas.patch +++ /dev/null @@ -1,38 +0,0 @@ -From a5d25f9ff91831f3a87aca96480a8b080546ccb8 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Wed, 5 Apr 2023 22:07:24 +0200 -Subject: [PATCH 27/45] wifi: rtw88: main: Add the {cpwm,rpwm}_addr for SDIO - based chipsets - -Initialize the rpwm_addr and cpwm_addr for power-saving support on SDIO -based chipsets. - -Reviewed-by: Ping-Ke Shih -Signed-off-by: Martin Blumenstingl -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230405200729.632435-5-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/main.c | 5 +++++ - 1 file changed, 5 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -18,6 +18,7 @@ - #include "debug.h" - #include "bf.h" - #include "sar.h" -+#include "sdio.h" - - bool rtw_disable_lps_deep_mode; - EXPORT_SYMBOL(rtw_disable_lps_deep_mode); -@@ -1785,6 +1786,10 @@ static int rtw_chip_parameter_setup(stru - rtwdev->hci.rpwm_addr = 0x03d9; - rtwdev->hci.cpwm_addr = 0x03da; - break; -+ case RTW_HCI_TYPE_SDIO: -+ rtwdev->hci.rpwm_addr = REG_SDIO_HRPWM1; -+ rtwdev->hci.cpwm_addr = REG_SDIO_HCPWM1_V2; -+ break; - case RTW_HCI_TYPE_USB: - rtwdev->hci.rpwm_addr = 0xfe58; - rtwdev->hci.cpwm_addr = 0xfe57; diff --git a/package/kernel/mac80211/patches/rtl/028-wifi-rtw88-main-Reserve-8-bytes-of-extra-TX-headroom.patch b/package/kernel/mac80211/patches/rtl/028-wifi-rtw88-main-Reserve-8-bytes-of-extra-TX-headroom.patch deleted file mode 100644 index 9fb6dedea..000000000 --- a/package/kernel/mac80211/patches/rtl/028-wifi-rtw88-main-Reserve-8-bytes-of-extra-TX-headroom.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 02461d9368c59510ef51cc8a1db1f0f31cfbf9ad Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Wed, 5 Apr 2023 22:07:25 +0200 -Subject: [PATCH 28/45] wifi: rtw88: main: Reserve 8 bytes of extra TX headroom - for SDIO cards - -For SDIO host controllers with DMA support the TX buffer physical memory -address need to be aligned at an 8-byte boundary. Reserve 8 bytes of -extra TX headroom so we can align the data without re-allocating the -transmit buffer. - -While here, also remove the TODO comment regarding extra headroom for -USB and SDIO. For SDIO the extra headroom is now handled and for USB it -was not needed so far. - -Reviewed-by: Ping-Ke Shih -Signed-off-by: Martin Blumenstingl -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230405200729.632435-6-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/main.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -2163,9 +2163,11 @@ int rtw_register_hw(struct rtw_dev *rtwd - int max_tx_headroom = 0; - int ret; - -- /* TODO: USB & SDIO may need extra room? */ - max_tx_headroom = rtwdev->chip->tx_pkt_desc_sz; - -+ if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) -+ max_tx_headroom += RTW_SDIO_DATA_PTR_ALIGN; -+ - hw->extra_tx_headroom = max_tx_headroom; - hw->queues = IEEE80211_NUM_ACS; - hw->txq_data_size = sizeof(struct rtw_txq); diff --git a/package/kernel/mac80211/patches/rtl/029-wifi-rtw88-Add-support-for-the-SDIO-based-RTL8822BS-.patch b/package/kernel/mac80211/patches/rtl/029-wifi-rtw88-Add-support-for-the-SDIO-based-RTL8822BS-.patch deleted file mode 100644 index b924751b8..000000000 --- a/package/kernel/mac80211/patches/rtl/029-wifi-rtw88-Add-support-for-the-SDIO-based-RTL8822BS-.patch +++ /dev/null @@ -1,94 +0,0 @@ -From 095e62dd74276dd801c04d9a2a9afcd922811218 Mon Sep 17 00:00:00 2001 -From: Jernej Skrabec -Date: Wed, 5 Apr 2023 22:07:27 +0200 -Subject: [PATCH 29/45] wifi: rtw88: Add support for the SDIO based RTL8822BS - chipset - -Wire up RTL8822BS chipset support using the new rtw88 SDIO HCI code as -well as the existing RTL8822B chipset code. - -Signed-off-by: Jernej Skrabec -Reviewed-by: Ping-Ke Shih -Signed-off-by: Martin Blumenstingl -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230405200729.632435-8-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/Kconfig | 11 ++++++ - drivers/net/wireless/realtek/rtw88/Makefile | 3 ++ - .../net/wireless/realtek/rtw88/rtw8822bs.c | 36 +++++++++++++++++++ - 3 files changed, 50 insertions(+) - create mode 100644 drivers/net/wireless/realtek/rtw88/rtw8822bs.c - ---- a/drivers/net/wireless/realtek/rtw88/Kconfig -+++ b/drivers/net/wireless/realtek/rtw88/Kconfig -@@ -56,6 +56,19 @@ config RTW88_8822BE - - 802.11ac PCIe wireless network adapter - -+config RTW88_8822BS -+ tristate "Realtek 8822BS SDIO wireless network adapter" -+ depends on m -+ depends on MMC -+ select RTW88_CORE -+ select RTW88_SDIO -+ select RTW88_8822B -+ help -+ Select this option will enable support for 8822BS chipset -+ -+ 802.11ac SDIO wireless network adapter -+ -+ - config RTW88_8822BU - tristate "Realtek 8822BU USB wireless network adapter" - depends on m ---- a/drivers/net/wireless/realtek/rtw88/Makefile -+++ b/drivers/net/wireless/realtek/rtw88/Makefile -@@ -26,6 +26,9 @@ rtw88_8822b-objs := rtw8822b.o rtw8822b - obj-$(CPTCFG_RTW88_8822BE) += rtw88_8822be.o - rtw88_8822be-objs := rtw8822be.o - -+obj-$(CPTCFG_RTW88_8822BS) += rtw88_8822bs.o -+rtw88_8822bs-objs := rtw8822bs.o -+ - obj-$(CPTCFG_RTW88_8822BU) += rtw88_8822bu.o - rtw88_8822bu-objs := rtw8822bu.o - ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw88/rtw8822bs.c -@@ -0,0 +1,36 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) Jernej Skrabec -+ */ -+ -+#include -+#include -+#include -+#include "main.h" -+#include "rtw8822b.h" -+#include "sdio.h" -+ -+static const struct sdio_device_id rtw_8822bs_id_table[] = { -+ { -+ SDIO_DEVICE(SDIO_VENDOR_ID_REALTEK, -+ SDIO_DEVICE_ID_REALTEK_RTW8822BS), -+ .driver_data = (kernel_ulong_t)&rtw8822b_hw_spec, -+ }, -+ {} -+}; -+MODULE_DEVICE_TABLE(sdio, rtw_8822bs_id_table); -+ -+static struct sdio_driver rtw_8822bs_driver = { -+ .name = "rtw_8822bs", -+ .probe = rtw_sdio_probe, -+ .remove = rtw_sdio_remove, -+ .id_table = rtw_8822bs_id_table, -+ .drv = { -+ .pm = &rtw_sdio_pm_ops, -+ .shutdown = rtw_sdio_shutdown, -+ } -+}; -+module_sdio_driver(rtw_8822bs_driver); -+ -+MODULE_AUTHOR("Jernej Skrabec "); -+MODULE_DESCRIPTION("Realtek 802.11ac wireless 8822bs driver"); -+MODULE_LICENSE("Dual BSD/GPL"); diff --git a/package/kernel/mac80211/patches/rtl/030-wifi-rtw88-Add-support-for-the-SDIO-based-RTL8822CS-.patch b/package/kernel/mac80211/patches/rtl/030-wifi-rtw88-Add-support-for-the-SDIO-based-RTL8822CS-.patch deleted file mode 100644 index 0d8fbc785..000000000 --- a/package/kernel/mac80211/patches/rtl/030-wifi-rtw88-Add-support-for-the-SDIO-based-RTL8822CS-.patch +++ /dev/null @@ -1,92 +0,0 @@ -From 6fdacb78f7999f5c14d9dae10d47de50959297d9 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Wed, 5 Apr 2023 22:07:28 +0200 -Subject: [PATCH 30/45] wifi: rtw88: Add support for the SDIO based RTL8822CS - chipset - -Wire up RTL8822CS chipset support using the new rtw88 SDIO HCI code as -well as the existing RTL8822C chipset code. - -Reviewed-by: Ping-Ke Shih -Signed-off-by: Martin Blumenstingl -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230405200729.632435-9-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/Kconfig | 11 ++++++ - drivers/net/wireless/realtek/rtw88/Makefile | 3 ++ - .../net/wireless/realtek/rtw88/rtw8822cs.c | 36 +++++++++++++++++++ - 3 files changed, 50 insertions(+) - create mode 100644 drivers/net/wireless/realtek/rtw88/rtw8822cs.c - ---- a/drivers/net/wireless/realtek/rtw88/Kconfig -+++ b/drivers/net/wireless/realtek/rtw88/Kconfig -@@ -93,6 +93,18 @@ config RTW88_8822CE - - 802.11ac PCIe wireless network adapter - -+config RTW88_8822CS -+ tristate "Realtek 8822CS SDIO wireless network adapter" -+ depends on m -+ depends on MMC -+ select RTW88_CORE -+ select RTW88_SDIO -+ select RTW88_8822C -+ help -+ Select this option will enable support for 8822CS chipset -+ -+ 802.11ac SDIO wireless network adapter -+ - config RTW88_8822CU - tristate "Realtek 8822CU USB wireless network adapter" - depends on m ---- a/drivers/net/wireless/realtek/rtw88/Makefile -+++ b/drivers/net/wireless/realtek/rtw88/Makefile -@@ -38,6 +38,9 @@ rtw88_8822c-objs := rtw8822c.o rtw8822c - obj-$(CPTCFG_RTW88_8822CE) += rtw88_8822ce.o - rtw88_8822ce-objs := rtw8822ce.o - -+obj-$(CPTCFG_RTW88_8822CS) += rtw88_8822cs.o -+rtw88_8822cs-objs := rtw8822cs.o -+ - obj-$(CPTCFG_RTW88_8822CU) += rtw88_8822cu.o - rtw88_8822cu-objs := rtw8822cu.o - ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw88/rtw8822cs.c -@@ -0,0 +1,36 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) Martin Blumenstingl -+ */ -+ -+#include -+#include -+#include -+#include "main.h" -+#include "rtw8822c.h" -+#include "sdio.h" -+ -+static const struct sdio_device_id rtw_8822cs_id_table[] = { -+ { -+ SDIO_DEVICE(SDIO_VENDOR_ID_REALTEK, -+ SDIO_DEVICE_ID_REALTEK_RTW8822CS), -+ .driver_data = (kernel_ulong_t)&rtw8822c_hw_spec, -+ }, -+ {} -+}; -+MODULE_DEVICE_TABLE(sdio, rtw_8822cs_id_table); -+ -+static struct sdio_driver rtw_8822cs_driver = { -+ .name = "rtw_8822cs", -+ .probe = rtw_sdio_probe, -+ .remove = rtw_sdio_remove, -+ .id_table = rtw_8822cs_id_table, -+ .drv = { -+ .pm = &rtw_sdio_pm_ops, -+ .shutdown = rtw_sdio_shutdown, -+ } -+}; -+module_sdio_driver(rtw_8822cs_driver); -+ -+MODULE_AUTHOR("Martin Blumenstingl "); -+MODULE_DESCRIPTION("Realtek 802.11ac wireless 8822cs driver"); -+MODULE_LICENSE("Dual BSD/GPL"); diff --git a/package/kernel/mac80211/patches/rtl/031-wifi-rtw88-Add-support-for-the-SDIO-based-RTL8821CS-.patch b/package/kernel/mac80211/patches/rtl/031-wifi-rtw88-Add-support-for-the-SDIO-based-RTL8821CS-.patch deleted file mode 100644 index abd708efe..000000000 --- a/package/kernel/mac80211/patches/rtl/031-wifi-rtw88-Add-support-for-the-SDIO-based-RTL8821CS-.patch +++ /dev/null @@ -1,93 +0,0 @@ -From b2a777d68434375dc05a6fda5fec34a474bbf21f Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Wed, 5 Apr 2023 22:07:29 +0200 -Subject: [PATCH 31/45] wifi: rtw88: Add support for the SDIO based RTL8821CS - chipset - -Wire up RTL8821CS chipset support using the new rtw88 SDIO HCI code as -well as the existing RTL8821C chipset code. - -Reviewed-by: Ping-Ke Shih -Tested-by: Chris Morgan -Signed-off-by: Martin Blumenstingl -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230405200729.632435-10-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/Kconfig | 11 ++++++ - drivers/net/wireless/realtek/rtw88/Makefile | 3 ++ - .../net/wireless/realtek/rtw88/rtw8821cs.c | 36 +++++++++++++++++++ - 3 files changed, 50 insertions(+) - create mode 100644 drivers/net/wireless/realtek/rtw88/rtw8821cs.c - ---- a/drivers/net/wireless/realtek/rtw88/Kconfig -+++ b/drivers/net/wireless/realtek/rtw88/Kconfig -@@ -153,6 +153,18 @@ config RTW88_8821CE - - 802.11ac PCIe wireless network adapter - -+config RTW88_8821CS -+ tristate "Realtek 8821CS SDIO wireless network adapter" -+ depends on m -+ depends on MMC -+ select RTW88_CORE -+ select RTW88_SDIO -+ select RTW88_8821C -+ help -+ Select this option will enable support for 8821CS chipset -+ -+ 802.11ac SDIO wireless network adapter -+ - config RTW88_8821CU - tristate "Realtek 8821CU USB wireless network adapter" - depends on m ---- a/drivers/net/wireless/realtek/rtw88/Makefile -+++ b/drivers/net/wireless/realtek/rtw88/Makefile -@@ -59,6 +59,9 @@ rtw88_8821c-objs := rtw8821c.o rtw8821c - obj-$(CPTCFG_RTW88_8821CE) += rtw88_8821ce.o - rtw88_8821ce-objs := rtw8821ce.o - -+obj-$(CPTCFG_RTW88_8821CS) += rtw88_8821cs.o -+rtw88_8821cs-objs := rtw8821cs.o -+ - obj-$(CPTCFG_RTW88_8821CU) += rtw88_8821cu.o - rtw88_8821cu-objs := rtw8821cu.o - ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw88/rtw8821cs.c -@@ -0,0 +1,36 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) Martin Blumenstingl -+ */ -+ -+#include -+#include -+#include -+#include "main.h" -+#include "rtw8821c.h" -+#include "sdio.h" -+ -+static const struct sdio_device_id rtw_8821cs_id_table[] = { -+ { -+ SDIO_DEVICE(SDIO_VENDOR_ID_REALTEK, -+ SDIO_DEVICE_ID_REALTEK_RTW8821CS), -+ .driver_data = (kernel_ulong_t)&rtw8821c_hw_spec, -+ }, -+ {} -+}; -+MODULE_DEVICE_TABLE(sdio, rtw_8821cs_id_table); -+ -+static struct sdio_driver rtw_8821cs_driver = { -+ .name = "rtw_8821cs", -+ .probe = rtw_sdio_probe, -+ .remove = rtw_sdio_remove, -+ .id_table = rtw_8821cs_id_table, -+ .drv = { -+ .pm = &rtw_sdio_pm_ops, -+ .shutdown = rtw_sdio_shutdown, -+ } -+}; -+module_sdio_driver(rtw_8821cs_driver); -+ -+MODULE_AUTHOR("Martin Blumenstingl "); -+MODULE_DESCRIPTION("Realtek 802.11ac wireless 8821cs driver"); -+MODULE_LICENSE("Dual BSD/GPL"); diff --git a/package/kernel/mac80211/patches/rtl/032-wifi-rtw88-add-bitmap-for-dynamic-port-settings.patch b/package/kernel/mac80211/patches/rtl/032-wifi-rtw88-add-bitmap-for-dynamic-port-settings.patch deleted file mode 100644 index e84e97787..000000000 --- a/package/kernel/mac80211/patches/rtl/032-wifi-rtw88-add-bitmap-for-dynamic-port-settings.patch +++ /dev/null @@ -1,108 +0,0 @@ -From f0e741e4ddbc01610ca87167a123702b3fdac51f Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 14 Apr 2023 20:11:28 +0800 -Subject: [PATCH 32/45] wifi: rtw88: add bitmap for dynamic port settings - -In order to support multiple interfaces, multiple port settings will -be required. Current code always uses port 0 and should be changed. -Declare a bitmap with size equal to hardware port number to record -the current usage. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230414121135.17828-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/mac80211.c | 13 ++++++++++--- - drivers/net/wireless/realtek/rtw88/main.c | 1 + - drivers/net/wireless/realtek/rtw88/main.h | 10 ++++++++++ - 3 files changed, 21 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c -@@ -155,25 +155,30 @@ static int rtw_ops_add_interface(struct - struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; - enum rtw_net_type net_type; - u32 config = 0; -- u8 port = 0; -+ u8 port; - u8 bcn_ctrl = 0; - - if (rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_BCN_FILTER)) - vif->driver_flags |= IEEE80211_VIF_BEACON_FILTER | - IEEE80211_VIF_SUPPORTS_CQM_RSSI; -- rtwvif->port = port; - rtwvif->stats.tx_unicast = 0; - rtwvif->stats.rx_unicast = 0; - rtwvif->stats.tx_cnt = 0; - rtwvif->stats.rx_cnt = 0; - rtwvif->scan_req = NULL; - memset(&rtwvif->bfee, 0, sizeof(struct rtw_bfee)); -- rtwvif->conf = &rtw_vif_port[port]; - rtw_txq_init(rtwdev, vif->txq); - INIT_LIST_HEAD(&rtwvif->rsvd_page_list); - - mutex_lock(&rtwdev->mutex); - -+ port = find_first_zero_bit(rtwdev->hw_port, RTW_PORT_NUM); -+ if (port >= RTW_PORT_NUM) -+ return -EINVAL; -+ set_bit(port, rtwdev->hw_port); -+ -+ rtwvif->port = port; -+ rtwvif->conf = &rtw_vif_port[port]; - rtw_leave_lps_deep(rtwdev); - - switch (vif->type) { -@@ -195,6 +200,7 @@ static int rtw_ops_add_interface(struct - break; - default: - WARN_ON(1); -+ clear_bit(rtwvif->port, rtwdev->hw_port); - mutex_unlock(&rtwdev->mutex); - return -EINVAL; - } -@@ -236,6 +242,7 @@ static void rtw_ops_remove_interface(str - rtwvif->bcn_ctrl = 0; - config |= PORT_SET_BCN_CTRL; - rtw_vif_port_config(rtwdev, rtwvif, config); -+ clear_bit(rtwvif->port, rtwdev->hw_port); - - mutex_unlock(&rtwdev->mutex); - } ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -610,6 +610,7 @@ free: - rcu_read_unlock(); - rtw_iterate_stas_atomic(rtwdev, rtw_reset_sta_iter, rtwdev); - rtw_iterate_vifs_atomic(rtwdev, rtw_reset_vif_iter, rtwdev); -+ bitmap_zero(rtwdev->hw_port, RTW_PORT_NUM); - rtw_enter_ips(rtwdev); - } - ---- a/drivers/net/wireless/realtek/rtw88/main.h -+++ b/drivers/net/wireless/realtek/rtw88/main.h -@@ -395,6 +395,15 @@ enum rtw_snr { - RTW_SNR_NUM - }; - -+enum rtw_port { -+ RTW_PORT_0 = 0, -+ RTW_PORT_1 = 1, -+ RTW_PORT_2 = 2, -+ RTW_PORT_3 = 3, -+ RTW_PORT_4 = 4, -+ RTW_PORT_NUM -+}; -+ - enum rtw_wow_flags { - RTW_WOW_FLAG_EN_MAGIC_PKT, - RTW_WOW_FLAG_EN_REKEY_PKT, -@@ -2036,6 +2045,7 @@ struct rtw_dev { - u8 sta_cnt; - u32 rts_threshold; - -+ DECLARE_BITMAP(hw_port, RTW_PORT_NUM); - DECLARE_BITMAP(mac_id_map, RTW_MAX_MAC_ID_NUM); - DECLARE_BITMAP(flags, NUM_OF_RTW_FLAGS); - diff --git a/package/kernel/mac80211/patches/rtl/033-wifi-rtw88-add-port-switch-for-AP-mode.patch b/package/kernel/mac80211/patches/rtl/033-wifi-rtw88-add-port-switch-for-AP-mode.patch deleted file mode 100644 index 4467c77ac..000000000 --- a/package/kernel/mac80211/patches/rtl/033-wifi-rtw88-add-port-switch-for-AP-mode.patch +++ /dev/null @@ -1,126 +0,0 @@ -From ccf73f6e69c0244a979e97eb6c38f80cd6cbc116 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 14 Apr 2023 20:11:29 +0800 -Subject: [PATCH 33/45] wifi: rtw88: add port switch for AP mode - -Switch port settings if AP mode does not start on port 0 because of -hardware limitation. For some ICs, beacons on ports other than zero -could misbehave and do not issue properly, to fix this we change AP -VIFs to port zero when multiple interfaces is active. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230414121135.17828-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/mac80211.c | 1 + - drivers/net/wireless/realtek/rtw88/main.c | 79 +++++++++++++++++++ - drivers/net/wireless/realtek/rtw88/main.h | 1 + - 3 files changed, 81 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw88/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c -@@ -212,6 +212,7 @@ static int rtw_ops_add_interface(struct - rtwvif->bcn_ctrl = bcn_ctrl; - config |= PORT_SET_BCN_CTRL; - rtw_vif_port_config(rtwdev, rtwvif, config); -+ rtw_core_port_switch(rtwdev, vif); - - mutex_unlock(&rtwdev->mutex); - ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -2251,6 +2251,85 @@ void rtw_unregister_hw(struct rtw_dev *r - } - EXPORT_SYMBOL(rtw_unregister_hw); - -+static -+void rtw_swap_reg_nbytes(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1, -+ const struct rtw_hw_reg *reg2, u8 nbytes) -+{ -+ u8 i; -+ -+ for (i = 0; i < nbytes; i++) { -+ u8 v1 = rtw_read8(rtwdev, reg1->addr + i); -+ u8 v2 = rtw_read8(rtwdev, reg2->addr + i); -+ -+ rtw_write8(rtwdev, reg1->addr + i, v2); -+ rtw_write8(rtwdev, reg2->addr + i, v1); -+ } -+} -+ -+static -+void rtw_swap_reg_mask(struct rtw_dev *rtwdev, const struct rtw_hw_reg *reg1, -+ const struct rtw_hw_reg *reg2) -+{ -+ u32 v1, v2; -+ -+ v1 = rtw_read32_mask(rtwdev, reg1->addr, reg1->mask); -+ v2 = rtw_read32_mask(rtwdev, reg2->addr, reg2->mask); -+ rtw_write32_mask(rtwdev, reg2->addr, reg2->mask, v1); -+ rtw_write32_mask(rtwdev, reg1->addr, reg1->mask, v2); -+} -+ -+struct rtw_iter_port_switch_data { -+ struct rtw_dev *rtwdev; -+ struct rtw_vif *rtwvif_ap; -+}; -+ -+static void rtw_port_switch_iter(void *data, u8 *mac, struct ieee80211_vif *vif) -+{ -+ struct rtw_iter_port_switch_data *iter_data = data; -+ struct rtw_dev *rtwdev = iter_data->rtwdev; -+ struct rtw_vif *rtwvif_target = (struct rtw_vif *)vif->drv_priv; -+ struct rtw_vif *rtwvif_ap = iter_data->rtwvif_ap; -+ const struct rtw_hw_reg *reg1, *reg2; -+ -+ if (rtwvif_target->port != RTW_PORT_0) -+ return; -+ -+ rtw_dbg(rtwdev, RTW_DBG_STATE, "AP port switch from %d -> %d\n", -+ rtwvif_ap->port, rtwvif_target->port); -+ -+ reg1 = &rtwvif_ap->conf->net_type; -+ reg2 = &rtwvif_target->conf->net_type; -+ rtw_swap_reg_mask(rtwdev, reg1, reg2); -+ -+ reg1 = &rtwvif_ap->conf->mac_addr; -+ reg2 = &rtwvif_target->conf->mac_addr; -+ rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN); -+ -+ reg1 = &rtwvif_ap->conf->bssid; -+ reg2 = &rtwvif_target->conf->bssid; -+ rtw_swap_reg_nbytes(rtwdev, reg1, reg2, ETH_ALEN); -+ -+ reg1 = &rtwvif_ap->conf->bcn_ctrl; -+ reg2 = &rtwvif_target->conf->bcn_ctrl; -+ rtw_swap_reg_nbytes(rtwdev, reg1, reg2, 1); -+ -+ swap(rtwvif_target->port, rtwvif_ap->port); -+ swap(rtwvif_target->conf, rtwvif_ap->conf); -+} -+ -+void rtw_core_port_switch(struct rtw_dev *rtwdev, struct ieee80211_vif *vif) -+{ -+ struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; -+ struct rtw_iter_port_switch_data iter_data; -+ -+ if (vif->type != NL80211_IFTYPE_AP || rtwvif->port == RTW_PORT_0) -+ return; -+ -+ iter_data.rtwdev = rtwdev; -+ iter_data.rtwvif_ap = rtwvif; -+ rtw_iterate_vifs(rtwdev, rtw_port_switch_iter, &iter_data); -+} -+ - MODULE_AUTHOR("Realtek Corporation"); - MODULE_DESCRIPTION("Realtek 802.11ac wireless core module"); - MODULE_LICENSE("Dual BSD/GPL"); ---- a/drivers/net/wireless/realtek/rtw88/main.h -+++ b/drivers/net/wireless/realtek/rtw88/main.h -@@ -2198,4 +2198,5 @@ void rtw_set_txrx_1ss(struct rtw_dev *rt - void rtw_update_channel(struct rtw_dev *rtwdev, u8 center_channel, - u8 primary_channel, enum rtw_supported_band band, - enum rtw_bandwidth bandwidth); -+void rtw_core_port_switch(struct rtw_dev *rtwdev, struct ieee80211_vif *vif); - #endif diff --git a/package/kernel/mac80211/patches/rtl/034-wifi-rtw88-8822c-extend-reserved-page-number.patch b/package/kernel/mac80211/patches/rtl/034-wifi-rtw88-8822c-extend-reserved-page-number.patch deleted file mode 100644 index cc4eef318..000000000 --- a/package/kernel/mac80211/patches/rtl/034-wifi-rtw88-8822c-extend-reserved-page-number.patch +++ /dev/null @@ -1,84 +0,0 @@ -From ffa71c5477793f41bc7537a60aa54ac40275ab78 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 14 Apr 2023 20:11:30 +0800 -Subject: [PATCH 34/45] wifi: rtw88: 8822c: extend reserved page number - -Extend 8822c's reserved page number to accommodate additional required -pages. Reserved page is an area of memory in the FIFO dedicated for -special purposes. Previously only one interface is supported so 8 pages -should suffice, extend it so we can support 2 interfaces concurrently. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230414121135.17828-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/mac.c | 2 +- - drivers/net/wireless/realtek/rtw88/main.h | 1 + - drivers/net/wireless/realtek/rtw88/rtw8723d.c | 1 + - drivers/net/wireless/realtek/rtw88/rtw8821c.c | 1 + - drivers/net/wireless/realtek/rtw88/rtw8822b.c | 1 + - drivers/net/wireless/realtek/rtw88/rtw8822c.c | 1 + - 6 files changed, 6 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/mac.c -+++ b/drivers/net/wireless/realtek/rtw88/mac.c -@@ -1119,7 +1119,7 @@ static int set_trx_fifo_info(struct rtw_ - u8 csi_buf_pg_num = chip->csi_buf_pg_num; - - /* config rsvd page num */ -- fifo->rsvd_drv_pg_num = 8; -+ fifo->rsvd_drv_pg_num = chip->rsvd_drv_pg_num; - fifo->txff_pg_num = chip->txff_size >> 7; - if (rtw_chip_wcpu_11n(rtwdev)) - fifo->rsvd_pg_num = fifo->rsvd_drv_pg_num; ---- a/drivers/net/wireless/realtek/rtw88/main.h -+++ b/drivers/net/wireless/realtek/rtw88/main.h -@@ -1177,6 +1177,7 @@ struct rtw_chip_info { - u32 txff_size; - u32 rxff_size; - u32 fw_rxff_size; -+ u16 rsvd_drv_pg_num; - u8 band; - u8 page_size; - u8 csi_buf_pg_num; ---- a/drivers/net/wireless/realtek/rtw88/rtw8723d.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8723d.c -@@ -2743,6 +2743,7 @@ const struct rtw_chip_info rtw8723d_hw_s - .ptct_efuse_size = 96 + 1, - .txff_size = 32768, - .rxff_size = 16384, -+ .rsvd_drv_pg_num = 8, - .txgi_factor = 1, - .is_pwr_by_rate_dec = true, - .max_power_index = 0x3f, ---- a/drivers/net/wireless/realtek/rtw88/rtw8821c.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8821c.c -@@ -1920,6 +1920,7 @@ const struct rtw_chip_info rtw8821c_hw_s - .ptct_efuse_size = 96, - .txff_size = 65536, - .rxff_size = 16384, -+ .rsvd_drv_pg_num = 8, - .txgi_factor = 1, - .is_pwr_by_rate_dec = true, - .max_power_index = 0x3f, ---- a/drivers/net/wireless/realtek/rtw88/rtw8822b.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8822b.c -@@ -2540,6 +2540,7 @@ const struct rtw_chip_info rtw8822b_hw_s - .txff_size = 262144, - .rxff_size = 24576, - .fw_rxff_size = 12288, -+ .rsvd_drv_pg_num = 8, - .txgi_factor = 1, - .is_pwr_by_rate_dec = true, - .max_power_index = 0x3f, ---- a/drivers/net/wireless/realtek/rtw88/rtw8822c.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8822c.c -@@ -5358,6 +5358,7 @@ const struct rtw_chip_info rtw8822c_hw_s - .txff_size = 262144, - .rxff_size = 24576, - .fw_rxff_size = 12288, -+ .rsvd_drv_pg_num = 16, - .txgi_factor = 2, - .is_pwr_by_rate_dec = false, - .max_power_index = 0x7f, diff --git a/package/kernel/mac80211/patches/rtl/035-wifi-rtw88-disallow-PS-during-AP-mode.patch b/package/kernel/mac80211/patches/rtl/035-wifi-rtw88-disallow-PS-during-AP-mode.patch deleted file mode 100644 index 060600f00..000000000 --- a/package/kernel/mac80211/patches/rtl/035-wifi-rtw88-disallow-PS-during-AP-mode.patch +++ /dev/null @@ -1,73 +0,0 @@ -From 5ec69129f195f340acb15b8535cb372ccdbcf5d7 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 14 Apr 2023 20:11:31 +0800 -Subject: [PATCH 35/45] wifi: rtw88: disallow PS during AP mode - -Firmware can't support PS mode during AP mode, so disallow this case. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230414121135.17828-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/mac80211.c | 13 +++++++++++++ - drivers/net/wireless/realtek/rtw88/main.c | 2 +- - drivers/net/wireless/realtek/rtw88/main.h | 1 + - 3 files changed, 15 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c -@@ -449,12 +449,24 @@ static int rtw_ops_start_ap(struct ieee8 - const struct rtw_chip_info *chip = rtwdev->chip; - - mutex_lock(&rtwdev->mutex); -+ rtwdev->ap_active = true; - chip->ops->phy_calibration(rtwdev); - mutex_unlock(&rtwdev->mutex); - - return 0; - } - -+static void rtw_ops_stop_ap(struct ieee80211_hw *hw, -+ struct ieee80211_vif *vif, -+ struct ieee80211_bss_conf *link_conf) -+{ -+ struct rtw_dev *rtwdev = hw->priv; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtwdev->ap_active = false; -+ mutex_unlock(&rtwdev->mutex); -+} -+ - static int rtw_ops_conf_tx(struct ieee80211_hw *hw, - struct ieee80211_vif *vif, - unsigned int link_id, u16 ac, -@@ -916,6 +928,7 @@ const struct ieee80211_ops rtw_ops = { - .configure_filter = rtw_ops_configure_filter, - .bss_info_changed = rtw_ops_bss_info_changed, - .start_ap = rtw_ops_start_ap, -+ .stop_ap = rtw_ops_stop_ap, - .conf_tx = rtw_ops_conf_tx, - .sta_add = rtw_ops_sta_add, - .sta_remove = rtw_ops_sta_remove, ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -257,7 +257,7 @@ static void rtw_watch_dog_work(struct wo - * threshold. - */ - if (rtwdev->ps_enabled && data.rtwvif && !ps_active && -- !rtwdev->beacon_loss) -+ !rtwdev->beacon_loss && !rtwdev->ap_active) - rtw_enter_lps(rtwdev, data.rtwvif->port); - - rtwdev->watch_dog_cnt++; ---- a/drivers/net/wireless/realtek/rtw88/main.h -+++ b/drivers/net/wireless/realtek/rtw88/main.h -@@ -2058,6 +2058,7 @@ struct rtw_dev { - - bool need_rfk; - struct completion fw_scan_density; -+ bool ap_active; - - /* hci related data, must be last */ - u8 priv[] __aligned(sizeof(void *)); diff --git a/package/kernel/mac80211/patches/rtl/036-wifi-rtw88-refine-reserved-page-flow-for-AP-mode.patch b/package/kernel/mac80211/patches/rtl/036-wifi-rtw88-refine-reserved-page-flow-for-AP-mode.patch deleted file mode 100644 index 8820e3adf..000000000 --- a/package/kernel/mac80211/patches/rtl/036-wifi-rtw88-refine-reserved-page-flow-for-AP-mode.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 982f4a2004f712ce7aed7f7e69fa64e4c06eee7d Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 14 Apr 2023 20:13:00 +0800 -Subject: [PATCH 36/45] wifi: rtw88: refine reserved page flow for AP mode - -Only gather reserved pages from AP interface after it has started. Or -else ieee80211_beacon_get_*() returns NULL and causes other VIFs' -reserved pages fail to download. Update location of current reserved page -after beacon renews so offsets changed by beacon can be recognized. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230414121300.17900-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/fw.c | 5 +++++ - drivers/net/wireless/realtek/rtw88/mac80211.c | 1 + - 2 files changed, 6 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw88/fw.c -+++ b/drivers/net/wireless/realtek/rtw88/fw.c -@@ -1393,6 +1393,10 @@ static void rtw_build_rsvd_page_iter(voi - struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; - struct rtw_rsvd_page *rsvd_pkt; - -+ /* AP not yet started, don't gather its rsvd pages */ -+ if (vif->type == NL80211_IFTYPE_AP && !rtwdev->ap_active) -+ return; -+ - list_for_each_entry(rsvd_pkt, &rtwvif->rsvd_page_list, vif_list) { - if (rsvd_pkt->type == RSVD_BEACON) - list_add(&rsvd_pkt->build_list, -@@ -1614,6 +1618,7 @@ void rtw_fw_update_beacon_work(struct wo - - mutex_lock(&rtwdev->mutex); - rtw_fw_download_rsvd_page(rtwdev); -+ rtw_send_rsvd_page_h2c(rtwdev); - mutex_unlock(&rtwdev->mutex); - } - ---- a/drivers/net/wireless/realtek/rtw88/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c -@@ -417,6 +417,7 @@ static void rtw_ops_bss_info_changed(str - if (changed & BSS_CHANGED_BEACON) { - rtw_set_dtim_period(rtwdev, conf->dtim_period); - rtw_fw_download_rsvd_page(rtwdev); -+ rtw_send_rsvd_page_h2c(rtwdev); - } - - if (changed & BSS_CHANGED_BEACON_ENABLED) { diff --git a/package/kernel/mac80211/patches/rtl/037-wifi-rtw88-prevent-scan-abort-with-other-VIFs.patch b/package/kernel/mac80211/patches/rtl/037-wifi-rtw88-prevent-scan-abort-with-other-VIFs.patch deleted file mode 100644 index 9263bde93..000000000 --- a/package/kernel/mac80211/patches/rtl/037-wifi-rtw88-prevent-scan-abort-with-other-VIFs.patch +++ /dev/null @@ -1,73 +0,0 @@ -From a1b8015da57a783b3ceebd8e114afbe07536bd54 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 14 Apr 2023 20:13:12 +0800 -Subject: [PATCH 37/45] wifi: rtw88: prevent scan abort with other VIFs - -Only abort scan with current scanning VIF. If we have more than one -interface, we could call rtw_hw_scan_abort() with the wrong VIF as -input. This avoids potential null pointer being accessed when actually -the other VIF is scanning. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230414121312.17954-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/fw.c | 4 +++- - drivers/net/wireless/realtek/rtw88/fw.h | 2 +- - drivers/net/wireless/realtek/rtw88/mac80211.c | 7 ++++--- - 3 files changed, 8 insertions(+), 5 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/fw.c -+++ b/drivers/net/wireless/realtek/rtw88/fw.c -@@ -2163,8 +2163,10 @@ out: - return ret; - } - --void rtw_hw_scan_abort(struct rtw_dev *rtwdev, struct ieee80211_vif *vif) -+void rtw_hw_scan_abort(struct rtw_dev *rtwdev) - { -+ struct ieee80211_vif *vif = rtwdev->scan_info.scanning_vif; -+ - if (!rtw_fw_feature_check(&rtwdev->fw, FW_FEATURE_SCAN_OFFLOAD)) - return; - ---- a/drivers/net/wireless/realtek/rtw88/fw.h -+++ b/drivers/net/wireless/realtek/rtw88/fw.h -@@ -868,5 +868,5 @@ int rtw_hw_scan_offload(struct rtw_dev * - bool enable); - void rtw_hw_scan_status_report(struct rtw_dev *rtwdev, struct sk_buff *skb); - void rtw_hw_scan_chan_switch(struct rtw_dev *rtwdev, struct sk_buff *skb); --void rtw_hw_scan_abort(struct rtw_dev *rtwdev, struct ieee80211_vif *vif); -+void rtw_hw_scan_abort(struct rtw_dev *rtwdev); - #endif ---- a/drivers/net/wireless/realtek/rtw88/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c -@@ -393,7 +393,8 @@ static void rtw_ops_bss_info_changed(str - * when disconnected by peer - */ - if (test_bit(RTW_FLAG_SCANNING, rtwdev->flags)) -- rtw_hw_scan_abort(rtwdev, vif); -+ rtw_hw_scan_abort(rtwdev); -+ - } - - config |= PORT_SET_NET_TYPE; -@@ -870,7 +871,7 @@ static int rtw_ops_hw_scan(struct ieee80 - rtw_hw_scan_start(rtwdev, vif, req); - ret = rtw_hw_scan_offload(rtwdev, vif, true); - if (ret) { -- rtw_hw_scan_abort(rtwdev, vif); -+ rtw_hw_scan_abort(rtwdev); - rtw_err(rtwdev, "HW scan failed with status: %d\n", ret); - } - mutex_unlock(&rtwdev->mutex); -@@ -890,7 +891,7 @@ static void rtw_ops_cancel_hw_scan(struc - return; - - mutex_lock(&rtwdev->mutex); -- rtw_hw_scan_abort(rtwdev, vif); -+ rtw_hw_scan_abort(rtwdev); - mutex_unlock(&rtwdev->mutex); - } - diff --git a/package/kernel/mac80211/patches/rtl/038-wifi-rtw88-handle-station-mode-concurrent-scan-with-.patch b/package/kernel/mac80211/patches/rtl/038-wifi-rtw88-handle-station-mode-concurrent-scan-with-.patch deleted file mode 100644 index d0a1315e4..000000000 --- a/package/kernel/mac80211/patches/rtl/038-wifi-rtw88-handle-station-mode-concurrent-scan-with-.patch +++ /dev/null @@ -1,154 +0,0 @@ -From 96fbb84de4ffce76d54de8656efe0a580081c037 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 14 Apr 2023 20:13:23 +0800 -Subject: [PATCH 38/45] wifi: rtw88: handle station mode concurrent scan with - AP mode - -This patch allows vifs sharing same hardware with the AP mode vif to -do scan, do note that this could lead to packet loss or disconnection -of the AP's clients. Since we don't have chanctx, update scan info -upon set channel so bandwidth changes won't go unnoticed and get -misconfigured after scan. Download beacon just before scan starts to -allow hardware to get proper content to do beaconing. Last, beacons -should only be transmitted in AP's operating channel. Turn related -beacon functions off while we're in other channels so the receiving -stations won't get confused. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230414121323.18008-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/fw.c | 11 +++++- - drivers/net/wireless/realtek/rtw88/mac80211.c | 5 ++- - drivers/net/wireless/realtek/rtw88/main.c | 39 +++++++++++++++++++ - drivers/net/wireless/realtek/rtw88/main.h | 2 + - 4 files changed, 55 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/fw.c -+++ b/drivers/net/wireless/realtek/rtw88/fw.c -@@ -2160,6 +2160,12 @@ int rtw_hw_scan_offload(struct rtw_dev * - } - rtw_fw_set_scan_offload(rtwdev, &cs_option, rtwvif, &chan_list); - out: -+ if (rtwdev->ap_active) { -+ ret = rtw_download_beacon(rtwdev); -+ if (ret) -+ rtw_err(rtwdev, "HW scan download beacon failed\n"); -+ } -+ - return ret; - } - -@@ -2251,6 +2257,7 @@ void rtw_hw_scan_chan_switch(struct rtw_ - if (rtw_is_op_chan(rtwdev, chan)) { - rtw_store_op_chan(rtwdev, false); - ieee80211_wake_queues(rtwdev->hw); -+ rtw_core_enable_beacon(rtwdev, true); - } - } else if (id == RTW_SCAN_NOTIFY_ID_PRESWITCH) { - if (IS_CH_5G_BAND(chan)) { -@@ -2269,8 +2276,10 @@ void rtw_hw_scan_chan_switch(struct rtw_ - * if next channel is non-op channel. - */ - if (!rtw_is_op_chan(rtwdev, chan) && -- rtw_is_op_chan(rtwdev, hal->current_channel)) -+ rtw_is_op_chan(rtwdev, hal->current_channel)) { -+ rtw_core_enable_beacon(rtwdev, false); - ieee80211_stop_queues(rtwdev->hw); -+ } - } - - rtw_dbg(rtwdev, RTW_DBG_HW_SCAN, ---- a/drivers/net/wireless/realtek/rtw88/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c -@@ -404,7 +404,7 @@ static void rtw_ops_bss_info_changed(str - if (changed & BSS_CHANGED_BSSID) { - ether_addr_copy(rtwvif->bssid, conf->bssid); - config |= PORT_SET_BSSID; -- if (is_zero_ether_addr(rtwvif->bssid)) -+ if (!rtw_core_check_sta_active(rtwdev)) - rtw_clear_op_chan(rtwdev); - else - rtw_store_op_chan(rtwdev, true); -@@ -452,6 +452,7 @@ static int rtw_ops_start_ap(struct ieee8 - - mutex_lock(&rtwdev->mutex); - rtwdev->ap_active = true; -+ rtw_store_op_chan(rtwdev, true); - chip->ops->phy_calibration(rtwdev); - mutex_unlock(&rtwdev->mutex); - -@@ -466,6 +467,8 @@ static void rtw_ops_stop_ap(struct ieee8 - - mutex_lock(&rtwdev->mutex); - rtwdev->ap_active = false; -+ if (!rtw_core_check_sta_active(rtwdev)) -+ rtw_clear_op_chan(rtwdev); - mutex_unlock(&rtwdev->mutex); - } - ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -830,6 +830,9 @@ void rtw_set_channel(struct rtw_dev *rtw - - rtw_update_channel(rtwdev, center_chan, primary_chan, band, bandwidth); - -+ if (rtwdev->scan_info.op_chan) -+ rtw_store_op_chan(rtwdev, true); -+ - chip->ops->set_channel(rtwdev, center_chan, bandwidth, - hal->current_primary_channel_index); - -@@ -2330,6 +2333,42 @@ void rtw_core_port_switch(struct rtw_dev - rtw_iterate_vifs(rtwdev, rtw_port_switch_iter, &iter_data); - } - -+static void rtw_check_sta_active_iter(void *data, u8 *mac, -+ struct ieee80211_vif *vif) -+{ -+ struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; -+ bool *active = data; -+ -+ if (*active) -+ return; -+ -+ if (vif->type != NL80211_IFTYPE_STATION) -+ return; -+ -+ if (vif->cfg.assoc || !is_zero_ether_addr(rtwvif->bssid)) -+ *active = true; -+} -+ -+bool rtw_core_check_sta_active(struct rtw_dev *rtwdev) -+{ -+ bool sta_active = false; -+ -+ rtw_iterate_vifs(rtwdev, rtw_check_sta_active_iter, &sta_active); -+ -+ return rtwdev->ap_active || sta_active; -+} -+ -+void rtw_core_enable_beacon(struct rtw_dev *rtwdev, bool enable) -+{ -+ if (!rtwdev->ap_active) -+ return; -+ -+ if (enable) -+ rtw_write32_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); -+ else -+ rtw_write32_clr(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); -+} -+ - MODULE_AUTHOR("Realtek Corporation"); - MODULE_DESCRIPTION("Realtek 802.11ac wireless core module"); - MODULE_LICENSE("Dual BSD/GPL"); ---- a/drivers/net/wireless/realtek/rtw88/main.h -+++ b/drivers/net/wireless/realtek/rtw88/main.h -@@ -2201,4 +2201,6 @@ void rtw_update_channel(struct rtw_dev * - u8 primary_channel, enum rtw_supported_band band, - enum rtw_bandwidth bandwidth); - void rtw_core_port_switch(struct rtw_dev *rtwdev, struct ieee80211_vif *vif); -+bool rtw_core_check_sta_active(struct rtw_dev *rtwdev); -+void rtw_core_enable_beacon(struct rtw_dev *rtwdev, bool enable); - #endif diff --git a/package/kernel/mac80211/patches/rtl/039-wifi-rtw88-8822c-add-iface-combination.patch b/package/kernel/mac80211/patches/rtl/039-wifi-rtw88-8822c-add-iface-combination.patch deleted file mode 100644 index ddea65516..000000000 --- a/package/kernel/mac80211/patches/rtl/039-wifi-rtw88-8822c-add-iface-combination.patch +++ /dev/null @@ -1,58 +0,0 @@ -From d16836cdcc3b17734f6aae165268d2f1777a4f74 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 14 Apr 2023 20:13:31 +0800 -Subject: [PATCH 39/45] wifi: rtw88: 8822c: add iface combination - -Allow 8822c to operate two interface concurrently, only 1 AP mode plus -1 station mode under same frequency is supported. Combination of other -types will not be added until requested. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230414121331.18062-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/main.c | 25 +++++++++++++++++++++++ - 1 file changed, 25 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -103,6 +103,26 @@ static struct ieee80211_rate rtw_ratetab - {.bitrate = 540, .hw_value = 0x0b,}, - }; - -+static const struct ieee80211_iface_limit rtw_iface_limits[] = { -+ { -+ .max = 1, -+ .types = BIT(NL80211_IFTYPE_STATION), -+ }, -+ { -+ .max = 1, -+ .types = BIT(NL80211_IFTYPE_AP), -+ } -+}; -+ -+static const struct ieee80211_iface_combination rtw_iface_combs[] = { -+ { -+ .limits = rtw_iface_limits, -+ .n_limits = ARRAY_SIZE(rtw_iface_limits), -+ .max_interfaces = 2, -+ .num_different_channels = 1, -+ } -+}; -+ - u16 rtw_desc_to_bitrate(u8 desc_rate) - { - struct ieee80211_rate rate; -@@ -2205,6 +2225,11 @@ int rtw_register_hw(struct rtw_dev *rtwd - hw->wiphy->max_scan_ssids = RTW_SCAN_MAX_SSIDS; - hw->wiphy->max_scan_ie_len = rtw_get_max_scan_ie_len(rtwdev); - -+ if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C) { -+ hw->wiphy->iface_combinations = rtw_iface_combs; -+ hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw_iface_combs); -+ } -+ - wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); - wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SCAN_RANDOM_SN); - wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_SET_SCAN_DWELL); diff --git a/package/kernel/mac80211/patches/rtl/040-wifi-rtw88-usb-fix-priority-queue-to-endpoint-mappin.patch b/package/kernel/mac80211/patches/rtl/040-wifi-rtw88-usb-fix-priority-queue-to-endpoint-mappin.patch deleted file mode 100644 index 9ac3e61ad..000000000 --- a/package/kernel/mac80211/patches/rtl/040-wifi-rtw88-usb-fix-priority-queue-to-endpoint-mappin.patch +++ /dev/null @@ -1,140 +0,0 @@ -From a6f187f92bcc2b17821538b4a11d61764e68b091 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Mon, 17 Apr 2023 16:03:55 +0200 -Subject: [PATCH 40/45] wifi: rtw88: usb: fix priority queue to endpoint - mapping - -The RTW88 chipsets have four different priority queues in hardware. For -the USB type chipsets the packets destined for a specific priority queue -must be sent through the endpoint corresponding to the queue. This was -not fully understood when porting from the RTW88 USB out of tree driver -and thus violated. - -This patch implements the qsel to endpoint mapping as in -get_usb_bulkout_id_88xx() in the downstream driver. - -Without this the driver often issues "timed out to flush queue 3" -warnings and often TX stalls completely. - -Signed-off-by: Sascha Hauer -Tested-by: ValdikSS -Tested-by: Alexandru gagniuc -Tested-by: Larry Finger -Cc: stable@vger.kernel.org -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230417140358.2240429-2-s.hauer@pengutronix.de ---- - drivers/net/wireless/realtek/rtw88/usb.c | 70 ++++++++++++++++-------- - 1 file changed, 47 insertions(+), 23 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/usb.c -+++ b/drivers/net/wireless/realtek/rtw88/usb.c -@@ -118,6 +118,22 @@ static void rtw_usb_write32(struct rtw_d - rtw_usb_write(rtwdev, addr, val, 4); - } - -+static int dma_mapping_to_ep(enum rtw_dma_mapping dma_mapping) -+{ -+ switch (dma_mapping) { -+ case RTW_DMA_MAPPING_HIGH: -+ return 0; -+ case RTW_DMA_MAPPING_NORMAL: -+ return 1; -+ case RTW_DMA_MAPPING_LOW: -+ return 2; -+ case RTW_DMA_MAPPING_EXTRA: -+ return 3; -+ default: -+ return -EINVAL; -+ } -+} -+ - static int rtw_usb_parse(struct rtw_dev *rtwdev, - struct usb_interface *interface) - { -@@ -129,6 +145,8 @@ static int rtw_usb_parse(struct rtw_dev - int num_out_pipes = 0; - int i; - u8 num; -+ const struct rtw_chip_info *chip = rtwdev->chip; -+ const struct rtw_rqpn *rqpn; - - for (i = 0; i < interface_desc->bNumEndpoints; i++) { - endpoint = &host_interface->endpoint[i].desc; -@@ -183,31 +201,34 @@ static int rtw_usb_parse(struct rtw_dev - - rtwdev->hci.bulkout_num = num_out_pipes; - -- switch (num_out_pipes) { -- case 4: -- case 3: -- rtwusb->qsel_to_ep[TX_DESC_QSEL_TID0] = 2; -- rtwusb->qsel_to_ep[TX_DESC_QSEL_TID1] = 2; -- rtwusb->qsel_to_ep[TX_DESC_QSEL_TID2] = 2; -- rtwusb->qsel_to_ep[TX_DESC_QSEL_TID3] = 2; -- rtwusb->qsel_to_ep[TX_DESC_QSEL_TID4] = 1; -- rtwusb->qsel_to_ep[TX_DESC_QSEL_TID5] = 1; -- rtwusb->qsel_to_ep[TX_DESC_QSEL_TID6] = 0; -- rtwusb->qsel_to_ep[TX_DESC_QSEL_TID7] = 0; -- break; -- case 2: -- rtwusb->qsel_to_ep[TX_DESC_QSEL_TID0] = 1; -- rtwusb->qsel_to_ep[TX_DESC_QSEL_TID1] = 1; -- rtwusb->qsel_to_ep[TX_DESC_QSEL_TID2] = 1; -- rtwusb->qsel_to_ep[TX_DESC_QSEL_TID3] = 1; -- break; -- case 1: -- break; -- default: -- rtw_err(rtwdev, "failed to get out_pipes(%d)\n", num_out_pipes); -+ if (num_out_pipes < 1 || num_out_pipes > 4) { -+ rtw_err(rtwdev, "invalid number of endpoints %d\n", num_out_pipes); - return -EINVAL; - } - -+ rqpn = &chip->rqpn_table[num_out_pipes]; -+ -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID0] = dma_mapping_to_ep(rqpn->dma_map_be); -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID1] = dma_mapping_to_ep(rqpn->dma_map_bk); -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID2] = dma_mapping_to_ep(rqpn->dma_map_bk); -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID3] = dma_mapping_to_ep(rqpn->dma_map_be); -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID4] = dma_mapping_to_ep(rqpn->dma_map_vi); -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID5] = dma_mapping_to_ep(rqpn->dma_map_vi); -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID6] = dma_mapping_to_ep(rqpn->dma_map_vo); -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID7] = dma_mapping_to_ep(rqpn->dma_map_vo); -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID8] = -EINVAL; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID9] = -EINVAL; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID10] = -EINVAL; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID11] = -EINVAL; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID12] = -EINVAL; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID13] = -EINVAL; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID14] = -EINVAL; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_TID15] = -EINVAL; -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_BEACON] = dma_mapping_to_ep(rqpn->dma_map_hi); -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_HIGH] = dma_mapping_to_ep(rqpn->dma_map_hi); -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_MGMT] = dma_mapping_to_ep(rqpn->dma_map_mg); -+ rtwusb->qsel_to_ep[TX_DESC_QSEL_H2C] = dma_mapping_to_ep(rqpn->dma_map_hi); -+ - return 0; - } - -@@ -250,7 +271,7 @@ static void rtw_usb_write_port_tx_comple - static int qsel_to_ep(struct rtw_usb *rtwusb, unsigned int qsel) - { - if (qsel >= ARRAY_SIZE(rtwusb->qsel_to_ep)) -- return 0; -+ return -EINVAL; - - return rtwusb->qsel_to_ep[qsel]; - } -@@ -265,6 +286,9 @@ static int rtw_usb_write_port(struct rtw - int ret; - int ep = qsel_to_ep(rtwusb, qsel); - -+ if (ep < 0) -+ return ep; -+ - pipe = usb_sndbulkpipe(usbd, rtwusb->out_ep[ep]); - urb = usb_alloc_urb(0, GFP_ATOMIC); - if (!urb) diff --git a/package/kernel/mac80211/patches/rtl/041-wifi-rtw88-rtw8821c-Fix-rfe_option-field-width.patch b/package/kernel/mac80211/patches/rtl/041-wifi-rtw88-rtw8821c-Fix-rfe_option-field-width.patch deleted file mode 100644 index c140b4b05..000000000 --- a/package/kernel/mac80211/patches/rtl/041-wifi-rtw88-rtw8821c-Fix-rfe_option-field-width.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 14705f969d98187a1cc2682e0c9bd2e230b8098f Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Mon, 17 Apr 2023 16:03:56 +0200 -Subject: [PATCH 41/45] wifi: rtw88: rtw8821c: Fix rfe_option field width - -On my RTW8821CU chipset rfe_option reads as 0x22. Looking at the -vendor driver suggests that the field width of rfe_option is 5 bit, -so rfe_option should be masked with 0x1f. - -Without this the rfe_option comparisons with 2 further down the -driver evaluate as false when they should really evaluate as true. -The effect is that 2G channels do not work. - -rfe_option is also used as an array index into rtw8821c_rfe_defs[]. -rtw8821c_rfe_defs[34] (0x22) was added as part of adding USB support, -likely because rfe_option reads as 0x22. As this now becomes 0x2, -rtw8821c_rfe_defs[34] is no longer used and can be removed. - -Note that this might not be the whole truth. In the vendor driver -there are indeed places where the unmasked rfe_option value is used. -However, the driver has several places where rfe_option is tested -with the pattern if (rfe_option == 2 || rfe_option == 0x22) or -if (rfe_option == 4 || rfe_option == 0x24), so that rfe_option BIT(5) -has no influence on the code path taken. We therefore mask BIT(5) -out from rfe_option entirely until this assumption is proved wrong -by some chip variant we do not know yet. - -Signed-off-by: Sascha Hauer -Tested-by: Alexandru gagniuc -Tested-by: Larry Finger -Tested-by: ValdikSS -Cc: stable@vger.kernel.org -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230417140358.2240429-3-s.hauer@pengutronix.de ---- - drivers/net/wireless/realtek/rtw88/rtw8821c.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/rtw8821c.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8821c.c -@@ -53,7 +53,7 @@ static int rtw8821c_read_efuse(struct rt - - map = (struct rtw8821c_efuse *)log_map; - -- efuse->rfe_option = map->rfe_option; -+ efuse->rfe_option = map->rfe_option & 0x1f; - efuse->rf_board_option = map->rf_board_option; - efuse->crystal_cap = map->xtal_k; - efuse->pa_type_2g = map->pa_type; -@@ -1546,7 +1546,6 @@ static const struct rtw_rfe_def rtw8821c - [2] = RTW_DEF_RFE_EXT(8821c, 0, 0, 2), - [4] = RTW_DEF_RFE_EXT(8821c, 0, 0, 2), - [6] = RTW_DEF_RFE(8821c, 0, 0), -- [34] = RTW_DEF_RFE(8821c, 0, 0), - }; - - static struct rtw_hw_reg rtw8821c_dig[] = { diff --git a/package/kernel/mac80211/patches/rtl/042-wifi-rtw88-set-pkg_type-correctly-for-specific-rtw88.patch b/package/kernel/mac80211/patches/rtl/042-wifi-rtw88-set-pkg_type-correctly-for-specific-rtw88.patch deleted file mode 100644 index e9954c515..000000000 --- a/package/kernel/mac80211/patches/rtl/042-wifi-rtw88-set-pkg_type-correctly-for-specific-rtw88.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 97c75e1adeda78b3794936c617d8b86e9ebd54f5 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Mon, 17 Apr 2023 16:03:57 +0200 -Subject: [PATCH 42/45] wifi: rtw88: set pkg_type correctly for specific - rtw8821c variants - -According to the vendor driver the pkg_type has to be set to '1' -for some rtw8821c variants. As the pkg_type has been hardcoded to -'0', add a field for it in struct rtw_hal and set this correctly -in the rtw8821c part. -With this parsing of a rtw_table is influenced and check_positive() -in phy.c returns true for some cases here. The same is done in the -vendor driver. However, this has no visible effect on the driver -here. - -Signed-off-by: Sascha Hauer -Reviewed-by: Ping-Ke Shih -Signed-off-by: Sascha Hauer -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230417140358.2240429-4-s.hauer@pengutronix.de ---- - drivers/net/wireless/realtek/rtw88/main.c | 2 +- - drivers/net/wireless/realtek/rtw88/main.h | 1 + - drivers/net/wireless/realtek/rtw88/rtw8821c.c | 3 +++ - 3 files changed, 5 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -2008,7 +2008,7 @@ static int rtw_chip_board_info_setup(str - if (!rfe_def) - return -ENODEV; - -- rtw_phy_setup_phy_cond(rtwdev, 0); -+ rtw_phy_setup_phy_cond(rtwdev, hal->pkg_type); - - rtw_phy_init_tx_power(rtwdev); - if (rfe_def->agc_btg_tbl) ---- a/drivers/net/wireless/realtek/rtw88/main.h -+++ b/drivers/net/wireless/realtek/rtw88/main.h -@@ -1900,6 +1900,7 @@ struct rtw_hal { - u8 cut_version; - u8 mp_chip; - u8 oem_id; -+ u8 pkg_type; - struct rtw_phy_cond phy_cond; - - u8 ps_mode; ---- a/drivers/net/wireless/realtek/rtw88/rtw8821c.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8821c.c -@@ -47,6 +47,7 @@ enum rtw8821ce_rf_set { - - static int rtw8821c_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) - { -+ struct rtw_hal *hal = &rtwdev->hal; - struct rtw_efuse *efuse = &rtwdev->efuse; - struct rtw8821c_efuse *map; - int i; -@@ -70,6 +71,8 @@ static int rtw8821c_read_efuse(struct rt - efuse->tx_bb_swing_setting_2g = map->tx_bb_swing_setting_2g; - efuse->tx_bb_swing_setting_5g = map->tx_bb_swing_setting_5g; - -+ hal->pkg_type = map->rfe_option & BIT(5) ? 1 : 0; -+ - for (i = 0; i < 4; i++) - efuse->txpwr_idx_table[i] = map->txpwr_idx_table[i]; - diff --git a/package/kernel/mac80211/patches/rtl/043-wifi-rtw88-call-rtw8821c_switch_rf_set-according-to-.patch b/package/kernel/mac80211/patches/rtl/043-wifi-rtw88-call-rtw8821c_switch_rf_set-according-to-.patch deleted file mode 100644 index da34691f3..000000000 --- a/package/kernel/mac80211/patches/rtl/043-wifi-rtw88-call-rtw8821c_switch_rf_set-according-to-.patch +++ /dev/null @@ -1,73 +0,0 @@ -From 172591baa2cc1ec04869a0d798821a6ca9a2f4b4 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Mon, 17 Apr 2023 16:03:58 +0200 -Subject: [PATCH 43/45] wifi: rtw88: call rtw8821c_switch_rf_set() according to - chip variant - -We have to call rtw8821c_switch_rf_set() with SWITCH_TO_WLG or -SWITCH_TO_BTG according to the chip variant as denoted in rfe_option. -The information which argument to use for which variant has been -taken from the vendor driver. - -Signed-off-by: Sascha Hauer -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230417140358.2240429-5-s.hauer@pengutronix.de ---- - drivers/net/wireless/realtek/rtw88/main.h | 1 + - drivers/net/wireless/realtek/rtw88/rtw8821c.c | 19 +++++++++++++++---- - 2 files changed, 16 insertions(+), 4 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/main.h -+++ b/drivers/net/wireless/realtek/rtw88/main.h -@@ -1902,6 +1902,7 @@ struct rtw_hal { - u8 oem_id; - u8 pkg_type; - struct rtw_phy_cond phy_cond; -+ bool rfe_btg; - - u8 ps_mode; - u8 current_channel; ---- a/drivers/net/wireless/realtek/rtw88/rtw8821c.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8821c.c -@@ -73,6 +73,17 @@ static int rtw8821c_read_efuse(struct rt - - hal->pkg_type = map->rfe_option & BIT(5) ? 1 : 0; - -+ switch (efuse->rfe_option) { -+ case 0x2: -+ case 0x4: -+ case 0x7: -+ case 0xa: -+ case 0xc: -+ case 0xf: -+ hal->rfe_btg = true; -+ break; -+ } -+ - for (i = 0; i < 4; i++) - efuse->txpwr_idx_table[i] = map->txpwr_idx_table[i]; - -@@ -298,6 +309,7 @@ static void rtw8821c_switch_rf_set(struc - - static void rtw8821c_set_channel_rf(struct rtw_dev *rtwdev, u8 channel, u8 bw) - { -+ struct rtw_hal *hal = &rtwdev->hal; - u32 rf_reg18; - - rf_reg18 = rtw_read_rf(rtwdev, RF_PATH_A, 0x18, RFREG_MASK); -@@ -329,11 +341,10 @@ static void rtw8821c_set_channel_rf(stru - } - - if (channel <= 14) { -- if (rtwdev->efuse.rfe_option == 0) -- rtw8821c_switch_rf_set(rtwdev, SWITCH_TO_WLG); -- else if (rtwdev->efuse.rfe_option == 2 || -- rtwdev->efuse.rfe_option == 4) -+ if (hal->rfe_btg) - rtw8821c_switch_rf_set(rtwdev, SWITCH_TO_BTG); -+ else -+ rtw8821c_switch_rf_set(rtwdev, SWITCH_TO_WLG); - rtw_write_rf(rtwdev, RF_PATH_A, RF_LUTDBG, BIT(6), 0x1); - rtw_write_rf(rtwdev, RF_PATH_A, 0x64, 0xf, 0xf); - } else { diff --git a/package/kernel/mac80211/patches/rtl/044-wifi-rtw88-Fix-memory-leak-in-rtw88_usb.patch b/package/kernel/mac80211/patches/rtl/044-wifi-rtw88-Fix-memory-leak-in-rtw88_usb.patch deleted file mode 100644 index aa2439e35..000000000 --- a/package/kernel/mac80211/patches/rtl/044-wifi-rtw88-Fix-memory-leak-in-rtw88_usb.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 59a3a312009723e3e5082899655fdcc420e2b47a Mon Sep 17 00:00:00 2001 -From: Larry Finger -Date: Mon, 17 Apr 2023 11:03:31 -0500 -Subject: [PATCH 44/45] wifi: rtw88: Fix memory leak in rtw88_usb - -Kmemleak shows the following leak arising from routine in the usb -probe routine: - -unreferenced object 0xffff895cb29bba00 (size 512): - comm "(udev-worker)", pid 534, jiffies 4294903932 (age 102751.088s) - hex dump (first 32 bytes): - 77 30 30 30 00 00 00 00 02 2f 2d 2b 30 00 00 00 w000...../-+0... - 02 00 2a 28 00 00 00 00 ff 55 ff ff ff 00 00 00 ..*(.....U...... - backtrace: - [] kmalloc_trace+0x26/0x90 - [] rtw_usb_probe+0x2f1/0x680 [rtw_usb] - [] usb_probe_interface+0xdd/0x2e0 [usbcore] - [] really_probe+0x18e/0x3d0 - [] __driver_probe_device+0x78/0x160 - [] driver_probe_device+0x1f/0x90 - [] __driver_attach+0xbf/0x1b0 - [] bus_for_each_dev+0x70/0xc0 - [] bus_add_driver+0x10e/0x210 - [] driver_register+0x55/0xf0 - [] usb_register_driver+0x88/0x140 [usbcore] - [] do_one_initcall+0x43/0x210 - [] do_init_module+0x4a/0x200 - [] __do_sys_finit_module+0xac/0x120 - [] do_syscall_64+0x56/0x80 - [] entry_SYSCALL_64_after_hwframe+0x46/0xb0 - -The leak was verified to be real by unloading the driver, which resulted -in a dangling pointer to the allocation. - -The allocated memory is freed in rtw_usb_intf_deinit(). - -Signed-off-by: Larry Finger -Cc: Sascha Hauer -Cc: Ping-Ke Shih -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230417160331.23071-1-Larry.Finger@lwfinger.net ---- - drivers/net/wireless/realtek/rtw88/usb.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/net/wireless/realtek/rtw88/usb.c -+++ b/drivers/net/wireless/realtek/rtw88/usb.c -@@ -804,6 +804,7 @@ static void rtw_usb_intf_deinit(struct r - struct rtw_usb *rtwusb = rtw_get_usb_priv(rtwdev); - - usb_put_dev(rtwusb->udev); -+ kfree(rtwusb->usb_data); - usb_set_intfdata(intf, NULL); - } - diff --git a/package/kernel/mac80211/patches/rtl/045-wifi-rtw88-Update-spelling-in-main.h.patch b/package/kernel/mac80211/patches/rtl/045-wifi-rtw88-Update-spelling-in-main.h.patch deleted file mode 100644 index 534ae86e0..000000000 --- a/package/kernel/mac80211/patches/rtl/045-wifi-rtw88-Update-spelling-in-main.h.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 6c6d62ae8271bd4b55dd2ba4b7ed552162823880 Mon Sep 17 00:00:00 2001 -From: Simon Horman -Date: Tue, 18 Apr 2023 13:29:22 +0200 -Subject: [PATCH 45/45] wifi: rtw88: Update spelling in main.h - -Update spelling in comments in main.h - -Found by inspection. - -Signed-off-by: Simon Horman -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230418-rtw88-starspell-v1-1-70e52a23979b@kernel.org ---- - drivers/net/wireless/realtek/rtw88/main.h | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/main.h -+++ b/drivers/net/wireless/realtek/rtw88/main.h -@@ -88,7 +88,7 @@ enum rtw_supported_band { - RTW_BAND_60G = BIT(NL80211_BAND_60GHZ), - }; - --/* now, support upto 80M bw */ -+/* now, support up to 80M bw */ - #define RTW_MAX_CHANNEL_WIDTH RTW_CHANNEL_WIDTH_80 - - enum rtw_bandwidth { -@@ -1881,7 +1881,7 @@ enum rtw_sar_bands { - RTW_SAR_BAND_NR, - }; - --/* the union is reserved for other knids of SAR sources -+/* the union is reserved for other kinds of SAR sources - * which might not re-use same format with array common. - */ - union rtw_sar_cfg { -@@ -2032,7 +2032,7 @@ struct rtw_dev { - struct rtw_tx_report tx_report; - - struct { -- /* incicate the mail box to use with fw */ -+ /* indicate the mail box to use with fw */ - u8 last_box_num; - u32 seq; - } h2c; diff --git a/package/kernel/mac80211/patches/rtl/046-wifi-rtw88-fix-incorrect-error-codes-in-rtw_debugfs_.patch b/package/kernel/mac80211/patches/rtl/046-wifi-rtw88-fix-incorrect-error-codes-in-rtw_debugfs_.patch deleted file mode 100644 index 4552d856a..000000000 --- a/package/kernel/mac80211/patches/rtl/046-wifi-rtw88-fix-incorrect-error-codes-in-rtw_debugfs_.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 225622256b1b7156624e281e1c0251c292ea24cd Mon Sep 17 00:00:00 2001 -From: Zhang Shurong -Date: Thu, 27 Apr 2023 01:02:20 +0800 -Subject: [PATCH 01/12] wifi: rtw88: fix incorrect error codes in - rtw_debugfs_copy_from_user - -If there is a failure during copy_from_user or user-provided data -buffer is invalid, rtw_debugfs_copy_from_user should return negative -error code instead of a positive value count. - -Fix this bug by returning correct error code. Moreover, the check -of buffer against null is removed since it will be handled by -copy_from_user. - -Signed-off-by: Zhang Shurong -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/tencent_D2EB102CC7435C0110154E62ECA6A7D67505@qq.com ---- - drivers/net/wireless/realtek/rtw88/debug.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/debug.c -+++ b/drivers/net/wireless/realtek/rtw88/debug.c -@@ -183,8 +183,8 @@ static int rtw_debugfs_copy_from_user(ch - - tmp_len = (count > size - 1 ? size - 1 : count); - -- if (!buffer || copy_from_user(tmp, buffer, tmp_len)) -- return count; -+ if (copy_from_user(tmp, buffer, tmp_len)) -+ return -EFAULT; - - tmp[tmp_len] = '\0'; - diff --git a/package/kernel/mac80211/patches/rtl/047-wifi-rtw88-fix-incorrect-error-codes-in-rtw_debugfs_.patch b/package/kernel/mac80211/patches/rtl/047-wifi-rtw88-fix-incorrect-error-codes-in-rtw_debugfs_.patch deleted file mode 100644 index 02638f3cf..000000000 --- a/package/kernel/mac80211/patches/rtl/047-wifi-rtw88-fix-incorrect-error-codes-in-rtw_debugfs_.patch +++ /dev/null @@ -1,173 +0,0 @@ -From 77005533777267736fca64fa376b8a835cb8806b Mon Sep 17 00:00:00 2001 -From: Zhang Shurong -Date: Thu, 27 Apr 2023 01:02:21 +0800 -Subject: [PATCH 02/12] wifi: rtw88: fix incorrect error codes in - rtw_debugfs_set_* - -If there is a failure during copy_from_user or user-provided data -buffer is invalid, rtw_debugfs_set_* should return negative -error code instead of a positive value count. - -Fix this bug by returning correct error code. - -Signed-off-by: Zhang Shurong -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/tencent_53140CC2A3468101955F02EB66AA96780B05@qq.com ---- - drivers/net/wireless/realtek/rtw88/debug.c | 55 ++++++++++++++++------ - 1 file changed, 41 insertions(+), 14 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/debug.c -+++ b/drivers/net/wireless/realtek/rtw88/debug.c -@@ -201,13 +201,16 @@ static ssize_t rtw_debugfs_set_read_reg( - char tmp[32 + 1]; - u32 addr, len; - int num; -+ int ret; - -- rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 2); -+ ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 2); -+ if (ret) -+ return ret; - - num = sscanf(tmp, "%x %x", &addr, &len); - - if (num != 2) -- return count; -+ return -EINVAL; - - if (len != 1 && len != 2 && len != 4) { - rtw_warn(rtwdev, "read reg setting wrong len\n"); -@@ -288,8 +291,11 @@ static ssize_t rtw_debugfs_set_rsvd_page - char tmp[32 + 1]; - u32 offset, page_num; - int num; -+ int ret; - -- rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 2); -+ ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 2); -+ if (ret) -+ return ret; - - num = sscanf(tmp, "%d %d", &offset, &page_num); - -@@ -314,8 +320,11 @@ static ssize_t rtw_debugfs_set_single_in - char tmp[32 + 1]; - u32 input; - int num; -+ int ret; - -- rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 1); -+ ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 1); -+ if (ret) -+ return ret; - - num = kstrtoint(tmp, 0, &input); - -@@ -338,14 +347,17 @@ static ssize_t rtw_debugfs_set_write_reg - char tmp[32 + 1]; - u32 addr, val, len; - int num; -+ int ret; - -- rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 3); -+ ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 3); -+ if (ret) -+ return ret; - - /* write BB/MAC register */ - num = sscanf(tmp, "%x %x %x", &addr, &val, &len); - - if (num != 3) -- return count; -+ return -EINVAL; - - switch (len) { - case 1: -@@ -381,8 +393,11 @@ static ssize_t rtw_debugfs_set_h2c(struc - char tmp[32 + 1]; - u8 param[8]; - int num; -+ int ret; - -- rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 3); -+ ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 3); -+ if (ret) -+ return ret; - - num = sscanf(tmp, "%hhx,%hhx,%hhx,%hhx,%hhx,%hhx,%hhx,%hhx", - ¶m[0], ¶m[1], ¶m[2], ¶m[3], -@@ -408,14 +423,17 @@ static ssize_t rtw_debugfs_set_rf_write( - char tmp[32 + 1]; - u32 path, addr, mask, val; - int num; -+ int ret; - -- rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 4); -+ ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 4); -+ if (ret) -+ return ret; - - num = sscanf(tmp, "%x %x %x %x", &path, &addr, &mask, &val); - - if (num != 4) { - rtw_warn(rtwdev, "invalid args, [path] [addr] [mask] [val]\n"); -- return count; -+ return -EINVAL; - } - - mutex_lock(&rtwdev->mutex); -@@ -438,14 +456,17 @@ static ssize_t rtw_debugfs_set_rf_read(s - char tmp[32 + 1]; - u32 path, addr, mask; - int num; -+ int ret; - -- rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 3); -+ ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 3); -+ if (ret) -+ return ret; - - num = sscanf(tmp, "%x %x %x", &path, &addr, &mask); - - if (num != 3) { - rtw_warn(rtwdev, "invalid args, [path] [addr] [mask] [val]\n"); -- return count; -+ return -EINVAL; - } - - debugfs_priv->rf_path = path; -@@ -467,7 +488,9 @@ static ssize_t rtw_debugfs_set_fix_rate( - char tmp[32 + 1]; - int ret; - -- rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 1); -+ ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 1); -+ if (ret) -+ return ret; - - ret = kstrtou8(tmp, 0, &fix_rate); - if (ret) { -@@ -860,7 +883,9 @@ static ssize_t rtw_debugfs_set_coex_enab - bool enable; - int ret; - -- rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 1); -+ ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 1); -+ if (ret) -+ return ret; - - ret = kstrtobool(tmp, &enable); - if (ret) { -@@ -930,7 +955,9 @@ static ssize_t rtw_debugfs_set_fw_crash( - bool input; - int ret; - -- rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 1); -+ ret = rtw_debugfs_copy_from_user(tmp, sizeof(tmp), buffer, count, 1); -+ if (ret) -+ return ret; - - ret = kstrtobool(tmp, &input); - if (ret) diff --git a/package/kernel/mac80211/patches/rtl/048-wifi-rtw88-unlock-on-error-path-in-rtw_ops_add_inter.patch b/package/kernel/mac80211/patches/rtl/048-wifi-rtw88-unlock-on-error-path-in-rtw_ops_add_inter.patch deleted file mode 100644 index d067162ca..000000000 --- a/package/kernel/mac80211/patches/rtl/048-wifi-rtw88-unlock-on-error-path-in-rtw_ops_add_inter.patch +++ /dev/null @@ -1,31 +0,0 @@ -From e2ff1181b3d48257aab26bfd2165f3c7d271499f Mon Sep 17 00:00:00 2001 -From: Dan Carpenter -Date: Wed, 3 May 2023 18:09:55 +0300 -Subject: [PATCH 03/12] wifi: rtw88: unlock on error path in - rtw_ops_add_interface() - -Call mutex_unlock(&rtwdev->mutex); before returning on this error path. - -Fixes: f0e741e4ddbc ("wifi: rtw88: add bitmap for dynamic port settings") -Signed-off-by: Dan Carpenter -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/ddd10a74-5982-4f65-8c59-c1cca558d239@kili.mountain ---- - drivers/net/wireless/realtek/rtw88/mac80211.c | 4 +++- - 1 file changed, 3 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c -@@ -173,8 +173,10 @@ static int rtw_ops_add_interface(struct - mutex_lock(&rtwdev->mutex); - - port = find_first_zero_bit(rtwdev->hw_port, RTW_PORT_NUM); -- if (port >= RTW_PORT_NUM) -+ if (port >= RTW_PORT_NUM) { -+ mutex_unlock(&rtwdev->mutex); - return -EINVAL; -+ } - set_bit(port, rtwdev->hw_port); - - rtwvif->port = port; diff --git a/package/kernel/mac80211/patches/rtl/049-wifi-rtw88-use-work-to-update-rate-to-avoid-RCU-warn.patch b/package/kernel/mac80211/patches/rtl/049-wifi-rtw88-use-work-to-update-rate-to-avoid-RCU-warn.patch deleted file mode 100644 index e629593d1..000000000 --- a/package/kernel/mac80211/patches/rtl/049-wifi-rtw88-use-work-to-update-rate-to-avoid-RCU-warn.patch +++ /dev/null @@ -1,132 +0,0 @@ -From bcafcb959a57a6890e900199690c5fc47da1a304 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 8 May 2023 16:54:29 +0800 -Subject: [PATCH 04/12] wifi: rtw88: use work to update rate to avoid RCU - warning - -The ieee80211_ops::sta_rc_update must be atomic, because -ieee80211_chan_bw_change() holds rcu_read lock while calling -drv_sta_rc_update(), so create a work to do original things. - - Voluntary context switch within RCU read-side critical section! - WARNING: CPU: 0 PID: 4621 at kernel/rcu/tree_plugin.h:318 - rcu_note_context_switch+0x571/0x5d0 - CPU: 0 PID: 4621 Comm: kworker/u16:2 Tainted: G W OE - Workqueue: phy3 ieee80211_chswitch_work [mac80211] - RIP: 0010:rcu_note_context_switch+0x571/0x5d0 - Call Trace: - - __schedule+0xb0/0x1460 - ? __mod_timer+0x116/0x360 - schedule+0x5a/0xc0 - schedule_timeout+0x87/0x150 - ? trace_raw_output_tick_stop+0x60/0x60 - wait_for_completion_timeout+0x7b/0x140 - usb_start_wait_urb+0x82/0x160 [usbcore - usb_control_msg+0xe3/0x140 [usbcore - rtw_usb_read+0x88/0xe0 [rtw_usb - rtw_usb_read8+0xf/0x10 [rtw_usb - rtw_fw_send_h2c_command+0xa0/0x170 [rtw_core - rtw_fw_send_ra_info+0xc9/0xf0 [rtw_core - drv_sta_rc_update+0x7c/0x160 [mac80211 - ieee80211_chan_bw_change+0xfb/0x110 [mac80211 - ieee80211_change_chanctx+0x38/0x130 [mac80211 - ieee80211_vif_use_reserved_switch+0x34e/0x900 [mac80211 - ieee80211_link_use_reserved_context+0x88/0xe0 [mac80211 - ieee80211_chswitch_work+0x95/0x170 [mac80211 - process_one_work+0x201/0x410 - worker_thread+0x4a/0x3b0 - ? process_one_work+0x410/0x410 - kthread+0xe1/0x110 - ? kthread_complete_and_exit+0x20/0x20 - ret_from_fork+0x1f/0x30 - - -Cc: stable@vger.kernel.org -Fixes: c1edc86472fc ("rtw88: add ieee80211:sta_rc_update ops") -Reported-by: Larry Finger -Link: https://lore.kernel.org/linux-wireless/f1e31e8e-f84e-3791-50fb-663a83c5c6e9@lwfinger.net/T/#t -Signed-off-by: Ping-Ke Shih -Tested-by: Larry Finger -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230508085429.46653-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/mac80211.c | 2 +- - drivers/net/wireless/realtek/rtw88/main.c | 15 +++++++++++++++ - drivers/net/wireless/realtek/rtw88/main.h | 3 +++ - 3 files changed, 19 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c -@@ -920,7 +920,7 @@ static void rtw_ops_sta_rc_update(struct - struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; - - if (changed & IEEE80211_RC_BW_CHANGED) -- rtw_update_sta_info(rtwdev, si, true); -+ ieee80211_queue_work(rtwdev->hw, &si->rc_work); - } - - const struct ieee80211_ops rtw_ops = { ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -319,6 +319,17 @@ static u8 rtw_acquire_macid(struct rtw_d - return mac_id; - } - -+static void rtw_sta_rc_work(struct work_struct *work) -+{ -+ struct rtw_sta_info *si = container_of(work, struct rtw_sta_info, -+ rc_work); -+ struct rtw_dev *rtwdev = si->rtwdev; -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw_update_sta_info(rtwdev, si, true); -+ mutex_unlock(&rtwdev->mutex); -+} -+ - int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, - struct ieee80211_vif *vif) - { -@@ -329,12 +340,14 @@ int rtw_sta_add(struct rtw_dev *rtwdev, - if (si->mac_id >= RTW_MAX_MAC_ID_NUM) - return -ENOSPC; - -+ si->rtwdev = rtwdev; - si->sta = sta; - si->vif = vif; - si->init_ra_lv = 1; - ewma_rssi_init(&si->avg_rssi); - for (i = 0; i < ARRAY_SIZE(sta->txq); i++) - rtw_txq_init(rtwdev, sta->txq[i]); -+ INIT_WORK(&si->rc_work, rtw_sta_rc_work); - - rtw_update_sta_info(rtwdev, si, true); - rtw_fw_media_status_report(rtwdev, si->mac_id, true); -@@ -353,6 +366,8 @@ void rtw_sta_remove(struct rtw_dev *rtwd - struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; - int i; - -+ cancel_work_sync(&si->rc_work); -+ - rtw_release_macid(rtwdev, si->mac_id); - if (fw_exist) - rtw_fw_media_status_report(rtwdev, si->mac_id, false); ---- a/drivers/net/wireless/realtek/rtw88/main.h -+++ b/drivers/net/wireless/realtek/rtw88/main.h -@@ -743,6 +743,7 @@ struct rtw_txq { - DECLARE_EWMA(rssi, 10, 16); - - struct rtw_sta_info { -+ struct rtw_dev *rtwdev; - struct ieee80211_sta *sta; - struct ieee80211_vif *vif; - -@@ -767,6 +768,8 @@ struct rtw_sta_info { - - bool use_cfg_mask; - struct cfg80211_bitrate_mask *mask; -+ -+ struct work_struct rc_work; - }; - - enum rtw_bfee_role { diff --git a/package/kernel/mac80211/patches/rtl/050-wifi-rtw88-correct-qsel_to_ep-type-as-int.patch b/package/kernel/mac80211/patches/rtl/050-wifi-rtw88-correct-qsel_to_ep-type-as-int.patch deleted file mode 100644 index d27af4739..000000000 --- a/package/kernel/mac80211/patches/rtl/050-wifi-rtw88-correct-qsel_to_ep-type-as-int.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 8e4942db5f5ed7b7d9690d93235b3ca49c5c59ce Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 8 May 2023 16:55:39 +0800 -Subject: [PATCH 05/12] wifi: rtw88: correct qsel_to_ep[] type as int - -qsel_to_ep[] can be assigned negative value, so change type from 'u8' to -'int'. Otherwise, Smatch static checker warns: - drivers/net/wireless/realtek/rtw88/usb.c:219 rtw_usb_parse() warn: - assigning (-22) to unsigned variable 'rtwusb->qsel_to_ep[8]' - -Cc: stable@vger.kernel.org -Fixes: a6f187f92bcc ("wifi: rtw88: usb: fix priority queue to endpoint mapping") -Reported-by: Dan Carpenter -Link: https://lore.kernel.org/linux-wireless/c3f70197-829d-48ed-ae15-66a9de80fa90@kili.mountain/ -Cc: Sascha Hauer -Signed-off-by: Ping-Ke Shih -Acked-by: Sascha Hauer -Tested-by: Larry Finger -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230508085539.46795-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/usb.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/usb.h -+++ b/drivers/net/wireless/realtek/rtw88/usb.h -@@ -78,7 +78,7 @@ struct rtw_usb { - u8 pipe_interrupt; - u8 pipe_in; - u8 out_ep[RTW_USB_EP_MAX]; -- u8 qsel_to_ep[TX_DESC_QSEL_MAX]; -+ int qsel_to_ep[TX_DESC_QSEL_MAX]; - u8 usb_txagg_num; - - struct workqueue_struct *txwq, *rxwq; diff --git a/package/kernel/mac80211/patches/rtl/051-wifi-rtw88-sdio-Always-use-two-consecutive-bytes-for.patch b/package/kernel/mac80211/patches/rtl/051-wifi-rtw88-sdio-Always-use-two-consecutive-bytes-for.patch deleted file mode 100644 index 3697343fa..000000000 --- a/package/kernel/mac80211/patches/rtl/051-wifi-rtw88-sdio-Always-use-two-consecutive-bytes-for.patch +++ /dev/null @@ -1,60 +0,0 @@ -From cb0ddaaa5db09d7d216fcbf0e68779be223a1128 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Mon, 15 May 2023 21:50:43 +0200 -Subject: [PATCH 06/12] wifi: rtw88: sdio: Always use two consecutive bytes for - word operations - -The Allwinner sunxi-mmc controller cannot handle word (16 bit) -transfers. So and sdio_{read,write}w fails with messages like the -following example using an RTL8822BS (but the same problems were also -observed with RTL8822CS and RTL8723DS chips): - rtw_8822bs mmc1:0001:1: Firmware version 27.2.0, H2C version 13 - sunxi-mmc 4021000.mmc: unaligned scatterlist: os f80 length 2 - sunxi-mmc 4021000.mmc: map DMA failed - rtw_8822bs mmc1:0001:1: sdio read16 failed (0x10230): -22 - -Use two consecutive single byte accesses for word operations instead. It -turns out that upon closer inspection this is also what the vendor -driver does, even though it does have support for sdio_{read,write}w. So -we can conclude that the rtw88 chips do support word access but only on -SDIO controllers that also support it. Since there's no way to detect if -the controller supports word access or not the rtw88 sdio driver -switches to the easiest approach: avoiding word access. - -Reported-by: Larry Finger -Closes: https://lore.kernel.org/linux-wireless/527585e5-9cdd-66ed-c3af-6da162f4b720@lwfinger.net/ -Reported-by: Rudi Heitbaum -Link: https://github.com/LibreELEC/LibreELEC.tv/pull/7837#issue-1708469467 -Fixes: 65371a3f14e7 ("wifi: rtw88: sdio: Add HCI implementation for SDIO based chipsets") -Reviewed-by: Ping-Ke Shih -Signed-off-by: Martin Blumenstingl -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230515195043.572375-1-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/sdio.c | 8 -------- - 1 file changed, 8 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/sdio.c -+++ b/drivers/net/wireless/realtek/rtw88/sdio.c -@@ -87,11 +87,6 @@ static void rtw_sdio_writew(struct rtw_d - u8 buf[2]; - int i; - -- if (rtw_sdio_use_memcpy_io(rtwdev, addr, 2)) { -- sdio_writew(rtwsdio->sdio_func, val, addr, err_ret); -- return; -- } -- - *(__le16 *)buf = cpu_to_le16(val); - - for (i = 0; i < 2; i++) { -@@ -125,9 +120,6 @@ static u16 rtw_sdio_readw(struct rtw_dev - u8 buf[2]; - int i; - -- if (rtw_sdio_use_memcpy_io(rtwdev, addr, 2)) -- return sdio_readw(rtwsdio->sdio_func, addr, err_ret); -- - for (i = 0; i < 2; i++) { - buf[i] = sdio_readb(rtwsdio->sdio_func, addr + i, err_ret); - if (*err_ret) diff --git a/package/kernel/mac80211/patches/rtl/052-wifi-rtw88-sdio-Check-the-HISR-RX_REQUEST-bit-in-rtw.patch b/package/kernel/mac80211/patches/rtl/052-wifi-rtw88-sdio-Check-the-HISR-RX_REQUEST-bit-in-rtw.patch deleted file mode 100644 index d3216ede4..000000000 --- a/package/kernel/mac80211/patches/rtl/052-wifi-rtw88-sdio-Check-the-HISR-RX_REQUEST-bit-in-rtw.patch +++ /dev/null @@ -1,84 +0,0 @@ -From e967229ead0e6c5047a1cfd5a0db58ceb930800b Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Mon, 22 May 2023 22:24:22 +0200 -Subject: [PATCH 07/12] wifi: rtw88: sdio: Check the HISR RX_REQUEST bit in - rtw_sdio_rx_isr() - -rtw_sdio_rx_isr() is responsible for receiving data from the wifi chip -and is called from the SDIO interrupt handler when the interrupt status -register (HISR) has the RX_REQUEST bit set. After the first batch of -data has been processed by the driver the wifi chip may have more data -ready to be read, which is managed by a loop in rtw_sdio_rx_isr(). - -It turns out that there are cases where the RX buffer length (from the -REG_SDIO_RX0_REQ_LEN register) does not match the data we receive. The -following two cases were observed with a RTL8723DS card: -- RX length is smaller than the total packet length including overhead - and actual data bytes (whose length is part of the buffer we read from - the wifi chip and is stored in rtw_rx_pkt_stat.pkt_len). This can - result in errors like: - skbuff: skb_over_panic: text:ffff8000011924ac len:3341 put:3341 - (one case observed was: RX buffer length = 1536 bytes but - rtw_rx_pkt_stat.pkt_len = 1546 bytes, this is not valid as it means - we need to read beyond the end of the buffer) -- RX length looks valid but rtw_rx_pkt_stat.pkt_len is zero - -Check if the RX_REQUEST is set in the HISR register for each iteration -inside rtw_sdio_rx_isr(). This mimics what the RTL8723DS vendor driver -does and makes the driver only read more data if the RX_REQUEST bit is -set (which seems to be a way for the card's hardware or firmware to -tell the host that data is ready to be processed). - -For RTW_WCPU_11AC chips this check is not needed. The RTL8822BS vendor -driver for example states that this check is unnecessary (but still uses -it) and the RTL8822CS drops this check entirely. - -Reviewed-by: Ping-Ke Shih -Signed-off-by: Martin Blumenstingl -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230522202425.1827005-2-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/sdio.c | 24 ++++++++++++++++++++--- - 1 file changed, 21 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/sdio.c -+++ b/drivers/net/wireless/realtek/rtw88/sdio.c -@@ -998,9 +998,9 @@ static void rtw_sdio_rxfifo_recv(struct - - static void rtw_sdio_rx_isr(struct rtw_dev *rtwdev) - { -- u32 rx_len, total_rx_bytes = 0; -+ u32 rx_len, hisr, total_rx_bytes = 0; - -- while (total_rx_bytes < SZ_64K) { -+ do { - if (rtw_chip_wcpu_11n(rtwdev)) - rx_len = rtw_read16(rtwdev, REG_SDIO_RX0_REQ_LEN); - else -@@ -1012,7 +1012,25 @@ static void rtw_sdio_rx_isr(struct rtw_d - rtw_sdio_rxfifo_recv(rtwdev, rx_len); - - total_rx_bytes += rx_len; -- } -+ -+ if (rtw_chip_wcpu_11n(rtwdev)) { -+ /* Stop if no more RX requests are pending, even if -+ * rx_len could be greater than zero in the next -+ * iteration. This is needed because the RX buffer may -+ * already contain data while either HW or FW are not -+ * done filling that buffer yet. Still reading the -+ * buffer can result in packets where -+ * rtw_rx_pkt_stat.pkt_len is zero or points beyond the -+ * end of the buffer. -+ */ -+ hisr = rtw_read32(rtwdev, REG_SDIO_HISR); -+ } else { -+ /* RTW_WCPU_11AC chips have improved hardware or -+ * firmware and can use rx_len unconditionally. -+ */ -+ hisr = REG_SDIO_HISR_RX_REQUEST; -+ } -+ } while (total_rx_bytes < SZ_64K && hisr & REG_SDIO_HISR_RX_REQUEST); - } - - static void rtw_sdio_handle_interrupt(struct sdio_func *sdio_func) diff --git a/package/kernel/mac80211/patches/rtl/053-wifi-rtw88-rtw8723d-Implement-RTL8723DS-SDIO-efuse-p.patch b/package/kernel/mac80211/patches/rtl/053-wifi-rtw88-rtw8723d-Implement-RTL8723DS-SDIO-efuse-p.patch deleted file mode 100644 index d15854fb7..000000000 --- a/package/kernel/mac80211/patches/rtl/053-wifi-rtw88-rtw8723d-Implement-RTL8723DS-SDIO-efuse-p.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 9be20a82232779c59979527dfc8febca3182fee2 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Mon, 22 May 2023 22:24:23 +0200 -Subject: [PATCH 08/12] wifi: rtw88: rtw8723d: Implement RTL8723DS (SDIO) efuse - parsing - -The efuse of the SDIO RTL8723DS chip has only one known member: the mac -address is at offset 0x11a. Add a struct rtw8723ds_efuse describing this -and use it for copying the mac address when the SDIO bus is used. - -Reviewed-by: Ping-Ke Shih -Signed-off-by: Martin Blumenstingl -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230522202425.1827005-3-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/rtw8723d.c | 9 +++++++++ - drivers/net/wireless/realtek/rtw88/rtw8723d.h | 6 ++++++ - 2 files changed, 15 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw88/rtw8723d.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8723d.c -@@ -216,6 +216,12 @@ static void rtw8723du_efuse_parsing(stru - ether_addr_copy(efuse->addr, map->u.mac_addr); - } - -+static void rtw8723ds_efuse_parsing(struct rtw_efuse *efuse, -+ struct rtw8723d_efuse *map) -+{ -+ ether_addr_copy(efuse->addr, map->s.mac_addr); -+} -+ - static int rtw8723d_read_efuse(struct rtw_dev *rtwdev, u8 *log_map) - { - struct rtw_efuse *efuse = &rtwdev->efuse; -@@ -248,6 +254,9 @@ static int rtw8723d_read_efuse(struct rt - case RTW_HCI_TYPE_USB: - rtw8723du_efuse_parsing(efuse, map); - break; -+ case RTW_HCI_TYPE_SDIO: -+ rtw8723ds_efuse_parsing(efuse, map); -+ break; - default: - /* unsupported now */ - return -ENOTSUPP; ---- a/drivers/net/wireless/realtek/rtw88/rtw8723d.h -+++ b/drivers/net/wireless/realtek/rtw88/rtw8723d.h -@@ -49,6 +49,11 @@ struct rtw8723du_efuse { - u8 mac_addr[ETH_ALEN]; /* 0x107 */ - }; - -+struct rtw8723ds_efuse { -+ u8 res4[0x4a]; /* 0xd0 */ -+ u8 mac_addr[ETH_ALEN]; /* 0x11a */ -+}; -+ - struct rtw8723d_efuse { - __le16 rtl_id; - u8 rsvd[2]; -@@ -80,6 +85,7 @@ struct rtw8723d_efuse { - union { - struct rtw8723de_efuse e; - struct rtw8723du_efuse u; -+ struct rtw8723ds_efuse s; - }; - }; - diff --git a/package/kernel/mac80211/patches/rtl/054-wifi-rtw88-Add-support-for-the-SDIO-based-RTL8723DS-.patch b/package/kernel/mac80211/patches/rtl/054-wifi-rtw88-Add-support-for-the-SDIO-based-RTL8723DS-.patch deleted file mode 100644 index 56a88f841..000000000 --- a/package/kernel/mac80211/patches/rtl/054-wifi-rtw88-Add-support-for-the-SDIO-based-RTL8723DS-.patch +++ /dev/null @@ -1,96 +0,0 @@ -From a3b125ceb45e1acd21c9bcb6d3a5c52897d536e6 Mon Sep 17 00:00:00 2001 -From: Martin Blumenstingl -Date: Mon, 22 May 2023 22:24:25 +0200 -Subject: [PATCH 09/12] wifi: rtw88: Add support for the SDIO based RTL8723DS - chipset - -Wire up RTL8723DS chipset support using the rtw88 SDIO HCI code as well -as the existing RTL8723D chipset code. - -Reviewed-by: Ping-Ke Shih -Signed-off-by: Martin Blumenstingl -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230522202425.1827005-5-martin.blumenstingl@googlemail.com ---- - drivers/net/wireless/realtek/rtw88/Kconfig | 11 +++++ - drivers/net/wireless/realtek/rtw88/Makefile | 3 ++ - .../net/wireless/realtek/rtw88/rtw8723ds.c | 41 +++++++++++++++++++ - 3 files changed, 55 insertions(+) - create mode 100644 drivers/net/wireless/realtek/rtw88/rtw8723ds.c - ---- a/drivers/net/wireless/realtek/rtw88/Kconfig -+++ b/drivers/net/wireless/realtek/rtw88/Kconfig -@@ -129,6 +129,17 @@ config RTW88_8723DE - - 802.11n PCIe wireless network adapter - -+config RTW88_8723DS -+ tristate "Realtek 8723DS SDIO wireless network adapter" -+ depends on MMC -+ select RTW88_CORE -+ select RTW88_SDIO -+ select RTW88_8723D -+ help -+ Select this option will enable support for 8723DS chipset -+ -+ 802.11n SDIO wireless network adapter -+ - config RTW88_8723DU - tristate "Realtek 8723DU USB wireless network adapter" - depends on m ---- a/drivers/net/wireless/realtek/rtw88/Makefile -+++ b/drivers/net/wireless/realtek/rtw88/Makefile -@@ -50,6 +50,9 @@ rtw88_8723d-objs := rtw8723d.o rtw8723d - obj-$(CPTCFG_RTW88_8723DE) += rtw88_8723de.o - rtw88_8723de-objs := rtw8723de.o - -+obj-$(CPTCFG_RTW88_8723DS) += rtw88_8723ds.o -+rtw88_8723ds-objs := rtw8723ds.o -+ - obj-$(CPTCFG_RTW88_8723DU) += rtw88_8723du.o - rtw88_8723du-objs := rtw8723du.o - ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw88/rtw8723ds.c -@@ -0,0 +1,41 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) Martin Blumenstingl -+ */ -+ -+#include -+#include -+#include -+#include "main.h" -+#include "rtw8723d.h" -+#include "sdio.h" -+ -+static const struct sdio_device_id rtw_8723ds_id_table[] = { -+ { -+ SDIO_DEVICE(SDIO_VENDOR_ID_REALTEK, -+ SDIO_DEVICE_ID_REALTEK_RTW8723DS_1ANT), -+ .driver_data = (kernel_ulong_t)&rtw8723d_hw_spec, -+ }, -+ { -+ SDIO_DEVICE(SDIO_VENDOR_ID_REALTEK, -+ SDIO_DEVICE_ID_REALTEK_RTW8723DS_2ANT), -+ .driver_data = (kernel_ulong_t)&rtw8723d_hw_spec, -+ }, -+ {} -+}; -+MODULE_DEVICE_TABLE(sdio, rtw_8723ds_id_table); -+ -+static struct sdio_driver rtw_8723ds_driver = { -+ .name = "rtw_8723ds", -+ .probe = rtw_sdio_probe, -+ .remove = rtw_sdio_remove, -+ .id_table = rtw_8723ds_id_table, -+ .drv = { -+ .pm = &rtw_sdio_pm_ops, -+ .shutdown = rtw_sdio_shutdown, -+ } -+}; -+module_sdio_driver(rtw_8723ds_driver); -+ -+MODULE_AUTHOR("Martin Blumenstingl "); -+MODULE_DESCRIPTION("Realtek 802.11n wireless 8723ds driver"); -+MODULE_LICENSE("Dual BSD/GPL"); diff --git a/package/kernel/mac80211/patches/rtl/055-wifi-rtw88-usb-silence-log-flooding-error-message.patch b/package/kernel/mac80211/patches/rtl/055-wifi-rtw88-usb-silence-log-flooding-error-message.patch deleted file mode 100644 index f5e4d40bc..000000000 --- a/package/kernel/mac80211/patches/rtl/055-wifi-rtw88-usb-silence-log-flooding-error-message.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 1f1784a59caf3eefd127908a1a3cf224017ff9c7 Mon Sep 17 00:00:00 2001 -From: Sascha Hauer -Date: Wed, 24 May 2023 12:39:34 +0200 -Subject: [PATCH 10/12] wifi: rtw88: usb: silence log flooding error message - -When receiving more rx packets than the kernel can handle the driver -drops the packets and issues an error message. This is bad for two -reasons. The logs are flooded with myriads of messages, but then time -consumed for printing messages in that critical code path brings down -the device. After some time of excessive rx load the driver responds -with: - -rtw_8822cu 1-1:1.2: failed to get tx report from firmware -rtw_8822cu 1-1:1.2: firmware failed to report density after scan -rtw_8822cu 1-1:1.2: firmware failed to report density after scan - -The device stops working until being replugged. - -Fix this by lowering the priority to debug level and also by -ratelimiting it. - -Fixes: a82dfd33d1237 ("wifi: rtw88: Add common USB chip support") -Signed-off-by: Sascha Hauer -Reviewed-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230524103934.1019096-1-s.hauer@pengutronix.de ---- - drivers/net/wireless/realtek/rtw88/usb.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/usb.c -+++ b/drivers/net/wireless/realtek/rtw88/usb.c -@@ -535,7 +535,7 @@ static void rtw_usb_rx_handler(struct wo - } - - if (skb_queue_len(&rtwusb->rx_queue) >= RTW_USB_MAX_RXQ_LEN) { -- rtw_err(rtwdev, "failed to get rx_queue, overflow\n"); -+ dev_dbg_ratelimited(rtwdev->dev, "failed to get rx_queue, overflow\n"); - dev_kfree_skb_any(skb); - continue; - } diff --git a/package/kernel/mac80211/patches/rtl/056-wifi-rtw88-correct-PS-calculation-for-SUPPORTS_DYNAM.patch b/package/kernel/mac80211/patches/rtl/056-wifi-rtw88-correct-PS-calculation-for-SUPPORTS_DYNAM.patch deleted file mode 100644 index 5d15e8da8..000000000 --- a/package/kernel/mac80211/patches/rtl/056-wifi-rtw88-correct-PS-calculation-for-SUPPORTS_DYNAM.patch +++ /dev/null @@ -1,145 +0,0 @@ -From 3918dd0177ee08970683a2c22a3388825d82fd79 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sat, 27 May 2023 16:29:37 +0800 -Subject: [PATCH 11/12] wifi: rtw88: correct PS calculation for - SUPPORTS_DYNAMIC_PS - -This driver relies on IEEE80211_CONF_PS of hw->conf.flags to turn off PS or -turn on dynamic PS controlled by driver and firmware. Though this would be -incorrect, it did work before because the flag is always recalculated until -the commit 28977e790b5d ("wifi: mac80211: skip powersave recalc if driver SUPPORTS_DYNAMIC_PS") -is introduced by kernel 5.20 to skip to recalculate IEEE80211_CONF_PS -of hw->conf.flags if driver sets SUPPORTS_DYNAMIC_PS. - -Correct this by doing recalculation while BSS_CHANGED_PS is changed and -interface is added or removed. It is allowed to enter PS only if single -one station vif is working. Without this fix, driver doesn't enter PS -anymore that causes higher power consumption. - -Fixes: bcde60e599fb ("rtw88: remove misleading module parameter rtw_fw_support_lps") -Cc: stable@vger.kernel.org # 6.1+ -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230527082939.11206-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/mac80211.c | 14 +++--- - drivers/net/wireless/realtek/rtw88/main.c | 4 +- - drivers/net/wireless/realtek/rtw88/ps.c | 43 +++++++++++++++++++ - drivers/net/wireless/realtek/rtw88/ps.h | 2 + - 4 files changed, 52 insertions(+), 11 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c -@@ -88,15 +88,6 @@ static int rtw_ops_config(struct ieee802 - } - } - -- if (changed & IEEE80211_CONF_CHANGE_PS) { -- if (hw->conf.flags & IEEE80211_CONF_PS) { -- rtwdev->ps_enabled = true; -- } else { -- rtwdev->ps_enabled = false; -- rtw_leave_lps(rtwdev); -- } -- } -- - if (changed & IEEE80211_CONF_CHANGE_CHANNEL) - rtw_set_channel(rtwdev); - -@@ -215,6 +206,7 @@ static int rtw_ops_add_interface(struct - config |= PORT_SET_BCN_CTRL; - rtw_vif_port_config(rtwdev, rtwvif, config); - rtw_core_port_switch(rtwdev, vif); -+ rtw_recalc_lps(rtwdev, vif); - - mutex_unlock(&rtwdev->mutex); - -@@ -246,6 +238,7 @@ static void rtw_ops_remove_interface(str - config |= PORT_SET_BCN_CTRL; - rtw_vif_port_config(rtwdev, rtwvif, config); - clear_bit(rtwvif->port, rtwdev->hw_port); -+ rtw_recalc_lps(rtwdev, NULL); - - mutex_unlock(&rtwdev->mutex); - } -@@ -440,6 +433,9 @@ static void rtw_ops_bss_info_changed(str - if (changed & BSS_CHANGED_ERP_SLOT) - rtw_conf_tx(rtwdev, rtwvif); - -+ if (changed & BSS_CHANGED_PS) -+ rtw_recalc_lps(rtwdev, NULL); -+ - rtw_vif_port_config(rtwdev, rtwvif, config); - - mutex_unlock(&rtwdev->mutex); ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -271,8 +271,8 @@ static void rtw_watch_dog_work(struct wo - * more than two stations associated to the AP, then we can not enter - * lps, because fw does not handle the overlapped beacon interval - * -- * mac80211 should iterate vifs and determine if driver can enter -- * ps by passing IEEE80211_CONF_PS to us, all we need to do is to -+ * rtw_recalc_lps() iterate vifs and determine if driver can enter -+ * ps by vif->type and vif->cfg.ps, all we need to do here is to - * get that vif and check if device is having traffic more than the - * threshold. - */ ---- a/drivers/net/wireless/realtek/rtw88/ps.c -+++ b/drivers/net/wireless/realtek/rtw88/ps.c -@@ -299,3 +299,46 @@ void rtw_leave_lps_deep(struct rtw_dev * - - __rtw_leave_lps_deep(rtwdev); - } -+ -+struct rtw_vif_recalc_lps_iter_data { -+ struct rtw_dev *rtwdev; -+ struct ieee80211_vif *found_vif; -+ int count; -+}; -+ -+static void __rtw_vif_recalc_lps(struct rtw_vif_recalc_lps_iter_data *data, -+ struct ieee80211_vif *vif) -+{ -+ if (data->count < 0) -+ return; -+ -+ if (vif->type != NL80211_IFTYPE_STATION) { -+ data->count = -1; -+ return; -+ } -+ -+ data->count++; -+ data->found_vif = vif; -+} -+ -+static void rtw_vif_recalc_lps_iter(void *data, u8 *mac, -+ struct ieee80211_vif *vif) -+{ -+ __rtw_vif_recalc_lps(data, vif); -+} -+ -+void rtw_recalc_lps(struct rtw_dev *rtwdev, struct ieee80211_vif *new_vif) -+{ -+ struct rtw_vif_recalc_lps_iter_data data = { .rtwdev = rtwdev }; -+ -+ if (new_vif) -+ __rtw_vif_recalc_lps(&data, new_vif); -+ rtw_iterate_vifs(rtwdev, rtw_vif_recalc_lps_iter, &data); -+ -+ if (data.count == 1 && data.found_vif->cfg.ps) { -+ rtwdev->ps_enabled = true; -+ } else { -+ rtwdev->ps_enabled = false; -+ rtw_leave_lps(rtwdev); -+ } -+} ---- a/drivers/net/wireless/realtek/rtw88/ps.h -+++ b/drivers/net/wireless/realtek/rtw88/ps.h -@@ -23,4 +23,6 @@ void rtw_enter_lps(struct rtw_dev *rtwde - void rtw_leave_lps(struct rtw_dev *rtwdev); - void rtw_leave_lps_deep(struct rtw_dev *rtwdev); - enum rtw_lps_deep_mode rtw_get_lps_deep_mode(struct rtw_dev *rtwdev); -+void rtw_recalc_lps(struct rtw_dev *rtwdev, struct ieee80211_vif *new_vif); -+ - #endif diff --git a/package/kernel/mac80211/patches/rtl/057-wifi-rtw88-add-missing-unwind-goto-for-__rtw_downloa.patch b/package/kernel/mac80211/patches/rtl/057-wifi-rtw88-add-missing-unwind-goto-for-__rtw_downloa.patch deleted file mode 100644 index b3f650b41..000000000 --- a/package/kernel/mac80211/patches/rtl/057-wifi-rtw88-add-missing-unwind-goto-for-__rtw_downloa.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 91ccdbb94feadb0d8bf3b35c841b33ac95f2f45f Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 7 Jun 2023 09:27:41 +0800 -Subject: [PATCH 12/12] wifi: rtw88: add missing unwind goto for - __rtw_download_firmware() - -This flaw is detected by smatch: - drivers/net/wireless/realtek/rtw88/mac.c:748 __rtw_download_firmware() - warn: missing unwind goto? - -Though most things of dlfw_fail have been done by -download_firmware_end_flow() and wlan_cpu_enable(), an exception is that -download_firmware_end_flow() clear BIT_MCUFWDL_EN bit conditionally. -So, make this change to clear the bit. - -Reported-by: kernel test robot -Reported-by: Dan Carpenter -Closes: https://lore.kernel.org/r/202306052310.OVhcUjZ3-lkp@intel.com/ -Cc: Sascha Hauer -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230607012741.10353-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/mac.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/mac.c -+++ b/drivers/net/wireless/realtek/rtw88/mac.c -@@ -794,8 +794,10 @@ static int __rtw_download_firmware(struc - - wlan_cpu_enable(rtwdev, true); - -- if (!ltecoex_reg_write(rtwdev, 0x38, ltecoex_bckp)) -- return -EBUSY; -+ if (!ltecoex_reg_write(rtwdev, 0x38, ltecoex_bckp)) { -+ ret = -EBUSY; -+ goto dlfw_fail; -+ } - - ret = download_firmware_validate(rtwdev); - if (ret) diff --git a/package/kernel/mac80211/patches/rtl/058-wifi-rtw88-Fix-action-frame-transmission-fail-before.patch b/package/kernel/mac80211/patches/rtl/058-wifi-rtw88-Fix-action-frame-transmission-fail-before.patch deleted file mode 100644 index 28dfaed17..000000000 --- a/package/kernel/mac80211/patches/rtl/058-wifi-rtw88-Fix-action-frame-transmission-fail-before.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 2ce9a91fe8bfb0c8e647a6b7b88055881faf7502 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Thu, 15 Jun 2023 19:43:48 +0800 -Subject: [PATCH 1/8] wifi: rtw88: Fix action frame transmission fail before - association - -For combo chips, antennas were controlled by bluetooth only during -power on. If WiFi wish to do transmission, notification to the coexistence -module are required. Previously we only do this before authentication. -To allow transmission before auth, such as management TX, now we start -the initiation of coexistence earlier so antennas are shared between -WiFi and bluetooth after set_channel(), and frames could then be sent. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230615114348.7193-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/ps.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/ps.c -+++ b/drivers/net/wireless/realtek/rtw88/ps.c -@@ -18,6 +18,7 @@ static int rtw_ips_pwr_up(struct rtw_dev - if (ret) - rtw_err(rtwdev, "leave idle state failed\n"); - -+ rtw_coex_ips_notify(rtwdev, COEX_IPS_LEAVE); - rtw_set_channel(rtwdev); - - return ret; -@@ -63,8 +64,6 @@ int rtw_leave_ips(struct rtw_dev *rtwdev - - rtw_iterate_vifs(rtwdev, rtw_restore_port_cfg_iter, rtwdev); - -- rtw_coex_ips_notify(rtwdev, COEX_IPS_LEAVE); -- - return 0; - } - diff --git a/package/kernel/mac80211/patches/rtl/059-wifi-rtw88-process-VO-packets-without-workqueue-to-a.patch b/package/kernel/mac80211/patches/rtl/059-wifi-rtw88-process-VO-packets-without-workqueue-to-a.patch deleted file mode 100644 index e750903ed..000000000 --- a/package/kernel/mac80211/patches/rtl/059-wifi-rtw88-process-VO-packets-without-workqueue-to-a.patch +++ /dev/null @@ -1,85 +0,0 @@ -From 67d7f24b194e6e8e82540aa4fe97580f6cfa0902 Mon Sep 17 00:00:00 2001 -From: Chih-Kang Chang -Date: Fri, 16 Jun 2023 11:17:13 +0800 -Subject: [PATCH 2/8] wifi: rtw88: process VO packets without workqueue to - avoid PTK rekey failed - -In the wpa_supplicant rekey flow, it sends an EAPOL packet 4/4 through -nl80211_tx_control_port() and triggers wake_tx_queue() in the driver. -Then, it sends nl80211_new_key() to configure a new key in mac80211. -However, in wake_tx_queue(), a workqueue is used to process the tx packet, -which might cause the driver to process the EAPOL packet later than -nl80211_new_key(). As a result, the EAPOL 4/4 packet is dropped by mac80211 -due to the rekey configuration being finished. The EAPOL packets belongs to -VO packets that need high priority. Therefore, we process VO packets -directly without workqueue to ensure that packets can process immediately. - -VO is normally used by voice application that is low traffic load and low -latency, that doesn't affect user experience. -We test iperf with VO packets(iperf3 -P4 -u -b 10000M -S 0xdf) - before after -TX throughput 162M 162M -ping RTT 3.8ms 3.7ms - -Signed-off-by: Chih-Kang Chang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230616031713.16769-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/mac80211.c | 6 +++++- - drivers/net/wireless/realtek/rtw88/tx.c | 10 ++++++++-- - drivers/net/wireless/realtek/rtw88/tx.h | 1 + - 3 files changed, 14 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c -@@ -43,7 +43,11 @@ static void rtw_ops_wake_tx_queue(struct - list_add_tail(&rtwtxq->list, &rtwdev->txqs); - spin_unlock_bh(&rtwdev->txq_lock); - -- queue_work(rtwdev->tx_wq, &rtwdev->tx_work); -+ /* ensure to dequeue EAPOL (4/4) at the right time */ -+ if (txq->ac == IEEE80211_AC_VO) -+ __rtw_tx_work(rtwdev); -+ else -+ queue_work(rtwdev->tx_wq, &rtwdev->tx_work); - } - - static int rtw_ops_start(struct ieee80211_hw *hw) ---- a/drivers/net/wireless/realtek/rtw88/tx.c -+++ b/drivers/net/wireless/realtek/rtw88/tx.c -@@ -635,9 +635,8 @@ static void rtw_txq_push(struct rtw_dev - rcu_read_unlock(); - } - --void rtw_tx_work(struct work_struct *w) -+void __rtw_tx_work(struct rtw_dev *rtwdev) - { -- struct rtw_dev *rtwdev = container_of(w, struct rtw_dev, tx_work); - struct rtw_txq *rtwtxq, *tmp; - - spin_lock_bh(&rtwdev->txq_lock); -@@ -658,6 +657,13 @@ void rtw_tx_work(struct work_struct *w) - spin_unlock_bh(&rtwdev->txq_lock); - } - -+void rtw_tx_work(struct work_struct *w) -+{ -+ struct rtw_dev *rtwdev = container_of(w, struct rtw_dev, tx_work); -+ -+ __rtw_tx_work(rtwdev); -+} -+ - void rtw_txq_init(struct rtw_dev *rtwdev, struct ieee80211_txq *txq) - { - struct rtw_txq *rtwtxq; ---- a/drivers/net/wireless/realtek/rtw88/tx.h -+++ b/drivers/net/wireless/realtek/rtw88/tx.h -@@ -111,6 +111,7 @@ void rtw_tx(struct rtw_dev *rtwdev, - void rtw_txq_init(struct rtw_dev *rtwdev, struct ieee80211_txq *txq); - void rtw_txq_cleanup(struct rtw_dev *rtwdev, struct ieee80211_txq *txq); - void rtw_tx_work(struct work_struct *w); -+void __rtw_tx_work(struct rtw_dev *rtwdev); - void rtw_tx_pkt_info_update(struct rtw_dev *rtwdev, - struct rtw_tx_pkt_info *pkt_info, - struct ieee80211_sta *sta, diff --git a/package/kernel/mac80211/patches/rtl/060-wifi-rtw88-use-struct-instead-of-macros-to-set-TX-de.patch b/package/kernel/mac80211/patches/rtl/060-wifi-rtw88-use-struct-instead-of-macros-to-set-TX-de.patch deleted file mode 100644 index 771288241..000000000 --- a/package/kernel/mac80211/patches/rtl/060-wifi-rtw88-use-struct-instead-of-macros-to-set-TX-de.patch +++ /dev/null @@ -1,317 +0,0 @@ -From 88b9d8e6cf9cf89be50ca2ee6cb9b3180b432172 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 16 Jun 2023 20:55:35 +0800 -Subject: [PATCH 3/8] wifi: rtw88: use struct instead of macros to set TX desc - -Remove macros that set TX descriptors. Use struct and -le32_encode_bits() with mask definitions. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230616125540.36877-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/rtw8723d.c | 6 +- - drivers/net/wireless/realtek/rtw88/tx.c | 79 +++++++----- - drivers/net/wireless/realtek/rtw88/tx.h | 122 +++++++----------- - drivers/net/wireless/realtek/rtw88/usb.c | 12 +- - 4 files changed, 106 insertions(+), 113 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/rtw8723d.c -+++ b/drivers/net/wireless/realtek/rtw88/rtw8723d.c -@@ -1970,15 +1970,17 @@ static void rtw8723d_fill_txdesc_checksu - size_t words = 32 / 2; /* calculate the first 32 bytes (16 words) */ - __le16 chksum = 0; - __le16 *data = (__le16 *)(txdesc); -+ struct rtw_tx_desc *tx_desc = (struct rtw_tx_desc *)txdesc; - -- SET_TX_DESC_TXDESC_CHECKSUM(txdesc, 0x0000); -+ le32p_replace_bits(&tx_desc->w7, 0, RTW_TX_DESC_W7_TXDESC_CHECKSUM); - - while (words--) - chksum ^= *data++; - - chksum = ~chksum; - -- SET_TX_DESC_TXDESC_CHECKSUM(txdesc, __le16_to_cpu(chksum)); -+ le32p_replace_bits(&tx_desc->w7, __le16_to_cpu(chksum), -+ RTW_TX_DESC_W7_TXDESC_CHECKSUM); - } - - static struct rtw_chip_ops rtw8723d_ops = { ---- a/drivers/net/wireless/realtek/rtw88/tx.c -+++ b/drivers/net/wireless/realtek/rtw88/tx.c -@@ -34,43 +34,52 @@ void rtw_tx_stats(struct rtw_dev *rtwdev - - void rtw_tx_fill_tx_desc(struct rtw_tx_pkt_info *pkt_info, struct sk_buff *skb) - { -- __le32 *txdesc = (__le32 *)skb->data; -+ struct rtw_tx_desc *tx_desc = (struct rtw_tx_desc *)skb->data; -+ -+ tx_desc->w0 = le32_encode_bits(pkt_info->tx_pkt_size, RTW_TX_DESC_W0_TXPKTSIZE) | -+ le32_encode_bits(pkt_info->offset, RTW_TX_DESC_W0_OFFSET) | -+ le32_encode_bits(pkt_info->bmc, RTW_TX_DESC_W0_BMC) | -+ le32_encode_bits(pkt_info->ls, RTW_TX_DESC_W0_LS) | -+ le32_encode_bits(pkt_info->dis_qselseq, RTW_TX_DESC_W0_DISQSELSEQ); -+ -+ tx_desc->w1 = le32_encode_bits(pkt_info->qsel, RTW_TX_DESC_W1_QSEL) | -+ le32_encode_bits(pkt_info->rate_id, RTW_TX_DESC_W1_RATE_ID) | -+ le32_encode_bits(pkt_info->sec_type, RTW_TX_DESC_W1_SEC_TYPE) | -+ le32_encode_bits(pkt_info->pkt_offset, RTW_TX_DESC_W1_PKT_OFFSET); -+ -+ tx_desc->w2 = le32_encode_bits(pkt_info->ampdu_en, RTW_TX_DESC_W2_AGG_EN) | -+ le32_encode_bits(pkt_info->report, RTW_TX_DESC_W2_SPE_RPT) | -+ le32_encode_bits(pkt_info->ampdu_density, RTW_TX_DESC_W2_AMPDU_DEN) | -+ le32_encode_bits(pkt_info->bt_null, RTW_TX_DESC_W2_BT_NULL); -+ -+ tx_desc->w3 = le32_encode_bits(pkt_info->hw_ssn_sel, RTW_TX_DESC_W3_HW_SSN_SEL) | -+ le32_encode_bits(pkt_info->use_rate, RTW_TX_DESC_W3_USE_RATE) | -+ le32_encode_bits(pkt_info->dis_rate_fallback, RTW_TX_DESC_W3_DISDATAFB) | -+ le32_encode_bits(pkt_info->rts, RTW_TX_DESC_W3_USE_RTS) | -+ le32_encode_bits(pkt_info->nav_use_hdr, RTW_TX_DESC_W3_NAVUSEHDR) | -+ le32_encode_bits(pkt_info->ampdu_factor, RTW_TX_DESC_W3_MAX_AGG_NUM); -+ -+ tx_desc->w4 = le32_encode_bits(pkt_info->rate, RTW_TX_DESC_W4_DATARATE); -+ -+ tx_desc->w5 = le32_encode_bits(pkt_info->short_gi, RTW_TX_DESC_W5_DATA_SHORT) | -+ le32_encode_bits(pkt_info->bw, RTW_TX_DESC_W5_DATA_BW) | -+ le32_encode_bits(pkt_info->ldpc, RTW_TX_DESC_W5_DATA_LDPC) | -+ le32_encode_bits(pkt_info->stbc, RTW_TX_DESC_W5_DATA_STBC); -+ -+ tx_desc->w6 = le32_encode_bits(pkt_info->sn, RTW_TX_DESC_W6_SW_DEFINE); -+ -+ tx_desc->w8 = le32_encode_bits(pkt_info->en_hwseq, RTW_TX_DESC_W8_EN_HWSEQ); -+ -+ tx_desc->w9 = le32_encode_bits(pkt_info->seq, RTW_TX_DESC_W9_SW_SEQ); - -- SET_TX_DESC_TXPKTSIZE(txdesc, pkt_info->tx_pkt_size); -- SET_TX_DESC_OFFSET(txdesc, pkt_info->offset); -- SET_TX_DESC_PKT_OFFSET(txdesc, pkt_info->pkt_offset); -- SET_TX_DESC_QSEL(txdesc, pkt_info->qsel); -- SET_TX_DESC_BMC(txdesc, pkt_info->bmc); -- SET_TX_DESC_RATE_ID(txdesc, pkt_info->rate_id); -- SET_TX_DESC_DATARATE(txdesc, pkt_info->rate); -- SET_TX_DESC_DISDATAFB(txdesc, pkt_info->dis_rate_fallback); -- SET_TX_DESC_USE_RATE(txdesc, pkt_info->use_rate); -- SET_TX_DESC_SEC_TYPE(txdesc, pkt_info->sec_type); -- SET_TX_DESC_DATA_BW(txdesc, pkt_info->bw); -- SET_TX_DESC_SW_SEQ(txdesc, pkt_info->seq); -- SET_TX_DESC_MAX_AGG_NUM(txdesc, pkt_info->ampdu_factor); -- SET_TX_DESC_AMPDU_DENSITY(txdesc, pkt_info->ampdu_density); -- SET_TX_DESC_DATA_STBC(txdesc, pkt_info->stbc); -- SET_TX_DESC_DATA_LDPC(txdesc, pkt_info->ldpc); -- SET_TX_DESC_AGG_EN(txdesc, pkt_info->ampdu_en); -- SET_TX_DESC_LS(txdesc, pkt_info->ls); -- SET_TX_DESC_DATA_SHORT(txdesc, pkt_info->short_gi); -- SET_TX_DESC_SPE_RPT(txdesc, pkt_info->report); -- SET_TX_DESC_SW_DEFINE(txdesc, pkt_info->sn); -- SET_TX_DESC_USE_RTS(txdesc, pkt_info->rts); - if (pkt_info->rts) { -- SET_TX_DESC_RTSRATE(txdesc, DESC_RATE24M); -- SET_TX_DESC_DATA_RTS_SHORT(txdesc, 1); -- } -- SET_TX_DESC_DISQSELSEQ(txdesc, pkt_info->dis_qselseq); -- SET_TX_DESC_EN_HWSEQ(txdesc, pkt_info->en_hwseq); -- SET_TX_DESC_HW_SSN_SEL(txdesc, pkt_info->hw_ssn_sel); -- SET_TX_DESC_NAVUSEHDR(txdesc, pkt_info->nav_use_hdr); -- SET_TX_DESC_BT_NULL(txdesc, pkt_info->bt_null); -- if (pkt_info->tim_offset) { -- SET_TX_DESC_TIM_EN(txdesc, 1); -- SET_TX_DESC_TIM_OFFSET(txdesc, pkt_info->tim_offset); -+ tx_desc->w4 |= le32_encode_bits(DESC_RATE24M, RTW_TX_DESC_W4_RTSRATE); -+ tx_desc->w5 |= le32_encode_bits(1, RTW_TX_DESC_W5_DATA_RTS_SHORT); - } -+ -+ if (pkt_info->tim_offset) -+ tx_desc->w9 |= le32_encode_bits(1, RTW_TX_DESC_W9_TIM_EN) | -+ le32_encode_bits(pkt_info->tim_offset, RTW_TX_DESC_W9_TIM_OFFSET); - } - EXPORT_SYMBOL(rtw_tx_fill_tx_desc); - ---- a/drivers/net/wireless/realtek/rtw88/tx.h -+++ b/drivers/net/wireless/realtek/rtw88/tx.h -@@ -9,76 +9,52 @@ - - #define RTW_TX_PROBE_TIMEOUT msecs_to_jiffies(500) - --#define SET_TX_DESC_TXPKTSIZE(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, GENMASK(15, 0)) --#define SET_TX_DESC_OFFSET(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, GENMASK(23, 16)) --#define SET_TX_DESC_PKT_OFFSET(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(28, 24)) --#define SET_TX_DESC_QSEL(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(12, 8)) --#define SET_TX_DESC_BMC(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(24)) --#define SET_TX_DESC_RATE_ID(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(20, 16)) --#define SET_TX_DESC_DATARATE(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x04, value, GENMASK(6, 0)) --#define SET_TX_DESC_DISDATAFB(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(10)) --#define SET_TX_DESC_USE_RATE(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(8)) --#define SET_TX_DESC_SEC_TYPE(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x01, value, GENMASK(23, 22)) --#define SET_TX_DESC_DATA_BW(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, GENMASK(6, 5)) --#define SET_TX_DESC_SW_SEQ(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x09, value, GENMASK(23, 12)) --#define SET_TX_DESC_TIM_EN(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x09, value, BIT(7)) --#define SET_TX_DESC_TIM_OFFSET(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x09, value, GENMASK(6, 0)) --#define SET_TX_DESC_MAX_AGG_NUM(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, GENMASK(21, 17)) --#define SET_TX_DESC_USE_RTS(tx_desc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(12)) --#define SET_TX_DESC_RTSRATE(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x04, value, GENMASK(28, 24)) --#define SET_TX_DESC_DATA_RTS_SHORT(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, BIT(12)) --#define SET_TX_DESC_AMPDU_DENSITY(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, GENMASK(22, 20)) --#define SET_TX_DESC_DATA_STBC(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, GENMASK(9, 8)) --#define SET_TX_DESC_DATA_LDPC(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, BIT(7)) --#define SET_TX_DESC_AGG_EN(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(12)) --#define SET_TX_DESC_LS(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(26)) --#define SET_TX_DESC_DATA_SHORT(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x05, value, BIT(4)) --#define SET_TX_DESC_SPE_RPT(tx_desc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(19)) --#define SET_TX_DESC_SW_DEFINE(tx_desc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x06, value, GENMASK(11, 0)) --#define SET_TX_DESC_DISQSELSEQ(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x00, value, BIT(31)) --#define SET_TX_DESC_EN_HWSEQ(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x08, value, BIT(15)) --#define SET_TX_DESC_HW_SSN_SEL(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, GENMASK(7, 6)) --#define SET_TX_DESC_NAVUSEHDR(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x03, value, BIT(15)) --#define SET_TX_DESC_BT_NULL(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x02, value, BIT(23)) --#define SET_TX_DESC_TXDESC_CHECKSUM(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x07, value, GENMASK(15, 0)) --#define SET_TX_DESC_DMA_TXAGG_NUM(txdesc, value) \ -- le32p_replace_bits((__le32 *)(txdesc) + 0x07, value, GENMASK(31, 24)) --#define GET_TX_DESC_PKT_OFFSET(txdesc) \ -- le32_get_bits(*((__le32 *)(txdesc) + 0x01), GENMASK(28, 24)) --#define GET_TX_DESC_QSEL(txdesc) \ -- le32_get_bits(*((__le32 *)(txdesc) + 0x01), GENMASK(12, 8)) -+struct rtw_tx_desc { -+ __le32 w0; -+ __le32 w1; -+ __le32 w2; -+ __le32 w3; -+ __le32 w4; -+ __le32 w5; -+ __le32 w6; -+ __le32 w7; -+ __le32 w8; -+ __le32 w9; -+} __packed; -+ -+#define RTW_TX_DESC_W0_TXPKTSIZE GENMASK(15, 0) -+#define RTW_TX_DESC_W0_OFFSET GENMASK(23, 16) -+#define RTW_TX_DESC_W0_BMC BIT(24) -+#define RTW_TX_DESC_W0_LS BIT(26) -+#define RTW_TX_DESC_W0_DISQSELSEQ BIT(31) -+#define RTW_TX_DESC_W1_QSEL GENMASK(12, 8) -+#define RTW_TX_DESC_W1_RATE_ID GENMASK(20, 16) -+#define RTW_TX_DESC_W1_SEC_TYPE GENMASK(23, 22) -+#define RTW_TX_DESC_W1_PKT_OFFSET GENMASK(28, 24) -+#define RTW_TX_DESC_W2_AGG_EN BIT(12) -+#define RTW_TX_DESC_W2_SPE_RPT BIT(19) -+#define RTW_TX_DESC_W2_AMPDU_DEN GENMASK(22, 20) -+#define RTW_TX_DESC_W2_BT_NULL BIT(23) -+#define RTW_TX_DESC_W3_HW_SSN_SEL GENMASK(7, 6) -+#define RTW_TX_DESC_W3_USE_RATE BIT(8) -+#define RTW_TX_DESC_W3_DISDATAFB BIT(10) -+#define RTW_TX_DESC_W3_USE_RTS BIT(12) -+#define RTW_TX_DESC_W3_NAVUSEHDR BIT(15) -+#define RTW_TX_DESC_W3_MAX_AGG_NUM GENMASK(21, 17) -+#define RTW_TX_DESC_W4_DATARATE GENMASK(6, 0) -+#define RTW_TX_DESC_W4_RTSRATE GENMASK(28, 24) -+#define RTW_TX_DESC_W5_DATA_SHORT BIT(4) -+#define RTW_TX_DESC_W5_DATA_BW GENMASK(6, 5) -+#define RTW_TX_DESC_W5_DATA_LDPC BIT(7) -+#define RTW_TX_DESC_W5_DATA_STBC GENMASK(9, 8) -+#define RTW_TX_DESC_W5_DATA_RTS_SHORT BIT(12) -+#define RTW_TX_DESC_W6_SW_DEFINE GENMASK(11, 0) -+#define RTW_TX_DESC_W7_TXDESC_CHECKSUM GENMASK(15, 0) -+#define RTW_TX_DESC_W7_DMA_TXAGG_NUM GENMASK(31, 24) -+#define RTW_TX_DESC_W8_EN_HWSEQ BIT(15) -+#define RTW_TX_DESC_W9_SW_SEQ GENMASK(23, 12) -+#define RTW_TX_DESC_W9_TIM_EN BIT(7) -+#define RTW_TX_DESC_W9_TIM_OFFSET GENMASK(6, 0) - - enum rtw_tx_desc_queue_select { - TX_DESC_QSEL_TID0 = 0, -@@ -140,13 +116,15 @@ void fill_txdesc_checksum_common(u8 *txd - { - __le16 chksum = 0; - __le16 *data = (__le16 *)(txdesc); -+ struct rtw_tx_desc *tx_desc = (struct rtw_tx_desc *)txdesc; - -- SET_TX_DESC_TXDESC_CHECKSUM(txdesc, 0x0000); -+ le32p_replace_bits(&tx_desc->w7, 0, RTW_TX_DESC_W7_TXDESC_CHECKSUM); - - while (words--) - chksum ^= *data++; - -- SET_TX_DESC_TXDESC_CHECKSUM(txdesc, __le16_to_cpu(chksum)); -+ le32p_replace_bits(&tx_desc->w7, __le16_to_cpu(chksum), -+ RTW_TX_DESC_W7_TXDESC_CHECKSUM); - } - - static inline void rtw_tx_fill_txdesc_checksum(struct rtw_dev *rtwdev, ---- a/drivers/net/wireless/realtek/rtw88/usb.c -+++ b/drivers/net/wireless/realtek/rtw88/usb.c -@@ -24,11 +24,12 @@ struct rtw_usb_txcb { - static void rtw_usb_fill_tx_checksum(struct rtw_usb *rtwusb, - struct sk_buff *skb, int agg_num) - { -+ struct rtw_tx_desc *tx_desc = (struct rtw_tx_desc *)skb->data; - struct rtw_dev *rtwdev = rtwusb->rtwdev; - struct rtw_tx_pkt_info pkt_info; - -- SET_TX_DESC_DMA_TXAGG_NUM(skb->data, agg_num); -- pkt_info.pkt_offset = GET_TX_DESC_PKT_OFFSET(skb->data); -+ le32p_replace_bits(&tx_desc->w7, agg_num, RTW_TX_DESC_W7_DMA_TXAGG_NUM); -+ pkt_info.pkt_offset = le32_get_bits(tx_desc->w1, RTW_TX_DESC_W1_PKT_OFFSET); - rtw_tx_fill_txdesc_checksum(rtwdev, &pkt_info, skb->data); - } - -@@ -306,11 +307,13 @@ static int rtw_usb_write_port(struct rtw - static bool rtw_usb_tx_agg_skb(struct rtw_usb *rtwusb, struct sk_buff_head *list) - { - struct rtw_dev *rtwdev = rtwusb->rtwdev; -+ struct rtw_tx_desc *tx_desc; - struct rtw_usb_txcb *txcb; - struct sk_buff *skb_head; - struct sk_buff *skb_iter; - int agg_num = 0; - unsigned int align_next = 0; -+ u8 qsel; - - if (skb_queue_empty(list)) - return false; -@@ -363,9 +366,10 @@ static bool rtw_usb_tx_agg_skb(struct rt - - queue: - skb_queue_tail(&txcb->tx_ack_queue, skb_head); -+ tx_desc = (struct rtw_tx_desc *)skb_head->data; -+ qsel = le32_get_bits(tx_desc->w1, RTW_TX_DESC_W1_QSEL); - -- rtw_usb_write_port(rtwdev, GET_TX_DESC_QSEL(skb_head->data), skb_head, -- rtw_usb_write_port_tx_complete, txcb); -+ rtw_usb_write_port(rtwdev, qsel, skb_head, rtw_usb_write_port_tx_complete, txcb); - - return true; - } diff --git a/package/kernel/mac80211/patches/rtl/061-wifi-rtw88-Fix-AP-mode-incorrect-DTIM-behavior.patch b/package/kernel/mac80211/patches/rtl/061-wifi-rtw88-Fix-AP-mode-incorrect-DTIM-behavior.patch deleted file mode 100644 index 8bb49133e..000000000 --- a/package/kernel/mac80211/patches/rtl/061-wifi-rtw88-Fix-AP-mode-incorrect-DTIM-behavior.patch +++ /dev/null @@ -1,96 +0,0 @@ -From 076f786a0ae14a81f40314b96a2d815e264bc213 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 16 Jun 2023 20:55:36 +0800 -Subject: [PATCH 4/8] wifi: rtw88: Fix AP mode incorrect DTIM behavior - -Broadcast and multicast packets in high queue should be transmitted -all at once during DTIM. But without proper settings, hardware fails -to recognize that there are multiple packets and fetches only one. -Fix this by signaling hardware with more data bit set when there are -packets in the high queue. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230616125540.36877-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/mac80211.c | 2 ++ - drivers/net/wireless/realtek/rtw88/reg.h | 1 + - drivers/net/wireless/realtek/rtw88/tx.c | 7 ++++++- - drivers/net/wireless/realtek/rtw88/tx.h | 1 + - drivers/net/wireless/realtek/rtw88/usb.c | 3 +++ - 5 files changed, 13 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw88/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c -@@ -453,6 +453,7 @@ static int rtw_ops_start_ap(struct ieee8 - const struct rtw_chip_info *chip = rtwdev->chip; - - mutex_lock(&rtwdev->mutex); -+ rtw_write32_set(rtwdev, REG_TCR, BIT_TCR_UPDATE_HGQMD); - rtwdev->ap_active = true; - rtw_store_op_chan(rtwdev, true); - chip->ops->phy_calibration(rtwdev); -@@ -468,6 +469,7 @@ static void rtw_ops_stop_ap(struct ieee8 - struct rtw_dev *rtwdev = hw->priv; - - mutex_lock(&rtwdev->mutex); -+ rtw_write32_clr(rtwdev, REG_TCR, BIT_TCR_UPDATE_HGQMD); - rtwdev->ap_active = false; - if (!rtw_core_check_sta_active(rtwdev)) - rtw_clear_op_chan(rtwdev); ---- a/drivers/net/wireless/realtek/rtw88/reg.h -+++ b/drivers/net/wireless/realtek/rtw88/reg.h -@@ -410,6 +410,7 @@ - #define REG_TCR 0x0604 - #define BIT_PWRMGT_HWDATA_EN BIT(7) - #define BIT_TCR_UPDATE_TIMIE BIT(5) -+#define BIT_TCR_UPDATE_HGQMD BIT(4) - #define REG_RCR 0x0608 - #define BIT_APP_FCS BIT(31) - #define BIT_APP_MIC BIT(30) ---- a/drivers/net/wireless/realtek/rtw88/tx.c -+++ b/drivers/net/wireless/realtek/rtw88/tx.c -@@ -35,6 +35,10 @@ void rtw_tx_stats(struct rtw_dev *rtwdev - void rtw_tx_fill_tx_desc(struct rtw_tx_pkt_info *pkt_info, struct sk_buff *skb) - { - struct rtw_tx_desc *tx_desc = (struct rtw_tx_desc *)skb->data; -+ bool more_data = false; -+ -+ if (pkt_info->qsel == TX_DESC_QSEL_HIGH) -+ more_data = true; - - tx_desc->w0 = le32_encode_bits(pkt_info->tx_pkt_size, RTW_TX_DESC_W0_TXPKTSIZE) | - le32_encode_bits(pkt_info->offset, RTW_TX_DESC_W0_OFFSET) | -@@ -45,7 +49,8 @@ void rtw_tx_fill_tx_desc(struct rtw_tx_p - tx_desc->w1 = le32_encode_bits(pkt_info->qsel, RTW_TX_DESC_W1_QSEL) | - le32_encode_bits(pkt_info->rate_id, RTW_TX_DESC_W1_RATE_ID) | - le32_encode_bits(pkt_info->sec_type, RTW_TX_DESC_W1_SEC_TYPE) | -- le32_encode_bits(pkt_info->pkt_offset, RTW_TX_DESC_W1_PKT_OFFSET); -+ le32_encode_bits(pkt_info->pkt_offset, RTW_TX_DESC_W1_PKT_OFFSET) | -+ le32_encode_bits(more_data, RTW_TX_DESC_W1_MORE_DATA); - - tx_desc->w2 = le32_encode_bits(pkt_info->ampdu_en, RTW_TX_DESC_W2_AGG_EN) | - le32_encode_bits(pkt_info->report, RTW_TX_DESC_W2_SPE_RPT) | ---- a/drivers/net/wireless/realtek/rtw88/tx.h -+++ b/drivers/net/wireless/realtek/rtw88/tx.h -@@ -31,6 +31,7 @@ struct rtw_tx_desc { - #define RTW_TX_DESC_W1_RATE_ID GENMASK(20, 16) - #define RTW_TX_DESC_W1_SEC_TYPE GENMASK(23, 22) - #define RTW_TX_DESC_W1_PKT_OFFSET GENMASK(28, 24) -+#define RTW_TX_DESC_W1_MORE_DATA BIT(29) - #define RTW_TX_DESC_W2_AGG_EN BIT(12) - #define RTW_TX_DESC_W2_SPE_RPT BIT(19) - #define RTW_TX_DESC_W2_AMPDU_DEN GENMASK(22, 20) ---- a/drivers/net/wireless/realtek/rtw88/usb.c -+++ b/drivers/net/wireless/realtek/rtw88/usb.c -@@ -469,6 +469,9 @@ static u8 rtw_usb_tx_queue_mapping_to_qs - - if (unlikely(ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))) - qsel = TX_DESC_QSEL_MGMT; -+ else if (is_broadcast_ether_addr(hdr->addr1) || -+ is_multicast_ether_addr(hdr->addr1)) -+ qsel = TX_DESC_QSEL_HIGH; - else if (skb_get_queue_mapping(skb) <= IEEE80211_AC_BK) - qsel = skb->priority; - else diff --git a/package/kernel/mac80211/patches/rtl/062-wifi-rtw88-Skip-high-queue-in-hci_flush.patch b/package/kernel/mac80211/patches/rtl/062-wifi-rtw88-Skip-high-queue-in-hci_flush.patch deleted file mode 100644 index 4f8b31a89..000000000 --- a/package/kernel/mac80211/patches/rtl/062-wifi-rtw88-Skip-high-queue-in-hci_flush.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 9e09fbc5e90247fc6e77fb6ba72dcbf8088cf59a Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 16 Jun 2023 20:55:37 +0800 -Subject: [PATCH 5/8] wifi: rtw88: Skip high queue in hci_flush - -The flush period may not always intersect with DTIM and when that -happens, an error log "timed out to flush pci TX ring[6]" is shown. -Bypass this since hardware will do proper transmission on the next -DTIM period for broadcast/multicast packets in high queue. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230616125540.36877-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/pci.c | 5 +++-- - 1 file changed, 3 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/pci.c -+++ b/drivers/net/wireless/realtek/rtw88/pci.c -@@ -738,8 +738,9 @@ static void __rtw_pci_flush_queues(struc - u8 q; - - for (q = 0; q < RTK_MAX_TX_QUEUE_NUM; q++) { -- /* It may be not necessary to flush BCN and H2C tx queues. */ -- if (q == RTW_TX_QUEUE_BCN || q == RTW_TX_QUEUE_H2C) -+ /* Unnecessary to flush BCN, H2C and HI tx queues. */ -+ if (q == RTW_TX_QUEUE_BCN || q == RTW_TX_QUEUE_H2C || -+ q == RTW_TX_QUEUE_HI0) - continue; - - if (pci_queues & BIT(q)) diff --git a/package/kernel/mac80211/patches/rtl/063-wifi-rtw88-Stop-high-queue-during-scan.patch b/package/kernel/mac80211/patches/rtl/063-wifi-rtw88-Stop-high-queue-during-scan.patch deleted file mode 100644 index 68c28a72a..000000000 --- a/package/kernel/mac80211/patches/rtl/063-wifi-rtw88-Stop-high-queue-during-scan.patch +++ /dev/null @@ -1,46 +0,0 @@ -From ad6741b1e0449ba8f4eb41dc28e269dc20ab9219 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 16 Jun 2023 20:55:38 +0800 -Subject: [PATCH 6/8] wifi: rtw88: Stop high queue during scan - -When traversing channel list, TX in high queue should be disabled -along with beacon function, so packets won't be sent to incorrect -channels. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230616125540.36877-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/main.c | 7 +++++-- - drivers/net/wireless/realtek/rtw88/reg.h | 1 + - 2 files changed, 6 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -2403,10 +2403,13 @@ void rtw_core_enable_beacon(struct rtw_d - if (!rtwdev->ap_active) - return; - -- if (enable) -+ if (enable) { - rtw_write32_set(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); -- else -+ rtw_write32_clr(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE); -+ } else { - rtw_write32_clr(rtwdev, REG_BCN_CTRL, BIT_EN_BCN_FUNCTION); -+ rtw_write32_set(rtwdev, REG_TXPAUSE, BIT_HIGH_QUEUE); -+ } - } - - MODULE_AUTHOR("Realtek Corporation"); ---- a/drivers/net/wireless/realtek/rtw88/reg.h -+++ b/drivers/net/wireless/realtek/rtw88/reg.h -@@ -378,6 +378,7 @@ - #define BIT_SIFS_BK_EN BIT(12) - #define REG_TXPAUSE 0x0522 - #define BIT_AC_QUEUE GENMASK(7, 0) -+#define BIT_HIGH_QUEUE BIT(5) - #define REG_RD_CTRL 0x0524 - #define BIT_EDCCA_MSK_CNTDOWN_EN BIT(11) - #define BIT_DIS_TXOP_CFE BIT(10) diff --git a/package/kernel/mac80211/patches/rtl/064-wifi-rtw88-refine-register-based-H2C-command.patch b/package/kernel/mac80211/patches/rtl/064-wifi-rtw88-refine-register-based-H2C-command.patch deleted file mode 100644 index 29564e357..000000000 --- a/package/kernel/mac80211/patches/rtl/064-wifi-rtw88-refine-register-based-H2C-command.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 455afa45edb3f1dbc1371201c5ee486bb9a8cd1a Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 16 Jun 2023 20:55:39 +0800 -Subject: [PATCH 7/8] wifi: rtw88: refine register based H2C command - -Since register based H2C commands don't need endian conversion. -Introduce a new API that don't do conversion and send it directly. -New caller are expected to encode with cpu order and gradually -replace the old ones. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230616125540.36877-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/fw.c | 51 +++++++++++++++++++++++++ - drivers/net/wireless/realtek/rtw88/fw.h | 5 +++ - 2 files changed, 56 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw88/fw.c -+++ b/drivers/net/wireless/realtek/rtw88/fw.c -@@ -308,6 +308,57 @@ void rtw_fw_c2h_cmd_isr(struct rtw_dev * - } - EXPORT_SYMBOL(rtw_fw_c2h_cmd_isr); - -+static void rtw_fw_send_h2c_command_register(struct rtw_dev *rtwdev, -+ struct rtw_h2c_register *h2c) -+{ -+ u32 box_reg, box_ex_reg; -+ u8 box_state, box; -+ int ret; -+ -+ rtw_dbg(rtwdev, RTW_DBG_FW, "send H2C content %08x %08x\n", h2c->w0, -+ h2c->w1); -+ -+ lockdep_assert_held(&rtwdev->mutex); -+ -+ box = rtwdev->h2c.last_box_num; -+ switch (box) { -+ case 0: -+ box_reg = REG_HMEBOX0; -+ box_ex_reg = REG_HMEBOX0_EX; -+ break; -+ case 1: -+ box_reg = REG_HMEBOX1; -+ box_ex_reg = REG_HMEBOX1_EX; -+ break; -+ case 2: -+ box_reg = REG_HMEBOX2; -+ box_ex_reg = REG_HMEBOX2_EX; -+ break; -+ case 3: -+ box_reg = REG_HMEBOX3; -+ box_ex_reg = REG_HMEBOX3_EX; -+ break; -+ default: -+ WARN(1, "invalid h2c mail box number\n"); -+ return; -+ } -+ -+ ret = read_poll_timeout_atomic(rtw_read8, box_state, -+ !((box_state >> box) & 0x1), 100, 3000, -+ false, rtwdev, REG_HMETFR); -+ -+ if (ret) { -+ rtw_err(rtwdev, "failed to send h2c command\n"); -+ return; -+ } -+ -+ rtw_write32(rtwdev, box_ex_reg, h2c->w1); -+ rtw_write32(rtwdev, box_reg, h2c->w0); -+ -+ if (++rtwdev->h2c.last_box_num >= 4) -+ rtwdev->h2c.last_box_num = 0; -+} -+ - static void rtw_fw_send_h2c_command(struct rtw_dev *rtwdev, - u8 *h2c) - { ---- a/drivers/net/wireless/realtek/rtw88/fw.h -+++ b/drivers/net/wireless/realtek/rtw88/fw.h -@@ -81,6 +81,11 @@ struct rtw_c2h_adaptivity { - u8 option; - } __packed; - -+struct rtw_h2c_register { -+ u32 w0; -+ u32 w1; -+} __packed; -+ - struct rtw_h2c_cmd { - __le32 msg; - __le32 msg_ext; diff --git a/package/kernel/mac80211/patches/rtl/065-wifi-rtw88-fix-not-entering-PS-mode-after-AP-stops.patch b/package/kernel/mac80211/patches/rtl/065-wifi-rtw88-fix-not-entering-PS-mode-after-AP-stops.patch deleted file mode 100644 index 0508a19c4..000000000 --- a/package/kernel/mac80211/patches/rtl/065-wifi-rtw88-fix-not-entering-PS-mode-after-AP-stops.patch +++ /dev/null @@ -1,139 +0,0 @@ -From 28c11c29494f1b34e39641eead9c60a8bd26170d Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 16 Jun 2023 20:55:40 +0800 -Subject: [PATCH 8/8] wifi: rtw88: fix not entering PS mode after AP stops - -Without this patch, firmware only track beacons for port 0 and since -we will always start AP on port 0, this results in misbehavior of -power saving mode on other ports after AP stops. - -The "default port" H2C command is used to notify which port should -firmware track. Update the correct settings to firmware so power -saving mode can work properly. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230616125540.36877-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw88/fw.c | 17 +++++++++++++++++ - drivers/net/wireless/realtek/rtw88/fw.h | 8 ++++++++ - drivers/net/wireless/realtek/rtw88/mac80211.c | 1 + - drivers/net/wireless/realtek/rtw88/main.c | 8 ++++++++ - drivers/net/wireless/realtek/rtw88/main.h | 1 + - 5 files changed, 35 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw88/fw.c -+++ b/drivers/net/wireless/realtek/rtw88/fw.c -@@ -519,6 +519,23 @@ void rtw_fw_query_bt_info(struct rtw_dev - rtw_fw_send_h2c_command(rtwdev, h2c_pkt); - } - -+void rtw_fw_default_port(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif) -+{ -+ struct rtw_h2c_register h2c = {}; -+ -+ if (rtwvif->net_type != RTW_NET_MGD_LINKED) -+ return; -+ -+ /* Leave LPS before default port H2C so FW timer is correct */ -+ rtw_leave_lps(rtwdev); -+ -+ h2c.w0 = u32_encode_bits(H2C_CMD_DEFAULT_PORT, RTW_H2C_W0_CMDID) | -+ u32_encode_bits(rtwvif->port, RTW_H2C_DEFAULT_PORT_W0_PORTID) | -+ u32_encode_bits(rtwvif->mac_id, RTW_H2C_DEFAULT_PORT_W0_MACID); -+ -+ rtw_fw_send_h2c_command_register(rtwdev, &h2c); -+} -+ - void rtw_fw_wl_ch_info(struct rtw_dev *rtwdev, u8 link, u8 ch, u8 bw) - { - u8 h2c_pkt[H2C_PKT_SIZE] = {0}; ---- a/drivers/net/wireless/realtek/rtw88/fw.h -+++ b/drivers/net/wireless/realtek/rtw88/fw.h -@@ -86,6 +86,12 @@ struct rtw_h2c_register { - u32 w1; - } __packed; - -+#define RTW_H2C_W0_CMDID GENMASK(7, 0) -+ -+/* H2C_CMD_DEFAULT_PORT command */ -+#define RTW_H2C_DEFAULT_PORT_W0_PORTID GENMASK(15, 8) -+#define RTW_H2C_DEFAULT_PORT_W0_MACID GENMASK(23, 16) -+ - struct rtw_h2c_cmd { - __le32 msg; - __le32 msg_ext; -@@ -535,6 +541,7 @@ static inline void rtw_h2c_pkt_set_heade - #define H2C_CMD_MEDIA_STATUS_RPT 0x01 - #define H2C_CMD_SET_PWR_MODE 0x20 - #define H2C_CMD_LPS_PG_INFO 0x2b -+#define H2C_CMD_DEFAULT_PORT 0x2c - #define H2C_CMD_RA_INFO 0x40 - #define H2C_CMD_RSSI_MONITOR 0x42 - #define H2C_CMD_BCN_FILTER_OFFLOAD_P0 0x56 -@@ -806,6 +813,7 @@ void rtw_fw_c2h_cmd_rx_irqsafe(struct rt - void rtw_fw_c2h_cmd_handle(struct rtw_dev *rtwdev, struct sk_buff *skb); - void rtw_fw_send_general_info(struct rtw_dev *rtwdev); - void rtw_fw_send_phydm_info(struct rtw_dev *rtwdev); -+void rtw_fw_default_port(struct rtw_dev *rtwdev, struct rtw_vif *rtwvif); - - void rtw_fw_do_iqk(struct rtw_dev *rtwdev, struct rtw_iqk_para *para); - void rtw_fw_inform_rfk_status(struct rtw_dev *rtwdev, bool start); ---- a/drivers/net/wireless/realtek/rtw88/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw88/mac80211.c -@@ -382,6 +382,7 @@ static void rtw_ops_bss_info_changed(str - - rtw_fw_download_rsvd_page(rtwdev); - rtw_send_rsvd_page_h2c(rtwdev); -+ rtw_fw_default_port(rtwdev, rtwvif); - rtw_coex_media_status_notify(rtwdev, vif->cfg.assoc); - if (rtw_bf_support) - rtw_bf_assoc(rtwdev, vif, conf); ---- a/drivers/net/wireless/realtek/rtw88/main.c -+++ b/drivers/net/wireless/realtek/rtw88/main.c -@@ -334,12 +334,15 @@ int rtw_sta_add(struct rtw_dev *rtwdev, - struct ieee80211_vif *vif) - { - struct rtw_sta_info *si = (struct rtw_sta_info *)sta->drv_priv; -+ struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; - int i; - - si->mac_id = rtw_acquire_macid(rtwdev); - if (si->mac_id >= RTW_MAX_MAC_ID_NUM) - return -ENOSPC; - -+ if (vif->type == NL80211_IFTYPE_STATION && vif->cfg.assoc == 0) -+ rtwvif->mac_id = si->mac_id; - si->rtwdev = rtwdev; - si->sta = sta; - si->vif = vif; -@@ -2340,6 +2343,9 @@ static void rtw_port_switch_iter(void *d - rtw_dbg(rtwdev, RTW_DBG_STATE, "AP port switch from %d -> %d\n", - rtwvif_ap->port, rtwvif_target->port); - -+ /* Leave LPS so the value swapped are not in PS mode */ -+ rtw_leave_lps(rtwdev); -+ - reg1 = &rtwvif_ap->conf->net_type; - reg2 = &rtwvif_target->conf->net_type; - rtw_swap_reg_mask(rtwdev, reg1, reg2); -@@ -2358,6 +2364,8 @@ static void rtw_port_switch_iter(void *d - - swap(rtwvif_target->port, rtwvif_ap->port); - swap(rtwvif_target->conf, rtwvif_ap->conf); -+ -+ rtw_fw_default_port(rtwdev, rtwvif_target); - } - - void rtw_core_port_switch(struct rtw_dev *rtwdev, struct ieee80211_vif *vif) ---- a/drivers/net/wireless/realtek/rtw88/main.h -+++ b/drivers/net/wireless/realtek/rtw88/main.h -@@ -803,6 +803,7 @@ struct rtw_bf_info { - struct rtw_vif { - enum rtw_net_type net_type; - u16 aid; -+ u8 mac_id; /* for STA mode only */ - u8 mac_addr[ETH_ALEN]; - u8 bssid[ETH_ALEN]; - u8 port; diff --git a/package/kernel/mac80211/patches/rtl/200-add-rtw89.patch b/package/kernel/mac80211/patches/rtl/200-add-rtw89.patch deleted file mode 100644 index 8770318c4..000000000 --- a/package/kernel/mac80211/patches/rtl/200-add-rtw89.patch +++ /dev/null @@ -1,12 +0,0 @@ ---- a/defconfigs/wifi -+++ b/defconfigs/wifi -@@ -128,6 +128,9 @@ CPTCFG_RTW88_8822BU=m - CPTCFG_RTW88_8822CE=m - CPTCFG_RTW88_8822CU=m - CPTCFG_RTW88=m -+CPTCFG_RTW89_8852AE=m -+CPTCFG_RTW89_8852CE=m -+CPTCFG_RTW89=m - CPTCFG_SSB=m - CPTCFG_SSB_PCMCIAHOST=y - CPTCFG_SSB_SDIOHOST=y diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-001-wifi-rtw89-8852b-add-BB-and-RF-tables-1-of-2.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-001-wifi-rtw89-8852b-add-BB-and-RF-tables-1-of-2.patch deleted file mode 100644 index 3075b5ac5..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-001-wifi-rtw89-8852b-add-BB-and-RF-tables-1-of-2.patch +++ /dev/null @@ -1,13309 +0,0 @@ -From c8b5fc2e1d2f6a11fe2ba82da8b0c39bb379b529 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 28 Sep 2022 16:43:28 +0800 -Subject: [PATCH 001/149] wifi: rtw89: 8852b: add BB and RF tables (1 of 2) - -These tables contain BB and RF parameters that driver will load them into -registers. It also contains TX power according to country, band, rate and -so on. Increasing thermal can cause TX power degraded, so power tracking -tables are defined to compensate TX power. - -Internal version of these tables: - - HALRF_029_00_014 (R32) - - HALBB_027_046_05 - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20220928084336.34981-2-pkshih@realtek.com ---- - .../wireless/realtek/rtw89/rtw8852b_table.c | 13249 ++++++++++++++++ - .../wireless/realtek/rtw89/rtw8852b_table.h | 30 + - 2 files changed, 13279 insertions(+) - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8852b_table.c - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8852b_table.h - ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_table.c -@@ -0,0 +1,13249 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "phy.h" -+#include "reg.h" -+#include "rtw8852b_table.h" -+ -+static const struct rtw89_reg2_def rtw89_8852b_phy_bb_regs[] = { -+ {0x704, 0x601E0100}, -+ {0x4000, 0x00000000}, -+ {0x4004, 0xCA014000}, -+ {0x4008, 0xC751D4F0}, -+ {0x400C, 0x44511475}, -+ {0x4010, 0x00000000}, -+ {0x4014, 0x00000000}, -+ {0x4018, 0x4F4C084B}, -+ {0x401C, 0x084A4E52}, -+ {0x4020, 0x4D504E4B}, -+ {0x4024, 0x4F4C0849}, -+ {0x4028, 0x08484C50}, -+ {0x402C, 0x4C50504C}, -+ {0x4030, 0x5454084A}, -+ {0x4034, 0x084B5654}, -+ {0x4038, 0x6A6C605A}, -+ {0x403C, 0x4C4C084C}, -+ {0x4040, 0x084B4E4D}, -+ {0x4044, 0x4E4C4B4B}, -+ {0x4048, 0x4B4B084A}, -+ {0x404C, 0x084A4E4C}, -+ {0x4050, 0x514F4C4A}, -+ {0x4054, 0x524E084A}, -+ {0x4058, 0x084A5154}, -+ {0x405C, 0x53555554}, -+ {0x4060, 0x45450845}, -+ {0x4064, 0x08454144}, -+ {0x4068, 0x40434445}, -+ {0x406C, 0x44450845}, -+ {0x4070, 0x08444043}, -+ {0x4074, 0x42434444}, -+ {0x4078, 0x46450844}, -+ {0x407C, 0x08444843}, -+ {0x4080, 0x4B4E4A47}, -+ {0x4084, 0x4F4C084B}, -+ {0x4088, 0x084A4E52}, -+ {0x408C, 0x4D504E4B}, -+ {0x4090, 0x4F4C0849}, -+ {0x4094, 0x08484C50}, -+ {0x4098, 0x4C50504C}, -+ {0x409C, 0x5454084A}, -+ {0x40A0, 0x084B5654}, -+ {0x40A4, 0x6A6C605A}, -+ {0x40A8, 0x4C4C084C}, -+ {0x40AC, 0x084B4E4D}, -+ {0x40B0, 0x4E4C4B4B}, -+ {0x40B4, 0x4B4B084A}, -+ {0x40B8, 0x084A4E4C}, -+ {0x40BC, 0x514F4C4A}, -+ {0x40C0, 0x524E084A}, -+ {0x40C4, 0x084A5154}, -+ {0x40C8, 0x53555554}, -+ {0x40CC, 0x45450845}, -+ {0x40D0, 0x08454144}, -+ {0x40D4, 0x40434445}, -+ {0x40D8, 0x44450845}, -+ {0x40DC, 0x08444043}, -+ {0x40E0, 0x42434444}, -+ {0x40E4, 0x46450844}, -+ {0x40E8, 0x08444843}, -+ {0x40EC, 0x4B4E4A47}, -+ {0x40F0, 0x00000000}, -+ {0x40F4, 0x00000006}, -+ {0x40F8, 0x00000000}, -+ {0x40FC, 0x8C30C30C}, -+ {0x4100, 0x4C30C30C}, -+ {0x4104, 0x0C30C30C}, -+ {0x4108, 0x0C30C30C}, -+ {0x410C, 0x0C30C30C}, -+ {0x4110, 0x0C30C30C}, -+ {0x4114, 0x28A28A28}, -+ {0x4118, 0x28A28A28}, -+ {0x411C, 0x28A28A28}, -+ {0x4120, 0x28A28A28}, -+ {0x4124, 0x28A28A28}, -+ {0x4128, 0x28A28A28}, -+ {0x412C, 0x06666666}, -+ {0x4130, 0x33333333}, -+ {0x4134, 0x33333333}, -+ {0x4138, 0x33333333}, -+ {0x413C, 0x00000031}, -+ {0x4140, 0x5100600A}, -+ {0x4144, 0x18363113}, -+ {0x4148, 0x1D976DDC}, -+ {0x414C, 0x1C072DD7}, -+ {0x4150, 0x1127CDF4}, -+ {0x4154, 0x1E37BDF1}, -+ {0x4158, 0x1FB7F1D6}, -+ {0x415C, 0x1EA7DDF9}, -+ {0x4160, 0x1FE445DD}, -+ {0x4164, 0x1F97F1FE}, -+ {0x4168, 0x1FF781ED}, -+ {0x416C, 0x1FA7F5FE}, -+ {0x4170, 0x1E07B913}, -+ {0x4174, 0x1FD7FDFF}, -+ {0x4178, 0x1E17B9FA}, -+ {0x417C, 0x19A66914}, -+ {0x4180, 0x10F65598}, -+ {0x4184, 0x14A5A111}, -+ {0x4188, 0x1D3765DB}, -+ {0x418C, 0x17C685CA}, -+ {0x4190, 0x1107C5F3}, -+ {0x4194, 0x1B5785EB}, -+ {0x4198, 0x1F97ED8F}, -+ {0x419C, 0x1BC7A5F3}, -+ {0x41A0, 0x1FE43595}, -+ {0x41A4, 0x1EB7D9FC}, -+ {0x41A8, 0x1FE65DBE}, -+ {0x41AC, 0x1EC7D9FC}, -+ {0x41B0, 0x1976FCFF}, -+ {0x41B4, 0x1F77F5FF}, -+ {0x41B8, 0x1976FDEC}, -+ {0x41BC, 0x198664EF}, -+ {0x41C0, 0x11062D93}, -+ {0x41C4, 0x10C4E910}, -+ {0x41C8, 0x1CA759DB}, -+ {0x41CC, 0x1335A9B5}, -+ {0x41D0, 0x1097B9F3}, -+ {0x41D4, 0x17B72DE1}, -+ {0x41D8, 0x1F67ED42}, -+ {0x41DC, 0x18074DE9}, -+ {0x41E0, 0x1FD40547}, -+ {0x41E4, 0x1D57ADF9}, -+ {0x41E8, 0x1FE52182}, -+ {0x41EC, 0x1D67B1F9}, -+ {0x41F0, 0x14860CE1}, -+ {0x41F4, 0x1EC7E9FE}, -+ {0x41F8, 0x14860DD6}, -+ {0x41FC, 0x195664C7}, -+ {0x4200, 0x0005E58A}, -+ {0x4204, 0x00000000}, -+ {0x4208, 0x00000000}, -+ {0x420C, 0x7A000000}, -+ {0x4210, 0x0F9F3D7A}, -+ {0x4214, 0x0040817C}, -+ {0x4218, 0x00E10204}, -+ {0x421C, 0x227D94CD}, -+ {0x4220, 0x08028A28}, -+ {0x4224, 0x00000210}, -+ {0x4228, 0x04688000}, -+ {0x4A48, 0x00000002}, -+ {0x422C, 0x0060B002}, -+ {0x4230, 0x9A8249A8}, -+ {0x4234, 0x26A1469E}, -+ {0x4238, 0x2099A824}, -+ {0x423C, 0x2359461C}, -+ {0x4240, 0x1631A675}, -+ {0x4244, 0x2C6B1D63}, -+ {0x4248, 0x0000000E}, -+ {0x424C, 0x00000001}, -+ {0x4250, 0x00000001}, -+ {0x4254, 0x00000000}, -+ {0x4258, 0x00000000}, -+ {0x425C, 0x00000000}, -+ {0x4260, 0x0020000C}, -+ {0x4264, 0x00000000}, -+ {0x4268, 0x00000000}, -+ {0x426C, 0x0418317C}, -+ {0x4270, 0x2B33135C}, -+ {0x4274, 0x00000002}, -+ {0x4278, 0x00000000}, -+ {0x427C, 0x00000000}, -+ {0x4280, 0x00000000}, -+ {0x4284, 0x00000000}, -+ {0x4288, 0x00000000}, -+ {0x428C, 0x00000000}, -+ {0x4290, 0x00000000}, -+ {0x4294, 0x00000000}, -+ {0x4298, 0x00000000}, -+ {0x429C, 0x84026000}, -+ {0x42A0, 0x0051AC20}, -+ {0x4A24, 0x0010C040}, -+ {0x42A4, 0x02024008}, -+ {0x42A8, 0x00000000}, -+ {0x42AC, 0x00000000}, -+ {0x42B0, 0x22CE803C}, -+ {0x42B4, 0x32000000}, -+ {0x42B8, 0x996FD67D}, -+ {0x42BC, 0xBD67D67D}, -+ {0x42C0, 0x7D67D65B}, -+ {0x42C4, 0x28029F59}, -+ {0x42C8, 0x00280280}, -+ {0x42CC, 0x00000000}, -+ {0x42D0, 0x00000000}, -+ {0x42D4, 0x00000003}, -+ {0x42D8, 0x00000001}, -+ {0x42DC, 0x61861800}, -+ {0x42E0, 0x830C30C3}, -+ {0x42E4, 0xC30C30C3}, -+ {0x42E8, 0x830C30C3}, -+ {0x42EC, 0x451450C3}, -+ {0x42F0, 0x05145145}, -+ {0x42F4, 0x05145145}, -+ {0x42F8, 0x05145145}, -+ {0x42FC, 0x0F0C3145}, -+ {0x4300, 0x030C30CF}, -+ {0x4304, 0x030C30C3}, -+ {0x4308, 0x030CF3C3}, -+ {0x430C, 0x030C30C3}, -+ {0x4310, 0x0F3CF3C3}, -+ {0x4314, 0x0F3CF3CF}, -+ {0x4318, 0x0F3CF3CF}, -+ {0x431C, 0x0F3CF3CF}, -+ {0x4320, 0x0F3CF3CF}, -+ {0x4324, 0x030C10C3}, -+ {0x4328, 0x051430C3}, -+ {0x432C, 0x051490CB}, -+ {0x4330, 0x030CD151}, -+ {0x4334, 0x050C50C7}, -+ {0x4338, 0x051492CB}, -+ {0x433C, 0x05145145}, -+ {0x4340, 0x05145145}, -+ {0x4344, 0x05145145}, -+ {0x4348, 0x05145145}, -+ {0x434C, 0x090CD3CF}, -+ {0x4350, 0x071491C5}, -+ {0x4354, 0x073CF143}, -+ {0x4358, 0x071431C3}, -+ {0x435C, 0x0F3CF1C5}, -+ {0x4360, 0x0F3CF3CF}, -+ {0x4364, 0x0F3CF3CF}, -+ {0x4368, 0x0F3CF3CF}, -+ {0x436C, 0x0F3CF3CF}, -+ {0x4370, 0x090C91CF}, -+ {0x4374, 0x11243143}, -+ {0x4378, 0x9777A777}, -+ {0x437C, 0xBB7BAC95}, -+ {0x4380, 0xB667B889}, -+ {0x4384, 0x7B9B8899}, -+ {0x4388, 0x7A5567C8}, -+ {0x438C, 0x2278CCCC}, -+ {0x4390, 0x7C222222}, -+ {0x4394, 0x0000069B}, -+ {0x4398, 0x001CCCCC}, -+ {0x4AAC, 0xCCCCC88C}, -+ {0x4AB0, 0x0000AACC}, -+ {0x439C, 0x00000000}, -+ {0x43A0, 0x00000008}, -+ {0x43A4, 0x00000000}, -+ {0x43A8, 0x00000000}, -+ {0x43AC, 0x00000000}, -+ {0x43B0, 0x10000000}, -+ {0x43B4, 0x00401001}, -+ {0x43B8, 0x00061003}, -+ {0x43BC, 0x000024D8}, -+ {0x43C0, 0x00000000}, -+ {0x43C4, 0x10000020}, -+ {0x43C8, 0x20000200}, -+ {0x43CC, 0x00000000}, -+ {0x43D0, 0x04000000}, -+ {0x43D4, 0x44000100}, -+ {0x43D8, 0x60804060}, -+ {0x43DC, 0x44204210}, -+ {0x43E0, 0x82108082}, -+ {0x43E4, 0x82108402}, -+ {0x43E8, 0xC8082108}, -+ {0x43EC, 0xC8202084}, -+ {0x43F0, 0x44208208}, -+ {0x43F4, 0x84108204}, -+ {0x43F8, 0xD0108104}, -+ {0x43FC, 0xF8210108}, -+ {0x4400, 0x6431E930}, -+ {0x4404, 0x02309468}, -+ {0x4408, 0x10C61C22}, -+ {0x440C, 0x02109469}, -+ {0x4410, 0x10C61C22}, -+ {0x4414, 0x00041049}, -+ {0x4A4C, 0x00060581}, -+ {0x4418, 0x00000000}, -+ {0x441C, 0x00000000}, -+ {0x4420, 0x6C000000}, -+ {0x4424, 0xB0200020}, -+ {0x4428, 0x00001FF0}, -+ {0x442C, 0x00000000}, -+ {0x4430, 0x00000000}, -+ {0x4434, 0x00000000}, -+ {0x4438, 0x00000000}, -+ {0x443C, 0x190642D0}, -+ {0x4440, 0xA80668A0}, -+ {0x4444, 0x60900820}, -+ {0x4448, 0x9F28518C}, -+ {0x444C, 0x32488A62}, -+ {0x4450, 0x9C6E36DC}, -+ {0x4454, 0x0000F52B}, -+ {0x4458, 0x00000000}, -+ {0x445C, 0x4801442E}, -+ {0x4460, 0x0051A0B8}, -+ {0x4464, 0x00000000}, -+ {0x4468, 0x00000000}, -+ {0x446C, 0x00000000}, -+ {0x4470, 0x00000000}, -+ {0x4474, 0x00000000}, -+ {0x4478, 0x00000000}, -+ {0x447C, 0x00000000}, -+ {0x4480, 0x2A0A6040}, -+ {0x4484, 0x0A0A6829}, -+ {0x4488, 0x00000004}, -+ {0x448C, 0x00000000}, -+ {0x4490, 0x80000000}, -+ {0x4494, 0x10000000}, -+ {0x4498, 0xE0000000}, -+ {0x4AB4, 0x00000000}, -+ {0x449C, 0x0000001E}, -+ {0x44A0, 0x02B2C3A6}, -+ {0x44A4, 0x00000400}, -+ {0x44A8, 0x00000001}, -+ {0x44AC, 0x000190C0}, -+ {0x44B0, 0x00000000}, -+ {0x44B4, 0x00000000}, -+ {0x44B8, 0x00000000}, -+ {0x44BC, 0x00000000}, -+ {0x44C0, 0x00000000}, -+ {0x44C4, 0x00000000}, -+ {0x44C8, 0x00000000}, -+ {0x44CC, 0x00000000}, -+ {0x44D0, 0x00000000}, -+ {0x44D4, 0x00000000}, -+ {0x44D8, 0x00000000}, -+ {0x44DC, 0x00000000}, -+ {0x44E0, 0x00000000}, -+ {0x44E4, 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0x00000000}, -+ {0xDA0, 0x000003FE}, -+ {0xDA4, 0x00000000}, -+ {0xDA8, 0x0000003F}, -+ {0xDAC, 0x00000000}, -+ {0xD00, 0x77777777}, -+ {0xD04, 0xBBBBBBBB}, -+ {0xD08, 0xBBBBBBBB}, -+ {0xD0C, 0x00000070}, -+ {0xD10, 0x20110900}, -+ {0xD10, 0x20110FFF}, -+ {0xD78, 0x00000001}, -+ {0xD7C, 0x001D050E}, -+ {0xD84, 0x00004207}, -+ {0xD18, 0x50209900}, -+ {0xD80, 0x00804100}, -+ {0x718, 0x1333233F}, -+ {0x604, 0x041E1E1E}, -+ {0x714, 0x00010000}, -+ {0x586C, 0x000000F0}, -+ {0x586C, 0x000000E0}, -+ {0x586C, 0x000000D0}, -+ {0x586C, 0x000000C0}, -+ {0x586C, 0x000000B0}, -+ {0x586C, 0x000000A0}, -+ {0x586C, 0x00000090}, -+ {0x586C, 0x00000080}, -+ {0x586C, 0x00000070}, -+ {0x586C, 0x00000060}, -+ {0x586C, 0x00000050}, -+ {0x586C, 0x00000040}, -+ {0x586C, 0x00000030}, -+ {0x586C, 0x00000020}, -+ {0x586C, 0x00000010}, -+ {0x586C, 0x00000000}, -+ {0x786C, 0x000000F0}, -+ {0x786C, 0x000000E0}, -+ {0x786C, 0x000000D0}, -+ {0x786C, 0x000000C0}, -+ {0x786C, 0x000000B0}, -+ {0x786C, 0x000000A0}, -+ {0x786C, 0x00000090}, -+ {0x786C, 0x00000080}, -+ {0x786C, 0x00000070}, -+ {0x786C, 0x00000060}, -+ {0x786C, 0x00000050}, -+ {0x786C, 0x00000040}, -+ {0x786C, 0x00000030}, -+ {0x786C, 0x00000020}, -+ {0x786C, 0x00000010}, -+ {0x786C, 0x00000000}, -+ {0xC0D4, 0x4486888C}, -+ {0xC0D8, 0xC6BA10E1}, -+ {0xC0DC, 0x30C52868}, -+ {0xC0E0, 0x05008128}, -+ {0xC0E4, 0x0000A72B}, -+ {0xC1D4, 0x4486888C}, -+ {0xC1D8, 0xC6BA10E1}, -+ {0xC1DC, 0x30C52868}, -+ {0xC1E0, 0x05008128}, -+ {0xC1E4, 0x0000A72B}, -+ {0xC0EC, 0x00000000}, -+ {0xC0E4, 0x0000272B}, -+ {0xC1EC, 0x00000000}, -+ {0xC1E4, 0x0000272B}, -+ {0x334, 0xFFFFFFFF}, -+ {0x33C, 0x55000000}, -+ {0x340, 0x00005555}, -+ {0x724, 0x00111200}, -+ {0x5868, 0xA9550000}, -+ {0x5870, 0x33221100}, -+ {0x5874, 0x77665544}, -+ {0x5878, 0xBBAA9988}, -+ {0x587C, 0xFFEEDDCC}, -+ {0x5880, 0x76543210}, -+ {0x5884, 0xFEDCBA98}, -+ {0x5888, 0x00000000}, -+ {0x588C, 0x00000000}, -+ {0x5894, 0x00000008}, -+ {0x7868, 0xA9550000}, -+ {0x7870, 0x33221100}, -+ {0x7874, 0x77665544}, -+ {0x7878, 0xBBAA9988}, -+ {0x787C, 0xFFEEDDCC}, -+ {0x7880, 0x76543210}, -+ {0x7884, 0xFEDCBA98}, -+ {0x7888, 0x00000000}, -+ {0x788C, 0x00000000}, -+ {0x7894, 0x00000008}, -+ {0x650, 0x00200888}, -+ {0x710, 0xF3810000}, -+ {0x020, 0x0000F381}, -+ {0x024, 0x0000F381}, -+ {0x000, 0xC580801E}, -+ {0xC70, 0x00000400}, -+ {0x980, 0x10002250}, -+ {0x988, 0x3C3C4107}, -+ {0x994, 0x00000010}, -+ {0x2994, 0x00000010}, -+ {0x000, 0x0580801F}, -+ {0x240C, 0x00000000}, -+ {0x640, 0x140A141E}, -+ {0x640, 0x1414141E}, -+ {0x640, 0x1414141E}, -+ {0x644, 0x3414283C}, -+ {0x644, 0x3425283C}, -+ {0x644, 0x3426283C}, -+ {0x2640, 0x140A141E}, -+ {0x2640, 0x1414141E}, -+ {0x2640, 0x1414141E}, -+ {0x2644, 0x3414283C}, -+ {0x2644, 0x3425283C}, -+ {0x2644, 0x3425183C}, -+ {0x2300, 0x02748790}, -+ {0x2304, 0x00558670}, -+ {0x2308, 0x002883F0}, -+ {0x230C, 0x00090120}, -+ {0x2310, 0x00000000}, -+ {0x2314, 0x06000000}, -+ {0x2318, 0x00000000}, -+ {0x231C, 0x00000000}, -+ {0x2320, 0x03020100}, -+ {0x2324, 0x07060504}, -+ {0x2328, 0x0B0A0908}, -+ {0x232C, 0x0F0E0D0C}, -+ {0x2330, 0x13121110}, -+ {0x2334, 0x17161514}, -+ {0x2338, 0x0C700022}, -+ {0x233C, 0x0A0529D0}, -+ {0x2340, 0x000529D0}, -+ {0x2344, 0x0006318A}, -+ {0x2348, 0xB7E6318A}, -+ {0x234C, 0x80039C00}, -+ {0x2350, 0x80039C00}, -+ {0x2354, 0x0005298F}, -+ {0x2358, 0x0015296E}, -+ {0x235C, 0x0C07FC31}, -+ {0x2360, 0x0219AAAE}, -+ {0x2364, 0xE4F624C3}, -+ {0x2368, 0x53626F15}, -+ {0x236C, 0x48000000}, -+ {0x2370, 0x48000000}, -+ {0x2374, 0x07540000}, -+ {0x2378, 0x202401B9}, -+ {0x237C, 0x00F7000E}, -+ {0x2380, 0x0F0A1111}, -+ {0x2384, 0x30D9000F}, -+ {0x2388, 0x0200EA02}, -+ {0x238C, 0x003CB061}, -+ {0x2390, 0x69C00000}, -+ {0x2394, 0x00000000}, -+ {0x2398, 0x000000F0}, -+ {0x239C, 0x0001FFFF}, -+ {0x23A0, 0x00C80064}, -+ {0x23A4, 0x0190012C}, -+ {0x23A8, 0x001917BE}, -+ {0x23AC, 0x0B30880C}, -+ {0x23B0, 0x9281CE00}, -+ {0x23B4, 0x7F027C00}, -+ {0x704, 0x601E0102}, -+ {0x704, 0x601E0102}, -+ {0x5864, 0x080801FF}, -+ {0x7864, 0x080801FF}, -+ {0xC60, 0x017FFFF3}, -+ {0x58AC, 0x08000000}, -+ {0x78AC, 0x08000000}, -+ {0x8088, 0x007F0000}, -+ {0x81A4, 0x003F3A00}, -+ {0x81B4, 0x0100007F}, -+ {0x81C0, 0x0060010B}, -+ {0x81A0, 0x00000010}, -+ {0x8138, 0x00000002}, -+ {0x82A4, 0x003F3A00}, -+ {0x82B4, 0x0100007F}, -+ {0x82C0, 0x0060010B}, -+ {0x82A0, 0x00000010}, -+ {0x81A0, 0x00000010}, -+ {0x8238, 0x00000002}, -+ {0x8088, 0x00000000}, -+ {0x8020, 0x00000000}, -+ {0x8120, 0x00000000}, -+ {0x8220, 0x00000000}, -+ {0x8124, 0x00000F0F}, -+ {0x8224, 0x00000F0F}, -+ {0x5864, 0x180801FF}, -+ {0x7864, 0x180801FF}, -+ {0xC60, 0x017FFFF3}, -+ {0xC70, 0x00000600}, -+ {0xC70, 0x00000660}, -+ {0x58AC, 0x08000000}, -+ {0x78AC, 0x08000000}, -+ {0x8120, 0x10000000}, -+ {0x8120, 0x10030000}, -+ {0x8124, 0x00000F0F}, -+ {0x8124, 0x00000F0F}, -+ {0x8224, 0x00000F0F}, -+ {0x8224, 0x00000F0F}, -+ {0x8220, 0x10000000}, -+ {0x8220, 0x10030000}, -+ {0x704, 0x601E0100}, -+ {0x5864, 0x100801FF}, -+ {0x7864, 0x100801FF}, -+ {0x5864, 0x180801FF}, -+ {0x7864, 0x180801FF}, -+ {0x58D4, 0x7401FE00}, -+ {0x78D4, 0x7401FE00}, -+ {0x58F0, 0x400401FF}, -+ {0x78F0, 0x400401FF}, -+ {0x58F0, 0x400401FF}, -+ {0x78F0, 0x400401FF}, -+ {0x704, 0x601E0102}, -+ {0xC7C, 0x0020BFE0}, -+ {0x58C0, 0x00FE0000}, -+ {0x58FC, 0x00000000}, -+ {0x566C, 0x00000005}, -+ {0x566C, 0x00001005}, -+ {0x78C0, 0x00FE0000}, -+ {0x78FC, 0x00000000}, -+ {0x700, 0x00000030}, -+ {0x704, 0x601E0102}, -+ {0x704, 0x601E0100}, -+ {0x704, 0x601E0502}, -+ {0x20FC, 0x00000000}, -+ {0x20F8, 0x00000000}, -+ {0x20F0, 0x00000000}, -+ {0x9C0, 0x00000001}, -+ {0x9C0, 0x00000000}, -+ {0x9C0, 0x00000001}, -+ {0x9C0, 0x00000000}, -+ {0x4AE8, 0x00000744}, -+ {0x4AF0, 0x00000744}, -+ {0x1010, 0x00000010}, -+ {0x3010, 0x00000010}, -+ {0x4AD4, 0x00000040}, -+ {0x4AE0, 0x00000040}, -+ {0x4AE4, 0x0079E99E}, -+ {0x4AEC, 0x0079E99E}, -+ {0x300, 0xF30CE31C}, -+ {0x304, 0x13EF1F19}, -+ {0x308, 0x0C0CF3F3}, -+ {0x30C, 0x0C0C0C0C}, -+ {0x310, 0x80496000}, -+ {0x314, 0x0041E000}, -+ {0x318, 0x20022042}, -+ {0x31C, 0x20448009}, -+ {0x320, 0x00010031}, -+ {0x324, 0xE000E000}, -+ {0x328, 0xE000E000}, -+ {0x32C, 0xE000E000}, -+ {0x12BC, 0x10104041}, -+ {0x12C0, 0x14411111}, -+ {0x32BC, 0x10104041}, -+ {0x32C0, 0x14411111}, -+ {0x010, 0x0005FFFF}, -+ {0x028, 0x0000F381}, -+ {0x02C, 0x0000F381}, -+ {0x620, 0x00141230}, -+ {0x704, 0x601C05FF}, -+ {0x720, 0x20000000}, -+ {0x738, 0x004100CC}, -+ {0x12A0, 0x24903056}, -+ {0x12AC, 0x12333121}, -+ {0x12B8, 0x30020000}, -+ {0x12E4, 0x30D52A68}, -+ {0x2000, 0x50BBBF04}, -+ {0x32A0, 0x24903056}, -+ {0x32AC, 0x12333121}, -+ {0x32B8, 0x30020000}, -+ {0x32E4, 0x30D52A68}, -+ {0x5800, 0x03FF807F}, -+ {0x5804, 0x04237040}, -+ {0x5808, 0x04237040}, -+ {0x7800, 0x03FF807F}, -+ {0x7804, 0x04237040}, -+ {0x7808, 0x04237040}, -+ {0x73C, 0x00000002}, -+ {0x74C, 0x00000001}, -+ {0x748, 0x00000002}, -+ {0x5818, 0x082C1800}, -+ {0x7818, 0x082C1800}, -+ {0x624, 0x0101030A}, -+ {0xC14, 0x85010000}, -+ {0xDD4, 0x00000001}, -+ {0x241C, 0x00000001}, -+ {0x1200, 0x00010142}, -+ {0x3200, 0x00010142}, -+ {0xC0F8, 0x00000001}, -+ {0xC1F8, 0x00000001}, -+ {0x35C, 0x000004C4}, -+ {0x0F0, 0x00000002}, -+ {0x0F4, 0x00000028}, -+ {0x0F8, 0x20220408}, -+}; -+ -+static const struct rtw89_reg2_def rtw89_8852b_phy_bb_reg_gain[] = { -+ {0x000, 0x18FBDDB7}, -+ {0x001, 0x006F5436}, -+ {0x002, 0x00004F31}, -+ {0x100, 0x1BFEE0B7}, -+ {0x101, 0x006C5238}, -+ {0x102, 0x00005031}, -+ {0x10000, 0x07E6C39E}, -+ {0x10001, 0x00654526}, -+ {0x10002, 0x00006750}, -+ {0x10100, 0x09E9C69F}, -+ {0x10101, 0x00674627}, -+ {0x10102, 0x00006750}, -+ {0x20000, 0x06E8C49F}, -+ {0x20001, 0x00654526}, -+ {0x20002, 0x00006750}, -+ {0x20100, 0x07E9C6A0}, -+ {0x20101, 0x00674728}, -+ {0x20102, 0x00006850}, -+ {0x30000, 0x04E5C39D}, -+ {0x30001, 0x00634325}, -+ {0x30002, 0x00006750}, -+ {0x30100, 0x06E9C69F}, -+ {0x30101, 0x00654527}, -+ {0x30102, 0x00006750}, -+ {0x1000000, 0x000000F4}, -+ {0x1000010, 0x000000F8}, -+ {0x1000011, 0x0000F8F8}, -+ {0x1000100, 0x000000F8}, -+ {0x1000110, 0x00000000}, -+ {0x1000111, 0x00000000}, -+ {0x1010000, 0x000000F4}, -+ {0x1010010, 0x000000F8}, -+ {0x1010011, 0x0000F8F8}, -+ {0x1010020, 0x000000F8}, -+ {0x1010021, 0x0808E8E8}, -+ {0x1010029, 0x0000F8F8}, -+ {0x1010100, 0x000000F4}, -+ {0x1010110, 0x000000F8}, -+ {0x1010111, 0x0000F8F8}, -+ {0x1010120, 0x000000F8}, -+ {0x1010121, 0x0808E8E8}, -+ {0x1010129, 0x0000F8F8}, -+ {0x1020000, 0x000000F4}, -+ {0x1020010, 0x000000F8}, -+ {0x1020011, 0x0000F8F8}, -+ {0x1020020, 0x000000F8}, -+ {0x1020021, 0x0808E8E8}, -+ {0x1020029, 0x0000F8F8}, -+ {0x1020100, 0x000000F4}, -+ {0x1020110, 0x000000F8}, -+ {0x1020111, 0x0000F8F8}, -+ {0x1020120, 0x000000F8}, -+ {0x1020121, 0x0808E8E8}, -+ {0x1020129, 0x0000F8F8}, -+ {0x1030000, 0x000000F4}, -+ {0x1030010, 0x000000F8}, -+ {0x1030011, 0x0000F8F8}, -+ {0x1030020, 0x000000F8}, -+ {0x1030021, 0x0808E8E8}, -+ {0x1030029, 0x0000F8F8}, -+ {0x1030100, 0x000000F4}, -+ {0x1030110, 0x000000F8}, -+ {0x1030111, 0x0000F8F8}, -+ {0x1030120, 0x000000F8}, -+ {0x1030121, 0x0808E8E8}, -+ {0x1030129, 0x0000F8F8}, -+}; -+ -+static const struct rtw89_reg2_def rtw89_8852b_phy_radioa_regs[] = { -+ {0xF0010000, 0x00000000}, -+ {0xF0020000, 0x00000001}, -+ {0xF0010001, 0x00000002}, -+ {0xF0020001, 0x00000003}, -+ {0xF0030001, 0x00000004}, -+ {0xF0040001, 0x00000005}, -+ {0xF0050001, 0x00000006}, -+ {0xF0060001, 0x00000007}, -+ {0xF0070001, 0x00000008}, -+ {0xF0080001, 0x00000009}, -+ {0xF0290001, 0x0000000A}, -+ {0xF02B0001, 0x0000000B}, -+ {0x005, 0x00000000}, -+ {0x000, 0x00030000}, -+ {0x10000, 0x00030000}, -+ {0x018, 0x00011124}, -+ {0x10018, 0x00011124}, -+ {0x000, 0x00033C00}, -+ {0x10000, 0x00033C00}, -+ {0x01A, 0x00040004}, -+ {0x011, 0x00014073}, -+ {0x067, 0x00000070}, -+ {0x059, 0x000A0000}, -+ {0x066, 0x00000100}, -+ {0x057, 0x0000D589}, -+ {0x05A, 0x0007FFFF}, -+ {0x0A4, 0x0006FF12}, -+ {0x043, 0x00005000}, -+ {0x0E1, 0x00000001}, -+ {0x0DD, 0x000001A0}, -+ {0x0CA, 0x00002000}, -+ {0x0D3, 0x00000003}, -+ {0x0B3, 0x0004EFE0}, -+ {0x0B4, 0x0007C07E}, -+ {0x0B5, 0x0003A701}, -+ {0x0B6, 0x000581E0}, -+ {0x0B7, 0x00001A0A}, -+ {0x0BB, 0x000C7000}, -+ {0x0ED, 0x00000400}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00000543}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000542}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00000541}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000521}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00000343}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x00000342}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x00000341}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x00000321}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x000005C3}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x000005C2}, -+ {0x033, 0x0000000A}, -+ {0x03F, 0x000005C1}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x000005A1}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x000002C3}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x000002C2}, -+ {0x033, 0x0000000E}, -+ {0x03F, 0x000002C1}, -+ {0x033, 0x0000000F}, -+ {0x03F, 0x000002A1}, -+ {0x0ED, 0x00000000}, -+ {0x0ED, 0x00002000}, -+ {0x033, 0x00000002}, -+ {0x03D, 0x0004A883}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00000001}, -+ {0x033, 0x00000006}, -+ {0x03D, 0x0004A883}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00000001}, -+ {0x0ED, 0x00000000}, -+ {0x018, 0x00001001}, -+ {0x10018, 0x00001001}, -+ {0x002, 0x0000000D}, -+ {0x10002, 0x0000000D}, -+ {0x0EE, 0x00000004}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0000000B}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x00000012}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00000019}, -+ {0x0EE, 0x00000000}, -+ {0x08F, 0x000D0F7A}, -+ {0x0EF, 0x00080000}, -+ {0x033, 0x00000008}, -+ {0x03E, 0x000000C4}, -+ {0x03F, 0x000034C0}, -+ {0x033, 0x0000000A}, -+ {0x03E, 0x000000C4}, -+ {0x03F, 0x000035D0}, -+ {0x033, 0x0000000B}, -+ {0x03E, 0x000000C4}, -+ {0x03F, 0x000035C8}, -+ {0x033, 0x0000008A}, -+ {0x03E, 0x000000C4}, -+ {0x03F, 0x000035F7}, -+ {0x0EF, 0x00000000}, -+ {0x08D, 0x000CC800}, -+ {0x0EF, 0x00004000}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x00000700}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x00090600}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x000A3500}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x000A3400}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00008B00}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00001B00}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00003A00}, -+ {0x033, 0x0000000F}, -+ {0x03F, 0x00000700}, -+ {0x033, 0x0000000E}, -+ {0x03F, 0x00000700}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00090600}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x000A3500}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x000A3400}, -+ {0x033, 0x0000000A}, -+ {0x03F, 0x00008B00}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x00001B00}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x00003A00}, -+ {0x0EF, 0x00000000}, -+ {0x0EE, 0x00000010}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x00000003}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x00000003}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x00000001}, -+ {0x0EE, 0x00000000}, -+ {0x0EF, 0x00001000}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00000015}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000017}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00008000}, -+ {0x033, 0x00000000}, -+ {0x03E, 0x00004FC0}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000001}, -+ {0x03E, 0x000046C0}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000002}, -+ {0x03E, 0x00004240}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000003}, -+ {0x03E, 0x00008010}, -+ {0x03F, 0x00000147}, -+ {0x033, 0x00000004}, -+ {0x03E, 0x0000A048}, -+ {0x03F, 0x0000004F}, -+ {0x033, 0x00000005}, -+ {0x03E, 0x0000A030}, -+ {0x03F, 0x0000005F}, -+ {0x033, 0x00000006}, -+ {0x03E, 0x0000A000}, -+ {0x03F, 0x0000009F}, -+ {0x033, 0x00000008}, -+ {0x03E, 0x00004FC0}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000009}, -+ {0x03E, 0x000046C0}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x0000000A}, -+ {0x03E, 0x00004240}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x0000000B}, -+ {0x03E, 0x00008010}, -+ {0x03F, 0x00000147}, -+ {0x033, 0x0000000C}, -+ {0x03E, 0x0000A048}, -+ {0x03F, 0x0000004F}, -+ {0x033, 0x0000000D}, -+ {0x03E, 0x0000A030}, -+ {0x03F, 0x0000005F}, -+ {0x033, 0x0000000E}, -+ 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000010}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000011}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000012}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000013}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000014}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000015}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000016}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000017}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000020}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000021}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000022}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000023}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004396}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004396}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004396}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000024}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004396}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004396}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004396}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000025}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004396}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004396}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004396}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000026}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004396}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004396}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004396}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000027}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004396}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004396}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004386}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004396}, -+ {0xB0000000, 0x00000000}, -+ {0x0EF, 0x00000000}, -+ {0x067, 0x00008072}, -+ {0x0EF, 0x00000010}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000ED5}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00000FC7}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000783}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00000973}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x00000762}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x00000762}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00000080}, -+ {0x033, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000001}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000002}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000003}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000004}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000005}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000006}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000007}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000008}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000009}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000A}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000C}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000D}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000E}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000F}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000010}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000011}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000012}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000013}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023958}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000014}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000015}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000016}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000017}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000018}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000019}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ 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{0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001E}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001F}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000020}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000021}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ 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{0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000024}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000025}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000026}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000027}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000028}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000029}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002A}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002B}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002C}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002D}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002E}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002F}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000030}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000031}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000032}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000033}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000034}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000035}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000036}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000037}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000038}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000039}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026858}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003A}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003B}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00023A58}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x0002C758}, -+ {0xB0000000, 0x00000000}, -+ {0x0EF, 0x00000000}, -+ {0x0EE, 0x00000800}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00000001}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000003}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00000005}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000007}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00000001}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x00000003}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x00000006}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x00000007}, -+ {0x0EE, 0x00000000}, -+ {0x0EE, 0x00001000}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00003000}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00003001}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00003003}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00003007}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x0000300F}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x0000310F}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x0000330F}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x0000330F}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x00003000}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x00003001}, -+ {0x033, 0x0000000A}, -+ {0x03F, 0x00003003}, -+ {0x033, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003103}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00002307}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0xB0000000, 0x00000000}, -+ {0x0EE, 0x00000000}, -+ {0x0EE, 0x00000200}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00000001}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000003}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00000005}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000007}, -+ {0x0EE, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000100}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000100}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0xA0000000, 0x00000000}, -+ {0x0EC, 0x00000100}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000004}, -+ {0x03D, 0x00000078}, -+ {0x03E, 0x00080000}, -+ {0x03F, 0x00000000}, -+ {0x033, 0x00000005}, -+ {0x03D, 0x0000007B}, -+ {0x03E, 0x00020000}, -+ {0x03F, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x0DE, 0x00000000}, -+ {0x0EF, 0x00000000}, -+ {0x033, 0x00000000}, -+ {0x008, 0x00060280}, -+ {0x009, 0x00030400}, -+ {0x0EF, 0x00000000}, -+ {0x80010000, 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0x00000000}, -+ {0x0EF, 0x00000200}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x0000017F}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x0000017F}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x0000017F}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x0000007F}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x0000007F}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x0000007F}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x0000007F}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x0000007F}, -+ {0x0EF, 0x00000000}, -+ {0x06E, 0x00077A18}, -+ {0x06F, 0x00077A18}, -+ {0x06D, 0x00000C31}, -+ {0x0EF, 0x00020000}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x000005FF}, -+ {0x0EF, 0x00000000}, -+ {0x005, 0x00000001}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x094, 0x000000FC}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x094, 0x000000FC}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x094, 0x000000FC}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x094, 0x000000FC}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x094, 0x000000FC}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x094, 0x000000FC}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x094, 0x000000FC}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x094, 0x000000FC}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x094, 0x000000FC}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x094, 0x000000FC}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x094, 0x000000FC}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x094, 0x000000FC}, -+ {0xA0000000, 0x00000000}, -+ {0x094, 0x000001FC}, -+ {0xB0000000, 0x00000000}, -+ {0x100EE, 0x00002000}, -+ {0x10033, 0x00000080}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000F6}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000081}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000F3}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000082}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000F0}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000083}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000ED}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000084}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000EA}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000085}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000E7}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000086}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000A6}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000087}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000A3}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000088}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000063}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000089}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000060}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000026}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000023}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000020}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000001D}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000001A}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000017}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000090}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000014}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A0}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000F6}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A1}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000F3}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A2}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000F0}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A3}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000ED}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A4}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000EA}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A5}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000E7}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A6}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000A6}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A7}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000A3}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A8}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000063}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A9}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000060}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000AA}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000026}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000AB}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000023}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000AC}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000020}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000AD}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000001D}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000AE}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000001A}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000AF}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000017}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000B0}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000014}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C0}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000F6}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C1}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000F3}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C2}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000F0}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C3}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000ED}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C4}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000EA}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C5}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000E7}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C6}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000A6}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C7}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000A3}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C8}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000063}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C9}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000060}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CA}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000026}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CB}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000023}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CC}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000020}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CD}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000001D}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CE}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000001A}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CF}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000017}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000D0}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000014}, -+ {0xB0000000, 0x00000000}, -+ {0x100EE, 0x00000000}, -+ {0x100EE, 0x00004000}, -+ {0x10033, 0x00000080}, -+ {0x1003F, 0x000001A9}, -+ {0x10033, 0x00000081}, -+ {0x1003F, 0x000001A3}, -+ {0x10033, 0x00000082}, -+ {0x1003F, 0x0000019D}, -+ {0x10033, 0x00000083}, -+ {0x1003F, 0x00000197}, -+ {0x10033, 0x00000084}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000191}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000085}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000018B}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000086}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000014D}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000087}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000010B}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000088}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000089}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000D3}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000093}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000053}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000090}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000091}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A0}, -+ {0x1003F, 0x000001A9}, -+ {0x10033, 0x000000A1}, -+ {0x1003F, 0x000001A3}, -+ {0x10033, 0x000000A2}, -+ {0x1003F, 0x0000019D}, -+ {0x10033, 0x000000A3}, -+ {0x1003F, 0x00000197}, -+ {0x10033, 0x000000A4}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000191}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A5}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000018B}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A6}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000014D}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A7}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000010B}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A8}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A9}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000AA}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000D3}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000AB}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000AC}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000093}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000AD}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000AE}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000053}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000AF}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000B0}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000B1}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C0}, -+ {0x1003F, 0x000001A9}, -+ {0x10033, 0x000000C1}, -+ {0x1003F, 0x000001A3}, -+ {0x10033, 0x000000C2}, -+ {0x1003F, 0x0000019D}, -+ {0x10033, 0x000000C3}, -+ {0x1003F, 0x00000197}, -+ {0x10033, 0x000000C4}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000191}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C5}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000018B}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C6}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000014D}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C7}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000010B}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C8}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C9}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CA}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000D3}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CB}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CC}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000093}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CD}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CE}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000053}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CF}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000D0}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000D1}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0xB0000000, 0x00000000}, -+ {0x100EE, 0x00000000}, -+ {0x100EE, 0x00002000}, -+ {0x10033, 0x00000000}, -+ {0x1003F, 0x000000F6}, -+ {0x10033, 0x00000001}, -+ {0x1003F, 0x000000F3}, -+ {0x10033, 0x00000002}, -+ {0x1003F, 0x000000F0}, -+ {0x10033, 0x00000003}, -+ {0x1003F, 0x000000ED}, -+ {0x10033, 0x00000004}, -+ {0x1003F, 0x000000EA}, -+ {0x10033, 0x00000005}, -+ {0x1003F, 0x000000E7}, -+ {0x10033, 0x00000006}, -+ {0x1003F, 0x000000A6}, -+ {0x10033, 0x00000007}, -+ {0x1003F, 0x000000A3}, -+ {0x10033, 0x00000008}, -+ {0x1003F, 0x00000063}, -+ {0x10033, 0x00000009}, -+ {0x1003F, 0x00000060}, -+ {0x10033, 0x0000000A}, -+ {0x1003F, 0x00000023}, -+ {0x10033, 0x0000000B}, -+ {0x1003F, 0x00000020}, -+ {0x10033, 0x0000000C}, -+ {0x1003F, 0x0000001D}, -+ {0x10033, 0x0000000D}, -+ {0x1003F, 0x0000001A}, -+ {0x10033, 0x0000000E}, -+ {0x1003F, 0x00000017}, -+ {0x10033, 0x0000000F}, -+ {0x1003F, 0x00000014}, -+ {0x10033, 0x00000010}, -+ {0x1003F, 0x00000011}, -+ {0x100EE, 0x00000000}, -+ {0x100EE, 0x00004000}, -+ {0x10033, 0x00000000}, -+ {0x1003F, 0x000001AF}, -+ {0x10033, 0x00000001}, -+ {0x1003F, 0x000001A9}, -+ {0x10033, 0x00000002}, -+ {0x1003F, 0x000001A3}, -+ {0x10033, 0x00000003}, -+ {0x1003F, 0x0000019D}, -+ {0x10033, 0x00000004}, -+ {0x1003F, 0x00000197}, -+ {0x10033, 0x00000005}, -+ {0x1003F, 0x0000015F}, -+ {0x10033, 0x00000006}, -+ {0x1003F, 0x00000159}, -+ {0x10033, 0x00000007}, -+ {0x1003F, 0x0000011F}, -+ {0x10033, 0x00000008}, -+ {0x1003F, 0x00000119}, -+ {0x10033, 0x00000009}, -+ {0x1003F, 0x000000DF}, -+ {0x10033, 0x0000000A}, -+ {0x1003F, 0x000000D9}, -+ {0x10033, 0x0000000B}, -+ {0x1003F, 0x0000009F}, -+ {0x10033, 0x0000000C}, -+ {0x1003F, 0x00000099}, -+ {0x10033, 0x0000000D}, -+ {0x1003F, 0x0000005F}, -+ {0x10033, 0x0000000E}, -+ {0x1003F, 0x00000059}, -+ {0x10033, 0x0000000F}, -+ {0x1003F, 0x0000001F}, -+ {0x10033, 0x00000010}, -+ {0x1003F, 0x00000019}, -+ {0x10033, 0x00000011}, -+ {0x1003F, 0x00000013}, -+ {0x100EE, 0x00000000}, -+ {0x10005, 0x00000001}, -+ {0x09F, 0x00000032}, -+}; -+ -+static const struct rtw89_reg2_def rtw89_8852b_phy_radiob_regs[] = { -+ {0xF0010000, 0x00000000}, -+ {0xF0020000, 0x00000001}, -+ {0xF0010001, 0x00000002}, -+ {0xF0020001, 0x00000003}, -+ {0xF0030001, 0x00000004}, -+ {0xF0040001, 0x00000005}, -+ {0xF0050001, 0x00000006}, -+ {0xF0060001, 0x00000007}, -+ {0xF0070001, 0x00000008}, -+ {0xF0080001, 0x00000009}, -+ {0xF0290001, 0x0000000A}, -+ {0xF02B0001, 0x0000000B}, -+ {0x005, 0x00000000}, -+ {0x000, 0x00030000}, -+ {0x10000, 0x00030000}, -+ {0x018, 0x00011124}, -+ {0x10018, 0x00011124}, -+ {0x000, 0x00033C00}, -+ {0x10000, 0x00033C00}, -+ {0x01A, 0x00040004}, -+ {0x011, 0x00014073}, -+ {0x067, 0x00000070}, -+ {0x059, 0x000A0000}, -+ {0x066, 0x00000100}, -+ {0x05A, 0x0007F000}, -+ {0x0A4, 0x0006FF12}, -+ {0x043, 0x00005000}, -+ {0x0E1, 0x00000001}, -+ {0x0DD, 0x000001A0}, -+ {0x0CA, 0x00002000}, -+ {0x0D3, 0x00000003}, -+ {0x0B3, 0x0004EFE0}, -+ {0x0B4, 0x0007C03E}, -+ {0x0B5, 0x0003A201}, -+ {0x0BB, 0x000C7000}, -+ {0x0ED, 0x00002000}, -+ {0x033, 0x00000002}, -+ {0x03D, 0x0004A883}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00000001}, -+ {0x033, 0x00000006}, -+ {0x03D, 0x0004A883}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00000001}, -+ {0x0ED, 0x00000000}, -+ {0x018, 0x00001001}, -+ {0x10018, 0x00001001}, -+ {0x002, 0x0000000D}, -+ {0x10002, 0x0000000D}, -+ {0x0EE, 0x00000004}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0000000B}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x00000012}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00000019}, -+ {0x0EE, 0x00000000}, -+ {0x08F, 0x000D0F7A}, -+ {0x0EF, 0x00080000}, -+ {0x033, 0x00000008}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D30}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D30}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D30}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D30}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D30}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D30}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D30}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D30}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D30}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D30}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D30}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D30}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x000000C4}, -+ {0x03F, 0x000034C0}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D74}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D74}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D74}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D74}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D74}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D74}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D74}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D74}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D74}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D74}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D74}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D74}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x000000C4}, -+ {0x03F, 0x000035D0}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D72}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D72}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D72}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D72}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D72}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D72}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D72}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D72}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D72}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D72}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D72}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D72}, -+ {0xA0000000, 0x00000000}, -+ {0x03E, 0x000000C4}, -+ {0x03F, 0x000035C8}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000008A}, -+ {0x03E, 0x00000031}, -+ {0x03F, 0x00000D7D}, -+ {0x0EF, 0x00000000}, -+ {0x08D, 0x000CC800}, -+ {0x0EF, 0x00004000}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x00000700}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x00000700}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x00090600}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x000A3500}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x000A3400}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00008B00}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00001B00}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00003A00}, -+ {0x033, 0x0000000F}, -+ {0x03F, 0x00000700}, -+ {0x033, 0x0000000E}, -+ {0x03F, 0x00000700}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00090600}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x000A3500}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x000A3400}, -+ {0x033, 0x0000000A}, -+ {0x03F, 0x00008B00}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x00001B00}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x00003A00}, -+ {0x033, 0x00000017}, -+ {0x03F, 0x00000705}, -+ {0x033, 0x00000016}, -+ {0x03F, 0x00000705}, -+ {0x033, 0x00000015}, -+ {0x03F, 0x00090605}, -+ {0x033, 0x00000014}, -+ {0x03F, 0x000A3505}, -+ {0x033, 0x00000013}, -+ {0x03F, 0x000A3405}, -+ {0x033, 0x00000012}, -+ {0x03F, 0x00008B05}, -+ {0x033, 0x00000011}, -+ {0x03F, 0x00001B05}, -+ {0x033, 0x00000010}, -+ {0x03F, 0x00003A05}, -+ {0x0EF, 0x00000000}, -+ {0x0EE, 0x00000010}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x00000003}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x00000003}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x00000001}, -+ {0x0EE, 0x00000000}, -+ {0x0EF, 0x00001000}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00000015}, -+ {0x033, 0x00000001}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000005}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000005}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000017}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000017}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000017}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000017}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000017}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000017}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000017}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000017}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000017}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000017}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000005}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000002}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000017}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000017}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000015}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000015}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000015}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000015}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000015}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000015}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000015}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000015}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000015}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000015}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000017}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000003}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000007}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000007}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000005}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000005}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000005}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000005}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000005}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000005}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000005}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000005}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000005}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000005}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000007}, -+ {0xB0000000, 0x00000000}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00008000}, -+ {0x033, 0x00000000}, -+ {0x03E, 0x00004FC0}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000001}, -+ {0x03E, 0x000046C0}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000002}, -+ {0x03E, 0x00004240}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000003}, -+ {0x03E, 0x00008010}, -+ {0x03F, 0x00000147}, -+ {0x033, 0x00000004}, -+ {0x03E, 0x0000A048}, -+ {0x03F, 0x0000004F}, -+ {0x033, 0x00000005}, -+ {0x03E, 0x0000A030}, -+ {0x03F, 0x0000005F}, -+ {0x033, 0x00000006}, -+ {0x03E, 0x0000A000}, -+ {0x03F, 0x0000009F}, -+ {0x033, 0x00000008}, -+ {0x03E, 0x00004FC0}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000009}, -+ {0x03E, 0x000046C0}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x0000000A}, -+ {0x03E, 0x00004240}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x0000000B}, -+ {0x03E, 0x00008010}, -+ {0x03F, 0x00000147}, -+ {0x033, 0x0000000C}, -+ {0x03E, 0x0000A048}, -+ {0x03F, 0x0000004F}, -+ {0x033, 0x0000000D}, -+ {0x03E, 0x0000A030}, -+ {0x03F, 0x0000005F}, -+ {0x033, 0x0000000E}, -+ {0x03E, 0x0000A000}, -+ {0x03F, 0x0000009F}, -+ {0x033, 0x00000010}, -+ {0x03E, 0x00004FC0}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000011}, -+ {0x03E, 0x000046C0}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000012}, -+ {0x03E, 0x00004240}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000013}, -+ {0x03E, 0x00008010}, -+ {0x03F, 0x00000147}, -+ {0x033, 0x00000014}, -+ {0x03E, 0x0000A048}, -+ {0x03F, 0x0000004F}, -+ {0x033, 0x00000015}, -+ {0x03E, 0x0000A030}, -+ {0x03F, 0x0000005F}, -+ {0x033, 0x00000016}, -+ {0x03E, 0x0000A000}, -+ {0x03F, 0x0000009F}, -+ {0x033, 0x00000020}, -+ {0x03E, 0x00004FC0}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000021}, -+ {0x03E, 0x000046C0}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000022}, -+ {0x03E, 0x00004240}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000023}, -+ {0x03E, 0x00008010}, -+ {0x03F, 0x00000147}, -+ {0x033, 0x00000024}, -+ {0x03E, 0x0000A048}, -+ {0x03F, 0x0000004F}, -+ {0x033, 0x00000025}, -+ {0x03E, 0x0000A030}, -+ {0x03F, 0x0000005F}, -+ {0x033, 0x00000026}, -+ {0x03E, 0x0000A000}, -+ {0x03F, 0x0000009F}, -+ {0x033, 0x00000028}, -+ {0x03E, 0x00004FC0}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000029}, -+ {0x03E, 0x000046C0}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x0000002A}, -+ {0x03E, 0x00004240}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x0000002B}, -+ {0x03E, 0x00008010}, -+ {0x03F, 0x00000147}, -+ {0x033, 0x0000002C}, -+ {0x03E, 0x0000A048}, -+ {0x03F, 0x0000004F}, -+ {0x033, 0x0000002D}, -+ {0x03E, 0x0000A030}, -+ {0x03F, 0x0000005F}, -+ {0x033, 0x0000002E}, -+ {0x03E, 0x0000A000}, -+ {0x03F, 0x0000009F}, -+ {0x033, 0x00000030}, -+ {0x03E, 0x00004FC0}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000031}, -+ {0x03E, 0x000046C0}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000032}, -+ {0x03E, 0x00004240}, -+ {0x03F, 0x00000087}, -+ {0x033, 0x00000033}, -+ {0x03E, 0x00008010}, -+ {0x03F, 0x00000147}, -+ {0x033, 0x00000034}, -+ {0x03E, 0x0000A048}, -+ {0x03F, 0x0000004F}, -+ {0x033, 0x00000035}, -+ {0x03E, 0x0000A030}, -+ {0x03F, 0x0000005F}, -+ {0x033, 0x00000036}, -+ {0x03E, 0x0000A000}, -+ {0x03F, 0x0000009F}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00000100}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00004346}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00004346}, -+ {0x033, 0x00000003}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00004346}, -+ {0x033, 0x00000005}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004317}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004317}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004317}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004317}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004317}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004317}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004317}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004317}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004317}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004317}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000006}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000007}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000008}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000009}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004376}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000043A6}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000010}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000011}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000012}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000013}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000014}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000015}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000016}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000017}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000020}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000021}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004347}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000022}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00004346}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00004366}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000023}, -+ {0x03F, 0x00004386}, -+ {0x033, 0x00000024}, -+ {0x03F, 0x00004386}, -+ {0x033, 0x00000025}, -+ {0x03F, 0x00004386}, -+ {0x033, 0x00000026}, -+ {0x03F, 0x00004386}, -+ {0x033, 0x00000027}, -+ {0x03F, 0x00004386}, -+ {0x0EF, 0x00000000}, -+ {0x067, 0x00008072}, -+ {0x0EF, 0x00000010}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000ED5}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00000FC5}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000A93}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00000973}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x00000761}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x00000761}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00000080}, -+ {0x033, 0x00000000}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000001}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000002}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000003}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000004}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000005}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000006}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000007}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000008}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000009}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000A}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000B}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000C}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000D}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000E}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000F}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000010}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000011}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000012}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000013}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020758}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000014}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000015}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000016}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000017}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000018}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000019}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001A}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001B}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001C}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001D}, -+ {0x03E, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001E}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000001F}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000020}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000021}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000022}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000023}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000024}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000025}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000026}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000027}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000028}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000029}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002A}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002B}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002C}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002D}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002E}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000002F}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000030}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000031}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000032}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000033}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000034}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000035}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000036}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000037}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000038}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000039}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022658}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00026458}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003A}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00022858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000003B}, -+ {0x03E, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00020858}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00027558}, -+ {0xB0000000, 0x00000000}, -+ {0x0EF, 0x00000000}, -+ {0x0EE, 0x00000800}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00000001}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000003}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00000005}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000007}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00000001}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x00000003}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x00000006}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x00000007}, -+ {0x0EE, 0x00000000}, -+ {0x0EE, 0x00001000}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00003000}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00003001}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00003003}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00003007}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x0000300F}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x0000310F}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x0000330F}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x0000330F}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x00003000}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x00003001}, -+ {0x033, 0x0000000A}, -+ {0x03F, 0x00003003}, -+ {0x033, 0x0000000B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003007}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003103}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003107}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00003307}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00002307}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00001307}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x0000000F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00000307}, -+ {0xB0000000, 0x00000000}, -+ {0x0EE, 0x00000000}, -+ {0x0EE, 0x00000200}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00000001}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000003}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00000005}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000007}, -+ {0x0EE, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000100}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000100}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0xA0000000, 0x00000000}, -+ {0x0EC, 0x00000100}, -+ {0xB0000000, 0x00000000}, -+ {0x033, 0x00000004}, -+ {0x03D, 0x00000078}, -+ {0x03E, 0x00080000}, -+ {0x03F, 0x00000000}, -+ {0x033, 0x00000005}, -+ {0x03D, 0x0000007B}, -+ {0x03E, 0x00020000}, -+ {0x03F, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x0DE, 0x00000000}, -+ {0x0EF, 0x00000000}, -+ {0x033, 0x00000000}, -+ {0x008, 0x00060280}, -+ {0x009, 0x00030400}, -+ {0x0EF, 0x00000000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EF, 0x00000400}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x000001F7}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x000000FF}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x000000FF}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x000000FF}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x000000FF}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x000000FF}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x0EF, 0x00000400}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x000001FF}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x000001FF}, -+ {0x033, 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0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000A3}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000088}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000063}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000089}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000060}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000026}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000023}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000020}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000001D}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000001A}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000017}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000090}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000014}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A0}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000F6}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A1}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000F3}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A2}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000F0}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A3}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000ED}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A4}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90010001, 0x00000000}, {0x40000000, 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0x00000019}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000014}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C0}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000FB}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000F6}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C1}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F8}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000F3}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C2}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F5}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000F0}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C3}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000F2}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000ED}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C4}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EF}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000EA}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C5}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000EC}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000E7}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C6}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000AB}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000A6}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C7}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000A8}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000A3}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C8}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000068}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000063}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C9}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000065}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000060}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CA}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000002B}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000026}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CB}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000028}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000023}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CC}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000025}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000020}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CD}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000022}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000001D}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CE}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 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0x00000000}, -+ {0x1003F, 0x0000001C}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000017}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000D0}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000014}, -+ {0xB0000000, 0x00000000}, -+ {0x100EE, 0x00000000}, -+ {0x100EE, 0x00004000}, -+ {0x10033, 0x00000080}, -+ {0x1003F, 0x000001A9}, -+ {0x10033, 0x00000081}, -+ {0x1003F, 0x000001A3}, -+ {0x10033, 0x00000082}, -+ {0x1003F, 0x0000019D}, -+ {0x10033, 0x00000083}, -+ {0x1003F, 0x00000197}, -+ {0x10033, 0x00000084}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x90050001, 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0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000014D}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000087}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90020001, 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0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008A}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000D3}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008B}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008C}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000093}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008D}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008E}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000053}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x0000008F}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x00000090}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90050001, 0x00000000}, {0x40000000, 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0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000A9}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000AA}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000D3}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000AB}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90060001, 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0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000093}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000AD}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000AE}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90030001, 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0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000B0}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000B1}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C0}, -+ {0x1003F, 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0x00000158}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000158}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000191}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C5}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000011F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000018B}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C6}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000119}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000014D}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C7}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000010B}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C8}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000DF}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000C9}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000009F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000D9}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CA}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x000000D3}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CB}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000005F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000099}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CC}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000093}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CD}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000001F}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000059}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CE}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000053}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000CF}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000019}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000D0}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x00000013}, -+ {0xB0000000, 0x00000000}, -+ {0x10033, 0x000000D1}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90060001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90080001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x90290001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0x902b0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x1003F, 0x00000007}, -+ {0xA0000000, 0x00000000}, -+ {0x1003F, 0x0000000D}, -+ {0xB0000000, 0x00000000}, -+ {0x100EE, 0x00000000}, -+ {0x100EE, 0x00002000}, -+ {0x10033, 0x00000000}, -+ {0x1003F, 0x000000F6}, -+ {0x10033, 0x00000001}, -+ {0x1003F, 0x000000F3}, -+ {0x10033, 0x00000002}, -+ {0x1003F, 0x000000F0}, -+ {0x10033, 0x00000003}, -+ {0x1003F, 0x000000ED}, -+ {0x10033, 0x00000004}, -+ {0x1003F, 0x000000EA}, -+ {0x10033, 0x00000005}, -+ {0x1003F, 0x000000E7}, -+ {0x10033, 0x00000006}, -+ {0x1003F, 0x000000A6}, -+ {0x10033, 0x00000007}, -+ {0x1003F, 0x000000A3}, -+ {0x10033, 0x00000008}, -+ {0x1003F, 0x00000063}, -+ {0x10033, 0x00000009}, -+ {0x1003F, 0x00000060}, -+ {0x10033, 0x0000000A}, -+ {0x1003F, 0x00000023}, -+ {0x10033, 0x0000000B}, -+ {0x1003F, 0x00000020}, -+ {0x10033, 0x0000000C}, -+ {0x1003F, 0x0000001D}, -+ {0x10033, 0x0000000D}, -+ {0x1003F, 0x0000001A}, -+ {0x10033, 0x0000000E}, -+ {0x1003F, 0x00000017}, -+ {0x10033, 0x0000000F}, -+ {0x1003F, 0x00000014}, -+ {0x10033, 0x00000010}, -+ {0x1003F, 0x00000011}, -+ {0x100EE, 0x00000000}, -+ {0x100EE, 0x00004000}, -+ {0x10033, 0x00000000}, -+ {0x1003F, 0x000001AF}, -+ {0x10033, 0x00000001}, -+ {0x1003F, 0x000001A9}, -+ {0x10033, 0x00000002}, -+ {0x1003F, 0x000001A3}, -+ {0x10033, 0x00000003}, -+ {0x1003F, 0x0000019D}, -+ {0x10033, 0x00000004}, -+ {0x1003F, 0x00000197}, -+ {0x10033, 0x00000005}, -+ {0x1003F, 0x0000015F}, -+ {0x10033, 0x00000006}, -+ {0x1003F, 0x00000159}, -+ {0x10033, 0x00000007}, -+ {0x1003F, 0x0000011F}, -+ {0x10033, 0x00000008}, -+ {0x1003F, 0x00000119}, -+ {0x10033, 0x00000009}, -+ {0x1003F, 0x000000DF}, -+ {0x10033, 0x0000000A}, -+ {0x1003F, 0x000000D9}, -+ {0x10033, 0x0000000B}, -+ {0x1003F, 0x0000009F}, -+ {0x10033, 0x0000000C}, -+ {0x1003F, 0x00000099}, -+ {0x10033, 0x0000000D}, -+ {0x1003F, 0x0000005F}, -+ {0x10033, 0x0000000E}, -+ {0x1003F, 0x00000059}, -+ {0x10033, 0x0000000F}, -+ {0x1003F, 0x0000001F}, -+ {0x10033, 0x00000010}, -+ {0x1003F, 0x00000019}, -+ {0x10033, 0x00000011}, -+ {0x1003F, 0x00000013}, -+ {0x100EE, 0x00000000}, -+ {0x10005, 0x00000001}, -+ {0x09F, 0x00000032}, -+}; ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_table.h -@@ -0,0 +1,30 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_8852B_TABLE_H__ -+#define __RTW89_8852B_TABLE_H__ -+ -+#include "core.h" -+ -+extern const struct rtw89_phy_table rtw89_8852b_phy_bb_table; -+extern const struct rtw89_phy_table rtw89_8852b_phy_bb_gain_table; -+extern const struct rtw89_phy_table rtw89_8852b_phy_radioa_table; -+extern const struct rtw89_phy_table rtw89_8852b_phy_radiob_table; -+extern const struct rtw89_phy_table rtw89_8852b_phy_nctl_table; -+extern const struct rtw89_txpwr_table rtw89_8852b_byr_table; -+extern const struct rtw89_txpwr_track_cfg rtw89_8852b_trk_cfg; -+extern const u8 rtw89_8852b_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM] -+ [RTW89_REGD_NUM]; -+extern const s8 rtw89_8852b_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; -+extern const s8 rtw89_8852b_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; -+extern const s8 rtw89_8852b_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; -+extern const s8 rtw89_8852b_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; -+ -+#endif diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-002-wifi-rtw89-8852b-add-BB-and-RF-tables-2-of-2.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-002-wifi-rtw89-8852b-add-BB-and-RF-tables-2-of-2.patch deleted file mode 100644 index 4d8d2cfee..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-002-wifi-rtw89-8852b-add-BB-and-RF-tables-2-of-2.patch +++ /dev/null @@ -1,9655 +0,0 @@ -From 3e65a0ae142a97bb9b2e0a988e1ddf55fe289cf0 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 28 Sep 2022 16:43:29 +0800 -Subject: [PATCH 002/149] wifi: rtw89: 8852b: add BB and RF tables (2 of 2) - -These tables contain BB and RF parameters that driver will load them into -registers. It also contains TX power according to country, band, rate and -so on. Increasing thermal can cause TX power degraded, so power tracking -tables are defined to compensate TX power. - -Internal version of these tables: - - HALRF_029_00_014 (R32) - - HALBB_027_046_05 - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20220928084336.34981-3-pkshih@realtek.com ---- - .../wireless/realtek/rtw89/rtw8852b_table.c | 9628 +++++++++++++++++ - 1 file changed, 9628 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_table.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_table.c -@@ -13247,3 +13247,9631 @@ static const struct rtw89_reg2_def rtw89 - {0x10005, 0x00000001}, - {0x09F, 0x00000032}, - }; -+ -+static const struct rtw89_reg2_def rtw89_8852b_phy_nctl_regs[] = { -+ {0x8000, 0x00000008}, -+ {0x8008, 0x00000000}, -+ {0x8004, 0xf0862966}, -+ {0x800c, 0x78000000}, -+ {0x8010, 0x88015000}, -+ {0x8014, 0x80010100}, -+ {0x8018, 0x10010100}, -+ {0x801c, 0xa210bc00}, -+ {0x8020, 0x000403e0}, -+ {0x8024, 0x00072160}, -+ {0x8028, 0x00180e00}, -+ {0x8030, 0x400000c0}, -+ {0x8034, 0x11000830}, -+ {0x8038, 0x00000009}, -+ {0x803c, 0x00000008}, -+ {0x8040, 0x00000046}, -+ {0x8044, 0x0010001f}, -+ {0x8048, 0xf0000003}, -+ {0x804c, 0x62ac6162}, -+ {0x8050, 0xf2acf162}, -+ {0x8054, 0x62ac6162}, -+ {0x8058, 0xf2acf162}, -+ {0x805c, 0x150c0b02}, -+ {0x8060, 0x150c0b02}, -+ {0x8064, 0x2aa00047}, -+ {0x8074, 0x80000000}, -+ {0x807c, 0x000000ee}, -+ {0x8088, 0x80000000}, -+ {0x8098, 0x0000ff00}, -+ {0x809c, 0x0000001f}, -+ {0x80a0, 0x00010300}, -+ {0x80b8, 0x00001000}, -+ {0x80b0, 0x00000000}, -+ {0x80d0, 0x00000000}, -+ {0x80ec, 0x00000002}, -+ {0x810c, 0x33112200}, -+ {0x8110, 0x33112200}, -+ {0x8114, 0x00000000}, -+ {0x8120, 0x10010000}, -+ {0x8124, 0x00000000}, -+ {0x812c, 0x0000c000}, -+ {0x8138, 0x40000000}, -+ {0x813c, 0x40000000}, -+ {0x8140, 0x00000000}, -+ {0x8144, 0x0b040b03}, -+ {0x8148, 0x0a050b04}, -+ {0x814c, 0x0a050b04}, -+ {0x8150, 0xe4e40000}, -+ {0x8158, 0xffffffff}, -+ {0x815c, 0xffffffff}, -+ {0x8160, 0xffffffff}, -+ {0x8164, 0xffffffff}, -+ {0x8168, 0xffffffff}, -+ {0x816c, 0x1fffffff}, -+ {0x81a0, 0x00000000}, -+ {0x81ac, 0x003f2e2e}, -+ {0x81b0, 0x003f2e2e}, -+ {0x81bc, 0x005b5b5b}, -+ {0x81c0, 0x005b5b5b}, -+ {0x81b4, 0x00600060}, -+ {0x81b8, 0x00600060}, -+ {0x81cc, 0x00000000}, -+ {0x81dc, 0x00000002}, -+ {0x81e0, 0x00000000}, -+ {0x81e4, 0x00000001}, -+ {0x820c, 0x33112200}, -+ {0x8210, 0x33112200}, -+ {0x8214, 0x00000000}, -+ {0x8220, 0x10010000}, -+ {0x8224, 0x00000000}, -+ {0x822c, 0x0000d000}, -+ {0x8238, 0x40000000}, -+ {0x823c, 0x40000000}, -+ {0x8240, 0x00000000}, -+ {0x8244, 0x0b040b03}, -+ {0x8248, 0x0a050b04}, -+ {0x824c, 0x0a050b04}, -+ {0x8250, 0xe4e40000}, -+ {0x8258, 0xffffffff}, -+ {0x825c, 0xffffffff}, -+ {0x8260, 0xffffffff}, -+ {0x8264, 0xffffffff}, -+ {0x8268, 0xffffffff}, -+ {0x826c, 0x1fffffff}, -+ {0x82a0, 0x00000000}, -+ {0x82ac, 0x003f2e2e}, -+ {0x82b0, 0x003f2e2e}, -+ {0x82bc, 0x005b5b5b}, -+ {0x82c0, 0x005b5b5b}, -+ {0x82b4, 0x00600060}, -+ {0x82b8, 0x00600060}, -+ {0x82cc, 0x00000000}, -+ {0x82dc, 0x00000002}, -+ {0x82e0, 0x00100000}, -+ {0x82e4, 0x00000001}, -+ {0x81d8, 0x00000001}, -+ {0x82d8, 0x00000001}, -+ {0x8d00, 0x00000000}, -+ {0x8d04, 0x00000000}, -+ {0x8d08, 0x00000000}, -+ {0x8d0c, 0x00000000}, -+ {0x8d10, 0x00000000}, -+ {0x8d14, 0x00000000}, -+ {0x8d18, 0x00000000}, -+ {0x8d1c, 0x00000000}, -+ {0x8d20, 0x00000000}, -+ {0x8d24, 0x00000000}, -+ {0x8d28, 0x00000000}, -+ {0x8d2c, 0x00000000}, -+ {0x8d30, 0x00000000}, -+ {0x8d34, 0x00000000}, -+ {0x8d38, 0x00000000}, -+ {0x8d3c, 0x00000000}, -+ {0x8d40, 0x00000000}, -+ {0x8d44, 0x00000000}, -+ {0x8d48, 0x00000000}, -+ {0x8d4c, 0x00000000}, -+ {0x8d50, 0x00000000}, -+ {0x8d54, 0x00000000}, -+ {0x8d58, 0x00000000}, -+ {0x8d5c, 0x00000000}, -+ {0x8d60, 0x00000000}, -+ {0x8d64, 0x00000000}, -+ {0x8d68, 0x00000000}, -+ {0x8d6c, 0x00000000}, -+ {0x8d70, 0x00000000}, -+ {0x8d74, 0x00000000}, -+ {0x8d78, 0x00000000}, -+ {0x8d7c, 0x00000000}, -+ {0x8d80, 0x00000000}, -+ {0x8d84, 0x00000000}, -+ {0x8d88, 0x00000000}, -+ {0x8d8c, 0x00000000}, -+ {0x8d90, 0x00000000}, -+ {0x8d94, 0x00000000}, -+ {0x8d98, 0x00000000}, -+ {0x8d9c, 0x00000000}, -+ {0x8da0, 0x00000000}, -+ {0x8da4, 0x00000000}, -+ {0x8da8, 0x00000000}, -+ {0x8dac, 0x00000000}, -+ {0x8db0, 0x00000000}, -+ {0x8db4, 0x00000000}, -+ {0x8db8, 0x00000000}, -+ {0x8dbc, 0x00000000}, -+ {0x8dc0, 0x00000000}, -+ {0x8dc4, 0x00000000}, -+ {0x8dc8, 0x00000000}, -+ {0x8dcc, 0x00000000}, -+ {0x8dd0, 0x00000000}, -+ {0x8dd4, 0x00000000}, -+ {0x8dd8, 0x00000000}, -+ {0x8ddc, 0x00000000}, -+ {0x8de0, 0x00000000}, -+ {0x8de4, 0x00000000}, -+ {0x8de8, 0x00000000}, -+ {0x8dec, 0x00000000}, -+ {0x8df0, 0x00000000}, -+ {0x8df4, 0x00000000}, -+ {0x8df8, 0x00000000}, -+ {0x8dfc, 0x00000000}, -+ {0x8e00, 0x00000000}, -+ {0x8e04, 0x00000000}, -+ {0x8e08, 0x00000000}, -+ {0x8e0c, 0x00000000}, -+ {0x8e10, 0x00000000}, -+ {0x8e14, 0x00000000}, -+ {0x8e18, 0x00000000}, -+ {0x8e1c, 0x00000000}, -+ {0x8e20, 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0x55015b40}, -+ {0x8bac, 0xe3165c01}, -+ {0x8bb0, 0x54005480}, -+ {0x8bb4, 0x54005481}, -+ {0x8bb8, 0x54005482}, -+ {0x8bbc, 0x74107b00}, -+ {0x8bc0, 0xbfe5e336}, -+ {0x8bc4, 0x56103010}, -+ {0x8bc8, 0x8c005600}, -+ {0x8bcc, 0x57040001}, -+ {0x8bd0, 0x8e005700}, -+ {0x8bd4, 0x57005708}, -+ {0x8bd8, 0x57818e00}, -+ {0x8bdc, 0x8e005780}, -+ {0x8be0, 0x00074380}, -+ {0x8be4, 0x5c005c01}, -+ {0x8be8, 0x00041403}, -+ {0x8bec, 0x00014300}, -+ {0x8bf0, 0x0007427f}, -+ {0x8bf4, 0x62006280}, -+ {0x8bf8, 0x00049200}, -+ {0x8bfc, 0x00014200}, -+ {0x8c00, 0x0007427f}, -+ {0x8c04, 0x63146394}, -+ {0x8c08, 0x00049200}, -+ {0x8c0c, 0x00014200}, -+ {0x8c10, 0x42fe0004}, -+ {0x8c14, 0x42007901}, -+ {0x8c18, 0x14037420}, -+ {0x8c1c, 0x57005710}, -+ {0x8c20, 0x0001140f}, -+ {0x8c24, 0x56010006}, -+ {0x8c28, 0x54005502}, -+ {0x8c2c, 0x7f000005}, -+ {0x8c30, 0x77107e12}, -+ {0x8c34, 0x75007600}, -+ {0x8c38, 0x00047400}, -+ {0x8c3c, 0x00014270}, -+ {0x8c40, 0x42000004}, -+ {0x8c44, 0x77000005}, -+ {0x8c48, 0x56000006}, -+ {0x8c4c, 0x00060001}, -+ {0x8c50, 0x5f005f80}, -+ {0x8c54, 0x00059900}, -+ {0x8c58, 0x00017300}, -+ {0x8c5c, 0x63800006}, -+ {0x8c60, 0x98006300}, -+ {0x8c64, 0x549f0001}, -+ {0x8c68, 0x5c015400}, -+ {0x8c6c, 0x540054df}, -+ {0x8c70, 0x00015c02}, -+ {0x8c74, 0x07145c01}, -+ {0x8c78, 0x5c025400}, -+ {0x8c7c, 0x5c020001}, -+ {0x8c80, 0x54000714}, -+ {0x8c84, 0x00015c01}, -+ {0x8c88, 0x4c184c98}, -+ {0x8c8c, 0x00040001}, -+ {0x8c90, 0x74305c02}, -+ {0x8c94, 0x0c010901}, -+ {0x8c98, 0x00050ba6}, -+ {0x8c9c, 0x00077780}, -+ {0x8ca0, 0x00045220}, -+ {0x8ca4, 0x60084380}, -+ {0x8ca8, 0x6200610a}, -+ {0x8cac, 0x000763ce}, -+ {0x8cb0, 0x00045c00}, -+ {0x8cb4, 0x00014300}, -+ {0x8080, 0x00000004}, -+ {0x8080, 0x00000000}, -+ {0x8088, 0x00000000}, -+}; -+ -+static const struct rtw89_txpwr_byrate_cfg rtw89_8852b_txpwr_byrate[] = { -+ { 0, 0, 0, 0, 4, 0x50505050, }, -+ { 0, 0, 1, 0, 4, 0x50505050, }, -+ { 0, 0, 1, 4, 4, 0x484c5050, }, -+ { 0, 0, 2, 0, 4, 0x50505050, }, -+ { 0, 0, 2, 4, 4, 0x44484c50, }, -+ { 0, 0, 2, 8, 4, 0x34383c40, }, -+ { 0, 0, 3, 0, 4, 0x50505050, }, -+ { 0, 1, 2, 0, 4, 0x50505050, }, -+ { 0, 1, 2, 4, 4, 0x44484c50, }, -+ { 0, 1, 2, 8, 4, 0x34383c40, }, -+ { 0, 1, 3, 0, 4, 0x50505050, }, -+ { 0, 0, 4, 1, 4, 0x00000000, }, -+ { 0, 0, 4, 0, 1, 0x00000000, }, -+ { 1, 0, 1, 0, 4, 0x50505050, }, -+ { 1, 0, 1, 4, 4, 0x484c5050, }, -+ { 1, 0, 2, 0, 4, 0x50505050, }, -+ { 1, 0, 2, 4, 4, 0x44484c50, }, -+ { 1, 0, 2, 8, 4, 0x34383c40, }, -+ { 1, 0, 3, 0, 4, 0x50505050, }, -+ { 1, 1, 2, 0, 4, 0x50505050, }, -+ { 1, 1, 2, 4, 4, 0x44484c50, }, -+ { 1, 1, 2, 8, 4, 0x34383c40, }, -+ { 1, 1, 3, 0, 4, 0x50505050, }, -+ { 1, 0, 4, 0, 4, 0x00000000, }, -+}; -+ -+static const s8 _txpwr_track_delta_swingidx_5gb_n[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, -+ 4, 5, 5, 5, 5, 6, 6, 6, 6, 7, 7, 7, 7, 8}, -+ {0, 1, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, -+ 5, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 8}, -+ {0, 1, 1, 2, 2, 2, 3, 3, 4, 4, 4, 5, 5, 6, 6, 6, 7, -+ 7, 8, 8, 8, 9, 9, 10, 10, 10, 11, 11, 12, 12}, -+}; -+ -+static const s8 _txpwr_track_delta_swingidx_5gb_p[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, -+ 5, 5, 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 8}, -+ {0, 1, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, -+ 4, 5, 5, 5, 5, 6, 6, 6, 6, 7, 7, 7, 7, 8}, -+ {0, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, -+ 5, 5, 5, 6, 6, 6, 7, 7, 7, 7, 8, 8, 8, 9}, -+}; -+ -+static const s8 _txpwr_track_delta_swingidx_5ga_n[][DELTA_SWINGIDX_SIZE] = { -+ {0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, -+ 2, 2, 3, 3, 3, 3, 3, 3, 3, 3, 3, 4, 4, 4}, -+ {0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, -+ 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3}, -+ {0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, -+ 2, 2, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, 3}, -+}; -+ -+static const s8 _txpwr_track_delta_swingidx_5ga_p[][DELTA_SWINGIDX_SIZE] = { -+ {0, 1, 1, 1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, -+ 4, 4, 5, 5, 5, 5, 6, 6, 6, 6, 7, 7, 7, 7}, -+ {0, 1, 1, 1, 2, 2, 2, 2, 3, 3, 3, 4, 4, 4, 4, 5, -+ 5, 5, 5, 6, 6, 6, 7, 7, 7, 7, 8, 8, 8, 9}, -+ {0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 5, 5, -+ 5, 6, 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9}, -+}; -+ -+static const s8 _txpwr_track_delta_swingidx_2gb_n[] = { -+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -1, -1, -1, -+ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -2, -2}; -+ -+static const s8 _txpwr_track_delta_swingidx_2gb_p[] = { -+ 0, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 3, 3, 3, -+ 3, 4, 4, 4, 4, 4, 5, 5, 5, 5, 5, 5, 6, 6}; -+ -+static const s8 _txpwr_track_delta_swingidx_2ga_n[] = { -+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; -+ -+static const s8 _txpwr_track_delta_swingidx_2ga_p[] = { -+ 0, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 3, 3, -+ 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4, 5, 5, 5}; -+ -+static const s8 _txpwr_track_delta_swingidx_2g_cck_b_n[] = { -+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -1, -1, -+ -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}; -+ -+static const s8 _txpwr_track_delta_swingidx_2g_cck_b_p[] = { -+ 0, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 3, 3, 3, 3, 3, -+ 4, 4, 4, 4, 4, 4, 5, 5, 5, 5, 5, 6, 6, 6}; -+ -+static const s8 _txpwr_track_delta_swingidx_2g_cck_a_n[] = { -+ 0, 0, 0, 0, 0, 0, 0, 0, -1, -1, -1, -1, -1, -1, -1, -2, -2, -+ -2, -2, -2, -2, -2, -2, -3, -3, -3, -3, -3, -3, -3}; -+ -+static const s8 _txpwr_track_delta_swingidx_2g_cck_a_p[] = { -+ 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, -+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}; -+ -+const u8 rtw89_8852b_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM] -+ [RTW89_REGD_NUM] = { -+ [0][0][RTW89_ACMA] = 0, -+ [0][0][RTW89_CHILE] = 0, -+ [0][0][RTW89_CN] = 0, -+ [0][0][RTW89_ETSI] = 0, -+ [0][0][RTW89_FCC] = 1, -+ [0][0][RTW89_IC] = 1, -+ [0][0][RTW89_KCC] = 0, -+ [0][0][RTW89_MEXICO] = 1, -+ [0][0][RTW89_MKK] = 0, -+ [0][0][RTW89_QATAR] = 0, -+ [0][0][RTW89_UK] = 0, -+ [0][0][RTW89_UKRAINE] = 0, -+ [0][1][RTW89_ACMA] = 0, -+ [0][1][RTW89_CHILE] = 0, -+ [0][1][RTW89_CN] = 0, -+ [0][1][RTW89_ETSI] = 0, -+ [0][1][RTW89_FCC] = 3, -+ [0][1][RTW89_IC] = 3, -+ [0][1][RTW89_KCC] = 0, -+ [0][1][RTW89_MEXICO] = 3, -+ [0][1][RTW89_MKK] = 0, -+ [0][1][RTW89_QATAR] = 0, -+ [0][1][RTW89_UK] = 0, -+ [0][1][RTW89_UKRAINE] = 0, -+ [1][1][RTW89_ACMA] = 0, -+ [1][1][RTW89_CHILE] = 0, -+ [1][1][RTW89_CN] = 0, -+ [1][1][RTW89_ETSI] = 0, -+ [1][1][RTW89_FCC] = 3, -+ [1][1][RTW89_IC] = 3, -+ [1][1][RTW89_KCC] = 0, -+ [1][1][RTW89_MEXICO] = 3, -+ [1][1][RTW89_MKK] = 0, -+ [1][1][RTW89_QATAR] = 0, -+ [1][1][RTW89_UK] = 0, -+ [1][1][RTW89_UKRAINE] = 0, -+}; -+ -+const s8 rtw89_8852b_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = { -+ [0][0][0][0][RTW89_WW][0] = 58, -+ [0][0][0][0][RTW89_WW][1] = 58, -+ [0][0][0][0][RTW89_WW][2] = 58, -+ [0][0][0][0][RTW89_WW][3] = 58, -+ [0][0][0][0][RTW89_WW][4] = 58, -+ [0][0][0][0][RTW89_WW][5] = 58, -+ [0][0][0][0][RTW89_WW][6] = 58, -+ [0][0][0][0][RTW89_WW][7] = 58, -+ [0][0][0][0][RTW89_WW][8] = 58, -+ [0][0][0][0][RTW89_WW][9] = 58, -+ [0][0][0][0][RTW89_WW][10] = 58, -+ [0][0][0][0][RTW89_WW][11] = 58, -+ [0][0][0][0][RTW89_WW][12] = 56, -+ [0][0][0][0][RTW89_WW][13] = 76, -+ [0][1][0][0][RTW89_WW][0] = 46, -+ [0][1][0][0][RTW89_WW][1] = 46, -+ [0][1][0][0][RTW89_WW][2] = 46, -+ [0][1][0][0][RTW89_WW][3] = 46, -+ [0][1][0][0][RTW89_WW][4] = 46, -+ [0][1][0][0][RTW89_WW][5] = 46, -+ [0][1][0][0][RTW89_WW][6] = 46, -+ [0][1][0][0][RTW89_WW][7] = 46, -+ [0][1][0][0][RTW89_WW][8] = 46, -+ [0][1][0][0][RTW89_WW][9] = 46, -+ [0][1][0][0][RTW89_WW][10] = 46, -+ [0][1][0][0][RTW89_WW][11] = 46, -+ [0][1][0][0][RTW89_WW][12] = 42, -+ [0][1][0][0][RTW89_WW][13] = 64, -+ [1][0][0][0][RTW89_WW][0] = 0, -+ [1][0][0][0][RTW89_WW][1] = 0, -+ [1][0][0][0][RTW89_WW][2] = 50, -+ [1][0][0][0][RTW89_WW][3] = 50, -+ [1][0][0][0][RTW89_WW][4] = 50, -+ [1][0][0][0][RTW89_WW][5] = 58, -+ [1][0][0][0][RTW89_WW][6] = 50, -+ [1][0][0][0][RTW89_WW][7] = 50, -+ [1][0][0][0][RTW89_WW][8] = 50, -+ [1][0][0][0][RTW89_WW][9] = 42, -+ [1][0][0][0][RTW89_WW][10] = 30, -+ [1][0][0][0][RTW89_WW][11] = 0, -+ [1][0][0][0][RTW89_WW][12] = 0, -+ [1][0][0][0][RTW89_WW][13] = 0, -+ [1][1][0][0][RTW89_WW][0] = 0, -+ [1][1][0][0][RTW89_WW][1] = 0, -+ [1][1][0][0][RTW89_WW][2] = 46, -+ [1][1][0][0][RTW89_WW][3] = 46, -+ [1][1][0][0][RTW89_WW][4] = 46, -+ [1][1][0][0][RTW89_WW][5] = 46, -+ [1][1][0][0][RTW89_WW][6] = 34, -+ [1][1][0][0][RTW89_WW][7] = 34, -+ [1][1][0][0][RTW89_WW][8] = 34, -+ [1][1][0][0][RTW89_WW][9] = 30, -+ [1][1][0][0][RTW89_WW][10] = 30, -+ [1][1][0][0][RTW89_WW][11] = 0, -+ [1][1][0][0][RTW89_WW][12] = 0, -+ [1][1][0][0][RTW89_WW][13] = 0, -+ [0][0][1][0][RTW89_WW][0] = 58, -+ [0][0][1][0][RTW89_WW][1] = 58, -+ [0][0][1][0][RTW89_WW][2] = 58, -+ [0][0][1][0][RTW89_WW][3] = 58, -+ [0][0][1][0][RTW89_WW][4] = 58, -+ [0][0][1][0][RTW89_WW][5] = 58, -+ [0][0][1][0][RTW89_WW][6] = 58, -+ [0][0][1][0][RTW89_WW][7] = 58, -+ [0][0][1][0][RTW89_WW][8] = 58, -+ [0][0][1][0][RTW89_WW][9] = 58, -+ [0][0][1][0][RTW89_WW][10] = 58, -+ [0][0][1][0][RTW89_WW][11] = 54, -+ [0][0][1][0][RTW89_WW][12] = 50, -+ [0][0][1][0][RTW89_WW][13] = 0, -+ [0][1][1][0][RTW89_WW][0] = 46, -+ [0][1][1][0][RTW89_WW][1] = 46, -+ [0][1][1][0][RTW89_WW][2] = 46, -+ [0][1][1][0][RTW89_WW][3] = 46, -+ [0][1][1][0][RTW89_WW][4] = 46, -+ [0][1][1][0][RTW89_WW][5] = 46, -+ [0][1][1][0][RTW89_WW][6] = 46, -+ [0][1][1][0][RTW89_WW][7] = 46, -+ [0][1][1][0][RTW89_WW][8] = 46, -+ [0][1][1][0][RTW89_WW][9] = 46, -+ [0][1][1][0][RTW89_WW][10] = 46, -+ [0][1][1][0][RTW89_WW][11] = 46, -+ [0][1][1][0][RTW89_WW][12] = 42, -+ [0][1][1][0][RTW89_WW][13] = 0, -+ [0][0][2][0][RTW89_WW][0] = 58, -+ [0][0][2][0][RTW89_WW][1] = 58, -+ [0][0][2][0][RTW89_WW][2] = 58, -+ [0][0][2][0][RTW89_WW][3] = 58, -+ [0][0][2][0][RTW89_WW][4] = 58, -+ [0][0][2][0][RTW89_WW][5] = 58, -+ [0][0][2][0][RTW89_WW][6] = 58, -+ [0][0][2][0][RTW89_WW][7] = 58, -+ [0][0][2][0][RTW89_WW][8] = 58, -+ [0][0][2][0][RTW89_WW][9] = 58, -+ [0][0][2][0][RTW89_WW][10] = 58, -+ [0][0][2][0][RTW89_WW][11] = 54, -+ [0][0][2][0][RTW89_WW][12] = 50, -+ [0][0][2][0][RTW89_WW][13] = 0, -+ [0][1][2][0][RTW89_WW][0] = 46, -+ [0][1][2][0][RTW89_WW][1] = 46, -+ [0][1][2][0][RTW89_WW][2] = 46, -+ [0][1][2][0][RTW89_WW][3] = 46, -+ [0][1][2][0][RTW89_WW][4] = 46, -+ [0][1][2][0][RTW89_WW][5] = 46, -+ [0][1][2][0][RTW89_WW][6] = 46, -+ [0][1][2][0][RTW89_WW][7] = 46, -+ [0][1][2][0][RTW89_WW][8] = 46, -+ [0][1][2][0][RTW89_WW][9] = 46, -+ [0][1][2][0][RTW89_WW][10] = 46, -+ [0][1][2][0][RTW89_WW][11] = 46, -+ [0][1][2][0][RTW89_WW][12] = 42, -+ [0][1][2][0][RTW89_WW][13] = 0, -+ [0][1][2][1][RTW89_WW][0] = 34, -+ [0][1][2][1][RTW89_WW][1] = 34, -+ [0][1][2][1][RTW89_WW][2] = 34, -+ [0][1][2][1][RTW89_WW][3] = 34, -+ [0][1][2][1][RTW89_WW][4] = 34, -+ [0][1][2][1][RTW89_WW][5] = 34, -+ [0][1][2][1][RTW89_WW][6] = 34, -+ [0][1][2][1][RTW89_WW][7] = 34, -+ [0][1][2][1][RTW89_WW][8] = 34, -+ [0][1][2][1][RTW89_WW][9] = 34, -+ [0][1][2][1][RTW89_WW][10] = 34, -+ [0][1][2][1][RTW89_WW][11] = 34, -+ [0][1][2][1][RTW89_WW][12] = 34, -+ [0][1][2][1][RTW89_WW][13] = 0, -+ [1][0][2][0][RTW89_WW][0] = 0, -+ [1][0][2][0][RTW89_WW][1] = 0, -+ [1][0][2][0][RTW89_WW][2] = 58, -+ [1][0][2][0][RTW89_WW][3] = 58, -+ [1][0][2][0][RTW89_WW][4] = 58, -+ [1][0][2][0][RTW89_WW][5] = 58, -+ [1][0][2][0][RTW89_WW][6] = 58, -+ [1][0][2][0][RTW89_WW][7] = 58, -+ [1][0][2][0][RTW89_WW][8] = 58, -+ [1][0][2][0][RTW89_WW][9] = 58, -+ [1][0][2][0][RTW89_WW][10] = 58, -+ [1][0][2][0][RTW89_WW][11] = 0, -+ [1][0][2][0][RTW89_WW][12] = 0, -+ [1][0][2][0][RTW89_WW][13] = 0, -+ [1][1][2][0][RTW89_WW][0] = 0, -+ [1][1][2][0][RTW89_WW][1] = 0, -+ [1][1][2][0][RTW89_WW][2] = 46, -+ [1][1][2][0][RTW89_WW][3] = 46, -+ [1][1][2][0][RTW89_WW][4] = 46, -+ [1][1][2][0][RTW89_WW][5] = 46, -+ [1][1][2][0][RTW89_WW][6] = 46, -+ [1][1][2][0][RTW89_WW][7] = 46, -+ [1][1][2][0][RTW89_WW][8] = 46, -+ [1][1][2][0][RTW89_WW][9] = 42, -+ [1][1][2][0][RTW89_WW][10] = 38, -+ [1][1][2][0][RTW89_WW][11] = 0, -+ [1][1][2][0][RTW89_WW][12] = 0, -+ [1][1][2][0][RTW89_WW][13] = 0, -+ [1][1][2][1][RTW89_WW][0] = 0, -+ [1][1][2][1][RTW89_WW][1] = 0, -+ [1][1][2][1][RTW89_WW][2] = 34, -+ [1][1][2][1][RTW89_WW][3] = 34, -+ [1][1][2][1][RTW89_WW][4] = 34, -+ [1][1][2][1][RTW89_WW][5] = 34, -+ [1][1][2][1][RTW89_WW][6] = 34, -+ [1][1][2][1][RTW89_WW][7] = 34, -+ [1][1][2][1][RTW89_WW][8] = 34, -+ [1][1][2][1][RTW89_WW][9] = 34, -+ [1][1][2][1][RTW89_WW][10] = 34, -+ [1][1][2][1][RTW89_WW][11] = 0, -+ [1][1][2][1][RTW89_WW][12] = 0, -+ [1][1][2][1][RTW89_WW][13] = 0, -+ [0][0][0][0][RTW89_FCC][0] = 78, -+ [0][0][0][0][RTW89_ETSI][0] = 58, -+ [0][0][0][0][RTW89_MKK][0] = 68, -+ [0][0][0][0][RTW89_IC][0] = 78, -+ [0][0][0][0][RTW89_KCC][0] = 68, -+ [0][0][0][0][RTW89_ACMA][0] = 58, -+ [0][0][0][0][RTW89_CHILE][0] = 64, -+ [0][0][0][0][RTW89_UKRAINE][0] = 58, -+ [0][0][0][0][RTW89_MEXICO][0] = 78, -+ [0][0][0][0][RTW89_CN][0] = 58, -+ [0][0][0][0][RTW89_QATAR][0] = 58, -+ [0][0][0][0][RTW89_UK][0] = 58, -+ [0][0][0][0][RTW89_FCC][1] = 78, -+ [0][0][0][0][RTW89_ETSI][1] = 58, -+ [0][0][0][0][RTW89_MKK][1] = 68, -+ [0][0][0][0][RTW89_IC][1] = 78, -+ [0][0][0][0][RTW89_KCC][1] = 68, -+ [0][0][0][0][RTW89_ACMA][1] = 58, -+ [0][0][0][0][RTW89_CHILE][1] = 64, -+ [0][0][0][0][RTW89_UKRAINE][1] = 58, -+ [0][0][0][0][RTW89_MEXICO][1] = 78, -+ [0][0][0][0][RTW89_CN][1] = 58, -+ [0][0][0][0][RTW89_QATAR][1] = 58, -+ [0][0][0][0][RTW89_UK][1] = 58, -+ [0][0][0][0][RTW89_FCC][2] = 78, -+ [0][0][0][0][RTW89_ETSI][2] = 58, -+ [0][0][0][0][RTW89_MKK][2] = 68, -+ [0][0][0][0][RTW89_IC][2] = 78, -+ [0][0][0][0][RTW89_KCC][2] = 68, -+ [0][0][0][0][RTW89_ACMA][2] = 58, -+ [0][0][0][0][RTW89_CHILE][2] = 64, -+ [0][0][0][0][RTW89_UKRAINE][2] = 58, -+ [0][0][0][0][RTW89_MEXICO][2] = 78, -+ [0][0][0][0][RTW89_CN][2] = 58, -+ [0][0][0][0][RTW89_QATAR][2] = 58, -+ [0][0][0][0][RTW89_UK][2] = 58, -+ [0][0][0][0][RTW89_FCC][3] = 78, -+ [0][0][0][0][RTW89_ETSI][3] = 58, -+ [0][0][0][0][RTW89_MKK][3] = 68, -+ [0][0][0][0][RTW89_IC][3] = 78, -+ [0][0][0][0][RTW89_KCC][3] = 68, -+ [0][0][0][0][RTW89_ACMA][3] = 58, -+ [0][0][0][0][RTW89_CHILE][3] = 64, -+ [0][0][0][0][RTW89_UKRAINE][3] = 58, -+ [0][0][0][0][RTW89_MEXICO][3] = 78, -+ [0][0][0][0][RTW89_CN][3] = 58, -+ [0][0][0][0][RTW89_QATAR][3] = 58, -+ [0][0][0][0][RTW89_UK][3] = 58, -+ [0][0][0][0][RTW89_FCC][4] = 78, -+ [0][0][0][0][RTW89_ETSI][4] = 58, -+ [0][0][0][0][RTW89_MKK][4] = 68, -+ [0][0][0][0][RTW89_IC][4] = 78, -+ [0][0][0][0][RTW89_KCC][4] = 70, -+ [0][0][0][0][RTW89_ACMA][4] = 58, -+ [0][0][0][0][RTW89_CHILE][4] = 64, -+ [0][0][0][0][RTW89_UKRAINE][4] = 58, -+ [0][0][0][0][RTW89_MEXICO][4] = 78, -+ [0][0][0][0][RTW89_CN][4] = 58, -+ [0][0][0][0][RTW89_QATAR][4] = 58, -+ [0][0][0][0][RTW89_UK][4] = 58, -+ [0][0][0][0][RTW89_FCC][5] = 78, -+ [0][0][0][0][RTW89_ETSI][5] = 58, -+ [0][0][0][0][RTW89_MKK][5] = 68, -+ [0][0][0][0][RTW89_IC][5] = 78, -+ [0][0][0][0][RTW89_KCC][5] = 70, -+ [0][0][0][0][RTW89_ACMA][5] = 58, -+ [0][0][0][0][RTW89_CHILE][5] = 64, -+ [0][0][0][0][RTW89_UKRAINE][5] = 58, -+ [0][0][0][0][RTW89_MEXICO][5] = 78, -+ [0][0][0][0][RTW89_CN][5] = 58, -+ [0][0][0][0][RTW89_QATAR][5] = 58, -+ [0][0][0][0][RTW89_UK][5] = 58, -+ [0][0][0][0][RTW89_FCC][6] = 78, -+ [0][0][0][0][RTW89_ETSI][6] = 58, -+ [0][0][0][0][RTW89_MKK][6] = 68, -+ [0][0][0][0][RTW89_IC][6] = 78, -+ [0][0][0][0][RTW89_KCC][6] = 70, -+ [0][0][0][0][RTW89_ACMA][6] = 58, -+ [0][0][0][0][RTW89_CHILE][6] = 64, -+ [0][0][0][0][RTW89_UKRAINE][6] = 58, -+ [0][0][0][0][RTW89_MEXICO][6] = 78, -+ [0][0][0][0][RTW89_CN][6] = 58, -+ [0][0][0][0][RTW89_QATAR][6] = 58, -+ [0][0][0][0][RTW89_UK][6] = 58, -+ [0][0][0][0][RTW89_FCC][7] = 78, -+ [0][0][0][0][RTW89_ETSI][7] = 58, -+ [0][0][0][0][RTW89_MKK][7] = 68, -+ [0][0][0][0][RTW89_IC][7] = 78, -+ [0][0][0][0][RTW89_KCC][7] = 70, -+ [0][0][0][0][RTW89_ACMA][7] = 58, -+ [0][0][0][0][RTW89_CHILE][7] = 64, -+ [0][0][0][0][RTW89_UKRAINE][7] = 58, -+ [0][0][0][0][RTW89_MEXICO][7] = 78, -+ [0][0][0][0][RTW89_CN][7] = 58, -+ [0][0][0][0][RTW89_QATAR][7] = 58, -+ [0][0][0][0][RTW89_UK][7] = 58, -+ [0][0][0][0][RTW89_FCC][8] = 78, -+ [0][0][0][0][RTW89_ETSI][8] = 58, -+ [0][0][0][0][RTW89_MKK][8] = 68, -+ [0][0][0][0][RTW89_IC][8] = 78, -+ [0][0][0][0][RTW89_KCC][8] = 70, -+ [0][0][0][0][RTW89_ACMA][8] = 58, -+ [0][0][0][0][RTW89_CHILE][8] = 64, -+ [0][0][0][0][RTW89_UKRAINE][8] = 58, -+ [0][0][0][0][RTW89_MEXICO][8] = 78, -+ [0][0][0][0][RTW89_CN][8] = 58, -+ [0][0][0][0][RTW89_QATAR][8] = 58, -+ [0][0][0][0][RTW89_UK][8] = 58, -+ [0][0][0][0][RTW89_FCC][9] = 78, -+ [0][0][0][0][RTW89_ETSI][9] = 58, -+ [0][0][0][0][RTW89_MKK][9] = 68, -+ [0][0][0][0][RTW89_IC][9] = 78, -+ [0][0][0][0][RTW89_KCC][9] = 70, -+ [0][0][0][0][RTW89_ACMA][9] = 58, -+ [0][0][0][0][RTW89_CHILE][9] = 64, -+ [0][0][0][0][RTW89_UKRAINE][9] = 58, -+ [0][0][0][0][RTW89_MEXICO][9] = 78, -+ [0][0][0][0][RTW89_CN][9] = 58, -+ [0][0][0][0][RTW89_QATAR][9] = 58, -+ [0][0][0][0][RTW89_UK][9] = 58, -+ [0][0][0][0][RTW89_FCC][10] = 78, -+ [0][0][0][0][RTW89_ETSI][10] = 58, -+ [0][0][0][0][RTW89_MKK][10] = 68, -+ [0][0][0][0][RTW89_IC][10] = 78, -+ [0][0][0][0][RTW89_KCC][10] = 70, -+ [0][0][0][0][RTW89_ACMA][10] = 58, -+ [0][0][0][0][RTW89_CHILE][10] = 66, -+ [0][0][0][0][RTW89_UKRAINE][10] = 58, -+ [0][0][0][0][RTW89_MEXICO][10] = 78, -+ [0][0][0][0][RTW89_CN][10] = 58, -+ [0][0][0][0][RTW89_QATAR][10] = 58, -+ [0][0][0][0][RTW89_UK][10] = 58, -+ [0][0][0][0][RTW89_FCC][11] = 70, -+ [0][0][0][0][RTW89_ETSI][11] = 58, -+ [0][0][0][0][RTW89_MKK][11] = 68, -+ [0][0][0][0][RTW89_IC][11] = 70, -+ [0][0][0][0][RTW89_KCC][11] = 70, -+ [0][0][0][0][RTW89_ACMA][11] = 58, -+ [0][0][0][0][RTW89_CHILE][11] = 64, -+ [0][0][0][0][RTW89_UKRAINE][11] = 58, -+ [0][0][0][0][RTW89_MEXICO][11] = 70, -+ [0][0][0][0][RTW89_CN][11] = 58, -+ [0][0][0][0][RTW89_QATAR][11] = 58, -+ [0][0][0][0][RTW89_UK][11] = 58, -+ [0][0][0][0][RTW89_FCC][12] = 56, -+ [0][0][0][0][RTW89_ETSI][12] = 58, -+ [0][0][0][0][RTW89_MKK][12] = 68, -+ [0][0][0][0][RTW89_IC][12] = 56, -+ [0][0][0][0][RTW89_KCC][12] = 70, -+ [0][0][0][0][RTW89_ACMA][12] = 58, -+ [0][0][0][0][RTW89_CHILE][12] = 56, -+ [0][0][0][0][RTW89_UKRAINE][12] = 58, -+ [0][0][0][0][RTW89_MEXICO][12] = 56, -+ [0][0][0][0][RTW89_CN][12] = 58, -+ [0][0][0][0][RTW89_QATAR][12] = 58, -+ [0][0][0][0][RTW89_UK][12] = 58, -+ [0][0][0][0][RTW89_FCC][13] = 127, -+ [0][0][0][0][RTW89_ETSI][13] = 127, -+ [0][0][0][0][RTW89_MKK][13] = 76, -+ [0][0][0][0][RTW89_IC][13] = 127, -+ [0][0][0][0][RTW89_KCC][13] = 127, -+ [0][0][0][0][RTW89_ACMA][13] = 127, -+ [0][0][0][0][RTW89_CHILE][13] = 127, -+ [0][0][0][0][RTW89_UKRAINE][13] = 127, -+ [0][0][0][0][RTW89_MEXICO][13] = 127, -+ [0][0][0][0][RTW89_CN][13] = 127, -+ [0][0][0][0][RTW89_QATAR][13] = 127, -+ [0][0][0][0][RTW89_UK][13] = 127, -+ [0][1][0][0][RTW89_FCC][0] = 74, -+ [0][1][0][0][RTW89_ETSI][0] = 46, -+ [0][1][0][0][RTW89_MKK][0] = 56, -+ [0][1][0][0][RTW89_IC][0] = 74, -+ [0][1][0][0][RTW89_KCC][0] = 58, -+ [0][1][0][0][RTW89_ACMA][0] = 46, -+ [0][1][0][0][RTW89_CHILE][0] = 50, -+ [0][1][0][0][RTW89_UKRAINE][0] = 46, -+ [0][1][0][0][RTW89_MEXICO][0] = 74, -+ [0][1][0][0][RTW89_CN][0] = 46, -+ [0][1][0][0][RTW89_QATAR][0] = 46, -+ [0][1][0][0][RTW89_UK][0] = 46, -+ [0][1][0][0][RTW89_FCC][1] = 74, -+ [0][1][0][0][RTW89_ETSI][1] = 46, -+ [0][1][0][0][RTW89_MKK][1] = 56, -+ [0][1][0][0][RTW89_IC][1] = 74, -+ [0][1][0][0][RTW89_KCC][1] = 58, -+ [0][1][0][0][RTW89_ACMA][1] = 46, -+ [0][1][0][0][RTW89_CHILE][1] = 50, -+ [0][1][0][0][RTW89_UKRAINE][1] = 46, -+ [0][1][0][0][RTW89_MEXICO][1] = 74, -+ [0][1][0][0][RTW89_CN][1] = 46, -+ [0][1][0][0][RTW89_QATAR][1] = 46, -+ [0][1][0][0][RTW89_UK][1] = 46, -+ [0][1][0][0][RTW89_FCC][2] = 74, -+ [0][1][0][0][RTW89_ETSI][2] = 46, -+ [0][1][0][0][RTW89_MKK][2] = 56, -+ [0][1][0][0][RTW89_IC][2] = 74, -+ [0][1][0][0][RTW89_KCC][2] = 58, -+ [0][1][0][0][RTW89_ACMA][2] = 46, -+ [0][1][0][0][RTW89_CHILE][2] = 50, -+ [0][1][0][0][RTW89_UKRAINE][2] = 46, -+ [0][1][0][0][RTW89_MEXICO][2] = 74, -+ [0][1][0][0][RTW89_CN][2] = 46, -+ [0][1][0][0][RTW89_QATAR][2] = 46, -+ [0][1][0][0][RTW89_UK][2] = 46, -+ [0][1][0][0][RTW89_FCC][3] = 74, -+ [0][1][0][0][RTW89_ETSI][3] = 46, -+ [0][1][0][0][RTW89_MKK][3] = 56, -+ [0][1][0][0][RTW89_IC][3] = 74, -+ [0][1][0][0][RTW89_KCC][3] = 58, -+ [0][1][0][0][RTW89_ACMA][3] = 46, -+ [0][1][0][0][RTW89_CHILE][3] = 50, -+ [0][1][0][0][RTW89_UKRAINE][3] = 46, -+ [0][1][0][0][RTW89_MEXICO][3] = 74, -+ [0][1][0][0][RTW89_CN][3] = 46, -+ [0][1][0][0][RTW89_QATAR][3] = 46, -+ [0][1][0][0][RTW89_UK][3] = 46, -+ [0][1][0][0][RTW89_FCC][4] = 74, -+ [0][1][0][0][RTW89_ETSI][4] = 46, -+ [0][1][0][0][RTW89_MKK][4] = 56, -+ [0][1][0][0][RTW89_IC][4] = 74, -+ [0][1][0][0][RTW89_KCC][4] = 56, -+ [0][1][0][0][RTW89_ACMA][4] = 46, -+ [0][1][0][0][RTW89_CHILE][4] = 50, -+ [0][1][0][0][RTW89_UKRAINE][4] = 46, -+ [0][1][0][0][RTW89_MEXICO][4] = 74, -+ [0][1][0][0][RTW89_CN][4] = 46, -+ [0][1][0][0][RTW89_QATAR][4] = 46, -+ [0][1][0][0][RTW89_UK][4] = 46, -+ [0][1][0][0][RTW89_FCC][5] = 74, -+ [0][1][0][0][RTW89_ETSI][5] = 46, -+ [0][1][0][0][RTW89_MKK][5] = 56, -+ [0][1][0][0][RTW89_IC][5] = 74, -+ [0][1][0][0][RTW89_KCC][5] = 56, -+ [0][1][0][0][RTW89_ACMA][5] = 46, -+ [0][1][0][0][RTW89_CHILE][5] = 50, -+ [0][1][0][0][RTW89_UKRAINE][5] = 46, -+ [0][1][0][0][RTW89_MEXICO][5] = 74, -+ [0][1][0][0][RTW89_CN][5] = 46, -+ [0][1][0][0][RTW89_QATAR][5] = 46, -+ [0][1][0][0][RTW89_UK][5] = 46, -+ [0][1][0][0][RTW89_FCC][6] = 74, -+ [0][1][0][0][RTW89_ETSI][6] = 46, -+ [0][1][0][0][RTW89_MKK][6] = 56, -+ [0][1][0][0][RTW89_IC][6] = 74, -+ [0][1][0][0][RTW89_KCC][6] = 56, -+ [0][1][0][0][RTW89_ACMA][6] = 46, -+ [0][1][0][0][RTW89_CHILE][6] = 52, -+ [0][1][0][0][RTW89_UKRAINE][6] = 46, -+ [0][1][0][0][RTW89_MEXICO][6] = 74, -+ [0][1][0][0][RTW89_CN][6] = 46, -+ [0][1][0][0][RTW89_QATAR][6] = 46, -+ [0][1][0][0][RTW89_UK][6] = 46, -+ [0][1][0][0][RTW89_FCC][7] = 74, -+ [0][1][0][0][RTW89_ETSI][7] = 46, -+ [0][1][0][0][RTW89_MKK][7] = 56, -+ [0][1][0][0][RTW89_IC][7] = 74, -+ [0][1][0][0][RTW89_KCC][7] = 56, -+ [0][1][0][0][RTW89_ACMA][7] = 46, -+ [0][1][0][0][RTW89_CHILE][7] = 50, -+ [0][1][0][0][RTW89_UKRAINE][7] = 46, -+ [0][1][0][0][RTW89_MEXICO][7] = 74, -+ [0][1][0][0][RTW89_CN][7] = 46, -+ [0][1][0][0][RTW89_QATAR][7] = 46, -+ [0][1][0][0][RTW89_UK][7] = 46, -+ [0][1][0][0][RTW89_FCC][8] = 74, -+ [0][1][0][0][RTW89_ETSI][8] = 46, -+ [0][1][0][0][RTW89_MKK][8] = 56, -+ [0][1][0][0][RTW89_IC][8] = 74, -+ [0][1][0][0][RTW89_KCC][8] = 56, -+ [0][1][0][0][RTW89_ACMA][8] = 46, -+ [0][1][0][0][RTW89_CHILE][8] = 50, -+ [0][1][0][0][RTW89_UKRAINE][8] = 46, -+ [0][1][0][0][RTW89_MEXICO][8] = 74, -+ [0][1][0][0][RTW89_CN][8] = 46, -+ [0][1][0][0][RTW89_QATAR][8] = 46, -+ [0][1][0][0][RTW89_UK][8] = 46, -+ [0][1][0][0][RTW89_FCC][9] = 74, -+ [0][1][0][0][RTW89_ETSI][9] = 46, -+ [0][1][0][0][RTW89_MKK][9] = 56, -+ [0][1][0][0][RTW89_IC][9] = 74, -+ [0][1][0][0][RTW89_KCC][9] = 54, -+ [0][1][0][0][RTW89_ACMA][9] = 46, -+ [0][1][0][0][RTW89_CHILE][9] = 50, -+ [0][1][0][0][RTW89_UKRAINE][9] = 46, -+ [0][1][0][0][RTW89_MEXICO][9] = 74, -+ [0][1][0][0][RTW89_CN][9] = 46, -+ [0][1][0][0][RTW89_QATAR][9] = 46, -+ [0][1][0][0][RTW89_UK][9] = 46, -+ [0][1][0][0][RTW89_FCC][10] = 74, -+ [0][1][0][0][RTW89_ETSI][10] = 46, -+ [0][1][0][0][RTW89_MKK][10] = 56, -+ [0][1][0][0][RTW89_IC][10] = 74, -+ [0][1][0][0][RTW89_KCC][10] = 54, -+ [0][1][0][0][RTW89_ACMA][10] = 46, -+ [0][1][0][0][RTW89_CHILE][10] = 52, -+ [0][1][0][0][RTW89_UKRAINE][10] = 46, -+ [0][1][0][0][RTW89_MEXICO][10] = 74, -+ [0][1][0][0][RTW89_CN][10] = 46, -+ [0][1][0][0][RTW89_QATAR][10] = 46, -+ [0][1][0][0][RTW89_UK][10] = 46, -+ [0][1][0][0][RTW89_FCC][11] = 54, -+ [0][1][0][0][RTW89_ETSI][11] = 46, -+ [0][1][0][0][RTW89_MKK][11] = 56, -+ [0][1][0][0][RTW89_IC][11] = 54, -+ [0][1][0][0][RTW89_KCC][11] = 54, -+ [0][1][0][0][RTW89_ACMA][11] = 46, -+ [0][1][0][0][RTW89_CHILE][11] = 50, -+ [0][1][0][0][RTW89_UKRAINE][11] = 46, -+ [0][1][0][0][RTW89_MEXICO][11] = 54, -+ [0][1][0][0][RTW89_CN][11] = 46, -+ [0][1][0][0][RTW89_QATAR][11] = 46, -+ [0][1][0][0][RTW89_UK][11] = 46, -+ [0][1][0][0][RTW89_FCC][12] = 42, -+ [0][1][0][0][RTW89_ETSI][12] = 46, -+ [0][1][0][0][RTW89_MKK][12] = 56, -+ [0][1][0][0][RTW89_IC][12] = 42, -+ [0][1][0][0][RTW89_KCC][12] = 54, -+ [0][1][0][0][RTW89_ACMA][12] = 46, -+ [0][1][0][0][RTW89_CHILE][12] = 42, -+ [0][1][0][0][RTW89_UKRAINE][12] = 46, -+ [0][1][0][0][RTW89_MEXICO][12] = 42, -+ [0][1][0][0][RTW89_CN][12] = 46, -+ [0][1][0][0][RTW89_QATAR][12] = 46, -+ [0][1][0][0][RTW89_UK][12] = 46, -+ [0][1][0][0][RTW89_FCC][13] = 127, -+ [0][1][0][0][RTW89_ETSI][13] = 127, -+ [0][1][0][0][RTW89_MKK][13] = 64, -+ [0][1][0][0][RTW89_IC][13] = 127, -+ [0][1][0][0][RTW89_KCC][13] = 127, -+ [0][1][0][0][RTW89_ACMA][13] = 127, -+ [0][1][0][0][RTW89_CHILE][13] = 127, -+ [0][1][0][0][RTW89_UKRAINE][13] = 127, -+ [0][1][0][0][RTW89_MEXICO][13] = 127, -+ [0][1][0][0][RTW89_CN][13] = 127, -+ [0][1][0][0][RTW89_QATAR][13] = 127, -+ [0][1][0][0][RTW89_UK][13] = 127, -+ [1][0][0][0][RTW89_FCC][0] = 127, -+ [1][0][0][0][RTW89_ETSI][0] = 127, -+ [1][0][0][0][RTW89_MKK][0] = 127, -+ [1][0][0][0][RTW89_IC][0] = 127, -+ [1][0][0][0][RTW89_KCC][0] = 127, -+ [1][0][0][0][RTW89_ACMA][0] = 127, -+ [1][0][0][0][RTW89_CHILE][0] = 127, -+ [1][0][0][0][RTW89_UKRAINE][0] = 127, -+ [1][0][0][0][RTW89_MEXICO][0] = 127, -+ [1][0][0][0][RTW89_CN][0] = 127, -+ [1][0][0][0][RTW89_QATAR][0] = 127, -+ [1][0][0][0][RTW89_UK][0] = 127, -+ [1][0][0][0][RTW89_FCC][1] = 127, -+ [1][0][0][0][RTW89_ETSI][1] = 127, -+ [1][0][0][0][RTW89_MKK][1] = 127, -+ [1][0][0][0][RTW89_IC][1] = 127, -+ [1][0][0][0][RTW89_KCC][1] = 127, -+ [1][0][0][0][RTW89_ACMA][1] = 127, -+ [1][0][0][0][RTW89_CHILE][1] = 127, -+ [1][0][0][0][RTW89_UKRAINE][1] = 127, -+ [1][0][0][0][RTW89_MEXICO][1] = 127, -+ [1][0][0][0][RTW89_CN][1] = 127, -+ [1][0][0][0][RTW89_QATAR][1] = 127, -+ [1][0][0][0][RTW89_UK][1] = 127, -+ [1][0][0][0][RTW89_FCC][2] = 50, -+ [1][0][0][0][RTW89_ETSI][2] = 58, -+ [1][0][0][0][RTW89_MKK][2] = 76, -+ [1][0][0][0][RTW89_IC][2] = 50, -+ [1][0][0][0][RTW89_KCC][2] = 70, -+ [1][0][0][0][RTW89_ACMA][2] = 58, -+ [1][0][0][0][RTW89_CHILE][2] = 62, -+ [1][0][0][0][RTW89_UKRAINE][2] = 58, -+ [1][0][0][0][RTW89_MEXICO][2] = 50, -+ [1][0][0][0][RTW89_CN][2] = 58, -+ [1][0][0][0][RTW89_QATAR][2] = 58, -+ [1][0][0][0][RTW89_UK][2] = 58, -+ [1][0][0][0][RTW89_FCC][3] = 50, -+ [1][0][0][0][RTW89_ETSI][3] = 58, -+ [1][0][0][0][RTW89_MKK][3] = 76, -+ [1][0][0][0][RTW89_IC][3] = 50, -+ [1][0][0][0][RTW89_KCC][3] = 70, -+ [1][0][0][0][RTW89_ACMA][3] = 58, -+ [1][0][0][0][RTW89_CHILE][3] = 62, -+ [1][0][0][0][RTW89_UKRAINE][3] = 58, -+ [1][0][0][0][RTW89_MEXICO][3] = 50, -+ [1][0][0][0][RTW89_CN][3] = 58, -+ [1][0][0][0][RTW89_QATAR][3] = 58, -+ [1][0][0][0][RTW89_UK][3] = 58, -+ [1][0][0][0][RTW89_FCC][4] = 50, -+ [1][0][0][0][RTW89_ETSI][4] = 58, -+ [1][0][0][0][RTW89_MKK][4] = 76, -+ [1][0][0][0][RTW89_IC][4] = 50, -+ [1][0][0][0][RTW89_KCC][4] = 70, -+ [1][0][0][0][RTW89_ACMA][4] = 58, -+ [1][0][0][0][RTW89_CHILE][4] = 62, -+ [1][0][0][0][RTW89_UKRAINE][4] = 58, -+ [1][0][0][0][RTW89_MEXICO][4] = 50, -+ [1][0][0][0][RTW89_CN][4] = 58, -+ [1][0][0][0][RTW89_QATAR][4] = 58, -+ [1][0][0][0][RTW89_UK][4] = 58, -+ [1][0][0][0][RTW89_FCC][5] = 66, -+ [1][0][0][0][RTW89_ETSI][5] = 58, -+ [1][0][0][0][RTW89_MKK][5] = 76, -+ [1][0][0][0][RTW89_IC][5] = 66, -+ [1][0][0][0][RTW89_KCC][5] = 70, -+ [1][0][0][0][RTW89_ACMA][5] = 58, -+ [1][0][0][0][RTW89_CHILE][5] = 62, -+ [1][0][0][0][RTW89_UKRAINE][5] = 58, -+ [1][0][0][0][RTW89_MEXICO][5] = 66, -+ [1][0][0][0][RTW89_CN][5] = 58, -+ [1][0][0][0][RTW89_QATAR][5] = 58, -+ [1][0][0][0][RTW89_UK][5] = 58, -+ [1][0][0][0][RTW89_FCC][6] = 50, -+ [1][0][0][0][RTW89_ETSI][6] = 58, -+ [1][0][0][0][RTW89_MKK][6] = 76, -+ [1][0][0][0][RTW89_IC][6] = 50, -+ [1][0][0][0][RTW89_KCC][6] = 70, -+ [1][0][0][0][RTW89_ACMA][6] = 58, -+ [1][0][0][0][RTW89_CHILE][6] = 62, -+ [1][0][0][0][RTW89_UKRAINE][6] = 58, -+ [1][0][0][0][RTW89_MEXICO][6] = 50, -+ [1][0][0][0][RTW89_CN][6] = 58, -+ [1][0][0][0][RTW89_QATAR][6] = 58, -+ [1][0][0][0][RTW89_UK][6] = 58, -+ [1][0][0][0][RTW89_FCC][7] = 50, -+ [1][0][0][0][RTW89_ETSI][7] = 58, -+ [1][0][0][0][RTW89_MKK][7] = 76, -+ [1][0][0][0][RTW89_IC][7] = 50, -+ [1][0][0][0][RTW89_KCC][7] = 70, -+ [1][0][0][0][RTW89_ACMA][7] = 58, -+ [1][0][0][0][RTW89_CHILE][7] = 62, -+ [1][0][0][0][RTW89_UKRAINE][7] = 58, -+ [1][0][0][0][RTW89_MEXICO][7] = 50, -+ [1][0][0][0][RTW89_CN][7] = 58, -+ [1][0][0][0][RTW89_QATAR][7] = 58, -+ [1][0][0][0][RTW89_UK][7] = 58, -+ [1][0][0][0][RTW89_FCC][8] = 50, -+ [1][0][0][0][RTW89_ETSI][8] = 58, -+ [1][0][0][0][RTW89_MKK][8] = 76, -+ [1][0][0][0][RTW89_IC][8] = 50, -+ [1][0][0][0][RTW89_KCC][8] = 70, -+ [1][0][0][0][RTW89_ACMA][8] = 58, -+ [1][0][0][0][RTW89_CHILE][8] = 62, -+ [1][0][0][0][RTW89_UKRAINE][8] = 58, -+ [1][0][0][0][RTW89_MEXICO][8] = 50, -+ [1][0][0][0][RTW89_CN][8] = 58, -+ [1][0][0][0][RTW89_QATAR][8] = 58, -+ [1][0][0][0][RTW89_UK][8] = 58, -+ [1][0][0][0][RTW89_FCC][9] = 42, -+ [1][0][0][0][RTW89_ETSI][9] = 58, -+ [1][0][0][0][RTW89_MKK][9] = 76, -+ [1][0][0][0][RTW89_IC][9] = 42, -+ [1][0][0][0][RTW89_KCC][9] = 70, -+ [1][0][0][0][RTW89_ACMA][9] = 58, -+ [1][0][0][0][RTW89_CHILE][9] = 42, -+ [1][0][0][0][RTW89_UKRAINE][9] = 58, -+ [1][0][0][0][RTW89_MEXICO][9] = 42, -+ [1][0][0][0][RTW89_CN][9] = 58, -+ [1][0][0][0][RTW89_QATAR][9] = 58, -+ [1][0][0][0][RTW89_UK][9] = 58, -+ [1][0][0][0][RTW89_FCC][10] = 30, -+ [1][0][0][0][RTW89_ETSI][10] = 58, -+ [1][0][0][0][RTW89_MKK][10] = 72, -+ [1][0][0][0][RTW89_IC][10] = 30, -+ [1][0][0][0][RTW89_KCC][10] = 70, -+ [1][0][0][0][RTW89_ACMA][10] = 58, -+ [1][0][0][0][RTW89_CHILE][10] = 30, -+ [1][0][0][0][RTW89_UKRAINE][10] = 58, -+ [1][0][0][0][RTW89_MEXICO][10] = 30, -+ [1][0][0][0][RTW89_CN][10] = 58, -+ [1][0][0][0][RTW89_QATAR][10] = 58, -+ [1][0][0][0][RTW89_UK][10] = 58, -+ [1][0][0][0][RTW89_FCC][11] = 127, -+ [1][0][0][0][RTW89_ETSI][11] = 127, -+ [1][0][0][0][RTW89_MKK][11] = 127, -+ [1][0][0][0][RTW89_IC][11] = 127, -+ [1][0][0][0][RTW89_KCC][11] = 127, -+ [1][0][0][0][RTW89_ACMA][11] = 127, -+ [1][0][0][0][RTW89_CHILE][11] = 127, -+ [1][0][0][0][RTW89_UKRAINE][11] = 127, -+ [1][0][0][0][RTW89_MEXICO][11] = 127, -+ [1][0][0][0][RTW89_CN][11] = 127, -+ [1][0][0][0][RTW89_QATAR][11] = 127, -+ [1][0][0][0][RTW89_UK][11] = 127, -+ [1][0][0][0][RTW89_FCC][12] = 127, -+ [1][0][0][0][RTW89_ETSI][12] = 127, -+ [1][0][0][0][RTW89_MKK][12] = 127, -+ [1][0][0][0][RTW89_IC][12] = 127, -+ [1][0][0][0][RTW89_KCC][12] = 127, -+ [1][0][0][0][RTW89_ACMA][12] = 127, -+ [1][0][0][0][RTW89_CHILE][12] = 127, -+ [1][0][0][0][RTW89_UKRAINE][12] = 127, -+ [1][0][0][0][RTW89_MEXICO][12] = 127, -+ [1][0][0][0][RTW89_CN][12] = 127, -+ [1][0][0][0][RTW89_QATAR][12] = 127, -+ [1][0][0][0][RTW89_UK][12] = 127, -+ [1][0][0][0][RTW89_FCC][13] = 127, -+ [1][0][0][0][RTW89_ETSI][13] = 127, -+ [1][0][0][0][RTW89_MKK][13] = 127, -+ [1][0][0][0][RTW89_IC][13] = 127, -+ [1][0][0][0][RTW89_KCC][13] = 127, -+ [1][0][0][0][RTW89_ACMA][13] = 127, -+ [1][0][0][0][RTW89_CHILE][13] = 127, -+ [1][0][0][0][RTW89_UKRAINE][13] = 127, -+ [1][0][0][0][RTW89_MEXICO][13] = 127, -+ [1][0][0][0][RTW89_CN][13] = 127, -+ [1][0][0][0][RTW89_QATAR][13] = 127, -+ [1][0][0][0][RTW89_UK][13] = 127, -+ [1][1][0][0][RTW89_FCC][0] = 127, -+ [1][1][0][0][RTW89_ETSI][0] = 127, -+ [1][1][0][0][RTW89_MKK][0] = 127, -+ [1][1][0][0][RTW89_IC][0] = 127, -+ [1][1][0][0][RTW89_KCC][0] = 127, -+ [1][1][0][0][RTW89_ACMA][0] = 127, -+ [1][1][0][0][RTW89_CHILE][0] = 127, -+ [1][1][0][0][RTW89_UKRAINE][0] = 127, -+ [1][1][0][0][RTW89_MEXICO][0] = 127, -+ [1][1][0][0][RTW89_CN][0] = 127, -+ [1][1][0][0][RTW89_QATAR][0] = 127, -+ [1][1][0][0][RTW89_UK][0] = 127, -+ [1][1][0][0][RTW89_FCC][1] = 127, -+ [1][1][0][0][RTW89_ETSI][1] = 127, -+ [1][1][0][0][RTW89_MKK][1] = 127, -+ [1][1][0][0][RTW89_IC][1] = 127, -+ [1][1][0][0][RTW89_KCC][1] = 127, -+ [1][1][0][0][RTW89_ACMA][1] = 127, -+ [1][1][0][0][RTW89_CHILE][1] = 127, -+ [1][1][0][0][RTW89_UKRAINE][1] = 127, -+ [1][1][0][0][RTW89_MEXICO][1] = 127, -+ [1][1][0][0][RTW89_CN][1] = 127, -+ [1][1][0][0][RTW89_QATAR][1] = 127, -+ [1][1][0][0][RTW89_UK][1] = 127, -+ [1][1][0][0][RTW89_FCC][2] = 46, -+ [1][1][0][0][RTW89_ETSI][2] = 46, -+ [1][1][0][0][RTW89_MKK][2] = 64, -+ [1][1][0][0][RTW89_IC][2] = 46, -+ [1][1][0][0][RTW89_KCC][2] = 58, -+ [1][1][0][0][RTW89_ACMA][2] = 46, -+ [1][1][0][0][RTW89_CHILE][2] = 50, -+ [1][1][0][0][RTW89_UKRAINE][2] = 46, -+ [1][1][0][0][RTW89_MEXICO][2] = 46, -+ [1][1][0][0][RTW89_CN][2] = 46, -+ [1][1][0][0][RTW89_QATAR][2] = 46, -+ [1][1][0][0][RTW89_UK][2] = 46, -+ [1][1][0][0][RTW89_FCC][3] = 46, -+ [1][1][0][0][RTW89_ETSI][3] = 46, -+ [1][1][0][0][RTW89_MKK][3] = 64, -+ [1][1][0][0][RTW89_IC][3] = 46, -+ [1][1][0][0][RTW89_KCC][3] = 58, -+ [1][1][0][0][RTW89_ACMA][3] = 46, -+ [1][1][0][0][RTW89_CHILE][3] = 50, -+ [1][1][0][0][RTW89_UKRAINE][3] = 46, -+ [1][1][0][0][RTW89_MEXICO][3] = 46, -+ [1][1][0][0][RTW89_CN][3] = 46, -+ [1][1][0][0][RTW89_QATAR][3] = 46, -+ [1][1][0][0][RTW89_UK][3] = 46, -+ [1][1][0][0][RTW89_FCC][4] = 46, -+ [1][1][0][0][RTW89_ETSI][4] = 46, -+ [1][1][0][0][RTW89_MKK][4] = 64, -+ [1][1][0][0][RTW89_IC][4] = 46, -+ [1][1][0][0][RTW89_KCC][4] = 58, -+ [1][1][0][0][RTW89_ACMA][4] = 46, -+ [1][1][0][0][RTW89_CHILE][4] = 50, -+ [1][1][0][0][RTW89_UKRAINE][4] = 46, -+ [1][1][0][0][RTW89_MEXICO][4] = 46, -+ [1][1][0][0][RTW89_CN][4] = 46, -+ [1][1][0][0][RTW89_QATAR][4] = 46, -+ [1][1][0][0][RTW89_UK][4] = 46, -+ [1][1][0][0][RTW89_FCC][5] = 62, -+ [1][1][0][0][RTW89_ETSI][5] = 46, -+ [1][1][0][0][RTW89_MKK][5] = 64, -+ [1][1][0][0][RTW89_IC][5] = 62, -+ [1][1][0][0][RTW89_KCC][5] = 58, -+ [1][1][0][0][RTW89_ACMA][5] = 46, -+ [1][1][0][0][RTW89_CHILE][5] = 50, -+ [1][1][0][0][RTW89_UKRAINE][5] = 46, -+ [1][1][0][0][RTW89_MEXICO][5] = 62, -+ [1][1][0][0][RTW89_CN][5] = 46, -+ [1][1][0][0][RTW89_QATAR][5] = 46, -+ [1][1][0][0][RTW89_UK][5] = 46, -+ [1][1][0][0][RTW89_FCC][6] = 34, -+ [1][1][0][0][RTW89_ETSI][6] = 46, -+ [1][1][0][0][RTW89_MKK][6] = 64, -+ [1][1][0][0][RTW89_IC][6] = 34, -+ [1][1][0][0][RTW89_KCC][6] = 58, -+ [1][1][0][0][RTW89_ACMA][6] = 46, -+ [1][1][0][0][RTW89_CHILE][6] = 50, -+ [1][1][0][0][RTW89_UKRAINE][6] = 46, -+ [1][1][0][0][RTW89_MEXICO][6] = 34, -+ [1][1][0][0][RTW89_CN][6] = 46, -+ [1][1][0][0][RTW89_QATAR][6] = 46, -+ [1][1][0][0][RTW89_UK][6] = 46, -+ [1][1][0][0][RTW89_FCC][7] = 34, -+ [1][1][0][0][RTW89_ETSI][7] = 46, -+ [1][1][0][0][RTW89_MKK][7] = 64, -+ [1][1][0][0][RTW89_IC][7] = 34, -+ [1][1][0][0][RTW89_KCC][7] = 58, -+ [1][1][0][0][RTW89_ACMA][7] = 46, -+ [1][1][0][0][RTW89_CHILE][7] = 50, -+ [1][1][0][0][RTW89_UKRAINE][7] = 46, -+ [1][1][0][0][RTW89_MEXICO][7] = 34, -+ [1][1][0][0][RTW89_CN][7] = 46, -+ [1][1][0][0][RTW89_QATAR][7] = 46, -+ [1][1][0][0][RTW89_UK][7] = 46, -+ [1][1][0][0][RTW89_FCC][8] = 34, -+ [1][1][0][0][RTW89_ETSI][8] = 46, -+ [1][1][0][0][RTW89_MKK][8] = 64, -+ [1][1][0][0][RTW89_IC][8] = 34, -+ [1][1][0][0][RTW89_KCC][8] = 58, -+ [1][1][0][0][RTW89_ACMA][8] = 46, -+ [1][1][0][0][RTW89_CHILE][8] = 50, -+ [1][1][0][0][RTW89_UKRAINE][8] = 46, -+ [1][1][0][0][RTW89_MEXICO][8] = 34, -+ [1][1][0][0][RTW89_CN][8] = 46, -+ [1][1][0][0][RTW89_QATAR][8] = 46, -+ [1][1][0][0][RTW89_UK][8] = 46, -+ [1][1][0][0][RTW89_FCC][9] = 30, -+ [1][1][0][0][RTW89_ETSI][9] = 46, -+ [1][1][0][0][RTW89_MKK][9] = 64, -+ [1][1][0][0][RTW89_IC][9] = 30, -+ [1][1][0][0][RTW89_KCC][9] = 58, -+ [1][1][0][0][RTW89_ACMA][9] = 46, -+ [1][1][0][0][RTW89_CHILE][9] = 30, -+ [1][1][0][0][RTW89_UKRAINE][9] = 46, -+ [1][1][0][0][RTW89_MEXICO][9] = 30, -+ [1][1][0][0][RTW89_CN][9] = 46, -+ [1][1][0][0][RTW89_QATAR][9] = 46, -+ [1][1][0][0][RTW89_UK][9] = 46, -+ [1][1][0][0][RTW89_FCC][10] = 30, -+ [1][1][0][0][RTW89_ETSI][10] = 46, -+ [1][1][0][0][RTW89_MKK][10] = 64, -+ [1][1][0][0][RTW89_IC][10] = 30, -+ [1][1][0][0][RTW89_KCC][10] = 58, -+ [1][1][0][0][RTW89_ACMA][10] = 46, -+ [1][1][0][0][RTW89_CHILE][10] = 30, -+ [1][1][0][0][RTW89_UKRAINE][10] = 46, -+ [1][1][0][0][RTW89_MEXICO][10] = 30, -+ [1][1][0][0][RTW89_CN][10] = 46, -+ [1][1][0][0][RTW89_QATAR][10] = 46, -+ [1][1][0][0][RTW89_UK][10] = 46, -+ [1][1][0][0][RTW89_FCC][11] = 127, -+ [1][1][0][0][RTW89_ETSI][11] = 127, -+ [1][1][0][0][RTW89_MKK][11] = 127, -+ [1][1][0][0][RTW89_IC][11] = 127, -+ [1][1][0][0][RTW89_KCC][11] = 127, -+ [1][1][0][0][RTW89_ACMA][11] = 127, -+ [1][1][0][0][RTW89_CHILE][11] = 127, -+ [1][1][0][0][RTW89_UKRAINE][11] = 127, -+ [1][1][0][0][RTW89_MEXICO][11] = 127, -+ [1][1][0][0][RTW89_CN][11] = 127, -+ [1][1][0][0][RTW89_QATAR][11] = 127, -+ [1][1][0][0][RTW89_UK][11] = 127, -+ [1][1][0][0][RTW89_FCC][12] = 127, -+ [1][1][0][0][RTW89_ETSI][12] = 127, -+ [1][1][0][0][RTW89_MKK][12] = 127, -+ [1][1][0][0][RTW89_IC][12] = 127, -+ [1][1][0][0][RTW89_KCC][12] = 127, -+ [1][1][0][0][RTW89_ACMA][12] = 127, -+ [1][1][0][0][RTW89_CHILE][12] = 127, -+ [1][1][0][0][RTW89_UKRAINE][12] = 127, -+ [1][1][0][0][RTW89_MEXICO][12] = 127, -+ [1][1][0][0][RTW89_CN][12] = 127, -+ [1][1][0][0][RTW89_QATAR][12] = 127, -+ [1][1][0][0][RTW89_UK][12] = 127, -+ [1][1][0][0][RTW89_FCC][13] = 127, -+ [1][1][0][0][RTW89_ETSI][13] = 127, -+ [1][1][0][0][RTW89_MKK][13] = 127, -+ [1][1][0][0][RTW89_IC][13] = 127, -+ [1][1][0][0][RTW89_KCC][13] = 127, -+ [1][1][0][0][RTW89_ACMA][13] = 127, -+ [1][1][0][0][RTW89_CHILE][13] = 127, -+ [1][1][0][0][RTW89_UKRAINE][13] = 127, -+ [1][1][0][0][RTW89_MEXICO][13] = 127, -+ [1][1][0][0][RTW89_CN][13] = 127, -+ [1][1][0][0][RTW89_QATAR][13] = 127, -+ [1][1][0][0][RTW89_UK][13] = 127, -+ [0][0][1][0][RTW89_FCC][0] = 76, -+ [0][0][1][0][RTW89_ETSI][0] = 58, -+ [0][0][1][0][RTW89_MKK][0] = 74, -+ [0][0][1][0][RTW89_IC][0] = 76, -+ [0][0][1][0][RTW89_KCC][0] = 76, -+ [0][0][1][0][RTW89_ACMA][0] = 58, -+ [0][0][1][0][RTW89_CHILE][0] = 66, -+ [0][0][1][0][RTW89_UKRAINE][0] = 58, -+ [0][0][1][0][RTW89_MEXICO][0] = 76, -+ [0][0][1][0][RTW89_CN][0] = 58, -+ [0][0][1][0][RTW89_QATAR][0] = 58, -+ [0][0][1][0][RTW89_UK][0] = 58, -+ [0][0][1][0][RTW89_FCC][1] = 76, -+ [0][0][1][0][RTW89_ETSI][1] = 58, -+ [0][0][1][0][RTW89_MKK][1] = 76, -+ [0][0][1][0][RTW89_IC][1] = 76, -+ [0][0][1][0][RTW89_KCC][1] = 76, -+ [0][0][1][0][RTW89_ACMA][1] = 58, -+ [0][0][1][0][RTW89_CHILE][1] = 66, -+ [0][0][1][0][RTW89_UKRAINE][1] = 58, -+ [0][0][1][0][RTW89_MEXICO][1] = 76, -+ [0][0][1][0][RTW89_CN][1] = 58, -+ [0][0][1][0][RTW89_QATAR][1] = 58, -+ [0][0][1][0][RTW89_UK][1] = 58, -+ [0][0][1][0][RTW89_FCC][2] = 78, -+ [0][0][1][0][RTW89_ETSI][2] = 58, -+ [0][0][1][0][RTW89_MKK][2] = 76, -+ [0][0][1][0][RTW89_IC][2] = 78, -+ [0][0][1][0][RTW89_KCC][2] = 76, -+ [0][0][1][0][RTW89_ACMA][2] = 58, -+ [0][0][1][0][RTW89_CHILE][2] = 66, -+ [0][0][1][0][RTW89_UKRAINE][2] = 58, -+ [0][0][1][0][RTW89_MEXICO][2] = 78, -+ [0][0][1][0][RTW89_CN][2] = 58, -+ [0][0][1][0][RTW89_QATAR][2] = 58, -+ [0][0][1][0][RTW89_UK][2] = 58, -+ [0][0][1][0][RTW89_FCC][3] = 78, -+ [0][0][1][0][RTW89_ETSI][3] = 58, -+ [0][0][1][0][RTW89_MKK][3] = 76, -+ [0][0][1][0][RTW89_IC][3] = 78, -+ [0][0][1][0][RTW89_KCC][3] = 76, -+ [0][0][1][0][RTW89_ACMA][3] = 58, -+ [0][0][1][0][RTW89_CHILE][3] = 66, -+ [0][0][1][0][RTW89_UKRAINE][3] = 58, -+ [0][0][1][0][RTW89_MEXICO][3] = 78, -+ [0][0][1][0][RTW89_CN][3] = 58, -+ [0][0][1][0][RTW89_QATAR][3] = 58, -+ [0][0][1][0][RTW89_UK][3] = 58, -+ [0][0][1][0][RTW89_FCC][4] = 78, -+ [0][0][1][0][RTW89_ETSI][4] = 58, -+ [0][0][1][0][RTW89_MKK][4] = 76, -+ [0][0][1][0][RTW89_IC][4] = 78, -+ [0][0][1][0][RTW89_KCC][4] = 76, -+ [0][0][1][0][RTW89_ACMA][4] = 58, -+ [0][0][1][0][RTW89_CHILE][4] = 66, -+ [0][0][1][0][RTW89_UKRAINE][4] = 58, -+ [0][0][1][0][RTW89_MEXICO][4] = 78, -+ [0][0][1][0][RTW89_CN][4] = 58, -+ [0][0][1][0][RTW89_QATAR][4] = 58, -+ [0][0][1][0][RTW89_UK][4] = 58, -+ [0][0][1][0][RTW89_FCC][5] = 78, -+ [0][0][1][0][RTW89_ETSI][5] = 58, -+ [0][0][1][0][RTW89_MKK][5] = 76, -+ [0][0][1][0][RTW89_IC][5] = 78, -+ [0][0][1][0][RTW89_KCC][5] = 76, -+ [0][0][1][0][RTW89_ACMA][5] = 58, -+ [0][0][1][0][RTW89_CHILE][5] = 66, -+ [0][0][1][0][RTW89_UKRAINE][5] = 58, -+ [0][0][1][0][RTW89_MEXICO][5] = 78, -+ [0][0][1][0][RTW89_CN][5] = 58, -+ [0][0][1][0][RTW89_QATAR][5] = 58, -+ [0][0][1][0][RTW89_UK][5] = 58, -+ [0][0][1][0][RTW89_FCC][6] = 78, -+ [0][0][1][0][RTW89_ETSI][6] = 58, -+ [0][0][1][0][RTW89_MKK][6] = 76, -+ [0][0][1][0][RTW89_IC][6] = 78, -+ [0][0][1][0][RTW89_KCC][6] = 76, -+ [0][0][1][0][RTW89_ACMA][6] = 58, -+ [0][0][1][0][RTW89_CHILE][6] = 66, -+ [0][0][1][0][RTW89_UKRAINE][6] = 58, -+ [0][0][1][0][RTW89_MEXICO][6] = 78, -+ [0][0][1][0][RTW89_CN][6] = 58, -+ [0][0][1][0][RTW89_QATAR][6] = 58, -+ [0][0][1][0][RTW89_UK][6] = 58, -+ [0][0][1][0][RTW89_FCC][7] = 78, -+ [0][0][1][0][RTW89_ETSI][7] = 58, -+ [0][0][1][0][RTW89_MKK][7] = 76, -+ [0][0][1][0][RTW89_IC][7] = 78, -+ [0][0][1][0][RTW89_KCC][7] = 76, -+ [0][0][1][0][RTW89_ACMA][7] = 58, -+ [0][0][1][0][RTW89_CHILE][7] = 66, -+ [0][0][1][0][RTW89_UKRAINE][7] = 58, -+ [0][0][1][0][RTW89_MEXICO][7] = 78, -+ [0][0][1][0][RTW89_CN][7] = 58, -+ [0][0][1][0][RTW89_QATAR][7] = 58, -+ [0][0][1][0][RTW89_UK][7] = 58, -+ [0][0][1][0][RTW89_FCC][8] = 78, -+ [0][0][1][0][RTW89_ETSI][8] = 58, -+ [0][0][1][0][RTW89_MKK][8] = 76, -+ [0][0][1][0][RTW89_IC][8] = 78, -+ [0][0][1][0][RTW89_KCC][8] = 76, -+ [0][0][1][0][RTW89_ACMA][8] = 58, -+ [0][0][1][0][RTW89_CHILE][8] = 66, -+ [0][0][1][0][RTW89_UKRAINE][8] = 58, -+ [0][0][1][0][RTW89_MEXICO][8] = 78, -+ [0][0][1][0][RTW89_CN][8] = 58, -+ [0][0][1][0][RTW89_QATAR][8] = 58, -+ [0][0][1][0][RTW89_UK][8] = 58, -+ [0][0][1][0][RTW89_FCC][9] = 74, -+ [0][0][1][0][RTW89_ETSI][9] = 58, -+ [0][0][1][0][RTW89_MKK][9] = 76, -+ [0][0][1][0][RTW89_IC][9] = 74, -+ [0][0][1][0][RTW89_KCC][9] = 76, -+ [0][0][1][0][RTW89_ACMA][9] = 58, -+ [0][0][1][0][RTW89_CHILE][9] = 66, -+ [0][0][1][0][RTW89_UKRAINE][9] = 58, -+ [0][0][1][0][RTW89_MEXICO][9] = 74, -+ [0][0][1][0][RTW89_CN][9] = 58, -+ [0][0][1][0][RTW89_QATAR][9] = 58, -+ [0][0][1][0][RTW89_UK][9] = 58, -+ [0][0][1][0][RTW89_FCC][10] = 74, -+ [0][0][1][0][RTW89_ETSI][10] = 58, -+ [0][0][1][0][RTW89_MKK][10] = 76, -+ [0][0][1][0][RTW89_IC][10] = 74, -+ [0][0][1][0][RTW89_KCC][10] = 76, -+ [0][0][1][0][RTW89_ACMA][10] = 58, -+ [0][0][1][0][RTW89_CHILE][10] = 66, -+ [0][0][1][0][RTW89_UKRAINE][10] = 58, -+ [0][0][1][0][RTW89_MEXICO][10] = 74, -+ [0][0][1][0][RTW89_CN][10] = 58, -+ [0][0][1][0][RTW89_QATAR][10] = 58, -+ [0][0][1][0][RTW89_UK][10] = 58, -+ [0][0][1][0][RTW89_FCC][11] = 54, -+ [0][0][1][0][RTW89_ETSI][11] = 58, -+ [0][0][1][0][RTW89_MKK][11] = 76, -+ [0][0][1][0][RTW89_IC][11] = 54, -+ [0][0][1][0][RTW89_KCC][11] = 76, -+ [0][0][1][0][RTW89_ACMA][11] = 58, -+ [0][0][1][0][RTW89_CHILE][11] = 54, -+ [0][0][1][0][RTW89_UKRAINE][11] = 58, -+ [0][0][1][0][RTW89_MEXICO][11] = 54, -+ [0][0][1][0][RTW89_CN][11] = 58, -+ [0][0][1][0][RTW89_QATAR][11] = 58, -+ [0][0][1][0][RTW89_UK][11] = 58, -+ [0][0][1][0][RTW89_FCC][12] = 50, -+ [0][0][1][0][RTW89_ETSI][12] = 58, -+ [0][0][1][0][RTW89_MKK][12] = 76, -+ [0][0][1][0][RTW89_IC][12] = 50, -+ [0][0][1][0][RTW89_KCC][12] = 76, -+ [0][0][1][0][RTW89_ACMA][12] = 58, -+ [0][0][1][0][RTW89_CHILE][12] = 50, -+ [0][0][1][0][RTW89_UKRAINE][12] = 58, -+ [0][0][1][0][RTW89_MEXICO][12] = 50, -+ [0][0][1][0][RTW89_CN][12] = 58, -+ [0][0][1][0][RTW89_QATAR][12] = 58, -+ [0][0][1][0][RTW89_UK][12] = 58, -+ [0][0][1][0][RTW89_FCC][13] = 127, -+ [0][0][1][0][RTW89_ETSI][13] = 127, -+ [0][0][1][0][RTW89_MKK][13] = 127, -+ [0][0][1][0][RTW89_IC][13] = 127, -+ [0][0][1][0][RTW89_KCC][13] = 127, -+ [0][0][1][0][RTW89_ACMA][13] = 127, -+ [0][0][1][0][RTW89_CHILE][13] = 127, -+ [0][0][1][0][RTW89_UKRAINE][13] = 127, -+ [0][0][1][0][RTW89_MEXICO][13] = 127, -+ [0][0][1][0][RTW89_CN][13] = 127, -+ [0][0][1][0][RTW89_QATAR][13] = 127, -+ [0][0][1][0][RTW89_UK][13] = 127, -+ [0][1][1][0][RTW89_FCC][0] = 62, -+ [0][1][1][0][RTW89_ETSI][0] = 46, -+ [0][1][1][0][RTW89_MKK][0] = 64, -+ [0][1][1][0][RTW89_IC][0] = 62, -+ [0][1][1][0][RTW89_KCC][0] = 66, -+ [0][1][1][0][RTW89_ACMA][0] = 46, -+ [0][1][1][0][RTW89_CHILE][0] = 50, -+ [0][1][1][0][RTW89_UKRAINE][0] = 46, -+ [0][1][1][0][RTW89_MEXICO][0] = 62, -+ [0][1][1][0][RTW89_CN][0] = 46, -+ [0][1][1][0][RTW89_QATAR][0] = 46, -+ [0][1][1][0][RTW89_UK][0] = 46, -+ [0][1][1][0][RTW89_FCC][1] = 62, -+ [0][1][1][0][RTW89_ETSI][1] = 46, -+ [0][1][1][0][RTW89_MKK][1] = 64, -+ [0][1][1][0][RTW89_IC][1] = 62, -+ [0][1][1][0][RTW89_KCC][1] = 66, -+ [0][1][1][0][RTW89_ACMA][1] = 46, -+ [0][1][1][0][RTW89_CHILE][1] = 50, -+ [0][1][1][0][RTW89_UKRAINE][1] = 46, -+ [0][1][1][0][RTW89_MEXICO][1] = 62, -+ [0][1][1][0][RTW89_CN][1] = 46, -+ [0][1][1][0][RTW89_QATAR][1] = 46, -+ [0][1][1][0][RTW89_UK][1] = 46, -+ [0][1][1][0][RTW89_FCC][2] = 66, -+ [0][1][1][0][RTW89_ETSI][2] = 46, -+ [0][1][1][0][RTW89_MKK][2] = 64, -+ [0][1][1][0][RTW89_IC][2] = 66, -+ [0][1][1][0][RTW89_KCC][2] = 66, -+ [0][1][1][0][RTW89_ACMA][2] = 46, -+ [0][1][1][0][RTW89_CHILE][2] = 50, -+ [0][1][1][0][RTW89_UKRAINE][2] = 46, -+ [0][1][1][0][RTW89_MEXICO][2] = 66, -+ [0][1][1][0][RTW89_CN][2] = 46, -+ [0][1][1][0][RTW89_QATAR][2] = 46, -+ [0][1][1][0][RTW89_UK][2] = 46, -+ [0][1][1][0][RTW89_FCC][3] = 70, -+ [0][1][1][0][RTW89_ETSI][3] = 46, -+ [0][1][1][0][RTW89_MKK][3] = 64, -+ [0][1][1][0][RTW89_IC][3] = 70, -+ [0][1][1][0][RTW89_KCC][3] = 66, -+ [0][1][1][0][RTW89_ACMA][3] = 46, -+ [0][1][1][0][RTW89_CHILE][3] = 50, -+ [0][1][1][0][RTW89_UKRAINE][3] = 46, -+ [0][1][1][0][RTW89_MEXICO][3] = 70, -+ [0][1][1][0][RTW89_CN][3] = 46, -+ [0][1][1][0][RTW89_QATAR][3] = 46, -+ [0][1][1][0][RTW89_UK][3] = 46, -+ [0][1][1][0][RTW89_FCC][4] = 78, -+ [0][1][1][0][RTW89_ETSI][4] = 46, -+ [0][1][1][0][RTW89_MKK][4] = 64, -+ [0][1][1][0][RTW89_IC][4] = 78, -+ [0][1][1][0][RTW89_KCC][4] = 64, -+ [0][1][1][0][RTW89_ACMA][4] = 46, -+ [0][1][1][0][RTW89_CHILE][4] = 50, -+ [0][1][1][0][RTW89_UKRAINE][4] = 46, -+ [0][1][1][0][RTW89_MEXICO][4] = 78, -+ [0][1][1][0][RTW89_CN][4] = 46, -+ [0][1][1][0][RTW89_QATAR][4] = 46, -+ [0][1][1][0][RTW89_UK][4] = 46, -+ [0][1][1][0][RTW89_FCC][5] = 78, -+ [0][1][1][0][RTW89_ETSI][5] = 46, -+ [0][1][1][0][RTW89_MKK][5] = 64, -+ [0][1][1][0][RTW89_IC][5] = 78, -+ [0][1][1][0][RTW89_KCC][5] = 64, -+ [0][1][1][0][RTW89_ACMA][5] = 46, -+ [0][1][1][0][RTW89_CHILE][5] = 50, -+ [0][1][1][0][RTW89_UKRAINE][5] = 46, -+ [0][1][1][0][RTW89_MEXICO][5] = 78, -+ [0][1][1][0][RTW89_CN][5] = 46, -+ [0][1][1][0][RTW89_QATAR][5] = 46, -+ [0][1][1][0][RTW89_UK][5] = 46, -+ [0][1][1][0][RTW89_FCC][6] = 78, -+ [0][1][1][0][RTW89_ETSI][6] = 46, -+ [0][1][1][0][RTW89_MKK][6] = 64, -+ [0][1][1][0][RTW89_IC][6] = 78, -+ [0][1][1][0][RTW89_KCC][6] = 64, -+ [0][1][1][0][RTW89_ACMA][6] = 46, -+ [0][1][1][0][RTW89_CHILE][6] = 50, -+ [0][1][1][0][RTW89_UKRAINE][6] = 46, -+ [0][1][1][0][RTW89_MEXICO][6] = 78, -+ [0][1][1][0][RTW89_CN][6] = 46, -+ [0][1][1][0][RTW89_QATAR][6] = 46, -+ [0][1][1][0][RTW89_UK][6] = 46, -+ [0][1][1][0][RTW89_FCC][7] = 70, -+ [0][1][1][0][RTW89_ETSI][7] = 46, -+ [0][1][1][0][RTW89_MKK][7] = 64, -+ [0][1][1][0][RTW89_IC][7] = 70, -+ [0][1][1][0][RTW89_KCC][7] = 64, -+ [0][1][1][0][RTW89_ACMA][7] = 46, -+ [0][1][1][0][RTW89_CHILE][7] = 50, -+ [0][1][1][0][RTW89_UKRAINE][7] = 46, -+ [0][1][1][0][RTW89_MEXICO][7] = 70, -+ [0][1][1][0][RTW89_CN][7] = 46, -+ [0][1][1][0][RTW89_QATAR][7] = 46, -+ [0][1][1][0][RTW89_UK][7] = 46, -+ [0][1][1][0][RTW89_FCC][8] = 66, -+ [0][1][1][0][RTW89_ETSI][8] = 46, -+ [0][1][1][0][RTW89_MKK][8] = 64, -+ [0][1][1][0][RTW89_IC][8] = 66, -+ [0][1][1][0][RTW89_KCC][8] = 64, -+ [0][1][1][0][RTW89_ACMA][8] = 46, -+ [0][1][1][0][RTW89_CHILE][8] = 50, -+ [0][1][1][0][RTW89_UKRAINE][8] = 46, -+ [0][1][1][0][RTW89_MEXICO][8] = 66, -+ [0][1][1][0][RTW89_CN][8] = 46, -+ [0][1][1][0][RTW89_QATAR][8] = 46, -+ [0][1][1][0][RTW89_UK][8] = 46, -+ [0][1][1][0][RTW89_FCC][9] = 62, -+ [0][1][1][0][RTW89_ETSI][9] = 46, -+ [0][1][1][0][RTW89_MKK][9] = 64, -+ [0][1][1][0][RTW89_IC][9] = 62, -+ [0][1][1][0][RTW89_KCC][9] = 64, -+ [0][1][1][0][RTW89_ACMA][9] = 46, -+ [0][1][1][0][RTW89_CHILE][9] = 50, -+ [0][1][1][0][RTW89_UKRAINE][9] = 46, -+ [0][1][1][0][RTW89_MEXICO][9] = 62, -+ [0][1][1][0][RTW89_CN][9] = 46, -+ [0][1][1][0][RTW89_QATAR][9] = 46, -+ [0][1][1][0][RTW89_UK][9] = 46, -+ [0][1][1][0][RTW89_FCC][10] = 62, -+ [0][1][1][0][RTW89_ETSI][10] = 46, -+ [0][1][1][0][RTW89_MKK][10] = 64, -+ [0][1][1][0][RTW89_IC][10] = 62, -+ [0][1][1][0][RTW89_KCC][10] = 64, -+ [0][1][1][0][RTW89_ACMA][10] = 46, -+ [0][1][1][0][RTW89_CHILE][10] = 52, -+ [0][1][1][0][RTW89_UKRAINE][10] = 46, -+ [0][1][1][0][RTW89_MEXICO][10] = 62, -+ [0][1][1][0][RTW89_CN][10] = 46, -+ [0][1][1][0][RTW89_QATAR][10] = 46, -+ [0][1][1][0][RTW89_UK][10] = 46, -+ [0][1][1][0][RTW89_FCC][11] = 46, -+ [0][1][1][0][RTW89_ETSI][11] = 46, -+ [0][1][1][0][RTW89_MKK][11] = 64, -+ [0][1][1][0][RTW89_IC][11] = 46, -+ [0][1][1][0][RTW89_KCC][11] = 64, -+ [0][1][1][0][RTW89_ACMA][11] = 46, -+ [0][1][1][0][RTW89_CHILE][11] = 46, -+ [0][1][1][0][RTW89_UKRAINE][11] = 46, -+ [0][1][1][0][RTW89_MEXICO][11] = 46, -+ [0][1][1][0][RTW89_CN][11] = 46, -+ [0][1][1][0][RTW89_QATAR][11] = 46, -+ [0][1][1][0][RTW89_UK][11] = 46, -+ [0][1][1][0][RTW89_FCC][12] = 42, -+ [0][1][1][0][RTW89_ETSI][12] = 46, -+ [0][1][1][0][RTW89_MKK][12] = 64, -+ [0][1][1][0][RTW89_IC][12] = 42, -+ [0][1][1][0][RTW89_KCC][12] = 64, -+ [0][1][1][0][RTW89_ACMA][12] = 46, -+ [0][1][1][0][RTW89_CHILE][12] = 42, -+ [0][1][1][0][RTW89_UKRAINE][12] = 46, -+ [0][1][1][0][RTW89_MEXICO][12] = 42, -+ [0][1][1][0][RTW89_CN][12] = 46, -+ [0][1][1][0][RTW89_QATAR][12] = 46, -+ [0][1][1][0][RTW89_UK][12] = 46, -+ [0][1][1][0][RTW89_FCC][13] = 127, -+ [0][1][1][0][RTW89_ETSI][13] = 127, -+ [0][1][1][0][RTW89_MKK][13] = 127, -+ [0][1][1][0][RTW89_IC][13] = 127, -+ [0][1][1][0][RTW89_KCC][13] = 127, -+ [0][1][1][0][RTW89_ACMA][13] = 127, -+ [0][1][1][0][RTW89_CHILE][13] = 127, -+ [0][1][1][0][RTW89_UKRAINE][13] = 127, -+ [0][1][1][0][RTW89_MEXICO][13] = 127, -+ [0][1][1][0][RTW89_CN][13] = 127, -+ [0][1][1][0][RTW89_QATAR][13] = 127, -+ [0][1][1][0][RTW89_UK][13] = 127, -+ [0][0][2][0][RTW89_FCC][0] = 76, -+ [0][0][2][0][RTW89_ETSI][0] = 58, -+ [0][0][2][0][RTW89_MKK][0] = 76, -+ [0][0][2][0][RTW89_IC][0] = 76, -+ [0][0][2][0][RTW89_KCC][0] = 76, -+ [0][0][2][0][RTW89_ACMA][0] = 58, -+ [0][0][2][0][RTW89_CHILE][0] = 66, -+ [0][0][2][0][RTW89_UKRAINE][0] = 58, -+ [0][0][2][0][RTW89_MEXICO][0] = 76, -+ [0][0][2][0][RTW89_CN][0] = 58, -+ [0][0][2][0][RTW89_QATAR][0] = 58, -+ [0][0][2][0][RTW89_UK][0] = 58, -+ [0][0][2][0][RTW89_FCC][1] = 76, -+ [0][0][2][0][RTW89_ETSI][1] = 58, -+ [0][0][2][0][RTW89_MKK][1] = 76, -+ [0][0][2][0][RTW89_IC][1] = 76, -+ [0][0][2][0][RTW89_KCC][1] = 76, -+ [0][0][2][0][RTW89_ACMA][1] = 58, -+ [0][0][2][0][RTW89_CHILE][1] = 66, -+ [0][0][2][0][RTW89_UKRAINE][1] = 58, -+ [0][0][2][0][RTW89_MEXICO][1] = 76, -+ [0][0][2][0][RTW89_CN][1] = 58, -+ [0][0][2][0][RTW89_QATAR][1] = 58, -+ [0][0][2][0][RTW89_UK][1] = 58, -+ [0][0][2][0][RTW89_FCC][2] = 78, -+ [0][0][2][0][RTW89_ETSI][2] = 58, -+ [0][0][2][0][RTW89_MKK][2] = 76, -+ [0][0][2][0][RTW89_IC][2] = 78, -+ [0][0][2][0][RTW89_KCC][2] = 76, -+ [0][0][2][0][RTW89_ACMA][2] = 58, -+ [0][0][2][0][RTW89_CHILE][2] = 66, -+ [0][0][2][0][RTW89_UKRAINE][2] = 58, -+ [0][0][2][0][RTW89_MEXICO][2] = 78, -+ [0][0][2][0][RTW89_CN][2] = 58, -+ [0][0][2][0][RTW89_QATAR][2] = 58, -+ [0][0][2][0][RTW89_UK][2] = 58, -+ [0][0][2][0][RTW89_FCC][3] = 78, -+ [0][0][2][0][RTW89_ETSI][3] = 58, -+ [0][0][2][0][RTW89_MKK][3] = 76, -+ [0][0][2][0][RTW89_IC][3] = 78, -+ [0][0][2][0][RTW89_KCC][3] = 76, -+ [0][0][2][0][RTW89_ACMA][3] = 58, -+ [0][0][2][0][RTW89_CHILE][3] = 66, -+ [0][0][2][0][RTW89_UKRAINE][3] = 58, -+ [0][0][2][0][RTW89_MEXICO][3] = 78, -+ [0][0][2][0][RTW89_CN][3] = 58, -+ [0][0][2][0][RTW89_QATAR][3] = 58, -+ [0][0][2][0][RTW89_UK][3] = 58, -+ [0][0][2][0][RTW89_FCC][4] = 78, -+ [0][0][2][0][RTW89_ETSI][4] = 58, -+ [0][0][2][0][RTW89_MKK][4] = 76, -+ [0][0][2][0][RTW89_IC][4] = 78, -+ [0][0][2][0][RTW89_KCC][4] = 76, -+ [0][0][2][0][RTW89_ACMA][4] = 58, -+ [0][0][2][0][RTW89_CHILE][4] = 66, -+ [0][0][2][0][RTW89_UKRAINE][4] = 58, -+ [0][0][2][0][RTW89_MEXICO][4] = 78, -+ [0][0][2][0][RTW89_CN][4] = 58, -+ [0][0][2][0][RTW89_QATAR][4] = 58, -+ [0][0][2][0][RTW89_UK][4] = 58, -+ [0][0][2][0][RTW89_FCC][5] = 78, -+ [0][0][2][0][RTW89_ETSI][5] = 58, -+ [0][0][2][0][RTW89_MKK][5] = 76, -+ [0][0][2][0][RTW89_IC][5] = 78, -+ [0][0][2][0][RTW89_KCC][5] = 76, -+ [0][0][2][0][RTW89_ACMA][5] = 58, -+ [0][0][2][0][RTW89_CHILE][5] = 66, -+ [0][0][2][0][RTW89_UKRAINE][5] = 58, -+ [0][0][2][0][RTW89_MEXICO][5] = 78, -+ [0][0][2][0][RTW89_CN][5] = 58, -+ [0][0][2][0][RTW89_QATAR][5] = 58, -+ [0][0][2][0][RTW89_UK][5] = 58, -+ [0][0][2][0][RTW89_FCC][6] = 78, -+ [0][0][2][0][RTW89_ETSI][6] = 58, -+ [0][0][2][0][RTW89_MKK][6] = 76, -+ [0][0][2][0][RTW89_IC][6] = 78, -+ [0][0][2][0][RTW89_KCC][6] = 76, -+ [0][0][2][0][RTW89_ACMA][6] = 58, -+ [0][0][2][0][RTW89_CHILE][6] = 66, -+ [0][0][2][0][RTW89_UKRAINE][6] = 58, -+ [0][0][2][0][RTW89_MEXICO][6] = 78, -+ [0][0][2][0][RTW89_CN][6] = 58, -+ [0][0][2][0][RTW89_QATAR][6] = 58, -+ [0][0][2][0][RTW89_UK][6] = 58, -+ [0][0][2][0][RTW89_FCC][7] = 78, -+ [0][0][2][0][RTW89_ETSI][7] = 58, -+ [0][0][2][0][RTW89_MKK][7] = 76, -+ [0][0][2][0][RTW89_IC][7] = 78, -+ [0][0][2][0][RTW89_KCC][7] = 76, -+ [0][0][2][0][RTW89_ACMA][7] = 58, -+ [0][0][2][0][RTW89_CHILE][7] = 66, -+ [0][0][2][0][RTW89_UKRAINE][7] = 58, -+ [0][0][2][0][RTW89_MEXICO][7] = 78, -+ [0][0][2][0][RTW89_CN][7] = 58, -+ [0][0][2][0][RTW89_QATAR][7] = 58, -+ [0][0][2][0][RTW89_UK][7] = 58, -+ [0][0][2][0][RTW89_FCC][8] = 76, -+ [0][0][2][0][RTW89_ETSI][8] = 58, -+ [0][0][2][0][RTW89_MKK][8] = 76, -+ [0][0][2][0][RTW89_IC][8] = 76, -+ [0][0][2][0][RTW89_KCC][8] = 76, -+ [0][0][2][0][RTW89_ACMA][8] = 58, -+ [0][0][2][0][RTW89_CHILE][8] = 66, -+ [0][0][2][0][RTW89_UKRAINE][8] = 58, -+ [0][0][2][0][RTW89_MEXICO][8] = 76, -+ [0][0][2][0][RTW89_CN][8] = 58, -+ [0][0][2][0][RTW89_QATAR][8] = 58, -+ [0][0][2][0][RTW89_UK][8] = 58, -+ [0][0][2][0][RTW89_FCC][9] = 72, -+ [0][0][2][0][RTW89_ETSI][9] = 58, -+ [0][0][2][0][RTW89_MKK][9] = 76, -+ [0][0][2][0][RTW89_IC][9] = 72, -+ [0][0][2][0][RTW89_KCC][9] = 76, -+ [0][0][2][0][RTW89_ACMA][9] = 58, -+ [0][0][2][0][RTW89_CHILE][9] = 66, -+ [0][0][2][0][RTW89_UKRAINE][9] = 58, -+ [0][0][2][0][RTW89_MEXICO][9] = 72, -+ [0][0][2][0][RTW89_CN][9] = 58, -+ [0][0][2][0][RTW89_QATAR][9] = 58, -+ [0][0][2][0][RTW89_UK][9] = 58, -+ [0][0][2][0][RTW89_FCC][10] = 72, -+ [0][0][2][0][RTW89_ETSI][10] = 58, -+ [0][0][2][0][RTW89_MKK][10] = 76, -+ [0][0][2][0][RTW89_IC][10] = 72, -+ [0][0][2][0][RTW89_KCC][10] = 76, -+ [0][0][2][0][RTW89_ACMA][10] = 58, -+ [0][0][2][0][RTW89_CHILE][10] = 66, -+ [0][0][2][0][RTW89_UKRAINE][10] = 58, -+ [0][0][2][0][RTW89_MEXICO][10] = 72, -+ [0][0][2][0][RTW89_CN][10] = 58, -+ [0][0][2][0][RTW89_QATAR][10] = 58, -+ [0][0][2][0][RTW89_UK][10] = 58, -+ [0][0][2][0][RTW89_FCC][11] = 54, -+ [0][0][2][0][RTW89_ETSI][11] = 58, -+ [0][0][2][0][RTW89_MKK][11] = 76, -+ [0][0][2][0][RTW89_IC][11] = 54, -+ [0][0][2][0][RTW89_KCC][11] = 76, -+ [0][0][2][0][RTW89_ACMA][11] = 58, -+ [0][0][2][0][RTW89_CHILE][11] = 54, -+ [0][0][2][0][RTW89_UKRAINE][11] = 58, -+ [0][0][2][0][RTW89_MEXICO][11] = 54, -+ [0][0][2][0][RTW89_CN][11] = 58, -+ [0][0][2][0][RTW89_QATAR][11] = 58, -+ [0][0][2][0][RTW89_UK][11] = 58, -+ [0][0][2][0][RTW89_FCC][12] = 50, -+ [0][0][2][0][RTW89_ETSI][12] = 58, -+ [0][0][2][0][RTW89_MKK][12] = 76, -+ [0][0][2][0][RTW89_IC][12] = 50, -+ [0][0][2][0][RTW89_KCC][12] = 76, -+ [0][0][2][0][RTW89_ACMA][12] = 58, -+ [0][0][2][0][RTW89_CHILE][12] = 50, -+ [0][0][2][0][RTW89_UKRAINE][12] = 58, -+ [0][0][2][0][RTW89_MEXICO][12] = 50, -+ [0][0][2][0][RTW89_CN][12] = 58, -+ [0][0][2][0][RTW89_QATAR][12] = 58, -+ [0][0][2][0][RTW89_UK][12] = 58, -+ [0][0][2][0][RTW89_FCC][13] = 127, -+ [0][0][2][0][RTW89_ETSI][13] = 127, -+ [0][0][2][0][RTW89_MKK][13] = 127, -+ [0][0][2][0][RTW89_IC][13] = 127, -+ [0][0][2][0][RTW89_KCC][13] = 127, -+ [0][0][2][0][RTW89_ACMA][13] = 127, -+ [0][0][2][0][RTW89_CHILE][13] = 127, -+ [0][0][2][0][RTW89_UKRAINE][13] = 127, -+ [0][0][2][0][RTW89_MEXICO][13] = 127, -+ [0][0][2][0][RTW89_CN][13] = 127, -+ [0][0][2][0][RTW89_QATAR][13] = 127, -+ [0][0][2][0][RTW89_UK][13] = 127, -+ [0][1][2][0][RTW89_FCC][0] = 58, -+ [0][1][2][0][RTW89_ETSI][0] = 46, -+ [0][1][2][0][RTW89_MKK][0] = 66, -+ [0][1][2][0][RTW89_IC][0] = 58, -+ [0][1][2][0][RTW89_KCC][0] = 62, -+ [0][1][2][0][RTW89_ACMA][0] = 46, -+ [0][1][2][0][RTW89_CHILE][0] = 50, -+ [0][1][2][0][RTW89_UKRAINE][0] = 46, -+ [0][1][2][0][RTW89_MEXICO][0] = 58, -+ [0][1][2][0][RTW89_CN][0] = 46, -+ [0][1][2][0][RTW89_QATAR][0] = 46, -+ [0][1][2][0][RTW89_UK][0] = 46, -+ [0][1][2][0][RTW89_FCC][1] = 58, -+ [0][1][2][0][RTW89_ETSI][1] = 46, -+ [0][1][2][0][RTW89_MKK][1] = 66, -+ [0][1][2][0][RTW89_IC][1] = 58, -+ [0][1][2][0][RTW89_KCC][1] = 62, -+ [0][1][2][0][RTW89_ACMA][1] = 46, -+ [0][1][2][0][RTW89_CHILE][1] = 50, -+ [0][1][2][0][RTW89_UKRAINE][1] = 46, -+ [0][1][2][0][RTW89_MEXICO][1] = 58, -+ [0][1][2][0][RTW89_CN][1] = 46, -+ [0][1][2][0][RTW89_QATAR][1] = 46, -+ [0][1][2][0][RTW89_UK][1] = 46, -+ [0][1][2][0][RTW89_FCC][2] = 62, -+ [0][1][2][0][RTW89_ETSI][2] = 46, -+ [0][1][2][0][RTW89_MKK][2] = 66, -+ [0][1][2][0][RTW89_IC][2] = 62, -+ [0][1][2][0][RTW89_KCC][2] = 62, -+ [0][1][2][0][RTW89_ACMA][2] = 46, -+ [0][1][2][0][RTW89_CHILE][2] = 50, -+ [0][1][2][0][RTW89_UKRAINE][2] = 46, -+ [0][1][2][0][RTW89_MEXICO][2] = 62, -+ [0][1][2][0][RTW89_CN][2] = 46, -+ [0][1][2][0][RTW89_QATAR][2] = 46, -+ [0][1][2][0][RTW89_UK][2] = 46, -+ [0][1][2][0][RTW89_FCC][3] = 66, -+ [0][1][2][0][RTW89_ETSI][3] = 46, -+ [0][1][2][0][RTW89_MKK][3] = 66, -+ [0][1][2][0][RTW89_IC][3] = 66, -+ [0][1][2][0][RTW89_KCC][3] = 62, -+ [0][1][2][0][RTW89_ACMA][3] = 46, -+ [0][1][2][0][RTW89_CHILE][3] = 50, -+ [0][1][2][0][RTW89_UKRAINE][3] = 46, -+ [0][1][2][0][RTW89_MEXICO][3] = 66, -+ [0][1][2][0][RTW89_CN][3] = 46, -+ [0][1][2][0][RTW89_QATAR][3] = 46, -+ [0][1][2][0][RTW89_UK][3] = 46, -+ [0][1][2][0][RTW89_FCC][4] = 72, -+ [0][1][2][0][RTW89_ETSI][4] = 46, -+ [0][1][2][0][RTW89_MKK][4] = 66, -+ [0][1][2][0][RTW89_IC][4] = 72, -+ [0][1][2][0][RTW89_KCC][4] = 62, -+ [0][1][2][0][RTW89_ACMA][4] = 46, -+ [0][1][2][0][RTW89_CHILE][4] = 50, -+ [0][1][2][0][RTW89_UKRAINE][4] = 46, -+ [0][1][2][0][RTW89_MEXICO][4] = 72, -+ [0][1][2][0][RTW89_CN][4] = 46, -+ [0][1][2][0][RTW89_QATAR][4] = 46, -+ [0][1][2][0][RTW89_UK][4] = 46, -+ [0][1][2][0][RTW89_FCC][5] = 78, -+ [0][1][2][0][RTW89_ETSI][5] = 46, -+ [0][1][2][0][RTW89_MKK][5] = 66, -+ [0][1][2][0][RTW89_IC][5] = 78, -+ [0][1][2][0][RTW89_KCC][5] = 62, -+ [0][1][2][0][RTW89_ACMA][5] = 46, -+ [0][1][2][0][RTW89_CHILE][5] = 50, -+ [0][1][2][0][RTW89_UKRAINE][5] = 46, -+ [0][1][2][0][RTW89_MEXICO][5] = 78, -+ [0][1][2][0][RTW89_CN][5] = 46, -+ [0][1][2][0][RTW89_QATAR][5] = 46, -+ [0][1][2][0][RTW89_UK][5] = 46, -+ [0][1][2][0][RTW89_FCC][6] = 74, -+ [0][1][2][0][RTW89_ETSI][6] = 46, -+ [0][1][2][0][RTW89_MKK][6] = 66, -+ [0][1][2][0][RTW89_IC][6] = 74, -+ [0][1][2][0][RTW89_KCC][6] = 62, -+ [0][1][2][0][RTW89_ACMA][6] = 46, -+ [0][1][2][0][RTW89_CHILE][6] = 50, -+ [0][1][2][0][RTW89_UKRAINE][6] = 46, -+ [0][1][2][0][RTW89_MEXICO][6] = 74, -+ [0][1][2][0][RTW89_CN][6] = 46, -+ [0][1][2][0][RTW89_QATAR][6] = 46, -+ [0][1][2][0][RTW89_UK][6] = 46, -+ [0][1][2][0][RTW89_FCC][7] = 66, -+ [0][1][2][0][RTW89_ETSI][7] = 46, -+ [0][1][2][0][RTW89_MKK][7] = 66, -+ [0][1][2][0][RTW89_IC][7] = 66, -+ [0][1][2][0][RTW89_KCC][7] = 62, -+ [0][1][2][0][RTW89_ACMA][7] = 46, -+ [0][1][2][0][RTW89_CHILE][7] = 50, -+ [0][1][2][0][RTW89_UKRAINE][7] = 46, -+ [0][1][2][0][RTW89_MEXICO][7] = 66, -+ [0][1][2][0][RTW89_CN][7] = 46, -+ [0][1][2][0][RTW89_QATAR][7] = 46, -+ [0][1][2][0][RTW89_UK][7] = 46, -+ [0][1][2][0][RTW89_FCC][8] = 62, -+ [0][1][2][0][RTW89_ETSI][8] = 46, -+ [0][1][2][0][RTW89_MKK][8] = 66, -+ [0][1][2][0][RTW89_IC][8] = 62, -+ [0][1][2][0][RTW89_KCC][8] = 62, -+ [0][1][2][0][RTW89_ACMA][8] = 46, -+ [0][1][2][0][RTW89_CHILE][8] = 50, -+ [0][1][2][0][RTW89_UKRAINE][8] = 46, -+ [0][1][2][0][RTW89_MEXICO][8] = 62, -+ [0][1][2][0][RTW89_CN][8] = 46, -+ [0][1][2][0][RTW89_QATAR][8] = 46, -+ [0][1][2][0][RTW89_UK][8] = 46, -+ [0][1][2][0][RTW89_FCC][9] = 58, -+ [0][1][2][0][RTW89_ETSI][9] = 46, -+ [0][1][2][0][RTW89_MKK][9] = 66, -+ [0][1][2][0][RTW89_IC][9] = 58, -+ [0][1][2][0][RTW89_KCC][9] = 60, -+ [0][1][2][0][RTW89_ACMA][9] = 46, -+ [0][1][2][0][RTW89_CHILE][9] = 50, -+ [0][1][2][0][RTW89_UKRAINE][9] = 46, -+ [0][1][2][0][RTW89_MEXICO][9] = 58, -+ [0][1][2][0][RTW89_CN][9] = 46, -+ [0][1][2][0][RTW89_QATAR][9] = 46, -+ [0][1][2][0][RTW89_UK][9] = 46, -+ [0][1][2][0][RTW89_FCC][10] = 58, -+ [0][1][2][0][RTW89_ETSI][10] = 46, -+ [0][1][2][0][RTW89_MKK][10] = 66, -+ [0][1][2][0][RTW89_IC][10] = 58, -+ [0][1][2][0][RTW89_KCC][10] = 60, -+ [0][1][2][0][RTW89_ACMA][10] = 46, -+ [0][1][2][0][RTW89_CHILE][10] = 50, -+ [0][1][2][0][RTW89_UKRAINE][10] = 46, -+ [0][1][2][0][RTW89_MEXICO][10] = 58, -+ [0][1][2][0][RTW89_CN][10] = 46, -+ [0][1][2][0][RTW89_QATAR][10] = 46, -+ [0][1][2][0][RTW89_UK][10] = 46, -+ [0][1][2][0][RTW89_FCC][11] = 46, -+ [0][1][2][0][RTW89_ETSI][11] = 46, -+ [0][1][2][0][RTW89_MKK][11] = 66, -+ [0][1][2][0][RTW89_IC][11] = 46, -+ [0][1][2][0][RTW89_KCC][11] = 60, -+ [0][1][2][0][RTW89_ACMA][11] = 46, -+ [0][1][2][0][RTW89_CHILE][11] = 46, -+ [0][1][2][0][RTW89_UKRAINE][11] = 46, -+ [0][1][2][0][RTW89_MEXICO][11] = 46, -+ [0][1][2][0][RTW89_CN][11] = 46, -+ [0][1][2][0][RTW89_QATAR][11] = 46, -+ [0][1][2][0][RTW89_UK][11] = 46, -+ [0][1][2][0][RTW89_FCC][12] = 42, -+ [0][1][2][0][RTW89_ETSI][12] = 46, -+ [0][1][2][0][RTW89_MKK][12] = 66, -+ [0][1][2][0][RTW89_IC][12] = 42, -+ [0][1][2][0][RTW89_KCC][12] = 60, -+ [0][1][2][0][RTW89_ACMA][12] = 46, -+ [0][1][2][0][RTW89_CHILE][12] = 42, -+ [0][1][2][0][RTW89_UKRAINE][12] = 46, -+ [0][1][2][0][RTW89_MEXICO][12] = 42, -+ [0][1][2][0][RTW89_CN][12] = 46, -+ [0][1][2][0][RTW89_QATAR][12] = 46, -+ [0][1][2][0][RTW89_UK][12] = 46, -+ [0][1][2][0][RTW89_FCC][13] = 127, -+ [0][1][2][0][RTW89_ETSI][13] = 127, -+ [0][1][2][0][RTW89_MKK][13] = 127, -+ [0][1][2][0][RTW89_IC][13] = 127, -+ [0][1][2][0][RTW89_KCC][13] = 127, -+ [0][1][2][0][RTW89_ACMA][13] = 127, -+ [0][1][2][0][RTW89_CHILE][13] = 127, -+ [0][1][2][0][RTW89_UKRAINE][13] = 127, -+ [0][1][2][0][RTW89_MEXICO][13] = 127, -+ [0][1][2][0][RTW89_CN][13] = 127, -+ [0][1][2][0][RTW89_QATAR][13] = 127, -+ [0][1][2][0][RTW89_UK][13] = 127, -+ [0][1][2][1][RTW89_FCC][0] = 58, -+ [0][1][2][1][RTW89_ETSI][0] = 34, -+ [0][1][2][1][RTW89_MKK][0] = 66, -+ [0][1][2][1][RTW89_IC][0] = 58, -+ [0][1][2][1][RTW89_KCC][0] = 62, -+ [0][1][2][1][RTW89_ACMA][0] = 34, -+ [0][1][2][1][RTW89_CHILE][0] = 42, -+ [0][1][2][1][RTW89_UKRAINE][0] = 34, -+ [0][1][2][1][RTW89_MEXICO][0] = 58, -+ [0][1][2][1][RTW89_CN][0] = 34, -+ [0][1][2][1][RTW89_QATAR][0] = 34, -+ [0][1][2][1][RTW89_UK][0] = 34, -+ [0][1][2][1][RTW89_FCC][1] = 58, -+ [0][1][2][1][RTW89_ETSI][1] = 34, -+ [0][1][2][1][RTW89_MKK][1] = 66, -+ [0][1][2][1][RTW89_IC][1] = 58, -+ [0][1][2][1][RTW89_KCC][1] = 62, -+ [0][1][2][1][RTW89_ACMA][1] = 34, -+ [0][1][2][1][RTW89_CHILE][1] = 40, -+ [0][1][2][1][RTW89_UKRAINE][1] = 34, -+ [0][1][2][1][RTW89_MEXICO][1] = 58, -+ [0][1][2][1][RTW89_CN][1] = 34, -+ [0][1][2][1][RTW89_QATAR][1] = 34, -+ [0][1][2][1][RTW89_UK][1] = 34, -+ [0][1][2][1][RTW89_FCC][2] = 62, -+ [0][1][2][1][RTW89_ETSI][2] = 34, -+ [0][1][2][1][RTW89_MKK][2] = 66, -+ [0][1][2][1][RTW89_IC][2] = 62, -+ [0][1][2][1][RTW89_KCC][2] = 62, -+ [0][1][2][1][RTW89_ACMA][2] = 34, -+ [0][1][2][1][RTW89_CHILE][2] = 40, -+ [0][1][2][1][RTW89_UKRAINE][2] = 34, -+ [0][1][2][1][RTW89_MEXICO][2] = 62, -+ [0][1][2][1][RTW89_CN][2] = 34, -+ [0][1][2][1][RTW89_QATAR][2] = 34, -+ [0][1][2][1][RTW89_UK][2] = 34, -+ [0][1][2][1][RTW89_FCC][3] = 66, -+ [0][1][2][1][RTW89_ETSI][3] = 34, -+ [0][1][2][1][RTW89_MKK][3] = 66, -+ [0][1][2][1][RTW89_IC][3] = 66, -+ [0][1][2][1][RTW89_KCC][3] = 62, -+ [0][1][2][1][RTW89_ACMA][3] = 34, -+ [0][1][2][1][RTW89_CHILE][3] = 40, -+ [0][1][2][1][RTW89_UKRAINE][3] = 34, -+ [0][1][2][1][RTW89_MEXICO][3] = 66, -+ [0][1][2][1][RTW89_CN][3] = 34, -+ [0][1][2][1][RTW89_QATAR][3] = 34, -+ [0][1][2][1][RTW89_UK][3] = 34, -+ [0][1][2][1][RTW89_FCC][4] = 72, -+ [0][1][2][1][RTW89_ETSI][4] = 34, -+ [0][1][2][1][RTW89_MKK][4] = 66, -+ [0][1][2][1][RTW89_IC][4] = 72, -+ [0][1][2][1][RTW89_KCC][4] = 62, -+ [0][1][2][1][RTW89_ACMA][4] = 34, -+ [0][1][2][1][RTW89_CHILE][4] = 40, -+ [0][1][2][1][RTW89_UKRAINE][4] = 34, -+ [0][1][2][1][RTW89_MEXICO][4] = 72, -+ [0][1][2][1][RTW89_CN][4] = 34, -+ [0][1][2][1][RTW89_QATAR][4] = 34, -+ [0][1][2][1][RTW89_UK][4] = 34, -+ [0][1][2][1][RTW89_FCC][5] = 78, -+ [0][1][2][1][RTW89_ETSI][5] = 34, -+ [0][1][2][1][RTW89_MKK][5] = 66, -+ [0][1][2][1][RTW89_IC][5] = 78, -+ [0][1][2][1][RTW89_KCC][5] = 62, -+ [0][1][2][1][RTW89_ACMA][5] = 34, -+ [0][1][2][1][RTW89_CHILE][5] = 42, -+ [0][1][2][1][RTW89_UKRAINE][5] = 34, -+ [0][1][2][1][RTW89_MEXICO][5] = 78, -+ [0][1][2][1][RTW89_CN][5] = 34, -+ [0][1][2][1][RTW89_QATAR][5] = 34, -+ [0][1][2][1][RTW89_UK][5] = 34, -+ [0][1][2][1][RTW89_FCC][6] = 74, -+ [0][1][2][1][RTW89_ETSI][6] = 34, -+ [0][1][2][1][RTW89_MKK][6] = 66, -+ [0][1][2][1][RTW89_IC][6] = 74, -+ [0][1][2][1][RTW89_KCC][6] = 62, -+ [0][1][2][1][RTW89_ACMA][6] = 34, -+ [0][1][2][1][RTW89_CHILE][6] = 40, -+ [0][1][2][1][RTW89_UKRAINE][6] = 34, -+ [0][1][2][1][RTW89_MEXICO][6] = 74, -+ [0][1][2][1][RTW89_CN][6] = 34, -+ [0][1][2][1][RTW89_QATAR][6] = 34, -+ [0][1][2][1][RTW89_UK][6] = 34, -+ [0][1][2][1][RTW89_FCC][7] = 66, -+ [0][1][2][1][RTW89_ETSI][7] = 34, -+ [0][1][2][1][RTW89_MKK][7] = 66, -+ [0][1][2][1][RTW89_IC][7] = 66, -+ [0][1][2][1][RTW89_KCC][7] = 62, -+ [0][1][2][1][RTW89_ACMA][7] = 34, -+ [0][1][2][1][RTW89_CHILE][7] = 40, -+ [0][1][2][1][RTW89_UKRAINE][7] = 34, -+ [0][1][2][1][RTW89_MEXICO][7] = 66, -+ [0][1][2][1][RTW89_CN][7] = 34, -+ [0][1][2][1][RTW89_QATAR][7] = 34, -+ [0][1][2][1][RTW89_UK][7] = 34, -+ [0][1][2][1][RTW89_FCC][8] = 62, -+ [0][1][2][1][RTW89_ETSI][8] = 34, -+ [0][1][2][1][RTW89_MKK][8] = 66, -+ [0][1][2][1][RTW89_IC][8] = 62, -+ [0][1][2][1][RTW89_KCC][8] = 62, -+ [0][1][2][1][RTW89_ACMA][8] = 34, -+ [0][1][2][1][RTW89_CHILE][8] = 40, -+ [0][1][2][1][RTW89_UKRAINE][8] = 34, -+ [0][1][2][1][RTW89_MEXICO][8] = 62, -+ [0][1][2][1][RTW89_CN][8] = 34, -+ [0][1][2][1][RTW89_QATAR][8] = 34, -+ [0][1][2][1][RTW89_UK][8] = 34, -+ [0][1][2][1][RTW89_FCC][9] = 58, -+ [0][1][2][1][RTW89_ETSI][9] = 34, -+ [0][1][2][1][RTW89_MKK][9] = 66, -+ [0][1][2][1][RTW89_IC][9] = 58, -+ [0][1][2][1][RTW89_KCC][9] = 60, -+ [0][1][2][1][RTW89_ACMA][9] = 34, -+ [0][1][2][1][RTW89_CHILE][9] = 40, -+ [0][1][2][1][RTW89_UKRAINE][9] = 34, -+ [0][1][2][1][RTW89_MEXICO][9] = 58, -+ [0][1][2][1][RTW89_CN][9] = 34, -+ [0][1][2][1][RTW89_QATAR][9] = 34, -+ [0][1][2][1][RTW89_UK][9] = 34, -+ [0][1][2][1][RTW89_FCC][10] = 58, -+ [0][1][2][1][RTW89_ETSI][10] = 34, -+ [0][1][2][1][RTW89_MKK][10] = 66, -+ [0][1][2][1][RTW89_IC][10] = 58, -+ [0][1][2][1][RTW89_KCC][10] = 60, -+ [0][1][2][1][RTW89_ACMA][10] = 34, -+ [0][1][2][1][RTW89_CHILE][10] = 40, -+ [0][1][2][1][RTW89_UKRAINE][10] = 34, -+ [0][1][2][1][RTW89_MEXICO][10] = 58, -+ [0][1][2][1][RTW89_CN][10] = 34, -+ [0][1][2][1][RTW89_QATAR][10] = 34, -+ [0][1][2][1][RTW89_UK][10] = 34, -+ [0][1][2][1][RTW89_FCC][11] = 46, -+ [0][1][2][1][RTW89_ETSI][11] = 34, -+ [0][1][2][1][RTW89_MKK][11] = 66, -+ [0][1][2][1][RTW89_IC][11] = 46, -+ [0][1][2][1][RTW89_KCC][11] = 60, -+ [0][1][2][1][RTW89_ACMA][11] = 34, -+ [0][1][2][1][RTW89_CHILE][11] = 40, -+ [0][1][2][1][RTW89_UKRAINE][11] = 34, -+ [0][1][2][1][RTW89_MEXICO][11] = 46, -+ [0][1][2][1][RTW89_CN][11] = 34, -+ [0][1][2][1][RTW89_QATAR][11] = 34, -+ [0][1][2][1][RTW89_UK][11] = 34, -+ [0][1][2][1][RTW89_FCC][12] = 42, -+ [0][1][2][1][RTW89_ETSI][12] = 34, -+ [0][1][2][1][RTW89_MKK][12] = 66, -+ [0][1][2][1][RTW89_IC][12] = 42, -+ [0][1][2][1][RTW89_KCC][12] = 60, -+ [0][1][2][1][RTW89_ACMA][12] = 34, -+ [0][1][2][1][RTW89_CHILE][12] = 40, -+ [0][1][2][1][RTW89_UKRAINE][12] = 34, -+ [0][1][2][1][RTW89_MEXICO][12] = 42, -+ [0][1][2][1][RTW89_CN][12] = 34, -+ [0][1][2][1][RTW89_QATAR][12] = 34, -+ [0][1][2][1][RTW89_UK][12] = 34, -+ [0][1][2][1][RTW89_FCC][13] = 127, -+ [0][1][2][1][RTW89_ETSI][13] = 127, -+ [0][1][2][1][RTW89_MKK][13] = 127, -+ [0][1][2][1][RTW89_IC][13] = 127, -+ [0][1][2][1][RTW89_KCC][13] = 127, -+ [0][1][2][1][RTW89_ACMA][13] = 127, -+ [0][1][2][1][RTW89_CHILE][13] = 127, -+ [0][1][2][1][RTW89_UKRAINE][13] = 127, -+ [0][1][2][1][RTW89_MEXICO][13] = 127, -+ [0][1][2][1][RTW89_CN][13] = 127, -+ [0][1][2][1][RTW89_QATAR][13] = 127, -+ [0][1][2][1][RTW89_UK][13] = 127, -+ [1][0][2][0][RTW89_FCC][0] = 127, -+ [1][0][2][0][RTW89_ETSI][0] = 127, -+ [1][0][2][0][RTW89_MKK][0] = 127, -+ [1][0][2][0][RTW89_IC][0] = 127, -+ [1][0][2][0][RTW89_KCC][0] = 127, -+ [1][0][2][0][RTW89_ACMA][0] = 127, -+ [1][0][2][0][RTW89_CHILE][0] = 127, -+ [1][0][2][0][RTW89_UKRAINE][0] = 127, -+ [1][0][2][0][RTW89_MEXICO][0] = 127, -+ [1][0][2][0][RTW89_CN][0] = 127, -+ [1][0][2][0][RTW89_QATAR][0] = 127, -+ [1][0][2][0][RTW89_UK][0] = 127, -+ [1][0][2][0][RTW89_FCC][1] = 127, -+ [1][0][2][0][RTW89_ETSI][1] = 127, -+ [1][0][2][0][RTW89_MKK][1] = 127, -+ [1][0][2][0][RTW89_IC][1] = 127, -+ [1][0][2][0][RTW89_KCC][1] = 127, -+ [1][0][2][0][RTW89_ACMA][1] = 127, -+ [1][0][2][0][RTW89_CHILE][1] = 127, -+ [1][0][2][0][RTW89_UKRAINE][1] = 127, -+ [1][0][2][0][RTW89_MEXICO][1] = 127, -+ [1][0][2][0][RTW89_CN][1] = 127, -+ [1][0][2][0][RTW89_QATAR][1] = 127, -+ [1][0][2][0][RTW89_UK][1] = 127, -+ [1][0][2][0][RTW89_FCC][2] = 70, -+ [1][0][2][0][RTW89_ETSI][2] = 58, -+ [1][0][2][0][RTW89_MKK][2] = 74, -+ [1][0][2][0][RTW89_IC][2] = 70, -+ [1][0][2][0][RTW89_KCC][2] = 74, -+ [1][0][2][0][RTW89_ACMA][2] = 58, -+ [1][0][2][0][RTW89_CHILE][2] = 66, -+ [1][0][2][0][RTW89_UKRAINE][2] = 58, -+ [1][0][2][0][RTW89_MEXICO][2] = 70, -+ [1][0][2][0][RTW89_CN][2] = 58, -+ [1][0][2][0][RTW89_QATAR][2] = 58, -+ [1][0][2][0][RTW89_UK][2] = 58, -+ [1][0][2][0][RTW89_FCC][3] = 70, -+ [1][0][2][0][RTW89_ETSI][3] = 58, -+ [1][0][2][0][RTW89_MKK][3] = 74, -+ [1][0][2][0][RTW89_IC][3] = 70, -+ [1][0][2][0][RTW89_KCC][3] = 74, -+ [1][0][2][0][RTW89_ACMA][3] = 58, -+ [1][0][2][0][RTW89_CHILE][3] = 66, -+ [1][0][2][0][RTW89_UKRAINE][3] = 58, -+ [1][0][2][0][RTW89_MEXICO][3] = 70, -+ [1][0][2][0][RTW89_CN][3] = 58, -+ [1][0][2][0][RTW89_QATAR][3] = 58, -+ [1][0][2][0][RTW89_UK][3] = 58, -+ [1][0][2][0][RTW89_FCC][4] = 72, -+ [1][0][2][0][RTW89_ETSI][4] = 58, -+ [1][0][2][0][RTW89_MKK][4] = 74, -+ [1][0][2][0][RTW89_IC][4] = 72, -+ [1][0][2][0][RTW89_KCC][4] = 74, -+ [1][0][2][0][RTW89_ACMA][4] = 58, -+ [1][0][2][0][RTW89_CHILE][4] = 66, -+ [1][0][2][0][RTW89_UKRAINE][4] = 58, -+ [1][0][2][0][RTW89_MEXICO][4] = 72, -+ [1][0][2][0][RTW89_CN][4] = 58, -+ [1][0][2][0][RTW89_QATAR][4] = 58, -+ [1][0][2][0][RTW89_UK][4] = 58, -+ [1][0][2][0][RTW89_FCC][5] = 72, -+ [1][0][2][0][RTW89_ETSI][5] = 58, -+ [1][0][2][0][RTW89_MKK][5] = 74, -+ [1][0][2][0][RTW89_IC][5] = 72, -+ [1][0][2][0][RTW89_KCC][5] = 74, -+ [1][0][2][0][RTW89_ACMA][5] = 58, -+ [1][0][2][0][RTW89_CHILE][5] = 66, -+ [1][0][2][0][RTW89_UKRAINE][5] = 58, -+ [1][0][2][0][RTW89_MEXICO][5] = 72, -+ [1][0][2][0][RTW89_CN][5] = 58, -+ [1][0][2][0][RTW89_QATAR][5] = 58, -+ [1][0][2][0][RTW89_UK][5] = 58, -+ [1][0][2][0][RTW89_FCC][6] = 72, -+ [1][0][2][0][RTW89_ETSI][6] = 58, -+ [1][0][2][0][RTW89_MKK][6] = 74, -+ [1][0][2][0][RTW89_IC][6] = 72, -+ [1][0][2][0][RTW89_KCC][6] = 74, -+ [1][0][2][0][RTW89_ACMA][6] = 58, -+ [1][0][2][0][RTW89_CHILE][6] = 66, -+ [1][0][2][0][RTW89_UKRAINE][6] = 58, -+ [1][0][2][0][RTW89_MEXICO][6] = 72, -+ [1][0][2][0][RTW89_CN][6] = 58, -+ [1][0][2][0][RTW89_QATAR][6] = 58, -+ [1][0][2][0][RTW89_UK][6] = 58, -+ [1][0][2][0][RTW89_FCC][7] = 68, -+ [1][0][2][0][RTW89_ETSI][7] = 58, -+ [1][0][2][0][RTW89_MKK][7] = 74, -+ [1][0][2][0][RTW89_IC][7] = 68, -+ [1][0][2][0][RTW89_KCC][7] = 74, -+ [1][0][2][0][RTW89_ACMA][7] = 58, -+ [1][0][2][0][RTW89_CHILE][7] = 66, -+ [1][0][2][0][RTW89_UKRAINE][7] = 58, -+ [1][0][2][0][RTW89_MEXICO][7] = 68, -+ [1][0][2][0][RTW89_CN][7] = 58, -+ [1][0][2][0][RTW89_QATAR][7] = 58, -+ [1][0][2][0][RTW89_UK][7] = 58, -+ [1][0][2][0][RTW89_FCC][8] = 68, -+ [1][0][2][0][RTW89_ETSI][8] = 58, -+ [1][0][2][0][RTW89_MKK][8] = 74, -+ [1][0][2][0][RTW89_IC][8] = 68, -+ [1][0][2][0][RTW89_KCC][8] = 74, -+ [1][0][2][0][RTW89_ACMA][8] = 58, -+ [1][0][2][0][RTW89_CHILE][8] = 66, -+ [1][0][2][0][RTW89_UKRAINE][8] = 58, -+ [1][0][2][0][RTW89_MEXICO][8] = 68, -+ [1][0][2][0][RTW89_CN][8] = 58, -+ [1][0][2][0][RTW89_QATAR][8] = 58, -+ [1][0][2][0][RTW89_UK][8] = 58, -+ [1][0][2][0][RTW89_FCC][9] = 68, -+ [1][0][2][0][RTW89_ETSI][9] = 58, -+ [1][0][2][0][RTW89_MKK][9] = 74, -+ [1][0][2][0][RTW89_IC][9] = 68, -+ [1][0][2][0][RTW89_KCC][9] = 74, -+ [1][0][2][0][RTW89_ACMA][9] = 58, -+ [1][0][2][0][RTW89_CHILE][9] = 66, -+ [1][0][2][0][RTW89_UKRAINE][9] = 58, -+ [1][0][2][0][RTW89_MEXICO][9] = 68, -+ [1][0][2][0][RTW89_CN][9] = 58, -+ [1][0][2][0][RTW89_QATAR][9] = 58, -+ [1][0][2][0][RTW89_UK][9] = 58, -+ [1][0][2][0][RTW89_FCC][10] = 66, -+ [1][0][2][0][RTW89_ETSI][10] = 58, -+ [1][0][2][0][RTW89_MKK][10] = 74, -+ [1][0][2][0][RTW89_IC][10] = 66, -+ [1][0][2][0][RTW89_KCC][10] = 74, -+ [1][0][2][0][RTW89_ACMA][10] = 58, -+ [1][0][2][0][RTW89_CHILE][10] = 66, -+ [1][0][2][0][RTW89_UKRAINE][10] = 58, -+ [1][0][2][0][RTW89_MEXICO][10] = 66, -+ [1][0][2][0][RTW89_CN][10] = 58, -+ [1][0][2][0][RTW89_QATAR][10] = 58, -+ [1][0][2][0][RTW89_UK][10] = 58, -+ [1][0][2][0][RTW89_FCC][11] = 127, -+ [1][0][2][0][RTW89_ETSI][11] = 127, -+ [1][0][2][0][RTW89_MKK][11] = 127, -+ [1][0][2][0][RTW89_IC][11] = 127, -+ [1][0][2][0][RTW89_KCC][11] = 127, -+ [1][0][2][0][RTW89_ACMA][11] = 127, -+ [1][0][2][0][RTW89_CHILE][11] = 127, -+ [1][0][2][0][RTW89_UKRAINE][11] = 127, -+ [1][0][2][0][RTW89_MEXICO][11] = 127, -+ [1][0][2][0][RTW89_CN][11] = 127, -+ [1][0][2][0][RTW89_QATAR][11] = 127, -+ [1][0][2][0][RTW89_UK][11] = 127, -+ [1][0][2][0][RTW89_FCC][12] = 127, -+ [1][0][2][0][RTW89_ETSI][12] = 127, -+ [1][0][2][0][RTW89_MKK][12] = 127, -+ [1][0][2][0][RTW89_IC][12] = 127, -+ [1][0][2][0][RTW89_KCC][12] = 127, -+ [1][0][2][0][RTW89_ACMA][12] = 127, -+ [1][0][2][0][RTW89_CHILE][12] = 127, -+ [1][0][2][0][RTW89_UKRAINE][12] = 127, -+ [1][0][2][0][RTW89_MEXICO][12] = 127, -+ [1][0][2][0][RTW89_CN][12] = 127, -+ [1][0][2][0][RTW89_QATAR][12] = 127, -+ [1][0][2][0][RTW89_UK][12] = 127, -+ [1][0][2][0][RTW89_FCC][13] = 127, -+ [1][0][2][0][RTW89_ETSI][13] = 127, -+ [1][0][2][0][RTW89_MKK][13] = 127, -+ [1][0][2][0][RTW89_IC][13] = 127, -+ [1][0][2][0][RTW89_KCC][13] = 127, -+ [1][0][2][0][RTW89_ACMA][13] = 127, -+ [1][0][2][0][RTW89_CHILE][13] = 127, -+ [1][0][2][0][RTW89_UKRAINE][13] = 127, -+ [1][0][2][0][RTW89_MEXICO][13] = 127, -+ [1][0][2][0][RTW89_CN][13] = 127, -+ [1][0][2][0][RTW89_QATAR][13] = 127, -+ [1][0][2][0][RTW89_UK][13] = 127, -+ [1][1][2][0][RTW89_FCC][0] = 127, -+ [1][1][2][0][RTW89_ETSI][0] = 127, -+ [1][1][2][0][RTW89_MKK][0] = 127, -+ [1][1][2][0][RTW89_IC][0] = 127, -+ [1][1][2][0][RTW89_KCC][0] = 127, -+ [1][1][2][0][RTW89_ACMA][0] = 127, -+ [1][1][2][0][RTW89_CHILE][0] = 127, -+ [1][1][2][0][RTW89_UKRAINE][0] = 127, -+ [1][1][2][0][RTW89_MEXICO][0] = 127, -+ [1][1][2][0][RTW89_CN][0] = 127, -+ [1][1][2][0][RTW89_QATAR][0] = 127, -+ [1][1][2][0][RTW89_UK][0] = 127, -+ [1][1][2][0][RTW89_FCC][1] = 127, -+ [1][1][2][0][RTW89_ETSI][1] = 127, -+ [1][1][2][0][RTW89_MKK][1] = 127, -+ [1][1][2][0][RTW89_IC][1] = 127, -+ [1][1][2][0][RTW89_KCC][1] = 127, -+ [1][1][2][0][RTW89_ACMA][1] = 127, -+ [1][1][2][0][RTW89_CHILE][1] = 127, -+ [1][1][2][0][RTW89_UKRAINE][1] = 127, -+ [1][1][2][0][RTW89_MEXICO][1] = 127, -+ [1][1][2][0][RTW89_CN][1] = 127, -+ [1][1][2][0][RTW89_QATAR][1] = 127, -+ [1][1][2][0][RTW89_UK][1] = 127, -+ [1][1][2][0][RTW89_FCC][2] = 54, -+ [1][1][2][0][RTW89_ETSI][2] = 46, -+ [1][1][2][0][RTW89_MKK][2] = 66, -+ [1][1][2][0][RTW89_IC][2] = 54, -+ [1][1][2][0][RTW89_KCC][2] = 62, -+ [1][1][2][0][RTW89_ACMA][2] = 46, -+ [1][1][2][0][RTW89_CHILE][2] = 52, -+ [1][1][2][0][RTW89_UKRAINE][2] = 46, -+ [1][1][2][0][RTW89_MEXICO][2] = 54, -+ [1][1][2][0][RTW89_CN][2] = 46, -+ [1][1][2][0][RTW89_QATAR][2] = 46, -+ [1][1][2][0][RTW89_UK][2] = 46, -+ [1][1][2][0][RTW89_FCC][3] = 54, -+ [1][1][2][0][RTW89_ETSI][3] = 46, -+ [1][1][2][0][RTW89_MKK][3] = 66, -+ [1][1][2][0][RTW89_IC][3] = 54, -+ [1][1][2][0][RTW89_KCC][3] = 62, -+ [1][1][2][0][RTW89_ACMA][3] = 46, -+ [1][1][2][0][RTW89_CHILE][3] = 52, -+ [1][1][2][0][RTW89_UKRAINE][3] = 46, -+ [1][1][2][0][RTW89_MEXICO][3] = 54, -+ [1][1][2][0][RTW89_CN][3] = 46, -+ [1][1][2][0][RTW89_QATAR][3] = 46, -+ [1][1][2][0][RTW89_UK][3] = 46, -+ [1][1][2][0][RTW89_FCC][4] = 58, -+ [1][1][2][0][RTW89_ETSI][4] = 46, -+ [1][1][2][0][RTW89_MKK][4] = 66, -+ [1][1][2][0][RTW89_IC][4] = 58, -+ [1][1][2][0][RTW89_KCC][4] = 62, -+ [1][1][2][0][RTW89_ACMA][4] = 46, -+ [1][1][2][0][RTW89_CHILE][4] = 52, -+ [1][1][2][0][RTW89_UKRAINE][4] = 46, -+ [1][1][2][0][RTW89_MEXICO][4] = 58, -+ [1][1][2][0][RTW89_CN][4] = 46, -+ [1][1][2][0][RTW89_QATAR][4] = 46, -+ [1][1][2][0][RTW89_UK][4] = 46, -+ [1][1][2][0][RTW89_FCC][5] = 66, -+ [1][1][2][0][RTW89_ETSI][5] = 46, -+ [1][1][2][0][RTW89_MKK][5] = 66, -+ [1][1][2][0][RTW89_IC][5] = 66, -+ [1][1][2][0][RTW89_KCC][5] = 62, -+ [1][1][2][0][RTW89_ACMA][5] = 46, -+ [1][1][2][0][RTW89_CHILE][5] = 54, -+ [1][1][2][0][RTW89_UKRAINE][5] = 46, -+ [1][1][2][0][RTW89_MEXICO][5] = 66, -+ [1][1][2][0][RTW89_CN][5] = 46, -+ [1][1][2][0][RTW89_QATAR][5] = 46, -+ [1][1][2][0][RTW89_UK][5] = 46, -+ [1][1][2][0][RTW89_FCC][6] = 58, -+ [1][1][2][0][RTW89_ETSI][6] = 46, -+ [1][1][2][0][RTW89_MKK][6] = 66, -+ [1][1][2][0][RTW89_IC][6] = 58, -+ [1][1][2][0][RTW89_KCC][6] = 62, -+ [1][1][2][0][RTW89_ACMA][6] = 46, -+ [1][1][2][0][RTW89_CHILE][6] = 52, -+ [1][1][2][0][RTW89_UKRAINE][6] = 46, -+ [1][1][2][0][RTW89_MEXICO][6] = 58, -+ [1][1][2][0][RTW89_CN][6] = 46, -+ [1][1][2][0][RTW89_QATAR][6] = 46, -+ [1][1][2][0][RTW89_UK][6] = 46, -+ [1][1][2][0][RTW89_FCC][7] = 54, -+ [1][1][2][0][RTW89_ETSI][7] = 46, -+ [1][1][2][0][RTW89_MKK][7] = 66, -+ [1][1][2][0][RTW89_IC][7] = 54, -+ [1][1][2][0][RTW89_KCC][7] = 62, -+ [1][1][2][0][RTW89_ACMA][7] = 46, -+ [1][1][2][0][RTW89_CHILE][7] = 52, -+ [1][1][2][0][RTW89_UKRAINE][7] = 46, -+ [1][1][2][0][RTW89_MEXICO][7] = 54, -+ [1][1][2][0][RTW89_CN][7] = 46, -+ [1][1][2][0][RTW89_QATAR][7] = 46, -+ [1][1][2][0][RTW89_UK][7] = 46, -+ [1][1][2][0][RTW89_FCC][8] = 54, -+ [1][1][2][0][RTW89_ETSI][8] = 46, -+ [1][1][2][0][RTW89_MKK][8] = 66, -+ [1][1][2][0][RTW89_IC][8] = 54, -+ [1][1][2][0][RTW89_KCC][8] = 62, -+ [1][1][2][0][RTW89_ACMA][8] = 46, -+ [1][1][2][0][RTW89_CHILE][8] = 52, -+ [1][1][2][0][RTW89_UKRAINE][8] = 46, -+ [1][1][2][0][RTW89_MEXICO][8] = 54, -+ [1][1][2][0][RTW89_CN][8] = 46, -+ [1][1][2][0][RTW89_QATAR][8] = 46, -+ [1][1][2][0][RTW89_UK][8] = 46, -+ [1][1][2][0][RTW89_FCC][9] = 42, -+ [1][1][2][0][RTW89_ETSI][9] = 46, -+ [1][1][2][0][RTW89_MKK][9] = 66, -+ [1][1][2][0][RTW89_IC][9] = 42, -+ [1][1][2][0][RTW89_KCC][9] = 62, -+ [1][1][2][0][RTW89_ACMA][9] = 46, -+ [1][1][2][0][RTW89_CHILE][9] = 42, -+ [1][1][2][0][RTW89_UKRAINE][9] = 46, -+ [1][1][2][0][RTW89_MEXICO][9] = 42, -+ [1][1][2][0][RTW89_CN][9] = 46, -+ [1][1][2][0][RTW89_QATAR][9] = 46, -+ [1][1][2][0][RTW89_UK][9] = 46, -+ [1][1][2][0][RTW89_FCC][10] = 38, -+ [1][1][2][0][RTW89_ETSI][10] = 46, -+ [1][1][2][0][RTW89_MKK][10] = 66, -+ [1][1][2][0][RTW89_IC][10] = 38, -+ [1][1][2][0][RTW89_KCC][10] = 62, -+ [1][1][2][0][RTW89_ACMA][10] = 46, -+ [1][1][2][0][RTW89_CHILE][10] = 38, -+ [1][1][2][0][RTW89_UKRAINE][10] = 46, -+ [1][1][2][0][RTW89_MEXICO][10] = 38, -+ [1][1][2][0][RTW89_CN][10] = 46, -+ [1][1][2][0][RTW89_QATAR][10] = 46, -+ [1][1][2][0][RTW89_UK][10] = 46, -+ [1][1][2][0][RTW89_FCC][11] = 127, -+ [1][1][2][0][RTW89_ETSI][11] = 127, -+ [1][1][2][0][RTW89_MKK][11] = 127, -+ [1][1][2][0][RTW89_IC][11] = 127, -+ [1][1][2][0][RTW89_KCC][11] = 127, -+ [1][1][2][0][RTW89_ACMA][11] = 127, -+ [1][1][2][0][RTW89_CHILE][11] = 127, -+ [1][1][2][0][RTW89_UKRAINE][11] = 127, -+ [1][1][2][0][RTW89_MEXICO][11] = 127, -+ [1][1][2][0][RTW89_CN][11] = 127, -+ [1][1][2][0][RTW89_QATAR][11] = 127, -+ [1][1][2][0][RTW89_UK][11] = 127, -+ [1][1][2][0][RTW89_FCC][12] = 127, -+ [1][1][2][0][RTW89_ETSI][12] = 127, -+ [1][1][2][0][RTW89_MKK][12] = 127, -+ [1][1][2][0][RTW89_IC][12] = 127, -+ [1][1][2][0][RTW89_KCC][12] = 127, -+ [1][1][2][0][RTW89_ACMA][12] = 127, -+ [1][1][2][0][RTW89_CHILE][12] = 127, -+ [1][1][2][0][RTW89_UKRAINE][12] = 127, -+ [1][1][2][0][RTW89_MEXICO][12] = 127, -+ [1][1][2][0][RTW89_CN][12] = 127, -+ [1][1][2][0][RTW89_QATAR][12] = 127, -+ [1][1][2][0][RTW89_UK][12] = 127, -+ [1][1][2][0][RTW89_FCC][13] = 127, -+ [1][1][2][0][RTW89_ETSI][13] = 127, -+ [1][1][2][0][RTW89_MKK][13] = 127, -+ [1][1][2][0][RTW89_IC][13] = 127, -+ [1][1][2][0][RTW89_KCC][13] = 127, -+ [1][1][2][0][RTW89_ACMA][13] = 127, -+ [1][1][2][0][RTW89_CHILE][13] = 127, -+ [1][1][2][0][RTW89_UKRAINE][13] = 127, -+ [1][1][2][0][RTW89_MEXICO][13] = 127, -+ [1][1][2][0][RTW89_CN][13] = 127, -+ [1][1][2][0][RTW89_QATAR][13] = 127, -+ [1][1][2][0][RTW89_UK][13] = 127, -+ [1][1][2][1][RTW89_FCC][0] = 127, -+ [1][1][2][1][RTW89_ETSI][0] = 127, -+ [1][1][2][1][RTW89_MKK][0] = 127, -+ [1][1][2][1][RTW89_IC][0] = 127, -+ [1][1][2][1][RTW89_KCC][0] = 127, -+ [1][1][2][1][RTW89_ACMA][0] = 127, -+ [1][1][2][1][RTW89_CHILE][0] = 127, -+ [1][1][2][1][RTW89_UKRAINE][0] = 127, -+ [1][1][2][1][RTW89_MEXICO][0] = 127, -+ [1][1][2][1][RTW89_CN][0] = 127, -+ [1][1][2][1][RTW89_QATAR][0] = 127, -+ [1][1][2][1][RTW89_UK][0] = 127, -+ [1][1][2][1][RTW89_FCC][1] = 127, -+ [1][1][2][1][RTW89_ETSI][1] = 127, -+ [1][1][2][1][RTW89_MKK][1] = 127, -+ [1][1][2][1][RTW89_IC][1] = 127, -+ [1][1][2][1][RTW89_KCC][1] = 127, -+ [1][1][2][1][RTW89_ACMA][1] = 127, -+ [1][1][2][1][RTW89_CHILE][1] = 127, -+ [1][1][2][1][RTW89_UKRAINE][1] = 127, -+ [1][1][2][1][RTW89_MEXICO][1] = 127, -+ [1][1][2][1][RTW89_CN][1] = 127, -+ [1][1][2][1][RTW89_QATAR][1] = 127, -+ [1][1][2][1][RTW89_UK][1] = 127, -+ [1][1][2][1][RTW89_FCC][2] = 54, -+ [1][1][2][1][RTW89_ETSI][2] = 34, -+ [1][1][2][1][RTW89_MKK][2] = 66, -+ [1][1][2][1][RTW89_IC][2] = 54, -+ [1][1][2][1][RTW89_KCC][2] = 62, -+ [1][1][2][1][RTW89_ACMA][2] = 34, -+ [1][1][2][1][RTW89_CHILE][2] = 42, -+ [1][1][2][1][RTW89_UKRAINE][2] = 34, -+ [1][1][2][1][RTW89_MEXICO][2] = 54, -+ [1][1][2][1][RTW89_CN][2] = 34, -+ [1][1][2][1][RTW89_QATAR][2] = 34, -+ [1][1][2][1][RTW89_UK][2] = 34, -+ [1][1][2][1][RTW89_FCC][3] = 54, -+ [1][1][2][1][RTW89_ETSI][3] = 34, -+ [1][1][2][1][RTW89_MKK][3] = 66, -+ [1][1][2][1][RTW89_IC][3] = 54, -+ [1][1][2][1][RTW89_KCC][3] = 62, -+ [1][1][2][1][RTW89_ACMA][3] = 34, -+ [1][1][2][1][RTW89_CHILE][3] = 42, -+ [1][1][2][1][RTW89_UKRAINE][3] = 34, -+ [1][1][2][1][RTW89_MEXICO][3] = 54, -+ [1][1][2][1][RTW89_CN][3] = 34, -+ [1][1][2][1][RTW89_QATAR][3] = 34, -+ [1][1][2][1][RTW89_UK][3] = 34, -+ [1][1][2][1][RTW89_FCC][4] = 58, -+ [1][1][2][1][RTW89_ETSI][4] = 34, -+ [1][1][2][1][RTW89_MKK][4] = 66, -+ [1][1][2][1][RTW89_IC][4] = 58, -+ [1][1][2][1][RTW89_KCC][4] = 62, -+ [1][1][2][1][RTW89_ACMA][4] = 34, -+ [1][1][2][1][RTW89_CHILE][4] = 42, -+ [1][1][2][1][RTW89_UKRAINE][4] = 34, -+ [1][1][2][1][RTW89_MEXICO][4] = 58, -+ [1][1][2][1][RTW89_CN][4] = 34, -+ [1][1][2][1][RTW89_QATAR][4] = 34, -+ [1][1][2][1][RTW89_UK][4] = 34, -+ [1][1][2][1][RTW89_FCC][5] = 66, -+ [1][1][2][1][RTW89_ETSI][5] = 34, -+ [1][1][2][1][RTW89_MKK][5] = 66, -+ [1][1][2][1][RTW89_IC][5] = 66, -+ [1][1][2][1][RTW89_KCC][5] = 62, -+ [1][1][2][1][RTW89_ACMA][5] = 34, -+ [1][1][2][1][RTW89_CHILE][5] = 42, -+ [1][1][2][1][RTW89_UKRAINE][5] = 34, -+ [1][1][2][1][RTW89_MEXICO][5] = 66, -+ [1][1][2][1][RTW89_CN][5] = 34, -+ [1][1][2][1][RTW89_QATAR][5] = 34, -+ [1][1][2][1][RTW89_UK][5] = 34, -+ [1][1][2][1][RTW89_FCC][6] = 58, -+ [1][1][2][1][RTW89_ETSI][6] = 34, -+ [1][1][2][1][RTW89_MKK][6] = 66, -+ [1][1][2][1][RTW89_IC][6] = 58, -+ [1][1][2][1][RTW89_KCC][6] = 62, -+ [1][1][2][1][RTW89_ACMA][6] = 34, -+ [1][1][2][1][RTW89_CHILE][6] = 42, -+ [1][1][2][1][RTW89_UKRAINE][6] = 34, -+ [1][1][2][1][RTW89_MEXICO][6] = 58, -+ [1][1][2][1][RTW89_CN][6] = 34, -+ [1][1][2][1][RTW89_QATAR][6] = 34, -+ [1][1][2][1][RTW89_UK][6] = 34, -+ [1][1][2][1][RTW89_FCC][7] = 54, -+ [1][1][2][1][RTW89_ETSI][7] = 34, -+ [1][1][2][1][RTW89_MKK][7] = 66, -+ [1][1][2][1][RTW89_IC][7] = 54, -+ [1][1][2][1][RTW89_KCC][7] = 62, -+ [1][1][2][1][RTW89_ACMA][7] = 34, -+ [1][1][2][1][RTW89_CHILE][7] = 42, -+ [1][1][2][1][RTW89_UKRAINE][7] = 34, -+ [1][1][2][1][RTW89_MEXICO][7] = 54, -+ [1][1][2][1][RTW89_CN][7] = 34, -+ [1][1][2][1][RTW89_QATAR][7] = 34, -+ [1][1][2][1][RTW89_UK][7] = 34, -+ [1][1][2][1][RTW89_FCC][8] = 54, -+ [1][1][2][1][RTW89_ETSI][8] = 34, -+ [1][1][2][1][RTW89_MKK][8] = 66, -+ [1][1][2][1][RTW89_IC][8] = 54, -+ [1][1][2][1][RTW89_KCC][8] = 62, -+ [1][1][2][1][RTW89_ACMA][8] = 34, -+ [1][1][2][1][RTW89_CHILE][8] = 42, -+ [1][1][2][1][RTW89_UKRAINE][8] = 34, -+ [1][1][2][1][RTW89_MEXICO][8] = 54, -+ [1][1][2][1][RTW89_CN][8] = 34, -+ [1][1][2][1][RTW89_QATAR][8] = 34, -+ [1][1][2][1][RTW89_UK][8] = 34, -+ [1][1][2][1][RTW89_FCC][9] = 42, -+ [1][1][2][1][RTW89_ETSI][9] = 34, -+ [1][1][2][1][RTW89_MKK][9] = 66, -+ [1][1][2][1][RTW89_IC][9] = 42, -+ [1][1][2][1][RTW89_KCC][9] = 62, -+ [1][1][2][1][RTW89_ACMA][9] = 34, -+ [1][1][2][1][RTW89_CHILE][9] = 42, -+ [1][1][2][1][RTW89_UKRAINE][9] = 34, -+ [1][1][2][1][RTW89_MEXICO][9] = 42, -+ [1][1][2][1][RTW89_CN][9] = 34, -+ [1][1][2][1][RTW89_QATAR][9] = 34, -+ [1][1][2][1][RTW89_UK][9] = 34, -+ [1][1][2][1][RTW89_FCC][10] = 38, -+ [1][1][2][1][RTW89_ETSI][10] = 34, -+ [1][1][2][1][RTW89_MKK][10] = 66, -+ [1][1][2][1][RTW89_IC][10] = 38, -+ [1][1][2][1][RTW89_KCC][10] = 62, -+ [1][1][2][1][RTW89_ACMA][10] = 34, -+ [1][1][2][1][RTW89_CHILE][10] = 38, -+ [1][1][2][1][RTW89_UKRAINE][10] = 34, -+ [1][1][2][1][RTW89_MEXICO][10] = 38, -+ [1][1][2][1][RTW89_CN][10] = 34, -+ [1][1][2][1][RTW89_QATAR][10] = 34, -+ [1][1][2][1][RTW89_UK][10] = 34, -+ [1][1][2][1][RTW89_FCC][11] = 127, -+ [1][1][2][1][RTW89_ETSI][11] = 127, -+ [1][1][2][1][RTW89_MKK][11] = 127, -+ [1][1][2][1][RTW89_IC][11] = 127, -+ [1][1][2][1][RTW89_KCC][11] = 127, -+ [1][1][2][1][RTW89_ACMA][11] = 127, -+ [1][1][2][1][RTW89_CHILE][11] = 127, -+ [1][1][2][1][RTW89_UKRAINE][11] = 127, -+ [1][1][2][1][RTW89_MEXICO][11] = 127, -+ [1][1][2][1][RTW89_CN][11] = 127, -+ [1][1][2][1][RTW89_QATAR][11] = 127, -+ [1][1][2][1][RTW89_UK][11] = 127, -+ [1][1][2][1][RTW89_FCC][12] = 127, -+ [1][1][2][1][RTW89_ETSI][12] = 127, -+ [1][1][2][1][RTW89_MKK][12] = 127, -+ [1][1][2][1][RTW89_IC][12] = 127, -+ [1][1][2][1][RTW89_KCC][12] = 127, -+ [1][1][2][1][RTW89_ACMA][12] = 127, -+ [1][1][2][1][RTW89_CHILE][12] = 127, -+ [1][1][2][1][RTW89_UKRAINE][12] = 127, -+ [1][1][2][1][RTW89_MEXICO][12] = 127, -+ [1][1][2][1][RTW89_CN][12] = 127, -+ [1][1][2][1][RTW89_QATAR][12] = 127, -+ [1][1][2][1][RTW89_UK][12] = 127, -+ [1][1][2][1][RTW89_FCC][13] = 127, -+ [1][1][2][1][RTW89_ETSI][13] = 127, -+ [1][1][2][1][RTW89_MKK][13] = 127, -+ [1][1][2][1][RTW89_IC][13] = 127, -+ [1][1][2][1][RTW89_KCC][13] = 127, -+ [1][1][2][1][RTW89_ACMA][13] = 127, -+ [1][1][2][1][RTW89_CHILE][13] = 127, -+ [1][1][2][1][RTW89_UKRAINE][13] = 127, -+ [1][1][2][1][RTW89_MEXICO][13] = 127, -+ [1][1][2][1][RTW89_CN][13] = 127, -+ [1][1][2][1][RTW89_QATAR][13] = 127, -+ [1][1][2][1][RTW89_UK][13] = 127, -+}; -+ -+const s8 rtw89_8852b_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = { -+ [0][0][1][0][RTW89_WW][0] = 42, -+ [0][0][1][0][RTW89_WW][2] = 42, -+ [0][0][1][0][RTW89_WW][4] = 42, -+ [0][0][1][0][RTW89_WW][6] = 42, -+ [0][0][1][0][RTW89_WW][8] = 52, -+ [0][0][1][0][RTW89_WW][10] = 52, -+ [0][0][1][0][RTW89_WW][12] = 52, -+ [0][0][1][0][RTW89_WW][14] = 52, -+ [0][0][1][0][RTW89_WW][15] = 52, -+ [0][0][1][0][RTW89_WW][17] = 52, -+ [0][0][1][0][RTW89_WW][19] = 52, -+ [0][0][1][0][RTW89_WW][21] = 52, -+ [0][0][1][0][RTW89_WW][23] = 52, -+ [0][0][1][0][RTW89_WW][25] = 52, -+ [0][0][1][0][RTW89_WW][27] = 52, -+ [0][0][1][0][RTW89_WW][29] = 52, -+ [0][0][1][0][RTW89_WW][31] = 52, -+ [0][0][1][0][RTW89_WW][33] = 52, -+ [0][0][1][0][RTW89_WW][35] = 52, -+ [0][0][1][0][RTW89_WW][37] = 68, -+ [0][0][1][0][RTW89_WW][38] = 28, -+ [0][0][1][0][RTW89_WW][40] = 28, -+ [0][0][1][0][RTW89_WW][42] = 28, -+ [0][0][1][0][RTW89_WW][44] = 28, -+ [0][0][1][0][RTW89_WW][46] = 28, -+ [0][0][1][0][RTW89_WW][48] = 78, -+ [0][0][1][0][RTW89_WW][50] = 78, -+ [0][0][1][0][RTW89_WW][52] = 78, -+ [0][1][1][0][RTW89_WW][0] = 30, -+ [0][1][1][0][RTW89_WW][2] = 32, -+ [0][1][1][0][RTW89_WW][4] = 30, -+ [0][1][1][0][RTW89_WW][6] = 30, -+ [0][1][1][0][RTW89_WW][8] = 40, -+ [0][1][1][0][RTW89_WW][10] = 40, -+ [0][1][1][0][RTW89_WW][12] = 40, -+ [0][1][1][0][RTW89_WW][14] = 40, -+ [0][1][1][0][RTW89_WW][15] = 40, -+ [0][1][1][0][RTW89_WW][17] = 40, -+ [0][1][1][0][RTW89_WW][19] = 40, -+ [0][1][1][0][RTW89_WW][21] = 40, -+ [0][1][1][0][RTW89_WW][23] = 40, -+ [0][1][1][0][RTW89_WW][25] = 40, -+ [0][1][1][0][RTW89_WW][27] = 40, -+ [0][1][1][0][RTW89_WW][29] = 40, -+ [0][1][1][0][RTW89_WW][31] = 40, -+ [0][1][1][0][RTW89_WW][33] = 40, -+ [0][1][1][0][RTW89_WW][35] = 40, -+ [0][1][1][0][RTW89_WW][37] = 50, -+ [0][1][1][0][RTW89_WW][38] = 16, -+ [0][1][1][0][RTW89_WW][40] = 16, -+ [0][1][1][0][RTW89_WW][42] = 16, -+ [0][1][1][0][RTW89_WW][44] = 16, -+ [0][1][1][0][RTW89_WW][46] = 16, -+ [0][1][1][0][RTW89_WW][48] = 56, -+ [0][1][1][0][RTW89_WW][50] = 56, -+ [0][1][1][0][RTW89_WW][52] = 56, -+ [0][0][2][0][RTW89_WW][0] = 42, -+ [0][0][2][0][RTW89_WW][2] = 42, -+ [0][0][2][0][RTW89_WW][4] = 42, -+ [0][0][2][0][RTW89_WW][6] = 42, -+ [0][0][2][0][RTW89_WW][8] = 52, -+ [0][0][2][0][RTW89_WW][10] = 52, -+ [0][0][2][0][RTW89_WW][12] = 52, -+ [0][0][2][0][RTW89_WW][14] = 52, -+ [0][0][2][0][RTW89_WW][15] = 52, -+ [0][0][2][0][RTW89_WW][17] = 52, -+ [0][0][2][0][RTW89_WW][19] = 52, -+ [0][0][2][0][RTW89_WW][21] = 52, -+ [0][0][2][0][RTW89_WW][23] = 52, -+ [0][0][2][0][RTW89_WW][25] = 52, -+ [0][0][2][0][RTW89_WW][27] = 52, -+ [0][0][2][0][RTW89_WW][29] = 52, -+ [0][0][2][0][RTW89_WW][31] = 52, -+ [0][0][2][0][RTW89_WW][33] = 52, -+ [0][0][2][0][RTW89_WW][35] = 52, -+ [0][0][2][0][RTW89_WW][37] = 64, -+ [0][0][2][0][RTW89_WW][38] = 28, -+ [0][0][2][0][RTW89_WW][40] = 28, -+ [0][0][2][0][RTW89_WW][42] = 28, -+ [0][0][2][0][RTW89_WW][44] = 28, -+ [0][0][2][0][RTW89_WW][46] = 28, -+ [0][0][2][0][RTW89_WW][48] = 78, -+ [0][0][2][0][RTW89_WW][50] = 78, -+ [0][0][2][0][RTW89_WW][52] = 78, -+ [0][1][2][0][RTW89_WW][0] = 30, -+ [0][1][2][0][RTW89_WW][2] = 30, -+ [0][1][2][0][RTW89_WW][4] = 30, -+ [0][1][2][0][RTW89_WW][6] = 30, -+ [0][1][2][0][RTW89_WW][8] = 40, -+ [0][1][2][0][RTW89_WW][10] = 40, -+ [0][1][2][0][RTW89_WW][12] = 40, -+ [0][1][2][0][RTW89_WW][14] = 40, -+ [0][1][2][0][RTW89_WW][15] = 40, -+ [0][1][2][0][RTW89_WW][17] = 40, -+ [0][1][2][0][RTW89_WW][19] = 40, -+ [0][1][2][0][RTW89_WW][21] = 40, -+ [0][1][2][0][RTW89_WW][23] = 40, -+ [0][1][2][0][RTW89_WW][25] = 40, -+ [0][1][2][0][RTW89_WW][27] = 40, -+ [0][1][2][0][RTW89_WW][29] = 40, -+ [0][1][2][0][RTW89_WW][31] = 40, -+ [0][1][2][0][RTW89_WW][33] = 40, -+ [0][1][2][0][RTW89_WW][35] = 40, -+ [0][1][2][0][RTW89_WW][37] = 50, -+ [0][1][2][0][RTW89_WW][38] = 16, -+ [0][1][2][0][RTW89_WW][40] = 16, -+ [0][1][2][0][RTW89_WW][42] = 16, -+ [0][1][2][0][RTW89_WW][44] = 16, -+ [0][1][2][0][RTW89_WW][46] = 16, -+ [0][1][2][0][RTW89_WW][48] = 58, -+ [0][1][2][0][RTW89_WW][50] = 58, -+ [0][1][2][0][RTW89_WW][52] = 58, -+ [0][1][2][1][RTW89_WW][0] = 14, -+ [0][1][2][1][RTW89_WW][2] = 14, -+ [0][1][2][1][RTW89_WW][4] = 14, -+ [0][1][2][1][RTW89_WW][6] = 14, -+ [0][1][2][1][RTW89_WW][8] = 28, -+ [0][1][2][1][RTW89_WW][10] = 28, -+ [0][1][2][1][RTW89_WW][12] = 28, -+ [0][1][2][1][RTW89_WW][14] = 28, -+ [0][1][2][1][RTW89_WW][15] = 28, -+ [0][1][2][1][RTW89_WW][17] = 28, -+ [0][1][2][1][RTW89_WW][19] = 28, -+ [0][1][2][1][RTW89_WW][21] = 28, -+ [0][1][2][1][RTW89_WW][23] = 28, -+ [0][1][2][1][RTW89_WW][25] = 28, -+ [0][1][2][1][RTW89_WW][27] = 28, -+ [0][1][2][1][RTW89_WW][29] = 28, -+ [0][1][2][1][RTW89_WW][31] = 28, -+ [0][1][2][1][RTW89_WW][33] = 28, -+ [0][1][2][1][RTW89_WW][35] = 28, -+ [0][1][2][1][RTW89_WW][37] = 36, -+ [0][1][2][1][RTW89_WW][38] = 4, -+ [0][1][2][1][RTW89_WW][40] = 4, -+ [0][1][2][1][RTW89_WW][42] = 4, -+ [0][1][2][1][RTW89_WW][44] = 4, -+ [0][1][2][1][RTW89_WW][46] = 4, -+ [0][1][2][1][RTW89_WW][48] = 58, -+ [0][1][2][1][RTW89_WW][50] = 58, -+ [0][1][2][1][RTW89_WW][52] = 58, -+ [1][0][2][0][RTW89_WW][1] = 42, -+ [1][0][2][0][RTW89_WW][5] = 42, -+ [1][0][2][0][RTW89_WW][9] = 52, -+ [1][0][2][0][RTW89_WW][13] = 52, -+ [1][0][2][0][RTW89_WW][16] = 52, -+ [1][0][2][0][RTW89_WW][20] = 52, -+ [1][0][2][0][RTW89_WW][24] = 52, -+ [1][0][2][0][RTW89_WW][28] = 52, -+ [1][0][2][0][RTW89_WW][32] = 52, -+ [1][0][2][0][RTW89_WW][36] = 64, -+ [1][0][2][0][RTW89_WW][39] = 28, -+ [1][0][2][0][RTW89_WW][43] = 28, -+ [1][0][2][0][RTW89_WW][47] = 78, -+ [1][0][2][0][RTW89_WW][51] = 70, -+ [1][1][2][0][RTW89_WW][1] = 30, -+ [1][1][2][0][RTW89_WW][5] = 30, -+ [1][1][2][0][RTW89_WW][9] = 40, -+ [1][1][2][0][RTW89_WW][13] = 40, -+ [1][1][2][0][RTW89_WW][16] = 40, -+ [1][1][2][0][RTW89_WW][20] = 40, -+ [1][1][2][0][RTW89_WW][24] = 40, -+ [1][1][2][0][RTW89_WW][28] = 40, -+ [1][1][2][0][RTW89_WW][32] = 40, -+ [1][1][2][0][RTW89_WW][36] = 50, -+ [1][1][2][0][RTW89_WW][39] = 16, -+ [1][1][2][0][RTW89_WW][43] = 16, -+ [1][1][2][0][RTW89_WW][47] = 68, -+ [1][1][2][0][RTW89_WW][51] = 66, -+ [1][1][2][1][RTW89_WW][1] = 16, -+ [1][1][2][1][RTW89_WW][5] = 16, -+ [1][1][2][1][RTW89_WW][9] = 28, -+ [1][1][2][1][RTW89_WW][13] = 28, -+ [1][1][2][1][RTW89_WW][16] = 28, -+ [1][1][2][1][RTW89_WW][20] = 28, -+ [1][1][2][1][RTW89_WW][24] = 28, -+ [1][1][2][1][RTW89_WW][28] = 28, -+ [1][1][2][1][RTW89_WW][32] = 28, -+ [1][1][2][1][RTW89_WW][36] = 36, -+ [1][1][2][1][RTW89_WW][39] = 4, -+ [1][1][2][1][RTW89_WW][43] = 4, -+ [1][1][2][1][RTW89_WW][47] = 68, -+ [1][1][2][1][RTW89_WW][51] = 66, -+ [2][0][2][0][RTW89_WW][3] = 42, -+ [2][0][2][0][RTW89_WW][11] = 52, -+ [2][0][2][0][RTW89_WW][18] = 52, -+ [2][0][2][0][RTW89_WW][26] = 52, -+ [2][0][2][0][RTW89_WW][34] = 64, -+ [2][0][2][0][RTW89_WW][41] = 28, -+ [2][0][2][0][RTW89_WW][49] = 64, -+ [2][1][2][0][RTW89_WW][3] = 28, -+ [2][1][2][0][RTW89_WW][11] = 40, -+ [2][1][2][0][RTW89_WW][18] = 40, -+ [2][1][2][0][RTW89_WW][26] = 40, -+ [2][1][2][0][RTW89_WW][34] = 50, -+ [2][1][2][0][RTW89_WW][41] = 16, -+ [2][1][2][0][RTW89_WW][49] = 58, -+ [2][1][2][1][RTW89_WW][3] = 16, -+ [2][1][2][1][RTW89_WW][11] = 28, -+ [2][1][2][1][RTW89_WW][18] = 28, -+ [2][1][2][1][RTW89_WW][26] = 28, -+ [2][1][2][1][RTW89_WW][34] = 34, -+ [2][1][2][1][RTW89_WW][41] = 4, -+ [2][1][2][1][RTW89_WW][49] = 58, -+ [0][0][1][0][RTW89_FCC][0] = 78, -+ [0][0][1][0][RTW89_ETSI][0] = 58, -+ [0][0][1][0][RTW89_MKK][0] = 60, -+ [0][0][1][0][RTW89_IC][0] = 60, -+ [0][0][1][0][RTW89_KCC][0] = 76, -+ [0][0][1][0][RTW89_ACMA][0] = 58, -+ [0][0][1][0][RTW89_CHILE][0] = 42, -+ [0][0][1][0][RTW89_UKRAINE][0] = 52, -+ [0][0][1][0][RTW89_MEXICO][0] = 62, -+ [0][0][1][0][RTW89_CN][0] = 58, -+ [0][0][1][0][RTW89_QATAR][0] = 58, -+ [0][0][1][0][RTW89_UK][0] = 58, -+ [0][0][1][0][RTW89_FCC][2] = 78, -+ [0][0][1][0][RTW89_ETSI][2] = 58, -+ [0][0][1][0][RTW89_MKK][2] = 60, -+ [0][0][1][0][RTW89_IC][2] = 60, -+ [0][0][1][0][RTW89_KCC][2] = 76, -+ [0][0][1][0][RTW89_ACMA][2] = 58, -+ [0][0][1][0][RTW89_CHILE][2] = 42, -+ [0][0][1][0][RTW89_UKRAINE][2] = 52, -+ [0][0][1][0][RTW89_MEXICO][2] = 62, -+ [0][0][1][0][RTW89_CN][2] = 58, -+ [0][0][1][0][RTW89_QATAR][2] = 58, -+ [0][0][1][0][RTW89_UK][2] = 58, -+ [0][0][1][0][RTW89_FCC][4] = 78, -+ [0][0][1][0][RTW89_ETSI][4] = 58, -+ [0][0][1][0][RTW89_MKK][4] = 60, -+ [0][0][1][0][RTW89_IC][4] = 60, -+ [0][0][1][0][RTW89_KCC][4] = 76, -+ [0][0][1][0][RTW89_ACMA][4] = 58, -+ [0][0][1][0][RTW89_CHILE][4] = 42, -+ [0][0][1][0][RTW89_UKRAINE][4] = 52, -+ [0][0][1][0][RTW89_MEXICO][4] = 62, -+ [0][0][1][0][RTW89_CN][4] = 58, -+ [0][0][1][0][RTW89_QATAR][4] = 58, -+ [0][0][1][0][RTW89_UK][4] = 58, -+ [0][0][1][0][RTW89_FCC][6] = 78, -+ [0][0][1][0][RTW89_ETSI][6] = 58, -+ [0][0][1][0][RTW89_MKK][6] = 60, -+ [0][0][1][0][RTW89_IC][6] = 60, -+ [0][0][1][0][RTW89_KCC][6] = 50, -+ [0][0][1][0][RTW89_ACMA][6] = 58, -+ [0][0][1][0][RTW89_CHILE][6] = 42, -+ [0][0][1][0][RTW89_UKRAINE][6] = 52, -+ [0][0][1][0][RTW89_MEXICO][6] = 62, -+ [0][0][1][0][RTW89_CN][6] = 58, -+ [0][0][1][0][RTW89_QATAR][6] = 58, -+ [0][0][1][0][RTW89_UK][6] = 58, -+ [0][0][1][0][RTW89_FCC][8] = 78, -+ [0][0][1][0][RTW89_ETSI][8] = 58, -+ [0][0][1][0][RTW89_MKK][8] = 62, -+ [0][0][1][0][RTW89_IC][8] = 64, -+ [0][0][1][0][RTW89_KCC][8] = 70, -+ [0][0][1][0][RTW89_ACMA][8] = 58, -+ [0][0][1][0][RTW89_CHILE][8] = 66, -+ [0][0][1][0][RTW89_UKRAINE][8] = 52, -+ [0][0][1][0][RTW89_MEXICO][8] = 78, -+ [0][0][1][0][RTW89_CN][8] = 58, -+ [0][0][1][0][RTW89_QATAR][8] = 58, -+ [0][0][1][0][RTW89_UK][8] = 58, -+ [0][0][1][0][RTW89_FCC][10] = 78, -+ [0][0][1][0][RTW89_ETSI][10] = 58, -+ [0][0][1][0][RTW89_MKK][10] = 62, -+ [0][0][1][0][RTW89_IC][10] = 64, -+ [0][0][1][0][RTW89_KCC][10] = 70, -+ [0][0][1][0][RTW89_ACMA][10] = 58, -+ [0][0][1][0][RTW89_CHILE][10] = 66, -+ [0][0][1][0][RTW89_UKRAINE][10] = 52, -+ [0][0][1][0][RTW89_MEXICO][10] = 78, -+ [0][0][1][0][RTW89_CN][10] = 58, -+ [0][0][1][0][RTW89_QATAR][10] = 58, -+ [0][0][1][0][RTW89_UK][10] = 58, -+ [0][0][1][0][RTW89_FCC][12] = 78, -+ [0][0][1][0][RTW89_ETSI][12] = 58, -+ [0][0][1][0][RTW89_MKK][12] = 62, -+ [0][0][1][0][RTW89_IC][12] = 64, -+ [0][0][1][0][RTW89_KCC][12] = 74, -+ [0][0][1][0][RTW89_ACMA][12] = 58, -+ [0][0][1][0][RTW89_CHILE][12] = 66, -+ [0][0][1][0][RTW89_UKRAINE][12] = 52, -+ [0][0][1][0][RTW89_MEXICO][12] = 78, -+ [0][0][1][0][RTW89_CN][12] = 58, -+ [0][0][1][0][RTW89_QATAR][12] = 58, -+ [0][0][1][0][RTW89_UK][12] = 58, -+ [0][0][1][0][RTW89_FCC][14] = 78, -+ [0][0][1][0][RTW89_ETSI][14] = 58, -+ [0][0][1][0][RTW89_MKK][14] = 60, -+ [0][0][1][0][RTW89_IC][14] = 64, -+ [0][0][1][0][RTW89_KCC][14] = 74, -+ [0][0][1][0][RTW89_ACMA][14] = 58, -+ [0][0][1][0][RTW89_CHILE][14] = 66, -+ [0][0][1][0][RTW89_UKRAINE][14] = 52, -+ [0][0][1][0][RTW89_MEXICO][14] = 78, -+ [0][0][1][0][RTW89_CN][14] = 58, -+ [0][0][1][0][RTW89_QATAR][14] = 58, -+ [0][0][1][0][RTW89_UK][14] = 58, -+ [0][0][1][0][RTW89_FCC][15] = 76, -+ [0][0][1][0][RTW89_ETSI][15] = 58, -+ [0][0][1][0][RTW89_MKK][15] = 76, -+ [0][0][1][0][RTW89_IC][15] = 76, -+ [0][0][1][0][RTW89_KCC][15] = 74, -+ [0][0][1][0][RTW89_ACMA][15] = 58, -+ [0][0][1][0][RTW89_CHILE][15] = 66, -+ [0][0][1][0][RTW89_UKRAINE][15] = 52, -+ [0][0][1][0][RTW89_MEXICO][15] = 76, -+ [0][0][1][0][RTW89_CN][15] = 127, -+ [0][0][1][0][RTW89_QATAR][15] = 58, -+ [0][0][1][0][RTW89_UK][15] = 58, -+ [0][0][1][0][RTW89_FCC][17] = 78, -+ [0][0][1][0][RTW89_ETSI][17] = 58, -+ [0][0][1][0][RTW89_MKK][17] = 76, -+ [0][0][1][0][RTW89_IC][17] = 78, -+ [0][0][1][0][RTW89_KCC][17] = 74, -+ [0][0][1][0][RTW89_ACMA][17] = 58, -+ [0][0][1][0][RTW89_CHILE][17] = 66, -+ [0][0][1][0][RTW89_UKRAINE][17] = 52, -+ [0][0][1][0][RTW89_MEXICO][17] = 78, -+ [0][0][1][0][RTW89_CN][17] = 127, -+ [0][0][1][0][RTW89_QATAR][17] = 58, -+ [0][0][1][0][RTW89_UK][17] = 58, -+ [0][0][1][0][RTW89_FCC][19] = 78, -+ [0][0][1][0][RTW89_ETSI][19] = 58, -+ [0][0][1][0][RTW89_MKK][19] = 76, -+ [0][0][1][0][RTW89_IC][19] = 78, -+ [0][0][1][0][RTW89_KCC][19] = 74, -+ [0][0][1][0][RTW89_ACMA][19] = 58, -+ [0][0][1][0][RTW89_CHILE][19] = 66, -+ [0][0][1][0][RTW89_UKRAINE][19] = 52, -+ [0][0][1][0][RTW89_MEXICO][19] = 78, -+ [0][0][1][0][RTW89_CN][19] = 127, -+ [0][0][1][0][RTW89_QATAR][19] = 58, -+ [0][0][1][0][RTW89_UK][19] = 58, -+ [0][0][1][0][RTW89_FCC][21] = 78, -+ [0][0][1][0][RTW89_ETSI][21] = 58, -+ [0][0][1][0][RTW89_MKK][21] = 76, -+ [0][0][1][0][RTW89_IC][21] = 78, -+ [0][0][1][0][RTW89_KCC][21] = 74, -+ [0][0][1][0][RTW89_ACMA][21] = 58, -+ [0][0][1][0][RTW89_CHILE][21] = 68, -+ [0][0][1][0][RTW89_UKRAINE][21] = 52, -+ [0][0][1][0][RTW89_MEXICO][21] = 78, -+ [0][0][1][0][RTW89_CN][21] = 127, -+ [0][0][1][0][RTW89_QATAR][21] = 58, -+ [0][0][1][0][RTW89_UK][21] = 58, -+ [0][0][1][0][RTW89_FCC][23] = 78, -+ [0][0][1][0][RTW89_ETSI][23] = 58, -+ [0][0][1][0][RTW89_MKK][23] = 76, -+ [0][0][1][0][RTW89_IC][23] = 78, -+ [0][0][1][0][RTW89_KCC][23] = 74, -+ [0][0][1][0][RTW89_ACMA][23] = 58, -+ [0][0][1][0][RTW89_CHILE][23] = 68, -+ [0][0][1][0][RTW89_UKRAINE][23] = 52, -+ [0][0][1][0][RTW89_MEXICO][23] = 78, -+ [0][0][1][0][RTW89_CN][23] = 127, -+ [0][0][1][0][RTW89_QATAR][23] = 58, -+ [0][0][1][0][RTW89_UK][23] = 58, -+ [0][0][1][0][RTW89_FCC][25] = 78, -+ [0][0][1][0][RTW89_ETSI][25] = 58, -+ [0][0][1][0][RTW89_MKK][25] = 76, -+ [0][0][1][0][RTW89_IC][25] = 127, -+ [0][0][1][0][RTW89_KCC][25] = 74, -+ [0][0][1][0][RTW89_ACMA][25] = 127, -+ [0][0][1][0][RTW89_CHILE][25] = 68, -+ [0][0][1][0][RTW89_UKRAINE][25] = 52, -+ [0][0][1][0][RTW89_MEXICO][25] = 78, -+ [0][0][1][0][RTW89_CN][25] = 127, -+ [0][0][1][0][RTW89_QATAR][25] = 58, -+ [0][0][1][0][RTW89_UK][25] = 58, -+ [0][0][1][0][RTW89_FCC][27] = 78, -+ [0][0][1][0][RTW89_ETSI][27] = 58, -+ [0][0][1][0][RTW89_MKK][27] = 76, -+ [0][0][1][0][RTW89_IC][27] = 127, -+ [0][0][1][0][RTW89_KCC][27] = 74, -+ [0][0][1][0][RTW89_ACMA][27] = 127, -+ [0][0][1][0][RTW89_CHILE][27] = 66, -+ [0][0][1][0][RTW89_UKRAINE][27] = 52, -+ [0][0][1][0][RTW89_MEXICO][27] = 78, -+ [0][0][1][0][RTW89_CN][27] = 127, -+ [0][0][1][0][RTW89_QATAR][27] = 58, -+ [0][0][1][0][RTW89_UK][27] = 58, -+ [0][0][1][0][RTW89_FCC][29] = 78, -+ [0][0][1][0][RTW89_ETSI][29] = 58, -+ [0][0][1][0][RTW89_MKK][29] = 76, -+ [0][0][1][0][RTW89_IC][29] = 127, -+ [0][0][1][0][RTW89_KCC][29] = 74, -+ [0][0][1][0][RTW89_ACMA][29] = 127, -+ [0][0][1][0][RTW89_CHILE][29] = 66, -+ [0][0][1][0][RTW89_UKRAINE][29] = 52, -+ [0][0][1][0][RTW89_MEXICO][29] = 78, -+ [0][0][1][0][RTW89_CN][29] = 127, -+ [0][0][1][0][RTW89_QATAR][29] = 58, -+ [0][0][1][0][RTW89_UK][29] = 58, -+ [0][0][1][0][RTW89_FCC][31] = 78, -+ [0][0][1][0][RTW89_ETSI][31] = 58, -+ [0][0][1][0][RTW89_MKK][31] = 76, -+ [0][0][1][0][RTW89_IC][31] = 78, -+ [0][0][1][0][RTW89_KCC][31] = 72, -+ [0][0][1][0][RTW89_ACMA][31] = 58, -+ [0][0][1][0][RTW89_CHILE][31] = 66, -+ [0][0][1][0][RTW89_UKRAINE][31] = 52, -+ [0][0][1][0][RTW89_MEXICO][31] = 78, -+ [0][0][1][0][RTW89_CN][31] = 127, -+ [0][0][1][0][RTW89_QATAR][31] = 58, -+ [0][0][1][0][RTW89_UK][31] = 58, -+ [0][0][1][0][RTW89_FCC][33] = 78, -+ [0][0][1][0][RTW89_ETSI][33] = 58, -+ [0][0][1][0][RTW89_MKK][33] = 76, -+ [0][0][1][0][RTW89_IC][33] = 78, -+ [0][0][1][0][RTW89_KCC][33] = 72, -+ [0][0][1][0][RTW89_ACMA][33] = 58, -+ [0][0][1][0][RTW89_CHILE][33] = 66, -+ [0][0][1][0][RTW89_UKRAINE][33] = 52, -+ [0][0][1][0][RTW89_MEXICO][33] = 78, -+ [0][0][1][0][RTW89_CN][33] = 127, -+ [0][0][1][0][RTW89_QATAR][33] = 58, -+ [0][0][1][0][RTW89_UK][33] = 58, -+ [0][0][1][0][RTW89_FCC][35] = 70, -+ [0][0][1][0][RTW89_ETSI][35] = 58, -+ [0][0][1][0][RTW89_MKK][35] = 76, -+ [0][0][1][0][RTW89_IC][35] = 70, -+ [0][0][1][0][RTW89_KCC][35] = 72, -+ [0][0][1][0][RTW89_ACMA][35] = 58, -+ [0][0][1][0][RTW89_CHILE][35] = 66, -+ [0][0][1][0][RTW89_UKRAINE][35] = 52, -+ [0][0][1][0][RTW89_MEXICO][35] = 70, -+ [0][0][1][0][RTW89_CN][35] = 127, -+ [0][0][1][0][RTW89_QATAR][35] = 58, -+ [0][0][1][0][RTW89_UK][35] = 58, -+ [0][0][1][0][RTW89_FCC][37] = 78, -+ [0][0][1][0][RTW89_ETSI][37] = 127, -+ [0][0][1][0][RTW89_MKK][37] = 76, -+ [0][0][1][0][RTW89_IC][37] = 78, -+ [0][0][1][0][RTW89_KCC][37] = 72, -+ [0][0][1][0][RTW89_ACMA][37] = 76, -+ [0][0][1][0][RTW89_CHILE][37] = 68, -+ [0][0][1][0][RTW89_UKRAINE][37] = 127, -+ [0][0][1][0][RTW89_MEXICO][37] = 78, -+ [0][0][1][0][RTW89_CN][37] = 127, -+ [0][0][1][0][RTW89_QATAR][37] = 127, -+ [0][0][1][0][RTW89_UK][37] = 76, -+ [0][0][1][0][RTW89_FCC][38] = 78, -+ [0][0][1][0][RTW89_ETSI][38] = 28, -+ [0][0][1][0][RTW89_MKK][38] = 127, -+ [0][0][1][0][RTW89_IC][38] = 78, -+ [0][0][1][0][RTW89_KCC][38] = 74, -+ [0][0][1][0][RTW89_ACMA][38] = 76, -+ [0][0][1][0][RTW89_CHILE][38] = 68, -+ [0][0][1][0][RTW89_UKRAINE][38] = 28, -+ [0][0][1][0][RTW89_MEXICO][38] = 78, -+ [0][0][1][0][RTW89_CN][38] = 76, -+ [0][0][1][0][RTW89_QATAR][38] = 28, -+ [0][0][1][0][RTW89_UK][38] = 58, -+ [0][0][1][0][RTW89_FCC][40] = 78, -+ [0][0][1][0][RTW89_ETSI][40] = 28, -+ [0][0][1][0][RTW89_MKK][40] = 127, -+ [0][0][1][0][RTW89_IC][40] = 78, -+ [0][0][1][0][RTW89_KCC][40] = 74, -+ [0][0][1][0][RTW89_ACMA][40] = 76, -+ [0][0][1][0][RTW89_CHILE][40] = 68, -+ [0][0][1][0][RTW89_UKRAINE][40] = 28, -+ [0][0][1][0][RTW89_MEXICO][40] = 78, -+ [0][0][1][0][RTW89_CN][40] = 76, -+ [0][0][1][0][RTW89_QATAR][40] = 28, -+ [0][0][1][0][RTW89_UK][40] = 58, -+ [0][0][1][0][RTW89_FCC][42] = 78, -+ [0][0][1][0][RTW89_ETSI][42] = 28, -+ [0][0][1][0][RTW89_MKK][42] = 127, -+ [0][0][1][0][RTW89_IC][42] = 78, -+ [0][0][1][0][RTW89_KCC][42] = 74, -+ [0][0][1][0][RTW89_ACMA][42] = 76, -+ [0][0][1][0][RTW89_CHILE][42] = 66, -+ [0][0][1][0][RTW89_UKRAINE][42] = 28, -+ [0][0][1][0][RTW89_MEXICO][42] = 78, -+ [0][0][1][0][RTW89_CN][42] = 76, -+ [0][0][1][0][RTW89_QATAR][42] = 28, -+ [0][0][1][0][RTW89_UK][42] = 58, -+ [0][0][1][0][RTW89_FCC][44] = 78, -+ [0][0][1][0][RTW89_ETSI][44] = 28, -+ [0][0][1][0][RTW89_MKK][44] = 127, -+ [0][0][1][0][RTW89_IC][44] = 78, -+ [0][0][1][0][RTW89_KCC][44] = 74, -+ [0][0][1][0][RTW89_ACMA][44] = 76, -+ [0][0][1][0][RTW89_CHILE][44] = 68, -+ [0][0][1][0][RTW89_UKRAINE][44] = 28, -+ [0][0][1][0][RTW89_MEXICO][44] = 78, -+ [0][0][1][0][RTW89_CN][44] = 76, -+ [0][0][1][0][RTW89_QATAR][44] = 28, -+ [0][0][1][0][RTW89_UK][44] = 58, -+ [0][0][1][0][RTW89_FCC][46] = 78, -+ [0][0][1][0][RTW89_ETSI][46] = 28, -+ [0][0][1][0][RTW89_MKK][46] = 127, -+ [0][0][1][0][RTW89_IC][46] = 78, -+ [0][0][1][0][RTW89_KCC][46] = 74, -+ [0][0][1][0][RTW89_ACMA][46] = 76, -+ [0][0][1][0][RTW89_CHILE][46] = 68, -+ [0][0][1][0][RTW89_UKRAINE][46] = 28, -+ [0][0][1][0][RTW89_MEXICO][46] = 78, -+ [0][0][1][0][RTW89_CN][46] = 76, -+ [0][0][1][0][RTW89_QATAR][46] = 28, -+ [0][0][1][0][RTW89_UK][46] = 58, -+ [0][0][1][0][RTW89_FCC][48] = 78, -+ [0][0][1][0][RTW89_ETSI][48] = 127, -+ [0][0][1][0][RTW89_MKK][48] = 127, -+ [0][0][1][0][RTW89_IC][48] = 127, -+ [0][0][1][0][RTW89_KCC][48] = 127, -+ [0][0][1][0][RTW89_ACMA][48] = 127, -+ [0][0][1][0][RTW89_CHILE][48] = 127, -+ [0][0][1][0][RTW89_UKRAINE][48] = 127, -+ [0][0][1][0][RTW89_MEXICO][48] = 127, -+ [0][0][1][0][RTW89_CN][48] = 127, -+ [0][0][1][0][RTW89_QATAR][48] = 127, -+ [0][0][1][0][RTW89_UK][48] = 127, -+ [0][0][1][0][RTW89_FCC][50] = 78, -+ [0][0][1][0][RTW89_ETSI][50] = 127, -+ [0][0][1][0][RTW89_MKK][50] = 127, -+ [0][0][1][0][RTW89_IC][50] = 127, -+ [0][0][1][0][RTW89_KCC][50] = 127, -+ [0][0][1][0][RTW89_ACMA][50] = 127, -+ [0][0][1][0][RTW89_CHILE][50] = 127, -+ [0][0][1][0][RTW89_UKRAINE][50] = 127, -+ [0][0][1][0][RTW89_MEXICO][50] = 127, -+ [0][0][1][0][RTW89_CN][50] = 127, -+ [0][0][1][0][RTW89_QATAR][50] = 127, -+ [0][0][1][0][RTW89_UK][50] = 127, -+ [0][0][1][0][RTW89_FCC][52] = 78, -+ [0][0][1][0][RTW89_ETSI][52] = 127, -+ [0][0][1][0][RTW89_MKK][52] = 127, -+ [0][0][1][0][RTW89_IC][52] = 127, -+ [0][0][1][0][RTW89_KCC][52] = 127, -+ [0][0][1][0][RTW89_ACMA][52] = 127, -+ [0][0][1][0][RTW89_CHILE][52] = 127, -+ [0][0][1][0][RTW89_UKRAINE][52] = 127, -+ [0][0][1][0][RTW89_MEXICO][52] = 127, -+ [0][0][1][0][RTW89_CN][52] = 127, -+ [0][0][1][0][RTW89_QATAR][52] = 127, -+ [0][0][1][0][RTW89_UK][52] = 127, -+ [0][1][1][0][RTW89_FCC][0] = 68, -+ [0][1][1][0][RTW89_ETSI][0] = 46, -+ [0][1][1][0][RTW89_MKK][0] = 48, -+ [0][1][1][0][RTW89_IC][0] = 40, -+ [0][1][1][0][RTW89_KCC][0] = 64, -+ [0][1][1][0][RTW89_ACMA][0] = 46, -+ [0][1][1][0][RTW89_CHILE][0] = 30, -+ [0][1][1][0][RTW89_UKRAINE][0] = 40, -+ [0][1][1][0][RTW89_MEXICO][0] = 50, -+ [0][1][1][0][RTW89_CN][0] = 46, -+ [0][1][1][0][RTW89_QATAR][0] = 46, -+ [0][1][1][0][RTW89_UK][0] = 46, -+ [0][1][1][0][RTW89_FCC][2] = 68, -+ [0][1][1][0][RTW89_ETSI][2] = 46, -+ [0][1][1][0][RTW89_MKK][2] = 48, -+ [0][1][1][0][RTW89_IC][2] = 40, -+ [0][1][1][0][RTW89_KCC][2] = 64, -+ [0][1][1][0][RTW89_ACMA][2] = 46, -+ [0][1][1][0][RTW89_CHILE][2] = 32, -+ [0][1][1][0][RTW89_UKRAINE][2] = 40, -+ [0][1][1][0][RTW89_MEXICO][2] = 50, -+ [0][1][1][0][RTW89_CN][2] = 46, -+ [0][1][1][0][RTW89_QATAR][2] = 46, -+ [0][1][1][0][RTW89_UK][2] = 46, -+ [0][1][1][0][RTW89_FCC][4] = 68, -+ [0][1][1][0][RTW89_ETSI][4] = 46, -+ [0][1][1][0][RTW89_MKK][4] = 48, -+ [0][1][1][0][RTW89_IC][4] = 40, -+ [0][1][1][0][RTW89_KCC][4] = 64, -+ [0][1][1][0][RTW89_ACMA][4] = 46, -+ [0][1][1][0][RTW89_CHILE][4] = 30, -+ [0][1][1][0][RTW89_UKRAINE][4] = 40, -+ [0][1][1][0][RTW89_MEXICO][4] = 50, -+ [0][1][1][0][RTW89_CN][4] = 46, -+ [0][1][1][0][RTW89_QATAR][4] = 46, -+ [0][1][1][0][RTW89_UK][4] = 46, -+ [0][1][1][0][RTW89_FCC][6] = 68, -+ [0][1][1][0][RTW89_ETSI][6] = 46, -+ [0][1][1][0][RTW89_MKK][6] = 48, -+ [0][1][1][0][RTW89_IC][6] = 40, -+ [0][1][1][0][RTW89_KCC][6] = 38, -+ [0][1][1][0][RTW89_ACMA][6] = 46, -+ [0][1][1][0][RTW89_CHILE][6] = 30, -+ [0][1][1][0][RTW89_UKRAINE][6] = 40, -+ [0][1][1][0][RTW89_MEXICO][6] = 50, -+ [0][1][1][0][RTW89_CN][6] = 46, -+ [0][1][1][0][RTW89_QATAR][6] = 46, -+ [0][1][1][0][RTW89_UK][6] = 46, -+ [0][1][1][0][RTW89_FCC][8] = 68, -+ [0][1][1][0][RTW89_ETSI][8] = 46, -+ [0][1][1][0][RTW89_MKK][8] = 48, -+ [0][1][1][0][RTW89_IC][8] = 52, -+ [0][1][1][0][RTW89_KCC][8] = 64, -+ [0][1][1][0][RTW89_ACMA][8] = 46, -+ [0][1][1][0][RTW89_CHILE][8] = 52, -+ [0][1][1][0][RTW89_UKRAINE][8] = 40, -+ [0][1][1][0][RTW89_MEXICO][8] = 68, -+ [0][1][1][0][RTW89_CN][8] = 46, -+ [0][1][1][0][RTW89_QATAR][8] = 46, -+ [0][1][1][0][RTW89_UK][8] = 46, -+ [0][1][1][0][RTW89_FCC][10] = 68, -+ [0][1][1][0][RTW89_ETSI][10] = 46, -+ [0][1][1][0][RTW89_MKK][10] = 48, -+ [0][1][1][0][RTW89_IC][10] = 52, -+ [0][1][1][0][RTW89_KCC][10] = 64, -+ [0][1][1][0][RTW89_ACMA][10] = 46, -+ [0][1][1][0][RTW89_CHILE][10] = 52, -+ [0][1][1][0][RTW89_UKRAINE][10] = 40, -+ [0][1][1][0][RTW89_MEXICO][10] = 68, -+ [0][1][1][0][RTW89_CN][10] = 46, -+ [0][1][1][0][RTW89_QATAR][10] = 46, -+ [0][1][1][0][RTW89_UK][10] = 46, -+ [0][1][1][0][RTW89_FCC][12] = 68, -+ [0][1][1][0][RTW89_ETSI][12] = 46, -+ [0][1][1][0][RTW89_MKK][12] = 48, -+ [0][1][1][0][RTW89_IC][12] = 52, -+ [0][1][1][0][RTW89_KCC][12] = 64, -+ [0][1][1][0][RTW89_ACMA][12] = 46, -+ [0][1][1][0][RTW89_CHILE][12] = 52, -+ [0][1][1][0][RTW89_UKRAINE][12] = 40, -+ [0][1][1][0][RTW89_MEXICO][12] = 68, -+ [0][1][1][0][RTW89_CN][12] = 46, -+ [0][1][1][0][RTW89_QATAR][12] = 46, -+ [0][1][1][0][RTW89_UK][12] = 46, -+ [0][1][1][0][RTW89_FCC][14] = 68, -+ [0][1][1][0][RTW89_ETSI][14] = 46, -+ [0][1][1][0][RTW89_MKK][14] = 48, -+ [0][1][1][0][RTW89_IC][14] = 52, -+ [0][1][1][0][RTW89_KCC][14] = 64, -+ [0][1][1][0][RTW89_ACMA][14] = 46, -+ [0][1][1][0][RTW89_CHILE][14] = 52, -+ [0][1][1][0][RTW89_UKRAINE][14] = 40, -+ [0][1][1][0][RTW89_MEXICO][14] = 68, -+ [0][1][1][0][RTW89_CN][14] = 46, -+ [0][1][1][0][RTW89_QATAR][14] = 46, -+ [0][1][1][0][RTW89_UK][14] = 46, -+ [0][1][1][0][RTW89_FCC][15] = 66, -+ [0][1][1][0][RTW89_ETSI][15] = 46, -+ [0][1][1][0][RTW89_MKK][15] = 68, -+ [0][1][1][0][RTW89_IC][15] = 66, -+ [0][1][1][0][RTW89_KCC][15] = 62, -+ [0][1][1][0][RTW89_ACMA][15] = 46, -+ [0][1][1][0][RTW89_CHILE][15] = 48, -+ [0][1][1][0][RTW89_UKRAINE][15] = 40, -+ [0][1][1][0][RTW89_MEXICO][15] = 66, -+ [0][1][1][0][RTW89_CN][15] = 127, -+ [0][1][1][0][RTW89_QATAR][15] = 46, -+ [0][1][1][0][RTW89_UK][15] = 46, -+ [0][1][1][0][RTW89_FCC][17] = 68, -+ [0][1][1][0][RTW89_ETSI][17] = 46, -+ [0][1][1][0][RTW89_MKK][17] = 70, -+ [0][1][1][0][RTW89_IC][17] = 68, -+ [0][1][1][0][RTW89_KCC][17] = 62, -+ [0][1][1][0][RTW89_ACMA][17] = 46, -+ [0][1][1][0][RTW89_CHILE][17] = 48, -+ [0][1][1][0][RTW89_UKRAINE][17] = 40, -+ [0][1][1][0][RTW89_MEXICO][17] = 68, -+ [0][1][1][0][RTW89_CN][17] = 127, -+ [0][1][1][0][RTW89_QATAR][17] = 46, -+ [0][1][1][0][RTW89_UK][17] = 46, -+ [0][1][1][0][RTW89_FCC][19] = 68, -+ [0][1][1][0][RTW89_ETSI][19] = 46, -+ [0][1][1][0][RTW89_MKK][19] = 70, -+ [0][1][1][0][RTW89_IC][19] = 68, -+ [0][1][1][0][RTW89_KCC][19] = 62, -+ [0][1][1][0][RTW89_ACMA][19] = 46, -+ [0][1][1][0][RTW89_CHILE][19] = 48, -+ [0][1][1][0][RTW89_UKRAINE][19] = 40, -+ [0][1][1][0][RTW89_MEXICO][19] = 68, -+ [0][1][1][0][RTW89_CN][19] = 127, -+ [0][1][1][0][RTW89_QATAR][19] = 46, -+ [0][1][1][0][RTW89_UK][19] = 46, -+ [0][1][1][0][RTW89_FCC][21] = 68, -+ [0][1][1][0][RTW89_ETSI][21] = 46, -+ [0][1][1][0][RTW89_MKK][21] = 70, -+ [0][1][1][0][RTW89_IC][21] = 68, -+ [0][1][1][0][RTW89_KCC][21] = 62, -+ [0][1][1][0][RTW89_ACMA][21] = 46, -+ [0][1][1][0][RTW89_CHILE][21] = 48, -+ [0][1][1][0][RTW89_UKRAINE][21] = 40, -+ [0][1][1][0][RTW89_MEXICO][21] = 68, -+ [0][1][1][0][RTW89_CN][21] = 127, -+ [0][1][1][0][RTW89_QATAR][21] = 46, -+ [0][1][1][0][RTW89_UK][21] = 46, -+ [0][1][1][0][RTW89_FCC][23] = 68, -+ [0][1][1][0][RTW89_ETSI][23] = 46, -+ [0][1][1][0][RTW89_MKK][23] = 70, -+ [0][1][1][0][RTW89_IC][23] = 68, -+ [0][1][1][0][RTW89_KCC][23] = 62, -+ [0][1][1][0][RTW89_ACMA][23] = 46, -+ [0][1][1][0][RTW89_CHILE][23] = 48, -+ [0][1][1][0][RTW89_UKRAINE][23] = 40, -+ [0][1][1][0][RTW89_MEXICO][23] = 68, -+ [0][1][1][0][RTW89_CN][23] = 127, -+ [0][1][1][0][RTW89_QATAR][23] = 46, -+ [0][1][1][0][RTW89_UK][23] = 46, -+ [0][1][1][0][RTW89_FCC][25] = 68, -+ [0][1][1][0][RTW89_ETSI][25] = 46, -+ [0][1][1][0][RTW89_MKK][25] = 68, -+ [0][1][1][0][RTW89_IC][25] = 127, -+ [0][1][1][0][RTW89_KCC][25] = 62, -+ [0][1][1][0][RTW89_ACMA][25] = 127, -+ [0][1][1][0][RTW89_CHILE][25] = 48, -+ [0][1][1][0][RTW89_UKRAINE][25] = 40, -+ [0][1][1][0][RTW89_MEXICO][25] = 68, -+ [0][1][1][0][RTW89_CN][25] = 127, -+ [0][1][1][0][RTW89_QATAR][25] = 46, -+ [0][1][1][0][RTW89_UK][25] = 46, -+ [0][1][1][0][RTW89_FCC][27] = 68, -+ [0][1][1][0][RTW89_ETSI][27] = 46, -+ [0][1][1][0][RTW89_MKK][27] = 70, -+ [0][1][1][0][RTW89_IC][27] = 127, -+ [0][1][1][0][RTW89_KCC][27] = 62, -+ [0][1][1][0][RTW89_ACMA][27] = 127, -+ [0][1][1][0][RTW89_CHILE][27] = 50, -+ [0][1][1][0][RTW89_UKRAINE][27] = 40, -+ [0][1][1][0][RTW89_MEXICO][27] = 68, -+ [0][1][1][0][RTW89_CN][27] = 127, -+ [0][1][1][0][RTW89_QATAR][27] = 46, -+ [0][1][1][0][RTW89_UK][27] = 46, -+ [0][1][1][0][RTW89_FCC][29] = 68, -+ [0][1][1][0][RTW89_ETSI][29] = 46, -+ [0][1][1][0][RTW89_MKK][29] = 70, -+ [0][1][1][0][RTW89_IC][29] = 127, -+ [0][1][1][0][RTW89_KCC][29] = 62, -+ [0][1][1][0][RTW89_ACMA][29] = 127, -+ [0][1][1][0][RTW89_CHILE][29] = 50, -+ [0][1][1][0][RTW89_UKRAINE][29] = 40, -+ [0][1][1][0][RTW89_MEXICO][29] = 68, -+ [0][1][1][0][RTW89_CN][29] = 127, -+ [0][1][1][0][RTW89_QATAR][29] = 46, -+ [0][1][1][0][RTW89_UK][29] = 46, -+ [0][1][1][0][RTW89_FCC][31] = 68, -+ [0][1][1][0][RTW89_ETSI][31] = 46, -+ [0][1][1][0][RTW89_MKK][31] = 70, -+ [0][1][1][0][RTW89_IC][31] = 68, -+ [0][1][1][0][RTW89_KCC][31] = 62, -+ [0][1][1][0][RTW89_ACMA][31] = 46, -+ [0][1][1][0][RTW89_CHILE][31] = 50, -+ [0][1][1][0][RTW89_UKRAINE][31] = 40, -+ [0][1][1][0][RTW89_MEXICO][31] = 68, -+ [0][1][1][0][RTW89_CN][31] = 127, -+ [0][1][1][0][RTW89_QATAR][31] = 46, -+ [0][1][1][0][RTW89_UK][31] = 46, -+ [0][1][1][0][RTW89_FCC][33] = 68, -+ [0][1][1][0][RTW89_ETSI][33] = 46, -+ [0][1][1][0][RTW89_MKK][33] = 70, -+ [0][1][1][0][RTW89_IC][33] = 68, -+ [0][1][1][0][RTW89_KCC][33] = 62, -+ [0][1][1][0][RTW89_ACMA][33] = 46, -+ [0][1][1][0][RTW89_CHILE][33] = 50, -+ [0][1][1][0][RTW89_UKRAINE][33] = 40, -+ [0][1][1][0][RTW89_MEXICO][33] = 68, -+ [0][1][1][0][RTW89_CN][33] = 127, -+ [0][1][1][0][RTW89_QATAR][33] = 46, -+ [0][1][1][0][RTW89_UK][33] = 46, -+ [0][1][1][0][RTW89_FCC][35] = 66, -+ [0][1][1][0][RTW89_ETSI][35] = 46, -+ [0][1][1][0][RTW89_MKK][35] = 70, -+ [0][1][1][0][RTW89_IC][35] = 66, -+ [0][1][1][0][RTW89_KCC][35] = 62, -+ [0][1][1][0][RTW89_ACMA][35] = 46, -+ [0][1][1][0][RTW89_CHILE][35] = 50, -+ [0][1][1][0][RTW89_UKRAINE][35] = 40, -+ [0][1][1][0][RTW89_MEXICO][35] = 66, -+ [0][1][1][0][RTW89_CN][35] = 127, -+ [0][1][1][0][RTW89_QATAR][35] = 46, -+ [0][1][1][0][RTW89_UK][35] = 46, -+ [0][1][1][0][RTW89_FCC][37] = 68, -+ [0][1][1][0][RTW89_ETSI][37] = 127, -+ [0][1][1][0][RTW89_MKK][37] = 70, -+ [0][1][1][0][RTW89_IC][37] = 68, -+ [0][1][1][0][RTW89_KCC][37] = 62, -+ [0][1][1][0][RTW89_ACMA][37] = 70, -+ [0][1][1][0][RTW89_CHILE][37] = 50, -+ [0][1][1][0][RTW89_UKRAINE][37] = 127, -+ [0][1][1][0][RTW89_MEXICO][37] = 68, -+ [0][1][1][0][RTW89_CN][37] = 127, -+ [0][1][1][0][RTW89_QATAR][37] = 127, -+ [0][1][1][0][RTW89_UK][37] = 76, -+ [0][1][1][0][RTW89_FCC][38] = 78, -+ [0][1][1][0][RTW89_ETSI][38] = 16, -+ [0][1][1][0][RTW89_MKK][38] = 127, -+ [0][1][1][0][RTW89_IC][38] = 78, -+ [0][1][1][0][RTW89_KCC][38] = 60, -+ [0][1][1][0][RTW89_ACMA][38] = 72, -+ [0][1][1][0][RTW89_CHILE][38] = 48, -+ [0][1][1][0][RTW89_UKRAINE][38] = 16, -+ [0][1][1][0][RTW89_MEXICO][38] = 78, -+ [0][1][1][0][RTW89_CN][38] = 76, -+ [0][1][1][0][RTW89_QATAR][38] = 16, -+ [0][1][1][0][RTW89_UK][38] = 46, -+ [0][1][1][0][RTW89_FCC][40] = 78, -+ [0][1][1][0][RTW89_ETSI][40] = 16, -+ [0][1][1][0][RTW89_MKK][40] = 127, -+ [0][1][1][0][RTW89_IC][40] = 78, -+ [0][1][1][0][RTW89_KCC][40] = 60, -+ [0][1][1][0][RTW89_ACMA][40] = 72, -+ [0][1][1][0][RTW89_CHILE][40] = 48, -+ [0][1][1][0][RTW89_UKRAINE][40] = 16, -+ [0][1][1][0][RTW89_MEXICO][40] = 78, -+ [0][1][1][0][RTW89_CN][40] = 76, -+ [0][1][1][0][RTW89_QATAR][40] = 16, -+ [0][1][1][0][RTW89_UK][40] = 46, -+ [0][1][1][0][RTW89_FCC][42] = 78, -+ [0][1][1][0][RTW89_ETSI][42] = 16, -+ [0][1][1][0][RTW89_MKK][42] = 127, -+ [0][1][1][0][RTW89_IC][42] = 78, -+ [0][1][1][0][RTW89_KCC][42] = 60, -+ [0][1][1][0][RTW89_ACMA][42] = 76, -+ [0][1][1][0][RTW89_CHILE][42] = 48, -+ [0][1][1][0][RTW89_UKRAINE][42] = 16, -+ [0][1][1][0][RTW89_MEXICO][42] = 78, -+ [0][1][1][0][RTW89_CN][42] = 76, -+ [0][1][1][0][RTW89_QATAR][42] = 16, -+ [0][1][1][0][RTW89_UK][42] = 46, -+ [0][1][1][0][RTW89_FCC][44] = 78, -+ [0][1][1][0][RTW89_ETSI][44] = 16, -+ [0][1][1][0][RTW89_MKK][44] = 127, -+ [0][1][1][0][RTW89_IC][44] = 78, -+ [0][1][1][0][RTW89_KCC][44] = 60, -+ [0][1][1][0][RTW89_ACMA][44] = 76, -+ [0][1][1][0][RTW89_CHILE][44] = 48, -+ [0][1][1][0][RTW89_UKRAINE][44] = 16, -+ [0][1][1][0][RTW89_MEXICO][44] = 78, -+ [0][1][1][0][RTW89_CN][44] = 76, -+ [0][1][1][0][RTW89_QATAR][44] = 16, -+ [0][1][1][0][RTW89_UK][44] = 46, -+ [0][1][1][0][RTW89_FCC][46] = 78, -+ [0][1][1][0][RTW89_ETSI][46] = 16, -+ [0][1][1][0][RTW89_MKK][46] = 127, -+ [0][1][1][0][RTW89_IC][46] = 78, -+ [0][1][1][0][RTW89_KCC][46] = 60, -+ [0][1][1][0][RTW89_ACMA][46] = 76, -+ [0][1][1][0][RTW89_CHILE][46] = 48, -+ [0][1][1][0][RTW89_UKRAINE][46] = 16, -+ [0][1][1][0][RTW89_MEXICO][46] = 78, -+ [0][1][1][0][RTW89_CN][46] = 76, -+ [0][1][1][0][RTW89_QATAR][46] = 16, -+ [0][1][1][0][RTW89_UK][46] = 46, -+ [0][1][1][0][RTW89_FCC][48] = 56, -+ [0][1][1][0][RTW89_ETSI][48] = 127, -+ [0][1][1][0][RTW89_MKK][48] = 127, -+ [0][1][1][0][RTW89_IC][48] = 127, -+ [0][1][1][0][RTW89_KCC][48] = 127, -+ [0][1][1][0][RTW89_ACMA][48] = 127, -+ [0][1][1][0][RTW89_CHILE][48] = 127, -+ [0][1][1][0][RTW89_UKRAINE][48] = 127, -+ [0][1][1][0][RTW89_MEXICO][48] = 127, -+ [0][1][1][0][RTW89_CN][48] = 127, -+ [0][1][1][0][RTW89_QATAR][48] = 127, -+ [0][1][1][0][RTW89_UK][48] = 127, -+ [0][1][1][0][RTW89_FCC][50] = 56, -+ [0][1][1][0][RTW89_ETSI][50] = 127, -+ [0][1][1][0][RTW89_MKK][50] = 127, -+ [0][1][1][0][RTW89_IC][50] = 127, -+ [0][1][1][0][RTW89_KCC][50] = 127, -+ [0][1][1][0][RTW89_ACMA][50] = 127, -+ [0][1][1][0][RTW89_CHILE][50] = 127, -+ [0][1][1][0][RTW89_UKRAINE][50] = 127, -+ [0][1][1][0][RTW89_MEXICO][50] = 127, -+ [0][1][1][0][RTW89_CN][50] = 127, -+ [0][1][1][0][RTW89_QATAR][50] = 127, -+ [0][1][1][0][RTW89_UK][50] = 127, -+ [0][1][1][0][RTW89_FCC][52] = 56, -+ [0][1][1][0][RTW89_ETSI][52] = 127, -+ [0][1][1][0][RTW89_MKK][52] = 127, -+ [0][1][1][0][RTW89_IC][52] = 127, -+ [0][1][1][0][RTW89_KCC][52] = 127, -+ [0][1][1][0][RTW89_ACMA][52] = 127, -+ [0][1][1][0][RTW89_CHILE][52] = 127, -+ [0][1][1][0][RTW89_UKRAINE][52] = 127, -+ [0][1][1][0][RTW89_MEXICO][52] = 127, -+ [0][1][1][0][RTW89_CN][52] = 127, -+ [0][1][1][0][RTW89_QATAR][52] = 127, -+ [0][1][1][0][RTW89_UK][52] = 127, -+ [0][0][2][0][RTW89_FCC][0] = 78, -+ [0][0][2][0][RTW89_ETSI][0] = 60, -+ [0][0][2][0][RTW89_MKK][0] = 62, -+ [0][0][2][0][RTW89_IC][0] = 64, -+ [0][0][2][0][RTW89_KCC][0] = 74, -+ [0][0][2][0][RTW89_ACMA][0] = 60, -+ [0][0][2][0][RTW89_CHILE][0] = 42, -+ [0][0][2][0][RTW89_UKRAINE][0] = 52, -+ [0][0][2][0][RTW89_MEXICO][0] = 62, -+ [0][0][2][0][RTW89_CN][0] = 60, -+ [0][0][2][0][RTW89_QATAR][0] = 60, -+ [0][0][2][0][RTW89_UK][0] = 60, -+ [0][0][2][0][RTW89_FCC][2] = 78, -+ [0][0][2][0][RTW89_ETSI][2] = 60, -+ [0][0][2][0][RTW89_MKK][2] = 62, -+ [0][0][2][0][RTW89_IC][2] = 64, -+ [0][0][2][0][RTW89_KCC][2] = 74, -+ [0][0][2][0][RTW89_ACMA][2] = 60, -+ [0][0][2][0][RTW89_CHILE][2] = 42, -+ [0][0][2][0][RTW89_UKRAINE][2] = 52, -+ [0][0][2][0][RTW89_MEXICO][2] = 62, -+ [0][0][2][0][RTW89_CN][2] = 60, -+ [0][0][2][0][RTW89_QATAR][2] = 60, -+ [0][0][2][0][RTW89_UK][2] = 60, -+ [0][0][2][0][RTW89_FCC][4] = 78, -+ [0][0][2][0][RTW89_ETSI][4] = 60, -+ [0][0][2][0][RTW89_MKK][4] = 62, -+ [0][0][2][0][RTW89_IC][4] = 64, -+ [0][0][2][0][RTW89_KCC][4] = 74, -+ [0][0][2][0][RTW89_ACMA][4] = 60, -+ [0][0][2][0][RTW89_CHILE][4] = 42, -+ [0][0][2][0][RTW89_UKRAINE][4] = 52, -+ [0][0][2][0][RTW89_MEXICO][4] = 62, -+ [0][0][2][0][RTW89_CN][4] = 60, -+ [0][0][2][0][RTW89_QATAR][4] = 60, -+ [0][0][2][0][RTW89_UK][4] = 60, -+ [0][0][2][0][RTW89_FCC][6] = 78, -+ [0][0][2][0][RTW89_ETSI][6] = 60, -+ [0][0][2][0][RTW89_MKK][6] = 62, -+ [0][0][2][0][RTW89_IC][6] = 64, -+ [0][0][2][0][RTW89_KCC][6] = 50, -+ [0][0][2][0][RTW89_ACMA][6] = 60, -+ [0][0][2][0][RTW89_CHILE][6] = 42, -+ [0][0][2][0][RTW89_UKRAINE][6] = 52, -+ [0][0][2][0][RTW89_MEXICO][6] = 62, -+ [0][0][2][0][RTW89_CN][6] = 60, -+ [0][0][2][0][RTW89_QATAR][6] = 60, -+ [0][0][2][0][RTW89_UK][6] = 60, -+ [0][0][2][0][RTW89_FCC][8] = 78, -+ [0][0][2][0][RTW89_ETSI][8] = 60, -+ [0][0][2][0][RTW89_MKK][8] = 62, -+ [0][0][2][0][RTW89_IC][8] = 64, -+ [0][0][2][0][RTW89_KCC][8] = 74, -+ [0][0][2][0][RTW89_ACMA][8] = 60, -+ [0][0][2][0][RTW89_CHILE][8] = 66, -+ [0][0][2][0][RTW89_UKRAINE][8] = 52, -+ [0][0][2][0][RTW89_MEXICO][8] = 78, -+ [0][0][2][0][RTW89_CN][8] = 60, -+ [0][0][2][0][RTW89_QATAR][8] = 60, -+ [0][0][2][0][RTW89_UK][8] = 60, -+ [0][0][2][0][RTW89_FCC][10] = 78, -+ [0][0][2][0][RTW89_ETSI][10] = 60, -+ [0][0][2][0][RTW89_MKK][10] = 62, -+ [0][0][2][0][RTW89_IC][10] = 64, -+ [0][0][2][0][RTW89_KCC][10] = 74, -+ [0][0][2][0][RTW89_ACMA][10] = 60, -+ [0][0][2][0][RTW89_CHILE][10] = 66, -+ [0][0][2][0][RTW89_UKRAINE][10] = 52, -+ [0][0][2][0][RTW89_MEXICO][10] = 78, -+ [0][0][2][0][RTW89_CN][10] = 60, -+ [0][0][2][0][RTW89_QATAR][10] = 60, -+ [0][0][2][0][RTW89_UK][10] = 60, -+ [0][0][2][0][RTW89_FCC][12] = 78, -+ [0][0][2][0][RTW89_ETSI][12] = 60, -+ [0][0][2][0][RTW89_MKK][12] = 62, -+ [0][0][2][0][RTW89_IC][12] = 64, -+ [0][0][2][0][RTW89_KCC][12] = 74, -+ [0][0][2][0][RTW89_ACMA][12] = 60, -+ [0][0][2][0][RTW89_CHILE][12] = 66, -+ [0][0][2][0][RTW89_UKRAINE][12] = 52, -+ [0][0][2][0][RTW89_MEXICO][12] = 78, -+ [0][0][2][0][RTW89_CN][12] = 60, -+ [0][0][2][0][RTW89_QATAR][12] = 60, -+ [0][0][2][0][RTW89_UK][12] = 60, -+ [0][0][2][0][RTW89_FCC][14] = 78, -+ [0][0][2][0][RTW89_ETSI][14] = 60, -+ [0][0][2][0][RTW89_MKK][14] = 62, -+ [0][0][2][0][RTW89_IC][14] = 64, -+ [0][0][2][0][RTW89_KCC][14] = 74, -+ [0][0][2][0][RTW89_ACMA][14] = 60, -+ [0][0][2][0][RTW89_CHILE][14] = 66, -+ [0][0][2][0][RTW89_UKRAINE][14] = 52, -+ [0][0][2][0][RTW89_MEXICO][14] = 78, -+ [0][0][2][0][RTW89_CN][14] = 60, -+ [0][0][2][0][RTW89_QATAR][14] = 60, -+ [0][0][2][0][RTW89_UK][14] = 60, -+ [0][0][2][0][RTW89_FCC][15] = 74, -+ [0][0][2][0][RTW89_ETSI][15] = 60, -+ [0][0][2][0][RTW89_MKK][15] = 76, -+ [0][0][2][0][RTW89_IC][15] = 74, -+ [0][0][2][0][RTW89_KCC][15] = 74, -+ [0][0][2][0][RTW89_ACMA][15] = 60, -+ [0][0][2][0][RTW89_CHILE][15] = 64, -+ [0][0][2][0][RTW89_UKRAINE][15] = 52, -+ [0][0][2][0][RTW89_MEXICO][15] = 74, -+ [0][0][2][0][RTW89_CN][15] = 127, -+ [0][0][2][0][RTW89_QATAR][15] = 60, -+ [0][0][2][0][RTW89_UK][15] = 60, -+ [0][0][2][0][RTW89_FCC][17] = 78, -+ [0][0][2][0][RTW89_ETSI][17] = 60, -+ [0][0][2][0][RTW89_MKK][17] = 76, -+ [0][0][2][0][RTW89_IC][17] = 78, -+ [0][0][2][0][RTW89_KCC][17] = 74, -+ [0][0][2][0][RTW89_ACMA][17] = 60, -+ [0][0][2][0][RTW89_CHILE][17] = 64, -+ [0][0][2][0][RTW89_UKRAINE][17] = 52, -+ [0][0][2][0][RTW89_MEXICO][17] = 78, -+ [0][0][2][0][RTW89_CN][17] = 127, -+ [0][0][2][0][RTW89_QATAR][17] = 60, -+ [0][0][2][0][RTW89_UK][17] = 60, -+ [0][0][2][0][RTW89_FCC][19] = 78, -+ [0][0][2][0][RTW89_ETSI][19] = 60, -+ [0][0][2][0][RTW89_MKK][19] = 76, -+ [0][0][2][0][RTW89_IC][19] = 78, -+ [0][0][2][0][RTW89_KCC][19] = 74, -+ [0][0][2][0][RTW89_ACMA][19] = 60, -+ [0][0][2][0][RTW89_CHILE][19] = 64, -+ [0][0][2][0][RTW89_UKRAINE][19] = 52, -+ [0][0][2][0][RTW89_MEXICO][19] = 78, -+ [0][0][2][0][RTW89_CN][19] = 127, -+ [0][0][2][0][RTW89_QATAR][19] = 60, -+ [0][0][2][0][RTW89_UK][19] = 60, -+ [0][0][2][0][RTW89_FCC][21] = 78, -+ [0][0][2][0][RTW89_ETSI][21] = 60, -+ [0][0][2][0][RTW89_MKK][21] = 76, -+ [0][0][2][0][RTW89_IC][21] = 78, -+ [0][0][2][0][RTW89_KCC][21] = 74, -+ [0][0][2][0][RTW89_ACMA][21] = 60, -+ [0][0][2][0][RTW89_CHILE][21] = 66, -+ [0][0][2][0][RTW89_UKRAINE][21] = 52, -+ [0][0][2][0][RTW89_MEXICO][21] = 78, -+ [0][0][2][0][RTW89_CN][21] = 127, -+ [0][0][2][0][RTW89_QATAR][21] = 60, -+ [0][0][2][0][RTW89_UK][21] = 60, -+ [0][0][2][0][RTW89_FCC][23] = 78, -+ [0][0][2][0][RTW89_ETSI][23] = 60, -+ [0][0][2][0][RTW89_MKK][23] = 76, -+ [0][0][2][0][RTW89_IC][23] = 78, -+ [0][0][2][0][RTW89_KCC][23] = 74, -+ [0][0][2][0][RTW89_ACMA][23] = 60, -+ [0][0][2][0][RTW89_CHILE][23] = 66, -+ [0][0][2][0][RTW89_UKRAINE][23] = 52, -+ [0][0][2][0][RTW89_MEXICO][23] = 78, -+ [0][0][2][0][RTW89_CN][23] = 127, -+ [0][0][2][0][RTW89_QATAR][23] = 60, -+ [0][0][2][0][RTW89_UK][23] = 60, -+ [0][0][2][0][RTW89_FCC][25] = 78, -+ [0][0][2][0][RTW89_ETSI][25] = 60, -+ [0][0][2][0][RTW89_MKK][25] = 76, -+ [0][0][2][0][RTW89_IC][25] = 127, -+ [0][0][2][0][RTW89_KCC][25] = 74, -+ [0][0][2][0][RTW89_ACMA][25] = 127, -+ [0][0][2][0][RTW89_CHILE][25] = 66, -+ [0][0][2][0][RTW89_UKRAINE][25] = 52, -+ [0][0][2][0][RTW89_MEXICO][25] = 78, -+ [0][0][2][0][RTW89_CN][25] = 127, -+ [0][0][2][0][RTW89_QATAR][25] = 60, -+ [0][0][2][0][RTW89_UK][25] = 60, -+ [0][0][2][0][RTW89_FCC][27] = 78, -+ [0][0][2][0][RTW89_ETSI][27] = 60, -+ [0][0][2][0][RTW89_MKK][27] = 76, -+ [0][0][2][0][RTW89_IC][27] = 127, -+ [0][0][2][0][RTW89_KCC][27] = 74, -+ [0][0][2][0][RTW89_ACMA][27] = 127, -+ [0][0][2][0][RTW89_CHILE][27] = 64, -+ [0][0][2][0][RTW89_UKRAINE][27] = 52, -+ [0][0][2][0][RTW89_MEXICO][27] = 78, -+ [0][0][2][0][RTW89_CN][27] = 127, -+ [0][0][2][0][RTW89_QATAR][27] = 60, -+ [0][0][2][0][RTW89_UK][27] = 60, -+ [0][0][2][0][RTW89_FCC][29] = 78, -+ [0][0][2][0][RTW89_ETSI][29] = 60, -+ [0][0][2][0][RTW89_MKK][29] = 76, -+ [0][0][2][0][RTW89_IC][29] = 127, -+ [0][0][2][0][RTW89_KCC][29] = 74, -+ [0][0][2][0][RTW89_ACMA][29] = 127, -+ [0][0][2][0][RTW89_CHILE][29] = 64, -+ [0][0][2][0][RTW89_UKRAINE][29] = 52, -+ [0][0][2][0][RTW89_MEXICO][29] = 78, -+ [0][0][2][0][RTW89_CN][29] = 127, -+ [0][0][2][0][RTW89_QATAR][29] = 60, -+ [0][0][2][0][RTW89_UK][29] = 60, -+ [0][0][2][0][RTW89_FCC][31] = 78, -+ [0][0][2][0][RTW89_ETSI][31] = 60, -+ [0][0][2][0][RTW89_MKK][31] = 76, -+ [0][0][2][0][RTW89_IC][31] = 78, -+ [0][0][2][0][RTW89_KCC][31] = 74, -+ [0][0][2][0][RTW89_ACMA][31] = 60, -+ [0][0][2][0][RTW89_CHILE][31] = 64, -+ [0][0][2][0][RTW89_UKRAINE][31] = 52, -+ [0][0][2][0][RTW89_MEXICO][31] = 78, -+ [0][0][2][0][RTW89_CN][31] = 127, -+ [0][0][2][0][RTW89_QATAR][31] = 60, -+ [0][0][2][0][RTW89_UK][31] = 60, -+ [0][0][2][0][RTW89_FCC][33] = 78, -+ [0][0][2][0][RTW89_ETSI][33] = 60, -+ [0][0][2][0][RTW89_MKK][33] = 76, -+ [0][0][2][0][RTW89_IC][33] = 78, -+ [0][0][2][0][RTW89_KCC][33] = 74, -+ [0][0][2][0][RTW89_ACMA][33] = 60, -+ [0][0][2][0][RTW89_CHILE][33] = 64, -+ [0][0][2][0][RTW89_UKRAINE][33] = 52, -+ [0][0][2][0][RTW89_MEXICO][33] = 78, -+ [0][0][2][0][RTW89_CN][33] = 127, -+ [0][0][2][0][RTW89_QATAR][33] = 60, -+ [0][0][2][0][RTW89_UK][33] = 60, -+ [0][0][2][0][RTW89_FCC][35] = 70, -+ [0][0][2][0][RTW89_ETSI][35] = 60, -+ [0][0][2][0][RTW89_MKK][35] = 76, -+ [0][0][2][0][RTW89_IC][35] = 70, -+ [0][0][2][0][RTW89_KCC][35] = 74, -+ [0][0][2][0][RTW89_ACMA][35] = 60, -+ [0][0][2][0][RTW89_CHILE][35] = 64, -+ [0][0][2][0][RTW89_UKRAINE][35] = 52, -+ [0][0][2][0][RTW89_MEXICO][35] = 70, -+ [0][0][2][0][RTW89_CN][35] = 127, -+ [0][0][2][0][RTW89_QATAR][35] = 60, -+ [0][0][2][0][RTW89_UK][35] = 60, -+ [0][0][2][0][RTW89_FCC][37] = 78, -+ [0][0][2][0][RTW89_ETSI][37] = 127, -+ [0][0][2][0][RTW89_MKK][37] = 76, -+ [0][0][2][0][RTW89_IC][37] = 78, -+ [0][0][2][0][RTW89_KCC][37] = 74, -+ [0][0][2][0][RTW89_ACMA][37] = 76, -+ [0][0][2][0][RTW89_CHILE][37] = 64, -+ [0][0][2][0][RTW89_UKRAINE][37] = 127, -+ [0][0][2][0][RTW89_MEXICO][37] = 78, -+ [0][0][2][0][RTW89_CN][37] = 127, -+ [0][0][2][0][RTW89_QATAR][37] = 127, -+ [0][0][2][0][RTW89_UK][37] = 74, -+ [0][0][2][0][RTW89_FCC][38] = 78, -+ [0][0][2][0][RTW89_ETSI][38] = 28, -+ [0][0][2][0][RTW89_MKK][38] = 127, -+ [0][0][2][0][RTW89_IC][38] = 78, -+ [0][0][2][0][RTW89_KCC][38] = 72, -+ [0][0][2][0][RTW89_ACMA][38] = 76, -+ [0][0][2][0][RTW89_CHILE][38] = 64, -+ [0][0][2][0][RTW89_UKRAINE][38] = 28, -+ [0][0][2][0][RTW89_MEXICO][38] = 78, -+ [0][0][2][0][RTW89_CN][38] = 76, -+ [0][0][2][0][RTW89_QATAR][38] = 28, -+ [0][0][2][0][RTW89_UK][38] = 60, -+ [0][0][2][0][RTW89_FCC][40] = 78, -+ [0][0][2][0][RTW89_ETSI][40] = 28, -+ [0][0][2][0][RTW89_MKK][40] = 127, -+ [0][0][2][0][RTW89_IC][40] = 78, -+ [0][0][2][0][RTW89_KCC][40] = 72, -+ [0][0][2][0][RTW89_ACMA][40] = 76, -+ [0][0][2][0][RTW89_CHILE][40] = 64, -+ [0][0][2][0][RTW89_UKRAINE][40] = 28, -+ [0][0][2][0][RTW89_MEXICO][40] = 78, -+ [0][0][2][0][RTW89_CN][40] = 76, -+ [0][0][2][0][RTW89_QATAR][40] = 28, -+ [0][0][2][0][RTW89_UK][40] = 60, -+ [0][0][2][0][RTW89_FCC][42] = 78, -+ [0][0][2][0][RTW89_ETSI][42] = 28, -+ [0][0][2][0][RTW89_MKK][42] = 127, -+ [0][0][2][0][RTW89_IC][42] = 78, -+ [0][0][2][0][RTW89_KCC][42] = 72, -+ [0][0][2][0][RTW89_ACMA][42] = 76, -+ [0][0][2][0][RTW89_CHILE][42] = 64, -+ [0][0][2][0][RTW89_UKRAINE][42] = 28, -+ [0][0][2][0][RTW89_MEXICO][42] = 78, -+ [0][0][2][0][RTW89_CN][42] = 76, -+ [0][0][2][0][RTW89_QATAR][42] = 28, -+ [0][0][2][0][RTW89_UK][42] = 60, -+ [0][0][2][0][RTW89_FCC][44] = 78, -+ [0][0][2][0][RTW89_ETSI][44] = 28, -+ [0][0][2][0][RTW89_MKK][44] = 127, -+ [0][0][2][0][RTW89_IC][44] = 78, -+ [0][0][2][0][RTW89_KCC][44] = 72, -+ [0][0][2][0][RTW89_ACMA][44] = 76, -+ [0][0][2][0][RTW89_CHILE][44] = 66, -+ [0][0][2][0][RTW89_UKRAINE][44] = 28, -+ [0][0][2][0][RTW89_MEXICO][44] = 78, -+ [0][0][2][0][RTW89_CN][44] = 76, -+ [0][0][2][0][RTW89_QATAR][44] = 28, -+ [0][0][2][0][RTW89_UK][44] = 60, -+ [0][0][2][0][RTW89_FCC][46] = 78, -+ [0][0][2][0][RTW89_ETSI][46] = 28, -+ [0][0][2][0][RTW89_MKK][46] = 127, -+ [0][0][2][0][RTW89_IC][46] = 78, -+ [0][0][2][0][RTW89_KCC][46] = 72, -+ [0][0][2][0][RTW89_ACMA][46] = 76, -+ [0][0][2][0][RTW89_CHILE][46] = 66, -+ [0][0][2][0][RTW89_UKRAINE][46] = 28, -+ [0][0][2][0][RTW89_MEXICO][46] = 78, -+ [0][0][2][0][RTW89_CN][46] = 76, -+ [0][0][2][0][RTW89_QATAR][46] = 28, -+ [0][0][2][0][RTW89_UK][46] = 60, -+ [0][0][2][0][RTW89_FCC][48] = 78, -+ [0][0][2][0][RTW89_ETSI][48] = 127, -+ [0][0][2][0][RTW89_MKK][48] = 127, -+ [0][0][2][0][RTW89_IC][48] = 127, -+ [0][0][2][0][RTW89_KCC][48] = 127, -+ [0][0][2][0][RTW89_ACMA][48] = 127, -+ [0][0][2][0][RTW89_CHILE][48] = 127, -+ [0][0][2][0][RTW89_UKRAINE][48] = 127, -+ [0][0][2][0][RTW89_MEXICO][48] = 127, -+ [0][0][2][0][RTW89_CN][48] = 127, -+ [0][0][2][0][RTW89_QATAR][48] = 127, -+ [0][0][2][0][RTW89_UK][48] = 127, -+ [0][0][2][0][RTW89_FCC][50] = 78, -+ [0][0][2][0][RTW89_ETSI][50] = 127, -+ [0][0][2][0][RTW89_MKK][50] = 127, -+ [0][0][2][0][RTW89_IC][50] = 127, -+ [0][0][2][0][RTW89_KCC][50] = 127, -+ [0][0][2][0][RTW89_ACMA][50] = 127, -+ [0][0][2][0][RTW89_CHILE][50] = 127, -+ [0][0][2][0][RTW89_UKRAINE][50] = 127, -+ [0][0][2][0][RTW89_MEXICO][50] = 127, -+ [0][0][2][0][RTW89_CN][50] = 127, -+ [0][0][2][0][RTW89_QATAR][50] = 127, -+ [0][0][2][0][RTW89_UK][50] = 127, -+ [0][0][2][0][RTW89_FCC][52] = 78, -+ [0][0][2][0][RTW89_ETSI][52] = 127, -+ [0][0][2][0][RTW89_MKK][52] = 127, -+ [0][0][2][0][RTW89_IC][52] = 127, -+ [0][0][2][0][RTW89_KCC][52] = 127, -+ [0][0][2][0][RTW89_ACMA][52] = 127, -+ [0][0][2][0][RTW89_CHILE][52] = 127, -+ [0][0][2][0][RTW89_UKRAINE][52] = 127, -+ [0][0][2][0][RTW89_MEXICO][52] = 127, -+ [0][0][2][0][RTW89_CN][52] = 127, -+ [0][0][2][0][RTW89_QATAR][52] = 127, -+ [0][0][2][0][RTW89_UK][52] = 127, -+ [0][1][2][0][RTW89_FCC][0] = 70, -+ [0][1][2][0][RTW89_ETSI][0] = 48, -+ [0][1][2][0][RTW89_MKK][0] = 50, -+ [0][1][2][0][RTW89_IC][0] = 42, -+ [0][1][2][0][RTW89_KCC][0] = 62, -+ [0][1][2][0][RTW89_ACMA][0] = 48, -+ [0][1][2][0][RTW89_CHILE][0] = 30, -+ [0][1][2][0][RTW89_UKRAINE][0] = 40, -+ [0][1][2][0][RTW89_MEXICO][0] = 50, -+ [0][1][2][0][RTW89_CN][0] = 48, -+ [0][1][2][0][RTW89_QATAR][0] = 48, -+ [0][1][2][0][RTW89_UK][0] = 48, -+ [0][1][2][0][RTW89_FCC][2] = 70, -+ [0][1][2][0][RTW89_ETSI][2] = 48, -+ [0][1][2][0][RTW89_MKK][2] = 50, -+ [0][1][2][0][RTW89_IC][2] = 42, -+ [0][1][2][0][RTW89_KCC][2] = 62, -+ [0][1][2][0][RTW89_ACMA][2] = 48, -+ [0][1][2][0][RTW89_CHILE][2] = 30, -+ [0][1][2][0][RTW89_UKRAINE][2] = 40, -+ [0][1][2][0][RTW89_MEXICO][2] = 50, -+ [0][1][2][0][RTW89_CN][2] = 48, -+ [0][1][2][0][RTW89_QATAR][2] = 48, -+ [0][1][2][0][RTW89_UK][2] = 48, -+ [0][1][2][0][RTW89_FCC][4] = 70, -+ [0][1][2][0][RTW89_ETSI][4] = 48, -+ [0][1][2][0][RTW89_MKK][4] = 50, -+ [0][1][2][0][RTW89_IC][4] = 42, -+ [0][1][2][0][RTW89_KCC][4] = 62, -+ [0][1][2][0][RTW89_ACMA][4] = 48, -+ [0][1][2][0][RTW89_CHILE][4] = 30, -+ [0][1][2][0][RTW89_UKRAINE][4] = 40, -+ [0][1][2][0][RTW89_MEXICO][4] = 50, -+ [0][1][2][0][RTW89_CN][4] = 48, -+ [0][1][2][0][RTW89_QATAR][4] = 48, -+ [0][1][2][0][RTW89_UK][4] = 48, -+ [0][1][2][0][RTW89_FCC][6] = 70, -+ [0][1][2][0][RTW89_ETSI][6] = 48, -+ [0][1][2][0][RTW89_MKK][6] = 50, -+ [0][1][2][0][RTW89_IC][6] = 42, -+ [0][1][2][0][RTW89_KCC][6] = 34, -+ [0][1][2][0][RTW89_ACMA][6] = 48, -+ [0][1][2][0][RTW89_CHILE][6] = 30, -+ [0][1][2][0][RTW89_UKRAINE][6] = 40, -+ [0][1][2][0][RTW89_MEXICO][6] = 50, -+ [0][1][2][0][RTW89_CN][6] = 48, -+ [0][1][2][0][RTW89_QATAR][6] = 48, -+ [0][1][2][0][RTW89_UK][6] = 48, -+ [0][1][2][0][RTW89_FCC][8] = 70, -+ [0][1][2][0][RTW89_ETSI][8] = 48, -+ [0][1][2][0][RTW89_MKK][8] = 50, -+ [0][1][2][0][RTW89_IC][8] = 52, -+ [0][1][2][0][RTW89_KCC][8] = 62, -+ [0][1][2][0][RTW89_ACMA][8] = 48, -+ [0][1][2][0][RTW89_CHILE][8] = 50, -+ [0][1][2][0][RTW89_UKRAINE][8] = 40, -+ [0][1][2][0][RTW89_MEXICO][8] = 70, -+ [0][1][2][0][RTW89_CN][8] = 48, -+ [0][1][2][0][RTW89_QATAR][8] = 48, -+ [0][1][2][0][RTW89_UK][8] = 48, -+ [0][1][2][0][RTW89_FCC][10] = 70, -+ [0][1][2][0][RTW89_ETSI][10] = 48, -+ [0][1][2][0][RTW89_MKK][10] = 50, -+ [0][1][2][0][RTW89_IC][10] = 52, -+ [0][1][2][0][RTW89_KCC][10] = 62, -+ [0][1][2][0][RTW89_ACMA][10] = 48, -+ [0][1][2][0][RTW89_CHILE][10] = 50, -+ [0][1][2][0][RTW89_UKRAINE][10] = 40, -+ [0][1][2][0][RTW89_MEXICO][10] = 70, -+ [0][1][2][0][RTW89_CN][10] = 48, -+ [0][1][2][0][RTW89_QATAR][10] = 48, -+ [0][1][2][0][RTW89_UK][10] = 48, -+ [0][1][2][0][RTW89_FCC][12] = 70, -+ [0][1][2][0][RTW89_ETSI][12] = 48, -+ [0][1][2][0][RTW89_MKK][12] = 50, -+ [0][1][2][0][RTW89_IC][12] = 52, -+ [0][1][2][0][RTW89_KCC][12] = 62, -+ [0][1][2][0][RTW89_ACMA][12] = 48, -+ [0][1][2][0][RTW89_CHILE][12] = 50, -+ [0][1][2][0][RTW89_UKRAINE][12] = 40, -+ [0][1][2][0][RTW89_MEXICO][12] = 70, -+ [0][1][2][0][RTW89_CN][12] = 48, -+ [0][1][2][0][RTW89_QATAR][12] = 48, -+ [0][1][2][0][RTW89_UK][12] = 48, -+ [0][1][2][0][RTW89_FCC][14] = 70, -+ [0][1][2][0][RTW89_ETSI][14] = 48, -+ [0][1][2][0][RTW89_MKK][14] = 50, -+ [0][1][2][0][RTW89_IC][14] = 52, -+ [0][1][2][0][RTW89_KCC][14] = 62, -+ [0][1][2][0][RTW89_ACMA][14] = 48, -+ [0][1][2][0][RTW89_CHILE][14] = 50, -+ [0][1][2][0][RTW89_UKRAINE][14] = 40, -+ [0][1][2][0][RTW89_MEXICO][14] = 70, -+ [0][1][2][0][RTW89_CN][14] = 48, -+ [0][1][2][0][RTW89_QATAR][14] = 48, -+ [0][1][2][0][RTW89_UK][14] = 48, -+ [0][1][2][0][RTW89_FCC][15] = 68, -+ [0][1][2][0][RTW89_ETSI][15] = 48, -+ [0][1][2][0][RTW89_MKK][15] = 70, -+ [0][1][2][0][RTW89_IC][15] = 68, -+ [0][1][2][0][RTW89_KCC][15] = 62, -+ [0][1][2][0][RTW89_ACMA][15] = 48, -+ [0][1][2][0][RTW89_CHILE][15] = 48, -+ [0][1][2][0][RTW89_UKRAINE][15] = 40, -+ [0][1][2][0][RTW89_MEXICO][15] = 68, -+ [0][1][2][0][RTW89_CN][15] = 127, -+ [0][1][2][0][RTW89_QATAR][15] = 48, -+ [0][1][2][0][RTW89_UK][15] = 48, -+ [0][1][2][0][RTW89_FCC][17] = 70, -+ [0][1][2][0][RTW89_ETSI][17] = 48, -+ [0][1][2][0][RTW89_MKK][17] = 70, -+ [0][1][2][0][RTW89_IC][17] = 70, -+ [0][1][2][0][RTW89_KCC][17] = 62, -+ [0][1][2][0][RTW89_ACMA][17] = 48, -+ [0][1][2][0][RTW89_CHILE][17] = 48, -+ [0][1][2][0][RTW89_UKRAINE][17] = 40, -+ [0][1][2][0][RTW89_MEXICO][17] = 70, -+ [0][1][2][0][RTW89_CN][17] = 127, -+ [0][1][2][0][RTW89_QATAR][17] = 48, -+ [0][1][2][0][RTW89_UK][17] = 48, -+ [0][1][2][0][RTW89_FCC][19] = 70, -+ [0][1][2][0][RTW89_ETSI][19] = 48, -+ [0][1][2][0][RTW89_MKK][19] = 70, -+ [0][1][2][0][RTW89_IC][19] = 70, -+ [0][1][2][0][RTW89_KCC][19] = 62, -+ [0][1][2][0][RTW89_ACMA][19] = 48, -+ [0][1][2][0][RTW89_CHILE][19] = 48, -+ [0][1][2][0][RTW89_UKRAINE][19] = 40, -+ [0][1][2][0][RTW89_MEXICO][19] = 70, -+ [0][1][2][0][RTW89_CN][19] = 127, -+ [0][1][2][0][RTW89_QATAR][19] = 48, -+ [0][1][2][0][RTW89_UK][19] = 48, -+ [0][1][2][0][RTW89_FCC][21] = 70, -+ [0][1][2][0][RTW89_ETSI][21] = 48, -+ [0][1][2][0][RTW89_MKK][21] = 70, -+ [0][1][2][0][RTW89_IC][21] = 70, -+ [0][1][2][0][RTW89_KCC][21] = 62, -+ [0][1][2][0][RTW89_ACMA][21] = 48, -+ [0][1][2][0][RTW89_CHILE][21] = 48, -+ [0][1][2][0][RTW89_UKRAINE][21] = 40, -+ [0][1][2][0][RTW89_MEXICO][21] = 70, -+ [0][1][2][0][RTW89_CN][21] = 127, -+ [0][1][2][0][RTW89_QATAR][21] = 48, -+ [0][1][2][0][RTW89_UK][21] = 48, -+ [0][1][2][0][RTW89_FCC][23] = 70, -+ [0][1][2][0][RTW89_ETSI][23] = 48, -+ [0][1][2][0][RTW89_MKK][23] = 70, -+ [0][1][2][0][RTW89_IC][23] = 70, -+ [0][1][2][0][RTW89_KCC][23] = 62, -+ [0][1][2][0][RTW89_ACMA][23] = 48, -+ [0][1][2][0][RTW89_CHILE][23] = 48, -+ [0][1][2][0][RTW89_UKRAINE][23] = 40, -+ [0][1][2][0][RTW89_MEXICO][23] = 70, -+ [0][1][2][0][RTW89_CN][23] = 127, -+ [0][1][2][0][RTW89_QATAR][23] = 48, -+ [0][1][2][0][RTW89_UK][23] = 48, -+ [0][1][2][0][RTW89_FCC][25] = 70, -+ [0][1][2][0][RTW89_ETSI][25] = 48, -+ [0][1][2][0][RTW89_MKK][25] = 70, -+ [0][1][2][0][RTW89_IC][25] = 127, -+ [0][1][2][0][RTW89_KCC][25] = 62, -+ [0][1][2][0][RTW89_ACMA][25] = 127, -+ [0][1][2][0][RTW89_CHILE][25] = 48, -+ [0][1][2][0][RTW89_UKRAINE][25] = 40, -+ [0][1][2][0][RTW89_MEXICO][25] = 70, -+ [0][1][2][0][RTW89_CN][25] = 127, -+ [0][1][2][0][RTW89_QATAR][25] = 48, -+ [0][1][2][0][RTW89_UK][25] = 48, -+ [0][1][2][0][RTW89_FCC][27] = 70, -+ [0][1][2][0][RTW89_ETSI][27] = 48, -+ [0][1][2][0][RTW89_MKK][27] = 70, -+ [0][1][2][0][RTW89_IC][27] = 127, -+ [0][1][2][0][RTW89_KCC][27] = 62, -+ [0][1][2][0][RTW89_ACMA][27] = 127, -+ [0][1][2][0][RTW89_CHILE][27] = 50, -+ [0][1][2][0][RTW89_UKRAINE][27] = 40, -+ [0][1][2][0][RTW89_MEXICO][27] = 70, -+ [0][1][2][0][RTW89_CN][27] = 127, -+ [0][1][2][0][RTW89_QATAR][27] = 48, -+ [0][1][2][0][RTW89_UK][27] = 48, -+ [0][1][2][0][RTW89_FCC][29] = 70, -+ [0][1][2][0][RTW89_ETSI][29] = 48, -+ [0][1][2][0][RTW89_MKK][29] = 70, -+ [0][1][2][0][RTW89_IC][29] = 127, -+ [0][1][2][0][RTW89_KCC][29] = 62, -+ [0][1][2][0][RTW89_ACMA][29] = 127, -+ [0][1][2][0][RTW89_CHILE][29] = 50, -+ [0][1][2][0][RTW89_UKRAINE][29] = 40, -+ [0][1][2][0][RTW89_MEXICO][29] = 70, -+ [0][1][2][0][RTW89_CN][29] = 127, -+ [0][1][2][0][RTW89_QATAR][29] = 48, -+ [0][1][2][0][RTW89_UK][29] = 48, -+ [0][1][2][0][RTW89_FCC][31] = 70, -+ [0][1][2][0][RTW89_ETSI][31] = 48, -+ [0][1][2][0][RTW89_MKK][31] = 70, -+ [0][1][2][0][RTW89_IC][31] = 70, -+ [0][1][2][0][RTW89_KCC][31] = 62, -+ [0][1][2][0][RTW89_ACMA][31] = 48, -+ [0][1][2][0][RTW89_CHILE][31] = 50, -+ [0][1][2][0][RTW89_UKRAINE][31] = 40, -+ [0][1][2][0][RTW89_MEXICO][31] = 70, -+ [0][1][2][0][RTW89_CN][31] = 127, -+ [0][1][2][0][RTW89_QATAR][31] = 48, -+ [0][1][2][0][RTW89_UK][31] = 48, -+ [0][1][2][0][RTW89_FCC][33] = 70, -+ [0][1][2][0][RTW89_ETSI][33] = 48, -+ [0][1][2][0][RTW89_MKK][33] = 70, -+ [0][1][2][0][RTW89_IC][33] = 70, -+ [0][1][2][0][RTW89_KCC][33] = 62, -+ [0][1][2][0][RTW89_ACMA][33] = 48, -+ [0][1][2][0][RTW89_CHILE][33] = 50, -+ [0][1][2][0][RTW89_UKRAINE][33] = 40, -+ [0][1][2][0][RTW89_MEXICO][33] = 70, -+ [0][1][2][0][RTW89_CN][33] = 127, -+ [0][1][2][0][RTW89_QATAR][33] = 48, -+ [0][1][2][0][RTW89_UK][33] = 48, -+ [0][1][2][0][RTW89_FCC][35] = 66, -+ [0][1][2][0][RTW89_ETSI][35] = 48, -+ [0][1][2][0][RTW89_MKK][35] = 70, -+ [0][1][2][0][RTW89_IC][35] = 66, -+ [0][1][2][0][RTW89_KCC][35] = 62, -+ [0][1][2][0][RTW89_ACMA][35] = 48, -+ [0][1][2][0][RTW89_CHILE][35] = 50, -+ [0][1][2][0][RTW89_UKRAINE][35] = 40, -+ [0][1][2][0][RTW89_MEXICO][35] = 66, -+ [0][1][2][0][RTW89_CN][35] = 127, -+ [0][1][2][0][RTW89_QATAR][35] = 48, -+ [0][1][2][0][RTW89_UK][35] = 48, -+ [0][1][2][0][RTW89_FCC][37] = 70, -+ [0][1][2][0][RTW89_ETSI][37] = 127, -+ [0][1][2][0][RTW89_MKK][37] = 70, -+ [0][1][2][0][RTW89_IC][37] = 70, -+ [0][1][2][0][RTW89_KCC][37] = 62, -+ [0][1][2][0][RTW89_ACMA][37] = 70, -+ [0][1][2][0][RTW89_CHILE][37] = 50, -+ [0][1][2][0][RTW89_UKRAINE][37] = 127, -+ [0][1][2][0][RTW89_MEXICO][37] = 70, -+ [0][1][2][0][RTW89_CN][37] = 127, -+ [0][1][2][0][RTW89_QATAR][37] = 127, -+ [0][1][2][0][RTW89_UK][37] = 76, -+ [0][1][2][0][RTW89_FCC][38] = 78, -+ [0][1][2][0][RTW89_ETSI][38] = 16, -+ [0][1][2][0][RTW89_MKK][38] = 127, -+ [0][1][2][0][RTW89_IC][38] = 78, -+ [0][1][2][0][RTW89_KCC][38] = 62, -+ [0][1][2][0][RTW89_ACMA][38] = 74, -+ [0][1][2][0][RTW89_CHILE][38] = 50, -+ [0][1][2][0][RTW89_UKRAINE][38] = 16, -+ [0][1][2][0][RTW89_MEXICO][38] = 78, -+ [0][1][2][0][RTW89_CN][38] = 76, -+ [0][1][2][0][RTW89_QATAR][38] = 16, -+ [0][1][2][0][RTW89_UK][38] = 48, -+ [0][1][2][0][RTW89_FCC][40] = 78, -+ [0][1][2][0][RTW89_ETSI][40] = 16, -+ [0][1][2][0][RTW89_MKK][40] = 127, -+ [0][1][2][0][RTW89_IC][40] = 78, -+ [0][1][2][0][RTW89_KCC][40] = 62, -+ [0][1][2][0][RTW89_ACMA][40] = 74, -+ [0][1][2][0][RTW89_CHILE][40] = 50, -+ [0][1][2][0][RTW89_UKRAINE][40] = 16, -+ [0][1][2][0][RTW89_MEXICO][40] = 78, -+ [0][1][2][0][RTW89_CN][40] = 76, -+ [0][1][2][0][RTW89_QATAR][40] = 16, -+ [0][1][2][0][RTW89_UK][40] = 48, -+ [0][1][2][0][RTW89_FCC][42] = 78, -+ [0][1][2][0][RTW89_ETSI][42] = 16, -+ [0][1][2][0][RTW89_MKK][42] = 127, -+ [0][1][2][0][RTW89_IC][42] = 78, -+ [0][1][2][0][RTW89_KCC][42] = 62, -+ [0][1][2][0][RTW89_ACMA][42] = 76, -+ [0][1][2][0][RTW89_CHILE][42] = 52, -+ [0][1][2][0][RTW89_UKRAINE][42] = 16, -+ [0][1][2][0][RTW89_MEXICO][42] = 78, -+ [0][1][2][0][RTW89_CN][42] = 76, -+ [0][1][2][0][RTW89_QATAR][42] = 16, -+ [0][1][2][0][RTW89_UK][42] = 48, -+ [0][1][2][0][RTW89_FCC][44] = 78, -+ [0][1][2][0][RTW89_ETSI][44] = 16, -+ [0][1][2][0][RTW89_MKK][44] = 127, -+ [0][1][2][0][RTW89_IC][44] = 78, -+ [0][1][2][0][RTW89_KCC][44] = 62, -+ [0][1][2][0][RTW89_ACMA][44] = 76, -+ [0][1][2][0][RTW89_CHILE][44] = 52, -+ [0][1][2][0][RTW89_UKRAINE][44] = 16, -+ [0][1][2][0][RTW89_MEXICO][44] = 78, -+ [0][1][2][0][RTW89_CN][44] = 76, -+ [0][1][2][0][RTW89_QATAR][44] = 16, -+ [0][1][2][0][RTW89_UK][44] = 48, -+ [0][1][2][0][RTW89_FCC][46] = 78, -+ [0][1][2][0][RTW89_ETSI][46] = 16, -+ [0][1][2][0][RTW89_MKK][46] = 127, -+ [0][1][2][0][RTW89_IC][46] = 78, -+ [0][1][2][0][RTW89_KCC][46] = 62, -+ [0][1][2][0][RTW89_ACMA][46] = 76, -+ [0][1][2][0][RTW89_CHILE][46] = 52, -+ [0][1][2][0][RTW89_UKRAINE][46] = 16, -+ [0][1][2][0][RTW89_MEXICO][46] = 78, -+ [0][1][2][0][RTW89_CN][46] = 76, -+ [0][1][2][0][RTW89_QATAR][46] = 16, -+ [0][1][2][0][RTW89_UK][46] = 48, -+ [0][1][2][0][RTW89_FCC][48] = 58, -+ [0][1][2][0][RTW89_ETSI][48] = 127, -+ [0][1][2][0][RTW89_MKK][48] = 127, -+ [0][1][2][0][RTW89_IC][48] = 127, -+ [0][1][2][0][RTW89_KCC][48] = 127, -+ [0][1][2][0][RTW89_ACMA][48] = 127, -+ [0][1][2][0][RTW89_CHILE][48] = 127, -+ [0][1][2][0][RTW89_UKRAINE][48] = 127, -+ [0][1][2][0][RTW89_MEXICO][48] = 127, -+ [0][1][2][0][RTW89_CN][48] = 127, -+ [0][1][2][0][RTW89_QATAR][48] = 127, -+ [0][1][2][0][RTW89_UK][48] = 127, -+ [0][1][2][0][RTW89_FCC][50] = 58, -+ [0][1][2][0][RTW89_ETSI][50] = 127, -+ [0][1][2][0][RTW89_MKK][50] = 127, -+ [0][1][2][0][RTW89_IC][50] = 127, -+ [0][1][2][0][RTW89_KCC][50] = 127, -+ [0][1][2][0][RTW89_ACMA][50] = 127, -+ [0][1][2][0][RTW89_CHILE][50] = 127, -+ [0][1][2][0][RTW89_UKRAINE][50] = 127, -+ [0][1][2][0][RTW89_MEXICO][50] = 127, -+ [0][1][2][0][RTW89_CN][50] = 127, -+ [0][1][2][0][RTW89_QATAR][50] = 127, -+ [0][1][2][0][RTW89_UK][50] = 127, -+ [0][1][2][0][RTW89_FCC][52] = 58, -+ [0][1][2][0][RTW89_ETSI][52] = 127, -+ [0][1][2][0][RTW89_MKK][52] = 127, -+ [0][1][2][0][RTW89_IC][52] = 127, -+ [0][1][2][0][RTW89_KCC][52] = 127, -+ [0][1][2][0][RTW89_ACMA][52] = 127, -+ [0][1][2][0][RTW89_CHILE][52] = 127, -+ [0][1][2][0][RTW89_UKRAINE][52] = 127, -+ [0][1][2][0][RTW89_MEXICO][52] = 127, -+ [0][1][2][0][RTW89_CN][52] = 127, -+ [0][1][2][0][RTW89_QATAR][52] = 127, -+ [0][1][2][0][RTW89_UK][52] = 127, -+ [0][1][2][1][RTW89_FCC][0] = 68, -+ [0][1][2][1][RTW89_ETSI][0] = 36, -+ [0][1][2][1][RTW89_MKK][0] = 50, -+ [0][1][2][1][RTW89_IC][0] = 40, -+ [0][1][2][1][RTW89_KCC][0] = 62, -+ [0][1][2][1][RTW89_ACMA][0] = 36, -+ [0][1][2][1][RTW89_CHILE][0] = 14, -+ [0][1][2][1][RTW89_UKRAINE][0] = 28, -+ [0][1][2][1][RTW89_MEXICO][0] = 50, -+ [0][1][2][1][RTW89_CN][0] = 36, -+ [0][1][2][1][RTW89_QATAR][0] = 36, -+ [0][1][2][1][RTW89_UK][0] = 36, -+ [0][1][2][1][RTW89_FCC][2] = 68, -+ [0][1][2][1][RTW89_ETSI][2] = 36, -+ [0][1][2][1][RTW89_MKK][2] = 50, -+ [0][1][2][1][RTW89_IC][2] = 40, -+ [0][1][2][1][RTW89_KCC][2] = 62, -+ [0][1][2][1][RTW89_ACMA][2] = 36, -+ [0][1][2][1][RTW89_CHILE][2] = 14, -+ [0][1][2][1][RTW89_UKRAINE][2] = 28, -+ [0][1][2][1][RTW89_MEXICO][2] = 50, -+ [0][1][2][1][RTW89_CN][2] = 36, -+ [0][1][2][1][RTW89_QATAR][2] = 36, -+ [0][1][2][1][RTW89_UK][2] = 36, -+ [0][1][2][1][RTW89_FCC][4] = 68, -+ [0][1][2][1][RTW89_ETSI][4] = 36, -+ [0][1][2][1][RTW89_MKK][4] = 50, -+ [0][1][2][1][RTW89_IC][4] = 40, -+ [0][1][2][1][RTW89_KCC][4] = 62, -+ [0][1][2][1][RTW89_ACMA][4] = 36, -+ [0][1][2][1][RTW89_CHILE][4] = 14, -+ [0][1][2][1][RTW89_UKRAINE][4] = 28, -+ [0][1][2][1][RTW89_MEXICO][4] = 50, -+ [0][1][2][1][RTW89_CN][4] = 36, -+ [0][1][2][1][RTW89_QATAR][4] = 36, -+ [0][1][2][1][RTW89_UK][4] = 36, -+ [0][1][2][1][RTW89_FCC][6] = 68, -+ [0][1][2][1][RTW89_ETSI][6] = 36, -+ [0][1][2][1][RTW89_MKK][6] = 50, -+ [0][1][2][1][RTW89_IC][6] = 40, -+ [0][1][2][1][RTW89_KCC][6] = 34, -+ [0][1][2][1][RTW89_ACMA][6] = 36, -+ [0][1][2][1][RTW89_CHILE][6] = 14, -+ [0][1][2][1][RTW89_UKRAINE][6] = 28, -+ [0][1][2][1][RTW89_MEXICO][6] = 50, -+ [0][1][2][1][RTW89_CN][6] = 36, -+ [0][1][2][1][RTW89_QATAR][6] = 36, -+ [0][1][2][1][RTW89_UK][6] = 36, -+ [0][1][2][1][RTW89_FCC][8] = 68, -+ [0][1][2][1][RTW89_ETSI][8] = 36, -+ [0][1][2][1][RTW89_MKK][8] = 50, -+ [0][1][2][1][RTW89_IC][8] = 40, -+ [0][1][2][1][RTW89_KCC][8] = 62, -+ [0][1][2][1][RTW89_ACMA][8] = 36, -+ [0][1][2][1][RTW89_CHILE][8] = 36, -+ [0][1][2][1][RTW89_UKRAINE][8] = 28, -+ [0][1][2][1][RTW89_MEXICO][8] = 68, -+ [0][1][2][1][RTW89_CN][8] = 36, -+ [0][1][2][1][RTW89_QATAR][8] = 36, -+ [0][1][2][1][RTW89_UK][8] = 36, -+ [0][1][2][1][RTW89_FCC][10] = 68, -+ [0][1][2][1][RTW89_ETSI][10] = 36, -+ [0][1][2][1][RTW89_MKK][10] = 50, -+ [0][1][2][1][RTW89_IC][10] = 40, -+ [0][1][2][1][RTW89_KCC][10] = 62, -+ [0][1][2][1][RTW89_ACMA][10] = 36, -+ [0][1][2][1][RTW89_CHILE][10] = 36, -+ [0][1][2][1][RTW89_UKRAINE][10] = 28, -+ [0][1][2][1][RTW89_MEXICO][10] = 68, -+ [0][1][2][1][RTW89_CN][10] = 36, -+ [0][1][2][1][RTW89_QATAR][10] = 36, -+ [0][1][2][1][RTW89_UK][10] = 36, -+ [0][1][2][1][RTW89_FCC][12] = 68, -+ [0][1][2][1][RTW89_ETSI][12] = 36, -+ [0][1][2][1][RTW89_MKK][12] = 50, -+ [0][1][2][1][RTW89_IC][12] = 40, -+ [0][1][2][1][RTW89_KCC][12] = 62, -+ [0][1][2][1][RTW89_ACMA][12] = 36, -+ [0][1][2][1][RTW89_CHILE][12] = 36, -+ [0][1][2][1][RTW89_UKRAINE][12] = 28, -+ [0][1][2][1][RTW89_MEXICO][12] = 68, -+ [0][1][2][1][RTW89_CN][12] = 36, -+ [0][1][2][1][RTW89_QATAR][12] = 36, -+ [0][1][2][1][RTW89_UK][12] = 36, -+ [0][1][2][1][RTW89_FCC][14] = 68, -+ [0][1][2][1][RTW89_ETSI][14] = 36, -+ [0][1][2][1][RTW89_MKK][14] = 50, -+ [0][1][2][1][RTW89_IC][14] = 40, -+ [0][1][2][1][RTW89_KCC][14] = 62, -+ [0][1][2][1][RTW89_ACMA][14] = 36, -+ [0][1][2][1][RTW89_CHILE][14] = 36, -+ [0][1][2][1][RTW89_UKRAINE][14] = 28, -+ [0][1][2][1][RTW89_MEXICO][14] = 68, -+ [0][1][2][1][RTW89_CN][14] = 36, -+ [0][1][2][1][RTW89_QATAR][14] = 36, -+ [0][1][2][1][RTW89_UK][14] = 36, -+ [0][1][2][1][RTW89_FCC][15] = 68, -+ [0][1][2][1][RTW89_ETSI][15] = 36, -+ [0][1][2][1][RTW89_MKK][15] = 70, -+ [0][1][2][1][RTW89_IC][15] = 68, -+ [0][1][2][1][RTW89_KCC][15] = 62, -+ [0][1][2][1][RTW89_ACMA][15] = 36, -+ [0][1][2][1][RTW89_CHILE][15] = 36, -+ [0][1][2][1][RTW89_UKRAINE][15] = 28, -+ [0][1][2][1][RTW89_MEXICO][15] = 68, -+ [0][1][2][1][RTW89_CN][15] = 127, -+ [0][1][2][1][RTW89_QATAR][15] = 36, -+ [0][1][2][1][RTW89_UK][15] = 36, -+ [0][1][2][1][RTW89_FCC][17] = 68, -+ [0][1][2][1][RTW89_ETSI][17] = 36, -+ [0][1][2][1][RTW89_MKK][17] = 70, -+ [0][1][2][1][RTW89_IC][17] = 68, -+ [0][1][2][1][RTW89_KCC][17] = 62, -+ [0][1][2][1][RTW89_ACMA][17] = 36, -+ [0][1][2][1][RTW89_CHILE][17] = 36, -+ [0][1][2][1][RTW89_UKRAINE][17] = 28, -+ [0][1][2][1][RTW89_MEXICO][17] = 68, -+ [0][1][2][1][RTW89_CN][17] = 127, -+ [0][1][2][1][RTW89_QATAR][17] = 36, -+ [0][1][2][1][RTW89_UK][17] = 36, -+ [0][1][2][1][RTW89_FCC][19] = 68, -+ [0][1][2][1][RTW89_ETSI][19] = 36, -+ [0][1][2][1][RTW89_MKK][19] = 70, -+ [0][1][2][1][RTW89_IC][19] = 68, -+ [0][1][2][1][RTW89_KCC][19] = 62, -+ [0][1][2][1][RTW89_ACMA][19] = 36, -+ [0][1][2][1][RTW89_CHILE][19] = 36, -+ [0][1][2][1][RTW89_UKRAINE][19] = 28, -+ [0][1][2][1][RTW89_MEXICO][19] = 68, -+ [0][1][2][1][RTW89_CN][19] = 127, -+ [0][1][2][1][RTW89_QATAR][19] = 36, -+ [0][1][2][1][RTW89_UK][19] = 36, -+ [0][1][2][1][RTW89_FCC][21] = 68, -+ [0][1][2][1][RTW89_ETSI][21] = 36, -+ [0][1][2][1][RTW89_MKK][21] = 70, -+ [0][1][2][1][RTW89_IC][21] = 68, -+ [0][1][2][1][RTW89_KCC][21] = 62, -+ [0][1][2][1][RTW89_ACMA][21] = 36, -+ [0][1][2][1][RTW89_CHILE][21] = 36, -+ [0][1][2][1][RTW89_UKRAINE][21] = 28, -+ [0][1][2][1][RTW89_MEXICO][21] = 68, -+ [0][1][2][1][RTW89_CN][21] = 127, -+ [0][1][2][1][RTW89_QATAR][21] = 36, -+ [0][1][2][1][RTW89_UK][21] = 36, -+ [0][1][2][1][RTW89_FCC][23] = 68, -+ [0][1][2][1][RTW89_ETSI][23] = 36, -+ [0][1][2][1][RTW89_MKK][23] = 70, -+ [0][1][2][1][RTW89_IC][23] = 68, -+ [0][1][2][1][RTW89_KCC][23] = 62, -+ [0][1][2][1][RTW89_ACMA][23] = 36, -+ [0][1][2][1][RTW89_CHILE][23] = 36, -+ [0][1][2][1][RTW89_UKRAINE][23] = 28, -+ [0][1][2][1][RTW89_MEXICO][23] = 68, -+ [0][1][2][1][RTW89_CN][23] = 127, -+ [0][1][2][1][RTW89_QATAR][23] = 36, -+ [0][1][2][1][RTW89_UK][23] = 36, -+ [0][1][2][1][RTW89_FCC][25] = 66, -+ [0][1][2][1][RTW89_ETSI][25] = 36, -+ [0][1][2][1][RTW89_MKK][25] = 70, -+ [0][1][2][1][RTW89_IC][25] = 127, -+ [0][1][2][1][RTW89_KCC][25] = 62, -+ [0][1][2][1][RTW89_ACMA][25] = 127, -+ [0][1][2][1][RTW89_CHILE][25] = 36, -+ [0][1][2][1][RTW89_UKRAINE][25] = 28, -+ [0][1][2][1][RTW89_MEXICO][25] = 66, -+ [0][1][2][1][RTW89_CN][25] = 127, -+ [0][1][2][1][RTW89_QATAR][25] = 36, -+ [0][1][2][1][RTW89_UK][25] = 36, -+ [0][1][2][1][RTW89_FCC][27] = 66, -+ [0][1][2][1][RTW89_ETSI][27] = 36, -+ [0][1][2][1][RTW89_MKK][27] = 70, -+ [0][1][2][1][RTW89_IC][27] = 127, -+ [0][1][2][1][RTW89_KCC][27] = 62, -+ [0][1][2][1][RTW89_ACMA][27] = 127, -+ [0][1][2][1][RTW89_CHILE][27] = 36, -+ [0][1][2][1][RTW89_UKRAINE][27] = 28, -+ [0][1][2][1][RTW89_MEXICO][27] = 66, -+ [0][1][2][1][RTW89_CN][27] = 127, -+ [0][1][2][1][RTW89_QATAR][27] = 36, -+ [0][1][2][1][RTW89_UK][27] = 36, -+ [0][1][2][1][RTW89_FCC][29] = 66, -+ [0][1][2][1][RTW89_ETSI][29] = 36, -+ [0][1][2][1][RTW89_MKK][29] = 70, -+ [0][1][2][1][RTW89_IC][29] = 127, -+ [0][1][2][1][RTW89_KCC][29] = 62, -+ [0][1][2][1][RTW89_ACMA][29] = 127, -+ [0][1][2][1][RTW89_CHILE][29] = 36, -+ [0][1][2][1][RTW89_UKRAINE][29] = 28, -+ [0][1][2][1][RTW89_MEXICO][29] = 66, -+ [0][1][2][1][RTW89_CN][29] = 127, -+ [0][1][2][1][RTW89_QATAR][29] = 36, -+ [0][1][2][1][RTW89_UK][29] = 36, -+ [0][1][2][1][RTW89_FCC][31] = 66, -+ [0][1][2][1][RTW89_ETSI][31] = 36, -+ [0][1][2][1][RTW89_MKK][31] = 70, -+ [0][1][2][1][RTW89_IC][31] = 66, -+ [0][1][2][1][RTW89_KCC][31] = 62, -+ [0][1][2][1][RTW89_ACMA][31] = 36, -+ [0][1][2][1][RTW89_CHILE][31] = 36, -+ [0][1][2][1][RTW89_UKRAINE][31] = 28, -+ [0][1][2][1][RTW89_MEXICO][31] = 66, -+ [0][1][2][1][RTW89_CN][31] = 127, -+ [0][1][2][1][RTW89_QATAR][31] = 36, -+ [0][1][2][1][RTW89_UK][31] = 36, -+ [0][1][2][1][RTW89_FCC][33] = 66, -+ [0][1][2][1][RTW89_ETSI][33] = 36, -+ [0][1][2][1][RTW89_MKK][33] = 70, -+ [0][1][2][1][RTW89_IC][33] = 66, -+ [0][1][2][1][RTW89_KCC][33] = 62, -+ [0][1][2][1][RTW89_ACMA][33] = 36, -+ [0][1][2][1][RTW89_CHILE][33] = 36, -+ [0][1][2][1][RTW89_UKRAINE][33] = 28, -+ [0][1][2][1][RTW89_MEXICO][33] = 66, -+ [0][1][2][1][RTW89_CN][33] = 127, -+ [0][1][2][1][RTW89_QATAR][33] = 36, -+ [0][1][2][1][RTW89_UK][33] = 36, -+ [0][1][2][1][RTW89_FCC][35] = 66, -+ [0][1][2][1][RTW89_ETSI][35] = 36, -+ [0][1][2][1][RTW89_MKK][35] = 70, -+ [0][1][2][1][RTW89_IC][35] = 66, -+ [0][1][2][1][RTW89_KCC][35] = 62, -+ [0][1][2][1][RTW89_ACMA][35] = 36, -+ [0][1][2][1][RTW89_CHILE][35] = 36, -+ [0][1][2][1][RTW89_UKRAINE][35] = 28, -+ [0][1][2][1][RTW89_MEXICO][35] = 66, -+ [0][1][2][1][RTW89_CN][35] = 127, -+ [0][1][2][1][RTW89_QATAR][35] = 36, -+ [0][1][2][1][RTW89_UK][35] = 36, -+ [0][1][2][1][RTW89_FCC][37] = 68, -+ [0][1][2][1][RTW89_ETSI][37] = 127, -+ [0][1][2][1][RTW89_MKK][37] = 70, -+ [0][1][2][1][RTW89_IC][37] = 68, -+ [0][1][2][1][RTW89_KCC][37] = 62, -+ [0][1][2][1][RTW89_ACMA][37] = 70, -+ [0][1][2][1][RTW89_CHILE][37] = 36, -+ [0][1][2][1][RTW89_UKRAINE][37] = 127, -+ [0][1][2][1][RTW89_MEXICO][37] = 68, -+ [0][1][2][1][RTW89_CN][37] = 127, -+ [0][1][2][1][RTW89_QATAR][37] = 127, -+ [0][1][2][1][RTW89_UK][37] = 62, -+ [0][1][2][1][RTW89_FCC][38] = 78, -+ [0][1][2][1][RTW89_ETSI][38] = 4, -+ [0][1][2][1][RTW89_MKK][38] = 127, -+ [0][1][2][1][RTW89_IC][38] = 78, -+ [0][1][2][1][RTW89_KCC][38] = 62, -+ [0][1][2][1][RTW89_ACMA][38] = 74, -+ [0][1][2][1][RTW89_CHILE][38] = 36, -+ [0][1][2][1][RTW89_UKRAINE][38] = 4, -+ [0][1][2][1][RTW89_MEXICO][38] = 78, -+ [0][1][2][1][RTW89_CN][38] = 72, -+ [0][1][2][1][RTW89_QATAR][38] = 4, -+ [0][1][2][1][RTW89_UK][38] = 36, -+ [0][1][2][1][RTW89_FCC][40] = 78, -+ [0][1][2][1][RTW89_ETSI][40] = 4, -+ [0][1][2][1][RTW89_MKK][40] = 127, -+ [0][1][2][1][RTW89_IC][40] = 78, -+ [0][1][2][1][RTW89_KCC][40] = 62, -+ [0][1][2][1][RTW89_ACMA][40] = 74, -+ [0][1][2][1][RTW89_CHILE][40] = 36, -+ [0][1][2][1][RTW89_UKRAINE][40] = 4, -+ [0][1][2][1][RTW89_MEXICO][40] = 78, -+ [0][1][2][1][RTW89_CN][40] = 72, -+ [0][1][2][1][RTW89_QATAR][40] = 4, -+ [0][1][2][1][RTW89_UK][40] = 36, -+ [0][1][2][1][RTW89_FCC][42] = 78, -+ [0][1][2][1][RTW89_ETSI][42] = 4, -+ [0][1][2][1][RTW89_MKK][42] = 127, -+ [0][1][2][1][RTW89_IC][42] = 78, -+ [0][1][2][1][RTW89_KCC][42] = 62, -+ [0][1][2][1][RTW89_ACMA][42] = 76, -+ [0][1][2][1][RTW89_CHILE][42] = 36, -+ [0][1][2][1][RTW89_UKRAINE][42] = 4, -+ [0][1][2][1][RTW89_MEXICO][42] = 78, -+ [0][1][2][1][RTW89_CN][42] = 72, -+ [0][1][2][1][RTW89_QATAR][42] = 4, -+ [0][1][2][1][RTW89_UK][42] = 36, -+ [0][1][2][1][RTW89_FCC][44] = 78, -+ [0][1][2][1][RTW89_ETSI][44] = 4, -+ [0][1][2][1][RTW89_MKK][44] = 127, -+ [0][1][2][1][RTW89_IC][44] = 78, -+ [0][1][2][1][RTW89_KCC][44] = 62, -+ [0][1][2][1][RTW89_ACMA][44] = 76, -+ [0][1][2][1][RTW89_CHILE][44] = 36, -+ [0][1][2][1][RTW89_UKRAINE][44] = 4, -+ [0][1][2][1][RTW89_MEXICO][44] = 78, -+ [0][1][2][1][RTW89_CN][44] = 76, -+ [0][1][2][1][RTW89_QATAR][44] = 4, -+ [0][1][2][1][RTW89_UK][44] = 36, -+ [0][1][2][1][RTW89_FCC][46] = 78, -+ [0][1][2][1][RTW89_ETSI][46] = 4, -+ [0][1][2][1][RTW89_MKK][46] = 127, -+ [0][1][2][1][RTW89_IC][46] = 78, -+ [0][1][2][1][RTW89_KCC][46] = 62, -+ [0][1][2][1][RTW89_ACMA][46] = 76, -+ [0][1][2][1][RTW89_CHILE][46] = 36, -+ [0][1][2][1][RTW89_UKRAINE][46] = 4, -+ [0][1][2][1][RTW89_MEXICO][46] = 78, -+ [0][1][2][1][RTW89_CN][46] = 76, -+ [0][1][2][1][RTW89_QATAR][46] = 4, -+ [0][1][2][1][RTW89_UK][46] = 36, -+ [0][1][2][1][RTW89_FCC][48] = 58, -+ [0][1][2][1][RTW89_ETSI][48] = 127, -+ [0][1][2][1][RTW89_MKK][48] = 127, -+ [0][1][2][1][RTW89_IC][48] = 127, -+ [0][1][2][1][RTW89_KCC][48] = 127, -+ [0][1][2][1][RTW89_ACMA][48] = 127, -+ [0][1][2][1][RTW89_CHILE][48] = 127, -+ [0][1][2][1][RTW89_UKRAINE][48] = 127, -+ [0][1][2][1][RTW89_MEXICO][48] = 127, -+ [0][1][2][1][RTW89_CN][48] = 127, -+ [0][1][2][1][RTW89_QATAR][48] = 127, -+ [0][1][2][1][RTW89_UK][48] = 127, -+ [0][1][2][1][RTW89_FCC][50] = 58, -+ [0][1][2][1][RTW89_ETSI][50] = 127, -+ [0][1][2][1][RTW89_MKK][50] = 127, -+ [0][1][2][1][RTW89_IC][50] = 127, -+ [0][1][2][1][RTW89_KCC][50] = 127, -+ [0][1][2][1][RTW89_ACMA][50] = 127, -+ [0][1][2][1][RTW89_CHILE][50] = 127, -+ [0][1][2][1][RTW89_UKRAINE][50] = 127, -+ [0][1][2][1][RTW89_MEXICO][50] = 127, -+ [0][1][2][1][RTW89_CN][50] = 127, -+ [0][1][2][1][RTW89_QATAR][50] = 127, -+ [0][1][2][1][RTW89_UK][50] = 127, -+ [0][1][2][1][RTW89_FCC][52] = 58, -+ [0][1][2][1][RTW89_ETSI][52] = 127, -+ [0][1][2][1][RTW89_MKK][52] = 127, -+ [0][1][2][1][RTW89_IC][52] = 127, -+ [0][1][2][1][RTW89_KCC][52] = 127, -+ [0][1][2][1][RTW89_ACMA][52] = 127, -+ [0][1][2][1][RTW89_CHILE][52] = 127, -+ [0][1][2][1][RTW89_UKRAINE][52] = 127, -+ [0][1][2][1][RTW89_MEXICO][52] = 127, -+ [0][1][2][1][RTW89_CN][52] = 127, -+ [0][1][2][1][RTW89_QATAR][52] = 127, -+ [0][1][2][1][RTW89_UK][52] = 127, -+ [1][0][2][0][RTW89_FCC][1] = 66, -+ [1][0][2][0][RTW89_ETSI][1] = 64, -+ [1][0][2][0][RTW89_MKK][1] = 62, -+ [1][0][2][0][RTW89_IC][1] = 64, -+ [1][0][2][0][RTW89_KCC][1] = 70, -+ [1][0][2][0][RTW89_ACMA][1] = 64, -+ [1][0][2][0][RTW89_CHILE][1] = 42, -+ [1][0][2][0][RTW89_UKRAINE][1] = 52, -+ [1][0][2][0][RTW89_MEXICO][1] = 62, -+ [1][0][2][0][RTW89_CN][1] = 62, -+ [1][0][2][0][RTW89_QATAR][1] = 64, -+ [1][0][2][0][RTW89_UK][1] = 64, -+ [1][0][2][0][RTW89_FCC][5] = 78, -+ [1][0][2][0][RTW89_ETSI][5] = 64, -+ [1][0][2][0][RTW89_MKK][5] = 62, -+ [1][0][2][0][RTW89_IC][5] = 64, -+ [1][0][2][0][RTW89_KCC][5] = 66, -+ [1][0][2][0][RTW89_ACMA][5] = 64, -+ [1][0][2][0][RTW89_CHILE][5] = 42, -+ [1][0][2][0][RTW89_UKRAINE][5] = 52, -+ [1][0][2][0][RTW89_MEXICO][5] = 62, -+ [1][0][2][0][RTW89_CN][5] = 62, -+ [1][0][2][0][RTW89_QATAR][5] = 64, -+ [1][0][2][0][RTW89_UK][5] = 64, -+ [1][0][2][0][RTW89_FCC][9] = 78, -+ [1][0][2][0][RTW89_ETSI][9] = 64, -+ [1][0][2][0][RTW89_MKK][9] = 62, -+ [1][0][2][0][RTW89_IC][9] = 64, -+ [1][0][2][0][RTW89_KCC][9] = 74, -+ [1][0][2][0][RTW89_ACMA][9] = 64, -+ [1][0][2][0][RTW89_CHILE][9] = 66, -+ [1][0][2][0][RTW89_UKRAINE][9] = 52, -+ [1][0][2][0][RTW89_MEXICO][9] = 78, -+ [1][0][2][0][RTW89_CN][9] = 62, -+ [1][0][2][0][RTW89_QATAR][9] = 64, -+ [1][0][2][0][RTW89_UK][9] = 64, -+ [1][0][2][0][RTW89_FCC][13] = 66, -+ [1][0][2][0][RTW89_ETSI][13] = 64, -+ [1][0][2][0][RTW89_MKK][13] = 62, -+ [1][0][2][0][RTW89_IC][13] = 64, -+ [1][0][2][0][RTW89_KCC][13] = 68, -+ [1][0][2][0][RTW89_ACMA][13] = 64, -+ [1][0][2][0][RTW89_CHILE][13] = 66, -+ [1][0][2][0][RTW89_UKRAINE][13] = 52, -+ [1][0][2][0][RTW89_MEXICO][13] = 66, -+ [1][0][2][0][RTW89_CN][13] = 62, -+ [1][0][2][0][RTW89_QATAR][13] = 64, -+ [1][0][2][0][RTW89_UK][13] = 64, -+ [1][0][2][0][RTW89_FCC][16] = 64, -+ [1][0][2][0][RTW89_ETSI][16] = 64, -+ [1][0][2][0][RTW89_MKK][16] = 74, -+ [1][0][2][0][RTW89_IC][16] = 64, -+ [1][0][2][0][RTW89_KCC][16] = 70, -+ [1][0][2][0][RTW89_ACMA][16] = 64, -+ [1][0][2][0][RTW89_CHILE][16] = 64, -+ [1][0][2][0][RTW89_UKRAINE][16] = 52, -+ [1][0][2][0][RTW89_MEXICO][16] = 64, -+ [1][0][2][0][RTW89_CN][16] = 127, -+ [1][0][2][0][RTW89_QATAR][16] = 64, -+ [1][0][2][0][RTW89_UK][16] = 64, -+ [1][0][2][0][RTW89_FCC][20] = 78, -+ [1][0][2][0][RTW89_ETSI][20] = 64, -+ [1][0][2][0][RTW89_MKK][20] = 74, -+ [1][0][2][0][RTW89_IC][20] = 78, -+ [1][0][2][0][RTW89_KCC][20] = 70, -+ [1][0][2][0][RTW89_ACMA][20] = 64, -+ [1][0][2][0][RTW89_CHILE][20] = 62, -+ [1][0][2][0][RTW89_UKRAINE][20] = 52, -+ [1][0][2][0][RTW89_MEXICO][20] = 78, -+ [1][0][2][0][RTW89_CN][20] = 127, -+ [1][0][2][0][RTW89_QATAR][20] = 64, -+ [1][0][2][0][RTW89_UK][20] = 64, -+ [1][0][2][0][RTW89_FCC][24] = 78, -+ [1][0][2][0][RTW89_ETSI][24] = 64, -+ [1][0][2][0][RTW89_MKK][24] = 74, -+ [1][0][2][0][RTW89_IC][24] = 127, -+ [1][0][2][0][RTW89_KCC][24] = 70, -+ [1][0][2][0][RTW89_ACMA][24] = 127, -+ [1][0][2][0][RTW89_CHILE][24] = 62, -+ [1][0][2][0][RTW89_UKRAINE][24] = 52, -+ [1][0][2][0][RTW89_MEXICO][24] = 78, -+ [1][0][2][0][RTW89_CN][24] = 127, -+ [1][0][2][0][RTW89_QATAR][24] = 64, -+ [1][0][2][0][RTW89_UK][24] = 64, -+ [1][0][2][0][RTW89_FCC][28] = 78, -+ [1][0][2][0][RTW89_ETSI][28] = 64, -+ [1][0][2][0][RTW89_MKK][28] = 74, -+ [1][0][2][0][RTW89_IC][28] = 127, -+ [1][0][2][0][RTW89_KCC][28] = 74, -+ [1][0][2][0][RTW89_ACMA][28] = 127, -+ [1][0][2][0][RTW89_CHILE][28] = 64, -+ [1][0][2][0][RTW89_UKRAINE][28] = 52, -+ [1][0][2][0][RTW89_MEXICO][28] = 78, -+ [1][0][2][0][RTW89_CN][28] = 127, -+ [1][0][2][0][RTW89_QATAR][28] = 64, -+ [1][0][2][0][RTW89_UK][28] = 64, -+ [1][0][2][0][RTW89_FCC][32] = 76, -+ [1][0][2][0][RTW89_ETSI][32] = 64, -+ [1][0][2][0][RTW89_MKK][32] = 74, -+ [1][0][2][0][RTW89_IC][32] = 76, -+ [1][0][2][0][RTW89_KCC][32] = 74, -+ [1][0][2][0][RTW89_ACMA][32] = 64, -+ [1][0][2][0][RTW89_CHILE][32] = 64, -+ [1][0][2][0][RTW89_UKRAINE][32] = 52, -+ [1][0][2][0][RTW89_MEXICO][32] = 76, -+ [1][0][2][0][RTW89_CN][32] = 127, -+ [1][0][2][0][RTW89_QATAR][32] = 64, -+ [1][0][2][0][RTW89_UK][32] = 64, -+ [1][0][2][0][RTW89_FCC][36] = 78, -+ [1][0][2][0][RTW89_ETSI][36] = 127, -+ [1][0][2][0][RTW89_MKK][36] = 74, -+ [1][0][2][0][RTW89_IC][36] = 78, -+ [1][0][2][0][RTW89_KCC][36] = 74, -+ [1][0][2][0][RTW89_ACMA][36] = 74, -+ [1][0][2][0][RTW89_CHILE][36] = 64, -+ [1][0][2][0][RTW89_UKRAINE][36] = 127, -+ [1][0][2][0][RTW89_MEXICO][36] = 78, -+ [1][0][2][0][RTW89_CN][36] = 127, -+ [1][0][2][0][RTW89_QATAR][36] = 127, -+ [1][0][2][0][RTW89_UK][36] = 74, -+ [1][0][2][0][RTW89_FCC][39] = 78, -+ [1][0][2][0][RTW89_ETSI][39] = 28, -+ [1][0][2][0][RTW89_MKK][39] = 127, -+ [1][0][2][0][RTW89_IC][39] = 78, -+ [1][0][2][0][RTW89_KCC][39] = 74, -+ [1][0][2][0][RTW89_ACMA][39] = 74, -+ [1][0][2][0][RTW89_CHILE][39] = 64, -+ [1][0][2][0][RTW89_UKRAINE][39] = 28, -+ [1][0][2][0][RTW89_MEXICO][39] = 78, -+ [1][0][2][0][RTW89_CN][39] = 70, -+ [1][0][2][0][RTW89_QATAR][39] = 28, -+ [1][0][2][0][RTW89_UK][39] = 64, -+ [1][0][2][0][RTW89_FCC][43] = 78, -+ [1][0][2][0][RTW89_ETSI][43] = 28, -+ [1][0][2][0][RTW89_MKK][43] = 127, -+ [1][0][2][0][RTW89_IC][43] = 78, -+ [1][0][2][0][RTW89_KCC][43] = 74, -+ [1][0][2][0][RTW89_ACMA][43] = 74, -+ [1][0][2][0][RTW89_CHILE][43] = 64, -+ [1][0][2][0][RTW89_UKRAINE][43] = 28, -+ [1][0][2][0][RTW89_MEXICO][43] = 78, -+ [1][0][2][0][RTW89_CN][43] = 74, -+ [1][0][2][0][RTW89_QATAR][43] = 28, -+ [1][0][2][0][RTW89_UK][43] = 62, -+ [1][0][2][0][RTW89_FCC][47] = 78, -+ [1][0][2][0][RTW89_ETSI][47] = 127, -+ [1][0][2][0][RTW89_MKK][47] = 127, -+ [1][0][2][0][RTW89_IC][47] = 127, -+ [1][0][2][0][RTW89_KCC][47] = 127, -+ [1][0][2][0][RTW89_ACMA][47] = 127, -+ [1][0][2][0][RTW89_CHILE][47] = 127, -+ [1][0][2][0][RTW89_UKRAINE][47] = 127, -+ [1][0][2][0][RTW89_MEXICO][47] = 127, -+ [1][0][2][0][RTW89_CN][47] = 127, -+ [1][0][2][0][RTW89_QATAR][47] = 127, -+ [1][0][2][0][RTW89_UK][47] = 127, -+ [1][0][2][0][RTW89_FCC][51] = 70, -+ [1][0][2][0][RTW89_ETSI][51] = 127, -+ [1][0][2][0][RTW89_MKK][51] = 127, -+ [1][0][2][0][RTW89_IC][51] = 127, -+ [1][0][2][0][RTW89_KCC][51] = 127, -+ [1][0][2][0][RTW89_ACMA][51] = 127, -+ [1][0][2][0][RTW89_CHILE][51] = 127, -+ [1][0][2][0][RTW89_UKRAINE][51] = 127, -+ [1][0][2][0][RTW89_MEXICO][51] = 127, -+ [1][0][2][0][RTW89_CN][51] = 127, -+ [1][0][2][0][RTW89_QATAR][51] = 127, -+ [1][0][2][0][RTW89_UK][51] = 127, -+ [1][1][2][0][RTW89_FCC][1] = 62, -+ [1][1][2][0][RTW89_ETSI][1] = 52, -+ [1][1][2][0][RTW89_MKK][1] = 50, -+ [1][1][2][0][RTW89_IC][1] = 52, -+ [1][1][2][0][RTW89_KCC][1] = 58, -+ [1][1][2][0][RTW89_ACMA][1] = 52, -+ [1][1][2][0][RTW89_CHILE][1] = 30, -+ [1][1][2][0][RTW89_UKRAINE][1] = 40, -+ [1][1][2][0][RTW89_MEXICO][1] = 50, -+ [1][1][2][0][RTW89_CN][1] = 50, -+ [1][1][2][0][RTW89_QATAR][1] = 52, -+ [1][1][2][0][RTW89_UK][1] = 52, -+ [1][1][2][0][RTW89_FCC][5] = 76, -+ [1][1][2][0][RTW89_ETSI][5] = 52, -+ [1][1][2][0][RTW89_MKK][5] = 50, -+ [1][1][2][0][RTW89_IC][5] = 52, -+ [1][1][2][0][RTW89_KCC][5] = 48, -+ [1][1][2][0][RTW89_ACMA][5] = 52, -+ [1][1][2][0][RTW89_CHILE][5] = 30, -+ [1][1][2][0][RTW89_UKRAINE][5] = 40, -+ [1][1][2][0][RTW89_MEXICO][5] = 50, -+ [1][1][2][0][RTW89_CN][5] = 50, -+ [1][1][2][0][RTW89_QATAR][5] = 52, -+ [1][1][2][0][RTW89_UK][5] = 52, -+ [1][1][2][0][RTW89_FCC][9] = 76, -+ [1][1][2][0][RTW89_ETSI][9] = 52, -+ [1][1][2][0][RTW89_MKK][9] = 50, -+ [1][1][2][0][RTW89_IC][9] = 52, -+ [1][1][2][0][RTW89_KCC][9] = 60, -+ [1][1][2][0][RTW89_ACMA][9] = 52, -+ [1][1][2][0][RTW89_CHILE][9] = 50, -+ [1][1][2][0][RTW89_UKRAINE][9] = 40, -+ [1][1][2][0][RTW89_MEXICO][9] = 76, -+ [1][1][2][0][RTW89_CN][9] = 50, -+ [1][1][2][0][RTW89_QATAR][9] = 52, -+ [1][1][2][0][RTW89_UK][9] = 52, -+ [1][1][2][0][RTW89_FCC][13] = 62, -+ [1][1][2][0][RTW89_ETSI][13] = 52, -+ [1][1][2][0][RTW89_MKK][13] = 50, -+ [1][1][2][0][RTW89_IC][13] = 52, -+ [1][1][2][0][RTW89_KCC][13] = 58, -+ [1][1][2][0][RTW89_ACMA][13] = 52, -+ [1][1][2][0][RTW89_CHILE][13] = 48, -+ [1][1][2][0][RTW89_UKRAINE][13] = 40, -+ [1][1][2][0][RTW89_MEXICO][13] = 62, -+ [1][1][2][0][RTW89_CN][13] = 50, -+ [1][1][2][0][RTW89_QATAR][13] = 52, -+ [1][1][2][0][RTW89_UK][13] = 52, -+ [1][1][2][0][RTW89_FCC][16] = 56, -+ [1][1][2][0][RTW89_ETSI][16] = 52, -+ [1][1][2][0][RTW89_MKK][16] = 70, -+ [1][1][2][0][RTW89_IC][16] = 56, -+ [1][1][2][0][RTW89_KCC][16] = 58, -+ [1][1][2][0][RTW89_ACMA][16] = 52, -+ [1][1][2][0][RTW89_CHILE][16] = 48, -+ [1][1][2][0][RTW89_UKRAINE][16] = 40, -+ [1][1][2][0][RTW89_MEXICO][16] = 56, -+ [1][1][2][0][RTW89_CN][16] = 127, -+ [1][1][2][0][RTW89_QATAR][16] = 52, -+ [1][1][2][0][RTW89_UK][16] = 52, -+ [1][1][2][0][RTW89_FCC][20] = 76, -+ [1][1][2][0][RTW89_ETSI][20] = 52, -+ [1][1][2][0][RTW89_MKK][20] = 70, -+ [1][1][2][0][RTW89_IC][20] = 76, -+ [1][1][2][0][RTW89_KCC][20] = 58, -+ [1][1][2][0][RTW89_ACMA][20] = 52, -+ [1][1][2][0][RTW89_CHILE][20] = 50, -+ [1][1][2][0][RTW89_UKRAINE][20] = 40, -+ [1][1][2][0][RTW89_MEXICO][20] = 76, -+ [1][1][2][0][RTW89_CN][20] = 127, -+ [1][1][2][0][RTW89_QATAR][20] = 52, -+ [1][1][2][0][RTW89_UK][20] = 52, -+ [1][1][2][0][RTW89_FCC][24] = 76, -+ [1][1][2][0][RTW89_ETSI][24] = 52, -+ [1][1][2][0][RTW89_MKK][24] = 70, -+ [1][1][2][0][RTW89_IC][24] = 127, -+ [1][1][2][0][RTW89_KCC][24] = 58, -+ [1][1][2][0][RTW89_ACMA][24] = 127, -+ [1][1][2][0][RTW89_CHILE][24] = 50, -+ [1][1][2][0][RTW89_UKRAINE][24] = 40, -+ [1][1][2][0][RTW89_MEXICO][24] = 76, -+ [1][1][2][0][RTW89_CN][24] = 127, -+ [1][1][2][0][RTW89_QATAR][24] = 52, -+ [1][1][2][0][RTW89_UK][24] = 52, -+ [1][1][2][0][RTW89_FCC][28] = 76, -+ [1][1][2][0][RTW89_ETSI][28] = 52, -+ [1][1][2][0][RTW89_MKK][28] = 70, -+ [1][1][2][0][RTW89_IC][28] = 127, -+ [1][1][2][0][RTW89_KCC][28] = 60, -+ [1][1][2][0][RTW89_ACMA][28] = 127, -+ [1][1][2][0][RTW89_CHILE][28] = 48, -+ [1][1][2][0][RTW89_UKRAINE][28] = 40, -+ [1][1][2][0][RTW89_MEXICO][28] = 76, -+ [1][1][2][0][RTW89_CN][28] = 127, -+ [1][1][2][0][RTW89_QATAR][28] = 52, -+ [1][1][2][0][RTW89_UK][28] = 52, -+ [1][1][2][0][RTW89_FCC][32] = 68, -+ [1][1][2][0][RTW89_ETSI][32] = 52, -+ [1][1][2][0][RTW89_MKK][32] = 70, -+ [1][1][2][0][RTW89_IC][32] = 68, -+ [1][1][2][0][RTW89_KCC][32] = 60, -+ [1][1][2][0][RTW89_ACMA][32] = 52, -+ [1][1][2][0][RTW89_CHILE][32] = 48, -+ [1][1][2][0][RTW89_UKRAINE][32] = 40, -+ [1][1][2][0][RTW89_MEXICO][32] = 68, -+ [1][1][2][0][RTW89_CN][32] = 127, -+ [1][1][2][0][RTW89_QATAR][32] = 52, -+ [1][1][2][0][RTW89_UK][32] = 52, -+ [1][1][2][0][RTW89_FCC][36] = 76, -+ [1][1][2][0][RTW89_ETSI][36] = 127, -+ [1][1][2][0][RTW89_MKK][36] = 70, -+ [1][1][2][0][RTW89_IC][36] = 76, -+ [1][1][2][0][RTW89_KCC][36] = 60, -+ [1][1][2][0][RTW89_ACMA][36] = 74, -+ [1][1][2][0][RTW89_CHILE][36] = 50, -+ [1][1][2][0][RTW89_UKRAINE][36] = 127, -+ [1][1][2][0][RTW89_MEXICO][36] = 76, -+ [1][1][2][0][RTW89_CN][36] = 127, -+ [1][1][2][0][RTW89_QATAR][36] = 127, -+ [1][1][2][0][RTW89_UK][36] = 74, -+ [1][1][2][0][RTW89_FCC][39] = 78, -+ [1][1][2][0][RTW89_ETSI][39] = 16, -+ [1][1][2][0][RTW89_MKK][39] = 127, -+ [1][1][2][0][RTW89_IC][39] = 78, -+ [1][1][2][0][RTW89_KCC][39] = 58, -+ [1][1][2][0][RTW89_ACMA][39] = 72, -+ [1][1][2][0][RTW89_CHILE][39] = 52, -+ [1][1][2][0][RTW89_UKRAINE][39] = 16, -+ [1][1][2][0][RTW89_MEXICO][39] = 78, -+ [1][1][2][0][RTW89_CN][39] = 70, -+ [1][1][2][0][RTW89_QATAR][39] = 16, -+ [1][1][2][0][RTW89_UK][39] = 52, -+ [1][1][2][0][RTW89_FCC][43] = 78, -+ [1][1][2][0][RTW89_ETSI][43] = 16, -+ [1][1][2][0][RTW89_MKK][43] = 127, -+ [1][1][2][0][RTW89_IC][43] = 78, -+ [1][1][2][0][RTW89_KCC][43] = 58, -+ [1][1][2][0][RTW89_ACMA][43] = 74, -+ [1][1][2][0][RTW89_CHILE][43] = 52, -+ [1][1][2][0][RTW89_UKRAINE][43] = 16, -+ [1][1][2][0][RTW89_MEXICO][43] = 78, -+ [1][1][2][0][RTW89_CN][43] = 74, -+ [1][1][2][0][RTW89_QATAR][43] = 16, -+ [1][1][2][0][RTW89_UK][43] = 52, -+ [1][1][2][0][RTW89_FCC][47] = 68, -+ [1][1][2][0][RTW89_ETSI][47] = 127, -+ [1][1][2][0][RTW89_MKK][47] = 127, -+ [1][1][2][0][RTW89_IC][47] = 127, -+ [1][1][2][0][RTW89_KCC][47] = 127, -+ [1][1][2][0][RTW89_ACMA][47] = 127, -+ [1][1][2][0][RTW89_CHILE][47] = 127, -+ [1][1][2][0][RTW89_UKRAINE][47] = 127, -+ [1][1][2][0][RTW89_MEXICO][47] = 127, -+ [1][1][2][0][RTW89_CN][47] = 127, -+ [1][1][2][0][RTW89_QATAR][47] = 127, -+ [1][1][2][0][RTW89_UK][47] = 127, -+ [1][1][2][0][RTW89_FCC][51] = 66, -+ [1][1][2][0][RTW89_ETSI][51] = 127, -+ [1][1][2][0][RTW89_MKK][51] = 127, -+ [1][1][2][0][RTW89_IC][51] = 127, -+ [1][1][2][0][RTW89_KCC][51] = 127, -+ [1][1][2][0][RTW89_ACMA][51] = 127, -+ [1][1][2][0][RTW89_CHILE][51] = 127, -+ [1][1][2][0][RTW89_UKRAINE][51] = 127, -+ [1][1][2][0][RTW89_MEXICO][51] = 127, -+ [1][1][2][0][RTW89_CN][51] = 127, -+ [1][1][2][0][RTW89_QATAR][51] = 127, -+ [1][1][2][0][RTW89_UK][51] = 127, -+ [1][1][2][1][RTW89_FCC][1] = 62, -+ [1][1][2][1][RTW89_ETSI][1] = 40, -+ [1][1][2][1][RTW89_MKK][1] = 50, -+ [1][1][2][1][RTW89_IC][1] = 40, -+ [1][1][2][1][RTW89_KCC][1] = 58, -+ [1][1][2][1][RTW89_ACMA][1] = 40, -+ [1][1][2][1][RTW89_CHILE][1] = 16, -+ [1][1][2][1][RTW89_UKRAINE][1] = 28, -+ [1][1][2][1][RTW89_MEXICO][1] = 50, -+ [1][1][2][1][RTW89_CN][1] = 38, -+ [1][1][2][1][RTW89_QATAR][1] = 40, -+ [1][1][2][1][RTW89_UK][1] = 40, -+ [1][1][2][1][RTW89_FCC][5] = 68, -+ [1][1][2][1][RTW89_ETSI][5] = 40, -+ [1][1][2][1][RTW89_MKK][5] = 50, -+ [1][1][2][1][RTW89_IC][5] = 40, -+ [1][1][2][1][RTW89_KCC][5] = 48, -+ [1][1][2][1][RTW89_ACMA][5] = 40, -+ [1][1][2][1][RTW89_CHILE][5] = 16, -+ [1][1][2][1][RTW89_UKRAINE][5] = 28, -+ [1][1][2][1][RTW89_MEXICO][5] = 50, -+ [1][1][2][1][RTW89_CN][5] = 38, -+ [1][1][2][1][RTW89_QATAR][5] = 40, -+ [1][1][2][1][RTW89_UK][5] = 40, -+ [1][1][2][1][RTW89_FCC][9] = 68, -+ [1][1][2][1][RTW89_ETSI][9] = 40, -+ [1][1][2][1][RTW89_MKK][9] = 50, -+ [1][1][2][1][RTW89_IC][9] = 40, -+ [1][1][2][1][RTW89_KCC][9] = 60, -+ [1][1][2][1][RTW89_ACMA][9] = 40, -+ [1][1][2][1][RTW89_CHILE][9] = 36, -+ [1][1][2][1][RTW89_UKRAINE][9] = 28, -+ [1][1][2][1][RTW89_MEXICO][9] = 68, -+ [1][1][2][1][RTW89_CN][9] = 38, -+ [1][1][2][1][RTW89_QATAR][9] = 40, -+ [1][1][2][1][RTW89_UK][9] = 40, -+ [1][1][2][1][RTW89_FCC][13] = 62, -+ [1][1][2][1][RTW89_ETSI][13] = 40, -+ [1][1][2][1][RTW89_MKK][13] = 50, -+ [1][1][2][1][RTW89_IC][13] = 40, -+ [1][1][2][1][RTW89_KCC][13] = 58, -+ [1][1][2][1][RTW89_ACMA][13] = 40, -+ [1][1][2][1][RTW89_CHILE][13] = 36, -+ [1][1][2][1][RTW89_UKRAINE][13] = 28, -+ [1][1][2][1][RTW89_MEXICO][13] = 62, -+ [1][1][2][1][RTW89_CN][13] = 38, -+ [1][1][2][1][RTW89_QATAR][13] = 40, -+ [1][1][2][1][RTW89_UK][13] = 40, -+ [1][1][2][1][RTW89_FCC][16] = 56, -+ [1][1][2][1][RTW89_ETSI][16] = 40, -+ [1][1][2][1][RTW89_MKK][16] = 70, -+ [1][1][2][1][RTW89_IC][16] = 56, -+ [1][1][2][1][RTW89_KCC][16] = 58, -+ [1][1][2][1][RTW89_ACMA][16] = 40, -+ [1][1][2][1][RTW89_CHILE][16] = 36, -+ [1][1][2][1][RTW89_UKRAINE][16] = 28, -+ [1][1][2][1][RTW89_MEXICO][16] = 56, -+ [1][1][2][1][RTW89_CN][16] = 127, -+ [1][1][2][1][RTW89_QATAR][16] = 40, -+ [1][1][2][1][RTW89_UK][16] = 40, -+ [1][1][2][1][RTW89_FCC][20] = 68, -+ [1][1][2][1][RTW89_ETSI][20] = 40, -+ [1][1][2][1][RTW89_MKK][20] = 70, -+ [1][1][2][1][RTW89_IC][20] = 68, -+ [1][1][2][1][RTW89_KCC][20] = 58, -+ [1][1][2][1][RTW89_ACMA][20] = 40, -+ [1][1][2][1][RTW89_CHILE][20] = 36, -+ [1][1][2][1][RTW89_UKRAINE][20] = 28, -+ [1][1][2][1][RTW89_MEXICO][20] = 68, -+ [1][1][2][1][RTW89_CN][20] = 127, -+ [1][1][2][1][RTW89_QATAR][20] = 40, -+ [1][1][2][1][RTW89_UK][20] = 40, -+ [1][1][2][1][RTW89_FCC][24] = 68, -+ [1][1][2][1][RTW89_ETSI][24] = 40, -+ [1][1][2][1][RTW89_MKK][24] = 70, -+ [1][1][2][1][RTW89_IC][24] = 127, -+ [1][1][2][1][RTW89_KCC][24] = 58, -+ [1][1][2][1][RTW89_ACMA][24] = 127, -+ [1][1][2][1][RTW89_CHILE][24] = 36, -+ [1][1][2][1][RTW89_UKRAINE][24] = 28, -+ [1][1][2][1][RTW89_MEXICO][24] = 68, -+ [1][1][2][1][RTW89_CN][24] = 127, -+ [1][1][2][1][RTW89_QATAR][24] = 40, -+ [1][1][2][1][RTW89_UK][24] = 40, -+ [1][1][2][1][RTW89_FCC][28] = 68, -+ [1][1][2][1][RTW89_ETSI][28] = 40, -+ [1][1][2][1][RTW89_MKK][28] = 70, -+ [1][1][2][1][RTW89_IC][28] = 127, -+ [1][1][2][1][RTW89_KCC][28] = 60, -+ [1][1][2][1][RTW89_ACMA][28] = 127, -+ [1][1][2][1][RTW89_CHILE][28] = 36, -+ [1][1][2][1][RTW89_UKRAINE][28] = 28, -+ [1][1][2][1][RTW89_MEXICO][28] = 68, -+ [1][1][2][1][RTW89_CN][28] = 127, -+ [1][1][2][1][RTW89_QATAR][28] = 40, -+ [1][1][2][1][RTW89_UK][28] = 40, -+ [1][1][2][1][RTW89_FCC][32] = 68, -+ [1][1][2][1][RTW89_ETSI][32] = 40, -+ [1][1][2][1][RTW89_MKK][32] = 70, -+ [1][1][2][1][RTW89_IC][32] = 68, -+ [1][1][2][1][RTW89_KCC][32] = 60, -+ [1][1][2][1][RTW89_ACMA][32] = 40, -+ [1][1][2][1][RTW89_CHILE][32] = 36, -+ [1][1][2][1][RTW89_UKRAINE][32] = 28, -+ [1][1][2][1][RTW89_MEXICO][32] = 68, -+ [1][1][2][1][RTW89_CN][32] = 127, -+ [1][1][2][1][RTW89_QATAR][32] = 40, -+ [1][1][2][1][RTW89_UK][32] = 40, -+ [1][1][2][1][RTW89_FCC][36] = 68, -+ [1][1][2][1][RTW89_ETSI][36] = 127, -+ [1][1][2][1][RTW89_MKK][36] = 70, -+ [1][1][2][1][RTW89_IC][36] = 68, -+ [1][1][2][1][RTW89_KCC][36] = 60, -+ [1][1][2][1][RTW89_ACMA][36] = 70, -+ [1][1][2][1][RTW89_CHILE][36] = 36, -+ [1][1][2][1][RTW89_UKRAINE][36] = 127, -+ [1][1][2][1][RTW89_MEXICO][36] = 68, -+ [1][1][2][1][RTW89_CN][36] = 127, -+ [1][1][2][1][RTW89_QATAR][36] = 127, -+ [1][1][2][1][RTW89_UK][36] = 62, -+ [1][1][2][1][RTW89_FCC][39] = 78, -+ [1][1][2][1][RTW89_ETSI][39] = 4, -+ [1][1][2][1][RTW89_MKK][39] = 127, -+ [1][1][2][1][RTW89_IC][39] = 78, -+ [1][1][2][1][RTW89_KCC][39] = 58, -+ [1][1][2][1][RTW89_ACMA][39] = 72, -+ [1][1][2][1][RTW89_CHILE][39] = 36, -+ [1][1][2][1][RTW89_UKRAINE][39] = 4, -+ [1][1][2][1][RTW89_MEXICO][39] = 78, -+ [1][1][2][1][RTW89_CN][39] = 70, -+ [1][1][2][1][RTW89_QATAR][39] = 4, -+ [1][1][2][1][RTW89_UK][39] = 40, -+ [1][1][2][1][RTW89_FCC][43] = 78, -+ [1][1][2][1][RTW89_ETSI][43] = 4, -+ [1][1][2][1][RTW89_MKK][43] = 127, -+ [1][1][2][1][RTW89_IC][43] = 78, -+ [1][1][2][1][RTW89_KCC][43] = 58, -+ [1][1][2][1][RTW89_ACMA][43] = 74, -+ [1][1][2][1][RTW89_CHILE][43] = 36, -+ [1][1][2][1][RTW89_UKRAINE][43] = 4, -+ [1][1][2][1][RTW89_MEXICO][43] = 78, -+ [1][1][2][1][RTW89_CN][43] = 74, -+ [1][1][2][1][RTW89_QATAR][43] = 4, -+ [1][1][2][1][RTW89_UK][43] = 40, -+ [1][1][2][1][RTW89_FCC][47] = 68, -+ [1][1][2][1][RTW89_ETSI][47] = 127, -+ [1][1][2][1][RTW89_MKK][47] = 127, -+ [1][1][2][1][RTW89_IC][47] = 127, -+ [1][1][2][1][RTW89_KCC][47] = 127, -+ [1][1][2][1][RTW89_ACMA][47] = 127, -+ [1][1][2][1][RTW89_CHILE][47] = 127, -+ [1][1][2][1][RTW89_UKRAINE][47] = 127, -+ [1][1][2][1][RTW89_MEXICO][47] = 127, -+ [1][1][2][1][RTW89_CN][47] = 127, -+ [1][1][2][1][RTW89_QATAR][47] = 127, -+ [1][1][2][1][RTW89_UK][47] = 127, -+ [1][1][2][1][RTW89_FCC][51] = 66, -+ [1][1][2][1][RTW89_ETSI][51] = 127, -+ [1][1][2][1][RTW89_MKK][51] = 127, -+ [1][1][2][1][RTW89_IC][51] = 127, -+ [1][1][2][1][RTW89_KCC][51] = 127, -+ [1][1][2][1][RTW89_ACMA][51] = 127, -+ [1][1][2][1][RTW89_CHILE][51] = 127, -+ [1][1][2][1][RTW89_UKRAINE][51] = 127, -+ [1][1][2][1][RTW89_MEXICO][51] = 127, -+ [1][1][2][1][RTW89_CN][51] = 127, -+ [1][1][2][1][RTW89_QATAR][51] = 127, -+ [1][1][2][1][RTW89_UK][51] = 127, -+ [2][0][2][0][RTW89_FCC][3] = 64, -+ [2][0][2][0][RTW89_ETSI][3] = 64, -+ [2][0][2][0][RTW89_MKK][3] = 64, -+ [2][0][2][0][RTW89_IC][3] = 62, -+ [2][0][2][0][RTW89_KCC][3] = 68, -+ [2][0][2][0][RTW89_ACMA][3] = 64, -+ [2][0][2][0][RTW89_CHILE][3] = 42, -+ [2][0][2][0][RTW89_UKRAINE][3] = 52, -+ [2][0][2][0][RTW89_MEXICO][3] = 62, -+ [2][0][2][0][RTW89_CN][3] = 62, -+ [2][0][2][0][RTW89_QATAR][3] = 64, -+ [2][0][2][0][RTW89_UK][3] = 64, -+ [2][0][2][0][RTW89_FCC][11] = 66, -+ [2][0][2][0][RTW89_ETSI][11] = 64, -+ [2][0][2][0][RTW89_MKK][11] = 64, -+ [2][0][2][0][RTW89_IC][11] = 64, -+ [2][0][2][0][RTW89_KCC][11] = 70, -+ [2][0][2][0][RTW89_ACMA][11] = 64, -+ [2][0][2][0][RTW89_CHILE][11] = 66, -+ [2][0][2][0][RTW89_UKRAINE][11] = 52, -+ [2][0][2][0][RTW89_MEXICO][11] = 66, -+ [2][0][2][0][RTW89_CN][11] = 62, -+ [2][0][2][0][RTW89_QATAR][11] = 64, -+ [2][0][2][0][RTW89_UK][11] = 64, -+ [2][0][2][0][RTW89_FCC][18] = 62, -+ [2][0][2][0][RTW89_ETSI][18] = 64, -+ [2][0][2][0][RTW89_MKK][18] = 70, -+ [2][0][2][0][RTW89_IC][18] = 62, -+ [2][0][2][0][RTW89_KCC][18] = 64, -+ [2][0][2][0][RTW89_ACMA][18] = 64, -+ [2][0][2][0][RTW89_CHILE][18] = 64, -+ [2][0][2][0][RTW89_UKRAINE][18] = 52, -+ [2][0][2][0][RTW89_MEXICO][18] = 62, -+ [2][0][2][0][RTW89_CN][18] = 127, -+ [2][0][2][0][RTW89_QATAR][18] = 64, -+ [2][0][2][0][RTW89_UK][18] = 64, -+ [2][0][2][0][RTW89_FCC][26] = 74, -+ [2][0][2][0][RTW89_ETSI][26] = 64, -+ [2][0][2][0][RTW89_MKK][26] = 70, -+ [2][0][2][0][RTW89_IC][26] = 127, -+ [2][0][2][0][RTW89_KCC][26] = 70, -+ [2][0][2][0][RTW89_ACMA][26] = 127, -+ [2][0][2][0][RTW89_CHILE][26] = 64, -+ [2][0][2][0][RTW89_UKRAINE][26] = 52, -+ [2][0][2][0][RTW89_MEXICO][26] = 74, -+ [2][0][2][0][RTW89_CN][26] = 127, -+ [2][0][2][0][RTW89_QATAR][26] = 64, -+ [2][0][2][0][RTW89_UK][26] = 64, -+ [2][0][2][0][RTW89_FCC][34] = 74, -+ [2][0][2][0][RTW89_ETSI][34] = 127, -+ [2][0][2][0][RTW89_MKK][34] = 70, -+ [2][0][2][0][RTW89_IC][34] = 74, -+ [2][0][2][0][RTW89_KCC][34] = 70, -+ [2][0][2][0][RTW89_ACMA][34] = 70, -+ [2][0][2][0][RTW89_CHILE][34] = 64, -+ [2][0][2][0][RTW89_UKRAINE][34] = 127, -+ [2][0][2][0][RTW89_MEXICO][34] = 74, -+ [2][0][2][0][RTW89_CN][34] = 127, -+ [2][0][2][0][RTW89_QATAR][34] = 127, -+ [2][0][2][0][RTW89_UK][34] = 70, -+ [2][0][2][0][RTW89_FCC][41] = 74, -+ [2][0][2][0][RTW89_ETSI][41] = 28, -+ [2][0][2][0][RTW89_MKK][41] = 127, -+ [2][0][2][0][RTW89_IC][41] = 74, -+ [2][0][2][0][RTW89_KCC][41] = 66, -+ [2][0][2][0][RTW89_ACMA][41] = 70, -+ [2][0][2][0][RTW89_CHILE][41] = 64, -+ [2][0][2][0][RTW89_UKRAINE][41] = 28, -+ [2][0][2][0][RTW89_MEXICO][41] = 74, -+ [2][0][2][0][RTW89_CN][41] = 70, -+ [2][0][2][0][RTW89_QATAR][41] = 28, -+ [2][0][2][0][RTW89_UK][41] = 64, -+ [2][0][2][0][RTW89_FCC][49] = 64, -+ [2][0][2][0][RTW89_ETSI][49] = 127, -+ [2][0][2][0][RTW89_MKK][49] = 127, -+ [2][0][2][0][RTW89_IC][49] = 127, -+ [2][0][2][0][RTW89_KCC][49] = 127, -+ [2][0][2][0][RTW89_ACMA][49] = 127, -+ [2][0][2][0][RTW89_CHILE][49] = 127, -+ [2][0][2][0][RTW89_UKRAINE][49] = 127, -+ [2][0][2][0][RTW89_MEXICO][49] = 127, -+ [2][0][2][0][RTW89_CN][49] = 127, -+ [2][0][2][0][RTW89_QATAR][49] = 127, -+ [2][0][2][0][RTW89_UK][49] = 127, -+ [2][1][2][0][RTW89_FCC][3] = 56, -+ [2][1][2][0][RTW89_ETSI][3] = 52, -+ [2][1][2][0][RTW89_MKK][3] = 52, -+ [2][1][2][0][RTW89_IC][3] = 52, -+ [2][1][2][0][RTW89_KCC][3] = 54, -+ [2][1][2][0][RTW89_ACMA][3] = 52, -+ [2][1][2][0][RTW89_CHILE][3] = 28, -+ [2][1][2][0][RTW89_UKRAINE][3] = 40, -+ [2][1][2][0][RTW89_MEXICO][3] = 50, -+ [2][1][2][0][RTW89_CN][3] = 50, -+ [2][1][2][0][RTW89_QATAR][3] = 52, -+ [2][1][2][0][RTW89_UK][3] = 52, -+ [2][1][2][0][RTW89_FCC][11] = 62, -+ [2][1][2][0][RTW89_ETSI][11] = 52, -+ [2][1][2][0][RTW89_MKK][11] = 52, -+ [2][1][2][0][RTW89_IC][11] = 52, -+ [2][1][2][0][RTW89_KCC][11] = 56, -+ [2][1][2][0][RTW89_ACMA][11] = 52, -+ [2][1][2][0][RTW89_CHILE][11] = 52, -+ [2][1][2][0][RTW89_UKRAINE][11] = 40, -+ [2][1][2][0][RTW89_MEXICO][11] = 62, -+ [2][1][2][0][RTW89_CN][11] = 50, -+ [2][1][2][0][RTW89_QATAR][11] = 52, -+ [2][1][2][0][RTW89_UK][11] = 52, -+ [2][1][2][0][RTW89_FCC][18] = 56, -+ [2][1][2][0][RTW89_ETSI][18] = 52, -+ [2][1][2][0][RTW89_MKK][18] = 70, -+ [2][1][2][0][RTW89_IC][18] = 56, -+ [2][1][2][0][RTW89_KCC][18] = 58, -+ [2][1][2][0][RTW89_ACMA][18] = 52, -+ [2][1][2][0][RTW89_CHILE][18] = 48, -+ [2][1][2][0][RTW89_UKRAINE][18] = 40, -+ [2][1][2][0][RTW89_MEXICO][18] = 56, -+ [2][1][2][0][RTW89_CN][18] = 127, -+ [2][1][2][0][RTW89_QATAR][18] = 52, -+ [2][1][2][0][RTW89_UK][18] = 52, -+ [2][1][2][0][RTW89_FCC][26] = 70, -+ [2][1][2][0][RTW89_ETSI][26] = 52, -+ [2][1][2][0][RTW89_MKK][26] = 70, -+ [2][1][2][0][RTW89_IC][26] = 127, -+ [2][1][2][0][RTW89_KCC][26] = 56, -+ [2][1][2][0][RTW89_ACMA][26] = 127, -+ [2][1][2][0][RTW89_CHILE][26] = 50, -+ [2][1][2][0][RTW89_UKRAINE][26] = 40, -+ [2][1][2][0][RTW89_MEXICO][26] = 70, -+ [2][1][2][0][RTW89_CN][26] = 127, -+ [2][1][2][0][RTW89_QATAR][26] = 52, -+ [2][1][2][0][RTW89_UK][26] = 52, -+ [2][1][2][0][RTW89_FCC][34] = 74, -+ [2][1][2][0][RTW89_ETSI][34] = 127, -+ [2][1][2][0][RTW89_MKK][34] = 70, -+ [2][1][2][0][RTW89_IC][34] = 74, -+ [2][1][2][0][RTW89_KCC][34] = 56, -+ [2][1][2][0][RTW89_ACMA][34] = 70, -+ [2][1][2][0][RTW89_CHILE][34] = 50, -+ [2][1][2][0][RTW89_UKRAINE][34] = 127, -+ [2][1][2][0][RTW89_MEXICO][34] = 74, -+ [2][1][2][0][RTW89_CN][34] = 127, -+ [2][1][2][0][RTW89_QATAR][34] = 127, -+ [2][1][2][0][RTW89_UK][34] = 68, -+ [2][1][2][0][RTW89_FCC][41] = 74, -+ [2][1][2][0][RTW89_ETSI][41] = 16, -+ [2][1][2][0][RTW89_MKK][41] = 127, -+ [2][1][2][0][RTW89_IC][41] = 74, -+ [2][1][2][0][RTW89_KCC][41] = 56, -+ [2][1][2][0][RTW89_ACMA][41] = 70, -+ [2][1][2][0][RTW89_CHILE][41] = 50, -+ [2][1][2][0][RTW89_UKRAINE][41] = 16, -+ [2][1][2][0][RTW89_MEXICO][41] = 74, -+ [2][1][2][0][RTW89_CN][41] = 70, -+ [2][1][2][0][RTW89_QATAR][41] = 16, -+ [2][1][2][0][RTW89_UK][41] = 52, -+ [2][1][2][0][RTW89_FCC][49] = 58, -+ [2][1][2][0][RTW89_ETSI][49] = 127, -+ [2][1][2][0][RTW89_MKK][49] = 127, -+ [2][1][2][0][RTW89_IC][49] = 127, -+ [2][1][2][0][RTW89_KCC][49] = 127, -+ [2][1][2][0][RTW89_ACMA][49] = 127, -+ [2][1][2][0][RTW89_CHILE][49] = 127, -+ [2][1][2][0][RTW89_UKRAINE][49] = 127, -+ [2][1][2][0][RTW89_MEXICO][49] = 127, -+ [2][1][2][0][RTW89_CN][49] = 127, -+ [2][1][2][0][RTW89_QATAR][49] = 127, -+ [2][1][2][0][RTW89_UK][49] = 127, -+ [2][1][2][1][RTW89_FCC][3] = 56, -+ [2][1][2][1][RTW89_ETSI][3] = 40, -+ [2][1][2][1][RTW89_MKK][3] = 52, -+ [2][1][2][1][RTW89_IC][3] = 40, -+ [2][1][2][1][RTW89_KCC][3] = 54, -+ [2][1][2][1][RTW89_ACMA][3] = 40, -+ [2][1][2][1][RTW89_CHILE][3] = 16, -+ [2][1][2][1][RTW89_UKRAINE][3] = 28, -+ [2][1][2][1][RTW89_MEXICO][3] = 50, -+ [2][1][2][1][RTW89_CN][3] = 38, -+ [2][1][2][1][RTW89_QATAR][3] = 40, -+ [2][1][2][1][RTW89_UK][3] = 40, -+ [2][1][2][1][RTW89_FCC][11] = 62, -+ [2][1][2][1][RTW89_ETSI][11] = 40, -+ [2][1][2][1][RTW89_MKK][11] = 52, -+ [2][1][2][1][RTW89_IC][11] = 40, -+ [2][1][2][1][RTW89_KCC][11] = 56, -+ [2][1][2][1][RTW89_ACMA][11] = 40, -+ [2][1][2][1][RTW89_CHILE][11] = 34, -+ [2][1][2][1][RTW89_UKRAINE][11] = 28, -+ [2][1][2][1][RTW89_MEXICO][11] = 62, -+ [2][1][2][1][RTW89_CN][11] = 38, -+ [2][1][2][1][RTW89_QATAR][11] = 40, -+ [2][1][2][1][RTW89_UK][11] = 40, -+ [2][1][2][1][RTW89_FCC][18] = 56, -+ [2][1][2][1][RTW89_ETSI][18] = 40, -+ [2][1][2][1][RTW89_MKK][18] = 70, -+ [2][1][2][1][RTW89_IC][18] = 56, -+ [2][1][2][1][RTW89_KCC][18] = 58, -+ [2][1][2][1][RTW89_ACMA][18] = 40, -+ [2][1][2][1][RTW89_CHILE][18] = 34, -+ [2][1][2][1][RTW89_UKRAINE][18] = 28, -+ [2][1][2][1][RTW89_MEXICO][18] = 56, -+ [2][1][2][1][RTW89_CN][18] = 127, -+ [2][1][2][1][RTW89_QATAR][18] = 40, -+ [2][1][2][1][RTW89_UK][18] = 40, -+ [2][1][2][1][RTW89_FCC][26] = 68, -+ [2][1][2][1][RTW89_ETSI][26] = 40, -+ [2][1][2][1][RTW89_MKK][26] = 70, -+ [2][1][2][1][RTW89_IC][26] = 127, -+ [2][1][2][1][RTW89_KCC][26] = 56, -+ [2][1][2][1][RTW89_ACMA][26] = 127, -+ [2][1][2][1][RTW89_CHILE][26] = 34, -+ [2][1][2][1][RTW89_UKRAINE][26] = 28, -+ [2][1][2][1][RTW89_MEXICO][26] = 68, -+ [2][1][2][1][RTW89_CN][26] = 127, -+ [2][1][2][1][RTW89_QATAR][26] = 40, -+ [2][1][2][1][RTW89_UK][26] = 40, -+ [2][1][2][1][RTW89_FCC][34] = 68, -+ [2][1][2][1][RTW89_ETSI][34] = 127, -+ [2][1][2][1][RTW89_MKK][34] = 70, -+ [2][1][2][1][RTW89_IC][34] = 68, -+ [2][1][2][1][RTW89_KCC][34] = 56, -+ [2][1][2][1][RTW89_ACMA][34] = 70, -+ [2][1][2][1][RTW89_CHILE][34] = 34, -+ [2][1][2][1][RTW89_UKRAINE][34] = 127, -+ [2][1][2][1][RTW89_MEXICO][34] = 68, -+ [2][1][2][1][RTW89_CN][34] = 127, -+ [2][1][2][1][RTW89_QATAR][34] = 127, -+ [2][1][2][1][RTW89_UK][34] = 56, -+ [2][1][2][1][RTW89_FCC][41] = 74, -+ [2][1][2][1][RTW89_ETSI][41] = 4, -+ [2][1][2][1][RTW89_MKK][41] = 127, -+ [2][1][2][1][RTW89_IC][41] = 74, -+ [2][1][2][1][RTW89_KCC][41] = 56, -+ [2][1][2][1][RTW89_ACMA][41] = 70, -+ [2][1][2][1][RTW89_CHILE][41] = 36, -+ [2][1][2][1][RTW89_UKRAINE][41] = 4, -+ [2][1][2][1][RTW89_MEXICO][41] = 74, -+ [2][1][2][1][RTW89_CN][41] = 70, -+ [2][1][2][1][RTW89_QATAR][41] = 4, -+ [2][1][2][1][RTW89_UK][41] = 38, -+ [2][1][2][1][RTW89_FCC][49] = 58, -+ [2][1][2][1][RTW89_ETSI][49] = 127, -+ [2][1][2][1][RTW89_MKK][49] = 127, -+ [2][1][2][1][RTW89_IC][49] = 127, -+ [2][1][2][1][RTW89_KCC][49] = 127, -+ [2][1][2][1][RTW89_ACMA][49] = 127, -+ [2][1][2][1][RTW89_CHILE][49] = 127, -+ [2][1][2][1][RTW89_UKRAINE][49] = 127, -+ [2][1][2][1][RTW89_MEXICO][49] = 127, -+ [2][1][2][1][RTW89_CN][49] = 127, -+ [2][1][2][1][RTW89_QATAR][49] = 127, -+ [2][1][2][1][RTW89_UK][49] = 127, -+}; -+ -+const s8 rtw89_8852b_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = { -+ [0][0][RTW89_WW][0] = 32, -+ [0][0][RTW89_WW][1] = 32, -+ [0][0][RTW89_WW][2] = 32, -+ [0][0][RTW89_WW][3] = 32, -+ [0][0][RTW89_WW][4] = 32, -+ [0][0][RTW89_WW][5] = 32, -+ [0][0][RTW89_WW][6] = 32, -+ [0][0][RTW89_WW][7] = 32, -+ [0][0][RTW89_WW][8] = 32, -+ [0][0][RTW89_WW][9] = 32, -+ [0][0][RTW89_WW][10] = 32, -+ [0][0][RTW89_WW][11] = 32, -+ [0][0][RTW89_WW][12] = 32, -+ [0][0][RTW89_WW][13] = 0, -+ [0][1][RTW89_WW][0] = 20, -+ [0][1][RTW89_WW][1] = 22, -+ [0][1][RTW89_WW][2] = 22, -+ [0][1][RTW89_WW][3] = 22, -+ [0][1][RTW89_WW][4] = 22, -+ [0][1][RTW89_WW][5] = 22, -+ [0][1][RTW89_WW][6] = 22, -+ [0][1][RTW89_WW][7] = 22, -+ [0][1][RTW89_WW][8] = 22, -+ [0][1][RTW89_WW][9] = 22, -+ [0][1][RTW89_WW][10] = 22, -+ [0][1][RTW89_WW][11] = 22, -+ [0][1][RTW89_WW][12] = 20, -+ [0][1][RTW89_WW][13] = 0, -+ [1][0][RTW89_WW][0] = 42, -+ [1][0][RTW89_WW][1] = 44, -+ [1][0][RTW89_WW][2] = 44, -+ [1][0][RTW89_WW][3] = 44, -+ [1][0][RTW89_WW][4] = 44, -+ [1][0][RTW89_WW][5] = 44, -+ [1][0][RTW89_WW][6] = 44, -+ [1][0][RTW89_WW][7] = 44, -+ [1][0][RTW89_WW][8] = 44, -+ [1][0][RTW89_WW][9] = 44, -+ [1][0][RTW89_WW][10] = 44, -+ [1][0][RTW89_WW][11] = 44, -+ [1][0][RTW89_WW][12] = 38, -+ [1][0][RTW89_WW][13] = 0, -+ [1][1][RTW89_WW][0] = 32, -+ [1][1][RTW89_WW][1] = 32, -+ [1][1][RTW89_WW][2] = 32, -+ [1][1][RTW89_WW][3] = 32, -+ [1][1][RTW89_WW][4] = 32, -+ [1][1][RTW89_WW][5] = 32, -+ [1][1][RTW89_WW][6] = 32, -+ [1][1][RTW89_WW][7] = 32, -+ [1][1][RTW89_WW][8] = 32, -+ [1][1][RTW89_WW][9] = 32, -+ [1][1][RTW89_WW][10] = 32, -+ [1][1][RTW89_WW][11] = 32, -+ [1][1][RTW89_WW][12] = 32, -+ [1][1][RTW89_WW][13] = 0, -+ [2][0][RTW89_WW][0] = 56, -+ [2][0][RTW89_WW][1] = 56, -+ [2][0][RTW89_WW][2] = 56, -+ [2][0][RTW89_WW][3] = 56, -+ [2][0][RTW89_WW][4] = 56, -+ [2][0][RTW89_WW][5] = 56, -+ [2][0][RTW89_WW][6] = 56, -+ [2][0][RTW89_WW][7] = 56, -+ [2][0][RTW89_WW][8] = 56, -+ [2][0][RTW89_WW][9] = 56, -+ [2][0][RTW89_WW][10] = 56, -+ [2][0][RTW89_WW][11] = 50, -+ [2][0][RTW89_WW][12] = 46, -+ [2][0][RTW89_WW][13] = 0, -+ [2][1][RTW89_WW][0] = 44, -+ [2][1][RTW89_WW][1] = 44, -+ [2][1][RTW89_WW][2] = 44, -+ [2][1][RTW89_WW][3] = 44, -+ [2][1][RTW89_WW][4] = 44, -+ [2][1][RTW89_WW][5] = 44, -+ [2][1][RTW89_WW][6] = 44, -+ [2][1][RTW89_WW][7] = 44, -+ [2][1][RTW89_WW][8] = 44, -+ [2][1][RTW89_WW][9] = 44, -+ [2][1][RTW89_WW][10] = 44, -+ [2][1][RTW89_WW][11] = 38, -+ [2][1][RTW89_WW][12] = 34, -+ [2][1][RTW89_WW][13] = 0, -+ [0][0][RTW89_FCC][0] = 68, -+ [0][0][RTW89_ETSI][0] = 32, -+ [0][0][RTW89_MKK][0] = 42, -+ [0][0][RTW89_IC][0] = 68, -+ [0][0][RTW89_KCC][0] = 44, -+ [0][0][RTW89_ACMA][0] = 32, -+ [0][0][RTW89_CHILE][0] = 66, -+ [0][0][RTW89_UKRAINE][0] = 32, -+ [0][0][RTW89_MEXICO][0] = 68, -+ [0][0][RTW89_CN][0] = 32, -+ [0][0][RTW89_QATAR][0] = 32, -+ [0][0][RTW89_UK][0] = 32, -+ [0][0][RTW89_FCC][1] = 68, -+ [0][0][RTW89_ETSI][1] = 32, -+ [0][0][RTW89_MKK][1] = 42, -+ [0][0][RTW89_IC][1] = 68, -+ [0][0][RTW89_KCC][1] = 44, -+ [0][0][RTW89_ACMA][1] = 32, -+ [0][0][RTW89_CHILE][1] = 64, -+ [0][0][RTW89_UKRAINE][1] = 32, -+ [0][0][RTW89_MEXICO][1] = 68, -+ [0][0][RTW89_CN][1] = 32, -+ [0][0][RTW89_QATAR][1] = 32, -+ [0][0][RTW89_UK][1] = 32, -+ [0][0][RTW89_FCC][2] = 72, -+ [0][0][RTW89_ETSI][2] = 32, -+ [0][0][RTW89_MKK][2] = 42, -+ [0][0][RTW89_IC][2] = 72, -+ [0][0][RTW89_KCC][2] = 44, -+ [0][0][RTW89_ACMA][2] = 32, -+ [0][0][RTW89_CHILE][2] = 64, -+ [0][0][RTW89_UKRAINE][2] = 32, -+ [0][0][RTW89_MEXICO][2] = 72, -+ [0][0][RTW89_CN][2] = 32, -+ [0][0][RTW89_QATAR][2] = 32, -+ [0][0][RTW89_UK][2] = 32, -+ [0][0][RTW89_FCC][3] = 76, -+ [0][0][RTW89_ETSI][3] = 32, -+ [0][0][RTW89_MKK][3] = 42, -+ [0][0][RTW89_IC][3] = 76, -+ [0][0][RTW89_KCC][3] = 44, -+ [0][0][RTW89_ACMA][3] = 32, -+ [0][0][RTW89_CHILE][3] = 64, -+ [0][0][RTW89_UKRAINE][3] = 32, -+ [0][0][RTW89_MEXICO][3] = 76, -+ [0][0][RTW89_CN][3] = 32, -+ [0][0][RTW89_QATAR][3] = 32, -+ [0][0][RTW89_UK][3] = 32, -+ [0][0][RTW89_FCC][4] = 76, -+ [0][0][RTW89_ETSI][4] = 32, -+ [0][0][RTW89_MKK][4] = 42, -+ [0][0][RTW89_IC][4] = 76, -+ [0][0][RTW89_KCC][4] = 44, -+ [0][0][RTW89_ACMA][4] = 32, -+ [0][0][RTW89_CHILE][4] = 64, -+ [0][0][RTW89_UKRAINE][4] = 32, -+ [0][0][RTW89_MEXICO][4] = 76, -+ [0][0][RTW89_CN][4] = 32, -+ [0][0][RTW89_QATAR][4] = 32, -+ [0][0][RTW89_UK][4] = 32, -+ [0][0][RTW89_FCC][5] = 84, -+ [0][0][RTW89_ETSI][5] = 32, -+ [0][0][RTW89_MKK][5] = 42, -+ [0][0][RTW89_IC][5] = 84, -+ [0][0][RTW89_KCC][5] = 44, -+ [0][0][RTW89_ACMA][5] = 32, -+ [0][0][RTW89_CHILE][5] = 64, -+ [0][0][RTW89_UKRAINE][5] = 32, -+ [0][0][RTW89_MEXICO][5] = 84, -+ [0][0][RTW89_CN][5] = 32, -+ [0][0][RTW89_QATAR][5] = 32, -+ [0][0][RTW89_UK][5] = 32, -+ [0][0][RTW89_FCC][6] = 74, -+ [0][0][RTW89_ETSI][6] = 32, -+ [0][0][RTW89_MKK][6] = 42, -+ [0][0][RTW89_IC][6] = 74, -+ [0][0][RTW89_KCC][6] = 44, -+ [0][0][RTW89_ACMA][6] = 32, -+ [0][0][RTW89_CHILE][6] = 64, -+ [0][0][RTW89_UKRAINE][6] = 32, -+ [0][0][RTW89_MEXICO][6] = 74, -+ [0][0][RTW89_CN][6] = 32, -+ [0][0][RTW89_QATAR][6] = 32, -+ [0][0][RTW89_UK][6] = 32, -+ [0][0][RTW89_FCC][7] = 74, -+ [0][0][RTW89_ETSI][7] = 32, -+ [0][0][RTW89_MKK][7] = 42, -+ [0][0][RTW89_IC][7] = 74, -+ [0][0][RTW89_KCC][7] = 44, -+ [0][0][RTW89_ACMA][7] = 32, -+ [0][0][RTW89_CHILE][7] = 64, -+ [0][0][RTW89_UKRAINE][7] = 32, -+ [0][0][RTW89_MEXICO][7] = 74, -+ [0][0][RTW89_CN][7] = 32, -+ [0][0][RTW89_QATAR][7] = 32, -+ [0][0][RTW89_UK][7] = 32, -+ [0][0][RTW89_FCC][8] = 70, -+ [0][0][RTW89_ETSI][8] = 32, -+ [0][0][RTW89_MKK][8] = 42, -+ [0][0][RTW89_IC][8] = 70, -+ [0][0][RTW89_KCC][8] = 44, -+ [0][0][RTW89_ACMA][8] = 32, -+ [0][0][RTW89_CHILE][8] = 64, -+ [0][0][RTW89_UKRAINE][8] = 32, -+ [0][0][RTW89_MEXICO][8] = 70, -+ [0][0][RTW89_CN][8] = 32, -+ [0][0][RTW89_QATAR][8] = 32, -+ [0][0][RTW89_UK][8] = 32, -+ [0][0][RTW89_FCC][9] = 66, -+ [0][0][RTW89_ETSI][9] = 32, -+ [0][0][RTW89_MKK][9] = 42, -+ [0][0][RTW89_IC][9] = 66, -+ [0][0][RTW89_KCC][9] = 42, -+ [0][0][RTW89_ACMA][9] = 32, -+ [0][0][RTW89_CHILE][9] = 64, -+ [0][0][RTW89_UKRAINE][9] = 32, -+ [0][0][RTW89_MEXICO][9] = 66, -+ [0][0][RTW89_CN][9] = 32, -+ [0][0][RTW89_QATAR][9] = 32, -+ [0][0][RTW89_UK][9] = 32, -+ [0][0][RTW89_FCC][10] = 66, -+ [0][0][RTW89_ETSI][10] = 32, -+ [0][0][RTW89_MKK][10] = 42, -+ [0][0][RTW89_IC][10] = 66, -+ [0][0][RTW89_KCC][10] = 42, -+ [0][0][RTW89_ACMA][10] = 32, -+ [0][0][RTW89_CHILE][10] = 66, -+ [0][0][RTW89_UKRAINE][10] = 32, -+ [0][0][RTW89_MEXICO][10] = 66, -+ [0][0][RTW89_CN][10] = 32, -+ [0][0][RTW89_QATAR][10] = 32, -+ [0][0][RTW89_UK][10] = 32, -+ [0][0][RTW89_FCC][11] = 50, -+ [0][0][RTW89_ETSI][11] = 32, -+ [0][0][RTW89_MKK][11] = 42, -+ [0][0][RTW89_IC][11] = 50, -+ [0][0][RTW89_KCC][11] = 42, -+ [0][0][RTW89_ACMA][11] = 32, -+ [0][0][RTW89_CHILE][11] = 64, -+ [0][0][RTW89_UKRAINE][11] = 32, -+ [0][0][RTW89_MEXICO][11] = 50, -+ [0][0][RTW89_CN][11] = 32, -+ [0][0][RTW89_QATAR][11] = 32, -+ [0][0][RTW89_UK][11] = 32, -+ [0][0][RTW89_FCC][12] = 32, -+ [0][0][RTW89_ETSI][12] = 32, -+ [0][0][RTW89_MKK][12] = 42, -+ [0][0][RTW89_IC][12] = 32, -+ [0][0][RTW89_KCC][12] = 42, -+ [0][0][RTW89_ACMA][12] = 32, -+ [0][0][RTW89_CHILE][12] = 64, -+ [0][0][RTW89_UKRAINE][12] = 32, -+ [0][0][RTW89_MEXICO][12] = 32, -+ [0][0][RTW89_CN][12] = 32, -+ [0][0][RTW89_QATAR][12] = 32, -+ [0][0][RTW89_UK][12] = 32, -+ [0][0][RTW89_FCC][13] = 127, -+ [0][0][RTW89_ETSI][13] = 127, -+ [0][0][RTW89_MKK][13] = 127, -+ [0][0][RTW89_IC][13] = 127, -+ [0][0][RTW89_KCC][13] = 127, -+ [0][0][RTW89_ACMA][13] = 127, -+ [0][0][RTW89_CHILE][13] = 127, -+ [0][0][RTW89_UKRAINE][13] = 127, -+ [0][0][RTW89_MEXICO][13] = 127, -+ [0][0][RTW89_CN][13] = 127, -+ [0][0][RTW89_QATAR][13] = 127, -+ [0][0][RTW89_UK][13] = 127, -+ [0][1][RTW89_FCC][0] = 54, -+ [0][1][RTW89_ETSI][0] = 20, -+ [0][1][RTW89_MKK][0] = 32, -+ [0][1][RTW89_IC][0] = 54, -+ [0][1][RTW89_KCC][0] = 32, -+ [0][1][RTW89_ACMA][0] = 20, -+ [0][1][RTW89_CHILE][0] = 50, -+ [0][1][RTW89_UKRAINE][0] = 20, -+ [0][1][RTW89_MEXICO][0] = 54, -+ [0][1][RTW89_CN][0] = 20, -+ [0][1][RTW89_QATAR][0] = 20, -+ [0][1][RTW89_UK][0] = 20, -+ [0][1][RTW89_FCC][1] = 54, -+ [0][1][RTW89_ETSI][1] = 22, -+ [0][1][RTW89_MKK][1] = 32, -+ [0][1][RTW89_IC][1] = 54, -+ [0][1][RTW89_KCC][1] = 32, -+ [0][1][RTW89_ACMA][1] = 22, -+ [0][1][RTW89_CHILE][1] = 50, -+ [0][1][RTW89_UKRAINE][1] = 22, -+ [0][1][RTW89_MEXICO][1] = 54, -+ [0][1][RTW89_CN][1] = 22, -+ [0][1][RTW89_QATAR][1] = 22, -+ [0][1][RTW89_UK][1] = 22, -+ [0][1][RTW89_FCC][2] = 58, -+ [0][1][RTW89_ETSI][2] = 22, -+ [0][1][RTW89_MKK][2] = 32, -+ [0][1][RTW89_IC][2] = 58, -+ [0][1][RTW89_KCC][2] = 32, -+ [0][1][RTW89_ACMA][2] = 22, -+ [0][1][RTW89_CHILE][2] = 50, -+ [0][1][RTW89_UKRAINE][2] = 22, -+ [0][1][RTW89_MEXICO][2] = 58, -+ [0][1][RTW89_CN][2] = 22, -+ [0][1][RTW89_QATAR][2] = 22, -+ [0][1][RTW89_UK][2] = 22, -+ [0][1][RTW89_FCC][3] = 62, -+ [0][1][RTW89_ETSI][3] = 22, -+ [0][1][RTW89_MKK][3] = 32, -+ [0][1][RTW89_IC][3] = 62, -+ [0][1][RTW89_KCC][3] = 32, -+ [0][1][RTW89_ACMA][3] = 22, -+ [0][1][RTW89_CHILE][3] = 50, -+ [0][1][RTW89_UKRAINE][3] = 22, -+ [0][1][RTW89_MEXICO][3] = 62, -+ [0][1][RTW89_CN][3] = 22, -+ [0][1][RTW89_QATAR][3] = 22, -+ [0][1][RTW89_UK][3] = 22, -+ [0][1][RTW89_FCC][4] = 66, -+ [0][1][RTW89_ETSI][4] = 22, -+ [0][1][RTW89_MKK][4] = 32, -+ [0][1][RTW89_IC][4] = 66, -+ [0][1][RTW89_KCC][4] = 30, -+ [0][1][RTW89_ACMA][4] = 22, -+ [0][1][RTW89_CHILE][4] = 50, -+ [0][1][RTW89_UKRAINE][4] = 22, -+ [0][1][RTW89_MEXICO][4] = 66, -+ [0][1][RTW89_CN][4] = 22, -+ [0][1][RTW89_QATAR][4] = 22, -+ [0][1][RTW89_UK][4] = 22, -+ [0][1][RTW89_FCC][5] = 74, -+ [0][1][RTW89_ETSI][5] = 22, -+ [0][1][RTW89_MKK][5] = 32, -+ [0][1][RTW89_IC][5] = 74, -+ [0][1][RTW89_KCC][5] = 30, -+ [0][1][RTW89_ACMA][5] = 22, -+ [0][1][RTW89_CHILE][5] = 52, -+ [0][1][RTW89_UKRAINE][5] = 22, -+ [0][1][RTW89_MEXICO][5] = 74, -+ [0][1][RTW89_CN][5] = 22, -+ [0][1][RTW89_QATAR][5] = 22, -+ [0][1][RTW89_UK][5] = 22, -+ [0][1][RTW89_FCC][6] = 66, -+ [0][1][RTW89_ETSI][6] = 22, -+ [0][1][RTW89_MKK][6] = 30, -+ [0][1][RTW89_IC][6] = 66, -+ [0][1][RTW89_KCC][6] = 30, -+ [0][1][RTW89_ACMA][6] = 22, -+ [0][1][RTW89_CHILE][6] = 50, -+ [0][1][RTW89_UKRAINE][6] = 22, -+ [0][1][RTW89_MEXICO][6] = 66, -+ [0][1][RTW89_CN][6] = 22, -+ [0][1][RTW89_QATAR][6] = 22, -+ [0][1][RTW89_UK][6] = 22, -+ [0][1][RTW89_FCC][7] = 62, -+ [0][1][RTW89_ETSI][7] = 22, -+ [0][1][RTW89_MKK][7] = 32, -+ [0][1][RTW89_IC][7] = 62, -+ [0][1][RTW89_KCC][7] = 30, -+ [0][1][RTW89_ACMA][7] = 22, -+ [0][1][RTW89_CHILE][7] = 50, -+ [0][1][RTW89_UKRAINE][7] = 22, -+ [0][1][RTW89_MEXICO][7] = 62, -+ [0][1][RTW89_CN][7] = 22, -+ [0][1][RTW89_QATAR][7] = 22, -+ [0][1][RTW89_UK][7] = 22, -+ [0][1][RTW89_FCC][8] = 58, -+ [0][1][RTW89_ETSI][8] = 22, -+ [0][1][RTW89_MKK][8] = 32, -+ [0][1][RTW89_IC][8] = 58, -+ [0][1][RTW89_KCC][8] = 30, -+ [0][1][RTW89_ACMA][8] = 22, -+ [0][1][RTW89_CHILE][8] = 50, -+ [0][1][RTW89_UKRAINE][8] = 22, -+ [0][1][RTW89_MEXICO][8] = 58, -+ [0][1][RTW89_CN][8] = 22, -+ [0][1][RTW89_QATAR][8] = 22, -+ [0][1][RTW89_UK][8] = 22, -+ [0][1][RTW89_FCC][9] = 54, -+ [0][1][RTW89_ETSI][9] = 22, -+ [0][1][RTW89_MKK][9] = 32, -+ [0][1][RTW89_IC][9] = 54, -+ [0][1][RTW89_KCC][9] = 30, -+ [0][1][RTW89_ACMA][9] = 22, -+ [0][1][RTW89_CHILE][9] = 50, -+ [0][1][RTW89_UKRAINE][9] = 22, -+ [0][1][RTW89_MEXICO][9] = 54, -+ [0][1][RTW89_CN][9] = 22, -+ [0][1][RTW89_QATAR][9] = 22, -+ [0][1][RTW89_UK][9] = 22, -+ [0][1][RTW89_FCC][10] = 54, -+ [0][1][RTW89_ETSI][10] = 22, -+ [0][1][RTW89_MKK][10] = 32, -+ [0][1][RTW89_IC][10] = 54, -+ [0][1][RTW89_KCC][10] = 30, -+ [0][1][RTW89_ACMA][10] = 22, -+ [0][1][RTW89_CHILE][10] = 50, -+ [0][1][RTW89_UKRAINE][10] = 22, -+ [0][1][RTW89_MEXICO][10] = 54, -+ [0][1][RTW89_CN][10] = 22, -+ [0][1][RTW89_QATAR][10] = 22, -+ [0][1][RTW89_UK][10] = 22, -+ [0][1][RTW89_FCC][11] = 38, -+ [0][1][RTW89_ETSI][11] = 22, -+ [0][1][RTW89_MKK][11] = 32, -+ [0][1][RTW89_IC][11] = 38, -+ [0][1][RTW89_KCC][11] = 30, -+ [0][1][RTW89_ACMA][11] = 22, -+ [0][1][RTW89_CHILE][11] = 50, -+ [0][1][RTW89_UKRAINE][11] = 22, -+ [0][1][RTW89_MEXICO][11] = 38, -+ [0][1][RTW89_CN][11] = 22, -+ [0][1][RTW89_QATAR][11] = 22, -+ [0][1][RTW89_UK][11] = 22, -+ [0][1][RTW89_FCC][12] = 30, -+ [0][1][RTW89_ETSI][12] = 20, -+ [0][1][RTW89_MKK][12] = 30, -+ [0][1][RTW89_IC][12] = 30, -+ [0][1][RTW89_KCC][12] = 30, -+ [0][1][RTW89_ACMA][12] = 20, -+ [0][1][RTW89_CHILE][12] = 50, -+ [0][1][RTW89_UKRAINE][12] = 20, -+ [0][1][RTW89_MEXICO][12] = 30, -+ [0][1][RTW89_CN][12] = 20, -+ [0][1][RTW89_QATAR][12] = 20, -+ [0][1][RTW89_UK][12] = 20, -+ [0][1][RTW89_FCC][13] = 127, -+ [0][1][RTW89_ETSI][13] = 127, -+ [0][1][RTW89_MKK][13] = 127, -+ [0][1][RTW89_IC][13] = 127, -+ [0][1][RTW89_KCC][13] = 127, -+ [0][1][RTW89_ACMA][13] = 127, -+ [0][1][RTW89_CHILE][13] = 127, -+ [0][1][RTW89_UKRAINE][13] = 127, -+ [0][1][RTW89_MEXICO][13] = 127, -+ [0][1][RTW89_CN][13] = 127, -+ [0][1][RTW89_QATAR][13] = 127, -+ [0][1][RTW89_UK][13] = 127, -+ [1][0][RTW89_FCC][0] = 72, -+ [1][0][RTW89_ETSI][0] = 42, -+ [1][0][RTW89_MKK][0] = 52, -+ [1][0][RTW89_IC][0] = 72, -+ [1][0][RTW89_KCC][0] = 52, -+ [1][0][RTW89_ACMA][0] = 42, -+ [1][0][RTW89_CHILE][0] = 68, -+ [1][0][RTW89_UKRAINE][0] = 42, -+ [1][0][RTW89_MEXICO][0] = 72, -+ [1][0][RTW89_CN][0] = 42, -+ [1][0][RTW89_QATAR][0] = 42, -+ [1][0][RTW89_UK][0] = 42, -+ [1][0][RTW89_FCC][1] = 72, -+ [1][0][RTW89_ETSI][1] = 44, -+ [1][0][RTW89_MKK][1] = 52, -+ [1][0][RTW89_IC][1] = 72, -+ [1][0][RTW89_KCC][1] = 52, -+ [1][0][RTW89_ACMA][1] = 44, -+ [1][0][RTW89_CHILE][1] = 68, -+ [1][0][RTW89_UKRAINE][1] = 44, -+ [1][0][RTW89_MEXICO][1] = 72, -+ [1][0][RTW89_CN][1] = 44, -+ [1][0][RTW89_QATAR][1] = 44, -+ [1][0][RTW89_UK][1] = 44, -+ [1][0][RTW89_FCC][2] = 76, -+ [1][0][RTW89_ETSI][2] = 44, -+ [1][0][RTW89_MKK][2] = 52, -+ [1][0][RTW89_IC][2] = 76, -+ [1][0][RTW89_KCC][2] = 52, -+ [1][0][RTW89_ACMA][2] = 44, -+ [1][0][RTW89_CHILE][2] = 68, -+ [1][0][RTW89_UKRAINE][2] = 44, -+ [1][0][RTW89_MEXICO][2] = 76, -+ [1][0][RTW89_CN][2] = 44, -+ [1][0][RTW89_QATAR][2] = 44, -+ [1][0][RTW89_UK][2] = 44, -+ [1][0][RTW89_FCC][3] = 78, -+ [1][0][RTW89_ETSI][3] = 44, -+ [1][0][RTW89_MKK][3] = 52, -+ [1][0][RTW89_IC][3] = 78, -+ [1][0][RTW89_KCC][3] = 52, -+ [1][0][RTW89_ACMA][3] = 44, -+ [1][0][RTW89_CHILE][3] = 68, -+ [1][0][RTW89_UKRAINE][3] = 44, -+ [1][0][RTW89_MEXICO][3] = 78, -+ [1][0][RTW89_CN][3] = 44, -+ [1][0][RTW89_QATAR][3] = 44, -+ [1][0][RTW89_UK][3] = 44, -+ [1][0][RTW89_FCC][4] = 78, -+ [1][0][RTW89_ETSI][4] = 44, -+ [1][0][RTW89_MKK][4] = 52, -+ [1][0][RTW89_IC][4] = 78, -+ [1][0][RTW89_KCC][4] = 52, -+ [1][0][RTW89_ACMA][4] = 44, -+ [1][0][RTW89_CHILE][4] = 68, -+ [1][0][RTW89_UKRAINE][4] = 44, -+ [1][0][RTW89_MEXICO][4] = 78, -+ [1][0][RTW89_CN][4] = 44, -+ [1][0][RTW89_QATAR][4] = 44, -+ [1][0][RTW89_UK][4] = 44, -+ [1][0][RTW89_FCC][5] = 84, -+ [1][0][RTW89_ETSI][5] = 44, -+ [1][0][RTW89_MKK][5] = 52, -+ [1][0][RTW89_IC][5] = 84, -+ [1][0][RTW89_KCC][5] = 52, -+ [1][0][RTW89_ACMA][5] = 44, -+ [1][0][RTW89_CHILE][5] = 68, -+ [1][0][RTW89_UKRAINE][5] = 44, -+ [1][0][RTW89_MEXICO][5] = 84, -+ [1][0][RTW89_CN][5] = 44, -+ [1][0][RTW89_QATAR][5] = 44, -+ [1][0][RTW89_UK][5] = 44, -+ [1][0][RTW89_FCC][6] = 72, -+ [1][0][RTW89_ETSI][6] = 44, -+ [1][0][RTW89_MKK][6] = 52, -+ [1][0][RTW89_IC][6] = 72, -+ [1][0][RTW89_KCC][6] = 52, -+ [1][0][RTW89_ACMA][6] = 44, -+ [1][0][RTW89_CHILE][6] = 68, -+ [1][0][RTW89_UKRAINE][6] = 44, -+ [1][0][RTW89_MEXICO][6] = 72, -+ [1][0][RTW89_CN][6] = 44, -+ [1][0][RTW89_QATAR][6] = 44, -+ [1][0][RTW89_UK][6] = 44, -+ [1][0][RTW89_FCC][7] = 72, -+ [1][0][RTW89_ETSI][7] = 44, -+ [1][0][RTW89_MKK][7] = 52, -+ [1][0][RTW89_IC][7] = 72, -+ [1][0][RTW89_KCC][7] = 52, -+ [1][0][RTW89_ACMA][7] = 44, -+ [1][0][RTW89_CHILE][7] = 68, -+ [1][0][RTW89_UKRAINE][7] = 44, -+ [1][0][RTW89_MEXICO][7] = 72, -+ [1][0][RTW89_CN][7] = 44, -+ [1][0][RTW89_QATAR][7] = 44, -+ [1][0][RTW89_UK][7] = 44, -+ [1][0][RTW89_FCC][8] = 72, -+ [1][0][RTW89_ETSI][8] = 44, -+ [1][0][RTW89_MKK][8] = 52, -+ [1][0][RTW89_IC][8] = 72, -+ [1][0][RTW89_KCC][8] = 52, -+ [1][0][RTW89_ACMA][8] = 44, -+ [1][0][RTW89_CHILE][8] = 68, -+ [1][0][RTW89_UKRAINE][8] = 44, -+ [1][0][RTW89_MEXICO][8] = 72, -+ [1][0][RTW89_CN][8] = 44, -+ [1][0][RTW89_QATAR][8] = 44, -+ [1][0][RTW89_UK][8] = 44, -+ [1][0][RTW89_FCC][9] = 68, -+ [1][0][RTW89_ETSI][9] = 44, -+ [1][0][RTW89_MKK][9] = 52, -+ [1][0][RTW89_IC][9] = 68, -+ [1][0][RTW89_KCC][9] = 52, -+ [1][0][RTW89_ACMA][9] = 44, -+ [1][0][RTW89_CHILE][9] = 68, -+ [1][0][RTW89_UKRAINE][9] = 44, -+ [1][0][RTW89_MEXICO][9] = 68, -+ [1][0][RTW89_CN][9] = 44, -+ [1][0][RTW89_QATAR][9] = 44, -+ [1][0][RTW89_UK][9] = 44, -+ [1][0][RTW89_FCC][10] = 68, -+ [1][0][RTW89_ETSI][10] = 44, -+ [1][0][RTW89_MKK][10] = 52, -+ [1][0][RTW89_IC][10] = 68, -+ [1][0][RTW89_KCC][10] = 52, -+ [1][0][RTW89_ACMA][10] = 44, -+ [1][0][RTW89_CHILE][10] = 70, -+ [1][0][RTW89_UKRAINE][10] = 44, -+ [1][0][RTW89_MEXICO][10] = 68, -+ [1][0][RTW89_CN][10] = 44, -+ [1][0][RTW89_QATAR][10] = 44, -+ [1][0][RTW89_UK][10] = 44, -+ [1][0][RTW89_FCC][11] = 50, -+ [1][0][RTW89_ETSI][11] = 44, -+ [1][0][RTW89_MKK][11] = 52, -+ [1][0][RTW89_IC][11] = 50, -+ [1][0][RTW89_KCC][11] = 52, -+ [1][0][RTW89_ACMA][11] = 44, -+ [1][0][RTW89_CHILE][11] = 68, -+ [1][0][RTW89_UKRAINE][11] = 44, -+ [1][0][RTW89_MEXICO][11] = 50, -+ [1][0][RTW89_CN][11] = 44, -+ [1][0][RTW89_QATAR][11] = 44, -+ [1][0][RTW89_UK][11] = 44, -+ [1][0][RTW89_FCC][12] = 38, -+ [1][0][RTW89_ETSI][12] = 42, -+ [1][0][RTW89_MKK][12] = 52, -+ [1][0][RTW89_IC][12] = 38, -+ [1][0][RTW89_KCC][12] = 52, -+ [1][0][RTW89_ACMA][12] = 42, -+ [1][0][RTW89_CHILE][12] = 68, -+ [1][0][RTW89_UKRAINE][12] = 42, -+ [1][0][RTW89_MEXICO][12] = 38, -+ [1][0][RTW89_CN][12] = 42, -+ [1][0][RTW89_QATAR][12] = 42, -+ [1][0][RTW89_UK][12] = 42, -+ [1][0][RTW89_FCC][13] = 127, -+ [1][0][RTW89_ETSI][13] = 127, -+ [1][0][RTW89_MKK][13] = 127, -+ [1][0][RTW89_IC][13] = 127, -+ [1][0][RTW89_KCC][13] = 127, -+ [1][0][RTW89_ACMA][13] = 127, -+ [1][0][RTW89_CHILE][13] = 127, -+ [1][0][RTW89_UKRAINE][13] = 127, -+ [1][0][RTW89_MEXICO][13] = 127, -+ [1][0][RTW89_CN][13] = 127, -+ [1][0][RTW89_QATAR][13] = 127, -+ [1][0][RTW89_UK][13] = 127, -+ [1][1][RTW89_FCC][0] = 54, -+ [1][1][RTW89_ETSI][0] = 32, -+ [1][1][RTW89_MKK][0] = 40, -+ [1][1][RTW89_IC][0] = 54, -+ [1][1][RTW89_KCC][0] = 40, -+ [1][1][RTW89_ACMA][0] = 32, -+ [1][1][RTW89_CHILE][0] = 54, -+ [1][1][RTW89_UKRAINE][0] = 32, -+ [1][1][RTW89_MEXICO][0] = 54, -+ [1][1][RTW89_CN][0] = 32, -+ [1][1][RTW89_QATAR][0] = 32, -+ [1][1][RTW89_UK][0] = 32, -+ [1][1][RTW89_FCC][1] = 54, -+ [1][1][RTW89_ETSI][1] = 32, -+ [1][1][RTW89_MKK][1] = 40, -+ [1][1][RTW89_IC][1] = 54, -+ [1][1][RTW89_KCC][1] = 40, -+ [1][1][RTW89_ACMA][1] = 32, -+ [1][1][RTW89_CHILE][1] = 54, -+ [1][1][RTW89_UKRAINE][1] = 32, -+ [1][1][RTW89_MEXICO][1] = 54, -+ [1][1][RTW89_CN][1] = 32, -+ [1][1][RTW89_QATAR][1] = 32, -+ [1][1][RTW89_UK][1] = 32, -+ [1][1][RTW89_FCC][2] = 58, -+ [1][1][RTW89_ETSI][2] = 32, -+ [1][1][RTW89_MKK][2] = 40, -+ [1][1][RTW89_IC][2] = 58, -+ [1][1][RTW89_KCC][2] = 40, -+ [1][1][RTW89_ACMA][2] = 32, -+ [1][1][RTW89_CHILE][2] = 54, -+ [1][1][RTW89_UKRAINE][2] = 32, -+ [1][1][RTW89_MEXICO][2] = 58, -+ [1][1][RTW89_CN][2] = 32, -+ [1][1][RTW89_QATAR][2] = 32, -+ [1][1][RTW89_UK][2] = 32, -+ [1][1][RTW89_FCC][3] = 62, -+ [1][1][RTW89_ETSI][3] = 32, -+ [1][1][RTW89_MKK][3] = 40, -+ [1][1][RTW89_IC][3] = 62, -+ [1][1][RTW89_KCC][3] = 40, -+ [1][1][RTW89_ACMA][3] = 32, -+ [1][1][RTW89_CHILE][3] = 54, -+ [1][1][RTW89_UKRAINE][3] = 32, -+ [1][1][RTW89_MEXICO][3] = 62, -+ [1][1][RTW89_CN][3] = 32, -+ [1][1][RTW89_QATAR][3] = 32, -+ [1][1][RTW89_UK][3] = 32, -+ [1][1][RTW89_FCC][4] = 66, -+ [1][1][RTW89_ETSI][4] = 32, -+ [1][1][RTW89_MKK][4] = 40, -+ [1][1][RTW89_IC][4] = 66, -+ [1][1][RTW89_KCC][4] = 40, -+ [1][1][RTW89_ACMA][4] = 32, -+ [1][1][RTW89_CHILE][4] = 54, -+ [1][1][RTW89_UKRAINE][4] = 32, -+ [1][1][RTW89_MEXICO][4] = 66, -+ [1][1][RTW89_CN][4] = 32, -+ [1][1][RTW89_QATAR][4] = 32, -+ [1][1][RTW89_UK][4] = 32, -+ [1][1][RTW89_FCC][5] = 74, -+ [1][1][RTW89_ETSI][5] = 32, -+ [1][1][RTW89_MKK][5] = 40, -+ [1][1][RTW89_IC][5] = 74, -+ [1][1][RTW89_KCC][5] = 40, -+ [1][1][RTW89_ACMA][5] = 32, -+ [1][1][RTW89_CHILE][5] = 54, -+ [1][1][RTW89_UKRAINE][5] = 32, -+ [1][1][RTW89_MEXICO][5] = 74, -+ [1][1][RTW89_CN][5] = 32, -+ [1][1][RTW89_QATAR][5] = 32, -+ [1][1][RTW89_UK][5] = 32, -+ [1][1][RTW89_FCC][6] = 66, -+ [1][1][RTW89_ETSI][6] = 32, -+ [1][1][RTW89_MKK][6] = 40, -+ [1][1][RTW89_IC][6] = 66, -+ [1][1][RTW89_KCC][6] = 40, -+ [1][1][RTW89_ACMA][6] = 32, -+ [1][1][RTW89_CHILE][6] = 54, -+ [1][1][RTW89_UKRAINE][6] = 32, -+ [1][1][RTW89_MEXICO][6] = 66, -+ [1][1][RTW89_CN][6] = 32, -+ [1][1][RTW89_QATAR][6] = 32, -+ [1][1][RTW89_UK][6] = 32, -+ [1][1][RTW89_FCC][7] = 62, -+ [1][1][RTW89_ETSI][7] = 32, -+ [1][1][RTW89_MKK][7] = 40, -+ [1][1][RTW89_IC][7] = 62, -+ [1][1][RTW89_KCC][7] = 40, -+ [1][1][RTW89_ACMA][7] = 32, -+ [1][1][RTW89_CHILE][7] = 54, -+ [1][1][RTW89_UKRAINE][7] = 32, -+ [1][1][RTW89_MEXICO][7] = 62, -+ [1][1][RTW89_CN][7] = 32, -+ [1][1][RTW89_QATAR][7] = 32, -+ [1][1][RTW89_UK][7] = 32, -+ [1][1][RTW89_FCC][8] = 58, -+ [1][1][RTW89_ETSI][8] = 32, -+ [1][1][RTW89_MKK][8] = 40, -+ [1][1][RTW89_IC][8] = 58, -+ [1][1][RTW89_KCC][8] = 40, -+ [1][1][RTW89_ACMA][8] = 32, -+ [1][1][RTW89_CHILE][8] = 54, -+ [1][1][RTW89_UKRAINE][8] = 32, -+ [1][1][RTW89_MEXICO][8] = 58, -+ [1][1][RTW89_CN][8] = 32, -+ [1][1][RTW89_QATAR][8] = 32, -+ [1][1][RTW89_UK][8] = 32, -+ [1][1][RTW89_FCC][9] = 54, -+ [1][1][RTW89_ETSI][9] = 32, -+ [1][1][RTW89_MKK][9] = 40, -+ [1][1][RTW89_IC][9] = 54, -+ [1][1][RTW89_KCC][9] = 40, -+ [1][1][RTW89_ACMA][9] = 32, -+ [1][1][RTW89_CHILE][9] = 54, -+ [1][1][RTW89_UKRAINE][9] = 32, -+ [1][1][RTW89_MEXICO][9] = 54, -+ [1][1][RTW89_CN][9] = 32, -+ [1][1][RTW89_QATAR][9] = 32, -+ [1][1][RTW89_UK][9] = 32, -+ [1][1][RTW89_FCC][10] = 54, -+ [1][1][RTW89_ETSI][10] = 32, -+ [1][1][RTW89_MKK][10] = 40, -+ [1][1][RTW89_IC][10] = 54, -+ [1][1][RTW89_KCC][10] = 40, -+ [1][1][RTW89_ACMA][10] = 32, -+ [1][1][RTW89_CHILE][10] = 54, -+ [1][1][RTW89_UKRAINE][10] = 32, -+ [1][1][RTW89_MEXICO][10] = 54, -+ [1][1][RTW89_CN][10] = 32, -+ [1][1][RTW89_QATAR][10] = 32, -+ [1][1][RTW89_UK][10] = 32, -+ [1][1][RTW89_FCC][11] = 38, -+ [1][1][RTW89_ETSI][11] = 32, -+ [1][1][RTW89_MKK][11] = 40, -+ [1][1][RTW89_IC][11] = 38, -+ [1][1][RTW89_KCC][11] = 40, -+ [1][1][RTW89_ACMA][11] = 32, -+ [1][1][RTW89_CHILE][11] = 54, -+ [1][1][RTW89_UKRAINE][11] = 32, -+ [1][1][RTW89_MEXICO][11] = 38, -+ [1][1][RTW89_CN][11] = 32, -+ [1][1][RTW89_QATAR][11] = 32, -+ [1][1][RTW89_UK][11] = 32, -+ [1][1][RTW89_FCC][12] = 32, -+ [1][1][RTW89_ETSI][12] = 32, -+ [1][1][RTW89_MKK][12] = 40, -+ [1][1][RTW89_IC][12] = 32, -+ [1][1][RTW89_KCC][12] = 40, -+ [1][1][RTW89_ACMA][12] = 32, -+ [1][1][RTW89_CHILE][12] = 54, -+ [1][1][RTW89_UKRAINE][12] = 32, -+ [1][1][RTW89_MEXICO][12] = 32, -+ [1][1][RTW89_CN][12] = 32, -+ [1][1][RTW89_QATAR][12] = 32, -+ [1][1][RTW89_UK][12] = 32, -+ [1][1][RTW89_FCC][13] = 127, -+ [1][1][RTW89_ETSI][13] = 127, -+ [1][1][RTW89_MKK][13] = 127, -+ [1][1][RTW89_IC][13] = 127, -+ [1][1][RTW89_KCC][13] = 127, -+ [1][1][RTW89_ACMA][13] = 127, -+ [1][1][RTW89_CHILE][13] = 127, -+ [1][1][RTW89_UKRAINE][13] = 127, -+ [1][1][RTW89_MEXICO][13] = 127, -+ [1][1][RTW89_CN][13] = 127, -+ [1][1][RTW89_QATAR][13] = 127, -+ [1][1][RTW89_UK][13] = 127, -+ [2][0][RTW89_FCC][0] = 72, -+ [2][0][RTW89_ETSI][0] = 56, -+ [2][0][RTW89_MKK][0] = 64, -+ [2][0][RTW89_IC][0] = 72, -+ [2][0][RTW89_KCC][0] = 66, -+ [2][0][RTW89_ACMA][0] = 56, -+ [2][0][RTW89_CHILE][0] = 68, -+ [2][0][RTW89_UKRAINE][0] = 56, -+ [2][0][RTW89_MEXICO][0] = 72, -+ [2][0][RTW89_CN][0] = 56, -+ [2][0][RTW89_QATAR][0] = 56, -+ [2][0][RTW89_UK][0] = 56, -+ [2][0][RTW89_FCC][1] = 72, -+ [2][0][RTW89_ETSI][1] = 56, -+ [2][0][RTW89_MKK][1] = 64, -+ [2][0][RTW89_IC][1] = 72, -+ [2][0][RTW89_KCC][1] = 66, -+ [2][0][RTW89_ACMA][1] = 56, -+ [2][0][RTW89_CHILE][1] = 68, -+ [2][0][RTW89_UKRAINE][1] = 56, -+ [2][0][RTW89_MEXICO][1] = 72, -+ [2][0][RTW89_CN][1] = 56, -+ [2][0][RTW89_QATAR][1] = 56, -+ [2][0][RTW89_UK][1] = 56, -+ [2][0][RTW89_FCC][2] = 74, -+ [2][0][RTW89_ETSI][2] = 56, -+ [2][0][RTW89_MKK][2] = 64, -+ [2][0][RTW89_IC][2] = 74, -+ [2][0][RTW89_KCC][2] = 66, -+ [2][0][RTW89_ACMA][2] = 56, -+ [2][0][RTW89_CHILE][2] = 68, -+ [2][0][RTW89_UKRAINE][2] = 56, -+ [2][0][RTW89_MEXICO][2] = 74, -+ [2][0][RTW89_CN][2] = 56, -+ [2][0][RTW89_QATAR][2] = 56, -+ [2][0][RTW89_UK][2] = 56, -+ [2][0][RTW89_FCC][3] = 74, -+ [2][0][RTW89_ETSI][3] = 56, -+ [2][0][RTW89_MKK][3] = 64, -+ [2][0][RTW89_IC][3] = 74, -+ [2][0][RTW89_KCC][3] = 66, -+ [2][0][RTW89_ACMA][3] = 56, -+ [2][0][RTW89_CHILE][3] = 68, -+ [2][0][RTW89_UKRAINE][3] = 56, -+ [2][0][RTW89_MEXICO][3] = 74, -+ [2][0][RTW89_CN][3] = 56, -+ [2][0][RTW89_QATAR][3] = 56, -+ [2][0][RTW89_UK][3] = 56, -+ [2][0][RTW89_FCC][4] = 74, -+ [2][0][RTW89_ETSI][4] = 56, -+ [2][0][RTW89_MKK][4] = 64, -+ [2][0][RTW89_IC][4] = 74, -+ [2][0][RTW89_KCC][4] = 66, -+ [2][0][RTW89_ACMA][4] = 56, -+ [2][0][RTW89_CHILE][4] = 68, -+ [2][0][RTW89_UKRAINE][4] = 56, -+ [2][0][RTW89_MEXICO][4] = 74, -+ [2][0][RTW89_CN][4] = 56, -+ [2][0][RTW89_QATAR][4] = 56, -+ [2][0][RTW89_UK][4] = 56, -+ [2][0][RTW89_FCC][5] = 84, -+ [2][0][RTW89_ETSI][5] = 56, -+ [2][0][RTW89_MKK][5] = 64, -+ [2][0][RTW89_IC][5] = 84, -+ [2][0][RTW89_KCC][5] = 66, -+ [2][0][RTW89_ACMA][5] = 56, -+ [2][0][RTW89_CHILE][5] = 70, -+ [2][0][RTW89_UKRAINE][5] = 56, -+ [2][0][RTW89_MEXICO][5] = 84, -+ [2][0][RTW89_CN][5] = 56, -+ [2][0][RTW89_QATAR][5] = 56, -+ [2][0][RTW89_UK][5] = 56, -+ [2][0][RTW89_FCC][6] = 70, -+ [2][0][RTW89_ETSI][6] = 56, -+ [2][0][RTW89_MKK][6] = 64, -+ [2][0][RTW89_IC][6] = 70, -+ [2][0][RTW89_KCC][6] = 66, -+ [2][0][RTW89_ACMA][6] = 56, -+ [2][0][RTW89_CHILE][6] = 68, -+ [2][0][RTW89_UKRAINE][6] = 56, -+ [2][0][RTW89_MEXICO][6] = 70, -+ [2][0][RTW89_CN][6] = 56, -+ [2][0][RTW89_QATAR][6] = 56, -+ [2][0][RTW89_UK][6] = 56, -+ [2][0][RTW89_FCC][7] = 70, -+ [2][0][RTW89_ETSI][7] = 56, -+ [2][0][RTW89_MKK][7] = 64, -+ [2][0][RTW89_IC][7] = 70, -+ [2][0][RTW89_KCC][7] = 66, -+ [2][0][RTW89_ACMA][7] = 56, -+ [2][0][RTW89_CHILE][7] = 68, -+ [2][0][RTW89_UKRAINE][7] = 56, -+ [2][0][RTW89_MEXICO][7] = 70, -+ [2][0][RTW89_CN][7] = 56, -+ [2][0][RTW89_QATAR][7] = 56, -+ [2][0][RTW89_UK][7] = 56, -+ [2][0][RTW89_FCC][8] = 70, -+ [2][0][RTW89_ETSI][8] = 56, -+ [2][0][RTW89_MKK][8] = 64, -+ [2][0][RTW89_IC][8] = 70, -+ [2][0][RTW89_KCC][8] = 66, -+ [2][0][RTW89_ACMA][8] = 56, -+ [2][0][RTW89_CHILE][8] = 68, -+ [2][0][RTW89_UKRAINE][8] = 56, -+ [2][0][RTW89_MEXICO][8] = 70, -+ [2][0][RTW89_CN][8] = 56, -+ [2][0][RTW89_QATAR][8] = 56, -+ [2][0][RTW89_UK][8] = 56, -+ [2][0][RTW89_FCC][9] = 68, -+ [2][0][RTW89_ETSI][9] = 56, -+ [2][0][RTW89_MKK][9] = 64, -+ [2][0][RTW89_IC][9] = 68, -+ [2][0][RTW89_KCC][9] = 66, -+ [2][0][RTW89_ACMA][9] = 56, -+ [2][0][RTW89_CHILE][9] = 68, -+ [2][0][RTW89_UKRAINE][9] = 56, -+ [2][0][RTW89_MEXICO][9] = 68, -+ [2][0][RTW89_CN][9] = 56, -+ [2][0][RTW89_QATAR][9] = 56, -+ [2][0][RTW89_UK][9] = 56, -+ [2][0][RTW89_FCC][10] = 68, -+ [2][0][RTW89_ETSI][10] = 56, -+ [2][0][RTW89_MKK][10] = 64, -+ [2][0][RTW89_IC][10] = 68, -+ [2][0][RTW89_KCC][10] = 66, -+ [2][0][RTW89_ACMA][10] = 56, -+ [2][0][RTW89_CHILE][10] = 68, -+ [2][0][RTW89_UKRAINE][10] = 56, -+ [2][0][RTW89_MEXICO][10] = 68, -+ [2][0][RTW89_CN][10] = 56, -+ [2][0][RTW89_QATAR][10] = 56, -+ [2][0][RTW89_UK][10] = 56, -+ [2][0][RTW89_FCC][11] = 50, -+ [2][0][RTW89_ETSI][11] = 56, -+ [2][0][RTW89_MKK][11] = 64, -+ [2][0][RTW89_IC][11] = 50, -+ [2][0][RTW89_KCC][11] = 66, -+ [2][0][RTW89_ACMA][11] = 56, -+ [2][0][RTW89_CHILE][11] = 68, -+ [2][0][RTW89_UKRAINE][11] = 56, -+ [2][0][RTW89_MEXICO][11] = 50, -+ [2][0][RTW89_CN][11] = 56, -+ [2][0][RTW89_QATAR][11] = 56, -+ [2][0][RTW89_UK][11] = 56, -+ [2][0][RTW89_FCC][12] = 46, -+ [2][0][RTW89_ETSI][12] = 56, -+ [2][0][RTW89_MKK][12] = 64, -+ [2][0][RTW89_IC][12] = 46, -+ [2][0][RTW89_KCC][12] = 66, -+ [2][0][RTW89_ACMA][12] = 56, -+ [2][0][RTW89_CHILE][12] = 68, -+ [2][0][RTW89_UKRAINE][12] = 56, -+ [2][0][RTW89_MEXICO][12] = 46, -+ [2][0][RTW89_CN][12] = 56, -+ [2][0][RTW89_QATAR][12] = 56, -+ [2][0][RTW89_UK][12] = 56, -+ [2][0][RTW89_FCC][13] = 127, -+ [2][0][RTW89_ETSI][13] = 127, -+ [2][0][RTW89_MKK][13] = 127, -+ [2][0][RTW89_IC][13] = 127, -+ [2][0][RTW89_KCC][13] = 127, -+ [2][0][RTW89_ACMA][13] = 127, -+ [2][0][RTW89_CHILE][13] = 127, -+ [2][0][RTW89_UKRAINE][13] = 127, -+ [2][0][RTW89_MEXICO][13] = 127, -+ [2][0][RTW89_CN][13] = 127, -+ [2][0][RTW89_QATAR][13] = 127, -+ [2][0][RTW89_UK][13] = 127, -+ [2][1][RTW89_FCC][0] = 54, -+ [2][1][RTW89_ETSI][0] = 44, -+ [2][1][RTW89_MKK][0] = 52, -+ [2][1][RTW89_IC][0] = 54, -+ [2][1][RTW89_KCC][0] = 54, -+ [2][1][RTW89_ACMA][0] = 44, -+ [2][1][RTW89_CHILE][0] = 58, -+ [2][1][RTW89_UKRAINE][0] = 44, -+ [2][1][RTW89_MEXICO][0] = 54, -+ [2][1][RTW89_CN][0] = 44, -+ [2][1][RTW89_QATAR][0] = 44, -+ [2][1][RTW89_UK][0] = 44, -+ [2][1][RTW89_FCC][1] = 54, -+ [2][1][RTW89_ETSI][1] = 44, -+ [2][1][RTW89_MKK][1] = 52, -+ [2][1][RTW89_IC][1] = 54, -+ [2][1][RTW89_KCC][1] = 54, -+ [2][1][RTW89_ACMA][1] = 44, -+ [2][1][RTW89_CHILE][1] = 56, -+ [2][1][RTW89_UKRAINE][1] = 44, -+ [2][1][RTW89_MEXICO][1] = 54, -+ [2][1][RTW89_CN][1] = 44, -+ [2][1][RTW89_QATAR][1] = 44, -+ [2][1][RTW89_UK][1] = 44, -+ [2][1][RTW89_FCC][2] = 58, -+ [2][1][RTW89_ETSI][2] = 44, -+ [2][1][RTW89_MKK][2] = 52, -+ [2][1][RTW89_IC][2] = 58, -+ [2][1][RTW89_KCC][2] = 54, -+ [2][1][RTW89_ACMA][2] = 44, -+ [2][1][RTW89_CHILE][2] = 56, -+ [2][1][RTW89_UKRAINE][2] = 44, -+ [2][1][RTW89_MEXICO][2] = 58, -+ [2][1][RTW89_CN][2] = 44, -+ [2][1][RTW89_QATAR][2] = 44, -+ [2][1][RTW89_UK][2] = 44, -+ [2][1][RTW89_FCC][3] = 62, -+ [2][1][RTW89_ETSI][3] = 44, -+ [2][1][RTW89_MKK][3] = 52, -+ [2][1][RTW89_IC][3] = 62, -+ [2][1][RTW89_KCC][3] = 54, -+ [2][1][RTW89_ACMA][3] = 44, -+ [2][1][RTW89_CHILE][3] = 56, -+ [2][1][RTW89_UKRAINE][3] = 44, -+ [2][1][RTW89_MEXICO][3] = 62, -+ [2][1][RTW89_CN][3] = 44, -+ [2][1][RTW89_QATAR][3] = 44, -+ [2][1][RTW89_UK][3] = 44, -+ [2][1][RTW89_FCC][4] = 64, -+ [2][1][RTW89_ETSI][4] = 44, -+ [2][1][RTW89_MKK][4] = 52, -+ [2][1][RTW89_IC][4] = 64, -+ [2][1][RTW89_KCC][4] = 52, -+ [2][1][RTW89_ACMA][4] = 44, -+ [2][1][RTW89_CHILE][4] = 56, -+ [2][1][RTW89_UKRAINE][4] = 44, -+ [2][1][RTW89_MEXICO][4] = 64, -+ [2][1][RTW89_CN][4] = 44, -+ [2][1][RTW89_QATAR][4] = 44, -+ [2][1][RTW89_UK][4] = 44, -+ [2][1][RTW89_FCC][5] = 80, -+ [2][1][RTW89_ETSI][5] = 44, -+ [2][1][RTW89_MKK][5] = 52, -+ [2][1][RTW89_IC][5] = 80, -+ [2][1][RTW89_KCC][5] = 52, -+ [2][1][RTW89_ACMA][5] = 44, -+ [2][1][RTW89_CHILE][5] = 56, -+ [2][1][RTW89_UKRAINE][5] = 44, -+ [2][1][RTW89_MEXICO][5] = 80, -+ [2][1][RTW89_CN][5] = 44, -+ [2][1][RTW89_QATAR][5] = 44, -+ [2][1][RTW89_UK][5] = 44, -+ [2][1][RTW89_FCC][6] = 62, -+ [2][1][RTW89_ETSI][6] = 44, -+ [2][1][RTW89_MKK][6] = 52, -+ [2][1][RTW89_IC][6] = 62, -+ [2][1][RTW89_KCC][6] = 52, -+ [2][1][RTW89_ACMA][6] = 44, -+ [2][1][RTW89_CHILE][6] = 56, -+ [2][1][RTW89_UKRAINE][6] = 44, -+ [2][1][RTW89_MEXICO][6] = 62, -+ [2][1][RTW89_CN][6] = 44, -+ [2][1][RTW89_QATAR][6] = 44, -+ [2][1][RTW89_UK][6] = 44, -+ [2][1][RTW89_FCC][7] = 62, -+ [2][1][RTW89_ETSI][7] = 44, -+ [2][1][RTW89_MKK][7] = 52, -+ [2][1][RTW89_IC][7] = 62, -+ [2][1][RTW89_KCC][7] = 52, -+ [2][1][RTW89_ACMA][7] = 44, -+ [2][1][RTW89_CHILE][7] = 56, -+ [2][1][RTW89_UKRAINE][7] = 44, -+ [2][1][RTW89_MEXICO][7] = 62, -+ [2][1][RTW89_CN][7] = 44, -+ [2][1][RTW89_QATAR][7] = 44, -+ [2][1][RTW89_UK][7] = 44, -+ [2][1][RTW89_FCC][8] = 58, -+ [2][1][RTW89_ETSI][8] = 44, -+ [2][1][RTW89_MKK][8] = 52, -+ [2][1][RTW89_IC][8] = 58, -+ [2][1][RTW89_KCC][8] = 52, -+ [2][1][RTW89_ACMA][8] = 44, -+ [2][1][RTW89_CHILE][8] = 56, -+ [2][1][RTW89_UKRAINE][8] = 44, -+ [2][1][RTW89_MEXICO][8] = 58, -+ [2][1][RTW89_CN][8] = 44, -+ [2][1][RTW89_QATAR][8] = 44, -+ [2][1][RTW89_UK][8] = 44, -+ [2][1][RTW89_FCC][9] = 54, -+ [2][1][RTW89_ETSI][9] = 44, -+ [2][1][RTW89_MKK][9] = 52, -+ [2][1][RTW89_IC][9] = 54, -+ [2][1][RTW89_KCC][9] = 54, -+ [2][1][RTW89_ACMA][9] = 44, -+ [2][1][RTW89_CHILE][9] = 56, -+ [2][1][RTW89_UKRAINE][9] = 44, -+ [2][1][RTW89_MEXICO][9] = 54, -+ [2][1][RTW89_CN][9] = 44, -+ [2][1][RTW89_QATAR][9] = 44, -+ [2][1][RTW89_UK][9] = 44, -+ [2][1][RTW89_FCC][10] = 54, -+ [2][1][RTW89_ETSI][10] = 44, -+ [2][1][RTW89_MKK][10] = 52, -+ [2][1][RTW89_IC][10] = 54, -+ [2][1][RTW89_KCC][10] = 54, -+ [2][1][RTW89_ACMA][10] = 44, -+ [2][1][RTW89_CHILE][10] = 56, -+ [2][1][RTW89_UKRAINE][10] = 44, -+ [2][1][RTW89_MEXICO][10] = 54, -+ [2][1][RTW89_CN][10] = 44, -+ [2][1][RTW89_QATAR][10] = 44, -+ [2][1][RTW89_UK][10] = 44, -+ [2][1][RTW89_FCC][11] = 38, -+ [2][1][RTW89_ETSI][11] = 44, -+ [2][1][RTW89_MKK][11] = 52, -+ [2][1][RTW89_IC][11] = 38, -+ [2][1][RTW89_KCC][11] = 54, -+ [2][1][RTW89_ACMA][11] = 44, -+ [2][1][RTW89_CHILE][11] = 56, -+ [2][1][RTW89_UKRAINE][11] = 44, -+ [2][1][RTW89_MEXICO][11] = 38, -+ [2][1][RTW89_CN][11] = 44, -+ [2][1][RTW89_QATAR][11] = 44, -+ [2][1][RTW89_UK][11] = 44, -+ [2][1][RTW89_FCC][12] = 34, -+ [2][1][RTW89_ETSI][12] = 42, -+ [2][1][RTW89_MKK][12] = 52, -+ [2][1][RTW89_IC][12] = 34, -+ [2][1][RTW89_KCC][12] = 54, -+ [2][1][RTW89_ACMA][12] = 42, -+ [2][1][RTW89_CHILE][12] = 56, -+ [2][1][RTW89_UKRAINE][12] = 42, -+ [2][1][RTW89_MEXICO][12] = 34, -+ [2][1][RTW89_CN][12] = 42, -+ [2][1][RTW89_QATAR][12] = 42, -+ [2][1][RTW89_UK][12] = 42, -+ [2][1][RTW89_FCC][13] = 127, -+ [2][1][RTW89_ETSI][13] = 127, -+ [2][1][RTW89_MKK][13] = 127, -+ [2][1][RTW89_IC][13] = 127, -+ [2][1][RTW89_KCC][13] = 127, -+ [2][1][RTW89_ACMA][13] = 127, -+ [2][1][RTW89_CHILE][13] = 127, -+ [2][1][RTW89_UKRAINE][13] = 127, -+ [2][1][RTW89_MEXICO][13] = 127, -+ [2][1][RTW89_CN][13] = 127, -+ [2][1][RTW89_QATAR][13] = 127, -+ [2][1][RTW89_UK][13] = 127, -+}; -+ -+const s8 rtw89_8852b_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = { -+ [0][0][RTW89_WW][0] = 24, -+ [0][0][RTW89_WW][2] = 24, -+ [0][0][RTW89_WW][4] = 24, -+ [0][0][RTW89_WW][6] = 12, -+ [0][0][RTW89_WW][8] = 24, -+ [0][0][RTW89_WW][10] = 24, -+ [0][0][RTW89_WW][12] = 24, -+ [0][0][RTW89_WW][14] = 24, -+ [0][0][RTW89_WW][15] = 24, -+ [0][0][RTW89_WW][17] = 24, -+ [0][0][RTW89_WW][19] = 24, -+ [0][0][RTW89_WW][21] = 24, -+ [0][0][RTW89_WW][23] = 24, -+ [0][0][RTW89_WW][25] = 24, -+ [0][0][RTW89_WW][27] = 24, -+ [0][0][RTW89_WW][29] = 24, -+ [0][0][RTW89_WW][31] = 24, -+ [0][0][RTW89_WW][33] = 24, -+ [0][0][RTW89_WW][35] = 24, -+ [0][0][RTW89_WW][37] = 44, -+ [0][0][RTW89_WW][38] = 26, -+ [0][0][RTW89_WW][40] = 26, -+ [0][0][RTW89_WW][42] = 26, -+ [0][0][RTW89_WW][44] = 26, -+ [0][0][RTW89_WW][46] = 26, -+ [0][0][RTW89_WW][48] = 32, -+ [0][0][RTW89_WW][50] = 32, -+ [0][0][RTW89_WW][52] = 32, -+ [0][1][RTW89_WW][0] = 0, -+ [0][1][RTW89_WW][2] = 4, -+ [0][1][RTW89_WW][4] = 0, -+ [0][1][RTW89_WW][6] = 0, -+ [0][1][RTW89_WW][8] = 12, -+ [0][1][RTW89_WW][10] = 12, -+ [0][1][RTW89_WW][12] = 12, -+ [0][1][RTW89_WW][14] = 12, -+ [0][1][RTW89_WW][15] = 12, -+ [0][1][RTW89_WW][17] = 12, -+ [0][1][RTW89_WW][19] = 12, -+ [0][1][RTW89_WW][21] = 12, -+ [0][1][RTW89_WW][23] = 12, -+ [0][1][RTW89_WW][25] = 12, -+ [0][1][RTW89_WW][27] = 12, -+ [0][1][RTW89_WW][29] = 12, -+ [0][1][RTW89_WW][31] = 12, -+ [0][1][RTW89_WW][33] = 12, -+ [0][1][RTW89_WW][35] = 12, -+ [0][1][RTW89_WW][37] = 30, -+ [0][1][RTW89_WW][38] = 14, -+ [0][1][RTW89_WW][40] = 14, -+ [0][1][RTW89_WW][42] = 14, -+ [0][1][RTW89_WW][44] = 14, -+ [0][1][RTW89_WW][46] = 14, -+ [0][1][RTW89_WW][48] = 20, -+ [0][1][RTW89_WW][50] = 20, -+ [0][1][RTW89_WW][52] = 20, -+ [1][0][RTW89_WW][0] = 34, -+ [1][0][RTW89_WW][2] = 34, -+ [1][0][RTW89_WW][4] = 34, -+ [1][0][RTW89_WW][6] = 26, -+ [1][0][RTW89_WW][8] = 34, -+ [1][0][RTW89_WW][10] = 34, -+ [1][0][RTW89_WW][12] = 34, -+ [1][0][RTW89_WW][14] = 34, -+ [1][0][RTW89_WW][15] = 34, -+ [1][0][RTW89_WW][17] = 34, -+ [1][0][RTW89_WW][19] = 34, -+ [1][0][RTW89_WW][21] = 34, -+ [1][0][RTW89_WW][23] = 34, -+ [1][0][RTW89_WW][25] = 34, -+ [1][0][RTW89_WW][27] = 34, -+ [1][0][RTW89_WW][29] = 34, -+ [1][0][RTW89_WW][31] = 34, -+ [1][0][RTW89_WW][33] = 34, -+ [1][0][RTW89_WW][35] = 34, -+ [1][0][RTW89_WW][37] = 52, -+ [1][0][RTW89_WW][38] = 28, -+ [1][0][RTW89_WW][40] = 28, -+ [1][0][RTW89_WW][42] = 28, -+ [1][0][RTW89_WW][44] = 28, -+ [1][0][RTW89_WW][46] = 28, -+ [1][0][RTW89_WW][48] = 44, -+ [1][0][RTW89_WW][50] = 44, -+ [1][0][RTW89_WW][52] = 44, -+ [1][1][RTW89_WW][0] = 10, -+ [1][1][RTW89_WW][2] = 14, -+ [1][1][RTW89_WW][4] = 10, -+ [1][1][RTW89_WW][6] = 10, -+ [1][1][RTW89_WW][8] = 20, -+ [1][1][RTW89_WW][10] = 20, -+ [1][1][RTW89_WW][12] = 22, -+ [1][1][RTW89_WW][14] = 22, -+ [1][1][RTW89_WW][15] = 22, -+ [1][1][RTW89_WW][17] = 22, -+ [1][1][RTW89_WW][19] = 22, -+ [1][1][RTW89_WW][21] = 22, -+ [1][1][RTW89_WW][23] = 22, -+ [1][1][RTW89_WW][25] = 22, -+ [1][1][RTW89_WW][27] = 22, -+ [1][1][RTW89_WW][29] = 22, -+ [1][1][RTW89_WW][31] = 22, -+ [1][1][RTW89_WW][33] = 22, -+ [1][1][RTW89_WW][35] = 22, -+ [1][1][RTW89_WW][37] = 38, -+ [1][1][RTW89_WW][38] = 16, -+ [1][1][RTW89_WW][40] = 16, -+ [1][1][RTW89_WW][42] = 16, -+ [1][1][RTW89_WW][44] = 16, -+ [1][1][RTW89_WW][46] = 16, -+ [1][1][RTW89_WW][48] = 32, -+ [1][1][RTW89_WW][50] = 32, -+ [1][1][RTW89_WW][52] = 32, -+ [2][0][RTW89_WW][0] = 44, -+ [2][0][RTW89_WW][2] = 44, -+ [2][0][RTW89_WW][4] = 44, -+ [2][0][RTW89_WW][6] = 38, -+ [2][0][RTW89_WW][8] = 48, -+ [2][0][RTW89_WW][10] = 48, -+ [2][0][RTW89_WW][12] = 46, -+ [2][0][RTW89_WW][14] = 46, -+ [2][0][RTW89_WW][15] = 48, -+ [2][0][RTW89_WW][17] = 48, -+ [2][0][RTW89_WW][19] = 48, -+ [2][0][RTW89_WW][21] = 48, -+ [2][0][RTW89_WW][23] = 48, -+ [2][0][RTW89_WW][25] = 48, -+ [2][0][RTW89_WW][27] = 48, -+ [2][0][RTW89_WW][29] = 48, -+ [2][0][RTW89_WW][31] = 48, -+ [2][0][RTW89_WW][33] = 48, -+ [2][0][RTW89_WW][35] = 48, -+ [2][0][RTW89_WW][37] = 64, -+ [2][0][RTW89_WW][38] = 28, -+ [2][0][RTW89_WW][40] = 28, -+ [2][0][RTW89_WW][42] = 28, -+ [2][0][RTW89_WW][44] = 28, -+ [2][0][RTW89_WW][46] = 28, -+ [2][0][RTW89_WW][48] = 56, -+ [2][0][RTW89_WW][50] = 56, -+ [2][0][RTW89_WW][52] = 56, -+ [2][1][RTW89_WW][0] = 20, -+ [2][1][RTW89_WW][2] = 18, -+ [2][1][RTW89_WW][4] = 22, -+ [2][1][RTW89_WW][6] = 22, -+ [2][1][RTW89_WW][8] = 34, -+ [2][1][RTW89_WW][10] = 34, -+ [2][1][RTW89_WW][12] = 36, -+ [2][1][RTW89_WW][14] = 36, -+ [2][1][RTW89_WW][15] = 36, -+ [2][1][RTW89_WW][17] = 36, -+ [2][1][RTW89_WW][19] = 36, -+ [2][1][RTW89_WW][21] = 36, -+ [2][1][RTW89_WW][23] = 36, -+ [2][1][RTW89_WW][25] = 36, -+ [2][1][RTW89_WW][27] = 36, -+ [2][1][RTW89_WW][29] = 36, -+ [2][1][RTW89_WW][31] = 36, -+ [2][1][RTW89_WW][33] = 36, -+ [2][1][RTW89_WW][35] = 36, -+ [2][1][RTW89_WW][37] = 48, -+ [2][1][RTW89_WW][38] = 16, -+ [2][1][RTW89_WW][40] = 16, -+ [2][1][RTW89_WW][42] = 16, -+ [2][1][RTW89_WW][44] = 16, -+ [2][1][RTW89_WW][46] = 16, -+ [2][1][RTW89_WW][48] = 44, -+ [2][1][RTW89_WW][50] = 44, -+ [2][1][RTW89_WW][52] = 44, -+ [0][0][RTW89_FCC][0] = 52, -+ [0][0][RTW89_ETSI][0] = 24, -+ [0][0][RTW89_MKK][0] = 26, -+ [0][0][RTW89_IC][0] = 24, -+ [0][0][RTW89_KCC][0] = 44, -+ [0][0][RTW89_ACMA][0] = 24, -+ [0][0][RTW89_CHILE][0] = 40, -+ [0][0][RTW89_UKRAINE][0] = 24, -+ [0][0][RTW89_MEXICO][0] = 52, -+ [0][0][RTW89_CN][0] = 24, -+ [0][0][RTW89_QATAR][0] = 24, -+ [0][0][RTW89_UK][0] = 24, -+ [0][0][RTW89_FCC][2] = 52, -+ [0][0][RTW89_ETSI][2] = 24, -+ [0][0][RTW89_MKK][2] = 26, -+ [0][0][RTW89_IC][2] = 24, -+ [0][0][RTW89_KCC][2] = 44, -+ [0][0][RTW89_ACMA][2] = 24, -+ [0][0][RTW89_CHILE][2] = 38, -+ [0][0][RTW89_UKRAINE][2] = 24, -+ [0][0][RTW89_MEXICO][2] = 52, -+ [0][0][RTW89_CN][2] = 24, -+ [0][0][RTW89_QATAR][2] = 24, -+ [0][0][RTW89_UK][2] = 24, -+ [0][0][RTW89_FCC][4] = 52, -+ [0][0][RTW89_ETSI][4] = 24, -+ [0][0][RTW89_MKK][4] = 26, -+ [0][0][RTW89_IC][4] = 24, -+ [0][0][RTW89_KCC][4] = 44, -+ [0][0][RTW89_ACMA][4] = 24, -+ [0][0][RTW89_CHILE][4] = 38, -+ [0][0][RTW89_UKRAINE][4] = 24, -+ [0][0][RTW89_MEXICO][4] = 52, -+ [0][0][RTW89_CN][4] = 24, -+ [0][0][RTW89_QATAR][4] = 24, -+ [0][0][RTW89_UK][4] = 24, -+ [0][0][RTW89_FCC][6] = 52, -+ [0][0][RTW89_ETSI][6] = 24, -+ [0][0][RTW89_MKK][6] = 26, -+ [0][0][RTW89_IC][6] = 24, -+ [0][0][RTW89_KCC][6] = 12, -+ [0][0][RTW89_ACMA][6] = 24, -+ [0][0][RTW89_CHILE][6] = 40, -+ [0][0][RTW89_UKRAINE][6] = 24, -+ [0][0][RTW89_MEXICO][6] = 52, -+ [0][0][RTW89_CN][6] = 24, -+ [0][0][RTW89_QATAR][6] = 24, -+ [0][0][RTW89_UK][6] = 24, -+ [0][0][RTW89_FCC][8] = 52, -+ [0][0][RTW89_ETSI][8] = 24, -+ [0][0][RTW89_MKK][8] = 26, -+ [0][0][RTW89_IC][8] = 52, -+ [0][0][RTW89_KCC][8] = 46, -+ [0][0][RTW89_ACMA][8] = 24, -+ [0][0][RTW89_CHILE][8] = 64, -+ [0][0][RTW89_UKRAINE][8] = 24, -+ [0][0][RTW89_MEXICO][8] = 52, -+ [0][0][RTW89_CN][8] = 24, -+ [0][0][RTW89_QATAR][8] = 24, -+ [0][0][RTW89_UK][8] = 24, -+ [0][0][RTW89_FCC][10] = 52, -+ [0][0][RTW89_ETSI][10] = 24, -+ [0][0][RTW89_MKK][10] = 26, -+ [0][0][RTW89_IC][10] = 52, -+ [0][0][RTW89_KCC][10] = 46, -+ [0][0][RTW89_ACMA][10] = 24, -+ [0][0][RTW89_CHILE][10] = 64, -+ [0][0][RTW89_UKRAINE][10] = 24, -+ [0][0][RTW89_MEXICO][10] = 52, -+ [0][0][RTW89_CN][10] = 24, -+ [0][0][RTW89_QATAR][10] = 24, -+ [0][0][RTW89_UK][10] = 24, -+ [0][0][RTW89_FCC][12] = 52, -+ [0][0][RTW89_ETSI][12] = 24, -+ [0][0][RTW89_MKK][12] = 24, -+ [0][0][RTW89_IC][12] = 52, -+ [0][0][RTW89_KCC][12] = 42, -+ [0][0][RTW89_ACMA][12] = 24, -+ [0][0][RTW89_CHILE][12] = 64, -+ [0][0][RTW89_UKRAINE][12] = 24, -+ [0][0][RTW89_MEXICO][12] = 52, -+ [0][0][RTW89_CN][12] = 24, -+ [0][0][RTW89_QATAR][12] = 24, -+ [0][0][RTW89_UK][12] = 24, -+ [0][0][RTW89_FCC][14] = 52, -+ [0][0][RTW89_ETSI][14] = 24, -+ [0][0][RTW89_MKK][14] = 24, -+ [0][0][RTW89_IC][14] = 52, -+ [0][0][RTW89_KCC][14] = 42, -+ [0][0][RTW89_ACMA][14] = 24, -+ [0][0][RTW89_CHILE][14] = 64, -+ [0][0][RTW89_UKRAINE][14] = 24, -+ [0][0][RTW89_MEXICO][14] = 52, -+ [0][0][RTW89_CN][14] = 24, -+ [0][0][RTW89_QATAR][14] = 24, -+ [0][0][RTW89_UK][14] = 24, -+ [0][0][RTW89_FCC][15] = 52, -+ [0][0][RTW89_ETSI][15] = 24, -+ [0][0][RTW89_MKK][15] = 46, -+ [0][0][RTW89_IC][15] = 52, -+ [0][0][RTW89_KCC][15] = 44, -+ [0][0][RTW89_ACMA][15] = 24, -+ [0][0][RTW89_CHILE][15] = 60, -+ [0][0][RTW89_UKRAINE][15] = 24, -+ [0][0][RTW89_MEXICO][15] = 52, -+ [0][0][RTW89_CN][15] = 127, -+ [0][0][RTW89_QATAR][15] = 24, -+ [0][0][RTW89_UK][15] = 24, -+ [0][0][RTW89_FCC][17] = 52, -+ [0][0][RTW89_ETSI][17] = 24, -+ [0][0][RTW89_MKK][17] = 48, -+ [0][0][RTW89_IC][17] = 52, -+ [0][0][RTW89_KCC][17] = 44, -+ [0][0][RTW89_ACMA][17] = 24, -+ [0][0][RTW89_CHILE][17] = 60, -+ [0][0][RTW89_UKRAINE][17] = 24, -+ [0][0][RTW89_MEXICO][17] = 52, -+ [0][0][RTW89_CN][17] = 127, -+ [0][0][RTW89_QATAR][17] = 24, -+ [0][0][RTW89_UK][17] = 24, -+ [0][0][RTW89_FCC][19] = 52, -+ [0][0][RTW89_ETSI][19] = 24, -+ [0][0][RTW89_MKK][19] = 48, -+ [0][0][RTW89_IC][19] = 52, -+ [0][0][RTW89_KCC][19] = 44, -+ [0][0][RTW89_ACMA][19] = 24, -+ [0][0][RTW89_CHILE][19] = 60, -+ [0][0][RTW89_UKRAINE][19] = 24, -+ [0][0][RTW89_MEXICO][19] = 52, -+ [0][0][RTW89_CN][19] = 127, -+ [0][0][RTW89_QATAR][19] = 24, -+ [0][0][RTW89_UK][19] = 24, -+ [0][0][RTW89_FCC][21] = 52, -+ [0][0][RTW89_ETSI][21] = 24, -+ [0][0][RTW89_MKK][21] = 48, -+ [0][0][RTW89_IC][21] = 52, -+ [0][0][RTW89_KCC][21] = 44, -+ [0][0][RTW89_ACMA][21] = 24, -+ [0][0][RTW89_CHILE][21] = 62, -+ [0][0][RTW89_UKRAINE][21] = 24, -+ [0][0][RTW89_MEXICO][21] = 52, -+ [0][0][RTW89_CN][21] = 127, -+ [0][0][RTW89_QATAR][21] = 24, -+ [0][0][RTW89_UK][21] = 24, -+ [0][0][RTW89_FCC][23] = 52, -+ [0][0][RTW89_ETSI][23] = 24, -+ [0][0][RTW89_MKK][23] = 48, -+ [0][0][RTW89_IC][23] = 52, -+ [0][0][RTW89_KCC][23] = 44, -+ [0][0][RTW89_ACMA][23] = 24, -+ [0][0][RTW89_CHILE][23] = 62, -+ [0][0][RTW89_UKRAINE][23] = 24, -+ [0][0][RTW89_MEXICO][23] = 52, -+ [0][0][RTW89_CN][23] = 127, -+ [0][0][RTW89_QATAR][23] = 24, -+ [0][0][RTW89_UK][23] = 24, -+ [0][0][RTW89_FCC][25] = 52, -+ [0][0][RTW89_ETSI][25] = 24, -+ [0][0][RTW89_MKK][25] = 48, -+ [0][0][RTW89_IC][25] = 127, -+ [0][0][RTW89_KCC][25] = 44, -+ [0][0][RTW89_ACMA][25] = 127, -+ [0][0][RTW89_CHILE][25] = 62, -+ [0][0][RTW89_UKRAINE][25] = 24, -+ [0][0][RTW89_MEXICO][25] = 52, -+ [0][0][RTW89_CN][25] = 127, -+ [0][0][RTW89_QATAR][25] = 24, -+ [0][0][RTW89_UK][25] = 24, -+ [0][0][RTW89_FCC][27] = 52, -+ [0][0][RTW89_ETSI][27] = 24, -+ [0][0][RTW89_MKK][27] = 48, -+ [0][0][RTW89_IC][27] = 127, -+ [0][0][RTW89_KCC][27] = 44, -+ [0][0][RTW89_ACMA][27] = 127, -+ [0][0][RTW89_CHILE][27] = 62, -+ [0][0][RTW89_UKRAINE][27] = 24, -+ [0][0][RTW89_MEXICO][27] = 52, -+ [0][0][RTW89_CN][27] = 127, -+ [0][0][RTW89_QATAR][27] = 24, -+ [0][0][RTW89_UK][27] = 24, -+ [0][0][RTW89_FCC][29] = 52, -+ [0][0][RTW89_ETSI][29] = 24, -+ [0][0][RTW89_MKK][29] = 48, -+ [0][0][RTW89_IC][29] = 127, -+ [0][0][RTW89_KCC][29] = 44, -+ [0][0][RTW89_ACMA][29] = 127, -+ [0][0][RTW89_CHILE][29] = 60, -+ [0][0][RTW89_UKRAINE][29] = 24, -+ [0][0][RTW89_MEXICO][29] = 52, -+ [0][0][RTW89_CN][29] = 127, -+ [0][0][RTW89_QATAR][29] = 24, -+ [0][0][RTW89_UK][29] = 24, -+ [0][0][RTW89_FCC][31] = 52, -+ [0][0][RTW89_ETSI][31] = 24, -+ [0][0][RTW89_MKK][31] = 48, -+ [0][0][RTW89_IC][31] = 52, -+ [0][0][RTW89_KCC][31] = 44, -+ [0][0][RTW89_ACMA][31] = 24, -+ [0][0][RTW89_CHILE][31] = 60, -+ [0][0][RTW89_UKRAINE][31] = 24, -+ [0][0][RTW89_MEXICO][31] = 52, -+ [0][0][RTW89_CN][31] = 127, -+ [0][0][RTW89_QATAR][31] = 24, -+ [0][0][RTW89_UK][31] = 24, -+ [0][0][RTW89_FCC][33] = 52, -+ [0][0][RTW89_ETSI][33] = 24, -+ [0][0][RTW89_MKK][33] = 48, -+ [0][0][RTW89_IC][33] = 52, -+ [0][0][RTW89_KCC][33] = 44, -+ [0][0][RTW89_ACMA][33] = 24, -+ [0][0][RTW89_CHILE][33] = 60, -+ [0][0][RTW89_UKRAINE][33] = 24, -+ [0][0][RTW89_MEXICO][33] = 52, -+ [0][0][RTW89_CN][33] = 127, -+ [0][0][RTW89_QATAR][33] = 24, -+ [0][0][RTW89_UK][33] = 24, -+ [0][0][RTW89_FCC][35] = 52, -+ [0][0][RTW89_ETSI][35] = 24, -+ [0][0][RTW89_MKK][35] = 48, -+ [0][0][RTW89_IC][35] = 52, -+ [0][0][RTW89_KCC][35] = 44, -+ [0][0][RTW89_ACMA][35] = 24, -+ [0][0][RTW89_CHILE][35] = 60, -+ [0][0][RTW89_UKRAINE][35] = 24, -+ [0][0][RTW89_MEXICO][35] = 52, -+ [0][0][RTW89_CN][35] = 127, -+ [0][0][RTW89_QATAR][35] = 24, -+ [0][0][RTW89_UK][35] = 24, -+ [0][0][RTW89_FCC][37] = 52, -+ [0][0][RTW89_ETSI][37] = 127, -+ [0][0][RTW89_MKK][37] = 44, -+ [0][0][RTW89_IC][37] = 52, -+ [0][0][RTW89_KCC][37] = 44, -+ [0][0][RTW89_ACMA][37] = 52, -+ [0][0][RTW89_CHILE][37] = 62, -+ [0][0][RTW89_UKRAINE][37] = 127, -+ [0][0][RTW89_MEXICO][37] = 52, -+ [0][0][RTW89_CN][37] = 127, -+ [0][0][RTW89_QATAR][37] = 127, -+ [0][0][RTW89_UK][37] = 56, -+ [0][0][RTW89_FCC][38] = 84, -+ [0][0][RTW89_ETSI][38] = 28, -+ [0][0][RTW89_MKK][38] = 127, -+ [0][0][RTW89_IC][38] = 84, -+ [0][0][RTW89_KCC][38] = 44, -+ [0][0][RTW89_ACMA][38] = 84, -+ [0][0][RTW89_CHILE][38] = 60, -+ [0][0][RTW89_UKRAINE][38] = 28, -+ [0][0][RTW89_MEXICO][38] = 84, -+ [0][0][RTW89_CN][38] = 62, -+ [0][0][RTW89_QATAR][38] = 28, -+ [0][0][RTW89_UK][38] = 26, -+ [0][0][RTW89_FCC][40] = 84, -+ [0][0][RTW89_ETSI][40] = 28, -+ [0][0][RTW89_MKK][40] = 127, -+ [0][0][RTW89_IC][40] = 84, -+ [0][0][RTW89_KCC][40] = 44, -+ [0][0][RTW89_ACMA][40] = 84, -+ [0][0][RTW89_CHILE][40] = 60, -+ [0][0][RTW89_UKRAINE][40] = 28, -+ [0][0][RTW89_MEXICO][40] = 84, -+ [0][0][RTW89_CN][40] = 62, -+ [0][0][RTW89_QATAR][40] = 28, -+ [0][0][RTW89_UK][40] = 26, -+ [0][0][RTW89_FCC][42] = 84, -+ [0][0][RTW89_ETSI][42] = 28, -+ [0][0][RTW89_MKK][42] = 127, -+ [0][0][RTW89_IC][42] = 84, -+ [0][0][RTW89_KCC][42] = 44, -+ [0][0][RTW89_ACMA][42] = 84, -+ [0][0][RTW89_CHILE][42] = 64, -+ [0][0][RTW89_UKRAINE][42] = 28, -+ [0][0][RTW89_MEXICO][42] = 84, -+ [0][0][RTW89_CN][42] = 62, -+ [0][0][RTW89_QATAR][42] = 28, -+ [0][0][RTW89_UK][42] = 26, -+ [0][0][RTW89_FCC][44] = 84, -+ [0][0][RTW89_ETSI][44] = 28, -+ [0][0][RTW89_MKK][44] = 127, -+ [0][0][RTW89_IC][44] = 84, -+ [0][0][RTW89_KCC][44] = 44, -+ [0][0][RTW89_ACMA][44] = 84, -+ [0][0][RTW89_CHILE][44] = 60, -+ [0][0][RTW89_UKRAINE][44] = 28, -+ [0][0][RTW89_MEXICO][44] = 84, -+ [0][0][RTW89_CN][44] = 62, -+ [0][0][RTW89_QATAR][44] = 28, -+ [0][0][RTW89_UK][44] = 26, -+ [0][0][RTW89_FCC][46] = 84, -+ [0][0][RTW89_ETSI][46] = 28, -+ [0][0][RTW89_MKK][46] = 127, -+ [0][0][RTW89_IC][46] = 84, -+ [0][0][RTW89_KCC][46] = 44, -+ [0][0][RTW89_ACMA][46] = 84, -+ [0][0][RTW89_CHILE][46] = 60, -+ [0][0][RTW89_UKRAINE][46] = 28, -+ [0][0][RTW89_MEXICO][46] = 84, -+ [0][0][RTW89_CN][46] = 62, -+ [0][0][RTW89_QATAR][46] = 28, -+ [0][0][RTW89_UK][46] = 26, -+ [0][0][RTW89_FCC][48] = 32, -+ [0][0][RTW89_ETSI][48] = 127, -+ [0][0][RTW89_MKK][48] = 127, -+ [0][0][RTW89_IC][48] = 127, -+ [0][0][RTW89_KCC][48] = 127, -+ [0][0][RTW89_ACMA][48] = 127, -+ [0][0][RTW89_CHILE][48] = 127, -+ [0][0][RTW89_UKRAINE][48] = 127, -+ [0][0][RTW89_MEXICO][48] = 127, -+ [0][0][RTW89_CN][48] = 127, -+ [0][0][RTW89_QATAR][48] = 127, -+ [0][0][RTW89_UK][48] = 127, -+ [0][0][RTW89_FCC][50] = 32, -+ [0][0][RTW89_ETSI][50] = 127, -+ [0][0][RTW89_MKK][50] = 127, -+ [0][0][RTW89_IC][50] = 127, -+ [0][0][RTW89_KCC][50] = 127, -+ [0][0][RTW89_ACMA][50] = 127, -+ [0][0][RTW89_CHILE][50] = 127, -+ [0][0][RTW89_UKRAINE][50] = 127, -+ [0][0][RTW89_MEXICO][50] = 127, -+ [0][0][RTW89_CN][50] = 127, -+ [0][0][RTW89_QATAR][50] = 127, -+ [0][0][RTW89_UK][50] = 127, -+ [0][0][RTW89_FCC][52] = 32, -+ [0][0][RTW89_ETSI][52] = 127, -+ [0][0][RTW89_MKK][52] = 127, -+ [0][0][RTW89_IC][52] = 127, -+ [0][0][RTW89_KCC][52] = 127, -+ [0][0][RTW89_ACMA][52] = 127, -+ [0][0][RTW89_CHILE][52] = 127, -+ [0][0][RTW89_UKRAINE][52] = 127, -+ [0][0][RTW89_MEXICO][52] = 127, -+ [0][0][RTW89_CN][52] = 127, -+ [0][0][RTW89_QATAR][52] = 127, -+ [0][0][RTW89_UK][52] = 127, -+ [0][1][RTW89_FCC][0] = 34, -+ [0][1][RTW89_ETSI][0] = 12, -+ [0][1][RTW89_MKK][0] = 12, -+ [0][1][RTW89_IC][0] = 0, -+ [0][1][RTW89_KCC][0] = 28, -+ [0][1][RTW89_ACMA][0] = 12, -+ [0][1][RTW89_CHILE][0] = 14, -+ [0][1][RTW89_UKRAINE][0] = 12, -+ [0][1][RTW89_MEXICO][0] = 34, -+ [0][1][RTW89_CN][0] = 12, -+ [0][1][RTW89_QATAR][0] = 12, -+ [0][1][RTW89_UK][0] = 12, -+ [0][1][RTW89_FCC][2] = 38, -+ [0][1][RTW89_ETSI][2] = 12, -+ [0][1][RTW89_MKK][2] = 12, -+ [0][1][RTW89_IC][2] = 4, -+ [0][1][RTW89_KCC][2] = 28, -+ [0][1][RTW89_ACMA][2] = 12, -+ [0][1][RTW89_CHILE][2] = 12, -+ [0][1][RTW89_UKRAINE][2] = 12, -+ [0][1][RTW89_MEXICO][2] = 38, -+ [0][1][RTW89_CN][2] = 12, -+ [0][1][RTW89_QATAR][2] = 12, -+ [0][1][RTW89_UK][2] = 12, -+ [0][1][RTW89_FCC][4] = 34, -+ [0][1][RTW89_ETSI][4] = 12, -+ [0][1][RTW89_MKK][4] = 14, -+ [0][1][RTW89_IC][4] = 0, -+ [0][1][RTW89_KCC][4] = 28, -+ [0][1][RTW89_ACMA][4] = 12, -+ [0][1][RTW89_CHILE][4] = 12, -+ [0][1][RTW89_UKRAINE][4] = 12, -+ [0][1][RTW89_MEXICO][4] = 34, -+ [0][1][RTW89_CN][4] = 12, -+ [0][1][RTW89_QATAR][4] = 12, -+ [0][1][RTW89_UK][4] = 12, -+ [0][1][RTW89_FCC][6] = 34, -+ [0][1][RTW89_ETSI][6] = 12, -+ [0][1][RTW89_MKK][6] = 14, -+ [0][1][RTW89_IC][6] = 0, -+ [0][1][RTW89_KCC][6] = 2, -+ [0][1][RTW89_ACMA][6] = 12, -+ [0][1][RTW89_CHILE][6] = 12, -+ [0][1][RTW89_UKRAINE][6] = 12, -+ [0][1][RTW89_MEXICO][6] = 34, -+ [0][1][RTW89_CN][6] = 12, -+ [0][1][RTW89_QATAR][6] = 12, -+ [0][1][RTW89_UK][6] = 12, -+ [0][1][RTW89_FCC][8] = 34, -+ [0][1][RTW89_ETSI][8] = 12, -+ [0][1][RTW89_MKK][8] = 14, -+ [0][1][RTW89_IC][8] = 34, -+ [0][1][RTW89_KCC][8] = 30, -+ [0][1][RTW89_ACMA][8] = 12, -+ [0][1][RTW89_CHILE][8] = 50, -+ [0][1][RTW89_UKRAINE][8] = 12, -+ [0][1][RTW89_MEXICO][8] = 34, -+ [0][1][RTW89_CN][8] = 12, -+ [0][1][RTW89_QATAR][8] = 12, -+ [0][1][RTW89_UK][8] = 12, -+ [0][1][RTW89_FCC][10] = 34, -+ [0][1][RTW89_ETSI][10] = 12, -+ [0][1][RTW89_MKK][10] = 14, -+ [0][1][RTW89_IC][10] = 34, -+ [0][1][RTW89_KCC][10] = 30, -+ [0][1][RTW89_ACMA][10] = 12, -+ [0][1][RTW89_CHILE][10] = 50, -+ [0][1][RTW89_UKRAINE][10] = 12, -+ [0][1][RTW89_MEXICO][10] = 34, -+ [0][1][RTW89_CN][10] = 12, -+ [0][1][RTW89_QATAR][10] = 12, -+ [0][1][RTW89_UK][10] = 12, -+ [0][1][RTW89_FCC][12] = 38, -+ [0][1][RTW89_ETSI][12] = 12, -+ [0][1][RTW89_MKK][12] = 12, -+ [0][1][RTW89_IC][12] = 38, -+ [0][1][RTW89_KCC][12] = 30, -+ [0][1][RTW89_ACMA][12] = 12, -+ [0][1][RTW89_CHILE][12] = 50, -+ [0][1][RTW89_UKRAINE][12] = 12, -+ [0][1][RTW89_MEXICO][12] = 38, -+ [0][1][RTW89_CN][12] = 12, -+ [0][1][RTW89_QATAR][12] = 12, -+ [0][1][RTW89_UK][12] = 12, -+ [0][1][RTW89_FCC][14] = 34, -+ [0][1][RTW89_ETSI][14] = 12, -+ [0][1][RTW89_MKK][14] = 12, -+ [0][1][RTW89_IC][14] = 34, -+ [0][1][RTW89_KCC][14] = 30, -+ [0][1][RTW89_ACMA][14] = 12, -+ [0][1][RTW89_CHILE][14] = 48, -+ [0][1][RTW89_UKRAINE][14] = 12, -+ [0][1][RTW89_MEXICO][14] = 34, -+ [0][1][RTW89_CN][14] = 12, -+ [0][1][RTW89_QATAR][14] = 12, -+ [0][1][RTW89_UK][14] = 12, -+ [0][1][RTW89_FCC][15] = 34, -+ [0][1][RTW89_ETSI][15] = 12, -+ [0][1][RTW89_MKK][15] = 32, -+ [0][1][RTW89_IC][15] = 34, -+ [0][1][RTW89_KCC][15] = 30, -+ [0][1][RTW89_ACMA][15] = 12, -+ [0][1][RTW89_CHILE][15] = 52, -+ [0][1][RTW89_UKRAINE][15] = 12, -+ [0][1][RTW89_MEXICO][15] = 34, -+ [0][1][RTW89_CN][15] = 127, -+ [0][1][RTW89_QATAR][15] = 12, -+ [0][1][RTW89_UK][15] = 12, -+ [0][1][RTW89_FCC][17] = 34, -+ [0][1][RTW89_ETSI][17] = 12, -+ [0][1][RTW89_MKK][17] = 34, -+ [0][1][RTW89_IC][17] = 34, -+ [0][1][RTW89_KCC][17] = 30, -+ [0][1][RTW89_ACMA][17] = 12, -+ [0][1][RTW89_CHILE][17] = 52, -+ [0][1][RTW89_UKRAINE][17] = 12, -+ [0][1][RTW89_MEXICO][17] = 34, -+ [0][1][RTW89_CN][17] = 127, -+ [0][1][RTW89_QATAR][17] = 12, -+ [0][1][RTW89_UK][17] = 12, -+ [0][1][RTW89_FCC][19] = 38, -+ [0][1][RTW89_ETSI][19] = 12, -+ [0][1][RTW89_MKK][19] = 34, -+ [0][1][RTW89_IC][19] = 38, -+ [0][1][RTW89_KCC][19] = 30, -+ [0][1][RTW89_ACMA][19] = 12, -+ [0][1][RTW89_CHILE][19] = 52, -+ [0][1][RTW89_UKRAINE][19] = 12, -+ [0][1][RTW89_MEXICO][19] = 38, -+ [0][1][RTW89_CN][19] = 127, -+ [0][1][RTW89_QATAR][19] = 12, -+ [0][1][RTW89_UK][19] = 12, -+ [0][1][RTW89_FCC][21] = 38, -+ [0][1][RTW89_ETSI][21] = 12, -+ [0][1][RTW89_MKK][21] = 34, -+ [0][1][RTW89_IC][21] = 38, -+ [0][1][RTW89_KCC][21] = 30, -+ [0][1][RTW89_ACMA][21] = 12, -+ [0][1][RTW89_CHILE][21] = 52, -+ [0][1][RTW89_UKRAINE][21] = 12, -+ [0][1][RTW89_MEXICO][21] = 38, -+ [0][1][RTW89_CN][21] = 127, -+ [0][1][RTW89_QATAR][21] = 12, -+ [0][1][RTW89_UK][21] = 12, -+ [0][1][RTW89_FCC][23] = 38, -+ [0][1][RTW89_ETSI][23] = 12, -+ [0][1][RTW89_MKK][23] = 34, -+ [0][1][RTW89_IC][23] = 38, -+ [0][1][RTW89_KCC][23] = 30, -+ [0][1][RTW89_ACMA][23] = 12, -+ [0][1][RTW89_CHILE][23] = 52, -+ [0][1][RTW89_UKRAINE][23] = 12, -+ [0][1][RTW89_MEXICO][23] = 38, -+ [0][1][RTW89_CN][23] = 127, -+ [0][1][RTW89_QATAR][23] = 12, -+ [0][1][RTW89_UK][23] = 12, -+ [0][1][RTW89_FCC][25] = 38, -+ [0][1][RTW89_ETSI][25] = 12, -+ [0][1][RTW89_MKK][25] = 34, -+ [0][1][RTW89_IC][25] = 127, -+ [0][1][RTW89_KCC][25] = 30, -+ [0][1][RTW89_ACMA][25] = 127, -+ [0][1][RTW89_CHILE][25] = 52, -+ [0][1][RTW89_UKRAINE][25] = 12, -+ [0][1][RTW89_MEXICO][25] = 38, -+ [0][1][RTW89_CN][25] = 127, -+ [0][1][RTW89_QATAR][25] = 12, -+ [0][1][RTW89_UK][25] = 12, -+ [0][1][RTW89_FCC][27] = 38, -+ [0][1][RTW89_ETSI][27] = 12, -+ [0][1][RTW89_MKK][27] = 34, -+ [0][1][RTW89_IC][27] = 127, -+ [0][1][RTW89_KCC][27] = 30, -+ [0][1][RTW89_ACMA][27] = 127, -+ [0][1][RTW89_CHILE][27] = 52, -+ [0][1][RTW89_UKRAINE][27] = 12, -+ [0][1][RTW89_MEXICO][27] = 38, -+ [0][1][RTW89_CN][27] = 127, -+ [0][1][RTW89_QATAR][27] = 12, -+ [0][1][RTW89_UK][27] = 12, -+ [0][1][RTW89_FCC][29] = 38, -+ [0][1][RTW89_ETSI][29] = 12, -+ [0][1][RTW89_MKK][29] = 34, -+ [0][1][RTW89_IC][29] = 127, -+ [0][1][RTW89_KCC][29] = 30, -+ [0][1][RTW89_ACMA][29] = 127, -+ [0][1][RTW89_CHILE][29] = 52, -+ [0][1][RTW89_UKRAINE][29] = 12, -+ [0][1][RTW89_MEXICO][29] = 38, -+ [0][1][RTW89_CN][29] = 127, -+ [0][1][RTW89_QATAR][29] = 12, -+ [0][1][RTW89_UK][29] = 12, -+ [0][1][RTW89_FCC][31] = 38, -+ [0][1][RTW89_ETSI][31] = 12, -+ [0][1][RTW89_MKK][31] = 34, -+ [0][1][RTW89_IC][31] = 34, -+ [0][1][RTW89_KCC][31] = 30, -+ [0][1][RTW89_ACMA][31] = 12, -+ [0][1][RTW89_CHILE][31] = 52, -+ [0][1][RTW89_UKRAINE][31] = 12, -+ [0][1][RTW89_MEXICO][31] = 38, -+ [0][1][RTW89_CN][31] = 127, -+ [0][1][RTW89_QATAR][31] = 12, -+ [0][1][RTW89_UK][31] = 12, -+ [0][1][RTW89_FCC][33] = 34, -+ [0][1][RTW89_ETSI][33] = 12, -+ [0][1][RTW89_MKK][33] = 34, -+ [0][1][RTW89_IC][33] = 34, -+ [0][1][RTW89_KCC][33] = 30, -+ [0][1][RTW89_ACMA][33] = 12, -+ [0][1][RTW89_CHILE][33] = 52, -+ [0][1][RTW89_UKRAINE][33] = 12, -+ [0][1][RTW89_MEXICO][33] = 34, -+ [0][1][RTW89_CN][33] = 127, -+ [0][1][RTW89_QATAR][33] = 12, -+ [0][1][RTW89_UK][33] = 12, -+ [0][1][RTW89_FCC][35] = 34, -+ [0][1][RTW89_ETSI][35] = 12, -+ [0][1][RTW89_MKK][35] = 34, -+ [0][1][RTW89_IC][35] = 34, -+ [0][1][RTW89_KCC][35] = 30, -+ [0][1][RTW89_ACMA][35] = 12, -+ [0][1][RTW89_CHILE][35] = 52, -+ [0][1][RTW89_UKRAINE][35] = 12, -+ [0][1][RTW89_MEXICO][35] = 34, -+ [0][1][RTW89_CN][35] = 127, -+ [0][1][RTW89_QATAR][35] = 12, -+ [0][1][RTW89_UK][35] = 12, -+ [0][1][RTW89_FCC][37] = 38, -+ [0][1][RTW89_ETSI][37] = 127, -+ [0][1][RTW89_MKK][37] = 34, -+ [0][1][RTW89_IC][37] = 38, -+ [0][1][RTW89_KCC][37] = 30, -+ [0][1][RTW89_ACMA][37] = 38, -+ [0][1][RTW89_CHILE][37] = 52, -+ [0][1][RTW89_UKRAINE][37] = 127, -+ [0][1][RTW89_MEXICO][37] = 38, -+ [0][1][RTW89_CN][37] = 127, -+ [0][1][RTW89_QATAR][37] = 127, -+ [0][1][RTW89_UK][37] = 44, -+ [0][1][RTW89_FCC][38] = 82, -+ [0][1][RTW89_ETSI][38] = 16, -+ [0][1][RTW89_MKK][38] = 127, -+ [0][1][RTW89_IC][38] = 82, -+ [0][1][RTW89_KCC][38] = 30, -+ [0][1][RTW89_ACMA][38] = 84, -+ [0][1][RTW89_CHILE][38] = 52, -+ [0][1][RTW89_UKRAINE][38] = 16, -+ [0][1][RTW89_MEXICO][38] = 82, -+ [0][1][RTW89_CN][38] = 50, -+ [0][1][RTW89_QATAR][38] = 16, -+ [0][1][RTW89_UK][38] = 14, -+ [0][1][RTW89_FCC][40] = 82, -+ [0][1][RTW89_ETSI][40] = 16, -+ [0][1][RTW89_MKK][40] = 127, -+ [0][1][RTW89_IC][40] = 82, -+ [0][1][RTW89_KCC][40] = 30, -+ [0][1][RTW89_ACMA][40] = 84, -+ [0][1][RTW89_CHILE][40] = 52, -+ [0][1][RTW89_UKRAINE][40] = 16, -+ [0][1][RTW89_MEXICO][40] = 82, -+ [0][1][RTW89_CN][40] = 50, -+ [0][1][RTW89_QATAR][40] = 16, -+ [0][1][RTW89_UK][40] = 14, -+ [0][1][RTW89_FCC][42] = 82, -+ [0][1][RTW89_ETSI][42] = 16, -+ [0][1][RTW89_MKK][42] = 127, -+ [0][1][RTW89_IC][42] = 82, -+ [0][1][RTW89_KCC][42] = 30, -+ [0][1][RTW89_ACMA][42] = 84, -+ [0][1][RTW89_CHILE][42] = 54, -+ [0][1][RTW89_UKRAINE][42] = 16, -+ [0][1][RTW89_MEXICO][42] = 82, -+ [0][1][RTW89_CN][42] = 50, -+ [0][1][RTW89_QATAR][42] = 16, -+ [0][1][RTW89_UK][42] = 14, -+ [0][1][RTW89_FCC][44] = 82, -+ [0][1][RTW89_ETSI][44] = 16, -+ [0][1][RTW89_MKK][44] = 127, -+ [0][1][RTW89_IC][44] = 82, -+ [0][1][RTW89_KCC][44] = 30, -+ [0][1][RTW89_ACMA][44] = 84, -+ [0][1][RTW89_CHILE][44] = 54, -+ [0][1][RTW89_UKRAINE][44] = 16, -+ [0][1][RTW89_MEXICO][44] = 82, -+ [0][1][RTW89_CN][44] = 50, -+ [0][1][RTW89_QATAR][44] = 16, -+ [0][1][RTW89_UK][44] = 14, -+ [0][1][RTW89_FCC][46] = 82, -+ [0][1][RTW89_ETSI][46] = 16, -+ [0][1][RTW89_MKK][46] = 127, -+ [0][1][RTW89_IC][46] = 82, -+ [0][1][RTW89_KCC][46] = 30, -+ [0][1][RTW89_ACMA][46] = 84, -+ [0][1][RTW89_CHILE][46] = 54, -+ [0][1][RTW89_UKRAINE][46] = 16, -+ [0][1][RTW89_MEXICO][46] = 82, -+ [0][1][RTW89_CN][46] = 50, -+ [0][1][RTW89_QATAR][46] = 16, -+ [0][1][RTW89_UK][46] = 14, -+ [0][1][RTW89_FCC][48] = 20, -+ [0][1][RTW89_ETSI][48] = 127, -+ [0][1][RTW89_MKK][48] = 127, -+ [0][1][RTW89_IC][48] = 127, -+ [0][1][RTW89_KCC][48] = 127, -+ [0][1][RTW89_ACMA][48] = 127, -+ [0][1][RTW89_CHILE][48] = 127, -+ [0][1][RTW89_UKRAINE][48] = 127, -+ [0][1][RTW89_MEXICO][48] = 127, -+ [0][1][RTW89_CN][48] = 127, -+ [0][1][RTW89_QATAR][48] = 127, -+ [0][1][RTW89_UK][48] = 127, -+ [0][1][RTW89_FCC][50] = 20, -+ [0][1][RTW89_ETSI][50] = 127, -+ [0][1][RTW89_MKK][50] = 127, -+ [0][1][RTW89_IC][50] = 127, -+ [0][1][RTW89_KCC][50] = 127, -+ [0][1][RTW89_ACMA][50] = 127, -+ [0][1][RTW89_CHILE][50] = 127, -+ [0][1][RTW89_UKRAINE][50] = 127, -+ [0][1][RTW89_MEXICO][50] = 127, -+ [0][1][RTW89_CN][50] = 127, -+ [0][1][RTW89_QATAR][50] = 127, -+ [0][1][RTW89_UK][50] = 127, -+ [0][1][RTW89_FCC][52] = 20, -+ [0][1][RTW89_ETSI][52] = 127, -+ [0][1][RTW89_MKK][52] = 127, -+ [0][1][RTW89_IC][52] = 127, -+ [0][1][RTW89_KCC][52] = 127, -+ [0][1][RTW89_ACMA][52] = 127, -+ [0][1][RTW89_CHILE][52] = 127, -+ [0][1][RTW89_UKRAINE][52] = 127, -+ [0][1][RTW89_MEXICO][52] = 127, -+ [0][1][RTW89_CN][52] = 127, -+ [0][1][RTW89_QATAR][52] = 127, -+ [0][1][RTW89_UK][52] = 127, -+ [1][0][RTW89_FCC][0] = 62, -+ [1][0][RTW89_ETSI][0] = 34, -+ [1][0][RTW89_MKK][0] = 36, -+ [1][0][RTW89_IC][0] = 36, -+ [1][0][RTW89_KCC][0] = 52, -+ [1][0][RTW89_ACMA][0] = 34, -+ [1][0][RTW89_CHILE][0] = 40, -+ [1][0][RTW89_UKRAINE][0] = 34, -+ [1][0][RTW89_MEXICO][0] = 62, -+ [1][0][RTW89_CN][0] = 34, -+ [1][0][RTW89_QATAR][0] = 34, -+ [1][0][RTW89_UK][0] = 34, -+ [1][0][RTW89_FCC][2] = 62, -+ [1][0][RTW89_ETSI][2] = 34, -+ [1][0][RTW89_MKK][2] = 36, -+ [1][0][RTW89_IC][2] = 36, -+ [1][0][RTW89_KCC][2] = 52, -+ [1][0][RTW89_ACMA][2] = 34, -+ [1][0][RTW89_CHILE][2] = 42, -+ [1][0][RTW89_UKRAINE][2] = 34, -+ [1][0][RTW89_MEXICO][2] = 62, -+ [1][0][RTW89_CN][2] = 34, -+ [1][0][RTW89_QATAR][2] = 34, -+ [1][0][RTW89_UK][2] = 34, -+ [1][0][RTW89_FCC][4] = 62, -+ [1][0][RTW89_ETSI][4] = 34, -+ [1][0][RTW89_MKK][4] = 34, -+ [1][0][RTW89_IC][4] = 36, -+ [1][0][RTW89_KCC][4] = 52, -+ [1][0][RTW89_ACMA][4] = 34, -+ [1][0][RTW89_CHILE][4] = 42, -+ [1][0][RTW89_UKRAINE][4] = 34, -+ [1][0][RTW89_MEXICO][4] = 62, -+ [1][0][RTW89_CN][4] = 34, -+ [1][0][RTW89_QATAR][4] = 34, -+ [1][0][RTW89_UK][4] = 34, -+ [1][0][RTW89_FCC][6] = 62, -+ [1][0][RTW89_ETSI][6] = 34, -+ [1][0][RTW89_MKK][6] = 34, -+ [1][0][RTW89_IC][6] = 36, -+ [1][0][RTW89_KCC][6] = 26, -+ [1][0][RTW89_ACMA][6] = 34, -+ [1][0][RTW89_CHILE][6] = 42, -+ [1][0][RTW89_UKRAINE][6] = 34, -+ [1][0][RTW89_MEXICO][6] = 62, -+ [1][0][RTW89_CN][6] = 34, -+ [1][0][RTW89_QATAR][6] = 34, -+ [1][0][RTW89_UK][6] = 34, -+ [1][0][RTW89_FCC][8] = 62, -+ [1][0][RTW89_ETSI][8] = 34, -+ [1][0][RTW89_MKK][8] = 36, -+ [1][0][RTW89_IC][8] = 62, -+ [1][0][RTW89_KCC][8] = 54, -+ [1][0][RTW89_ACMA][8] = 34, -+ [1][0][RTW89_CHILE][8] = 64, -+ [1][0][RTW89_UKRAINE][8] = 34, -+ [1][0][RTW89_MEXICO][8] = 62, -+ [1][0][RTW89_CN][8] = 34, -+ [1][0][RTW89_QATAR][8] = 34, -+ [1][0][RTW89_UK][8] = 34, -+ [1][0][RTW89_FCC][10] = 62, -+ [1][0][RTW89_ETSI][10] = 34, -+ [1][0][RTW89_MKK][10] = 36, -+ [1][0][RTW89_IC][10] = 62, -+ [1][0][RTW89_KCC][10] = 54, -+ [1][0][RTW89_ACMA][10] = 34, -+ [1][0][RTW89_CHILE][10] = 64, -+ [1][0][RTW89_UKRAINE][10] = 34, -+ [1][0][RTW89_MEXICO][10] = 62, -+ [1][0][RTW89_CN][10] = 34, -+ [1][0][RTW89_QATAR][10] = 34, -+ [1][0][RTW89_UK][10] = 34, -+ [1][0][RTW89_FCC][12] = 64, -+ [1][0][RTW89_ETSI][12] = 34, -+ [1][0][RTW89_MKK][12] = 36, -+ [1][0][RTW89_IC][12] = 64, -+ [1][0][RTW89_KCC][12] = 54, -+ [1][0][RTW89_ACMA][12] = 34, -+ [1][0][RTW89_CHILE][12] = 64, -+ [1][0][RTW89_UKRAINE][12] = 34, -+ [1][0][RTW89_MEXICO][12] = 64, -+ [1][0][RTW89_CN][12] = 34, -+ [1][0][RTW89_QATAR][12] = 34, -+ [1][0][RTW89_UK][12] = 34, -+ [1][0][RTW89_FCC][14] = 62, -+ [1][0][RTW89_ETSI][14] = 34, -+ [1][0][RTW89_MKK][14] = 36, -+ [1][0][RTW89_IC][14] = 62, -+ [1][0][RTW89_KCC][14] = 54, -+ [1][0][RTW89_ACMA][14] = 34, -+ [1][0][RTW89_CHILE][14] = 64, -+ [1][0][RTW89_UKRAINE][14] = 34, -+ [1][0][RTW89_MEXICO][14] = 62, -+ [1][0][RTW89_CN][14] = 34, -+ [1][0][RTW89_QATAR][14] = 34, -+ [1][0][RTW89_UK][14] = 34, -+ [1][0][RTW89_FCC][15] = 62, -+ [1][0][RTW89_ETSI][15] = 34, -+ [1][0][RTW89_MKK][15] = 54, -+ [1][0][RTW89_IC][15] = 62, -+ [1][0][RTW89_KCC][15] = 54, -+ [1][0][RTW89_ACMA][15] = 34, -+ [1][0][RTW89_CHILE][15] = 62, -+ [1][0][RTW89_UKRAINE][15] = 34, -+ [1][0][RTW89_MEXICO][15] = 62, -+ [1][0][RTW89_CN][15] = 127, -+ [1][0][RTW89_QATAR][15] = 34, -+ [1][0][RTW89_UK][15] = 34, -+ [1][0][RTW89_FCC][17] = 62, -+ [1][0][RTW89_ETSI][17] = 34, -+ [1][0][RTW89_MKK][17] = 58, -+ [1][0][RTW89_IC][17] = 62, -+ [1][0][RTW89_KCC][17] = 54, -+ [1][0][RTW89_ACMA][17] = 34, -+ [1][0][RTW89_CHILE][17] = 62, -+ [1][0][RTW89_UKRAINE][17] = 34, -+ [1][0][RTW89_MEXICO][17] = 62, -+ [1][0][RTW89_CN][17] = 127, -+ [1][0][RTW89_QATAR][17] = 34, -+ [1][0][RTW89_UK][17] = 34, -+ [1][0][RTW89_FCC][19] = 62, -+ [1][0][RTW89_ETSI][19] = 34, -+ [1][0][RTW89_MKK][19] = 58, -+ [1][0][RTW89_IC][19] = 62, -+ [1][0][RTW89_KCC][19] = 54, -+ [1][0][RTW89_ACMA][19] = 34, -+ [1][0][RTW89_CHILE][19] = 62, -+ [1][0][RTW89_UKRAINE][19] = 34, -+ [1][0][RTW89_MEXICO][19] = 62, -+ [1][0][RTW89_CN][19] = 127, -+ [1][0][RTW89_QATAR][19] = 34, -+ [1][0][RTW89_UK][19] = 34, -+ [1][0][RTW89_FCC][21] = 62, -+ [1][0][RTW89_ETSI][21] = 34, -+ [1][0][RTW89_MKK][21] = 58, -+ [1][0][RTW89_IC][21] = 62, -+ [1][0][RTW89_KCC][21] = 54, -+ [1][0][RTW89_ACMA][21] = 34, -+ [1][0][RTW89_CHILE][21] = 64, -+ [1][0][RTW89_UKRAINE][21] = 34, -+ [1][0][RTW89_MEXICO][21] = 62, -+ [1][0][RTW89_CN][21] = 127, -+ [1][0][RTW89_QATAR][21] = 34, -+ [1][0][RTW89_UK][21] = 34, -+ [1][0][RTW89_FCC][23] = 62, -+ [1][0][RTW89_ETSI][23] = 34, -+ [1][0][RTW89_MKK][23] = 58, -+ [1][0][RTW89_IC][23] = 62, -+ [1][0][RTW89_KCC][23] = 54, -+ [1][0][RTW89_ACMA][23] = 34, -+ [1][0][RTW89_CHILE][23] = 64, -+ [1][0][RTW89_UKRAINE][23] = 34, -+ [1][0][RTW89_MEXICO][23] = 62, -+ [1][0][RTW89_CN][23] = 127, -+ [1][0][RTW89_QATAR][23] = 34, -+ [1][0][RTW89_UK][23] = 34, -+ [1][0][RTW89_FCC][25] = 62, -+ [1][0][RTW89_ETSI][25] = 34, -+ [1][0][RTW89_MKK][25] = 58, -+ [1][0][RTW89_IC][25] = 127, -+ [1][0][RTW89_KCC][25] = 54, -+ [1][0][RTW89_ACMA][25] = 127, -+ [1][0][RTW89_CHILE][25] = 64, -+ [1][0][RTW89_UKRAINE][25] = 34, -+ [1][0][RTW89_MEXICO][25] = 62, -+ [1][0][RTW89_CN][25] = 127, -+ [1][0][RTW89_QATAR][25] = 34, -+ [1][0][RTW89_UK][25] = 34, -+ [1][0][RTW89_FCC][27] = 62, -+ [1][0][RTW89_ETSI][27] = 34, -+ [1][0][RTW89_MKK][27] = 58, -+ [1][0][RTW89_IC][27] = 127, -+ [1][0][RTW89_KCC][27] = 54, -+ [1][0][RTW89_ACMA][27] = 127, -+ [1][0][RTW89_CHILE][27] = 64, -+ [1][0][RTW89_UKRAINE][27] = 34, -+ [1][0][RTW89_MEXICO][27] = 62, -+ [1][0][RTW89_CN][27] = 127, -+ [1][0][RTW89_QATAR][27] = 34, -+ [1][0][RTW89_UK][27] = 34, -+ [1][0][RTW89_FCC][29] = 62, -+ [1][0][RTW89_ETSI][29] = 34, -+ [1][0][RTW89_MKK][29] = 58, -+ [1][0][RTW89_IC][29] = 127, -+ [1][0][RTW89_KCC][29] = 54, -+ [1][0][RTW89_ACMA][29] = 127, -+ [1][0][RTW89_CHILE][29] = 66, -+ [1][0][RTW89_UKRAINE][29] = 34, -+ [1][0][RTW89_MEXICO][29] = 62, -+ [1][0][RTW89_CN][29] = 127, -+ [1][0][RTW89_QATAR][29] = 34, -+ [1][0][RTW89_UK][29] = 34, -+ [1][0][RTW89_FCC][31] = 62, -+ [1][0][RTW89_ETSI][31] = 34, -+ [1][0][RTW89_MKK][31] = 58, -+ [1][0][RTW89_IC][31] = 62, -+ [1][0][RTW89_KCC][31] = 54, -+ [1][0][RTW89_ACMA][31] = 34, -+ [1][0][RTW89_CHILE][31] = 66, -+ [1][0][RTW89_UKRAINE][31] = 34, -+ [1][0][RTW89_MEXICO][31] = 62, -+ [1][0][RTW89_CN][31] = 127, -+ [1][0][RTW89_QATAR][31] = 34, -+ [1][0][RTW89_UK][31] = 34, -+ [1][0][RTW89_FCC][33] = 62, -+ [1][0][RTW89_ETSI][33] = 34, -+ [1][0][RTW89_MKK][33] = 58, -+ [1][0][RTW89_IC][33] = 62, -+ [1][0][RTW89_KCC][33] = 54, -+ [1][0][RTW89_ACMA][33] = 34, -+ [1][0][RTW89_CHILE][33] = 66, -+ [1][0][RTW89_UKRAINE][33] = 34, -+ [1][0][RTW89_MEXICO][33] = 62, -+ [1][0][RTW89_CN][33] = 127, -+ [1][0][RTW89_QATAR][33] = 34, -+ [1][0][RTW89_UK][33] = 34, -+ [1][0][RTW89_FCC][35] = 62, -+ [1][0][RTW89_ETSI][35] = 34, -+ [1][0][RTW89_MKK][35] = 58, -+ [1][0][RTW89_IC][35] = 62, -+ [1][0][RTW89_KCC][35] = 54, -+ [1][0][RTW89_ACMA][35] = 34, -+ [1][0][RTW89_CHILE][35] = 66, -+ [1][0][RTW89_UKRAINE][35] = 34, -+ [1][0][RTW89_MEXICO][35] = 62, -+ [1][0][RTW89_CN][35] = 127, -+ [1][0][RTW89_QATAR][35] = 34, -+ [1][0][RTW89_UK][35] = 34, -+ [1][0][RTW89_FCC][37] = 64, -+ [1][0][RTW89_ETSI][37] = 127, -+ [1][0][RTW89_MKK][37] = 52, -+ [1][0][RTW89_IC][37] = 64, -+ [1][0][RTW89_KCC][37] = 54, -+ [1][0][RTW89_ACMA][37] = 64, -+ [1][0][RTW89_CHILE][37] = 64, -+ [1][0][RTW89_UKRAINE][37] = 127, -+ [1][0][RTW89_MEXICO][37] = 64, -+ [1][0][RTW89_CN][37] = 127, -+ [1][0][RTW89_QATAR][37] = 127, -+ [1][0][RTW89_UK][37] = 66, -+ [1][0][RTW89_FCC][38] = 84, -+ [1][0][RTW89_ETSI][38] = 28, -+ [1][0][RTW89_MKK][38] = 127, -+ [1][0][RTW89_IC][38] = 84, -+ [1][0][RTW89_KCC][38] = 56, -+ [1][0][RTW89_ACMA][38] = 84, -+ [1][0][RTW89_CHILE][38] = 64, -+ [1][0][RTW89_UKRAINE][38] = 28, -+ [1][0][RTW89_MEXICO][38] = 84, -+ [1][0][RTW89_CN][38] = 74, -+ [1][0][RTW89_QATAR][38] = 28, -+ [1][0][RTW89_UK][38] = 38, -+ [1][0][RTW89_FCC][40] = 84, -+ [1][0][RTW89_ETSI][40] = 28, -+ [1][0][RTW89_MKK][40] = 127, -+ [1][0][RTW89_IC][40] = 84, -+ [1][0][RTW89_KCC][40] = 56, -+ [1][0][RTW89_ACMA][40] = 84, -+ [1][0][RTW89_CHILE][40] = 64, -+ [1][0][RTW89_UKRAINE][40] = 28, -+ [1][0][RTW89_MEXICO][40] = 84, -+ [1][0][RTW89_CN][40] = 74, -+ [1][0][RTW89_QATAR][40] = 28, -+ [1][0][RTW89_UK][40] = 38, -+ [1][0][RTW89_FCC][42] = 84, -+ [1][0][RTW89_ETSI][42] = 28, -+ [1][0][RTW89_MKK][42] = 127, -+ [1][0][RTW89_IC][42] = 84, -+ [1][0][RTW89_KCC][42] = 56, -+ [1][0][RTW89_ACMA][42] = 84, -+ [1][0][RTW89_CHILE][42] = 64, -+ [1][0][RTW89_UKRAINE][42] = 28, -+ [1][0][RTW89_MEXICO][42] = 84, -+ [1][0][RTW89_CN][42] = 74, -+ [1][0][RTW89_QATAR][42] = 28, -+ [1][0][RTW89_UK][42] = 38, -+ [1][0][RTW89_FCC][44] = 84, -+ [1][0][RTW89_ETSI][44] = 28, -+ [1][0][RTW89_MKK][44] = 127, -+ [1][0][RTW89_IC][44] = 84, -+ [1][0][RTW89_KCC][44] = 56, -+ [1][0][RTW89_ACMA][44] = 84, -+ [1][0][RTW89_CHILE][44] = 64, -+ [1][0][RTW89_UKRAINE][44] = 28, -+ [1][0][RTW89_MEXICO][44] = 84, -+ [1][0][RTW89_CN][44] = 74, -+ [1][0][RTW89_QATAR][44] = 28, -+ [1][0][RTW89_UK][44] = 38, -+ [1][0][RTW89_FCC][46] = 84, -+ [1][0][RTW89_ETSI][46] = 28, -+ [1][0][RTW89_MKK][46] = 127, -+ [1][0][RTW89_IC][46] = 84, -+ [1][0][RTW89_KCC][46] = 56, -+ [1][0][RTW89_ACMA][46] = 84, -+ [1][0][RTW89_CHILE][46] = 64, -+ [1][0][RTW89_UKRAINE][46] = 28, -+ [1][0][RTW89_MEXICO][46] = 84, -+ [1][0][RTW89_CN][46] = 74, -+ [1][0][RTW89_QATAR][46] = 28, -+ [1][0][RTW89_UK][46] = 38, -+ [1][0][RTW89_FCC][48] = 44, -+ [1][0][RTW89_ETSI][48] = 127, -+ [1][0][RTW89_MKK][48] = 127, -+ [1][0][RTW89_IC][48] = 127, -+ [1][0][RTW89_KCC][48] = 127, -+ [1][0][RTW89_ACMA][48] = 127, -+ [1][0][RTW89_CHILE][48] = 127, -+ [1][0][RTW89_UKRAINE][48] = 127, -+ [1][0][RTW89_MEXICO][48] = 127, -+ [1][0][RTW89_CN][48] = 127, -+ [1][0][RTW89_QATAR][48] = 127, -+ [1][0][RTW89_UK][48] = 127, -+ [1][0][RTW89_FCC][50] = 44, -+ [1][0][RTW89_ETSI][50] = 127, -+ [1][0][RTW89_MKK][50] = 127, -+ [1][0][RTW89_IC][50] = 127, -+ [1][0][RTW89_KCC][50] = 127, -+ [1][0][RTW89_ACMA][50] = 127, -+ [1][0][RTW89_CHILE][50] = 127, -+ [1][0][RTW89_UKRAINE][50] = 127, -+ [1][0][RTW89_MEXICO][50] = 127, -+ [1][0][RTW89_CN][50] = 127, -+ [1][0][RTW89_QATAR][50] = 127, -+ [1][0][RTW89_UK][50] = 127, -+ [1][0][RTW89_FCC][52] = 44, -+ [1][0][RTW89_ETSI][52] = 127, -+ [1][0][RTW89_MKK][52] = 127, -+ [1][0][RTW89_IC][52] = 127, -+ [1][0][RTW89_KCC][52] = 127, -+ [1][0][RTW89_ACMA][52] = 127, -+ [1][0][RTW89_CHILE][52] = 127, -+ [1][0][RTW89_UKRAINE][52] = 127, -+ [1][0][RTW89_MEXICO][52] = 127, -+ [1][0][RTW89_CN][52] = 127, -+ [1][0][RTW89_QATAR][52] = 127, -+ [1][0][RTW89_UK][52] = 127, -+ [1][1][RTW89_FCC][0] = 42, -+ [1][1][RTW89_ETSI][0] = 22, -+ [1][1][RTW89_MKK][0] = 22, -+ [1][1][RTW89_IC][0] = 10, -+ [1][1][RTW89_KCC][0] = 36, -+ [1][1][RTW89_ACMA][0] = 22, -+ [1][1][RTW89_CHILE][0] = 22, -+ [1][1][RTW89_UKRAINE][0] = 22, -+ [1][1][RTW89_MEXICO][0] = 42, -+ [1][1][RTW89_CN][0] = 22, -+ [1][1][RTW89_QATAR][0] = 22, -+ [1][1][RTW89_UK][0] = 22, -+ [1][1][RTW89_FCC][2] = 44, -+ [1][1][RTW89_ETSI][2] = 22, -+ [1][1][RTW89_MKK][2] = 22, -+ [1][1][RTW89_IC][2] = 14, -+ [1][1][RTW89_KCC][2] = 36, -+ [1][1][RTW89_ACMA][2] = 22, -+ [1][1][RTW89_CHILE][2] = 22, -+ [1][1][RTW89_UKRAINE][2] = 22, -+ [1][1][RTW89_MEXICO][2] = 44, -+ [1][1][RTW89_CN][2] = 22, -+ [1][1][RTW89_QATAR][2] = 22, -+ [1][1][RTW89_UK][2] = 22, -+ [1][1][RTW89_FCC][4] = 42, -+ [1][1][RTW89_ETSI][4] = 22, -+ [1][1][RTW89_MKK][4] = 20, -+ [1][1][RTW89_IC][4] = 10, -+ [1][1][RTW89_KCC][4] = 36, -+ [1][1][RTW89_ACMA][4] = 22, -+ [1][1][RTW89_CHILE][4] = 20, -+ [1][1][RTW89_UKRAINE][4] = 22, -+ [1][1][RTW89_MEXICO][4] = 42, -+ [1][1][RTW89_CN][4] = 22, -+ [1][1][RTW89_QATAR][4] = 22, -+ [1][1][RTW89_UK][4] = 22, -+ [1][1][RTW89_FCC][6] = 42, -+ [1][1][RTW89_ETSI][6] = 22, -+ [1][1][RTW89_MKK][6] = 20, -+ [1][1][RTW89_IC][6] = 10, -+ [1][1][RTW89_KCC][6] = 10, -+ [1][1][RTW89_ACMA][6] = 22, -+ [1][1][RTW89_CHILE][6] = 20, -+ [1][1][RTW89_UKRAINE][6] = 22, -+ [1][1][RTW89_MEXICO][6] = 42, -+ [1][1][RTW89_CN][6] = 22, -+ [1][1][RTW89_QATAR][6] = 22, -+ [1][1][RTW89_UK][6] = 22, -+ [1][1][RTW89_FCC][8] = 44, -+ [1][1][RTW89_ETSI][8] = 22, -+ [1][1][RTW89_MKK][8] = 20, -+ [1][1][RTW89_IC][8] = 44, -+ [1][1][RTW89_KCC][8] = 36, -+ [1][1][RTW89_ACMA][8] = 22, -+ [1][1][RTW89_CHILE][8] = 54, -+ [1][1][RTW89_UKRAINE][8] = 22, -+ [1][1][RTW89_MEXICO][8] = 44, -+ [1][1][RTW89_CN][8] = 22, -+ [1][1][RTW89_QATAR][8] = 22, -+ [1][1][RTW89_UK][8] = 22, -+ [1][1][RTW89_FCC][10] = 44, -+ [1][1][RTW89_ETSI][10] = 22, -+ [1][1][RTW89_MKK][10] = 20, -+ [1][1][RTW89_IC][10] = 44, -+ [1][1][RTW89_KCC][10] = 36, -+ [1][1][RTW89_ACMA][10] = 22, -+ [1][1][RTW89_CHILE][10] = 54, -+ [1][1][RTW89_UKRAINE][10] = 22, -+ [1][1][RTW89_MEXICO][10] = 44, -+ [1][1][RTW89_CN][10] = 22, -+ [1][1][RTW89_QATAR][10] = 22, -+ [1][1][RTW89_UK][10] = 22, -+ [1][1][RTW89_FCC][12] = 46, -+ [1][1][RTW89_ETSI][12] = 22, -+ [1][1][RTW89_MKK][12] = 22, -+ [1][1][RTW89_IC][12] = 46, -+ [1][1][RTW89_KCC][12] = 40, -+ [1][1][RTW89_ACMA][12] = 22, -+ [1][1][RTW89_CHILE][12] = 52, -+ [1][1][RTW89_UKRAINE][12] = 22, -+ [1][1][RTW89_MEXICO][12] = 46, -+ [1][1][RTW89_CN][12] = 22, -+ [1][1][RTW89_QATAR][12] = 22, -+ [1][1][RTW89_UK][12] = 22, -+ [1][1][RTW89_FCC][14] = 42, -+ [1][1][RTW89_ETSI][14] = 22, -+ [1][1][RTW89_MKK][14] = 22, -+ [1][1][RTW89_IC][14] = 40, -+ [1][1][RTW89_KCC][14] = 40, -+ [1][1][RTW89_ACMA][14] = 22, -+ [1][1][RTW89_CHILE][14] = 54, -+ [1][1][RTW89_UKRAINE][14] = 22, -+ [1][1][RTW89_MEXICO][14] = 42, -+ [1][1][RTW89_CN][14] = 22, -+ [1][1][RTW89_QATAR][14] = 22, -+ [1][1][RTW89_UK][14] = 22, -+ [1][1][RTW89_FCC][15] = 42, -+ [1][1][RTW89_ETSI][15] = 22, -+ [1][1][RTW89_MKK][15] = 42, -+ [1][1][RTW89_IC][15] = 42, -+ [1][1][RTW89_KCC][15] = 38, -+ [1][1][RTW89_ACMA][15] = 22, -+ [1][1][RTW89_CHILE][15] = 54, -+ [1][1][RTW89_UKRAINE][15] = 22, -+ [1][1][RTW89_MEXICO][15] = 42, -+ [1][1][RTW89_CN][15] = 127, -+ [1][1][RTW89_QATAR][15] = 22, -+ [1][1][RTW89_UK][15] = 22, -+ [1][1][RTW89_FCC][17] = 42, -+ [1][1][RTW89_ETSI][17] = 22, -+ [1][1][RTW89_MKK][17] = 44, -+ [1][1][RTW89_IC][17] = 42, -+ [1][1][RTW89_KCC][17] = 38, -+ [1][1][RTW89_ACMA][17] = 22, -+ [1][1][RTW89_CHILE][17] = 54, -+ [1][1][RTW89_UKRAINE][17] = 22, -+ [1][1][RTW89_MEXICO][17] = 42, -+ [1][1][RTW89_CN][17] = 127, -+ [1][1][RTW89_QATAR][17] = 22, -+ [1][1][RTW89_UK][17] = 22, -+ [1][1][RTW89_FCC][19] = 42, -+ [1][1][RTW89_ETSI][19] = 22, -+ [1][1][RTW89_MKK][19] = 44, -+ [1][1][RTW89_IC][19] = 42, -+ [1][1][RTW89_KCC][19] = 38, -+ [1][1][RTW89_ACMA][19] = 22, -+ [1][1][RTW89_CHILE][19] = 54, -+ [1][1][RTW89_UKRAINE][19] = 22, -+ [1][1][RTW89_MEXICO][19] = 42, -+ [1][1][RTW89_CN][19] = 127, -+ [1][1][RTW89_QATAR][19] = 22, -+ [1][1][RTW89_UK][19] = 22, -+ [1][1][RTW89_FCC][21] = 42, -+ [1][1][RTW89_ETSI][21] = 22, -+ [1][1][RTW89_MKK][21] = 44, -+ [1][1][RTW89_IC][21] = 42, -+ [1][1][RTW89_KCC][21] = 38, -+ [1][1][RTW89_ACMA][21] = 22, -+ [1][1][RTW89_CHILE][21] = 54, -+ [1][1][RTW89_UKRAINE][21] = 22, -+ [1][1][RTW89_MEXICO][21] = 42, -+ [1][1][RTW89_CN][21] = 127, -+ [1][1][RTW89_QATAR][21] = 22, -+ [1][1][RTW89_UK][21] = 22, -+ [1][1][RTW89_FCC][23] = 42, -+ [1][1][RTW89_ETSI][23] = 22, -+ [1][1][RTW89_MKK][23] = 44, -+ [1][1][RTW89_IC][23] = 42, -+ [1][1][RTW89_KCC][23] = 38, -+ [1][1][RTW89_ACMA][23] = 22, -+ [1][1][RTW89_CHILE][23] = 54, -+ [1][1][RTW89_UKRAINE][23] = 22, -+ [1][1][RTW89_MEXICO][23] = 42, -+ [1][1][RTW89_CN][23] = 127, -+ [1][1][RTW89_QATAR][23] = 22, -+ [1][1][RTW89_UK][23] = 22, -+ [1][1][RTW89_FCC][25] = 42, -+ [1][1][RTW89_ETSI][25] = 22, -+ [1][1][RTW89_MKK][25] = 44, -+ [1][1][RTW89_IC][25] = 127, -+ [1][1][RTW89_KCC][25] = 38, -+ [1][1][RTW89_ACMA][25] = 127, -+ [1][1][RTW89_CHILE][25] = 54, -+ [1][1][RTW89_UKRAINE][25] = 22, -+ [1][1][RTW89_MEXICO][25] = 42, -+ [1][1][RTW89_CN][25] = 127, -+ [1][1][RTW89_QATAR][25] = 22, -+ [1][1][RTW89_UK][25] = 22, -+ [1][1][RTW89_FCC][27] = 42, -+ [1][1][RTW89_ETSI][27] = 22, -+ [1][1][RTW89_MKK][27] = 44, -+ [1][1][RTW89_IC][27] = 127, -+ [1][1][RTW89_KCC][27] = 38, -+ [1][1][RTW89_ACMA][27] = 127, -+ [1][1][RTW89_CHILE][27] = 54, -+ [1][1][RTW89_UKRAINE][27] = 22, -+ [1][1][RTW89_MEXICO][27] = 42, -+ [1][1][RTW89_CN][27] = 127, -+ [1][1][RTW89_QATAR][27] = 22, -+ [1][1][RTW89_UK][27] = 22, -+ [1][1][RTW89_FCC][29] = 42, -+ [1][1][RTW89_ETSI][29] = 22, -+ [1][1][RTW89_MKK][29] = 44, -+ [1][1][RTW89_IC][29] = 127, -+ [1][1][RTW89_KCC][29] = 38, -+ [1][1][RTW89_ACMA][29] = 127, -+ [1][1][RTW89_CHILE][29] = 54, -+ [1][1][RTW89_UKRAINE][29] = 22, -+ [1][1][RTW89_MEXICO][29] = 42, -+ [1][1][RTW89_CN][29] = 127, -+ [1][1][RTW89_QATAR][29] = 22, -+ [1][1][RTW89_UK][29] = 22, -+ [1][1][RTW89_FCC][31] = 42, -+ [1][1][RTW89_ETSI][31] = 22, -+ [1][1][RTW89_MKK][31] = 44, -+ [1][1][RTW89_IC][31] = 38, -+ [1][1][RTW89_KCC][31] = 38, -+ [1][1][RTW89_ACMA][31] = 22, -+ [1][1][RTW89_CHILE][31] = 54, -+ [1][1][RTW89_UKRAINE][31] = 22, -+ [1][1][RTW89_MEXICO][31] = 42, -+ [1][1][RTW89_CN][31] = 127, -+ [1][1][RTW89_QATAR][31] = 22, -+ [1][1][RTW89_UK][31] = 22, -+ [1][1][RTW89_FCC][33] = 40, -+ [1][1][RTW89_ETSI][33] = 22, -+ [1][1][RTW89_MKK][33] = 44, -+ [1][1][RTW89_IC][33] = 38, -+ [1][1][RTW89_KCC][33] = 38, -+ [1][1][RTW89_ACMA][33] = 22, -+ [1][1][RTW89_CHILE][33] = 54, -+ [1][1][RTW89_UKRAINE][33] = 22, -+ [1][1][RTW89_MEXICO][33] = 40, -+ [1][1][RTW89_CN][33] = 127, -+ [1][1][RTW89_QATAR][33] = 22, -+ [1][1][RTW89_UK][33] = 22, -+ [1][1][RTW89_FCC][35] = 40, -+ [1][1][RTW89_ETSI][35] = 22, -+ [1][1][RTW89_MKK][35] = 44, -+ [1][1][RTW89_IC][35] = 38, -+ [1][1][RTW89_KCC][35] = 38, -+ [1][1][RTW89_ACMA][35] = 22, -+ [1][1][RTW89_CHILE][35] = 54, -+ [1][1][RTW89_UKRAINE][35] = 22, -+ [1][1][RTW89_MEXICO][35] = 40, -+ [1][1][RTW89_CN][35] = 127, -+ [1][1][RTW89_QATAR][35] = 22, -+ [1][1][RTW89_UK][35] = 22, -+ [1][1][RTW89_FCC][37] = 48, -+ [1][1][RTW89_ETSI][37] = 127, -+ [1][1][RTW89_MKK][37] = 42, -+ [1][1][RTW89_IC][37] = 48, -+ [1][1][RTW89_KCC][37] = 38, -+ [1][1][RTW89_ACMA][37] = 48, -+ [1][1][RTW89_CHILE][37] = 54, -+ [1][1][RTW89_UKRAINE][37] = 127, -+ [1][1][RTW89_MEXICO][37] = 48, -+ [1][1][RTW89_CN][37] = 127, -+ [1][1][RTW89_QATAR][37] = 127, -+ [1][1][RTW89_UK][37] = 54, -+ [1][1][RTW89_FCC][38] = 84, -+ [1][1][RTW89_ETSI][38] = 16, -+ [1][1][RTW89_MKK][38] = 127, -+ [1][1][RTW89_IC][38] = 84, -+ [1][1][RTW89_KCC][38] = 38, -+ [1][1][RTW89_ACMA][38] = 82, -+ [1][1][RTW89_CHILE][38] = 54, -+ [1][1][RTW89_UKRAINE][38] = 16, -+ [1][1][RTW89_MEXICO][38] = 84, -+ [1][1][RTW89_CN][38] = 62, -+ [1][1][RTW89_QATAR][38] = 16, -+ [1][1][RTW89_UK][38] = 26, -+ [1][1][RTW89_FCC][40] = 84, -+ [1][1][RTW89_ETSI][40] = 16, -+ [1][1][RTW89_MKK][40] = 127, -+ [1][1][RTW89_IC][40] = 84, -+ [1][1][RTW89_KCC][40] = 38, -+ [1][1][RTW89_ACMA][40] = 82, -+ [1][1][RTW89_CHILE][40] = 54, -+ [1][1][RTW89_UKRAINE][40] = 16, -+ [1][1][RTW89_MEXICO][40] = 84, -+ [1][1][RTW89_CN][40] = 62, -+ [1][1][RTW89_QATAR][40] = 16, -+ [1][1][RTW89_UK][40] = 26, -+ [1][1][RTW89_FCC][42] = 84, -+ [1][1][RTW89_ETSI][42] = 16, -+ [1][1][RTW89_MKK][42] = 127, -+ [1][1][RTW89_IC][42] = 84, -+ [1][1][RTW89_KCC][42] = 38, -+ [1][1][RTW89_ACMA][42] = 84, -+ [1][1][RTW89_CHILE][42] = 54, -+ [1][1][RTW89_UKRAINE][42] = 16, -+ [1][1][RTW89_MEXICO][42] = 84, -+ [1][1][RTW89_CN][42] = 62, -+ [1][1][RTW89_QATAR][42] = 16, -+ [1][1][RTW89_UK][42] = 26, -+ [1][1][RTW89_FCC][44] = 84, -+ [1][1][RTW89_ETSI][44] = 16, -+ [1][1][RTW89_MKK][44] = 127, -+ [1][1][RTW89_IC][44] = 84, -+ [1][1][RTW89_KCC][44] = 38, -+ [1][1][RTW89_ACMA][44] = 84, -+ [1][1][RTW89_CHILE][44] = 56, -+ [1][1][RTW89_UKRAINE][44] = 16, -+ [1][1][RTW89_MEXICO][44] = 84, -+ [1][1][RTW89_CN][44] = 62, -+ [1][1][RTW89_QATAR][44] = 16, -+ [1][1][RTW89_UK][44] = 26, -+ [1][1][RTW89_FCC][46] = 84, -+ [1][1][RTW89_ETSI][46] = 16, -+ [1][1][RTW89_MKK][46] = 127, -+ [1][1][RTW89_IC][46] = 84, -+ [1][1][RTW89_KCC][46] = 38, -+ [1][1][RTW89_ACMA][46] = 84, -+ [1][1][RTW89_CHILE][46] = 56, -+ [1][1][RTW89_UKRAINE][46] = 16, -+ [1][1][RTW89_MEXICO][46] = 84, -+ [1][1][RTW89_CN][46] = 62, -+ [1][1][RTW89_QATAR][46] = 16, -+ [1][1][RTW89_UK][46] = 26, -+ [1][1][RTW89_FCC][48] = 32, -+ [1][1][RTW89_ETSI][48] = 127, -+ [1][1][RTW89_MKK][48] = 127, -+ [1][1][RTW89_IC][48] = 127, -+ [1][1][RTW89_KCC][48] = 127, -+ [1][1][RTW89_ACMA][48] = 127, -+ [1][1][RTW89_CHILE][48] = 127, -+ [1][1][RTW89_UKRAINE][48] = 127, -+ [1][1][RTW89_MEXICO][48] = 127, -+ [1][1][RTW89_CN][48] = 127, -+ [1][1][RTW89_QATAR][48] = 127, -+ [1][1][RTW89_UK][48] = 127, -+ [1][1][RTW89_FCC][50] = 32, -+ [1][1][RTW89_ETSI][50] = 127, -+ [1][1][RTW89_MKK][50] = 127, -+ [1][1][RTW89_IC][50] = 127, -+ [1][1][RTW89_KCC][50] = 127, -+ [1][1][RTW89_ACMA][50] = 127, -+ [1][1][RTW89_CHILE][50] = 127, -+ [1][1][RTW89_UKRAINE][50] = 127, -+ [1][1][RTW89_MEXICO][50] = 127, -+ [1][1][RTW89_CN][50] = 127, -+ [1][1][RTW89_QATAR][50] = 127, -+ [1][1][RTW89_UK][50] = 127, -+ [1][1][RTW89_FCC][52] = 32, -+ [1][1][RTW89_ETSI][52] = 127, -+ [1][1][RTW89_MKK][52] = 127, -+ [1][1][RTW89_IC][52] = 127, -+ [1][1][RTW89_KCC][52] = 127, -+ [1][1][RTW89_ACMA][52] = 127, -+ [1][1][RTW89_CHILE][52] = 127, -+ [1][1][RTW89_UKRAINE][52] = 127, -+ [1][1][RTW89_MEXICO][52] = 127, -+ [1][1][RTW89_CN][52] = 127, -+ [1][1][RTW89_QATAR][52] = 127, -+ [1][1][RTW89_UK][52] = 127, -+ [2][0][RTW89_FCC][0] = 70, -+ [2][0][RTW89_ETSI][0] = 48, -+ [2][0][RTW89_MKK][0] = 48, -+ [2][0][RTW89_IC][0] = 46, -+ [2][0][RTW89_KCC][0] = 66, -+ [2][0][RTW89_ACMA][0] = 48, -+ [2][0][RTW89_CHILE][0] = 44, -+ [2][0][RTW89_UKRAINE][0] = 48, -+ [2][0][RTW89_MEXICO][0] = 64, -+ [2][0][RTW89_CN][0] = 48, -+ [2][0][RTW89_QATAR][0] = 48, -+ [2][0][RTW89_UK][0] = 48, -+ [2][0][RTW89_FCC][2] = 70, -+ [2][0][RTW89_ETSI][2] = 48, -+ [2][0][RTW89_MKK][2] = 48, -+ [2][0][RTW89_IC][2] = 46, -+ [2][0][RTW89_KCC][2] = 66, -+ [2][0][RTW89_ACMA][2] = 48, -+ [2][0][RTW89_CHILE][2] = 44, -+ [2][0][RTW89_UKRAINE][2] = 48, -+ [2][0][RTW89_MEXICO][2] = 64, -+ [2][0][RTW89_CN][2] = 48, -+ [2][0][RTW89_QATAR][2] = 48, -+ [2][0][RTW89_UK][2] = 48, -+ [2][0][RTW89_FCC][4] = 70, -+ [2][0][RTW89_ETSI][4] = 48, -+ [2][0][RTW89_MKK][4] = 48, -+ [2][0][RTW89_IC][4] = 46, -+ [2][0][RTW89_KCC][4] = 66, -+ [2][0][RTW89_ACMA][4] = 48, -+ [2][0][RTW89_CHILE][4] = 44, -+ [2][0][RTW89_UKRAINE][4] = 48, -+ [2][0][RTW89_MEXICO][4] = 64, -+ [2][0][RTW89_CN][4] = 48, -+ [2][0][RTW89_QATAR][4] = 48, -+ [2][0][RTW89_UK][4] = 48, -+ [2][0][RTW89_FCC][6] = 70, -+ [2][0][RTW89_ETSI][6] = 48, -+ [2][0][RTW89_MKK][6] = 48, -+ [2][0][RTW89_IC][6] = 46, -+ [2][0][RTW89_KCC][6] = 38, -+ [2][0][RTW89_ACMA][6] = 48, -+ [2][0][RTW89_CHILE][6] = 44, -+ [2][0][RTW89_UKRAINE][6] = 48, -+ [2][0][RTW89_MEXICO][6] = 64, -+ [2][0][RTW89_CN][6] = 48, -+ [2][0][RTW89_QATAR][6] = 48, -+ [2][0][RTW89_UK][6] = 48, -+ [2][0][RTW89_FCC][8] = 70, -+ [2][0][RTW89_ETSI][8] = 48, -+ [2][0][RTW89_MKK][8] = 48, -+ [2][0][RTW89_IC][8] = 66, -+ [2][0][RTW89_KCC][8] = 64, -+ [2][0][RTW89_ACMA][8] = 48, -+ [2][0][RTW89_CHILE][8] = 66, -+ [2][0][RTW89_UKRAINE][8] = 48, -+ [2][0][RTW89_MEXICO][8] = 70, -+ [2][0][RTW89_CN][8] = 48, -+ [2][0][RTW89_QATAR][8] = 48, -+ [2][0][RTW89_UK][8] = 48, -+ [2][0][RTW89_FCC][10] = 70, -+ [2][0][RTW89_ETSI][10] = 48, -+ [2][0][RTW89_MKK][10] = 48, -+ [2][0][RTW89_IC][10] = 66, -+ [2][0][RTW89_KCC][10] = 64, -+ [2][0][RTW89_ACMA][10] = 48, -+ [2][0][RTW89_CHILE][10] = 66, -+ [2][0][RTW89_UKRAINE][10] = 48, -+ [2][0][RTW89_MEXICO][10] = 70, -+ [2][0][RTW89_CN][10] = 48, -+ [2][0][RTW89_QATAR][10] = 48, -+ [2][0][RTW89_UK][10] = 48, -+ [2][0][RTW89_FCC][12] = 70, -+ [2][0][RTW89_ETSI][12] = 48, -+ [2][0][RTW89_MKK][12] = 46, -+ [2][0][RTW89_IC][12] = 66, -+ [2][0][RTW89_KCC][12] = 64, -+ [2][0][RTW89_ACMA][12] = 48, -+ [2][0][RTW89_CHILE][12] = 66, -+ [2][0][RTW89_UKRAINE][12] = 48, -+ [2][0][RTW89_MEXICO][12] = 70, -+ [2][0][RTW89_CN][12] = 48, -+ [2][0][RTW89_QATAR][12] = 48, -+ [2][0][RTW89_UK][12] = 48, -+ [2][0][RTW89_FCC][14] = 70, -+ [2][0][RTW89_ETSI][14] = 48, -+ [2][0][RTW89_MKK][14] = 46, -+ [2][0][RTW89_IC][14] = 66, -+ [2][0][RTW89_KCC][14] = 64, -+ [2][0][RTW89_ACMA][14] = 48, -+ [2][0][RTW89_CHILE][14] = 66, -+ [2][0][RTW89_UKRAINE][14] = 48, -+ [2][0][RTW89_MEXICO][14] = 70, -+ [2][0][RTW89_CN][14] = 48, -+ [2][0][RTW89_QATAR][14] = 48, -+ [2][0][RTW89_UK][14] = 48, -+ [2][0][RTW89_FCC][15] = 70, -+ [2][0][RTW89_ETSI][15] = 48, -+ [2][0][RTW89_MKK][15] = 68, -+ [2][0][RTW89_IC][15] = 70, -+ [2][0][RTW89_KCC][15] = 64, -+ [2][0][RTW89_ACMA][15] = 48, -+ [2][0][RTW89_CHILE][15] = 62, -+ [2][0][RTW89_UKRAINE][15] = 48, -+ [2][0][RTW89_MEXICO][15] = 70, -+ [2][0][RTW89_CN][15] = 127, -+ [2][0][RTW89_QATAR][15] = 48, -+ [2][0][RTW89_UK][15] = 48, -+ [2][0][RTW89_FCC][17] = 70, -+ [2][0][RTW89_ETSI][17] = 48, -+ [2][0][RTW89_MKK][17] = 70, -+ [2][0][RTW89_IC][17] = 70, -+ [2][0][RTW89_KCC][17] = 64, -+ [2][0][RTW89_ACMA][17] = 48, -+ [2][0][RTW89_CHILE][17] = 62, -+ [2][0][RTW89_UKRAINE][17] = 48, -+ [2][0][RTW89_MEXICO][17] = 70, -+ [2][0][RTW89_CN][17] = 127, -+ [2][0][RTW89_QATAR][17] = 48, -+ [2][0][RTW89_UK][17] = 48, -+ [2][0][RTW89_FCC][19] = 70, -+ [2][0][RTW89_ETSI][19] = 48, -+ [2][0][RTW89_MKK][19] = 70, -+ [2][0][RTW89_IC][19] = 70, -+ [2][0][RTW89_KCC][19] = 64, -+ [2][0][RTW89_ACMA][19] = 48, -+ [2][0][RTW89_CHILE][19] = 62, -+ [2][0][RTW89_UKRAINE][19] = 48, -+ [2][0][RTW89_MEXICO][19] = 70, -+ [2][0][RTW89_CN][19] = 127, -+ [2][0][RTW89_QATAR][19] = 48, -+ [2][0][RTW89_UK][19] = 48, -+ [2][0][RTW89_FCC][21] = 70, -+ [2][0][RTW89_ETSI][21] = 48, -+ [2][0][RTW89_MKK][21] = 70, -+ [2][0][RTW89_IC][21] = 70, -+ [2][0][RTW89_KCC][21] = 64, -+ [2][0][RTW89_ACMA][21] = 48, -+ [2][0][RTW89_CHILE][21] = 64, -+ [2][0][RTW89_UKRAINE][21] = 48, -+ [2][0][RTW89_MEXICO][21] = 70, -+ [2][0][RTW89_CN][21] = 127, -+ [2][0][RTW89_QATAR][21] = 48, -+ [2][0][RTW89_UK][21] = 48, -+ [2][0][RTW89_FCC][23] = 70, -+ [2][0][RTW89_ETSI][23] = 48, -+ [2][0][RTW89_MKK][23] = 70, -+ [2][0][RTW89_IC][23] = 70, -+ [2][0][RTW89_KCC][23] = 64, -+ [2][0][RTW89_ACMA][23] = 48, -+ [2][0][RTW89_CHILE][23] = 64, -+ [2][0][RTW89_UKRAINE][23] = 48, -+ [2][0][RTW89_MEXICO][23] = 70, -+ [2][0][RTW89_CN][23] = 127, -+ [2][0][RTW89_QATAR][23] = 48, -+ [2][0][RTW89_UK][23] = 48, -+ [2][0][RTW89_FCC][25] = 70, -+ [2][0][RTW89_ETSI][25] = 48, -+ [2][0][RTW89_MKK][25] = 70, -+ [2][0][RTW89_IC][25] = 127, -+ [2][0][RTW89_KCC][25] = 64, -+ [2][0][RTW89_ACMA][25] = 127, -+ [2][0][RTW89_CHILE][25] = 64, -+ [2][0][RTW89_UKRAINE][25] = 48, -+ [2][0][RTW89_MEXICO][25] = 70, -+ [2][0][RTW89_CN][25] = 127, -+ [2][0][RTW89_QATAR][25] = 48, -+ [2][0][RTW89_UK][25] = 48, -+ [2][0][RTW89_FCC][27] = 70, -+ [2][0][RTW89_ETSI][27] = 48, -+ [2][0][RTW89_MKK][27] = 70, -+ [2][0][RTW89_IC][27] = 127, -+ [2][0][RTW89_KCC][27] = 64, -+ [2][0][RTW89_ACMA][27] = 127, -+ [2][0][RTW89_CHILE][27] = 64, -+ [2][0][RTW89_UKRAINE][27] = 48, -+ [2][0][RTW89_MEXICO][27] = 70, -+ [2][0][RTW89_CN][27] = 127, -+ [2][0][RTW89_QATAR][27] = 48, -+ [2][0][RTW89_UK][27] = 48, -+ [2][0][RTW89_FCC][29] = 70, -+ [2][0][RTW89_ETSI][29] = 48, -+ [2][0][RTW89_MKK][29] = 70, -+ [2][0][RTW89_IC][29] = 127, -+ [2][0][RTW89_KCC][29] = 64, -+ [2][0][RTW89_ACMA][29] = 127, -+ [2][0][RTW89_CHILE][29] = 66, -+ [2][0][RTW89_UKRAINE][29] = 48, -+ [2][0][RTW89_MEXICO][29] = 70, -+ [2][0][RTW89_CN][29] = 127, -+ [2][0][RTW89_QATAR][29] = 48, -+ [2][0][RTW89_UK][29] = 48, -+ [2][0][RTW89_FCC][31] = 70, -+ [2][0][RTW89_ETSI][31] = 48, -+ [2][0][RTW89_MKK][31] = 70, -+ [2][0][RTW89_IC][31] = 72, -+ [2][0][RTW89_KCC][31] = 64, -+ [2][0][RTW89_ACMA][31] = 48, -+ [2][0][RTW89_CHILE][31] = 66, -+ [2][0][RTW89_UKRAINE][31] = 48, -+ [2][0][RTW89_MEXICO][31] = 70, -+ [2][0][RTW89_CN][31] = 127, -+ [2][0][RTW89_QATAR][31] = 48, -+ [2][0][RTW89_UK][31] = 48, -+ [2][0][RTW89_FCC][33] = 72, -+ [2][0][RTW89_ETSI][33] = 48, -+ [2][0][RTW89_MKK][33] = 70, -+ [2][0][RTW89_IC][33] = 72, -+ [2][0][RTW89_KCC][33] = 64, -+ [2][0][RTW89_ACMA][33] = 48, -+ [2][0][RTW89_CHILE][33] = 66, -+ [2][0][RTW89_UKRAINE][33] = 48, -+ [2][0][RTW89_MEXICO][33] = 72, -+ [2][0][RTW89_CN][33] = 127, -+ [2][0][RTW89_QATAR][33] = 48, -+ [2][0][RTW89_UK][33] = 48, -+ [2][0][RTW89_FCC][35] = 72, -+ [2][0][RTW89_ETSI][35] = 48, -+ [2][0][RTW89_MKK][35] = 70, -+ [2][0][RTW89_IC][35] = 72, -+ [2][0][RTW89_KCC][35] = 64, -+ [2][0][RTW89_ACMA][35] = 48, -+ [2][0][RTW89_CHILE][35] = 66, -+ [2][0][RTW89_UKRAINE][35] = 48, -+ [2][0][RTW89_MEXICO][35] = 72, -+ [2][0][RTW89_CN][35] = 127, -+ [2][0][RTW89_QATAR][35] = 48, -+ [2][0][RTW89_UK][35] = 48, -+ [2][0][RTW89_FCC][37] = 70, -+ [2][0][RTW89_ETSI][37] = 127, -+ [2][0][RTW89_MKK][37] = 66, -+ [2][0][RTW89_IC][37] = 70, -+ [2][0][RTW89_KCC][37] = 64, -+ [2][0][RTW89_ACMA][37] = 76, -+ [2][0][RTW89_CHILE][37] = 66, -+ [2][0][RTW89_UKRAINE][37] = 127, -+ [2][0][RTW89_MEXICO][37] = 70, -+ [2][0][RTW89_CN][37] = 127, -+ [2][0][RTW89_QATAR][37] = 127, -+ [2][0][RTW89_UK][37] = 76, -+ [2][0][RTW89_FCC][38] = 84, -+ [2][0][RTW89_ETSI][38] = 28, -+ [2][0][RTW89_MKK][38] = 127, -+ [2][0][RTW89_IC][38] = 84, -+ [2][0][RTW89_KCC][38] = 66, -+ [2][0][RTW89_ACMA][38] = 84, -+ [2][0][RTW89_CHILE][38] = 64, -+ [2][0][RTW89_UKRAINE][38] = 28, -+ [2][0][RTW89_MEXICO][38] = 84, -+ [2][0][RTW89_CN][38] = 76, -+ [2][0][RTW89_QATAR][38] = 28, -+ [2][0][RTW89_UK][38] = 50, -+ [2][0][RTW89_FCC][40] = 84, -+ [2][0][RTW89_ETSI][40] = 28, -+ [2][0][RTW89_MKK][40] = 127, -+ [2][0][RTW89_IC][40] = 84, -+ [2][0][RTW89_KCC][40] = 66, -+ [2][0][RTW89_ACMA][40] = 84, -+ [2][0][RTW89_CHILE][40] = 64, -+ [2][0][RTW89_UKRAINE][40] = 28, -+ [2][0][RTW89_MEXICO][40] = 84, -+ [2][0][RTW89_CN][40] = 76, -+ [2][0][RTW89_QATAR][40] = 28, -+ [2][0][RTW89_UK][40] = 50, -+ [2][0][RTW89_FCC][42] = 84, -+ [2][0][RTW89_ETSI][42] = 28, -+ [2][0][RTW89_MKK][42] = 127, -+ [2][0][RTW89_IC][42] = 84, -+ [2][0][RTW89_KCC][42] = 66, -+ [2][0][RTW89_ACMA][42] = 84, -+ [2][0][RTW89_CHILE][42] = 66, -+ [2][0][RTW89_UKRAINE][42] = 28, -+ [2][0][RTW89_MEXICO][42] = 84, -+ [2][0][RTW89_CN][42] = 76, -+ [2][0][RTW89_QATAR][42] = 28, -+ [2][0][RTW89_UK][42] = 50, -+ [2][0][RTW89_FCC][44] = 84, -+ [2][0][RTW89_ETSI][44] = 28, -+ [2][0][RTW89_MKK][44] = 127, -+ [2][0][RTW89_IC][44] = 84, -+ [2][0][RTW89_KCC][44] = 66, -+ [2][0][RTW89_ACMA][44] = 84, -+ [2][0][RTW89_CHILE][44] = 64, -+ [2][0][RTW89_UKRAINE][44] = 28, -+ [2][0][RTW89_MEXICO][44] = 84, -+ [2][0][RTW89_CN][44] = 76, -+ [2][0][RTW89_QATAR][44] = 28, -+ [2][0][RTW89_UK][44] = 50, -+ [2][0][RTW89_FCC][46] = 84, -+ [2][0][RTW89_ETSI][46] = 28, -+ [2][0][RTW89_MKK][46] = 127, -+ [2][0][RTW89_IC][46] = 84, -+ [2][0][RTW89_KCC][46] = 66, -+ [2][0][RTW89_ACMA][46] = 84, -+ [2][0][RTW89_CHILE][46] = 64, -+ [2][0][RTW89_UKRAINE][46] = 28, -+ [2][0][RTW89_MEXICO][46] = 84, -+ [2][0][RTW89_CN][46] = 76, -+ [2][0][RTW89_QATAR][46] = 28, -+ [2][0][RTW89_UK][46] = 50, -+ [2][0][RTW89_FCC][48] = 56, -+ [2][0][RTW89_ETSI][48] = 127, -+ [2][0][RTW89_MKK][48] = 127, -+ [2][0][RTW89_IC][48] = 127, -+ [2][0][RTW89_KCC][48] = 127, -+ [2][0][RTW89_ACMA][48] = 127, -+ [2][0][RTW89_CHILE][48] = 127, -+ [2][0][RTW89_UKRAINE][48] = 127, -+ [2][0][RTW89_MEXICO][48] = 127, -+ [2][0][RTW89_CN][48] = 127, -+ [2][0][RTW89_QATAR][48] = 127, -+ [2][0][RTW89_UK][48] = 127, -+ [2][0][RTW89_FCC][50] = 56, -+ [2][0][RTW89_ETSI][50] = 127, -+ [2][0][RTW89_MKK][50] = 127, -+ [2][0][RTW89_IC][50] = 127, -+ [2][0][RTW89_KCC][50] = 127, -+ [2][0][RTW89_ACMA][50] = 127, -+ [2][0][RTW89_CHILE][50] = 127, -+ [2][0][RTW89_UKRAINE][50] = 127, -+ [2][0][RTW89_MEXICO][50] = 127, -+ [2][0][RTW89_CN][50] = 127, -+ [2][0][RTW89_QATAR][50] = 127, -+ [2][0][RTW89_UK][50] = 127, -+ [2][0][RTW89_FCC][52] = 56, -+ [2][0][RTW89_ETSI][52] = 127, -+ [2][0][RTW89_MKK][52] = 127, -+ [2][0][RTW89_IC][52] = 127, -+ [2][0][RTW89_KCC][52] = 127, -+ [2][0][RTW89_ACMA][52] = 127, -+ [2][0][RTW89_CHILE][52] = 127, -+ [2][0][RTW89_UKRAINE][52] = 127, -+ [2][0][RTW89_MEXICO][52] = 127, -+ [2][0][RTW89_CN][52] = 127, -+ [2][0][RTW89_QATAR][52] = 127, -+ [2][0][RTW89_UK][52] = 127, -+ [2][1][RTW89_FCC][0] = 50, -+ [2][1][RTW89_ETSI][0] = 36, -+ [2][1][RTW89_MKK][0] = 36, -+ [2][1][RTW89_IC][0] = 20, -+ [2][1][RTW89_KCC][0] = 46, -+ [2][1][RTW89_ACMA][0] = 36, -+ [2][1][RTW89_CHILE][0] = 32, -+ [2][1][RTW89_UKRAINE][0] = 36, -+ [2][1][RTW89_MEXICO][0] = 52, -+ [2][1][RTW89_CN][0] = 36, -+ [2][1][RTW89_QATAR][0] = 36, -+ [2][1][RTW89_UK][0] = 36, -+ [2][1][RTW89_FCC][2] = 50, -+ [2][1][RTW89_ETSI][2] = 36, -+ [2][1][RTW89_MKK][2] = 36, -+ [2][1][RTW89_IC][2] = 18, -+ [2][1][RTW89_KCC][2] = 46, -+ [2][1][RTW89_ACMA][2] = 36, -+ [2][1][RTW89_CHILE][2] = 32, -+ [2][1][RTW89_UKRAINE][2] = 36, -+ [2][1][RTW89_MEXICO][2] = 52, -+ [2][1][RTW89_CN][2] = 36, -+ [2][1][RTW89_QATAR][2] = 36, -+ [2][1][RTW89_UK][2] = 36, -+ [2][1][RTW89_FCC][4] = 50, -+ [2][1][RTW89_ETSI][4] = 36, -+ [2][1][RTW89_MKK][4] = 36, -+ [2][1][RTW89_IC][4] = 22, -+ [2][1][RTW89_KCC][4] = 46, -+ [2][1][RTW89_ACMA][4] = 36, -+ [2][1][RTW89_CHILE][4] = 30, -+ [2][1][RTW89_UKRAINE][4] = 36, -+ [2][1][RTW89_MEXICO][4] = 52, -+ [2][1][RTW89_CN][4] = 36, -+ [2][1][RTW89_QATAR][4] = 36, -+ [2][1][RTW89_UK][4] = 36, -+ [2][1][RTW89_FCC][6] = 50, -+ [2][1][RTW89_ETSI][6] = 36, -+ [2][1][RTW89_MKK][6] = 36, -+ [2][1][RTW89_IC][6] = 22, -+ [2][1][RTW89_KCC][6] = 22, -+ [2][1][RTW89_ACMA][6] = 36, -+ [2][1][RTW89_CHILE][6] = 30, -+ [2][1][RTW89_UKRAINE][6] = 36, -+ [2][1][RTW89_MEXICO][6] = 52, -+ [2][1][RTW89_CN][6] = 36, -+ [2][1][RTW89_QATAR][6] = 36, -+ [2][1][RTW89_UK][6] = 36, -+ [2][1][RTW89_FCC][8] = 50, -+ [2][1][RTW89_ETSI][8] = 36, -+ [2][1][RTW89_MKK][8] = 34, -+ [2][1][RTW89_IC][8] = 50, -+ [2][1][RTW89_KCC][8] = 48, -+ [2][1][RTW89_ACMA][8] = 36, -+ [2][1][RTW89_CHILE][8] = 54, -+ [2][1][RTW89_UKRAINE][8] = 36, -+ [2][1][RTW89_MEXICO][8] = 50, -+ [2][1][RTW89_CN][8] = 36, -+ [2][1][RTW89_QATAR][8] = 36, -+ [2][1][RTW89_UK][8] = 36, -+ [2][1][RTW89_FCC][10] = 50, -+ [2][1][RTW89_ETSI][10] = 36, -+ [2][1][RTW89_MKK][10] = 34, -+ [2][1][RTW89_IC][10] = 50, -+ [2][1][RTW89_KCC][10] = 48, -+ [2][1][RTW89_ACMA][10] = 36, -+ [2][1][RTW89_CHILE][10] = 54, -+ [2][1][RTW89_UKRAINE][10] = 36, -+ [2][1][RTW89_MEXICO][10] = 50, -+ [2][1][RTW89_CN][10] = 36, -+ [2][1][RTW89_QATAR][10] = 36, -+ [2][1][RTW89_UK][10] = 36, -+ [2][1][RTW89_FCC][12] = 52, -+ [2][1][RTW89_ETSI][12] = 36, -+ [2][1][RTW89_MKK][12] = 36, -+ [2][1][RTW89_IC][12] = 52, -+ [2][1][RTW89_KCC][12] = 48, -+ [2][1][RTW89_ACMA][12] = 36, -+ [2][1][RTW89_CHILE][12] = 54, -+ [2][1][RTW89_UKRAINE][12] = 36, -+ [2][1][RTW89_MEXICO][12] = 52, -+ [2][1][RTW89_CN][12] = 36, -+ [2][1][RTW89_QATAR][12] = 36, -+ [2][1][RTW89_UK][12] = 36, -+ [2][1][RTW89_FCC][14] = 52, -+ [2][1][RTW89_ETSI][14] = 36, -+ [2][1][RTW89_MKK][14] = 36, -+ [2][1][RTW89_IC][14] = 52, -+ [2][1][RTW89_KCC][14] = 48, -+ [2][1][RTW89_ACMA][14] = 36, -+ [2][1][RTW89_CHILE][14] = 54, -+ [2][1][RTW89_UKRAINE][14] = 36, -+ [2][1][RTW89_MEXICO][14] = 52, -+ [2][1][RTW89_CN][14] = 36, -+ [2][1][RTW89_QATAR][14] = 36, -+ [2][1][RTW89_UK][14] = 36, -+ [2][1][RTW89_FCC][15] = 50, -+ [2][1][RTW89_ETSI][15] = 36, -+ [2][1][RTW89_MKK][15] = 54, -+ [2][1][RTW89_IC][15] = 50, -+ [2][1][RTW89_KCC][15] = 48, -+ [2][1][RTW89_ACMA][15] = 36, -+ [2][1][RTW89_CHILE][15] = 56, -+ [2][1][RTW89_UKRAINE][15] = 36, -+ [2][1][RTW89_MEXICO][15] = 50, -+ [2][1][RTW89_CN][15] = 127, -+ [2][1][RTW89_QATAR][15] = 36, -+ [2][1][RTW89_UK][15] = 36, -+ [2][1][RTW89_FCC][17] = 50, -+ [2][1][RTW89_ETSI][17] = 36, -+ [2][1][RTW89_MKK][17] = 56, -+ [2][1][RTW89_IC][17] = 50, -+ [2][1][RTW89_KCC][17] = 48, -+ [2][1][RTW89_ACMA][17] = 36, -+ [2][1][RTW89_CHILE][17] = 56, -+ [2][1][RTW89_UKRAINE][17] = 36, -+ [2][1][RTW89_MEXICO][17] = 50, -+ [2][1][RTW89_CN][17] = 127, -+ [2][1][RTW89_QATAR][17] = 36, -+ [2][1][RTW89_UK][17] = 36, -+ [2][1][RTW89_FCC][19] = 50, -+ [2][1][RTW89_ETSI][19] = 36, -+ [2][1][RTW89_MKK][19] = 56, -+ [2][1][RTW89_IC][19] = 50, -+ [2][1][RTW89_KCC][19] = 48, -+ [2][1][RTW89_ACMA][19] = 36, -+ [2][1][RTW89_CHILE][19] = 56, -+ [2][1][RTW89_UKRAINE][19] = 36, -+ [2][1][RTW89_MEXICO][19] = 50, -+ [2][1][RTW89_CN][19] = 127, -+ [2][1][RTW89_QATAR][19] = 36, -+ [2][1][RTW89_UK][19] = 36, -+ [2][1][RTW89_FCC][21] = 50, -+ [2][1][RTW89_ETSI][21] = 36, -+ [2][1][RTW89_MKK][21] = 56, -+ [2][1][RTW89_IC][21] = 50, -+ [2][1][RTW89_KCC][21] = 48, -+ [2][1][RTW89_ACMA][21] = 36, -+ [2][1][RTW89_CHILE][21] = 58, -+ [2][1][RTW89_UKRAINE][21] = 36, -+ [2][1][RTW89_MEXICO][21] = 50, -+ [2][1][RTW89_CN][21] = 127, -+ [2][1][RTW89_QATAR][21] = 36, -+ [2][1][RTW89_UK][21] = 36, -+ [2][1][RTW89_FCC][23] = 50, -+ [2][1][RTW89_ETSI][23] = 36, -+ [2][1][RTW89_MKK][23] = 56, -+ [2][1][RTW89_IC][23] = 50, -+ [2][1][RTW89_KCC][23] = 48, -+ [2][1][RTW89_ACMA][23] = 36, -+ [2][1][RTW89_CHILE][23] = 58, -+ [2][1][RTW89_UKRAINE][23] = 36, -+ [2][1][RTW89_MEXICO][23] = 50, -+ [2][1][RTW89_CN][23] = 127, -+ [2][1][RTW89_QATAR][23] = 36, -+ [2][1][RTW89_UK][23] = 36, -+ [2][1][RTW89_FCC][25] = 50, -+ [2][1][RTW89_ETSI][25] = 36, -+ [2][1][RTW89_MKK][25] = 56, -+ [2][1][RTW89_IC][25] = 127, -+ [2][1][RTW89_KCC][25] = 48, -+ [2][1][RTW89_ACMA][25] = 127, -+ [2][1][RTW89_CHILE][25] = 58, -+ [2][1][RTW89_UKRAINE][25] = 36, -+ [2][1][RTW89_MEXICO][25] = 50, -+ [2][1][RTW89_CN][25] = 127, -+ [2][1][RTW89_QATAR][25] = 36, -+ [2][1][RTW89_UK][25] = 36, -+ [2][1][RTW89_FCC][27] = 50, -+ [2][1][RTW89_ETSI][27] = 36, -+ [2][1][RTW89_MKK][27] = 56, -+ [2][1][RTW89_IC][27] = 127, -+ [2][1][RTW89_KCC][27] = 48, -+ [2][1][RTW89_ACMA][27] = 127, -+ [2][1][RTW89_CHILE][27] = 58, -+ [2][1][RTW89_UKRAINE][27] = 36, -+ [2][1][RTW89_MEXICO][27] = 50, -+ [2][1][RTW89_CN][27] = 127, -+ [2][1][RTW89_QATAR][27] = 36, -+ [2][1][RTW89_UK][27] = 36, -+ [2][1][RTW89_FCC][29] = 50, -+ [2][1][RTW89_ETSI][29] = 36, -+ [2][1][RTW89_MKK][29] = 56, -+ [2][1][RTW89_IC][29] = 127, -+ [2][1][RTW89_KCC][29] = 48, -+ [2][1][RTW89_ACMA][29] = 127, -+ [2][1][RTW89_CHILE][29] = 56, -+ [2][1][RTW89_UKRAINE][29] = 36, -+ [2][1][RTW89_MEXICO][29] = 50, -+ [2][1][RTW89_CN][29] = 127, -+ [2][1][RTW89_QATAR][29] = 36, -+ [2][1][RTW89_UK][29] = 36, -+ [2][1][RTW89_FCC][31] = 50, -+ [2][1][RTW89_ETSI][31] = 36, -+ [2][1][RTW89_MKK][31] = 56, -+ [2][1][RTW89_IC][31] = 50, -+ [2][1][RTW89_KCC][31] = 48, -+ [2][1][RTW89_ACMA][31] = 36, -+ [2][1][RTW89_CHILE][31] = 56, -+ [2][1][RTW89_UKRAINE][31] = 36, -+ [2][1][RTW89_MEXICO][31] = 50, -+ [2][1][RTW89_CN][31] = 127, -+ [2][1][RTW89_QATAR][31] = 36, -+ [2][1][RTW89_UK][31] = 36, -+ [2][1][RTW89_FCC][33] = 50, -+ [2][1][RTW89_ETSI][33] = 36, -+ [2][1][RTW89_MKK][33] = 56, -+ [2][1][RTW89_IC][33] = 50, -+ [2][1][RTW89_KCC][33] = 48, -+ [2][1][RTW89_ACMA][33] = 36, -+ [2][1][RTW89_CHILE][33] = 56, -+ [2][1][RTW89_UKRAINE][33] = 36, -+ [2][1][RTW89_MEXICO][33] = 50, -+ [2][1][RTW89_CN][33] = 127, -+ [2][1][RTW89_QATAR][33] = 36, -+ [2][1][RTW89_UK][33] = 36, -+ [2][1][RTW89_FCC][35] = 50, -+ [2][1][RTW89_ETSI][35] = 36, -+ [2][1][RTW89_MKK][35] = 56, -+ [2][1][RTW89_IC][35] = 50, -+ [2][1][RTW89_KCC][35] = 48, -+ [2][1][RTW89_ACMA][35] = 36, -+ [2][1][RTW89_CHILE][35] = 56, -+ [2][1][RTW89_UKRAINE][35] = 36, -+ [2][1][RTW89_MEXICO][35] = 50, -+ [2][1][RTW89_CN][35] = 127, -+ [2][1][RTW89_QATAR][35] = 36, -+ [2][1][RTW89_UK][35] = 36, -+ [2][1][RTW89_FCC][37] = 50, -+ [2][1][RTW89_ETSI][37] = 127, -+ [2][1][RTW89_MKK][37] = 54, -+ [2][1][RTW89_IC][37] = 50, -+ [2][1][RTW89_KCC][37] = 48, -+ [2][1][RTW89_ACMA][37] = 60, -+ [2][1][RTW89_CHILE][37] = 56, -+ [2][1][RTW89_UKRAINE][37] = 127, -+ [2][1][RTW89_MEXICO][37] = 50, -+ [2][1][RTW89_CN][37] = 127, -+ [2][1][RTW89_QATAR][37] = 127, -+ [2][1][RTW89_UK][37] = 66, -+ [2][1][RTW89_FCC][38] = 84, -+ [2][1][RTW89_ETSI][38] = 16, -+ [2][1][RTW89_MKK][38] = 127, -+ [2][1][RTW89_IC][38] = 84, -+ [2][1][RTW89_KCC][38] = 48, -+ [2][1][RTW89_ACMA][38] = 84, -+ [2][1][RTW89_CHILE][38] = 58, -+ [2][1][RTW89_UKRAINE][38] = 16, -+ [2][1][RTW89_MEXICO][38] = 84, -+ [2][1][RTW89_CN][38] = 64, -+ [2][1][RTW89_QATAR][38] = 16, -+ [2][1][RTW89_UK][38] = 38, -+ [2][1][RTW89_FCC][40] = 84, -+ [2][1][RTW89_ETSI][40] = 16, -+ [2][1][RTW89_MKK][40] = 127, -+ [2][1][RTW89_IC][40] = 84, -+ [2][1][RTW89_KCC][40] = 48, -+ [2][1][RTW89_ACMA][40] = 84, -+ [2][1][RTW89_CHILE][40] = 58, -+ [2][1][RTW89_UKRAINE][40] = 16, -+ [2][1][RTW89_MEXICO][40] = 84, -+ [2][1][RTW89_CN][40] = 64, -+ [2][1][RTW89_QATAR][40] = 16, -+ [2][1][RTW89_UK][40] = 38, -+ [2][1][RTW89_FCC][42] = 84, -+ [2][1][RTW89_ETSI][42] = 16, -+ [2][1][RTW89_MKK][42] = 127, -+ [2][1][RTW89_IC][42] = 84, -+ [2][1][RTW89_KCC][42] = 48, -+ [2][1][RTW89_ACMA][42] = 84, -+ [2][1][RTW89_CHILE][42] = 58, -+ [2][1][RTW89_UKRAINE][42] = 16, -+ [2][1][RTW89_MEXICO][42] = 84, -+ [2][1][RTW89_CN][42] = 64, -+ [2][1][RTW89_QATAR][42] = 16, -+ [2][1][RTW89_UK][42] = 38, -+ [2][1][RTW89_FCC][44] = 84, -+ [2][1][RTW89_ETSI][44] = 16, -+ [2][1][RTW89_MKK][44] = 127, -+ [2][1][RTW89_IC][44] = 84, -+ [2][1][RTW89_KCC][44] = 48, -+ [2][1][RTW89_ACMA][44] = 84, -+ [2][1][RTW89_CHILE][44] = 58, -+ [2][1][RTW89_UKRAINE][44] = 16, -+ [2][1][RTW89_MEXICO][44] = 84, -+ [2][1][RTW89_CN][44] = 64, -+ [2][1][RTW89_QATAR][44] = 16, -+ [2][1][RTW89_UK][44] = 38, -+ [2][1][RTW89_FCC][46] = 84, -+ [2][1][RTW89_ETSI][46] = 16, -+ [2][1][RTW89_MKK][46] = 127, -+ [2][1][RTW89_IC][46] = 84, -+ [2][1][RTW89_KCC][46] = 48, -+ [2][1][RTW89_ACMA][46] = 84, -+ [2][1][RTW89_CHILE][46] = 58, -+ [2][1][RTW89_UKRAINE][46] = 16, -+ [2][1][RTW89_MEXICO][46] = 84, -+ [2][1][RTW89_CN][46] = 64, -+ [2][1][RTW89_QATAR][46] = 16, -+ [2][1][RTW89_UK][46] = 38, -+ [2][1][RTW89_FCC][48] = 44, -+ [2][1][RTW89_ETSI][48] = 127, -+ [2][1][RTW89_MKK][48] = 127, -+ [2][1][RTW89_IC][48] = 127, -+ [2][1][RTW89_KCC][48] = 127, -+ [2][1][RTW89_ACMA][48] = 127, -+ [2][1][RTW89_CHILE][48] = 127, -+ [2][1][RTW89_UKRAINE][48] = 127, -+ [2][1][RTW89_MEXICO][48] = 127, -+ [2][1][RTW89_CN][48] = 127, -+ [2][1][RTW89_QATAR][48] = 127, -+ [2][1][RTW89_UK][48] = 127, -+ [2][1][RTW89_FCC][50] = 44, -+ [2][1][RTW89_ETSI][50] = 127, -+ [2][1][RTW89_MKK][50] = 127, -+ [2][1][RTW89_IC][50] = 127, -+ [2][1][RTW89_KCC][50] = 127, -+ [2][1][RTW89_ACMA][50] = 127, -+ [2][1][RTW89_CHILE][50] = 127, -+ [2][1][RTW89_UKRAINE][50] = 127, -+ [2][1][RTW89_MEXICO][50] = 127, -+ [2][1][RTW89_CN][50] = 127, -+ [2][1][RTW89_QATAR][50] = 127, -+ [2][1][RTW89_UK][50] = 127, -+ [2][1][RTW89_FCC][52] = 44, -+ [2][1][RTW89_ETSI][52] = 127, -+ [2][1][RTW89_MKK][52] = 127, -+ [2][1][RTW89_IC][52] = 127, -+ [2][1][RTW89_KCC][52] = 127, -+ [2][1][RTW89_ACMA][52] = 127, -+ [2][1][RTW89_CHILE][52] = 127, -+ [2][1][RTW89_UKRAINE][52] = 127, -+ [2][1][RTW89_MEXICO][52] = 127, -+ [2][1][RTW89_CN][52] = 127, -+ [2][1][RTW89_QATAR][52] = 127, -+ [2][1][RTW89_UK][52] = 127, -+}; -+ -+const struct rtw89_phy_table rtw89_8852b_phy_bb_table = { -+ .regs = rtw89_8852b_phy_bb_regs, -+ .n_regs = ARRAY_SIZE(rtw89_8852b_phy_bb_regs), -+ .rf_path = 0, /* don't care */ -+}; -+ -+const struct rtw89_phy_table rtw89_8852b_phy_bb_gain_table = { -+ .regs = rtw89_8852b_phy_bb_reg_gain, -+ .n_regs = ARRAY_SIZE(rtw89_8852b_phy_bb_reg_gain), -+ .rf_path = 0, /* don't care */ -+}; -+ -+const struct rtw89_phy_table rtw89_8852b_phy_radioa_table = { -+ .regs = rtw89_8852b_phy_radioa_regs, -+ .n_regs = ARRAY_SIZE(rtw89_8852b_phy_radioa_regs), -+ .rf_path = RF_PATH_A, -+ .config = rtw89_phy_config_rf_reg_v1, -+}; -+ -+const struct rtw89_phy_table rtw89_8852b_phy_radiob_table = { -+ .regs = rtw89_8852b_phy_radiob_regs, -+ .n_regs = ARRAY_SIZE(rtw89_8852b_phy_radiob_regs), -+ .rf_path = RF_PATH_B, -+ .config = rtw89_phy_config_rf_reg_v1, -+}; -+ -+const struct rtw89_phy_table rtw89_8852b_phy_nctl_table = { -+ .regs = rtw89_8852b_phy_nctl_regs, -+ .n_regs = ARRAY_SIZE(rtw89_8852b_phy_nctl_regs), -+ .rf_path = 0, /* don't care */ -+}; -+ -+const struct rtw89_txpwr_table rtw89_8852b_byr_table = { -+ .data = rtw89_8852b_txpwr_byrate, -+ .size = ARRAY_SIZE(rtw89_8852b_txpwr_byrate), -+ .load = rtw89_phy_load_txpwr_byrate, -+}; -+ -+const struct rtw89_txpwr_track_cfg rtw89_8852b_trk_cfg = { -+ .delta_swingidx_5gb_n = _txpwr_track_delta_swingidx_5gb_n, -+ .delta_swingidx_5gb_p = _txpwr_track_delta_swingidx_5gb_p, -+ .delta_swingidx_5ga_n = _txpwr_track_delta_swingidx_5ga_n, -+ .delta_swingidx_5ga_p = _txpwr_track_delta_swingidx_5ga_p, -+ .delta_swingidx_2gb_n = _txpwr_track_delta_swingidx_2gb_n, -+ .delta_swingidx_2gb_p = _txpwr_track_delta_swingidx_2gb_p, -+ .delta_swingidx_2ga_n = _txpwr_track_delta_swingidx_2ga_n, -+ .delta_swingidx_2ga_p = _txpwr_track_delta_swingidx_2ga_p, -+ .delta_swingidx_2g_cck_b_n = _txpwr_track_delta_swingidx_2g_cck_b_n, -+ .delta_swingidx_2g_cck_b_p = _txpwr_track_delta_swingidx_2g_cck_b_p, -+ .delta_swingidx_2g_cck_a_n = _txpwr_track_delta_swingidx_2g_cck_a_n, -+ .delta_swingidx_2g_cck_a_p = _txpwr_track_delta_swingidx_2g_cck_a_p, -+}; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-003-wifi-rtw89-8852b-add-tables-for-RFK.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-003-wifi-rtw89-8852b-add-tables-for-RFK.patch deleted file mode 100644 index 05dd92c5d..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-003-wifi-rtw89-8852b-add-tables-for-RFK.patch +++ /dev/null @@ -1,879 +0,0 @@ -From 2b379eb443e2a4bd6fb2cbd300e12aeff45cff57 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 28 Sep 2022 16:43:30 +0800 -Subject: [PATCH 003/149] wifi: rtw89: 8852b: add tables for RFK - -These tables are used by RFK to assist to configure PHY and RF registers. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20220928084336.34981-4-pkshih@realtek.com ---- - .../realtek/rtw89/rtw8852b_rfk_table.c | 794 ++++++++++++++++++ - .../realtek/rtw89/rtw8852b_rfk_table.h | 62 ++ - 2 files changed, 856 insertions(+) - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.c - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.h - ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.c -@@ -0,0 +1,794 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#include "rtw8852b_rfk_table.h" -+ -+static const struct rtw89_reg5_def rtw8852b_afe_init_defs[] = { -+ RTW89_DECL_RFK_WM(0xC0D4, 0xffffffff, 0x4486888c), -+ RTW89_DECL_RFK_WM(0xC0D8, 0xffffffff, 0xc6ba10e0), -+ RTW89_DECL_RFK_WM(0xc0dc, 0xffffffff, 0x30c52868), -+ RTW89_DECL_RFK_WM(0xc0e0, 0xffffffff, 0x05008128), -+ RTW89_DECL_RFK_WM(0xc0e4, 0xffffffff, 0x0000272b), -+ RTW89_DECL_RFK_WM(0xC1D4, 0xffffffff, 0x4486888c), -+ RTW89_DECL_RFK_WM(0xC1D8, 0xffffffff, 0xc6ba10e0), -+ RTW89_DECL_RFK_WM(0xc1dc, 0xffffffff, 0x30c52868), -+ RTW89_DECL_RFK_WM(0xc1e0, 0xffffffff, 0x05008128), -+ RTW89_DECL_RFK_WM(0xc1e4, 0xffffffff, 0x0000272b), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_afe_init_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_check_addc_defs_a[] = { -+ RTW89_DECL_RFK_WM(0x20f4, BIT(24), 0x0), -+ RTW89_DECL_RFK_WM(0x20f8, 0x80000000, 0x1), -+ RTW89_DECL_RFK_WM(0x20f0, 0xff0000, 0x1), -+ RTW89_DECL_RFK_WM(0x20f0, 0xf00, 0x2), -+ RTW89_DECL_RFK_WM(0x20f0, 0xf, 0x0), -+ RTW89_DECL_RFK_WM(0x20f0, 0xc0, 0x2), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_check_addc_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852b_check_addc_defs_b[] = { -+ RTW89_DECL_RFK_WM(0x20f4, BIT(24), 0x0), -+ RTW89_DECL_RFK_WM(0x20f8, 0x80000000, 0x1), -+ RTW89_DECL_RFK_WM(0x20f0, 0xff0000, 0x1), -+ RTW89_DECL_RFK_WM(0x20f0, 0xf00, 0x2), -+ RTW89_DECL_RFK_WM(0x20f0, 0xf, 0x0), -+ RTW89_DECL_RFK_WM(0x20f0, 0xc0, 0x3), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_check_addc_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852b_check_dadc_en_defs_a[] = { -+ RTW89_DECL_RFK_WM(0x032C, BIT(30), 0x0), -+ RTW89_DECL_RFK_WM(0x030C, 0x0f000000, 0xf), -+ RTW89_DECL_RFK_WM(0x030C, 0x0f000000, 0x3), -+ RTW89_DECL_RFK_WM(0x032C, BIT(16), 0x0), -+ RTW89_DECL_RFK_WM(0x12dc, BIT(0), 0x1), -+ RTW89_DECL_RFK_WM(0x12e8, BIT(2), 0x1), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x8f, BIT(13), 0x1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_check_dadc_en_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852b_check_dadc_en_defs_b[] = { -+ RTW89_DECL_RFK_WM(0x032C, BIT(30), 0x0), -+ RTW89_DECL_RFK_WM(0x030C, 0x0f000000, 0xf), -+ RTW89_DECL_RFK_WM(0x030C, 0x0f000000, 0x3), -+ RTW89_DECL_RFK_WM(0x032C, BIT(16), 0x0), -+ RTW89_DECL_RFK_WM(0x32dc, BIT(0), 0x1), -+ RTW89_DECL_RFK_WM(0x32e8, BIT(2), 0x1), -+ RTW89_DECL_RFK_WRF(RF_PATH_B, 0x8f, BIT(13), 0x1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_check_dadc_en_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852b_check_dadc_dis_defs_a[] = { -+ RTW89_DECL_RFK_WM(0x12dc, BIT(0), 0x0), -+ RTW89_DECL_RFK_WM(0x12e8, BIT(2), 0x0), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x8f, BIT(13), 0x0), -+ RTW89_DECL_RFK_WM(0x032C, BIT(16), 0x1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_check_dadc_dis_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852b_check_dadc_dis_defs_b[] = { -+ RTW89_DECL_RFK_WM(0x32dc, BIT(0), 0x0), -+ RTW89_DECL_RFK_WM(0x32e8, BIT(2), 0x0), -+ RTW89_DECL_RFK_WRF(RF_PATH_B, 0x8f, BIT(13), 0x0), -+ RTW89_DECL_RFK_WM(0x032C, BIT(16), 0x1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_check_dadc_dis_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852b_dack_s0_1_defs[] = { -+ RTW89_DECL_RFK_WM(0x12A0, BIT(15), 0x1), -+ RTW89_DECL_RFK_WM(0x12A0, 0x00007000, 0x3), -+ RTW89_DECL_RFK_WM(0x12B8, BIT(30), 0x1), -+ RTW89_DECL_RFK_WM(0x030C, BIT(28), 0x1), -+ RTW89_DECL_RFK_WM(0x032C, 0x80000000, 0x0), -+ RTW89_DECL_RFK_WM(0xC0D8, BIT(16), 0x1), -+ RTW89_DECL_RFK_WM(0xc0dc, 0x0c000000, 0x3), -+ RTW89_DECL_RFK_WM(0xC004, BIT(30), 0x0), -+ RTW89_DECL_RFK_WM(0xc024, BIT(30), 0x0), -+ RTW89_DECL_RFK_WM(0xC004, 0x3ff00000, 0x30), -+ RTW89_DECL_RFK_WM(0xC004, 0xc0000000, 0x0), -+ RTW89_DECL_RFK_WM(0xC004, BIT(17), 0x1), -+ RTW89_DECL_RFK_WM(0xc024, BIT(17), 0x1), -+ RTW89_DECL_RFK_WM(0xc00c, BIT(2), 0x0), -+ RTW89_DECL_RFK_WM(0xc02c, BIT(2), 0x0), -+ RTW89_DECL_RFK_WM(0xC004, BIT(0), 0x1), -+ RTW89_DECL_RFK_WM(0xc024, BIT(0), 0x1), -+ RTW89_DECL_RFK_DELAY(1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s0_1_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_dack_s0_2_defs[] = { -+ RTW89_DECL_RFK_WM(0xc0dc, 0x0c000000, 0x0), -+ RTW89_DECL_RFK_WM(0xc00c, BIT(2), 0x1), -+ RTW89_DECL_RFK_WM(0xc02c, BIT(2), 0x1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s0_2_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_dack_s0_3_defs[] = { -+ RTW89_DECL_RFK_WM(0xC004, BIT(0), 0x0), -+ RTW89_DECL_RFK_WM(0xc024, BIT(0), 0x0), -+ RTW89_DECL_RFK_WM(0xC0D8, BIT(16), 0x0), -+ RTW89_DECL_RFK_WM(0x12A0, BIT(15), 0x0), -+ RTW89_DECL_RFK_WM(0x12A0, 0x00007000, 0x7), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s0_3_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_dack_s1_1_defs[] = { -+ RTW89_DECL_RFK_WM(0x32a0, BIT(15), 0x1), -+ RTW89_DECL_RFK_WM(0x32a0, 0x7000, 0x3), -+ RTW89_DECL_RFK_WM(0x32B8, BIT(30), 0x1), -+ RTW89_DECL_RFK_WM(0x030C, BIT(28), 0x1), -+ RTW89_DECL_RFK_WM(0x032C, 0x80000000, 0x0), -+ RTW89_DECL_RFK_WM(0xC1D8, BIT(16), 0x1), -+ RTW89_DECL_RFK_WM(0xc1dc, 0x0c000000, 0x3), -+ RTW89_DECL_RFK_WM(0xc104, BIT(30), 0x0), -+ RTW89_DECL_RFK_WM(0xc124, BIT(30), 0x0), -+ RTW89_DECL_RFK_WM(0xc104, 0x3ff00000, 0x30), -+ RTW89_DECL_RFK_WM(0xc104, 0xc0000000, 0x0), -+ RTW89_DECL_RFK_WM(0xc104, BIT(17), 0x1), -+ RTW89_DECL_RFK_WM(0xc124, BIT(17), 0x1), -+ RTW89_DECL_RFK_WM(0xc10c, BIT(2), 0x0), -+ RTW89_DECL_RFK_WM(0xc12c, BIT(2), 0x0), -+ RTW89_DECL_RFK_WM(0xc104, BIT(0), 0x1), -+ RTW89_DECL_RFK_WM(0xc124, BIT(0), 0x1), -+ RTW89_DECL_RFK_DELAY(1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s1_1_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_dack_s1_2_defs[] = { -+ RTW89_DECL_RFK_WM(0xc1dc, 0x0c000000, 0x0), -+ RTW89_DECL_RFK_WM(0xc10c, BIT(2), 0x1), -+ RTW89_DECL_RFK_WM(0xc12c, BIT(2), 0x1), -+ RTW89_DECL_RFK_DELAY(1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s1_2_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_dack_s1_3_defs[] = { -+ RTW89_DECL_RFK_WM(0xc104, BIT(0), 0x0), -+ RTW89_DECL_RFK_WM(0xc124, BIT(0), 0x0), -+ RTW89_DECL_RFK_WM(0xC1D8, BIT(16), 0x0), -+ RTW89_DECL_RFK_WM(0x32a0, BIT(15), 0x0), -+ RTW89_DECL_RFK_WM(0x32a0, 0x7000, 0x7), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_dack_s1_3_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_dpk_afe_defs[] = { -+ RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x0303), -+ RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1), -+ RTW89_DECL_RFK_WM(0x32b8, BIT(30), 0x1), -+ RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x13), -+ RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x0041), -+ RTW89_DECL_RFK_WM(0x12b8, BIT(28), 0x1), -+ RTW89_DECL_RFK_WM(0x58c8, BIT(24), 0x1), -+ RTW89_DECL_RFK_WM(0x78c8, BIT(24), 0x1), -+ RTW89_DECL_RFK_WM(0x5864, 0xc0000000, 0x3), -+ RTW89_DECL_RFK_WM(0x7864, 0xc0000000, 0x3), -+ RTW89_DECL_RFK_WM(0x2008, 0x01FFFFFF, 0x1ffffff), -+ RTW89_DECL_RFK_WM(0x0c1c, BIT(2), 0x1), -+ RTW89_DECL_RFK_WM(0x0700, BIT(27), 0x1), -+ RTW89_DECL_RFK_WM(0x0c70, 0x000003FF, 0x3ff), -+ RTW89_DECL_RFK_WM(0x0c60, 0x00000003, 0x3), -+ RTW89_DECL_RFK_WM(0x0c6c, BIT(0), 0x1), -+ RTW89_DECL_RFK_WM(0x58ac, BIT(27), 0x1), -+ RTW89_DECL_RFK_WM(0x78ac, BIT(27), 0x1), -+ RTW89_DECL_RFK_WM(0x0c3c, BIT(9), 0x1), -+ RTW89_DECL_RFK_WM(0x2344, BIT(31), 0x1), -+ RTW89_DECL_RFK_WM(0x4490, BIT(31), 0x1), -+ RTW89_DECL_RFK_WM(0x12a0, 0x000ff000, 0xbf), -+ RTW89_DECL_RFK_WM(0x32a0, 0x000f0000, 0xb), -+ RTW89_DECL_RFK_WM(0x0700, 0x07000000, 0x5), -+ RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x3333), -+ RTW89_DECL_RFK_WM(0x580c, BIT(15), 0x1), -+ RTW89_DECL_RFK_WM(0x5800, 0x0000ffff, 0x0000), -+ RTW89_DECL_RFK_WM(0x780c, BIT(15), 0x1), -+ RTW89_DECL_RFK_WM(0x7800, 0x0000ffff, 0x0000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_dpk_afe_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_dpk_afe_restore_defs[] = { -+ RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x0303), -+ RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x0), -+ RTW89_DECL_RFK_WM(0x32b8, BIT(30), 0x0), -+ RTW89_DECL_RFK_WM(0x5864, 0xc0000000, 0x0), -+ RTW89_DECL_RFK_WM(0x7864, 0xc0000000, 0x0), -+ RTW89_DECL_RFK_WM(0x2008, 0x01FFFFFF, 0x0), -+ RTW89_DECL_RFK_WM(0x0c1c, BIT(2), 0x0), -+ RTW89_DECL_RFK_WM(0x0700, BIT(27), 0x0), -+ RTW89_DECL_RFK_WM(0x0c70, 0x000003FF, 0x63), -+ RTW89_DECL_RFK_WM(0x12a0, 0x000FF000, 0x00), -+ RTW89_DECL_RFK_WM(0x32a0, 0x000FF000, 0x00), -+ RTW89_DECL_RFK_WM(0x0700, 0x07000000, 0x0), -+ RTW89_DECL_RFK_WM(0x5864, BIT(29), 0x0), -+ RTW89_DECL_RFK_WM(0x7864, BIT(29), 0x0), -+ RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x0000), -+ RTW89_DECL_RFK_WM(0x58c8, BIT(24), 0x0), -+ RTW89_DECL_RFK_WM(0x78c8, BIT(24), 0x0), -+ RTW89_DECL_RFK_WM(0x0c3c, BIT(9), 0x0), -+ RTW89_DECL_RFK_WM(0x580c, BIT(15), 0x0), -+ RTW89_DECL_RFK_WM(0x58e4, 0x18000000, 0x1), -+ RTW89_DECL_RFK_WM(0x58e4, 0x18000000, 0x2), -+ RTW89_DECL_RFK_WM(0x780c, BIT(15), 0x0), -+ RTW89_DECL_RFK_WM(0x78e4, 0x18000000, 0x1), -+ RTW89_DECL_RFK_WM(0x78e4, 0x18000000, 0x2), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_dpk_afe_restore_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_dpk_kip_defs[] = { -+ RTW89_DECL_RFK_WM(0x8008, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x8088, 0xffffffff, 0x80000000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_dpk_kip_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_sys_defs[] = { -+ RTW89_DECL_RFK_WM(0x12a8, 0x0000000f, 0x5), -+ RTW89_DECL_RFK_WM(0x32a8, 0x0000000f, 0x5), -+ RTW89_DECL_RFK_WM(0x12bc, 0x000ffff0, 0x5555), -+ RTW89_DECL_RFK_WM(0x32bc, 0x000ffff0, 0x5555), -+ RTW89_DECL_RFK_WM(0x0300, 0xff000000, 0x16), -+ RTW89_DECL_RFK_WM(0x0304, 0x000000ff, 0x19), -+ RTW89_DECL_RFK_WM(0x0314, 0xffff0000, 0x2041), -+ RTW89_DECL_RFK_WM(0x0318, 0xffffffff, 0x2041), -+ RTW89_DECL_RFK_WM(0x0318, 0xffffffff, 0x20012041), -+ RTW89_DECL_RFK_WM(0x0020, 0x00006000, 0x3), -+ RTW89_DECL_RFK_WM(0x0024, 0x00006000, 0x3), -+ RTW89_DECL_RFK_WM(0x0704, 0xffff0000, 0x601e), -+ RTW89_DECL_RFK_WM(0x2704, 0xffff0000, 0x601e), -+ RTW89_DECL_RFK_WM(0x0700, 0xf0000000, 0x4), -+ RTW89_DECL_RFK_WM(0x2700, 0xf0000000, 0x4), -+ RTW89_DECL_RFK_WM(0x0650, 0x3c000000, 0x0), -+ RTW89_DECL_RFK_WM(0x2650, 0x3c000000, 0x0), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_sys_a_defs_2g[] = { -+ RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x33), -+ RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x33), -+ RTW89_DECL_RFK_WM(0x58f8, 0x40000000, 0x1), -+ RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x1e), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_a_defs_2g); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_sys_a_defs_5g[] = { -+ RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x44), -+ RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x44), -+ RTW89_DECL_RFK_WM(0x58f8, 0x40000000, 0x0), -+ RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x1d), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_a_defs_5g); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_sys_b_defs_2g[] = { -+ RTW89_DECL_RFK_WM(0x32c0, 0x0ff00000, 0x33), -+ RTW89_DECL_RFK_WM(0x320c, 0x000000ff, 0x33), -+ RTW89_DECL_RFK_WM(0x78f8, 0x40000000, 0x1), -+ RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x1e), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_b_defs_2g); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_sys_b_defs_5g[] = { -+ RTW89_DECL_RFK_WM(0x32c0, 0x0ff00000, 0x44), -+ RTW89_DECL_RFK_WM(0x320c, 0x000000ff, 0x44), -+ RTW89_DECL_RFK_WM(0x78f8, 0x40000000, 0x0), -+ RTW89_DECL_RFK_WM(0x0304, 0x0000ff00, 0x1d), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_sys_b_defs_5g); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_defs_a[] = { -+ RTW89_DECL_RFK_WM(0x566c, 0x00001000, 0x0), -+ RTW89_DECL_RFK_WM(0x5800, 0xffffffff, 0x003f807f), -+ RTW89_DECL_RFK_WM(0x580c, 0x0000007f, 0x40), -+ RTW89_DECL_RFK_WM(0x580c, 0x0fffff00, 0x00040), -+ RTW89_DECL_RFK_WM(0x5810, 0xffffffff, 0x59010000), -+ RTW89_DECL_RFK_WM(0x5814, 0x01ffffff, 0x002d000), -+ RTW89_DECL_RFK_WM(0x5814, 0xf8000000, 0x00), -+ RTW89_DECL_RFK_WM(0x5818, 0xffffffff, 0x002c1800), -+ RTW89_DECL_RFK_WM(0x581c, 0x3fffffff, 0x1dc80280), -+ RTW89_DECL_RFK_WM(0x5820, 0xffffffff, 0x00002080), -+ RTW89_DECL_RFK_WM(0x580c, 0x10000000, 0x1), -+ RTW89_DECL_RFK_WM(0x580c, 0x40000000, 0x1), -+ RTW89_DECL_RFK_WM(0x5834, 0x3fffffff, 0x000115f2), -+ RTW89_DECL_RFK_WM(0x5838, 0x7fffffff, 0x0000121), -+ RTW89_DECL_RFK_WM(0x5854, 0x3fffffff, 0x000115f2), -+ RTW89_DECL_RFK_WM(0x5858, 0x7fffffff, 0x0000121), -+ RTW89_DECL_RFK_WM(0x5860, 0x80000000, 0x0), -+ RTW89_DECL_RFK_WM(0x5864, 0x07ffffff, 0x00801ff), -+ RTW89_DECL_RFK_WM(0x5898, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x589c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x58a4, 0x000000ff, 0x16), -+ RTW89_DECL_RFK_WM(0x58b0, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x58b4, 0x7fffffff, 0x0a002000), -+ RTW89_DECL_RFK_WM(0x58b8, 0x7fffffff, 0x00007628), -+ RTW89_DECL_RFK_WM(0x58bc, 0x07ffffff, 0x7a7807f), -+ RTW89_DECL_RFK_WM(0x58c0, 0xfffe0000, 0x003f), -+ RTW89_DECL_RFK_WM(0x58c4, 0xffffffff, 0x0003ffff), -+ RTW89_DECL_RFK_WM(0x58c8, 0x00ffffff, 0x000000), -+ RTW89_DECL_RFK_WM(0x58c8, 0xf0000000, 0x0), -+ RTW89_DECL_RFK_WM(0x58cc, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x58d0, 0x07ffffff, 0x2008101), -+ RTW89_DECL_RFK_WM(0x58d4, 0x000000ff, 0x00), -+ RTW89_DECL_RFK_WM(0x58d4, 0x0003fe00, 0x0ff), -+ RTW89_DECL_RFK_WM(0x58d4, 0x07fc0000, 0x100), -+ RTW89_DECL_RFK_WM(0x58d8, 0xffffffff, 0x8008016c), -+ RTW89_DECL_RFK_WM(0x58dc, 0x0001ffff, 0x0807f), -+ RTW89_DECL_RFK_WM(0x58dc, 0xfff00000, 0x800), -+ RTW89_DECL_RFK_WM(0x58f0, 0x0003ffff, 0x001ff), -+ RTW89_DECL_RFK_WM(0x58f4, 0x000fffff, 0x000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_init_txpwr_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_defs_b[] = { -+ RTW89_DECL_RFK_WM(0x566c, 0x00001000, 0x0), -+ RTW89_DECL_RFK_WM(0x7800, 0xffffffff, 0x003f807f), -+ RTW89_DECL_RFK_WM(0x780c, 0x0000007f, 0x40), -+ RTW89_DECL_RFK_WM(0x780c, 0x0fffff00, 0x00040), -+ RTW89_DECL_RFK_WM(0x7810, 0xffffffff, 0x59010000), -+ RTW89_DECL_RFK_WM(0x7814, 0x01ffffff, 0x002d000), -+ RTW89_DECL_RFK_WM(0x7814, 0xf8000000, 0x00), -+ RTW89_DECL_RFK_WM(0x7818, 0xffffffff, 0x002c1800), -+ RTW89_DECL_RFK_WM(0x781c, 0x3fffffff, 0x1dc80280), -+ RTW89_DECL_RFK_WM(0x7820, 0xffffffff, 0x00002080), -+ RTW89_DECL_RFK_WM(0x780c, 0x10000000, 0x1), -+ RTW89_DECL_RFK_WM(0x780c, 0x40000000, 0x1), -+ RTW89_DECL_RFK_WM(0x7834, 0x3fffffff, 0x000115f2), -+ RTW89_DECL_RFK_WM(0x7838, 0x7fffffff, 0x0000121), -+ RTW89_DECL_RFK_WM(0x7854, 0x3fffffff, 0x000115f2), -+ RTW89_DECL_RFK_WM(0x7858, 0x7fffffff, 0x0000121), -+ RTW89_DECL_RFK_WM(0x7860, 0x80000000, 0x0), -+ RTW89_DECL_RFK_WM(0x7864, 0x07ffffff, 0x00801ff), -+ RTW89_DECL_RFK_WM(0x7898, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x789c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x78a4, 0x000000ff, 0x16), -+ RTW89_DECL_RFK_WM(0x78b0, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x78b4, 0x7fffffff, 0x0a002000), -+ RTW89_DECL_RFK_WM(0x78b8, 0x7fffffff, 0x00007628), -+ RTW89_DECL_RFK_WM(0x78bc, 0x07ffffff, 0x7a7807f), -+ RTW89_DECL_RFK_WM(0x78c0, 0xfffe0000, 0x003f), -+ RTW89_DECL_RFK_WM(0x78c4, 0xffffffff, 0x0003ffff), -+ RTW89_DECL_RFK_WM(0x78c8, 0x00ffffff, 0x000000), -+ RTW89_DECL_RFK_WM(0x78c8, 0xf0000000, 0x0), -+ RTW89_DECL_RFK_WM(0x78cc, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x78d0, 0x07ffffff, 0x2008101), -+ RTW89_DECL_RFK_WM(0x78d4, 0x000000ff, 0x00), -+ RTW89_DECL_RFK_WM(0x78d4, 0x0003fe00, 0x0ff), -+ RTW89_DECL_RFK_WM(0x78d4, 0x07fc0000, 0x100), -+ RTW89_DECL_RFK_WM(0x78d8, 0xffffffff, 0x8008016c), -+ RTW89_DECL_RFK_WM(0x78dc, 0x0001ffff, 0x0807f), -+ RTW89_DECL_RFK_WM(0x78dc, 0xfff00000, 0x800), -+ RTW89_DECL_RFK_WM(0x78f0, 0x0003ffff, 0x001ff), -+ RTW89_DECL_RFK_WM(0x78f4, 0x000fffff, 0x000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_init_txpwr_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_he_tb_defs_a[] = { -+ RTW89_DECL_RFK_WM(0x58a0, 0xffffffff, 0x000000fe), -+ RTW89_DECL_RFK_WM(0x58e4, 0x0000007f, 0x1f), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_init_txpwr_he_tb_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_init_txpwr_he_tb_defs_b[] = { -+ RTW89_DECL_RFK_WM(0x78a0, 0xffffffff, 0x000000fe), -+ RTW89_DECL_RFK_WM(0x78e4, 0x0000007f, 0x1f), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_init_txpwr_he_tb_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_dck_defs_a[] = { -+ RTW89_DECL_RFK_WM(0x580c, 0x0fff0000, 0x000), -+ RTW89_DECL_RFK_WM(0x5814, 0x003ff000, 0x0ef), -+ RTW89_DECL_RFK_WM(0x5814, 0x18000000, 0x0), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_dck_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_dck_defs_b[] = { -+ RTW89_DECL_RFK_WM(0x780c, 0x0fff0000, 0x000), -+ RTW89_DECL_RFK_WM(0x7814, 0x003ff000, 0x0ef), -+ RTW89_DECL_RFK_WM(0x7814, 0x18000000, 0x0), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_dck_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_dac_gain_defs_a[] = { -+ RTW89_DECL_RFK_WM(0x58b0, 0x00000400, 0x1), -+ RTW89_DECL_RFK_WM(0x58b0, 0x00000fff, 0x000), -+ RTW89_DECL_RFK_WM(0x58b0, 0x00000800, 0x1), -+ RTW89_DECL_RFK_WM(0x5a00, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a04, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a08, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a0c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a10, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a14, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a18, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a1c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a20, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a24, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a28, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a2c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a30, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a34, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a38, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a3c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a40, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a44, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a48, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a4c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a50, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a54, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a58, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a5c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a60, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a64, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a68, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a6c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a70, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a74, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a78, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a7c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a80, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a84, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a88, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a8c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a90, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a94, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a98, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a9c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5aa0, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5aa4, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5aa8, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5aac, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5ab0, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5ab4, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5ab8, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5abc, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5ac0, 0xffffffff, 0x00000000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_dac_gain_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_dac_gain_defs_b[] = { -+ RTW89_DECL_RFK_WM(0x78b0, 0x00000fff, 0x000), -+ RTW89_DECL_RFK_WM(0x78b0, 0x00000800, 0x1), -+ RTW89_DECL_RFK_WM(0x7a00, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a04, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a08, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a0c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a10, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a14, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a18, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a1c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a20, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a24, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a28, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a2c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a30, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a34, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a38, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a3c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a40, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a44, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a48, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a4c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a50, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a54, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a58, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a5c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a60, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a64, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a68, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a6c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a70, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a74, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a78, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a7c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a80, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a84, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a88, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a8c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a90, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a94, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a98, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7a9c, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7aa0, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7aa4, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7aa8, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7aac, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7ab0, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7ab4, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7ab8, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7abc, 0xffffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7ac0, 0xffffffff, 0x00000000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_dac_gain_defs_b); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_slope_a_defs_2g[] = { -+ RTW89_DECL_RFK_WM(0x5608, 0x07ffffff, 0x0801008), -+ RTW89_DECL_RFK_WM(0x560c, 0x07ffffff, 0x0201020), -+ RTW89_DECL_RFK_WM(0x5610, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x5614, 0x07ffffff, 0x0804008), -+ RTW89_DECL_RFK_WM(0x5618, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x561c, 0x000001ff, 0x008), -+ RTW89_DECL_RFK_WM(0x561c, 0xffff0000, 0x0808), -+ RTW89_DECL_RFK_WM(0x5620, 0xffffffff, 0x08081e28), -+ RTW89_DECL_RFK_WM(0x5624, 0xffffffff, 0x08080808), -+ RTW89_DECL_RFK_WM(0x5628, 0xffffffff, 0x08081e28), -+ RTW89_DECL_RFK_WM(0x562c, 0x0000ffff, 0x0808), -+ RTW89_DECL_RFK_WM(0x581c, 0x00100000, 0x1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_a_defs_2g); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_slope_a_defs_5g[] = { -+ RTW89_DECL_RFK_WM(0x5608, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x560c, 0x07ffffff, 0x0201020), -+ RTW89_DECL_RFK_WM(0x5610, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x5614, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x5618, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x561c, 0x000001ff, 0x008), -+ RTW89_DECL_RFK_WM(0x561c, 0xffff0000, 0x0808), -+ RTW89_DECL_RFK_WM(0x5620, 0xffffffff, 0x08081e08), -+ RTW89_DECL_RFK_WM(0x5624, 0xffffffff, 0x08080808), -+ RTW89_DECL_RFK_WM(0x5628, 0xffffffff, 0x08080808), -+ RTW89_DECL_RFK_WM(0x562c, 0x0000ffff, 0x0808), -+ RTW89_DECL_RFK_WM(0x581c, 0x00100000, 0x1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_a_defs_5g); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_slope_b_defs_2g[] = { -+ RTW89_DECL_RFK_WM(0x7608, 0x07ffffff, 0x0801008), -+ RTW89_DECL_RFK_WM(0x760c, 0x07ffffff, 0x0201020), -+ RTW89_DECL_RFK_WM(0x7610, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x7614, 0x07ffffff, 0x0804008), -+ RTW89_DECL_RFK_WM(0x7618, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x761c, 0x000001ff, 0x008), -+ RTW89_DECL_RFK_WM(0x761c, 0xffff0000, 0x0808), -+ RTW89_DECL_RFK_WM(0x7620, 0xffffffff, 0x08081e28), -+ RTW89_DECL_RFK_WM(0x7624, 0xffffffff, 0x08080808), -+ RTW89_DECL_RFK_WM(0x7628, 0xffffffff, 0x08081e28), -+ RTW89_DECL_RFK_WM(0x762c, 0x0000ffff, 0x0808), -+ RTW89_DECL_RFK_WM(0x781c, 0x00100000, 0x1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_b_defs_2g); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_slope_b_defs_5g[] = { -+ RTW89_DECL_RFK_WM(0x7608, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x760c, 0x07ffffff, 0x0201020), -+ RTW89_DECL_RFK_WM(0x7610, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x7614, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x7618, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x761c, 0x000001ff, 0x008), -+ RTW89_DECL_RFK_WM(0x761c, 0xffff0000, 0x0808), -+ RTW89_DECL_RFK_WM(0x7620, 0xffffffff, 0x08081e08), -+ RTW89_DECL_RFK_WM(0x7624, 0xffffffff, 0x08080808), -+ RTW89_DECL_RFK_WM(0x7628, 0xffffffff, 0x08080808), -+ RTW89_DECL_RFK_WM(0x762c, 0x0000ffff, 0x0808), -+ RTW89_DECL_RFK_WM(0x781c, 0x00100000, 0x1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_b_defs_5g); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_align_a_2g_all_defs[] = { -+ RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1), -+ RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x3f2d2721), -+ RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x010101), -+ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01ef27af), -+ RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000075), -+ RTW89_DECL_RFK_WM(0x5638, 0x000fffff, 0x00000), -+ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x017f13ae), -+ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x0000006e), -+ RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_2g_all_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_align_a_2g_part_defs[] = { -+ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01ef27af), -+ RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000075), -+ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x017f13ae), -+ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x0000006e), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_2g_part_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g1_all_defs[] = { -+ RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1), -+ RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x3f2d2721), -+ RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x010101), -+ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x016037e7), -+ RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x0000006f), -+ RTW89_DECL_RFK_WM(0x5638, 0x000fffff, 0x00000), -+ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g1_all_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g1_part_defs[] = { -+ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x016037e7), -+ RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x0000006f), -+ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g1_part_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g2_all_defs[] = { -+ RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1), -+ RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x3f2d2721), -+ RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x010101), -+ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01f053f1), -+ RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000070), -+ RTW89_DECL_RFK_WM(0x5638, 0x000fffff, 0x00000), -+ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g2_all_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g2_part_defs[] = { -+ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01f053f1), -+ RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000070), -+ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g2_part_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g3_all_defs[] = { -+ RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1), -+ RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x3f2d2721), -+ RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x010101), -+ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01c047ee), -+ RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000070), -+ RTW89_DECL_RFK_WM(0x5638, 0x000fffff, 0x00000), -+ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g3_all_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_align_a_5g3_part_defs[] = { -+ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x01c047ee), -+ RTW89_DECL_RFK_WM(0x5634, 0x3fffffff, 0x00000070), -+ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_a_5g3_part_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_align_b_2g_all_defs[] = { -+ RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1), -+ RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x3f2d2721), -+ RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x010101), -+ RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x01ff2bb5), -+ RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000078), -+ RTW89_DECL_RFK_WM(0x7638, 0x000fffff, 0x00000), -+ RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x018f2bb0), -+ RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000072), -+ RTW89_DECL_RFK_WM(0x7644, 0x000fffff, 0x00000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_2g_all_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_align_b_2g_part_defs[] = { -+ RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x01ff2bb5), -+ RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000078), -+ RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x018f2bb0), -+ RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000072), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_2g_part_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g1_all_defs[] = { -+ RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1), -+ RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x3f2d2721), -+ RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x010101), -+ RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x009003da), -+ RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069), -+ RTW89_DECL_RFK_WM(0x7638, 0x000fffff, 0x00000), -+ RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7644, 0x000fffff, 0x00000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g1_all_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g1_part_defs[] = { -+ RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x009003da), -+ RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069), -+ RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g1_part_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g2_all_defs[] = { -+ RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1), -+ RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x3f2d2721), -+ RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x010101), -+ RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x013027e6), -+ RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069), -+ RTW89_DECL_RFK_WM(0x7638, 0x000fffff, 0x00000), -+ RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7644, 0x000fffff, 0x00000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g2_all_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g2_part_defs[] = { -+ RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x013027e6), -+ RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069), -+ RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g2_part_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g3_all_defs[] = { -+ RTW89_DECL_RFK_WM(0x7604, 0x80000000, 0x1), -+ RTW89_DECL_RFK_WM(0x7600, 0x3fffffff, 0x3f2d2721), -+ RTW89_DECL_RFK_WM(0x7604, 0x003fffff, 0x010101), -+ RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x009003da), -+ RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069), -+ RTW89_DECL_RFK_WM(0x7638, 0x000fffff, 0x00000), -+ RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7644, 0x000fffff, 0x00000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g3_all_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_align_b_5g3_part_defs[] = { -+ RTW89_DECL_RFK_WM(0x7630, 0x3fffffff, 0x009003da), -+ RTW89_DECL_RFK_WM(0x7634, 0x3fffffff, 0x00000069), -+ RTW89_DECL_RFK_WM(0x763c, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x7640, 0x3fffffff, 0x00000000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_align_b_5g3_part_defs); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_slope_defs_a[] = { -+ RTW89_DECL_RFK_WM(0x5814, 0x00000800, 0x1), -+ RTW89_DECL_RFK_WM(0x581c, 0x20000000, 0x1), -+ RTW89_DECL_RFK_WM(0x5814, 0x20000000, 0x1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_defs_a); -+ -+static const struct rtw89_reg5_def rtw8852b_tssi_slope_defs_b[] = { -+ RTW89_DECL_RFK_WM(0x7814, 0x00000800, 0x1), -+ RTW89_DECL_RFK_WM(0x781c, 0x20000000, 0x1), -+ RTW89_DECL_RFK_WM(0x7814, 0x20000000, 0x1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8852b_tssi_slope_defs_b); ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk_table.h -@@ -0,0 +1,62 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2020 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_8852B_RFK_TABLE_H__ -+#define __RTW89_8852B_RFK_TABLE_H__ -+ -+#include "phy.h" -+ -+extern const struct rtw89_rfk_tbl rtw8852b_afe_init_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_check_addc_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_check_addc_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_check_dadc_en_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_check_dadc_en_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_check_dadc_dis_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_check_dadc_dis_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_dack_s0_1_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_dack_s0_2_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_dack_s0_3_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_dack_s1_1_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_dack_s1_2_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_dack_s1_3_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_dpk_afe_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_dpk_afe_restore_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_dpk_kip_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_sys_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_sys_a_defs_2g_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_sys_a_defs_5g_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_sys_b_defs_2g_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_sys_b_defs_5g_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_init_txpwr_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_init_txpwr_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_init_txpwr_he_tb_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_init_txpwr_he_tb_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_dck_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_dck_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_dac_gain_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_dac_gain_defs_b_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_slope_a_defs_2g_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_slope_a_defs_5g_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_slope_b_defs_2g_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_slope_b_defs_5g_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_a_2g_all_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_a_2g_part_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_a_5g1_all_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_a_5g1_part_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_a_5g2_all_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_a_5g2_part_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_a_5g3_all_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_a_5g3_part_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_b_2g_all_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_b_2g_part_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_b_5g1_all_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_b_5g1_part_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_b_5g2_all_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_b_5g2_part_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_b_5g3_all_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_align_b_5g3_part_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_slope_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8852b_tssi_slope_defs_b_tbl; -+ -+#endif diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-004-wifi-rtw89-phy-make-generic-txpwr-setting-functions.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-004-wifi-rtw89-phy-make-generic-txpwr-setting-functions.patch deleted file mode 100644 index fe748f31d..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-004-wifi-rtw89-phy-make-generic-txpwr-setting-functions.patch +++ /dev/null @@ -1,669 +0,0 @@ -From 9b43bd1ac0a8e29b678768f93645cc1b39571278 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Wed, 28 Sep 2022 16:43:31 +0800 -Subject: [PATCH 004/149] wifi: rtw89: phy: make generic txpwr setting - functions - -Previously, we thought control registers or setting things for TX power -series may change according to chip. So, setting functions are implemented -chip by chip. However, until now, the functions keep the same among chips, -at least 8852A, 8852C, and 8852B. There is a sufficient number of chips to -share generic setting functions. So, we now remake them including TX power -by rate, TX power offset, TX power limit, and TX power limit RU as generic -ones in phy.c. - -Besides, there are some code refinements in the generic ones, but almost -all of the logic doesn't change. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20220928084336.34981-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 4 + - drivers/net/wireless/realtek/rtw89/phy.c | 167 +++++++++++++++++- - drivers/net/wireless/realtek/rtw89/phy.h | 25 ++- - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 145 +-------------- - drivers/net/wireless/realtek/rtw89/rtw8852a.h | 1 - - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 145 +-------------- - drivers/net/wireless/realtek/rtw89/rtw8852c.h | 1 - - 7 files changed, 184 insertions(+), 304 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -490,6 +490,8 @@ enum rtw89_bandwidth_section_num { - RTW89_BW80_SEC_NUM = 2, - }; - -+#define RTW89_TXPWR_LMT_PAGE_SIZE 40 -+ - struct rtw89_txpwr_limit { - s8 cck_20m[RTW89_BF_NUM]; - s8 cck_40m[RTW89_BF_NUM]; -@@ -504,6 +506,8 @@ struct rtw89_txpwr_limit { - - #define RTW89_RU_SEC_NUM 8 - -+#define RTW89_TXPWR_LMT_RU_PAGE_SIZE 24 -+ - struct rtw89_txpwr_limit_ru { - s8 ru26[RTW89_RU_SEC_NUM]; - s8 ru52[RTW89_RU_SEC_NUM]; ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -1443,23 +1443,21 @@ void rtw89_phy_write_reg3_tbl(struct rtw - } - EXPORT_SYMBOL(rtw89_phy_write_reg3_tbl); - --const u8 rtw89_rs_idx_max[] = { -+static const u8 rtw89_rs_idx_max[] = { - [RTW89_RS_CCK] = RTW89_RATE_CCK_MAX, - [RTW89_RS_OFDM] = RTW89_RATE_OFDM_MAX, - [RTW89_RS_MCS] = RTW89_RATE_MCS_MAX, - [RTW89_RS_HEDCM] = RTW89_RATE_HEDCM_MAX, - [RTW89_RS_OFFSET] = RTW89_RATE_OFFSET_MAX, - }; --EXPORT_SYMBOL(rtw89_rs_idx_max); - --const u8 rtw89_rs_nss_max[] = { -+static const u8 rtw89_rs_nss_max[] = { - [RTW89_RS_CCK] = 1, - [RTW89_RS_OFDM] = 1, - [RTW89_RS_MCS] = RTW89_NSS_MAX, - [RTW89_RS_HEDCM] = RTW89_NSS_HEDCM_MAX, - [RTW89_RS_OFFSET] = 1, - }; --EXPORT_SYMBOL(rtw89_rs_nss_max); - - static const u8 _byr_of_rs[] = { - [RTW89_RS_CCK] = offsetof(struct rtw89_txpwr_byrate, cck), -@@ -1501,6 +1499,7 @@ EXPORT_SYMBOL(rtw89_phy_load_txpwr_byrat - (txpwr_rf) >> (__c->txpwr_factor_rf - __c->txpwr_factor_mac); \ - }) - -+static - s8 rtw89_phy_read_txpwr_byrate(struct rtw89_dev *rtwdev, u8 band, - const struct rtw89_rate_desc *rate_desc) - { -@@ -1523,7 +1522,6 @@ s8 rtw89_phy_read_txpwr_byrate(struct rt - - return _phy_txpwr_rf_to_mac(rtwdev, byr[idx]); - } --EXPORT_SYMBOL(rtw89_phy_read_txpwr_byrate); - - static u8 rtw89_channel_6g_to_idx(struct rtw89_dev *rtwdev, u8 channel_6g) - { -@@ -1783,6 +1781,7 @@ static void rtw89_phy_fill_txpwr_limit_1 - lmt->mcs_40m_2p5[i] = min_t(s8, val_2p5_n[i], val_2p5_p[i]); - } - -+static - void rtw89_phy_fill_txpwr_limit(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, - struct rtw89_txpwr_limit *lmt, -@@ -1813,7 +1812,6 @@ void rtw89_phy_fill_txpwr_limit(struct r - break; - } - } --EXPORT_SYMBOL(rtw89_phy_fill_txpwr_limit); - - static s8 rtw89_phy_read_txpwr_limit_ru(struct rtw89_dev *rtwdev, u8 band, - u8 ru, u8 ntx, u8 ch) -@@ -1962,6 +1960,7 @@ rtw89_phy_fill_txpwr_limit_ru_160m(struc - } - } - -+static - void rtw89_phy_fill_txpwr_limit_ru(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, - struct rtw89_txpwr_limit_ru *lmt_ru, -@@ -1992,7 +1991,161 @@ void rtw89_phy_fill_txpwr_limit_ru(struc - break; - } - } --EXPORT_SYMBOL(rtw89_phy_fill_txpwr_limit_ru); -+ -+void rtw89_phy_set_txpwr_byrate(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ static const u8 rs[] = { -+ RTW89_RS_CCK, -+ RTW89_RS_OFDM, -+ RTW89_RS_MCS, -+ RTW89_RS_HEDCM, -+ }; -+ struct rtw89_rate_desc cur; -+ u8 band = chan->band_type; -+ u8 ch = chan->channel; -+ u32 addr, val; -+ s8 v[4] = {}; -+ u8 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -+ "[TXPWR] set txpwr byrate with ch=%d\n", ch); -+ -+ BUILD_BUG_ON(rtw89_rs_idx_max[RTW89_RS_CCK] % 4); -+ BUILD_BUG_ON(rtw89_rs_idx_max[RTW89_RS_OFDM] % 4); -+ BUILD_BUG_ON(rtw89_rs_idx_max[RTW89_RS_MCS] % 4); -+ BUILD_BUG_ON(rtw89_rs_idx_max[RTW89_RS_HEDCM] % 4); -+ -+ addr = R_AX_PWR_BY_RATE; -+ for (cur.nss = 0; cur.nss <= RTW89_NSS_2; cur.nss++) { -+ for (i = 0; i < ARRAY_SIZE(rs); i++) { -+ if (cur.nss >= rtw89_rs_nss_max[rs[i]]) -+ continue; -+ -+ cur.rs = rs[i]; -+ for (cur.idx = 0; cur.idx < rtw89_rs_idx_max[rs[i]]; -+ cur.idx++) { -+ v[cur.idx % 4] = -+ rtw89_phy_read_txpwr_byrate(rtwdev, -+ band, -+ &cur); -+ -+ if ((cur.idx + 1) % 4) -+ continue; -+ -+ val = FIELD_PREP(GENMASK(7, 0), v[0]) | -+ FIELD_PREP(GENMASK(15, 8), v[1]) | -+ FIELD_PREP(GENMASK(23, 16), v[2]) | -+ FIELD_PREP(GENMASK(31, 24), v[3]); -+ -+ rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, -+ val); -+ addr += 4; -+ } -+ } -+ } -+} -+EXPORT_SYMBOL(rtw89_phy_set_txpwr_byrate); -+ -+void rtw89_phy_set_txpwr_offset(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ struct rtw89_rate_desc desc = { -+ .nss = RTW89_NSS_1, -+ .rs = RTW89_RS_OFFSET, -+ }; -+ u8 band = chan->band_type; -+ s8 v[RTW89_RATE_OFFSET_MAX] = {}; -+ u32 val; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set txpwr offset\n"); -+ -+ for (desc.idx = 0; desc.idx < RTW89_RATE_OFFSET_MAX; desc.idx++) -+ v[desc.idx] = rtw89_phy_read_txpwr_byrate(rtwdev, band, &desc); -+ -+ BUILD_BUG_ON(RTW89_RATE_OFFSET_MAX != 5); -+ val = FIELD_PREP(GENMASK(3, 0), v[0]) | -+ FIELD_PREP(GENMASK(7, 4), v[1]) | -+ FIELD_PREP(GENMASK(11, 8), v[2]) | -+ FIELD_PREP(GENMASK(15, 12), v[3]) | -+ FIELD_PREP(GENMASK(19, 16), v[4]); -+ -+ rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_OFST_CTRL, -+ GENMASK(19, 0), val); -+} -+EXPORT_SYMBOL(rtw89_phy_set_txpwr_offset); -+ -+void rtw89_phy_set_txpwr_limit(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ struct rtw89_txpwr_limit lmt; -+ u8 ch = chan->channel; -+ u8 bw = chan->band_width; -+ const s8 *ptr; -+ u32 addr, val; -+ u8 i, j; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -+ "[TXPWR] set txpwr limit with ch=%d bw=%d\n", ch, bw); -+ -+ BUILD_BUG_ON(sizeof(struct rtw89_txpwr_limit) != -+ RTW89_TXPWR_LMT_PAGE_SIZE); -+ -+ addr = R_AX_PWR_LMT; -+ for (i = 0; i < RTW89_NTX_NUM; i++) { -+ rtw89_phy_fill_txpwr_limit(rtwdev, chan, &lmt, i); -+ -+ ptr = (s8 *)&lmt; -+ for (j = 0; j < RTW89_TXPWR_LMT_PAGE_SIZE; -+ j += 4, addr += 4, ptr += 4) { -+ val = FIELD_PREP(GENMASK(7, 0), ptr[0]) | -+ FIELD_PREP(GENMASK(15, 8), ptr[1]) | -+ FIELD_PREP(GENMASK(23, 16), ptr[2]) | -+ FIELD_PREP(GENMASK(31, 24), ptr[3]); -+ -+ rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); -+ } -+ } -+} -+EXPORT_SYMBOL(rtw89_phy_set_txpwr_limit); -+ -+void rtw89_phy_set_txpwr_limit_ru(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ struct rtw89_txpwr_limit_ru lmt_ru; -+ u8 ch = chan->channel; -+ u8 bw = chan->band_width; -+ const s8 *ptr; -+ u32 addr, val; -+ u8 i, j; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -+ "[TXPWR] set txpwr limit ru with ch=%d bw=%d\n", ch, bw); -+ -+ BUILD_BUG_ON(sizeof(struct rtw89_txpwr_limit_ru) != -+ RTW89_TXPWR_LMT_RU_PAGE_SIZE); -+ -+ addr = R_AX_PWR_RU_LMT; -+ for (i = 0; i < RTW89_NTX_NUM; i++) { -+ rtw89_phy_fill_txpwr_limit_ru(rtwdev, chan, &lmt_ru, i); -+ -+ ptr = (s8 *)&lmt_ru; -+ for (j = 0; j < RTW89_TXPWR_LMT_RU_PAGE_SIZE; -+ j += 4, addr += 4, ptr += 4) { -+ val = FIELD_PREP(GENMASK(7, 0), ptr[0]) | -+ FIELD_PREP(GENMASK(15, 8), ptr[1]) | -+ FIELD_PREP(GENMASK(23, 16), ptr[2]) | -+ FIELD_PREP(GENMASK(31, 24), ptr[3]); -+ -+ rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); -+ } -+ } -+} -+EXPORT_SYMBOL(rtw89_phy_set_txpwr_limit_ru); - - struct rtw89_phy_iter_ra_data { - struct rtw89_dev *rtwdev; ---- a/drivers/net/wireless/realtek/rtw89/phy.h -+++ b/drivers/net/wireless/realtek/rtw89/phy.h -@@ -317,9 +317,6 @@ struct rtw89_nbi_reg_def { - struct rtw89_reg_def notch2_en; - }; - --extern const u8 rtw89_rs_idx_max[RTW89_RS_MAX]; --extern const u8 rtw89_rs_nss_max[RTW89_RS_MAX]; -- - static inline void rtw89_phy_write8(struct rtw89_dev *rtwdev, - u32 addr, u8 data) - { -@@ -460,18 +457,20 @@ void rtw89_phy_write32_idx(struct rtw89_ - u32 data, enum rtw89_phy_idx phy_idx); - void rtw89_phy_load_txpwr_byrate(struct rtw89_dev *rtwdev, - const struct rtw89_txpwr_table *tbl); --s8 rtw89_phy_read_txpwr_byrate(struct rtw89_dev *rtwdev, u8 band, -- const struct rtw89_rate_desc *rate_desc); --void rtw89_phy_fill_txpwr_limit(struct rtw89_dev *rtwdev, -- const struct rtw89_chan *chan, -- struct rtw89_txpwr_limit *lmt, -- u8 ntx); --void rtw89_phy_fill_txpwr_limit_ru(struct rtw89_dev *rtwdev, -- const struct rtw89_chan *chan, -- struct rtw89_txpwr_limit_ru *lmt_ru, -- u8 ntx); - s8 rtw89_phy_read_txpwr_limit(struct rtw89_dev *rtwdev, u8 band, - u8 bw, u8 ntx, u8 rs, u8 bf, u8 ch); -+void rtw89_phy_set_txpwr_byrate(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx); -+void rtw89_phy_set_txpwr_offset(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx); -+void rtw89_phy_set_txpwr_limit(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx); -+void rtw89_phy_set_txpwr_limit_ru(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx); - void rtw89_phy_ra_assoc(struct rtw89_dev *rtwdev, struct ieee80211_sta *sta); - void rtw89_phy_ra_update(struct rtw89_dev *rtwdev); - void rtw89_phy_ra_updata_sta(struct rtw89_dev *rtwdev, struct ieee80211_sta *sta, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -1410,151 +1410,14 @@ static void rtw8852a_set_txpwr_ref(struc - phy_idx); - } - --static void rtw8852a_set_txpwr_byrate(struct rtw89_dev *rtwdev, -- const struct rtw89_chan *chan, -- enum rtw89_phy_idx phy_idx) --{ -- u8 band = chan->band_type; -- u8 ch = chan->channel; -- static const u8 rs[] = { -- RTW89_RS_CCK, -- RTW89_RS_OFDM, -- RTW89_RS_MCS, -- RTW89_RS_HEDCM, -- }; -- s8 tmp; -- u8 i, j; -- u32 val, shf, addr = R_AX_PWR_BY_RATE; -- struct rtw89_rate_desc cur; -- -- rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -- "[TXPWR] set txpwr byrate with ch=%d\n", ch); -- -- for (cur.nss = 0; cur.nss <= RTW89_NSS_2; cur.nss++) { -- for (i = 0; i < ARRAY_SIZE(rs); i++) { -- if (cur.nss >= rtw89_rs_nss_max[rs[i]]) -- continue; -- -- val = 0; -- cur.rs = rs[i]; -- -- for (j = 0; j < rtw89_rs_idx_max[rs[i]]; j++) { -- cur.idx = j; -- shf = (j % 4) * 8; -- tmp = rtw89_phy_read_txpwr_byrate(rtwdev, band, -- &cur); -- val |= (tmp << shf); -- -- if ((j + 1) % 4) -- continue; -- -- rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); -- val = 0; -- addr += 4; -- } -- } -- } --} -- --static void rtw8852a_set_txpwr_offset(struct rtw89_dev *rtwdev, -- const struct rtw89_chan *chan, -- enum rtw89_phy_idx phy_idx) --{ -- u8 band = chan->band_type; -- struct rtw89_rate_desc desc = { -- .nss = RTW89_NSS_1, -- .rs = RTW89_RS_OFFSET, -- }; -- u32 val = 0; -- s8 v; -- -- rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set txpwr offset\n"); -- -- for (desc.idx = 0; desc.idx < RTW89_RATE_OFFSET_MAX; desc.idx++) { -- v = rtw89_phy_read_txpwr_byrate(rtwdev, band, &desc); -- val |= ((v & 0xf) << (4 * desc.idx)); -- } -- -- rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_OFST_CTRL, -- GENMASK(19, 0), val); --} -- --static void rtw8852a_set_txpwr_limit(struct rtw89_dev *rtwdev, -- const struct rtw89_chan *chan, -- enum rtw89_phy_idx phy_idx) --{ --#define __MAC_TXPWR_LMT_PAGE_SIZE 40 -- u8 ch = chan->channel; -- u8 bw = chan->band_width; -- struct rtw89_txpwr_limit lmt[NTX_NUM_8852A]; -- u32 addr, val; -- const s8 *ptr; -- u8 i, j; -- -- rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -- "[TXPWR] set txpwr limit with ch=%d bw=%d\n", ch, bw); -- -- for (i = 0; i < NTX_NUM_8852A; i++) { -- rtw89_phy_fill_txpwr_limit(rtwdev, chan, &lmt[i], i); -- -- for (j = 0; j < __MAC_TXPWR_LMT_PAGE_SIZE; j += 4) { -- addr = R_AX_PWR_LMT + j + __MAC_TXPWR_LMT_PAGE_SIZE * i; -- ptr = (s8 *)&lmt[i] + j; -- -- val = FIELD_PREP(GENMASK(7, 0), ptr[0]) | -- FIELD_PREP(GENMASK(15, 8), ptr[1]) | -- FIELD_PREP(GENMASK(23, 16), ptr[2]) | -- FIELD_PREP(GENMASK(31, 24), ptr[3]); -- -- rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); -- } -- } --#undef __MAC_TXPWR_LMT_PAGE_SIZE --} -- --static void rtw8852a_set_txpwr_limit_ru(struct rtw89_dev *rtwdev, -- const struct rtw89_chan *chan, -- enum rtw89_phy_idx phy_idx) --{ --#define __MAC_TXPWR_LMT_RU_PAGE_SIZE 24 -- u8 ch = chan->channel; -- u8 bw = chan->band_width; -- struct rtw89_txpwr_limit_ru lmt_ru[NTX_NUM_8852A]; -- u32 addr, val; -- const s8 *ptr; -- u8 i, j; -- -- rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -- "[TXPWR] set txpwr limit ru with ch=%d bw=%d\n", ch, bw); -- -- for (i = 0; i < NTX_NUM_8852A; i++) { -- rtw89_phy_fill_txpwr_limit_ru(rtwdev, chan, &lmt_ru[i], i); -- -- for (j = 0; j < __MAC_TXPWR_LMT_RU_PAGE_SIZE; j += 4) { -- addr = R_AX_PWR_RU_LMT + j + -- __MAC_TXPWR_LMT_RU_PAGE_SIZE * i; -- ptr = (s8 *)&lmt_ru[i] + j; -- -- val = FIELD_PREP(GENMASK(7, 0), ptr[0]) | -- FIELD_PREP(GENMASK(15, 8), ptr[1]) | -- FIELD_PREP(GENMASK(23, 16), ptr[2]) | -- FIELD_PREP(GENMASK(31, 24), ptr[3]); -- -- rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); -- } -- } -- --#undef __MAC_TXPWR_LMT_RU_PAGE_SIZE --} -- - static void rtw8852a_set_txpwr(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx) - { -- rtw8852a_set_txpwr_byrate(rtwdev, chan, phy_idx); -- rtw8852a_set_txpwr_offset(rtwdev, chan, phy_idx); -- rtw8852a_set_txpwr_limit(rtwdev, chan, phy_idx); -- rtw8852a_set_txpwr_limit_ru(rtwdev, chan, phy_idx); -+ rtw89_phy_set_txpwr_byrate(rtwdev, chan, phy_idx); -+ rtw89_phy_set_txpwr_offset(rtwdev, chan, phy_idx); -+ rtw89_phy_set_txpwr_limit(rtwdev, chan, phy_idx); -+ rtw89_phy_set_txpwr_limit_ru(rtwdev, chan, phy_idx); - } - - static void rtw8852a_set_txpwr_ctrl(struct rtw89_dev *rtwdev, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.h -@@ -8,7 +8,6 @@ - #include "core.h" - - #define RF_PATH_NUM_8852A 2 --#define NTX_NUM_8852A 2 - - enum rtw8852a_pmac_mode { - NONE_TEST, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2006,75 +2006,6 @@ static void rtw8852c_set_txpwr_ref(struc - phy_idx); - } - --static void rtw8852c_set_txpwr_byrate(struct rtw89_dev *rtwdev, -- const struct rtw89_chan *chan, -- enum rtw89_phy_idx phy_idx) --{ -- u8 band = chan->band_type; -- u8 ch = chan->channel; -- static const u8 rs[] = { -- RTW89_RS_CCK, -- RTW89_RS_OFDM, -- RTW89_RS_MCS, -- RTW89_RS_HEDCM, -- }; -- s8 tmp; -- u8 i, j; -- u32 val, shf, addr = R_AX_PWR_BY_RATE; -- struct rtw89_rate_desc cur; -- -- rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -- "[TXPWR] set txpwr byrate with ch=%d\n", ch); -- -- for (cur.nss = 0; cur.nss <= RTW89_NSS_2; cur.nss++) { -- for (i = 0; i < ARRAY_SIZE(rs); i++) { -- if (cur.nss >= rtw89_rs_nss_max[rs[i]]) -- continue; -- -- val = 0; -- cur.rs = rs[i]; -- -- for (j = 0; j < rtw89_rs_idx_max[rs[i]]; j++) { -- cur.idx = j; -- shf = (j % 4) * 8; -- tmp = rtw89_phy_read_txpwr_byrate(rtwdev, band, -- &cur); -- val |= (tmp << shf); -- -- if ((j + 1) % 4) -- continue; -- -- rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); -- val = 0; -- addr += 4; -- } -- } -- } --} -- --static void rtw8852c_set_txpwr_offset(struct rtw89_dev *rtwdev, -- const struct rtw89_chan *chan, -- enum rtw89_phy_idx phy_idx) --{ -- u8 band = chan->band_type; -- struct rtw89_rate_desc desc = { -- .nss = RTW89_NSS_1, -- .rs = RTW89_RS_OFFSET, -- }; -- u32 val = 0; -- s8 v; -- -- rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set txpwr offset\n"); -- -- for (desc.idx = 0; desc.idx < RTW89_RATE_OFFSET_MAX; desc.idx++) { -- v = rtw89_phy_read_txpwr_byrate(rtwdev, band, &desc); -- val |= ((v & 0xf) << (4 * desc.idx)); -- } -- -- rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_OFST_CTRL, -- GENMASK(19, 0), val); --} -- - static void rtw8852c_bb_set_tx_shape_dfir(struct rtw89_dev *rtwdev, - u8 tx_shape_idx, - enum rtw89_phy_idx phy_idx) -@@ -2147,83 +2078,15 @@ static void rtw8852c_set_tx_shape(struct - tx_shape_ofdm); - } - --static void rtw8852c_set_txpwr_limit(struct rtw89_dev *rtwdev, -- const struct rtw89_chan *chan, -- enum rtw89_phy_idx phy_idx) --{ --#define __MAC_TXPWR_LMT_PAGE_SIZE 40 -- u8 ch = chan->channel; -- u8 bw = chan->band_width; -- struct rtw89_txpwr_limit lmt[NTX_NUM_8852C]; -- u32 addr, val; -- const s8 *ptr; -- u8 i, j; -- -- rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -- "[TXPWR] set txpwr limit with ch=%d bw=%d\n", ch, bw); -- -- for (i = 0; i < NTX_NUM_8852C; i++) { -- rtw89_phy_fill_txpwr_limit(rtwdev, chan, &lmt[i], i); -- -- for (j = 0; j < __MAC_TXPWR_LMT_PAGE_SIZE; j += 4) { -- addr = R_AX_PWR_LMT + j + __MAC_TXPWR_LMT_PAGE_SIZE * i; -- ptr = (s8 *)&lmt[i] + j; -- -- val = FIELD_PREP(GENMASK(7, 0), ptr[0]) | -- FIELD_PREP(GENMASK(15, 8), ptr[1]) | -- FIELD_PREP(GENMASK(23, 16), ptr[2]) | -- FIELD_PREP(GENMASK(31, 24), ptr[3]); -- -- rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); -- } -- } --#undef __MAC_TXPWR_LMT_PAGE_SIZE --} -- --static void rtw8852c_set_txpwr_limit_ru(struct rtw89_dev *rtwdev, -- const struct rtw89_chan *chan, -- enum rtw89_phy_idx phy_idx) --{ --#define __MAC_TXPWR_LMT_RU_PAGE_SIZE 24 -- u8 ch = chan->channel; -- u8 bw = chan->band_width; -- struct rtw89_txpwr_limit_ru lmt_ru[NTX_NUM_8852C]; -- u32 addr, val; -- const s8 *ptr; -- u8 i, j; -- -- rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -- "[TXPWR] set txpwr limit ru with ch=%d bw=%d\n", ch, bw); -- -- for (i = 0; i < NTX_NUM_8852C; i++) { -- rtw89_phy_fill_txpwr_limit_ru(rtwdev, chan, &lmt_ru[i], i); -- -- for (j = 0; j < __MAC_TXPWR_LMT_RU_PAGE_SIZE; j += 4) { -- addr = R_AX_PWR_RU_LMT + j + -- __MAC_TXPWR_LMT_RU_PAGE_SIZE * i; -- ptr = (s8 *)&lmt_ru[i] + j; -- -- val = FIELD_PREP(GENMASK(7, 0), ptr[0]) | -- FIELD_PREP(GENMASK(15, 8), ptr[1]) | -- FIELD_PREP(GENMASK(23, 16), ptr[2]) | -- FIELD_PREP(GENMASK(31, 24), ptr[3]); -- -- rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, val); -- } -- } -- --#undef __MAC_TXPWR_LMT_RU_PAGE_SIZE --} -- - static void rtw8852c_set_txpwr(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx) - { -- rtw8852c_set_txpwr_byrate(rtwdev, chan, phy_idx); -- rtw8852c_set_txpwr_offset(rtwdev, chan, phy_idx); -+ rtw89_phy_set_txpwr_byrate(rtwdev, chan, phy_idx); -+ rtw89_phy_set_txpwr_offset(rtwdev, chan, phy_idx); - rtw8852c_set_tx_shape(rtwdev, chan, phy_idx); -- rtw8852c_set_txpwr_limit(rtwdev, chan, phy_idx); -- rtw8852c_set_txpwr_limit_ru(rtwdev, chan, phy_idx); -+ rtw89_phy_set_txpwr_limit(rtwdev, chan, phy_idx); -+ rtw89_phy_set_txpwr_limit_ru(rtwdev, chan, phy_idx); - } - - static void rtw8852c_set_txpwr_ctrl(struct rtw89_dev *rtwdev, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.h -@@ -9,7 +9,6 @@ - - #define RF_PATH_NUM_8852C 2 - #define BB_PATH_NUM_8852C 2 --#define NTX_NUM_8852C 2 - - struct rtw8852c_u_efuse { - u8 rsvd[0x38]; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-005-wifi-rtw89-debug-txpwr_table-considers-sign.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-005-wifi-rtw89-debug-txpwr_table-considers-sign.patch deleted file mode 100644 index 25dce54b6..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-005-wifi-rtw89-debug-txpwr_table-considers-sign.patch +++ /dev/null @@ -1,53 +0,0 @@ -From b902161645879ac820dfbb561667cd08be569538 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Wed, 28 Sep 2022 16:43:32 +0800 -Subject: [PATCH 005/149] wifi: rtw89: debug: txpwr_table considers sign - -Previously, value of each field is just shown as unsigned. -Now, we start to show them with sign to make things more intuitive -during debugging. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20220928084336.34981-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/debug.c | 12 ++++++++---- - 1 file changed, 8 insertions(+), 4 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/debug.c -+++ b/drivers/net/wireless/realtek/rtw89/debug.c -@@ -464,7 +464,7 @@ static const struct txpwr_map __txpwr_ma - }; - - static u8 __print_txpwr_ent(struct seq_file *m, const struct txpwr_ent *ent, -- const u8 *buf, const u8 cur) -+ const s8 *buf, const u8 cur) - { - char *fmt; - -@@ -493,8 +493,9 @@ static int __print_txpwr_map(struct seq_ - const struct txpwr_map *map) - { - u8 fct = rtwdev->chip->txpwr_factor_mac; -- u8 *buf, cur, i; - u32 val, addr; -+ s8 *buf, tmp; -+ u8 cur, i; - int ret; - - buf = vzalloc(map->addr_to - map->addr_from + 4); -@@ -507,8 +508,11 @@ static int __print_txpwr_map(struct seq_ - val = MASKDWORD; - - cur = addr - map->addr_from; -- for (i = 0; i < 4; i++, val >>= 8) -- buf[cur + i] = FIELD_GET(MASKBYTE0, val) >> fct; -+ for (i = 0; i < 4; i++, val >>= 8) { -+ /* signed 7 bits, and reserved BIT(7) */ -+ tmp = sign_extend32(val, 6); -+ buf[cur + i] = tmp >> fct; -+ } - } - - for (cur = 0, i = 0; i < map->size; i++) diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-006-wifi-rtw89-8852b-add-chip_ops-set_txpwr.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-006-wifi-rtw89-8852b-add-chip_ops-set_txpwr.patch deleted file mode 100644 index 7416411b0..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-006-wifi-rtw89-8852b-add-chip_ops-set_txpwr.patch +++ /dev/null @@ -1,303 +0,0 @@ -From 08484e1f6e6fd670c722756baea4833436ca8fb5 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 28 Sep 2022 16:43:33 +0800 -Subject: [PATCH 006/149] wifi: rtw89: 8852b: add chip_ops::set_txpwr - -This chip_ops is to set TX power according to country, channel, rate and -so on. Since shared code is used to configure TX power, we only implement -specific part in this patch. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20220928084336.34981-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.c | 1 + - drivers/net/wireless/realtek/rtw89/reg.h | 5 + - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 200 +++++++++++++++++- - drivers/net/wireless/realtek/rtw89/rtw8852b.h | 13 ++ - 4 files changed, 218 insertions(+), 1 deletion(-) - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8852b.h - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -4817,6 +4817,7 @@ int rtw89_mac_read_xtal_si(struct rtw89_ - - return 0; - } -+EXPORT_SYMBOL(rtw89_mac_read_xtal_si); - - static - void rtw89_mac_pkt_drop_sta(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta) ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -2991,6 +2991,7 @@ - - #define R_AX_PWR_RATE_CTRL 0xD200 - #define R_AX_PWR_RATE_CTRL_C1 0xF200 -+#define B_AX_PWR_REF GENMASK(27, 10) - #define B_AX_FORCE_PWR_BY_RATE_EN BIT(9) - #define B_AX_FORCE_PWR_BY_RATE_VALUE_MASK GENMASK(8, 0) - -@@ -3772,6 +3773,7 @@ - #define B_DCFO_WEIGHT_MSK GENMASK(27, 24) - #define R_DCFO_OPT 0x4494 - #define B_DCFO_OPT_EN BIT(29) -+#define B_TXSHAPE_TRIANGULAR_CFG GENMASK(25, 24) - #define R_BANDEDGE 0x4498 - #define B_BANDEDGE_EN BIT(30) - #define R_TXPATH_SEL 0x458C -@@ -4005,6 +4007,9 @@ - #define B_TXPWRB_VAL GENMASK(27, 19) - #define R_DPD_OFT_EN 0x5800 - #define B_DPD_OFT_EN BIT(28) -+#define B_DPD_TSSI_CW GENMASK(26, 18) -+#define B_DPD_PWR_CW GENMASK(17, 9) -+#define B_DPD_REF GENMASK(8, 0) - #define R_DPD_OFT_ADDR 0x5804 - #define B_DPD_OFT_ADDR GENMASK(31, 27) - #define R_TXPWRB_H 0x580c ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2,9 +2,14 @@ - /* Copyright(c) 2019-2022 Realtek Corporation - */ - --#include "core.h" -+#include "coex.h" -+#include "fw.h" - #include "mac.h" -+#include "phy.h" - #include "reg.h" -+#include "rtw8852b.h" -+#include "rtw8852b_table.h" -+#include "txrx.h" - - static const struct rtw89_dle_mem rtw8852b_dle_mem_pcie[] = { - [RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size6, -@@ -19,6 +24,195 @@ static const struct rtw89_dle_mem rtw885 - NULL}, - }; - -+static u32 rtw8852b_bb_cal_txpwr_ref(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, s16 ref) -+{ -+ const u16 tssi_16dbm_cw = 0x12c; -+ const u8 base_cw_0db = 0x27; -+ const s8 ofst_int = 0; -+ s16 pwr_s10_3; -+ s16 rf_pwr_cw; -+ u16 bb_pwr_cw; -+ u32 pwr_cw; -+ u32 tssi_ofst_cw; -+ -+ pwr_s10_3 = (ref << 1) + (s16)(ofst_int) + (s16)(base_cw_0db << 3); -+ bb_pwr_cw = FIELD_GET(GENMASK(2, 0), pwr_s10_3); -+ rf_pwr_cw = FIELD_GET(GENMASK(8, 3), pwr_s10_3); -+ rf_pwr_cw = clamp_t(s16, rf_pwr_cw, 15, 63); -+ pwr_cw = (rf_pwr_cw << 3) | bb_pwr_cw; -+ -+ tssi_ofst_cw = (u32)((s16)tssi_16dbm_cw + (ref << 1) - (16 << 3)); -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -+ "[TXPWR] tssi_ofst_cw=%d rf_cw=0x%x bb_cw=0x%x\n", -+ tssi_ofst_cw, rf_pwr_cw, bb_pwr_cw); -+ -+ return FIELD_PREP(B_DPD_TSSI_CW, tssi_ofst_cw) | -+ FIELD_PREP(B_DPD_PWR_CW, pwr_cw) | -+ FIELD_PREP(B_DPD_REF, ref); -+} -+ -+static void rtw8852b_set_txpwr_ref(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ static const u32 addr[RF_PATH_NUM_8852B] = {0x5800, 0x7800}; -+ const u32 mask = B_DPD_TSSI_CW | B_DPD_PWR_CW | B_DPD_REF; -+ const u8 ofst_ofdm = 0x4; -+ const u8 ofst_cck = 0x8; -+ const s16 ref_ofdm = 0; -+ const s16 ref_cck = 0; -+ u32 val; -+ u8 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set txpwr reference\n"); -+ -+ rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_CTRL, -+ B_AX_PWR_REF, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set bb ofdm txpwr ref\n"); -+ val = rtw8852b_bb_cal_txpwr_ref(rtwdev, phy_idx, ref_ofdm); -+ -+ for (i = 0; i < RF_PATH_NUM_8852B; i++) -+ rtw89_phy_write32_idx(rtwdev, addr[i] + ofst_ofdm, mask, val, -+ phy_idx); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set bb cck txpwr ref\n"); -+ val = rtw8852b_bb_cal_txpwr_ref(rtwdev, phy_idx, ref_cck); -+ -+ for (i = 0; i < RF_PATH_NUM_8852B; i++) -+ rtw89_phy_write32_idx(rtwdev, addr[i] + ofst_cck, mask, val, -+ phy_idx); -+} -+ -+static void rtw8852b_bb_set_tx_shape_dfir(struct rtw89_dev *rtwdev, -+ u8 tx_shape_idx, -+ enum rtw89_phy_idx phy_idx) -+{ -+#define __DFIR_CFG_ADDR(i) (R_TXFIR0 + ((i) << 2)) -+#define __DFIR_CFG_MASK 0xffffffff -+#define __DFIR_CFG_NR 8 -+#define __DECL_DFIR_PARAM(_name, _val...) \ -+ static const u32 param_ ## _name[] = {_val}; \ -+ static_assert(ARRAY_SIZE(param_ ## _name) == __DFIR_CFG_NR) -+ -+ __DECL_DFIR_PARAM(flat, -+ 0x023D23FF, 0x0029B354, 0x000FC1C8, 0x00FDB053, -+ 0x00F86F9A, 0x06FAEF92, 0x00FE5FCC, 0x00FFDFF5); -+ __DECL_DFIR_PARAM(sharp, -+ 0x023D83FF, 0x002C636A, 0x0013F204, 0x00008090, -+ 0x00F87FB0, 0x06F99F83, 0x00FDBFBA, 0x00003FF5); -+ __DECL_DFIR_PARAM(sharp_14, -+ 0x023B13FF, 0x001C42DE, 0x00FDB0AD, 0x00F60F6E, -+ 0x00FD8F92, 0x0602D011, 0x0001C02C, 0x00FFF00A); -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u8 ch = chan->channel; -+ const u32 *param; -+ u32 addr; -+ int i; -+ -+ if (ch > 14) { -+ rtw89_warn(rtwdev, -+ "set tx shape dfir by unknown ch: %d on 2G\n", ch); -+ return; -+ } -+ -+ if (ch == 14) -+ param = param_sharp_14; -+ else -+ param = tx_shape_idx == 0 ? param_flat : param_sharp; -+ -+ for (i = 0; i < __DFIR_CFG_NR; i++) { -+ addr = __DFIR_CFG_ADDR(i); -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -+ "set tx shape dfir: 0x%x: 0x%x\n", addr, param[i]); -+ rtw89_phy_write32_idx(rtwdev, addr, __DFIR_CFG_MASK, param[i], -+ phy_idx); -+ } -+ -+#undef __DECL_DFIR_PARAM -+#undef __DFIR_CFG_NR -+#undef __DFIR_CFG_MASK -+#undef __DECL_CFG_ADDR -+} -+ -+static void rtw8852b_set_tx_shape(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ u8 band = chan->band_type; -+ u8 regd = rtw89_regd_get(rtwdev, band); -+ u8 tx_shape_cck = rtw89_8852b_tx_shape[band][RTW89_RS_CCK][regd]; -+ u8 tx_shape_ofdm = rtw89_8852b_tx_shape[band][RTW89_RS_OFDM][regd]; -+ -+ if (band == RTW89_BAND_2G) -+ rtw8852b_bb_set_tx_shape_dfir(rtwdev, tx_shape_cck, phy_idx); -+ -+ rtw89_phy_write32_mask(rtwdev, R_DCFO_OPT, B_TXSHAPE_TRIANGULAR_CFG, -+ tx_shape_ofdm); -+} -+ -+static void rtw8852b_set_txpwr(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ rtw89_phy_set_txpwr_byrate(rtwdev, chan, phy_idx); -+ rtw89_phy_set_txpwr_offset(rtwdev, chan, phy_idx); -+ rtw8852b_set_tx_shape(rtwdev, chan, phy_idx); -+ rtw89_phy_set_txpwr_limit(rtwdev, chan, phy_idx); -+ rtw89_phy_set_txpwr_limit_ru(rtwdev, chan, phy_idx); -+} -+ -+static void rtw8852b_set_txpwr_ctrl(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ rtw8852b_set_txpwr_ref(rtwdev, phy_idx); -+} -+ -+static -+void rtw8852b_set_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev, -+ s8 pw_ofst, enum rtw89_mac_idx mac_idx) -+{ -+ u32 reg; -+ -+ if (pw_ofst < -16 || pw_ofst > 15) { -+ rtw89_warn(rtwdev, "[ULTB] Err pwr_offset=%d\n", pw_ofst); -+ return; -+ } -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_CTRL, mac_idx); -+ rtw89_write32_set(rtwdev, reg, B_AX_PWR_UL_TB_CTRL_EN); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_1T, mac_idx); -+ rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_MASK, pw_ofst); -+ -+ pw_ofst = max_t(s8, pw_ofst - 3, -16); -+ reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_2T, mac_idx); -+ rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_MASK, pw_ofst); -+} -+ -+static int -+rtw8852b_init_txpwr_unit(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ int ret; -+ -+ ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_UL_CTRL2, 0x07763333); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_COEXT_CTRL, 0x01ebf000); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_UL_CTRL0, 0x0002f8ff); -+ if (ret) -+ return ret; -+ -+ rtw8852b_set_txpwr_ul_tb_offset(rtwdev, 0, phy_idx == RTW89_PHY_1 ? -+ RTW89_MAC_1 : RTW89_MAC_0); -+ -+ return 0; -+} -+ - static int rtw8852b_mac_enable_bb_rf(struct rtw89_dev *rtwdev) - { - int ret; -@@ -75,10 +269,14 @@ static int rtw8852b_mac_disable_bb_rf(st - static const struct rtw89_chip_ops rtw8852b_chip_ops = { - .enable_bb_rf = rtw8852b_mac_enable_bb_rf, - .disable_bb_rf = rtw8852b_mac_disable_bb_rf, -+ .set_txpwr = rtw8852b_set_txpwr, -+ .set_txpwr_ctrl = rtw8852b_set_txpwr_ctrl, -+ .init_txpwr_unit = rtw8852b_init_txpwr_unit, - }; - - const struct rtw89_chip_info rtw8852b_chip_info = { - .chip_id = RTL8852B, -+ .ops = &rtw8852b_chip_ops, - .fifo_size = 196608, - .dle_scc_rsvd_size = 98304, - .dle_mem = rtw8852b_dle_mem_pcie, ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.h -@@ -0,0 +1,13 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2022 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_8852B_H__ -+#define __RTW89_8852B_H__ -+ -+#include "core.h" -+ -+#define RF_PATH_NUM_8852B 2 -+#define BB_PATH_NUM_8852B 2 -+ -+#endif diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-007-wifi-rtw89-8852b-add-chip_ops-to-read-efuse.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-007-wifi-rtw89-8852b-add-chip_ops-to-read-efuse.patch deleted file mode 100644 index 66dd46c05..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-007-wifi-rtw89-8852b-add-chip_ops-to-read-efuse.patch +++ /dev/null @@ -1,228 +0,0 @@ -From 132dc4fe5b587c0a62fc90d78e7413944fa06669 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 28 Sep 2022 16:43:34 +0800 -Subject: [PATCH 007/149] wifi: rtw89: 8852b: add chip_ops to read efuse - -efuse stores individual data about a chip itself, such as MAC address, -country code, RF and crystal calibration data, and so on. Define a struct -to help access efuse content, and copy them into a common struct. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20220928084336.34981-8-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 106 ++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/rtw8852b.h | 75 +++++++++++++ - 2 files changed, 181 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -24,6 +24,105 @@ static const struct rtw89_dle_mem rtw885 - NULL}, - }; - -+static void rtw8852be_efuse_parsing(struct rtw89_efuse *efuse, -+ struct rtw8852b_efuse *map) -+{ -+ ether_addr_copy(efuse->addr, map->e.mac_addr); -+ efuse->rfe_type = map->rfe_type; -+ efuse->xtal_cap = map->xtal_k; -+} -+ -+static void rtw8852b_efuse_parsing_tssi(struct rtw89_dev *rtwdev, -+ struct rtw8852b_efuse *map) -+{ -+ struct rtw89_tssi_info *tssi = &rtwdev->tssi; -+ struct rtw8852b_tssi_offset *ofst[] = {&map->path_a_tssi, &map->path_b_tssi}; -+ u8 i, j; -+ -+ tssi->thermal[RF_PATH_A] = map->path_a_therm; -+ tssi->thermal[RF_PATH_B] = map->path_b_therm; -+ -+ for (i = 0; i < RF_PATH_NUM_8852B; i++) { -+ memcpy(tssi->tssi_cck[i], ofst[i]->cck_tssi, -+ sizeof(ofst[i]->cck_tssi)); -+ -+ for (j = 0; j < TSSI_CCK_CH_GROUP_NUM; j++) -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][EFUSE] path=%d cck[%d]=0x%x\n", -+ i, j, tssi->tssi_cck[i][j]); -+ -+ memcpy(tssi->tssi_mcs[i], ofst[i]->bw40_tssi, -+ sizeof(ofst[i]->bw40_tssi)); -+ memcpy(tssi->tssi_mcs[i] + TSSI_MCS_2G_CH_GROUP_NUM, -+ ofst[i]->bw40_1s_tssi_5g, sizeof(ofst[i]->bw40_1s_tssi_5g)); -+ -+ for (j = 0; j < TSSI_MCS_CH_GROUP_NUM; j++) -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][EFUSE] path=%d mcs[%d]=0x%x\n", -+ i, j, tssi->tssi_mcs[i][j]); -+ } -+} -+ -+static bool _decode_efuse_gain(u8 data, s8 *high, s8 *low) -+{ -+ if (high) -+ *high = sign_extend32(FIELD_GET(GENMASK(7, 4), data), 3); -+ if (low) -+ *low = sign_extend32(FIELD_GET(GENMASK(3, 0), data), 3); -+ -+ return data != 0xff; -+} -+ -+static void rtw8852b_efuse_parsing_gain_offset(struct rtw89_dev *rtwdev, -+ struct rtw8852b_efuse *map) -+{ -+ struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; -+ bool valid = false; -+ -+ valid |= _decode_efuse_gain(map->rx_gain_2g_cck, -+ &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_CCK], -+ &gain->offset[RF_PATH_B][RTW89_GAIN_OFFSET_2G_CCK]); -+ valid |= _decode_efuse_gain(map->rx_gain_2g_ofdm, -+ &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_OFDM], -+ &gain->offset[RF_PATH_B][RTW89_GAIN_OFFSET_2G_OFDM]); -+ valid |= _decode_efuse_gain(map->rx_gain_5g_low, -+ &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_LOW], -+ &gain->offset[RF_PATH_B][RTW89_GAIN_OFFSET_5G_LOW]); -+ valid |= _decode_efuse_gain(map->rx_gain_5g_mid, -+ &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_MID], -+ &gain->offset[RF_PATH_B][RTW89_GAIN_OFFSET_5G_MID]); -+ valid |= _decode_efuse_gain(map->rx_gain_5g_high, -+ &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_HIGH], -+ &gain->offset[RF_PATH_B][RTW89_GAIN_OFFSET_5G_HIGH]); -+ -+ gain->offset_valid = valid; -+} -+ -+static int rtw8852b_read_efuse(struct rtw89_dev *rtwdev, u8 *log_map) -+{ -+ struct rtw89_efuse *efuse = &rtwdev->efuse; -+ struct rtw8852b_efuse *map; -+ -+ map = (struct rtw8852b_efuse *)log_map; -+ -+ efuse->country_code[0] = map->country_code[0]; -+ efuse->country_code[1] = map->country_code[1]; -+ rtw8852b_efuse_parsing_tssi(rtwdev, map); -+ rtw8852b_efuse_parsing_gain_offset(rtwdev, map); -+ -+ switch (rtwdev->hci.type) { -+ case RTW89_HCI_TYPE_PCIE: -+ rtw8852be_efuse_parsing(efuse, map); -+ break; -+ default: -+ return -EOPNOTSUPP; -+ } -+ -+ rtw89_info(rtwdev, "chip rfe_type is %d\n", efuse->rfe_type); -+ -+ return 0; -+} -+ - static u32 rtw8852b_bb_cal_txpwr_ref(struct rtw89_dev *rtwdev, - enum rtw89_phy_idx phy_idx, s16 ref) - { -@@ -269,6 +368,7 @@ static int rtw8852b_mac_disable_bb_rf(st - static const struct rtw89_chip_ops rtw8852b_chip_ops = { - .enable_bb_rf = rtw8852b_mac_enable_bb_rf, - .disable_bb_rf = rtw8852b_mac_disable_bb_rf, -+ .read_efuse = rtw8852b_read_efuse, - .set_txpwr = rtw8852b_set_txpwr, - .set_txpwr_ctrl = rtw8852b_set_txpwr_ctrl, - .init_txpwr_unit = rtw8852b_init_txpwr_unit, -@@ -280,6 +380,12 @@ const struct rtw89_chip_info rtw8852b_ch - .fifo_size = 196608, - .dle_scc_rsvd_size = 98304, - .dle_mem = rtw8852b_dle_mem_pcie, -+ .sec_ctrl_efuse_size = 4, -+ .physical_efuse_size = 1216, -+ .logical_efuse_size = 2048, -+ .limit_efuse_size = 1280, -+ .dav_phy_efuse_size = 96, -+ .dav_log_efuse_size = 16, - .dma_ch_mask = BIT(RTW89_DMA_ACH4) | BIT(RTW89_DMA_ACH5) | - BIT(RTW89_DMA_ACH6) | BIT(RTW89_DMA_ACH7) | - BIT(RTW89_DMA_B1MG) | BIT(RTW89_DMA_B1HI), ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.h -@@ -10,4 +10,79 @@ - #define RF_PATH_NUM_8852B 2 - #define BB_PATH_NUM_8852B 2 - -+struct rtw8852b_u_efuse { -+ u8 rsvd[0x88]; -+ u8 mac_addr[ETH_ALEN]; -+}; -+ -+struct rtw8852b_e_efuse { -+ u8 mac_addr[ETH_ALEN]; -+}; -+ -+struct rtw8852b_tssi_offset { -+ u8 cck_tssi[TSSI_CCK_CH_GROUP_NUM]; -+ u8 bw40_tssi[TSSI_MCS_2G_CH_GROUP_NUM]; -+ u8 rsvd[7]; -+ u8 bw40_1s_tssi_5g[TSSI_MCS_5G_CH_GROUP_NUM]; -+} __packed; -+ -+struct rtw8852b_efuse { -+ u8 rsvd[0x210]; -+ struct rtw8852b_tssi_offset path_a_tssi; -+ u8 rsvd1[10]; -+ struct rtw8852b_tssi_offset path_b_tssi; -+ u8 rsvd2[94]; -+ u8 channel_plan; -+ u8 xtal_k; -+ u8 rsvd3; -+ u8 iqk_lck; -+ u8 rsvd4[5]; -+ u8 reg_setting:2; -+ u8 tx_diversity:1; -+ u8 rx_diversity:2; -+ u8 ac_mode:1; -+ u8 module_type:2; -+ u8 rsvd5; -+ u8 shared_ant:1; -+ u8 coex_type:3; -+ u8 ant_iso:1; -+ u8 radio_on_off:1; -+ u8 rsvd6:2; -+ u8 eeprom_version; -+ u8 customer_id; -+ u8 tx_bb_swing_2g; -+ u8 tx_bb_swing_5g; -+ u8 tx_cali_pwr_trk_mode; -+ u8 trx_path_selection; -+ u8 rfe_type; -+ u8 country_code[2]; -+ u8 rsvd7[3]; -+ u8 path_a_therm; -+ u8 path_b_therm; -+ u8 rsvd8[2]; -+ u8 rx_gain_2g_ofdm; -+ u8 rsvd9; -+ u8 rx_gain_2g_cck; -+ u8 rsvd10; -+ u8 rx_gain_5g_low; -+ u8 rsvd11; -+ u8 rx_gain_5g_mid; -+ u8 rsvd12; -+ u8 rx_gain_5g_high; -+ u8 rsvd13[35]; -+ u8 path_a_cck_pwr_idx[6]; -+ u8 path_a_bw40_1tx_pwr_idx[5]; -+ u8 path_a_ofdm_1tx_pwr_idx_diff:4; -+ u8 path_a_bw20_1tx_pwr_idx_diff:4; -+ u8 path_a_bw20_2tx_pwr_idx_diff:4; -+ u8 path_a_bw40_2tx_pwr_idx_diff:4; -+ u8 path_a_cck_2tx_pwr_idx_diff:4; -+ u8 path_a_ofdm_2tx_pwr_idx_diff:4; -+ u8 rsvd14[0xf2]; -+ union { -+ struct rtw8852b_u_efuse u; -+ struct rtw8852b_e_efuse e; -+ }; -+} __packed; -+ - #endif diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-008-wifi-rtw89-8852b-add-chip_ops-to-read-phy-cap.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-008-wifi-rtw89-8852b-add-chip_ops-to-read-phy-cap.patch deleted file mode 100644 index ac866f4ab..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-008-wifi-rtw89-8852b-add-chip_ops-to-read-phy-cap.patch +++ /dev/null @@ -1,253 +0,0 @@ -From 134cf7c01517d5cfaab940cacbb41525659de5f6 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 28 Sep 2022 16:43:35 +0800 -Subject: [PATCH 008/149] wifi: rtw89: 8852b: add chip_ops to read phy cap - -This efuse region is to store PHY calibration, and it is a separated region -from the region that stores MAC address. Then, use these data to configure -via chip_ops::power_trim that is a calibration mechanism of TX power. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20220928084336.34981-9-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 4 + - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 184 ++++++++++++++++++ - 2 files changed, 188 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -84,6 +84,7 @@ enum rtw89_subband { - RTW89_CH_6G_BAND_IDX7, /* Ultra-high */ - - RTW89_SUBBAND_NR, -+ RTW89_SUBBAND_2GHZ_5GHZ_NR = RTW89_CH_5G_BAND_4 + 1, - }; - - enum rtw89_gain_offset { -@@ -2196,6 +2197,7 @@ struct rtw89_sta { - - struct rtw89_efuse { - bool valid; -+ bool power_k_valid; - u8 xtal_cap; - u8 addr[ETH_ALEN]; - u8 rfe_type; -@@ -3425,8 +3427,10 @@ struct rtw89_phy_bb_gain_info { - - struct rtw89_phy_efuse_gain { - bool offset_valid; -+ bool comp_valid; - s8 offset[RF_PATH_MAX][RTW89_GAIN_OFFSET_NR]; /* S(8, 0) */ - s8 offset_base[RTW89_PHY_MAX]; /* S(8, 4) */ -+ s8 comp[RF_PATH_MAX][RTW89_SUBBAND_NR]; /* S(8, 0) */ - }; - - struct rtw89_dev { ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -123,6 +123,186 @@ static int rtw8852b_read_efuse(struct rt - return 0; - } - -+static void rtw8852b_phycap_parsing_power_cal(struct rtw89_dev *rtwdev, u8 *phycap_map) -+{ -+#define PWR_K_CHK_OFFSET 0x5E9 -+#define PWR_K_CHK_VALUE 0xAA -+ u32 offset = PWR_K_CHK_OFFSET - rtwdev->chip->phycap_addr; -+ -+ if (phycap_map[offset] == PWR_K_CHK_VALUE) -+ rtwdev->efuse.power_k_valid = true; -+} -+ -+static void rtw8852b_phycap_parsing_tssi(struct rtw89_dev *rtwdev, u8 *phycap_map) -+{ -+ struct rtw89_tssi_info *tssi = &rtwdev->tssi; -+ static const u32 tssi_trim_addr[RF_PATH_NUM_8852B] = {0x5D6, 0x5AB}; -+ u32 addr = rtwdev->chip->phycap_addr; -+ bool pg = false; -+ u32 ofst; -+ u8 i, j; -+ -+ for (i = 0; i < RF_PATH_NUM_8852B; i++) { -+ for (j = 0; j < TSSI_TRIM_CH_GROUP_NUM; j++) { -+ /* addrs are in decreasing order */ -+ ofst = tssi_trim_addr[i] - addr - j; -+ tssi->tssi_trim[i][j] = phycap_map[ofst]; -+ -+ if (phycap_map[ofst] != 0xff) -+ pg = true; -+ } -+ } -+ -+ if (!pg) { -+ memset(tssi->tssi_trim, 0, sizeof(tssi->tssi_trim)); -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM] no PG, set all trim info to 0\n"); -+ } -+ -+ for (i = 0; i < RF_PATH_NUM_8852B; i++) -+ for (j = 0; j < TSSI_TRIM_CH_GROUP_NUM; j++) -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] path=%d idx=%d trim=0x%x addr=0x%x\n", -+ i, j, tssi->tssi_trim[i][j], -+ tssi_trim_addr[i] - j); -+} -+ -+static void rtw8852b_phycap_parsing_thermal_trim(struct rtw89_dev *rtwdev, -+ u8 *phycap_map) -+{ -+ struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; -+ static const u32 thm_trim_addr[RF_PATH_NUM_8852B] = {0x5DF, 0x5DC}; -+ u32 addr = rtwdev->chip->phycap_addr; -+ u8 i; -+ -+ for (i = 0; i < RF_PATH_NUM_8852B; i++) { -+ info->thermal_trim[i] = phycap_map[thm_trim_addr[i] - addr]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[THERMAL][TRIM] path=%d thermal_trim=0x%x\n", -+ i, info->thermal_trim[i]); -+ -+ if (info->thermal_trim[i] != 0xff) -+ info->pg_thermal_trim = true; -+ } -+} -+ -+static void rtw8852b_thermal_trim(struct rtw89_dev *rtwdev) -+{ -+#define __thm_setting(raw) \ -+({ \ -+ u8 __v = (raw); \ -+ ((__v & 0x1) << 3) | ((__v & 0x1f) >> 1); \ -+}) -+ struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; -+ u8 i, val; -+ -+ if (!info->pg_thermal_trim) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[THERMAL][TRIM] no PG, do nothing\n"); -+ -+ return; -+ } -+ -+ for (i = 0; i < RF_PATH_NUM_8852B; i++) { -+ val = __thm_setting(info->thermal_trim[i]); -+ rtw89_write_rf(rtwdev, i, RR_TM2, RR_TM2_OFF, val); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[THERMAL][TRIM] path=%d thermal_setting=0x%x\n", -+ i, val); -+ } -+#undef __thm_setting -+} -+ -+static void rtw8852b_phycap_parsing_pa_bias_trim(struct rtw89_dev *rtwdev, -+ u8 *phycap_map) -+{ -+ struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; -+ static const u32 pabias_trim_addr[RF_PATH_NUM_8852B] = {0x5DE, 0x5DB}; -+ u32 addr = rtwdev->chip->phycap_addr; -+ u8 i; -+ -+ for (i = 0; i < RF_PATH_NUM_8852B; i++) { -+ info->pa_bias_trim[i] = phycap_map[pabias_trim_addr[i] - addr]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[PA_BIAS][TRIM] path=%d pa_bias_trim=0x%x\n", -+ i, info->pa_bias_trim[i]); -+ -+ if (info->pa_bias_trim[i] != 0xff) -+ info->pg_pa_bias_trim = true; -+ } -+} -+ -+static void rtw8852b_pa_bias_trim(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; -+ u8 pabias_2g, pabias_5g; -+ u8 i; -+ -+ if (!info->pg_pa_bias_trim) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[PA_BIAS][TRIM] no PG, do nothing\n"); -+ -+ return; -+ } -+ -+ for (i = 0; i < RF_PATH_NUM_8852B; i++) { -+ pabias_2g = FIELD_GET(GENMASK(3, 0), info->pa_bias_trim[i]); -+ pabias_5g = FIELD_GET(GENMASK(7, 4), info->pa_bias_trim[i]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[PA_BIAS][TRIM] path=%d 2G=0x%x 5G=0x%x\n", -+ i, pabias_2g, pabias_5g); -+ -+ rtw89_write_rf(rtwdev, i, RR_BIASA, RR_BIASA_TXG, pabias_2g); -+ rtw89_write_rf(rtwdev, i, RR_BIASA, RR_BIASA_TXA, pabias_5g); -+ } -+} -+ -+static void rtw8852b_phycap_parsing_gain_comp(struct rtw89_dev *rtwdev, u8 *phycap_map) -+{ -+ static const u32 comp_addrs[][RTW89_SUBBAND_2GHZ_5GHZ_NR] = { -+ {0x5BB, 0x5BA, 0, 0x5B9, 0x5B8}, -+ {0x590, 0x58F, 0, 0x58E, 0x58D}, -+ }; -+ struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; -+ u32 phycap_addr = rtwdev->chip->phycap_addr; -+ bool valid = false; -+ int path, i; -+ u8 data; -+ -+ for (path = 0; path < 2; path++) -+ for (i = 0; i < RTW89_SUBBAND_2GHZ_5GHZ_NR; i++) { -+ if (comp_addrs[path][i] == 0) -+ continue; -+ -+ data = phycap_map[comp_addrs[path][i] - phycap_addr]; -+ valid |= _decode_efuse_gain(data, NULL, -+ &gain->comp[path][i]); -+ } -+ -+ gain->comp_valid = valid; -+} -+ -+static int rtw8852b_read_phycap(struct rtw89_dev *rtwdev, u8 *phycap_map) -+{ -+ rtw8852b_phycap_parsing_power_cal(rtwdev, phycap_map); -+ rtw8852b_phycap_parsing_tssi(rtwdev, phycap_map); -+ rtw8852b_phycap_parsing_thermal_trim(rtwdev, phycap_map); -+ rtw8852b_phycap_parsing_pa_bias_trim(rtwdev, phycap_map); -+ rtw8852b_phycap_parsing_gain_comp(rtwdev, phycap_map); -+ -+ return 0; -+} -+ -+static void rtw8852b_power_trim(struct rtw89_dev *rtwdev) -+{ -+ rtw8852b_thermal_trim(rtwdev); -+ rtw8852b_pa_bias_trim(rtwdev); -+} -+ - static u32 rtw8852b_bb_cal_txpwr_ref(struct rtw89_dev *rtwdev, - enum rtw89_phy_idx phy_idx, s16 ref) - { -@@ -369,6 +549,8 @@ static const struct rtw89_chip_ops rtw88 - .enable_bb_rf = rtw8852b_mac_enable_bb_rf, - .disable_bb_rf = rtw8852b_mac_disable_bb_rf, - .read_efuse = rtw8852b_read_efuse, -+ .read_phycap = rtw8852b_read_phycap, -+ .power_trim = rtw8852b_power_trim, - .set_txpwr = rtw8852b_set_txpwr, - .set_txpwr_ctrl = rtw8852b_set_txpwr_ctrl, - .init_txpwr_unit = rtw8852b_init_txpwr_unit, -@@ -386,6 +568,8 @@ const struct rtw89_chip_info rtw8852b_ch - .limit_efuse_size = 1280, - .dav_phy_efuse_size = 96, - .dav_log_efuse_size = 16, -+ .phycap_addr = 0x580, -+ .phycap_size = 128, - .dma_ch_mask = BIT(RTW89_DMA_ACH4) | BIT(RTW89_DMA_ACH5) | - BIT(RTW89_DMA_ACH6) | BIT(RTW89_DMA_ACH7) | - BIT(RTW89_DMA_B1MG) | BIT(RTW89_DMA_B1HI), diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-009-wifi-rtw89-8852be-add-8852BE-PCI-entry.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-009-wifi-rtw89-8852be-add-8852BE-PCI-entry.patch deleted file mode 100644 index e7852735e..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-009-wifi-rtw89-8852be-add-8852BE-PCI-entry.patch +++ /dev/null @@ -1,110 +0,0 @@ -From 9695dc2e4be90315471ea4c672836929f5c403fe Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 28 Sep 2022 16:43:36 +0800 -Subject: [PATCH 009/149] wifi: rtw89: 8852be: add 8852BE PCI entry - -8852BE has two variants with different ID. One is 10ec:b852 that is a main -model with 2x2 antenna, and the other is 10ec:b85b that is a 1x1 model. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20220928084336.34981-10-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.h | 2 + - .../net/wireless/realtek/rtw89/rtw8852be.c | 64 +++++++++++++++++++ - 2 files changed, 66 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.h -@@ -85,4 +85,6 @@ struct rtw8852b_efuse { - }; - } __packed; - -+extern const struct rtw89_chip_info rtw8852b_chip_info; -+ - #endif ---- a/drivers/net/wireless/realtek/rtw89/rtw8852be.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852be.c -@@ -7,18 +7,82 @@ - - #include "pci.h" - #include "reg.h" -+#include "rtw8852b.h" - - static const struct rtw89_pci_info rtw8852b_pci_info = { -+ .txbd_trunc_mode = MAC_AX_BD_TRUNC, -+ .rxbd_trunc_mode = MAC_AX_BD_TRUNC, -+ .rxbd_mode = MAC_AX_RXBD_PKT, -+ .tag_mode = MAC_AX_TAG_MULTI, -+ .tx_burst = MAC_AX_TX_BURST_2048B, -+ .rx_burst = MAC_AX_RX_BURST_128B, -+ .wd_dma_idle_intvl = MAC_AX_WD_DMA_INTVL_256NS, -+ .wd_dma_act_intvl = MAC_AX_WD_DMA_INTVL_256NS, -+ .multi_tag_num = MAC_AX_TAG_NUM_8, -+ .lbc_en = MAC_AX_PCIE_ENABLE, -+ .lbc_tmr = MAC_AX_LBC_TMR_2MS, -+ .autok_en = MAC_AX_PCIE_DISABLE, -+ .io_rcy_en = MAC_AX_PCIE_DISABLE, -+ .io_rcy_tmr = MAC_AX_IO_RCY_ANA_TMR_6MS, -+ -+ .init_cfg_reg = R_AX_PCIE_INIT_CFG1, -+ .txhci_en_bit = B_AX_TXHCI_EN, -+ .rxhci_en_bit = B_AX_RXHCI_EN, -+ .rxbd_mode_bit = B_AX_RXBD_MODE, -+ .exp_ctrl_reg = R_AX_PCIE_EXP_CTRL, -+ .max_tag_num_mask = B_AX_MAX_TAG_NUM, -+ .rxbd_rwptr_clr_reg = R_AX_RXBD_RWPTR_CLR, -+ .txbd_rwptr_clr2_reg = 0, - .dma_stop1 = {R_AX_PCIE_DMA_STOP1, B_AX_TX_STOP1_MASK_V1}, - .dma_stop2 = {0}, - .dma_busy1 = {R_AX_PCIE_DMA_BUSY1, DMA_BUSY1_CHECK_V1}, - .dma_busy2_reg = 0, - .dma_busy3_reg = R_AX_PCIE_DMA_BUSY1, - -+ .rpwm_addr = R_AX_PCIE_HRPWM, -+ .cpwm_addr = R_AX_CPWM, - .tx_dma_ch_mask = BIT(RTW89_TXCH_ACH4) | BIT(RTW89_TXCH_ACH5) | - BIT(RTW89_TXCH_ACH6) | BIT(RTW89_TXCH_ACH7) | - BIT(RTW89_TXCH_CH10) | BIT(RTW89_TXCH_CH11), -+ .bd_idx_addr_low_power = NULL, -+ .dma_addr_set = &rtw89_pci_ch_dma_addr_set, -+ -+ .ltr_set = rtw89_pci_ltr_set, -+ .fill_txaddr_info = rtw89_pci_fill_txaddr_info, -+ .config_intr_mask = rtw89_pci_config_intr_mask, -+ .enable_intr = rtw89_pci_enable_intr, -+ .disable_intr = rtw89_pci_disable_intr, -+ .recognize_intrs = rtw89_pci_recognize_intrs, -+}; -+ -+static const struct rtw89_driver_info rtw89_8852be_info = { -+ .chip = &rtw8852b_chip_info, -+ .bus = { -+ .pci = &rtw8852b_pci_info, -+ }, -+}; -+ -+static const struct pci_device_id rtw89_8852be_id_table[] = { -+ { -+ PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xb852), -+ .driver_data = (kernel_ulong_t)&rtw89_8852be_info, -+ }, -+ { -+ PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xb85b), -+ .driver_data = (kernel_ulong_t)&rtw89_8852be_info, -+ }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(pci, rtw89_8852be_id_table); -+ -+static struct pci_driver rtw89_8852be_driver = { -+ .name = "rtw89_8852be", -+ .id_table = rtw89_8852be_id_table, -+ .probe = rtw89_pci_probe, -+ .remove = rtw89_pci_remove, -+ .driver.pm = &rtw89_pm_ops, - }; -+module_pci_driver(rtw89_8852be_driver); - - MODULE_AUTHOR("Realtek Corporation"); - MODULE_DESCRIPTION("Realtek 802.11ax wireless 8852BE driver"); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-010-wifi-rtw89-8852c-correct-set-of-IQK-backup-registers.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-010-wifi-rtw89-8852c-correct-set-of-IQK-backup-registers.patch deleted file mode 100644 index 208b6f5fb..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-010-wifi-rtw89-8852c-correct-set-of-IQK-backup-registers.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 68b0ce5bb4002cd657963cb876f0ff51729f9bfc Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 30 Sep 2022 21:33:17 +0800 -Subject: [PATCH 010/149] wifi: rtw89: 8852c: correct set of IQK backup - registers - -IQK can change the values of this register set, so need to backup and -restore the values. During we rewrite IQK, the policy is changed. Some -values are controlled and filled by IQK, and don't need to restore after -IQK. Therefore, remove this kind of registers from this array. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20220930133318.6335-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c | 3 +-- - 1 file changed, 1 insertion(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c -@@ -22,8 +22,7 @@ static const u32 _tssi_de_mcs_5m[RF_PATH - static const u32 _tssi_de_mcs_10m[RF_PATH_NUM_8852C] = {0x5830, 0x7830}; - - static const u32 rtw8852c_backup_bb_regs[] = { -- 0x813c, 0x8124, 0x8120, 0xc0d4, 0xc0d8, 0xc0e8, 0x823c, 0x8224, 0x8220, -- 0xc1d4, 0xc1d8, 0xc1e8 -+ 0x8120, 0xc0d4, 0xc0d8, 0xc0e8, 0x8220, 0xc1d4, 0xc1d8, 0xc1e8 - }; - - static const u32 rtw8852c_backup_rf_regs[] = { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-011-wifi-rtw89-8852c-rfk-correct-miscoding-delay-of-DPK.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-011-wifi-rtw89-8852c-rfk-correct-miscoding-delay-of-DPK.patch deleted file mode 100644 index 014ff029e..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-011-wifi-rtw89-8852c-rfk-correct-miscoding-delay-of-DPK.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 3be11416204a7aecbdba8c843849f204c631b8e6 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 30 Sep 2022 21:33:18 +0800 -Subject: [PATCH 011/149] wifi: rtw89: 8852c: rfk: correct miscoding delay of - DPK - -Using mdelay() can work well, but calibration causes too much time. Use -proper udelay() to get shorter time and the same result. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20220930133318.6335-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c -@@ -1666,7 +1666,7 @@ static u8 _dpk_one_shot(struct rtw89_dev - - ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val == 0x55, - 10, 20000, false, rtwdev, 0xbff8, MASKBYTE0); -- mdelay(10); -+ udelay(10); - rtw89_phy_write32_clr(rtwdev, R_NCTL_N1, MASKBYTE0); - - rtw89_debug(rtwdev, RTW89_DBG_RFK, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-012-wifi-rtw89-8852c-update-BB-parameters-to-v28.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-012-wifi-rtw89-8852c-update-BB-parameters-to-v28.patch deleted file mode 100644 index 91a4a883d..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-012-wifi-rtw89-8852c-update-BB-parameters-to-v28.patch +++ /dev/null @@ -1,1440 +0,0 @@ -From a9ee25c32fd4569f63cd34def9a013fb3dad8e01 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 30 Sep 2022 21:36:58 +0800 -Subject: [PATCH 012/149] wifi: rtw89: 8852c: update BB parameters to v28 - -Update BB parameters along with internal tag HALBB_027_067_07. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20220930133659.7789-1-pkshih@realtek.com ---- - .../wireless/realtek/rtw89/rtw8852c_table.c | 988 ++++++++++++++++-- - 1 file changed, 879 insertions(+), 109 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c -@@ -10,6 +10,8 @@ static const struct rtw89_reg2_def rtw89 - {0xF0FF0000, 0x00000000}, - {0xF03300FF, 0x00000001}, - {0xF03400FF, 0x00000002}, -+ {0xF03500FF, 0x00000003}, -+ {0xF03600FF, 0x00000004}, - {0x70C, 0x00000020}, - {0x704, 0x601E0100}, - {0x4000, 0x00000000}, -@@ -200,7 +202,7 @@ static const struct rtw89_reg2_def rtw89 - {0x4264, 0x00000000}, - {0x4268, 0x00000000}, - {0x426C, 0x0418317C}, -- {0x46C0, 0x00000001}, -+ {0x46C0, 0x00000000}, - {0x4270, 0x00D6135C}, - {0x46C4, 0x00000033}, - {0x4274, 0x00000000}, -@@ -342,7 +344,7 @@ static const struct rtw89_reg2_def rtw89 - {0x442C, 0x00000000}, - {0x4430, 0x00000000}, - {0x4434, 0x00000000}, -- {0x4438, 0x590642D0}, -+ {0x4438, 0x59096398}, - {0x443C, 0x398668A0}, - {0x4440, 0x6C100808}, - {0x4444, 0x4A145344}, -@@ -566,9 +568,9 @@ static const struct rtw89_reg2_def rtw89 - {0x4BA8, 0x002B6456}, - {0x45E0, 0x00000000}, - {0x45E4, 0x00000000}, -- {0x45E8, 0x00E2E1E1}, -+ {0x45E8, 0x00C8E1E1}, - {0x45EC, 0xCBCBB6B6}, -- {0x45F0, 0x59100FCA}, -+ {0x45F0, 0x5F900FCA}, - {0x4BAC, 0x12CAB6DE}, - {0x4BB0, 0x00001110}, - {0x45F4, 0x08882550}, -@@ -584,9 +586,17 @@ static const struct rtw89_reg2_def rtw89 - {0x4660, 0x41250EF4}, - {0x4664, 0x6750E458}, - {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x45DC, 0xE1CB38E8}, -- {0x4660, 0x4A2E1800}, -- {0x4664, 0x6750E462}, -+ {0x45DC, 0xD1B942F4}, -+ {0x4660, 0x41250EF4}, -+ {0x4664, 0x6750E458}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x45DC, 0xD1B942F4}, -+ {0x4660, 0x41250EF4}, -+ {0x4664, 0x6750E458}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x45DC, 0xD1B942F4}, -+ {0x4660, 0x41250EF4}, -+ {0x4664, 0x6750E458}, - {0xA0000000, 0x00000000}, - {0x45DC, 0xE1CB38E8}, - {0x4660, 0x4A2E1800}, -@@ -603,7 +613,19 @@ static const struct rtw89_reg2_def rtw89 - {0x4688, 0x1A10FF04}, - {0x468C, 0x282A3000}, - {0x4690, 0x2A29292A}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4694, 0x04FA2A2A}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4694, 0x04FA2A2A}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4694, 0x06FA2A2A}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4694, 0x04FA2A2A}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, - {0x4694, 0x04FA2A2A}, -+ {0xA0000000, 0x00000000}, -+ {0x4694, 0x04FA2A2A}, -+ {0xB0000000, 0x00000000}, - {0x4698, 0xEE0F04D1}, - {0x469C, 0x89291436}, - {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -@@ -612,6 +634,10 @@ static const struct rtw89_reg2_def rtw89 - {0x46A0, 0x0701E79E}, - {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, - {0x46A0, 0x0701E79E}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x46A0, 0x0701E79E}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x46A0, 0x0701E79E}, - {0xA0000000, 0x00000000}, - {0x46A0, 0x0701E79E}, - {0xB0000000, 0x00000000}, -@@ -620,11 +646,17 @@ static const struct rtw89_reg2_def rtw89 - {0x46A8, 0x2212FF14}, - {0x46AC, 0x60423537}, - {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x46A8, 0x649EFF14}, -+ {0x46AC, 0xA1B37C4E}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, - {0x46A8, 0x4D1E7F14}, - {0x46AC, 0x60B37C4E}, -- {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x46A8, 0x2212FF14}, -- {0x46AC, 0x60423537}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x46A8, 0x649EFF14}, -+ {0x46AC, 0xA1B37C4E}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x46A8, 0x649EFF14}, -+ {0x46AC, 0xA1B37C4E}, - {0xA0000000, 0x00000000}, - {0x46A8, 0x2212FF14}, - {0x46AC, 0x60423537}, -@@ -637,11 +669,19 @@ static const struct rtw89_reg2_def rtw89 - {0x4720, 0x3FFFFD63}, - {0x4724, 0xB58D11FF}, - {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x46BC, 0x5107C252}, -- {0x4720, 0x27795843}, -+ {0x46BC, 0x510FC252}, -+ {0x4720, 0x27795303}, - {0x4724, 0xB58D11F5}, - {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x46BC, 0x5107C252}, -+ {0x46BC, 0x510FC252}, -+ {0x4720, 0x27795843}, -+ {0x4724, 0xB58D11F5}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x46BC, 0x510FC252}, -+ {0x4720, 0x27795303}, -+ {0x4724, 0xB58D11F5}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x46BC, 0x510FC252}, - {0x4720, 0x27795303}, - {0x4724, 0xB58D11F5}, - {0xA0000000, 0x00000000}, -@@ -656,11 +696,17 @@ static const struct rtw89_reg2_def rtw89 - {0x4734, 0x00000020}, - {0x4738, 0x8325C500}, - {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x4734, 0x003D4C20}, -+ {0x4734, 0x003D5420}, - {0x4738, 0x8F25C500}, - {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4734, 0x003D4C20}, -+ {0x4738, 0x8F25C500}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4734, 0x003D5420}, -+ {0x4738, 0x8F25C500}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, - {0x4734, 0x003D5420}, -- {0x4738, 0x8725C500}, -+ {0x4738, 0x8F25C500}, - {0xA0000000, 0x00000000}, - {0x4734, 0x00000020}, - {0x4738, 0x8325C500}, -@@ -678,8 +724,14 @@ static const struct rtw89_reg2_def rtw89 - {0x4BB4, 0x05EBC8AF}, - {0x4BB8, 0x99543D24}, - {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x4BB4, 0xFBD5B89F}, -- {0x4BB8, 0x99563918}, -+ {0x4BB4, 0x05EBC8AF}, -+ {0x4BB8, 0x99543D24}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4BB4, 0x05EBC8AF}, -+ {0x4BB8, 0x99543D24}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4BB4, 0x05EBC8AF}, -+ {0x4BB8, 0x99543D24}, - {0xA0000000, 0x00000000}, - {0x4BB4, 0xFBD5B89F}, - {0x4BB8, 0x99563918}, -@@ -729,10 +781,10 @@ static const struct rtw89_reg2_def rtw89 - {0x4C58, 0x00001146}, - {0x4C5C, 0x00000000}, - {0x4C60, 0x00000000}, -- {0x4C64, 0xE2E1E1DE}, -+ {0x4C64, 0xC8E1E1DE}, - {0x4C68, 0xB6B600B6}, - {0x4C6C, 0xCACBCBCA}, -- {0x4C70, 0x8091010F}, -+ {0x4C70, 0x80F9010F}, - {0x4C74, 0x00000B11}, - {0x46C8, 0x08882550}, - {0x46CC, 0x08CC2660}, -@@ -747,9 +799,17 @@ static const struct rtw89_reg2_def rtw89 - {0x4744, 0x412504E8}, - {0x4748, 0x6850E459}, - {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x4740, 0xE4CD38E8}, -- {0x4744, 0x4C321B04}, -- {0x4748, 0x6750E466}, -+ {0x4740, 0xC5AD42F4}, -+ {0x4744, 0x412504E8}, -+ {0x4748, 0x6850E459}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4740, 0xC5AD42F4}, -+ {0x4744, 0x412504E8}, -+ {0x4748, 0x6850E459}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4740, 0xC5AD42F4}, -+ {0x4744, 0x412504E8}, -+ {0x4748, 0x6850E459}, - {0xA0000000, 0x00000000}, - {0x4740, 0xE4CD38E8}, - {0x4744, 0x4C321B04}, -@@ -766,7 +826,19 @@ static const struct rtw89_reg2_def rtw89 - {0x476C, 0x1A10FF04}, - {0x4770, 0x282A3000}, - {0x4774, 0x2A29292A}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x4778, 0x04FA2A2A}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4778, 0x04FA2A2A}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4778, 0x06FA2A2A}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4778, 0x04FA2A2A}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4778, 0x04FA2A2A}, -+ {0xA0000000, 0x00000000}, -+ {0x4778, 0x04FA2A2A}, -+ {0xB0000000, 0x00000000}, - {0x477C, 0xEE0F04D1}, - {0x49F0, 0x89291436}, - {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -@@ -775,6 +847,10 @@ static const struct rtw89_reg2_def rtw89 - {0x49F4, 0x0701E79E}, - {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, - {0x49F4, 0x0701E79E}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x49F4, 0x0701E79E}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x49F4, 0x0701E79E}, - {0xA0000000, 0x00000000}, - {0x49F4, 0x0701E79E}, - {0xB0000000, 0x00000000}, -@@ -783,11 +859,17 @@ static const struct rtw89_reg2_def rtw89 - {0x4A5C, 0x2212FF14}, - {0x4A60, 0x60423537}, - {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4A5C, 0x649EFF14}, -+ {0x4A60, 0xA1B37C4E}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, - {0x4A5C, 0x4D1E7F14}, - {0x4A60, 0x60B37C4E}, -- {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x4A5C, 0x2212FF14}, -- {0x4A60, 0x60423537}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4A5C, 0x649EFF14}, -+ {0x4A60, 0xA1B37C4E}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4A5C, 0x649EFF14}, -+ {0x4A60, 0xA1B37C4E}, - {0xA0000000, 0x00000000}, - {0x4A5C, 0x2212FF14}, - {0x4A60, 0x60423537}, -@@ -800,11 +882,19 @@ static const struct rtw89_reg2_def rtw89 - {0x4A74, 0x3FFFFD63}, - {0x4A78, 0xB58D11FF}, - {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x4A70, 0x5107C252}, -- {0x4A74, 0x27795843}, -+ {0x4A70, 0x510FC252}, -+ {0x4A74, 0x27795303}, - {0x4A78, 0xB58D11F5}, - {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x4A70, 0x5107C252}, -+ {0x4A70, 0x510FC252}, -+ {0x4A74, 0x27795843}, -+ {0x4A78, 0xB58D11F5}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4A70, 0x510FC252}, -+ {0x4A74, 0x27795303}, -+ {0x4A78, 0xB58D11F5}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4A70, 0x510FC252}, - {0x4A74, 0x27795303}, - {0x4A78, 0xB58D11F5}, - {0xA0000000, 0x00000000}, -@@ -819,11 +909,17 @@ static const struct rtw89_reg2_def rtw89 - {0x4AA0, 0x00000020}, - {0x4AA4, 0x8325C500}, - {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x4AA0, 0x003D4C20}, -+ {0x4AA0, 0x003D5420}, - {0x4AA4, 0x8F25C500}, - {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4AA0, 0x003D4C20}, -+ {0x4AA4, 0x8F25C500}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4AA0, 0x003D5420}, -+ {0x4AA4, 0x8F25C500}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, - {0x4AA0, 0x003D5420}, -- {0x4AA4, 0x8725C500}, -+ {0x4AA4, 0x8F25C500}, - {0xA0000000, 0x00000000}, - {0x4AA0, 0x00000020}, - {0x4AA4, 0x8325C500}, -@@ -841,8 +937,14 @@ static const struct rtw89_reg2_def rtw89 - {0x4C78, 0x07ECC9B0}, - {0x4C7C, 0x995B4126}, - {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x4C78, 0xFBD5B89F}, -- {0x4C7C, 0x99563918}, -+ {0x4C78, 0x07ECC9B0}, -+ {0x4C7C, 0x995B4126}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4C78, 0x07ECC9B0}, -+ {0x4C7C, 0x995B4126}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4C78, 0x07ECC9B0}, -+ {0x4C7C, 0x995B4126}, - {0xA0000000, 0x00000000}, - {0x4C78, 0xFBD5B89F}, - {0x4C7C, 0x99563918}, -@@ -907,17 +1009,46 @@ static const struct rtw89_reg2_def rtw89 - {0x47B4, 0x00000005}, - {0x4D2C, 0x0008C0C1}, - {0x47B8, 0x00001759}, -- {0x47BC, 0x4B702400}, -- {0x47C0, 0x831508BA}, -+ {0x47BC, 0x4B002402}, -+ {0x47C0, 0x831508BC}, - {0x4A14, 0x000000E9}, -- {0x4D30, 0x00000001}, -+ {0x4D30, 0x00000000}, - {0x4E94, 0x000000FC}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x47C4, 0x9ABBCACB}, -+ {0x47C8, 0x56767578}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x47C4, 0x9ABBCACB}, -+ {0x47C8, 0x56767578}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x47C4, 0x9ABBCACB}, -+ {0x47C8, 0x56767578}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x47C4, 0x9ABBCACB}, -+ {0x47C8, 0x56767578}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x47C4, 0x9ABBCACB}, -+ {0x47C8, 0x56767578}, -+ {0xA0000000, 0x00000000}, - {0x47C4, 0x9ABBCACB}, - {0x47C8, 0x56767578}, -+ {0xB0000000, 0x00000000}, - {0x47CC, 0xBBCCBBB3}, - {0x47D0, 0x57889989}, - {0x47D4, 0x00000F45}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4D34, 0x7BB167AB}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4D34, 0x7BB1579A}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4D34, 0x7BB167AB}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4D34, 0x7BB1579A}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4D34, 0x7BB1579A}, -+ {0xA0000000, 0x00000000}, - {0x4D34, 0x7BB167AB}, -+ {0xB0000000, 0x00000000}, - {0x4D38, 0xBBBBBB05}, - {0x4D3C, 0x777777BB}, - {0x4D40, 0x00015277}, -@@ -942,7 +1073,19 @@ static const struct rtw89_reg2_def rtw89 - {0x4D48, 0x8C413016}, - {0x4D4C, 0xA140B028}, - {0x4D50, 0x00150A31}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x481C, 0x576DF814}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x481C, 0x576DF814}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x481C, 0x576BF814}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x481C, 0x576DF814}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x481C, 0x576DF814}, -+ {0xA0000000, 0x00000000}, -+ {0x481C, 0x576DF814}, -+ {0xB0000000, 0x00000000}, - {0x4820, 0xA08877AC}, - {0x4824, 0x0000007A}, - {0x4D54, 0x00001184}, -@@ -967,7 +1110,19 @@ static const struct rtw89_reg2_def rtw89 - {0x4D78, 0x994C1502}, - {0x4D7C, 0x00017912}, - {0x4EDC, 0x00000001}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x484C, 0x0000CA62}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x484C, 0x00008A62}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x484C, 0x0000CA62}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, - {0x484C, 0x00008A62}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x484C, 0x00008A62}, -+ {0xA0000000, 0x00000000}, -+ {0x484C, 0x0000CA62}, -+ {0xB0000000, 0x00000000}, - {0x4D80, 0x00000002}, - {0x4850, 0x00000008}, - {0x4854, 0x009B902A}, -@@ -1014,7 +1169,19 @@ static const struct rtw89_reg2_def rtw89 - {0x4DA0, 0x8C413016}, - {0x4DA4, 0xA140B028}, - {0x4DA8, 0x00150A31}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x48D4, 0x576DF814}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x48D4, 0x576BF814}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x48D4, 0x576BF814}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x48D4, 0x576BF814}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x48D4, 0x576BF814}, -+ {0xA0000000, 0x00000000}, - {0x48D4, 0x576DF814}, -+ {0xB0000000, 0x00000000}, - {0x48D8, 0xA08877AC}, - {0x48DC, 0x0000007A}, - {0x4DAC, 0x00001184}, -@@ -1039,7 +1206,19 @@ static const struct rtw89_reg2_def rtw89 - {0x4DD0, 0x994C1502}, - {0x4DD4, 0x00017912}, - {0x4EE4, 0x00000001}, -- {0x4904, 0x00008A62}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4904, 0x0000CA62}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4904, 0x0000CA62}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4904, 0x0000CA62}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4904, 0x0000CA62}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4904, 0x0000CA62}, -+ {0xA0000000, 0x00000000}, -+ {0x4904, 0x0000CA62}, -+ {0xB0000000, 0x00000000}, - {0x4DD8, 0x00000002}, - {0x4908, 0x00000008}, - {0x490C, 0x80040000}, -@@ -1096,8 +1275,8 @@ static const struct rtw89_reg2_def rtw89 - {0x4988, 0x00000000}, - {0x498C, 0x00000000}, - {0x4E34, 0x00FC0000}, -- {0x4E38, 0x0000F800}, -- {0x4E3C, 0x00000001}, -+ {0x4E38, 0x00000000}, -+ {0x4E3C, 0x00000003}, - {0x4990, 0x00000000}, - {0x4994, 0x00000000}, - {0x4998, 0x00000000}, -@@ -1134,7 +1313,7 @@ static const struct rtw89_reg2_def rtw89 - {0x710, 0xEF810000}, - {0xC54, 0x1AE1436A}, - {0xC58, 0x41000000}, -- {0xC68, 0x10000050}, -+ {0xC68, 0x90000050}, - {0xC6C, 0x20061020}, - {0x704, 0x601E0100}, - {0xC74, 0x00000000}, -@@ -1225,12 +1404,12 @@ static const struct rtw89_reg2_def rtw89 - {0x328, 0xE000E000}, - {0x32C, 0x0041E000}, - {0x35C, 0x000004C4}, -- {0xC0D4, 0xA7C41460}, -+ {0xC0D4, 0xA7441460}, - {0xC0D8, 0xC6BA7F67}, - {0xC0DC, 0x30C52868}, - {0xC0E0, 0x75008128}, - {0xC0E4, 0x0000272B}, -- {0xC1D4, 0xA7C41460}, -+ {0xC1D4, 0xA7441460}, - {0xC1D8, 0xC6BA7F67}, - {0xC1DC, 0x30C52868}, - {0xC1E0, 0x75008128}, -@@ -1290,7 +1469,7 @@ static const struct rtw89_reg2_def rtw89 - {0xC8C, 0x02F2FC08}, - {0xC70, 0x071BFC00}, - {0x980, 0x10002251}, -- {0x988, 0x3C3C4107}, -+ {0x988, 0x3C3C8107}, - {0x904, 0x00000005}, - {0x994, 0x00000010}, - {0x000, 0x0580801F}, -@@ -1359,7 +1538,19 @@ static const struct rtw89_reg2_def rtw89 - {0x2310, 0xBC80536C}, - {0x2314, 0x0363A0F3}, - {0x2318, 0x000000BB}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x724, 0x00111200}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x724, 0x20111100}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x724, 0x20111100}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x724, 0x01100100}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x724, 0x01100100}, -+ {0xA0000000, 0x00000000}, - {0x724, 0x00111200}, -+ {0xB0000000, 0x00000000}, - {0x704, 0x601E0D00}, - {0xC78, 0xBFFFFFFF}, - {0x704, 0x601E0D02}, -@@ -1393,7 +1584,7 @@ static const struct rtw89_reg2_def rtw89 - {0xC60, 0x017FFFF3}, - {0xC70, 0x071BFE00}, - {0xC70, 0x071BFE60}, -- {0xC6C, 0x20061021}, -+ {0xC6C, 0x26061021}, - {0x58AC, 0x08000000}, - {0x78AC, 0x08000000}, - {0x8120, 0x10000000}, -@@ -1452,7 +1643,7 @@ static const struct rtw89_reg2_def rtw89 - {0x12A0, 0x24903056}, - {0x12AC, 0x12333121}, - {0x12B8, 0x30020000}, -- {0x2000, 0x18BBBF84}, -+ {0x2000, 0x20BBBF04}, - {0x2C14, 0x85000005}, - {0x3200, 0x00010142}, - {0x32A0, 0x24903056}, -@@ -1469,7 +1660,21 @@ static const struct rtw89_reg2_def rtw89 - {0x76C8, 0x0E800400}, - {0x984, 0x000000E0}, - {0x2008, 0x000FFFFF}, -+ {0x1210, 0x8049E304}, -+ {0x3210, 0x8049E304}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x58B0, 0x00000800}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x58B0, 0x00000000}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x58B0, 0x00000000}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x58B0, 0x00000000}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x58B0, 0x00000000}, -+ {0xA0000000, 0x00000000}, -+ {0x58B0, 0x00000800}, -+ {0xB0000000, 0x00000000}, - {0x5A00, 0x00000000}, - {0x5A04, 0x00000000}, - {0x5A08, 0x00000000}, -@@ -1479,7 +1684,19 @@ static const struct rtw89_reg2_def rtw89 - {0x5A18, 0x00000000}, - {0x5A1C, 0x00000000}, - {0x5A20, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x5A24, 0x00050000}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5A24, 0x00000000}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5A24, 0x00000000}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5A24, 0x00000000}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5A24, 0x00000000}, -+ {0xA0000000, 0x00000000}, -+ {0x5A24, 0x00050000}, -+ {0xB0000000, 0x00000000}, - {0x5A28, 0x00000000}, - {0x5A2C, 0x00000000}, - {0x5A30, 0x00000000}, -@@ -1487,14 +1704,38 @@ static const struct rtw89_reg2_def rtw89 - {0x5A38, 0x00000000}, - {0x5A3C, 0x00000000}, - {0x5A40, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5A44, 0x00000005}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5A44, 0x00000000}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5A44, 0x00000000}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5A44, 0x00000000}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5A44, 0x00000000}, -+ {0xA0000000, 0x00000000}, - {0x5A44, 0x00000005}, -+ {0xB0000000, 0x00000000}, - {0x5A48, 0x00000000}, - {0x5A4C, 0x00000000}, - {0x5A50, 0x00000000}, - {0x5A54, 0x00000000}, - {0x5A58, 0x00000000}, - {0x5A5C, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x5A60, 0x00050000}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5A60, 0x00000000}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5A60, 0x00000000}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5A60, 0x00000000}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5A60, 0x00000000}, -+ {0xA0000000, 0x00000000}, -+ {0x5A60, 0x00050000}, -+ {0xB0000000, 0x00000000}, - {0x5A64, 0x00000000}, - {0x5A68, 0x00000000}, - {0x5A6C, 0x00000000}, -@@ -1514,12 +1755,49 @@ static const struct rtw89_reg2_def rtw89 - {0x5AA4, 0x00000000}, - {0x5AA8, 0x00000000}, - {0x5AAC, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x5AB0, 0x00050005}, - {0x5AB4, 0x00050005}, - {0x5AB8, 0x00050005}, - {0x5ABC, 0x00050005}, - {0x5AC0, 0x00000005}, - {0x78B0, 0x00000800}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5AB0, 0x00000000}, -+ {0x5AB4, 0x00000000}, -+ {0x5AB8, 0x00000000}, -+ {0x5ABC, 0x00000000}, -+ {0x5AC0, 0x00000000}, -+ {0x78B0, 0x00000000}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5AB0, 0x00000000}, -+ {0x5AB4, 0x00000000}, -+ {0x5AB8, 0x00000000}, -+ {0x5ABC, 0x00000000}, -+ {0x5AC0, 0x00000000}, -+ {0x78B0, 0x00000000}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5AB0, 0x00000000}, -+ {0x5AB4, 0x00000000}, -+ {0x5AB8, 0x00000000}, -+ {0x5ABC, 0x00000000}, -+ {0x5AC0, 0x00000000}, -+ {0x78B0, 0x00000000}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x5AB0, 0x00000000}, -+ {0x5AB4, 0x00000000}, -+ {0x5AB8, 0x00000000}, -+ {0x5ABC, 0x00000000}, -+ {0x5AC0, 0x00000000}, -+ {0x78B0, 0x00000000}, -+ {0xA0000000, 0x00000000}, -+ {0x5AB0, 0x00050005}, -+ {0x5AB4, 0x00050005}, -+ {0x5AB8, 0x00050005}, -+ {0x5ABC, 0x00050005}, -+ {0x5AC0, 0x00000005}, -+ {0x78B0, 0x00000800}, -+ {0xB0000000, 0x00000000}, - {0x7A00, 0x00000000}, - {0x7A04, 0x00000000}, - {0x7A08, 0x00000000}, -@@ -1529,7 +1807,19 @@ static const struct rtw89_reg2_def rtw89 - {0x7A18, 0x00000000}, - {0x7A1C, 0x00000000}, - {0x7A20, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x7A24, 0x00050000}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7A24, 0x00000000}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7A24, 0x00000000}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7A24, 0x00000000}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7A24, 0x00000000}, -+ {0xA0000000, 0x00000000}, -+ {0x7A24, 0x00050000}, -+ {0xB0000000, 0x00000000}, - {0x7A28, 0x00000000}, - {0x7A2C, 0x00000000}, - {0x7A30, 0x00000000}, -@@ -1537,14 +1827,38 @@ static const struct rtw89_reg2_def rtw89 - {0x7A38, 0x00000000}, - {0x7A3C, 0x00000000}, - {0x7A40, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x7A44, 0x00000005}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7A44, 0x00000000}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7A44, 0x00000000}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7A44, 0x00000000}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7A44, 0x00000000}, -+ {0xA0000000, 0x00000000}, -+ {0x7A44, 0x00000005}, -+ {0xB0000000, 0x00000000}, - {0x7A48, 0x00000000}, - {0x7A4C, 0x00000000}, - {0x7A50, 0x00000000}, - {0x7A54, 0x00000000}, - {0x7A58, 0x00000000}, - {0x7A5C, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7A60, 0x00050000}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7A60, 0x00000000}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7A60, 0x00000000}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7A60, 0x00000000}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7A60, 0x00000000}, -+ {0xA0000000, 0x00000000}, - {0x7A60, 0x00050000}, -+ {0xB0000000, 0x00000000}, - {0x7A64, 0x00000000}, - {0x7A68, 0x00000000}, - {0x7A6C, 0x00000000}, -@@ -1564,143 +1878,223 @@ static const struct rtw89_reg2_def rtw89 - {0x7AA4, 0x00000000}, - {0x7AA8, 0x00000000}, - {0x7AAC, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x7AB0, 0x00050005}, - {0x7AB4, 0x00050005}, - {0x7AB8, 0x00050005}, - {0x7ABC, 0x00050005}, - {0x7AC0, 0x00000005}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7AB0, 0x00000000}, -+ {0x7AB4, 0x00000000}, -+ {0x7AB8, 0x00000000}, -+ {0x7ABC, 0x00000000}, -+ {0x7AC0, 0x00000000}, -+ {0x903400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7AB0, 0x00000000}, -+ {0x7AB4, 0x00000000}, -+ {0x7AB8, 0x00000000}, -+ {0x7ABC, 0x00000000}, -+ {0x7AC0, 0x00000000}, -+ {0x903500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7AB0, 0x00000000}, -+ {0x7AB4, 0x00000000}, -+ {0x7AB8, 0x00000000}, -+ {0x7ABC, 0x00000000}, -+ {0x7AC0, 0x00000000}, -+ {0x903600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x7AB0, 0x00000000}, -+ {0x7AB4, 0x00000000}, -+ {0x7AB8, 0x00000000}, -+ {0x7ABC, 0x00000000}, -+ {0x7AC0, 0x00000000}, -+ {0xA0000000, 0x00000000}, -+ {0x7AB0, 0x00050005}, -+ {0x7AB4, 0x00050005}, -+ {0x7AB8, 0x00050005}, -+ {0x7ABC, 0x00050005}, -+ {0x7AC0, 0x00000005}, -+ {0xB0000000, 0x00000000}, - {0x0F0, 0x00010000}, -- {0x0F4, 0x00000018}, -- {0x0F8, 0x20220120}, -+ {0x0F4, 0x00000028}, -+ {0x0F8, 0x20220610}, - }; - - static const struct rtw89_reg2_def rtw89_8852c_phy_bb_reg_gain[] = { - {0xF0FF0000, 0x00000000}, - {0xF03300FF, 0x00000001}, -- {0x000, 0x01E3C39F}, -- {0x001, 0x00694727}, -- {0x002, 0x00005536}, -- {0x100, 0x02E3C39F}, -- {0x101, 0x0069472A}, -+ {0x000, 0x0EEECAA6}, -+ {0x001, 0x006C4B2C}, -+ {0x002, 0x00005636}, -+ {0x100, 0x0DEFCAA9}, -+ {0x101, 0x00694B2C}, - {0x102, 0x00005536}, - {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x10000, 0x1A02E1C9}, - {0x10001, 0x00644A30}, - {0x10002, 0x00006750}, - {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x10000, 0x0EF4D1B9}, -- {0x10001, 0x00584125}, -- {0x10002, 0x00006750}, -+ {0x10000, 0x0BF1CEB6}, -+ {0x10001, 0x00434328}, -+ {0x10002, 0x00005050}, - {0xA0000000, 0x00000000}, -- {0x10000, 0x1A02E1C9}, -- {0x10001, 0x00644A30}, -- {0x10002, 0x00006750}, -+ {0x10000, 0x1D08E8D0}, -+ {0x10001, 0x00644C32}, -+ {0x10002, 0x00006650}, - {0xB0000000, 0x00000000}, - {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x10100, 0x1901E1C8}, - {0x10101, 0x0061482D}, - {0x10102, 0x00006750}, - {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x10100, 0x04E8C5AD}, -- {0x10101, 0x00594125}, -- {0x10102, 0x00006850}, -+ {0x10100, 0x0BF0CEB8}, -+ {0x10101, 0x00424227}, -+ {0x10102, 0x00005050}, - {0xA0000000, 0x00000000}, -- {0x10100, 0x1901E1C8}, -- {0x10101, 0x0061482D}, -- {0x10102, 0x00006750}, -+ {0x10100, 0x1F0AECD5}, -+ {0x10101, 0x00634B31}, -+ {0x10102, 0x00006550}, - {0xB0000000, 0x00000000}, - {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x20000, 0x1601E2CA}, - {0x20001, 0x005D452A}, - {0x20002, 0x00006750}, - {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x20000, 0x0EF4D3BB}, -- {0x20001, 0x00563F25}, -- {0x20002, 0x00006850}, -+ {0x20000, 0x0EF5D3BB}, -+ {0x20001, 0x00454529}, -+ {0x20002, 0x00005050}, - {0xA0000000, 0x00000000}, -- {0x20000, 0x1601E2CA}, -- {0x20001, 0x005D452A}, -- {0x20002, 0x00006750}, -+ {0x20000, 0x1904E6CE}, -+ {0x20001, 0x0060482D}, -+ {0x20002, 0x00006650}, - {0xB0000000, 0x00000000}, - {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x20100, 0x1901E1C8}, - {0x20101, 0x0061482D}, - {0x20102, 0x00006750}, - {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x20100, 0x0BF1CFB7}, -- {0x20101, 0x00574025}, -- {0x20102, 0x00006750}, -+ {0x20100, 0x12F8D7C1}, -+ {0x20101, 0x004A4A2E}, -+ {0x20102, 0x00005050}, - {0xA0000000, 0x00000000}, -- {0x20100, 0x1901E1C8}, -+ {0x20100, 0x1F0AECD5}, - {0x20101, 0x0061482D}, -- {0x20102, 0x00006750}, -+ {0x20102, 0x00006550}, - {0xB0000000, 0x00000000}, - {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x30000, 0x1700E1CA}, - {0x30001, 0x005E472B}, - {0x30002, 0x00006750}, - {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x30000, 0x05EFCEB7}, -- {0x30001, 0x004B351A}, -- {0x30002, 0x00006850}, -+ {0x30000, 0x0DF6D5BE}, -+ {0x30001, 0x00414126}, -+ {0x30002, 0x00005050}, - {0xA0000000, 0x00000000}, -- {0x30000, 0x1700E1CA}, -- {0x30001, 0x005E472B}, -- {0x30002, 0x00006750}, -+ {0x30000, 0x14FEE0CA}, -+ {0x30001, 0x005C4328}, -+ {0x30002, 0x00006650}, - {0xB0000000, 0x00000000}, - {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x30100, 0x14FEE0C9}, - {0x30101, 0x00594428}, - {0x30102, 0x00006650}, - {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -- {0x30100, 0x0CF2D1B9}, -- {0x30101, 0x00563F24}, -- {0x30102, 0x00006750}, -+ {0x30100, 0x0EF5D5C0}, -+ {0x30101, 0x0045452A}, -+ {0x30102, 0x00005050}, - {0xA0000000, 0x00000000}, -- {0x30100, 0x14FEE0C9}, -- {0x30101, 0x00594428}, -+ {0x30100, 0x1F0AECD8}, -+ {0x30101, 0x00654C31}, - {0x30102, 0x00006650}, - {0xB0000000, 0x00000000}, -- {0x40000, 0x13FCDDC8}, -- {0x40001, 0x005D4328}, -- {0x40002, 0x00006850}, -- {0x40100, 0x14FEE3CF}, -- {0x40101, 0x00583E24}, -- {0x40102, 0x00006850}, -- {0x50000, 0x0DF4D6C6}, -- {0x50001, 0x00604227}, -- {0x50002, 0x00006850}, -- {0x50100, 0x1903E7D5}, -- {0x50101, 0x0061462B}, -- {0x50102, 0x00006850}, -- {0x60000, 0x0FF5D7C6}, -- {0x60001, 0x005D4429}, -- {0x60002, 0x00006850}, -- {0x60100, 0x12FADECF}, -- {0x60101, 0x005B4126}, -- {0x60102, 0x00006850}, -- {0x70000, 0x09F1D2C3}, -- {0x70001, 0x00554026}, -- {0x70002, 0x00006750}, -- {0x70100, 0x0CF5DACC}, -- {0x70101, 0x00563E25}, -- {0x70102, 0x00006750}, -+ {0x40000, 0x15FEE0CB}, -+ {0x40001, 0x0060462B}, -+ {0x40002, 0x00006450}, -+ {0x40100, 0x1902E5D2}, -+ {0x40101, 0x0063482E}, -+ {0x40102, 0x00006450}, -+ {0x50000, 0x1C04E6D3}, -+ {0x50001, 0x006B5034}, -+ {0x50002, 0x00006450}, -+ {0x50100, 0x2009EDDB}, -+ {0x50101, 0x006B5035}, -+ {0x50102, 0x00006450}, -+ {0x60000, 0x16FEE1CF}, -+ {0x60001, 0x00634A2E}, -+ {0x60002, 0x00006550}, -+ {0x60100, 0x14FDE2D2}, -+ {0x60101, 0x005E4429}, -+ {0x60102, 0x00006450}, -+ {0x70000, 0x0BF3D6C6}, -+ {0x70001, 0x00573F24}, -+ {0x70002, 0x00006550}, -+ {0x70100, 0x08F0D6C7}, -+ {0x70101, 0x0052391E}, -+ {0x70102, 0x00006450}, - {0x2000000, 0x02E4C4A0}, - {0x2000001, 0x006A4828}, - {0x2000100, 0x02E4C5A1}, - {0x2000101, 0x00664629}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x2010000, 0x05EBC8AF}, - {0x2010001, 0x00543D24}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x2010000, 0x08EDCAB2}, -+ {0x2010001, 0x00434327}, -+ {0xA0000000, 0x00000000}, -+ {0x2010000, 0x05EBC8AF}, -+ {0x2010001, 0x00543D24}, -+ {0xB0000000, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x2010100, 0x07ECC9B0}, - {0x2010101, 0x005B4126}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x2010100, 0x08ECCBB2}, -+ {0x2010101, 0x003C3C20}, -+ {0xA0000000, 0x00000000}, -+ {0x2010100, 0x07ECC9B0}, -+ {0x2010101, 0x005B4126}, -+ {0xB0000000, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x2020000, 0x05EDCCB2}, - {0x2020001, 0x004D361C}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x2020000, 0x0CF4D2BA}, -+ {0x2020001, 0x00404025}, -+ {0xA0000000, 0x00000000}, -+ {0x2020000, 0x05EDCCB2}, -+ {0x2020001, 0x004D361C}, -+ {0xB0000000, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x2020100, 0x06ECCBB2}, - {0x2020101, 0x00553D22}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x2020100, 0x09EECDB8}, -+ {0x2020101, 0x00444428}, -+ {0xA0000000, 0x00000000}, -+ {0x2020100, 0x06ECCBB2}, -+ {0x2020101, 0x00553D22}, -+ {0xB0000000, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x2030000, 0x02ECCCB3}, - {0x2030001, 0x00483118}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x2030000, 0x0DF8D6BF}, -+ {0x2030001, 0x003F3F24}, -+ {0xA0000000, 0x00000000}, -+ {0x2030000, 0x02ECCCB3}, -+ {0x2030001, 0x00483118}, -+ {0xB0000000, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x2030100, 0x04ECCCB2}, - {0x2030101, 0x004F381C}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x2030100, 0x08EFCDBA}, -+ {0x2030101, 0x00414126}, -+ {0xA0000000, 0x00000000}, -+ {0x2030100, 0x04ECCCB2}, -+ {0x2030101, 0x004F381C}, -+ {0xB0000000, 0x00000000}, - {0x3000000, 0x00000000}, - {0x3000001, 0x00000000}, - {0x3000002, 0x00000000}, -@@ -1709,30 +2103,102 @@ static const struct rtw89_reg2_def rtw89 - {0x3000101, 0x00000000}, - {0x3000102, 0x00000000}, - {0x3000103, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x3010000, 0x0E0CFB0A}, -+ {0x3010001, 0x00100F06}, -+ {0x3010002, 0x34333333}, -+ {0x3010003, 0x3434343C}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x3010000, 0x0E0CFB0A}, -+ {0x3010001, 0x00100F06}, -+ {0x3010002, 0x34333327}, -+ {0x3010003, 0x3434343C}, -+ {0xA0000000, 0x00000000}, - {0x3010000, 0x0E0CFB0A}, - {0x3010001, 0x00100F06}, - {0x3010002, 0x34333333}, - {0x3010003, 0x3434343C}, -+ {0xB0000000, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x3010100, 0x0E0CFB0A}, - {0x3010101, 0x00100F06}, - {0x3010102, 0x34333333}, - {0x3010103, 0x3434343C}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x3010100, 0x0E0CFB0A}, -+ {0x3010101, 0x00100F06}, -+ {0x3010102, 0x34333327}, -+ {0x3010103, 0x3434343C}, -+ {0xA0000000, 0x00000000}, -+ {0x3010100, 0x0E0CFB0A}, -+ {0x3010101, 0x00100F06}, -+ {0x3010102, 0x34333333}, -+ {0x3010103, 0x3434343C}, -+ {0xB0000000, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x3020000, 0x0E0CFB0A}, - {0x3020001, 0x00100F06}, - {0x3020002, 0x34333333}, - {0x3020003, 0x3434343C}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x3020000, 0x0E0CFB0A}, -+ {0x3020001, 0x00100F06}, -+ {0x3020002, 0x34333327}, -+ {0x3020003, 0x3434343C}, -+ {0xA0000000, 0x00000000}, -+ {0x3020000, 0x0E0CFB0A}, -+ {0x3020001, 0x00100F06}, -+ {0x3020002, 0x34333333}, -+ {0x3020003, 0x3434343C}, -+ {0xB0000000, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x3020100, 0x0E0CFB0A}, - {0x3020101, 0x00100F06}, - {0x3020102, 0x34333333}, - {0x3020103, 0x3434343C}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x3020100, 0x0E0CFB0A}, -+ {0x3020101, 0x00100F06}, -+ {0x3020102, 0x34333327}, -+ {0x3020103, 0x3434343C}, -+ {0xA0000000, 0x00000000}, -+ {0x3020100, 0x0E0CFB0A}, -+ {0x3020101, 0x00100F06}, -+ {0x3020102, 0x34333333}, -+ {0x3020103, 0x3434343C}, -+ {0xB0000000, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x3030000, 0x0E0CFB0A}, - {0x3030001, 0x00100F06}, - {0x3030002, 0x34333333}, - {0x3030003, 0x3434343C}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x3030000, 0x0E0CFB0A}, -+ {0x3030001, 0x00100F06}, -+ {0x3030002, 0x34333327}, -+ {0x3030003, 0x3434343C}, -+ {0xA0000000, 0x00000000}, -+ {0x3030000, 0x0E0CFB0A}, -+ {0x3030001, 0x00100F06}, -+ {0x3030002, 0x34333333}, -+ {0x3030003, 0x3434343C}, -+ {0xB0000000, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, - {0x3030100, 0x0E0CFB0A}, - {0x3030101, 0x00100F06}, - {0x3030102, 0x34333333}, - {0x3030103, 0x3434343C}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x3030100, 0x0E0CFB0A}, -+ {0x3030101, 0x00100F06}, -+ {0x3030102, 0x34333327}, -+ {0x3030103, 0x3434343C}, -+ {0xA0000000, 0x00000000}, -+ {0x3030100, 0x0E0CFB0A}, -+ {0x3030101, 0x00100F06}, -+ {0x3030102, 0x34333333}, -+ {0x3030103, 0x3434343C}, -+ {0xB0000000, 0x00000000}, - {0x3040000, 0x0E0CFB0A}, - {0x3040001, 0x00100F06}, - {0x3040002, 0x343B3333}, -@@ -1765,6 +2231,310 @@ static const struct rtw89_reg2_def rtw89 - {0x3070101, 0x00100F06}, - {0x3070102, 0x3C3B3333}, - {0x3070103, 0x34343C3C}, -+ {0x4000000, 0x00000000}, -+ {0x4000001, 0x76543210}, -+ {0x4000002, 0x77777777}, -+ {0x4000003, 0x35374425}, -+ {0x4000004, 0x00000043}, -+ {0x4000005, 0x000038E8}, -+ {0x4000100, 0x00000000}, -+ {0x4000101, 0x76543210}, -+ {0x4000102, 0x77777777}, -+ {0x4000103, 0x35374425}, -+ {0x4000104, 0x00000043}, -+ {0x4000105, 0x000038E8}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4010000, 0x00000000}, -+ {0x4010001, 0x76543210}, -+ {0x4010002, 0x77777777}, -+ {0x4010003, 0x35374425}, -+ {0x4010004, 0x00000042}, -+ {0x4010005, 0x000038E8}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4010000, 0x0000FC50}, -+ {0x4010001, 0x51403210}, -+ {0x4010002, 0x76543276}, -+ {0x4010003, 0x3A4DAA3C}, -+ {0x4010004, 0x00000093}, -+ {0x4010005, 0x000040E4}, -+ {0xA0000000, 0x00000000}, -+ {0x4010000, 0x00000000}, -+ {0x4010001, 0x76543210}, -+ {0x4010002, 0x77777777}, -+ {0x4010003, 0x35374425}, -+ {0x4010004, 0x00000042}, -+ {0x4010005, 0x000038E8}, -+ {0xB0000000, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4010100, 0x00000000}, -+ {0x4010101, 0x76543210}, -+ {0x4010102, 0x77777777}, -+ {0x4010103, 0x35374425}, -+ {0x4010104, 0x00000042}, -+ {0x4010105, 0x000038E8}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4010100, 0x0000FC50}, -+ {0x4010101, 0x51403210}, -+ {0x4010102, 0x76543276}, -+ {0x4010103, 0x3A4DAA3C}, -+ {0x4010104, 0x00000093}, -+ {0x4010105, 0x000040E4}, -+ {0xA0000000, 0x00000000}, -+ {0x4010100, 0x00000000}, -+ {0x4010101, 0x76543210}, -+ {0x4010102, 0x77777777}, -+ {0x4010103, 0x35374425}, -+ {0x4010104, 0x00000042}, -+ {0x4010105, 0x000038E8}, -+ {0xB0000000, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4020000, 0x00000000}, -+ {0x4020001, 0x76543210}, -+ {0x4020002, 0x77777777}, -+ {0x4020003, 0x35374425}, -+ {0x4020004, 0x00000042}, -+ {0x4020005, 0x000038E8}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4020000, 0x0000FC50}, -+ {0x4020001, 0x51403210}, -+ {0x4020002, 0x76543276}, -+ {0x4020003, 0x4B4DAA3C}, -+ {0x4020004, 0x000000A3}, -+ {0x4020005, 0x000040E4}, -+ {0xA0000000, 0x00000000}, -+ {0x4020000, 0x00000000}, -+ {0x4020001, 0x76543210}, -+ {0x4020002, 0x77777777}, -+ {0x4020003, 0x35374425}, -+ {0x4020004, 0x00000042}, -+ {0x4020005, 0x000038E8}, -+ {0xB0000000, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4020100, 0x00000000}, -+ {0x4020101, 0x76543210}, -+ {0x4020102, 0x77777777}, -+ {0x4020103, 0x35374425}, -+ {0x4020104, 0x00000042}, -+ {0x4020105, 0x000038E8}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4020100, 0x0000FC50}, -+ {0x4020101, 0x51403210}, -+ {0x4020102, 0x76543276}, -+ {0x4020103, 0x3A4DAA3C}, -+ {0x4020104, 0x00000093}, -+ {0x4020105, 0x000040E4}, -+ {0xA0000000, 0x00000000}, -+ {0x4020100, 0x00000000}, -+ {0x4020101, 0x76543210}, -+ {0x4020102, 0x77777777}, -+ {0x4020103, 0x35374425}, -+ {0x4020104, 0x00000042}, -+ {0x4020105, 0x000038E8}, -+ {0xB0000000, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4030000, 0x00000000}, -+ {0x4030001, 0x76543210}, -+ {0x4030002, 0x77777777}, -+ {0x4030003, 0x35374425}, -+ {0x4030004, 0x00000042}, -+ {0x4030005, 0x000038E8}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4030000, 0x0000FC50}, -+ {0x4030001, 0x51403210}, -+ {0x4030002, 0x76543276}, -+ {0x4030003, 0x3A4DAA3C}, -+ {0x4030004, 0x00000093}, -+ {0x4030005, 0x000040E4}, -+ {0xA0000000, 0x00000000}, -+ {0x4030000, 0x00000000}, -+ {0x4030001, 0x76543210}, -+ {0x4030002, 0x77777777}, -+ {0x4030003, 0x35374425}, -+ {0x4030004, 0x00000042}, -+ {0x4030005, 0x000038E8}, -+ {0xB0000000, 0x00000000}, -+ {0x80ff0000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4030100, 0x00000000}, -+ {0x4030101, 0x76543210}, -+ {0x4030102, 0x77777777}, -+ {0x4030103, 0x35374425}, -+ {0x4030104, 0x00000042}, -+ {0x4030105, 0x000038E8}, -+ {0x903300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x4030100, 0x0000FC50}, -+ {0x4030101, 0x51403210}, -+ {0x4030102, 0x76543276}, -+ {0x4030103, 0x3A4DAA3C}, -+ {0x4030104, 0x00000093}, -+ {0x4030105, 0x000040E4}, -+ {0xA0000000, 0x00000000}, -+ {0x4030100, 0x00000000}, -+ {0x4030101, 0x76543210}, -+ {0x4030102, 0x77777777}, -+ {0x4030103, 0x35374425}, -+ {0x4030104, 0x00000042}, -+ {0x4030105, 0x000038E8}, -+ {0xB0000000, 0x00000000}, -+ {0x1000000, 0x00000008}, -+ {0x1000010, 0x00000008}, -+ {0x1000011, 0x00000000}, -+ {0x1000100, 0x00000004}, -+ {0x1000110, 0x00000004}, -+ {0x1000111, 0x00000000}, -+ {0x1010000, 0x00000004}, -+ {0x1010010, 0x00000004}, -+ {0x1010011, 0x00000000}, -+ {0x1010020, 0x00000004}, -+ {0x1010021, 0x00000000}, -+ {0x1010029, 0x00000000}, -+ {0x1010030, 0x00000000}, -+ {0x1010031, 0x00000000}, -+ {0x1010035, 0x00000000}, -+ {0x1010039, 0x00000000}, -+ {0x101003D, 0x00000000}, -+ {0x1010100, 0x00000010}, -+ {0x1010110, 0x00000010}, -+ {0x1010111, 0x00000000}, -+ {0x1010120, 0x00000010}, -+ {0x1010121, 0x00000000}, -+ {0x1010129, 0x00000000}, -+ {0x1010030, 0x00000000}, -+ {0x1010031, 0x00000000}, -+ {0x1010035, 0x00000000}, -+ {0x1010039, 0x00000000}, -+ {0x101003D, 0x00000000}, -+ {0x1020000, 0x000000FA}, -+ {0x1020010, 0x000000FA}, -+ {0x1020011, 0x00000000}, -+ {0x1020020, 0x000000FA}, -+ {0x1020021, 0x00000000}, -+ {0x1020029, 0x00000000}, -+ {0x1020030, 0x00000000}, -+ {0x1020031, 0x00000000}, -+ {0x1020035, 0x00000000}, -+ {0x1020039, 0x00000000}, -+ {0x102003D, 0x00000000}, -+ {0x1020100, 0x0000000D}, -+ {0x1020110, 0x0000000D}, -+ {0x1020111, 0x00000000}, -+ {0x1020120, 0x0000000D}, -+ {0x1020121, 0x00000000}, -+ {0x1020129, 0x00000000}, -+ {0x1020030, 0x00000000}, -+ {0x1020031, 0x00000000}, -+ {0x1020035, 0x00000000}, -+ {0x1020039, 0x00000000}, -+ {0x102003D, 0x00000000}, -+ {0x1030000, 0x000000E4}, -+ {0x1030010, 0x000000E4}, -+ {0x1030011, 0x00000000}, -+ {0x1030020, 0x0000E8E8}, -+ {0x1030021, 0x00000000}, -+ {0x1030029, 0x00000000}, -+ {0x1030030, 0x00000000}, -+ {0x1030031, 0x00000000}, -+ {0x1030035, 0x00000000}, -+ {0x1030039, 0x00000000}, -+ {0x103003D, 0x00000000}, -+ {0x1030100, 0x00000018}, -+ {0x1030110, 0x00000018}, -+ {0x1030111, 0x00000000}, -+ {0x1030120, 0x00000018}, -+ {0x1030121, 0x00000000}, -+ {0x1030129, 0x00000000}, -+ {0x1030030, 0x00000000}, -+ {0x1030031, 0x00000000}, -+ {0x1030035, 0x00000000}, -+ {0x1030039, 0x00000000}, -+ {0x103003D, 0x00000000}, -+ {0x1040000, 0x000000EE}, -+ {0x1040010, 0x000000EE}, -+ {0x1040011, 0x00000000}, -+ {0x1040020, 0x000000EE}, -+ {0x1040021, 0x00000000}, -+ {0x1040029, 0x00000000}, -+ {0x1040030, 0x000000EE}, -+ {0x1040031, 0x00000000}, -+ {0x1040035, 0x00000000}, -+ {0x1040039, 0x00000000}, -+ {0x104003D, 0x00000000}, -+ {0x1040100, 0x00000000}, -+ {0x1040110, 0x00000005}, -+ {0x1040111, 0x00000000}, -+ {0x1040120, 0x00000008}, -+ {0x1040121, 0x00000000}, -+ {0x1040129, 0x00000000}, -+ {0x1040030, 0x00000008}, -+ {0x1040031, 0x00000000}, -+ {0x1040035, 0x00000000}, -+ {0x1040039, 0x00000000}, -+ {0x104003D, 0x00000000}, -+ {0x1050000, 0x00000008}, -+ {0x1050010, 0x0000000B}, -+ {0x1050011, 0x00000000}, -+ {0x1050020, 0x00000015}, -+ {0x1050021, 0x00000000}, -+ {0x1050029, 0x00000000}, -+ {0x1050030, 0x00000010}, -+ {0x1050031, 0x00000000}, -+ {0x1050035, 0x00000000}, -+ {0x1050039, 0x00000000}, -+ {0x105003D, 0x00000000}, -+ {0x1050100, 0x00000016}, -+ {0x1050110, 0x00000016}, -+ {0x1050111, 0x0000F8F8}, -+ {0x1050120, 0x0000001A}, -+ {0x1050121, 0x00000000}, -+ {0x1050129, 0x00000000}, -+ {0x1050030, 0x0000001A}, -+ {0x1050031, 0x00000000}, -+ {0x1050035, 0x00000000}, -+ {0x1050039, 0x00000000}, -+ {0x105003D, 0x00000000}, -+ {0x1060000, 0x000000F8}, -+ {0x1060010, 0x000000F8}, -+ {0x1060011, 0x00000000}, -+ {0x1060020, 0x00000000}, -+ {0x1060021, 0x00000000}, -+ {0x1060029, 0x00000000}, -+ {0x1060030, 0x00000000}, -+ {0x1060031, 0x00000000}, -+ {0x1060035, 0x00000000}, -+ {0x1060039, 0x00000000}, -+ {0x106003D, 0x00000000}, -+ {0x1060100, 0x000000F6}, -+ {0x1060110, 0x000000F6}, -+ {0x1060111, 0x00000000}, -+ {0x1060120, 0x000000F6}, -+ {0x1060121, 0x00000000}, -+ {0x1060129, 0x00000000}, -+ {0x1060030, 0x00000000}, -+ {0x1060031, 0x00000000}, -+ {0x1060035, 0x00000000}, -+ {0x1060039, 0x00000000}, -+ {0x106003D, 0x00000000}, -+ {0x1070000, 0x000000E8}, -+ {0x1070010, 0x000000E8}, -+ {0x1070011, 0x00000000}, -+ {0x1070020, 0x000000E8}, -+ {0x1070021, 0x00000000}, -+ {0x1070029, 0x00000000}, -+ {0x1070030, 0x000000F0}, -+ {0x1070031, 0x00000000}, -+ {0x1070035, 0x00000000}, -+ {0x1070039, 0x00000000}, -+ {0x107003D, 0x00000000}, -+ {0x1070100, 0x000000E4}, -+ {0x1070110, 0x000000E4}, -+ {0x1070111, 0x00000000}, -+ {0x1070120, 0x000000E4}, -+ {0x1070121, 0x00000000}, -+ {0x1070129, 0x00000000}, -+ {0x1070030, 0x000000F0}, -+ {0x1070031, 0x00000000}, -+ {0x1070035, 0x00000000}, -+ {0x1070039, 0x00000000}, -+ {0x107003D, 0x00000000}, - }; - - static const struct rtw89_reg2_def rtw89_8852c_phy_radioa_regs[] = { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-013-wifi-rtw89-phy-ignore-warning-of-bb-gain-cfg_type-4.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-013-wifi-rtw89-phy-ignore-warning-of-bb-gain-cfg_type-4.patch deleted file mode 100644 index 1b0fe1a22..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-013-wifi-rtw89-phy-ignore-warning-of-bb-gain-cfg_type-4.patch +++ /dev/null @@ -1,39 +0,0 @@ -From c6a9d360874a41dc972c44c0949916da55199f85 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 30 Sep 2022 21:36:59 +0800 -Subject: [PATCH 013/149] wifi: rtw89: phy: ignore warning of bb gain cfg_type - 4 - -The new BB parameters add new cfg_tpe 4 to improve performance of eFEM -modules (rfe_type >= 50), but we are using iFEM modules for now, so this -warning can be ignored. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20220930133659.7789-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/phy.c | 6 ++++++ - 1 file changed, 6 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -1036,6 +1036,7 @@ static void rtw89_phy_config_bb_gain(str - { - const struct rtw89_chip_info *chip = rtwdev->chip; - union rtw89_phy_bb_gain_arg arg = { .addr = reg->addr }; -+ struct rtw89_efuse *efuse = &rtwdev->efuse; - - if (arg.gain_band >= RTW89_BB_GAIN_BAND_NR) - return; -@@ -1061,6 +1062,11 @@ static void rtw89_phy_config_bb_gain(str - case 3: - rtw89_phy_cfg_bb_gain_op1db(rtwdev, arg, reg->data); - break; -+ case 4: -+ /* This cfg_type is only used by rfe_type >= 50 with eFEM */ -+ if (efuse->rfe_type < 50) -+ break; -+ fallthrough; - default: - rtw89_warn(rtwdev, - "bb gain {0x%x:0x%x} with unknown cfg type: %d\n", diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-014-wifi-rtw89-8852c-set-pin-MUX-to-enable-BT-firmware-l.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-014-wifi-rtw89-8852c-set-pin-MUX-to-enable-BT-firmware-l.patch deleted file mode 100644 index ef32f6280..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-014-wifi-rtw89-8852c-set-pin-MUX-to-enable-BT-firmware-l.patch +++ /dev/null @@ -1,42 +0,0 @@ -From d187691ab63f53f199a07904422e0911bc6f9390 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 30 Sep 2022 21:44:16 +0800 -Subject: [PATCH 014/149] wifi: rtw89: 8852c: set pin MUX to enable BT firmware - log - -8852CE is a combo chip, and WiFi driver controls pin MUX. To output BT -firmware log to specific hardware pin, set pin MUX to achieve. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20220930134417.10282-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 4 ++++ - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 3 +++ - 2 files changed, 7 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -229,6 +229,10 @@ - - #define R_AX_GPIO0_7_FUNC_SEL 0x02D0 - -+#define R_AX_LED1_FUNC_SEL 0x02DC -+#define B_AX_PINMUX_EESK_FUNC_SEL_V1_MASK GENMASK(27, 24) -+#define PINMUX_EESK_FUNC_SEL_BT_LOG 0x1 -+ - #define R_AX_GPIO0_15_EECS_EESK_LED1_PULL_LOW_EN 0x02E4 - #define B_AX_LED1_PULL_LOW_EN BIT(18) - #define B_AX_EESK_PULL_LOW_EN BIT(17) ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -273,6 +273,9 @@ static int rtw8852c_pwr_on_func(struct r - B_AX_CMAC_DMA_EN | B_AX_PTCLTOP_EN | B_AX_SCHEDULER_EN | - B_AX_TMAC_EN | B_AX_RMAC_EN); - -+ rtw89_write32_mask(rtwdev, R_AX_LED1_FUNC_SEL, B_AX_PINMUX_EESK_FUNC_SEL_V1_MASK, -+ PINMUX_EESK_FUNC_SEL_BT_LOG); -+ - return 0; - } - diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-015-wifi-rtw89-add-to-dump-TX-FIFO-0-1-for-8852C.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-015-wifi-rtw89-add-to-dump-TX-FIFO-0-1-for-8852C.patch deleted file mode 100644 index cd9c3f74d..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-015-wifi-rtw89-add-to-dump-TX-FIFO-0-1-for-8852C.patch +++ /dev/null @@ -1,88 +0,0 @@ -From 732dd91db3d3a1b7a767598549ffed358c9fbb89 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 30 Sep 2022 21:44:17 +0800 -Subject: [PATCH 015/149] wifi: rtw89: add to dump TX FIFO 0/1 for 8852C - -MAC maintains TX FIFO to transmit packets with meta data to BB layer. To -debug abnormal transmission, we need to dump the content to dig problem. -Since FIFO of 8852C locates on different address with different size and -need additional switch to enable read operation, this patch adds the -changes accordingly. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20220930134417.10282-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/debug.c | 21 +++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/mac.c | 2 ++ - drivers/net/wireless/realtek/rtw89/mac.h | 4 ++++ - 3 files changed, 27 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/debug.c -+++ b/drivers/net/wireless/realtek/rtw89/debug.c -@@ -781,13 +781,34 @@ rtw89_debug_priv_mac_mem_dump_get(struct - { - struct rtw89_debugfs_priv *debugfs_priv = m->private; - struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -+ bool grant_read = false; -+ -+ if (debugfs_priv->mac_mem.sel >= RTW89_MAC_MEM_NUM) -+ return -ENOENT; -+ -+ if (rtwdev->chip->chip_id == RTL8852C) { -+ switch (debugfs_priv->mac_mem.sel) { -+ case RTW89_MAC_MEM_TXD_FIFO_0_V1: -+ case RTW89_MAC_MEM_TXD_FIFO_1_V1: -+ case RTW89_MAC_MEM_TXDATA_FIFO_0: -+ case RTW89_MAC_MEM_TXDATA_FIFO_1: -+ grant_read = true; -+ break; -+ default: -+ break; -+ } -+ } - - mutex_lock(&rtwdev->mutex); - rtw89_leave_ps_mode(rtwdev); -+ if (grant_read) -+ rtw89_write32_set(rtwdev, R_AX_TCR1, B_AX_TCR_FORCE_READ_TXDFIFO); - rtw89_debug_dump_mac_mem(m, rtwdev, - debugfs_priv->mac_mem.sel, - debugfs_priv->mac_mem.start, - debugfs_priv->mac_mem.len); -+ if (grant_read) -+ rtw89_write32_clr(rtwdev, R_AX_TCR1, B_AX_TCR_FORCE_READ_TXDFIFO); - mutex_unlock(&rtwdev->mutex); - - return 0; ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -31,6 +31,8 @@ const u32 rtw89_mac_mem_base_addrs[RTW89 - [RTW89_MAC_MEM_TXDATA_FIFO_1] = TXDATA_FIFO_1_BASE_ADDR, - [RTW89_MAC_MEM_CPU_LOCAL] = CPU_LOCAL_BASE_ADDR, - [RTW89_MAC_MEM_BSSID_CAM] = BSSID_CAM_BASE_ADDR, -+ [RTW89_MAC_MEM_TXD_FIFO_0_V1] = TXD_FIFO_0_BASE_ADDR_V1, -+ [RTW89_MAC_MEM_TXD_FIFO_1_V1] = TXD_FIFO_1_BASE_ADDR_V1, - }; - - static void rtw89_mac_mem_write(struct rtw89_dev *rtwdev, u32 offset, ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -245,6 +245,8 @@ enum rtw89_mac_dbg_port_sel { - #define BCN_IE_CAM1_BASE_ADDR 0x188A0000 - #define TXD_FIFO_0_BASE_ADDR 0x18856200 - #define TXD_FIFO_1_BASE_ADDR 0x188A1080 -+#define TXD_FIFO_0_BASE_ADDR_V1 0x18856400 /* for 8852C */ -+#define TXD_FIFO_1_BASE_ADDR_V1 0x188A1080 /* for 8852C */ - #define TXDATA_FIFO_0_BASE_ADDR 0x18856000 - #define TXDATA_FIFO_1_BASE_ADDR 0x188A1000 - #define CPU_LOCAL_BASE_ADDR 0x18003000 -@@ -271,6 +273,8 @@ enum rtw89_mac_mem_sel { - RTW89_MAC_MEM_TXDATA_FIFO_1, - RTW89_MAC_MEM_CPU_LOCAL, - RTW89_MAC_MEM_BSSID_CAM, -+ RTW89_MAC_MEM_TXD_FIFO_0_V1, -+ RTW89_MAC_MEM_TXD_FIFO_1_V1, - - /* keep last */ - RTW89_MAC_MEM_NUM, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-016-wifi-mac80211-add-wake_tx_queue-callback-to-drivers.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-016-wifi-mac80211-add-wake_tx_queue-callback-to-drivers.patch deleted file mode 100644 index c821469c2..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-016-wifi-mac80211-add-wake_tx_queue-callback-to-drivers.patch +++ /dev/null @@ -1,29 +0,0 @@ -From a790cc3a4fad75048295571a350b95b87e022a5a Mon Sep 17 00:00:00 2001 -From: Alexander Wetzel -Date: Sun, 9 Oct 2022 18:30:39 +0200 -Subject: [PATCH 016/149] wifi: mac80211: add wake_tx_queue callback to drivers - -mac80211 is fully switching over to the internal TX queue (iTXQ) -implementation. Update all drivers not yet providing the now mandatory -wake_tx_queue() callback. - -As an side effect the netdev interfaces of all updated drivers will -switch to the noqueue qdisc. - -Signed-off-by: Alexander Wetzel -[add staging drivers] -Signed-off-by: Johannes Berg ---- - drivers/net/wireless/realtek/rtw89/mac80211.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/net/wireless/realtek/rtw89/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -918,6 +918,7 @@ static int rtw89_ops_set_tid_config(stru - - const struct ieee80211_ops rtw89_ops = { - .tx = rtw89_ops_tx, -+ .wake_tx_queue = ieee80211_handle_wake_tx_queue, - .wake_tx_queue = rtw89_ops_wake_tx_queue, - .start = rtw89_ops_start, - .stop = rtw89_ops_stop, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-017-wifi-realtek-remove-duplicated-wake_tx_queue.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-017-wifi-realtek-remove-duplicated-wake_tx_queue.patch deleted file mode 100644 index 2b159056a..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-017-wifi-realtek-remove-duplicated-wake_tx_queue.patch +++ /dev/null @@ -1,25 +0,0 @@ -From 53d0ce0c56d9330f137936b8850d4a5f2f70907d Mon Sep 17 00:00:00 2001 -From: Johannes Berg -Date: Mon, 10 Oct 2022 19:17:46 +0200 -Subject: [PATCH 017/149] wifi: realtek: remove duplicated wake_tx_queue - -By accident, the previous patch duplicated the initialization -of the wake_tx_queue callback. Fix that by removing the new -initializations. - -Fixes: a790cc3a4fad ("wifi: mac80211: add wake_tx_queue callback to drivers") -Signed-off-by: Johannes Berg ---- - drivers/net/wireless/realtek/rtw89/mac80211.c | 1 - - 1 file changed, 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -918,7 +918,6 @@ static int rtw89_ops_set_tid_config(stru - - const struct ieee80211_ops rtw89_ops = { - .tx = rtw89_ops_tx, -- .wake_tx_queue = ieee80211_handle_wake_tx_queue, - .wake_tx_queue = rtw89_ops_wake_tx_queue, - .start = rtw89_ops_start, - .stop = rtw89_ops_stop, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-018-wifi-rtw89-coex-move-chip_ops-btc_bt_aci_imp-to-a-ge.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-018-wifi-rtw89-coex-move-chip_ops-btc_bt_aci_imp-to-a-ge.patch deleted file mode 100644 index 2fa9b25e4..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-018-wifi-rtw89-coex-move-chip_ops-btc_bt_aci_imp-to-a-ge.patch +++ /dev/null @@ -1,114 +0,0 @@ -From 127da1aa61859c1eb27d7fc2d5b936e9e528815d Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Wed, 5 Oct 2022 16:32:07 +0800 -Subject: [PATCH 018/149] wifi: rtw89: coex: move chip_ops::btc_bt_aci_imp to a - generic code - -This chunk is to set fixed BT LNA2 at level5 when WiFi/BT shared BTG RFC -to improve BT anti-interference ability from adjacent channel. Since all -chips use the same setting, remove chip_ops::btc_bt_aci_imp. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221005083212.45683-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 9 +++++++-- - drivers/net/wireless/realtek/rtw89/core.h | 1 - - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 14 -------------- - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 14 -------------- - 4 files changed, 7 insertions(+), 31 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -1809,13 +1809,18 @@ static void _set_rf_trx_para(struct rtw8 - struct rtw89_btc_dm *dm = &btc->dm; - struct rtw89_btc_wl_info *wl = &btc->cx.wl; - struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ struct rtw89_btc_bt_link_info *b = &bt->link_info; - struct rtw89_btc_rf_trx_para para; - u32 wl_stb_chg = 0; - u8 level_id = 0; - - if (!dm->freerun) { -- dm->trx_para_level = 0; -- chip->ops->btc_bt_aci_imp(rtwdev); -+ /* fix LNA2 = level-5 for BT ACI issue at BTG */ -+ if ((btc->dm.wl_btg_rx && b->profile_cnt.now != 0) || -+ dm->bt_only == 1) -+ dm->trx_para_level = 1; -+ else -+ dm->trx_para_level = 0; - } - - level_id = (u8)dm->trx_para_level; ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2363,7 +2363,6 @@ struct rtw89_chip_ops { - void (*btc_set_wl_pri)(struct rtw89_dev *rtwdev, u8 map, bool state); - void (*btc_set_wl_txpwr_ctrl)(struct rtw89_dev *rtwdev, u32 txpwr_val); - s8 (*btc_get_bt_rssi)(struct rtw89_dev *rtwdev, s8 val); -- void (*btc_bt_aci_imp)(struct rtw89_dev *rtwdev); - void (*btc_update_bt_cnt)(struct rtw89_dev *rtwdev); - void (*btc_wl_s1_standby)(struct rtw89_dev *rtwdev, bool state); - void (*btc_set_policy)(struct rtw89_dev *rtwdev, u16 policy_type); ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -1871,19 +1871,6 @@ static struct rtw89_btc_fbtc_mreg rtw89_ - }; - - static --void rtw8852a_btc_bt_aci_imp(struct rtw89_dev *rtwdev) --{ -- struct rtw89_btc *btc = &rtwdev->btc; -- struct rtw89_btc_dm *dm = &btc->dm; -- struct rtw89_btc_bt_info *bt = &btc->cx.bt; -- struct rtw89_btc_bt_link_info *b = &bt->link_info; -- -- /* fix LNA2 = level-5 for BT ACI issue at BTG */ -- if (btc->dm.wl_btg_rx && b->profile_cnt.now != 0) -- dm->trx_para_level = 1; --} -- --static - void rtw8852a_btc_update_bt_cnt(struct rtw89_dev *rtwdev) - { - struct rtw89_btc *btc = &rtwdev->btc; -@@ -2041,7 +2028,6 @@ static const struct rtw89_chip_ops rtw88 - .btc_set_wl_pri = rtw8852a_btc_set_wl_pri, - .btc_set_wl_txpwr_ctrl = rtw8852a_btc_set_wl_txpwr_ctrl, - .btc_get_bt_rssi = rtw8852a_btc_get_bt_rssi, -- .btc_bt_aci_imp = rtw8852a_btc_bt_aci_imp, - .btc_update_bt_cnt = rtw8852a_btc_update_bt_cnt, - .btc_wl_s1_standby = rtw8852a_btc_wl_s1_standby, - .btc_set_wl_rx_gain = rtw8852a_btc_set_wl_rx_gain, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2685,19 +2685,6 @@ static const struct rtw89_btc_fbtc_mreg - }; - - static --void rtw8852c_btc_bt_aci_imp(struct rtw89_dev *rtwdev) --{ -- struct rtw89_btc *btc = &rtwdev->btc; -- struct rtw89_btc_dm *dm = &btc->dm; -- struct rtw89_btc_bt_info *bt = &btc->cx.bt; -- struct rtw89_btc_bt_link_info *b = &bt->link_info; -- -- /* fix LNA2 = level-5 for BT ACI issue at BTG */ -- if (btc->dm.wl_btg_rx && b->profile_cnt.now != 0) -- dm->trx_para_level = 1; --} -- --static - void rtw8852c_btc_update_bt_cnt(struct rtw89_dev *rtwdev) - { - /* Feature move to firmware */ -@@ -2893,7 +2880,6 @@ static const struct rtw89_chip_ops rtw88 - .btc_set_wl_pri = rtw8852c_btc_set_wl_pri, - .btc_set_wl_txpwr_ctrl = rtw8852c_btc_set_wl_txpwr_ctrl, - .btc_get_bt_rssi = rtw8852c_btc_get_bt_rssi, -- .btc_bt_aci_imp = rtw8852c_btc_bt_aci_imp, - .btc_update_bt_cnt = rtw8852c_btc_update_bt_cnt, - .btc_wl_s1_standby = rtw8852c_btc_wl_s1_standby, - .btc_set_wl_rx_gain = rtw8852c_btc_set_wl_rx_gain, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-019-wifi-rtw89-parse-PHY-status-only-when-PPDU-is-to_sel.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-019-wifi-rtw89-parse-PHY-status-only-when-PPDU-is-to_sel.patch deleted file mode 100644 index 5940e2a38..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-019-wifi-rtw89-parse-PHY-status-only-when-PPDU-is-to_sel.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 0935bb1527d711b1af8e89d4ba200c302fb5ab2b Mon Sep 17 00:00:00 2001 -From: Eric Huang -Date: Wed, 5 Oct 2022 16:32:08 +0800 -Subject: [PATCH 019/149] wifi: rtw89: parse PHY status only when PPDU is - to_self - -Without this fix, some non-self packets are used to count CFO (center -frequency offset), and average CFO has unstable variation. Then, it causes -unexpected performance. - -Signed-off-by: Eric Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221005083212.45683-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1255,6 +1255,9 @@ static int rtw89_core_rx_parse_phy_sts(s - if (phy_ppdu->ie < RTW89_CCK_PKT) - return -EINVAL; - -+ if (!phy_ppdu->to_self) -+ return 0; -+ - pos = (u8 *)phy_ppdu->buf + PHY_STS_HDR_LEN; - end = (u8 *)phy_ppdu->buf + phy_ppdu->len; - while (pos < end) { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-020-wifi-rtw89-8852b-set-proper-configuration-before-loa.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-020-wifi-rtw89-8852b-set-proper-configuration-before-loa.patch deleted file mode 100644 index 7744b9490..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-020-wifi-rtw89-8852b-set-proper-configuration-before-loa.patch +++ /dev/null @@ -1,59 +0,0 @@ -From d0c820cc5bcf768598ca3e9f6e29f3e4e5589827 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 5 Oct 2022 16:32:09 +0800 -Subject: [PATCH 020/149] wifi: rtw89: 8852b: set proper configuration before - loading NCTL - -Before loading RF NCTL table, we need to configure IQK/DPK clock and reset -them, and then polling NCTL state ready. Since 8852BE needs additional -one setting, add it by this patch. Also, give them proper names. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221005083212.45683-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/phy.c | 12 +++++++----- - drivers/net/wireless/realtek/rtw89/reg.h | 2 ++ - 2 files changed, 9 insertions(+), 5 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -1368,13 +1368,15 @@ static void rtw89_phy_init_rf_nctl(struc - int ret; - - /* IQK/DPK clock & reset */ -- rtw89_phy_write32_set(rtwdev, 0x0c60, 0x3); -- rtw89_phy_write32_set(rtwdev, 0x0c6c, 0x1); -- rtw89_phy_write32_set(rtwdev, 0x58ac, 0x8000000); -- rtw89_phy_write32_set(rtwdev, 0x78ac, 0x8000000); -+ rtw89_phy_write32_set(rtwdev, R_IOQ_IQK_DPK, 0x3); -+ rtw89_phy_write32_set(rtwdev, R_GNT_BT_WGT_EN, 0x1); -+ rtw89_phy_write32_set(rtwdev, R_P0_PATH_RST, 0x8000000); -+ rtw89_phy_write32_set(rtwdev, R_P1_PATH_RST, 0x8000000); -+ if (chip->chip_id == RTL8852B) -+ rtw89_phy_write32_set(rtwdev, R_IOQ_IQK_DPK, 0x2); - - /* check 0x8080 */ -- rtw89_phy_write32(rtwdev, 0x8000, 0x8); -+ rtw89_phy_write32(rtwdev, R_NCTL_CFG, 0x8); - - ret = read_poll_timeout(rtw89_phy_nctl_poll, val, val == 0x4, 10, - 1000, false, rtwdev); ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -4041,6 +4041,7 @@ - #define B_P0_RFM_TX_OPT BIT(6) - #define B_P0_RFM_BT_EN BIT(5) - #define B_P0_RFM_OUT GENMASK(4, 0) -+#define R_P0_PATH_RST 0x58AC - #define R_P0_TXDPD 0x58D4 - #define B_P0_TXDPD GENMASK(31, 28) - #define R_P0_TXPW_RSTB 0x58DC -@@ -4085,6 +4086,7 @@ - #define R_P1_RFCTM 0x7864 - #define R_P1_RFCTM_RDY BIT(26) - #define B_P1_RFCTM_VAL GENMASK(25, 20) -+#define R_P1_PATH_RST 0x78AC - #define R_P1_TXPW_RSTB 0x78DC - #define B_P1_TXPW_RSTB_MANON BIT(30) - #define B_P1_TXPW_RSTB_TSSI BIT(31) diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-021-wifi-rtw89-8852b-add-HFC-quota-arrays.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-021-wifi-rtw89-8852b-add-HFC-quota-arrays.patch deleted file mode 100644 index a5a9c8f83..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-021-wifi-rtw89-8852b-add-HFC-quota-arrays.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 3e870b4817333a1a4b01805073da3e00449acf43 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 5 Oct 2022 16:32:10 +0800 -Subject: [PATCH 021/149] wifi: rtw89: 8852b: add HFC quota arrays - -HFC is short for HCI flow control. These arrays are used to set quota -according to operating modes, which are SCC or download firmware. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221005083212.45683-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 32 +++++++++++++++++++ - 1 file changed, 32 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -11,6 +11,37 @@ - #include "rtw8852b_table.h" - #include "txrx.h" - -+static const struct rtw89_hfc_ch_cfg rtw8852b_hfc_chcfg_pcie[] = { -+ {5, 343, grp_0}, /* ACH 0 */ -+ {5, 343, grp_0}, /* ACH 1 */ -+ {5, 343, grp_0}, /* ACH 2 */ -+ {5, 343, grp_0}, /* ACH 3 */ -+ {0, 0, grp_0}, /* ACH 4 */ -+ {0, 0, grp_0}, /* ACH 5 */ -+ {0, 0, grp_0}, /* ACH 6 */ -+ {0, 0, grp_0}, /* ACH 7 */ -+ {4, 344, grp_0}, /* B0MGQ */ -+ {4, 344, grp_0}, /* B0HIQ */ -+ {0, 0, grp_0}, /* B1MGQ */ -+ {0, 0, grp_0}, /* B1HIQ */ -+ {40, 0, 0} /* FWCMDQ */ -+}; -+ -+static const struct rtw89_hfc_pub_cfg rtw8852b_hfc_pubcfg_pcie = { -+ 448, /* Group 0 */ -+ 0, /* Group 1 */ -+ 448, /* Public Max */ -+ 0 /* WP threshold */ -+}; -+ -+static const struct rtw89_hfc_param_ini rtw8852b_hfc_param_ini_pcie[] = { -+ [RTW89_QTA_SCC] = {rtw8852b_hfc_chcfg_pcie, &rtw8852b_hfc_pubcfg_pcie, -+ &rtw89_mac_size.hfc_preccfg_pcie, RTW89_HCIFC_POH}, -+ [RTW89_QTA_DLFW] = {NULL, NULL, &rtw89_mac_size.hfc_preccfg_pcie, -+ RTW89_HCIFC_POH}, -+ [RTW89_QTA_INVALID] = {NULL}, -+}; -+ - static const struct rtw89_dle_mem rtw8852b_dle_mem_pcie[] = { - [RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size6, - &rtw89_mac_size.ple_size6, &rtw89_mac_size.wde_qt6, -@@ -561,6 +592,7 @@ const struct rtw89_chip_info rtw8852b_ch - .ops = &rtw8852b_chip_ops, - .fifo_size = 196608, - .dle_scc_rsvd_size = 98304, -+ .hfc_param_ini = rtw8852b_hfc_param_ini_pcie, - .dle_mem = rtw8852b_dle_mem_pcie, - .sec_ctrl_efuse_size = 4, - .physical_efuse_size = 1216, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-022-wifi-rtw89-make-generic-functions-to-convert-subband.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-022-wifi-rtw89-make-generic-functions-to-convert-subband.patch deleted file mode 100644 index 74f0ba0ef..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-022-wifi-rtw89-make-generic-functions-to-convert-subband.patch +++ /dev/null @@ -1,138 +0,0 @@ -From 6e5125bcbaf810520969c121c7f12f20b8f3987d Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 5 Oct 2022 16:32:11 +0800 -Subject: [PATCH 022/149] wifi: rtw89: make generic functions to convert - subband gain index - -The gain tables use different domain index, so we need to convert the index -from subband of chandef. Since these conversion functions can share with -8852b, make generic functions for further use. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221005083212.45683-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/phy.h | 44 ++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 46 +------------------ - 2 files changed, 46 insertions(+), 44 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/phy.h -+++ b/drivers/net/wireless/realtek/rtw89/phy.h -@@ -374,6 +374,50 @@ static inline u32 rtw89_phy_read32_mask( - return rtw89_read32_mask(rtwdev, addr | RTW89_PHY_ADDR_OFFSET, mask); - } - -+static inline -+enum rtw89_gain_offset rtw89_subband_to_gain_offset_band_of_ofdm(enum rtw89_subband subband) -+{ -+ switch (subband) { -+ default: -+ case RTW89_CH_2G: -+ return RTW89_GAIN_OFFSET_2G_OFDM; -+ case RTW89_CH_5G_BAND_1: -+ return RTW89_GAIN_OFFSET_5G_LOW; -+ case RTW89_CH_5G_BAND_3: -+ return RTW89_GAIN_OFFSET_5G_MID; -+ case RTW89_CH_5G_BAND_4: -+ return RTW89_GAIN_OFFSET_5G_HIGH; -+ } -+} -+ -+static inline -+enum rtw89_phy_bb_gain_band rtw89_subband_to_bb_gain_band(enum rtw89_subband subband) -+{ -+ switch (subband) { -+ default: -+ case RTW89_CH_2G: -+ return RTW89_BB_GAIN_BAND_2G; -+ case RTW89_CH_5G_BAND_1: -+ return RTW89_BB_GAIN_BAND_5G_L; -+ case RTW89_CH_5G_BAND_3: -+ return RTW89_BB_GAIN_BAND_5G_M; -+ case RTW89_CH_5G_BAND_4: -+ return RTW89_BB_GAIN_BAND_5G_H; -+ case RTW89_CH_6G_BAND_IDX0: -+ case RTW89_CH_6G_BAND_IDX1: -+ return RTW89_BB_GAIN_BAND_6G_L; -+ case RTW89_CH_6G_BAND_IDX2: -+ case RTW89_CH_6G_BAND_IDX3: -+ return RTW89_BB_GAIN_BAND_6G_M; -+ case RTW89_CH_6G_BAND_IDX4: -+ case RTW89_CH_6G_BAND_IDX5: -+ return RTW89_BB_GAIN_BAND_6G_H; -+ case RTW89_CH_6G_BAND_IDX6: -+ case RTW89_CH_6G_BAND_IDX7: -+ return RTW89_BB_GAIN_BAND_6G_UH; -+ } -+} -+ - enum rtw89_rfk_flag { - RTW89_RFK_F_WRF = 0, - RTW89_RFK_F_WM = 1, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -788,40 +788,12 @@ static const struct rtw8852c_bb_gain_op1 - .mask_tia0_lna6 = 0xff000000, - }; - --static enum rtw89_phy_bb_gain_band --rtw8852c_mapping_gain_band(enum rtw89_subband subband) --{ -- switch (subband) { -- default: -- case RTW89_CH_2G: -- return RTW89_BB_GAIN_BAND_2G; -- case RTW89_CH_5G_BAND_1: -- return RTW89_BB_GAIN_BAND_5G_L; -- case RTW89_CH_5G_BAND_3: -- return RTW89_BB_GAIN_BAND_5G_M; -- case RTW89_CH_5G_BAND_4: -- return RTW89_BB_GAIN_BAND_5G_H; -- case RTW89_CH_6G_BAND_IDX0: -- case RTW89_CH_6G_BAND_IDX1: -- return RTW89_BB_GAIN_BAND_6G_L; -- case RTW89_CH_6G_BAND_IDX2: -- case RTW89_CH_6G_BAND_IDX3: -- return RTW89_BB_GAIN_BAND_6G_M; -- case RTW89_CH_6G_BAND_IDX4: -- case RTW89_CH_6G_BAND_IDX5: -- return RTW89_BB_GAIN_BAND_6G_H; -- case RTW89_CH_6G_BAND_IDX6: -- case RTW89_CH_6G_BAND_IDX7: -- return RTW89_BB_GAIN_BAND_6G_UH; -- } --} -- - static void rtw8852c_set_gain_error(struct rtw89_dev *rtwdev, - enum rtw89_subband subband, - enum rtw89_rf_path path) - { - const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; -- u8 gain_band = rtw8852c_mapping_gain_band(subband); -+ u8 gain_band = rtw89_subband_to_bb_gain_band(subband); - s32 val; - u32 reg; - u32 mask; -@@ -979,21 +951,7 @@ static void rtw8852c_set_gain_offset(str - rtw89_phy_write32_mask(rtwdev, R_RPL_OFST, B_RPL_OFST_MASK, tmp & 0x7f); - } - -- switch (chan->subband_type) { -- default: -- case RTW89_CH_2G: -- gain_band = RTW89_GAIN_OFFSET_2G_OFDM; -- break; -- case RTW89_CH_5G_BAND_1: -- gain_band = RTW89_GAIN_OFFSET_5G_LOW; -- break; -- case RTW89_CH_5G_BAND_3: -- gain_band = RTW89_GAIN_OFFSET_5G_MID; -- break; -- case RTW89_CH_5G_BAND_4: -- gain_band = RTW89_GAIN_OFFSET_5G_HIGH; -- break; -- } -+ gain_band = rtw89_subband_to_gain_offset_band_of_ofdm(chan->subband_type); - - offset_q0 = -efuse_gain->offset[path][gain_band]; - offset_base_q4 = efuse_gain->offset_base[phy_idx]; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-023-wifi-rtw89-8852b-add-chip_ops-set_channel.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-023-wifi-rtw89-8852b-add-chip_ops-set_channel.patch deleted file mode 100644 index da36af2d0..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-023-wifi-rtw89-8852b-add-chip_ops-set_channel.patch +++ /dev/null @@ -1,1082 +0,0 @@ -From 6b0698984eb02f3e0dfd3c152df69f87c903e07f Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 5 Oct 2022 16:32:12 +0800 -Subject: [PATCH 023/149] wifi: rtw89: 8852b: add chip_ops::set_channel - -set_channel is main function to configure channel and bandwidth for all -layers, namely MAC, BB and RF. Additionally, MAC layer enables CCK rate -checking to avoid wrong rate from driver. BB layer configures SCO -(Sample Clock Offset) for CCK, TX gain error/offset, and reset baseband -hardware circuit after all configurations done. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221005083212.45683-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - drivers/net/wireless/realtek/rtw89/phy.c | 9 + - drivers/net/wireless/realtek/rtw89/phy.h | 2 + - drivers/net/wireless/realtek/rtw89/reg.h | 58 +- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 564 ++++++++++++++++++ - .../net/wireless/realtek/rtw89/rtw8852b_rfk.c | 256 ++++++++ - .../net/wireless/realtek/rtw89/rtw8852b_rfk.h | 14 + - 7 files changed, 903 insertions(+), 1 deletion(-) - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3429,6 +3429,7 @@ struct rtw89_phy_efuse_gain { - bool comp_valid; - s8 offset[RF_PATH_MAX][RTW89_GAIN_OFFSET_NR]; /* S(8, 0) */ - s8 offset_base[RTW89_PHY_MAX]; /* S(8, 4) */ -+ s8 rssi_base[RTW89_PHY_MAX]; /* S(8, 4) */ - s8 comp[RF_PATH_MAX][RTW89_SUBBAND_NR]; /* S(8, 0) */ - }; - ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -1427,6 +1427,15 @@ void rtw89_phy_write32_idx(struct rtw89_ - } - EXPORT_SYMBOL(rtw89_phy_write32_idx); - -+u32 rtw89_phy_read32_idx(struct rtw89_dev *rtwdev, u32 addr, u32 mask, -+ enum rtw89_phy_idx phy_idx) -+{ -+ if (rtwdev->dbcc_en && phy_idx == RTW89_PHY_1) -+ addr += rtw89_phy0_phy1_offset(rtwdev, addr); -+ return rtw89_phy_read32_mask(rtwdev, addr, mask); -+} -+EXPORT_SYMBOL(rtw89_phy_read32_idx); -+ - void rtw89_phy_set_phy_regs(struct rtw89_dev *rtwdev, u32 addr, u32 mask, - u32 val) - { ---- a/drivers/net/wireless/realtek/rtw89/phy.h -+++ b/drivers/net/wireless/realtek/rtw89/phy.h -@@ -499,6 +499,8 @@ void rtw89_phy_config_rf_reg_v1(struct r - void rtw89_phy_dm_init(struct rtw89_dev *rtwdev); - void rtw89_phy_write32_idx(struct rtw89_dev *rtwdev, u32 addr, u32 mask, - u32 data, enum rtw89_phy_idx phy_idx); -+u32 rtw89_phy_read32_idx(struct rtw89_dev *rtwdev, u32 addr, u32 mask, -+ enum rtw89_phy_idx phy_idx); - void rtw89_phy_load_txpwr_byrate(struct rtw89_dev *rtwdev, - const struct rtw89_txpwr_table *tbl); - s8 rtw89_phy_read_txpwr_limit(struct rtw89_dev *rtwdev, u8 band, ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3313,6 +3313,10 @@ - #define CFGCH_BAND1_2G 0 - #define CFGCH_BAND1_5G 1 - #define CFGCH_BAND1_6G 3 -+#define RR_CFGCH_POW_LCK BIT(15) -+#define RR_CFGCH_TRX_AH BIT(14) -+#define RR_CFGCH_BCN BIT(13) -+#define RR_CFGCH_BW2 BIT(12) - #define RR_CFGCH_BAND0 GENMASK(9, 8) - #define CFGCH_BAND0_2G 0 - #define CFGCH_BAND0_5G 1 -@@ -3450,14 +3454,31 @@ - #define RR_TIA_N6 BIT(8) - #define RR_MIXER 0x9f - #define RR_MIXER_GN GENMASK(4, 3) -+#define RR_POW 0xa0 -+#define RR_POW_SYN GENMASK(3, 2) - #define RR_LOGEN 0xa3 - #define RR_LOGEN_RPT GENMASK(19, 16) -+#define RR_SX 0xaf -+#define RR_LDO 0xb1 -+#define RR_LDO_SEL GENMASK(8, 6) -+#define RR_VCO 0xb2 -+#define RR_LPF 0xb7 -+#define RR_LPF_BUSY BIT(8) - #define RR_XTALX2 0xb8 - #define RR_MALSEL 0xbe -+#define RR_SYNFB 0xc5 -+#define RR_SYNFB_LK BIT(15) -+#define RR_LCKST 0xcf -+#define RR_LCKST_BIN BIT(0) - #define RR_LCK_TRG 0xd3 - #define RR_LCK_TRGSEL BIT(8) -+#define RR_MMD 0xd5 -+#define RR_MMD_RST_EN BIT(8) -+#define RR_MMD_RST_SYN BIT(6) - #define RR_IQKPLL 0xdc - #define RR_IQKPLL_MOD GENMASK(9, 8) -+#define RR_SYNLUT 0xdd -+#define RR_SYNLUT_MOD BIT(4) - #define RR_RCKD 0xde - #define RR_RCKD_POW GENMASK(19, 13) - #define RR_RCKD_BW BIT(2) -@@ -3626,6 +3647,8 @@ - #define R_P0_RFMODE 0x12AC - #define B_P0_RFMODE_ORI_TXRX_FTM_TX GENMASK(31, 4) - #define B_P0_RFMODE_MUX GENMASK(11, 4) -+#define R_P0_RFMODE_ORI_RX 0x12AC -+#define B_P0_RFMODE_ORI_RX_ALL GENMASK(23, 12) - #define R_P0_NRBW 0x12B8 - #define B_P0_NRBW_DBG BIT(30) - #define R_S0_RXDC 0x12D4 -@@ -3719,6 +3742,8 @@ - #define B_RXCCA_DIS_V1 BIT(0) - #define R_RXSC 0x237C - #define B_RXSC_EN BIT(0) -+#define R_RX_RPL_OFST 0x23AC -+#define B_RX_RPL_OFST_CCK_MASK GENMASK(6, 0) - #define R_RXSCOBC 0x23B0 - #define B_RXSCOBC_TH GENMASK(18, 0) - #define R_RXSCOCCK 0x23B4 -@@ -3735,6 +3760,8 @@ - #define R_P1_RFMODE 0x32AC - #define B_P1_RFMODE_ORI_TXRX_FTM_TX GENMASK(31, 4) - #define B_P1_RFMODE_MUX GENMASK(11, 4) -+#define R_P1_RFMODE_ORI_RX 0x32AC -+#define B_P1_RFMODE_ORI_RX_ALL GENMASK(23, 12) - #define R_P1_DBGMOD 0x32B8 - #define B_P1_DBGMOD_ON BIT(30) - #define R_S1_RXDC 0x32D4 -@@ -3768,7 +3795,10 @@ - #define R_T2F_GI_COMB 0x4424 - #define B_T2F_GI_COMB_EN BIT(2) - #define R_BT_DYN_DC_EST_EN 0x441C -+#define R_BT_DYN_DC_EST_EN_V1 0x4420 - #define B_BT_DYN_DC_EST_EN_MSK BIT(31) -+#define R_ASSIGN_SBD_OPT_V1 0x4440 -+#define B_ASSIGN_SBD_OPT_EN_V1 BIT(31) - #define R_ASSIGN_SBD_OPT 0x4450 - #define B_ASSIGN_SBD_OPT_EN BIT(24) - #define R_DCFO_COMP_S0 0x448C -@@ -3918,20 +3948,42 @@ - #define R_2P4G_BAND 0x4970 - #define B_2P4G_BAND_SEL BIT(1) - #define R_FC0_BW 0x4974 --#define B_FC0_BW_INV GENMASK(6, 0) -+#define R_FC0_BW_V1 0x49C0 - #define B_FC0_BW_SET GENMASK(31, 30) - #define B_ANT_RX_BT_SEG0 GENMASK(25, 22) - #define B_ANT_RX_1RCCA_SEG1 GENMASK(21, 18) - #define B_ANT_RX_1RCCA_SEG0 GENMASK(17, 14) -+#define B_FC0_BW_INV GENMASK(6, 0) - #define R_CHBW_MOD 0x4978 -+#define R_CHBW_MOD_V1 0x49C4 - #define B_BT_SHARE BIT(14) - #define B_CHBW_MOD_SBW GENMASK(13, 12) - #define B_CHBW_MOD_PRICH GENMASK(11, 8) - #define B_ANT_RX_SEG0 GENMASK(3, 0) -+#define R_P0_RPL1 0x49B0 -+#define B_P0_RPL1_41_MASK GENMASK(31, 24) -+#define B_P0_RPL1_40_MASK GENMASK(23, 16) -+#define B_P0_RPL1_20_MASK GENMASK(15, 8) -+#define B_P0_RPL1_MASK (B_P0_RPL1_41_MASK | B_P0_RPL1_40_MASK | B_P0_RPL1_20_MASK) -+#define B_P0_RPL1_SHIFT 8 -+#define B_P0_RPL1_BIAS_MASK GENMASK(7, 0) -+#define R_P0_RPL2 0x49B4 -+#define B_P0_RTL2_8A_MASK GENMASK(31, 24) -+#define B_P0_RTL2_81_MASK GENMASK(23, 16) -+#define B_P0_RTL2_80_MASK GENMASK(15, 8) -+#define B_P0_RTL2_42_MASK GENMASK(7, 0) -+#define R_P0_RPL3 0x49B8 -+#define B_P0_RTL3_89_MASK GENMASK(31, 24) -+#define B_P0_RTL3_84_MASK GENMASK(23, 16) -+#define B_P0_RTL3_83_MASK GENMASK(15, 8) -+#define B_P0_RTL3_82_MASK GENMASK(7, 0) - #define R_PD_BOOST_EN 0x49E8 - #define B_PD_BOOST_EN BIT(7) - #define R_P1_BACKOFF_IBADC_V1 0x49F0 - #define B_P1_BACKOFF_IBADC_V1 GENMASK(31, 26) -+#define R_P1_RPL1 0x4A00 -+#define R_P1_RPL2 0x4A04 -+#define R_P1_RPL3 0x4A08 - #define R_BK_FC0_INV_V1 0x4A1C - #define B_BK_FC0_INV_MSK_V1 GENMASK(18, 0) - #define R_CCK_FC0_INV_V1 0x4A20 -@@ -3942,8 +3994,10 @@ - #define B_P1_AGC_EN BIT(31) - #define R_PATH1_TIA_INIT_V1 0x4AA8 - #define B_PATH1_TIA_INIT_IDX_MSK_V1 BIT(9) -+#define R_P0_AGC_RSVD 0x4ACC - #define R_PATH0_RXBB_V1 0x4AD4 - #define B_PATH0_RXBB_MSK_V1 GENMASK(31, 0) -+#define R_P1_AGC_RSVD 0x4AD8 - #define R_PATH1_RXBB_V1 0x4AE0 - #define B_PATH1_RXBB_MSK_V1 GENMASK(31, 0) - #define R_PATH0_BT_BACKOFF_V1 0x4AE4 -@@ -3959,6 +4013,7 @@ - #define B_PATH0_NOTCH2_EN BIT(12) - #define B_PATH0_NOTCH2_VAL GENMASK(11, 0) - #define R_PATH0_5MDET 0x4C4C -+#define R_PATH0_5MDET_V1 0x46F8 - #define B_PATH0_5MDET_EN BIT(12) - #define B_PATH0_5MDET_SB2 BIT(8) - #define B_PATH0_5MDET_SB0 BIT(6) -@@ -3972,6 +4027,7 @@ - #define B_PATH1_NOTCH2_EN BIT(12) - #define B_PATH1_NOTCH2_VAL GENMASK(11, 0) - #define R_PATH1_5MDET 0x4D10 -+#define R_PATH1_5MDET_V1 0x47B8 - #define B_PATH1_5MDET_EN BIT(12) - #define B_PATH1_5MDET_SB2 BIT(8) - #define B_PATH1_5MDET_SB0 BIT(6) ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -8,6 +8,7 @@ - #include "phy.h" - #include "reg.h" - #include "rtw8852b.h" -+#include "rtw8852b_rfk.h" - #include "rtw8852b_table.h" - #include "txrx.h" - -@@ -334,6 +335,568 @@ static void rtw8852b_power_trim(struct r - rtw8852b_pa_bias_trim(rtwdev); - } - -+static void rtw8852b_set_channel_mac(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ u8 mac_idx) -+{ -+ u32 rf_mod = rtw89_mac_reg_by_idx(R_AX_WMAC_RFMOD, mac_idx); -+ u32 sub_carr = rtw89_mac_reg_by_idx(R_AX_TX_SUB_CARRIER_VALUE, mac_idx); -+ u32 chk_rate = rtw89_mac_reg_by_idx(R_AX_TXRATE_CHK, mac_idx); -+ u8 txsc20 = 0, txsc40 = 0; -+ -+ switch (chan->band_width) { -+ case RTW89_CHANNEL_WIDTH_80: -+ txsc40 = rtw89_phy_get_txsc(rtwdev, chan, RTW89_CHANNEL_WIDTH_40); -+ fallthrough; -+ case RTW89_CHANNEL_WIDTH_40: -+ txsc20 = rtw89_phy_get_txsc(rtwdev, chan, RTW89_CHANNEL_WIDTH_20); -+ break; -+ default: -+ break; -+ } -+ -+ switch (chan->band_width) { -+ case RTW89_CHANNEL_WIDTH_80: -+ rtw89_write8_mask(rtwdev, rf_mod, B_AX_WMAC_RFMOD_MASK, BIT(1)); -+ rtw89_write32(rtwdev, sub_carr, txsc20 | (txsc40 << 4)); -+ break; -+ case RTW89_CHANNEL_WIDTH_40: -+ rtw89_write8_mask(rtwdev, rf_mod, B_AX_WMAC_RFMOD_MASK, BIT(0)); -+ rtw89_write32(rtwdev, sub_carr, txsc20); -+ break; -+ case RTW89_CHANNEL_WIDTH_20: -+ rtw89_write8_clr(rtwdev, rf_mod, B_AX_WMAC_RFMOD_MASK); -+ rtw89_write32(rtwdev, sub_carr, 0); -+ break; -+ default: -+ break; -+ } -+ -+ if (chan->channel > 14) { -+ rtw89_write8_clr(rtwdev, chk_rate, B_AX_BAND_MODE); -+ rtw89_write8_set(rtwdev, chk_rate, -+ B_AX_CHECK_CCK_EN | B_AX_RTS_LIMIT_IN_OFDM6); -+ } else { -+ rtw89_write8_set(rtwdev, chk_rate, B_AX_BAND_MODE); -+ rtw89_write8_clr(rtwdev, chk_rate, -+ B_AX_CHECK_CCK_EN | B_AX_RTS_LIMIT_IN_OFDM6); -+ } -+} -+ -+static const u32 rtw8852b_sco_barker_threshold[14] = { -+ 0x1cfea, 0x1d0e1, 0x1d1d7, 0x1d2cd, 0x1d3c3, 0x1d4b9, 0x1d5b0, 0x1d6a6, -+ 0x1d79c, 0x1d892, 0x1d988, 0x1da7f, 0x1db75, 0x1ddc4 -+}; -+ -+static const u32 rtw8852b_sco_cck_threshold[14] = { -+ 0x27de3, 0x27f35, 0x28088, 0x281da, 0x2832d, 0x2847f, 0x285d2, 0x28724, -+ 0x28877, 0x289c9, 0x28b1c, 0x28c6e, 0x28dc1, 0x290ed -+}; -+ -+static void rtw8852b_ctrl_sco_cck(struct rtw89_dev *rtwdev, u8 primary_ch) -+{ -+ u8 ch_element = primary_ch - 1; -+ -+ rtw89_phy_write32_mask(rtwdev, R_RXSCOBC, B_RXSCOBC_TH, -+ rtw8852b_sco_barker_threshold[ch_element]); -+ rtw89_phy_write32_mask(rtwdev, R_RXSCOCCK, B_RXSCOCCK_TH, -+ rtw8852b_sco_cck_threshold[ch_element]); -+} -+ -+static u8 rtw8852b_sco_mapping(u8 central_ch) -+{ -+ if (central_ch == 1) -+ return 109; -+ else if (central_ch >= 2 && central_ch <= 6) -+ return 108; -+ else if (central_ch >= 7 && central_ch <= 10) -+ return 107; -+ else if (central_ch >= 11 && central_ch <= 14) -+ return 106; -+ else if (central_ch == 36 || central_ch == 38) -+ return 51; -+ else if (central_ch >= 40 && central_ch <= 58) -+ return 50; -+ else if (central_ch >= 60 && central_ch <= 64) -+ return 49; -+ else if (central_ch == 100 || central_ch == 102) -+ return 48; -+ else if (central_ch >= 104 && central_ch <= 126) -+ return 47; -+ else if (central_ch >= 128 && central_ch <= 151) -+ return 46; -+ else if (central_ch >= 153 && central_ch <= 177) -+ return 45; -+ else -+ return 0; -+} -+ -+struct rtw8852b_bb_gain { -+ u32 gain_g[BB_PATH_NUM_8852B]; -+ u32 gain_a[BB_PATH_NUM_8852B]; -+ u32 gain_mask; -+}; -+ -+static const struct rtw8852b_bb_gain bb_gain_lna[LNA_GAIN_NUM] = { -+ { .gain_g = {0x4678, 0x475C}, .gain_a = {0x45DC, 0x4740}, -+ .gain_mask = 0x00ff0000 }, -+ { .gain_g = {0x4678, 0x475C}, .gain_a = {0x45DC, 0x4740}, -+ .gain_mask = 0xff000000 }, -+ { .gain_g = {0x467C, 0x4760}, .gain_a = {0x4660, 0x4744}, -+ .gain_mask = 0x000000ff }, -+ { .gain_g = {0x467C, 0x4760}, .gain_a = {0x4660, 0x4744}, -+ .gain_mask = 0x0000ff00 }, -+ { .gain_g = {0x467C, 0x4760}, .gain_a = {0x4660, 0x4744}, -+ .gain_mask = 0x00ff0000 }, -+ { .gain_g = {0x467C, 0x4760}, .gain_a = {0x4660, 0x4744}, -+ .gain_mask = 0xff000000 }, -+ { .gain_g = {0x4680, 0x4764}, .gain_a = {0x4664, 0x4748}, -+ .gain_mask = 0x000000ff }, -+}; -+ -+static const struct rtw8852b_bb_gain bb_gain_tia[TIA_GAIN_NUM] = { -+ { .gain_g = {0x4680, 0x4764}, .gain_a = {0x4664, 0x4748}, -+ .gain_mask = 0x00ff0000 }, -+ { .gain_g = {0x4680, 0x4764}, .gain_a = {0x4664, 0x4748}, -+ .gain_mask = 0xff000000 }, -+}; -+ -+static void rtw8852b_set_gain_error(struct rtw89_dev *rtwdev, -+ enum rtw89_subband subband, -+ enum rtw89_rf_path path) -+{ -+ const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; -+ u8 gain_band = rtw89_subband_to_bb_gain_band(subband); -+ s32 val; -+ u32 reg; -+ u32 mask; -+ int i; -+ -+ for (i = 0; i < LNA_GAIN_NUM; i++) { -+ if (subband == RTW89_CH_2G) -+ reg = bb_gain_lna[i].gain_g[path]; -+ else -+ reg = bb_gain_lna[i].gain_a[path]; -+ -+ mask = bb_gain_lna[i].gain_mask; -+ val = gain->lna_gain[gain_band][path][i]; -+ rtw89_phy_write32_mask(rtwdev, reg, mask, val); -+ } -+ -+ for (i = 0; i < TIA_GAIN_NUM; i++) { -+ if (subband == RTW89_CH_2G) -+ reg = bb_gain_tia[i].gain_g[path]; -+ else -+ reg = bb_gain_tia[i].gain_a[path]; -+ -+ mask = bb_gain_tia[i].gain_mask; -+ val = gain->tia_gain[gain_band][path][i]; -+ rtw89_phy_write32_mask(rtwdev, reg, mask, val); -+ } -+} -+ -+static void rtw8852b_set_gain_offset(struct rtw89_dev *rtwdev, -+ enum rtw89_subband subband, -+ enum rtw89_phy_idx phy_idx) -+{ -+ static const u32 gain_err_addr[2] = {R_P0_AGC_RSVD, R_P1_AGC_RSVD}; -+ static const u32 rssi_ofst_addr[2] = {R_PATH0_G_TIA1_LNA6_OP1DB_V1, -+ R_PATH1_G_TIA1_LNA6_OP1DB_V1}; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ struct rtw89_phy_efuse_gain *efuse_gain = &rtwdev->efuse_gain; -+ enum rtw89_gain_offset gain_ofdm_band; -+ s32 offset_a, offset_b; -+ s32 offset_ofdm, offset_cck; -+ s32 tmp; -+ u8 path; -+ -+ if (!efuse_gain->comp_valid) -+ goto next; -+ -+ for (path = RF_PATH_A; path < BB_PATH_NUM_8852B; path++) { -+ tmp = efuse_gain->comp[path][subband]; -+ tmp = clamp_t(s32, tmp << 2, S8_MIN, S8_MAX); -+ rtw89_phy_write32_mask(rtwdev, gain_err_addr[path], MASKBYTE0, tmp); -+ } -+ -+next: -+ if (!efuse_gain->offset_valid) -+ return; -+ -+ gain_ofdm_band = rtw89_subband_to_gain_offset_band_of_ofdm(subband); -+ -+ offset_a = -efuse_gain->offset[RF_PATH_A][gain_ofdm_band]; -+ offset_b = -efuse_gain->offset[RF_PATH_B][gain_ofdm_band]; -+ -+ tmp = -((offset_a << 2) + (efuse_gain->offset_base[RTW89_PHY_0] >> 2)); -+ tmp = clamp_t(s32, tmp, S8_MIN, S8_MAX); -+ rtw89_phy_write32_mask(rtwdev, rssi_ofst_addr[RF_PATH_A], B_PATH0_R_G_OFST_MASK, tmp); -+ -+ tmp = -((offset_b << 2) + (efuse_gain->offset_base[RTW89_PHY_0] >> 2)); -+ tmp = clamp_t(s32, tmp, S8_MIN, S8_MAX); -+ rtw89_phy_write32_mask(rtwdev, rssi_ofst_addr[RF_PATH_B], B_PATH0_R_G_OFST_MASK, tmp); -+ -+ if (hal->antenna_rx == RF_B) { -+ offset_ofdm = -efuse_gain->offset[RF_PATH_B][gain_ofdm_band]; -+ offset_cck = -efuse_gain->offset[RF_PATH_B][0]; -+ } else { -+ offset_ofdm = -efuse_gain->offset[RF_PATH_A][gain_ofdm_band]; -+ offset_cck = -efuse_gain->offset[RF_PATH_A][0]; -+ } -+ -+ tmp = (offset_ofdm << 4) + efuse_gain->offset_base[RTW89_PHY_0]; -+ tmp = clamp_t(s32, tmp, S8_MIN, S8_MAX); -+ rtw89_phy_write32_idx(rtwdev, R_P0_RPL1, B_P0_RPL1_BIAS_MASK, tmp, phy_idx); -+ -+ tmp = (offset_ofdm << 4) + efuse_gain->rssi_base[RTW89_PHY_0]; -+ tmp = clamp_t(s32, tmp, S8_MIN, S8_MAX); -+ rtw89_phy_write32_idx(rtwdev, R_P1_RPL1, B_P0_RPL1_BIAS_MASK, tmp, phy_idx); -+ -+ if (subband == RTW89_CH_2G) { -+ tmp = (offset_cck << 3) + (efuse_gain->offset_base[RTW89_PHY_0] >> 1); -+ tmp = clamp_t(s32, tmp, S8_MIN >> 1, S8_MAX >> 1); -+ rtw89_phy_write32_mask(rtwdev, R_RX_RPL_OFST, -+ B_RX_RPL_OFST_CCK_MASK, tmp); -+ } -+} -+ -+static -+void rtw8852b_set_rxsc_rpl_comp(struct rtw89_dev *rtwdev, enum rtw89_subband subband) -+{ -+ const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; -+ u8 band = rtw89_subband_to_bb_gain_band(subband); -+ u32 val; -+ -+ val = FIELD_PREP(B_P0_RPL1_20_MASK, (gain->rpl_ofst_20[band][RF_PATH_A] + -+ gain->rpl_ofst_20[band][RF_PATH_B]) / 2) | -+ FIELD_PREP(B_P0_RPL1_40_MASK, (gain->rpl_ofst_40[band][RF_PATH_A][0] + -+ gain->rpl_ofst_40[band][RF_PATH_B][0]) / 2) | -+ FIELD_PREP(B_P0_RPL1_41_MASK, (gain->rpl_ofst_40[band][RF_PATH_A][1] + -+ gain->rpl_ofst_40[band][RF_PATH_B][1]) / 2); -+ val >>= B_P0_RPL1_SHIFT; -+ rtw89_phy_write32_mask(rtwdev, R_P0_RPL1, B_P0_RPL1_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RPL1, B_P0_RPL1_MASK, val); -+ -+ val = FIELD_PREP(B_P0_RTL2_42_MASK, (gain->rpl_ofst_40[band][RF_PATH_A][2] + -+ gain->rpl_ofst_40[band][RF_PATH_B][2]) / 2) | -+ FIELD_PREP(B_P0_RTL2_80_MASK, (gain->rpl_ofst_80[band][RF_PATH_A][0] + -+ gain->rpl_ofst_80[band][RF_PATH_B][0]) / 2) | -+ FIELD_PREP(B_P0_RTL2_81_MASK, (gain->rpl_ofst_80[band][RF_PATH_A][1] + -+ gain->rpl_ofst_80[band][RF_PATH_B][1]) / 2) | -+ FIELD_PREP(B_P0_RTL2_8A_MASK, (gain->rpl_ofst_80[band][RF_PATH_A][10] + -+ gain->rpl_ofst_80[band][RF_PATH_B][10]) / 2); -+ rtw89_phy_write32(rtwdev, R_P0_RPL2, val); -+ rtw89_phy_write32(rtwdev, R_P1_RPL2, val); -+ -+ val = FIELD_PREP(B_P0_RTL3_82_MASK, (gain->rpl_ofst_80[band][RF_PATH_A][2] + -+ gain->rpl_ofst_80[band][RF_PATH_B][2]) / 2) | -+ FIELD_PREP(B_P0_RTL3_83_MASK, (gain->rpl_ofst_80[band][RF_PATH_A][3] + -+ gain->rpl_ofst_80[band][RF_PATH_B][3]) / 2) | -+ FIELD_PREP(B_P0_RTL3_84_MASK, (gain->rpl_ofst_80[band][RF_PATH_A][4] + -+ gain->rpl_ofst_80[band][RF_PATH_B][4]) / 2) | -+ FIELD_PREP(B_P0_RTL3_89_MASK, (gain->rpl_ofst_80[band][RF_PATH_A][9] + -+ gain->rpl_ofst_80[band][RF_PATH_B][9]) / 2); -+ rtw89_phy_write32(rtwdev, R_P0_RPL3, val); -+ rtw89_phy_write32(rtwdev, R_P1_RPL3, val); -+} -+ -+static void rtw8852b_ctrl_ch(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ u8 central_ch = chan->channel; -+ u8 subband = chan->subband_type; -+ u8 sco_comp; -+ bool is_2g = central_ch <= 14; -+ -+ /* Path A */ -+ if (is_2g) -+ rtw89_phy_write32_idx(rtwdev, R_PATH0_BAND_SEL_V1, -+ B_PATH0_BAND_SEL_MSK_V1, 1, phy_idx); -+ else -+ rtw89_phy_write32_idx(rtwdev, R_PATH0_BAND_SEL_V1, -+ B_PATH0_BAND_SEL_MSK_V1, 0, phy_idx); -+ -+ /* Path B */ -+ if (is_2g) -+ rtw89_phy_write32_idx(rtwdev, R_PATH1_BAND_SEL_V1, -+ B_PATH1_BAND_SEL_MSK_V1, 1, phy_idx); -+ else -+ rtw89_phy_write32_idx(rtwdev, R_PATH1_BAND_SEL_V1, -+ B_PATH1_BAND_SEL_MSK_V1, 0, phy_idx); -+ -+ /* SCO compensate FC setting */ -+ sco_comp = rtw8852b_sco_mapping(central_ch); -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_INV, sco_comp, phy_idx); -+ -+ if (chan->band_type == RTW89_BAND_6G) -+ return; -+ -+ /* CCK parameters */ -+ if (central_ch == 14) { -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR0, B_TXFIR_C01, 0x3b13ff); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR2, B_TXFIR_C23, 0x1c42de); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR4, B_TXFIR_C45, 0xfdb0ad); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR6, B_TXFIR_C67, 0xf60f6e); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR8, B_TXFIR_C89, 0xfd8f92); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRA, B_TXFIR_CAB, 0x2d011); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRC, B_TXFIR_CCD, 0x1c02c); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRE, B_TXFIR_CEF, 0xfff00a); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR0, B_TXFIR_C01, 0x3d23ff); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR2, B_TXFIR_C23, 0x29b354); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR4, B_TXFIR_C45, 0xfc1c8); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR6, B_TXFIR_C67, 0xfdb053); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR8, B_TXFIR_C89, 0xf86f9a); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRA, B_TXFIR_CAB, 0xfaef92); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRC, B_TXFIR_CCD, 0xfe5fcc); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRE, B_TXFIR_CEF, 0xffdff5); -+ } -+ -+ rtw8852b_set_gain_error(rtwdev, subband, RF_PATH_A); -+ rtw8852b_set_gain_error(rtwdev, subband, RF_PATH_B); -+ rtw8852b_set_gain_offset(rtwdev, subband, phy_idx); -+ rtw8852b_set_rxsc_rpl_comp(rtwdev, subband); -+} -+ -+static void rtw8852b_bw_setting(struct rtw89_dev *rtwdev, u8 bw, u8 path) -+{ -+ static const u32 adc_sel[2] = {0xC0EC, 0xC1EC}; -+ static const u32 wbadc_sel[2] = {0xC0E4, 0xC1E4}; -+ -+ switch (bw) { -+ case RTW89_CHANNEL_WIDTH_5: -+ rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x1); -+ rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x0); -+ break; -+ case RTW89_CHANNEL_WIDTH_10: -+ rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x2); -+ rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x1); -+ break; -+ case RTW89_CHANNEL_WIDTH_20: -+ rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x0); -+ rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x2); -+ break; -+ case RTW89_CHANNEL_WIDTH_40: -+ rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x0); -+ rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x2); -+ break; -+ case RTW89_CHANNEL_WIDTH_80: -+ rtw89_phy_write32_mask(rtwdev, adc_sel[path], 0x6000, 0x0); -+ rtw89_phy_write32_mask(rtwdev, wbadc_sel[path], 0x30, 0x2); -+ break; -+ default: -+ rtw89_warn(rtwdev, "Fail to set ADC\n"); -+ } -+} -+ -+static void rtw8852b_ctrl_bw(struct rtw89_dev *rtwdev, u8 pri_ch, u8 bw, -+ enum rtw89_phy_idx phy_idx) -+{ -+ u32 rx_path_0; -+ -+ switch (bw) { -+ case RTW89_CHANNEL_WIDTH_5: -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x1, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, 0x0, phy_idx); -+ -+ /*Set RF mode at 3 */ -+ rtw89_phy_write32_idx(rtwdev, R_P0_RFMODE_ORI_RX, -+ B_P0_RFMODE_ORI_RX_ALL, 0x333, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_P1_RFMODE_ORI_RX, -+ B_P1_RFMODE_ORI_RX_ALL, 0x333, phy_idx); -+ break; -+ case RTW89_CHANNEL_WIDTH_10: -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x2, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, 0x0, phy_idx); -+ -+ /*Set RF mode at 3 */ -+ rtw89_phy_write32_idx(rtwdev, R_P0_RFMODE_ORI_RX, -+ B_P0_RFMODE_ORI_RX_ALL, 0x333, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_P1_RFMODE_ORI_RX, -+ B_P1_RFMODE_ORI_RX_ALL, 0x333, phy_idx); -+ break; -+ case RTW89_CHANNEL_WIDTH_20: -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, 0x0, phy_idx); -+ -+ /*Set RF mode at 3 */ -+ rtw89_phy_write32_idx(rtwdev, R_P0_RFMODE_ORI_RX, -+ B_P0_RFMODE_ORI_RX_ALL, 0x333, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_P1_RFMODE_ORI_RX, -+ B_P1_RFMODE_ORI_RX_ALL, 0x333, phy_idx); -+ break; -+ case RTW89_CHANNEL_WIDTH_40: -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x1, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, -+ pri_ch, phy_idx); -+ -+ /*Set RF mode at 3 */ -+ rtw89_phy_write32_idx(rtwdev, R_P0_RFMODE_ORI_RX, -+ B_P0_RFMODE_ORI_RX_ALL, 0x333, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_P1_RFMODE_ORI_RX, -+ B_P1_RFMODE_ORI_RX_ALL, 0x333, phy_idx); -+ /*CCK primary channel */ -+ if (pri_ch == RTW89_SC_20_UPPER) -+ rtw89_phy_write32_mask(rtwdev, R_RXSC, B_RXSC_EN, 1); -+ else -+ rtw89_phy_write32_mask(rtwdev, R_RXSC, B_RXSC_EN, 0); -+ -+ break; -+ case RTW89_CHANNEL_WIDTH_80: -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x2, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, -+ pri_ch, phy_idx); -+ -+ /*Set RF mode at A */ -+ rtw89_phy_write32_idx(rtwdev, R_P0_RFMODE_ORI_RX, -+ B_P0_RFMODE_ORI_RX_ALL, 0xaaa, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_P1_RFMODE_ORI_RX, -+ B_P1_RFMODE_ORI_RX_ALL, 0xaaa, phy_idx); -+ break; -+ default: -+ rtw89_warn(rtwdev, "Fail to switch bw (bw:%d, pri ch:%d)\n", bw, -+ pri_ch); -+ } -+ -+ rtw8852b_bw_setting(rtwdev, bw, RF_PATH_A); -+ rtw8852b_bw_setting(rtwdev, bw, RF_PATH_B); -+ -+ rx_path_0 = rtw89_phy_read32_idx(rtwdev, R_CHBW_MOD_V1, B_ANT_RX_SEG0, -+ phy_idx); -+ if (rx_path_0 == 0x1) -+ rtw89_phy_write32_idx(rtwdev, R_P1_RFMODE_ORI_RX, -+ B_P1_RFMODE_ORI_RX_ALL, 0x111, phy_idx); -+ else if (rx_path_0 == 0x2) -+ rtw89_phy_write32_idx(rtwdev, R_P0_RFMODE_ORI_RX, -+ B_P0_RFMODE_ORI_RX_ALL, 0x111, phy_idx); -+} -+ -+static void rtw8852b_ctrl_cck_en(struct rtw89_dev *rtwdev, bool cck_en) -+{ -+ if (cck_en) { -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_ENABLE_CCK, 1); -+ rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 0); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_ENABLE_CCK, 0); -+ rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 1); -+ } -+} -+ -+static void rtw8852b_5m_mask(struct rtw89_dev *rtwdev, const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ u8 pri_ch = chan->primary_channel; -+ bool mask_5m_low; -+ bool mask_5m_en; -+ -+ switch (chan->band_width) { -+ case RTW89_CHANNEL_WIDTH_40: -+ /* Prich=1: Mask 5M High, Prich=2: Mask 5M Low */ -+ mask_5m_en = true; -+ mask_5m_low = pri_ch == 2; -+ break; -+ case RTW89_CHANNEL_WIDTH_80: -+ /* Prich=3: Mask 5M High, Prich=4: Mask 5M Low, Else: Disable */ -+ mask_5m_en = pri_ch == 3 || pri_ch == 4; -+ mask_5m_low = pri_ch == 4; -+ break; -+ default: -+ mask_5m_en = false; -+ break; -+ } -+ -+ if (!mask_5m_en) { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_EN, 0x0); -+ rtw89_phy_write32_idx(rtwdev, R_ASSIGN_SBD_OPT_V1, -+ B_ASSIGN_SBD_OPT_EN_V1, 0x0, phy_idx); -+ return; -+ } -+ -+ if (mask_5m_low) { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_TH, 0x4); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_SB2, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_SB0, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_TH, 0x4); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_SB2, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_SB0, 0x1); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_TH, 0x4); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_SB2, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_SB0, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_TH, 0x4); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_SB2, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_5MDET_V1, B_PATH1_5MDET_SB0, 0x0); -+ } -+ rtw89_phy_write32_idx(rtwdev, R_ASSIGN_SBD_OPT_V1, -+ B_ASSIGN_SBD_OPT_EN_V1, 0x1, phy_idx); -+} -+ -+static void rtw8852b_bb_reset_all(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG, 0x7, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_S1_HW_SI_DIS, B_S1_HW_SI_DIS_W_R_TRIG, 0x7, phy_idx); -+ fsleep(1); -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_S1_HW_SI_DIS, B_S1_HW_SI_DIS_W_R_TRIG, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, phy_idx); -+} -+ -+static void rtw8852b_set_channel_bb(struct rtw89_dev *rtwdev, const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ bool cck_en = chan->channel <= 14; -+ u8 pri_ch_idx = chan->pri_ch_idx; -+ -+ if (cck_en) -+ rtw8852b_ctrl_sco_cck(rtwdev, chan->primary_channel); -+ -+ rtw8852b_ctrl_ch(rtwdev, chan, phy_idx); -+ rtw8852b_ctrl_bw(rtwdev, pri_ch_idx, chan->band_width, phy_idx); -+ rtw8852b_ctrl_cck_en(rtwdev, cck_en); -+ if (chan->band_type == RTW89_BAND_5G) { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_BT_SHARE_V1, -+ B_PATH0_BT_SHARE_V1, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_BTG_PATH_V1, -+ B_PATH0_BTG_PATH_V1, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_BT_SHARE_V1, -+ B_PATH1_BT_SHARE_V1, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_BTG_PATH_V1, -+ B_PATH1_BTG_PATH_V1, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD_V1, B_BT_SHARE, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_BT_SEG0, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_BT_DYN_DC_EST_EN_V1, -+ B_BT_DYN_DC_EST_EN_MSK, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_GNT_BT_WGT_EN, B_GNT_BT_WGT_EN, 0x0); -+ } -+ rtw89_phy_write32_mask(rtwdev, R_MAC_PIN_SEL, B_CH_IDX_SEG0, -+ chan->primary_channel); -+ rtw8852b_5m_mask(rtwdev, chan, phy_idx); -+ rtw8852b_bb_reset_all(rtwdev, phy_idx); -+} -+ -+static void rtw8852b_set_channel(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_mac_idx mac_idx, -+ enum rtw89_phy_idx phy_idx) -+{ -+ rtw8852b_set_channel_mac(rtwdev, chan, mac_idx); -+ rtw8852b_set_channel_bb(rtwdev, chan, phy_idx); -+ rtw8852b_set_channel_rf(rtwdev, chan, phy_idx); -+} -+ - static u32 rtw8852b_bb_cal_txpwr_ref(struct rtw89_dev *rtwdev, - enum rtw89_phy_idx phy_idx, s16 ref) - { -@@ -579,6 +1142,7 @@ static int rtw8852b_mac_disable_bb_rf(st - static const struct rtw89_chip_ops rtw8852b_chip_ops = { - .enable_bb_rf = rtw8852b_mac_enable_bb_rf, - .disable_bb_rf = rtw8852b_mac_disable_bb_rf, -+ .set_channel = rtw8852b_set_channel, - .read_efuse = rtw8852b_read_efuse, - .read_phycap = rtw8852b_read_phycap, - .power_trim = rtw8852b_power_trim, ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -@@ -0,0 +1,256 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2022 Realtek Corporation -+ */ -+ -+#include "coex.h" -+#include "debug.h" -+#include "mac.h" -+#include "phy.h" -+#include "reg.h" -+#include "rtw8852b.h" -+#include "rtw8852b_rfk.h" -+#include "rtw8852b_rfk_table.h" -+#include "rtw8852b_table.h" -+ -+static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ u8 val; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]dbcc_en: %x,PHY%d\n", -+ rtwdev->dbcc_en, phy_idx); -+ -+ if (!rtwdev->dbcc_en) { -+ val = RF_AB; -+ } else { -+ if (phy_idx == RTW89_PHY_0) -+ val = RF_A; -+ else -+ val = RF_B; -+ } -+ return val; -+} -+ -+static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, -+ enum rtw89_bandwidth bw, bool dav) -+{ -+ u32 rf_reg18; -+ u32 reg18_addr = dav ? RR_CFGCH : RR_CFGCH_V1; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]===> %s\n", __func__); -+ -+ rf_reg18 = rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK); -+ if (rf_reg18 == INV_RF_DATA) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK]Invalid RF_0x18 for Path-%d\n", path); -+ return; -+ } -+ rf_reg18 &= ~RR_CFGCH_BW; -+ -+ switch (bw) { -+ case RTW89_CHANNEL_WIDTH_5: -+ case RTW89_CHANNEL_WIDTH_10: -+ case RTW89_CHANNEL_WIDTH_20: -+ rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_20M); -+ break; -+ case RTW89_CHANNEL_WIDTH_40: -+ rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_40M); -+ break; -+ case RTW89_CHANNEL_WIDTH_80: -+ rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_80M); -+ break; -+ default: -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]Fail to set CH\n"); -+ } -+ -+ rf_reg18 &= ~(RR_CFGCH_POW_LCK | RR_CFGCH_TRX_AH | RR_CFGCH_BCN | -+ RR_CFGCH_BW2) & RFREG_MASK; -+ rf_reg18 |= RR_CFGCH_BW2; -+ rtw89_write_rf(rtwdev, path, reg18_addr, RFREG_MASK, rf_reg18); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK] set %x at path%d, %x =0x%x\n", -+ bw, path, reg18_addr, -+ rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK)); -+} -+ -+static void _ctrl_bw(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_bandwidth bw) -+{ -+ _bw_setting(rtwdev, RF_PATH_A, bw, true); -+ _bw_setting(rtwdev, RF_PATH_B, bw, true); -+ _bw_setting(rtwdev, RF_PATH_A, bw, false); -+ _bw_setting(rtwdev, RF_PATH_B, bw, false); -+} -+ -+static bool _set_s0_arfc18(struct rtw89_dev *rtwdev, u32 val) -+{ -+ u32 bak; -+ u32 tmp; -+ int ret; -+ -+ bak = rtw89_read_rf(rtwdev, RF_PATH_A, RR_LDO, RFREG_MASK); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LDO, RR_LDO_SEL, 0x1); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_CFGCH, RFREG_MASK, val); -+ -+ ret = read_poll_timeout_atomic(rtw89_read_rf, tmp, tmp == 0, 1, 1000, -+ false, rtwdev, RF_PATH_A, RR_LPF, RR_LPF_BUSY); -+ if (ret) -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]LCK timeout\n"); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LDO, RFREG_MASK, bak); -+ -+ return !!ret; -+} -+ -+static void _lck_check(struct rtw89_dev *rtwdev) -+{ -+ u32 tmp; -+ -+ if (rtw89_read_rf(rtwdev, RF_PATH_A, RR_SYNFB, RR_SYNFB_LK) == 0) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]SYN MMD reset\n"); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MMD, RR_MMD_RST_EN, 0x1); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MMD, RR_MMD_RST_SYN, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MMD, RR_MMD_RST_SYN, 0x1); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MMD, RR_MMD_RST_EN, 0x0); -+ } -+ -+ udelay(10); -+ -+ if (rtw89_read_rf(rtwdev, RF_PATH_A, RR_SYNFB, RR_SYNFB_LK) == 0) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]re-set RF 0x18\n"); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RR_LCK_TRGSEL, 0x1); -+ tmp = rtw89_read_rf(rtwdev, RF_PATH_A, RR_CFGCH, RFREG_MASK); -+ _set_s0_arfc18(rtwdev, tmp); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RR_LCK_TRGSEL, 0x0); -+ } -+ -+ if (rtw89_read_rf(rtwdev, RF_PATH_A, RR_SYNFB, RR_SYNFB_LK) == 0) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]SYN off/on\n"); -+ -+ tmp = rtw89_read_rf(rtwdev, RF_PATH_A, RR_POW, RFREG_MASK); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RFREG_MASK, tmp); -+ tmp = rtw89_read_rf(rtwdev, RF_PATH_A, RR_SX, RFREG_MASK); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_SX, RFREG_MASK, tmp); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_SYNLUT, RR_SYNLUT_MOD, 0x1); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN, 0x3); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_SYNLUT, RR_SYNLUT_MOD, 0x0); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RR_LCK_TRGSEL, 0x1); -+ tmp = rtw89_read_rf(rtwdev, RF_PATH_A, RR_CFGCH, RFREG_MASK); -+ _set_s0_arfc18(rtwdev, tmp); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RR_LCK_TRGSEL, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]0xb2=%x, 0xc5=%x\n", -+ rtw89_read_rf(rtwdev, RF_PATH_A, RR_VCO, RFREG_MASK), -+ rtw89_read_rf(rtwdev, RF_PATH_A, RR_SYNFB, RFREG_MASK)); -+ } -+} -+ -+static void _set_ch(struct rtw89_dev *rtwdev, u32 val) -+{ -+ bool timeout; -+ -+ timeout = _set_s0_arfc18(rtwdev, val); -+ if (!timeout) -+ _lck_check(rtwdev); -+} -+ -+static void _ch_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, -+ u8 central_ch, bool dav) -+{ -+ u32 reg18_addr = dav ? RR_CFGCH : RR_CFGCH_V1; -+ bool is_2g_ch = central_ch <= 14; -+ u32 rf_reg18; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]===> %s\n", __func__); -+ -+ rf_reg18 = rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK); -+ rf_reg18 &= ~(RR_CFGCH_BAND1 | RR_CFGCH_POW_LCK | RR_CFGCH_TRX_AH | -+ RR_CFGCH_BCN | RR_CFGCH_BAND0 | RR_CFGCH_CH); -+ rf_reg18 |= FIELD_PREP(RR_CFGCH_CH, central_ch); -+ -+ if (!is_2g_ch) -+ rf_reg18 |= FIELD_PREP(RR_CFGCH_BAND1, CFGCH_BAND1_5G) | -+ FIELD_PREP(RR_CFGCH_BAND0, CFGCH_BAND0_5G); -+ -+ rf_reg18 &= ~(RR_CFGCH_POW_LCK | RR_CFGCH_TRX_AH | RR_CFGCH_BCN | -+ RR_CFGCH_BW2) & RFREG_MASK; -+ rf_reg18 |= RR_CFGCH_BW2; -+ -+ if (path == RF_PATH_A && dav) -+ _set_ch(rtwdev, rf_reg18); -+ else -+ rtw89_write_rf(rtwdev, path, reg18_addr, RFREG_MASK, rf_reg18); -+ -+ rtw89_write_rf(rtwdev, path, RR_LCKST, RR_LCKST_BIN, 0); -+ rtw89_write_rf(rtwdev, path, RR_LCKST, RR_LCKST_BIN, 1); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK]CH: %d for Path-%d, reg0x%x = 0x%x\n", -+ central_ch, path, reg18_addr, -+ rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK)); -+} -+ -+static void _ctrl_ch(struct rtw89_dev *rtwdev, u8 central_ch) -+{ -+ _ch_setting(rtwdev, RF_PATH_A, central_ch, true); -+ _ch_setting(rtwdev, RF_PATH_B, central_ch, true); -+ _ch_setting(rtwdev, RF_PATH_A, central_ch, false); -+ _ch_setting(rtwdev, RF_PATH_B, central_ch, false); -+} -+ -+static void _set_rxbb_bw(struct rtw89_dev *rtwdev, enum rtw89_bandwidth bw, -+ enum rtw89_rf_path path) -+{ -+ rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_M2, 0x12); -+ -+ if (bw == RTW89_CHANNEL_WIDTH_20) -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0x1b); -+ else if (bw == RTW89_CHANNEL_WIDTH_40) -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0x13); -+ else if (bw == RTW89_CHANNEL_WIDTH_80) -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0xb); -+ else -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0x3); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK] set S%d RXBB BW 0x3F = 0x%x\n", path, -+ rtw89_read_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB)); -+ -+ rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x0); -+} -+ -+static void _rxbb_bw(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_bandwidth bw) -+{ -+ u8 kpath, path; -+ -+ kpath = _kpath(rtwdev, phy); -+ -+ for (path = 0; path < RF_PATH_NUM_8852B; path++) { -+ if (!(kpath & BIT(path))) -+ continue; -+ -+ _set_rxbb_bw(rtwdev, bw, path); -+ } -+} -+ -+static void rtw8852b_ctrl_bw_ch(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, u8 central_ch, -+ enum rtw89_band band, enum rtw89_bandwidth bw) -+{ -+ _ctrl_ch(rtwdev, central_ch); -+ _ctrl_bw(rtwdev, phy, bw); -+ _rxbb_bw(rtwdev, phy, bw); -+} -+ -+void rtw8852b_set_channel_rf(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ rtw8852b_ctrl_bw_ch(rtwdev, phy_idx, chan->channel, chan->band_type, -+ chan->band_width); -+} ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h -@@ -0,0 +1,14 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2022 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_8852B_RFK_H__ -+#define __RTW89_8852B_RFK_H__ -+ -+#include "core.h" -+ -+void rtw8852b_set_channel_rf(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx); -+ -+#endif diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-024-wifi-rtw89-correct-6-GHz-scan-behavior.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-024-wifi-rtw89-correct-6-GHz-scan-behavior.patch deleted file mode 100644 index 3708066ae..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-024-wifi-rtw89-correct-6-GHz-scan-behavior.patch +++ /dev/null @@ -1,103 +0,0 @@ -From 54997c24767b51bd762ff942431e8d37b535dc2e Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 7 Oct 2022 12:58:59 +0800 -Subject: [PATCH 024/149] wifi: rtw89: correct 6 GHz scan behavior - -Change active scan behavior to fit 6GHz requirements. There are many -different rules on active scan between 6GHz and 2GHz/5GHz, so if the -SSID is not specified, do fast passive scanning and limit number of -probe requests we send for now until new firmware can support all -rules. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221007045900.10823-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 28 +++++++++++++++++++------ - drivers/net/wireless/realtek/rtw89/fw.h | 1 + - 2 files changed, 23 insertions(+), 6 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -2567,6 +2567,9 @@ static void rtw89_hw_scan_add_chan(struc - struct rtw89_mac_chinfo *ch_info) - { - struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info; -+ struct ieee80211_vif *vif = rtwdev->scan_info.scanning_vif; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ struct cfg80211_scan_request *req = rtwvif->scan_req; - struct rtw89_pktofld_info *info; - u8 band, probe_count = 0; - -@@ -2578,13 +2581,13 @@ static void rtw89_hw_scan_add_chan(struc - ch_info->tx_pwr_idx = 0; - ch_info->tx_null = false; - ch_info->pause_data = false; -+ ch_info->probe_id = RTW89_SCANOFLD_PKT_NONE; - - if (ssid_num) { - ch_info->num_pkt = ssid_num; - band = rtw89_hw_to_nl80211_band(ch_info->ch_band); - - list_for_each_entry(info, &scan_info->pkt_list[band], list) { -- ch_info->probe_id = info->id; - ch_info->pkt_id[probe_count] = info->id; - if (++probe_count >= ssid_num) - break; -@@ -2593,9 +2596,16 @@ static void rtw89_hw_scan_add_chan(struc - rtw89_err(rtwdev, "SSID num differs from list len\n"); - } - -+ if (ch_info->ch_band == RTW89_BAND_6G) { -+ if (ssid_num == 1 && req->ssids[0].ssid_len == 0) { -+ ch_info->tx_pkt = false; -+ if (!req->duration_mandatory) -+ ch_info->period -= RTW89_DWELL_TIME; -+ } -+ } -+ - switch (chan_type) { - case RTW89_CHAN_OPERATE: -- ch_info->probe_id = RTW89_SCANOFLD_PKT_NONE; - ch_info->central_ch = scan_info->op_chan; - ch_info->pri_ch = scan_info->op_pri_ch; - ch_info->ch_band = scan_info->op_band; -@@ -2604,8 +2614,9 @@ static void rtw89_hw_scan_add_chan(struc - ch_info->num_pkt = 0; - break; - case RTW89_CHAN_DFS: -- ch_info->period = max_t(u8, ch_info->period, -- RTW89_DFS_CHAN_TIME); -+ if (ch_info->ch_band != RTW89_BAND_6G) -+ ch_info->period = max_t(u8, ch_info->period, -+ RTW89_DFS_CHAN_TIME); - ch_info->dwell_time = RTW89_DWELL_TIME; - break; - case RTW89_CHAN_ACTIVE: -@@ -2639,8 +2650,13 @@ static int rtw89_hw_scan_add_chan_list(s - goto out; - } - -- ch_info->period = req->duration_mandatory ? -- req->duration : RTW89_CHANNEL_TIME; -+ if (req->duration_mandatory) -+ ch_info->period = req->duration; -+ else if (channel->band == NL80211_BAND_6GHZ) -+ ch_info->period = RTW89_CHANNEL_TIME_6G + RTW89_DWELL_TIME; -+ else -+ ch_info->period = RTW89_CHANNEL_TIME; -+ - ch_info->ch_band = rtw89_nl80211_to_hw_band(channel->band); - ch_info->central_ch = channel->hw_value; - ch_info->pri_ch = channel->hw_value; ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -197,6 +197,7 @@ struct rtw89_h2creg_sch_tx_en { - - #define RTW89_H2C_MAX_SIZE 2048 - #define RTW89_CHANNEL_TIME 45 -+#define RTW89_CHANNEL_TIME_6G 20 - #define RTW89_DFS_CHAN_TIME 105 - #define RTW89_OFF_CHAN_TIME 100 - #define RTW89_DWELL_TIME 20 diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-025-wifi-rtw89-fix-wrong-bandwidth-settings-after-scan.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-025-wifi-rtw89-fix-wrong-bandwidth-settings-after-scan.patch deleted file mode 100644 index 93e69c8a1..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-025-wifi-rtw89-fix-wrong-bandwidth-settings-after-scan.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 478132050360a5cf19cc1b3fc9fcf1e56a483481 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 7 Oct 2022 12:59:00 +0800 -Subject: [PATCH 025/149] wifi: rtw89: fix wrong bandwidth settings after scan - -Set channel in driver side to configure Tx power and channel index -correctly after scan. Before this, beacons with bandwidth larger than -20M bandwidth will be dropped by mac80211 due to frequency mismatch. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221007045900.10823-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -2775,6 +2775,7 @@ void rtw89_hw_scan_complete(struct rtw89 - - if (rtwvif->net_type != RTW89_NET_TYPE_NO_LINK) - rtw89_store_op_chan(rtwdev, false); -+ rtw89_set_channel(rtwdev); - } - - void rtw89_hw_scan_abort(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif) diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-026-wifi-rtw89-8852b-add-chip_ops-set_channel_help.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-026-wifi-rtw89-8852b-add-chip_ops-set_channel_help.patch deleted file mode 100644 index 25bd49c12..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-026-wifi-rtw89-8852b-add-chip_ops-set_channel_help.patch +++ /dev/null @@ -1,125 +0,0 @@ -From d0a95ef3ed86762d2356fd5443bebe7a6ef140c7 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sun, 9 Oct 2022 20:53:55 +0800 -Subject: [PATCH 026/149] wifi: rtw89: 8852b: add chip_ops::set_channel_help - -This chip_ops is to assist set_channel, because we need setup and restore -hardware before and after set_channel. - -Before set_channel, we stop transmitting, reset PPDU status, disable TSSI, -and disable ADC. After set_channel, do opposite things in reverse order. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221009125403.19662-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 84 +++++++++++++++++++ - 1 file changed, 84 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -854,6 +854,30 @@ static void rtw8852b_bb_reset_all(struct - rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, phy_idx); - } - -+static void rtw8852b_bb_reset_en(struct rtw89_dev *rtwdev, enum rtw89_band band, -+ enum rtw89_phy_idx phy_idx, bool en) -+{ -+ if (en) { -+ rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, -+ B_S0_HW_SI_DIS_W_R_TRIG, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_S1_HW_SI_DIS, -+ B_S1_HW_SI_DIS_W_R_TRIG, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, phy_idx); -+ if (band == RTW89_BAND_2G) -+ rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 0x0); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 0x1); -+ rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, -+ B_S0_HW_SI_DIS_W_R_TRIG, 0x7, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_S1_HW_SI_DIS, -+ B_S1_HW_SI_DIS_W_R_TRIG, 0x7, phy_idx); -+ fsleep(1); -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 0, phy_idx); -+ } -+} -+ - static void rtw8852b_set_channel_bb(struct rtw89_dev *rtwdev, const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx) - { -@@ -897,6 +921,65 @@ static void rtw8852b_set_channel(struct - rtw8852b_set_channel_rf(rtwdev, chan, phy_idx); - } - -+static void rtw8852b_tssi_cont_en(struct rtw89_dev *rtwdev, bool en, -+ enum rtw89_rf_path path) -+{ -+ static const u32 tssi_trk[2] = {R_P0_TSSI_TRK, R_P1_TSSI_TRK}; -+ static const u32 ctrl_bbrst[2] = {R_P0_TXPW_RSTB, R_P1_TXPW_RSTB}; -+ -+ if (en) { -+ rtw89_phy_write32_mask(rtwdev, ctrl_bbrst[path], B_P0_TXPW_RSTB_MANON, 0x0); -+ rtw89_phy_write32_mask(rtwdev, tssi_trk[path], B_P0_TSSI_TRK_EN, 0x0); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, ctrl_bbrst[path], B_P0_TXPW_RSTB_MANON, 0x1); -+ rtw89_phy_write32_mask(rtwdev, tssi_trk[path], B_P0_TSSI_TRK_EN, 0x1); -+ } -+} -+ -+static void rtw8852b_tssi_cont_en_phyidx(struct rtw89_dev *rtwdev, bool en, -+ u8 phy_idx) -+{ -+ if (!rtwdev->dbcc_en) { -+ rtw8852b_tssi_cont_en(rtwdev, en, RF_PATH_A); -+ rtw8852b_tssi_cont_en(rtwdev, en, RF_PATH_B); -+ } else { -+ if (phy_idx == RTW89_PHY_0) -+ rtw8852b_tssi_cont_en(rtwdev, en, RF_PATH_A); -+ else -+ rtw8852b_tssi_cont_en(rtwdev, en, RF_PATH_B); -+ } -+} -+ -+static void rtw8852b_adc_en(struct rtw89_dev *rtwdev, bool en) -+{ -+ if (en) -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, 0x0); -+ else -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, 0xf); -+} -+ -+static void rtw8852b_set_channel_help(struct rtw89_dev *rtwdev, bool enter, -+ struct rtw89_channel_help_params *p, -+ const struct rtw89_chan *chan, -+ enum rtw89_mac_idx mac_idx, -+ enum rtw89_phy_idx phy_idx) -+{ -+ if (enter) { -+ rtw89_chip_stop_sch_tx(rtwdev, RTW89_MAC_0, &p->tx_en, RTW89_SCH_TX_SEL_ALL); -+ rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false); -+ rtw8852b_tssi_cont_en_phyidx(rtwdev, false, RTW89_PHY_0); -+ rtw8852b_adc_en(rtwdev, false); -+ fsleep(40); -+ rtw8852b_bb_reset_en(rtwdev, chan->band_type, phy_idx, false); -+ } else { -+ rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); -+ rtw8852b_adc_en(rtwdev, true); -+ rtw8852b_tssi_cont_en_phyidx(rtwdev, true, RTW89_PHY_0); -+ rtw8852b_bb_reset_en(rtwdev, chan->band_type, phy_idx, true); -+ rtw89_chip_resume_sch_tx(rtwdev, RTW89_MAC_0, p->tx_en); -+ } -+} -+ - static u32 rtw8852b_bb_cal_txpwr_ref(struct rtw89_dev *rtwdev, - enum rtw89_phy_idx phy_idx, s16 ref) - { -@@ -1143,6 +1226,7 @@ static const struct rtw89_chip_ops rtw88 - .enable_bb_rf = rtw8852b_mac_enable_bb_rf, - .disable_bb_rf = rtw8852b_mac_disable_bb_rf, - .set_channel = rtw8852b_set_channel, -+ .set_channel_help = rtw8852b_set_channel_help, - .read_efuse = rtw8852b_read_efuse, - .read_phycap = rtw8852b_read_phycap, - .power_trim = rtw8852b_power_trim, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-027-wifi-rtw89-8852b-add-power-on-off-functions.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-027-wifi-rtw89-8852b-add-power-on-off-functions.patch deleted file mode 100644 index 201ad1b8d..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-027-wifi-rtw89-8852b-add-power-on-off-functions.patch +++ /dev/null @@ -1,313 +0,0 @@ -From b23b36efbdac603c491197dae1d27a3c5ac4b01c Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sun, 9 Oct 2022 20:53:56 +0800 -Subject: [PATCH 027/149] wifi: rtw89: 8852b: add power on/off functions - -We need power on function to enable hardware circuits of MAC/BB/RF, and -then download firmware and load PHY parameters. After more settings, it -starts to work. When it enters idle, use power off function to have the -lowest power consumption. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221009125403.19662-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.h | 1 + - drivers/net/wireless/realtek/rtw89/reg.h | 18 ++ - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 192 ++++++++++++++++++ - 3 files changed, 211 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -1014,6 +1014,7 @@ enum rtw89_mac_xtal_si_offset { - #define XTAL_SI_PON_EI BIT(1) - #define XTAL_SI_PON_WEI BIT(0) - XTAL_SI_SRAM_CTRL = 0xA1, -+#define XTAL_SI_SRAM_DIS BIT(1) - #define FULL_BIT_MASK GENMASK(7, 0) - }; - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -34,6 +34,9 @@ - #define R_AX_SYS_CLK_CTRL 0x0008 - #define B_AX_CPU_CLK_EN BIT(14) - -+#define R_AX_SYS_SWR_CTRL1 0x0010 -+#define B_AX_SYM_CTRL_SPS_PWMFREQ BIT(10) -+ - #define R_AX_SYS_ADIE_PAD_PWR_CTRL 0x0018 - #define B_AX_SYM_PADPDN_WL_PTA_1P3 BIT(6) - #define B_AX_SYM_PADPDN_WL_RFC_1P3 BIT(5) -@@ -42,6 +45,9 @@ - #define B_AX_R_DIS_PRST BIT(6) - #define B_AX_WLOCK_1C_BIT6 BIT(5) - -+#define R_AX_AFE_LDO_CTRL 0x0020 -+#define B_AX_AON_OFF_PC_EN BIT(23) -+ - #define R_AX_EFUSE_CTRL_1 0x0038 - #define B_AX_EF_PGPD_MASK GENMASK(30, 28) - #define B_AX_EF_RDT BIT(27) -@@ -118,6 +124,9 @@ - #define B_AX_R_AX_BG_LPF BIT(2) - #define B_AX_R_AX_BG GENMASK(1, 0) - -+#define R_AX_HCI_LDO_CTRL 0x007A -+#define B_AX_R_AX_VADJ_MASK GENMASK(3, 0) -+ - #define R_AX_PLATFORM_ENABLE 0x0088 - #define B_AX_AXIDMA_EN BIT(3) - #define B_AX_WCPU_EN BIT(1) -@@ -125,6 +134,7 @@ - - #define R_AX_WLLPS_CTRL 0x0090 - #define B_AX_DIS_WLBT_LPSEN_LOPC BIT(1) -+#define SW_LPS_OPTION 0x0001A0B2 - - #define R_AX_SCOREBOARD 0x00AC - #define B_AX_TOGGLE BIT(31) -@@ -229,6 +239,9 @@ - - #define R_AX_GPIO0_7_FUNC_SEL 0x02D0 - -+#define R_AX_EECS_EESK_FUNC_SEL 0x02D8 -+#define B_AX_PINMUX_EESK_FUNC_SEL_MASK GENMASK(7, 4) -+ - #define R_AX_LED1_FUNC_SEL 0x02DC - #define B_AX_PINMUX_EESK_FUNC_SEL_V1_MASK GENMASK(27, 24) - #define PINMUX_EESK_FUNC_SEL_BT_LOG 0x1 -@@ -253,6 +266,10 @@ - #define B_AX_USB_HCISYS_PWR_STE_MASK GENMASK(3, 2) - #define B_AX_PCIE_HCISYS_PWR_STE_MASK GENMASK(1, 0) - -+#define R_AX_SPS_DIG_OFF_CTRL0 0x0400 -+#define B_AX_C3_L1_MASK GENMASK(5, 4) -+#define B_AX_C1_L1_MASK GENMASK(1, 0) -+ - #define R_AX_AFE_OFF_CTRL1 0x0444 - #define B_AX_S1_LDO_VSEL_F_MASK GENMASK(25, 24) - #define B_AX_S1_LDO2PWRCUT_F BIT(23) -@@ -449,6 +466,7 @@ - #define B_AX_DISPATCHER_EN BIT(18) - #define B_AX_BBRPT_EN BIT(17) - #define B_AX_MAC_SEC_EN BIT(16) -+#define B_AX_DMACREG_GCKEN BIT(15) - #define B_AX_MAC_UN_EN BIT(15) - #define B_AX_H_AXIDMA_EN BIT(14) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -56,6 +56,194 @@ static const struct rtw89_dle_mem rtw885 - NULL}, - }; - -+static int rtw8852b_pwr_on_func(struct rtw89_dev *rtwdev) -+{ -+ u32 val32; -+ u32 ret; -+ -+ rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_AFSM_WLSUS_EN | -+ B_AX_AFSM_PCIE_SUS_EN); -+ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_DIS_WLBT_PDNSUSEN_SOPC); -+ rtw89_write32_set(rtwdev, R_AX_WLLPS_CTRL, B_AX_DIS_WLBT_LPSEN_LOPC); -+ rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APDM_HPDN); -+ rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS); -+ -+ ret = read_poll_timeout(rtw89_read32, val32, val32 & B_AX_RDY_SYSPWR, -+ 1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL); -+ if (ret) -+ return ret; -+ -+ rtw89_write32_set(rtwdev, R_AX_AFE_LDO_CTRL, B_AX_AON_OFF_PC_EN); -+ ret = read_poll_timeout(rtw89_read32, val32, val32 & B_AX_AON_OFF_PC_EN, -+ 1000, 20000, false, rtwdev, R_AX_AFE_LDO_CTRL); -+ if (ret) -+ return ret; -+ -+ rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_OFF_CTRL0, B_AX_C1_L1_MASK, 0x1); -+ rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_OFF_CTRL0, B_AX_C3_L1_MASK, 0x3); -+ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_EN_WLON); -+ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFN_ONMAC); -+ -+ ret = read_poll_timeout(rtw89_read32, val32, !(val32 & B_AX_APFN_ONMAC), -+ 1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL); -+ if (ret) -+ return ret; -+ -+ rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); -+ rtw89_write8_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); -+ rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); -+ rtw89_write8_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); -+ -+ rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); -+ rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, B_AX_PCIE_CALIB_EN_V1); -+ -+ rtw89_write32_set(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_PTA_1P3); -+ -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, -+ XTAL_SI_GND_SHDN_WL, XTAL_SI_GND_SHDN_WL); -+ if (ret) -+ return ret; -+ -+ rtw89_write32_set(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_RFC_1P3); -+ -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, -+ XTAL_SI_SHDN_WL, XTAL_SI_SHDN_WL); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_OFF_WEI, -+ XTAL_SI_OFF_WEI); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_OFF_EI, -+ XTAL_SI_OFF_EI); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_RFC2RF); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_PON_WEI, -+ XTAL_SI_PON_WEI); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_PON_EI, -+ XTAL_SI_PON_EI); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_SRAM2RFC); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_SRAM_CTRL, 0, XTAL_SI_SRAM_DIS); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_XTAL_XMD_2, 0, XTAL_SI_LDO_LPS); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_XTAL_XMD_4, 0, XTAL_SI_LPS_CAP); -+ if (ret) -+ return ret; -+ -+ rtw89_write32_set(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); -+ rtw89_write32_set(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_ISO_EB2CORE); -+ rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B15); -+ -+ fsleep(1000); -+ -+ rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B14); -+ rtw89_write32_clr(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); -+ -+ if (!rtwdev->efuse.valid || rtwdev->efuse.power_k_valid) -+ goto func_en; -+ -+ rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, B_AX_VOL_L1_MASK, 0x9); -+ rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, B_AX_VREFPFM_L_MASK, 0xA); -+ -+ if (rtwdev->hal.cv == CHIP_CBV) { -+ rtw89_write32_set(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); -+ rtw89_write16_mask(rtwdev, R_AX_HCI_LDO_CTRL, B_AX_R_AX_VADJ_MASK, 0xA); -+ rtw89_write32_clr(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); -+ } -+ -+func_en: -+ rtw89_write32_set(rtwdev, R_AX_DMAC_FUNC_EN, -+ B_AX_MAC_FUNC_EN | B_AX_DMAC_FUNC_EN | B_AX_MPDU_PROC_EN | -+ B_AX_WD_RLS_EN | B_AX_DLE_WDE_EN | B_AX_TXPKT_CTRL_EN | -+ B_AX_STA_SCH_EN | B_AX_DLE_PLE_EN | B_AX_PKT_BUF_EN | -+ B_AX_DMAC_TBL_EN | B_AX_PKT_IN_EN | B_AX_DLE_CPUIO_EN | -+ B_AX_DISPATCHER_EN | B_AX_BBRPT_EN | B_AX_MAC_SEC_EN | -+ B_AX_DMACREG_GCKEN); -+ rtw89_write32_set(rtwdev, R_AX_CMAC_FUNC_EN, -+ B_AX_CMAC_EN | B_AX_CMAC_TXEN | B_AX_CMAC_RXEN | -+ B_AX_FORCE_CMACREG_GCKEN | B_AX_PHYINTF_EN | B_AX_CMAC_DMA_EN | -+ B_AX_PTCLTOP_EN | B_AX_SCHEDULER_EN | B_AX_TMAC_EN | -+ B_AX_RMAC_EN); -+ -+ rtw89_write32_mask(rtwdev, R_AX_EECS_EESK_FUNC_SEL, B_AX_PINMUX_EESK_FUNC_SEL_MASK, -+ PINMUX_EESK_FUNC_SEL_BT_LOG); -+ -+ return 0; -+} -+ -+static int rtw8852b_pwr_off_func(struct rtw89_dev *rtwdev) -+{ -+ u32 val32; -+ u32 ret; -+ -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_RFC2RF, -+ XTAL_SI_RFC2RF); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_OFF_EI); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_OFF_WEI); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S0, 0, XTAL_SI_RF00); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S1, 0, XTAL_SI_RF10); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_SRAM2RFC, -+ XTAL_SI_SRAM2RFC); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_PON_EI); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_PON_WEI); -+ if (ret) -+ return ret; -+ -+ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_EN_WLON); -+ rtw89_write8_clr(rtwdev, R_AX_SYS_FUNC_EN, B_AX_FEN_BB_GLB_RSTN | B_AX_FEN_BBRSTB); -+ rtw89_write32_clr(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_RFC_1P3); -+ -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_SHDN_WL); -+ if (ret) -+ return ret; -+ -+ rtw89_write32_clr(rtwdev, R_AX_SYS_ADIE_PAD_PWR_CTRL, B_AX_SYM_PADPDN_WL_PTA_1P3); -+ -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_GND_SHDN_WL); -+ if (ret) -+ return ret; -+ -+ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_OFFMAC); -+ -+ ret = read_poll_timeout(rtw89_read32, val32, !(val32 & B_AX_APFM_OFFMAC), -+ 1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL); -+ if (ret) -+ return ret; -+ -+ rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION); -+ rtw89_write32_set(rtwdev, R_AX_SYS_SWR_CTRL1, B_AX_SYM_CTRL_SPS_PWMFREQ); -+ rtw89_write32_mask(rtwdev, R_AX_SPS_DIG_ON_CTRL0, B_AX_REG_ZCDC_H_MASK, 0x3); -+ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS); -+ -+ return 0; -+} -+ - static void rtw8852be_efuse_parsing(struct rtw89_efuse *efuse, - struct rtw8852b_efuse *map) - { -@@ -1233,6 +1421,8 @@ static const struct rtw89_chip_ops rtw88 - .set_txpwr = rtw8852b_set_txpwr, - .set_txpwr_ctrl = rtw8852b_set_txpwr_ctrl, - .init_txpwr_unit = rtw8852b_init_txpwr_unit, -+ .pwr_on_func = rtw8852b_pwr_on_func, -+ .pwr_off_func = rtw8852b_pwr_off_func, - }; - - const struct rtw89_chip_info rtw8852b_chip_info = { -@@ -1242,6 +1432,8 @@ const struct rtw89_chip_info rtw8852b_ch - .dle_scc_rsvd_size = 98304, - .hfc_param_ini = rtw8852b_hfc_param_ini_pcie, - .dle_mem = rtw8852b_dle_mem_pcie, -+ .pwr_on_seq = NULL, -+ .pwr_off_seq = NULL, - .sec_ctrl_efuse_size = 4, - .physical_efuse_size = 1216, - .logical_efuse_size = 2048, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-028-wifi-rtw89-8852b-add-basic-baseband-chip_ops.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-028-wifi-rtw89-8852b-add-basic-baseband-chip_ops.patch deleted file mode 100644 index 283ffef27..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-028-wifi-rtw89-8852b-add-basic-baseband-chip_ops.patch +++ /dev/null @@ -1,75 +0,0 @@ -From a804479839e1cf502a76c407f3e07135ddbe5032 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sun, 9 Oct 2022 20:53:57 +0800 -Subject: [PATCH 028/149] wifi: rtw89: 8852b: add basic baseband chip_ops - -chip_ops::bb_reset is to reset baseband state after loading parameters, -because its state could be unpredictable at that moment. The other is -chip_ops::bb_sethw that is to set some baseband settings not including in -parameter tables. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221009125403.19662-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 42 +++++++++++++++++++ - 1 file changed, 42 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -1066,6 +1066,46 @@ static void rtw8852b_bb_reset_en(struct - } - } - -+static void rtw8852b_bb_reset(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ rtw89_phy_write32_set(rtwdev, R_P0_TXPW_RSTB, B_P0_TXPW_RSTB_MANON); -+ rtw89_phy_write32_set(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); -+ rtw89_phy_write32_set(rtwdev, R_P1_TXPW_RSTB, B_P1_TXPW_RSTB_MANON); -+ rtw89_phy_write32_set(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_TRK_EN); -+ rtw8852b_bb_reset_all(rtwdev, phy_idx); -+ rtw89_phy_write32_clr(rtwdev, R_P0_TXPW_RSTB, B_P0_TXPW_RSTB_MANON); -+ rtw89_phy_write32_clr(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); -+ rtw89_phy_write32_clr(rtwdev, R_P1_TXPW_RSTB, B_P1_TXPW_RSTB_MANON); -+ rtw89_phy_write32_clr(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_TRK_EN); -+} -+ -+static void rtw8852b_bb_macid_ctrl_init(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ u32 addr; -+ -+ for (addr = R_AX_PWR_MACID_LMT_TABLE0; -+ addr <= R_AX_PWR_MACID_LMT_TABLE127; addr += 4) -+ rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, 0); -+} -+ -+static void rtw8852b_bb_sethw(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; -+ -+ rtw89_phy_write32_clr(rtwdev, R_P0_EN_SOUND_WO_NDP, B_P0_EN_SOUND_WO_NDP); -+ rtw89_phy_write32_clr(rtwdev, R_P1_EN_SOUND_WO_NDP, B_P1_EN_SOUND_WO_NDP); -+ -+ rtw8852b_bb_macid_ctrl_init(rtwdev, RTW89_PHY_0); -+ -+ /* read these registers after loading BB parameters */ -+ gain->offset_base[RTW89_PHY_0] = -+ rtw89_phy_read32_mask(rtwdev, R_P0_RPL1, B_P0_RPL1_BIAS_MASK); -+ gain->rssi_base[RTW89_PHY_0] = -+ rtw89_phy_read32_mask(rtwdev, R_P1_RPL1, B_P0_RPL1_BIAS_MASK); -+} -+ - static void rtw8852b_set_channel_bb(struct rtw89_dev *rtwdev, const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx) - { -@@ -1413,6 +1453,8 @@ static int rtw8852b_mac_disable_bb_rf(st - static const struct rtw89_chip_ops rtw8852b_chip_ops = { - .enable_bb_rf = rtw8852b_mac_enable_bb_rf, - .disable_bb_rf = rtw8852b_mac_disable_bb_rf, -+ .bb_reset = rtw8852b_bb_reset, -+ .bb_sethw = rtw8852b_bb_sethw, - .set_channel = rtw8852b_set_channel, - .set_channel_help = rtw8852b_set_channel_help, - .read_efuse = rtw8852b_read_efuse, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-029-wifi-rtw89-8852b-add-chip_ops-to-get-thermal.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-029-wifi-rtw89-8852b-add-chip_ops-to-get-thermal.patch deleted file mode 100644 index 9c6e0ce4e..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-029-wifi-rtw89-8852b-add-chip_ops-to-get-thermal.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 8f88474ce3eca2dd8fb4e08d4b6ab71e76312e3e Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sun, 9 Oct 2022 20:53:58 +0800 -Subject: [PATCH 029/149] wifi: rtw89: 8852b: add chip_ops to get thermal - -Thermal value reflects temperature that will affect RF performance, so -we re-calibrate RF characteristics if delta of thermal over a threshold. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221009125403.19662-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 18 ++++++++++++++++++ - 1 file changed, 18 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -1397,6 +1397,23 @@ rtw8852b_init_txpwr_unit(struct rtw89_de - return 0; - } - -+static u8 rtw8852b_get_thermal(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path) -+{ -+ if (rtwdev->is_tssi_mode[rf_path]) { -+ u32 addr = 0x1c10 + (rf_path << 13); -+ -+ return rtw89_phy_read32_mask(rtwdev, addr, 0x3F000000); -+ } -+ -+ rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x1); -+ rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x0); -+ rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x1); -+ -+ fsleep(200); -+ -+ return rtw89_read_rf(rtwdev, rf_path, RR_TM, RR_TM_VAL); -+} -+ - static int rtw8852b_mac_enable_bb_rf(struct rtw89_dev *rtwdev) - { - int ret; -@@ -1463,6 +1480,7 @@ static const struct rtw89_chip_ops rtw88 - .set_txpwr = rtw8852b_set_txpwr, - .set_txpwr_ctrl = rtw8852b_set_txpwr_ctrl, - .init_txpwr_unit = rtw8852b_init_txpwr_unit, -+ .get_thermal = rtw8852b_get_thermal, - .pwr_on_func = rtw8852b_pwr_on_func, - .pwr_off_func = rtw8852b_pwr_off_func, - }; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-030-wifi-rtw89-8852b-add-chip_ops-related-to-BT-coexiste.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-030-wifi-rtw89-8852b-add-chip_ops-related-to-BT-coexiste.patch deleted file mode 100644 index 50910559b..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-030-wifi-rtw89-8852b-add-chip_ops-related-to-BT-coexiste.patch +++ /dev/null @@ -1,365 +0,0 @@ -From 98bf0ddf20fc2d70d11f1af6e041ee4fad1392ac Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sun, 9 Oct 2022 20:53:59 +0800 -Subject: [PATCH 030/149] wifi: rtw89: 8852b: add chip_ops related to BT - coexistence - -These chip_ops are used to assist BT coexistence module to control chip -specific operations, such as initial, pre-AGC, BT grant, set wifi priority -and tx power, RX gain, and get BT counter. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221009125403.19662-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 305 ++++++++++++++++++ - 2 files changed, 306 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3151,6 +3151,7 @@ - #define BTC_BREAK_PARAM 0xf0ffffff - - #define R_BTC_BT_COEX_MSK_TABLE 0xDA30 -+#define B_BTC_PRI_MASK_RXCCK_V1 BIT(28) - #define B_BTC_PRI_MASK_TX_RESP_V1 BIT(3) - - #define R_AX_BT_COEX_CFG_2 0xDA34 ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -56,6 +56,44 @@ static const struct rtw89_dle_mem rtw885 - NULL}, - }; - -+static const struct rtw89_reg3_def rtw8852b_btc_preagc_en_defs[] = { -+ {0x46D0, GENMASK(1, 0), 0x3}, -+ {0x4790, GENMASK(1, 0), 0x3}, -+ {0x4AD4, GENMASK(31, 0), 0xf}, -+ {0x4AE0, GENMASK(31, 0), 0xf}, -+ {0x4688, GENMASK(31, 24), 0x80}, -+ {0x476C, GENMASK(31, 24), 0x80}, -+ {0x4694, GENMASK(7, 0), 0x80}, -+ {0x4694, GENMASK(15, 8), 0x80}, -+ {0x4778, GENMASK(7, 0), 0x80}, -+ {0x4778, GENMASK(15, 8), 0x80}, -+ {0x4AE4, GENMASK(23, 0), 0x780D1E}, -+ {0x4AEC, GENMASK(23, 0), 0x780D1E}, -+ {0x469C, GENMASK(31, 26), 0x34}, -+ {0x49F0, GENMASK(31, 26), 0x34}, -+}; -+ -+static DECLARE_PHY_REG3_TBL(rtw8852b_btc_preagc_en_defs); -+ -+static const struct rtw89_reg3_def rtw8852b_btc_preagc_dis_defs[] = { -+ {0x46D0, GENMASK(1, 0), 0x0}, -+ {0x4790, GENMASK(1, 0), 0x0}, -+ {0x4AD4, GENMASK(31, 0), 0x60}, -+ {0x4AE0, GENMASK(31, 0), 0x60}, -+ {0x4688, GENMASK(31, 24), 0x1a}, -+ {0x476C, GENMASK(31, 24), 0x1a}, -+ {0x4694, GENMASK(7, 0), 0x2a}, -+ {0x4694, GENMASK(15, 8), 0x2a}, -+ {0x4778, GENMASK(7, 0), 0x2a}, -+ {0x4778, GENMASK(15, 8), 0x2a}, -+ {0x4AE4, GENMASK(23, 0), 0x79E99E}, -+ {0x4AEC, GENMASK(23, 0), 0x79E99E}, -+ {0x469C, GENMASK(31, 26), 0x26}, -+ {0x49F0, GENMASK(31, 26), 0x26}, -+}; -+ -+static DECLARE_PHY_REG3_TBL(rtw8852b_btc_preagc_dis_defs); -+ - static int rtw8852b_pwr_on_func(struct rtw89_dev *rtwdev) - { - u32 val32; -@@ -1397,6 +1435,55 @@ rtw8852b_init_txpwr_unit(struct rtw89_de - return 0; - } - -+static void rtw8852b_bb_ctrl_btc_preagc(struct rtw89_dev *rtwdev, bool bt_en) -+{ -+ rtw89_phy_write_reg3_tbl(rtwdev, bt_en ? &rtw8852b_btc_preagc_en_defs_tbl : -+ &rtw8852b_btc_preagc_dis_defs_tbl); -+} -+ -+static void rtw8852b_ctrl_btg(struct rtw89_dev *rtwdev, bool btg) -+{ -+ if (btg) { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_BT_SHARE_V1, -+ B_PATH0_BT_SHARE_V1, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_BTG_PATH_V1, -+ B_PATH0_BTG_PATH_V1, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_G_LNA6_OP1DB_V1, -+ B_PATH1_G_LNA6_OP1DB_V1, 0x20); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_G_TIA0_LNA6_OP1DB_V1, -+ B_PATH1_G_TIA0_LNA6_OP1DB_V1, 0x30); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_BT_SHARE_V1, -+ B_PATH1_BT_SHARE_V1, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_BTG_PATH_V1, -+ B_PATH1_BTG_PATH_V1, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PMAC_GNT, B_PMAC_GNT_P1, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD_V1, B_BT_SHARE, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_BT_SEG0, 0x2); -+ rtw89_phy_write32_mask(rtwdev, R_BT_DYN_DC_EST_EN_V1, -+ B_BT_DYN_DC_EST_EN_MSK, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_GNT_BT_WGT_EN, B_GNT_BT_WGT_EN, 0x1); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_BT_SHARE_V1, -+ B_PATH0_BT_SHARE_V1, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_BTG_PATH_V1, -+ B_PATH0_BTG_PATH_V1, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_G_LNA6_OP1DB_V1, -+ B_PATH1_G_LNA6_OP1DB_V1, 0x1a); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_G_TIA0_LNA6_OP1DB_V1, -+ B_PATH1_G_TIA0_LNA6_OP1DB_V1, 0x2a); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_BT_SHARE_V1, -+ B_PATH1_BT_SHARE_V1, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_BTG_PATH_V1, -+ B_PATH1_BTG_PATH_V1, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PMAC_GNT, B_PMAC_GNT_P1, 0xc); -+ rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD_V1, B_BT_SHARE, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_BT_SEG0, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_BT_DYN_DC_EST_EN_V1, -+ B_BT_DYN_DC_EST_EN_MSK, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_GNT_BT_WGT_EN, B_GNT_BT_WGT_EN, 0x0); -+ } -+} -+ - static u8 rtw8852b_get_thermal(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path) - { - if (rtwdev->is_tssi_mode[rf_path]) { -@@ -1414,6 +1501,212 @@ static u8 rtw8852b_get_thermal(struct rt - return rtw89_read_rf(rtwdev, rf_path, RR_TM, RR_TM_VAL); - } - -+static void rtw8852b_btc_set_rfe(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_module *module = &btc->mdinfo; -+ -+ module->rfe_type = rtwdev->efuse.rfe_type; -+ module->cv = rtwdev->hal.cv; -+ module->bt_solo = 0; -+ module->switch_type = BTC_SWITCH_INTERNAL; -+ -+ if (module->rfe_type > 0) -+ module->ant.num = module->rfe_type % 2 ? 2 : 3; -+ else -+ module->ant.num = 2; -+ -+ module->ant.diversity = 0; -+ module->ant.isolation = 10; -+ -+ if (module->ant.num == 3) { -+ module->ant.type = BTC_ANT_DEDICATED; -+ module->bt_pos = BTC_BT_ALONE; -+ } else { -+ module->ant.type = BTC_ANT_SHARED; -+ module->bt_pos = BTC_BT_BTG; -+ } -+} -+ -+static -+void rtw8852b_set_trx_mask(struct rtw89_dev *rtwdev, u8 path, u8 group, u32 val) -+{ -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x20000); -+ rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, group); -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, val); -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x0); -+} -+ -+static void rtw8852b_btc_init_cfg(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_module *module = &btc->mdinfo; -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ const struct rtw89_mac_ax_coex coex_params = { -+ .pta_mode = RTW89_MAC_AX_COEX_RTK_MODE, -+ .direction = RTW89_MAC_AX_COEX_INNER, -+ }; -+ -+ /* PTA init */ -+ rtw89_mac_coex_init(rtwdev, &coex_params); -+ -+ /* set WL Tx response = Hi-Pri */ -+ chip->ops->btc_set_wl_pri(rtwdev, BTC_PRI_MASK_TX_RESP, true); -+ chip->ops->btc_set_wl_pri(rtwdev, BTC_PRI_MASK_BEACON, true); -+ -+ /* set rf gnt debug off */ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_WLSEL, RFREG_MASK, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_WLSEL, RFREG_MASK, 0x0); -+ -+ /* set WL Tx thru in TRX mask table if GNT_WL = 0 && BT_S1 = ss group */ -+ if (module->ant.type == BTC_ANT_SHARED) { -+ rtw8852b_set_trx_mask(rtwdev, RF_PATH_A, BTC_BT_SS_GROUP, 0x5ff); -+ rtw8852b_set_trx_mask(rtwdev, RF_PATH_B, BTC_BT_SS_GROUP, 0x5ff); -+ /* set path-A(S0) Tx/Rx no-mask if GNT_WL=0 && BT_S1=tx group */ -+ rtw8852b_set_trx_mask(rtwdev, RF_PATH_A, BTC_BT_TX_GROUP, 0x5ff); -+ rtw8852b_set_trx_mask(rtwdev, RF_PATH_B, BTC_BT_TX_GROUP, 0x55f); -+ } else { /* set WL Tx stb if GNT_WL = 0 && BT_S1 = ss group for 3-ant */ -+ rtw8852b_set_trx_mask(rtwdev, RF_PATH_A, BTC_BT_SS_GROUP, 0x5df); -+ rtw8852b_set_trx_mask(rtwdev, RF_PATH_B, BTC_BT_SS_GROUP, 0x5df); -+ rtw8852b_set_trx_mask(rtwdev, RF_PATH_A, BTC_BT_TX_GROUP, 0x5ff); -+ rtw8852b_set_trx_mask(rtwdev, RF_PATH_B, BTC_BT_TX_GROUP, 0x5ff); -+ } -+ -+ /* set PTA break table */ -+ rtw89_write32(rtwdev, R_BTC_BREAK_TABLE, BTC_BREAK_PARAM); -+ -+ /* enable BT counter 0xda40[16,2] = 2b'11 */ -+ rtw89_write32_set(rtwdev, R_AX_CSR_MODE, B_AX_BT_CNT_RST | B_AX_STATIS_BT_EN); -+ btc->cx.wl.status.map.init_ok = true; -+} -+ -+static -+void rtw8852b_btc_set_wl_pri(struct rtw89_dev *rtwdev, u8 map, bool state) -+{ -+ u32 bitmap; -+ u32 reg; -+ -+ switch (map) { -+ case BTC_PRI_MASK_TX_RESP: -+ reg = R_BTC_BT_COEX_MSK_TABLE; -+ bitmap = B_BTC_PRI_MASK_TX_RESP_V1; -+ break; -+ case BTC_PRI_MASK_BEACON: -+ reg = R_AX_WL_PRI_MSK; -+ bitmap = B_AX_PTA_WL_PRI_MASK_BCNQ; -+ break; -+ case BTC_PRI_MASK_RX_CCK: -+ reg = R_BTC_BT_COEX_MSK_TABLE; -+ bitmap = B_BTC_PRI_MASK_RXCCK_V1; -+ break; -+ default: -+ return; -+ } -+ -+ if (state) -+ rtw89_write32_set(rtwdev, reg, bitmap); -+ else -+ rtw89_write32_clr(rtwdev, reg, bitmap); -+} -+ -+union rtw8852b_btc_wl_txpwr_ctrl { -+ u32 txpwr_val; -+ struct { -+ union { -+ u16 ctrl_all_time; -+ struct { -+ s16 data:9; -+ u16 rsvd:6; -+ u16 flag:1; -+ } all_time; -+ }; -+ union { -+ u16 ctrl_gnt_bt; -+ struct { -+ s16 data:9; -+ u16 rsvd:7; -+ } gnt_bt; -+ }; -+ }; -+} __packed; -+ -+static void -+rtw8852b_btc_set_wl_txpwr_ctrl(struct rtw89_dev *rtwdev, u32 txpwr_val) -+{ -+ union rtw8852b_btc_wl_txpwr_ctrl arg = { .txpwr_val = txpwr_val }; -+ s32 val; -+ -+#define __write_ctrl(_reg, _msk, _val, _en, _cond) \ -+do { \ -+ u32 _wrt = FIELD_PREP(_msk, _val); \ -+ BUILD_BUG_ON(!!(_msk & _en)); \ -+ if (_cond) \ -+ _wrt |= _en; \ -+ else \ -+ _wrt &= ~_en; \ -+ rtw89_mac_txpwr_write32_mask(rtwdev, RTW89_PHY_0, _reg, \ -+ _msk | _en, _wrt); \ -+} while (0) -+ -+ switch (arg.ctrl_all_time) { -+ case 0xffff: -+ val = 0; -+ break; -+ default: -+ val = arg.all_time.data; -+ break; -+ } -+ -+ __write_ctrl(R_AX_PWR_RATE_CTRL, B_AX_FORCE_PWR_BY_RATE_VALUE_MASK, -+ val, B_AX_FORCE_PWR_BY_RATE_EN, -+ arg.ctrl_all_time != 0xffff); -+ -+ switch (arg.ctrl_gnt_bt) { -+ case 0xffff: -+ val = 0; -+ break; -+ default: -+ val = arg.gnt_bt.data; -+ break; -+ } -+ -+ __write_ctrl(R_AX_PWR_COEXT_CTRL, B_AX_TXAGC_BT_MASK, val, -+ B_AX_TXAGC_BT_EN, arg.ctrl_gnt_bt != 0xffff); -+ -+#undef __write_ctrl -+} -+ -+static -+s8 rtw8852b_btc_get_bt_rssi(struct rtw89_dev *rtwdev, s8 val) -+{ -+ return clamp_t(s8, val, -100, 0) + 100; -+} -+ -+static -+void rtw8852b_btc_update_bt_cnt(struct rtw89_dev *rtwdev) -+{ -+ /* Feature move to firmware */ -+} -+ -+static void rtw8852b_btc_wl_s1_standby(struct rtw89_dev *rtwdev, bool state) -+{ -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x80000); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x1); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD1, RFREG_MASK, 0x31); -+ -+ /* set WL standby = Rx for GNT_BT_Tx = 1->0 settle issue */ -+ if (state) -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x579); -+ else -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x20); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x0); -+} -+ -+static void rtw8852b_btc_set_wl_rx_gain(struct rtw89_dev *rtwdev, u32 level) -+{ -+} -+ - static int rtw8852b_mac_enable_bb_rf(struct rtw89_dev *rtwdev) - { - int ret; -@@ -1481,8 +1774,20 @@ static const struct rtw89_chip_ops rtw88 - .set_txpwr_ctrl = rtw8852b_set_txpwr_ctrl, - .init_txpwr_unit = rtw8852b_init_txpwr_unit, - .get_thermal = rtw8852b_get_thermal, -+ .ctrl_btg = rtw8852b_ctrl_btg, -+ .bb_ctrl_btc_preagc = rtw8852b_bb_ctrl_btc_preagc, - .pwr_on_func = rtw8852b_pwr_on_func, - .pwr_off_func = rtw8852b_pwr_off_func, -+ -+ .btc_set_rfe = rtw8852b_btc_set_rfe, -+ .btc_init_cfg = rtw8852b_btc_init_cfg, -+ .btc_set_wl_pri = rtw8852b_btc_set_wl_pri, -+ .btc_set_wl_txpwr_ctrl = rtw8852b_btc_set_wl_txpwr_ctrl, -+ .btc_get_bt_rssi = rtw8852b_btc_get_bt_rssi, -+ .btc_update_bt_cnt = rtw8852b_btc_update_bt_cnt, -+ .btc_wl_s1_standby = rtw8852b_btc_wl_s1_standby, -+ .btc_set_wl_rx_gain = rtw8852b_btc_set_wl_rx_gain, -+ .btc_set_policy = rtw89_btc_set_policy, - }; - - const struct rtw89_chip_info rtw8852b_chip_info = { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-031-wifi-rtw89-8852b-add-chip_ops-to-query-PPDU.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-031-wifi-rtw89-8852b-add-chip_ops-to-query-PPDU.patch deleted file mode 100644 index 58694e18d..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-031-wifi-rtw89-8852b-add-chip_ops-to-query-PPDU.patch +++ /dev/null @@ -1,62 +0,0 @@ -From bf958f76cf97663d79b4f90a08d38c5b9bb56082 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sun, 9 Oct 2022 20:54:00 +0800 -Subject: [PATCH 031/149] wifi: rtw89: 8852b: add chip_ops to query PPDU - -Add to parse PPDU to get frequency and RSSI of received packets. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221009125403.19662-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 32 +++++++++++++++++++ - 1 file changed, 32 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -1707,6 +1707,37 @@ static void rtw8852b_btc_set_wl_rx_gain( - { - } - -+static void rtw8852b_fill_freq_with_ppdu(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu, -+ struct ieee80211_rx_status *status) -+{ -+ u16 chan = phy_ppdu->chan_idx; -+ u8 band; -+ -+ if (chan == 0) -+ return; -+ -+ band = chan <= 14 ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ; -+ status->freq = ieee80211_channel_to_frequency(chan, band); -+ status->band = band; -+} -+ -+static void rtw8852b_query_ppdu(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu, -+ struct ieee80211_rx_status *status) -+{ -+ u8 path; -+ u8 *rx_power = phy_ppdu->rssi; -+ -+ status->signal = RTW89_RSSI_RAW_TO_DBM(max(rx_power[RF_PATH_A], rx_power[RF_PATH_B])); -+ for (path = 0; path < rtwdev->chip->rf_path_num; path++) { -+ status->chains |= BIT(path); -+ status->chain_signal[path] = RTW89_RSSI_RAW_TO_DBM(rx_power[path]); -+ } -+ if (phy_ppdu->valid) -+ rtw8852b_fill_freq_with_ppdu(rtwdev, phy_ppdu, status); -+} -+ - static int rtw8852b_mac_enable_bb_rf(struct rtw89_dev *rtwdev) - { - int ret; -@@ -1775,6 +1806,7 @@ static const struct rtw89_chip_ops rtw88 - .init_txpwr_unit = rtw8852b_init_txpwr_unit, - .get_thermal = rtw8852b_get_thermal, - .ctrl_btg = rtw8852b_ctrl_btg, -+ .query_ppdu = rtw8852b_query_ppdu, - .bb_ctrl_btc_preagc = rtw8852b_bb_ctrl_btc_preagc, - .pwr_on_func = rtw8852b_pwr_on_func, - .pwr_off_func = rtw8852b_pwr_off_func, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-032-wifi-rtw89-8852b-add-chip_ops-to-configure-TX-RX-pat.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-032-wifi-rtw89-8852b-add-chip_ops-to-configure-TX-RX-pat.patch deleted file mode 100644 index 70bf8a4c6..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-032-wifi-rtw89-8852b-add-chip_ops-to-configure-TX-RX-pat.patch +++ /dev/null @@ -1,176 +0,0 @@ -From 8915a256538d0e81fe02c5f68368e5787df261d5 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sun, 9 Oct 2022 20:54:01 +0800 -Subject: [PATCH 032/149] wifi: rtw89: 8852b: add chip_ops to configure TX/RX - path - -To support variant models, such as 1x1 or 1T2R, we need this chip_ops to -change the path accordingly. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221009125403.19662-8-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 4 + - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 112 ++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/rtw8852b.h | 3 + - 3 files changed, 119 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3668,6 +3668,8 @@ - #define B_P0_RFMODE_MUX GENMASK(11, 4) - #define R_P0_RFMODE_ORI_RX 0x12AC - #define B_P0_RFMODE_ORI_RX_ALL GENMASK(23, 12) -+#define R_P0_RFMODE_FTM_RX 0x12B0 -+#define B_P0_RFMODE_FTM_RX GENMASK(11, 0) - #define R_P0_NRBW 0x12B8 - #define B_P0_NRBW_DBG BIT(30) - #define R_S0_RXDC 0x12D4 -@@ -3781,6 +3783,8 @@ - #define B_P1_RFMODE_MUX GENMASK(11, 4) - #define R_P1_RFMODE_ORI_RX 0x32AC - #define B_P1_RFMODE_ORI_RX_ALL GENMASK(23, 12) -+#define R_P1_RFMODE_FTM_RX 0x32B0 -+#define B_P1_RFMODE_FTM_RX GENMASK(11, 0) - #define R_P1_DBGMOD 0x32B8 - #define B_P1_DBGMOD_ON BIT(30) - #define R_S1_RXDC 0x32D4 ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -1484,6 +1484,117 @@ static void rtw8852b_ctrl_btg(struct rtw - } - } - -+void rtw8852b_bb_ctrl_rx_path(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path_bit rx_path) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u32 rst_mask0; -+ u32 rst_mask1; -+ -+ if (rx_path == RF_A) { -+ rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD_V1, B_ANT_RX_SEG0, 1); -+ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_1RCCA_SEG0, 1); -+ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_1RCCA_SEG1, 1); -+ rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, B_RXHT_MCS_LIMIT, 0); -+ rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, B_RXVHT_MCS_LIMIT, 0); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_USER_MAX, 4); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, 0); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, 0); -+ } else if (rx_path == RF_B) { -+ rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD_V1, B_ANT_RX_SEG0, 2); -+ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_1RCCA_SEG0, 2); -+ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_1RCCA_SEG1, 2); -+ rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, B_RXHT_MCS_LIMIT, 0); -+ rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, B_RXVHT_MCS_LIMIT, 0); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_USER_MAX, 4); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, 0); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, 0); -+ } else if (rx_path == RF_AB) { -+ rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD_V1, B_ANT_RX_SEG0, 3); -+ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_1RCCA_SEG0, 3); -+ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_1RCCA_SEG1, 3); -+ rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, B_RXHT_MCS_LIMIT, 1); -+ rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, B_RXVHT_MCS_LIMIT, 1); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_USER_MAX, 4); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, 1); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, 1); -+ } -+ -+ rtw8852b_set_gain_offset(rtwdev, chan->subband_type, RTW89_PHY_0); -+ -+ if (chan->band_type == RTW89_BAND_2G && -+ (rx_path == RF_B || rx_path == RF_AB)) -+ rtw8852b_ctrl_btg(rtwdev, true); -+ else -+ rtw8852b_ctrl_btg(rtwdev, false); -+ -+ rst_mask0 = B_P0_TXPW_RSTB_MANON | B_P0_TXPW_RSTB_TSSI; -+ rst_mask1 = B_P1_TXPW_RSTB_MANON | B_P1_TXPW_RSTB_TSSI; -+ if (rx_path == RF_A) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, rst_mask0, 1); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, rst_mask0, 3); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, rst_mask1, 1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TXPW_RSTB, rst_mask1, 3); -+ } -+} -+ -+static void rtw8852b_bb_ctrl_rf_mode_rx_path(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path_bit rx_path) -+{ -+ if (rx_path == RF_A) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFMODE, -+ B_P0_RFMODE_ORI_TXRX_FTM_TX, 0x1233312); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFMODE_FTM_RX, -+ B_P0_RFMODE_FTM_RX, 0x333); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RFMODE, -+ B_P1_RFMODE_ORI_TXRX_FTM_TX, 0x1111111); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RFMODE_FTM_RX, -+ B_P1_RFMODE_FTM_RX, 0x111); -+ } else if (rx_path == RF_B) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFMODE, -+ B_P0_RFMODE_ORI_TXRX_FTM_TX, 0x1111111); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFMODE_FTM_RX, -+ B_P0_RFMODE_FTM_RX, 0x111); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RFMODE, -+ B_P1_RFMODE_ORI_TXRX_FTM_TX, 0x1233312); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RFMODE_FTM_RX, -+ B_P1_RFMODE_FTM_RX, 0x333); -+ } else if (rx_path == RF_AB) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFMODE, -+ B_P0_RFMODE_ORI_TXRX_FTM_TX, 0x1233312); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFMODE_FTM_RX, -+ B_P0_RFMODE_FTM_RX, 0x333); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RFMODE, -+ B_P1_RFMODE_ORI_TXRX_FTM_TX, 0x1233312); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RFMODE_FTM_RX, -+ B_P1_RFMODE_FTM_RX, 0x333); -+ } -+} -+ -+static void rtw8852b_bb_cfg_txrx_path(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_hal *hal = &rtwdev->hal; -+ enum rtw89_rf_path_bit rx_path = hal->antenna_rx ? hal->antenna_rx : RF_AB; -+ -+ rtw8852b_bb_ctrl_rx_path(rtwdev, rx_path); -+ rtw8852b_bb_ctrl_rf_mode_rx_path(rtwdev, rx_path); -+ -+ if (rtwdev->hal.rx_nss == 1) { -+ rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, B_RXHT_MCS_LIMIT, 0); -+ rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, B_RXVHT_MCS_LIMIT, 0); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, 0); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, 0); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, B_RXHT_MCS_LIMIT, 1); -+ rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, B_RXVHT_MCS_LIMIT, 1); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, 1); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, 1); -+ } -+ -+ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 0x0, RTW89_PHY_0); -+} -+ - static u8 rtw8852b_get_thermal(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path) - { - if (rtwdev->is_tssi_mode[rf_path]) { -@@ -1808,6 +1919,7 @@ static const struct rtw89_chip_ops rtw88 - .ctrl_btg = rtw8852b_ctrl_btg, - .query_ppdu = rtw8852b_query_ppdu, - .bb_ctrl_btc_preagc = rtw8852b_bb_ctrl_btc_preagc, -+ .cfg_txrx_path = rtw8852b_bb_cfg_txrx_path, - .pwr_on_func = rtw8852b_pwr_on_func, - .pwr_off_func = rtw8852b_pwr_off_func, - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.h -@@ -87,4 +87,7 @@ struct rtw8852b_efuse { - - extern const struct rtw89_chip_info rtw8852b_chip_info; - -+void rtw8852b_bb_ctrl_rx_path(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path_bit rx_path); -+ - #endif diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-033-wifi-rtw89-8852b-add-functions-to-control-BB-to-assi.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-033-wifi-rtw89-8852b-add-functions-to-control-BB-to-assi.patch deleted file mode 100644 index 1133e9fc5..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-033-wifi-rtw89-8852b-add-functions-to-control-BB-to-assi.patch +++ /dev/null @@ -1,388 +0,0 @@ -From 572fd2ab377b123e52b442d015f9605409a21ad9 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sun, 9 Oct 2022 20:54:02 +0800 -Subject: [PATCH 033/149] wifi: rtw89: 8852b: add functions to control BB to - assist RF calibrations - -When we are going to do RF calibrations, they need BB helpers to control -TX PLCP, power, path and mode. Also, it they need helpers to backup and -restore some registers before and after RF calibrations. Then, use flow of -RF calibrations will be like backup registers, configure calibration, -configure TX parameters, measure calibration result, and finally restore -registers. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221009125403.19662-9-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 288 ++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/rtw8852b.h | 44 +++ - 2 files changed, 332 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -56,6 +56,129 @@ static const struct rtw89_dle_mem rtw885 - NULL}, - }; - -+static const struct rtw89_reg3_def rtw8852b_pmac_ht20_mcs7_tbl[] = { -+ {0x4580, 0x0000ffff, 0x0}, -+ {0x4580, 0xffff0000, 0x0}, -+ {0x4584, 0x0000ffff, 0x0}, -+ {0x4584, 0xffff0000, 0x0}, -+ {0x4580, 0x0000ffff, 0x1}, -+ {0x4578, 0x00ffffff, 0x2018b}, -+ {0x4570, 0x03ffffff, 0x7}, -+ {0x4574, 0x03ffffff, 0x32407}, -+ {0x45b8, 0x00000010, 0x0}, -+ {0x45b8, 0x00000100, 0x0}, -+ {0x45b8, 0x00000080, 0x0}, -+ {0x45b8, 0x00000008, 0x0}, -+ {0x45a0, 0x0000ff00, 0x0}, -+ {0x45a0, 0xff000000, 0x1}, -+ {0x45a4, 0x0000ff00, 0x2}, -+ {0x45a4, 0xff000000, 0x3}, -+ {0x45b8, 0x00000020, 0x0}, -+ {0x4568, 0xe0000000, 0x0}, -+ {0x45b8, 0x00000002, 0x1}, -+ {0x456c, 0xe0000000, 0x0}, -+ {0x45b4, 0x00006000, 0x0}, -+ {0x45b4, 0x00001800, 0x1}, -+ {0x45b8, 0x00000040, 0x0}, -+ {0x45b8, 0x00000004, 0x0}, -+ {0x45b8, 0x00000200, 0x0}, -+ {0x4598, 0xf8000000, 0x0}, -+ {0x45b8, 0x00100000, 0x0}, -+ {0x45a8, 0x00000fc0, 0x0}, -+ {0x45b8, 0x00200000, 0x0}, -+ {0x45b0, 0x00000038, 0x0}, -+ {0x45b0, 0x000001c0, 0x0}, -+ {0x45a0, 0x000000ff, 0x0}, -+ {0x45b8, 0x00400000, 0x0}, -+ {0x4590, 0x000007ff, 0x0}, -+ {0x45b0, 0x00000e00, 0x0}, -+ {0x45ac, 0x0000001f, 0x0}, -+ {0x45b8, 0x00800000, 0x0}, -+ {0x45a8, 0x0003f000, 0x0}, -+ {0x45b8, 0x01000000, 0x0}, -+ {0x45b0, 0x00007000, 0x0}, -+ {0x45b0, 0x00038000, 0x0}, -+ {0x45a0, 0x00ff0000, 0x0}, -+ {0x45b8, 0x02000000, 0x0}, -+ {0x4590, 0x003ff800, 0x0}, -+ {0x45b0, 0x001c0000, 0x0}, -+ {0x45ac, 0x000003e0, 0x0}, -+ {0x45b8, 0x04000000, 0x0}, -+ {0x45a8, 0x00fc0000, 0x0}, -+ {0x45b8, 0x08000000, 0x0}, -+ {0x45b0, 0x00e00000, 0x0}, -+ {0x45b0, 0x07000000, 0x0}, -+ {0x45a4, 0x000000ff, 0x0}, -+ {0x45b8, 0x10000000, 0x0}, -+ {0x4594, 0x000007ff, 0x0}, -+ {0x45b0, 0x38000000, 0x0}, -+ {0x45ac, 0x00007c00, 0x0}, -+ {0x45b8, 0x20000000, 0x0}, -+ {0x45a8, 0x3f000000, 0x0}, -+ {0x45b8, 0x40000000, 0x0}, -+ {0x45b4, 0x00000007, 0x0}, -+ {0x45b4, 0x00000038, 0x0}, -+ {0x45a4, 0x00ff0000, 0x0}, -+ {0x45b8, 0x80000000, 0x0}, -+ {0x4594, 0x003ff800, 0x0}, -+ {0x45b4, 0x000001c0, 0x0}, -+ {0x4598, 0xf8000000, 0x0}, -+ {0x45b8, 0x00100000, 0x0}, -+ {0x45a8, 0x00000fc0, 0x7}, -+ {0x45b8, 0x00200000, 0x0}, -+ {0x45b0, 0x00000038, 0x0}, -+ {0x45b0, 0x000001c0, 0x0}, -+ {0x45a0, 0x000000ff, 0x0}, -+ {0x45b4, 0x06000000, 0x0}, -+ {0x45b0, 0x00000007, 0x0}, -+ {0x45b8, 0x00080000, 0x0}, -+ {0x45a8, 0x0000003f, 0x0}, -+ {0x457c, 0xffe00000, 0x1}, -+ {0x4530, 0xffffffff, 0x0}, -+ {0x4588, 0x00003fff, 0x0}, -+ {0x4598, 0x000001ff, 0x0}, -+ {0x4534, 0xffffffff, 0x0}, -+ {0x4538, 0xffffffff, 0x0}, -+ {0x453c, 0xffffffff, 0x0}, -+ {0x4588, 0x0fffc000, 0x0}, -+ {0x4598, 0x0003fe00, 0x0}, -+ {0x4540, 0xffffffff, 0x0}, -+ {0x4544, 0xffffffff, 0x0}, -+ {0x4548, 0xffffffff, 0x0}, -+ {0x458c, 0x00003fff, 0x0}, -+ {0x4598, 0x07fc0000, 0x0}, -+ {0x454c, 0xffffffff, 0x0}, -+ {0x4550, 0xffffffff, 0x0}, -+ {0x4554, 0xffffffff, 0x0}, -+ {0x458c, 0x0fffc000, 0x0}, -+ {0x459c, 0x000001ff, 0x0}, -+ {0x4558, 0xffffffff, 0x0}, -+ {0x455c, 0xffffffff, 0x0}, -+ {0x4530, 0xffffffff, 0x4e790001}, -+ {0x4588, 0x00003fff, 0x0}, -+ {0x4598, 0x000001ff, 0x1}, -+ {0x4534, 0xffffffff, 0x0}, -+ {0x4538, 0xffffffff, 0x4b}, -+ {0x45ac, 0x38000000, 0x7}, -+ {0x4588, 0xf0000000, 0x0}, -+ {0x459c, 0x7e000000, 0x0}, -+ {0x45b8, 0x00040000, 0x0}, -+ {0x45b8, 0x00020000, 0x0}, -+ {0x4590, 0xffc00000, 0x0}, -+ {0x45b8, 0x00004000, 0x0}, -+ {0x4578, 0xff000000, 0x0}, -+ {0x45b8, 0x00000400, 0x0}, -+ {0x45b8, 0x00000800, 0x0}, -+ {0x45b8, 0x00001000, 0x0}, -+ {0x45b8, 0x00002000, 0x0}, -+ {0x45b4, 0x00018000, 0x0}, -+ {0x45ac, 0x07800000, 0x0}, -+ {0x45b4, 0x00000600, 0x2}, -+ {0x459c, 0x0001fe00, 0x80}, -+ {0x45ac, 0x00078000, 0x3}, -+ {0x459c, 0x01fe0000, 0x1}, -+}; -+ - static const struct rtw89_reg3_def rtw8852b_btc_preagc_en_defs[] = { - {0x46D0, GENMASK(1, 0), 0x3}, - {0x4790, GENMASK(1, 0), 0x3}, -@@ -1435,6 +1558,171 @@ rtw8852b_init_txpwr_unit(struct rtw89_de - return 0; - } - -+void rtw8852b_bb_set_plcp_tx(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_reg3_def *def = rtw8852b_pmac_ht20_mcs7_tbl; -+ u8 i; -+ -+ for (i = 0; i < ARRAY_SIZE(rtw8852b_pmac_ht20_mcs7_tbl); i++, def++) -+ rtw89_phy_write32_mask(rtwdev, def->addr, def->mask, def->data); -+} -+ -+static void rtw8852b_stop_pmac_tx(struct rtw89_dev *rtwdev, -+ struct rtw8852b_bb_pmac_info *tx_info, -+ enum rtw89_phy_idx idx) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC Stop Tx"); -+ if (tx_info->mode == CONT_TX) -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, B_PMAC_CTX_EN, 0, idx); -+ else if (tx_info->mode == PKTS_TX) -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, B_PMAC_PTX_EN, 0, idx); -+} -+ -+static void rtw8852b_start_pmac_tx(struct rtw89_dev *rtwdev, -+ struct rtw8852b_bb_pmac_info *tx_info, -+ enum rtw89_phy_idx idx) -+{ -+ enum rtw8852b_pmac_mode mode = tx_info->mode; -+ u32 pkt_cnt = tx_info->tx_cnt; -+ u16 period = tx_info->period; -+ -+ if (mode == CONT_TX && !tx_info->is_cck) { -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, B_PMAC_CTX_EN, 1, idx); -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC CTx Start"); -+ } else if (mode == PKTS_TX) { -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, B_PMAC_PTX_EN, 1, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_PRD, -+ B_PMAC_TX_PRD_MSK, period, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_CNT, B_PMAC_TX_CNT_MSK, -+ pkt_cnt, idx); -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC PTx Start"); -+ } -+ -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_CTRL, B_PMAC_TXEN_DIS, 1, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_TX_CTRL, B_PMAC_TXEN_DIS, 0, idx); -+} -+ -+void rtw8852b_bb_set_pmac_tx(struct rtw89_dev *rtwdev, -+ struct rtw8852b_bb_pmac_info *tx_info, -+ enum rtw89_phy_idx idx) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ -+ if (!tx_info->en_pmac_tx) { -+ rtw8852b_stop_pmac_tx(rtwdev, tx_info, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 0, idx); -+ if (chan->band_type == RTW89_BAND_2G) -+ rtw89_phy_write32_clr(rtwdev, R_RXCCA, B_RXCCA_DIS); -+ return; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC Tx Enable"); -+ -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_GNT, B_PMAC_GNT_TXEN, 1, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_GNT, B_PMAC_GNT_RXEN, 1, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_RX_CFG1, B_PMAC_OPT1_MSK, 0x3f, idx); -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 0, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 1, idx); -+ rtw89_phy_write32_set(rtwdev, R_RXCCA, B_RXCCA_DIS); -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, idx); -+ -+ rtw8852b_start_pmac_tx(rtwdev, tx_info, idx); -+} -+ -+void rtw8852b_bb_set_pmac_pkt_tx(struct rtw89_dev *rtwdev, u8 enable, -+ u16 tx_cnt, u16 period, u16 tx_time, -+ enum rtw89_phy_idx idx) -+{ -+ struct rtw8852b_bb_pmac_info tx_info = {0}; -+ -+ tx_info.en_pmac_tx = enable; -+ tx_info.is_cck = 0; -+ tx_info.mode = PKTS_TX; -+ tx_info.tx_cnt = tx_cnt; -+ tx_info.period = period; -+ tx_info.tx_time = tx_time; -+ -+ rtw8852b_bb_set_pmac_tx(rtwdev, &tx_info, idx); -+} -+ -+void rtw8852b_bb_set_power(struct rtw89_dev *rtwdev, s16 pwr_dbm, -+ enum rtw89_phy_idx idx) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC CFG Tx PWR = %d", pwr_dbm); -+ -+ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_PWR_EN, 1, idx); -+ rtw89_phy_write32_idx(rtwdev, R_TXPWR, B_TXPWR_MSK, pwr_dbm, idx); -+} -+ -+void rtw8852b_bb_cfg_tx_path(struct rtw89_dev *rtwdev, u8 tx_path) -+{ -+ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 7, RTW89_PHY_0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "PMAC CFG Tx Path = %d", tx_path); -+ -+ if (tx_path == RF_PATH_A) { -+ rtw89_phy_write32_mask(rtwdev, R_TXPATH_SEL, B_TXPATH_SEL_MSK, 1); -+ rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, B_TXNSS_MAP_MSK, 0); -+ } else if (tx_path == RF_PATH_B) { -+ rtw89_phy_write32_mask(rtwdev, R_TXPATH_SEL, B_TXPATH_SEL_MSK, 2); -+ rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, B_TXNSS_MAP_MSK, 0); -+ } else if (tx_path == RF_PATH_AB) { -+ rtw89_phy_write32_mask(rtwdev, R_TXPATH_SEL, B_TXPATH_SEL_MSK, 3); -+ rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, B_TXNSS_MAP_MSK, 4); -+ } else { -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "Error Tx Path"); -+ } -+} -+ -+void rtw8852b_bb_tx_mode_switch(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx idx, u8 mode) -+{ -+ if (mode != 0) -+ return; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "Tx mode switch"); -+ -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_GNT, B_PMAC_GNT_TXEN, 0, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_GNT, B_PMAC_GNT_RXEN, 0, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_RX_CFG1, B_PMAC_OPT1_MSK, 0, idx); -+ rtw89_phy_write32_idx(rtwdev, R_PMAC_RXMOD, B_PMAC_RXMOD_MSK, 0, idx); -+ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_DPD_EN, 0, idx); -+ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 0, idx); -+ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_PWR_EN, 0, idx); -+} -+ -+void rtw8852b_bb_backup_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx idx, -+ struct rtw8852b_bb_tssi_bak *bak) -+{ -+ s32 tmp; -+ -+ bak->tx_path = rtw89_phy_read32_idx(rtwdev, R_TXPATH_SEL, B_TXPATH_SEL_MSK, idx); -+ bak->rx_path = rtw89_phy_read32_idx(rtwdev, R_CHBW_MOD_V1, B_ANT_RX_SEG0, idx); -+ bak->p0_rfmode = rtw89_phy_read32_idx(rtwdev, R_P0_RFMODE, MASKDWORD, idx); -+ bak->p0_rfmode_ftm = rtw89_phy_read32_idx(rtwdev, R_P0_RFMODE_FTM_RX, MASKDWORD, idx); -+ bak->p1_rfmode = rtw89_phy_read32_idx(rtwdev, R_P1_RFMODE, MASKDWORD, idx); -+ bak->p1_rfmode_ftm = rtw89_phy_read32_idx(rtwdev, R_P1_RFMODE_FTM_RX, MASKDWORD, idx); -+ tmp = rtw89_phy_read32_idx(rtwdev, R_TXPWR, B_TXPWR_MSK, idx); -+ bak->tx_pwr = sign_extend32(tmp, 8); -+} -+ -+void rtw8852b_bb_restore_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx idx, -+ const struct rtw8852b_bb_tssi_bak *bak) -+{ -+ rtw89_phy_write32_idx(rtwdev, R_TXPATH_SEL, B_TXPATH_SEL_MSK, bak->tx_path, idx); -+ if (bak->tx_path == RF_AB) -+ rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, B_TXNSS_MAP_MSK, 0x4); -+ else -+ rtw89_phy_write32_mask(rtwdev, R_TXNSS_MAP, B_TXNSS_MAP_MSK, 0x0); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_ANT_RX_SEG0, bak->rx_path, idx); -+ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_PWR_EN, 1, idx); -+ rtw89_phy_write32_idx(rtwdev, R_P0_RFMODE, MASKDWORD, bak->p0_rfmode, idx); -+ rtw89_phy_write32_idx(rtwdev, R_P0_RFMODE_FTM_RX, MASKDWORD, bak->p0_rfmode_ftm, idx); -+ rtw89_phy_write32_idx(rtwdev, R_P1_RFMODE, MASKDWORD, bak->p1_rfmode, idx); -+ rtw89_phy_write32_idx(rtwdev, R_P1_RFMODE_FTM_RX, MASKDWORD, bak->p1_rfmode_ftm, idx); -+ rtw89_phy_write32_idx(rtwdev, R_TXPWR, B_TXPWR_MSK, bak->tx_pwr, idx); -+} -+ - static void rtw8852b_bb_ctrl_btc_preagc(struct rtw89_dev *rtwdev, bool bt_en) - { - rtw89_phy_write_reg3_tbl(rtwdev, bt_en ? &rtw8852b_btc_preagc_en_defs_tbl : ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.h -@@ -10,6 +10,13 @@ - #define RF_PATH_NUM_8852B 2 - #define BB_PATH_NUM_8852B 2 - -+enum rtw8852b_pmac_mode { -+ NONE_TEST, -+ PKTS_TX, -+ PKTS_RX, -+ CONT_TX -+}; -+ - struct rtw8852b_u_efuse { - u8 rsvd[0x88]; - u8 mac_addr[ETH_ALEN]; -@@ -85,9 +92,46 @@ struct rtw8852b_efuse { - }; - } __packed; - -+struct rtw8852b_bb_pmac_info { -+ u8 en_pmac_tx:1; -+ u8 is_cck:1; -+ u8 mode:3; -+ u8 rsvd:3; -+ u16 tx_cnt; -+ u16 period; -+ u16 tx_time; -+ u8 duty_cycle; -+}; -+ -+struct rtw8852b_bb_tssi_bak { -+ u8 tx_path; -+ u8 rx_path; -+ u32 p0_rfmode; -+ u32 p0_rfmode_ftm; -+ u32 p1_rfmode; -+ u32 p1_rfmode_ftm; -+ s16 tx_pwr; /* S9 */ -+}; -+ - extern const struct rtw89_chip_info rtw8852b_chip_info; - -+void rtw8852b_bb_set_plcp_tx(struct rtw89_dev *rtwdev); -+void rtw8852b_bb_set_pmac_tx(struct rtw89_dev *rtwdev, -+ struct rtw8852b_bb_pmac_info *tx_info, -+ enum rtw89_phy_idx idx); -+void rtw8852b_bb_set_pmac_pkt_tx(struct rtw89_dev *rtwdev, u8 enable, -+ u16 tx_cnt, u16 period, u16 tx_time, -+ enum rtw89_phy_idx idx); -+void rtw8852b_bb_set_power(struct rtw89_dev *rtwdev, s16 pwr_dbm, -+ enum rtw89_phy_idx idx); -+void rtw8852b_bb_cfg_tx_path(struct rtw89_dev *rtwdev, u8 tx_path); - void rtw8852b_bb_ctrl_rx_path(struct rtw89_dev *rtwdev, - enum rtw89_rf_path_bit rx_path); -+void rtw8852b_bb_tx_mode_switch(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx idx, u8 mode); -+void rtw8852b_bb_backup_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx idx, -+ struct rtw8852b_bb_tssi_bak *bak); -+void rtw8852b_bb_restore_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx idx, -+ const struct rtw8852b_bb_tssi_bak *bak); - - #endif diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-034-wifi-rtw89-8852b-add-basic-attributes-of-chip_info.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-034-wifi-rtw89-8852b-add-basic-attributes-of-chip_info.patch deleted file mode 100644 index bad691291..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-034-wifi-rtw89-8852b-add-basic-attributes-of-chip_info.patch +++ /dev/null @@ -1,300 +0,0 @@ -From b8fe87b816851d08a31c7c9589855c8535672299 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sun, 9 Oct 2022 20:54:03 +0800 -Subject: [PATCH 034/149] wifi: rtw89: 8852b: add basic attributes of chip_info - -Add 8852b specific constant tables and basic attributes containing -common chip_ops, firmware name, supported TX/RX NSS, number of CAM, -coexistence version, control register set, and so on. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221009125403.19662-10-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 235 ++++++++++++++++++ - 1 file changed, 235 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -217,6 +217,150 @@ static const struct rtw89_reg3_def rtw88 - - static DECLARE_PHY_REG3_TBL(rtw8852b_btc_preagc_dis_defs); - -+static const u32 rtw8852b_h2c_regs[RTW89_H2CREG_MAX] = { -+ R_AX_H2CREG_DATA0, R_AX_H2CREG_DATA1, R_AX_H2CREG_DATA2, -+ R_AX_H2CREG_DATA3 -+}; -+ -+static const u32 rtw8852b_c2h_regs[RTW89_C2HREG_MAX] = { -+ R_AX_C2HREG_DATA0, R_AX_C2HREG_DATA1, R_AX_C2HREG_DATA2, -+ R_AX_C2HREG_DATA3 -+}; -+ -+static const struct rtw89_page_regs rtw8852b_page_regs = { -+ .hci_fc_ctrl = R_AX_HCI_FC_CTRL, -+ .ch_page_ctrl = R_AX_CH_PAGE_CTRL, -+ .ach_page_ctrl = R_AX_ACH0_PAGE_CTRL, -+ .ach_page_info = R_AX_ACH0_PAGE_INFO, -+ .pub_page_info3 = R_AX_PUB_PAGE_INFO3, -+ .pub_page_ctrl1 = R_AX_PUB_PAGE_CTRL1, -+ .pub_page_ctrl2 = R_AX_PUB_PAGE_CTRL2, -+ .pub_page_info1 = R_AX_PUB_PAGE_INFO1, -+ .pub_page_info2 = R_AX_PUB_PAGE_INFO2, -+ .wp_page_ctrl1 = R_AX_WP_PAGE_CTRL1, -+ .wp_page_ctrl2 = R_AX_WP_PAGE_CTRL2, -+ .wp_page_info1 = R_AX_WP_PAGE_INFO1, -+}; -+ -+static const struct rtw89_reg_def rtw8852b_dcfo_comp = { -+ R_DCFO_COMP_S0, B_DCFO_COMP_S0_MSK -+}; -+ -+static const struct rtw89_imr_info rtw8852b_imr_info = { -+ .wdrls_imr_set = B_AX_WDRLS_IMR_SET, -+ .wsec_imr_reg = R_AX_SEC_DEBUG, -+ .wsec_imr_set = B_AX_IMR_ERROR, -+ .mpdu_tx_imr_set = 0, -+ .mpdu_rx_imr_set = 0, -+ .sta_sch_imr_set = B_AX_STA_SCHEDULER_IMR_SET, -+ .txpktctl_imr_b0_reg = R_AX_TXPKTCTL_ERR_IMR_ISR, -+ .txpktctl_imr_b0_clr = B_AX_TXPKTCTL_IMR_B0_CLR, -+ .txpktctl_imr_b0_set = B_AX_TXPKTCTL_IMR_B0_SET, -+ .txpktctl_imr_b1_reg = R_AX_TXPKTCTL_ERR_IMR_ISR_B1, -+ .txpktctl_imr_b1_clr = B_AX_TXPKTCTL_IMR_B1_CLR, -+ .txpktctl_imr_b1_set = B_AX_TXPKTCTL_IMR_B1_SET, -+ .wde_imr_clr = B_AX_WDE_IMR_CLR, -+ .wde_imr_set = B_AX_WDE_IMR_SET, -+ .ple_imr_clr = B_AX_PLE_IMR_CLR, -+ .ple_imr_set = B_AX_PLE_IMR_SET, -+ .host_disp_imr_clr = B_AX_HOST_DISP_IMR_CLR, -+ .host_disp_imr_set = B_AX_HOST_DISP_IMR_SET, -+ .cpu_disp_imr_clr = B_AX_CPU_DISP_IMR_CLR, -+ .cpu_disp_imr_set = B_AX_CPU_DISP_IMR_SET, -+ .other_disp_imr_clr = B_AX_OTHER_DISP_IMR_CLR, -+ .other_disp_imr_set = 0, -+ .bbrpt_com_err_imr_reg = R_AX_BBRPT_COM_ERR_IMR_ISR, -+ .bbrpt_chinfo_err_imr_reg = R_AX_BBRPT_CHINFO_ERR_IMR_ISR, -+ .bbrpt_err_imr_set = 0, -+ .bbrpt_dfs_err_imr_reg = R_AX_BBRPT_DFS_ERR_IMR_ISR, -+ .ptcl_imr_clr = B_AX_PTCL_IMR_CLR_ALL, -+ .ptcl_imr_set = B_AX_PTCL_IMR_SET, -+ .cdma_imr_0_reg = R_AX_DLE_CTRL, -+ .cdma_imr_0_clr = B_AX_DLE_IMR_CLR, -+ .cdma_imr_0_set = B_AX_DLE_IMR_SET, -+ .cdma_imr_1_reg = 0, -+ .cdma_imr_1_clr = 0, -+ .cdma_imr_1_set = 0, -+ .phy_intf_imr_reg = R_AX_PHYINFO_ERR_IMR, -+ .phy_intf_imr_clr = 0, -+ .phy_intf_imr_set = 0, -+ .rmac_imr_reg = R_AX_RMAC_ERR_ISR, -+ .rmac_imr_clr = B_AX_RMAC_IMR_CLR, -+ .rmac_imr_set = B_AX_RMAC_IMR_SET, -+ .tmac_imr_reg = R_AX_TMAC_ERR_IMR_ISR, -+ .tmac_imr_clr = B_AX_TMAC_IMR_CLR, -+ .tmac_imr_set = B_AX_TMAC_IMR_SET, -+}; -+ -+static const struct rtw89_rrsr_cfgs rtw8852b_rrsr_cfgs = { -+ .ref_rate = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_REF_RATE_SEL, 0}, -+ .rsc = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_RSC_MASK, 2}, -+}; -+ -+static const struct rtw89_dig_regs rtw8852b_dig_regs = { -+ .seg0_pd_reg = R_SEG0R_PD_V1, -+ .pd_lower_bound_mask = B_SEG0R_PD_LOWER_BOUND_MSK, -+ .pd_spatial_reuse_en = B_SEG0R_PD_SPATIAL_REUSE_EN_MSK_V1, -+ .p0_lna_init = {R_PATH0_LNA_INIT_V1, B_PATH0_LNA_INIT_IDX_MSK}, -+ .p1_lna_init = {R_PATH1_LNA_INIT_V1, B_PATH1_LNA_INIT_IDX_MSK}, -+ .p0_tia_init = {R_PATH0_TIA_INIT_V1, B_PATH0_TIA_INIT_IDX_MSK_V1}, -+ .p1_tia_init = {R_PATH1_TIA_INIT_V1, B_PATH1_TIA_INIT_IDX_MSK_V1}, -+ .p0_rxb_init = {R_PATH0_RXB_INIT_V1, B_PATH0_RXB_INIT_IDX_MSK_V1}, -+ .p1_rxb_init = {R_PATH1_RXB_INIT_V1, B_PATH1_RXB_INIT_IDX_MSK_V1}, -+ .p0_p20_pagcugc_en = {R_PATH0_P20_FOLLOW_BY_PAGCUGC_V2, -+ B_PATH0_P20_FOLLOW_BY_PAGCUGC_EN_MSK}, -+ .p0_s20_pagcugc_en = {R_PATH0_S20_FOLLOW_BY_PAGCUGC_V2, -+ B_PATH0_S20_FOLLOW_BY_PAGCUGC_EN_MSK}, -+ .p1_p20_pagcugc_en = {R_PATH1_P20_FOLLOW_BY_PAGCUGC_V2, -+ B_PATH1_P20_FOLLOW_BY_PAGCUGC_EN_MSK}, -+ .p1_s20_pagcugc_en = {R_PATH1_S20_FOLLOW_BY_PAGCUGC_V2, -+ B_PATH1_S20_FOLLOW_BY_PAGCUGC_EN_MSK}, -+}; -+ -+static const struct rtw89_btc_rf_trx_para rtw89_btc_8852b_rf_ul[] = { -+ {15, 0, 0, 7}, /* 0 -> original */ -+ {15, 2, 0, 7}, /* 1 -> for BT-connected ACI issue && BTG co-rx */ -+ {15, 0, 0, 7}, /* 2 ->reserved for shared-antenna */ -+ {15, 0, 0, 7}, /* 3- >reserved for shared-antenna */ -+ {15, 0, 0, 7}, /* 4 ->reserved for shared-antenna */ -+ {15, 0, 0, 7}, /* the below id is for non-shared-antenna free-run */ -+ {6, 1, 0, 7}, -+ {13, 1, 0, 7}, -+ {13, 1, 0, 7} -+}; -+ -+static const struct rtw89_btc_rf_trx_para rtw89_btc_8852b_rf_dl[] = { -+ {15, 0, 0, 7}, /* 0 -> original */ -+ {15, 2, 0, 7}, /* 1 -> reserved for shared-antenna */ -+ {15, 0, 0, 7}, /* 2 ->reserved for shared-antenna */ -+ {15, 0, 0, 7}, /* 3- >reserved for shared-antenna */ -+ {15, 0, 0, 7}, /* 4 ->reserved for shared-antenna */ -+ {15, 0, 0, 7}, /* the below id is for non-shared-antenna free-run */ -+ {15, 1, 0, 7}, -+ {15, 1, 0, 7}, -+ {15, 1, 0, 7} -+}; -+ -+static const struct rtw89_btc_fbtc_mreg rtw89_btc_8852b_mon_reg[] = { -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda24), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda28), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda2c), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda30), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda4c), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda10), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda20), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda34), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xcef4), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0x8424), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xd200), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xd220), -+ RTW89_DEF_FBTC_MREG(REG_BB, 4, 0x980), -+ RTW89_DEF_FBTC_MREG(REG_BT_MODEM, 4, 0x178), -+}; -+ -+static const u8 rtw89_btc_8852b_wl_rssi_thres[BTC_WL_RSSI_THMAX] = {70, 60, 50, 40}; -+static const u8 rtw89_btc_8852b_bt_rssi_thres[BTC_BT_RSSI_THMAX] = {50, 40, 30, 20}; -+ - static int rtw8852b_pwr_on_func(struct rtw89_dev *rtwdev) - { - u32 val32; -@@ -2195,10 +2339,13 @@ static const struct rtw89_chip_ops rtw88 - .disable_bb_rf = rtw8852b_mac_disable_bb_rf, - .bb_reset = rtw8852b_bb_reset, - .bb_sethw = rtw8852b_bb_sethw, -+ .read_rf = rtw89_phy_read_rf_v1, -+ .write_rf = rtw89_phy_write_rf_v1, - .set_channel = rtw8852b_set_channel, - .set_channel_help = rtw8852b_set_channel_help, - .read_efuse = rtw8852b_read_efuse, - .read_phycap = rtw8852b_read_phycap, -+ .fem_setup = NULL, - .power_trim = rtw8852b_power_trim, - .set_txpwr = rtw8852b_set_txpwr, - .set_txpwr_ctrl = rtw8852b_set_txpwr_ctrl, -@@ -2208,8 +2355,16 @@ static const struct rtw89_chip_ops rtw88 - .query_ppdu = rtw8852b_query_ppdu, - .bb_ctrl_btc_preagc = rtw8852b_bb_ctrl_btc_preagc, - .cfg_txrx_path = rtw8852b_bb_cfg_txrx_path, -+ .set_txpwr_ul_tb_offset = rtw8852b_set_txpwr_ul_tb_offset, - .pwr_on_func = rtw8852b_pwr_on_func, - .pwr_off_func = rtw8852b_pwr_off_func, -+ .fill_txdesc = rtw89_core_fill_txdesc, -+ .fill_txdesc_fwcmd = rtw89_core_fill_txdesc, -+ .cfg_ctrl_path = rtw89_mac_cfg_ctrl_path, -+ .mac_cfg_gnt = rtw89_mac_cfg_gnt, -+ .stop_sch_tx = rtw89_mac_stop_sch_tx, -+ .resume_sch_tx = rtw89_mac_resume_sch_tx, -+ .h2c_dctl_sec_cam = NULL, - - .btc_set_rfe = rtw8852b_btc_set_rfe, - .btc_init_cfg = rtw8852b_btc_init_cfg, -@@ -2225,12 +2380,46 @@ static const struct rtw89_chip_ops rtw88 - const struct rtw89_chip_info rtw8852b_chip_info = { - .chip_id = RTL8852B, - .ops = &rtw8852b_chip_ops, -+ .fw_name = "rtw89/rtw8852b_fw.bin", - .fifo_size = 196608, - .dle_scc_rsvd_size = 98304, -+ .max_amsdu_limit = 3500, -+ .dis_2g_40m_ul_ofdma = true, -+ .rsvd_ple_ofst = 0x2f800, - .hfc_param_ini = rtw8852b_hfc_param_ini_pcie, - .dle_mem = rtw8852b_dle_mem_pcie, -+ .rf_base_addr = {0xe000, 0xf000}, - .pwr_on_seq = NULL, - .pwr_off_seq = NULL, -+ .bb_table = &rtw89_8852b_phy_bb_table, -+ .bb_gain_table = &rtw89_8852b_phy_bb_gain_table, -+ .rf_table = {&rtw89_8852b_phy_radioa_table, -+ &rtw89_8852b_phy_radiob_table,}, -+ .nctl_table = &rtw89_8852b_phy_nctl_table, -+ .byr_table = &rtw89_8852b_byr_table, -+ .txpwr_lmt_2g = &rtw89_8852b_txpwr_lmt_2g, -+ .txpwr_lmt_5g = &rtw89_8852b_txpwr_lmt_5g, -+ .txpwr_lmt_ru_2g = &rtw89_8852b_txpwr_lmt_ru_2g, -+ .txpwr_lmt_ru_5g = &rtw89_8852b_txpwr_lmt_ru_5g, -+ .txpwr_factor_rf = 2, -+ .txpwr_factor_mac = 1, -+ .dig_table = NULL, -+ .dig_regs = &rtw8852b_dig_regs, -+ .tssi_dbw_table = NULL, -+ .support_chanctx_num = 0, -+ .support_bands = BIT(NL80211_BAND_2GHZ) | -+ BIT(NL80211_BAND_5GHZ), -+ .support_bw160 = false, -+ .hw_sec_hdr = false, -+ .rf_path_num = 2, -+ .tx_nss = 2, -+ .rx_nss = 2, -+ .acam_num = 128, -+ .bcam_num = 10, -+ .scam_num = 128, -+ .bacam_num = 2, -+ .bacam_dynamic_num = 4, -+ .bacam_v1 = false, - .sec_ctrl_efuse_size = 4, - .physical_efuse_size = 1216, - .logical_efuse_size = 2048, -@@ -2239,6 +2428,52 @@ const struct rtw89_chip_info rtw8852b_ch - .dav_log_efuse_size = 16, - .phycap_addr = 0x580, - .phycap_size = 128, -+ .para_ver = 0, -+ .wlcx_desired = 0x05050000, -+ .btcx_desired = 0x5, -+ .scbd = 0x1, -+ .mailbox = 0x1, -+ .btc_fwinfo_buf = 1024, -+ -+ .fcxbtcrpt_ver = 1, -+ .fcxtdma_ver = 1, -+ .fcxslots_ver = 1, -+ .fcxcysta_ver = 2, -+ .fcxstep_ver = 2, -+ .fcxnullsta_ver = 1, -+ .fcxmreg_ver = 1, -+ .fcxgpiodbg_ver = 1, -+ .fcxbtver_ver = 1, -+ .fcxbtscan_ver = 1, -+ .fcxbtafh_ver = 1, -+ .fcxbtdevinfo_ver = 1, -+ .afh_guard_ch = 6, -+ .wl_rssi_thres = rtw89_btc_8852b_wl_rssi_thres, -+ .bt_rssi_thres = rtw89_btc_8852b_bt_rssi_thres, -+ .rssi_tol = 2, -+ .mon_reg_num = ARRAY_SIZE(rtw89_btc_8852b_mon_reg), -+ .mon_reg = rtw89_btc_8852b_mon_reg, -+ .rf_para_ulink_num = ARRAY_SIZE(rtw89_btc_8852b_rf_ul), -+ .rf_para_ulink = rtw89_btc_8852b_rf_ul, -+ .rf_para_dlink_num = ARRAY_SIZE(rtw89_btc_8852b_rf_dl), -+ .rf_para_dlink = rtw89_btc_8852b_rf_dl, -+ .ps_mode_supported = BIT(RTW89_PS_MODE_RFOFF) | -+ BIT(RTW89_PS_MODE_CLK_GATED) | -+ BIT(RTW89_PS_MODE_PWR_GATED), -+ .low_power_hci_modes = 0, -+ .h2c_cctl_func_id = H2C_FUNC_MAC_CCTLINFO_UD, -+ .hci_func_en_addr = R_AX_HCI_FUNC_EN, -+ .h2c_desc_size = sizeof(struct rtw89_txwd_body), -+ .txwd_body_size = sizeof(struct rtw89_txwd_body), -+ .h2c_ctrl_reg = R_AX_H2CREG_CTRL, -+ .h2c_regs = rtw8852b_h2c_regs, -+ .c2h_ctrl_reg = R_AX_C2HREG_CTRL, -+ .c2h_regs = rtw8852b_c2h_regs, -+ .page_regs = &rtw8852b_page_regs, -+ .dcfo_comp = &rtw8852b_dcfo_comp, -+ .dcfo_comp_sft = 3, -+ .imr_info = &rtw8852b_imr_info, -+ .rrsr_cfgs = &rtw8852b_rrsr_cfgs, - .dma_ch_mask = BIT(RTW89_DMA_ACH4) | BIT(RTW89_DMA_ACH5) | - BIT(RTW89_DMA_ACH6) | BIT(RTW89_DMA_ACH7) | - BIT(RTW89_DMA_B1MG) | BIT(RTW89_DMA_B1HI), diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-035-wifi-rtw89-8852b-rfk-add-DACK.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-035-wifi-rtw89-8852b-rfk-add-DACK.patch deleted file mode 100644 index 634b7d4f8..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-035-wifi-rtw89-8852b-rfk-add-DACK.patch +++ /dev/null @@ -1,537 +0,0 @@ -From 16be5e3be0e5794b5e7227c63b440f3fdb9c22ce Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 12 Oct 2022 16:32:30 +0800 -Subject: [PATCH 035/149] wifi: rtw89: 8852b: rfk: add DACK - -DACK (digital-to-analog converters calibration) is used to calibrate DAC -to output good quality signals. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221012083234.20224-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 21 + - .../net/wireless/realtek/rtw89/rtw8852b_rfk.c | 432 ++++++++++++++++++ - .../net/wireless/realtek/rtw89/rtw8852b_rfk.h | 1 + - 3 files changed, 454 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3526,6 +3526,7 @@ - #define B_ANAPAR_ADCCLK BIT(30) - #define B_ANAPAR_FLTRST BIT(22) - #define B_ANAPAR_CRXBB GENMASK(18, 16) -+#define B_ANAPAR_EN BIT(16) - #define B_ANAPAR_14 GENMASK(15, 0) - #define R_RFE_E_A2 0x0334 - #define R_RFE_O_SEL_A2 0x0338 -@@ -4380,6 +4381,8 @@ - #define B_DACK_S0P3_OK BIT(2) - #define R_DACK_DADCK01 0xC084 - #define B_DACK_DADCK01 GENMASK(31, 24) -+#define R_DRCK_FH 0xC094 -+#define B_DRCK_LAT BIT(9) - #define R_DRCK 0xC0C4 - #define B_DRCK_IDLE BIT(9) - #define B_DRCK_EN BIT(6) -@@ -4387,15 +4390,28 @@ - #define R_DRCK_RES 0xC0C8 - #define B_DRCK_RES GENMASK(19, 15) - #define B_DRCK_POL BIT(3) -+#define R_DRCK_V1 0xC0CC -+#define B_DRCK_V1_SEL BIT(9) -+#define B_DRCK_V1_KICK BIT(6) -+#define B_DRCK_V1_CV GENMASK(4, 0) -+#define R_DRCK_RS 0xC0D0 -+#define B_DRCK_RS_LPS GENMASK(19, 15) -+#define B_DRCK_RS_DONE BIT(3) - #define R_PATH0_SAMPL_DLY_T_V1 0xC0D4 - #define B_PATH0_SAMPL_DLY_T_MSK_V1 GENMASK(27, 26) - #define R_P0_CFCH_BW0 0xC0D4 - #define B_P0_CFCH_BW0 GENMASK(27, 26) - #define R_P0_CFCH_BW1 0xC0D8 - #define B_P0_CFCH_BW1 GENMASK(8, 5) -+#define R_ADDCK0D 0xC0F0 -+#define B_ADDCK0D_VAL2 GENMASK(31, 26) -+#define B_ADDCK0D_VAL GENMASK(25, 16) - #define R_ADDCK0 0xC0F4 -+#define B_ADDCK0_TRG BIT(11) - #define B_ADDCK0 GENMASK(9, 8) -+#define B_ADDCK0_MAN GENMASK(5, 4) - #define B_ADDCK0_EN BIT(4) -+#define B_ADDCK0_VAL GENMASK(3, 0) - #define B_ADDCK0_RST BIT(2) - #define R_ADDCK0_RL 0xC0F8 - #define B_ADDCK0_RLS GENMASK(29, 28) -@@ -4436,8 +4452,13 @@ - #define B_PATH0_BW_SEL_MSK_V1 GENMASK(8, 5) - #define R_PATH1_BW_SEL_V1 0xC1D8 - #define B_PATH1_BW_SEL_MSK_V1 GENMASK(8, 5) -+#define R_ADDCK1D 0xC1F0 -+#define B_ADDCK1D_VAL2 GENMASK(31, 26) -+#define B_ADDCK1D_VAL GENMASK(25, 16) - #define R_ADDCK1 0xC1F4 -+#define B_ADDCK1_TRG BIT(11) - #define B_ADDCK1 GENMASK(9, 8) -+#define B_ADDCK1_MAN GENMASK(5, 4) - #define B_ADDCK1_EN BIT(4) - #define B_ADDCK1_RST BIT(2) - #define R_ADDCK1_RL 0xC1F8 ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -@@ -12,6 +12,8 @@ - #include "rtw8852b_rfk_table.h" - #include "rtw8852b_table.h" - -+#define ADDC_T_AVG 100 -+ - static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) - { - u8 val; -@@ -30,6 +32,436 @@ static u8 _kpath(struct rtw89_dev *rtwde - return val; - } - -+static void _afe_init(struct rtw89_dev *rtwdev) -+{ -+ rtw89_write32(rtwdev, R_AX_PHYREG_SET, 0xf); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852b_afe_init_defs_tbl); -+} -+ -+static void _drck(struct rtw89_dev *rtwdev) -+{ -+ u32 rck_d; -+ u32 val; -+ int ret; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]Ddie RCK start!!!\n"); -+ rtw89_phy_write32_mask(rtwdev, R_DRCK_V1, B_DRCK_V1_KICK, 0x1); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, 1, 10000, -+ false, rtwdev, R_DRCK_RS, B_DRCK_RS_DONE); -+ if (ret) -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DRCK timeout\n"); -+ -+ rtw89_phy_write32_mask(rtwdev, R_DRCK_V1, B_DRCK_V1_KICK, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_DRCK_FH, B_DRCK_LAT, 0x1); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_DRCK_FH, B_DRCK_LAT, 0x0); -+ rck_d = rtw89_phy_read32_mask(rtwdev, R_DRCK_RS, B_DRCK_RS_LPS); -+ rtw89_phy_write32_mask(rtwdev, R_DRCK_V1, B_DRCK_V1_SEL, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_DRCK_V1, B_DRCK_V1_CV, rck_d); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0xc0cc = 0x%x\n", -+ rtw89_phy_read32_mask(rtwdev, R_DRCK_V1, MASKDWORD)); -+} -+ -+static void _addck_backup(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0, 0x0); -+ dack->addck_d[0][0] = rtw89_phy_read32_mask(rtwdev, R_ADDCKR0, B_ADDCKR0_A0); -+ dack->addck_d[0][1] = rtw89_phy_read32_mask(rtwdev, R_ADDCKR0, B_ADDCKR0_A1); -+ -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1, 0x0); -+ dack->addck_d[1][0] = rtw89_phy_read32_mask(rtwdev, R_ADDCKR1, B_ADDCKR1_A0); -+ dack->addck_d[1][1] = rtw89_phy_read32_mask(rtwdev, R_ADDCKR1, B_ADDCKR1_A1); -+} -+ -+static void _addck_reload(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ -+ /* S0 */ -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0D, B_ADDCK0D_VAL, dack->addck_d[0][0]); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_VAL, dack->addck_d[0][1] >> 6); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0D, B_ADDCK0D_VAL2, dack->addck_d[0][1] & 0x3f); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_MAN, 0x3); -+ -+ /* S1 */ -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK1D, B_ADDCK1D_VAL, dack->addck_d[1][0]); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK0_VAL, dack->addck_d[1][1] >> 6); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK1D, B_ADDCK1D_VAL2, dack->addck_d[1][1] & 0x3f); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1_MAN, 0x3); -+} -+ -+static void _dack_backup_s0(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u8 i; -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x1); -+ -+ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { -+ rtw89_phy_write32_mask(rtwdev, R_DCOF0, B_DCOF0_V, i); -+ dack->msbk_d[0][0][i] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK_S0P2, B_DACK_S0M0); -+ rtw89_phy_write32_mask(rtwdev, R_DCOF8, B_DCOF8_V, i); -+ dack->msbk_d[0][1][i] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK_S0P3, B_DACK_S0M1); -+ } -+ -+ dack->biask_d[0][0] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK_BIAS00, B_DACK_BIAS00); -+ dack->biask_d[0][1] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK_BIAS01, B_DACK_BIAS01); -+ -+ dack->dadck_d[0][0] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK_DADCK00, B_DACK_DADCK00); -+ dack->dadck_d[0][1] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK_DADCK01, B_DACK_DADCK01); -+} -+ -+static void _dack_backup_s1(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u8 i; -+ -+ rtw89_phy_write32_mask(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON, 0x1); -+ -+ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { -+ rtw89_phy_write32_mask(rtwdev, R_DACK10, B_DACK10, i); -+ dack->msbk_d[1][0][i] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK10S, B_DACK10S); -+ rtw89_phy_write32_mask(rtwdev, R_DACK11, B_DACK11, i); -+ dack->msbk_d[1][1][i] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK11S, B_DACK11S); -+ } -+ -+ dack->biask_d[1][0] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK_BIAS10, B_DACK_BIAS10); -+ dack->biask_d[1][1] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK_BIAS11, B_DACK_BIAS11); -+ -+ dack->dadck_d[1][0] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK_DADCK10, B_DACK_DADCK10); -+ dack->dadck_d[1][1] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK_DADCK11, B_DACK_DADCK11); -+} -+ -+static void _check_addc(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ s32 dc_re = 0, dc_im = 0; -+ u32 tmp; -+ u32 i; -+ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852b_check_addc_defs_a_tbl, -+ &rtw8852b_check_addc_defs_b_tbl); -+ -+ for (i = 0; i < ADDC_T_AVG; i++) { -+ tmp = rtw89_phy_read32_mask(rtwdev, R_DBG32_D, MASKDWORD); -+ dc_re += sign_extend32(FIELD_GET(0xfff000, tmp), 11); -+ dc_im += sign_extend32(FIELD_GET(0xfff, tmp), 11); -+ } -+ -+ dc_re /= ADDC_T_AVG; -+ dc_im /= ADDC_T_AVG; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DACK]S%d,dc_re = 0x%x,dc_im =0x%x\n", path, dc_re, dc_im); -+} -+ -+static void _addck(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u32 val; -+ int ret; -+ -+ /* S0 */ -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_MAN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_SAMPL_DLY_T_V1, 0x30, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_ADCCLK, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_FLTRST, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_FLTRST, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0xf); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_SAMPL_DLY_T_V1, BIT(1), 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0x3); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]before S0 ADDCK\n"); -+ _check_addc(rtwdev, RF_PATH_A); -+ -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_TRG, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_TRG, 0x0); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0, 0x1); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, 1, 10000, -+ false, rtwdev, R_ADDCKR0, BIT(0)); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 ADDCK timeout\n"); -+ dack->addck_timeout[0] = true; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]ADDCK ret = %d\n", ret); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S0 ADDCK\n"); -+ _check_addc(rtwdev, RF_PATH_A); -+ -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_SAMPL_DLY_T_V1, BIT(1), 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0xc); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_ADCCLK, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x0); -+ -+ /* S1 */ -+ rtw89_phy_write32_mask(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_ADCCLK, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_FLTRST, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_FLTRST, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0xf); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_SAMPL_DLY_T_V1, BIT(1), 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0x3); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]before S1 ADDCK\n"); -+ _check_addc(rtwdev, RF_PATH_B); -+ -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1_TRG, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1_TRG, 0x0); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK1, B_ADDCK1, 0x1); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, 1, 10000, -+ false, rtwdev, R_ADDCKR1, BIT(0)); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 ADDCK timeout\n"); -+ dack->addck_timeout[1] = true; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]ADDCK ret = %d\n", ret); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S1 ADDCK\n"); -+ _check_addc(rtwdev, RF_PATH_B); -+ -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_SAMPL_DLY_T_V1, BIT(1), 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15_H, 0xc); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_ADCCLK, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON, 0x0); -+} -+ -+static void _check_dadc(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852b_check_dadc_en_defs_a_tbl, -+ &rtw8852b_check_dadc_en_defs_b_tbl); -+ -+ _check_addc(rtwdev, path); -+ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852b_check_dadc_dis_defs_a_tbl, -+ &rtw8852b_check_dadc_dis_defs_b_tbl); -+} -+ -+static bool _dack_s0_check_done(struct rtw89_dev *rtwdev, bool part1) -+{ -+ if (part1) { -+ if (rtw89_phy_read32_mask(rtwdev, R_DACK_S0P0, B_DACK_S0P0_OK) == 0 || -+ rtw89_phy_read32_mask(rtwdev, R_DACK_S0P1, B_DACK_S0P1_OK) == 0) -+ return false; -+ } else { -+ if (rtw89_phy_read32_mask(rtwdev, R_DACK_S0P2, B_DACK_S0P2_OK) == 0 || -+ rtw89_phy_read32_mask(rtwdev, R_DACK_S0P3, B_DACK_S0P3_OK) == 0) -+ return false; -+ } -+ -+ return true; -+} -+ -+static void _dack_s0(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ bool done; -+ int ret; -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852b_dack_s0_1_defs_tbl); -+ -+ ret = read_poll_timeout_atomic(_dack_s0_check_done, done, done, 1, 10000, -+ false, rtwdev, true); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 MSBK timeout\n"); -+ dack->msbk_timeout[0] = true; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852b_dack_s0_2_defs_tbl); -+ -+ ret = read_poll_timeout_atomic(_dack_s0_check_done, done, done, 1, 10000, -+ false, rtwdev, false); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 DADCK timeout\n"); -+ dack->dadck_timeout[0] = true; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852b_dack_s0_3_defs_tbl); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S0 DADCK\n"); -+ -+ _dack_backup_s0(rtwdev); -+ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x0); -+} -+ -+static bool _dack_s1_check_done(struct rtw89_dev *rtwdev, bool part1) -+{ -+ if (part1) { -+ if (rtw89_phy_read32_mask(rtwdev, R_DACK_S1P0, B_DACK_S1P0_OK) == 0 && -+ rtw89_phy_read32_mask(rtwdev, R_DACK_S1P1, B_DACK_S1P1_OK) == 0) -+ return false; -+ } else { -+ if (rtw89_phy_read32_mask(rtwdev, R_DACK10S, B_DACK_S1P2_OK) == 0 && -+ rtw89_phy_read32_mask(rtwdev, R_DACK11S, B_DACK_S1P3_OK) == 0) -+ return false; -+ } -+ -+ return true; -+} -+ -+static void _dack_s1(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ bool done; -+ int ret; -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852b_dack_s1_1_defs_tbl); -+ -+ ret = read_poll_timeout_atomic(_dack_s1_check_done, done, done, 1, 10000, -+ false, rtwdev, true); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 MSBK timeout\n"); -+ dack->msbk_timeout[1] = true; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852b_dack_s1_2_defs_tbl); -+ -+ ret = read_poll_timeout_atomic(_dack_s1_check_done, done, done, 1, 10000, -+ false, rtwdev, false); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 DADCK timeout\n"); -+ dack->dadck_timeout[1] = true; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852b_dack_s1_3_defs_tbl); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S1 DADCK\n"); -+ -+ _check_dadc(rtwdev, RF_PATH_B); -+ _dack_backup_s1(rtwdev); -+ rtw89_phy_write32_mask(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON, 0x0); -+} -+ -+static void _dack(struct rtw89_dev *rtwdev) -+{ -+ _dack_s0(rtwdev); -+ _dack_s1(rtwdev); -+} -+ -+static void _dack_dump(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u8 i; -+ u8 t; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DACK]S0 ADC_DCK ic = 0x%x, qc = 0x%x\n", -+ dack->addck_d[0][0], dack->addck_d[0][1]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DACK]S1 ADC_DCK ic = 0x%x, qc = 0x%x\n", -+ dack->addck_d[1][0], dack->addck_d[1][1]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DACK]S0 DAC_DCK ic = 0x%x, qc = 0x%x\n", -+ dack->dadck_d[0][0], dack->dadck_d[0][1]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DACK]S1 DAC_DCK ic = 0x%x, qc = 0x%x\n", -+ dack->dadck_d[1][0], dack->dadck_d[1][1]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DACK]S0 biask ic = 0x%x, qc = 0x%x\n", -+ dack->biask_d[0][0], dack->biask_d[0][1]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DACK]S1 biask ic = 0x%x, qc = 0x%x\n", -+ dack->biask_d[1][0], dack->biask_d[1][1]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 MSBK ic:\n"); -+ for (i = 0; i < 0x10; i++) { -+ t = dack->msbk_d[0][0][i]; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 MSBK qc:\n"); -+ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { -+ t = dack->msbk_d[0][1][i]; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 MSBK ic:\n"); -+ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { -+ t = dack->msbk_d[1][0][i]; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S1 MSBK qc:\n"); -+ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { -+ t = dack->msbk_d[1][1][i]; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); -+ } -+} -+ -+static void _dac_cal(struct rtw89_dev *rtwdev, bool force) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u32 rf0_0, rf1_0; -+ -+ dack->dack_done = false; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK 0x1\n"); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK start!!!\n"); -+ -+ rf0_0 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK); -+ rf1_0 = rtw89_read_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK); -+ _afe_init(rtwdev); -+ _drck(rtwdev); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RR_RSV1_RST, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, RR_RSV1_RST, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, 0x337e1); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK, 0x337e1); -+ _addck(rtwdev); -+ _addck_backup(rtwdev); -+ _addck_reload(rtwdev); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MODOPT, RFREG_MASK, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_MODOPT, RFREG_MASK, 0x0); -+ _dack(rtwdev); -+ _dack_dump(rtwdev); -+ dack->dack_done = true; -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, rf0_0); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_MOD, RFREG_MASK, rf1_0); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RR_RSV1_RST, 0x1); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_RSV1, RR_RSV1_RST, 0x1); -+ dack->dack_cnt++; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK finish!!!\n"); -+} -+ -+void rtw8852b_dack(struct rtw89_dev *rtwdev) -+{ -+ u8 phy_map = rtw89_btc_phymap(rtwdev, RTW89_PHY_0, 0); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_START); -+ _dac_cal(rtwdev, false); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_STOP); -+} -+ - static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, - enum rtw89_bandwidth bw, bool dav) - { ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h -@@ -7,6 +7,7 @@ - - #include "core.h" - -+void rtw8852b_dack(struct rtw89_dev *rtwdev); - void rtw8852b_set_channel_rf(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-036-wifi-rtw89-8852b-rfk-add-RCK.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-036-wifi-rtw89-8852b-rfk-add-RCK.patch deleted file mode 100644 index 649327476..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-036-wifi-rtw89-8852b-rfk-add-RCK.patch +++ /dev/null @@ -1,86 +0,0 @@ -From 10298b53bff642e586e5b82616914c9fa3d9a906 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 12 Oct 2022 16:32:31 +0800 -Subject: [PATCH 036/149] wifi: rtw89: 8852b: rfk: add RCK - -RCK is synchronize RC calibration. Driver triggers this calibration and -sets the result to register. This calibration is needed once when interface -is going to up. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221012083234.20224-3-pkshih@realtek.com ---- - .../net/wireless/realtek/rtw89/rtw8852b_rfk.c | 43 +++++++++++++++++++ - .../net/wireless/realtek/rtw89/rtw8852b_rfk.h | 1 + - 2 files changed, 44 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -@@ -32,6 +32,41 @@ static u8 _kpath(struct rtw89_dev *rtwde - return val; - } - -+static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ u32 rf_reg5; -+ u32 rck_val; -+ u32 val; -+ int ret; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] ====== S%d RCK ======\n", path); -+ -+ rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); -+ -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] RF0x00 = 0x%05x\n", -+ rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); -+ -+ /* RCK trigger */ -+ rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, 0x00240); -+ -+ ret = read_poll_timeout_atomic(rtw89_read_rf, val, val, 2, 30, -+ false, rtwdev, path, RR_RCKS, BIT(3)); -+ -+ rck_val = rtw89_read_rf(rtwdev, path, RR_RCKC, RR_RCKC_CA); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] rck_val = 0x%x, ret = %d\n", -+ rck_val, ret); -+ -+ rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, rck_val); -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] RF 0x1b = 0x%x\n", -+ rtw89_read_rf(rtwdev, path, RR_RCKC, RFREG_MASK)); -+} -+ - static void _afe_init(struct rtw89_dev *rtwdev) - { - rtw89_write32(rtwdev, R_AX_PHYREG_SET, 0xf); -@@ -453,6 +488,14 @@ static void _dac_cal(struct rtw89_dev *r - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK finish!!!\n"); - } - -+void rtw8852b_rck(struct rtw89_dev *rtwdev) -+{ -+ u8 path; -+ -+ for (path = 0; path < RF_PATH_NUM_8852B; path++) -+ _rck(rtwdev, path); -+} -+ - void rtw8852b_dack(struct rtw89_dev *rtwdev) - { - u8 phy_map = rtw89_btc_phymap(rtwdev, RTW89_PHY_0, 0); ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h -@@ -7,6 +7,7 @@ - - #include "core.h" - -+void rtw8852b_rck(struct rtw89_dev *rtwdev); - void rtw8852b_dack(struct rtw89_dev *rtwdev); - void rtw8852b_set_channel_rf(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-037-wifi-rtw89-8852b-rfk-add-RX-DCK.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-037-wifi-rtw89-8852b-rfk-add-RX-DCK.patch deleted file mode 100644 index d30b165bf..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-037-wifi-rtw89-8852b-rfk-add-RX-DCK.patch +++ /dev/null @@ -1,132 +0,0 @@ -From 212671074ab2f3e33fd5e95392c7356410ad7f8d Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 12 Oct 2022 16:32:32 +0800 -Subject: [PATCH 037/149] wifi: rtw89: 8852b: rfk: add RX DCK - -RX DCK is receiver DC calibration. With this calibration, we have proper -DC offset to reflect correct received signal strength indicator. Do this -calibration when bringing up interface and going to run on AP channel. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221012083234.20224-4-pkshih@realtek.com ---- - .../net/wireless/realtek/rtw89/rtw8852b_rfk.c | 75 +++++++++++++++++++ - .../net/wireless/realtek/rtw89/rtw8852b_rfk.h | 1 + - 2 files changed, 76 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -@@ -12,6 +12,7 @@ - #include "rtw8852b_rfk_table.h" - #include "rtw8852b_table.h" - -+#define RTW8852B_RXDCK_VER 0x1 - #define ADDC_T_AVG 100 - - static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -@@ -32,6 +33,47 @@ static u8 _kpath(struct rtw89_dev *rtwde - return val; - } - -+static void _set_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_write_rf(rtwdev, path, RR_DCK1, RR_DCK1_CLR, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x1); -+ mdelay(1); -+} -+ -+static void _rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ u8 path, dck_tune; -+ u32 rf_reg5; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] ****** RXDCK Start (Ver: 0x%x, CV : 0x%x) ******\n", -+ RTW8852B_RXDCK_VER, rtwdev->hal.cv); -+ -+ for (path = 0; path < RF_PATH_NUM_8852B; path++) { -+ rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); -+ dck_tune = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_FINE); -+ -+ if (rtwdev->is_tssi_mode[path]) -+ rtw89_phy_write32_mask(rtwdev, -+ R_P0_TSSI_TRK + (path << 13), -+ B_P0_TSSI_TRK_EN, 0x1); -+ -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_FINE, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); -+ _set_rx_dck(rtwdev, phy, path); -+ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_FINE, dck_tune); -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); -+ -+ if (rtwdev->is_tssi_mode[path]) -+ rtw89_phy_write32_mask(rtwdev, -+ R_P0_TSSI_TRK + (path << 13), -+ B_P0_TSSI_TRK_EN, 0x0); -+ } -+} -+ - static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) - { - u32 rf_reg5; -@@ -488,6 +530,24 @@ static void _dac_cal(struct rtw89_dev *r - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK finish!!!\n"); - } - -+static void _wait_rx_mode(struct rtw89_dev *rtwdev, u8 kpath) -+{ -+ u32 rf_mode; -+ u8 path; -+ int ret; -+ -+ for (path = 0; path < RF_PATH_MAX; path++) { -+ if (!(kpath & BIT(path))) -+ continue; -+ -+ ret = read_poll_timeout_atomic(rtw89_read_rf, rf_mode, -+ rf_mode != 2, 2, 5000, false, -+ rtwdev, path, RR_MOD, RR_MOD_MASK); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK] Wait S%d to Rx mode!! (ret = %d)\n", path, ret); -+ } -+} -+ - void rtw8852b_rck(struct rtw89_dev *rtwdev) - { - u8 path; -@@ -505,6 +565,21 @@ void rtw8852b_dack(struct rtw89_dev *rtw - rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_STOP); - } - -+void rtw8852b_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); -+ u32 tx_en; -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_START); -+ rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); -+ _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); -+ -+ _rx_dck(rtwdev, phy_idx); -+ -+ rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_STOP); -+} -+ - static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, - enum rtw89_bandwidth bw, bool dav) - { ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h -@@ -9,6 +9,7 @@ - - void rtw8852b_rck(struct rtw89_dev *rtwdev); - void rtw8852b_dack(struct rtw89_dev *rtwdev); -+void rtw8852b_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); - void rtw8852b_set_channel_rf(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-038-wifi-rtw89-8852b-rfk-add-IQK.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-038-wifi-rtw89-8852b-rfk-add-IQK.patch deleted file mode 100644 index 485d85bd6..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-038-wifi-rtw89-8852b-rfk-add-IQK.patch +++ /dev/null @@ -1,1199 +0,0 @@ -From f2abe804e8230ff20a834e204bde529935df5467 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 12 Oct 2022 16:32:33 +0800 -Subject: [PATCH 038/149] wifi: rtw89: 8852b: rfk: add IQK - -IQ signal calibration is a very important calibration to yield good RF -performance. We do this calibration only if we are going to run on AP -channel. During scanning phase, without this calibration RF performance -is still acceptable because it transmits with low data rate at this phase. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221012083234.20224-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 19 + - .../net/wireless/realtek/rtw89/rtw8852b_rfk.c | 1046 +++++++++++++++++ - .../net/wireless/realtek/rtw89/rtw8852b_rfk.h | 1 + - 3 files changed, 1066 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3295,6 +3295,7 @@ - #define RR_MOD_IQK GENMASK(19, 4) - #define RR_MOD_DPK GENMASK(19, 5) - #define RR_MOD_MASK GENMASK(19, 16) -+#define RR_MOD_RGM GENMASK(13, 4) - #define RR_MOD_V_DOWN 0x0 - #define RR_MOD_V_STANDBY 0x1 - #define RR_MOD_V_TX 0x2 -@@ -3368,6 +3369,7 @@ - #define RR_RXK_PLLEN BIT(5) - #define RR_LUTWA 0x33 - #define RR_LUTWA_MASK GENMASK(9, 0) -+#define RR_LUTWA_M1 GENMASK(7, 0) - #define RR_LUTWA_M2 GENMASK(4, 0) - #define RR_LUTWD1 0x3e - #define RR_LUTWD0 0x3f -@@ -3417,6 +3419,8 @@ - #define RR_TXA2_LDO GENMASK(19, 16) - #define RR_TRXIQ 0x66 - #define RR_RSV6 0x6d -+#define RR_TXVBUF 0x7c -+#define RR_TXVBUF_DACEN BIT(5) - #define RR_TXPOW 0x7f - #define RR_TXPOW_TXA BIT(8) - #define RR_TXPOW_TXAS BIT(7) -@@ -3440,7 +3444,9 @@ - #define RR_RXA2 0x8c - #define RR_RXA2_C1 GENMASK(12, 10) - #define RR_RXA2_C2 GENMASK(9, 3) -+#define RR_RXA2_CC2 GENMASK(8, 7) - #define RR_RXA2_IATT GENMASK(7, 4) -+#define RR_RXA2_HATT GENMASK(6, 0) - #define RR_RXA2_ATT GENMASK(3, 0) - #define RR_RXIQGEN 0x8d - #define RR_RXIQGEN_ATTL GENMASK(12, 8) -@@ -3452,6 +3458,7 @@ - #define RR_RXBB2_IDAC GENMASK(11, 9) - #define RR_RXBB2_EBW GENMASK(6, 5) - #define RR_XALNA2 0x90 -+#define RR_XALNA2_SW2 GENMASK(9, 8) - #define RR_XALNA2_SW GENMASK(1, 0) - #define RR_DCK 0x92 - #define RR_DCK_DONE GENMASK(7, 5) -@@ -3532,6 +3539,8 @@ - #define R_RFE_O_SEL_A2 0x0338 - #define R_RFE_SEL0_A2 0x033C - #define R_RFE_SEL32_A2 0x0340 -+#define R_CIRST 0x035c -+#define B_CIRST_SYN GENMASK(11, 10) - #define R_SWSI_DATA_V1 0x0370 - #define B_SWSI_DATA_VAL_V1 GENMASK(19, 0) - #define B_SWSI_DATA_ADDR_V1 GENMASK(27, 20) -@@ -3779,6 +3788,11 @@ - #define B_P1_EN_SOUND_WO_NDP BIT(1) - #define R_S1_HW_SI_DIS 0x3200 - #define B_S1_HW_SI_DIS_W_R_TRIG GENMASK(30, 28) -+#define R_P1_RXCK 0x32A0 -+#define B_P1_RXCK_BW3 BIT(30) -+#define B_P1_TXCK_ALL GENMASK(19, 12) -+#define B_P1_RXCK_ON BIT(19) -+#define B_P1_RXCK_VAL GENMASK(18, 16) - #define R_P1_RFMODE 0x32AC - #define B_P1_RFMODE_ORI_TXRX_FTM_TX GENMASK(31, 4) - #define B_P1_RFMODE_MUX GENMASK(11, 4) -@@ -4109,6 +4123,7 @@ - #define R_P0_TSSI_AVG 0x5820 - #define B_P0_TSSI_AVG GENMASK(15, 12) - #define R_P0_RFCTM 0x5864 -+#define B_P0_RFCTM_EN BIT(29) - #define B_P0_RFCTM_VAL GENMASK(25, 20) - #define R_P0_RFCTM_RDY BIT(26) - #define R_P0_TRSW 0x5868 -@@ -4268,6 +4283,7 @@ - #define B_COEF_SEL_MDPD BIT(8) - #define R_CFIR_SYS 0x8120 - #define R_IQK_RES 0x8124 -+#define B_IQK_RES_K BIT(28) - #define B_IQK_RES_TXCFIR GENMASK(11, 8) - #define B_IQK_RES_RXCFIR GENMASK(3, 0) - #define R_TXIQC 0x8138 -@@ -4324,6 +4340,9 @@ - #define B_RPT_PER_TSSI GENMASK(28, 16) - #define B_RPT_PER_OF GENMASK(15, 8) - #define B_RPT_PER_TH GENMASK(5, 0) -+#define R_IQRSN 0x8220 -+#define B_IQRSN_K1 BIT(28) -+#define B_IQRSN_K2 BIT(16) - #define R_RXCFIR_P0C0 0x8D40 - #define R_RXCFIR_P0C1 0x8D84 - #define R_RXCFIR_P0C2 0x8DC8 ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -@@ -13,8 +13,189 @@ - #include "rtw8852b_table.h" - - #define RTW8852B_RXDCK_VER 0x1 -+#define RTW8852B_IQK_VER 0x2a -+#define RTW8852B_IQK_SS 2 -+#define RTW8852B_RXK_GROUP_NR 4 - #define ADDC_T_AVG 100 - -+enum rtw8852b_iqk_type { -+ ID_TXAGC = 0x0, -+ ID_FLOK_COARSE = 0x1, -+ ID_FLOK_FINE = 0x2, -+ ID_TXK = 0x3, -+ ID_RXAGC = 0x4, -+ ID_RXK = 0x5, -+ ID_NBTXK = 0x6, -+ ID_NBRXK = 0x7, -+ ID_FLOK_VBUFFER = 0x8, -+ ID_A_FLOK_COARSE = 0x9, -+ ID_G_FLOK_COARSE = 0xa, -+ ID_A_FLOK_FINE = 0xb, -+ ID_G_FLOK_FINE = 0xc, -+ ID_IQK_RESTORE = 0x10, -+}; -+ -+static const u32 _a_idxrxgain[RTW8852B_RXK_GROUP_NR] = {0x190, 0x198, 0x350, 0x352}; -+static const u32 _a_idxattc2[RTW8852B_RXK_GROUP_NR] = {0x0f, 0x0f, 0x3f, 0x7f}; -+static const u32 _a_idxattc1[RTW8852B_RXK_GROUP_NR] = {0x3, 0x1, 0x0, 0x0}; -+static const u32 _g_idxrxgain[RTW8852B_RXK_GROUP_NR] = {0x212, 0x21c, 0x350, 0x360}; -+static const u32 _g_idxattc2[RTW8852B_RXK_GROUP_NR] = {0x00, 0x00, 0x28, 0x5f}; -+static const u32 _g_idxattc1[RTW8852B_RXK_GROUP_NR] = {0x3, 0x3, 0x2, 0x1}; -+static const u32 _a_power_range[RTW8852B_RXK_GROUP_NR] = {0x0, 0x0, 0x0, 0x0}; -+static const u32 _a_track_range[RTW8852B_RXK_GROUP_NR] = {0x3, 0x3, 0x6, 0x6}; -+static const u32 _a_gain_bb[RTW8852B_RXK_GROUP_NR] = {0x08, 0x0e, 0x06, 0x0e}; -+static const u32 _a_itqt[RTW8852B_RXK_GROUP_NR] = {0x12, 0x12, 0x12, 0x1b}; -+static const u32 _g_power_range[RTW8852B_RXK_GROUP_NR] = {0x0, 0x0, 0x0, 0x0}; -+static const u32 _g_track_range[RTW8852B_RXK_GROUP_NR] = {0x4, 0x4, 0x6, 0x6}; -+static const u32 _g_gain_bb[RTW8852B_RXK_GROUP_NR] = {0x08, 0x0e, 0x06, 0x0e}; -+static const u32 _g_itqt[RTW8852B_RXK_GROUP_NR] = {0x09, 0x12, 0x1b, 0x24}; -+ -+static const u32 rtw8852b_backup_bb_regs[] = {0x2344, 0x5800, 0x7800}; -+static const u32 rtw8852b_backup_rf_regs[] = { -+ 0xde, 0xdf, 0x8b, 0x90, 0x97, 0x85, 0x1e, 0x0, 0x2, 0x5, 0x10005 -+}; -+ -+#define BACKUP_BB_REGS_NR ARRAY_SIZE(rtw8852b_backup_bb_regs) -+#define BACKUP_RF_REGS_NR ARRAY_SIZE(rtw8852b_backup_rf_regs) -+ -+static const struct rtw89_reg3_def rtw8852b_set_nondbcc_path01[] = { -+ {0x20fc, 0xffff0000, 0x0303}, -+ {0x5864, 0x18000000, 0x3}, -+ {0x7864, 0x18000000, 0x3}, -+ {0x12b8, 0x40000000, 0x1}, -+ {0x32b8, 0x40000000, 0x1}, -+ {0x030c, 0xff000000, 0x13}, -+ {0x032c, 0xffff0000, 0x0041}, -+ {0x12b8, 0x10000000, 0x1}, -+ {0x58c8, 0x01000000, 0x1}, -+ {0x78c8, 0x01000000, 0x1}, -+ {0x5864, 0xc0000000, 0x3}, -+ {0x7864, 0xc0000000, 0x3}, -+ {0x2008, 0x01ffffff, 0x1ffffff}, -+ {0x0c1c, 0x00000004, 0x1}, -+ {0x0700, 0x08000000, 0x1}, -+ {0x0c70, 0x000003ff, 0x3ff}, -+ {0x0c60, 0x00000003, 0x3}, -+ {0x0c6c, 0x00000001, 0x1}, -+ {0x58ac, 0x08000000, 0x1}, -+ {0x78ac, 0x08000000, 0x1}, -+ {0x0c3c, 0x00000200, 0x1}, -+ {0x2344, 0x80000000, 0x1}, -+ {0x4490, 0x80000000, 0x1}, -+ {0x12a0, 0x00007000, 0x7}, -+ {0x12a0, 0x00008000, 0x1}, -+ {0x12a0, 0x00070000, 0x3}, -+ {0x12a0, 0x00080000, 0x1}, -+ {0x32a0, 0x00070000, 0x3}, -+ {0x32a0, 0x00080000, 0x1}, -+ {0x0700, 0x01000000, 0x1}, -+ {0x0700, 0x06000000, 0x2}, -+ {0x20fc, 0xffff0000, 0x3333}, -+}; -+ -+static const struct rtw89_reg3_def rtw8852b_restore_nondbcc_path01[] = { -+ {0x20fc, 0xffff0000, 0x0303}, -+ {0x12b8, 0x40000000, 0x0}, -+ {0x32b8, 0x40000000, 0x0}, -+ {0x5864, 0xc0000000, 0x0}, -+ {0x7864, 0xc0000000, 0x0}, -+ {0x2008, 0x01ffffff, 0x0000000}, -+ {0x0c1c, 0x00000004, 0x0}, -+ {0x0700, 0x08000000, 0x0}, -+ {0x0c70, 0x0000001f, 0x03}, -+ {0x0c70, 0x000003e0, 0x03}, -+ {0x12a0, 0x000ff000, 0x00}, -+ {0x32a0, 0x000ff000, 0x00}, -+ {0x0700, 0x07000000, 0x0}, -+ {0x20fc, 0xffff0000, 0x0000}, -+ {0x58c8, 0x01000000, 0x0}, -+ {0x78c8, 0x01000000, 0x0}, -+ {0x0c3c, 0x00000200, 0x0}, -+ {0x2344, 0x80000000, 0x0}, -+}; -+ -+static void _rfk_backup_bb_reg(struct rtw89_dev *rtwdev, u32 backup_bb_reg_val[]) -+{ -+ u32 i; -+ -+ for (i = 0; i < BACKUP_BB_REGS_NR; i++) { -+ backup_bb_reg_val[i] = -+ rtw89_phy_read32_mask(rtwdev, rtw8852b_backup_bb_regs[i], -+ MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK]backup bb reg : %x, value =%x\n", -+ rtw8852b_backup_bb_regs[i], backup_bb_reg_val[i]); -+ } -+} -+ -+static void _rfk_backup_rf_reg(struct rtw89_dev *rtwdev, u32 backup_rf_reg_val[], -+ u8 rf_path) -+{ -+ u32 i; -+ -+ for (i = 0; i < BACKUP_RF_REGS_NR; i++) { -+ backup_rf_reg_val[i] = -+ rtw89_read_rf(rtwdev, rf_path, -+ rtw8852b_backup_rf_regs[i], RFREG_MASK); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK]backup rf S%d reg : %x, value =%x\n", rf_path, -+ rtw8852b_backup_rf_regs[i], backup_rf_reg_val[i]); -+ } -+} -+ -+static void _rfk_restore_bb_reg(struct rtw89_dev *rtwdev, -+ const u32 backup_bb_reg_val[]) -+{ -+ u32 i; -+ -+ for (i = 0; i < BACKUP_BB_REGS_NR; i++) { -+ rtw89_phy_write32_mask(rtwdev, rtw8852b_backup_bb_regs[i], -+ MASKDWORD, backup_bb_reg_val[i]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK]restore bb reg : %x, value =%x\n", -+ rtw8852b_backup_bb_regs[i], backup_bb_reg_val[i]); -+ } -+} -+ -+static void _rfk_restore_rf_reg(struct rtw89_dev *rtwdev, -+ const u32 backup_rf_reg_val[], u8 rf_path) -+{ -+ u32 i; -+ -+ for (i = 0; i < BACKUP_RF_REGS_NR; i++) { -+ rtw89_write_rf(rtwdev, rf_path, rtw8852b_backup_rf_regs[i], -+ RFREG_MASK, backup_rf_reg_val[i]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK]restore rf S%d reg: %x, value =%x\n", rf_path, -+ rtw8852b_backup_rf_regs[i], backup_rf_reg_val[i]); -+ } -+} -+ -+static bool _iqk_check_cal(struct rtw89_dev *rtwdev, u8 path) -+{ -+ bool fail = true; -+ u32 val; -+ int ret; -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val == 0x55, -+ 1, 8200, false, rtwdev, 0xbff8, MASKBYTE0); -+ if (ret) -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]NCTL1 IQK timeout!!!\n"); -+ -+ udelay(200); -+ -+ if (!ret) -+ fail = rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, B_NCTL_RPT_FLG); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, MASKBYTE0, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, ret=%d\n", path, ret); -+ val = rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x8008 = 0x%x\n", path, val); -+ -+ return fail; -+} -+ - static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) - { - u8 val; -@@ -530,6 +711,803 @@ static void _dac_cal(struct rtw89_dev *r - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK finish!!!\n"); - } - -+static void _iqk_rxk_setting(struct rtw89_dev *rtwdev, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u32 tmp; -+ -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); -+ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL2G, 0x1); -+ tmp = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK); -+ rtw89_write_rf(rtwdev, path, RR_RSV4, RFREG_MASK, tmp); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); -+ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL5G, 0x1); -+ tmp = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK); -+ rtw89_write_rf(rtwdev, path, RR_RSV4, RFREG_MASK, tmp); -+ break; -+ default: -+ break; -+ } -+} -+ -+static bool _iqk_one_shot(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ u8 path, u8 ktype) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u32 iqk_cmd; -+ bool fail; -+ -+ switch (ktype) { -+ case ID_FLOK_COARSE: -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1); -+ iqk_cmd = 0x108 | (1 << (4 + path)); -+ break; -+ case ID_FLOK_FINE: -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1); -+ iqk_cmd = 0x208 | (1 << (4 + path)); -+ break; -+ case ID_FLOK_VBUFFER: -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1); -+ iqk_cmd = 0x308 | (1 << (4 + path)); -+ break; -+ case ID_TXK: -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x0); -+ iqk_cmd = 0x008 | (1 << (path + 4)) | -+ (((0x8 + iqk_info->iqk_bw[path]) & 0xf) << 8); -+ break; -+ case ID_RXAGC: -+ iqk_cmd = 0x508 | (1 << (4 + path)) | (path << 1); -+ break; -+ case ID_RXK: -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1); -+ iqk_cmd = 0x008 | (1 << (path + 4)) | -+ (((0xb + iqk_info->iqk_bw[path]) & 0xf) << 8); -+ break; -+ case ID_NBTXK: -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x011); -+ iqk_cmd = 0x308 | (1 << (4 + path)); -+ break; -+ case ID_NBRXK: -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); -+ iqk_cmd = 0x608 | (1 << (4 + path)); -+ break; -+ default: -+ return false; -+ } -+ -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, iqk_cmd + 1); -+ udelay(1); -+ fail = _iqk_check_cal(rtwdev, path); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x0); -+ -+ return fail; -+} -+ -+static bool _rxk_group_sel(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool kfail = false; -+ bool fail; -+ u8 gp; -+ -+ for (gp = 0; gp < RTW8852B_RXK_GROUP_NR; gp++) { -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RGM, -+ _g_idxrxgain[gp]); -+ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C2G, -+ _g_idxattc2[gp]); -+ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C1G, -+ _g_idxattc1[gp]); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RGM, -+ _a_idxrxgain[gp]); -+ rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_HATT, -+ _a_idxattc2[gp]); -+ rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_CC2, -+ _a_idxattc1[gp]); -+ break; -+ default: -+ break; -+ } -+ -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), -+ B_CFIR_LUT_SEL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), -+ B_CFIR_LUT_SET, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), -+ B_CFIR_LUT_GP_V1, gp); -+ fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, -+ BIT(16 + gp + path * 4), fail); -+ kfail |= fail; -+ } -+ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL5G, 0x0); -+ -+ if (kfail) { -+ iqk_info->nb_rxcfir[path] = 0x40000002; -+ rtw89_phy_write32_mask(rtwdev, R_IQK_RES + (path << 8), -+ B_IQK_RES_RXCFIR, 0x0); -+ iqk_info->is_wb_rxiqk[path] = false; -+ } else { -+ iqk_info->nb_rxcfir[path] = 0x40000000; -+ rtw89_phy_write32_mask(rtwdev, R_IQK_RES + (path << 8), -+ B_IQK_RES_RXCFIR, 0x5); -+ iqk_info->is_wb_rxiqk[path] = true; -+ } -+ -+ return kfail; -+} -+ -+static bool _iqk_nbrxk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ const u8 gp = 0x3; -+ bool kfail = false; -+ bool fail; -+ -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RGM, -+ _g_idxrxgain[gp]); -+ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C2G, -+ _g_idxattc2[gp]); -+ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C1G, -+ _g_idxattc1[gp]); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RGM, -+ _a_idxrxgain[gp]); -+ rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_HATT, -+ _a_idxattc2[gp]); -+ rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RXA2_CC2, -+ _a_idxattc1[gp]); -+ break; -+ default: -+ break; -+ } -+ -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SET, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP_V1, gp); -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RFREG_MASK, 0x80013); -+ udelay(1); -+ -+ fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, BIT(16 + gp + path * 4), fail); -+ kfail |= fail; -+ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_SEL5G, 0x0); -+ -+ if (!kfail) -+ iqk_info->nb_rxcfir[path] = -+ rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD) | 0x2; -+ else -+ iqk_info->nb_rxcfir[path] = 0x40000002; -+ -+ return kfail; -+} -+ -+static void _iqk_rxclk_setting(struct rtw89_dev *rtwdev, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ -+ if (iqk_info->iqk_bw[path] == RTW89_CHANNEL_WIDTH_80) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON, 0x1); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x0f); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x03); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0xa001); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0xa041); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RXCK, B_P0_RXCK_VAL, 0x2); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RXCK, B_P0_RXCK_ON, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RXCK, B_P1_RXCK_VAL, 0x2); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RXCK, B_P1_RXCK_ON, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_UPD_CLK_ADC_ON, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_UPD_CLK_ADC_VAL, 0x1); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON, 0x1); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x0f); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x03); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0xa001); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0xa041); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RXCK, B_P0_RXCK_VAL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RXCK, B_P0_RXCK_ON, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RXCK, B_P1_RXCK_VAL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RXCK, B_P1_RXCK_ON, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_UPD_CLK_ADC_ON, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_UPD_CLK_ADC_VAL, 0x0); -+ } -+} -+ -+static bool _txk_group_sel(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool kfail = false; -+ bool fail; -+ u8 gp; -+ -+ for (gp = 0x0; gp < RTW8852B_RXK_GROUP_NR; gp++) { -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, -+ _g_power_range[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, -+ _g_track_range[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, -+ _g_gain_bb[gp]); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), -+ MASKDWORD, _g_itqt[gp]); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, -+ _a_power_range[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, -+ _a_track_range[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, -+ _a_gain_bb[gp]); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), -+ MASKDWORD, _a_itqt[gp]); -+ break; -+ default: -+ break; -+ } -+ -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), -+ B_CFIR_LUT_SEL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), -+ B_CFIR_LUT_SET, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), -+ B_CFIR_LUT_G2, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), -+ B_CFIR_LUT_GP, gp); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00); -+ fail = _iqk_one_shot(rtwdev, phy_idx, path, ID_TXK); -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, -+ BIT(8 + gp + path * 4), fail); -+ kfail |= fail; -+ } -+ -+ if (kfail) { -+ iqk_info->nb_txcfir[path] = 0x40000002; -+ rtw89_phy_write32_mask(rtwdev, R_IQK_RES + (path << 8), -+ B_IQK_RES_TXCFIR, 0x0); -+ iqk_info->is_wb_txiqk[path] = false; -+ } else { -+ iqk_info->nb_txcfir[path] = 0x40000000; -+ rtw89_phy_write32_mask(rtwdev, R_IQK_RES + (path << 8), -+ B_IQK_RES_TXCFIR, 0x5); -+ iqk_info->is_wb_txiqk[path] = true; -+ } -+ -+ return kfail; -+} -+ -+static bool _iqk_nbtxk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool kfail; -+ u8 gp = 0x3; -+ -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, -+ _g_power_range[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, -+ _g_track_range[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, -+ _g_gain_bb[gp]); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), -+ MASKDWORD, _g_itqt[gp]); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, -+ _a_power_range[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, -+ _a_track_range[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, -+ _a_gain_bb[gp]); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), -+ MASKDWORD, _a_itqt[gp]); -+ break; -+ default: -+ break; -+ } -+ -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SEL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_SET, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G2, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_GP, gp); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00); -+ kfail = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); -+ -+ if (!kfail) -+ iqk_info->nb_txcfir[path] = -+ rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), -+ MASKDWORD) | 0x2; -+ else -+ iqk_info->nb_txcfir[path] = 0x40000002; -+ -+ return kfail; -+} -+ -+static void _lok_res_table(struct rtw89_dev *rtwdev, u8 path, u8 ibias) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, ibias = %x\n", path, ibias); -+ -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x2); -+ if (iqk_info->iqk_band[path] == RTW89_BAND_2G) -+ rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, 0x0); -+ else -+ rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, ibias); -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_TXVBUF, RR_TXVBUF_DACEN, 0x1); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x7c = %x\n", path, -+ rtw89_read_rf(rtwdev, path, RR_TXVBUF, RFREG_MASK)); -+} -+ -+static bool _lok_finetune_check(struct rtw89_dev *rtwdev, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool is_fail1, is_fail2; -+ u32 vbuff_i; -+ u32 vbuff_q; -+ u32 core_i; -+ u32 core_q; -+ u32 tmp; -+ u8 ch; -+ -+ tmp = rtw89_read_rf(rtwdev, path, RR_TXMO, RFREG_MASK); -+ core_i = FIELD_GET(RR_TXMO_COI, tmp); -+ core_q = FIELD_GET(RR_TXMO_COQ, tmp); -+ ch = (iqk_info->iqk_times / 2) % RTW89_IQK_CHS_NR; -+ -+ if (core_i < 0x2 || core_i > 0x1d || core_q < 0x2 || core_q > 0x1d) -+ is_fail1 = true; -+ else -+ is_fail1 = false; -+ -+ iqk_info->lok_idac[ch][path] = tmp; -+ -+ tmp = rtw89_read_rf(rtwdev, path, RR_LOKVB, RFREG_MASK); -+ vbuff_i = FIELD_GET(RR_LOKVB_COI, tmp); -+ vbuff_q = FIELD_GET(RR_LOKVB_COQ, tmp); -+ -+ if (vbuff_i < 0x2 || vbuff_i > 0x3d || vbuff_q < 0x2 || vbuff_q > 0x3d) -+ is_fail2 = true; -+ else -+ is_fail2 = false; -+ -+ iqk_info->lok_vbuf[ch][path] = tmp; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, lok_idac[%x][%x] = 0x%x\n", path, ch, path, -+ iqk_info->lok_idac[ch][path]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, lok_vbuf[%x][%x] = 0x%x\n", path, ch, path, -+ iqk_info->lok_vbuf[ch][path]); -+ -+ return is_fail1 | is_fail2; -+} -+ -+static bool _iqk_lok(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool tmp; -+ -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x021); -+ -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x6); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x4); -+ break; -+ default: -+ break; -+ } -+ -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x0); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x0); -+ break; -+ default: -+ break; -+ } -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), MASKDWORD, 0x9); -+ tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_COARSE); -+ iqk_info->lok_cor_fail[0][path] = tmp; -+ -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); -+ break; -+ default: -+ break; -+ } -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), MASKDWORD, 0x24); -+ tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_VBUFFER); -+ -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x0); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x0); -+ break; -+ default: -+ break; -+ } -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), MASKDWORD, 0x9); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x021); -+ tmp = _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_FINE); -+ iqk_info->lok_fin_fail[0][path] = tmp; -+ -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0x12); -+ break; -+ default: -+ break; -+ } -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), MASKDWORD, 0x24); -+ _iqk_one_shot(rtwdev, phy_idx, path, ID_FLOK_VBUFFER); -+ -+ return _lok_finetune_check(rtwdev, path); -+} -+ -+static void _iqk_txk_setting(struct rtw89_dev *rtwdev, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_write_rf(rtwdev, path, RR_XALNA2, RR_XALNA2_SW2, 0x00); -+ rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT2, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_TXG1, RR_TXG1_ATT1, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_TXG2, RR_TXG2_ATT0, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EXT, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_M1, 0x00); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_IQK, 0x403e); -+ udelay(1); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_write_rf(rtwdev, path, RR_XGLNA2, RR_XGLNA2_SW, 0x00); -+ rtw89_write_rf(rtwdev, path, RR_BIASA, RR_BIASA_A, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_TXGA, RR_TXGA_LOK_EXT, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_M1, 0x80); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_IQK, 0x403e); -+ udelay(1); -+ break; -+ default: -+ break; -+ } -+} -+ -+static void _iqk_txclk_setting(struct rtw89_dev *rtwdev, u8 path) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_DBGMOD, B_P1_DBGMOD_ON, 0x1); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x1f); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x13); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0x0001); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ANAPAR, B_ANAPAR_15, 0x0041); -+} -+ -+static void _iqk_info_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u32 tmp; -+ bool flag; -+ -+ iqk_info->thermal[path] = -+ ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); -+ iqk_info->thermal_rek_en = false; -+ -+ flag = iqk_info->lok_cor_fail[0][path]; -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FCOR << (path * 4), flag); -+ flag = iqk_info->lok_fin_fail[0][path]; -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FFIN << (path * 4), flag); -+ flag = iqk_info->iqk_tx_fail[0][path]; -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FTX << (path * 4), flag); -+ flag = iqk_info->iqk_rx_fail[0][path]; -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_F_RX << (path * 4), flag); -+ -+ tmp = rtw89_phy_read32_mask(rtwdev, R_IQK_RES + (path << 8), MASKDWORD); -+ iqk_info->bp_iqkenable[path] = tmp; -+ tmp = rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD); -+ iqk_info->bp_txkresult[path] = tmp; -+ tmp = rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD); -+ iqk_info->bp_rxkresult[path] = tmp; -+ -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF2, B_IQKINF2_KCNT, iqk_info->iqk_times); -+ -+ tmp = rtw89_phy_read32_mask(rtwdev, R_IQKINF, B_IQKINF_FAIL << (path * 4)); -+ if (tmp) -+ iqk_info->iqk_fail_cnt++; -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF2, B_IQKINF2_FCNT << (path * 4), -+ iqk_info->iqk_fail_cnt); -+} -+ -+static void _iqk_by_path(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool lok_is_fail = false; -+ const int try = 3; -+ u8 ibias = 0x1; -+ u8 i; -+ -+ _iqk_txclk_setting(rtwdev, path); -+ -+ /* LOK */ -+ for (i = 0; i < try; i++) { -+ _lok_res_table(rtwdev, path, ibias++); -+ _iqk_txk_setting(rtwdev, path); -+ lok_is_fail = _iqk_lok(rtwdev, phy_idx, path); -+ if (!lok_is_fail) -+ break; -+ } -+ -+ if (lok_is_fail) -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] LOK (%d) fail\n", path); -+ -+ /* TXK */ -+ if (iqk_info->is_nbiqk) -+ iqk_info->iqk_tx_fail[0][path] = _iqk_nbtxk(rtwdev, phy_idx, path); -+ else -+ iqk_info->iqk_tx_fail[0][path] = _txk_group_sel(rtwdev, phy_idx, path); -+ -+ /* RX */ -+ _iqk_rxclk_setting(rtwdev, path); -+ _iqk_rxk_setting(rtwdev, path); -+ if (iqk_info->is_nbiqk) -+ iqk_info->iqk_rx_fail[0][path] = _iqk_nbrxk(rtwdev, phy_idx, path); -+ else -+ iqk_info->iqk_rx_fail[0][path] = _rxk_group_sel(rtwdev, phy_idx, path); -+ -+ _iqk_info_iqk(rtwdev, phy_idx, path); -+} -+ -+static void _iqk_get_ch_info(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, u8 path) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u32 reg_rf18; -+ u32 reg_35c; -+ u8 idx; -+ u8 get_empty_table = false; -+ -+ for (idx = 0; idx < RTW89_IQK_CHS_NR; idx++) { -+ if (iqk_info->iqk_mcc_ch[idx][path] == 0) { -+ get_empty_table = true; -+ break; -+ } -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] (1)idx = %x\n", idx); -+ -+ if (!get_empty_table) { -+ idx = iqk_info->iqk_table_idx[path] + 1; -+ if (idx > 1) -+ idx = 0; -+ } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] (2)idx = %x\n", idx); -+ -+ reg_rf18 = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK); -+ reg_35c = rtw89_phy_read32_mask(rtwdev, R_CIRST, B_CIRST_SYN); -+ -+ iqk_info->iqk_band[path] = chan->band_type; -+ iqk_info->iqk_bw[path] = chan->band_width; -+ iqk_info->iqk_ch[path] = chan->channel; -+ iqk_info->iqk_mcc_ch[idx][path] = chan->channel; -+ iqk_info->iqk_table_idx[path] = idx; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x18= 0x%x, idx = %x\n", -+ path, reg_rf18, idx); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, 0x18= 0x%x\n", -+ path, reg_rf18); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]times = 0x%x, ch =%x\n", -+ iqk_info->iqk_times, idx); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]iqk_mcc_ch[%x][%x] = 0x%x\n", -+ idx, path, iqk_info->iqk_mcc_ch[idx][path]); -+ -+ if (reg_35c == 0x01) -+ iqk_info->syn1to2 = 0x1; -+ else -+ iqk_info->syn1to2 = 0x0; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, iqk_info->syn1to2= 0x%x\n", path, -+ iqk_info->syn1to2); -+ -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_VER, RTW8852B_IQK_VER); -+ /* 2GHz/5GHz/6GHz = 0/1/2 */ -+ rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_BAND << (path * 16), -+ iqk_info->iqk_band[path]); -+ /* 20/40/80 = 0/1/2 */ -+ rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_BW << (path * 16), -+ iqk_info->iqk_bw[path]); -+ rtw89_phy_write32_mask(rtwdev, R_IQKCH, B_IQKCH_CH << (path * 16), -+ iqk_info->iqk_ch[path]); -+} -+ -+static void _iqk_start_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ _iqk_by_path(rtwdev, phy_idx, path); -+} -+ -+static void _iqk_restore(struct rtw89_dev *rtwdev, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool fail; -+ -+ rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), MASKDWORD, -+ iqk_info->nb_txcfir[path]); -+ rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, -+ iqk_info->nb_rxcfir[path]); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, -+ 0x00000e19 + (path << 4)); -+ fail = _iqk_check_cal(rtwdev, path); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "%s result =%x\n", __func__, fail); -+ -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000000); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x80000000); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_SYS, B_IQK_RES_K, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_IQRSN, B_IQRSN_K1, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_IQRSN, B_IQRSN_K2, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, RR_LUTWE_LOK, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0x3); -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x1); -+} -+ -+static void _iqk_afebb_restore(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ const struct rtw89_reg3_def *def; -+ int size; -+ u8 kpath; -+ int i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "===> %s\n", __func__); -+ -+ kpath = _kpath(rtwdev, phy_idx); -+ -+ switch (kpath) { -+ case RF_A: -+ case RF_B: -+ return; -+ default: -+ size = ARRAY_SIZE(rtw8852b_restore_nondbcc_path01); -+ def = rtw8852b_restore_nondbcc_path01; -+ break; -+ } -+ -+ for (i = 0; i < size; i++, def++) -+ rtw89_phy_write32_mask(rtwdev, def->addr, def->mask, def->data); -+} -+ -+static void _iqk_preset(struct rtw89_dev *rtwdev, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u8 idx; -+ -+ idx = iqk_info->iqk_table_idx[path]; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] (3)idx = %x\n", idx); -+ -+ rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), B_COEF_SEL_IQC, idx); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3, idx); -+ -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000080); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x81ff010a); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK](1)S%x, 0x8%x54 = 0x%x\n", path, 1 << path, -+ rtw89_phy_read32_mask(rtwdev, R_CFIR_LUT + (path << 8), MASKDWORD)); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK](1)S%x, 0x8%x04 = 0x%x\n", path, 1 << path, -+ rtw89_phy_read32_mask(rtwdev, R_COEF_SEL + (path << 8), MASKDWORD)); -+} -+ -+static void _iqk_macbb_setting(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ const struct rtw89_reg3_def *def; -+ int size; -+ u8 kpath; -+ int i; -+ -+ kpath = _kpath(rtwdev, phy_idx); -+ -+ switch (kpath) { -+ case RF_A: -+ case RF_B: -+ return; -+ default: -+ size = ARRAY_SIZE(rtw8852b_set_nondbcc_path01); -+ def = rtw8852b_set_nondbcc_path01; -+ break; -+ } -+ -+ for (i = 0; i < size; i++, def++) -+ rtw89_phy_write32_mask(rtwdev, def->addr, def->mask, def->data); -+} -+ -+static void _iqk_init(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u8 idx, path; -+ -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, MASKDWORD, 0x0); -+ if (iqk_info->is_iqk_init) -+ return; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ iqk_info->is_iqk_init = true; -+ iqk_info->is_nbiqk = false; -+ iqk_info->iqk_fft_en = false; -+ iqk_info->iqk_sram_en = false; -+ iqk_info->iqk_cfir_en = false; -+ iqk_info->iqk_xym_en = false; -+ iqk_info->thermal_rek_en = false; -+ iqk_info->iqk_times = 0x0; -+ -+ for (idx = 0; idx < RTW89_IQK_CHS_NR; idx++) { -+ iqk_info->iqk_channel[idx] = 0x0; -+ for (path = 0; path < RTW8852B_IQK_SS; path++) { -+ iqk_info->lok_cor_fail[idx][path] = false; -+ iqk_info->lok_fin_fail[idx][path] = false; -+ iqk_info->iqk_tx_fail[idx][path] = false; -+ iqk_info->iqk_rx_fail[idx][path] = false; -+ iqk_info->iqk_mcc_ch[idx][path] = 0x0; -+ iqk_info->iqk_table_idx[path] = 0x0; -+ } -+ } -+} -+ - static void _wait_rx_mode(struct rtw89_dev *rtwdev, u8 kpath) - { - u32 rf_mode; -@@ -548,6 +1526,58 @@ static void _wait_rx_mode(struct rtw89_d - } - } - -+static void _doiqk(struct rtw89_dev *rtwdev, bool force, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u32 backup_bb_val[BACKUP_BB_REGS_NR]; -+ u32 backup_rf_val[RTW8852B_IQK_SS][BACKUP_RF_REGS_NR]; -+ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, RF_AB); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_START); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]==========IQK strat!!!!!==========\n"); -+ iqk_info->iqk_times++; -+ iqk_info->kcount = 0; -+ iqk_info->version = RTW8852B_IQK_VER; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]Test Ver 0x%x\n", iqk_info->version); -+ _iqk_get_ch_info(rtwdev, phy_idx, path); -+ -+ _rfk_backup_bb_reg(rtwdev, &backup_bb_val[0]); -+ _rfk_backup_rf_reg(rtwdev, &backup_rf_val[path][0], path); -+ _iqk_macbb_setting(rtwdev, phy_idx, path); -+ _iqk_preset(rtwdev, path); -+ _iqk_start_iqk(rtwdev, phy_idx, path); -+ _iqk_restore(rtwdev, path); -+ _iqk_afebb_restore(rtwdev, phy_idx, path); -+ _rfk_restore_bb_reg(rtwdev, &backup_bb_val[0]); -+ _rfk_restore_rf_reg(rtwdev, &backup_rf_val[path][0], path); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_STOP); -+} -+ -+static void _iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, bool force) -+{ -+ u8 kpath = _kpath(rtwdev, phy_idx); -+ -+ switch (kpath) { -+ case RF_A: -+ _doiqk(rtwdev, force, phy_idx, RF_PATH_A); -+ break; -+ case RF_B: -+ _doiqk(rtwdev, force, phy_idx, RF_PATH_B); -+ break; -+ case RF_AB: -+ _doiqk(rtwdev, force, phy_idx, RF_PATH_A); -+ _doiqk(rtwdev, force, phy_idx, RF_PATH_B); -+ break; -+ default: -+ break; -+ } -+} -+ - void rtw8852b_rck(struct rtw89_dev *rtwdev) - { - u8 path; -@@ -565,6 +1595,22 @@ void rtw8852b_dack(struct rtw89_dev *rtw - rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DACK, BTC_WRFK_STOP); - } - -+void rtw8852b_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); -+ u32 tx_en; -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_START); -+ rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); -+ _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); -+ -+ _iqk_init(rtwdev); -+ _iqk(rtwdev, phy_idx, false); -+ -+ rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_STOP); -+} -+ - void rtw8852b_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) - { - u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h -@@ -9,6 +9,7 @@ - - void rtw8852b_rck(struct rtw89_dev *rtwdev); - void rtw8852b_dack(struct rtw89_dev *rtwdev); -+void rtw8852b_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); - void rtw8852b_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); - void rtw8852b_set_channel_rf(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-039-wifi-rtw89-8852b-rfk-add-TSSI.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-039-wifi-rtw89-8852b-rfk-add-TSSI.patch deleted file mode 100644 index 8282c4099..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-039-wifi-rtw89-8852b-rfk-add-TSSI.patch +++ /dev/null @@ -1,1407 +0,0 @@ -From 7f18a70d7b4d2a0e54ce542c222aeffc464ed9f3 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 12 Oct 2022 16:32:34 +0800 -Subject: [PATCH 039/149] wifi: rtw89: 8852b: rfk: add TSSI - -TSSI is transmitter signal strength indication, which is a close-loop -hardware circuit to feedback actual transmitting power as a reference for -next transmission. - -When we setup channel to connect an AP, it does full calibration. When -switching bands or channels, it needs to reset hardware status to prevent -use wrong feedback of previous transmission. - -To do TX power compensation reflecting current temperature, it loads tables -of compensation values into registers according to channel and band group. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221012083234.20224-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 15 + - drivers/net/wireless/realtek/rtw89/reg.h | 43 + - .../net/wireless/realtek/rtw89/rtw8852b_rfk.c | 1174 +++++++++++++++++ - .../net/wireless/realtek/rtw89/rtw8852b_rfk.h | 4 + - 4 files changed, 1236 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3164,6 +3164,14 @@ struct rtw89_cfo_tracking_info { - u8 lock_cnt; - }; - -+enum rtw89_tssi_alimk_band { -+ TSSI_ALIMK_2G = 0, -+ TSSI_ALIMK_5GL, -+ TSSI_ALIMK_5GM, -+ TSSI_ALIMK_5GH, -+ TSSI_ALIMK_MAX -+}; -+ - /* 2GL, 2GH, 5GL1, 5GH1, 5GM1, 5GM2, 5GH1, 5GH2 */ - #define TSSI_TRIM_CH_GROUP_NUM 8 - #define TSSI_TRIM_CH_GROUP_NUM_6G 16 -@@ -3174,6 +3182,8 @@ struct rtw89_cfo_tracking_info { - #define TSSI_MCS_6G_CH_GROUP_NUM 32 - #define TSSI_MCS_CH_GROUP_NUM \ - (TSSI_MCS_2G_CH_GROUP_NUM + TSSI_MCS_5G_CH_GROUP_NUM) -+#define TSSI_MAX_CH_NUM 67 -+#define TSSI_ALIMK_VALUE_NUM 8 - - struct rtw89_tssi_info { - u8 thermal[RF_PATH_MAX]; -@@ -3186,6 +3196,11 @@ struct rtw89_tssi_info { - bool tssi_tracking_check[RF_PATH_MAX]; - u8 default_txagc_offset[RF_PATH_MAX]; - u32 base_thermal[RF_PATH_MAX]; -+ bool check_backup_aligmk[RF_PATH_MAX][TSSI_MAX_CH_NUM]; -+ u32 alignment_backup_by_ch[RF_PATH_MAX][TSSI_MAX_CH_NUM][TSSI_ALIMK_VALUE_NUM]; -+ u32 alignment_value[RF_PATH_MAX][TSSI_ALIMK_MAX][TSSI_ALIMK_VALUE_NUM]; -+ bool alignment_done[RF_PATH_MAX][TSSI_ALIMK_MAX]; -+ u32 tssi_alimk_time; - }; - - struct rtw89_power_trim_info { ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3389,6 +3389,8 @@ - #define RR_TXGA_TRK_EN BIT(7) - #define RR_TXGA_LOK_EXT GENMASK(4, 0) - #define RR_TXGA_LOK_EN BIT(0) -+#define RR_TXGA_V1 0x10055 -+#define RR_TXGA_V1_TRK_EN BIT(7) - #define RR_GAINTX 0x56 - #define RR_GAINTX_ALL GENMASK(15, 0) - #define RR_GAINTX_PAD GENMASK(9, 5) -@@ -3732,6 +3734,9 @@ - #define B_TXAGC_TP GENMASK(2, 0) - #define R_TSSI_THER 0x1C10 - #define B_TSSI_THER GENMASK(29, 24) -+#define R_TSSI_CWRPT 0x1C18 -+#define B_TSSI_CWRPT_RDY BIT(16) -+#define B_TSSI_CWRPT GENMASK(8, 0) - #define R_TXAGC_BTP 0x1CA0 - #define B_TXAGC_BTP GENMASK(31, 24) - #define R_TXAGC_BB 0x1C60 -@@ -4094,6 +4099,20 @@ - #define B_CFO_COMP_VALID_BIT BIT(29) - #define B_CFO_COMP_WEIGHT_MSK GENMASK(27, 24) - #define B_CFO_COMP_VAL_MSK GENMASK(11, 0) -+#define R_TSSI_PA_K1 0x5600 -+#define R_TSSI_PA_K2 0x5604 -+#define R_P0_TSSI_ALIM1 0x5630 -+#define B_P0_TSSI_ALIM1 GENMASK(29, 0) -+#define B_P0_TSSI_ALIM11 GENMASK(29, 20) -+#define B_P0_TSSI_ALIM12 GENMASK(19, 10) -+#define B_P0_TSSI_ALIM13 GENMASK(9, 0) -+#define R_P0_TSSI_ALIM3 0x5634 -+#define B_P0_TSSI_ALIM31 GENMASK(9, 0) -+#define R_TSSI_PA_K5 0x5638 -+#define R_P0_TSSI_ALIM2 0x563c -+#define B_P0_TSSI_ALIM2 GENMASK(29, 0) -+#define R_P0_TSSI_ALIM4 0x5640 -+#define R_TSSI_PA_K8 0x5644 - #define R_UPD_CLK 0x5670 - #define B_DAC_VAL BIT(31) - #define B_ACK_VAL GENMASK(30, 29) -@@ -4108,6 +4127,8 @@ - #define B_DPD_TSSI_CW GENMASK(26, 18) - #define B_DPD_PWR_CW GENMASK(17, 9) - #define B_DPD_REF GENMASK(8, 0) -+#define R_P0_TSSIC 0x5814 -+#define B_P0_TSSIC_BYPASS BIT(11) - #define R_DPD_OFT_ADDR 0x5804 - #define B_DPD_OFT_ADDR GENMASK(31, 27) - #define R_TXPWRB_H 0x580c -@@ -4116,11 +4137,15 @@ - #define B_P0_TMETER GENMASK(15, 10) - #define B_P0_TMETER_DIS BIT(16) - #define B_P0_TMETER_TRK BIT(24) -+#define R_P1_TSSIC 0x7814 -+#define B_P1_TSSIC_BYPASS BIT(11) - #define R_P0_TSSI_TRK 0x5818 - #define B_P0_TSSI_TRK_EN BIT(30) -+#define B_P0_TSSI_RFC GENMASK(28, 27) - #define B_P0_TSSI_OFT_EN BIT(28) - #define B_P0_TSSI_OFT GENMASK(7, 0) - #define R_P0_TSSI_AVG 0x5820 -+#define B_P0_TSSI_EN BIT(31) - #define B_P0_TSSI_AVG GENMASK(15, 12) - #define R_P0_RFCTM 0x5864 - #define B_P0_RFCTM_EN BIT(29) -@@ -4143,7 +4168,9 @@ - #define B_P0_TXPW_RSTB_MANON BIT(30) - #define B_P0_TXPW_RSTB_TSSI BIT(31) - #define R_P0_TSSI_MV_AVG 0x58E4 -+#define B_P0_TSSI_MV_MIX GENMASK(19, 11) - #define B_P0_TSSI_MV_AVG GENMASK(13, 11) -+#define B_P0_TSSI_MV_CLR BIT(14) - #define R_TXGAIN_SCALE 0x58F0 - #define B_TXGAIN_SCALE_EN BIT(19) - #define B_TXGAIN_SCALE_OFT GENMASK(31, 24) -@@ -4168,25 +4195,41 @@ - #define B_S0_DACKQ8_K GENMASK(15, 8) - #define R_RPL_BIAS_COMP1 0x6DF0 - #define B_RPL_BIAS_COMP1_MASK GENMASK(7, 0) -+#define R_P1_TSSI_ALIM1 0x7630 -+#define B_P1_TSSI_ALIM1 GENMASK(29, 0) -+#define B_P1_TSSI_ALIM11 GENMASK(29, 20) -+#define B_P1_TSSI_ALIM12 GENMASK(19, 10) -+#define B_P1_TSSI_ALIM13 GENMASK(9, 0) -+#define R_P1_TSSI_ALIM3 0x7634 -+#define B_P1_TSSI_ALIM31 GENMASK(9, 0) -+#define R_P1_TSSI_ALIM2 0x763c -+#define B_P1_TSSI_ALIM2 GENMASK(29, 0) -+#define R_P1_TSSIC 0x7814 -+#define B_P1_TSSIC_BYPASS BIT(11) - #define R_P1_TMETER 0x7810 - #define B_P1_TMETER GENMASK(15, 10) - #define B_P1_TMETER_DIS BIT(16) - #define B_P1_TMETER_TRK BIT(24) - #define R_P1_TSSI_TRK 0x7818 - #define B_P1_TSSI_TRK_EN BIT(30) -+#define B_P1_TSSI_RFC GENMASK(28, 27) - #define B_P1_TSSI_OFT_EN BIT(28) - #define B_P1_TSSI_OFT GENMASK(7, 0) - #define R_P1_TSSI_AVG 0x7820 -+#define B_P1_TSSI_EN BIT(31) - #define B_P1_TSSI_AVG GENMASK(15, 12) - #define R_P1_RFCTM 0x7864 - #define R_P1_RFCTM_RDY BIT(26) - #define B_P1_RFCTM_VAL GENMASK(25, 20) -+#define B_P1_RFCTM_DEL GENMASK(19, 11) - #define R_P1_PATH_RST 0x78AC - #define R_P1_TXPW_RSTB 0x78DC - #define B_P1_TXPW_RSTB_MANON BIT(30) - #define B_P1_TXPW_RSTB_TSSI BIT(31) - #define R_P1_TSSI_MV_AVG 0x78E4 -+#define B_P1_TSSI_MV_MIX GENMASK(19, 11) - #define B_P1_TSSI_MV_AVG GENMASK(13, 11) -+#define B_P1_TSSI_MV_CLR BIT(14) - #define R_TSSI_THOF 0x7C00 - #define R_S1_DACKI 0x7E00 - #define B_S1_DACKI_AR GENMASK(31, 28) ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -@@ -16,6 +16,9 @@ - #define RTW8852B_IQK_VER 0x2a - #define RTW8852B_IQK_SS 2 - #define RTW8852B_RXK_GROUP_NR 4 -+#define RTW8852B_TSSI_PATH_NR 2 -+ -+#define _TSSI_DE_MASK GENMASK(21, 12) - #define ADDC_T_AVG 100 - - enum rtw8852b_iqk_type { -@@ -35,6 +38,21 @@ enum rtw8852b_iqk_type { - ID_IQK_RESTORE = 0x10, - }; - -+static const u32 _tssi_trigger[RTW8852B_TSSI_PATH_NR] = {0x5820, 0x7820}; -+static const u32 _tssi_cw_rpt_addr[RTW8852B_TSSI_PATH_NR] = {0x1c18, 0x3c18}; -+static const u32 _tssi_cw_default_addr[RTW8852B_TSSI_PATH_NR][4] = { -+ {0x5634, 0x5630, 0x5630, 0x5630}, -+ {0x7634, 0x7630, 0x7630, 0x7630} }; -+static const u32 _tssi_cw_default_mask[4] = { -+ 0x000003ff, 0x3ff00000, 0x000ffc00, 0x000003ff}; -+static const u32 _tssi_de_cck_long[RF_PATH_NUM_8852B] = {0x5858, 0x7858}; -+static const u32 _tssi_de_cck_short[RF_PATH_NUM_8852B] = {0x5860, 0x7860}; -+static const u32 _tssi_de_mcs_20m[RF_PATH_NUM_8852B] = {0x5838, 0x7838}; -+static const u32 _tssi_de_mcs_40m[RF_PATH_NUM_8852B] = {0x5840, 0x7840}; -+static const u32 _tssi_de_mcs_80m[RF_PATH_NUM_8852B] = {0x5848, 0x7848}; -+static const u32 _tssi_de_mcs_80m_80m[RF_PATH_NUM_8852B] = {0x5850, 0x7850}; -+static const u32 _tssi_de_mcs_5m[RF_PATH_NUM_8852B] = {0x5828, 0x7828}; -+static const u32 _tssi_de_mcs_10m[RF_PATH_NUM_8852B] = {0x5830, 0x7830}; - static const u32 _a_idxrxgain[RTW8852B_RXK_GROUP_NR] = {0x190, 0x198, 0x350, 0x352}; - static const u32 _a_idxattc2[RTW8852B_RXK_GROUP_NR] = {0x0f, 0x0f, 0x3f, 0x7f}; - static const u32 _a_idxattc1[RTW8852B_RXK_GROUP_NR] = {0x3, 0x1, 0x0, 0x0}; -@@ -1526,6 +1544,15 @@ static void _wait_rx_mode(struct rtw89_d - } - } - -+static void _tmac_tx_pause(struct rtw89_dev *rtwdev, enum rtw89_phy_idx band_idx, -+ bool is_pause) -+{ -+ if (!is_pause) -+ return; -+ -+ _wait_rx_mode(rtwdev, _kpath(rtwdev, band_idx)); -+} -+ - static void _doiqk(struct rtw89_dev *rtwdev, bool force, - enum rtw89_phy_idx phy_idx, u8 path) - { -@@ -1578,6 +1605,1027 @@ static void _iqk(struct rtw89_dev *rtwde - } - } - -+static void _tssi_rf_setting(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ enum rtw89_band band = chan->band_type; -+ -+ if (band == RTW89_BAND_2G) -+ rtw89_write_rf(rtwdev, path, RR_TXPOW, RR_TXPOW_TXG, 0x1); -+ else -+ rtw89_write_rf(rtwdev, path, RR_TXPOW, RR_TXPOW_TXA, 0x1); -+} -+ -+static void _tssi_set_sys(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ enum rtw89_band band = chan->band_type; -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852b_tssi_sys_defs_tbl); -+ -+ if (path == RF_PATH_A) -+ rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G, -+ &rtw8852b_tssi_sys_a_defs_2g_tbl, -+ &rtw8852b_tssi_sys_a_defs_5g_tbl); -+ else -+ rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G, -+ &rtw8852b_tssi_sys_b_defs_2g_tbl, -+ &rtw8852b_tssi_sys_b_defs_5g_tbl); -+} -+ -+static void _tssi_ini_txpwr_ctrl_bb(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852b_tssi_init_txpwr_defs_a_tbl, -+ &rtw8852b_tssi_init_txpwr_defs_b_tbl); -+} -+ -+static void _tssi_ini_txpwr_ctrl_bb_he_tb(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852b_tssi_init_txpwr_he_tb_defs_a_tbl, -+ &rtw8852b_tssi_init_txpwr_he_tb_defs_b_tbl); -+} -+ -+static void _tssi_set_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852b_tssi_dck_defs_a_tbl, -+ &rtw8852b_tssi_dck_defs_b_tbl); -+} -+ -+static void _tssi_set_tmeter_tbl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+#define RTW8852B_TSSI_GET_VAL(ptr, idx) \ -+({ \ -+ s8 *__ptr = (ptr); \ -+ u8 __idx = (idx), __i, __v; \ -+ u32 __val = 0; \ -+ for (__i = 0; __i < 4; __i++) { \ -+ __v = (__ptr[__idx + __i]); \ -+ __val |= (__v << (8 * __i)); \ -+ } \ -+ __val; \ -+}) -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u8 ch = chan->channel; -+ u8 subband = chan->subband_type; -+ const s8 *thm_up_a = NULL; -+ const s8 *thm_down_a = NULL; -+ const s8 *thm_up_b = NULL; -+ const s8 *thm_down_b = NULL; -+ u8 thermal = 0xff; -+ s8 thm_ofst[64] = {0}; -+ u32 tmp = 0; -+ u8 i, j; -+ -+ switch (subband) { -+ default: -+ case RTW89_CH_2G: -+ thm_up_a = rtw89_8852b_trk_cfg.delta_swingidx_2ga_p; -+ thm_down_a = rtw89_8852b_trk_cfg.delta_swingidx_2ga_n; -+ thm_up_b = rtw89_8852b_trk_cfg.delta_swingidx_2gb_p; -+ thm_down_b = rtw89_8852b_trk_cfg.delta_swingidx_2gb_n; -+ break; -+ case RTW89_CH_5G_BAND_1: -+ thm_up_a = rtw89_8852b_trk_cfg.delta_swingidx_5ga_p[0]; -+ thm_down_a = rtw89_8852b_trk_cfg.delta_swingidx_5ga_n[0]; -+ thm_up_b = rtw89_8852b_trk_cfg.delta_swingidx_5gb_p[0]; -+ thm_down_b = rtw89_8852b_trk_cfg.delta_swingidx_5gb_n[0]; -+ break; -+ case RTW89_CH_5G_BAND_3: -+ thm_up_a = rtw89_8852b_trk_cfg.delta_swingidx_5ga_p[1]; -+ thm_down_a = rtw89_8852b_trk_cfg.delta_swingidx_5ga_n[1]; -+ thm_up_b = rtw89_8852b_trk_cfg.delta_swingidx_5gb_p[1]; -+ thm_down_b = rtw89_8852b_trk_cfg.delta_swingidx_5gb_n[1]; -+ break; -+ case RTW89_CH_5G_BAND_4: -+ thm_up_a = rtw89_8852b_trk_cfg.delta_swingidx_5ga_p[2]; -+ thm_down_a = rtw89_8852b_trk_cfg.delta_swingidx_5ga_n[2]; -+ thm_up_b = rtw89_8852b_trk_cfg.delta_swingidx_5gb_p[2]; -+ thm_down_b = rtw89_8852b_trk_cfg.delta_swingidx_5gb_n[2]; -+ break; -+ } -+ -+ if (path == RF_PATH_A) { -+ thermal = tssi_info->thermal[RF_PATH_A]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] ch=%d thermal_pathA=0x%x\n", ch, thermal); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER_DIS, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER_TRK, 0x1); -+ -+ if (thermal == 0xff) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER, 32); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_VAL, 32); -+ -+ for (i = 0; i < 64; i += 4) { -+ rtw89_phy_write32(rtwdev, R_P0_TSSI_BASE + i, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] write 0x%x val=0x%08x\n", -+ R_P0_TSSI_BASE + i, 0x0); -+ } -+ -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER, thermal); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_VAL, -+ thermal); -+ -+ i = 0; -+ for (j = 0; j < 32; j++) -+ thm_ofst[j] = i < DELTA_SWINGIDX_SIZE ? -+ -thm_down_a[i++] : -+ -thm_down_a[DELTA_SWINGIDX_SIZE - 1]; -+ -+ i = 1; -+ for (j = 63; j >= 32; j--) -+ thm_ofst[j] = i < DELTA_SWINGIDX_SIZE ? -+ thm_up_a[i++] : -+ thm_up_a[DELTA_SWINGIDX_SIZE - 1]; -+ -+ for (i = 0; i < 64; i += 4) { -+ tmp = RTW8852B_TSSI_GET_VAL(thm_ofst, i); -+ rtw89_phy_write32(rtwdev, R_P0_TSSI_BASE + i, tmp); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] write 0x%x val=0x%08x\n", -+ 0x5c00 + i, tmp); -+ } -+ } -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, R_P0_RFCTM_RDY, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, R_P0_RFCTM_RDY, 0x0); -+ -+ } else { -+ thermal = tssi_info->thermal[RF_PATH_B]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] ch=%d thermal_pathB=0x%x\n", ch, thermal); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER_DIS, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER_TRK, 0x1); -+ -+ if (thermal == 0xff) { -+ rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER, 32); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, B_P1_RFCTM_VAL, 32); -+ -+ for (i = 0; i < 64; i += 4) { -+ rtw89_phy_write32(rtwdev, R_TSSI_THOF + i, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] write 0x%x val=0x%08x\n", -+ 0x7c00 + i, 0x0); -+ } -+ -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_P1_TMETER, B_P1_TMETER, thermal); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, B_P1_RFCTM_VAL, -+ thermal); -+ -+ i = 0; -+ for (j = 0; j < 32; j++) -+ thm_ofst[j] = i < DELTA_SWINGIDX_SIZE ? -+ -thm_down_b[i++] : -+ -thm_down_b[DELTA_SWINGIDX_SIZE - 1]; -+ -+ i = 1; -+ for (j = 63; j >= 32; j--) -+ thm_ofst[j] = i < DELTA_SWINGIDX_SIZE ? -+ thm_up_b[i++] : -+ thm_up_b[DELTA_SWINGIDX_SIZE - 1]; -+ -+ for (i = 0; i < 64; i += 4) { -+ tmp = RTW8852B_TSSI_GET_VAL(thm_ofst, i); -+ rtw89_phy_write32(rtwdev, R_TSSI_THOF + i, tmp); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] write 0x%x val=0x%08x\n", -+ 0x7c00 + i, tmp); -+ } -+ } -+ rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, R_P1_RFCTM_RDY, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RFCTM, R_P1_RFCTM_RDY, 0x0); -+ } -+#undef RTW8852B_TSSI_GET_VAL -+} -+ -+static void _tssi_set_dac_gain_tbl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852b_tssi_dac_gain_defs_a_tbl, -+ &rtw8852b_tssi_dac_gain_defs_b_tbl); -+} -+ -+static void _tssi_slope_cal_org(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ enum rtw89_band band = chan->band_type; -+ -+ if (path == RF_PATH_A) -+ rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G, -+ &rtw8852b_tssi_slope_a_defs_2g_tbl, -+ &rtw8852b_tssi_slope_a_defs_5g_tbl); -+ else -+ rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G, -+ &rtw8852b_tssi_slope_b_defs_2g_tbl, -+ &rtw8852b_tssi_slope_b_defs_5g_tbl); -+} -+ -+static void _tssi_alignment_default(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, bool all) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ enum rtw89_band band = chan->band_type; -+ const struct rtw89_rfk_tbl *tbl = NULL; -+ u8 ch = chan->channel; -+ -+ if (path == RF_PATH_A) { -+ if (band == RTW89_BAND_2G) { -+ if (all) -+ tbl = &rtw8852b_tssi_align_a_2g_all_defs_tbl; -+ else -+ tbl = &rtw8852b_tssi_align_a_2g_part_defs_tbl; -+ } else if (ch >= 36 && ch <= 64) { -+ if (all) -+ tbl = &rtw8852b_tssi_align_a_5g1_all_defs_tbl; -+ else -+ tbl = &rtw8852b_tssi_align_a_5g1_part_defs_tbl; -+ } else if (ch >= 100 && ch <= 144) { -+ if (all) -+ tbl = &rtw8852b_tssi_align_a_5g2_all_defs_tbl; -+ else -+ tbl = &rtw8852b_tssi_align_a_5g2_part_defs_tbl; -+ } else if (ch >= 149 && ch <= 177) { -+ if (all) -+ tbl = &rtw8852b_tssi_align_a_5g3_all_defs_tbl; -+ else -+ tbl = &rtw8852b_tssi_align_a_5g3_part_defs_tbl; -+ } -+ } else { -+ if (ch >= 1 && ch <= 14) { -+ if (all) -+ tbl = &rtw8852b_tssi_align_b_2g_all_defs_tbl; -+ else -+ tbl = &rtw8852b_tssi_align_b_2g_part_defs_tbl; -+ } else if (ch >= 36 && ch <= 64) { -+ if (all) -+ tbl = &rtw8852b_tssi_align_b_5g1_all_defs_tbl; -+ else -+ tbl = &rtw8852b_tssi_align_b_5g1_part_defs_tbl; -+ } else if (ch >= 100 && ch <= 144) { -+ if (all) -+ tbl = &rtw8852b_tssi_align_b_5g2_all_defs_tbl; -+ else -+ tbl = &rtw8852b_tssi_align_b_5g2_part_defs_tbl; -+ } else if (ch >= 149 && ch <= 177) { -+ if (all) -+ tbl = &rtw8852b_tssi_align_b_5g3_all_defs_tbl; -+ else -+ tbl = &rtw8852b_tssi_align_b_5g3_part_defs_tbl; -+ } -+ } -+ -+ if (tbl) -+ rtw89_rfk_parser(rtwdev, tbl); -+} -+ -+static void _tssi_set_tssi_slope(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser_by_cond(rtwdev, path == RF_PATH_A, -+ &rtw8852b_tssi_slope_defs_a_tbl, -+ &rtw8852b_tssi_slope_defs_b_tbl); -+} -+ -+static void _tssi_set_tssi_track(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ if (path == RF_PATH_A) -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSIC, B_P0_TSSIC_BYPASS, 0x0); -+ else -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSIC, B_P1_TSSIC_BYPASS, 0x0); -+} -+ -+static void _tssi_set_txagc_offset_mv_avg(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "======>%s path=%d\n", __func__, -+ path); -+ -+ if (path == RF_PATH_A) -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_MV_AVG, B_P0_TSSI_MV_MIX, 0x010); -+ else -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_MV_AVG, B_P1_RFCTM_DEL, 0x010); -+} -+ -+static void _tssi_enable(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ u8 i; -+ -+ for (i = 0; i < RF_PATH_NUM_8852B; i++) { -+ _tssi_set_tssi_track(rtwdev, phy, i); -+ _tssi_set_txagc_offset_mv_avg(rtwdev, phy, i); -+ -+ if (i == RF_PATH_A) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_MV_AVG, -+ B_P0_TSSI_MV_CLR, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_AVG, -+ B_P0_TSSI_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_AVG, -+ B_P0_TSSI_EN, 0x1); -+ rtw89_write_rf(rtwdev, i, RR_TXGA_V1, -+ RR_TXGA_V1_TRK_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, -+ B_P0_TSSI_RFC, 0x3); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, -+ B_P0_TSSI_OFT, 0xc0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, -+ B_P0_TSSI_OFT_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, -+ B_P0_TSSI_OFT_EN, 0x1); -+ -+ rtwdev->is_tssi_mode[RF_PATH_A] = true; -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_MV_AVG, -+ B_P1_TSSI_MV_CLR, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_AVG, -+ B_P1_TSSI_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_AVG, -+ B_P1_TSSI_EN, 0x1); -+ rtw89_write_rf(rtwdev, i, RR_TXGA_V1, -+ RR_TXGA_V1_TRK_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, -+ B_P1_TSSI_RFC, 0x3); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, -+ B_P1_TSSI_OFT, 0xc0); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, -+ B_P1_TSSI_OFT_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, -+ B_P1_TSSI_OFT_EN, 0x1); -+ -+ rtwdev->is_tssi_mode[RF_PATH_B] = true; -+ } -+ } -+} -+ -+static void _tssi_disable(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_AVG, B_P0_TSSI_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_RFC, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_MV_AVG, B_P0_TSSI_MV_CLR, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_AVG, B_P1_TSSI_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_RFC, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_MV_AVG, B_P1_TSSI_MV_CLR, 0x1); -+ -+ rtwdev->is_tssi_mode[RF_PATH_A] = false; -+ rtwdev->is_tssi_mode[RF_PATH_B] = false; -+} -+ -+static u32 _tssi_get_cck_group(struct rtw89_dev *rtwdev, u8 ch) -+{ -+ switch (ch) { -+ case 1 ... 2: -+ return 0; -+ case 3 ... 5: -+ return 1; -+ case 6 ... 8: -+ return 2; -+ case 9 ... 11: -+ return 3; -+ case 12 ... 13: -+ return 4; -+ case 14: -+ return 5; -+ } -+ -+ return 0; -+} -+ -+#define TSSI_EXTRA_GROUP_BIT (BIT(31)) -+#define TSSI_EXTRA_GROUP(idx) (TSSI_EXTRA_GROUP_BIT | (idx)) -+#define IS_TSSI_EXTRA_GROUP(group) ((group) & TSSI_EXTRA_GROUP_BIT) -+#define TSSI_EXTRA_GET_GROUP_IDX1(group) ((group) & ~TSSI_EXTRA_GROUP_BIT) -+#define TSSI_EXTRA_GET_GROUP_IDX2(group) (TSSI_EXTRA_GET_GROUP_IDX1(group) + 1) -+ -+static u32 _tssi_get_ofdm_group(struct rtw89_dev *rtwdev, u8 ch) -+{ -+ switch (ch) { -+ case 1 ... 2: -+ return 0; -+ case 3 ... 5: -+ return 1; -+ case 6 ... 8: -+ return 2; -+ case 9 ... 11: -+ return 3; -+ case 12 ... 14: -+ return 4; -+ case 36 ... 40: -+ return 5; -+ case 41 ... 43: -+ return TSSI_EXTRA_GROUP(5); -+ case 44 ... 48: -+ return 6; -+ case 49 ... 51: -+ return TSSI_EXTRA_GROUP(6); -+ case 52 ... 56: -+ return 7; -+ case 57 ... 59: -+ return TSSI_EXTRA_GROUP(7); -+ case 60 ... 64: -+ return 8; -+ case 100 ... 104: -+ return 9; -+ case 105 ... 107: -+ return TSSI_EXTRA_GROUP(9); -+ case 108 ... 112: -+ return 10; -+ case 113 ... 115: -+ return TSSI_EXTRA_GROUP(10); -+ case 116 ... 120: -+ return 11; -+ case 121 ... 123: -+ return TSSI_EXTRA_GROUP(11); -+ case 124 ... 128: -+ return 12; -+ case 129 ... 131: -+ return TSSI_EXTRA_GROUP(12); -+ case 132 ... 136: -+ return 13; -+ case 137 ... 139: -+ return TSSI_EXTRA_GROUP(13); -+ case 140 ... 144: -+ return 14; -+ case 149 ... 153: -+ return 15; -+ case 154 ... 156: -+ return TSSI_EXTRA_GROUP(15); -+ case 157 ... 161: -+ return 16; -+ case 162 ... 164: -+ return TSSI_EXTRA_GROUP(16); -+ case 165 ... 169: -+ return 17; -+ case 170 ... 172: -+ return TSSI_EXTRA_GROUP(17); -+ case 173 ... 177: -+ return 18; -+ } -+ -+ return 0; -+} -+ -+static u32 _tssi_get_trim_group(struct rtw89_dev *rtwdev, u8 ch) -+{ -+ switch (ch) { -+ case 1 ... 8: -+ return 0; -+ case 9 ... 14: -+ return 1; -+ case 36 ... 48: -+ return 2; -+ case 52 ... 64: -+ return 3; -+ case 100 ... 112: -+ return 4; -+ case 116 ... 128: -+ return 5; -+ case 132 ... 144: -+ return 6; -+ case 149 ... 177: -+ return 7; -+ } -+ -+ return 0; -+} -+ -+static s8 _tssi_get_ofdm_de(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u8 ch = chan->channel; -+ u32 gidx, gidx_1st, gidx_2nd; -+ s8 de_1st; -+ s8 de_2nd; -+ s8 val; -+ -+ gidx = _tssi_get_ofdm_group(rtwdev, ch); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs group_idx=0x%x\n", path, gidx); -+ -+ if (IS_TSSI_EXTRA_GROUP(gidx)) { -+ gidx_1st = TSSI_EXTRA_GET_GROUP_IDX1(gidx); -+ gidx_2nd = TSSI_EXTRA_GET_GROUP_IDX2(gidx); -+ de_1st = tssi_info->tssi_mcs[path][gidx_1st]; -+ de_2nd = tssi_info->tssi_mcs[path][gidx_2nd]; -+ val = (de_1st + de_2nd) / 2; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs de=%d 1st=%d 2nd=%d\n", -+ path, val, de_1st, de_2nd); -+ } else { -+ val = tssi_info->tssi_mcs[path][gidx]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs de=%d\n", path, val); -+ } -+ -+ return val; -+} -+ -+static s8 _tssi_get_ofdm_trim_de(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u8 ch = chan->channel; -+ u32 tgidx, tgidx_1st, tgidx_2nd; -+ s8 tde_1st; -+ s8 tde_2nd; -+ s8 val; -+ -+ tgidx = _tssi_get_trim_group(rtwdev, ch); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs trim_group_idx=0x%x\n", -+ path, tgidx); -+ -+ if (IS_TSSI_EXTRA_GROUP(tgidx)) { -+ tgidx_1st = TSSI_EXTRA_GET_GROUP_IDX1(tgidx); -+ tgidx_2nd = TSSI_EXTRA_GET_GROUP_IDX2(tgidx); -+ tde_1st = tssi_info->tssi_trim[path][tgidx_1st]; -+ tde_2nd = tssi_info->tssi_trim[path][tgidx_2nd]; -+ val = (tde_1st + tde_2nd) / 2; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs trim_de=%d 1st=%d 2nd=%d\n", -+ path, val, tde_1st, tde_2nd); -+ } else { -+ val = tssi_info->tssi_trim[path][tgidx]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs trim_de=%d\n", -+ path, val); -+ } -+ -+ return val; -+} -+ -+static void _tssi_set_efuse_to_de(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u8 ch = chan->channel; -+ u8 gidx; -+ s8 ofdm_de; -+ s8 trim_de; -+ s32 val; -+ u32 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI][TRIM]: phy=%d ch=%d\n", -+ phy, ch); -+ -+ for (i = RF_PATH_A; i < RF_PATH_NUM_8852B; i++) { -+ gidx = _tssi_get_cck_group(rtwdev, ch); -+ trim_de = _tssi_get_ofdm_trim_de(rtwdev, phy, i); -+ val = tssi_info->tssi_cck[i][gidx] + trim_de; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d cck[%d]=0x%x trim=0x%x\n", -+ i, gidx, tssi_info->tssi_cck[i][gidx], trim_de); -+ -+ rtw89_phy_write32_mask(rtwdev, _tssi_de_cck_long[i], _TSSI_DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, _tssi_de_cck_short[i], _TSSI_DE_MASK, val); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] Set TSSI CCK DE 0x%x[21:12]=0x%x\n", -+ _tssi_de_cck_long[i], -+ rtw89_phy_read32_mask(rtwdev, _tssi_de_cck_long[i], -+ _TSSI_DE_MASK)); -+ -+ ofdm_de = _tssi_get_ofdm_de(rtwdev, phy, i); -+ trim_de = _tssi_get_ofdm_trim_de(rtwdev, phy, i); -+ val = ofdm_de + trim_de; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs=0x%x trim=0x%x\n", -+ i, ofdm_de, trim_de); -+ -+ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_20m[i], _TSSI_DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_40m[i], _TSSI_DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_80m[i], _TSSI_DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_80m_80m[i], _TSSI_DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_5m[i], _TSSI_DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_10m[i], _TSSI_DE_MASK, val); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] Set TSSI MCS DE 0x%x[21:12]=0x%x\n", -+ _tssi_de_mcs_20m[i], -+ rtw89_phy_read32_mask(rtwdev, _tssi_de_mcs_20m[i], -+ _TSSI_DE_MASK)); -+ } -+} -+ -+static void _tssi_alimentk_dump_result(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI PA K]\n0x%x = 0x%08x\n0x%x = 0x%08x\n0x%x = 0x%08x\n0x%x = 0x%08x\n" -+ "0x%x = 0x%08x\n0x%x = 0x%08x\n0x%x = 0x%08x\n0x%x = 0x%08x\n", -+ R_TSSI_PA_K1 + (path << 13), -+ rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K1 + (path << 13), MASKDWORD), -+ R_TSSI_PA_K2 + (path << 13), -+ rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K2 + (path << 13), MASKDWORD), -+ R_P0_TSSI_ALIM1 + (path << 13), -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM1 + (path << 13), MASKDWORD), -+ R_P0_TSSI_ALIM3 + (path << 13), -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM3 + (path << 13), MASKDWORD), -+ R_TSSI_PA_K5 + (path << 13), -+ rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K5 + (path << 13), MASKDWORD), -+ R_P0_TSSI_ALIM2 + (path << 13), -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM2 + (path << 13), MASKDWORD), -+ R_P0_TSSI_ALIM4 + (path << 13), -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM4 + (path << 13), MASKDWORD), -+ R_TSSI_PA_K8 + (path << 13), -+ rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K8 + (path << 13), MASKDWORD)); -+} -+ -+static void _tssi_alimentk_done(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, enum rtw89_rf_path path) -+{ -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u8 channel = chan->channel; -+ u8 band; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "======>%s phy=%d path=%d\n", __func__, phy, path); -+ -+ if (channel >= 1 && channel <= 14) -+ band = TSSI_ALIMK_2G; -+ else if (channel >= 36 && channel <= 64) -+ band = TSSI_ALIMK_5GL; -+ else if (channel >= 100 && channel <= 144) -+ band = TSSI_ALIMK_5GM; -+ else if (channel >= 149 && channel <= 177) -+ band = TSSI_ALIMK_5GH; -+ else -+ band = TSSI_ALIMK_2G; -+ -+ if (tssi_info->alignment_done[path][band]) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM1 + (path << 13), MASKDWORD, -+ tssi_info->alignment_value[path][band][0]); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM3 + (path << 13), MASKDWORD, -+ tssi_info->alignment_value[path][band][1]); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM2 + (path << 13), MASKDWORD, -+ tssi_info->alignment_value[path][band][2]); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM4 + (path << 13), MASKDWORD, -+ tssi_info->alignment_value[path][band][3]); -+ } -+ -+ _tssi_alimentk_dump_result(rtwdev, path); -+} -+ -+static void _tssi_hw_tx(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u16 cnt, u16 period, s16 pwr_dbm, -+ u8 enable) -+{ -+ enum rtw89_rf_path_bit rx_path; -+ -+ if (path == RF_PATH_A) -+ rx_path = RF_A; -+ else if (path == RF_PATH_B) -+ rx_path = RF_B; -+ else if (path == RF_PATH_AB) -+ rx_path = RF_AB; -+ else -+ rx_path = RF_ABCD; /* don't change path, but still set others */ -+ -+ if (enable) { -+ rtw8852b_bb_set_plcp_tx(rtwdev); -+ rtw8852b_bb_cfg_tx_path(rtwdev, path); -+ rtw8852b_bb_ctrl_rx_path(rtwdev, rx_path); -+ rtw8852b_bb_set_power(rtwdev, pwr_dbm, phy); -+ } -+ -+ rtw8852b_bb_set_pmac_pkt_tx(rtwdev, enable, cnt, period, 20, phy); -+} -+ -+static void _tssi_backup_bb_registers(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, const u32 reg[], -+ u32 reg_backup[], u32 reg_num) -+{ -+ u32 i; -+ -+ for (i = 0; i < reg_num; i++) { -+ reg_backup[i] = rtw89_phy_read32_mask(rtwdev, reg[i], MASKDWORD); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI] Backup BB 0x%x = 0x%x\n", reg[i], -+ reg_backup[i]); -+ } -+} -+ -+static void _tssi_reload_bb_registers(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, const u32 reg[], -+ u32 reg_backup[], u32 reg_num) -+ -+{ -+ u32 i; -+ -+ for (i = 0; i < reg_num; i++) { -+ rtw89_phy_write32_mask(rtwdev, reg[i], MASKDWORD, reg_backup[i]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI] Reload BB 0x%x = 0x%x\n", reg[i], -+ reg_backup[i]); -+ } -+} -+ -+static u8 _tssi_ch_to_idx(struct rtw89_dev *rtwdev, u8 channel) -+{ -+ u8 channel_index; -+ -+ if (channel >= 1 && channel <= 14) -+ channel_index = channel - 1; -+ else if (channel >= 36 && channel <= 64) -+ channel_index = (channel - 36) / 2 + 14; -+ else if (channel >= 100 && channel <= 144) -+ channel_index = ((channel - 100) / 2) + 15 + 14; -+ else if (channel >= 149 && channel <= 177) -+ channel_index = ((channel - 149) / 2) + 38 + 14; -+ else -+ channel_index = 0; -+ -+ return channel_index; -+} -+ -+static bool _tssi_get_cw_report(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, const s16 *power, -+ u32 *tssi_cw_rpt) -+{ -+ u32 tx_counter, tx_counter_tmp; -+ const int retry = 100; -+ u32 tmp; -+ int j, k; -+ -+ for (j = 0; j < RTW8852B_TSSI_PATH_NR; j++) { -+ rtw89_phy_write32_mask(rtwdev, _tssi_trigger[path], B_P0_TSSI_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, _tssi_trigger[path], B_P0_TSSI_EN, 0x1); -+ -+ tx_counter = rtw89_phy_read32_mask(rtwdev, R_TX_COUNTER, MASKLWORD); -+ -+ tmp = rtw89_phy_read32_mask(rtwdev, _tssi_trigger[path], MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI PA K] 0x%x = 0x%08x path=%d\n", -+ _tssi_trigger[path], tmp, path); -+ -+ if (j == 0) -+ _tssi_hw_tx(rtwdev, phy, path, 100, 5000, power[j], true); -+ else -+ _tssi_hw_tx(rtwdev, phy, RF_PATH_ABCD, 100, 5000, power[j], true); -+ -+ tx_counter_tmp = rtw89_phy_read32_mask(rtwdev, R_TX_COUNTER, MASKLWORD); -+ tx_counter_tmp -= tx_counter; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI PA K] First HWTXcounter=%d path=%d\n", -+ tx_counter_tmp, path); -+ -+ for (k = 0; k < retry; k++) { -+ tmp = rtw89_phy_read32_mask(rtwdev, _tssi_cw_rpt_addr[path], -+ B_TSSI_CWRPT_RDY); -+ if (tmp) -+ break; -+ -+ udelay(30); -+ -+ tx_counter_tmp = -+ rtw89_phy_read32_mask(rtwdev, R_TX_COUNTER, MASKLWORD); -+ tx_counter_tmp -= tx_counter; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI PA K] Flow k = %d HWTXcounter=%d path=%d\n", -+ k, tx_counter_tmp, path); -+ } -+ -+ if (k >= retry) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI PA K] TSSI finish bit k > %d mp:100ms normal:30us path=%d\n", -+ k, path); -+ -+ _tssi_hw_tx(rtwdev, phy, path, 100, 5000, power[j], false); -+ return false; -+ } -+ -+ tssi_cw_rpt[j] = -+ rtw89_phy_read32_mask(rtwdev, _tssi_cw_rpt_addr[path], B_TSSI_CWRPT); -+ -+ _tssi_hw_tx(rtwdev, phy, path, 100, 5000, power[j], false); -+ -+ tx_counter_tmp = rtw89_phy_read32_mask(rtwdev, R_TX_COUNTER, MASKLWORD); -+ tx_counter_tmp -= tx_counter; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI PA K] Final HWTXcounter=%d path=%d\n", -+ tx_counter_tmp, path); -+ } -+ -+ return true; -+} -+ -+static void _tssi_alimentk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ static const u32 bb_reg[8] = {0x5820, 0x7820, 0x4978, 0x58e4, -+ 0x78e4, 0x49c0, 0x0d18, 0x0d80}; -+ static const s16 power_2g[4] = {48, 20, 4, 4}; -+ static const s16 power_5g[4] = {48, 20, 4, 4}; -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ s32 tssi_alim_offset_1, tssi_alim_offset_2, tssi_alim_offset_3; -+ u32 tssi_cw_rpt[RTW8852B_TSSI_PATH_NR] = {0}; -+ u8 channel = chan->channel; -+ u8 ch_idx = _tssi_ch_to_idx(rtwdev, channel); -+ struct rtw8852b_bb_tssi_bak tssi_bak; -+ s32 aliment_diff, tssi_cw_default; -+ u32 start_time, finish_time; -+ u32 bb_reg_backup[8] = {0}; -+ const s16 *power; -+ u8 band; -+ bool ok; -+ u32 tmp; -+ u8 j; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "======> %s channel=%d path=%d\n", __func__, channel, -+ path); -+ -+ if (tssi_info->check_backup_aligmk[path][ch_idx]) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM1 + (path << 13), MASKDWORD, -+ tssi_info->alignment_backup_by_ch[path][ch_idx][0]); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM3 + (path << 13), MASKDWORD, -+ tssi_info->alignment_backup_by_ch[path][ch_idx][1]); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM2 + (path << 13), MASKDWORD, -+ tssi_info->alignment_backup_by_ch[path][ch_idx][2]); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM4 + (path << 13), MASKDWORD, -+ tssi_info->alignment_backup_by_ch[path][ch_idx][3]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "======> %s Reload TSSI Alignment !!!\n", __func__); -+ _tssi_alimentk_dump_result(rtwdev, path); -+ return; -+ } -+ -+ start_time = ktime_get_ns(); -+ -+ if (chan->band_type == RTW89_BAND_2G) -+ power = power_2g; -+ else -+ power = power_5g; -+ -+ if (channel >= 1 && channel <= 14) -+ band = TSSI_ALIMK_2G; -+ else if (channel >= 36 && channel <= 64) -+ band = TSSI_ALIMK_5GL; -+ else if (channel >= 100 && channel <= 144) -+ band = TSSI_ALIMK_5GM; -+ else if (channel >= 149 && channel <= 177) -+ band = TSSI_ALIMK_5GH; -+ else -+ band = TSSI_ALIMK_2G; -+ -+ rtw8852b_bb_backup_tssi(rtwdev, phy, &tssi_bak); -+ _tssi_backup_bb_registers(rtwdev, phy, bb_reg, bb_reg_backup, ARRAY_SIZE(bb_reg_backup)); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_AVG, B_P0_TSSI_AVG, 0x8); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_AVG, B_P1_TSSI_AVG, 0x8); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_MV_AVG, B_P0_TSSI_MV_AVG, 0x2); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_MV_AVG, B_P1_TSSI_MV_AVG, 0x2); -+ -+ ok = _tssi_get_cw_report(rtwdev, phy, path, power, tssi_cw_rpt); -+ if (!ok) -+ goto out; -+ -+ for (j = 0; j < RTW8852B_TSSI_PATH_NR; j++) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI PA K] power[%d]=%d tssi_cw_rpt[%d]=%d\n", j, -+ power[j], j, tssi_cw_rpt[j]); -+ } -+ -+ tmp = rtw89_phy_read32_mask(rtwdev, _tssi_cw_default_addr[path][1], -+ _tssi_cw_default_mask[1]); -+ tssi_cw_default = sign_extend32(tmp, 8); -+ tssi_alim_offset_1 = tssi_cw_rpt[0] - ((power[0] - power[1]) * 2) - -+ tssi_cw_rpt[1] + tssi_cw_default; -+ aliment_diff = tssi_alim_offset_1 - tssi_cw_default; -+ -+ tmp = rtw89_phy_read32_mask(rtwdev, _tssi_cw_default_addr[path][2], -+ _tssi_cw_default_mask[2]); -+ tssi_cw_default = sign_extend32(tmp, 8); -+ tssi_alim_offset_2 = tssi_cw_default + aliment_diff; -+ -+ tmp = rtw89_phy_read32_mask(rtwdev, _tssi_cw_default_addr[path][3], -+ _tssi_cw_default_mask[3]); -+ tssi_cw_default = sign_extend32(tmp, 8); -+ tssi_alim_offset_3 = tssi_cw_default + aliment_diff; -+ -+ if (path == RF_PATH_A) { -+ tmp = FIELD_PREP(B_P1_TSSI_ALIM11, tssi_alim_offset_1) | -+ FIELD_PREP(B_P1_TSSI_ALIM12, tssi_alim_offset_2) | -+ FIELD_PREP(B_P1_TSSI_ALIM13, tssi_alim_offset_3); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM1, B_P0_TSSI_ALIM1, tmp); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM2, B_P0_TSSI_ALIM2, tmp); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI PA K] tssi_alim_offset = 0x%x 0x%x 0x%x 0x%x\n", -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM3, B_P0_TSSI_ALIM31), -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM1, B_P0_TSSI_ALIM11), -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM1, B_P0_TSSI_ALIM12), -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM1, B_P0_TSSI_ALIM13)); -+ } else { -+ tmp = FIELD_PREP(B_P1_TSSI_ALIM11, tssi_alim_offset_1) | -+ FIELD_PREP(B_P1_TSSI_ALIM12, tssi_alim_offset_2) | -+ FIELD_PREP(B_P1_TSSI_ALIM13, tssi_alim_offset_3); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_ALIM1, B_P1_TSSI_ALIM1, tmp); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_ALIM2, B_P1_TSSI_ALIM2, tmp); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI PA K] tssi_alim_offset = 0x%x 0x%x 0x%x 0x%x\n", -+ rtw89_phy_read32_mask(rtwdev, R_P1_TSSI_ALIM3, B_P1_TSSI_ALIM31), -+ rtw89_phy_read32_mask(rtwdev, R_P1_TSSI_ALIM1, B_P1_TSSI_ALIM11), -+ rtw89_phy_read32_mask(rtwdev, R_P1_TSSI_ALIM1, B_P1_TSSI_ALIM12), -+ rtw89_phy_read32_mask(rtwdev, R_P1_TSSI_ALIM1, B_P1_TSSI_ALIM13)); -+ } -+ -+ tssi_info->alignment_done[path][band] = true; -+ tssi_info->alignment_value[path][band][0] = -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM1 + (path << 13), MASKDWORD); -+ tssi_info->alignment_value[path][band][1] = -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM3 + (path << 13), MASKDWORD); -+ tssi_info->alignment_value[path][band][2] = -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM2 + (path << 13), MASKDWORD); -+ tssi_info->alignment_value[path][band][3] = -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM4 + (path << 13), MASKDWORD); -+ -+ tssi_info->check_backup_aligmk[path][ch_idx] = true; -+ tssi_info->alignment_backup_by_ch[path][ch_idx][0] = -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM1 + (path << 13), MASKDWORD); -+ tssi_info->alignment_backup_by_ch[path][ch_idx][1] = -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM3 + (path << 13), MASKDWORD); -+ tssi_info->alignment_backup_by_ch[path][ch_idx][2] = -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM2 + (path << 13), MASKDWORD); -+ tssi_info->alignment_backup_by_ch[path][ch_idx][3] = -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM4 + (path << 13), MASKDWORD); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI PA K] tssi_info->alignment_value[path=%d][band=%d][0], 0x%x = 0x%08x\n", -+ path, band, R_P0_TSSI_ALIM1 + (path << 13), -+ tssi_info->alignment_value[path][band][0]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI PA K] tssi_info->alignment_value[path=%d][band=%d][1], 0x%x = 0x%08x\n", -+ path, band, R_P0_TSSI_ALIM3 + (path << 13), -+ tssi_info->alignment_value[path][band][1]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI PA K] tssi_info->alignment_value[path=%d][band=%d][2], 0x%x = 0x%08x\n", -+ path, band, R_P0_TSSI_ALIM2 + (path << 13), -+ tssi_info->alignment_value[path][band][2]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI PA K] tssi_info->alignment_value[path=%d][band=%d][3], 0x%x = 0x%08x\n", -+ path, band, R_P0_TSSI_ALIM4 + (path << 13), -+ tssi_info->alignment_value[path][band][3]); -+ -+out: -+ _tssi_reload_bb_registers(rtwdev, phy, bb_reg, bb_reg_backup, ARRAY_SIZE(bb_reg_backup)); -+ rtw8852b_bb_restore_tssi(rtwdev, phy, &tssi_bak); -+ rtw8852b_bb_tx_mode_switch(rtwdev, phy, 0); -+ -+ finish_time = ktime_get_ns(); -+ tssi_info->tssi_alimk_time += finish_time - start_time; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI PA K] %s processing time = %d ms\n", __func__, -+ tssi_info->tssi_alimk_time); -+} -+ - void rtw8852b_rck(struct rtw89_dev *rtwdev) - { - u8 path; -@@ -1626,6 +2674,132 @@ void rtw8852b_rx_dck(struct rtw89_dev *r - rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_STOP); - } - -+void rtw8852b_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool hwtx_en) -+{ -+ u8 phy_map = rtw89_btc_phymap(rtwdev, phy, RF_AB); -+ u32 tx_en; -+ u8 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI] %s: phy=%d\n", __func__, phy); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_START); -+ -+ _tssi_disable(rtwdev, phy); -+ -+ for (i = RF_PATH_A; i < RF_PATH_NUM_8852B; i++) { -+ _tssi_rf_setting(rtwdev, phy, i); -+ _tssi_set_sys(rtwdev, phy, i); -+ _tssi_ini_txpwr_ctrl_bb(rtwdev, phy, i); -+ _tssi_ini_txpwr_ctrl_bb_he_tb(rtwdev, phy, i); -+ _tssi_set_dck(rtwdev, phy, i); -+ _tssi_set_tmeter_tbl(rtwdev, phy, i); -+ _tssi_set_dac_gain_tbl(rtwdev, phy, i); -+ _tssi_slope_cal_org(rtwdev, phy, i); -+ _tssi_alignment_default(rtwdev, phy, i, true); -+ _tssi_set_tssi_slope(rtwdev, phy, i); -+ -+ rtw89_chip_stop_sch_tx(rtwdev, phy, &tx_en, RTW89_SCH_TX_SEL_ALL); -+ _tmac_tx_pause(rtwdev, phy, true); -+ if (hwtx_en) -+ _tssi_alimentk(rtwdev, phy, i); -+ _tmac_tx_pause(rtwdev, phy, false); -+ rtw89_chip_resume_sch_tx(rtwdev, phy, tx_en); -+ } -+ -+ _tssi_enable(rtwdev, phy); -+ _tssi_set_efuse_to_de(rtwdev, phy); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_STOP); -+} -+ -+void rtw8852b_tssi_scan(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ u8 channel = chan->channel; -+ u8 band; -+ u32 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "======>%s phy=%d channel=%d\n", __func__, phy, channel); -+ -+ if (channel >= 1 && channel <= 14) -+ band = TSSI_ALIMK_2G; -+ else if (channel >= 36 && channel <= 64) -+ band = TSSI_ALIMK_5GL; -+ else if (channel >= 100 && channel <= 144) -+ band = TSSI_ALIMK_5GM; -+ else if (channel >= 149 && channel <= 177) -+ band = TSSI_ALIMK_5GH; -+ else -+ band = TSSI_ALIMK_2G; -+ -+ _tssi_disable(rtwdev, phy); -+ -+ for (i = RF_PATH_A; i < RTW8852B_TSSI_PATH_NR; i++) { -+ _tssi_rf_setting(rtwdev, phy, i); -+ _tssi_set_sys(rtwdev, phy, i); -+ _tssi_set_tmeter_tbl(rtwdev, phy, i); -+ -+ if (tssi_info->alignment_done[i][band]) -+ _tssi_alimentk_done(rtwdev, phy, i); -+ else -+ _tssi_alignment_default(rtwdev, phy, i, true); -+ } -+ -+ _tssi_enable(rtwdev, phy); -+ _tssi_set_efuse_to_de(rtwdev, phy); -+} -+ -+static void rtw8852b_tssi_default_txagc(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, bool enable) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u8 channel = chan->channel; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "======> %s ch=%d\n", -+ __func__, channel); -+ -+ if (enable) { -+ if (!rtwdev->is_tssi_mode[RF_PATH_A] && !rtwdev->is_tssi_mode[RF_PATH_B]) -+ rtw8852b_tssi(rtwdev, phy, true); -+ return; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "======>%s 1 SCAN_END Set 0x5818[7:0]=0x%x 0x7818[7:0]=0x%x\n", -+ __func__, -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT), -+ rtw89_phy_read32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT)); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT, 0xc0); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT, 0xc0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT_EN, 0x1); -+ -+ _tssi_alimentk_done(rtwdev, phy, RF_PATH_A); -+ _tssi_alimentk_done(rtwdev, phy, RF_PATH_B); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "======>%s 2 SCAN_END Set 0x5818[7:0]=0x%x 0x7818[7:0]=0x%x\n", -+ __func__, -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT), -+ rtw89_phy_read32_mask(rtwdev, R_P1_TSSI_TRK, B_P1_TSSI_OFT)); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "======> %s SCAN_END\n", __func__); -+} -+ -+void rtw8852b_wifi_scan_notify(struct rtw89_dev *rtwdev, bool scan_start, -+ enum rtw89_phy_idx phy_idx) -+{ -+ if (scan_start) -+ rtw8852b_tssi_default_txagc(rtwdev, phy_idx, true); -+ else -+ rtw8852b_tssi_default_txagc(rtwdev, phy_idx, false); -+} -+ - static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, - enum rtw89_bandwidth bw, bool dav) - { ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h -@@ -11,6 +11,10 @@ void rtw8852b_rck(struct rtw89_dev *rtwd - void rtw8852b_dack(struct rtw89_dev *rtwdev); - void rtw8852b_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); - void rtw8852b_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); -+void rtw8852b_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool hwtx_en); -+void rtw8852b_tssi_scan(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy); -+void rtw8852b_wifi_scan_notify(struct rtw89_dev *rtwdev, bool scan_start, -+ enum rtw89_phy_idx phy_idx); - void rtw8852b_set_channel_rf(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-040-wifi-rtw89-8852b-rfk-add-DPK.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-040-wifi-rtw89-8852b-rfk-add-DPK.patch deleted file mode 100644 index 04d423476..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-040-wifi-rtw89-8852b-rfk-add-DPK.patch +++ /dev/null @@ -1,1330 +0,0 @@ -From 5b8471ace5b1247b2eb6a824341e11a8e871080f Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 14 Oct 2022 14:02:34 +0800 -Subject: [PATCH 040/149] wifi: rtw89: 8852b: rfk: add DPK - -DPK is short for digital pre-distortion calibration. It can adjusts digital -waveform according to PA linear characteristics dynamically to enhance -TX EVM. - -Do this calibration when we are going to run on AP channel. To prevent -power offset out of boundary, it monitors thermal and set proper boundary -to register. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221014060237.29050-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - drivers/net/wireless/realtek/rtw89/reg.h | 17 + - .../net/wireless/realtek/rtw89/rtw8852b_rfk.c | 1148 +++++++++++++++++ - .../net/wireless/realtek/rtw89/rtw8852b_rfk.h | 3 + - 4 files changed, 1169 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3049,6 +3049,7 @@ struct rtw89_dpk_bkup_para { - struct rtw89_dpk_info { - bool is_dpk_enable; - bool is_dpk_reload_en; -+ u8 dpk_gs[RTW89_PHY_MAX]; - u16 dc_i[RTW89_DPK_RF_PATH][RTW89_DPK_BKUP_NUM]; - u16 dc_q[RTW89_DPK_RF_PATH][RTW89_DPK_BKUP_NUM]; - u8 corr_val[RTW89_DPK_RF_PATH][RTW89_DPK_BKUP_NUM]; ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3298,6 +3298,7 @@ - #define RR_MOD_RGM GENMASK(13, 4) - #define RR_MOD_V_DOWN 0x0 - #define RR_MOD_V_STANDBY 0x1 -+#define RR_TXAGC 0x10001 - #define RR_MOD_V_TX 0x2 - #define RR_MOD_V_RX 0x3 - #define RR_MOD_V_TXIQK 0x4 -@@ -3433,6 +3434,7 @@ - #define RR_RXBB_VOBUF GENMASK(15, 12) - #define RR_RXBB_C2G GENMASK(16, 10) - #define RR_RXBB_C1G GENMASK(9, 8) -+#define RR_RXBB_FATT GENMASK(7, 0) - #define RR_RXBB_ATTR GENMASK(7, 4) - #define RR_RXBB_ATTC GENMASK(2, 0) - #define RR_RXG 0x84 -@@ -3443,7 +3445,9 @@ - #define RR_RXAE_IQKMOD GENMASK(3, 0) - #define RR_RXA 0x8a - #define RR_RXA_DPK GENMASK(9, 8) -+#define RR_RXA_LNA 0x8b - #define RR_RXA2 0x8c -+#define RR_RAA2_SWATT GENMASK(15, 9) - #define RR_RXA2_C1 GENMASK(12, 10) - #define RR_RXA2_C2 GENMASK(9, 3) - #define RR_RXA2_CC2 GENMASK(8, 7) -@@ -3478,6 +3482,7 @@ - #define RR_IQGEN_BIAS GENMASK(11, 8) - #define RR_TXIQK 0x98 - #define RR_TXIQK_ATT2 GENMASK(15, 12) -+#define RR_TXIQK_ATT1 GENMASK(6, 0) - #define RR_TIA 0x9e - #define RR_TIA_N6 BIT(8) - #define RR_MIXER 0x9f -@@ -3853,6 +3858,9 @@ - #define B_TXSHAPE_TRIANGULAR_CFG GENMASK(25, 24) - #define R_BANDEDGE 0x4498 - #define B_BANDEDGE_EN BIT(30) -+#define R_DPD_BF 0x44a0 -+#define B_DPD_BF_OFDM GENMASK(16, 12) -+#define B_DPD_BF_SCA GENMASK(6, 0) - #define R_TXPATH_SEL 0x458C - #define B_TXPATH_SEL_MSK GENMASK(31, 28) - #define R_TXPWR 0x4594 -@@ -4299,6 +4307,7 @@ - #define B_KPATH_CFG_ED GENMASK(21, 20) - #define R_KIP_RPT1 0x80D4 - #define B_KIP_RPT1_SEL GENMASK(21, 16) -+#define B_KIP_RPT1_SEL_V1 GENMASK(19, 16) - #define R_SRAM_IQRX 0x80D8 - #define R_GAPK 0x80E0 - #define B_GAPK_ADR BIT(0) -@@ -4320,6 +4329,7 @@ - #define B_PRT_COM_GL GENMASK(7, 4) - #define B_PRT_COM_CORI GENMASK(7, 0) - #define B_PRT_COM_RXBB GENMASK(5, 0) -+#define B_PRT_COM_RXBB_V1 GENMASK(4, 0) - #define B_PRT_COM_DONE BIT(0) - #define R_COEF_SEL 0x8104 - #define B_COEF_SEL_IQC BIT(0) -@@ -4358,13 +4368,18 @@ - #define B_DPD_LBK BIT(7) - #define R_DPD_CH0 0x81AC - #define R_DPD_BND 0x81B4 -+#define B_DPD_BND_1 GENMASK(24, 16) -+#define B_DPD_BND_0 GENMASK(8, 0) - #define R_DPD_CH0A 0x81BC - #define B_DPD_MEN GENMASK(31, 28) - #define B_DPD_ORDER GENMASK(26, 24) -+#define B_DPD_ORDER_V1 GENMASK(26, 25) -+#define B_DPD_CFG GENMASK(22, 0) - #define B_DPD_SEL GENMASK(13, 8) - #define R_TXAGC_RFK 0x81C4 - #define B_TXAGC_RFK_CH0 GENMASK(5, 0) - #define R_DPD_COM 0x81C8 -+#define B_DPD_COM_OF BIT(15) - #define R_KIP_IQP 0x81CC - #define B_KIP_IQP_SW GENMASK(13, 12) - #define B_KIP_IQP_IQSW GENMASK(5, 0) -@@ -4464,6 +4479,7 @@ - #define R_P0_CFCH_BW0 0xC0D4 - #define B_P0_CFCH_BW0 GENMASK(27, 26) - #define R_P0_CFCH_BW1 0xC0D8 -+#define B_P0_CFCH_EX BIT(13) - #define B_P0_CFCH_BW1 GENMASK(8, 5) - #define R_ADDCK0D 0xC0F0 - #define B_ADDCK0D_VAL2 GENMASK(31, 26) -@@ -4513,6 +4529,7 @@ - #define R_PATH0_BW_SEL_V1 0xC0D8 - #define B_PATH0_BW_SEL_MSK_V1 GENMASK(8, 5) - #define R_PATH1_BW_SEL_V1 0xC1D8 -+#define B_PATH1_BW_SEL_EX BIT(13) - #define B_PATH1_BW_SEL_MSK_V1 GENMASK(8, 5) - #define R_ADDCK1D 0xC1F0 - #define B_ADDCK1D_VAL2 GENMASK(31, 26) ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -@@ -17,9 +17,49 @@ - #define RTW8852B_IQK_SS 2 - #define RTW8852B_RXK_GROUP_NR 4 - #define RTW8852B_TSSI_PATH_NR 2 -+#define RTW8852B_RF_REL_VERSION 34 -+#define RTW8852B_DPK_VER 0x0d -+#define RTW8852B_DPK_RF_PATH 2 -+#define RTW8852B_DPK_KIP_REG_NUM 2 - - #define _TSSI_DE_MASK GENMASK(21, 12) - #define ADDC_T_AVG 100 -+#define DPK_TXAGC_LOWER 0x2e -+#define DPK_TXAGC_UPPER 0x3f -+#define DPK_TXAGC_INVAL 0xff -+#define RFREG_MASKRXBB 0x003e0 -+#define RFREG_MASKMODE 0xf0000 -+ -+enum rtw8852b_dpk_id { -+ LBK_RXIQK = 0x06, -+ SYNC = 0x10, -+ MDPK_IDL = 0x11, -+ MDPK_MPA = 0x12, -+ GAIN_LOSS = 0x13, -+ GAIN_CAL = 0x14, -+ DPK_RXAGC = 0x15, -+ KIP_PRESET = 0x16, -+ KIP_RESTORE = 0x17, -+ DPK_TXAGC = 0x19, -+ D_KIP_PRESET = 0x28, -+ D_TXAGC = 0x29, -+ D_RXAGC = 0x2a, -+ D_SYNC = 0x2b, -+ D_GAIN_LOSS = 0x2c, -+ D_MDPK_IDL = 0x2d, -+ D_GAIN_NORM = 0x2f, -+ D_KIP_THERMAL = 0x30, -+ D_KIP_RESTORE = 0x31 -+}; -+ -+enum dpk_agc_step { -+ DPK_AGC_STEP_SYNC_DGAIN, -+ DPK_AGC_STEP_GAIN_ADJ, -+ DPK_AGC_STEP_GAIN_LOSS_IDX, -+ DPK_AGC_STEP_GL_GT_CRITERION, -+ DPK_AGC_STEP_GL_LT_CRITERION, -+ DPK_AGC_STEP_SET_TX_GAIN, -+}; - - enum rtw8852b_iqk_type { - ID_TXAGC = 0x0, -@@ -190,6 +230,24 @@ static void _rfk_restore_rf_reg(struct r - } - } - -+static void _rfk_rf_direct_cntrl(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, bool is_bybb) -+{ -+ if (is_bybb) -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); -+ else -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); -+} -+ -+static void _rfk_drf_direct_cntrl(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, bool is_bybb) -+{ -+ if (is_bybb) -+ rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x1); -+ else -+ rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x0); -+} -+ - static bool _iqk_check_cal(struct rtw89_dev *rtwdev, u8 path) - { - bool fail = true; -@@ -1605,6 +1663,1069 @@ static void _iqk(struct rtw89_dev *rtwde - } - } - -+static void _dpk_bkup_kip(struct rtw89_dev *rtwdev, const u32 reg[], -+ u32 reg_bkup[][RTW8852B_DPK_KIP_REG_NUM], u8 path) -+{ -+ u8 i; -+ -+ for (i = 0; i < RTW8852B_DPK_KIP_REG_NUM; i++) { -+ reg_bkup[path][i] = -+ rtw89_phy_read32_mask(rtwdev, reg[i] + (path << 8), MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Backup 0x%x = %x\n", -+ reg[i] + (path << 8), reg_bkup[path][i]); -+ } -+} -+ -+static void _dpk_reload_kip(struct rtw89_dev *rtwdev, const u32 reg[], -+ const u32 reg_bkup[][RTW8852B_DPK_KIP_REG_NUM], u8 path) -+{ -+ u8 i; -+ -+ for (i = 0; i < RTW8852B_DPK_KIP_REG_NUM; i++) { -+ rtw89_phy_write32_mask(rtwdev, reg[i] + (path << 8), MASKDWORD, -+ reg_bkup[path][i]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Reload 0x%x = %x\n", -+ reg[i] + (path << 8), reg_bkup[path][i]); -+ } -+} -+ -+static u8 _dpk_order_convert(struct rtw89_dev *rtwdev) -+{ -+ u8 order; -+ u8 val; -+ -+ order = rtw89_phy_read32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP); -+ val = 0x3 >> order; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] convert MDPD order to 0x%x\n", val); -+ -+ return val; -+} -+ -+static void _dpk_onoff(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, bool off) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ u8 val, kidx = dpk->cur_idx[path]; -+ -+ val = dpk->is_dpk_enable && !off && dpk->bp[path][kidx].path_ok; -+ -+ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), -+ MASKBYTE3, _dpk_order_convert(rtwdev) << 1 | val); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] DPK %s !!!\n", path, -+ kidx, dpk->is_dpk_enable && !off ? "enable" : "disable"); -+} -+ -+static void _dpk_one_shot(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, enum rtw8852b_dpk_id id) -+{ -+ u16 dpk_cmd; -+ u32 val; -+ int ret; -+ -+ dpk_cmd = (id << 8) | (0x19 + (path << 4)); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, dpk_cmd); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val == 0x55, -+ 1, 20000, false, -+ rtwdev, 0xbff8, MASKBYTE0); -+ if (ret) -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] one-shot over 20ms!!!!\n"); -+ -+ udelay(1); -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x00030000); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val == 0x8000, -+ 1, 2000, false, -+ rtwdev, 0x80fc, MASKLWORD); -+ if (ret) -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] one-shot over 20ms!!!!\n"); -+ -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, MASKBYTE0, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] one-shot for %s = 0x%x\n", -+ id == 0x06 ? "LBK_RXIQK" : -+ id == 0x10 ? "SYNC" : -+ id == 0x11 ? "MDPK_IDL" : -+ id == 0x12 ? "MDPK_MPA" : -+ id == 0x13 ? "GAIN_LOSS" : -+ id == 0x14 ? "PWR_CAL" : -+ id == 0x15 ? "DPK_RXAGC" : -+ id == 0x16 ? "KIP_PRESET" : -+ id == 0x17 ? "KIP_RESOTRE" : "DPK_TXAGC", -+ dpk_cmd); -+} -+ -+static void _dpk_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_EN_TIA_IDA, 0x3); -+ _set_rx_dck(rtwdev, phy, path); -+} -+ -+static void _dpk_information(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ -+ u8 kidx = dpk->cur_idx[path]; -+ -+ dpk->bp[path][kidx].band = chan->band_type; -+ dpk->bp[path][kidx].ch = chan->channel; -+ dpk->bp[path][kidx].bw = chan->band_width; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] S%d[%d] (PHY%d): TSSI %s/ DBCC %s/ %s/ CH%d/ %s\n", -+ path, dpk->cur_idx[path], phy, -+ rtwdev->is_tssi_mode[path] ? "on" : "off", -+ rtwdev->dbcc_en ? "on" : "off", -+ dpk->bp[path][kidx].band == 0 ? "2G" : -+ dpk->bp[path][kidx].band == 1 ? "5G" : "6G", -+ dpk->bp[path][kidx].ch, -+ dpk->bp[path][kidx].bw == 0 ? "20M" : -+ dpk->bp[path][kidx].bw == 1 ? "40M" : "80M"); -+} -+ -+static void _dpk_bb_afe_setting(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kpath) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852b_dpk_afe_defs_tbl); -+ -+ if (chan->band_width == RTW89_CHANNEL_WIDTH_80) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1, B_P0_CFCH_EX, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_BW_SEL_V1, B_PATH1_BW_SEL_EX, 0x1); -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Set BB/AFE for PHY%d (kpath=%d)\n", phy, kpath); -+} -+ -+static void _dpk_bb_afe_restore(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kpath) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8852b_dpk_afe_restore_defs_tbl); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Restore BB/AFE for PHY%d (kpath=%d)\n", phy, kpath); -+ -+ if (chan->band_width == RTW89_CHANNEL_WIDTH_80) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1, B_P0_CFCH_EX, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH1_BW_SEL_V1, B_PATH1_BW_SEL_EX, 0x0); -+ } -+} -+ -+static void _dpk_tssi_pause(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, bool is_pause) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), -+ B_P0_TSSI_TRK_EN, is_pause); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d TSSI %s\n", path, -+ is_pause ? "pause" : "resume"); -+} -+ -+static void _dpk_kip_restore(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser(rtwdev, &rtw8852b_dpk_kip_defs_tbl); -+ -+ if (rtwdev->hal.cv > CHIP_CAV) -+ rtw89_phy_write32_mask(rtwdev, R_DPD_COM + (path << 8), B_DPD_COM_OF, 0x1); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d restore KIP\n", path); -+} -+ -+static void _dpk_lbk_rxiqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ u8 cur_rxbb; -+ u32 tmp; -+ -+ cur_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASKRXBB); -+ -+ rtw89_phy_write32_mask(rtwdev, R_MDPK_RX_DCK, B_MDPK_RX_DCK_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_RES + (path << 8), B_IQK_RES_RXCFIR, 0x0); -+ -+ tmp = rtw89_read_rf(rtwdev, path, RR_CFGCH, RFREG_MASK); -+ rtw89_write_rf(rtwdev, path, RR_RSV4, RFREG_MASK, tmp); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASKMODE, 0xd); -+ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_PLLEN, 0x1); -+ -+ if (cur_rxbb >= 0x11) -+ rtw89_write_rf(rtwdev, path, RR_TXIQK, RR_TXIQK_ATT1, 0x13); -+ else if (cur_rxbb <= 0xa) -+ rtw89_write_rf(rtwdev, path, RR_TXIQK, RR_TXIQK_ATT1, 0x00); -+ else -+ rtw89_write_rf(rtwdev, path, RR_TXIQK, RR_TXIQK_ATT1, 0x05); -+ -+ rtw89_write_rf(rtwdev, path, RR_XGLNA2, RR_XGLNA2_SW, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RFREG_MASK, 0x80014); -+ udelay(70); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x025); -+ -+ _dpk_one_shot(rtwdev, phy, path, LBK_RXIQK); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d LBK RXIQC = 0x%x\n", path, -+ rtw89_phy_read32_mask(rtwdev, R_RXIQC, MASKDWORD)); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RXK, RR_RXK_PLLEN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_MDPK_RX_DCK, B_MDPK_RX_DCK_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_KPATH_CFG, B_KPATH_CFG_ED, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_DI, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASKMODE, 0x5); -+} -+ -+static void _dpk_get_thermal(struct rtw89_dev *rtwdev, u8 kidx, enum rtw89_rf_path path) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ -+ rtw89_write_rf(rtwdev, path, RR_TM, RR_TM_TRI, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_TM, RR_TM_TRI, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_TM, RR_TM_TRI, 0x1); -+ -+ udelay(200); -+ -+ dpk->bp[path][kidx].ther_dpk = rtw89_read_rf(rtwdev, path, RR_TM, RR_TM_VAL); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] thermal@DPK = 0x%x\n", -+ dpk->bp[path][kidx].ther_dpk); -+} -+ -+static void _dpk_rf_setting(struct rtw89_dev *rtwdev, u8 gain, -+ enum rtw89_rf_path path, u8 kidx) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ -+ if (dpk->bp[path][kidx].band == RTW89_BAND_2G) { -+ rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, 0x50220); -+ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_FATT, 0xf2); -+ rtw89_write_rf(rtwdev, path, RR_LUTDBG, RR_LUTDBG_TIA, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_TIA, RR_TIA_N6, 0x1); -+ } else { -+ rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, 0x50220); -+ rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RAA2_SWATT, 0x5); -+ rtw89_write_rf(rtwdev, path, RR_LUTDBG, RR_LUTDBG_TIA, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_TIA, RR_TIA_N6, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_RXA_LNA, RFREG_MASK, 0x920FC); -+ rtw89_write_rf(rtwdev, path, RR_XALNA2, RFREG_MASK, 0x002C0); -+ rtw89_write_rf(rtwdev, path, RR_IQGEN, RFREG_MASK, 0x38800); -+ } -+ -+ rtw89_write_rf(rtwdev, path, RR_RCKD, RR_RCKD_BW, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_BTC, RR_BTC_TXBB, dpk->bp[path][kidx].bw + 1); -+ rtw89_write_rf(rtwdev, path, RR_BTC, RR_BTC_RXBB, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] ARF 0x0/0x11/0x1a = 0x%x/ 0x%x/ 0x%x\n", -+ rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK), -+ rtw89_read_rf(rtwdev, path, RR_TXIG, RFREG_MASK), -+ rtw89_read_rf(rtwdev, path, RR_BTC, RFREG_MASK)); -+} -+ -+static void _dpk_bypass_rxcfir(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, bool is_bypass) -+{ -+ if (is_bypass) { -+ rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), -+ B_RXIQC_BYPASS2, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), -+ B_RXIQC_BYPASS, 0x1); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Bypass RXIQC (0x8%d3c = 0x%x)\n", 1 + path, -+ rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), -+ MASKDWORD)); -+ } else { -+ rtw89_phy_write32_clr(rtwdev, R_RXIQC + (path << 8), B_RXIQC_BYPASS2); -+ rtw89_phy_write32_clr(rtwdev, R_RXIQC + (path << 8), B_RXIQC_BYPASS); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] restore 0x8%d3c = 0x%x\n", 1 + path, -+ rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), -+ MASKDWORD)); -+ } -+} -+ -+static -+void _dpk_tpg_sel(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ -+ if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80) -+ rtw89_phy_write32_clr(rtwdev, R_TPG_MOD, B_TPG_MOD_F); -+ else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40) -+ rtw89_phy_write32_mask(rtwdev, R_TPG_MOD, B_TPG_MOD_F, 0x2); -+ else -+ rtw89_phy_write32_mask(rtwdev, R_TPG_MOD, B_TPG_MOD_F, 0x1); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] TPG_Select for %s\n", -+ dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80 ? "80M" : -+ dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40 ? "40M" : "20M"); -+} -+ -+static void _dpk_table_select(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, u8 kidx, u8 gain) -+{ -+ u8 val; -+ -+ val = 0x80 + kidx * 0x20 + gain * 0x10; -+ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0 + (path << 8), MASKBYTE3, val); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] table select for Kidx[%d], Gain[%d] (0x%x)\n", kidx, -+ gain, val); -+} -+ -+static bool _dpk_sync_check(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) -+{ -+#define DPK_SYNC_TH_DC_I 200 -+#define DPK_SYNC_TH_DC_Q 200 -+#define DPK_SYNC_TH_CORR 170 -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ u16 dc_i, dc_q; -+ u8 corr_val, corr_idx; -+ -+ rtw89_phy_write32_clr(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL); -+ -+ corr_idx = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_CORI); -+ corr_val = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_CORV); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] S%d Corr_idx / Corr_val = %d / %d\n", -+ path, corr_idx, corr_val); -+ -+ dpk->corr_idx[path][kidx] = corr_idx; -+ dpk->corr_val[path][kidx] = corr_val; -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x9); -+ -+ dc_i = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCI); -+ dc_q = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCQ); -+ -+ dc_i = abs(sign_extend32(dc_i, 11)); -+ dc_q = abs(sign_extend32(dc_q, 11)); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d DC I/Q, = %d / %d\n", -+ path, dc_i, dc_q); -+ -+ dpk->dc_i[path][kidx] = dc_i; -+ dpk->dc_q[path][kidx] = dc_q; -+ -+ if (dc_i > DPK_SYNC_TH_DC_I || dc_q > DPK_SYNC_TH_DC_Q || -+ corr_val < DPK_SYNC_TH_CORR) -+ return true; -+ else -+ return false; -+} -+ -+static bool _dpk_sync(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kidx) -+{ -+ _dpk_one_shot(rtwdev, phy, path, SYNC); -+ -+ return _dpk_sync_check(rtwdev, path, kidx); -+} -+ -+static u16 _dpk_dgain_read(struct rtw89_dev *rtwdev) -+{ -+ u16 dgain; -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x0); -+ -+ dgain = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCI); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] DGain = 0x%x\n", dgain); -+ -+ return dgain; -+} -+ -+static s8 _dpk_dgain_mapping(struct rtw89_dev *rtwdev, u16 dgain) -+{ -+ static const u16 bnd[15] = { -+ 0xbf1, 0xaa5, 0x97d, 0x875, 0x789, 0x6b7, 0x5fc, 0x556, -+ 0x4c1, 0x43d, 0x3c7, 0x35e, 0x2ac, 0x262, 0x220 -+ }; -+ s8 offset; -+ -+ if (dgain >= bnd[0]) -+ offset = 0x6; -+ else if (bnd[0] > dgain && dgain >= bnd[1]) -+ offset = 0x6; -+ else if (bnd[1] > dgain && dgain >= bnd[2]) -+ offset = 0x5; -+ else if (bnd[2] > dgain && dgain >= bnd[3]) -+ offset = 0x4; -+ else if (bnd[3] > dgain && dgain >= bnd[4]) -+ offset = 0x3; -+ else if (bnd[4] > dgain && dgain >= bnd[5]) -+ offset = 0x2; -+ else if (bnd[5] > dgain && dgain >= bnd[6]) -+ offset = 0x1; -+ else if (bnd[6] > dgain && dgain >= bnd[7]) -+ offset = 0x0; -+ else if (bnd[7] > dgain && dgain >= bnd[8]) -+ offset = 0xff; -+ else if (bnd[8] > dgain && dgain >= bnd[9]) -+ offset = 0xfe; -+ else if (bnd[9] > dgain && dgain >= bnd[10]) -+ offset = 0xfd; -+ else if (bnd[10] > dgain && dgain >= bnd[11]) -+ offset = 0xfc; -+ else if (bnd[11] > dgain && dgain >= bnd[12]) -+ offset = 0xfb; -+ else if (bnd[12] > dgain && dgain >= bnd[13]) -+ offset = 0xfa; -+ else if (bnd[13] > dgain && dgain >= bnd[14]) -+ offset = 0xf9; -+ else if (bnd[14] > dgain) -+ offset = 0xf8; -+ else -+ offset = 0x0; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] DGain offset = %d\n", offset); -+ -+ return offset; -+} -+ -+static u8 _dpk_gainloss_read(struct rtw89_dev *rtwdev) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x6); -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG2, B_DPK_CFG2_ST, 0x1); -+ -+ return rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_GL); -+} -+ -+static void _dpk_gainloss(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kidx) -+{ -+ _dpk_table_select(rtwdev, path, kidx, 1); -+ _dpk_one_shot(rtwdev, phy, path, GAIN_LOSS); -+} -+ -+static void _dpk_kip_preset(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kidx) -+{ -+ _dpk_tpg_sel(rtwdev, path, kidx); -+ _dpk_one_shot(rtwdev, phy, path, KIP_PRESET); -+} -+ -+static void _dpk_kip_pwr_clk_on(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000080); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x807f030a); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_SYS + (path << 8), MASKDWORD, 0xce000a08); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] KIP Power/CLK on\n"); -+} -+ -+static void _dpk_kip_set_txagc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 txagc) -+{ -+ rtw89_write_rf(rtwdev, path, RR_TXAGC, RFREG_MASK, txagc); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1); -+ _dpk_one_shot(rtwdev, phy, path, DPK_TXAGC); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] set TXAGC = 0x%x\n", txagc); -+} -+ -+static void _dpk_kip_set_rxagc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ u32 tmp; -+ -+ tmp = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_MOD, B_KIP_MOD, tmp); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x1); -+ _dpk_one_shot(rtwdev, phy, path, DPK_RXAGC); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL_V1, 0x8); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] set RXBB = 0x%x (RF0x0[9:5] = 0x%x)\n", -+ rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_RXBB_V1), -+ rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASKRXBB)); -+} -+ -+static u8 _dpk_set_offset(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, s8 gain_offset) -+{ -+ u8 txagc; -+ -+ txagc = rtw89_read_rf(rtwdev, path, RR_TXAGC, RFREG_MASK); -+ -+ if (txagc - gain_offset < DPK_TXAGC_LOWER) -+ txagc = DPK_TXAGC_LOWER; -+ else if (txagc - gain_offset > DPK_TXAGC_UPPER) -+ txagc = DPK_TXAGC_UPPER; -+ else -+ txagc = txagc - gain_offset; -+ -+ _dpk_kip_set_txagc(rtwdev, phy, path, txagc); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] tmp_txagc (GL=%d) = 0x%x\n", -+ gain_offset, txagc); -+ return txagc; -+} -+ -+static bool _dpk_pas_read(struct rtw89_dev *rtwdev, bool is_check) -+{ -+ u32 val1_i = 0, val1_q = 0, val2_i = 0, val2_q = 0; -+ u8 i; -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKBYTE2, 0x06); -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG2, B_DPK_CFG2_ST, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE2, 0x08); -+ -+ if (is_check) { -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, 0x00); -+ val1_i = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKHWORD); -+ val1_i = abs(sign_extend32(val1_i, 11)); -+ val1_q = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKLWORD); -+ val1_q = abs(sign_extend32(val1_q, 11)); -+ -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, 0x1f); -+ val2_i = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKHWORD); -+ val2_i = abs(sign_extend32(val2_i, 11)); -+ val2_q = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKLWORD); -+ val2_q = abs(sign_extend32(val2_q, 11)); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] PAS_delta = 0x%x\n", -+ phy_div(val1_i * val1_i + val1_q * val1_q, -+ val2_i * val2_i + val2_q * val2_q)); -+ } else { -+ for (i = 0; i < 32; i++) { -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, i); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] PAS_Read[%02d]= 0x%08x\n", i, -+ rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD)); -+ } -+ } -+ -+ if (val1_i * val1_i + val1_q * val1_q >= -+ (val2_i * val2_i + val2_q * val2_q) * 8 / 5) -+ return true; -+ -+ return false; -+} -+ -+static u8 _dpk_agc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kidx, u8 init_txagc, -+ bool loss_only) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u8 step = DPK_AGC_STEP_SYNC_DGAIN; -+ u8 tmp_txagc, tmp_rxbb = 0, tmp_gl_idx = 0; -+ u8 goout = 0, agc_cnt = 0, limited_rxbb = 0; -+ u16 dgain = 0; -+ s8 offset; -+ int limit = 200; -+ -+ tmp_txagc = init_txagc; -+ -+ do { -+ switch (step) { -+ case DPK_AGC_STEP_SYNC_DGAIN: -+ if (_dpk_sync(rtwdev, phy, path, kidx)) { -+ tmp_txagc = 0xff; -+ goout = 1; -+ break; -+ } -+ -+ dgain = _dpk_dgain_read(rtwdev); -+ -+ if (loss_only == 1 || limited_rxbb == 1) -+ step = DPK_AGC_STEP_GAIN_LOSS_IDX; -+ else -+ step = DPK_AGC_STEP_GAIN_ADJ; -+ break; -+ -+ case DPK_AGC_STEP_GAIN_ADJ: -+ tmp_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, -+ RFREG_MASKRXBB); -+ offset = _dpk_dgain_mapping(rtwdev, dgain); -+ -+ if (tmp_rxbb + offset > 0x1f) { -+ tmp_rxbb = 0x1f; -+ limited_rxbb = 1; -+ } else if (tmp_rxbb + offset < 0) { -+ tmp_rxbb = 0; -+ limited_rxbb = 1; -+ } else { -+ tmp_rxbb = tmp_rxbb + offset; -+ } -+ -+ rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASKRXBB, -+ tmp_rxbb); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Adjust RXBB (%d) = 0x%x\n", offset, tmp_rxbb); -+ if (offset || agc_cnt == 0) { -+ if (chan->band_width < RTW89_CHANNEL_WIDTH_80) -+ _dpk_bypass_rxcfir(rtwdev, path, true); -+ else -+ _dpk_lbk_rxiqk(rtwdev, phy, path); -+ } -+ if (dgain > 1922 || dgain < 342) -+ step = DPK_AGC_STEP_SYNC_DGAIN; -+ else -+ step = DPK_AGC_STEP_GAIN_LOSS_IDX; -+ -+ agc_cnt++; -+ break; -+ -+ case DPK_AGC_STEP_GAIN_LOSS_IDX: -+ _dpk_gainloss(rtwdev, phy, path, kidx); -+ tmp_gl_idx = _dpk_gainloss_read(rtwdev); -+ -+ if ((tmp_gl_idx == 0 && _dpk_pas_read(rtwdev, true)) || -+ tmp_gl_idx >= 7) -+ step = DPK_AGC_STEP_GL_GT_CRITERION; -+ else if (tmp_gl_idx == 0) -+ step = DPK_AGC_STEP_GL_LT_CRITERION; -+ else -+ step = DPK_AGC_STEP_SET_TX_GAIN; -+ break; -+ -+ case DPK_AGC_STEP_GL_GT_CRITERION: -+ if (tmp_txagc == 0x2e) { -+ goout = 1; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Txagc@lower bound!!\n"); -+ } else { -+ tmp_txagc = _dpk_set_offset(rtwdev, phy, path, 0x3); -+ } -+ step = DPK_AGC_STEP_GAIN_LOSS_IDX; -+ agc_cnt++; -+ break; -+ -+ case DPK_AGC_STEP_GL_LT_CRITERION: -+ if (tmp_txagc == 0x3f) { -+ goout = 1; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Txagc@upper bound!!\n"); -+ } else { -+ tmp_txagc = _dpk_set_offset(rtwdev, phy, path, 0xfe); -+ } -+ step = DPK_AGC_STEP_GAIN_LOSS_IDX; -+ agc_cnt++; -+ break; -+ case DPK_AGC_STEP_SET_TX_GAIN: -+ tmp_txagc = _dpk_set_offset(rtwdev, phy, path, tmp_gl_idx); -+ goout = 1; -+ agc_cnt++; -+ break; -+ -+ default: -+ goout = 1; -+ break; -+ } -+ } while (!goout && agc_cnt < 6 && limit-- > 0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Txagc / RXBB for DPK = 0x%x / 0x%x\n", tmp_txagc, -+ tmp_rxbb); -+ -+ return tmp_txagc; -+} -+ -+static void _dpk_set_mdpd_para(struct rtw89_dev *rtwdev, u8 order) -+{ -+ switch (order) { -+ case 0: -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP, order); -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_PN, 0x3); -+ rtw89_phy_write32_mask(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_MAN, 0x1); -+ break; -+ case 1: -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP, order); -+ rtw89_phy_write32_clr(rtwdev, R_LDL_NORM, B_LDL_NORM_PN); -+ rtw89_phy_write32_clr(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_MAN); -+ break; -+ case 2: -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP, order); -+ rtw89_phy_write32_clr(rtwdev, R_LDL_NORM, B_LDL_NORM_PN); -+ rtw89_phy_write32_clr(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_MAN); -+ break; -+ default: -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Wrong MDPD order!!(0x%x)\n", order); -+ break; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Set MDPD order to 0x%x for IDL\n", order); -+} -+ -+static void _dpk_idl_mpa(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kidx, u8 gain) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ -+ if (dpk->bp[path][kidx].bw < RTW89_CHANNEL_WIDTH_80 && -+ dpk->bp[path][kidx].band == RTW89_BAND_5G) -+ _dpk_set_mdpd_para(rtwdev, 0x2); -+ else -+ _dpk_set_mdpd_para(rtwdev, 0x0); -+ -+ _dpk_one_shot(rtwdev, phy, path, MDPK_IDL); -+} -+ -+static void _dpk_fill_result(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kidx, u8 gain, u8 txagc) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ const u16 pwsf = 0x78; -+ u8 gs = dpk->dpk_gs[phy]; -+ -+ rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), -+ B_COEF_SEL_MDPD, kidx); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Fill txagc/ pwsf/ gs = 0x%x/ 0x%x/ 0x%x\n", txagc, -+ pwsf, gs); -+ -+ dpk->bp[path][kidx].txagc_dpk = txagc; -+ rtw89_phy_write32_mask(rtwdev, R_TXAGC_RFK + (path << 8), -+ 0x3F << ((gain << 3) + (kidx << 4)), txagc); -+ -+ dpk->bp[path][kidx].pwsf = pwsf; -+ rtw89_phy_write32_mask(rtwdev, R_DPD_BND + (path << 8) + (kidx << 2), -+ 0x1FF << (gain << 4), pwsf); -+ -+ rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x0); -+ -+ dpk->bp[path][kidx].gs = gs; -+ if (dpk->dpk_gs[phy] == 0x7f) -+ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), -+ MASKDWORD, 0x007f7f7f); -+ else -+ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), -+ MASKDWORD, 0x005b5b5b); -+ -+ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), -+ B_DPD_ORDER_V1, _dpk_order_convert(rtwdev)); -+ rtw89_phy_write32_mask(rtwdev, R_DPD_V1 + (path << 8), MASKDWORD, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_SEL, 0x0); -+} -+ -+static bool _dpk_reload_check(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ bool is_reload = false; -+ u8 idx, cur_band, cur_ch; -+ -+ cur_band = chan->band_type; -+ cur_ch = chan->channel; -+ -+ for (idx = 0; idx < RTW89_DPK_BKUP_NUM; idx++) { -+ if (cur_band != dpk->bp[path][idx].band || -+ cur_ch != dpk->bp[path][idx].ch) -+ continue; -+ -+ rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), -+ B_COEF_SEL_MDPD, idx); -+ dpk->cur_idx[path] = idx; -+ is_reload = true; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] reload S%d[%d] success\n", path, idx); -+ } -+ -+ return is_reload; -+} -+ -+static bool _dpk_main(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 gain) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ u8 txagc = 0x38, kidx = dpk->cur_idx[path]; -+ bool is_fail = false; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] ========= S%d[%d] DPK Start =========\n", path, kidx); -+ -+ _rfk_rf_direct_cntrl(rtwdev, path, false); -+ _rfk_drf_direct_cntrl(rtwdev, path, false); -+ -+ _dpk_kip_pwr_clk_on(rtwdev, path); -+ _dpk_kip_set_txagc(rtwdev, phy, path, txagc); -+ _dpk_rf_setting(rtwdev, gain, path, kidx); -+ _dpk_rx_dck(rtwdev, phy, path); -+ -+ _dpk_kip_preset(rtwdev, phy, path, kidx); -+ _dpk_kip_set_rxagc(rtwdev, phy, path); -+ _dpk_table_select(rtwdev, path, kidx, gain); -+ -+ txagc = _dpk_agc(rtwdev, phy, path, kidx, txagc, false); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Adjust txagc = 0x%x\n", txagc); -+ -+ if (txagc == 0xff) { -+ is_fail = true; -+ } else { -+ _dpk_get_thermal(rtwdev, kidx, path); -+ -+ _dpk_idl_mpa(rtwdev, phy, path, kidx, gain); -+ -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); -+ -+ _dpk_fill_result(rtwdev, phy, path, kidx, gain, txagc); -+ } -+ -+ if (!is_fail) -+ dpk->bp[path][kidx].path_ok = true; -+ else -+ dpk->bp[path][kidx].path_ok = false; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] DPK %s\n", path, kidx, -+ is_fail ? "Check" : "Success"); -+ -+ return is_fail; -+} -+ -+static void _dpk_cal_select(struct rtw89_dev *rtwdev, bool force, -+ enum rtw89_phy_idx phy, u8 kpath) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ static const u32 kip_reg[] = {0x813c, 0x8124, 0x8120}; -+ u32 kip_bkup[RTW8852B_DPK_RF_PATH][RTW8852B_DPK_KIP_REG_NUM] = {}; -+ u32 backup_rf_val[RTW8852B_DPK_RF_PATH][BACKUP_RF_REGS_NR]; -+ u32 backup_bb_val[BACKUP_BB_REGS_NR]; -+ bool is_fail = true, reloaded[RTW8852B_DPK_RF_PATH] = {}; -+ u8 path; -+ -+ if (dpk->is_dpk_reload_en) { -+ for (path = 0; path < RTW8852B_DPK_RF_PATH; path++) { -+ reloaded[path] = _dpk_reload_check(rtwdev, phy, path); -+ if (!reloaded[path] && dpk->bp[path][0].ch) -+ dpk->cur_idx[path] = !dpk->cur_idx[path]; -+ else -+ _dpk_onoff(rtwdev, path, false); -+ } -+ } else { -+ for (path = 0; path < RTW8852B_DPK_RF_PATH; path++) -+ dpk->cur_idx[path] = 0; -+ } -+ -+ _rfk_backup_bb_reg(rtwdev, &backup_bb_val[0]); -+ -+ for (path = 0; path < RTW8852B_DPK_RF_PATH; path++) { -+ _dpk_bkup_kip(rtwdev, kip_reg, kip_bkup, path); -+ _rfk_backup_rf_reg(rtwdev, &backup_rf_val[path][0], path); -+ _dpk_information(rtwdev, phy, path); -+ if (rtwdev->is_tssi_mode[path]) -+ _dpk_tssi_pause(rtwdev, path, true); -+ } -+ -+ _dpk_bb_afe_setting(rtwdev, phy, path, kpath); -+ -+ for (path = 0; path < RTW8852B_DPK_RF_PATH; path++) { -+ is_fail = _dpk_main(rtwdev, phy, path, 1); -+ _dpk_onoff(rtwdev, path, is_fail); -+ } -+ -+ _dpk_bb_afe_restore(rtwdev, phy, path, kpath); -+ _rfk_restore_bb_reg(rtwdev, &backup_bb_val[0]); -+ -+ for (path = 0; path < RTW8852B_DPK_RF_PATH; path++) { -+ _dpk_kip_restore(rtwdev, path); -+ _dpk_reload_kip(rtwdev, kip_reg, kip_bkup, path); -+ _rfk_restore_rf_reg(rtwdev, &backup_rf_val[path][0], path); -+ if (rtwdev->is_tssi_mode[path]) -+ _dpk_tssi_pause(rtwdev, path, false); -+ } -+} -+ -+static bool _dpk_bypass_check(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ struct rtw89_fem_info *fem = &rtwdev->fem; -+ -+ if (fem->epa_2g && chan->band_type == RTW89_BAND_2G) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Skip DPK due to 2G_ext_PA exist!!\n"); -+ return true; -+ } else if (fem->epa_5g && chan->band_type == RTW89_BAND_5G) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Skip DPK due to 5G_ext_PA exist!!\n"); -+ return true; -+ } else if (fem->epa_6g && chan->band_type == RTW89_BAND_6G) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Skip DPK due to 6G_ext_PA exist!!\n"); -+ return true; -+ } -+ -+ return false; -+} -+ -+static void _dpk_force_bypass(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ u8 path, kpath; -+ -+ kpath = _kpath(rtwdev, phy); -+ -+ for (path = 0; path < RTW8852B_DPK_RF_PATH; path++) { -+ if (kpath & BIT(path)) -+ _dpk_onoff(rtwdev, path, true); -+ } -+} -+ -+static void _dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool force) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] ****** DPK Start (Ver: 0x%x, Cv: %d, RF_para: %d) ******\n", -+ RTW8852B_DPK_VER, rtwdev->hal.cv, -+ RTW8852B_RF_REL_VERSION); -+ -+ if (_dpk_bypass_check(rtwdev, phy)) -+ _dpk_force_bypass(rtwdev, phy); -+ else -+ _dpk_cal_select(rtwdev, force, phy, RF_AB); -+} -+ -+static void _dpk_track(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ s8 txagc_bb, txagc_bb_tp, ini_diff = 0, txagc_ofst; -+ s8 delta_ther[2] = {}; -+ u8 trk_idx, txagc_rf; -+ u8 path, kidx; -+ u16 pwsf[2]; -+ u8 cur_ther; -+ u32 tmp; -+ -+ for (path = 0; path < RF_PATH_NUM_8852B; path++) { -+ kidx = dpk->cur_idx[path]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] ================[S%d[%d] (CH %d)]================\n", -+ path, kidx, dpk->bp[path][kidx].ch); -+ -+ cur_ther = ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] thermal now = %d\n", cur_ther); -+ -+ if (dpk->bp[path][kidx].ch && cur_ther) -+ delta_ther[path] = dpk->bp[path][kidx].ther_dpk - cur_ther; -+ -+ if (dpk->bp[path][kidx].band == RTW89_BAND_2G) -+ delta_ther[path] = delta_ther[path] * 3 / 2; -+ else -+ delta_ther[path] = delta_ther[path] * 5 / 2; -+ -+ txagc_rf = rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), -+ 0x0000003f); -+ -+ if (rtwdev->is_tssi_mode[path]) { -+ trk_idx = rtw89_read_rf(rtwdev, path, RR_TXA, RR_TXA_TRK); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] txagc_RF / track_idx = 0x%x / %d\n", -+ txagc_rf, trk_idx); -+ -+ txagc_bb = -+ rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), -+ MASKBYTE2); -+ txagc_bb_tp = -+ rtw89_phy_read32_mask(rtwdev, R_TXAGC_TP + (path << 13), -+ B_TXAGC_TP); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] txagc_bb_tp / txagc_bb = 0x%x / 0x%x\n", -+ txagc_bb_tp, txagc_bb); -+ -+ txagc_ofst = -+ rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), -+ MASKBYTE3); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] txagc_offset / delta_ther = %d / %d\n", -+ txagc_ofst, delta_ther[path]); -+ tmp = rtw89_phy_read32_mask(rtwdev, R_DPD_COM + (path << 8), -+ B_DPD_COM_OF); -+ if (tmp == 0x1) { -+ txagc_ofst = 0; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] HW txagc offset mode\n"); -+ } -+ -+ if (txagc_rf && cur_ther) -+ ini_diff = txagc_ofst + (delta_ther[path]); -+ -+ tmp = rtw89_phy_read32_mask(rtwdev, -+ R_P0_TXDPD + (path << 13), -+ B_P0_TXDPD); -+ if (tmp == 0x0) { -+ pwsf[0] = dpk->bp[path][kidx].pwsf + -+ txagc_bb_tp - txagc_bb + ini_diff; -+ pwsf[1] = dpk->bp[path][kidx].pwsf + -+ txagc_bb_tp - txagc_bb + ini_diff; -+ } else { -+ pwsf[0] = dpk->bp[path][kidx].pwsf + ini_diff; -+ pwsf[1] = dpk->bp[path][kidx].pwsf + ini_diff; -+ } -+ -+ } else { -+ pwsf[0] = (dpk->bp[path][kidx].pwsf + delta_ther[path]) & 0x1ff; -+ pwsf[1] = (dpk->bp[path][kidx].pwsf + delta_ther[path]) & 0x1ff; -+ } -+ -+ tmp = rtw89_phy_read32_mask(rtwdev, R_DPK_TRK, B_DPK_TRK_DIS); -+ if (!tmp && txagc_rf) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] New pwsf[0] / pwsf[1] = 0x%x / 0x%x\n", -+ pwsf[0], pwsf[1]); -+ -+ rtw89_phy_write32_mask(rtwdev, -+ R_DPD_BND + (path << 8) + (kidx << 2), -+ B_DPD_BND_0, pwsf[0]); -+ rtw89_phy_write32_mask(rtwdev, -+ R_DPD_BND + (path << 8) + (kidx << 2), -+ B_DPD_BND_1, pwsf[1]); -+ } -+ } -+} -+ -+static void _set_dpd_backoff(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ u8 tx_scale, ofdm_bkof, path, kpath; -+ -+ kpath = _kpath(rtwdev, phy); -+ -+ ofdm_bkof = rtw89_phy_read32_mask(rtwdev, R_DPD_BF + (phy << 13), B_DPD_BF_OFDM); -+ tx_scale = rtw89_phy_read32_mask(rtwdev, R_DPD_BF + (phy << 13), B_DPD_BF_SCA); -+ -+ if (ofdm_bkof + tx_scale >= 44) { -+ /* move dpd backoff to bb, and set dpd backoff to 0 */ -+ dpk->dpk_gs[phy] = 0x7f; -+ for (path = 0; path < RF_PATH_NUM_8852B; path++) { -+ if (!(kpath & BIT(path))) -+ continue; -+ -+ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8), -+ B_DPD_CFG, 0x7f7f7f); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK] Set S%d DPD backoff to 0dB\n", path); -+ } -+ } else { -+ dpk->dpk_gs[phy] = 0x5b; -+ } -+} -+ - static void _tssi_rf_setting(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, - enum rtw89_rf_path path) - { -@@ -2626,6 +3747,11 @@ out: - tssi_info->tssi_alimk_time); - } - -+void rtw8852b_dpk_init(struct rtw89_dev *rtwdev) -+{ -+ _set_dpd_backoff(rtwdev, RTW89_PHY_0); -+} -+ - void rtw8852b_rck(struct rtw89_dev *rtwdev) - { - u8 path; -@@ -2674,6 +3800,28 @@ void rtw8852b_rx_dck(struct rtw89_dev *r - rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_STOP); - } - -+void rtw8852b_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); -+ u32 tx_en; -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_START); -+ rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); -+ _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); -+ -+ rtwdev->dpk.is_dpk_enable = true; -+ rtwdev->dpk.is_dpk_reload_en = false; -+ _dpk(rtwdev, phy_idx, false); -+ -+ rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_STOP); -+} -+ -+void rtw8852b_dpk_track(struct rtw89_dev *rtwdev) -+{ -+ _dpk_track(rtwdev); -+} -+ - void rtw8852b_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool hwtx_en) - { - u8 phy_map = rtw89_btc_phymap(rtwdev, phy, RF_AB); ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.h -@@ -11,6 +11,9 @@ void rtw8852b_rck(struct rtw89_dev *rtwd - void rtw8852b_dack(struct rtw89_dev *rtwdev); - void rtw8852b_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); - void rtw8852b_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); -+void rtw8852b_dpk_init(struct rtw89_dev *rtwdev); -+void rtw8852b_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy); -+void rtw8852b_dpk_track(struct rtw89_dev *rtwdev); - void rtw8852b_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool hwtx_en); - void rtw8852b_tssi_scan(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy); - void rtw8852b_wifi_scan_notify(struct rtw89_dev *rtwdev, bool scan_start, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-041-wifi-rtw89-8852b-add-chip_ops-related-to-RF-calibrat.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-041-wifi-rtw89-8852b-add-chip_ops-related-to-RF-calibrat.patch deleted file mode 100644 index 370078859..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-041-wifi-rtw89-8852b-add-chip_ops-related-to-RF-calibrat.patch +++ /dev/null @@ -1,75 +0,0 @@ -From ef8acbcac6816e4caf20934932b4881d775c6f37 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 14 Oct 2022 14:02:35 +0800 -Subject: [PATCH 041/149] wifi: rtw89: 8852b: add chip_ops related to RF - calibration - -Since RF calibrations are added, add chip_ops to call them. These chip_ops -include initial, full calibration, configuration when switching band and -scanning, and track work in period of 2 seconds. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221014060237.29050-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 42 +++++++++++++++++++ - 1 file changed, 42 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -1513,6 +1513,43 @@ static void rtw8852b_set_channel_help(st - } - } - -+static void rtw8852b_rfk_init(struct rtw89_dev *rtwdev) -+{ -+ rtwdev->is_tssi_mode[RF_PATH_A] = false; -+ rtwdev->is_tssi_mode[RF_PATH_B] = false; -+ -+ rtw8852b_dpk_init(rtwdev); -+ rtw8852b_rck(rtwdev); -+ rtw8852b_dack(rtwdev); -+ rtw8852b_rx_dck(rtwdev, RTW89_PHY_0); -+} -+ -+static void rtw8852b_rfk_channel(struct rtw89_dev *rtwdev) -+{ -+ enum rtw89_phy_idx phy_idx = RTW89_PHY_0; -+ -+ rtw8852b_rx_dck(rtwdev, phy_idx); -+ rtw8852b_iqk(rtwdev, phy_idx); -+ rtw8852b_tssi(rtwdev, phy_idx, true); -+ rtw8852b_dpk(rtwdev, phy_idx); -+} -+ -+static void rtw8852b_rfk_band_changed(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ rtw8852b_tssi_scan(rtwdev, phy_idx); -+} -+ -+static void rtw8852b_rfk_scan(struct rtw89_dev *rtwdev, bool start) -+{ -+ rtw8852b_wifi_scan_notify(rtwdev, start, RTW89_PHY_0); -+} -+ -+static void rtw8852b_rfk_track(struct rtw89_dev *rtwdev) -+{ -+ rtw8852b_dpk_track(rtwdev); -+} -+ - static u32 rtw8852b_bb_cal_txpwr_ref(struct rtw89_dev *rtwdev, - enum rtw89_phy_idx phy_idx, s16 ref) - { -@@ -2346,6 +2383,11 @@ static const struct rtw89_chip_ops rtw88 - .read_efuse = rtw8852b_read_efuse, - .read_phycap = rtw8852b_read_phycap, - .fem_setup = NULL, -+ .rfk_init = rtw8852b_rfk_init, -+ .rfk_channel = rtw8852b_rfk_channel, -+ .rfk_band_changed = rtw8852b_rfk_band_changed, -+ .rfk_scan = rtw8852b_rfk_scan, -+ .rfk_track = rtw8852b_rfk_track, - .power_trim = rtw8852b_power_trim, - .set_txpwr = rtw8852b_set_txpwr, - .set_txpwr_ctrl = rtw8852b_set_txpwr_ctrl, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-042-wifi-rtw89-phy-add-dummy-C2H-handler-to-avoid-warnin.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-042-wifi-rtw89-phy-add-dummy-C2H-handler-to-avoid-warnin.patch deleted file mode 100644 index 815fd97dd..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-042-wifi-rtw89-phy-add-dummy-C2H-handler-to-avoid-warnin.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 3b66519b023b9de3239576b938bbdf43f95bc862 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 14 Oct 2022 14:02:36 +0800 -Subject: [PATCH 042/149] wifi: rtw89: phy: add dummy C2H handler to avoid - warning message - -The C2H class 2 function 3 is to report retry count of low rate, but driver -doesn't implement yet, so add a dummy case to avoid message: - - rtw89_8852be 0000:03:00.0: c2h class 2 not support - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221014060237.29050-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/phy.c | 4 ++++ - drivers/net/wireless/realtek/rtw89/phy.h | 9 +++++++++ - 2 files changed, 13 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -2276,6 +2276,10 @@ void rtw89_phy_c2h_handle(struct rtw89_d - if (func < RTW89_PHY_C2H_FUNC_RA_MAX) - handler = rtw89_phy_c2h_ra_handler[func]; - break; -+ case RTW89_PHY_C2H_CLASS_DM: -+ if (func == RTW89_PHY_C2H_DM_FUNC_LOWRT_RTY) -+ return; -+ fallthrough; - default: - rtw89_info(rtwdev, "c2h class %d not support\n", class); - return; ---- a/drivers/net/wireless/realtek/rtw89/phy.h -+++ b/drivers/net/wireless/realtek/rtw89/phy.h -@@ -114,6 +114,15 @@ enum rtw89_phy_c2h_ra_func { - RTW89_PHY_C2H_FUNC_RA_MAX, - }; - -+enum rtw89_phy_c2h_dm_func { -+ RTW89_PHY_C2H_DM_FUNC_FW_TEST, -+ RTW89_PHY_C2H_DM_FUNC_FW_TRIG_TX_RPT, -+ RTW89_PHY_C2H_DM_FUNC_SIGB, -+ RTW89_PHY_C2H_DM_FUNC_LOWRT_RTY, -+ RTW89_PHY_C2H_DM_FUNC_MCC_DIG, -+ RTW89_PHY_C2H_DM_FUNC_NUM, -+}; -+ - enum rtw89_phy_c2h_class { - RTW89_PHY_C2H_CLASS_RUA, - RTW89_PHY_C2H_CLASS_RA, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-043-wifi-rtw89-8852b-add-8852be-to-Makefile-and-Kconfig.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-043-wifi-rtw89-8852b-add-8852be-to-Makefile-and-Kconfig.patch deleted file mode 100644 index f093ae9dd..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-043-wifi-rtw89-8852b-add-8852be-to-Makefile-and-Kconfig.patch +++ /dev/null @@ -1,69 +0,0 @@ -From b5db4ef38e21dd9b6b95ae96cea5032b00e04f24 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 14 Oct 2022 14:02:37 +0800 -Subject: [PATCH 043/149] wifi: rtw89: 8852b: add 8852be to Makefile and - Kconfig - -Now, basic materials for 8852be are ready, so add 8852be to Kconfig and -Makefile. Current version can support STA, AP and monitor modes. - -We still fine tune some features, such as BT coexistence, performance, and -power consumption. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221014060237.29050-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/Kconfig | 14 ++++++++++++++ - drivers/net/wireless/realtek/rtw89/Makefile | 9 +++++++++ - 2 files changed, 23 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/Kconfig -+++ b/drivers/net/wireless/realtek/rtw89/Kconfig -@@ -23,6 +23,10 @@ config RTW89_8852A - tristate - depends on m - -+config RTW89_8852B -+ tristate -+ depends on m -+ - config RTW89_8852C - tristate - depends on m -@@ -38,6 +42,17 @@ config RTW89_8852AE - Select this option will enable support for 8852AE chipset - - 802.11ax PCIe wireless network (Wi-Fi 6) adapter -+config RTW89_8852BE -+ tristate "Realtek 8852BE PCI wireless network (Wi-Fi 6) adapter" -+ depends on m -+ depends on PCI -+ select RTW89_CORE -+ select RTW89_PCI -+ select RTW89_8852B -+ help -+ Select this option will enable support for 8852BE chipset -+ -+ 802.11ax PCIe wireless network (Wi-Fi 6) adapter - - config RTW89_8852CE - tristate "Realtek 8852CE PCI wireless network (Wi-Fi 6E) adapter" ---- a/drivers/net/wireless/realtek/rtw89/Makefile -+++ b/drivers/net/wireless/realtek/rtw89/Makefile -@@ -24,6 +24,15 @@ rtw89_8852a-objs := rtw8852a.o \ - obj-$(CPTCFG_RTW89_8852AE) += rtw89_8852ae.o - rtw89_8852ae-objs := rtw8852ae.o - -+obj-$(CPTCFG_RTW89_8852B) += rtw89_8852b.o -+rtw89_8852b-objs := rtw8852b.o \ -+ rtw8852b_table.o \ -+ rtw8852b_rfk.o \ -+ rtw8852b_rfk_table.o -+ -+obj-$(CPTCFG_RTW89_8852BE) += rtw89_8852be.o -+rtw89_8852be-objs := rtw8852be.o -+ - obj-$(CPTCFG_RTW89_8852C) += rtw89_8852c.o - rtw89_8852c-objs := rtw8852c.o \ - rtw8852c_table.o \ diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-044-wifi-rtw89-fw-adapt-to-new-firmware-format-of-dynami.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-044-wifi-rtw89-fw-adapt-to-new-firmware-format-of-dynami.patch deleted file mode 100644 index f83455fc9..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-044-wifi-rtw89-fw-adapt-to-new-firmware-format-of-dynami.patch +++ /dev/null @@ -1,108 +0,0 @@ -From 4feda7f317cb7e4b6fcdaffb0d1ad363ee28fdea Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Thu, 20 Oct 2022 13:25:49 +0800 -Subject: [PATCH 044/149] wifi: rtw89: fw: adapt to new firmware format of - dynamic header - -Since firmware size is limited, we create variant firmwares for variant -application areas. To help driver to know firmware's capabilities, firmware -dynamic header is introduced to have more information, such as firmware -features and firmware compile flags. - -Since this driver rtw89 only uses single one specific firmware at runtime, -this patch is just to ignore this dynamic header, not actually use the -content. - -This patch can be backward compatible, and no this kind of firmware is -added to linux-firmware yet, so I can prepare this in advance. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221020052549.33783-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 22 +++++++++++++++++++--- - drivers/net/wireless/realtek/rtw89/fw.h | 12 ++++++++++++ - 2 files changed, 31 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -85,15 +85,31 @@ static int rtw89_fw_hdr_parser(struct rt - { - struct rtw89_fw_hdr_section_info *section_info; - const u8 *fw_end = fw + len; -+ const u8 *fwdynhdr; - const u8 *bin; -+ u32 base_hdr_len; - u32 i; - - if (!info) - return -EINVAL; - - info->section_num = GET_FW_HDR_SEC_NUM(fw); -- info->hdr_len = RTW89_FW_HDR_SIZE + -- info->section_num * RTW89_FW_SECTION_HDR_SIZE; -+ base_hdr_len = RTW89_FW_HDR_SIZE + -+ info->section_num * RTW89_FW_SECTION_HDR_SIZE; -+ info->dynamic_hdr_en = GET_FW_HDR_DYN_HDR(fw); -+ -+ if (info->dynamic_hdr_en) { -+ info->hdr_len = GET_FW_HDR_LEN(fw); -+ info->dynamic_hdr_len = info->hdr_len - base_hdr_len; -+ fwdynhdr = fw + base_hdr_len; -+ if (GET_FW_DYNHDR_LEN(fwdynhdr) != info->dynamic_hdr_len) { -+ rtw89_err(rtwdev, "[ERR]invalid fw dynamic header len\n"); -+ return -EINVAL; -+ } -+ } else { -+ info->hdr_len = base_hdr_len; -+ info->dynamic_hdr_len = 0; -+ } - - bin = fw + info->hdr_len; - -@@ -534,7 +550,7 @@ int rtw89_fw_download(struct rtw89_dev * - goto fwdl_err; - } - -- ret = rtw89_fw_download_hdr(rtwdev, fw, info.hdr_len); -+ ret = rtw89_fw_download_hdr(rtwdev, fw, info.hdr_len - info.dynamic_hdr_len); - if (ret) { - ret = -EBUSY; - goto fwdl_err; ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -176,6 +176,8 @@ struct rtw89_fw_hdr_section_info { - struct rtw89_fw_bin_info { - u8 section_num; - u32 hdr_len; -+ bool dynamic_hdr_en; -+ u32 dynamic_hdr_len; - struct rtw89_fw_hdr_section_info section_info[FWDL_SECTION_MAX_NUM]; - }; - -@@ -495,6 +497,8 @@ static inline void RTW89_SET_EDCA_PARAM( - le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(23, 16)) - #define GET_FW_HDR_SUBINDEX(fwhdr) \ - le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(31, 24)) -+#define GET_FW_HDR_LEN(fwhdr) \ -+ le32_get_bits(*((const __le32 *)(fwhdr) + 3), GENMASK(23, 16)) - #define GET_FW_HDR_MONTH(fwhdr) \ - le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(7, 0)) - #define GET_FW_HDR_DATE(fwhdr) \ -@@ -507,8 +511,16 @@ static inline void RTW89_SET_EDCA_PARAM( - le32_get_bits(*((const __le32 *)(fwhdr) + 5), GENMASK(31, 0)) - #define GET_FW_HDR_SEC_NUM(fwhdr) \ - le32_get_bits(*((const __le32 *)(fwhdr) + 6), GENMASK(15, 8)) -+#define GET_FW_HDR_DYN_HDR(fwhdr) \ -+ le32_get_bits(*((const __le32 *)(fwhdr) + 7), BIT(16)) - #define GET_FW_HDR_CMD_VERSERION(fwhdr) \ - le32_get_bits(*((const __le32 *)(fwhdr) + 7), GENMASK(31, 24)) -+ -+#define GET_FW_DYNHDR_LEN(fwdynhdr) \ -+ le32_get_bits(*((const __le32 *)(fwdynhdr)), GENMASK(31, 0)) -+#define GET_FW_DYNHDR_COUNT(fwdynhdr) \ -+ le32_get_bits(*((const __le32 *)(fwdynhdr) + 1), GENMASK(31, 0)) -+ - static inline void SET_FW_HDR_PART_SIZE(void *fwhdr, u32 val) - { - le32p_replace_bits((__le32 *)fwhdr + 7, val, GENMASK(15, 0)); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-045-wifi-rtw89-declare-support-bands-with-const.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-045-wifi-rtw89-declare-support-bands-with-const.patch deleted file mode 100644 index 927d7e06e..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-045-wifi-rtw89-declare-support-bands-with-const.patch +++ /dev/null @@ -1,46 +0,0 @@ -From a29dba478b6f4e8d3fbfe0b2f097cad1e0b93cf6 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Thu, 20 Oct 2022 13:27:01 +0800 -Subject: [PATCH 045/149] wifi: rtw89: declare support bands with const - -They are just default declarations and we won't modify them directly. -Instead, we actually do moification on their memdup now. So, they -should be declared with const. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221020052702.33988-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -171,7 +171,7 @@ bool rtw89_ra_report_to_bitrate(struct r - return true; - } - --static struct ieee80211_supported_band rtw89_sband_2ghz = { -+static const struct ieee80211_supported_band rtw89_sband_2ghz = { - .band = NL80211_BAND_2GHZ, - .channels = rtw89_channels_2ghz, - .n_channels = ARRAY_SIZE(rtw89_channels_2ghz), -@@ -181,7 +181,7 @@ static struct ieee80211_supported_band r - .vht_cap = {0}, - }; - --static struct ieee80211_supported_band rtw89_sband_5ghz = { -+static const struct ieee80211_supported_band rtw89_sband_5ghz = { - .band = NL80211_BAND_5GHZ, - .channels = rtw89_channels_5ghz, - .n_channels = ARRAY_SIZE(rtw89_channels_5ghz), -@@ -193,7 +193,7 @@ static struct ieee80211_supported_band r - .vht_cap = {0}, - }; - --static struct ieee80211_supported_band rtw89_sband_6ghz = { -+static const struct ieee80211_supported_band rtw89_sband_6ghz = { - .band = NL80211_BAND_6GHZ, - .channels = rtw89_channels_6ghz, - .n_channels = ARRAY_SIZE(rtw89_channels_6ghz), diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-046-wifi-rtw89-8852c-make-table-of-RU-mask-constant.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-046-wifi-rtw89-8852c-make-table-of-RU-mask-constant.patch deleted file mode 100644 index 662d90ae3..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-046-wifi-rtw89-8852c-make-table-of-RU-mask-constant.patch +++ /dev/null @@ -1,31 +0,0 @@ -From e69ae29e00cec66609bd555398aa4f59f2a9ae84 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Thu, 20 Oct 2022 13:27:02 +0800 -Subject: [PATCH 046/149] wifi: rtw89: 8852c: make table of RU mask constant - -This table must be constant, so change it as expectation. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221020052702.33988-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -1683,12 +1683,12 @@ static void rtw8852c_set_channel_bb(stru - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx) - { -+ static const u32 ru_alloc_msk[2] = {B_P80_AT_HIGH_FREQ_RU_ALLOC_PHY0, -+ B_P80_AT_HIGH_FREQ_RU_ALLOC_PHY1}; - struct rtw89_hal *hal = &rtwdev->hal; - bool cck_en = chan->band_type == RTW89_BAND_2G; - u8 pri_ch_idx = chan->pri_ch_idx; - u32 mask, reg; -- u32 ru_alloc_msk[2] = {B_P80_AT_HIGH_FREQ_RU_ALLOC_PHY0, -- B_P80_AT_HIGH_FREQ_RU_ALLOC_PHY1}; - u8 ntx_path; - - if (chan->band_type == RTW89_BAND_2G) diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-047-wifi-rtw89-add-BW-info-for-both-TX-and-RX-in-phy_inf.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-047-wifi-rtw89-add-BW-info-for-both-TX-and-RX-in-phy_inf.patch deleted file mode 100644 index 9292ebea7..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-047-wifi-rtw89-add-BW-info-for-both-TX-and-RX-in-phy_inf.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 25f49617b5c9c9afa829030f14606be6351d4771 Mon Sep 17 00:00:00 2001 -From: Eric Huang -Date: Fri, 21 Oct 2022 17:16:01 +0800 -Subject: [PATCH 047/149] wifi: rtw89: add BW info for both TX and RX in - phy_info - -In order to debug performance issue intuitively, add bandwidth information -into debugfs entry phy_info. After applying this patch, it looks like: - - TX rate [0]: HE 2SS MCS-11 GI:0.8 BW:80 (hw_rate=0x19b) ==> agg_wait=1 (3500) - RX rate [0]: HE 2SS MCS-9 GI:0.8 BW:80 (hw_rate=0x199) - -Signed-off-by: Eric Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221021091601.39884-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/debug.c | 18 ++++++++++++++++++ - 1 file changed, 18 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/debug.c -+++ b/drivers/net/wireless/realtek/rtw89/debug.c -@@ -51,6 +51,22 @@ struct rtw89_debugfs_priv { - }; - }; - -+static const u16 rtw89_rate_info_bw_to_mhz_map[] = { -+ [RATE_INFO_BW_20] = 20, -+ [RATE_INFO_BW_40] = 40, -+ [RATE_INFO_BW_80] = 80, -+ [RATE_INFO_BW_160] = 160, -+ [RATE_INFO_BW_320] = 320, -+}; -+ -+static u16 rtw89_rate_info_bw_to_mhz(enum rate_info_bw bw) -+{ -+ if (bw < ARRAY_SIZE(rtw89_rate_info_bw_to_mhz_map)) -+ return rtw89_rate_info_bw_to_mhz_map[bw]; -+ -+ return 0; -+} -+ - static int rtw89_debugfs_single_show(struct seq_file *m, void *v) - { - struct rtw89_debugfs_priv *debugfs_priv = m->private; -@@ -2386,6 +2402,7 @@ static void rtw89_sta_info_get_iter(void - else - seq_printf(m, "Legacy %d", rate->legacy); - seq_printf(m, "%s", rtwsta->ra_report.might_fallback_legacy ? " FB_G" : ""); -+ seq_printf(m, " BW:%u", rtw89_rate_info_bw_to_mhz(rate->bw)); - seq_printf(m, "\t(hw_rate=0x%x)", rtwsta->ra_report.hw_rate); - seq_printf(m, "\t==> agg_wait=%d (%d)\n", rtwsta->max_agg_wait, - sta->deflink.agg.max_rc_amsdu_len); -@@ -2411,6 +2428,7 @@ static void rtw89_sta_info_get_iter(void - he_gi_str[rate->he_gi] : "N/A"); - break; - } -+ seq_printf(m, " BW:%u", rtw89_rate_info_bw_to_mhz(status->bw)); - seq_printf(m, "\t(hw_rate=0x%x)\n", rtwsta->rx_hw_rate); - - rssi = ewma_rssi_read(&rtwsta->avg_rssi); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-048-wifi-rtw89-check-if-sta-s-mac_id-is-valid-under-AP-T.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-048-wifi-rtw89-check-if-sta-s-mac_id-is-valid-under-AP-T.patch deleted file mode 100644 index fb9a70341..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-048-wifi-rtw89-check-if-sta-s-mac_id-is-valid-under-AP-T.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 46245bc42aff5e67b0498fa365a4baeaaaaeda86 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Fri, 21 Oct 2022 17:18:28 +0800 -Subject: [PATCH 048/149] wifi: rtw89: check if sta's mac_id is valid under - AP/TDLS - -Add boundary check of mac_id when adding sta under AP/TDLS. -And, return -ENOSPC if the acquired mac_id is invalid. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221021091828.40157-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -2413,6 +2413,8 @@ int rtw89_core_sta_add(struct rtw89_dev - } else if (vif->type == NL80211_IFTYPE_AP || sta->tdls) { - rtwsta->mac_id = rtw89_core_acquire_bit_map(rtwdev->mac_id_map, - RTW89_MAX_MAC_ID_NUM); -+ if (rtwsta->mac_id == RTW89_MAX_MAC_ID_NUM) -+ return -ENOSPC; - } - - return 0; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-049-wifi-rtw89-collect-and-send-RF-parameters-to-firmwar.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-049-wifi-rtw89-collect-and-send-RF-parameters-to-firmwar.patch deleted file mode 100644 index 3b4ca5451..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-049-wifi-rtw89-collect-and-send-RF-parameters-to-firmwar.patch +++ /dev/null @@ -1,102 +0,0 @@ -From d9112042d9942648825d3ebe837dd33dbd7c6ddb Mon Sep 17 00:00:00 2001 -From: Chih-Kang Chang -Date: Thu, 27 Oct 2022 13:27:01 +0800 -Subject: [PATCH 049/149] wifi: rtw89: collect and send RF parameters to - firmware for WoWLAN - -For WoWLAN mode, we only collect and send RF parameters to Firmware -without writing RF registers. So we add one function to practice it. - -Signed-off-by: Chih-Kang Chang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221027052707.14605-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 2 +- - drivers/net/wireless/realtek/rtw89/phy.c | 31 +++++++++++++++++++++-- - drivers/net/wireless/realtek/rtw89/phy.h | 2 +- - 3 files changed, 31 insertions(+), 4 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -2962,7 +2962,7 @@ int rtw89_core_start(struct rtw89_dev *r - return ret; - - rtw89_phy_init_bb_reg(rtwdev); -- rtw89_phy_init_rf_reg(rtwdev); -+ rtw89_phy_init_rf_reg(rtwdev, false); - - rtw89_btc_ntfy_init(rtwdev, BTC_MODE_NORMAL); - ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -801,6 +801,11 @@ bool rtw89_phy_write_rf_v1(struct rtw89_ - } - EXPORT_SYMBOL(rtw89_phy_write_rf_v1); - -+static bool rtw89_chip_rf_v1(struct rtw89_dev *rtwdev) -+{ -+ return rtwdev->chip->ops->write_rf == rtw89_phy_write_rf_v1; -+} -+ - static void rtw89_phy_bb_reset(struct rtw89_dev *rtwdev, - enum rtw89_phy_idx phy_idx) - { -@@ -1123,6 +1128,24 @@ out: - return ret; - } - -+static void rtw89_phy_config_rf_reg_noio(struct rtw89_dev *rtwdev, -+ const struct rtw89_reg2_def *reg, -+ enum rtw89_rf_path rf_path, -+ void *extra_data) -+{ -+ u32 addr = reg->addr; -+ -+ if (addr == 0xfe || addr == 0xfd || addr == 0xfc || addr == 0xfb || -+ addr == 0xfa || addr == 0xf9) -+ return; -+ -+ if (rtw89_chip_rf_v1(rtwdev) && addr < 0x100) -+ return; -+ -+ rtw89_phy_cofig_rf_reg_store(rtwdev, reg, rf_path, -+ (struct rtw89_fw_h2c_rf_reg_info *)extra_data); -+} -+ - static void rtw89_phy_config_rf_reg(struct rtw89_dev *rtwdev, - const struct rtw89_reg2_def *reg, - enum rtw89_rf_path rf_path, -@@ -1335,7 +1358,7 @@ static u32 rtw89_phy_nctl_poll(struct rt - return rtw89_phy_read32(rtwdev, 0x8080); - } - --void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev) -+void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev, bool noio) - { - void (*config)(struct rtw89_dev *rtwdev, const struct rtw89_reg2_def *reg, - enum rtw89_rf_path rf_path, void *data); -@@ -1351,7 +1374,11 @@ void rtw89_phy_init_rf_reg(struct rtw89_ - for (path = RF_PATH_A; path < chip->rf_path_num; path++) { - rf_table = chip->rf_table[path]; - rf_reg_info->rf_path = rf_table->rf_path; -- config = rf_table->config ? rf_table->config : rtw89_phy_config_rf_reg; -+ if (noio) -+ config = rtw89_phy_config_rf_reg_noio; -+ else -+ config = rf_table->config ? rf_table->config : -+ rtw89_phy_config_rf_reg; - rtw89_phy_init_reg(rtwdev, rf_table, config, (void *)rf_reg_info); - if (rtw89_phy_config_rf_reg_fw(rtwdev, rf_reg_info)) - rtw89_warn(rtwdev, "rf path %d reg h2c config failed\n", ---- a/drivers/net/wireless/realtek/rtw89/phy.h -+++ b/drivers/net/wireless/realtek/rtw89/phy.h -@@ -500,7 +500,7 @@ bool rtw89_phy_write_rf(struct rtw89_dev - bool rtw89_phy_write_rf_v1(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path, - u32 addr, u32 mask, u32 data); - void rtw89_phy_init_bb_reg(struct rtw89_dev *rtwdev); --void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev); -+void rtw89_phy_init_rf_reg(struct rtw89_dev *rtwdev, bool noio); - void rtw89_phy_config_rf_reg_v1(struct rtw89_dev *rtwdev, - const struct rtw89_reg2_def *reg, - enum rtw89_rf_path rf_path, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-050-wifi-rtw89-move-enable_cpu-disable_cpu-into-fw_downl.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-050-wifi-rtw89-move-enable_cpu-disable_cpu-into-fw_downl.patch deleted file mode 100644 index b1ec800ff..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-050-wifi-rtw89-move-enable_cpu-disable_cpu-into-fw_downl.patch +++ /dev/null @@ -1,79 +0,0 @@ -From 5f05bdb0a770b5d03d3453c0b0743bb3dcd1a2ba Mon Sep 17 00:00:00 2001 -From: Chih-Kang Chang -Date: Thu, 27 Oct 2022 13:27:02 +0800 -Subject: [PATCH 050/149] wifi: rtw89: move enable_cpu/disable_cpu into - fw_download - -For WoWLAN mode, we need to download WoWLAN firmware by calling -fw_download(). Another, to disable/enable WiFi CPU is needed before -calling fw_download. Since Firmware runs on WiFi CPU, it is intuitive -to combine enable_cpu/disable_cpu functions into fw_download. - -Signed-off-by: Chih-Kang Chang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221027052707.14605-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 5 +++++ - drivers/net/wireless/realtek/rtw89/mac.c | 10 ++-------- - drivers/net/wireless/realtek/rtw89/mac.h | 2 ++ - 3 files changed, 9 insertions(+), 8 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -531,6 +531,11 @@ int rtw89_fw_download(struct rtw89_dev * - u8 val; - int ret; - -+ rtw89_mac_disable_cpu(rtwdev); -+ ret = rtw89_mac_enable_cpu(rtwdev, 0, true); -+ if (ret) -+ return ret; -+ - if (!fw || !len) { - rtw89_err(rtwdev, "fw type %d isn't recognized\n", type); - return -ENOENT; ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -3114,7 +3114,7 @@ static void rtw89_disable_fw_watchdog(st - rtw89_mac_mem_write(rtwdev, R_AX_WDT_STATUS, val32, RTW89_MAC_MEM_CPU_LOCAL); - } - --static void rtw89_mac_disable_cpu(struct rtw89_dev *rtwdev) -+void rtw89_mac_disable_cpu(struct rtw89_dev *rtwdev) - { - clear_bit(RTW89_FLAG_FW_RDY, rtwdev->flags); - -@@ -3129,8 +3129,7 @@ static void rtw89_mac_disable_cpu(struct - rtw89_write32_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); - } - --static int rtw89_mac_enable_cpu(struct rtw89_dev *rtwdev, u8 boot_reason, -- bool dlfw) -+int rtw89_mac_enable_cpu(struct rtw89_dev *rtwdev, u8 boot_reason, bool dlfw) - { - u32 val; - int ret; -@@ -3269,11 +3268,6 @@ int rtw89_mac_partial_init(struct rtw89_ - return ret; - } - -- rtw89_mac_disable_cpu(rtwdev); -- ret = rtw89_mac_enable_cpu(rtwdev, 0, true); -- if (ret) -- return ret; -- - ret = rtw89_fw_download(rtwdev, RTW89_FW_NORMAL); - if (ret) - return ret; ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -815,6 +815,8 @@ int rtw89_mac_port_update(struct rtw89_d - void rtw89_mac_set_he_obss_narrow_bw_ru(struct rtw89_dev *rtwdev, - struct ieee80211_vif *vif); - int rtw89_mac_remove_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *vif); -+void rtw89_mac_disable_cpu(struct rtw89_dev *rtwdev); -+int rtw89_mac_enable_cpu(struct rtw89_dev *rtwdev, u8 boot_reason, bool dlfw); - int rtw89_mac_enable_bb_rf(struct rtw89_dev *rtwdev); - int rtw89_mac_disable_bb_rf(struct rtw89_dev *rtwdev); - diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-051-wifi-rtw89-add-function-to-adjust-and-restore-PLE-qu.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-051-wifi-rtw89-add-function-to-adjust-and-restore-PLE-qu.patch deleted file mode 100644 index 7e8aa744f..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-051-wifi-rtw89-add-function-to-adjust-and-restore-PLE-qu.patch +++ /dev/null @@ -1,110 +0,0 @@ -From 7a68ec3da79ea702fdeeb94c31f743fd37446a32 Mon Sep 17 00:00:00 2001 -From: Chih-Kang Chang -Date: Thu, 27 Oct 2022 13:27:03 +0800 -Subject: [PATCH 051/149] wifi: rtw89: add function to adjust and restore PLE - quota - -PLE RX quota, which is the setting of RX buffer, is needed to be adjusted -dynamically for WoWLAN mode, and restored when back to normal mode. -The action is not needed for rtw8852c chip. - -Signed-off-by: Chih-Kang Chang -Signed-off-by: Chin-Yen Lee -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221027052707.14605-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - drivers/net/wireless/realtek/rtw89/mac.c | 32 +++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/mac.h | 2 ++ - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 4 +++ - 4 files changed, 39 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2389,6 +2389,7 @@ enum rtw89_dma_ch { - enum rtw89_qta_mode { - RTW89_QTA_SCC, - RTW89_QTA_DLFW, -+ RTW89_QTA_WOW, - - /* keep last */ - RTW89_QTA_INVALID, ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -1306,6 +1306,8 @@ const struct rtw89_mac_size_set rtw89_ma - .ple_qt47 = {525, 0, 32, 20, 1034, 13, 1199, 0, 1053, 62, 160, 1037,}, - /* PCIE 64 */ - .ple_qt58 = {147, 0, 16, 20, 157, 13, 229, 0, 172, 14, 24, 0,}, -+ /* 8852A PCIE WOW */ -+ .ple_qt_52a_wow = {264, 0, 32, 20, 64, 13, 1005, 0, 64, 128, 120,}, - }; - EXPORT_SYMBOL(rtw89_mac_size); - -@@ -1476,6 +1478,36 @@ static void ple_quota_cfg(struct rtw89_d - SET_QUOTA(tx_rpt, PLE, 11); - } - -+int rtw89_mac_resize_ple_rx_quota(struct rtw89_dev *rtwdev, bool wow) -+{ -+ const struct rtw89_ple_quota *min_cfg, *max_cfg; -+ const struct rtw89_dle_mem *cfg; -+ u32 val; -+ -+ if (rtwdev->chip->chip_id == RTL8852C) -+ return 0; -+ -+ if (rtwdev->mac.qta_mode != RTW89_QTA_SCC) { -+ rtw89_err(rtwdev, "[ERR]support SCC mode only\n"); -+ return -EINVAL; -+ } -+ -+ if (wow) -+ cfg = get_dle_mem_cfg(rtwdev, RTW89_QTA_WOW); -+ else -+ cfg = get_dle_mem_cfg(rtwdev, RTW89_QTA_SCC); -+ if (!cfg) { -+ rtw89_err(rtwdev, "[ERR]get_dle_mem_cfg\n"); -+ return -EINVAL; -+ } -+ -+ min_cfg = cfg->ple_min_qt; -+ max_cfg = cfg->ple_max_qt; -+ SET_QUOTA(cma0_dma, PLE, 6); -+ SET_QUOTA(cma1_dma, PLE, 7); -+ -+ return 0; -+} - #undef SET_QUOTA - - static void dle_quota_cfg(struct rtw89_dev *rtwdev, ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -719,6 +719,7 @@ struct rtw89_mac_size_set { - const struct rtw89_ple_quota ple_qt46; - const struct rtw89_ple_quota ple_qt47; - const struct rtw89_ple_quota ple_qt58; -+ const struct rtw89_ple_quota ple_qt_52a_wow; - }; - - extern const struct rtw89_mac_size_set rtw89_mac_size; -@@ -1026,5 +1027,6 @@ void rtw89_mac_pkt_drop_vif(struct rtw89 - u16 rtw89_mac_dle_buf_req(struct rtw89_dev *rtwdev, u16 buf_len, bool wd); - int rtw89_mac_set_cpuio(struct rtw89_dev *rtwdev, - struct rtw89_cpuio_ctrl *ctrl_para, bool wd); -+int rtw89_mac_resize_ple_rx_quota(struct rtw89_dev *rtwdev, bool wow); - - #endif ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -48,6 +48,10 @@ static const struct rtw89_dle_mem rtw885 - &rtw89_mac_size.ple_size0, &rtw89_mac_size.wde_qt0, - &rtw89_mac_size.wde_qt0, &rtw89_mac_size.ple_qt4, - &rtw89_mac_size.ple_qt5}, -+ [RTW89_QTA_WOW] = {RTW89_QTA_WOW, &rtw89_mac_size.wde_size0, -+ &rtw89_mac_size.ple_size0, &rtw89_mac_size.wde_qt0, -+ &rtw89_mac_size.wde_qt0, &rtw89_mac_size.ple_qt4, -+ &rtw89_mac_size.ple_qt_52a_wow}, - [RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size4, - &rtw89_mac_size.ple_size4, &rtw89_mac_size.wde_qt4, - &rtw89_mac_size.wde_qt4, &rtw89_mac_size.ple_qt13, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-052-wifi-rtw89-add-drop-tx-packet-function.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-052-wifi-rtw89-add-drop-tx-packet-function.patch deleted file mode 100644 index 7ad82065b..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-052-wifi-rtw89-add-drop-tx-packet-function.patch +++ /dev/null @@ -1,258 +0,0 @@ -From 41d567699283b86ce7443a5bf07114f1bde8e203 Mon Sep 17 00:00:00 2001 -From: Chih-Kang Chang -Date: Thu, 27 Oct 2022 13:27:04 +0800 -Subject: [PATCH 052/149] wifi: rtw89: add drop tx packet function - -When entering WoWLAN mode, we need to drop all transmit packets, -including those in mac buffer, to avoid memory leakage, so implement -the drop_tx function. - -Signed-off-by: Chih-Kang Chang -Signed-off-by: Chin-Yen Lee -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221027052707.14605-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 3 + - drivers/net/wireless/realtek/rtw89/fw.c | 9 +++ - drivers/net/wireless/realtek/rtw89/fw.h | 20 +++++ - drivers/net/wireless/realtek/rtw89/mac.c | 75 +++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/mac.h | 13 ++++ - drivers/net/wireless/realtek/rtw89/reg.h | 13 ++++ - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 2 + - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 2 + - 8 files changed, 137 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2624,6 +2624,8 @@ struct rtw89_chip_info { - u32 rsvd_ple_ofst; - const struct rtw89_hfc_param_ini *hfc_param_ini; - const struct rtw89_dle_mem *dle_mem; -+ u8 wde_qempty_acq_num; -+ u8 wde_qempty_mgq_sel; - u32 rf_base_addr[2]; - u8 support_chanctx_num; - u8 support_bands; -@@ -2949,6 +2951,7 @@ struct rtw89_pkt_drop_params { - u8 port; - u8 mbssid; - bool tf_trs; -+ u32 macid_band_sel[4]; - }; - - struct rtw89_pkt_stat { ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -2902,6 +2902,7 @@ int rtw89_fw_h2c_pkt_drop(struct rtw89_d - case RTW89_PKT_DROP_SEL_MACID_BK_ONCE: - case RTW89_PKT_DROP_SEL_MACID_VI_ONCE: - case RTW89_PKT_DROP_SEL_MACID_VO_ONCE: -+ case RTW89_PKT_DROP_SEL_BAND_ONCE: - break; - default: - rtw89_debug(rtwdev, RTW89_DBG_FW, -@@ -2917,6 +2918,14 @@ int rtw89_fw_h2c_pkt_drop(struct rtw89_d - RTW89_SET_FWCMD_PKT_DROP_PORT(skb->data, params->port); - RTW89_SET_FWCMD_PKT_DROP_MBSSID(skb->data, params->mbssid); - RTW89_SET_FWCMD_PKT_DROP_ROLE_A_INFO_TF_TRS(skb->data, params->tf_trs); -+ RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_0(skb->data, -+ params->macid_band_sel[0]); -+ RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_1(skb->data, -+ params->macid_band_sel[1]); -+ RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_2(skb->data, -+ params->macid_band_sel[2]); -+ RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_3(skb->data, -+ params->macid_band_sel[3]); - - rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, - H2C_CAT_MAC, ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -1873,6 +1873,26 @@ static inline void RTW89_SET_FWCMD_PKT_D - le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(15, 8)); - } - -+static inline void RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_0(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 2, val, GENMASK(31, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_1(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 3, val, GENMASK(31, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_2(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 4, val, GENMASK(31, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_PKT_DROP_MACID_BAND_SEL_3(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 5, val, GENMASK(31, 0)); -+} -+ - enum rtw89_btc_btf_h2c_class { - BTFC_SET = 0x10, - BTFC_GET = 0x11, ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -1335,6 +1335,60 @@ static const struct rtw89_dle_mem *get_d - return cfg; - } - -+static bool mac_is_txq_empty(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_mac_dle_dfi_qempty qempty; -+ u32 qnum, qtmp, val32, msk32; -+ int i, j, ret; -+ -+ qnum = rtwdev->chip->wde_qempty_acq_num; -+ qempty.dle_type = DLE_CTRL_TYPE_WDE; -+ -+ for (i = 0; i < qnum; i++) { -+ qempty.grpsel = i; -+ ret = dle_dfi_qempty(rtwdev, &qempty); -+ if (ret) { -+ rtw89_warn(rtwdev, "dle dfi acq empty %d\n", ret); -+ return false; -+ } -+ qtmp = qempty.qempty; -+ for (j = 0 ; j < QEMP_ACQ_GRP_MACID_NUM; j++) { -+ val32 = FIELD_GET(QEMP_ACQ_GRP_QSEL_MASK, qtmp); -+ if (val32 != QEMP_ACQ_GRP_QSEL_MASK) -+ return false; -+ qtmp >>= QEMP_ACQ_GRP_QSEL_SH; -+ } -+ } -+ -+ qempty.grpsel = rtwdev->chip->wde_qempty_mgq_sel; -+ ret = dle_dfi_qempty(rtwdev, &qempty); -+ if (ret) { -+ rtw89_warn(rtwdev, "dle dfi mgq empty %d\n", ret); -+ return false; -+ } -+ msk32 = B_CMAC0_MGQ_NORMAL | B_CMAC0_MGQ_NO_PWRSAV | B_CMAC0_CPUMGQ; -+ if ((qempty.qempty & msk32) != msk32) -+ return false; -+ -+ if (rtwdev->dbcc_en) { -+ msk32 |= B_CMAC1_MGQ_NORMAL | B_CMAC1_MGQ_NO_PWRSAV | B_CMAC1_CPUMGQ; -+ if ((qempty.qempty & msk32) != msk32) -+ return false; -+ } -+ -+ msk32 = B_AX_WDE_EMPTY_QTA_DMAC_WLAN_CPU | B_AX_WDE_EMPTY_QTA_DMAC_DATA_CPU | -+ B_AX_PLE_EMPTY_QTA_DMAC_WLAN_CPU | B_AX_PLE_EMPTY_QTA_DMAC_H2C | -+ B_AX_WDE_EMPTY_QUE_OTHERS | B_AX_PLE_EMPTY_QUE_DMAC_MPDU_TX | -+ B_AX_WDE_EMPTY_QTA_DMAC_CPUIO | B_AX_PLE_EMPTY_QTA_DMAC_CPUIO | -+ B_AX_WDE_EMPTY_QUE_DMAC_PKTIN | B_AX_WDE_EMPTY_QTA_DMAC_HIF | -+ B_AX_PLE_EMPTY_QUE_DMAC_SEC_TX | B_AX_WDE_EMPTY_QTA_DMAC_PKTIN | -+ B_AX_PLE_EMPTY_QTA_DMAC_B0_TXPL | B_AX_PLE_EMPTY_QTA_DMAC_B1_TXPL | -+ B_AX_PLE_EMPTY_QTA_DMAC_MPDU_TX; -+ val32 = rtw89_read32(rtwdev, R_AX_DLE_EMPTY0); -+ -+ return (val32 & msk32) == msk32; -+} -+ - static inline u32 dle_used_size(const struct rtw89_dle_size *wde, - const struct rtw89_dle_size *ple) - { -@@ -4891,3 +4945,24 @@ void rtw89_mac_pkt_drop_vif(struct rtw89 - rtw89_mac_pkt_drop_vif_iter, - rtwvif); - } -+ -+int rtw89_mac_ptk_drop_by_band_and_wait(struct rtw89_dev *rtwdev, -+ enum rtw89_mac_idx band) -+{ -+ struct rtw89_pkt_drop_params params = {0}; -+ bool empty; -+ int i, ret = 0, try_cnt = 3; -+ -+ params.mac_band = band; -+ params.sel = RTW89_PKT_DROP_SEL_BAND_ONCE; -+ -+ for (i = 0; i < try_cnt; i++) { -+ ret = read_poll_timeout(mac_is_txq_empty, empty, empty, 50, -+ 50000, false, rtwdev); -+ if (ret) -+ rtw89_fw_h2c_pkt_drop(rtwdev, ¶ms); -+ else -+ return 0; -+ } -+ return ret; -+} ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -420,6 +420,17 @@ enum rtw89_mac_bf_rrsc_rate { - #define S_AX_PLE_PAGE_SEL_128 1 - #define S_AX_PLE_PAGE_SEL_256 2 - -+#define B_CMAC0_MGQ_NORMAL BIT(2) -+#define B_CMAC0_MGQ_NO_PWRSAV BIT(3) -+#define B_CMAC0_CPUMGQ BIT(4) -+#define B_CMAC1_MGQ_NORMAL BIT(10) -+#define B_CMAC1_MGQ_NO_PWRSAV BIT(11) -+#define B_CMAC1_CPUMGQ BIT(12) -+ -+#define QEMP_ACQ_GRP_MACID_NUM 8 -+#define QEMP_ACQ_GRP_QSEL_SH 4 -+#define QEMP_ACQ_GRP_QSEL_MASK 0xF -+ - #define SDIO_LOCAL_BASE_ADDR 0x80000000 - - #define PWR_CMD_WRITE 0 -@@ -1028,5 +1039,7 @@ u16 rtw89_mac_dle_buf_req(struct rtw89_d - int rtw89_mac_set_cpuio(struct rtw89_dev *rtwdev, - struct rtw89_cpuio_ctrl *ctrl_para, bool wd); - int rtw89_mac_resize_ple_rx_quota(struct rtw89_dev *rtwdev, bool wow); -+int rtw89_mac_ptk_drop_by_band_and_wait(struct rtw89_dev *rtwdev, -+ enum rtw89_mac_idx band); - - #endif ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -545,6 +545,19 @@ - #define B_AX_WDE_EMPTY_QUE_CMAC0_MBH BIT(1) - #define B_AX_WDE_EMPTY_QUE_CMAC0_ALL_AC BIT(0) - -+#define R_AX_DLE_EMPTY1 0x8434 -+#define B_AX_PLE_EMPTY_QTA_DMAC_WDRLS BIT(20) -+#define B_AX_PLE_EMPTY_QTA_CMAC1_DMA_BBRPT BIT(19) -+#define B_AX_PLE_EMPTY_QTA_CMAC1_DMA_RX BIT(18) -+#define B_AX_PLE_EMPTY_QTA_CMAC0_DMA_RX BIT(17) -+#define B_AX_PLE_EMPTY_QTA_DMAC_C2H BIT(16) -+#define B_AX_PLE_EMPTY_QUE_DMAC_PLRLS BIT(5) -+#define B_AX_PLE_EMPTY_QUE_DMAC_CPUIO BIT(4) -+#define B_AX_PLE_EMPTY_QUE_DMAC_SEC_RX BIT(3) -+#define B_AX_PLE_EMPTY_QUE_DMAC_MPDU_RX BIT(2) -+#define B_AX_PLE_EMPTY_QUE_DMAC_HDP BIT(1) -+#define B_AX_WDE_EMPTY_QUE_DMAC_WDRLS BIT(0) -+ - #define R_AX_DMAC_ERR_IMR 0x8520 - #define B_AX_DLE_CPUIO_ERR_INT_EN BIT(10) - #define B_AX_APB_BRIDGE_ERR_INT_EN BIT(9) ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -2049,6 +2049,8 @@ const struct rtw89_chip_info rtw8852a_ch - .rsvd_ple_ofst = 0x6f800, - .hfc_param_ini = rtw8852a_hfc_param_ini_pcie, - .dle_mem = rtw8852a_dle_mem_pcie, -+ .wde_qempty_acq_num = 16, -+ .wde_qempty_mgq_sel = 16, - .rf_base_addr = {0xc000, 0xd000}, - .pwr_on_seq = pwr_on_seq_8852a, - .pwr_off_seq = pwr_off_seq_8852a, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2855,6 +2855,8 @@ const struct rtw89_chip_info rtw8852c_ch - .rsvd_ple_ofst = 0x6f800, - .hfc_param_ini = rtw8852c_hfc_param_ini_pcie, - .dle_mem = rtw8852c_dle_mem_pcie, -+ .wde_qempty_acq_num = 16, -+ .wde_qempty_mgq_sel = 16, - .rf_base_addr = {0xe000, 0xf000}, - .pwr_on_seq = NULL, - .pwr_off_seq = NULL, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-053-wifi-rtw89-add-related-H2C-for-WoWLAN-mode.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-053-wifi-rtw89-add-related-H2C-for-WoWLAN-mode.patch deleted file mode 100644 index a76fd0b00..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-053-wifi-rtw89-add-related-H2C-for-WoWLAN-mode.patch +++ /dev/null @@ -1,509 +0,0 @@ -From ee88d748f1ace450cc0e8ca6a93cb11e7e8d6ad9 Mon Sep 17 00:00:00 2001 -From: Chin-Yen Lee -Date: Thu, 27 Oct 2022 13:27:05 +0800 -Subject: [PATCH 053/149] wifi: rtw89: add related H2C for WoWLAN mode - -In this patch we define some H2C, which will be called during suspend -flow, to enable WoWLAN function provided by WoWLAN firmware. - -These H2C includes keep alive used to send null packet to AP periodically -to avoid being disconnected by AP, disconnect detection used to configure -how we check if AP is offline, wake up control used to decide which WiFi -events could trigger resume flow, and global control used to enable WoWLAN -function. - -Signed-off-by: Chin-Yen Lee -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221027052707.14605-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 30 +++ - drivers/net/wireless/realtek/rtw89/fw.c | 229 ++++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/fw.h | 160 +++++++++++++++ - 3 files changed, 419 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -477,6 +477,20 @@ enum rtw89_regulation_type { - RTW89_REGD_NUM, - }; - -+enum rtw89_fw_pkt_ofld_type { -+ RTW89_PKT_OFLD_TYPE_PROBE_RSP = 0, -+ RTW89_PKT_OFLD_TYPE_PS_POLL = 1, -+ RTW89_PKT_OFLD_TYPE_NULL_DATA = 2, -+ RTW89_PKT_OFLD_TYPE_QOS_NULL = 3, -+ RTW89_PKT_OFLD_TYPE_CTS2SELF = 4, -+ RTW89_PKT_OFLD_TYPE_ARP_RSP = 5, -+ RTW89_PKT_OFLD_TYPE_NDP = 6, -+ RTW89_PKT_OFLD_TYPE_EAPOL_KEY = 7, -+ RTW89_PKT_OFLD_TYPE_SA_QUERY = 8, -+ RTW89_PKT_OFLD_TYPE_PROBE_REQ = 12, -+ RTW89_PKT_OFLD_TYPE_NUM, -+}; -+ - struct rtw89_txpwr_byrate { - s8 cck[RTW89_RATE_CCK_MAX]; - s8 ofdm[RTW89_RATE_OFDM_MAX]; -@@ -636,6 +650,13 @@ enum rtw89_sc_offset { - RTW89_SC_40_LOWER = 10, - }; - -+enum rtw89_wow_flags { -+ RTW89_WOW_FLAG_EN_MAGIC_PKT, -+ RTW89_WOW_FLAG_EN_REKEY_PKT, -+ RTW89_WOW_FLAG_EN_DISCONNECT, -+ RTW89_WOW_FLAG_NUM, -+}; -+ - struct rtw89_chan { - u8 channel; - u8 primary_channel; -@@ -3453,6 +3474,13 @@ struct rtw89_phy_efuse_gain { - s8 comp[RF_PATH_MAX][RTW89_SUBBAND_NR]; /* S(8, 0) */ - }; - -+struct rtw89_wow_param { -+ struct ieee80211_vif *wow_vif; -+ DECLARE_BITMAP(flags, RTW89_WOW_FLAG_NUM); -+ u8 pattern_cnt; -+ struct list_head pkt_list; -+}; -+ - struct rtw89_dev { - struct ieee80211_hw *hw; - struct device *dev; -@@ -3541,6 +3569,8 @@ struct rtw89_dev { - enum rtw89_ps_mode ps_mode; - bool lps_enabled; - -+ struct rtw89_wow_param wow; -+ - /* napi structure */ - struct net_device netdev; - struct napi_struct napi; ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -869,6 +869,56 @@ fail: - return ret; - } - -+static int rtw89_fw_h2c_add_wow_fw_ofld(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, -+ enum rtw89_fw_pkt_ofld_type type, -+ u8 *id) -+{ -+ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); -+ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -+ struct rtw89_pktofld_info *info; -+ struct sk_buff *skb; -+ int ret; -+ -+ info = kzalloc(sizeof(*info), GFP_KERNEL); -+ if (!info) -+ return -ENOMEM; -+ -+ switch (type) { -+ case RTW89_PKT_OFLD_TYPE_PS_POLL: -+ skb = ieee80211_pspoll_get(rtwdev->hw, vif); -+ break; -+ case RTW89_PKT_OFLD_TYPE_PROBE_RSP: -+ skb = ieee80211_proberesp_get(rtwdev->hw, vif); -+ break; -+ case RTW89_PKT_OFLD_TYPE_NULL_DATA: -+ skb = ieee80211_nullfunc_get(rtwdev->hw, vif, -1, false); -+ break; -+ case RTW89_PKT_OFLD_TYPE_QOS_NULL: -+ skb = ieee80211_nullfunc_get(rtwdev->hw, vif, -1, true); -+ break; -+ default: -+ goto err; -+ } -+ -+ if (!skb) -+ goto err; -+ -+ list_add_tail(&info->list, &rtw_wow->pkt_list); -+ ret = rtw89_fw_h2c_add_pkt_offload(rtwdev, &info->id, skb); -+ kfree_skb(skb); -+ -+ if (ret) -+ return ret; -+ -+ *id = info->id; -+ return 0; -+ -+err: -+ kfree(info); -+ return -ENOMEM; -+} -+ - #define H2C_GENERAL_PKT_LEN 6 - #define H2C_GENERAL_PKT_ID_UND 0xff - int rtw89_fw_h2c_general_pkt(struct rtw89_dev *rtwdev, u8 macid) -@@ -2945,3 +2995,182 @@ fail: - dev_kfree_skb_any(skb); - return ret; - } -+ -+#define H2C_KEEP_ALIVE_LEN 4 -+int rtw89_fw_h2c_keep_alive(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ bool enable) -+{ -+ struct sk_buff *skb; -+ u8 pkt_id = 0; -+ int ret; -+ -+ if (enable) { -+ ret = rtw89_fw_h2c_add_wow_fw_ofld(rtwdev, rtwvif, -+ RTW89_PKT_OFLD_TYPE_NULL_DATA, &pkt_id); -+ if (ret) -+ return -EPERM; -+ } -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_KEEP_ALIVE_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for keep alive\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, H2C_KEEP_ALIVE_LEN); -+ -+ RTW89_SET_KEEP_ALIVE_ENABLE(skb->data, enable); -+ RTW89_SET_KEEP_ALIVE_PKT_NULL_ID(skb->data, pkt_id); -+ RTW89_SET_KEEP_ALIVE_PERIOD(skb->data, 5); -+ RTW89_SET_KEEP_ALIVE_MACID(skb->data, rtwvif->mac_id); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MAC_WOW, -+ H2C_FUNC_KEEP_ALIVE, 0, 1, -+ H2C_KEEP_ALIVE_LEN); -+ -+ ret = rtw89_h2c_tx(rtwdev, skb, false); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+ -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return ret; -+} -+ -+#define H2C_DISCONNECT_DETECT_LEN 8 -+int rtw89_fw_h2c_disconnect_detect(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, bool enable) -+{ -+ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -+ struct sk_buff *skb; -+ u8 macid = rtwvif->mac_id; -+ int ret; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_DISCONNECT_DETECT_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for keep alive\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, H2C_DISCONNECT_DETECT_LEN); -+ -+ if (test_bit(RTW89_WOW_FLAG_EN_DISCONNECT, rtw_wow->flags)) { -+ RTW89_SET_DISCONNECT_DETECT_ENABLE(skb->data, enable); -+ RTW89_SET_DISCONNECT_DETECT_DISCONNECT(skb->data, !enable); -+ RTW89_SET_DISCONNECT_DETECT_MAC_ID(skb->data, macid); -+ RTW89_SET_DISCONNECT_DETECT_CHECK_PERIOD(skb->data, 100); -+ RTW89_SET_DISCONNECT_DETECT_TRY_PKT_COUNT(skb->data, 5); -+ } -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MAC_WOW, -+ H2C_FUNC_DISCONNECT_DETECT, 0, 1, -+ H2C_DISCONNECT_DETECT_LEN); -+ -+ ret = rtw89_h2c_tx(rtwdev, skb, false); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+ -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return ret; -+} -+ -+#define H2C_WOW_GLOBAL_LEN 8 -+int rtw89_fw_h2c_wow_global(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ bool enable) -+{ -+ struct sk_buff *skb; -+ u8 macid = rtwvif->mac_id; -+ int ret; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_WOW_GLOBAL_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for keep alive\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, H2C_WOW_GLOBAL_LEN); -+ -+ RTW89_SET_WOW_GLOBAL_ENABLE(skb->data, enable); -+ RTW89_SET_WOW_GLOBAL_MAC_ID(skb->data, macid); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MAC_WOW, -+ H2C_FUNC_WOW_GLOBAL, 0, 1, -+ H2C_WOW_GLOBAL_LEN); -+ -+ ret = rtw89_h2c_tx(rtwdev, skb, false); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+ -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return ret; -+} -+ -+#define H2C_WAKEUP_CTRL_LEN 4 -+int rtw89_fw_h2c_wow_wakeup_ctrl(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, -+ bool enable) -+{ -+ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -+ struct sk_buff *skb; -+ u8 macid = rtwvif->mac_id; -+ int ret; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_WAKEUP_CTRL_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for keep alive\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, H2C_WAKEUP_CTRL_LEN); -+ -+ if (rtw_wow->pattern_cnt) -+ RTW89_SET_WOW_WAKEUP_CTRL_PATTERN_MATCH_ENABLE(skb->data, enable); -+ if (test_bit(RTW89_WOW_FLAG_EN_MAGIC_PKT, rtw_wow->flags)) -+ RTW89_SET_WOW_WAKEUP_CTRL_MAGIC_ENABLE(skb->data, enable); -+ if (test_bit(RTW89_WOW_FLAG_EN_DISCONNECT, rtw_wow->flags)) -+ RTW89_SET_WOW_WAKEUP_CTRL_DEAUTH_ENABLE(skb->data, enable); -+ -+ RTW89_SET_WOW_WAKEUP_CTRL_MAC_ID(skb->data, macid); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MAC_WOW, -+ H2C_FUNC_WAKEUP_CTRL, 0, 1, -+ H2C_WAKEUP_CTRL_LEN); -+ -+ ret = rtw89_h2c_tx(rtwdev, skb, false); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+ -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return ret; -+} ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -1893,6 +1893,146 @@ static inline void RTW89_SET_FWCMD_PKT_D - le32p_replace_bits((__le32 *)cmd + 5, val, GENMASK(31, 0)); - } - -+static inline void RTW89_SET_KEEP_ALIVE_ENABLE(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(1, 0)); -+} -+ -+static inline void RTW89_SET_KEEP_ALIVE_PKT_NULL_ID(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8)); -+} -+ -+static inline void RTW89_SET_KEEP_ALIVE_PERIOD(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(24, 16)); -+} -+ -+static inline void RTW89_SET_KEEP_ALIVE_MACID(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24)); -+} -+ -+static inline void RTW89_SET_DISCONNECT_DETECT_ENABLE(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(0)); -+} -+ -+static inline void RTW89_SET_DISCONNECT_DETECT_TRYOK_BCNFAIL_COUNT_EN(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(1)); -+} -+ -+static inline void RTW89_SET_DISCONNECT_DETECT_DISCONNECT(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(2)); -+} -+ -+static inline void RTW89_SET_DISCONNECT_DETECT_MAC_ID(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8)); -+} -+ -+static inline void RTW89_SET_DISCONNECT_DETECT_CHECK_PERIOD(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 16)); -+} -+ -+static inline void RTW89_SET_DISCONNECT_DETECT_TRY_PKT_COUNT(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24)); -+} -+ -+static inline void RTW89_SET_DISCONNECT_DETECT_TRYOK_BCNFAIL_COUNT_LIMIT(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_WOW_GLOBAL_ENABLE(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(0)); -+} -+ -+static inline void RTW89_SET_WOW_GLOBAL_DROP_ALL_PKT(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(1)); -+} -+ -+static inline void RTW89_SET_WOW_GLOBAL_RX_PARSE_AFTER_WAKE(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(2)); -+} -+ -+static inline void RTW89_SET_WOW_GLOBAL_WAKE_BAR_PULLED(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(3)); -+} -+ -+static inline void RTW89_SET_WOW_GLOBAL_MAC_ID(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(15, 8)); -+} -+ -+static inline void RTW89_SET_WOW_GLOBAL_PAIRWISE_SEC_ALGO(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(23, 16)); -+} -+ -+static inline void RTW89_SET_WOW_GLOBAL_GROUP_SEC_ALGO(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24)); -+} -+ -+static inline void RTW89_SET_WOW_GLOBAL_REMOTECTRL_INFO_CONTENT(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)(h2c) + 1, val, GENMASK(31, 0)); -+} -+ -+static inline void RTW89_SET_WOW_WAKEUP_CTRL_PATTERN_MATCH_ENABLE(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(0)); -+} -+ -+static inline void RTW89_SET_WOW_WAKEUP_CTRL_MAGIC_ENABLE(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(1)); -+} -+ -+static inline void RTW89_SET_WOW_WAKEUP_CTRL_HW_UNICAST_ENABLE(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(2)); -+} -+ -+static inline void RTW89_SET_WOW_WAKEUP_CTRL_FW_UNICAST_ENABLE(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(3)); -+} -+ -+static inline void RTW89_SET_WOW_WAKEUP_CTRL_DEAUTH_ENABLE(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(4)); -+} -+ -+static inline void RTW89_SET_WOW_WAKEUP_CTRL_REKEYP_ENABLE(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(5)); -+} -+ -+static inline void RTW89_SET_WOW_WAKEUP_CTRL_EAP_ENABLE(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(6)); -+} -+ -+static inline void RTW89_SET_WOW_WAKEUP_CTRL_ALL_DATA_ENABLE(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(7)); -+} -+ -+static inline void RTW89_SET_WOW_WAKEUP_CTRL_MAC_ID(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24)); -+} -+ - enum rtw89_btc_btf_h2c_class { - BTFC_SET = 0x10, - BTFC_GET = 0x11, -@@ -2709,6 +2849,14 @@ struct rtw89_fw_h2c_rf_reg_info { - #define H2C_FUNC_LOG_CFG 0x0 - #define H2C_FUNC_MAC_GENERAL_PKT 0x1 - -+/* CLASS 1 - WOW */ -+#define H2C_CL_MAC_WOW 0x1 -+#define H2C_FUNC_KEEP_ALIVE 0x0 -+#define H2C_FUNC_DISCONNECT_DETECT 0x1 -+#define H2C_FUNC_WOW_GLOBAL 0x2 -+#define H2C_FUNC_WAKEUP_CTRL 0x8 -+#define H2C_FUNC_WOW_CAM_UPD 0xC -+ - /* CLASS 2 - PS */ - #define H2C_CL_MAC_PS 0x2 - #define H2C_FUNC_MAC_LPS_PARM 0x0 -@@ -2878,6 +3026,18 @@ int rtw89_fw_h2c_p2p_act(struct rtw89_de - u8 act, u8 noa_id); - int rtw89_fw_h2c_tsf32_toggle(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, - bool en); -+int rtw89_fw_h2c_wow_global(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ bool enable); -+int rtw89_fw_h2c_wow_wakeup_ctrl(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, bool enable); -+int rtw89_fw_h2c_keep_alive(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ bool enable); -+int rtw89_fw_h2c_disconnect_detect(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, bool enable); -+int rtw89_fw_h2c_wow_global(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ bool enable); -+int rtw89_fw_h2c_wow_wakeup_ctrl(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, bool enable); - - static inline void rtw89_fw_h2c_init_ba_cam(struct rtw89_dev *rtwdev) - { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-054-wifi-rtw89-add-WoWLAN-function-support.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-054-wifi-rtw89-add-WoWLAN-function-support.patch deleted file mode 100644 index de85cd97f..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-054-wifi-rtw89-add-WoWLAN-function-support.patch +++ /dev/null @@ -1,1158 +0,0 @@ -From 19e28c7fcc7408be8479f91d47146245c8be293e Mon Sep 17 00:00:00 2001 -From: Chin-Yen Lee -Date: Thu, 27 Oct 2022 13:27:06 +0800 -Subject: [PATCH 054/149] wifi: rtw89: add WoWLAN function support - -WoWLAN is a feature which allows devices to be woken up from suspend -state through WLAN events. - -When user enables WoWLAN feature and then let the device enter suspend -state, WoWLAN firmware will be loaded by the driver and periodically -monitors WiFi packets. Power consumption of WiFi chip will be reduced -in this state. - -We now implement WoWLAN function in rtw8852ae and rtw8852ce chip. -Currently supported WLAN events include receiving magic packet, -rekey packet and deauth packet, and disconnecting from AP. - -Signed-off-by: Chin-Yen Lee -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221027052707.14605-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/Makefile | 2 + - drivers/net/wireless/realtek/rtw89/core.c | 8 + - drivers/net/wireless/realtek/rtw89/core.h | 77 ++- - drivers/net/wireless/realtek/rtw89/debug.h | 1 + - drivers/net/wireless/realtek/rtw89/mac.c | 18 +- - drivers/net/wireless/realtek/rtw89/mac.h | 14 + - drivers/net/wireless/realtek/rtw89/mac80211.c | 55 ++ - drivers/net/wireless/realtek/rtw89/pci.c | 23 +- - drivers/net/wireless/realtek/rtw89/ps.c | 2 +- - drivers/net/wireless/realtek/rtw89/ps.h | 1 + - drivers/net/wireless/realtek/rtw89/reg.h | 8 + - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 9 + - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 9 + - drivers/net/wireless/realtek/rtw89/wow.c | 633 ++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/wow.h | 21 + - 15 files changed, 874 insertions(+), 7 deletions(-) - create mode 100644 drivers/net/wireless/realtek/rtw89/wow.c - create mode 100644 drivers/net/wireless/realtek/rtw89/wow.h - ---- a/drivers/net/wireless/realtek/rtw89/Makefile -+++ b/drivers/net/wireless/realtek/rtw89/Makefile -@@ -15,6 +15,8 @@ rtw89_core-y += core.o \ - chan.o \ - ser.o - -+rtw89_core-$(CPTCFG_PM) += wow.o -+ - obj-$(CPTCFG_RTW89_8852A) += rtw89_8852a.o - rtw89_8852a-objs := rtw8852a.o \ - rtw8852a_table.o \ ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -2204,6 +2204,9 @@ static void rtw89_track_work(struct work - track_work.work); - bool tfc_changed; - -+ if (test_bit(RTW89_FLAG_FORBIDDEN_TRACK_WROK, rtwdev->flags)) -+ return; -+ - mutex_lock(&rtwdev->mutex); - - if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags)) -@@ -3042,6 +3045,7 @@ int rtw89_core_init(struct rtw89_dev *rt - continue; - INIT_LIST_HEAD(&rtwdev->scan_info.pkt_list[band]); - } -+ INIT_LIST_HEAD(&rtwdev->wow.pkt_list); - INIT_WORK(&rtwdev->ba_work, rtw89_core_ba_work); - INIT_WORK(&rtwdev->txq_work, rtw89_core_txq_work); - INIT_DELAYED_WORK(&rtwdev->txq_reinvoke_work, rtw89_core_txq_reinvoke_work); -@@ -3276,6 +3280,10 @@ static int rtw89_core_register_hw(struct - hw->wiphy->max_scan_ssids = RTW89_SCANOFLD_MAX_SSID; - hw->wiphy->max_scan_ie_len = RTW89_SCANOFLD_MAX_IE_LEN; - -+#ifdef CONFIG_PM -+ hw->wiphy->wowlan = rtwdev->chip->wowlan_stub; -+#endif -+ - hw->wiphy->tid_config_support.vif |= BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL); - hw->wiphy->tid_config_support.peer |= BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL); - hw->wiphy->tid_config_support.vif |= BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -178,7 +178,9 @@ enum rtw89_upd_mode { - RTW89_ROLE_REMOVE, - RTW89_ROLE_TYPE_CHANGE, - RTW89_ROLE_INFO_CHANGE, -- RTW89_ROLE_CON_DISCONN -+ RTW89_ROLE_CON_DISCONN, -+ RTW89_ROLE_BAND_SW, -+ RTW89_ROLE_FW_RESTORE, - }; - - enum rtw89_self_role { -@@ -2307,6 +2309,16 @@ struct rtw89_hci_ops { - */ - void (*recovery_start)(struct rtw89_dev *rtwdev); - void (*recovery_complete)(struct rtw89_dev *rtwdev); -+ -+ void (*ctrl_txdma_ch)(struct rtw89_dev *rtwdev, bool enable); -+ void (*ctrl_txdma_fw_ch)(struct rtw89_dev *rtwdev, bool enable); -+ void (*ctrl_trxhci)(struct rtw89_dev *rtwdev, bool enable); -+ int (*poll_txdma_ch)(struct rtw89_dev *rtwdev); -+ void (*clr_idx_all)(struct rtw89_dev *rtwdev); -+ void (*clear)(struct rtw89_dev *rtwdev, struct pci_dev *pdev); -+ void (*disable_intr)(struct rtw89_dev *rtwdev); -+ void (*enable_intr)(struct rtw89_dev *rtwdev); -+ int (*rst_bdram)(struct rtw89_dev *rtwdev); - }; - - struct rtw89_hci_info { -@@ -2748,6 +2760,7 @@ struct rtw89_chip_info { - const struct rtw89_imr_info *imr_info; - const struct rtw89_rrsr_cfgs *rrsr_cfgs; - u32 dma_ch_mask; -+ const struct wiphy_wowlan_support *wowlan_stub; - }; - - union rtw89_bus_info { -@@ -2944,6 +2957,8 @@ enum rtw89_flags { - RTW89_FLAG_LOW_POWER_MODE, - RTW89_FLAG_INACTIVE_PS, - RTW89_FLAG_CRASH_SIMULATING, -+ RTW89_FLAG_WOWLAN, -+ RTW89_FLAG_FORBIDDEN_TRACK_WROK, - - NUM_OF_RTW89_FLAGS, - }; -@@ -3653,6 +3668,66 @@ static inline void rtw89_hci_recovery_co - rtwdev->hci.ops->recovery_complete(rtwdev); - } - -+static inline void rtw89_hci_enable_intr(struct rtw89_dev *rtwdev) -+{ -+ if (rtwdev->hci.ops->enable_intr) -+ rtwdev->hci.ops->enable_intr(rtwdev); -+} -+ -+static inline void rtw89_hci_disable_intr(struct rtw89_dev *rtwdev) -+{ -+ if (rtwdev->hci.ops->disable_intr) -+ rtwdev->hci.ops->disable_intr(rtwdev); -+} -+ -+static inline void rtw89_hci_ctrl_txdma_ch(struct rtw89_dev *rtwdev, bool enable) -+{ -+ if (rtwdev->hci.ops->ctrl_txdma_ch) -+ rtwdev->hci.ops->ctrl_txdma_ch(rtwdev, enable); -+} -+ -+static inline void rtw89_hci_ctrl_txdma_fw_ch(struct rtw89_dev *rtwdev, bool enable) -+{ -+ if (rtwdev->hci.ops->ctrl_txdma_fw_ch) -+ rtwdev->hci.ops->ctrl_txdma_fw_ch(rtwdev, enable); -+} -+ -+static inline void rtw89_hci_ctrl_trxhci(struct rtw89_dev *rtwdev, bool enable) -+{ -+ if (rtwdev->hci.ops->ctrl_trxhci) -+ rtwdev->hci.ops->ctrl_trxhci(rtwdev, enable); -+} -+ -+static inline int rtw89_hci_poll_txdma_ch(struct rtw89_dev *rtwdev) -+{ -+ int ret = 0; -+ -+ if (rtwdev->hci.ops->poll_txdma_ch) -+ ret = rtwdev->hci.ops->poll_txdma_ch(rtwdev); -+ return ret; -+} -+ -+static inline void rtw89_hci_clr_idx_all(struct rtw89_dev *rtwdev) -+{ -+ if (rtwdev->hci.ops->clr_idx_all) -+ rtwdev->hci.ops->clr_idx_all(rtwdev); -+} -+ -+static inline int rtw89_hci_rst_bdram(struct rtw89_dev *rtwdev) -+{ -+ int ret = 0; -+ -+ if (rtwdev->hci.ops->rst_bdram) -+ ret = rtwdev->hci.ops->rst_bdram(rtwdev); -+ return ret; -+} -+ -+static inline void rtw89_hci_clear(struct rtw89_dev *rtwdev, struct pci_dev *pdev) -+{ -+ if (rtwdev->hci.ops->clear) -+ rtwdev->hci.ops->clear(rtwdev, pdev); -+} -+ - static inline u8 rtw89_read8(struct rtw89_dev *rtwdev, u32 addr) - { - return rtwdev->hci.ops->read8(rtwdev, addr); ---- a/drivers/net/wireless/realtek/rtw89/debug.h -+++ b/drivers/net/wireless/realtek/rtw89/debug.h -@@ -26,6 +26,7 @@ enum rtw89_debug_mask { - RTW89_DBG_HW_SCAN = BIT(15), - RTW89_DBG_SAR = BIT(16), - RTW89_DBG_STATE = BIT(17), -+ RTW89_DBG_WOW = BIT(18), - - RTW89_DBG_UNEXP = BIT(31), - }; ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -1564,6 +1564,16 @@ int rtw89_mac_resize_ple_rx_quota(struct - } - #undef SET_QUOTA - -+void rtw89_mac_hw_mgnt_sec(struct rtw89_dev *rtwdev, bool enable) -+{ -+ u32 msk32 = B_AX_UC_MGNT_DEC | B_AX_BMC_MGNT_DEC; -+ -+ if (enable) -+ rtw89_write32_set(rtwdev, R_AX_SEC_ENG_CTRL, msk32); -+ else -+ rtw89_write32_clr(rtwdev, R_AX_SEC_ENG_CTRL, msk32); -+} -+ - static void dle_quota_cfg(struct rtw89_dev *rtwdev, - const struct rtw89_dle_mem *cfg, - u16 ext_wde_min_qt_wcpu) -@@ -1913,10 +1923,10 @@ static int scheduler_init(struct rtw89_d - return 0; - } - --static int rtw89_mac_typ_fltr_opt(struct rtw89_dev *rtwdev, -- enum rtw89_machdr_frame_type type, -- enum rtw89_mac_fwd_target fwd_target, -- u8 mac_idx) -+int rtw89_mac_typ_fltr_opt(struct rtw89_dev *rtwdev, -+ enum rtw89_machdr_frame_type type, -+ enum rtw89_mac_fwd_target fwd_target, -+ u8 mac_idx) - { - u32 reg; - u32 val; ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -980,6 +980,16 @@ static inline void rtw89_mac_ctrl_hci_dm - B_AX_HCI_TXDMA_EN | B_AX_HCI_RXDMA_EN); - } - -+static inline bool rtw89_mac_get_power_state(struct rtw89_dev *rtwdev) -+{ -+ u32 val; -+ -+ val = rtw89_read32_mask(rtwdev, R_AX_IC_PWR_STATE, -+ B_AX_WLMAC_PWR_STE_MASK); -+ -+ return !!val; -+} -+ - int rtw89_mac_set_tx_time(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta, - bool resume, u32 tx_time); - int rtw89_mac_get_tx_time(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta, -@@ -1038,8 +1048,12 @@ void rtw89_mac_pkt_drop_vif(struct rtw89 - u16 rtw89_mac_dle_buf_req(struct rtw89_dev *rtwdev, u16 buf_len, bool wd); - int rtw89_mac_set_cpuio(struct rtw89_dev *rtwdev, - struct rtw89_cpuio_ctrl *ctrl_para, bool wd); -+int rtw89_mac_typ_fltr_opt(struct rtw89_dev *rtwdev, -+ enum rtw89_machdr_frame_type type, -+ enum rtw89_mac_fwd_target fwd_target, u8 mac_idx); - int rtw89_mac_resize_ple_rx_quota(struct rtw89_dev *rtwdev, bool wow); - int rtw89_mac_ptk_drop_by_band_and_wait(struct rtw89_dev *rtwdev, - enum rtw89_mac_idx band); -+void rtw89_mac_hw_mgnt_sec(struct rtw89_dev *rtwdev, bool wow); - - #endif ---- a/drivers/net/wireless/realtek/rtw89/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -14,6 +14,7 @@ - #include "sar.h" - #include "ser.h" - #include "util.h" -+#include "wow.h" - - static void rtw89_ops_tx(struct ieee80211_hw *hw, - struct ieee80211_tx_control *control, -@@ -916,6 +917,55 @@ static int rtw89_ops_set_tid_config(stru - return 0; - } - -+#ifdef CONFIG_PM -+static int rtw89_ops_suspend(struct ieee80211_hw *hw, -+ struct cfg80211_wowlan *wowlan) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ int ret; -+ -+ set_bit(RTW89_FLAG_FORBIDDEN_TRACK_WROK, rtwdev->flags); -+ cancel_delayed_work_sync(&rtwdev->track_work); -+ -+ mutex_lock(&rtwdev->mutex); -+ ret = rtw89_wow_suspend(rtwdev, wowlan); -+ mutex_unlock(&rtwdev->mutex); -+ -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to suspend for wow %d\n", ret); -+ clear_bit(RTW89_FLAG_FORBIDDEN_TRACK_WROK, rtwdev->flags); -+ return 1; -+ } -+ -+ return 0; -+} -+ -+static int rtw89_ops_resume(struct ieee80211_hw *hw) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ int ret; -+ -+ mutex_lock(&rtwdev->mutex); -+ ret = rtw89_wow_resume(rtwdev); -+ if (ret) -+ rtw89_warn(rtwdev, "failed to resume for wow %d\n", ret); -+ mutex_unlock(&rtwdev->mutex); -+ -+ clear_bit(RTW89_FLAG_FORBIDDEN_TRACK_WROK, rtwdev->flags); -+ ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work, -+ RTW89_TRACK_WORK_PERIOD); -+ -+ return ret ? 1 : 0; -+} -+ -+static void rtw89_ops_set_wakeup(struct ieee80211_hw *hw, bool enabled) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ -+ device_set_wakeup_enable(rtwdev->dev, enabled); -+} -+#endif -+ - const struct ieee80211_ops rtw89_ops = { - .tx = rtw89_ops_tx, - .wake_tx_queue = rtw89_ops_wake_tx_queue, -@@ -953,5 +1003,10 @@ const struct ieee80211_ops rtw89_ops = { - .set_sar_specs = rtw89_ops_set_sar_specs, - .sta_rc_update = rtw89_ops_sta_rc_update, - .set_tid_config = rtw89_ops_set_tid_config, -+#ifdef CONFIG_PM -+ .suspend = rtw89_ops_suspend, -+ .resume = rtw89_ops_resume, -+ .set_wakeup = rtw89_ops_set_wakeup, -+#endif - }; - EXPORT_SYMBOL(rtw89_ops); ---- a/drivers/net/wireless/realtek/rtw89/pci.c -+++ b/drivers/net/wireless/realtek/rtw89/pci.c -@@ -186,6 +186,17 @@ static void rtw89_pci_ctrl_txdma_ch_pcie - } - } - -+static void rtw89_pci_ctrl_txdma_fw_ch_pcie(struct rtw89_dev *rtwdev, bool enable) -+{ -+ const struct rtw89_pci_info *info = rtwdev->pci_info; -+ const struct rtw89_reg_def *dma_stop1 = &info->dma_stop1; -+ -+ if (enable) -+ rtw89_write32_clr(rtwdev, dma_stop1->addr, B_AX_STOP_CH12); -+ else -+ rtw89_write32_set(rtwdev, dma_stop1->addr, B_AX_STOP_CH12); -+} -+ - static bool - rtw89_skb_put_rx_data(struct rtw89_dev *rtwdev, bool fs, bool ls, - struct sk_buff *new, -@@ -2513,7 +2524,7 @@ static int rtw89_pci_ops_mac_pre_init(st - - /* disable all channels except to FW CMD channel to download firmware */ - rtw89_pci_ctrl_txdma_ch_pcie(rtwdev, false); -- rtw89_write32_clr(rtwdev, info->dma_stop1.addr, B_AX_STOP_CH12); -+ rtw89_pci_ctrl_txdma_fw_ch_pcie(rtwdev, true); - - /* start DMA activities */ - rtw89_pci_ctrl_dma_all(rtwdev, true); -@@ -3771,6 +3782,16 @@ static const struct rtw89_hci_ops rtw89_ - - .recovery_start = rtw89_pci_ops_recovery_start, - .recovery_complete = rtw89_pci_ops_recovery_complete, -+ -+ .ctrl_txdma_ch = rtw89_pci_ctrl_txdma_ch_pcie, -+ .ctrl_txdma_fw_ch = rtw89_pci_ctrl_txdma_fw_ch_pcie, -+ .ctrl_trxhci = rtw89_pci_ctrl_dma_trx, -+ .poll_txdma_ch = rtw89_poll_txdma_ch_idle_pcie, -+ .clr_idx_all = rtw89_pci_clr_idx_all, -+ .clear = rtw89_pci_clear_resource, -+ .disable_intr = rtw89_pci_disable_intr_lock, -+ .enable_intr = rtw89_pci_enable_intr_lock, -+ .rst_bdram = rtw89_pci_rst_bdram_pcie, - }; - - int rtw89_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) ---- a/drivers/net/wireless/realtek/rtw89/ps.c -+++ b/drivers/net/wireless/realtek/rtw89/ps.c -@@ -59,7 +59,7 @@ static void rtw89_ps_power_mode_change(s - rtw89_mac_power_mode_change(rtwdev, enter); - } - --static void __rtw89_enter_ps_mode(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+void __rtw89_enter_ps_mode(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) - { - if (rtwvif->wifi_role == RTW89_WIFI_ROLE_P2P_CLIENT) - return; ---- a/drivers/net/wireless/realtek/rtw89/ps.h -+++ b/drivers/net/wireless/realtek/rtw89/ps.h -@@ -8,6 +8,7 @@ - void rtw89_enter_lps(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); - void rtw89_leave_lps(struct rtw89_dev *rtwdev); - void __rtw89_leave_ps_mode(struct rtw89_dev *rtwdev); -+void __rtw89_enter_ps_mode(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); - void rtw89_leave_ps_mode(struct rtw89_dev *rtwdev); - void rtw89_enter_ips(struct rtw89_dev *rtwdev); - void rtw89_leave_ips(struct rtw89_dev *rtwdev); ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -952,6 +952,9 @@ - B_AX_STF_OQT_OVERFLOW_ERR_INT_EN | \ - B_AX_STF_OQT_UNDERFLOW_ERR_INT_EN) - -+#define R_AX_RX_FUNCTION_STOP 0x8920 -+#define B_AX_HDR_RX_STOP BIT(0) -+ - #define R_AX_HCI_FC_CTRL 0x8A00 - #define B_AX_HCI_FC_CH12_FULL_COND_MASK GENMASK(11, 10) - #define B_AX_HCI_FC_WP_CH811_FULL_COND_MASK GENMASK(9, 8) -@@ -1570,6 +1573,8 @@ - #define R_AX_ACTION_FWD0 0x9C04 - #define TRXCFG_MPDU_PROC_ACT_FRWD 0x02A95A95 - -+#define R_AX_ACTION_FWD1 0x9C08 -+ - #define R_AX_TF_FWD 0x9C14 - #define TRXCFG_MPDU_PROC_TF_FRWD 0x0000AA55 - -@@ -1581,6 +1586,9 @@ - #define R_AX_CUT_AMSDU_CTRL 0x9C40 - #define TRXCFG_MPDU_PROC_CUT_CTRL 0x010E05F0 - -+#define R_AX_WOW_CTRL 0x9C50 -+#define B_AX_WOW_WOWEN BIT(1) -+ - #define R_AX_MPDU_RX_ERR_ISR 0x9CF0 - #define R_AX_MPDU_RX_ERR_IMR 0x9CF4 - #define B_AX_RPT_ERR_INT_EN BIT(3) ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -1990,6 +1990,12 @@ static void rtw8852a_query_ppdu(struct r - rtw8852a_fill_freq_with_ppdu(rtwdev, phy_ppdu, status); - } - -+#ifdef CONFIG_PM -+static const struct wiphy_wowlan_support rtw_wowlan_stub_8852a = { -+ .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT, -+}; -+#endif -+ - static const struct rtw89_chip_ops rtw8852a_chip_ops = { - .enable_bb_rf = rtw89_mac_enable_bb_rf, - .disable_bb_rf = rtw89_mac_disable_bb_rf, -@@ -2139,6 +2145,9 @@ const struct rtw89_chip_info rtw8852a_ch - .imr_info = &rtw8852a_imr_info, - .rrsr_cfgs = &rtw8852a_rrsr_cfgs, - .dma_ch_mask = 0, -+#ifdef CONFIG_PM -+ .wowlan_stub = &rtw_wowlan_stub_8852a, -+#endif - }; - EXPORT_SYMBOL(rtw8852a_chip_info); - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2796,6 +2796,12 @@ static int rtw8852c_mac_disable_bb_rf(st - return 0; - } - -+#ifdef CONFIG_PM -+static const struct wiphy_wowlan_support rtw_wowlan_stub_8852c = { -+ .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT, -+}; -+#endif -+ - static const struct rtw89_chip_ops rtw8852c_chip_ops = { - .enable_bb_rf = rtw8852c_mac_enable_bb_rf, - .disable_bb_rf = rtw8852c_mac_disable_bb_rf, -@@ -2949,6 +2955,9 @@ const struct rtw89_chip_info rtw8852c_ch - .imr_info = &rtw8852c_imr_info, - .rrsr_cfgs = &rtw8852c_rrsr_cfgs, - .dma_ch_mask = 0, -+#ifdef CONFIG_PM -+ .wowlan_stub = &rtw_wowlan_stub_8852c, -+#endif - }; - EXPORT_SYMBOL(rtw8852c_chip_info); - ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/wow.c -@@ -0,0 +1,633 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2019-2022 Realtek Corporation -+ */ -+#include "cam.h" -+#include "core.h" -+#include "debug.h" -+#include "fw.h" -+#include "mac.h" -+#include "phy.h" -+#include "ps.h" -+#include "reg.h" -+#include "util.h" -+#include "wow.h" -+ -+static void rtw89_wow_leave_deep_ps(struct rtw89_dev *rtwdev) -+{ -+ __rtw89_leave_ps_mode(rtwdev); -+} -+ -+static void rtw89_wow_enter_deep_ps(struct rtw89_dev *rtwdev) -+{ -+ struct ieee80211_vif *wow_vif = rtwdev->wow.wow_vif; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)wow_vif->drv_priv; -+ -+ __rtw89_enter_ps_mode(rtwdev, rtwvif); -+} -+ -+static void rtw89_wow_enter_lps(struct rtw89_dev *rtwdev) -+{ -+ struct ieee80211_vif *wow_vif = rtwdev->wow.wow_vif; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)wow_vif->drv_priv; -+ -+ rtw89_enter_lps(rtwdev, rtwvif); -+} -+ -+static void rtw89_wow_leave_lps(struct rtw89_dev *rtwdev) -+{ -+ rtw89_leave_lps(rtwdev); -+} -+ -+static int rtw89_wow_config_mac(struct rtw89_dev *rtwdev, bool enable_wow) -+{ -+ int ret; -+ -+ if (enable_wow) { -+ ret = rtw89_mac_resize_ple_rx_quota(rtwdev, true); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]patch rx qta %d\n", ret); -+ return ret; -+ } -+ rtw89_write32_set(rtwdev, R_AX_RX_FUNCTION_STOP, B_AX_HDR_RX_STOP); -+ rtw89_write32_clr(rtwdev, R_AX_RX_FLTR_OPT, B_AX_SNIFFER_MODE); -+ rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false); -+ rtw89_write32(rtwdev, R_AX_ACTION_FWD0, 0); -+ rtw89_write32(rtwdev, R_AX_ACTION_FWD1, 0); -+ rtw89_write32(rtwdev, R_AX_TF_FWD, 0); -+ rtw89_write32(rtwdev, R_AX_HW_RPT_FWD, 0); -+ } else { -+ ret = rtw89_mac_resize_ple_rx_quota(rtwdev, false); -+ if (ret) { -+ rtw89_err(rtwdev, "[ERR]patch rx qta %d\n", ret); -+ return ret; -+ } -+ rtw89_write32_clr(rtwdev, R_AX_RX_FUNCTION_STOP, B_AX_HDR_RX_STOP); -+ rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); -+ rtw89_write32(rtwdev, R_AX_ACTION_FWD0, TRXCFG_MPDU_PROC_ACT_FRWD); -+ rtw89_write32(rtwdev, R_AX_TF_FWD, TRXCFG_MPDU_PROC_TF_FRWD); -+ } -+ -+ return 0; -+} -+ -+static void rtw89_wow_set_rx_filter(struct rtw89_dev *rtwdev, bool enable) -+{ -+ enum rtw89_mac_fwd_target fwd_target = enable ? -+ RTW89_FWD_DONT_CARE : -+ RTW89_FWD_TO_HOST; -+ -+ rtw89_mac_typ_fltr_opt(rtwdev, RTW89_MGNT, fwd_target, RTW89_MAC_0); -+ rtw89_mac_typ_fltr_opt(rtwdev, RTW89_CTRL, fwd_target, RTW89_MAC_0); -+ rtw89_mac_typ_fltr_opt(rtwdev, RTW89_DATA, fwd_target, RTW89_MAC_0); -+} -+ -+static void rtw89_wow_show_wakeup_reason(struct rtw89_dev *rtwdev) -+{ -+ enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; -+ struct cfg80211_wowlan_nd_info nd_info; -+ struct cfg80211_wowlan_wakeup wakeup = { -+ .pattern_idx = -1, -+ }; -+ u32 wow_reason_reg; -+ u8 reason; -+ -+ if (chip_id == RTL8852A || chip_id == RTL8852B) -+ wow_reason_reg = R_AX_C2HREG_DATA3 + 3; -+ else -+ wow_reason_reg = R_AX_C2HREG_DATA3_V1 + 3; -+ -+ reason = rtw89_read8(rtwdev, wow_reason_reg); -+ -+ switch (reason) { -+ case RTW89_WOW_RSN_RX_DEAUTH: -+ wakeup.disconnect = true; -+ rtw89_debug(rtwdev, RTW89_DBG_WOW, "WOW: Rx deauth\n"); -+ break; -+ case RTW89_WOW_RSN_DISCONNECT: -+ wakeup.disconnect = true; -+ rtw89_debug(rtwdev, RTW89_DBG_WOW, "WOW: AP is off\n"); -+ break; -+ case RTW89_WOW_RSN_RX_MAGIC_PKT: -+ wakeup.magic_pkt = true; -+ rtw89_debug(rtwdev, RTW89_DBG_WOW, "WOW: Rx magic packet\n"); -+ break; -+ case RTW89_WOW_RSN_RX_GTK_REKEY: -+ wakeup.gtk_rekey_failure = true; -+ rtw89_debug(rtwdev, RTW89_DBG_WOW, "WOW: Rx gtk rekey\n"); -+ break; -+ case RTW89_WOW_RSN_RX_PATTERN_MATCH: -+ /* Current firmware and driver don't report pattern index -+ * Use pattern_idx to 0 defaultly. -+ */ -+ wakeup.pattern_idx = 0; -+ rtw89_debug(rtwdev, RTW89_DBG_WOW, "WOW: Rx pattern match packet\n"); -+ break; -+ case RTW89_WOW_RSN_RX_NLO: -+ /* Current firmware and driver don't report ssid index. -+ * Use 0 for n_matches based on its comment. -+ */ -+ nd_info.n_matches = 0; -+ wakeup.net_detect = &nd_info; -+ rtw89_debug(rtwdev, RTW89_DBG_WOW, "Rx NLO\n"); -+ break; -+ default: -+ rtw89_warn(rtwdev, "Unknown wakeup reason %x\n", reason); -+ ieee80211_report_wowlan_wakeup(rtwdev->wow.wow_vif, NULL, -+ GFP_KERNEL); -+ return; -+ } -+ -+ ieee80211_report_wowlan_wakeup(rtwdev->wow.wow_vif, &wakeup, -+ GFP_KERNEL); -+} -+ -+static void rtw89_wow_vif_iter(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -+ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); -+ -+ /* Current wowlan function support setting of only one STATION vif. -+ * So when one suitable vif is found, stop the iteration. -+ */ -+ if (rtw_wow->wow_vif || vif->type != NL80211_IFTYPE_STATION) -+ return; -+ -+ switch (rtwvif->net_type) { -+ case RTW89_NET_TYPE_INFRA: -+ rtw_wow->wow_vif = vif; -+ break; -+ case RTW89_NET_TYPE_NO_LINK: -+ default: -+ break; -+ } -+} -+ -+static void rtw89_wow_clear_wakeups(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -+ -+ rtw_wow->wow_vif = NULL; -+ rtw89_core_release_all_bits_map(rtw_wow->flags, RTW89_WOW_FLAG_NUM); -+ rtw_wow->pattern_cnt = 0; -+} -+ -+static int rtw89_wow_set_wakeups(struct rtw89_dev *rtwdev, -+ struct cfg80211_wowlan *wowlan) -+{ -+ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -+ struct rtw89_vif *rtwvif; -+ -+ if (wowlan->disconnect) -+ set_bit(RTW89_WOW_FLAG_EN_DISCONNECT, rtw_wow->flags); -+ if (wowlan->magic_pkt) -+ set_bit(RTW89_WOW_FLAG_EN_MAGIC_PKT, rtw_wow->flags); -+ -+ rtw89_for_each_rtwvif(rtwdev, rtwvif) -+ rtw89_wow_vif_iter(rtwdev, rtwvif); -+ -+ if (!rtw_wow->wow_vif) -+ return -EPERM; -+ -+ return 0; -+} -+ -+static int rtw89_wow_cfg_wake(struct rtw89_dev *rtwdev, bool wow) -+{ -+ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -+ struct ieee80211_vif *wow_vif = rtw_wow->wow_vif; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)wow_vif->drv_priv; -+ struct ieee80211_sta *wow_sta; -+ struct rtw89_sta *rtwsta = NULL; -+ bool is_conn = true; -+ int ret; -+ -+ wow_sta = ieee80211_find_sta(wow_vif, rtwvif->bssid); -+ if (wow_sta) -+ rtwsta = (struct rtw89_sta *)wow_sta->drv_priv; -+ else -+ is_conn = false; -+ -+ if (wow) { -+ if (rtw_wow->pattern_cnt) -+ rtwvif->wowlan_pattern = true; -+ if (test_bit(RTW89_WOW_FLAG_EN_MAGIC_PKT, rtw_wow->flags)) -+ rtwvif->wowlan_magic = true; -+ } else { -+ rtwvif->wowlan_pattern = false; -+ rtwvif->wowlan_magic = false; -+ } -+ -+ ret = rtw89_fw_h2c_wow_wakeup_ctrl(rtwdev, rtwvif, wow); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to fw wow wakeup ctrl\n"); -+ return ret; -+ } -+ -+ if (wow) { -+ ret = rtw89_chip_h2c_dctl_sec_cam(rtwdev, rtwvif, rtwsta); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to update dctl cam sec entry: %d\n", -+ ret); -+ return ret; -+ } -+ } -+ -+ ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, !is_conn); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to send h2c join info\n"); -+ return ret; -+ } -+ -+ ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to send h2c cam\n"); -+ return ret; -+ } -+ -+ ret = rtw89_fw_h2c_wow_global(rtwdev, rtwvif, wow); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to fw wow global\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int rtw89_wow_check_fw_status(struct rtw89_dev *rtwdev, bool wow_enable) -+{ -+ u8 polling; -+ int ret; -+ -+ ret = read_poll_timeout_atomic(rtw89_read8_mask, polling, -+ wow_enable == !!polling, -+ 50, 50000, false, rtwdev, -+ R_AX_WOW_CTRL, B_AX_WOW_WOWEN); -+ if (ret) -+ rtw89_err(rtwdev, "failed to check wow status %s\n", -+ wow_enable ? "enabled" : "disabled"); -+ return ret; -+} -+ -+static void rtw89_wow_release_pkt_list(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -+ struct list_head *pkt_list = &rtw_wow->pkt_list; -+ struct rtw89_pktofld_info *info, *tmp; -+ -+ list_for_each_entry_safe(info, tmp, pkt_list, list) { -+ rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id); -+ rtw89_core_release_bit_map(rtwdev->pkt_offload, -+ info->id); -+ list_del(&info->list); -+ kfree(info); -+ } -+} -+ -+static int rtw89_wow_swap_fw(struct rtw89_dev *rtwdev, bool wow) -+{ -+ enum rtw89_fw_type fw_type = wow ? RTW89_FW_WOWLAN : RTW89_FW_NORMAL; -+ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -+ struct ieee80211_vif *wow_vif = rtw_wow->wow_vif; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)wow_vif->drv_priv; -+ struct ieee80211_sta *wow_sta; -+ struct rtw89_sta *rtwsta = NULL; -+ bool is_conn = true; -+ int ret; -+ -+ rtw89_hci_disable_intr(rtwdev); -+ -+ wow_sta = ieee80211_find_sta(wow_vif, rtwvif->bssid); -+ if (wow_sta) -+ rtwsta = (struct rtw89_sta *)wow_sta->drv_priv; -+ else -+ is_conn = false; -+ -+ ret = rtw89_fw_download(rtwdev, fw_type); -+ if (ret) { -+ rtw89_warn(rtwdev, "download fw failed\n"); -+ return ret; -+ } -+ -+ rtw89_phy_init_rf_reg(rtwdev, true); -+ -+ ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta, -+ RTW89_ROLE_FW_RESTORE); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to send h2c role maintain\n"); -+ return ret; -+ } -+ -+ ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, wow_vif, wow_sta); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to send h2c assoc cmac tbl\n"); -+ return ret; -+ } -+ -+ if (!is_conn) -+ rtw89_cam_reset_keys(rtwdev); -+ -+ ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, !is_conn); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to send h2c join info\n"); -+ return ret; -+ } -+ -+ ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to send h2c cam\n"); -+ return ret; -+ } -+ -+ if (is_conn) { -+ rtw89_phy_ra_assoc(rtwdev, wow_sta); -+ rtw89_phy_set_bss_color(rtwdev, wow_vif); -+ rtw89_chip_cfg_txpwr_ul_tb_offset(rtwdev, wow_vif); -+ } -+ -+ rtw89_mac_hw_mgnt_sec(rtwdev, wow); -+ rtw89_hci_enable_intr(rtwdev); -+ -+ return 0; -+} -+ -+static int rtw89_wow_enable_trx_pre(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ rtw89_hci_ctrl_txdma_ch(rtwdev, false); -+ rtw89_hci_ctrl_txdma_fw_ch(rtwdev, true); -+ -+ rtw89_mac_ptk_drop_by_band_and_wait(rtwdev, RTW89_MAC_0); -+ -+ ret = rtw89_hci_poll_txdma_ch(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "txdma ch busy\n"); -+ return ret; -+ } -+ rtw89_wow_set_rx_filter(rtwdev, true); -+ -+ ret = rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false); -+ if (ret) { -+ rtw89_err(rtwdev, "cfg ppdu status\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int rtw89_wow_enable_trx_post(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ rtw89_hci_disable_intr(rtwdev); -+ rtw89_hci_ctrl_trxhci(rtwdev, false); -+ -+ ret = rtw89_hci_poll_txdma_ch(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to poll txdma ch idle pcie\n"); -+ return ret; -+ } -+ -+ ret = rtw89_wow_config_mac(rtwdev, true); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to config mac\n"); -+ return ret; -+ } -+ -+ rtw89_wow_set_rx_filter(rtwdev, false); -+ rtw89_hci_reset(rtwdev); -+ -+ return 0; -+} -+ -+static int rtw89_wow_disable_trx_pre(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ rtw89_hci_clr_idx_all(rtwdev); -+ -+ ret = rtw89_hci_rst_bdram(rtwdev); -+ if (ret) { -+ rtw89_warn(rtwdev, "reset bdram busy\n"); -+ return ret; -+ } -+ -+ rtw89_hci_ctrl_trxhci(rtwdev, true); -+ rtw89_hci_ctrl_txdma_ch(rtwdev, true); -+ -+ ret = rtw89_wow_config_mac(rtwdev, false); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to config mac\n"); -+ return ret; -+ } -+ rtw89_hci_enable_intr(rtwdev); -+ -+ return 0; -+} -+ -+static int rtw89_wow_disable_trx_post(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ ret = rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); -+ if (ret) -+ rtw89_err(rtwdev, "cfg ppdu status\n"); -+ -+ return ret; -+} -+ -+static int rtw89_wow_fw_start(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)rtw_wow->wow_vif->drv_priv; -+ int ret; -+ -+ ret = rtw89_fw_h2c_keep_alive(rtwdev, rtwvif, true); -+ if (ret) { -+ rtw89_err(rtwdev, "wow: failed to enable keep alive\n"); -+ return ret; -+ } -+ -+ ret = rtw89_fw_h2c_disconnect_detect(rtwdev, rtwvif, true); -+ if (ret) { -+ rtw89_err(rtwdev, "wow: failed to enable disconnect detect\n"); -+ goto out; -+ } -+ -+ ret = rtw89_wow_cfg_wake(rtwdev, true); -+ if (ret) { -+ rtw89_err(rtwdev, "wow: failed to config wake\n"); -+ goto out; -+ } -+ -+ ret = rtw89_wow_check_fw_status(rtwdev, true); -+ if (ret) { -+ rtw89_err(rtwdev, "wow: failed to check enable fw ready\n"); -+ goto out; -+ } -+ -+out: -+ return ret; -+} -+ -+static int rtw89_wow_fw_stop(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)rtw_wow->wow_vif->drv_priv; -+ int ret; -+ -+ ret = rtw89_fw_h2c_keep_alive(rtwdev, rtwvif, false); -+ if (ret) { -+ rtw89_err(rtwdev, "wow: failed to disable keep alive\n"); -+ goto out; -+ } -+ -+ rtw89_wow_release_pkt_list(rtwdev); -+ -+ ret = rtw89_fw_h2c_disconnect_detect(rtwdev, rtwvif, false); -+ if (ret) { -+ rtw89_err(rtwdev, "wow: failed to disable disconnect detect\n"); -+ goto out; -+ } -+ -+ ret = rtw89_wow_cfg_wake(rtwdev, false); -+ if (ret) { -+ rtw89_err(rtwdev, "wow: failed to disable config wake\n"); -+ goto out; -+ } -+ -+ ret = rtw89_wow_check_fw_status(rtwdev, false); -+ if (ret) { -+ rtw89_err(rtwdev, "wow: failed to check disable fw ready\n"); -+ goto out; -+ } -+ -+out: -+ return ret; -+} -+ -+static int rtw89_wow_enable(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ set_bit(RTW89_FLAG_WOWLAN, rtwdev->flags); -+ -+ ret = rtw89_wow_enable_trx_pre(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "wow: failed to enable trx_pre\n"); -+ goto out; -+ } -+ -+ rtw89_wow_swap_fw(rtwdev, true); -+ if (ret) { -+ rtw89_err(rtwdev, "wow: failed to swap to wow fw\n"); -+ goto out; -+ } -+ -+ rtw89_wow_fw_start(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "wow: failed to let wow fw start\n"); -+ goto out; -+ } -+ -+ rtw89_wow_enter_lps(rtwdev); -+ -+ rtw89_wow_enable_trx_post(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "wow: failed to enable trx_post\n"); -+ goto out; -+ } -+ -+ return 0; -+ -+out: -+ clear_bit(RTW89_FLAG_WOWLAN, rtwdev->flags); -+ return ret; -+} -+ -+static int rtw89_wow_disable(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ ret = rtw89_wow_disable_trx_pre(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "wow: failed to disable trx_pre\n"); -+ goto out; -+ } -+ -+ rtw89_wow_leave_lps(rtwdev); -+ -+ ret = rtw89_wow_fw_stop(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "wow: failed to swap to normal fw\n"); -+ goto out; -+ } -+ -+ ret = rtw89_wow_swap_fw(rtwdev, false); -+ if (ret) { -+ rtw89_err(rtwdev, "wow: failed to disable trx_post\n"); -+ goto out; -+ } -+ -+ ret = rtw89_wow_disable_trx_post(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "wow: failed to disable trx_pre\n"); -+ goto out; -+ } -+ -+out: -+ clear_bit(RTW89_FLAG_WOWLAN, rtwdev->flags); -+ return ret; -+} -+ -+int rtw89_wow_resume(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ if (!test_bit(RTW89_FLAG_WOWLAN, rtwdev->flags)) { -+ rtw89_err(rtwdev, "wow is not enabled\n"); -+ ret = -EPERM; -+ goto out; -+ } -+ -+ if (!rtw89_mac_get_power_state(rtwdev)) { -+ rtw89_err(rtwdev, "chip is no power when resume\n"); -+ ret = -EPERM; -+ goto out; -+ } -+ -+ rtw89_wow_leave_deep_ps(rtwdev); -+ -+ rtw89_wow_show_wakeup_reason(rtwdev); -+ -+ ret = rtw89_wow_disable(rtwdev); -+ if (ret) -+ rtw89_err(rtwdev, "failed to disable wow\n"); -+ -+out: -+ rtw89_wow_clear_wakeups(rtwdev); -+ return ret; -+} -+ -+int rtw89_wow_suspend(struct rtw89_dev *rtwdev, struct cfg80211_wowlan *wowlan) -+{ -+ int ret; -+ -+ ret = rtw89_wow_set_wakeups(rtwdev, wowlan); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to set wakeup event\n"); -+ return ret; -+ } -+ -+ rtw89_wow_leave_lps(rtwdev); -+ -+ ret = rtw89_wow_enable(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to enable wow\n"); -+ return ret; -+ } -+ -+ rtw89_wow_enter_deep_ps(rtwdev); -+ -+ return 0; -+} ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/wow.h -@@ -0,0 +1,21 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2019-2022 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_WOW_H__ -+#define __RTW89_WOW_H__ -+ -+enum rtw89_wake_reason { -+ RTW89_WOW_RSN_RX_PTK_REKEY = 0x1, -+ RTW89_WOW_RSN_RX_GTK_REKEY = 0x2, -+ RTW89_WOW_RSN_RX_DEAUTH = 0x8, -+ RTW89_WOW_RSN_DISCONNECT = 0x10, -+ RTW89_WOW_RSN_RX_MAGIC_PKT = 0x21, -+ RTW89_WOW_RSN_RX_PATTERN_MATCH = 0x23, -+ RTW89_WOW_RSN_RX_NLO = 0x55, -+}; -+ -+int rtw89_wow_suspend(struct rtw89_dev *rtwdev, struct cfg80211_wowlan *wowlan); -+int rtw89_wow_resume(struct rtw89_dev *rtwdev); -+ -+#endif diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-055-wifi-rtw89-add-WoWLAN-pattern-match-support.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-055-wifi-rtw89-add-WoWLAN-pattern-match-support.patch deleted file mode 100644 index d714ed811..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-055-wifi-rtw89-add-WoWLAN-pattern-match-support.patch +++ /dev/null @@ -1,498 +0,0 @@ -From d2b68e95b5bc97d81d150a46447167bf21bd555f Mon Sep 17 00:00:00 2001 -From: Chin-Yen Lee -Date: Thu, 27 Oct 2022 13:27:07 +0800 -Subject: [PATCH 055/149] wifi: rtw89: add WoWLAN pattern match support - -Pattern match is an option of WoWLAN to allow the device to be woken up -from suspend mode when receiving packets matched user-designed patterns. - -The patterns are written into hardware via WoWLAN firmware in suspend -flow if users have set up them. If packets matched designed pattern are -received, WoWLAN firmware will send an interrupt and then wake up the -device. - -Signed-off-by: Chin-Yen Lee -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221027052707.14605-8-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 18 ++ - drivers/net/wireless/realtek/rtw89/fw.c | 52 ++++ - drivers/net/wireless/realtek/rtw89/fw.h | 67 +++++ - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 3 + - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 3 + - drivers/net/wireless/realtek/rtw89/util.h | 11 + - drivers/net/wireless/realtek/rtw89/wow.c | 228 +++++++++++++++++- - 7 files changed, 381 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3489,9 +3489,27 @@ struct rtw89_phy_efuse_gain { - s8 comp[RF_PATH_MAX][RTW89_SUBBAND_NR]; /* S(8, 0) */ - }; - -+#define RTW89_MAX_PATTERN_NUM 18 -+#define RTW89_MAX_PATTERN_MASK_SIZE 4 -+#define RTW89_MAX_PATTERN_SIZE 128 -+ -+struct rtw89_wow_cam_info { -+ bool r_w; -+ u8 idx; -+ u32 mask[RTW89_MAX_PATTERN_MASK_SIZE]; -+ u16 crc; -+ bool negative_pattern_match; -+ bool skip_mac_hdr; -+ bool uc; -+ bool mc; -+ bool bc; -+ bool valid; -+}; -+ - struct rtw89_wow_param { - struct ieee80211_vif *wow_vif; - DECLARE_BITMAP(flags, RTW89_WOW_FLAG_NUM); -+ struct rtw89_wow_cam_info patterns[RTW89_MAX_PATTERN_NUM]; - u8 pattern_cnt; - struct list_head pkt_list; - }; ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -3174,3 +3174,55 @@ fail: - - return ret; - } -+ -+#define H2C_WOW_CAM_UPD_LEN 24 -+int rtw89_fw_wow_cam_update(struct rtw89_dev *rtwdev, -+ struct rtw89_wow_cam_info *cam_info) -+{ -+ struct sk_buff *skb; -+ int ret; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_WOW_CAM_UPD_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for keep alive\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, H2C_WOW_CAM_UPD_LEN); -+ -+ RTW89_SET_WOW_CAM_UPD_R_W(skb->data, cam_info->r_w); -+ RTW89_SET_WOW_CAM_UPD_IDX(skb->data, cam_info->idx); -+ if (cam_info->valid) { -+ RTW89_SET_WOW_CAM_UPD_WKFM1(skb->data, cam_info->mask[0]); -+ RTW89_SET_WOW_CAM_UPD_WKFM2(skb->data, cam_info->mask[1]); -+ RTW89_SET_WOW_CAM_UPD_WKFM3(skb->data, cam_info->mask[2]); -+ RTW89_SET_WOW_CAM_UPD_WKFM4(skb->data, cam_info->mask[3]); -+ RTW89_SET_WOW_CAM_UPD_CRC(skb->data, cam_info->crc); -+ RTW89_SET_WOW_CAM_UPD_NEGATIVE_PATTERN_MATCH(skb->data, -+ cam_info->negative_pattern_match); -+ RTW89_SET_WOW_CAM_UPD_SKIP_MAC_HDR(skb->data, -+ cam_info->skip_mac_hdr); -+ RTW89_SET_WOW_CAM_UPD_UC(skb->data, cam_info->uc); -+ RTW89_SET_WOW_CAM_UPD_MC(skb->data, cam_info->mc); -+ RTW89_SET_WOW_CAM_UPD_BC(skb->data, cam_info->bc); -+ } -+ RTW89_SET_WOW_CAM_UPD_VALID(skb->data, cam_info->valid); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MAC_WOW, -+ H2C_FUNC_WOW_CAM_UPD, 0, 1, -+ H2C_WOW_CAM_UPD_LEN); -+ -+ ret = rtw89_h2c_tx(rtwdev, skb, false); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return ret; -+} ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -2033,6 +2033,71 @@ static inline void RTW89_SET_WOW_WAKEUP_ - le32p_replace_bits((__le32 *)h2c, val, GENMASK(31, 24)); - } - -+static inline void RTW89_SET_WOW_CAM_UPD_R_W(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, BIT(0)); -+} -+ -+static inline void RTW89_SET_WOW_CAM_UPD_IDX(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c, val, GENMASK(7, 1)); -+} -+ -+static inline void RTW89_SET_WOW_CAM_UPD_WKFM1(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c + 1, val, GENMASK(31, 0)); -+} -+ -+static inline void RTW89_SET_WOW_CAM_UPD_WKFM2(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c + 2, val, GENMASK(31, 0)); -+} -+ -+static inline void RTW89_SET_WOW_CAM_UPD_WKFM3(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c + 3, val, GENMASK(31, 0)); -+} -+ -+static inline void RTW89_SET_WOW_CAM_UPD_WKFM4(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c + 4, val, GENMASK(31, 0)); -+} -+ -+static inline void RTW89_SET_WOW_CAM_UPD_CRC(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c + 5, val, GENMASK(15, 0)); -+} -+ -+static inline void RTW89_SET_WOW_CAM_UPD_NEGATIVE_PATTERN_MATCH(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c + 5, val, BIT(22)); -+} -+ -+static inline void RTW89_SET_WOW_CAM_UPD_SKIP_MAC_HDR(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c + 5, val, BIT(23)); -+} -+ -+static inline void RTW89_SET_WOW_CAM_UPD_UC(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c + 5, val, BIT(24)); -+} -+ -+static inline void RTW89_SET_WOW_CAM_UPD_MC(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c + 5, val, BIT(25)); -+} -+ -+static inline void RTW89_SET_WOW_CAM_UPD_BC(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c + 5, val, BIT(26)); -+} -+ -+static inline void RTW89_SET_WOW_CAM_UPD_VALID(void *h2c, u32 val) -+{ -+ le32p_replace_bits((__le32 *)h2c + 5, val, BIT(31)); -+} -+ - enum rtw89_btc_btf_h2c_class { - BTFC_SET = 0x10, - BTFC_GET = 0x11, -@@ -3039,6 +3104,8 @@ int rtw89_fw_h2c_wow_global(struct rtw89 - int rtw89_fw_h2c_wow_wakeup_ctrl(struct rtw89_dev *rtwdev, - struct rtw89_vif *rtwvif, bool enable); - -+int rtw89_fw_wow_cam_update(struct rtw89_dev *rtwdev, -+ struct rtw89_wow_cam_info *cam_info); - static inline void rtw89_fw_h2c_init_ba_cam(struct rtw89_dev *rtwdev) - { - const struct rtw89_chip_info *chip = rtwdev->chip; ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -1993,6 +1993,9 @@ static void rtw8852a_query_ppdu(struct r - #ifdef CONFIG_PM - static const struct wiphy_wowlan_support rtw_wowlan_stub_8852a = { - .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT, -+ .n_patterns = RTW89_MAX_PATTERN_NUM, -+ .pattern_max_len = RTW89_MAX_PATTERN_SIZE, -+ .pattern_min_len = 1, - }; - #endif - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2799,6 +2799,9 @@ static int rtw8852c_mac_disable_bb_rf(st - #ifdef CONFIG_PM - static const struct wiphy_wowlan_support rtw_wowlan_stub_8852c = { - .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT, -+ .n_patterns = RTW89_MAX_PATTERN_NUM, -+ .pattern_max_len = RTW89_MAX_PATTERN_SIZE, -+ .pattern_min_len = 1, - }; - #endif - ---- a/drivers/net/wireless/realtek/rtw89/util.h -+++ b/drivers/net/wireless/realtek/rtw89/util.h -@@ -44,4 +44,15 @@ static inline s32 s32_div_u32_round_clos - return s32_div_u32_round_down(dividend + divisor / 2, divisor, NULL); - } - -+static inline void ether_addr_copy_mask(u8 *dst, const u8 *src, u8 mask) -+{ -+ int i; -+ -+ eth_zero_addr(dst); -+ for (i = 0; i < ETH_ALEN; i++) { -+ if (mask & BIT(i)) -+ dst[i] = src[i]; -+ } -+} -+ - #endif ---- a/drivers/net/wireless/realtek/rtw89/wow.c -+++ b/drivers/net/wireless/realtek/rtw89/wow.c -@@ -162,6 +162,227 @@ static void rtw89_wow_vif_iter(struct rt - } - } - -+static u16 __rtw89_cal_crc16(u8 data, u16 crc) -+{ -+ u8 shift_in, data_bit; -+ u8 crc_bit4, crc_bit11, crc_bit15; -+ u16 crc_result; -+ int index; -+ -+ for (index = 0; index < 8; index++) { -+ crc_bit15 = crc & BIT(15) ? 1 : 0; -+ data_bit = data & BIT(index) ? 1 : 0; -+ shift_in = crc_bit15 ^ data_bit; -+ -+ crc_result = crc << 1; -+ -+ if (shift_in == 0) -+ crc_result &= ~BIT(0); -+ else -+ crc_result |= BIT(0); -+ -+ crc_bit11 = (crc & BIT(11) ? 1 : 0) ^ shift_in; -+ -+ if (crc_bit11 == 0) -+ crc_result &= ~BIT(12); -+ else -+ crc_result |= BIT(12); -+ -+ crc_bit4 = (crc & BIT(4) ? 1 : 0) ^ shift_in; -+ -+ if (crc_bit4 == 0) -+ crc_result &= ~BIT(5); -+ else -+ crc_result |= BIT(5); -+ -+ crc = crc_result; -+ } -+ return crc; -+} -+ -+static u16 rtw89_calc_crc(u8 *pdata, int length) -+{ -+ u16 crc = 0xffff; -+ int i; -+ -+ for (i = 0; i < length; i++) -+ crc = __rtw89_cal_crc16(pdata[i], crc); -+ -+ /* get 1' complement */ -+ return ~crc; -+} -+ -+static int rtw89_wow_pattern_get_type(struct rtw89_vif *rtwvif, -+ struct rtw89_wow_cam_info *rtw_pattern, -+ const u8 *pattern, u8 da_mask) -+{ -+ u8 da[ETH_ALEN]; -+ -+ ether_addr_copy_mask(da, pattern, da_mask); -+ -+ /* Each pattern is divided into different kinds by DA address -+ * a. DA is broadcast address: set bc = 0; -+ * b. DA is multicast address: set mc = 0 -+ * c. DA is unicast address same as dev's mac address: set uc = 0 -+ * d. DA is unmasked. Also called wildcard type: set uc = bc = mc = 0 -+ * e. Others is invalid type. -+ */ -+ -+ if (is_broadcast_ether_addr(da)) -+ rtw_pattern->bc = true; -+ else if (is_multicast_ether_addr(da)) -+ rtw_pattern->mc = true; -+ else if (ether_addr_equal(da, rtwvif->mac_addr) && -+ da_mask == GENMASK(5, 0)) -+ rtw_pattern->uc = true; -+ else if (!da_mask) /*da_mask == 0 mean wildcard*/ -+ return 0; -+ else -+ return -EPERM; -+ -+ return 0; -+} -+ -+static int rtw89_wow_pattern_generate(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, -+ const struct cfg80211_pkt_pattern *pkt_pattern, -+ struct rtw89_wow_cam_info *rtw_pattern) -+{ -+ u8 mask_hw[RTW89_MAX_PATTERN_MASK_SIZE * 4] = {0}; -+ u8 content[RTW89_MAX_PATTERN_SIZE] = {0}; -+ const u8 *mask; -+ const u8 *pattern; -+ u8 mask_len; -+ u16 count; -+ u32 len; -+ int i, ret; -+ -+ pattern = pkt_pattern->pattern; -+ len = pkt_pattern->pattern_len; -+ mask = pkt_pattern->mask; -+ mask_len = DIV_ROUND_UP(len, 8); -+ memset(rtw_pattern, 0, sizeof(*rtw_pattern)); -+ -+ ret = rtw89_wow_pattern_get_type(rtwvif, rtw_pattern, pattern, -+ mask[0] & GENMASK(5, 0)); -+ if (ret) -+ return ret; -+ -+ /* translate mask from os to mask for hw -+ * pattern from OS uses 'ethenet frame', like this: -+ * | 6 | 6 | 2 | 20 | Variable | 4 | -+ * |--------+--------+------+-----------+------------+-----| -+ * | 802.3 Mac Header | IP Header | TCP Packet | FCS | -+ * | DA | SA | Type | -+ * -+ * BUT, packet catched by our HW is in '802.11 frame', begin from LLC -+ * | 24 or 30 | 6 | 2 | 20 | Variable | 4 | -+ * |-------------------+--------+------+-----------+------------+-----| -+ * | 802.11 MAC Header | LLC | IP Header | TCP Packet | FCS | -+ * | Others | Tpye | -+ * -+ * Therefore, we need translate mask_from_OS to mask_to_hw. -+ * We should left-shift mask by 6 bits, then set the new bit[0~5] = 0, -+ * because new mask[0~5] means 'SA', but our HW packet begins from LLC, -+ * bit[0~5] corresponds to first 6 Bytes in LLC, they just don't match. -+ */ -+ -+ /* Shift 6 bits */ -+ for (i = 0; i < mask_len - 1; i++) { -+ mask_hw[i] = u8_get_bits(mask[i], GENMASK(7, 6)) | -+ u8_get_bits(mask[i + 1], GENMASK(5, 0)) << 2; -+ } -+ mask_hw[i] = u8_get_bits(mask[i], GENMASK(7, 6)); -+ -+ /* Set bit 0-5 to zero */ -+ mask_hw[0] &= ~GENMASK(5, 0); -+ -+ memcpy(rtw_pattern->mask, mask_hw, sizeof(rtw_pattern->mask)); -+ -+ /* To get the wake up pattern from the mask. -+ * We do not count first 12 bits which means -+ * DA[6] and SA[6] in the pattern to match HW design. -+ */ -+ count = 0; -+ for (i = 12; i < len; i++) { -+ if ((mask[i / 8] >> (i % 8)) & 0x01) { -+ content[count] = pattern[i]; -+ count++; -+ } -+ } -+ -+ rtw_pattern->crc = rtw89_calc_crc(content, count); -+ -+ return 0; -+} -+ -+static int rtw89_wow_parse_patterns(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, -+ struct cfg80211_wowlan *wowlan) -+{ -+ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -+ struct rtw89_wow_cam_info *rtw_pattern = rtw_wow->patterns; -+ int i; -+ int ret; -+ -+ if (!wowlan->n_patterns || !wowlan->patterns) -+ return 0; -+ -+ for (i = 0; i < wowlan->n_patterns; i++) { -+ rtw_pattern = &rtw_wow->patterns[i]; -+ ret = rtw89_wow_pattern_generate(rtwdev, rtwvif, -+ &wowlan->patterns[i], -+ rtw_pattern); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to generate pattern(%d)\n", i); -+ rtw_wow->pattern_cnt = 0; -+ return ret; -+ } -+ -+ rtw_pattern->r_w = true; -+ rtw_pattern->idx = i; -+ rtw_pattern->negative_pattern_match = false; -+ rtw_pattern->skip_mac_hdr = true; -+ rtw_pattern->valid = true; -+ } -+ rtw_wow->pattern_cnt = wowlan->n_patterns; -+ -+ return 0; -+} -+ -+static void rtw89_wow_pattern_clear_cam(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -+ struct rtw89_wow_cam_info *rtw_pattern = rtw_wow->patterns; -+ int i = 0; -+ -+ for (i = 0; i < rtw_wow->pattern_cnt; i++) { -+ rtw_pattern = &rtw_wow->patterns[i]; -+ rtw_pattern->valid = false; -+ rtw89_fw_wow_cam_update(rtwdev, rtw_pattern); -+ } -+} -+ -+static void rtw89_wow_pattern_write(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -+ struct rtw89_wow_cam_info *rtw_pattern = rtw_wow->patterns; -+ int i; -+ -+ for (i = 0; i < rtw_wow->pattern_cnt; i++) -+ rtw89_fw_wow_cam_update(rtwdev, rtw_pattern + i); -+} -+ -+static void rtw89_wow_pattern_clear(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -+ -+ rtw89_wow_pattern_clear_cam(rtwdev); -+ -+ rtw_wow->pattern_cnt = 0; -+ memset(rtw_wow->patterns, 0, sizeof(rtw_wow->patterns)); -+} -+ - static void rtw89_wow_clear_wakeups(struct rtw89_dev *rtwdev) - { - struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -@@ -188,7 +409,8 @@ static int rtw89_wow_set_wakeups(struct - if (!rtw_wow->wow_vif) - return -EPERM; - -- return 0; -+ rtwvif = (struct rtw89_vif *)rtw_wow->wow_vif->drv_priv; -+ return rtw89_wow_parse_patterns(rtwdev, rtwvif, wowlan); - } - - static int rtw89_wow_cfg_wake(struct rtw89_dev *rtwdev, bool wow) -@@ -442,6 +664,8 @@ static int rtw89_wow_fw_start(struct rtw - struct rtw89_vif *rtwvif = (struct rtw89_vif *)rtw_wow->wow_vif->drv_priv; - int ret; - -+ rtw89_wow_pattern_write(rtwdev); -+ - ret = rtw89_fw_h2c_keep_alive(rtwdev, rtwvif, true); - if (ret) { - rtw89_err(rtwdev, "wow: failed to enable keep alive\n"); -@@ -476,6 +700,8 @@ static int rtw89_wow_fw_stop(struct rtw8 - struct rtw89_vif *rtwvif = (struct rtw89_vif *)rtw_wow->wow_vif->drv_priv; - int ret; - -+ rtw89_wow_pattern_clear(rtwdev); -+ - ret = rtw89_fw_h2c_keep_alive(rtwdev, rtwvif, false); - if (ret) { - rtw89_err(rtwdev, "wow: failed to disable keep alive\n"); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-056-wifi-rtw89-8852b-Fix-spelling-mistake-KIP_RESOTRE-KI.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-056-wifi-rtw89-8852b-Fix-spelling-mistake-KIP_RESOTRE-KI.patch deleted file mode 100644 index b6bd100d4..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-056-wifi-rtw89-8852b-Fix-spelling-mistake-KIP_RESOTRE-KI.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 8fa681703175ba0ea283dd564a64edaef3472ee6 Mon Sep 17 00:00:00 2001 -From: Colin Ian King -Date: Thu, 20 Oct 2022 08:26:46 +0100 -Subject: [PATCH 056/149] wifi: rtw89: 8852b: Fix spelling mistake KIP_RESOTRE - -> KIP_RESTORE - -Ther is a spelling mistake in a rtw89_debug message. Fix it. - -Signed-off-by: Colin Ian King -Acked-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221020072646.1513307-1-colin.i.king@gmail.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -@@ -1754,7 +1754,7 @@ static void _dpk_one_shot(struct rtw89_d - id == 0x14 ? "PWR_CAL" : - id == 0x15 ? "DPK_RXAGC" : - id == 0x16 ? "KIP_PRESET" : -- id == 0x17 ? "KIP_RESOTRE" : "DPK_TXAGC", -+ id == 0x17 ? "KIP_RESTORE" : "DPK_TXAGC", - dpk_cmd); - } - diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-057-wifi-rtw89-dump-dispatch-status-via-debug-port.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-057-wifi-rtw89-dump-dispatch-status-via-debug-port.patch deleted file mode 100644 index c802833d3..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-057-wifi-rtw89-dump-dispatch-status-via-debug-port.patch +++ /dev/null @@ -1,704 +0,0 @@ -From d6197c9121dd72f35e5702aa55ee5c1583e0bfdb Mon Sep 17 00:00:00 2001 -From: Chia-Yuan Li -Date: Wed, 2 Nov 2022 09:42:59 +0800 -Subject: [PATCH 057/149] wifi: rtw89: dump dispatch status via debug port - -Dispatch is a component to decide packets forward to host, DMAC or -HAXIDMA. It contains CDT standing for CPU dispatcher, HDT standing -for host dispatcher, WDE standing for descriptor engine and PLE standing -for payload engine. STF is one kind of modes, it can be used if packet -send to hardware and doesn't need release report. - -These debug port information can help to clarify the reason if -packets stuck in dispatch. - -Signed-off-by: Chia-Yuan Li -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221102014300.14091-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/debug.c | 575 +++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/mac.h | 45 ++ - drivers/net/wireless/realtek/rtw89/reg.h | 5 + - 3 files changed, 625 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/debug.c -+++ b/drivers/net/wireless/realtek/rtw89/debug.c -@@ -1121,6 +1121,303 @@ static const struct rtw89_mac_dbg_port_i - .rd_msk = B_AX_PTCL_DBG_INFO_MASK - }; - -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_tx0_5 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0xD, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_tx6 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x5, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_tx7 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x9, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_tx8 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x3, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_tx9_C = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x1, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_txD = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x0, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_tx0 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0xB, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_tx1 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x4, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_tx3 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x8, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_tx4 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x7, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_tx5_8 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x1, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_tx9 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x3, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_txA_C = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x0, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_rx0 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x8, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_rx1_2 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x0, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_rx3 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x6, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_rx4 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x0, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_hdt_rx5 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 2, -+ .sel_msk = B_AX_DISPATCHER_DBG_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x0, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_rx_p0_0 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 1, -+ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x3, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_rx_p0_1 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 1, -+ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x6, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_rx_p0_2 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 1, -+ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x0, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_cdt_rx_p1 = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 1, -+ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, -+ .srt = 0x8, -+ .end = 0xE, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_stf_ctrl = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 1, -+ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x5, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_addr_ctrl = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 1, -+ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x6, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_wde_intf = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 1, -+ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, -+ .srt = 0x0, -+ .end = 0xF, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_ple_intf = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 1, -+ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x9, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ -+static const struct rtw89_mac_dbg_port_info dbg_port_dspt_flow_ctrl = { -+ .sel_addr = R_AX_DISPATCHER_DBG_PORT, -+ .sel_byte = 1, -+ .sel_msk = B_AX_DISPATCHER_CH_SEL_MASK, -+ .srt = 0x0, -+ .end = 0x3, -+ .rd_addr = R_AX_DBG_PORT_SEL, -+ .rd_byte = 4, -+ .rd_msk = B_AX_DEBUG_ST_MASK -+}; -+ - static const struct rtw89_mac_dbg_port_info dbg_port_sch_c0 = { - .sel_addr = R_AX_SCH_DBG_SEL, - .sel_byte = 1, -@@ -1610,6 +1907,7 @@ rtw89_debug_mac_dbg_port_sel(struct seq_ - struct rtw89_dev *rtwdev, u32 sel) - { - const struct rtw89_mac_dbg_port_info *info; -+ u32 index; - u32 val32; - u16 val16; - u8 val8; -@@ -1885,6 +2183,235 @@ rtw89_debug_mac_dbg_port_sel(struct seq_ - info = &dbg_port_pktinfo; - seq_puts(m, "Enable pktinfo dump.\n"); - break; -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX0: -+ rtw89_write32_mask(rtwdev, R_AX_DBG_CTRL, -+ B_AX_DBG_SEL0, 0x80); -+ rtw89_write32_mask(rtwdev, R_AX_SYS_STATUS1, -+ B_AX_SEL_0XC0_MASK, 1); -+ fallthrough; -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX1: -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX2: -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX3: -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX4: -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX5: -+ info = &dbg_port_dspt_hdt_tx0_5; -+ index = sel - RTW89_DBG_PORT_SEL_DSPT_HDT_TX0; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 0); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, index); -+ seq_printf(m, "Enable Dispatcher hdt tx%x dump.\n", index); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX6: -+ info = &dbg_port_dspt_hdt_tx6; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 0); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, 6); -+ seq_puts(m, "Enable Dispatcher hdt tx6 dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX7: -+ info = &dbg_port_dspt_hdt_tx7; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 0); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, 7); -+ seq_puts(m, "Enable Dispatcher hdt tx7 dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX8: -+ info = &dbg_port_dspt_hdt_tx8; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 0); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, 8); -+ seq_puts(m, "Enable Dispatcher hdt tx8 dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_TX9: -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_TXA: -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_TXB: -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_TXC: -+ info = &dbg_port_dspt_hdt_tx9_C; -+ index = sel + 9 - RTW89_DBG_PORT_SEL_DSPT_HDT_TX9; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 0); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, index); -+ seq_printf(m, "Enable Dispatcher hdt tx%x dump.\n", index); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_TXD: -+ info = &dbg_port_dspt_hdt_txD; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 0); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, 0xD); -+ seq_puts(m, "Enable Dispatcher hdt txD dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX0: -+ info = &dbg_port_dspt_cdt_tx0; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 1); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, 0); -+ seq_puts(m, "Enable Dispatcher cdt tx0 dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX1: -+ info = &dbg_port_dspt_cdt_tx1; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 1); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, 1); -+ seq_puts(m, "Enable Dispatcher cdt tx1 dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX3: -+ info = &dbg_port_dspt_cdt_tx3; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 1); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, 3); -+ seq_puts(m, "Enable Dispatcher cdt tx3 dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX4: -+ info = &dbg_port_dspt_cdt_tx4; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 1); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, 4); -+ seq_puts(m, "Enable Dispatcher cdt tx4 dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX5: -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX6: -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX7: -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX8: -+ info = &dbg_port_dspt_cdt_tx5_8; -+ index = sel + 5 - RTW89_DBG_PORT_SEL_DSPT_CDT_TX5; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 1); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, index); -+ seq_printf(m, "Enable Dispatcher cdt tx%x dump.\n", index); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_TX9: -+ info = &dbg_port_dspt_cdt_tx9; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 1); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, 9); -+ seq_puts(m, "Enable Dispatcher cdt tx9 dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_TXA: -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_TXB: -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_TXC: -+ info = &dbg_port_dspt_cdt_txA_C; -+ index = sel + 0xA - RTW89_DBG_PORT_SEL_DSPT_CDT_TXA; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 1); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, index); -+ seq_printf(m, "Enable Dispatcher cdt tx%x dump.\n", index); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_RX0: -+ info = &dbg_port_dspt_hdt_rx0; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 2); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, 0); -+ seq_puts(m, "Enable Dispatcher hdt rx0 dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_RX1: -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_RX2: -+ info = &dbg_port_dspt_hdt_rx1_2; -+ index = sel + 1 - RTW89_DBG_PORT_SEL_DSPT_HDT_RX1; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 2); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, index); -+ seq_printf(m, "Enable Dispatcher hdt rx%x dump.\n", index); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_RX3: -+ info = &dbg_port_dspt_hdt_rx3; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 2); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, 3); -+ seq_puts(m, "Enable Dispatcher hdt rx3 dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_RX4: -+ info = &dbg_port_dspt_hdt_rx4; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 2); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, 4); -+ seq_puts(m, "Enable Dispatcher hdt rx4 dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_HDT_RX5: -+ info = &dbg_port_dspt_hdt_rx5; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 2); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, 5); -+ seq_puts(m, "Enable Dispatcher hdt rx5 dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P0_0: -+ info = &dbg_port_dspt_cdt_rx_p0_0; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 3); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, 0); -+ seq_puts(m, "Enable Dispatcher cdt rx part0 0 dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P0: -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P0_1: -+ info = &dbg_port_dspt_cdt_rx_p0_1; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 3); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, 1); -+ seq_puts(m, "Enable Dispatcher cdt rx part0 1 dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P0_2: -+ info = &dbg_port_dspt_cdt_rx_p0_2; -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 3); -+ rtw89_write16_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_CH_SEL_MASK, 2); -+ seq_puts(m, "Enable Dispatcher cdt rx part0 2 dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P1: -+ info = &dbg_port_dspt_cdt_rx_p1; -+ rtw89_write8_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 3); -+ seq_puts(m, "Enable Dispatcher cdt rx part1 dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_STF_CTRL: -+ info = &dbg_port_dspt_stf_ctrl; -+ rtw89_write8_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 4); -+ seq_puts(m, "Enable Dispatcher stf control dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_ADDR_CTRL: -+ info = &dbg_port_dspt_addr_ctrl; -+ rtw89_write8_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 5); -+ seq_puts(m, "Enable Dispatcher addr control dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_WDE_INTF: -+ info = &dbg_port_dspt_wde_intf; -+ rtw89_write8_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 6); -+ seq_puts(m, "Enable Dispatcher wde interface dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_PLE_INTF: -+ info = &dbg_port_dspt_ple_intf; -+ rtw89_write8_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 7); -+ seq_puts(m, "Enable Dispatcher ple interface dump.\n"); -+ break; -+ case RTW89_DBG_PORT_SEL_DSPT_FLOW_CTRL: -+ info = &dbg_port_dspt_flow_ctrl; -+ rtw89_write8_mask(rtwdev, info->sel_addr, -+ B_AX_DISPATCHER_INTN_SEL_MASK, 8); -+ seq_puts(m, "Enable Dispatcher flow control dump.\n"); -+ break; - case RTW89_DBG_PORT_SEL_PCIE_TXDMA: - info = &dbg_port_pcie_txdma; - val32 = rtw89_read32(rtwdev, R_AX_DBG_CTRL); -@@ -1963,6 +2490,10 @@ static bool is_dbg_port_valid(struct rtw - sel >= RTW89_DBG_PORT_SEL_WDE_BUFMGN_FREEPG && - sel <= RTW89_DBG_PORT_SEL_PKTINFO) - return false; -+ if (rtw89_mac_check_mac_en(rtwdev, 0, RTW89_DMAC_SEL) && -+ sel >= RTW89_DBG_PORT_SEL_DSPT_HDT_TX0 && -+ sel <= RTW89_DBG_PORT_SEL_DSPT_FLOW_CTRL) -+ return false; - if (rtw89_mac_check_mac_en(rtwdev, 0, RTW89_CMAC_SEL) && - sel >= RTW89_DBG_PORT_SEL_PTCL_C0 && - sel <= RTW89_DBG_PORT_SEL_TXTF_INFOH_C0) -@@ -2033,6 +2564,50 @@ static int rtw89_debug_mac_dbg_port_dump - case_DBG_SEL(PLE_QUEMGN_QLNKTBL); - case_DBG_SEL(PLE_QUEMGN_QEMPTY); - case_DBG_SEL(PKTINFO); -+ case_DBG_SEL(DSPT_HDT_TX0); -+ case_DBG_SEL(DSPT_HDT_TX1); -+ case_DBG_SEL(DSPT_HDT_TX2); -+ case_DBG_SEL(DSPT_HDT_TX3); -+ case_DBG_SEL(DSPT_HDT_TX4); -+ case_DBG_SEL(DSPT_HDT_TX5); -+ case_DBG_SEL(DSPT_HDT_TX6); -+ case_DBG_SEL(DSPT_HDT_TX7); -+ case_DBG_SEL(DSPT_HDT_TX8); -+ case_DBG_SEL(DSPT_HDT_TX9); -+ case_DBG_SEL(DSPT_HDT_TXA); -+ case_DBG_SEL(DSPT_HDT_TXB); -+ case_DBG_SEL(DSPT_HDT_TXC); -+ case_DBG_SEL(DSPT_HDT_TXD); -+ case_DBG_SEL(DSPT_HDT_TXE); -+ case_DBG_SEL(DSPT_HDT_TXF); -+ case_DBG_SEL(DSPT_CDT_TX0); -+ case_DBG_SEL(DSPT_CDT_TX1); -+ case_DBG_SEL(DSPT_CDT_TX3); -+ case_DBG_SEL(DSPT_CDT_TX4); -+ case_DBG_SEL(DSPT_CDT_TX5); -+ case_DBG_SEL(DSPT_CDT_TX6); -+ case_DBG_SEL(DSPT_CDT_TX7); -+ case_DBG_SEL(DSPT_CDT_TX8); -+ case_DBG_SEL(DSPT_CDT_TX9); -+ case_DBG_SEL(DSPT_CDT_TXA); -+ case_DBG_SEL(DSPT_CDT_TXB); -+ case_DBG_SEL(DSPT_CDT_TXC); -+ case_DBG_SEL(DSPT_HDT_RX0); -+ case_DBG_SEL(DSPT_HDT_RX1); -+ case_DBG_SEL(DSPT_HDT_RX2); -+ case_DBG_SEL(DSPT_HDT_RX3); -+ case_DBG_SEL(DSPT_HDT_RX4); -+ case_DBG_SEL(DSPT_HDT_RX5); -+ case_DBG_SEL(DSPT_CDT_RX_P0); -+ case_DBG_SEL(DSPT_CDT_RX_P0_0); -+ case_DBG_SEL(DSPT_CDT_RX_P0_1); -+ case_DBG_SEL(DSPT_CDT_RX_P0_2); -+ case_DBG_SEL(DSPT_CDT_RX_P1); -+ case_DBG_SEL(DSPT_STF_CTRL); -+ case_DBG_SEL(DSPT_ADDR_CTRL); -+ case_DBG_SEL(DSPT_WDE_INTF); -+ case_DBG_SEL(DSPT_PLE_INTF); -+ case_DBG_SEL(DSPT_FLOW_CTRL); - case_DBG_SEL(PCIE_TXDMA); - case_DBG_SEL(PCIE_RXDMA); - case_DBG_SEL(PCIE_CVT); ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -211,6 +211,51 @@ enum rtw89_mac_dbg_port_sel { - RTW89_DBG_PORT_SEL_PLE_QUEMGN_QLNKTBL, - RTW89_DBG_PORT_SEL_PLE_QUEMGN_QEMPTY, - RTW89_DBG_PORT_SEL_PKTINFO, -+ /* DISPATCHER related */ -+ RTW89_DBG_PORT_SEL_DSPT_HDT_TX0, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_TX1, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_TX2, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_TX3, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_TX4, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_TX5, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_TX6, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_TX7, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_TX8, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_TX9, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_TXA, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_TXB, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_TXC, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_TXD, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_TXE, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_TXF, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_TX0, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_TX1, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_TX3, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_TX4, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_TX5, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_TX6, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_TX7, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_TX8, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_TX9, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_TXA, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_TXB, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_TXC, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_RX0, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_RX1, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_RX2, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_RX3, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_RX4, -+ RTW89_DBG_PORT_SEL_DSPT_HDT_RX5, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P0, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P0_0, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P0_1, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P0_2, -+ RTW89_DBG_PORT_SEL_DSPT_CDT_RX_P1, -+ RTW89_DBG_PORT_SEL_DSPT_STF_CTRL, -+ RTW89_DBG_PORT_SEL_DSPT_ADDR_CTRL, -+ RTW89_DBG_PORT_SEL_DSPT_WDE_INTF, -+ RTW89_DBG_PORT_SEL_DSPT_PLE_INTF, -+ RTW89_DBG_PORT_SEL_DSPT_FLOW_CTRL, - /* PCIE related */ - RTW89_DBG_PORT_SEL_PCIE_TXDMA, - RTW89_DBG_PORT_SEL_PCIE_RXDMA, ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -952,6 +952,11 @@ - B_AX_STF_OQT_OVERFLOW_ERR_INT_EN | \ - B_AX_STF_OQT_UNDERFLOW_ERR_INT_EN) - -+#define R_AX_DISPATCHER_DBG_PORT 0x8860 -+#define B_AX_DISPATCHER_DBG_SEL_MASK GENMASK(11, 8) -+#define B_AX_DISPATCHER_INTN_SEL_MASK GENMASK(7, 4) -+#define B_AX_DISPATCHER_CH_SEL_MASK GENMASK(3, 0) -+ - #define R_AX_RX_FUNCTION_STOP 0x8920 - #define B_AX_HDR_RX_STOP BIT(0) - diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-058-wifi-rtw89-update-D-MAC-and-C-MAC-dump-to-diagnose-S.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-058-wifi-rtw89-update-D-MAC-and-C-MAC-dump-to-diagnose-S.patch deleted file mode 100644 index 9d64de7f7..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-058-wifi-rtw89-update-D-MAC-and-C-MAC-dump-to-diagnose-S.patch +++ /dev/null @@ -1,1375 +0,0 @@ -From f7333fc2135b96dc36965a8e711a9275432256df Mon Sep 17 00:00:00 2001 -From: Chia-Yuan Li -Date: Wed, 2 Nov 2022 09:43:00 +0800 -Subject: [PATCH 058/149] wifi: rtw89: update D-MAC and C-MAC dump to diagnose - SER - -To detect TX or RX stuck, we implement SER (system error recovery) in -firmware to recover abnormal states of hardware, and report events to -driver. This kind of events could happen rarely per day. - -SER might be true-positive or false-negative cases, and it could be failed -to recover true-positive case. We dump related registers to kernel message -at that moment and collect them from users, because they occur rarely, -randomly and hard to make sure we reproduce the same symptom. To address -problems accurately, add more registers by this patch. - -It also might be false-positive cases that looks like TX or RX get stuck, -we need to dump registers from debugfs manually, so also add similar -things to debugfs as well. - -Signed-off-by: Chia-Yuan Li -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221102014300.14091-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/debug.c | 426 ++++++++++++++++----- - drivers/net/wireless/realtek/rtw89/mac.c | 374 +++++++++++++----- - drivers/net/wireless/realtek/rtw89/mac.h | 1 + - drivers/net/wireless/realtek/rtw89/pci.h | 12 + - drivers/net/wireless/realtek/rtw89/reg.h | 229 ++++++++++- - 5 files changed, 845 insertions(+), 197 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/debug.c -+++ b/drivers/net/wireless/realtek/rtw89/debug.c -@@ -8,6 +8,7 @@ - #include "debug.h" - #include "fw.h" - #include "mac.h" -+#include "pci.h" - #include "ps.h" - #include "reg.h" - #include "sar.h" -@@ -995,7 +996,9 @@ static int rtw89_debug_mac_dump_dle_dbg( - static int rtw89_debug_mac_dump_dmac_dbg(struct rtw89_dev *rtwdev, - struct seq_file *m) - { -- int ret; -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ u32 dmac_err; -+ int i, ret; - - ret = rtw89_mac_check_mac_en(rtwdev, 0, RTW89_DMAC_SEL); - if (ret) { -@@ -1003,98 +1006,347 @@ static int rtw89_debug_mac_dump_dmac_dbg - return ret; - } - -- seq_printf(m, "R_AX_DMAC_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_DMAC_ERR_ISR)); -- seq_printf(m, "[0]R_AX_WDRLS_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_WDRLS_ERR_ISR)); -- seq_printf(m, "[1]R_AX_SEC_ERR_IMR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_SEC_ERR_IMR_ISR)); -- seq_printf(m, "[2.1]R_AX_MPDU_TX_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_MPDU_TX_ERR_ISR)); -- seq_printf(m, "[2.2]R_AX_MPDU_RX_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_MPDU_RX_ERR_ISR)); -- seq_printf(m, "[3]R_AX_STA_SCHEDULER_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_STA_SCHEDULER_ERR_ISR)); -- seq_printf(m, "[4]R_AX_WDE_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_WDE_ERR_ISR)); -- seq_printf(m, "[5.1]R_AX_TXPKTCTL_ERR_IMR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR)); -- seq_printf(m, "[5.2]R_AX_TXPKTCTL_ERR_IMR_ISR_B1=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR_B1)); -- seq_printf(m, "[6]R_AX_PLE_ERR_FLAG_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_ISR)); -- seq_printf(m, "[7]R_AX_PKTIN_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_PKTIN_ERR_ISR)); -- seq_printf(m, "[8.1]R_AX_OTHER_DISPATCHER_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_OTHER_DISPATCHER_ERR_ISR)); -- seq_printf(m, "[8.2]R_AX_HOST_DISPATCHER_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_HOST_DISPATCHER_ERR_ISR)); -- seq_printf(m, "[8.3]R_AX_CPU_DISPATCHER_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_CPU_DISPATCHER_ERR_ISR)); -- seq_printf(m, "[10]R_AX_CPUIO_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_CPUIO_ERR_ISR)); -- seq_printf(m, "[11.1]R_AX_BBRPT_COM_ERR_IMR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_IMR_ISR)); -- seq_printf(m, "[11.2]R_AX_BBRPT_CHINFO_ERR_IMR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_IMR_ISR)); -- seq_printf(m, "[11.3]R_AX_BBRPT_DFS_ERR_IMR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_IMR_ISR)); -- seq_printf(m, "[11.4]R_AX_LA_ERRFLAG=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_LA_ERRFLAG)); -+ dmac_err = rtw89_read32(rtwdev, R_AX_DMAC_ERR_ISR); -+ seq_printf(m, "R_AX_DMAC_ERR_ISR=0x%08x\n", dmac_err); -+ seq_printf(m, "R_AX_DMAC_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_DMAC_ERR_IMR)); -+ -+ if (dmac_err) { -+ seq_printf(m, "R_AX_WDE_ERR_FLAG_CFG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WDE_ERR_FLAG_CFG_NUM1)); -+ seq_printf(m, "R_AX_PLE_ERR_FLAG_CFG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_CFG_NUM1)); -+ if (chip->chip_id == RTL8852C) { -+ seq_printf(m, "R_AX_PLE_ERRFLAG_MSG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_ERRFLAG_MSG)); -+ seq_printf(m, "R_AX_WDE_ERRFLAG_MSG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WDE_ERRFLAG_MSG)); -+ seq_printf(m, "R_AX_PLE_DBGERR_LOCKEN=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_DBGERR_LOCKEN)); -+ seq_printf(m, "R_AX_PLE_DBGERR_STS=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_DBGERR_STS)); -+ } -+ } -+ -+ if (dmac_err & B_AX_WDRLS_ERR_FLAG) { -+ seq_printf(m, "R_AX_WDRLS_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WDRLS_ERR_IMR)); -+ seq_printf(m, "R_AX_WDRLS_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WDRLS_ERR_ISR)); -+ if (chip->chip_id == RTL8852C) -+ seq_printf(m, "R_AX_RPQ_RXBD_IDX=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RPQ_RXBD_IDX_V1)); -+ else -+ seq_printf(m, "R_AX_RPQ_RXBD_IDX=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RPQ_RXBD_IDX)); -+ } -+ -+ if (dmac_err & B_AX_WSEC_ERR_FLAG) { -+ if (chip->chip_id == RTL8852C) { -+ seq_printf(m, "R_AX_SEC_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_ERROR_FLAG_IMR)); -+ seq_printf(m, "R_AX_SEC_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_ERROR_FLAG)); -+ seq_printf(m, "R_AX_SEC_ENG_CTRL=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_ENG_CTRL)); -+ seq_printf(m, "R_AX_SEC_MPDU_PROC=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_MPDU_PROC)); -+ seq_printf(m, "R_AX_SEC_CAM_ACCESS=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_CAM_ACCESS)); -+ seq_printf(m, "R_AX_SEC_CAM_RDATA=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_CAM_RDATA)); -+ seq_printf(m, "R_AX_SEC_DEBUG1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_DEBUG1)); -+ seq_printf(m, "R_AX_SEC_TX_DEBUG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_TX_DEBUG)); -+ seq_printf(m, "R_AX_SEC_RX_DEBUG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_RX_DEBUG)); -+ -+ rtw89_write32_mask(rtwdev, R_AX_DBG_CTRL, -+ B_AX_DBG_SEL0, 0x8B); -+ rtw89_write32_mask(rtwdev, R_AX_DBG_CTRL, -+ B_AX_DBG_SEL1, 0x8B); -+ rtw89_write32_mask(rtwdev, R_AX_SYS_STATUS1, -+ B_AX_SEL_0XC0_MASK, 1); -+ for (i = 0; i < 0x10; i++) { -+ rtw89_write32_mask(rtwdev, R_AX_SEC_ENG_CTRL, -+ B_AX_SEC_DBG_PORT_FIELD_MASK, i); -+ seq_printf(m, "sel=%x,R_AX_SEC_DEBUG2=0x%08x\n", -+ i, rtw89_read32(rtwdev, R_AX_SEC_DEBUG2)); -+ } -+ } else { -+ seq_printf(m, "R_AX_SEC_ERR_IMR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_DEBUG)); -+ seq_printf(m, "R_AX_SEC_ENG_CTRL=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_ENG_CTRL)); -+ seq_printf(m, "R_AX_SEC_MPDU_PROC=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_MPDU_PROC)); -+ seq_printf(m, "R_AX_SEC_CAM_ACCESS=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_CAM_ACCESS)); -+ seq_printf(m, "R_AX_SEC_CAM_RDATA=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_CAM_RDATA)); -+ seq_printf(m, "R_AX_SEC_CAM_WDATA=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_CAM_WDATA)); -+ seq_printf(m, "R_AX_SEC_TX_DEBUG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_TX_DEBUG)); -+ seq_printf(m, "R_AX_SEC_RX_DEBUG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_RX_DEBUG)); -+ seq_printf(m, "R_AX_SEC_TRX_PKT_CNT=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_TRX_PKT_CNT)); -+ seq_printf(m, "R_AX_SEC_TRX_BLK_CNT=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_TRX_BLK_CNT)); -+ } -+ } -+ -+ if (dmac_err & B_AX_MPDU_ERR_FLAG) { -+ seq_printf(m, "R_AX_MPDU_TX_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_MPDU_TX_ERR_IMR)); -+ seq_printf(m, "R_AX_MPDU_TX_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_MPDU_TX_ERR_ISR)); -+ seq_printf(m, "R_AX_MPDU_RX_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_MPDU_RX_ERR_IMR)); -+ seq_printf(m, "R_AX_MPDU_RX_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_MPDU_RX_ERR_ISR)); -+ } -+ -+ if (dmac_err & B_AX_STA_SCHEDULER_ERR_FLAG) { -+ seq_printf(m, "R_AX_STA_SCHEDULER_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_STA_SCHEDULER_ERR_IMR)); -+ seq_printf(m, "R_AX_STA_SCHEDULER_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_STA_SCHEDULER_ERR_ISR)); -+ } -+ -+ if (dmac_err & B_AX_WDE_DLE_ERR_FLAG) { -+ seq_printf(m, "R_AX_WDE_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WDE_ERR_IMR)); -+ seq_printf(m, "R_AX_WDE_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WDE_ERR_ISR)); -+ seq_printf(m, "R_AX_PLE_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_ERR_IMR)); -+ seq_printf(m, "R_AX_PLE_ERR_FLAG_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_ISR)); -+ } -+ -+ if (dmac_err & B_AX_TXPKTCTRL_ERR_FLAG) { -+ if (chip->chip_id == RTL8852C) { -+ seq_printf(m, "R_AX_TXPKTCTL_B0_ERRFLAG_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPKTCTL_B0_ERRFLAG_IMR)); -+ seq_printf(m, "R_AX_TXPKTCTL_B0_ERRFLAG_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPKTCTL_B0_ERRFLAG_ISR)); -+ seq_printf(m, "R_AX_TXPKTCTL_B1_ERRFLAG_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPKTCTL_B1_ERRFLAG_IMR)); -+ seq_printf(m, "R_AX_TXPKTCTL_B1_ERRFLAG_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPKTCTL_B1_ERRFLAG_ISR)); -+ } else { -+ seq_printf(m, "R_AX_TXPKTCTL_ERR_IMR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR)); -+ seq_printf(m, "R_AX_TXPKTCTL_ERR_IMR_ISR_B1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR_B1)); -+ } -+ } -+ -+ if (dmac_err & B_AX_PLE_DLE_ERR_FLAG) { -+ seq_printf(m, "R_AX_WDE_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WDE_ERR_IMR)); -+ seq_printf(m, "R_AX_WDE_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WDE_ERR_ISR)); -+ seq_printf(m, "R_AX_PLE_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_ERR_IMR)); -+ seq_printf(m, "R_AX_PLE_ERR_FLAG_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_ISR)); -+ seq_printf(m, "R_AX_WD_CPUQ_OP_0=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WD_CPUQ_OP_0)); -+ seq_printf(m, "R_AX_WD_CPUQ_OP_1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WD_CPUQ_OP_1)); -+ seq_printf(m, "R_AX_WD_CPUQ_OP_2=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WD_CPUQ_OP_2)); -+ seq_printf(m, "R_AX_WD_CPUQ_OP_STATUS=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WD_CPUQ_OP_STATUS)); -+ seq_printf(m, "R_AX_PL_CPUQ_OP_0=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PL_CPUQ_OP_0)); -+ seq_printf(m, "R_AX_PL_CPUQ_OP_1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PL_CPUQ_OP_1)); -+ seq_printf(m, "R_AX_PL_CPUQ_OP_2=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PL_CPUQ_OP_2)); -+ seq_printf(m, "R_AX_PL_CPUQ_OP_STATUS=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PL_CPUQ_OP_STATUS)); -+ if (chip->chip_id == RTL8852C) { -+ seq_printf(m, "R_AX_RX_CTRL0=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RX_CTRL0)); -+ seq_printf(m, "R_AX_RX_CTRL1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RX_CTRL1)); -+ seq_printf(m, "R_AX_RX_CTRL2=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RX_CTRL2)); -+ } else { -+ seq_printf(m, "R_AX_RXDMA_PKT_INFO_0=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_0)); -+ seq_printf(m, "R_AX_RXDMA_PKT_INFO_1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_1)); -+ seq_printf(m, "R_AX_RXDMA_PKT_INFO_2=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_2)); -+ } -+ } -+ -+ if (dmac_err & B_AX_PKTIN_ERR_FLAG) { -+ seq_printf(m, "R_AX_PKTIN_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PKTIN_ERR_IMR)); -+ seq_printf(m, "R_AX_PKTIN_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PKTIN_ERR_ISR)); -+ } -+ -+ if (dmac_err & B_AX_DISPATCH_ERR_FLAG) { -+ seq_printf(m, "R_AX_HOST_DISPATCHER_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_HOST_DISPATCHER_ERR_IMR)); -+ seq_printf(m, "R_AX_HOST_DISPATCHER_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_HOST_DISPATCHER_ERR_ISR)); -+ seq_printf(m, "R_AX_CPU_DISPATCHER_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_CPU_DISPATCHER_ERR_IMR)); -+ seq_printf(m, "R_AX_CPU_DISPATCHER_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_CPU_DISPATCHER_ERR_ISR)); -+ seq_printf(m, "R_AX_OTHER_DISPATCHER_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_OTHER_DISPATCHER_ERR_IMR)); -+ seq_printf(m, "R_AX_OTHER_DISPATCHER_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_OTHER_DISPATCHER_ERR_ISR)); -+ } -+ -+ if (dmac_err & B_AX_BBRPT_ERR_FLAG) { -+ if (chip->chip_id == RTL8852C) { -+ seq_printf(m, "R_AX_BBRPT_COM_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_IMR)); -+ seq_printf(m, "R_AX_BBRPT_COM_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_ISR)); -+ seq_printf(m, "R_AX_BBRPT_CHINFO_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_ISR)); -+ seq_printf(m, "R_AX_BBRPT_CHINFO_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_IMR)); -+ seq_printf(m, "R_AX_BBRPT_DFS_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_IMR)); -+ seq_printf(m, "R_AX_BBRPT_DFS_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_ISR)); -+ } else { -+ seq_printf(m, "R_AX_BBRPT_COM_ERR_IMR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_IMR_ISR)); -+ seq_printf(m, "R_AX_BBRPT_CHINFO_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_ISR)); -+ seq_printf(m, "R_AX_BBRPT_CHINFO_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_IMR)); -+ seq_printf(m, "R_AX_BBRPT_DFS_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_IMR)); -+ seq_printf(m, "R_AX_BBRPT_DFS_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_ISR)); -+ } -+ } -+ -+ if (dmac_err & B_AX_HAXIDMA_ERR_FLAG && chip->chip_id == RTL8852C) { -+ seq_printf(m, "R_AX_HAXIDMA_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_HAXI_IDCT_MSK)); -+ seq_printf(m, "R_AX_HAXIDMA_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_HAXI_IDCT)); -+ } - - return 0; - } - --static int rtw89_debug_mac_dump_cmac_dbg(struct rtw89_dev *rtwdev, -- struct seq_file *m) -+static int rtw89_debug_mac_dump_cmac_err(struct rtw89_dev *rtwdev, -+ struct seq_file *m, -+ enum rtw89_mac_idx band) - { -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ u32 offset = 0; -+ u32 cmac_err; - int ret; - -- ret = rtw89_mac_check_mac_en(rtwdev, 0, RTW89_CMAC_SEL); -+ ret = rtw89_mac_check_mac_en(rtwdev, band, RTW89_CMAC_SEL); - if (ret) { -- seq_puts(m, "[CMAC] : CMAC 0 not enabled\n"); -+ if (band) -+ seq_puts(m, "[CMAC] : CMAC1 not enabled\n"); -+ else -+ seq_puts(m, "[CMAC] : CMAC0 not enabled\n"); - return ret; - } - -- seq_printf(m, "R_AX_CMAC_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR)); -- seq_printf(m, "[0]R_AX_SCHEDULE_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_ISR)); -- seq_printf(m, "[1]R_AX_PTCL_ISR0=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_PTCL_ISR0)); -- seq_printf(m, "[3]R_AX_DLE_CTRL=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_DLE_CTRL)); -- seq_printf(m, "[4]R_AX_PHYINFO_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_ISR)); -- seq_printf(m, "[5]R_AX_TXPWR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_TXPWR_ISR)); -- seq_printf(m, "[6]R_AX_RMAC_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_RMAC_ERR_ISR)); -- seq_printf(m, "[7]R_AX_TMAC_ERR_IMR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_TMAC_ERR_IMR_ISR)); -+ if (band) -+ offset = RTW89_MAC_AX_BAND_REG_OFFSET; - -- ret = rtw89_mac_check_mac_en(rtwdev, 1, RTW89_CMAC_SEL); -- if (ret) { -- seq_puts(m, "[CMAC] : CMAC 1 not enabled\n"); -- return ret; -+ cmac_err = rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR + offset); -+ seq_printf(m, "R_AX_CMAC_ERR_ISR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR + offset)); -+ seq_printf(m, "R_AX_CMAC_FUNC_EN [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_CMAC_FUNC_EN + offset)); -+ seq_printf(m, "R_AX_CK_EN [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_CK_EN + offset)); -+ -+ if (cmac_err & B_AX_SCHEDULE_TOP_ERR_IND) { -+ seq_printf(m, "R_AX_SCHEDULE_ERR_IMR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_IMR + offset)); -+ seq_printf(m, "R_AX_SCHEDULE_ERR_ISR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_ISR + offset)); -+ } -+ -+ if (cmac_err & B_AX_PTCL_TOP_ERR_IND) { -+ seq_printf(m, "R_AX_PTCL_IMR0 [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_PTCL_IMR0 + offset)); -+ seq_printf(m, "R_AX_PTCL_ISR0 [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_PTCL_ISR0 + offset)); -+ } -+ -+ if (cmac_err & B_AX_DMA_TOP_ERR_IND) { -+ if (chip->chip_id == RTL8852C) { -+ seq_printf(m, "R_AX_RX_ERR_FLAG [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_RX_ERR_FLAG + offset)); -+ seq_printf(m, "R_AX_RX_ERR_FLAG_IMR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_RX_ERR_FLAG_IMR + offset)); -+ } else { -+ seq_printf(m, "R_AX_DLE_CTRL [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_DLE_CTRL + offset)); -+ } - } - -- seq_printf(m, "R_AX_CMAC_ERR_ISR_C1=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR_C1)); -- seq_printf(m, "[0]R_AX_SCHEDULE_ERR_ISR_C1=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_ISR_C1)); -- seq_printf(m, "[1]R_AX_PTCL_ISR0_C1=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_PTCL_ISR0_C1)); -- seq_printf(m, "[3]R_AX_DLE_CTRL_C1=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_DLE_CTRL_C1)); -- seq_printf(m, "[4]R_AX_PHYINFO_ERR_ISR_C1=0x%02x\n", -- rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_ISR_C1)); -- seq_printf(m, "[5]R_AX_TXPWR_ISR_C1=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_TXPWR_ISR_C1)); -- seq_printf(m, "[6]R_AX_RMAC_ERR_ISR_C1=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_RMAC_ERR_ISR_C1)); -- seq_printf(m, "[7]R_AX_TMAC_ERR_IMR_ISR_C1=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_TMAC_ERR_IMR_ISR_C1)); -+ if (cmac_err & B_AX_DMA_TOP_ERR_IND || cmac_err & B_AX_WMAC_RX_ERR_IND) { -+ if (chip->chip_id == RTL8852C) { -+ seq_printf(m, "R_AX_PHYINFO_ERR_ISR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_ISR + offset)); -+ seq_printf(m, "R_AX_PHYINFO_ERR_IMR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_IMR + offset)); -+ } else { -+ seq_printf(m, "R_AX_PHYINFO_ERR_IMR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_IMR + offset)); -+ } -+ } -+ -+ if (cmac_err & B_AX_TXPWR_CTRL_ERR_IND) { -+ seq_printf(m, "R_AX_TXPWR_IMR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_TXPWR_IMR + offset)); -+ seq_printf(m, "R_AX_TXPWR_ISR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_TXPWR_ISR + offset)); -+ } -+ -+ if (cmac_err & B_AX_WMAC_TX_ERR_IND) { -+ if (chip->chip_id == RTL8852C) { -+ seq_printf(m, "R_AX_TRXPTCL_ERROR_INDICA [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_TRXPTCL_ERROR_INDICA + offset)); -+ seq_printf(m, "R_AX_TRXPTCL_ERROR_INDICA_MASK [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_TRXPTCL_ERROR_INDICA_MASK + offset)); -+ } else { -+ seq_printf(m, "R_AX_TMAC_ERR_IMR_ISR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_TMAC_ERR_IMR_ISR + offset)); -+ } -+ seq_printf(m, "R_AX_DBGSEL_TRXPTCL [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_DBGSEL_TRXPTCL + offset)); -+ } -+ -+ seq_printf(m, "R_AX_CMAC_ERR_IMR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_CMAC_ERR_IMR + offset)); -+ -+ return 0; -+} -+ -+static int rtw89_debug_mac_dump_cmac_dbg(struct rtw89_dev *rtwdev, -+ struct seq_file *m) -+{ -+ rtw89_debug_mac_dump_cmac_err(rtwdev, m, RTW89_MAC_0); -+ if (rtwdev->dbcc_en) -+ rtw89_debug_mac_dump_cmac_err(rtwdev, m, RTW89_MAC_1); - - return 0; - } -@@ -1828,7 +2080,7 @@ static const struct rtw89_mac_dbg_port_i - static const struct rtw89_mac_dbg_port_info dbg_port_pcie_txdma = { - .sel_addr = R_AX_PCIE_DBG_CTRL, - .sel_byte = 2, -- .sel_msk = B_AX_DBG_SEL_MASK, -+ .sel_msk = B_AX_PCIE_DBG_SEL_MASK, - .srt = 0x00, - .end = 0x03, - .rd_addr = R_AX_DBG_PORT_SEL, -@@ -1839,7 +2091,7 @@ static const struct rtw89_mac_dbg_port_i - static const struct rtw89_mac_dbg_port_info dbg_port_pcie_rxdma = { - .sel_addr = R_AX_PCIE_DBG_CTRL, - .sel_byte = 2, -- .sel_msk = B_AX_DBG_SEL_MASK, -+ .sel_msk = B_AX_PCIE_DBG_SEL_MASK, - .srt = 0x00, - .end = 0x04, - .rd_addr = R_AX_DBG_PORT_SEL, -@@ -1850,7 +2102,7 @@ static const struct rtw89_mac_dbg_port_i - static const struct rtw89_mac_dbg_port_info dbg_port_pcie_cvt = { - .sel_addr = R_AX_PCIE_DBG_CTRL, - .sel_byte = 2, -- .sel_msk = B_AX_DBG_SEL_MASK, -+ .sel_msk = B_AX_PCIE_DBG_SEL_MASK, - .srt = 0x00, - .end = 0x01, - .rd_addr = R_AX_DBG_PORT_SEL, -@@ -1861,7 +2113,7 @@ static const struct rtw89_mac_dbg_port_i - static const struct rtw89_mac_dbg_port_info dbg_port_pcie_cxpl = { - .sel_addr = R_AX_PCIE_DBG_CTRL, - .sel_byte = 2, -- .sel_msk = B_AX_DBG_SEL_MASK, -+ .sel_msk = B_AX_PCIE_DBG_SEL_MASK, - .srt = 0x00, - .end = 0x05, - .rd_addr = R_AX_DBG_PORT_SEL, -@@ -1872,7 +2124,7 @@ static const struct rtw89_mac_dbg_port_i - static const struct rtw89_mac_dbg_port_info dbg_port_pcie_io = { - .sel_addr = R_AX_PCIE_DBG_CTRL, - .sel_byte = 2, -- .sel_msk = B_AX_DBG_SEL_MASK, -+ .sel_msk = B_AX_PCIE_DBG_SEL_MASK, - .srt = 0x00, - .end = 0x05, - .rd_addr = R_AX_DBG_PORT_SEL, -@@ -1883,7 +2135,7 @@ static const struct rtw89_mac_dbg_port_i - static const struct rtw89_mac_dbg_port_info dbg_port_pcie_misc = { - .sel_addr = R_AX_PCIE_DBG_CTRL, - .sel_byte = 2, -- .sel_msk = B_AX_DBG_SEL_MASK, -+ .sel_msk = B_AX_PCIE_DBG_SEL_MASK, - .srt = 0x00, - .end = 0x06, - .rd_addr = R_AX_DBG_PORT_SEL, -@@ -2464,7 +2716,7 @@ rtw89_debug_mac_dbg_port_sel(struct seq_ - info = &dbg_port_pcie_misc2; - val16 = rtw89_read16(rtwdev, R_AX_PCIE_DBG_CTRL); - val16 = u16_replace_bits(val16, PCIE_MISC2_DBG_SEL, -- B_AX_DBG_SEL_MASK); -+ B_AX_PCIE_DBG_SEL_MASK); - rtw89_write16(rtwdev, R_AX_PCIE_DBG_CTRL, val16); - seq_puts(m, "Enable pcie misc2 dump.\n"); - break; ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -7,6 +7,7 @@ - #include "debug.h" - #include "fw.h" - #include "mac.h" -+#include "pci.h" - #include "ps.h" - #include "reg.h" - #include "util.h" -@@ -274,106 +275,163 @@ static void rtw89_mac_dump_l0_to_l1(stru - } - } - --static void rtw89_mac_dump_err_status(struct rtw89_dev *rtwdev, -- enum mac_ax_err_info err) -+static void rtw89_mac_dump_dmac_err_status(struct rtw89_dev *rtwdev) - { -- u32 dmac_err, cmac_err; -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ u32 dmac_err; -+ int i, ret; - -- if (err != MAC_AX_ERR_L1_ERR_DMAC && -- err != MAC_AX_ERR_L0_PROMOTE_TO_L1 && -- err != MAC_AX_ERR_L0_ERR_CMAC0 && -- err != MAC_AX_ERR_L0_ERR_CMAC1) -+ ret = rtw89_mac_check_mac_en(rtwdev, 0, RTW89_DMAC_SEL); -+ if (ret) { -+ rtw89_warn(rtwdev, "[DMAC] : DMAC not enabled\n"); - return; -+ } - -- rtw89_info(rtwdev, "--->\nerr=0x%x\n", err); -- rtw89_info(rtwdev, "R_AX_SER_DBG_INFO =0x%08x\n", -- rtw89_read32(rtwdev, R_AX_SER_DBG_INFO)); -- -- cmac_err = rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR); -- rtw89_info(rtwdev, "R_AX_CMAC_ERR_ISR =0x%08x\n", cmac_err); - dmac_err = rtw89_read32(rtwdev, R_AX_DMAC_ERR_ISR); -- rtw89_info(rtwdev, "R_AX_DMAC_ERR_ISR =0x%08x\n", dmac_err); -+ rtw89_info(rtwdev, "R_AX_DMAC_ERR_ISR=0x%08x\n", dmac_err); -+ rtw89_info(rtwdev, "R_AX_DMAC_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_DMAC_ERR_IMR)); - - if (dmac_err) { -- rtw89_info(rtwdev, "R_AX_WDE_ERR_FLAG_CFG =0x%08x ", -- rtw89_read32(rtwdev, R_AX_WDE_ERR_FLAG_CFG)); -- rtw89_info(rtwdev, "R_AX_PLE_ERR_FLAG_CFG =0x%08x\n", -- rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_CFG)); -+ rtw89_info(rtwdev, "R_AX_WDE_ERR_FLAG_CFG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WDE_ERR_FLAG_CFG_NUM1)); -+ rtw89_info(rtwdev, "R_AX_PLE_ERR_FLAG_CFG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_CFG_NUM1)); -+ if (chip->chip_id == RTL8852C) { -+ rtw89_info(rtwdev, "R_AX_PLE_ERRFLAG_MSG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_ERRFLAG_MSG)); -+ rtw89_info(rtwdev, "R_AX_WDE_ERRFLAG_MSG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_WDE_ERRFLAG_MSG)); -+ rtw89_info(rtwdev, "R_AX_PLE_DBGERR_LOCKEN=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_DBGERR_LOCKEN)); -+ rtw89_info(rtwdev, "R_AX_PLE_DBGERR_STS=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_PLE_DBGERR_STS)); -+ } - } - - if (dmac_err & B_AX_WDRLS_ERR_FLAG) { -- rtw89_info(rtwdev, "R_AX_WDRLS_ERR_IMR =0x%08x ", -+ rtw89_info(rtwdev, "R_AX_WDRLS_ERR_IMR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_WDRLS_ERR_IMR)); -- rtw89_info(rtwdev, "R_AX_WDRLS_ERR_ISR =0x%08x\n", -+ rtw89_info(rtwdev, "R_AX_WDRLS_ERR_ISR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_WDRLS_ERR_ISR)); -+ if (chip->chip_id == RTL8852C) -+ rtw89_info(rtwdev, "R_AX_RPQ_RXBD_IDX=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RPQ_RXBD_IDX_V1)); -+ else -+ rtw89_info(rtwdev, "R_AX_RPQ_RXBD_IDX=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RPQ_RXBD_IDX)); - } - - if (dmac_err & B_AX_WSEC_ERR_FLAG) { -- rtw89_info(rtwdev, "R_AX_SEC_ERR_IMR_ISR =0x%08x\n", -- rtw89_read32(rtwdev, R_AX_SEC_DEBUG)); -- rtw89_info(rtwdev, "SEC_local_Register 0x9D00 =0x%08x\n", -- rtw89_read32(rtwdev, R_AX_SEC_ENG_CTRL)); -- rtw89_info(rtwdev, "SEC_local_Register 0x9D04 =0x%08x\n", -- rtw89_read32(rtwdev, R_AX_SEC_MPDU_PROC)); -- rtw89_info(rtwdev, "SEC_local_Register 0x9D10 =0x%08x\n", -- rtw89_read32(rtwdev, R_AX_SEC_CAM_ACCESS)); -- rtw89_info(rtwdev, "SEC_local_Register 0x9D14 =0x%08x\n", -- rtw89_read32(rtwdev, R_AX_SEC_CAM_RDATA)); -- rtw89_info(rtwdev, "SEC_local_Register 0x9D18 =0x%08x\n", -- rtw89_read32(rtwdev, R_AX_SEC_CAM_WDATA)); -- rtw89_info(rtwdev, "SEC_local_Register 0x9D20 =0x%08x\n", -- rtw89_read32(rtwdev, R_AX_SEC_TX_DEBUG)); -- rtw89_info(rtwdev, "SEC_local_Register 0x9D24 =0x%08x\n", -- rtw89_read32(rtwdev, R_AX_SEC_RX_DEBUG)); -- rtw89_info(rtwdev, "SEC_local_Register 0x9D28 =0x%08x\n", -- rtw89_read32(rtwdev, R_AX_SEC_TRX_PKT_CNT)); -- rtw89_info(rtwdev, "SEC_local_Register 0x9D2C =0x%08x\n", -- rtw89_read32(rtwdev, R_AX_SEC_TRX_BLK_CNT)); -+ if (chip->chip_id == RTL8852C) { -+ rtw89_info(rtwdev, "R_AX_SEC_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_ERROR_FLAG_IMR)); -+ rtw89_info(rtwdev, "R_AX_SEC_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_ERROR_FLAG)); -+ rtw89_info(rtwdev, "R_AX_SEC_ENG_CTRL=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_ENG_CTRL)); -+ rtw89_info(rtwdev, "R_AX_SEC_MPDU_PROC=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_MPDU_PROC)); -+ rtw89_info(rtwdev, "R_AX_SEC_CAM_ACCESS=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_CAM_ACCESS)); -+ rtw89_info(rtwdev, "R_AX_SEC_CAM_RDATA=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_CAM_RDATA)); -+ rtw89_info(rtwdev, "R_AX_SEC_DEBUG1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_DEBUG1)); -+ rtw89_info(rtwdev, "R_AX_SEC_TX_DEBUG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_TX_DEBUG)); -+ rtw89_info(rtwdev, "R_AX_SEC_RX_DEBUG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_RX_DEBUG)); -+ -+ rtw89_write32_mask(rtwdev, R_AX_DBG_CTRL, -+ B_AX_DBG_SEL0, 0x8B); -+ rtw89_write32_mask(rtwdev, R_AX_DBG_CTRL, -+ B_AX_DBG_SEL1, 0x8B); -+ rtw89_write32_mask(rtwdev, R_AX_SYS_STATUS1, -+ B_AX_SEL_0XC0_MASK, 1); -+ for (i = 0; i < 0x10; i++) { -+ rtw89_write32_mask(rtwdev, R_AX_SEC_ENG_CTRL, -+ B_AX_SEC_DBG_PORT_FIELD_MASK, i); -+ rtw89_info(rtwdev, "sel=%x,R_AX_SEC_DEBUG2=0x%08x\n", -+ i, rtw89_read32(rtwdev, R_AX_SEC_DEBUG2)); -+ } -+ } else { -+ rtw89_info(rtwdev, "R_AX_SEC_ERR_IMR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_DEBUG)); -+ rtw89_info(rtwdev, "R_AX_SEC_ENG_CTRL=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_ENG_CTRL)); -+ rtw89_info(rtwdev, "R_AX_SEC_MPDU_PROC=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_MPDU_PROC)); -+ rtw89_info(rtwdev, "R_AX_SEC_CAM_ACCESS=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_CAM_ACCESS)); -+ rtw89_info(rtwdev, "R_AX_SEC_CAM_RDATA=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_CAM_RDATA)); -+ rtw89_info(rtwdev, "R_AX_SEC_CAM_WDATA=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_CAM_WDATA)); -+ rtw89_info(rtwdev, "R_AX_SEC_TX_DEBUG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_TX_DEBUG)); -+ rtw89_info(rtwdev, "R_AX_SEC_RX_DEBUG=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_RX_DEBUG)); -+ rtw89_info(rtwdev, "R_AX_SEC_TRX_PKT_CNT=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_TRX_PKT_CNT)); -+ rtw89_info(rtwdev, "R_AX_SEC_TRX_BLK_CNT=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SEC_TRX_BLK_CNT)); -+ } - } - - if (dmac_err & B_AX_MPDU_ERR_FLAG) { -- rtw89_info(rtwdev, "R_AX_MPDU_TX_ERR_IMR =0x%08x ", -+ rtw89_info(rtwdev, "R_AX_MPDU_TX_ERR_IMR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_MPDU_TX_ERR_IMR)); -- rtw89_info(rtwdev, "R_AX_MPDU_TX_ERR_ISR =0x%08x\n", -+ rtw89_info(rtwdev, "R_AX_MPDU_TX_ERR_ISR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_MPDU_TX_ERR_ISR)); -- rtw89_info(rtwdev, "R_AX_MPDU_RX_ERR_IMR =0x%08x ", -+ rtw89_info(rtwdev, "R_AX_MPDU_RX_ERR_IMR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_MPDU_RX_ERR_IMR)); -- rtw89_info(rtwdev, "R_AX_MPDU_RX_ERR_ISR =0x%08x\n", -+ rtw89_info(rtwdev, "R_AX_MPDU_RX_ERR_ISR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_MPDU_RX_ERR_ISR)); - } - - if (dmac_err & B_AX_STA_SCHEDULER_ERR_FLAG) { -- rtw89_info(rtwdev, "R_AX_STA_SCHEDULER_ERR_IMR =0x%08x ", -+ rtw89_info(rtwdev, "R_AX_STA_SCHEDULER_ERR_IMR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_STA_SCHEDULER_ERR_IMR)); -- rtw89_info(rtwdev, "R_AX_STA_SCHEDULER_ERR_ISR= 0x%08x\n", -+ rtw89_info(rtwdev, "R_AX_STA_SCHEDULER_ERR_ISR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_STA_SCHEDULER_ERR_ISR)); - } - - if (dmac_err & B_AX_WDE_DLE_ERR_FLAG) { -- rtw89_info(rtwdev, "R_AX_WDE_ERR_IMR=0x%08x ", -+ rtw89_info(rtwdev, "R_AX_WDE_ERR_IMR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_WDE_ERR_IMR)); - rtw89_info(rtwdev, "R_AX_WDE_ERR_ISR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_WDE_ERR_ISR)); -- rtw89_info(rtwdev, "R_AX_PLE_ERR_IMR=0x%08x ", -+ rtw89_info(rtwdev, "R_AX_PLE_ERR_IMR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_PLE_ERR_IMR)); - rtw89_info(rtwdev, "R_AX_PLE_ERR_FLAG_ISR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_ISR)); -- dump_err_status_dispatcher(rtwdev); - } - - if (dmac_err & B_AX_TXPKTCTRL_ERR_FLAG) { -- rtw89_info(rtwdev, "R_AX_TXPKTCTL_ERR_IMR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR)); -- rtw89_info(rtwdev, "R_AX_TXPKTCTL_ERR_IMR_ISR_B1=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR_B1)); -+ if (chip->chip_id == RTL8852C) { -+ rtw89_info(rtwdev, "R_AX_TXPKTCTL_B0_ERRFLAG_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPKTCTL_B0_ERRFLAG_IMR)); -+ rtw89_info(rtwdev, "R_AX_TXPKTCTL_B0_ERRFLAG_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPKTCTL_B0_ERRFLAG_ISR)); -+ rtw89_info(rtwdev, "R_AX_TXPKTCTL_B1_ERRFLAG_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPKTCTL_B1_ERRFLAG_IMR)); -+ rtw89_info(rtwdev, "R_AX_TXPKTCTL_B1_ERRFLAG_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPKTCTL_B1_ERRFLAG_ISR)); -+ } else { -+ rtw89_info(rtwdev, "R_AX_TXPKTCTL_ERR_IMR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR)); -+ rtw89_info(rtwdev, "R_AX_TXPKTCTL_ERR_IMR_ISR_B1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_TXPKTCTL_ERR_IMR_ISR_B1)); -+ } - } - - if (dmac_err & B_AX_PLE_DLE_ERR_FLAG) { -- rtw89_info(rtwdev, "R_AX_WDE_ERR_IMR=0x%08x ", -+ rtw89_info(rtwdev, "R_AX_WDE_ERR_IMR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_WDE_ERR_IMR)); - rtw89_info(rtwdev, "R_AX_WDE_ERR_ISR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_WDE_ERR_ISR)); -- rtw89_info(rtwdev, "R_AX_PLE_ERR_IMR=0x%08x ", -+ rtw89_info(rtwdev, "R_AX_PLE_ERR_IMR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_PLE_ERR_IMR)); - rtw89_info(rtwdev, "R_AX_PLE_ERR_FLAG_ISR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_PLE_ERR_FLAG_ISR)); -@@ -393,86 +451,190 @@ static void rtw89_mac_dump_err_status(st - rtw89_read32(rtwdev, R_AX_PL_CPUQ_OP_2)); - rtw89_info(rtwdev, "R_AX_PL_CPUQ_OP_STATUS=0x%08x\n", - rtw89_read32(rtwdev, R_AX_PL_CPUQ_OP_STATUS)); -- rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_0=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_0)); -- rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_1=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_1)); -- rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_2=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_2)); -- dump_err_status_dispatcher(rtwdev); -+ if (chip->chip_id == RTL8852C) { -+ rtw89_info(rtwdev, "R_AX_RX_CTRL0=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RX_CTRL0)); -+ rtw89_info(rtwdev, "R_AX_RX_CTRL1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RX_CTRL1)); -+ rtw89_info(rtwdev, "R_AX_RX_CTRL2=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RX_CTRL2)); -+ } else { -+ rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_0=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_0)); -+ rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_1=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_1)); -+ rtw89_info(rtwdev, "R_AX_RXDMA_PKT_INFO_2=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_RXDMA_PKT_INFO_2)); -+ } - } - - if (dmac_err & B_AX_PKTIN_ERR_FLAG) { -- rtw89_info(rtwdev, "R_AX_PKTIN_ERR_IMR =0x%08x ", -- rtw89_read32(rtwdev, R_AX_PKTIN_ERR_IMR)); -- rtw89_info(rtwdev, "R_AX_PKTIN_ERR_ISR =0x%08x\n", -- rtw89_read32(rtwdev, R_AX_PKTIN_ERR_ISR)); -- rtw89_info(rtwdev, "R_AX_PKTIN_ERR_IMR =0x%08x ", -+ rtw89_info(rtwdev, "R_AX_PKTIN_ERR_IMR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_PKTIN_ERR_IMR)); -- rtw89_info(rtwdev, "R_AX_PKTIN_ERR_ISR =0x%08x\n", -+ rtw89_info(rtwdev, "R_AX_PKTIN_ERR_ISR=0x%08x\n", - rtw89_read32(rtwdev, R_AX_PKTIN_ERR_ISR)); - } - -- if (dmac_err & B_AX_DISPATCH_ERR_FLAG) -- dump_err_status_dispatcher(rtwdev); -- -- if (dmac_err & B_AX_DLE_CPUIO_ERR_FLAG) { -- rtw89_info(rtwdev, "R_AX_CPUIO_ERR_IMR=0x%08x ", -- rtw89_read32(rtwdev, R_AX_CPUIO_ERR_IMR)); -- rtw89_info(rtwdev, "R_AX_CPUIO_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_CPUIO_ERR_ISR)); -+ if (dmac_err & B_AX_DISPATCH_ERR_FLAG) { -+ rtw89_info(rtwdev, "R_AX_HOST_DISPATCHER_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_HOST_DISPATCHER_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_HOST_DISPATCHER_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_HOST_DISPATCHER_ERR_ISR)); -+ rtw89_info(rtwdev, "R_AX_CPU_DISPATCHER_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_CPU_DISPATCHER_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_CPU_DISPATCHER_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_CPU_DISPATCHER_ERR_ISR)); -+ rtw89_info(rtwdev, "R_AX_OTHER_DISPATCHER_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_OTHER_DISPATCHER_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_OTHER_DISPATCHER_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_OTHER_DISPATCHER_ERR_ISR)); -+ } -+ -+ if (dmac_err & B_AX_BBRPT_ERR_FLAG) { -+ if (chip->chip_id == RTL8852C) { -+ rtw89_info(rtwdev, "R_AX_BBRPT_COM_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_BBRPT_COM_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_ISR)); -+ rtw89_info(rtwdev, "R_AX_BBRPT_CHINFO_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_ISR)); -+ rtw89_info(rtwdev, "R_AX_BBRPT_CHINFO_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_BBRPT_DFS_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_BBRPT_DFS_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_ISR)); -+ } else { -+ rtw89_info(rtwdev, "R_AX_BBRPT_COM_ERR_IMR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_IMR_ISR)); -+ rtw89_info(rtwdev, "R_AX_BBRPT_CHINFO_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_ISR)); -+ rtw89_info(rtwdev, "R_AX_BBRPT_CHINFO_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_CHINFO_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_BBRPT_DFS_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_IMR)); -+ rtw89_info(rtwdev, "R_AX_BBRPT_DFS_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_BBRPT_DFS_ERR_ISR)); -+ } -+ } -+ -+ if (dmac_err & B_AX_HAXIDMA_ERR_FLAG && chip->chip_id == RTL8852C) { -+ rtw89_info(rtwdev, "R_AX_HAXIDMA_ERR_IMR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_HAXI_IDCT_MSK)); -+ rtw89_info(rtwdev, "R_AX_HAXIDMA_ERR_ISR=0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_HAXI_IDCT)); - } -+} - -- if (dmac_err & BIT(11)) { -- rtw89_info(rtwdev, "R_AX_BBRPT_COM_ERR_IMR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_BBRPT_COM_ERR_IMR_ISR)); -+static void rtw89_mac_dump_cmac_err_status(struct rtw89_dev *rtwdev, -+ u8 band) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ u32 offset = 0; -+ u32 cmac_err; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, band, RTW89_CMAC_SEL); -+ if (ret) { -+ if (band) -+ rtw89_warn(rtwdev, "[CMAC] : CMAC1 not enabled\n"); -+ else -+ rtw89_warn(rtwdev, "[CMAC] : CMAC0 not enabled\n"); -+ return; - } - -+ if (band) -+ offset = RTW89_MAC_AX_BAND_REG_OFFSET; -+ -+ cmac_err = rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR + offset); -+ rtw89_info(rtwdev, "R_AX_CMAC_ERR_ISR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_CMAC_ERR_ISR + offset)); -+ rtw89_info(rtwdev, "R_AX_CMAC_FUNC_EN [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_CMAC_FUNC_EN + offset)); -+ rtw89_info(rtwdev, "R_AX_CK_EN [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_CK_EN + offset)); -+ - if (cmac_err & B_AX_SCHEDULE_TOP_ERR_IND) { -- rtw89_info(rtwdev, "R_AX_SCHEDULE_ERR_IMR=0x%08x ", -- rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_IMR)); -- rtw89_info(rtwdev, "R_AX_SCHEDULE_ERR_ISR=0x%04x\n", -- rtw89_read16(rtwdev, R_AX_SCHEDULE_ERR_ISR)); -+ rtw89_info(rtwdev, "R_AX_SCHEDULE_ERR_IMR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_IMR + offset)); -+ rtw89_info(rtwdev, "R_AX_SCHEDULE_ERR_ISR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_SCHEDULE_ERR_ISR + offset)); - } - - if (cmac_err & B_AX_PTCL_TOP_ERR_IND) { -- rtw89_info(rtwdev, "R_AX_PTCL_IMR0=0x%08x ", -- rtw89_read32(rtwdev, R_AX_PTCL_IMR0)); -- rtw89_info(rtwdev, "R_AX_PTCL_ISR0=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_PTCL_ISR0)); -+ rtw89_info(rtwdev, "R_AX_PTCL_IMR0 [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_PTCL_IMR0 + offset)); -+ rtw89_info(rtwdev, "R_AX_PTCL_ISR0 [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_PTCL_ISR0 + offset)); - } - - if (cmac_err & B_AX_DMA_TOP_ERR_IND) { -- rtw89_info(rtwdev, "R_AX_DLE_CTRL=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_DLE_CTRL)); -- } -- -- if (cmac_err & B_AX_PHYINTF_ERR_IND) { -- rtw89_info(rtwdev, "R_AX_PHYINFO_ERR_IMR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_IMR)); -+ if (chip->chip_id == RTL8852C) { -+ rtw89_info(rtwdev, "R_AX_RX_ERR_FLAG [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_RX_ERR_FLAG + offset)); -+ rtw89_info(rtwdev, "R_AX_RX_ERR_FLAG_IMR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_RX_ERR_FLAG_IMR + offset)); -+ } else { -+ rtw89_info(rtwdev, "R_AX_DLE_CTRL [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_DLE_CTRL + offset)); -+ } -+ } -+ -+ if (cmac_err & B_AX_DMA_TOP_ERR_IND || cmac_err & B_AX_WMAC_RX_ERR_IND) { -+ if (chip->chip_id == RTL8852C) { -+ rtw89_info(rtwdev, "R_AX_PHYINFO_ERR_ISR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_ISR + offset)); -+ rtw89_info(rtwdev, "R_AX_PHYINFO_ERR_IMR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_IMR + offset)); -+ } else { -+ rtw89_info(rtwdev, "R_AX_PHYINFO_ERR_IMR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_IMR + offset)); -+ } - } - - if (cmac_err & B_AX_TXPWR_CTRL_ERR_IND) { -- rtw89_info(rtwdev, "R_AX_TXPWR_IMR=0x%08x ", -- rtw89_read32(rtwdev, R_AX_TXPWR_IMR)); -- rtw89_info(rtwdev, "R_AX_TXPWR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_TXPWR_ISR)); -- } -- -- if (cmac_err & B_AX_WMAC_RX_ERR_IND) { -- rtw89_info(rtwdev, "R_AX_DBGSEL_TRXPTCL=0x%08x ", -- rtw89_read32(rtwdev, R_AX_DBGSEL_TRXPTCL)); -- rtw89_info(rtwdev, "R_AX_PHYINFO_ERR_ISR=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_PHYINFO_ERR_ISR)); -+ rtw89_info(rtwdev, "R_AX_TXPWR_IMR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_TXPWR_IMR + offset)); -+ rtw89_info(rtwdev, "R_AX_TXPWR_ISR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_TXPWR_ISR + offset)); - } - - if (cmac_err & B_AX_WMAC_TX_ERR_IND) { -- rtw89_info(rtwdev, "R_AX_TMAC_ERR_IMR_ISR=0x%08x ", -- rtw89_read32(rtwdev, R_AX_TMAC_ERR_IMR_ISR)); -- rtw89_info(rtwdev, "R_AX_DBGSEL_TRXPTCL=0x%08x\n", -- rtw89_read32(rtwdev, R_AX_DBGSEL_TRXPTCL)); -+ if (chip->chip_id == RTL8852C) { -+ rtw89_info(rtwdev, "R_AX_TRXPTCL_ERROR_INDICA [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_TRXPTCL_ERROR_INDICA + offset)); -+ rtw89_info(rtwdev, "R_AX_TRXPTCL_ERROR_INDICA_MASK [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_TRXPTCL_ERROR_INDICA_MASK + offset)); -+ } else { -+ rtw89_info(rtwdev, "R_AX_TMAC_ERR_IMR_ISR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_TMAC_ERR_IMR_ISR + offset)); -+ } -+ rtw89_info(rtwdev, "R_AX_DBGSEL_TRXPTCL [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_DBGSEL_TRXPTCL + offset)); - } - -+ rtw89_info(rtwdev, "R_AX_CMAC_ERR_IMR [%d]=0x%08x\n", band, -+ rtw89_read32(rtwdev, R_AX_CMAC_ERR_IMR + offset)); -+} -+ -+static void rtw89_mac_dump_err_status(struct rtw89_dev *rtwdev, -+ enum mac_ax_err_info err) -+{ -+ if (err != MAC_AX_ERR_L1_ERR_DMAC && -+ err != MAC_AX_ERR_L0_PROMOTE_TO_L1 && -+ err != MAC_AX_ERR_L0_ERR_CMAC0 && -+ err != MAC_AX_ERR_L0_ERR_CMAC1) -+ return; -+ -+ rtw89_info(rtwdev, "--->\nerr=0x%x\n", err); -+ rtw89_info(rtwdev, "R_AX_SER_DBG_INFO =0x%08x\n", -+ rtw89_read32(rtwdev, R_AX_SER_DBG_INFO)); -+ -+ rtw89_mac_dump_dmac_err_status(rtwdev); -+ rtw89_mac_dump_cmac_err_status(rtwdev, RTW89_MAC_0); -+ if (rtwdev->dbcc_en) -+ rtw89_mac_dump_cmac_err_status(rtwdev, RTW89_MAC_1); -+ - rtwdev->hci.ops->dump_err_status(rtwdev); - - if (err == MAC_AX_ERR_L0_PROMOTE_TO_L1) ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -440,6 +440,7 @@ enum rtw89_mac_bf_rrsc_rate { - #define ACCESS_CMAC(_addr) \ - ({typeof(_addr) __addr = (_addr); \ - __addr >= R_AX_CMAC_REG_START && __addr <= R_AX_CMAC_REG_END; }) -+#define RTW89_MAC_AX_BAND_REG_OFFSET 0x2000 - - #define PTCL_IDLE_POLL_CNT 10000 - #define SW_CVR_DUR_US 8 ---- a/drivers/net/wireless/realtek/rtw89/pci.h -+++ b/drivers/net/wireless/realtek/rtw89/pci.h -@@ -202,6 +202,18 @@ - #define B_AX_RXP1DMA_INT BIT(1) - #define B_AX_RXDMA_INT BIT(0) - -+#define R_AX_HAXI_IDCT_MSK 0x10B8 -+#define B_AX_TXBD_LEN0_ERR_IDCT_MSK BIT(3) -+#define B_AX_TXBD_4KBOUND_ERR_IDCT_MSK BIT(2) -+#define B_AX_RXMDA_STUCK_IDCT_MSK BIT(1) -+#define B_AX_TXMDA_STUCK_IDCT_MSK BIT(0) -+ -+#define R_AX_HAXI_IDCT 0x10BC -+#define B_AX_TXBD_LEN0_ERR_IDCT BIT(3) -+#define B_AX_TXBD_4KBOUND_ERR_IDCT BIT(2) -+#define B_AX_RXMDA_STUCK_IDCT BIT(1) -+#define B_AX_TXMDA_STUCK_IDCT BIT(0) -+ - #define R_AX_HAXI_HIMR10 0x11E0 - #define B_AX_TXDMA_CH11_INT_EN_V1 BIT(1) - #define B_AX_TXDMA_CH10_INT_EN_V1 BIT(0) ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -326,8 +326,7 @@ - - #define R_AX_PCIE_DBG_CTRL 0x11C0 - #define B_AX_DBG_DUMMY_MASK GENMASK(23, 16) --#define B_AX_DBG_SEL_MASK GENMASK(15, 13) --#define B_AX_PCIE_DBG_SEL BIT(12) -+#define B_AX_PCIE_DBG_SEL_MASK GENMASK(15, 13) - #define B_AX_MRD_TIMEOUT_EN BIT(10) - #define B_AX_ASFF_FULL_NO_STK BIT(1) - #define B_AX_EN_STUCK_DBG BIT(0) -@@ -574,6 +573,10 @@ - #define DMAC_ERR_IMR_DIS 0 - - #define R_AX_DMAC_ERR_ISR 0x8524 -+#define B_AX_HAXIDMA_ERR_FLAG BIT(14) -+#define B_AX_PAXIDMA_ERR_FLAG BIT(13) -+#define B_AX_HCI_BUF_ERR_FLAG BIT(12) -+#define B_AX_BBRPT_ERR_FLAG BIT(11) - #define B_AX_DLE_CPUIO_ERR_FLAG BIT(10) - #define B_AX_APB_BRIDGE_ERR_FLAG BIT(9) - #define B_AX_DISPATCH_ERR_FLAG BIT(8) -@@ -1041,7 +1044,13 @@ - #define R_AX_WDE_ERRFLAG_MSG 0x8C30 - #define B_AX_WDE_ERR_FLAG_MSG_MASK GENMASK(31, 0) - --#define R_AX_WDE_ERR_FLAG_CFG 0x8C34 -+#define R_AX_WDE_ERR_FLAG_CFG_NUM1 0x8C34 -+#define B_AX_WDE_ERR_FLAG_NUM1_VLD BIT(31) -+#define B_AX_WDE_ERR_FLAG_NUM1_MSTIDX_MASK GENMASK(27, 24) -+#define B_AX_WDE_ERR_FLAG_NUM1_ISRIDX_MASK GENMASK(20, 16) -+#define B_AX_WDE_DATCHN_FRZTMR_MODE BIT(2) -+#define B_AX_WDE_QUEMGN_FRZTMR_MODE BIT(1) -+#define B_AX_WDE_BUFMGN_FRZTMR_MODE BIT(0) - - #define R_AX_WDE_ERR_IMR 0x8C38 - #define B_AX_WDE_DATCHN_RRDY_ERR_INT_EN BIT(27) -@@ -1225,7 +1234,59 @@ - #define B_AX_PLE_START_BOUND_MASK GENMASK(13, 8) - #define B_AX_PLE_PAGE_SEL_MASK GENMASK(1, 0) - #define B_AX_PLE_FREE_PAGE_NUM_MASK GENMASK(28, 16) --#define R_AX_PLE_ERR_FLAG_CFG 0x9034 -+ -+#define R_AX_PLE_DBGERR_LOCKEN 0x9020 -+#define B_AX_PLE_LOCKEN_DLEPIF07 BIT(7) -+#define B_AX_PLE_LOCKEN_DLEPIF06 BIT(6) -+#define B_AX_PLE_LOCKEN_DLEPIF05 BIT(5) -+#define B_AX_PLE_LOCKEN_DLEPIF04 BIT(4) -+#define B_AX_PLE_LOCKEN_DLEPIF03 BIT(3) -+#define B_AX_PLE_LOCKEN_DLEPIF02 BIT(2) -+#define B_AX_PLE_LOCKEN_DLEPIF01 BIT(1) -+#define B_AX_PLE_LOCKEN_DLEPIF00 BIT(0) -+ -+#define R_AX_PLE_DBGERR_STS 0x9024 -+#define B_AX_PLE_LOCKON_DLEPIF07 BIT(7) -+#define B_AX_PLE_LOCKON_DLEPIF06 BIT(6) -+#define B_AX_PLE_LOCKON_DLEPIF05 BIT(5) -+#define B_AX_PLE_LOCKON_DLEPIF04 BIT(4) -+#define B_AX_PLE_LOCKON_DLEPIF03 BIT(3) -+#define B_AX_PLE_LOCKON_DLEPIF02 BIT(2) -+#define B_AX_PLE_LOCKON_DLEPIF01 BIT(1) -+#define B_AX_PLE_LOCKON_DLEPIF00 BIT(0) -+ -+#define R_AX_PLE_ERR_FLAG_CFG_NUM1 0x9034 -+#define B_AX_PLE_ERR_FLAG_NUM1_VLD BIT(31) -+#define B_AX_PLE_ERR_FLAG_NUM1_MSTIDX_MASK GENMASK(27, 24) -+#define B_AX_PLE_ERR_FLAG_NUM1_ISRIDX_MASK GENMASK(20, 16) -+#define B_AX_PLE_DATCHN_FRZTMR_MODE BIT(2) -+#define B_AX_PLE_QUEMGN_FRZTMR_MODE BIT(1) -+#define B_AX_PLE_BUFMGN_FRZTMR_MODE BIT(0) -+ -+#define R_AX_PLE_ERRFLAG_MSG 0x9030 -+#define B_AX_PLE_ERR_FLAG_MSG_MASK GENMASK(31, 0) -+#define B_AX_PLE_DATCHN_CAMREQ_ERR_INT_EN BIT(29) -+#define B_AX_PLE_DATCHN_ADRERR_ERR_INT_EN BIT(28) -+#define B_AX_PLE_BUFMGN_FRZTO_ERR_INT_EN_V1 BIT(9) -+#define B_AX_PLE_GETNPG_PGOFST_ERR_INT_EN_V1 BIT(8) -+#define B_AX_PLE_GETNPG_STRPG_ERR_INT_EN_V1 BIT(7) -+#define B_AX_PLE_BUFREQ_SRCHTAILPG_ERR_INT_EN_V1 BIT(6) -+#define B_AX_PLE_BUFRTN_SIZE_ERR_INT_EN_V1 BIT(5) -+#define B_AX_PLE_BUFRTN_INVLD_PKTID_ERR_INT_EN_V1 BIT(4) -+#define B_AX_PLE_BUFREQ_UNAVAL_ERR_INT_EN_V1 BIT(3) -+#define B_AX_PLE_BUFREQ_SIZELMT_INT_EN BIT(2) -+#define B_AX_PLE_BUFREQ_SIZE0_INT_EN BIT(1) -+#define B_AX_PLE_DATCHN_CAMREQ_ERR BIT(29) -+#define B_AX_PLE_DATCHN_ADRERR_ERR BIT(28) -+#define B_AX_PLE_BUFMGN_FRZTO_ERR_V1 BIT(9) -+#define B_AX_PLE_GETNPG_PGOFST_ERR_V1 BIT(8) -+#define B_AX_PLE_GETNPG_STRPG_ERR_V1 BIT(7) -+#define B_AX_PLE_BUFREQ_SRCHTAILPG_ERR_V1 BIT(6) -+#define B_AX_PLE_BUFRTN_SIZE_ERR_V1 BIT(5) -+#define B_AX_PLE_BUFRTN_INVLD_PKTID_ERR_V1 BIT(4) -+#define B_AX_PLE_BUFREQ_UNAVAL_ERR_V1 BIT(3) -+#define B_AX_PLE_BUFREQ_SIZELMT_ERR BIT(2) -+#define B_AX_PLE_BUFREQ_SIZE0_ERR BIT(1) - - #define R_AX_PLE_ERR_IMR 0x9038 - #define B_AX_PLE_DATCHN_RRDY_ERR_INT_EN BIT(27) -@@ -1436,6 +1497,19 @@ - #define B_AX_BBRPT_COM_NULL_PLPKTID_ERR BIT(16) - #define B_AX_BBRPT_COM_NULL_PLPKTID_ERR_INT_EN BIT(0) - -+#define R_AX_BBRPT_COM_ERR_ISR 0x960C -+#define B_AX_BBRPT_COM_NULL_PLPKTID_ERR_INT_V1 BIT(0) -+ -+#define R_AX_BBRPT_CHINFO_ERR_ISR 0x962C -+#define B_AX_BBPRT_CHIF_TO_ERR_V1 BIT(7) -+#define B_AX_BBPRT_CHIF_NULL_ERR_V1 BIT(6) -+#define B_AX_BBPRT_CHIF_LEFT2_ERR_V1 BIT(5) -+#define B_AX_BBPRT_CHIF_LEFT1_ERR_V1 BIT(4) -+#define B_AX_BBPRT_CHIF_HDRL_ERR_V1 BIT(3) -+#define B_AX_BBPRT_CHIF_BOVF_ERR_V1 BIT(2) -+#define B_AX_BBPRT_CHIF_OVF_ERR_V1 BIT(1) -+#define B_AX_BBPRT_CHIF_BB_TO_ERR_V1 BIT(0) -+ - #define R_AX_BBRPT_CHINFO_ERR_IMR 0x9628 - #define B_AX_BBPRT_CHIF_TO_ERR_INT_EN BIT(7) - #define B_AX_BBPRT_CHIF_NULL_ERR_INT_EN BIT(6) -@@ -1487,6 +1561,9 @@ - #define B_AX_BBRPT_DFS_TO_ERR BIT(16) - #define B_AX_BBRPT_DFS_TO_ERR_INT_EN BIT(0) - -+#define R_AX_BBRPT_DFS_ERR_ISR 0x963C -+#define B_AX_BBRPT_DFS_TO_ERR_V1 BIT(0) -+ - #define R_AX_LA_ERRFLAG 0x966C - #define B_AX_LA_ISR_DATA_LOSS_ERR BIT(16) - #define B_AX_LA_IMR_DATA_LOSS_ERR BIT(0) -@@ -1602,6 +1679,7 @@ - #define B_AX_MPDU_RX_IMR_SET_V1 B_AX_RPT_ERR_INT_EN - - #define R_AX_SEC_ENG_CTRL 0x9D00 -+#define B_AX_SEC_DBG_PORT_FIELD_MASK GENMASK(19, 16) - #define B_AX_TX_PARTIAL_MODE BIT(11) - #define B_AX_CLK_EN_CGCMP BIT(10) - #define B_AX_CLK_EN_WAPI BIT(9) -@@ -1631,12 +1709,21 @@ - #define R_AX_SEC_TX_DEBUG 0x9D20 - #define R_AX_SEC_RX_DEBUG 0x9D24 - #define R_AX_SEC_TRX_PKT_CNT 0x9D28 -+ -+#define R_AX_SEC_DEBUG2 0x9D28 -+#define B_AX_DBG_READ_SH 2 -+#define B_AX_DBG_READ_MSK 0x3fffffff -+ - #define R_AX_SEC_TRX_BLK_CNT 0x9D2C - - #define R_AX_SEC_ERROR_FLAG_IMR 0x9D2C - #define B_AX_RX_HANG_IMR BIT(1) - #define B_AX_TX_HANG_IMR BIT(0) - -+#define R_AX_SEC_ERROR_FLAG 0x9D30 -+#define B_AX_RX_HANG_ERROR_V1 BIT(1) -+#define B_AX_TX_HANG_ERROR_V1 BIT(0) -+ - #define R_AX_SS_CTRL 0x9E10 - #define B_AX_SS_INIT_DONE_1 BIT(31) - #define B_AX_SS_WARM_INIT_FLG BIT(29) -@@ -1771,6 +1858,28 @@ - B_AX_B0_IMR_ERR_PRELD_RLSPKTSZERR | \ - B_AX_B0_IMR_ERR_PRELD_ENTNUMCFG) - -+#define R_AX_TXPKTCTL_B0_ERRFLAG_ISR 0x9F7C -+#define B_AX_B0_ISR_ERR_PRELD_EVT3 BIT(23) -+#define B_AX_B0_ISR_ERR_PRELD_EVT2 BIT(22) -+#define B_AX_B0_ISR_ERR_PRELD_ENTNUMCFG BIT(21) -+#define B_AX_B0_ISR_ERR_PRELD_RLSPKTSZERR BIT(20) -+#define B_AX_B0_ISR_ERR_MPDUIF_ERR1 BIT(19) -+#define B_AX_B0_ISR_ERR_MPDUIF_DATAERR BIT(18) -+#define B_AX_B0_ISR_ERR_MPDUINFO_ERR1 BIT(17) -+#define B_AX_B0_ISR_ERR_MPDUINFO_RECFG BIT(16) -+#define B_AX_B0_ISR_ERR_CMDPSR_TBLSZ BIT(11) -+#define B_AX_B0_ISR_ERR_CMDPSR_FRZTO BIT(10) -+#define B_AX_B0_ISR_ERR_CMDPSR_CMDTYPE BIT(9) -+#define B_AX_B0_ISR_ERR_CMDPSR_1STCMDERR BIT(8) -+#define B_AX_B0_ISR_ERR_USRCTL_EVT7 BIT(7) -+#define B_AX_B0_ISR_ERR_USRCTL_EVT6 BIT(6) -+#define B_AX_B0_ISR_ERR_USRCTL_EVT5 BIT(5) -+#define B_AX_B0_ISR_ERR_USRCTL_EVT4 BIT(4) -+#define B_AX_B0_ISR_ERR_USRCTL_RLSBMPLEN BIT(3) -+#define B_AX_B0_ISR_ERR_USRCTL_RDNRLSCMD BIT(2) -+#define B_AX_B0_ISR_ERR_USRCTL_NOINIT BIT(1) -+#define B_AX_B0_ISR_ERR_USRCTL_REINIT BIT(0) -+ - #define R_AX_TXPKTCTL_B1_PRELD_CFG0 0x9F88 - #define B_AX_B1_PRELD_FEN BIT(31) - #define B_AX_B1_PRELD_USEMAXSZ_MASK GENMASK(25, 16) -@@ -1818,6 +1927,28 @@ - B_AX_B1_IMR_ERR_PRELD_RLSPKTSZERR | \ - B_AX_B1_IMR_ERR_PRELD_ENTNUMCFG) - -+#define R_AX_TXPKTCTL_B1_ERRFLAG_ISR 0x9FBC -+#define B_AX_B1_ISR_ERR_PRELD_EVT3 BIT(23) -+#define B_AX_B1_ISR_ERR_PRELD_EVT2 BIT(22) -+#define B_AX_B1_ISR_ERR_PRELD_ENTNUMCFG BIT(21) -+#define B_AX_B1_ISR_ERR_PRELD_RLSPKTSZERR BIT(20) -+#define B_AX_B1_ISR_ERR_MPDUIF_ERR1 BIT(19) -+#define B_AX_B1_ISR_ERR_MPDUIF_DATAERR BIT(18) -+#define B_AX_B1_ISR_ERR_MPDUINFO_ERR1 BIT(17) -+#define B_AX_B1_ISR_ERR_MPDUINFO_RECFG BIT(16) -+#define B_AX_B1_ISR_ERR_CMDPSR_TBLSZ BIT(11) -+#define B_AX_B1_ISR_ERR_CMDPSR_FRZTO BIT(10) -+#define B_AX_B1_ISR_ERR_CMDPSR_CMDTYPE BIT(9) -+#define B_AX_B1_ISR_ERR_CMDPSR_1STCMDERR BIT(8) -+#define B_AX_B1_ISR_ERR_USRCTL_EVT7 BIT(7) -+#define B_AX_B1_ISR_ERR_USRCTL_EVT6 BIT(6) -+#define B_AX_B1_ISR_ERR_USRCTL_EVT5 BIT(5) -+#define B_AX_B1_ISR_ERR_USRCTL_EVT4 BIT(4) -+#define B_AX_B1_ISR_ERR_USRCTL_RLSBMPLEN BIT(3) -+#define B_AX_B1_ISR_ERR_USRCTL_RDNRLSCMD BIT(2) -+#define B_AX_B1_ISR_ERR_USRCTL_NOINIT BIT(1) -+#define B_AX_B1_ISR_ERR_USRCTL_REINIT BIT(0) -+ - #define R_AX_AFE_CTRL1 0x0024 - - #define B_AX_R_SYM_WLCMAC1_P4_PC_EN BIT(4) -@@ -2386,6 +2517,41 @@ - #define B_AX_DLE_IMR_SET (B_AX_RXSTS_FSM_HANG_ERROR_IMR | \ - B_AX_RXDATA_FSM_HANG_ERROR_IMR) - -+#define R_AX_RX_ERR_FLAG 0xC800 -+#define R_AX_RX_ERR_FLAG_C1 0xE800 -+#define B_AX_RX_GET_NO_PAGE_ERR BIT(31) -+#define B_AX_RX_GET_NULL_PKT_ERR BIT(30) -+#define B_AX_RX_RU0_FSM_HANG_ERR BIT(29) -+#define B_AX_RX_RU1_FSM_HANG_ERR BIT(28) -+#define B_AX_RX_RU2_FSM_HANG_ERR BIT(27) -+#define B_AX_RX_RU3_FSM_HANG_ERR BIT(26) -+#define B_AX_RX_RU4_FSM_HANG_ERR BIT(25) -+#define B_AX_RX_RU5_FSM_HANG_ERR BIT(24) -+#define B_AX_RX_RU6_FSM_HANG_ERR BIT(23) -+#define B_AX_RX_RU7_FSM_HANG_ERR BIT(22) -+#define B_AX_RX_RXSTS_FSM_HANG_ERR BIT(21) -+#define B_AX_RX_CSI_FSM_HANG_ERR BIT(20) -+#define B_AX_RX_TXRPT_FSM_HANG_ERR BIT(19) -+#define B_AX_RX_F2PCMD_FSM_HANG_ERR BIT(18) -+#define B_AX_RX_RU0_ZERO_LEN_ERR BIT(17) -+#define B_AX_RX_RU1_ZERO_LEN_ERR BIT(16) -+#define B_AX_RX_RU2_ZERO_LEN_ERR BIT(15) -+#define B_AX_RX_RU3_ZERO_LEN_ERR BIT(14) -+#define B_AX_RX_RU4_ZERO_LEN_ERR BIT(13) -+#define B_AX_RX_RU5_ZERO_LEN_ERR BIT(12) -+#define B_AX_RX_RU6_ZERO_LEN_ERR BIT(11) -+#define B_AX_RX_RU7_ZERO_LEN_ERR BIT(10) -+#define B_AX_RX_RXSTS_ZERO_LEN_ERR BIT(9) -+#define B_AX_RX_CSI_ZERO_LEN_ERR BIT(8) -+#define B_AX_PLE_DATA_OPT_FSM_HANG BIT(7) -+#define B_AX_PLE_RXDATA_REQ_BUF_FSM_HANG BIT(6) -+#define B_AX_PLE_TXRPT_REQ_BUF_FSM_HANG BIT(5) -+#define B_AX_PLE_WD_OPT_FSM_HANG BIT(4) -+#define B_AX_PLE_ENQ_FSM_HANG BIT(3) -+#define B_AX_RXDATA_ENQUE_ORDER_ERR BIT(2) -+#define B_AX_RXSTS_ENQUE_ORDER_ERR BIT(1) -+#define B_AX_RX_CSI_PKT_NUM_ERR BIT(0) -+ - #define R_AX_RXDMA_CTRL_0 0xC804 - #define R_AX_RXDMA_CTRL_0_C1 0xE804 - #define B_AX_RXDMA_DBGOUT_EN BIT(31) -@@ -2408,6 +2574,49 @@ - B_AX_RU2_PTR_FULL_MODE | B_AX_RU3_PTR_FULL_MODE | \ - B_AX_CSI_PTR_FULL_MODE | B_AX_RXSTS_PTR_FULL_MODE) - -+#define R_AX_RX_CTRL0 0xC808 -+#define R_AX_RX_CTRL0_C1 0xE808 -+#define B_AX_DLE_CLOCK_FORCE_V1 BIT(31) -+#define B_AX_TXDMA_CLOCK_FORCE_V1 BIT(30) -+#define B_AX_RXDMA_CLOCK_FORCE_V1 BIT(29) -+#define B_AX_RXDMA_DEFAULT_PAGE_V1_MASK GENMASK(28, 24) -+#define B_AX_RXDMA_CSI_TGT_QUEID_MASK GENMASK(23, 18) -+#define B_AX_RXDMA_CSI_TGT_PRID_MASK GENMASK(17, 15) -+#define B_AX_RXDMA_DIS_CSI_RELEASE_V1 BIT(14) -+#define B_AX_CSI_PTR_FULL_MODE_V1 BIT(13) -+#define B_AX_RXDATA_PTR_FULL_MODE BIT(12) -+#define B_AX_RXSTS_PTR_FULL_MODE_V1 BIT(11) -+#define B_AX_TXRPT_FULL_RSV_DEPTH_V1_MASK GENMASK(10, 8) -+#define B_AX_RXDATA_FULL_RSV_DEPTH_MASK GENMASK(7, 5) -+#define B_AX_RXSTS_FULL_RSV_DEPTH_V1_MASK GENMASK(4, 2) -+#define B_AX_ORDER_FIFO_MASK GENMASK(1, 0) -+ -+#define R_AX_RX_CTRL1 0xC80C -+#define R_AX_RX_CTRL1_C1 0xE80C -+#define B_AX_RXDMA_TXRPT_QUEUE_ID_SW_EN BIT(31) -+#define B_AX_RXDMA_TXRPT_QUEUE_ID_SW_V1_MASK GENMASK(30, 25) -+#define B_AX_RXDMA_F2PCMD_QUEUE_ID_SW_EN BIT(24) -+#define B_AX_RXDMA_F2PCMD_QUEUE_ID_SW_V1_MASK GENMASK(23, 18) -+#define B_AX_RXDMA_TXRPT_QUEUE_ID_TGT_SW_EN BIT(17) -+#define B_AX_RXDMA_TXRPT_QUEUE_ID_TGT_SW_1_MASK GENMASK(16, 11) -+#define B_AX_RXDMA_F2PCMD_QUEUE_ID_TGT_SW_EN BIT(10) -+#define B_AX_RXDMA_F2PCMD_QUEUE_ID_TGT_SW_1_MASK GENMASK(9, 4) -+#define B_AX_ORDER_FIFO_OUT BIT(3) -+#define B_AX_ORDER_FIFO_EMPTY BIT(2) -+#define B_AX_DBG_SEL_MASK GENMASK(1, 0) -+ -+#define R_AX_RX_CTRL2 0xC810 -+#define R_AX_RX_CTRL2_C1 0xE810 -+#define B_AX_DLE_WDE_STATE_V1_MASK GENMASK(31, 30) -+#define B_AX_DLE_PLE_STATE_V1_MASK GENMASK(29, 28) -+#define B_AX_DLE_REQ_BUF_STATE_MASK GENMASK(27, 26) -+#define B_AX_DLE_ENQ_STATE_V1 BIT(25) -+#define B_AX_RX_DBG_SEL_MASK GENMASK(24, 19) -+#define B_AX_MACRX_CS_MASK GENMASK(18, 14) -+#define B_AX_RXSTS_CS_MASK GENMASK(13, 9) -+#define B_AX_ERR_INDICATOR BIT(5) -+#define B_AX_TXRPT_CS_MASK GENMASK(4, 0) -+ - #define R_AX_RXDMA_PKT_INFO_0 0xC814 - #define R_AX_RXDMA_PKT_INFO_1 0xC818 - #define R_AX_RXDMA_PKT_INFO_2 0xC81C -@@ -2715,6 +2924,18 @@ - B_AX_TMAC_MIMO_CTRL | \ - B_AX_RMAC_FTM) - -+#define R_AX_TRXPTCL_ERROR_INDICA 0xCCC0 -+#define R_AX_TRXPTCL_ERROR_INDICA_C1 0xECC0 -+#define B_AX_FTM_ERROR_FLAG_CLR BIT(8) -+#define B_AX_CSI_ERROR_FLAG_CLR BIT(7) -+#define B_AX_MIMOCTRL_ERROR_FLAG_CLR BIT(6) -+#define B_AX_RXTB_ERROR_FLAG_CLR BIT(5) -+#define B_AX_HWSIGB_GEN_ERROR_FLAG_CLR BIT(4) -+#define B_AX_TXPLCP_ERROR_FLAG_CLR BIT(3) -+#define B_AX_RESP_ERROR_FLAG_CLR BIT(2) -+#define B_AX_TXCTL_ERROR_FLAG_CLR BIT(1) -+#define B_AX_MACTX_ERROR_FLAG_CLR BIT(0) -+ - #define R_AX_WMAC_TX_TF_INFO_0 0xCCD0 - #define R_AX_WMAC_TX_TF_INFO_0_C1 0xECD0 - #define B_AX_WMAC_TX_TF_INFO_SEL_MASK GENMASK(2, 0) diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-060-wifi-rtw89-8852b-change-debug-mask-of-message-of-no-.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-060-wifi-rtw89-8852b-change-debug-mask-of-message-of-no-.patch deleted file mode 100644 index 6d1716834..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-060-wifi-rtw89-8852b-change-debug-mask-of-message-of-no-.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 901c247f9687b5aecc950a931a3b0e1930d02bfd Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Tue, 8 Nov 2022 09:42:30 +0800 -Subject: [PATCH 060/149] wifi: rtw89: 8852b: change debug mask of message of - no TX resource - -8852B has smaller TX FIFO than others in WiFi chip, so it would be buffer -full frequently, but it doesn't affect TX performance. However, it shows -verbose debug messages with RTW89_DBG_UNEXP mask that is used to indicate -abnormal behavior, so change debug mask to RTW89_DBG_TXRX for 8852B. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221108014230.11068-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/pci.c | 16 ++++++++++++++-- - 1 file changed, 14 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/pci.c -+++ b/drivers/net/wireless/realtek/rtw89/pci.c -@@ -971,8 +971,10 @@ static u32 __rtw89_pci_check_and_reclaim - struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; - struct rtw89_pci_tx_ring *tx_ring = &rtwpci->tx_rings[txch]; - struct rtw89_pci_tx_wd_ring *wd_ring = &tx_ring->wd_ring; -+ const struct rtw89_chip_info *chip = rtwdev->chip; - u32 bd_cnt, wd_cnt, min_cnt = 0; - struct rtw89_pci_rx_ring *rx_ring; -+ enum rtw89_debug_mask debug_mask; - u32 cnt; - - rx_ring = &rtwpci->rx_rings[RTW89_RXCH_RPQ]; -@@ -996,10 +998,20 @@ static u32 __rtw89_pci_check_and_reclaim - bd_cnt = rtw89_pci_get_avail_txbd_num(tx_ring); - wd_cnt = wd_ring->curr_num; - min_cnt = min(bd_cnt, wd_cnt); -- if (min_cnt == 0) -- rtw89_debug(rtwdev, rtwpci->low_power ? RTW89_DBG_TXRX : RTW89_DBG_UNEXP, -+ if (min_cnt == 0) { -+ /* This message can be frequently shown in low power mode or -+ * high traffic with 8852B, and we have recognized it as normal -+ * behavior, so print with mask RTW89_DBG_TXRX in these situations. -+ */ -+ if (rtwpci->low_power || chip->chip_id == RTL8852B) -+ debug_mask = RTW89_DBG_TXRX; -+ else -+ debug_mask = RTW89_DBG_UNEXP; -+ -+ rtw89_debug(rtwdev, debug_mask, - "still no tx resource after reclaim: wd_cnt=%d bd_cnt=%d\n", - wd_cnt, bd_cnt); -+ } - - out_unlock: - spin_unlock_bh(&rtwpci->trx_lock); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-061-wifi-rtw89-Fix-some-error-handling-path-in-rtw89_wow.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-061-wifi-rtw89-Fix-some-error-handling-path-in-rtw89_wow.patch deleted file mode 100644 index 1c6d146a3..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-061-wifi-rtw89-Fix-some-error-handling-path-in-rtw89_wow.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 61ec34dee266f1cea092986d861a2cb136571199 Mon Sep 17 00:00:00 2001 -From: Christophe JAILLET -Date: Sun, 13 Nov 2022 16:42:21 +0100 -Subject: [PATCH 061/149] wifi: rtw89: Fix some error handling path in - rtw89_wow_enable() - -'ret' is not updated after several function calls in rtw89_wow_enable(). -This prevent error handling from working. - -Add the missing assignments. - -Fixes: 19e28c7fcc74 ("wifi: rtw89: add WoWLAN function support") -Signed-off-by: Christophe JAILLET -Acked-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/32320176eeff1c635baeea25ef0e87d116859e65.1668354083.git.christophe.jaillet@wanadoo.fr ---- - drivers/net/wireless/realtek/rtw89/wow.c | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/wow.c -+++ b/drivers/net/wireless/realtek/rtw89/wow.c -@@ -744,13 +744,13 @@ static int rtw89_wow_enable(struct rtw89 - goto out; - } - -- rtw89_wow_swap_fw(rtwdev, true); -+ ret = rtw89_wow_swap_fw(rtwdev, true); - if (ret) { - rtw89_err(rtwdev, "wow: failed to swap to wow fw\n"); - goto out; - } - -- rtw89_wow_fw_start(rtwdev); -+ ret = rtw89_wow_fw_start(rtwdev); - if (ret) { - rtw89_err(rtwdev, "wow: failed to let wow fw start\n"); - goto out; -@@ -758,7 +758,7 @@ static int rtw89_wow_enable(struct rtw89 - - rtw89_wow_enter_lps(rtwdev); - -- rtw89_wow_enable_trx_post(rtwdev); -+ ret = rtw89_wow_enable_trx_post(rtwdev); - if (ret) { - rtw89_err(rtwdev, "wow: failed to enable trx_post\n"); - goto out; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-063-wifi-rtw89-8852b-correct-TX-power-controlled-by-BT-c.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-063-wifi-rtw89-8852b-correct-TX-power-controlled-by-BT-c.patch deleted file mode 100644 index 6af33c279..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-063-wifi-rtw89-8852b-correct-TX-power-controlled-by-BT-c.patch +++ /dev/null @@ -1,63 +0,0 @@ -From 79ca91a3c1f1e5d871f393791e7538f9386a7711 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Thu, 17 Nov 2022 14:18:32 +0800 -Subject: [PATCH 063/149] wifi: rtw89: 8852b: correct TX power controlled by - BT-coexistence - -When coexistence mechanism is under free-run mode, it could adjust WiFi -and BT TX power to avoid interference with each other. For other cases, -it should keep original TX power from regular predefined tables, so -set correct values to 255 for these cases. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221117061832.42057-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 30 +++++++++---------- - 1 file changed, 15 insertions(+), 15 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -318,27 +318,27 @@ static const struct rtw89_dig_regs rtw88 - }; - - static const struct rtw89_btc_rf_trx_para rtw89_btc_8852b_rf_ul[] = { -- {15, 0, 0, 7}, /* 0 -> original */ -- {15, 2, 0, 7}, /* 1 -> for BT-connected ACI issue && BTG co-rx */ -- {15, 0, 0, 7}, /* 2 ->reserved for shared-antenna */ -- {15, 0, 0, 7}, /* 3- >reserved for shared-antenna */ -- {15, 0, 0, 7}, /* 4 ->reserved for shared-antenna */ -- {15, 0, 0, 7}, /* the below id is for non-shared-antenna free-run */ -+ {255, 0, 0, 7}, /* 0 -> original */ -+ {255, 2, 0, 7}, /* 1 -> for BT-connected ACI issue && BTG co-rx */ -+ {255, 0, 0, 7}, /* 2 ->reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* 3- >reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* 4 ->reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* the below id is for non-shared-antenna free-run */ - {6, 1, 0, 7}, - {13, 1, 0, 7}, - {13, 1, 0, 7} - }; - - static const struct rtw89_btc_rf_trx_para rtw89_btc_8852b_rf_dl[] = { -- {15, 0, 0, 7}, /* 0 -> original */ -- {15, 2, 0, 7}, /* 1 -> reserved for shared-antenna */ -- {15, 0, 0, 7}, /* 2 ->reserved for shared-antenna */ -- {15, 0, 0, 7}, /* 3- >reserved for shared-antenna */ -- {15, 0, 0, 7}, /* 4 ->reserved for shared-antenna */ -- {15, 0, 0, 7}, /* the below id is for non-shared-antenna free-run */ -- {15, 1, 0, 7}, -- {15, 1, 0, 7}, -- {15, 1, 0, 7} -+ {255, 0, 0, 7}, /* 0 -> original */ -+ {255, 2, 0, 7}, /* 1 -> reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* 2 ->reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* 3- >reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* 4 ->reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* the below id is for non-shared-antenna free-run */ -+ {255, 1, 0, 7}, -+ {255, 1, 0, 7}, -+ {255, 1, 0, 7} - }; - - static const struct rtw89_btc_fbtc_mreg rtw89_btc_8852b_mon_reg[] = { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-064-wifi-rtw89-read-CFO-from-FD-or-preamble-CFO-field-of.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-064-wifi-rtw89-read-CFO-from-FD-or-preamble-CFO-field-of.patch deleted file mode 100644 index d6c190b59..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-064-wifi-rtw89-read-CFO-from-FD-or-preamble-CFO-field-of.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 10cd4092f67eaf0cade4f50c68ecb055d4ee3a93 Mon Sep 17 00:00:00 2001 -From: Eric Huang -Date: Thu, 17 Nov 2022 14:30:00 +0800 -Subject: [PATCH 064/149] wifi: rtw89: read CFO from FD or preamble CFO field - of phy status ie_type 1 accordingly - -Add macro to get FD(frequency domain) CFO field from ie_type 1, and correct -the naming for preamble CFO field. Each IC could assign the CFO source to -either FD CFO or preamble CFO in chip_info. Based on the suggestion from HW -designer, rtw8852b and its derived versions will have better CFO tracking -performance with FD CFO. - -Signed-off-by: Eric Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221117063001.42967-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 6 +++++- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 1 + - drivers/net/wireless/realtek/rtw89/txrx.h | 4 +++- - 6 files changed, 12 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1196,7 +1196,11 @@ static void rtw89_core_parse_phy_status_ - if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6) - return; - /* sign conversion for S(12,2) */ -- cfo = sign_extend32(RTW89_GET_PHY_STS_IE01_CFO(addr), 11); -+ if (rtwdev->chip->cfo_src_fd) -+ cfo = sign_extend32(RTW89_GET_PHY_STS_IE01_FD_CFO(addr), 11); -+ else -+ cfo = sign_extend32(RTW89_GET_PHY_STS_IE01_PREMB_CFO(addr), 11); -+ - rtw89_phy_cfo_parse(rtwdev, cfo, phy_ppdu); - } - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2755,6 +2755,7 @@ struct rtw89_chip_info { - u32 c2h_ctrl_reg; - const u32 *c2h_regs; - const struct rtw89_page_regs *page_regs; -+ bool cfo_src_fd; - const struct rtw89_reg_def *dcfo_comp; - u8 dcfo_comp_sft; - const struct rtw89_imr_info *imr_info; ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -2143,6 +2143,7 @@ const struct rtw89_chip_info rtw8852a_ch - .c2h_ctrl_reg = R_AX_C2HREG_CTRL, - .c2h_regs = rtw8852a_c2h_regs, - .page_regs = &rtw8852a_page_regs, -+ .cfo_src_fd = false, - .dcfo_comp = &rtw8852a_dcfo_comp, - .dcfo_comp_sft = 3, - .imr_info = &rtw8852a_imr_info, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2512,6 +2512,7 @@ const struct rtw89_chip_info rtw8852b_ch - .c2h_ctrl_reg = R_AX_C2HREG_CTRL, - .c2h_regs = rtw8852b_c2h_regs, - .page_regs = &rtw8852b_page_regs, -+ .cfo_src_fd = true, - .dcfo_comp = &rtw8852b_dcfo_comp, - .dcfo_comp_sft = 3, - .imr_info = &rtw8852b_imr_info, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2953,6 +2953,7 @@ const struct rtw89_chip_info rtw8852c_ch - .c2h_ctrl_reg = R_AX_C2HREG_CTRL_V1, - .c2h_regs = rtw8852c_c2h_regs, - .page_regs = &rtw8852c_page_regs, -+ .cfo_src_fd = false, - .dcfo_comp = &rtw8852c_dcfo_comp, - .dcfo_comp_sft = 5, - .imr_info = &rtw8852c_imr_info, ---- a/drivers/net/wireless/realtek/rtw89/txrx.h -+++ b/drivers/net/wireless/realtek/rtw89/txrx.h -@@ -298,7 +298,9 @@ - le32_get_bits(*((const __le32 *)ie), GENMASK(11, 5)) - #define RTW89_GET_PHY_STS_IE01_CH_IDX(ie) \ - le32_get_bits(*((const __le32 *)ie), GENMASK(23, 16)) --#define RTW89_GET_PHY_STS_IE01_CFO(ie) \ -+#define RTW89_GET_PHY_STS_IE01_FD_CFO(ie) \ -+ le32_get_bits(*((const __le32 *)(ie) + 1), GENMASK(19, 8)) -+#define RTW89_GET_PHY_STS_IE01_PREMB_CFO(ie) \ - le32_get_bits(*((const __le32 *)(ie) + 1), GENMASK(31, 20)) - - enum rtw89_tx_channel { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-065-wifi-rtw89-switch-BANDEDGE-and-TX_SHAPE-based-on-OFD.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-065-wifi-rtw89-switch-BANDEDGE-and-TX_SHAPE-based-on-OFD.patch deleted file mode 100644 index 6c817d8c2..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-065-wifi-rtw89-switch-BANDEDGE-and-TX_SHAPE-based-on-OFD.patch +++ /dev/null @@ -1,302 +0,0 @@ -From 29136c95fdc5d9bbfb56131408388fefdba4ed95 Mon Sep 17 00:00:00 2001 -From: Eric Huang -Date: Thu, 17 Nov 2022 14:30:01 +0800 -Subject: [PATCH 065/149] wifi: rtw89: switch BANDEDGE and TX_SHAPE based on - OFDMA trigger frame - -There are some registers for transmit waveform control, two of them used -in this change are for BANDEDGE and TX_SHAPE control. BANDEDGE controls -whether to apply band edge filter to transmit waveform. TX_SHAPE controls -whether to apply triangular mask to transmit waveform. It is found for -some chip, these two should be turned off during OFDMA UL traffic for -better performance. - -Signed-off-by: Eric Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221117063001.42967-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 2 + - drivers/net/wireless/realtek/rtw89/core.h | 9 ++ - drivers/net/wireless/realtek/rtw89/debug.h | 1 + - drivers/net/wireless/realtek/rtw89/phy.c | 127 +++++++++++++++++- - drivers/net/wireless/realtek/rtw89/phy.h | 5 + - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 1 + - 8 files changed, 146 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -2237,6 +2237,7 @@ static void rtw89_track_work(struct work - rtw89_phy_ra_update(rtwdev); - rtw89_phy_cfo_track(rtwdev); - rtw89_phy_tx_path_div_track(rtwdev); -+ rtw89_phy_ul_tb_ctrl_track(rtwdev); - - if (rtwdev->lps_enabled && !rtwdev->btc.lps) - rtw89_enter_lps_track(rtwdev); -@@ -2560,6 +2561,7 @@ int rtw89_core_sta_assoc(struct rtw89_de - rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, - BTC_ROLE_MSTS_STA_CONN_END); - rtw89_core_get_no_ul_ofdma_htc(rtwdev, &rtwsta->htc_template); -+ rtw89_phy_ul_tb_assoc(rtwdev, rtwvif); - } - - return ret; ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2261,6 +2261,8 @@ struct rtw89_vif { - bool wowlan_magic; - bool is_hesta; - bool last_a_ctrl; -+ bool dyn_tb_bedge_en; -+ u8 def_tri_idx; - struct work_struct update_beacon_work; - struct rtw89_addr_cam_entry addr_cam; - struct rtw89_bssid_cam_entry bssid_cam; -@@ -2646,6 +2648,11 @@ struct rtw89_dig_regs { - struct rtw89_reg_def p1_s20_pagcugc_en; - }; - -+struct rtw89_phy_ul_tb_info { -+ bool dyn_tb_tri_en; -+ u8 def_if_bandedge; -+}; -+ - struct rtw89_chip_info { - enum rtw89_core_chip_id chip_id; - const struct rtw89_chip_ops *ops; -@@ -2663,6 +2670,7 @@ struct rtw89_chip_info { - u8 support_chanctx_num; - u8 support_bands; - bool support_bw160; -+ bool support_ul_tb_ctrl; - bool hw_sec_hdr; - u8 rf_path_num; - u8 tx_nss; -@@ -3585,6 +3593,7 @@ struct rtw89_dev { - struct rtw89_phy_ch_info ch_info; - struct rtw89_phy_bb_gain_info bb_gain; - struct rtw89_phy_efuse_gain efuse_gain; -+ struct rtw89_phy_ul_tb_info ul_tb_info; - - struct delayed_work track_work; - struct delayed_work coex_act1_work; ---- a/drivers/net/wireless/realtek/rtw89/debug.h -+++ b/drivers/net/wireless/realtek/rtw89/debug.h -@@ -27,6 +27,7 @@ enum rtw89_debug_mask { - RTW89_DBG_SAR = BIT(16), - RTW89_DBG_STATE = BIT(17), - RTW89_DBG_WOW = BIT(18), -+ RTW89_DBG_UL_TB = BIT(19), - - RTW89_DBG_UNEXP = BIT(31), - }; ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -2,6 +2,7 @@ - /* Copyright(c) 2019-2020 Realtek Corporation - */ - -+#include "coex.h" - #include "debug.h" - #include "fw.h" - #include "mac.h" -@@ -9,7 +10,7 @@ - #include "ps.h" - #include "reg.h" - #include "sar.h" --#include "coex.h" -+#include "util.h" - - static u16 get_max_amsdu_len(struct rtw89_dev *rtwdev, - const struct rtw89_ra_report *report) -@@ -2794,6 +2795,129 @@ void rtw89_phy_cfo_parse(struct rtw89_de - cfo->packet_count++; - } - -+void rtw89_phy_ul_tb_assoc(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; -+ -+ if (!chip->support_ul_tb_ctrl) -+ return; -+ -+ rtwvif->def_tri_idx = -+ rtw89_phy_read32_mask(rtwdev, R_DCFO_OPT, B_TXSHAPE_TRIANGULAR_CFG); -+ -+ if (chip->chip_id == RTL8852B && rtwdev->hal.cv > CHIP_CBV) -+ rtwvif->dyn_tb_bedge_en = false; -+ else if (chan->band_type >= RTW89_BAND_5G && -+ chan->band_width >= RTW89_CHANNEL_WIDTH_40) -+ rtwvif->dyn_tb_bedge_en = true; -+ else -+ rtwvif->dyn_tb_bedge_en = false; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_UL_TB, -+ "[ULTB] def_if_bandedge=%d, def_tri_idx=%d\n", -+ ul_tb_info->def_if_bandedge, rtwvif->def_tri_idx); -+ rtw89_debug(rtwdev, RTW89_DBG_UL_TB, -+ "[ULTB] dyn_tb_begde_en=%d, dyn_tb_tri_en=%d\n", -+ rtwvif->dyn_tb_bedge_en, ul_tb_info->dyn_tb_tri_en); -+} -+ -+struct rtw89_phy_ul_tb_check_data { -+ bool valid; -+ bool high_tf_client; -+ bool low_tf_client; -+ bool dyn_tb_bedge_en; -+ u8 def_tri_idx; -+}; -+ -+static -+void rtw89_phy_ul_tb_ctrl_check(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, -+ struct rtw89_phy_ul_tb_check_data *ul_tb_data) -+{ -+ struct rtw89_traffic_stats *stats = &rtwdev->stats; -+ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); -+ -+ if (rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION) -+ return; -+ -+ if (!vif->cfg.assoc) -+ return; -+ -+ if (stats->rx_tf_periodic > UL_TB_TF_CNT_L2H_TH) -+ ul_tb_data->high_tf_client = true; -+ else if (stats->rx_tf_periodic < UL_TB_TF_CNT_H2L_TH) -+ ul_tb_data->low_tf_client = true; -+ -+ ul_tb_data->valid = true; -+ ul_tb_data->def_tri_idx = rtwvif->def_tri_idx; -+ ul_tb_data->dyn_tb_bedge_en = rtwvif->dyn_tb_bedge_en; -+} -+ -+void rtw89_phy_ul_tb_ctrl_track(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; -+ struct rtw89_phy_ul_tb_check_data ul_tb_data = {}; -+ struct rtw89_vif *rtwvif; -+ -+ if (!chip->support_ul_tb_ctrl) -+ return; -+ -+ if (rtwdev->total_sta_assoc != 1) -+ return; -+ -+ rtw89_for_each_rtwvif(rtwdev, rtwvif) -+ rtw89_phy_ul_tb_ctrl_check(rtwdev, rtwvif, &ul_tb_data); -+ -+ if (!ul_tb_data.valid) -+ return; -+ -+ if (ul_tb_data.dyn_tb_bedge_en) { -+ if (ul_tb_data.high_tf_client) { -+ rtw89_phy_write32_mask(rtwdev, R_BANDEDGE, B_BANDEDGE_EN, 0); -+ rtw89_debug(rtwdev, RTW89_DBG_UL_TB, -+ "[ULTB] Turn off if_bandedge\n"); -+ } else if (ul_tb_data.low_tf_client) { -+ rtw89_phy_write32_mask(rtwdev, R_BANDEDGE, B_BANDEDGE_EN, -+ ul_tb_info->def_if_bandedge); -+ rtw89_debug(rtwdev, RTW89_DBG_UL_TB, -+ "[ULTB] Set to default if_bandedge = %d\n", -+ ul_tb_info->def_if_bandedge); -+ } -+ } -+ -+ if (ul_tb_info->dyn_tb_tri_en) { -+ if (ul_tb_data.high_tf_client) { -+ rtw89_phy_write32_mask(rtwdev, R_DCFO_OPT, -+ B_TXSHAPE_TRIANGULAR_CFG, 0); -+ rtw89_debug(rtwdev, RTW89_DBG_UL_TB, -+ "[ULTB] Turn off Tx triangle\n"); -+ } else if (ul_tb_data.low_tf_client) { -+ rtw89_phy_write32_mask(rtwdev, R_DCFO_OPT, -+ B_TXSHAPE_TRIANGULAR_CFG, -+ ul_tb_data.def_tri_idx); -+ rtw89_debug(rtwdev, RTW89_DBG_UL_TB, -+ "[ULTB] Set to default tx_shap_idx = %d\n", -+ ul_tb_data.def_tri_idx); -+ } -+ } -+} -+ -+static void rtw89_phy_ul_tb_info_init(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_phy_ul_tb_info *ul_tb_info = &rtwdev->ul_tb_info; -+ -+ if (!chip->support_ul_tb_ctrl) -+ return; -+ -+ ul_tb_info->dyn_tb_tri_en = true; -+ ul_tb_info->def_if_bandedge = -+ rtw89_phy_read32_mask(rtwdev, R_BANDEDGE, B_BANDEDGE_EN); -+} -+ - static void rtw89_phy_stat_thermal_update(struct rtw89_dev *rtwdev) - { - struct rtw89_phy_stat *phystat = &rtwdev->phystat; -@@ -3980,6 +4104,7 @@ void rtw89_phy_dm_init(struct rtw89_dev - rtw89_physts_parsing_init(rtwdev); - rtw89_phy_dig_init(rtwdev); - rtw89_phy_cfo_init(rtwdev); -+ rtw89_phy_ul_tb_info_init(rtwdev); - - rtw89_phy_init_rf_nctl(rtwdev); - rtw89_chip_rfk_init(rtwdev); ---- a/drivers/net/wireless/realtek/rtw89/phy.h -+++ b/drivers/net/wireless/realtek/rtw89/phy.h -@@ -64,6 +64,9 @@ - #define MAX_CFO_TOLERANCE 30 - #define CFO_TF_CNT_TH 300 - -+#define UL_TB_TF_CNT_L2H_TH 100 -+#define UL_TB_TF_CNT_H2L_TH 70 -+ - #define CCX_MAX_PERIOD 2097 - #define CCX_MAX_PERIOD_UNIT 32 - #define MS_TO_4US_RATIO 250 -@@ -550,5 +553,7 @@ void rtw89_phy_set_bss_color(struct rtw8 - void rtw89_phy_tssi_ctrl_set_bandedge_cfg(struct rtw89_dev *rtwdev, - enum rtw89_mac_idx mac_idx, - enum rtw89_tssi_bandedge_cfg bandedge_cfg); -+void rtw89_phy_ul_tb_assoc(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); -+void rtw89_phy_ul_tb_ctrl_track(struct rtw89_dev *rtwdev); - - #endif ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -2082,6 +2082,7 @@ const struct rtw89_chip_info rtw8852a_ch - .support_bands = BIT(NL80211_BAND_2GHZ) | - BIT(NL80211_BAND_5GHZ), - .support_bw160 = false, -+ .support_ul_tb_ctrl = false, - .hw_sec_hdr = false, - .rf_path_num = 2, - .tx_nss = 2, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2452,6 +2452,7 @@ const struct rtw89_chip_info rtw8852b_ch - .support_bands = BIT(NL80211_BAND_2GHZ) | - BIT(NL80211_BAND_5GHZ), - .support_bw160 = false, -+ .support_ul_tb_ctrl = true, - .hw_sec_hdr = false, - .rf_path_num = 2, - .tx_nss = 2, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2891,6 +2891,7 @@ const struct rtw89_chip_info rtw8852c_ch - BIT(NL80211_BAND_5GHZ) | - BIT(NL80211_BAND_6GHZ), - .support_bw160 = true, -+ .support_ul_tb_ctrl = false, - .hw_sec_hdr = true, - .rf_path_num = 2, - .tx_nss = 2, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-066-wifi-rtw89-avoid-inaccessible-IO-operations-during-d.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-066-wifi-rtw89-avoid-inaccessible-IO-operations-during-d.patch deleted file mode 100644 index a84eaa396..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-066-wifi-rtw89-avoid-inaccessible-IO-operations-during-d.patch +++ /dev/null @@ -1,73 +0,0 @@ -From ac3a9f1838d8f5e5f9c8b6e2582b65c48a1e7bc1 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Thu, 17 Nov 2022 16:52:35 +0800 -Subject: [PATCH 066/149] wifi: rtw89: avoid inaccessible IO operations during - doing change_interface() - -During doing change_interface(), hardware is power-off, so some components -are inaccessible and return error. This causes things unexpected, and we -don't have a warning message for that. So, ignore some IO operations in -this situation, and add a warning message to indicate something wrong. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221117085235.53777-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - drivers/net/wireless/realtek/rtw89/mac.c | 7 +++++++ - drivers/net/wireless/realtek/rtw89/mac80211.c | 11 ++++++++++- - 3 files changed, 18 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2968,6 +2968,7 @@ enum rtw89_flags { - RTW89_FLAG_CRASH_SIMULATING, - RTW89_FLAG_WOWLAN, - RTW89_FLAG_FORBIDDEN_TRACK_WROK, -+ RTW89_FLAG_CHANGING_INTERFACE, - - NUM_OF_RTW89_FLAGS, - }; ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -3600,6 +3600,13 @@ int rtw89_mac_set_macid_pause(struct rtw - u8 grp = macid >> 5; - int ret; - -+ /* If this is called by change_interface() in the case of P2P, it could -+ * be power-off, so ignore this operation. -+ */ -+ if (test_bit(RTW89_FLAG_CHANGING_INTERFACE, rtwdev->flags) && -+ !test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) -+ return 0; -+ - ret = rtw89_mac_check_mac_en(rtwdev, RTW89_MAC_0, RTW89_CMAC_SEL); - if (ret) - return ret; ---- a/drivers/net/wireless/realtek/rtw89/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -174,6 +174,9 @@ static int rtw89_ops_change_interface(st - enum nl80211_iftype type, bool p2p) - { - struct rtw89_dev *rtwdev = hw->priv; -+ int ret; -+ -+ set_bit(RTW89_FLAG_CHANGING_INTERFACE, rtwdev->flags); - - rtw89_debug(rtwdev, RTW89_DBG_STATE, "change vif %pM (%d)->(%d), p2p (%d)->(%d)\n", - vif->addr, vif->type, type, vif->p2p, p2p); -@@ -183,7 +186,13 @@ static int rtw89_ops_change_interface(st - vif->type = type; - vif->p2p = p2p; - -- return rtw89_ops_add_interface(hw, vif); -+ ret = rtw89_ops_add_interface(hw, vif); -+ if (ret) -+ rtw89_warn(rtwdev, "failed to change interface %d\n", ret); -+ -+ clear_bit(RTW89_FLAG_CHANGING_INTERFACE, rtwdev->flags); -+ -+ return ret; - } - - static void rtw89_ops_configure_filter(struct ieee80211_hw *hw, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-068-wifi-rtw89-enable-mac80211-virtual-monitor-interface.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-068-wifi-rtw89-enable-mac80211-virtual-monitor-interface.patch deleted file mode 100644 index 4eb6b5ee7..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-068-wifi-rtw89-enable-mac80211-virtual-monitor-interface.patch +++ /dev/null @@ -1,47 +0,0 @@ -From cd9b6b3baf5278c73c91e242d41387684fc7f8d8 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Fri, 25 Nov 2022 15:24:14 +0800 -Subject: [PATCH 068/149] wifi: rtw89: enable mac80211 virtual monitor - interface - -For running with mac80211 channel context ops and using only as monitor, -we need to enable WANT_MONITOR_VIF to let mac80211 process virtual monitor -interface. Then, we are able to set channel on the monitor from user space. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221125072416.94752-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 6 ++++++ - 1 file changed, 6 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1405,6 +1405,9 @@ static void rtw89_vif_rx_stats_iter(void - struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; - const u8 *bssid = iter_data->bssid; - -+ if (!vif->bss_conf.bssid) -+ return; -+ - if (ieee80211_is_trigger(hdr->frame_control)) { - rtw89_stats_trigger_frame(rtwdev, vif, skb); - return; -@@ -2386,6 +2389,8 @@ void rtw89_vif_type_mapping(struct ieee8 - rtwvif->self_role = RTW89_SELF_ROLE_CLIENT; - rtwvif->addr_cam.sec_ent_mode = RTW89_ADDR_CAM_SEC_NORMAL; - break; -+ case NL80211_IFTYPE_MONITOR: -+ break; - default: - WARN_ON(1); - break; -@@ -3269,6 +3274,7 @@ static int rtw89_core_register_hw(struct - ieee80211_hw_set(hw, SUPPORTS_DYNAMIC_PS); - ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS); - ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID); -+ ieee80211_hw_set(hw, WANT_MONITOR_VIF); - - hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | - BIT(NL80211_IFTYPE_AP) | diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-069-wifi-rtw89-add-HE-radiotap-for-monitor-mode.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-069-wifi-rtw89-add-HE-radiotap-for-monitor-mode.patch deleted file mode 100644 index bba2a5438..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-069-wifi-rtw89-add-HE-radiotap-for-monitor-mode.patch +++ /dev/null @@ -1,102 +0,0 @@ -From 51e8ed4e44b5efcf8da2c1f3478e52120a12cdf8 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 25 Nov 2022 15:24:15 +0800 -Subject: [PATCH 069/149] wifi: rtw89: add HE radiotap for monitor mode - -With basic HE radiotap, we can check data rate in sniffer data. To store -the radiotap data, we reserve headroom of aligned 64 bytes, and then -update HE radiotap in monitor mode, so it doesn't affect performance in -normal mode. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221125072416.94752-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 22 ++++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/core.h | 18 ++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/pci.c | 2 +- - 3 files changed, 41 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1480,6 +1480,27 @@ static void rtw89_core_hw_to_sband_rate( - rx_status->rate_idx -= 4; - } - -+static void rtw89_core_update_radiotap(struct rtw89_dev *rtwdev, -+ struct sk_buff *skb, -+ struct ieee80211_rx_status *rx_status) -+{ -+ static const struct ieee80211_radiotap_he known_he = { -+ .data1 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA1_DATA_MCS_KNOWN | -+ IEEE80211_RADIOTAP_HE_DATA1_BW_RU_ALLOC_KNOWN), -+ .data2 = cpu_to_le16(IEEE80211_RADIOTAP_HE_DATA2_GI_KNOWN), -+ }; -+ struct ieee80211_radiotap_he *he; -+ -+ if (!(rtwdev->hw->conf.flags & IEEE80211_CONF_MONITOR)) -+ return; -+ -+ if (rx_status->encoding == RX_ENC_HE) { -+ rx_status->flag |= RX_FLAG_RADIOTAP_HE; -+ he = skb_push(skb, sizeof(*he)); -+ *he = known_he; -+ } -+} -+ - static void rtw89_core_rx_to_mac80211(struct rtw89_dev *rtwdev, - struct rtw89_rx_phy_ppdu *phy_ppdu, - struct rtw89_rx_desc_info *desc_info, -@@ -1494,6 +1515,7 @@ static void rtw89_core_rx_to_mac80211(st - - rtw89_core_hw_to_sband_rate(rx_status); - rtw89_core_rx_stats(rtwdev, phy_ppdu, desc_info, skb_ppdu); -+ rtw89_core_update_radiotap(rtwdev, skb_ppdu, rx_status); - /* In low power mode, it does RX in thread context. */ - local_bh_disable(); - ieee80211_rx_napi(rtwdev->hw, NULL, skb_ppdu, napi); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -35,6 +35,7 @@ extern const struct ieee80211_ops rtw89_ - #define RSSI_FACTOR 1 - #define RTW89_RSSI_RAW_TO_DBM(rssi) ((s8)((rssi) >> RSSI_FACTOR) - MAX_RSSI) - #define RTW89_TX_DIV_RSSI_RAW_TH (2 << RSSI_FACTOR) -+#define RTW89_RADIOTAP_ROOM ALIGN(sizeof(struct ieee80211_radiotap_he), 64) - - #define RTW89_HTC_MASK_VARIANT GENMASK(1, 0) - #define RTW89_HTC_VARIANT_HE 3 -@@ -4383,6 +4384,23 @@ static inline struct rtw89_fw_suit *rtw8 - return &fw_info->normal; - } - -+static inline struct sk_buff *rtw89_alloc_skb_for_rx(struct rtw89_dev *rtwdev, -+ unsigned int length) -+{ -+ struct sk_buff *skb; -+ -+ if (rtwdev->hw->conf.flags & IEEE80211_CONF_MONITOR) { -+ skb = dev_alloc_skb(length + RTW89_RADIOTAP_ROOM); -+ if (!skb) -+ return NULL; -+ -+ skb_reserve(skb, RTW89_RADIOTAP_ROOM); -+ return skb; -+ } -+ -+ return dev_alloc_skb(length); -+} -+ - int rtw89_core_tx_write(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, - struct ieee80211_sta *sta, struct sk_buff *skb, int *qsel); - int rtw89_h2c_tx(struct rtw89_dev *rtwdev, ---- a/drivers/net/wireless/realtek/rtw89/pci.c -+++ b/drivers/net/wireless/realtek/rtw89/pci.c -@@ -267,7 +267,7 @@ static u32 rtw89_pci_rxbd_deliver_skbs(s - - rtw89_core_query_rxdesc(rtwdev, desc_info, skb->data, rxinfo_size); - -- new = dev_alloc_skb(desc_info->pkt_size); -+ new = rtw89_alloc_skb_for_rx(rtwdev, desc_info->pkt_size); - if (!new) - goto err_sync_device; - diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-070-wifi-rtw89-8852b-turn-off-PoP-function-in-monitor-mo.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-070-wifi-rtw89-8852b-turn-off-PoP-function-in-monitor-mo.patch deleted file mode 100644 index eaa254e04..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-070-wifi-rtw89-8852b-turn-off-PoP-function-in-monitor-mo.patch +++ /dev/null @@ -1,53 +0,0 @@ -From a215b2b7055f02d8f7666f457d442e77097bb604 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 25 Nov 2022 15:24:16 +0800 -Subject: [PATCH 070/149] wifi: rtw89: 8852b: turn off PoP function in monitor - mode - -PoP stands for Packet on Packet that can improve performance in noisy -environment, but it could get RX stuck suddenly. In normal mode, firmware -can help to resolve the stuck, but firmware doesn't work in monitor mode. -Therefore, turn off PoP to avoid RX stuck. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221125072416.94752-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 2 ++ - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 7 +++++++ - 2 files changed, 9 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -4238,6 +4238,8 @@ - #define R_P1_NBIIDX 0x4770 - #define B_P1_NBIIDX_VAL GENMASK(11, 0) - #define B_P1_NBIIDX_NOTCH_EN BIT(12) -+#define R_PKT_CTRL 0x47D4 -+#define B_PKT_POP_EN BIT(8) - #define R_SEG0R_PD 0x481C - #define R_SEG0R_PD_V1 0x4860 - #define B_SEG0R_PD_SPATIAL_REUSE_EN_MSK_V1 BIT(30) ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -1411,6 +1411,12 @@ static void rtw8852b_bb_sethw(struct rtw - rtw89_phy_read32_mask(rtwdev, R_P1_RPL1, B_P0_RPL1_BIAS_MASK); - } - -+static void rtw8852b_bb_set_pop(struct rtw89_dev *rtwdev) -+{ -+ if (rtwdev->hw->conf.flags & IEEE80211_CONF_MONITOR) -+ rtw89_phy_write32_clr(rtwdev, R_PKT_CTRL, B_PKT_POP_EN); -+} -+ - static void rtw8852b_set_channel_bb(struct rtw89_dev *rtwdev, const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx) - { -@@ -1441,6 +1447,7 @@ static void rtw8852b_set_channel_bb(stru - rtw89_phy_write32_mask(rtwdev, R_MAC_PIN_SEL, B_CH_IDX_SEG0, - chan->primary_channel); - rtw8852b_5m_mask(rtwdev, chan, phy_idx); -+ rtw8852b_bb_set_pop(rtwdev); - rtw8852b_bb_reset_all(rtwdev, phy_idx); - } - diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-071-wifi-rtw89-rfk-rename-rtw89_mcc_info-to-rtw89_rfk_mc.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-071-wifi-rtw89-rfk-rename-rtw89_mcc_info-to-rtw89_rfk_mc.patch deleted file mode 100644 index 9c16952af..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-071-wifi-rtw89-rfk-rename-rtw89_mcc_info-to-rtw89_rfk_mc.patch +++ /dev/null @@ -1,140 +0,0 @@ -From 38f25dec521edfa289fa0b829676927b13fede91 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Tue, 29 Nov 2022 16:31:25 +0800 -Subject: [PATCH 071/149] wifi: rtw89: rfk: rename rtw89_mcc_info to - rtw89_rfk_mcc_info - -The `rtw89_mcc_info mcc` is only for RFK MCC stuffs instead of common -MCC management info. Replace it with `rtw89_rfk_mcc_info rfk_mcc` to -avoid confusion and reserve `struct rtw89_mcc_info mcc` for MCC management -code. - -(No logic changes.) - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221129083130.45708-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 4 ++-- - drivers/net/wireless/realtek/rtw89/fw.c | 10 +++++----- - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 4 ++-- - .../net/wireless/realtek/rtw89/rtw8852c_rfk.c | 20 +++++++++---------- - 4 files changed, 19 insertions(+), 19 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3032,7 +3032,7 @@ struct rtw89_dack_info { - #define RTW89_IQK_CHS_NR 2 - #define RTW89_IQK_PATH_NR 4 - --struct rtw89_mcc_info { -+struct rtw89_rfk_mcc_info { - u8 ch[RTW89_IQK_CHS_NR]; - u8 band[RTW89_IQK_CHS_NR]; - u8 table_idx; -@@ -3578,7 +3578,7 @@ struct rtw89_dev { - struct rtw89_dack_info dack; - struct rtw89_iqk_info iqk; - struct rtw89_dpk_info dpk; -- struct rtw89_mcc_info mcc; -+ struct rtw89_rfk_mcc_info rfk_mcc; - struct rtw89_lck_info lck; - struct rtw89_rx_dck_info rx_dck; - bool is_tssi_mode[RF_PATH_MAX]; ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -2263,7 +2263,7 @@ fail: - int rtw89_fw_h2c_rf_ntfy_mcc(struct rtw89_dev *rtwdev) - { - const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -- struct rtw89_mcc_info *mcc_info = &rtwdev->mcc; -+ struct rtw89_rfk_mcc_info *rfk_mcc = &rtwdev->rfk_mcc; - struct rtw89_fw_h2c_rf_get_mccch *mccch; - struct sk_buff *skb; - int ret; -@@ -2276,10 +2276,10 @@ int rtw89_fw_h2c_rf_ntfy_mcc(struct rtw8 - skb_put(skb, sizeof(*mccch)); - mccch = (struct rtw89_fw_h2c_rf_get_mccch *)skb->data; - -- mccch->ch_0 = cpu_to_le32(mcc_info->ch[0]); -- mccch->ch_1 = cpu_to_le32(mcc_info->ch[1]); -- mccch->band_0 = cpu_to_le32(mcc_info->band[0]); -- mccch->band_1 = cpu_to_le32(mcc_info->band[1]); -+ mccch->ch_0 = cpu_to_le32(rfk_mcc->ch[0]); -+ mccch->ch_1 = cpu_to_le32(rfk_mcc->ch[1]); -+ mccch->band_0 = cpu_to_le32(rfk_mcc->band[0]); -+ mccch->band_1 = cpu_to_le32(rfk_mcc->band[1]); - mccch->current_channel = cpu_to_le32(chan->channel); - mccch->current_band_type = cpu_to_le32(chan->band_type); - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -1832,11 +1832,11 @@ static void rtw8852c_set_channel_help(st - - static void rtw8852c_rfk_init(struct rtw89_dev *rtwdev) - { -- struct rtw89_mcc_info *mcc_info = &rtwdev->mcc; -+ struct rtw89_rfk_mcc_info *rfk_mcc = &rtwdev->rfk_mcc; - - rtwdev->is_tssi_mode[RF_PATH_A] = false; - rtwdev->is_tssi_mode[RF_PATH_B] = false; -- memset(mcc_info, 0, sizeof(*mcc_info)); -+ memset(rfk_mcc, 0, sizeof(*rfk_mcc)); - rtw8852c_lck_init(rtwdev); - - rtw8852c_rck(rtwdev); ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c -@@ -1030,9 +1030,9 @@ static bool _iqk_nbtxk(struct rtw89_dev - - static bool _lok_finetune_check(struct rtw89_dev *rtwdev, u8 path) - { -- struct rtw89_mcc_info *mcc_info = &rtwdev->mcc; -+ struct rtw89_rfk_mcc_info *rfk_mcc = &rtwdev->rfk_mcc; - struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -- u8 idx = mcc_info->table_idx; -+ u8 idx = rfk_mcc->table_idx; - bool is_fail1, is_fail2; - u32 val; - u32 core_i; -@@ -1375,10 +1375,10 @@ static void _iqk_afebb_restore(struct rt - - static void _iqk_preset(struct rtw89_dev *rtwdev, u8 path) - { -- struct rtw89_mcc_info *mcc_info = &rtwdev->mcc; -+ struct rtw89_rfk_mcc_info *rfk_mcc = &rtwdev->rfk_mcc; - u8 idx = 0; - -- idx = mcc_info->table_idx; -+ idx = rfk_mcc->table_idx; - rtw89_phy_write32_mask(rtwdev, R_COEF_SEL + (path << 8), B_COEF_SEL_IQC, idx); - rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT + (path << 8), B_CFIR_LUT_G3, idx); - rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); -@@ -3823,20 +3823,20 @@ void rtw8852c_set_channel_rf(struct rtw8 - void rtw8852c_mcc_get_ch_info(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) - { - const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -- struct rtw89_mcc_info *mcc_info = &rtwdev->mcc; -- u8 idx = mcc_info->table_idx; -+ struct rtw89_rfk_mcc_info *rfk_mcc = &rtwdev->rfk_mcc; -+ u8 idx = rfk_mcc->table_idx; - int i; - - for (i = 0; i < RTW89_IQK_CHS_NR; i++) { -- if (mcc_info->ch[idx] == 0) -+ if (rfk_mcc->ch[idx] == 0) - break; - if (++idx >= RTW89_IQK_CHS_NR) - idx = 0; - } - -- mcc_info->table_idx = idx; -- mcc_info->ch[idx] = chan->channel; -- mcc_info->band[idx] = chan->band_type; -+ rfk_mcc->table_idx = idx; -+ rfk_mcc->ch[idx] = chan->channel; -+ rfk_mcc->band[idx] = chan->band_type; - } - - void rtw8852c_rck(struct rtw89_dev *rtwdev) diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-072-wifi-rtw89-check-if-atomic-before-queuing-c2h.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-072-wifi-rtw89-check-if-atomic-before-queuing-c2h.patch deleted file mode 100644 index a400a19f2..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-072-wifi-rtw89-check-if-atomic-before-queuing-c2h.patch +++ /dev/null @@ -1,146 +0,0 @@ -From 860e8263ae92667a2002163886fd2ebd8c67f699 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Tue, 29 Nov 2022 16:31:26 +0800 -Subject: [PATCH 072/149] wifi: rtw89: check if atomic before queuing c2h - -Before queuing C2H work, we check atomicity of the C2H's handler first now. -If atomic or lock-free, handle it directly; otherwise, handle it with mutex -in work as previous. This prepares for MAC MCC C2Hs which require to be -processed directly. And, their handlers will be functions which can be -considered atomic. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221129083130.45708-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 47 ++++++++++++++++++++++-- - drivers/net/wireless/realtek/rtw89/fw.h | 14 +++++++ - drivers/net/wireless/realtek/rtw89/mac.c | 10 +++++ - drivers/net/wireless/realtek/rtw89/mac.h | 1 + - 4 files changed, 68 insertions(+), 4 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -11,6 +11,9 @@ - #include "phy.h" - #include "reg.h" - -+static void rtw89_fw_c2h_cmd_handle(struct rtw89_dev *rtwdev, -+ struct sk_buff *skb); -+ - static struct sk_buff *rtw89_fw_h2c_alloc_skb(struct rtw89_dev *rtwdev, u32 len, - bool header) - { -@@ -2382,8 +2385,43 @@ void rtw89_fw_free_all_early_h2c(struct - mutex_unlock(&rtwdev->mutex); - } - -+static void rtw89_fw_c2h_parse_attr(struct sk_buff *c2h) -+{ -+ struct rtw89_fw_c2h_attr *attr = RTW89_SKB_C2H_CB(c2h); -+ -+ attr->category = RTW89_GET_C2H_CATEGORY(c2h->data); -+ attr->class = RTW89_GET_C2H_CLASS(c2h->data); -+ attr->func = RTW89_GET_C2H_FUNC(c2h->data); -+ attr->len = RTW89_GET_C2H_LEN(c2h->data); -+} -+ -+static bool rtw89_fw_c2h_chk_atomic(struct rtw89_dev *rtwdev, -+ struct sk_buff *c2h) -+{ -+ struct rtw89_fw_c2h_attr *attr = RTW89_SKB_C2H_CB(c2h); -+ u8 category = attr->category; -+ u8 class = attr->class; -+ u8 func = attr->func; -+ -+ switch (category) { -+ default: -+ return false; -+ case RTW89_C2H_CAT_MAC: -+ return rtw89_mac_c2h_chk_atomic(rtwdev, class, func); -+ } -+} -+ - void rtw89_fw_c2h_irqsafe(struct rtw89_dev *rtwdev, struct sk_buff *c2h) - { -+ rtw89_fw_c2h_parse_attr(c2h); -+ if (!rtw89_fw_c2h_chk_atomic(rtwdev, c2h)) -+ goto enqueue; -+ -+ rtw89_fw_c2h_cmd_handle(rtwdev, c2h); -+ dev_kfree_skb_any(c2h); -+ return; -+ -+enqueue: - skb_queue_tail(&rtwdev->c2h_queue, c2h); - ieee80211_queue_work(rtwdev->hw, &rtwdev->c2h_work); - } -@@ -2391,10 +2429,11 @@ void rtw89_fw_c2h_irqsafe(struct rtw89_d - static void rtw89_fw_c2h_cmd_handle(struct rtw89_dev *rtwdev, - struct sk_buff *skb) - { -- u8 category = RTW89_GET_C2H_CATEGORY(skb->data); -- u8 class = RTW89_GET_C2H_CLASS(skb->data); -- u8 func = RTW89_GET_C2H_FUNC(skb->data); -- u16 len = RTW89_GET_C2H_LEN(skb->data); -+ struct rtw89_fw_c2h_attr *attr = RTW89_SKB_C2H_CB(skb); -+ u8 category = attr->category; -+ u8 class = attr->class; -+ u8 func = attr->func; -+ u16 len = attr->len; - bool dump = true; - - if (!test_bit(RTW89_FLAG_RUNNING, rtwdev->flags)) ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -2778,6 +2778,20 @@ static inline void RTW89_SET_FWCMD_TSF32 - #define RTW89_GET_C2H_LEN(c2h) \ - le32_get_bits(*((const __le32 *)(c2h) + 1), GENMASK(13, 0)) - -+struct rtw89_fw_c2h_attr { -+ u8 category; -+ u8 class; -+ u8 func; -+ u16 len; -+}; -+ -+static inline struct rtw89_fw_c2h_attr *RTW89_SKB_C2H_CB(struct sk_buff *skb) -+{ -+ static_assert(sizeof(skb->cb) >= sizeof(struct rtw89_fw_c2h_attr)); -+ -+ return (struct rtw89_fw_c2h_attr *)skb->cb; -+} -+ - #define RTW89_GET_C2H_LOG_SRT_PRT(c2h) (char *)((__le32 *)(c2h) + 2) - #define RTW89_GET_C2H_LOG_LEN(len) ((len) - RTW89_C2H_HEADER_LEN) - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -4208,6 +4208,16 @@ void (* const rtw89_mac_c2h_info_handler - [RTW89_MAC_C2H_FUNC_BCN_CNT] = rtw89_mac_c2h_bcn_cnt, - }; - -+bool rtw89_mac_c2h_chk_atomic(struct rtw89_dev *rtwdev, u8 class, u8 func) -+{ -+ switch (class) { -+ default: -+ return false; -+ case RTW89_MAC_C2H_CLASS_MCC: -+ return true; -+ } -+} -+ - void rtw89_mac_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb, - u32 len, u8 class, u8 func) - { ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -894,6 +894,7 @@ static inline int rtw89_chip_disable_bb_ - - u32 rtw89_mac_get_err_status(struct rtw89_dev *rtwdev); - int rtw89_mac_set_err_status(struct rtw89_dev *rtwdev, u32 err); -+bool rtw89_mac_c2h_chk_atomic(struct rtw89_dev *rtwdev, u8 class, u8 func); - void rtw89_mac_c2h_handle(struct rtw89_dev *rtwdev, struct sk_buff *skb, - u32 len, u8 class, u8 func); - int rtw89_mac_setup_phycap(struct rtw89_dev *rtwdev); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-073-wifi-rtw89-introduce-helpers-to-wait-complete-on-con.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-073-wifi-rtw89-introduce-helpers-to-wait-complete-on-con.patch deleted file mode 100644 index a714815e5..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-073-wifi-rtw89-introduce-helpers-to-wait-complete-on-con.patch +++ /dev/null @@ -1,136 +0,0 @@ -From 22b10cdb73921cfb28ccde5ce8b47d7fc434e7c6 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Tue, 29 Nov 2022 16:31:27 +0800 -Subject: [PATCH 073/149] wifi: rtw89: introduce helpers to wait/complete on - condition - -MCC (multi-channel concurrency) related H2Cs (host to chip commands) -require to wait for C2H (chip to host events) responses to judge the -execution result and data. We introduce helpers to assist this process. -Besides, we would like the helpers to be generic for use in driver even -outside of MCC H2C/C2H, so we make a independent patch for them. - -In the following, I describe the things first. -``` -(A) C2H is generated by FW, and then transferred upto driver. Hence, - driver cannot get it immediately without a bit waitting/blocking. - For this, we choose to use wait_for_completion_*() instead of - busy polling. -(B) From the driver management perspective, a scenario, e.g. MCC, - may have mulitple kind of H2C functions requiring this process - to wait for corresponding C2Hs. But, the driver management flow - uses mutex to protect each behavior. So, one scenario triggers - one H2C function at one time. To avoid rampant instances of - struct completion for each H2C function, we choose to use one - struct completion with one condition flag for one scenario. -(C) C2Hs, which H2Cs will be waitting for, cannot be ordered with - driver management flow, i.e. cannot enqueue work to the same - ordered workqueue and cannot lock by the same mutex, to prevent - H2C side from getting no C2H responses. So, those C2Hs are parsed - in interrupt context directly as done in previous commit. -(D) Following (C), the above underline H2Cs and C2Hs will be handled - in different contexts without sync. So, we use atomic_cmpxchg() - to compare and change the condition in atomic. -``` - -So, we introduce struct rtw89_wait_info which combines struct completion -and atomic_t. Then, the below are the descriptions for helper functions. -* rtw89_wait_for_cond() to wait for a completion based on a condition. -* rtw89_complete_cond() to complete a given condition and carry data. -Each rtw89_wait_info instance independently determines the meaning of -its waitting conditions. But, RTW89_WAIT_COND_IDLE (UINT_MAX) is reserved. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221129083130.45708-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 35 +++++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/core.h | 25 ++++++++++++++++ - 2 files changed, 60 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -2974,6 +2974,41 @@ void rtw89_core_update_beacon_work(struc - mutex_unlock(&rtwdev->mutex); - } - -+int rtw89_wait_for_cond(struct rtw89_wait_info *wait, unsigned int cond) -+{ -+ struct completion *cmpl = &wait->completion; -+ unsigned long timeout; -+ unsigned int cur; -+ -+ cur = atomic_cmpxchg(&wait->cond, RTW89_WAIT_COND_IDLE, cond); -+ if (cur != RTW89_WAIT_COND_IDLE) -+ return -EBUSY; -+ -+ timeout = wait_for_completion_timeout(cmpl, RTW89_WAIT_FOR_COND_TIMEOUT); -+ if (timeout == 0) { -+ atomic_set(&wait->cond, RTW89_WAIT_COND_IDLE); -+ return -ETIMEDOUT; -+ } -+ -+ if (wait->data.err) -+ return -EFAULT; -+ -+ return 0; -+} -+ -+void rtw89_complete_cond(struct rtw89_wait_info *wait, unsigned int cond, -+ const struct rtw89_completion_data *data) -+{ -+ unsigned int cur; -+ -+ cur = atomic_cmpxchg(&wait->cond, cond, RTW89_WAIT_COND_IDLE); -+ if (cur != cond) -+ return; -+ -+ wait->data = *data; -+ complete(&wait->completion); -+} -+ - int rtw89_core_start(struct rtw89_dev *rtwdev) - { - int ret; ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2812,6 +2812,28 @@ struct rtw89_mac_info { - u8 cpwm_seq_num; - }; - -+#define RTW89_COMPLETION_BUF_SIZE 24 -+#define RTW89_WAIT_COND_IDLE UINT_MAX -+ -+struct rtw89_completion_data { -+ bool err; -+ u8 buf[RTW89_COMPLETION_BUF_SIZE]; -+}; -+ -+struct rtw89_wait_info { -+ atomic_t cond; -+ struct completion completion; -+ struct rtw89_completion_data data; -+}; -+ -+#define RTW89_WAIT_FOR_COND_TIMEOUT msecs_to_jiffies(100) -+ -+static inline void rtw89_init_wait(struct rtw89_wait_info *wait) -+{ -+ init_completion(&wait->completion); -+ atomic_set(&wait->cond, RTW89_WAIT_COND_IDLE); -+} -+ - enum rtw89_fw_type { - RTW89_FW_NORMAL = 1, - RTW89_FW_WOWLAN = 3, -@@ -4469,6 +4491,9 @@ int rtw89_regd_init(struct rtw89_dev *rt - void rtw89_regd_notifier(struct wiphy *wiphy, struct regulatory_request *request); - void rtw89_traffic_stats_init(struct rtw89_dev *rtwdev, - struct rtw89_traffic_stats *stats); -+int rtw89_wait_for_cond(struct rtw89_wait_info *wait, unsigned int cond); -+void rtw89_complete_cond(struct rtw89_wait_info *wait, unsigned int cond, -+ const struct rtw89_completion_data *data); - int rtw89_core_start(struct rtw89_dev *rtwdev); - void rtw89_core_stop(struct rtw89_dev *rtwdev); - void rtw89_core_update_beacon_work(struct work_struct *work); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-074-wifi-rtw89-mac-process-MCC-related-C2H.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-074-wifi-rtw89-mac-process-MCC-related-C2H.patch deleted file mode 100644 index 52d130a19..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-074-wifi-rtw89-mac-process-MCC-related-C2H.patch +++ /dev/null @@ -1,382 +0,0 @@ -From ef9dff4cb491210518ad3d249919a0971eff601b Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Tue, 29 Nov 2022 16:31:28 +0800 -Subject: [PATCH 074/149] wifi: rtw89: mac: process MCC related C2H - -Process C2H(s) related to MCC (multi-channel concurrency). These handling, -which either call rtw89_complete_cond() or show message in debug mode, can -be considered atomic/lock-free. So, they should be safe to be processed -directly after C2H pre-check in previous patch. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221129083130.45708-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 2 + - drivers/net/wireless/realtek/rtw89/core.h | 5 + - drivers/net/wireless/realtek/rtw89/fw.h | 68 +++++++++ - drivers/net/wireless/realtek/rtw89/mac.c | 171 ++++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/mac.h | 34 +++++ - 5 files changed, 280 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -3132,6 +3132,8 @@ int rtw89_core_init(struct rtw89_dev *rt - mutex_init(&rtwdev->rf_mutex); - rtwdev->total_sta_assoc = 0; - -+ rtw89_init_wait(&rtwdev->mcc.wait); -+ - INIT_WORK(&rtwdev->c2h_work, rtw89_fw_c2h_work); - INIT_WORK(&rtwdev->ips_work, rtw89_ips_work); - skb_queue_head_init(&rtwdev->c2h_queue); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3547,6 +3547,10 @@ struct rtw89_wow_param { - struct list_head pkt_list; - }; - -+struct rtw89_mcc_info { -+ struct rtw89_wait_info wait; -+}; -+ - struct rtw89_dev { - struct ieee80211_hw *hw; - struct device *dev; -@@ -3557,6 +3561,7 @@ struct rtw89_dev { - const struct rtw89_chip_info *chip; - const struct rtw89_pci_info *pci_info; - struct rtw89_hal hal; -+ struct rtw89_mcc_info mcc; - struct rtw89_mac_info mac; - struct rtw89_fw_info fw; - struct rtw89_hci_info hci; ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -2859,6 +2859,55 @@ static inline struct rtw89_fw_c2h_attr * - #define RTW89_GET_MAC_C2H_SCANOFLD_BAND(c2h) \ - le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(25, 24)) - -+#define RTW89_GET_MAC_C2H_MCC_RCV_ACK_GROUP(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(1, 0)) -+#define RTW89_GET_MAC_C2H_MCC_RCV_ACK_H2C_FUNC(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(15, 8)) -+ -+#define RTW89_GET_MAC_C2H_MCC_REQ_ACK_GROUP(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(1, 0)) -+#define RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_RETURN(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(7, 2)) -+#define RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_FUNC(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(15, 8)) -+ -+struct rtw89_mac_mcc_tsf_rpt { -+ u32 macid_x; -+ u32 macid_y; -+ u32 tsf_x_low; -+ u32 tsf_x_high; -+ u32 tsf_y_low; -+ u32 tsf_y_high; -+}; -+ -+static_assert(sizeof(struct rtw89_mac_mcc_tsf_rpt) <= RTW89_COMPLETION_BUF_SIZE); -+ -+#define RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_X(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(7, 0)) -+#define RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_Y(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(15, 8)) -+#define RTW89_GET_MAC_C2H_MCC_TSF_RPT_GROUP(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(17, 16)) -+#define RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_X(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h) + 1), GENMASK(31, 0)) -+#define RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_X(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(31, 0)) -+#define RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_Y(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(31, 0)) -+#define RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_Y(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h) + 4), GENMASK(31, 0)) -+ -+#define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_STATUS(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(5, 0)) -+#define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_GROUP(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(7, 6)) -+#define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_MACID(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h)), GENMASK(15, 8)) -+#define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_LOW(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h) + 1), GENMASK(31, 0)) -+#define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_HIGH(c2h) \ -+ le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(31, 0)) -+ - #define RTW89_FW_HDR_SIZE 32 - #define RTW89_FW_SECTION_HDR_SIZE 16 - -@@ -2980,6 +3029,25 @@ struct rtw89_fw_h2c_rf_reg_info { - #define H2C_CL_BA_CAM 0xc - #define H2C_FUNC_MAC_BA_CAM 0x0 - -+/* CLASS 14 - MCC */ -+#define H2C_CL_MCC 0xe -+enum rtw89_mcc_h2c_func { -+ H2C_FUNC_ADD_MCC = 0x0, -+ H2C_FUNC_START_MCC = 0x1, -+ H2C_FUNC_STOP_MCC = 0x2, -+ H2C_FUNC_DEL_MCC_GROUP = 0x3, -+ H2C_FUNC_RESET_MCC_GROUP = 0x4, -+ H2C_FUNC_MCC_REQ_TSF = 0x5, -+ H2C_FUNC_MCC_MACID_BITMAP = 0x6, -+ H2C_FUNC_MCC_SYNC = 0x7, -+ H2C_FUNC_MCC_SET_DURATION = 0x8, -+ -+ NUM_OF_RTW89_MCC_H2C_FUNC, -+}; -+ -+#define RTW89_MCC_WAIT_COND(group, func) \ -+ ((group) * NUM_OF_RTW89_MCC_H2C_FUNC + (func)) -+ - #define H2C_CAT_OUTSRC 0x2 - - #define H2C_CL_OUTSRC_RA 0x1 ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -4187,6 +4187,164 @@ rtw89_mac_c2h_tsf32_toggle_rpt(struct rt - { - } - -+static void -+rtw89_mac_c2h_mcc_rcv_ack(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) -+{ -+ u8 group = RTW89_GET_MAC_C2H_MCC_RCV_ACK_GROUP(c2h->data); -+ u8 func = RTW89_GET_MAC_C2H_MCC_RCV_ACK_H2C_FUNC(c2h->data); -+ -+ switch (func) { -+ case H2C_FUNC_ADD_MCC: -+ case H2C_FUNC_START_MCC: -+ case H2C_FUNC_STOP_MCC: -+ case H2C_FUNC_DEL_MCC_GROUP: -+ case H2C_FUNC_RESET_MCC_GROUP: -+ case H2C_FUNC_MCC_REQ_TSF: -+ case H2C_FUNC_MCC_MACID_BITMAP: -+ case H2C_FUNC_MCC_SYNC: -+ case H2C_FUNC_MCC_SET_DURATION: -+ break; -+ default: -+ rtw89_debug(rtwdev, RTW89_DBG_FW, -+ "invalid MCC C2H RCV ACK: func %d\n", func); -+ return; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_FW, -+ "MCC C2H RCV ACK: group %d, func %d\n", group, func); -+} -+ -+static void -+rtw89_mac_c2h_mcc_req_ack(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) -+{ -+ u8 group = RTW89_GET_MAC_C2H_MCC_REQ_ACK_GROUP(c2h->data); -+ u8 func = RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_FUNC(c2h->data); -+ u8 retcode = RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_RETURN(c2h->data); -+ struct rtw89_completion_data data = {}; -+ unsigned int cond; -+ bool next = false; -+ -+ switch (func) { -+ case H2C_FUNC_MCC_REQ_TSF: -+ next = true; -+ break; -+ case H2C_FUNC_MCC_MACID_BITMAP: -+ case H2C_FUNC_MCC_SYNC: -+ case H2C_FUNC_MCC_SET_DURATION: -+ break; -+ case H2C_FUNC_ADD_MCC: -+ case H2C_FUNC_START_MCC: -+ case H2C_FUNC_STOP_MCC: -+ case H2C_FUNC_DEL_MCC_GROUP: -+ case H2C_FUNC_RESET_MCC_GROUP: -+ default: -+ rtw89_debug(rtwdev, RTW89_DBG_FW, -+ "invalid MCC C2H REQ ACK: func %d\n", func); -+ return; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_FW, -+ "MCC C2H REQ ACK: group %d, func %d, return code %d\n", -+ group, func, retcode); -+ -+ if (!retcode && next) -+ return; -+ -+ data.err = !!retcode; -+ cond = RTW89_MCC_WAIT_COND(group, func); -+ rtw89_complete_cond(&rtwdev->mcc.wait, cond, &data); -+} -+ -+static void -+rtw89_mac_c2h_mcc_tsf_rpt(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) -+{ -+ u8 group = RTW89_GET_MAC_C2H_MCC_TSF_RPT_GROUP(c2h->data); -+ struct rtw89_completion_data data = {}; -+ struct rtw89_mac_mcc_tsf_rpt *rpt; -+ unsigned int cond; -+ -+ rpt = (struct rtw89_mac_mcc_tsf_rpt *)data.buf; -+ rpt->macid_x = RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_X(c2h->data); -+ rpt->macid_y = RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_Y(c2h->data); -+ rpt->tsf_x_low = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_X(c2h->data); -+ rpt->tsf_x_high = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_X(c2h->data); -+ rpt->tsf_y_low = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_Y(c2h->data); -+ rpt->tsf_y_high = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_Y(c2h->data); -+ -+ cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_MCC_REQ_TSF); -+ rtw89_complete_cond(&rtwdev->mcc.wait, cond, &data); -+} -+ -+static void -+rtw89_mac_c2h_mcc_status_rpt(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) -+{ -+ u8 group = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_GROUP(c2h->data); -+ u8 macid = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_MACID(c2h->data); -+ u8 status = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_STATUS(c2h->data); -+ u32 tsf_low = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_LOW(c2h->data); -+ u32 tsf_high = RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_HIGH(c2h->data); -+ struct rtw89_completion_data data = {}; -+ unsigned int cond; -+ bool rsp = true; -+ bool err; -+ u8 func; -+ -+ switch (status) { -+ case RTW89_MAC_MCC_ADD_ROLE_OK: -+ case RTW89_MAC_MCC_ADD_ROLE_FAIL: -+ func = H2C_FUNC_ADD_MCC; -+ err = status == RTW89_MAC_MCC_ADD_ROLE_FAIL; -+ break; -+ case RTW89_MAC_MCC_START_GROUP_OK: -+ case RTW89_MAC_MCC_START_GROUP_FAIL: -+ func = H2C_FUNC_START_MCC; -+ err = status == RTW89_MAC_MCC_START_GROUP_FAIL; -+ break; -+ case RTW89_MAC_MCC_STOP_GROUP_OK: -+ case RTW89_MAC_MCC_STOP_GROUP_FAIL: -+ func = H2C_FUNC_STOP_MCC; -+ err = status == RTW89_MAC_MCC_STOP_GROUP_FAIL; -+ break; -+ case RTW89_MAC_MCC_DEL_GROUP_OK: -+ case RTW89_MAC_MCC_DEL_GROUP_FAIL: -+ func = H2C_FUNC_DEL_MCC_GROUP; -+ err = status == RTW89_MAC_MCC_DEL_GROUP_FAIL; -+ break; -+ case RTW89_MAC_MCC_RESET_GROUP_OK: -+ case RTW89_MAC_MCC_RESET_GROUP_FAIL: -+ func = H2C_FUNC_RESET_MCC_GROUP; -+ err = status == RTW89_MAC_MCC_RESET_GROUP_FAIL; -+ break; -+ case RTW89_MAC_MCC_SWITCH_CH_OK: -+ case RTW89_MAC_MCC_SWITCH_CH_FAIL: -+ case RTW89_MAC_MCC_TXNULL0_OK: -+ case RTW89_MAC_MCC_TXNULL0_FAIL: -+ case RTW89_MAC_MCC_TXNULL1_OK: -+ case RTW89_MAC_MCC_TXNULL1_FAIL: -+ case RTW89_MAC_MCC_SWITCH_EARLY: -+ case RTW89_MAC_MCC_TBTT: -+ case RTW89_MAC_MCC_DURATION_START: -+ case RTW89_MAC_MCC_DURATION_END: -+ rsp = false; -+ break; -+ default: -+ rtw89_debug(rtwdev, RTW89_DBG_FW, -+ "invalid MCC C2H STS RPT: status %d\n", status); -+ return; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_FW, -+ "MCC C2H STS RPT: group %d, macid %d, status %d, tsf {%d, %d}\n", -+ group, macid, status, tsf_low, tsf_high); -+ -+ if (!rsp) -+ return; -+ -+ data.err = err; -+ cond = RTW89_MCC_WAIT_COND(group, func); -+ rtw89_complete_cond(&rtwdev->mcc.wait, cond, &data); -+} -+ - static - void (* const rtw89_mac_c2h_ofld_handler[])(struct rtw89_dev *rtwdev, - struct sk_buff *c2h, u32 len) = { -@@ -4208,6 +4366,15 @@ void (* const rtw89_mac_c2h_info_handler - [RTW89_MAC_C2H_FUNC_BCN_CNT] = rtw89_mac_c2h_bcn_cnt, - }; - -+static -+void (* const rtw89_mac_c2h_mcc_handler[])(struct rtw89_dev *rtwdev, -+ struct sk_buff *c2h, u32 len) = { -+ [RTW89_MAC_C2H_FUNC_MCC_RCV_ACK] = rtw89_mac_c2h_mcc_rcv_ack, -+ [RTW89_MAC_C2H_FUNC_MCC_REQ_ACK] = rtw89_mac_c2h_mcc_req_ack, -+ [RTW89_MAC_C2H_FUNC_MCC_TSF_RPT] = rtw89_mac_c2h_mcc_tsf_rpt, -+ [RTW89_MAC_C2H_FUNC_MCC_STATUS_RPT] = rtw89_mac_c2h_mcc_status_rpt, -+}; -+ - bool rtw89_mac_c2h_chk_atomic(struct rtw89_dev *rtwdev, u8 class, u8 func) - { - switch (class) { -@@ -4233,6 +4400,10 @@ void rtw89_mac_c2h_handle(struct rtw89_d - if (func < RTW89_MAC_C2H_FUNC_OFLD_MAX) - handler = rtw89_mac_c2h_ofld_handler[func]; - break; -+ case RTW89_MAC_C2H_CLASS_MCC: -+ if (func < NUM_OF_RTW89_MAC_C2H_FUNC_MCC) -+ handler = rtw89_mac_c2h_mcc_handler[func]; -+ break; - case RTW89_MAC_C2H_CLASS_FWDBG: - return; - default: ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -368,6 +368,15 @@ enum rtw89_mac_c2h_info_func { - RTW89_MAC_C2H_FUNC_INFO_MAX, - }; - -+enum rtw89_mac_c2h_mcc_func { -+ RTW89_MAC_C2H_FUNC_MCC_RCV_ACK = 0, -+ RTW89_MAC_C2H_FUNC_MCC_REQ_ACK = 1, -+ RTW89_MAC_C2H_FUNC_MCC_TSF_RPT = 2, -+ RTW89_MAC_C2H_FUNC_MCC_STATUS_RPT = 3, -+ -+ NUM_OF_RTW89_MAC_C2H_FUNC_MCC, -+}; -+ - enum rtw89_mac_c2h_class { - RTW89_MAC_C2H_CLASS_INFO, - RTW89_MAC_C2H_CLASS_OFLD, -@@ -378,6 +387,31 @@ enum rtw89_mac_c2h_class { - RTW89_MAC_C2H_CLASS_MAX, - }; - -+enum rtw89_mac_mcc_status { -+ RTW89_MAC_MCC_ADD_ROLE_OK = 0, -+ RTW89_MAC_MCC_START_GROUP_OK = 1, -+ RTW89_MAC_MCC_STOP_GROUP_OK = 2, -+ RTW89_MAC_MCC_DEL_GROUP_OK = 3, -+ RTW89_MAC_MCC_RESET_GROUP_OK = 4, -+ RTW89_MAC_MCC_SWITCH_CH_OK = 5, -+ RTW89_MAC_MCC_TXNULL0_OK = 6, -+ RTW89_MAC_MCC_TXNULL1_OK = 7, -+ -+ RTW89_MAC_MCC_SWITCH_EARLY = 10, -+ RTW89_MAC_MCC_TBTT = 11, -+ RTW89_MAC_MCC_DURATION_START = 12, -+ RTW89_MAC_MCC_DURATION_END = 13, -+ -+ RTW89_MAC_MCC_ADD_ROLE_FAIL = 20, -+ RTW89_MAC_MCC_START_GROUP_FAIL = 21, -+ RTW89_MAC_MCC_STOP_GROUP_FAIL = 22, -+ RTW89_MAC_MCC_DEL_GROUP_FAIL = 23, -+ RTW89_MAC_MCC_RESET_GROUP_FAIL = 24, -+ RTW89_MAC_MCC_SWITCH_CH_FAIL = 25, -+ RTW89_MAC_MCC_TXNULL0_FAIL = 26, -+ RTW89_MAC_MCC_TXNULL1_FAIL = 27, -+}; -+ - struct rtw89_mac_ax_coex { - #define RTW89_MAC_AX_COEX_RTK_MODE 0 - #define RTW89_MAC_AX_COEX_CSR_MODE 1 diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-075-wifi-rtw89-fw-implement-MCC-related-H2C.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-075-wifi-rtw89-fw-implement-MCC-related-H2C.patch deleted file mode 100644 index 53339dcf1..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-075-wifi-rtw89-fw-implement-MCC-related-H2C.patch +++ /dev/null @@ -1,741 +0,0 @@ -From c008c4b011baa26b9545f7be10e746c97409d45b Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Tue, 29 Nov 2022 16:31:29 +0800 -Subject: [PATCH 075/149] wifi: rtw89: fw: implement MCC related H2C - -These MCC H2C(s) require to wait for MCC C2H to determine if the -execution is successful. Through rtw89_wait_for_cond(), we make -them wait for either a completion with data from MCC C2H handlers, -which calls rtw89_complete_cond(), or timeout. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221129083130.45708-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 329 +++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/fw.h | 369 +++++++++++++++++++++++- - 2 files changed, 697 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -3265,3 +3265,332 @@ fail: - - return ret; - } -+ -+static int rtw89_h2c_tx_and_wait(struct rtw89_dev *rtwdev, struct sk_buff *skb, -+ struct rtw89_wait_info *wait, unsigned int cond) -+{ -+ int ret; -+ -+ ret = rtw89_h2c_tx(rtwdev, skb, false); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ dev_kfree_skb_any(skb); -+ return -EBUSY; -+ } -+ -+ return rtw89_wait_for_cond(wait, cond); -+} -+ -+#define H2C_ADD_MCC_LEN 16 -+int rtw89_fw_h2c_add_mcc(struct rtw89_dev *rtwdev, -+ const struct rtw89_fw_mcc_add_req *p) -+{ -+ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; -+ struct sk_buff *skb; -+ unsigned int cond; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_ADD_MCC_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, -+ "failed to alloc skb for add mcc\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, H2C_ADD_MCC_LEN); -+ RTW89_SET_FWCMD_ADD_MCC_MACID(skb->data, p->macid); -+ RTW89_SET_FWCMD_ADD_MCC_CENTRAL_CH_SEG0(skb->data, p->central_ch_seg0); -+ RTW89_SET_FWCMD_ADD_MCC_CENTRAL_CH_SEG1(skb->data, p->central_ch_seg1); -+ RTW89_SET_FWCMD_ADD_MCC_PRIMARY_CH(skb->data, p->primary_ch); -+ RTW89_SET_FWCMD_ADD_MCC_BANDWIDTH(skb->data, p->bandwidth); -+ RTW89_SET_FWCMD_ADD_MCC_GROUP(skb->data, p->group); -+ RTW89_SET_FWCMD_ADD_MCC_C2H_RPT(skb->data, p->c2h_rpt); -+ RTW89_SET_FWCMD_ADD_MCC_DIS_TX_NULL(skb->data, p->dis_tx_null); -+ RTW89_SET_FWCMD_ADD_MCC_DIS_SW_RETRY(skb->data, p->dis_sw_retry); -+ RTW89_SET_FWCMD_ADD_MCC_IN_CURR_CH(skb->data, p->in_curr_ch); -+ RTW89_SET_FWCMD_ADD_MCC_SW_RETRY_COUNT(skb->data, p->sw_retry_count); -+ RTW89_SET_FWCMD_ADD_MCC_TX_NULL_EARLY(skb->data, p->tx_null_early); -+ RTW89_SET_FWCMD_ADD_MCC_BTC_IN_2G(skb->data, p->btc_in_2g); -+ RTW89_SET_FWCMD_ADD_MCC_PTA_EN(skb->data, p->pta_en); -+ RTW89_SET_FWCMD_ADD_MCC_RFK_BY_PASS(skb->data, p->rfk_by_pass); -+ RTW89_SET_FWCMD_ADD_MCC_CH_BAND_TYPE(skb->data, p->ch_band_type); -+ RTW89_SET_FWCMD_ADD_MCC_DURATION(skb->data, p->duration); -+ RTW89_SET_FWCMD_ADD_MCC_COURTESY_EN(skb->data, p->courtesy_en); -+ RTW89_SET_FWCMD_ADD_MCC_COURTESY_NUM(skb->data, p->courtesy_num); -+ RTW89_SET_FWCMD_ADD_MCC_COURTESY_TARGET(skb->data, p->courtesy_target); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MCC, -+ H2C_FUNC_ADD_MCC, 0, 0, -+ H2C_ADD_MCC_LEN); -+ -+ cond = RTW89_MCC_WAIT_COND(p->group, H2C_FUNC_ADD_MCC); -+ return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); -+} -+ -+#define H2C_START_MCC_LEN 12 -+int rtw89_fw_h2c_start_mcc(struct rtw89_dev *rtwdev, -+ const struct rtw89_fw_mcc_start_req *p) -+{ -+ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; -+ struct sk_buff *skb; -+ unsigned int cond; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_START_MCC_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, -+ "failed to alloc skb for start mcc\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, H2C_START_MCC_LEN); -+ RTW89_SET_FWCMD_START_MCC_GROUP(skb->data, p->group); -+ RTW89_SET_FWCMD_START_MCC_BTC_IN_GROUP(skb->data, p->btc_in_group); -+ RTW89_SET_FWCMD_START_MCC_OLD_GROUP_ACTION(skb->data, p->old_group_action); -+ RTW89_SET_FWCMD_START_MCC_OLD_GROUP(skb->data, p->old_group); -+ RTW89_SET_FWCMD_START_MCC_NOTIFY_CNT(skb->data, p->notify_cnt); -+ RTW89_SET_FWCMD_START_MCC_NOTIFY_RXDBG_EN(skb->data, p->notify_rxdbg_en); -+ RTW89_SET_FWCMD_START_MCC_MACID(skb->data, p->macid); -+ RTW89_SET_FWCMD_START_MCC_TSF_LOW(skb->data, p->tsf_low); -+ RTW89_SET_FWCMD_START_MCC_TSF_HIGH(skb->data, p->tsf_high); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MCC, -+ H2C_FUNC_START_MCC, 0, 0, -+ H2C_START_MCC_LEN); -+ -+ cond = RTW89_MCC_WAIT_COND(p->group, H2C_FUNC_START_MCC); -+ return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); -+} -+ -+#define H2C_STOP_MCC_LEN 4 -+int rtw89_fw_h2c_stop_mcc(struct rtw89_dev *rtwdev, u8 group, u8 macid, -+ bool prev_groups) -+{ -+ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; -+ struct sk_buff *skb; -+ unsigned int cond; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_STOP_MCC_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, -+ "failed to alloc skb for stop mcc\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, H2C_STOP_MCC_LEN); -+ RTW89_SET_FWCMD_STOP_MCC_MACID(skb->data, macid); -+ RTW89_SET_FWCMD_STOP_MCC_GROUP(skb->data, group); -+ RTW89_SET_FWCMD_STOP_MCC_PREV_GROUPS(skb->data, prev_groups); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MCC, -+ H2C_FUNC_STOP_MCC, 0, 0, -+ H2C_STOP_MCC_LEN); -+ -+ cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_STOP_MCC); -+ return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); -+} -+ -+#define H2C_DEL_MCC_GROUP_LEN 4 -+int rtw89_fw_h2c_del_mcc_group(struct rtw89_dev *rtwdev, u8 group, -+ bool prev_groups) -+{ -+ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; -+ struct sk_buff *skb; -+ unsigned int cond; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_DEL_MCC_GROUP_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, -+ "failed to alloc skb for del mcc group\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, H2C_DEL_MCC_GROUP_LEN); -+ RTW89_SET_FWCMD_DEL_MCC_GROUP_GROUP(skb->data, group); -+ RTW89_SET_FWCMD_DEL_MCC_GROUP_PREV_GROUPS(skb->data, prev_groups); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MCC, -+ H2C_FUNC_DEL_MCC_GROUP, 0, 0, -+ H2C_DEL_MCC_GROUP_LEN); -+ -+ cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_DEL_MCC_GROUP); -+ return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); -+} -+ -+#define H2C_RESET_MCC_GROUP_LEN 4 -+int rtw89_fw_h2c_reset_mcc_group(struct rtw89_dev *rtwdev, u8 group) -+{ -+ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; -+ struct sk_buff *skb; -+ unsigned int cond; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_RESET_MCC_GROUP_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, -+ "failed to alloc skb for reset mcc group\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, H2C_RESET_MCC_GROUP_LEN); -+ RTW89_SET_FWCMD_RESET_MCC_GROUP_GROUP(skb->data, group); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MCC, -+ H2C_FUNC_RESET_MCC_GROUP, 0, 0, -+ H2C_RESET_MCC_GROUP_LEN); -+ -+ cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_RESET_MCC_GROUP); -+ return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); -+} -+ -+#define H2C_MCC_REQ_TSF_LEN 4 -+int rtw89_fw_h2c_mcc_req_tsf(struct rtw89_dev *rtwdev, -+ const struct rtw89_fw_mcc_tsf_req *req, -+ struct rtw89_mac_mcc_tsf_rpt *rpt) -+{ -+ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; -+ struct rtw89_mac_mcc_tsf_rpt *tmp; -+ struct sk_buff *skb; -+ unsigned int cond; -+ int ret; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_MCC_REQ_TSF_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, -+ "failed to alloc skb for mcc req tsf\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, H2C_MCC_REQ_TSF_LEN); -+ RTW89_SET_FWCMD_MCC_REQ_TSF_GROUP(skb->data, req->group); -+ RTW89_SET_FWCMD_MCC_REQ_TSF_MACID_X(skb->data, req->macid_x); -+ RTW89_SET_FWCMD_MCC_REQ_TSF_MACID_Y(skb->data, req->macid_y); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MCC, -+ H2C_FUNC_MCC_REQ_TSF, 0, 0, -+ H2C_MCC_REQ_TSF_LEN); -+ -+ cond = RTW89_MCC_WAIT_COND(req->group, H2C_FUNC_MCC_REQ_TSF); -+ ret = rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); -+ if (ret) -+ return ret; -+ -+ tmp = (struct rtw89_mac_mcc_tsf_rpt *)wait->data.buf; -+ *rpt = *tmp; -+ -+ return 0; -+} -+ -+#define H2C_MCC_MACID_BITMAP_DSC_LEN 4 -+int rtw89_fw_h2c_mcc_macid_bitamp(struct rtw89_dev *rtwdev, u8 group, u8 macid, -+ u8 *bitmap) -+{ -+ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; -+ struct sk_buff *skb; -+ unsigned int cond; -+ u8 map_len; -+ u8 h2c_len; -+ -+ BUILD_BUG_ON(RTW89_MAX_MAC_ID_NUM % 8); -+ map_len = RTW89_MAX_MAC_ID_NUM / 8; -+ h2c_len = H2C_MCC_MACID_BITMAP_DSC_LEN + map_len; -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, h2c_len); -+ if (!skb) { -+ rtw89_err(rtwdev, -+ "failed to alloc skb for mcc macid bitmap\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, h2c_len); -+ RTW89_SET_FWCMD_MCC_MACID_BITMAP_GROUP(skb->data, group); -+ RTW89_SET_FWCMD_MCC_MACID_BITMAP_MACID(skb->data, macid); -+ RTW89_SET_FWCMD_MCC_MACID_BITMAP_BITMAP_LENGTH(skb->data, map_len); -+ RTW89_SET_FWCMD_MCC_MACID_BITMAP_BITMAP(skb->data, bitmap, map_len); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MCC, -+ H2C_FUNC_MCC_MACID_BITMAP, 0, 0, -+ h2c_len); -+ -+ cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_MCC_MACID_BITMAP); -+ return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); -+} -+ -+#define H2C_MCC_SYNC_LEN 4 -+int rtw89_fw_h2c_mcc_sync(struct rtw89_dev *rtwdev, u8 group, u8 source, -+ u8 target, u8 offset) -+{ -+ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; -+ struct sk_buff *skb; -+ unsigned int cond; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_MCC_SYNC_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, -+ "failed to alloc skb for mcc sync\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, H2C_MCC_SYNC_LEN); -+ RTW89_SET_FWCMD_MCC_SYNC_GROUP(skb->data, group); -+ RTW89_SET_FWCMD_MCC_SYNC_MACID_SOURCE(skb->data, source); -+ RTW89_SET_FWCMD_MCC_SYNC_MACID_TARGET(skb->data, target); -+ RTW89_SET_FWCMD_MCC_SYNC_SYNC_OFFSET(skb->data, offset); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MCC, -+ H2C_FUNC_MCC_SYNC, 0, 0, -+ H2C_MCC_SYNC_LEN); -+ -+ cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_MCC_SYNC); -+ return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); -+} -+ -+#define H2C_MCC_SET_DURATION_LEN 20 -+int rtw89_fw_h2c_mcc_set_duration(struct rtw89_dev *rtwdev, -+ const struct rtw89_fw_mcc_duration *p) -+{ -+ struct rtw89_wait_info *wait = &rtwdev->mcc.wait; -+ struct sk_buff *skb; -+ unsigned int cond; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_MCC_SET_DURATION_LEN); -+ if (!skb) { -+ rtw89_err(rtwdev, -+ "failed to alloc skb for mcc set duration\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, H2C_MCC_SET_DURATION_LEN); -+ RTW89_SET_FWCMD_MCC_SET_DURATION_GROUP(skb->data, p->group); -+ RTW89_SET_FWCMD_MCC_SET_DURATION_BTC_IN_GROUP(skb->data, p->btc_in_group); -+ RTW89_SET_FWCMD_MCC_SET_DURATION_START_MACID(skb->data, p->start_macid); -+ RTW89_SET_FWCMD_MCC_SET_DURATION_MACID_X(skb->data, p->macid_x); -+ RTW89_SET_FWCMD_MCC_SET_DURATION_MACID_Y(skb->data, p->macid_y); -+ RTW89_SET_FWCMD_MCC_SET_DURATION_START_TSF_LOW(skb->data, -+ p->start_tsf_low); -+ RTW89_SET_FWCMD_MCC_SET_DURATION_START_TSF_HIGH(skb->data, -+ p->start_tsf_high); -+ RTW89_SET_FWCMD_MCC_SET_DURATION_DURATION_X(skb->data, p->duration_x); -+ RTW89_SET_FWCMD_MCC_SET_DURATION_DURATION_Y(skb->data, p->duration_y); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, -+ H2C_CL_MCC, -+ H2C_FUNC_MCC_SET_DURATION, 0, 0, -+ H2C_MCC_SET_DURATION_LEN); -+ -+ cond = RTW89_MCC_WAIT_COND(p->group, H2C_FUNC_MCC_SET_DURATION); -+ return rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); -+} ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -2767,6 +2767,355 @@ static inline void RTW89_SET_FWCMD_TSF32 - le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 16)); - } - -+enum rtw89_fw_mcc_c2h_rpt_cfg { -+ RTW89_FW_MCC_C2H_RPT_OFF = 0, -+ RTW89_FW_MCC_C2H_RPT_FAIL_ONLY = 1, -+ RTW89_FW_MCC_C2H_RPT_ALL = 2, -+}; -+ -+struct rtw89_fw_mcc_add_req { -+ u8 macid; -+ u8 central_ch_seg0; -+ u8 central_ch_seg1; -+ u8 primary_ch; -+ enum rtw89_bandwidth bandwidth: 4; -+ u32 group: 2; -+ u32 c2h_rpt: 2; -+ u32 dis_tx_null: 1; -+ u32 dis_sw_retry: 1; -+ u32 in_curr_ch: 1; -+ u32 sw_retry_count: 3; -+ u32 tx_null_early: 4; -+ u32 btc_in_2g: 1; -+ u32 pta_en: 1; -+ u32 rfk_by_pass: 1; -+ u32 ch_band_type: 2; -+ u32 rsvd0: 9; -+ u32 duration; -+ u8 courtesy_en; -+ u8 courtesy_num; -+ u8 courtesy_target; -+ u8 rsvd1; -+}; -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_MACID(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_CENTRAL_CH_SEG0(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_CENTRAL_CH_SEG1(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_PRIMARY_CH(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 24)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_BANDWIDTH(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(3, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_GROUP(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(5, 4)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_C2H_RPT(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(7, 6)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_DIS_TX_NULL(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 1, val, BIT(8)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_DIS_SW_RETRY(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 1, val, BIT(9)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_IN_CURR_CH(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 1, val, BIT(10)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_SW_RETRY_COUNT(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(13, 11)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_TX_NULL_EARLY(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(17, 14)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_BTC_IN_2G(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 1, val, BIT(18)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_PTA_EN(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 1, val, BIT(19)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_RFK_BY_PASS(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 1, val, BIT(20)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_CH_BAND_TYPE(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(22, 21)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_DURATION(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 2, val, GENMASK(31, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_COURTESY_EN(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 3, val, BIT(0)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_COURTESY_NUM(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 3, val, GENMASK(15, 8)); -+} -+ -+static inline void RTW89_SET_FWCMD_ADD_MCC_COURTESY_TARGET(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 3, val, GENMASK(23, 16)); -+} -+ -+struct rtw89_fw_mcc_start_req { -+ u32 group: 2; -+ u32 btc_in_group: 1; -+ u32 old_group_action: 2; -+ u32 old_group: 2; -+ u32 rsvd0: 9; -+ u32 notify_cnt: 3; -+ u32 rsvd1: 2; -+ u32 notify_rxdbg_en: 1; -+ u32 rsvd2: 2; -+ u32 macid: 8; -+ u32 tsf_low; -+ u32 tsf_high; -+}; -+ -+static inline void RTW89_SET_FWCMD_START_MCC_GROUP(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_START_MCC_BTC_IN_GROUP(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, BIT(2)); -+} -+ -+static inline void RTW89_SET_FWCMD_START_MCC_OLD_GROUP_ACTION(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(4, 3)); -+} -+ -+static inline void RTW89_SET_FWCMD_START_MCC_OLD_GROUP(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(6, 5)); -+} -+ -+static inline void RTW89_SET_FWCMD_START_MCC_NOTIFY_CNT(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(18, 16)); -+} -+ -+static inline void RTW89_SET_FWCMD_START_MCC_NOTIFY_RXDBG_EN(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, BIT(21)); -+} -+ -+static inline void RTW89_SET_FWCMD_START_MCC_MACID(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 24)); -+} -+ -+static inline void RTW89_SET_FWCMD_START_MCC_TSF_LOW(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(31, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_START_MCC_TSF_HIGH(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 2, val, GENMASK(31, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_STOP_MCC_MACID(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_STOP_MCC_GROUP(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(9, 8)); -+} -+ -+static inline void RTW89_SET_FWCMD_STOP_MCC_PREV_GROUPS(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, BIT(10)); -+} -+ -+static inline void RTW89_SET_FWCMD_DEL_MCC_GROUP_GROUP(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_DEL_MCC_GROUP_PREV_GROUPS(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, BIT(2)); -+} -+ -+static inline void RTW89_SET_FWCMD_RESET_MCC_GROUP_GROUP(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0)); -+} -+ -+struct rtw89_fw_mcc_tsf_req { -+ u8 group: 2; -+ u8 rsvd0: 6; -+ u8 macid_x; -+ u8 macid_y; -+ u8 rsvd1; -+}; -+ -+static inline void RTW89_SET_FWCMD_MCC_REQ_TSF_GROUP(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_MCC_REQ_TSF_MACID_X(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8)); -+} -+ -+static inline void RTW89_SET_FWCMD_MCC_REQ_TSF_MACID_Y(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16)); -+} -+ -+static inline void RTW89_SET_FWCMD_MCC_MACID_BITMAP_GROUP(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_MCC_MACID_BITMAP_MACID(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8)); -+} -+ -+static inline void RTW89_SET_FWCMD_MCC_MACID_BITMAP_BITMAP_LENGTH(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16)); -+} -+ -+static inline void RTW89_SET_FWCMD_MCC_MACID_BITMAP_BITMAP(void *cmd, -+ u8 *bitmap, u8 len) -+{ -+ memcpy((__le32 *)cmd + 1, bitmap, len); -+} -+ -+static inline void RTW89_SET_FWCMD_MCC_SYNC_GROUP(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_MCC_SYNC_MACID_SOURCE(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8)); -+} -+ -+static inline void RTW89_SET_FWCMD_MCC_SYNC_MACID_TARGET(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16)); -+} -+ -+static inline void RTW89_SET_FWCMD_MCC_SYNC_SYNC_OFFSET(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 24)); -+} -+ -+struct rtw89_fw_mcc_duration { -+ u32 group: 2; -+ u32 btc_in_group: 1; -+ u32 rsvd0: 5; -+ u32 start_macid: 8; -+ u32 macid_x: 8; -+ u32 macid_y: 8; -+ u32 start_tsf_low; -+ u32 start_tsf_high; -+ u32 duration_x; -+ u32 duration_y; -+}; -+ -+static inline void RTW89_SET_FWCMD_MCC_SET_DURATION_GROUP(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(1, 0)); -+} -+ -+static -+inline void RTW89_SET_FWCMD_MCC_SET_DURATION_BTC_IN_GROUP(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, BIT(2)); -+} -+ -+static -+inline void RTW89_SET_FWCMD_MCC_SET_DURATION_START_MACID(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(15, 8)); -+} -+ -+static inline void RTW89_SET_FWCMD_MCC_SET_DURATION_MACID_X(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(23, 16)); -+} -+ -+static inline void RTW89_SET_FWCMD_MCC_SET_DURATION_MACID_Y(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd, val, GENMASK(31, 24)); -+} -+ -+static -+inline void RTW89_SET_FWCMD_MCC_SET_DURATION_START_TSF_LOW(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 1, val, GENMASK(31, 0)); -+} -+ -+static -+inline void RTW89_SET_FWCMD_MCC_SET_DURATION_START_TSF_HIGH(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 2, val, GENMASK(31, 0)); -+} -+ -+static -+inline void RTW89_SET_FWCMD_MCC_SET_DURATION_DURATION_X(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 3, val, GENMASK(31, 0)); -+} -+ -+static -+inline void RTW89_SET_FWCMD_MCC_SET_DURATION_DURATION_Y(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)cmd + 4, val, GENMASK(31, 0)); -+} -+ - #define RTW89_C2H_HEADER_LEN 8 - - #define RTW89_GET_C2H_CATEGORY(c2h) \ -@@ -3185,9 +3534,27 @@ int rtw89_fw_h2c_wow_global(struct rtw89 - bool enable); - int rtw89_fw_h2c_wow_wakeup_ctrl(struct rtw89_dev *rtwdev, - struct rtw89_vif *rtwvif, bool enable); -- - int rtw89_fw_wow_cam_update(struct rtw89_dev *rtwdev, - struct rtw89_wow_cam_info *cam_info); -+int rtw89_fw_h2c_add_mcc(struct rtw89_dev *rtwdev, -+ const struct rtw89_fw_mcc_add_req *p); -+int rtw89_fw_h2c_start_mcc(struct rtw89_dev *rtwdev, -+ const struct rtw89_fw_mcc_start_req *p); -+int rtw89_fw_h2c_stop_mcc(struct rtw89_dev *rtwdev, u8 group, u8 macid, -+ bool prev_groups); -+int rtw89_fw_h2c_del_mcc_group(struct rtw89_dev *rtwdev, u8 group, -+ bool prev_groups); -+int rtw89_fw_h2c_reset_mcc_group(struct rtw89_dev *rtwdev, u8 group); -+int rtw89_fw_h2c_mcc_req_tsf(struct rtw89_dev *rtwdev, -+ const struct rtw89_fw_mcc_tsf_req *req, -+ struct rtw89_mac_mcc_tsf_rpt *rpt); -+int rtw89_fw_h2c_mcc_macid_bitamp(struct rtw89_dev *rtwdev, u8 group, u8 macid, -+ u8 *bitmap); -+int rtw89_fw_h2c_mcc_sync(struct rtw89_dev *rtwdev, u8 group, u8 source, -+ u8 target, u8 offset); -+int rtw89_fw_h2c_mcc_set_duration(struct rtw89_dev *rtwdev, -+ const struct rtw89_fw_mcc_duration *p); -+ - static inline void rtw89_fw_h2c_init_ba_cam(struct rtw89_dev *rtwdev) - { - const struct rtw89_chip_info *chip = rtwdev->chip; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-076-wifi-rtw89-link-rtw89_vif-and-chanctx-stuffs.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-076-wifi-rtw89-link-rtw89_vif-and-chanctx-stuffs.patch deleted file mode 100644 index 4780e43a1..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-076-wifi-rtw89-link-rtw89_vif-and-chanctx-stuffs.patch +++ /dev/null @@ -1,193 +0,0 @@ -From 75ee07b03fc6ec0a7ac7407f9ea7b3e981efb28f Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Tue, 29 Nov 2022 16:31:30 +0800 -Subject: [PATCH 076/149] wifi: rtw89: link rtw89_vif and chanctx stuffs - -First, introduce struct rtw89_sub_entity for chanctx related stuffs. -Second, add enum rtw89_sub_entity_idx to rtw89_vif for vif operation -to access its/right chanctx stuffs after future multi-channel support. - -Besides, RTW89_SUB_ENTITY_0 is the default chanctx entry throughout -driver, i.e. it's used for things which may not have a target chanctx -yet. So, we need to ensure that RTW89_SUB_ENTITY_0 is always working. -If there is at least one alive chanctx, then one of them must take -RTW89_SUB_ENTITY_0. If no alive chanctx, RTW89_SUB_ENTITY_0 will be -filled by rtw89_config_default_chandef(). - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221129083130.45708-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/chan.c | 40 +++++++++++++++++-- - drivers/net/wireless/realtek/rtw89/core.h | 20 ++++++---- - drivers/net/wireless/realtek/rtw89/mac80211.c | 1 + - 3 files changed, 50 insertions(+), 11 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/chan.c -+++ b/drivers/net/wireless/realtek/rtw89/chan.c -@@ -4,6 +4,7 @@ - - #include "chan.h" - #include "debug.h" -+#include "util.h" - - static enum rtw89_subband rtw89_get_subband_type(enum rtw89_band band, - u8 center_chan) -@@ -108,8 +109,8 @@ bool rtw89_assign_entity_chan(struct rtw - const struct rtw89_chan *new) - { - struct rtw89_hal *hal = &rtwdev->hal; -- struct rtw89_chan *chan = &hal->chan[idx]; -- struct rtw89_chan_rcd *rcd = &hal->chan_rcd[idx]; -+ struct rtw89_chan *chan = &hal->sub[idx].chan; -+ struct rtw89_chan_rcd *rcd = &hal->sub[idx].rcd; - bool band_changed; - - rcd->prev_primary_channel = chan->primary_channel; -@@ -127,7 +128,7 @@ static void __rtw89_config_entity_chande - { - struct rtw89_hal *hal = &rtwdev->hal; - -- hal->chandef[idx] = *chandef; -+ hal->sub[idx].chandef = *chandef; - - if (from_stack) - set_bit(idx, hal->entity_map); -@@ -195,6 +196,7 @@ int rtw89_chanctx_ops_add(struct rtw89_d - rtw89_config_entity_chandef(rtwdev, idx, &ctx->def); - rtw89_set_channel(rtwdev); - cfg->idx = idx; -+ hal->sub[idx].cfg = cfg; - return 0; - } - -@@ -203,8 +205,34 @@ void rtw89_chanctx_ops_remove(struct rtw - { - struct rtw89_hal *hal = &rtwdev->hal; - struct rtw89_chanctx_cfg *cfg = (struct rtw89_chanctx_cfg *)ctx->drv_priv; -+ struct rtw89_vif *rtwvif; -+ u8 drop, roll; - -- clear_bit(cfg->idx, hal->entity_map); -+ drop = cfg->idx; -+ if (drop != RTW89_SUB_ENTITY_0) -+ goto out; -+ -+ roll = find_next_bit(hal->entity_map, NUM_OF_RTW89_SUB_ENTITY, drop + 1); -+ -+ /* Follow rtw89_config_default_chandef() when rtw89_entity_recalc(). */ -+ if (roll == NUM_OF_RTW89_SUB_ENTITY) -+ goto out; -+ -+ /* RTW89_SUB_ENTITY_0 is going to release, and another exists. -+ * Make another roll down to RTW89_SUB_ENTITY_0 to replace. -+ */ -+ hal->sub[roll].cfg->idx = RTW89_SUB_ENTITY_0; -+ hal->sub[RTW89_SUB_ENTITY_0] = hal->sub[roll]; -+ -+ rtw89_for_each_rtwvif(rtwdev, rtwvif) { -+ if (rtwvif->sub_entity_idx == roll) -+ rtwvif->sub_entity_idx = RTW89_SUB_ENTITY_0; -+ } -+ -+ drop = roll; -+ -+out: -+ clear_bit(drop, hal->entity_map); - rtw89_set_channel(rtwdev); - } - -@@ -225,6 +253,9 @@ int rtw89_chanctx_ops_assign_vif(struct - struct rtw89_vif *rtwvif, - struct ieee80211_chanctx_conf *ctx) - { -+ struct rtw89_chanctx_cfg *cfg = (struct rtw89_chanctx_cfg *)ctx->drv_priv; -+ -+ rtwvif->sub_entity_idx = cfg->idx; - return 0; - } - -@@ -232,4 +263,5 @@ void rtw89_chanctx_ops_unassign_vif(stru - struct rtw89_vif *rtwvif, - struct ieee80211_chanctx_conf *ctx) - { -+ rtwvif->sub_entity_idx = RTW89_SUB_ENTITY_0; - } ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2240,6 +2240,8 @@ struct rtw89_phy_rate_pattern { - struct rtw89_vif { - struct list_head list; - struct rtw89_dev *rtwdev; -+ enum rtw89_sub_entity_idx sub_entity_idx; -+ - u8 mac_id; - u8 port; - u8 mac_addr[ETH_ALEN]; -@@ -2953,6 +2955,13 @@ enum rtw89_entity_mode { - RTW89_ENTITY_MODE_SCC, - }; - -+struct rtw89_sub_entity { -+ struct cfg80211_chan_def chandef; -+ struct rtw89_chan chan; -+ struct rtw89_chan_rcd rcd; -+ struct rtw89_chanctx_cfg *cfg; -+}; -+ - struct rtw89_hal { - u32 rx_fltr; - u8 cv; -@@ -2966,13 +2975,10 @@ struct rtw89_hal { - bool support_igi; - - DECLARE_BITMAP(entity_map, NUM_OF_RTW89_SUB_ENTITY); -- struct cfg80211_chan_def chandef[NUM_OF_RTW89_SUB_ENTITY]; -+ struct rtw89_sub_entity sub[NUM_OF_RTW89_SUB_ENTITY]; - - bool entity_active; - enum rtw89_entity_mode entity_mode; -- -- struct rtw89_chan chan[NUM_OF_RTW89_SUB_ENTITY]; -- struct rtw89_chan_rcd chan_rcd[NUM_OF_RTW89_SUB_ENTITY]; - }; - - #define RTW89_MAX_MAC_ID_NUM 128 -@@ -4138,7 +4144,7 @@ const struct cfg80211_chan_def *rtw89_ch - { - struct rtw89_hal *hal = &rtwdev->hal; - -- return &hal->chandef[idx]; -+ return &hal->sub[idx].chandef; - } - - static inline -@@ -4147,7 +4153,7 @@ const struct rtw89_chan *rtw89_chan_get( - { - struct rtw89_hal *hal = &rtwdev->hal; - -- return &hal->chan[idx]; -+ return &hal->sub[idx].chan; - } - - static inline -@@ -4156,7 +4162,7 @@ const struct rtw89_chan_rcd *rtw89_chan_ - { - struct rtw89_hal *hal = &rtwdev->hal; - -- return &hal->chan_rcd[idx]; -+ return &hal->sub[idx].rcd; - } - - static inline void rtw89_chip_fem_setup(struct rtw89_dev *rtwdev) ---- a/drivers/net/wireless/realtek/rtw89/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -131,6 +131,7 @@ static int rtw89_ops_add_interface(struc - rtwvif->bcn_hit_cond = 0; - rtwvif->mac_idx = RTW89_MAC_0; - rtwvif->phy_idx = RTW89_PHY_0; -+ rtwvif->sub_entity_idx = RTW89_SUB_ENTITY_0; - rtwvif->hit_rule = 0; - ether_addr_copy(rtwvif->mac_addr, vif->addr); - diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-077-wifi-rtw89-don-t-request-partial-firmware-if-SECURIT.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-077-wifi-rtw89-don-t-request-partial-firmware-if-SECURIT.patch deleted file mode 100644 index 335d620f0..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-077-wifi-rtw89-don-t-request-partial-firmware-if-SECURIT.patch +++ /dev/null @@ -1,119 +0,0 @@ -From 3ddfe3bdd3cf199676737fbd8cb7878b962acd2a Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Fri, 2 Dec 2022 14:05:20 +0800 -Subject: [PATCH 077/149] wifi: rtw89: don't request partial firmware if - SECURITY_LOADPIN_ENFORCE - -Kernel logs on platform enabling SECURITY_LOADPIN_ENFORCE ------- -``` -LoadPin: firmware old-api-denied obj= pid=810 cmdline="modprobe -q -- rtw89_8852ce" -rtw89_8852ce 0000:01:00.0: loading /lib/firmware/rtw89/rtw8852c_fw.bin failed with error -1 -rtw89_8852ce 0000:01:00.0: Direct firmware load for rtw89/rtw8852c_fw.bin failed with error -1 -rtw89_8852ce 0000:01:00.0: failed to early request firmware: -1 -``` - -Trace ------- -``` -request_partial_firmware_into_buf() -> _request_firmware() ->> fw_get_filesystem_firmware() ->>> kernel_read_file_from_path_initns() ->>>> kernel_read_file() ->>>>> security_kernel_read_file() -// It will iterate enabled LSMs' hooks for kernel_read_file. -// With loadpin, it hooks loadpin_read_file. -``` - -If SECURITY_LOADPIN_ENFORCE is enabled, doing kernel_read_file() on partial -files will be denied and return -EPERM (-1). Then, the outer API based on it, -e.g. request_partial_firmware_into_buf(), will get the error. - -In the case, we cannot get the firmware stuffs right, even though there might -be no error other than a permission issue on reading a partial file. So we have -to request full firmware if SECURITY_LOADPIN_ENFORCE is enabled. It makes us -still have a chance to do early firmware work on this kind of platforms. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202060521.501512-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 30 +++++++++++++++++-------- - drivers/net/wireless/realtek/rtw89/fw.h | 15 +++++++++++++ - 2 files changed, 36 insertions(+), 9 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -277,25 +277,37 @@ void rtw89_early_fw_feature_recognize(st - const struct rtw89_chip_info *chip, - u32 *early_feat_map) - { -- union { -- struct rtw89_mfw_hdr mfw_hdr; -- u8 fw_hdr[RTW89_FW_HDR_SIZE]; -- } buf = {}; -+ union rtw89_compat_fw_hdr buf = {}; - const struct firmware *firmware; -+ bool full_req = false; - u32 ver_code; - int ret; - int i; - -- ret = request_partial_firmware_into_buf(&firmware, chip->fw_name, -- device, &buf, sizeof(buf), 0); -+ /* If SECURITY_LOADPIN_ENFORCE is enabled, reading partial files will -+ * be denied (-EPERM). Then, we don't get right firmware things as -+ * expected. So, in this case, we have to request full firmware here. -+ */ -+ if (IS_ENABLED(CONFIG_SECURITY_LOADPIN_ENFORCE)) -+ full_req = true; -+ -+ if (full_req) -+ ret = request_firmware(&firmware, chip->fw_name, device); -+ else -+ ret = request_partial_firmware_into_buf(&firmware, chip->fw_name, -+ device, &buf, sizeof(buf), -+ 0); -+ - if (ret) { - dev_err(device, "failed to early request firmware: %d\n", ret); - return; - } - -- ver_code = buf.mfw_hdr.sig != RTW89_MFW_SIG ? -- RTW89_FW_HDR_VER_CODE(&buf.fw_hdr) : -- RTW89_MFW_HDR_VER_CODE(&buf.mfw_hdr); -+ if (full_req) -+ ver_code = rtw89_compat_fw_hdr_ver_code(firmware->data); -+ else -+ ver_code = rtw89_compat_fw_hdr_ver_code(&buf); -+ - if (!ver_code) - goto out; - ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -3291,6 +3291,21 @@ struct fwcmd_hdr { - __le32 hdr1; - }; - -+union rtw89_compat_fw_hdr { -+ struct rtw89_mfw_hdr mfw_hdr; -+ u8 fw_hdr[RTW89_FW_HDR_SIZE]; -+}; -+ -+static inline u32 rtw89_compat_fw_hdr_ver_code(const void *fw_buf) -+{ -+ const union rtw89_compat_fw_hdr *compat = (typeof(compat))fw_buf; -+ -+ if (compat->mfw_hdr.sig == RTW89_MFW_SIG) -+ return RTW89_MFW_HDR_VER_CODE(&compat->mfw_hdr); -+ else -+ return RTW89_FW_HDR_VER_CODE(&compat->fw_hdr); -+} -+ - #define RTW89_H2C_RF_PAGE_SIZE 500 - #define RTW89_H2C_RF_PAGE_NUM 3 - struct rtw89_fw_h2c_rf_reg_info { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-078-wifi-rtw89-request-full-firmware-only-once-if-it-s-e.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-078-wifi-rtw89-request-full-firmware-only-once-if-it-s-e.patch deleted file mode 100644 index 9aaa123c6..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-078-wifi-rtw89-request-full-firmware-only-once-if-it-s-e.patch +++ /dev/null @@ -1,159 +0,0 @@ -From 13eb07e0be1b95f1e1fab721fb0f38117edfe80b Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Fri, 2 Dec 2022 14:05:21 +0800 -Subject: [PATCH 078/149] wifi: rtw89: request full firmware only once if it's - early requested - -Under some condition, we now have to do early request full firmware when -rtw89_early_fw_feature_recognize(). In this case, we can avoid requesting -full firmware twice during probing driver. So, we pass out full firmware -from rtw89_early_fw_feature_recognize() if it's requested successfully. -And then, if firmware is settled, we have no need to request full firmware -again during normal initizating flow. - -Setting firmware flow is updated to be as the following. - - platform | early recognizing | normally initizating ------------------------------------------------------------------------ - deny reading | request full FW | (no more FW requesting) - partial file | | (obtain FW from early pahse) ------------------------------------------------------------------------ - able to read | request partial FW | async request full FW - partial file | (quite small chunk) | - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202060521.501512-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 6 ++++- - drivers/net/wireless/realtek/rtw89/fw.c | 28 +++++++++++++++++++---- - drivers/net/wireless/realtek/rtw89/fw.h | 7 +++--- - 3 files changed, 32 insertions(+), 9 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -3423,6 +3423,7 @@ struct rtw89_dev *rtw89_alloc_ieee80211_ - u32 bus_data_size, - const struct rtw89_chip_info *chip) - { -+ const struct firmware *firmware; - struct ieee80211_hw *hw; - struct rtw89_dev *rtwdev; - struct ieee80211_ops *ops; -@@ -3430,7 +3431,7 @@ struct rtw89_dev *rtw89_alloc_ieee80211_ - u32 early_feat_map = 0; - bool no_chanctx; - -- rtw89_early_fw_feature_recognize(device, chip, &early_feat_map); -+ firmware = rtw89_early_fw_feature_recognize(device, chip, &early_feat_map); - - ops = kmemdup(&rtw89_ops, sizeof(rtw89_ops), GFP_KERNEL); - if (!ops) -@@ -3457,6 +3458,7 @@ struct rtw89_dev *rtw89_alloc_ieee80211_ - rtwdev->dev = device; - rtwdev->ops = ops; - rtwdev->chip = chip; -+ rtwdev->fw.firmware = firmware; - - rtw89_debug(rtwdev, RTW89_DBG_FW, "probe driver %s chanctx\n", - no_chanctx ? "without" : "with"); -@@ -3465,6 +3467,7 @@ struct rtw89_dev *rtw89_alloc_ieee80211_ - - err: - kfree(ops); -+ release_firmware(firmware); - return NULL; - } - EXPORT_SYMBOL(rtw89_alloc_ieee80211_hw); -@@ -3472,6 +3475,7 @@ EXPORT_SYMBOL(rtw89_alloc_ieee80211_hw); - void rtw89_free_ieee80211_hw(struct rtw89_dev *rtwdev) - { - kfree(rtwdev->ops); -+ release_firmware(rtwdev->fw.firmware); - ieee80211_free_hw(rtwdev->hw); - } - EXPORT_SYMBOL(rtw89_free_ieee80211_hw); ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -273,9 +273,10 @@ static void rtw89_fw_recognize_features( - } - } - --void rtw89_early_fw_feature_recognize(struct device *device, -- const struct rtw89_chip_info *chip, -- u32 *early_feat_map) -+const struct firmware * -+rtw89_early_fw_feature_recognize(struct device *device, -+ const struct rtw89_chip_info *chip, -+ u32 *early_feat_map) - { - union rtw89_compat_fw_hdr buf = {}; - const struct firmware *firmware; -@@ -300,7 +301,7 @@ void rtw89_early_fw_feature_recognize(st - - if (ret) { - dev_err(device, "failed to early request firmware: %d\n", ret); -- return; -+ return NULL; - } - - if (full_req) -@@ -322,7 +323,11 @@ void rtw89_early_fw_feature_recognize(st - } - - out: -+ if (full_req) -+ return firmware; -+ - release_firmware(firmware); -+ return NULL; - } - - int rtw89_fw_recognize(struct rtw89_dev *rtwdev) -@@ -629,6 +634,13 @@ int rtw89_load_firmware(struct rtw89_dev - fw->rtwdev = rtwdev; - init_completion(&fw->completion); - -+ if (fw->firmware) { -+ rtw89_debug(rtwdev, RTW89_DBG_FW, -+ "full firmware has been early requested\n"); -+ complete_all(&fw->completion); -+ return 0; -+ } -+ - ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev, - GFP_KERNEL, fw, rtw89_load_firmware_cb); - if (ret) { -@@ -645,8 +657,14 @@ void rtw89_unload_firmware(struct rtw89_ - - rtw89_wait_firmware_completion(rtwdev); - -- if (fw->firmware) -+ if (fw->firmware) { - release_firmware(fw->firmware); -+ -+ /* assign NULL back in case rtw89_free_ieee80211_hw() -+ * try to release the same one again. -+ */ -+ fw->firmware = NULL; -+ } - } - - #define H2C_CAM_LEN 60 ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -3444,9 +3444,10 @@ struct rtw89_fw_h2c_rf_get_mccch { - - int rtw89_fw_check_rdy(struct rtw89_dev *rtwdev); - int rtw89_fw_recognize(struct rtw89_dev *rtwdev); --void rtw89_early_fw_feature_recognize(struct device *device, -- const struct rtw89_chip_info *chip, -- u32 *early_feat_map); -+const struct firmware * -+rtw89_early_fw_feature_recognize(struct device *device, -+ const struct rtw89_chip_info *chip, -+ u32 *early_feat_map); - int rtw89_fw_download(struct rtw89_dev *rtwdev, enum rtw89_fw_type type); - int rtw89_load_firmware(struct rtw89_dev *rtwdev); - void rtw89_unload_firmware(struct rtw89_dev *rtwdev); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-079-wifi-rtw89-add-mac-TSF-sync-function.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-079-wifi-rtw89-add-mac-TSF-sync-function.patch deleted file mode 100644 index 8edb1ae10..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-079-wifi-rtw89-add-mac-TSF-sync-function.patch +++ /dev/null @@ -1,117 +0,0 @@ -From fb2b8cec81d75b2b20bdbc2fca7a60a68bc78aac Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 2 Dec 2022 14:15:24 +0800 -Subject: [PATCH 079/149] wifi: rtw89: add mac TSF sync function - -If the interface is in AP/P2P GO mode, we adjust the TSF with random -offset to avoid TBTT of different vifs to overlap and collide. -For every new interface added, we adjust the value and resync for all -interfaces. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202061527.505668-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.c | 44 ++++++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/mac.h | 2 ++ - drivers/net/wireless/realtek/rtw89/reg.h | 17 +++++++++ - 3 files changed, 63 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -3913,6 +3913,49 @@ static void rtw89_mac_port_cfg_tbtt_shif - B_AX_TBTT_SHIFT_OFST_MASK, val); - } - -+static void rtw89_mac_port_tsf_sync(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, -+ struct rtw89_vif *rtwvif_src, u8 offset, -+ int *n_offset) -+{ -+ u32 val, reg; -+ -+ if (rtwvif->net_type != RTW89_NET_TYPE_AP_MODE || rtwvif == rtwvif_src) -+ return; -+ -+ /* adjust offset randomly to avoid beacon conflict */ -+ offset = offset - offset / 4 + get_random_u32() % (offset / 2); -+ val = RTW89_PORT_OFFSET_MS_TO_32US((*n_offset)++, offset); -+ reg = rtw89_mac_reg_by_idx(R_AX_PORT0_TSF_SYNC + rtwvif->port * 4, -+ rtwvif->mac_idx); -+ -+ rtw89_write32_mask(rtwdev, reg, B_AX_SYNC_PORT_SRC, rtwvif_src->port); -+ rtw89_write32_mask(rtwdev, reg, B_AX_SYNC_PORT_OFFSET_VAL, val); -+ rtw89_write32_set(rtwdev, reg, B_AX_SYNC_NOW); -+} -+ -+static void rtw89_mac_port_tsf_resync_all(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_vif *src = NULL, *tmp; -+ u8 offset = 100, vif_aps = 0; -+ int n_offset = 1; -+ -+ rtw89_for_each_rtwvif(rtwdev, tmp) { -+ if (!src || tmp->net_type == RTW89_NET_TYPE_INFRA) -+ src = tmp; -+ if (tmp->net_type == RTW89_NET_TYPE_AP_MODE) -+ vif_aps++; -+ } -+ -+ if (vif_aps == 0) -+ return; -+ -+ offset /= (vif_aps + 1); -+ -+ rtw89_for_each_rtwvif(rtwdev, tmp) -+ rtw89_mac_port_tsf_sync(rtwdev, tmp, src, offset, &n_offset); -+} -+ - int rtw89_mac_vif_init(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) - { - int ret; -@@ -3991,6 +4034,7 @@ int rtw89_mac_port_update(struct rtw89_d - rtw89_mac_port_cfg_bss_color(rtwdev, rtwvif); - rtw89_mac_port_cfg_mbssid(rtwdev, rtwvif); - rtw89_mac_port_cfg_func_en(rtwdev, rtwvif); -+ rtw89_mac_port_tsf_resync_all(rtwdev); - fsleep(BCN_ERLY_SET_DLY); - rtw89_mac_port_cfg_bcn_early(rtwdev, rtwvif); - ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -168,6 +168,8 @@ enum rtw89_mac_ax_l0_to_l1_event { - MAC_AX_L0_TO_L1_EVENT_MAX = 15, - }; - -+#define RTW89_PORT_OFFSET_MS_TO_32US(n, shift_ms) ((n) * (shift_ms) * 1000 / 32) -+ - enum rtw89_mac_dbg_port_sel { - /* CMAC 0 related */ - RTW89_DBG_PORT_SEL_PTCL_C0 = 0, ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -2048,6 +2048,23 @@ - #define B_AX_PTCL_TOP_ERR_IND BIT(1) - #define B_AX_SCHEDULE_TOP_ERR_IND BIT(0) - -+#define R_AX_PORT0_TSF_SYNC 0xC2A0 -+#define R_AX_PORT0_TSF_SYNC_C1 0xE2A0 -+#define R_AX_PORT1_TSF_SYNC 0xC2A4 -+#define R_AX_PORT1_TSF_SYNC_C1 0xE2A4 -+#define R_AX_PORT2_TSF_SYNC 0xC2A8 -+#define R_AX_PORT2_TSF_SYNC_C1 0xE2A8 -+#define R_AX_PORT3_TSF_SYNC 0xC2AC -+#define R_AX_PORT3_TSF_SYNC_C1 0xE2AC -+#define R_AX_PORT4_TSF_SYNC 0xC2B0 -+#define R_AX_PORT4_TSF_SYNC_C1 0xE2B0 -+#define B_AX_SYNC_NOW BIT(30) -+#define B_AX_SYNC_ONCE BIT(29) -+#define B_AX_SYNC_AUTO BIT(28) -+#define B_AX_SYNC_PORT_SRC GENMASK(26, 24) -+#define B_AX_SYNC_PORT_OFFSET_SIGN BIT(18) -+#define B_AX_SYNC_PORT_OFFSET_VAL GENMASK(17, 0) -+ - #define R_AX_MACID_SLEEP_0 0xC2C0 - #define R_AX_MACID_SLEEP_0_C1 0xE2C0 - #define B_AX_MACID31_0_SLEEP_SH 0 diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-080-wifi-rtw89-stop-mac-port-function-when-stop_ap.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-080-wifi-rtw89-stop-mac-port-function-when-stop_ap.patch deleted file mode 100644 index d44ad64da..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-080-wifi-rtw89-stop-mac-port-function-when-stop_ap.patch +++ /dev/null @@ -1,80 +0,0 @@ -From d592b9f742643f07db53ac34baf6bbd3ce9478dc Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 2 Dec 2022 14:15:25 +0800 -Subject: [PATCH 080/149] wifi: rtw89: stop mac port function when stop_ap() - -Disable hardware beacon related functions when ap stops. So hardware won't -transmit beacons while interface is already removed. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202061527.505668-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.c | 16 +++++++++++++--- - drivers/net/wireless/realtek/rtw89/mac.h | 1 + - drivers/net/wireless/realtek/rtw89/mac80211.c | 1 + - 3 files changed, 15 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -3877,11 +3877,16 @@ static void rtw89_mac_port_cfg_hiq_drop( - } - - static void rtw89_mac_port_cfg_func_en(struct rtw89_dev *rtwdev, -- struct rtw89_vif *rtwvif) -+ struct rtw89_vif *rtwvif, bool enable) - { - const struct rtw89_port_reg *p = &rtw_port_base; - -- rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, B_AX_PORT_FUNC_EN); -+ if (enable) -+ rtw89_write32_port_set(rtwdev, rtwvif, p->port_cfg, -+ B_AX_PORT_FUNC_EN); -+ else -+ rtw89_write32_port_clr(rtwdev, rtwvif, p->port_cfg, -+ B_AX_PORT_FUNC_EN); - } - - static void rtw89_mac_port_cfg_bcn_early(struct rtw89_dev *rtwdev, -@@ -4033,7 +4038,7 @@ int rtw89_mac_port_update(struct rtw89_d - rtw89_mac_port_cfg_tbtt_shift(rtwdev, rtwvif); - rtw89_mac_port_cfg_bss_color(rtwdev, rtwvif); - rtw89_mac_port_cfg_mbssid(rtwdev, rtwvif); -- rtw89_mac_port_cfg_func_en(rtwdev, rtwvif); -+ rtw89_mac_port_cfg_func_en(rtwdev, rtwvif, true); - rtw89_mac_port_tsf_resync_all(rtwdev); - fsleep(BCN_ERLY_SET_DLY); - rtw89_mac_port_cfg_bcn_early(rtwdev, rtwvif); -@@ -4085,6 +4090,11 @@ void rtw89_mac_set_he_obss_narrow_bw_ru( - rtw89_write32_set(rtwdev, reg, B_AX_RXTRIG_RU26_DIS); - } - -+void rtw89_mac_stop_ap(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ rtw89_mac_port_cfg_func_en(rtwdev, rtwvif, false); -+} -+ - int rtw89_mac_add_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) - { - int ret; ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -908,6 +908,7 @@ int rtw89_mac_add_vif(struct rtw89_dev * - int rtw89_mac_port_update(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); - void rtw89_mac_set_he_obss_narrow_bw_ru(struct rtw89_dev *rtwdev, - struct ieee80211_vif *vif); -+void rtw89_mac_stop_ap(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); - int rtw89_mac_remove_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *vif); - void rtw89_mac_disable_cpu(struct rtw89_dev *rtwdev); - int rtw89_mac_enable_cpu(struct rtw89_dev *rtwdev, u8 boot_reason, bool dlfw); ---- a/drivers/net/wireless/realtek/rtw89/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -454,6 +454,7 @@ void rtw89_ops_stop_ap(struct ieee80211_ - struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; - - mutex_lock(&rtwdev->mutex); -+ rtw89_mac_stop_ap(rtwdev, rtwvif); - rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, NULL); - rtw89_fw_h2c_join_info(rtwdev, rtwvif, NULL, true); - mutex_unlock(&rtwdev->mutex); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-081-wifi-rtw89-fix-unsuccessful-interface_add-flow.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-081-wifi-rtw89-fix-unsuccessful-interface_add-flow.patch deleted file mode 100644 index 3202ef9ad..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-081-wifi-rtw89-fix-unsuccessful-interface_add-flow.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 8fc5d4338620b81b1b265c725b38aced8acf8d72 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 2 Dec 2022 14:15:26 +0800 -Subject: [PATCH 081/149] wifi: rtw89: fix unsuccessful interface_add flow - -Remove according vifs from list if we couldn't set this interface up. -Otherwise the rtwvif_list could contain unreferenced objects. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202061527.505668-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac80211.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -125,6 +125,7 @@ static int rtw89_ops_add_interface(struc - RTW89_PORT_NUM); - if (rtwvif->port == RTW89_PORT_NUM) { - ret = -ENOSPC; -+ list_del_init(&rtwvif->list); - goto out; - } - -@@ -138,6 +139,7 @@ static int rtw89_ops_add_interface(struc - ret = rtw89_mac_add_vif(rtwdev, rtwvif); - if (ret) { - rtw89_core_release_bit_map(rtwdev->hw_port, rtwvif->port); -+ list_del_init(&rtwvif->list); - goto out; - } - diff --git a/package/kernel/mac80211/patches/rtl/201-v6.2-082-wifi-rtw89-add-join-info-upon-create-interface.patch b/package/kernel/mac80211/patches/rtl/201-v6.2-082-wifi-rtw89-add-join-info-upon-create-interface.patch deleted file mode 100644 index a2f8eecd8..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.2-082-wifi-rtw89-add-join-info-upon-create-interface.patch +++ /dev/null @@ -1,29 +0,0 @@ -From a0e78d5c6082fc953fef5af7293be0145c67dba4 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 2 Dec 2022 14:15:27 +0800 -Subject: [PATCH 082/149] wifi: rtw89: add join info upon create interface - -To support multiple vifs, fw need more information of each role. -Send this info to make things work as expected. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221202061527.505668-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -3980,6 +3980,10 @@ int rtw89_mac_vif_init(struct rtw89_dev - if (ret) - return ret; - -+ ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, NULL, true); -+ if (ret) -+ return ret; -+ - ret = rtw89_cam_init(rtwdev, rtwvif); - if (ret) - return ret; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-083-wifi-rtw89-consider-ER-SU-as-a-TX-capability.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-083-wifi-rtw89-consider-ER-SU-as-a-TX-capability.patch deleted file mode 100644 index 7590349fd..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-083-wifi-rtw89-consider-ER-SU-as-a-TX-capability.patch +++ /dev/null @@ -1,104 +0,0 @@ -From 25ed1a172298eed1cab329792d8e4d7363a411fc Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 9 Dec 2022 09:21:10 +0800 -Subject: [PATCH 083/149] wifi: rtw89: consider ER SU as a TX capability - -ER (Extended Range) SU is to have a larger coverage. We set this as a RA -capability, and then firmware can choose ER SU to transmit packets to -reception at cell edge. For 8852C, it needs to fill this capability in -TXWD, so update rtw89_build_txwd_info0_v1(). - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221209012110.7242-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 13 ++++++++++++- - drivers/net/wireless/realtek/rtw89/core.h | 2 ++ - drivers/net/wireless/realtek/rtw89/phy.c | 1 + - drivers/net/wireless/realtek/rtw89/txrx.h | 2 ++ - 4 files changed, 17 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -689,7 +689,9 @@ rtw89_core_tx_update_data_info(struct rt - struct rtw89_core_tx_request *tx_req) - { - struct ieee80211_vif *vif = tx_req->vif; -+ struct ieee80211_sta *sta = tx_req->sta; - struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta); - struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern; - const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); - struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; -@@ -707,6 +709,7 @@ rtw89_core_tx_update_data_info(struct rt - desc_info->qsel = qsel; - desc_info->mac_id = rtw89_core_tx_get_mac_id(rtwdev, tx_req); - desc_info->port = desc_info->hiq ? rtwvif->port : 0; -+ desc_info->er_cap = rtwsta ? rtwsta->er_cap : false; - - /* enable wd_info for AMPDU */ - desc_info->en_wd_info = true; -@@ -1006,7 +1009,9 @@ static __le32 rtw89_build_txwd_info0(str - static __le32 rtw89_build_txwd_info0_v1(struct rtw89_tx_desc_info *desc_info) - { - u32 dword = FIELD_PREP(RTW89_TXWD_INFO0_DISDATAFB, desc_info->dis_data_fb) | -- FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port); -+ FIELD_PREP(RTW89_TXWD_INFO0_MULTIPORT_ID, desc_info->port) | -+ FIELD_PREP(RTW89_TXWD_INFO0_DATA_ER, desc_info->er_cap) | -+ FIELD_PREP(RTW89_TXWD_INFO0_DATA_BW_ER, 0); - - return cpu_to_le32(dword); - } -@@ -2585,6 +2590,12 @@ int rtw89_core_sta_assoc(struct rtw89_de - rtw89_mac_bf_monitor_calc(rtwdev, sta, false); - - if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) { -+ struct ieee80211_bss_conf *bss_conf = &vif->bss_conf; -+ -+ if (bss_conf->he_support && -+ !(bss_conf->he_oper.params & IEEE80211_HE_OPERATION_ER_SU_DISABLE)) -+ rtwsta->er_cap = true; -+ - rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, - BTC_ROLE_MSTS_STA_CONN_END); - rtw89_core_get_no_ul_ofdma_htc(rtwdev, &rtwsta->htc_template); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -816,6 +816,7 @@ struct rtw89_tx_desc_info { - #define RTW89_MGMT_HW_SEQ_MODE 1 - bool hiq; - u8 port; -+ bool er_cap; - }; - - struct rtw89_core_tx_request { -@@ -2194,6 +2195,7 @@ struct rtw89_sec_cam_entry { - struct rtw89_sta { - u8 mac_id; - bool disassoc; -+ bool er_cap; - struct rtw89_dev *rtwdev; - struct rtw89_vif *rtwvif; - struct rtw89_ra_info ra; ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -367,6 +367,7 @@ static void rtw89_phy_ra_sta_update(stru - } - - ra->bw_cap = bw_mode; -+ ra->er_cap = rtwsta->er_cap; - ra->mode_ctrl = mode; - ra->macid = rtwsta->mac_id; - ra->stbc_cap = stbc_en; ---- a/drivers/net/wireless/realtek/rtw89/txrx.h -+++ b/drivers/net/wireless/realtek/rtw89/txrx.h -@@ -75,7 +75,9 @@ - #define RTW89_TXWD_INFO0_DATA_BW GENMASK(29, 28) - #define RTW89_TXWD_INFO0_GI_LTF GENMASK(27, 25) - #define RTW89_TXWD_INFO0_DATA_RATE GENMASK(24, 16) -+#define RTW89_TXWD_INFO0_DATA_ER BIT(15) - #define RTW89_TXWD_INFO0_DISDATAFB BIT(10) -+#define RTW89_TXWD_INFO0_DATA_BW_ER BIT(8) - #define RTW89_TXWD_INFO0_MULTIPORT_ID GENMASK(6, 4) - - /* TX WD INFO DWORD 1 */ diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-084-wifi-rtw89-fw-adapt-to-new-firmware-format-of-securi.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-084-wifi-rtw89-fw-adapt-to-new-firmware-format-of-securi.patch deleted file mode 100644 index 6e6239fa7..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-084-wifi-rtw89-fw-adapt-to-new-firmware-format-of-securi.patch +++ /dev/null @@ -1,96 +0,0 @@ -From 18ddf102d4b8768cd058105168f29f96cd0c6d2d Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 9 Dec 2022 09:22:15 +0800 -Subject: [PATCH 084/149] wifi: rtw89: fw: adapt to new firmware format of - security section - -Normally, system image should ensure firmware integrity, but we provide -an advance feature to ensure this by security section along with firmware. -To enable this feature, custom ID is programmed into efuse, and driver -will download proper security section to firmware. - -Since I don't have this kind hardware modules on hand yet, but new format -is used by newer firmware. Therefore, I prepare this patch in advance to -consider size of security section as a factor of checking rule of firmware -size, but don't actually download security section to firmware. - -This patch is backward compatible, so it will be safe to have this change -before adding an new format firmware to linux-firmware repository. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221209012215.7342-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 11 ++++++++++- - drivers/net/wireless/realtek/rtw89/fw.h | 13 +++++++++++-- - 2 files changed, 21 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -91,6 +91,7 @@ static int rtw89_fw_hdr_parser(struct rt - const u8 *fwdynhdr; - const u8 *bin; - u32 base_hdr_len; -+ u32 mssc_len = 0; - u32 i; - - if (!info) -@@ -120,6 +121,14 @@ static int rtw89_fw_hdr_parser(struct rt - fw += RTW89_FW_HDR_SIZE; - section_info = info->section_info; - for (i = 0; i < info->section_num; i++) { -+ section_info->type = GET_FWSECTION_HDR_SECTIONTYPE(fw); -+ if (section_info->type == FWDL_SECURITY_SECTION_TYPE) { -+ section_info->mssc = GET_FWSECTION_HDR_MSSC(fw); -+ mssc_len += section_info->mssc * FWDL_SECURITY_SIGLEN; -+ } else { -+ section_info->mssc = 0; -+ } -+ - section_info->len = GET_FWSECTION_HDR_SEC_SIZE(fw); - if (GET_FWSECTION_HDR_CHECKSUM(fw)) - section_info->len += FWDL_SECTION_CHKSUM_LEN; -@@ -132,7 +141,7 @@ static int rtw89_fw_hdr_parser(struct rt - section_info++; - } - -- if (fw_end != bin) { -+ if (fw_end != bin + mssc_len) { - rtw89_err(rtwdev, "[ERR]fw bin size\n"); - return -EINVAL; - } ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -171,6 +171,8 @@ struct rtw89_fw_hdr_section_info { - const u8 *addr; - u32 len; - u32 dladdr; -+ u32 mssc; -+ u8 type; - }; - - struct rtw89_fw_bin_info { -@@ -480,14 +482,21 @@ static inline void RTW89_SET_EDCA_PARAM( - #define FW_EDCA_PARAM_CWMIN_MSK GENMASK(11, 8) - #define FW_EDCA_PARAM_AIFS_MSK GENMASK(7, 0) - -+#define FWDL_SECURITY_SECTION_TYPE 9 -+#define FWDL_SECURITY_SIGLEN 512 -+ -+#define GET_FWSECTION_HDR_DL_ADDR(fwhdr) \ -+ le32_get_bits(*((const __le32 *)(fwhdr)), GENMASK(31, 0)) -+#define GET_FWSECTION_HDR_SECTIONTYPE(fwhdr) \ -+ le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(27, 24)) - #define GET_FWSECTION_HDR_SEC_SIZE(fwhdr) \ - le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(23, 0)) - #define GET_FWSECTION_HDR_CHECKSUM(fwhdr) \ - le32_get_bits(*((const __le32 *)(fwhdr) + 1), BIT(28)) - #define GET_FWSECTION_HDR_REDL(fwhdr) \ - le32_get_bits(*((const __le32 *)(fwhdr) + 1), BIT(29)) --#define GET_FWSECTION_HDR_DL_ADDR(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr)), GENMASK(31, 0)) -+#define GET_FWSECTION_HDR_MSSC(fwhdr) \ -+ le32_get_bits(*((const __le32 *)(fwhdr) + 2), GENMASK(31, 0)) - - #define GET_FW_HDR_MAJOR_VERSION(fwhdr) \ - le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(7, 0)) diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-087-wifi-rtw89-8852c-rfk-recover-RX-DCK-failure.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-087-wifi-rtw89-8852c-rfk-recover-RX-DCK-failure.patch deleted file mode 100644 index 96981f873..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-087-wifi-rtw89-8852c-rfk-recover-RX-DCK-failure.patch +++ /dev/null @@ -1,394 +0,0 @@ -From 9c22d603e255ece73e61e3b3f93dae8ab82c17ff Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 9 Dec 2022 10:09:40 +0800 -Subject: [PATCH 087/149] wifi: rtw89: 8852c: rfk: recover RX DCK failure - -RX DCK stands for RX DC calibration that affects CCA, so abnormal -calibration values resulted from calibration failure can cause TX get -stuck. - -To solve this, redo calibration if result is bad (over thresholds). When -retry count is over, do recovery that sets high gain fields of RX DCK -results from low gain fields. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221209020940.9573-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 10 + - .../net/wireless/realtek/rtw89/rtw8852c_rfk.c | 253 +++++++++++++++++- - 2 files changed, 256 insertions(+), 7 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3559,6 +3559,7 @@ - #define RR_MOD_IQK GENMASK(19, 4) - #define RR_MOD_DPK GENMASK(19, 5) - #define RR_MOD_MASK GENMASK(19, 16) -+#define RR_MOD_DCK GENMASK(14, 10) - #define RR_MOD_RGM GENMASK(13, 4) - #define RR_MOD_V_DOWN 0x0 - #define RR_MOD_V_STANDBY 0x1 -@@ -3572,6 +3573,7 @@ - #define RR_MOD_NBW GENMASK(15, 14) - #define RR_MOD_M_RXG GENMASK(13, 4) - #define RR_MOD_M_RXBB GENMASK(9, 5) -+#define RR_MOD_LO_SEL BIT(1) - #define RR_MODOPT 0x01 - #define RR_MODOPT_M_TXPWR GENMASK(5, 0) - #define RR_WLSEL 0x02 -@@ -3638,6 +3640,7 @@ - #define RR_LUTWA_M2 GENMASK(4, 0) - #define RR_LUTWD1 0x3e - #define RR_LUTWD0 0x3f -+#define RR_LUTWD0_MB GENMASK(11, 6) - #define RR_LUTWD0_LB GENMASK(5, 0) - #define RR_TM 0x42 - #define RR_TM_TRI BIT(19) -@@ -3731,10 +3734,14 @@ - #define RR_XALNA2_SW2 GENMASK(9, 8) - #define RR_XALNA2_SW GENMASK(1, 0) - #define RR_DCK 0x92 -+#define RR_DCK_S1 GENMASK(19, 16) -+#define RR_DCK_TIA GENMASK(15, 9) - #define RR_DCK_DONE GENMASK(7, 5) - #define RR_DCK_FINE BIT(1) - #define RR_DCK_LV BIT(0) - #define RR_DCK1 0x93 -+#define RR_DCK1_S1 GENMASK(19, 16) -+#define RR_DCK1_TIA GENMASK(15, 9) - #define RR_DCK1_DONE BIT(5) - #define RR_DCK1_CLR GENMASK(3, 0) - #define RR_DCK1_SEL BIT(3) -@@ -3783,11 +3790,14 @@ - #define RR_LUTDBG 0xdf - #define RR_LUTDBG_TIA BIT(12) - #define RR_LUTDBG_LOK BIT(2) -+#define RR_LUTPLL 0xec -+#define RR_CAL_RW BIT(19) - #define RR_LUTWE2 0xee - #define RR_LUTWE2_RTXBW BIT(2) - #define RR_LUTWE 0xef - #define RR_LUTWE_LOK BIT(2) - #define RR_RFC 0xf0 -+#define RR_WCAL BIT(16) - #define RR_RFC_CKEN BIT(1) - - #define R_UPD_P0 0x0000 ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c -@@ -59,6 +59,9 @@ static const u32 dpk_par_regs[RTW89_DPK_ - {0x81a8, 0x81c4, 0x81c8, 0x81e8}, - }; - -+static const u8 _dck_addr_bs[RF_PATH_NUM_8852C] = {0x0, 0x10}; -+static const u8 _dck_addr[RF_PATH_NUM_8852C] = {0xc, 0x1c}; -+ - static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) - { - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]dbcc_en: %x, PHY%d\n", -@@ -1536,6 +1539,155 @@ static void _iqk(struct rtw89_dev *rtwde - } - } - -+static void _rx_dck_value_rewrite(struct rtw89_dev *rtwdev, u8 path, u8 addr, -+ u8 val_i, u8 val_q) -+{ -+ u32 ofst_val; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] rewrite val_i = 0x%x, val_q = 0x%x\n", val_i, val_q); -+ -+ /* val_i and val_q are 7 bits, and target is 6 bits. */ -+ ofst_val = u32_encode_bits(val_q >> 1, RR_LUTWD0_MB) | -+ u32_encode_bits(val_i >> 1, RR_LUTWD0_LB); -+ -+ rtw89_write_rf(rtwdev, path, RR_LUTPLL, RR_CAL_RW, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_RFC, RR_WCAL, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_FINE, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_LUTWA, MASKBYTE0, addr); -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, ofst_val); -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, ofst_val); -+ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_FINE, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RFC, RR_WCAL, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_LUTPLL, RR_CAL_RW, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RX_DCK] Final val_i = 0x%x, val_q = 0x%x\n", -+ u32_get_bits(ofst_val, RR_LUTWD0_LB) << 1, -+ u32_get_bits(ofst_val, RR_LUTWD0_MB) << 1); -+} -+ -+static bool _rx_dck_rek_check(struct rtw89_dev *rtwdev, u8 path) -+{ -+ u8 i_even_bs, q_even_bs; -+ u8 i_odd_bs, q_odd_bs; -+ u8 i_even, q_even; -+ u8 i_odd, q_odd; -+ const u8 th = 10; -+ u8 i; -+ -+ for (i = 0; i < RF_PATH_NUM_8852C; i++) { -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr_bs[i]); -+ i_even_bs = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); -+ q_even_bs = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] Gain[0x%x] i_even_bs/ q_even_bs = 0x%x/ 0x%x\n", -+ _dck_addr_bs[i], i_even_bs, q_even_bs); -+ -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr[i]); -+ i_even = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); -+ q_even = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] Gain[0x%x] i_even/ q_even = 0x%x/ 0x%x\n", -+ _dck_addr[i], i_even, q_even); -+ -+ if (abs(i_even_bs - i_even) > th || abs(q_even_bs - q_even) > th) -+ return true; -+ -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr_bs[i] + 1); -+ i_odd_bs = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); -+ q_odd_bs = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] Gain[0x%x] i_odd_bs/ q_odd_bs = 0x%x/ 0x%x\n", -+ _dck_addr_bs[i] + 1, i_odd_bs, q_odd_bs); -+ -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr[i] + 1); -+ i_odd = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); -+ q_odd = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] Gain[0x%x] i_odd/ q_odd = 0x%x/ 0x%x\n", -+ _dck_addr[i] + 1, i_odd, q_odd); -+ -+ if (abs(i_odd_bs - i_odd) > th || abs(q_odd_bs - q_odd) > th) -+ return true; -+ } -+ -+ return false; -+} -+ -+static void _rx_dck_fix_if_need(struct rtw89_dev *rtwdev, u8 path, u8 addr, -+ u8 val_i_bs, u8 val_q_bs, u8 val_i, u8 val_q) -+{ -+ const u8 th = 10; -+ -+ if ((abs(val_i_bs - val_i) < th) && (abs(val_q_bs - val_q) <= th)) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RX_DCK] offset check PASS!!\n"); -+ return; -+ } -+ -+ if (abs(val_i_bs - val_i) > th) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] val_i over TH (0x%x / 0x%x)\n", val_i_bs, val_i); -+ val_i = val_i_bs; -+ } -+ -+ if (abs(val_q_bs - val_q) > th) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] val_q over TH (0x%x / 0x%x)\n", val_q_bs, val_q); -+ val_q = val_q_bs; -+ } -+ -+ _rx_dck_value_rewrite(rtwdev, path, addr, val_i, val_q); -+} -+ -+static void _rx_dck_recover(struct rtw89_dev *rtwdev, u8 path) -+{ -+ u8 i_even_bs, q_even_bs; -+ u8 i_odd_bs, q_odd_bs; -+ u8 i_even, q_even; -+ u8 i_odd, q_odd; -+ u8 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RX_DCK] ===> recovery\n"); -+ -+ for (i = 0; i < RF_PATH_NUM_8852C; i++) { -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr_bs[i]); -+ i_even_bs = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); -+ q_even_bs = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); -+ -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr_bs[i] + 1); -+ i_odd_bs = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); -+ q_odd_bs = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] Gain[0x%x] i_even_bs/ q_even_bs = 0x%x/ 0x%x\n", -+ _dck_addr_bs[i], i_even_bs, q_even_bs); -+ -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr[i]); -+ i_even = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); -+ q_even = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] Gain[0x%x] i_even/ q_even = 0x%x/ 0x%x\n", -+ _dck_addr[i], i_even, q_even); -+ _rx_dck_fix_if_need(rtwdev, path, _dck_addr[i], -+ i_even_bs, q_even_bs, i_even, q_even); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] Gain[0x%x] i_odd_bs/ q_odd_bs = 0x%x/ 0x%x\n", -+ _dck_addr_bs[i] + 1, i_odd_bs, q_odd_bs); -+ -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_DCK, _dck_addr[i] + 1); -+ i_odd = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_TIA); -+ q_odd = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_TIA); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] Gain[0x%x] i_odd/ q_odd = 0x%x/ 0x%x\n", -+ _dck_addr[i] + 1, i_odd, q_odd); -+ _rx_dck_fix_if_need(rtwdev, path, _dck_addr[i] + 1, -+ i_odd_bs, q_odd_bs, i_odd, q_odd); -+ } -+} -+ - static void _rx_dck_toggle(struct rtw89_dev *rtwdev, u8 path) - { - int ret; -@@ -1573,6 +1725,37 @@ static void _set_rx_dck(struct rtw89_dev - } - } - -+static -+u8 _rx_dck_channel_calc(struct rtw89_dev *rtwdev, const struct rtw89_chan *chan) -+{ -+ u8 target_ch = 0; -+ -+ if (chan->band_type == RTW89_BAND_5G) { -+ if (chan->channel >= 36 && chan->channel <= 64) { -+ target_ch = 100; -+ } else if (chan->channel >= 100 && chan->channel <= 144) { -+ target_ch = chan->channel + 32; -+ if (target_ch > 144) -+ target_ch = chan->channel + 33; -+ } else if (chan->channel >= 149 && chan->channel <= 177) { -+ target_ch = chan->channel - 33; -+ } -+ } else if (chan->band_type == RTW89_BAND_6G) { -+ if (chan->channel >= 1 && chan->channel <= 125) -+ target_ch = chan->channel + 32; -+ else -+ target_ch = chan->channel - 32; -+ } else { -+ target_ch = chan->channel; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] cur_ch / target_ch = %d / %d\n", -+ chan->channel, target_ch); -+ -+ return target_ch; -+} -+ - #define RTW8852C_RF_REL_VERSION 34 - #define RTW8852C_DPK_VER 0x10 - #define RTW8852C_DPK_TH_AVG_NUM 4 -@@ -3874,11 +4057,14 @@ void rtw8852c_iqk(struct rtw89_dev *rtwd - - #define RXDCK_VER_8852C 0xe - --void rtw8852c_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool is_afe) -+static void _rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ bool is_afe, u8 retry_limit) - { - struct rtw89_rx_dck_info *rx_dck = &rtwdev->rx_dck; - u8 path, kpath; - u32 rf_reg5; -+ bool is_fail; -+ u8 rek_cnt; - - kpath = _kpath(rtwdev, phy); - rtw89_debug(rtwdev, RTW89_DBG_RFK, -@@ -3895,7 +4081,27 @@ void rtw8852c_rx_dck(struct rtw89_dev *r - B_P0_TSSI_TRK_EN, 0x1); - rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); - rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); -- _set_rx_dck(rtwdev, phy, path, is_afe); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_LO_SEL, rtwdev->dbcc_en); -+ -+ for (rek_cnt = 0; rek_cnt < retry_limit; rek_cnt++) { -+ _set_rx_dck(rtwdev, phy, path, is_afe); -+ -+ /* To reduce IO of dck_rek_check(), the last try is seen -+ * as failure always, and then do recovery procedure. -+ */ -+ if (rek_cnt == retry_limit - 1) { -+ _rx_dck_recover(rtwdev, path); -+ break; -+ } -+ -+ is_fail = _rx_dck_rek_check(rtwdev, path); -+ if (!is_fail) -+ break; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RX_DCK] rek_cnt[%d]=%d", -+ path, rek_cnt); -+ - rx_dck->thermal[path] = ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); - rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); - -@@ -3905,15 +4111,31 @@ void rtw8852c_rx_dck(struct rtw89_dev *r - } - } - --#define RTW8852C_RX_DCK_TH 8 -+void rtw8852c_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool is_afe) -+{ -+ _rx_dck(rtwdev, phy, is_afe, 1); -+} -+ -+#define RTW8852C_RX_DCK_TH 12 - - void rtw8852c_rx_dck_track(struct rtw89_dev *rtwdev) - { -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); - struct rtw89_rx_dck_info *rx_dck = &rtwdev->rx_dck; -+ enum rtw89_phy_idx phy_idx = RTW89_PHY_0; -+ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); -+ u8 dck_channel; - u8 cur_thermal; -+ u32 tx_en; - int delta; - int path; - -+ if (chan->band_type == RTW89_BAND_2G) -+ return; -+ -+ if (rtwdev->scanning) -+ return; -+ - for (path = 0; path < RF_PATH_NUM_8852C; path++) { - cur_thermal = - ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); -@@ -3923,11 +4145,28 @@ void rtw8852c_rx_dck_track(struct rtw89_ - "[RX_DCK] path=%d current thermal=0x%x delta=0x%x\n", - path, cur_thermal, delta); - -- if (delta >= RTW8852C_RX_DCK_TH) { -- rtw8852c_rx_dck(rtwdev, RTW89_PHY_0, false); -- return; -- } -+ if (delta >= RTW8852C_RX_DCK_TH) -+ goto trigger_rx_dck; -+ } -+ -+ return; -+ -+trigger_rx_dck: -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_START); -+ rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); -+ -+ for (path = 0; path < RF_PATH_NUM_8852C; path++) { -+ dck_channel = _rx_dck_channel_calc(rtwdev, chan); -+ _ctrl_ch(rtwdev, RTW89_PHY_0, dck_channel, chan->band_type); - } -+ -+ _rx_dck(rtwdev, RTW89_PHY_0, false, 20); -+ -+ for (path = 0; path < RF_PATH_NUM_8852C; path++) -+ _ctrl_ch(rtwdev, RTW89_PHY_0, chan->channel, chan->band_type); -+ -+ rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_STOP); - } - - void rtw8852c_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-088-wifi-rtw89-coex-add-BTC-format-version-derived-from-.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-088-wifi-rtw89-coex-add-BTC-format-version-derived-from-.patch deleted file mode 100644 index d71d18f10..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-088-wifi-rtw89-coex-add-BTC-format-version-derived-from-.patch +++ /dev/null @@ -1,191 +0,0 @@ -From 6140635a73c00c0b3a8a58d13890dcf27d0af32a Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sat, 17 Dec 2022 22:17:39 +0800 -Subject: [PATCH 088/149] wifi: rtw89: coex: add BTC format version derived - from firmware version - -Originally, each chip maintains its own format version followed firmware -it uses. As new chip is added, firmware changes format of exchange -messages to have rich information to handle more conditions. - -When old chip is going to upgrade firmware, it could use new format and -driver needs to maintain compatibility with old firmware. So, add this -version array to achieve this goal. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221217141745.43291-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 95 +++++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/coex.h | 1 + - drivers/net/wireless/realtek/rtw89/core.h | 26 +++++++ - drivers/net/wireless/realtek/rtw89/fw.c | 2 + - 4 files changed, 124 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -120,6 +120,70 @@ static const u32 cxtbl[] = { - 0xfafadafa /* 19 */ - }; - -+static const struct rtw89_btc_ver rtw89_btc_ver_defs[] = { -+ /* firmware version must be in decreasing order for each chip */ -+ {RTL8852C, RTW89_FW_VER_CODE(0, 27, 57, 0), -+ .fcxbtcrpt = 4, .fcxtdma = 3, .fcxslots = 1, .fcxcysta = 3, -+ .fcxstep = 3, .fcxnullsta = 2, .fcxmreg = 1, .fcxgpiodbg = 1, -+ .fcxbtver = 1, .fcxbtscan = 1, .fcxbtafh = 2, .fcxbtdevinfo = 1, -+ .fwlrole = 1, .frptmap = 3, .fcxctrl = 1, -+ .info_buf = 1280, .max_role_num = 5, -+ }, -+ {RTL8852C, RTW89_FW_VER_CODE(0, 27, 42, 0), -+ .fcxbtcrpt = 4, .fcxtdma = 3, .fcxslots = 1, .fcxcysta = 3, -+ .fcxstep = 3, .fcxnullsta = 2, .fcxmreg = 1, .fcxgpiodbg = 1, -+ .fcxbtver = 1, .fcxbtscan = 1, .fcxbtafh = 2, .fcxbtdevinfo = 1, -+ .fwlrole = 1, .frptmap = 2, .fcxctrl = 1, -+ .info_buf = 1280, .max_role_num = 5, -+ }, -+ {RTL8852C, RTW89_FW_VER_CODE(0, 27, 0, 0), -+ .fcxbtcrpt = 4, .fcxtdma = 3, .fcxslots = 1, .fcxcysta = 3, -+ .fcxstep = 3, .fcxnullsta = 2, .fcxmreg = 1, .fcxgpiodbg = 1, -+ .fcxbtver = 1, .fcxbtscan = 1, .fcxbtafh = 1, .fcxbtdevinfo = 1, -+ .fwlrole = 1, .frptmap = 2, .fcxctrl = 1, -+ .info_buf = 1280, .max_role_num = 5, -+ }, -+ {RTL8852B, RTW89_FW_VER_CODE(0, 29, 14, 0), -+ .fcxbtcrpt = 5, .fcxtdma = 3, .fcxslots = 1, .fcxcysta = 4, -+ .fcxstep = 3, .fcxnullsta = 2, .fcxmreg = 1, .fcxgpiodbg = 1, -+ .fcxbtver = 1, .fcxbtscan = 1, .fcxbtafh = 2, .fcxbtdevinfo = 1, -+ .fwlrole = 1, .frptmap = 3, .fcxctrl = 1, -+ .info_buf = 1800, .max_role_num = 6, -+ }, -+ {RTL8852B, RTW89_FW_VER_CODE(0, 27, 0, 0), -+ .fcxbtcrpt = 4, .fcxtdma = 3, .fcxslots = 1, .fcxcysta = 3, -+ .fcxstep = 3, .fcxnullsta = 2, .fcxmreg = 1, .fcxgpiodbg = 1, -+ .fcxbtver = 1, .fcxbtscan = 1, .fcxbtafh = 1, .fcxbtdevinfo = 1, -+ .fwlrole = 1, .frptmap = 1, .fcxctrl = 1, -+ .info_buf = 1280, .max_role_num = 5, -+ }, -+ {RTL8852A, RTW89_FW_VER_CODE(0, 13, 37, 0), -+ .fcxbtcrpt = 4, .fcxtdma = 3, .fcxslots = 1, .fcxcysta = 3, -+ .fcxstep = 3, .fcxnullsta = 2, .fcxmreg = 1, .fcxgpiodbg = 1, -+ .fcxbtver = 1, .fcxbtscan = 1, .fcxbtafh = 2, .fcxbtdevinfo = 1, -+ .fwlrole = 1, .frptmap = 3, .fcxctrl = 1, -+ .info_buf = 1280, .max_role_num = 5, -+ }, -+ {RTL8852A, RTW89_FW_VER_CODE(0, 13, 0, 0), -+ .fcxbtcrpt = 1, .fcxtdma = 1, .fcxslots = 1, .fcxcysta = 2, -+ .fcxstep = 2, .fcxnullsta = 1, .fcxmreg = 1, .fcxgpiodbg = 1, -+ .fcxbtver = 1, .fcxbtscan = 1, .fcxbtafh = 1, .fcxbtdevinfo = 1, -+ .fwlrole = 0, .frptmap = 0, .fcxctrl = 0, -+ .info_buf = 1024, .max_role_num = 5, -+ }, -+ -+ /* keep it to be the last as default entry */ -+ {0, RTW89_FW_VER_CODE(0, 0, 0, 0), -+ .fcxbtcrpt = 1, .fcxtdma = 1, .fcxslots = 1, .fcxcysta = 2, -+ .fcxstep = 2, .fcxnullsta = 1, .fcxmreg = 1, .fcxgpiodbg = 1, -+ .fcxbtver = 1, .fcxbtscan = 1, .fcxbtafh = 1, .fcxbtdevinfo = 1, -+ .fwlrole = 0, .frptmap = 0, .fcxctrl = 0, -+ .info_buf = 1024, .max_role_num = 5, -+ }, -+}; -+ -+#define RTW89_DEFAULT_BTC_VER_IDX (ARRAY_SIZE(rtw89_btc_ver_defs) - 1) -+ - struct rtw89_btc_btf_tlv { - u8 type; - u8 len; -@@ -7008,3 +7072,34 @@ void rtw89_btc_dump_info(struct rtw89_de - else - _show_summary_v1(rtwdev, m); - } -+ -+void rtw89_coex_recognize_ver(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *btc_ver_def; -+ const struct rtw89_fw_suit *fw_suit; -+ u32 suit_ver_code; -+ int i; -+ -+ fw_suit = rtw89_fw_suit_get(rtwdev, RTW89_FW_NORMAL); -+ suit_ver_code = RTW89_FW_SUIT_VER_CODE(fw_suit); -+ -+ for (i = 0; i < ARRAY_SIZE(rtw89_btc_ver_defs); i++) { -+ btc_ver_def = &rtw89_btc_ver_defs[i]; -+ -+ if (chip->chip_id != btc_ver_def->chip_id) -+ continue; -+ -+ if (suit_ver_code >= btc_ver_def->fw_ver_code) { -+ btc->ver = btc_ver_def; -+ goto out; -+ } -+ } -+ -+ btc->ver = &rtw89_btc_ver_defs[RTW89_DEFAULT_BTC_VER_IDX]; -+ -+out: -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC] use version def[%d] = 0x%08x\n", -+ (int)(btc->ver - rtw89_btc_ver_defs), btc->ver->fw_ver_code); -+} ---- a/drivers/net/wireless/realtek/rtw89/coex.h -+++ b/drivers/net/wireless/realtek/rtw89/coex.h -@@ -164,6 +164,7 @@ void rtw89_coex_rfk_chk_work(struct work - void rtw89_coex_power_on(struct rtw89_dev *rtwdev); - void rtw89_btc_set_policy(struct rtw89_dev *rtwdev, u16 policy_type); - void rtw89_btc_set_policy_v1(struct rtw89_dev *rtwdev, u16 policy_type); -+void rtw89_coex_recognize_ver(struct rtw89_dev *rtwdev); - - static inline u8 rtw89_btc_phymap(struct rtw89_dev *rtwdev, - enum rtw89_phy_idx phy_idx, ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2019,9 +2019,35 @@ struct rtw89_btc_btf_fwinfo { - struct rtw89_btc_rpt_fbtc_btdev rpt_fbtc_btdev; - }; - -+struct rtw89_btc_ver { -+ enum rtw89_core_chip_id chip_id; -+ u32 fw_ver_code; -+ -+ u8 fcxbtcrpt; -+ u8 fcxtdma; -+ u8 fcxslots; -+ u8 fcxcysta; -+ u8 fcxstep; -+ u8 fcxnullsta; -+ u8 fcxmreg; -+ u8 fcxgpiodbg; -+ u8 fcxbtver; -+ u8 fcxbtscan; -+ u8 fcxbtafh; -+ u8 fcxbtdevinfo; -+ u8 fwlrole; -+ u8 frptmap; -+ u8 fcxctrl; -+ -+ u16 info_buf; -+ u8 max_role_num; -+}; -+ - #define RTW89_BTC_POLICY_MAXLEN 512 - - struct rtw89_btc { -+ const struct rtw89_btc_ver *ver; -+ - struct rtw89_btc_cx cx; - struct rtw89_btc_dm dm; - struct rtw89_btc_ctrl ctrl; ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -352,6 +352,8 @@ int rtw89_fw_recognize(struct rtw89_dev - - rtw89_fw_recognize_features(rtwdev); - -+ rtw89_coex_recognize_ver(rtwdev); -+ - return 0; - } - diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-089-wifi-rtw89-coex-use-new-introduction-BTC-version-for.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-089-wifi-rtw89-coex-use-new-introduction-BTC-version-for.patch deleted file mode 100644 index 4f8144d98..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-089-wifi-rtw89-coex-use-new-introduction-BTC-version-for.patch +++ /dev/null @@ -1,390 +0,0 @@ -From 1fc4a874ff02ba8c07f8abf97c0bef686406f6df Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sat, 17 Dec 2022 22:17:40 +0800 -Subject: [PATCH 089/149] wifi: rtw89: coex: use new introduction BTC version - format - -Previous patch has added format version derived from firmware version. -Use the format version, and remove constant version number from chip_info. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221217141745.43291-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 32 +++++++------- - drivers/net/wireless/realtek/rtw89/core.h | 42 +++++++------------ - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 14 ------- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 15 +------ - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 14 ------- - 5 files changed, 32 insertions(+), 85 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -976,6 +976,7 @@ static u32 _chk_btc_report(struct rtw89_ - { - const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_dm *dm = &btc->dm; - struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; - struct rtw89_btc_wl_info *wl = &btc->cx.wl; -@@ -1022,7 +1023,7 @@ static u32 _chk_btc_report(struct rtw89_ - pfinfo = &pfwinfo->rpt_ctrl.finfo_v1; - pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo_v1); - } -- pcinfo->req_fver = chip->fcxbtcrpt_ver; -+ pcinfo->req_fver = ver->fcxbtcrpt; - pcinfo->rx_len = rpt_len; - pcinfo->rx_cnt++; - break; -@@ -1035,7 +1036,7 @@ static u32 _chk_btc_report(struct rtw89_ - pfinfo = &pfwinfo->rpt_fbtc_tdma.finfo_v1; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_tdma.finfo_v1); - } -- pcinfo->req_fver = chip->fcxtdma_ver; -+ pcinfo->req_fver = ver->fcxtdma; - pcinfo->rx_len = rpt_len; - pcinfo->rx_cnt++; - break; -@@ -1043,7 +1044,7 @@ static u32 _chk_btc_report(struct rtw89_ - pcinfo = &pfwinfo->rpt_fbtc_slots.cinfo; - pfinfo = &pfwinfo->rpt_fbtc_slots.finfo; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_slots.finfo); -- pcinfo->req_fver = chip->fcxslots_ver; -+ pcinfo->req_fver = ver->fcxslots; - pcinfo->rx_len = rpt_len; - pcinfo->rx_cnt++; - break; -@@ -1059,7 +1060,7 @@ static u32 _chk_btc_report(struct rtw89_ - pcysta_v1 = &pfwinfo->rpt_fbtc_cysta.finfo_v1; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo_v1); - } -- pcinfo->req_fver = chip->fcxcysta_ver; -+ pcinfo->req_fver = ver->fcxcysta; - pcinfo->rx_len = rpt_len; - pcinfo->rx_cnt++; - break; -@@ -1076,7 +1077,7 @@ static u32 _chk_btc_report(struct rtw89_ - trace_step + - offsetof(struct rtw89_btc_fbtc_steps_v1, step); - } -- pcinfo->req_fver = chip->fcxstep_ver; -+ pcinfo->req_fver = ver->fcxstep; - pcinfo->rx_len = rpt_len; - pcinfo->rx_cnt++; - break; -@@ -1089,7 +1090,7 @@ static u32 _chk_btc_report(struct rtw89_ - pfinfo = &pfwinfo->rpt_fbtc_nullsta.finfo_v1; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_nullsta.finfo_v1); - } -- pcinfo->req_fver = chip->fcxnullsta_ver; -+ pcinfo->req_fver = ver->fcxnullsta; - pcinfo->rx_len = rpt_len; - pcinfo->rx_cnt++; - break; -@@ -1097,7 +1098,7 @@ static u32 _chk_btc_report(struct rtw89_ - pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo; - pfinfo = &pfwinfo->rpt_fbtc_mregval.finfo; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_mregval.finfo); -- pcinfo->req_fver = chip->fcxmreg_ver; -+ pcinfo->req_fver = ver->fcxmreg; - pcinfo->rx_len = rpt_len; - pcinfo->rx_cnt++; - break; -@@ -1105,7 +1106,7 @@ static u32 _chk_btc_report(struct rtw89_ - pcinfo = &pfwinfo->rpt_fbtc_gpio_dbg.cinfo; - pfinfo = &pfwinfo->rpt_fbtc_gpio_dbg.finfo; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_gpio_dbg.finfo); -- pcinfo->req_fver = chip->fcxgpiodbg_ver; -+ pcinfo->req_fver = ver->fcxgpiodbg; - pcinfo->rx_len = rpt_len; - pcinfo->rx_cnt++; - break; -@@ -1113,7 +1114,7 @@ static u32 _chk_btc_report(struct rtw89_ - pcinfo = &pfwinfo->rpt_fbtc_btver.cinfo; - pfinfo = &pfwinfo->rpt_fbtc_btver.finfo; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btver.finfo); -- pcinfo->req_fver = chip->fcxbtver_ver; -+ pcinfo->req_fver = ver->fcxbtver; - pcinfo->rx_len = rpt_len; - pcinfo->rx_cnt++; - break; -@@ -1121,7 +1122,7 @@ static u32 _chk_btc_report(struct rtw89_ - pcinfo = &pfwinfo->rpt_fbtc_btscan.cinfo; - pfinfo = &pfwinfo->rpt_fbtc_btscan.finfo; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btscan.finfo); -- pcinfo->req_fver = chip->fcxbtscan_ver; -+ pcinfo->req_fver = ver->fcxbtscan; - pcinfo->rx_len = rpt_len; - pcinfo->rx_cnt++; - break; -@@ -1129,7 +1130,7 @@ static u32 _chk_btc_report(struct rtw89_ - pcinfo = &pfwinfo->rpt_fbtc_btafh.cinfo; - pfinfo = &pfwinfo->rpt_fbtc_btafh.finfo; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btafh.finfo); -- pcinfo->req_fver = chip->fcxbtafh_ver; -+ pcinfo->req_fver = ver->fcxbtafh; - pcinfo->rx_len = rpt_len; - pcinfo->rx_cnt++; - break; -@@ -1137,7 +1138,7 @@ static u32 _chk_btc_report(struct rtw89_ - pcinfo = &pfwinfo->rpt_fbtc_btdev.cinfo; - pfinfo = &pfwinfo->rpt_fbtc_btdev.finfo; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btdev.finfo); -- pcinfo->req_fver = chip->fcxbtdevinfo_ver; -+ pcinfo->req_fver = ver->fcxbtdevinfo; - pcinfo->rx_len = rpt_len; - pcinfo->rx_cnt++; - break; -@@ -1394,7 +1395,7 @@ static void _parse_btc_report(struct rtw - struct rtw89_btc_btf_fwinfo *pfwinfo, - u8 *pbuf, u32 buf_len) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; -+ const struct rtw89_btc_ver *ver = rtwdev->btc.ver; - struct rtw89_btc_prpt *btc_prpt = NULL; - u32 index = 0, rpt_len = 0; - -@@ -1404,7 +1405,7 @@ static void _parse_btc_report(struct rtw - - while (pbuf) { - btc_prpt = (struct rtw89_btc_prpt *)&pbuf[index]; -- if (index + 2 >= chip->btc_fwinfo_buf) -+ if (index + 2 >= ver->info_buf) - break; - /* At least 3 bytes: type(1) & len(2) */ - rpt_len = le16_to_cpu(btc_prpt->len); -@@ -1424,6 +1425,7 @@ static void _append_tdma(struct rtw89_de - { - const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_dm *dm = &btc->dm; - struct rtw89_btc_btf_tlv *tlv; - struct rtw89_btc_fbtc_tdma *v; -@@ -1448,7 +1450,7 @@ static void _append_tdma(struct rtw89_de - } else { - tlv->len = sizeof(*v1); - v1 = (struct rtw89_btc_fbtc_tdma_v1 *)&tlv->val[0]; -- v1->fver = chip->fcxtdma_ver; -+ v1->fver = ver->fcxtdma; - v1->tdma = dm->tdma; - btc->policy_len += BTC_TLV_HDR_LEN + sizeof(*v1); - } ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -1438,7 +1438,7 @@ struct rtw89_btc_cx { - }; - - struct rtw89_btc_fbtc_tdma { -- u8 type; /* chip_info::fcxtdma_ver */ -+ u8 type; /* btc_ver::fcxtdma */ - u8 rxflctrl; - u8 txpause; - u8 wtgle_n; -@@ -1449,7 +1449,7 @@ struct rtw89_btc_fbtc_tdma { - } __packed; - - struct rtw89_btc_fbtc_tdma_v1 { -- u8 fver; /* chip_info::fcxtdma_ver */ -+ u8 fver; /* btc_ver::fcxtdma */ - u8 rsvd; - __le16 rsvd1; - struct rtw89_btc_fbtc_tdma tdma; -@@ -1474,7 +1474,7 @@ enum rtw89_btc_bt_sta_counter { - }; - - struct rtw89_btc_fbtc_rpt_ctrl { -- u16 fver; /* chip_info::fcxbtcrpt_ver */ -+ u16 fver; /* btc_ver::fcxbtcrpt */ - u16 rpt_cnt; /* tmr counters */ - u32 wl_fw_coex_ver; /* match which driver's coex version */ - u32 wl_fw_cx_offload; -@@ -1607,7 +1607,7 @@ enum { /* STEP TYPE */ - - #define BTC_DBG_MAX1 32 - struct rtw89_btc_fbtc_gpio_dbg { -- u8 fver; /* chip_info::fcxgpiodbg_ver */ -+ u8 fver; /* btc_ver::fcxgpiodbg */ - u8 rsvd; - u16 rsvd2; - u32 en_map; /* which debug signal (see btc_wl_gpio_debug) is enable */ -@@ -1616,7 +1616,7 @@ struct rtw89_btc_fbtc_gpio_dbg { - } __packed; - - struct rtw89_btc_fbtc_mreg_val { -- u8 fver; /* chip_info::fcxmreg_ver */ -+ u8 fver; /* btc_ver::fcxmreg */ - u8 reg_num; - __le16 rsvd; - __le32 mreg_val[CXMREG_MAX]; -@@ -1639,7 +1639,7 @@ struct rtw89_btc_fbtc_slot { - } __packed; - - struct rtw89_btc_fbtc_slots { -- u8 fver; /* chip_info::fcxslots_ver */ -+ u8 fver; /* btc_ver::fcxslots */ - u8 tbl_num; - __le16 rsvd; - __le32 update_map; -@@ -1653,7 +1653,7 @@ struct rtw89_btc_fbtc_step { - } __packed; - - struct rtw89_btc_fbtc_steps { -- u8 fver; /* chip_info::fcxstep_ver */ -+ u8 fver; /* btc_ver::fcxstep */ - u8 rsvd; - __le16 cnt; - __le16 pos_old; -@@ -1670,7 +1670,7 @@ struct rtw89_btc_fbtc_steps_v1 { - } __packed; - - struct rtw89_btc_fbtc_cysta { /* statistics for cycles */ -- u8 fver; /* chip_info::fcxcysta_ver */ -+ u8 fver; /* btc_ver::fcxcysta */ - u8 rsvd; - __le16 cycles; /* total cycle number */ - __le16 cycles_a2dp[CXT_FLCTRL_MAX]; -@@ -1750,7 +1750,7 @@ struct rtw89_btc_fbtc_cysta_v1 { /* stat - } __packed; - - struct rtw89_btc_fbtc_cynullsta { /* cycle null statistics */ -- u8 fver; /* chip_info::fcxnullsta_ver */ -+ u8 fver; /* btc_ver::fcxnullsta */ - u8 rsvd; - __le16 rsvd2; - __le32 max_t[2]; /* max_t for 0:null0/1:null1 */ -@@ -1759,7 +1759,7 @@ struct rtw89_btc_fbtc_cynullsta { /* cyc - } __packed; - - struct rtw89_btc_fbtc_cynullsta_v1 { /* cycle null statistics */ -- u8 fver; /* chip_info::fcxnullsta_ver */ -+ u8 fver; /* btc_ver::fcxnullsta */ - u8 rsvd; - __le16 rsvd2; - __le32 max_t[2]; /* max_t for 0:null0/1:null1 */ -@@ -1768,7 +1768,7 @@ struct rtw89_btc_fbtc_cynullsta_v1 { /* - } __packed; - - struct rtw89_btc_fbtc_btver { -- u8 fver; /* chip_info::fcxbtver_ver */ -+ u8 fver; /* btc_ver::fcxbtver */ - u8 rsvd; - __le16 rsvd2; - __le32 coex_ver; /*bit[15:8]->shared, bit[7:0]->non-shared */ -@@ -1777,14 +1777,14 @@ struct rtw89_btc_fbtc_btver { - } __packed; - - struct rtw89_btc_fbtc_btscan { -- u8 fver; /* chip_info::fcxbtscan_ver */ -+ u8 fver; /* btc_ver::fcxbtscan */ - u8 rsvd; - __le16 rsvd2; - u8 scan[6]; - } __packed; - - struct rtw89_btc_fbtc_btafh { -- u8 fver; /* chip_info::fcxbtafh_ver */ -+ u8 fver; /* btc_ver::fcxbtafh */ - u8 rsvd; - __le16 rsvd2; - u8 afh_l[4]; /*bit0:2402, bit1: 2403.... bit31:2433 */ -@@ -1793,7 +1793,7 @@ struct rtw89_btc_fbtc_btafh { - } __packed; - - struct rtw89_btc_fbtc_btdevinfo { -- u8 fver; /* chip_info::fcxbtdevinfo_ver */ -+ u8 fver; /* btc_ver::fcxbtdevinfo */ - u8 rsvd; - __le16 vendor_id; - __le32 dev_name; /* only 24 bits valid */ -@@ -2756,20 +2756,6 @@ struct rtw89_chip_info { - u8 btcx_desired; - u8 scbd; - u8 mailbox; -- u16 btc_fwinfo_buf; -- -- u8 fcxbtcrpt_ver; -- u8 fcxtdma_ver; -- u8 fcxslots_ver; -- u8 fcxcysta_ver; -- u8 fcxstep_ver; -- u8 fcxnullsta_ver; -- u8 fcxmreg_ver; -- u8 fcxgpiodbg_ver; -- u8 fcxbtver_ver; -- u8 fcxbtscan_ver; -- u8 fcxbtafh_ver; -- u8 fcxbtdevinfo_ver; - - u8 afh_guard_ch; - const u8 *wl_rssi_thres; ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -2106,20 +2106,6 @@ const struct rtw89_chip_info rtw8852a_ch - .btcx_desired = 0x7, - .scbd = 0x1, - .mailbox = 0x1, -- .btc_fwinfo_buf = 1024, -- -- .fcxbtcrpt_ver = 1, -- .fcxtdma_ver = 1, -- .fcxslots_ver = 1, -- .fcxcysta_ver = 2, -- .fcxstep_ver = 2, -- .fcxnullsta_ver = 1, -- .fcxmreg_ver = 1, -- .fcxgpiodbg_ver = 1, -- .fcxbtver_ver = 1, -- .fcxbtscan_ver = 1, -- .fcxbtafh_ver = 1, -- .fcxbtdevinfo_ver = 1, - - .afh_guard_ch = 6, - .wl_rssi_thres = rtw89_btc_8852a_wl_rssi_thres, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2483,20 +2483,7 @@ const struct rtw89_chip_info rtw8852b_ch - .btcx_desired = 0x5, - .scbd = 0x1, - .mailbox = 0x1, -- .btc_fwinfo_buf = 1024, - -- .fcxbtcrpt_ver = 1, -- .fcxtdma_ver = 1, -- .fcxslots_ver = 1, -- .fcxcysta_ver = 2, -- .fcxstep_ver = 2, -- .fcxnullsta_ver = 1, -- .fcxmreg_ver = 1, -- .fcxgpiodbg_ver = 1, -- .fcxbtver_ver = 1, -- .fcxbtscan_ver = 1, -- .fcxbtafh_ver = 1, -- .fcxbtdevinfo_ver = 1, - .afh_guard_ch = 6, - .wl_rssi_thres = rtw89_btc_8852b_wl_rssi_thres, - .bt_rssi_thres = rtw89_btc_8852b_bt_rssi_thres, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2915,20 +2915,6 @@ const struct rtw89_chip_info rtw8852c_ch - .btcx_desired = 0x7, - .scbd = 0x1, - .mailbox = 0x1, -- .btc_fwinfo_buf = 1280, -- -- .fcxbtcrpt_ver = 4, -- .fcxtdma_ver = 3, -- .fcxslots_ver = 1, -- .fcxcysta_ver = 3, -- .fcxstep_ver = 3, -- .fcxnullsta_ver = 2, -- .fcxmreg_ver = 1, -- .fcxgpiodbg_ver = 1, -- .fcxbtver_ver = 1, -- .fcxbtscan_ver = 1, -- .fcxbtafh_ver = 1, -- .fcxbtdevinfo_ver = 1, - - .afh_guard_ch = 6, - .wl_rssi_thres = rtw89_btc_8852c_wl_rssi_thres, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-090-wifi-rtw89-coex-Enable-Bluetooth-report-when-show-de.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-090-wifi-rtw89-coex-Enable-Bluetooth-report-when-show-de.patch deleted file mode 100644 index be9f7effe..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-090-wifi-rtw89-coex-Enable-Bluetooth-report-when-show-de.patch +++ /dev/null @@ -1,80 +0,0 @@ -From bc20f9235f644846520a68340ea0730d09022e0a Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Sat, 17 Dec 2022 22:17:41 +0800 -Subject: [PATCH 090/149] wifi: rtw89: coex: Enable Bluetooth report when show - debug info - -Ask WiFi firmware to send Bluetooth version report when we want to show -Bluetooth debug info. If there is no request for debug log, driver will -not enable the report. This modification can save some C2H/H2C resources. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221217141745.43291-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 32 ++++++++++++++--------- - 1 file changed, 19 insertions(+), 13 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -5066,11 +5066,6 @@ static void _update_bt_info(struct rtw89 - - a2dp->sink = btinfo.hb3.a2dp_sink; - -- if (b->profile_cnt.now || b->status.map.ble_connect) -- rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_AFH_MAP, 1); -- else -- rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_AFH_MAP, 0); -- - if (!a2dp->exist_last && a2dp->exist) { - a2dp->vendor_id = 0; - a2dp->flush_time = 0; -@@ -5080,12 +5075,6 @@ static void _update_bt_info(struct rtw89 - RTW89_COEX_BT_DEVINFO_WORK_PERIOD); - } - -- if (a2dp->exist && (a2dp->flush_time == 0 || a2dp->vendor_id == 0 || -- a2dp->play_latency == 1)) -- rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_DEVICE_INFO, 1); -- else -- rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_DEVICE_INFO, 0); -- - _run_coex(rtwdev, BTC_RSN_UPDATE_BT_INFO); - } - -@@ -5218,8 +5207,7 @@ void rtw89_btc_ntfy_radio_state(struct r - - if (rf_state == BTC_RFCTRL_WL_ON) { - btc->dm.cnt_dm[BTC_DCNT_BTCNT_FREEZE] = 0; -- rtw89_btc_fw_en_rpt(rtwdev, -- RPT_EN_MREG | RPT_EN_BT_VER_INFO, true); -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_MREG, true); - val = BTC_WSCB_ACTIVE | BTC_WSCB_ON | BTC_WSCB_BTLOG; - _write_scbd(rtwdev, val, true); - _update_bt_scbd(rtwdev, true); -@@ -5866,6 +5854,24 @@ static void _show_bt_info(struct rtw89_d - "[trx_req_cnt]", cx->cnt_bt[BTC_BCNT_HIPRI_RX], - cx->cnt_bt[BTC_BCNT_HIPRI_TX], cx->cnt_bt[BTC_BCNT_LOPRI_RX], - cx->cnt_bt[BTC_BCNT_LOPRI_TX], cx->cnt_bt[BTC_BCNT_POLUT]); -+ -+ if (bt->enable.now && bt->ver_info.fw == 0) -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_VER_INFO, true); -+ else -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_VER_INFO, false); -+ -+ if (bt_linfo->profile_cnt.now || bt_linfo->status.map.ble_connect) -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_AFH_MAP, true); -+ else -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_AFH_MAP, false); -+ -+ if (bt_linfo->a2dp_desc.exist && -+ (bt_linfo->a2dp_desc.flush_time == 0 || -+ bt_linfo->a2dp_desc.vendor_id == 0 || -+ bt_linfo->a2dp_desc.play_latency == 1)) -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_DEVICE_INFO, true); -+ else -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_DEVICE_INFO, false); - } - - #define CASE_BTC_RSN_STR(e) case BTC_RSN_ ## e: return #e diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-091-wifi-rtw89-coex-Update-BTC-firmware-report-bitmap-de.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-091-wifi-rtw89-coex-Update-BTC-firmware-report-bitmap-de.patch deleted file mode 100644 index 6b195b869..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-091-wifi-rtw89-coex-Update-BTC-firmware-report-bitmap-de.patch +++ /dev/null @@ -1,225 +0,0 @@ -From 52c7c983174cd8e2f92e157ef806be3629d5d73b Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Sat, 17 Dec 2022 22:17:42 +0800 -Subject: [PATCH 091/149] wifi: rtw89: coex: Update BTC firmware report bitmap - definition - -The different version use different bit definition to enable firmware -report. WiFi firmware will report information from Bluetooth firmware or -some Wi-Fi firmware mechanism/status to driver by these bits. To solve the -difference, add a function to map bitmap and versions. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221217141745.43291-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 177 ++++++++++++++++++++-- - 1 file changed, 164 insertions(+), 13 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -191,16 +191,20 @@ struct rtw89_btc_btf_tlv { - } __packed; - - enum btc_btf_set_report_en { -- RPT_EN_TDMA = BIT(0), -- RPT_EN_CYCLE = BIT(1), -- RPT_EN_MREG = BIT(2), -- RPT_EN_BT_VER_INFO = BIT(3), -- RPT_EN_BT_SCAN_INFO = BIT(4), -- RPT_EN_BT_AFH_MAP = BIT(5), -- RPT_EN_BT_DEVICE_INFO = BIT(6), -- RPT_EN_WL_ALL = GENMASK(2, 0), -- RPT_EN_BT_ALL = GENMASK(6, 3), -- RPT_EN_ALL = GENMASK(6, 0), -+ RPT_EN_TDMA, -+ RPT_EN_CYCLE, -+ RPT_EN_MREG, -+ RPT_EN_BT_VER_INFO, -+ RPT_EN_BT_SCAN_INFO, -+ RPT_EN_BT_DEVICE_INFO, -+ RPT_EN_BT_AFH_MAP, -+ RPT_EN_BT_AFH_MAP_LE, -+ RPT_EN_FW_STEP_INFO, -+ RPT_EN_TEST, -+ RPT_EN_WL_ALL, -+ RPT_EN_BT_ALL, -+ RPT_EN_ALL, -+ RPT_EN_MONITER, - }; - - #define BTF_SET_REPORT_VER 1 -@@ -1507,22 +1511,169 @@ static void _append_slot(struct rtw89_de - __func__, cnt); - } - -+static u32 rtw89_btc_fw_rpt_ver(struct rtw89_dev *rtwdev, u32 rpt_map) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; -+ u32 bit_map = 0; -+ -+ switch (rpt_map) { -+ case RPT_EN_TDMA: -+ bit_map = BIT(0); -+ break; -+ case RPT_EN_CYCLE: -+ bit_map = BIT(1); -+ break; -+ case RPT_EN_MREG: -+ bit_map = BIT(2); -+ break; -+ case RPT_EN_BT_VER_INFO: -+ bit_map = BIT(3); -+ break; -+ case RPT_EN_BT_SCAN_INFO: -+ bit_map = BIT(4); -+ break; -+ case RPT_EN_BT_DEVICE_INFO: -+ switch (ver->frptmap) { -+ case 0: -+ case 1: -+ case 2: -+ bit_map = BIT(6); -+ break; -+ case 3: -+ bit_map = BIT(5); -+ break; -+ default: -+ break; -+ } -+ break; -+ case RPT_EN_BT_AFH_MAP: -+ switch (ver->frptmap) { -+ case 0: -+ case 1: -+ case 2: -+ bit_map = BIT(5); -+ break; -+ case 3: -+ bit_map = BIT(6); -+ break; -+ default: -+ break; -+ } -+ break; -+ case RPT_EN_BT_AFH_MAP_LE: -+ switch (ver->frptmap) { -+ case 2: -+ bit_map = BIT(8); -+ break; -+ case 3: -+ bit_map = BIT(7); -+ break; -+ default: -+ break; -+ } -+ break; -+ case RPT_EN_FW_STEP_INFO: -+ switch (ver->frptmap) { -+ case 1: -+ case 2: -+ bit_map = BIT(7); -+ break; -+ case 3: -+ bit_map = BIT(8); -+ break; -+ default: -+ break; -+ } -+ break; -+ case RPT_EN_TEST: -+ bit_map = BIT(31); -+ break; -+ case RPT_EN_WL_ALL: -+ switch (ver->frptmap) { -+ case 0: -+ case 1: -+ case 2: -+ bit_map = GENMASK(2, 0); -+ break; -+ case 3: -+ bit_map = GENMASK(2, 0) | BIT(8); -+ break; -+ default: -+ break; -+ } -+ break; -+ case RPT_EN_BT_ALL: -+ switch (ver->frptmap) { -+ case 0: -+ case 1: -+ bit_map = GENMASK(6, 3); -+ break; -+ case 2: -+ bit_map = GENMASK(6, 3) | BIT(8); -+ break; -+ case 3: -+ bit_map = GENMASK(7, 3); -+ break; -+ default: -+ break; -+ } -+ break; -+ case RPT_EN_ALL: -+ switch (ver->frptmap) { -+ case 0: -+ bit_map = GENMASK(6, 0); -+ break; -+ case 1: -+ bit_map = GENMASK(7, 0); -+ break; -+ case 2: -+ case 3: -+ bit_map = GENMASK(8, 0); -+ break; -+ default: -+ break; -+ } -+ break; -+ case RPT_EN_MONITER: -+ switch (ver->frptmap) { -+ case 0: -+ case 1: -+ bit_map = GENMASK(6, 2); -+ break; -+ case 2: -+ bit_map = GENMASK(6, 2) | BIT(8); -+ break; -+ case 3: -+ bit_map = GENMASK(8, 2); -+ break; -+ default: -+ break; -+ } -+ break; -+ } -+ -+ return bit_map; -+} -+ - static void rtw89_btc_fw_en_rpt(struct rtw89_dev *rtwdev, - u32 rpt_map, bool rpt_state) - { - struct rtw89_btc *btc = &rtwdev->btc; - struct rtw89_btc_btf_fwinfo *fwinfo = &btc->fwinfo; - struct rtw89_btc_btf_set_report r = {0}; -- u32 val = 0; -+ u32 val, bit_map; -+ -+ bit_map = rtw89_btc_fw_rpt_ver(rtwdev, rpt_map); - - rtw89_debug(rtwdev, RTW89_DBG_BTC, - "[BTC], %s(): rpt_map=%x, rpt_state=%x\n", - __func__, rpt_map, rpt_state); - - if (rpt_state) -- val = fwinfo->rpt_en_map | rpt_map; -+ val = fwinfo->rpt_en_map | bit_map; - else -- val = fwinfo->rpt_en_map & ~rpt_map; -+ val = fwinfo->rpt_en_map & ~bit_map; - - if (val == fwinfo->rpt_en_map) - return; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-092-wifi-rtw89-coex-Add-v2-BT-AFH-report-and-related-var.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-092-wifi-rtw89-coex-Add-v2-BT-AFH-report-and-related-var.patch deleted file mode 100644 index 19a9bf1cc..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-092-wifi-rtw89-coex-Add-v2-BT-AFH-report-and-related-var.patch +++ /dev/null @@ -1,209 +0,0 @@ -From 0cdfcfce85b6f067f1639550a0aacf2c112a3441 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Sat, 17 Dec 2022 22:17:43 +0800 -Subject: [PATCH 092/149] wifi: rtw89: coex: Add v2 BT AFH report and related - variable - -Wi-Fi firmware update AFH report feature to version 2. If there is BT BLE -device connect to DUT, the mechanism will send H2C to request BT BLE -channel map, it will help to debug. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221217141745.43291-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 54 ++++++++++++++++++++--- - drivers/net/wireless/realtek/rtw89/core.h | 26 ++++++++++- - 2 files changed, 72 insertions(+), 8 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -854,17 +854,18 @@ static void _chk_btc_err(struct rtw89_de - static void _update_bt_report(struct rtw89_dev *rtwdev, u8 rpt_type, u8 *pfinfo) - { - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_bt_info *bt = &btc->cx.bt; - struct rtw89_btc_bt_link_info *bt_linfo = &bt->link_info; - struct rtw89_btc_bt_a2dp_desc *a2dp = &bt_linfo->a2dp_desc; - struct rtw89_btc_fbtc_btver *pver = NULL; - struct rtw89_btc_fbtc_btscan *pscan = NULL; -- struct rtw89_btc_fbtc_btafh *pafh = NULL; -+ struct rtw89_btc_fbtc_btafh *pafh_v1 = NULL; -+ struct rtw89_btc_fbtc_btafh_v2 *pafh_v2 = NULL; - struct rtw89_btc_fbtc_btdevinfo *pdev = NULL; - - pver = (struct rtw89_btc_fbtc_btver *)pfinfo; - pscan = (struct rtw89_btc_fbtc_btscan *)pfinfo; -- pafh = (struct rtw89_btc_fbtc_btafh *)pfinfo; - pdev = (struct rtw89_btc_fbtc_btdevinfo *)pfinfo; - - rtw89_debug(rtwdev, RTW89_DBG_BTC, -@@ -881,9 +882,23 @@ static void _update_bt_report(struct rtw - memcpy(bt->scan_info, pscan->scan, BTC_SCAN_MAX1); - break; - case BTC_RPT_TYPE_BT_AFH: -- memcpy(&bt_linfo->afh_map[0], pafh->afh_l, 4); -- memcpy(&bt_linfo->afh_map[4], pafh->afh_m, 4); -- memcpy(&bt_linfo->afh_map[8], pafh->afh_h, 2); -+ if (ver->fcxbtafh == 2) { -+ pafh_v2 = (struct rtw89_btc_fbtc_btafh_v2 *)pfinfo; -+ if (pafh_v2->map_type & RPT_BT_AFH_SEQ_LEGACY) { -+ memcpy(&bt_linfo->afh_map[0], pafh_v2->afh_l, 4); -+ memcpy(&bt_linfo->afh_map[4], pafh_v2->afh_m, 4); -+ memcpy(&bt_linfo->afh_map[8], pafh_v2->afh_h, 2); -+ } -+ if (pafh_v2->map_type & RPT_BT_AFH_SEQ_LE) { -+ memcpy(&bt_linfo->afh_map_le[0], pafh_v2->afh_le_a, 4); -+ memcpy(&bt_linfo->afh_map_le[4], pafh_v2->afh_le_b, 1); -+ } -+ } else if (ver->fcxbtafh == 1) { -+ pafh_v1 = (struct rtw89_btc_fbtc_btafh *)pfinfo; -+ memcpy(&bt_linfo->afh_map[0], pafh_v1->afh_l, 4); -+ memcpy(&bt_linfo->afh_map[4], pafh_v1->afh_m, 4); -+ memcpy(&bt_linfo->afh_map[8], pafh_v1->afh_h, 2); -+ } - break; - case BTC_RPT_TYPE_BT_DEVICE: - a2dp->device_name = le32_to_cpu(pdev->dev_name); -@@ -1132,8 +1147,15 @@ static u32 _chk_btc_report(struct rtw89_ - break; - case BTC_RPT_TYPE_BT_AFH: - pcinfo = &pfwinfo->rpt_fbtc_btafh.cinfo; -- pfinfo = &pfwinfo->rpt_fbtc_btafh.finfo; -- pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btafh.finfo); -+ if (ver->fcxbtafh == 1) { -+ pfinfo = &pfwinfo->rpt_fbtc_btafh.finfo.v1; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btafh.finfo.v1); -+ } else if (ver->fcxbtafh == 2) { -+ pfinfo = &pfwinfo->rpt_fbtc_btafh.finfo.v2; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btafh.finfo.v2); -+ } else { -+ goto err; -+ } - pcinfo->req_fver = ver->fcxbtafh; - pcinfo->rx_len = rpt_len; - pcinfo->rx_cnt++; -@@ -1393,6 +1415,11 @@ static u32 _chk_btc_report(struct rtw89_ - _update_bt_report(rtwdev, rpt_type, pfinfo); - - return (rpt_len + BTC_RPT_HDR_SIZE); -+ -+err: -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): Undefined version for type=%d\n", __func__, rpt_type); -+ return 0; - } - - static void _parse_btc_report(struct rtw89_dev *rtwdev, -@@ -5919,12 +5946,14 @@ static void _show_bt_profile_info(struct - static void _show_bt_info(struct rtw89_dev *rtwdev, struct seq_file *m) - { - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_cx *cx = &btc->cx; - struct rtw89_btc_bt_info *bt = &cx->bt; - struct rtw89_btc_wl_info *wl = &cx->wl; - struct rtw89_btc_module *module = &btc->mdinfo; - struct rtw89_btc_bt_link_info *bt_linfo = &bt->link_info; - u8 *afh = bt_linfo->afh_map; -+ u8 *afh_le = bt_linfo->afh_map_le; - - if (!(btc->dm.coex_info_map & BTC_COEX_INFO_BT)) - return; -@@ -5974,6 +6003,12 @@ static void _show_bt_info(struct rtw89_d - afh[0], afh[1], afh[2], afh[3], afh[4], - afh[5], afh[6], afh[7], afh[8], afh[9]); - -+ if (ver->fcxbtafh == 2 && bt_linfo->status.map.ble_connect) -+ seq_printf(m, -+ "LE[%02x%02x_%02x_%02x%02x]", -+ afh_le[0], afh_le[1], afh_le[2], -+ afh_le[3], afh_le[4]); -+ - seq_printf(m, "wl_ch_map[en:%d/ch:%d/bw:%d]\n", - wl->afh_info.en, wl->afh_info.ch, wl->afh_info.bw); - -@@ -6016,6 +6051,11 @@ static void _show_bt_info(struct rtw89_d - else - rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_AFH_MAP, false); - -+ if (ver->fcxbtafh == 2 && bt_linfo->status.map.ble_connect) -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_AFH_MAP_LE, true); -+ else -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_AFH_MAP_LE, false); -+ - if (bt_linfo->a2dp_desc.exist && - (bt_linfo->a2dp_desc.flush_time == 0 || - bt_linfo->a2dp_desc.vendor_id == 0 || ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -1264,6 +1264,7 @@ union rtw89_btc_bt_state_map { - - #define BTC_BT_RSSI_THMAX 4 - #define BTC_BT_AFH_GROUP 12 -+#define BTC_BT_AFH_LE_GROUP 5 - - struct rtw89_btc_bt_link_info { - struct rtw89_btc_u8_sta_chg profile_cnt; -@@ -1279,6 +1280,7 @@ struct rtw89_btc_bt_link_info { - u8 golden_rx_shift[BTC_PROFILE_MAX]; - u8 rssi_state[BTC_BT_RSSI_THMAX]; - u8 afh_map[BTC_BT_AFH_GROUP]; -+ u8 afh_map_le[BTC_BT_AFH_LE_GROUP]; - - u32 role_sw: 1; - u32 slave_role: 1; -@@ -1605,6 +1607,11 @@ enum { /* STEP TYPE */ - CXSTEP_MAX, - }; - -+enum rtw89_btc_afh_map_type { /*AFH MAP TYPE */ -+ RPT_BT_AFH_SEQ_LEGACY = 0x10, -+ RPT_BT_AFH_SEQ_LE = 0x20 -+}; -+ - #define BTC_DBG_MAX1 32 - struct rtw89_btc_fbtc_gpio_dbg { - u8 fver; /* btc_ver::fcxgpiodbg */ -@@ -1792,6 +1799,18 @@ struct rtw89_btc_fbtc_btafh { - u8 afh_h[4]; /*bit0:2466, bit1:2467......bit14:2480 */ - } __packed; - -+struct rtw89_btc_fbtc_btafh_v2 { -+ u8 fver; /* btc_ver::fcxbtafh */ -+ u8 rsvd; -+ u8 rsvd2; -+ u8 map_type; -+ u8 afh_l[4]; -+ u8 afh_m[4]; -+ u8 afh_h[4]; -+ u8 afh_le_a[4]; -+ u8 afh_le_b[4]; -+} __packed; -+ - struct rtw89_btc_fbtc_btdevinfo { - u8 fver; /* btc_ver::fcxbtdevinfo */ - u8 rsvd; -@@ -1912,6 +1931,11 @@ struct rtw89_btc_rpt_cmn_info { - u8 valid; - } __packed; - -+union rtw89_btc_fbtc_btafh_info { -+ struct rtw89_btc_fbtc_btafh v1; -+ struct rtw89_btc_fbtc_btafh_v2 v2; -+}; -+ - struct rtw89_btc_report_ctrl_state { - struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ - union { -@@ -1979,7 +2003,7 @@ struct rtw89_btc_rpt_fbtc_btscan { - - struct rtw89_btc_rpt_fbtc_btafh { - struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -- struct rtw89_btc_fbtc_btafh finfo; /* info from fw */ -+ union rtw89_btc_fbtc_btafh_info finfo; - }; - - struct rtw89_btc_rpt_fbtc_btdev { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-093-wifi-rtw89-coex-refactor-_chk_btc_report-to-extend-m.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-093-wifi-rtw89-coex-refactor-_chk_btc_report-to-extend-m.patch deleted file mode 100644 index b3cc9e729..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-093-wifi-rtw89-coex-refactor-_chk_btc_report-to-extend-m.patch +++ /dev/null @@ -1,509 +0,0 @@ -From 31f12cff9d262468a11dc02af48fd1e538e1223f Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Sat, 17 Dec 2022 22:17:44 +0800 -Subject: [PATCH 093/149] wifi: rtw89: coex: refactor _chk_btc_report() to - extend more features - -Change the checking logic to switch case. Make the code more readable. -There are more feature including to common code, in order to commit the -following version of the features, switch case will make the logic more -clearly. This patch did not change logic. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221217141745.43291-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 365 +++++++++------------- - 1 file changed, 143 insertions(+), 222 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -1006,7 +1006,6 @@ static u32 _chk_btc_report(struct rtw89_ - struct rtw89_btc_fbtc_cysta_v1 *pcysta_v1 = NULL; - struct rtw89_btc_fbtc_cysta_cpu pcysta[1]; - struct rtw89_btc_prpt *btc_prpt = NULL; -- struct rtw89_btc_fbtc_slot *rtp_slot = NULL; - void *rpt_content = NULL, *pfinfo = NULL; - u8 rpt_type = 0; - u16 wl_slot_set = 0, wl_slot_real = 0; -@@ -1043,8 +1042,6 @@ static u32 _chk_btc_report(struct rtw89_ - pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo_v1); - } - pcinfo->req_fver = ver->fcxbtcrpt; -- pcinfo->rx_len = rpt_len; -- pcinfo->rx_cnt++; - break; - case BTC_RPT_TYPE_TDMA: - pcinfo = &pfwinfo->rpt_fbtc_tdma.cinfo; -@@ -1056,16 +1053,12 @@ static u32 _chk_btc_report(struct rtw89_ - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_tdma.finfo_v1); - } - pcinfo->req_fver = ver->fcxtdma; -- pcinfo->rx_len = rpt_len; -- pcinfo->rx_cnt++; - break; - case BTC_RPT_TYPE_SLOT: - pcinfo = &pfwinfo->rpt_fbtc_slots.cinfo; - pfinfo = &pfwinfo->rpt_fbtc_slots.finfo; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_slots.finfo); - pcinfo->req_fver = ver->fcxslots; -- pcinfo->rx_len = rpt_len; -- pcinfo->rx_cnt++; - break; - case BTC_RPT_TYPE_CYSTA: - pcinfo = &pfwinfo->rpt_fbtc_cysta.cinfo; -@@ -1080,8 +1073,6 @@ static u32 _chk_btc_report(struct rtw89_ - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo_v1); - } - pcinfo->req_fver = ver->fcxcysta; -- pcinfo->rx_len = rpt_len; -- pcinfo->rx_cnt++; - break; - case BTC_RPT_TYPE_STEP: - pcinfo = &pfwinfo->rpt_fbtc_step.cinfo; -@@ -1097,8 +1088,6 @@ static u32 _chk_btc_report(struct rtw89_ - offsetof(struct rtw89_btc_fbtc_steps_v1, step); - } - pcinfo->req_fver = ver->fcxstep; -- pcinfo->rx_len = rpt_len; -- pcinfo->rx_cnt++; - break; - case BTC_RPT_TYPE_NULLSTA: - pcinfo = &pfwinfo->rpt_fbtc_nullsta.cinfo; -@@ -1110,40 +1099,30 @@ static u32 _chk_btc_report(struct rtw89_ - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_nullsta.finfo_v1); - } - pcinfo->req_fver = ver->fcxnullsta; -- pcinfo->rx_len = rpt_len; -- pcinfo->rx_cnt++; - break; - case BTC_RPT_TYPE_MREG: - pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo; - pfinfo = &pfwinfo->rpt_fbtc_mregval.finfo; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_mregval.finfo); - pcinfo->req_fver = ver->fcxmreg; -- pcinfo->rx_len = rpt_len; -- pcinfo->rx_cnt++; - break; - case BTC_RPT_TYPE_GPIO_DBG: - pcinfo = &pfwinfo->rpt_fbtc_gpio_dbg.cinfo; - pfinfo = &pfwinfo->rpt_fbtc_gpio_dbg.finfo; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_gpio_dbg.finfo); - pcinfo->req_fver = ver->fcxgpiodbg; -- pcinfo->rx_len = rpt_len; -- pcinfo->rx_cnt++; - break; - case BTC_RPT_TYPE_BT_VER: - pcinfo = &pfwinfo->rpt_fbtc_btver.cinfo; - pfinfo = &pfwinfo->rpt_fbtc_btver.finfo; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btver.finfo); - pcinfo->req_fver = ver->fcxbtver; -- pcinfo->rx_len = rpt_len; -- pcinfo->rx_cnt++; - break; - case BTC_RPT_TYPE_BT_SCAN: - pcinfo = &pfwinfo->rpt_fbtc_btscan.cinfo; - pfinfo = &pfwinfo->rpt_fbtc_btscan.finfo; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btscan.finfo); - pcinfo->req_fver = ver->fcxbtscan; -- pcinfo->rx_len = rpt_len; -- pcinfo->rx_cnt++; - break; - case BTC_RPT_TYPE_BT_AFH: - pcinfo = &pfwinfo->rpt_fbtc_btafh.cinfo; -@@ -1157,22 +1136,21 @@ static u32 _chk_btc_report(struct rtw89_ - goto err; - } - pcinfo->req_fver = ver->fcxbtafh; -- pcinfo->rx_len = rpt_len; -- pcinfo->rx_cnt++; - break; - case BTC_RPT_TYPE_BT_DEVICE: - pcinfo = &pfwinfo->rpt_fbtc_btdev.cinfo; - pfinfo = &pfwinfo->rpt_fbtc_btdev.finfo; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btdev.finfo); - pcinfo->req_fver = ver->fcxbtdevinfo; -- pcinfo->rx_len = rpt_len; -- pcinfo->rx_cnt++; - break; - default: - pfwinfo->err[BTFRE_UNDEF_TYPE]++; - return 0; - } - -+ pcinfo->rx_len = rpt_len; -+ pcinfo->rx_cnt++; -+ - if (rpt_len != pcinfo->req_len) { - if (rpt_type < BTC_RPT_TYPE_MAX) - pfwinfo->len_mismch |= (0x1 << rpt_type); -@@ -1193,227 +1171,170 @@ static u32 _chk_btc_report(struct rtw89_ - memcpy(pfinfo, rpt_content, pcinfo->req_len); - pcinfo->valid = 1; - -- if (rpt_type == BTC_RPT_TYPE_TDMA && chip->chip_id == RTL8852A) { -- rtw89_debug(rtwdev, RTW89_DBG_BTC, -- "[BTC], %s(): check %d %zu\n", __func__, -- BTC_DCNT_TDMA_NONSYNC, sizeof(dm->tdma_now)); -+ switch (rpt_type) { -+ case BTC_RPT_TYPE_CTRL: -+ if (chip->chip_id == RTL8852A) { -+ prpt = &pfwinfo->rpt_ctrl.finfo; -+ btc->fwinfo.rpt_en_map = prpt->rpt_enable; -+ wl->ver_info.fw_coex = prpt->wl_fw_coex_ver; -+ wl->ver_info.fw = prpt->wl_fw_ver; -+ dm->wl_fw_cx_offload = !!prpt->wl_fw_cx_offload; -+ -+ _chk_btc_err(rtwdev, BTC_DCNT_RPT_FREEZE, -+ pfwinfo->event[BTF_EVNT_RPT]); -+ -+ /* To avoid I/O if WL LPS or power-off */ -+ if (wl->status.map.lps != BTC_LPS_RF_OFF && -+ !wl->status.map.rf_off) { -+ rtwdev->chip->ops->btc_update_bt_cnt(rtwdev); -+ _chk_btc_err(rtwdev, BTC_DCNT_BTCNT_FREEZE, 0); -+ -+ btc->cx.cnt_bt[BTC_BCNT_POLUT] = -+ rtw89_mac_get_plt_cnt(rtwdev, -+ RTW89_MAC_0); -+ } -+ } else { -+ prpt_v1 = &pfwinfo->rpt_ctrl.finfo_v1; -+ btc->fwinfo.rpt_en_map = le32_to_cpu(prpt_v1->rpt_info.en); -+ wl->ver_info.fw_coex = le32_to_cpu(prpt_v1->wl_fw_info.cx_ver); -+ wl->ver_info.fw = le32_to_cpu(prpt_v1->wl_fw_info.fw_ver); -+ dm->wl_fw_cx_offload = !!le32_to_cpu(prpt_v1->wl_fw_info.cx_offload); -+ -+ for (i = RTW89_PHY_0; i < RTW89_PHY_MAX; i++) -+ memcpy(&dm->gnt.band[i], &prpt_v1->gnt_val[i], -+ sizeof(dm->gnt.band[i])); -+ -+ btc->cx.cnt_bt[BTC_BCNT_HIPRI_TX] = -+ le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_HI_TX]); -+ btc->cx.cnt_bt[BTC_BCNT_HIPRI_RX] = -+ le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_HI_RX]); -+ btc->cx.cnt_bt[BTC_BCNT_LOPRI_TX] = -+ le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_LO_TX]); -+ btc->cx.cnt_bt[BTC_BCNT_LOPRI_RX] = -+ le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_LO_RX]); -+ btc->cx.cnt_bt[BTC_BCNT_POLUT] = -+ le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_POLLUTED]); - -- if (memcmp(&dm->tdma_now, &pfwinfo->rpt_fbtc_tdma.finfo, -- sizeof(dm->tdma_now)) != 0) { -- rtw89_debug(rtwdev, RTW89_DBG_BTC, -- "[BTC], %s(): %d tdma_now %x %x %x %x %x %x %x %x\n", -- __func__, BTC_DCNT_TDMA_NONSYNC, -- dm->tdma_now.type, dm->tdma_now.rxflctrl, -- dm->tdma_now.txpause, dm->tdma_now.wtgle_n, -- dm->tdma_now.leak_n, dm->tdma_now.ext_ctrl, -- dm->tdma_now.rxflctrl_role, -- dm->tdma_now.option_ctrl); -- -- rtw89_debug(rtwdev, RTW89_DBG_BTC, -- "[BTC], %s(): %d rpt_fbtc_tdma %x %x %x %x %x %x %x %x\n", -- __func__, BTC_DCNT_TDMA_NONSYNC, -- pfwinfo->rpt_fbtc_tdma.finfo.type, -- pfwinfo->rpt_fbtc_tdma.finfo.rxflctrl, -- pfwinfo->rpt_fbtc_tdma.finfo.txpause, -- pfwinfo->rpt_fbtc_tdma.finfo.wtgle_n, -- pfwinfo->rpt_fbtc_tdma.finfo.leak_n, -- pfwinfo->rpt_fbtc_tdma.finfo.ext_ctrl, -- pfwinfo->rpt_fbtc_tdma.finfo.rxflctrl_role, -- pfwinfo->rpt_fbtc_tdma.finfo.option_ctrl); -- } -+ _chk_btc_err(rtwdev, BTC_DCNT_BTCNT_FREEZE, 0); -+ _chk_btc_err(rtwdev, BTC_DCNT_RPT_FREEZE, -+ pfwinfo->event[BTF_EVNT_RPT]); - -- _chk_btc_err(rtwdev, BTC_DCNT_TDMA_NONSYNC, -- memcmp(&dm->tdma_now, -- &pfwinfo->rpt_fbtc_tdma.finfo, -- sizeof(dm->tdma_now))); -- } else if (rpt_type == BTC_RPT_TYPE_TDMA) { -- rtw89_debug(rtwdev, RTW89_DBG_BTC, -- "[BTC], %s(): check %d %zu\n", __func__, -- BTC_DCNT_TDMA_NONSYNC, sizeof(dm->tdma_now)); -+ if (le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_RFK_TIMEOUT]) > 0) -+ bt->rfk_info.map.timeout = 1; -+ else -+ bt->rfk_info.map.timeout = 0; - -- if (memcmp(&dm->tdma_now, &pfwinfo->rpt_fbtc_tdma.finfo_v1.tdma, -- sizeof(dm->tdma_now)) != 0) { -- rtw89_debug(rtwdev, RTW89_DBG_BTC, -- "[BTC], %s(): %d tdma_now %x %x %x %x %x %x %x %x\n", -- __func__, BTC_DCNT_TDMA_NONSYNC, -- dm->tdma_now.type, dm->tdma_now.rxflctrl, -- dm->tdma_now.txpause, dm->tdma_now.wtgle_n, -- dm->tdma_now.leak_n, dm->tdma_now.ext_ctrl, -- dm->tdma_now.rxflctrl_role, -- dm->tdma_now.option_ctrl); -- rtw89_debug(rtwdev, RTW89_DBG_BTC, -- "[BTC], %s(): %d rpt_fbtc_tdma %x %x %x %x %x %x %x %x\n", -- __func__, BTC_DCNT_TDMA_NONSYNC, -- pfwinfo->rpt_fbtc_tdma.finfo_v1.tdma.type, -- pfwinfo->rpt_fbtc_tdma.finfo_v1.tdma.rxflctrl, -- pfwinfo->rpt_fbtc_tdma.finfo_v1.tdma.txpause, -- pfwinfo->rpt_fbtc_tdma.finfo_v1.tdma.wtgle_n, -- pfwinfo->rpt_fbtc_tdma.finfo_v1.tdma.leak_n, -- pfwinfo->rpt_fbtc_tdma.finfo_v1.tdma.ext_ctrl, -- pfwinfo->rpt_fbtc_tdma.finfo_v1.tdma.rxflctrl_role, -- pfwinfo->rpt_fbtc_tdma.finfo_v1.tdma.option_ctrl); -+ dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout; - } -- -- _chk_btc_err(rtwdev, BTC_DCNT_TDMA_NONSYNC, -- memcmp(&dm->tdma_now, -- &pfwinfo->rpt_fbtc_tdma.finfo_v1.tdma, -- sizeof(dm->tdma_now))); -- } -- -- if (rpt_type == BTC_RPT_TYPE_SLOT) { -+ break; -+ case BTC_RPT_TYPE_TDMA: -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): check %d %zu\n", __func__, -+ BTC_DCNT_TDMA_NONSYNC, -+ sizeof(dm->tdma_now)); -+ if (chip->chip_id == RTL8852A) -+ _chk_btc_err(rtwdev, BTC_DCNT_TDMA_NONSYNC, -+ memcmp(&dm->tdma_now, -+ &pfwinfo->rpt_fbtc_tdma.finfo_v1, -+ sizeof(dm->tdma_now))); -+ else -+ _chk_btc_err(rtwdev, BTC_DCNT_TDMA_NONSYNC, -+ memcmp(&dm->tdma_now, -+ &pfwinfo->rpt_fbtc_tdma.finfo, -+ sizeof(dm->tdma_now))); -+ break; -+ case BTC_RPT_TYPE_SLOT: - rtw89_debug(rtwdev, RTW89_DBG_BTC, - "[BTC], %s(): check %d %zu\n", - __func__, BTC_DCNT_SLOT_NONSYNC, - sizeof(dm->slot_now)); -- -- if (memcmp(dm->slot_now, pfwinfo->rpt_fbtc_slots.finfo.slot, -- sizeof(dm->slot_now)) != 0) { -- for (i = 0; i < CXST_MAX; i++) { -- rtp_slot = -- &pfwinfo->rpt_fbtc_slots.finfo.slot[i]; -- if (memcmp(&dm->slot_now[i], rtp_slot, -- sizeof(dm->slot_now[i])) != 0) { -- rtw89_debug(rtwdev, RTW89_DBG_BTC, -- "[BTC], %s(): %d slot_now[%d] dur=0x%04x tbl=%08x type=0x%04x\n", -- __func__, -- BTC_DCNT_SLOT_NONSYNC, i, -- dm->slot_now[i].dur, -- dm->slot_now[i].cxtbl, -- dm->slot_now[i].cxtype); -- -- rtw89_debug(rtwdev, RTW89_DBG_BTC, -- "[BTC], %s(): %d rpt_fbtc_slots[%d] dur=0x%04x tbl=%08x type=0x%04x\n", -- __func__, -- BTC_DCNT_SLOT_NONSYNC, i, -- rtp_slot->dur, -- rtp_slot->cxtbl, -- rtp_slot->cxtype); -- } -- } -- } - _chk_btc_err(rtwdev, BTC_DCNT_SLOT_NONSYNC, - memcmp(dm->slot_now, - pfwinfo->rpt_fbtc_slots.finfo.slot, - sizeof(dm->slot_now))); -- } -- -- if (rpt_type == BTC_RPT_TYPE_CYSTA && chip->chip_id == RTL8852A && -- pcysta->cycles >= BTC_CYSTA_CHK_PERIOD) { -- /* Check Leak-AP */ -- if (pcysta->slot_cnt[CXST_LK] != 0 && -- pcysta->leakrx_cnt != 0 && dm->tdma_now.rxflctrl) { -- if (pcysta->slot_cnt[CXST_LK] < -- BTC_LEAK_AP_TH * pcysta->leakrx_cnt) -- dm->leak_ap = 1; -- } -+ break; -+ case BTC_RPT_TYPE_CYSTA: -+ if (chip->chip_id == RTL8852A) { -+ if (pcysta->cycles < BTC_CYSTA_CHK_PERIOD) -+ break; -+ /* Check Leak-AP */ -+ if (pcysta->slot_cnt[CXST_LK] != 0 && -+ pcysta->leakrx_cnt != 0 && dm->tdma_now.rxflctrl) { -+ if (pcysta->slot_cnt[CXST_LK] < -+ BTC_LEAK_AP_TH * pcysta->leakrx_cnt) -+ dm->leak_ap = 1; -+ } - -- /* Check diff time between WL slot and W1/E2G slot */ -- if (dm->tdma_now.type == CXTDMA_OFF && -- dm->tdma_now.ext_ctrl == CXECTL_EXT) -- wl_slot_set = le16_to_cpu(dm->slot_now[CXST_E2G].dur); -- else -- wl_slot_set = le16_to_cpu(dm->slot_now[CXST_W1].dur); -+ /* Check diff time between WL slot and W1/E2G slot */ -+ if (dm->tdma_now.type == CXTDMA_OFF && -+ dm->tdma_now.ext_ctrl == CXECTL_EXT) -+ wl_slot_set = le16_to_cpu(dm->slot_now[CXST_E2G].dur); -+ else -+ wl_slot_set = le16_to_cpu(dm->slot_now[CXST_W1].dur); -+ -+ if (pcysta->tavg_cycle[CXT_WL] > wl_slot_set) { -+ diff_t = pcysta->tavg_cycle[CXT_WL] - wl_slot_set; -+ _chk_btc_err(rtwdev, -+ BTC_DCNT_WL_SLOT_DRIFT, diff_t); -+ } - -- if (pcysta->tavg_cycle[CXT_WL] > wl_slot_set) { -- diff_t = pcysta->tavg_cycle[CXT_WL] - wl_slot_set; -- _chk_btc_err(rtwdev, BTC_DCNT_WL_SLOT_DRIFT, diff_t); -- } -+ _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, -+ pcysta->slot_cnt[CXST_W1]); -+ _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, -+ pcysta->slot_cnt[CXST_B1]); -+ _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_FREEZE, -+ (u32)pcysta->cycles); -+ } else { -+ if (le16_to_cpu(pcysta_v1->cycles) < BTC_CYSTA_CHK_PERIOD) -+ break; - -- _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, pcysta->slot_cnt[CXST_W1]); -- _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, pcysta->slot_cnt[CXST_B1]); -- _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_FREEZE, (u32)pcysta->cycles); -- } else if (rpt_type == BTC_RPT_TYPE_CYSTA && pcysta_v1 && -- le16_to_cpu(pcysta_v1->cycles) >= BTC_CYSTA_CHK_PERIOD) { -- cnt_leak_slot = le32_to_cpu(pcysta_v1->slot_cnt[CXST_LK]); -- cnt_rx_imr = le32_to_cpu(pcysta_v1->leak_slot.cnt_rximr); -- /* Check Leak-AP */ -- if (cnt_leak_slot != 0 && cnt_rx_imr != 0 && -- dm->tdma_now.rxflctrl) { -- if (cnt_leak_slot < BTC_LEAK_AP_TH * cnt_rx_imr) -- dm->leak_ap = 1; -- } -+ cnt_leak_slot = le32_to_cpu(pcysta_v1->slot_cnt[CXST_LK]); -+ cnt_rx_imr = le32_to_cpu(pcysta_v1->leak_slot.cnt_rximr); - -- /* Check diff time between real WL slot and W1 slot */ -- if (dm->tdma_now.type == CXTDMA_OFF) { -- wl_slot_set = le16_to_cpu(dm->slot_now[CXST_W1].dur); -- wl_slot_real = le16_to_cpu(pcysta_v1->cycle_time.tavg[CXT_WL]); -- if (wl_slot_real > wl_slot_set) { -- diff_t = wl_slot_real - wl_slot_set; -- _chk_btc_err(rtwdev, BTC_DCNT_WL_SLOT_DRIFT, diff_t); -+ /* Check Leak-AP */ -+ if (cnt_leak_slot != 0 && cnt_rx_imr != 0 && -+ dm->tdma_now.rxflctrl) { -+ if (cnt_leak_slot < BTC_LEAK_AP_TH * cnt_rx_imr) -+ dm->leak_ap = 1; - } -- } - -- /* Check diff time between real BT slot and EBT/E5G slot */ -- if (dm->tdma_now.type == CXTDMA_OFF && -- dm->tdma_now.ext_ctrl == CXECTL_EXT && -- btc->bt_req_len != 0) { -- bt_slot_real = le16_to_cpu(pcysta_v1->cycle_time.tavg[CXT_BT]); -- -- if (btc->bt_req_len > bt_slot_real) { -- diff_t = btc->bt_req_len - bt_slot_real; -- _chk_btc_err(rtwdev, BTC_DCNT_BT_SLOT_DRIFT, diff_t); -+ /* Check diff time between real WL slot and W1 slot */ -+ if (dm->tdma_now.type == CXTDMA_OFF) { -+ wl_slot_set = le16_to_cpu(dm->slot_now[CXST_W1].dur); -+ wl_slot_real = le16_to_cpu(pcysta_v1->cycle_time.tavg[CXT_WL]); -+ if (wl_slot_real > wl_slot_set) { -+ diff_t = wl_slot_real - wl_slot_set; -+ _chk_btc_err(rtwdev, BTC_DCNT_WL_SLOT_DRIFT, diff_t); -+ } - } -- } - -- _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, -- le32_to_cpu(pcysta_v1->slot_cnt[CXST_W1])); -- _chk_btc_err(rtwdev, BTC_DCNT_B1_FREEZE, -- le32_to_cpu(pcysta_v1->slot_cnt[CXST_B1])); -- _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_FREEZE, -- (u32)le16_to_cpu(pcysta_v1->cycles)); -- } -- -- if (rpt_type == BTC_RPT_TYPE_CTRL && chip->chip_id == RTL8852A) { -- prpt = &pfwinfo->rpt_ctrl.finfo; -- btc->fwinfo.rpt_en_map = prpt->rpt_enable; -- wl->ver_info.fw_coex = prpt->wl_fw_coex_ver; -- wl->ver_info.fw = prpt->wl_fw_ver; -- dm->wl_fw_cx_offload = !!prpt->wl_fw_cx_offload; -- -- _chk_btc_err(rtwdev, BTC_DCNT_RPT_FREEZE, -- pfwinfo->event[BTF_EVNT_RPT]); -- -- /* To avoid I/O if WL LPS or power-off */ -- if (wl->status.map.lps != BTC_LPS_RF_OFF && !wl->status.map.rf_off) { -- rtwdev->chip->ops->btc_update_bt_cnt(rtwdev); -- _chk_btc_err(rtwdev, BTC_DCNT_BTCNT_FREEZE, 0); -+ /* Check diff time between real BT slot and EBT/E5G slot */ -+ if (dm->tdma_now.type == CXTDMA_OFF && -+ dm->tdma_now.ext_ctrl == CXECTL_EXT && -+ btc->bt_req_len != 0) { -+ bt_slot_real = le16_to_cpu(pcysta_v1->cycle_time.tavg[CXT_BT]); -+ -+ if (btc->bt_req_len > bt_slot_real) { -+ diff_t = btc->bt_req_len - bt_slot_real; -+ _chk_btc_err(rtwdev, BTC_DCNT_BT_SLOT_DRIFT, diff_t); -+ } -+ } - -- btc->cx.cnt_bt[BTC_BCNT_POLUT] = -- rtw89_mac_get_plt_cnt(rtwdev, RTW89_MAC_0); -+ _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, -+ le32_to_cpu(pcysta_v1->slot_cnt[CXST_W1])); -+ _chk_btc_err(rtwdev, BTC_DCNT_B1_FREEZE, -+ le32_to_cpu(pcysta_v1->slot_cnt[CXST_B1])); -+ _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_FREEZE, -+ (u32)le16_to_cpu(pcysta_v1->cycles)); - } -- } else if (rpt_type == BTC_RPT_TYPE_CTRL) { -- prpt_v1 = &pfwinfo->rpt_ctrl.finfo_v1; -- btc->fwinfo.rpt_en_map = le32_to_cpu(prpt_v1->rpt_info.en); -- wl->ver_info.fw_coex = le32_to_cpu(prpt_v1->wl_fw_info.cx_ver); -- wl->ver_info.fw = le32_to_cpu(prpt_v1->wl_fw_info.fw_ver); -- dm->wl_fw_cx_offload = !!le32_to_cpu(prpt_v1->wl_fw_info.cx_offload); -- -- for (i = RTW89_PHY_0; i < RTW89_PHY_MAX; i++) -- memcpy(&dm->gnt.band[i], &prpt_v1->gnt_val[i], -- sizeof(dm->gnt.band[i])); -- -- btc->cx.cnt_bt[BTC_BCNT_HIPRI_TX] = le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_HI_TX]); -- btc->cx.cnt_bt[BTC_BCNT_HIPRI_RX] = le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_HI_RX]); -- btc->cx.cnt_bt[BTC_BCNT_LOPRI_TX] = le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_LO_TX]); -- btc->cx.cnt_bt[BTC_BCNT_LOPRI_RX] = le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_LO_RX]); -- btc->cx.cnt_bt[BTC_BCNT_POLUT] = le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_POLLUTED]); -- -- _chk_btc_err(rtwdev, BTC_DCNT_BTCNT_FREEZE, 0); -- _chk_btc_err(rtwdev, BTC_DCNT_RPT_FREEZE, -- pfwinfo->event[BTF_EVNT_RPT]); -- -- if (le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_RFK_TIMEOUT]) > 0) -- bt->rfk_info.map.timeout = 1; -- else -- bt->rfk_info.map.timeout = 0; -- -- dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout; -- } -- -- if (rpt_type >= BTC_RPT_TYPE_BT_VER && -- rpt_type <= BTC_RPT_TYPE_BT_DEVICE) -+ break; -+ case BTC_RPT_TYPE_BT_VER: -+ case BTC_RPT_TYPE_BT_SCAN: -+ case BTC_RPT_TYPE_BT_AFH: -+ case BTC_RPT_TYPE_BT_DEVICE: - _update_bt_report(rtwdev, rpt_type, pfinfo); -- -+ break; -+ } - return (rpt_len + BTC_RPT_HDR_SIZE); - - err: diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-094-wifi-rtw89-coex-Change-TDMA-related-logic-to-version.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-094-wifi-rtw89-coex-Change-TDMA-related-logic-to-version.patch deleted file mode 100644 index c9ead46a4..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-094-wifi-rtw89-coex-Change-TDMA-related-logic-to-version.patch +++ /dev/null @@ -1,162 +0,0 @@ -From e0097ac51e84243f0d0c065cbede1138f5e3aa9f Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Sat, 17 Dec 2022 22:17:45 +0800 -Subject: [PATCH 094/149] wifi: rtw89: coex: Change TDMA related logic to - version separate - -In order to make different version of TDMA and coming update in the future -can all work well, use BTC format version to replace chip_id, because -format could change for specific chip_id. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221217141745.43291-8-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 47 ++++++++++++----------- - drivers/net/wireless/realtek/rtw89/core.h | 12 +++--- - 2 files changed, 32 insertions(+), 27 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -1045,12 +1045,14 @@ static u32 _chk_btc_report(struct rtw89_ - break; - case BTC_RPT_TYPE_TDMA: - pcinfo = &pfwinfo->rpt_fbtc_tdma.cinfo; -- if (chip->chip_id == RTL8852A) { -- pfinfo = &pfwinfo->rpt_fbtc_tdma.finfo; -- pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_tdma.finfo); -+ if (ver->fcxtdma == 1) { -+ pfinfo = &pfwinfo->rpt_fbtc_tdma.finfo.v1; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_tdma.finfo.v1); -+ } else if (ver->fcxtdma == 3) { -+ pfinfo = &pfwinfo->rpt_fbtc_tdma.finfo.v3; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_tdma.finfo.v3); - } else { -- pfinfo = &pfwinfo->rpt_fbtc_tdma.finfo_v1; -- pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_tdma.finfo_v1); -+ goto err; - } - pcinfo->req_fver = ver->fcxtdma; - break; -@@ -1232,16 +1234,18 @@ static u32 _chk_btc_report(struct rtw89_ - "[BTC], %s(): check %d %zu\n", __func__, - BTC_DCNT_TDMA_NONSYNC, - sizeof(dm->tdma_now)); -- if (chip->chip_id == RTL8852A) -+ if (ver->fcxtdma == 1) - _chk_btc_err(rtwdev, BTC_DCNT_TDMA_NONSYNC, - memcmp(&dm->tdma_now, -- &pfwinfo->rpt_fbtc_tdma.finfo_v1, -+ &pfwinfo->rpt_fbtc_tdma.finfo.v1, - sizeof(dm->tdma_now))); -- else -+ else if (ver->fcxtdma == 3) - _chk_btc_err(rtwdev, BTC_DCNT_TDMA_NONSYNC, - memcmp(&dm->tdma_now, -- &pfwinfo->rpt_fbtc_tdma.finfo, -+ &pfwinfo->rpt_fbtc_tdma.finfo.v3.tdma, - sizeof(dm->tdma_now))); -+ else -+ goto err; - break; - case BTC_RPT_TYPE_SLOT: - rtw89_debug(rtwdev, RTW89_DBG_BTC, -@@ -1375,13 +1379,12 @@ static void _parse_btc_report(struct rtw - - static void _append_tdma(struct rtw89_dev *rtwdev) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_btc *btc = &rtwdev->btc; - const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_dm *dm = &btc->dm; - struct rtw89_btc_btf_tlv *tlv; - struct rtw89_btc_fbtc_tdma *v; -- struct rtw89_btc_fbtc_tdma_v1 *v1; -+ struct rtw89_btc_fbtc_tdma_v3 *v3; - u16 len = btc->policy_len; - - if (!btc->update_policy_force && -@@ -1394,17 +1397,17 @@ static void _append_tdma(struct rtw89_de - - tlv = (struct rtw89_btc_btf_tlv *)&btc->policy[len]; - tlv->type = CXPOLICY_TDMA; -- if (chip->chip_id == RTL8852A) { -+ if (ver->fcxtdma == 1) { - v = (struct rtw89_btc_fbtc_tdma *)&tlv->val[0]; - tlv->len = sizeof(*v); - memcpy(v, &dm->tdma, sizeof(*v)); -- btc->policy_len += BTC_TLV_HDR_LEN + sizeof(*v); -+ btc->policy_len += BTC_TLV_HDR_LEN + sizeof(*v); - } else { -- tlv->len = sizeof(*v1); -- v1 = (struct rtw89_btc_fbtc_tdma_v1 *)&tlv->val[0]; -- v1->fver = ver->fcxtdma; -- v1->tdma = dm->tdma; -- btc->policy_len += BTC_TLV_HDR_LEN + sizeof(*v1); -+ tlv->len = sizeof(*v3); -+ v3 = (struct rtw89_btc_fbtc_tdma_v3 *)&tlv->val[0]; -+ v3->fver = ver->fcxtdma; -+ memcpy(&v3->tdma, &dm->tdma, sizeof(v3->tdma)); -+ btc->policy_len += BTC_TLV_HDR_LEN + sizeof(*v3); - } - - rtw89_debug(rtwdev, RTW89_DBG_BTC, -@@ -6281,8 +6284,8 @@ static void _show_error(struct rtw89_dev - - static void _show_fbtc_tdma(struct rtw89_dev *rtwdev, struct seq_file *m) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; - struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; - struct rtw89_btc_fbtc_tdma *t = NULL; -@@ -6294,10 +6297,10 @@ static void _show_fbtc_tdma(struct rtw89 - if (!pcinfo->valid) - return; - -- if (chip->chip_id == RTL8852A) -- t = &pfwinfo->rpt_fbtc_tdma.finfo; -+ if (ver->fcxtdma == 1) -+ t = &pfwinfo->rpt_fbtc_tdma.finfo.v1; - else -- t = &pfwinfo->rpt_fbtc_tdma.finfo_v1.tdma; -+ t = &pfwinfo->rpt_fbtc_tdma.finfo.v3.tdma; - - seq_printf(m, - " %-15s : ", "[tdma_policy]"); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -1450,13 +1450,18 @@ struct rtw89_btc_fbtc_tdma { - u8 option_ctrl; - } __packed; - --struct rtw89_btc_fbtc_tdma_v1 { -+struct rtw89_btc_fbtc_tdma_v3 { - u8 fver; /* btc_ver::fcxtdma */ - u8 rsvd; - __le16 rsvd1; - struct rtw89_btc_fbtc_tdma tdma; - } __packed; - -+union rtw89_btc_fbtc_tdma_le32 { -+ struct rtw89_btc_fbtc_tdma v1; -+ struct rtw89_btc_fbtc_tdma_v3 v3; -+}; -+ - #define CXMREG_MAX 30 - #define FCXMAX_STEP 255 /*STEP trace record cnt, Max:65535, default:255*/ - #define BTC_CYCLE_SLOT_MAX 48 /* must be even number, non-zero */ -@@ -1946,10 +1951,7 @@ struct rtw89_btc_report_ctrl_state { - - struct rtw89_btc_rpt_fbtc_tdma { - struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -- union { -- struct rtw89_btc_fbtc_tdma finfo; /* info from fw */ -- struct rtw89_btc_fbtc_tdma_v1 finfo_v1; /* info from fw for 52C*/ -- }; -+ union rtw89_btc_fbtc_tdma_le32 finfo; - }; - - struct rtw89_btc_rpt_fbtc_slots { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-095-wifi-rtw89-8852b-update-BSS-color-mapping-register.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-095-wifi-rtw89-8852b-update-BSS-color-mapping-register.patch deleted file mode 100644 index 7b17a0337..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-095-wifi-rtw89-8852b-update-BSS-color-mapping-register.patch +++ /dev/null @@ -1,98 +0,0 @@ -From a48f4fd05d5ea20c55afb212240972c1bd2c6ad3 Mon Sep 17 00:00:00 2001 -From: Eric Huang -Date: Wed, 14 Dec 2022 17:18:03 +0800 -Subject: [PATCH 095/149] wifi: rtw89: 8852b: update BSS color mapping register - -BSS color mapping register is different per IC, therefore, move this -register to chip_info and update the setting function. Without this patch, -wrong BSS color causes behavior abnormal, especially DL-OFDMA. - -Signed-off-by: Eric Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221214091803.41293-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - drivers/net/wireless/realtek/rtw89/phy.c | 9 +++++---- - drivers/net/wireless/realtek/rtw89/reg.h | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 1 + - 6 files changed, 10 insertions(+), 4 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2811,6 +2811,7 @@ struct rtw89_chip_info { - u8 dcfo_comp_sft; - const struct rtw89_imr_info *imr_info; - const struct rtw89_rrsr_cfgs *rrsr_cfgs; -+ u32 bss_clr_map_reg; - u32 dma_ch_mask; - const struct wiphy_wowlan_support *wowlan_stub; - }; ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -4117,6 +4117,7 @@ void rtw89_phy_dm_init(struct rtw89_dev - - void rtw89_phy_set_bss_color(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif) - { -+ const struct rtw89_chip_info *chip = rtwdev->chip; - enum rtw89_phy_idx phy_idx = RTW89_PHY_0; - u8 bss_color; - -@@ -4125,11 +4126,11 @@ void rtw89_phy_set_bss_color(struct rtw8 - - bss_color = vif->bss_conf.he_bss_color.color; - -- rtw89_phy_write32_idx(rtwdev, R_BSS_CLR_MAP, B_BSS_CLR_MAP_VLD0, 0x1, -+ rtw89_phy_write32_idx(rtwdev, chip->bss_clr_map_reg, B_BSS_CLR_MAP_VLD0, 0x1, - phy_idx); -- rtw89_phy_write32_idx(rtwdev, R_BSS_CLR_MAP, B_BSS_CLR_MAP_TGT, bss_color, -- phy_idx); -- rtw89_phy_write32_idx(rtwdev, R_BSS_CLR_MAP, B_BSS_CLR_MAP_STAID, -+ rtw89_phy_write32_idx(rtwdev, chip->bss_clr_map_reg, B_BSS_CLR_MAP_TGT, -+ bss_color, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, chip->bss_clr_map_reg, B_BSS_CLR_MAP_STAID, - vif->cfg.aid, phy_idx); - } - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -4108,6 +4108,7 @@ - #define R_SEG0CSI_EN 0x42C4 - #define B_SEG0CSI_EN BIT(23) - #define R_BSS_CLR_MAP 0x43ac -+#define R_BSS_CLR_MAP_V1 0x43B0 - #define B_BSS_CLR_MAP_VLD0 BIT(28) - #define B_BSS_CLR_MAP_TGT GENMASK(27, 22) - #define B_BSS_CLR_MAP_STAID GENMASK(21, 11) ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -2135,6 +2135,7 @@ const struct rtw89_chip_info rtw8852a_ch - .dcfo_comp_sft = 3, - .imr_info = &rtw8852a_imr_info, - .rrsr_cfgs = &rtw8852a_rrsr_cfgs, -+ .bss_clr_map_reg = R_BSS_CLR_MAP, - .dma_ch_mask = 0, - #ifdef CONFIG_PM - .wowlan_stub = &rtw_wowlan_stub_8852a, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2512,6 +2512,7 @@ const struct rtw89_chip_info rtw8852b_ch - .dcfo_comp_sft = 3, - .imr_info = &rtw8852b_imr_info, - .rrsr_cfgs = &rtw8852b_rrsr_cfgs, -+ .bss_clr_map_reg = R_BSS_CLR_MAP_V1, - .dma_ch_mask = BIT(RTW89_DMA_ACH4) | BIT(RTW89_DMA_ACH5) | - BIT(RTW89_DMA_ACH6) | BIT(RTW89_DMA_ACH7) | - BIT(RTW89_DMA_B1MG) | BIT(RTW89_DMA_B1HI), ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2945,6 +2945,7 @@ const struct rtw89_chip_info rtw8852c_ch - .dcfo_comp_sft = 5, - .imr_info = &rtw8852c_imr_info, - .rrsr_cfgs = &rtw8852c_rrsr_cfgs, -+ .bss_clr_map_reg = R_BSS_CLR_MAP, - .dma_ch_mask = 0, - #ifdef CONFIG_PM - .wowlan_stub = &rtw_wowlan_stub_8852c, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-096-wifi-rtw89-refine-6-GHz-scanning-dwell-time.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-096-wifi-rtw89-refine-6-GHz-scanning-dwell-time.patch deleted file mode 100644 index a9e176ffe..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-096-wifi-rtw89-refine-6-GHz-scanning-dwell-time.patch +++ /dev/null @@ -1,49 +0,0 @@ -From 08c93c0ca74c4223dce8fb68e4bb24f7426e55c8 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Wed, 14 Dec 2022 17:19:52 +0800 -Subject: [PATCH 096/149] wifi: rtw89: refine 6 GHz scanning dwell time - -Reduce dwell time to improve scan duration in 6 GHz. This is required -for scan requests that does not include RNR parsing and does full -channel scan. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221214091952.42792-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 5 +++-- - drivers/net/wireless/realtek/rtw89/fw.h | 1 + - 2 files changed, 4 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -2751,7 +2751,7 @@ static void rtw89_hw_scan_add_chan(struc - if (ssid_num == 1 && req->ssids[0].ssid_len == 0) { - ch_info->tx_pkt = false; - if (!req->duration_mandatory) -- ch_info->period -= RTW89_DWELL_TIME; -+ ch_info->period -= RTW89_DWELL_TIME_6G; - } - } - -@@ -2804,7 +2804,8 @@ static int rtw89_hw_scan_add_chan_list(s - if (req->duration_mandatory) - ch_info->period = req->duration; - else if (channel->band == NL80211_BAND_6GHZ) -- ch_info->period = RTW89_CHANNEL_TIME_6G + RTW89_DWELL_TIME; -+ ch_info->period = RTW89_CHANNEL_TIME_6G + -+ RTW89_DWELL_TIME_6G; - else - ch_info->period = RTW89_CHANNEL_TIME; - ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -205,6 +205,7 @@ struct rtw89_h2creg_sch_tx_en { - #define RTW89_DFS_CHAN_TIME 105 - #define RTW89_OFF_CHAN_TIME 100 - #define RTW89_DWELL_TIME 20 -+#define RTW89_DWELL_TIME_6G 10 - #define RTW89_SCAN_WIDTH 0 - #define RTW89_SCANOFLD_MAX_SSID 8 - #define RTW89_SCANOFLD_MAX_IE_LEN 512 diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-097-wifi-rtw89-8852c-rfk-refine-AGC-tuning-flow-of-DPK-f.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-097-wifi-rtw89-8852c-rfk-refine-AGC-tuning-flow-of-DPK-f.patch deleted file mode 100644 index 5b5601099..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-097-wifi-rtw89-8852c-rfk-refine-AGC-tuning-flow-of-DPK-f.patch +++ /dev/null @@ -1,117 +0,0 @@ -From ba1a6905c71898509fd3e8d1eb790b4e1213126f Mon Sep 17 00:00:00 2001 -From: Chih-Kang Chang -Date: Fri, 16 Dec 2022 13:29:39 +0800 -Subject: [PATCH 097/149] wifi: rtw89: 8852c: rfk: refine AGC tuning flow of - DPK for irregular PA - -Some hardware modules don't have good RF characteristic as regular. -It could have RF PA characteristic that current code doesn't handle -properly, and it runs into wrong DPK flow that doesn't complete DPK -resulting in bad EVM. - -Signed-off-by: Chih-Kang Chang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221216052939.9991-1-pkshih@realtek.com ---- - .../net/wireless/realtek/rtw89/rtw8852c_rfk.c | 38 +++++++++++++++---- - 1 file changed, 30 insertions(+), 8 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c -@@ -26,7 +26,7 @@ static const u32 rtw8852c_backup_bb_regs - }; - - static const u32 rtw8852c_backup_rf_regs[] = { -- 0xdf, 0x8f, 0x97, 0xa3, 0x5, 0x10005 -+ 0xdf, 0x5f, 0x8f, 0x97, 0xa3, 0x5, 0x10005 - }; - - #define BACKUP_BB_REGS_NR ARRAY_SIZE(rtw8852c_backup_bb_regs) -@@ -1757,7 +1757,7 @@ u8 _rx_dck_channel_calc(struct rtw89_dev - } - - #define RTW8852C_RF_REL_VERSION 34 --#define RTW8852C_DPK_VER 0x10 -+#define RTW8852C_DPK_VER 0xf - #define RTW8852C_DPK_TH_AVG_NUM 4 - #define RTW8852C_DPK_RF_PATH 2 - #define RTW8852C_DPK_KIP_REG_NUM 5 -@@ -1797,6 +1797,12 @@ enum dpk_agc_step { - DPK_AGC_STEP_SET_TX_GAIN, - }; - -+enum dpk_pas_result { -+ DPK_PAS_NOR, -+ DPK_PAS_GT, -+ DPK_PAS_LT, -+}; -+ - static void _rf_direct_cntrl(struct rtw89_dev *rtwdev, - enum rtw89_rf_path path, bool is_bybb) - { -@@ -2206,9 +2212,10 @@ static u8 _dpk_gainloss(struct rtw89_dev - return _dpk_gainloss_read(rtwdev); - } - --static bool _dpk_pas_read(struct rtw89_dev *rtwdev, bool is_check) -+static enum dpk_pas_result _dpk_pas_read(struct rtw89_dev *rtwdev, bool is_check) - { - u32 val1_i = 0, val1_q = 0, val2_i = 0, val2_q = 0; -+ u32 val1_sqrt_sum, val2_sqrt_sum; - u8 i; - - rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKBYTE2, 0x06); -@@ -2239,15 +2246,25 @@ static bool _dpk_pas_read(struct rtw89_d - } - } - -- if (val1_i * val1_i + val1_q * val1_q >= (val2_i * val2_i + val2_q * val2_q) * 8 / 5) -- return true; -+ val1_sqrt_sum = val1_i * val1_i + val1_q * val1_q; -+ val2_sqrt_sum = val2_i * val2_i + val2_q * val2_q; -+ -+ if (val1_sqrt_sum < val2_sqrt_sum) -+ return DPK_PAS_LT; -+ else if (val1_sqrt_sum >= val2_sqrt_sum * 8 / 5) -+ return DPK_PAS_GT; - else -- return false; -+ return DPK_PAS_NOR; - } - - static bool _dpk_kip_set_rxagc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, - enum rtw89_rf_path path, u8 kidx) - { -+ _dpk_kip_control_rfc(rtwdev, path, false); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_MOD, B_KIP_MOD, -+ rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); -+ _dpk_kip_control_rfc(rtwdev, path, true); -+ - _dpk_one_shot(rtwdev, phy, path, D_RXAGC); - - return _dpk_sync_check(rtwdev, path, kidx); -@@ -2285,6 +2302,7 @@ static u8 _dpk_agc(struct rtw89_dev *rtw - u8 tmp_dbm = init_xdbm, tmp_gl_idx = 0; - u8 tmp_rxbb; - u8 goout = 0, agc_cnt = 0; -+ enum dpk_pas_result pas; - u16 dgain = 0; - bool is_fail = false; - int limit = 200; -@@ -2320,9 +2338,13 @@ static u8 _dpk_agc(struct rtw89_dev *rtw - - case DPK_AGC_STEP_GAIN_LOSS_IDX: - tmp_gl_idx = _dpk_gainloss(rtwdev, phy, path, kidx); -+ pas = _dpk_pas_read(rtwdev, true); - -- if ((tmp_gl_idx == 0 && _dpk_pas_read(rtwdev, true)) || -- tmp_gl_idx >= 7) -+ if (pas == DPK_PAS_LT && tmp_gl_idx > 0) -+ step = DPK_AGC_STEP_GL_LT_CRITERION; -+ else if (pas == DPK_PAS_GT && tmp_gl_idx == 0) -+ step = DPK_AGC_STEP_GL_GT_CRITERION; -+ else if (tmp_gl_idx >= 7) - step = DPK_AGC_STEP_GL_GT_CRITERION; - else if (tmp_gl_idx == 0) - step = DPK_AGC_STEP_GL_LT_CRITERION; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-098-wifi-rtw89-Fix-a-typo-in-debug-message.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-098-wifi-rtw89-Fix-a-typo-in-debug-message.patch deleted file mode 100644 index 7ba9eb6b1..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-098-wifi-rtw89-Fix-a-typo-in-debug-message.patch +++ /dev/null @@ -1,26 +0,0 @@ -From e20c9f656654f74c9234e6cd3231aed72f53d246 Mon Sep 17 00:00:00 2001 -From: Masanari Iida -Date: Fri, 23 Dec 2022 19:20:58 +0900 -Subject: [PATCH 098/149] wifi: rtw89: Fix a typo in debug message - -This patch fixes a spelling typo in debug message. - -Signed-off-by: Masanari Iida -Acked-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20221223102058.162179-1-standby24x7@gmail.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c -@@ -1643,7 +1643,7 @@ static void _doiqk(struct rtw89_dev *rtw - rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_START); - - rtw89_debug(rtwdev, RTW89_DBG_RFK, -- "[IQK]==========IQK strat!!!!!==========\n"); -+ "[IQK]==========IQK start!!!!!==========\n"); - iqk_info->iqk_times++; - iqk_info->kcount = 0; - iqk_info->version = RTW8852A_IQK_VER; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-099-wifi-rtw89-coex-Remove-le32-to-CPU-translator-at-fir.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-099-wifi-rtw89-coex-Remove-le32-to-CPU-translator-at-fir.patch deleted file mode 100644 index 933bdf087..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-099-wifi-rtw89-coex-Remove-le32-to-CPU-translator-at-fir.patch +++ /dev/null @@ -1,326 +0,0 @@ -From f643d08642b82eeb9b9654399dd04657050f7c6f Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 3 Jan 2023 22:02:32 +0800 -Subject: [PATCH 099/149] wifi: rtw89: coex: Remove le32 to CPU translator at - firmware cycle report - -There are at least 2 version of cycle report format. If the code keep -translating the report to local variable, the numbers of variable in -check btc report function will out of maximum variable numbers. And -most of these variable are using only one time, it is not necessary -to store at memory. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230103140238.15601-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 190 +++++++--------------- - 1 file changed, 60 insertions(+), 130 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -910,76 +910,6 @@ static void _update_bt_report(struct rtw - } - } - --struct rtw89_btc_fbtc_cysta_cpu { -- u8 fver; -- u8 rsvd; -- u16 cycles; -- u16 cycles_a2dp[CXT_FLCTRL_MAX]; -- u16 a2dpept; -- u16 a2dpeptto; -- u16 tavg_cycle[CXT_MAX]; -- u16 tmax_cycle[CXT_MAX]; -- u16 tmaxdiff_cycle[CXT_MAX]; -- u16 tavg_a2dp[CXT_FLCTRL_MAX]; -- u16 tmax_a2dp[CXT_FLCTRL_MAX]; -- u16 tavg_a2dpept; -- u16 tmax_a2dpept; -- u16 tavg_lk; -- u16 tmax_lk; -- u32 slot_cnt[CXST_MAX]; -- u32 bcn_cnt[CXBCN_MAX]; -- u32 leakrx_cnt; -- u32 collision_cnt; -- u32 skip_cnt; -- u32 exception; -- u32 except_cnt; -- u16 tslot_cycle[BTC_CYCLE_SLOT_MAX]; --}; -- --static void rtw89_btc_fbtc_cysta_to_cpu(const struct rtw89_btc_fbtc_cysta *src, -- struct rtw89_btc_fbtc_cysta_cpu *dst) --{ -- static_assert(sizeof(*src) == sizeof(*dst)); -- --#define __CPY_U8(_x) ({dst->_x = src->_x; }) --#define __CPY_LE16(_x) ({dst->_x = le16_to_cpu(src->_x); }) --#define __CPY_LE16S(_x) ({int _i; for (_i = 0; _i < ARRAY_SIZE(dst->_x); _i++) \ -- dst->_x[_i] = le16_to_cpu(src->_x[_i]); }) --#define __CPY_LE32(_x) ({dst->_x = le32_to_cpu(src->_x); }) --#define __CPY_LE32S(_x) ({int _i; for (_i = 0; _i < ARRAY_SIZE(dst->_x); _i++) \ -- dst->_x[_i] = le32_to_cpu(src->_x[_i]); }) -- -- __CPY_U8(fver); -- __CPY_U8(rsvd); -- __CPY_LE16(cycles); -- __CPY_LE16S(cycles_a2dp); -- __CPY_LE16(a2dpept); -- __CPY_LE16(a2dpeptto); -- __CPY_LE16S(tavg_cycle); -- __CPY_LE16S(tmax_cycle); -- __CPY_LE16S(tmaxdiff_cycle); -- __CPY_LE16S(tavg_a2dp); -- __CPY_LE16S(tmax_a2dp); -- __CPY_LE16(tavg_a2dpept); -- __CPY_LE16(tmax_a2dpept); -- __CPY_LE16(tavg_lk); -- __CPY_LE16(tmax_lk); -- __CPY_LE32S(slot_cnt); -- __CPY_LE32S(bcn_cnt); -- __CPY_LE32(leakrx_cnt); -- __CPY_LE32(collision_cnt); -- __CPY_LE32(skip_cnt); -- __CPY_LE32(exception); -- __CPY_LE32(except_cnt); -- __CPY_LE16S(tslot_cycle); -- --#undef __CPY_U8 --#undef __CPY_LE16 --#undef __CPY_LE16S --#undef __CPY_LE32 --#undef __CPY_LE32S --} -- - #define BTC_LEAK_AP_TH 10 - #define BTC_CYSTA_CHK_PERIOD 100 - -@@ -1002,9 +932,8 @@ static u32 _chk_btc_report(struct rtw89_ - struct rtw89_btc_bt_info *bt = &btc->cx.bt; - struct rtw89_btc_fbtc_rpt_ctrl *prpt; - struct rtw89_btc_fbtc_rpt_ctrl_v1 *prpt_v1; -- struct rtw89_btc_fbtc_cysta *pcysta_le32 = NULL; -+ struct rtw89_btc_fbtc_cysta *pcysta = NULL; - struct rtw89_btc_fbtc_cysta_v1 *pcysta_v1 = NULL; -- struct rtw89_btc_fbtc_cysta_cpu pcysta[1]; - struct rtw89_btc_prpt *btc_prpt = NULL; - void *rpt_content = NULL, *pfinfo = NULL; - u8 rpt_type = 0; -@@ -1066,8 +995,7 @@ static u32 _chk_btc_report(struct rtw89_ - pcinfo = &pfwinfo->rpt_fbtc_cysta.cinfo; - if (chip->chip_id == RTL8852A) { - pfinfo = &pfwinfo->rpt_fbtc_cysta.finfo; -- pcysta_le32 = &pfwinfo->rpt_fbtc_cysta.finfo; -- rtw89_btc_fbtc_cysta_to_cpu(pcysta_le32, pcysta); -+ pcysta = &pfwinfo->rpt_fbtc_cysta.finfo; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo); - } else { - pfinfo = &pfwinfo->rpt_fbtc_cysta.finfo_v1; -@@ -1259,13 +1187,13 @@ static u32 _chk_btc_report(struct rtw89_ - break; - case BTC_RPT_TYPE_CYSTA: - if (chip->chip_id == RTL8852A) { -- if (pcysta->cycles < BTC_CYSTA_CHK_PERIOD) -+ if (le16_to_cpu(pcysta->cycles) < BTC_CYSTA_CHK_PERIOD) - break; - /* Check Leak-AP */ -- if (pcysta->slot_cnt[CXST_LK] != 0 && -- pcysta->leakrx_cnt != 0 && dm->tdma_now.rxflctrl) { -- if (pcysta->slot_cnt[CXST_LK] < -- BTC_LEAK_AP_TH * pcysta->leakrx_cnt) -+ if (le32_to_cpu(pcysta->slot_cnt[CXST_LK]) != 0 && -+ le32_to_cpu(pcysta->leakrx_cnt) != 0 && dm->tdma_now.rxflctrl) { -+ if (le32_to_cpu(pcysta->slot_cnt[CXST_LK]) < -+ BTC_LEAK_AP_TH * le32_to_cpu(pcysta->leakrx_cnt)) - dm->leak_ap = 1; - } - -@@ -1276,18 +1204,18 @@ static u32 _chk_btc_report(struct rtw89_ - else - wl_slot_set = le16_to_cpu(dm->slot_now[CXST_W1].dur); - -- if (pcysta->tavg_cycle[CXT_WL] > wl_slot_set) { -- diff_t = pcysta->tavg_cycle[CXT_WL] - wl_slot_set; -+ if (le16_to_cpu(pcysta->tavg_cycle[CXT_WL]) > wl_slot_set) { -+ diff_t = le16_to_cpu(pcysta->tavg_cycle[CXT_WL]) - wl_slot_set; - _chk_btc_err(rtwdev, - BTC_DCNT_WL_SLOT_DRIFT, diff_t); - } - - _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, -- pcysta->slot_cnt[CXST_W1]); -+ le32_to_cpu(pcysta->slot_cnt[CXST_W1])); - _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, -- pcysta->slot_cnt[CXST_B1]); -+ le32_to_cpu(pcysta->slot_cnt[CXST_B1])); - _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_FREEZE, -- (u32)pcysta->cycles); -+ le16_to_cpu(pcysta->cycles)); - } else { - if (le16_to_cpu(pcysta_v1->cycles) < BTC_CYSTA_CHK_PERIOD) - break; -@@ -6385,7 +6313,6 @@ static void _show_fbtc_cysta(struct rtw8 - struct rtw89_btc_bt_a2dp_desc *a2dp = &btc->cx.bt.link_info.a2dp_desc; - struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; - struct rtw89_btc_fbtc_cysta *pcysta_le32 = NULL; -- struct rtw89_btc_fbtc_cysta_cpu pcysta[1]; - union rtw89_btc_fbtc_rxflct r; - u8 i, cnt = 0, slot_pair; - u16 cycle, c_begin, c_end, store_index; -@@ -6395,64 +6322,65 @@ static void _show_fbtc_cysta(struct rtw8 - return; - - pcysta_le32 = &pfwinfo->rpt_fbtc_cysta.finfo; -- rtw89_btc_fbtc_cysta_to_cpu(pcysta_le32, pcysta); - seq_printf(m, - " %-15s : cycle:%d, bcn[all:%d/all_ok:%d/bt:%d/bt_ok:%d]", -- "[cycle_cnt]", pcysta->cycles, pcysta->bcn_cnt[CXBCN_ALL], -- pcysta->bcn_cnt[CXBCN_ALL_OK], -- pcysta->bcn_cnt[CXBCN_BT_SLOT], -- pcysta->bcn_cnt[CXBCN_BT_OK]); -+ "[cycle_cnt]", -+ le16_to_cpu(pcysta_le32->cycles), -+ le32_to_cpu(pcysta_le32->bcn_cnt[CXBCN_ALL]), -+ le32_to_cpu(pcysta_le32->bcn_cnt[CXBCN_ALL_OK]), -+ le32_to_cpu(pcysta_le32->bcn_cnt[CXBCN_BT_SLOT]), -+ le32_to_cpu(pcysta_le32->bcn_cnt[CXBCN_BT_OK])); - - for (i = 0; i < CXST_MAX; i++) { -- if (!pcysta->slot_cnt[i]) -+ if (!le32_to_cpu(pcysta_le32->slot_cnt[i])) - continue; -- seq_printf(m, -- ", %d:%d", (u32)i, pcysta->slot_cnt[i]); -+ seq_printf(m, ", %d:%d", (u32)i, -+ le32_to_cpu(pcysta_le32->slot_cnt[i])); - } - - if (dm->tdma_now.rxflctrl) { -- seq_printf(m, -- ", leak_rx:%d", pcysta->leakrx_cnt); -+ seq_printf(m, ", leak_rx:%d", -+ le32_to_cpu(pcysta_le32->leakrx_cnt)); - } - -- if (pcysta->collision_cnt) { -- seq_printf(m, -- ", collision:%d", pcysta->collision_cnt); -+ if (le32_to_cpu(pcysta_le32->collision_cnt)) { -+ seq_printf(m, ", collision:%d", -+ le32_to_cpu(pcysta_le32->collision_cnt)); - } - -- if (pcysta->skip_cnt) { -- seq_printf(m, -- ", skip:%d", pcysta->skip_cnt); -+ if (le32_to_cpu(pcysta_le32->skip_cnt)) { -+ seq_printf(m, ", skip:%d", -+ le32_to_cpu(pcysta_le32->skip_cnt)); - } - seq_puts(m, "\n"); - - seq_printf(m, " %-15s : avg_t[wl:%d/bt:%d/lk:%d.%03d]", - "[cycle_time]", -- pcysta->tavg_cycle[CXT_WL], -- pcysta->tavg_cycle[CXT_BT], -- pcysta->tavg_lk / 1000, pcysta->tavg_lk % 1000); -- seq_printf(m, -- ", max_t[wl:%d/bt:%d/lk:%d.%03d]", -- pcysta->tmax_cycle[CXT_WL], -- pcysta->tmax_cycle[CXT_BT], -- pcysta->tmax_lk / 1000, pcysta->tmax_lk % 1000); -- seq_printf(m, -- ", maxdiff_t[wl:%d/bt:%d]\n", -- pcysta->tmaxdiff_cycle[CXT_WL], -- pcysta->tmaxdiff_cycle[CXT_BT]); -+ le16_to_cpu(pcysta_le32->tavg_cycle[CXT_WL]), -+ le16_to_cpu(pcysta_le32->tavg_cycle[CXT_BT]), -+ le16_to_cpu(pcysta_le32->tavg_lk) / 1000, -+ le16_to_cpu(pcysta_le32->tavg_lk) % 1000); -+ seq_printf(m, ", max_t[wl:%d/bt:%d/lk:%d.%03d]", -+ le16_to_cpu(pcysta_le32->tmax_cycle[CXT_WL]), -+ le16_to_cpu(pcysta_le32->tmax_cycle[CXT_BT]), -+ le16_to_cpu(pcysta_le32->tmax_lk) / 1000, -+ le16_to_cpu(pcysta_le32->tmax_lk) % 1000); -+ seq_printf(m, ", maxdiff_t[wl:%d/bt:%d]\n", -+ le16_to_cpu(pcysta_le32->tmaxdiff_cycle[CXT_WL]), -+ le16_to_cpu(pcysta_le32->tmaxdiff_cycle[CXT_BT])); - -- if (pcysta->cycles == 0) -+ if (le16_to_cpu(pcysta_le32->cycles) == 0) - return; - - /* 1 cycle record 1 wl-slot and 1 bt-slot */ - slot_pair = BTC_CYCLE_SLOT_MAX / 2; - -- if (pcysta->cycles <= slot_pair) -+ if (le16_to_cpu(pcysta_le32->cycles) <= slot_pair) - c_begin = 1; - else -- c_begin = pcysta->cycles - slot_pair + 1; -+ c_begin = le16_to_cpu(pcysta_le32->cycles) - slot_pair + 1; - -- c_end = pcysta->cycles; -+ c_end = le16_to_cpu(pcysta_le32->cycles); - - for (cycle = c_begin; cycle <= c_end; cycle++) { - cnt++; -@@ -6461,13 +6389,13 @@ static void _show_fbtc_cysta(struct rtw8 - if (cnt % (BTC_CYCLE_SLOT_MAX / 4) == 1) - seq_printf(m, - " %-15s : ->b%02d->w%02d", "[cycle_step]", -- pcysta->tslot_cycle[store_index], -- pcysta->tslot_cycle[store_index + 1]); -+ le16_to_cpu(pcysta_le32->tslot_cycle[store_index]), -+ le16_to_cpu(pcysta_le32->tslot_cycle[store_index + 1])); - else - seq_printf(m, - "->b%02d->w%02d", -- pcysta->tslot_cycle[store_index], -- pcysta->tslot_cycle[store_index + 1]); -+ le16_to_cpu(pcysta_le32->tslot_cycle[store_index]), -+ le16_to_cpu(pcysta_le32->tslot_cycle[store_index + 1])); - if (cnt % (BTC_CYCLE_SLOT_MAX / 4) == 0 || cnt == c_end) - seq_puts(m, "\n"); - } -@@ -6476,28 +6404,30 @@ static void _show_fbtc_cysta(struct rtw8 - seq_printf(m, - " %-15s : a2dp_ept:%d, a2dp_late:%d", - "[a2dp_t_sta]", -- pcysta->a2dpept, pcysta->a2dpeptto); -+ le16_to_cpu(pcysta_le32->a2dpept), -+ le16_to_cpu(pcysta_le32->a2dpeptto)); - - seq_printf(m, - ", avg_t:%d, max_t:%d", -- pcysta->tavg_a2dpept, pcysta->tmax_a2dpept); -+ le16_to_cpu(pcysta_le32->tavg_a2dpept), -+ le16_to_cpu(pcysta_le32->tmax_a2dpept)); - r.val = dm->tdma_now.rxflctrl; - - if (r.type && r.tgln_n) { - seq_printf(m, - ", cycle[PSTDMA:%d/TDMA:%d], ", -- pcysta->cycles_a2dp[CXT_FLCTRL_ON], -- pcysta->cycles_a2dp[CXT_FLCTRL_OFF]); -+ le16_to_cpu(pcysta_le32->cycles_a2dp[CXT_FLCTRL_ON]), -+ le16_to_cpu(pcysta_le32->cycles_a2dp[CXT_FLCTRL_OFF])); - - seq_printf(m, - "avg_t[PSTDMA:%d/TDMA:%d], ", -- pcysta->tavg_a2dp[CXT_FLCTRL_ON], -- pcysta->tavg_a2dp[CXT_FLCTRL_OFF]); -+ le16_to_cpu(pcysta_le32->tavg_a2dp[CXT_FLCTRL_ON]), -+ le16_to_cpu(pcysta_le32->tavg_a2dp[CXT_FLCTRL_OFF])); - - seq_printf(m, - "max_t[PSTDMA:%d/TDMA:%d]", -- pcysta->tmax_a2dp[CXT_FLCTRL_ON], -- pcysta->tmax_a2dp[CXT_FLCTRL_OFF]); -+ le16_to_cpu(pcysta_le32->tmax_a2dp[CXT_FLCTRL_ON]), -+ le16_to_cpu(pcysta_le32->tmax_a2dp[CXT_FLCTRL_OFF])); - } - seq_puts(m, "\n"); - } diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-100-wifi-rtw89-coex-Rename-BTC-firmware-cycle-report-by-.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-100-wifi-rtw89-coex-Rename-BTC-firmware-cycle-report-by-.patch deleted file mode 100644 index 80ec2f233..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-100-wifi-rtw89-coex-Rename-BTC-firmware-cycle-report-by-.patch +++ /dev/null @@ -1,303 +0,0 @@ -From fab895b31982f8093afe807cb0a69805aaa97850 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 3 Jan 2023 22:02:33 +0800 -Subject: [PATCH 100/149] wifi: rtw89: coex: Rename BTC firmware cycle report - by feature version - -Because there are new report format in the upcoming patches, to make the -logic more readable, rename the related structure by their version number. -And to support the several version at the same time, add union definition -to include all the versions. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230103140238.15601-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 107 +++++++++++----------- - drivers/net/wireless/realtek/rtw89/core.h | 14 +-- - 2 files changed, 64 insertions(+), 57 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -932,8 +932,7 @@ static u32 _chk_btc_report(struct rtw89_ - struct rtw89_btc_bt_info *bt = &btc->cx.bt; - struct rtw89_btc_fbtc_rpt_ctrl *prpt; - struct rtw89_btc_fbtc_rpt_ctrl_v1 *prpt_v1; -- struct rtw89_btc_fbtc_cysta *pcysta = NULL; -- struct rtw89_btc_fbtc_cysta_v1 *pcysta_v1 = NULL; -+ union rtw89_btc_fbtc_cysta_info *pcysta = NULL; - struct rtw89_btc_prpt *btc_prpt = NULL; - void *rpt_content = NULL, *pfinfo = NULL; - u8 rpt_type = 0; -@@ -993,14 +992,17 @@ static u32 _chk_btc_report(struct rtw89_ - break; - case BTC_RPT_TYPE_CYSTA: - pcinfo = &pfwinfo->rpt_fbtc_cysta.cinfo; -- if (chip->chip_id == RTL8852A) { -- pfinfo = &pfwinfo->rpt_fbtc_cysta.finfo; -- pcysta = &pfwinfo->rpt_fbtc_cysta.finfo; -- pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo); -+ pcysta = &pfwinfo->rpt_fbtc_cysta.finfo; -+ if (ver->fcxcysta == 2) { -+ pfinfo = &pfwinfo->rpt_fbtc_cysta.finfo.v2; -+ pcysta->v2 = pfwinfo->rpt_fbtc_cysta.finfo.v2; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo.v2); -+ } else if (ver->fcxcysta == 3) { -+ pfinfo = &pfwinfo->rpt_fbtc_cysta.finfo.v3; -+ pcysta->v3 = pfwinfo->rpt_fbtc_cysta.finfo.v3; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo.v3); - } else { -- pfinfo = &pfwinfo->rpt_fbtc_cysta.finfo_v1; -- pcysta_v1 = &pfwinfo->rpt_fbtc_cysta.finfo_v1; -- pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo_v1); -+ goto err; - } - pcinfo->req_fver = ver->fcxcysta; - break; -@@ -1186,14 +1188,14 @@ static u32 _chk_btc_report(struct rtw89_ - sizeof(dm->slot_now))); - break; - case BTC_RPT_TYPE_CYSTA: -- if (chip->chip_id == RTL8852A) { -- if (le16_to_cpu(pcysta->cycles) < BTC_CYSTA_CHK_PERIOD) -+ if (ver->fcxcysta == 2) { -+ if (le16_to_cpu(pcysta->v2.cycles) < BTC_CYSTA_CHK_PERIOD) - break; - /* Check Leak-AP */ -- if (le32_to_cpu(pcysta->slot_cnt[CXST_LK]) != 0 && -- le32_to_cpu(pcysta->leakrx_cnt) != 0 && dm->tdma_now.rxflctrl) { -- if (le32_to_cpu(pcysta->slot_cnt[CXST_LK]) < -- BTC_LEAK_AP_TH * le32_to_cpu(pcysta->leakrx_cnt)) -+ if (le32_to_cpu(pcysta->v2.slot_cnt[CXST_LK]) != 0 && -+ le32_to_cpu(pcysta->v2.leakrx_cnt) != 0 && dm->tdma_now.rxflctrl) { -+ if (le32_to_cpu(pcysta->v2.slot_cnt[CXST_LK]) < -+ BTC_LEAK_AP_TH * le32_to_cpu(pcysta->v2.leakrx_cnt)) - dm->leak_ap = 1; - } - -@@ -1204,24 +1206,24 @@ static u32 _chk_btc_report(struct rtw89_ - else - wl_slot_set = le16_to_cpu(dm->slot_now[CXST_W1].dur); - -- if (le16_to_cpu(pcysta->tavg_cycle[CXT_WL]) > wl_slot_set) { -- diff_t = le16_to_cpu(pcysta->tavg_cycle[CXT_WL]) - wl_slot_set; -+ if (le16_to_cpu(pcysta->v2.tavg_cycle[CXT_WL]) > wl_slot_set) { -+ diff_t = le16_to_cpu(pcysta->v2.tavg_cycle[CXT_WL]) - wl_slot_set; - _chk_btc_err(rtwdev, - BTC_DCNT_WL_SLOT_DRIFT, diff_t); - } - - _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, -- le32_to_cpu(pcysta->slot_cnt[CXST_W1])); -+ le32_to_cpu(pcysta->v2.slot_cnt[CXST_W1])); - _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, -- le32_to_cpu(pcysta->slot_cnt[CXST_B1])); -+ le32_to_cpu(pcysta->v2.slot_cnt[CXST_B1])); - _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_FREEZE, -- le16_to_cpu(pcysta->cycles)); -- } else { -- if (le16_to_cpu(pcysta_v1->cycles) < BTC_CYSTA_CHK_PERIOD) -+ le16_to_cpu(pcysta->v2.cycles)); -+ } else if (ver->fcxcysta == 3) { -+ if (le16_to_cpu(pcysta->v3.cycles) < BTC_CYSTA_CHK_PERIOD) - break; - -- cnt_leak_slot = le32_to_cpu(pcysta_v1->slot_cnt[CXST_LK]); -- cnt_rx_imr = le32_to_cpu(pcysta_v1->leak_slot.cnt_rximr); -+ cnt_leak_slot = le32_to_cpu(pcysta->v3.slot_cnt[CXST_LK]); -+ cnt_rx_imr = le32_to_cpu(pcysta->v3.leak_slot.cnt_rximr); - - /* Check Leak-AP */ - if (cnt_leak_slot != 0 && cnt_rx_imr != 0 && -@@ -1233,7 +1235,7 @@ static u32 _chk_btc_report(struct rtw89_ - /* Check diff time between real WL slot and W1 slot */ - if (dm->tdma_now.type == CXTDMA_OFF) { - wl_slot_set = le16_to_cpu(dm->slot_now[CXST_W1].dur); -- wl_slot_real = le16_to_cpu(pcysta_v1->cycle_time.tavg[CXT_WL]); -+ wl_slot_real = le16_to_cpu(pcysta->v3.cycle_time.tavg[CXT_WL]); - if (wl_slot_real > wl_slot_set) { - diff_t = wl_slot_real - wl_slot_set; - _chk_btc_err(rtwdev, BTC_DCNT_WL_SLOT_DRIFT, diff_t); -@@ -1244,8 +1246,7 @@ static u32 _chk_btc_report(struct rtw89_ - if (dm->tdma_now.type == CXTDMA_OFF && - dm->tdma_now.ext_ctrl == CXECTL_EXT && - btc->bt_req_len != 0) { -- bt_slot_real = le16_to_cpu(pcysta_v1->cycle_time.tavg[CXT_BT]); -- -+ bt_slot_real = le16_to_cpu(pcysta->v3.cycle_time.tavg[CXT_BT]); - if (btc->bt_req_len > bt_slot_real) { - diff_t = btc->bt_req_len - bt_slot_real; - _chk_btc_err(rtwdev, BTC_DCNT_BT_SLOT_DRIFT, diff_t); -@@ -1253,11 +1254,13 @@ static u32 _chk_btc_report(struct rtw89_ - } - - _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, -- le32_to_cpu(pcysta_v1->slot_cnt[CXST_W1])); -+ le32_to_cpu(pcysta->v3.slot_cnt[CXST_W1])); - _chk_btc_err(rtwdev, BTC_DCNT_B1_FREEZE, -- le32_to_cpu(pcysta_v1->slot_cnt[CXST_B1])); -+ le32_to_cpu(pcysta->v3.slot_cnt[CXST_B1])); - _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_FREEZE, -- (u32)le16_to_cpu(pcysta_v1->cycles)); -+ le16_to_cpu(pcysta->v3.cycles)); -+ } else { -+ goto err; - } - break; - case BTC_RPT_TYPE_BT_VER: -@@ -6160,21 +6163,23 @@ static void _show_dm_info(struct rtw89_d - - static void _show_error(struct rtw89_dev *rtwdev, struct seq_file *m) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -- struct rtw89_btc_fbtc_cysta *pcysta; -- struct rtw89_btc_fbtc_cysta_v1 *pcysta_v1; -+ union rtw89_btc_fbtc_cysta_info *pcysta; - u32 except_cnt, exception_map; - -- if (chip->chip_id == RTL8852A) { -- pcysta = &pfwinfo->rpt_fbtc_cysta.finfo; -- except_cnt = le32_to_cpu(pcysta->except_cnt); -- exception_map = le32_to_cpu(pcysta->exception); -+ pcysta = &pfwinfo->rpt_fbtc_cysta.finfo; -+ if (ver->fcxcysta == 2) { -+ pcysta->v2 = pfwinfo->rpt_fbtc_cysta.finfo.v2; -+ except_cnt = le32_to_cpu(pcysta->v2.except_cnt); -+ exception_map = le32_to_cpu(pcysta->v2.exception); -+ } else if (ver->fcxcysta == 3) { -+ pcysta->v3 = pfwinfo->rpt_fbtc_cysta.finfo.v3; -+ except_cnt = le32_to_cpu(pcysta->v3.except_cnt); -+ exception_map = le32_to_cpu(pcysta->v3.except_map); - } else { -- pcysta_v1 = &pfwinfo->rpt_fbtc_cysta.finfo_v1; -- except_cnt = le32_to_cpu(pcysta_v1->except_cnt); -- exception_map = le32_to_cpu(pcysta_v1->except_map); -+ return; - } - - if (pfwinfo->event[BTF_EVNT_BUF_OVERFLOW] == 0 && except_cnt == 0 && -@@ -6305,14 +6310,14 @@ static void _show_fbtc_slots(struct rtw8 - } - } - --static void _show_fbtc_cysta(struct rtw89_dev *rtwdev, struct seq_file *m) -+static void _show_fbtc_cysta_v2(struct rtw89_dev *rtwdev, struct seq_file *m) - { - struct rtw89_btc *btc = &rtwdev->btc; - struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; - struct rtw89_btc_dm *dm = &btc->dm; - struct rtw89_btc_bt_a2dp_desc *a2dp = &btc->cx.bt.link_info.a2dp_desc; - struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; -- struct rtw89_btc_fbtc_cysta *pcysta_le32 = NULL; -+ struct rtw89_btc_fbtc_cysta_v2 *pcysta_le32 = NULL; - union rtw89_btc_fbtc_rxflct r; - u8 i, cnt = 0, slot_pair; - u16 cycle, c_begin, c_end, store_index; -@@ -6321,7 +6326,7 @@ static void _show_fbtc_cysta(struct rtw8 - if (!pcinfo->valid) - return; - -- pcysta_le32 = &pfwinfo->rpt_fbtc_cysta.finfo; -+ pcysta_le32 = &pfwinfo->rpt_fbtc_cysta.finfo.v2; - seq_printf(m, - " %-15s : cycle:%d, bcn[all:%d/all_ok:%d/bt:%d/bt_ok:%d]", - "[cycle_cnt]", -@@ -6433,14 +6438,14 @@ static void _show_fbtc_cysta(struct rtw8 - } - } - --static void _show_fbtc_cysta_v1(struct rtw89_dev *rtwdev, struct seq_file *m) -+static void _show_fbtc_cysta_v3(struct rtw89_dev *rtwdev, struct seq_file *m) - { - struct rtw89_btc *btc = &rtwdev->btc; - struct rtw89_btc_bt_a2dp_desc *a2dp = &btc->cx.bt.link_info.a2dp_desc; - struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; - struct rtw89_btc_dm *dm = &btc->dm; - struct rtw89_btc_fbtc_a2dp_trx_stat *a2dp_trx; -- struct rtw89_btc_fbtc_cysta_v1 *pcysta; -+ struct rtw89_btc_fbtc_cysta_v3 *pcysta; - struct rtw89_btc_rpt_cmn_info *pcinfo; - u8 i, cnt = 0, slot_pair, divide_cnt; - u16 cycle, c_begin, c_end, store_index; -@@ -6449,7 +6454,7 @@ static void _show_fbtc_cysta_v1(struct r - if (!pcinfo->valid) - return; - -- pcysta = &pfwinfo->rpt_fbtc_cysta.finfo_v1; -+ pcysta = &pfwinfo->rpt_fbtc_cysta.finfo.v3; - seq_printf(m, - " %-15s : cycle:%d, bcn[all:%d/all_ok:%d/bt:%d/bt_ok:%d]", - "[cycle_cnt]", -@@ -6708,8 +6713,8 @@ static void _show_fbtc_step(struct rtw89 - - static void _show_fw_dm_msg(struct rtw89_dev *rtwdev, struct seq_file *m) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - - if (!(btc->dm.coex_info_map & BTC_COEX_INFO_DM)) - return; -@@ -6718,10 +6723,10 @@ static void _show_fw_dm_msg(struct rtw89 - _show_fbtc_tdma(rtwdev, m); - _show_fbtc_slots(rtwdev, m); - -- if (chip->chip_id == RTL8852A) -- _show_fbtc_cysta(rtwdev, m); -- else -- _show_fbtc_cysta_v1(rtwdev, m); -+ if (ver->fcxcysta == 2) -+ _show_fbtc_cysta_v2(rtwdev, m); -+ else if (ver->fcxcysta == 3) -+ _show_fbtc_cysta_v3(rtwdev, m); - - _show_fbtc_nullsta(rtwdev, m); - _show_fbtc_step(rtwdev, m); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -1681,7 +1681,7 @@ struct rtw89_btc_fbtc_steps_v1 { - struct rtw89_btc_fbtc_step step[FCXMAX_STEP]; - } __packed; - --struct rtw89_btc_fbtc_cysta { /* statistics for cycles */ -+struct rtw89_btc_fbtc_cysta_v2 { /* statistics for cycles */ - u8 fver; /* btc_ver::fcxcysta */ - u8 rsvd; - __le16 cycles; /* total cycle number */ -@@ -1743,7 +1743,7 @@ struct rtw89_btc_fbtc_cycle_leak_info { - __le16 tmax; /* max leak-slot time */ - } __packed; - --struct rtw89_btc_fbtc_cysta_v1 { /* statistics for cycles */ -+struct rtw89_btc_fbtc_cysta_v3 { /* statistics for cycles */ - u8 fver; - u8 rsvd; - __le16 cycles; /* total cycle number */ -@@ -1761,6 +1761,11 @@ struct rtw89_btc_fbtc_cysta_v1 { /* stat - __le32 except_map; - } __packed; - -+union rtw89_btc_fbtc_cysta_info { -+ struct rtw89_btc_fbtc_cysta_v2 v2; -+ struct rtw89_btc_fbtc_cysta_v3 v3; -+}; -+ - struct rtw89_btc_fbtc_cynullsta { /* cycle null statistics */ - u8 fver; /* btc_ver::fcxnullsta */ - u8 rsvd; -@@ -1961,10 +1966,7 @@ struct rtw89_btc_rpt_fbtc_slots { - - struct rtw89_btc_rpt_fbtc_cysta { - struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -- union { -- struct rtw89_btc_fbtc_cysta finfo; /* info from fw for 52A*/ -- struct rtw89_btc_fbtc_cysta_v1 finfo_v1; /* info from fw for 52C*/ -- }; -+ union rtw89_btc_fbtc_cysta_info finfo; - }; - - struct rtw89_btc_rpt_fbtc_step { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-101-wifi-rtw89-coex-Add-v4-version-firmware-cycle-report.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-101-wifi-rtw89-coex-Add-v4-version-firmware-cycle-report.patch deleted file mode 100644 index c8c110189..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-101-wifi-rtw89-coex-Add-v4-version-firmware-cycle-report.patch +++ /dev/null @@ -1,336 +0,0 @@ -From 202c3b5c276f3f7525d9baabea7e8896d300ceff Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 3 Jan 2023 22:02:34 +0800 -Subject: [PATCH 101/149] wifi: rtw89: coex: Add v4 version firmware cycle - report - -To support v4 version firmware cycle report, apply the related -structure and functions. v4 cycle report add a group of status -to show how the free-run/TDMA training goes to. It is a firmware -mechanism that can auto adjust coexistence mode between TDMA and -free run mechanism at 3 antenna solution. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230103140238.15601-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 185 ++++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/core.h | 67 ++++++++ - 2 files changed, 252 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -1001,6 +1001,10 @@ static u32 _chk_btc_report(struct rtw89_ - pfinfo = &pfwinfo->rpt_fbtc_cysta.finfo.v3; - pcysta->v3 = pfwinfo->rpt_fbtc_cysta.finfo.v3; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo.v3); -+ } else if (ver->fcxcysta == 4) { -+ pfinfo = &pfwinfo->rpt_fbtc_cysta.finfo.v4; -+ pcysta->v4 = pfwinfo->rpt_fbtc_cysta.finfo.v4; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo.v4); - } else { - goto err; - } -@@ -1259,6 +1263,48 @@ static u32 _chk_btc_report(struct rtw89_ - le32_to_cpu(pcysta->v3.slot_cnt[CXST_B1])); - _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_FREEZE, - le16_to_cpu(pcysta->v3.cycles)); -+ } else if (ver->fcxcysta == 4) { -+ if (le16_to_cpu(pcysta->v4.cycles) < BTC_CYSTA_CHK_PERIOD) -+ break; -+ -+ cnt_leak_slot = le16_to_cpu(pcysta->v4.slot_cnt[CXST_LK]); -+ cnt_rx_imr = le32_to_cpu(pcysta->v4.leak_slot.cnt_rximr); -+ -+ /* Check Leak-AP */ -+ if (cnt_leak_slot != 0 && cnt_rx_imr != 0 && -+ dm->tdma_now.rxflctrl) { -+ if (cnt_leak_slot < BTC_LEAK_AP_TH * cnt_rx_imr) -+ dm->leak_ap = 1; -+ } -+ -+ /* Check diff time between real WL slot and W1 slot */ -+ if (dm->tdma_now.type == CXTDMA_OFF) { -+ wl_slot_set = le16_to_cpu(dm->slot_now[CXST_W1].dur); -+ wl_slot_real = le16_to_cpu(pcysta->v4.cycle_time.tavg[CXT_WL]); -+ if (wl_slot_real > wl_slot_set) { -+ diff_t = wl_slot_real - wl_slot_set; -+ _chk_btc_err(rtwdev, BTC_DCNT_WL_SLOT_DRIFT, diff_t); -+ } -+ } -+ -+ /* Check diff time between real BT slot and EBT/E5G slot */ -+ if (dm->tdma_now.type == CXTDMA_OFF && -+ dm->tdma_now.ext_ctrl == CXECTL_EXT && -+ btc->bt_req_len != 0) { -+ bt_slot_real = le16_to_cpu(pcysta->v4.cycle_time.tavg[CXT_BT]); -+ -+ if (btc->bt_req_len > bt_slot_real) { -+ diff_t = btc->bt_req_len - bt_slot_real; -+ _chk_btc_err(rtwdev, BTC_DCNT_BT_SLOT_DRIFT, diff_t); -+ } -+ } -+ -+ _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, -+ le16_to_cpu(pcysta->v4.slot_cnt[CXST_W1])); -+ _chk_btc_err(rtwdev, BTC_DCNT_B1_FREEZE, -+ le16_to_cpu(pcysta->v4.slot_cnt[CXST_B1])); -+ _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_FREEZE, -+ le16_to_cpu(pcysta->v4.cycles)); - } else { - goto err; - } -@@ -6178,6 +6224,10 @@ static void _show_error(struct rtw89_dev - pcysta->v3 = pfwinfo->rpt_fbtc_cysta.finfo.v3; - except_cnt = le32_to_cpu(pcysta->v3.except_cnt); - exception_map = le32_to_cpu(pcysta->v3.except_map); -+ } else if (ver->fcxcysta == 4) { -+ pcysta->v4 = pfwinfo->rpt_fbtc_cysta.finfo.v4; -+ except_cnt = pcysta->v4.except_cnt; -+ exception_map = le32_to_cpu(pcysta->v4.except_map); - } else { - return; - } -@@ -6569,6 +6619,139 @@ static void _show_fbtc_cysta_v3(struct r - } - } - -+static void _show_fbtc_cysta_v4(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_bt_a2dp_desc *a2dp = &btc->cx.bt.link_info.a2dp_desc; -+ struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_fbtc_a2dp_trx_stat_v4 *a2dp_trx; -+ struct rtw89_btc_fbtc_cysta_v4 *pcysta; -+ struct rtw89_btc_rpt_cmn_info *pcinfo; -+ u8 i, cnt = 0, slot_pair, divide_cnt; -+ u16 cycle, c_begin, c_end, store_index; -+ -+ pcinfo = &pfwinfo->rpt_fbtc_cysta.cinfo; -+ if (!pcinfo->valid) -+ return; -+ -+ pcysta = &pfwinfo->rpt_fbtc_cysta.finfo.v4; -+ seq_printf(m, -+ " %-15s : cycle:%d, bcn[all:%d/all_ok:%d/bt:%d/bt_ok:%d]", -+ "[cycle_cnt]", -+ le16_to_cpu(pcysta->cycles), -+ le16_to_cpu(pcysta->bcn_cnt[CXBCN_ALL]), -+ le16_to_cpu(pcysta->bcn_cnt[CXBCN_ALL_OK]), -+ le16_to_cpu(pcysta->bcn_cnt[CXBCN_BT_SLOT]), -+ le16_to_cpu(pcysta->bcn_cnt[CXBCN_BT_OK])); -+ -+ for (i = 0; i < CXST_MAX; i++) { -+ if (!le16_to_cpu(pcysta->slot_cnt[i])) -+ continue; -+ -+ seq_printf(m, ", %s:%d", id_to_slot(i), -+ le16_to_cpu(pcysta->slot_cnt[i])); -+ } -+ -+ if (dm->tdma_now.rxflctrl) -+ seq_printf(m, ", leak_rx:%d", -+ le32_to_cpu(pcysta->leak_slot.cnt_rximr)); -+ -+ if (pcysta->collision_cnt) -+ seq_printf(m, ", collision:%d", pcysta->collision_cnt); -+ -+ if (le16_to_cpu(pcysta->skip_cnt)) -+ seq_printf(m, ", skip:%d", -+ le16_to_cpu(pcysta->skip_cnt)); -+ -+ seq_puts(m, "\n"); -+ -+ seq_printf(m, " %-15s : avg_t[wl:%d/bt:%d/lk:%d.%03d]", -+ "[cycle_time]", -+ le16_to_cpu(pcysta->cycle_time.tavg[CXT_WL]), -+ le16_to_cpu(pcysta->cycle_time.tavg[CXT_BT]), -+ le16_to_cpu(pcysta->leak_slot.tavg) / 1000, -+ le16_to_cpu(pcysta->leak_slot.tavg) % 1000); -+ seq_printf(m, -+ ", max_t[wl:%d/bt:%d/lk:%d.%03d]", -+ le16_to_cpu(pcysta->cycle_time.tmax[CXT_WL]), -+ le16_to_cpu(pcysta->cycle_time.tmax[CXT_BT]), -+ le16_to_cpu(pcysta->leak_slot.tmax) / 1000, -+ le16_to_cpu(pcysta->leak_slot.tmax) % 1000); -+ seq_printf(m, -+ ", maxdiff_t[wl:%d/bt:%d]\n", -+ le16_to_cpu(pcysta->cycle_time.tmaxdiff[CXT_WL]), -+ le16_to_cpu(pcysta->cycle_time.tmaxdiff[CXT_BT])); -+ -+ cycle = le16_to_cpu(pcysta->cycles); -+ if (cycle == 0) -+ return; -+ -+ /* 1 cycle record 1 wl-slot and 1 bt-slot */ -+ slot_pair = BTC_CYCLE_SLOT_MAX / 2; -+ -+ if (cycle <= slot_pair) -+ c_begin = 1; -+ else -+ c_begin = cycle - slot_pair + 1; -+ -+ c_end = cycle; -+ -+ if (a2dp->exist) -+ divide_cnt = 3; -+ else -+ divide_cnt = BTC_CYCLE_SLOT_MAX / 4; -+ -+ for (cycle = c_begin; cycle <= c_end; cycle++) { -+ cnt++; -+ store_index = ((cycle - 1) % slot_pair) * 2; -+ -+ if (cnt % divide_cnt == 1) { -+ seq_printf(m, "\n\r %-15s : ", "[cycle_step]"); -+ } else { -+ seq_printf(m, "->b%02d", -+ le16_to_cpu(pcysta->slot_step_time[store_index])); -+ if (a2dp->exist) { -+ a2dp_trx = &pcysta->a2dp_trx[store_index]; -+ seq_printf(m, "(%d/%d/%dM/%d/%d/%d)", -+ a2dp_trx->empty_cnt, -+ a2dp_trx->retry_cnt, -+ a2dp_trx->tx_rate ? 3 : 2, -+ a2dp_trx->tx_cnt, -+ a2dp_trx->ack_cnt, -+ a2dp_trx->nack_cnt); -+ } -+ seq_printf(m, "->w%02d", -+ le16_to_cpu(pcysta->slot_step_time[store_index + 1])); -+ if (a2dp->exist) { -+ a2dp_trx = &pcysta->a2dp_trx[store_index + 1]; -+ seq_printf(m, "(%d/%d/%dM/%d/%d/%d)", -+ a2dp_trx->empty_cnt, -+ a2dp_trx->retry_cnt, -+ a2dp_trx->tx_rate ? 3 : 2, -+ a2dp_trx->tx_cnt, -+ a2dp_trx->ack_cnt, -+ a2dp_trx->nack_cnt); -+ } -+ } -+ if (cnt % (BTC_CYCLE_SLOT_MAX / 4) == 0 || cnt == c_end) -+ seq_puts(m, "\n"); -+ } -+ -+ if (a2dp->exist) { -+ seq_printf(m, "%-15s : a2dp_ept:%d, a2dp_late:%d", -+ "[a2dp_t_sta]", -+ le16_to_cpu(pcysta->a2dp_ept.cnt), -+ le16_to_cpu(pcysta->a2dp_ept.cnt_timeout)); -+ -+ seq_printf(m, ", avg_t:%d, max_t:%d", -+ le16_to_cpu(pcysta->a2dp_ept.tavg), -+ le16_to_cpu(pcysta->a2dp_ept.tmax)); -+ -+ seq_puts(m, "\n"); -+ } -+} -+ - static void _show_fbtc_nullsta(struct rtw89_dev *rtwdev, struct seq_file *m) - { - const struct rtw89_chip_info *chip = rtwdev->chip; -@@ -6727,6 +6910,8 @@ static void _show_fw_dm_msg(struct rtw89 - _show_fbtc_cysta_v2(rtwdev, m); - else if (ver->fcxcysta == 3) - _show_fbtc_cysta_v3(rtwdev, m); -+ else if (ver->fcxcysta == 4) -+ _show_fbtc_cysta_v4(rtwdev, m); - - _show_fbtc_nullsta(rtwdev, m); - _show_fbtc_step(rtwdev, m); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -1730,6 +1730,17 @@ struct rtw89_btc_fbtc_a2dp_trx_stat { - u8 rsvd2; - } __packed; - -+struct rtw89_btc_fbtc_a2dp_trx_stat_v4 { -+ u8 empty_cnt; -+ u8 retry_cnt; -+ u8 tx_rate; -+ u8 tx_cnt; -+ u8 ack_cnt; -+ u8 nack_cnt; -+ u8 no_empty_cnt; -+ u8 rsvd; -+} __packed; -+ - struct rtw89_btc_fbtc_cycle_a2dp_empty_info { - __le16 cnt; /* a2dp empty cnt */ - __le16 cnt_timeout; /* a2dp empty timeout cnt*/ -@@ -1743,6 +1754,34 @@ struct rtw89_btc_fbtc_cycle_leak_info { - __le16 tmax; /* max leak-slot time */ - } __packed; - -+#define RTW89_BTC_FDDT_PHASE_CYCLE GENMASK(9, 0) -+#define RTW89_BTC_FDDT_TRAIN_STEP GENMASK(15, 10) -+ -+struct rtw89_btc_fbtc_cycle_fddt_info { -+ __le16 train_cycle; -+ __le16 tp; -+ -+ s8 tx_power; /* absolute Tx power (dBm), 0xff-> no BTC control */ -+ s8 bt_tx_power; /* decrease Tx power (dB) */ -+ s8 bt_rx_gain; /* LNA constrain level */ -+ u8 no_empty_cnt; -+ -+ u8 rssi; /* [7:4] -> bt_rssi_level, [3:0]-> wl_rssi_level */ -+ u8 cn; /* condition_num */ -+ u8 train_status; /* [7:4]-> train-state, [3:0]-> train-phase */ -+ u8 train_result; /* refer to enum btc_fddt_check_map */ -+} __packed; -+ -+#define RTW89_BTC_FDDT_CELL_TRAIN_STATE GENMASK(3, 0) -+#define RTW89_BTC_FDDT_CELL_TRAIN_PHASE GENMASK(7, 4) -+ -+struct rtw89_btc_fbtc_fddt_cell_status { -+ s8 wl_tx_pwr; -+ s8 bt_tx_pwr; -+ s8 bt_rx_gain; -+ u8 state_phase; /* [0:3] train state, [4:7] train phase */ -+} __packed; -+ - struct rtw89_btc_fbtc_cysta_v3 { /* statistics for cycles */ - u8 fver; - u8 rsvd; -@@ -1761,9 +1800,37 @@ struct rtw89_btc_fbtc_cysta_v3 { /* stat - __le32 except_map; - } __packed; - -+#define FDD_TRAIN_WL_DIRECTION 2 -+#define FDD_TRAIN_WL_RSSI_LEVEL 5 -+#define FDD_TRAIN_BT_RSSI_LEVEL 5 -+ -+struct rtw89_btc_fbtc_cysta_v4 { /* statistics for cycles */ -+ u8 fver; -+ u8 rsvd; -+ u8 collision_cnt; /* counter for event/timer occur at the same time */ -+ u8 except_cnt; -+ -+ __le16 skip_cnt; -+ __le16 cycles; /* total cycle number */ -+ -+ __le16 slot_step_time[BTC_CYCLE_SLOT_MAX]; /* record the wl/bt slot time */ -+ __le16 slot_cnt[CXST_MAX]; /* slot count */ -+ __le16 bcn_cnt[CXBCN_MAX]; -+ struct rtw89_btc_fbtc_cycle_time_info cycle_time; -+ struct rtw89_btc_fbtc_cycle_leak_info leak_slot; -+ struct rtw89_btc_fbtc_cycle_a2dp_empty_info a2dp_ept; -+ struct rtw89_btc_fbtc_a2dp_trx_stat_v4 a2dp_trx[BTC_CYCLE_SLOT_MAX]; -+ struct rtw89_btc_fbtc_cycle_fddt_info fddt_trx[BTC_CYCLE_SLOT_MAX]; -+ struct rtw89_btc_fbtc_fddt_cell_status fddt_cells[FDD_TRAIN_WL_DIRECTION] -+ [FDD_TRAIN_WL_RSSI_LEVEL] -+ [FDD_TRAIN_BT_RSSI_LEVEL]; -+ __le32 except_map; -+} __packed; -+ - union rtw89_btc_fbtc_cysta_info { - struct rtw89_btc_fbtc_cysta_v2 v2; - struct rtw89_btc_fbtc_cysta_v3 v3; -+ struct rtw89_btc_fbtc_cysta_v4 v4; - }; - - struct rtw89_btc_fbtc_cynullsta { /* cycle null statistics */ diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-102-wifi-rtw89-coex-Change-firmware-control-report-to-ve.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-102-wifi-rtw89-coex-Change-firmware-control-report-to-ve.patch deleted file mode 100644 index d8f5bc6a9..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-102-wifi-rtw89-coex-Change-firmware-control-report-to-ve.patch +++ /dev/null @@ -1,243 +0,0 @@ -From b02e3f5c344d62da86afbc6444638a9beb375f2e Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 3 Jan 2023 22:02:35 +0800 -Subject: [PATCH 102/149] wifi: rtw89: coex: Change firmware control report to - version separate - -The rtw89 driver may support more than 1 version of Wi-Fi firmware for -certain chips. In order to support all the firmware, change to select logic -by firmware feature version code. Type control version 4 will monitor -Bluetooth PTA hardware counters at firmware and C2H to driver, but -version 1 will not do this. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230103140238.15601-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 76 ++++++++++++----------- - drivers/net/wireless/realtek/rtw89/core.h | 14 +++-- - 2 files changed, 48 insertions(+), 42 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -930,8 +930,7 @@ static u32 _chk_btc_report(struct rtw89_ - struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; - struct rtw89_btc_wl_info *wl = &btc->cx.wl; - struct rtw89_btc_bt_info *bt = &btc->cx.bt; -- struct rtw89_btc_fbtc_rpt_ctrl *prpt; -- struct rtw89_btc_fbtc_rpt_ctrl_v1 *prpt_v1; -+ union rtw89_btc_fbtc_rpt_ctrl_ver_info *prpt = NULL; - union rtw89_btc_fbtc_cysta_info *pcysta = NULL; - struct rtw89_btc_prpt *btc_prpt = NULL; - void *rpt_content = NULL, *pfinfo = NULL; -@@ -962,12 +961,15 @@ static u32 _chk_btc_report(struct rtw89_ - switch (rpt_type) { - case BTC_RPT_TYPE_CTRL: - pcinfo = &pfwinfo->rpt_ctrl.cinfo; -- if (chip->chip_id == RTL8852A) { -- pfinfo = &pfwinfo->rpt_ctrl.finfo; -- pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo); -+ prpt = &pfwinfo->rpt_ctrl.finfo; -+ if (ver->fcxbtcrpt == 1) { -+ pfinfo = &pfwinfo->rpt_ctrl.finfo.v1; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo.v1); -+ } else if (ver->fcxbtcrpt == 4) { -+ pfinfo = &pfwinfo->rpt_ctrl.finfo.v4; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo.v4); - } else { -- pfinfo = &pfwinfo->rpt_ctrl.finfo_v1; -- pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo_v1); -+ goto err; - } - pcinfo->req_fver = ver->fcxbtcrpt; - break; -@@ -1109,12 +1111,12 @@ static u32 _chk_btc_report(struct rtw89_ - - switch (rpt_type) { - case BTC_RPT_TYPE_CTRL: -- if (chip->chip_id == RTL8852A) { -- prpt = &pfwinfo->rpt_ctrl.finfo; -- btc->fwinfo.rpt_en_map = prpt->rpt_enable; -- wl->ver_info.fw_coex = prpt->wl_fw_coex_ver; -- wl->ver_info.fw = prpt->wl_fw_ver; -- dm->wl_fw_cx_offload = !!prpt->wl_fw_cx_offload; -+ if (ver->fcxbtcrpt == 1) { -+ prpt->v1 = pfwinfo->rpt_ctrl.finfo.v1; -+ btc->fwinfo.rpt_en_map = prpt->v1.rpt_enable; -+ wl->ver_info.fw_coex = prpt->v1.wl_fw_coex_ver; -+ wl->ver_info.fw = prpt->v1.wl_fw_ver; -+ dm->wl_fw_cx_offload = !!prpt->v1.wl_fw_cx_offload; - - _chk_btc_err(rtwdev, BTC_DCNT_RPT_FREEZE, - pfwinfo->event[BTF_EVNT_RPT]); -@@ -1129,38 +1131,40 @@ static u32 _chk_btc_report(struct rtw89_ - rtw89_mac_get_plt_cnt(rtwdev, - RTW89_MAC_0); - } -- } else { -- prpt_v1 = &pfwinfo->rpt_ctrl.finfo_v1; -- btc->fwinfo.rpt_en_map = le32_to_cpu(prpt_v1->rpt_info.en); -- wl->ver_info.fw_coex = le32_to_cpu(prpt_v1->wl_fw_info.cx_ver); -- wl->ver_info.fw = le32_to_cpu(prpt_v1->wl_fw_info.fw_ver); -- dm->wl_fw_cx_offload = !!le32_to_cpu(prpt_v1->wl_fw_info.cx_offload); -+ } else if (ver->fcxbtcrpt == 4) { -+ prpt->v4 = pfwinfo->rpt_ctrl.finfo.v4; -+ btc->fwinfo.rpt_en_map = le32_to_cpu(prpt->v4.rpt_info.en); -+ wl->ver_info.fw_coex = le32_to_cpu(prpt->v4.wl_fw_info.cx_ver); -+ wl->ver_info.fw = le32_to_cpu(prpt->v4.wl_fw_info.fw_ver); -+ dm->wl_fw_cx_offload = !!le32_to_cpu(prpt->v4.wl_fw_info.cx_offload); - - for (i = RTW89_PHY_0; i < RTW89_PHY_MAX; i++) -- memcpy(&dm->gnt.band[i], &prpt_v1->gnt_val[i], -+ memcpy(&dm->gnt.band[i], &prpt->v4.gnt_val[i], - sizeof(dm->gnt.band[i])); - - btc->cx.cnt_bt[BTC_BCNT_HIPRI_TX] = -- le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_HI_TX]); -+ le32_to_cpu(prpt->v4.bt_cnt[BTC_BCNT_HI_TX]); - btc->cx.cnt_bt[BTC_BCNT_HIPRI_RX] = -- le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_HI_RX]); -+ le32_to_cpu(prpt->v4.bt_cnt[BTC_BCNT_HI_RX]); - btc->cx.cnt_bt[BTC_BCNT_LOPRI_TX] = -- le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_LO_TX]); -+ le32_to_cpu(prpt->v4.bt_cnt[BTC_BCNT_LO_TX]); - btc->cx.cnt_bt[BTC_BCNT_LOPRI_RX] = -- le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_LO_RX]); -+ le32_to_cpu(prpt->v4.bt_cnt[BTC_BCNT_LO_RX]); - btc->cx.cnt_bt[BTC_BCNT_POLUT] = -- le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_POLLUTED]); -+ le32_to_cpu(prpt->v4.bt_cnt[BTC_BCNT_POLLUTED]); - - _chk_btc_err(rtwdev, BTC_DCNT_BTCNT_FREEZE, 0); - _chk_btc_err(rtwdev, BTC_DCNT_RPT_FREEZE, - pfwinfo->event[BTF_EVNT_RPT]); - -- if (le32_to_cpu(prpt_v1->bt_cnt[BTC_BCNT_RFK_TIMEOUT]) > 0) -+ if (le32_to_cpu(prpt->v4.bt_cnt[BTC_BCNT_RFK_TIMEOUT]) > 0) - bt->rfk_info.map.timeout = 1; - else - bt->rfk_info.map.timeout = 0; - - dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout; -+ } else { -+ goto err; - } - break; - case BTC_RPT_TYPE_TDMA: -@@ -7061,12 +7065,12 @@ static void _show_mreg(struct rtw89_dev - seq_puts(m, "\n"); - } - --static void _show_summary(struct rtw89_dev *rtwdev, struct seq_file *m) -+static void _show_summary_v1(struct rtw89_dev *rtwdev, struct seq_file *m) - { - struct rtw89_btc *btc = &rtwdev->btc; - struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; - struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; -- struct rtw89_btc_fbtc_rpt_ctrl *prptctrl = NULL; -+ struct rtw89_btc_fbtc_rpt_ctrl_v1 *prptctrl = NULL; - struct rtw89_btc_cx *cx = &btc->cx; - struct rtw89_btc_dm *dm = &btc->dm; - struct rtw89_btc_wl_info *wl = &cx->wl; -@@ -7081,7 +7085,7 @@ static void _show_summary(struct rtw89_d - - pcinfo = &pfwinfo->rpt_ctrl.cinfo; - if (pcinfo->valid && !wl->status.map.lps && !wl->status.map.rf_off) { -- prptctrl = &pfwinfo->rpt_ctrl.finfo; -+ prptctrl = &pfwinfo->rpt_ctrl.finfo.v1; - - seq_printf(m, - " %-15s : h2c_cnt=%d(fail:%d, fw_recv:%d), c2h_cnt=%d(fw_send:%d), ", -@@ -7165,11 +7169,11 @@ static void _show_summary(struct rtw89_d - cnt[BTC_NCNT_CUSTOMERIZE]); - } - --static void _show_summary_v1(struct rtw89_dev *rtwdev, struct seq_file *m) -+static void _show_summary_v4(struct rtw89_dev *rtwdev, struct seq_file *m) - { - struct rtw89_btc *btc = &rtwdev->btc; - struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -- struct rtw89_btc_fbtc_rpt_ctrl_v1 *prptctrl; -+ struct rtw89_btc_fbtc_rpt_ctrl_v4 *prptctrl; - struct rtw89_btc_rpt_cmn_info *pcinfo; - struct rtw89_btc_cx *cx = &btc->cx; - struct rtw89_btc_dm *dm = &btc->dm; -@@ -7185,7 +7189,7 @@ static void _show_summary_v1(struct rtw8 - - pcinfo = &pfwinfo->rpt_ctrl.cinfo; - if (pcinfo->valid && !wl->status.map.lps && !wl->status.map.rf_off) { -- prptctrl = &pfwinfo->rpt_ctrl.finfo_v1; -+ prptctrl = &pfwinfo->rpt_ctrl.finfo.v4; - - seq_printf(m, - " %-15s : h2c_cnt=%d(fail:%d, fw_recv:%d), c2h_cnt=%d(fw_send:%d), ", -@@ -7279,9 +7283,9 @@ static void _show_summary_v1(struct rtw8 - - void rtw89_btc_dump_info(struct rtw89_dev *rtwdev, struct seq_file *m) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_fw_suit *fw_suit = &rtwdev->fw.normal; - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_cx *cx = &btc->cx; - struct rtw89_btc_bt_info *bt = &cx->bt; - -@@ -7310,10 +7314,10 @@ void rtw89_btc_dump_info(struct rtw89_de - _show_dm_info(rtwdev, m); - _show_fw_dm_msg(rtwdev, m); - _show_mreg(rtwdev, m); -- if (chip->chip_id == RTL8852A) -- _show_summary(rtwdev, m); -- else -+ if (ver->fcxbtcrpt == 1) - _show_summary_v1(rtwdev, m); -+ else if (ver->fcxbtcrpt == 4) -+ _show_summary_v4(rtwdev, m); - } - - void rtw89_coex_recognize_ver(struct rtw89_dev *rtwdev) ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -1480,7 +1480,7 @@ enum rtw89_btc_bt_sta_counter { - BTC_BCNT_STA_MAX - }; - --struct rtw89_btc_fbtc_rpt_ctrl { -+struct rtw89_btc_fbtc_rpt_ctrl_v1 { - u16 fver; /* btc_ver::fcxbtcrpt */ - u16 rpt_cnt; /* tmr counters */ - u32 wl_fw_coex_ver; /* match which driver's coex version */ -@@ -1533,7 +1533,7 @@ struct rtw89_btc_fbtc_rpt_ctrl_bt_mailbo - struct rtw89_btc_fbtc_rpt_ctrl_a2dp_empty a2dp; - } __packed; - --struct rtw89_btc_fbtc_rpt_ctrl_v1 { -+struct rtw89_btc_fbtc_rpt_ctrl_v4 { - u8 fver; - u8 rsvd; - __le16 rsvd1; -@@ -1544,6 +1544,11 @@ struct rtw89_btc_fbtc_rpt_ctrl_v1 { - struct rtw89_mac_ax_gnt gnt_val[RTW89_PHY_MAX]; - } __packed; - -+union rtw89_btc_fbtc_rpt_ctrl_ver_info { -+ struct rtw89_btc_fbtc_rpt_ctrl_v1 v1; -+ struct rtw89_btc_fbtc_rpt_ctrl_v4 v4; -+}; -+ - enum rtw89_fbtc_ext_ctrl_type { - CXECTL_OFF = 0x0, /* tdma off */ - CXECTL_B2 = 0x1, /* allow B2 (beacon-early) */ -@@ -2015,10 +2020,7 @@ union rtw89_btc_fbtc_btafh_info { - - struct rtw89_btc_report_ctrl_state { - struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -- union { -- struct rtw89_btc_fbtc_rpt_ctrl finfo; /* info from fw for 52A*/ -- struct rtw89_btc_fbtc_rpt_ctrl_v1 finfo_v1; /* info from fw for 52C*/ -- }; -+ union rtw89_btc_fbtc_rpt_ctrl_ver_info finfo; - }; - - struct rtw89_btc_rpt_fbtc_tdma { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-103-wifi-rtw89-coex-Add-v5-firmware-control-report.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-103-wifi-rtw89-coex-Add-v5-firmware-control-report.patch deleted file mode 100644 index 01631a0a7..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-103-wifi-rtw89-coex-Add-v5-firmware-control-report.patch +++ /dev/null @@ -1,242 +0,0 @@ -From 0c06fd47335ab9bbcbca250267eb22227e98ffa4 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 3 Jan 2023 22:02:36 +0800 -Subject: [PATCH 103/149] wifi: rtw89: coex: Add v5 firmware control report - -Comparing v5 control report to v4 version, v5 reduce some of variable's -size to reduce firmware code size. And change the grant signal report -format. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230103140238.15601-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 148 ++++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/core.h | 27 ++++ - 2 files changed, 175 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -968,6 +968,9 @@ static u32 _chk_btc_report(struct rtw89_ - } else if (ver->fcxbtcrpt == 4) { - pfinfo = &pfwinfo->rpt_ctrl.finfo.v4; - pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo.v4); -+ } else if (ver->fcxbtcrpt == 5) { -+ pfinfo = &pfwinfo->rpt_ctrl.finfo.v5; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo.v5); - } else { - goto err; - } -@@ -1163,6 +1166,33 @@ static u32 _chk_btc_report(struct rtw89_ - bt->rfk_info.map.timeout = 0; - - dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout; -+ } else if (ver->fcxbtcrpt == 5) { -+ prpt->v5 = pfwinfo->rpt_ctrl.finfo.v5; -+ pfwinfo->rpt_en_map = le32_to_cpu(prpt->v5.rpt_info.en); -+ wl->ver_info.fw_coex = le32_to_cpu(prpt->v5.rpt_info.cx_ver); -+ wl->ver_info.fw = le32_to_cpu(prpt->v5.rpt_info.fw_ver); -+ dm->wl_fw_cx_offload = 0; -+ -+ for (i = RTW89_PHY_0; i < RTW89_PHY_MAX; i++) -+ memcpy(&dm->gnt.band[i], &prpt->v5.gnt_val[i][0], -+ sizeof(dm->gnt.band[i])); -+ -+ btc->cx.cnt_bt[BTC_BCNT_HIPRI_TX] = -+ le16_to_cpu(prpt->v5.bt_cnt[BTC_BCNT_HI_TX]); -+ btc->cx.cnt_bt[BTC_BCNT_HIPRI_RX] = -+ le16_to_cpu(prpt->v5.bt_cnt[BTC_BCNT_HI_RX]); -+ btc->cx.cnt_bt[BTC_BCNT_LOPRI_TX] = -+ le16_to_cpu(prpt->v5.bt_cnt[BTC_BCNT_LO_TX]); -+ btc->cx.cnt_bt[BTC_BCNT_LOPRI_RX] = -+ le16_to_cpu(prpt->v5.bt_cnt[BTC_BCNT_LO_RX]); -+ btc->cx.cnt_bt[BTC_BCNT_POLUT] = -+ le16_to_cpu(prpt->v5.bt_cnt[BTC_BCNT_POLLUTED]); -+ -+ _chk_btc_err(rtwdev, BTC_DCNT_BTCNT_FREEZE, 0); -+ _chk_btc_err(rtwdev, BTC_DCNT_RPT_FREEZE, -+ pfwinfo->event[BTF_EVNT_RPT]); -+ -+ dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout; - } else { - goto err; - } -@@ -7281,6 +7311,122 @@ static void _show_summary_v4(struct rtw8 - cnt[BTC_NCNT_CUSTOMERIZE]); - } - -+static void _show_summary_v5(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -+ struct rtw89_btc_fbtc_rpt_ctrl_v5 *prptctrl; -+ struct rtw89_btc_rpt_cmn_info *pcinfo; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_wl_info *wl = &cx->wl; -+ u32 cnt_sum = 0, *cnt = btc->dm.cnt_notify; -+ u8 i; -+ -+ if (!(dm->coex_info_map & BTC_COEX_INFO_SUMMARY)) -+ return; -+ -+ seq_puts(m, "========== [Statistics] ==========\n"); -+ -+ pcinfo = &pfwinfo->rpt_ctrl.cinfo; -+ if (pcinfo->valid && !wl->status.map.lps && !wl->status.map.rf_off) { -+ prptctrl = &pfwinfo->rpt_ctrl.finfo.v5; -+ -+ seq_printf(m, -+ " %-15s : h2c_cnt=%d(fail:%d, fw_recv:%d), c2h_cnt=%d(fw_send:%d, len:%d), ", -+ "[summary]", pfwinfo->cnt_h2c, pfwinfo->cnt_h2c_fail, -+ le16_to_cpu(prptctrl->rpt_info.cnt_h2c), -+ pfwinfo->cnt_c2h, -+ le16_to_cpu(prptctrl->rpt_info.cnt_c2h), -+ le16_to_cpu(prptctrl->rpt_info.len_c2h)); -+ -+ seq_printf(m, -+ "rpt_cnt=%d(fw_send:%d), rpt_map=0x%x", -+ pfwinfo->event[BTF_EVNT_RPT], -+ le16_to_cpu(prptctrl->rpt_info.cnt), -+ le32_to_cpu(prptctrl->rpt_info.en)); -+ -+ if (dm->error.map.wl_fw_hang) -+ seq_puts(m, " (WL FW Hang!!)"); -+ seq_puts(m, "\n"); -+ seq_printf(m, -+ " %-15s : send_ok:%d, send_fail:%d, recv:%d, ", -+ "[mailbox]", -+ le32_to_cpu(prptctrl->bt_mbx_info.cnt_send_ok), -+ le32_to_cpu(prptctrl->bt_mbx_info.cnt_send_fail), -+ le32_to_cpu(prptctrl->bt_mbx_info.cnt_recv)); -+ -+ seq_printf(m, -+ "A2DP_empty:%d(stop:%d, tx:%d, ack:%d, nack:%d)\n", -+ le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_empty), -+ le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_flowctrl), -+ le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_tx), -+ le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_ack), -+ le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_nack)); -+ -+ seq_printf(m, -+ " %-15s : wl_rfk[req:%d/go:%d/reject:%d/tout:%d]", -+ "[RFK/LPS]", cx->cnt_wl[BTC_WCNT_RFK_REQ], -+ cx->cnt_wl[BTC_WCNT_RFK_GO], -+ cx->cnt_wl[BTC_WCNT_RFK_REJECT], -+ cx->cnt_wl[BTC_WCNT_RFK_TIMEOUT]); -+ -+ seq_printf(m, -+ ", bt_rfk[req:%d]", -+ le16_to_cpu(prptctrl->bt_cnt[BTC_BCNT_RFK_REQ])); -+ -+ seq_printf(m, -+ ", AOAC[RF_on:%d/RF_off:%d]", -+ le16_to_cpu(prptctrl->rpt_info.cnt_aoac_rf_on), -+ le16_to_cpu(prptctrl->rpt_info.cnt_aoac_rf_off)); -+ } else { -+ seq_puts(m, "\n"); -+ seq_printf(m, -+ " %-15s : h2c_cnt=%d(fail:%d), c2h_cnt=%d", -+ "[summary]", pfwinfo->cnt_h2c, -+ pfwinfo->cnt_h2c_fail, pfwinfo->cnt_c2h); -+ } -+ -+ if (!pcinfo->valid || pfwinfo->len_mismch || pfwinfo->fver_mismch || -+ pfwinfo->err[BTFRE_EXCEPTION]) { -+ seq_puts(m, "\n"); -+ seq_printf(m, -+ " %-15s : WL FW rpt error!![rpt_ctrl_valid:%d/len:" -+ "0x%x/ver:0x%x/ex:%d/lps=%d/rf_off=%d]", -+ "[ERROR]", pcinfo->valid, pfwinfo->len_mismch, -+ pfwinfo->fver_mismch, pfwinfo->err[BTFRE_EXCEPTION], -+ wl->status.map.lps, wl->status.map.rf_off); -+ } -+ -+ for (i = 0; i < BTC_NCNT_NUM; i++) -+ cnt_sum += dm->cnt_notify[i]; -+ -+ seq_puts(m, "\n"); -+ seq_printf(m, -+ " %-15s : total=%d, show_coex_info=%d, power_on=%d, init_coex=%d, ", -+ "[notify_cnt]", -+ cnt_sum, cnt[BTC_NCNT_SHOW_COEX_INFO], -+ cnt[BTC_NCNT_POWER_ON], cnt[BTC_NCNT_INIT_COEX]); -+ -+ seq_printf(m, -+ "power_off=%d, radio_state=%d, role_info=%d, wl_rfk=%d, wl_sta=%d", -+ cnt[BTC_NCNT_POWER_OFF], cnt[BTC_NCNT_RADIO_STATE], -+ cnt[BTC_NCNT_ROLE_INFO], cnt[BTC_NCNT_WL_RFK], -+ cnt[BTC_NCNT_WL_STA]); -+ -+ seq_puts(m, "\n"); -+ seq_printf(m, -+ " %-15s : scan_start=%d, scan_finish=%d, switch_band=%d, special_pkt=%d, ", -+ "[notify_cnt]", -+ cnt[BTC_NCNT_SCAN_START], cnt[BTC_NCNT_SCAN_FINISH], -+ cnt[BTC_NCNT_SWITCH_BAND], cnt[BTC_NCNT_SPECIAL_PACKET]); -+ -+ seq_printf(m, -+ "timer=%d, control=%d, customerize=%d", -+ cnt[BTC_NCNT_TIMER], cnt[BTC_NCNT_CONTROL], -+ cnt[BTC_NCNT_CUSTOMERIZE]); -+} -+ - void rtw89_btc_dump_info(struct rtw89_dev *rtwdev, struct seq_file *m) - { - struct rtw89_fw_suit *fw_suit = &rtwdev->fw.normal; -@@ -7318,6 +7464,8 @@ void rtw89_btc_dump_info(struct rtw89_de - _show_summary_v1(rtwdev, m); - else if (ver->fcxbtcrpt == 4) - _show_summary_v4(rtwdev, m); -+ else if (ver->fcxbtcrpt == 5) -+ _show_summary_v5(rtwdev, m); - } - - void rtw89_coex_recognize_ver(struct rtw89_dev *rtwdev) ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -1512,6 +1512,20 @@ struct rtw89_btc_fbtc_rpt_ctrl_info { - __le32 cnt_aoac_rf_off; /* rf-off counter for aoac switch notify */ - } __packed; - -+struct rtw89_btc_fbtc_rpt_ctrl_info_v5 { -+ __le32 cx_ver; /* match which driver's coex version */ -+ __le32 fw_ver; -+ __le32 en; /* report map */ -+ -+ __le16 cnt; /* fw report counter */ -+ __le16 cnt_c2h; /* fw send c2h counter */ -+ __le16 cnt_h2c; /* fw recv h2c counter */ -+ __le16 len_c2h; /* The total length of the last C2H */ -+ -+ __le16 cnt_aoac_rf_on; /* rf-on counter for aoac switch notify */ -+ __le16 cnt_aoac_rf_off; /* rf-off counter for aoac switch notify */ -+} __packed; -+ - struct rtw89_btc_fbtc_rpt_ctrl_wl_fw_info { - __le32 cx_ver; /* match which driver's coex version */ - __le32 cx_offload; -@@ -1544,9 +1558,22 @@ struct rtw89_btc_fbtc_rpt_ctrl_v4 { - struct rtw89_mac_ax_gnt gnt_val[RTW89_PHY_MAX]; - } __packed; - -+struct rtw89_btc_fbtc_rpt_ctrl_v5 { -+ u8 fver; -+ u8 rsvd; -+ __le16 rsvd1; -+ -+ u8 gnt_val[RTW89_PHY_MAX][4]; -+ __le16 bt_cnt[BTC_BCNT_STA_MAX]; -+ -+ struct rtw89_btc_fbtc_rpt_ctrl_info_v5 rpt_info; -+ struct rtw89_btc_fbtc_rpt_ctrl_bt_mailbox bt_mbx_info; -+} __packed; -+ - union rtw89_btc_fbtc_rpt_ctrl_ver_info { - struct rtw89_btc_fbtc_rpt_ctrl_v1 v1; - struct rtw89_btc_fbtc_rpt_ctrl_v4 v4; -+ struct rtw89_btc_fbtc_rpt_ctrl_v5 v5; - }; - - enum rtw89_fbtc_ext_ctrl_type { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-104-wifi-rtw89-coex-only-read-Bluetooth-counter-of-repor.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-104-wifi-rtw89-coex-only-read-Bluetooth-counter-of-repor.patch deleted file mode 100644 index e68271325..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-104-wifi-rtw89-coex-only-read-Bluetooth-counter-of-repor.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 891b6a3f9407965436136319ad81f03bbf97310d Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 3 Jan 2023 22:02:37 +0800 -Subject: [PATCH 104/149] wifi: rtw89: coex: only read Bluetooth counter of - report version 1 for RTL8852A - -Only when firmware control report version is 1, need to get the counter by -reading the register. The other version will monitor the counter at -firmware. And upstream branch only RTL8852A has this old version. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230103140238.15601-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -1878,9 +1878,13 @@ static - void rtw8852a_btc_update_bt_cnt(struct rtw89_dev *rtwdev) - { - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_cx *cx = &btc->cx; - u32 val; - -+ if (ver->fcxbtcrpt != 1) -+ return; -+ - val = rtw89_read32(rtwdev, R_AX_BT_STAST_HIGH); - cx->cnt_bt[BTC_BCNT_HIPRI_TX] = FIELD_GET(B_AX_STATIS_BT_HI_TX_MASK, val); - cx->cnt_bt[BTC_BCNT_HIPRI_RX] = FIELD_GET(B_AX_STATIS_BT_HI_RX_MASK, val); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-105-wifi-rtw89-coex-Update-WiFi-role-info-H2C-report.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-105-wifi-rtw89-coex-Update-WiFi-role-info-H2C-report.patch deleted file mode 100644 index 2e174be57..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-105-wifi-rtw89-coex-Update-WiFi-role-info-H2C-report.patch +++ /dev/null @@ -1,154 +0,0 @@ -From 3f625adc61a0f015c2ce982bc49a84e163094a0c Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 3 Jan 2023 22:02:38 +0800 -Subject: [PATCH 105/149] wifi: rtw89: coex: Update WiFi role info H2C report - -Change style to feature version separate. And because there are -different WiFi roles number in the firmware, it will make structure -length longer or shorter, so update the length calculator to cover -the difference. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230103140238.15601-8-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 7 +++-- - drivers/net/wireless/realtek/rtw89/fw.c | 36 +++++++++++++++-------- - 2 files changed, 27 insertions(+), 16 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -1772,16 +1772,17 @@ static void _fw_set_policy(struct rtw89_ - - static void _fw_set_drv_info(struct rtw89_dev *rtwdev, u8 type) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - - switch (type) { - case CXDRVINFO_INIT: - rtw89_fw_h2c_cxdrv_init(rtwdev); - break; - case CXDRVINFO_ROLE: -- if (chip->chip_id == RTL8852A) -+ if (ver->fwlrole == 0) - rtw89_fw_h2c_cxdrv_role(rtwdev); -- else -+ else if (ver->fwlrole == 1) - rtw89_fw_h2c_cxdrv_role_v1(rtwdev); - break; - case CXDRVINFO_CTRL: ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -1818,33 +1818,36 @@ fail: - - #define PORT_DATA_OFFSET 4 - #define H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN 12 --#define H2C_LEN_CXDRVINFO_ROLE (4 + 12 * RTW89_PORT_NUM + H2C_LEN_CXDRVHDR) --#define H2C_LEN_CXDRVINFO_ROLE_V1 (4 + 16 * RTW89_PORT_NUM + \ -- H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN + \ -- H2C_LEN_CXDRVHDR) -+#define H2C_LEN_CXDRVINFO_ROLE_SIZE(max_role_num) \ -+ (4 + 12 * (max_role_num) + H2C_LEN_CXDRVHDR) -+ - int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev) - { - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_wl_info *wl = &btc->cx.wl; - struct rtw89_btc_wl_role_info *role_info = &wl->role_info; - struct rtw89_btc_wl_role_info_bpos *bpos = &role_info->role_map.role; - struct rtw89_btc_wl_active_role *active = role_info->active_role; - struct sk_buff *skb; -+ u32 len; - u8 offset = 0; - u8 *cmd; - int ret; - int i; - -- skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_ROLE); -+ len = H2C_LEN_CXDRVINFO_ROLE_SIZE(ver->max_role_num); -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len); - if (!skb) { - rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_role\n"); - return -ENOMEM; - } -- skb_put(skb, H2C_LEN_CXDRVINFO_ROLE); -+ skb_put(skb, len); - cmd = skb->data; - - RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_ROLE); -- RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_ROLE - H2C_LEN_CXDRVHDR); -+ RTW89_SET_FWCMD_CXHDR_LEN(cmd, len - H2C_LEN_CXDRVHDR); - - RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, role_info->connect_cnt); - RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, role_info->link_mode); -@@ -1881,7 +1884,7 @@ int rtw89_fw_h2c_cxdrv_role(struct rtw89 - rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, - H2C_CAT_OUTSRC, BTFC_SET, - SET_DRV_INFO, 0, 0, -- H2C_LEN_CXDRVINFO_ROLE); -+ len); - - ret = rtw89_h2c_tx(rtwdev, skb, false); - if (ret) { -@@ -1896,28 +1899,35 @@ fail: - return ret; - } - -+#define H2C_LEN_CXDRVINFO_ROLE_SIZE_V1(max_role_num) \ -+ (4 + 16 * (max_role_num) + H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN + H2C_LEN_CXDRVHDR) -+ - int rtw89_fw_h2c_cxdrv_role_v1(struct rtw89_dev *rtwdev) - { - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_wl_info *wl = &btc->cx.wl; - struct rtw89_btc_wl_role_info_v1 *role_info = &wl->role_info_v1; - struct rtw89_btc_wl_role_info_bpos *bpos = &role_info->role_map.role; - struct rtw89_btc_wl_active_role_v1 *active = role_info->active_role_v1; - struct sk_buff *skb; -+ u32 len; - u8 *cmd, offset; - int ret; - int i; - -- skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_ROLE_V1); -+ len = H2C_LEN_CXDRVINFO_ROLE_SIZE_V1(ver->max_role_num); -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len); - if (!skb) { - rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_role\n"); - return -ENOMEM; - } -- skb_put(skb, H2C_LEN_CXDRVINFO_ROLE_V1); -+ skb_put(skb, len); - cmd = skb->data; - - RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_ROLE); -- RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_ROLE_V1 - H2C_LEN_CXDRVHDR); -+ RTW89_SET_FWCMD_CXHDR_LEN(cmd, len - H2C_LEN_CXDRVHDR); - - RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, role_info->connect_cnt); - RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, role_info->link_mode); -@@ -1953,7 +1963,7 @@ int rtw89_fw_h2c_cxdrv_role_v1(struct rt - RTW89_SET_FWCMD_CXROLE_ACT_NOA_DUR(cmd, active->noa_duration, i, offset); - } - -- offset = H2C_LEN_CXDRVINFO_ROLE_V1 - H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN; -+ offset = len - H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN; - RTW89_SET_FWCMD_CXROLE_MROLE_TYPE(cmd, role_info->mrole_type, offset); - RTW89_SET_FWCMD_CXROLE_MROLE_NOA(cmd, role_info->mrole_noa_duration, offset); - RTW89_SET_FWCMD_CXROLE_DBCC_EN(cmd, role_info->dbcc_en, offset); -@@ -1964,7 +1974,7 @@ int rtw89_fw_h2c_cxdrv_role_v1(struct rt - rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, - H2C_CAT_OUTSRC, BTFC_SET, - SET_DRV_INFO, 0, 0, -- H2C_LEN_CXDRVINFO_ROLE_V1); -+ len); - - ret = rtw89_h2c_tx(rtwdev, skb, false); - if (ret) { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-108-wifi-rtw89-coex-Add-version-code-for-Wi-Fi-firmware-.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-108-wifi-rtw89-coex-Add-version-code-for-Wi-Fi-firmware-.patch deleted file mode 100644 index db94d014a..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-108-wifi-rtw89-coex-Add-version-code-for-Wi-Fi-firmware-.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 72f8b0461b4aa1b90248c36f3d2ea4a58074672e Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Fri, 6 Jan 2023 20:08:38 +0800 -Subject: [PATCH 108/149] wifi: rtw89: coex: Add version code for Wi-Fi - firmware coexistence control - -The newer Wi-Fi firmware are all changed to "Not to send H2C to -mention firmware how many call flow step should firmware trace". -The structure had removed the member, and define the steps number -at newer version firmware. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230106120844.17441-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -1992,8 +1992,8 @@ fail: - #define H2C_LEN_CXDRVINFO_CTRL (4 + H2C_LEN_CXDRVHDR) - int rtw89_fw_h2c_cxdrv_ctrl(struct rtw89_dev *rtwdev) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_ctrl *ctrl = &btc->ctrl; - struct sk_buff *skb; - u8 *cmd; -@@ -2013,7 +2013,7 @@ int rtw89_fw_h2c_cxdrv_ctrl(struct rtw89 - RTW89_SET_FWCMD_CXCTRL_MANUAL(cmd, ctrl->manual); - RTW89_SET_FWCMD_CXCTRL_IGNORE_BT(cmd, ctrl->igno_bt); - RTW89_SET_FWCMD_CXCTRL_ALWAYS_FREERUN(cmd, ctrl->always_freerun); -- if (chip->chip_id == RTL8852A) -+ if (ver->fcxctrl == 0) - RTW89_SET_FWCMD_CXCTRL_TRACE_STEP(cmd, ctrl->trace_step); - - rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-109-wifi-rtw89-coex-Change-Wi-Fi-Null-data-report-to-ver.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-109-wifi-rtw89-coex-Change-Wi-Fi-Null-data-report-to-ver.patch deleted file mode 100644 index a0e77b170..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-109-wifi-rtw89-coex-Change-Wi-Fi-Null-data-report-to-ver.patch +++ /dev/null @@ -1,177 +0,0 @@ -From 3d929f075d3bb6187ad73375f6aee7bcf0b51851 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Fri, 6 Jan 2023 20:08:39 +0800 -Subject: [PATCH 109/149] wifi: rtw89: coex: Change Wi-Fi Null data report to - version separate - -Coexistence need to send Null data to stop AP keeps TX packet to DUT -before DUT coexistence switch to Bluetooth time slot, or it will be an -interference to DUT BT and because DUT will not RX packet from AP -the packet retry may harmful to WL TP. Compare to v1 version, the newer -firmware report will also report Null TX data counter. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230106120844.17441-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 57 +++++++++++------------ - drivers/net/wireless/realtek/rtw89/core.h | 14 +++--- - 2 files changed, 35 insertions(+), 36 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -1032,12 +1032,14 @@ static u32 _chk_btc_report(struct rtw89_ - break; - case BTC_RPT_TYPE_NULLSTA: - pcinfo = &pfwinfo->rpt_fbtc_nullsta.cinfo; -- if (chip->chip_id == RTL8852A) { -+ if (ver->fcxnullsta == 1) { - pfinfo = &pfwinfo->rpt_fbtc_nullsta.finfo; -- pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_nullsta.finfo); -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_nullsta.finfo.v1); -+ } else if (ver->fcxnullsta == 2) { -+ pfinfo = &pfwinfo->rpt_fbtc_nullsta.finfo.v2; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_nullsta.finfo.v2); - } else { -- pfinfo = &pfwinfo->rpt_fbtc_nullsta.finfo_v1; -- pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_nullsta.finfo_v1); -+ goto err; - } - pcinfo->req_fver = ver->fcxnullsta; - break; -@@ -6789,12 +6791,11 @@ static void _show_fbtc_cysta_v4(struct r - - static void _show_fbtc_nullsta(struct rtw89_dev *rtwdev, struct seq_file *m) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; - struct rtw89_btc_rpt_cmn_info *pcinfo; -- struct rtw89_btc_fbtc_cynullsta *ns; -- struct rtw89_btc_fbtc_cynullsta_v1 *ns_v1; -+ union rtw89_btc_fbtc_cynullsta_info *ns; - u8 i = 0; - - if (!btc->dm.tdma_now.rxflctrl) -@@ -6804,9 +6805,8 @@ static void _show_fbtc_nullsta(struct rt - if (!pcinfo->valid) - return; - -- if (chip->chip_id == RTL8852A) { -- ns = &pfwinfo->rpt_fbtc_nullsta.finfo; -- -+ ns = &pfwinfo->rpt_fbtc_nullsta.finfo; -+ if (ver->fcxnullsta == 1) { - seq_printf(m, " %-15s : ", "[null_sta]"); - - for (i = 0; i < 2; i++) { -@@ -6815,46 +6815,43 @@ static void _show_fbtc_nullsta(struct rt - else - seq_printf(m, "null-%d", i); - seq_printf(m, "[ok:%d/", -- le32_to_cpu(ns->result[i][1])); -+ le32_to_cpu(ns->v1.result[i][1])); - seq_printf(m, "fail:%d/", -- le32_to_cpu(ns->result[i][0])); -+ le32_to_cpu(ns->v1.result[i][0])); - seq_printf(m, "on_time:%d/", -- le32_to_cpu(ns->result[i][2])); -+ le32_to_cpu(ns->v1.result[i][2])); - seq_printf(m, "retry:%d/", -- le32_to_cpu(ns->result[i][3])); -+ le32_to_cpu(ns->v1.result[i][3])); - seq_printf(m, "avg_t:%d.%03d/", -- le32_to_cpu(ns->avg_t[i]) / 1000, -- le32_to_cpu(ns->avg_t[i]) % 1000); -+ le32_to_cpu(ns->v1.avg_t[i]) / 1000, -+ le32_to_cpu(ns->v1.avg_t[i]) % 1000); - seq_printf(m, "max_t:%d.%03d]", -- le32_to_cpu(ns->max_t[i]) / 1000, -- le32_to_cpu(ns->max_t[i]) % 1000); -+ le32_to_cpu(ns->v1.max_t[i]) / 1000, -+ le32_to_cpu(ns->v1.max_t[i]) % 1000); - } - } else { -- ns_v1 = &pfwinfo->rpt_fbtc_nullsta.finfo_v1; -- - seq_printf(m, " %-15s : ", "[null_sta]"); -- - for (i = 0; i < 2; i++) { - if (i != 0) - seq_printf(m, ", null-%d", i); - else - seq_printf(m, "null-%d", i); - seq_printf(m, "[Tx:%d/", -- le32_to_cpu(ns_v1->result[i][4])); -+ le32_to_cpu(ns->v2.result[i][4])); - seq_printf(m, "[ok:%d/", -- le32_to_cpu(ns_v1->result[i][1])); -+ le32_to_cpu(ns->v2.result[i][1])); - seq_printf(m, "fail:%d/", -- le32_to_cpu(ns_v1->result[i][0])); -+ le32_to_cpu(ns->v2.result[i][0])); - seq_printf(m, "on_time:%d/", -- le32_to_cpu(ns_v1->result[i][2])); -+ le32_to_cpu(ns->v2.result[i][2])); - seq_printf(m, "retry:%d/", -- le32_to_cpu(ns_v1->result[i][3])); -+ le32_to_cpu(ns->v2.result[i][3])); - seq_printf(m, "avg_t:%d.%03d/", -- le32_to_cpu(ns_v1->avg_t[i]) / 1000, -- le32_to_cpu(ns_v1->avg_t[i]) % 1000); -+ le32_to_cpu(ns->v2.avg_t[i]) / 1000, -+ le32_to_cpu(ns->v2.avg_t[i]) % 1000); - seq_printf(m, "max_t:%d.%03d]", -- le32_to_cpu(ns_v1->max_t[i]) / 1000, -- le32_to_cpu(ns_v1->max_t[i]) % 1000); -+ le32_to_cpu(ns->v2.max_t[i]) / 1000, -+ le32_to_cpu(ns->v2.max_t[i]) % 1000); - } - } - seq_puts(m, "\n"); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -1865,7 +1865,7 @@ union rtw89_btc_fbtc_cysta_info { - struct rtw89_btc_fbtc_cysta_v4 v4; - }; - --struct rtw89_btc_fbtc_cynullsta { /* cycle null statistics */ -+struct rtw89_btc_fbtc_cynullsta_v1 { /* cycle null statistics */ - u8 fver; /* btc_ver::fcxnullsta */ - u8 rsvd; - __le16 rsvd2; -@@ -1874,7 +1874,7 @@ struct rtw89_btc_fbtc_cynullsta { /* cyc - __le32 result[2][4]; /* 0:fail, 1:ok, 2:on_time, 3:retry */ - } __packed; - --struct rtw89_btc_fbtc_cynullsta_v1 { /* cycle null statistics */ -+struct rtw89_btc_fbtc_cynullsta_v2 { /* cycle null statistics */ - u8 fver; /* btc_ver::fcxnullsta */ - u8 rsvd; - __le16 rsvd2; -@@ -1883,6 +1883,11 @@ struct rtw89_btc_fbtc_cynullsta_v1 { /* - __le32 result[2][5]; /* 0:fail, 1:ok, 2:on_time, 3:retry, 4:tx */ - } __packed; - -+union rtw89_btc_fbtc_cynullsta_info { -+ struct rtw89_btc_fbtc_cynullsta_v1 v1; /* info from fw */ -+ struct rtw89_btc_fbtc_cynullsta_v2 v2; -+}; -+ - struct rtw89_btc_fbtc_btver { - u8 fver; /* btc_ver::fcxbtver */ - u8 rsvd; -@@ -2075,10 +2080,7 @@ struct rtw89_btc_rpt_fbtc_step { - - struct rtw89_btc_rpt_fbtc_nullsta { - struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -- union { -- struct rtw89_btc_fbtc_cynullsta finfo; /* info from fw */ -- struct rtw89_btc_fbtc_cynullsta_v1 finfo_v1; /* info from fw */ -- }; -+ union rtw89_btc_fbtc_cynullsta_info finfo; - }; - - struct rtw89_btc_rpt_fbtc_mreg { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-110-wifi-rtw89-coex-Change-firmware-steps-report-to-vers.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-110-wifi-rtw89-coex-Change-firmware-steps-report-to-vers.patch deleted file mode 100644 index fc82df7de..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-110-wifi-rtw89-coex-Change-firmware-steps-report-to-vers.patch +++ /dev/null @@ -1,289 +0,0 @@ -From 2626ccefe615a1faa8fb6bfb07708089b103e428 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Fri, 6 Jan 2023 20:08:40 +0800 -Subject: [PATCH 110/149] wifi: rtw89: coex: Change firmware steps report to - version separate - -The report records the slots/events and their time cost about the code -call flow at firmware, ver 3 assign a reserved variable to recognize -the report is enabled or not. And add corresponding function to parsing -the report. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230106120844.17441-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 124 +++++++++++++++++++--- - drivers/net/wireless/realtek/rtw89/core.h | 44 ++++++-- - 2 files changed, 149 insertions(+), 19 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -923,7 +923,6 @@ static u32 _chk_btc_report(struct rtw89_ - struct rtw89_btc_btf_fwinfo *pfwinfo, - u8 *prptbuf, u32 index) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_btc *btc = &rtwdev->btc; - const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_dm *dm = &btc->dm; -@@ -1017,16 +1016,18 @@ static u32 _chk_btc_report(struct rtw89_ - break; - case BTC_RPT_TYPE_STEP: - pcinfo = &pfwinfo->rpt_fbtc_step.cinfo; -- if (chip->chip_id == RTL8852A) { -- pfinfo = &pfwinfo->rpt_fbtc_step.finfo; -- pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_step.finfo.step[0]) * -+ if (ver->fcxstep == 2) { -+ pfinfo = &pfwinfo->rpt_fbtc_step.finfo.v2; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_step.finfo.v2.step[0]) * - trace_step + -- offsetof(struct rtw89_btc_fbtc_steps, step); -- } else { -- pfinfo = &pfwinfo->rpt_fbtc_step.finfo_v1; -- pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_step.finfo_v1.step[0]) * -+ offsetof(struct rtw89_btc_fbtc_steps_v2, step); -+ } else if (ver->fcxstep == 3) { -+ pfinfo = &pfwinfo->rpt_fbtc_step.finfo.v3; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_step.finfo.v3.step[0]) * - trace_step + -- offsetof(struct rtw89_btc_fbtc_steps_v1, step); -+ offsetof(struct rtw89_btc_fbtc_steps_v3, step); -+ } else { -+ goto err; - } - pcinfo->req_fver = ver->fcxstep; - break; -@@ -6008,6 +6009,7 @@ static void _show_bt_info(struct rtw89_d - #define CASE_BTC_POLICY_STR(e) \ - case BTC_CXP_ ## e | BTC_POLICY_EXT_BIT: return #e - #define CASE_BTC_SLOT_STR(e) case CXST_ ## e: return #e -+#define CASE_BTC_EVT_STR(e) case CXEVNT_## e: return #e - - static const char *steps_to_str(u16 step) - { -@@ -6148,6 +6150,40 @@ static const char *id_to_slot(u32 id) - } - } - -+static const char *id_to_evt(u32 id) -+{ -+ switch (id) { -+ CASE_BTC_EVT_STR(TDMA_ENTRY); -+ CASE_BTC_EVT_STR(WL_TMR); -+ CASE_BTC_EVT_STR(B1_TMR); -+ CASE_BTC_EVT_STR(B2_TMR); -+ CASE_BTC_EVT_STR(B3_TMR); -+ CASE_BTC_EVT_STR(B4_TMR); -+ CASE_BTC_EVT_STR(W2B_TMR); -+ CASE_BTC_EVT_STR(B2W_TMR); -+ CASE_BTC_EVT_STR(BCN_EARLY); -+ CASE_BTC_EVT_STR(A2DP_EMPTY); -+ CASE_BTC_EVT_STR(LK_END); -+ CASE_BTC_EVT_STR(RX_ISR); -+ CASE_BTC_EVT_STR(RX_FC0); -+ CASE_BTC_EVT_STR(RX_FC1); -+ CASE_BTC_EVT_STR(BT_RELINK); -+ CASE_BTC_EVT_STR(BT_RETRY); -+ CASE_BTC_EVT_STR(E2G); -+ CASE_BTC_EVT_STR(E5G); -+ CASE_BTC_EVT_STR(EBT); -+ CASE_BTC_EVT_STR(ENULL); -+ CASE_BTC_EVT_STR(DRV_WLK); -+ CASE_BTC_EVT_STR(BCN_OK); -+ CASE_BTC_EVT_STR(BT_CHANGE); -+ CASE_BTC_EVT_STR(EBT_EXTEND); -+ CASE_BTC_EVT_STR(E2G_NULL1); -+ CASE_BTC_EVT_STR(B1FDD_TMR); -+ default: -+ return "unknown"; -+ } -+} -+ - static - void seq_print_segment(struct seq_file *m, const char *prefix, u16 *data, - u8 len, u8 seg_len, u8 start_idx, u8 ring_len) -@@ -6857,12 +6893,12 @@ static void _show_fbtc_nullsta(struct rt - seq_puts(m, "\n"); - } - --static void _show_fbtc_step(struct rtw89_dev *rtwdev, struct seq_file *m) -+static void _show_fbtc_step_v2(struct rtw89_dev *rtwdev, struct seq_file *m) - { - struct rtw89_btc *btc = &rtwdev->btc; - struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; - struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; -- struct rtw89_btc_fbtc_steps *pstep = NULL; -+ struct rtw89_btc_fbtc_steps_v2 *pstep = NULL; - u8 type, val, cnt = 0, state = 0; - bool outloop = false; - u16 i, diff_t, n_start = 0, n_stop = 0; -@@ -6872,7 +6908,7 @@ static void _show_fbtc_step(struct rtw89 - if (!pcinfo->valid) - return; - -- pstep = &pfwinfo->rpt_fbtc_step.finfo; -+ pstep = &pfwinfo->rpt_fbtc_step.finfo.v2; - pos_old = le16_to_cpu(pstep->pos_old); - pos_new = le16_to_cpu(pstep->pos_new); - -@@ -6926,6 +6962,63 @@ static void _show_fbtc_step(struct rtw89 - } while (!outloop); - } - -+static void _show_fbtc_step_v3(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -+ struct rtw89_btc_rpt_cmn_info *pcinfo; -+ struct rtw89_btc_fbtc_steps_v3 *pstep; -+ u32 i, n_begin, n_end, array_idx, cnt = 0; -+ u8 type, val; -+ u16 diff_t; -+ -+ if ((pfwinfo->rpt_en_map & -+ rtw89_btc_fw_rpt_ver(rtwdev, RPT_EN_FW_STEP_INFO)) == 0) -+ return; -+ -+ pcinfo = &pfwinfo->rpt_fbtc_step.cinfo; -+ if (!pcinfo->valid) -+ return; -+ -+ pstep = &pfwinfo->rpt_fbtc_step.finfo.v3; -+ if (pcinfo->req_fver != pstep->fver) -+ return; -+ -+ if (le32_to_cpu(pstep->cnt) <= FCXDEF_STEP) -+ n_begin = 1; -+ else -+ n_begin = le32_to_cpu(pstep->cnt) - FCXDEF_STEP + 1; -+ -+ n_end = le32_to_cpu(pstep->cnt); -+ -+ if (n_begin > n_end) -+ return; -+ -+ /* restore step info by using ring instead of FIFO */ -+ for (i = n_begin; i <= n_end; i++) { -+ array_idx = (i - 1) % FCXDEF_STEP; -+ type = pstep->step[array_idx].type; -+ val = pstep->step[array_idx].val; -+ diff_t = le16_to_cpu(pstep->step[array_idx].difft); -+ -+ if (type == CXSTEP_NONE || type >= CXSTEP_MAX) -+ continue; -+ -+ if (cnt % 10 == 0) -+ seq_printf(m, " %-15s : ", "[steps]"); -+ -+ seq_printf(m, "-> %s(%02d)", -+ (type == CXSTEP_SLOT ? -+ id_to_slot((u32)val) : -+ id_to_evt((u32)val)), diff_t); -+ -+ if (cnt % 10 == 9) -+ seq_puts(m, "\n"); -+ -+ cnt++; -+ } -+} -+ - static void _show_fw_dm_msg(struct rtw89_dev *rtwdev, struct seq_file *m) - { - struct rtw89_btc *btc = &rtwdev->btc; -@@ -6946,7 +7039,12 @@ static void _show_fw_dm_msg(struct rtw89 - _show_fbtc_cysta_v4(rtwdev, m); - - _show_fbtc_nullsta(rtwdev, m); -- _show_fbtc_step(rtwdev, m); -+ -+ if (ver->fcxstep == 2) -+ _show_fbtc_step_v2(rtwdev, m); -+ else if (ver->fcxstep == 3) -+ _show_fbtc_step_v3(rtwdev, m); -+ - } - - static void _get_gnt(struct rtw89_dev *rtwdev, struct rtw89_mac_ax_coex_gnt *gnt_cfg) ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -1611,6 +1611,36 @@ enum rtw89_btc_cxst_state { - CXST_MAX = 0x12, - }; - -+enum rtw89_btc_cxevnt { -+ CXEVNT_TDMA_ENTRY = 0x0, -+ CXEVNT_WL_TMR, -+ CXEVNT_B1_TMR, -+ CXEVNT_B2_TMR, -+ CXEVNT_B3_TMR, -+ CXEVNT_B4_TMR, -+ CXEVNT_W2B_TMR, -+ CXEVNT_B2W_TMR, -+ CXEVNT_BCN_EARLY, -+ CXEVNT_A2DP_EMPTY, -+ CXEVNT_LK_END, -+ CXEVNT_RX_ISR, -+ CXEVNT_RX_FC0, -+ CXEVNT_RX_FC1, -+ CXEVNT_BT_RELINK, -+ CXEVNT_BT_RETRY, -+ CXEVNT_E2G, -+ CXEVNT_E5G, -+ CXEVNT_EBT, -+ CXEVNT_ENULL, -+ CXEVNT_DRV_WLK, -+ CXEVNT_BCN_OK, -+ CXEVNT_BT_CHANGE, -+ CXEVNT_EBT_EXTEND, -+ CXEVNT_E2G_NULL1, -+ CXEVNT_B1FDD_TMR, -+ CXEVNT_MAX -+}; -+ - enum { - CXBCN_ALL = 0x0, - CXBCN_ALL_OK, -@@ -1696,7 +1726,7 @@ struct rtw89_btc_fbtc_step { - __le16 difft; - } __packed; - --struct rtw89_btc_fbtc_steps { -+struct rtw89_btc_fbtc_steps_v2 { - u8 fver; /* btc_ver::fcxstep */ - u8 rsvd; - __le16 cnt; -@@ -1705,7 +1735,7 @@ struct rtw89_btc_fbtc_steps { - struct rtw89_btc_fbtc_step step[FCXMAX_STEP]; - } __packed; - --struct rtw89_btc_fbtc_steps_v1 { -+struct rtw89_btc_fbtc_steps_v3 { - u8 fver; - u8 en; - __le16 rsvd; -@@ -1713,6 +1743,11 @@ struct rtw89_btc_fbtc_steps_v1 { - struct rtw89_btc_fbtc_step step[FCXMAX_STEP]; - } __packed; - -+union rtw89_btc_fbtc_steps_info { -+ struct rtw89_btc_fbtc_steps_v2 v2; -+ struct rtw89_btc_fbtc_steps_v3 v3; -+}; -+ - struct rtw89_btc_fbtc_cysta_v2 { /* statistics for cycles */ - u8 fver; /* btc_ver::fcxcysta */ - u8 rsvd; -@@ -2072,10 +2107,7 @@ struct rtw89_btc_rpt_fbtc_cysta { - - struct rtw89_btc_rpt_fbtc_step { - struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -- union { -- struct rtw89_btc_fbtc_steps finfo; /* info from fw */ -- struct rtw89_btc_fbtc_steps_v1 finfo_v1; /* info from fw */ -- }; -+ union rtw89_btc_fbtc_steps_info finfo; /* info from fw */ - }; - - struct rtw89_btc_rpt_fbtc_nullsta { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-111-wifi-rtw89-coex-refactor-debug-log-of-slot-list.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-111-wifi-rtw89-coex-refactor-debug-log-of-slot-list.patch deleted file mode 100644 index 2fc553628..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-111-wifi-rtw89-coex-refactor-debug-log-of-slot-list.patch +++ /dev/null @@ -1,96 +0,0 @@ -From 2ce43be348502703cf173fc31ea45bfe5ff43f90 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Fri, 6 Jan 2023 20:08:41 +0800 -Subject: [PATCH 111/149] wifi: rtw89: coex: refactor debug log of slot list - -Slot list is to list the WiFi/Bluetooth PTA hardware priority setting. -Move the list parser to its function, not to append together with TDMA -parser. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230106120844.17441-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 45 +++-------------------- - 1 file changed, 5 insertions(+), 40 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -6345,9 +6345,6 @@ static void _show_fbtc_tdma(struct rtw89 - struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; - struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; - struct rtw89_btc_fbtc_tdma *t = NULL; -- struct rtw89_btc_fbtc_slot *s = NULL; -- struct rtw89_btc_dm *dm = &btc->dm; -- u8 i, cnt = 0; - - pcinfo = &pfwinfo->rpt_fbtc_tdma.cinfo; - if (!pcinfo->valid) -@@ -6373,61 +6370,29 @@ static void _show_fbtc_tdma(struct rtw89 - "policy_type:%d", - (u32)btc->policy_type); - -- s = pfwinfo->rpt_fbtc_slots.finfo.slot; -- -- for (i = 0; i < CXST_MAX; i++) { -- if (dm->update_slot_map == BIT(CXST_MAX) - 1) -- break; -- -- if (!(dm->update_slot_map & BIT(i))) -- continue; -- -- if (cnt % 6 == 0) -- seq_printf(m, -- " %-15s : %d[%d/0x%x/%d]", -- "[slot_policy]", -- (u32)i, -- s[i].dur, s[i].cxtbl, s[i].cxtype); -- else -- seq_printf(m, -- ", %d[%d/0x%x/%d]", -- (u32)i, -- s[i].dur, s[i].cxtbl, s[i].cxtype); -- if (cnt % 6 == 5) -- seq_puts(m, "\n"); -- cnt++; -- } - seq_puts(m, "\n"); - } - - static void _show_fbtc_slots(struct rtw89_dev *rtwdev, struct seq_file *m) - { - struct rtw89_btc *btc = &rtwdev->btc; -- struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -- struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; -- struct rtw89_btc_fbtc_slots *pslots = NULL; -- struct rtw89_btc_fbtc_slot s; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_fbtc_slot *s; - u8 i = 0; - -- pcinfo = &pfwinfo->rpt_fbtc_slots.cinfo; -- if (!pcinfo->valid) -- return; -- -- pslots = &pfwinfo->rpt_fbtc_slots.finfo; -- - for (i = 0; i < CXST_MAX; i++) { -- s = pslots->slot[i]; -+ s = &dm->slot_now[i]; - if (i % 6 == 0) - seq_printf(m, - " %-15s : %02d[%03d/0x%x/%d]", - "[slot_list]", - (u32)i, -- s.dur, s.cxtbl, s.cxtype); -+ s->dur, s->cxtbl, s->cxtype); - else - seq_printf(m, - ", %02d[%03d/0x%x/%d]", - (u32)i, -- s.dur, s.cxtbl, s.cxtype); -+ s->dur, s->cxtbl, s->cxtype); - if (i % 6 == 5) - seq_puts(m, "\n"); - } diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-112-wifi-rtw89-coex-Packet-traffic-arbitration-hardware-.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-112-wifi-rtw89-coex-Packet-traffic-arbitration-hardware-.patch deleted file mode 100644 index 8979ff066..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-112-wifi-rtw89-coex-Packet-traffic-arbitration-hardware-.patch +++ /dev/null @@ -1,63 +0,0 @@ -From ae4e1adbb1be65cadde793239a39fa947a3ff828 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Fri, 6 Jan 2023 20:08:42 +0800 -Subject: [PATCH 112/149] wifi: rtw89: coex: Packet traffic arbitration - hardware owner monitor - -Because the difference of the hardware design, RTL8852C can not get the -PTA owner by the same method with RTL8852B, RTL8852A. Modify the get owner -API and related logic. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230106120844.17441-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 7 ++----- - drivers/net/wireless/realtek/rtw89/mac.c | 11 +++++++++-- - 2 files changed, 11 insertions(+), 7 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -4873,7 +4873,7 @@ void rtw89_btc_ntfy_init(struct rtw89_de - _write_scbd(rtwdev, - BTC_WSCB_ACTIVE | BTC_WSCB_ON | BTC_WSCB_BTLOG, true); - _update_bt_scbd(rtwdev, true); -- if (rtw89_mac_get_ctrl_path(rtwdev) && chip->chip_id == RTL8852A) { -+ if (rtw89_mac_get_ctrl_path(rtwdev)) { - rtw89_debug(rtwdev, RTW89_DBG_BTC, - "[BTC], %s(): PTA owner warning!!\n", - __func__); -@@ -7082,10 +7082,7 @@ static void _show_mreg(struct rtw89_dev - - /* To avoid I/O if WL LPS or power-off */ - if (!wl->status.map.lps && !wl->status.map.rf_off) { -- if (chip->chip_id == RTL8852A) -- btc->dm.pta_owner = rtw89_mac_get_ctrl_path(rtwdev); -- else if (chip->chip_id == RTL8852C) -- btc->dm.pta_owner = 0; -+ btc->dm.pta_owner = rtw89_mac_get_ctrl_path(rtwdev); - - _get_gnt(rtwdev, &gnt_cfg); - gnt = gnt_cfg.band[0]; ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -4865,9 +4865,16 @@ EXPORT_SYMBOL(rtw89_mac_cfg_ctrl_path_v1 - - bool rtw89_mac_get_ctrl_path(struct rtw89_dev *rtwdev) - { -- u8 val = rtw89_read8(rtwdev, R_AX_SYS_SDIO_CTRL + 3); -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ u8 val = 0; - -- return FIELD_GET(B_AX_LTE_MUX_CTRL_PATH >> 24, val); -+ if (chip->chip_id == RTL8852C) -+ return false; -+ else if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B) -+ val = rtw89_read8_mask(rtwdev, R_AX_SYS_SDIO_CTRL + 3, -+ B_AX_LTE_MUX_CTRL_PATH >> 24); -+ -+ return !!val; - } - - u16 rtw89_mac_get_plt_cnt(struct rtw89_dev *rtwdev, u8 band) diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-113-wifi-rtw89-coex-Change-RTL8852B-use-v1-TDMA-policy.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-113-wifi-rtw89-coex-Change-RTL8852B-use-v1-TDMA-policy.patch deleted file mode 100644 index 312be276f..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-113-wifi-rtw89-coex-Change-RTL8852B-use-v1-TDMA-policy.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 447a3267cbed55963bcd146ddebc72429b630dbf Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Fri, 6 Jan 2023 20:08:43 +0800 -Subject: [PATCH 113/149] wifi: rtw89: coex: Change RTL8852B use v1 TDMA policy - -RTL8852B support the new features like TDMA instant (Change TDMA mechanism -immediately), Co-RX feature (Wi-Fi/Bluetooth can RX in the same time) and -so on. The v1 TDMA policy will enable those newer mechanism. It will have -a better coexistence performance. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230106120844.17441-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2423,7 +2423,7 @@ static const struct rtw89_chip_ops rtw88 - .btc_update_bt_cnt = rtw8852b_btc_update_bt_cnt, - .btc_wl_s1_standby = rtw8852b_btc_wl_s1_standby, - .btc_set_wl_rx_gain = rtw8852b_btc_set_wl_rx_gain, -- .btc_set_policy = rtw89_btc_set_policy, -+ .btc_set_policy = rtw89_btc_set_policy_v1, - }; - - const struct rtw89_chip_info rtw8852b_chip_info = { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-114-wifi-rtw89-coex-Change-Wi-Fi-role-info-related-logic.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-114-wifi-rtw89-coex-Change-Wi-Fi-role-info-related-logic.patch deleted file mode 100644 index 16a8973ad..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-114-wifi-rtw89-coex-Change-Wi-Fi-role-info-related-logic.patch +++ /dev/null @@ -1,197 +0,0 @@ -From fbc2caf19914371973f14b6ac7ef525c49e4b1f1 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Fri, 6 Jan 2023 20:08:44 +0800 -Subject: [PATCH 114/149] wifi: rtw89: coex: Change Wi-Fi role info related - logic to version separate - -The Wi-Fi role info structure will need to H2C to firmware, firmware -need these information to do some multi-role operation. v1 add DBCC -and NOA information in the structure. And driver side also need to -put/get values at the corresponding version of structure. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230106120844.17441-8-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 39 ++++++++++++----------- - 1 file changed, 20 insertions(+), 19 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -2075,6 +2075,7 @@ static void _set_bt_afh_info(struct rtw8 - { - const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_wl_info *wl = &btc->cx.wl; - struct rtw89_btc_bt_info *bt = &btc->cx.bt; - struct rtw89_btc_bt_link_info *b = &bt->link_info; -@@ -2088,7 +2089,7 @@ static void _set_bt_afh_info(struct rtw8 - if (btc->ctrl.manual || wl->status.map.scan) - return; - -- if (chip->chip_id == RTL8852A) { -+ if (ver->fwlrole == 0) { - mode = wl_rinfo->link_mode; - connect_cnt = wl_rinfo->connect_cnt; - } else { -@@ -2107,13 +2108,13 @@ static void _set_bt_afh_info(struct rtw8 - r = &wl_rinfo->active_role[i]; - r1 = &wl_rinfo_v1->active_role_v1[i]; - -- if (chip->chip_id == RTL8852A && -+ if (ver->fwlrole == 0 && - (r->role == RTW89_WIFI_ROLE_P2P_GO || - r->role == RTW89_WIFI_ROLE_P2P_CLIENT)) { - ch = r->ch; - bw = r->bw; - break; -- } else if (chip->chip_id != RTL8852A && -+ } else if (ver->fwlrole == 1 && - (r1->role == RTW89_WIFI_ROLE_P2P_GO || - r1->role == RTW89_WIFI_ROLE_P2P_CLIENT)) { - ch = r1->ch; -@@ -2128,12 +2129,12 @@ static void _set_bt_afh_info(struct rtw8 - r = &wl_rinfo->active_role[i]; - r1 = &wl_rinfo_v1->active_role_v1[i]; - -- if (chip->chip_id == RTL8852A && -+ if (ver->fwlrole == 0 && - r->connected && r->band == RTW89_BAND_2G) { - ch = r->ch; - bw = r->bw; - break; -- } else if (chip->chip_id != RTL8852A && -+ } else if (ver->fwlrole == 1 && - r1->connected && r1->band == RTW89_BAND_2G) { - ch = r1->ch; - bw = r1->bw; -@@ -3581,8 +3582,8 @@ static void _action_wl_rfk(struct rtw89_ - - static void _set_btg_ctrl(struct rtw89_dev *rtwdev) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_wl_info *wl = &btc->cx.wl; - struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; - struct rtw89_btc_wl_role_info_v1 *wl_rinfo_v1 = &wl->role_info_v1; -@@ -3593,7 +3594,7 @@ static void _set_btg_ctrl(struct rtw89_d - if (btc->ctrl.manual) - return; - -- if (chip->chip_id == RTL8852A) -+ if (ver->fwlrole == 0) - mode = wl_rinfo->link_mode; - else - mode = wl_rinfo_v1->link_mode; -@@ -3686,8 +3687,8 @@ static void rtw89_tx_time_iter(void *dat - - static void _set_wl_tx_limit(struct rtw89_dev *rtwdev) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_cx *cx = &btc->cx; - struct rtw89_btc_dm *dm = &btc->dm; - struct rtw89_btc_wl_info *wl = &cx->wl; -@@ -3707,7 +3708,7 @@ static void _set_wl_tx_limit(struct rtw8 - if (btc->ctrl.manual) - return; - -- if (chip->chip_id == RTL8852A) -+ if (ver->fwlrole == 0) - mode = wl_rinfo->link_mode; - else - mode = wl_rinfo_v1->link_mode; -@@ -3755,8 +3756,8 @@ static void _set_wl_tx_limit(struct rtw8 - - static void _set_bt_rx_agc(struct rtw89_dev *rtwdev) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_wl_info *wl = &btc->cx.wl; - struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; - struct rtw89_btc_wl_role_info_v1 *wl_rinfo_v1 = &wl->role_info_v1; -@@ -3764,7 +3765,7 @@ static void _set_bt_rx_agc(struct rtw89_ - bool bt_hi_lna_rx = false; - u8 mode; - -- if (chip->chip_id == RTL8852A) -+ if (ver->fwlrole == 0) - mode = wl_rinfo->link_mode; - else - mode = wl_rinfo_v1->link_mode; -@@ -4628,8 +4629,8 @@ static bool _chk_wl_rfk_request(struct r - static - void _run_coex(struct rtw89_dev *rtwdev, enum btc_reason_and_action reason) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_dm *dm = &rtwdev->btc.dm; - struct rtw89_btc_cx *cx = &btc->cx; - struct rtw89_btc_wl_info *wl = &btc->cx.wl; -@@ -4644,7 +4645,7 @@ void _run_coex(struct rtw89_dev *rtwdev, - _update_dm_step(rtwdev, reason); - _update_btc_state_map(rtwdev); - -- if (chip->chip_id == RTL8852A) -+ if (ver->fwlrole == 0) - mode = wl_rinfo->link_mode; - else - mode = wl_rinfo_v1->link_mode; -@@ -4766,9 +4767,9 @@ void _run_coex(struct rtw89_dev *rtwdev, - break; - case BTC_WLINK_2G_SCC: - bt->scan_rx_low_pri = true; -- if (chip->chip_id == RTL8852A) -+ if (ver->fwlrole == 0) - _action_wl_2g_scc(rtwdev); -- else if (chip->chip_id == RTL8852C) -+ else if (ver->fwlrole == 1) - _action_wl_2g_scc_v1(rtwdev); - break; - case BTC_WLINK_2G_MCC: -@@ -5206,10 +5207,10 @@ void rtw89_btc_ntfy_role_info(struct rtw - struct rtw89_sta *rtwsta, enum btc_role_state state) - { - const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -- const struct rtw89_chip_info *chip = rtwdev->chip; - struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); - struct ieee80211_sta *sta = rtwsta_to_sta(rtwsta); - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_wl_info *wl = &btc->cx.wl; - struct rtw89_btc_wl_link_info r = {0}; - struct rtw89_btc_wl_link_info *wlinfo = NULL; -@@ -5273,7 +5274,7 @@ void rtw89_btc_ntfy_role_info(struct rtw - wlinfo = &wl->link_info[r.pid]; - - memcpy(wlinfo, &r, sizeof(*wlinfo)); -- if (chip->chip_id == RTL8852A) -+ if (ver->fwlrole == 0) - _update_wl_info(rtwdev); - else - _update_wl_info_v1(rtwdev); -@@ -5789,8 +5790,8 @@ static void _show_wl_role_info(struct rt - - static void _show_wl_info(struct rtw89_dev *rtwdev, struct seq_file *m) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_cx *cx = &btc->cx; - struct rtw89_btc_wl_info *wl = &cx->wl; - struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; -@@ -5802,7 +5803,7 @@ static void _show_wl_info(struct rtw89_d - - seq_puts(m, "========== [WL Status] ==========\n"); - -- if (chip->chip_id == RTL8852A) -+ if (ver->fwlrole == 0) - mode = wl_rinfo->link_mode; - else - mode = wl_rinfo_v1->link_mode; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-115-wifi-rtw89-fix-null-vif-pointer-when-get-management-.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-115-wifi-rtw89-fix-null-vif-pointer-when-get-management-.patch deleted file mode 100644 index 7b87de43b..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-115-wifi-rtw89-fix-null-vif-pointer-when-get-management-.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 95dafeabe477d9692154e85140eda5124895ea4f Mon Sep 17 00:00:00 2001 -From: Kuan-Chung Chen -Date: Fri, 6 Jan 2023 20:15:16 +0800 -Subject: [PATCH 115/149] wifi: rtw89: fix null vif pointer when get management - frame date rate - -When transmitting a packet that gets from ieee80211_nullfunc_get(), -the vif in tx_info->control was no assigned, which will cause -dereferencing a null pointer. - -Signed-off-by: Kuan-Chung Chen -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230106121517.19841-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -498,7 +498,8 @@ static u16 rtw89_core_get_mgmt_rate(stru - const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); - u16 lowest_rate; - -- if (tx_info->flags & IEEE80211_TX_CTL_NO_CCK_RATE || vif->p2p) -+ if (tx_info->flags & IEEE80211_TX_CTL_NO_CCK_RATE || -+ (vif && vif->p2p)) - lowest_rate = RTW89_HW_RATE_OFDM6; - else if (chan->band_type == RTW89_BAND_2G) - lowest_rate = RTW89_HW_RATE_CCK1; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-116-wifi-rtw89-set-the-correct-mac_id-for-management-fra.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-116-wifi-rtw89-set-the-correct-mac_id-for-management-fra.patch deleted file mode 100644 index 867fe3032..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-116-wifi-rtw89-set-the-correct-mac_id-for-management-fra.patch +++ /dev/null @@ -1,72 +0,0 @@ -From 877287f971b145a3699ea8466333d48aff6204e5 Mon Sep 17 00:00:00 2001 -From: Kuan-Chung Chen -Date: Fri, 6 Jan 2023 20:15:17 +0800 -Subject: [PATCH 116/149] wifi: rtw89: set the correct mac_id for management - frames - -The mac_id of management frames should follow rtwvif->mac_id or -rtwsta->mac_id. Add this patch to set the correct mac_id and -prevent unexpected behavior. - -Signed-off-by: Kuan-Chung Chen -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230106121517.19841-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 31 ++++++++++++----------- - 1 file changed, 16 insertions(+), 15 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -512,6 +512,21 @@ static u16 rtw89_core_get_mgmt_rate(stru - return __ffs(vif->bss_conf.basic_rates) + lowest_rate; - } - -+static u8 rtw89_core_tx_get_mac_id(struct rtw89_dev *rtwdev, -+ struct rtw89_core_tx_request *tx_req) -+{ -+ struct ieee80211_vif *vif = tx_req->vif; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ struct ieee80211_sta *sta = tx_req->sta; -+ struct rtw89_sta *rtwsta; -+ -+ if (!sta) -+ return rtwvif->mac_id; -+ -+ rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ return rtwsta->mac_id; -+} -+ - static void - rtw89_core_tx_update_mgmt_info(struct rtw89_dev *rtwdev, - struct rtw89_core_tx_request *tx_req) -@@ -528,6 +543,7 @@ rtw89_core_tx_update_mgmt_info(struct rt - desc_info->qsel = qsel; - desc_info->ch_dma = ch_dma; - desc_info->port = desc_info->hiq ? rtwvif->port : 0; -+ desc_info->mac_id = rtw89_core_tx_get_mac_id(rtwdev, tx_req); - desc_info->hw_ssn_sel = RTW89_MGMT_HW_SSN_SEL; - desc_info->hw_seq_mode = RTW89_MGMT_HW_SEQ_MODE; - -@@ -670,21 +686,6 @@ desc_bk: - desc_info->bk = true; - } - --static u8 rtw89_core_tx_get_mac_id(struct rtw89_dev *rtwdev, -- struct rtw89_core_tx_request *tx_req) --{ -- struct ieee80211_vif *vif = tx_req->vif; -- struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -- struct ieee80211_sta *sta = tx_req->sta; -- struct rtw89_sta *rtwsta; -- -- if (!sta) -- return rtwvif->mac_id; -- -- rtwsta = (struct rtw89_sta *)sta->drv_priv; -- return rtwsta->mac_id; --} -- - static void - rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev, - struct rtw89_core_tx_request *tx_req) diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-117-wifi-rtw89-correct-register-definitions-of-digital-C.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-117-wifi-rtw89-correct-register-definitions-of-digital-C.patch deleted file mode 100644 index 91082afae..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-117-wifi-rtw89-correct-register-definitions-of-digital-C.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 15423743ae840977fe269ff907e37e20fe1c14df Mon Sep 17 00:00:00 2001 -From: Eric Huang -Date: Fri, 13 Jan 2023 17:06:29 +0800 -Subject: [PATCH 117/149] wifi: rtw89: correct register definitions of digital - CFO and spur elimination - -This change fixes the precision of CFO and TX EVM, and it could imporve -performance in some cases. Also, use the correctted definition for 8852A. - -Signed-off-by: Eric Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230113090632.60957-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 4 ++-- - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 6 +++--- - 2 files changed, 5 insertions(+), 5 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -4102,9 +4102,9 @@ - #define R_MUIC 0x40F8 - #define B_MUIC_EN BIT(0) - #define R_DCFO 0x4264 --#define B_DCFO GENMASK(1, 0) -+#define B_DCFO GENMASK(7, 0) - #define R_SEG0CSI 0x42AC --#define B_SEG0CSI_IDX GENMASK(11, 0) -+#define B_SEG0CSI_IDX GENMASK(10, 0) - #define R_SEG0CSI_EN 0x42C4 - #define B_SEG0CSI_EN BIT(23) - #define R_BSS_CLR_MAP 0x43ac ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -1035,7 +1035,7 @@ static void rtw8852a_spur_elimination(st - 0x210); - rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, B_P1_NBIIDX_VAL, - 0x210); -- rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, 0xfff, 0x7c0); -+ rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, B_SEG0CSI_IDX, 0x7c0); - rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, - B_P0_NBIIDX_NOTCH_EN, 0x1); - rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, -@@ -1047,7 +1047,7 @@ static void rtw8852a_spur_elimination(st - 0x210); - rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, B_P1_NBIIDX_VAL, - 0x210); -- rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, 0xfff, 0x40); -+ rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, B_SEG0CSI_IDX, 0x40); - rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, - B_P0_NBIIDX_NOTCH_EN, 0x1); - rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, -@@ -1059,7 +1059,7 @@ static void rtw8852a_spur_elimination(st - 0x2d0); - rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, B_P1_NBIIDX_VAL, - 0x2d0); -- rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, 0xfff, 0x740); -+ rtw89_phy_write32_mask(rtwdev, R_SEG0CSI, B_SEG0CSI_IDX, 0x740); - rtw89_phy_write32_mask(rtwdev, R_P0_NBIIDX, - B_P0_NBIIDX_NOTCH_EN, 0x1); - rtw89_phy_write32_mask(rtwdev, R_P1_NBIIDX, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-118-wifi-rtw89-8852c-rfk-correct-ADC-clock-settings.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-118-wifi-rtw89-8852c-rfk-correct-ADC-clock-settings.patch deleted file mode 100644 index ca2f28b55..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-118-wifi-rtw89-8852c-rfk-correct-ADC-clock-settings.patch +++ /dev/null @@ -1,177 +0,0 @@ -From 3aa83062c3ec64dd757554a00653cc2d42179f12 Mon Sep 17 00:00:00 2001 -From: Chih-Kang Chang -Date: Fri, 13 Jan 2023 17:06:30 +0800 -Subject: [PATCH 118/149] wifi: rtw89: 8852c: rfk: correct ADC clock settings - -Some hardware modules don't have good RF characteristic as regular. -It could get ADC abnormal in low temperature, and it causes bad RX -performance and affects calibration result of DPK. - -Signed-off-by: Chih-Kang Chang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230113090632.60957-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 5 ++ - .../net/wireless/realtek/rtw89/rtw8852c_rfk.c | 51 ++++++++++++++----- - 2 files changed, 44 insertions(+), 12 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -4738,6 +4738,7 @@ - #define R_DRCK_FH 0xC094 - #define B_DRCK_LAT BIT(9) - #define R_DRCK 0xC0C4 -+#define B_DRCK_MUL GENMASK(21, 17) - #define B_DRCK_IDLE BIT(9) - #define B_DRCK_EN BIT(6) - #define B_DRCK_VAL GENMASK(4, 0) -@@ -4755,9 +4756,13 @@ - #define B_PATH0_SAMPL_DLY_T_MSK_V1 GENMASK(27, 26) - #define R_P0_CFCH_BW0 0xC0D4 - #define B_P0_CFCH_BW0 GENMASK(27, 26) -+#define B_P0_CFCH_EN GENMASK(14, 11) -+#define B_P0_CFCH_CTL GENMASK(10, 7) - #define R_P0_CFCH_BW1 0xC0D8 - #define B_P0_CFCH_EX BIT(13) - #define B_P0_CFCH_BW1 GENMASK(8, 5) -+#define R_ADCMOD 0xC0E8 -+#define B_ADCMOD_LP GENMASK(31, 16) - #define R_ADDCK0D 0xC0F0 - #define B_ADDCK0D_VAL2 GENMASK(31, 26) - #define B_ADDCK0D_VAL GENMASK(25, 16) ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c -@@ -11,6 +11,15 @@ - #include "rtw8852c_rfk_table.h" - #include "rtw8852c_table.h" - -+struct rxck_def { -+ u32 ctl; -+ u32 en; -+ u32 bw0; -+ u32 bw1; -+ u32 mul; -+ u32 lp; -+}; -+ - #define _TSSI_DE_MASK GENMASK(21, 12) - static const u32 _tssi_de_cck_long[RF_PATH_NUM_8852C] = {0x5858, 0x7858}; - static const u32 _tssi_de_cck_short[RF_PATH_NUM_8852C] = {0x5860, 0x7860}; -@@ -62,6 +71,10 @@ static const u32 dpk_par_regs[RTW89_DPK_ - static const u8 _dck_addr_bs[RF_PATH_NUM_8852C] = {0x0, 0x10}; - static const u8 _dck_addr[RF_PATH_NUM_8852C] = {0xc, 0x1c}; - -+static const struct rxck_def _ck480M = {0x8, 0x2, 0x3, 0xf, 0x0, 0x9}; -+static const struct rxck_def _ck960M = {0x8, 0x2, 0x2, 0x8, 0x0, 0x9}; -+static const struct rxck_def _ck1920M = {0x8, 0x0, 0x2, 0x4, 0x6, 0x9}; -+ - static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) - { - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]dbcc_en: %x, PHY%d\n", -@@ -440,6 +453,8 @@ static void rtw8852c_txck_force(struct r - static void rtw8852c_rxck_force(struct rtw89_dev *rtwdev, u8 path, bool force, - enum adc_ck ck) - { -+ const struct rxck_def *def; -+ - rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_ON, 0x0); - - if (!force) -@@ -447,6 +462,26 @@ static void rtw8852c_rxck_force(struct r - - rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_VAL, ck); - rtw89_phy_write32_mask(rtwdev, R_P0_RXCK | (path << 13), B_P0_RXCK_ON, 0x1); -+ -+ switch (ck) { -+ case ADC_480M: -+ def = &_ck480M; -+ break; -+ case ADC_960M: -+ def = &_ck960M; -+ break; -+ case ADC_1920M: -+ default: -+ def = &_ck1920M; -+ break; -+ } -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_CTL, def->ctl); -+ rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_EN, def->en); -+ rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, def->bw0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, def->bw1); -+ rtw89_phy_write32_mask(rtwdev, R_DRCK | (path << 8), B_DRCK_MUL, def->mul); -+ rtw89_phy_write32_mask(rtwdev, R_ADCMOD | (path << 8), B_ADCMOD_LP, def->lp); - } - - static bool _check_dack_done(struct rtw89_dev *rtwdev, bool s0) -@@ -630,8 +665,6 @@ static void _iqk_rxk_setting(struct rtw8 - rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_DPD_GDIS, 0x1); - rtw8852c_rxck_force(rtwdev, path, true, ADC_480M); - rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_ACK_VAL, 0x0); -- rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 + (path << 8), B_P0_CFCH_BW0, 0x3); -- rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 + (path << 8), B_P0_CFCH_BW1, 0xf); - rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1); - rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x1); - break; -@@ -639,8 +672,6 @@ static void _iqk_rxk_setting(struct rtw8 - rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_DPD_GDIS, 0x1); - rtw8852c_rxck_force(rtwdev, path, true, ADC_960M); - rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_ACK_VAL, 0x1); -- rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 + (path << 8), B_P0_CFCH_BW0, 0x2); -- rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 + (path << 8), B_P0_CFCH_BW1, 0xd); - rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1); - rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x1); - break; -@@ -648,8 +679,6 @@ static void _iqk_rxk_setting(struct rtw8 - rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_DPD_GDIS, 0x1); - rtw8852c_rxck_force(rtwdev, path, true, ADC_1920M); - rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), B_ACK_VAL, 0x2); -- rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 + (path << 8), B_P0_CFCH_BW0, 0x1); -- rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 + (path << 8), B_P0_CFCH_BW1, 0xb); - rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1); - rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x1); - break; -@@ -1413,8 +1442,6 @@ static void _iqk_macbb_setting(struct rt - rtw8852c_rxck_force(rtwdev, path, true, ADC_1920M); - rtw89_phy_write32_mask(rtwdev, R_UPD_CLK | (path << 13), B_ACK_VAL, 0x2); - -- rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 | (path << 8), B_P0_CFCH_BW0, 0x1); -- rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 | (path << 8), B_P0_CFCH_BW1, 0xb); - rtw89_phy_write32_mask(rtwdev, R_P0_NRBW | (path << 13), B_P0_NRBW_DBG, 0x1); - rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x1f); - rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, B_ANAPAR_PW15, 0x13); -@@ -1760,7 +1787,7 @@ u8 _rx_dck_channel_calc(struct rtw89_dev - #define RTW8852C_DPK_VER 0xf - #define RTW8852C_DPK_TH_AVG_NUM 4 - #define RTW8852C_DPK_RF_PATH 2 --#define RTW8852C_DPK_KIP_REG_NUM 5 -+#define RTW8852C_DPK_KIP_REG_NUM 7 - #define RTW8852C_DPK_RXSRAM_DBG 0 - - enum rtw8852c_dpk_id { -@@ -1919,8 +1946,6 @@ static void _dpk_bb_afe_setting(struct r - - /*4. Set ADC clk*/ - rtw8852c_rxck_force(rtwdev, path, true, ADC_1920M); -- rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0 + (path << 8), B_P0_CFCH_BW0, 0x1); -- rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1 + (path << 8), B_P0_CFCH_BW1, 0xb); - rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), - B_P0_NRBW_DBG, 0x1); - rtw89_phy_write32_mask(rtwdev, R_ANAPAR_PW15, MASKBYTE3, 0x1f); -@@ -2671,12 +2696,14 @@ static void _dpk_cal_select(struct rtw89 - enum rtw89_phy_idx phy, u8 kpath) - { - struct rtw89_dpk_info *dpk = &rtwdev->dpk; -- static const u32 kip_reg[] = {0x813c, 0x8124, 0x8120, 0xc0d4, 0xc0d8}; -+ static const u32 kip_reg[] = {0x813c, 0x8124, 0x8120, 0xc0c4, 0xc0e8, 0xc0d4, 0xc0d8}; - u32 backup_rf_val[RTW8852C_DPK_RF_PATH][BACKUP_RF_REGS_NR]; - u32 kip_bkup[RTW8852C_DPK_RF_PATH][RTW8852C_DPK_KIP_REG_NUM] = {}; - u8 path; - bool is_fail = true, reloaded[RTW8852C_DPK_RF_PATH] = {false}; - -+ static_assert(ARRAY_SIZE(kip_reg) == RTW8852C_DPK_KIP_REG_NUM); -+ - if (dpk->is_dpk_reload_en) { - for (path = 0; path < RTW8852C_DPK_RF_PATH; path++) { - if (!(kpath & BIT(path))) diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-119-wifi-rtw89-fix-assignation-of-TX-BD-RAM-table.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-119-wifi-rtw89-fix-assignation-of-TX-BD-RAM-table.patch deleted file mode 100644 index 0ec8e2793..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-119-wifi-rtw89-fix-assignation-of-TX-BD-RAM-table.patch +++ /dev/null @@ -1,139 +0,0 @@ -From 7f495de6ae7d31f098970fb45a038c9f69b1bf75 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Fri, 13 Jan 2023 17:06:31 +0800 -Subject: [PATCH 119/149] wifi: rtw89: fix assignation of TX BD RAM table - -TX BD's RAM table describes how HW allocates usable buffer section -for each TX channel at fetch time. The total RAM size for TX BD is -chip-dependent. For 8852BE, it has only half size (32) for TX channels -of single band. Original table arrange total size (64) for dual band. -It will overflow on 8852BE circuit and cause section conflicts between -different TX channels. - -So, we do the changes below. -* add another table for single band chip and export both kind of tables -* point to the expected one in rtw89_pci_info by chip - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230113090632.60957-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/pci.c | 15 ++++++++++++++- - drivers/net/wireless/realtek/rtw89/pci.h | 15 +++++++++------ - drivers/net/wireless/realtek/rtw89/rtw8852ae.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852be.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852ce.c | 1 + - 5 files changed, 26 insertions(+), 7 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/pci.c -+++ b/drivers/net/wireless/realtek/rtw89/pci.c -@@ -1384,7 +1384,7 @@ static int rtw89_pci_ops_tx_write(struct - return 0; - } - --static const struct rtw89_pci_bd_ram bd_ram_table[RTW89_TXCH_NUM] = { -+const struct rtw89_pci_bd_ram rtw89_bd_ram_table_dual[RTW89_TXCH_NUM] = { - [RTW89_TXCH_ACH0] = {.start_idx = 0, .max_num = 5, .min_num = 2}, - [RTW89_TXCH_ACH1] = {.start_idx = 5, .max_num = 5, .min_num = 2}, - [RTW89_TXCH_ACH2] = {.start_idx = 10, .max_num = 5, .min_num = 2}, -@@ -1399,11 +1399,24 @@ static const struct rtw89_pci_bd_ram bd_ - [RTW89_TXCH_CH11] = {.start_idx = 55, .max_num = 5, .min_num = 1}, - [RTW89_TXCH_CH12] = {.start_idx = 60, .max_num = 4, .min_num = 1}, - }; -+EXPORT_SYMBOL(rtw89_bd_ram_table_dual); -+ -+const struct rtw89_pci_bd_ram rtw89_bd_ram_table_single[RTW89_TXCH_NUM] = { -+ [RTW89_TXCH_ACH0] = {.start_idx = 0, .max_num = 5, .min_num = 2}, -+ [RTW89_TXCH_ACH1] = {.start_idx = 5, .max_num = 5, .min_num = 2}, -+ [RTW89_TXCH_ACH2] = {.start_idx = 10, .max_num = 5, .min_num = 2}, -+ [RTW89_TXCH_ACH3] = {.start_idx = 15, .max_num = 5, .min_num = 2}, -+ [RTW89_TXCH_CH8] = {.start_idx = 20, .max_num = 4, .min_num = 1}, -+ [RTW89_TXCH_CH9] = {.start_idx = 24, .max_num = 4, .min_num = 1}, -+ [RTW89_TXCH_CH12] = {.start_idx = 28, .max_num = 4, .min_num = 1}, -+}; -+EXPORT_SYMBOL(rtw89_bd_ram_table_single); - - static void rtw89_pci_reset_trx_rings(struct rtw89_dev *rtwdev) - { - struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; - const struct rtw89_pci_info *info = rtwdev->pci_info; -+ const struct rtw89_pci_bd_ram *bd_ram_table = *info->bd_ram_table; - struct rtw89_pci_tx_ring *tx_ring; - struct rtw89_pci_rx_ring *rx_ring; - struct rtw89_pci_dma_ring *bd_ring; ---- a/drivers/net/wireless/realtek/rtw89/pci.h -+++ b/drivers/net/wireless/realtek/rtw89/pci.h -@@ -750,6 +750,12 @@ struct rtw89_pci_ch_dma_addr_set { - struct rtw89_pci_ch_dma_addr rx[RTW89_RXCH_NUM]; - }; - -+struct rtw89_pci_bd_ram { -+ u8 start_idx; -+ u8 max_num; -+ u8 min_num; -+}; -+ - struct rtw89_pci_info { - enum mac_ax_bd_trunc_mode txbd_trunc_mode; - enum mac_ax_bd_trunc_mode rxbd_trunc_mode; -@@ -785,6 +791,7 @@ struct rtw89_pci_info { - u32 tx_dma_ch_mask; - const struct rtw89_pci_bd_idx_addr *bd_idx_addr_low_power; - const struct rtw89_pci_ch_dma_addr_set *dma_addr_set; -+ const struct rtw89_pci_bd_ram (*bd_ram_table)[RTW89_TXCH_NUM]; - - int (*ltr_set)(struct rtw89_dev *rtwdev, bool en); - u32 (*fill_txaddr_info)(struct rtw89_dev *rtwdev, -@@ -798,12 +805,6 @@ struct rtw89_pci_info { - struct rtw89_pci_isrs *isrs); - }; - --struct rtw89_pci_bd_ram { -- u8 start_idx; -- u8 max_num; -- u8 min_num; --}; -- - struct rtw89_pci_tx_data { - dma_addr_t dma; - }; -@@ -1057,6 +1058,8 @@ static inline bool rtw89_pci_ltr_is_err_ - extern const struct dev_pm_ops rtw89_pm_ops; - extern const struct rtw89_pci_ch_dma_addr_set rtw89_pci_ch_dma_addr_set; - extern const struct rtw89_pci_ch_dma_addr_set rtw89_pci_ch_dma_addr_set_v1; -+extern const struct rtw89_pci_bd_ram rtw89_bd_ram_table_dual[RTW89_TXCH_NUM]; -+extern const struct rtw89_pci_bd_ram rtw89_bd_ram_table_single[RTW89_TXCH_NUM]; - - struct pci_device_id; - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852ae.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852ae.c -@@ -44,6 +44,7 @@ static const struct rtw89_pci_info rtw88 - .tx_dma_ch_mask = 0, - .bd_idx_addr_low_power = NULL, - .dma_addr_set = &rtw89_pci_ch_dma_addr_set, -+ .bd_ram_table = &rtw89_bd_ram_table_dual, - - .ltr_set = rtw89_pci_ltr_set, - .fill_txaddr_info = rtw89_pci_fill_txaddr_info, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852be.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852be.c -@@ -46,6 +46,7 @@ static const struct rtw89_pci_info rtw88 - BIT(RTW89_TXCH_CH10) | BIT(RTW89_TXCH_CH11), - .bd_idx_addr_low_power = NULL, - .dma_addr_set = &rtw89_pci_ch_dma_addr_set, -+ .bd_ram_table = &rtw89_bd_ram_table_single, - - .ltr_set = rtw89_pci_ltr_set, - .fill_txaddr_info = rtw89_pci_fill_txaddr_info, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852ce.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852ce.c -@@ -53,6 +53,7 @@ static const struct rtw89_pci_info rtw88 - .tx_dma_ch_mask = 0, - .bd_idx_addr_low_power = &rtw8852c_bd_idx_addr_low_power, - .dma_addr_set = &rtw89_pci_ch_dma_addr_set_v1, -+ .bd_ram_table = &rtw89_bd_ram_table_dual, - - .ltr_set = rtw89_pci_ltr_set_v1, - .fill_txaddr_info = rtw89_pci_fill_txaddr_info_v1, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-120-wifi-rtw89-8852b-fill-the-missing-configuration-abou.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-120-wifi-rtw89-8852b-fill-the-missing-configuration-abou.patch deleted file mode 100644 index 328f88314..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-120-wifi-rtw89-8852b-fill-the-missing-configuration-abou.patch +++ /dev/null @@ -1,29 +0,0 @@ -From a3edb20146f000dfd5aba1f17e2dc0f363ff9446 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Fri, 13 Jan 2023 17:06:32 +0800 -Subject: [PATCH 120/149] wifi: rtw89: 8852b: fill the missing configuration - about queue empty checking - -The configurations, wde_qempty_acq_num and wde_qempty_mgq_sel, are used -when MAC checks if TX queues are empty. Fill the corresponding setting -for 8852B. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230113090632.60957-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2437,6 +2437,8 @@ const struct rtw89_chip_info rtw8852b_ch - .rsvd_ple_ofst = 0x2f800, - .hfc_param_ini = rtw8852b_hfc_param_ini_pcie, - .dle_mem = rtw8852b_dle_mem_pcie, -+ .wde_qempty_acq_num = 4, -+ .wde_qempty_mgq_sel = 4, - .rf_base_addr = {0xe000, 0xf000}, - .pwr_on_seq = NULL, - .pwr_off_seq = NULL, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-121-wifi-rtw89-coex-Update-Wi-Fi-external-control-TDMA-p.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-121-wifi-rtw89-coex-Update-Wi-Fi-external-control-TDMA-p.patch deleted file mode 100644 index 937364ce7..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-121-wifi-rtw89-coex-Update-Wi-Fi-external-control-TDMA-p.patch +++ /dev/null @@ -1,112 +0,0 @@ -From 1742fbae7a49b067649b7c2958d9468711149e37 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 17 Jan 2023 19:41:02 +0800 -Subject: [PATCH 121/149] wifi: rtw89: coex: Update Wi-Fi external control TDMA - parameters/tables - -This patch update the external control (Wi-Fi firmware control) type of -TDMA related parameters, almost all of these case were related to Wi-Fi -multi-role situations & AP mode. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230117114109.4298-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 37 +++++++++++++++-------- - 1 file changed, 24 insertions(+), 13 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -63,7 +63,7 @@ struct btc_fbtc_1slot { - static const struct rtw89_btc_fbtc_tdma t_def[] = { - [CXTD_OFF] = { CXTDMA_OFF, CXFLC_OFF, CXTPS_OFF, 0, 0, 0, 0, 0}, - [CXTD_OFF_B2] = { CXTDMA_OFF, CXFLC_OFF, CXTPS_OFF, 0, 0, 1, 0, 0}, -- [CXTD_OFF_EXT] = { CXTDMA_OFF, CXFLC_OFF, CXTPS_OFF, 0, 0, 3, 0, 0}, -+ [CXTD_OFF_EXT] = { CXTDMA_OFF, CXFLC_OFF, CXTPS_OFF, 0, 0, 2, 0, 0}, - [CXTD_FIX] = { CXTDMA_FIX, CXFLC_OFF, CXTPS_OFF, 0, 0, 0, 0, 0}, - [CXTD_PFIX] = { CXTDMA_FIX, CXFLC_NULLP, CXTPS_ON, 0, 5, 0, 0, 0}, - [CXTD_AUTO] = { CXTDMA_AUTO, CXFLC_OFF, CXTPS_OFF, 0, 0, 0, 0, 0}, -@@ -80,21 +80,21 @@ static const struct rtw89_btc_fbtc_slot - [CXST_OFF] = __DEF_FBTC_SLOT(100, 0x55555555, SLOT_MIX), - [CXST_B2W] = __DEF_FBTC_SLOT(5, 0xea5a5a5a, SLOT_ISO), - [CXST_W1] = __DEF_FBTC_SLOT(70, 0xea5a5a5a, SLOT_ISO), -- [CXST_W2] = __DEF_FBTC_SLOT(70, 0xea5a5aaa, SLOT_ISO), -+ [CXST_W2] = __DEF_FBTC_SLOT(15, 0xea5a5a5a, SLOT_ISO), - [CXST_W2B] = __DEF_FBTC_SLOT(15, 0xea5a5a5a, SLOT_ISO), -- [CXST_B1] = __DEF_FBTC_SLOT(100, 0xe5555555, SLOT_MIX), -+ [CXST_B1] = __DEF_FBTC_SLOT(250, 0xe5555555, SLOT_MIX), - [CXST_B2] = __DEF_FBTC_SLOT(7, 0xea5a5a5a, SLOT_MIX), - [CXST_B3] = __DEF_FBTC_SLOT(5, 0xe5555555, SLOT_MIX), - [CXST_B4] = __DEF_FBTC_SLOT(50, 0xe5555555, SLOT_MIX), - [CXST_LK] = __DEF_FBTC_SLOT(20, 0xea5a5a5a, SLOT_ISO), -- [CXST_BLK] = __DEF_FBTC_SLOT(250, 0x55555555, SLOT_MIX), -- [CXST_E2G] = __DEF_FBTC_SLOT(20, 0xea5a5a5a, SLOT_MIX), -- [CXST_E5G] = __DEF_FBTC_SLOT(20, 0xffffffff, SLOT_MIX), -- [CXST_EBT] = __DEF_FBTC_SLOT(20, 0xe5555555, SLOT_MIX), -- [CXST_ENULL] = __DEF_FBTC_SLOT(7, 0xaaaaaaaa, SLOT_ISO), -+ [CXST_BLK] = __DEF_FBTC_SLOT(500, 0x55555555, SLOT_MIX), -+ [CXST_E2G] = __DEF_FBTC_SLOT(0, 0xea5a5a5a, SLOT_MIX), -+ [CXST_E5G] = __DEF_FBTC_SLOT(0, 0xffffffff, SLOT_ISO), -+ [CXST_EBT] = __DEF_FBTC_SLOT(0, 0xe5555555, SLOT_MIX), -+ [CXST_ENULL] = __DEF_FBTC_SLOT(0, 0xaaaaaaaa, SLOT_ISO), - [CXST_WLK] = __DEF_FBTC_SLOT(250, 0xea5a5a5a, SLOT_MIX), -- [CXST_W1FDD] = __DEF_FBTC_SLOT(35, 0xfafafafa, SLOT_ISO), -- [CXST_B1FDD] = __DEF_FBTC_SLOT(100, 0xffffffff, SLOT_MIX), -+ [CXST_W1FDD] = __DEF_FBTC_SLOT(50, 0xffffffff, SLOT_ISO), -+ [CXST_B1FDD] = __DEF_FBTC_SLOT(50, 0xffffdfff, SLOT_ISO), - }; - - static const u32 cxtbl[] = { -@@ -117,7 +117,12 @@ static const u32 cxtbl[] = { - 0xfafafafa, /* 16 */ - 0xffffddff, /* 17 */ - 0xdaffdaff, /* 18 */ -- 0xfafadafa /* 19 */ -+ 0xfafadafa, /* 19 */ -+ 0xea6a6a6a, /* 20 */ -+ 0xea55556a, /* 21 */ -+ 0xaafafafa, /* 22 */ -+ 0xfafaaafa, /* 23 */ -+ 0xfafffaff /* 24 */ - }; - - static const struct rtw89_btc_ver rtw89_btc_ver_defs[] = { -@@ -2701,15 +2706,16 @@ void rtw89_btc_set_policy_v1(struct rtw8 - break; - case BTC_CXP_OFF_EQ0: - _slot_set_tbl(btc, CXST_OFF, cxtbl[0]); -+ _slot_set_type(btc, CXST_OFF, SLOT_ISO); - break; - case BTC_CXP_OFF_EQ1: - _slot_set_tbl(btc, CXST_OFF, cxtbl[16]); - break; - case BTC_CXP_OFF_EQ2: -- _slot_set_tbl(btc, CXST_OFF, cxtbl[17]); -+ _slot_set_tbl(btc, CXST_OFF, cxtbl[0]); - break; - case BTC_CXP_OFF_EQ3: -- _slot_set_tbl(btc, CXST_OFF, cxtbl[18]); -+ _slot_set_tbl(btc, CXST_OFF, cxtbl[24]); - break; - case BTC_CXP_OFF_BWB0: - _slot_set_tbl(btc, CXST_OFF, cxtbl[5]); -@@ -2765,6 +2771,7 @@ void rtw89_btc_set_policy_v1(struct rtw8 - default: - break; - } -+ s[CXST_OFF] = s_def[CXST_OFF]; - break; - case BTC_CXP_FIX: /* TDMA Fix-Slot */ - _write_scbd(rtwdev, BTC_WSCB_TDMA, true); -@@ -2791,6 +2798,10 @@ void rtw89_btc_set_policy_v1(struct rtw8 - _slot_set(btc, CXST_W1, 40, cxtbl[1], SLOT_ISO); - _slot_set(btc, CXST_B1, 10, tbl_b1, SLOT_MIX); - break; -+ case BTC_CXP_FIX_TD4020: -+ _slot_set(btc, CXST_W1, 40, cxtbl[1], SLOT_MIX); -+ _slot_set(btc, CXST_B1, 20, tbl_b1, SLOT_MIX); -+ break; - case BTC_CXP_FIX_TD7010: - _slot_set(btc, CXST_W1, 70, tbl_w1, SLOT_ISO); - _slot_set(btc, CXST_B1, 10, tbl_b1, SLOT_MIX); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-122-wifi-rtw89-coex-Clear-Bluetooth-HW-PTA-counter-when-.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-122-wifi-rtw89-coex-Clear-Bluetooth-HW-PTA-counter-when-.patch deleted file mode 100644 index d86935985..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-122-wifi-rtw89-coex-Clear-Bluetooth-HW-PTA-counter-when-.patch +++ /dev/null @@ -1,37 +0,0 @@ -From aae256c0f2334691645d52e7cc965bf4241b599b Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 17 Jan 2023 19:41:03 +0800 -Subject: [PATCH 122/149] wifi: rtw89: coex: Clear Bluetooth HW PTA counter - when radio state change - -Reset the counter no matter Wi-Fi is notified turning into power save or -not. With rest the counter coexistence will recognize Bluetooth is hanged -easily. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230117114109.4298-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -5335,7 +5335,6 @@ void rtw89_btc_ntfy_radio_state(struct r - } - - if (rf_state == BTC_RFCTRL_WL_ON) { -- btc->dm.cnt_dm[BTC_DCNT_BTCNT_FREEZE] = 0; - rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_MREG, true); - val = BTC_WSCB_ACTIVE | BTC_WSCB_ON | BTC_WSCB_BTLOG; - _write_scbd(rtwdev, val, true); -@@ -5347,6 +5346,8 @@ void rtw89_btc_ntfy_radio_state(struct r - _write_scbd(rtwdev, BTC_WSCB_ALL, false); - } - -+ btc->dm.cnt_dm[BTC_DCNT_BTCNT_FREEZE] = 0; -+ - _run_coex(rtwdev, BTC_RSN_NTFY_RADIO_STATE); - - wl->status.map.rf_off_pre = wl->status.map.rf_off; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-123-wifi-rtw89-coex-Force-to-update-TDMA-parameter-when-.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-123-wifi-rtw89-coex-Force-to-update-TDMA-parameter-when-.patch deleted file mode 100644 index 668da7e5f..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-123-wifi-rtw89-coex-Force-to-update-TDMA-parameter-when-.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 3f857b23dd8dae2c7301476e8e183628edc694d1 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 17 Jan 2023 19:41:04 +0800 -Subject: [PATCH 123/149] wifi: rtw89: coex: Force to update TDMA parameter - when radio state change - -Force firmware to update TDMA parameter when enter/exit power saving. -The TDMA instant feature will make firmware force update TDMA parameter -immediately when the TDMA parameter H2C to firmware. Without this feature, -it will have a low fail rate trigger Bluetooth audio sound glitch when -Wi-Fi is under power saving. Or Wi-Fi fail to turn in to power save state. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230117114109.4298-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 6 ++++++ - 1 file changed, 6 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -3818,6 +3818,7 @@ static void _action_common(struct rtw89_ - wl->scbd_change = false; - btc->cx.cnt_wl[BTC_WCNT_SCBDUPDATE]++; - } -+ btc->dm.tdma_instant_excute = 0; - } - - static void _action_by_bt(struct rtw89_dev *rtwdev) -@@ -5347,6 +5348,11 @@ void rtw89_btc_ntfy_radio_state(struct r - } - - btc->dm.cnt_dm[BTC_DCNT_BTCNT_FREEZE] = 0; -+ if (wl->status.map.lps_pre == BTC_LPS_OFF && -+ wl->status.map.lps_pre != wl->status.map.lps) -+ btc->dm.tdma_instant_excute = 1; -+ else -+ btc->dm.tdma_instant_excute = 0; - - _run_coex(rtwdev, BTC_RSN_NTFY_RADIO_STATE); - diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-124-wifi-rtw89-coex-Refine-coexistence-log.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-124-wifi-rtw89-coex-Refine-coexistence-log.patch deleted file mode 100644 index 01b859d1b..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-124-wifi-rtw89-coex-Refine-coexistence-log.patch +++ /dev/null @@ -1,281 +0,0 @@ -From 7cd8200555d4f01183f0b9071e0760c389a51816 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 17 Jan 2023 19:41:05 +0800 -Subject: [PATCH 124/149] wifi: rtw89: coex: Refine coexistence log - -Adjust the log format and correct variable reference to make the log -more readable. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230117114109.4298-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 158 +++++++++++----------- - 1 file changed, 76 insertions(+), 82 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -6401,20 +6401,21 @@ static void _show_fbtc_slots(struct rtw8 - - for (i = 0; i < CXST_MAX; i++) { - s = &dm->slot_now[i]; -- if (i % 6 == 0) -+ if (i % 5 == 0) - seq_printf(m, -- " %-15s : %02d[%03d/0x%x/%d]", -+ " %-15s : %5s[%03d/0x%x/%d]", - "[slot_list]", -- (u32)i, -+ id_to_slot((u32)i), - s->dur, s->cxtbl, s->cxtype); - else - seq_printf(m, -- ", %02d[%03d/0x%x/%d]", -- (u32)i, -+ ", %5s[%03d/0x%x/%d]", -+ id_to_slot((u32)i), - s->dur, s->cxtbl, s->cxtype); -- if (i % 6 == 5) -+ if (i % 5 == 4) - seq_puts(m, "\n"); - } -+ seq_puts(m, "\n"); - } - - static void _show_fbtc_cysta_v2(struct rtw89_dev *rtwdev, struct seq_file *m) -@@ -6446,7 +6447,7 @@ static void _show_fbtc_cysta_v2(struct r - for (i = 0; i < CXST_MAX; i++) { - if (!le32_to_cpu(pcysta_le32->slot_cnt[i])) - continue; -- seq_printf(m, ", %d:%d", (u32)i, -+ seq_printf(m, ", %s:%d", id_to_slot((u32)i), - le32_to_cpu(pcysta_le32->slot_cnt[i])); - } - -@@ -6481,7 +6482,7 @@ static void _show_fbtc_cysta_v2(struct r - le16_to_cpu(pcysta_le32->tmaxdiff_cycle[CXT_WL]), - le16_to_cpu(pcysta_le32->tmaxdiff_cycle[CXT_BT])); - -- if (le16_to_cpu(pcysta_le32->cycles) == 0) -+ if (le16_to_cpu(pcysta_le32->cycles) <= 1) - return; - - /* 1 cycle record 1 wl-slot and 1 bt-slot */ -@@ -6608,7 +6609,7 @@ static void _show_fbtc_cysta_v3(struct r - le16_to_cpu(pcysta->cycle_time.tmaxdiff[CXT_BT])); - - cycle = le16_to_cpu(pcysta->cycles); -- if (cycle == 0) -+ if (cycle <= 1) - return; - - /* 1 cycle record 1 wl-slot and 1 bt-slot */ -@@ -6630,40 +6631,39 @@ static void _show_fbtc_cysta_v3(struct r - cnt++; - store_index = ((cycle - 1) % slot_pair) * 2; - -- if (cnt % divide_cnt == 1) { -- seq_printf(m, "\n\r %-15s : ", "[cycle_step]"); -- } else { -- seq_printf(m, "->b%02d", -- le16_to_cpu(pcysta->slot_step_time[store_index])); -- if (a2dp->exist) { -- a2dp_trx = &pcysta->a2dp_trx[store_index]; -- seq_printf(m, "(%d/%d/%dM/%d/%d/%d)", -- a2dp_trx->empty_cnt, -- a2dp_trx->retry_cnt, -- a2dp_trx->tx_rate ? 3 : 2, -- a2dp_trx->tx_cnt, -- a2dp_trx->ack_cnt, -- a2dp_trx->nack_cnt); -- } -- seq_printf(m, "->w%02d", -- le16_to_cpu(pcysta->slot_step_time[store_index + 1])); -- if (a2dp->exist) { -- a2dp_trx = &pcysta->a2dp_trx[store_index + 1]; -- seq_printf(m, "(%d/%d/%dM/%d/%d/%d)", -- a2dp_trx->empty_cnt, -- a2dp_trx->retry_cnt, -- a2dp_trx->tx_rate ? 3 : 2, -- a2dp_trx->tx_cnt, -- a2dp_trx->ack_cnt, -- a2dp_trx->nack_cnt); -- } -+ if (cnt % divide_cnt == 1) -+ seq_printf(m, " %-15s : ", "[cycle_step]"); -+ -+ seq_printf(m, "->b%02d", -+ le16_to_cpu(pcysta->slot_step_time[store_index])); -+ if (a2dp->exist) { -+ a2dp_trx = &pcysta->a2dp_trx[store_index]; -+ seq_printf(m, "(%d/%d/%dM/%d/%d/%d)", -+ a2dp_trx->empty_cnt, -+ a2dp_trx->retry_cnt, -+ a2dp_trx->tx_rate ? 3 : 2, -+ a2dp_trx->tx_cnt, -+ a2dp_trx->ack_cnt, -+ a2dp_trx->nack_cnt); - } -- if (cnt % (BTC_CYCLE_SLOT_MAX / 4) == 0 || cnt == c_end) -+ seq_printf(m, "->w%02d", -+ le16_to_cpu(pcysta->slot_step_time[store_index + 1])); -+ if (a2dp->exist) { -+ a2dp_trx = &pcysta->a2dp_trx[store_index + 1]; -+ seq_printf(m, "(%d/%d/%dM/%d/%d/%d)", -+ a2dp_trx->empty_cnt, -+ a2dp_trx->retry_cnt, -+ a2dp_trx->tx_rate ? 3 : 2, -+ a2dp_trx->tx_cnt, -+ a2dp_trx->ack_cnt, -+ a2dp_trx->nack_cnt); -+ } -+ if (cnt % divide_cnt == 0 || cnt == c_end) - seq_puts(m, "\n"); - } - - if (a2dp->exist) { -- seq_printf(m, "%-15s : a2dp_ept:%d, a2dp_late:%d", -+ seq_printf(m, " %-15s : a2dp_ept:%d, a2dp_late:%d", - "[a2dp_t_sta]", - le16_to_cpu(pcysta->a2dp_ept.cnt), - le16_to_cpu(pcysta->a2dp_ept.cnt_timeout)); -@@ -6741,7 +6741,7 @@ static void _show_fbtc_cysta_v4(struct r - le16_to_cpu(pcysta->cycle_time.tmaxdiff[CXT_BT])); - - cycle = le16_to_cpu(pcysta->cycles); -- if (cycle == 0) -+ if (cycle <= 1) - return; - - /* 1 cycle record 1 wl-slot and 1 bt-slot */ -@@ -6763,40 +6763,39 @@ static void _show_fbtc_cysta_v4(struct r - cnt++; - store_index = ((cycle - 1) % slot_pair) * 2; - -- if (cnt % divide_cnt == 1) { -- seq_printf(m, "\n\r %-15s : ", "[cycle_step]"); -- } else { -- seq_printf(m, "->b%02d", -- le16_to_cpu(pcysta->slot_step_time[store_index])); -- if (a2dp->exist) { -- a2dp_trx = &pcysta->a2dp_trx[store_index]; -- seq_printf(m, "(%d/%d/%dM/%d/%d/%d)", -- a2dp_trx->empty_cnt, -- a2dp_trx->retry_cnt, -- a2dp_trx->tx_rate ? 3 : 2, -- a2dp_trx->tx_cnt, -- a2dp_trx->ack_cnt, -- a2dp_trx->nack_cnt); -- } -- seq_printf(m, "->w%02d", -- le16_to_cpu(pcysta->slot_step_time[store_index + 1])); -- if (a2dp->exist) { -- a2dp_trx = &pcysta->a2dp_trx[store_index + 1]; -- seq_printf(m, "(%d/%d/%dM/%d/%d/%d)", -- a2dp_trx->empty_cnt, -- a2dp_trx->retry_cnt, -- a2dp_trx->tx_rate ? 3 : 2, -- a2dp_trx->tx_cnt, -- a2dp_trx->ack_cnt, -- a2dp_trx->nack_cnt); -- } -+ if (cnt % divide_cnt == 1) -+ seq_printf(m, " %-15s : ", "[cycle_step]"); -+ -+ seq_printf(m, "->b%02d", -+ le16_to_cpu(pcysta->slot_step_time[store_index])); -+ if (a2dp->exist) { -+ a2dp_trx = &pcysta->a2dp_trx[store_index]; -+ seq_printf(m, "(%d/%d/%dM/%d/%d/%d)", -+ a2dp_trx->empty_cnt, -+ a2dp_trx->retry_cnt, -+ a2dp_trx->tx_rate ? 3 : 2, -+ a2dp_trx->tx_cnt, -+ a2dp_trx->ack_cnt, -+ a2dp_trx->nack_cnt); - } -- if (cnt % (BTC_CYCLE_SLOT_MAX / 4) == 0 || cnt == c_end) -+ seq_printf(m, "->w%02d", -+ le16_to_cpu(pcysta->slot_step_time[store_index + 1])); -+ if (a2dp->exist) { -+ a2dp_trx = &pcysta->a2dp_trx[store_index + 1]; -+ seq_printf(m, "(%d/%d/%dM/%d/%d/%d)", -+ a2dp_trx->empty_cnt, -+ a2dp_trx->retry_cnt, -+ a2dp_trx->tx_rate ? 3 : 2, -+ a2dp_trx->tx_cnt, -+ a2dp_trx->ack_cnt, -+ a2dp_trx->nack_cnt); -+ } -+ if (cnt % divide_cnt == 0 || cnt == c_end) - seq_puts(m, "\n"); - } - - if (a2dp->exist) { -- seq_printf(m, "%-15s : a2dp_ept:%d, a2dp_late:%d", -+ seq_printf(m, " %-15s : a2dp_ept:%d, a2dp_late:%d", - "[a2dp_t_sta]", - le16_to_cpu(pcysta->a2dp_ept.cnt), - le16_to_cpu(pcysta->a2dp_ept.cnt_timeout)); -@@ -6827,13 +6826,9 @@ static void _show_fbtc_nullsta(struct rt - - ns = &pfwinfo->rpt_fbtc_nullsta.finfo; - if (ver->fcxnullsta == 1) { -- seq_printf(m, " %-15s : ", "[null_sta]"); -- - for (i = 0; i < 2; i++) { -- if (i != 0) -- seq_printf(m, ", null-%d", i); -- else -- seq_printf(m, "null-%d", i); -+ seq_printf(m, " %-15s : ", "[NULL-STA]"); -+ seq_printf(m, "null-%d", i); - seq_printf(m, "[ok:%d/", - le32_to_cpu(ns->v1.result[i][1])); - seq_printf(m, "fail:%d/", -@@ -6845,17 +6840,14 @@ static void _show_fbtc_nullsta(struct rt - seq_printf(m, "avg_t:%d.%03d/", - le32_to_cpu(ns->v1.avg_t[i]) / 1000, - le32_to_cpu(ns->v1.avg_t[i]) % 1000); -- seq_printf(m, "max_t:%d.%03d]", -+ seq_printf(m, "max_t:%d.%03d]\n", - le32_to_cpu(ns->v1.max_t[i]) / 1000, - le32_to_cpu(ns->v1.max_t[i]) % 1000); - } - } else { -- seq_printf(m, " %-15s : ", "[null_sta]"); - for (i = 0; i < 2; i++) { -- if (i != 0) -- seq_printf(m, ", null-%d", i); -- else -- seq_printf(m, "null-%d", i); -+ seq_printf(m, " %-15s : ", "[NULL-STA]"); -+ seq_printf(m, "null-%d", i); - seq_printf(m, "[Tx:%d/", - le32_to_cpu(ns->v2.result[i][4])); - seq_printf(m, "[ok:%d/", -@@ -6869,12 +6861,11 @@ static void _show_fbtc_nullsta(struct rt - seq_printf(m, "avg_t:%d.%03d/", - le32_to_cpu(ns->v2.avg_t[i]) / 1000, - le32_to_cpu(ns->v2.avg_t[i]) % 1000); -- seq_printf(m, "max_t:%d.%03d]", -+ seq_printf(m, "max_t:%d.%03d]\n", - le32_to_cpu(ns->v2.max_t[i]) / 1000, - le32_to_cpu(ns->v2.max_t[i]) % 1000); - } - } -- seq_puts(m, "\n"); - } - - static void _show_fbtc_step_v2(struct rtw89_dev *rtwdev, struct seq_file *m) -@@ -7147,6 +7138,9 @@ static void _show_mreg(struct rtw89_dev - if (cnt % 6 == 5) - seq_puts(m, "\n"); - cnt++; -+ -+ if (i >= pmreg->reg_num) -+ seq_puts(m, "\n"); - } - - pcinfo = &pfwinfo->rpt_fbtc_gpio_dbg.cinfo; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-125-wifi-rtw89-coex-Set-Bluetooth-background-scan-PTA-re.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-125-wifi-rtw89-coex-Set-Bluetooth-background-scan-PTA-re.patch deleted file mode 100644 index fa46554c5..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-125-wifi-rtw89-coex-Set-Bluetooth-background-scan-PTA-re.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 6d2a479c1f9e957908d0fc9d56b9831a48f5ce80 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 17 Jan 2023 19:41:06 +0800 -Subject: [PATCH 125/149] wifi: rtw89: coex: Set Bluetooth background scan PTA - request priority - -When Wi-Fi is RX, set Bluetooth background scan to low-priority and -not to break Wi-Fi packet. Bluetooth can RX depend on hardware ability -even RX request has been rejected. This way can improve Wi-Fi RX -throughput performance. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230117114109.4298-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -4763,6 +4763,8 @@ void _run_coex(struct rtw89_dev *rtwdev, - _action_wl_nc(rtwdev); - break; - case BTC_WLINK_2G_STA: -+ if (wl->status.map.traffic_dir & BIT(RTW89_TFC_DL)) -+ bt->scan_rx_low_pri = true; - _action_wl_2g_sta(rtwdev); - break; - case BTC_WLINK_2G_AP: diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-126-wifi-rtw89-coex-Correct-A2DP-exist-variable-source.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-126-wifi-rtw89-coex-Correct-A2DP-exist-variable-source.patch deleted file mode 100644 index e3d4c7f74..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-126-wifi-rtw89-coex-Correct-A2DP-exist-variable-source.patch +++ /dev/null @@ -1,29 +0,0 @@ -From c7d2b22f52bd0088cd39dba57bb7c1e8f3df5489 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 17 Jan 2023 19:41:07 +0800 -Subject: [PATCH 126/149] wifi: rtw89: coex: Correct A2DP exist variable source - -When Wi-Fi enter and leave LPS, coexistence driver need to know -is there A2DP exist or not. And when Wi-Fi sleep in deep power save -state will not able to receive mailbox sent from Bluetooth. So update -the A2DP exist information from reading register. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230117114109.4298-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -4602,7 +4602,7 @@ static void _update_bt_scbd(struct rtw89 - - bt->whql_test = !!(val & BTC_BSCB_WHQL); - bt->btg_type = val & BTC_BSCB_BT_S1 ? BTC_BT_BTG : BTC_BT_ALONE; -- bt->link_info.a2dp_desc.active = !!(val & BTC_BSCB_A2DP_ACT); -+ bt->link_info.a2dp_desc.exist = !!(val & BTC_BSCB_A2DP_ACT); - - /* if rfk run 1->0 */ - if (bt->rfk_info.map.run && !(val & BTC_BSCB_RFK_RUN)) diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-127-wifi-rtw89-coex-Fix-test-fail-when-coexist-with-rasp.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-127-wifi-rtw89-coex-Fix-test-fail-when-coexist-with-rasp.patch deleted file mode 100644 index eb8ee7cb8..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-127-wifi-rtw89-coex-Fix-test-fail-when-coexist-with-rasp.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 4b3e7e813bba53402af13ecd5343ac9667ca7608 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 17 Jan 2023 19:41:08 +0800 -Subject: [PATCH 127/149] wifi: rtw89: coex: Fix test fail when coexist with - raspberryPI A2DP idle - -The origin code will enable TDMA WL:BT = 50:50 to prevent Wi-Fi -throughput suddenly drop to 0 in the moment while A2DP pause. -And this protection just a short moment, and will turn to Bluetooth -idle case when A2DP turn into sniff mode. But the raspberryPI simulated -A2DP device will not turn into sniff mode. So the protection will bring -the throughput drop. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230117114109.4298-8-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -3847,7 +3847,7 @@ static void _action_by_bt(struct rtw89_d - case BTC_BT_NOPROFILE: - if (_check_freerun(rtwdev)) - _action_freerun(rtwdev); -- else if (a2dp.active || pan.active) -+ else if (pan.active) - _action_bt_pan(rtwdev); - else - _action_bt_idle(rtwdev); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-128-wifi-rtw89-coex-Update-Wi-Fi-Bluetooth-coexistence-v.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-128-wifi-rtw89-coex-Update-Wi-Fi-Bluetooth-coexistence-v.patch deleted file mode 100644 index 1725db978..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-128-wifi-rtw89-coex-Update-Wi-Fi-Bluetooth-coexistence-v.patch +++ /dev/null @@ -1,30 +0,0 @@ -From de06588cb95cb3bbece81e9838547c1a3c2aa023 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 17 Jan 2023 19:41:09 +0800 -Subject: [PATCH 128/149] wifi: rtw89: coex: Update Wi-Fi Bluetooth coexistence - version to 7.0.0 - -Should update the driver with the supported firmware version of the -below item. -Bluetooth firmware BT_Coex_Ver: 0x07 -Wi-Fi firmware version: RTL8852C->v0.27.56.10, RTL8852A->v0.24.36 - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230117114109.4298-9-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -9,7 +9,7 @@ - #include "ps.h" - #include "reg.h" - --#define RTW89_COEX_VERSION 0x06030013 -+#define RTW89_COEX_VERSION 0x07000013 - #define FCXDEF_STEP 50 /* MUST <= FCXMAX_STEP and match with wl fw*/ - - enum btc_fbtc_tdma_template { diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-129-wifi-rtw89-correct-unit-for-port-offset-and-refine-m.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-129-wifi-rtw89-correct-unit-for-port-offset-and-refine-m.patch deleted file mode 100644 index a982960fd..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-129-wifi-rtw89-correct-unit-for-port-offset-and-refine-m.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 1120e6a6c5cd1144694209d6aa6a225af064950a Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Thu, 19 Jan 2023 14:24:51 +0800 -Subject: [PATCH 129/149] wifi: rtw89: correct unit for port offset and refine - macro - -Strictly speaking, the unit of the offset should be TU instead of ms. -So, correct it and the macro for calculation. Then, to make the macro -generic, the factor n is moved outside. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230119062453.58341-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.c | 4 +++- - drivers/net/wireless/realtek/rtw89/mac.h | 2 +- - 2 files changed, 4 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -3930,10 +3930,12 @@ static void rtw89_mac_port_tsf_sync(stru - - /* adjust offset randomly to avoid beacon conflict */ - offset = offset - offset / 4 + get_random_u32() % (offset / 2); -- val = RTW89_PORT_OFFSET_MS_TO_32US((*n_offset)++, offset); -+ val = (*n_offset) * RTW89_PORT_OFFSET_TU_TO_32US(offset); - reg = rtw89_mac_reg_by_idx(R_AX_PORT0_TSF_SYNC + rtwvif->port * 4, - rtwvif->mac_idx); - -+ (*n_offset)++; -+ - rtw89_write32_mask(rtwdev, reg, B_AX_SYNC_PORT_SRC, rtwvif_src->port); - rtw89_write32_mask(rtwdev, reg, B_AX_SYNC_PORT_OFFSET_VAL, val); - rtw89_write32_set(rtwdev, reg, B_AX_SYNC_NOW); ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -168,7 +168,7 @@ enum rtw89_mac_ax_l0_to_l1_event { - MAC_AX_L0_TO_L1_EVENT_MAX = 15, - }; - --#define RTW89_PORT_OFFSET_MS_TO_32US(n, shift_ms) ((n) * (shift_ms) * 1000 / 32) -+#define RTW89_PORT_OFFSET_TU_TO_32US(shift_tu) ((shift_tu) * 1024 / 32) - - enum rtw89_mac_dbg_port_sel { - /* CMAC 0 related */ diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-130-wifi-rtw89-split-out-generic-part-of-rtw89_mac_port_.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-130-wifi-rtw89-split-out-generic-part-of-rtw89_mac_port_.patch deleted file mode 100644 index c85b4f8ce..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-130-wifi-rtw89-split-out-generic-part-of-rtw89_mac_port_.patch +++ /dev/null @@ -1,95 +0,0 @@ -From 42db7edd5c0523b43a004779caf36e1ebac80b40 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Thu, 19 Jan 2023 14:24:52 +0800 -Subject: [PATCH 130/149] wifi: rtw89: split out generic part of - rtw89_mac_port_tsf_sync() - -Originally, rtw89_mac_port_tsf_sync() contains randomization logic -internally. However, not all situation, we need the randomization. -So, split out the generic part from it. And, make the full logic of -original one contained in rtw89_mac_port_tsf_sync_rand(). It will -still be used by its original caller as before. Then, the generic -one will be used in MCC (multi-channel concurrency) management flow. -MCC will implement its logic to decide the offset for TSF sync. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230119062453.58341-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.c | 33 +++++++++++++++--------- - drivers/net/wireless/realtek/rtw89/mac.h | 4 +++ - 2 files changed, 25 insertions(+), 12 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -3918,27 +3918,36 @@ static void rtw89_mac_port_cfg_tbtt_shif - B_AX_TBTT_SHIFT_OFST_MASK, val); - } - --static void rtw89_mac_port_tsf_sync(struct rtw89_dev *rtwdev, -- struct rtw89_vif *rtwvif, -- struct rtw89_vif *rtwvif_src, u8 offset, -- int *n_offset) -+void rtw89_mac_port_tsf_sync(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, -+ struct rtw89_vif *rtwvif_src, -+ u16 offset_tu) - { - u32 val, reg; - -+ val = RTW89_PORT_OFFSET_TU_TO_32US(offset_tu); -+ reg = rtw89_mac_reg_by_idx(R_AX_PORT0_TSF_SYNC + rtwvif->port * 4, -+ rtwvif->mac_idx); -+ -+ rtw89_write32_mask(rtwdev, reg, B_AX_SYNC_PORT_SRC, rtwvif_src->port); -+ rtw89_write32_mask(rtwdev, reg, B_AX_SYNC_PORT_OFFSET_VAL, val); -+ rtw89_write32_set(rtwdev, reg, B_AX_SYNC_NOW); -+} -+ -+static void rtw89_mac_port_tsf_sync_rand(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, -+ struct rtw89_vif *rtwvif_src, -+ u8 offset, int *n_offset) -+{ - if (rtwvif->net_type != RTW89_NET_TYPE_AP_MODE || rtwvif == rtwvif_src) - return; - - /* adjust offset randomly to avoid beacon conflict */ - offset = offset - offset / 4 + get_random_u32() % (offset / 2); -- val = (*n_offset) * RTW89_PORT_OFFSET_TU_TO_32US(offset); -- reg = rtw89_mac_reg_by_idx(R_AX_PORT0_TSF_SYNC + rtwvif->port * 4, -- rtwvif->mac_idx); -+ rtw89_mac_port_tsf_sync(rtwdev, rtwvif, rtwvif_src, -+ (*n_offset) * offset); - - (*n_offset)++; -- -- rtw89_write32_mask(rtwdev, reg, B_AX_SYNC_PORT_SRC, rtwvif_src->port); -- rtw89_write32_mask(rtwdev, reg, B_AX_SYNC_PORT_OFFSET_VAL, val); -- rtw89_write32_set(rtwdev, reg, B_AX_SYNC_NOW); - } - - static void rtw89_mac_port_tsf_resync_all(struct rtw89_dev *rtwdev) -@@ -3960,7 +3969,7 @@ static void rtw89_mac_port_tsf_resync_al - offset /= (vif_aps + 1); - - rtw89_for_each_rtwvif(rtwdev, tmp) -- rtw89_mac_port_tsf_sync(rtwdev, tmp, src, offset, &n_offset); -+ rtw89_mac_port_tsf_sync_rand(rtwdev, tmp, src, offset, &n_offset); - } - - int rtw89_mac_vif_init(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -906,6 +906,10 @@ int rtw89_mac_write_lte(struct rtw89_dev - int rtw89_mac_read_lte(struct rtw89_dev *rtwdev, const u32 offset, u32 *val); - int rtw89_mac_add_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *vif); - int rtw89_mac_port_update(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); -+void rtw89_mac_port_tsf_sync(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, -+ struct rtw89_vif *rtwvif_src, -+ u16 offset_tu); - void rtw89_mac_set_he_obss_narrow_bw_ru(struct rtw89_dev *rtwdev, - struct ieee80211_vif *vif); - void rtw89_mac_stop_ap(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-131-wifi-rtw89-mac-add-function-to-get-TSF.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-131-wifi-rtw89-mac-add-function-to-get-TSF.patch deleted file mode 100644 index e60f7de32..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-131-wifi-rtw89-mac-add-function-to-get-TSF.patch +++ /dev/null @@ -1,72 +0,0 @@ -From 76f478a34dafcee28165022b2f73d0ee1f0f47e5 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Thu, 19 Jan 2023 14:24:53 +0800 -Subject: [PATCH 131/149] wifi: rtw89: mac: add function to get TSF - -Add mac function rtw89_mac_port_get_tsf() to get TSF by port. -It will be used when MCC (multi-channel concurrency) calculates -timing things. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230119062453.58341-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.c | 18 ++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/mac.h | 11 +++++++++++ - 2 files changed, 29 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -4061,6 +4061,24 @@ int rtw89_mac_port_update(struct rtw89_d - return 0; - } - -+int rtw89_mac_port_get_tsf(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ u64 *tsf) -+{ -+ const struct rtw89_port_reg *p = &rtw_port_base; -+ u32 tsf_low, tsf_high; -+ int ret; -+ -+ ret = rtw89_mac_check_mac_en(rtwdev, rtwvif->mac_idx, RTW89_CMAC_SEL); -+ if (ret) -+ return ret; -+ -+ tsf_low = rtw89_read32_port(rtwdev, rtwvif, p->tsftr_l); -+ tsf_high = rtw89_read32_port(rtwdev, rtwvif, p->tsftr_h); -+ *tsf = (u64)tsf_high << 32 | tsf_low; -+ -+ return 0; -+} -+ - static void rtw89_mac_check_he_obss_narrow_bw_ru_iter(struct wiphy *wiphy, - struct cfg80211_bss *bss, - void *data) ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -828,6 +828,15 @@ static inline u32 rtw89_mac_reg_by_port( - } - - static inline u32 -+rtw89_read32_port(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, u32 base) -+{ -+ u32 reg; -+ -+ reg = rtw89_mac_reg_by_port(base, rtwvif->port, rtwvif->mac_idx); -+ return rtw89_read32(rtwdev, reg); -+} -+ -+static inline u32 - rtw89_read32_port_mask(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, - u32 base, u32 mask) - { -@@ -910,6 +919,8 @@ void rtw89_mac_port_tsf_sync(struct rtw8 - struct rtw89_vif *rtwvif, - struct rtw89_vif *rtwvif_src, - u16 offset_tu); -+int rtw89_mac_port_get_tsf(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ u64 *tsf); - void rtw89_mac_set_he_obss_narrow_bw_ru(struct rtw89_dev *rtwdev, - struct ieee80211_vif *vif); - void rtw89_mac_stop_ap(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-133-wifi-rtw89-deal-with-RXI300-error.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-133-wifi-rtw89-deal-with-RXI300-error.patch deleted file mode 100644 index 6e4969d70..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-133-wifi-rtw89-deal-with-RXI300-error.patch +++ /dev/null @@ -1,67 +0,0 @@ -From f5d98831badb89172515ac73015d0e7475a285c1 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Thu, 19 Jan 2023 14:35:29 +0800 -Subject: [PATCH 133/149] wifi: rtw89: deal with RXI300 error - -RXI300 is a HW design to maintain stuffs across BUS, e.g. AXI, AHB, APB. -It will feedback an error when host does an invalid BUS operation. -For example, -* BUS master request without power/clock on. -* host reads/writes/accesses an invalid address. - -They might lead to problems such as BUS timeout, platform hang, etc. So, -once if RXI300 feedback an error, it notifies that driver need a L2 SER -(system error recovery) to reset things. - -Previously, driver did not parse the error scenario for RXI300. We add -it and assign a corresponding error code which will make SER flow do L2 -reset. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230119063529.61563-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.c | 5 ++++- - drivers/net/wireless/realtek/rtw89/mac.h | 2 ++ - 2 files changed, 6 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -623,7 +623,8 @@ static void rtw89_mac_dump_err_status(st - if (err != MAC_AX_ERR_L1_ERR_DMAC && - err != MAC_AX_ERR_L0_PROMOTE_TO_L1 && - err != MAC_AX_ERR_L0_ERR_CMAC0 && -- err != MAC_AX_ERR_L0_ERR_CMAC1) -+ err != MAC_AX_ERR_L0_ERR_CMAC1 && -+ err != MAC_AX_ERR_RXI300) - return; - - rtw89_info(rtwdev, "--->\nerr=0x%x\n", err); -@@ -663,6 +664,8 @@ u32 rtw89_mac_get_err_status(struct rtw8 - err = MAC_AX_ERR_CPU_EXCEPTION; - else if (err_scnr == RTW89_WCPU_ASSERTION) - err = MAC_AX_ERR_ASSERTION; -+ else if (err_scnr == RTW89_RXI300_ERROR) -+ err = MAC_AX_ERR_RXI300; - - rtw89_fw_st_dbg_dump(rtwdev); - rtw89_mac_dump_err_status(rtwdev, err); ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -623,6 +623,7 @@ struct rtw89_mac_dle_dfi_qempty { - }; - - enum rtw89_mac_error_scenario { -+ RTW89_RXI300_ERROR = 1, - RTW89_WCPU_CPU_EXCEPTION = 2, - RTW89_WCPU_ASSERTION = 3, - }; -@@ -769,6 +770,7 @@ enum mac_ax_err_info { - MAC_AX_ERR_L2_ERR_WDT_TIMEOUT_INT = 0x2599, - MAC_AX_ERR_CPU_EXCEPTION = 0x3000, - MAC_AX_ERR_ASSERTION = 0x4000, -+ MAC_AX_ERR_RXI300 = 0x5000, - MAC_AX_GET_ERR_MAX, - MAC_AX_DUMP_SHAREBUFF_INDICATOR = 0x80000000, - diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-134-wifi-rtw89-fix-parsing-offset-for-MCC-C2H.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-134-wifi-rtw89-fix-parsing-offset-for-MCC-C2H.patch deleted file mode 100644 index 3520867cb..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-134-wifi-rtw89-fix-parsing-offset-for-MCC-C2H.patch +++ /dev/null @@ -1,85 +0,0 @@ -From 24d72944d79e6795ba4330c114de0387386bf3aa Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Thu, 19 Jan 2023 14:43:41 +0800 -Subject: [PATCH 134/149] wifi: rtw89: fix parsing offset for MCC C2H - -A 8-byte offset is missed during parsing C2Hs (chip to host packets) -of MCC (multi-channel concurrent) series. -So, we fix it. - -Fixes: ef9dff4cb491 ("wifi: rtw89: mac: process MCC related C2H") -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230119064342.65391-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.h | 34 ++++++++++++------------- - 1 file changed, 17 insertions(+), 17 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -3219,16 +3219,16 @@ static inline struct rtw89_fw_c2h_attr * - le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(25, 24)) - - #define RTW89_GET_MAC_C2H_MCC_RCV_ACK_GROUP(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h)), GENMASK(1, 0)) -+ le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(1, 0)) - #define RTW89_GET_MAC_C2H_MCC_RCV_ACK_H2C_FUNC(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h)), GENMASK(15, 8)) -+ le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 8)) - - #define RTW89_GET_MAC_C2H_MCC_REQ_ACK_GROUP(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h)), GENMASK(1, 0)) -+ le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(1, 0)) - #define RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_RETURN(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h)), GENMASK(7, 2)) -+ le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 2)) - #define RTW89_GET_MAC_C2H_MCC_REQ_ACK_H2C_FUNC(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h)), GENMASK(15, 8)) -+ le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 8)) - - struct rtw89_mac_mcc_tsf_rpt { - u32 macid_x; -@@ -3242,30 +3242,30 @@ struct rtw89_mac_mcc_tsf_rpt { - static_assert(sizeof(struct rtw89_mac_mcc_tsf_rpt) <= RTW89_COMPLETION_BUF_SIZE); - - #define RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_X(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h)), GENMASK(7, 0)) -+ le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 0)) - #define RTW89_GET_MAC_C2H_MCC_TSF_RPT_MACID_Y(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h)), GENMASK(15, 8)) -+ le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 8)) - #define RTW89_GET_MAC_C2H_MCC_TSF_RPT_GROUP(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h)), GENMASK(17, 16)) -+ le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(17, 16)) - #define RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_X(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h) + 1), GENMASK(31, 0)) -+ le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(31, 0)) - #define RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_X(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(31, 0)) -+ le32_get_bits(*((const __le32 *)(c2h) + 4), GENMASK(31, 0)) - #define RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_Y(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(31, 0)) -+ le32_get_bits(*((const __le32 *)(c2h) + 5), GENMASK(31, 0)) - #define RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_Y(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h) + 4), GENMASK(31, 0)) -+ le32_get_bits(*((const __le32 *)(c2h) + 6), GENMASK(31, 0)) - - #define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_STATUS(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h)), GENMASK(5, 0)) -+ le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(5, 0)) - #define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_GROUP(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h)), GENMASK(7, 6)) -+ le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 6)) - #define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_MACID(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h)), GENMASK(15, 8)) -+ le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 8)) - #define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_LOW(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h) + 1), GENMASK(31, 0)) -+ le32_get_bits(*((const __le32 *)(c2h) + 3), GENMASK(31, 0)) - #define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_HIGH(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(31, 0)) -+ le32_get_bits(*((const __le32 *)(c2h) + 4), GENMASK(31, 0)) - - #define RTW89_FW_HDR_SIZE 32 - #define RTW89_FW_SECTION_HDR_SIZE 16 diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-135-wifi-rtw89-refine-MCC-C2H-debug-logs.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-135-wifi-rtw89-refine-MCC-C2H-debug-logs.patch deleted file mode 100644 index 0eefe932c..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-135-wifi-rtw89-refine-MCC-C2H-debug-logs.patch +++ /dev/null @@ -1,94 +0,0 @@ -From 214a98b151b14d3dbfa60136abcf99df5d347a80 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Thu, 19 Jan 2023 14:43:42 +0800 -Subject: [PATCH 135/149] wifi: rtw89: refine MCC C2H debug logs - -To debug channel concurrency more centrally, we add a new debug flag, -RTW89_DBG_CHAN, for channel related things, especially channel concurrency. -Then, we change MCC (multi-channel concurrency) C2H (chip to host packets) -debug flag to it. - -Besides, refine debug logs to show TSF in u64 directly. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230119064342.65391-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/debug.h | 1 + - drivers/net/wireless/realtek/rtw89/mac.c | 21 +++++++++++++-------- - 2 files changed, 14 insertions(+), 8 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/debug.h -+++ b/drivers/net/wireless/realtek/rtw89/debug.h -@@ -28,6 +28,7 @@ enum rtw89_debug_mask { - RTW89_DBG_STATE = BIT(17), - RTW89_DBG_WOW = BIT(18), - RTW89_DBG_UL_TB = BIT(19), -+ RTW89_DBG_CHAN = BIT(20), - - RTW89_DBG_UNEXP = BIT(31), - }; ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -4295,12 +4295,12 @@ rtw89_mac_c2h_mcc_rcv_ack(struct rtw89_d - case H2C_FUNC_MCC_SET_DURATION: - break; - default: -- rtw89_debug(rtwdev, RTW89_DBG_FW, -+ rtw89_debug(rtwdev, RTW89_DBG_CHAN, - "invalid MCC C2H RCV ACK: func %d\n", func); - return; - } - -- rtw89_debug(rtwdev, RTW89_DBG_FW, -+ rtw89_debug(rtwdev, RTW89_DBG_CHAN, - "MCC C2H RCV ACK: group %d, func %d\n", group, func); - } - -@@ -4328,12 +4328,12 @@ rtw89_mac_c2h_mcc_req_ack(struct rtw89_d - case H2C_FUNC_DEL_MCC_GROUP: - case H2C_FUNC_RESET_MCC_GROUP: - default: -- rtw89_debug(rtwdev, RTW89_DBG_FW, -+ rtw89_debug(rtwdev, RTW89_DBG_CHAN, - "invalid MCC C2H REQ ACK: func %d\n", func); - return; - } - -- rtw89_debug(rtwdev, RTW89_DBG_FW, -+ rtw89_debug(rtwdev, RTW89_DBG_CHAN, - "MCC C2H REQ ACK: group %d, func %d, return code %d\n", - group, func, retcode); - -@@ -4361,6 +4361,11 @@ rtw89_mac_c2h_mcc_tsf_rpt(struct rtw89_d - rpt->tsf_y_low = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_LOW_Y(c2h->data); - rpt->tsf_y_high = RTW89_GET_MAC_C2H_MCC_TSF_RPT_TSF_HIGH_Y(c2h->data); - -+ rtw89_debug(rtwdev, RTW89_DBG_CHAN, -+ "MCC C2H TSF RPT: macid %d> %llu, macid %d> %llu\n", -+ rpt->macid_x, (u64)rpt->tsf_x_high << 32 | rpt->tsf_x_low, -+ rpt->macid_y, (u64)rpt->tsf_y_high << 32 | rpt->tsf_y_low); -+ - cond = RTW89_MCC_WAIT_COND(group, H2C_FUNC_MCC_REQ_TSF); - rtw89_complete_cond(&rtwdev->mcc.wait, cond, &data); - } -@@ -4418,14 +4423,14 @@ rtw89_mac_c2h_mcc_status_rpt(struct rtw8 - rsp = false; - break; - default: -- rtw89_debug(rtwdev, RTW89_DBG_FW, -+ rtw89_debug(rtwdev, RTW89_DBG_CHAN, - "invalid MCC C2H STS RPT: status %d\n", status); - return; - } - -- rtw89_debug(rtwdev, RTW89_DBG_FW, -- "MCC C2H STS RPT: group %d, macid %d, status %d, tsf {%d, %d}\n", -- group, macid, status, tsf_low, tsf_high); -+ rtw89_debug(rtwdev, RTW89_DBG_CHAN, -+ "MCC C2H STS RPT: group %d, macid %d, status %d, tsf %llu\n", -+ group, macid, status, (u64)tsf_high << 32 | tsf_low); - - if (!rsp) - return; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-136-wifi-rtw89-disallow-enter-PS-mode-after-create-TDLS-.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-136-wifi-rtw89-disallow-enter-PS-mode-after-create-TDLS-.patch deleted file mode 100644 index 8bd39cf78..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-136-wifi-rtw89-disallow-enter-PS-mode-after-create-TDLS-.patch +++ /dev/null @@ -1,64 +0,0 @@ -From d881d0a13c3843d213da23cde99bb73f27e53d1e Mon Sep 17 00:00:00 2001 -From: Kuan-Chung Chen -Date: Thu, 19 Jan 2023 14:46:31 +0800 -Subject: [PATCH 136/149] wifi: rtw89: disallow enter PS mode after create TDLS - link - -Buffer STA on TDLS links are not currently supported. Therefore, it -is not allowed to enter the PS mode after TDLS link is established. - -Signed-off-by: Kuan-Chung Chen -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230119064631.66971-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 10 ++++++++-- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - 2 files changed, 9 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -2206,8 +2206,9 @@ static bool rtw89_traffic_stats_track(st - - static void rtw89_vif_enter_lps(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) - { -- if (rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION && -- rtwvif->wifi_role != RTW89_WIFI_ROLE_P2P_CLIENT) -+ if ((rtwvif->wifi_role != RTW89_WIFI_ROLE_STATION && -+ rtwvif->wifi_role != RTW89_WIFI_ROLE_P2P_CLIENT) || -+ rtwvif->tdls_peer) - return; - - if (rtwvif->stats.tx_tfc_lv == RTW89_TFC_IDLE && -@@ -2466,9 +2467,12 @@ int rtw89_core_sta_disassoc(struct rtw89 - struct ieee80211_vif *vif, - struct ieee80211_sta *sta) - { -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; - struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; - - rtwdev->total_sta_assoc--; -+ if (sta->tdls) -+ rtwvif->tdls_peer--; - rtwsta->disassoc = true; - - return 0; -@@ -2587,6 +2591,8 @@ int rtw89_core_sta_assoc(struct rtw89_de - } - - rtwdev->total_sta_assoc++; -+ if (sta->tdls) -+ rtwvif->tdls_peer++; - rtw89_phy_ra_assoc(rtwdev, sta); - rtw89_mac_bf_assoc(rtwdev, vif, sta); - rtw89_mac_bf_monitor_calc(rtwdev, sta, false); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2452,6 +2452,7 @@ struct rtw89_vif { - bool last_a_ctrl; - bool dyn_tb_bedge_en; - u8 def_tri_idx; -+ u32 tdls_peer; - struct work_struct update_beacon_work; - struct rtw89_addr_cam_entry addr_cam; - struct rtw89_bssid_cam_entry bssid_cam; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-137-wifi-rtw89-fix-potential-wrong-mapping-for-pkt-offlo.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-137-wifi-rtw89-fix-potential-wrong-mapping-for-pkt-offlo.patch deleted file mode 100644 index 046eb813b..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-137-wifi-rtw89-fix-potential-wrong-mapping-for-pkt-offlo.patch +++ /dev/null @@ -1,68 +0,0 @@ -From b8e8ff842b1bfe7602409fc71ee812db871ccce6 Mon Sep 17 00:00:00 2001 -From: Chin-Yen Lee -Date: Mon, 23 Jan 2023 14:53:56 +0800 -Subject: [PATCH 137/149] wifi: rtw89: fix potential wrong mapping for - pkt-offload - -When driver fails to send H2C to firmware for pkt-offload, we should not -update the pkt_list of driver, and need to release allocated pkt index to -avoid wrong mapping between driver and firmware. - -Signed-off-by: Chin-Yen Lee -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230123065401.14174-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 9 ++++++--- - 1 file changed, 6 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -948,13 +948,13 @@ static int rtw89_fw_h2c_add_wow_fw_ofld( - if (!skb) - goto err; - -- list_add_tail(&info->list, &rtw_wow->pkt_list); - ret = rtw89_fw_h2c_add_pkt_offload(rtwdev, &info->id, skb); - kfree_skb(skb); - - if (ret) -- return ret; -+ goto err; - -+ list_add_tail(&info->list, &rtw_wow->pkt_list); - *id = info->id; - return 0; - -@@ -2133,6 +2133,7 @@ int rtw89_fw_h2c_add_pkt_offload(struct - skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_PKT_OFLD + skb_ofld->len); - if (!skb) { - rtw89_err(rtwdev, "failed to alloc skb for h2c pkt offload\n"); -+ rtw89_core_release_bit_map(rtwdev->pkt_offload, alloc_id); - return -ENOMEM; - } - skb_put(skb, H2C_LEN_PKT_OFLD); -@@ -2151,6 +2152,7 @@ int rtw89_fw_h2c_add_pkt_offload(struct - ret = rtw89_h2c_tx(rtwdev, skb, false); - if (ret) { - rtw89_err(rtwdev, "failed to send h2c\n"); -+ rtw89_core_release_bit_map(rtwdev->pkt_offload, alloc_id); - goto fail; - } - -@@ -2684,13 +2686,14 @@ static int rtw89_append_probe_req_ie(str - goto out; - } - -- list_add_tail(&info->list, &scan_info->pkt_list[band]); - ret = rtw89_fw_h2c_add_pkt_offload(rtwdev, &info->id, new); - if (ret) { - kfree_skb(new); -+ kfree(info); - goto out; - } - -+ list_add_tail(&info->list, &scan_info->pkt_list[band]); - kfree_skb(new); - } - out: diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-138-wifi-rtw89-refine-packet-offload-flow.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-138-wifi-rtw89-refine-packet-offload-flow.patch deleted file mode 100644 index 040ae3e60..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-138-wifi-rtw89-refine-packet-offload-flow.patch +++ /dev/null @@ -1,297 +0,0 @@ -From 5c12bb66b79d08b0f7aae99fc2677cab1141d4d2 Mon Sep 17 00:00:00 2001 -From: Chin-Yen Lee -Date: Mon, 23 Jan 2023 14:53:57 +0800 -Subject: [PATCH 138/149] wifi: rtw89: refine packet offload flow - -For upcoming firmware, driver needs to do packet offload to firmware to -ensure LPS protocol work properly, so we update current connection and -disconnect flow to maintain packet offload flow, and integrate with -current WoWLAN flow which also needs packet offload. - -Signed-off-by: Chin-Yen Lee -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230123065401.14174-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 17 +++--- - drivers/net/wireless/realtek/rtw89/core.h | 2 +- - drivers/net/wireless/realtek/rtw89/fw.c | 54 +++++++++++++++---- - drivers/net/wireless/realtek/rtw89/fw.h | 6 ++- - drivers/net/wireless/realtek/rtw89/mac80211.c | 1 + - drivers/net/wireless/realtek/rtw89/ser.c | 1 + - drivers/net/wireless/realtek/rtw89/wow.c | 26 ++++----- - 7 files changed, 71 insertions(+), 36 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -2495,8 +2495,10 @@ int rtw89_core_sta_disconnect(struct rtw - if (sta->tdls) - rtw89_cam_deinit_bssid_cam(rtwdev, &rtwsta->bssid_cam); - -- if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) -+ if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) { - rtw89_vif_type_mapping(vif, false); -+ rtw89_fw_release_general_pkt_list_vif(rtwdev, rtwvif, true); -+ } - - ret = rtw89_fw_h2c_assoc_cmac_tbl(rtwdev, vif, sta); - if (ret) { -@@ -2584,12 +2586,6 @@ int rtw89_core_sta_assoc(struct rtw89_de - return ret; - } - -- ret = rtw89_fw_h2c_general_pkt(rtwdev, rtwsta->mac_id); -- if (ret) { -- rtw89_warn(rtwdev, "failed to send h2c general packet\n"); -- return ret; -- } -- - rtwdev->total_sta_assoc++; - if (sta->tdls) - rtwvif->tdls_peer++; -@@ -2608,6 +2604,12 @@ int rtw89_core_sta_assoc(struct rtw89_de - BTC_ROLE_MSTS_STA_CONN_END); - rtw89_core_get_no_ul_ofdma_htc(rtwdev, &rtwsta->htc_template); - rtw89_phy_ul_tb_assoc(rtwdev, rtwvif); -+ -+ ret = rtw89_fw_h2c_general_pkt(rtwdev, rtwvif, rtwsta->mac_id); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to send h2c general packet\n"); -+ return ret; -+ } - } - - return ret; -@@ -3132,7 +3134,6 @@ int rtw89_core_init(struct rtw89_dev *rt - continue; - INIT_LIST_HEAD(&rtwdev->scan_info.pkt_list[band]); - } -- INIT_LIST_HEAD(&rtwdev->wow.pkt_list); - INIT_WORK(&rtwdev->ba_work, rtw89_core_ba_work); - INIT_WORK(&rtwdev->txq_work, rtw89_core_txq_work); - INIT_DELAYED_WORK(&rtwdev->txq_reinvoke_work, rtw89_core_txq_reinvoke_work); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2461,6 +2461,7 @@ struct rtw89_vif { - struct rtw89_phy_rate_pattern rate_pattern; - struct cfg80211_scan_request *scan_req; - struct ieee80211_scan_ies *scan_ies; -+ struct list_head general_pkt_list; - }; - - enum rtw89_lv1_rcvy_step { -@@ -3724,7 +3725,6 @@ struct rtw89_wow_param { - DECLARE_BITMAP(flags, RTW89_WOW_FLAG_NUM); - struct rtw89_wow_cam_info patterns[RTW89_MAX_PATTERN_NUM]; - u8 pattern_cnt; -- struct list_head pkt_list; - }; - - struct rtw89_mcc_info { ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -10,6 +10,7 @@ - #include "mac.h" - #include "phy.h" - #include "reg.h" -+#include "util.h" - - static void rtw89_fw_c2h_cmd_handle(struct rtw89_dev *rtwdev, - struct sk_buff *skb); -@@ -913,13 +914,12 @@ fail: - return ret; - } - --static int rtw89_fw_h2c_add_wow_fw_ofld(struct rtw89_dev *rtwdev, -+static int rtw89_fw_h2c_add_general_pkt(struct rtw89_dev *rtwdev, - struct rtw89_vif *rtwvif, - enum rtw89_fw_pkt_ofld_type type, - u8 *id) - { - struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); -- struct rtw89_wow_param *rtw_wow = &rtwdev->wow; - struct rtw89_pktofld_info *info; - struct sk_buff *skb; - int ret; -@@ -954,7 +954,7 @@ static int rtw89_fw_h2c_add_wow_fw_ofld( - if (ret) - goto err; - -- list_add_tail(&info->list, &rtw_wow->pkt_list); -+ list_add_tail(&info->list, &rtwvif->general_pkt_list); - *id = info->id; - return 0; - -@@ -963,13 +963,48 @@ err: - return -ENOMEM; - } - -+void rtw89_fw_release_general_pkt_list_vif(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, bool notify_fw) -+{ -+ struct list_head *pkt_list = &rtwvif->general_pkt_list; -+ struct rtw89_pktofld_info *info, *tmp; -+ -+ list_for_each_entry_safe(info, tmp, pkt_list, list) { -+ if (notify_fw) -+ rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id); -+ rtw89_core_release_bit_map(rtwdev->pkt_offload, -+ info->id); -+ list_del(&info->list); -+ kfree(info); -+ } -+} -+ -+void rtw89_fw_release_general_pkt_list(struct rtw89_dev *rtwdev, bool notify_fw) -+{ -+ struct rtw89_vif *rtwvif; -+ -+ rtw89_for_each_rtwvif(rtwdev, rtwvif) -+ rtw89_fw_release_general_pkt_list_vif(rtwdev, rtwvif, notify_fw); -+} -+ - #define H2C_GENERAL_PKT_LEN 6 - #define H2C_GENERAL_PKT_ID_UND 0xff --int rtw89_fw_h2c_general_pkt(struct rtw89_dev *rtwdev, u8 macid) -+int rtw89_fw_h2c_general_pkt(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, u8 macid) - { -+ u8 pkt_id_ps_poll = H2C_GENERAL_PKT_ID_UND; -+ u8 pkt_id_null = H2C_GENERAL_PKT_ID_UND; -+ u8 pkt_id_qos_null = H2C_GENERAL_PKT_ID_UND; - struct sk_buff *skb; - int ret; - -+ rtw89_fw_h2c_add_general_pkt(rtwdev, rtwvif, -+ RTW89_PKT_OFLD_TYPE_PS_POLL, &pkt_id_ps_poll); -+ rtw89_fw_h2c_add_general_pkt(rtwdev, rtwvif, -+ RTW89_PKT_OFLD_TYPE_NULL_DATA, &pkt_id_null); -+ rtw89_fw_h2c_add_general_pkt(rtwdev, rtwvif, -+ RTW89_PKT_OFLD_TYPE_QOS_NULL, &pkt_id_qos_null); -+ - skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_GENERAL_PKT_LEN); - if (!skb) { - rtw89_err(rtwdev, "failed to alloc skb for fw dl\n"); -@@ -978,9 +1013,9 @@ int rtw89_fw_h2c_general_pkt(struct rtw8 - skb_put(skb, H2C_GENERAL_PKT_LEN); - SET_GENERAL_PKT_MACID(skb->data, macid); - SET_GENERAL_PKT_PROBRSP_ID(skb->data, H2C_GENERAL_PKT_ID_UND); -- SET_GENERAL_PKT_PSPOLL_ID(skb->data, H2C_GENERAL_PKT_ID_UND); -- SET_GENERAL_PKT_NULL_ID(skb->data, H2C_GENERAL_PKT_ID_UND); -- SET_GENERAL_PKT_QOS_NULL_ID(skb->data, H2C_GENERAL_PKT_ID_UND); -+ SET_GENERAL_PKT_PSPOLL_ID(skb->data, pkt_id_ps_poll); -+ SET_GENERAL_PKT_NULL_ID(skb->data, pkt_id_null); -+ SET_GENERAL_PKT_QOS_NULL_ID(skb->data, pkt_id_qos_null); - SET_GENERAL_PKT_CTS2SELF_ID(skb->data, H2C_GENERAL_PKT_ID_UND); - - rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -@@ -3099,8 +3134,9 @@ int rtw89_fw_h2c_keep_alive(struct rtw89 - int ret; - - if (enable) { -- ret = rtw89_fw_h2c_add_wow_fw_ofld(rtwdev, rtwvif, -- RTW89_PKT_OFLD_TYPE_NULL_DATA, &pkt_id); -+ ret = rtw89_fw_h2c_add_general_pkt(rtwdev, rtwvif, -+ RTW89_PKT_OFLD_TYPE_NULL_DATA, -+ &pkt_id); - if (ret) - return -EPERM; - } ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -3518,7 +3518,11 @@ int rtw89_fw_h2c_raw_with_hdr(struct rtw - int rtw89_fw_h2c_raw(struct rtw89_dev *rtwdev, const u8 *buf, u16 len); - void rtw89_fw_send_all_early_h2c(struct rtw89_dev *rtwdev); - void rtw89_fw_free_all_early_h2c(struct rtw89_dev *rtwdev); --int rtw89_fw_h2c_general_pkt(struct rtw89_dev *rtwdev, u8 macid); -+int rtw89_fw_h2c_general_pkt(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ u8 macid); -+void rtw89_fw_release_general_pkt_list_vif(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, bool notify_fw); -+void rtw89_fw_release_general_pkt_list(struct rtw89_dev *rtwdev, bool notify_fw); - int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta, - bool valid, struct ieee80211_ampdu_params *params); - void rtw89_fw_h2c_init_ba_cam_v1(struct rtw89_dev *rtwdev); ---- a/drivers/net/wireless/realtek/rtw89/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -135,6 +135,7 @@ static int rtw89_ops_add_interface(struc - rtwvif->sub_entity_idx = RTW89_SUB_ENTITY_0; - rtwvif->hit_rule = 0; - ether_addr_copy(rtwvif->mac_addr, vif->addr); -+ INIT_LIST_HEAD(&rtwvif->general_pkt_list); - - ret = rtw89_mac_add_vif(rtwdev, rtwvif); - if (ret) { ---- a/drivers/net/wireless/realtek/rtw89/ser.c -+++ b/drivers/net/wireless/realtek/rtw89/ser.c -@@ -611,6 +611,7 @@ bottom: - ser_reset_mac_binding(rtwdev); - rtw89_core_stop(rtwdev); - rtw89_entity_init(rtwdev); -+ rtw89_fw_release_general_pkt_list(rtwdev, false); - INIT_LIST_HEAD(&rtwdev->rtwvifs_list); - } - ---- a/drivers/net/wireless/realtek/rtw89/wow.c -+++ b/drivers/net/wireless/realtek/rtw89/wow.c -@@ -490,21 +490,6 @@ static int rtw89_wow_check_fw_status(str - return ret; - } - --static void rtw89_wow_release_pkt_list(struct rtw89_dev *rtwdev) --{ -- struct rtw89_wow_param *rtw_wow = &rtwdev->wow; -- struct list_head *pkt_list = &rtw_wow->pkt_list; -- struct rtw89_pktofld_info *info, *tmp; -- -- list_for_each_entry_safe(info, tmp, pkt_list, list) { -- rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id); -- rtw89_core_release_bit_map(rtwdev->pkt_offload, -- info->id); -- list_del(&info->list); -- kfree(info); -- } --} -- - static int rtw89_wow_swap_fw(struct rtw89_dev *rtwdev, bool wow) - { - enum rtw89_fw_type fw_type = wow ? RTW89_FW_WOWLAN : RTW89_FW_NORMAL; -@@ -561,6 +546,11 @@ static int rtw89_wow_swap_fw(struct rtw8 - } - - if (is_conn) { -+ ret = rtw89_fw_h2c_general_pkt(rtwdev, rtwvif, rtwsta->mac_id); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to send h2c general packet\n"); -+ return ret; -+ } - rtw89_phy_ra_assoc(rtwdev, wow_sta); - rtw89_phy_set_bss_color(rtwdev, wow_vif); - rtw89_chip_cfg_txpwr_ul_tb_offset(rtwdev, wow_vif); -@@ -708,8 +698,6 @@ static int rtw89_wow_fw_stop(struct rtw8 - goto out; - } - -- rtw89_wow_release_pkt_list(rtwdev); -- - ret = rtw89_fw_h2c_disconnect_detect(rtwdev, rtwvif, false); - if (ret) { - rtw89_err(rtwdev, "wow: failed to disable disconnect detect\n"); -@@ -744,6 +732,8 @@ static int rtw89_wow_enable(struct rtw89 - goto out; - } - -+ rtw89_fw_release_general_pkt_list(rtwdev, true); -+ - ret = rtw89_wow_swap_fw(rtwdev, true); - if (ret) { - rtw89_err(rtwdev, "wow: failed to swap to wow fw\n"); -@@ -789,6 +779,8 @@ static int rtw89_wow_disable(struct rtw8 - goto out; - } - -+ rtw89_fw_release_general_pkt_list(rtwdev, true); -+ - ret = rtw89_wow_swap_fw(rtwdev, false); - if (ret) { - rtw89_err(rtwdev, "wow: failed to disable trx_post\n"); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-139-wifi-rtw89-add-use-of-pkt_list-offload-to-debug-entr.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-139-wifi-rtw89-add-use-of-pkt_list-offload-to-debug-entr.patch deleted file mode 100644 index 28c6221a0..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-139-wifi-rtw89-add-use-of-pkt_list-offload-to-debug-entr.patch +++ /dev/null @@ -1,96 +0,0 @@ -From 5da5ba7e6ec4f13c2abba8de3578a3c197925243 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 23 Jan 2023 14:53:58 +0800 -Subject: [PATCH 139/149] wifi: rtw89: add use of pkt_list offload to debug - entry - -Driver can prepare pkt_list for firmware that only uses them to send out -the packets in specific situations. To understand the usage of current -status, and to check if there is leakage problem, dump bitmap and the -indices used by certain function. - -An example looks like: - - map: - ... - pkt_ofld: 3f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ... - [SCAN 0]: 3 - [SCAN 1]: 4 - [SCAN 3]: 5 - VIF [0] xx:xx:xx:xx:xx:xx - ... - pkt_ofld[GENERAL]: 0 1 2 - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230123065401.14174-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/debug.c | 36 ++++++++++++++++++++++ - 1 file changed, 36 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/debug.c -+++ b/drivers/net/wireless/realtek/rtw89/debug.c -@@ -3354,6 +3354,31 @@ static void rtw89_dump_addr_cam(struct s - } - } - -+__printf(3, 4) -+static void rtw89_dump_pkt_offload(struct seq_file *m, struct list_head *pkt_list, -+ const char *fmt, ...) -+{ -+ struct rtw89_pktofld_info *info; -+ struct va_format vaf; -+ va_list args; -+ -+ if (list_empty(pkt_list)) -+ return; -+ -+ va_start(args, fmt); -+ vaf.va = &args; -+ vaf.fmt = fmt; -+ -+ seq_printf(m, "%pV", &vaf); -+ -+ va_end(args); -+ -+ list_for_each_entry(info, pkt_list, list) -+ seq_printf(m, "%d ", info->id); -+ -+ seq_puts(m, "\n"); -+} -+ - static - void rtw89_vif_ids_get_iter(void *data, u8 *mac, struct ieee80211_vif *vif) - { -@@ -3364,6 +3389,7 @@ void rtw89_vif_ids_get_iter(void *data, - seq_printf(m, "VIF [%d] %pM\n", rtwvif->mac_id, rtwvif->mac_addr); - seq_printf(m, "\tbssid_cam_idx=%u\n", bssid_cam->bssid_cam_idx); - rtw89_dump_addr_cam(m, &rtwvif->addr_cam); -+ rtw89_dump_pkt_offload(m, &rtwvif->general_pkt_list, "\tpkt_ofld[GENERAL]: "); - } - - static void rtw89_dump_ba_cam(struct seq_file *m, struct rtw89_sta *rtwsta) -@@ -3402,6 +3428,7 @@ static int rtw89_debug_priv_stations_get - struct rtw89_debugfs_priv *debugfs_priv = m->private; - struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; - struct rtw89_cam_info *cam_info = &rtwdev->cam_info; -+ u8 idx; - - mutex_lock(&rtwdev->mutex); - -@@ -3416,6 +3443,15 @@ static int rtw89_debug_priv_stations_get - cam_info->sec_cam_map); - seq_printf(m, "\tba_cam: %*ph\n", (int)sizeof(cam_info->ba_cam_map), - cam_info->ba_cam_map); -+ seq_printf(m, "\tpkt_ofld: %*ph\n", (int)sizeof(rtwdev->pkt_offload), -+ rtwdev->pkt_offload); -+ -+ for (idx = NL80211_BAND_2GHZ; idx < NUM_NL80211_BANDS; idx++) { -+ if (!(rtwdev->chip->support_bands & BIT(idx))) -+ continue; -+ rtw89_dump_pkt_offload(m, &rtwdev->scan_info.pkt_list[idx], -+ "\t\t[SCAN %u]: ", idx); -+ } - - ieee80211_iterate_active_interfaces_atomic(rtwdev->hw, - IEEE80211_IFACE_ITER_NORMAL, rtw89_vif_ids_get_iter, m); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-140-wifi-rtw89-8852b-reset-IDMEM-mode-to-default-value.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-140-wifi-rtw89-8852b-reset-IDMEM-mode-to-default-value.patch deleted file mode 100644 index d97f5367e..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-140-wifi-rtw89-8852b-reset-IDMEM-mode-to-default-value.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 2e5a65f5952fe451777066e99531abc6bc684573 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 23 Jan 2023 14:53:59 +0800 -Subject: [PATCH 140/149] wifi: rtw89: 8852b: reset IDMEM mode to default value - -For different firmware type, it could use different IDMEM mode, so reset -it to default to avoid encountering error during we bisect firmware -version, like - - rtw89_8852be 0000:03:00.0: Firmware version 0.29.26.0, cmd version 0, type 5 - rtw89_8852be 0000:03:00.0: Firmware version 0.29.26.0, cmd version 0, type 3 - rtw89_8852be 0000:03:00.0: fw security fail - rtw89_8852be 0000:03:00.0: download firmware fail - rtw89_8852be 0000:03:00.0: [ERR]fwdl 0x1E0 = 0x62 - rtw89_8852be 0000:03:00.0: [ERR]fwdl 0x83F2 = 0x8 - rtw89_8852be 0000:03:00.0: [ERR]fw PC = 0xb8931154 - rtw89_8852be 0000:03:00.0: [ERR]fw PC = 0xb8931154 - rtw89_8852be 0000:03:00.0: [ERR]fw PC = 0xb8931150 - rtw89_8852be 0000:03:00.0: [ERR]fw PC = 0xb8931154 - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230123065401.14174-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.c | 5 +++++ - drivers/net/wireless/realtek/rtw89/reg.h | 3 +++ - 2 files changed, 8 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -3414,6 +3414,11 @@ int rtw89_mac_enable_cpu(struct rtw89_de - val |= B_AX_WCPU_FWDL_EN; - - rtw89_write32(rtwdev, R_AX_WCPU_FW_CTRL, val); -+ -+ if (rtwdev->chip->chip_id == RTL8852B) -+ rtw89_write32_mask(rtwdev, R_AX_SEC_CTRL, -+ B_AX_SEC_IDMEM_SIZE_CONFIG_MASK, 0x2); -+ - rtw89_write16_mask(rtwdev, R_AX_BOOT_REASON, B_AX_BOOT_REASON_MASK, - boot_reason); - rtw89_write32_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_WCPU_EN); ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -275,6 +275,9 @@ - #define B_AX_S1_LDO2PWRCUT_F BIT(23) - #define B_AX_S0_LDO_VSEL_F_MASK GENMASK(22, 21) - -+#define R_AX_SEC_CTRL 0x0C00 -+#define B_AX_SEC_IDMEM_SIZE_CONFIG_MASK GENMASK(17, 16) -+ - #define R_AX_FILTER_MODEL_ADDR 0x0C04 - - #define R_AX_HAXI_INIT_CFG1 0x1000 diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-141-wifi-rtw89-8852b-don-t-support-LPS-PG-mode-after-fir.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-141-wifi-rtw89-8852b-don-t-support-LPS-PG-mode-after-fir.patch deleted file mode 100644 index 57dbcd56a..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-141-wifi-rtw89-8852b-don-t-support-LPS-PG-mode-after-fir.patch +++ /dev/null @@ -1,68 +0,0 @@ -From e5624482ba3e98f0c34fc72bca509c6017266253 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 23 Jan 2023 14:54:00 +0800 -Subject: [PATCH 141/149] wifi: rtw89: 8852b: don't support LPS-PG mode after - firmware 0.29.26.0 - -Due to firmware size limit of 8852b, LPS-PG mode isn't supported after -0.29.26.0, and then we have more space to support other features, such as -P2P-PS, hardware scan and so on. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230123065401.14174-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 6 ++++-- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - drivers/net/wireless/realtek/rtw89/fw.c | 1 + - 3 files changed, 6 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1764,7 +1764,8 @@ static enum rtw89_ps_mode rtw89_update_p - RTW89_CHK_FW_FEATURE(NO_DEEP_PS, &rtwdev->fw)) - return RTW89_PS_MODE_NONE; - -- if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_PWR_GATED)) -+ if ((chip->ps_mode_supported & BIT(RTW89_PS_MODE_PWR_GATED)) && -+ !RTW89_CHK_FW_FEATURE(NO_LPS_PG, &rtwdev->fw)) - return RTW89_PS_MODE_PWR_GATED; - - if (chip->ps_mode_supported & BIT(RTW89_PS_MODE_CLK_GATED)) -@@ -3160,7 +3161,6 @@ int rtw89_core_init(struct rtw89_dev *rt - rtw89_core_ppdu_sts_init(rtwdev); - rtw89_traffic_stats_init(rtwdev, &rtwdev->stats); - -- rtwdev->ps_mode = rtw89_update_ps_mode(rtwdev); - rtwdev->hal.rx_fltr = DEFAULT_AX_RX_FLTR; - - INIT_WORK(&btc->eapol_notify_work, rtw89_btc_ntfy_eapol_packet_work); -@@ -3316,6 +3316,8 @@ int rtw89_chip_info_setup(struct rtw89_d - if (ret) - return ret; - -+ rtwdev->ps_mode = rtw89_update_ps_mode(rtwdev); -+ - return 0; - } - EXPORT_SYMBOL(rtw89_chip_info_setup); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3023,6 +3023,7 @@ enum rtw89_fw_feature { - RTW89_FW_FEATURE_CRASH_TRIGGER, - RTW89_FW_FEATURE_PACKET_DROP, - RTW89_FW_FEATURE_NO_DEEP_PS, -+ RTW89_FW_FEATURE_NO_LPS_PG, - }; - - struct rtw89_fw_suit { ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -255,6 +255,7 @@ static const struct __fw_feat_cfg fw_fea - __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 35, 0, TX_WAKE), - __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 36, 0, CRASH_TRIGGER), - __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 38, 0, PACKET_DROP), -+ __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 26, 0, NO_LPS_PG), - __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 20, 0, PACKET_DROP), - __CFG_FW_FEAT(RTL8852C, le, 0, 27, 33, 0, NO_DEEP_PS), - __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 34, 0, TX_WAKE), diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-142-wifi-rtw89-8852b-try-to-use-NORMAL_CE-type-firmware-.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-142-wifi-rtw89-8852b-try-to-use-NORMAL_CE-type-firmware-.patch deleted file mode 100644 index e0a251c6e..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-142-wifi-rtw89-8852b-try-to-use-NORMAL_CE-type-firmware-.patch +++ /dev/null @@ -1,138 +0,0 @@ -From 7410bd727584ea9b3e1050c56fdf60d883398956 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 23 Jan 2023 14:54:01 +0800 -Subject: [PATCH 142/149] wifi: rtw89: 8852b: try to use NORMAL_CE type - firmware first - -New firmware type NORMAL_CE is introduced to support P2P-PS and hardware -scan, but no LPS-PG mode. After this patch, old firmware with NORMAL type -can still work well. - -The use of this new type is the same as before, so we add new type to -avoid taking wrong firmware. Then, driver log can also give clear -information about this change: - - rtw89_8852be 0000:03:00.0: Firmware version 0.29.26.0, cmd version 0, type 5 - rtw89_8852be 0000:03:00.0: Firmware version 0.29.26.0, cmd version 0, type 3 - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230123065401.14174-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 2 ++ - drivers/net/wireless/realtek/rtw89/fw.c | 22 ++++++++++++++----- - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 1 + - 5 files changed, 21 insertions(+), 6 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2848,6 +2848,7 @@ struct rtw89_chip_info { - enum rtw89_core_chip_id chip_id; - const struct rtw89_chip_ops *ops; - const char *fw_name; -+ bool try_ce_fw; - u32 fifo_size; - u32 dle_scc_rsvd_size; - u16 max_amsdu_limit; -@@ -3014,6 +3015,7 @@ static inline void rtw89_init_wait(struc - enum rtw89_fw_type { - RTW89_FW_NORMAL = 1, - RTW89_FW_WOWLAN = 3, -+ RTW89_FW_NORMAL_CE = 5, - }; - - enum rtw89_fw_feature { ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -152,7 +152,7 @@ static int rtw89_fw_hdr_parser(struct rt - - static - int rtw89_mfw_recognize(struct rtw89_dev *rtwdev, enum rtw89_fw_type type, -- struct rtw89_fw_suit *fw_suit) -+ struct rtw89_fw_suit *fw_suit, bool nowarn) - { - struct rtw89_fw_info *fw_info = &rtwdev->fw; - const u8 *mfw = fw_info->firmware->data; -@@ -183,7 +183,8 @@ int rtw89_mfw_recognize(struct rtw89_dev - return 0; - } - -- rtw89_err(rtwdev, "no suitable firmware found\n"); -+ if (!nowarn) -+ rtw89_err(rtwdev, "no suitable firmware found\n"); - return -ENOENT; - } - -@@ -211,12 +212,13 @@ static void rtw89_fw_update_ver(struct r - } - - static --int __rtw89_fw_recognize(struct rtw89_dev *rtwdev, enum rtw89_fw_type type) -+int __rtw89_fw_recognize(struct rtw89_dev *rtwdev, enum rtw89_fw_type type, -+ bool nowarn) - { - struct rtw89_fw_suit *fw_suit = rtw89_fw_suit_get(rtwdev, type); - int ret; - -- ret = rtw89_mfw_recognize(rtwdev, type, fw_suit); -+ ret = rtw89_mfw_recognize(rtwdev, type, fw_suit, nowarn); - if (ret) - return ret; - -@@ -343,14 +345,22 @@ out: - - int rtw89_fw_recognize(struct rtw89_dev *rtwdev) - { -+ const struct rtw89_chip_info *chip = rtwdev->chip; - int ret; - -- ret = __rtw89_fw_recognize(rtwdev, RTW89_FW_NORMAL); -+ if (chip->try_ce_fw) { -+ ret = __rtw89_fw_recognize(rtwdev, RTW89_FW_NORMAL_CE, true); -+ if (!ret) -+ goto normal_done; -+ } -+ -+ ret = __rtw89_fw_recognize(rtwdev, RTW89_FW_NORMAL, false); - if (ret) - return ret; - -+normal_done: - /* It still works if wowlan firmware isn't existing. */ -- __rtw89_fw_recognize(rtwdev, RTW89_FW_WOWLAN); -+ __rtw89_fw_recognize(rtwdev, RTW89_FW_WOWLAN, false); - - rtw89_fw_recognize_features(rtwdev); - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -2055,6 +2055,7 @@ const struct rtw89_chip_info rtw8852a_ch - .chip_id = RTL8852A, - .ops = &rtw8852a_chip_ops, - .fw_name = "rtw89/rtw8852a_fw.bin", -+ .try_ce_fw = false, - .fifo_size = 458752, - .dle_scc_rsvd_size = 0, - .max_amsdu_limit = 3500, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2430,6 +2430,7 @@ const struct rtw89_chip_info rtw8852b_ch - .chip_id = RTL8852B, - .ops = &rtw8852b_chip_ops, - .fw_name = "rtw89/rtw8852b_fw.bin", -+ .try_ce_fw = true, - .fifo_size = 196608, - .dle_scc_rsvd_size = 98304, - .max_amsdu_limit = 3500, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2857,6 +2857,7 @@ const struct rtw89_chip_info rtw8852c_ch - .chip_id = RTL8852C, - .ops = &rtw8852c_chip_ops, - .fw_name = "rtw89/rtw8852c_fw.bin", -+ .try_ce_fw = false, - .fifo_size = 458752, - .dle_scc_rsvd_size = 0, - .max_amsdu_limit = 8000, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-143-wifi-rtw89-8852be-enable-CLKREQ-of-PCI-capability.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-143-wifi-rtw89-8852be-enable-CLKREQ-of-PCI-capability.patch deleted file mode 100644 index 9183ec850..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-143-wifi-rtw89-8852be-enable-CLKREQ-of-PCI-capability.patch +++ /dev/null @@ -1,26 +0,0 @@ -From 3712888e3dba5df2b4f3fb3ba87e20bac6afc7c0 Mon Sep 17 00:00:00 2001 -From: Chin-Yen Lee -Date: Thu, 26 Jan 2023 19:27:15 +0800 -Subject: [PATCH 143/149] wifi: rtw89: 8852be: enable CLKREQ of PCI capability - -Enable CLKREQ to reduce power consumption for 8852BE. - -Signed-off-by: Chin-Yen Lee -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230126112715.5811-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/pci.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/pci.c -+++ b/drivers/net/wireless/realtek/rtw89/pci.c -@@ -3398,7 +3398,7 @@ static void rtw89_pci_clkreq_set(struct - if (ret) - rtw89_err(rtwdev, "failed to set CLKREQ Delay\n"); - -- if (chip_id == RTL8852A) { -+ if (chip_id == RTL8852A || chip_id == RTL8852B) { - if (enable) - ret = rtw89_pci_config_byte_set(rtwdev, - RTW89_PCIE_L1_CTRL, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-144-wifi-rtw89-use-passed-channel-in-set_tx_shape_dfir.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-144-wifi-rtw89-use-passed-channel-in-set_tx_shape_dfir.patch deleted file mode 100644 index 528f3db18..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-144-wifi-rtw89-use-passed-channel-in-set_tx_shape_dfir.patch +++ /dev/null @@ -1,78 +0,0 @@ -From 764f07f4565da0c0f94f24d18f9d6f5ddb39ccd8 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Wed, 1 Feb 2023 11:20:57 +0800 -Subject: [PATCH 144/149] wifi: rtw89: use passed channel in - set_tx_shape_dfir() - -In path of setting channel and setting TX power, the rtw89_chan instance -to be used is controlled by top and passed down. The set_tx_shape_dfir() -is in path of setting TX power, so it should use the passed rtw89_chan -instead of querying it itself. Otherwise, it might encounter mismatch -between parameters if multi-channel. - -For example, -rtw89_8852ce 0000:04:00.0: set tx shape dfir by unknown ch: 155 on 2GHz - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230201032057.7349-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 4 ++-- - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 4 ++-- - 2 files changed, 4 insertions(+), 4 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -1618,6 +1618,7 @@ static void rtw8852b_set_txpwr_ref(struc - } - - static void rtw8852b_bb_set_tx_shape_dfir(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, - u8 tx_shape_idx, - enum rtw89_phy_idx phy_idx) - { -@@ -1637,7 +1638,6 @@ static void rtw8852b_bb_set_tx_shape_dfi - __DECL_DFIR_PARAM(sharp_14, - 0x023B13FF, 0x001C42DE, 0x00FDB0AD, 0x00F60F6E, - 0x00FD8F92, 0x0602D011, 0x0001C02C, 0x00FFF00A); -- const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); - u8 ch = chan->channel; - const u32 *param; - u32 addr; -@@ -1678,7 +1678,7 @@ static void rtw8852b_set_tx_shape(struct - u8 tx_shape_ofdm = rtw89_8852b_tx_shape[band][RTW89_RS_OFDM][regd]; - - if (band == RTW89_BAND_2G) -- rtw8852b_bb_set_tx_shape_dfir(rtwdev, tx_shape_cck, phy_idx); -+ rtw8852b_bb_set_tx_shape_dfir(rtwdev, chan, tx_shape_cck, phy_idx); - - rtw89_phy_write32_mask(rtwdev, R_DCFO_OPT, B_TXSHAPE_TRIANGULAR_CFG, - tx_shape_ofdm); ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -1968,6 +1968,7 @@ static void rtw8852c_set_txpwr_ref(struc - } - - static void rtw8852c_bb_set_tx_shape_dfir(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, - u8 tx_shape_idx, - enum rtw89_phy_idx phy_idx) - { -@@ -1991,7 +1992,6 @@ static void rtw8852c_bb_set_tx_shape_dfi - __DECL_DFIR_ADDR(filter, - 0x45BC, 0x45CC, 0x45D0, 0x45D4, 0x45D8, 0x45C0, - 0x45C4, 0x45C8); -- const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); - u8 ch = chan->channel; - const u32 *param; - int i; -@@ -2032,7 +2032,7 @@ static void rtw8852c_set_tx_shape(struct - u8 tx_shape_ofdm = rtw89_8852c_tx_shape[band][RTW89_RS_OFDM][regd]; - - if (band == RTW89_BAND_2G) -- rtw8852c_bb_set_tx_shape_dfir(rtwdev, tx_shape_cck, phy_idx); -+ rtw8852c_bb_set_tx_shape_dfir(rtwdev, chan, tx_shape_cck, phy_idx); - - rtw89_phy_tssi_ctrl_set_bandedge_cfg(rtwdev, - (enum rtw89_mac_idx)phy_idx, diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-145-wifi-rtw89-8852b-correct-register-mask-name-of-TX-po.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-145-wifi-rtw89-8852b-correct-register-mask-name-of-TX-po.patch deleted file mode 100644 index f37b033d1..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-145-wifi-rtw89-8852b-correct-register-mask-name-of-TX-po.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 5466ee9a7c63e18d3daea0bf80152944648218d2 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 3 Feb 2023 14:49:07 +0800 -Subject: [PATCH 145/149] wifi: rtw89: 8852b: correct register mask name of TX - power offset - -For a packet with 1SS rate, it can also transmit via 2 antenna, called -2T mode. For 2T TX power offset, mask should be 2T as well. Fortunately, -the mask of 2T and 1T are the same, so it can still work well without -this fix. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230203064907.8046-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -1720,7 +1720,7 @@ void rtw8852b_set_txpwr_ul_tb_offset(str - - pw_ofst = max_t(s8, pw_ofst - 3, -16); - reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_2T, mac_idx); -- rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_MASK, pw_ofst); -+ rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_2T_MASK, pw_ofst); - } - - static int diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-146-wifi-rtw89-phy-set-TX-power-according-to-RF-path-num.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-146-wifi-rtw89-phy-set-TX-power-according-to-RF-path-num.patch deleted file mode 100644 index 2f06095f7..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-146-wifi-rtw89-phy-set-TX-power-according-to-RF-path-num.patch +++ /dev/null @@ -1,72 +0,0 @@ -From ddf9a2ead1676db46abe8acca3f689fd572a44d1 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Fri, 3 Feb 2023 14:51:57 +0800 -Subject: [PATCH 146/149] wifi: rtw89: phy: set TX power according to RF path - number by chip - -Previously, all supported chips had two RF paths. Therefore, these -codes used static number for TX power setting. Now, we are planning -to support a new chip which has only one RF path. So, we refine the -setting codes to refer to chip's RF path number at runtime. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230203065157.8227-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/phy.c | 9 ++++++--- - 1 file changed, 6 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -2042,6 +2042,7 @@ void rtw89_phy_set_txpwr_byrate(struct r - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx) - { -+ u8 max_nss_num = rtwdev->chip->rf_path_num; - static const u8 rs[] = { - RTW89_RS_CCK, - RTW89_RS_OFDM, -@@ -2064,7 +2065,7 @@ void rtw89_phy_set_txpwr_byrate(struct r - BUILD_BUG_ON(rtw89_rs_idx_max[RTW89_RS_HEDCM] % 4); - - addr = R_AX_PWR_BY_RATE; -- for (cur.nss = 0; cur.nss <= RTW89_NSS_2; cur.nss++) { -+ for (cur.nss = 0; cur.nss < max_nss_num; cur.nss++) { - for (i = 0; i < ARRAY_SIZE(rs); i++) { - if (cur.nss >= rtw89_rs_nss_max[rs[i]]) - continue; -@@ -2127,6 +2128,7 @@ void rtw89_phy_set_txpwr_limit(struct rt - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx) - { -+ u8 max_ntx_num = rtwdev->chip->rf_path_num; - struct rtw89_txpwr_limit lmt; - u8 ch = chan->channel; - u8 bw = chan->band_width; -@@ -2141,7 +2143,7 @@ void rtw89_phy_set_txpwr_limit(struct rt - RTW89_TXPWR_LMT_PAGE_SIZE); - - addr = R_AX_PWR_LMT; -- for (i = 0; i < RTW89_NTX_NUM; i++) { -+ for (i = 0; i < max_ntx_num; i++) { - rtw89_phy_fill_txpwr_limit(rtwdev, chan, &lmt, i); - - ptr = (s8 *)&lmt; -@@ -2162,6 +2164,7 @@ void rtw89_phy_set_txpwr_limit_ru(struct - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx) - { -+ u8 max_ntx_num = rtwdev->chip->rf_path_num; - struct rtw89_txpwr_limit_ru lmt_ru; - u8 ch = chan->channel; - u8 bw = chan->band_width; -@@ -2176,7 +2179,7 @@ void rtw89_phy_set_txpwr_limit_ru(struct - RTW89_TXPWR_LMT_RU_PAGE_SIZE); - - addr = R_AX_PWR_RU_LMT; -- for (i = 0; i < RTW89_NTX_NUM; i++) { -+ for (i = 0; i < max_ntx_num; i++) { - rtw89_phy_fill_txpwr_limit_ru(rtwdev, chan, &lmt_ru, i); - - ptr = (s8 *)&lmt_ru; diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-147-wifi-rtw89-use-readable-return-0-in-rtw89_mac_cfg_pp.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-147-wifi-rtw89-use-readable-return-0-in-rtw89_mac_cfg_pp.patch deleted file mode 100644 index c9fbe6a84..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-147-wifi-rtw89-use-readable-return-0-in-rtw89_mac_cfg_pp.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 210871887208d1098d65b9bb597e7f9aa1c66900 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 13 Feb 2023 17:13:28 +0800 -Subject: [PATCH 147/149] wifi: rtw89: use readable return 0 in - rtw89_mac_cfg_ppdu_status() - -For normal (successful) flow, it must return 0. The original code uses -'return ret', and then we need to backward reference to initial value to -know 'ret = 0'. Changing them to 'return 0', because it will be more -readable and intuitive. This patch doesn't change logic at all. - -Reported-by: kernel test robot -Reported-by: Dan Carpenter -Link: https://lore.kernel.org/r/202302101023.ctlih5q0-lkp@intel.com/ -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230213091328.25481-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.c | 6 +++--- - 1 file changed, 3 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -4554,7 +4554,7 @@ EXPORT_SYMBOL(rtw89_mac_get_txpwr_cr); - int rtw89_mac_cfg_ppdu_status(struct rtw89_dev *rtwdev, u8 mac_idx, bool enable) - { - u32 reg = rtw89_mac_reg_by_idx(R_AX_PPDU_STAT, mac_idx); -- int ret = 0; -+ int ret; - - ret = rtw89_mac_check_mac_en(rtwdev, mac_idx, RTW89_CMAC_SEL); - if (ret) -@@ -4562,7 +4562,7 @@ int rtw89_mac_cfg_ppdu_status(struct rtw - - if (!enable) { - rtw89_write32_clr(rtwdev, reg, B_AX_PPDU_STAT_RPT_EN); -- return ret; -+ return 0; - } - - rtw89_write32(rtwdev, reg, B_AX_PPDU_STAT_RPT_EN | -@@ -4572,7 +4572,7 @@ int rtw89_mac_cfg_ppdu_status(struct rtw - rtw89_write32_mask(rtwdev, R_AX_HW_RPT_FWD, B_AX_FWD_PPDU_STAT_MASK, - RTW89_PRPT_DEST_HOST); - -- return ret; -+ return 0; - } - EXPORT_SYMBOL(rtw89_mac_cfg_ppdu_status); - diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-148-wifi-rtw89-move-H2C-of-del_pkt_offload-before-pollin.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-148-wifi-rtw89-move-H2C-of-del_pkt_offload-before-pollin.patch deleted file mode 100644 index 6a515c231..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-148-wifi-rtw89-move-H2C-of-del_pkt_offload-before-pollin.patch +++ /dev/null @@ -1,38 +0,0 @@ -From ce1ba4d782d94fc8ed9116c774e2e5885626836b Mon Sep 17 00:00:00 2001 -From: Chin-Yen Lee -Date: Tue, 14 Feb 2023 19:43:14 +0800 -Subject: [PATCH 148/149] wifi: rtw89: move H2C of del_pkt_offload before - polling FW status ready - -The H2C of del_pkt_offload must be called before polling FW status -ready, otherwise the following downloading normal FW will fail. - -Fixes: 5c12bb66b79d ("wifi: rtw89: refine packet offload flow") -Signed-off-by: Chin-Yen Lee -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230214114314.5268-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/wow.c | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/wow.c -+++ b/drivers/net/wireless/realtek/rtw89/wow.c -@@ -710,6 +710,8 @@ static int rtw89_wow_fw_stop(struct rtw8 - goto out; - } - -+ rtw89_fw_release_general_pkt_list(rtwdev, true); -+ - ret = rtw89_wow_check_fw_status(rtwdev, false); - if (ret) { - rtw89_err(rtwdev, "wow: failed to check disable fw ready\n"); -@@ -779,8 +781,6 @@ static int rtw89_wow_disable(struct rtw8 - goto out; - } - -- rtw89_fw_release_general_pkt_list(rtwdev, true); -- - ret = rtw89_wow_swap_fw(rtwdev, false); - if (ret) { - rtw89_err(rtwdev, "wow: failed to disable trx_post\n"); diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-149-wifi-rtw89-fix-AP-mode-authentication-transmission-f.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-149-wifi-rtw89-fix-AP-mode-authentication-transmission-f.patch deleted file mode 100644 index 5836ff7a1..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-149-wifi-rtw89-fix-AP-mode-authentication-transmission-f.patch +++ /dev/null @@ -1,109 +0,0 @@ -From 0731d0b664f26f54b6293421af54da15b9eb1c8c Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Thu, 16 Feb 2023 16:28:07 +0800 -Subject: [PATCH 149/149] wifi: rtw89: fix AP mode authentication transmission - failed - -For some ICs, packets can't be sent correctly without initializing -CMAC table first. Previous flow do this initialization after -associated, results in authentication response fails to transmit. -Move the initialization up front to a proper place to solve this. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230216082807.22285-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 47 +++++++++++++---------- - 1 file changed, 26 insertions(+), 21 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -2435,6 +2435,7 @@ int rtw89_core_sta_add(struct rtw89_dev - struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; - struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; - int i; -+ int ret; - - rtwsta->rtwdev = rtwdev; - rtwsta->rtwvif = rtwvif; -@@ -2459,6 +2460,21 @@ int rtw89_core_sta_add(struct rtw89_dev - RTW89_MAX_MAC_ID_NUM); - if (rtwsta->mac_id == RTW89_MAX_MAC_ID_NUM) - return -ENOSPC; -+ -+ ret = rtw89_mac_set_macid_pause(rtwdev, rtwsta->mac_id, false); -+ if (ret) { -+ rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwsta->mac_id); -+ rtw89_warn(rtwdev, "failed to send h2c macid pause\n"); -+ return ret; -+ } -+ -+ ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta, -+ RTW89_ROLE_CREATE); -+ if (ret) { -+ rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwsta->mac_id); -+ rtw89_warn(rtwdev, "failed to send h2c role info\n"); -+ return ret; -+ } - } - - return 0; -@@ -2513,14 +2529,6 @@ int rtw89_core_sta_disconnect(struct rtw - return ret; - } - -- if (vif->type == NL80211_IFTYPE_AP || sta->tdls) { -- ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta, RTW89_ROLE_REMOVE); -- if (ret) { -- rtw89_warn(rtwdev, "failed to send h2c role info\n"); -- return ret; -- } -- } -- - /* update cam aid mac_id net_type */ - ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL); - if (ret) { -@@ -2541,18 +2549,6 @@ int rtw89_core_sta_assoc(struct rtw89_de - int ret; - - if (vif->type == NL80211_IFTYPE_AP || sta->tdls) { -- ret = rtw89_mac_set_macid_pause(rtwdev, rtwsta->mac_id, false); -- if (ret) { -- rtw89_warn(rtwdev, "failed to send h2c macid pause\n"); -- return ret; -- } -- -- ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta, RTW89_ROLE_CREATE); -- if (ret) { -- rtw89_warn(rtwdev, "failed to send h2c role info\n"); -- return ret; -- } -- - if (sta->tdls) { - ret = rtw89_cam_init_bssid_cam(rtwdev, rtwvif, bssid_cam, sta->addr); - if (ret) { -@@ -2622,13 +2618,22 @@ int rtw89_core_sta_remove(struct rtw89_d - { - struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; - struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ int ret; - - if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) - rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, - BTC_ROLE_MSTS_STA_DIS_CONN); -- else if (vif->type == NL80211_IFTYPE_AP || sta->tdls) -+ else if (vif->type == NL80211_IFTYPE_AP || sta->tdls) { - rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwsta->mac_id); - -+ ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta, -+ RTW89_ROLE_REMOVE); -+ if (ret) { -+ rtw89_warn(rtwdev, "failed to send h2c role info\n"); -+ return ret; -+ } -+ } -+ - return 0; - } - diff --git a/package/kernel/mac80211/patches/rtl/201-v6.3-150-add-realtek-rtl8852be.patch b/package/kernel/mac80211/patches/rtl/201-v6.3-150-add-realtek-rtl8852be.patch deleted file mode 100644 index de49ee0c4..000000000 --- a/package/kernel/mac80211/patches/rtl/201-v6.3-150-add-realtek-rtl8852be.patch +++ /dev/null @@ -1,44 +0,0 @@ ---- a/Kconfig.local -+++ b/Kconfig.local -@@ -1192,12 +1192,18 @@ config BACKPORTED_RTW89_PCI - config BACKPORTED_RTW89_8852A - tristate - default RTW89_8852A -+config BACKPORTED_RTW89_8852B -+ tristate -+ default RTW89_8852B - config BACKPORTED_RTW89_8852C - tristate - default RTW89_8852C - config BACKPORTED_RTW89_8852AE - tristate - default RTW89_8852AE -+config BACKPORTED_RTW89_8852BE -+ tristate -+ default RTW89_8852BE - config BACKPORTED_RTW89_8852CE - tristate - default RTW89_8852CE ---- a/defconfigs/wifi -+++ b/defconfigs/wifi -@@ -129,6 +129,7 @@ CPTCFG_RTW88_8822CE=m - CPTCFG_RTW88_8822CU=m - CPTCFG_RTW88=m - CPTCFG_RTW89_8852AE=m -+CPTCFG_RTW89_8852BE=m - CPTCFG_RTW89_8852CE=m - CPTCFG_RTW89=m - CPTCFG_SSB=m ---- a/local-symbols -+++ b/local-symbols -@@ -394,8 +394,10 @@ RTW89= - RTW89_CORE= - RTW89_PCI= - RTW89_8852A= -+RTW89_8852B= - RTW89_8852C= - RTW89_8852AE= -+RTW89_8852BE= - RTW89_8852CE= - RTW89_DEBUG= - RTW89_DEBUGMSG= diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-001-wifi-rtw89-add-RNR-support-for-6-GHz-scan.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-001-wifi-rtw89-add-RNR-support-for-6-GHz-scan.patch deleted file mode 100644 index 43121a4b3..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-001-wifi-rtw89-add-RNR-support-for-6-GHz-scan.patch +++ /dev/null @@ -1,305 +0,0 @@ -From c6aa9a9c47252ac7b07ed6d10459027e2f2a2de0 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Fri, 17 Feb 2023 20:00:07 +0800 -Subject: [PATCH 001/136] wifi: rtw89: add RNR support for 6 GHz scan - -Since 6 GHz band has around 60 channels and more strict rules for -active probing. Reduced neighbor report can be used to reduce the -channels we scan and get specific target BSS info to probe for. - -Declare flag WIPHY_FLAG_SPLIT_SCAN_6GHZ so the scan request could be -divided into two portions: legacy bands and 6 GHz bands. So RNR -information from legacy bands could later be used when 6 GHz scan. - -When the scan flag NL80211_SCAN_FLAG_COLOCATED_6GHZ is set, cfg80211 -will pass down a reduced channel set which contains PSCs and non-PSC -with RNR info received in the 2 GHz/5 GHz band. This reduces the -scan duration by allowing us to only scan for channels in which APs -are currently operating. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230217120007.8835-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 35 +++++- - drivers/net/wireless/realtek/rtw89/fw.c | 136 +++++++++++++++++++--- - drivers/net/wireless/realtek/rtw89/fw.h | 7 ++ - 3 files changed, 162 insertions(+), 16 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1400,6 +1400,34 @@ static void rtw89_stats_trigger_frame(st - } - } - -+static void rtw89_core_cancel_6ghz_probe_tx(struct rtw89_dev *rtwdev, -+ struct sk_buff *skb) -+{ -+ struct ieee80211_rx_status *rx_status = IEEE80211_SKB_RXCB(skb); -+ struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)skb->data; -+ struct list_head *pkt_list = rtwdev->scan_info.pkt_list; -+ struct rtw89_pktofld_info *info; -+ const u8 *ies = mgmt->u.beacon.variable, *ssid_ie; -+ -+ if (rx_status->band != NL80211_BAND_6GHZ) -+ return; -+ -+ ssid_ie = cfg80211_find_ie(WLAN_EID_SSID, ies, skb->len); -+ -+ list_for_each_entry(info, &pkt_list[NL80211_BAND_6GHZ], list) { -+ if (ether_addr_equal(info->bssid, mgmt->bssid)) { -+ rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id); -+ continue; -+ } -+ -+ if (!ssid_ie || ssid_ie[1] != info->ssid_len || info->ssid_len == 0) -+ continue; -+ -+ if (memcmp(&ssid_ie[2], info->ssid, info->ssid_len) == 0) -+ rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id); -+ } -+} -+ - static void rtw89_vif_rx_stats_iter(void *data, u8 *mac, - struct ieee80211_vif *vif) - { -@@ -1412,6 +1440,11 @@ static void rtw89_vif_rx_stats_iter(void - struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; - const u8 *bssid = iter_data->bssid; - -+ if (rtwdev->scanning && -+ (ieee80211_is_beacon(hdr->frame_control) || -+ ieee80211_is_probe_resp(hdr->frame_control))) -+ rtw89_core_cancel_6ghz_probe_tx(rtwdev, skb); -+ - if (!vif->bss_conf.bssid) - return; - -@@ -3372,7 +3405,7 @@ static int rtw89_core_register_hw(struct - - hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS | - WIPHY_FLAG_TDLS_EXTERNAL_SETUP | -- WIPHY_FLAG_AP_UAPSD; -+ WIPHY_FLAG_AP_UAPSD | WIPHY_FLAG_SPLIT_SCAN_6GHZ; - hw->wiphy->features |= NL80211_FEATURE_SCAN_RANDOM_MAC_ADDR; - - hw->wiphy->max_scan_ssids = RTW89_SCANOFLD_MAX_SSID; ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -2702,9 +2702,29 @@ static void rtw89_release_pkt_list(struc - } - } - -+static bool rtw89_is_6ghz_wildcard_probe_req(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, -+ struct rtw89_pktofld_info *info, -+ enum nl80211_band band, u8 ssid_idx) -+{ -+ struct cfg80211_scan_request *req = rtwvif->scan_req; -+ -+ if (band != NL80211_BAND_6GHZ) -+ return false; -+ -+ if (req->ssids[ssid_idx].ssid_len) { -+ memcpy(info->ssid, req->ssids[ssid_idx].ssid, -+ req->ssids[ssid_idx].ssid_len); -+ info->ssid_len = req->ssids[ssid_idx].ssid_len; -+ return false; -+ } else { -+ return true; -+ } -+} -+ - static int rtw89_append_probe_req_ie(struct rtw89_dev *rtwdev, - struct rtw89_vif *rtwvif, -- struct sk_buff *skb) -+ struct sk_buff *skb, u8 ssid_idx) - { - struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info; - struct ieee80211_scan_ies *ies = rtwvif->scan_ies; -@@ -2732,6 +2752,13 @@ static int rtw89_append_probe_req_ie(str - goto out; - } - -+ if (rtw89_is_6ghz_wildcard_probe_req(rtwdev, rtwvif, info, band, -+ ssid_idx)) { -+ kfree_skb(new); -+ kfree(info); -+ goto out; -+ } -+ - ret = rtw89_fw_h2c_add_pkt_offload(rtwdev, &info->id, new); - if (ret) { - kfree_skb(new); -@@ -2762,7 +2789,7 @@ static int rtw89_hw_scan_update_probe_re - if (!skb) - return -ENOMEM; - -- ret = rtw89_append_probe_req_ie(rtwdev, rtwvif, skb); -+ ret = rtw89_append_probe_req_ie(rtwdev, rtwvif, skb, i); - kfree_skb(skb); - - if (ret) -@@ -2772,6 +2799,77 @@ static int rtw89_hw_scan_update_probe_re - return 0; - } - -+static int rtw89_update_6ghz_rnr_chan(struct rtw89_dev *rtwdev, -+ struct cfg80211_scan_request *req, -+ struct rtw89_mac_chinfo *ch_info) -+{ -+ struct ieee80211_vif *vif = rtwdev->scan_info.scanning_vif; -+ struct list_head *pkt_list = rtwdev->scan_info.pkt_list; -+ struct rtw89_vif *rtwvif = vif_to_rtwvif_safe(vif); -+ struct ieee80211_scan_ies *ies = rtwvif->scan_ies; -+ struct cfg80211_scan_6ghz_params *params; -+ struct rtw89_pktofld_info *info, *tmp; -+ struct ieee80211_hdr *hdr; -+ struct sk_buff *skb; -+ bool found; -+ int ret = 0; -+ u8 i; -+ -+ if (!req->n_6ghz_params) -+ return 0; -+ -+ for (i = 0; i < req->n_6ghz_params; i++) { -+ params = &req->scan_6ghz_params[i]; -+ -+ if (req->channels[params->channel_idx]->hw_value != -+ ch_info->pri_ch) -+ continue; -+ -+ found = false; -+ list_for_each_entry(tmp, &pkt_list[NL80211_BAND_6GHZ], list) { -+ if (ether_addr_equal(tmp->bssid, params->bssid)) { -+ found = true; -+ break; -+ } -+ } -+ if (found) -+ continue; -+ -+ skb = ieee80211_probereq_get(rtwdev->hw, rtwvif->mac_addr, -+ NULL, 0, req->ie_len); -+ skb_put_data(skb, ies->ies[NL80211_BAND_6GHZ], ies->len[NL80211_BAND_6GHZ]); -+ skb_put_data(skb, ies->common_ies, ies->common_ie_len); -+ hdr = (struct ieee80211_hdr *)skb->data; -+ ether_addr_copy(hdr->addr3, params->bssid); -+ -+ info = kzalloc(sizeof(*info), GFP_KERNEL); -+ if (!info) { -+ ret = -ENOMEM; -+ kfree_skb(skb); -+ goto out; -+ } -+ -+ ret = rtw89_fw_h2c_add_pkt_offload(rtwdev, &info->id, skb); -+ if (ret) { -+ kfree_skb(skb); -+ kfree(info); -+ goto out; -+ } -+ -+ ether_addr_copy(info->bssid, params->bssid); -+ info->channel_6ghz = req->channels[params->channel_idx]->hw_value; -+ list_add_tail(&info->list, &rtwdev->scan_info.pkt_list[NL80211_BAND_6GHZ]); -+ -+ ch_info->tx_pkt = true; -+ ch_info->period = RTW89_CHANNEL_TIME_6G + RTW89_DWELL_TIME_6G; -+ -+ kfree_skb(skb); -+ } -+ -+out: -+ return ret; -+} -+ - static void rtw89_hw_scan_add_chan(struct rtw89_dev *rtwdev, int chan_type, - int ssid_num, - struct rtw89_mac_chinfo *ch_info) -@@ -2782,6 +2880,7 @@ static void rtw89_hw_scan_add_chan(struc - struct cfg80211_scan_request *req = rtwvif->scan_req; - struct rtw89_pktofld_info *info; - u8 band, probe_count = 0; -+ int ret; - - ch_info->notify_action = RTW89_SCANOFLD_DEBUG_MASK; - ch_info->dfs_ch = chan_type == RTW89_CHAN_DFS; -@@ -2793,25 +2892,31 @@ static void rtw89_hw_scan_add_chan(struc - ch_info->pause_data = false; - ch_info->probe_id = RTW89_SCANOFLD_PKT_NONE; - -+ if (ch_info->ch_band == RTW89_BAND_6G) { -+ if ((ssid_num == 1 && req->ssids[0].ssid_len == 0) || -+ !ch_info->is_psc) { -+ ch_info->tx_pkt = false; -+ if (!req->duration_mandatory) -+ ch_info->period -= RTW89_DWELL_TIME_6G; -+ } -+ } -+ -+ ret = rtw89_update_6ghz_rnr_chan(rtwdev, req, ch_info); -+ if (ret) -+ rtw89_warn(rtwdev, "RNR fails: %d\n", ret); -+ - if (ssid_num) { -- ch_info->num_pkt = ssid_num; - band = rtw89_hw_to_nl80211_band(ch_info->ch_band); - - list_for_each_entry(info, &scan_info->pkt_list[band], list) { -- ch_info->pkt_id[probe_count] = info->id; -- if (++probe_count >= ssid_num) -+ if (info->channel_6ghz && -+ ch_info->pri_ch != info->channel_6ghz) -+ continue; -+ ch_info->pkt_id[probe_count++] = info->id; -+ if (probe_count >= RTW89_SCANOFLD_MAX_SSID) - break; - } -- if (probe_count != ssid_num) -- rtw89_err(rtwdev, "SSID num differs from list len\n"); -- } -- -- if (ch_info->ch_band == RTW89_BAND_6G) { -- if (ssid_num == 1 && req->ssids[0].ssid_len == 0) { -- ch_info->tx_pkt = false; -- if (!req->duration_mandatory) -- ch_info->period -= RTW89_DWELL_TIME_6G; -- } -+ ch_info->num_pkt = probe_count; - } - - switch (chan_type) { -@@ -2872,6 +2977,7 @@ static int rtw89_hw_scan_add_chan_list(s - ch_info->central_ch = channel->hw_value; - ch_info->pri_ch = channel->hw_value; - ch_info->rand_seq_num = random_seq; -+ ch_info->is_psc = cfg80211_channel_is_psc(channel); - - if (channel->flags & - (IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR)) ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -237,6 +237,7 @@ struct rtw89_mac_chinfo { - u16 tx_pwr_idx; - u8 rsvd1; - struct list_head list; -+ bool is_psc; - }; - - struct rtw89_scan_option { -@@ -247,6 +248,12 @@ struct rtw89_scan_option { - struct rtw89_pktofld_info { - struct list_head list; - u8 id; -+ -+ /* Below fields are for 6 GHz RNR use only */ -+ u8 ssid[IEEE80211_MAX_SSID_LEN]; -+ u8 ssid_len; -+ u8 bssid[ETH_ALEN]; -+ u16 channel_6ghz; - }; - - static inline void RTW89_SET_FWCMD_RA_IS_DIS(void *cmd, u32 val) diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-002-wifi-rtw89-add-tx_wake-notify-for-8852B.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-002-wifi-rtw89-add-tx_wake-notify-for-8852B.patch deleted file mode 100644 index 81441d8b3..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-002-wifi-rtw89-add-tx_wake-notify-for-8852B.patch +++ /dev/null @@ -1,27 +0,0 @@ -From aa4e055945462e645224795e174c25c82f6002ac Mon Sep 17 00:00:00 2001 -From: Chin-Yen Lee -Date: Mon, 20 Feb 2023 15:01:57 +0800 -Subject: [PATCH 002/136] wifi: rtw89: add tx_wake notify for 8852B - -8852B has the same issue: management frames get stuck when wifi -chip enters low ps mode, so we alse add notify wake function to -trigger wifi chip wake before forwarding management frames. - -Signed-off-by: Chin-Yen Lee -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230220070202.29868-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -258,6 +258,7 @@ static const struct __fw_feat_cfg fw_fea - __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 36, 0, CRASH_TRIGGER), - __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 38, 0, PACKET_DROP), - __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 26, 0, NO_LPS_PG), -+ __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 26, 0, TX_WAKE), - __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 20, 0, PACKET_DROP), - __CFG_FW_FEAT(RTL8852C, le, 0, 27, 33, 0, NO_DEEP_PS), - __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 34, 0, TX_WAKE), diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-003-wifi-rtw89-fw-configure-CRASH_TRIGGER-feature-for-88.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-003-wifi-rtw89-fw-configure-CRASH_TRIGGER-feature-for-88.patch deleted file mode 100644 index df0c258fd..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-003-wifi-rtw89-fw-configure-CRASH_TRIGGER-feature-for-88.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 31c416e69dbf416583d0d8245d91e7e82b7846b1 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Mon, 20 Feb 2023 15:01:58 +0800 -Subject: [PATCH 003/136] wifi: rtw89: fw: configure CRASH_TRIGGER feature for - 8852B - -RTL8852B firmware supports CRASH_TRIGGER feature from v0.29.29.0. -After this is configured, debugfs fw_crash can support type 1 on -RTL8852B to trigger firmware crash and verify L2 recovery through -simulation. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230220070202.29868-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -259,6 +259,7 @@ static const struct __fw_feat_cfg fw_fea - __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 38, 0, PACKET_DROP), - __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 26, 0, NO_LPS_PG), - __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 26, 0, TX_WAKE), -+ __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 29, 0, CRASH_TRIGGER), - __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 20, 0, PACKET_DROP), - __CFG_FW_FEAT(RTL8852C, le, 0, 27, 33, 0, NO_DEEP_PS), - __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 34, 0, TX_WAKE), diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-004-wifi-rtw89-adjust-channel-encoding-to-common-functio.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-004-wifi-rtw89-adjust-channel-encoding-to-common-functio.patch deleted file mode 100644 index f4ecb6bb9..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-004-wifi-rtw89-adjust-channel-encoding-to-common-functio.patch +++ /dev/null @@ -1,207 +0,0 @@ -From bb9040b3ff970529ceaa20b064c113d5ffd5520f Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Mon, 20 Feb 2023 15:01:59 +0800 -Subject: [PATCH 004/136] wifi: rtw89: adjust channel encoding to common - function - -Since the range of channel table is identical among ICs. Make channel -encode/decode function common and not IC dependent. So all ICs with -matching firmware that needs this kind of coding can use it directly. -This patch doesn't change logic at all. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230220070202.29868-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/phy.c | 72 ++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/phy.h | 3 + - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 74 +------------------ - 3 files changed, 77 insertions(+), 72 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -4294,3 +4294,75 @@ void rtw89_phy_tssi_ctrl_set_bandedge_cf - data[RTW89_TSSI_SBW20]); - } - EXPORT_SYMBOL(rtw89_phy_tssi_ctrl_set_bandedge_cfg); -+ -+static -+const u8 rtw89_ch_base_table[16] = {1, 0xff, -+ 36, 100, 132, 149, 0xff, -+ 1, 33, 65, 97, 129, 161, 193, 225, 0xff}; -+#define RTW89_CH_BASE_IDX_2G 0 -+#define RTW89_CH_BASE_IDX_5G_FIRST 2 -+#define RTW89_CH_BASE_IDX_5G_LAST 5 -+#define RTW89_CH_BASE_IDX_6G_FIRST 7 -+#define RTW89_CH_BASE_IDX_6G_LAST 14 -+ -+#define RTW89_CH_BASE_IDX_MASK GENMASK(7, 4) -+#define RTW89_CH_OFFSET_MASK GENMASK(3, 0) -+ -+u8 rtw89_encode_chan_idx(struct rtw89_dev *rtwdev, u8 central_ch, u8 band) -+{ -+ u8 chan_idx; -+ u8 last, first; -+ u8 idx; -+ -+ switch (band) { -+ case RTW89_BAND_2G: -+ chan_idx = FIELD_PREP(RTW89_CH_BASE_IDX_MASK, RTW89_CH_BASE_IDX_2G) | -+ FIELD_PREP(RTW89_CH_OFFSET_MASK, central_ch); -+ return chan_idx; -+ case RTW89_BAND_5G: -+ first = RTW89_CH_BASE_IDX_5G_FIRST; -+ last = RTW89_CH_BASE_IDX_5G_LAST; -+ break; -+ case RTW89_BAND_6G: -+ first = RTW89_CH_BASE_IDX_6G_FIRST; -+ last = RTW89_CH_BASE_IDX_6G_LAST; -+ break; -+ default: -+ rtw89_warn(rtwdev, "Unsupported band %d\n", band); -+ return 0; -+ } -+ -+ for (idx = last; idx >= first; idx--) -+ if (central_ch >= rtw89_ch_base_table[idx]) -+ break; -+ -+ if (idx < first) { -+ rtw89_warn(rtwdev, "Unknown band %d channel %d\n", band, central_ch); -+ return 0; -+ } -+ -+ chan_idx = FIELD_PREP(RTW89_CH_BASE_IDX_MASK, idx) | -+ FIELD_PREP(RTW89_CH_OFFSET_MASK, -+ (central_ch - rtw89_ch_base_table[idx]) >> 1); -+ return chan_idx; -+} -+EXPORT_SYMBOL(rtw89_encode_chan_idx); -+ -+void rtw89_decode_chan_idx(struct rtw89_dev *rtwdev, u8 chan_idx, -+ u8 *ch, enum nl80211_band *band) -+{ -+ u8 idx, offset; -+ -+ idx = FIELD_GET(RTW89_CH_BASE_IDX_MASK, chan_idx); -+ offset = FIELD_GET(RTW89_CH_OFFSET_MASK, chan_idx); -+ -+ if (idx == RTW89_CH_BASE_IDX_2G) { -+ *band = NL80211_BAND_2GHZ; -+ *ch = offset; -+ return; -+ } -+ -+ *band = idx <= RTW89_CH_BASE_IDX_5G_LAST ? NL80211_BAND_5GHZ : NL80211_BAND_6GHZ; -+ *ch = rtw89_ch_base_table[idx] + (offset << 1); -+} -+EXPORT_SYMBOL(rtw89_decode_chan_idx); ---- a/drivers/net/wireless/realtek/rtw89/phy.h -+++ b/drivers/net/wireless/realtek/rtw89/phy.h -@@ -555,5 +555,8 @@ void rtw89_phy_tssi_ctrl_set_bandedge_cf - enum rtw89_tssi_bandedge_cfg bandedge_cfg); - void rtw89_phy_ul_tb_assoc(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); - void rtw89_phy_ul_tb_ctrl_track(struct rtw89_dev *rtwdev); -+u8 rtw89_encode_chan_idx(struct rtw89_dev *rtwdev, u8 central_ch, u8 band); -+void rtw89_decode_chan_idx(struct rtw89_dev *rtwdev, u8 chan_idx, -+ u8 *ch, enum nl80211_band *band); - - #endif ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -852,76 +852,6 @@ static void rtw8852c_set_gain_error(stru - } - } - --static --const u8 rtw8852c_ch_base_table[16] = {1, 0xff, -- 36, 100, 132, 149, 0xff, -- 1, 33, 65, 97, 129, 161, 193, 225, 0xff}; --#define RTW8852C_CH_BASE_IDX_2G 0 --#define RTW8852C_CH_BASE_IDX_5G_FIRST 2 --#define RTW8852C_CH_BASE_IDX_5G_LAST 5 --#define RTW8852C_CH_BASE_IDX_6G_FIRST 7 --#define RTW8852C_CH_BASE_IDX_6G_LAST 14 -- --#define RTW8852C_CH_BASE_IDX_MASK GENMASK(7, 4) --#define RTW8852C_CH_OFFSET_MASK GENMASK(3, 0) -- --static u8 rtw8852c_encode_chan_idx(struct rtw89_dev *rtwdev, u8 central_ch, u8 band) --{ -- u8 chan_idx; -- u8 last, first; -- u8 idx; -- -- switch (band) { -- case RTW89_BAND_2G: -- chan_idx = FIELD_PREP(RTW8852C_CH_BASE_IDX_MASK, RTW8852C_CH_BASE_IDX_2G) | -- FIELD_PREP(RTW8852C_CH_OFFSET_MASK, central_ch); -- return chan_idx; -- case RTW89_BAND_5G: -- first = RTW8852C_CH_BASE_IDX_5G_FIRST; -- last = RTW8852C_CH_BASE_IDX_5G_LAST; -- break; -- case RTW89_BAND_6G: -- first = RTW8852C_CH_BASE_IDX_6G_FIRST; -- last = RTW8852C_CH_BASE_IDX_6G_LAST; -- break; -- default: -- rtw89_warn(rtwdev, "Unsupported band %d\n", band); -- return 0; -- } -- -- for (idx = last; idx >= first; idx--) -- if (central_ch >= rtw8852c_ch_base_table[idx]) -- break; -- -- if (idx < first) { -- rtw89_warn(rtwdev, "Unknown band %d channel %d\n", band, central_ch); -- return 0; -- } -- -- chan_idx = FIELD_PREP(RTW8852C_CH_BASE_IDX_MASK, idx) | -- FIELD_PREP(RTW8852C_CH_OFFSET_MASK, -- (central_ch - rtw8852c_ch_base_table[idx]) >> 1); -- return chan_idx; --} -- --static void rtw8852c_decode_chan_idx(struct rtw89_dev *rtwdev, u8 chan_idx, -- u8 *ch, enum nl80211_band *band) --{ -- u8 idx, offset; -- -- idx = FIELD_GET(RTW8852C_CH_BASE_IDX_MASK, chan_idx); -- offset = FIELD_GET(RTW8852C_CH_OFFSET_MASK, chan_idx); -- -- if (idx == RTW8852C_CH_BASE_IDX_2G) { -- *band = NL80211_BAND_2GHZ; -- *ch = offset; -- return; -- } -- -- *band = idx <= RTW8852C_CH_BASE_IDX_5G_LAST ? NL80211_BAND_5GHZ : NL80211_BAND_6GHZ; -- *ch = rtw8852c_ch_base_table[idx] + (offset << 1); --} -- - static void rtw8852c_set_gain_offset(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx, -@@ -1084,7 +1014,7 @@ static void rtw8852c_ctrl_ch(struct rtw8 - } - } - -- chan_idx = rtw8852c_encode_chan_idx(rtwdev, chan->primary_channel, band); -+ chan_idx = rtw89_encode_chan_idx(rtwdev, chan->primary_channel, band); - rtw89_phy_write32_idx(rtwdev, R_MAC_PIN_SEL, B_CH_IDX_SEG0, chan_idx, phy_idx); - } - -@@ -2730,7 +2660,7 @@ static void rtw8852c_fill_freq_with_ppdu - if (chan_idx == 0) - return; - -- rtw8852c_decode_chan_idx(rtwdev, chan_idx, &ch, &band); -+ rtw89_decode_chan_idx(rtwdev, chan_idx, &ch, &band); - status->freq = ieee80211_channel_to_frequency(ch, band); - status->band = band; - } diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-005-wifi-rtw89-8852b-add-channel-encoding-for-hw_scan.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-005-wifi-rtw89-8852b-add-channel-encoding-for-hw_scan.patch deleted file mode 100644 index 039aa1234..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-005-wifi-rtw89-8852b-add-channel-encoding-for-hw_scan.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 4f24d7aa575a3c01192faa7f4fb6a91c54f4ef47 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Mon, 20 Feb 2023 15:02:00 +0800 -Subject: [PATCH 005/136] wifi: rtw89: 8852b: add channel encoding for hw_scan - -To obtain correct packet frequency for hw_scan, 52b needs to decode -the channel index obtained from hardware. Change the driver related -set channel part as well to make driver/firmware compatible. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230220070202.29868-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 12 +++++++----- - 1 file changed, 7 insertions(+), 5 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -1422,6 +1422,7 @@ static void rtw8852b_set_channel_bb(stru - { - bool cck_en = chan->channel <= 14; - u8 pri_ch_idx = chan->pri_ch_idx; -+ u8 band = chan->band_type, chan_idx; - - if (cck_en) - rtw8852b_ctrl_sco_cck(rtwdev, chan->primary_channel); -@@ -1444,8 +1445,8 @@ static void rtw8852b_set_channel_bb(stru - B_BT_DYN_DC_EST_EN_MSK, 0x0); - rtw89_phy_write32_mask(rtwdev, R_GNT_BT_WGT_EN, B_GNT_BT_WGT_EN, 0x0); - } -- rtw89_phy_write32_mask(rtwdev, R_MAC_PIN_SEL, B_CH_IDX_SEG0, -- chan->primary_channel); -+ chan_idx = rtw89_encode_chan_idx(rtwdev, chan->primary_channel, band); -+ rtw89_phy_write32_mask(rtwdev, R_MAC_PIN_SEL, B_CH_IDX_SEG0, chan_idx); - rtw8852b_5m_mask(rtwdev, chan, phy_idx); - rtw8852b_bb_set_pop(rtwdev); - rtw8852b_bb_reset_all(rtwdev, phy_idx); -@@ -2299,13 +2300,14 @@ static void rtw8852b_fill_freq_with_ppdu - struct ieee80211_rx_status *status) - { - u16 chan = phy_ppdu->chan_idx; -- u8 band; -+ enum nl80211_band band; -+ u8 ch; - - if (chan == 0) - return; - -- band = chan <= 14 ? NL80211_BAND_2GHZ : NL80211_BAND_5GHZ; -- status->freq = ieee80211_channel_to_frequency(chan, band); -+ rtw89_decode_chan_idx(rtwdev, chan, &ch, &band); -+ status->freq = ieee80211_channel_to_frequency(ch, band); - status->band = band; - } - diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-006-wifi-rtw89-8852b-enable-hw_scan-support.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-006-wifi-rtw89-8852b-enable-hw_scan-support.patch deleted file mode 100644 index 780a0238f..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-006-wifi-rtw89-8852b-enable-hw_scan-support.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 357277e1afdae0f56d08846e818579f5a020709d Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 20 Feb 2023 15:02:01 +0800 -Subject: [PATCH 006/136] wifi: rtw89: 8852b: enable hw_scan support - -This enables hw_scan for 8852b after firmware version 0.29.29.0. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230220070202.29868-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -260,6 +260,7 @@ static const struct __fw_feat_cfg fw_fea - __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 26, 0, NO_LPS_PG), - __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 26, 0, TX_WAKE), - __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 29, 0, CRASH_TRIGGER), -+ __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 29, 0, SCAN_OFFLOAD), - __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 20, 0, PACKET_DROP), - __CFG_FW_FEAT(RTL8852C, le, 0, 27, 33, 0, NO_DEEP_PS), - __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 34, 0, TX_WAKE), diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-007-wifi-rtw89-refine-FW-feature-judgement-on-packet-dro.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-007-wifi-rtw89-refine-FW-feature-judgement-on-packet-dro.patch deleted file mode 100644 index ef267accd..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-007-wifi-rtw89-refine-FW-feature-judgement-on-packet-dro.patch +++ /dev/null @@ -1,90 +0,0 @@ -From 0d1f7ff19d4f8a6da5a6b60d2afd1d34b5d5ebfc Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Mon, 20 Feb 2023 15:02:02 +0800 -Subject: [PATCH 007/136] wifi: rtw89: refine FW feature judgement on packet - drop - -The newer chips use the newer firmware branches, e.g. v027, v029. -And, those firmware branches are supposed to support packet drop -when they are just branched out. - -The initial firmware branch used by each chip is as below. -* 8852A: v009 -* 8852C: v027 -* 8852B: v027 - -So, only 8852A may use firmware which doesn't support packet drop at -runtime. To save trivial positive listing in firmware feature table, -we change to reverse judgment. - -Besides, rtw89_mac_ptk_drop_by_band_and_wait() missed to check firmware -feature before calling rtw89_fw_h2c_pkt_drop(). We also fix it. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230220070202.29868-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 2 +- - drivers/net/wireless/realtek/rtw89/fw.c | 4 ++-- - drivers/net/wireless/realtek/rtw89/mac.c | 2 +- - drivers/net/wireless/realtek/rtw89/mac80211.c | 2 +- - 4 files changed, 5 insertions(+), 5 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3023,7 +3023,7 @@ enum rtw89_fw_feature { - RTW89_FW_FEATURE_SCAN_OFFLOAD, - RTW89_FW_FEATURE_TX_WAKE, - RTW89_FW_FEATURE_CRASH_TRIGGER, -- RTW89_FW_FEATURE_PACKET_DROP, -+ RTW89_FW_FEATURE_NO_PACKET_DROP, - RTW89_FW_FEATURE_NO_DEEP_PS, - RTW89_FW_FEATURE_NO_LPS_PG, - }; ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -235,6 +235,7 @@ static bool __fw_feat_cond_ ## __cond(u3 - - __DEF_FW_FEAT_COND(ge, >=); /* greater or equal */ - __DEF_FW_FEAT_COND(le, <=); /* less or equal */ -+__DEF_FW_FEAT_COND(lt, <); /* less than */ - - struct __fw_feat_cfg { - enum rtw89_core_chip_id chip_id; -@@ -256,12 +257,11 @@ static const struct __fw_feat_cfg fw_fea - __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 35, 0, SCAN_OFFLOAD), - __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 35, 0, TX_WAKE), - __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 36, 0, CRASH_TRIGGER), -- __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 38, 0, PACKET_DROP), -+ __CFG_FW_FEAT(RTL8852A, lt, 0, 13, 38, 0, NO_PACKET_DROP), - __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 26, 0, NO_LPS_PG), - __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 26, 0, TX_WAKE), - __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 29, 0, CRASH_TRIGGER), - __CFG_FW_FEAT(RTL8852B, ge, 0, 29, 29, 0, SCAN_OFFLOAD), -- __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 20, 0, PACKET_DROP), - __CFG_FW_FEAT(RTL8852C, le, 0, 27, 33, 0, NO_DEEP_PS), - __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 34, 0, TX_WAKE), - __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 36, 0, SCAN_OFFLOAD), ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -5426,7 +5426,7 @@ int rtw89_mac_ptk_drop_by_band_and_wait( - for (i = 0; i < try_cnt; i++) { - ret = read_poll_timeout(mac_is_txq_empty, empty, empty, 50, - 50000, false, rtwdev); -- if (ret) -+ if (ret && !RTW89_CHK_FW_FEATURE(NO_PACKET_DROP, &rtwdev->fw)) - rtw89_fw_h2c_pkt_drop(rtwdev, ¶ms); - else - return 0; ---- a/drivers/net/wireless/realtek/rtw89/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -676,7 +676,7 @@ static void rtw89_ops_flush(struct ieee8 - rtw89_leave_lps(rtwdev); - rtw89_hci_flush_queues(rtwdev, queues, drop); - -- if (drop && RTW89_CHK_FW_FEATURE(PACKET_DROP, &rtwdev->fw)) -+ if (drop && !RTW89_CHK_FW_FEATURE(NO_PACKET_DROP, &rtwdev->fw)) - __rtw89_drop_packets(rtwdev, vif); - else - rtw89_mac_flush_txq(rtwdev, queues, drop); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-008-wifi-rtw89-fix-SER-L1-might-stop-entering-LPS-issue.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-008-wifi-rtw89-fix-SER-L1-might-stop-entering-LPS-issue.patch deleted file mode 100644 index d8d7ca0bb..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-008-wifi-rtw89-fix-SER-L1-might-stop-entering-LPS-issue.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 5c48f9432d06bf85ca934d7c4ecb14a7ec0c7f5d Mon Sep 17 00:00:00 2001 -From: Chih-Kang Chang -Date: Fri, 24 Feb 2023 16:21:17 +0800 -Subject: [PATCH 008/136] wifi: rtw89: fix SER L1 might stop entering LPS issue - -When SER L1 triggered, driver need to stop Rx and clear RTW89_FLAG_RUNNING -flag. If track_work check RTW89_FLAG_RUNNING simultaneously, it will check -failed and never queue track_work again, and LPS won't enter either. -Therefore, we cancel delayed work when enter SER L1, and queue delayed work -when leave SER L1. - -Signed-off-by: Chih-Kang Chang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230224082117.21241-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/ser.c | 5 +++++ - 1 file changed, 5 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/ser.c -+++ b/drivers/net/wireless/realtek/rtw89/ser.c -@@ -414,8 +414,11 @@ static void ser_idle_st_hdl(struct rtw89 - - static void ser_reset_trx_st_hdl(struct rtw89_ser *ser, u8 evt) - { -+ struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -+ - switch (evt) { - case SER_EV_STATE_IN: -+ cancel_delayed_work_sync(&rtwdev->track_work); - drv_stop_tx(ser); - - if (hal_stop_dma(ser)) { -@@ -446,6 +449,8 @@ static void ser_reset_trx_st_hdl(struct - hal_enable_dma(ser); - drv_resume_rx(ser); - drv_resume_tx(ser); -+ ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->track_work, -+ RTW89_TRACK_WORK_PERIOD); - break; - - default: diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-009-wifi-rtw89-release-RX-standby-timer-of-beamformee-CS.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-009-wifi-rtw89-release-RX-standby-timer-of-beamformee-CS.patch deleted file mode 100644 index f78eed054..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-009-wifi-rtw89-release-RX-standby-timer-of-beamformee-CS.patch +++ /dev/null @@ -1,99 +0,0 @@ -From 8a66293e73a520a42a7653d2ca32074ba323ff56 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Tue, 7 Mar 2023 22:18:48 +0800 -Subject: [PATCH 009/136] wifi: rtw89: release RX standby timer of beamformee - CSI to save power - -Originally, we keep RX standby timer to handle beamformee CSI, but this -spends power and causes system not entering power save mode. To improve -power consumption, release the timer if throughput becomes low. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230307141848.26403-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - drivers/net/wireless/realtek/rtw89/mac.c | 35 +++++++++++++++++++++-- - drivers/net/wireless/realtek/rtw89/reg.h | 2 ++ - 3 files changed, 36 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3168,6 +3168,7 @@ enum rtw89_flags { - RTW89_FLAG_RUNNING, - RTW89_FLAG_BFEE_MON, - RTW89_FLAG_BFEE_EN, -+ RTW89_FLAG_BFEE_TIMER_KEEP, - RTW89_FLAG_NAPI_RUNNING, - RTW89_FLAG_LEISURE_PS, - RTW89_FLAG_LOW_POWER_MODE, ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -4931,6 +4931,24 @@ u16 rtw89_mac_get_plt_cnt(struct rtw89_d - return cnt; - } - -+static void rtw89_mac_bfee_standby_timer(struct rtw89_dev *rtwdev, u8 mac_idx, -+ bool keep) -+{ -+ u32 reg; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BF, "set bfee standby_timer to %d\n", keep); -+ reg = rtw89_mac_reg_by_idx(R_AX_BFMEE_RESP_OPTION, mac_idx); -+ if (keep) { -+ set_bit(RTW89_FLAG_BFEE_TIMER_KEEP, rtwdev->flags); -+ rtw89_write32_mask(rtwdev, reg, B_AX_BFMEE_BFRP_RX_STANDBY_TIMER_MASK, -+ BFRP_RX_STANDBY_TIMER_KEEP); -+ } else { -+ clear_bit(RTW89_FLAG_BFEE_TIMER_KEEP, rtwdev->flags); -+ rtw89_write32_mask(rtwdev, reg, B_AX_BFMEE_BFRP_RX_STANDBY_TIMER_MASK, -+ BFRP_RX_STANDBY_TIMER_RELEASE); -+ } -+} -+ - static void rtw89_mac_bfee_ctrl(struct rtw89_dev *rtwdev, u8 mac_idx, bool en) - { - u32 reg; -@@ -4967,9 +4985,9 @@ static int rtw89_mac_init_bfee(struct rt - rtw89_write32(rtwdev, reg, CSI_RRSC_BMAP); - - reg = rtw89_mac_reg_by_idx(R_AX_BFMEE_RESP_OPTION, mac_idx); -- val32 = FIELD_PREP(B_AX_BFMEE_BFRP_RX_STANDBY_TIMER_MASK, BFRP_RX_STANDBY_TIMER); -- val32 |= FIELD_PREP(B_AX_BFMEE_NDP_RX_STANDBY_TIMER_MASK, NDP_RX_STANDBY_TIMER); -+ val32 = FIELD_PREP(B_AX_BFMEE_NDP_RX_STANDBY_TIMER_MASK, NDP_RX_STANDBY_TIMER); - rtw89_write32(rtwdev, reg, val32); -+ rtw89_mac_bfee_standby_timer(rtwdev, mac_idx, true); - rtw89_mac_bfee_ctrl(rtwdev, mac_idx, true); - - reg = rtw89_mac_reg_by_idx(R_AX_TRXPTCL_RESP_CSI_CTRL_0, mac_idx); -@@ -5181,6 +5199,19 @@ void _rtw89_mac_bf_monitor_track(struct - struct rtw89_vif *rtwvif; - bool en = stats->tx_tfc_lv <= stats->rx_tfc_lv; - bool old = test_bit(RTW89_FLAG_BFEE_EN, rtwdev->flags); -+ bool keep_timer = true; -+ bool old_keep_timer; -+ -+ old_keep_timer = test_bit(RTW89_FLAG_BFEE_TIMER_KEEP, rtwdev->flags); -+ -+ if (stats->tx_tfc_lv <= RTW89_TFC_LOW && stats->rx_tfc_lv <= RTW89_TFC_LOW) -+ keep_timer = false; -+ -+ if (keep_timer != old_keep_timer) { -+ rtw89_for_each_rtwvif(rtwdev, rtwvif) -+ rtw89_mac_bfee_standby_timer(rtwdev, rtwvif->mac_idx, -+ keep_timer); -+ } - - if (en == old) - return; ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3056,6 +3056,8 @@ - #define R_AX_BFMEE_RESP_OPTION_C1 0xED80 - #define B_AX_BFMEE_NDP_RX_STANDBY_TIMER_MASK GENMASK(31, 24) - #define B_AX_BFMEE_BFRP_RX_STANDBY_TIMER_MASK GENMASK(23, 20) -+#define BFRP_RX_STANDBY_TIMER_KEEP 0x0 -+#define BFRP_RX_STANDBY_TIMER_RELEASE 0x1 - #define B_AX_MU_BFRPTSEG_SEL_MASK GENMASK(18, 17) - #define B_AX_BFMEE_NDP_RXSTDBY_SEL BIT(16) - #define BFRP_RX_STANDBY_TIMER 0x0 diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-010-wifi-rtw89-coex-Add-more-error_map-and-counter-to-lo.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-010-wifi-rtw89-coex-Add-more-error_map-and-counter-to-lo.patch deleted file mode 100644 index 96bf15417..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-010-wifi-rtw89-coex-Add-more-error_map-and-counter-to-lo.patch +++ /dev/null @@ -1,347 +0,0 @@ -From e49bdd85c92dacb12151aa1b9cf48b81c81a6f98 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Wed, 8 Mar 2023 13:32:19 +0800 -Subject: [PATCH 010/136] wifi: rtw89: coex: Add more error_map and counter to - log - -The error map and counter can help to analyze is coexistence mechanism -going well or not. For example, if there is E2G (External control Wi-Fi -slot for Wi-Fi 2.4 GHz) hang counter, it means Wi-Fi firmware didn't cut -a slot for Wi-Fi 2.4 GHz. Maybe something wrong with firmware timer. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230308053225.24377-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 112 +++++++++++++--------- - drivers/net/wireless/realtek/rtw89/core.h | 31 ++++-- - 2 files changed, 88 insertions(+), 55 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -734,6 +734,7 @@ static void _reset_btc_var(struct rtw89_ - - #define BTC_RPT_HDR_SIZE 3 - #define BTC_CHK_WLSLOT_DRIFT_MAX 15 -+#define BTC_CHK_BTSLOT_DRIFT_MAX 15 - #define BTC_CHK_HANG_MAX 3 - - static void _chk_btc_err(struct rtw89_dev *rtwdev, u8 type, u32 cnt) -@@ -748,62 +749,76 @@ static void _chk_btc_err(struct rtw89_de - __func__, type, cnt); - - switch (type) { -- case BTC_DCNT_RPT_FREEZE: -+ case BTC_DCNT_RPT_HANG: - if (dm->cnt_dm[BTC_DCNT_RPT] == cnt && btc->fwinfo.rpt_en_map) -- dm->cnt_dm[BTC_DCNT_RPT_FREEZE]++; -+ dm->cnt_dm[BTC_DCNT_RPT_HANG]++; - else -- dm->cnt_dm[BTC_DCNT_RPT_FREEZE] = 0; -+ dm->cnt_dm[BTC_DCNT_RPT_HANG] = 0; - -- if (dm->cnt_dm[BTC_DCNT_RPT_FREEZE] >= BTC_CHK_HANG_MAX) -+ if (dm->cnt_dm[BTC_DCNT_RPT_HANG] >= BTC_CHK_HANG_MAX) - dm->error.map.wl_fw_hang = true; - else - dm->error.map.wl_fw_hang = false; - - dm->cnt_dm[BTC_DCNT_RPT] = cnt; - break; -- case BTC_DCNT_CYCLE_FREEZE: -+ case BTC_DCNT_CYCLE_HANG: - if (dm->cnt_dm[BTC_DCNT_CYCLE] == cnt && - (dm->tdma_now.type != CXTDMA_OFF || - dm->tdma_now.ext_ctrl == CXECTL_EXT)) -- dm->cnt_dm[BTC_DCNT_CYCLE_FREEZE]++; -+ dm->cnt_dm[BTC_DCNT_CYCLE_HANG]++; - else -- dm->cnt_dm[BTC_DCNT_CYCLE_FREEZE] = 0; -+ dm->cnt_dm[BTC_DCNT_CYCLE_HANG] = 0; - -- if (dm->cnt_dm[BTC_DCNT_CYCLE_FREEZE] >= BTC_CHK_HANG_MAX) -+ if (dm->cnt_dm[BTC_DCNT_CYCLE_HANG] >= BTC_CHK_HANG_MAX) - dm->error.map.cycle_hang = true; - else - dm->error.map.cycle_hang = false; - - dm->cnt_dm[BTC_DCNT_CYCLE] = cnt; - break; -- case BTC_DCNT_W1_FREEZE: -+ case BTC_DCNT_W1_HANG: - if (dm->cnt_dm[BTC_DCNT_W1] == cnt && - dm->tdma_now.type != CXTDMA_OFF) -- dm->cnt_dm[BTC_DCNT_W1_FREEZE]++; -+ dm->cnt_dm[BTC_DCNT_W1_HANG]++; - else -- dm->cnt_dm[BTC_DCNT_W1_FREEZE] = 0; -+ dm->cnt_dm[BTC_DCNT_W1_HANG] = 0; - -- if (dm->cnt_dm[BTC_DCNT_W1_FREEZE] >= BTC_CHK_HANG_MAX) -+ if (dm->cnt_dm[BTC_DCNT_W1_HANG] >= BTC_CHK_HANG_MAX) - dm->error.map.w1_hang = true; - else - dm->error.map.w1_hang = false; - - dm->cnt_dm[BTC_DCNT_W1] = cnt; - break; -- case BTC_DCNT_B1_FREEZE: -+ case BTC_DCNT_B1_HANG: - if (dm->cnt_dm[BTC_DCNT_B1] == cnt && - dm->tdma_now.type != CXTDMA_OFF) -- dm->cnt_dm[BTC_DCNT_B1_FREEZE]++; -+ dm->cnt_dm[BTC_DCNT_B1_HANG]++; - else -- dm->cnt_dm[BTC_DCNT_B1_FREEZE] = 0; -+ dm->cnt_dm[BTC_DCNT_B1_HANG] = 0; - -- if (dm->cnt_dm[BTC_DCNT_B1_FREEZE] >= BTC_CHK_HANG_MAX) -+ if (dm->cnt_dm[BTC_DCNT_B1_HANG] >= BTC_CHK_HANG_MAX) - dm->error.map.b1_hang = true; - else - dm->error.map.b1_hang = false; - - dm->cnt_dm[BTC_DCNT_B1] = cnt; - break; -+ case BTC_DCNT_E2G_HANG: -+ if (dm->cnt_dm[BTC_DCNT_E2G] == cnt && -+ dm->tdma_now.ext_ctrl == CXECTL_EXT) -+ dm->cnt_dm[BTC_DCNT_E2G_HANG]++; -+ else -+ dm->cnt_dm[BTC_DCNT_E2G_HANG] = 0; -+ -+ if (dm->cnt_dm[BTC_DCNT_E2G_HANG] >= BTC_CHK_HANG_MAX) -+ dm->error.map.wl_e2g_hang = true; -+ else -+ dm->error.map.wl_e2g_hang = false; -+ -+ dm->cnt_dm[BTC_DCNT_E2G] = cnt; -+ break; - case BTC_DCNT_TDMA_NONSYNC: - if (cnt != 0) /* if tdma not sync between drv/fw */ - dm->cnt_dm[BTC_DCNT_TDMA_NONSYNC]++; -@@ -822,23 +837,23 @@ static void _chk_btc_err(struct rtw89_de - dm->cnt_dm[BTC_DCNT_SLOT_NONSYNC] = 0; - - if (dm->cnt_dm[BTC_DCNT_SLOT_NONSYNC] >= BTC_CHK_HANG_MAX) -- dm->error.map.tdma_no_sync = true; -+ dm->error.map.slot_no_sync = true; - else -- dm->error.map.tdma_no_sync = false; -+ dm->error.map.slot_no_sync = false; - break; -- case BTC_DCNT_BTCNT_FREEZE: -+ case BTC_DCNT_BTCNT_HANG: - cnt = cx->cnt_bt[BTC_BCNT_HIPRI_RX] + - cx->cnt_bt[BTC_BCNT_HIPRI_TX] + - cx->cnt_bt[BTC_BCNT_LOPRI_RX] + - cx->cnt_bt[BTC_BCNT_LOPRI_TX]; - - if (cnt == 0) -- dm->cnt_dm[BTC_DCNT_BTCNT_FREEZE]++; -+ dm->cnt_dm[BTC_DCNT_BTCNT_HANG]++; - else -- dm->cnt_dm[BTC_DCNT_BTCNT_FREEZE] = 0; -+ dm->cnt_dm[BTC_DCNT_BTCNT_HANG] = 0; - -- if ((dm->cnt_dm[BTC_DCNT_BTCNT_FREEZE] >= BTC_CHK_HANG_MAX && -- bt->enable.now) || (!dm->cnt_dm[BTC_DCNT_BTCNT_FREEZE] && -+ if ((dm->cnt_dm[BTC_DCNT_BTCNT_HANG] >= BTC_CHK_HANG_MAX && -+ bt->enable.now) || (!dm->cnt_dm[BTC_DCNT_BTCNT_HANG] && - !bt->enable.now)) - _update_bt_scbd(rtwdev, false); - break; -@@ -853,6 +868,18 @@ static void _chk_btc_err(struct rtw89_de - else - dm->error.map.wl_slot_drift = false; - break; -+ case BTC_DCNT_BT_SLOT_DRIFT: -+ if (cnt >= BTC_CHK_BTSLOT_DRIFT_MAX) -+ dm->cnt_dm[BTC_DCNT_BT_SLOT_DRIFT]++; -+ else -+ dm->cnt_dm[BTC_DCNT_BT_SLOT_DRIFT] = 0; -+ -+ if (dm->cnt_dm[BTC_DCNT_BT_SLOT_DRIFT] >= BTC_CHK_HANG_MAX) -+ dm->error.map.bt_slot_drift = true; -+ else -+ dm->error.map.bt_slot_drift = false; -+ -+ break; - } - } - -@@ -1129,14 +1156,14 @@ static u32 _chk_btc_report(struct rtw89_ - wl->ver_info.fw = prpt->v1.wl_fw_ver; - dm->wl_fw_cx_offload = !!prpt->v1.wl_fw_cx_offload; - -- _chk_btc_err(rtwdev, BTC_DCNT_RPT_FREEZE, -+ _chk_btc_err(rtwdev, BTC_DCNT_RPT_HANG, - pfwinfo->event[BTF_EVNT_RPT]); - - /* To avoid I/O if WL LPS or power-off */ - if (wl->status.map.lps != BTC_LPS_RF_OFF && - !wl->status.map.rf_off) { - rtwdev->chip->ops->btc_update_bt_cnt(rtwdev); -- _chk_btc_err(rtwdev, BTC_DCNT_BTCNT_FREEZE, 0); -+ _chk_btc_err(rtwdev, BTC_DCNT_BTCNT_HANG, 0); - - btc->cx.cnt_bt[BTC_BCNT_POLUT] = - rtw89_mac_get_plt_cnt(rtwdev, -@@ -1164,8 +1191,8 @@ static u32 _chk_btc_report(struct rtw89_ - btc->cx.cnt_bt[BTC_BCNT_POLUT] = - le32_to_cpu(prpt->v4.bt_cnt[BTC_BCNT_POLLUTED]); - -- _chk_btc_err(rtwdev, BTC_DCNT_BTCNT_FREEZE, 0); -- _chk_btc_err(rtwdev, BTC_DCNT_RPT_FREEZE, -+ _chk_btc_err(rtwdev, BTC_DCNT_BTCNT_HANG, 0); -+ _chk_btc_err(rtwdev, BTC_DCNT_RPT_HANG, - pfwinfo->event[BTF_EVNT_RPT]); - - if (le32_to_cpu(prpt->v4.bt_cnt[BTC_BCNT_RFK_TIMEOUT]) > 0) -@@ -1196,8 +1223,8 @@ static u32 _chk_btc_report(struct rtw89_ - btc->cx.cnt_bt[BTC_BCNT_POLUT] = - le16_to_cpu(prpt->v5.bt_cnt[BTC_BCNT_POLLUTED]); - -- _chk_btc_err(rtwdev, BTC_DCNT_BTCNT_FREEZE, 0); -- _chk_btc_err(rtwdev, BTC_DCNT_RPT_FREEZE, -+ _chk_btc_err(rtwdev, BTC_DCNT_BTCNT_HANG, 0); -+ _chk_btc_err(rtwdev, BTC_DCNT_RPT_HANG, - pfwinfo->event[BTF_EVNT_RPT]); - - dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout; -@@ -1258,11 +1285,11 @@ static u32 _chk_btc_report(struct rtw89_ - BTC_DCNT_WL_SLOT_DRIFT, diff_t); - } - -- _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, -+ _chk_btc_err(rtwdev, BTC_DCNT_W1_HANG, - le32_to_cpu(pcysta->v2.slot_cnt[CXST_W1])); -- _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, -+ _chk_btc_err(rtwdev, BTC_DCNT_W1_HANG, - le32_to_cpu(pcysta->v2.slot_cnt[CXST_B1])); -- _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_FREEZE, -+ _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_HANG, - le16_to_cpu(pcysta->v2.cycles)); - } else if (ver->fcxcysta == 3) { - if (le16_to_cpu(pcysta->v3.cycles) < BTC_CYSTA_CHK_PERIOD) -@@ -1299,11 +1326,11 @@ static u32 _chk_btc_report(struct rtw89_ - } - } - -- _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, -+ _chk_btc_err(rtwdev, BTC_DCNT_W1_HANG, - le32_to_cpu(pcysta->v3.slot_cnt[CXST_W1])); -- _chk_btc_err(rtwdev, BTC_DCNT_B1_FREEZE, -+ _chk_btc_err(rtwdev, BTC_DCNT_B1_HANG, - le32_to_cpu(pcysta->v3.slot_cnt[CXST_B1])); -- _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_FREEZE, -+ _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_HANG, - le16_to_cpu(pcysta->v3.cycles)); - } else if (ver->fcxcysta == 4) { - if (le16_to_cpu(pcysta->v4.cycles) < BTC_CYSTA_CHK_PERIOD) -@@ -1341,11 +1368,11 @@ static u32 _chk_btc_report(struct rtw89_ - } - } - -- _chk_btc_err(rtwdev, BTC_DCNT_W1_FREEZE, -+ _chk_btc_err(rtwdev, BTC_DCNT_W1_HANG, - le16_to_cpu(pcysta->v4.slot_cnt[CXST_W1])); -- _chk_btc_err(rtwdev, BTC_DCNT_B1_FREEZE, -+ _chk_btc_err(rtwdev, BTC_DCNT_B1_HANG, - le16_to_cpu(pcysta->v4.slot_cnt[CXST_B1])); -- _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_FREEZE, -+ _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_HANG, - le16_to_cpu(pcysta->v4.cycles)); - } else { - goto err; -@@ -4578,7 +4605,7 @@ static void _update_bt_scbd(struct rtw89 - } - - if (!(val & BTC_BSCB_ON) || -- btc->dm.cnt_dm[BTC_DCNT_BTCNT_FREEZE] >= BTC_CHK_HANG_MAX) -+ btc->dm.cnt_dm[BTC_DCNT_BTCNT_HANG] >= BTC_CHK_HANG_MAX) - bt->enable.now = 0; - else - bt->enable.now = 1; -@@ -5349,7 +5376,7 @@ void rtw89_btc_ntfy_radio_state(struct r - _write_scbd(rtwdev, BTC_WSCB_ALL, false); - } - -- btc->dm.cnt_dm[BTC_DCNT_BTCNT_FREEZE] = 0; -+ btc->dm.cnt_dm[BTC_DCNT_BTCNT_HANG] = 0; - if (wl->status.map.lps_pre == BTC_LPS_OFF && - wl->status.map.lps_pre != wl->status.map.lps) - btc->dm.tdma_instant_excute = 1; -@@ -5700,11 +5727,6 @@ static void _show_cx_info(struct rtw89_d - seq_printf(m, " %-15s : Coex:%d.%d.%d(branch:%d), ", - "[coex_version]", ver_main, ver_sub, ver_hotfix, id_branch); - -- if (dm->wl_fw_cx_offload != BTC_CX_FW_OFFLOAD) -- dm->error.map.offload_mismatch = true; -- else -- dm->error.map.offload_mismatch = false; -- - ver_main = FIELD_GET(GENMASK(31, 24), wl->ver_info.fw_coex); - ver_sub = FIELD_GET(GENMASK(23, 16), wl->ver_info.fw_coex); - ver_hotfix = FIELD_GET(GENMASK(15, 8), wl->ver_info.fw_coex); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -883,20 +883,24 @@ enum rtw89_btc_dcnt { - BTC_DCNT_RUN = 0x0, - BTC_DCNT_CX_RUNINFO, - BTC_DCNT_RPT, -- BTC_DCNT_RPT_FREEZE, -+ BTC_DCNT_RPT_HANG, - BTC_DCNT_CYCLE, -- BTC_DCNT_CYCLE_FREEZE, -+ BTC_DCNT_CYCLE_HANG, - BTC_DCNT_W1, -- BTC_DCNT_W1_FREEZE, -+ BTC_DCNT_W1_HANG, - BTC_DCNT_B1, -- BTC_DCNT_B1_FREEZE, -+ BTC_DCNT_B1_HANG, - BTC_DCNT_TDMA_NONSYNC, - BTC_DCNT_SLOT_NONSYNC, -- BTC_DCNT_BTCNT_FREEZE, -+ BTC_DCNT_BTCNT_HANG, - BTC_DCNT_WL_SLOT_DRIFT, -- BTC_DCNT_BT_SLOT_DRIFT, - BTC_DCNT_WL_STA_LAST, -- BTC_DCNT_NUM, -+ BTC_DCNT_BT_SLOT_DRIFT, -+ BTC_DCNT_BT_SLOT_FLOOD, -+ BTC_DCNT_FDDT_TRIG, -+ BTC_DCNT_E2G, -+ BTC_DCNT_E2G_HANG, -+ BTC_DCNT_NUM - }; - - enum rtw89_btc_wl_state_cnt { -@@ -1302,15 +1306,22 @@ struct rtw89_btc_dm_emap { - u32 pta_owner: 1; - u32 wl_rfk_timeout: 1; - u32 bt_rfk_timeout: 1; -- - u32 wl_fw_hang: 1; -- u32 offload_mismatch: 1; - u32 cycle_hang: 1; - u32 w1_hang: 1; -- - u32 b1_hang: 1; - u32 tdma_no_sync: 1; -+ u32 slot_no_sync: 1; - u32 wl_slot_drift: 1; -+ u32 bt_slot_drift: 1; -+ u32 role_num_mismatch: 1; -+ u32 null1_tx_late: 1; -+ u32 bt_afh_conflict: 1; -+ u32 bt_leafh_conflict: 1; -+ u32 bt_slot_flood: 1; -+ u32 wl_e2g_hang: 1; -+ u32 wl_ver_mismatch: 1; -+ u32 bt_ver_mismatch: 1; - }; - - union rtw89_btc_dm_error_map { diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-011-wifi-rtw89-coex-Add-WiFi-role-info-v2.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-011-wifi-rtw89-coex-Add-WiFi-role-info-v2.patch deleted file mode 100644 index 566c0d55f..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-011-wifi-rtw89-coex-Add-WiFi-role-info-v2.patch +++ /dev/null @@ -1,671 +0,0 @@ -From 5049964c4af86865153c553fc6a138df02685ffb Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Wed, 8 Mar 2023 13:32:20 +0800 -Subject: [PATCH 011/136] wifi: rtw89: coex: Add WiFi role info v2 - -Remove WiFi traffic busy level & traffic rate from active role information. -This information will move to v5 version TDMA cycle info. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230308053225.24377-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 277 +++++++++++++++++++++- - drivers/net/wireless/realtek/rtw89/core.h | 32 +++ - drivers/net/wireless/realtek/rtw89/fw.c | 86 +++++++ - drivers/net/wireless/realtek/rtw89/fw.h | 51 ++++ - 4 files changed, 439 insertions(+), 7 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -1819,6 +1819,8 @@ static void _fw_set_drv_info(struct rtw8 - rtw89_fw_h2c_cxdrv_role(rtwdev); - else if (ver->fwlrole == 1) - rtw89_fw_h2c_cxdrv_role_v1(rtwdev); -+ else if (ver->fwlrole == 2) -+ rtw89_fw_h2c_cxdrv_role_v2(rtwdev); - break; - case CXDRVINFO_CTRL: - rtw89_fw_h2c_cxdrv_ctrl(rtwdev); -@@ -2113,8 +2115,10 @@ static void _set_bt_afh_info(struct rtw8 - struct rtw89_btc_bt_link_info *b = &bt->link_info; - struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; - struct rtw89_btc_wl_role_info_v1 *wl_rinfo_v1 = &wl->role_info_v1; -+ struct rtw89_btc_wl_role_info_v2 *wl_rinfo_v2 = &wl->role_info_v2; - struct rtw89_btc_wl_active_role *r; - struct rtw89_btc_wl_active_role_v1 *r1; -+ struct rtw89_btc_wl_active_role_v2 *r2; - u8 en = 0, i, ch = 0, bw = 0; - u8 mode, connect_cnt; - -@@ -2124,9 +2128,14 @@ static void _set_bt_afh_info(struct rtw8 - if (ver->fwlrole == 0) { - mode = wl_rinfo->link_mode; - connect_cnt = wl_rinfo->connect_cnt; -- } else { -+ } else if (ver->fwlrole == 1) { - mode = wl_rinfo_v1->link_mode; - connect_cnt = wl_rinfo_v1->connect_cnt; -+ } else if (ver->fwlrole == 2) { -+ mode = wl_rinfo_v2->link_mode; -+ connect_cnt = wl_rinfo_v2->connect_cnt; -+ } else { -+ return; - } - - if (wl->status.map.rf_off || bt->whql_test || -@@ -2139,6 +2148,7 @@ static void _set_bt_afh_info(struct rtw8 - for (i = 0; i < RTW89_PORT_NUM; i++) { - r = &wl_rinfo->active_role[i]; - r1 = &wl_rinfo_v1->active_role_v1[i]; -+ r2 = &wl_rinfo_v2->active_role_v2[i]; - - if (ver->fwlrole == 0 && - (r->role == RTW89_WIFI_ROLE_P2P_GO || -@@ -2152,6 +2162,12 @@ static void _set_bt_afh_info(struct rtw8 - ch = r1->ch; - bw = r1->bw; - break; -+ } else if (ver->fwlrole == 2 && -+ (r2->role == RTW89_WIFI_ROLE_P2P_GO || -+ r2->role == RTW89_WIFI_ROLE_P2P_CLIENT)) { -+ ch = r2->ch; -+ bw = r2->bw; -+ break; - } - } - } else { -@@ -2160,6 +2176,7 @@ static void _set_bt_afh_info(struct rtw8 - for (i = 0; i < RTW89_PORT_NUM; i++) { - r = &wl_rinfo->active_role[i]; - r1 = &wl_rinfo_v1->active_role_v1[i]; -+ r2 = &wl_rinfo_v2->active_role_v2[i]; - - if (ver->fwlrole == 0 && - r->connected && r->band == RTW89_BAND_2G) { -@@ -2171,6 +2188,11 @@ static void _set_bt_afh_info(struct rtw8 - ch = r1->ch; - bw = r1->bw; - break; -+ } else if (ver->fwlrole == 2 && -+ r2->connected && r2->band == RTW89_BAND_2G) { -+ ch = r2->ch; -+ bw = r2->bw; -+ break; - } - } - } -@@ -3625,6 +3647,7 @@ static void _set_btg_ctrl(struct rtw89_d - struct rtw89_btc_wl_info *wl = &btc->cx.wl; - struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; - struct rtw89_btc_wl_role_info_v1 *wl_rinfo_v1 = &wl->role_info_v1; -+ struct rtw89_btc_wl_role_info_v2 *wl_rinfo_v2 = &wl->role_info_v2; - struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info; - bool is_btg; - u8 mode; -@@ -3634,8 +3657,12 @@ static void _set_btg_ctrl(struct rtw89_d - - if (ver->fwlrole == 0) - mode = wl_rinfo->link_mode; -- else -+ else if (ver->fwlrole == 1) - mode = wl_rinfo_v1->link_mode; -+ else if (ver->fwlrole == 2) -+ mode = wl_rinfo_v2->link_mode; -+ else -+ return; - - /* notify halbb ignore GNT_BT or not for WL BB Rx-AGC control */ - if (mode == BTC_WLINK_5G) /* always 0 if 5G */ -@@ -3736,6 +3763,7 @@ static void _set_wl_tx_limit(struct rtw8 - struct rtw89_btc_bt_hid_desc *hid = &b->hid_desc; - struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; - struct rtw89_btc_wl_role_info_v1 *wl_rinfo_v1 = &wl->role_info_v1; -+ struct rtw89_btc_wl_role_info_v2 *wl_rinfo_v2 = &wl->role_info_v2; - struct rtw89_txtime_data data = {.rtwdev = rtwdev}; - u8 mode; - u8 tx_retry; -@@ -3748,8 +3776,12 @@ static void _set_wl_tx_limit(struct rtw8 - - if (ver->fwlrole == 0) - mode = wl_rinfo->link_mode; -- else -+ else if (ver->fwlrole == 1) - mode = wl_rinfo_v1->link_mode; -+ else if (ver->fwlrole == 2) -+ mode = wl_rinfo_v2->link_mode; -+ else -+ return; - - if (btc->dm.freerun || btc->ctrl.igno_bt || b->profile_cnt.now == 0 || - mode == BTC_WLINK_5G || mode == BTC_WLINK_NOLINK) { -@@ -3799,14 +3831,19 @@ static void _set_bt_rx_agc(struct rtw89_ - struct rtw89_btc_wl_info *wl = &btc->cx.wl; - struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; - struct rtw89_btc_wl_role_info_v1 *wl_rinfo_v1 = &wl->role_info_v1; -+ struct rtw89_btc_wl_role_info_v2 *wl_rinfo_v2 = &wl->role_info_v2; - struct rtw89_btc_bt_info *bt = &btc->cx.bt; - bool bt_hi_lna_rx = false; - u8 mode; - - if (ver->fwlrole == 0) - mode = wl_rinfo->link_mode; -- else -+ else if (ver->fwlrole == 1) - mode = wl_rinfo_v1->link_mode; -+ else if (ver->fwlrole == 2) -+ mode = wl_rinfo_v2->link_mode; -+ else -+ return; - - if (mode != BTC_WLINK_NOLINK && btc->dm.wl_btg_rx) - bt_hi_lna_rx = true; -@@ -4079,6 +4116,68 @@ static void _action_wl_2g_scc_v1(struct - _set_policy(rtwdev, policy_type, BTC_ACT_WL_2G_SCC); - } - -+static void _action_wl_2g_scc_v2(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_wl_role_info_v2 *wl_rinfo = &wl->role_info_v2; -+ u16 policy_type = BTC_CXP_OFF_BT; -+ u32 dur; -+ -+ if (btc->mdinfo.ant.type == BTC_ANT_DEDICATED) { -+ policy_type = BTC_CXP_OFF_EQ0; -+ } else { -+ /* shared-antenna */ -+ switch (wl_rinfo->mrole_type) { -+ case BTC_WLMROLE_STA_GC: -+ dm->wl_scc.null_role1 = RTW89_WIFI_ROLE_STATION; -+ dm->wl_scc.null_role2 = RTW89_WIFI_ROLE_P2P_CLIENT; -+ dm->wl_scc.ebt_null = 0; /* no ext-slot-control */ -+ _action_by_bt(rtwdev); -+ return; -+ case BTC_WLMROLE_STA_STA: -+ dm->wl_scc.null_role1 = RTW89_WIFI_ROLE_STATION; -+ dm->wl_scc.null_role2 = RTW89_WIFI_ROLE_STATION; -+ dm->wl_scc.ebt_null = 0; /* no ext-slot-control */ -+ _action_by_bt(rtwdev); -+ return; -+ case BTC_WLMROLE_STA_GC_NOA: -+ case BTC_WLMROLE_STA_GO: -+ case BTC_WLMROLE_STA_GO_NOA: -+ dm->wl_scc.null_role1 = RTW89_WIFI_ROLE_STATION; -+ dm->wl_scc.null_role2 = RTW89_WIFI_ROLE_NONE; -+ dur = wl_rinfo->mrole_noa_duration; -+ -+ if (wl->status.map._4way) { -+ dm->wl_scc.ebt_null = 0; -+ policy_type = BTC_CXP_OFFE_WL; -+ } else if (bt->link_info.status.map.connect == 0) { -+ dm->wl_scc.ebt_null = 0; -+ policy_type = BTC_CXP_OFFE_2GISOB; -+ } else if (bt->link_info.a2dp_desc.exist && -+ dur < btc->bt_req_len) { -+ dm->wl_scc.ebt_null = 1; /* tx null at EBT */ -+ policy_type = BTC_CXP_OFFE_2GBWMIXB2; -+ } else if (bt->link_info.a2dp_desc.exist || -+ bt->link_info.pan_desc.exist) { -+ dm->wl_scc.ebt_null = 1; /* tx null at EBT */ -+ policy_type = BTC_CXP_OFFE_2GBWISOB; -+ } else { -+ dm->wl_scc.ebt_null = 0; -+ policy_type = BTC_CXP_OFFE_2GBWISOB; -+ } -+ break; -+ default: -+ break; -+ } -+ } -+ -+ _set_ant(rtwdev, NM_EXEC, BTC_PHY_ALL, BTC_ANT_W2G); -+ _set_policy(rtwdev, policy_type, BTC_ACT_WL_2G_SCC); -+} -+ - static void _action_wl_2g_ap(struct rtw89_dev *rtwdev) - { - struct rtw89_btc *btc = &rtwdev->btc; -@@ -4518,6 +4617,156 @@ static void _update_wl_info_v1(struct rt - _fw_set_drv_info(rtwdev, CXDRVINFO_ROLE); - } - -+static void _update_wl_info_v2(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_wl_link_info *wl_linfo = wl->link_info; -+ struct rtw89_btc_wl_role_info_v2 *wl_rinfo = &wl->role_info_v2; -+ struct rtw89_btc_wl_dbcc_info *wl_dinfo = &wl->dbcc_info; -+ u8 cnt_connect = 0, cnt_connecting = 0, cnt_active = 0; -+ u8 cnt_2g = 0, cnt_5g = 0, phy; -+ u32 wl_2g_ch[2] = {}, wl_5g_ch[2] = {}; -+ bool b2g = false, b5g = false, client_joined = false; -+ u8 i; -+ -+ memset(wl_rinfo, 0, sizeof(*wl_rinfo)); -+ -+ for (i = 0; i < RTW89_PORT_NUM; i++) { -+ if (!wl_linfo[i].active) -+ continue; -+ -+ cnt_active++; -+ wl_rinfo->active_role_v2[cnt_active - 1].role = wl_linfo[i].role; -+ wl_rinfo->active_role_v2[cnt_active - 1].pid = wl_linfo[i].pid; -+ wl_rinfo->active_role_v2[cnt_active - 1].phy = wl_linfo[i].phy; -+ wl_rinfo->active_role_v2[cnt_active - 1].band = wl_linfo[i].band; -+ wl_rinfo->active_role_v2[cnt_active - 1].noa = (u8)wl_linfo[i].noa; -+ wl_rinfo->active_role_v2[cnt_active - 1].connected = 0; -+ -+ wl->port_id[wl_linfo[i].role] = wl_linfo[i].pid; -+ -+ phy = wl_linfo[i].phy; -+ -+ if (rtwdev->dbcc_en && phy < RTW89_PHY_MAX) { -+ wl_dinfo->role[phy] = wl_linfo[i].role; -+ wl_dinfo->op_band[phy] = wl_linfo[i].band; -+ _update_dbcc_band(rtwdev, phy); -+ _fw_set_drv_info(rtwdev, CXDRVINFO_DBCC); -+ } -+ -+ if (wl_linfo[i].connected == MLME_NO_LINK) { -+ continue; -+ } else if (wl_linfo[i].connected == MLME_LINKING) { -+ cnt_connecting++; -+ } else { -+ cnt_connect++; -+ if ((wl_linfo[i].role == RTW89_WIFI_ROLE_P2P_GO || -+ wl_linfo[i].role == RTW89_WIFI_ROLE_AP) && -+ wl_linfo[i].client_cnt > 1) -+ client_joined = true; -+ } -+ -+ wl_rinfo->role_map.val |= BIT(wl_linfo[i].role); -+ wl_rinfo->active_role_v2[cnt_active - 1].ch = wl_linfo[i].ch; -+ wl_rinfo->active_role_v2[cnt_active - 1].bw = wl_linfo[i].bw; -+ wl_rinfo->active_role_v2[cnt_active - 1].connected = 1; -+ -+ /* only care 2 roles + BT coex */ -+ if (wl_linfo[i].band != RTW89_BAND_2G) { -+ if (cnt_5g <= ARRAY_SIZE(wl_5g_ch) - 1) -+ wl_5g_ch[cnt_5g] = wl_linfo[i].ch; -+ cnt_5g++; -+ b5g = true; -+ } else { -+ if (cnt_2g <= ARRAY_SIZE(wl_2g_ch) - 1) -+ wl_2g_ch[cnt_2g] = wl_linfo[i].ch; -+ cnt_2g++; -+ b2g = true; -+ } -+ } -+ -+ wl_rinfo->connect_cnt = cnt_connect; -+ -+ /* Be careful to change the following sequence!! */ -+ if (cnt_connect == 0) { -+ wl_rinfo->link_mode = BTC_WLINK_NOLINK; -+ wl_rinfo->role_map.role.none = 1; -+ } else if (!b2g && b5g) { -+ wl_rinfo->link_mode = BTC_WLINK_5G; -+ } else if (wl_rinfo->role_map.role.nan) { -+ wl_rinfo->link_mode = BTC_WLINK_2G_NAN; -+ } else if (cnt_connect > BTC_TDMA_WLROLE_MAX) { -+ wl_rinfo->link_mode = BTC_WLINK_OTHER; -+ } else if (b2g && b5g && cnt_connect == 2) { -+ if (rtwdev->dbcc_en) { -+ switch (wl_dinfo->role[RTW89_PHY_0]) { -+ case RTW89_WIFI_ROLE_STATION: -+ wl_rinfo->link_mode = BTC_WLINK_2G_STA; -+ break; -+ case RTW89_WIFI_ROLE_P2P_GO: -+ wl_rinfo->link_mode = BTC_WLINK_2G_GO; -+ break; -+ case RTW89_WIFI_ROLE_P2P_CLIENT: -+ wl_rinfo->link_mode = BTC_WLINK_2G_GC; -+ break; -+ case RTW89_WIFI_ROLE_AP: -+ wl_rinfo->link_mode = BTC_WLINK_2G_AP; -+ break; -+ default: -+ wl_rinfo->link_mode = BTC_WLINK_OTHER; -+ break; -+ } -+ } else { -+ wl_rinfo->link_mode = BTC_WLINK_25G_MCC; -+ } -+ } else if (!b5g && cnt_connect == 2) { -+ if (wl_rinfo->role_map.role.station && -+ (wl_rinfo->role_map.role.p2p_go || -+ wl_rinfo->role_map.role.p2p_gc || -+ wl_rinfo->role_map.role.ap)) { -+ if (wl_2g_ch[0] == wl_2g_ch[1]) -+ wl_rinfo->link_mode = BTC_WLINK_2G_SCC; -+ else -+ wl_rinfo->link_mode = BTC_WLINK_2G_MCC; -+ } else { -+ wl_rinfo->link_mode = BTC_WLINK_2G_MCC; -+ } -+ } else if (!b5g && cnt_connect == 1) { -+ if (wl_rinfo->role_map.role.station) -+ wl_rinfo->link_mode = BTC_WLINK_2G_STA; -+ else if (wl_rinfo->role_map.role.ap) -+ wl_rinfo->link_mode = BTC_WLINK_2G_AP; -+ else if (wl_rinfo->role_map.role.p2p_go) -+ wl_rinfo->link_mode = BTC_WLINK_2G_GO; -+ else if (wl_rinfo->role_map.role.p2p_gc) -+ wl_rinfo->link_mode = BTC_WLINK_2G_GC; -+ else -+ wl_rinfo->link_mode = BTC_WLINK_OTHER; -+ } -+ -+ /* if no client_joined, don't care P2P-GO/AP role */ -+ if (wl_rinfo->role_map.role.p2p_go || wl_rinfo->role_map.role.ap) { -+ if (!client_joined) { -+ if (wl_rinfo->link_mode == BTC_WLINK_2G_SCC || -+ wl_rinfo->link_mode == BTC_WLINK_2G_MCC) { -+ wl_rinfo->link_mode = BTC_WLINK_2G_STA; -+ wl_rinfo->connect_cnt = 1; -+ } else if (wl_rinfo->link_mode == BTC_WLINK_2G_GO || -+ wl_rinfo->link_mode == BTC_WLINK_2G_AP) { -+ wl_rinfo->link_mode = BTC_WLINK_NOLINK; -+ wl_rinfo->connect_cnt = 0; -+ } -+ } -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], cnt_connect = %d, connecting = %d, link_mode = %d\n", -+ cnt_connect, cnt_connecting, wl_rinfo->link_mode); -+ -+ _fw_set_drv_info(rtwdev, CXDRVINFO_ROLE); -+} -+ - #define BTC_CHK_HANG_MAX 3 - #define BTC_SCB_INV_VALUE GENMASK(31, 0) - -@@ -4676,6 +4925,7 @@ void _run_coex(struct rtw89_dev *rtwdev, - struct rtw89_btc_bt_info *bt = &btc->cx.bt; - struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; - struct rtw89_btc_wl_role_info_v1 *wl_rinfo_v1 = &wl->role_info_v1; -+ struct rtw89_btc_wl_role_info_v2 *wl_rinfo_v2 = &wl->role_info_v2; - u8 mode; - - lockdep_assert_held(&rtwdev->mutex); -@@ -4686,8 +4936,12 @@ void _run_coex(struct rtw89_dev *rtwdev, - - if (ver->fwlrole == 0) - mode = wl_rinfo->link_mode; -- else -+ else if (ver->fwlrole == 1) - mode = wl_rinfo_v1->link_mode; -+ else if (ver->fwlrole == 2) -+ mode = wl_rinfo_v2->link_mode; -+ else -+ return; - - rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): reason=%d, mode=%d\n", - __func__, reason, mode); -@@ -4812,6 +5066,8 @@ void _run_coex(struct rtw89_dev *rtwdev, - _action_wl_2g_scc(rtwdev); - else if (ver->fwlrole == 1) - _action_wl_2g_scc_v1(rtwdev); -+ else if (ver->fwlrole == 2) -+ _action_wl_2g_scc_v2(rtwdev); - break; - case BTC_WLINK_2G_MCC: - bt->scan_rx_low_pri = true; -@@ -5317,8 +5573,10 @@ void rtw89_btc_ntfy_role_info(struct rtw - memcpy(wlinfo, &r, sizeof(*wlinfo)); - if (ver->fwlrole == 0) - _update_wl_info(rtwdev); -- else -+ else if (ver->fwlrole == 1) - _update_wl_info_v1(rtwdev); -+ else if (ver->fwlrole == 2) -+ _update_wl_info_v2(rtwdev); - - if (wlinfo->role == RTW89_WIFI_ROLE_STATION && - wlinfo->connected == MLME_NO_LINK) -@@ -5838,6 +6096,7 @@ static void _show_wl_info(struct rtw89_d - struct rtw89_btc_wl_info *wl = &cx->wl; - struct rtw89_btc_wl_role_info *wl_rinfo = &wl->role_info; - struct rtw89_btc_wl_role_info_v1 *wl_rinfo_v1 = &wl->role_info_v1; -+ struct rtw89_btc_wl_role_info_v2 *wl_rinfo_v2 = &wl->role_info_v2; - u8 mode; - - if (!(btc->dm.coex_info_map & BTC_COEX_INFO_WL)) -@@ -5847,8 +6106,12 @@ static void _show_wl_info(struct rtw89_d - - if (ver->fwlrole == 0) - mode = wl_rinfo->link_mode; -- else -+ else if (ver->fwlrole == 1) - mode = wl_rinfo_v1->link_mode; -+ else if (ver->fwlrole == 2) -+ mode = wl_rinfo_v2->link_mode; -+ else -+ return; - - seq_printf(m, " %-15s : link_mode:%d, ", "[status]", mode); - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -1180,6 +1180,22 @@ struct rtw89_btc_wl_active_role_v1 { - u32 noa_duration; /* ms */ - }; - -+struct rtw89_btc_wl_active_role_v2 { -+ u8 connected: 1; -+ u8 pid: 3; -+ u8 phy: 1; -+ u8 noa: 1; -+ u8 band: 2; -+ -+ u8 client_ps: 1; -+ u8 bw: 7; -+ -+ u8 role; -+ u8 ch; -+ -+ u32 noa_duration; /* ms */ -+}; -+ - struct rtw89_btc_wl_role_info_bpos { - u16 none: 1; - u16 station: 1; -@@ -1228,6 +1244,21 @@ struct rtw89_btc_wl_role_info_v1 { /* st - u32 rsvd: 27; - }; - -+struct rtw89_btc_wl_role_info_v2 { /* struct size must be n*4 bytes */ -+ u8 connect_cnt; -+ u8 link_mode; -+ union rtw89_btc_wl_role_info_map role_map; -+ struct rtw89_btc_wl_active_role_v2 active_role_v2[RTW89_PORT_NUM]; -+ u32 mrole_type; /* btc_wl_mrole_type */ -+ u32 mrole_noa_duration; /* ms */ -+ -+ u32 dbcc_en: 1; -+ u32 dbcc_chg: 1; -+ u32 dbcc_2g_phy: 2; /* which phy operate in 2G, HW_PHY_0 or HW_PHY_1 */ -+ u32 link_mode_chg: 1; -+ u32 rsvd: 27; -+}; -+ - struct rtw89_btc_wl_ver_info { - u32 fw_coex; /* match with which coex_ver */ - u32 fw; -@@ -1343,6 +1374,7 @@ struct rtw89_btc_wl_info { - struct rtw89_btc_wl_afh_info afh_info; - struct rtw89_btc_wl_role_info role_info; - struct rtw89_btc_wl_role_info_v1 role_info_v1; -+ struct rtw89_btc_wl_role_info_v2 role_info_v2; - struct rtw89_btc_wl_scan_info scan_info; - struct rtw89_btc_wl_dbcc_info dbcc_info; - struct rtw89_btc_rf_para rf_para; ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -2038,6 +2038,92 @@ fail: - return ret; - } - -+#define H2C_LEN_CXDRVINFO_ROLE_SIZE_V2(max_role_num) \ -+ (4 + 8 * (max_role_num) + H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN + H2C_LEN_CXDRVHDR) -+ -+int rtw89_fw_h2c_cxdrv_role_v2(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ const struct rtw89_btc_ver *ver = btc->ver; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_wl_role_info_v2 *role_info = &wl->role_info_v2; -+ struct rtw89_btc_wl_role_info_bpos *bpos = &role_info->role_map.role; -+ struct rtw89_btc_wl_active_role_v2 *active = role_info->active_role_v2; -+ struct sk_buff *skb; -+ u32 len; -+ u8 *cmd, offset; -+ int ret; -+ int i; -+ -+ len = H2C_LEN_CXDRVINFO_ROLE_SIZE_V2(ver->max_role_num); -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_role\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, len); -+ cmd = skb->data; -+ -+ RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_ROLE); -+ RTW89_SET_FWCMD_CXHDR_LEN(cmd, len - H2C_LEN_CXDRVHDR); -+ -+ RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(cmd, role_info->connect_cnt); -+ RTW89_SET_FWCMD_CXROLE_LINK_MODE(cmd, role_info->link_mode); -+ -+ RTW89_SET_FWCMD_CXROLE_ROLE_NONE(cmd, bpos->none); -+ RTW89_SET_FWCMD_CXROLE_ROLE_STA(cmd, bpos->station); -+ RTW89_SET_FWCMD_CXROLE_ROLE_AP(cmd, bpos->ap); -+ RTW89_SET_FWCMD_CXROLE_ROLE_VAP(cmd, bpos->vap); -+ RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC(cmd, bpos->adhoc); -+ RTW89_SET_FWCMD_CXROLE_ROLE_ADHOC_MASTER(cmd, bpos->adhoc_master); -+ RTW89_SET_FWCMD_CXROLE_ROLE_MESH(cmd, bpos->mesh); -+ RTW89_SET_FWCMD_CXROLE_ROLE_MONITOR(cmd, bpos->moniter); -+ RTW89_SET_FWCMD_CXROLE_ROLE_P2P_DEV(cmd, bpos->p2p_device); -+ RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GC(cmd, bpos->p2p_gc); -+ RTW89_SET_FWCMD_CXROLE_ROLE_P2P_GO(cmd, bpos->p2p_go); -+ RTW89_SET_FWCMD_CXROLE_ROLE_NAN(cmd, bpos->nan); -+ -+ offset = PORT_DATA_OFFSET; -+ for (i = 0; i < RTW89_PORT_NUM; i++, active++) { -+ RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED_V2(cmd, active->connected, i, offset); -+ RTW89_SET_FWCMD_CXROLE_ACT_PID_V2(cmd, active->pid, i, offset); -+ RTW89_SET_FWCMD_CXROLE_ACT_PHY_V2(cmd, active->phy, i, offset); -+ RTW89_SET_FWCMD_CXROLE_ACT_NOA_V2(cmd, active->noa, i, offset); -+ RTW89_SET_FWCMD_CXROLE_ACT_BAND_V2(cmd, active->band, i, offset); -+ RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS_V2(cmd, active->client_ps, i, offset); -+ RTW89_SET_FWCMD_CXROLE_ACT_BW_V2(cmd, active->bw, i, offset); -+ RTW89_SET_FWCMD_CXROLE_ACT_ROLE_V2(cmd, active->role, i, offset); -+ RTW89_SET_FWCMD_CXROLE_ACT_CH_V2(cmd, active->ch, i, offset); -+ RTW89_SET_FWCMD_CXROLE_ACT_NOA_DUR_V2(cmd, active->noa_duration, i, offset); -+ } -+ -+ offset = len - H2C_LEN_CXDRVINFO_ROLE_DBCC_LEN; -+ RTW89_SET_FWCMD_CXROLE_MROLE_TYPE(cmd, role_info->mrole_type, offset); -+ RTW89_SET_FWCMD_CXROLE_MROLE_NOA(cmd, role_info->mrole_noa_duration, offset); -+ RTW89_SET_FWCMD_CXROLE_DBCC_EN(cmd, role_info->dbcc_en, offset); -+ RTW89_SET_FWCMD_CXROLE_DBCC_CHG(cmd, role_info->dbcc_chg, offset); -+ RTW89_SET_FWCMD_CXROLE_DBCC_2G_PHY(cmd, role_info->dbcc_2g_phy, offset); -+ RTW89_SET_FWCMD_CXROLE_LINK_MODE_CHG(cmd, role_info->link_mode_chg, offset); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_OUTSRC, BTFC_SET, -+ SET_DRV_INFO, 0, 0, -+ len); -+ -+ ret = rtw89_h2c_tx(rtwdev, skb, false); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return ret; -+} -+ - #define H2C_LEN_CXDRVINFO_CTRL (4 + H2C_LEN_CXDRVHDR) - int rtw89_fw_h2c_cxdrv_ctrl(struct rtw89_dev *rtwdev) - { ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -2393,6 +2393,56 @@ static inline void RTW89_SET_FWCMD_CXROL - le32p_replace_bits((__le32 *)((u8 *)cmd + (20 + (12 + offset) * n)), val, GENMASK(31, 0)); - } - -+static inline void RTW89_SET_FWCMD_CXROLE_ACT_CONNECTED_V2(void *cmd, u8 val, int n, u8 offset) -+{ -+ u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, BIT(0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXROLE_ACT_PID_V2(void *cmd, u8 val, int n, u8 offset) -+{ -+ u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, GENMASK(3, 1)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXROLE_ACT_PHY_V2(void *cmd, u8 val, int n, u8 offset) -+{ -+ u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, BIT(4)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXROLE_ACT_NOA_V2(void *cmd, u8 val, int n, u8 offset) -+{ -+ u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, BIT(5)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXROLE_ACT_BAND_V2(void *cmd, u8 val, int n, u8 offset) -+{ -+ u8p_replace_bits((u8 *)cmd + (6 + (12 + offset) * n), val, GENMASK(7, 6)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXROLE_ACT_CLIENT_PS_V2(void *cmd, u8 val, int n, u8 offset) -+{ -+ u8p_replace_bits((u8 *)cmd + (7 + (12 + offset) * n), val, BIT(0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXROLE_ACT_BW_V2(void *cmd, u8 val, int n, u8 offset) -+{ -+ u8p_replace_bits((u8 *)cmd + (7 + (12 + offset) * n), val, GENMASK(7, 1)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXROLE_ACT_ROLE_V2(void *cmd, u8 val, int n, u8 offset) -+{ -+ u8p_replace_bits((u8 *)cmd + (8 + (12 + offset) * n), val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXROLE_ACT_CH_V2(void *cmd, u8 val, int n, u8 offset) -+{ -+ u8p_replace_bits((u8 *)cmd + (9 + (12 + offset) * n), val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXROLE_ACT_NOA_DUR_V2(void *cmd, u32 val, int n, u8 offset) -+{ -+ le32p_replace_bits((__le32 *)((u8 *)cmd + (10 + (12 + offset) * n)), val, GENMASK(31, 0)); -+} -+ - static inline void RTW89_SET_FWCMD_CXROLE_MROLE_TYPE(void *cmd, u32 val, u8 offset) - { - le32p_replace_bits((__le32 *)((u8 *)cmd + offset), val, GENMASK(31, 0)); -@@ -3505,6 +3555,7 @@ int rtw89_fw_h2c_ra(struct rtw89_dev *rt - int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev); - int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev); - int rtw89_fw_h2c_cxdrv_role_v1(struct rtw89_dev *rtwdev); -+int rtw89_fw_h2c_cxdrv_role_v2(struct rtw89_dev *rtwdev); - int rtw89_fw_h2c_cxdrv_ctrl(struct rtw89_dev *rtwdev); - int rtw89_fw_h2c_cxdrv_rfk(struct rtw89_dev *rtwdev); - int rtw89_fw_h2c_del_pkt_offload(struct rtw89_dev *rtwdev, u8 id); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-012-wifi-rtw89-coex-Add-traffic-TX-RX-info-and-its-H2C.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-012-wifi-rtw89-coex-Add-traffic-TX-RX-info-and-its-H2C.patch deleted file mode 100644 index e1f727c3d..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-012-wifi-rtw89-coex-Add-traffic-TX-RX-info-and-its-H2C.patch +++ /dev/null @@ -1,403 +0,0 @@ -From a2c0ce5d01a2218af4756d311ae91845b67ac5b9 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Wed, 8 Mar 2023 13:32:21 +0800 -Subject: [PATCH 012/136] wifi: rtw89: coex: Add traffic TX/RX info and its H2C - -There is a new mechanism which can do some real time performance -tuning for WiFi and BT. This TX/RX info is a condition provide to -firmware to do traffic analysis. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230308053225.24377-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 59 +++++++++++++-- - drivers/net/wireless/realtek/rtw89/core.h | 43 +++++++++++ - drivers/net/wireless/realtek/rtw89/fw.c | 56 +++++++++++++++ - drivers/net/wireless/realtek/rtw89/fw.h | 87 +++++++++++++++++++++++ - 4 files changed, 241 insertions(+), 4 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -1809,6 +1809,9 @@ static void _fw_set_drv_info(struct rtw8 - { - struct rtw89_btc *btc = &rtwdev->btc; - const struct rtw89_btc_ver *ver = btc->ver; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_rf_trx_para rf_para = dm->rf_trx_para; - - switch (type) { - case CXDRVINFO_INIT: -@@ -1825,6 +1828,19 @@ static void _fw_set_drv_info(struct rtw8 - case CXDRVINFO_CTRL: - rtw89_fw_h2c_cxdrv_ctrl(rtwdev); - break; -+ case CXDRVINFO_TRX: -+ dm->trx_info.tx_power = u32_get_bits(rf_para.wl_tx_power, -+ RTW89_BTC_WL_DEF_TX_PWR); -+ dm->trx_info.rx_gain = u32_get_bits(rf_para.wl_rx_gain, -+ RTW89_BTC_WL_DEF_TX_PWR); -+ dm->trx_info.bt_tx_power = u32_get_bits(rf_para.bt_tx_power, -+ RTW89_BTC_WL_DEF_TX_PWR); -+ dm->trx_info.bt_rx_gain = u32_get_bits(rf_para.bt_rx_gain, -+ RTW89_BTC_WL_DEF_TX_PWR); -+ dm->trx_info.cn = wl->cn_report; -+ dm->trx_info.nhm = wl->nhm.pwr; -+ rtw89_fw_h2c_cxdrv_trx(rtwdev); -+ break; - case CXDRVINFO_RFK: - rtw89_fw_h2c_cxdrv_rfk(rtwdev); - break; -@@ -5361,6 +5377,8 @@ void rtw89_btc_ntfy_icmp_packet_work(str - mutex_unlock(&rtwdev->mutex); - } - -+#define BT_PROFILE_PROTOCOL_MASK GENMASK(7, 4) -+ - static void _update_bt_info(struct rtw89_dev *rtwdev, u8 *buf, u32 len) - { - const struct rtw89_chip_info *chip = rtwdev->chip; -@@ -5417,6 +5435,7 @@ static void _update_bt_info(struct rtw89 - a2dp->exist = btinfo.lb2.a2dp; - b->profile_cnt.now += (u8)a2dp->exist; - pan->active = btinfo.lb2.pan; -+ btc->dm.trx_info.bt_profile = u32_get_bits(btinfo.val, BT_PROFILE_PROTOCOL_MASK); - - /* parse raw info low-Byte3 */ - btinfo.val = bt->raw_info[BTC_BTINFO_L3]; -@@ -5433,6 +5452,7 @@ static void _update_bt_info(struct rtw89 - btinfo.val = bt->raw_info[BTC_BTINFO_H0]; - /* raw val is dBm unit, translate from -100~ 0dBm to 0~100%*/ - b->rssi = chip->ops->btc_get_bt_rssi(rtwdev, btinfo.hb0.rssi); -+ btc->dm.trx_info.bt_rssi = b->rssi; - - /* parse raw info high-Byte1 */ - btinfo.val = bt->raw_info[BTC_BTINFO_H1]; -@@ -5766,6 +5786,8 @@ static void rtw89_btc_ntfy_wl_sta_iter(v - (struct rtw89_btc_wl_sta_iter_data *)data; - struct rtw89_dev *rtwdev = iter_data->rtwdev; - struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ const struct rtw89_btc_ver *ver = btc->ver; - struct rtw89_btc_wl_info *wl = &btc->cx.wl; - struct rtw89_btc_wl_link_info *link_info = NULL; - struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -@@ -5773,6 +5795,8 @@ static void rtw89_btc_ntfy_wl_sta_iter(v - struct rtw89_vif *rtwvif = rtwsta->rtwvif; - struct rtw89_traffic_stats *stats = &rtwvif->stats; - const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc_wl_role_info *r; -+ struct rtw89_btc_wl_role_info_v1 *r1; - u32 last_tx_rate, last_rx_rate; - u16 last_tx_lvl, last_rx_lvl; - u8 port = rtwvif->port; -@@ -5849,10 +5873,33 @@ static void rtw89_btc_ntfy_wl_sta_iter(v - link_info_t->tx_rate = rtwsta->ra_report.hw_rate; - link_info_t->rx_rate = rtwsta->rx_hw_rate; - -- wl->role_info.active_role[port].tx_lvl = (u16)stats->tx_tfc_lv; -- wl->role_info.active_role[port].rx_lvl = (u16)stats->rx_tfc_lv; -- wl->role_info.active_role[port].tx_rate = rtwsta->ra_report.hw_rate; -- wl->role_info.active_role[port].rx_rate = rtwsta->rx_hw_rate; -+ if (link_info->role == RTW89_WIFI_ROLE_STATION || -+ link_info->role == RTW89_WIFI_ROLE_P2P_CLIENT) { -+ dm->trx_info.tx_rate = link_info_t->tx_rate; -+ dm->trx_info.rx_rate = link_info_t->rx_rate; -+ } -+ -+ if (ver->fwlrole == 0) { -+ r = &wl->role_info; -+ r->active_role[port].tx_lvl = stats->tx_tfc_lv; -+ r->active_role[port].rx_lvl = stats->rx_tfc_lv; -+ r->active_role[port].tx_rate = rtwsta->ra_report.hw_rate; -+ r->active_role[port].rx_rate = rtwsta->rx_hw_rate; -+ } else if (ver->fwlrole == 1) { -+ r1 = &wl->role_info_v1; -+ r1->active_role_v1[port].tx_lvl = stats->tx_tfc_lv; -+ r1->active_role_v1[port].rx_lvl = stats->rx_tfc_lv; -+ r1->active_role_v1[port].tx_rate = rtwsta->ra_report.hw_rate; -+ r1->active_role_v1[port].rx_rate = rtwsta->rx_hw_rate; -+ } else if (ver->fwlrole == 2) { -+ dm->trx_info.tx_lvl = stats->tx_tfc_lv; -+ dm->trx_info.rx_lvl = stats->rx_tfc_lv; -+ dm->trx_info.tx_rate = rtwsta->ra_report.hw_rate; -+ dm->trx_info.rx_rate = rtwsta->rx_hw_rate; -+ } -+ -+ dm->trx_info.tx_tp = link_info_t->tx_throughput; -+ dm->trx_info.rx_tp = link_info_t->rx_throughput; - - if (is_sta_change) - iter_data->is_sta_change = true; -@@ -5866,6 +5913,7 @@ static void rtw89_btc_ntfy_wl_sta_iter(v - void rtw89_btc_ntfy_wl_sta(struct rtw89_dev *rtwdev) - { - struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_dm *dm = &btc->dm; - struct rtw89_btc_wl_info *wl = &btc->cx.wl; - struct rtw89_btc_wl_sta_iter_data data = {.rtwdev = rtwdev}; - u8 i; -@@ -5884,6 +5932,9 @@ void rtw89_btc_ntfy_wl_sta(struct rtw89_ - } - } - -+ if (dm->trx_info.wl_rssi != wl->rssi_level) -+ dm->trx_info.wl_rssi = wl->rssi_level; -+ - rtw89_debug(rtwdev, RTW89_DBG_BTC, "[BTC], %s(): busy=%d\n", - __func__, !!wl->status.map.busy); - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -1367,6 +1367,22 @@ struct rtw89_btc_rf_para { - u32 rx_gain_perpkt; - }; - -+struct rtw89_btc_wl_nhm { -+ u8 instant_wl_nhm_dbm; -+ u8 instant_wl_nhm_per_mhz; -+ u16 valid_record_times; -+ s8 record_pwr[16]; -+ u8 record_ratio[16]; -+ s8 pwr; /* dbm_per_MHz */ -+ u8 ratio; -+ u8 current_status; -+ u8 refresh; -+ bool start_flag; -+ u8 last_ccx_rpt_stamp; -+ s8 pwr_max; -+ s8 pwr_min; -+}; -+ - struct rtw89_btc_wl_info { - struct rtw89_btc_wl_link_info link_info[RTW89_PORT_NUM]; - struct rtw89_btc_wl_rfk_info rfk_info; -@@ -1378,10 +1394,12 @@ struct rtw89_btc_wl_info { - struct rtw89_btc_wl_scan_info scan_info; - struct rtw89_btc_wl_dbcc_info dbcc_info; - struct rtw89_btc_rf_para rf_para; -+ struct rtw89_btc_wl_nhm nhm; - union rtw89_btc_wl_state_map status; - - u8 port_id[RTW89_WIFI_ROLE_MLME_MAX]; - u8 rssi_level; -+ u8 cn_report; - - bool scbd_change; - u32 scbd; -@@ -2019,6 +2037,30 @@ struct rtw89_btc_rf_trx_para { - u8 bt_rx_gain; /* LNA constrain level */ - }; - -+struct rtw89_btc_trx_info { -+ u8 tx_lvl; -+ u8 rx_lvl; -+ u8 wl_rssi; -+ u8 bt_rssi; -+ -+ s8 tx_power; /* absolute Tx power (dBm), 0xff-> no BTC control */ -+ s8 rx_gain; /* rx gain table index (TBD.) */ -+ s8 bt_tx_power; /* decrease Tx power (dB) */ -+ s8 bt_rx_gain; /* LNA constrain level */ -+ -+ u8 cn; /* condition_num */ -+ s8 nhm; -+ u8 bt_profile; -+ u8 rsvd2; -+ -+ u16 tx_rate; -+ u16 rx_rate; -+ -+ u32 tx_tp; -+ u32 rx_tp; -+ u32 rx_err_ratio; -+}; -+ - struct rtw89_btc_dm { - struct rtw89_btc_fbtc_slot slot[CXST_MAX]; - struct rtw89_btc_fbtc_slot slot_now[CXST_MAX]; -@@ -2030,6 +2072,7 @@ struct rtw89_btc_dm { - struct rtw89_btc_wl_tx_limit_para wl_tx_limit; - struct rtw89_btc_dm_step dm_step; - struct rtw89_btc_wl_scc_ctrl wl_scc; -+ struct rtw89_btc_trx_info trx_info; - union rtw89_btc_dm_error_map error; - u32 cnt_dm[BTC_DCNT_NUM]; - u32 cnt_notify[BTC_NCNT_NUM]; ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -2169,6 +2169,62 @@ fail: - return ret; - } - -+#define H2C_LEN_CXDRVINFO_TRX (28 + H2C_LEN_CXDRVHDR) -+int rtw89_fw_h2c_cxdrv_trx(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_trx_info *trx = &btc->dm.trx_info; -+ struct sk_buff *skb; -+ u8 *cmd; -+ int ret; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_TRX); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_trx\n"); -+ return -ENOMEM; -+ } -+ skb_put(skb, H2C_LEN_CXDRVINFO_TRX); -+ cmd = skb->data; -+ -+ RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_TRX); -+ RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_TRX - H2C_LEN_CXDRVHDR); -+ -+ RTW89_SET_FWCMD_CXTRX_TXLV(cmd, trx->tx_lvl); -+ RTW89_SET_FWCMD_CXTRX_RXLV(cmd, trx->rx_lvl); -+ RTW89_SET_FWCMD_CXTRX_WLRSSI(cmd, trx->wl_rssi); -+ RTW89_SET_FWCMD_CXTRX_BTRSSI(cmd, trx->bt_rssi); -+ RTW89_SET_FWCMD_CXTRX_TXPWR(cmd, trx->tx_power); -+ RTW89_SET_FWCMD_CXTRX_RXGAIN(cmd, trx->rx_gain); -+ RTW89_SET_FWCMD_CXTRX_BTTXPWR(cmd, trx->bt_tx_power); -+ RTW89_SET_FWCMD_CXTRX_BTRXGAIN(cmd, trx->bt_rx_gain); -+ RTW89_SET_FWCMD_CXTRX_CN(cmd, trx->cn); -+ RTW89_SET_FWCMD_CXTRX_NHM(cmd, trx->nhm); -+ RTW89_SET_FWCMD_CXTRX_BTPROFILE(cmd, trx->bt_profile); -+ RTW89_SET_FWCMD_CXTRX_RSVD2(cmd, trx->rsvd2); -+ RTW89_SET_FWCMD_CXTRX_TXRATE(cmd, trx->tx_rate); -+ RTW89_SET_FWCMD_CXTRX_RXRATE(cmd, trx->rx_rate); -+ RTW89_SET_FWCMD_CXTRX_TXTP(cmd, trx->tx_tp); -+ RTW89_SET_FWCMD_CXTRX_RXTP(cmd, trx->rx_tp); -+ RTW89_SET_FWCMD_CXTRX_RXERRRA(cmd, trx->rx_err_ratio); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_OUTSRC, BTFC_SET, -+ SET_DRV_INFO, 0, 0, -+ H2C_LEN_CXDRVINFO_TRX); -+ -+ ret = rtw89_h2c_tx(rtwdev, skb, false); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return ret; -+} -+ - #define H2C_LEN_CXDRVINFO_RFK (4 + H2C_LEN_CXDRVHDR) - int rtw89_fw_h2c_cxdrv_rfk(struct rtw89_dev *rtwdev) - { ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -2152,6 +2152,7 @@ enum rtw89_btc_cxdrvinfo { - CXDRVINFO_RUN, - CXDRVINFO_CTRL, - CXDRVINFO_SCAN, -+ CXDRVINFO_TRX, /* WL traffic to WL fw */ - CXDRVINFO_MAX, - }; - -@@ -2493,6 +2494,91 @@ static inline void RTW89_SET_FWCMD_CXCTR - le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(18, 3)); - } - -+static inline void RTW89_SET_FWCMD_CXTRX_TXLV(void *cmd, u8 val) -+{ -+ u8p_replace_bits((u8 *)cmd + 2, val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXTRX_RXLV(void *cmd, u8 val) -+{ -+ u8p_replace_bits((u8 *)cmd + 3, val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXTRX_WLRSSI(void *cmd, u8 val) -+{ -+ u8p_replace_bits((u8 *)cmd + 4, val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXTRX_BTRSSI(void *cmd, u8 val) -+{ -+ u8p_replace_bits((u8 *)cmd + 5, val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXTRX_TXPWR(void *cmd, s8 val) -+{ -+ u8p_replace_bits((u8 *)cmd + 6, val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXTRX_RXGAIN(void *cmd, s8 val) -+{ -+ u8p_replace_bits((u8 *)cmd + 7, val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXTRX_BTTXPWR(void *cmd, s8 val) -+{ -+ u8p_replace_bits((u8 *)cmd + 8, val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXTRX_BTRXGAIN(void *cmd, s8 val) -+{ -+ u8p_replace_bits((u8 *)cmd + 9, val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXTRX_CN(void *cmd, u8 val) -+{ -+ u8p_replace_bits((u8 *)cmd + 10, val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXTRX_NHM(void *cmd, s8 val) -+{ -+ u8p_replace_bits((u8 *)cmd + 11, val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXTRX_BTPROFILE(void *cmd, u8 val) -+{ -+ u8p_replace_bits((u8 *)cmd + 12, val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXTRX_RSVD2(void *cmd, u8 val) -+{ -+ u8p_replace_bits((u8 *)cmd + 13, val, GENMASK(7, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXTRX_TXRATE(void *cmd, u16 val) -+{ -+ le16p_replace_bits((__le16 *)((u8 *)cmd + 14), val, GENMASK(15, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXTRX_RXRATE(void *cmd, u16 val) -+{ -+ le16p_replace_bits((__le16 *)((u8 *)cmd + 16), val, GENMASK(15, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXTRX_TXTP(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)((u8 *)cmd + 18), val, GENMASK(31, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXTRX_RXTP(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)((u8 *)cmd + 22), val, GENMASK(31, 0)); -+} -+ -+static inline void RTW89_SET_FWCMD_CXTRX_RXERRRA(void *cmd, u32 val) -+{ -+ le32p_replace_bits((__le32 *)((u8 *)cmd + 26), val, GENMASK(31, 0)); -+} -+ - static inline void RTW89_SET_FWCMD_CXRFK_STATE(void *cmd, u32 val) - { - le32p_replace_bits((__le32 *)((u8 *)(cmd) + 2), val, GENMASK(1, 0)); -@@ -3557,6 +3643,7 @@ int rtw89_fw_h2c_cxdrv_role(struct rtw89 - int rtw89_fw_h2c_cxdrv_role_v1(struct rtw89_dev *rtwdev); - int rtw89_fw_h2c_cxdrv_role_v2(struct rtw89_dev *rtwdev); - int rtw89_fw_h2c_cxdrv_ctrl(struct rtw89_dev *rtwdev); -+int rtw89_fw_h2c_cxdrv_trx(struct rtw89_dev *rtwdev); - int rtw89_fw_h2c_cxdrv_rfk(struct rtw89_dev *rtwdev); - int rtw89_fw_h2c_del_pkt_offload(struct rtw89_dev *rtwdev, u8 id); - int rtw89_fw_h2c_add_pkt_offload(struct rtw89_dev *rtwdev, u8 *id, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-013-wifi-rtw89-coex-Add-register-monitor-report-v2-forma.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-013-wifi-rtw89-coex-Add-register-monitor-report-v2-forma.patch deleted file mode 100644 index 8ec2342b8..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-013-wifi-rtw89-coex-Add-register-monitor-report-v2-forma.patch +++ /dev/null @@ -1,283 +0,0 @@ -From e5e52feb5053a537180cf928428deb8bc697a42e Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Wed, 8 Mar 2023 13:32:22 +0800 -Subject: [PATCH 013/136] wifi: rtw89: coex: Add register monitor report v2 - format - -The v2 firmware report reduce its maximum register numbers from 30 to 20, -it can help to save firmware code size. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230308053225.24377-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 148 ++++++++++++++++++++-- - drivers/net/wireless/realtek/rtw89/core.h | 17 ++- - 2 files changed, 151 insertions(+), 14 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -226,7 +226,6 @@ struct rtw89_btc_btf_set_slot_table { - u8 buf[]; - } __packed; - --#define BTF_SET_MON_REG_VER 1 - struct rtw89_btc_btf_set_mon_reg { - u8 fver; - u8 reg_num; -@@ -1078,8 +1077,15 @@ static u32 _chk_btc_report(struct rtw89_ - break; - case BTC_RPT_TYPE_MREG: - pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo; -- pfinfo = &pfwinfo->rpt_fbtc_mregval.finfo; -- pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_mregval.finfo); -+ if (ver->fcxmreg == 1) { -+ pfinfo = &pfwinfo->rpt_fbtc_mregval.finfo.v1; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_mregval.finfo.v1); -+ } else if (ver->fcxmreg == 2) { -+ pfinfo = &pfwinfo->rpt_fbtc_mregval.finfo.v2; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_mregval.finfo.v2); -+ } else { -+ goto err; -+ } - pcinfo->req_fver = ver->fcxmreg; - break; - case BTC_RPT_TYPE_GPIO_DBG: -@@ -1709,18 +1715,26 @@ static void rtw89_btc_fw_set_slots(struc - static void btc_fw_set_monreg(struct rtw89_dev *rtwdev) - { - const struct rtw89_chip_info *chip = rtwdev->chip; -+ const struct rtw89_btc_ver *ver = rtwdev->btc.ver; - struct rtw89_btc_btf_set_mon_reg *monreg = NULL; -- u8 n, *ptr = NULL, ulen; -+ u8 n, *ptr = NULL, ulen, cxmreg_max; - u16 sz = 0; - - n = chip->mon_reg_num; -- - rtw89_debug(rtwdev, RTW89_DBG_BTC, - "[BTC], %s(): mon_reg_num=%d\n", __func__, n); -- if (n > CXMREG_MAX) { -+ -+ if (ver->fcxmreg == 1) -+ cxmreg_max = CXMREG_MAX; -+ else if (ver->fcxmreg == 2) -+ cxmreg_max = CXMREG_MAX_V2; -+ else -+ return; -+ -+ if (n > cxmreg_max) { - rtw89_debug(rtwdev, RTW89_DBG_BTC, - "[BTC], %s(): mon reg count %d > %d\n", -- __func__, n, CXMREG_MAX); -+ __func__, n, cxmreg_max); - return; - } - -@@ -1730,7 +1744,7 @@ static void btc_fw_set_monreg(struct rtw - if (!monreg) - return; - -- monreg->fver = BTF_SET_MON_REG_VER; -+ monreg->fver = ver->fcxmreg; - monreg->reg_num = n; - ptr = &monreg->buf[0]; - memcpy(ptr, chip->mon_reg, n * ulen); -@@ -7401,13 +7415,13 @@ static void _get_gnt(struct rtw89_dev *r - } - } - --static void _show_mreg(struct rtw89_dev *rtwdev, struct seq_file *m) -+static void _show_mreg_v1(struct rtw89_dev *rtwdev, struct seq_file *m) - { - const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_btc *btc = &rtwdev->btc; - struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; - struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; -- struct rtw89_btc_fbtc_mreg_val *pmreg = NULL; -+ struct rtw89_btc_fbtc_mreg_val_v1 *pmreg = NULL; - struct rtw89_btc_fbtc_gpio_dbg *gdbg = NULL; - struct rtw89_btc_cx *cx = &btc->cx; - struct rtw89_btc_wl_info *wl = &btc->cx.wl; -@@ -7457,7 +7471,7 @@ static void _show_mreg(struct rtw89_dev - return; - } - -- pmreg = &pfwinfo->rpt_fbtc_mregval.finfo; -+ pmreg = &pfwinfo->rpt_fbtc_mregval.finfo.v1; - rtw89_debug(rtwdev, RTW89_DBG_BTC, - "[BTC], %s(): rpt_fbtc_mregval reg_num = %d\n", - __func__, pmreg->reg_num); -@@ -7486,6 +7500,111 @@ static void _show_mreg(struct rtw89_dev - rtw89_debug(rtwdev, RTW89_DBG_BTC, - "[BTC], %s(): stop due rpt_fbtc_gpio_dbg.cinfo\n", - __func__); -+ seq_puts(m, "\n"); -+ return; -+ } -+ -+ gdbg = &pfwinfo->rpt_fbtc_gpio_dbg.finfo; -+ if (!gdbg->en_map) -+ return; -+ -+ seq_printf(m, " %-15s : enable_map:0x%08x", -+ "[gpio_dbg]", gdbg->en_map); -+ -+ for (i = 0; i < BTC_DBG_MAX1; i++) { -+ if (!(gdbg->en_map & BIT(i))) -+ continue; -+ seq_printf(m, ", %d->GPIO%d", (u32)i, gdbg->gpio_map[i]); -+ } -+ seq_puts(m, "\n"); -+} -+ -+static void _show_mreg_v2(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -+ struct rtw89_btc_rpt_cmn_info *pcinfo = NULL; -+ struct rtw89_btc_fbtc_mreg_val_v2 *pmreg = NULL; -+ struct rtw89_btc_fbtc_gpio_dbg *gdbg = NULL; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_wl_info *wl = &btc->cx.wl; -+ struct rtw89_btc_bt_info *bt = &btc->cx.bt; -+ struct rtw89_mac_ax_coex_gnt gnt_cfg = {}; -+ struct rtw89_mac_ax_gnt gnt; -+ u8 i = 0, type = 0, cnt = 0; -+ u32 val, offset; -+ -+ if (!(btc->dm.coex_info_map & BTC_COEX_INFO_MREG)) -+ return; -+ -+ seq_puts(m, "========== [HW Status] ==========\n"); -+ -+ seq_printf(m, -+ " %-15s : WL->BT:0x%08x(cnt:%d), BT->WL:0x%08x(total:%d, bt_update:%d)\n", -+ "[scoreboard]", wl->scbd, cx->cnt_wl[BTC_WCNT_SCBDUPDATE], -+ bt->scbd, cx->cnt_bt[BTC_BCNT_SCBDREAD], -+ cx->cnt_bt[BTC_BCNT_SCBDUPDATE]); -+ -+ /* To avoid I/O if WL LPS or power-off */ -+ if (!wl->status.map.lps && !wl->status.map.rf_off) { -+ btc->dm.pta_owner = rtw89_mac_get_ctrl_path(rtwdev); -+ -+ _get_gnt(rtwdev, &gnt_cfg); -+ gnt = gnt_cfg.band[0]; -+ seq_printf(m, -+ " %-15s : pta_owner:%s, phy-0[gnt_wl:%s-%d/gnt_bt:%s-%d], ", -+ "[gnt_status]", -+ chip->chip_id == RTL8852C ? "HW" : -+ btc->dm.pta_owner == BTC_CTRL_BY_WL ? "WL" : "BT", -+ gnt.gnt_wl_sw_en ? "SW" : "HW", gnt.gnt_wl, -+ gnt.gnt_bt_sw_en ? "SW" : "HW", gnt.gnt_bt); -+ -+ gnt = gnt_cfg.band[1]; -+ seq_printf(m, "phy-1[gnt_wl:%s-%d/gnt_bt:%s-%d]\n", -+ gnt.gnt_wl_sw_en ? "SW" : "HW", -+ gnt.gnt_wl, -+ gnt.gnt_bt_sw_en ? "SW" : "HW", -+ gnt.gnt_bt); -+ } -+ pcinfo = &pfwinfo->rpt_fbtc_mregval.cinfo; -+ if (!pcinfo->valid) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): stop due rpt_fbtc_mregval.cinfo\n", -+ __func__); -+ return; -+ } -+ -+ pmreg = &pfwinfo->rpt_fbtc_mregval.finfo.v2; -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): rpt_fbtc_mregval reg_num = %d\n", -+ __func__, pmreg->reg_num); -+ -+ for (i = 0; i < pmreg->reg_num; i++) { -+ type = (u8)le16_to_cpu(chip->mon_reg[i].type); -+ offset = le32_to_cpu(chip->mon_reg[i].offset); -+ val = le32_to_cpu(pmreg->mreg_val[i]); -+ -+ if (cnt % 6 == 0) -+ seq_printf(m, " %-15s : %d_0x%04x=0x%08x", -+ "[reg]", (u32)type, offset, val); -+ else -+ seq_printf(m, ", %d_0x%04x=0x%08x", (u32)type, -+ offset, val); -+ if (cnt % 6 == 5) -+ seq_puts(m, "\n"); -+ cnt++; -+ -+ if (i >= pmreg->reg_num) -+ seq_puts(m, "\n"); -+ } -+ -+ pcinfo = &pfwinfo->rpt_fbtc_gpio_dbg.cinfo; -+ if (!pcinfo->valid) { -+ rtw89_debug(rtwdev, RTW89_DBG_BTC, -+ "[BTC], %s(): stop due rpt_fbtc_gpio_dbg.cinfo\n", -+ __func__); -+ seq_puts(m, "\n"); - return; - } - -@@ -7868,7 +7987,12 @@ void rtw89_btc_dump_info(struct rtw89_de - _show_bt_info(rtwdev, m); - _show_dm_info(rtwdev, m); - _show_fw_dm_msg(rtwdev, m); -- _show_mreg(rtwdev, m); -+ -+ if (ver->fcxmreg == 1) -+ _show_mreg_v1(rtwdev, m); -+ else if (ver->fcxmreg == 2) -+ _show_mreg_v2(rtwdev, m); -+ - if (ver->fcxbtcrpt == 1) - _show_summary_v1(rtwdev, m); - else if (ver->fcxbtcrpt == 4) ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -1524,6 +1524,7 @@ union rtw89_btc_fbtc_tdma_le32 { - }; - - #define CXMREG_MAX 30 -+#define CXMREG_MAX_V2 20 - #define FCXMAX_STEP 255 /*STEP trace record cnt, Max:65535, default:255*/ - #define BTC_CYCLE_SLOT_MAX 48 /* must be even number, non-zero */ - -@@ -1750,13 +1751,25 @@ struct rtw89_btc_fbtc_gpio_dbg { - u8 gpio_map[BTC_DBG_MAX1]; /*the debug signals to GPIO-Position */ - } __packed; - --struct rtw89_btc_fbtc_mreg_val { -+struct rtw89_btc_fbtc_mreg_val_v1 { - u8 fver; /* btc_ver::fcxmreg */ - u8 reg_num; - __le16 rsvd; - __le32 mreg_val[CXMREG_MAX]; - } __packed; - -+struct rtw89_btc_fbtc_mreg_val_v2 { -+ u8 fver; /* btc_ver::fcxmreg */ -+ u8 reg_num; -+ __le16 rsvd; -+ __le32 mreg_val[CXMREG_MAX_V2]; -+} __packed; -+ -+union rtw89_btc_fbtc_mreg_val { -+ struct rtw89_btc_fbtc_mreg_val_v1 v1; -+ struct rtw89_btc_fbtc_mreg_val_v2 v2; -+}; -+ - #define RTW89_DEF_FBTC_MREG(__type, __bytes, __offset) \ - { .type = cpu_to_le16(__type), .bytes = cpu_to_le16(__bytes), \ - .offset = cpu_to_le32(__offset), } -@@ -2203,7 +2216,7 @@ struct rtw89_btc_rpt_fbtc_nullsta { - - struct rtw89_btc_rpt_fbtc_mreg { - struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -- struct rtw89_btc_fbtc_mreg_val finfo; /* info from fw */ -+ union rtw89_btc_fbtc_mreg_val finfo; /* info from fw */ - }; - - struct rtw89_btc_rpt_fbtc_gpio_dbg { diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-014-wifi-rtw89-coex-Fix-wrong-structure-assignment-at-nu.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-014-wifi-rtw89-coex-Fix-wrong-structure-assignment-at-nu.patch deleted file mode 100644 index 0ddc27bd1..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-014-wifi-rtw89-coex-Fix-wrong-structure-assignment-at-nu.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 9dfa09e0628d2024ce4574f645344c00fe88a535 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Wed, 8 Mar 2023 13:32:23 +0800 -Subject: [PATCH 014/136] wifi: rtw89: coex: Fix wrong structure assignment at - null data report - -Correct pointer assignment of v1 null data report. It doesn't really -change logic at all, but it looks more readable. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230308053225.24377-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -1065,7 +1065,7 @@ static u32 _chk_btc_report(struct rtw89_ - case BTC_RPT_TYPE_NULLSTA: - pcinfo = &pfwinfo->rpt_fbtc_nullsta.cinfo; - if (ver->fcxnullsta == 1) { -- pfinfo = &pfwinfo->rpt_fbtc_nullsta.finfo; -+ pfinfo = &pfwinfo->rpt_fbtc_nullsta.finfo.v1; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_nullsta.finfo.v1); - } else if (ver->fcxnullsta == 2) { - pfinfo = &pfwinfo->rpt_fbtc_nullsta.finfo.v2; diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-015-wifi-rtw89-coex-Add-v2-Bluetooth-scan-info.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-015-wifi-rtw89-coex-Add-v2-Bluetooth-scan-info.patch deleted file mode 100644 index d28722284..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-015-wifi-rtw89-coex-Add-v2-Bluetooth-scan-info.patch +++ /dev/null @@ -1,226 +0,0 @@ -From 262cc19ea902d2280e2e2a56b153f37466e3349e Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Wed, 8 Mar 2023 13:32:24 +0800 -Subject: [PATCH 015/136] wifi: rtw89: coex: Add v2 Bluetooth scan info - -Compare to v1 and v2 removed some not usable parameters. Save firmware -code size. The information can show how frequent and how long the -Bluetooth scan do. It will help to debug coexistence issue. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230308053225.24377-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 67 +++++++++++++++++++++-- - drivers/net/wireless/realtek/rtw89/core.h | 63 +++++++++++++++------ - 2 files changed, 106 insertions(+), 24 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -890,13 +890,15 @@ static void _update_bt_report(struct rtw - struct rtw89_btc_bt_link_info *bt_linfo = &bt->link_info; - struct rtw89_btc_bt_a2dp_desc *a2dp = &bt_linfo->a2dp_desc; - struct rtw89_btc_fbtc_btver *pver = NULL; -- struct rtw89_btc_fbtc_btscan *pscan = NULL; -+ struct rtw89_btc_fbtc_btscan_v1 *pscan_v1; -+ struct rtw89_btc_fbtc_btscan_v2 *pscan_v2; - struct rtw89_btc_fbtc_btafh *pafh_v1 = NULL; - struct rtw89_btc_fbtc_btafh_v2 *pafh_v2 = NULL; - struct rtw89_btc_fbtc_btdevinfo *pdev = NULL; -+ bool scan_update = true; -+ int i; - - pver = (struct rtw89_btc_fbtc_btver *)pfinfo; -- pscan = (struct rtw89_btc_fbtc_btscan *)pfinfo; - pdev = (struct rtw89_btc_fbtc_btdevinfo *)pfinfo; - - rtw89_debug(rtwdev, RTW89_DBG_BTC, -@@ -910,7 +912,26 @@ static void _update_bt_report(struct rtw - bt->feature = le32_to_cpu(pver->feature); - break; - case BTC_RPT_TYPE_BT_SCAN: -- memcpy(bt->scan_info, pscan->scan, BTC_SCAN_MAX1); -+ if (ver->fcxbtscan == 1) { -+ pscan_v1 = (struct rtw89_btc_fbtc_btscan_v1 *)pfinfo; -+ for (i = 0; i < BTC_SCAN_MAX1; i++) { -+ bt->scan_info_v1[i] = pscan_v1->scan[i]; -+ if (bt->scan_info_v1[i].win == 0 && -+ bt->scan_info_v1[i].intvl == 0) -+ scan_update = false; -+ } -+ } else if (ver->fcxbtscan == 2) { -+ pscan_v2 = (struct rtw89_btc_fbtc_btscan_v2 *)pfinfo; -+ for (i = 0; i < CXSCAN_MAX; i++) { -+ bt->scan_info_v2[i] = pscan_v2->para[i]; -+ if ((pscan_v2->type & BIT(i)) && -+ pscan_v2->para[i].win == 0 && -+ pscan_v2->para[i].intvl == 0) -+ scan_update = false; -+ } -+ } -+ if (scan_update) -+ bt->scan_info_update = 1; - break; - case BTC_RPT_TYPE_BT_AFH: - if (ver->fcxbtafh == 2) { -@@ -1102,8 +1123,13 @@ static u32 _chk_btc_report(struct rtw89_ - break; - case BTC_RPT_TYPE_BT_SCAN: - pcinfo = &pfwinfo->rpt_fbtc_btscan.cinfo; -- pfinfo = &pfwinfo->rpt_fbtc_btscan.finfo; -- pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btscan.finfo); -+ if (ver->fcxbtscan == 1) { -+ pfinfo = &pfwinfo->rpt_fbtc_btscan.finfo.v1; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btscan.finfo.v1); -+ } else if (ver->fcxbtscan == 2) { -+ pfinfo = &pfwinfo->rpt_fbtc_btscan.finfo.v2; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_btscan.finfo.v2); -+ } - pcinfo->req_fver = ver->fcxbtscan; - break; - case BTC_RPT_TYPE_BT_AFH: -@@ -6346,11 +6372,40 @@ static void _show_bt_info(struct rtw89_d - cx->cnt_bt[BTC_BCNT_INFOSAME]); - - seq_printf(m, -- " %-15s : Hi-rx = %d, Hi-tx = %d, Lo-rx = %d, Lo-tx = %d (bt_polut_wl_tx = %d)\n", -+ " %-15s : Hi-rx = %d, Hi-tx = %d, Lo-rx = %d, Lo-tx = %d (bt_polut_wl_tx = %d)", - "[trx_req_cnt]", cx->cnt_bt[BTC_BCNT_HIPRI_RX], - cx->cnt_bt[BTC_BCNT_HIPRI_TX], cx->cnt_bt[BTC_BCNT_LOPRI_RX], - cx->cnt_bt[BTC_BCNT_LOPRI_TX], cx->cnt_bt[BTC_BCNT_POLUT]); - -+ if (!bt->scan_info_update) { -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_SCAN_INFO, true); -+ seq_puts(m, "\n"); -+ } else { -+ rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_SCAN_INFO, false); -+ if (ver->fcxbtscan == 1) { -+ seq_printf(m, -+ "(INQ:%d-%d/PAGE:%d-%d/LE:%d-%d/INIT:%d-%d)", -+ le16_to_cpu(bt->scan_info_v1[BTC_SCAN_INQ].win), -+ le16_to_cpu(bt->scan_info_v1[BTC_SCAN_INQ].intvl), -+ le16_to_cpu(bt->scan_info_v1[BTC_SCAN_PAGE].win), -+ le16_to_cpu(bt->scan_info_v1[BTC_SCAN_PAGE].intvl), -+ le16_to_cpu(bt->scan_info_v1[BTC_SCAN_BLE].win), -+ le16_to_cpu(bt->scan_info_v1[BTC_SCAN_BLE].intvl), -+ le16_to_cpu(bt->scan_info_v1[BTC_SCAN_INIT].win), -+ le16_to_cpu(bt->scan_info_v1[BTC_SCAN_INIT].intvl)); -+ } else if (ver->fcxbtscan == 2) { -+ seq_printf(m, -+ "(BG:%d-%d/INIT:%d-%d/LE:%d-%d)", -+ le16_to_cpu(bt->scan_info_v2[CXSCAN_BG].win), -+ le16_to_cpu(bt->scan_info_v2[CXSCAN_BG].intvl), -+ le16_to_cpu(bt->scan_info_v2[CXSCAN_INIT].win), -+ le16_to_cpu(bt->scan_info_v2[CXSCAN_INIT].intvl), -+ le16_to_cpu(bt->scan_info_v2[CXSCAN_LE].win), -+ le16_to_cpu(bt->scan_info_v2[CXSCAN_LE].intvl)); -+ } -+ seq_puts(m, "\n"); -+ } -+ - if (bt->enable.now && bt->ver_info.fw == 0) - rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_BT_VER_INFO, true); - else ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -1445,14 +1445,6 @@ struct rtw89_btc_wl_tx_limit_para { - u16 tx_retry; - }; - --struct rtw89_btc_bt_scan_info { -- u16 win; -- u16 intvl; -- u32 enable: 1; -- u32 interlace: 1; -- u32 rsvd: 30; --}; -- - enum rtw89_btc_bt_scan_type { - BTC_SCAN_INQ = 0, - BTC_SCAN_PAGE, -@@ -1463,9 +1455,50 @@ enum rtw89_btc_bt_scan_type { - BTC_SCAN_MAX1, - }; - -+enum rtw89_btc_ble_scan_type { -+ CXSCAN_BG = 0, -+ CXSCAN_INIT, -+ CXSCAN_LE, -+ CXSCAN_MAX -+}; -+ -+#define RTW89_BTC_BTC_SCAN_V1_FLAG_ENABLE BIT(0) -+#define RTW89_BTC_BTC_SCAN_V1_FLAG_INTERLACE BIT(1) -+ -+struct rtw89_btc_bt_scan_info_v1 { -+ __le16 win; -+ __le16 intvl; -+ __le32 flags; -+} __packed; -+ -+struct rtw89_btc_bt_scan_info_v2 { -+ __le16 win; -+ __le16 intvl; -+} __packed; -+ -+struct rtw89_btc_fbtc_btscan_v1 { -+ u8 fver; /* btc_ver::fcxbtscan */ -+ u8 rsvd; -+ __le16 rsvd2; -+ struct rtw89_btc_bt_scan_info_v1 scan[BTC_SCAN_MAX1]; -+} __packed; -+ -+struct rtw89_btc_fbtc_btscan_v2 { -+ u8 fver; /* btc_ver::fcxbtscan */ -+ u8 type; -+ __le16 rsvd2; -+ struct rtw89_btc_bt_scan_info_v2 para[CXSCAN_MAX]; -+} __packed; -+ -+union rtw89_btc_fbtc_btscan { -+ struct rtw89_btc_fbtc_btscan_v1 v1; -+ struct rtw89_btc_fbtc_btscan_v2 v2; -+}; -+ - struct rtw89_btc_bt_info { - struct rtw89_btc_bt_link_info link_info; -- struct rtw89_btc_bt_scan_info scan_info[BTC_SCAN_MAX1]; -+ struct rtw89_btc_bt_scan_info_v1 scan_info_v1[BTC_SCAN_MAX1]; -+ struct rtw89_btc_bt_scan_info_v2 scan_info_v2[CXSCAN_MAX]; - struct rtw89_btc_bt_ver_info ver_info; - struct rtw89_btc_bool_sta_chg enable; - struct rtw89_btc_bool_sta_chg inq_pag; -@@ -1488,7 +1521,8 @@ struct rtw89_btc_bt_info { - u32 run_patch_code: 1; - u32 hi_lna_rx: 1; - u32 scan_rx_low_pri: 1; -- u32 rsvd: 21; -+ u32 scan_info_update: 1; -+ u32 rsvd: 20; - }; - - struct rtw89_btc_cx { -@@ -2006,13 +2040,6 @@ struct rtw89_btc_fbtc_btver { - __le32 feature; - } __packed; - --struct rtw89_btc_fbtc_btscan { -- u8 fver; /* btc_ver::fcxbtscan */ -- u8 rsvd; -- __le16 rsvd2; -- u8 scan[6]; --} __packed; -- - struct rtw89_btc_fbtc_btafh { - u8 fver; /* btc_ver::fcxbtafh */ - u8 rsvd; -@@ -2231,7 +2258,7 @@ struct rtw89_btc_rpt_fbtc_btver { - - struct rtw89_btc_rpt_fbtc_btscan { - struct rtw89_btc_rpt_cmn_info cinfo; /* common info, by driver */ -- struct rtw89_btc_fbtc_btscan finfo; /* info from fw */ -+ union rtw89_btc_fbtc_btscan finfo; /* info from fw */ - }; - - struct rtw89_btc_rpt_fbtc_btafh { diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-016-wifi-rtw89-coex-Add-v5-firmware-cycle-status-report.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-016-wifi-rtw89-coex-Add-v5-firmware-cycle-status-report.patch deleted file mode 100644 index dbbfc81f9..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-016-wifi-rtw89-coex-Add-v5-firmware-cycle-status-report.patch +++ /dev/null @@ -1,375 +0,0 @@ -From 3ab7f9b90cc0a737e0bd8a312dc48814c4682867 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Wed, 8 Mar 2023 13:32:25 +0800 -Subject: [PATCH 016/136] wifi: rtw89: coex: Add v5 firmware cycle status - report - -To support v5 version firmware cycle report, apply the related structure -and functions. v5 cycle report add a group of status to show how the -free-run/TDMA training goes to. It is a firmware mechanism that can auto -adjust coexistence mode between TDMA and free run mechanism at 3 antenna -solution. v5 version provide more reference data to let the mechanism -make decision. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230308053225.24377-8-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 194 +++++++++++++++++++++- - drivers/net/wireless/realtek/rtw89/coex.h | 5 + - drivers/net/wireless/realtek/rtw89/core.h | 52 ++++++ - 3 files changed, 249 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -987,8 +987,8 @@ static u32 _chk_btc_report(struct rtw89_ - void *rpt_content = NULL, *pfinfo = NULL; - u8 rpt_type = 0; - u16 wl_slot_set = 0, wl_slot_real = 0; -- u32 trace_step = btc->ctrl.trace_step, rpt_len = 0, diff_t; -- u32 cnt_leak_slot = 0, bt_slot_real = 0, cnt_rx_imr = 0; -+ u32 trace_step = btc->ctrl.trace_step, rpt_len = 0, diff_t = 0; -+ u32 cnt_leak_slot, bt_slot_real, bt_slot_set, cnt_rx_imr; - u8 i; - - rtw89_debug(rtwdev, RTW89_DBG_BTC, -@@ -1061,6 +1061,10 @@ static u32 _chk_btc_report(struct rtw89_ - pfinfo = &pfwinfo->rpt_fbtc_cysta.finfo.v4; - pcysta->v4 = pfwinfo->rpt_fbtc_cysta.finfo.v4; - pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo.v4); -+ } else if (ver->fcxcysta == 5) { -+ pfinfo = &pfwinfo->rpt_fbtc_cysta.finfo.v5; -+ pcysta->v5 = pfwinfo->rpt_fbtc_cysta.finfo.v5; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_fbtc_cysta.finfo.v5); - } else { - goto err; - } -@@ -1406,6 +1410,54 @@ static u32 _chk_btc_report(struct rtw89_ - le16_to_cpu(pcysta->v4.slot_cnt[CXST_B1])); - _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_HANG, - le16_to_cpu(pcysta->v4.cycles)); -+ } else if (ver->fcxcysta == 5) { -+ if (dm->fddt_train == BTC_FDDT_ENABLE) -+ break; -+ cnt_leak_slot = le16_to_cpu(pcysta->v5.slot_cnt[CXST_LK]); -+ cnt_rx_imr = le32_to_cpu(pcysta->v5.leak_slot.cnt_rximr); -+ -+ /* Check Leak-AP */ -+ if (cnt_leak_slot != 0 && cnt_rx_imr != 0 && -+ dm->tdma_now.rxflctrl) { -+ if (le16_to_cpu(pcysta->v5.cycles) >= BTC_CYSTA_CHK_PERIOD && -+ cnt_leak_slot < BTC_LEAK_AP_TH * cnt_rx_imr) -+ dm->leak_ap = 1; -+ } -+ -+ /* Check diff time between real WL slot and W1 slot */ -+ if (dm->tdma_now.type == CXTDMA_OFF) { -+ wl_slot_set = le16_to_cpu(dm->slot_now[CXST_W1].dur); -+ wl_slot_real = le16_to_cpu(pcysta->v5.cycle_time.tavg[CXT_WL]); -+ -+ if (wl_slot_real > wl_slot_set) -+ diff_t = wl_slot_real - wl_slot_set; -+ else -+ diff_t = wl_slot_set - wl_slot_real; -+ } -+ _chk_btc_err(rtwdev, BTC_DCNT_WL_SLOT_DRIFT, diff_t); -+ -+ /* Check diff time between real BT slot and EBT/E5G slot */ -+ bt_slot_set = btc->bt_req_len; -+ bt_slot_real = le16_to_cpu(pcysta->v5.cycle_time.tavg[CXT_BT]); -+ diff_t = 0; -+ if (dm->tdma_now.type == CXTDMA_OFF && -+ dm->tdma_now.ext_ctrl == CXECTL_EXT && -+ bt_slot_set != 0) { -+ if (bt_slot_set > bt_slot_real) -+ diff_t = bt_slot_set - bt_slot_real; -+ else -+ diff_t = bt_slot_real - bt_slot_set; -+ } -+ -+ _chk_btc_err(rtwdev, BTC_DCNT_BT_SLOT_DRIFT, diff_t); -+ _chk_btc_err(rtwdev, BTC_DCNT_E2G_HANG, -+ le16_to_cpu(pcysta->v5.slot_cnt[CXST_E2G])); -+ _chk_btc_err(rtwdev, BTC_DCNT_W1_HANG, -+ le16_to_cpu(pcysta->v5.slot_cnt[CXST_W1])); -+ _chk_btc_err(rtwdev, BTC_DCNT_B1_HANG, -+ le16_to_cpu(pcysta->v5.slot_cnt[CXST_B1])); -+ _chk_btc_err(rtwdev, BTC_DCNT_CYCLE_HANG, -+ le16_to_cpu(pcysta->v5.cycles)); - } else { - goto err; - } -@@ -5039,6 +5091,7 @@ void _run_coex(struct rtw89_dev *rtwdev, - } - - dm->cnt_dm[BTC_DCNT_RUN]++; -+ dm->fddt_train = BTC_FDDT_DISABLE; - - if (btc->ctrl.always_freerun) { - _action_freerun(rtwdev); -@@ -6727,6 +6780,10 @@ static void _show_error(struct rtw89_dev - pcysta->v4 = pfwinfo->rpt_fbtc_cysta.finfo.v4; - except_cnt = pcysta->v4.except_cnt; - exception_map = le32_to_cpu(pcysta->v4.except_map); -+ } else if (ver->fcxcysta == 5) { -+ pcysta->v5 = pfwinfo->rpt_fbtc_cysta.finfo.v5; -+ except_cnt = pcysta->v5.except_cnt; -+ exception_map = le32_to_cpu(pcysta->v5.except_map); - } else { - return; - } -@@ -7215,6 +7272,137 @@ static void _show_fbtc_cysta_v4(struct r - } - } - -+static void _show_fbtc_cysta_v5(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_bt_a2dp_desc *a2dp = &btc->cx.bt.link_info.a2dp_desc; -+ struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_fbtc_a2dp_trx_stat_v4 *a2dp_trx; -+ struct rtw89_btc_fbtc_cysta_v5 *pcysta; -+ struct rtw89_btc_rpt_cmn_info *pcinfo; -+ u8 i, cnt = 0, slot_pair, divide_cnt; -+ u16 cycle, c_begin, c_end, store_index; -+ -+ pcinfo = &pfwinfo->rpt_fbtc_cysta.cinfo; -+ if (!pcinfo->valid) -+ return; -+ -+ pcysta = &pfwinfo->rpt_fbtc_cysta.finfo.v5; -+ seq_printf(m, -+ " %-15s : cycle:%d, bcn[all:%d/all_ok:%d/bt:%d/bt_ok:%d]", -+ "[cycle_cnt]", -+ le16_to_cpu(pcysta->cycles), -+ le16_to_cpu(pcysta->bcn_cnt[CXBCN_ALL]), -+ le16_to_cpu(pcysta->bcn_cnt[CXBCN_ALL_OK]), -+ le16_to_cpu(pcysta->bcn_cnt[CXBCN_BT_SLOT]), -+ le16_to_cpu(pcysta->bcn_cnt[CXBCN_BT_OK])); -+ -+ for (i = 0; i < CXST_MAX; i++) { -+ if (!le16_to_cpu(pcysta->slot_cnt[i])) -+ continue; -+ -+ seq_printf(m, ", %s:%d", id_to_slot(i), -+ le16_to_cpu(pcysta->slot_cnt[i])); -+ } -+ -+ if (dm->tdma_now.rxflctrl) -+ seq_printf(m, ", leak_rx:%d", -+ le32_to_cpu(pcysta->leak_slot.cnt_rximr)); -+ -+ if (pcysta->collision_cnt) -+ seq_printf(m, ", collision:%d", pcysta->collision_cnt); -+ -+ if (le16_to_cpu(pcysta->skip_cnt)) -+ seq_printf(m, ", skip:%d", -+ le16_to_cpu(pcysta->skip_cnt)); -+ -+ seq_puts(m, "\n"); -+ -+ seq_printf(m, " %-15s : avg_t[wl:%d/bt:%d/lk:%d.%03d]", -+ "[cycle_time]", -+ le16_to_cpu(pcysta->cycle_time.tavg[CXT_WL]), -+ le16_to_cpu(pcysta->cycle_time.tavg[CXT_BT]), -+ le16_to_cpu(pcysta->leak_slot.tavg) / 1000, -+ le16_to_cpu(pcysta->leak_slot.tavg) % 1000); -+ seq_printf(m, -+ ", max_t[wl:%d/bt:%d/lk:%d.%03d]\n", -+ le16_to_cpu(pcysta->cycle_time.tmax[CXT_WL]), -+ le16_to_cpu(pcysta->cycle_time.tmax[CXT_BT]), -+ le16_to_cpu(pcysta->leak_slot.tmax) / 1000, -+ le16_to_cpu(pcysta->leak_slot.tmax) % 1000); -+ -+ cycle = le16_to_cpu(pcysta->cycles); -+ if (cycle <= 1) -+ return; -+ -+ /* 1 cycle record 1 wl-slot and 1 bt-slot */ -+ slot_pair = BTC_CYCLE_SLOT_MAX / 2; -+ -+ if (cycle <= slot_pair) -+ c_begin = 1; -+ else -+ c_begin = cycle - slot_pair + 1; -+ -+ c_end = cycle; -+ -+ if (a2dp->exist) -+ divide_cnt = 3; -+ else -+ divide_cnt = BTC_CYCLE_SLOT_MAX / 4; -+ -+ if (c_begin > c_end) -+ return; -+ -+ for (cycle = c_begin; cycle <= c_end; cycle++) { -+ cnt++; -+ store_index = ((cycle - 1) % slot_pair) * 2; -+ -+ if (cnt % divide_cnt == 1) -+ seq_printf(m, " %-15s : ", "[cycle_step]"); -+ -+ seq_printf(m, "->b%02d", -+ le16_to_cpu(pcysta->slot_step_time[store_index])); -+ if (a2dp->exist) { -+ a2dp_trx = &pcysta->a2dp_trx[store_index]; -+ seq_printf(m, "(%d/%d/%dM/%d/%d/%d)", -+ a2dp_trx->empty_cnt, -+ a2dp_trx->retry_cnt, -+ a2dp_trx->tx_rate ? 3 : 2, -+ a2dp_trx->tx_cnt, -+ a2dp_trx->ack_cnt, -+ a2dp_trx->nack_cnt); -+ } -+ seq_printf(m, "->w%02d", -+ le16_to_cpu(pcysta->slot_step_time[store_index + 1])); -+ if (a2dp->exist) { -+ a2dp_trx = &pcysta->a2dp_trx[store_index + 1]; -+ seq_printf(m, "(%d/%d/%dM/%d/%d/%d)", -+ a2dp_trx->empty_cnt, -+ a2dp_trx->retry_cnt, -+ a2dp_trx->tx_rate ? 3 : 2, -+ a2dp_trx->tx_cnt, -+ a2dp_trx->ack_cnt, -+ a2dp_trx->nack_cnt); -+ } -+ if (cnt % divide_cnt == 0 || cnt == c_end) -+ seq_puts(m, "\n"); -+ } -+ -+ if (a2dp->exist) { -+ seq_printf(m, " %-15s : a2dp_ept:%d, a2dp_late:%d", -+ "[a2dp_t_sta]", -+ le16_to_cpu(pcysta->a2dp_ept.cnt), -+ le16_to_cpu(pcysta->a2dp_ept.cnt_timeout)); -+ -+ seq_printf(m, ", avg_t:%d, max_t:%d", -+ le16_to_cpu(pcysta->a2dp_ept.tavg), -+ le16_to_cpu(pcysta->a2dp_ept.tmax)); -+ -+ seq_puts(m, "\n"); -+ } -+} -+ - static void _show_fbtc_nullsta(struct rtw89_dev *rtwdev, struct seq_file *m) - { - struct rtw89_btc *btc = &rtwdev->btc; -@@ -7419,6 +7607,8 @@ static void _show_fw_dm_msg(struct rtw89 - _show_fbtc_cysta_v3(rtwdev, m); - else if (ver->fcxcysta == 4) - _show_fbtc_cysta_v4(rtwdev, m); -+ else if (ver->fcxcysta == 5) -+ _show_fbtc_cysta_v5(rtwdev, m); - - _show_fbtc_nullsta(rtwdev, m); - ---- a/drivers/net/wireless/realtek/rtw89/coex.h -+++ b/drivers/net/wireless/realtek/rtw89/coex.h -@@ -66,6 +66,11 @@ enum btc_rssi_st { - BTC_RSSI_ST_MAX - }; - -+enum btc_fddt_en { -+ BTC_FDDT_DISABLE, -+ BTC_FDDT_ENABLE, -+}; -+ - #define BTC_RSSI_HIGH(_rssi_) \ - ({typeof(_rssi_) __rssi = (_rssi_); \ - ((__rssi == BTC_RSSI_ST_HIGH || \ ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -1894,6 +1894,11 @@ struct rtw89_btc_fbtc_cycle_time_info { - __le16 tmaxdiff[CXT_MAX]; /* max wl-wl bt-bt cycle diff time */ - } __packed; - -+struct rtw89_btc_fbtc_cycle_time_info_v5 { -+ __le16 tavg[CXT_MAX]; /* avg wl/bt cycle time */ -+ __le16 tmax[CXT_MAX]; /* max wl/bt cycle time */ -+} __packed; -+ - struct rtw89_btc_fbtc_a2dp_trx_stat { - u8 empty_cnt; - u8 retry_cnt; -@@ -1950,6 +1955,21 @@ struct rtw89_btc_fbtc_cycle_fddt_info { - #define RTW89_BTC_FDDT_CELL_TRAIN_STATE GENMASK(3, 0) - #define RTW89_BTC_FDDT_CELL_TRAIN_PHASE GENMASK(7, 4) - -+struct rtw89_btc_fbtc_cycle_fddt_info_v5 { -+ __le16 train_cycle; -+ __le16 tp; -+ -+ s8 tx_power; /* absolute Tx power (dBm), 0xff-> no BTC control */ -+ s8 bt_tx_power; /* decrease Tx power (dB) */ -+ s8 bt_rx_gain; /* LNA constrain level */ -+ u8 no_empty_cnt; -+ -+ u8 rssi; /* [7:4] -> bt_rssi_level, [3:0]-> wl_rssi_level */ -+ u8 cn; /* condition_num */ -+ u8 train_status; /* [7:4]-> train-state, [3:0]-> train-phase */ -+ u8 train_result; /* refer to enum btc_fddt_check_map */ -+} __packed; -+ - struct rtw89_btc_fbtc_fddt_cell_status { - s8 wl_tx_pwr; - s8 bt_tx_pwr; -@@ -1957,6 +1977,12 @@ struct rtw89_btc_fbtc_fddt_cell_status { - u8 state_phase; /* [0:3] train state, [4:7] train phase */ - } __packed; - -+struct rtw89_btc_fbtc_fddt_cell_status_v5 { -+ s8 wl_tx_pwr; -+ s8 bt_tx_pwr; -+ s8 bt_rx_gain; -+} __packed; -+ - struct rtw89_btc_fbtc_cysta_v3 { /* statistics for cycles */ - u8 fver; - u8 rsvd; -@@ -2002,10 +2028,35 @@ struct rtw89_btc_fbtc_cysta_v4 { /* stat - __le32 except_map; - } __packed; - -+struct rtw89_btc_fbtc_cysta_v5 { /* statistics for cycles */ -+ u8 fver; -+ u8 rsvd; -+ u8 collision_cnt; /* counter for event/timer occur at the same time */ -+ u8 except_cnt; -+ u8 wl_rx_err_ratio[BTC_CYCLE_SLOT_MAX]; -+ -+ __le16 skip_cnt; -+ __le16 cycles; /* total cycle number */ -+ -+ __le16 slot_step_time[BTC_CYCLE_SLOT_MAX]; /* record the wl/bt slot time */ -+ __le16 slot_cnt[CXST_MAX]; /* slot count */ -+ __le16 bcn_cnt[CXBCN_MAX]; -+ struct rtw89_btc_fbtc_cycle_time_info_v5 cycle_time; -+ struct rtw89_btc_fbtc_cycle_leak_info leak_slot; -+ struct rtw89_btc_fbtc_cycle_a2dp_empty_info a2dp_ept; -+ struct rtw89_btc_fbtc_a2dp_trx_stat_v4 a2dp_trx[BTC_CYCLE_SLOT_MAX]; -+ struct rtw89_btc_fbtc_cycle_fddt_info_v5 fddt_trx[BTC_CYCLE_SLOT_MAX]; -+ struct rtw89_btc_fbtc_fddt_cell_status_v5 fddt_cells[FDD_TRAIN_WL_DIRECTION] -+ [FDD_TRAIN_WL_RSSI_LEVEL] -+ [FDD_TRAIN_BT_RSSI_LEVEL]; -+ __le32 except_map; -+} __packed; -+ - union rtw89_btc_fbtc_cysta_info { - struct rtw89_btc_fbtc_cysta_v2 v2; - struct rtw89_btc_fbtc_cysta_v3 v3; - struct rtw89_btc_fbtc_cysta_v4 v4; -+ struct rtw89_btc_fbtc_cysta_v5 v5; - }; - - struct rtw89_btc_fbtc_cynullsta_v1 { /* cycle null statistics */ -@@ -2123,6 +2174,7 @@ struct rtw89_btc_dm { - u32 wl_only: 1; - u32 wl_fw_cx_offload: 1; - u32 freerun: 1; -+ u32 fddt_train: 1; - u32 wl_ps_ctrl: 2; - u32 wl_mimo_ps: 1; - u32 leak_ap: 1; diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-017-wifi-rtw89-coex-Add-LPS-protocol-radio-state-for-RTL.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-017-wifi-rtw89-coex-Add-LPS-protocol-radio-state-for-RTL.patch deleted file mode 100644 index bd949ff2e..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-017-wifi-rtw89-coex-Add-LPS-protocol-radio-state-for-RTL.patch +++ /dev/null @@ -1,62 +0,0 @@ -From 70a13e5f00e9ee5497b0c25c2787347c4431b5e4 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 14 Mar 2023 10:06:13 +0800 -Subject: [PATCH 017/136] wifi: rtw89: coex: Add LPS protocol radio state for - RTL8852B - -This LPS state will not turn off RF, and it can still do some basic -traffic, only RTL8852B has the state. Coexistence need let Bluetooth -know WiFi is still alive to prevent some Bluetooth performance issue. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230314020617.28193-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 10 +++++++++- - drivers/net/wireless/realtek/rtw89/coex.h | 1 + - 2 files changed, 10 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -5728,6 +5728,11 @@ void rtw89_btc_ntfy_radio_state(struct r - wl->status.map.lps = BTC_LPS_RF_OFF; - wl->status.map.busy = 0; - break; -+ case BTC_RFCTRL_LPS_WL_ON: /* LPS-Protocol (RFon) */ -+ wl->status.map.rf_off = 0; -+ wl->status.map.lps = BTC_LPS_RF_ON; -+ wl->status.map.busy = 0; -+ break; - case BTC_RFCTRL_WL_ON: - default: - wl->status.map.rf_off = 0; -@@ -5745,6 +5750,9 @@ void rtw89_btc_ntfy_radio_state(struct r - rtw89_btc_fw_en_rpt(rtwdev, RPT_EN_ALL, false); - if (rf_state == BTC_RFCTRL_WL_OFF) - _write_scbd(rtwdev, BTC_WSCB_ALL, false); -+ else if (rf_state == BTC_RFCTRL_LPS_WL_ON && -+ wl->status.map.lps_pre != BTC_LPS_OFF) -+ _update_bt_scbd(rtwdev, true); - } - - btc->dm.cnt_dm[BTC_DCNT_BTCNT_HANG] = 0; -@@ -5755,7 +5763,7 @@ void rtw89_btc_ntfy_radio_state(struct r - btc->dm.tdma_instant_excute = 0; - - _run_coex(rtwdev, BTC_RSN_NTFY_RADIO_STATE); -- -+ btc->dm.tdma_instant_excute = 0; - wl->status.map.rf_off_pre = wl->status.map.rf_off; - wl->status.map.lps_pre = wl->status.map.lps; - } ---- a/drivers/net/wireless/realtek/rtw89/coex.h -+++ b/drivers/net/wireless/realtek/rtw89/coex.h -@@ -131,6 +131,7 @@ enum btc_role_state { - enum btc_rfctrl { - BTC_RFCTRL_WL_OFF, - BTC_RFCTRL_WL_ON, -+ BTC_RFCTRL_LPS_WL_ON, - BTC_RFCTRL_FW_CTRL, - BTC_RFCTRL_MAX - }; diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-018-wifi-rtw89-coex-Not-to-enable-firmware-report-when-W.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-018-wifi-rtw89-coex-Not-to-enable-firmware-report-when-W.patch deleted file mode 100644 index d43282d2f..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-018-wifi-rtw89-coex-Not-to-enable-firmware-report-when-W.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 829b3a8b212a71b55598b9bd5861a41906a611ae Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 14 Mar 2023 10:06:14 +0800 -Subject: [PATCH 018/136] wifi: rtw89: coex: Not to enable firmware report when - WiFi is power saving - -If driver enable firmware report during WiFi power saving, the -firmware timer will lead to some power saving issue like, -fail to enter LPS, can not leave LPS or some unexpected issue. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230314020617.28193-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -1741,10 +1741,14 @@ static void rtw89_btc_fw_en_rpt(struct r - u32 rpt_map, bool rpt_state) - { - struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_wl_smap *wl_smap = &btc->cx.wl.status.map; - struct rtw89_btc_btf_fwinfo *fwinfo = &btc->fwinfo; - struct rtw89_btc_btf_set_report r = {0}; - u32 val, bit_map; - -+ if ((wl_smap->rf_off || wl_smap->lps != BTC_LPS_OFF) && rpt_state != 0) -+ return; -+ - bit_map = rtw89_btc_fw_rpt_ver(rtwdev, rpt_map); - - rtw89_debug(rtwdev, RTW89_DBG_BTC, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-019-wifi-rtw89-coex-Update-RTL8852B-LNA2-hardware-parame.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-019-wifi-rtw89-coex-Update-RTL8852B-LNA2-hardware-parame.patch deleted file mode 100644 index 0d35fbf34..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-019-wifi-rtw89-coex-Update-RTL8852B-LNA2-hardware-parame.patch +++ /dev/null @@ -1,168 +0,0 @@ -From 20595db3c0681cc034e50fbcba85a1e6cf3325b5 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 14 Mar 2023 10:06:15 +0800 -Subject: [PATCH 019/136] wifi: rtw89: coex: Update RTL8852B LNA2 hardware - parameter - -The LNA gain didn't set before, it will lead some WiFi RX issue. -And the setting can increase both of WiFi & BT performance while -they are both RX. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230314020617.28193-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 3 +- - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 11 ++-- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 51 ++++++++++++++++++- - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 11 ++-- - 4 files changed, 68 insertions(+), 8 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2186,12 +2186,13 @@ struct rtw89_btc_dm { - u32 wl_stb_chg: 1; - u32 pta_owner: 1; - u32 tdma_instant_excute: 1; -- u32 rsvd: 1; - - u16 slot_dur[CXST_MAX]; - - u8 run_reason; - u8 run_action; -+ -+ u8 wl_lna2: 1; - }; - - struct rtw89_btc_ctrl { ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -1947,20 +1947,25 @@ static void rtw8852a_set_wl_lna2(struct - - static void rtw8852a_btc_set_wl_rx_gain(struct rtw89_dev *rtwdev, u32 level) - { -+ struct rtw89_btc *btc = &rtwdev->btc; -+ - switch (level) { - case 0: /* original */ -+ default: - rtw8852a_bb_ctrl_btc_preagc(rtwdev, false); -- rtw8852a_set_wl_lna2(rtwdev, 0); -+ btc->dm.wl_lna2 = 0; - break; - case 1: /* for FDD free-run */ - rtw8852a_bb_ctrl_btc_preagc(rtwdev, true); -- rtw8852a_set_wl_lna2(rtwdev, 0); -+ btc->dm.wl_lna2 = 0; - break; - case 2: /* for BTG Co-Rx*/ - rtw8852a_bb_ctrl_btc_preagc(rtwdev, false); -- rtw8852a_set_wl_lna2(rtwdev, 1); -+ btc->dm.wl_lna2 = 1; - break; - } -+ -+ rtw8852a_set_wl_lna2(rtwdev, btc->dm.wl_lna2); - } - - static void rtw8852a_fill_freq_with_ppdu(struct rtw89_dev *rtwdev, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2284,15 +2284,64 @@ static void rtw8852b_btc_wl_s1_standby(s - - /* set WL standby = Rx for GNT_BT_Tx = 1->0 settle issue */ - if (state) -- rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x579); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x179); - else - rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x20); - - rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x0); - } - -+static void rtw8852b_btc_set_wl_lna2(struct rtw89_dev *rtwdev, u8 level) -+{ -+ switch (level) { -+ case 0: /* default */ -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x1000); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x15); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x1); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x17); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x2); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x15); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x3); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x17); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x0); -+ break; -+ case 1: /* Fix LNA2=5 */ -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x1000); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x15); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x1); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x5); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x2); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x15); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWA, RFREG_MASK, 0x3); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWD0, RFREG_MASK, 0x5); -+ rtw89_write_rf(rtwdev, RF_PATH_B, RR_LUTWE, RFREG_MASK, 0x0); -+ break; -+ } -+} -+ - static void rtw8852b_btc_set_wl_rx_gain(struct rtw89_dev *rtwdev, u32 level) - { -+ struct rtw89_btc *btc = &rtwdev->btc; -+ -+ switch (level) { -+ case 0: /* original */ -+ default: -+ rtw8852b_bb_ctrl_btc_preagc(rtwdev, false); -+ btc->dm.wl_lna2 = 0; -+ break; -+ case 1: /* for FDD free-run */ -+ rtw8852b_bb_ctrl_btc_preagc(rtwdev, true); -+ btc->dm.wl_lna2 = 0; -+ break; -+ case 2: /* for BTG Co-Rx*/ -+ rtw8852b_bb_ctrl_btc_preagc(rtwdev, false); -+ btc->dm.wl_lna2 = 1; -+ break; -+ } -+ -+ rtw8852b_btc_set_wl_lna2(rtwdev, btc->dm.wl_lna2); - } - - static void rtw8852b_fill_freq_with_ppdu(struct rtw89_dev *rtwdev, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2633,20 +2633,25 @@ static void rtw8852c_set_wl_lna2(struct - - static void rtw8852c_btc_set_wl_rx_gain(struct rtw89_dev *rtwdev, u32 level) - { -+ struct rtw89_btc *btc = &rtwdev->btc; -+ - switch (level) { - case 0: /* original */ -+ default: - rtw8852c_bb_ctrl_btc_preagc(rtwdev, false); -- rtw8852c_set_wl_lna2(rtwdev, 0); -+ btc->dm.wl_lna2 = 0; - break; - case 1: /* for FDD free-run */ - rtw8852c_bb_ctrl_btc_preagc(rtwdev, true); -- rtw8852c_set_wl_lna2(rtwdev, 0); -+ btc->dm.wl_lna2 = 0; - break; - case 2: /* for BTG Co-Rx*/ - rtw8852c_bb_ctrl_btc_preagc(rtwdev, false); -- rtw8852c_set_wl_lna2(rtwdev, 1); -+ btc->dm.wl_lna2 = 1; - break; - } -+ -+ rtw8852c_set_wl_lna2(rtwdev, btc->dm.wl_lna2); - } - - static void rtw8852c_fill_freq_with_ppdu(struct rtw89_dev *rtwdev, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-020-wifi-rtw89-coex-Add-report-control-v5-variation.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-020-wifi-rtw89-coex-Add-report-control-v5-variation.patch deleted file mode 100644 index 2a7b37d62..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-020-wifi-rtw89-coex-Add-report-control-v5-variation.patch +++ /dev/null @@ -1,241 +0,0 @@ -From d7904ca8a04062e1c926498966a9fab4abfab161 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 14 Mar 2023 10:06:16 +0800 -Subject: [PATCH 020/136] wifi: rtw89: coex: Add report control v5 variation - -In order to reduce firmware code size cost, remove some counter value from -the structure. But firmware didn't update version code. To parse the -correct report, add another variation version v105 to parse it. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230314020617.28193-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 148 ++++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/core.h | 23 ++++ - 2 files changed, 171 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -1022,6 +1022,11 @@ static u32 _chk_btc_report(struct rtw89_ - } else if (ver->fcxbtcrpt == 5) { - pfinfo = &pfwinfo->rpt_ctrl.finfo.v5; - pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo.v5); -+ } else if (ver->fcxbtcrpt == 105) { -+ pfinfo = &pfwinfo->rpt_ctrl.finfo.v105; -+ pcinfo->req_len = sizeof(pfwinfo->rpt_ctrl.finfo.v105); -+ pcinfo->req_fver = 5; -+ break; - } else { - goto err; - } -@@ -1264,6 +1269,33 @@ static u32 _chk_btc_report(struct rtw89_ - pfwinfo->event[BTF_EVNT_RPT]); - - dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout; -+ } else if (ver->fcxbtcrpt == 105) { -+ prpt->v105 = pfwinfo->rpt_ctrl.finfo.v105; -+ pfwinfo->rpt_en_map = le32_to_cpu(prpt->v105.rpt_info.en); -+ wl->ver_info.fw_coex = le32_to_cpu(prpt->v105.rpt_info.cx_ver); -+ wl->ver_info.fw = le32_to_cpu(prpt->v105.rpt_info.fw_ver); -+ dm->wl_fw_cx_offload = 0; -+ -+ for (i = RTW89_PHY_0; i < RTW89_PHY_MAX; i++) -+ memcpy(&dm->gnt.band[i], &prpt->v105.gnt_val[i][0], -+ sizeof(dm->gnt.band[i])); -+ -+ btc->cx.cnt_bt[BTC_BCNT_HIPRI_TX] = -+ le16_to_cpu(prpt->v105.bt_cnt[BTC_BCNT_HI_TX_V105]); -+ btc->cx.cnt_bt[BTC_BCNT_HIPRI_RX] = -+ le16_to_cpu(prpt->v105.bt_cnt[BTC_BCNT_HI_RX_V105]); -+ btc->cx.cnt_bt[BTC_BCNT_LOPRI_TX] = -+ le16_to_cpu(prpt->v105.bt_cnt[BTC_BCNT_LO_TX_V105]); -+ btc->cx.cnt_bt[BTC_BCNT_LOPRI_RX] = -+ le16_to_cpu(prpt->v105.bt_cnt[BTC_BCNT_LO_RX_V105]); -+ btc->cx.cnt_bt[BTC_BCNT_POLUT] = -+ le16_to_cpu(prpt->v105.bt_cnt[BTC_BCNT_POLLUTED_V105]); -+ -+ _chk_btc_err(rtwdev, BTC_DCNT_BTCNT_HANG, 0); -+ _chk_btc_err(rtwdev, BTC_DCNT_RPT_HANG, -+ pfwinfo->event[BTF_EVNT_RPT]); -+ -+ dm->error.map.bt_rfk_timeout = bt->rfk_info.map.timeout; - } else { - goto err; - } -@@ -8165,8 +8197,122 @@ static void _show_summary_v5(struct rtw8 - le16_to_cpu(prptctrl->rpt_info.cnt_aoac_rf_on), - le16_to_cpu(prptctrl->rpt_info.cnt_aoac_rf_off)); - } else { -+ seq_printf(m, -+ " %-15s : h2c_cnt=%d(fail:%d), c2h_cnt=%d", -+ "[summary]", pfwinfo->cnt_h2c, -+ pfwinfo->cnt_h2c_fail, pfwinfo->cnt_c2h); -+ } -+ -+ if (!pcinfo->valid || pfwinfo->len_mismch || pfwinfo->fver_mismch || -+ pfwinfo->err[BTFRE_EXCEPTION]) { -+ seq_puts(m, "\n"); -+ seq_printf(m, -+ " %-15s : WL FW rpt error!![rpt_ctrl_valid:%d/len:" -+ "0x%x/ver:0x%x/ex:%d/lps=%d/rf_off=%d]", -+ "[ERROR]", pcinfo->valid, pfwinfo->len_mismch, -+ pfwinfo->fver_mismch, pfwinfo->err[BTFRE_EXCEPTION], -+ wl->status.map.lps, wl->status.map.rf_off); -+ } -+ -+ for (i = 0; i < BTC_NCNT_NUM; i++) -+ cnt_sum += dm->cnt_notify[i]; -+ -+ seq_puts(m, "\n"); -+ seq_printf(m, -+ " %-15s : total=%d, show_coex_info=%d, power_on=%d, init_coex=%d, ", -+ "[notify_cnt]", -+ cnt_sum, cnt[BTC_NCNT_SHOW_COEX_INFO], -+ cnt[BTC_NCNT_POWER_ON], cnt[BTC_NCNT_INIT_COEX]); -+ -+ seq_printf(m, -+ "power_off=%d, radio_state=%d, role_info=%d, wl_rfk=%d, wl_sta=%d", -+ cnt[BTC_NCNT_POWER_OFF], cnt[BTC_NCNT_RADIO_STATE], -+ cnt[BTC_NCNT_ROLE_INFO], cnt[BTC_NCNT_WL_RFK], -+ cnt[BTC_NCNT_WL_STA]); -+ -+ seq_puts(m, "\n"); -+ seq_printf(m, -+ " %-15s : scan_start=%d, scan_finish=%d, switch_band=%d, special_pkt=%d, ", -+ "[notify_cnt]", -+ cnt[BTC_NCNT_SCAN_START], cnt[BTC_NCNT_SCAN_FINISH], -+ cnt[BTC_NCNT_SWITCH_BAND], cnt[BTC_NCNT_SPECIAL_PACKET]); -+ -+ seq_printf(m, -+ "timer=%d, control=%d, customerize=%d", -+ cnt[BTC_NCNT_TIMER], cnt[BTC_NCNT_CONTROL], -+ cnt[BTC_NCNT_CUSTOMERIZE]); -+} -+ -+static void _show_summary_v105(struct rtw89_dev *rtwdev, struct seq_file *m) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_btf_fwinfo *pfwinfo = &btc->fwinfo; -+ struct rtw89_btc_fbtc_rpt_ctrl_v105 *prptctrl; -+ struct rtw89_btc_rpt_cmn_info *pcinfo; -+ struct rtw89_btc_cx *cx = &btc->cx; -+ struct rtw89_btc_dm *dm = &btc->dm; -+ struct rtw89_btc_wl_info *wl = &cx->wl; -+ u32 cnt_sum = 0, *cnt = btc->dm.cnt_notify; -+ u8 i; -+ -+ if (!(dm->coex_info_map & BTC_COEX_INFO_SUMMARY)) -+ return; -+ -+ seq_puts(m, "========== [Statistics] ==========\n"); -+ -+ pcinfo = &pfwinfo->rpt_ctrl.cinfo; -+ if (pcinfo->valid && !wl->status.map.lps && !wl->status.map.rf_off) { -+ prptctrl = &pfwinfo->rpt_ctrl.finfo.v105; -+ -+ seq_printf(m, -+ " %-15s : h2c_cnt=%d(fail:%d, fw_recv:%d), c2h_cnt=%d(fw_send:%d, len:%d), ", -+ "[summary]", pfwinfo->cnt_h2c, pfwinfo->cnt_h2c_fail, -+ le16_to_cpu(prptctrl->rpt_info.cnt_h2c), -+ pfwinfo->cnt_c2h, -+ le16_to_cpu(prptctrl->rpt_info.cnt_c2h), -+ le16_to_cpu(prptctrl->rpt_info.len_c2h)); -+ -+ seq_printf(m, -+ "rpt_cnt=%d(fw_send:%d), rpt_map=0x%x", -+ pfwinfo->event[BTF_EVNT_RPT], -+ le16_to_cpu(prptctrl->rpt_info.cnt), -+ le32_to_cpu(prptctrl->rpt_info.en)); -+ -+ if (dm->error.map.wl_fw_hang) -+ seq_puts(m, " (WL FW Hang!!)"); - seq_puts(m, "\n"); - seq_printf(m, -+ " %-15s : send_ok:%d, send_fail:%d, recv:%d, ", -+ "[mailbox]", -+ le32_to_cpu(prptctrl->bt_mbx_info.cnt_send_ok), -+ le32_to_cpu(prptctrl->bt_mbx_info.cnt_send_fail), -+ le32_to_cpu(prptctrl->bt_mbx_info.cnt_recv)); -+ -+ seq_printf(m, -+ "A2DP_empty:%d(stop:%d, tx:%d, ack:%d, nack:%d)\n", -+ le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_empty), -+ le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_flowctrl), -+ le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_tx), -+ le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_ack), -+ le32_to_cpu(prptctrl->bt_mbx_info.a2dp.cnt_nack)); -+ -+ seq_printf(m, -+ " %-15s : wl_rfk[req:%d/go:%d/reject:%d/tout:%d]", -+ "[RFK/LPS]", cx->cnt_wl[BTC_WCNT_RFK_REQ], -+ cx->cnt_wl[BTC_WCNT_RFK_GO], -+ cx->cnt_wl[BTC_WCNT_RFK_REJECT], -+ cx->cnt_wl[BTC_WCNT_RFK_TIMEOUT]); -+ -+ seq_printf(m, -+ ", bt_rfk[req:%d]", -+ le16_to_cpu(prptctrl->bt_cnt[BTC_BCNT_RFK_REQ])); -+ -+ seq_printf(m, -+ ", AOAC[RF_on:%d/RF_off:%d]", -+ le16_to_cpu(prptctrl->rpt_info.cnt_aoac_rf_on), -+ le16_to_cpu(prptctrl->rpt_info.cnt_aoac_rf_off)); -+ } else { -+ seq_printf(m, - " %-15s : h2c_cnt=%d(fail:%d), c2h_cnt=%d", - "[summary]", pfwinfo->cnt_h2c, - pfwinfo->cnt_h2c_fail, pfwinfo->cnt_c2h); -@@ -8256,6 +8402,8 @@ void rtw89_btc_dump_info(struct rtw89_de - _show_summary_v4(rtwdev, m); - else if (ver->fcxbtcrpt == 5) - _show_summary_v5(rtwdev, m); -+ else if (ver->fcxbtcrpt == 105) -+ _show_summary_v105(rtwdev, m); - } - - void rtw89_coex_recognize_ver(struct rtw89_dev *rtwdev) ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -1576,6 +1576,16 @@ enum rtw89_btc_bt_sta_counter { - BTC_BCNT_STA_MAX - }; - -+enum rtw89_btc_bt_sta_counter_v105 { -+ BTC_BCNT_RFK_REQ_V105 = 0, -+ BTC_BCNT_HI_TX_V105 = 1, -+ BTC_BCNT_HI_RX_V105 = 2, -+ BTC_BCNT_LO_TX_V105 = 3, -+ BTC_BCNT_LO_RX_V105 = 4, -+ BTC_BCNT_POLLUTED_V105 = 5, -+ BTC_BCNT_STA_MAX_V105 -+}; -+ - struct rtw89_btc_fbtc_rpt_ctrl_v1 { - u16 fver; /* btc_ver::fcxbtcrpt */ - u16 rpt_cnt; /* tmr counters */ -@@ -1666,10 +1676,23 @@ struct rtw89_btc_fbtc_rpt_ctrl_v5 { - struct rtw89_btc_fbtc_rpt_ctrl_bt_mailbox bt_mbx_info; - } __packed; - -+struct rtw89_btc_fbtc_rpt_ctrl_v105 { -+ u8 fver; -+ u8 rsvd; -+ __le16 rsvd1; -+ -+ u8 gnt_val[RTW89_PHY_MAX][4]; -+ __le16 bt_cnt[BTC_BCNT_STA_MAX_V105]; -+ -+ struct rtw89_btc_fbtc_rpt_ctrl_info_v5 rpt_info; -+ struct rtw89_btc_fbtc_rpt_ctrl_bt_mailbox bt_mbx_info; -+} __packed; -+ - union rtw89_btc_fbtc_rpt_ctrl_ver_info { - struct rtw89_btc_fbtc_rpt_ctrl_v1 v1; - struct rtw89_btc_fbtc_rpt_ctrl_v4 v4; - struct rtw89_btc_fbtc_rpt_ctrl_v5 v5; -+ struct rtw89_btc_fbtc_rpt_ctrl_v105 v105; - }; - - enum rtw89_fbtc_ext_ctrl_type { diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-021-wifi-rtw89-coex-Update-Wi-Fi-Bluetooth-coexistence-v.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-021-wifi-rtw89-coex-Update-Wi-Fi-Bluetooth-coexistence-v.patch deleted file mode 100644 index 85d53ca86..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-021-wifi-rtw89-coex-Update-Wi-Fi-Bluetooth-coexistence-v.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 7527251f77664dd19716f36f53b723845d537eec Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Tue, 14 Mar 2023 10:06:17 +0800 -Subject: [PATCH 021/136] wifi: rtw89: coex: Update Wi-Fi Bluetooth coexistence - version to 7.0.1 - -Update driver with the supported firmware version of the below item. -Bluetooth firmware BT_Coex_Ver: 0x07 -Wi-Fi firmware version: - RTL8852C->v0.27.56.10 - RTL8852A->v0.24.36 - RTL8852B->v0.29.29 - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230314020617.28193-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 9 ++++++++- - 1 file changed, 8 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -9,7 +9,7 @@ - #include "ps.h" - #include "reg.h" - --#define RTW89_COEX_VERSION 0x07000013 -+#define RTW89_COEX_VERSION 0x07000113 - #define FCXDEF_STEP 50 /* MUST <= FCXMAX_STEP and match with wl fw*/ - - enum btc_fbtc_tdma_template { -@@ -148,6 +148,13 @@ static const struct rtw89_btc_ver rtw89_ - .fwlrole = 1, .frptmap = 2, .fcxctrl = 1, - .info_buf = 1280, .max_role_num = 5, - }, -+ {RTL8852B, RTW89_FW_VER_CODE(0, 29, 29, 0), -+ .fcxbtcrpt = 105, .fcxtdma = 3, .fcxslots = 1, .fcxcysta = 5, -+ .fcxstep = 3, .fcxnullsta = 2, .fcxmreg = 2, .fcxgpiodbg = 1, -+ .fcxbtver = 1, .fcxbtscan = 2, .fcxbtafh = 2, .fcxbtdevinfo = 1, -+ .fwlrole = 1, .frptmap = 3, .fcxctrl = 1, -+ .info_buf = 1800, .max_role_num = 6, -+ }, - {RTL8852B, RTW89_FW_VER_CODE(0, 29, 14, 0), - .fcxbtcrpt = 5, .fcxtdma = 3, .fcxslots = 1, .fcxcysta = 4, - .fcxstep = 3, .fcxnullsta = 2, .fcxmreg = 1, .fcxgpiodbg = 1, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-022-wifi-rtw89-add-counters-of-register-based-H2C-C2H.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-022-wifi-rtw89-add-counters-of-register-based-H2C-C2H.patch deleted file mode 100644 index a7efbef74..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-022-wifi-rtw89-add-counters-of-register-based-H2C-C2H.patch +++ /dev/null @@ -1,160 +0,0 @@ -From e749ef968f14a92155b2c3138d7720cf39e65e00 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Thu, 16 Mar 2023 14:39:56 +0800 -Subject: [PATCH 022/136] wifi: rtw89: add counters of register-based H2C/C2H - -The register-based H2C/C2H are used to exchange information between driver -and firmware, but only apply to narrow area because its data size is -smaller than regular packet-based H2C/C2H. - -This kind of H2C/C2H must be paired. To identify if any H2C/C2H is missing, -update counters to help diagnose this kind of problems. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230316063956.71687-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 4 ++++ - drivers/net/wireless/realtek/rtw89/fw.c | 11 +++++++++++ - drivers/net/wireless/realtek/rtw89/mac.c | 2 ++ - drivers/net/wireless/realtek/rtw89/reg.h | 5 +++++ - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 2 ++ - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 2 ++ - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 2 ++ - 7 files changed, 28 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3140,8 +3140,10 @@ struct rtw89_chip_info { - u32 txwd_body_size; - u32 h2c_ctrl_reg; - const u32 *h2c_regs; -+ struct rtw89_reg_def h2c_counter_reg; - u32 c2h_ctrl_reg; - const u32 *c2h_regs; -+ struct rtw89_reg_def c2h_counter_reg; - const struct rtw89_page_regs *page_regs; - bool cfo_src_fd; - const struct rtw89_reg_def *dcfo_comp; -@@ -3268,6 +3270,8 @@ struct rtw89_fw_info { - struct completion completion; - u8 h2c_seq; - u8 rec_seq; -+ u8 h2c_counter; -+ u8 c2h_counter; - struct rtw89_fw_suit normal; - struct rtw89_fw_suit wowlan; - bool fw_log_enable; ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -615,6 +615,8 @@ int rtw89_fw_download(struct rtw89_dev * - - fw_info->h2c_seq = 0; - fw_info->rec_seq = 0; -+ fw_info->h2c_counter = 0; -+ fw_info->c2h_counter = 0; - rtwdev->mac.rpwm_seq_num = RPWM_SEQ_NUM_MAX; - rtwdev->mac.cpwm_seq_num = CPWM_SEQ_NUM_MAX; - -@@ -2724,6 +2726,7 @@ static int rtw89_fw_write_h2c_reg(struct - struct rtw89_mac_h2c_info *info) - { - const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_fw_info *fw_info = &rtwdev->fw; - const u32 *h2c_reg = chip->h2c_regs; - u8 i, val, len; - int ret; -@@ -2743,6 +2746,9 @@ static int rtw89_fw_write_h2c_reg(struct - for (i = 0; i < RTW89_H2CREG_MAX; i++) - rtw89_write32(rtwdev, h2c_reg[i], info->h2creg[i]); - -+ fw_info->h2c_counter++; -+ rtw89_write8_mask(rtwdev, chip->h2c_counter_reg.addr, -+ chip->h2c_counter_reg.mask, fw_info->h2c_counter); - rtw89_write8(rtwdev, chip->h2c_ctrl_reg, B_AX_H2CREG_TRIGGER); - - return 0; -@@ -2752,6 +2758,7 @@ static int rtw89_fw_read_c2h_reg(struct - struct rtw89_mac_c2h_info *info) - { - const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_fw_info *fw_info = &rtwdev->fw; - const u32 *c2h_reg = chip->c2h_regs; - u32 ret; - u8 i, val; -@@ -2775,6 +2782,10 @@ static int rtw89_fw_read_c2h_reg(struct - info->content_len = (RTW89_GET_C2H_HDR_LEN(*info->c2hreg) << 2) - - RTW89_C2HREG_HDR_LEN; - -+ fw_info->c2h_counter++; -+ rtw89_write8_mask(rtwdev, chip->c2h_counter_reg.addr, -+ chip->c2h_counter_reg.mask, fw_info->c2h_counter); -+ - return 0; - } - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -3398,6 +3398,8 @@ int rtw89_mac_enable_cpu(struct rtw89_de - if (rtw89_read32(rtwdev, R_AX_PLATFORM_ENABLE) & B_AX_WCPU_EN) - return -EFAULT; - -+ rtw89_write32(rtwdev, R_AX_UDM1, 0); -+ rtw89_write32(rtwdev, R_AX_UDM2, 0); - rtw89_write32(rtwdev, R_AX_HALT_H2C_CTRL, 0); - rtw89_write32(rtwdev, R_AX_HALT_C2H_CTRL, 0); - rtw89_write32(rtwdev, R_AX_HALT_H2C, 0); ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -207,6 +207,11 @@ - - #define R_AX_UDM0 0x01F0 - #define R_AX_UDM1 0x01F4 -+#define B_AX_UDM1_MASK GENMASK(31, 16) -+#define B_AX_UDM1_HALMAC_C2H_ENQ_CNT_MASK GENMASK(15, 12) -+#define B_AX_UDM1_HALMAC_H2C_DEQ_CNT_MASK GENMASK(11, 8) -+#define B_AX_UDM1_WCPU_C2H_ENQ_CNT_MASK GENMASK(7, 4) -+#define B_AX_UDM1_WCPU_H2C_DEQ_CNT_MASK GENMASK(3, 0) - #define R_AX_UDM2 0x01F8 - #define R_AX_UDM3 0x01FC - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -2136,9 +2136,11 @@ const struct rtw89_chip_info rtw8852a_ch - .h2c_desc_size = sizeof(struct rtw89_txwd_body), - .txwd_body_size = sizeof(struct rtw89_txwd_body), - .h2c_ctrl_reg = R_AX_H2CREG_CTRL, -+ .h2c_counter_reg = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_H2C_DEQ_CNT_MASK >> 8}, - .h2c_regs = rtw8852a_h2c_regs, - .c2h_ctrl_reg = R_AX_C2HREG_CTRL, - .c2h_regs = rtw8852a_c2h_regs, -+ .c2h_counter_reg = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_C2H_ENQ_CNT_MASK >> 8}, - .page_regs = &rtw8852a_page_regs, - .cfo_src_fd = false, - .dcfo_comp = &rtw8852a_dcfo_comp, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2557,8 +2557,10 @@ const struct rtw89_chip_info rtw8852b_ch - .h2c_desc_size = sizeof(struct rtw89_txwd_body), - .txwd_body_size = sizeof(struct rtw89_txwd_body), - .h2c_ctrl_reg = R_AX_H2CREG_CTRL, -+ .h2c_counter_reg = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_H2C_DEQ_CNT_MASK >> 8}, - .h2c_regs = rtw8852b_h2c_regs, - .c2h_ctrl_reg = R_AX_C2HREG_CTRL, -+ .c2h_counter_reg = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_C2H_ENQ_CNT_MASK >> 8}, - .c2h_regs = rtw8852b_c2h_regs, - .page_regs = &rtw8852b_page_regs, - .cfo_src_fd = true, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2872,8 +2872,10 @@ const struct rtw89_chip_info rtw8852c_ch - .h2c_desc_size = sizeof(struct rtw89_rxdesc_short), - .txwd_body_size = sizeof(struct rtw89_txwd_body_v1), - .h2c_ctrl_reg = R_AX_H2CREG_CTRL_V1, -+ .h2c_counter_reg = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_H2C_DEQ_CNT_MASK >> 8}, - .h2c_regs = rtw8852c_h2c_regs, - .c2h_ctrl_reg = R_AX_C2HREG_CTRL_V1, -+ .c2h_counter_reg = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_C2H_ENQ_CNT_MASK >> 8}, - .c2h_regs = rtw8852c_c2h_regs, - .page_regs = &rtw8852c_page_regs, - .cfo_src_fd = false, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-023-wifi-rtw89-set-data-lowest-rate-according-to-AP-supp.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-023-wifi-rtw89-set-data-lowest-rate-according-to-AP-supp.patch deleted file mode 100644 index 27595a768..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-023-wifi-rtw89-set-data-lowest-rate-according-to-AP-supp.patch +++ /dev/null @@ -1,80 +0,0 @@ -From e5307c9cd7ee50accd4e5f28d6a6e09ec11849e3 Mon Sep 17 00:00:00 2001 -From: Chih-Kang Chang -Date: Mon, 20 Mar 2023 17:31:10 +0800 -Subject: [PATCH 023/136] wifi: rtw89: set data lowest rate according to AP - supported rate - -By default the driver uses the 1M and 6M rate (0x0) for data frames in -2 GHz and 5/6 GHz bands respectively. But the rate that might not AP -supported. Therefore, We modify the data lowest rate according to the -lowest of AP supported rate. - -Signed-off-by: Chih-Kang Chang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230320093112.30466-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 38 +++++++++++++++++------ - 1 file changed, 28 insertions(+), 10 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -686,6 +686,33 @@ desc_bk: - desc_info->bk = true; - } - -+static u16 rtw89_core_get_data_rate(struct rtw89_dev *rtwdev, -+ struct rtw89_core_tx_request *tx_req) -+{ -+ struct ieee80211_vif *vif = tx_req->vif; -+ struct ieee80211_sta *sta = tx_req->sta; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern; -+ enum rtw89_sub_entity_idx idx = rtwvif->sub_entity_idx; -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, idx); -+ u16 lowest_rate; -+ -+ if (rate_pattern->enable) -+ return rate_pattern->rate; -+ -+ if (vif->p2p) -+ lowest_rate = RTW89_HW_RATE_OFDM6; -+ else if (chan->band_type == RTW89_BAND_2G) -+ lowest_rate = RTW89_HW_RATE_CCK1; -+ else -+ lowest_rate = RTW89_HW_RATE_OFDM6; -+ -+ if (!sta->deflink.supp_rates[chan->band_type]) -+ return lowest_rate; -+ -+ return __ffs(sta->deflink.supp_rates[chan->band_type]) + lowest_rate; -+} -+ - static void - rtw89_core_tx_update_data_info(struct rtw89_dev *rtwdev, - struct rtw89_core_tx_request *tx_req) -@@ -694,8 +721,6 @@ rtw89_core_tx_update_data_info(struct rt - struct ieee80211_sta *sta = tx_req->sta; - struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; - struct rtw89_sta *rtwsta = sta_to_rtwsta_safe(sta); -- struct rtw89_phy_rate_pattern *rate_pattern = &rtwvif->rate_pattern; -- const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); - struct rtw89_tx_desc_info *desc_info = &tx_req->desc_info; - struct sk_buff *skb = tx_req->skb; - u8 tid, tid_indicate; -@@ -719,14 +744,7 @@ rtw89_core_tx_update_data_info(struct rt - if (IEEE80211_SKB_CB(skb)->control.hw_key) - rtw89_core_tx_update_sec_key(rtwdev, tx_req); - -- if (vif->p2p) -- desc_info->data_retry_lowest_rate = RTW89_HW_RATE_OFDM6; -- else if (rate_pattern->enable) -- desc_info->data_retry_lowest_rate = rate_pattern->rate; -- else if (chan->band_type == RTW89_BAND_2G) -- desc_info->data_retry_lowest_rate = RTW89_HW_RATE_CCK1; -- else -- desc_info->data_retry_lowest_rate = RTW89_HW_RATE_OFDM6; -+ desc_info->data_retry_lowest_rate = rtw89_core_get_data_rate(rtwdev, tx_req); - } - - static enum btc_pkt_type diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-024-wifi-rtw89-remove-superfluous-H2C-of-join_info.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-024-wifi-rtw89-remove-superfluous-H2C-of-join_info.patch deleted file mode 100644 index 26fd091ee..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-024-wifi-rtw89-remove-superfluous-H2C-of-join_info.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 41209362d700f868ae7f0f30dc7634d0e0026880 Mon Sep 17 00:00:00 2001 -From: Chin-Yen Lee -Date: Mon, 20 Mar 2023 17:31:11 +0800 -Subject: [PATCH 024/136] wifi: rtw89: remove superfluous H2C of join_info - -We find that when starting WoWLAN, the second join_info H2C is -unnecessary and leads WoWLAN not enter power save mode if using new -firmware, so remove it. - -Signed-off-by: Chin-Yen Lee -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230320093112.30466-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/wow.c | 9 --------- - 1 file changed, 9 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/wow.c -+++ b/drivers/net/wireless/realtek/rtw89/wow.c -@@ -420,14 +420,11 @@ static int rtw89_wow_cfg_wake(struct rtw - struct rtw89_vif *rtwvif = (struct rtw89_vif *)wow_vif->drv_priv; - struct ieee80211_sta *wow_sta; - struct rtw89_sta *rtwsta = NULL; -- bool is_conn = true; - int ret; - - wow_sta = ieee80211_find_sta(wow_vif, rtwvif->bssid); - if (wow_sta) - rtwsta = (struct rtw89_sta *)wow_sta->drv_priv; -- else -- is_conn = false; - - if (wow) { - if (rtw_wow->pattern_cnt) -@@ -454,12 +451,6 @@ static int rtw89_wow_cfg_wake(struct rtw - } - } - -- ret = rtw89_fw_h2c_join_info(rtwdev, rtwvif, rtwsta, !is_conn); -- if (ret) { -- rtw89_warn(rtwdev, "failed to send h2c join info\n"); -- return ret; -- } -- - ret = rtw89_fw_h2c_cam(rtwdev, rtwvif, rtwsta, NULL); - if (ret) { - rtw89_warn(rtwdev, "failed to send h2c cam\n"); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-025-wifi-rtw89-fix-incorrect-channel-info-during-scan-du.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-025-wifi-rtw89-fix-incorrect-channel-info-during-scan-du.patch deleted file mode 100644 index b90298149..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-025-wifi-rtw89-fix-incorrect-channel-info-during-scan-du.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 40711486c7ba91a35ba495564e45be0f2a1b3729 Mon Sep 17 00:00:00 2001 -From: Chih-Kang Chang -Date: Mon, 20 Mar 2023 17:31:12 +0800 -Subject: [PATCH 025/136] wifi: rtw89: fix incorrect channel info during scan - due to ppdu_sts filtering - -We use ppdu_sts to obtain channel information from hardware, to ensure -that the scan results have correct channel information. However, some of -ppdu_sts that is filtered by the to_self check is also needed for the scan -results. Therefore, we modify the filter part in front of CFO count. - -Signed-off-by: Chih-Kang Chang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230320093112.30466-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 7 ++++--- - 1 file changed, 4 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1220,6 +1220,10 @@ static void rtw89_core_parse_phy_status_ - phy_ppdu->chan_idx = RTW89_GET_PHY_STS_IE01_CH_IDX(addr); - if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6) - return; -+ -+ if (!phy_ppdu->to_self) -+ return; -+ - /* sign conversion for S(12,2) */ - if (rtwdev->chip->cfo_src_fd) - cfo = sign_extend32(RTW89_GET_PHY_STS_IE01_FD_CFO(addr), 11); -@@ -1284,9 +1288,6 @@ static int rtw89_core_rx_parse_phy_sts(s - if (phy_ppdu->ie < RTW89_CCK_PKT) - return -EINVAL; - -- if (!phy_ppdu->to_self) -- return 0; -- - pos = (u8 *)phy_ppdu->buf + PHY_STS_HDR_LEN; - end = (u8 *)phy_ppdu->buf + phy_ppdu->len; - while (pos < end) { diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-026-wifi-rtw89-config-EDCCA-threshold-during-scan-to-pre.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-026-wifi-rtw89-config-EDCCA-threshold-during-scan-to-pre.patch deleted file mode 100644 index 7a4e90157..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-026-wifi-rtw89-config-EDCCA-threshold-during-scan-to-pre.patch +++ /dev/null @@ -1,139 +0,0 @@ -From 280c444745aaf0ff7f2e54b000bd9fff9f1bbaf2 Mon Sep 17 00:00:00 2001 -From: Chih-Kang Chang -Date: Wed, 22 Mar 2023 14:02:38 +0800 -Subject: [PATCH 026/136] wifi: rtw89: config EDCCA threshold during scan to - prevent TX failed - -Need to configure EDCCA threshold to default value before scan, and recall -original value after scan to prevent probe request can't be sent out. - -Signed-off-by: Chih-Kang Chang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230322060238.43922-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 2 ++ - drivers/net/wireless/realtek/rtw89/core.h | 3 +++ - drivers/net/wireless/realtek/rtw89/phy.c | 19 +++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/phy.h | 1 + - drivers/net/wireless/realtek/rtw89/reg.h | 5 +++++ - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 1 + - 8 files changed, 33 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -3264,6 +3264,7 @@ void rtw89_core_scan_start(struct rtw89_ - rtw89_btc_ntfy_scan_start(rtwdev, RTW89_PHY_0, chan->band_type); - rtw89_chip_rfk_scan(rtwdev, true); - rtw89_hci_recalc_int_mit(rtwdev); -+ rtw89_phy_config_edcca(rtwdev, true); - - rtw89_fw_h2c_cam(rtwdev, rtwvif, NULL, mac_addr); - } -@@ -3281,6 +3282,7 @@ void rtw89_core_scan_complete(struct rtw - - rtw89_chip_rfk_scan(rtwdev, false); - rtw89_btc_ntfy_scan_finish(rtwdev, RTW89_PHY_0); -+ rtw89_phy_config_edcca(rtwdev, false); - - rtwdev->scanning = false; - rtwdev->dig.bypass_dig = true; ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3152,6 +3152,7 @@ struct rtw89_chip_info { - const struct rtw89_rrsr_cfgs *rrsr_cfgs; - u32 bss_clr_map_reg; - u32 dma_ch_mask; -+ u32 edcca_lvl_reg; - const struct wiphy_wowlan_support *wowlan_stub; - }; - -@@ -3363,6 +3364,8 @@ struct rtw89_hal { - - bool entity_active; - enum rtw89_entity_mode entity_mode; -+ -+ u32 edcca_bak; - }; - - #define RTW89_MAX_MAC_ID_NUM 128 ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -4366,3 +4366,22 @@ void rtw89_decode_chan_idx(struct rtw89_ - *ch = rtw89_ch_base_table[idx] + (offset << 1); - } - EXPORT_SYMBOL(rtw89_decode_chan_idx); -+ -+#define EDCCA_DEFAULT 249 -+void rtw89_phy_config_edcca(struct rtw89_dev *rtwdev, bool scan) -+{ -+ u32 reg = rtwdev->chip->edcca_lvl_reg; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ u32 val; -+ -+ if (scan) { -+ hal->edcca_bak = rtw89_phy_read32(rtwdev, reg); -+ val = hal->edcca_bak; -+ u32p_replace_bits(&val, EDCCA_DEFAULT, B_SEG0R_EDCCA_LVL_A_MSK); -+ u32p_replace_bits(&val, EDCCA_DEFAULT, B_SEG0R_EDCCA_LVL_P_MSK); -+ u32p_replace_bits(&val, EDCCA_DEFAULT, B_SEG0R_PPDU_LVL_MSK); -+ rtw89_phy_write32(rtwdev, reg, val); -+ } else { -+ rtw89_phy_write32(rtwdev, reg, hal->edcca_bak); -+ } -+} ---- a/drivers/net/wireless/realtek/rtw89/phy.h -+++ b/drivers/net/wireless/realtek/rtw89/phy.h -@@ -558,5 +558,6 @@ void rtw89_phy_ul_tb_ctrl_track(struct r - u8 rtw89_encode_chan_idx(struct rtw89_dev *rtwdev, u8 central_ch, u8 band); - void rtw89_decode_chan_idx(struct rtw89_dev *rtwdev, u8 chan_idx, - u8 *ch, enum nl80211_band *band); -+void rtw89_phy_config_edcca(struct rtw89_dev *rtwdev, bool scan); - - #endif ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -4280,6 +4280,11 @@ - #define B_PKT_POP_EN BIT(8) - #define R_SEG0R_PD 0x481C - #define R_SEG0R_PD_V1 0x4860 -+#define R_SEG0R_EDCCA_LVL 0x4840 -+#define R_SEG0R_EDCCA_LVL_V1 0x4884 -+#define B_SEG0R_PPDU_LVL_MSK GENMASK(31, 24) -+#define B_SEG0R_EDCCA_LVL_P_MSK GENMASK(15, 8) -+#define B_SEG0R_EDCCA_LVL_A_MSK GENMASK(7, 0) - #define B_SEG0R_PD_SPATIAL_REUSE_EN_MSK_V1 BIT(30) - #define B_SEG0R_PD_SPATIAL_REUSE_EN_MSK BIT(29) - #define B_SEG0R_PD_LOWER_BOUND_MSK GENMASK(10, 6) ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -2149,6 +2149,7 @@ const struct rtw89_chip_info rtw8852a_ch - .rrsr_cfgs = &rtw8852a_rrsr_cfgs, - .bss_clr_map_reg = R_BSS_CLR_MAP, - .dma_ch_mask = 0, -+ .edcca_lvl_reg = R_SEG0R_EDCCA_LVL, - #ifdef CONFIG_PM - .wowlan_stub = &rtw_wowlan_stub_8852a, - #endif ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2572,6 +2572,7 @@ const struct rtw89_chip_info rtw8852b_ch - .dma_ch_mask = BIT(RTW89_DMA_ACH4) | BIT(RTW89_DMA_ACH5) | - BIT(RTW89_DMA_ACH6) | BIT(RTW89_DMA_ACH7) | - BIT(RTW89_DMA_B1MG) | BIT(RTW89_DMA_B1HI), -+ .edcca_lvl_reg = R_SEG0R_EDCCA_LVL_V1, - }; - EXPORT_SYMBOL(rtw8852b_chip_info); - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2885,6 +2885,7 @@ const struct rtw89_chip_info rtw8852c_ch - .rrsr_cfgs = &rtw8852c_rrsr_cfgs, - .bss_clr_map_reg = R_BSS_CLR_MAP, - .dma_ch_mask = 0, -+ .edcca_lvl_reg = R_SEG0R_EDCCA_LVL, - #ifdef CONFIG_PM - .wowlan_stub = &rtw_wowlan_stub_8852c, - #endif diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-027-wifi-rtw89-fix-potential-race-condition-between-napi.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-027-wifi-rtw89-fix-potential-race-condition-between-napi.patch deleted file mode 100644 index 0798c59a6..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-027-wifi-rtw89-fix-potential-race-condition-between-napi.patch +++ /dev/null @@ -1,127 +0,0 @@ -From 47515664ecfbde11425dff121f298ae4499425c9 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Thu, 23 Mar 2023 16:28:39 +0800 -Subject: [PATCH 027/136] wifi: rtw89: fix potential race condition between - napi_init and napi_enable - -A race condition can happen if netdev is registered, but NAPI isn't -initialized yet, and meanwhile user space starts the netdev that will -enable NAPI. Then, it hits BUG_ON(): - - kernel BUG at net/core/dev.c:6423! - invalid opcode: 0000 [#1] PREEMPT SMP NOPTI - CPU: 0 PID: 417 Comm: iwd Not tainted 6.2.7-slab-dirty #3 eb0f5a8a9d91 - Hardware name: LENOVO 21DL/LNVNB161216, BIOS JPCN20WW(V1.06) 09/20/2022 - RIP: 0010:napi_enable+0x3f/0x50 - Code: 48 89 c2 48 83 e2 f6 f6 81 89 08 00 00 02 74 0d 48 83 ... - RSP: 0018:ffffada1414f3548 EFLAGS: 00010246 - RAX: 0000000000000000 RBX: ffffa01425802080 RCX: 0000000000000000 - RDX: 00000000000002ff RSI: ffffada14e50c614 RDI: ffffa01425808dc0 - RBP: 0000000000000000 R08: 0000000000000000 R09: 0000000000000000 - R10: 0000000000000001 R11: 0000000000000100 R12: ffffa01425808f58 - R13: 0000000000000000 R14: ffffa01423498940 R15: 0000000000000001 - FS: 00007f5577c0a740(0000) GS:ffffa0169fc00000(0000) knlGS:0000000000000000 - CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 - CR2: 00007f5577a19972 CR3: 0000000125a7a000 CR4: 0000000000750ef0 - PKRU: 55555554 - Call Trace: - - rtw89_pci_ops_start+0x1c/0x70 [rtw89_pci 6cbc75429515c181cbc386478d5cfb32ffc5a0f8] - rtw89_core_start+0xbe/0x160 [rtw89_core fe07ecb874820b6d778370d4acb6ef8a37847f22] - rtw89_ops_start+0x26/0x40 [rtw89_core fe07ecb874820b6d778370d4acb6ef8a37847f22] - drv_start+0x42/0x100 [mac80211 c07fa22af8c3cf3f7d7ab3884ca990784d72e2d2] - ieee80211_do_open+0x311/0x7d0 [mac80211 c07fa22af8c3cf3f7d7ab3884ca990784d72e2d2] - ieee80211_open+0x6a/0x90 [mac80211 c07fa22af8c3cf3f7d7ab3884ca990784d72e2d2] - __dev_open+0xe0/0x180 - __dev_change_flags+0x1da/0x250 - dev_change_flags+0x26/0x70 - do_setlink+0x37c/0x12c0 - ? ep_poll_callback+0x246/0x290 - ? __nla_validate_parse+0x61/0xd00 - ? __wake_up_common_lock+0x8f/0xd0 - -To fix this, follow Jonas' suggestion to switch the order of these -functions and move register netdev to be the last step of PCI probe. -Also, correct the error handling of rtw89_core_register_hw(). - -Fixes: e3ec7017f6a2 ("rtw89: add Realtek 802.11ax driver") -Cc: stable@vger.kernel.org -Reported-by: Hyeonggon Yoo <42.hyeyoo@gmail.com> -Link: https://lore.kernel.org/linux-wireless/CAOiHx=n7EwK2B9CnBR07FVA=sEzFagb8TkS4XC_qBNq8OwcYUg@mail.gmail.com/T/#t -Suggested-by: Jonas Gorski -Tested-by: Larry Finger -Reviewed-by: Larry Finger -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230323082839.20474-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 10 +++++++--- - drivers/net/wireless/realtek/rtw89/pci.c | 19 ++++++++++--------- - 2 files changed, 17 insertions(+), 12 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -3455,18 +3455,22 @@ static int rtw89_core_register_hw(struct - ret = ieee80211_register_hw(hw); - if (ret) { - rtw89_err(rtwdev, "failed to register hw\n"); -- goto err; -+ goto err_free_supported_band; - } - - ret = rtw89_regd_init(rtwdev, rtw89_regd_notifier); - if (ret) { - rtw89_err(rtwdev, "failed to init regd\n"); -- goto err; -+ goto err_unregister_hw; - } - - return 0; - --err: -+err_unregister_hw: -+ ieee80211_unregister_hw(hw); -+err_free_supported_band: -+ rtw89_core_clr_supported_band(rtwdev); -+ - return ret; - } - ---- a/drivers/net/wireless/realtek/rtw89/pci.c -+++ b/drivers/net/wireless/realtek/rtw89/pci.c -@@ -3874,25 +3874,26 @@ int rtw89_pci_probe(struct pci_dev *pdev - rtw89_pci_link_cfg(rtwdev); - rtw89_pci_l1ss_cfg(rtwdev); - -- ret = rtw89_core_register(rtwdev); -- if (ret) { -- rtw89_err(rtwdev, "failed to register core\n"); -- goto err_clear_resource; -- } -- - rtw89_core_napi_init(rtwdev); - - ret = rtw89_pci_request_irq(rtwdev, pdev); - if (ret) { - rtw89_err(rtwdev, "failed to request pci irq\n"); -- goto err_unregister; -+ goto err_deinit_napi; -+ } -+ -+ ret = rtw89_core_register(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to register core\n"); -+ goto err_free_irq; - } - - return 0; - --err_unregister: -+err_free_irq: -+ rtw89_pci_free_irq(rtwdev, pdev); -+err_deinit_napi: - rtw89_core_napi_deinit(rtwdev); -- rtw89_core_unregister(rtwdev); - err_clear_resource: - rtw89_pci_clear_resource(rtwdev, pdev); - err_declaim_pci: diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-028-wifi-rtw89-Remove-redundant-pci_clear_master.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-028-wifi-rtw89-Remove-redundant-pci_clear_master.patch deleted file mode 100644 index 1378888ed..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-028-wifi-rtw89-Remove-redundant-pci_clear_master.patch +++ /dev/null @@ -1,42 +0,0 @@ -From 5995f746310108b11c7e377b0ebac4c98e53f9dc Mon Sep 17 00:00:00 2001 -From: Cai Huoqing -Date: Thu, 23 Mar 2023 19:26:13 +0800 -Subject: [PATCH 028/136] wifi: rtw89: Remove redundant pci_clear_master - -Remove pci_clear_master to simplify the code, -the bus-mastering is also cleared in do_pci_disable_device, -like this: -./drivers/pci/pci.c:2197 -static void do_pci_disable_device(struct pci_dev *dev) -{ - u16 pci_command; - - pci_read_config_word(dev, PCI_COMMAND, &pci_command); - if (pci_command & PCI_COMMAND_MASTER) { - pci_command &= ~PCI_COMMAND_MASTER; - pci_write_config_word(dev, PCI_COMMAND, pci_command); - } - - pcibios_disable_device(dev); -}. -And dev->is_busmaster is set to 0 in pci_disable_device. - -Signed-off-by: Cai Huoqing -Reviewed-by: Simon Horman -Acked-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230323112613.7550-5-cai.huoqing@linux.dev ---- - drivers/net/wireless/realtek/rtw89/pci.c | 1 - - 1 file changed, 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/pci.c -+++ b/drivers/net/wireless/realtek/rtw89/pci.c -@@ -2694,7 +2694,6 @@ static int rtw89_pci_claim_device(struct - static void rtw89_pci_declaim_device(struct rtw89_dev *rtwdev, - struct pci_dev *pdev) - { -- pci_clear_master(pdev); - pci_disable_device(pdev); - } - diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-029-wifi-rtw89-8852c-add-beacon-filter-and-CQM-support.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-029-wifi-rtw89-8852c-add-beacon-filter-and-CQM-support.patch deleted file mode 100644 index 647eb6559..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-029-wifi-rtw89-8852c-add-beacon-filter-and-CQM-support.patch +++ /dev/null @@ -1,411 +0,0 @@ -From d2b6da242454ee886729aad7020dfda7995bc26b Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Tue, 11 Apr 2023 20:48:28 +0800 -Subject: [PATCH 029/136] wifi: rtw89: 8852c: add beacon filter and CQM support - -Adding this supports beacon filter and connection quality monitor. -To make host CPU wake up less, let firmware perform signal -monitoring and beacon processing, then notify driver upon signal -changes or beacon loss. - -This feature needs firmware 0.27.56 or newer to support it. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230411124832.14965-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 11 +- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - drivers/net/wireless/realtek/rtw89/fw.c | 101 ++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/fw.h | 63 +++++++++++ - drivers/net/wireless/realtek/rtw89/mac.c | 59 ++++++++++ - drivers/net/wireless/realtek/rtw89/mac.h | 1 + - drivers/net/wireless/realtek/rtw89/mac80211.c | 8 ++ - 7 files changed, 243 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1457,6 +1457,7 @@ static void rtw89_vif_rx_stats_iter(void - struct rtw89_rx_desc_info *desc_info = iter_data->desc_info; - struct sk_buff *skb = iter_data->skb; - struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; -+ struct rtw89_rx_phy_ppdu *phy_ppdu = iter_data->phy_ppdu; - const u8 *bssid = iter_data->bssid; - - if (rtwdev->scanning && -@@ -1475,8 +1476,11 @@ static void rtw89_vif_rx_stats_iter(void - if (!ether_addr_equal(vif->bss_conf.bssid, bssid)) - return; - -- if (ieee80211_is_beacon(hdr->frame_control)) -+ if (ieee80211_is_beacon(hdr->frame_control)) { -+ if (vif->type == NL80211_IFTYPE_STATION) -+ rtw89_fw_h2c_rssi_offload(rtwdev, phy_ppdu); - pkt_stat->beacon_nr++; -+ } - - if (!ether_addr_equal(vif->addr, hdr->addr1)) - return; -@@ -2539,6 +2543,9 @@ int rtw89_core_sta_disassoc(struct rtw89 - struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; - struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; - -+ if (vif->type == NL80211_IFTYPE_STATION) -+ rtw89_fw_h2c_set_bcn_fltr_cfg(rtwdev, vif, false); -+ - rtwdev->total_sta_assoc--; - if (sta->tdls) - rtwvif->tdls_peer--; -@@ -3415,6 +3422,8 @@ static int rtw89_core_register_hw(struct - ieee80211_hw_set(hw, SINGLE_SCAN_ON_ALL_BANDS); - ieee80211_hw_set(hw, SUPPORTS_MULTI_BSSID); - ieee80211_hw_set(hw, WANT_MONITOR_VIF); -+ if (RTW89_CHK_FW_FEATURE(BEACON_FILTER, &rtwdev->fw)) -+ ieee80211_hw_set(hw, CONNECTION_MONITOR); - - hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | - BIT(NL80211_IFTYPE_AP) | ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3231,6 +3231,7 @@ enum rtw89_fw_feature { - RTW89_FW_FEATURE_NO_PACKET_DROP, - RTW89_FW_FEATURE_NO_DEEP_PS, - RTW89_FW_FEATURE_NO_LPS_PG, -+ RTW89_FW_FEATURE_BEACON_FILTER, - }; - - struct rtw89_fw_suit { ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -266,6 +266,7 @@ static const struct __fw_feat_cfg fw_fea - __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 34, 0, TX_WAKE), - __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 36, 0, SCAN_OFFLOAD), - __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 40, 0, CRASH_TRIGGER), -+ __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 56, 10, BEACON_FILTER), - }; - - static void rtw89_fw_recognize_features(struct rtw89_dev *rtwdev) -@@ -1726,6 +1727,106 @@ int rtw89_fw_h2c_set_ofld_cfg(struct rtw - - ret = rtw89_h2c_tx(rtwdev, skb, false); - if (ret) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return ret; -+} -+ -+int rtw89_fw_h2c_set_bcn_fltr_cfg(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ bool connect) -+{ -+ struct rtw89_vif *rtwvif = vif_to_rtwvif_safe(vif); -+ struct ieee80211_bss_conf *bss_conf = vif ? &vif->bss_conf : NULL; -+ struct rtw89_h2c_bcnfltr *h2c; -+ u32 len = sizeof(*h2c); -+ struct sk_buff *skb; -+ int ret; -+ -+ if (!RTW89_CHK_FW_FEATURE(BEACON_FILTER, &rtwdev->fw)) -+ return -EINVAL; -+ -+ if (!rtwvif || !bss_conf || rtwvif->net_type != RTW89_NET_TYPE_INFRA) -+ return -EINVAL; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c bcn filter\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, len); -+ h2c = (struct rtw89_h2c_bcnfltr *)skb->data; -+ -+ h2c->w0 = le32_encode_bits(connect, RTW89_H2C_BCNFLTR_W0_MON_RSSI) | -+ le32_encode_bits(connect, RTW89_H2C_BCNFLTR_W0_MON_BCN) | -+ le32_encode_bits(connect, RTW89_H2C_BCNFLTR_W0_MON_EN) | -+ le32_encode_bits(RTW89_BCN_FLTR_OFFLOAD_MODE_DEFAULT, -+ RTW89_H2C_BCNFLTR_W0_MODE) | -+ le32_encode_bits(RTW89_BCN_LOSS_CNT, RTW89_H2C_BCNFLTR_W0_BCN_LOSS_CNT) | -+ le32_encode_bits(bss_conf->cqm_rssi_hyst, RTW89_H2C_BCNFLTR_W0_RSSI_HYST) | -+ le32_encode_bits(bss_conf->cqm_rssi_thold + MAX_RSSI, -+ RTW89_H2C_BCNFLTR_W0_RSSI_THRESHOLD) | -+ le32_encode_bits(rtwvif->mac_id, RTW89_H2C_BCNFLTR_W0_MAC_ID); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, -+ H2C_FUNC_CFG_BCNFLTR, 0, 1, len); -+ -+ ret = rtw89_h2c_tx(rtwdev, skb, false); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return ret; -+} -+ -+int rtw89_fw_h2c_rssi_offload(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu) -+{ -+ struct rtw89_h2c_ofld_rssi *h2c; -+ u32 len = sizeof(*h2c); -+ struct sk_buff *skb; -+ s8 rssi; -+ int ret; -+ -+ if (!RTW89_CHK_FW_FEATURE(BEACON_FILTER, &rtwdev->fw)) -+ return -EINVAL; -+ -+ if (!phy_ppdu) -+ return -EINVAL; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c rssi\n"); -+ return -ENOMEM; -+ } -+ -+ rssi = phy_ppdu->rssi_avg >> RSSI_FACTOR; -+ skb_put(skb, len); -+ h2c = (struct rtw89_h2c_ofld_rssi *)skb->data; -+ -+ h2c->w0 = le32_encode_bits(phy_ppdu->mac_id, RTW89_H2C_OFLD_RSSI_W0_MACID) | -+ le32_encode_bits(1, RTW89_H2C_OFLD_RSSI_W0_NUM); -+ h2c->w1 = le32_encode_bits(rssi, RTW89_H2C_OFLD_RSSI_W1_VAL); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, -+ H2C_FUNC_OFLD_RSSI, 0, 1, len); -+ -+ ret = rtw89_h2c_tx(rtwdev, skb, false); -+ if (ret) { - rtw89_err(rtwdev, "failed to send h2c\n"); - goto fail; - } ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -162,6 +162,27 @@ enum rtw89_p2pps_action { - RTW89_P2P_ACT_TERMINATE = 3, - }; - -+enum rtw89_bcn_fltr_offload_mode { -+ RTW89_BCN_FLTR_OFFLOAD_MODE_0 = 0, -+ RTW89_BCN_FLTR_OFFLOAD_MODE_1, -+ RTW89_BCN_FLTR_OFFLOAD_MODE_2, -+ RTW89_BCN_FLTR_OFFLOAD_MODE_3, -+ -+ RTW89_BCN_FLTR_OFFLOAD_MODE_DEFAULT = RTW89_BCN_FLTR_OFFLOAD_MODE_0, -+}; -+ -+enum rtw89_bcn_fltr_type { -+ RTW89_BCN_FLTR_BEACON_LOSS, -+ RTW89_BCN_FLTR_RSSI, -+ RTW89_BCN_FLTR_NOTIFY, -+}; -+ -+enum rtw89_bcn_fltr_rssi_event { -+ RTW89_BCN_FLTR_RSSI_NOT_CHANGED, -+ RTW89_BCN_FLTR_RSSI_HIGH, -+ RTW89_BCN_FLTR_RSSI_LOW, -+}; -+ - #define FWDL_SECTION_MAX_NUM 10 - #define FWDL_SECTION_CHKSUM_LEN 8 - #define FWDL_SECTION_PER_PKT_LEN 2020 -@@ -216,6 +237,8 @@ struct rtw89_h2creg_sch_tx_en { - #define RTW89_SCAN_LIST_LIMIT \ - ((RTW89_H2C_MAX_SIZE / RTW89_MAC_CHINFO_SIZE) - RTW89_SCAN_LIST_GUARD) - -+#define RTW89_BCN_LOSS_CNT 10 -+ - struct rtw89_mac_chinfo { - u8 period; - u8 dwell_time; -@@ -3317,6 +3340,17 @@ static inline struct rtw89_fw_c2h_attr * - #define RTW89_GET_MAC_C2H_REV_ACK_H2C_SEQ(c2h) \ - le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(23, 16)) - -+struct rtw89_c2h_mac_bcnfltr_rpt { -+ __le32 w0; -+ __le32 w1; -+ __le32 w2; -+} __packed; -+ -+#define RTW89_C2H_MAC_BCNFLTR_RPT_W2_MACID GENMASK(7, 0) -+#define RTW89_C2H_MAC_BCNFLTR_RPT_W2_TYPE GENMASK(9, 8) -+#define RTW89_C2H_MAC_BCNFLTR_RPT_W2_EVENT GENMASK(11, 10) -+#define RTW89_C2H_MAC_BCNFLTR_RPT_W2_MA GENMASK(23, 16) -+ - #define RTW89_GET_PHY_C2H_RA_RPT_MACID(c2h) \ - le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 0)) - #define RTW89_GET_PHY_C2H_RA_RPT_RETRY_RATIO(c2h) \ -@@ -3410,6 +3444,28 @@ static_assert(sizeof(struct rtw89_mac_mc - #define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_HIGH(c2h) \ - le32_get_bits(*((const __le32 *)(c2h) + 4), GENMASK(31, 0)) - -+struct rtw89_h2c_bcnfltr { -+ __le32 w0; -+} __packed; -+ -+#define RTW89_H2C_BCNFLTR_W0_MON_RSSI BIT(0) -+#define RTW89_H2C_BCNFLTR_W0_MON_BCN BIT(1) -+#define RTW89_H2C_BCNFLTR_W0_MON_EN BIT(2) -+#define RTW89_H2C_BCNFLTR_W0_MODE GENMASK(4, 3) -+#define RTW89_H2C_BCNFLTR_W0_BCN_LOSS_CNT GENMASK(11, 8) -+#define RTW89_H2C_BCNFLTR_W0_RSSI_HYST GENMASK(15, 12) -+#define RTW89_H2C_BCNFLTR_W0_RSSI_THRESHOLD GENMASK(23, 16) -+#define RTW89_H2C_BCNFLTR_W0_MAC_ID GENMASK(31, 24) -+ -+struct rtw89_h2c_ofld_rssi { -+ __le32 w0; -+ __le32 w1; -+} __packed; -+ -+#define RTW89_H2C_OFLD_RSSI_W0_MACID GENMASK(7, 0) -+#define RTW89_H2C_OFLD_RSSI_W0_NUM GENMASK(15, 8) -+#define RTW89_H2C_OFLD_RSSI_W1_VAL GENMASK(7, 0) -+ - #define RTW89_FW_HDR_SIZE 32 - #define RTW89_FW_SECTION_HDR_SIZE 16 - -@@ -3537,6 +3593,8 @@ struct rtw89_fw_h2c_rf_reg_info { - #define H2C_FUNC_ADD_SCANOFLD_CH 0x16 - #define H2C_FUNC_SCANOFLD 0x17 - #define H2C_FUNC_PKT_DROP 0x1b -+#define H2C_FUNC_CFG_BCNFLTR 0x1e -+#define H2C_FUNC_OFLD_RSSI 0x1f - - /* CLASS 10 - Security CAM */ - #define H2C_CL_MAC_SEC_CAM 0xa -@@ -3637,6 +3695,11 @@ int rtw89_fw_h2c_macid_pause(struct rtw8 - int rtw89_fw_h2c_set_edca(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, - u8 ac, u32 val); - int rtw89_fw_h2c_set_ofld_cfg(struct rtw89_dev *rtwdev); -+int rtw89_fw_h2c_set_bcn_fltr_cfg(struct rtw89_dev *rtwdev, -+ struct ieee80211_vif *vif, -+ bool connect); -+int rtw89_fw_h2c_rssi_offload(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu); - int rtw89_fw_h2c_ra(struct rtw89_dev *rtwdev, struct rtw89_ra_info *ra, bool csi); - int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev); - int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev); ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -4238,6 +4238,64 @@ rtw89_mac_c2h_scanofld_rsp(struct rtw89_ - } - - static void -+rtw89_mac_bcn_fltr_rpt(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ struct sk_buff *skb) -+{ -+ struct ieee80211_vif *vif = rtwvif_to_vif_safe(rtwvif); -+ enum nl80211_cqm_rssi_threshold_event nl_event; -+ const struct rtw89_c2h_mac_bcnfltr_rpt *c2h = -+ (const struct rtw89_c2h_mac_bcnfltr_rpt *)skb->data; -+ u8 type, event, mac_id; -+ s8 sig; -+ -+ type = le32_get_bits(c2h->w2, RTW89_C2H_MAC_BCNFLTR_RPT_W2_TYPE); -+ sig = le32_get_bits(c2h->w2, RTW89_C2H_MAC_BCNFLTR_RPT_W2_MA) - MAX_RSSI; -+ event = le32_get_bits(c2h->w2, RTW89_C2H_MAC_BCNFLTR_RPT_W2_EVENT); -+ mac_id = le32_get_bits(c2h->w2, RTW89_C2H_MAC_BCNFLTR_RPT_W2_MACID); -+ -+ if (mac_id != rtwvif->mac_id) -+ return; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_FW, -+ "C2H bcnfltr rpt macid: %d, type: %d, ma: %d, event: %d\n", -+ mac_id, type, sig, event); -+ -+ switch (type) { -+ case RTW89_BCN_FLTR_BEACON_LOSS: -+ if (!rtwdev->scanning) -+ ieee80211_connection_loss(vif); -+ else -+ rtw89_fw_h2c_set_bcn_fltr_cfg(rtwdev, vif, true); -+ return; -+ case RTW89_BCN_FLTR_NOTIFY: -+ nl_event = NL80211_CQM_RSSI_THRESHOLD_EVENT_HIGH; -+ break; -+ case RTW89_BCN_FLTR_RSSI: -+ if (event == RTW89_BCN_FLTR_RSSI_LOW) -+ nl_event = NL80211_CQM_RSSI_THRESHOLD_EVENT_LOW; -+ else if (event == RTW89_BCN_FLTR_RSSI_HIGH) -+ nl_event = NL80211_CQM_RSSI_THRESHOLD_EVENT_HIGH; -+ else -+ return; -+ break; -+ default: -+ return; -+ } -+ -+ ieee80211_cqm_rssi_notify(vif, nl_event, sig, GFP_KERNEL); -+} -+ -+static void -+rtw89_mac_c2h_bcn_fltr_rpt(struct rtw89_dev *rtwdev, struct sk_buff *c2h, -+ u32 len) -+{ -+ struct rtw89_vif *rtwvif; -+ -+ rtw89_for_each_rtwvif(rtwdev, rtwvif) -+ rtw89_mac_bcn_fltr_rpt(rtwdev, rtwvif, c2h); -+} -+ -+static void - rtw89_mac_c2h_rec_ack(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) - { - rtw89_debug(rtwdev, RTW89_DBG_FW, -@@ -4457,6 +4515,7 @@ void (* const rtw89_mac_c2h_ofld_handler - [RTW89_MAC_C2H_FUNC_MACID_PAUSE] = rtw89_mac_c2h_macid_pause, - [RTW89_MAC_C2H_FUNC_SCANOFLD_RSP] = rtw89_mac_c2h_scanofld_rsp, - [RTW89_MAC_C2H_FUNC_TSF32_TOGL_RPT] = rtw89_mac_c2h_tsf32_toggle_rpt, -+ [RTW89_MAC_C2H_FUNC_BCNFLTR_RPT] = rtw89_mac_c2h_bcn_fltr_rpt, - }; - - static ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -359,6 +359,7 @@ enum rtw89_mac_c2h_ofld_func { - RTW89_MAC_C2H_FUNC_MACID_PAUSE, - RTW89_MAC_C2H_FUNC_TSF32_TOGL_RPT = 0x6, - RTW89_MAC_C2H_FUNC_SCANOFLD_RSP = 0x9, -+ RTW89_MAC_C2H_FUNC_BCNFLTR_RPT = 0xd, - RTW89_MAC_C2H_FUNC_OFLD_MAX, - }; - ---- a/drivers/net/wireless/realtek/rtw89/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -114,6 +114,11 @@ static int rtw89_ops_add_interface(struc - vif->addr, vif->type, vif->p2p); - - mutex_lock(&rtwdev->mutex); -+ -+ if (RTW89_CHK_FW_FEATURE(BEACON_FILTER, &rtwdev->fw)) -+ vif->driver_flags |= IEEE80211_VIF_BEACON_FILTER | -+ IEEE80211_VIF_SUPPORTS_CQM_RSSI; -+ - rtwvif->rtwdev = rtwdev; - list_add_tail(&rtwvif->list, &rtwdev->rtwvifs_list); - INIT_WORK(&rtwvif->update_beacon_work, rtw89_core_update_beacon_work); -@@ -425,6 +430,9 @@ static void rtw89_ops_bss_info_changed(s - if (changed & BSS_CHANGED_P2P_PS) - rtw89_process_p2p_ps(rtwdev, vif); - -+ if (changed & BSS_CHANGED_CQM) -+ rtw89_fw_h2c_set_bcn_fltr_cfg(rtwdev, vif, true); -+ - mutex_unlock(&rtwdev->mutex); - } - diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-030-wifi-rtw89-add-function-to-wait-for-completion-of-TX.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-030-wifi-rtw89-add-function-to-wait-for-completion-of-TX.patch deleted file mode 100644 index 85946f883..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-030-wifi-rtw89-add-function-to-wait-for-completion-of-TX.patch +++ /dev/null @@ -1,177 +0,0 @@ -From 1ae5ca615285d5d4f72d1de464716d85dffef19f Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Tue, 11 Apr 2023 20:48:29 +0800 -Subject: [PATCH 030/136] wifi: rtw89: add function to wait for completion of - TX skbs - -Allocate a per-skb completion to track those skbs we are interested in -and wait for them to complete transmission with TX status. - -Normally, the completion object is freed by wait side, but it could be -timeout result that complete side should free the object instead. Add a -owner field with RCU to determine which side should free the object. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230411124832.14965-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 31 ++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/core.h | 40 +++++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/pci.c | 5 +++ - drivers/net/wireless/realtek/rtw89/pci.h | 4 +-- - 4 files changed, 78 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -867,6 +867,37 @@ void rtw89_core_tx_kick_off(struct rtw89 - rtw89_hci_tx_kick_off(rtwdev, ch_dma); - } - -+int rtw89_core_tx_kick_off_and_wait(struct rtw89_dev *rtwdev, struct sk_buff *skb, -+ int qsel, unsigned int timeout) -+{ -+ struct rtw89_tx_skb_data *skb_data = RTW89_TX_SKB_CB(skb); -+ struct rtw89_tx_wait_info *wait; -+ unsigned long time_left; -+ int ret = 0; -+ -+ wait = kzalloc(sizeof(*wait), GFP_KERNEL); -+ if (!wait) { -+ rtw89_core_tx_kick_off(rtwdev, qsel); -+ return 0; -+ } -+ -+ init_completion(&wait->completion); -+ rcu_assign_pointer(skb_data->wait, wait); -+ -+ rtw89_core_tx_kick_off(rtwdev, qsel); -+ time_left = wait_for_completion_timeout(&wait->completion, -+ msecs_to_jiffies(timeout)); -+ if (time_left == 0) -+ ret = -ETIMEDOUT; -+ else if (!wait->tx_done) -+ ret = -EAGAIN; -+ -+ rcu_assign_pointer(skb_data->wait, NULL); -+ kfree_rcu(wait, rcu_head); -+ -+ return ret; -+} -+ - int rtw89_h2c_tx(struct rtw89_dev *rtwdev, - struct sk_buff *skb, bool fwdl) - { ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2623,6 +2623,17 @@ struct rtw89_phy_rate_pattern { - bool enable; - }; - -+struct rtw89_tx_wait_info { -+ struct rcu_head rcu_head; -+ struct completion completion; -+ bool tx_done; -+}; -+ -+struct rtw89_tx_skb_data { -+ struct rtw89_tx_wait_info __rcu *wait; -+ u8 hci_priv[]; -+}; -+ - #define RTW89_P2P_MAX_NOA_NUM 2 - - struct rtw89_vif { -@@ -4179,6 +4190,14 @@ static inline void rtw89_hci_clear(struc - rtwdev->hci.ops->clear(rtwdev, pdev); - } - -+static inline -+struct rtw89_tx_skb_data *RTW89_TX_SKB_CB(struct sk_buff *skb) -+{ -+ struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); -+ -+ return (struct rtw89_tx_skb_data *)info->status.status_driver_data; -+} -+ - static inline u8 rtw89_read8(struct rtw89_dev *rtwdev, u32 addr) - { - return rtwdev->hci.ops->read8(rtwdev, addr); -@@ -4822,11 +4841,32 @@ static inline struct sk_buff *rtw89_allo - return dev_alloc_skb(length); - } - -+static inline void rtw89_core_tx_wait_complete(struct rtw89_dev *rtwdev, -+ struct rtw89_tx_skb_data *skb_data, -+ bool tx_done) -+{ -+ struct rtw89_tx_wait_info *wait; -+ -+ rcu_read_lock(); -+ -+ wait = rcu_dereference(skb_data->wait); -+ if (!wait) -+ goto out; -+ -+ wait->tx_done = tx_done; -+ complete(&wait->completion); -+ -+out: -+ rcu_read_unlock(); -+} -+ - int rtw89_core_tx_write(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, - struct ieee80211_sta *sta, struct sk_buff *skb, int *qsel); - int rtw89_h2c_tx(struct rtw89_dev *rtwdev, - struct sk_buff *skb, bool fwdl); - void rtw89_core_tx_kick_off(struct rtw89_dev *rtwdev, u8 qsel); -+int rtw89_core_tx_kick_off_and_wait(struct rtw89_dev *rtwdev, struct sk_buff *skb, -+ int qsel, unsigned int timeout); - void rtw89_core_fill_txdesc(struct rtw89_dev *rtwdev, - struct rtw89_tx_desc_info *desc_info, - void *txdesc); ---- a/drivers/net/wireless/realtek/rtw89/pci.c -+++ b/drivers/net/wireless/realtek/rtw89/pci.c -@@ -364,8 +364,11 @@ static void rtw89_pci_tx_status(struct r - struct rtw89_pci_tx_ring *tx_ring, - struct sk_buff *skb, u8 tx_status) - { -+ struct rtw89_tx_skb_data *skb_data = RTW89_TX_SKB_CB(skb); - struct ieee80211_tx_info *info; - -+ rtw89_core_tx_wait_complete(rtwdev, skb_data, tx_status == RTW89_TX_DONE); -+ - info = IEEE80211_SKB_CB(skb); - ieee80211_tx_info_clear_status(info); - -@@ -1203,6 +1206,7 @@ static int rtw89_pci_txwd_submit(struct - struct pci_dev *pdev = rtwpci->pdev; - struct sk_buff *skb = tx_req->skb; - struct rtw89_pci_tx_data *tx_data = RTW89_PCI_TX_SKB_CB(skb); -+ struct rtw89_tx_skb_data *skb_data = RTW89_TX_SKB_CB(skb); - bool en_wd_info = desc_info->en_wd_info; - u32 txwd_len; - u32 txwp_len; -@@ -1218,6 +1222,7 @@ static int rtw89_pci_txwd_submit(struct - } - - tx_data->dma = dma; -+ rcu_assign_pointer(skb_data->wait, NULL); - - txwp_len = sizeof(*txwp_info); - txwd_len = chip->txwd_body_size; ---- a/drivers/net/wireless/realtek/rtw89/pci.h -+++ b/drivers/net/wireless/realtek/rtw89/pci.h -@@ -1004,9 +1004,9 @@ rtw89_pci_rxbd_increase(struct rtw89_pci - - static inline struct rtw89_pci_tx_data *RTW89_PCI_TX_SKB_CB(struct sk_buff *skb) - { -- struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); -+ struct rtw89_tx_skb_data *data = RTW89_TX_SKB_CB(skb); - -- return (struct rtw89_pci_tx_data *)info->status.status_driver_data; -+ return (struct rtw89_pci_tx_data *)data->hci_priv; - } - - static inline struct rtw89_pci_tx_bd_32 * diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-031-wifi-rtw89-add-ieee80211-remain_on_channel-ops.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-031-wifi-rtw89-add-ieee80211-remain_on_channel-ops.patch deleted file mode 100644 index 097b98ab4..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-031-wifi-rtw89-add-ieee80211-remain_on_channel-ops.patch +++ /dev/null @@ -1,666 +0,0 @@ -From a0e97ae3f3320a246a79db7372fc23a38556014e Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Tue, 11 Apr 2023 20:48:30 +0800 -Subject: [PATCH 031/136] wifi: rtw89: add ieee80211::remain_on_channel ops - -Add support of remain on channel ops. Since channel context is -required to enable multi-channel concurrent(MCC) and the current -ROC in mac80211 don't support more than 1 channel context, add this -to let P2P and other protocols relying on this work as expected. -The off-channel duration and cancel timing is purely controlled by -upper layers. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230411124832.14965-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/chan.c | 35 +++ - drivers/net/wireless/realtek/rtw89/chan.h | 3 + - drivers/net/wireless/realtek/rtw89/core.c | 212 +++++++++++++++++- - drivers/net/wireless/realtek/rtw89/core.h | 30 +++ - drivers/net/wireless/realtek/rtw89/mac.c | 5 +- - drivers/net/wireless/realtek/rtw89/mac80211.c | 80 ++++++- - drivers/net/wireless/realtek/rtw89/ps.h | 16 ++ - 7 files changed, 378 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/chan.c -+++ b/drivers/net/wireless/realtek/rtw89/chan.c -@@ -141,6 +141,38 @@ void rtw89_config_entity_chandef(struct - __rtw89_config_entity_chandef(rtwdev, idx, chandef, true); - } - -+void rtw89_config_roc_chandef(struct rtw89_dev *rtwdev, -+ enum rtw89_sub_entity_idx idx, -+ const struct cfg80211_chan_def *chandef) -+{ -+ struct rtw89_hal *hal = &rtwdev->hal; -+ enum rtw89_sub_entity_idx cur; -+ -+ if (chandef) { -+ cur = atomic_cmpxchg(&hal->roc_entity_idx, -+ RTW89_SUB_ENTITY_IDLE, idx); -+ if (cur != RTW89_SUB_ENTITY_IDLE) { -+ rtw89_debug(rtwdev, RTW89_DBG_TXRX, -+ "ROC still processing on entity %d\n", idx); -+ return; -+ } -+ -+ hal->roc_chandef = *chandef; -+ } else { -+ cur = atomic_cmpxchg(&hal->roc_entity_idx, idx, -+ RTW89_SUB_ENTITY_IDLE); -+ if (cur == idx) -+ return; -+ -+ if (cur == RTW89_SUB_ENTITY_IDLE) -+ rtw89_debug(rtwdev, RTW89_DBG_TXRX, -+ "ROC already finished on entity %d\n", idx); -+ else -+ rtw89_debug(rtwdev, RTW89_DBG_TXRX, -+ "ROC is processing on entity %d\n", cur); -+ } -+} -+ - static void rtw89_config_default_chandef(struct rtw89_dev *rtwdev) - { - struct cfg80211_chan_def chandef = {0}; -@@ -154,6 +186,7 @@ void rtw89_entity_init(struct rtw89_dev - struct rtw89_hal *hal = &rtwdev->hal; - - bitmap_zero(hal->entity_map, NUM_OF_RTW89_SUB_ENTITY); -+ atomic_set(&hal->roc_entity_idx, RTW89_SUB_ENTITY_IDLE); - rtw89_config_default_chandef(rtwdev); - } - -@@ -229,6 +262,8 @@ void rtw89_chanctx_ops_remove(struct rtw - rtwvif->sub_entity_idx = RTW89_SUB_ENTITY_0; - } - -+ atomic_cmpxchg(&hal->roc_entity_idx, roll, RTW89_SUB_ENTITY_0); -+ - drop = roll; - - out: ---- a/drivers/net/wireless/realtek/rtw89/chan.h -+++ b/drivers/net/wireless/realtek/rtw89/chan.h -@@ -45,6 +45,9 @@ bool rtw89_assign_entity_chan(struct rtw - void rtw89_config_entity_chandef(struct rtw89_dev *rtwdev, - enum rtw89_sub_entity_idx idx, - const struct cfg80211_chan_def *chandef); -+void rtw89_config_roc_chandef(struct rtw89_dev *rtwdev, -+ enum rtw89_sub_entity_idx idx, -+ const struct cfg80211_chan_def *chandef); - void rtw89_entity_init(struct rtw89_dev *rtwdev); - enum rtw89_entity_mode rtw89_entity_recalc(struct rtw89_dev *rtwdev); - int rtw89_chanctx_ops_add(struct rtw89_dev *rtwdev, ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -2014,6 +2014,18 @@ static void rtw89_core_free_sta_pending_ - spin_unlock_bh(&rtwdev->ba_lock); - } - -+static void rtw89_core_free_sta_pending_roc_tx(struct rtw89_dev *rtwdev, -+ struct ieee80211_sta *sta) -+{ -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ struct sk_buff *skb, *tmp; -+ -+ skb_queue_walk_safe(&rtwsta->roc_queue, skb, tmp) { -+ skb_unlink(skb, &rtwsta->roc_queue); -+ dev_kfree_skb_any(skb); -+ } -+} -+ - static void rtw89_core_stop_tx_ba_session(struct rtw89_dev *rtwdev, - struct rtw89_txq *rtwtxq) - { -@@ -2153,6 +2165,7 @@ static void rtw89_core_txq_schedule(stru - { - struct ieee80211_hw *hw = rtwdev->hw; - struct ieee80211_txq *txq; -+ struct rtw89_vif *rtwvif; - struct rtw89_txq *rtwtxq; - unsigned long frame_cnt; - unsigned long byte_cnt; -@@ -2162,6 +2175,12 @@ static void rtw89_core_txq_schedule(stru - ieee80211_txq_schedule_start(hw, ac); - while ((txq = ieee80211_next_txq(hw, ac))) { - rtwtxq = (struct rtw89_txq *)txq->drv_priv; -+ rtwvif = (struct rtw89_vif *)txq->vif->drv_priv; -+ -+ if (rtwvif->offchan) { -+ ieee80211_return_txq(hw, txq, true); -+ continue; -+ } - tx_resource = rtw89_check_and_reclaim_tx_resource(rtwdev, txq->tid); - sched_txq = false; - -@@ -2230,6 +2249,187 @@ static void rtw89_forbid_ba_work(struct - spin_unlock_bh(&rtwdev->ba_lock); - } - -+static void rtw89_core_sta_pending_tx_iter(void *data, -+ struct ieee80211_sta *sta) -+{ -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ struct rtw89_vif *rtwvif_target = data, *rtwvif = rtwsta->rtwvif; -+ struct rtw89_dev *rtwdev = rtwvif->rtwdev; -+ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); -+ struct sk_buff *skb, *tmp; -+ int qsel, ret; -+ -+ if (rtwvif->sub_entity_idx != rtwvif_target->sub_entity_idx) -+ return; -+ -+ if (skb_queue_len(&rtwsta->roc_queue) == 0) -+ return; -+ -+ skb_queue_walk_safe(&rtwsta->roc_queue, skb, tmp) { -+ skb_unlink(skb, &rtwsta->roc_queue); -+ -+ ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, &qsel); -+ if (ret) { -+ rtw89_warn(rtwdev, "pending tx failed with %d\n", ret); -+ dev_kfree_skb_any(skb); -+ } else { -+ rtw89_core_tx_kick_off(rtwdev, qsel); -+ } -+ } -+} -+ -+static void rtw89_core_handle_sta_pending_tx(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif) -+{ -+ ieee80211_iterate_stations_atomic(rtwdev->hw, -+ rtw89_core_sta_pending_tx_iter, -+ rtwvif); -+} -+ -+static int rtw89_core_send_nullfunc(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, bool qos, bool ps) -+{ -+ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); -+ struct ieee80211_sta *sta; -+ struct ieee80211_hdr *hdr; -+ struct sk_buff *skb; -+ int ret, qsel; -+ -+ if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc) -+ return 0; -+ -+ rcu_read_lock(); -+ sta = ieee80211_find_sta(vif, vif->bss_conf.bssid); -+ if (!sta) { -+ ret = -EINVAL; -+ goto out; -+ } -+ -+ skb = ieee80211_nullfunc_get(rtwdev->hw, vif, -1, qos); -+ if (!skb) { -+ ret = -ENOMEM; -+ goto out; -+ } -+ -+ hdr = (struct ieee80211_hdr *)skb->data; -+ if (ps) -+ hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM); -+ -+ ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, &qsel); -+ if (ret) { -+ rtw89_warn(rtwdev, "nullfunc transmit failed: %d\n", ret); -+ dev_kfree_skb_any(skb); -+ goto out; -+ } -+ -+ rcu_read_unlock(); -+ -+ return rtw89_core_tx_kick_off_and_wait(rtwdev, skb, qsel, -+ RTW89_ROC_TX_TIMEOUT); -+out: -+ rcu_read_unlock(); -+ -+ return ret; -+} -+ -+void rtw89_roc_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ struct ieee80211_hw *hw = rtwdev->hw; -+ struct rtw89_roc *roc = &rtwvif->roc; -+ struct cfg80211_chan_def roc_chan; -+ struct rtw89_vif *tmp; -+ int ret; -+ -+ lockdep_assert_held(&rtwdev->mutex); -+ -+ ieee80211_queue_delayed_work(hw, &rtwvif->roc.roc_work, -+ msecs_to_jiffies(rtwvif->roc.duration)); -+ -+ rtw89_leave_ips_by_hwflags(rtwdev); -+ rtw89_leave_lps(rtwdev); -+ -+ ret = rtw89_core_send_nullfunc(rtwdev, rtwvif, true, true); -+ if (ret) -+ rtw89_debug(rtwdev, RTW89_DBG_TXRX, -+ "roc send null-1 failed: %d\n", ret); -+ -+ rtw89_for_each_rtwvif(rtwdev, tmp) -+ if (tmp->sub_entity_idx == rtwvif->sub_entity_idx) -+ tmp->offchan = true; -+ -+ cfg80211_chandef_create(&roc_chan, &roc->chan, NL80211_CHAN_NO_HT); -+ rtw89_config_roc_chandef(rtwdev, rtwvif->sub_entity_idx, &roc_chan); -+ rtw89_set_channel(rtwdev); -+ rtw89_write32_clr(rtwdev, -+ rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0), -+ B_AX_A_UC_CAM_MATCH | B_AX_A_BC_CAM_MATCH); -+ -+ ieee80211_ready_on_channel(hw); -+} -+ -+void rtw89_roc_end(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ struct ieee80211_hw *hw = rtwdev->hw; -+ struct rtw89_roc *roc = &rtwvif->roc; -+ struct rtw89_vif *tmp; -+ int ret; -+ -+ lockdep_assert_held(&rtwdev->mutex); -+ -+ ieee80211_remain_on_channel_expired(hw); -+ -+ rtw89_leave_ips_by_hwflags(rtwdev); -+ rtw89_leave_lps(rtwdev); -+ -+ rtw89_write32_mask(rtwdev, -+ rtw89_mac_reg_by_idx(R_AX_RX_FLTR_OPT, RTW89_MAC_0), -+ B_AX_RX_FLTR_CFG_MASK, -+ rtwdev->hal.rx_fltr); -+ -+ roc->state = RTW89_ROC_IDLE; -+ rtw89_config_roc_chandef(rtwdev, rtwvif->sub_entity_idx, NULL); -+ rtw89_set_channel(rtwdev); -+ ret = rtw89_core_send_nullfunc(rtwdev, rtwvif, true, false); -+ if (ret) -+ rtw89_debug(rtwdev, RTW89_DBG_TXRX, -+ "roc send null-0 failed: %d\n", ret); -+ -+ rtw89_for_each_rtwvif(rtwdev, tmp) -+ if (tmp->sub_entity_idx == rtwvif->sub_entity_idx) -+ tmp->offchan = false; -+ -+ rtw89_core_handle_sta_pending_tx(rtwdev, rtwvif); -+ queue_work(rtwdev->txq_wq, &rtwdev->txq_work); -+ -+ if (hw->conf.flags & IEEE80211_CONF_IDLE) -+ ieee80211_queue_delayed_work(hw, &roc->roc_work, -+ RTW89_ROC_IDLE_TIMEOUT); -+} -+ -+void rtw89_roc_work(struct work_struct *work) -+{ -+ struct rtw89_vif *rtwvif = container_of(work, struct rtw89_vif, -+ roc.roc_work.work); -+ struct rtw89_dev *rtwdev = rtwvif->rtwdev; -+ struct rtw89_roc *roc = &rtwvif->roc; -+ -+ mutex_lock(&rtwdev->mutex); -+ -+ switch (roc->state) { -+ case RTW89_ROC_IDLE: -+ rtw89_enter_ips_by_hwflags(rtwdev); -+ break; -+ case RTW89_ROC_MGMT: -+ case RTW89_ROC_NORMAL: -+ rtw89_roc_end(rtwdev, rtwvif); -+ break; -+ default: -+ break; -+ } -+ -+ mutex_unlock(&rtwdev->mutex); -+} -+ - static enum rtw89_tfc_lv rtw89_get_traffic_level(struct rtw89_dev *rtwdev, - u32 throughput, u64 cnt) - { -@@ -2299,6 +2499,9 @@ static void rtw89_vif_enter_lps(struct r - rtwvif->tdls_peer) - return; - -+ if (rtwvif->offchan) -+ return; -+ - if (rtwvif->stats.tx_tfc_lv == RTW89_TFC_IDLE && - rtwvif->stats.rx_tfc_lv == RTW89_TFC_IDLE) - rtw89_enter_lps(rtwdev, rtwvif); -@@ -2528,6 +2731,7 @@ int rtw89_core_sta_add(struct rtw89_dev - rtwsta->rtwvif = rtwvif; - rtwsta->prev_rssi = 0; - INIT_LIST_HEAD(&rtwsta->ba_cam_list); -+ skb_queue_head_init(&rtwsta->roc_queue); - - for (i = 0; i < ARRAY_SIZE(sta->txq); i++) - rtw89_core_txq_init(rtwdev, sta->txq[i]); -@@ -2597,6 +2801,8 @@ int rtw89_core_sta_disconnect(struct rtw - rtw89_mac_bf_disassoc(rtwdev, vif, sta); - rtw89_core_free_sta_pending_ba(rtwdev, sta); - rtw89_core_free_sta_pending_forbid_ba(rtwdev, sta); -+ rtw89_core_free_sta_pending_roc_tx(rtwdev, sta); -+ - if (vif->type == NL80211_IFTYPE_AP || sta->tdls) - rtw89_cam_deinit_addr_cam(rtwdev, &rtwsta->addr_cam); - if (sta->tdls) -@@ -3480,6 +3686,7 @@ static int rtw89_core_register_hw(struct - hw->wiphy->tid_config_support.peer |= BIT(NL80211_TID_CONFIG_ATTR_AMPDU_CTRL); - hw->wiphy->tid_config_support.vif |= BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL); - hw->wiphy->tid_config_support.peer |= BIT(NL80211_TID_CONFIG_ATTR_AMSDU_CTRL); -+ hw->wiphy->max_remain_on_channel_duration = 1000; - - wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CAN_REPLACE_PTK0); - -@@ -3563,7 +3770,8 @@ struct rtw89_dev *rtw89_alloc_ieee80211_ - goto err; - - no_chanctx = chip->support_chanctx_num == 0 || -- !(early_feat_map & BIT(RTW89_FW_FEATURE_SCAN_OFFLOAD)); -+ !(early_feat_map & BIT(RTW89_FW_FEATURE_SCAN_OFFLOAD)) || -+ !(early_feat_map & BIT(RTW89_FW_FEATURE_BEACON_FILTER)); - - if (no_chanctx) { - ops->add_chanctx = NULL; -@@ -3571,6 +3779,8 @@ struct rtw89_dev *rtw89_alloc_ieee80211_ - ops->change_chanctx = NULL; - ops->assign_vif_chanctx = NULL; - ops->unassign_vif_chanctx = NULL; -+ ops->remain_on_channel = NULL; -+ ops->cancel_remain_on_channel = NULL; - } - - driver_data_size = sizeof(struct rtw89_dev) + bus_data_size; ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -569,6 +569,7 @@ enum rtw89_sub_entity_idx { - RTW89_SUB_ENTITY_0 = 0, - - NUM_OF_RTW89_SUB_ENTITY, -+ RTW89_SUB_ENTITY_IDLE = NUM_OF_RTW89_SUB_ENTITY, - }; - - enum rtw89_rf_path { -@@ -2597,6 +2598,7 @@ struct rtw89_sta { - struct rtw89_addr_cam_entry addr_cam; /* AP mode or TDLS peer only */ - struct rtw89_bssid_cam_entry bssid_cam; /* TDLS peer only */ - struct list_head ba_cam_list; -+ struct sk_buff_head roc_queue; - - bool use_cfg_mask; - struct cfg80211_bitrate_mask mask; -@@ -2634,11 +2636,28 @@ struct rtw89_tx_skb_data { - u8 hci_priv[]; - }; - -+#define RTW89_ROC_IDLE_TIMEOUT 500 -+#define RTW89_ROC_TX_TIMEOUT 30 -+enum rtw89_roc_state { -+ RTW89_ROC_IDLE, -+ RTW89_ROC_NORMAL, -+ RTW89_ROC_MGMT, -+}; -+ -+struct rtw89_roc { -+ struct ieee80211_channel chan; -+ struct delayed_work roc_work; -+ enum ieee80211_roc_type type; -+ enum rtw89_roc_state state; -+ int duration; -+}; -+ - #define RTW89_P2P_MAX_NOA_NUM 2 - - struct rtw89_vif { - struct list_head list; - struct rtw89_dev *rtwdev; -+ struct rtw89_roc roc; - enum rtw89_sub_entity_idx sub_entity_idx; - - u8 mac_id; -@@ -2654,6 +2673,7 @@ struct rtw89_vif { - u8 bcn_hit_cond; - u8 hit_rule; - u8 last_noa_nr; -+ bool offchan; - bool trigger; - bool lsig_txop; - u8 tgt_ind; -@@ -3370,9 +3390,11 @@ struct rtw89_hal { - bool tx_path_diversity; - bool support_cckpd; - bool support_igi; -+ atomic_t roc_entity_idx; - - DECLARE_BITMAP(entity_map, NUM_OF_RTW89_SUB_ENTITY); - struct rtw89_sub_entity sub[NUM_OF_RTW89_SUB_ENTITY]; -+ struct cfg80211_chan_def roc_chandef; - - bool entity_active; - enum rtw89_entity_mode entity_mode; -@@ -4035,6 +4057,7 @@ struct rtw89_dev { - struct delayed_work coex_rfk_chk_work; - struct delayed_work cfo_track_work; - struct delayed_work forbid_ba_work; -+ struct delayed_work roc_work; - struct rtw89_ppdu_sts_info ppdu_sts; - u8 total_sta_assoc; - bool scanning; -@@ -4550,6 +4573,10 @@ const struct cfg80211_chan_def *rtw89_ch - enum rtw89_sub_entity_idx idx) - { - struct rtw89_hal *hal = &rtwdev->hal; -+ enum rtw89_sub_entity_idx roc_idx = atomic_read(&hal->roc_entity_idx); -+ -+ if (roc_idx == idx) -+ return &hal->roc_chandef; - - return &hal->sub[idx].chandef; - } -@@ -4936,6 +4963,9 @@ void rtw89_complete_cond(struct rtw89_wa - int rtw89_core_start(struct rtw89_dev *rtwdev); - void rtw89_core_stop(struct rtw89_dev *rtwdev); - void rtw89_core_update_beacon_work(struct work_struct *work); -+void rtw89_roc_work(struct work_struct *work); -+void rtw89_roc_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); -+void rtw89_roc_end(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); - void rtw89_core_scan_start(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, - const u8 *mac_addr, bool hw_scan); - void rtw89_core_scan_complete(struct rtw89_dev *rtwdev, ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -4193,6 +4193,9 @@ rtw89_mac_c2h_scanofld_rsp(struct rtw89_ - u16 chan; - int ret; - -+ if (!rtwvif) -+ return; -+ - tx_fail = RTW89_GET_MAC_C2H_SCANOFLD_TX_FAIL(c2h->data); - status = RTW89_GET_MAC_C2H_SCANOFLD_STATUS(c2h->data); - chan = RTW89_GET_MAC_C2H_SCANOFLD_PRI_CH(c2h->data); -@@ -4262,7 +4265,7 @@ rtw89_mac_bcn_fltr_rpt(struct rtw89_dev - - switch (type) { - case RTW89_BCN_FLTR_BEACON_LOSS: -- if (!rtwdev->scanning) -+ if (!rtwdev->scanning && !rtwvif->offchan) - ieee80211_connection_loss(vif); - else - rtw89_fw_h2c_set_bcn_fltr_cfg(rtwdev, vif, true); ---- a/drivers/net/wireless/realtek/rtw89/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -23,9 +23,19 @@ static void rtw89_ops_tx(struct ieee8021 - struct rtw89_dev *rtwdev = hw->priv; - struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); - struct ieee80211_vif *vif = info->control.vif; -+ struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; - struct ieee80211_sta *sta = control->sta; -+ u32 flags = IEEE80211_SKB_CB(skb)->flags; - int ret, qsel; - -+ if (rtwvif->offchan && !(flags & IEEE80211_TX_CTL_TX_OFFCHAN) && sta) { -+ struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXRX, "ops_tx during offchan\n"); -+ skb_queue_tail(&rtwsta->roc_queue, skb); -+ return; -+ } -+ - ret = rtw89_core_tx_write(rtwdev, vif, sta, skb, &qsel); - if (ret) { - rtw89_err(rtwdev, "failed to transmit skb: %d\n", ret); -@@ -115,13 +125,18 @@ static int rtw89_ops_add_interface(struc - - mutex_lock(&rtwdev->mutex); - -+ rtw89_leave_ips_by_hwflags(rtwdev); -+ - if (RTW89_CHK_FW_FEATURE(BEACON_FILTER, &rtwdev->fw)) - vif->driver_flags |= IEEE80211_VIF_BEACON_FILTER | - IEEE80211_VIF_SUPPORTS_CQM_RSSI; - - rtwvif->rtwdev = rtwdev; -+ rtwvif->roc.state = RTW89_ROC_IDLE; -+ rtwvif->offchan = false; - list_add_tail(&rtwvif->list, &rtwdev->rtwvifs_list); - INIT_WORK(&rtwvif->update_beacon_work, rtw89_core_update_beacon_work); -+ INIT_DELAYED_WORK(&rtwvif->roc.roc_work, rtw89_roc_work); - rtw89_leave_ps_mode(rtwdev); - - rtw89_traffic_stats_init(rtwdev, &rtwvif->stats); -@@ -168,6 +183,7 @@ static void rtw89_ops_remove_interface(s - vif->addr, vif->type, vif->p2p); - - cancel_work_sync(&rtwvif->update_beacon_work); -+ cancel_delayed_work_sync(&rtwvif->roc.roc_work); - - mutex_lock(&rtwdev->mutex); - rtw89_leave_ps_mode(rtwdev); -@@ -175,6 +191,8 @@ static void rtw89_ops_remove_interface(s - rtw89_mac_remove_vif(rtwdev, rtwvif); - rtw89_core_release_bit_map(rtwdev->hw_port, rtwvif->port); - list_del_init(&rtwvif->list); -+ rtw89_enter_ips_by_hwflags(rtwdev); -+ - mutex_unlock(&rtwdev->mutex); - } - -@@ -803,12 +821,13 @@ static int rtw89_ops_hw_scan(struct ieee - struct ieee80211_scan_request *req) - { - struct rtw89_dev *rtwdev = hw->priv; -+ struct rtw89_vif *rtwvif = vif_to_rtwvif_safe(vif); - int ret = 0; - - if (!RTW89_CHK_FW_FEATURE(SCAN_OFFLOAD, &rtwdev->fw)) - return 1; - -- if (rtwdev->scanning) -+ if (rtwdev->scanning || rtwvif->offchan) - return -EBUSY; - - mutex_lock(&rtwdev->mutex); -@@ -911,6 +930,63 @@ static void rtw89_ops_unassign_vif_chanc - mutex_unlock(&rtwdev->mutex); - } - -+static int rtw89_ops_remain_on_channel(struct ieee80211_hw *hw, -+ struct ieee80211_vif *vif, -+ struct ieee80211_channel *chan, -+ int duration, -+ enum ieee80211_roc_type type) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ struct rtw89_vif *rtwvif = vif_to_rtwvif_safe(vif); -+ struct rtw89_roc *roc = &rtwvif->roc; -+ -+ if (!vif) -+ return -EINVAL; -+ -+ mutex_lock(&rtwdev->mutex); -+ -+ if (roc->state != RTW89_ROC_IDLE) { -+ mutex_unlock(&rtwdev->mutex); -+ return -EBUSY; -+ } -+ -+ if (rtwdev->scanning) -+ rtw89_hw_scan_abort(rtwdev, vif); -+ -+ if (type == IEEE80211_ROC_TYPE_MGMT_TX) -+ roc->state = RTW89_ROC_MGMT; -+ else -+ roc->state = RTW89_ROC_NORMAL; -+ -+ roc->duration = duration; -+ roc->chan = *chan; -+ roc->type = type; -+ -+ rtw89_roc_start(rtwdev, rtwvif); -+ -+ mutex_unlock(&rtwdev->mutex); -+ -+ return 0; -+} -+ -+static int rtw89_ops_cancel_remain_on_channel(struct ieee80211_hw *hw, -+ struct ieee80211_vif *vif) -+{ -+ struct rtw89_dev *rtwdev = hw->priv; -+ struct rtw89_vif *rtwvif = vif_to_rtwvif_safe(vif); -+ -+ if (!rtwvif) -+ return -EINVAL; -+ -+ cancel_delayed_work_sync(&rtwvif->roc.roc_work); -+ -+ mutex_lock(&rtwdev->mutex); -+ rtw89_roc_end(rtwdev, rtwvif); -+ mutex_unlock(&rtwdev->mutex); -+ -+ return 0; -+} -+ - static void rtw89_set_tid_config_iter(void *data, struct ieee80211_sta *sta) - { - struct cfg80211_tid_config *tid_config = data; -@@ -1022,6 +1098,8 @@ const struct ieee80211_ops rtw89_ops = { - .change_chanctx = rtw89_ops_change_chanctx, - .assign_vif_chanctx = rtw89_ops_assign_vif_chanctx, - .unassign_vif_chanctx = rtw89_ops_unassign_vif_chanctx, -+ .remain_on_channel = rtw89_ops_remain_on_channel, -+ .cancel_remain_on_channel = rtw89_ops_cancel_remain_on_channel, - .set_sar_specs = rtw89_ops_set_sar_specs, - .sta_rc_update = rtw89_ops_sta_rc_update, - .set_tid_config = rtw89_ops_set_tid_config, ---- a/drivers/net/wireless/realtek/rtw89/ps.h -+++ b/drivers/net/wireless/realtek/rtw89/ps.h -@@ -15,4 +15,20 @@ void rtw89_leave_ips(struct rtw89_dev *r - void rtw89_set_coex_ctrl_lps(struct rtw89_dev *rtwdev, bool btc_ctrl); - void rtw89_process_p2p_ps(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif); - -+static inline void rtw89_leave_ips_by_hwflags(struct rtw89_dev *rtwdev) -+{ -+ struct ieee80211_hw *hw = rtwdev->hw; -+ -+ if (hw->conf.flags & IEEE80211_CONF_IDLE) -+ rtw89_leave_ips(rtwdev); -+} -+ -+static inline void rtw89_enter_ips_by_hwflags(struct rtw89_dev *rtwdev) -+{ -+ struct ieee80211_hw *hw = rtwdev->hw; -+ -+ if (hw->conf.flags & IEEE80211_CONF_IDLE) -+ rtw89_enter_ips(rtwdev); -+} -+ - #endif diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-032-wifi-rtw89-add-flag-check-for-power-state.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-032-wifi-rtw89-add-flag-check-for-power-state.patch deleted file mode 100644 index 11a568664..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-032-wifi-rtw89-add-flag-check-for-power-state.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 6cfb6cc20a61aa17bdb5440459a3503a885ee913 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Tue, 11 Apr 2023 20:48:31 +0800 -Subject: [PATCH 032/136] wifi: rtw89: add flag check for power state - -Use POWER_ON flag to make sure power on/off is symmetric. Since both -remain_on_channel and hw_scan both alter the power state, this makes -sure that we don't enter/leave IPS mode twice. -Also, replace IPS related functions with inline function that does -similar logic so we can track it more easily. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230411124832.14965-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 7 +++---- - drivers/net/wireless/realtek/rtw89/ps.c | 6 ++++++ - 2 files changed, 9 insertions(+), 4 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -2207,8 +2207,7 @@ static void rtw89_ips_work(struct work_s - struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, - ips_work); - mutex_lock(&rtwdev->mutex); -- if (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE) -- rtw89_enter_ips(rtwdev); -+ rtw89_enter_ips_by_hwflags(rtwdev); - mutex_unlock(&rtwdev->mutex); - } - -@@ -3501,8 +3500,8 @@ void rtw89_core_scan_start(struct rtw89_ - - rtwdev->scanning = true; - rtw89_leave_lps(rtwdev); -- if (hw_scan && (rtwdev->hw->conf.flags & IEEE80211_CONF_IDLE)) -- rtw89_leave_ips(rtwdev); -+ if (hw_scan) -+ rtw89_leave_ips_by_hwflags(rtwdev); - - ether_addr_copy(rtwvif->mac_addr, mac_addr); - rtw89_btc_ntfy_scan_start(rtwdev, RTW89_PHY_0, chan->band_type); ---- a/drivers/net/wireless/realtek/rtw89/ps.c -+++ b/drivers/net/wireless/realtek/rtw89/ps.c -@@ -155,6 +155,9 @@ void rtw89_enter_ips(struct rtw89_dev *r - - set_bit(RTW89_FLAG_INACTIVE_PS, rtwdev->flags); - -+ if (!test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) -+ return; -+ - rtw89_for_each_rtwvif(rtwdev, rtwvif) - rtw89_mac_vif_deinit(rtwdev, rtwvif); - -@@ -166,6 +169,9 @@ void rtw89_leave_ips(struct rtw89_dev *r - struct rtw89_vif *rtwvif; - int ret; - -+ if (test_bit(RTW89_FLAG_POWERON, rtwdev->flags)) -+ return; -+ - ret = rtw89_core_start(rtwdev); - if (ret) - rtw89_err(rtwdev, "failed to leave idle state\n"); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-033-wifi-rtw89-fix-authentication-fail-during-scan.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-033-wifi-rtw89-fix-authentication-fail-during-scan.patch deleted file mode 100644 index 6c3f6a306..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-033-wifi-rtw89-fix-authentication-fail-during-scan.patch +++ /dev/null @@ -1,79 +0,0 @@ -From c5280e5f6763c216e16feec10c63b6b32106ddb7 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Tue, 11 Apr 2023 20:48:32 +0800 -Subject: [PATCH 033/136] wifi: rtw89: fix authentication fail during scan - -We used to store operating channel info after associated. However, scan -might happen before that. Without switching back to operating channel, -authentication or association might fail. Therefore, we switch back to -operating channel when the scanning vif's BSSID is non-zero, which -implies connected or during attempt to connect. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230411124832.14965-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 15 +++++++++------ - 1 file changed, 9 insertions(+), 6 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -3199,7 +3199,7 @@ static void rtw89_hw_scan_add_chan(struc - } - - static int rtw89_hw_scan_add_chan_list(struct rtw89_dev *rtwdev, -- struct rtw89_vif *rtwvif) -+ struct rtw89_vif *rtwvif, bool connected) - { - struct cfg80211_scan_request *req = rtwvif->scan_req; - struct rtw89_mac_chinfo *ch_info, *tmp; -@@ -3243,7 +3243,7 @@ static int rtw89_hw_scan_add_chan_list(s - type = RTW89_CHAN_ACTIVE; - rtw89_hw_scan_add_chan(rtwdev, type, req->n_ssids, ch_info); - -- if (rtwvif->net_type != RTW89_NET_TYPE_NO_LINK && -+ if (connected && - off_chan_time + ch_info->period > RTW89_OFF_CHAN_TIME) { - tmp = kzalloc(sizeof(*tmp), GFP_KERNEL); - if (!tmp) { -@@ -3276,7 +3276,7 @@ out: - } - - static int rtw89_hw_scan_prehandle(struct rtw89_dev *rtwdev, -- struct rtw89_vif *rtwvif) -+ struct rtw89_vif *rtwvif, bool connected) - { - int ret; - -@@ -3285,7 +3285,7 @@ static int rtw89_hw_scan_prehandle(struc - rtw89_err(rtwdev, "Update probe request failed\n"); - goto out; - } -- ret = rtw89_hw_scan_add_chan_list(rtwdev, rtwvif); -+ ret = rtw89_hw_scan_add_chan_list(rtwdev, rtwvif, connected); - out: - return ret; - } -@@ -3363,16 +3363,19 @@ int rtw89_hw_scan_offload(struct rtw89_d - { - struct rtw89_scan_option opt = {0}; - struct rtw89_vif *rtwvif; -+ bool connected; - int ret = 0; - - rtwvif = vif ? (struct rtw89_vif *)vif->drv_priv : NULL; - if (!rtwvif) - return -EINVAL; - -+ /* This variable implies connected or during attempt to connect */ -+ connected = !is_zero_ether_addr(rtwvif->bssid); - opt.enable = enable; -- opt.target_ch_mode = rtwvif->net_type != RTW89_NET_TYPE_NO_LINK; -+ opt.target_ch_mode = connected; - if (enable) { -- ret = rtw89_hw_scan_prehandle(rtwdev, rtwvif); -+ ret = rtw89_hw_scan_prehandle(rtwdev, rtwvif, connected); - if (ret) - goto out; - } diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-034-wifi-rtw89-fw-use-generic-flow-to-set-check-features.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-034-wifi-rtw89-fw-use-generic-flow-to-set-check-features.patch deleted file mode 100644 index 0e54bb7de..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-034-wifi-rtw89-fw-use-generic-flow-to-set-check-features.patch +++ /dev/null @@ -1,140 +0,0 @@ -From 639ec6d63588b7e7c2dfae1df447daf243fb8342 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Mon, 20 Mar 2023 21:06:04 +0800 -Subject: [PATCH 034/136] wifi: rtw89: fw: use generic flow to set/check - features - -In early feature bitmap obtained from rtw89_early_fw_feature_recognize(), -the bits needed to check get increased. It's more friendly to work with -RTW89_CHK_FW_FEATURE(). So, we concentrate the flow of iterating FW feature -configures and calling RTW89_SET_FW_FEATURE() for various uses. And then, -we adjust rtw89_early_fw_feature_recognize() for RTW89_CHK_FW_FEATURE(). - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230320130606.20777-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 8 ++--- - drivers/net/wireless/realtek/rtw89/fw.c | 41 +++++++++++------------ - drivers/net/wireless/realtek/rtw89/fw.h | 2 +- - 3 files changed, 25 insertions(+), 26 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -3754,23 +3754,23 @@ struct rtw89_dev *rtw89_alloc_ieee80211_ - u32 bus_data_size, - const struct rtw89_chip_info *chip) - { -+ struct rtw89_fw_info early_fw = {}; - const struct firmware *firmware; - struct ieee80211_hw *hw; - struct rtw89_dev *rtwdev; - struct ieee80211_ops *ops; - u32 driver_data_size; -- u32 early_feat_map = 0; - bool no_chanctx; - -- firmware = rtw89_early_fw_feature_recognize(device, chip, &early_feat_map); -+ firmware = rtw89_early_fw_feature_recognize(device, chip, &early_fw); - - ops = kmemdup(&rtw89_ops, sizeof(rtw89_ops), GFP_KERNEL); - if (!ops) - goto err; - - no_chanctx = chip->support_chanctx_num == 0 || -- !(early_feat_map & BIT(RTW89_FW_FEATURE_SCAN_OFFLOAD)) || -- !(early_feat_map & BIT(RTW89_FW_FEATURE_BEACON_FILTER)); -+ !RTW89_CHK_FW_FEATURE(SCAN_OFFLOAD, &early_fw) || -+ !RTW89_CHK_FW_FEATURE(BEACON_FILTER, &early_fw); - - if (no_chanctx) { - ops->add_chanctx = NULL; ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -269,38 +269,45 @@ static const struct __fw_feat_cfg fw_fea - __CFG_FW_FEAT(RTL8852C, ge, 0, 27, 56, 10, BEACON_FILTER), - }; - -+static void rtw89_fw_iterate_feature_cfg(struct rtw89_fw_info *fw, -+ const struct rtw89_chip_info *chip, -+ u32 ver_code) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(fw_feat_tbl); i++) { -+ const struct __fw_feat_cfg *ent = &fw_feat_tbl[i]; -+ -+ if (chip->chip_id != ent->chip_id) -+ continue; -+ -+ if (ent->cond(ver_code, ent->ver_code)) -+ RTW89_SET_FW_FEATURE(ent->feature, fw); -+ } -+} -+ - static void rtw89_fw_recognize_features(struct rtw89_dev *rtwdev) - { - const struct rtw89_chip_info *chip = rtwdev->chip; -- const struct __fw_feat_cfg *ent; - const struct rtw89_fw_suit *fw_suit; - u32 suit_ver_code; -- int i; - - fw_suit = rtw89_fw_suit_get(rtwdev, RTW89_FW_NORMAL); - suit_ver_code = RTW89_FW_SUIT_VER_CODE(fw_suit); - -- for (i = 0; i < ARRAY_SIZE(fw_feat_tbl); i++) { -- ent = &fw_feat_tbl[i]; -- if (chip->chip_id != ent->chip_id) -- continue; -- -- if (ent->cond(suit_ver_code, ent->ver_code)) -- RTW89_SET_FW_FEATURE(ent->feature, &rtwdev->fw); -- } -+ rtw89_fw_iterate_feature_cfg(&rtwdev->fw, chip, suit_ver_code); - } - - const struct firmware * - rtw89_early_fw_feature_recognize(struct device *device, - const struct rtw89_chip_info *chip, -- u32 *early_feat_map) -+ struct rtw89_fw_info *early_fw) - { - union rtw89_compat_fw_hdr buf = {}; - const struct firmware *firmware; - bool full_req = false; - u32 ver_code; - int ret; -- int i; - - /* If SECURITY_LOADPIN_ENFORCE is enabled, reading partial files will - * be denied (-EPERM). Then, we don't get right firmware things as -@@ -329,15 +336,7 @@ rtw89_early_fw_feature_recognize(struct - if (!ver_code) - goto out; - -- for (i = 0; i < ARRAY_SIZE(fw_feat_tbl); i++) { -- const struct __fw_feat_cfg *ent = &fw_feat_tbl[i]; -- -- if (chip->chip_id != ent->chip_id) -- continue; -- -- if (ent->cond(ver_code, ent->ver_code)) -- *early_feat_map |= BIT(ent->feature); -- } -+ rtw89_fw_iterate_feature_cfg(early_fw, chip, ver_code); - - out: - if (full_req) ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -3658,7 +3658,7 @@ int rtw89_fw_recognize(struct rtw89_dev - const struct firmware * - rtw89_early_fw_feature_recognize(struct device *device, - const struct rtw89_chip_info *chip, -- u32 *early_feat_map); -+ struct rtw89_fw_info *early_fw); - int rtw89_fw_download(struct rtw89_dev *rtwdev, enum rtw89_fw_type type); - int rtw89_load_firmware(struct rtw89_dev *rtwdev); - void rtw89_unload_firmware(struct rtw89_dev *rtwdev); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-035-wifi-rtw89-use-schedule_work-to-request-firmware.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-035-wifi-rtw89-use-schedule_work-to-request-firmware.patch deleted file mode 100644 index ba93049a8..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-035-wifi-rtw89-use-schedule_work-to-request-firmware.patch +++ /dev/null @@ -1,225 +0,0 @@ -From b80ad23a8f2e0b63384cadc0aa2c1135b1dc03eb Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 20 Mar 2023 21:06:05 +0800 -Subject: [PATCH 035/136] wifi: rtw89: use schedule_work to request firmware - -Since we are going to load more than one firmware and some are not -presented or optional, using asynchronous API request_firmware_nowait() -will become complicated. Also, we want to use firmware_request_nowarn() -to avoid warning messages when loading optional files. So, use -schedule_work to be simpler. - -To abstract loading a firmware or file, define a struct rtw89_fw_req_info -containing a struct firmware and a completion to ensure this firmware is -loaded completely. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230320130606.20777-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 17 +++--- - drivers/net/wireless/realtek/rtw89/core.h | 8 ++- - drivers/net/wireless/realtek/rtw89/fw.c | 68 ++++++++++------------- - drivers/net/wireless/realtek/rtw89/fw.h | 2 +- - 4 files changed, 45 insertions(+), 50 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -3423,7 +3423,6 @@ void rtw89_core_stop(struct rtw89_dev *r - int rtw89_core_init(struct rtw89_dev *rtwdev) - { - struct rtw89_btc *btc = &rtwdev->btc; -- int ret; - u8 band; - - INIT_LIST_HEAD(&rtwdev->ba_list); -@@ -3457,6 +3456,8 @@ int rtw89_core_init(struct rtw89_dev *rt - - INIT_WORK(&rtwdev->c2h_work, rtw89_fw_c2h_work); - INIT_WORK(&rtwdev->ips_work, rtw89_ips_work); -+ INIT_WORK(&rtwdev->load_firmware_work, rtw89_load_firmware_work); -+ - skb_queue_head_init(&rtwdev->c2h_queue); - rtw89_core_ppdu_sts_init(rtwdev); - rtw89_traffic_stats_init(rtwdev, &rtwdev->stats); -@@ -3468,12 +3469,10 @@ int rtw89_core_init(struct rtw89_dev *rt - INIT_WORK(&btc->dhcp_notify_work, rtw89_btc_ntfy_dhcp_packet_work); - INIT_WORK(&btc->icmp_notify_work, rtw89_btc_ntfy_icmp_packet_work); - -- ret = rtw89_load_firmware(rtwdev); -- if (ret) { -- rtw89_warn(rtwdev, "no firmware loaded\n"); -- destroy_workqueue(rtwdev->txq_wq); -- return ret; -- } -+ init_completion(&rtwdev->fw.req.completion); -+ -+ schedule_work(&rtwdev->load_firmware_work); -+ - rtw89_ser_init(rtwdev); - rtw89_entity_init(rtwdev); - -@@ -3792,7 +3791,7 @@ struct rtw89_dev *rtw89_alloc_ieee80211_ - rtwdev->dev = device; - rtwdev->ops = ops; - rtwdev->chip = chip; -- rtwdev->fw.firmware = firmware; -+ rtwdev->fw.req.firmware = firmware; - - rtw89_debug(rtwdev, RTW89_DBG_FW, "probe driver %s chanctx\n", - no_chanctx ? "without" : "with"); -@@ -3809,7 +3808,7 @@ EXPORT_SYMBOL(rtw89_alloc_ieee80211_hw); - void rtw89_free_ieee80211_hw(struct rtw89_dev *rtwdev) - { - kfree(rtwdev->ops); -- release_firmware(rtwdev->fw.firmware); -+ release_firmware(rtwdev->fw.req.firmware); - ieee80211_free_hw(rtwdev->hw); - } - EXPORT_SYMBOL(rtw89_free_ieee80211_hw); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3297,10 +3297,13 @@ struct rtw89_fw_suit { - GET_FW_HDR_SUBVERSION(fw_hdr), \ - GET_FW_HDR_SUBINDEX(fw_hdr)) - --struct rtw89_fw_info { -+struct rtw89_fw_req_info { - const struct firmware *firmware; -- struct rtw89_dev *rtwdev; - struct completion completion; -+}; -+ -+struct rtw89_fw_info { -+ struct rtw89_fw_req_info req; - u8 h2c_seq; - u8 rec_seq; - u8 h2c_counter; -@@ -4018,6 +4021,7 @@ struct rtw89_dev { - struct sk_buff_head c2h_queue; - struct work_struct c2h_work; - struct work_struct ips_work; -+ struct work_struct load_firmware_work; - - struct list_head early_h2c_list; - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -155,8 +155,9 @@ int rtw89_mfw_recognize(struct rtw89_dev - struct rtw89_fw_suit *fw_suit, bool nowarn) - { - struct rtw89_fw_info *fw_info = &rtwdev->fw; -- const u8 *mfw = fw_info->firmware->data; -- u32 mfw_len = fw_info->firmware->size; -+ const struct firmware *firmware = fw_info->req.firmware; -+ const u8 *mfw = firmware->data; -+ u32 mfw_len = firmware->size; - const struct rtw89_mfw_hdr *mfw_hdr = (const struct rtw89_mfw_hdr *)mfw; - const struct rtw89_mfw_info *mfw_info; - int i; -@@ -631,67 +632,58 @@ int rtw89_wait_firmware_completion(struc - { - struct rtw89_fw_info *fw = &rtwdev->fw; - -- wait_for_completion(&fw->completion); -- if (!fw->firmware) -+ wait_for_completion(&fw->req.completion); -+ if (!fw->req.firmware) - return -EINVAL; - - return 0; - } - --static void rtw89_load_firmware_cb(const struct firmware *firmware, void *context) -+static int rtw89_load_firmware_req(struct rtw89_dev *rtwdev, -+ struct rtw89_fw_req_info *req, -+ const char *fw_name, bool nowarn) - { -- struct rtw89_fw_info *fw = context; -- struct rtw89_dev *rtwdev = fw->rtwdev; -- -- if (!firmware || !firmware->data) { -- rtw89_err(rtwdev, "failed to request firmware\n"); -- complete_all(&fw->completion); -- return; -- } -- -- fw->firmware = firmware; -- complete_all(&fw->completion); --} -- --int rtw89_load_firmware(struct rtw89_dev *rtwdev) --{ -- struct rtw89_fw_info *fw = &rtwdev->fw; -- const char *fw_name = rtwdev->chip->fw_name; - int ret; - -- fw->rtwdev = rtwdev; -- init_completion(&fw->completion); -- -- if (fw->firmware) { -+ if (req->firmware) { - rtw89_debug(rtwdev, RTW89_DBG_FW, - "full firmware has been early requested\n"); -- complete_all(&fw->completion); -+ complete_all(&req->completion); - return 0; - } - -- ret = request_firmware_nowait(THIS_MODULE, true, fw_name, rtwdev->dev, -- GFP_KERNEL, fw, rtw89_load_firmware_cb); -- if (ret) { -- rtw89_err(rtwdev, "failed to async firmware request\n"); -- return ret; -- } -+ if (nowarn) -+ ret = firmware_request_nowarn(&req->firmware, fw_name, rtwdev->dev); -+ else -+ ret = request_firmware(&req->firmware, fw_name, rtwdev->dev); - -- return 0; -+ complete_all(&req->completion); -+ -+ return ret; -+} -+ -+void rtw89_load_firmware_work(struct work_struct *work) -+{ -+ struct rtw89_dev *rtwdev = -+ container_of(work, struct rtw89_dev, load_firmware_work); -+ const char *fw_name = rtwdev->chip->fw_name; -+ -+ rtw89_load_firmware_req(rtwdev, &rtwdev->fw.req, fw_name, false); - } - - void rtw89_unload_firmware(struct rtw89_dev *rtwdev) - { - struct rtw89_fw_info *fw = &rtwdev->fw; - -- rtw89_wait_firmware_completion(rtwdev); -+ cancel_work_sync(&rtwdev->load_firmware_work); - -- if (fw->firmware) { -- release_firmware(fw->firmware); -+ if (fw->req.firmware) { -+ release_firmware(fw->req.firmware); - - /* assign NULL back in case rtw89_free_ieee80211_hw() - * try to release the same one again. - */ -- fw->firmware = NULL; -+ fw->req.firmware = NULL; - } - } - ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -3660,7 +3660,7 @@ rtw89_early_fw_feature_recognize(struct - const struct rtw89_chip_info *chip, - struct rtw89_fw_info *early_fw); - int rtw89_fw_download(struct rtw89_dev *rtwdev, enum rtw89_fw_type type); --int rtw89_load_firmware(struct rtw89_dev *rtwdev); -+void rtw89_load_firmware_work(struct work_struct *work); - void rtw89_unload_firmware(struct rtw89_dev *rtwdev); - int rtw89_wait_firmware_completion(struct rtw89_dev *rtwdev); - void rtw89_h2c_pkt_set_hdr(struct rtw89_dev *rtwdev, struct sk_buff *skb, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-036-wifi-rtw89-add-firmware-format-version-to-backward-c.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-036-wifi-rtw89-add-firmware-format-version-to-backward-c.patch deleted file mode 100644 index ffa3f83a4..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-036-wifi-rtw89-add-firmware-format-version-to-backward-c.patch +++ /dev/null @@ -1,273 +0,0 @@ -From ffde7f3476a6dfd5856dc2af207dd0f950b10122 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 20 Mar 2023 21:06:06 +0800 -Subject: [PATCH 036/136] wifi: rtw89: add firmware format version to backward - compatible with older drivers - -In the discuss threads [1] [2], new firmware format break user space -because older drivers can't recognize new firmware format. To avoid this, -the new format will be named rtw89/rtw8852b_fw-1.bin and only new driver -try to load it. Old drivers only load original and understandable firmware -rtw89/rtw8852b_fw.bin. - -More, new driver will be still backward compatible with old firmware, so -original firmware can be used by new driver. - -If there is newer firmware format is introduced, rtw89/rtw8852b_fw-2.bin -will be given. The same rules will be applied like above. So, we will have -firmware like below in linux-firmware in the future. - - rtw89/rtw8852b_fw-2.bin - rtw89/rtw8852b_fw-1.bin - rtw89/rtw8852b_fw.bin - -After this patch, MODULE_FIRMWARE() of 8852A/B/C become - rtw89/rtw8852a_fw.bin - rtw89/rtw8852b_fw-1.bin - rtw89/rtw8852c_fw.bin - -[1] https://lore.kernel.org/linux-wireless/df1ce994-3368-a57e-7078-8bdcccf4a1fd@gmail.com/T/#m24cb43be31a762d0ea70bf07f27ae96c59f6931b -[2] https://bugzilla.kernel.org/show_bug.cgi?id=217207 - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230320130606.20777-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 4 ++- - drivers/net/wireless/realtek/rtw89/core.h | 4 ++- - drivers/net/wireless/realtek/rtw89/fw.c | 33 ++++++++++++++----- - drivers/net/wireless/realtek/rtw89/fw.h | 12 ++++++- - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 10 ++++-- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 10 ++++-- - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 10 ++++-- - 7 files changed, 66 insertions(+), 17 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -3759,9 +3759,10 @@ struct rtw89_dev *rtw89_alloc_ieee80211_ - struct rtw89_dev *rtwdev; - struct ieee80211_ops *ops; - u32 driver_data_size; -+ int fw_format = -1; - bool no_chanctx; - -- firmware = rtw89_early_fw_feature_recognize(device, chip, &early_fw); -+ firmware = rtw89_early_fw_feature_recognize(device, chip, &early_fw, &fw_format); - - ops = kmemdup(&rtw89_ops, sizeof(rtw89_ops), GFP_KERNEL); - if (!ops) -@@ -3792,6 +3793,7 @@ struct rtw89_dev *rtw89_alloc_ieee80211_ - rtwdev->ops = ops; - rtwdev->chip = chip; - rtwdev->fw.req.firmware = firmware; -+ rtwdev->fw.fw_format = fw_format; - - rtw89_debug(rtwdev, RTW89_DBG_FW, "probe driver %s chanctx\n", - no_chanctx ? "without" : "with"); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3080,7 +3080,8 @@ struct rtw89_phy_ul_tb_info { - struct rtw89_chip_info { - enum rtw89_core_chip_id chip_id; - const struct rtw89_chip_ops *ops; -- const char *fw_name; -+ const char *fw_basename; -+ u8 fw_format_max; - bool try_ce_fw; - u32 fifo_size; - u32 dle_scc_rsvd_size; -@@ -3304,6 +3305,7 @@ struct rtw89_fw_req_info { - - struct rtw89_fw_info { - struct rtw89_fw_req_info req; -+ int fw_format; - u8 h2c_seq; - u8 rec_seq; - u8 h2c_counter; ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -302,11 +302,14 @@ static void rtw89_fw_recognize_features( - const struct firmware * - rtw89_early_fw_feature_recognize(struct device *device, - const struct rtw89_chip_info *chip, -- struct rtw89_fw_info *early_fw) -+ struct rtw89_fw_info *early_fw, -+ int *used_fw_format) - { - union rtw89_compat_fw_hdr buf = {}; - const struct firmware *firmware; - bool full_req = false; -+ char fw_name[64]; -+ int fw_format; - u32 ver_code; - int ret; - -@@ -317,12 +320,22 @@ rtw89_early_fw_feature_recognize(struct - if (IS_ENABLED(CONFIG_SECURITY_LOADPIN_ENFORCE)) - full_req = true; - -- if (full_req) -- ret = request_firmware(&firmware, chip->fw_name, device); -- else -- ret = request_partial_firmware_into_buf(&firmware, chip->fw_name, -- device, &buf, sizeof(buf), -- 0); -+ for (fw_format = chip->fw_format_max; fw_format >= 0; fw_format--) { -+ rtw89_fw_get_filename(fw_name, sizeof(fw_name), -+ chip->fw_basename, fw_format); -+ -+ if (full_req) -+ ret = request_firmware(&firmware, fw_name, device); -+ else -+ ret = request_partial_firmware_into_buf(&firmware, fw_name, -+ device, &buf, sizeof(buf), -+ 0); -+ if (!ret) { -+ dev_info(device, "loaded firmware %s\n", fw_name); -+ *used_fw_format = fw_format; -+ break; -+ } -+ } - - if (ret) { - dev_err(device, "failed to early request firmware: %d\n", ret); -@@ -666,7 +679,11 @@ void rtw89_load_firmware_work(struct wor - { - struct rtw89_dev *rtwdev = - container_of(work, struct rtw89_dev, load_firmware_work); -- const char *fw_name = rtwdev->chip->fw_name; -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ char fw_name[64]; -+ -+ rtw89_fw_get_filename(fw_name, sizeof(fw_name), -+ chip->fw_basename, rtwdev->fw.fw_format); - - rtw89_load_firmware_req(rtwdev, &rtwdev->fw.req, fw_name, false); - } ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -3515,6 +3515,15 @@ static inline u32 rtw89_compat_fw_hdr_ve - return RTW89_FW_HDR_VER_CODE(&compat->fw_hdr); - } - -+static inline void rtw89_fw_get_filename(char *buf, size_t size, -+ const char *fw_basename, int fw_format) -+{ -+ if (fw_format <= 0) -+ snprintf(buf, size, "%s.bin", fw_basename); -+ else -+ snprintf(buf, size, "%s-%d.bin", fw_basename, fw_format); -+} -+ - #define RTW89_H2C_RF_PAGE_SIZE 500 - #define RTW89_H2C_RF_PAGE_NUM 3 - struct rtw89_fw_h2c_rf_reg_info { -@@ -3658,7 +3667,8 @@ int rtw89_fw_recognize(struct rtw89_dev - const struct firmware * - rtw89_early_fw_feature_recognize(struct device *device, - const struct rtw89_chip_info *chip, -- struct rtw89_fw_info *early_fw); -+ struct rtw89_fw_info *early_fw, -+ int *used_fw_format); - int rtw89_fw_download(struct rtw89_dev *rtwdev, enum rtw89_fw_type type); - void rtw89_load_firmware_work(struct work_struct *work); - void rtw89_unload_firmware(struct rtw89_dev *rtwdev); ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -12,6 +12,11 @@ - #include "rtw8852a_table.h" - #include "txrx.h" - -+#define RTW8852A_FW_FORMAT_MAX 0 -+#define RTW8852A_FW_BASENAME "rtw89/rtw8852a_fw" -+#define RTW8852A_MODULE_FIRMWARE \ -+ RTW8852A_FW_BASENAME ".bin" -+ - static const struct rtw89_hfc_ch_cfg rtw8852a_hfc_chcfg_pcie[] = { - {128, 1896, grp_0}, /* ACH 0 */ - {128, 1896, grp_0}, /* ACH 1 */ -@@ -2059,7 +2064,8 @@ static const struct rtw89_chip_ops rtw88 - const struct rtw89_chip_info rtw8852a_chip_info = { - .chip_id = RTL8852A, - .ops = &rtw8852a_chip_ops, -- .fw_name = "rtw89/rtw8852a_fw.bin", -+ .fw_basename = RTW8852A_FW_BASENAME, -+ .fw_format_max = RTW8852A_FW_FORMAT_MAX, - .try_ce_fw = false, - .fifo_size = 458752, - .dle_scc_rsvd_size = 0, -@@ -2156,7 +2162,7 @@ const struct rtw89_chip_info rtw8852a_ch - }; - EXPORT_SYMBOL(rtw8852a_chip_info); - --MODULE_FIRMWARE("rtw89/rtw8852a_fw.bin"); -+MODULE_FIRMWARE(RTW8852A_MODULE_FIRMWARE); - MODULE_AUTHOR("Realtek Corporation"); - MODULE_DESCRIPTION("Realtek 802.11ax wireless 8852A driver"); - MODULE_LICENSE("Dual BSD/GPL"); ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -12,6 +12,11 @@ - #include "rtw8852b_table.h" - #include "txrx.h" - -+#define RTW8852B_FW_FORMAT_MAX 1 -+#define RTW8852B_FW_BASENAME "rtw89/rtw8852b_fw" -+#define RTW8852B_MODULE_FIRMWARE \ -+ RTW8852B_FW_BASENAME "-" __stringify(RTW8852B_FW_FORMAT_MAX) ".bin" -+ - static const struct rtw89_hfc_ch_cfg rtw8852b_hfc_chcfg_pcie[] = { - {5, 343, grp_0}, /* ACH 0 */ - {5, 343, grp_0}, /* ACH 1 */ -@@ -2480,7 +2485,8 @@ static const struct rtw89_chip_ops rtw88 - const struct rtw89_chip_info rtw8852b_chip_info = { - .chip_id = RTL8852B, - .ops = &rtw8852b_chip_ops, -- .fw_name = "rtw89/rtw8852b_fw.bin", -+ .fw_basename = RTW8852B_FW_BASENAME, -+ .fw_format_max = RTW8852B_FW_FORMAT_MAX, - .try_ce_fw = true, - .fifo_size = 196608, - .dle_scc_rsvd_size = 98304, -@@ -2576,7 +2582,7 @@ const struct rtw89_chip_info rtw8852b_ch - }; - EXPORT_SYMBOL(rtw8852b_chip_info); - --MODULE_FIRMWARE("rtw89/rtw8852b_fw.bin"); -+MODULE_FIRMWARE(RTW8852B_MODULE_FIRMWARE); - MODULE_AUTHOR("Realtek Corporation"); - MODULE_DESCRIPTION("Realtek 802.11ax wireless 8852B driver"); - MODULE_LICENSE("Dual BSD/GPL"); ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -13,6 +13,11 @@ - #include "rtw8852c_table.h" - #include "util.h" - -+#define RTW8852C_FW_FORMAT_MAX 0 -+#define RTW8852C_FW_BASENAME "rtw89/rtw8852c_fw" -+#define RTW8852C_MODULE_FIRMWARE \ -+ RTW8852C_FW_BASENAME ".bin" -+ - static const struct rtw89_hfc_ch_cfg rtw8852c_hfc_chcfg_pcie[] = { - {13, 1614, grp_0}, /* ACH 0 */ - {13, 1614, grp_0}, /* ACH 1 */ -@@ -2791,7 +2796,8 @@ static const struct rtw89_chip_ops rtw88 - const struct rtw89_chip_info rtw8852c_chip_info = { - .chip_id = RTL8852C, - .ops = &rtw8852c_chip_ops, -- .fw_name = "rtw89/rtw8852c_fw.bin", -+ .fw_basename = RTW8852C_FW_BASENAME, -+ .fw_format_max = RTW8852C_FW_FORMAT_MAX, - .try_ce_fw = false, - .fifo_size = 458752, - .dle_scc_rsvd_size = 0, -@@ -2892,7 +2898,7 @@ const struct rtw89_chip_info rtw8852c_ch - }; - EXPORT_SYMBOL(rtw8852c_chip_info); - --MODULE_FIRMWARE("rtw89/rtw8852c_fw.bin"); -+MODULE_FIRMWARE(RTW8852C_MODULE_FIRMWARE); - MODULE_AUTHOR("Realtek Corporation"); - MODULE_DESCRIPTION("Realtek 802.11ax wireless 8852C driver"); - MODULE_LICENSE("Dual BSD/GPL"); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-037-wifi-rtw89-support-parameter-tables-by-RFE-type.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-037-wifi-rtw89-support-parameter-tables-by-RFE-type.patch deleted file mode 100644 index 3706f174f..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-037-wifi-rtw89-support-parameter-tables-by-RFE-type.patch +++ /dev/null @@ -1,532 +0,0 @@ -From 5395482afabb61cc980c9e78f013dd31cf212568 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Thu, 30 Mar 2023 16:03:31 +0800 -Subject: [PATCH 037/136] wifi: rtw89: support parameter tables by RFE type - -One chip can have different RFE (RF front end) types which we will judge -at runtime. And, different RFE types may use different RF parameter tables. -Though we didn't really meet this case previously, we are going to meet it -on upcoming chip RTL8851B. So, this commit handles parameter tables for -runtime RFE type. - -We now encapsulate rtw89_txpwr_rule_<2/5/6>ghz tables into rtw89_rfe_parms. -Then, each chip defines its default parameter tables, and if needed, it can -configure extra parameter tables by RFE type. Finally we determine runtime -parameter tables by RFE type if one is configured. Otherwise, we use the -default parameter tables. - -For now, we just move all settings under default parameter tables. We will -configure parameter tables by RFE types in separate commits afterwards. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230330080331.37155-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 23 +++++++ - drivers/net/wireless/realtek/rtw89/core.h | 55 +++++++++++----- - drivers/net/wireless/realtek/rtw89/phy.c | 64 +++++++++++-------- - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 6 +- - .../wireless/realtek/rtw89/rtw8852a_table.c | 15 +++++ - .../wireless/realtek/rtw89/rtw8852a_table.h | 11 +--- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 6 +- - .../wireless/realtek/rtw89/rtw8852b_table.c | 15 +++++ - .../wireless/realtek/rtw89/rtw8852b_table.h | 11 +--- - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 8 +-- - .../wireless/realtek/rtw89/rtw8852c_table.c | 21 ++++++ - .../wireless/realtek/rtw89/rtw8852c_table.h | 16 +---- - 12 files changed, 161 insertions(+), 90 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -3557,6 +3557,28 @@ static void rtw89_core_setup_phycap(stru - rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv <= CHIP_CBV; - } - -+static void rtw89_core_setup_rfe_parms(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ const struct rtw89_rfe_parms_conf *conf = chip->rfe_parms_conf; -+ struct rtw89_efuse *efuse = &rtwdev->efuse; -+ u8 rfe_type = efuse->rfe_type; -+ -+ if (!conf) -+ goto out; -+ -+ while (conf->rfe_parms) { -+ if (rfe_type == conf->rfe_type) { -+ rtwdev->rfe_parms = conf->rfe_parms; -+ return; -+ } -+ conf++; -+ } -+ -+out: -+ rtwdev->rfe_parms = chip->dflt_parms; -+} -+ - static int rtw89_chip_efuse_info_setup(struct rtw89_dev *rtwdev) - { - int ret; -@@ -3578,6 +3600,7 @@ static int rtw89_chip_efuse_info_setup(s - return ret; - - rtw89_core_setup_phycap(rtwdev); -+ rtw89_core_setup_rfe_parms(rtwdev); - - rtw89_mac_pwr_off(rtwdev); - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2990,6 +2990,41 @@ struct rtw89_txpwr_table { - const struct rtw89_txpwr_table *tbl); - }; - -+struct rtw89_txpwr_rule_2ghz { -+ const s8 (*lmt)[RTW89_2G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; -+ const s8 (*lmt_ru)[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; -+}; -+ -+struct rtw89_txpwr_rule_5ghz { -+ const s8 (*lmt)[RTW89_5G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; -+ const s8 (*lmt_ru)[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; -+}; -+ -+struct rtw89_txpwr_rule_6ghz { -+ const s8 (*lmt)[RTW89_6G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_6G_CH_NUM]; -+ const s8 (*lmt_ru)[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_6G_CH_NUM]; -+}; -+ -+struct rtw89_rfe_parms { -+ struct rtw89_txpwr_rule_2ghz rule_2ghz; -+ struct rtw89_txpwr_rule_5ghz rule_5ghz; -+ struct rtw89_txpwr_rule_6ghz rule_6ghz; -+}; -+ -+struct rtw89_rfe_parms_conf { -+ const struct rtw89_rfe_parms *rfe_parms; -+ u8 rfe_type; -+}; -+ - struct rtw89_page_regs { - u32 hci_fc_ctrl; - u32 ch_page_ctrl; -@@ -3127,21 +3162,10 @@ struct rtw89_chip_info { - const struct rtw89_phy_dig_gain_table *dig_table; - const struct rtw89_dig_regs *dig_regs; - const struct rtw89_phy_tssi_dbw_table *tssi_dbw_table; -- const s8 (*txpwr_lmt_2g)[RTW89_2G_BW_NUM][RTW89_NTX_NUM] -- [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -- [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; -- const s8 (*txpwr_lmt_5g)[RTW89_5G_BW_NUM][RTW89_NTX_NUM] -- [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -- [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; -- const s8 (*txpwr_lmt_6g)[RTW89_6G_BW_NUM][RTW89_NTX_NUM] -- [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -- [RTW89_REGD_NUM][RTW89_6G_CH_NUM]; -- const s8 (*txpwr_lmt_ru_2g)[RTW89_RU_NUM][RTW89_NTX_NUM] -- [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; -- const s8 (*txpwr_lmt_ru_5g)[RTW89_RU_NUM][RTW89_NTX_NUM] -- [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; -- const s8 (*txpwr_lmt_ru_6g)[RTW89_RU_NUM][RTW89_NTX_NUM] -- [RTW89_REGD_NUM][RTW89_6G_CH_NUM]; -+ -+ /* NULL if no rfe-specific, or a null-terminated array by rfe_parms */ -+ const struct rtw89_rfe_parms_conf *rfe_parms_conf; -+ const struct rtw89_rfe_parms *dflt_parms; - - u8 txpwr_factor_rf; - u8 txpwr_factor_mac; -@@ -3992,6 +4016,7 @@ struct rtw89_dev { - struct rtw89_hw_scan_info scan_info; - const struct rtw89_chip_info *chip; - const struct rtw89_pci_info *pci_info; -+ const struct rtw89_rfe_parms *rfe_parms; - struct rtw89_hal hal; - struct rtw89_mcc_info mcc; - struct rtw89_mac_info mac; ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -1617,29 +1617,35 @@ static u8 rtw89_channel_to_idx(struct rt - s8 rtw89_phy_read_txpwr_limit(struct rtw89_dev *rtwdev, u8 band, - u8 bw, u8 ntx, u8 rs, u8 bf, u8 ch) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; -+ const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms; -+ const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz; -+ const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz; -+ const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz; - u8 ch_idx = rtw89_channel_to_idx(rtwdev, band, ch); - u8 regd = rtw89_regd_get(rtwdev, band); - s8 lmt = 0, sar; - - switch (band) { - case RTW89_BAND_2G: -- lmt = (*chip->txpwr_lmt_2g)[bw][ntx][rs][bf][regd][ch_idx]; -- if (!lmt) -- lmt = (*chip->txpwr_lmt_2g)[bw][ntx][rs][bf] -- [RTW89_WW][ch_idx]; -+ lmt = (*rule_2ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; -+ if (lmt) -+ break; -+ -+ lmt = (*rule_2ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; - break; - case RTW89_BAND_5G: -- lmt = (*chip->txpwr_lmt_5g)[bw][ntx][rs][bf][regd][ch_idx]; -- if (!lmt) -- lmt = (*chip->txpwr_lmt_5g)[bw][ntx][rs][bf] -- [RTW89_WW][ch_idx]; -+ lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; -+ if (lmt) -+ break; -+ -+ lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; - break; - case RTW89_BAND_6G: -- lmt = (*chip->txpwr_lmt_6g)[bw][ntx][rs][bf][regd][ch_idx]; -- if (!lmt) -- lmt = (*chip->txpwr_lmt_6g)[bw][ntx][rs][bf] -- [RTW89_WW][ch_idx]; -+ lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; -+ if (lmt) -+ break; -+ -+ lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; - break; - default: - rtw89_warn(rtwdev, "unknown band type: %d\n", band); -@@ -1862,29 +1868,35 @@ void rtw89_phy_fill_txpwr_limit(struct r - static s8 rtw89_phy_read_txpwr_limit_ru(struct rtw89_dev *rtwdev, u8 band, - u8 ru, u8 ntx, u8 ch) - { -- const struct rtw89_chip_info *chip = rtwdev->chip; -+ const struct rtw89_rfe_parms *rfe_parms = rtwdev->rfe_parms; -+ const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz; -+ const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz; -+ const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz; - u8 ch_idx = rtw89_channel_to_idx(rtwdev, band, ch); - u8 regd = rtw89_regd_get(rtwdev, band); - s8 lmt_ru = 0, sar; - - switch (band) { - case RTW89_BAND_2G: -- lmt_ru = (*chip->txpwr_lmt_ru_2g)[ru][ntx][regd][ch_idx]; -- if (!lmt_ru) -- lmt_ru = (*chip->txpwr_lmt_ru_2g)[ru][ntx] -- [RTW89_WW][ch_idx]; -+ lmt_ru = (*rule_2ghz->lmt_ru)[ru][ntx][regd][ch_idx]; -+ if (lmt_ru) -+ break; -+ -+ lmt_ru = (*rule_2ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; - break; - case RTW89_BAND_5G: -- lmt_ru = (*chip->txpwr_lmt_ru_5g)[ru][ntx][regd][ch_idx]; -- if (!lmt_ru) -- lmt_ru = (*chip->txpwr_lmt_ru_5g)[ru][ntx] -- [RTW89_WW][ch_idx]; -+ lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][regd][ch_idx]; -+ if (lmt_ru) -+ break; -+ -+ lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; - break; - case RTW89_BAND_6G: -- lmt_ru = (*chip->txpwr_lmt_ru_6g)[ru][ntx][regd][ch_idx]; -- if (!lmt_ru) -- lmt_ru = (*chip->txpwr_lmt_ru_6g)[ru][ntx] -- [RTW89_WW][ch_idx]; -+ lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][regd][ch_idx]; -+ if (lmt_ru) -+ break; -+ -+ lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; - break; - default: - rtw89_warn(rtwdev, "unknown band type: %d\n", band); ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -2085,10 +2085,8 @@ const struct rtw89_chip_info rtw8852a_ch - &rtw89_8852a_phy_radiob_table,}, - .nctl_table = &rtw89_8852a_phy_nctl_table, - .byr_table = &rtw89_8852a_byr_table, -- .txpwr_lmt_2g = &rtw89_8852a_txpwr_lmt_2g, -- .txpwr_lmt_5g = &rtw89_8852a_txpwr_lmt_5g, -- .txpwr_lmt_ru_2g = &rtw89_8852a_txpwr_lmt_ru_2g, -- .txpwr_lmt_ru_5g = &rtw89_8852a_txpwr_lmt_ru_5g, -+ .dflt_parms = &rtw89_8852a_dflt_parms, -+ .rfe_parms_conf = NULL, - .txpwr_factor_rf = 2, - .txpwr_factor_mac = 1, - .dig_table = &rtw89_8852a_phy_dig_table, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a_table.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a_table.c -@@ -43377,6 +43377,7 @@ static const s8 _txpwr_track_delta_swing - 0, 1, 1, 1, 2, 2, 2, 3, 3, 3, 4, 4, 4, 5, 5, 5, - 6, 6, 6, 7, 7, 7, 8, 8, 8, 9, 9, 9, 10, 10}; - -+static - const s8 rtw89_8852a_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM] - [RTW89_RS_LMT_NUM][RTW89_BF_NUM] - [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = { -@@ -45566,6 +45567,7 @@ const s8 rtw89_8852a_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_UK][13] = 127, - }; - -+static - const s8 rtw89_8852a_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM] - [RTW89_RS_LMT_NUM][RTW89_BF_NUM] - [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = { -@@ -47898,6 +47900,7 @@ const s8 rtw89_8852a_txpwr_lmt_5g[RTW89_ - [2][1][2][1][RTW89_UK][41] = 40, - }; - -+static - const s8 rtw89_8852a_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM] - [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = { - [0][0][RTW89_WW][0] = 32, -@@ -48994,6 +48997,7 @@ const s8 rtw89_8852a_txpwr_lmt_ru_2g[RTW - [2][1][RTW89_UK][13] = 127, - }; - -+static - const s8 rtw89_8852a_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM] - [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = { - [0][0][RTW89_WW][0] = 22, -@@ -51043,3 +51047,14 @@ const struct rtw89_phy_dig_gain_table rt - .cfg_lna_a = &rtw89_8852a_lna_gain_a_table, - .cfg_tia_a = &rtw89_8852a_tia_gain_a_table - }; -+ -+const struct rtw89_rfe_parms rtw89_8852a_dflt_parms = { -+ .rule_2ghz = { -+ .lmt = &rtw89_8852a_txpwr_lmt_2g, -+ .lmt_ru = &rtw89_8852a_txpwr_lmt_ru_2g, -+ }, -+ .rule_5ghz = { -+ .lmt = &rtw89_8852a_txpwr_lmt_5g, -+ .lmt_ru = &rtw89_8852a_txpwr_lmt_ru_5g, -+ }, -+}; ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a_table.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a_table.h -@@ -14,15 +14,6 @@ extern const struct rtw89_phy_table rtw8 - extern const struct rtw89_txpwr_table rtw89_8852a_byr_table; - extern const struct rtw89_phy_dig_gain_table rtw89_8852a_phy_dig_table; - extern const struct rtw89_txpwr_track_cfg rtw89_8852a_trk_cfg; --extern const s8 rtw89_8852a_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM] -- [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -- [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; --extern const s8 rtw89_8852a_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM] -- [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -- [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; --extern const s8 rtw89_8852a_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM] -- [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; --extern const s8 rtw89_8852a_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM] -- [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; -+extern const struct rtw89_rfe_parms rtw89_8852a_dflt_parms; - - #endif ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2506,10 +2506,8 @@ const struct rtw89_chip_info rtw8852b_ch - &rtw89_8852b_phy_radiob_table,}, - .nctl_table = &rtw89_8852b_phy_nctl_table, - .byr_table = &rtw89_8852b_byr_table, -- .txpwr_lmt_2g = &rtw89_8852b_txpwr_lmt_2g, -- .txpwr_lmt_5g = &rtw89_8852b_txpwr_lmt_5g, -- .txpwr_lmt_ru_2g = &rtw89_8852b_txpwr_lmt_ru_2g, -- .txpwr_lmt_ru_5g = &rtw89_8852b_txpwr_lmt_ru_5g, -+ .dflt_parms = &rtw89_8852b_dflt_parms, -+ .rfe_parms_conf = NULL, - .txpwr_factor_rf = 2, - .txpwr_factor_mac = 1, - .dig_table = NULL, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_table.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_table.c -@@ -14706,6 +14706,7 @@ const u8 rtw89_8852b_tx_shape[RTW89_BAND - [1][1][RTW89_UKRAINE] = 0, - }; - -+static - const s8 rtw89_8852b_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM] - [RTW89_RS_LMT_NUM][RTW89_BF_NUM] - [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = { -@@ -16895,6 +16896,7 @@ const s8 rtw89_8852b_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_UK][13] = 127, - }; - -+static - const s8 rtw89_8852b_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM] - [RTW89_RS_LMT_NUM][RTW89_BF_NUM] - [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = { -@@ -19539,6 +19541,7 @@ const s8 rtw89_8852b_txpwr_lmt_5g[RTW89_ - [2][1][2][1][RTW89_UK][49] = 127, - }; - -+static - const s8 rtw89_8852b_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM] - [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = { - [0][0][RTW89_WW][0] = 32, -@@ -20635,6 +20638,7 @@ const s8 rtw89_8852b_txpwr_lmt_ru_2g[RTW - [2][1][RTW89_UK][13] = 127, - }; - -+static - const s8 rtw89_8852b_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM] - [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = { - [0][0][RTW89_WW][0] = 24, -@@ -22875,3 +22879,14 @@ const struct rtw89_txpwr_track_cfg rtw89 - .delta_swingidx_2g_cck_a_n = _txpwr_track_delta_swingidx_2g_cck_a_n, - .delta_swingidx_2g_cck_a_p = _txpwr_track_delta_swingidx_2g_cck_a_p, - }; -+ -+const struct rtw89_rfe_parms rtw89_8852b_dflt_parms = { -+ .rule_2ghz = { -+ .lmt = &rtw89_8852b_txpwr_lmt_2g, -+ .lmt_ru = &rtw89_8852b_txpwr_lmt_ru_2g, -+ }, -+ .rule_5ghz = { -+ .lmt = &rtw89_8852b_txpwr_lmt_5g, -+ .lmt_ru = &rtw89_8852b_txpwr_lmt_ru_5g, -+ }, -+}; ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_table.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_table.h -@@ -16,15 +16,6 @@ extern const struct rtw89_txpwr_table rt - extern const struct rtw89_txpwr_track_cfg rtw89_8852b_trk_cfg; - extern const u8 rtw89_8852b_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM] - [RTW89_REGD_NUM]; --extern const s8 rtw89_8852b_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM] -- [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -- [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; --extern const s8 rtw89_8852b_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM] -- [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -- [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; --extern const s8 rtw89_8852b_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM] -- [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; --extern const s8 rtw89_8852b_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM] -- [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; -+extern const struct rtw89_rfe_parms rtw89_8852b_dflt_parms; - - #endif ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2817,12 +2817,8 @@ const struct rtw89_chip_info rtw8852c_ch - &rtw89_8852c_phy_radioa_table,}, - .nctl_table = &rtw89_8852c_phy_nctl_table, - .byr_table = &rtw89_8852c_byr_table, -- .txpwr_lmt_2g = &rtw89_8852c_txpwr_lmt_2g, -- .txpwr_lmt_5g = &rtw89_8852c_txpwr_lmt_5g, -- .txpwr_lmt_6g = &rtw89_8852c_txpwr_lmt_6g, -- .txpwr_lmt_ru_2g = &rtw89_8852c_txpwr_lmt_ru_2g, -- .txpwr_lmt_ru_5g = &rtw89_8852c_txpwr_lmt_ru_5g, -- .txpwr_lmt_ru_6g = &rtw89_8852c_txpwr_lmt_ru_6g, -+ .dflt_parms = &rtw89_8852c_dflt_parms, -+ .rfe_parms_conf = NULL, - .txpwr_factor_rf = 2, - .txpwr_factor_mac = 1, - .dig_table = NULL, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c -@@ -28590,6 +28590,7 @@ const u8 rtw89_8852c_tx_shape[RTW89_BAND - [2][1][RTW89_KCC] = 0, - }; - -+static - const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM] - [RTW89_RS_LMT_NUM][RTW89_BF_NUM] - [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = { -@@ -30107,6 +30108,7 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_UK][13] = 127, - }; - -+static - const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM] - [RTW89_RS_LMT_NUM][RTW89_BF_NUM] - [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = { -@@ -32020,6 +32022,7 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [3][1][2][1][RTW89_UK][45] = 127, - }; - -+static - const s8 rtw89_8852c_txpwr_lmt_6g[RTW89_6G_BW_NUM][RTW89_NTX_NUM] - [RTW89_RS_LMT_NUM][RTW89_BF_NUM] - [RTW89_REGD_NUM][RTW89_6G_CH_NUM] = { -@@ -33977,6 +33980,7 @@ const s8 rtw89_8852c_txpwr_lmt_6g[RTW89_ - [3][1][2][1][RTW89_KCC][112] = 127, - }; - -+static - const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM] - [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = { - [0][0][RTW89_WW][0] = 32, -@@ -34737,6 +34741,7 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [2][1][RTW89_UK][13] = 127, - }; - -+static - const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM] - [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = { - [0][0][RTW89_WW][0] = 16, -@@ -36253,6 +36258,7 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [2][1][RTW89_UK][52] = 127, - }; - -+static - const s8 rtw89_8852c_txpwr_lmt_ru_6g[RTW89_RU_NUM][RTW89_NTX_NUM] - [RTW89_REGD_NUM][RTW89_6G_CH_NUM] = { - [0][0][RTW89_WW][0] = -16, -@@ -37472,3 +37478,18 @@ const struct rtw89_phy_tssi_dbw_table rt - .data[RTW89_TSSI_BANDEDGE_MID] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - .data[RTW89_TSSI_BANDEDGE_HIGH] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, - }; -+ -+const struct rtw89_rfe_parms rtw89_8852c_dflt_parms = { -+ .rule_2ghz = { -+ .lmt = &rtw89_8852c_txpwr_lmt_2g, -+ .lmt_ru = &rtw89_8852c_txpwr_lmt_ru_2g, -+ }, -+ .rule_5ghz = { -+ .lmt = &rtw89_8852c_txpwr_lmt_5g, -+ .lmt_ru = &rtw89_8852c_txpwr_lmt_ru_5g, -+ }, -+ .rule_6ghz = { -+ .lmt = &rtw89_8852c_txpwr_lmt_6g, -+ .lmt_ru = &rtw89_8852c_txpwr_lmt_ru_6g, -+ }, -+}; ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_table.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_table.h -@@ -17,20 +17,6 @@ extern const struct rtw89_phy_tssi_dbw_t - extern const struct rtw89_txpwr_track_cfg rtw89_8852c_trk_cfg; - extern const u8 rtw89_8852c_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM] - [RTW89_REGD_NUM]; --extern const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM] -- [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -- [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; --extern const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM] -- [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -- [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; --extern const s8 rtw89_8852c_txpwr_lmt_6g[RTW89_6G_BW_NUM][RTW89_NTX_NUM] -- [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -- [RTW89_REGD_NUM][RTW89_6G_CH_NUM]; --extern const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM] -- [RTW89_REGD_NUM][RTW89_2G_CH_NUM]; --extern const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM] -- [RTW89_REGD_NUM][RTW89_5G_CH_NUM]; --extern const s8 rtw89_8852c_txpwr_lmt_ru_6g[RTW89_RU_NUM][RTW89_NTX_NUM] -- [RTW89_REGD_NUM][RTW89_6G_CH_NUM]; -+extern const struct rtw89_rfe_parms rtw89_8852c_dflt_parms; - - #endif diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-038-wifi-rtw89-use-hardware-CFO-to-improve-performance.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-038-wifi-rtw89-use-hardware-CFO-to-improve-performance.patch deleted file mode 100644 index 1616f5b48..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-038-wifi-rtw89-use-hardware-CFO-to-improve-performance.patch +++ /dev/null @@ -1,169 +0,0 @@ -From 9f9882dbe2eecdb27f5f3832f215679747f94d8f Mon Sep 17 00:00:00 2001 -From: Eric Huang -Date: Thu, 30 Mar 2023 21:23:52 +0800 -Subject: [PATCH 038/136] wifi: rtw89: use hardware CFO to improve performance - -Turn on hardware CFO (central frequency offset) compensation based on IC -capability, and improve digital CFO compensation accuracy by using -more fixed points number. - -Signed-off-by: Eric Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230330132352.13647-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 3 ++ - drivers/net/wireless/realtek/rtw89/phy.c | 28 +++++++++++++------ - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 3 +- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 3 +- - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 3 +- - 5 files changed, 29 insertions(+), 11 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3202,6 +3202,7 @@ struct rtw89_chip_info { - struct rtw89_reg_def c2h_counter_reg; - const struct rtw89_page_regs *page_regs; - bool cfo_src_fd; -+ bool cfo_hw_comp; - const struct rtw89_reg_def *dcfo_comp; - u8 dcfo_comp_sft; - const struct rtw89_imr_info *imr_info; -@@ -3684,6 +3685,8 @@ struct rtw89_cfo_tracking_info { - s32 cfo_avg_pre; - s32 cfo_avg[CFO_TRACK_MAX_USER]; - s32 pre_cfo_avg[CFO_TRACK_MAX_USER]; -+ s32 dcfo_avg; -+ s32 dcfo_avg_pre; - u32 packet_count; - u32 packet_count_pre; - s32 residual_cfo_acc; ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -2417,7 +2417,6 @@ static void rtw89_dcfo_comp(struct rtw89 - bool is_linked = rtwdev->total_sta_assoc > 0; - s32 cfo_avg_312; - s32 dcfo_comp_val; -- u8 dcfo_comp_sft = rtwdev->chip->dcfo_comp_sft; - int sign; - - if (!is_linked) { -@@ -2430,8 +2429,8 @@ static void rtw89_dcfo_comp(struct rtw89 - return; - dcfo_comp_val = rtw89_phy_read32_mask(rtwdev, R_DCFO, B_DCFO); - sign = curr_cfo > 0 ? 1 : -1; -- cfo_avg_312 = (curr_cfo << dcfo_comp_sft) / 5 + sign * dcfo_comp_val; -- rtw89_debug(rtwdev, RTW89_DBG_CFO, "DCFO: avg_cfo=%d\n", cfo_avg_312); -+ cfo_avg_312 = curr_cfo / 625 + sign * dcfo_comp_val; -+ rtw89_debug(rtwdev, RTW89_DBG_CFO, "avg_cfo_312=%d step\n", cfo_avg_312); - if (rtwdev->chip->chip_id == RTL8852A && rtwdev->hal.cv == CHIP_CBV) - cfo_avg_312 = -cfo_avg_312; - rtw89_phy_set_phy_regs(rtwdev, dcfo_comp->addr, dcfo_comp->mask, -@@ -2440,9 +2439,16 @@ static void rtw89_dcfo_comp(struct rtw89 - - static void rtw89_dcfo_comp_init(struct rtw89_dev *rtwdev) - { -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ - rtw89_phy_set_phy_regs(rtwdev, R_DCFO_OPT, B_DCFO_OPT_EN, 1); - rtw89_phy_set_phy_regs(rtwdev, R_DCFO_WEIGHT, B_DCFO_WEIGHT_MSK, 8); -- rtw89_write32_clr(rtwdev, R_AX_PWR_UL_CTRL2, B_AX_PWR_UL_CFO_MASK); -+ -+ if (chip->cfo_hw_comp) -+ rtw89_write32_mask(rtwdev, R_AX_PWR_UL_CTRL2, -+ B_AX_PWR_UL_CFO_MASK, 0x6); -+ else -+ rtw89_write32_clr(rtwdev, R_AX_PWR_UL_CTRL2, B_AX_PWR_UL_CFO_MASK); - } - - static void rtw89_phy_cfo_init(struct rtw89_dev *rtwdev) -@@ -2512,6 +2518,7 @@ static void rtw89_phy_cfo_crystal_cap_ad - - static s32 rtw89_phy_average_cfo_calc(struct rtw89_dev *rtwdev) - { -+ const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_cfo_tracking_info *cfo = &rtwdev->cfo_tracking; - s32 cfo_khz_all = 0; - s32 cfo_cnt_all = 0; -@@ -2528,6 +2535,8 @@ static s32 rtw89_phy_average_cfo_calc(st - cfo_cnt_all += cfo->cfo_cnt[i]; - cfo_all_avg = phy_div(cfo_khz_all, cfo_cnt_all); - cfo->pre_cfo_avg[i] = cfo->cfo_avg[i]; -+ cfo->dcfo_avg = phy_div(cfo_khz_all << chip->dcfo_comp_sft, -+ cfo_cnt_all); - } - rtw89_debug(rtwdev, RTW89_DBG_CFO, - "CFO track for macid = %d\n", i); -@@ -2654,7 +2663,9 @@ static void rtw89_phy_cfo_dm(struct rtw8 - s32 new_cfo = 0; - bool x_cap_update = false; - u8 pre_x_cap = cfo->crystal_cap; -+ u8 dcfo_comp_sft = rtwdev->chip->dcfo_comp_sft; - -+ cfo->dcfo_avg = 0; - rtw89_debug(rtwdev, RTW89_DBG_CFO, "CFO:total_sta_assoc=%d\n", - rtwdev->total_sta_assoc); - if (rtwdev->total_sta_assoc == 0) { -@@ -2696,18 +2707,19 @@ static void rtw89_phy_cfo_dm(struct rtw8 - - rtw89_phy_cfo_crystal_cap_adjust(rtwdev, new_cfo); - cfo->cfo_avg_pre = new_cfo; -+ cfo->dcfo_avg_pre = cfo->dcfo_avg; - x_cap_update = cfo->crystal_cap != pre_x_cap; - rtw89_debug(rtwdev, RTW89_DBG_CFO, "Xcap_up=%d\n", x_cap_update); - rtw89_debug(rtwdev, RTW89_DBG_CFO, "Xcap: D:%x C:%x->%x, ofst=%d\n", - cfo->def_x_cap, pre_x_cap, cfo->crystal_cap, - cfo->x_cap_ofst); - if (x_cap_update) { -- if (new_cfo > 0) -- new_cfo -= CFO_SW_COMP_FINE_TUNE; -+ if (cfo->dcfo_avg > 0) -+ cfo->dcfo_avg -= CFO_SW_COMP_FINE_TUNE << dcfo_comp_sft; - else -- new_cfo += CFO_SW_COMP_FINE_TUNE; -+ cfo->dcfo_avg += CFO_SW_COMP_FINE_TUNE << dcfo_comp_sft; - } -- rtw89_dcfo_comp(rtwdev, new_cfo); -+ rtw89_dcfo_comp(rtwdev, cfo->dcfo_avg); - rtw89_phy_cfo_statistics_reset(rtwdev); - } - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -2147,8 +2147,9 @@ const struct rtw89_chip_info rtw8852a_ch - .c2h_counter_reg = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_C2H_ENQ_CNT_MASK >> 8}, - .page_regs = &rtw8852a_page_regs, - .cfo_src_fd = false, -+ .cfo_hw_comp = false, - .dcfo_comp = &rtw8852a_dcfo_comp, -- .dcfo_comp_sft = 3, -+ .dcfo_comp_sft = 10, - .imr_info = &rtw8852a_imr_info, - .rrsr_cfgs = &rtw8852a_rrsr_cfgs, - .bss_clr_map_reg = R_BSS_CLR_MAP, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2568,8 +2568,9 @@ const struct rtw89_chip_info rtw8852b_ch - .c2h_regs = rtw8852b_c2h_regs, - .page_regs = &rtw8852b_page_regs, - .cfo_src_fd = true, -+ .cfo_hw_comp = true, - .dcfo_comp = &rtw8852b_dcfo_comp, -- .dcfo_comp_sft = 3, -+ .dcfo_comp_sft = 10, - .imr_info = &rtw8852b_imr_info, - .rrsr_cfgs = &rtw8852b_rrsr_cfgs, - .bss_clr_map_reg = R_BSS_CLR_MAP_V1, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2881,8 +2881,9 @@ const struct rtw89_chip_info rtw8852c_ch - .c2h_regs = rtw8852c_c2h_regs, - .page_regs = &rtw8852c_page_regs, - .cfo_src_fd = false, -+ .cfo_hw_comp = false, - .dcfo_comp = &rtw8852c_dcfo_comp, -- .dcfo_comp_sft = 5, -+ .dcfo_comp_sft = 12, - .imr_info = &rtw8852c_imr_info, - .rrsr_cfgs = &rtw8852c_rrsr_cfgs, - .bss_clr_map_reg = R_BSS_CLR_MAP, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-039-wifi-rtw89-read-version-of-analog-hardware.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-039-wifi-rtw89-read-version-of-analog-hardware.patch deleted file mode 100644 index d151f45f7..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-039-wifi-rtw89-read-version-of-analog-hardware.patch +++ /dev/null @@ -1,72 +0,0 @@ -From a6fb2bb84654dde55fab94251c9119b6917d098d Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Thu, 30 Mar 2023 21:33:21 +0800 -Subject: [PATCH 039/136] wifi: rtw89: read version of analog hardware - -The chip contains digital and analog parts, and each of them has its own -version number. This is used by BT coexistence mechanism to make strategy -decision for different analog version. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230330133324.19538-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 10 ++++++++++ - drivers/net/wireless/realtek/rtw89/core.h | 2 ++ - drivers/net/wireless/realtek/rtw89/mac.h | 1 + - 3 files changed, 13 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -3535,6 +3535,8 @@ void rtw89_core_scan_complete(struct rtw - static void rtw89_read_chip_ver(struct rtw89_dev *rtwdev) - { - const struct rtw89_chip_info *chip = rtwdev->chip; -+ int ret; -+ u8 val; - u8 cv; - - cv = rtw89_read32_mask(rtwdev, R_AX_SYS_CFG1, B_AX_CHIP_VER_MASK); -@@ -3546,6 +3548,14 @@ static void rtw89_read_chip_ver(struct r - } - - rtwdev->hal.cv = cv; -+ -+ if (chip->chip_id == RTL8852B || chip->chip_id == RTL8851B) { -+ ret = rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_CV, &val); -+ if (!ret) -+ return; -+ -+ rtwdev->hal.acv = u8_get_bits(val, XTAL_SI_ACV_MASK); -+ } - } - - static void rtw89_core_setup_phycap(struct rtw89_dev *rtwdev) ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -108,6 +108,7 @@ enum rtw89_core_chip_id { - RTL8852A, - RTL8852B, - RTL8852C, -+ RTL8851B, - }; - - enum rtw89_cv { -@@ -3412,6 +3413,7 @@ struct rtw89_sub_entity { - struct rtw89_hal { - u32 rx_fltr; - u8 cv; -+ u8 acv; - u32 sw_amsdu_max_size; - u32 antenna_tx; - u32 antenna_rx; ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -1117,6 +1117,7 @@ enum rtw89_mac_xtal_si_offset { - XTAL_SI_XTAL_XMD_4 = 0x26, - #define XTAL_SI_LPS_CAP GENMASK(3, 0) - XTAL_SI_CV = 0x41, -+#define XTAL_SI_ACV_MASK GENMASK(3, 0) - XTAL_SI_LOW_ADDR = 0x62, - #define XTAL_SI_LOW_ADDR_MASK GENMASK(7, 0) - XTAL_SI_CTRL = 0x63, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-040-wifi-rtw89-8851b-fix-TX-path-to-path-A-for-one-RF-pa.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-040-wifi-rtw89-8851b-fix-TX-path-to-path-A-for-one-RF-pa.patch deleted file mode 100644 index 965d0f8b7..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-040-wifi-rtw89-8851b-fix-TX-path-to-path-A-for-one-RF-pa.patch +++ /dev/null @@ -1,40 +0,0 @@ -From d5289b2d69a777d24686d7ee8264a55761dc9f93 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Thu, 30 Mar 2023 21:33:22 +0800 -Subject: [PATCH 040/136] wifi: rtw89: 8851b: fix TX path to path A for one RF - path chip - -For two RF paths chips, we normally set path B as main path by default. -8851B has single one RF path, so set TX path to A and set mapping of -path B to 0. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230330133324.19538-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 13 +++++++++++-- - 1 file changed, 11 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -1161,9 +1161,18 @@ fail: - static void __rtw89_fw_h2c_set_tx_path(struct rtw89_dev *rtwdev, - struct sk_buff *skb) - { -+ const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_hal *hal = &rtwdev->hal; -- u8 ntx_path = hal->antenna_tx ? hal->antenna_tx : RF_B; -- u8 map_b = hal->antenna_tx == RF_AB ? 1 : 0; -+ u8 ntx_path; -+ u8 map_b; -+ -+ if (chip->rf_path_num == 1) { -+ ntx_path = RF_A; -+ map_b = 0; -+ } else { -+ ntx_path = hal->antenna_tx ? hal->antenna_tx : RF_B; -+ map_b = hal->antenna_tx == RF_AB ? 1 : 0; -+ } - - SET_CMC_TBL_NTX_PATH_EN(skb->data, ntx_path); - SET_CMC_TBL_PATH_MAP_A(skb->data, 0); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-041-wifi-rtw89-mac-update-MAC-settings-to-support-8851b.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-041-wifi-rtw89-mac-update-MAC-settings-to-support-8851b.patch deleted file mode 100644 index ce67cdbc3..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-041-wifi-rtw89-mac-update-MAC-settings-to-support-8851b.patch +++ /dev/null @@ -1,143 +0,0 @@ -From 5c3afcba545cc820ba7911cecdf3abb05ea5e0df Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Thu, 30 Mar 2023 21:33:23 +0800 -Subject: [PATCH 041/136] wifi: rtw89: mac: update MAC settings to support - 8851b - -Many settings of 8851B are the same as 8852B or 8852A, like DLE (Data link -engine), security engine and so on. Update them according to hardware -design. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230330133324.19538-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.c | 44 +++++++++++++++++------- - drivers/net/wireless/realtek/rtw89/reg.h | 2 ++ - 2 files changed, 33 insertions(+), 13 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -1584,12 +1584,15 @@ static void dle_func_en(struct rtw89_dev - - static void dle_clk_en(struct rtw89_dev *rtwdev, bool enable) - { -- if (enable) -- rtw89_write32_set(rtwdev, R_AX_DMAC_CLK_EN, -- B_AX_DLE_WDE_CLK_EN | B_AX_DLE_PLE_CLK_EN); -- else -- rtw89_write32_clr(rtwdev, R_AX_DMAC_CLK_EN, -- B_AX_DLE_WDE_CLK_EN | B_AX_DLE_PLE_CLK_EN); -+ u32 val = B_AX_DLE_WDE_CLK_EN | B_AX_DLE_PLE_CLK_EN; -+ -+ if (enable) { -+ if (rtwdev->chip->chip_id == RTL8851B) -+ val |= B_AX_AXIDMA_CLK_EN; -+ rtw89_write32_set(rtwdev, R_AX_DMAC_CLK_EN, val); -+ } else { -+ rtw89_write32_clr(rtwdev, R_AX_DMAC_CLK_EN, val); -+ } - } - - static int dle_mix_cfg(struct rtw89_dev *rtwdev, const struct rtw89_dle_mem *cfg) -@@ -1854,7 +1857,8 @@ static int preload_init(struct rtw89_dev - { - const struct rtw89_chip_info *chip = rtwdev->chip; - -- if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B || !is_qta_poh(rtwdev)) -+ if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B || -+ chip->chip_id == RTL8851B || !is_qta_poh(rtwdev)) - return 0; - - return preload_init_set(rtwdev, mac_idx, mode); -@@ -1890,7 +1894,8 @@ static void _patch_ss2f_path(struct rtw8 - { - const struct rtw89_chip_info *chip = rtwdev->chip; - -- if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B) -+ if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B || -+ chip->chip_id == RTL8851B) - return; - - rtw89_write32_mask(rtwdev, R_AX_SS2FINFO_PATH, B_AX_SS_DEST_QUEUE_MASK, -@@ -1959,7 +1964,8 @@ static int sec_eng_init(struct rtw89_dev - /* init TX encryption */ - val |= (B_AX_SEC_TX_ENC | B_AX_SEC_RX_DEC); - val |= (B_AX_MC_DEC | B_AX_BC_DEC); -- if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B) -+ if (chip->chip_id == RTL8852A || chip->chip_id == RTL8852B || -+ chip->chip_id == RTL8851B) - val &= ~B_AX_TX_PARTIAL_MODE; - rtw89_write32(rtwdev, R_AX_SEC_ENG_CTRL, val); - -@@ -2065,7 +2071,7 @@ static int scheduler_init(struct rtw89_d - rtw89_write32_mask(rtwdev, reg, B_AX_SIFS_MACTXEN_T1_MASK, - SIFS_MACTXEN_T1); - -- if (rtwdev->chip->chip_id == RTL8852B) { -+ if (rtwdev->chip->chip_id == RTL8852B || rtwdev->chip->chip_id == RTL8851B) { - reg = rtw89_mac_reg_by_idx(R_AX_SCH_EXT_CTRL, mac_idx); - rtw89_write32_set(rtwdev, reg, B_AX_PORT_RST_TSF_ADV); - } -@@ -3364,8 +3370,15 @@ static int rtw89_mac_trx_init(struct rtw - - static void rtw89_disable_fw_watchdog(struct rtw89_dev *rtwdev) - { -+ enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; - u32 val32; - -+ if (chip_id == RTL8852B || chip_id == RTL8851B) { -+ rtw89_write32_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_APB_WRAP_EN); -+ rtw89_write32_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_APB_WRAP_EN); -+ return; -+ } -+ - rtw89_mac_mem_write(rtwdev, R_AX_WDT_CTRL, - WDT_CTRL_ALL_DIS, RTW89_MAC_MEM_CPU_LOCAL); - -@@ -3450,7 +3463,10 @@ static int rtw89_mac_dmac_pre_init(struc - B_AX_PKT_BUF_EN; - rtw89_write32(rtwdev, R_AX_DMAC_FUNC_EN, val); - -- val = B_AX_DISPATCHER_CLK_EN; -+ if (chip_id == RTL8851B) -+ val = B_AX_DISPATCHER_CLK_EN | B_AX_AXIDMA_CLK_EN; -+ else -+ val = B_AX_DISPATCHER_CLK_EN; - rtw89_write32(rtwdev, R_AX_DMAC_CLK_EN, val); - - if (chip_id != RTL8852C) -@@ -4691,11 +4707,13 @@ int rtw89_mac_coex_init(struct rtw89_dev - int ret; - - rtw89_write8_set(rtwdev, R_AX_GPIO_MUXCFG, B_AX_ENBT); -- rtw89_write8_set(rtwdev, R_AX_BTC_FUNC_EN, B_AX_PTA_WL_TX_EN); -+ if (rtwdev->chip->chip_id != RTL8851B) -+ rtw89_write8_set(rtwdev, R_AX_BTC_FUNC_EN, B_AX_PTA_WL_TX_EN); - rtw89_write8_set(rtwdev, R_AX_BT_COEX_CFG_2 + 1, B_AX_GNT_BT_POLARITY >> 8); - rtw89_write8_set(rtwdev, R_AX_CSR_MODE, B_AX_STATIS_BT_EN | B_AX_WL_ACT_MSK); - rtw89_write8_set(rtwdev, R_AX_CSR_MODE + 2, B_AX_BT_CNT_RST >> 16); -- rtw89_write8_clr(rtwdev, R_AX_TRXPTCL_RESP_0 + 3, B_AX_RSP_CHK_BTCCA >> 24); -+ if (rtwdev->chip->chip_id != RTL8851B) -+ rtw89_write8_clr(rtwdev, R_AX_TRXPTCL_RESP_0 + 3, B_AX_RSP_CHK_BTCCA >> 24); - - val16 = rtw89_read16(rtwdev, R_AX_CCA_CFG_0); - val16 = (val16 | B_AX_BTCCA_EN) & ~B_AX_BTCCA_BRK_TXOP_EN; ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -129,6 +129,7 @@ - - #define R_AX_PLATFORM_ENABLE 0x0088 - #define B_AX_AXIDMA_EN BIT(3) -+#define B_AX_APB_WRAP_EN BIT(2) - #define B_AX_WCPU_EN BIT(1) - #define B_AX_PLATFORM_EN BIT(0) - -@@ -488,6 +489,7 @@ - #define B_AX_DISPATCHER_CLK_EN BIT(18) - #define B_AX_BBRPT_CLK_EN BIT(17) - #define B_AX_MAC_SEC_CLK_EN BIT(16) -+#define B_AX_AXIDMA_CLK_EN BIT(9) - - #define PCI_LTR_IDLE_TIMER_1US 0 - #define PCI_LTR_IDLE_TIMER_10US 1 diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-042-wifi-rtw89-pci-update-PCI-related-settings-to-suppor.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-042-wifi-rtw89-pci-update-PCI-related-settings-to-suppor.patch deleted file mode 100644 index 2aa603d3e..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-042-wifi-rtw89-pci-update-PCI-related-settings-to-suppor.patch +++ /dev/null @@ -1,136 +0,0 @@ -From 2a6d518dedcbc8dc6e666c1a68700945bca174b8 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Thu, 30 Mar 2023 21:33:24 +0800 -Subject: [PATCH 042/136] wifi: rtw89: pci: update PCI related settings to - support 8851B - -Many settings of 8851B are like 8852A or 8852B. Change them to proper -settings as hardware design. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230330133324.19538-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/pci.c | 33 +++++++++++++++--------- - 1 file changed, 21 insertions(+), 12 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/pci.c -+++ b/drivers/net/wireless/realtek/rtw89/pci.c -@@ -1917,9 +1917,10 @@ __get_target(struct rtw89_dev *rtwdev, u - - static int rtw89_pci_autok_x(struct rtw89_dev *rtwdev) - { -+ enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; - int ret; - -- if (rtwdev->chip->chip_id != RTL8852B) -+ if (chip_id != RTL8852B && chip_id != RTL8851B) - return 0; - - ret = rtw89_write16_mdio_mask(rtwdev, RAC_REG_FLD_0, BAC_AUTOK_N_MASK, -@@ -1929,13 +1930,14 @@ static int rtw89_pci_autok_x(struct rtw8 - - static int rtw89_pci_auto_refclk_cal(struct rtw89_dev *rtwdev, bool autook_en) - { -+ enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; - enum rtw89_pcie_phy phy_rate; - u16 val16, mgn_set, div_set, tar; - u8 val8, bdr_ori; - bool l1_flag = false; - int ret = 0; - -- if (rtwdev->chip->chip_id != RTL8852B) -+ if (chip_id != RTL8852B && chip_id != RTL8851B) - return 0; - - ret = rtw89_pci_read_config_byte(rtwdev, RTW89_PCIE_PHY_RATE, &val8); -@@ -2112,7 +2114,9 @@ static void rtw89_pci_rxdma_prefth(struc - - static void rtw89_pci_l1off_pwroff(struct rtw89_dev *rtwdev) - { -- if (rtwdev->chip->chip_id != RTL8852A && rtwdev->chip->chip_id != RTL8852B) -+ enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; -+ -+ if (chip_id != RTL8852A && chip_id != RTL8852B && chip_id != RTL8851B) - return; - - rtw89_write32_clr(rtwdev, R_AX_PCIE_PS_CTRL, B_AX_L1OFF_PWR_OFF_EN); -@@ -2140,7 +2144,9 @@ static u32 rtw89_pci_l2_rxen_lat(struct - - static void rtw89_pci_aphy_pwrcut(struct rtw89_dev *rtwdev) - { -- if (rtwdev->chip->chip_id != RTL8852A && rtwdev->chip->chip_id != RTL8852B) -+ enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; -+ -+ if (chip_id != RTL8852A && chip_id != RTL8852B && chip_id != RTL8851B) - return; - - rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_PSUS_OFF_CAPC_EN); -@@ -2148,8 +2154,9 @@ static void rtw89_pci_aphy_pwrcut(struct - - static void rtw89_pci_hci_ldo(struct rtw89_dev *rtwdev) - { -- if (rtwdev->chip->chip_id == RTL8852A || -- rtwdev->chip->chip_id == RTL8852B) { -+ enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; -+ -+ if (chip_id == RTL8852A || chip_id == RTL8852B || chip_id == RTL8851B) { - rtw89_write32_set(rtwdev, R_AX_SYS_SDIO_CTRL, - B_AX_PCIE_DIS_L2_CTRL_LDO_HCI); - rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, -@@ -2162,7 +2169,9 @@ static void rtw89_pci_hci_ldo(struct rtw - - static int rtw89_pci_dphy_delay(struct rtw89_dev *rtwdev) - { -- if (rtwdev->chip->chip_id != RTL8852B) -+ enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; -+ -+ if (chip_id != RTL8852B && chip_id != RTL8851B) - return 0; - - return rtw89_write16_mdio_mask(rtwdev, RAC_REG_REV2, BAC_CMU_EN_DLY_MASK, -@@ -3402,7 +3411,7 @@ static void rtw89_pci_clkreq_set(struct - if (ret) - rtw89_err(rtwdev, "failed to set CLKREQ Delay\n"); - -- if (chip_id == RTL8852A || chip_id == RTL8852B) { -+ if (chip_id == RTL8852A || chip_id == RTL8852B || chip_id == RTL8851B) { - if (enable) - ret = rtw89_pci_config_byte_set(rtwdev, - RTW89_PCIE_L1_CTRL, -@@ -3447,7 +3456,7 @@ static void rtw89_pci_aspm_set(struct rt - if (ret) - rtw89_err(rtwdev, "failed to read ASPM Delay\n"); - -- if (chip_id == RTL8852A || chip_id == RTL8852B) { -+ if (chip_id == RTL8852A || chip_id == RTL8852B || chip_id == RTL8851B) { - if (enable) - ret = rtw89_pci_config_byte_set(rtwdev, - RTW89_PCIE_L1_CTRL, -@@ -3527,7 +3536,7 @@ static void rtw89_pci_l1ss_set(struct rt - enum rtw89_core_chip_id chip_id = rtwdev->chip->chip_id; - int ret; - -- if (chip_id == RTL8852A || chip_id == RTL8852B) { -+ if (chip_id == RTL8852A || chip_id == RTL8852B || chip_id == RTL8851B) { - if (enable) - ret = rtw89_pci_config_byte_set(rtwdev, - RTW89_PCIE_TIMER_CTRL, -@@ -3726,7 +3735,7 @@ static int __maybe_unused rtw89_pci_susp - rtw89_write32_set(rtwdev, R_AX_RSV_CTRL, B_AX_WLOCK_1C_BIT6); - rtw89_write32_set(rtwdev, R_AX_RSV_CTRL, B_AX_R_DIS_PRST); - rtw89_write32_clr(rtwdev, R_AX_RSV_CTRL, B_AX_WLOCK_1C_BIT6); -- if (chip_id == RTL8852A || chip_id == RTL8852B) { -+ if (chip_id == RTL8852A || chip_id == RTL8852B || chip_id == RTL8851B) { - rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, - B_AX_PCIE_DIS_L2_CTRL_LDO_HCI); - rtw89_write32_set(rtwdev, R_AX_PCIE_INIT_CFG1, -@@ -3760,7 +3769,7 @@ static int __maybe_unused rtw89_pci_resu - rtw89_write32_set(rtwdev, R_AX_RSV_CTRL, B_AX_WLOCK_1C_BIT6); - rtw89_write32_clr(rtwdev, R_AX_RSV_CTRL, B_AX_R_DIS_PRST); - rtw89_write32_clr(rtwdev, R_AX_RSV_CTRL, B_AX_WLOCK_1C_BIT6); -- if (chip_id == RTL8852A || chip_id == RTL8852B) { -+ if (chip_id == RTL8852A || chip_id == RTL8852B || chip_id == RTL8851B) { - rtw89_write32_set(rtwdev, R_AX_SYS_SDIO_CTRL, - B_AX_PCIE_DIS_L2_CTRL_LDO_HCI); - rtw89_write32_clr(rtwdev, R_AX_PCIE_INIT_CFG1, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-043-wifi-rtw89-8851b-add-BB-and-RF-tables-1-of-2.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-043-wifi-rtw89-8851b-add-BB-and-RF-tables-1-of-2.patch deleted file mode 100644 index 944a083a6..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-043-wifi-rtw89-8851b-add-BB-and-RF-tables-1-of-2.patch +++ /dev/null @@ -1,6819 +0,0 @@ -From 108bdaaa8bc7eafa2cf4aa3b883fdadca0d2ce45 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sat, 1 Apr 2023 22:25:46 +0800 -Subject: [PATCH 043/136] wifi: rtw89: 8851b: add BB and RF tables (1 of 2) - -These tables contain BB and RF parameters that driver will load them into -registers. It also contains TX power according to country, band, rate and -so on. Increasing thermal can cause TX power degraded, so power tracking -tables are defined to compensate TX power. - -Internal version of these tables: - - HALBB_029_106_15 (V17) - - HALRF_029_00_089 - * Radio A 0x22 - * NCTL 0x5 - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230401142548.55466-2-pkshih@realtek.com ---- - .../wireless/realtek/rtw89/rtw8851b_table.c | 6766 +++++++++++++++++ - .../wireless/realtek/rtw89/rtw8851b_table.h | 21 + - 2 files changed, 6787 insertions(+) - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8851b_table.c - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8851b_table.h - ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_table.c -@@ -0,0 +1,6766 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2022-2023 Realtek Corporation -+ */ -+ -+#include "phy.h" -+#include "reg.h" -+#include "rtw8851b_table.h" -+ -+static const struct rtw89_reg2_def rtw89_8851b_phy_bb_regs[] = { -+ {0x704, 0x601E0500}, -+ {0x4000, 0x00000000}, -+ {0x4004, 0xCA014000}, -+ {0x4008, 0xC751D4F0}, -+ {0x400C, 0x44511475}, -+ {0x4010, 0x00000000}, -+ {0x4014, 0x00000000}, -+ {0x47BC, 0x00000380}, -+ {0x4018, 0x4F4C084B}, -+ {0x401C, 0x084A4E52}, -+ {0x4020, 0x4D504E4B}, -+ {0x4024, 0x4F4C0849}, -+ {0x4028, 0x08484C50}, -+ {0x402C, 0x4C50504C}, -+ {0x4030, 0x5454084A}, -+ {0x4034, 0x084B5654}, -+ {0x4038, 0x6A6C605A}, -+ {0x403C, 0x4C4C084C}, -+ {0x4040, 0x084B4E4D}, -+ {0x4044, 0x4E4C4B4B}, -+ {0x4048, 0x4B4B084A}, -+ {0x404C, 0x084A4E4C}, -+ {0x4050, 0x514F4C4A}, -+ {0x4054, 0x524E084A}, -+ {0x4058, 0x084A5154}, -+ {0x405C, 0x53555554}, -+ {0x4060, 0x45450845}, -+ {0x4064, 0x08454144}, -+ {0x4068, 0x40434445}, -+ {0x406C, 0x44450845}, -+ {0x4070, 0x08444043}, -+ {0x4074, 0x42434444}, -+ {0x4078, 0x46450844}, -+ {0x407C, 0x08444843}, -+ {0x4080, 0x4B4E4A47}, -+ {0x4084, 0x4F4C084B}, -+ {0x4088, 0x084A4E52}, -+ {0x408C, 0x4D504E4B}, -+ {0x4090, 0x4F4C0849}, -+ {0x4094, 0x08484C50}, -+ {0x4098, 0x4C50504C}, -+ {0x409C, 0x5454084A}, -+ {0x40A0, 0x084B5654}, -+ {0x40A4, 0x6A6C605A}, -+ {0x40A8, 0x4C4C084C}, -+ {0x40AC, 0x084B4E4D}, -+ {0x40B0, 0x4E4C4B4B}, -+ {0x40B4, 0x4B4B084A}, -+ {0x40B8, 0x084A4E4C}, -+ {0x40BC, 0x514F4C4A}, -+ {0x40C0, 0x524E084A}, -+ {0x40C4, 0x084A5154}, -+ {0x40C8, 0x53555554}, -+ {0x40CC, 0x45450845}, -+ {0x40D0, 0x08454144}, -+ {0x40D4, 0x40434445}, -+ {0x40D8, 0x44450845}, -+ {0x40DC, 0x08444043}, -+ {0x40E0, 0x42434444}, -+ {0x40E4, 0x46450844}, -+ {0x40E8, 0x08444843}, -+ {0x40EC, 0x4B4E4A47}, -+ {0x40F0, 0x00000000}, -+ {0x4A38, 0x00000000}, -+ {0x40F4, 0x00000006}, -+ {0x40F8, 0x00000000}, -+ {0x40FC, 0x8C30C30C}, -+ {0x4100, 0x4C30C30C}, -+ {0x4104, 0x0C30C30C}, -+ {0x4108, 0x0C30C30C}, -+ {0x410C, 0x0C30C30C}, -+ {0x4110, 0x0C30C30C}, -+ {0x4114, 0x28A28A28}, -+ {0x4118, 0x28A28A28}, -+ {0x411C, 0x28A28A28}, -+ {0x4120, 0x28A28A28}, -+ {0x4124, 0x28A28A28}, -+ {0x4128, 0x28A28A28}, -+ {0x412C, 0x06666666}, -+ {0x4130, 0x33333333}, -+ {0x4134, 0x33333333}, -+ {0x4138, 0x33333333}, -+ {0x413C, 0x00000031}, -+ {0x4140, 0x5100600A}, -+ {0x4144, 0x18363113}, -+ {0x4148, 0x1D976DDC}, -+ {0x414C, 0x1C072DD7}, -+ {0x4150, 0x1127CDF4}, -+ {0x4154, 0x1E37BDF1}, -+ {0x4158, 0x1FB7F1D6}, -+ {0x415C, 0x1EA7DDF9}, -+ {0x4160, 0x1FE445DD}, -+ {0x4164, 0x1F97F1FE}, -+ {0x4168, 0x1FF781ED}, -+ {0x416C, 0x1FA7F5FE}, -+ {0x4170, 0x1E07B913}, -+ {0x4174, 0x1FD7FDFF}, -+ {0x4178, 0x1E17B9FA}, -+ {0x417C, 0x19A66914}, -+ {0x4180, 0x10F65598}, -+ {0x4184, 0x14A5A111}, -+ {0x4188, 0x1D3765DB}, -+ {0x418C, 0x17C685CA}, -+ {0x4190, 0x1107C5F3}, -+ {0x4194, 0x1B5785EB}, -+ {0x4198, 0x1F97ED8F}, -+ {0x419C, 0x1BC7A5F3}, -+ {0x41A0, 0x1FE43595}, -+ {0x41A4, 0x1EB7D9FC}, -+ {0x41A8, 0x1FE65DBE}, -+ {0x41AC, 0x1EC7D9FC}, -+ {0x41B0, 0x1976FCFF}, -+ {0x41B4, 0x1F77F5FF}, -+ {0x41B8, 0x1976FDEC}, -+ {0x41BC, 0x198664EF}, -+ {0x41C0, 0x11062D93}, -+ {0x41C4, 0x10C4E910}, -+ {0x41C8, 0x1CA759DB}, -+ {0x41CC, 0x1335A9B5}, -+ {0x41D0, 0x1097B9F3}, -+ {0x41D4, 0x17B72DE1}, -+ {0x41D8, 0x1F67ED42}, -+ {0x41DC, 0x18074DE9}, -+ {0x41E0, 0x1FD40547}, -+ {0x41E4, 0x1D57ADF9}, -+ {0x41E8, 0x1FE52182}, -+ {0x41EC, 0x1D67B1F9}, -+ {0x41F0, 0x14860CE1}, -+ {0x41F4, 0x1EC7E9FE}, -+ {0x41F8, 0x14860DD6}, -+ {0x41FC, 0x195664C7}, -+ {0x4200, 0x0005E58A}, -+ {0x4204, 0x00000000}, -+ {0x4208, 0x00000000}, -+ {0x420C, 0x7A000000}, -+ {0x4210, 0x0F9F3D7A}, -+ {0x4214, 0x0040817C}, -+ {0x4218, 0x00E10204}, -+ {0x421C, 0x227D94CD}, -+ {0x4220, 0x08028A28}, -+ {0x4224, 0x00000200}, -+ {0x4228, 0x04688000}, -+ {0x47C0, 0x00000001}, -+ {0x4A48, 0x00000002}, -+ {0x4B04, 0x00000000}, -+ {0x4B08, 0x00000000}, -+ {0x422C, 0x0060B002}, -+ {0x4230, 0x9A8249A8}, -+ {0x4234, 0x26A1469E}, -+ {0x4238, 0x2099A824}, -+ {0x423C, 0x2359461C}, -+ {0x4240, 0x1631A675}, -+ {0x4244, 0x2C6B1D63}, -+ {0x4248, 0x0000000E}, -+ {0x424C, 0x00000001}, -+ {0x4250, 0x00000001}, -+ {0x4254, 0x00000000}, -+ {0x4258, 0x00000000}, -+ {0x425C, 0x00000000}, -+ {0x4260, 0x0020000C}, -+ {0x4A30, 0x00000000}, -+ {0x4264, 0x00000000}, -+ {0x4268, 0x00000000}, -+ {0x426C, 0x0418317C}, -+ {0x4270, 0x2B33135C}, -+ {0x4274, 0x00000002}, -+ {0x4278, 0x00000000}, -+ {0x427C, 0x00000000}, -+ {0x4280, 0x00000000}, -+ {0x4284, 0x00000000}, -+ {0x4288, 0x00000000}, -+ {0x428C, 0x00000000}, -+ {0x4290, 0x00000000}, -+ {0x4294, 0x00000000}, -+ {0x4298, 0x00000000}, -+ {0x429C, 0x84026000}, -+ {0x42A0, 0x0051AC20}, -+ {0x4A24, 0x0010C040}, -+ {0x42A4, 0x02024008}, -+ {0x42A8, 0x00000000}, -+ {0x42AC, 0x00000000}, -+ {0x42B0, 0x22CE803C}, -+ {0x42B4, 0xD8000000}, -+ {0x42B8, 0x596FD67E}, -+ {0x42BC, 0x7D67D67D}, -+ {0x42C0, 0x7D67D65B}, -+ {0x42C4, 0x28029F59}, -+ {0x42C8, 0x00280280}, -+ {0x4AF4, 0x00000000}, -+ {0x42CC, 0x00000000}, -+ {0x42D0, 0x00000000}, -+ {0x42D4, 0x00000003}, -+ {0x4AF8, 0x00280000}, -+ {0x42D8, 0x00000001}, -+ {0x42DC, 0x69AEC800}, -+ {0x42E0, 0x8B4CD3D1}, -+ {0x42E4, 0xC514534F}, -+ {0x42E8, 0x85145145}, -+ {0x42EC, 0x45145145}, -+ {0x42F0, 0x05145145}, -+ {0x42F4, 0x05145145}, -+ {0x42F8, 0x05145145}, -+ {0x42FC, 0x17659145}, -+ {0x4300, 0x176DD5D9}, -+ {0x4304, 0x0F65765B}, -+ {0x4308, 0x0F3CF3CF}, -+ {0x430C, 0x0F3CF3CF}, -+ {0x4310, 0x0F3CF3CF}, -+ {0x4314, 0x0F3CF3CF}, -+ {0x4318, 0x0F3CF3CF}, -+ {0x431C, 0x0F3CF3CF}, -+ {0x4320, 0x0F3CF3CF}, -+ {0x4324, 0x0F44F351}, -+ {0x4328, 0x192D7547}, -+ {0x432C, 0x0F5CF5CF}, -+ {0x4330, 0x051593D9}, -+ {0x4334, 0x05145145}, -+ {0x4338, 0x05145145}, -+ {0x433C, 0x05145145}, -+ {0x4340, 0x05145145}, -+ {0x4344, 0x05145145}, -+ {0x4348, 0x19545145}, -+ {0x434C, 0x1B65B5DB}, -+ {0x4350, 0x1965965B}, -+ {0x4354, 0x0F3CF3CF}, -+ {0x4358, 0x0F3CF3CF}, -+ {0x435C, 0x0F3CF1CF}, -+ {0x4360, 0x0F3CF3CF}, -+ {0x4364, 0x0F3CF3CF}, -+ {0x4368, 0x0F3CF3CF}, -+ {0x436C, 0x0F3CF3CF}, -+ {0x4370, 0x0934D2CF}, -+ {0x4374, 0x112CB3CF}, -+ {0x4378, 0x9777A777}, -+ {0x437C, 0xBB7BAC95}, -+ {0x4380, 0xB667B889}, -+ {0x4384, 0x7B9B8899}, -+ {0x4388, 0x7A5567C8}, -+ {0x438C, 0x2278CCCC}, -+ {0x4390, 0x7C222222}, -+ {0x4394, 0x0000029B}, -+ {0x4398, 0x001CCCCC}, -+ {0x4AAC, 0xCCCCC88C}, -+ {0x4AB0, 0x0000AACC}, -+ {0x439C, 0x00000000}, -+ {0x43A0, 0x00000008}, -+ {0x43A4, 0x00000000}, -+ {0x43A8, 0x00000000}, -+ {0x43AC, 0x00000000}, -+ {0x43B0, 0x10000000}, -+ {0x43B4, 0x00401001}, -+ {0x43B8, 0x00061003}, -+ {0x43BC, 0x000024D8}, -+ {0x43C0, 0x00000000}, -+ {0x43C4, 0x10000020}, -+ {0x43C8, 0x20000200}, -+ {0x43CC, 0x00000000}, -+ {0x43D0, 0x04000000}, -+ {0x43D4, 0x44000100}, -+ {0x43D8, 0x60804060}, -+ {0x43DC, 0x44204210}, -+ {0x43E0, 0x82108082}, -+ {0x43E4, 0x82108402}, -+ {0x43E8, 0xC8082108}, -+ {0x43EC, 0xC8202084}, -+ {0x43F0, 0x44208208}, -+ {0x43F4, 0x84108204}, -+ {0x43F8, 0xD0108104}, -+ {0x43FC, 0xF8210108}, -+ {0x4400, 0x6431E930}, -+ {0x4404, 0x02309468}, -+ {0x4408, 0x10C61C22}, -+ {0x440C, 0x02109469}, -+ {0x4410, 0x10C61C22}, -+ {0x4414, 0x00041049}, -+ {0x4A4C, 0x00060581}, -+ {0x4418, 0x00000000}, -+ {0x441C, 0x00000000}, -+ {0x4420, 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0x02704800}, -+ {0x4CB8, 0x02704812}, -+ {0x4CBC, 0x00004827}, -+ {0x4CC0, 0x01209C12}, -+ {0x4CC4, 0x00000012}, -+ {0x4CC8, 0x02718000}, -+ {0x4CCC, 0x02709C60}, -+ {0x4CD0, 0x00000027}, -+ {0x4CD4, 0x00000000}, -+ {0x4CD8, 0x0000014A}, -+ {0x994, 0x00000010}, -+ {0x904, 0x00000005}, -+ {0x708, 0x00000000}, -+ {0x884, 0x0043F01D}, -+ {0x710, 0xEF810000}, -+ {0x718, 0x1333233F}, -+ {0x604, 0x041E1E1E}, -+ {0x714, 0x00010000}, -+ {0x586C, 0x000000F0}, -+ {0x586C, 0x000000E0}, -+ {0x586C, 0x000000D0}, -+ {0x586C, 0x000000C0}, -+ {0x586C, 0x000000B0}, -+ {0x586C, 0x000000A0}, -+ {0x586C, 0x00000090}, -+ {0x586C, 0x00000080}, -+ {0x586C, 0x00000070}, -+ {0x586C, 0x00000060}, -+ {0x586C, 0x00000050}, -+ {0x586C, 0x00000040}, -+ {0x586C, 0x00000030}, -+ {0x586C, 0x00000020}, -+ {0x586C, 0x00000010}, -+ {0x586C, 0x00000000}, -+ {0xC0D4, 0xABA41460}, -+ {0xC0D8, 0xC43A7E87}, -+ {0xC0DC, 0x30C194B8}, -+ {0xC0E0, 0x75008138}, -+ {0xC0E4, 0x0000272B}, -+ {0xC0E8, 0x000A0C81}, -+ {0xC0EC, 0x00030003}, -+ {0xC0F0, 0x00000024}, -+ {0xC0C4, 0x005E3A00}, -+ {0xC004, 0x45800000}, -+ {0xC024, 0x45800000}, -+ {0x334, 0xFFFFFFFF}, -+ {0x33C, 0x55000000}, -+ {0x340, 0x00005555}, -+ {0x724, 0x00111200}, -+ {0x5868, 0xA9550000}, -+ {0x5870, 0x33221100}, -+ {0x5874, 0x77665544}, -+ {0x5878, 0xBBAA9988}, -+ {0x587C, 0xFFEEDDCC}, -+ {0x5880, 0x76543210}, -+ {0x5884, 0xFEDCBA98}, -+ {0x5888, 0x00000000}, -+ {0x588C, 0x00000000}, -+ {0x5894, 0x00000008}, -+ {0x650, 0x00200888}, -+ {0x710, 0xF3810000}, -+ {0x020, 0x0000F381}, -+ {0x024, 0x0000F381}, -+ {0x000, 0xC580801E}, -+ {0x980, 0x10002250}, -+ {0x988, 0x3C3C4107}, -+ {0x994, 0x00000010}, -+ {0x000, 0x0580801F}, -+ {0x240C, 0x00000000}, -+ {0x640, 0x210A141E}, -+ {0x640, 0x2114141E}, -+ {0x640, 0x2114141E}, -+ {0x644, 0x3414283C}, -+ {0x644, 0x3425283C}, -+ {0x644, 0x3426283C}, -+ {0x2640, 0x140A141E}, -+ {0x2640, 0x1414141E}, -+ {0x2640, 0x1414141E}, -+ {0x2644, 0x3414283C}, -+ {0x2644, 0x3425283C}, -+ {0x2644, 0x3425183C}, -+ {0x2300, 0x02748790}, -+ {0x2304, 0x00558670}, -+ {0x2308, 0x002883F0}, -+ {0x230C, 0x00090120}, -+ {0x2310, 0x00000000}, -+ {0x2314, 0x06000000}, -+ {0x2318, 0x00000000}, -+ {0x231C, 0x00000000}, -+ {0x2320, 0x03020100}, -+ {0x2324, 0x07060504}, -+ {0x2328, 0x0B0A0908}, -+ {0x232C, 0x0F0E0D0C}, -+ {0x2330, 0x13121110}, -+ {0x2334, 0x17161514}, -+ {0x2338, 0x0C700022}, -+ {0x233C, 0x0A0529D0}, -+ {0x2340, 0x000529D0}, -+ {0x2344, 0x0006318A}, -+ {0x2348, 0xB7E6318A}, -+ {0x234C, 0x80039C00}, -+ {0x2350, 0x80039C00}, -+ {0x2354, 0x0005298F}, -+ {0x2358, 0x0015296E}, -+ {0x235C, 0x0C07FC31}, -+ {0x2360, 0x0219AAAE}, -+ {0x2364, 0xE4F624C3}, -+ {0x2368, 0x53626F15}, -+ {0x236C, 0x48000000}, -+ {0x2370, 0x48000000}, -+ {0x2374, 0x07540000}, -+ {0x2378, 0x202401B9}, -+ {0x237C, 0x00F7000E}, -+ {0x2380, 0x0F0A1111}, -+ {0x2384, 0x30D9000F}, -+ {0x2388, 0x0200EA02}, -+ {0x238C, 0x003CB061}, -+ {0x2390, 0x69C00000}, -+ {0x2394, 0x00000000}, -+ {0x2398, 0x000000F0}, -+ {0x239C, 0x0001FFFF}, -+ {0x23A0, 0x00C80064}, -+ {0x23A4, 0x0190012C}, -+ {0x23A8, 0x001917BE}, -+ {0x23AC, 0x0B30880C}, -+ {0x23B0, 0x9281CE00}, -+ {0x23B4, 0x7F027C00}, -+ {0x704, 0x601E0502}, -+ {0x5600, 0x00000000}, -+ {0x5604, 0x802D2721}, -+ {0x5610, 0x00201020}, -+ {0x5618, 0x00801008}, -+ {0x5624, 0x0808081E}, -+ {0x562C, 0x0000081D}, -+ {0x5634, 0x3D2EE000}, -+ {0x5638, 0x0001AC42}, -+ {0x5640, 0x3D6EF000}, -+ {0x5644, 0x0001AC3E}, -+ {0x566C, 0x00210005}, -+ {0x5680, 0x20500010}, -+ {0x5684, 0x00020001}, -+ {0x56A0, 0x0034C000}, -+ {0x56BC, 0x04000000}, -+ {0x56C0, 0x00000688}, -+ {0x56C4, 0x00000010}, -+ {0x56C8, 0x0E800400}, -+ {0x56CC, 0x01E400FF}, -+ {0x5800, 0x003F807F}, -+ {0x5810, 0x59008400}, -+ {0x5814, 0x201AF000}, -+ {0x5818, 0x182C18E8}, -+ {0x581C, 0x3DD80280}, -+ {0x5820, 0x80000080}, -+ {0x5828, 0x023F8121}, -+ {0x5830, 0x023F8121}, -+ {0x5838, 0x003F8121}, -+ {0x5840, 0x023F8121}, -+ {0x5848, 0x023F8121}, -+ {0x5850, 0x023F8121}, -+ {0x5858, 0x003F7121}, -+ {0x5860, 0x023F7121}, -+ {0x5864, 0x1A1801FF}, -+ {0x5868, 0xA9A90002}, -+ {0x5880, 0x77777777}, -+ {0x5884, 0x77777777}, -+ {0x5894, 0x01080604}, -+ {0x5898, 0x00000000}, -+ {0x589C, 0x00000000}, -+ {0x58A0, 0x000000FE}, -+ {0x58B0, 0x00000800}, -+ {0x58BC, 0x07A7807F}, -+ {0x58C0, 0x007E0000}, -+ {0x58C4, 0x0003FFFF}, -+ {0x58D4, 0x7401FE00}, -+ {0x58D8, 0x8008016C}, -+ {0x58DC, 0xC000807F}, -+ {0x58E4, 0x3000881F}, -+ {0x58E8, 0x00000003}, -+ {0x58F0, 0x400401FF}, -+ {0x58F4, 0x80000000}, -+ {0x58F8, 0xC0000000}, -+ {0x58FC, 0x00000000}, -+ {0x700, 0x40000030}, -+ {0x704, 0x601E0502}, -+ {0x704, 0x601E0500}, -+ {0x704, 0x601E0502}, -+ {0x20FC, 0x00000000}, -+ {0x20F8, 0x00000000}, -+ {0x20F0, 0x00000000}, -+ {0x9C0, 0x00000001}, -+ {0x9C0, 0x00000000}, -+ {0x9C0, 0x00000001}, -+ {0x9C0, 0x00000000}, -+ {0x4AE8, 0x00000744}, -+ {0x4AD4, 0x00000040}, -+ {0x4AE4, 0x0079E99E}, -+ {0x4BC8, 0xFBD5B89F}, -+ {0x4BCC, 0x99563918}, -+ {0x4BD0, 0x12EED5B8}, -+ {0x4BD4, 0x6F7D542F}, -+ {0x4BD8, 0x0000001D}, -+ {0x300, 0xF30CE31C}, -+ {0x304, 0x13EF1F19}, -+ {0x308, 0x0C0CF3F3}, -+ {0x30C, 0x0CE30C0C}, -+ {0x310, 0x80496000}, -+ {0x314, 0x0041E000}, -+ {0x318, 0x20022042}, -+ {0x31C, 0x20448009}, -+ {0x320, 0x00010031}, -+ {0x324, 0xE000E000}, -+ {0x328, 0xE000E000}, -+ {0x32C, 0xE0008049}, -+ {0x12BC, 0x10104041}, -+ {0x12C0, 0x13311111}, -+ {0x12E4, 0x30D52A68}, -+ {0x010, 0x0005FFFF}, -+ {0x028, 0x0000F381}, -+ {0x02C, 0x0000F381}, -+ {0x620, 0x00141230}, -+ {0x70C, 0x00000020}, -+ {0x720, 0x20000000}, -+ {0x730, 0x00000002}, -+ {0x738, 0x004100C0}, -+ {0x73C, 0x00000002}, -+ {0x748, 0x01000002}, -+ {0x74C, 0x00000001}, -+ {0xA08, 0x00007800}, -+ {0xC14, 0x25010000}, -+ {0xC3C, 0x2840E1BF}, -+ {0xC40, 0x00000000}, -+ {0xC44, 0x00000007}, -+ {0xC48, 0x410E4000}, -+ {0xC54, 0x1EE14368}, -+ {0xC58, 0x41000000}, -+ {0xC5C, 0x80558000}, -+ {0xC60, 0x017FFFF2}, -+ {0xC64, 0x0010A130}, -+ {0xC68, 0x90000050}, -+ {0xC6C, 0x10201021}, -+ {0xC70, 0x071B0660}, -+ {0xC74, 0x00000000}, -+ {0xC78, 0x80000000}, -+ {0xC7C, 0x0020BFE0}, -+ {0xC88, 0xC2AC8000}, -+ {0xC8C, 0x02F2FC08}, -+ {0xD00, 0x77777777}, -+ {0xD04, 0xBBBBBBBB}, -+ {0xD08, 0xBBBBBBBB}, -+ {0xD0C, 0x000B2070}, -+ {0xD10, 0x20110FFF}, -+ {0xD18, 0x50009800}, -+ {0xD20, 0x01900000}, -+ {0xD30, 0x03FF8000}, -+ {0xD40, 0xF64FA0F7}, -+ {0xD44, 0x0401463F}, -+ {0xD48, 0x0003FF7F}, -+ {0xD4C, 0x00000000}, -+ {0xD50, 0xF64FA0F7}, -+ {0xD54, 0x04100437}, -+ {0xD58, 0x0000FF7F}, -+ {0xD5C, 0x00000000}, -+ {0xD60, 0x00000000}, -+ {0xD64, 0x00000000}, -+ {0xD70, 0x00000015}, -+ {0xD78, 0x00000001}, -+ {0xD7C, 0x001D050E}, -+ {0xD80, 0x00000100}, -+ {0xD84, 0x00006607}, -+ {0xD90, 0x000003FF}, -+ {0xD94, 0x00000000}, -+ {0xD98, 0x0000003F}, -+ {0xD9C, 0x00000000}, -+ {0xDA0, 0x000003FE}, -+ {0xDA4, 0x00000000}, -+ {0xDA8, 0x0000003F}, -+ {0xDAC, 0x00000000}, -+ {0xDD4, 0x00000000}, -+ {0x1010, 0x00000000}, -+ {0x2000, 0x50BBBF04}, -+ {0x2008, 0x000FFFFF}, -+ {0x5800, 0x03FF807F}, -+ {0x5804, 0x04237040}, -+ {0x5808, 0x04237040}, -+ {0x5818, 0x082C1800}, -+ {0x624, 0x0101030A}, -+ {0x241C, 0x00000001}, -+ {0xC0F8, 0x00000001}, -+ {0x35C, 0x000004C4}, -+ {0x1200, 0x00010142}, -+ {0x120C, 0x00012233}, -+ {0x1210, 0x8049E304}, -+ {0x12A0, 0x49107056}, -+ {0x12A8, 0x33337025}, -+ {0x12AC, 0x12333121}, -+ {0x12B8, 0x30020000}, -+ {0x0F0, 0x00000001}, -+ {0x0F4, 0x00000011}, -+ {0x0F8, 0x20230307}, -+}; -+ -+static const struct rtw89_reg2_def rtw89_8851b_phy_bb_reg_gain[] = { -+ {0xF00100FF, 0x00000000}, -+ {0xF00200FF, 0x00000001}, -+ {0xF00300FF, 0x00000002}, -+ {0xF00400FF, 0x00000003}, -+ {0xF00500FF, 0x00000004}, -+ {0xF00600FF, 0x00000005}, -+ {0x800100ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x000, 0x13F6D7B6}, -+ {0x001, 0x00725132}, -+ {0x002, 0x00005A38}, -+ {0x900200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x000, 0x13F6D7B6}, -+ {0x001, 0x00725132}, -+ {0x002, 0x00005A38}, -+ {0x900300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x000, 0x13F6D7B6}, -+ {0x001, 0x00725132}, -+ {0x002, 0x00005A38}, -+ {0x900400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x000, 0x19FADCBC}, -+ {0x001, 0x007A5A3A}, -+ {0x002, 0x00005838}, -+ {0x900500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x000, 0x19FADCBC}, -+ {0x001, 0x007A5A3A}, -+ {0x002, 0x00005838}, -+ {0x900600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x000, 0x19FADCBC}, -+ {0x001, 0x007A5A3A}, -+ {0x002, 0x00005838}, -+ {0xA0000000, 0x00000000}, -+ {0x000, 0x13F6D7B6}, -+ {0x001, 0x00725132}, -+ {0x002, 0x00005A38}, -+ {0xB0000000, 0x00000000}, -+ {0x800100ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x100, 0x1BFEE0B7}, -+ {0x101, 0x006C5238}, -+ {0x102, 0x00005031}, -+ {0x900200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x100, 0x1BFEE0B7}, -+ {0x101, 0x006C5238}, -+ {0x102, 0x00005031}, -+ {0x900300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x100, 0x1BFEE0B7}, -+ {0x101, 0x006C5238}, -+ {0x102, 0x00005031}, -+ {0x900400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x100, 0x1BFEE0B7}, -+ {0x101, 0x006C5238}, -+ {0x102, 0x00005031}, -+ {0x900500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x100, 0x1BFEE0B7}, -+ {0x101, 0x006C5238}, -+ {0x102, 0x00005031}, -+ {0x900600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x100, 0x1BFEE0B7}, -+ {0x101, 0x006C5238}, -+ {0x102, 0x00005031}, -+ {0xA0000000, 0x00000000}, -+ {0x100, 0x1BFEE0B7}, -+ {0x101, 0x006C5238}, -+ {0x102, 0x00005031}, -+ {0xB0000000, 0x00000000}, -+ {0x800100ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10000, 0x19F8D8C1}, -+ {0x10001, 0x006F4F31}, -+ {0x10002, 0x00006F58}, -+ {0x900200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10000, 0x19F8D8C1}, -+ {0x10001, 0x006F4F31}, -+ {0x10002, 0x00006F58}, -+ {0x900300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10000, 0x19F8D8C1}, -+ {0x10001, 0x006F4F31}, -+ {0x10002, 0x00006F58}, -+ {0x900400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10000, 0x1DF8DAC1}, -+ {0x10001, 0x00755437}, -+ {0x10002, 0x00007058}, -+ {0x900500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10000, 0x1DF8DAC1}, -+ {0x10001, 0x00755437}, -+ {0x10002, 0x00007058}, -+ {0x900600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10000, 0x1DF8DAC1}, -+ {0x10001, 0x00755437}, -+ {0x10002, 0x00007058}, -+ {0xA0000000, 0x00000000}, -+ {0x10000, 0x19F8D8C1}, -+ {0x10001, 0x006F4F31}, -+ {0x10002, 0x00006F58}, -+ {0xB0000000, 0x00000000}, -+ {0x800100ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10100, 0x09E9C69F}, -+ {0x10101, 0x00674627}, -+ {0x10102, 0x00006750}, -+ {0x900200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10100, 0x09E9C69F}, -+ {0x10101, 0x00674627}, -+ {0x10102, 0x00006750}, -+ {0x900300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10100, 0x09E9C69F}, -+ {0x10101, 0x00674627}, -+ {0x10102, 0x00006750}, -+ {0x900400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10100, 0x09E9C69F}, -+ {0x10101, 0x00674627}, -+ {0x10102, 0x00006750}, -+ {0x900500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10100, 0x09E9C69F}, -+ {0x10101, 0x00674627}, -+ {0x10102, 0x00006750}, -+ {0x900600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10100, 0x09E9C69F}, -+ {0x10101, 0x00674627}, -+ {0x10102, 0x00006750}, -+ {0xA0000000, 0x00000000}, -+ {0x10100, 0x09E9C69F}, -+ {0x10101, 0x00674627}, -+ {0x10102, 0x00006750}, -+ {0xB0000000, 0x00000000}, -+ {0x800100ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x20000, 0x1AF0D2B8}, -+ {0x20001, 0x00755334}, -+ {0x20002, 0x00006F58}, -+ {0x900200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x20000, 0x1AF0D2B8}, -+ {0x20001, 0x00755334}, -+ {0x20002, 0x00006F58}, -+ {0x900300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x20000, 0x1AF0D2B8}, -+ {0x20001, 0x00755334}, -+ {0x20002, 0x00006F58}, -+ {0x900400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x20000, 0x1D00E2C8}, -+ {0x20001, 0x00775336}, -+ {0x20002, 0x00006D58}, -+ {0x900500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x20000, 0x1D00E2C8}, -+ {0x20001, 0x00775336}, -+ {0x20002, 0x00006D58}, -+ {0x900600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x20000, 0x1D00E2C8}, -+ {0x20001, 0x00775336}, -+ {0x20002, 0x00006D58}, -+ {0xA0000000, 0x00000000}, -+ {0x20000, 0x1AF0D2B8}, -+ {0x20001, 0x00755334}, -+ {0x20002, 0x00006F58}, -+ {0xB0000000, 0x00000000}, -+ {0x800100ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x20100, 0x07E9C6A0}, -+ {0x20101, 0x00674728}, -+ {0x20102, 0x00006850}, -+ {0x900200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x20100, 0x07E9C6A0}, -+ {0x20101, 0x00674728}, -+ {0x20102, 0x00006850}, -+ {0x900300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x20100, 0x07E9C6A0}, -+ {0x20101, 0x00674728}, -+ {0x20102, 0x00006850}, -+ {0x900400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x20100, 0x07E9C6A0}, -+ {0x20101, 0x00674728}, -+ {0x20102, 0x00006850}, -+ {0x900500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x20100, 0x07E9C6A0}, -+ {0x20101, 0x00674728}, -+ {0x20102, 0x00006850}, -+ {0x900600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x20100, 0x07E9C6A0}, -+ {0x20101, 0x00674728}, -+ {0x20102, 0x00006850}, -+ {0xA0000000, 0x00000000}, -+ {0x20100, 0x07E9C6A0}, -+ {0x20101, 0x00674728}, -+ {0x20102, 0x00006850}, -+ {0xB0000000, 0x00000000}, -+ {0x800100ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x30000, 0x15EED2B6}, -+ {0x30001, 0x006F4D2F}, -+ {0x30002, 0x00006F58}, -+ {0x900200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x30000, 0x15EED2B6}, -+ {0x30001, 0x006F4D2F}, -+ {0x30002, 0x00006F58}, -+ {0x900300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x30000, 0x15EED2B6}, -+ {0x30001, 0x006F4D2F}, -+ {0x30002, 0x00006F58}, -+ {0x900400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x30000, 0x1F00E2C6}, -+ {0x30001, 0x00795739}, -+ {0x30002, 0x00006F58}, -+ {0x900500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x30000, 0x1F00E2C6}, -+ {0x30001, 0x00795739}, -+ {0x30002, 0x00006F58}, -+ {0x900600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x30000, 0x1F00E2C6}, -+ {0x30001, 0x00795739}, -+ {0x30002, 0x00006F58}, -+ {0xA0000000, 0x00000000}, -+ {0x30000, 0x15EED2B6}, -+ {0x30001, 0x006F4D2F}, -+ {0x30002, 0x00006F58}, -+ {0xB0000000, 0x00000000}, -+ {0x800100ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x30100, 0x06E9C69F}, -+ {0x30101, 0x00654527}, -+ {0x30102, 0x00006750}, -+ {0x900200ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x30100, 0x06E9C69F}, -+ {0x30101, 0x00654527}, -+ {0x30102, 0x00006750}, -+ {0x900300ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x30100, 0x06E9C69F}, -+ {0x30101, 0x00654527}, -+ {0x30102, 0x00006750}, -+ {0x900400ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x30100, 0x06E9C69F}, -+ {0x30101, 0x00654527}, -+ {0x30102, 0x00006750}, -+ {0x900500ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x30100, 0x06E9C69F}, -+ {0x30101, 0x00654527}, -+ {0x30102, 0x00006750}, -+ {0x900600ff, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x30100, 0x06E9C69F}, -+ {0x30101, 0x00654527}, -+ {0x30102, 0x00006750}, -+ {0xA0000000, 0x00000000}, -+ {0x30100, 0x06E9C69F}, -+ {0x30101, 0x00654527}, -+ {0x30102, 0x00006750}, -+ {0xB0000000, 0x00000000}, -+ {0x1000000, 0x000000F4}, -+ {0x1000010, 0x000000F8}, -+ {0x1000011, 0x0000F8F8}, -+ {0x1000100, 0x000000F8}, -+ {0x1000110, 0x00000000}, -+ {0x1000111, 0x00000000}, -+ {0x1010000, 0x000000F4}, -+ {0x1010010, 0x000000F8}, -+ {0x1010011, 0x0000F8F8}, -+ {0x1010020, 0x000000F8}, -+ {0x1010021, 0x0808E8E8}, -+ {0x1010029, 0x0000F8F8}, -+ {0x1010100, 0x000000F4}, -+ {0x1010110, 0x000000F8}, -+ {0x1010111, 0x0000F8F8}, -+ {0x1010120, 0x000000F8}, -+ {0x1010121, 0x0808E8E8}, -+ {0x1010129, 0x0000F8F8}, -+ {0x1020000, 0x000000F4}, -+ {0x1020010, 0x000000F8}, -+ {0x1020011, 0x0000F8F8}, -+ {0x1020020, 0x000000F8}, -+ {0x1020021, 0x0808E8E8}, -+ {0x1020029, 0x0000F8F8}, -+ {0x1020100, 0x000000F4}, -+ {0x1020110, 0x000000F8}, -+ {0x1020111, 0x0000F8F8}, -+ {0x1020120, 0x000000F8}, -+ {0x1020121, 0x0808E8E8}, -+ {0x1020129, 0x0000F8F8}, -+ {0x1030000, 0x000000F4}, -+ {0x1030010, 0x000000F8}, -+ {0x1030011, 0x0000F8F8}, -+ {0x1030020, 0x000000F8}, -+ {0x1030021, 0x0808E8E8}, -+ {0x1030029, 0x0000F8F8}, -+ {0x1030100, 0x000000F4}, -+ {0x1030110, 0x000000F8}, -+ {0x1030111, 0x0000F8F8}, -+ {0x1030120, 0x000000F8}, -+ {0x1030121, 0x0808E8E8}, -+ {0x1030129, 0x0000F8F8}, -+}; -+ -+static const struct rtw89_reg2_def rtw89_8851b_phy_radioa_regs[] = { -+ {0xF0010000, 0x00000000}, -+ {0xF0020000, 0x00000001}, -+ {0xF0030000, 0x00000002}, -+ {0x000, 0x00030000}, -+ {0x018, 0x00013124}, -+ {0x0EF, 0x00080000}, -+ {0x033, 0x00000008}, -+ {0x03E, 0x00000110}, -+ {0x03F, 0x0000D39C}, -+ {0x033, 0x0000000C}, -+ {0x03E, 0x00000110}, -+ {0x03F, 0x0000F79E}, -+ {0x0EF, 0x00000000}, -+ {0x01B, 0x00003A40}, -+ {0x08F, 0x000C170E}, -+ {0x08E, 0x00005160}, -+ {0x002, 0x00000600}, -+ {0x0EE, 0x00000002}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x0000003F}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x0000003F}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x0000003F}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x0000003F}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x0000003F}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x0000003F}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x0000003F}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x0000003F}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x0000003F}, -+ {0x033, 0x0000000E}, -+ {0x03F, 0x0000003F}, -+ {0x0EE, 0x00000000}, -+ {0x0EF, 0x00004000}, -+ {0x033, 0x00000007}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00000707}, -+ {0x033, 0x00000006}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00000704}, -+ {0x033, 0x00000005}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00020500}, -+ {0x033, 0x00000004}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00010404}, -+ {0x033, 0x00000003}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00099B04}, -+ {0x033, 0x00000002}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00092B04}, -+ {0x033, 0x00000001}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x000B3204}, -+ {0x033, 0x00000000}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00003000}, -+ {0x033, 0x00000017}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00000787}, -+ {0x033, 0x00000016}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00000784}, -+ {0x033, 0x00000015}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00020580}, -+ {0x033, 0x00000014}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00010484}, -+ {0x033, 0x00000013}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00099B84}, -+ {0x033, 0x00000012}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00092B84}, -+ {0x033, 0x00000011}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x000B3284}, -+ {0x033, 0x00000010}, -+ {0x03E, 0x00000000}, -+ {0x03F, 0x00003080}, -+ {0x0EF, 0x00000000}, -+ {0x0EE, 0x00000010}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x00000003}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x00000003}, -+ {0x0EE, 0x00000000}, -+ {0x0EF, 0x00001000}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00000034}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000037}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00000034}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000024}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00000037}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x00000027}, -+ {0x0EF, 0x00000000}, -+ {0x0EC, 0x00000400}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000022}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000022}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x00000022}, -+ {0x0EC, 0x00000000}, -+ {0x0EC, 0x00000004}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x000000AE}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x0000008C}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x0000006A}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000048}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00000026}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x00000004}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x00000002}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x00000000}, -+ {0x0EC, 0x00000000}, -+ {0x0EF, 0x00008000}, -+ {0x033, 0x00000007}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001FB0}, -+ {0x033, 0x00000006}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001FB0}, -+ {0x033, 0x00000005}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001DB0}, -+ {0x033, 0x00000004}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001CB0}, -+ {0x033, 0x00000003}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001BB0}, -+ {0x033, 0x00000002}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001AB0}, -+ {0x033, 0x00000001}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x0000D9BC}, -+ {0x033, 0x00000000}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x0000D4BC}, -+ {0x033, 0x00000017}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001FB0}, -+ {0x033, 0x00000016}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001FB0}, -+ {0x033, 0x00000015}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001DB0}, -+ {0x033, 0x00000014}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001CB0}, -+ {0x033, 0x00000013}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001BB0}, -+ {0x033, 0x00000012}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001AB0}, -+ {0x033, 0x00000011}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x0000D9BC}, -+ {0x033, 0x00000010}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x0000D4BC}, -+ {0x033, 0x00000027}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001FB0}, -+ {0x033, 0x00000026}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001FB0}, -+ {0x033, 0x00000025}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001DB0}, -+ {0x033, 0x00000024}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001CB0}, -+ {0x033, 0x00000023}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001BB0}, -+ {0x033, 0x00000022}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001AB0}, -+ {0x033, 0x00000021}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x0000D9BC}, -+ {0x033, 0x00000020}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x0000D4BC}, -+ {0x033, 0x0000000E}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001FB0}, -+ {0x033, 0x0000000D}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001DB0}, -+ {0x033, 0x0000000C}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001CB0}, -+ {0x033, 0x0000000B}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00091BB0}, -+ {0x033, 0x0000000A}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x000A9AB0}, -+ {0x033, 0x00000009}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x000BD9BC}, -+ {0x033, 0x00000008}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x0009D4BC}, -+ {0x033, 0x0000001E}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001FB0}, -+ {0x033, 0x0000001D}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001DB0}, -+ {0x033, 0x0000001C}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001CB0}, -+ {0x033, 0x0000001B}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00091BB0}, -+ {0x033, 0x0000001A}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00099AB0}, -+ {0x033, 0x00000019}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x000AD9BC}, -+ {0x033, 0x00000018}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x0009D4BC}, -+ {0x033, 0x0000002E}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001FB0}, -+ {0x033, 0x0000002D}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001DB0}, -+ {0x033, 0x0000002C}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001CB0}, -+ {0x033, 0x0000002B}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00001BB0}, -+ {0x033, 0x0000002A}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x00009AB0}, -+ {0x033, 0x00000029}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x0009D9BC}, -+ {0x033, 0x00000028}, -+ {0x03E, 0x00000003}, -+ {0x03F, 0x0000D4BC}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00002000}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00000005}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000004}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00000004}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x0000000C}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x00000003}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x00000003}, -+ {0x0EF, 0x00000000}, -+ {0x06C, 0x00038085}, -+ {0x06D, 0x00000D6B}, -+ {0x06E, 0x0001FB89}, -+ {0x06F, 0x00097B99}, -+ {0x069, 0x00008040}, -+ {0x0EF, 0x00000200}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x000008FF}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x000004F2}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x00000217}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x00000131}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00000400}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x000004F7}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x000004F7}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x000004F2}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x00000117}, -+ {0x0EF, 0x00000000}, -+ {0x043, 0x00005000}, -+ {0x036, 0x000147D0}, -+ {0x0B0, 0x0008677C}, -+ {0x0B1, 0x00012920}, -+ {0x0BB, 0x000EF000}, -+ {0x0CB, 0x000A9594}, -+ {0x0CC, 0x000C36D2}, -+ {0x0CD, 0x00024923}, -+ {0x0CE, 0x00020180}, -+ {0x0CF, 0x00000000}, -+ {0x0D5, 0x0006E27A}, -+ {0x0D8, 0x00000044}, -+ {0x0D9, 0x00000007}, -+ {0x0DD, 0x00000020}, -+ {0x0E3, 0x0000002C}, -+ {0x0B7, 0x0000000C}, -+ {0x0E1, 0x000080C0}, -+ {0x0E4, 0x00000380}, -+ {0x0ED, 0x00002000}, -+ {0x033, 0x00000001}, -+ {0x03D, 0x000A6094}, -+ {0x03E, 0x00003449}, -+ {0x03F, 0x00000001}, -+ {0x033, 0x00000003}, -+ {0x03D, 0x000AA094}, -+ {0x03E, 0x00003449}, -+ {0x03F, 0x00000001}, -+ {0x0ED, 0x00000000}, -+ {0x0ED, 0x00000100}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x0000007F}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x0000007F}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x0000007F}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x0000007F}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x0000007F}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x0000007F}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x0000007F}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x0000007F}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x0000007F}, -+ {0x0ED, 0x00000000}, -+ {0x0ED, 0x00000080}, -+ {0x033, 0x00000000}, -+ {0x03E, 0x000007E1}, -+ {0x03F, 0x0001F87F}, -+ {0x033, 0x00000010}, -+ {0x03E, 0x000007E1}, -+ {0x03F, 0x0001F87F}, -+ {0x033, 0x00000030}, -+ {0x03E, 0x000007E1}, -+ {0x03F, 0x0001F87F}, -+ {0x033, 0x00000040}, -+ {0x03E, 0x000007E1}, -+ {0x03F, 0x0001F87F}, -+ {0x033, 0x00000050}, -+ {0x03E, 0x000007E1}, -+ {0x03F, 0x0001F87F}, -+ {0x033, 0x00000070}, -+ {0x03E, 0x000007E1}, -+ {0x03F, 0x0001F87F}, -+ {0x0ED, 0x00000000}, -+ {0x0ED, 0x00000004}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00008420}, -+ {0x0ED, 0x00000000}, -+ {0x018, 0x00011108}, -+ {0x0B9, 0x00000000}, -+ {0x0B9, 0x00000000}, -+ {0x0B9, 0x00000200}, -+ {0x0FF, 0x00000000}, -+ {0x0FF, 0x00000000}, -+ {0x0FF, 0x00000000}, -+ {0x0FF, 0x00000000}, -+ {0x0FF, 0x00000000}, -+ {0x0FF, 0x00000000}, -+ {0x0FF, 0x00000000}, -+ {0x0FF, 0x00000000}, -+ {0x0FF, 0x00000000}, -+ {0x0FF, 0x00000000}, -+ {0x0B9, 0x00000000}, -+ {0x018, 0x00013124}, -+ {0x05A, 0x0006808F}, -+ {0x0ED, 0x00000008}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x0000000F}, -+ {0x0ED, 0x00000000}, -+ {0x000, 0x00020000}, -+ {0x018, 0x00010124}, -+ {0x0EE, 0x00000800}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00000002}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x00000003}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x00000006}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x00000007}, -+ {0x0EE, 0x00000000}, -+ {0x0EE, 0x00001000}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x00000000}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x00000001}, -+ {0x033, 0x0000000A}, -+ {0x03F, 0x00000003}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x00000103}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x00000107}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00000207}, -+ {0x033, 0x0000000E}, -+ {0x03F, 0x00000307}, -+ {0x033, 0x0000000F}, -+ {0x03F, 0x00000307}, -+ {0x0EE, 0x00000000}, -+ {0x0EE, 0x00000200}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00000000}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x00000001}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x00000002}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x00000003}, -+ {0x0EE, 0x00000000}, -+ {0x011, 0x00014062}, -+ {0x0EF, 0x00000010}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000DF3}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00000DF3}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000A83}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00000A83}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x00000643}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x00000643}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00000100}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x0001B5A9}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x0001B589}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x0000000A}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0001B5A9}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x0001B5A9}, -+ {0x033, 0x0000000E}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x0000000F}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000010}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000011}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000012}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000013}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000014}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000015}, -+ {0x03F, 0x0001B589}, -+ {0x033, 0x00000016}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000017}, -+ {0x03F, 0x0001B5A9}, -+ {0x033, 0x00000018}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000019}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x0000001A}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x0000001B}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x0000001C}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x0000001D}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x0000001E}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x0000001F}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000020}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000021}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000022}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000023}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000024}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000025}, -+ {0x03F, 0x0001B5A8}, -+ {0x033, 0x00000022}, -+ {0x03F, 0x0001B5A8}, -+ {0x0EF, 0x00000000}, -+ {0x0EF, 0x00000040}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x000002C5}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x000002C5}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x000002C5}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x000002C5}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x000002C5}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x000002C5}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x000002C5}, -+ {0x033, 0x00000008}, -+ {0x03F, 0x000002C5}, -+ {0x033, 0x00000009}, -+ {0x03F, 0x000002C5}, -+ {0x033, 0x0000000A}, -+ {0x03F, 0x000002C5}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x000002C5}, -+ {0x0EF, 0x00000000}, -+ {0x059, 0x00050033}, -+ {0x061, 0x0005F48A}, -+ {0x062, 0x00077435}, -+ {0x063, 0x000F80A2}, -+ {0x065, 0x00018F22}, -+ {0x067, 0x00008060}, -+ {0x07E, 0x0009780B}, -+ {0x0EE, 0x00000004}, -+ {0x033, 0x0000000B}, -+ {0x03F, 0x0000000B}, -+ {0x033, 0x0000000C}, -+ {0x03F, 0x00000012}, -+ {0x033, 0x0000000D}, -+ {0x03F, 0x00000019}, -+ {0x033, 0x0000000F}, -+ {0x03F, 0x0000000B}, -+ {0x033, 0x00000010}, -+ {0x03F, 0x00000012}, -+ {0x033, 0x00000011}, -+ {0x03F, 0x00000019}, -+ {0x03F, 0x00000000}, -+ {0x0EE, 0x00000000}, -+ {0x0EE, 0x00000800}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00000001}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000002}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00000003}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000007}, -+ {0x0EE, 0x00000000}, -+ {0x0EE, 0x00001000}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00003000}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000000}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00000001}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000003}, -+ {0x033, 0x00000004}, -+ {0x03F, 0x00000007}, -+ {0x033, 0x00000005}, -+ {0x03F, 0x0000000F}, -+ {0x033, 0x00000006}, -+ {0x03F, 0x0000010F}, -+ {0x033, 0x00000007}, -+ {0x03F, 0x0000030F}, -+ {0x0EE, 0x00000000}, -+ {0x0EE, 0x00000200}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00000004}, -+ {0x033, 0x00000001}, -+ {0x03F, 0x00000005}, -+ {0x033, 0x00000002}, -+ {0x03F, 0x00000006}, -+ {0x033, 0x00000003}, -+ {0x03F, 0x00000007}, -+ {0x0EE, 0x00000000}, -+ {0x0EF, 0x00000080}, -+ {0x033, 0x00000004}, -+ {0x03E, 0x0000001D}, -+ {0x03F, 0x0001A241}, -+ {0x033, 0x00000005}, -+ {0x03E, 0x0000001D}, -+ {0x03F, 0x0001A241}, -+ {0x033, 0x00000006}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000007}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000008}, -+ {0x03E, 0x0000001D}, -+ {0x03F, 0x0001A241}, -+ {0x033, 0x00000009}, -+ {0x03E, 0x0001A241}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x0000000A}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x0000000B}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x0000000C}, -+ {0x03E, 0x0000001D}, -+ {0x03F, 0x0001A241}, -+ {0x033, 0x0000000D}, -+ {0x03E, 0x0000001D}, -+ {0x03F, 0x0001A241}, -+ {0x033, 0x0000000E}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x0000000F}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000010}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x000199C1}, -+ {0x033, 0x00000011}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x000199C1}, -+ {0x033, 0x00000012}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000013}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000014}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x000199C1}, -+ {0x033, 0x00000015}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x000199C1}, -+ {0x033, 0x00000016}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000017}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000018}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x000199C1}, -+ {0x033, 0x00000019}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x000199C1}, -+ {0x033, 0x0000001A}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x0000001B}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x0000001C}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x000199C1}, -+ {0x033, 0x0000001D}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x000199C1}, -+ {0x033, 0x0000001E}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x0000001F}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000020}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x000199C1}, -+ {0x033, 0x00000021}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x000199C1}, -+ {0x033, 0x00000022}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000023}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000024}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x0001E141}, -+ {0x033, 0x00000025}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x0001E141}, -+ {0x033, 0x00000026}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000027}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000028}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x0001E141}, -+ {0x033, 0x00000029}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x0001E141}, -+ {0x033, 0x0000002A}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x0000002B}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x0000002C}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x0001E141}, -+ {0x033, 0x0000002D}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x0001E141}, -+ {0x033, 0x0000002E}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x0000002F}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000030}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x0001E141}, -+ {0x033, 0x00000031}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x0001E141}, -+ {0x033, 0x00000032}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000033}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000034}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x0001E141}, -+ {0x033, 0x00000035}, -+ {0x03E, 0x0000001C}, -+ {0x03F, 0x0001E141}, -+ {0x033, 0x00000036}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000037}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000038}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x00000039}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C1}, -+ {0x033, 0x0000003A}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C3}, -+ {0x033, 0x0000003B}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C3}, -+ {0x033, 0x0000003C}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C3}, -+ {0x033, 0x0000003D}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C3}, -+ {0x033, 0x0000003E}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C3}, -+ {0x033, 0x0000003F}, -+ {0x03E, 0x0000001B}, -+ {0x03F, 0x0001C3C3}, -+ {0x0EF, 0x00000000}, -+ {0x051, 0x0003D368}, -+ {0x052, 0x000A3338}, -+ {0x053, 0x000688AF}, -+ {0x054, 0x00012C04}, -+ {0x058, 0x00084221}, -+ {0x05B, 0x000EB000}, -+ {0x100EE, 0x00002000}, -+ {0x10030, 0x000000F9}, -+ {0x10030, 0x000004F6}, -+ {0x10030, 0x000008F3}, -+ {0x10030, 0x00000CF0}, -+ {0x10030, 0x000010ED}, -+ {0x10030, 0x000014EA}, -+ {0x10030, 0x000018E7}, -+ {0x10030, 0x00001CE4}, -+ {0x10030, 0x000020E1}, -+ {0x10030, 0x000024A4}, -+ {0x10030, 0x000028A1}, -+ {0x10030, 0x00002C9E}, -+ {0x10030, 0x0000309B}, -+ {0x10030, 0x0000341E}, -+ {0x10030, 0x0000381B}, -+ {0x10030, 0x00003C18}, -+ {0x10030, 0x00004015}, -+ {0x10030, 0x000200BC}, -+ {0x10030, 0x000204B9}, -+ {0x10030, 0x000208B6}, -+ {0x10030, 0x00020CB3}, -+ {0x10030, 0x000210B0}, -+ {0x10030, 0x000214AD}, -+ {0x10030, 0x0002186C}, -+ {0x10030, 0x00021C69}, -+ {0x10030, 0x00022066}, -+ {0x10030, 0x00022426}, -+ {0x10030, 0x00022823}, -+ {0x10030, 0x00022C20}, -+ {0x10030, 0x0002301D}, -+ {0x10030, 0x0002341A}, -+ {0x10030, 0x00023817}, -+ {0x10030, 0x00023C14}, -+ {0x10030, 0x00024011}, -+ {0x10030, 0x000280BC}, -+ {0x10030, 0x000284B9}, -+ {0x10030, 0x000288B6}, -+ {0x10030, 0x00028CB3}, -+ {0x10030, 0x000290B0}, -+ {0x10030, 0x000294AD}, -+ {0x10030, 0x0002986C}, -+ {0x10030, 0x00029C69}, -+ {0x10030, 0x0002A066}, -+ {0x10030, 0x0002A426}, -+ {0x10030, 0x0002A823}, -+ {0x10030, 0x0002AC20}, -+ {0x10030, 0x0002B01D}, -+ {0x10030, 0x0002B41A}, -+ {0x10030, 0x0002B817}, -+ {0x10030, 0x0002BC14}, -+ {0x10030, 0x0002C011}, -+ {0x10030, 0x000300BC}, -+ {0x10030, 0x000304B9}, -+ {0x10030, 0x000308B6}, -+ {0x10030, 0x00030CB3}, -+ {0x10030, 0x000310B0}, -+ {0x10030, 0x000314AD}, -+ {0x10030, 0x0003186C}, -+ {0x10030, 0x00031C69}, -+ {0x10030, 0x00032066}, -+ {0x10030, 0x00032426}, -+ {0x10030, 0x00032823}, -+ {0x10030, 0x00032C20}, -+ {0x10030, 0x0003301D}, -+ {0x10030, 0x0003341A}, -+ {0x10030, 0x00033817}, -+ {0x10030, 0x00033C14}, -+ {0x10030, 0x00034011}, -+ {0x100EE, 0x00000000}, -+ {0x100EE, 0x00004000}, -+ {0x10030, 0x000201EF}, -+ {0x10030, 0x000205E9}, -+ {0x10030, 0x000209E3}, -+ {0x10030, 0x00020DDD}, -+ {0x10030, 0x000211D7}, -+ {0x10030, 0x000215D1}, -+ {0x10030, 0x00021919}, -+ {0x10030, 0x00021D13}, -+ {0x10030, 0x000220D9}, -+ {0x10030, 0x000224D3}, -+ {0x10030, 0x00022899}, -+ {0x10030, 0x00022C93}, -+ {0x10030, 0x00023059}, -+ {0x10030, 0x00023453}, -+ {0x10030, 0x00023819}, -+ {0x10030, 0x00023C13}, -+ {0x10030, 0x0002400D}, -+ {0x10030, 0x00024407}, -+ {0x10030, 0x000281EF}, -+ {0x10030, 0x000285E9}, -+ {0x10030, 0x000289E3}, -+ {0x10030, 0x00028DDD}, -+ {0x10030, 0x000291D7}, -+ {0x10030, 0x000295D1}, -+ {0x10030, 0x00029919}, -+ {0x10030, 0x00029D13}, -+ {0x10030, 0x0002A0D9}, -+ {0x10030, 0x0002A4D3}, -+ {0x10030, 0x0002A899}, -+ {0x10030, 0x0002AC93}, -+ {0x10030, 0x0002B059}, -+ {0x10030, 0x0002B453}, -+ {0x10030, 0x0002B819}, -+ {0x10030, 0x0002BC13}, -+ {0x10030, 0x0002C00D}, -+ {0x10030, 0x0002C407}, -+ {0x10030, 0x000301EF}, -+ {0x10030, 0x000305E9}, -+ {0x10030, 0x000309E3}, -+ {0x10030, 0x00030DDD}, -+ {0x10030, 0x000311D7}, -+ {0x10030, 0x000315D1}, -+ {0x10030, 0x00031919}, -+ {0x10030, 0x00031D13}, -+ {0x10030, 0x000320D9}, -+ {0x10030, 0x000324D3}, -+ {0x10030, 0x00032899}, -+ {0x10030, 0x00032C93}, -+ {0x10030, 0x00033059}, -+ {0x10030, 0x00033453}, -+ {0x10030, 0x00033819}, -+ {0x10030, 0x00033C13}, -+ {0x10030, 0x0003400D}, -+ {0x10030, 0x00034407}, -+ {0x100EE, 0x00000000}, -+ {0x100EE, 0x00004000}, -+ {0x10030, 0x000001EF}, -+ {0x10030, 0x000005E9}, -+ {0x10030, 0x000009E3}, -+ {0x10030, 0x00000DDD}, -+ {0x10030, 0x000011A5}, -+ {0x10030, 0x0000159F}, -+ {0x10030, 0x00001965}, -+ {0x10030, 0x00001D5F}, -+ {0x10030, 0x00002125}, -+ {0x10030, 0x0000251F}, -+ {0x10030, 0x000028E5}, -+ {0x10030, 0x00002CDF}, -+ {0x10030, 0x000030A5}, -+ {0x10030, 0x0000349F}, -+ {0x10030, 0x00003865}, -+ {0x10030, 0x00003C5F}, -+ {0x10030, 0x00004025}, -+ {0x10030, 0x0000441F}, -+ {0x100EE, 0x00000000}, -+ {0x0EF, 0x00000008}, -+ {0x033, 0x00000000}, -+ {0x03F, 0x00000004}, -+ {0x0EF, 0x00000000}, -+ {0x005, 0x00000001}, -+ {0x10005, 0x00000001}, -+ {0x0FE, 0x00000022}, -+}; -+ -+static const struct rtw89_reg2_def rtw89_8851b_phy_nctl_regs[] = { -+ {0x8000, 0x00000008}, -+ {0x8008, 0x00000000}, -+ {0x8004, 0xe8862b66}, -+ {0x800c, 0x78000000}, -+ {0x8010, 0x88015000}, -+ {0x8014, 0x80010100}, -+ {0x8018, 0x10010100}, -+ {0x801c, 0xa210bc00}, -+ {0x8020, 0x000403e0}, -+ {0x8024, 0x00072160}, -+ {0x8028, 0x00180e00}, -+ {0x8030, 0x400000c0}, -+ {0x8034, 0x11000830}, -+ {0x8038, 0x40000000}, -+ {0x803c, 0x00000008}, -+ {0x8040, 0x00000046}, -+ {0x8044, 0x0010001f}, -+ {0x8048, 0x00000003}, -+ {0x804c, 0x420840e0}, -+ {0x8050, 0xce08cce0}, -+ {0x8054, 0x420840e0}, -+ {0x8058, 0xce08cce0}, -+ {0x805c, 0x150c0b02}, -+ {0x8060, 0x150c0b02}, -+ {0x8064, 0x2aa00047}, -+ {0x8074, 0x80000000}, -+ {0x807c, 0x000000ee}, -+ {0x8088, 0x80000000}, -+ {0x808c, 0x00000000}, -+ {0x80b0, 0x00000000}, -+ {0x80cc, 0x00000000}, -+ {0x80d0, 0x00000000}, -+ {0x80ec, 0x00000002}, -+ {0x8098, 0x0000ff00}, -+ {0x8070, 0x00e80000}, -+ {0x80b0, 0xffe00fff}, -+ {0x809c, 0x0000001f}, -+ {0x80b8, 0x00002000}, -+ {0x80bc, 0x00050033}, -+ {0xa400, 0x00000000}, -+ {0xa404, 0x00000180}, -+ {0xa408, 0x000001af}, -+ {0xa40c, 0x000001e3}, -+ {0xa410, 0x00000220}, -+ {0xa414, 0x00000262}, -+ {0xa418, 0x000002ac}, -+ {0xa41c, 0x0000035e}, -+ {0xa420, 0x000003c7}, -+ {0xa424, 0x0000043d}, -+ {0xa428, 0x000004c1}, -+ {0xa42c, 0x00000556}, -+ {0xa430, 0x000005fc}, -+ {0xa434, 0x000006b7}, -+ {0xa438, 0x00000789}, -+ {0xa43c, 0x00000875}, -+ {0xa440, 0x0000011f}, -+ {0x8104, 0x00000000}, -+ {0x810c, 0x00000000}, -+ {0x8110, 0x00000000}, -+ {0x8114, 0x00000000}, -+ {0x8120, 0x10010000}, -+ {0x8124, 0x00000000}, -+ {0x8128, 0x00000200}, -+ {0x812c, 0x0000c000}, -+ {0x8130, 0x40000000}, -+ {0x8138, 0x40000000}, -+ {0x813c, 0x40000000}, -+ {0x8140, 0x00000000}, -+ {0x8144, 0x0b040b03}, -+ {0x8148, 0x07020b04}, -+ {0x814c, 0x07020b04}, -+ {0x8150, 0xe4e40000}, -+ {0x8158, 0xffffffff}, -+ {0x815c, 0xffffffff}, -+ {0x8160, 0xffffffff}, -+ {0x8164, 0xffffffff}, -+ {0x8168, 0xffffffff}, -+ {0x816c, 0x1fffffff}, -+ {0x81cc, 0x00000000}, -+ {0x81dc, 0x00000002}, -+ {0x81e0, 0x00000000}, -+ {0x81e4, 0x00000001}, -+ {0x81a0, 0x00000000}, -+ {0x81ac, 0x3fc20400}, -+ {0x81b0, 0x3f914100}, -+ {0x81bc, 0x0000005b}, -+ {0x81c0, 0x0000005b}, -+ {0x81b4, 0x01e0f078}, -+ {0x81b8, 0x01e0f078}, -+ {0x81f0, 0x0000f078}, -+ {0x81d8, 0x00000001}, -+ {0x9500, 0x00000000}, -+ {0x9504, 0x00000000}, -+ {0x9508, 0x00000000}, -+ {0x950c, 0x00000000}, -+ {0x9510, 0x00000000}, -+ {0x9514, 0x00000000}, -+ {0x9518, 0x00000000}, -+ {0x951c, 0x00000000}, -+ {0x9520, 0x00000000}, -+ {0x9524, 0x00000000}, -+ {0x9528, 0x00000000}, -+ {0x952c, 0x00000000}, -+ {0x9530, 0x00000000}, -+ {0x9534, 0x00000000}, -+ {0x9538, 0x00000000}, -+ {0x953c, 0x00000000}, -+ {0x9540, 0x04000000}, -+ {0x9544, 0x00000000}, -+ {0x9548, 0x00000000}, -+ {0x954c, 0x00000000}, -+ {0x9550, 0x00000000}, -+ {0x9554, 0x00000000}, -+ {0x9558, 0x00000000}, -+ {0x955c, 0x00000000}, -+ {0x9560, 0x00000000}, -+ {0x9564, 0x00000000}, -+ {0x9568, 0x00000000}, -+ {0x956c, 0x00000000}, -+ {0x9570, 0x00000000}, -+ {0x9574, 0x00000000}, -+ {0x9578, 0x00000000}, -+ {0x957c, 0x00000000}, -+ {0x9580, 0x00000000}, -+ {0x9584, 0x04000000}, -+ {0x9588, 0x00000000}, -+ {0x958c, 0x00000000}, -+ {0x9590, 0x00000000}, -+ {0x9594, 0x00000000}, -+ {0x9598, 0x00000000}, -+ {0x959c, 0x00000000}, -+ {0x95a0, 0x00000000}, -+ {0x95a4, 0x00000000}, -+ {0x95a8, 0x00000000}, -+ {0x95ac, 0x00000000}, -+ {0x95b0, 0x00000000}, -+ {0x95b4, 0x00000000}, -+ {0x95b8, 0x00000000}, -+ {0x95bc, 0x00000000}, -+ {0x95c0, 0x00000000}, -+ {0x95c4, 0x00000000}, -+ {0x95c8, 0x04000000}, -+ {0x95cc, 0x00000000}, -+ {0x95d0, 0x00000000}, -+ {0x95d4, 0x00000000}, -+ {0x95d8, 0x00000000}, -+ {0x95dc, 0x00000000}, -+ {0x95e0, 0x00000000}, -+ {0x95e4, 0x00000000}, -+ {0x95e8, 0x00000000}, -+ {0x95ec, 0x00000000}, -+ {0x95f0, 0x00000000}, -+ {0x95f4, 0x00000000}, -+ {0x95f8, 0x00000000}, -+ {0x95fc, 0x00000000}, -+ {0x9600, 0x00000000}, -+ {0x9604, 0x00000000}, -+ {0x9608, 0x00000000}, -+ {0x960c, 0x04000000}, -+ {0x9610, 0x00000000}, -+ {0x9614, 0x00000000}, -+ {0x9618, 0x00000000}, -+ {0x961c, 0x00000000}, -+ {0x9620, 0x00000000}, -+ {0x9624, 0x00000000}, -+ {0x9628, 0x00000000}, -+ {0x962c, 0x00000000}, -+ {0x9630, 0x00000000}, -+ {0x9634, 0x00000000}, -+ {0x9638, 0x00000000}, -+ {0x963c, 0x00000000}, -+ {0x9640, 0x00000000}, -+ {0x9644, 0x00000000}, -+ {0x9648, 0x00000000}, -+ {0x964c, 0x00000000}, -+ {0x9650, 0x04000000}, -+ {0x9654, 0x00000000}, -+ {0x9658, 0x00000000}, -+ {0x965c, 0x00000000}, -+ {0x9660, 0x00000000}, -+ {0x9664, 0x00000000}, -+ {0x9668, 0x00000000}, -+ {0x966c, 0x00000000}, -+ {0x9670, 0x00000000}, -+ {0x9674, 0x00000000}, -+ {0x9678, 0x00000000}, -+ {0x967c, 0x00000000}, -+ {0x9680, 0x00000000}, -+ {0x9684, 0x00000000}, -+ {0x9688, 0x00000000}, -+ {0x968c, 0x00000000}, -+ {0x9690, 0x00000000}, -+ {0x9694, 0x04000000}, -+ {0x9698, 0x00000000}, -+ {0x969c, 0x00000000}, -+ {0x96a0, 0x00000000}, -+ {0x96a4, 0x00000000}, -+ {0x96a8, 0x00000000}, -+ {0x96ac, 0x00000000}, -+ {0x96b0, 0x00000000}, -+ {0x96b4, 0x00000000}, -+ {0x96b8, 0x00000000}, -+ {0x96bc, 0x00000000}, -+ {0x96c0, 0x00000000}, -+ {0x96c4, 0x00000000}, -+ {0x96c8, 0x00000000}, -+ {0x96cc, 0x00000000}, -+ {0x96d0, 0x00000000}, -+ {0x96d4, 0x00000000}, -+ {0x96d8, 0x04000000}, -+ {0x96dc, 0x00000000}, -+ {0x96e0, 0x00000000}, -+ {0x96e4, 0x00000000}, -+ {0x96e8, 0x00000000}, -+ {0x96ec, 0x00000000}, -+ {0x96f0, 0x00000000}, -+ {0x96f4, 0x00000000}, -+ {0x96f8, 0x00000000}, -+ {0x96fc, 0x00000000}, -+ {0x9700, 0x00000000}, -+ {0x9704, 0x00000000}, -+ {0x9708, 0x00000000}, -+ {0x970c, 0x00000000}, -+ {0x9710, 0x00000000}, -+ {0x9714, 0x00000000}, -+ {0x9718, 0x00000000}, -+ {0x971c, 0x04000000}, -+ {0x9720, 0x00000000}, -+ {0x9724, 0x00000000}, -+ {0x9728, 0x00000000}, -+ {0x972c, 0x00000000}, -+ {0x9730, 0x00000000}, -+ {0x9734, 0x00000000}, -+ {0x9738, 0x00000000}, -+ {0x973c, 0x00000000}, -+ {0x9740, 0x00000000}, -+ {0x9744, 0x00000000}, -+ {0x9748, 0x00000000}, -+ {0x974c, 0x00000000}, -+ {0x9750, 0x00000000}, -+ {0x9754, 0x00000000}, -+ {0x9758, 0x00000000}, -+ {0x975c, 0x00000000}, -+ {0x9760, 0x04000000}, -+ {0x9764, 0x00000000}, -+ {0x9768, 0x00000000}, -+ {0x976c, 0x00000000}, -+ {0x9770, 0x00000000}, -+ {0x9774, 0x00000000}, -+ {0x9778, 0x00000000}, -+ {0x977c, 0x00000000}, -+ {0x9780, 0x00000000}, -+ {0x9784, 0x00000000}, -+ {0x9788, 0x00000000}, -+ {0x978c, 0x00000000}, -+ {0x9790, 0x00000000}, -+ {0x9794, 0x00000000}, -+ {0x9798, 0x00000000}, -+ {0x979c, 0x00000000}, -+ {0x97a0, 0x00000000}, -+ {0x97a4, 0x04000000}, -+ {0x97a8, 0x00000000}, -+ {0x97ac, 0x00000000}, -+ {0x97b0, 0x00000000}, -+ {0x97b4, 0x00000000}, -+ {0x97b8, 0x00000000}, -+ {0x97bc, 0x00000000}, -+ {0x97c0, 0x00000000}, -+ {0x97c4, 0x00000000}, -+ {0x97c8, 0x00000000}, -+ {0x97cc, 0x00000000}, -+ {0x97d0, 0x00000000}, -+ {0x97d4, 0x00000000}, -+ {0x97d8, 0x00000000}, -+ {0x97dc, 0x00000000}, -+ {0x97e0, 0x00000000}, -+ {0x97e4, 0x00000000}, -+ {0x97e8, 0x04000000}, -+ {0x97ec, 0x00000000}, -+ {0x97f0, 0x00000000}, -+ {0x97f4, 0x00000000}, -+ {0x97f8, 0x00000000}, -+ {0x97fc, 0x00000000}, -+ {0x9800, 0x00000000}, -+ {0x9804, 0x00000000}, -+ {0x9808, 0x00000000}, -+ {0x980c, 0x00000000}, -+ {0x9810, 0x00000000}, -+ {0x9814, 0x00000000}, -+ {0x9818, 0x00000000}, -+ {0x981c, 0x00000000}, -+ {0x9820, 0x00000000}, -+ {0x9824, 0x00000000}, -+ {0x9828, 0x00000000}, -+ {0x982c, 0x04000000}, -+ {0x81d8, 0x00000000}, -+ {0xb104, 0x2b251f19}, -+ {0xb108, 0x433d3731}, -+ {0xb10c, 0x5b554f49}, -+ {0xb110, 0x736d6761}, -+ {0xb114, 0x7f7f7f79}, -+ {0xb118, 0x120f7f7f}, -+ {0xb11c, 0x1e1b1815}, -+ {0xb120, 0x2a272421}, -+ {0xb124, 0x3633302d}, -+ {0xb128, 0x3f3f3c39}, -+ {0xb12c, 0x3f3f3f3f}, -+ {0x8088, 0x00000110}, -+ {0x8000, 0x00000008}, -+ {0x8080, 0x00000005}, -+ {0x8500, 0x80000008}, -+ {0x8504, 0x43000004}, -+ {0x8508, 0x4b044a00}, -+ {0x850c, 0x40098604}, -+ {0x8510, 0x0004e01f}, -+ {0x8514, 0x74104b00}, -+ {0x8518, 0x000021e0}, -+ {0x851c, 0x74301658}, -+ {0x8520, 0x43800004}, -+ {0x8524, 0x4c000007}, -+ {0x8528, 0x43000004}, -+ {0x852c, 0x56030007}, -+ {0x8530, 0x57000004}, -+ {0x8534, 0x400042fe}, -+ {0x8538, 0x50554200}, -+ {0x853c, 0xb4183000}, -+ {0x8540, 0xe537a50f}, -+ {0x8544, 0xf12bf02b}, -+ {0x8548, 0xf32bf22b}, -+ {0x854c, 0xf62bf42b}, -+ {0x8550, 0xf82bf72b}, -+ {0x8554, 0xfa2bf92b}, -+ {0x8558, 0xfd2bfc2b}, -+ {0x855c, 0xe537fe2b}, -+ {0x8560, 0xf12af02a}, -+ {0x8564, 0xf32af22a}, -+ {0x8568, 0xf52af42a}, -+ {0x856c, 0x000bf62a}, -+ {0x8570, 0xf028a511}, -+ {0x8574, 0xf228f128}, -+ {0x8578, 0xf428f328}, -+ {0x857c, 0xf628f528}, -+ {0x8580, 0xf828f728}, -+ {0x8584, 0xfa28f928}, -+ {0x8588, 0xfc28fb28}, -+ {0x858c, 0xfe28fd28}, -+ {0x8590, 0xf028ff28}, -+ {0x8594, 0xf228f128}, -+ {0x8598, 0x30750001}, -+ {0x859c, 0x30753075}, -+ {0x85a0, 0x30b63097}, -+ {0x85a4, 0x30be30bb}, -+ {0x85a8, 0x30d930cc}, -+ {0x85ac, 0x316d30e6}, -+ {0x85b0, 0x3189317f}, -+ {0x85b4, 0x31d23193}, -+ {0x85b8, 0x31e43210}, -+ {0x85bc, 0x31e831dd}, -+ {0x85c0, 0x322831e1}, -+ {0x85c4, 0x323c3232}, -+ {0x85c8, 0x32503246}, -+ {0x85cc, 0x3264325a}, -+ {0x85d0, 0x3278326e}, -+ {0x85d4, 0x32983285}, -+ {0x85d8, 0x32aa32a6}, -+ {0x85dc, 0x330b32f3}, -+ {0x85e0, 0x333f330c}, -+ {0x85e4, 0x334c3341}, -+ {0x85e8, 0xe35e0001}, -+ {0x85ec, 0x20887410}, -+ {0x85f0, 0x140f0200}, -+ {0x85f4, 0x02002098}, -+ {0x85f8, 0x7430140f}, -+ {0x85fc, 0x5b10e39c}, -+ {0x8600, 0x20807410}, -+ {0x8604, 0x140f0000}, -+ {0x8608, 0x56015507}, -+ {0x860c, 0x7410e382}, -+ {0x8610, 0x02002088}, -+ {0x8614, 0x5517140f}, -+ {0x8618, 0xe34ee382}, -+ {0x861c, 0x468e7508}, -+ {0x8620, 0xe0ace38c}, -+ {0x8624, 0x5500f0e2}, -+ {0x8628, 0x5501e37e}, -+ {0x862c, 0x5b10f1de}, -+ {0x8630, 0x20907410}, -+ {0x8634, 0x140f0000}, -+ {0x8638, 0xe3825507}, -+ {0x863c, 0x20987410}, -+ {0x8640, 0x140f0200}, -+ {0x8644, 0xe3825517}, -+ {0x8648, 0x46967509}, -+ {0x864c, 0xe0ace38c}, -+ {0x8650, 0xe37e5500}, -+ {0x8654, 0x00015501}, -+ {0x8658, 0x4d000007}, -+ {0x865c, 0x74200004}, -+ {0x8660, 0x57005710}, -+ {0x8664, 0x9700140f}, -+ {0x8668, 0x00017430}, -+ {0x866c, 0xe39ce35e}, -+ {0x8670, 0xe52a0bbd}, -+ {0x8674, 0xe36a0001}, -+ {0x8678, 0x0001e3c4}, -+ {0x867c, 0x55005b30}, -+ {0x8680, 0x46500005}, -+ {0x8684, 0x74000004}, -+ {0x8688, 0x1658e37e}, -+ {0x868c, 0x74305501}, -+ {0x8690, 0x46100005}, -+ {0x8694, 0x00010004}, -+ {0x8698, 0x30f8e35e}, -+ {0x869c, 0xe52a0023}, -+ {0x86a0, 0x54ed0002}, -+ {0x86a4, 0x00230baa}, -+ {0x86a8, 0x0002e52a}, -+ {0x86ac, 0xe356e3e4}, -+ {0x86b0, 0xe35e0001}, -+ {0x86b4, 0x002230f3}, -+ {0x86b8, 0x0002e52a}, -+ {0x86bc, 0x0baa54ec}, -+ {0x86c0, 0xe52a0022}, -+ {0x86c4, 0xe3e40002}, -+ {0x86c8, 0x0001e356}, -+ {0x86cc, 0x0baae35e}, -+ {0x86d0, 0xe3e430ec}, -+ {0x86d4, 0x0001e356}, -+ {0x86d8, 0x6d0f6c67}, -+ {0x86dc, 0xe52ae39c}, -+ {0x86e0, 0xe39c6c8b}, -+ {0x86e4, 0x0bace52a}, -+ {0x86e8, 0x6d0f6cb3}, -+ {0x86ec, 0xe52ae39c}, -+ {0x86f0, 0x6cdb0bad}, -+ {0x86f4, 0xe39c6d0f}, -+ {0x86f8, 0x6cf5e52a}, -+ {0x86fc, 0xe39c6d0f}, -+ {0x8700, 0x6c0be52a}, -+ {0x8704, 0xe39c6d00}, -+ {0x8708, 0x6c25e52a}, -+ {0x870c, 0xe52ae39c}, -+ {0x8710, 0x6c4df8c6}, -+ {0x8714, 0xe52ae39c}, -+ {0x8718, 0x6c75f9cf}, -+ {0x871c, 0xe52ae39c}, -+ {0x8720, 0xe39c6c99}, -+ {0x8724, 0xfad6e52a}, -+ {0x8728, 0x21e87410}, -+ {0x872c, 0x6e670009}, -+ {0x8730, 0xe3c46f0f}, -+ {0x8734, 0x7410e52f}, -+ {0x8738, 0x000b21e8}, -+ {0x873c, 0xe3c46e8b}, -+ {0x8740, 0x7410e52f}, -+ {0x8744, 0x000d21e8}, -+ {0x8748, 0x6f0f6eb3}, -+ {0x874c, 0xe52fe3c4}, -+ {0x8750, 0xfe07ff08}, -+ {0x8754, 0x21e87410}, -+ {0x8758, 0x6ec7000e}, -+ {0x875c, 0xe52fe3c4}, -+ {0x8760, 0x21e87410}, -+ {0x8764, 0x6edb000f}, -+ {0x8768, 0xe3c46f0f}, -+ {0x876c, 0x7410e52f}, -+ {0x8770, 0x001021e8}, -+ {0x8774, 0xe3c46eef}, -+ {0x8778, 0xff03e52f}, -+ {0x877c, 0xe52ffe02}, -+ {0x8780, 0x21e87410}, -+ {0x8784, 0x6e110013}, -+ {0x8788, 0xe3c46f00}, -+ {0x878c, 0xff03e52f}, -+ {0x8790, 0xe52ffe02}, -+ {0x8794, 0x21e87410}, -+ {0x8798, 0x6e250014}, -+ {0x879c, 0xe52fe3c4}, -+ {0x87a0, 0xff08fc24}, -+ {0x87a4, 0x7410fe07}, -+ {0x87a8, 0x001521e8}, -+ {0x87ac, 0xe3c46e39}, -+ {0x87b0, 0x7410e52f}, -+ {0x87b4, 0x001621e8}, -+ {0x87b8, 0xe3c46e4d}, -+ {0x87bc, 0xfd27e52f}, -+ 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{0x8ea0, 0x1a4215f4}, -+ {0x8ea4, 0x6300000b}, -+ {0x8ea8, 0x42000004}, -+ {0x8eac, 0x74304300}, -+ {0x8eb0, 0x4380140f}, -+ {0x8eb4, 0x73080007}, -+ {0x8eb8, 0x00047300}, -+ {0x8ebc, 0x00014300}, -+ {0x8ec0, 0x4bf00007}, -+ {0x8ec4, 0x490b4a8f}, -+ {0x8ec8, 0x4a8e48f1}, -+ {0x8ecc, 0x48a5490a}, -+ {0x8ed0, 0x49094a8d}, -+ {0x8ed4, 0x4a8c487d}, -+ {0x8ed8, 0x48754908}, -+ {0x8edc, 0x49074a8b}, -+ {0x8ee0, 0x4a8a4889}, -+ {0x8ee4, 0x48b74906}, -+ {0x8ee8, 0x49054a89}, -+ {0x8eec, 0x4a8848fc}, -+ {0x8ef0, 0x48564905}, -+ {0x8ef4, 0x49044a87}, -+ {0x8ef8, 0x4a8648c1}, -+ {0x8efc, 0x483d4904}, -+ {0x8f00, 0x49034a85}, -+ {0x8f04, 0x4a8448c7}, -+ {0x8f08, 0x485e4903}, -+ {0x8f0c, 0x49024a83}, -+ {0x8f10, 0x4a8248ac}, -+ {0x8f14, 0x48624902}, -+ {0x8f18, 0x49024a81}, -+ {0x8f1c, 0x4a804820}, -+ {0x8f20, 0x48004900}, -+ {0x8f24, 0x49014a90}, -+ {0x8f28, 0x4a10481f}, -+ {0x8f2c, 0x00060001}, -+ {0x8f30, 0x5f005f80}, -+ {0x8f34, 0x00059900}, -+ {0x8f38, 0x00017300}, -+ {0x8f3c, 0x63800006}, -+ {0x8f40, 0x98006300}, -+ {0x8f44, 0x549f0001}, -+ {0x8f48, 0x5c015400}, -+ {0x8f4c, 0x540054df}, -+ {0x8f50, 0x00015c02}, -+ {0x8f54, 0x07145c01}, -+ {0x8f58, 0x5c025400}, -+ {0x8f5c, 0x5c020001}, -+ {0x8f60, 0x54000714}, -+ {0x8f64, 0x00015c01}, -+ {0x8f68, 0x4c184c98}, -+ {0x8f6c, 0x00080001}, -+ {0x8f70, 0x5c020004}, -+ {0x8f74, 0x09017430}, -+ {0x8f78, 0x0ba60c01}, -+ {0x8f7c, 0x77800005}, -+ {0x8f80, 0x52200007}, -+ {0x8f84, 0x43800004}, -+ {0x8f88, 0x610a6008}, -+ {0x8f8c, 0x63c26200}, -+ {0x8f90, 0x5c000007}, -+ {0x8f94, 0x43000004}, -+ {0x8f98, 0x00000001}, -+ {0x8080, 0x00000004}, -+ {0x8080, 0x00000000}, -+ {0x8088, 0x00000000}, -+}; -+ -+static const struct rtw89_txpwr_byrate_cfg rtw89_8851b_txpwr_byrate[] = { -+ { 0, 0, 0, 0, 4, 0x50505050, }, -+ { 0, 0, 1, 0, 4, 0x54585858, }, -+ { 0, 0, 1, 4, 4, 0x44484c50, }, -+ { 0, 0, 2, 0, 4, 0x50545858, }, -+ { 0, 0, 2, 4, 4, 0x4044484c, }, -+ { 0, 0, 2, 8, 4, 0x3034383c, }, -+ { 0, 0, 3, 0, 4, 0x50505050, }, -+ { 0, 1, 2, 0, 4, 0x50545858, }, -+ { 0, 1, 2, 4, 4, 0x4044484c, }, -+ { 0, 1, 2, 8, 4, 0x3034383c, }, -+ { 0, 1, 3, 0, 4, 0x50505050, }, -+ { 0, 0, 4, 1, 4, 0x00000000, }, -+ { 0, 0, 4, 0, 1, 0x00000000, }, -+ { 1, 0, 1, 0, 4, 0x58585858, }, -+ { 1, 0, 1, 4, 4, 0x484c5054, }, -+ { 1, 0, 2, 0, 4, 0x54585858, }, -+ { 1, 0, 2, 4, 4, 0x44484c50, }, -+ { 1, 0, 2, 8, 4, 0x34383c40, }, -+ { 1, 0, 3, 0, 4, 0x40404040, }, -+ { 1, 1, 2, 0, 4, 0x54585858, }, -+ { 1, 1, 2, 4, 4, 0x44484c50, }, -+ { 1, 1, 2, 8, 4, 0x34383c40, }, -+ { 1, 1, 3, 0, 4, 0x48484848, }, -+ { 1, 0, 4, 0, 4, 0x00000000, }, -+ { 2, 0, 1, 0, 4, 0x40404040, }, -+ { 2, 0, 1, 4, 4, 0x383c4040, }, -+ { 2, 0, 2, 0, 4, 0x40404040, }, -+ { 2, 0, 2, 4, 4, 0x34383c40, }, -+ { 2, 0, 2, 8, 4, 0x24282c30, }, -+ { 2, 0, 3, 0, 4, 0x40404040, }, -+ { 2, 1, 2, 0, 4, 0x40404040, }, -+ { 2, 1, 2, 4, 4, 0x34383c40, }, -+ { 2, 1, 2, 8, 4, 0x24282c30, }, -+ { 2, 1, 3, 0, 4, 0x40404040, }, -+ { 2, 0, 4, 0, 4, 0x00000000, }, -+}; -+ -+static const s8 _txpwr_track_delta_swingidx_5ga_n[][DELTA_SWINGIDX_SIZE] = { -+ {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 0, -+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, -+ {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1}, -+ {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, -+ 1, 2, 2, 2, 2, 2, 3, 3, 3, 3, 4, 4, 4, 4}, -+}; -+ -+static const s8 _txpwr_track_delta_swingidx_5ga_p[][DELTA_SWINGIDX_SIZE] = { -+ {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, -+ {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, -+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, -+ {0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, -+ 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}, -+}; -+ -+static const s8 _txpwr_track_delta_swingidx_2ga_n[] = { -+ 0, 0, 0, 0, -1, -1, -1, -2, -2, -2, -2, -3, -3, -3, -3, -3, -+ -4, -4, -4, -4, -4, -5, -5, -5, -5, -5, -5, -6, -6, -6 -+}; -+ -+static const s8 _txpwr_track_delta_swingidx_2ga_p[] = { -+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -+ 0, 1, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 4 -+}; -+ -+static const s8 _txpwr_track_delta_swingidx_2g_cck_a_n[] = { -+ 0, 0, 0, 0, -1, -1, -1, -2, -2, -2, -2, -3, -3, -3, -3, -3, -+ -4, -4, -4, -4, -4, -5, -5, -5, -5, -5, -5, -6, -6, -6 -+}; -+ -+static const s8 _txpwr_track_delta_swingidx_2g_cck_a_p[] = { -+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, -+ 0, 1, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 4 -+}; -+ -+const u8 rtw89_8851b_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM] -+ [RTW89_REGD_NUM] = { -+ [0][0][RTW89_ACMA] = 0, -+ [0][0][RTW89_CN] = 0, -+ [0][0][RTW89_ETSI] = 0, -+ [0][0][RTW89_FCC] = 1, -+ [0][0][RTW89_IC] = 1, -+ [0][0][RTW89_KCC] = 0, -+ [0][0][RTW89_MKK] = 0, -+ [0][0][RTW89_UK] = 0, -+ [0][1][RTW89_ACMA] = 0, -+ [0][1][RTW89_CN] = 0, -+ [0][1][RTW89_ETSI] = 0, -+ [0][1][RTW89_FCC] = 3, -+ [0][1][RTW89_IC] = 3, -+ [0][1][RTW89_KCC] = 0, -+ [0][1][RTW89_MKK] = 0, -+ [0][1][RTW89_UK] = 0, -+ [1][1][RTW89_ACMA] = 0, -+ [1][1][RTW89_CN] = 0, -+ [1][1][RTW89_ETSI] = 0, -+ [1][1][RTW89_FCC] = 3, -+ [1][1][RTW89_IC] = 3, -+ [1][1][RTW89_KCC] = 0, -+ [1][1][RTW89_MKK] = 0, -+ [1][1][RTW89_UK] = 0, -+}; -+ -+static -+const s8 rtw89_8851b_txpwr_lmt_2g[RTW89_2G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = { -+ [0][0][0][0][RTW89_WW][0] = 58, -+ [0][0][0][0][RTW89_WW][1] = 58, -+ [0][0][0][0][RTW89_WW][2] = 58, -+ [0][0][0][0][RTW89_WW][3] = 58, -+ [0][0][0][0][RTW89_WW][4] = 58, -+ [0][0][0][0][RTW89_WW][5] = 58, -+ [0][0][0][0][RTW89_WW][6] = 58, -+ [0][0][0][0][RTW89_WW][7] = 58, -+ [0][0][0][0][RTW89_WW][8] = 58, -+ [0][0][0][0][RTW89_WW][9] = 58, -+ [0][0][0][0][RTW89_WW][10] = 58, -+ [0][0][0][0][RTW89_WW][11] = 58, -+ [0][0][0][0][RTW89_WW][12] = 52, -+ [0][0][0][0][RTW89_WW][13] = 76, -+ [0][1][0][0][RTW89_WW][0] = 0, -+ [0][1][0][0][RTW89_WW][1] = 0, -+ [0][1][0][0][RTW89_WW][2] = 0, -+ [0][1][0][0][RTW89_WW][3] = 0, -+ [0][1][0][0][RTW89_WW][4] = 0, -+ [0][1][0][0][RTW89_WW][5] = 0, -+ [0][1][0][0][RTW89_WW][6] = 0, -+ [0][1][0][0][RTW89_WW][7] = 0, -+ [0][1][0][0][RTW89_WW][8] = 0, -+ [0][1][0][0][RTW89_WW][9] = 0, -+ [0][1][0][0][RTW89_WW][10] = 0, -+ [0][1][0][0][RTW89_WW][11] = 0, -+ [0][1][0][0][RTW89_WW][12] = 0, -+ [0][1][0][0][RTW89_WW][13] = 0, -+ [1][0][0][0][RTW89_WW][0] = 0, -+ [1][0][0][0][RTW89_WW][1] = 0, -+ [1][0][0][0][RTW89_WW][2] = 58, -+ [1][0][0][0][RTW89_WW][3] = 58, -+ [1][0][0][0][RTW89_WW][4] = 58, -+ [1][0][0][0][RTW89_WW][5] = 58, -+ [1][0][0][0][RTW89_WW][6] = 58, -+ [1][0][0][0][RTW89_WW][7] = 58, -+ [1][0][0][0][RTW89_WW][8] = 58, -+ [1][0][0][0][RTW89_WW][9] = 58, -+ [1][0][0][0][RTW89_WW][10] = 58, -+ [1][0][0][0][RTW89_WW][11] = 0, -+ [1][0][0][0][RTW89_WW][12] = 0, -+ [1][0][0][0][RTW89_WW][13] = 0, -+ [1][1][0][0][RTW89_WW][0] = 0, -+ [1][1][0][0][RTW89_WW][1] = 0, -+ [1][1][0][0][RTW89_WW][2] = 0, -+ [1][1][0][0][RTW89_WW][3] = 0, -+ [1][1][0][0][RTW89_WW][4] = 0, -+ [1][1][0][0][RTW89_WW][5] = 0, -+ [1][1][0][0][RTW89_WW][6] = 0, -+ [1][1][0][0][RTW89_WW][7] = 0, -+ [1][1][0][0][RTW89_WW][8] = 0, -+ [1][1][0][0][RTW89_WW][9] = 0, -+ [1][1][0][0][RTW89_WW][10] = 0, -+ [1][1][0][0][RTW89_WW][11] = 0, -+ [1][1][0][0][RTW89_WW][12] = 0, -+ [1][1][0][0][RTW89_WW][13] = 0, -+ [0][0][1][0][RTW89_WW][0] = 58, -+ [0][0][1][0][RTW89_WW][1] = 60, -+ [0][0][1][0][RTW89_WW][2] = 60, -+ [0][0][1][0][RTW89_WW][3] = 60, -+ [0][0][1][0][RTW89_WW][4] = 60, -+ [0][0][1][0][RTW89_WW][5] = 60, -+ [0][0][1][0][RTW89_WW][6] = 60, -+ [0][0][1][0][RTW89_WW][7] = 60, -+ [0][0][1][0][RTW89_WW][8] = 60, -+ [0][0][1][0][RTW89_WW][9] = 60, -+ [0][0][1][0][RTW89_WW][10] = 60, -+ [0][0][1][0][RTW89_WW][11] = 60, -+ [0][0][1][0][RTW89_WW][12] = 58, -+ [0][0][1][0][RTW89_WW][13] = 0, -+ [0][1][1][0][RTW89_WW][0] = 0, -+ [0][1][1][0][RTW89_WW][1] = 0, -+ [0][1][1][0][RTW89_WW][2] = 0, -+ [0][1][1][0][RTW89_WW][3] = 0, -+ [0][1][1][0][RTW89_WW][4] = 0, -+ [0][1][1][0][RTW89_WW][5] = 0, -+ [0][1][1][0][RTW89_WW][6] = 0, -+ [0][1][1][0][RTW89_WW][7] = 0, -+ [0][1][1][0][RTW89_WW][8] = 0, -+ [0][1][1][0][RTW89_WW][9] = 0, -+ [0][1][1][0][RTW89_WW][10] = 0, -+ [0][1][1][0][RTW89_WW][11] = 0, -+ [0][1][1][0][RTW89_WW][12] = 0, -+ [0][1][1][0][RTW89_WW][13] = 0, -+ [0][0][2][0][RTW89_WW][0] = 60, -+ [0][0][2][0][RTW89_WW][1] = 60, -+ [0][0][2][0][RTW89_WW][2] = 60, -+ [0][0][2][0][RTW89_WW][3] = 60, -+ [0][0][2][0][RTW89_WW][4] = 60, -+ [0][0][2][0][RTW89_WW][5] = 60, -+ [0][0][2][0][RTW89_WW][6] = 60, -+ [0][0][2][0][RTW89_WW][7] = 60, -+ [0][0][2][0][RTW89_WW][8] = 60, -+ [0][0][2][0][RTW89_WW][9] = 60, -+ [0][0][2][0][RTW89_WW][10] = 60, -+ [0][0][2][0][RTW89_WW][11] = 60, -+ [0][0][2][0][RTW89_WW][12] = 60, -+ [0][0][2][0][RTW89_WW][13] = 0, -+ [0][1][2][0][RTW89_WW][0] = 0, -+ [0][1][2][0][RTW89_WW][1] = 0, -+ [0][1][2][0][RTW89_WW][2] = 0, -+ [0][1][2][0][RTW89_WW][3] = 0, -+ [0][1][2][0][RTW89_WW][4] = 0, -+ [0][1][2][0][RTW89_WW][5] = 0, -+ [0][1][2][0][RTW89_WW][6] = 0, -+ [0][1][2][0][RTW89_WW][7] = 0, -+ [0][1][2][0][RTW89_WW][8] = 0, -+ [0][1][2][0][RTW89_WW][9] = 0, -+ [0][1][2][0][RTW89_WW][10] = 0, -+ [0][1][2][0][RTW89_WW][11] = 0, -+ [0][1][2][0][RTW89_WW][12] = 0, -+ [0][1][2][0][RTW89_WW][13] = 0, -+ [0][1][2][1][RTW89_WW][0] = 0, -+ [0][1][2][1][RTW89_WW][1] = 0, -+ [0][1][2][1][RTW89_WW][2] = 0, -+ [0][1][2][1][RTW89_WW][3] = 0, -+ [0][1][2][1][RTW89_WW][4] = 0, -+ [0][1][2][1][RTW89_WW][5] = 0, -+ [0][1][2][1][RTW89_WW][6] = 0, -+ [0][1][2][1][RTW89_WW][7] = 0, -+ [0][1][2][1][RTW89_WW][8] = 0, -+ [0][1][2][1][RTW89_WW][9] = 0, -+ [0][1][2][1][RTW89_WW][10] = 0, -+ [0][1][2][1][RTW89_WW][11] = 0, -+ [0][1][2][1][RTW89_WW][12] = 0, -+ [0][1][2][1][RTW89_WW][13] = 0, -+ [1][0][2][0][RTW89_WW][0] = 0, -+ [1][0][2][0][RTW89_WW][1] = 0, -+ [1][0][2][0][RTW89_WW][2] = 58, -+ [1][0][2][0][RTW89_WW][3] = 58, -+ [1][0][2][0][RTW89_WW][4] = 58, -+ [1][0][2][0][RTW89_WW][5] = 58, -+ [1][0][2][0][RTW89_WW][6] = 58, -+ [1][0][2][0][RTW89_WW][7] = 58, -+ [1][0][2][0][RTW89_WW][8] = 58, -+ [1][0][2][0][RTW89_WW][9] = 58, -+ [1][0][2][0][RTW89_WW][10] = 58, -+ [1][0][2][0][RTW89_WW][11] = 0, -+ [1][0][2][0][RTW89_WW][12] = 0, -+ [1][0][2][0][RTW89_WW][13] = 0, -+ [1][1][2][0][RTW89_WW][0] = 0, -+ [1][1][2][0][RTW89_WW][1] = 0, -+ [1][1][2][0][RTW89_WW][2] = 0, -+ [1][1][2][0][RTW89_WW][3] = 0, -+ [1][1][2][0][RTW89_WW][4] = 0, -+ [1][1][2][0][RTW89_WW][5] = 0, -+ [1][1][2][0][RTW89_WW][6] = 0, -+ [1][1][2][0][RTW89_WW][7] = 0, -+ [1][1][2][0][RTW89_WW][8] = 0, -+ [1][1][2][0][RTW89_WW][9] = 0, -+ [1][1][2][0][RTW89_WW][10] = 0, -+ [1][1][2][0][RTW89_WW][11] = 0, -+ [1][1][2][0][RTW89_WW][12] = 0, -+ [1][1][2][0][RTW89_WW][13] = 0, -+ [1][1][2][1][RTW89_WW][0] = 0, -+ [1][1][2][1][RTW89_WW][1] = 0, -+ [1][1][2][1][RTW89_WW][2] = 0, -+ [1][1][2][1][RTW89_WW][3] = 0, -+ [1][1][2][1][RTW89_WW][4] = 0, -+ [1][1][2][1][RTW89_WW][5] = 0, -+ [1][1][2][1][RTW89_WW][6] = 0, -+ [1][1][2][1][RTW89_WW][7] = 0, -+ [1][1][2][1][RTW89_WW][8] = 0, -+ [1][1][2][1][RTW89_WW][9] = 0, -+ [1][1][2][1][RTW89_WW][10] = 0, -+ [1][1][2][1][RTW89_WW][11] = 0, -+ [1][1][2][1][RTW89_WW][12] = 0, -+ [1][1][2][1][RTW89_WW][13] = 0, -+ [0][0][0][0][RTW89_FCC][0] = 84, -+ [0][0][0][0][RTW89_ETSI][0] = 58, -+ [0][0][0][0][RTW89_MKK][0] = 68, -+ [0][0][0][0][RTW89_IC][0] = 84, -+ [0][0][0][0][RTW89_KCC][0] = 68, -+ [0][0][0][0][RTW89_ACMA][0] = 58, -+ [0][0][0][0][RTW89_CN][0] = 60, -+ [0][0][0][0][RTW89_UK][0] = 58, -+ [0][0][0][0][RTW89_FCC][1] = 84, -+ [0][0][0][0][RTW89_ETSI][1] = 58, -+ [0][0][0][0][RTW89_MKK][1] = 68, -+ [0][0][0][0][RTW89_IC][1] = 84, -+ [0][0][0][0][RTW89_KCC][1] = 68, -+ [0][0][0][0][RTW89_ACMA][1] = 58, -+ [0][0][0][0][RTW89_CN][1] = 60, -+ [0][0][0][0][RTW89_UK][1] = 58, -+ [0][0][0][0][RTW89_FCC][2] = 84, -+ [0][0][0][0][RTW89_ETSI][2] = 58, -+ [0][0][0][0][RTW89_MKK][2] = 68, -+ [0][0][0][0][RTW89_IC][2] = 84, -+ [0][0][0][0][RTW89_KCC][2] = 68, -+ [0][0][0][0][RTW89_ACMA][2] = 58, -+ [0][0][0][0][RTW89_CN][2] = 60, -+ [0][0][0][0][RTW89_UK][2] = 58, -+ [0][0][0][0][RTW89_FCC][3] = 84, -+ [0][0][0][0][RTW89_ETSI][3] = 58, -+ [0][0][0][0][RTW89_MKK][3] = 68, -+ [0][0][0][0][RTW89_IC][3] = 84, -+ [0][0][0][0][RTW89_KCC][3] = 68, -+ [0][0][0][0][RTW89_ACMA][3] = 58, -+ [0][0][0][0][RTW89_CN][3] = 60, -+ [0][0][0][0][RTW89_UK][3] = 58, -+ [0][0][0][0][RTW89_FCC][4] = 84, -+ [0][0][0][0][RTW89_ETSI][4] = 58, -+ [0][0][0][0][RTW89_MKK][4] = 68, -+ [0][0][0][0][RTW89_IC][4] = 84, -+ [0][0][0][0][RTW89_KCC][4] = 68, -+ [0][0][0][0][RTW89_ACMA][4] = 58, -+ [0][0][0][0][RTW89_CN][4] = 60, -+ [0][0][0][0][RTW89_UK][4] = 58, -+ [0][0][0][0][RTW89_FCC][5] = 84, -+ [0][0][0][0][RTW89_ETSI][5] = 58, -+ [0][0][0][0][RTW89_MKK][5] = 68, -+ [0][0][0][0][RTW89_IC][5] = 84, -+ [0][0][0][0][RTW89_KCC][5] = 68, -+ [0][0][0][0][RTW89_ACMA][5] = 58, -+ [0][0][0][0][RTW89_CN][5] = 60, -+ [0][0][0][0][RTW89_UK][5] = 58, -+ [0][0][0][0][RTW89_FCC][6] = 84, -+ [0][0][0][0][RTW89_ETSI][6] = 58, -+ [0][0][0][0][RTW89_MKK][6] = 68, -+ [0][0][0][0][RTW89_IC][6] = 84, -+ [0][0][0][0][RTW89_KCC][6] = 68, -+ [0][0][0][0][RTW89_ACMA][6] = 58, -+ [0][0][0][0][RTW89_CN][6] = 60, -+ [0][0][0][0][RTW89_UK][6] = 58, -+ [0][0][0][0][RTW89_FCC][7] = 84, -+ [0][0][0][0][RTW89_ETSI][7] = 58, -+ [0][0][0][0][RTW89_MKK][7] = 68, -+ [0][0][0][0][RTW89_IC][7] = 84, -+ [0][0][0][0][RTW89_KCC][7] = 68, -+ [0][0][0][0][RTW89_ACMA][7] = 58, -+ [0][0][0][0][RTW89_CN][7] = 60, -+ [0][0][0][0][RTW89_UK][7] = 58, -+ [0][0][0][0][RTW89_FCC][8] = 84, -+ [0][0][0][0][RTW89_ETSI][8] = 58, -+ [0][0][0][0][RTW89_MKK][8] = 68, -+ [0][0][0][0][RTW89_IC][8] = 84, -+ [0][0][0][0][RTW89_KCC][8] = 68, -+ [0][0][0][0][RTW89_ACMA][8] = 58, -+ [0][0][0][0][RTW89_CN][8] = 60, -+ [0][0][0][0][RTW89_UK][8] = 58, -+ [0][0][0][0][RTW89_FCC][9] = 84, -+ [0][0][0][0][RTW89_ETSI][9] = 58, -+ [0][0][0][0][RTW89_MKK][9] = 68, -+ [0][0][0][0][RTW89_IC][9] = 84, -+ [0][0][0][0][RTW89_KCC][9] = 68, -+ [0][0][0][0][RTW89_ACMA][9] = 58, -+ [0][0][0][0][RTW89_CN][9] = 60, -+ [0][0][0][0][RTW89_UK][9] = 58, -+ [0][0][0][0][RTW89_FCC][10] = 82, -+ [0][0][0][0][RTW89_ETSI][10] = 58, -+ [0][0][0][0][RTW89_MKK][10] = 68, -+ [0][0][0][0][RTW89_IC][10] = 82, -+ [0][0][0][0][RTW89_KCC][10] = 68, -+ [0][0][0][0][RTW89_ACMA][10] = 58, -+ [0][0][0][0][RTW89_CN][10] = 60, -+ [0][0][0][0][RTW89_UK][10] = 58, -+ [0][0][0][0][RTW89_FCC][11] = 62, -+ [0][0][0][0][RTW89_ETSI][11] = 58, -+ [0][0][0][0][RTW89_MKK][11] = 68, -+ [0][0][0][0][RTW89_IC][11] = 62, -+ [0][0][0][0][RTW89_KCC][11] = 68, -+ [0][0][0][0][RTW89_ACMA][11] = 58, -+ [0][0][0][0][RTW89_CN][11] = 60, -+ [0][0][0][0][RTW89_UK][11] = 58, -+ [0][0][0][0][RTW89_FCC][12] = 52, -+ [0][0][0][0][RTW89_ETSI][12] = 58, -+ [0][0][0][0][RTW89_MKK][12] = 68, -+ [0][0][0][0][RTW89_IC][12] = 52, -+ [0][0][0][0][RTW89_KCC][12] = 68, -+ [0][0][0][0][RTW89_ACMA][12] = 58, -+ [0][0][0][0][RTW89_CN][12] = 60, -+ [0][0][0][0][RTW89_UK][12] = 58, -+ [0][0][0][0][RTW89_FCC][13] = 127, -+ [0][0][0][0][RTW89_ETSI][13] = 127, -+ [0][0][0][0][RTW89_MKK][13] = 76, -+ [0][0][0][0][RTW89_IC][13] = 127, -+ [0][0][0][0][RTW89_KCC][13] = 127, -+ [0][0][0][0][RTW89_ACMA][13] = 127, -+ [0][0][0][0][RTW89_CN][13] = 127, -+ [0][0][0][0][RTW89_UK][13] = 127, -+ [0][1][0][0][RTW89_FCC][0] = 127, -+ [0][1][0][0][RTW89_ETSI][0] = 127, -+ [0][1][0][0][RTW89_MKK][0] = 127, -+ [0][1][0][0][RTW89_IC][0] = 127, -+ [0][1][0][0][RTW89_KCC][0] = 127, -+ [0][1][0][0][RTW89_ACMA][0] = 127, -+ [0][1][0][0][RTW89_CN][0] = 127, -+ [0][1][0][0][RTW89_UK][0] = 127, -+ [0][1][0][0][RTW89_FCC][1] = 127, -+ [0][1][0][0][RTW89_ETSI][1] = 127, -+ [0][1][0][0][RTW89_MKK][1] = 127, -+ [0][1][0][0][RTW89_IC][1] = 127, -+ [0][1][0][0][RTW89_KCC][1] = 127, -+ [0][1][0][0][RTW89_ACMA][1] = 127, -+ [0][1][0][0][RTW89_CN][1] = 127, -+ [0][1][0][0][RTW89_UK][1] = 127, -+ [0][1][0][0][RTW89_FCC][2] = 127, -+ [0][1][0][0][RTW89_ETSI][2] = 127, -+ [0][1][0][0][RTW89_MKK][2] = 127, -+ [0][1][0][0][RTW89_IC][2] = 127, -+ [0][1][0][0][RTW89_KCC][2] = 127, -+ [0][1][0][0][RTW89_ACMA][2] = 127, -+ [0][1][0][0][RTW89_CN][2] = 127, -+ [0][1][0][0][RTW89_UK][2] = 127, -+ [0][1][0][0][RTW89_FCC][3] = 127, -+ [0][1][0][0][RTW89_ETSI][3] = 127, -+ [0][1][0][0][RTW89_MKK][3] = 127, -+ [0][1][0][0][RTW89_IC][3] = 127, -+ [0][1][0][0][RTW89_KCC][3] = 127, -+ [0][1][0][0][RTW89_ACMA][3] = 127, -+ [0][1][0][0][RTW89_CN][3] = 127, -+ [0][1][0][0][RTW89_UK][3] = 127, -+ [0][1][0][0][RTW89_FCC][4] = 127, -+ [0][1][0][0][RTW89_ETSI][4] = 127, -+ [0][1][0][0][RTW89_MKK][4] = 127, -+ [0][1][0][0][RTW89_IC][4] = 127, -+ [0][1][0][0][RTW89_KCC][4] = 127, -+ [0][1][0][0][RTW89_ACMA][4] = 127, -+ [0][1][0][0][RTW89_CN][4] = 127, -+ [0][1][0][0][RTW89_UK][4] = 127, -+ [0][1][0][0][RTW89_FCC][5] = 127, -+ [0][1][0][0][RTW89_ETSI][5] = 127, -+ [0][1][0][0][RTW89_MKK][5] = 127, -+ [0][1][0][0][RTW89_IC][5] = 127, -+ [0][1][0][0][RTW89_KCC][5] = 127, -+ [0][1][0][0][RTW89_ACMA][5] = 127, -+ [0][1][0][0][RTW89_CN][5] = 127, -+ [0][1][0][0][RTW89_UK][5] = 127, -+ [0][1][0][0][RTW89_FCC][6] = 127, -+ [0][1][0][0][RTW89_ETSI][6] = 127, -+ [0][1][0][0][RTW89_MKK][6] = 127, -+ [0][1][0][0][RTW89_IC][6] = 127, -+ [0][1][0][0][RTW89_KCC][6] = 127, -+ [0][1][0][0][RTW89_ACMA][6] = 127, -+ [0][1][0][0][RTW89_CN][6] = 127, -+ [0][1][0][0][RTW89_UK][6] = 127, -+ [0][1][0][0][RTW89_FCC][7] = 127, -+ [0][1][0][0][RTW89_ETSI][7] = 127, -+ [0][1][0][0][RTW89_MKK][7] = 127, -+ [0][1][0][0][RTW89_IC][7] = 127, -+ [0][1][0][0][RTW89_KCC][7] = 127, -+ [0][1][0][0][RTW89_ACMA][7] = 127, -+ [0][1][0][0][RTW89_CN][7] = 127, -+ [0][1][0][0][RTW89_UK][7] = 127, -+ [0][1][0][0][RTW89_FCC][8] = 127, -+ [0][1][0][0][RTW89_ETSI][8] = 127, -+ [0][1][0][0][RTW89_MKK][8] = 127, -+ [0][1][0][0][RTW89_IC][8] = 127, -+ [0][1][0][0][RTW89_KCC][8] = 127, -+ [0][1][0][0][RTW89_ACMA][8] = 127, -+ [0][1][0][0][RTW89_CN][8] = 127, -+ [0][1][0][0][RTW89_UK][8] = 127, -+ [0][1][0][0][RTW89_FCC][9] = 127, -+ [0][1][0][0][RTW89_ETSI][9] = 127, -+ [0][1][0][0][RTW89_MKK][9] = 127, -+ [0][1][0][0][RTW89_IC][9] = 127, -+ [0][1][0][0][RTW89_KCC][9] = 127, -+ [0][1][0][0][RTW89_ACMA][9] = 127, -+ [0][1][0][0][RTW89_CN][9] = 127, -+ [0][1][0][0][RTW89_UK][9] = 127, -+ [0][1][0][0][RTW89_FCC][10] = 127, -+ [0][1][0][0][RTW89_ETSI][10] = 127, -+ [0][1][0][0][RTW89_MKK][10] = 127, -+ [0][1][0][0][RTW89_IC][10] = 127, -+ [0][1][0][0][RTW89_KCC][10] = 127, -+ [0][1][0][0][RTW89_ACMA][10] = 127, -+ [0][1][0][0][RTW89_CN][10] = 127, -+ [0][1][0][0][RTW89_UK][10] = 127, -+ [0][1][0][0][RTW89_FCC][11] = 127, -+ [0][1][0][0][RTW89_ETSI][11] = 127, -+ [0][1][0][0][RTW89_MKK][11] = 127, -+ [0][1][0][0][RTW89_IC][11] = 127, -+ [0][1][0][0][RTW89_KCC][11] = 127, -+ [0][1][0][0][RTW89_ACMA][11] = 127, -+ [0][1][0][0][RTW89_CN][11] = 127, -+ [0][1][0][0][RTW89_UK][11] = 127, -+ [0][1][0][0][RTW89_FCC][12] = 127, -+ [0][1][0][0][RTW89_ETSI][12] = 127, -+ [0][1][0][0][RTW89_MKK][12] = 127, -+ [0][1][0][0][RTW89_IC][12] = 127, -+ [0][1][0][0][RTW89_KCC][12] = 127, -+ [0][1][0][0][RTW89_ACMA][12] = 127, -+ [0][1][0][0][RTW89_CN][12] = 127, -+ [0][1][0][0][RTW89_UK][12] = 127, -+ [0][1][0][0][RTW89_FCC][13] = 127, -+ [0][1][0][0][RTW89_ETSI][13] = 127, -+ [0][1][0][0][RTW89_MKK][13] = 127, -+ [0][1][0][0][RTW89_IC][13] = 127, -+ [0][1][0][0][RTW89_KCC][13] = 127, -+ [0][1][0][0][RTW89_ACMA][13] = 127, -+ [0][1][0][0][RTW89_CN][13] = 127, -+ [0][1][0][0][RTW89_UK][13] = 127, -+ [1][0][0][0][RTW89_FCC][0] = 127, -+ [1][0][0][0][RTW89_ETSI][0] = 127, -+ [1][0][0][0][RTW89_MKK][0] = 127, -+ [1][0][0][0][RTW89_IC][0] = 127, -+ [1][0][0][0][RTW89_KCC][0] = 127, -+ [1][0][0][0][RTW89_ACMA][0] = 127, -+ [1][0][0][0][RTW89_CN][0] = 127, -+ [1][0][0][0][RTW89_UK][0] = 127, -+ [1][0][0][0][RTW89_FCC][1] = 127, -+ [1][0][0][0][RTW89_ETSI][1] = 127, -+ [1][0][0][0][RTW89_MKK][1] = 127, -+ [1][0][0][0][RTW89_IC][1] = 127, -+ [1][0][0][0][RTW89_KCC][1] = 127, -+ [1][0][0][0][RTW89_ACMA][1] = 127, -+ [1][0][0][0][RTW89_CN][1] = 127, -+ [1][0][0][0][RTW89_UK][1] = 127, -+ [1][0][0][0][RTW89_FCC][2] = 127, -+ [1][0][0][0][RTW89_ETSI][2] = 58, -+ [1][0][0][0][RTW89_MKK][2] = 70, -+ [1][0][0][0][RTW89_IC][2] = 127, -+ [1][0][0][0][RTW89_KCC][2] = 68, -+ [1][0][0][0][RTW89_ACMA][2] = 58, -+ [1][0][0][0][RTW89_CN][2] = 60, -+ [1][0][0][0][RTW89_UK][2] = 58, -+ [1][0][0][0][RTW89_FCC][3] = 127, -+ [1][0][0][0][RTW89_ETSI][3] = 58, -+ [1][0][0][0][RTW89_MKK][3] = 76, -+ [1][0][0][0][RTW89_IC][3] = 127, -+ [1][0][0][0][RTW89_KCC][3] = 68, -+ [1][0][0][0][RTW89_ACMA][3] = 58, -+ [1][0][0][0][RTW89_CN][3] = 60, -+ [1][0][0][0][RTW89_UK][3] = 58, -+ [1][0][0][0][RTW89_FCC][4] = 127, -+ [1][0][0][0][RTW89_ETSI][4] = 58, -+ [1][0][0][0][RTW89_MKK][4] = 76, -+ [1][0][0][0][RTW89_IC][4] = 127, -+ [1][0][0][0][RTW89_KCC][4] = 68, -+ [1][0][0][0][RTW89_ACMA][4] = 58, -+ [1][0][0][0][RTW89_CN][4] = 60, -+ [1][0][0][0][RTW89_UK][4] = 58, -+ [1][0][0][0][RTW89_FCC][5] = 127, -+ [1][0][0][0][RTW89_ETSI][5] = 58, -+ [1][0][0][0][RTW89_MKK][5] = 76, -+ [1][0][0][0][RTW89_IC][5] = 127, -+ [1][0][0][0][RTW89_KCC][5] = 68, -+ [1][0][0][0][RTW89_ACMA][5] = 58, -+ [1][0][0][0][RTW89_CN][5] = 60, -+ [1][0][0][0][RTW89_UK][5] = 58, -+ [1][0][0][0][RTW89_FCC][6] = 127, -+ [1][0][0][0][RTW89_ETSI][6] = 58, -+ [1][0][0][0][RTW89_MKK][6] = 76, -+ [1][0][0][0][RTW89_IC][6] = 127, -+ [1][0][0][0][RTW89_KCC][6] = 68, -+ [1][0][0][0][RTW89_ACMA][6] = 58, -+ [1][0][0][0][RTW89_CN][6] = 60, -+ [1][0][0][0][RTW89_UK][6] = 58, -+ [1][0][0][0][RTW89_FCC][7] = 127, -+ [1][0][0][0][RTW89_ETSI][7] = 58, -+ [1][0][0][0][RTW89_MKK][7] = 76, -+ [1][0][0][0][RTW89_IC][7] = 127, -+ [1][0][0][0][RTW89_KCC][7] = 68, -+ [1][0][0][0][RTW89_ACMA][7] = 58, -+ [1][0][0][0][RTW89_CN][7] = 60, -+ [1][0][0][0][RTW89_UK][7] = 58, -+ [1][0][0][0][RTW89_FCC][8] = 127, -+ [1][0][0][0][RTW89_ETSI][8] = 58, -+ [1][0][0][0][RTW89_MKK][8] = 76, -+ [1][0][0][0][RTW89_IC][8] = 127, -+ [1][0][0][0][RTW89_KCC][8] = 68, -+ [1][0][0][0][RTW89_ACMA][8] = 58, -+ [1][0][0][0][RTW89_CN][8] = 60, -+ [1][0][0][0][RTW89_UK][8] = 58, -+ [1][0][0][0][RTW89_FCC][9] = 127, -+ [1][0][0][0][RTW89_ETSI][9] = 58, -+ [1][0][0][0][RTW89_MKK][9] = 76, -+ [1][0][0][0][RTW89_IC][9] = 127, -+ [1][0][0][0][RTW89_KCC][9] = 68, -+ [1][0][0][0][RTW89_ACMA][9] = 58, -+ [1][0][0][0][RTW89_CN][9] = 60, -+ [1][0][0][0][RTW89_UK][9] = 58, -+ [1][0][0][0][RTW89_FCC][10] = 127, -+ [1][0][0][0][RTW89_ETSI][10] = 58, -+ [1][0][0][0][RTW89_MKK][10] = 66, -+ [1][0][0][0][RTW89_IC][10] = 127, -+ [1][0][0][0][RTW89_KCC][10] = 68, -+ [1][0][0][0][RTW89_ACMA][10] = 58, -+ [1][0][0][0][RTW89_CN][10] = 60, -+ [1][0][0][0][RTW89_UK][10] = 58, -+ [1][0][0][0][RTW89_FCC][11] = 127, -+ [1][0][0][0][RTW89_ETSI][11] = 127, -+ [1][0][0][0][RTW89_MKK][11] = 127, -+ [1][0][0][0][RTW89_IC][11] = 127, -+ [1][0][0][0][RTW89_KCC][11] = 127, -+ [1][0][0][0][RTW89_ACMA][11] = 127, -+ [1][0][0][0][RTW89_CN][11] = 127, -+ [1][0][0][0][RTW89_UK][11] = 127, -+ [1][0][0][0][RTW89_FCC][12] = 127, -+ [1][0][0][0][RTW89_ETSI][12] = 127, -+ [1][0][0][0][RTW89_MKK][12] = 127, -+ [1][0][0][0][RTW89_IC][12] = 127, -+ [1][0][0][0][RTW89_KCC][12] = 127, -+ [1][0][0][0][RTW89_ACMA][12] = 127, -+ [1][0][0][0][RTW89_CN][12] = 127, -+ [1][0][0][0][RTW89_UK][12] = 127, -+ [1][0][0][0][RTW89_FCC][13] = 127, -+ [1][0][0][0][RTW89_ETSI][13] = 127, -+ [1][0][0][0][RTW89_MKK][13] = 127, -+ [1][0][0][0][RTW89_IC][13] = 127, -+ [1][0][0][0][RTW89_KCC][13] = 127, -+ [1][0][0][0][RTW89_ACMA][13] = 127, -+ [1][0][0][0][RTW89_CN][13] = 127, -+ [1][0][0][0][RTW89_UK][13] = 127, -+ [1][1][0][0][RTW89_FCC][0] = 127, -+ [1][1][0][0][RTW89_ETSI][0] = 127, -+ [1][1][0][0][RTW89_MKK][0] = 127, -+ [1][1][0][0][RTW89_IC][0] = 127, -+ [1][1][0][0][RTW89_KCC][0] = 127, -+ [1][1][0][0][RTW89_ACMA][0] = 127, -+ [1][1][0][0][RTW89_CN][0] = 127, -+ [1][1][0][0][RTW89_UK][0] = 127, -+ [1][1][0][0][RTW89_FCC][1] = 127, -+ [1][1][0][0][RTW89_ETSI][1] = 127, -+ [1][1][0][0][RTW89_MKK][1] = 127, -+ [1][1][0][0][RTW89_IC][1] = 127, -+ [1][1][0][0][RTW89_KCC][1] = 127, -+ [1][1][0][0][RTW89_ACMA][1] = 127, -+ [1][1][0][0][RTW89_CN][1] = 127, -+ [1][1][0][0][RTW89_UK][1] = 127, -+ [1][1][0][0][RTW89_FCC][2] = 127, -+ [1][1][0][0][RTW89_ETSI][2] = 127, -+ [1][1][0][0][RTW89_MKK][2] = 127, -+ [1][1][0][0][RTW89_IC][2] = 127, -+ [1][1][0][0][RTW89_KCC][2] = 127, -+ [1][1][0][0][RTW89_ACMA][2] = 127, -+ [1][1][0][0][RTW89_CN][2] = 127, -+ [1][1][0][0][RTW89_UK][2] = 127, -+ [1][1][0][0][RTW89_FCC][3] = 127, -+ [1][1][0][0][RTW89_ETSI][3] = 127, -+ [1][1][0][0][RTW89_MKK][3] = 127, -+ [1][1][0][0][RTW89_IC][3] = 127, -+ [1][1][0][0][RTW89_KCC][3] = 127, -+ [1][1][0][0][RTW89_ACMA][3] = 127, -+ [1][1][0][0][RTW89_CN][3] = 127, -+ [1][1][0][0][RTW89_UK][3] = 127, -+ [1][1][0][0][RTW89_FCC][4] = 127, -+ [1][1][0][0][RTW89_ETSI][4] = 127, -+ [1][1][0][0][RTW89_MKK][4] = 127, -+ [1][1][0][0][RTW89_IC][4] = 127, -+ [1][1][0][0][RTW89_KCC][4] = 127, -+ [1][1][0][0][RTW89_ACMA][4] = 127, -+ [1][1][0][0][RTW89_CN][4] = 127, -+ [1][1][0][0][RTW89_UK][4] = 127, -+ [1][1][0][0][RTW89_FCC][5] = 127, -+ [1][1][0][0][RTW89_ETSI][5] = 127, -+ [1][1][0][0][RTW89_MKK][5] = 127, -+ [1][1][0][0][RTW89_IC][5] = 127, -+ [1][1][0][0][RTW89_KCC][5] = 127, -+ [1][1][0][0][RTW89_ACMA][5] = 127, -+ [1][1][0][0][RTW89_CN][5] = 127, -+ [1][1][0][0][RTW89_UK][5] = 127, -+ [1][1][0][0][RTW89_FCC][6] = 127, -+ [1][1][0][0][RTW89_ETSI][6] = 127, -+ [1][1][0][0][RTW89_MKK][6] = 127, -+ [1][1][0][0][RTW89_IC][6] = 127, -+ [1][1][0][0][RTW89_KCC][6] = 127, -+ [1][1][0][0][RTW89_ACMA][6] = 127, -+ [1][1][0][0][RTW89_CN][6] = 127, -+ [1][1][0][0][RTW89_UK][6] = 127, -+ [1][1][0][0][RTW89_FCC][7] = 127, -+ [1][1][0][0][RTW89_ETSI][7] = 127, -+ [1][1][0][0][RTW89_MKK][7] = 127, -+ [1][1][0][0][RTW89_IC][7] = 127, -+ [1][1][0][0][RTW89_KCC][7] = 127, -+ [1][1][0][0][RTW89_ACMA][7] = 127, -+ [1][1][0][0][RTW89_CN][7] = 127, -+ [1][1][0][0][RTW89_UK][7] = 127, -+ [1][1][0][0][RTW89_FCC][8] = 127, -+ [1][1][0][0][RTW89_ETSI][8] = 127, -+ [1][1][0][0][RTW89_MKK][8] = 127, -+ [1][1][0][0][RTW89_IC][8] = 127, -+ [1][1][0][0][RTW89_KCC][8] = 127, -+ [1][1][0][0][RTW89_ACMA][8] = 127, -+ [1][1][0][0][RTW89_CN][8] = 127, -+ [1][1][0][0][RTW89_UK][8] = 127, -+ [1][1][0][0][RTW89_FCC][9] = 127, -+ [1][1][0][0][RTW89_ETSI][9] = 127, -+ [1][1][0][0][RTW89_MKK][9] = 127, -+ [1][1][0][0][RTW89_IC][9] = 127, -+ [1][1][0][0][RTW89_KCC][9] = 127, -+ [1][1][0][0][RTW89_ACMA][9] = 127, -+ [1][1][0][0][RTW89_CN][9] = 127, -+ [1][1][0][0][RTW89_UK][9] = 127, -+ [1][1][0][0][RTW89_FCC][10] = 127, -+ [1][1][0][0][RTW89_ETSI][10] = 127, -+ [1][1][0][0][RTW89_MKK][10] = 127, -+ [1][1][0][0][RTW89_IC][10] = 127, -+ [1][1][0][0][RTW89_KCC][10] = 127, -+ [1][1][0][0][RTW89_ACMA][10] = 127, -+ [1][1][0][0][RTW89_CN][10] = 127, -+ [1][1][0][0][RTW89_UK][10] = 127, -+ [1][1][0][0][RTW89_FCC][11] = 127, -+ [1][1][0][0][RTW89_ETSI][11] = 127, -+ [1][1][0][0][RTW89_MKK][11] = 127, -+ [1][1][0][0][RTW89_IC][11] = 127, -+ [1][1][0][0][RTW89_KCC][11] = 127, -+ [1][1][0][0][RTW89_ACMA][11] = 127, -+ [1][1][0][0][RTW89_CN][11] = 127, -+ [1][1][0][0][RTW89_UK][11] = 127, -+ [1][1][0][0][RTW89_FCC][12] = 127, -+ [1][1][0][0][RTW89_ETSI][12] = 127, -+ [1][1][0][0][RTW89_MKK][12] = 127, -+ [1][1][0][0][RTW89_IC][12] = 127, -+ [1][1][0][0][RTW89_KCC][12] = 127, -+ [1][1][0][0][RTW89_ACMA][12] = 127, -+ [1][1][0][0][RTW89_CN][12] = 127, -+ [1][1][0][0][RTW89_UK][12] = 127, -+ [1][1][0][0][RTW89_FCC][13] = 127, -+ [1][1][0][0][RTW89_ETSI][13] = 127, -+ [1][1][0][0][RTW89_MKK][13] = 127, -+ [1][1][0][0][RTW89_IC][13] = 127, -+ [1][1][0][0][RTW89_KCC][13] = 127, -+ [1][1][0][0][RTW89_ACMA][13] = 127, -+ [1][1][0][0][RTW89_CN][13] = 127, -+ [1][1][0][0][RTW89_UK][13] = 127, -+ [0][0][1][0][RTW89_FCC][0] = 80, -+ [0][0][1][0][RTW89_ETSI][0] = 58, -+ [0][0][1][0][RTW89_MKK][0] = 72, -+ [0][0][1][0][RTW89_IC][0] = 80, -+ [0][0][1][0][RTW89_KCC][0] = 78, -+ [0][0][1][0][RTW89_ACMA][0] = 58, -+ [0][0][1][0][RTW89_CN][0] = 60, -+ [0][0][1][0][RTW89_UK][0] = 58, -+ [0][0][1][0][RTW89_FCC][1] = 80, -+ [0][0][1][0][RTW89_ETSI][1] = 60, -+ [0][0][1][0][RTW89_MKK][1] = 74, -+ [0][0][1][0][RTW89_IC][1] = 80, -+ [0][0][1][0][RTW89_KCC][1] = 78, -+ [0][0][1][0][RTW89_ACMA][1] = 60, -+ [0][0][1][0][RTW89_CN][1] = 60, -+ [0][0][1][0][RTW89_UK][1] = 60, -+ [0][0][1][0][RTW89_FCC][2] = 84, -+ [0][0][1][0][RTW89_ETSI][2] = 60, -+ [0][0][1][0][RTW89_MKK][2] = 74, -+ [0][0][1][0][RTW89_IC][2] = 84, -+ [0][0][1][0][RTW89_KCC][2] = 78, -+ [0][0][1][0][RTW89_ACMA][2] = 60, -+ [0][0][1][0][RTW89_CN][2] = 60, -+ [0][0][1][0][RTW89_UK][2] = 60, -+ [0][0][1][0][RTW89_FCC][3] = 84, -+ [0][0][1][0][RTW89_ETSI][3] = 60, -+ [0][0][1][0][RTW89_MKK][3] = 74, -+ [0][0][1][0][RTW89_IC][3] = 84, -+ [0][0][1][0][RTW89_KCC][3] = 78, -+ [0][0][1][0][RTW89_ACMA][3] = 60, -+ [0][0][1][0][RTW89_CN][3] = 60, -+ [0][0][1][0][RTW89_UK][3] = 60, -+ [0][0][1][0][RTW89_FCC][4] = 84, -+ [0][0][1][0][RTW89_ETSI][4] = 60, -+ [0][0][1][0][RTW89_MKK][4] = 74, -+ [0][0][1][0][RTW89_IC][4] = 84, -+ [0][0][1][0][RTW89_KCC][4] = 76, -+ [0][0][1][0][RTW89_ACMA][4] = 60, -+ [0][0][1][0][RTW89_CN][4] = 60, -+ [0][0][1][0][RTW89_UK][4] = 60, -+ [0][0][1][0][RTW89_FCC][5] = 84, -+ [0][0][1][0][RTW89_ETSI][5] = 60, -+ [0][0][1][0][RTW89_MKK][5] = 74, -+ [0][0][1][0][RTW89_IC][5] = 84, -+ [0][0][1][0][RTW89_KCC][5] = 76, -+ [0][0][1][0][RTW89_ACMA][5] = 60, -+ [0][0][1][0][RTW89_CN][5] = 60, -+ [0][0][1][0][RTW89_UK][5] = 60, -+ [0][0][1][0][RTW89_FCC][6] = 84, -+ [0][0][1][0][RTW89_ETSI][6] = 60, -+ [0][0][1][0][RTW89_MKK][6] = 74, -+ [0][0][1][0][RTW89_IC][6] = 84, -+ [0][0][1][0][RTW89_KCC][6] = 76, -+ [0][0][1][0][RTW89_ACMA][6] = 60, -+ [0][0][1][0][RTW89_CN][6] = 60, -+ [0][0][1][0][RTW89_UK][6] = 60, -+ [0][0][1][0][RTW89_FCC][7] = 84, -+ [0][0][1][0][RTW89_ETSI][7] = 60, -+ [0][0][1][0][RTW89_MKK][7] = 74, -+ [0][0][1][0][RTW89_IC][7] = 84, -+ [0][0][1][0][RTW89_KCC][7] = 76, -+ [0][0][1][0][RTW89_ACMA][7] = 60, -+ [0][0][1][0][RTW89_CN][7] = 60, -+ [0][0][1][0][RTW89_UK][7] = 60, -+ [0][0][1][0][RTW89_FCC][8] = 80, -+ [0][0][1][0][RTW89_ETSI][8] = 60, -+ [0][0][1][0][RTW89_MKK][8] = 74, -+ [0][0][1][0][RTW89_IC][8] = 80, -+ [0][0][1][0][RTW89_KCC][8] = 76, -+ [0][0][1][0][RTW89_ACMA][8] = 60, -+ [0][0][1][0][RTW89_CN][8] = 60, -+ [0][0][1][0][RTW89_UK][8] = 60, -+ [0][0][1][0][RTW89_FCC][9] = 76, -+ [0][0][1][0][RTW89_ETSI][9] = 60, -+ [0][0][1][0][RTW89_MKK][9] = 74, -+ [0][0][1][0][RTW89_IC][9] = 76, -+ [0][0][1][0][RTW89_KCC][9] = 74, -+ [0][0][1][0][RTW89_ACMA][9] = 60, -+ [0][0][1][0][RTW89_CN][9] = 60, -+ [0][0][1][0][RTW89_UK][9] = 60, -+ [0][0][1][0][RTW89_FCC][10] = 76, -+ [0][0][1][0][RTW89_ETSI][10] = 60, -+ [0][0][1][0][RTW89_MKK][10] = 74, -+ [0][0][1][0][RTW89_IC][10] = 76, -+ [0][0][1][0][RTW89_KCC][10] = 74, -+ [0][0][1][0][RTW89_ACMA][10] = 60, -+ [0][0][1][0][RTW89_CN][10] = 60, -+ [0][0][1][0][RTW89_UK][10] = 60, -+ [0][0][1][0][RTW89_FCC][11] = 68, -+ [0][0][1][0][RTW89_ETSI][11] = 60, -+ [0][0][1][0][RTW89_MKK][11] = 74, -+ [0][0][1][0][RTW89_IC][11] = 68, -+ [0][0][1][0][RTW89_KCC][11] = 74, -+ [0][0][1][0][RTW89_ACMA][11] = 60, -+ [0][0][1][0][RTW89_CN][11] = 60, -+ [0][0][1][0][RTW89_UK][11] = 60, -+ [0][0][1][0][RTW89_FCC][12] = 64, -+ [0][0][1][0][RTW89_ETSI][12] = 58, -+ [0][0][1][0][RTW89_MKK][12] = 70, -+ [0][0][1][0][RTW89_IC][12] = 64, -+ [0][0][1][0][RTW89_KCC][12] = 74, -+ [0][0][1][0][RTW89_ACMA][12] = 58, -+ [0][0][1][0][RTW89_CN][12] = 60, -+ [0][0][1][0][RTW89_UK][12] = 58, -+ [0][0][1][0][RTW89_FCC][13] = 127, -+ [0][0][1][0][RTW89_ETSI][13] = 127, -+ [0][0][1][0][RTW89_MKK][13] = 127, -+ [0][0][1][0][RTW89_IC][13] = 127, -+ [0][0][1][0][RTW89_KCC][13] = 127, -+ [0][0][1][0][RTW89_ACMA][13] = 127, -+ [0][0][1][0][RTW89_CN][13] = 127, -+ [0][0][1][0][RTW89_UK][13] = 127, -+ [0][1][1][0][RTW89_FCC][0] = 127, -+ [0][1][1][0][RTW89_ETSI][0] = 127, -+ [0][1][1][0][RTW89_MKK][0] = 127, -+ [0][1][1][0][RTW89_IC][0] = 127, -+ [0][1][1][0][RTW89_KCC][0] = 127, -+ [0][1][1][0][RTW89_ACMA][0] = 127, -+ [0][1][1][0][RTW89_CN][0] = 127, -+ [0][1][1][0][RTW89_UK][0] = 127, -+ [0][1][1][0][RTW89_FCC][1] = 127, -+ [0][1][1][0][RTW89_ETSI][1] = 127, -+ [0][1][1][0][RTW89_MKK][1] = 127, -+ [0][1][1][0][RTW89_IC][1] = 127, -+ [0][1][1][0][RTW89_KCC][1] = 127, -+ [0][1][1][0][RTW89_ACMA][1] = 127, -+ [0][1][1][0][RTW89_CN][1] = 127, -+ [0][1][1][0][RTW89_UK][1] = 127, -+ [0][1][1][0][RTW89_FCC][2] = 127, -+ [0][1][1][0][RTW89_ETSI][2] = 127, -+ [0][1][1][0][RTW89_MKK][2] = 127, -+ [0][1][1][0][RTW89_IC][2] = 127, -+ [0][1][1][0][RTW89_KCC][2] = 127, -+ [0][1][1][0][RTW89_ACMA][2] = 127, -+ [0][1][1][0][RTW89_CN][2] = 127, -+ [0][1][1][0][RTW89_UK][2] = 127, -+ [0][1][1][0][RTW89_FCC][3] = 127, -+ [0][1][1][0][RTW89_ETSI][3] = 127, -+ [0][1][1][0][RTW89_MKK][3] = 127, -+ [0][1][1][0][RTW89_IC][3] = 127, -+ [0][1][1][0][RTW89_KCC][3] = 127, -+ [0][1][1][0][RTW89_ACMA][3] = 127, -+ [0][1][1][0][RTW89_CN][3] = 127, -+ [0][1][1][0][RTW89_UK][3] = 127, -+ [0][1][1][0][RTW89_FCC][4] = 127, -+ [0][1][1][0][RTW89_ETSI][4] = 127, -+ [0][1][1][0][RTW89_MKK][4] = 127, -+ [0][1][1][0][RTW89_IC][4] = 127, -+ [0][1][1][0][RTW89_KCC][4] = 127, -+ [0][1][1][0][RTW89_ACMA][4] = 127, -+ [0][1][1][0][RTW89_CN][4] = 127, -+ [0][1][1][0][RTW89_UK][4] = 127, -+ [0][1][1][0][RTW89_FCC][5] = 127, -+ [0][1][1][0][RTW89_ETSI][5] = 127, -+ [0][1][1][0][RTW89_MKK][5] = 127, -+ [0][1][1][0][RTW89_IC][5] = 127, -+ [0][1][1][0][RTW89_KCC][5] = 127, -+ [0][1][1][0][RTW89_ACMA][5] = 127, -+ [0][1][1][0][RTW89_CN][5] = 127, -+ [0][1][1][0][RTW89_UK][5] = 127, -+ [0][1][1][0][RTW89_FCC][6] = 127, -+ [0][1][1][0][RTW89_ETSI][6] = 127, -+ [0][1][1][0][RTW89_MKK][6] = 127, -+ [0][1][1][0][RTW89_IC][6] = 127, -+ [0][1][1][0][RTW89_KCC][6] = 127, -+ [0][1][1][0][RTW89_ACMA][6] = 127, -+ [0][1][1][0][RTW89_CN][6] = 127, -+ [0][1][1][0][RTW89_UK][6] = 127, -+ [0][1][1][0][RTW89_FCC][7] = 127, -+ [0][1][1][0][RTW89_ETSI][7] = 127, -+ [0][1][1][0][RTW89_MKK][7] = 127, -+ [0][1][1][0][RTW89_IC][7] = 127, -+ [0][1][1][0][RTW89_KCC][7] = 127, -+ [0][1][1][0][RTW89_ACMA][7] = 127, -+ [0][1][1][0][RTW89_CN][7] = 127, -+ [0][1][1][0][RTW89_UK][7] = 127, -+ [0][1][1][0][RTW89_FCC][8] = 127, -+ [0][1][1][0][RTW89_ETSI][8] = 127, -+ [0][1][1][0][RTW89_MKK][8] = 127, -+ [0][1][1][0][RTW89_IC][8] = 127, -+ [0][1][1][0][RTW89_KCC][8] = 127, -+ [0][1][1][0][RTW89_ACMA][8] = 127, -+ [0][1][1][0][RTW89_CN][8] = 127, -+ [0][1][1][0][RTW89_UK][8] = 127, -+ [0][1][1][0][RTW89_FCC][9] = 127, -+ [0][1][1][0][RTW89_ETSI][9] = 127, -+ [0][1][1][0][RTW89_MKK][9] = 127, -+ [0][1][1][0][RTW89_IC][9] = 127, -+ [0][1][1][0][RTW89_KCC][9] = 127, -+ [0][1][1][0][RTW89_ACMA][9] = 127, -+ [0][1][1][0][RTW89_CN][9] = 127, -+ [0][1][1][0][RTW89_UK][9] = 127, -+ [0][1][1][0][RTW89_FCC][10] = 127, -+ [0][1][1][0][RTW89_ETSI][10] = 127, -+ [0][1][1][0][RTW89_MKK][10] = 127, -+ [0][1][1][0][RTW89_IC][10] = 127, -+ [0][1][1][0][RTW89_KCC][10] = 127, -+ [0][1][1][0][RTW89_ACMA][10] = 127, -+ [0][1][1][0][RTW89_CN][10] = 127, -+ [0][1][1][0][RTW89_UK][10] = 127, -+ [0][1][1][0][RTW89_FCC][11] = 127, -+ [0][1][1][0][RTW89_ETSI][11] = 127, -+ [0][1][1][0][RTW89_MKK][11] = 127, -+ [0][1][1][0][RTW89_IC][11] = 127, -+ [0][1][1][0][RTW89_KCC][11] = 127, -+ [0][1][1][0][RTW89_ACMA][11] = 127, -+ [0][1][1][0][RTW89_CN][11] = 127, -+ [0][1][1][0][RTW89_UK][11] = 127, -+ [0][1][1][0][RTW89_FCC][12] = 127, -+ [0][1][1][0][RTW89_ETSI][12] = 127, -+ [0][1][1][0][RTW89_MKK][12] = 127, -+ [0][1][1][0][RTW89_IC][12] = 127, -+ [0][1][1][0][RTW89_KCC][12] = 127, -+ [0][1][1][0][RTW89_ACMA][12] = 127, -+ [0][1][1][0][RTW89_CN][12] = 127, -+ [0][1][1][0][RTW89_UK][12] = 127, -+ [0][1][1][0][RTW89_FCC][13] = 127, -+ [0][1][1][0][RTW89_ETSI][13] = 127, -+ [0][1][1][0][RTW89_MKK][13] = 127, -+ [0][1][1][0][RTW89_IC][13] = 127, -+ [0][1][1][0][RTW89_KCC][13] = 127, -+ [0][1][1][0][RTW89_ACMA][13] = 127, -+ [0][1][1][0][RTW89_CN][13] = 127, -+ [0][1][1][0][RTW89_UK][13] = 127, -+ [0][0][2][0][RTW89_FCC][0] = 78, -+ [0][0][2][0][RTW89_ETSI][0] = 60, -+ [0][0][2][0][RTW89_MKK][0] = 72, -+ [0][0][2][0][RTW89_IC][0] = 78, -+ [0][0][2][0][RTW89_KCC][0] = 78, -+ [0][0][2][0][RTW89_ACMA][0] = 60, -+ [0][0][2][0][RTW89_CN][0] = 60, -+ [0][0][2][0][RTW89_UK][0] = 60, -+ [0][0][2][0][RTW89_FCC][1] = 78, -+ [0][0][2][0][RTW89_ETSI][1] = 60, -+ [0][0][2][0][RTW89_MKK][1] = 78, -+ [0][0][2][0][RTW89_IC][1] = 78, -+ [0][0][2][0][RTW89_KCC][1] = 78, -+ [0][0][2][0][RTW89_ACMA][1] = 60, -+ [0][0][2][0][RTW89_CN][1] = 60, -+ [0][0][2][0][RTW89_UK][1] = 60, -+ [0][0][2][0][RTW89_FCC][2] = 82, -+ [0][0][2][0][RTW89_ETSI][2] = 60, -+ [0][0][2][0][RTW89_MKK][2] = 78, -+ [0][0][2][0][RTW89_IC][2] = 82, -+ [0][0][2][0][RTW89_KCC][2] = 78, -+ [0][0][2][0][RTW89_ACMA][2] = 60, -+ [0][0][2][0][RTW89_CN][2] = 60, -+ [0][0][2][0][RTW89_UK][2] = 60, -+ [0][0][2][0][RTW89_FCC][3] = 82, -+ [0][0][2][0][RTW89_ETSI][3] = 60, -+ [0][0][2][0][RTW89_MKK][3] = 78, -+ [0][0][2][0][RTW89_IC][3] = 82, -+ [0][0][2][0][RTW89_KCC][3] = 78, -+ [0][0][2][0][RTW89_ACMA][3] = 60, -+ [0][0][2][0][RTW89_CN][3] = 60, -+ [0][0][2][0][RTW89_UK][3] = 60, -+ [0][0][2][0][RTW89_FCC][4] = 82, -+ [0][0][2][0][RTW89_ETSI][4] = 60, -+ [0][0][2][0][RTW89_MKK][4] = 78, -+ [0][0][2][0][RTW89_IC][4] = 82, -+ [0][0][2][0][RTW89_KCC][4] = 78, -+ [0][0][2][0][RTW89_ACMA][4] = 60, -+ [0][0][2][0][RTW89_CN][4] = 60, -+ [0][0][2][0][RTW89_UK][4] = 60, -+ [0][0][2][0][RTW89_FCC][5] = 82, -+ [0][0][2][0][RTW89_ETSI][5] = 60, -+ [0][0][2][0][RTW89_MKK][5] = 78, -+ [0][0][2][0][RTW89_IC][5] = 82, -+ [0][0][2][0][RTW89_KCC][5] = 78, -+ [0][0][2][0][RTW89_ACMA][5] = 60, -+ [0][0][2][0][RTW89_CN][5] = 60, -+ [0][0][2][0][RTW89_UK][5] = 60, -+ [0][0][2][0][RTW89_FCC][6] = 82, -+ [0][0][2][0][RTW89_ETSI][6] = 60, -+ [0][0][2][0][RTW89_MKK][6] = 78, -+ [0][0][2][0][RTW89_IC][6] = 82, -+ [0][0][2][0][RTW89_KCC][6] = 78, -+ [0][0][2][0][RTW89_ACMA][6] = 60, -+ [0][0][2][0][RTW89_CN][6] = 60, -+ [0][0][2][0][RTW89_UK][6] = 60, -+ [0][0][2][0][RTW89_FCC][7] = 82, -+ [0][0][2][0][RTW89_ETSI][7] = 60, -+ [0][0][2][0][RTW89_MKK][7] = 78, -+ [0][0][2][0][RTW89_IC][7] = 82, -+ [0][0][2][0][RTW89_KCC][7] = 78, -+ [0][0][2][0][RTW89_ACMA][7] = 60, -+ [0][0][2][0][RTW89_CN][7] = 60, -+ [0][0][2][0][RTW89_UK][7] = 60, -+ [0][0][2][0][RTW89_FCC][8] = 80, -+ [0][0][2][0][RTW89_ETSI][8] = 60, -+ [0][0][2][0][RTW89_MKK][8] = 78, -+ [0][0][2][0][RTW89_IC][8] = 80, -+ [0][0][2][0][RTW89_KCC][8] = 78, -+ [0][0][2][0][RTW89_ACMA][8] = 60, -+ [0][0][2][0][RTW89_CN][8] = 60, -+ [0][0][2][0][RTW89_UK][8] = 60, -+ [0][0][2][0][RTW89_FCC][9] = 76, -+ [0][0][2][0][RTW89_ETSI][9] = 60, -+ [0][0][2][0][RTW89_MKK][9] = 78, -+ [0][0][2][0][RTW89_IC][9] = 76, -+ [0][0][2][0][RTW89_KCC][9] = 78, -+ [0][0][2][0][RTW89_ACMA][9] = 60, -+ [0][0][2][0][RTW89_CN][9] = 60, -+ [0][0][2][0][RTW89_UK][9] = 60, -+ [0][0][2][0][RTW89_FCC][10] = 76, -+ [0][0][2][0][RTW89_ETSI][10] = 60, -+ [0][0][2][0][RTW89_MKK][10] = 78, -+ [0][0][2][0][RTW89_IC][10] = 76, -+ [0][0][2][0][RTW89_KCC][10] = 78, -+ [0][0][2][0][RTW89_ACMA][10] = 60, -+ [0][0][2][0][RTW89_CN][10] = 60, -+ [0][0][2][0][RTW89_UK][10] = 60, -+ [0][0][2][0][RTW89_FCC][11] = 70, -+ [0][0][2][0][RTW89_ETSI][11] = 60, -+ [0][0][2][0][RTW89_MKK][11] = 78, -+ [0][0][2][0][RTW89_IC][11] = 70, -+ [0][0][2][0][RTW89_KCC][11] = 78, -+ [0][0][2][0][RTW89_ACMA][11] = 60, -+ [0][0][2][0][RTW89_CN][11] = 60, -+ [0][0][2][0][RTW89_UK][11] = 60, -+ [0][0][2][0][RTW89_FCC][12] = 70, -+ [0][0][2][0][RTW89_ETSI][12] = 60, -+ [0][0][2][0][RTW89_MKK][12] = 70, -+ [0][0][2][0][RTW89_IC][12] = 70, -+ [0][0][2][0][RTW89_KCC][12] = 78, -+ [0][0][2][0][RTW89_ACMA][12] = 60, -+ [0][0][2][0][RTW89_CN][12] = 60, -+ [0][0][2][0][RTW89_UK][12] = 60, -+ [0][0][2][0][RTW89_FCC][13] = 127, -+ [0][0][2][0][RTW89_ETSI][13] = 127, -+ [0][0][2][0][RTW89_MKK][13] = 127, -+ [0][0][2][0][RTW89_IC][13] = 127, -+ [0][0][2][0][RTW89_KCC][13] = 127, -+ [0][0][2][0][RTW89_ACMA][13] = 127, -+ [0][0][2][0][RTW89_CN][13] = 127, -+ [0][0][2][0][RTW89_UK][13] = 127, -+ [0][1][2][0][RTW89_FCC][0] = 127, -+ [0][1][2][0][RTW89_ETSI][0] = 127, -+ [0][1][2][0][RTW89_MKK][0] = 127, -+ [0][1][2][0][RTW89_IC][0] = 127, -+ [0][1][2][0][RTW89_KCC][0] = 127, -+ [0][1][2][0][RTW89_ACMA][0] = 127, -+ [0][1][2][0][RTW89_CN][0] = 127, -+ [0][1][2][0][RTW89_UK][0] = 127, -+ [0][1][2][0][RTW89_FCC][1] = 127, -+ [0][1][2][0][RTW89_ETSI][1] = 127, -+ [0][1][2][0][RTW89_MKK][1] = 127, -+ [0][1][2][0][RTW89_IC][1] = 127, -+ [0][1][2][0][RTW89_KCC][1] = 127, -+ [0][1][2][0][RTW89_ACMA][1] = 127, -+ [0][1][2][0][RTW89_CN][1] = 127, -+ [0][1][2][0][RTW89_UK][1] = 127, -+ [0][1][2][0][RTW89_FCC][2] = 127, -+ [0][1][2][0][RTW89_ETSI][2] = 127, -+ [0][1][2][0][RTW89_MKK][2] = 127, -+ [0][1][2][0][RTW89_IC][2] = 127, -+ [0][1][2][0][RTW89_KCC][2] = 127, -+ [0][1][2][0][RTW89_ACMA][2] = 127, -+ [0][1][2][0][RTW89_CN][2] = 127, -+ [0][1][2][0][RTW89_UK][2] = 127, -+ [0][1][2][0][RTW89_FCC][3] = 127, -+ [0][1][2][0][RTW89_ETSI][3] = 127, -+ [0][1][2][0][RTW89_MKK][3] = 127, -+ [0][1][2][0][RTW89_IC][3] = 127, -+ [0][1][2][0][RTW89_KCC][3] = 127, -+ [0][1][2][0][RTW89_ACMA][3] = 127, -+ [0][1][2][0][RTW89_CN][3] = 127, -+ [0][1][2][0][RTW89_UK][3] = 127, -+ [0][1][2][0][RTW89_FCC][4] = 127, -+ [0][1][2][0][RTW89_ETSI][4] = 127, -+ [0][1][2][0][RTW89_MKK][4] = 127, -+ [0][1][2][0][RTW89_IC][4] = 127, -+ [0][1][2][0][RTW89_KCC][4] = 127, -+ [0][1][2][0][RTW89_ACMA][4] = 127, -+ [0][1][2][0][RTW89_CN][4] = 127, -+ [0][1][2][0][RTW89_UK][4] = 127, -+ [0][1][2][0][RTW89_FCC][5] = 127, -+ [0][1][2][0][RTW89_ETSI][5] = 127, -+ [0][1][2][0][RTW89_MKK][5] = 127, -+ [0][1][2][0][RTW89_IC][5] = 127, -+ [0][1][2][0][RTW89_KCC][5] = 127, -+ [0][1][2][0][RTW89_ACMA][5] = 127, -+ [0][1][2][0][RTW89_CN][5] = 127, -+ [0][1][2][0][RTW89_UK][5] = 127, -+ [0][1][2][0][RTW89_FCC][6] = 127, -+ [0][1][2][0][RTW89_ETSI][6] = 127, -+ [0][1][2][0][RTW89_MKK][6] = 127, -+ [0][1][2][0][RTW89_IC][6] = 127, -+ [0][1][2][0][RTW89_KCC][6] = 127, -+ [0][1][2][0][RTW89_ACMA][6] = 127, -+ [0][1][2][0][RTW89_CN][6] = 127, -+ [0][1][2][0][RTW89_UK][6] = 127, -+ [0][1][2][0][RTW89_FCC][7] = 127, -+ [0][1][2][0][RTW89_ETSI][7] = 127, -+ [0][1][2][0][RTW89_MKK][7] = 127, -+ [0][1][2][0][RTW89_IC][7] = 127, -+ [0][1][2][0][RTW89_KCC][7] = 127, -+ [0][1][2][0][RTW89_ACMA][7] = 127, -+ [0][1][2][0][RTW89_CN][7] = 127, -+ [0][1][2][0][RTW89_UK][7] = 127, -+ [0][1][2][0][RTW89_FCC][8] = 127, -+ [0][1][2][0][RTW89_ETSI][8] = 127, -+ [0][1][2][0][RTW89_MKK][8] = 127, -+ [0][1][2][0][RTW89_IC][8] = 127, -+ [0][1][2][0][RTW89_KCC][8] = 127, -+ [0][1][2][0][RTW89_ACMA][8] = 127, -+ [0][1][2][0][RTW89_CN][8] = 127, -+ [0][1][2][0][RTW89_UK][8] = 127, -+ [0][1][2][0][RTW89_FCC][9] = 127, -+ [0][1][2][0][RTW89_ETSI][9] = 127, -+ [0][1][2][0][RTW89_MKK][9] = 127, -+ [0][1][2][0][RTW89_IC][9] = 127, -+ [0][1][2][0][RTW89_KCC][9] = 127, -+ [0][1][2][0][RTW89_ACMA][9] = 127, -+ [0][1][2][0][RTW89_CN][9] = 127, -+ [0][1][2][0][RTW89_UK][9] = 127, -+ [0][1][2][0][RTW89_FCC][10] = 127, -+ [0][1][2][0][RTW89_ETSI][10] = 127, -+ [0][1][2][0][RTW89_MKK][10] = 127, -+ [0][1][2][0][RTW89_IC][10] = 127, -+ [0][1][2][0][RTW89_KCC][10] = 127, -+ [0][1][2][0][RTW89_ACMA][10] = 127, -+ [0][1][2][0][RTW89_CN][10] = 127, -+ [0][1][2][0][RTW89_UK][10] = 127, -+ [0][1][2][0][RTW89_FCC][11] = 127, -+ [0][1][2][0][RTW89_ETSI][11] = 127, -+ [0][1][2][0][RTW89_MKK][11] = 127, -+ [0][1][2][0][RTW89_IC][11] = 127, -+ [0][1][2][0][RTW89_KCC][11] = 127, -+ [0][1][2][0][RTW89_ACMA][11] = 127, -+ [0][1][2][0][RTW89_CN][11] = 127, -+ [0][1][2][0][RTW89_UK][11] = 127, -+ [0][1][2][0][RTW89_FCC][12] = 127, -+ [0][1][2][0][RTW89_ETSI][12] = 127, -+ [0][1][2][0][RTW89_MKK][12] = 127, -+ [0][1][2][0][RTW89_IC][12] = 127, -+ [0][1][2][0][RTW89_KCC][12] = 127, -+ [0][1][2][0][RTW89_ACMA][12] = 127, -+ [0][1][2][0][RTW89_CN][12] = 127, -+ [0][1][2][0][RTW89_UK][12] = 127, -+ [0][1][2][0][RTW89_FCC][13] = 127, -+ [0][1][2][0][RTW89_ETSI][13] = 127, -+ [0][1][2][0][RTW89_MKK][13] = 127, -+ [0][1][2][0][RTW89_IC][13] = 127, -+ [0][1][2][0][RTW89_KCC][13] = 127, -+ [0][1][2][0][RTW89_ACMA][13] = 127, -+ [0][1][2][0][RTW89_CN][13] = 127, -+ [0][1][2][0][RTW89_UK][13] = 127, -+ [0][1][2][1][RTW89_FCC][0] = 127, -+ [0][1][2][1][RTW89_ETSI][0] = 127, -+ [0][1][2][1][RTW89_MKK][0] = 127, -+ [0][1][2][1][RTW89_IC][0] = 127, -+ [0][1][2][1][RTW89_KCC][0] = 127, -+ [0][1][2][1][RTW89_ACMA][0] = 127, -+ [0][1][2][1][RTW89_CN][0] = 127, -+ [0][1][2][1][RTW89_UK][0] = 127, -+ [0][1][2][1][RTW89_FCC][1] = 127, -+ [0][1][2][1][RTW89_ETSI][1] = 127, -+ [0][1][2][1][RTW89_MKK][1] = 127, -+ [0][1][2][1][RTW89_IC][1] = 127, -+ [0][1][2][1][RTW89_KCC][1] = 127, -+ [0][1][2][1][RTW89_ACMA][1] = 127, -+ [0][1][2][1][RTW89_CN][1] = 127, -+ [0][1][2][1][RTW89_UK][1] = 127, -+ [0][1][2][1][RTW89_FCC][2] = 127, -+ [0][1][2][1][RTW89_ETSI][2] = 127, -+ [0][1][2][1][RTW89_MKK][2] = 127, -+ [0][1][2][1][RTW89_IC][2] = 127, -+ [0][1][2][1][RTW89_KCC][2] = 127, -+ [0][1][2][1][RTW89_ACMA][2] = 127, -+ [0][1][2][1][RTW89_CN][2] = 127, -+ [0][1][2][1][RTW89_UK][2] = 127, -+ [0][1][2][1][RTW89_FCC][3] = 127, -+ [0][1][2][1][RTW89_ETSI][3] = 127, -+ [0][1][2][1][RTW89_MKK][3] = 127, -+ [0][1][2][1][RTW89_IC][3] = 127, -+ [0][1][2][1][RTW89_KCC][3] = 127, -+ [0][1][2][1][RTW89_ACMA][3] = 127, -+ [0][1][2][1][RTW89_CN][3] = 127, -+ [0][1][2][1][RTW89_UK][3] = 127, -+ [0][1][2][1][RTW89_FCC][4] = 127, -+ [0][1][2][1][RTW89_ETSI][4] = 127, -+ [0][1][2][1][RTW89_MKK][4] = 127, -+ [0][1][2][1][RTW89_IC][4] = 127, -+ [0][1][2][1][RTW89_KCC][4] = 127, -+ [0][1][2][1][RTW89_ACMA][4] = 127, -+ [0][1][2][1][RTW89_CN][4] = 127, -+ [0][1][2][1][RTW89_UK][4] = 127, -+ [0][1][2][1][RTW89_FCC][5] = 127, -+ [0][1][2][1][RTW89_ETSI][5] = 127, -+ [0][1][2][1][RTW89_MKK][5] = 127, -+ [0][1][2][1][RTW89_IC][5] = 127, -+ [0][1][2][1][RTW89_KCC][5] = 127, -+ [0][1][2][1][RTW89_ACMA][5] = 127, -+ [0][1][2][1][RTW89_CN][5] = 127, -+ [0][1][2][1][RTW89_UK][5] = 127, -+ [0][1][2][1][RTW89_FCC][6] = 127, -+ [0][1][2][1][RTW89_ETSI][6] = 127, -+ [0][1][2][1][RTW89_MKK][6] = 127, -+ [0][1][2][1][RTW89_IC][6] = 127, -+ [0][1][2][1][RTW89_KCC][6] = 127, -+ [0][1][2][1][RTW89_ACMA][6] = 127, -+ [0][1][2][1][RTW89_CN][6] = 127, -+ [0][1][2][1][RTW89_UK][6] = 127, -+ [0][1][2][1][RTW89_FCC][7] = 127, -+ [0][1][2][1][RTW89_ETSI][7] = 127, -+ [0][1][2][1][RTW89_MKK][7] = 127, -+ [0][1][2][1][RTW89_IC][7] = 127, -+ [0][1][2][1][RTW89_KCC][7] = 127, -+ [0][1][2][1][RTW89_ACMA][7] = 127, -+ [0][1][2][1][RTW89_CN][7] = 127, -+ [0][1][2][1][RTW89_UK][7] = 127, -+ [0][1][2][1][RTW89_FCC][8] = 127, -+ [0][1][2][1][RTW89_ETSI][8] = 127, -+ [0][1][2][1][RTW89_MKK][8] = 127, -+ [0][1][2][1][RTW89_IC][8] = 127, -+ [0][1][2][1][RTW89_KCC][8] = 127, -+ [0][1][2][1][RTW89_ACMA][8] = 127, -+ [0][1][2][1][RTW89_CN][8] = 127, -+ [0][1][2][1][RTW89_UK][8] = 127, -+ [0][1][2][1][RTW89_FCC][9] = 127, -+ [0][1][2][1][RTW89_ETSI][9] = 127, -+ [0][1][2][1][RTW89_MKK][9] = 127, -+ [0][1][2][1][RTW89_IC][9] = 127, -+ [0][1][2][1][RTW89_KCC][9] = 127, -+ [0][1][2][1][RTW89_ACMA][9] = 127, -+ [0][1][2][1][RTW89_CN][9] = 127, -+ [0][1][2][1][RTW89_UK][9] = 127, -+ [0][1][2][1][RTW89_FCC][10] = 127, -+ [0][1][2][1][RTW89_ETSI][10] = 127, -+ [0][1][2][1][RTW89_MKK][10] = 127, -+ [0][1][2][1][RTW89_IC][10] = 127, -+ [0][1][2][1][RTW89_KCC][10] = 127, -+ [0][1][2][1][RTW89_ACMA][10] = 127, -+ [0][1][2][1][RTW89_CN][10] = 127, -+ [0][1][2][1][RTW89_UK][10] = 127, -+ [0][1][2][1][RTW89_FCC][11] = 127, -+ [0][1][2][1][RTW89_ETSI][11] = 127, -+ [0][1][2][1][RTW89_MKK][11] = 127, -+ [0][1][2][1][RTW89_IC][11] = 127, -+ [0][1][2][1][RTW89_KCC][11] = 127, -+ [0][1][2][1][RTW89_ACMA][11] = 127, -+ [0][1][2][1][RTW89_CN][11] = 127, -+ [0][1][2][1][RTW89_UK][11] = 127, -+ [0][1][2][1][RTW89_FCC][12] = 127, -+ [0][1][2][1][RTW89_ETSI][12] = 127, -+ [0][1][2][1][RTW89_MKK][12] = 127, -+ [0][1][2][1][RTW89_IC][12] = 127, -+ [0][1][2][1][RTW89_KCC][12] = 127, -+ [0][1][2][1][RTW89_ACMA][12] = 127, -+ [0][1][2][1][RTW89_CN][12] = 127, -+ [0][1][2][1][RTW89_UK][12] = 127, -+ [0][1][2][1][RTW89_FCC][13] = 127, -+ [0][1][2][1][RTW89_ETSI][13] = 127, -+ [0][1][2][1][RTW89_MKK][13] = 127, -+ [0][1][2][1][RTW89_IC][13] = 127, -+ [0][1][2][1][RTW89_KCC][13] = 127, -+ [0][1][2][1][RTW89_ACMA][13] = 127, -+ [0][1][2][1][RTW89_CN][13] = 127, -+ [0][1][2][1][RTW89_UK][13] = 127, -+ [1][0][2][0][RTW89_FCC][0] = 127, -+ [1][0][2][0][RTW89_ETSI][0] = 127, -+ [1][0][2][0][RTW89_MKK][0] = 127, -+ [1][0][2][0][RTW89_IC][0] = 127, -+ [1][0][2][0][RTW89_KCC][0] = 127, -+ [1][0][2][0][RTW89_ACMA][0] = 127, -+ [1][0][2][0][RTW89_CN][0] = 127, -+ [1][0][2][0][RTW89_UK][0] = 127, -+ [1][0][2][0][RTW89_FCC][1] = 127, -+ [1][0][2][0][RTW89_ETSI][1] = 127, -+ [1][0][2][0][RTW89_MKK][1] = 127, -+ [1][0][2][0][RTW89_IC][1] = 127, -+ [1][0][2][0][RTW89_KCC][1] = 127, -+ [1][0][2][0][RTW89_ACMA][1] = 127, -+ [1][0][2][0][RTW89_CN][1] = 127, -+ [1][0][2][0][RTW89_UK][1] = 127, -+ [1][0][2][0][RTW89_FCC][2] = 72, -+ [1][0][2][0][RTW89_ETSI][2] = 58, -+ [1][0][2][0][RTW89_MKK][2] = 80, -+ [1][0][2][0][RTW89_IC][2] = 72, -+ [1][0][2][0][RTW89_KCC][2] = 80, -+ [1][0][2][0][RTW89_ACMA][2] = 58, -+ [1][0][2][0][RTW89_CN][2] = 60, -+ [1][0][2][0][RTW89_UK][2] = 58, -+ [1][0][2][0][RTW89_FCC][3] = 72, -+ [1][0][2][0][RTW89_ETSI][3] = 58, -+ [1][0][2][0][RTW89_MKK][3] = 80, -+ [1][0][2][0][RTW89_IC][3] = 72, -+ [1][0][2][0][RTW89_KCC][3] = 80, -+ [1][0][2][0][RTW89_ACMA][3] = 58, -+ [1][0][2][0][RTW89_CN][3] = 60, -+ [1][0][2][0][RTW89_UK][3] = 58, -+ [1][0][2][0][RTW89_FCC][4] = 76, -+ [1][0][2][0][RTW89_ETSI][4] = 58, -+ [1][0][2][0][RTW89_MKK][4] = 80, -+ [1][0][2][0][RTW89_IC][4] = 76, -+ [1][0][2][0][RTW89_KCC][4] = 80, -+ [1][0][2][0][RTW89_ACMA][4] = 58, -+ [1][0][2][0][RTW89_CN][4] = 60, -+ [1][0][2][0][RTW89_UK][4] = 58, -+ [1][0][2][0][RTW89_FCC][5] = 78, -+ [1][0][2][0][RTW89_ETSI][5] = 58, -+ [1][0][2][0][RTW89_MKK][5] = 80, -+ [1][0][2][0][RTW89_IC][5] = 78, -+ [1][0][2][0][RTW89_KCC][5] = 80, -+ [1][0][2][0][RTW89_ACMA][5] = 58, -+ [1][0][2][0][RTW89_CN][5] = 60, -+ [1][0][2][0][RTW89_UK][5] = 58, -+ [1][0][2][0][RTW89_FCC][6] = 78, -+ [1][0][2][0][RTW89_ETSI][6] = 58, -+ [1][0][2][0][RTW89_MKK][6] = 78, -+ [1][0][2][0][RTW89_IC][6] = 78, -+ [1][0][2][0][RTW89_KCC][6] = 80, -+ [1][0][2][0][RTW89_ACMA][6] = 58, -+ [1][0][2][0][RTW89_CN][6] = 60, -+ [1][0][2][0][RTW89_UK][6] = 58, -+ [1][0][2][0][RTW89_FCC][7] = 78, -+ [1][0][2][0][RTW89_ETSI][7] = 58, -+ [1][0][2][0][RTW89_MKK][7] = 80, -+ [1][0][2][0][RTW89_IC][7] = 78, -+ [1][0][2][0][RTW89_KCC][7] = 80, -+ [1][0][2][0][RTW89_ACMA][7] = 58, -+ [1][0][2][0][RTW89_CN][7] = 60, -+ [1][0][2][0][RTW89_UK][7] = 58, -+ [1][0][2][0][RTW89_FCC][8] = 78, -+ [1][0][2][0][RTW89_ETSI][8] = 58, -+ [1][0][2][0][RTW89_MKK][8] = 80, -+ [1][0][2][0][RTW89_IC][8] = 78, -+ [1][0][2][0][RTW89_KCC][8] = 78, -+ [1][0][2][0][RTW89_ACMA][8] = 58, -+ [1][0][2][0][RTW89_CN][8] = 60, -+ [1][0][2][0][RTW89_UK][8] = 58, -+ [1][0][2][0][RTW89_FCC][9] = 76, -+ [1][0][2][0][RTW89_ETSI][9] = 58, -+ [1][0][2][0][RTW89_MKK][9] = 80, -+ [1][0][2][0][RTW89_IC][9] = 76, -+ [1][0][2][0][RTW89_KCC][9] = 78, -+ [1][0][2][0][RTW89_ACMA][9] = 58, -+ [1][0][2][0][RTW89_CN][9] = 60, -+ [1][0][2][0][RTW89_UK][9] = 58, -+ [1][0][2][0][RTW89_FCC][10] = 70, -+ [1][0][2][0][RTW89_ETSI][10] = 58, -+ [1][0][2][0][RTW89_MKK][10] = 78, -+ [1][0][2][0][RTW89_IC][10] = 70, -+ [1][0][2][0][RTW89_KCC][10] = 78, -+ [1][0][2][0][RTW89_ACMA][10] = 58, -+ [1][0][2][0][RTW89_CN][10] = 60, -+ [1][0][2][0][RTW89_UK][10] = 58, -+ [1][0][2][0][RTW89_FCC][11] = 127, -+ [1][0][2][0][RTW89_ETSI][11] = 127, -+ [1][0][2][0][RTW89_MKK][11] = 127, -+ [1][0][2][0][RTW89_IC][11] = 127, -+ [1][0][2][0][RTW89_KCC][11] = 127, -+ [1][0][2][0][RTW89_ACMA][11] = 127, -+ [1][0][2][0][RTW89_CN][11] = 127, -+ [1][0][2][0][RTW89_UK][11] = 127, -+ [1][0][2][0][RTW89_FCC][12] = 127, -+ [1][0][2][0][RTW89_ETSI][12] = 127, -+ [1][0][2][0][RTW89_MKK][12] = 127, -+ [1][0][2][0][RTW89_IC][12] = 127, -+ [1][0][2][0][RTW89_KCC][12] = 127, -+ [1][0][2][0][RTW89_ACMA][12] = 127, -+ [1][0][2][0][RTW89_CN][12] = 127, -+ [1][0][2][0][RTW89_UK][12] = 127, -+ [1][0][2][0][RTW89_FCC][13] = 127, -+ [1][0][2][0][RTW89_ETSI][13] = 127, -+ [1][0][2][0][RTW89_MKK][13] = 127, -+ [1][0][2][0][RTW89_IC][13] = 127, -+ [1][0][2][0][RTW89_KCC][13] = 127, -+ [1][0][2][0][RTW89_ACMA][13] = 127, -+ [1][0][2][0][RTW89_CN][13] = 127, -+ [1][0][2][0][RTW89_UK][13] = 127, -+ [1][1][2][0][RTW89_FCC][0] = 127, -+ [1][1][2][0][RTW89_ETSI][0] = 127, -+ [1][1][2][0][RTW89_MKK][0] = 127, -+ [1][1][2][0][RTW89_IC][0] = 127, -+ [1][1][2][0][RTW89_KCC][0] = 127, -+ [1][1][2][0][RTW89_ACMA][0] = 127, -+ [1][1][2][0][RTW89_CN][0] = 127, -+ [1][1][2][0][RTW89_UK][0] = 127, -+ [1][1][2][0][RTW89_FCC][1] = 127, -+ [1][1][2][0][RTW89_ETSI][1] = 127, -+ [1][1][2][0][RTW89_MKK][1] = 127, -+ [1][1][2][0][RTW89_IC][1] = 127, -+ [1][1][2][0][RTW89_KCC][1] = 127, -+ [1][1][2][0][RTW89_ACMA][1] = 127, -+ [1][1][2][0][RTW89_CN][1] = 127, -+ [1][1][2][0][RTW89_UK][1] = 127, -+ [1][1][2][0][RTW89_FCC][2] = 127, -+ [1][1][2][0][RTW89_ETSI][2] = 127, -+ [1][1][2][0][RTW89_MKK][2] = 127, -+ [1][1][2][0][RTW89_IC][2] = 127, -+ [1][1][2][0][RTW89_KCC][2] = 127, -+ [1][1][2][0][RTW89_ACMA][2] = 127, -+ [1][1][2][0][RTW89_CN][2] = 127, -+ [1][1][2][0][RTW89_UK][2] = 127, -+ [1][1][2][0][RTW89_FCC][3] = 127, -+ [1][1][2][0][RTW89_ETSI][3] = 127, -+ [1][1][2][0][RTW89_MKK][3] = 127, -+ [1][1][2][0][RTW89_IC][3] = 127, -+ [1][1][2][0][RTW89_KCC][3] = 127, -+ [1][1][2][0][RTW89_ACMA][3] = 127, -+ [1][1][2][0][RTW89_CN][3] = 127, -+ [1][1][2][0][RTW89_UK][3] = 127, -+ [1][1][2][0][RTW89_FCC][4] = 127, -+ [1][1][2][0][RTW89_ETSI][4] = 127, -+ [1][1][2][0][RTW89_MKK][4] = 127, -+ [1][1][2][0][RTW89_IC][4] = 127, -+ [1][1][2][0][RTW89_KCC][4] = 127, -+ [1][1][2][0][RTW89_ACMA][4] = 127, -+ [1][1][2][0][RTW89_CN][4] = 127, -+ [1][1][2][0][RTW89_UK][4] = 127, -+ [1][1][2][0][RTW89_FCC][5] = 127, -+ [1][1][2][0][RTW89_ETSI][5] = 127, -+ [1][1][2][0][RTW89_MKK][5] = 127, -+ [1][1][2][0][RTW89_IC][5] = 127, -+ [1][1][2][0][RTW89_KCC][5] = 127, -+ [1][1][2][0][RTW89_ACMA][5] = 127, -+ [1][1][2][0][RTW89_CN][5] = 127, -+ [1][1][2][0][RTW89_UK][5] = 127, -+ [1][1][2][0][RTW89_FCC][6] = 127, -+ [1][1][2][0][RTW89_ETSI][6] = 127, -+ [1][1][2][0][RTW89_MKK][6] = 127, -+ [1][1][2][0][RTW89_IC][6] = 127, -+ [1][1][2][0][RTW89_KCC][6] = 127, -+ [1][1][2][0][RTW89_ACMA][6] = 127, -+ [1][1][2][0][RTW89_CN][6] = 127, -+ [1][1][2][0][RTW89_UK][6] = 127, -+ [1][1][2][0][RTW89_FCC][7] = 127, -+ [1][1][2][0][RTW89_ETSI][7] = 127, -+ [1][1][2][0][RTW89_MKK][7] = 127, -+ [1][1][2][0][RTW89_IC][7] = 127, -+ [1][1][2][0][RTW89_KCC][7] = 127, -+ [1][1][2][0][RTW89_ACMA][7] = 127, -+ [1][1][2][0][RTW89_CN][7] = 127, -+ [1][1][2][0][RTW89_UK][7] = 127, -+ [1][1][2][0][RTW89_FCC][8] = 127, -+ [1][1][2][0][RTW89_ETSI][8] = 127, -+ [1][1][2][0][RTW89_MKK][8] = 127, -+ [1][1][2][0][RTW89_IC][8] = 127, -+ [1][1][2][0][RTW89_KCC][8] = 127, -+ [1][1][2][0][RTW89_ACMA][8] = 127, -+ [1][1][2][0][RTW89_CN][8] = 127, -+ [1][1][2][0][RTW89_UK][8] = 127, -+ [1][1][2][0][RTW89_FCC][9] = 127, -+ [1][1][2][0][RTW89_ETSI][9] = 127, -+ [1][1][2][0][RTW89_MKK][9] = 127, -+ [1][1][2][0][RTW89_IC][9] = 127, -+ [1][1][2][0][RTW89_KCC][9] = 127, -+ [1][1][2][0][RTW89_ACMA][9] = 127, -+ [1][1][2][0][RTW89_CN][9] = 127, -+ [1][1][2][0][RTW89_UK][9] = 127, -+ [1][1][2][0][RTW89_FCC][10] = 127, -+ [1][1][2][0][RTW89_ETSI][10] = 127, -+ [1][1][2][0][RTW89_MKK][10] = 127, -+ [1][1][2][0][RTW89_IC][10] = 127, -+ [1][1][2][0][RTW89_KCC][10] = 127, -+ [1][1][2][0][RTW89_ACMA][10] = 127, -+ [1][1][2][0][RTW89_CN][10] = 127, -+ [1][1][2][0][RTW89_UK][10] = 127, -+ [1][1][2][0][RTW89_FCC][11] = 127, -+ [1][1][2][0][RTW89_ETSI][11] = 127, -+ [1][1][2][0][RTW89_MKK][11] = 127, -+ [1][1][2][0][RTW89_IC][11] = 127, -+ [1][1][2][0][RTW89_KCC][11] = 127, -+ [1][1][2][0][RTW89_ACMA][11] = 127, -+ [1][1][2][0][RTW89_CN][11] = 127, -+ [1][1][2][0][RTW89_UK][11] = 127, -+ [1][1][2][0][RTW89_FCC][12] = 127, -+ [1][1][2][0][RTW89_ETSI][12] = 127, -+ [1][1][2][0][RTW89_MKK][12] = 127, -+ [1][1][2][0][RTW89_IC][12] = 127, -+ [1][1][2][0][RTW89_KCC][12] = 127, -+ [1][1][2][0][RTW89_ACMA][12] = 127, -+ [1][1][2][0][RTW89_CN][12] = 127, -+ [1][1][2][0][RTW89_UK][12] = 127, -+ [1][1][2][0][RTW89_FCC][13] = 127, -+ [1][1][2][0][RTW89_ETSI][13] = 127, -+ [1][1][2][0][RTW89_MKK][13] = 127, -+ [1][1][2][0][RTW89_IC][13] = 127, -+ [1][1][2][0][RTW89_KCC][13] = 127, -+ [1][1][2][0][RTW89_ACMA][13] = 127, -+ [1][1][2][0][RTW89_CN][13] = 127, -+ [1][1][2][0][RTW89_UK][13] = 127, -+ [1][1][2][1][RTW89_FCC][0] = 127, -+ [1][1][2][1][RTW89_ETSI][0] = 127, -+ [1][1][2][1][RTW89_MKK][0] = 127, -+ [1][1][2][1][RTW89_IC][0] = 127, -+ [1][1][2][1][RTW89_KCC][0] = 127, -+ [1][1][2][1][RTW89_ACMA][0] = 127, -+ [1][1][2][1][RTW89_CN][0] = 127, -+ [1][1][2][1][RTW89_UK][0] = 127, -+ [1][1][2][1][RTW89_FCC][1] = 127, -+ [1][1][2][1][RTW89_ETSI][1] = 127, -+ [1][1][2][1][RTW89_MKK][1] = 127, -+ [1][1][2][1][RTW89_IC][1] = 127, -+ [1][1][2][1][RTW89_KCC][1] = 127, -+ [1][1][2][1][RTW89_ACMA][1] = 127, -+ [1][1][2][1][RTW89_CN][1] = 127, -+ [1][1][2][1][RTW89_UK][1] = 127, -+ [1][1][2][1][RTW89_FCC][2] = 127, -+ [1][1][2][1][RTW89_ETSI][2] = 127, -+ [1][1][2][1][RTW89_MKK][2] = 127, -+ [1][1][2][1][RTW89_IC][2] = 127, -+ [1][1][2][1][RTW89_KCC][2] = 127, -+ [1][1][2][1][RTW89_ACMA][2] = 127, -+ [1][1][2][1][RTW89_CN][2] = 127, -+ [1][1][2][1][RTW89_UK][2] = 127, -+ [1][1][2][1][RTW89_FCC][3] = 127, -+ [1][1][2][1][RTW89_ETSI][3] = 127, -+ [1][1][2][1][RTW89_MKK][3] = 127, -+ [1][1][2][1][RTW89_IC][3] = 127, -+ [1][1][2][1][RTW89_KCC][3] = 127, -+ [1][1][2][1][RTW89_ACMA][3] = 127, -+ [1][1][2][1][RTW89_CN][3] = 127, -+ [1][1][2][1][RTW89_UK][3] = 127, -+ [1][1][2][1][RTW89_FCC][4] = 127, -+ [1][1][2][1][RTW89_ETSI][4] = 127, -+ [1][1][2][1][RTW89_MKK][4] = 127, -+ [1][1][2][1][RTW89_IC][4] = 127, -+ [1][1][2][1][RTW89_KCC][4] = 127, -+ [1][1][2][1][RTW89_ACMA][4] = 127, -+ [1][1][2][1][RTW89_CN][4] = 127, -+ [1][1][2][1][RTW89_UK][4] = 127, -+ [1][1][2][1][RTW89_FCC][5] = 127, -+ [1][1][2][1][RTW89_ETSI][5] = 127, -+ [1][1][2][1][RTW89_MKK][5] = 127, -+ [1][1][2][1][RTW89_IC][5] = 127, -+ [1][1][2][1][RTW89_KCC][5] = 127, -+ [1][1][2][1][RTW89_ACMA][5] = 127, -+ [1][1][2][1][RTW89_CN][5] = 127, -+ [1][1][2][1][RTW89_UK][5] = 127, -+ [1][1][2][1][RTW89_FCC][6] = 127, -+ [1][1][2][1][RTW89_ETSI][6] = 127, -+ [1][1][2][1][RTW89_MKK][6] = 127, -+ [1][1][2][1][RTW89_IC][6] = 127, -+ [1][1][2][1][RTW89_KCC][6] = 127, -+ [1][1][2][1][RTW89_ACMA][6] = 127, -+ [1][1][2][1][RTW89_CN][6] = 127, -+ [1][1][2][1][RTW89_UK][6] = 127, -+ [1][1][2][1][RTW89_FCC][7] = 127, -+ [1][1][2][1][RTW89_ETSI][7] = 127, -+ [1][1][2][1][RTW89_MKK][7] = 127, -+ [1][1][2][1][RTW89_IC][7] = 127, -+ [1][1][2][1][RTW89_KCC][7] = 127, -+ [1][1][2][1][RTW89_ACMA][7] = 127, -+ [1][1][2][1][RTW89_CN][7] = 127, -+ [1][1][2][1][RTW89_UK][7] = 127, -+ [1][1][2][1][RTW89_FCC][8] = 127, -+ [1][1][2][1][RTW89_ETSI][8] = 127, -+ [1][1][2][1][RTW89_MKK][8] = 127, -+ [1][1][2][1][RTW89_IC][8] = 127, -+ [1][1][2][1][RTW89_KCC][8] = 127, -+ [1][1][2][1][RTW89_ACMA][8] = 127, -+ [1][1][2][1][RTW89_CN][8] = 127, -+ [1][1][2][1][RTW89_UK][8] = 127, -+ [1][1][2][1][RTW89_FCC][9] = 127, -+ [1][1][2][1][RTW89_ETSI][9] = 127, -+ [1][1][2][1][RTW89_MKK][9] = 127, -+ [1][1][2][1][RTW89_IC][9] = 127, -+ [1][1][2][1][RTW89_KCC][9] = 127, -+ [1][1][2][1][RTW89_ACMA][9] = 127, -+ [1][1][2][1][RTW89_CN][9] = 127, -+ [1][1][2][1][RTW89_UK][9] = 127, -+ [1][1][2][1][RTW89_FCC][10] = 127, -+ [1][1][2][1][RTW89_ETSI][10] = 127, -+ [1][1][2][1][RTW89_MKK][10] = 127, -+ [1][1][2][1][RTW89_IC][10] = 127, -+ [1][1][2][1][RTW89_KCC][10] = 127, -+ [1][1][2][1][RTW89_ACMA][10] = 127, -+ [1][1][2][1][RTW89_CN][10] = 127, -+ [1][1][2][1][RTW89_UK][10] = 127, -+ [1][1][2][1][RTW89_FCC][11] = 127, -+ [1][1][2][1][RTW89_ETSI][11] = 127, -+ [1][1][2][1][RTW89_MKK][11] = 127, -+ [1][1][2][1][RTW89_IC][11] = 127, -+ [1][1][2][1][RTW89_KCC][11] = 127, -+ [1][1][2][1][RTW89_ACMA][11] = 127, -+ [1][1][2][1][RTW89_CN][11] = 127, -+ [1][1][2][1][RTW89_UK][11] = 127, -+ [1][1][2][1][RTW89_FCC][12] = 127, -+ [1][1][2][1][RTW89_ETSI][12] = 127, -+ [1][1][2][1][RTW89_MKK][12] = 127, -+ [1][1][2][1][RTW89_IC][12] = 127, -+ [1][1][2][1][RTW89_KCC][12] = 127, -+ [1][1][2][1][RTW89_ACMA][12] = 127, -+ [1][1][2][1][RTW89_CN][12] = 127, -+ [1][1][2][1][RTW89_UK][12] = 127, -+ [1][1][2][1][RTW89_FCC][13] = 127, -+ [1][1][2][1][RTW89_ETSI][13] = 127, -+ [1][1][2][1][RTW89_MKK][13] = 127, -+ [1][1][2][1][RTW89_IC][13] = 127, -+ [1][1][2][1][RTW89_KCC][13] = 127, -+ [1][1][2][1][RTW89_ACMA][13] = 127, -+ [1][1][2][1][RTW89_CN][13] = 127, -+ [1][1][2][1][RTW89_UK][13] = 127, -+}; -+ -+static -+const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_5G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = { -+ [0][0][1][0][RTW89_WW][0] = 58, -+ [0][0][1][0][RTW89_WW][2] = 58, -+ [0][0][1][0][RTW89_WW][4] = 58, -+ [0][0][1][0][RTW89_WW][6] = 50, -+ [0][0][1][0][RTW89_WW][8] = 58, -+ [0][0][1][0][RTW89_WW][10] = 58, -+ [0][0][1][0][RTW89_WW][12] = 58, -+ [0][0][1][0][RTW89_WW][14] = 58, -+ [0][0][1][0][RTW89_WW][15] = 58, -+ [0][0][1][0][RTW89_WW][17] = 60, -+ [0][0][1][0][RTW89_WW][19] = 60, -+ [0][0][1][0][RTW89_WW][21] = 60, -+ [0][0][1][0][RTW89_WW][23] = 60, -+ [0][0][1][0][RTW89_WW][25] = 60, -+ [0][0][1][0][RTW89_WW][27] = 60, -+ [0][0][1][0][RTW89_WW][29] = 60, -+ [0][0][1][0][RTW89_WW][31] = 60, -+ [0][0][1][0][RTW89_WW][33] = 60, -+ [0][0][1][0][RTW89_WW][35] = 60, -+ [0][0][1][0][RTW89_WW][37] = 74, -+ [0][0][1][0][RTW89_WW][38] = 30, -+ [0][0][1][0][RTW89_WW][40] = 30, -+ [0][0][1][0][RTW89_WW][42] = 30, -+ [0][0][1][0][RTW89_WW][44] = 30, -+ [0][0][1][0][RTW89_WW][46] = 30, -+ [0][0][1][0][RTW89_WW][48] = 72, -+ [0][0][1][0][RTW89_WW][50] = 72, -+ [0][0][1][0][RTW89_WW][52] = 72, -+ [0][1][1][0][RTW89_WW][0] = 0, -+ [0][1][1][0][RTW89_WW][2] = 0, -+ [0][1][1][0][RTW89_WW][4] = 0, -+ [0][1][1][0][RTW89_WW][6] = 0, -+ [0][1][1][0][RTW89_WW][8] = 0, -+ [0][1][1][0][RTW89_WW][10] = 0, -+ [0][1][1][0][RTW89_WW][12] = 0, -+ [0][1][1][0][RTW89_WW][14] = 0, -+ [0][1][1][0][RTW89_WW][15] = 0, -+ [0][1][1][0][RTW89_WW][17] = 0, -+ [0][1][1][0][RTW89_WW][19] = 0, -+ [0][1][1][0][RTW89_WW][21] = 0, -+ [0][1][1][0][RTW89_WW][23] = 0, -+ [0][1][1][0][RTW89_WW][25] = 0, -+ [0][1][1][0][RTW89_WW][27] = 0, -+ [0][1][1][0][RTW89_WW][29] = 0, -+ [0][1][1][0][RTW89_WW][31] = 0, -+ [0][1][1][0][RTW89_WW][33] = 0, -+ [0][1][1][0][RTW89_WW][35] = 0, -+ [0][1][1][0][RTW89_WW][37] = 0, -+ [0][1][1][0][RTW89_WW][38] = 0, -+ [0][1][1][0][RTW89_WW][40] = 0, -+ [0][1][1][0][RTW89_WW][42] = 0, -+ [0][1][1][0][RTW89_WW][44] = 0, -+ [0][1][1][0][RTW89_WW][46] = 0, -+ [0][1][1][0][RTW89_WW][48] = 0, -+ [0][1][1][0][RTW89_WW][50] = 0, -+ [0][1][1][0][RTW89_WW][52] = 0, -+ [0][0][2][0][RTW89_WW][0] = 62, -+ [0][0][2][0][RTW89_WW][2] = 62, -+ [0][0][2][0][RTW89_WW][4] = 62, -+ [0][0][2][0][RTW89_WW][6] = 54, -+ [0][0][2][0][RTW89_WW][8] = 62, -+ [0][0][2][0][RTW89_WW][10] = 62, -+ [0][0][2][0][RTW89_WW][12] = 62, -+ [0][0][2][0][RTW89_WW][14] = 62, -+ [0][0][2][0][RTW89_WW][15] = 60, -+ [0][0][2][0][RTW89_WW][17] = 62, -+ [0][0][2][0][RTW89_WW][19] = 62, -+ [0][0][2][0][RTW89_WW][21] = 62, -+ [0][0][2][0][RTW89_WW][23] = 62, -+ [0][0][2][0][RTW89_WW][25] = 62, -+ [0][0][2][0][RTW89_WW][27] = 62, -+ [0][0][2][0][RTW89_WW][29] = 62, -+ [0][0][2][0][RTW89_WW][31] = 62, -+ [0][0][2][0][RTW89_WW][33] = 62, -+ [0][0][2][0][RTW89_WW][35] = 62, -+ [0][0][2][0][RTW89_WW][37] = 76, -+ [0][0][2][0][RTW89_WW][38] = 30, -+ [0][0][2][0][RTW89_WW][40] = 30, -+ [0][0][2][0][RTW89_WW][42] = 30, -+ [0][0][2][0][RTW89_WW][44] = 30, -+ [0][0][2][0][RTW89_WW][46] = 30, -+ [0][0][2][0][RTW89_WW][48] = 74, -+ [0][0][2][0][RTW89_WW][50] = 76, -+ [0][0][2][0][RTW89_WW][52] = 76, -+ [0][1][2][0][RTW89_WW][0] = 0, -+ [0][1][2][0][RTW89_WW][2] = 0, -+ [0][1][2][0][RTW89_WW][4] = 0, -+ [0][1][2][0][RTW89_WW][6] = 0, -+ [0][1][2][0][RTW89_WW][8] = 0, -+ [0][1][2][0][RTW89_WW][10] = 0, -+ [0][1][2][0][RTW89_WW][12] = 0, -+ [0][1][2][0][RTW89_WW][14] = 0, -+ [0][1][2][0][RTW89_WW][15] = 0, -+ [0][1][2][0][RTW89_WW][17] = 0, -+ [0][1][2][0][RTW89_WW][19] = 0, -+ [0][1][2][0][RTW89_WW][21] = 0, -+ [0][1][2][0][RTW89_WW][23] = 0, -+ [0][1][2][0][RTW89_WW][25] = 0, -+ [0][1][2][0][RTW89_WW][27] = 0, -+ [0][1][2][0][RTW89_WW][29] = 0, -+ [0][1][2][0][RTW89_WW][31] = 0, -+ [0][1][2][0][RTW89_WW][33] = 0, -+ [0][1][2][0][RTW89_WW][35] = 0, -+ [0][1][2][0][RTW89_WW][37] = 0, -+ [0][1][2][0][RTW89_WW][38] = 0, -+ [0][1][2][0][RTW89_WW][40] = 0, -+ [0][1][2][0][RTW89_WW][42] = 0, -+ [0][1][2][0][RTW89_WW][44] = 0, -+ [0][1][2][0][RTW89_WW][46] = 0, -+ [0][1][2][0][RTW89_WW][48] = 0, -+ [0][1][2][0][RTW89_WW][50] = 0, -+ [0][1][2][0][RTW89_WW][52] = 0, -+ [0][1][2][1][RTW89_WW][0] = 0, -+ [0][1][2][1][RTW89_WW][2] = 0, -+ [0][1][2][1][RTW89_WW][4] = 0, -+ [0][1][2][1][RTW89_WW][6] = 0, -+ [0][1][2][1][RTW89_WW][8] = 0, -+ [0][1][2][1][RTW89_WW][10] = 0, -+ [0][1][2][1][RTW89_WW][12] = 0, -+ [0][1][2][1][RTW89_WW][14] = 0, -+ [0][1][2][1][RTW89_WW][15] = 0, -+ [0][1][2][1][RTW89_WW][17] = 0, -+ [0][1][2][1][RTW89_WW][19] = 0, -+ [0][1][2][1][RTW89_WW][21] = 0, -+ [0][1][2][1][RTW89_WW][23] = 0, -+ [0][1][2][1][RTW89_WW][25] = 0, -+ [0][1][2][1][RTW89_WW][27] = 0, -+ [0][1][2][1][RTW89_WW][29] = 0, -+ [0][1][2][1][RTW89_WW][31] = 0, -+ [0][1][2][1][RTW89_WW][33] = 0, -+ [0][1][2][1][RTW89_WW][35] = 0, -+ [0][1][2][1][RTW89_WW][37] = 0, -+ [0][1][2][1][RTW89_WW][38] = 0, -+ [0][1][2][1][RTW89_WW][40] = 0, -+ [0][1][2][1][RTW89_WW][42] = 0, -+ [0][1][2][1][RTW89_WW][44] = 0, -+ [0][1][2][1][RTW89_WW][46] = 0, -+ [0][1][2][1][RTW89_WW][48] = 0, -+ [0][1][2][1][RTW89_WW][50] = 0, -+ [0][1][2][1][RTW89_WW][52] = 0, -+ [1][0][2][0][RTW89_WW][1] = 64, -+ [1][0][2][0][RTW89_WW][5] = 62, -+ [1][0][2][0][RTW89_WW][9] = 64, -+ [1][0][2][0][RTW89_WW][13] = 64, -+ [1][0][2][0][RTW89_WW][16] = 66, -+ [1][0][2][0][RTW89_WW][20] = 66, -+ [1][0][2][0][RTW89_WW][24] = 66, -+ [1][0][2][0][RTW89_WW][28] = 66, -+ [1][0][2][0][RTW89_WW][32] = 66, -+ [1][0][2][0][RTW89_WW][36] = 76, -+ [1][0][2][0][RTW89_WW][39] = 30, -+ [1][0][2][0][RTW89_WW][43] = 30, -+ [1][0][2][0][RTW89_WW][47] = 84, -+ [1][0][2][0][RTW89_WW][51] = 84, -+ [1][1][2][0][RTW89_WW][1] = 0, -+ [1][1][2][0][RTW89_WW][5] = 0, -+ [1][1][2][0][RTW89_WW][9] = 0, -+ [1][1][2][0][RTW89_WW][13] = 0, -+ [1][1][2][0][RTW89_WW][16] = 0, -+ [1][1][2][0][RTW89_WW][20] = 0, -+ [1][1][2][0][RTW89_WW][24] = 0, -+ [1][1][2][0][RTW89_WW][28] = 0, -+ [1][1][2][0][RTW89_WW][32] = 0, -+ [1][1][2][0][RTW89_WW][36] = 0, -+ [1][1][2][0][RTW89_WW][39] = 0, -+ [1][1][2][0][RTW89_WW][43] = 0, -+ [1][1][2][0][RTW89_WW][47] = 0, -+ [1][1][2][0][RTW89_WW][51] = 0, -+ [1][1][2][1][RTW89_WW][1] = 0, -+ [1][1][2][1][RTW89_WW][5] = 0, -+ [1][1][2][1][RTW89_WW][9] = 0, -+ [1][1][2][1][RTW89_WW][13] = 0, -+ [1][1][2][1][RTW89_WW][16] = 0, -+ [1][1][2][1][RTW89_WW][20] = 0, -+ [1][1][2][1][RTW89_WW][24] = 0, -+ [1][1][2][1][RTW89_WW][28] = 0, -+ [1][1][2][1][RTW89_WW][32] = 0, -+ [1][1][2][1][RTW89_WW][36] = 0, -+ [1][1][2][1][RTW89_WW][39] = 0, -+ [1][1][2][1][RTW89_WW][43] = 0, -+ [1][1][2][1][RTW89_WW][47] = 0, -+ [1][1][2][1][RTW89_WW][51] = 0, -+ [2][0][2][0][RTW89_WW][3] = 62, -+ [2][0][2][0][RTW89_WW][11] = 62, -+ [2][0][2][0][RTW89_WW][18] = 64, -+ [2][0][2][0][RTW89_WW][26] = 64, -+ [2][0][2][0][RTW89_WW][34] = 72, -+ [2][0][2][0][RTW89_WW][41] = 30, -+ [2][0][2][0][RTW89_WW][49] = 74, -+ [2][1][2][0][RTW89_WW][3] = 0, -+ [2][1][2][0][RTW89_WW][11] = 0, -+ [2][1][2][0][RTW89_WW][18] = 0, -+ [2][1][2][0][RTW89_WW][26] = 0, -+ [2][1][2][0][RTW89_WW][34] = 0, -+ [2][1][2][0][RTW89_WW][41] = 0, -+ [2][1][2][0][RTW89_WW][49] = 0, -+ [2][1][2][1][RTW89_WW][3] = 0, -+ [2][1][2][1][RTW89_WW][11] = 0, -+ [2][1][2][1][RTW89_WW][18] = 0, -+ [2][1][2][1][RTW89_WW][26] = 0, -+ [2][1][2][1][RTW89_WW][34] = 0, -+ [2][1][2][1][RTW89_WW][41] = 0, -+ [2][1][2][1][RTW89_WW][49] = 0, -+ [3][0][2][0][RTW89_WW][7] = 58, -+ [3][0][2][0][RTW89_WW][22] = 58, -+ [3][0][2][0][RTW89_WW][45] = 0, -+ [3][1][2][0][RTW89_WW][7] = 0, -+ [3][1][2][0][RTW89_WW][22] = 0, -+ [3][1][2][0][RTW89_WW][45] = 0, -+ [3][1][2][1][RTW89_WW][7] = 0, -+ [3][1][2][1][RTW89_WW][22] = 0, -+ [3][1][2][1][RTW89_WW][45] = 0, -+ [0][0][1][0][RTW89_FCC][0] = 80, -+ [0][0][1][0][RTW89_ETSI][0] = 58, -+ [0][0][1][0][RTW89_MKK][0] = 60, -+ [0][0][1][0][RTW89_IC][0] = 62, -+ [0][0][1][0][RTW89_KCC][0] = 74, -+ [0][0][1][0][RTW89_ACMA][0] = 58, -+ [0][0][1][0][RTW89_CN][0] = 60, -+ [0][0][1][0][RTW89_UK][0] = 58, -+ [0][0][1][0][RTW89_FCC][2] = 82, -+ [0][0][1][0][RTW89_ETSI][2] = 58, -+ [0][0][1][0][RTW89_MKK][2] = 60, -+ [0][0][1][0][RTW89_IC][2] = 62, -+ [0][0][1][0][RTW89_KCC][2] = 74, -+ [0][0][1][0][RTW89_ACMA][2] = 58, -+ [0][0][1][0][RTW89_CN][2] = 60, -+ [0][0][1][0][RTW89_UK][2] = 58, -+ [0][0][1][0][RTW89_FCC][4] = 82, -+ [0][0][1][0][RTW89_ETSI][4] = 58, -+ [0][0][1][0][RTW89_MKK][4] = 60, -+ [0][0][1][0][RTW89_IC][4] = 62, -+ [0][0][1][0][RTW89_KCC][4] = 74, -+ [0][0][1][0][RTW89_ACMA][4] = 58, -+ [0][0][1][0][RTW89_CN][4] = 60, -+ [0][0][1][0][RTW89_UK][4] = 58, -+ [0][0][1][0][RTW89_FCC][6] = 82, -+ [0][0][1][0][RTW89_ETSI][6] = 58, -+ [0][0][1][0][RTW89_MKK][6] = 60, -+ [0][0][1][0][RTW89_IC][6] = 62, -+ [0][0][1][0][RTW89_KCC][6] = 50, -+ [0][0][1][0][RTW89_ACMA][6] = 58, -+ [0][0][1][0][RTW89_CN][6] = 60, -+ [0][0][1][0][RTW89_UK][6] = 58, -+ [0][0][1][0][RTW89_FCC][8] = 82, -+ [0][0][1][0][RTW89_ETSI][8] = 58, -+ [0][0][1][0][RTW89_MKK][8] = 60, -+ [0][0][1][0][RTW89_IC][8] = 64, -+ [0][0][1][0][RTW89_KCC][8] = 74, -+ [0][0][1][0][RTW89_ACMA][8] = 58, -+ [0][0][1][0][RTW89_CN][8] = 60, -+ [0][0][1][0][RTW89_UK][8] = 58, -+ [0][0][1][0][RTW89_FCC][10] = 82, -+ [0][0][1][0][RTW89_ETSI][10] = 58, -+ [0][0][1][0][RTW89_MKK][10] = 60, -+ [0][0][1][0][RTW89_IC][10] = 64, -+ [0][0][1][0][RTW89_KCC][10] = 74, -+ [0][0][1][0][RTW89_ACMA][10] = 58, -+ [0][0][1][0][RTW89_CN][10] = 60, -+ [0][0][1][0][RTW89_UK][10] = 58, -+ [0][0][1][0][RTW89_FCC][12] = 82, -+ [0][0][1][0][RTW89_ETSI][12] = 58, -+ [0][0][1][0][RTW89_MKK][12] = 60, -+ [0][0][1][0][RTW89_IC][12] = 64, -+ [0][0][1][0][RTW89_KCC][12] = 76, -+ [0][0][1][0][RTW89_ACMA][12] = 58, -+ [0][0][1][0][RTW89_CN][12] = 60, -+ [0][0][1][0][RTW89_UK][12] = 58, -+ [0][0][1][0][RTW89_FCC][14] = 78, -+ [0][0][1][0][RTW89_ETSI][14] = 58, -+ [0][0][1][0][RTW89_MKK][14] = 60, -+ [0][0][1][0][RTW89_IC][14] = 64, -+ [0][0][1][0][RTW89_KCC][14] = 76, -+ [0][0][1][0][RTW89_ACMA][14] = 58, -+ [0][0][1][0][RTW89_CN][14] = 60, -+ [0][0][1][0][RTW89_UK][14] = 58, -+ [0][0][1][0][RTW89_FCC][15] = 78, -+ [0][0][1][0][RTW89_ETSI][15] = 58, -+ [0][0][1][0][RTW89_MKK][15] = 78, -+ [0][0][1][0][RTW89_IC][15] = 78, -+ [0][0][1][0][RTW89_KCC][15] = 78, -+ [0][0][1][0][RTW89_ACMA][15] = 58, -+ [0][0][1][0][RTW89_CN][15] = 127, -+ [0][0][1][0][RTW89_UK][15] = 58, -+ [0][0][1][0][RTW89_FCC][17] = 82, -+ [0][0][1][0][RTW89_ETSI][17] = 60, -+ [0][0][1][0][RTW89_MKK][17] = 78, -+ [0][0][1][0][RTW89_IC][17] = 82, -+ [0][0][1][0][RTW89_KCC][17] = 78, -+ [0][0][1][0][RTW89_ACMA][17] = 60, -+ [0][0][1][0][RTW89_CN][17] = 127, -+ [0][0][1][0][RTW89_UK][17] = 60, -+ [0][0][1][0][RTW89_FCC][19] = 82, -+ [0][0][1][0][RTW89_ETSI][19] = 60, -+ [0][0][1][0][RTW89_MKK][19] = 78, -+ [0][0][1][0][RTW89_IC][19] = 82, -+ [0][0][1][0][RTW89_KCC][19] = 78, -+ [0][0][1][0][RTW89_ACMA][19] = 60, -+ [0][0][1][0][RTW89_CN][19] = 127, -+ [0][0][1][0][RTW89_UK][19] = 60, -+ [0][0][1][0][RTW89_FCC][21] = 82, -+ [0][0][1][0][RTW89_ETSI][21] = 60, -+ [0][0][1][0][RTW89_MKK][21] = 78, -+ [0][0][1][0][RTW89_IC][21] = 82, -+ [0][0][1][0][RTW89_KCC][21] = 78, -+ [0][0][1][0][RTW89_ACMA][21] = 60, -+ [0][0][1][0][RTW89_CN][21] = 127, -+ [0][0][1][0][RTW89_UK][21] = 60, -+ [0][0][1][0][RTW89_FCC][23] = 82, -+ [0][0][1][0][RTW89_ETSI][23] = 60, -+ [0][0][1][0][RTW89_MKK][23] = 78, -+ [0][0][1][0][RTW89_IC][23] = 82, -+ [0][0][1][0][RTW89_KCC][23] = 78, -+ [0][0][1][0][RTW89_ACMA][23] = 60, -+ [0][0][1][0][RTW89_CN][23] = 127, -+ [0][0][1][0][RTW89_UK][23] = 60, -+ [0][0][1][0][RTW89_FCC][25] = 82, -+ [0][0][1][0][RTW89_ETSI][25] = 60, -+ [0][0][1][0][RTW89_MKK][25] = 78, -+ [0][0][1][0][RTW89_IC][25] = 127, -+ [0][0][1][0][RTW89_KCC][25] = 78, -+ [0][0][1][0][RTW89_ACMA][25] = 127, -+ [0][0][1][0][RTW89_CN][25] = 127, -+ [0][0][1][0][RTW89_UK][25] = 60, -+ [0][0][1][0][RTW89_FCC][27] = 82, -+ [0][0][1][0][RTW89_ETSI][27] = 60, -+ [0][0][1][0][RTW89_MKK][27] = 78, -+ [0][0][1][0][RTW89_IC][27] = 127, -+ [0][0][1][0][RTW89_KCC][27] = 78, -+ [0][0][1][0][RTW89_ACMA][27] = 127, -+ [0][0][1][0][RTW89_CN][27] = 127, -+ [0][0][1][0][RTW89_UK][27] = 60, -+ [0][0][1][0][RTW89_FCC][29] = 82, -+ [0][0][1][0][RTW89_ETSI][29] = 60, -+ [0][0][1][0][RTW89_MKK][29] = 78, -+ [0][0][1][0][RTW89_IC][29] = 127, -+ [0][0][1][0][RTW89_KCC][29] = 78, -+ [0][0][1][0][RTW89_ACMA][29] = 127, -+ [0][0][1][0][RTW89_CN][29] = 127, -+ [0][0][1][0][RTW89_UK][29] = 60, -+ [0][0][1][0][RTW89_FCC][31] = 82, -+ [0][0][1][0][RTW89_ETSI][31] = 60, -+ [0][0][1][0][RTW89_MKK][31] = 78, -+ [0][0][1][0][RTW89_IC][31] = 82, -+ [0][0][1][0][RTW89_KCC][31] = 74, -+ [0][0][1][0][RTW89_ACMA][31] = 60, -+ [0][0][1][0][RTW89_CN][31] = 127, -+ [0][0][1][0][RTW89_UK][31] = 60, -+ [0][0][1][0][RTW89_FCC][33] = 82, -+ [0][0][1][0][RTW89_ETSI][33] = 60, -+ [0][0][1][0][RTW89_MKK][33] = 78, -+ [0][0][1][0][RTW89_IC][33] = 82, -+ [0][0][1][0][RTW89_KCC][33] = 74, -+ [0][0][1][0][RTW89_ACMA][33] = 60, -+ [0][0][1][0][RTW89_CN][33] = 127, -+ [0][0][1][0][RTW89_UK][33] = 60, -+ [0][0][1][0][RTW89_FCC][35] = 72, -+ [0][0][1][0][RTW89_ETSI][35] = 60, -+ [0][0][1][0][RTW89_MKK][35] = 78, -+ [0][0][1][0][RTW89_IC][35] = 72, -+ [0][0][1][0][RTW89_KCC][35] = 74, -+ [0][0][1][0][RTW89_ACMA][35] = 60, -+ [0][0][1][0][RTW89_CN][35] = 127, -+ [0][0][1][0][RTW89_UK][35] = 60, -+ [0][0][1][0][RTW89_FCC][37] = 82, -+ [0][0][1][0][RTW89_ETSI][37] = 127, -+ [0][0][1][0][RTW89_MKK][37] = 78, -+ [0][0][1][0][RTW89_IC][37] = 82, -+ [0][0][1][0][RTW89_KCC][37] = 74, -+ [0][0][1][0][RTW89_ACMA][37] = 78, -+ [0][0][1][0][RTW89_CN][37] = 127, -+ [0][0][1][0][RTW89_UK][37] = 78, -+ [0][0][1][0][RTW89_FCC][38] = 82, -+ [0][0][1][0][RTW89_ETSI][38] = 30, -+ [0][0][1][0][RTW89_MKK][38] = 127, -+ [0][0][1][0][RTW89_IC][38] = 82, -+ [0][0][1][0][RTW89_KCC][38] = 70, -+ [0][0][1][0][RTW89_ACMA][38] = 78, -+ [0][0][1][0][RTW89_CN][38] = 78, -+ [0][0][1][0][RTW89_UK][38] = 58, -+ [0][0][1][0][RTW89_FCC][40] = 82, -+ [0][0][1][0][RTW89_ETSI][40] = 30, -+ [0][0][1][0][RTW89_MKK][40] = 127, -+ [0][0][1][0][RTW89_IC][40] = 82, -+ [0][0][1][0][RTW89_KCC][40] = 76, -+ [0][0][1][0][RTW89_ACMA][40] = 78, -+ [0][0][1][0][RTW89_CN][40] = 78, -+ [0][0][1][0][RTW89_UK][40] = 58, -+ [0][0][1][0][RTW89_FCC][42] = 82, -+ [0][0][1][0][RTW89_ETSI][42] = 30, -+ [0][0][1][0][RTW89_MKK][42] = 127, -+ [0][0][1][0][RTW89_IC][42] = 82, -+ [0][0][1][0][RTW89_KCC][42] = 76, -+ [0][0][1][0][RTW89_ACMA][42] = 78, -+ [0][0][1][0][RTW89_CN][42] = 78, -+ [0][0][1][0][RTW89_UK][42] = 58, -+ [0][0][1][0][RTW89_FCC][44] = 82, -+ [0][0][1][0][RTW89_ETSI][44] = 30, -+ [0][0][1][0][RTW89_MKK][44] = 127, -+ [0][0][1][0][RTW89_IC][44] = 82, -+ [0][0][1][0][RTW89_KCC][44] = 76, -+ [0][0][1][0][RTW89_ACMA][44] = 78, -+ [0][0][1][0][RTW89_CN][44] = 78, -+ [0][0][1][0][RTW89_UK][44] = 58, -+ [0][0][1][0][RTW89_FCC][46] = 82, -+ [0][0][1][0][RTW89_ETSI][46] = 30, -+ [0][0][1][0][RTW89_MKK][46] = 127, -+ [0][0][1][0][RTW89_IC][46] = 82, -+ [0][0][1][0][RTW89_KCC][46] = 76, -+ [0][0][1][0][RTW89_ACMA][46] = 78, -+ [0][0][1][0][RTW89_CN][46] = 78, -+ [0][0][1][0][RTW89_UK][46] = 58, -+ [0][0][1][0][RTW89_FCC][48] = 72, -+ [0][0][1][0][RTW89_ETSI][48] = 127, -+ [0][0][1][0][RTW89_MKK][48] = 127, -+ [0][0][1][0][RTW89_IC][48] = 127, -+ [0][0][1][0][RTW89_KCC][48] = 127, -+ [0][0][1][0][RTW89_ACMA][48] = 127, -+ [0][0][1][0][RTW89_CN][48] = 127, -+ [0][0][1][0][RTW89_UK][48] = 127, -+ [0][0][1][0][RTW89_FCC][50] = 72, -+ [0][0][1][0][RTW89_ETSI][50] = 127, -+ [0][0][1][0][RTW89_MKK][50] = 127, -+ [0][0][1][0][RTW89_IC][50] = 127, -+ [0][0][1][0][RTW89_KCC][50] = 127, -+ [0][0][1][0][RTW89_ACMA][50] = 127, -+ [0][0][1][0][RTW89_CN][50] = 127, -+ [0][0][1][0][RTW89_UK][50] = 127, -+ [0][0][1][0][RTW89_FCC][52] = 72, -+ [0][0][1][0][RTW89_ETSI][52] = 127, -+ [0][0][1][0][RTW89_MKK][52] = 127, -+ [0][0][1][0][RTW89_IC][52] = 127, -+ [0][0][1][0][RTW89_KCC][52] = 127, -+ [0][0][1][0][RTW89_ACMA][52] = 127, -+ [0][0][1][0][RTW89_CN][52] = 127, -+ [0][0][1][0][RTW89_UK][52] = 127, -+ [0][1][1][0][RTW89_FCC][0] = 127, -+ [0][1][1][0][RTW89_ETSI][0] = 127, -+ [0][1][1][0][RTW89_MKK][0] = 127, -+ [0][1][1][0][RTW89_IC][0] = 127, -+ [0][1][1][0][RTW89_KCC][0] = 127, -+ [0][1][1][0][RTW89_ACMA][0] = 127, -+ [0][1][1][0][RTW89_CN][0] = 127, -+ [0][1][1][0][RTW89_UK][0] = 127, -+ [0][1][1][0][RTW89_FCC][2] = 127, -+ [0][1][1][0][RTW89_ETSI][2] = 127, -+ [0][1][1][0][RTW89_MKK][2] = 127, -+ [0][1][1][0][RTW89_IC][2] = 127, -+ [0][1][1][0][RTW89_KCC][2] = 127, -+ [0][1][1][0][RTW89_ACMA][2] = 127, -+ [0][1][1][0][RTW89_CN][2] = 127, -+ [0][1][1][0][RTW89_UK][2] = 127, -+ [0][1][1][0][RTW89_FCC][4] = 127, -+ [0][1][1][0][RTW89_ETSI][4] = 127, -+ [0][1][1][0][RTW89_MKK][4] = 127, -+ [0][1][1][0][RTW89_IC][4] = 127, -+ [0][1][1][0][RTW89_KCC][4] = 127, -+ [0][1][1][0][RTW89_ACMA][4] = 127, -+ [0][1][1][0][RTW89_CN][4] = 127, -+ [0][1][1][0][RTW89_UK][4] = 127, -+ [0][1][1][0][RTW89_FCC][6] = 127, -+ [0][1][1][0][RTW89_ETSI][6] = 127, -+ [0][1][1][0][RTW89_MKK][6] = 127, -+ [0][1][1][0][RTW89_IC][6] = 127, -+ [0][1][1][0][RTW89_KCC][6] = 127, -+ [0][1][1][0][RTW89_ACMA][6] = 127, -+ [0][1][1][0][RTW89_CN][6] = 127, -+ [0][1][1][0][RTW89_UK][6] = 127, -+ [0][1][1][0][RTW89_FCC][8] = 127, -+ [0][1][1][0][RTW89_ETSI][8] = 127, -+ [0][1][1][0][RTW89_MKK][8] = 127, -+ [0][1][1][0][RTW89_IC][8] = 127, -+ [0][1][1][0][RTW89_KCC][8] = 127, -+ [0][1][1][0][RTW89_ACMA][8] = 127, -+ [0][1][1][0][RTW89_CN][8] = 127, -+ [0][1][1][0][RTW89_UK][8] = 127, -+ [0][1][1][0][RTW89_FCC][10] = 127, -+ [0][1][1][0][RTW89_ETSI][10] = 127, -+ [0][1][1][0][RTW89_MKK][10] = 127, -+ [0][1][1][0][RTW89_IC][10] = 127, -+ [0][1][1][0][RTW89_KCC][10] = 127, -+ [0][1][1][0][RTW89_ACMA][10] = 127, -+ [0][1][1][0][RTW89_CN][10] = 127, -+ [0][1][1][0][RTW89_UK][10] = 127, -+ [0][1][1][0][RTW89_FCC][12] = 127, -+ [0][1][1][0][RTW89_ETSI][12] = 127, -+ [0][1][1][0][RTW89_MKK][12] = 127, -+ [0][1][1][0][RTW89_IC][12] = 127, -+ [0][1][1][0][RTW89_KCC][12] = 127, -+ [0][1][1][0][RTW89_ACMA][12] = 127, -+ [0][1][1][0][RTW89_CN][12] = 127, -+ [0][1][1][0][RTW89_UK][12] = 127, -+ [0][1][1][0][RTW89_FCC][14] = 127, -+ [0][1][1][0][RTW89_ETSI][14] = 127, -+ [0][1][1][0][RTW89_MKK][14] = 127, -+ [0][1][1][0][RTW89_IC][14] = 127, -+ [0][1][1][0][RTW89_KCC][14] = 127, -+ [0][1][1][0][RTW89_ACMA][14] = 127, -+ [0][1][1][0][RTW89_CN][14] = 127, -+ [0][1][1][0][RTW89_UK][14] = 127, -+ [0][1][1][0][RTW89_FCC][15] = 127, -+ [0][1][1][0][RTW89_ETSI][15] = 127, -+ [0][1][1][0][RTW89_MKK][15] = 127, -+ [0][1][1][0][RTW89_IC][15] = 127, -+ [0][1][1][0][RTW89_KCC][15] = 127, -+ [0][1][1][0][RTW89_ACMA][15] = 127, -+ [0][1][1][0][RTW89_CN][15] = 127, -+ [0][1][1][0][RTW89_UK][15] = 127, -+ [0][1][1][0][RTW89_FCC][17] = 127, -+ [0][1][1][0][RTW89_ETSI][17] = 127, -+ [0][1][1][0][RTW89_MKK][17] = 127, -+ [0][1][1][0][RTW89_IC][17] = 127, -+ [0][1][1][0][RTW89_KCC][17] = 127, -+ [0][1][1][0][RTW89_ACMA][17] = 127, -+ [0][1][1][0][RTW89_CN][17] = 127, -+ [0][1][1][0][RTW89_UK][17] = 127, -+ [0][1][1][0][RTW89_FCC][19] = 127, -+ [0][1][1][0][RTW89_ETSI][19] = 127, -+ [0][1][1][0][RTW89_MKK][19] = 127, -+ [0][1][1][0][RTW89_IC][19] = 127, -+ [0][1][1][0][RTW89_KCC][19] = 127, -+ [0][1][1][0][RTW89_ACMA][19] = 127, -+ [0][1][1][0][RTW89_CN][19] = 127, -+ [0][1][1][0][RTW89_UK][19] = 127, -+ [0][1][1][0][RTW89_FCC][21] = 127, -+ [0][1][1][0][RTW89_ETSI][21] = 127, -+ [0][1][1][0][RTW89_MKK][21] = 127, -+ [0][1][1][0][RTW89_IC][21] = 127, -+ [0][1][1][0][RTW89_KCC][21] = 127, -+ [0][1][1][0][RTW89_ACMA][21] = 127, -+ [0][1][1][0][RTW89_CN][21] = 127, -+ [0][1][1][0][RTW89_UK][21] = 127, -+ [0][1][1][0][RTW89_FCC][23] = 127, -+ [0][1][1][0][RTW89_ETSI][23] = 127, -+ [0][1][1][0][RTW89_MKK][23] = 127, -+ [0][1][1][0][RTW89_IC][23] = 127, -+ [0][1][1][0][RTW89_KCC][23] = 127, -+ [0][1][1][0][RTW89_ACMA][23] = 127, -+ [0][1][1][0][RTW89_CN][23] = 127, -+ [0][1][1][0][RTW89_UK][23] = 127, -+ [0][1][1][0][RTW89_FCC][25] = 127, -+ [0][1][1][0][RTW89_ETSI][25] = 127, -+ [0][1][1][0][RTW89_MKK][25] = 127, -+ [0][1][1][0][RTW89_IC][25] = 127, -+ [0][1][1][0][RTW89_KCC][25] = 127, -+ [0][1][1][0][RTW89_ACMA][25] = 127, -+ [0][1][1][0][RTW89_CN][25] = 127, -+ [0][1][1][0][RTW89_UK][25] = 127, -+ [0][1][1][0][RTW89_FCC][27] = 127, -+ [0][1][1][0][RTW89_ETSI][27] = 127, -+ [0][1][1][0][RTW89_MKK][27] = 127, -+ [0][1][1][0][RTW89_IC][27] = 127, -+ [0][1][1][0][RTW89_KCC][27] = 127, -+ [0][1][1][0][RTW89_ACMA][27] = 127, -+ [0][1][1][0][RTW89_CN][27] = 127, -+ [0][1][1][0][RTW89_UK][27] = 127, -+ [0][1][1][0][RTW89_FCC][29] = 127, -+ [0][1][1][0][RTW89_ETSI][29] = 127, -+ [0][1][1][0][RTW89_MKK][29] = 127, -+ [0][1][1][0][RTW89_IC][29] = 127, -+ [0][1][1][0][RTW89_KCC][29] = 127, -+ [0][1][1][0][RTW89_ACMA][29] = 127, -+ [0][1][1][0][RTW89_CN][29] = 127, -+ [0][1][1][0][RTW89_UK][29] = 127, -+ [0][1][1][0][RTW89_FCC][31] = 127, -+ [0][1][1][0][RTW89_ETSI][31] = 127, -+ [0][1][1][0][RTW89_MKK][31] = 127, -+ [0][1][1][0][RTW89_IC][31] = 127, -+ [0][1][1][0][RTW89_KCC][31] = 127, -+ [0][1][1][0][RTW89_ACMA][31] = 127, -+ [0][1][1][0][RTW89_CN][31] = 127, -+ [0][1][1][0][RTW89_UK][31] = 127, -+ [0][1][1][0][RTW89_FCC][33] = 127, -+ [0][1][1][0][RTW89_ETSI][33] = 127, -+ [0][1][1][0][RTW89_MKK][33] = 127, -+ [0][1][1][0][RTW89_IC][33] = 127, -+ [0][1][1][0][RTW89_KCC][33] = 127, -+ [0][1][1][0][RTW89_ACMA][33] = 127, -+ [0][1][1][0][RTW89_CN][33] = 127, -+ [0][1][1][0][RTW89_UK][33] = 127, -+ [0][1][1][0][RTW89_FCC][35] = 127, -+ [0][1][1][0][RTW89_ETSI][35] = 127, -+ [0][1][1][0][RTW89_MKK][35] = 127, -+ [0][1][1][0][RTW89_IC][35] = 127, -+ [0][1][1][0][RTW89_KCC][35] = 127, -+ [0][1][1][0][RTW89_ACMA][35] = 127, -+ [0][1][1][0][RTW89_CN][35] = 127, -+ [0][1][1][0][RTW89_UK][35] = 127, -+ [0][1][1][0][RTW89_FCC][37] = 127, -+ [0][1][1][0][RTW89_ETSI][37] = 127, -+ [0][1][1][0][RTW89_MKK][37] = 127, -+ [0][1][1][0][RTW89_IC][37] = 127, -+ [0][1][1][0][RTW89_KCC][37] = 127, -+ [0][1][1][0][RTW89_ACMA][37] = 127, -+ [0][1][1][0][RTW89_CN][37] = 127, -+ [0][1][1][0][RTW89_UK][37] = 127, -+ [0][1][1][0][RTW89_FCC][38] = 127, -+ [0][1][1][0][RTW89_ETSI][38] = 127, -+ [0][1][1][0][RTW89_MKK][38] = 127, -+ [0][1][1][0][RTW89_IC][38] = 127, -+ [0][1][1][0][RTW89_KCC][38] = 127, -+ [0][1][1][0][RTW89_ACMA][38] = 127, -+ [0][1][1][0][RTW89_CN][38] = 127, -+ [0][1][1][0][RTW89_UK][38] = 127, -+ [0][1][1][0][RTW89_FCC][40] = 127, -+ [0][1][1][0][RTW89_ETSI][40] = 127, -+ [0][1][1][0][RTW89_MKK][40] = 127, -+ [0][1][1][0][RTW89_IC][40] = 127, -+ [0][1][1][0][RTW89_KCC][40] = 127, -+ [0][1][1][0][RTW89_ACMA][40] = 127, -+ [0][1][1][0][RTW89_CN][40] = 127, -+ [0][1][1][0][RTW89_UK][40] = 127, -+ [0][1][1][0][RTW89_FCC][42] = 127, -+ [0][1][1][0][RTW89_ETSI][42] = 127, -+ [0][1][1][0][RTW89_MKK][42] = 127, -+ [0][1][1][0][RTW89_IC][42] = 127, -+ [0][1][1][0][RTW89_KCC][42] = 127, -+ [0][1][1][0][RTW89_ACMA][42] = 127, -+ [0][1][1][0][RTW89_CN][42] = 127, -+ [0][1][1][0][RTW89_UK][42] = 127, -+ [0][1][1][0][RTW89_FCC][44] = 127, -+ [0][1][1][0][RTW89_ETSI][44] = 127, -+ [0][1][1][0][RTW89_MKK][44] = 127, -+ [0][1][1][0][RTW89_IC][44] = 127, -+ [0][1][1][0][RTW89_KCC][44] = 127, -+ [0][1][1][0][RTW89_ACMA][44] = 127, -+ [0][1][1][0][RTW89_CN][44] = 127, -+ [0][1][1][0][RTW89_UK][44] = 127, -+ [0][1][1][0][RTW89_FCC][46] = 127, -+ [0][1][1][0][RTW89_ETSI][46] = 127, -+ [0][1][1][0][RTW89_MKK][46] = 127, -+ [0][1][1][0][RTW89_IC][46] = 127, -+ [0][1][1][0][RTW89_KCC][46] = 127, -+ [0][1][1][0][RTW89_ACMA][46] = 127, -+ [0][1][1][0][RTW89_CN][46] = 127, -+ [0][1][1][0][RTW89_UK][46] = 127, -+ [0][1][1][0][RTW89_FCC][48] = 127, -+ [0][1][1][0][RTW89_ETSI][48] = 127, -+ [0][1][1][0][RTW89_MKK][48] = 127, -+ [0][1][1][0][RTW89_IC][48] = 127, -+ [0][1][1][0][RTW89_KCC][48] = 127, -+ [0][1][1][0][RTW89_ACMA][48] = 127, -+ [0][1][1][0][RTW89_CN][48] = 127, -+ [0][1][1][0][RTW89_UK][48] = 127, -+ [0][1][1][0][RTW89_FCC][50] = 127, -+ [0][1][1][0][RTW89_ETSI][50] = 127, -+ [0][1][1][0][RTW89_MKK][50] = 127, -+ [0][1][1][0][RTW89_IC][50] = 127, -+ [0][1][1][0][RTW89_KCC][50] = 127, -+ [0][1][1][0][RTW89_ACMA][50] = 127, -+ [0][1][1][0][RTW89_CN][50] = 127, -+ [0][1][1][0][RTW89_UK][50] = 127, -+ [0][1][1][0][RTW89_FCC][52] = 127, -+ [0][1][1][0][RTW89_ETSI][52] = 127, -+ [0][1][1][0][RTW89_MKK][52] = 127, -+ [0][1][1][0][RTW89_IC][52] = 127, -+ [0][1][1][0][RTW89_KCC][52] = 127, -+ [0][1][1][0][RTW89_ACMA][52] = 127, -+ [0][1][1][0][RTW89_CN][52] = 127, -+ [0][1][1][0][RTW89_UK][52] = 127, -+ [0][0][2][0][RTW89_FCC][0] = 78, -+ [0][0][2][0][RTW89_ETSI][0] = 62, -+ [0][0][2][0][RTW89_MKK][0] = 62, -+ [0][0][2][0][RTW89_IC][0] = 64, -+ [0][0][2][0][RTW89_KCC][0] = 76, -+ [0][0][2][0][RTW89_ACMA][0] = 62, -+ [0][0][2][0][RTW89_CN][0] = 62, -+ [0][0][2][0][RTW89_UK][0] = 62, -+ [0][0][2][0][RTW89_FCC][2] = 82, -+ [0][0][2][0][RTW89_ETSI][2] = 62, -+ [0][0][2][0][RTW89_MKK][2] = 62, -+ [0][0][2][0][RTW89_IC][2] = 64, -+ [0][0][2][0][RTW89_KCC][2] = 76, -+ [0][0][2][0][RTW89_ACMA][2] = 62, -+ [0][0][2][0][RTW89_CN][2] = 62, -+ [0][0][2][0][RTW89_UK][2] = 62, -+ [0][0][2][0][RTW89_FCC][4] = 82, -+ [0][0][2][0][RTW89_ETSI][4] = 62, -+ [0][0][2][0][RTW89_MKK][4] = 62, -+ [0][0][2][0][RTW89_IC][4] = 64, -+ [0][0][2][0][RTW89_KCC][4] = 76, -+ [0][0][2][0][RTW89_ACMA][4] = 62, -+ [0][0][2][0][RTW89_CN][4] = 62, -+ [0][0][2][0][RTW89_UK][4] = 62, -+ [0][0][2][0][RTW89_FCC][6] = 82, -+ [0][0][2][0][RTW89_ETSI][6] = 62, -+ [0][0][2][0][RTW89_MKK][6] = 62, -+ [0][0][2][0][RTW89_IC][6] = 64, -+ [0][0][2][0][RTW89_KCC][6] = 54, -+ [0][0][2][0][RTW89_ACMA][6] = 62, -+ [0][0][2][0][RTW89_CN][6] = 62, -+ [0][0][2][0][RTW89_UK][6] = 62, -+ [0][0][2][0][RTW89_FCC][8] = 82, -+ [0][0][2][0][RTW89_ETSI][8] = 62, -+ [0][0][2][0][RTW89_MKK][8] = 62, -+ [0][0][2][0][RTW89_IC][8] = 64, -+ [0][0][2][0][RTW89_KCC][8] = 76, -+ [0][0][2][0][RTW89_ACMA][8] = 62, -+ [0][0][2][0][RTW89_CN][8] = 62, -+ [0][0][2][0][RTW89_UK][8] = 62, -+ [0][0][2][0][RTW89_FCC][10] = 82, -+ [0][0][2][0][RTW89_ETSI][10] = 62, -+ [0][0][2][0][RTW89_MKK][10] = 62, -+ [0][0][2][0][RTW89_IC][10] = 64, -+ [0][0][2][0][RTW89_KCC][10] = 76, -+ [0][0][2][0][RTW89_ACMA][10] = 62, -+ [0][0][2][0][RTW89_CN][10] = 62, -+ [0][0][2][0][RTW89_UK][10] = 62, -+ [0][0][2][0][RTW89_FCC][12] = 82, -+ [0][0][2][0][RTW89_ETSI][12] = 62, -+ [0][0][2][0][RTW89_MKK][12] = 62, -+ [0][0][2][0][RTW89_IC][12] = 64, -+ [0][0][2][0][RTW89_KCC][12] = 78, -+ [0][0][2][0][RTW89_ACMA][12] = 62, -+ [0][0][2][0][RTW89_CN][12] = 62, -+ [0][0][2][0][RTW89_UK][12] = 62, -+ [0][0][2][0][RTW89_FCC][14] = 76, -+ [0][0][2][0][RTW89_ETSI][14] = 62, -+ [0][0][2][0][RTW89_MKK][14] = 62, -+ [0][0][2][0][RTW89_IC][14] = 64, -+ [0][0][2][0][RTW89_KCC][14] = 78, -+ [0][0][2][0][RTW89_ACMA][14] = 62, -+ [0][0][2][0][RTW89_CN][14] = 62, -+ [0][0][2][0][RTW89_UK][14] = 62, -+ [0][0][2][0][RTW89_FCC][15] = 76, -+ [0][0][2][0][RTW89_ETSI][15] = 60, -+ [0][0][2][0][RTW89_MKK][15] = 78, -+ [0][0][2][0][RTW89_IC][15] = 76, -+ [0][0][2][0][RTW89_KCC][15] = 78, -+ [0][0][2][0][RTW89_ACMA][15] = 60, -+ [0][0][2][0][RTW89_CN][15] = 127, -+ [0][0][2][0][RTW89_UK][15] = 60, -+ [0][0][2][0][RTW89_FCC][17] = 82, -+ [0][0][2][0][RTW89_ETSI][17] = 62, -+ [0][0][2][0][RTW89_MKK][17] = 78, -+ [0][0][2][0][RTW89_IC][17] = 82, -+ [0][0][2][0][RTW89_KCC][17] = 78, -+ [0][0][2][0][RTW89_ACMA][17] = 62, -+ [0][0][2][0][RTW89_CN][17] = 127, -+ [0][0][2][0][RTW89_UK][17] = 62, -+ [0][0][2][0][RTW89_FCC][19] = 82, -+ [0][0][2][0][RTW89_ETSI][19] = 62, -+ [0][0][2][0][RTW89_MKK][19] = 78, -+ [0][0][2][0][RTW89_IC][19] = 82, -+ [0][0][2][0][RTW89_KCC][19] = 78, -+ [0][0][2][0][RTW89_ACMA][19] = 62, -+ [0][0][2][0][RTW89_CN][19] = 127, -+ [0][0][2][0][RTW89_UK][19] = 62, -+ [0][0][2][0][RTW89_FCC][21] = 82, -+ [0][0][2][0][RTW89_ETSI][21] = 62, -+ [0][0][2][0][RTW89_MKK][21] = 78, -+ [0][0][2][0][RTW89_IC][21] = 82, -+ [0][0][2][0][RTW89_KCC][21] = 78, -+ [0][0][2][0][RTW89_ACMA][21] = 62, -+ [0][0][2][0][RTW89_CN][21] = 127, -+ [0][0][2][0][RTW89_UK][21] = 62, -+ [0][0][2][0][RTW89_FCC][23] = 82, -+ [0][0][2][0][RTW89_ETSI][23] = 62, -+ [0][0][2][0][RTW89_MKK][23] = 78, -+ [0][0][2][0][RTW89_IC][23] = 82, -+ [0][0][2][0][RTW89_KCC][23] = 78, -+ [0][0][2][0][RTW89_ACMA][23] = 62, -+ [0][0][2][0][RTW89_CN][23] = 127, -+ [0][0][2][0][RTW89_UK][23] = 62, -+ [0][0][2][0][RTW89_FCC][25] = 82, -+ [0][0][2][0][RTW89_ETSI][25] = 62, -+ [0][0][2][0][RTW89_MKK][25] = 78, -+ [0][0][2][0][RTW89_IC][25] = 127, -+ [0][0][2][0][RTW89_KCC][25] = 78, -+ [0][0][2][0][RTW89_ACMA][25] = 127, -+ [0][0][2][0][RTW89_CN][25] = 127, -+ [0][0][2][0][RTW89_UK][25] = 62, -+ [0][0][2][0][RTW89_FCC][27] = 82, -+ [0][0][2][0][RTW89_ETSI][27] = 62, -+ [0][0][2][0][RTW89_MKK][27] = 78, -+ [0][0][2][0][RTW89_IC][27] = 127, -+ [0][0][2][0][RTW89_KCC][27] = 78, -+ [0][0][2][0][RTW89_ACMA][27] = 127, -+ [0][0][2][0][RTW89_CN][27] = 127, -+ [0][0][2][0][RTW89_UK][27] = 62, -+ [0][0][2][0][RTW89_FCC][29] = 82, -+ [0][0][2][0][RTW89_ETSI][29] = 62, -+ [0][0][2][0][RTW89_MKK][29] = 78, -+ [0][0][2][0][RTW89_IC][29] = 127, -+ [0][0][2][0][RTW89_KCC][29] = 78, -+ [0][0][2][0][RTW89_ACMA][29] = 127, -+ [0][0][2][0][RTW89_CN][29] = 127, -+ [0][0][2][0][RTW89_UK][29] = 62, -+ [0][0][2][0][RTW89_FCC][31] = 82, -+ [0][0][2][0][RTW89_ETSI][31] = 62, -+ [0][0][2][0][RTW89_MKK][31] = 78, -+ [0][0][2][0][RTW89_IC][31] = 82, -+ [0][0][2][0][RTW89_KCC][31] = 74, -+ [0][0][2][0][RTW89_ACMA][31] = 62, -+ [0][0][2][0][RTW89_CN][31] = 127, -+ [0][0][2][0][RTW89_UK][31] = 62, -+ [0][0][2][0][RTW89_FCC][33] = 82, -+ [0][0][2][0][RTW89_ETSI][33] = 62, -+ [0][0][2][0][RTW89_MKK][33] = 78, -+ [0][0][2][0][RTW89_IC][33] = 82, -+ [0][0][2][0][RTW89_KCC][33] = 74, -+ [0][0][2][0][RTW89_ACMA][33] = 62, -+ [0][0][2][0][RTW89_CN][33] = 127, -+ [0][0][2][0][RTW89_UK][33] = 62, -+ [0][0][2][0][RTW89_FCC][35] = 72, -+ [0][0][2][0][RTW89_ETSI][35] = 62, -+ [0][0][2][0][RTW89_MKK][35] = 78, -+ [0][0][2][0][RTW89_IC][35] = 72, -+ [0][0][2][0][RTW89_KCC][35] = 74, -+ [0][0][2][0][RTW89_ACMA][35] = 62, -+ [0][0][2][0][RTW89_CN][35] = 127, -+ [0][0][2][0][RTW89_UK][35] = 62, -+ [0][0][2][0][RTW89_FCC][37] = 82, -+ [0][0][2][0][RTW89_ETSI][37] = 127, -+ [0][0][2][0][RTW89_MKK][37] = 78, -+ [0][0][2][0][RTW89_IC][37] = 82, -+ [0][0][2][0][RTW89_KCC][37] = 76, -+ [0][0][2][0][RTW89_ACMA][37] = 78, -+ [0][0][2][0][RTW89_CN][37] = 127, -+ [0][0][2][0][RTW89_UK][37] = 78, -+ [0][0][2][0][RTW89_FCC][38] = 82, -+ [0][0][2][0][RTW89_ETSI][38] = 30, -+ [0][0][2][0][RTW89_MKK][38] = 127, -+ [0][0][2][0][RTW89_IC][38] = 82, -+ [0][0][2][0][RTW89_KCC][38] = 66, -+ [0][0][2][0][RTW89_ACMA][38] = 78, -+ [0][0][2][0][RTW89_CN][38] = 78, -+ [0][0][2][0][RTW89_UK][38] = 60, -+ [0][0][2][0][RTW89_FCC][40] = 82, -+ [0][0][2][0][RTW89_ETSI][40] = 30, -+ [0][0][2][0][RTW89_MKK][40] = 127, -+ [0][0][2][0][RTW89_IC][40] = 82, -+ [0][0][2][0][RTW89_KCC][40] = 74, -+ [0][0][2][0][RTW89_ACMA][40] = 78, -+ [0][0][2][0][RTW89_CN][40] = 78, -+ [0][0][2][0][RTW89_UK][40] = 60, -+ [0][0][2][0][RTW89_FCC][42] = 82, -+ [0][0][2][0][RTW89_ETSI][42] = 30, -+ [0][0][2][0][RTW89_MKK][42] = 127, -+ [0][0][2][0][RTW89_IC][42] = 82, -+ [0][0][2][0][RTW89_KCC][42] = 74, -+ [0][0][2][0][RTW89_ACMA][42] = 78, -+ [0][0][2][0][RTW89_CN][42] = 78, -+ [0][0][2][0][RTW89_UK][42] = 60, -+ [0][0][2][0][RTW89_FCC][44] = 82, -+ [0][0][2][0][RTW89_ETSI][44] = 30, -+ [0][0][2][0][RTW89_MKK][44] = 127, -+ [0][0][2][0][RTW89_IC][44] = 82, -+ [0][0][2][0][RTW89_KCC][44] = 74, -+ [0][0][2][0][RTW89_ACMA][44] = 78, -+ [0][0][2][0][RTW89_CN][44] = 78, -+ [0][0][2][0][RTW89_UK][44] = 60, -+ [0][0][2][0][RTW89_FCC][46] = 82, -+ [0][0][2][0][RTW89_ETSI][46] = 30, -+ [0][0][2][0][RTW89_MKK][46] = 127, -+ [0][0][2][0][RTW89_IC][46] = 82, -+ [0][0][2][0][RTW89_KCC][46] = 74, -+ [0][0][2][0][RTW89_ACMA][46] = 78, -+ [0][0][2][0][RTW89_CN][46] = 78, -+ [0][0][2][0][RTW89_UK][46] = 60, -+ [0][0][2][0][RTW89_FCC][48] = 74, -+ [0][0][2][0][RTW89_ETSI][48] = 127, -+ [0][0][2][0][RTW89_MKK][48] = 127, -+ [0][0][2][0][RTW89_IC][48] = 127, -+ [0][0][2][0][RTW89_KCC][48] = 127, -+ [0][0][2][0][RTW89_ACMA][48] = 127, -+ [0][0][2][0][RTW89_CN][48] = 127, -+ [0][0][2][0][RTW89_UK][48] = 127, -+ [0][0][2][0][RTW89_FCC][50] = 76, -+ [0][0][2][0][RTW89_ETSI][50] = 127, -+ [0][0][2][0][RTW89_MKK][50] = 127, -+ [0][0][2][0][RTW89_IC][50] = 127, -+ [0][0][2][0][RTW89_KCC][50] = 127, -+ [0][0][2][0][RTW89_ACMA][50] = 127, -+ [0][0][2][0][RTW89_CN][50] = 127, -+ [0][0][2][0][RTW89_UK][50] = 127, -+ [0][0][2][0][RTW89_FCC][52] = 76, -+ [0][0][2][0][RTW89_ETSI][52] = 127, -+ [0][0][2][0][RTW89_MKK][52] = 127, -+ [0][0][2][0][RTW89_IC][52] = 127, -+ [0][0][2][0][RTW89_KCC][52] = 127, -+ [0][0][2][0][RTW89_ACMA][52] = 127, -+ [0][0][2][0][RTW89_CN][52] = 127, -+ [0][0][2][0][RTW89_UK][52] = 127, -+ [0][1][2][0][RTW89_FCC][0] = 127, -+ [0][1][2][0][RTW89_ETSI][0] = 127, -+ [0][1][2][0][RTW89_MKK][0] = 127, -+ [0][1][2][0][RTW89_IC][0] = 127, -+ [0][1][2][0][RTW89_KCC][0] = 127, -+ [0][1][2][0][RTW89_ACMA][0] = 127, -+ [0][1][2][0][RTW89_CN][0] = 127, -+ [0][1][2][0][RTW89_UK][0] = 127, -+ [0][1][2][0][RTW89_FCC][2] = 127, -+ [0][1][2][0][RTW89_ETSI][2] = 127, -+ [0][1][2][0][RTW89_MKK][2] = 127, -+ [0][1][2][0][RTW89_IC][2] = 127, -+ [0][1][2][0][RTW89_KCC][2] = 127, -+ [0][1][2][0][RTW89_ACMA][2] = 127, -+ [0][1][2][0][RTW89_CN][2] = 127, -+ [0][1][2][0][RTW89_UK][2] = 127, -+ [0][1][2][0][RTW89_FCC][4] = 127, -+ [0][1][2][0][RTW89_ETSI][4] = 127, -+ [0][1][2][0][RTW89_MKK][4] = 127, -+ [0][1][2][0][RTW89_IC][4] = 127, -+ [0][1][2][0][RTW89_KCC][4] = 127, -+ [0][1][2][0][RTW89_ACMA][4] = 127, -+ [0][1][2][0][RTW89_CN][4] = 127, -+ [0][1][2][0][RTW89_UK][4] = 127, -+ [0][1][2][0][RTW89_FCC][6] = 127, -+ [0][1][2][0][RTW89_ETSI][6] = 127, -+ [0][1][2][0][RTW89_MKK][6] = 127, -+ [0][1][2][0][RTW89_IC][6] = 127, -+ [0][1][2][0][RTW89_KCC][6] = 127, -+ [0][1][2][0][RTW89_ACMA][6] = 127, -+ [0][1][2][0][RTW89_CN][6] = 127, -+ [0][1][2][0][RTW89_UK][6] = 127, -+ [0][1][2][0][RTW89_FCC][8] = 127, -+ [0][1][2][0][RTW89_ETSI][8] = 127, -+ [0][1][2][0][RTW89_MKK][8] = 127, -+ [0][1][2][0][RTW89_IC][8] = 127, -+ [0][1][2][0][RTW89_KCC][8] = 127, -+ [0][1][2][0][RTW89_ACMA][8] = 127, -+ [0][1][2][0][RTW89_CN][8] = 127, -+ [0][1][2][0][RTW89_UK][8] = 127, -+ [0][1][2][0][RTW89_FCC][10] = 127, -+ [0][1][2][0][RTW89_ETSI][10] = 127, -+ [0][1][2][0][RTW89_MKK][10] = 127, -+ [0][1][2][0][RTW89_IC][10] = 127, -+ [0][1][2][0][RTW89_KCC][10] = 127, -+ [0][1][2][0][RTW89_ACMA][10] = 127, -+ [0][1][2][0][RTW89_CN][10] = 127, -+ [0][1][2][0][RTW89_UK][10] = 127, -+ [0][1][2][0][RTW89_FCC][12] = 127, -+ [0][1][2][0][RTW89_ETSI][12] = 127, -+ [0][1][2][0][RTW89_MKK][12] = 127, -+ [0][1][2][0][RTW89_IC][12] = 127, -+ [0][1][2][0][RTW89_KCC][12] = 127, -+ [0][1][2][0][RTW89_ACMA][12] = 127, -+ [0][1][2][0][RTW89_CN][12] = 127, -+ [0][1][2][0][RTW89_UK][12] = 127, -+ [0][1][2][0][RTW89_FCC][14] = 127, -+ [0][1][2][0][RTW89_ETSI][14] = 127, -+ [0][1][2][0][RTW89_MKK][14] = 127, -+ [0][1][2][0][RTW89_IC][14] = 127, -+ [0][1][2][0][RTW89_KCC][14] = 127, -+ [0][1][2][0][RTW89_ACMA][14] = 127, -+ [0][1][2][0][RTW89_CN][14] = 127, -+ [0][1][2][0][RTW89_UK][14] = 127, -+ [0][1][2][0][RTW89_FCC][15] = 127, -+ [0][1][2][0][RTW89_ETSI][15] = 127, -+ [0][1][2][0][RTW89_MKK][15] = 127, -+ [0][1][2][0][RTW89_IC][15] = 127, -+ [0][1][2][0][RTW89_KCC][15] = 127, -+ [0][1][2][0][RTW89_ACMA][15] = 127, -+ [0][1][2][0][RTW89_CN][15] = 127, -+ [0][1][2][0][RTW89_UK][15] = 127, -+ [0][1][2][0][RTW89_FCC][17] = 127, -+ [0][1][2][0][RTW89_ETSI][17] = 127, -+ [0][1][2][0][RTW89_MKK][17] = 127, -+ [0][1][2][0][RTW89_IC][17] = 127, -+ [0][1][2][0][RTW89_KCC][17] = 127, -+ [0][1][2][0][RTW89_ACMA][17] = 127, -+ [0][1][2][0][RTW89_CN][17] = 127, -+ [0][1][2][0][RTW89_UK][17] = 127, -+ [0][1][2][0][RTW89_FCC][19] = 127, -+ [0][1][2][0][RTW89_ETSI][19] = 127, -+ [0][1][2][0][RTW89_MKK][19] = 127, -+ [0][1][2][0][RTW89_IC][19] = 127, -+ [0][1][2][0][RTW89_KCC][19] = 127, -+ [0][1][2][0][RTW89_ACMA][19] = 127, -+ [0][1][2][0][RTW89_CN][19] = 127, -+ [0][1][2][0][RTW89_UK][19] = 127, -+ [0][1][2][0][RTW89_FCC][21] = 127, -+ [0][1][2][0][RTW89_ETSI][21] = 127, -+ [0][1][2][0][RTW89_MKK][21] = 127, -+ [0][1][2][0][RTW89_IC][21] = 127, -+ [0][1][2][0][RTW89_KCC][21] = 127, -+ [0][1][2][0][RTW89_ACMA][21] = 127, -+ [0][1][2][0][RTW89_CN][21] = 127, -+ [0][1][2][0][RTW89_UK][21] = 127, -+ [0][1][2][0][RTW89_FCC][23] = 127, -+ [0][1][2][0][RTW89_ETSI][23] = 127, -+ [0][1][2][0][RTW89_MKK][23] = 127, -+ [0][1][2][0][RTW89_IC][23] = 127, -+ [0][1][2][0][RTW89_KCC][23] = 127, -+ [0][1][2][0][RTW89_ACMA][23] = 127, -+ [0][1][2][0][RTW89_CN][23] = 127, -+ [0][1][2][0][RTW89_UK][23] = 127, -+ [0][1][2][0][RTW89_FCC][25] = 127, -+ [0][1][2][0][RTW89_ETSI][25] = 127, -+ [0][1][2][0][RTW89_MKK][25] = 127, -+ [0][1][2][0][RTW89_IC][25] = 127, -+ [0][1][2][0][RTW89_KCC][25] = 127, -+ [0][1][2][0][RTW89_ACMA][25] = 127, -+ [0][1][2][0][RTW89_CN][25] = 127, -+ [0][1][2][0][RTW89_UK][25] = 127, -+ [0][1][2][0][RTW89_FCC][27] = 127, -+ [0][1][2][0][RTW89_ETSI][27] = 127, -+ [0][1][2][0][RTW89_MKK][27] = 127, -+ [0][1][2][0][RTW89_IC][27] = 127, -+ [0][1][2][0][RTW89_KCC][27] = 127, -+ [0][1][2][0][RTW89_ACMA][27] = 127, -+ [0][1][2][0][RTW89_CN][27] = 127, -+ [0][1][2][0][RTW89_UK][27] = 127, -+ [0][1][2][0][RTW89_FCC][29] = 127, -+ [0][1][2][0][RTW89_ETSI][29] = 127, -+ [0][1][2][0][RTW89_MKK][29] = 127, -+ [0][1][2][0][RTW89_IC][29] = 127, -+ [0][1][2][0][RTW89_KCC][29] = 127, -+ [0][1][2][0][RTW89_ACMA][29] = 127, -+ [0][1][2][0][RTW89_CN][29] = 127, -+ [0][1][2][0][RTW89_UK][29] = 127, -+ [0][1][2][0][RTW89_FCC][31] = 127, -+ [0][1][2][0][RTW89_ETSI][31] = 127, -+ [0][1][2][0][RTW89_MKK][31] = 127, -+ [0][1][2][0][RTW89_IC][31] = 127, -+ [0][1][2][0][RTW89_KCC][31] = 127, -+ [0][1][2][0][RTW89_ACMA][31] = 127, -+ [0][1][2][0][RTW89_CN][31] = 127, -+ [0][1][2][0][RTW89_UK][31] = 127, -+ [0][1][2][0][RTW89_FCC][33] = 127, -+ [0][1][2][0][RTW89_ETSI][33] = 127, -+ [0][1][2][0][RTW89_MKK][33] = 127, -+ [0][1][2][0][RTW89_IC][33] = 127, -+ [0][1][2][0][RTW89_KCC][33] = 127, -+ [0][1][2][0][RTW89_ACMA][33] = 127, -+ [0][1][2][0][RTW89_CN][33] = 127, -+ [0][1][2][0][RTW89_UK][33] = 127, -+ [0][1][2][0][RTW89_FCC][35] = 127, -+ [0][1][2][0][RTW89_ETSI][35] = 127, -+ [0][1][2][0][RTW89_MKK][35] = 127, -+ [0][1][2][0][RTW89_IC][35] = 127, -+ [0][1][2][0][RTW89_KCC][35] = 127, -+ [0][1][2][0][RTW89_ACMA][35] = 127, -+ [0][1][2][0][RTW89_CN][35] = 127, -+ [0][1][2][0][RTW89_UK][35] = 127, -+ [0][1][2][0][RTW89_FCC][37] = 127, -+ [0][1][2][0][RTW89_ETSI][37] = 127, -+ [0][1][2][0][RTW89_MKK][37] = 127, -+ [0][1][2][0][RTW89_IC][37] = 127, -+ [0][1][2][0][RTW89_KCC][37] = 127, -+ [0][1][2][0][RTW89_ACMA][37] = 127, -+ [0][1][2][0][RTW89_CN][37] = 127, -+ [0][1][2][0][RTW89_UK][37] = 127, -+ [0][1][2][0][RTW89_FCC][38] = 127, -+ [0][1][2][0][RTW89_ETSI][38] = 127, -+ [0][1][2][0][RTW89_MKK][38] = 127, -+ [0][1][2][0][RTW89_IC][38] = 127, -+ [0][1][2][0][RTW89_KCC][38] = 127, -+ [0][1][2][0][RTW89_ACMA][38] = 127, -+ [0][1][2][0][RTW89_CN][38] = 127, -+ [0][1][2][0][RTW89_UK][38] = 127, -+ [0][1][2][0][RTW89_FCC][40] = 127, -+ [0][1][2][0][RTW89_ETSI][40] = 127, -+ [0][1][2][0][RTW89_MKK][40] = 127, -+ [0][1][2][0][RTW89_IC][40] = 127, -+ [0][1][2][0][RTW89_KCC][40] = 127, -+ [0][1][2][0][RTW89_ACMA][40] = 127, -+ [0][1][2][0][RTW89_CN][40] = 127, -+ [0][1][2][0][RTW89_UK][40] = 127, -+ [0][1][2][0][RTW89_FCC][42] = 127, -+ [0][1][2][0][RTW89_ETSI][42] = 127, -+ [0][1][2][0][RTW89_MKK][42] = 127, -+ [0][1][2][0][RTW89_IC][42] = 127, -+ [0][1][2][0][RTW89_KCC][42] = 127, -+ [0][1][2][0][RTW89_ACMA][42] = 127, -+ [0][1][2][0][RTW89_CN][42] = 127, -+ [0][1][2][0][RTW89_UK][42] = 127, -+ [0][1][2][0][RTW89_FCC][44] = 127, -+ [0][1][2][0][RTW89_ETSI][44] = 127, -+ [0][1][2][0][RTW89_MKK][44] = 127, -+ [0][1][2][0][RTW89_IC][44] = 127, -+ [0][1][2][0][RTW89_KCC][44] = 127, -+ [0][1][2][0][RTW89_ACMA][44] = 127, -+ [0][1][2][0][RTW89_CN][44] = 127, -+ [0][1][2][0][RTW89_UK][44] = 127, -+ [0][1][2][0][RTW89_FCC][46] = 127, -+ [0][1][2][0][RTW89_ETSI][46] = 127, -+ [0][1][2][0][RTW89_MKK][46] = 127, -+ [0][1][2][0][RTW89_IC][46] = 127, -+ [0][1][2][0][RTW89_KCC][46] = 127, -+ [0][1][2][0][RTW89_ACMA][46] = 127, -+ [0][1][2][0][RTW89_CN][46] = 127, -+ [0][1][2][0][RTW89_UK][46] = 127, -+ [0][1][2][0][RTW89_FCC][48] = 127, -+ [0][1][2][0][RTW89_ETSI][48] = 127, -+ [0][1][2][0][RTW89_MKK][48] = 127, -+ [0][1][2][0][RTW89_IC][48] = 127, -+ [0][1][2][0][RTW89_KCC][48] = 127, -+ [0][1][2][0][RTW89_ACMA][48] = 127, -+ [0][1][2][0][RTW89_CN][48] = 127, -+ [0][1][2][0][RTW89_UK][48] = 127, -+ [0][1][2][0][RTW89_FCC][50] = 127, -+ [0][1][2][0][RTW89_ETSI][50] = 127, -+ [0][1][2][0][RTW89_MKK][50] = 127, -+ [0][1][2][0][RTW89_IC][50] = 127, -+ [0][1][2][0][RTW89_KCC][50] = 127, -+ [0][1][2][0][RTW89_ACMA][50] = 127, -+ [0][1][2][0][RTW89_CN][50] = 127, -+ [0][1][2][0][RTW89_UK][50] = 127, -+ [0][1][2][0][RTW89_FCC][52] = 127, -+ [0][1][2][0][RTW89_ETSI][52] = 127, -+ [0][1][2][0][RTW89_MKK][52] = 127, -+ [0][1][2][0][RTW89_IC][52] = 127, -+ [0][1][2][0][RTW89_KCC][52] = 127, -+ [0][1][2][0][RTW89_ACMA][52] = 127, -+ [0][1][2][0][RTW89_CN][52] = 127, -+ [0][1][2][0][RTW89_UK][52] = 127, -+ [0][1][2][1][RTW89_FCC][0] = 127, -+ [0][1][2][1][RTW89_ETSI][0] = 127, -+ [0][1][2][1][RTW89_MKK][0] = 127, -+ [0][1][2][1][RTW89_IC][0] = 127, -+ [0][1][2][1][RTW89_KCC][0] = 127, -+ [0][1][2][1][RTW89_ACMA][0] = 127, -+ [0][1][2][1][RTW89_CN][0] = 127, -+ [0][1][2][1][RTW89_UK][0] = 127, -+ [0][1][2][1][RTW89_FCC][2] = 127, -+ [0][1][2][1][RTW89_ETSI][2] = 127, -+ [0][1][2][1][RTW89_MKK][2] = 127, -+ [0][1][2][1][RTW89_IC][2] = 127, -+ [0][1][2][1][RTW89_KCC][2] = 127, -+ [0][1][2][1][RTW89_ACMA][2] = 127, -+ [0][1][2][1][RTW89_CN][2] = 127, -+ [0][1][2][1][RTW89_UK][2] = 127, -+ [0][1][2][1][RTW89_FCC][4] = 127, -+ [0][1][2][1][RTW89_ETSI][4] = 127, -+ [0][1][2][1][RTW89_MKK][4] = 127, -+ [0][1][2][1][RTW89_IC][4] = 127, -+ [0][1][2][1][RTW89_KCC][4] = 127, -+ [0][1][2][1][RTW89_ACMA][4] = 127, -+ [0][1][2][1][RTW89_CN][4] = 127, -+ [0][1][2][1][RTW89_UK][4] = 127, -+ [0][1][2][1][RTW89_FCC][6] = 127, -+ [0][1][2][1][RTW89_ETSI][6] = 127, -+ [0][1][2][1][RTW89_MKK][6] = 127, -+ [0][1][2][1][RTW89_IC][6] = 127, -+ [0][1][2][1][RTW89_KCC][6] = 127, -+ [0][1][2][1][RTW89_ACMA][6] = 127, -+ [0][1][2][1][RTW89_CN][6] = 127, -+ [0][1][2][1][RTW89_UK][6] = 127, -+ [0][1][2][1][RTW89_FCC][8] = 127, -+ [0][1][2][1][RTW89_ETSI][8] = 127, -+ [0][1][2][1][RTW89_MKK][8] = 127, -+ [0][1][2][1][RTW89_IC][8] = 127, -+ [0][1][2][1][RTW89_KCC][8] = 127, -+ [0][1][2][1][RTW89_ACMA][8] = 127, -+ [0][1][2][1][RTW89_CN][8] = 127, -+ [0][1][2][1][RTW89_UK][8] = 127, -+ [0][1][2][1][RTW89_FCC][10] = 127, -+ [0][1][2][1][RTW89_ETSI][10] = 127, -+ [0][1][2][1][RTW89_MKK][10] = 127, -+ [0][1][2][1][RTW89_IC][10] = 127, -+ [0][1][2][1][RTW89_KCC][10] = 127, -+ [0][1][2][1][RTW89_ACMA][10] = 127, -+ [0][1][2][1][RTW89_CN][10] = 127, -+ [0][1][2][1][RTW89_UK][10] = 127, -+ [0][1][2][1][RTW89_FCC][12] = 127, -+ [0][1][2][1][RTW89_ETSI][12] = 127, -+ [0][1][2][1][RTW89_MKK][12] = 127, -+ [0][1][2][1][RTW89_IC][12] = 127, -+ [0][1][2][1][RTW89_KCC][12] = 127, -+ [0][1][2][1][RTW89_ACMA][12] = 127, -+ [0][1][2][1][RTW89_CN][12] = 127, -+ [0][1][2][1][RTW89_UK][12] = 127, -+ [0][1][2][1][RTW89_FCC][14] = 127, -+ [0][1][2][1][RTW89_ETSI][14] = 127, -+ [0][1][2][1][RTW89_MKK][14] = 127, -+ [0][1][2][1][RTW89_IC][14] = 127, -+ [0][1][2][1][RTW89_KCC][14] = 127, -+ [0][1][2][1][RTW89_ACMA][14] = 127, -+ [0][1][2][1][RTW89_CN][14] = 127, -+ [0][1][2][1][RTW89_UK][14] = 127, -+ [0][1][2][1][RTW89_FCC][15] = 127, -+ [0][1][2][1][RTW89_ETSI][15] = 127, -+ [0][1][2][1][RTW89_MKK][15] = 127, -+ [0][1][2][1][RTW89_IC][15] = 127, -+ [0][1][2][1][RTW89_KCC][15] = 127, -+ [0][1][2][1][RTW89_ACMA][15] = 127, -+ [0][1][2][1][RTW89_CN][15] = 127, -+ [0][1][2][1][RTW89_UK][15] = 127, -+ [0][1][2][1][RTW89_FCC][17] = 127, -+ [0][1][2][1][RTW89_ETSI][17] = 127, -+ [0][1][2][1][RTW89_MKK][17] = 127, -+ [0][1][2][1][RTW89_IC][17] = 127, -+ [0][1][2][1][RTW89_KCC][17] = 127, -+ [0][1][2][1][RTW89_ACMA][17] = 127, -+ [0][1][2][1][RTW89_CN][17] = 127, -+ [0][1][2][1][RTW89_UK][17] = 127, -+ [0][1][2][1][RTW89_FCC][19] = 127, -+ [0][1][2][1][RTW89_ETSI][19] = 127, -+ [0][1][2][1][RTW89_MKK][19] = 127, -+ [0][1][2][1][RTW89_IC][19] = 127, -+ [0][1][2][1][RTW89_KCC][19] = 127, -+ [0][1][2][1][RTW89_ACMA][19] = 127, -+ [0][1][2][1][RTW89_CN][19] = 127, -+ [0][1][2][1][RTW89_UK][19] = 127, -+ [0][1][2][1][RTW89_FCC][21] = 127, -+ [0][1][2][1][RTW89_ETSI][21] = 127, -+ [0][1][2][1][RTW89_MKK][21] = 127, -+ [0][1][2][1][RTW89_IC][21] = 127, -+ [0][1][2][1][RTW89_KCC][21] = 127, -+ [0][1][2][1][RTW89_ACMA][21] = 127, -+ [0][1][2][1][RTW89_CN][21] = 127, -+ [0][1][2][1][RTW89_UK][21] = 127, -+ [0][1][2][1][RTW89_FCC][23] = 127, -+ [0][1][2][1][RTW89_ETSI][23] = 127, -+ [0][1][2][1][RTW89_MKK][23] = 127, -+ [0][1][2][1][RTW89_IC][23] = 127, -+ [0][1][2][1][RTW89_KCC][23] = 127, -+ [0][1][2][1][RTW89_ACMA][23] = 127, -+ [0][1][2][1][RTW89_CN][23] = 127, -+ [0][1][2][1][RTW89_UK][23] = 127, -+ [0][1][2][1][RTW89_FCC][25] = 127, -+ [0][1][2][1][RTW89_ETSI][25] = 127, -+ [0][1][2][1][RTW89_MKK][25] = 127, -+ [0][1][2][1][RTW89_IC][25] = 127, -+ [0][1][2][1][RTW89_KCC][25] = 127, -+ [0][1][2][1][RTW89_ACMA][25] = 127, -+ [0][1][2][1][RTW89_CN][25] = 127, -+ [0][1][2][1][RTW89_UK][25] = 127, -+ [0][1][2][1][RTW89_FCC][27] = 127, -+ [0][1][2][1][RTW89_ETSI][27] = 127, -+ [0][1][2][1][RTW89_MKK][27] = 127, -+ [0][1][2][1][RTW89_IC][27] = 127, -+ [0][1][2][1][RTW89_KCC][27] = 127, -+ [0][1][2][1][RTW89_ACMA][27] = 127, -+ [0][1][2][1][RTW89_CN][27] = 127, -+ [0][1][2][1][RTW89_UK][27] = 127, -+ [0][1][2][1][RTW89_FCC][29] = 127, -+ [0][1][2][1][RTW89_ETSI][29] = 127, -+ [0][1][2][1][RTW89_MKK][29] = 127, -+ [0][1][2][1][RTW89_IC][29] = 127, -+ [0][1][2][1][RTW89_KCC][29] = 127, -+ [0][1][2][1][RTW89_ACMA][29] = 127, -+ [0][1][2][1][RTW89_CN][29] = 127, -+ [0][1][2][1][RTW89_UK][29] = 127, -+ [0][1][2][1][RTW89_FCC][31] = 127, -+ [0][1][2][1][RTW89_ETSI][31] = 127, -+ [0][1][2][1][RTW89_MKK][31] = 127, -+ [0][1][2][1][RTW89_IC][31] = 127, -+ [0][1][2][1][RTW89_KCC][31] = 127, -+ [0][1][2][1][RTW89_ACMA][31] = 127, -+ [0][1][2][1][RTW89_CN][31] = 127, -+ [0][1][2][1][RTW89_UK][31] = 127, -+ [0][1][2][1][RTW89_FCC][33] = 127, -+ [0][1][2][1][RTW89_ETSI][33] = 127, -+ [0][1][2][1][RTW89_MKK][33] = 127, -+ [0][1][2][1][RTW89_IC][33] = 127, -+ [0][1][2][1][RTW89_KCC][33] = 127, -+ [0][1][2][1][RTW89_ACMA][33] = 127, -+ [0][1][2][1][RTW89_CN][33] = 127, -+ [0][1][2][1][RTW89_UK][33] = 127, -+ [0][1][2][1][RTW89_FCC][35] = 127, -+ [0][1][2][1][RTW89_ETSI][35] = 127, -+ [0][1][2][1][RTW89_MKK][35] = 127, -+ [0][1][2][1][RTW89_IC][35] = 127, -+ [0][1][2][1][RTW89_KCC][35] = 127, -+ [0][1][2][1][RTW89_ACMA][35] = 127, -+ [0][1][2][1][RTW89_CN][35] = 127, -+ [0][1][2][1][RTW89_UK][35] = 127, -+ [0][1][2][1][RTW89_FCC][37] = 127, -+ [0][1][2][1][RTW89_ETSI][37] = 127, -+ [0][1][2][1][RTW89_MKK][37] = 127, -+ [0][1][2][1][RTW89_IC][37] = 127, -+ [0][1][2][1][RTW89_KCC][37] = 127, -+ [0][1][2][1][RTW89_ACMA][37] = 127, -+ [0][1][2][1][RTW89_CN][37] = 127, -+ [0][1][2][1][RTW89_UK][37] = 127, -+ [0][1][2][1][RTW89_FCC][38] = 127, -+ [0][1][2][1][RTW89_ETSI][38] = 127, -+ [0][1][2][1][RTW89_MKK][38] = 127, -+ [0][1][2][1][RTW89_IC][38] = 127, -+ [0][1][2][1][RTW89_KCC][38] = 127, -+ [0][1][2][1][RTW89_ACMA][38] = 127, -+ [0][1][2][1][RTW89_CN][38] = 127, -+ [0][1][2][1][RTW89_UK][38] = 127, -+ [0][1][2][1][RTW89_FCC][40] = 127, -+ [0][1][2][1][RTW89_ETSI][40] = 127, -+ [0][1][2][1][RTW89_MKK][40] = 127, -+ [0][1][2][1][RTW89_IC][40] = 127, -+ [0][1][2][1][RTW89_KCC][40] = 127, -+ [0][1][2][1][RTW89_ACMA][40] = 127, -+ [0][1][2][1][RTW89_CN][40] = 127, -+ [0][1][2][1][RTW89_UK][40] = 127, -+ [0][1][2][1][RTW89_FCC][42] = 127, -+ [0][1][2][1][RTW89_ETSI][42] = 127, -+ [0][1][2][1][RTW89_MKK][42] = 127, -+ [0][1][2][1][RTW89_IC][42] = 127, -+ [0][1][2][1][RTW89_KCC][42] = 127, -+ [0][1][2][1][RTW89_ACMA][42] = 127, -+ [0][1][2][1][RTW89_CN][42] = 127, -+ [0][1][2][1][RTW89_UK][42] = 127, -+ [0][1][2][1][RTW89_FCC][44] = 127, -+ [0][1][2][1][RTW89_ETSI][44] = 127, -+ [0][1][2][1][RTW89_MKK][44] = 127, -+ [0][1][2][1][RTW89_IC][44] = 127, -+ [0][1][2][1][RTW89_KCC][44] = 127, -+ [0][1][2][1][RTW89_ACMA][44] = 127, -+ [0][1][2][1][RTW89_CN][44] = 127, -+ [0][1][2][1][RTW89_UK][44] = 127, -+ [0][1][2][1][RTW89_FCC][46] = 127, -+ [0][1][2][1][RTW89_ETSI][46] = 127, -+ [0][1][2][1][RTW89_MKK][46] = 127, -+ [0][1][2][1][RTW89_IC][46] = 127, -+ [0][1][2][1][RTW89_KCC][46] = 127, -+ [0][1][2][1][RTW89_ACMA][46] = 127, -+ [0][1][2][1][RTW89_CN][46] = 127, -+ [0][1][2][1][RTW89_UK][46] = 127, -+ [0][1][2][1][RTW89_FCC][48] = 127, -+ [0][1][2][1][RTW89_ETSI][48] = 127, -+ [0][1][2][1][RTW89_MKK][48] = 127, -+ [0][1][2][1][RTW89_IC][48] = 127, -+ [0][1][2][1][RTW89_KCC][48] = 127, -+ [0][1][2][1][RTW89_ACMA][48] = 127, -+ [0][1][2][1][RTW89_CN][48] = 127, -+ [0][1][2][1][RTW89_UK][48] = 127, -+ [0][1][2][1][RTW89_FCC][50] = 127, -+ [0][1][2][1][RTW89_ETSI][50] = 127, -+ [0][1][2][1][RTW89_MKK][50] = 127, -+ [0][1][2][1][RTW89_IC][50] = 127, -+ [0][1][2][1][RTW89_KCC][50] = 127, -+ [0][1][2][1][RTW89_ACMA][50] = 127, -+ [0][1][2][1][RTW89_CN][50] = 127, -+ [0][1][2][1][RTW89_UK][50] = 127, -+ [0][1][2][1][RTW89_FCC][52] = 127, -+ [0][1][2][1][RTW89_ETSI][52] = 127, -+ [0][1][2][1][RTW89_MKK][52] = 127, -+ [0][1][2][1][RTW89_IC][52] = 127, -+ [0][1][2][1][RTW89_KCC][52] = 127, -+ [0][1][2][1][RTW89_ACMA][52] = 127, -+ [0][1][2][1][RTW89_CN][52] = 127, -+ [0][1][2][1][RTW89_UK][52] = 127, -+ [1][0][2][0][RTW89_FCC][1] = 68, -+ [1][0][2][0][RTW89_ETSI][1] = 64, -+ [1][0][2][0][RTW89_MKK][1] = 64, -+ [1][0][2][0][RTW89_IC][1] = 64, -+ [1][0][2][0][RTW89_KCC][1] = 74, -+ [1][0][2][0][RTW89_ACMA][1] = 64, -+ [1][0][2][0][RTW89_CN][1] = 64, -+ [1][0][2][0][RTW89_UK][1] = 64, -+ [1][0][2][0][RTW89_FCC][5] = 82, -+ [1][0][2][0][RTW89_ETSI][5] = 64, -+ [1][0][2][0][RTW89_MKK][5] = 62, -+ [1][0][2][0][RTW89_IC][5] = 64, -+ [1][0][2][0][RTW89_KCC][5] = 66, -+ [1][0][2][0][RTW89_ACMA][5] = 64, -+ [1][0][2][0][RTW89_CN][5] = 64, -+ [1][0][2][0][RTW89_UK][5] = 64, -+ [1][0][2][0][RTW89_FCC][9] = 82, -+ [1][0][2][0][RTW89_ETSI][9] = 64, -+ [1][0][2][0][RTW89_MKK][9] = 64, -+ [1][0][2][0][RTW89_IC][9] = 64, -+ [1][0][2][0][RTW89_KCC][9] = 78, -+ [1][0][2][0][RTW89_ACMA][9] = 64, -+ [1][0][2][0][RTW89_CN][9] = 64, -+ [1][0][2][0][RTW89_UK][9] = 64, -+ [1][0][2][0][RTW89_FCC][13] = 66, -+ [1][0][2][0][RTW89_ETSI][13] = 64, -+ [1][0][2][0][RTW89_MKK][13] = 64, -+ [1][0][2][0][RTW89_IC][13] = 64, -+ [1][0][2][0][RTW89_KCC][13] = 72, -+ [1][0][2][0][RTW89_ACMA][13] = 64, -+ [1][0][2][0][RTW89_CN][13] = 64, -+ [1][0][2][0][RTW89_UK][13] = 64, -+ [1][0][2][0][RTW89_FCC][16] = 66, -+ [1][0][2][0][RTW89_ETSI][16] = 66, -+ [1][0][2][0][RTW89_MKK][16] = 80, -+ [1][0][2][0][RTW89_IC][16] = 66, -+ [1][0][2][0][RTW89_KCC][16] = 74, -+ [1][0][2][0][RTW89_ACMA][16] = 66, -+ [1][0][2][0][RTW89_CN][16] = 127, -+ [1][0][2][0][RTW89_UK][16] = 66, -+ [1][0][2][0][RTW89_FCC][20] = 80, -+ [1][0][2][0][RTW89_ETSI][20] = 66, -+ [1][0][2][0][RTW89_MKK][20] = 80, -+ [1][0][2][0][RTW89_IC][20] = 80, -+ [1][0][2][0][RTW89_KCC][20] = 74, -+ [1][0][2][0][RTW89_ACMA][20] = 66, -+ [1][0][2][0][RTW89_CN][20] = 127, -+ [1][0][2][0][RTW89_UK][20] = 66, -+ [1][0][2][0][RTW89_FCC][24] = 80, -+ [1][0][2][0][RTW89_ETSI][24] = 66, -+ [1][0][2][0][RTW89_MKK][24] = 80, -+ [1][0][2][0][RTW89_IC][24] = 127, -+ [1][0][2][0][RTW89_KCC][24] = 74, -+ [1][0][2][0][RTW89_ACMA][24] = 127, -+ [1][0][2][0][RTW89_CN][24] = 127, -+ [1][0][2][0][RTW89_UK][24] = 66, -+ [1][0][2][0][RTW89_FCC][28] = 80, -+ [1][0][2][0][RTW89_ETSI][28] = 66, -+ [1][0][2][0][RTW89_MKK][28] = 80, -+ [1][0][2][0][RTW89_IC][28] = 127, -+ [1][0][2][0][RTW89_KCC][28] = 74, -+ [1][0][2][0][RTW89_ACMA][28] = 127, -+ [1][0][2][0][RTW89_CN][28] = 127, -+ [1][0][2][0][RTW89_UK][28] = 66, -+ [1][0][2][0][RTW89_FCC][32] = 76, -+ [1][0][2][0][RTW89_ETSI][32] = 66, -+ [1][0][2][0][RTW89_MKK][32] = 80, -+ [1][0][2][0][RTW89_IC][32] = 76, -+ [1][0][2][0][RTW89_KCC][32] = 78, -+ [1][0][2][0][RTW89_ACMA][32] = 66, -+ [1][0][2][0][RTW89_CN][32] = 127, -+ [1][0][2][0][RTW89_UK][32] = 66, -+ [1][0][2][0][RTW89_FCC][36] = 80, -+ [1][0][2][0][RTW89_ETSI][36] = 127, -+ [1][0][2][0][RTW89_MKK][36] = 80, -+ [1][0][2][0][RTW89_IC][36] = 80, -+ [1][0][2][0][RTW89_KCC][36] = 76, -+ [1][0][2][0][RTW89_ACMA][36] = 78, -+ [1][0][2][0][RTW89_CN][36] = 127, -+ [1][0][2][0][RTW89_UK][36] = 80, -+ [1][0][2][0][RTW89_FCC][39] = 84, -+ [1][0][2][0][RTW89_ETSI][39] = 30, -+ [1][0][2][0][RTW89_MKK][39] = 127, -+ [1][0][2][0][RTW89_IC][39] = 84, -+ [1][0][2][0][RTW89_KCC][39] = 68, -+ [1][0][2][0][RTW89_ACMA][39] = 80, -+ [1][0][2][0][RTW89_CN][39] = 70, -+ [1][0][2][0][RTW89_UK][39] = 64, -+ [1][0][2][0][RTW89_FCC][43] = 84, -+ [1][0][2][0][RTW89_ETSI][43] = 30, -+ [1][0][2][0][RTW89_MKK][43] = 127, -+ [1][0][2][0][RTW89_IC][43] = 84, -+ [1][0][2][0][RTW89_KCC][43] = 78, -+ [1][0][2][0][RTW89_ACMA][43] = 80, -+ [1][0][2][0][RTW89_CN][43] = 80, -+ [1][0][2][0][RTW89_UK][43] = 64, -+ [1][0][2][0][RTW89_FCC][47] = 84, -+ [1][0][2][0][RTW89_ETSI][47] = 127, -+ [1][0][2][0][RTW89_MKK][47] = 127, -+ [1][0][2][0][RTW89_IC][47] = 127, -+ [1][0][2][0][RTW89_KCC][47] = 127, -+ [1][0][2][0][RTW89_ACMA][47] = 127, -+ [1][0][2][0][RTW89_CN][47] = 127, -+ [1][0][2][0][RTW89_UK][47] = 127, -+ [1][0][2][0][RTW89_FCC][51] = 84, -+ [1][0][2][0][RTW89_ETSI][51] = 127, -+ [1][0][2][0][RTW89_MKK][51] = 127, -+ [1][0][2][0][RTW89_IC][51] = 127, -+ [1][0][2][0][RTW89_KCC][51] = 127, -+ [1][0][2][0][RTW89_ACMA][51] = 127, -+ [1][0][2][0][RTW89_CN][51] = 127, -+ [1][0][2][0][RTW89_UK][51] = 127, -+ [1][1][2][0][RTW89_FCC][1] = 127, -+ [1][1][2][0][RTW89_ETSI][1] = 127, -+ [1][1][2][0][RTW89_MKK][1] = 127, -+ [1][1][2][0][RTW89_IC][1] = 127, -+ [1][1][2][0][RTW89_KCC][1] = 127, -+ [1][1][2][0][RTW89_ACMA][1] = 127, -+ [1][1][2][0][RTW89_CN][1] = 127, -+ [1][1][2][0][RTW89_UK][1] = 127, -+ [1][1][2][0][RTW89_FCC][5] = 127, -+ [1][1][2][0][RTW89_ETSI][5] = 127, -+ [1][1][2][0][RTW89_MKK][5] = 127, -+ [1][1][2][0][RTW89_IC][5] = 127, -+ [1][1][2][0][RTW89_KCC][5] = 127, -+ [1][1][2][0][RTW89_ACMA][5] = 127, -+ [1][1][2][0][RTW89_CN][5] = 127, -+ [1][1][2][0][RTW89_UK][5] = 127, -+ [1][1][2][0][RTW89_FCC][9] = 127, -+ [1][1][2][0][RTW89_ETSI][9] = 127, -+ [1][1][2][0][RTW89_MKK][9] = 127, -+ [1][1][2][0][RTW89_IC][9] = 127, -+ [1][1][2][0][RTW89_KCC][9] = 127, -+ [1][1][2][0][RTW89_ACMA][9] = 127, -+ [1][1][2][0][RTW89_CN][9] = 127, -+ [1][1][2][0][RTW89_UK][9] = 127, -+ [1][1][2][0][RTW89_FCC][13] = 127, -+ [1][1][2][0][RTW89_ETSI][13] = 127, -+ [1][1][2][0][RTW89_MKK][13] = 127, -+ [1][1][2][0][RTW89_IC][13] = 127, -+ [1][1][2][0][RTW89_KCC][13] = 127, -+ [1][1][2][0][RTW89_ACMA][13] = 127, -+ [1][1][2][0][RTW89_CN][13] = 127, -+ [1][1][2][0][RTW89_UK][13] = 127, -+ [1][1][2][0][RTW89_FCC][16] = 127, -+ [1][1][2][0][RTW89_ETSI][16] = 127, -+ [1][1][2][0][RTW89_MKK][16] = 127, -+ [1][1][2][0][RTW89_IC][16] = 127, -+ [1][1][2][0][RTW89_KCC][16] = 127, -+ [1][1][2][0][RTW89_ACMA][16] = 127, -+ [1][1][2][0][RTW89_CN][16] = 127, -+ [1][1][2][0][RTW89_UK][16] = 127, -+ [1][1][2][0][RTW89_FCC][20] = 127, -+ [1][1][2][0][RTW89_ETSI][20] = 127, -+ [1][1][2][0][RTW89_MKK][20] = 127, -+ [1][1][2][0][RTW89_IC][20] = 127, -+ [1][1][2][0][RTW89_KCC][20] = 127, -+ [1][1][2][0][RTW89_ACMA][20] = 127, -+ [1][1][2][0][RTW89_CN][20] = 127, -+ [1][1][2][0][RTW89_UK][20] = 127, -+ [1][1][2][0][RTW89_FCC][24] = 127, -+ [1][1][2][0][RTW89_ETSI][24] = 127, -+ [1][1][2][0][RTW89_MKK][24] = 127, -+ [1][1][2][0][RTW89_IC][24] = 127, -+ [1][1][2][0][RTW89_KCC][24] = 127, -+ [1][1][2][0][RTW89_ACMA][24] = 127, -+ [1][1][2][0][RTW89_CN][24] = 127, -+ [1][1][2][0][RTW89_UK][24] = 127, -+ [1][1][2][0][RTW89_FCC][28] = 127, -+ [1][1][2][0][RTW89_ETSI][28] = 127, -+ [1][1][2][0][RTW89_MKK][28] = 127, -+ [1][1][2][0][RTW89_IC][28] = 127, -+ [1][1][2][0][RTW89_KCC][28] = 127, -+ [1][1][2][0][RTW89_ACMA][28] = 127, -+ [1][1][2][0][RTW89_CN][28] = 127, -+ [1][1][2][0][RTW89_UK][28] = 127, -+ [1][1][2][0][RTW89_FCC][32] = 127, -+ [1][1][2][0][RTW89_ETSI][32] = 127, -+ [1][1][2][0][RTW89_MKK][32] = 127, -+ [1][1][2][0][RTW89_IC][32] = 127, -+ [1][1][2][0][RTW89_KCC][32] = 127, -+ [1][1][2][0][RTW89_ACMA][32] = 127, -+ [1][1][2][0][RTW89_CN][32] = 127, -+ [1][1][2][0][RTW89_UK][32] = 127, -+ [1][1][2][0][RTW89_FCC][36] = 127, -+ [1][1][2][0][RTW89_ETSI][36] = 127, -+ [1][1][2][0][RTW89_MKK][36] = 127, -+ [1][1][2][0][RTW89_IC][36] = 127, -+ [1][1][2][0][RTW89_KCC][36] = 127, -+ [1][1][2][0][RTW89_ACMA][36] = 127, -+ [1][1][2][0][RTW89_CN][36] = 127, -+ [1][1][2][0][RTW89_UK][36] = 127, -+ [1][1][2][0][RTW89_FCC][39] = 127, -+ [1][1][2][0][RTW89_ETSI][39] = 127, -+ [1][1][2][0][RTW89_MKK][39] = 127, -+ [1][1][2][0][RTW89_IC][39] = 127, -+ [1][1][2][0][RTW89_KCC][39] = 127, -+ [1][1][2][0][RTW89_ACMA][39] = 127, -+ [1][1][2][0][RTW89_CN][39] = 127, -+ [1][1][2][0][RTW89_UK][39] = 127, -+ [1][1][2][0][RTW89_FCC][43] = 127, -+ [1][1][2][0][RTW89_ETSI][43] = 127, -+ [1][1][2][0][RTW89_MKK][43] = 127, -+ [1][1][2][0][RTW89_IC][43] = 127, -+ [1][1][2][0][RTW89_KCC][43] = 127, -+ [1][1][2][0][RTW89_ACMA][43] = 127, -+ [1][1][2][0][RTW89_CN][43] = 127, -+ [1][1][2][0][RTW89_UK][43] = 127, -+ [1][1][2][0][RTW89_FCC][47] = 127, -+ [1][1][2][0][RTW89_ETSI][47] = 127, -+ [1][1][2][0][RTW89_MKK][47] = 127, -+ [1][1][2][0][RTW89_IC][47] = 127, -+ [1][1][2][0][RTW89_KCC][47] = 127, -+ [1][1][2][0][RTW89_ACMA][47] = 127, -+ [1][1][2][0][RTW89_CN][47] = 127, -+ [1][1][2][0][RTW89_UK][47] = 127, -+ [1][1][2][0][RTW89_FCC][51] = 127, -+ [1][1][2][0][RTW89_ETSI][51] = 127, -+ [1][1][2][0][RTW89_MKK][51] = 127, -+ [1][1][2][0][RTW89_IC][51] = 127, -+ [1][1][2][0][RTW89_KCC][51] = 127, -+ [1][1][2][0][RTW89_ACMA][51] = 127, -+ [1][1][2][0][RTW89_CN][51] = 127, -+ [1][1][2][0][RTW89_UK][51] = 127, -+ [1][1][2][1][RTW89_FCC][1] = 127, -+ [1][1][2][1][RTW89_ETSI][1] = 127, -+ [1][1][2][1][RTW89_MKK][1] = 127, -+ [1][1][2][1][RTW89_IC][1] = 127, -+ [1][1][2][1][RTW89_KCC][1] = 127, -+ [1][1][2][1][RTW89_ACMA][1] = 127, -+ [1][1][2][1][RTW89_CN][1] = 127, -+ [1][1][2][1][RTW89_UK][1] = 127, -+ [1][1][2][1][RTW89_FCC][5] = 127, -+ [1][1][2][1][RTW89_ETSI][5] = 127, -+ [1][1][2][1][RTW89_MKK][5] = 127, -+ [1][1][2][1][RTW89_IC][5] = 127, -+ [1][1][2][1][RTW89_KCC][5] = 127, -+ [1][1][2][1][RTW89_ACMA][5] = 127, -+ [1][1][2][1][RTW89_CN][5] = 127, -+ [1][1][2][1][RTW89_UK][5] = 127, -+ [1][1][2][1][RTW89_FCC][9] = 127, -+ [1][1][2][1][RTW89_ETSI][9] = 127, -+ [1][1][2][1][RTW89_MKK][9] = 127, -+ [1][1][2][1][RTW89_IC][9] = 127, -+ [1][1][2][1][RTW89_KCC][9] = 127, -+ [1][1][2][1][RTW89_ACMA][9] = 127, -+ [1][1][2][1][RTW89_CN][9] = 127, -+ [1][1][2][1][RTW89_UK][9] = 127, -+ [1][1][2][1][RTW89_FCC][13] = 127, -+ [1][1][2][1][RTW89_ETSI][13] = 127, -+ [1][1][2][1][RTW89_MKK][13] = 127, -+ [1][1][2][1][RTW89_IC][13] = 127, -+ [1][1][2][1][RTW89_KCC][13] = 127, -+ [1][1][2][1][RTW89_ACMA][13] = 127, -+ [1][1][2][1][RTW89_CN][13] = 127, -+ [1][1][2][1][RTW89_UK][13] = 127, -+ [1][1][2][1][RTW89_FCC][16] = 127, -+ [1][1][2][1][RTW89_ETSI][16] = 127, -+ [1][1][2][1][RTW89_MKK][16] = 127, -+ [1][1][2][1][RTW89_IC][16] = 127, -+ [1][1][2][1][RTW89_KCC][16] = 127, -+ [1][1][2][1][RTW89_ACMA][16] = 127, -+ [1][1][2][1][RTW89_CN][16] = 127, -+ [1][1][2][1][RTW89_UK][16] = 127, -+ [1][1][2][1][RTW89_FCC][20] = 127, -+ [1][1][2][1][RTW89_ETSI][20] = 127, -+ [1][1][2][1][RTW89_MKK][20] = 127, -+ [1][1][2][1][RTW89_IC][20] = 127, -+ [1][1][2][1][RTW89_KCC][20] = 127, -+ [1][1][2][1][RTW89_ACMA][20] = 127, -+ [1][1][2][1][RTW89_CN][20] = 127, -+ [1][1][2][1][RTW89_UK][20] = 127, -+ [1][1][2][1][RTW89_FCC][24] = 127, -+ [1][1][2][1][RTW89_ETSI][24] = 127, -+ [1][1][2][1][RTW89_MKK][24] = 127, -+ [1][1][2][1][RTW89_IC][24] = 127, -+ [1][1][2][1][RTW89_KCC][24] = 127, -+ [1][1][2][1][RTW89_ACMA][24] = 127, -+ [1][1][2][1][RTW89_CN][24] = 127, -+ [1][1][2][1][RTW89_UK][24] = 127, -+ [1][1][2][1][RTW89_FCC][28] = 127, -+ [1][1][2][1][RTW89_ETSI][28] = 127, -+ [1][1][2][1][RTW89_MKK][28] = 127, -+ [1][1][2][1][RTW89_IC][28] = 127, -+ [1][1][2][1][RTW89_KCC][28] = 127, -+ [1][1][2][1][RTW89_ACMA][28] = 127, -+ [1][1][2][1][RTW89_CN][28] = 127, -+ [1][1][2][1][RTW89_UK][28] = 127, -+ [1][1][2][1][RTW89_FCC][32] = 127, -+ [1][1][2][1][RTW89_ETSI][32] = 127, -+ [1][1][2][1][RTW89_MKK][32] = 127, -+ [1][1][2][1][RTW89_IC][32] = 127, -+ [1][1][2][1][RTW89_KCC][32] = 127, -+ [1][1][2][1][RTW89_ACMA][32] = 127, -+ [1][1][2][1][RTW89_CN][32] = 127, -+ [1][1][2][1][RTW89_UK][32] = 127, -+ [1][1][2][1][RTW89_FCC][36] = 127, -+ [1][1][2][1][RTW89_ETSI][36] = 127, -+ [1][1][2][1][RTW89_MKK][36] = 127, -+ [1][1][2][1][RTW89_IC][36] = 127, -+ [1][1][2][1][RTW89_KCC][36] = 127, -+ [1][1][2][1][RTW89_ACMA][36] = 127, -+ [1][1][2][1][RTW89_CN][36] = 127, -+ [1][1][2][1][RTW89_UK][36] = 127, -+ [1][1][2][1][RTW89_FCC][39] = 127, -+ [1][1][2][1][RTW89_ETSI][39] = 127, -+ [1][1][2][1][RTW89_MKK][39] = 127, -+ [1][1][2][1][RTW89_IC][39] = 127, -+ [1][1][2][1][RTW89_KCC][39] = 127, -+ [1][1][2][1][RTW89_ACMA][39] = 127, -+ [1][1][2][1][RTW89_CN][39] = 127, -+ [1][1][2][1][RTW89_UK][39] = 127, -+ [1][1][2][1][RTW89_FCC][43] = 127, -+ [1][1][2][1][RTW89_ETSI][43] = 127, -+ [1][1][2][1][RTW89_MKK][43] = 127, -+ [1][1][2][1][RTW89_IC][43] = 127, -+ [1][1][2][1][RTW89_KCC][43] = 127, -+ [1][1][2][1][RTW89_ACMA][43] = 127, -+ [1][1][2][1][RTW89_CN][43] = 127, -+ [1][1][2][1][RTW89_UK][43] = 127, -+ [1][1][2][1][RTW89_FCC][47] = 127, -+ [1][1][2][1][RTW89_ETSI][47] = 127, -+ [1][1][2][1][RTW89_MKK][47] = 127, -+ [1][1][2][1][RTW89_IC][47] = 127, -+ [1][1][2][1][RTW89_KCC][47] = 127, -+ [1][1][2][1][RTW89_ACMA][47] = 127, -+ [1][1][2][1][RTW89_CN][47] = 127, -+ [1][1][2][1][RTW89_UK][47] = 127, -+ [1][1][2][1][RTW89_FCC][51] = 127, -+ [1][1][2][1][RTW89_ETSI][51] = 127, -+ [1][1][2][1][RTW89_MKK][51] = 127, -+ [1][1][2][1][RTW89_IC][51] = 127, -+ [1][1][2][1][RTW89_KCC][51] = 127, -+ [1][1][2][1][RTW89_ACMA][51] = 127, -+ [1][1][2][1][RTW89_CN][51] = 127, -+ [1][1][2][1][RTW89_UK][51] = 127, -+ [2][0][2][0][RTW89_FCC][3] = 76, -+ [2][0][2][0][RTW89_ETSI][3] = 64, -+ [2][0][2][0][RTW89_MKK][3] = 62, -+ [2][0][2][0][RTW89_IC][3] = 64, -+ [2][0][2][0][RTW89_KCC][3] = 72, -+ [2][0][2][0][RTW89_ACMA][3] = 64, -+ [2][0][2][0][RTW89_CN][3] = 64, -+ [2][0][2][0][RTW89_UK][3] = 64, -+ [2][0][2][0][RTW89_FCC][11] = 64, -+ [2][0][2][0][RTW89_ETSI][11] = 64, -+ [2][0][2][0][RTW89_MKK][11] = 64, -+ [2][0][2][0][RTW89_IC][11] = 62, -+ [2][0][2][0][RTW89_KCC][11] = 72, -+ [2][0][2][0][RTW89_ACMA][11] = 64, -+ [2][0][2][0][RTW89_CN][11] = 64, -+ [2][0][2][0][RTW89_UK][11] = 64, -+ [2][0][2][0][RTW89_FCC][18] = 66, -+ [2][0][2][0][RTW89_ETSI][18] = 64, -+ [2][0][2][0][RTW89_MKK][18] = 72, -+ [2][0][2][0][RTW89_IC][18] = 66, -+ [2][0][2][0][RTW89_KCC][18] = 72, -+ [2][0][2][0][RTW89_ACMA][18] = 64, -+ [2][0][2][0][RTW89_CN][18] = 127, -+ [2][0][2][0][RTW89_UK][18] = 64, -+ [2][0][2][0][RTW89_FCC][26] = 76, -+ [2][0][2][0][RTW89_ETSI][26] = 64, -+ [2][0][2][0][RTW89_MKK][26] = 72, -+ [2][0][2][0][RTW89_IC][26] = 127, -+ [2][0][2][0][RTW89_KCC][26] = 72, -+ [2][0][2][0][RTW89_ACMA][26] = 127, -+ [2][0][2][0][RTW89_CN][26] = 127, -+ [2][0][2][0][RTW89_UK][26] = 64, -+ [2][0][2][0][RTW89_FCC][34] = 76, -+ [2][0][2][0][RTW89_ETSI][34] = 127, -+ [2][0][2][0][RTW89_MKK][34] = 72, -+ [2][0][2][0][RTW89_IC][34] = 76, -+ [2][0][2][0][RTW89_KCC][34] = 72, -+ [2][0][2][0][RTW89_ACMA][34] = 72, -+ [2][0][2][0][RTW89_CN][34] = 127, -+ [2][0][2][0][RTW89_UK][34] = 72, -+ [2][0][2][0][RTW89_FCC][41] = 76, -+ [2][0][2][0][RTW89_ETSI][41] = 30, -+ [2][0][2][0][RTW89_MKK][41] = 127, -+ [2][0][2][0][RTW89_IC][41] = 76, -+ [2][0][2][0][RTW89_KCC][41] = 64, -+ [2][0][2][0][RTW89_ACMA][41] = 72, -+ [2][0][2][0][RTW89_CN][41] = 72, -+ [2][0][2][0][RTW89_UK][41] = 64, -+ [2][0][2][0][RTW89_FCC][49] = 74, -+ [2][0][2][0][RTW89_ETSI][49] = 127, -+ [2][0][2][0][RTW89_MKK][49] = 127, -+ [2][0][2][0][RTW89_IC][49] = 127, -+ [2][0][2][0][RTW89_KCC][49] = 127, -+ [2][0][2][0][RTW89_ACMA][49] = 127, -+ [2][0][2][0][RTW89_CN][49] = 127, -+ [2][0][2][0][RTW89_UK][49] = 127, -+ [2][1][2][0][RTW89_FCC][3] = 127, -+ [2][1][2][0][RTW89_ETSI][3] = 127, -+ [2][1][2][0][RTW89_MKK][3] = 127, -+ [2][1][2][0][RTW89_IC][3] = 127, -+ [2][1][2][0][RTW89_KCC][3] = 127, -+ [2][1][2][0][RTW89_ACMA][3] = 127, -+ [2][1][2][0][RTW89_CN][3] = 127, -+ [2][1][2][0][RTW89_UK][3] = 127, -+ [2][1][2][0][RTW89_FCC][11] = 127, -+ [2][1][2][0][RTW89_ETSI][11] = 127, -+ [2][1][2][0][RTW89_MKK][11] = 127, -+ [2][1][2][0][RTW89_IC][11] = 127, -+ [2][1][2][0][RTW89_KCC][11] = 127, -+ [2][1][2][0][RTW89_ACMA][11] = 127, -+ [2][1][2][0][RTW89_CN][11] = 127, -+ [2][1][2][0][RTW89_UK][11] = 127, -+ [2][1][2][0][RTW89_FCC][18] = 127, -+ [2][1][2][0][RTW89_ETSI][18] = 127, -+ [2][1][2][0][RTW89_MKK][18] = 127, -+ [2][1][2][0][RTW89_IC][18] = 127, -+ [2][1][2][0][RTW89_KCC][18] = 127, -+ [2][1][2][0][RTW89_ACMA][18] = 127, -+ [2][1][2][0][RTW89_CN][18] = 127, -+ [2][1][2][0][RTW89_UK][18] = 127, -+ [2][1][2][0][RTW89_FCC][26] = 127, -+ [2][1][2][0][RTW89_ETSI][26] = 127, -+ [2][1][2][0][RTW89_MKK][26] = 127, -+ [2][1][2][0][RTW89_IC][26] = 127, -+ [2][1][2][0][RTW89_KCC][26] = 127, -+ [2][1][2][0][RTW89_ACMA][26] = 127, -+ [2][1][2][0][RTW89_CN][26] = 127, -+ [2][1][2][0][RTW89_UK][26] = 127, -+ [2][1][2][0][RTW89_FCC][34] = 127, -+ [2][1][2][0][RTW89_ETSI][34] = 127, -+ [2][1][2][0][RTW89_MKK][34] = 127, -+ [2][1][2][0][RTW89_IC][34] = 127, -+ [2][1][2][0][RTW89_KCC][34] = 127, -+ [2][1][2][0][RTW89_ACMA][34] = 127, -+ [2][1][2][0][RTW89_CN][34] = 127, -+ [2][1][2][0][RTW89_UK][34] = 127, -+ [2][1][2][0][RTW89_FCC][41] = 127, -+ [2][1][2][0][RTW89_ETSI][41] = 127, -+ [2][1][2][0][RTW89_MKK][41] = 127, -+ [2][1][2][0][RTW89_IC][41] = 127, -+ [2][1][2][0][RTW89_KCC][41] = 127, -+ [2][1][2][0][RTW89_ACMA][41] = 127, -+ [2][1][2][0][RTW89_CN][41] = 127, -+ [2][1][2][0][RTW89_UK][41] = 127, -+ [2][1][2][0][RTW89_FCC][49] = 127, -+ [2][1][2][0][RTW89_ETSI][49] = 127, -+ [2][1][2][0][RTW89_MKK][49] = 127, -+ [2][1][2][0][RTW89_IC][49] = 127, -+ [2][1][2][0][RTW89_KCC][49] = 127, -+ [2][1][2][0][RTW89_ACMA][49] = 127, -+ [2][1][2][0][RTW89_CN][49] = 127, -+ [2][1][2][0][RTW89_UK][49] = 127, -+ [2][1][2][1][RTW89_FCC][3] = 127, -+ [2][1][2][1][RTW89_ETSI][3] = 127, -+ [2][1][2][1][RTW89_MKK][3] = 127, -+ [2][1][2][1][RTW89_IC][3] = 127, -+ [2][1][2][1][RTW89_KCC][3] = 127, -+ [2][1][2][1][RTW89_ACMA][3] = 127, -+ [2][1][2][1][RTW89_CN][3] = 127, -+ [2][1][2][1][RTW89_UK][3] = 127, -+ [2][1][2][1][RTW89_FCC][11] = 127, -+ [2][1][2][1][RTW89_ETSI][11] = 127, -+ [2][1][2][1][RTW89_MKK][11] = 127, -+ [2][1][2][1][RTW89_IC][11] = 127, -+ [2][1][2][1][RTW89_KCC][11] = 127, -+ [2][1][2][1][RTW89_ACMA][11] = 127, -+ [2][1][2][1][RTW89_CN][11] = 127, -+ [2][1][2][1][RTW89_UK][11] = 127, -+ [2][1][2][1][RTW89_FCC][18] = 127, -+ [2][1][2][1][RTW89_ETSI][18] = 127, -+ [2][1][2][1][RTW89_MKK][18] = 127, -+ [2][1][2][1][RTW89_IC][18] = 127, -+ [2][1][2][1][RTW89_KCC][18] = 127, -+ [2][1][2][1][RTW89_ACMA][18] = 127, -+ [2][1][2][1][RTW89_CN][18] = 127, -+ [2][1][2][1][RTW89_UK][18] = 127, -+ [2][1][2][1][RTW89_FCC][26] = 127, -+ [2][1][2][1][RTW89_ETSI][26] = 127, -+ [2][1][2][1][RTW89_MKK][26] = 127, -+ [2][1][2][1][RTW89_IC][26] = 127, -+ [2][1][2][1][RTW89_KCC][26] = 127, -+ [2][1][2][1][RTW89_ACMA][26] = 127, -+ [2][1][2][1][RTW89_CN][26] = 127, -+ [2][1][2][1][RTW89_UK][26] = 127, -+ [2][1][2][1][RTW89_FCC][34] = 127, -+ [2][1][2][1][RTW89_ETSI][34] = 127, -+ [2][1][2][1][RTW89_MKK][34] = 127, -+ [2][1][2][1][RTW89_IC][34] = 127, -+ [2][1][2][1][RTW89_KCC][34] = 127, -+ [2][1][2][1][RTW89_ACMA][34] = 127, -+ [2][1][2][1][RTW89_CN][34] = 127, -+ [2][1][2][1][RTW89_UK][34] = 127, -+ [2][1][2][1][RTW89_FCC][41] = 127, -+ [2][1][2][1][RTW89_ETSI][41] = 127, -+ [2][1][2][1][RTW89_MKK][41] = 127, -+ [2][1][2][1][RTW89_IC][41] = 127, -+ [2][1][2][1][RTW89_KCC][41] = 127, -+ [2][1][2][1][RTW89_ACMA][41] = 127, -+ [2][1][2][1][RTW89_CN][41] = 127, -+ [2][1][2][1][RTW89_UK][41] = 127, -+ [2][1][2][1][RTW89_FCC][49] = 127, -+ [2][1][2][1][RTW89_ETSI][49] = 127, -+ [2][1][2][1][RTW89_MKK][49] = 127, -+ [2][1][2][1][RTW89_IC][49] = 127, -+ [2][1][2][1][RTW89_KCC][49] = 127, -+ [2][1][2][1][RTW89_ACMA][49] = 127, -+ [2][1][2][1][RTW89_CN][49] = 127, -+ [2][1][2][1][RTW89_UK][49] = 127, -+ [3][0][2][0][RTW89_FCC][7] = 127, -+ [3][0][2][0][RTW89_ETSI][7] = 127, -+ [3][0][2][0][RTW89_MKK][7] = 127, -+ [3][0][2][0][RTW89_IC][7] = 127, -+ [3][0][2][0][RTW89_KCC][7] = 127, -+ [3][0][2][0][RTW89_ACMA][7] = 127, -+ [3][0][2][0][RTW89_CN][7] = 58, -+ [3][0][2][0][RTW89_UK][7] = 127, -+ [3][0][2][0][RTW89_FCC][22] = 127, -+ [3][0][2][0][RTW89_ETSI][22] = 127, -+ [3][0][2][0][RTW89_MKK][22] = 127, -+ [3][0][2][0][RTW89_IC][22] = 127, -+ [3][0][2][0][RTW89_KCC][22] = 127, -+ [3][0][2][0][RTW89_ACMA][22] = 127, -+ [3][0][2][0][RTW89_CN][22] = 58, -+ [3][0][2][0][RTW89_UK][22] = 127, -+ [3][0][2][0][RTW89_FCC][45] = 127, -+ [3][0][2][0][RTW89_ETSI][45] = 127, -+ [3][0][2][0][RTW89_MKK][45] = 127, -+ [3][0][2][0][RTW89_IC][45] = 127, -+ [3][0][2][0][RTW89_KCC][45] = 127, -+ [3][0][2][0][RTW89_ACMA][45] = 127, -+ [3][0][2][0][RTW89_CN][45] = 127, -+ [3][0][2][0][RTW89_UK][45] = 127, -+ [3][1][2][0][RTW89_FCC][7] = 127, -+ [3][1][2][0][RTW89_ETSI][7] = 127, -+ [3][1][2][0][RTW89_MKK][7] = 127, -+ [3][1][2][0][RTW89_IC][7] = 127, -+ [3][1][2][0][RTW89_KCC][7] = 127, -+ [3][1][2][0][RTW89_ACMA][7] = 127, -+ [3][1][2][0][RTW89_CN][7] = 127, -+ [3][1][2][0][RTW89_UK][7] = 127, -+ [3][1][2][0][RTW89_FCC][22] = 127, -+ [3][1][2][0][RTW89_ETSI][22] = 127, -+ [3][1][2][0][RTW89_MKK][22] = 127, -+ [3][1][2][0][RTW89_IC][22] = 127, -+ [3][1][2][0][RTW89_KCC][22] = 127, -+ [3][1][2][0][RTW89_ACMA][22] = 127, -+ [3][1][2][0][RTW89_CN][22] = 127, -+ [3][1][2][0][RTW89_UK][22] = 127, -+ [3][1][2][0][RTW89_FCC][45] = 127, -+ [3][1][2][0][RTW89_ETSI][45] = 127, -+ [3][1][2][0][RTW89_MKK][45] = 127, -+ [3][1][2][0][RTW89_IC][45] = 127, -+ [3][1][2][0][RTW89_KCC][45] = 127, -+ [3][1][2][0][RTW89_ACMA][45] = 127, -+ [3][1][2][0][RTW89_CN][45] = 127, -+ [3][1][2][0][RTW89_UK][45] = 127, -+ [3][1][2][1][RTW89_FCC][7] = 127, -+ [3][1][2][1][RTW89_ETSI][7] = 127, -+ [3][1][2][1][RTW89_MKK][7] = 127, -+ [3][1][2][1][RTW89_IC][7] = 127, -+ [3][1][2][1][RTW89_KCC][7] = 127, -+ [3][1][2][1][RTW89_ACMA][7] = 127, -+ [3][1][2][1][RTW89_CN][7] = 127, -+ [3][1][2][1][RTW89_UK][7] = 127, -+ [3][1][2][1][RTW89_FCC][22] = 127, -+ [3][1][2][1][RTW89_ETSI][22] = 127, -+ [3][1][2][1][RTW89_MKK][22] = 127, -+ [3][1][2][1][RTW89_IC][22] = 127, -+ [3][1][2][1][RTW89_KCC][22] = 127, -+ [3][1][2][1][RTW89_ACMA][22] = 127, -+ [3][1][2][1][RTW89_CN][22] = 127, -+ [3][1][2][1][RTW89_UK][22] = 127, -+ [3][1][2][1][RTW89_FCC][45] = 127, -+ [3][1][2][1][RTW89_ETSI][45] = 127, -+ [3][1][2][1][RTW89_MKK][45] = 127, -+ [3][1][2][1][RTW89_IC][45] = 127, -+ [3][1][2][1][RTW89_KCC][45] = 127, -+ [3][1][2][1][RTW89_ACMA][45] = 127, -+ [3][1][2][1][RTW89_CN][45] = 127, -+ [3][1][2][1][RTW89_UK][45] = 127, -+}; ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_table.h -@@ -0,0 +1,21 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2022-2023 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_8851B_TABLE_H__ -+#define __RTW89_8851B_TABLE_H__ -+ -+#include "core.h" -+ -+extern const struct rtw89_phy_table rtw89_8851b_phy_bb_table; -+extern const struct rtw89_phy_table rtw89_8851b_phy_bb_gain_table; -+extern const struct rtw89_phy_table rtw89_8851b_phy_radioa_table; -+extern const struct rtw89_phy_table rtw89_8851b_phy_nctl_table; -+extern const struct rtw89_txpwr_table rtw89_8851b_byr_table; -+extern const struct rtw89_txpwr_track_cfg rtw89_8851b_trk_cfg; -+extern const u8 rtw89_8851b_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM] -+ [RTW89_REGD_NUM]; -+extern const struct rtw89_rfe_parms rtw89_8851b_dflt_parms; -+extern const struct rtw89_rfe_parms_conf rtw89_8851b_rfe_parms_conf[]; -+ -+#endif diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-044-wifi-rtw89-8851b-add-BB-and-RF-tables-2-of-2.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-044-wifi-rtw89-8851b-add-BB-and-RF-tables-2-of-2.patch deleted file mode 100644 index ad5d52d0d..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-044-wifi-rtw89-8851b-add-BB-and-RF-tables-2-of-2.patch +++ /dev/null @@ -1,8087 +0,0 @@ -From cf4917cf0ab828a4b520daa1708e8572b810417a Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sat, 1 Apr 2023 22:25:47 +0800 -Subject: [PATCH 044/136] wifi: rtw89: 8851b: add BB and RF tables (2 of 2) - -These tables contain BB and RF parameters that driver will load them into -registers. It also contains TX power according to country, band, rate and -so on. Increasing thermal can cause TX power degraded, so power tracking -tables are defined to compensate TX power. - -Internal version of these tables: - - HALBB_029_106_15 (V17) - - HALRF_029_00_089 - * Radio A 0x22 - * NCTL 0x5 - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230401142548.55466-3-pkshih@realtek.com ---- - .../wireless/realtek/rtw89/rtw8851b_table.c | 8058 +++++++++++++++++ - 1 file changed, 8058 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_table.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_table.c -@@ -6764,3 +6764,8061 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [3][1][2][1][RTW89_CN][45] = 127, - [3][1][2][1][RTW89_UK][45] = 127, - }; -+ -+static -+const s8 rtw89_8851b_txpwr_lmt_ru_2g[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = { -+ [0][0][RTW89_WW][0] = 30, -+ [0][0][RTW89_WW][1] = 30, -+ [0][0][RTW89_WW][2] = 30, -+ [0][0][RTW89_WW][3] = 30, -+ [0][0][RTW89_WW][4] = 30, -+ [0][0][RTW89_WW][5] = 30, -+ [0][0][RTW89_WW][6] = 30, -+ [0][0][RTW89_WW][7] = 30, -+ [0][0][RTW89_WW][8] = 30, -+ [0][0][RTW89_WW][9] = 30, -+ [0][0][RTW89_WW][10] = 30, -+ [0][0][RTW89_WW][11] = 30, -+ [0][0][RTW89_WW][12] = 30, -+ [0][0][RTW89_WW][13] = 0, -+ [0][1][RTW89_WW][0] = 20, -+ [0][1][RTW89_WW][1] = 22, -+ [0][1][RTW89_WW][2] = 22, -+ [0][1][RTW89_WW][3] = 22, -+ [0][1][RTW89_WW][4] = 22, -+ [0][1][RTW89_WW][5] = 22, -+ [0][1][RTW89_WW][6] = 22, -+ [0][1][RTW89_WW][7] = 22, -+ [0][1][RTW89_WW][8] = 22, -+ [0][1][RTW89_WW][9] = 22, -+ [0][1][RTW89_WW][10] = 22, -+ [0][1][RTW89_WW][11] = 22, -+ [0][1][RTW89_WW][12] = 20, -+ [0][1][RTW89_WW][13] = 0, -+ [1][0][RTW89_WW][0] = 42, -+ [1][0][RTW89_WW][1] = 42, -+ [1][0][RTW89_WW][2] = 42, -+ [1][0][RTW89_WW][3] = 42, -+ [1][0][RTW89_WW][4] = 42, -+ [1][0][RTW89_WW][5] = 42, -+ [1][0][RTW89_WW][6] = 42, -+ [1][0][RTW89_WW][7] = 42, -+ [1][0][RTW89_WW][8] = 42, -+ [1][0][RTW89_WW][9] = 42, -+ [1][0][RTW89_WW][10] = 42, -+ [1][0][RTW89_WW][11] = 42, -+ [1][0][RTW89_WW][12] = 34, -+ [1][0][RTW89_WW][13] = 0, -+ [1][1][RTW89_WW][0] = 32, -+ [1][1][RTW89_WW][1] = 32, -+ [1][1][RTW89_WW][2] = 32, -+ [1][1][RTW89_WW][3] = 32, -+ [1][1][RTW89_WW][4] = 32, -+ [1][1][RTW89_WW][5] = 32, -+ [1][1][RTW89_WW][6] = 32, -+ [1][1][RTW89_WW][7] = 32, -+ [1][1][RTW89_WW][8] = 32, -+ [1][1][RTW89_WW][9] = 32, -+ [1][1][RTW89_WW][10] = 32, -+ [1][1][RTW89_WW][11] = 32, -+ [1][1][RTW89_WW][12] = 32, -+ [1][1][RTW89_WW][13] = 0, -+ [2][0][RTW89_WW][0] = 54, -+ [2][0][RTW89_WW][1] = 54, -+ [2][0][RTW89_WW][2] = 54, -+ [2][0][RTW89_WW][3] = 54, -+ [2][0][RTW89_WW][4] = 54, -+ [2][0][RTW89_WW][5] = 54, -+ [2][0][RTW89_WW][6] = 54, -+ [2][0][RTW89_WW][7] = 54, -+ [2][0][RTW89_WW][8] = 54, -+ [2][0][RTW89_WW][9] = 54, -+ [2][0][RTW89_WW][10] = 54, -+ [2][0][RTW89_WW][11] = 54, -+ [2][0][RTW89_WW][12] = 34, -+ [2][0][RTW89_WW][13] = 0, -+ [2][1][RTW89_WW][0] = 44, -+ [2][1][RTW89_WW][1] = 44, -+ [2][1][RTW89_WW][2] = 44, -+ [2][1][RTW89_WW][3] = 44, -+ [2][1][RTW89_WW][4] = 44, -+ [2][1][RTW89_WW][5] = 44, -+ [2][1][RTW89_WW][6] = 44, -+ [2][1][RTW89_WW][7] = 44, -+ [2][1][RTW89_WW][8] = 44, -+ [2][1][RTW89_WW][9] = 44, -+ [2][1][RTW89_WW][10] = 44, -+ [2][1][RTW89_WW][11] = 44, -+ [2][1][RTW89_WW][12] = 42, -+ [2][1][RTW89_WW][13] = 0, -+ [0][0][RTW89_FCC][0] = 62, -+ [0][0][RTW89_ETSI][0] = 30, -+ [0][0][RTW89_MKK][0] = 40, -+ [0][0][RTW89_IC][0] = 62, -+ [0][0][RTW89_KCC][0] = 46, -+ [0][0][RTW89_ACMA][0] = 30, -+ [0][0][RTW89_CN][0] = 32, -+ [0][0][RTW89_UK][0] = 30, -+ [0][0][RTW89_FCC][1] = 62, -+ [0][0][RTW89_ETSI][1] = 30, -+ [0][0][RTW89_MKK][1] = 44, -+ [0][0][RTW89_IC][1] = 62, -+ [0][0][RTW89_KCC][1] = 46, -+ [0][0][RTW89_ACMA][1] = 30, -+ [0][0][RTW89_CN][1] = 32, -+ [0][0][RTW89_UK][1] = 30, -+ [0][0][RTW89_FCC][2] = 66, -+ [0][0][RTW89_ETSI][2] = 30, -+ [0][0][RTW89_MKK][2] = 44, -+ [0][0][RTW89_IC][2] = 66, -+ [0][0][RTW89_KCC][2] = 46, -+ [0][0][RTW89_ACMA][2] = 30, -+ [0][0][RTW89_CN][2] = 32, -+ [0][0][RTW89_UK][2] = 30, -+ [0][0][RTW89_FCC][3] = 70, -+ [0][0][RTW89_ETSI][3] = 30, -+ [0][0][RTW89_MKK][3] = 44, -+ [0][0][RTW89_IC][3] = 70, -+ [0][0][RTW89_KCC][3] = 46, -+ [0][0][RTW89_ACMA][3] = 30, -+ [0][0][RTW89_CN][3] = 32, -+ [0][0][RTW89_UK][3] = 30, -+ [0][0][RTW89_FCC][4] = 70, -+ [0][0][RTW89_ETSI][4] = 30, -+ [0][0][RTW89_MKK][4] = 44, -+ [0][0][RTW89_IC][4] = 70, -+ [0][0][RTW89_KCC][4] = 48, -+ [0][0][RTW89_ACMA][4] = 30, -+ [0][0][RTW89_CN][4] = 32, -+ [0][0][RTW89_UK][4] = 30, -+ [0][0][RTW89_FCC][5] = 84, -+ [0][0][RTW89_ETSI][5] = 30, -+ [0][0][RTW89_MKK][5] = 44, -+ [0][0][RTW89_IC][5] = 84, -+ [0][0][RTW89_KCC][5] = 48, -+ [0][0][RTW89_ACMA][5] = 30, -+ [0][0][RTW89_CN][5] = 32, -+ [0][0][RTW89_UK][5] = 30, -+ [0][0][RTW89_FCC][6] = 66, -+ [0][0][RTW89_ETSI][6] = 30, -+ [0][0][RTW89_MKK][6] = 44, -+ [0][0][RTW89_IC][6] = 66, -+ [0][0][RTW89_KCC][6] = 48, -+ [0][0][RTW89_ACMA][6] = 30, -+ [0][0][RTW89_CN][6] = 32, -+ [0][0][RTW89_UK][6] = 30, -+ [0][0][RTW89_FCC][7] = 66, -+ [0][0][RTW89_ETSI][7] = 30, -+ [0][0][RTW89_MKK][7] = 44, -+ [0][0][RTW89_IC][7] = 66, -+ [0][0][RTW89_KCC][7] = 48, -+ [0][0][RTW89_ACMA][7] = 30, -+ [0][0][RTW89_CN][7] = 32, -+ [0][0][RTW89_UK][7] = 30, -+ [0][0][RTW89_FCC][8] = 62, -+ [0][0][RTW89_ETSI][8] = 30, -+ [0][0][RTW89_MKK][8] = 44, -+ [0][0][RTW89_IC][8] = 62, -+ [0][0][RTW89_KCC][8] = 48, -+ [0][0][RTW89_ACMA][8] = 30, -+ [0][0][RTW89_CN][8] = 32, -+ [0][0][RTW89_UK][8] = 30, -+ [0][0][RTW89_FCC][9] = 58, -+ [0][0][RTW89_ETSI][9] = 30, -+ [0][0][RTW89_MKK][9] = 44, -+ [0][0][RTW89_IC][9] = 58, -+ [0][0][RTW89_KCC][9] = 44, -+ [0][0][RTW89_ACMA][9] = 30, -+ [0][0][RTW89_CN][9] = 32, -+ [0][0][RTW89_UK][9] = 30, -+ [0][0][RTW89_FCC][10] = 58, -+ [0][0][RTW89_ETSI][10] = 30, -+ [0][0][RTW89_MKK][10] = 44, -+ [0][0][RTW89_IC][10] = 58, -+ [0][0][RTW89_KCC][10] = 44, -+ [0][0][RTW89_ACMA][10] = 30, -+ [0][0][RTW89_CN][10] = 32, -+ [0][0][RTW89_UK][10] = 30, -+ [0][0][RTW89_FCC][11] = 54, -+ [0][0][RTW89_ETSI][11] = 30, -+ [0][0][RTW89_MKK][11] = 44, -+ [0][0][RTW89_IC][11] = 54, -+ [0][0][RTW89_KCC][11] = 44, -+ [0][0][RTW89_ACMA][11] = 30, -+ [0][0][RTW89_CN][11] = 32, -+ [0][0][RTW89_UK][11] = 30, -+ [0][0][RTW89_FCC][12] = 36, -+ [0][0][RTW89_ETSI][12] = 30, -+ [0][0][RTW89_MKK][12] = 40, -+ [0][0][RTW89_IC][12] = 36, -+ [0][0][RTW89_KCC][12] = 44, -+ [0][0][RTW89_ACMA][12] = 30, -+ [0][0][RTW89_CN][12] = 32, -+ [0][0][RTW89_UK][12] = 30, -+ [0][0][RTW89_FCC][13] = 127, -+ [0][0][RTW89_ETSI][13] = 127, -+ [0][0][RTW89_MKK][13] = 127, -+ [0][0][RTW89_IC][13] = 127, -+ [0][0][RTW89_KCC][13] = 127, -+ [0][0][RTW89_ACMA][13] = 127, -+ [0][0][RTW89_CN][13] = 127, -+ [0][0][RTW89_UK][13] = 127, -+ [0][1][RTW89_FCC][0] = 127, -+ [0][1][RTW89_ETSI][0] = 127, -+ [0][1][RTW89_MKK][0] = 127, -+ [0][1][RTW89_IC][0] = 127, -+ [0][1][RTW89_KCC][0] = 127, -+ [0][1][RTW89_ACMA][0] = 127, -+ [0][1][RTW89_CN][0] = 20, -+ [0][1][RTW89_UK][0] = 127, -+ [0][1][RTW89_FCC][1] = 127, -+ [0][1][RTW89_ETSI][1] = 127, -+ [0][1][RTW89_MKK][1] = 127, -+ [0][1][RTW89_IC][1] = 127, -+ [0][1][RTW89_KCC][1] = 127, -+ [0][1][RTW89_ACMA][1] = 127, -+ [0][1][RTW89_CN][1] = 22, -+ [0][1][RTW89_UK][1] = 127, -+ [0][1][RTW89_FCC][2] = 127, -+ [0][1][RTW89_ETSI][2] = 127, -+ [0][1][RTW89_MKK][2] = 127, -+ [0][1][RTW89_IC][2] = 127, -+ [0][1][RTW89_KCC][2] = 127, -+ [0][1][RTW89_ACMA][2] = 127, -+ [0][1][RTW89_CN][2] = 22, -+ [0][1][RTW89_UK][2] = 127, -+ [0][1][RTW89_FCC][3] = 127, -+ [0][1][RTW89_ETSI][3] = 127, -+ [0][1][RTW89_MKK][3] = 127, -+ [0][1][RTW89_IC][3] = 127, -+ [0][1][RTW89_KCC][3] = 127, -+ [0][1][RTW89_ACMA][3] = 127, -+ [0][1][RTW89_CN][3] = 22, -+ [0][1][RTW89_UK][3] = 127, -+ [0][1][RTW89_FCC][4] = 127, -+ [0][1][RTW89_ETSI][4] = 127, -+ [0][1][RTW89_MKK][4] = 127, -+ [0][1][RTW89_IC][4] = 127, -+ [0][1][RTW89_KCC][4] = 127, -+ [0][1][RTW89_ACMA][4] = 127, -+ [0][1][RTW89_CN][4] = 22, -+ [0][1][RTW89_UK][4] = 127, -+ [0][1][RTW89_FCC][5] = 127, -+ [0][1][RTW89_ETSI][5] = 127, -+ [0][1][RTW89_MKK][5] = 127, -+ [0][1][RTW89_IC][5] = 127, -+ [0][1][RTW89_KCC][5] = 127, -+ [0][1][RTW89_ACMA][5] = 127, -+ [0][1][RTW89_CN][5] = 22, -+ [0][1][RTW89_UK][5] = 127, -+ [0][1][RTW89_FCC][6] = 127, -+ [0][1][RTW89_ETSI][6] = 127, -+ [0][1][RTW89_MKK][6] = 127, -+ [0][1][RTW89_IC][6] = 127, -+ [0][1][RTW89_KCC][6] = 127, -+ [0][1][RTW89_ACMA][6] = 127, -+ [0][1][RTW89_CN][6] = 22, -+ [0][1][RTW89_UK][6] = 127, -+ [0][1][RTW89_FCC][7] = 127, -+ [0][1][RTW89_ETSI][7] = 127, -+ [0][1][RTW89_MKK][7] = 127, -+ [0][1][RTW89_IC][7] = 127, -+ [0][1][RTW89_KCC][7] = 127, -+ [0][1][RTW89_ACMA][7] = 127, -+ [0][1][RTW89_CN][7] = 22, -+ [0][1][RTW89_UK][7] = 127, -+ [0][1][RTW89_FCC][8] = 127, -+ [0][1][RTW89_ETSI][8] = 127, -+ [0][1][RTW89_MKK][8] = 127, -+ [0][1][RTW89_IC][8] = 127, -+ [0][1][RTW89_KCC][8] = 127, -+ [0][1][RTW89_ACMA][8] = 127, -+ [0][1][RTW89_CN][8] = 22, -+ [0][1][RTW89_UK][8] = 127, -+ [0][1][RTW89_FCC][9] = 127, -+ [0][1][RTW89_ETSI][9] = 127, -+ [0][1][RTW89_MKK][9] = 127, -+ [0][1][RTW89_IC][9] = 127, -+ [0][1][RTW89_KCC][9] = 127, -+ [0][1][RTW89_ACMA][9] = 127, -+ [0][1][RTW89_CN][9] = 22, -+ [0][1][RTW89_UK][9] = 127, -+ [0][1][RTW89_FCC][10] = 127, -+ [0][1][RTW89_ETSI][10] = 127, -+ [0][1][RTW89_MKK][10] = 127, -+ [0][1][RTW89_IC][10] = 127, -+ [0][1][RTW89_KCC][10] = 127, -+ [0][1][RTW89_ACMA][10] = 127, -+ [0][1][RTW89_CN][10] = 22, -+ [0][1][RTW89_UK][10] = 127, -+ [0][1][RTW89_FCC][11] = 127, -+ [0][1][RTW89_ETSI][11] = 127, -+ [0][1][RTW89_MKK][11] = 127, -+ [0][1][RTW89_IC][11] = 127, -+ [0][1][RTW89_KCC][11] = 127, -+ [0][1][RTW89_ACMA][11] = 127, -+ [0][1][RTW89_CN][11] = 22, -+ [0][1][RTW89_UK][11] = 127, -+ [0][1][RTW89_FCC][12] = 127, -+ [0][1][RTW89_ETSI][12] = 127, -+ [0][1][RTW89_MKK][12] = 127, -+ [0][1][RTW89_IC][12] = 127, -+ [0][1][RTW89_KCC][12] = 127, -+ [0][1][RTW89_ACMA][12] = 127, -+ [0][1][RTW89_CN][12] = 20, -+ [0][1][RTW89_UK][12] = 127, -+ [0][1][RTW89_FCC][13] = 127, -+ [0][1][RTW89_ETSI][13] = 127, -+ [0][1][RTW89_MKK][13] = 127, -+ [0][1][RTW89_IC][13] = 127, -+ [0][1][RTW89_KCC][13] = 127, -+ [0][1][RTW89_ACMA][13] = 127, -+ [0][1][RTW89_CN][13] = 127, -+ [0][1][RTW89_UK][13] = 127, -+ [1][0][RTW89_FCC][0] = 70, -+ [1][0][RTW89_ETSI][0] = 42, -+ [1][0][RTW89_MKK][0] = 52, -+ [1][0][RTW89_IC][0] = 70, -+ [1][0][RTW89_KCC][0] = 56, -+ [1][0][RTW89_ACMA][0] = 42, -+ [1][0][RTW89_CN][0] = 42, -+ [1][0][RTW89_UK][0] = 42, -+ [1][0][RTW89_FCC][1] = 70, -+ [1][0][RTW89_ETSI][1] = 42, -+ [1][0][RTW89_MKK][1] = 52, -+ [1][0][RTW89_IC][1] = 70, -+ [1][0][RTW89_KCC][1] = 56, -+ [1][0][RTW89_ACMA][1] = 42, -+ [1][0][RTW89_CN][1] = 44, -+ [1][0][RTW89_UK][1] = 42, -+ [1][0][RTW89_FCC][2] = 74, -+ [1][0][RTW89_ETSI][2] = 42, -+ [1][0][RTW89_MKK][2] = 52, -+ [1][0][RTW89_IC][2] = 74, -+ [1][0][RTW89_KCC][2] = 56, -+ [1][0][RTW89_ACMA][2] = 42, -+ [1][0][RTW89_CN][2] = 44, -+ [1][0][RTW89_UK][2] = 42, -+ [1][0][RTW89_FCC][3] = 76, -+ [1][0][RTW89_ETSI][3] = 42, -+ [1][0][RTW89_MKK][3] = 52, -+ [1][0][RTW89_IC][3] = 76, -+ [1][0][RTW89_KCC][3] = 56, -+ [1][0][RTW89_ACMA][3] = 42, -+ [1][0][RTW89_CN][3] = 44, -+ [1][0][RTW89_UK][3] = 42, -+ [1][0][RTW89_FCC][4] = 76, -+ [1][0][RTW89_ETSI][4] = 42, -+ [1][0][RTW89_MKK][4] = 52, -+ [1][0][RTW89_IC][4] = 76, -+ [1][0][RTW89_KCC][4] = 56, -+ [1][0][RTW89_ACMA][4] = 42, -+ [1][0][RTW89_CN][4] = 44, -+ [1][0][RTW89_UK][4] = 42, -+ [1][0][RTW89_FCC][5] = 82, -+ [1][0][RTW89_ETSI][5] = 42, -+ [1][0][RTW89_MKK][5] = 52, -+ [1][0][RTW89_IC][5] = 82, -+ [1][0][RTW89_KCC][5] = 56, -+ [1][0][RTW89_ACMA][5] = 42, -+ [1][0][RTW89_CN][5] = 44, -+ [1][0][RTW89_UK][5] = 42, -+ [1][0][RTW89_FCC][6] = 74, -+ [1][0][RTW89_ETSI][6] = 42, -+ [1][0][RTW89_MKK][6] = 52, -+ [1][0][RTW89_IC][6] = 74, -+ [1][0][RTW89_KCC][6] = 56, -+ [1][0][RTW89_ACMA][6] = 42, -+ [1][0][RTW89_CN][6] = 44, -+ [1][0][RTW89_UK][6] = 42, -+ [1][0][RTW89_FCC][7] = 74, -+ [1][0][RTW89_ETSI][7] = 42, -+ [1][0][RTW89_MKK][7] = 52, -+ [1][0][RTW89_IC][7] = 74, -+ [1][0][RTW89_KCC][7] = 56, -+ [1][0][RTW89_ACMA][7] = 42, -+ [1][0][RTW89_CN][7] = 44, -+ [1][0][RTW89_UK][7] = 42, -+ [1][0][RTW89_FCC][8] = 74, -+ [1][0][RTW89_ETSI][8] = 42, -+ [1][0][RTW89_MKK][8] = 52, -+ [1][0][RTW89_IC][8] = 74, -+ [1][0][RTW89_KCC][8] = 56, -+ [1][0][RTW89_ACMA][8] = 42, -+ [1][0][RTW89_CN][8] = 44, -+ [1][0][RTW89_UK][8] = 42, -+ [1][0][RTW89_FCC][9] = 70, -+ [1][0][RTW89_ETSI][9] = 42, -+ [1][0][RTW89_MKK][9] = 52, -+ [1][0][RTW89_IC][9] = 70, -+ [1][0][RTW89_KCC][9] = 58, -+ [1][0][RTW89_ACMA][9] = 42, -+ [1][0][RTW89_CN][9] = 44, -+ [1][0][RTW89_UK][9] = 42, -+ [1][0][RTW89_FCC][10] = 70, -+ [1][0][RTW89_ETSI][10] = 42, -+ [1][0][RTW89_MKK][10] = 52, -+ [1][0][RTW89_IC][10] = 70, -+ [1][0][RTW89_KCC][10] = 58, -+ [1][0][RTW89_ACMA][10] = 42, -+ [1][0][RTW89_CN][10] = 44, -+ [1][0][RTW89_UK][10] = 42, -+ [1][0][RTW89_FCC][11] = 66, -+ [1][0][RTW89_ETSI][11] = 42, -+ [1][0][RTW89_MKK][11] = 52, -+ [1][0][RTW89_IC][11] = 66, -+ [1][0][RTW89_KCC][11] = 58, -+ [1][0][RTW89_ACMA][11] = 42, -+ [1][0][RTW89_CN][11] = 44, -+ [1][0][RTW89_UK][11] = 42, -+ [1][0][RTW89_FCC][12] = 34, -+ [1][0][RTW89_ETSI][12] = 42, -+ [1][0][RTW89_MKK][12] = 52, -+ [1][0][RTW89_IC][12] = 34, -+ [1][0][RTW89_KCC][12] = 58, -+ [1][0][RTW89_ACMA][12] = 42, -+ [1][0][RTW89_CN][12] = 42, -+ [1][0][RTW89_UK][12] = 42, -+ [1][0][RTW89_FCC][13] = 127, -+ [1][0][RTW89_ETSI][13] = 127, -+ [1][0][RTW89_MKK][13] = 127, -+ [1][0][RTW89_IC][13] = 127, -+ [1][0][RTW89_KCC][13] = 127, -+ [1][0][RTW89_ACMA][13] = 127, -+ [1][0][RTW89_CN][13] = 127, -+ [1][0][RTW89_UK][13] = 127, -+ [1][1][RTW89_FCC][0] = 127, -+ [1][1][RTW89_ETSI][0] = 127, -+ [1][1][RTW89_MKK][0] = 127, -+ [1][1][RTW89_IC][0] = 127, -+ [1][1][RTW89_KCC][0] = 127, -+ [1][1][RTW89_ACMA][0] = 127, -+ [1][1][RTW89_CN][0] = 32, -+ [1][1][RTW89_UK][0] = 127, -+ [1][1][RTW89_FCC][1] = 127, -+ [1][1][RTW89_ETSI][1] = 127, -+ [1][1][RTW89_MKK][1] = 127, -+ [1][1][RTW89_IC][1] = 127, -+ [1][1][RTW89_KCC][1] = 127, -+ [1][1][RTW89_ACMA][1] = 127, -+ [1][1][RTW89_CN][1] = 32, -+ [1][1][RTW89_UK][1] = 127, -+ [1][1][RTW89_FCC][2] = 127, -+ [1][1][RTW89_ETSI][2] = 127, -+ [1][1][RTW89_MKK][2] = 127, -+ [1][1][RTW89_IC][2] = 127, -+ [1][1][RTW89_KCC][2] = 127, -+ [1][1][RTW89_ACMA][2] = 127, -+ [1][1][RTW89_CN][2] = 32, -+ [1][1][RTW89_UK][2] = 127, -+ [1][1][RTW89_FCC][3] = 127, -+ [1][1][RTW89_ETSI][3] = 127, -+ [1][1][RTW89_MKK][3] = 127, -+ [1][1][RTW89_IC][3] = 127, -+ [1][1][RTW89_KCC][3] = 127, -+ [1][1][RTW89_ACMA][3] = 127, -+ [1][1][RTW89_CN][3] = 32, -+ [1][1][RTW89_UK][3] = 127, -+ [1][1][RTW89_FCC][4] = 127, -+ [1][1][RTW89_ETSI][4] = 127, -+ [1][1][RTW89_MKK][4] = 127, -+ [1][1][RTW89_IC][4] = 127, -+ [1][1][RTW89_KCC][4] = 127, -+ [1][1][RTW89_ACMA][4] = 127, -+ [1][1][RTW89_CN][4] = 32, -+ [1][1][RTW89_UK][4] = 127, -+ [1][1][RTW89_FCC][5] = 127, -+ [1][1][RTW89_ETSI][5] = 127, -+ [1][1][RTW89_MKK][5] = 127, -+ [1][1][RTW89_IC][5] = 127, -+ [1][1][RTW89_KCC][5] = 127, -+ [1][1][RTW89_ACMA][5] = 127, -+ [1][1][RTW89_CN][5] = 32, -+ [1][1][RTW89_UK][5] = 127, -+ [1][1][RTW89_FCC][6] = 127, -+ [1][1][RTW89_ETSI][6] = 127, -+ [1][1][RTW89_MKK][6] = 127, -+ [1][1][RTW89_IC][6] = 127, -+ [1][1][RTW89_KCC][6] = 127, -+ [1][1][RTW89_ACMA][6] = 127, -+ [1][1][RTW89_CN][6] = 32, -+ [1][1][RTW89_UK][6] = 127, -+ [1][1][RTW89_FCC][7] = 127, -+ [1][1][RTW89_ETSI][7] = 127, -+ [1][1][RTW89_MKK][7] = 127, -+ [1][1][RTW89_IC][7] = 127, -+ [1][1][RTW89_KCC][7] = 127, -+ [1][1][RTW89_ACMA][7] = 127, -+ [1][1][RTW89_CN][7] = 32, -+ [1][1][RTW89_UK][7] = 127, -+ [1][1][RTW89_FCC][8] = 127, -+ [1][1][RTW89_ETSI][8] = 127, -+ [1][1][RTW89_MKK][8] = 127, -+ [1][1][RTW89_IC][8] = 127, -+ [1][1][RTW89_KCC][8] = 127, -+ [1][1][RTW89_ACMA][8] = 127, -+ [1][1][RTW89_CN][8] = 32, -+ [1][1][RTW89_UK][8] = 127, -+ [1][1][RTW89_FCC][9] = 127, -+ [1][1][RTW89_ETSI][9] = 127, -+ [1][1][RTW89_MKK][9] = 127, -+ [1][1][RTW89_IC][9] = 127, -+ [1][1][RTW89_KCC][9] = 127, -+ [1][1][RTW89_ACMA][9] = 127, -+ [1][1][RTW89_CN][9] = 32, -+ [1][1][RTW89_UK][9] = 127, -+ [1][1][RTW89_FCC][10] = 127, -+ [1][1][RTW89_ETSI][10] = 127, -+ [1][1][RTW89_MKK][10] = 127, -+ [1][1][RTW89_IC][10] = 127, -+ [1][1][RTW89_KCC][10] = 127, -+ [1][1][RTW89_ACMA][10] = 127, -+ [1][1][RTW89_CN][10] = 32, -+ [1][1][RTW89_UK][10] = 127, -+ [1][1][RTW89_FCC][11] = 127, -+ [1][1][RTW89_ETSI][11] = 127, -+ [1][1][RTW89_MKK][11] = 127, -+ [1][1][RTW89_IC][11] = 127, -+ [1][1][RTW89_KCC][11] = 127, -+ [1][1][RTW89_ACMA][11] = 127, -+ [1][1][RTW89_CN][11] = 32, -+ [1][1][RTW89_UK][11] = 127, -+ [1][1][RTW89_FCC][12] = 127, -+ [1][1][RTW89_ETSI][12] = 127, -+ [1][1][RTW89_MKK][12] = 127, -+ [1][1][RTW89_IC][12] = 127, -+ [1][1][RTW89_KCC][12] = 127, -+ [1][1][RTW89_ACMA][12] = 127, -+ [1][1][RTW89_CN][12] = 32, -+ [1][1][RTW89_UK][12] = 127, -+ [1][1][RTW89_FCC][13] = 127, -+ [1][1][RTW89_ETSI][13] = 127, -+ [1][1][RTW89_MKK][13] = 127, -+ [1][1][RTW89_IC][13] = 127, -+ [1][1][RTW89_KCC][13] = 127, -+ [1][1][RTW89_ACMA][13] = 127, -+ [1][1][RTW89_CN][13] = 127, -+ [1][1][RTW89_UK][13] = 127, -+ [2][0][RTW89_FCC][0] = 76, -+ [2][0][RTW89_ETSI][0] = 54, -+ [2][0][RTW89_MKK][0] = 64, -+ [2][0][RTW89_IC][0] = 76, -+ [2][0][RTW89_KCC][0] = 68, -+ [2][0][RTW89_ACMA][0] = 54, -+ [2][0][RTW89_CN][0] = 56, -+ [2][0][RTW89_UK][0] = 54, -+ [2][0][RTW89_FCC][1] = 76, -+ [2][0][RTW89_ETSI][1] = 54, -+ [2][0][RTW89_MKK][1] = 64, -+ [2][0][RTW89_IC][1] = 76, -+ [2][0][RTW89_KCC][1] = 68, -+ [2][0][RTW89_ACMA][1] = 54, -+ [2][0][RTW89_CN][1] = 56, -+ [2][0][RTW89_UK][1] = 54, -+ [2][0][RTW89_FCC][2] = 78, -+ [2][0][RTW89_ETSI][2] = 54, -+ [2][0][RTW89_MKK][2] = 64, -+ [2][0][RTW89_IC][2] = 78, -+ [2][0][RTW89_KCC][2] = 68, -+ [2][0][RTW89_ACMA][2] = 54, -+ [2][0][RTW89_CN][2] = 56, -+ [2][0][RTW89_UK][2] = 54, -+ [2][0][RTW89_FCC][3] = 78, -+ [2][0][RTW89_ETSI][3] = 54, -+ [2][0][RTW89_MKK][3] = 64, -+ [2][0][RTW89_IC][3] = 78, -+ [2][0][RTW89_KCC][3] = 68, -+ [2][0][RTW89_ACMA][3] = 54, -+ [2][0][RTW89_CN][3] = 56, -+ [2][0][RTW89_UK][3] = 54, -+ [2][0][RTW89_FCC][4] = 78, -+ [2][0][RTW89_ETSI][4] = 54, -+ [2][0][RTW89_MKK][4] = 64, -+ [2][0][RTW89_IC][4] = 78, -+ [2][0][RTW89_KCC][4] = 68, -+ [2][0][RTW89_ACMA][4] = 54, -+ [2][0][RTW89_CN][4] = 56, -+ [2][0][RTW89_UK][4] = 54, -+ [2][0][RTW89_FCC][5] = 82, -+ [2][0][RTW89_ETSI][5] = 54, -+ [2][0][RTW89_MKK][5] = 64, -+ [2][0][RTW89_IC][5] = 82, -+ [2][0][RTW89_KCC][5] = 68, -+ [2][0][RTW89_ACMA][5] = 54, -+ [2][0][RTW89_CN][5] = 56, -+ [2][0][RTW89_UK][5] = 54, -+ [2][0][RTW89_FCC][6] = 74, -+ [2][0][RTW89_ETSI][6] = 54, -+ [2][0][RTW89_MKK][6] = 64, -+ [2][0][RTW89_IC][6] = 74, -+ [2][0][RTW89_KCC][6] = 68, -+ [2][0][RTW89_ACMA][6] = 54, -+ [2][0][RTW89_CN][6] = 56, -+ [2][0][RTW89_UK][6] = 54, -+ [2][0][RTW89_FCC][7] = 74, -+ [2][0][RTW89_ETSI][7] = 54, -+ [2][0][RTW89_MKK][7] = 64, -+ [2][0][RTW89_IC][7] = 74, -+ [2][0][RTW89_KCC][7] = 68, -+ [2][0][RTW89_ACMA][7] = 54, -+ [2][0][RTW89_CN][7] = 56, -+ [2][0][RTW89_UK][7] = 54, -+ [2][0][RTW89_FCC][8] = 74, -+ [2][0][RTW89_ETSI][8] = 54, -+ [2][0][RTW89_MKK][8] = 64, -+ [2][0][RTW89_IC][8] = 74, -+ [2][0][RTW89_KCC][8] = 68, -+ [2][0][RTW89_ACMA][8] = 54, -+ [2][0][RTW89_CN][8] = 56, -+ [2][0][RTW89_UK][8] = 54, -+ [2][0][RTW89_FCC][9] = 72, -+ [2][0][RTW89_ETSI][9] = 54, -+ [2][0][RTW89_MKK][9] = 64, -+ [2][0][RTW89_IC][9] = 72, -+ [2][0][RTW89_KCC][9] = 68, -+ [2][0][RTW89_ACMA][9] = 54, -+ [2][0][RTW89_CN][9] = 56, -+ [2][0][RTW89_UK][9] = 54, -+ [2][0][RTW89_FCC][10] = 72, -+ [2][0][RTW89_ETSI][10] = 54, -+ [2][0][RTW89_MKK][10] = 64, -+ [2][0][RTW89_IC][10] = 72, -+ [2][0][RTW89_KCC][10] = 68, -+ [2][0][RTW89_ACMA][10] = 54, -+ [2][0][RTW89_CN][10] = 56, -+ [2][0][RTW89_UK][10] = 54, -+ [2][0][RTW89_FCC][11] = 64, -+ [2][0][RTW89_ETSI][11] = 54, -+ [2][0][RTW89_MKK][11] = 64, -+ [2][0][RTW89_IC][11] = 64, -+ [2][0][RTW89_KCC][11] = 68, -+ [2][0][RTW89_ACMA][11] = 54, -+ [2][0][RTW89_CN][11] = 56, -+ [2][0][RTW89_UK][11] = 54, -+ [2][0][RTW89_FCC][12] = 34, -+ [2][0][RTW89_ETSI][12] = 54, -+ [2][0][RTW89_MKK][12] = 64, -+ [2][0][RTW89_IC][12] = 34, -+ [2][0][RTW89_KCC][12] = 68, -+ [2][0][RTW89_ACMA][12] = 54, -+ [2][0][RTW89_CN][12] = 56, -+ [2][0][RTW89_UK][12] = 54, -+ [2][0][RTW89_FCC][13] = 127, -+ [2][0][RTW89_ETSI][13] = 127, -+ [2][0][RTW89_MKK][13] = 127, -+ [2][0][RTW89_IC][13] = 127, -+ [2][0][RTW89_KCC][13] = 127, -+ [2][0][RTW89_ACMA][13] = 127, -+ [2][0][RTW89_CN][13] = 127, -+ [2][0][RTW89_UK][13] = 127, -+ [2][1][RTW89_FCC][0] = 127, -+ [2][1][RTW89_ETSI][0] = 127, -+ [2][1][RTW89_MKK][0] = 127, -+ [2][1][RTW89_IC][0] = 127, -+ [2][1][RTW89_KCC][0] = 127, -+ [2][1][RTW89_ACMA][0] = 127, -+ [2][1][RTW89_CN][0] = 44, -+ [2][1][RTW89_UK][0] = 127, -+ [2][1][RTW89_FCC][1] = 127, -+ [2][1][RTW89_ETSI][1] = 127, -+ [2][1][RTW89_MKK][1] = 127, -+ [2][1][RTW89_IC][1] = 127, -+ [2][1][RTW89_KCC][1] = 127, -+ [2][1][RTW89_ACMA][1] = 127, -+ [2][1][RTW89_CN][1] = 44, -+ [2][1][RTW89_UK][1] = 127, -+ [2][1][RTW89_FCC][2] = 127, -+ [2][1][RTW89_ETSI][2] = 127, -+ [2][1][RTW89_MKK][2] = 127, -+ [2][1][RTW89_IC][2] = 127, -+ [2][1][RTW89_KCC][2] = 127, -+ [2][1][RTW89_ACMA][2] = 127, -+ [2][1][RTW89_CN][2] = 44, -+ [2][1][RTW89_UK][2] = 127, -+ [2][1][RTW89_FCC][3] = 127, -+ [2][1][RTW89_ETSI][3] = 127, -+ [2][1][RTW89_MKK][3] = 127, -+ [2][1][RTW89_IC][3] = 127, -+ [2][1][RTW89_KCC][3] = 127, -+ [2][1][RTW89_ACMA][3] = 127, -+ [2][1][RTW89_CN][3] = 44, -+ [2][1][RTW89_UK][3] = 127, -+ [2][1][RTW89_FCC][4] = 127, -+ [2][1][RTW89_ETSI][4] = 127, -+ [2][1][RTW89_MKK][4] = 127, -+ [2][1][RTW89_IC][4] = 127, -+ [2][1][RTW89_KCC][4] = 127, -+ [2][1][RTW89_ACMA][4] = 127, -+ [2][1][RTW89_CN][4] = 44, -+ [2][1][RTW89_UK][4] = 127, -+ [2][1][RTW89_FCC][5] = 127, -+ [2][1][RTW89_ETSI][5] = 127, -+ [2][1][RTW89_MKK][5] = 127, -+ [2][1][RTW89_IC][5] = 127, -+ [2][1][RTW89_KCC][5] = 127, -+ [2][1][RTW89_ACMA][5] = 127, -+ [2][1][RTW89_CN][5] = 44, -+ [2][1][RTW89_UK][5] = 127, -+ [2][1][RTW89_FCC][6] = 127, -+ [2][1][RTW89_ETSI][6] = 127, -+ [2][1][RTW89_MKK][6] = 127, -+ [2][1][RTW89_IC][6] = 127, -+ [2][1][RTW89_KCC][6] = 127, -+ [2][1][RTW89_ACMA][6] = 127, -+ [2][1][RTW89_CN][6] = 44, -+ [2][1][RTW89_UK][6] = 127, -+ [2][1][RTW89_FCC][7] = 127, -+ [2][1][RTW89_ETSI][7] = 127, -+ [2][1][RTW89_MKK][7] = 127, -+ [2][1][RTW89_IC][7] = 127, -+ [2][1][RTW89_KCC][7] = 127, -+ [2][1][RTW89_ACMA][7] = 127, -+ [2][1][RTW89_CN][7] = 44, -+ [2][1][RTW89_UK][7] = 127, -+ [2][1][RTW89_FCC][8] = 127, -+ [2][1][RTW89_ETSI][8] = 127, -+ [2][1][RTW89_MKK][8] = 127, -+ [2][1][RTW89_IC][8] = 127, -+ [2][1][RTW89_KCC][8] = 127, -+ [2][1][RTW89_ACMA][8] = 127, -+ [2][1][RTW89_CN][8] = 44, -+ [2][1][RTW89_UK][8] = 127, -+ [2][1][RTW89_FCC][9] = 127, -+ [2][1][RTW89_ETSI][9] = 127, -+ [2][1][RTW89_MKK][9] = 127, -+ [2][1][RTW89_IC][9] = 127, -+ [2][1][RTW89_KCC][9] = 127, -+ [2][1][RTW89_ACMA][9] = 127, -+ [2][1][RTW89_CN][9] = 44, -+ [2][1][RTW89_UK][9] = 127, -+ [2][1][RTW89_FCC][10] = 127, -+ [2][1][RTW89_ETSI][10] = 127, -+ [2][1][RTW89_MKK][10] = 127, -+ [2][1][RTW89_IC][10] = 127, -+ [2][1][RTW89_KCC][10] = 127, -+ [2][1][RTW89_ACMA][10] = 127, -+ [2][1][RTW89_CN][10] = 44, -+ [2][1][RTW89_UK][10] = 127, -+ [2][1][RTW89_FCC][11] = 127, -+ [2][1][RTW89_ETSI][11] = 127, -+ [2][1][RTW89_MKK][11] = 127, -+ [2][1][RTW89_IC][11] = 127, -+ [2][1][RTW89_KCC][11] = 127, -+ [2][1][RTW89_ACMA][11] = 127, -+ [2][1][RTW89_CN][11] = 44, -+ [2][1][RTW89_UK][11] = 127, -+ [2][1][RTW89_FCC][12] = 127, -+ [2][1][RTW89_ETSI][12] = 127, -+ [2][1][RTW89_MKK][12] = 127, -+ [2][1][RTW89_IC][12] = 127, -+ [2][1][RTW89_KCC][12] = 127, -+ [2][1][RTW89_ACMA][12] = 127, -+ [2][1][RTW89_CN][12] = 42, -+ [2][1][RTW89_UK][12] = 127, -+ [2][1][RTW89_FCC][13] = 127, -+ [2][1][RTW89_ETSI][13] = 127, -+ [2][1][RTW89_MKK][13] = 127, -+ [2][1][RTW89_IC][13] = 127, -+ [2][1][RTW89_KCC][13] = 127, -+ [2][1][RTW89_ACMA][13] = 127, -+ [2][1][RTW89_CN][13] = 127, -+ [2][1][RTW89_UK][13] = 127, -+}; -+ -+static -+const s8 rtw89_8851b_txpwr_lmt_ru_5g[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = { -+ [0][0][RTW89_WW][0] = 16, -+ [0][0][RTW89_WW][2] = 16, -+ [0][0][RTW89_WW][4] = 16, -+ [0][0][RTW89_WW][6] = 16, -+ [0][0][RTW89_WW][8] = 16, -+ [0][0][RTW89_WW][10] = 16, -+ [0][0][RTW89_WW][12] = 16, -+ [0][0][RTW89_WW][14] = 16, -+ [0][0][RTW89_WW][15] = 24, -+ [0][0][RTW89_WW][17] = 24, -+ [0][0][RTW89_WW][19] = 24, -+ [0][0][RTW89_WW][21] = 24, -+ [0][0][RTW89_WW][23] = 24, -+ [0][0][RTW89_WW][25] = 24, -+ [0][0][RTW89_WW][27] = 24, -+ [0][0][RTW89_WW][29] = 24, -+ [0][0][RTW89_WW][31] = 24, -+ [0][0][RTW89_WW][33] = 24, -+ [0][0][RTW89_WW][35] = 24, -+ [0][0][RTW89_WW][37] = 44, -+ [0][0][RTW89_WW][38] = 24, -+ [0][0][RTW89_WW][40] = 24, -+ [0][0][RTW89_WW][42] = 24, -+ [0][0][RTW89_WW][44] = 24, -+ [0][0][RTW89_WW][46] = 24, -+ [0][0][RTW89_WW][48] = 42, -+ [0][0][RTW89_WW][50] = 42, -+ [0][0][RTW89_WW][52] = 40, -+ [0][1][RTW89_WW][0] = 4, -+ [0][1][RTW89_WW][2] = 4, -+ [0][1][RTW89_WW][4] = 4, -+ [0][1][RTW89_WW][6] = 4, -+ [0][1][RTW89_WW][8] = 4, -+ [0][1][RTW89_WW][10] = 4, -+ [0][1][RTW89_WW][12] = 4, -+ [0][1][RTW89_WW][14] = 4, -+ [0][1][RTW89_WW][15] = 0, -+ [0][1][RTW89_WW][17] = 0, -+ [0][1][RTW89_WW][19] = 0, -+ [0][1][RTW89_WW][21] = 0, -+ [0][1][RTW89_WW][23] = 0, -+ [0][1][RTW89_WW][25] = 0, -+ [0][1][RTW89_WW][27] = 0, -+ [0][1][RTW89_WW][29] = 0, -+ [0][1][RTW89_WW][31] = 0, -+ [0][1][RTW89_WW][33] = 0, -+ [0][1][RTW89_WW][35] = 0, -+ [0][1][RTW89_WW][37] = 0, -+ [0][1][RTW89_WW][38] = 42, -+ [0][1][RTW89_WW][40] = 42, -+ [0][1][RTW89_WW][42] = 42, -+ [0][1][RTW89_WW][44] = 42, -+ [0][1][RTW89_WW][46] = 42, -+ [0][1][RTW89_WW][48] = 0, -+ [0][1][RTW89_WW][50] = 0, -+ [0][1][RTW89_WW][52] = 0, -+ [1][0][RTW89_WW][0] = 26, -+ [1][0][RTW89_WW][2] = 26, -+ [1][0][RTW89_WW][4] = 26, -+ [1][0][RTW89_WW][6] = 26, -+ [1][0][RTW89_WW][8] = 26, -+ [1][0][RTW89_WW][10] = 26, -+ [1][0][RTW89_WW][12] = 26, -+ [1][0][RTW89_WW][14] = 26, -+ [1][0][RTW89_WW][15] = 34, -+ [1][0][RTW89_WW][17] = 34, -+ [1][0][RTW89_WW][19] = 34, -+ [1][0][RTW89_WW][21] = 34, -+ [1][0][RTW89_WW][23] = 34, -+ [1][0][RTW89_WW][25] = 34, -+ [1][0][RTW89_WW][27] = 34, -+ [1][0][RTW89_WW][29] = 34, -+ [1][0][RTW89_WW][31] = 34, -+ [1][0][RTW89_WW][33] = 34, -+ [1][0][RTW89_WW][35] = 34, -+ [1][0][RTW89_WW][37] = 54, -+ [1][0][RTW89_WW][38] = 28, -+ [1][0][RTW89_WW][40] = 28, -+ [1][0][RTW89_WW][42] = 28, -+ [1][0][RTW89_WW][44] = 28, -+ [1][0][RTW89_WW][46] = 28, -+ [1][0][RTW89_WW][48] = 52, -+ [1][0][RTW89_WW][50] = 52, -+ [1][0][RTW89_WW][52] = 52, -+ [1][1][RTW89_WW][0] = 14, -+ [1][1][RTW89_WW][2] = 14, -+ [1][1][RTW89_WW][4] = 14, -+ [1][1][RTW89_WW][6] = 14, -+ [1][1][RTW89_WW][8] = 14, -+ [1][1][RTW89_WW][10] = 14, -+ [1][1][RTW89_WW][12] = 14, -+ [1][1][RTW89_WW][14] = 14, -+ [1][1][RTW89_WW][15] = 0, -+ [1][1][RTW89_WW][17] = 0, -+ [1][1][RTW89_WW][19] = 0, -+ [1][1][RTW89_WW][21] = 0, -+ [1][1][RTW89_WW][23] = 0, -+ [1][1][RTW89_WW][25] = 0, -+ [1][1][RTW89_WW][27] = 0, -+ [1][1][RTW89_WW][29] = 0, -+ [1][1][RTW89_WW][31] = 0, -+ [1][1][RTW89_WW][33] = 0, -+ [1][1][RTW89_WW][35] = 0, -+ [1][1][RTW89_WW][37] = 0, -+ [1][1][RTW89_WW][38] = 54, -+ [1][1][RTW89_WW][40] = 54, -+ [1][1][RTW89_WW][42] = 54, -+ [1][1][RTW89_WW][44] = 54, -+ [1][1][RTW89_WW][46] = 54, -+ [1][1][RTW89_WW][48] = 0, -+ [1][1][RTW89_WW][50] = 0, -+ [1][1][RTW89_WW][52] = 0, -+ [2][0][RTW89_WW][0] = 40, -+ [2][0][RTW89_WW][2] = 40, -+ [2][0][RTW89_WW][4] = 40, -+ [2][0][RTW89_WW][6] = 40, -+ [2][0][RTW89_WW][8] = 40, -+ [2][0][RTW89_WW][10] = 40, -+ [2][0][RTW89_WW][12] = 40, -+ [2][0][RTW89_WW][14] = 40, -+ [2][0][RTW89_WW][15] = 46, -+ [2][0][RTW89_WW][17] = 46, -+ [2][0][RTW89_WW][19] = 46, -+ [2][0][RTW89_WW][21] = 46, -+ [2][0][RTW89_WW][23] = 46, -+ [2][0][RTW89_WW][25] = 46, -+ [2][0][RTW89_WW][27] = 46, -+ [2][0][RTW89_WW][29] = 46, -+ [2][0][RTW89_WW][31] = 46, -+ [2][0][RTW89_WW][33] = 46, -+ [2][0][RTW89_WW][35] = 46, -+ [2][0][RTW89_WW][37] = 66, -+ [2][0][RTW89_WW][38] = 28, -+ [2][0][RTW89_WW][40] = 28, -+ [2][0][RTW89_WW][42] = 28, -+ [2][0][RTW89_WW][44] = 28, -+ [2][0][RTW89_WW][46] = 28, -+ [2][0][RTW89_WW][48] = 64, -+ [2][0][RTW89_WW][50] = 64, -+ [2][0][RTW89_WW][52] = 60, -+ [2][1][RTW89_WW][0] = 28, -+ [2][1][RTW89_WW][2] = 28, -+ [2][1][RTW89_WW][4] = 28, -+ [2][1][RTW89_WW][6] = 28, -+ [2][1][RTW89_WW][8] = 28, -+ [2][1][RTW89_WW][10] = 28, -+ [2][1][RTW89_WW][12] = 28, -+ [2][1][RTW89_WW][14] = 28, -+ [2][1][RTW89_WW][15] = 0, -+ [2][1][RTW89_WW][17] = 0, -+ [2][1][RTW89_WW][19] = 0, -+ [2][1][RTW89_WW][21] = 0, -+ [2][1][RTW89_WW][23] = 0, -+ [2][1][RTW89_WW][25] = 0, -+ [2][1][RTW89_WW][27] = 0, -+ [2][1][RTW89_WW][29] = 0, -+ [2][1][RTW89_WW][31] = 0, -+ [2][1][RTW89_WW][33] = 0, -+ [2][1][RTW89_WW][35] = 0, -+ [2][1][RTW89_WW][37] = 0, -+ [2][1][RTW89_WW][38] = 56, -+ [2][1][RTW89_WW][40] = 56, -+ [2][1][RTW89_WW][42] = 56, -+ [2][1][RTW89_WW][44] = 56, -+ [2][1][RTW89_WW][46] = 56, -+ [2][1][RTW89_WW][48] = 0, -+ [2][1][RTW89_WW][50] = 0, -+ [2][1][RTW89_WW][52] = 0, -+ [0][0][RTW89_FCC][0] = 52, -+ [0][0][RTW89_ETSI][0] = 24, -+ [0][0][RTW89_MKK][0] = 26, -+ [0][0][RTW89_IC][0] = 28, -+ [0][0][RTW89_KCC][0] = 42, -+ [0][0][RTW89_ACMA][0] = 24, -+ [0][0][RTW89_CN][0] = 16, -+ [0][0][RTW89_UK][0] = 24, -+ [0][0][RTW89_FCC][2] = 54, -+ [0][0][RTW89_ETSI][2] = 24, -+ [0][0][RTW89_MKK][2] = 26, -+ [0][0][RTW89_IC][2] = 28, -+ [0][0][RTW89_KCC][2] = 42, -+ [0][0][RTW89_ACMA][2] = 24, -+ [0][0][RTW89_CN][2] = 16, -+ [0][0][RTW89_UK][2] = 24, -+ [0][0][RTW89_FCC][4] = 52, -+ [0][0][RTW89_ETSI][4] = 24, -+ [0][0][RTW89_MKK][4] = 26, -+ [0][0][RTW89_IC][4] = 28, -+ [0][0][RTW89_KCC][4] = 42, -+ [0][0][RTW89_ACMA][4] = 24, -+ [0][0][RTW89_CN][4] = 16, -+ [0][0][RTW89_UK][4] = 24, -+ [0][0][RTW89_FCC][6] = 52, -+ [0][0][RTW89_ETSI][6] = 24, -+ [0][0][RTW89_MKK][6] = 26, -+ [0][0][RTW89_IC][6] = 28, -+ [0][0][RTW89_KCC][6] = 18, -+ [0][0][RTW89_ACMA][6] = 24, -+ [0][0][RTW89_CN][6] = 16, -+ [0][0][RTW89_UK][6] = 24, -+ [0][0][RTW89_FCC][8] = 52, -+ [0][0][RTW89_ETSI][8] = 24, -+ [0][0][RTW89_MKK][8] = 26, -+ [0][0][RTW89_IC][8] = 52, -+ [0][0][RTW89_KCC][8] = 42, -+ [0][0][RTW89_ACMA][8] = 24, -+ [0][0][RTW89_CN][8] = 16, -+ [0][0][RTW89_UK][8] = 24, -+ [0][0][RTW89_FCC][10] = 52, -+ [0][0][RTW89_ETSI][10] = 24, -+ [0][0][RTW89_MKK][10] = 26, -+ [0][0][RTW89_IC][10] = 52, -+ [0][0][RTW89_KCC][10] = 42, -+ [0][0][RTW89_ACMA][10] = 24, -+ [0][0][RTW89_CN][10] = 16, -+ [0][0][RTW89_UK][10] = 24, -+ [0][0][RTW89_FCC][12] = 56, -+ [0][0][RTW89_ETSI][12] = 24, -+ [0][0][RTW89_MKK][12] = 26, -+ [0][0][RTW89_IC][12] = 56, -+ [0][0][RTW89_KCC][12] = 44, -+ [0][0][RTW89_ACMA][12] = 24, -+ [0][0][RTW89_CN][12] = 16, -+ [0][0][RTW89_UK][12] = 24, -+ [0][0][RTW89_FCC][14] = 56, -+ [0][0][RTW89_ETSI][14] = 24, -+ [0][0][RTW89_MKK][14] = 26, -+ [0][0][RTW89_IC][14] = 56, -+ [0][0][RTW89_KCC][14] = 44, -+ [0][0][RTW89_ACMA][14] = 24, -+ [0][0][RTW89_CN][14] = 16, -+ [0][0][RTW89_UK][14] = 24, -+ [0][0][RTW89_FCC][15] = 54, -+ [0][0][RTW89_ETSI][15] = 24, -+ [0][0][RTW89_MKK][15] = 46, -+ [0][0][RTW89_IC][15] = 54, -+ [0][0][RTW89_KCC][15] = 44, -+ [0][0][RTW89_ACMA][15] = 24, -+ [0][0][RTW89_CN][15] = 127, -+ [0][0][RTW89_UK][15] = 24, -+ [0][0][RTW89_FCC][17] = 54, -+ [0][0][RTW89_ETSI][17] = 24, -+ [0][0][RTW89_MKK][17] = 50, -+ [0][0][RTW89_IC][17] = 54, -+ [0][0][RTW89_KCC][17] = 44, -+ [0][0][RTW89_ACMA][17] = 24, -+ [0][0][RTW89_CN][17] = 127, -+ [0][0][RTW89_UK][17] = 24, -+ [0][0][RTW89_FCC][19] = 54, -+ [0][0][RTW89_ETSI][19] = 24, -+ [0][0][RTW89_MKK][19] = 50, -+ [0][0][RTW89_IC][19] = 54, -+ [0][0][RTW89_KCC][19] = 44, -+ [0][0][RTW89_ACMA][19] = 24, -+ [0][0][RTW89_CN][19] = 127, -+ [0][0][RTW89_UK][19] = 24, -+ [0][0][RTW89_FCC][21] = 54, -+ [0][0][RTW89_ETSI][21] = 24, -+ [0][0][RTW89_MKK][21] = 50, -+ [0][0][RTW89_IC][21] = 54, -+ [0][0][RTW89_KCC][21] = 44, -+ [0][0][RTW89_ACMA][21] = 24, -+ [0][0][RTW89_CN][21] = 127, -+ [0][0][RTW89_UK][21] = 24, -+ [0][0][RTW89_FCC][23] = 54, -+ [0][0][RTW89_ETSI][23] = 24, -+ [0][0][RTW89_MKK][23] = 50, -+ [0][0][RTW89_IC][23] = 54, -+ [0][0][RTW89_KCC][23] = 44, -+ [0][0][RTW89_ACMA][23] = 24, -+ [0][0][RTW89_CN][23] = 127, -+ [0][0][RTW89_UK][23] = 24, -+ [0][0][RTW89_FCC][25] = 54, -+ [0][0][RTW89_ETSI][25] = 24, -+ [0][0][RTW89_MKK][25] = 50, -+ [0][0][RTW89_IC][25] = 127, -+ [0][0][RTW89_KCC][25] = 44, -+ [0][0][RTW89_ACMA][25] = 127, -+ [0][0][RTW89_CN][25] = 127, -+ [0][0][RTW89_UK][25] = 24, -+ [0][0][RTW89_FCC][27] = 54, -+ [0][0][RTW89_ETSI][27] = 24, -+ [0][0][RTW89_MKK][27] = 50, -+ [0][0][RTW89_IC][27] = 127, -+ [0][0][RTW89_KCC][27] = 42, -+ [0][0][RTW89_ACMA][27] = 127, -+ [0][0][RTW89_CN][27] = 127, -+ [0][0][RTW89_UK][27] = 24, -+ [0][0][RTW89_FCC][29] = 54, -+ [0][0][RTW89_ETSI][29] = 24, -+ [0][0][RTW89_MKK][29] = 50, -+ [0][0][RTW89_IC][29] = 127, -+ [0][0][RTW89_KCC][29] = 42, -+ [0][0][RTW89_ACMA][29] = 127, -+ [0][0][RTW89_CN][29] = 127, -+ [0][0][RTW89_UK][29] = 24, -+ [0][0][RTW89_FCC][31] = 54, -+ [0][0][RTW89_ETSI][31] = 24, -+ [0][0][RTW89_MKK][31] = 50, -+ [0][0][RTW89_IC][31] = 56, -+ [0][0][RTW89_KCC][31] = 42, -+ [0][0][RTW89_ACMA][31] = 24, -+ [0][0][RTW89_CN][31] = 127, -+ [0][0][RTW89_UK][31] = 24, -+ [0][0][RTW89_FCC][33] = 56, -+ [0][0][RTW89_ETSI][33] = 24, -+ [0][0][RTW89_MKK][33] = 50, -+ [0][0][RTW89_IC][33] = 56, -+ [0][0][RTW89_KCC][33] = 42, -+ [0][0][RTW89_ACMA][33] = 24, -+ [0][0][RTW89_CN][33] = 127, -+ [0][0][RTW89_UK][33] = 24, -+ [0][0][RTW89_FCC][35] = 56, -+ [0][0][RTW89_ETSI][35] = 24, -+ [0][0][RTW89_MKK][35] = 50, -+ [0][0][RTW89_IC][35] = 56, -+ [0][0][RTW89_KCC][35] = 42, -+ [0][0][RTW89_ACMA][35] = 24, -+ [0][0][RTW89_CN][35] = 127, -+ [0][0][RTW89_UK][35] = 24, -+ [0][0][RTW89_FCC][37] = 86, -+ [0][0][RTW89_ETSI][37] = 127, -+ [0][0][RTW89_MKK][37] = 46, -+ [0][0][RTW89_IC][37] = 86, -+ [0][0][RTW89_KCC][37] = 44, -+ [0][0][RTW89_ACMA][37] = 50, -+ [0][0][RTW89_CN][37] = 127, -+ [0][0][RTW89_UK][37] = 52, -+ [0][0][RTW89_FCC][38] = 68, -+ [0][0][RTW89_ETSI][38] = 28, -+ [0][0][RTW89_MKK][38] = 127, -+ [0][0][RTW89_IC][38] = 68, -+ [0][0][RTW89_KCC][38] = 44, -+ [0][0][RTW89_ACMA][38] = 84, -+ [0][0][RTW89_CN][38] = 54, -+ [0][0][RTW89_UK][38] = 24, -+ [0][0][RTW89_FCC][40] = 68, -+ [0][0][RTW89_ETSI][40] = 28, -+ [0][0][RTW89_MKK][40] = 127, -+ [0][0][RTW89_IC][40] = 68, -+ [0][0][RTW89_KCC][40] = 44, -+ [0][0][RTW89_ACMA][40] = 84, -+ [0][0][RTW89_CN][40] = 54, -+ [0][0][RTW89_UK][40] = 24, -+ [0][0][RTW89_FCC][42] = 70, -+ [0][0][RTW89_ETSI][42] = 28, -+ [0][0][RTW89_MKK][42] = 127, -+ [0][0][RTW89_IC][42] = 70, -+ [0][0][RTW89_KCC][42] = 44, -+ [0][0][RTW89_ACMA][42] = 84, -+ [0][0][RTW89_CN][42] = 54, -+ [0][0][RTW89_UK][42] = 24, -+ [0][0][RTW89_FCC][44] = 62, -+ [0][0][RTW89_ETSI][44] = 28, -+ [0][0][RTW89_MKK][44] = 127, -+ [0][0][RTW89_IC][44] = 62, -+ [0][0][RTW89_KCC][44] = 44, -+ [0][0][RTW89_ACMA][44] = 84, -+ [0][0][RTW89_CN][44] = 54, -+ [0][0][RTW89_UK][44] = 24, -+ [0][0][RTW89_FCC][46] = 62, -+ [0][0][RTW89_ETSI][46] = 28, -+ [0][0][RTW89_MKK][46] = 127, -+ [0][0][RTW89_IC][46] = 62, -+ [0][0][RTW89_KCC][46] = 44, -+ [0][0][RTW89_ACMA][46] = 84, -+ [0][0][RTW89_CN][46] = 54, -+ [0][0][RTW89_UK][46] = 24, -+ [0][0][RTW89_FCC][48] = 42, -+ [0][0][RTW89_ETSI][48] = 127, -+ [0][0][RTW89_MKK][48] = 127, -+ [0][0][RTW89_IC][48] = 127, -+ [0][0][RTW89_KCC][48] = 127, -+ [0][0][RTW89_ACMA][48] = 127, -+ [0][0][RTW89_CN][48] = 127, -+ [0][0][RTW89_UK][48] = 127, -+ [0][0][RTW89_FCC][50] = 42, -+ [0][0][RTW89_ETSI][50] = 127, -+ [0][0][RTW89_MKK][50] = 127, -+ [0][0][RTW89_IC][50] = 127, -+ [0][0][RTW89_KCC][50] = 127, -+ [0][0][RTW89_ACMA][50] = 127, -+ [0][0][RTW89_CN][50] = 127, -+ [0][0][RTW89_UK][50] = 127, -+ [0][0][RTW89_FCC][52] = 40, -+ [0][0][RTW89_ETSI][52] = 127, -+ [0][0][RTW89_MKK][52] = 127, -+ [0][0][RTW89_IC][52] = 127, -+ [0][0][RTW89_KCC][52] = 127, -+ [0][0][RTW89_ACMA][52] = 127, -+ [0][0][RTW89_CN][52] = 127, -+ [0][0][RTW89_UK][52] = 127, -+ [0][1][RTW89_FCC][0] = 127, -+ [0][1][RTW89_ETSI][0] = 127, -+ [0][1][RTW89_MKK][0] = 127, -+ [0][1][RTW89_IC][0] = 127, -+ [0][1][RTW89_KCC][0] = 127, -+ [0][1][RTW89_ACMA][0] = 127, -+ [0][1][RTW89_CN][0] = 4, -+ [0][1][RTW89_UK][0] = 127, -+ [0][1][RTW89_FCC][2] = 127, -+ [0][1][RTW89_ETSI][2] = 127, -+ [0][1][RTW89_MKK][2] = 127, -+ [0][1][RTW89_IC][2] = 127, -+ [0][1][RTW89_KCC][2] = 127, -+ [0][1][RTW89_ACMA][2] = 127, -+ [0][1][RTW89_CN][2] = 4, -+ [0][1][RTW89_UK][2] = 127, -+ [0][1][RTW89_FCC][4] = 127, -+ [0][1][RTW89_ETSI][4] = 127, -+ [0][1][RTW89_MKK][4] = 127, -+ [0][1][RTW89_IC][4] = 127, -+ [0][1][RTW89_KCC][4] = 127, -+ [0][1][RTW89_ACMA][4] = 127, -+ [0][1][RTW89_CN][4] = 4, -+ [0][1][RTW89_UK][4] = 127, -+ [0][1][RTW89_FCC][6] = 127, -+ [0][1][RTW89_ETSI][6] = 127, -+ [0][1][RTW89_MKK][6] = 127, -+ [0][1][RTW89_IC][6] = 127, -+ [0][1][RTW89_KCC][6] = 127, -+ [0][1][RTW89_ACMA][6] = 127, -+ [0][1][RTW89_CN][6] = 4, -+ [0][1][RTW89_UK][6] = 127, -+ [0][1][RTW89_FCC][8] = 127, -+ [0][1][RTW89_ETSI][8] = 127, -+ [0][1][RTW89_MKK][8] = 127, -+ [0][1][RTW89_IC][8] = 127, -+ [0][1][RTW89_KCC][8] = 127, -+ [0][1][RTW89_ACMA][8] = 127, -+ [0][1][RTW89_CN][8] = 4, -+ [0][1][RTW89_UK][8] = 127, -+ [0][1][RTW89_FCC][10] = 127, -+ [0][1][RTW89_ETSI][10] = 127, -+ [0][1][RTW89_MKK][10] = 127, -+ [0][1][RTW89_IC][10] = 127, -+ [0][1][RTW89_KCC][10] = 127, -+ [0][1][RTW89_ACMA][10] = 127, -+ [0][1][RTW89_CN][10] = 4, -+ [0][1][RTW89_UK][10] = 127, -+ [0][1][RTW89_FCC][12] = 127, -+ [0][1][RTW89_ETSI][12] = 127, -+ [0][1][RTW89_MKK][12] = 127, -+ [0][1][RTW89_IC][12] = 127, -+ [0][1][RTW89_KCC][12] = 127, -+ [0][1][RTW89_ACMA][12] = 127, -+ [0][1][RTW89_CN][12] = 4, -+ [0][1][RTW89_UK][12] = 127, -+ [0][1][RTW89_FCC][14] = 127, -+ [0][1][RTW89_ETSI][14] = 127, -+ [0][1][RTW89_MKK][14] = 127, -+ [0][1][RTW89_IC][14] = 127, -+ [0][1][RTW89_KCC][14] = 127, -+ [0][1][RTW89_ACMA][14] = 127, -+ [0][1][RTW89_CN][14] = 4, -+ [0][1][RTW89_UK][14] = 127, -+ [0][1][RTW89_FCC][15] = 127, -+ [0][1][RTW89_ETSI][15] = 127, -+ [0][1][RTW89_MKK][15] = 127, -+ [0][1][RTW89_IC][15] = 127, -+ [0][1][RTW89_KCC][15] = 127, -+ [0][1][RTW89_ACMA][15] = 127, -+ [0][1][RTW89_CN][15] = 127, -+ [0][1][RTW89_UK][15] = 127, -+ [0][1][RTW89_FCC][17] = 127, -+ [0][1][RTW89_ETSI][17] = 127, -+ [0][1][RTW89_MKK][17] = 127, -+ [0][1][RTW89_IC][17] = 127, -+ [0][1][RTW89_KCC][17] = 127, -+ [0][1][RTW89_ACMA][17] = 127, -+ [0][1][RTW89_CN][17] = 127, -+ [0][1][RTW89_UK][17] = 127, -+ [0][1][RTW89_FCC][19] = 127, -+ [0][1][RTW89_ETSI][19] = 127, -+ [0][1][RTW89_MKK][19] = 127, -+ [0][1][RTW89_IC][19] = 127, -+ [0][1][RTW89_KCC][19] = 127, -+ [0][1][RTW89_ACMA][19] = 127, -+ [0][1][RTW89_CN][19] = 127, -+ [0][1][RTW89_UK][19] = 127, -+ [0][1][RTW89_FCC][21] = 127, -+ [0][1][RTW89_ETSI][21] = 127, -+ [0][1][RTW89_MKK][21] = 127, -+ [0][1][RTW89_IC][21] = 127, -+ [0][1][RTW89_KCC][21] = 127, -+ [0][1][RTW89_ACMA][21] = 127, -+ [0][1][RTW89_CN][21] = 127, -+ [0][1][RTW89_UK][21] = 127, -+ [0][1][RTW89_FCC][23] = 127, -+ [0][1][RTW89_ETSI][23] = 127, -+ [0][1][RTW89_MKK][23] = 127, -+ [0][1][RTW89_IC][23] = 127, -+ [0][1][RTW89_KCC][23] = 127, -+ [0][1][RTW89_ACMA][23] = 127, -+ [0][1][RTW89_CN][23] = 127, -+ [0][1][RTW89_UK][23] = 127, -+ [0][1][RTW89_FCC][25] = 127, -+ [0][1][RTW89_ETSI][25] = 127, -+ [0][1][RTW89_MKK][25] = 127, -+ [0][1][RTW89_IC][25] = 127, -+ [0][1][RTW89_KCC][25] = 127, -+ [0][1][RTW89_ACMA][25] = 127, -+ [0][1][RTW89_CN][25] = 127, -+ [0][1][RTW89_UK][25] = 127, -+ [0][1][RTW89_FCC][27] = 127, -+ [0][1][RTW89_ETSI][27] = 127, -+ [0][1][RTW89_MKK][27] = 127, -+ [0][1][RTW89_IC][27] = 127, -+ [0][1][RTW89_KCC][27] = 127, -+ [0][1][RTW89_ACMA][27] = 127, -+ [0][1][RTW89_CN][27] = 127, -+ [0][1][RTW89_UK][27] = 127, -+ [0][1][RTW89_FCC][29] = 127, -+ [0][1][RTW89_ETSI][29] = 127, -+ [0][1][RTW89_MKK][29] = 127, -+ [0][1][RTW89_IC][29] = 127, -+ [0][1][RTW89_KCC][29] = 127, -+ [0][1][RTW89_ACMA][29] = 127, -+ [0][1][RTW89_CN][29] = 127, -+ [0][1][RTW89_UK][29] = 127, -+ [0][1][RTW89_FCC][31] = 127, -+ [0][1][RTW89_ETSI][31] = 127, -+ [0][1][RTW89_MKK][31] = 127, -+ [0][1][RTW89_IC][31] = 127, -+ [0][1][RTW89_KCC][31] = 127, -+ [0][1][RTW89_ACMA][31] = 127, -+ [0][1][RTW89_CN][31] = 127, -+ [0][1][RTW89_UK][31] = 127, -+ [0][1][RTW89_FCC][33] = 127, -+ [0][1][RTW89_ETSI][33] = 127, -+ [0][1][RTW89_MKK][33] = 127, -+ [0][1][RTW89_IC][33] = 127, -+ [0][1][RTW89_KCC][33] = 127, -+ [0][1][RTW89_ACMA][33] = 127, -+ [0][1][RTW89_CN][33] = 127, -+ [0][1][RTW89_UK][33] = 127, -+ [0][1][RTW89_FCC][35] = 127, -+ [0][1][RTW89_ETSI][35] = 127, -+ [0][1][RTW89_MKK][35] = 127, -+ [0][1][RTW89_IC][35] = 127, -+ [0][1][RTW89_KCC][35] = 127, -+ [0][1][RTW89_ACMA][35] = 127, -+ [0][1][RTW89_CN][35] = 127, -+ [0][1][RTW89_UK][35] = 127, -+ [0][1][RTW89_FCC][37] = 127, -+ [0][1][RTW89_ETSI][37] = 127, -+ [0][1][RTW89_MKK][37] = 127, -+ [0][1][RTW89_IC][37] = 127, -+ [0][1][RTW89_KCC][37] = 127, -+ [0][1][RTW89_ACMA][37] = 127, -+ [0][1][RTW89_CN][37] = 127, -+ [0][1][RTW89_UK][37] = 127, -+ [0][1][RTW89_FCC][38] = 127, -+ [0][1][RTW89_ETSI][38] = 127, -+ [0][1][RTW89_MKK][38] = 127, -+ [0][1][RTW89_IC][38] = 127, -+ [0][1][RTW89_KCC][38] = 127, -+ [0][1][RTW89_ACMA][38] = 127, -+ [0][1][RTW89_CN][38] = 42, -+ [0][1][RTW89_UK][38] = 127, -+ [0][1][RTW89_FCC][40] = 127, -+ [0][1][RTW89_ETSI][40] = 127, -+ [0][1][RTW89_MKK][40] = 127, -+ [0][1][RTW89_IC][40] = 127, -+ [0][1][RTW89_KCC][40] = 127, -+ [0][1][RTW89_ACMA][40] = 127, -+ [0][1][RTW89_CN][40] = 42, -+ [0][1][RTW89_UK][40] = 127, -+ [0][1][RTW89_FCC][42] = 127, -+ [0][1][RTW89_ETSI][42] = 127, -+ [0][1][RTW89_MKK][42] = 127, -+ [0][1][RTW89_IC][42] = 127, -+ [0][1][RTW89_KCC][42] = 127, -+ [0][1][RTW89_ACMA][42] = 127, -+ [0][1][RTW89_CN][42] = 42, -+ [0][1][RTW89_UK][42] = 127, -+ [0][1][RTW89_FCC][44] = 127, -+ [0][1][RTW89_ETSI][44] = 127, -+ [0][1][RTW89_MKK][44] = 127, -+ [0][1][RTW89_IC][44] = 127, -+ [0][1][RTW89_KCC][44] = 127, -+ [0][1][RTW89_ACMA][44] = 127, -+ [0][1][RTW89_CN][44] = 42, -+ [0][1][RTW89_UK][44] = 127, -+ [0][1][RTW89_FCC][46] = 127, -+ [0][1][RTW89_ETSI][46] = 127, -+ [0][1][RTW89_MKK][46] = 127, -+ [0][1][RTW89_IC][46] = 127, -+ [0][1][RTW89_KCC][46] = 127, -+ [0][1][RTW89_ACMA][46] = 127, -+ [0][1][RTW89_CN][46] = 42, -+ [0][1][RTW89_UK][46] = 127, -+ [0][1][RTW89_FCC][48] = 127, -+ [0][1][RTW89_ETSI][48] = 127, -+ [0][1][RTW89_MKK][48] = 127, -+ [0][1][RTW89_IC][48] = 127, -+ [0][1][RTW89_KCC][48] = 127, -+ [0][1][RTW89_ACMA][48] = 127, -+ [0][1][RTW89_CN][48] = 127, -+ [0][1][RTW89_UK][48] = 127, -+ [0][1][RTW89_FCC][50] = 127, -+ [0][1][RTW89_ETSI][50] = 127, -+ [0][1][RTW89_MKK][50] = 127, -+ [0][1][RTW89_IC][50] = 127, -+ [0][1][RTW89_KCC][50] = 127, -+ [0][1][RTW89_ACMA][50] = 127, -+ [0][1][RTW89_CN][50] = 127, -+ [0][1][RTW89_UK][50] = 127, -+ [0][1][RTW89_FCC][52] = 127, -+ [0][1][RTW89_ETSI][52] = 127, -+ [0][1][RTW89_MKK][52] = 127, -+ [0][1][RTW89_IC][52] = 127, -+ [0][1][RTW89_KCC][52] = 127, -+ [0][1][RTW89_ACMA][52] = 127, -+ [0][1][RTW89_CN][52] = 127, -+ [0][1][RTW89_UK][52] = 127, -+ [1][0][RTW89_FCC][0] = 64, -+ [1][0][RTW89_ETSI][0] = 34, -+ [1][0][RTW89_MKK][0] = 38, -+ [1][0][RTW89_IC][0] = 38, -+ [1][0][RTW89_KCC][0] = 52, -+ [1][0][RTW89_ACMA][0] = 34, -+ [1][0][RTW89_CN][0] = 26, -+ [1][0][RTW89_UK][0] = 34, -+ [1][0][RTW89_FCC][2] = 66, -+ [1][0][RTW89_ETSI][2] = 34, -+ [1][0][RTW89_MKK][2] = 38, -+ [1][0][RTW89_IC][2] = 38, -+ [1][0][RTW89_KCC][2] = 52, -+ [1][0][RTW89_ACMA][2] = 34, -+ [1][0][RTW89_CN][2] = 26, -+ [1][0][RTW89_UK][2] = 34, -+ [1][0][RTW89_FCC][4] = 62, -+ [1][0][RTW89_ETSI][4] = 34, -+ [1][0][RTW89_MKK][4] = 36, -+ [1][0][RTW89_IC][4] = 38, -+ [1][0][RTW89_KCC][4] = 52, -+ [1][0][RTW89_ACMA][4] = 34, -+ [1][0][RTW89_CN][4] = 26, -+ [1][0][RTW89_UK][4] = 34, -+ [1][0][RTW89_FCC][6] = 62, -+ [1][0][RTW89_ETSI][6] = 34, -+ [1][0][RTW89_MKK][6] = 36, -+ [1][0][RTW89_IC][6] = 38, -+ [1][0][RTW89_KCC][6] = 32, -+ [1][0][RTW89_ACMA][6] = 34, -+ [1][0][RTW89_CN][6] = 26, -+ [1][0][RTW89_UK][6] = 34, -+ [1][0][RTW89_FCC][8] = 62, -+ [1][0][RTW89_ETSI][8] = 34, -+ [1][0][RTW89_MKK][8] = 38, -+ [1][0][RTW89_IC][8] = 62, -+ [1][0][RTW89_KCC][8] = 52, -+ [1][0][RTW89_ACMA][8] = 34, -+ [1][0][RTW89_CN][8] = 26, -+ [1][0][RTW89_UK][8] = 34, -+ [1][0][RTW89_FCC][10] = 62, -+ [1][0][RTW89_ETSI][10] = 34, -+ [1][0][RTW89_MKK][10] = 38, -+ [1][0][RTW89_IC][10] = 62, -+ [1][0][RTW89_KCC][10] = 52, -+ [1][0][RTW89_ACMA][10] = 34, -+ [1][0][RTW89_CN][10] = 26, -+ [1][0][RTW89_UK][10] = 34, -+ [1][0][RTW89_FCC][12] = 62, -+ [1][0][RTW89_ETSI][12] = 34, -+ [1][0][RTW89_MKK][12] = 38, -+ [1][0][RTW89_IC][12] = 62, -+ [1][0][RTW89_KCC][12] = 54, -+ [1][0][RTW89_ACMA][12] = 34, -+ [1][0][RTW89_CN][12] = 26, -+ [1][0][RTW89_UK][12] = 34, -+ [1][0][RTW89_FCC][14] = 64, -+ [1][0][RTW89_ETSI][14] = 34, -+ [1][0][RTW89_MKK][14] = 38, -+ [1][0][RTW89_IC][14] = 64, -+ [1][0][RTW89_KCC][14] = 54, -+ [1][0][RTW89_ACMA][14] = 34, -+ [1][0][RTW89_CN][14] = 26, -+ [1][0][RTW89_UK][14] = 34, -+ [1][0][RTW89_FCC][15] = 62, -+ [1][0][RTW89_ETSI][15] = 34, -+ [1][0][RTW89_MKK][15] = 58, -+ [1][0][RTW89_IC][15] = 62, -+ [1][0][RTW89_KCC][15] = 54, -+ [1][0][RTW89_ACMA][15] = 34, -+ [1][0][RTW89_CN][15] = 127, -+ [1][0][RTW89_UK][15] = 34, -+ [1][0][RTW89_FCC][17] = 62, -+ [1][0][RTW89_ETSI][17] = 34, -+ [1][0][RTW89_MKK][17] = 58, -+ [1][0][RTW89_IC][17] = 62, -+ [1][0][RTW89_KCC][17] = 54, -+ [1][0][RTW89_ACMA][17] = 34, -+ [1][0][RTW89_CN][17] = 127, -+ [1][0][RTW89_UK][17] = 34, -+ [1][0][RTW89_FCC][19] = 64, -+ [1][0][RTW89_ETSI][19] = 34, -+ [1][0][RTW89_MKK][19] = 58, -+ [1][0][RTW89_IC][19] = 64, -+ [1][0][RTW89_KCC][19] = 54, -+ [1][0][RTW89_ACMA][19] = 34, -+ [1][0][RTW89_CN][19] = 127, -+ [1][0][RTW89_UK][19] = 34, -+ [1][0][RTW89_FCC][21] = 64, -+ [1][0][RTW89_ETSI][21] = 34, -+ [1][0][RTW89_MKK][21] = 58, -+ [1][0][RTW89_IC][21] = 64, -+ [1][0][RTW89_KCC][21] = 54, -+ [1][0][RTW89_ACMA][21] = 34, -+ [1][0][RTW89_CN][21] = 127, -+ [1][0][RTW89_UK][21] = 34, -+ [1][0][RTW89_FCC][23] = 64, -+ [1][0][RTW89_ETSI][23] = 34, -+ [1][0][RTW89_MKK][23] = 58, -+ [1][0][RTW89_IC][23] = 64, -+ [1][0][RTW89_KCC][23] = 54, -+ [1][0][RTW89_ACMA][23] = 34, -+ [1][0][RTW89_CN][23] = 127, -+ [1][0][RTW89_UK][23] = 34, -+ [1][0][RTW89_FCC][25] = 64, -+ [1][0][RTW89_ETSI][25] = 34, -+ [1][0][RTW89_MKK][25] = 58, -+ [1][0][RTW89_IC][25] = 127, -+ [1][0][RTW89_KCC][25] = 54, -+ [1][0][RTW89_ACMA][25] = 127, -+ [1][0][RTW89_CN][25] = 127, -+ [1][0][RTW89_UK][25] = 34, -+ [1][0][RTW89_FCC][27] = 64, -+ [1][0][RTW89_ETSI][27] = 34, -+ [1][0][RTW89_MKK][27] = 58, -+ [1][0][RTW89_IC][27] = 127, -+ [1][0][RTW89_KCC][27] = 54, -+ [1][0][RTW89_ACMA][27] = 127, -+ [1][0][RTW89_CN][27] = 127, -+ [1][0][RTW89_UK][27] = 34, -+ [1][0][RTW89_FCC][29] = 64, -+ [1][0][RTW89_ETSI][29] = 34, -+ [1][0][RTW89_MKK][29] = 58, -+ [1][0][RTW89_IC][29] = 127, -+ [1][0][RTW89_KCC][29] = 54, -+ [1][0][RTW89_ACMA][29] = 127, -+ [1][0][RTW89_CN][29] = 127, -+ [1][0][RTW89_UK][29] = 34, -+ [1][0][RTW89_FCC][31] = 64, -+ [1][0][RTW89_ETSI][31] = 34, -+ [1][0][RTW89_MKK][31] = 58, -+ [1][0][RTW89_IC][31] = 64, -+ [1][0][RTW89_KCC][31] = 54, -+ [1][0][RTW89_ACMA][31] = 34, -+ [1][0][RTW89_CN][31] = 127, -+ [1][0][RTW89_UK][31] = 34, -+ [1][0][RTW89_FCC][33] = 64, -+ [1][0][RTW89_ETSI][33] = 34, -+ [1][0][RTW89_MKK][33] = 58, -+ [1][0][RTW89_IC][33] = 64, -+ [1][0][RTW89_KCC][33] = 54, -+ [1][0][RTW89_ACMA][33] = 34, -+ [1][0][RTW89_CN][33] = 127, -+ [1][0][RTW89_UK][33] = 34, -+ [1][0][RTW89_FCC][35] = 64, -+ [1][0][RTW89_ETSI][35] = 34, -+ [1][0][RTW89_MKK][35] = 58, -+ [1][0][RTW89_IC][35] = 64, -+ [1][0][RTW89_KCC][35] = 54, -+ [1][0][RTW89_ACMA][35] = 34, -+ [1][0][RTW89_CN][35] = 127, -+ [1][0][RTW89_UK][35] = 34, -+ [1][0][RTW89_FCC][37] = 78, -+ [1][0][RTW89_ETSI][37] = 127, -+ [1][0][RTW89_MKK][37] = 56, -+ [1][0][RTW89_IC][37] = 78, -+ [1][0][RTW89_KCC][37] = 54, -+ [1][0][RTW89_ACMA][37] = 62, -+ [1][0][RTW89_CN][37] = 127, -+ [1][0][RTW89_UK][37] = 62, -+ [1][0][RTW89_FCC][38] = 82, -+ [1][0][RTW89_ETSI][38] = 28, -+ [1][0][RTW89_MKK][38] = 127, -+ [1][0][RTW89_IC][38] = 82, -+ [1][0][RTW89_KCC][38] = 54, -+ [1][0][RTW89_ACMA][38] = 84, -+ [1][0][RTW89_CN][38] = 66, -+ [1][0][RTW89_UK][38] = 34, -+ [1][0][RTW89_FCC][40] = 82, -+ [1][0][RTW89_ETSI][40] = 28, -+ [1][0][RTW89_MKK][40] = 127, -+ [1][0][RTW89_IC][40] = 82, -+ [1][0][RTW89_KCC][40] = 54, -+ [1][0][RTW89_ACMA][40] = 84, -+ [1][0][RTW89_CN][40] = 66, -+ [1][0][RTW89_UK][40] = 34, -+ [1][0][RTW89_FCC][42] = 78, -+ [1][0][RTW89_ETSI][42] = 28, -+ [1][0][RTW89_MKK][42] = 127, -+ [1][0][RTW89_IC][42] = 78, -+ [1][0][RTW89_KCC][42] = 54, -+ [1][0][RTW89_ACMA][42] = 84, -+ [1][0][RTW89_CN][42] = 66, -+ [1][0][RTW89_UK][42] = 34, -+ [1][0][RTW89_FCC][44] = 82, -+ [1][0][RTW89_ETSI][44] = 28, -+ [1][0][RTW89_MKK][44] = 127, -+ [1][0][RTW89_IC][44] = 82, -+ [1][0][RTW89_KCC][44] = 54, -+ [1][0][RTW89_ACMA][44] = 84, -+ [1][0][RTW89_CN][44] = 66, -+ [1][0][RTW89_UK][44] = 34, -+ [1][0][RTW89_FCC][46] = 82, -+ [1][0][RTW89_ETSI][46] = 28, -+ [1][0][RTW89_MKK][46] = 127, -+ [1][0][RTW89_IC][46] = 82, -+ [1][0][RTW89_KCC][46] = 54, -+ [1][0][RTW89_ACMA][46] = 84, -+ [1][0][RTW89_CN][46] = 66, -+ [1][0][RTW89_UK][46] = 34, -+ [1][0][RTW89_FCC][48] = 52, -+ [1][0][RTW89_ETSI][48] = 127, -+ [1][0][RTW89_MKK][48] = 127, -+ [1][0][RTW89_IC][48] = 127, -+ [1][0][RTW89_KCC][48] = 127, -+ [1][0][RTW89_ACMA][48] = 127, -+ [1][0][RTW89_CN][48] = 127, -+ [1][0][RTW89_UK][48] = 127, -+ [1][0][RTW89_FCC][50] = 52, -+ [1][0][RTW89_ETSI][50] = 127, -+ [1][0][RTW89_MKK][50] = 127, -+ [1][0][RTW89_IC][50] = 127, -+ [1][0][RTW89_KCC][50] = 127, -+ [1][0][RTW89_ACMA][50] = 127, -+ [1][0][RTW89_CN][50] = 127, -+ [1][0][RTW89_UK][50] = 127, -+ [1][0][RTW89_FCC][52] = 52, -+ [1][0][RTW89_ETSI][52] = 127, -+ [1][0][RTW89_MKK][52] = 127, -+ [1][0][RTW89_IC][52] = 127, -+ [1][0][RTW89_KCC][52] = 127, -+ [1][0][RTW89_ACMA][52] = 127, -+ [1][0][RTW89_CN][52] = 127, -+ [1][0][RTW89_UK][52] = 127, -+ [1][1][RTW89_FCC][0] = 127, -+ [1][1][RTW89_ETSI][0] = 127, -+ [1][1][RTW89_MKK][0] = 127, -+ [1][1][RTW89_IC][0] = 127, -+ [1][1][RTW89_KCC][0] = 127, -+ [1][1][RTW89_ACMA][0] = 127, -+ [1][1][RTW89_CN][0] = 14, -+ [1][1][RTW89_UK][0] = 127, -+ [1][1][RTW89_FCC][2] = 127, -+ [1][1][RTW89_ETSI][2] = 127, -+ [1][1][RTW89_MKK][2] = 127, -+ [1][1][RTW89_IC][2] = 127, -+ [1][1][RTW89_KCC][2] = 127, -+ [1][1][RTW89_ACMA][2] = 127, -+ [1][1][RTW89_CN][2] = 14, -+ [1][1][RTW89_UK][2] = 127, -+ [1][1][RTW89_FCC][4] = 127, -+ [1][1][RTW89_ETSI][4] = 127, -+ [1][1][RTW89_MKK][4] = 127, -+ [1][1][RTW89_IC][4] = 127, -+ [1][1][RTW89_KCC][4] = 127, -+ [1][1][RTW89_ACMA][4] = 127, -+ [1][1][RTW89_CN][4] = 14, -+ [1][1][RTW89_UK][4] = 127, -+ [1][1][RTW89_FCC][6] = 127, -+ [1][1][RTW89_ETSI][6] = 127, -+ [1][1][RTW89_MKK][6] = 127, -+ [1][1][RTW89_IC][6] = 127, -+ [1][1][RTW89_KCC][6] = 127, -+ [1][1][RTW89_ACMA][6] = 127, -+ [1][1][RTW89_CN][6] = 14, -+ [1][1][RTW89_UK][6] = 127, -+ [1][1][RTW89_FCC][8] = 127, -+ [1][1][RTW89_ETSI][8] = 127, -+ [1][1][RTW89_MKK][8] = 127, -+ [1][1][RTW89_IC][8] = 127, -+ [1][1][RTW89_KCC][8] = 127, -+ [1][1][RTW89_ACMA][8] = 127, -+ [1][1][RTW89_CN][8] = 14, -+ [1][1][RTW89_UK][8] = 127, -+ [1][1][RTW89_FCC][10] = 127, -+ [1][1][RTW89_ETSI][10] = 127, -+ [1][1][RTW89_MKK][10] = 127, -+ [1][1][RTW89_IC][10] = 127, -+ [1][1][RTW89_KCC][10] = 127, -+ [1][1][RTW89_ACMA][10] = 127, -+ [1][1][RTW89_CN][10] = 14, -+ [1][1][RTW89_UK][10] = 127, -+ [1][1][RTW89_FCC][12] = 127, -+ [1][1][RTW89_ETSI][12] = 127, -+ [1][1][RTW89_MKK][12] = 127, -+ [1][1][RTW89_IC][12] = 127, -+ [1][1][RTW89_KCC][12] = 127, -+ [1][1][RTW89_ACMA][12] = 127, -+ [1][1][RTW89_CN][12] = 14, -+ [1][1][RTW89_UK][12] = 127, -+ [1][1][RTW89_FCC][14] = 127, -+ [1][1][RTW89_ETSI][14] = 127, -+ [1][1][RTW89_MKK][14] = 127, -+ [1][1][RTW89_IC][14] = 127, -+ [1][1][RTW89_KCC][14] = 127, -+ [1][1][RTW89_ACMA][14] = 127, -+ [1][1][RTW89_CN][14] = 14, -+ [1][1][RTW89_UK][14] = 127, -+ [1][1][RTW89_FCC][15] = 127, -+ [1][1][RTW89_ETSI][15] = 127, -+ [1][1][RTW89_MKK][15] = 127, -+ [1][1][RTW89_IC][15] = 127, -+ [1][1][RTW89_KCC][15] = 127, -+ [1][1][RTW89_ACMA][15] = 127, -+ [1][1][RTW89_CN][15] = 127, -+ [1][1][RTW89_UK][15] = 127, -+ [1][1][RTW89_FCC][17] = 127, -+ [1][1][RTW89_ETSI][17] = 127, -+ [1][1][RTW89_MKK][17] = 127, -+ [1][1][RTW89_IC][17] = 127, -+ [1][1][RTW89_KCC][17] = 127, -+ [1][1][RTW89_ACMA][17] = 127, -+ [1][1][RTW89_CN][17] = 127, -+ [1][1][RTW89_UK][17] = 127, -+ [1][1][RTW89_FCC][19] = 127, -+ [1][1][RTW89_ETSI][19] = 127, -+ [1][1][RTW89_MKK][19] = 127, -+ [1][1][RTW89_IC][19] = 127, -+ [1][1][RTW89_KCC][19] = 127, -+ [1][1][RTW89_ACMA][19] = 127, -+ [1][1][RTW89_CN][19] = 127, -+ [1][1][RTW89_UK][19] = 127, -+ [1][1][RTW89_FCC][21] = 127, -+ [1][1][RTW89_ETSI][21] = 127, -+ [1][1][RTW89_MKK][21] = 127, -+ [1][1][RTW89_IC][21] = 127, -+ [1][1][RTW89_KCC][21] = 127, -+ [1][1][RTW89_ACMA][21] = 127, -+ [1][1][RTW89_CN][21] = 127, -+ [1][1][RTW89_UK][21] = 127, -+ [1][1][RTW89_FCC][23] = 127, -+ [1][1][RTW89_ETSI][23] = 127, -+ [1][1][RTW89_MKK][23] = 127, -+ [1][1][RTW89_IC][23] = 127, -+ [1][1][RTW89_KCC][23] = 127, -+ [1][1][RTW89_ACMA][23] = 127, -+ [1][1][RTW89_CN][23] = 127, -+ [1][1][RTW89_UK][23] = 127, -+ [1][1][RTW89_FCC][25] = 127, -+ [1][1][RTW89_ETSI][25] = 127, -+ [1][1][RTW89_MKK][25] = 127, -+ [1][1][RTW89_IC][25] = 127, -+ [1][1][RTW89_KCC][25] = 127, -+ [1][1][RTW89_ACMA][25] = 127, -+ [1][1][RTW89_CN][25] = 127, -+ [1][1][RTW89_UK][25] = 127, -+ [1][1][RTW89_FCC][27] = 127, -+ [1][1][RTW89_ETSI][27] = 127, -+ [1][1][RTW89_MKK][27] = 127, -+ [1][1][RTW89_IC][27] = 127, -+ [1][1][RTW89_KCC][27] = 127, -+ [1][1][RTW89_ACMA][27] = 127, -+ [1][1][RTW89_CN][27] = 127, -+ [1][1][RTW89_UK][27] = 127, -+ [1][1][RTW89_FCC][29] = 127, -+ [1][1][RTW89_ETSI][29] = 127, -+ [1][1][RTW89_MKK][29] = 127, -+ [1][1][RTW89_IC][29] = 127, -+ [1][1][RTW89_KCC][29] = 127, -+ [1][1][RTW89_ACMA][29] = 127, -+ [1][1][RTW89_CN][29] = 127, -+ [1][1][RTW89_UK][29] = 127, -+ [1][1][RTW89_FCC][31] = 127, -+ [1][1][RTW89_ETSI][31] = 127, -+ [1][1][RTW89_MKK][31] = 127, -+ [1][1][RTW89_IC][31] = 127, -+ [1][1][RTW89_KCC][31] = 127, -+ [1][1][RTW89_ACMA][31] = 127, -+ [1][1][RTW89_CN][31] = 127, -+ [1][1][RTW89_UK][31] = 127, -+ [1][1][RTW89_FCC][33] = 127, -+ [1][1][RTW89_ETSI][33] = 127, -+ [1][1][RTW89_MKK][33] = 127, -+ [1][1][RTW89_IC][33] = 127, -+ [1][1][RTW89_KCC][33] = 127, -+ [1][1][RTW89_ACMA][33] = 127, -+ [1][1][RTW89_CN][33] = 127, -+ [1][1][RTW89_UK][33] = 127, -+ [1][1][RTW89_FCC][35] = 127, -+ [1][1][RTW89_ETSI][35] = 127, -+ [1][1][RTW89_MKK][35] = 127, -+ [1][1][RTW89_IC][35] = 127, -+ [1][1][RTW89_KCC][35] = 127, -+ [1][1][RTW89_ACMA][35] = 127, -+ [1][1][RTW89_CN][35] = 127, -+ [1][1][RTW89_UK][35] = 127, -+ [1][1][RTW89_FCC][37] = 127, -+ [1][1][RTW89_ETSI][37] = 127, -+ [1][1][RTW89_MKK][37] = 127, -+ [1][1][RTW89_IC][37] = 127, -+ [1][1][RTW89_KCC][37] = 127, -+ [1][1][RTW89_ACMA][37] = 127, -+ [1][1][RTW89_CN][37] = 127, -+ [1][1][RTW89_UK][37] = 127, -+ [1][1][RTW89_FCC][38] = 127, -+ [1][1][RTW89_ETSI][38] = 127, -+ [1][1][RTW89_MKK][38] = 127, -+ [1][1][RTW89_IC][38] = 127, -+ [1][1][RTW89_KCC][38] = 127, -+ [1][1][RTW89_ACMA][38] = 127, -+ [1][1][RTW89_CN][38] = 54, -+ [1][1][RTW89_UK][38] = 127, -+ [1][1][RTW89_FCC][40] = 127, -+ [1][1][RTW89_ETSI][40] = 127, -+ [1][1][RTW89_MKK][40] = 127, -+ [1][1][RTW89_IC][40] = 127, -+ [1][1][RTW89_KCC][40] = 127, -+ [1][1][RTW89_ACMA][40] = 127, -+ [1][1][RTW89_CN][40] = 54, -+ [1][1][RTW89_UK][40] = 127, -+ [1][1][RTW89_FCC][42] = 127, -+ [1][1][RTW89_ETSI][42] = 127, -+ [1][1][RTW89_MKK][42] = 127, -+ [1][1][RTW89_IC][42] = 127, -+ [1][1][RTW89_KCC][42] = 127, -+ [1][1][RTW89_ACMA][42] = 127, -+ [1][1][RTW89_CN][42] = 54, -+ [1][1][RTW89_UK][42] = 127, -+ [1][1][RTW89_FCC][44] = 127, -+ [1][1][RTW89_ETSI][44] = 127, -+ [1][1][RTW89_MKK][44] = 127, -+ [1][1][RTW89_IC][44] = 127, -+ [1][1][RTW89_KCC][44] = 127, -+ [1][1][RTW89_ACMA][44] = 127, -+ [1][1][RTW89_CN][44] = 54, -+ [1][1][RTW89_UK][44] = 127, -+ [1][1][RTW89_FCC][46] = 127, -+ [1][1][RTW89_ETSI][46] = 127, -+ [1][1][RTW89_MKK][46] = 127, -+ [1][1][RTW89_IC][46] = 127, -+ [1][1][RTW89_KCC][46] = 127, -+ [1][1][RTW89_ACMA][46] = 127, -+ [1][1][RTW89_CN][46] = 54, -+ [1][1][RTW89_UK][46] = 127, -+ [1][1][RTW89_FCC][48] = 127, -+ [1][1][RTW89_ETSI][48] = 127, -+ [1][1][RTW89_MKK][48] = 127, -+ [1][1][RTW89_IC][48] = 127, -+ [1][1][RTW89_KCC][48] = 127, -+ [1][1][RTW89_ACMA][48] = 127, -+ [1][1][RTW89_CN][48] = 127, -+ [1][1][RTW89_UK][48] = 127, -+ [1][1][RTW89_FCC][50] = 127, -+ [1][1][RTW89_ETSI][50] = 127, -+ [1][1][RTW89_MKK][50] = 127, -+ [1][1][RTW89_IC][50] = 127, -+ [1][1][RTW89_KCC][50] = 127, -+ [1][1][RTW89_ACMA][50] = 127, -+ [1][1][RTW89_CN][50] = 127, -+ [1][1][RTW89_UK][50] = 127, -+ [1][1][RTW89_FCC][52] = 127, -+ [1][1][RTW89_ETSI][52] = 127, -+ [1][1][RTW89_MKK][52] = 127, -+ [1][1][RTW89_IC][52] = 127, -+ [1][1][RTW89_KCC][52] = 127, -+ [1][1][RTW89_ACMA][52] = 127, -+ [1][1][RTW89_CN][52] = 127, -+ [1][1][RTW89_UK][52] = 127, -+ [2][0][RTW89_FCC][0] = 78, -+ [2][0][RTW89_ETSI][0] = 46, -+ [2][0][RTW89_MKK][0] = 48, -+ [2][0][RTW89_IC][0] = 50, -+ [2][0][RTW89_KCC][0] = 64, -+ [2][0][RTW89_ACMA][0] = 46, -+ [2][0][RTW89_CN][0] = 40, -+ [2][0][RTW89_UK][0] = 46, -+ [2][0][RTW89_FCC][2] = 74, -+ [2][0][RTW89_ETSI][2] = 46, -+ [2][0][RTW89_MKK][2] = 48, -+ [2][0][RTW89_IC][2] = 48, -+ [2][0][RTW89_KCC][2] = 64, -+ [2][0][RTW89_ACMA][2] = 46, -+ [2][0][RTW89_CN][2] = 40, -+ [2][0][RTW89_UK][2] = 46, -+ [2][0][RTW89_FCC][4] = 74, -+ [2][0][RTW89_ETSI][4] = 46, -+ [2][0][RTW89_MKK][4] = 48, -+ [2][0][RTW89_IC][4] = 48, -+ [2][0][RTW89_KCC][4] = 64, -+ [2][0][RTW89_ACMA][4] = 46, -+ [2][0][RTW89_CN][4] = 40, -+ [2][0][RTW89_UK][4] = 46, -+ [2][0][RTW89_FCC][6] = 74, -+ [2][0][RTW89_ETSI][6] = 46, -+ [2][0][RTW89_MKK][6] = 48, -+ [2][0][RTW89_IC][6] = 48, -+ [2][0][RTW89_KCC][6] = 40, -+ [2][0][RTW89_ACMA][6] = 46, -+ [2][0][RTW89_CN][6] = 40, -+ [2][0][RTW89_UK][6] = 46, -+ [2][0][RTW89_FCC][8] = 74, -+ [2][0][RTW89_ETSI][8] = 46, -+ [2][0][RTW89_MKK][8] = 48, -+ [2][0][RTW89_IC][8] = 64, -+ [2][0][RTW89_KCC][8] = 66, -+ [2][0][RTW89_ACMA][8] = 46, -+ [2][0][RTW89_CN][8] = 40, -+ [2][0][RTW89_UK][8] = 46, -+ [2][0][RTW89_FCC][10] = 74, -+ [2][0][RTW89_ETSI][10] = 46, -+ [2][0][RTW89_MKK][10] = 48, -+ [2][0][RTW89_IC][10] = 64, -+ [2][0][RTW89_KCC][10] = 66, -+ [2][0][RTW89_ACMA][10] = 46, -+ [2][0][RTW89_CN][10] = 40, -+ [2][0][RTW89_UK][10] = 46, -+ [2][0][RTW89_FCC][12] = 74, -+ [2][0][RTW89_ETSI][12] = 46, -+ [2][0][RTW89_MKK][12] = 48, -+ [2][0][RTW89_IC][12] = 64, -+ [2][0][RTW89_KCC][12] = 64, -+ [2][0][RTW89_ACMA][12] = 46, -+ [2][0][RTW89_CN][12] = 40, -+ [2][0][RTW89_UK][12] = 46, -+ [2][0][RTW89_FCC][14] = 80, -+ [2][0][RTW89_ETSI][14] = 46, -+ [2][0][RTW89_MKK][14] = 48, -+ [2][0][RTW89_IC][14] = 64, -+ [2][0][RTW89_KCC][14] = 64, -+ [2][0][RTW89_ACMA][14] = 46, -+ [2][0][RTW89_CN][14] = 40, -+ [2][0][RTW89_UK][14] = 46, -+ [2][0][RTW89_FCC][15] = 72, -+ [2][0][RTW89_ETSI][15] = 46, -+ [2][0][RTW89_MKK][15] = 70, -+ [2][0][RTW89_IC][15] = 72, -+ [2][0][RTW89_KCC][15] = 66, -+ [2][0][RTW89_ACMA][15] = 46, -+ [2][0][RTW89_CN][15] = 127, -+ [2][0][RTW89_UK][15] = 46, -+ [2][0][RTW89_FCC][17] = 72, -+ [2][0][RTW89_ETSI][17] = 46, -+ [2][0][RTW89_MKK][17] = 70, -+ [2][0][RTW89_IC][17] = 72, -+ [2][0][RTW89_KCC][17] = 66, -+ [2][0][RTW89_ACMA][17] = 46, -+ [2][0][RTW89_CN][17] = 127, -+ [2][0][RTW89_UK][17] = 46, -+ [2][0][RTW89_FCC][19] = 70, -+ [2][0][RTW89_ETSI][19] = 46, -+ [2][0][RTW89_MKK][19] = 70, -+ [2][0][RTW89_IC][19] = 70, -+ [2][0][RTW89_KCC][19] = 66, -+ [2][0][RTW89_ACMA][19] = 46, -+ [2][0][RTW89_CN][19] = 127, -+ [2][0][RTW89_UK][19] = 46, -+ [2][0][RTW89_FCC][21] = 70, -+ [2][0][RTW89_ETSI][21] = 46, -+ [2][0][RTW89_MKK][21] = 70, -+ [2][0][RTW89_IC][21] = 70, -+ [2][0][RTW89_KCC][21] = 66, -+ [2][0][RTW89_ACMA][21] = 46, -+ [2][0][RTW89_CN][21] = 127, -+ [2][0][RTW89_UK][21] = 46, -+ [2][0][RTW89_FCC][23] = 70, -+ [2][0][RTW89_ETSI][23] = 46, -+ [2][0][RTW89_MKK][23] = 70, -+ [2][0][RTW89_IC][23] = 70, -+ [2][0][RTW89_KCC][23] = 66, -+ [2][0][RTW89_ACMA][23] = 46, -+ [2][0][RTW89_CN][23] = 127, -+ [2][0][RTW89_UK][23] = 46, -+ [2][0][RTW89_FCC][25] = 70, -+ [2][0][RTW89_ETSI][25] = 46, -+ [2][0][RTW89_MKK][25] = 70, -+ [2][0][RTW89_IC][25] = 127, -+ [2][0][RTW89_KCC][25] = 66, -+ [2][0][RTW89_ACMA][25] = 127, -+ [2][0][RTW89_CN][25] = 127, -+ [2][0][RTW89_UK][25] = 46, -+ [2][0][RTW89_FCC][27] = 70, -+ [2][0][RTW89_ETSI][27] = 46, -+ [2][0][RTW89_MKK][27] = 70, -+ [2][0][RTW89_IC][27] = 127, -+ [2][0][RTW89_KCC][27] = 64, -+ [2][0][RTW89_ACMA][27] = 127, -+ [2][0][RTW89_CN][27] = 127, -+ [2][0][RTW89_UK][27] = 46, -+ [2][0][RTW89_FCC][29] = 70, -+ [2][0][RTW89_ETSI][29] = 46, -+ [2][0][RTW89_MKK][29] = 70, -+ [2][0][RTW89_IC][29] = 127, -+ [2][0][RTW89_KCC][29] = 64, -+ [2][0][RTW89_ACMA][29] = 127, -+ [2][0][RTW89_CN][29] = 127, -+ [2][0][RTW89_UK][29] = 46, -+ [2][0][RTW89_FCC][31] = 70, -+ [2][0][RTW89_ETSI][31] = 46, -+ [2][0][RTW89_MKK][31] = 70, -+ [2][0][RTW89_IC][31] = 70, -+ [2][0][RTW89_KCC][31] = 64, -+ [2][0][RTW89_ACMA][31] = 46, -+ [2][0][RTW89_CN][31] = 127, -+ [2][0][RTW89_UK][31] = 46, -+ [2][0][RTW89_FCC][33] = 70, -+ [2][0][RTW89_ETSI][33] = 46, -+ [2][0][RTW89_MKK][33] = 70, -+ [2][0][RTW89_IC][33] = 70, -+ [2][0][RTW89_KCC][33] = 64, -+ [2][0][RTW89_ACMA][33] = 46, -+ [2][0][RTW89_CN][33] = 127, -+ [2][0][RTW89_UK][33] = 46, -+ [2][0][RTW89_FCC][35] = 70, -+ [2][0][RTW89_ETSI][35] = 46, -+ [2][0][RTW89_MKK][35] = 70, -+ [2][0][RTW89_IC][35] = 70, -+ [2][0][RTW89_KCC][35] = 64, -+ [2][0][RTW89_ACMA][35] = 46, -+ [2][0][RTW89_CN][35] = 127, -+ [2][0][RTW89_UK][35] = 46, -+ [2][0][RTW89_FCC][37] = 84, -+ [2][0][RTW89_ETSI][37] = 127, -+ [2][0][RTW89_MKK][37] = 68, -+ [2][0][RTW89_IC][37] = 84, -+ [2][0][RTW89_KCC][37] = 66, -+ [2][0][RTW89_ACMA][37] = 74, -+ [2][0][RTW89_CN][37] = 127, -+ [2][0][RTW89_UK][37] = 74, -+ [2][0][RTW89_FCC][38] = 84, -+ [2][0][RTW89_ETSI][38] = 28, -+ [2][0][RTW89_MKK][38] = 127, -+ [2][0][RTW89_IC][38] = 84, -+ [2][0][RTW89_KCC][38] = 64, -+ [2][0][RTW89_ACMA][38] = 84, -+ [2][0][RTW89_CN][38] = 68, -+ [2][0][RTW89_UK][38] = 46, -+ [2][0][RTW89_FCC][40] = 84, -+ [2][0][RTW89_ETSI][40] = 28, -+ [2][0][RTW89_MKK][40] = 127, -+ [2][0][RTW89_IC][40] = 84, -+ [2][0][RTW89_KCC][40] = 64, -+ [2][0][RTW89_ACMA][40] = 84, -+ [2][0][RTW89_CN][40] = 68, -+ [2][0][RTW89_UK][40] = 46, -+ [2][0][RTW89_FCC][42] = 80, -+ [2][0][RTW89_ETSI][42] = 28, -+ [2][0][RTW89_MKK][42] = 127, -+ [2][0][RTW89_IC][42] = 80, -+ [2][0][RTW89_KCC][42] = 66, -+ [2][0][RTW89_ACMA][42] = 84, -+ [2][0][RTW89_CN][42] = 68, -+ [2][0][RTW89_UK][42] = 46, -+ [2][0][RTW89_FCC][44] = 82, -+ [2][0][RTW89_ETSI][44] = 28, -+ [2][0][RTW89_MKK][44] = 127, -+ [2][0][RTW89_IC][44] = 82, -+ [2][0][RTW89_KCC][44] = 66, -+ [2][0][RTW89_ACMA][44] = 84, -+ [2][0][RTW89_CN][44] = 68, -+ [2][0][RTW89_UK][44] = 46, -+ [2][0][RTW89_FCC][46] = 82, -+ [2][0][RTW89_ETSI][46] = 28, -+ [2][0][RTW89_MKK][46] = 127, -+ [2][0][RTW89_IC][46] = 82, -+ [2][0][RTW89_KCC][46] = 66, -+ [2][0][RTW89_ACMA][46] = 84, -+ [2][0][RTW89_CN][46] = 68, -+ [2][0][RTW89_UK][46] = 46, -+ [2][0][RTW89_FCC][48] = 64, -+ [2][0][RTW89_ETSI][48] = 127, -+ [2][0][RTW89_MKK][48] = 127, -+ [2][0][RTW89_IC][48] = 127, -+ [2][0][RTW89_KCC][48] = 127, -+ [2][0][RTW89_ACMA][48] = 127, -+ [2][0][RTW89_CN][48] = 127, -+ [2][0][RTW89_UK][48] = 127, -+ [2][0][RTW89_FCC][50] = 64, -+ [2][0][RTW89_ETSI][50] = 127, -+ [2][0][RTW89_MKK][50] = 127, -+ [2][0][RTW89_IC][50] = 127, -+ [2][0][RTW89_KCC][50] = 127, -+ [2][0][RTW89_ACMA][50] = 127, -+ [2][0][RTW89_CN][50] = 127, -+ [2][0][RTW89_UK][50] = 127, -+ [2][0][RTW89_FCC][52] = 60, -+ [2][0][RTW89_ETSI][52] = 127, -+ [2][0][RTW89_MKK][52] = 127, -+ [2][0][RTW89_IC][52] = 127, -+ [2][0][RTW89_KCC][52] = 127, -+ [2][0][RTW89_ACMA][52] = 127, -+ [2][0][RTW89_CN][52] = 127, -+ [2][0][RTW89_UK][52] = 127, -+ [2][1][RTW89_FCC][0] = 127, -+ [2][1][RTW89_ETSI][0] = 127, -+ [2][1][RTW89_MKK][0] = 127, -+ [2][1][RTW89_IC][0] = 127, -+ [2][1][RTW89_KCC][0] = 127, -+ [2][1][RTW89_ACMA][0] = 127, -+ [2][1][RTW89_CN][0] = 28, -+ [2][1][RTW89_UK][0] = 127, -+ [2][1][RTW89_FCC][2] = 127, -+ [2][1][RTW89_ETSI][2] = 127, -+ [2][1][RTW89_MKK][2] = 127, -+ [2][1][RTW89_IC][2] = 127, -+ [2][1][RTW89_KCC][2] = 127, -+ [2][1][RTW89_ACMA][2] = 127, -+ [2][1][RTW89_CN][2] = 28, -+ [2][1][RTW89_UK][2] = 127, -+ [2][1][RTW89_FCC][4] = 127, -+ [2][1][RTW89_ETSI][4] = 127, -+ [2][1][RTW89_MKK][4] = 127, -+ [2][1][RTW89_IC][4] = 127, -+ [2][1][RTW89_KCC][4] = 127, -+ [2][1][RTW89_ACMA][4] = 127, -+ [2][1][RTW89_CN][4] = 28, -+ [2][1][RTW89_UK][4] = 127, -+ [2][1][RTW89_FCC][6] = 127, -+ [2][1][RTW89_ETSI][6] = 127, -+ [2][1][RTW89_MKK][6] = 127, -+ [2][1][RTW89_IC][6] = 127, -+ [2][1][RTW89_KCC][6] = 127, -+ [2][1][RTW89_ACMA][6] = 127, -+ [2][1][RTW89_CN][6] = 28, -+ [2][1][RTW89_UK][6] = 127, -+ [2][1][RTW89_FCC][8] = 127, -+ [2][1][RTW89_ETSI][8] = 127, -+ [2][1][RTW89_MKK][8] = 127, -+ [2][1][RTW89_IC][8] = 127, -+ [2][1][RTW89_KCC][8] = 127, -+ [2][1][RTW89_ACMA][8] = 127, -+ [2][1][RTW89_CN][8] = 28, -+ [2][1][RTW89_UK][8] = 127, -+ [2][1][RTW89_FCC][10] = 127, -+ [2][1][RTW89_ETSI][10] = 127, -+ [2][1][RTW89_MKK][10] = 127, -+ [2][1][RTW89_IC][10] = 127, -+ [2][1][RTW89_KCC][10] = 127, -+ [2][1][RTW89_ACMA][10] = 127, -+ [2][1][RTW89_CN][10] = 28, -+ [2][1][RTW89_UK][10] = 127, -+ [2][1][RTW89_FCC][12] = 127, -+ [2][1][RTW89_ETSI][12] = 127, -+ [2][1][RTW89_MKK][12] = 127, -+ [2][1][RTW89_IC][12] = 127, -+ [2][1][RTW89_KCC][12] = 127, -+ [2][1][RTW89_ACMA][12] = 127, -+ [2][1][RTW89_CN][12] = 28, -+ [2][1][RTW89_UK][12] = 127, -+ [2][1][RTW89_FCC][14] = 127, -+ [2][1][RTW89_ETSI][14] = 127, -+ [2][1][RTW89_MKK][14] = 127, -+ [2][1][RTW89_IC][14] = 127, -+ [2][1][RTW89_KCC][14] = 127, -+ [2][1][RTW89_ACMA][14] = 127, -+ [2][1][RTW89_CN][14] = 28, -+ [2][1][RTW89_UK][14] = 127, -+ [2][1][RTW89_FCC][15] = 127, -+ [2][1][RTW89_ETSI][15] = 127, -+ [2][1][RTW89_MKK][15] = 127, -+ [2][1][RTW89_IC][15] = 127, -+ [2][1][RTW89_KCC][15] = 127, -+ [2][1][RTW89_ACMA][15] = 127, -+ [2][1][RTW89_CN][15] = 127, -+ [2][1][RTW89_UK][15] = 127, -+ [2][1][RTW89_FCC][17] = 127, -+ [2][1][RTW89_ETSI][17] = 127, -+ [2][1][RTW89_MKK][17] = 127, -+ [2][1][RTW89_IC][17] = 127, -+ [2][1][RTW89_KCC][17] = 127, -+ [2][1][RTW89_ACMA][17] = 127, -+ [2][1][RTW89_CN][17] = 127, -+ [2][1][RTW89_UK][17] = 127, -+ [2][1][RTW89_FCC][19] = 127, -+ [2][1][RTW89_ETSI][19] = 127, -+ [2][1][RTW89_MKK][19] = 127, -+ [2][1][RTW89_IC][19] = 127, -+ [2][1][RTW89_KCC][19] = 127, -+ [2][1][RTW89_ACMA][19] = 127, -+ [2][1][RTW89_CN][19] = 127, -+ [2][1][RTW89_UK][19] = 127, -+ [2][1][RTW89_FCC][21] = 127, -+ [2][1][RTW89_ETSI][21] = 127, -+ [2][1][RTW89_MKK][21] = 127, -+ [2][1][RTW89_IC][21] = 127, -+ [2][1][RTW89_KCC][21] = 127, -+ [2][1][RTW89_ACMA][21] = 127, -+ [2][1][RTW89_CN][21] = 127, -+ [2][1][RTW89_UK][21] = 127, -+ [2][1][RTW89_FCC][23] = 127, -+ [2][1][RTW89_ETSI][23] = 127, -+ [2][1][RTW89_MKK][23] = 127, -+ [2][1][RTW89_IC][23] = 127, -+ [2][1][RTW89_KCC][23] = 127, -+ [2][1][RTW89_ACMA][23] = 127, -+ [2][1][RTW89_CN][23] = 127, -+ [2][1][RTW89_UK][23] = 127, -+ [2][1][RTW89_FCC][25] = 127, -+ [2][1][RTW89_ETSI][25] = 127, -+ [2][1][RTW89_MKK][25] = 127, -+ [2][1][RTW89_IC][25] = 127, -+ [2][1][RTW89_KCC][25] = 127, -+ [2][1][RTW89_ACMA][25] = 127, -+ [2][1][RTW89_CN][25] = 127, -+ [2][1][RTW89_UK][25] = 127, -+ [2][1][RTW89_FCC][27] = 127, -+ [2][1][RTW89_ETSI][27] = 127, -+ [2][1][RTW89_MKK][27] = 127, -+ [2][1][RTW89_IC][27] = 127, -+ [2][1][RTW89_KCC][27] = 127, -+ [2][1][RTW89_ACMA][27] = 127, -+ [2][1][RTW89_CN][27] = 127, -+ [2][1][RTW89_UK][27] = 127, -+ [2][1][RTW89_FCC][29] = 127, -+ [2][1][RTW89_ETSI][29] = 127, -+ [2][1][RTW89_MKK][29] = 127, -+ [2][1][RTW89_IC][29] = 127, -+ [2][1][RTW89_KCC][29] = 127, -+ [2][1][RTW89_ACMA][29] = 127, -+ [2][1][RTW89_CN][29] = 127, -+ [2][1][RTW89_UK][29] = 127, -+ [2][1][RTW89_FCC][31] = 127, -+ [2][1][RTW89_ETSI][31] = 127, -+ [2][1][RTW89_MKK][31] = 127, -+ [2][1][RTW89_IC][31] = 127, -+ [2][1][RTW89_KCC][31] = 127, -+ [2][1][RTW89_ACMA][31] = 127, -+ [2][1][RTW89_CN][31] = 127, -+ [2][1][RTW89_UK][31] = 127, -+ [2][1][RTW89_FCC][33] = 127, -+ [2][1][RTW89_ETSI][33] = 127, -+ [2][1][RTW89_MKK][33] = 127, -+ [2][1][RTW89_IC][33] = 127, -+ [2][1][RTW89_KCC][33] = 127, -+ [2][1][RTW89_ACMA][33] = 127, -+ [2][1][RTW89_CN][33] = 127, -+ [2][1][RTW89_UK][33] = 127, -+ [2][1][RTW89_FCC][35] = 127, -+ [2][1][RTW89_ETSI][35] = 127, -+ [2][1][RTW89_MKK][35] = 127, -+ [2][1][RTW89_IC][35] = 127, -+ [2][1][RTW89_KCC][35] = 127, -+ [2][1][RTW89_ACMA][35] = 127, -+ [2][1][RTW89_CN][35] = 127, -+ [2][1][RTW89_UK][35] = 127, -+ [2][1][RTW89_FCC][37] = 127, -+ [2][1][RTW89_ETSI][37] = 127, -+ [2][1][RTW89_MKK][37] = 127, -+ [2][1][RTW89_IC][37] = 127, -+ [2][1][RTW89_KCC][37] = 127, -+ [2][1][RTW89_ACMA][37] = 127, -+ [2][1][RTW89_CN][37] = 127, -+ [2][1][RTW89_UK][37] = 127, -+ [2][1][RTW89_FCC][38] = 127, -+ [2][1][RTW89_ETSI][38] = 127, -+ [2][1][RTW89_MKK][38] = 127, -+ [2][1][RTW89_IC][38] = 127, -+ [2][1][RTW89_KCC][38] = 127, -+ [2][1][RTW89_ACMA][38] = 127, -+ [2][1][RTW89_CN][38] = 56, -+ [2][1][RTW89_UK][38] = 127, -+ [2][1][RTW89_FCC][40] = 127, -+ [2][1][RTW89_ETSI][40] = 127, -+ [2][1][RTW89_MKK][40] = 127, -+ [2][1][RTW89_IC][40] = 127, -+ [2][1][RTW89_KCC][40] = 127, -+ [2][1][RTW89_ACMA][40] = 127, -+ [2][1][RTW89_CN][40] = 56, -+ [2][1][RTW89_UK][40] = 127, -+ [2][1][RTW89_FCC][42] = 127, -+ [2][1][RTW89_ETSI][42] = 127, -+ [2][1][RTW89_MKK][42] = 127, -+ [2][1][RTW89_IC][42] = 127, -+ [2][1][RTW89_KCC][42] = 127, -+ [2][1][RTW89_ACMA][42] = 127, -+ [2][1][RTW89_CN][42] = 56, -+ [2][1][RTW89_UK][42] = 127, -+ [2][1][RTW89_FCC][44] = 127, -+ [2][1][RTW89_ETSI][44] = 127, -+ [2][1][RTW89_MKK][44] = 127, -+ [2][1][RTW89_IC][44] = 127, -+ [2][1][RTW89_KCC][44] = 127, -+ [2][1][RTW89_ACMA][44] = 127, -+ [2][1][RTW89_CN][44] = 56, -+ [2][1][RTW89_UK][44] = 127, -+ [2][1][RTW89_FCC][46] = 127, -+ [2][1][RTW89_ETSI][46] = 127, -+ [2][1][RTW89_MKK][46] = 127, -+ [2][1][RTW89_IC][46] = 127, -+ [2][1][RTW89_KCC][46] = 127, -+ [2][1][RTW89_ACMA][46] = 127, -+ [2][1][RTW89_CN][46] = 56, -+ [2][1][RTW89_UK][46] = 127, -+ [2][1][RTW89_FCC][48] = 127, -+ [2][1][RTW89_ETSI][48] = 127, -+ [2][1][RTW89_MKK][48] = 127, -+ [2][1][RTW89_IC][48] = 127, -+ [2][1][RTW89_KCC][48] = 127, -+ [2][1][RTW89_ACMA][48] = 127, -+ [2][1][RTW89_CN][48] = 127, -+ [2][1][RTW89_UK][48] = 127, -+ [2][1][RTW89_FCC][50] = 127, -+ [2][1][RTW89_ETSI][50] = 127, -+ [2][1][RTW89_MKK][50] = 127, -+ [2][1][RTW89_IC][50] = 127, -+ [2][1][RTW89_KCC][50] = 127, -+ [2][1][RTW89_ACMA][50] = 127, -+ [2][1][RTW89_CN][50] = 127, -+ [2][1][RTW89_UK][50] = 127, -+ [2][1][RTW89_FCC][52] = 127, -+ [2][1][RTW89_ETSI][52] = 127, -+ [2][1][RTW89_MKK][52] = 127, -+ [2][1][RTW89_IC][52] = 127, -+ [2][1][RTW89_KCC][52] = 127, -+ [2][1][RTW89_ACMA][52] = 127, -+ [2][1][RTW89_CN][52] = 127, -+ [2][1][RTW89_UK][52] = 127, -+}; -+ -+static -+const s8 rtw89_8851b_txpwr_lmt_2g_type2[RTW89_2G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = { -+ [0][0][0][0][RTW89_WW][0] = 58, -+ [0][0][0][0][RTW89_WW][1] = 58, -+ [0][0][0][0][RTW89_WW][2] = 58, -+ [0][0][0][0][RTW89_WW][3] = 58, -+ [0][0][0][0][RTW89_WW][4] = 58, -+ [0][0][0][0][RTW89_WW][5] = 58, -+ [0][0][0][0][RTW89_WW][6] = 58, -+ [0][0][0][0][RTW89_WW][7] = 58, -+ [0][0][0][0][RTW89_WW][8] = 58, -+ [0][0][0][0][RTW89_WW][9] = 58, -+ [0][0][0][0][RTW89_WW][10] = 58, -+ [0][0][0][0][RTW89_WW][11] = 58, -+ [0][0][0][0][RTW89_WW][12] = 52, -+ [0][0][0][0][RTW89_WW][13] = 76, -+ [0][1][0][0][RTW89_WW][0] = 0, -+ [0][1][0][0][RTW89_WW][1] = 0, -+ [0][1][0][0][RTW89_WW][2] = 0, -+ [0][1][0][0][RTW89_WW][3] = 0, -+ [0][1][0][0][RTW89_WW][4] = 0, -+ [0][1][0][0][RTW89_WW][5] = 0, -+ [0][1][0][0][RTW89_WW][6] = 0, -+ [0][1][0][0][RTW89_WW][7] = 0, -+ [0][1][0][0][RTW89_WW][8] = 0, -+ [0][1][0][0][RTW89_WW][9] = 0, -+ [0][1][0][0][RTW89_WW][10] = 0, -+ [0][1][0][0][RTW89_WW][11] = 0, -+ [0][1][0][0][RTW89_WW][12] = 0, -+ [0][1][0][0][RTW89_WW][13] = 0, -+ [1][0][0][0][RTW89_WW][0] = 0, -+ [1][0][0][0][RTW89_WW][1] = 0, -+ [1][0][0][0][RTW89_WW][2] = 58, -+ [1][0][0][0][RTW89_WW][3] = 58, -+ [1][0][0][0][RTW89_WW][4] = 58, -+ [1][0][0][0][RTW89_WW][5] = 58, -+ [1][0][0][0][RTW89_WW][6] = 58, -+ [1][0][0][0][RTW89_WW][7] = 58, -+ [1][0][0][0][RTW89_WW][8] = 58, -+ [1][0][0][0][RTW89_WW][9] = 58, -+ [1][0][0][0][RTW89_WW][10] = 58, -+ [1][0][0][0][RTW89_WW][11] = 0, -+ [1][0][0][0][RTW89_WW][12] = 0, -+ [1][0][0][0][RTW89_WW][13] = 0, -+ [1][1][0][0][RTW89_WW][0] = 0, -+ [1][1][0][0][RTW89_WW][1] = 0, -+ [1][1][0][0][RTW89_WW][2] = 0, -+ [1][1][0][0][RTW89_WW][3] = 0, -+ [1][1][0][0][RTW89_WW][4] = 0, -+ [1][1][0][0][RTW89_WW][5] = 0, -+ [1][1][0][0][RTW89_WW][6] = 0, -+ [1][1][0][0][RTW89_WW][7] = 0, -+ [1][1][0][0][RTW89_WW][8] = 0, -+ [1][1][0][0][RTW89_WW][9] = 0, -+ [1][1][0][0][RTW89_WW][10] = 0, -+ [1][1][0][0][RTW89_WW][11] = 0, -+ [1][1][0][0][RTW89_WW][12] = 0, -+ [1][1][0][0][RTW89_WW][13] = 0, -+ [0][0][1][0][RTW89_WW][0] = 58, -+ [0][0][1][0][RTW89_WW][1] = 60, -+ [0][0][1][0][RTW89_WW][2] = 60, -+ [0][0][1][0][RTW89_WW][3] = 60, -+ [0][0][1][0][RTW89_WW][4] = 60, -+ [0][0][1][0][RTW89_WW][5] = 60, -+ [0][0][1][0][RTW89_WW][6] = 60, -+ [0][0][1][0][RTW89_WW][7] = 60, -+ [0][0][1][0][RTW89_WW][8] = 60, -+ [0][0][1][0][RTW89_WW][9] = 60, -+ [0][0][1][0][RTW89_WW][10] = 60, -+ [0][0][1][0][RTW89_WW][11] = 60, -+ [0][0][1][0][RTW89_WW][12] = 58, -+ [0][0][1][0][RTW89_WW][13] = 0, -+ [0][1][1][0][RTW89_WW][0] = 0, -+ [0][1][1][0][RTW89_WW][1] = 0, -+ [0][1][1][0][RTW89_WW][2] = 0, -+ [0][1][1][0][RTW89_WW][3] = 0, -+ [0][1][1][0][RTW89_WW][4] = 0, -+ [0][1][1][0][RTW89_WW][5] = 0, -+ [0][1][1][0][RTW89_WW][6] = 0, -+ [0][1][1][0][RTW89_WW][7] = 0, -+ [0][1][1][0][RTW89_WW][8] = 0, -+ [0][1][1][0][RTW89_WW][9] = 0, -+ [0][1][1][0][RTW89_WW][10] = 0, -+ [0][1][1][0][RTW89_WW][11] = 0, -+ [0][1][1][0][RTW89_WW][12] = 0, -+ [0][1][1][0][RTW89_WW][13] = 0, -+ [0][0][2][0][RTW89_WW][0] = 60, -+ [0][0][2][0][RTW89_WW][1] = 60, -+ [0][0][2][0][RTW89_WW][2] = 60, -+ [0][0][2][0][RTW89_WW][3] = 60, -+ [0][0][2][0][RTW89_WW][4] = 60, -+ [0][0][2][0][RTW89_WW][5] = 60, -+ [0][0][2][0][RTW89_WW][6] = 60, -+ [0][0][2][0][RTW89_WW][7] = 60, -+ [0][0][2][0][RTW89_WW][8] = 60, -+ [0][0][2][0][RTW89_WW][9] = 60, -+ [0][0][2][0][RTW89_WW][10] = 60, -+ [0][0][2][0][RTW89_WW][11] = 60, -+ [0][0][2][0][RTW89_WW][12] = 60, -+ [0][0][2][0][RTW89_WW][13] = 0, -+ [0][1][2][0][RTW89_WW][0] = 0, -+ [0][1][2][0][RTW89_WW][1] = 0, -+ [0][1][2][0][RTW89_WW][2] = 0, -+ [0][1][2][0][RTW89_WW][3] = 0, -+ [0][1][2][0][RTW89_WW][4] = 0, -+ [0][1][2][0][RTW89_WW][5] = 0, -+ [0][1][2][0][RTW89_WW][6] = 0, -+ [0][1][2][0][RTW89_WW][7] = 0, -+ [0][1][2][0][RTW89_WW][8] = 0, -+ [0][1][2][0][RTW89_WW][9] = 0, -+ [0][1][2][0][RTW89_WW][10] = 0, -+ [0][1][2][0][RTW89_WW][11] = 0, -+ [0][1][2][0][RTW89_WW][12] = 0, -+ [0][1][2][0][RTW89_WW][13] = 0, -+ [0][1][2][1][RTW89_WW][0] = 0, -+ [0][1][2][1][RTW89_WW][1] = 0, -+ [0][1][2][1][RTW89_WW][2] = 0, -+ [0][1][2][1][RTW89_WW][3] = 0, -+ [0][1][2][1][RTW89_WW][4] = 0, -+ [0][1][2][1][RTW89_WW][5] = 0, -+ [0][1][2][1][RTW89_WW][6] = 0, -+ [0][1][2][1][RTW89_WW][7] = 0, -+ [0][1][2][1][RTW89_WW][8] = 0, -+ [0][1][2][1][RTW89_WW][9] = 0, -+ [0][1][2][1][RTW89_WW][10] = 0, -+ [0][1][2][1][RTW89_WW][11] = 0, -+ [0][1][2][1][RTW89_WW][12] = 0, -+ [0][1][2][1][RTW89_WW][13] = 0, -+ [1][0][2][0][RTW89_WW][0] = 0, -+ [1][0][2][0][RTW89_WW][1] = 0, -+ [1][0][2][0][RTW89_WW][2] = 58, -+ [1][0][2][0][RTW89_WW][3] = 58, -+ [1][0][2][0][RTW89_WW][4] = 58, -+ [1][0][2][0][RTW89_WW][5] = 58, -+ [1][0][2][0][RTW89_WW][6] = 58, -+ [1][0][2][0][RTW89_WW][7] = 58, -+ [1][0][2][0][RTW89_WW][8] = 58, -+ [1][0][2][0][RTW89_WW][9] = 58, -+ [1][0][2][0][RTW89_WW][10] = 58, -+ [1][0][2][0][RTW89_WW][11] = 0, -+ [1][0][2][0][RTW89_WW][12] = 0, -+ [1][0][2][0][RTW89_WW][13] = 0, -+ [1][1][2][0][RTW89_WW][0] = 0, -+ [1][1][2][0][RTW89_WW][1] = 0, -+ [1][1][2][0][RTW89_WW][2] = 0, -+ [1][1][2][0][RTW89_WW][3] = 0, -+ [1][1][2][0][RTW89_WW][4] = 0, -+ [1][1][2][0][RTW89_WW][5] = 0, -+ [1][1][2][0][RTW89_WW][6] = 0, -+ [1][1][2][0][RTW89_WW][7] = 0, -+ [1][1][2][0][RTW89_WW][8] = 0, -+ [1][1][2][0][RTW89_WW][9] = 0, -+ [1][1][2][0][RTW89_WW][10] = 0, -+ [1][1][2][0][RTW89_WW][11] = 0, -+ [1][1][2][0][RTW89_WW][12] = 0, -+ [1][1][2][0][RTW89_WW][13] = 0, -+ [1][1][2][1][RTW89_WW][0] = 0, -+ [1][1][2][1][RTW89_WW][1] = 0, -+ [1][1][2][1][RTW89_WW][2] = 0, -+ [1][1][2][1][RTW89_WW][3] = 0, -+ [1][1][2][1][RTW89_WW][4] = 0, -+ [1][1][2][1][RTW89_WW][5] = 0, -+ [1][1][2][1][RTW89_WW][6] = 0, -+ [1][1][2][1][RTW89_WW][7] = 0, -+ [1][1][2][1][RTW89_WW][8] = 0, -+ [1][1][2][1][RTW89_WW][9] = 0, -+ [1][1][2][1][RTW89_WW][10] = 0, -+ [1][1][2][1][RTW89_WW][11] = 0, -+ [1][1][2][1][RTW89_WW][12] = 0, -+ [1][1][2][1][RTW89_WW][13] = 0, -+ [0][0][0][0][RTW89_FCC][0] = 82, -+ [0][0][0][0][RTW89_ETSI][0] = 58, -+ [0][0][0][0][RTW89_MKK][0] = 68, -+ [0][0][0][0][RTW89_IC][0] = 82, -+ [0][0][0][0][RTW89_KCC][0] = 68, -+ [0][0][0][0][RTW89_ACMA][0] = 58, -+ [0][0][0][0][RTW89_CN][0] = 60, -+ [0][0][0][0][RTW89_UK][0] = 58, -+ [0][0][0][0][RTW89_FCC][1] = 82, -+ [0][0][0][0][RTW89_ETSI][1] = 58, -+ [0][0][0][0][RTW89_MKK][1] = 68, -+ [0][0][0][0][RTW89_IC][1] = 82, -+ [0][0][0][0][RTW89_KCC][1] = 68, -+ [0][0][0][0][RTW89_ACMA][1] = 58, -+ [0][0][0][0][RTW89_CN][1] = 60, -+ [0][0][0][0][RTW89_UK][1] = 58, -+ [0][0][0][0][RTW89_FCC][2] = 82, -+ [0][0][0][0][RTW89_ETSI][2] = 58, -+ [0][0][0][0][RTW89_MKK][2] = 68, -+ [0][0][0][0][RTW89_IC][2] = 82, -+ [0][0][0][0][RTW89_KCC][2] = 68, -+ [0][0][0][0][RTW89_ACMA][2] = 58, -+ [0][0][0][0][RTW89_CN][2] = 60, -+ [0][0][0][0][RTW89_UK][2] = 58, -+ [0][0][0][0][RTW89_FCC][3] = 82, -+ [0][0][0][0][RTW89_ETSI][3] = 58, -+ [0][0][0][0][RTW89_MKK][3] = 68, -+ [0][0][0][0][RTW89_IC][3] = 82, -+ [0][0][0][0][RTW89_KCC][3] = 68, -+ [0][0][0][0][RTW89_ACMA][3] = 58, -+ [0][0][0][0][RTW89_CN][3] = 60, -+ [0][0][0][0][RTW89_UK][3] = 58, -+ [0][0][0][0][RTW89_FCC][4] = 82, -+ [0][0][0][0][RTW89_ETSI][4] = 58, -+ [0][0][0][0][RTW89_MKK][4] = 68, -+ [0][0][0][0][RTW89_IC][4] = 82, -+ [0][0][0][0][RTW89_KCC][4] = 68, -+ [0][0][0][0][RTW89_ACMA][4] = 58, -+ [0][0][0][0][RTW89_CN][4] = 60, -+ [0][0][0][0][RTW89_UK][4] = 58, -+ [0][0][0][0][RTW89_FCC][5] = 82, -+ [0][0][0][0][RTW89_ETSI][5] = 58, -+ [0][0][0][0][RTW89_MKK][5] = 68, -+ [0][0][0][0][RTW89_IC][5] = 82, -+ [0][0][0][0][RTW89_KCC][5] = 68, -+ [0][0][0][0][RTW89_ACMA][5] = 58, -+ [0][0][0][0][RTW89_CN][5] = 60, -+ [0][0][0][0][RTW89_UK][5] = 58, -+ [0][0][0][0][RTW89_FCC][6] = 82, -+ [0][0][0][0][RTW89_ETSI][6] = 58, -+ [0][0][0][0][RTW89_MKK][6] = 68, -+ [0][0][0][0][RTW89_IC][6] = 82, -+ [0][0][0][0][RTW89_KCC][6] = 68, -+ [0][0][0][0][RTW89_ACMA][6] = 58, -+ [0][0][0][0][RTW89_CN][6] = 60, -+ [0][0][0][0][RTW89_UK][6] = 58, -+ [0][0][0][0][RTW89_FCC][7] = 82, -+ [0][0][0][0][RTW89_ETSI][7] = 58, -+ [0][0][0][0][RTW89_MKK][7] = 68, -+ [0][0][0][0][RTW89_IC][7] = 82, -+ [0][0][0][0][RTW89_KCC][7] = 68, -+ [0][0][0][0][RTW89_ACMA][7] = 58, -+ [0][0][0][0][RTW89_CN][7] = 60, -+ [0][0][0][0][RTW89_UK][7] = 58, -+ [0][0][0][0][RTW89_FCC][8] = 82, -+ [0][0][0][0][RTW89_ETSI][8] = 58, -+ [0][0][0][0][RTW89_MKK][8] = 68, -+ [0][0][0][0][RTW89_IC][8] = 82, -+ [0][0][0][0][RTW89_KCC][8] = 68, -+ [0][0][0][0][RTW89_ACMA][8] = 58, -+ [0][0][0][0][RTW89_CN][8] = 60, -+ [0][0][0][0][RTW89_UK][8] = 58, -+ [0][0][0][0][RTW89_FCC][9] = 82, -+ [0][0][0][0][RTW89_ETSI][9] = 58, -+ [0][0][0][0][RTW89_MKK][9] = 68, -+ [0][0][0][0][RTW89_IC][9] = 82, -+ [0][0][0][0][RTW89_KCC][9] = 68, -+ [0][0][0][0][RTW89_ACMA][9] = 58, -+ [0][0][0][0][RTW89_CN][9] = 60, -+ [0][0][0][0][RTW89_UK][9] = 58, -+ [0][0][0][0][RTW89_FCC][10] = 80, -+ [0][0][0][0][RTW89_ETSI][10] = 58, -+ [0][0][0][0][RTW89_MKK][10] = 68, -+ [0][0][0][0][RTW89_IC][10] = 80, -+ [0][0][0][0][RTW89_KCC][10] = 68, -+ [0][0][0][0][RTW89_ACMA][10] = 58, -+ [0][0][0][0][RTW89_CN][10] = 60, -+ [0][0][0][0][RTW89_UK][10] = 58, -+ [0][0][0][0][RTW89_FCC][11] = 60, -+ [0][0][0][0][RTW89_ETSI][11] = 58, -+ [0][0][0][0][RTW89_MKK][11] = 68, -+ [0][0][0][0][RTW89_IC][11] = 60, -+ [0][0][0][0][RTW89_KCC][11] = 68, -+ [0][0][0][0][RTW89_ACMA][11] = 58, -+ [0][0][0][0][RTW89_CN][11] = 60, -+ [0][0][0][0][RTW89_UK][11] = 58, -+ [0][0][0][0][RTW89_FCC][12] = 52, -+ [0][0][0][0][RTW89_ETSI][12] = 58, -+ [0][0][0][0][RTW89_MKK][12] = 68, -+ [0][0][0][0][RTW89_IC][12] = 52, -+ [0][0][0][0][RTW89_KCC][12] = 68, -+ [0][0][0][0][RTW89_ACMA][12] = 58, -+ [0][0][0][0][RTW89_CN][12] = 60, -+ [0][0][0][0][RTW89_UK][12] = 58, -+ [0][0][0][0][RTW89_FCC][13] = 127, -+ [0][0][0][0][RTW89_ETSI][13] = 127, -+ [0][0][0][0][RTW89_MKK][13] = 76, -+ [0][0][0][0][RTW89_IC][13] = 127, -+ [0][0][0][0][RTW89_KCC][13] = 127, -+ [0][0][0][0][RTW89_ACMA][13] = 127, -+ [0][0][0][0][RTW89_CN][13] = 127, -+ [0][0][0][0][RTW89_UK][13] = 127, -+ [0][1][0][0][RTW89_FCC][0] = 127, -+ [0][1][0][0][RTW89_ETSI][0] = 127, -+ [0][1][0][0][RTW89_MKK][0] = 127, -+ [0][1][0][0][RTW89_IC][0] = 127, -+ [0][1][0][0][RTW89_KCC][0] = 127, -+ [0][1][0][0][RTW89_ACMA][0] = 127, -+ [0][1][0][0][RTW89_CN][0] = 127, -+ [0][1][0][0][RTW89_UK][0] = 127, -+ [0][1][0][0][RTW89_FCC][1] = 127, -+ [0][1][0][0][RTW89_ETSI][1] = 127, -+ [0][1][0][0][RTW89_MKK][1] = 127, -+ [0][1][0][0][RTW89_IC][1] = 127, -+ [0][1][0][0][RTW89_KCC][1] = 127, -+ [0][1][0][0][RTW89_ACMA][1] = 127, -+ [0][1][0][0][RTW89_CN][1] = 127, -+ [0][1][0][0][RTW89_UK][1] = 127, -+ [0][1][0][0][RTW89_FCC][2] = 127, -+ [0][1][0][0][RTW89_ETSI][2] = 127, -+ [0][1][0][0][RTW89_MKK][2] = 127, -+ [0][1][0][0][RTW89_IC][2] = 127, -+ [0][1][0][0][RTW89_KCC][2] = 127, -+ [0][1][0][0][RTW89_ACMA][2] = 127, -+ [0][1][0][0][RTW89_CN][2] = 127, -+ [0][1][0][0][RTW89_UK][2] = 127, -+ [0][1][0][0][RTW89_FCC][3] = 127, -+ [0][1][0][0][RTW89_ETSI][3] = 127, -+ [0][1][0][0][RTW89_MKK][3] = 127, -+ [0][1][0][0][RTW89_IC][3] = 127, -+ [0][1][0][0][RTW89_KCC][3] = 127, -+ [0][1][0][0][RTW89_ACMA][3] = 127, -+ [0][1][0][0][RTW89_CN][3] = 127, -+ [0][1][0][0][RTW89_UK][3] = 127, -+ [0][1][0][0][RTW89_FCC][4] = 127, -+ [0][1][0][0][RTW89_ETSI][4] = 127, -+ [0][1][0][0][RTW89_MKK][4] = 127, -+ [0][1][0][0][RTW89_IC][4] = 127, -+ [0][1][0][0][RTW89_KCC][4] = 127, -+ [0][1][0][0][RTW89_ACMA][4] = 127, -+ [0][1][0][0][RTW89_CN][4] = 127, -+ [0][1][0][0][RTW89_UK][4] = 127, -+ [0][1][0][0][RTW89_FCC][5] = 127, -+ [0][1][0][0][RTW89_ETSI][5] = 127, -+ [0][1][0][0][RTW89_MKK][5] = 127, -+ [0][1][0][0][RTW89_IC][5] = 127, -+ [0][1][0][0][RTW89_KCC][5] = 127, -+ [0][1][0][0][RTW89_ACMA][5] = 127, -+ [0][1][0][0][RTW89_CN][5] = 127, -+ [0][1][0][0][RTW89_UK][5] = 127, -+ [0][1][0][0][RTW89_FCC][6] = 127, -+ [0][1][0][0][RTW89_ETSI][6] = 127, -+ [0][1][0][0][RTW89_MKK][6] = 127, -+ [0][1][0][0][RTW89_IC][6] = 127, -+ [0][1][0][0][RTW89_KCC][6] = 127, -+ [0][1][0][0][RTW89_ACMA][6] = 127, -+ [0][1][0][0][RTW89_CN][6] = 127, -+ [0][1][0][0][RTW89_UK][6] = 127, -+ [0][1][0][0][RTW89_FCC][7] = 127, -+ [0][1][0][0][RTW89_ETSI][7] = 127, -+ [0][1][0][0][RTW89_MKK][7] = 127, -+ [0][1][0][0][RTW89_IC][7] = 127, -+ [0][1][0][0][RTW89_KCC][7] = 127, -+ [0][1][0][0][RTW89_ACMA][7] = 127, -+ [0][1][0][0][RTW89_CN][7] = 127, -+ [0][1][0][0][RTW89_UK][7] = 127, -+ [0][1][0][0][RTW89_FCC][8] = 127, -+ [0][1][0][0][RTW89_ETSI][8] = 127, -+ [0][1][0][0][RTW89_MKK][8] = 127, -+ [0][1][0][0][RTW89_IC][8] = 127, -+ [0][1][0][0][RTW89_KCC][8] = 127, -+ [0][1][0][0][RTW89_ACMA][8] = 127, -+ [0][1][0][0][RTW89_CN][8] = 127, -+ [0][1][0][0][RTW89_UK][8] = 127, -+ [0][1][0][0][RTW89_FCC][9] = 127, -+ [0][1][0][0][RTW89_ETSI][9] = 127, -+ [0][1][0][0][RTW89_MKK][9] = 127, -+ [0][1][0][0][RTW89_IC][9] = 127, -+ [0][1][0][0][RTW89_KCC][9] = 127, -+ [0][1][0][0][RTW89_ACMA][9] = 127, -+ [0][1][0][0][RTW89_CN][9] = 127, -+ [0][1][0][0][RTW89_UK][9] = 127, -+ [0][1][0][0][RTW89_FCC][10] = 127, -+ [0][1][0][0][RTW89_ETSI][10] = 127, -+ [0][1][0][0][RTW89_MKK][10] = 127, -+ [0][1][0][0][RTW89_IC][10] = 127, -+ [0][1][0][0][RTW89_KCC][10] = 127, -+ [0][1][0][0][RTW89_ACMA][10] = 127, -+ [0][1][0][0][RTW89_CN][10] = 127, -+ [0][1][0][0][RTW89_UK][10] = 127, -+ [0][1][0][0][RTW89_FCC][11] = 127, -+ [0][1][0][0][RTW89_ETSI][11] = 127, -+ [0][1][0][0][RTW89_MKK][11] = 127, -+ [0][1][0][0][RTW89_IC][11] = 127, -+ [0][1][0][0][RTW89_KCC][11] = 127, -+ [0][1][0][0][RTW89_ACMA][11] = 127, -+ [0][1][0][0][RTW89_CN][11] = 127, -+ [0][1][0][0][RTW89_UK][11] = 127, -+ [0][1][0][0][RTW89_FCC][12] = 127, -+ [0][1][0][0][RTW89_ETSI][12] = 127, -+ [0][1][0][0][RTW89_MKK][12] = 127, -+ [0][1][0][0][RTW89_IC][12] = 127, -+ [0][1][0][0][RTW89_KCC][12] = 127, -+ [0][1][0][0][RTW89_ACMA][12] = 127, -+ [0][1][0][0][RTW89_CN][12] = 127, -+ [0][1][0][0][RTW89_UK][12] = 127, -+ [0][1][0][0][RTW89_FCC][13] = 127, -+ [0][1][0][0][RTW89_ETSI][13] = 127, -+ [0][1][0][0][RTW89_MKK][13] = 127, -+ [0][1][0][0][RTW89_IC][13] = 127, -+ [0][1][0][0][RTW89_KCC][13] = 127, -+ [0][1][0][0][RTW89_ACMA][13] = 127, -+ [0][1][0][0][RTW89_CN][13] = 127, -+ [0][1][0][0][RTW89_UK][13] = 127, -+ [1][0][0][0][RTW89_FCC][0] = 127, -+ [1][0][0][0][RTW89_ETSI][0] = 127, -+ [1][0][0][0][RTW89_MKK][0] = 127, -+ [1][0][0][0][RTW89_IC][0] = 127, -+ [1][0][0][0][RTW89_KCC][0] = 127, -+ [1][0][0][0][RTW89_ACMA][0] = 127, -+ [1][0][0][0][RTW89_CN][0] = 127, -+ [1][0][0][0][RTW89_UK][0] = 127, -+ [1][0][0][0][RTW89_FCC][1] = 127, -+ [1][0][0][0][RTW89_ETSI][1] = 127, -+ [1][0][0][0][RTW89_MKK][1] = 127, -+ [1][0][0][0][RTW89_IC][1] = 127, -+ [1][0][0][0][RTW89_KCC][1] = 127, -+ [1][0][0][0][RTW89_ACMA][1] = 127, -+ [1][0][0][0][RTW89_CN][1] = 127, -+ [1][0][0][0][RTW89_UK][1] = 127, -+ [1][0][0][0][RTW89_FCC][2] = 127, -+ [1][0][0][0][RTW89_ETSI][2] = 58, -+ [1][0][0][0][RTW89_MKK][2] = 70, -+ [1][0][0][0][RTW89_IC][2] = 127, -+ [1][0][0][0][RTW89_KCC][2] = 68, -+ [1][0][0][0][RTW89_ACMA][2] = 58, -+ [1][0][0][0][RTW89_CN][2] = 60, -+ [1][0][0][0][RTW89_UK][2] = 58, -+ [1][0][0][0][RTW89_FCC][3] = 127, -+ [1][0][0][0][RTW89_ETSI][3] = 58, -+ [1][0][0][0][RTW89_MKK][3] = 76, -+ [1][0][0][0][RTW89_IC][3] = 127, -+ [1][0][0][0][RTW89_KCC][3] = 68, -+ [1][0][0][0][RTW89_ACMA][3] = 58, -+ [1][0][0][0][RTW89_CN][3] = 60, -+ [1][0][0][0][RTW89_UK][3] = 58, -+ [1][0][0][0][RTW89_FCC][4] = 127, -+ [1][0][0][0][RTW89_ETSI][4] = 58, -+ [1][0][0][0][RTW89_MKK][4] = 76, -+ [1][0][0][0][RTW89_IC][4] = 127, -+ [1][0][0][0][RTW89_KCC][4] = 68, -+ [1][0][0][0][RTW89_ACMA][4] = 58, -+ [1][0][0][0][RTW89_CN][4] = 60, -+ [1][0][0][0][RTW89_UK][4] = 58, -+ [1][0][0][0][RTW89_FCC][5] = 127, -+ [1][0][0][0][RTW89_ETSI][5] = 58, -+ [1][0][0][0][RTW89_MKK][5] = 76, -+ [1][0][0][0][RTW89_IC][5] = 127, -+ [1][0][0][0][RTW89_KCC][5] = 68, -+ [1][0][0][0][RTW89_ACMA][5] = 58, -+ [1][0][0][0][RTW89_CN][5] = 60, -+ [1][0][0][0][RTW89_UK][5] = 58, -+ [1][0][0][0][RTW89_FCC][6] = 127, -+ [1][0][0][0][RTW89_ETSI][6] = 58, -+ [1][0][0][0][RTW89_MKK][6] = 76, -+ [1][0][0][0][RTW89_IC][6] = 127, -+ [1][0][0][0][RTW89_KCC][6] = 68, -+ [1][0][0][0][RTW89_ACMA][6] = 58, -+ [1][0][0][0][RTW89_CN][6] = 60, -+ [1][0][0][0][RTW89_UK][6] = 58, -+ [1][0][0][0][RTW89_FCC][7] = 127, -+ [1][0][0][0][RTW89_ETSI][7] = 58, -+ [1][0][0][0][RTW89_MKK][7] = 76, -+ [1][0][0][0][RTW89_IC][7] = 127, -+ [1][0][0][0][RTW89_KCC][7] = 68, -+ [1][0][0][0][RTW89_ACMA][7] = 58, -+ [1][0][0][0][RTW89_CN][7] = 60, -+ [1][0][0][0][RTW89_UK][7] = 58, -+ [1][0][0][0][RTW89_FCC][8] = 127, -+ [1][0][0][0][RTW89_ETSI][8] = 58, -+ [1][0][0][0][RTW89_MKK][8] = 76, -+ [1][0][0][0][RTW89_IC][8] = 127, -+ [1][0][0][0][RTW89_KCC][8] = 68, -+ [1][0][0][0][RTW89_ACMA][8] = 58, -+ [1][0][0][0][RTW89_CN][8] = 60, -+ [1][0][0][0][RTW89_UK][8] = 58, -+ [1][0][0][0][RTW89_FCC][9] = 127, -+ [1][0][0][0][RTW89_ETSI][9] = 58, -+ [1][0][0][0][RTW89_MKK][9] = 76, -+ [1][0][0][0][RTW89_IC][9] = 127, -+ [1][0][0][0][RTW89_KCC][9] = 68, -+ [1][0][0][0][RTW89_ACMA][9] = 58, -+ [1][0][0][0][RTW89_CN][9] = 60, -+ [1][0][0][0][RTW89_UK][9] = 58, -+ [1][0][0][0][RTW89_FCC][10] = 127, -+ [1][0][0][0][RTW89_ETSI][10] = 58, -+ [1][0][0][0][RTW89_MKK][10] = 66, -+ [1][0][0][0][RTW89_IC][10] = 127, -+ [1][0][0][0][RTW89_KCC][10] = 68, -+ [1][0][0][0][RTW89_ACMA][10] = 58, -+ [1][0][0][0][RTW89_CN][10] = 60, -+ [1][0][0][0][RTW89_UK][10] = 58, -+ [1][0][0][0][RTW89_FCC][11] = 127, -+ [1][0][0][0][RTW89_ETSI][11] = 127, -+ [1][0][0][0][RTW89_MKK][11] = 127, -+ [1][0][0][0][RTW89_IC][11] = 127, -+ [1][0][0][0][RTW89_KCC][11] = 127, -+ [1][0][0][0][RTW89_ACMA][11] = 127, -+ [1][0][0][0][RTW89_CN][11] = 127, -+ [1][0][0][0][RTW89_UK][11] = 127, -+ [1][0][0][0][RTW89_FCC][12] = 127, -+ [1][0][0][0][RTW89_ETSI][12] = 127, -+ [1][0][0][0][RTW89_MKK][12] = 127, -+ [1][0][0][0][RTW89_IC][12] = 127, -+ [1][0][0][0][RTW89_KCC][12] = 127, -+ [1][0][0][0][RTW89_ACMA][12] = 127, -+ [1][0][0][0][RTW89_CN][12] = 127, -+ [1][0][0][0][RTW89_UK][12] = 127, -+ [1][0][0][0][RTW89_FCC][13] = 127, -+ [1][0][0][0][RTW89_ETSI][13] = 127, -+ [1][0][0][0][RTW89_MKK][13] = 127, -+ [1][0][0][0][RTW89_IC][13] = 127, -+ [1][0][0][0][RTW89_KCC][13] = 127, -+ [1][0][0][0][RTW89_ACMA][13] = 127, -+ [1][0][0][0][RTW89_CN][13] = 127, -+ [1][0][0][0][RTW89_UK][13] = 127, -+ [1][1][0][0][RTW89_FCC][0] = 127, -+ [1][1][0][0][RTW89_ETSI][0] = 127, -+ [1][1][0][0][RTW89_MKK][0] = 127, -+ [1][1][0][0][RTW89_IC][0] = 127, -+ [1][1][0][0][RTW89_KCC][0] = 127, -+ [1][1][0][0][RTW89_ACMA][0] = 127, -+ [1][1][0][0][RTW89_CN][0] = 127, -+ [1][1][0][0][RTW89_UK][0] = 127, -+ [1][1][0][0][RTW89_FCC][1] = 127, -+ [1][1][0][0][RTW89_ETSI][1] = 127, -+ [1][1][0][0][RTW89_MKK][1] = 127, -+ [1][1][0][0][RTW89_IC][1] = 127, -+ [1][1][0][0][RTW89_KCC][1] = 127, -+ [1][1][0][0][RTW89_ACMA][1] = 127, -+ [1][1][0][0][RTW89_CN][1] = 127, -+ [1][1][0][0][RTW89_UK][1] = 127, -+ [1][1][0][0][RTW89_FCC][2] = 127, -+ [1][1][0][0][RTW89_ETSI][2] = 127, -+ [1][1][0][0][RTW89_MKK][2] = 127, -+ [1][1][0][0][RTW89_IC][2] = 127, -+ [1][1][0][0][RTW89_KCC][2] = 127, -+ [1][1][0][0][RTW89_ACMA][2] = 127, -+ [1][1][0][0][RTW89_CN][2] = 127, -+ [1][1][0][0][RTW89_UK][2] = 127, -+ [1][1][0][0][RTW89_FCC][3] = 127, -+ [1][1][0][0][RTW89_ETSI][3] = 127, -+ [1][1][0][0][RTW89_MKK][3] = 127, -+ [1][1][0][0][RTW89_IC][3] = 127, -+ [1][1][0][0][RTW89_KCC][3] = 127, -+ [1][1][0][0][RTW89_ACMA][3] = 127, -+ [1][1][0][0][RTW89_CN][3] = 127, -+ [1][1][0][0][RTW89_UK][3] = 127, -+ [1][1][0][0][RTW89_FCC][4] = 127, -+ [1][1][0][0][RTW89_ETSI][4] = 127, -+ [1][1][0][0][RTW89_MKK][4] = 127, -+ [1][1][0][0][RTW89_IC][4] = 127, -+ [1][1][0][0][RTW89_KCC][4] = 127, -+ [1][1][0][0][RTW89_ACMA][4] = 127, -+ [1][1][0][0][RTW89_CN][4] = 127, -+ [1][1][0][0][RTW89_UK][4] = 127, -+ [1][1][0][0][RTW89_FCC][5] = 127, -+ [1][1][0][0][RTW89_ETSI][5] = 127, -+ [1][1][0][0][RTW89_MKK][5] = 127, -+ [1][1][0][0][RTW89_IC][5] = 127, -+ [1][1][0][0][RTW89_KCC][5] = 127, -+ [1][1][0][0][RTW89_ACMA][5] = 127, -+ [1][1][0][0][RTW89_CN][5] = 127, -+ [1][1][0][0][RTW89_UK][5] = 127, -+ [1][1][0][0][RTW89_FCC][6] = 127, -+ [1][1][0][0][RTW89_ETSI][6] = 127, -+ [1][1][0][0][RTW89_MKK][6] = 127, -+ [1][1][0][0][RTW89_IC][6] = 127, -+ [1][1][0][0][RTW89_KCC][6] = 127, -+ [1][1][0][0][RTW89_ACMA][6] = 127, -+ [1][1][0][0][RTW89_CN][6] = 127, -+ [1][1][0][0][RTW89_UK][6] = 127, -+ [1][1][0][0][RTW89_FCC][7] = 127, -+ [1][1][0][0][RTW89_ETSI][7] = 127, -+ [1][1][0][0][RTW89_MKK][7] = 127, -+ [1][1][0][0][RTW89_IC][7] = 127, -+ [1][1][0][0][RTW89_KCC][7] = 127, -+ [1][1][0][0][RTW89_ACMA][7] = 127, -+ [1][1][0][0][RTW89_CN][7] = 127, -+ [1][1][0][0][RTW89_UK][7] = 127, -+ [1][1][0][0][RTW89_FCC][8] = 127, -+ [1][1][0][0][RTW89_ETSI][8] = 127, -+ [1][1][0][0][RTW89_MKK][8] = 127, -+ [1][1][0][0][RTW89_IC][8] = 127, -+ [1][1][0][0][RTW89_KCC][8] = 127, -+ [1][1][0][0][RTW89_ACMA][8] = 127, -+ [1][1][0][0][RTW89_CN][8] = 127, -+ [1][1][0][0][RTW89_UK][8] = 127, -+ [1][1][0][0][RTW89_FCC][9] = 127, -+ [1][1][0][0][RTW89_ETSI][9] = 127, -+ [1][1][0][0][RTW89_MKK][9] = 127, -+ [1][1][0][0][RTW89_IC][9] = 127, -+ [1][1][0][0][RTW89_KCC][9] = 127, -+ [1][1][0][0][RTW89_ACMA][9] = 127, -+ [1][1][0][0][RTW89_CN][9] = 127, -+ [1][1][0][0][RTW89_UK][9] = 127, -+ [1][1][0][0][RTW89_FCC][10] = 127, -+ [1][1][0][0][RTW89_ETSI][10] = 127, -+ [1][1][0][0][RTW89_MKK][10] = 127, -+ [1][1][0][0][RTW89_IC][10] = 127, -+ [1][1][0][0][RTW89_KCC][10] = 127, -+ [1][1][0][0][RTW89_ACMA][10] = 127, -+ [1][1][0][0][RTW89_CN][10] = 127, -+ [1][1][0][0][RTW89_UK][10] = 127, -+ [1][1][0][0][RTW89_FCC][11] = 127, -+ [1][1][0][0][RTW89_ETSI][11] = 127, -+ [1][1][0][0][RTW89_MKK][11] = 127, -+ [1][1][0][0][RTW89_IC][11] = 127, -+ [1][1][0][0][RTW89_KCC][11] = 127, -+ [1][1][0][0][RTW89_ACMA][11] = 127, -+ [1][1][0][0][RTW89_CN][11] = 127, -+ [1][1][0][0][RTW89_UK][11] = 127, -+ [1][1][0][0][RTW89_FCC][12] = 127, -+ [1][1][0][0][RTW89_ETSI][12] = 127, -+ [1][1][0][0][RTW89_MKK][12] = 127, -+ [1][1][0][0][RTW89_IC][12] = 127, -+ [1][1][0][0][RTW89_KCC][12] = 127, -+ [1][1][0][0][RTW89_ACMA][12] = 127, -+ [1][1][0][0][RTW89_CN][12] = 127, -+ [1][1][0][0][RTW89_UK][12] = 127, -+ [1][1][0][0][RTW89_FCC][13] = 127, -+ [1][1][0][0][RTW89_ETSI][13] = 127, -+ [1][1][0][0][RTW89_MKK][13] = 127, -+ [1][1][0][0][RTW89_IC][13] = 127, -+ [1][1][0][0][RTW89_KCC][13] = 127, -+ [1][1][0][0][RTW89_ACMA][13] = 127, -+ [1][1][0][0][RTW89_CN][13] = 127, -+ [1][1][0][0][RTW89_UK][13] = 127, -+ [0][0][1][0][RTW89_FCC][0] = 78, -+ [0][0][1][0][RTW89_ETSI][0] = 58, -+ [0][0][1][0][RTW89_MKK][0] = 72, -+ [0][0][1][0][RTW89_IC][0] = 78, -+ [0][0][1][0][RTW89_KCC][0] = 76, -+ [0][0][1][0][RTW89_ACMA][0] = 58, -+ [0][0][1][0][RTW89_CN][0] = 60, -+ [0][0][1][0][RTW89_UK][0] = 58, -+ [0][0][1][0][RTW89_FCC][1] = 78, -+ [0][0][1][0][RTW89_ETSI][1] = 60, -+ [0][0][1][0][RTW89_MKK][1] = 74, -+ [0][0][1][0][RTW89_IC][1] = 78, -+ [0][0][1][0][RTW89_KCC][1] = 76, -+ [0][0][1][0][RTW89_ACMA][1] = 60, -+ [0][0][1][0][RTW89_CN][1] = 60, -+ [0][0][1][0][RTW89_UK][1] = 60, -+ [0][0][1][0][RTW89_FCC][2] = 80, -+ [0][0][1][0][RTW89_ETSI][2] = 60, -+ [0][0][1][0][RTW89_MKK][2] = 74, -+ [0][0][1][0][RTW89_IC][2] = 80, -+ [0][0][1][0][RTW89_KCC][2] = 76, -+ [0][0][1][0][RTW89_ACMA][2] = 60, -+ [0][0][1][0][RTW89_CN][2] = 60, -+ [0][0][1][0][RTW89_UK][2] = 60, -+ [0][0][1][0][RTW89_FCC][3] = 80, -+ [0][0][1][0][RTW89_ETSI][3] = 60, -+ [0][0][1][0][RTW89_MKK][3] = 74, -+ [0][0][1][0][RTW89_IC][3] = 80, -+ [0][0][1][0][RTW89_KCC][3] = 76, -+ [0][0][1][0][RTW89_ACMA][3] = 60, -+ [0][0][1][0][RTW89_CN][3] = 60, -+ [0][0][1][0][RTW89_UK][3] = 60, -+ [0][0][1][0][RTW89_FCC][4] = 80, -+ [0][0][1][0][RTW89_ETSI][4] = 60, -+ [0][0][1][0][RTW89_MKK][4] = 74, -+ [0][0][1][0][RTW89_IC][4] = 80, -+ [0][0][1][0][RTW89_KCC][4] = 76, -+ [0][0][1][0][RTW89_ACMA][4] = 60, -+ [0][0][1][0][RTW89_CN][4] = 60, -+ [0][0][1][0][RTW89_UK][4] = 60, -+ [0][0][1][0][RTW89_FCC][5] = 80, -+ [0][0][1][0][RTW89_ETSI][5] = 60, -+ [0][0][1][0][RTW89_MKK][5] = 74, -+ [0][0][1][0][RTW89_IC][5] = 80, -+ [0][0][1][0][RTW89_KCC][5] = 76, -+ [0][0][1][0][RTW89_ACMA][5] = 60, -+ [0][0][1][0][RTW89_CN][5] = 60, -+ [0][0][1][0][RTW89_UK][5] = 60, -+ [0][0][1][0][RTW89_FCC][6] = 80, -+ [0][0][1][0][RTW89_ETSI][6] = 60, -+ [0][0][1][0][RTW89_MKK][6] = 74, -+ [0][0][1][0][RTW89_IC][6] = 80, -+ [0][0][1][0][RTW89_KCC][6] = 76, -+ [0][0][1][0][RTW89_ACMA][6] = 60, -+ [0][0][1][0][RTW89_CN][6] = 60, -+ [0][0][1][0][RTW89_UK][6] = 60, -+ [0][0][1][0][RTW89_FCC][7] = 80, -+ [0][0][1][0][RTW89_ETSI][7] = 60, -+ [0][0][1][0][RTW89_MKK][7] = 74, -+ [0][0][1][0][RTW89_IC][7] = 80, -+ [0][0][1][0][RTW89_KCC][7] = 76, -+ [0][0][1][0][RTW89_ACMA][7] = 60, -+ [0][0][1][0][RTW89_CN][7] = 60, -+ [0][0][1][0][RTW89_UK][7] = 60, -+ [0][0][1][0][RTW89_FCC][8] = 80, -+ [0][0][1][0][RTW89_ETSI][8] = 60, -+ [0][0][1][0][RTW89_MKK][8] = 74, -+ [0][0][1][0][RTW89_IC][8] = 80, -+ [0][0][1][0][RTW89_KCC][8] = 76, -+ [0][0][1][0][RTW89_ACMA][8] = 60, -+ [0][0][1][0][RTW89_CN][8] = 60, -+ [0][0][1][0][RTW89_UK][8] = 60, -+ [0][0][1][0][RTW89_FCC][9] = 76, -+ [0][0][1][0][RTW89_ETSI][9] = 60, -+ [0][0][1][0][RTW89_MKK][9] = 74, -+ [0][0][1][0][RTW89_IC][9] = 76, -+ [0][0][1][0][RTW89_KCC][9] = 74, -+ [0][0][1][0][RTW89_ACMA][9] = 60, -+ [0][0][1][0][RTW89_CN][9] = 60, -+ [0][0][1][0][RTW89_UK][9] = 60, -+ [0][0][1][0][RTW89_FCC][10] = 76, -+ [0][0][1][0][RTW89_ETSI][10] = 60, -+ [0][0][1][0][RTW89_MKK][10] = 74, -+ [0][0][1][0][RTW89_IC][10] = 76, -+ [0][0][1][0][RTW89_KCC][10] = 74, -+ [0][0][1][0][RTW89_ACMA][10] = 60, -+ [0][0][1][0][RTW89_CN][10] = 60, -+ [0][0][1][0][RTW89_UK][10] = 60, -+ [0][0][1][0][RTW89_FCC][11] = 68, -+ [0][0][1][0][RTW89_ETSI][11] = 60, -+ [0][0][1][0][RTW89_MKK][11] = 74, -+ [0][0][1][0][RTW89_IC][11] = 68, -+ [0][0][1][0][RTW89_KCC][11] = 74, -+ [0][0][1][0][RTW89_ACMA][11] = 60, -+ [0][0][1][0][RTW89_CN][11] = 60, -+ [0][0][1][0][RTW89_UK][11] = 60, -+ [0][0][1][0][RTW89_FCC][12] = 64, -+ [0][0][1][0][RTW89_ETSI][12] = 58, -+ [0][0][1][0][RTW89_MKK][12] = 70, -+ [0][0][1][0][RTW89_IC][12] = 64, -+ [0][0][1][0][RTW89_KCC][12] = 74, -+ [0][0][1][0][RTW89_ACMA][12] = 58, -+ [0][0][1][0][RTW89_CN][12] = 60, -+ [0][0][1][0][RTW89_UK][12] = 58, -+ [0][0][1][0][RTW89_FCC][13] = 127, -+ [0][0][1][0][RTW89_ETSI][13] = 127, -+ [0][0][1][0][RTW89_MKK][13] = 127, -+ [0][0][1][0][RTW89_IC][13] = 127, -+ [0][0][1][0][RTW89_KCC][13] = 127, -+ [0][0][1][0][RTW89_ACMA][13] = 127, -+ [0][0][1][0][RTW89_CN][13] = 127, -+ [0][0][1][0][RTW89_UK][13] = 127, -+ [0][1][1][0][RTW89_FCC][0] = 127, -+ [0][1][1][0][RTW89_ETSI][0] = 127, -+ [0][1][1][0][RTW89_MKK][0] = 127, -+ [0][1][1][0][RTW89_IC][0] = 127, -+ [0][1][1][0][RTW89_KCC][0] = 127, -+ [0][1][1][0][RTW89_ACMA][0] = 127, -+ [0][1][1][0][RTW89_CN][0] = 127, -+ [0][1][1][0][RTW89_UK][0] = 127, -+ [0][1][1][0][RTW89_FCC][1] = 127, -+ [0][1][1][0][RTW89_ETSI][1] = 127, -+ [0][1][1][0][RTW89_MKK][1] = 127, -+ [0][1][1][0][RTW89_IC][1] = 127, -+ [0][1][1][0][RTW89_KCC][1] = 127, -+ [0][1][1][0][RTW89_ACMA][1] = 127, -+ [0][1][1][0][RTW89_CN][1] = 127, -+ [0][1][1][0][RTW89_UK][1] = 127, -+ [0][1][1][0][RTW89_FCC][2] = 127, -+ [0][1][1][0][RTW89_ETSI][2] = 127, -+ [0][1][1][0][RTW89_MKK][2] = 127, -+ [0][1][1][0][RTW89_IC][2] = 127, -+ [0][1][1][0][RTW89_KCC][2] = 127, -+ [0][1][1][0][RTW89_ACMA][2] = 127, -+ [0][1][1][0][RTW89_CN][2] = 127, -+ [0][1][1][0][RTW89_UK][2] = 127, -+ [0][1][1][0][RTW89_FCC][3] = 127, -+ [0][1][1][0][RTW89_ETSI][3] = 127, -+ [0][1][1][0][RTW89_MKK][3] = 127, -+ [0][1][1][0][RTW89_IC][3] = 127, -+ [0][1][1][0][RTW89_KCC][3] = 127, -+ [0][1][1][0][RTW89_ACMA][3] = 127, -+ [0][1][1][0][RTW89_CN][3] = 127, -+ [0][1][1][0][RTW89_UK][3] = 127, -+ [0][1][1][0][RTW89_FCC][4] = 127, -+ [0][1][1][0][RTW89_ETSI][4] = 127, -+ [0][1][1][0][RTW89_MKK][4] = 127, -+ [0][1][1][0][RTW89_IC][4] = 127, -+ [0][1][1][0][RTW89_KCC][4] = 127, -+ [0][1][1][0][RTW89_ACMA][4] = 127, -+ [0][1][1][0][RTW89_CN][4] = 127, -+ [0][1][1][0][RTW89_UK][4] = 127, -+ [0][1][1][0][RTW89_FCC][5] = 127, -+ [0][1][1][0][RTW89_ETSI][5] = 127, -+ [0][1][1][0][RTW89_MKK][5] = 127, -+ [0][1][1][0][RTW89_IC][5] = 127, -+ [0][1][1][0][RTW89_KCC][5] = 127, -+ [0][1][1][0][RTW89_ACMA][5] = 127, -+ [0][1][1][0][RTW89_CN][5] = 127, -+ [0][1][1][0][RTW89_UK][5] = 127, -+ [0][1][1][0][RTW89_FCC][6] = 127, -+ [0][1][1][0][RTW89_ETSI][6] = 127, -+ [0][1][1][0][RTW89_MKK][6] = 127, -+ [0][1][1][0][RTW89_IC][6] = 127, -+ [0][1][1][0][RTW89_KCC][6] = 127, -+ [0][1][1][0][RTW89_ACMA][6] = 127, -+ [0][1][1][0][RTW89_CN][6] = 127, -+ [0][1][1][0][RTW89_UK][6] = 127, -+ [0][1][1][0][RTW89_FCC][7] = 127, -+ [0][1][1][0][RTW89_ETSI][7] = 127, -+ [0][1][1][0][RTW89_MKK][7] = 127, -+ [0][1][1][0][RTW89_IC][7] = 127, -+ [0][1][1][0][RTW89_KCC][7] = 127, -+ [0][1][1][0][RTW89_ACMA][7] = 127, -+ [0][1][1][0][RTW89_CN][7] = 127, -+ [0][1][1][0][RTW89_UK][7] = 127, -+ [0][1][1][0][RTW89_FCC][8] = 127, -+ [0][1][1][0][RTW89_ETSI][8] = 127, -+ [0][1][1][0][RTW89_MKK][8] = 127, -+ [0][1][1][0][RTW89_IC][8] = 127, -+ [0][1][1][0][RTW89_KCC][8] = 127, -+ [0][1][1][0][RTW89_ACMA][8] = 127, -+ [0][1][1][0][RTW89_CN][8] = 127, -+ [0][1][1][0][RTW89_UK][8] = 127, -+ [0][1][1][0][RTW89_FCC][9] = 127, -+ [0][1][1][0][RTW89_ETSI][9] = 127, -+ [0][1][1][0][RTW89_MKK][9] = 127, -+ [0][1][1][0][RTW89_IC][9] = 127, -+ [0][1][1][0][RTW89_KCC][9] = 127, -+ [0][1][1][0][RTW89_ACMA][9] = 127, -+ [0][1][1][0][RTW89_CN][9] = 127, -+ [0][1][1][0][RTW89_UK][9] = 127, -+ [0][1][1][0][RTW89_FCC][10] = 127, -+ [0][1][1][0][RTW89_ETSI][10] = 127, -+ [0][1][1][0][RTW89_MKK][10] = 127, -+ [0][1][1][0][RTW89_IC][10] = 127, -+ [0][1][1][0][RTW89_KCC][10] = 127, -+ [0][1][1][0][RTW89_ACMA][10] = 127, -+ [0][1][1][0][RTW89_CN][10] = 127, -+ [0][1][1][0][RTW89_UK][10] = 127, -+ [0][1][1][0][RTW89_FCC][11] = 127, -+ [0][1][1][0][RTW89_ETSI][11] = 127, -+ [0][1][1][0][RTW89_MKK][11] = 127, -+ [0][1][1][0][RTW89_IC][11] = 127, -+ [0][1][1][0][RTW89_KCC][11] = 127, -+ [0][1][1][0][RTW89_ACMA][11] = 127, -+ [0][1][1][0][RTW89_CN][11] = 127, -+ [0][1][1][0][RTW89_UK][11] = 127, -+ [0][1][1][0][RTW89_FCC][12] = 127, -+ [0][1][1][0][RTW89_ETSI][12] = 127, -+ [0][1][1][0][RTW89_MKK][12] = 127, -+ [0][1][1][0][RTW89_IC][12] = 127, -+ [0][1][1][0][RTW89_KCC][12] = 127, -+ [0][1][1][0][RTW89_ACMA][12] = 127, -+ [0][1][1][0][RTW89_CN][12] = 127, -+ [0][1][1][0][RTW89_UK][12] = 127, -+ [0][1][1][0][RTW89_FCC][13] = 127, -+ [0][1][1][0][RTW89_ETSI][13] = 127, -+ [0][1][1][0][RTW89_MKK][13] = 127, -+ [0][1][1][0][RTW89_IC][13] = 127, -+ [0][1][1][0][RTW89_KCC][13] = 127, -+ [0][1][1][0][RTW89_ACMA][13] = 127, -+ [0][1][1][0][RTW89_CN][13] = 127, -+ [0][1][1][0][RTW89_UK][13] = 127, -+ [0][0][2][0][RTW89_FCC][0] = 78, -+ [0][0][2][0][RTW89_ETSI][0] = 60, -+ [0][0][2][0][RTW89_MKK][0] = 72, -+ [0][0][2][0][RTW89_IC][0] = 78, -+ [0][0][2][0][RTW89_KCC][0] = 76, -+ [0][0][2][0][RTW89_ACMA][0] = 60, -+ [0][0][2][0][RTW89_CN][0] = 60, -+ [0][0][2][0][RTW89_UK][0] = 60, -+ [0][0][2][0][RTW89_FCC][1] = 78, -+ [0][0][2][0][RTW89_ETSI][1] = 60, -+ [0][0][2][0][RTW89_MKK][1] = 76, -+ [0][0][2][0][RTW89_IC][1] = 78, -+ [0][0][2][0][RTW89_KCC][1] = 76, -+ [0][0][2][0][RTW89_ACMA][1] = 60, -+ [0][0][2][0][RTW89_CN][1] = 60, -+ [0][0][2][0][RTW89_UK][1] = 60, -+ [0][0][2][0][RTW89_FCC][2] = 80, -+ [0][0][2][0][RTW89_ETSI][2] = 60, -+ [0][0][2][0][RTW89_MKK][2] = 76, -+ [0][0][2][0][RTW89_IC][2] = 80, -+ [0][0][2][0][RTW89_KCC][2] = 76, -+ [0][0][2][0][RTW89_ACMA][2] = 60, -+ [0][0][2][0][RTW89_CN][2] = 60, -+ [0][0][2][0][RTW89_UK][2] = 60, -+ [0][0][2][0][RTW89_FCC][3] = 80, -+ [0][0][2][0][RTW89_ETSI][3] = 60, -+ [0][0][2][0][RTW89_MKK][3] = 76, -+ [0][0][2][0][RTW89_IC][3] = 80, -+ [0][0][2][0][RTW89_KCC][3] = 76, -+ [0][0][2][0][RTW89_ACMA][3] = 60, -+ [0][0][2][0][RTW89_CN][3] = 60, -+ [0][0][2][0][RTW89_UK][3] = 60, -+ [0][0][2][0][RTW89_FCC][4] = 80, -+ [0][0][2][0][RTW89_ETSI][4] = 60, -+ [0][0][2][0][RTW89_MKK][4] = 76, -+ [0][0][2][0][RTW89_IC][4] = 80, -+ [0][0][2][0][RTW89_KCC][4] = 76, -+ [0][0][2][0][RTW89_ACMA][4] = 60, -+ [0][0][2][0][RTW89_CN][4] = 60, -+ [0][0][2][0][RTW89_UK][4] = 60, -+ [0][0][2][0][RTW89_FCC][5] = 80, -+ [0][0][2][0][RTW89_ETSI][5] = 60, -+ [0][0][2][0][RTW89_MKK][5] = 76, -+ [0][0][2][0][RTW89_IC][5] = 80, -+ [0][0][2][0][RTW89_KCC][5] = 76, -+ [0][0][2][0][RTW89_ACMA][5] = 60, -+ [0][0][2][0][RTW89_CN][5] = 60, -+ [0][0][2][0][RTW89_UK][5] = 60, -+ [0][0][2][0][RTW89_FCC][6] = 80, -+ [0][0][2][0][RTW89_ETSI][6] = 60, -+ [0][0][2][0][RTW89_MKK][6] = 76, -+ [0][0][2][0][RTW89_IC][6] = 80, -+ [0][0][2][0][RTW89_KCC][6] = 76, -+ [0][0][2][0][RTW89_ACMA][6] = 60, -+ [0][0][2][0][RTW89_CN][6] = 60, -+ [0][0][2][0][RTW89_UK][6] = 60, -+ [0][0][2][0][RTW89_FCC][7] = 80, -+ [0][0][2][0][RTW89_ETSI][7] = 60, -+ [0][0][2][0][RTW89_MKK][7] = 76, -+ [0][0][2][0][RTW89_IC][7] = 80, -+ [0][0][2][0][RTW89_KCC][7] = 76, -+ [0][0][2][0][RTW89_ACMA][7] = 60, -+ [0][0][2][0][RTW89_CN][7] = 60, -+ [0][0][2][0][RTW89_UK][7] = 60, -+ [0][0][2][0][RTW89_FCC][8] = 78, -+ [0][0][2][0][RTW89_ETSI][8] = 60, -+ [0][0][2][0][RTW89_MKK][8] = 76, -+ [0][0][2][0][RTW89_IC][8] = 78, -+ [0][0][2][0][RTW89_KCC][8] = 76, -+ [0][0][2][0][RTW89_ACMA][8] = 60, -+ [0][0][2][0][RTW89_CN][8] = 60, -+ [0][0][2][0][RTW89_UK][8] = 60, -+ [0][0][2][0][RTW89_FCC][9] = 74, -+ [0][0][2][0][RTW89_ETSI][9] = 60, -+ [0][0][2][0][RTW89_MKK][9] = 76, -+ [0][0][2][0][RTW89_IC][9] = 74, -+ [0][0][2][0][RTW89_KCC][9] = 76, -+ [0][0][2][0][RTW89_ACMA][9] = 60, -+ [0][0][2][0][RTW89_CN][9] = 60, -+ [0][0][2][0][RTW89_UK][9] = 60, -+ [0][0][2][0][RTW89_FCC][10] = 74, -+ [0][0][2][0][RTW89_ETSI][10] = 60, -+ [0][0][2][0][RTW89_MKK][10] = 76, -+ [0][0][2][0][RTW89_IC][10] = 74, -+ [0][0][2][0][RTW89_KCC][10] = 76, -+ [0][0][2][0][RTW89_ACMA][10] = 60, -+ [0][0][2][0][RTW89_CN][10] = 60, -+ [0][0][2][0][RTW89_UK][10] = 60, -+ [0][0][2][0][RTW89_FCC][11] = 68, -+ [0][0][2][0][RTW89_ETSI][11] = 60, -+ [0][0][2][0][RTW89_MKK][11] = 76, -+ [0][0][2][0][RTW89_IC][11] = 68, -+ [0][0][2][0][RTW89_KCC][11] = 76, -+ [0][0][2][0][RTW89_ACMA][11] = 60, -+ [0][0][2][0][RTW89_CN][11] = 60, -+ [0][0][2][0][RTW89_UK][11] = 60, -+ [0][0][2][0][RTW89_FCC][12] = 68, -+ [0][0][2][0][RTW89_ETSI][12] = 60, -+ [0][0][2][0][RTW89_MKK][12] = 70, -+ [0][0][2][0][RTW89_IC][12] = 68, -+ [0][0][2][0][RTW89_KCC][12] = 76, -+ [0][0][2][0][RTW89_ACMA][12] = 60, -+ [0][0][2][0][RTW89_CN][12] = 60, -+ [0][0][2][0][RTW89_UK][12] = 60, -+ [0][0][2][0][RTW89_FCC][13] = 127, -+ [0][0][2][0][RTW89_ETSI][13] = 127, -+ [0][0][2][0][RTW89_MKK][13] = 127, -+ [0][0][2][0][RTW89_IC][13] = 127, -+ [0][0][2][0][RTW89_KCC][13] = 127, -+ [0][0][2][0][RTW89_ACMA][13] = 127, -+ [0][0][2][0][RTW89_CN][13] = 127, -+ [0][0][2][0][RTW89_UK][13] = 127, -+ [0][1][2][0][RTW89_FCC][0] = 127, -+ [0][1][2][0][RTW89_ETSI][0] = 127, -+ [0][1][2][0][RTW89_MKK][0] = 127, -+ [0][1][2][0][RTW89_IC][0] = 127, -+ [0][1][2][0][RTW89_KCC][0] = 127, -+ [0][1][2][0][RTW89_ACMA][0] = 127, -+ [0][1][2][0][RTW89_CN][0] = 127, -+ [0][1][2][0][RTW89_UK][0] = 127, -+ [0][1][2][0][RTW89_FCC][1] = 127, -+ [0][1][2][0][RTW89_ETSI][1] = 127, -+ [0][1][2][0][RTW89_MKK][1] = 127, -+ [0][1][2][0][RTW89_IC][1] = 127, -+ [0][1][2][0][RTW89_KCC][1] = 127, -+ [0][1][2][0][RTW89_ACMA][1] = 127, -+ [0][1][2][0][RTW89_CN][1] = 127, -+ [0][1][2][0][RTW89_UK][1] = 127, -+ [0][1][2][0][RTW89_FCC][2] = 127, -+ [0][1][2][0][RTW89_ETSI][2] = 127, -+ [0][1][2][0][RTW89_MKK][2] = 127, -+ [0][1][2][0][RTW89_IC][2] = 127, -+ [0][1][2][0][RTW89_KCC][2] = 127, -+ [0][1][2][0][RTW89_ACMA][2] = 127, -+ [0][1][2][0][RTW89_CN][2] = 127, -+ [0][1][2][0][RTW89_UK][2] = 127, -+ [0][1][2][0][RTW89_FCC][3] = 127, -+ [0][1][2][0][RTW89_ETSI][3] = 127, -+ [0][1][2][0][RTW89_MKK][3] = 127, -+ [0][1][2][0][RTW89_IC][3] = 127, -+ [0][1][2][0][RTW89_KCC][3] = 127, -+ [0][1][2][0][RTW89_ACMA][3] = 127, -+ [0][1][2][0][RTW89_CN][3] = 127, -+ [0][1][2][0][RTW89_UK][3] = 127, -+ [0][1][2][0][RTW89_FCC][4] = 127, -+ [0][1][2][0][RTW89_ETSI][4] = 127, -+ [0][1][2][0][RTW89_MKK][4] = 127, -+ [0][1][2][0][RTW89_IC][4] = 127, -+ [0][1][2][0][RTW89_KCC][4] = 127, -+ [0][1][2][0][RTW89_ACMA][4] = 127, -+ [0][1][2][0][RTW89_CN][4] = 127, -+ [0][1][2][0][RTW89_UK][4] = 127, -+ [0][1][2][0][RTW89_FCC][5] = 127, -+ [0][1][2][0][RTW89_ETSI][5] = 127, -+ [0][1][2][0][RTW89_MKK][5] = 127, -+ [0][1][2][0][RTW89_IC][5] = 127, -+ [0][1][2][0][RTW89_KCC][5] = 127, -+ [0][1][2][0][RTW89_ACMA][5] = 127, -+ [0][1][2][0][RTW89_CN][5] = 127, -+ [0][1][2][0][RTW89_UK][5] = 127, -+ [0][1][2][0][RTW89_FCC][6] = 127, -+ [0][1][2][0][RTW89_ETSI][6] = 127, -+ [0][1][2][0][RTW89_MKK][6] = 127, -+ [0][1][2][0][RTW89_IC][6] = 127, -+ [0][1][2][0][RTW89_KCC][6] = 127, -+ [0][1][2][0][RTW89_ACMA][6] = 127, -+ [0][1][2][0][RTW89_CN][6] = 127, -+ [0][1][2][0][RTW89_UK][6] = 127, -+ [0][1][2][0][RTW89_FCC][7] = 127, -+ [0][1][2][0][RTW89_ETSI][7] = 127, -+ [0][1][2][0][RTW89_MKK][7] = 127, -+ [0][1][2][0][RTW89_IC][7] = 127, -+ [0][1][2][0][RTW89_KCC][7] = 127, -+ [0][1][2][0][RTW89_ACMA][7] = 127, -+ [0][1][2][0][RTW89_CN][7] = 127, -+ [0][1][2][0][RTW89_UK][7] = 127, -+ [0][1][2][0][RTW89_FCC][8] = 127, -+ [0][1][2][0][RTW89_ETSI][8] = 127, -+ [0][1][2][0][RTW89_MKK][8] = 127, -+ [0][1][2][0][RTW89_IC][8] = 127, -+ [0][1][2][0][RTW89_KCC][8] = 127, -+ [0][1][2][0][RTW89_ACMA][8] = 127, -+ [0][1][2][0][RTW89_CN][8] = 127, -+ [0][1][2][0][RTW89_UK][8] = 127, -+ [0][1][2][0][RTW89_FCC][9] = 127, -+ [0][1][2][0][RTW89_ETSI][9] = 127, -+ [0][1][2][0][RTW89_MKK][9] = 127, -+ [0][1][2][0][RTW89_IC][9] = 127, -+ [0][1][2][0][RTW89_KCC][9] = 127, -+ [0][1][2][0][RTW89_ACMA][9] = 127, -+ [0][1][2][0][RTW89_CN][9] = 127, -+ [0][1][2][0][RTW89_UK][9] = 127, -+ [0][1][2][0][RTW89_FCC][10] = 127, -+ [0][1][2][0][RTW89_ETSI][10] = 127, -+ [0][1][2][0][RTW89_MKK][10] = 127, -+ [0][1][2][0][RTW89_IC][10] = 127, -+ [0][1][2][0][RTW89_KCC][10] = 127, -+ [0][1][2][0][RTW89_ACMA][10] = 127, -+ [0][1][2][0][RTW89_CN][10] = 127, -+ [0][1][2][0][RTW89_UK][10] = 127, -+ [0][1][2][0][RTW89_FCC][11] = 127, -+ [0][1][2][0][RTW89_ETSI][11] = 127, -+ [0][1][2][0][RTW89_MKK][11] = 127, -+ [0][1][2][0][RTW89_IC][11] = 127, -+ [0][1][2][0][RTW89_KCC][11] = 127, -+ [0][1][2][0][RTW89_ACMA][11] = 127, -+ [0][1][2][0][RTW89_CN][11] = 127, -+ [0][1][2][0][RTW89_UK][11] = 127, -+ [0][1][2][0][RTW89_FCC][12] = 127, -+ [0][1][2][0][RTW89_ETSI][12] = 127, -+ [0][1][2][0][RTW89_MKK][12] = 127, -+ [0][1][2][0][RTW89_IC][12] = 127, -+ [0][1][2][0][RTW89_KCC][12] = 127, -+ [0][1][2][0][RTW89_ACMA][12] = 127, -+ [0][1][2][0][RTW89_CN][12] = 127, -+ [0][1][2][0][RTW89_UK][12] = 127, -+ [0][1][2][0][RTW89_FCC][13] = 127, -+ [0][1][2][0][RTW89_ETSI][13] = 127, -+ [0][1][2][0][RTW89_MKK][13] = 127, -+ [0][1][2][0][RTW89_IC][13] = 127, -+ [0][1][2][0][RTW89_KCC][13] = 127, -+ [0][1][2][0][RTW89_ACMA][13] = 127, -+ [0][1][2][0][RTW89_CN][13] = 127, -+ [0][1][2][0][RTW89_UK][13] = 127, -+ [0][1][2][1][RTW89_FCC][0] = 127, -+ [0][1][2][1][RTW89_ETSI][0] = 127, -+ [0][1][2][1][RTW89_MKK][0] = 127, -+ [0][1][2][1][RTW89_IC][0] = 127, -+ [0][1][2][1][RTW89_KCC][0] = 127, -+ [0][1][2][1][RTW89_ACMA][0] = 127, -+ [0][1][2][1][RTW89_CN][0] = 127, -+ [0][1][2][1][RTW89_UK][0] = 127, -+ [0][1][2][1][RTW89_FCC][1] = 127, -+ [0][1][2][1][RTW89_ETSI][1] = 127, -+ [0][1][2][1][RTW89_MKK][1] = 127, -+ [0][1][2][1][RTW89_IC][1] = 127, -+ [0][1][2][1][RTW89_KCC][1] = 127, -+ [0][1][2][1][RTW89_ACMA][1] = 127, -+ [0][1][2][1][RTW89_CN][1] = 127, -+ [0][1][2][1][RTW89_UK][1] = 127, -+ [0][1][2][1][RTW89_FCC][2] = 127, -+ [0][1][2][1][RTW89_ETSI][2] = 127, -+ [0][1][2][1][RTW89_MKK][2] = 127, -+ [0][1][2][1][RTW89_IC][2] = 127, -+ [0][1][2][1][RTW89_KCC][2] = 127, -+ [0][1][2][1][RTW89_ACMA][2] = 127, -+ [0][1][2][1][RTW89_CN][2] = 127, -+ [0][1][2][1][RTW89_UK][2] = 127, -+ [0][1][2][1][RTW89_FCC][3] = 127, -+ [0][1][2][1][RTW89_ETSI][3] = 127, -+ [0][1][2][1][RTW89_MKK][3] = 127, -+ [0][1][2][1][RTW89_IC][3] = 127, -+ [0][1][2][1][RTW89_KCC][3] = 127, -+ [0][1][2][1][RTW89_ACMA][3] = 127, -+ [0][1][2][1][RTW89_CN][3] = 127, -+ [0][1][2][1][RTW89_UK][3] = 127, -+ [0][1][2][1][RTW89_FCC][4] = 127, -+ [0][1][2][1][RTW89_ETSI][4] = 127, -+ [0][1][2][1][RTW89_MKK][4] = 127, -+ [0][1][2][1][RTW89_IC][4] = 127, -+ [0][1][2][1][RTW89_KCC][4] = 127, -+ [0][1][2][1][RTW89_ACMA][4] = 127, -+ [0][1][2][1][RTW89_CN][4] = 127, -+ [0][1][2][1][RTW89_UK][4] = 127, -+ [0][1][2][1][RTW89_FCC][5] = 127, -+ [0][1][2][1][RTW89_ETSI][5] = 127, -+ [0][1][2][1][RTW89_MKK][5] = 127, -+ [0][1][2][1][RTW89_IC][5] = 127, -+ [0][1][2][1][RTW89_KCC][5] = 127, -+ [0][1][2][1][RTW89_ACMA][5] = 127, -+ [0][1][2][1][RTW89_CN][5] = 127, -+ [0][1][2][1][RTW89_UK][5] = 127, -+ [0][1][2][1][RTW89_FCC][6] = 127, -+ [0][1][2][1][RTW89_ETSI][6] = 127, -+ [0][1][2][1][RTW89_MKK][6] = 127, -+ [0][1][2][1][RTW89_IC][6] = 127, -+ [0][1][2][1][RTW89_KCC][6] = 127, -+ [0][1][2][1][RTW89_ACMA][6] = 127, -+ [0][1][2][1][RTW89_CN][6] = 127, -+ [0][1][2][1][RTW89_UK][6] = 127, -+ [0][1][2][1][RTW89_FCC][7] = 127, -+ [0][1][2][1][RTW89_ETSI][7] = 127, -+ [0][1][2][1][RTW89_MKK][7] = 127, -+ [0][1][2][1][RTW89_IC][7] = 127, -+ [0][1][2][1][RTW89_KCC][7] = 127, -+ [0][1][2][1][RTW89_ACMA][7] = 127, -+ [0][1][2][1][RTW89_CN][7] = 127, -+ [0][1][2][1][RTW89_UK][7] = 127, -+ [0][1][2][1][RTW89_FCC][8] = 127, -+ [0][1][2][1][RTW89_ETSI][8] = 127, -+ [0][1][2][1][RTW89_MKK][8] = 127, -+ [0][1][2][1][RTW89_IC][8] = 127, -+ [0][1][2][1][RTW89_KCC][8] = 127, -+ [0][1][2][1][RTW89_ACMA][8] = 127, -+ [0][1][2][1][RTW89_CN][8] = 127, -+ [0][1][2][1][RTW89_UK][8] = 127, -+ [0][1][2][1][RTW89_FCC][9] = 127, -+ [0][1][2][1][RTW89_ETSI][9] = 127, -+ [0][1][2][1][RTW89_MKK][9] = 127, -+ [0][1][2][1][RTW89_IC][9] = 127, -+ [0][1][2][1][RTW89_KCC][9] = 127, -+ [0][1][2][1][RTW89_ACMA][9] = 127, -+ [0][1][2][1][RTW89_CN][9] = 127, -+ [0][1][2][1][RTW89_UK][9] = 127, -+ [0][1][2][1][RTW89_FCC][10] = 127, -+ [0][1][2][1][RTW89_ETSI][10] = 127, -+ [0][1][2][1][RTW89_MKK][10] = 127, -+ [0][1][2][1][RTW89_IC][10] = 127, -+ [0][1][2][1][RTW89_KCC][10] = 127, -+ [0][1][2][1][RTW89_ACMA][10] = 127, -+ [0][1][2][1][RTW89_CN][10] = 127, -+ [0][1][2][1][RTW89_UK][10] = 127, -+ [0][1][2][1][RTW89_FCC][11] = 127, -+ [0][1][2][1][RTW89_ETSI][11] = 127, -+ [0][1][2][1][RTW89_MKK][11] = 127, -+ [0][1][2][1][RTW89_IC][11] = 127, -+ [0][1][2][1][RTW89_KCC][11] = 127, -+ [0][1][2][1][RTW89_ACMA][11] = 127, -+ [0][1][2][1][RTW89_CN][11] = 127, -+ [0][1][2][1][RTW89_UK][11] = 127, -+ [0][1][2][1][RTW89_FCC][12] = 127, -+ [0][1][2][1][RTW89_ETSI][12] = 127, -+ [0][1][2][1][RTW89_MKK][12] = 127, -+ [0][1][2][1][RTW89_IC][12] = 127, -+ [0][1][2][1][RTW89_KCC][12] = 127, -+ [0][1][2][1][RTW89_ACMA][12] = 127, -+ [0][1][2][1][RTW89_CN][12] = 127, -+ [0][1][2][1][RTW89_UK][12] = 127, -+ [0][1][2][1][RTW89_FCC][13] = 127, -+ [0][1][2][1][RTW89_ETSI][13] = 127, -+ [0][1][2][1][RTW89_MKK][13] = 127, -+ [0][1][2][1][RTW89_IC][13] = 127, -+ [0][1][2][1][RTW89_KCC][13] = 127, -+ [0][1][2][1][RTW89_ACMA][13] = 127, -+ [0][1][2][1][RTW89_CN][13] = 127, -+ [0][1][2][1][RTW89_UK][13] = 127, -+ [1][0][2][0][RTW89_FCC][0] = 127, -+ [1][0][2][0][RTW89_ETSI][0] = 127, -+ [1][0][2][0][RTW89_MKK][0] = 127, -+ [1][0][2][0][RTW89_IC][0] = 127, -+ [1][0][2][0][RTW89_KCC][0] = 127, -+ [1][0][2][0][RTW89_ACMA][0] = 127, -+ [1][0][2][0][RTW89_CN][0] = 127, -+ [1][0][2][0][RTW89_UK][0] = 127, -+ [1][0][2][0][RTW89_FCC][1] = 127, -+ [1][0][2][0][RTW89_ETSI][1] = 127, -+ [1][0][2][0][RTW89_MKK][1] = 127, -+ [1][0][2][0][RTW89_IC][1] = 127, -+ [1][0][2][0][RTW89_KCC][1] = 127, -+ [1][0][2][0][RTW89_ACMA][1] = 127, -+ [1][0][2][0][RTW89_CN][1] = 127, -+ [1][0][2][0][RTW89_UK][1] = 127, -+ [1][0][2][0][RTW89_FCC][2] = 70, -+ [1][0][2][0][RTW89_ETSI][2] = 58, -+ [1][0][2][0][RTW89_MKK][2] = 76, -+ [1][0][2][0][RTW89_IC][2] = 70, -+ [1][0][2][0][RTW89_KCC][2] = 76, -+ [1][0][2][0][RTW89_ACMA][2] = 58, -+ [1][0][2][0][RTW89_CN][2] = 60, -+ [1][0][2][0][RTW89_UK][2] = 58, -+ [1][0][2][0][RTW89_FCC][3] = 70, -+ [1][0][2][0][RTW89_ETSI][3] = 58, -+ [1][0][2][0][RTW89_MKK][3] = 76, -+ [1][0][2][0][RTW89_IC][3] = 70, -+ [1][0][2][0][RTW89_KCC][3] = 76, -+ [1][0][2][0][RTW89_ACMA][3] = 58, -+ [1][0][2][0][RTW89_CN][3] = 60, -+ [1][0][2][0][RTW89_UK][3] = 58, -+ [1][0][2][0][RTW89_FCC][4] = 74, -+ [1][0][2][0][RTW89_ETSI][4] = 58, -+ [1][0][2][0][RTW89_MKK][4] = 76, -+ [1][0][2][0][RTW89_IC][4] = 74, -+ [1][0][2][0][RTW89_KCC][4] = 76, -+ [1][0][2][0][RTW89_ACMA][4] = 58, -+ [1][0][2][0][RTW89_CN][4] = 60, -+ [1][0][2][0][RTW89_UK][4] = 58, -+ [1][0][2][0][RTW89_FCC][5] = 76, -+ [1][0][2][0][RTW89_ETSI][5] = 58, -+ [1][0][2][0][RTW89_MKK][5] = 76, -+ [1][0][2][0][RTW89_IC][5] = 76, -+ [1][0][2][0][RTW89_KCC][5] = 76, -+ [1][0][2][0][RTW89_ACMA][5] = 58, -+ [1][0][2][0][RTW89_CN][5] = 60, -+ [1][0][2][0][RTW89_UK][5] = 58, -+ [1][0][2][0][RTW89_FCC][6] = 76, -+ [1][0][2][0][RTW89_ETSI][6] = 58, -+ [1][0][2][0][RTW89_MKK][6] = 76, -+ [1][0][2][0][RTW89_IC][6] = 76, -+ [1][0][2][0][RTW89_KCC][6] = 76, -+ [1][0][2][0][RTW89_ACMA][6] = 58, -+ [1][0][2][0][RTW89_CN][6] = 60, -+ [1][0][2][0][RTW89_UK][6] = 58, -+ [1][0][2][0][RTW89_FCC][7] = 76, -+ [1][0][2][0][RTW89_ETSI][7] = 58, -+ [1][0][2][0][RTW89_MKK][7] = 76, -+ [1][0][2][0][RTW89_IC][7] = 76, -+ [1][0][2][0][RTW89_KCC][7] = 76, -+ [1][0][2][0][RTW89_ACMA][7] = 58, -+ [1][0][2][0][RTW89_CN][7] = 60, -+ [1][0][2][0][RTW89_UK][7] = 58, -+ [1][0][2][0][RTW89_FCC][8] = 78, -+ [1][0][2][0][RTW89_ETSI][8] = 58, -+ [1][0][2][0][RTW89_MKK][8] = 76, -+ [1][0][2][0][RTW89_IC][8] = 78, -+ [1][0][2][0][RTW89_KCC][8] = 76, -+ [1][0][2][0][RTW89_ACMA][8] = 58, -+ [1][0][2][0][RTW89_CN][8] = 60, -+ [1][0][2][0][RTW89_UK][8] = 58, -+ [1][0][2][0][RTW89_FCC][9] = 74, -+ [1][0][2][0][RTW89_ETSI][9] = 58, -+ [1][0][2][0][RTW89_MKK][9] = 76, -+ [1][0][2][0][RTW89_IC][9] = 74, -+ [1][0][2][0][RTW89_KCC][9] = 76, -+ [1][0][2][0][RTW89_ACMA][9] = 58, -+ [1][0][2][0][RTW89_CN][9] = 60, -+ [1][0][2][0][RTW89_UK][9] = 58, -+ [1][0][2][0][RTW89_FCC][10] = 68, -+ [1][0][2][0][RTW89_ETSI][10] = 58, -+ [1][0][2][0][RTW89_MKK][10] = 76, -+ [1][0][2][0][RTW89_IC][10] = 68, -+ [1][0][2][0][RTW89_KCC][10] = 76, -+ [1][0][2][0][RTW89_ACMA][10] = 58, -+ [1][0][2][0][RTW89_CN][10] = 60, -+ [1][0][2][0][RTW89_UK][10] = 58, -+ [1][0][2][0][RTW89_FCC][11] = 127, -+ [1][0][2][0][RTW89_ETSI][11] = 127, -+ [1][0][2][0][RTW89_MKK][11] = 127, -+ [1][0][2][0][RTW89_IC][11] = 127, -+ [1][0][2][0][RTW89_KCC][11] = 127, -+ [1][0][2][0][RTW89_ACMA][11] = 127, -+ [1][0][2][0][RTW89_CN][11] = 127, -+ [1][0][2][0][RTW89_UK][11] = 127, -+ [1][0][2][0][RTW89_FCC][12] = 127, -+ [1][0][2][0][RTW89_ETSI][12] = 127, -+ [1][0][2][0][RTW89_MKK][12] = 127, -+ [1][0][2][0][RTW89_IC][12] = 127, -+ [1][0][2][0][RTW89_KCC][12] = 127, -+ [1][0][2][0][RTW89_ACMA][12] = 127, -+ [1][0][2][0][RTW89_CN][12] = 127, -+ [1][0][2][0][RTW89_UK][12] = 127, -+ [1][0][2][0][RTW89_FCC][13] = 127, -+ [1][0][2][0][RTW89_ETSI][13] = 127, -+ [1][0][2][0][RTW89_MKK][13] = 127, -+ [1][0][2][0][RTW89_IC][13] = 127, -+ [1][0][2][0][RTW89_KCC][13] = 127, -+ [1][0][2][0][RTW89_ACMA][13] = 127, -+ [1][0][2][0][RTW89_CN][13] = 127, -+ [1][0][2][0][RTW89_UK][13] = 127, -+ [1][1][2][0][RTW89_FCC][0] = 127, -+ [1][1][2][0][RTW89_ETSI][0] = 127, -+ [1][1][2][0][RTW89_MKK][0] = 127, -+ [1][1][2][0][RTW89_IC][0] = 127, -+ [1][1][2][0][RTW89_KCC][0] = 127, -+ [1][1][2][0][RTW89_ACMA][0] = 127, -+ [1][1][2][0][RTW89_CN][0] = 127, -+ [1][1][2][0][RTW89_UK][0] = 127, -+ [1][1][2][0][RTW89_FCC][1] = 127, -+ [1][1][2][0][RTW89_ETSI][1] = 127, -+ [1][1][2][0][RTW89_MKK][1] = 127, -+ [1][1][2][0][RTW89_IC][1] = 127, -+ [1][1][2][0][RTW89_KCC][1] = 127, -+ [1][1][2][0][RTW89_ACMA][1] = 127, -+ [1][1][2][0][RTW89_CN][1] = 127, -+ [1][1][2][0][RTW89_UK][1] = 127, -+ [1][1][2][0][RTW89_FCC][2] = 127, -+ [1][1][2][0][RTW89_ETSI][2] = 127, -+ [1][1][2][0][RTW89_MKK][2] = 127, -+ [1][1][2][0][RTW89_IC][2] = 127, -+ [1][1][2][0][RTW89_KCC][2] = 127, -+ [1][1][2][0][RTW89_ACMA][2] = 127, -+ [1][1][2][0][RTW89_CN][2] = 127, -+ [1][1][2][0][RTW89_UK][2] = 127, -+ [1][1][2][0][RTW89_FCC][3] = 127, -+ [1][1][2][0][RTW89_ETSI][3] = 127, -+ [1][1][2][0][RTW89_MKK][3] = 127, -+ [1][1][2][0][RTW89_IC][3] = 127, -+ [1][1][2][0][RTW89_KCC][3] = 127, -+ [1][1][2][0][RTW89_ACMA][3] = 127, -+ [1][1][2][0][RTW89_CN][3] = 127, -+ [1][1][2][0][RTW89_UK][3] = 127, -+ [1][1][2][0][RTW89_FCC][4] = 127, -+ [1][1][2][0][RTW89_ETSI][4] = 127, -+ [1][1][2][0][RTW89_MKK][4] = 127, -+ [1][1][2][0][RTW89_IC][4] = 127, -+ [1][1][2][0][RTW89_KCC][4] = 127, -+ [1][1][2][0][RTW89_ACMA][4] = 127, -+ [1][1][2][0][RTW89_CN][4] = 127, -+ [1][1][2][0][RTW89_UK][4] = 127, -+ [1][1][2][0][RTW89_FCC][5] = 127, -+ [1][1][2][0][RTW89_ETSI][5] = 127, -+ [1][1][2][0][RTW89_MKK][5] = 127, -+ [1][1][2][0][RTW89_IC][5] = 127, -+ [1][1][2][0][RTW89_KCC][5] = 127, -+ [1][1][2][0][RTW89_ACMA][5] = 127, -+ [1][1][2][0][RTW89_CN][5] = 127, -+ [1][1][2][0][RTW89_UK][5] = 127, -+ [1][1][2][0][RTW89_FCC][6] = 127, -+ [1][1][2][0][RTW89_ETSI][6] = 127, -+ [1][1][2][0][RTW89_MKK][6] = 127, -+ [1][1][2][0][RTW89_IC][6] = 127, -+ [1][1][2][0][RTW89_KCC][6] = 127, -+ [1][1][2][0][RTW89_ACMA][6] = 127, -+ [1][1][2][0][RTW89_CN][6] = 127, -+ [1][1][2][0][RTW89_UK][6] = 127, -+ [1][1][2][0][RTW89_FCC][7] = 127, -+ [1][1][2][0][RTW89_ETSI][7] = 127, -+ [1][1][2][0][RTW89_MKK][7] = 127, -+ [1][1][2][0][RTW89_IC][7] = 127, -+ [1][1][2][0][RTW89_KCC][7] = 127, -+ [1][1][2][0][RTW89_ACMA][7] = 127, -+ [1][1][2][0][RTW89_CN][7] = 127, -+ [1][1][2][0][RTW89_UK][7] = 127, -+ [1][1][2][0][RTW89_FCC][8] = 127, -+ [1][1][2][0][RTW89_ETSI][8] = 127, -+ [1][1][2][0][RTW89_MKK][8] = 127, -+ [1][1][2][0][RTW89_IC][8] = 127, -+ [1][1][2][0][RTW89_KCC][8] = 127, -+ [1][1][2][0][RTW89_ACMA][8] = 127, -+ [1][1][2][0][RTW89_CN][8] = 127, -+ [1][1][2][0][RTW89_UK][8] = 127, -+ [1][1][2][0][RTW89_FCC][9] = 127, -+ [1][1][2][0][RTW89_ETSI][9] = 127, -+ [1][1][2][0][RTW89_MKK][9] = 127, -+ [1][1][2][0][RTW89_IC][9] = 127, -+ [1][1][2][0][RTW89_KCC][9] = 127, -+ [1][1][2][0][RTW89_ACMA][9] = 127, -+ [1][1][2][0][RTW89_CN][9] = 127, -+ [1][1][2][0][RTW89_UK][9] = 127, -+ [1][1][2][0][RTW89_FCC][10] = 127, -+ [1][1][2][0][RTW89_ETSI][10] = 127, -+ [1][1][2][0][RTW89_MKK][10] = 127, -+ [1][1][2][0][RTW89_IC][10] = 127, -+ [1][1][2][0][RTW89_KCC][10] = 127, -+ [1][1][2][0][RTW89_ACMA][10] = 127, -+ [1][1][2][0][RTW89_CN][10] = 127, -+ [1][1][2][0][RTW89_UK][10] = 127, -+ [1][1][2][0][RTW89_FCC][11] = 127, -+ [1][1][2][0][RTW89_ETSI][11] = 127, -+ [1][1][2][0][RTW89_MKK][11] = 127, -+ [1][1][2][0][RTW89_IC][11] = 127, -+ [1][1][2][0][RTW89_KCC][11] = 127, -+ [1][1][2][0][RTW89_ACMA][11] = 127, -+ [1][1][2][0][RTW89_CN][11] = 127, -+ [1][1][2][0][RTW89_UK][11] = 127, -+ [1][1][2][0][RTW89_FCC][12] = 127, -+ [1][1][2][0][RTW89_ETSI][12] = 127, -+ [1][1][2][0][RTW89_MKK][12] = 127, -+ [1][1][2][0][RTW89_IC][12] = 127, -+ [1][1][2][0][RTW89_KCC][12] = 127, -+ [1][1][2][0][RTW89_ACMA][12] = 127, -+ [1][1][2][0][RTW89_CN][12] = 127, -+ [1][1][2][0][RTW89_UK][12] = 127, -+ [1][1][2][0][RTW89_FCC][13] = 127, -+ [1][1][2][0][RTW89_ETSI][13] = 127, -+ [1][1][2][0][RTW89_MKK][13] = 127, -+ [1][1][2][0][RTW89_IC][13] = 127, -+ [1][1][2][0][RTW89_KCC][13] = 127, -+ [1][1][2][0][RTW89_ACMA][13] = 127, -+ [1][1][2][0][RTW89_CN][13] = 127, -+ [1][1][2][0][RTW89_UK][13] = 127, -+ [1][1][2][1][RTW89_FCC][0] = 127, -+ [1][1][2][1][RTW89_ETSI][0] = 127, -+ [1][1][2][1][RTW89_MKK][0] = 127, -+ [1][1][2][1][RTW89_IC][0] = 127, -+ [1][1][2][1][RTW89_KCC][0] = 127, -+ [1][1][2][1][RTW89_ACMA][0] = 127, -+ [1][1][2][1][RTW89_CN][0] = 127, -+ [1][1][2][1][RTW89_UK][0] = 127, -+ [1][1][2][1][RTW89_FCC][1] = 127, -+ [1][1][2][1][RTW89_ETSI][1] = 127, -+ [1][1][2][1][RTW89_MKK][1] = 127, -+ [1][1][2][1][RTW89_IC][1] = 127, -+ [1][1][2][1][RTW89_KCC][1] = 127, -+ [1][1][2][1][RTW89_ACMA][1] = 127, -+ [1][1][2][1][RTW89_CN][1] = 127, -+ [1][1][2][1][RTW89_UK][1] = 127, -+ [1][1][2][1][RTW89_FCC][2] = 127, -+ [1][1][2][1][RTW89_ETSI][2] = 127, -+ [1][1][2][1][RTW89_MKK][2] = 127, -+ [1][1][2][1][RTW89_IC][2] = 127, -+ [1][1][2][1][RTW89_KCC][2] = 127, -+ [1][1][2][1][RTW89_ACMA][2] = 127, -+ [1][1][2][1][RTW89_CN][2] = 127, -+ [1][1][2][1][RTW89_UK][2] = 127, -+ [1][1][2][1][RTW89_FCC][3] = 127, -+ [1][1][2][1][RTW89_ETSI][3] = 127, -+ [1][1][2][1][RTW89_MKK][3] = 127, -+ [1][1][2][1][RTW89_IC][3] = 127, -+ [1][1][2][1][RTW89_KCC][3] = 127, -+ [1][1][2][1][RTW89_ACMA][3] = 127, -+ [1][1][2][1][RTW89_CN][3] = 127, -+ [1][1][2][1][RTW89_UK][3] = 127, -+ [1][1][2][1][RTW89_FCC][4] = 127, -+ [1][1][2][1][RTW89_ETSI][4] = 127, -+ [1][1][2][1][RTW89_MKK][4] = 127, -+ [1][1][2][1][RTW89_IC][4] = 127, -+ [1][1][2][1][RTW89_KCC][4] = 127, -+ [1][1][2][1][RTW89_ACMA][4] = 127, -+ [1][1][2][1][RTW89_CN][4] = 127, -+ [1][1][2][1][RTW89_UK][4] = 127, -+ [1][1][2][1][RTW89_FCC][5] = 127, -+ [1][1][2][1][RTW89_ETSI][5] = 127, -+ [1][1][2][1][RTW89_MKK][5] = 127, -+ [1][1][2][1][RTW89_IC][5] = 127, -+ [1][1][2][1][RTW89_KCC][5] = 127, -+ [1][1][2][1][RTW89_ACMA][5] = 127, -+ [1][1][2][1][RTW89_CN][5] = 127, -+ [1][1][2][1][RTW89_UK][5] = 127, -+ [1][1][2][1][RTW89_FCC][6] = 127, -+ [1][1][2][1][RTW89_ETSI][6] = 127, -+ [1][1][2][1][RTW89_MKK][6] = 127, -+ [1][1][2][1][RTW89_IC][6] = 127, -+ [1][1][2][1][RTW89_KCC][6] = 127, -+ [1][1][2][1][RTW89_ACMA][6] = 127, -+ [1][1][2][1][RTW89_CN][6] = 127, -+ [1][1][2][1][RTW89_UK][6] = 127, -+ [1][1][2][1][RTW89_FCC][7] = 127, -+ [1][1][2][1][RTW89_ETSI][7] = 127, -+ [1][1][2][1][RTW89_MKK][7] = 127, -+ [1][1][2][1][RTW89_IC][7] = 127, -+ [1][1][2][1][RTW89_KCC][7] = 127, -+ [1][1][2][1][RTW89_ACMA][7] = 127, -+ [1][1][2][1][RTW89_CN][7] = 127, -+ [1][1][2][1][RTW89_UK][7] = 127, -+ [1][1][2][1][RTW89_FCC][8] = 127, -+ [1][1][2][1][RTW89_ETSI][8] = 127, -+ [1][1][2][1][RTW89_MKK][8] = 127, -+ [1][1][2][1][RTW89_IC][8] = 127, -+ [1][1][2][1][RTW89_KCC][8] = 127, -+ [1][1][2][1][RTW89_ACMA][8] = 127, -+ [1][1][2][1][RTW89_CN][8] = 127, -+ [1][1][2][1][RTW89_UK][8] = 127, -+ [1][1][2][1][RTW89_FCC][9] = 127, -+ [1][1][2][1][RTW89_ETSI][9] = 127, -+ [1][1][2][1][RTW89_MKK][9] = 127, -+ [1][1][2][1][RTW89_IC][9] = 127, -+ [1][1][2][1][RTW89_KCC][9] = 127, -+ [1][1][2][1][RTW89_ACMA][9] = 127, -+ [1][1][2][1][RTW89_CN][9] = 127, -+ [1][1][2][1][RTW89_UK][9] = 127, -+ [1][1][2][1][RTW89_FCC][10] = 127, -+ [1][1][2][1][RTW89_ETSI][10] = 127, -+ [1][1][2][1][RTW89_MKK][10] = 127, -+ [1][1][2][1][RTW89_IC][10] = 127, -+ [1][1][2][1][RTW89_KCC][10] = 127, -+ [1][1][2][1][RTW89_ACMA][10] = 127, -+ [1][1][2][1][RTW89_CN][10] = 127, -+ [1][1][2][1][RTW89_UK][10] = 127, -+ [1][1][2][1][RTW89_FCC][11] = 127, -+ [1][1][2][1][RTW89_ETSI][11] = 127, -+ [1][1][2][1][RTW89_MKK][11] = 127, -+ [1][1][2][1][RTW89_IC][11] = 127, -+ [1][1][2][1][RTW89_KCC][11] = 127, -+ [1][1][2][1][RTW89_ACMA][11] = 127, -+ [1][1][2][1][RTW89_CN][11] = 127, -+ [1][1][2][1][RTW89_UK][11] = 127, -+ [1][1][2][1][RTW89_FCC][12] = 127, -+ [1][1][2][1][RTW89_ETSI][12] = 127, -+ [1][1][2][1][RTW89_MKK][12] = 127, -+ [1][1][2][1][RTW89_IC][12] = 127, -+ [1][1][2][1][RTW89_KCC][12] = 127, -+ [1][1][2][1][RTW89_ACMA][12] = 127, -+ [1][1][2][1][RTW89_CN][12] = 127, -+ [1][1][2][1][RTW89_UK][12] = 127, -+ [1][1][2][1][RTW89_FCC][13] = 127, -+ [1][1][2][1][RTW89_ETSI][13] = 127, -+ [1][1][2][1][RTW89_MKK][13] = 127, -+ [1][1][2][1][RTW89_IC][13] = 127, -+ [1][1][2][1][RTW89_KCC][13] = 127, -+ [1][1][2][1][RTW89_ACMA][13] = 127, -+ [1][1][2][1][RTW89_CN][13] = 127, -+ [1][1][2][1][RTW89_UK][13] = 127, -+}; -+ -+static -+const s8 rtw89_8851b_txpwr_lmt_5g_type2[RTW89_5G_BW_NUM][RTW89_NTX_NUM] -+ [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -+ [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = { -+ [0][0][1][0][RTW89_WW][0] = 58, -+ [0][0][1][0][RTW89_WW][2] = 58, -+ [0][0][1][0][RTW89_WW][4] = 58, -+ [0][0][1][0][RTW89_WW][6] = 50, -+ [0][0][1][0][RTW89_WW][8] = 58, -+ [0][0][1][0][RTW89_WW][10] = 58, -+ [0][0][1][0][RTW89_WW][12] = 58, -+ [0][0][1][0][RTW89_WW][14] = 58, -+ [0][0][1][0][RTW89_WW][15] = 58, -+ [0][0][1][0][RTW89_WW][17] = 60, -+ [0][0][1][0][RTW89_WW][19] = 60, -+ [0][0][1][0][RTW89_WW][21] = 60, -+ [0][0][1][0][RTW89_WW][23] = 60, -+ [0][0][1][0][RTW89_WW][25] = 60, -+ [0][0][1][0][RTW89_WW][27] = 60, -+ [0][0][1][0][RTW89_WW][29] = 60, -+ [0][0][1][0][RTW89_WW][31] = 60, -+ [0][0][1][0][RTW89_WW][33] = 60, -+ [0][0][1][0][RTW89_WW][35] = 60, -+ [0][0][1][0][RTW89_WW][37] = 74, -+ [0][0][1][0][RTW89_WW][38] = 30, -+ [0][0][1][0][RTW89_WW][40] = 30, -+ [0][0][1][0][RTW89_WW][42] = 30, -+ [0][0][1][0][RTW89_WW][44] = 30, -+ [0][0][1][0][RTW89_WW][46] = 30, -+ [0][0][1][0][RTW89_WW][48] = 72, -+ [0][0][1][0][RTW89_WW][50] = 72, -+ [0][0][1][0][RTW89_WW][52] = 72, -+ [0][1][1][0][RTW89_WW][0] = 0, -+ [0][1][1][0][RTW89_WW][2] = 0, -+ [0][1][1][0][RTW89_WW][4] = 0, -+ [0][1][1][0][RTW89_WW][6] = 0, -+ [0][1][1][0][RTW89_WW][8] = 0, -+ [0][1][1][0][RTW89_WW][10] = 0, -+ [0][1][1][0][RTW89_WW][12] = 0, -+ [0][1][1][0][RTW89_WW][14] = 0, -+ [0][1][1][0][RTW89_WW][15] = 0, -+ [0][1][1][0][RTW89_WW][17] = 0, -+ [0][1][1][0][RTW89_WW][19] = 0, -+ [0][1][1][0][RTW89_WW][21] = 0, -+ [0][1][1][0][RTW89_WW][23] = 0, -+ [0][1][1][0][RTW89_WW][25] = 0, -+ [0][1][1][0][RTW89_WW][27] = 0, -+ [0][1][1][0][RTW89_WW][29] = 0, -+ [0][1][1][0][RTW89_WW][31] = 0, -+ [0][1][1][0][RTW89_WW][33] = 0, -+ [0][1][1][0][RTW89_WW][35] = 0, -+ [0][1][1][0][RTW89_WW][37] = 0, -+ [0][1][1][0][RTW89_WW][38] = 0, -+ [0][1][1][0][RTW89_WW][40] = 0, -+ [0][1][1][0][RTW89_WW][42] = 0, -+ [0][1][1][0][RTW89_WW][44] = 0, -+ [0][1][1][0][RTW89_WW][46] = 0, -+ [0][1][1][0][RTW89_WW][48] = 0, -+ [0][1][1][0][RTW89_WW][50] = 0, -+ [0][1][1][0][RTW89_WW][52] = 0, -+ [0][0][2][0][RTW89_WW][0] = 62, -+ [0][0][2][0][RTW89_WW][2] = 62, -+ [0][0][2][0][RTW89_WW][4] = 62, -+ [0][0][2][0][RTW89_WW][6] = 54, -+ [0][0][2][0][RTW89_WW][8] = 62, -+ [0][0][2][0][RTW89_WW][10] = 62, -+ [0][0][2][0][RTW89_WW][12] = 62, -+ [0][0][2][0][RTW89_WW][14] = 62, -+ [0][0][2][0][RTW89_WW][15] = 60, -+ [0][0][2][0][RTW89_WW][17] = 62, -+ [0][0][2][0][RTW89_WW][19] = 62, -+ [0][0][2][0][RTW89_WW][21] = 62, -+ [0][0][2][0][RTW89_WW][23] = 62, -+ [0][0][2][0][RTW89_WW][25] = 62, -+ [0][0][2][0][RTW89_WW][27] = 62, -+ [0][0][2][0][RTW89_WW][29] = 62, -+ [0][0][2][0][RTW89_WW][31] = 62, -+ [0][0][2][0][RTW89_WW][33] = 62, -+ [0][0][2][0][RTW89_WW][35] = 62, -+ [0][0][2][0][RTW89_WW][37] = 74, -+ [0][0][2][0][RTW89_WW][38] = 30, -+ [0][0][2][0][RTW89_WW][40] = 30, -+ [0][0][2][0][RTW89_WW][42] = 30, -+ [0][0][2][0][RTW89_WW][44] = 30, -+ [0][0][2][0][RTW89_WW][46] = 30, -+ [0][0][2][0][RTW89_WW][48] = 74, -+ [0][0][2][0][RTW89_WW][50] = 74, -+ [0][0][2][0][RTW89_WW][52] = 74, -+ [0][1][2][0][RTW89_WW][0] = 0, -+ [0][1][2][0][RTW89_WW][2] = 0, -+ [0][1][2][0][RTW89_WW][4] = 0, -+ [0][1][2][0][RTW89_WW][6] = 0, -+ [0][1][2][0][RTW89_WW][8] = 0, -+ [0][1][2][0][RTW89_WW][10] = 0, -+ [0][1][2][0][RTW89_WW][12] = 0, -+ [0][1][2][0][RTW89_WW][14] = 0, -+ [0][1][2][0][RTW89_WW][15] = 0, -+ [0][1][2][0][RTW89_WW][17] = 0, -+ [0][1][2][0][RTW89_WW][19] = 0, -+ [0][1][2][0][RTW89_WW][21] = 0, -+ [0][1][2][0][RTW89_WW][23] = 0, -+ [0][1][2][0][RTW89_WW][25] = 0, -+ [0][1][2][0][RTW89_WW][27] = 0, -+ [0][1][2][0][RTW89_WW][29] = 0, -+ [0][1][2][0][RTW89_WW][31] = 0, -+ [0][1][2][0][RTW89_WW][33] = 0, -+ [0][1][2][0][RTW89_WW][35] = 0, -+ [0][1][2][0][RTW89_WW][37] = 0, -+ [0][1][2][0][RTW89_WW][38] = 0, -+ [0][1][2][0][RTW89_WW][40] = 0, -+ [0][1][2][0][RTW89_WW][42] = 0, -+ [0][1][2][0][RTW89_WW][44] = 0, -+ [0][1][2][0][RTW89_WW][46] = 0, -+ [0][1][2][0][RTW89_WW][48] = 0, -+ [0][1][2][0][RTW89_WW][50] = 0, -+ [0][1][2][0][RTW89_WW][52] = 0, -+ [0][1][2][1][RTW89_WW][0] = 0, -+ [0][1][2][1][RTW89_WW][2] = 0, -+ [0][1][2][1][RTW89_WW][4] = 0, -+ [0][1][2][1][RTW89_WW][6] = 0, -+ [0][1][2][1][RTW89_WW][8] = 0, -+ [0][1][2][1][RTW89_WW][10] = 0, -+ [0][1][2][1][RTW89_WW][12] = 0, -+ [0][1][2][1][RTW89_WW][14] = 0, -+ [0][1][2][1][RTW89_WW][15] = 0, -+ [0][1][2][1][RTW89_WW][17] = 0, -+ [0][1][2][1][RTW89_WW][19] = 0, -+ [0][1][2][1][RTW89_WW][21] = 0, -+ [0][1][2][1][RTW89_WW][23] = 0, -+ [0][1][2][1][RTW89_WW][25] = 0, -+ [0][1][2][1][RTW89_WW][27] = 0, -+ [0][1][2][1][RTW89_WW][29] = 0, -+ [0][1][2][1][RTW89_WW][31] = 0, -+ [0][1][2][1][RTW89_WW][33] = 0, -+ [0][1][2][1][RTW89_WW][35] = 0, -+ [0][1][2][1][RTW89_WW][37] = 0, -+ [0][1][2][1][RTW89_WW][38] = 0, -+ [0][1][2][1][RTW89_WW][40] = 0, -+ [0][1][2][1][RTW89_WW][42] = 0, -+ [0][1][2][1][RTW89_WW][44] = 0, -+ [0][1][2][1][RTW89_WW][46] = 0, -+ [0][1][2][1][RTW89_WW][48] = 0, -+ [0][1][2][1][RTW89_WW][50] = 0, -+ [0][1][2][1][RTW89_WW][52] = 0, -+ [1][0][2][0][RTW89_WW][1] = 64, -+ [1][0][2][0][RTW89_WW][5] = 62, -+ [1][0][2][0][RTW89_WW][9] = 64, -+ [1][0][2][0][RTW89_WW][13] = 64, -+ [1][0][2][0][RTW89_WW][16] = 66, -+ [1][0][2][0][RTW89_WW][20] = 66, -+ [1][0][2][0][RTW89_WW][24] = 66, -+ [1][0][2][0][RTW89_WW][28] = 66, -+ [1][0][2][0][RTW89_WW][32] = 66, -+ [1][0][2][0][RTW89_WW][36] = 76, -+ [1][0][2][0][RTW89_WW][39] = 30, -+ [1][0][2][0][RTW89_WW][43] = 30, -+ [1][0][2][0][RTW89_WW][47] = 80, -+ [1][0][2][0][RTW89_WW][51] = 80, -+ [1][1][2][0][RTW89_WW][1] = 0, -+ [1][1][2][0][RTW89_WW][5] = 0, -+ [1][1][2][0][RTW89_WW][9] = 0, -+ [1][1][2][0][RTW89_WW][13] = 0, -+ [1][1][2][0][RTW89_WW][16] = 0, -+ [1][1][2][0][RTW89_WW][20] = 0, -+ [1][1][2][0][RTW89_WW][24] = 0, -+ [1][1][2][0][RTW89_WW][28] = 0, -+ [1][1][2][0][RTW89_WW][32] = 0, -+ [1][1][2][0][RTW89_WW][36] = 0, -+ [1][1][2][0][RTW89_WW][39] = 0, -+ [1][1][2][0][RTW89_WW][43] = 0, -+ [1][1][2][0][RTW89_WW][47] = 0, -+ [1][1][2][0][RTW89_WW][51] = 0, -+ [1][1][2][1][RTW89_WW][1] = 0, -+ [1][1][2][1][RTW89_WW][5] = 0, -+ [1][1][2][1][RTW89_WW][9] = 0, -+ [1][1][2][1][RTW89_WW][13] = 0, -+ [1][1][2][1][RTW89_WW][16] = 0, -+ [1][1][2][1][RTW89_WW][20] = 0, -+ [1][1][2][1][RTW89_WW][24] = 0, -+ [1][1][2][1][RTW89_WW][28] = 0, -+ [1][1][2][1][RTW89_WW][32] = 0, -+ [1][1][2][1][RTW89_WW][36] = 0, -+ [1][1][2][1][RTW89_WW][39] = 0, -+ [1][1][2][1][RTW89_WW][43] = 0, -+ [1][1][2][1][RTW89_WW][47] = 0, -+ [1][1][2][1][RTW89_WW][51] = 0, -+ [2][0][2][0][RTW89_WW][3] = 62, -+ [2][0][2][0][RTW89_WW][11] = 62, -+ [2][0][2][0][RTW89_WW][18] = 64, -+ [2][0][2][0][RTW89_WW][26] = 64, -+ [2][0][2][0][RTW89_WW][34] = 68, -+ [2][0][2][0][RTW89_WW][41] = 30, -+ [2][0][2][0][RTW89_WW][49] = 72, -+ [2][1][2][0][RTW89_WW][3] = 0, -+ [2][1][2][0][RTW89_WW][11] = 0, -+ [2][1][2][0][RTW89_WW][18] = 0, -+ [2][1][2][0][RTW89_WW][26] = 0, -+ [2][1][2][0][RTW89_WW][34] = 0, -+ [2][1][2][0][RTW89_WW][41] = 0, -+ [2][1][2][0][RTW89_WW][49] = 0, -+ [2][1][2][1][RTW89_WW][3] = 0, -+ [2][1][2][1][RTW89_WW][11] = 0, -+ [2][1][2][1][RTW89_WW][18] = 0, -+ [2][1][2][1][RTW89_WW][26] = 0, -+ [2][1][2][1][RTW89_WW][34] = 0, -+ [2][1][2][1][RTW89_WW][41] = 0, -+ [2][1][2][1][RTW89_WW][49] = 0, -+ [3][0][2][0][RTW89_WW][7] = 58, -+ [3][0][2][0][RTW89_WW][22] = 58, -+ [3][0][2][0][RTW89_WW][45] = 0, -+ [3][1][2][0][RTW89_WW][7] = 0, -+ [3][1][2][0][RTW89_WW][22] = 0, -+ [3][1][2][0][RTW89_WW][45] = 0, -+ [3][1][2][1][RTW89_WW][7] = 0, -+ [3][1][2][1][RTW89_WW][22] = 0, -+ [3][1][2][1][RTW89_WW][45] = 0, -+ [0][0][1][0][RTW89_FCC][0] = 78, -+ [0][0][1][0][RTW89_ETSI][0] = 58, -+ [0][0][1][0][RTW89_MKK][0] = 60, -+ [0][0][1][0][RTW89_IC][0] = 62, -+ [0][0][1][0][RTW89_KCC][0] = 74, -+ [0][0][1][0][RTW89_ACMA][0] = 58, -+ [0][0][1][0][RTW89_CN][0] = 60, -+ [0][0][1][0][RTW89_UK][0] = 58, -+ [0][0][1][0][RTW89_FCC][2] = 78, -+ [0][0][1][0][RTW89_ETSI][2] = 58, -+ [0][0][1][0][RTW89_MKK][2] = 60, -+ [0][0][1][0][RTW89_IC][2] = 62, -+ [0][0][1][0][RTW89_KCC][2] = 74, -+ [0][0][1][0][RTW89_ACMA][2] = 58, -+ [0][0][1][0][RTW89_CN][2] = 60, -+ [0][0][1][0][RTW89_UK][2] = 58, -+ [0][0][1][0][RTW89_FCC][4] = 78, -+ [0][0][1][0][RTW89_ETSI][4] = 58, -+ [0][0][1][0][RTW89_MKK][4] = 60, -+ [0][0][1][0][RTW89_IC][4] = 62, -+ [0][0][1][0][RTW89_KCC][4] = 74, -+ [0][0][1][0][RTW89_ACMA][4] = 58, -+ [0][0][1][0][RTW89_CN][4] = 60, -+ [0][0][1][0][RTW89_UK][4] = 58, -+ [0][0][1][0][RTW89_FCC][6] = 78, -+ [0][0][1][0][RTW89_ETSI][6] = 58, -+ [0][0][1][0][RTW89_MKK][6] = 60, -+ [0][0][1][0][RTW89_IC][6] = 62, -+ [0][0][1][0][RTW89_KCC][6] = 50, -+ [0][0][1][0][RTW89_ACMA][6] = 58, -+ [0][0][1][0][RTW89_CN][6] = 60, -+ [0][0][1][0][RTW89_UK][6] = 58, -+ [0][0][1][0][RTW89_FCC][8] = 78, -+ [0][0][1][0][RTW89_ETSI][8] = 58, -+ [0][0][1][0][RTW89_MKK][8] = 60, -+ [0][0][1][0][RTW89_IC][8] = 62, -+ [0][0][1][0][RTW89_KCC][8] = 74, -+ [0][0][1][0][RTW89_ACMA][8] = 58, -+ [0][0][1][0][RTW89_CN][8] = 60, -+ [0][0][1][0][RTW89_UK][8] = 58, -+ [0][0][1][0][RTW89_FCC][10] = 78, -+ [0][0][1][0][RTW89_ETSI][10] = 58, -+ [0][0][1][0][RTW89_MKK][10] = 60, -+ [0][0][1][0][RTW89_IC][10] = 64, -+ [0][0][1][0][RTW89_KCC][10] = 74, -+ [0][0][1][0][RTW89_ACMA][10] = 58, -+ [0][0][1][0][RTW89_CN][10] = 60, -+ [0][0][1][0][RTW89_UK][10] = 58, -+ [0][0][1][0][RTW89_FCC][12] = 78, -+ [0][0][1][0][RTW89_ETSI][12] = 58, -+ [0][0][1][0][RTW89_MKK][12] = 60, -+ [0][0][1][0][RTW89_IC][12] = 64, -+ [0][0][1][0][RTW89_KCC][12] = 74, -+ [0][0][1][0][RTW89_ACMA][12] = 58, -+ [0][0][1][0][RTW89_CN][12] = 60, -+ [0][0][1][0][RTW89_UK][12] = 58, -+ [0][0][1][0][RTW89_FCC][14] = 76, -+ [0][0][1][0][RTW89_ETSI][14] = 58, -+ [0][0][1][0][RTW89_MKK][14] = 60, -+ [0][0][1][0][RTW89_IC][14] = 62, -+ [0][0][1][0][RTW89_KCC][14] = 74, -+ [0][0][1][0][RTW89_ACMA][14] = 58, -+ [0][0][1][0][RTW89_CN][14] = 60, -+ [0][0][1][0][RTW89_UK][14] = 58, -+ [0][0][1][0][RTW89_FCC][15] = 76, -+ [0][0][1][0][RTW89_ETSI][15] = 58, -+ [0][0][1][0][RTW89_MKK][15] = 74, -+ [0][0][1][0][RTW89_IC][15] = 76, -+ [0][0][1][0][RTW89_KCC][15] = 74, -+ [0][0][1][0][RTW89_ACMA][15] = 58, -+ [0][0][1][0][RTW89_CN][15] = 127, -+ [0][0][1][0][RTW89_UK][15] = 58, -+ [0][0][1][0][RTW89_FCC][17] = 78, -+ [0][0][1][0][RTW89_ETSI][17] = 60, -+ [0][0][1][0][RTW89_MKK][17] = 74, -+ [0][0][1][0][RTW89_IC][17] = 78, -+ [0][0][1][0][RTW89_KCC][17] = 74, -+ [0][0][1][0][RTW89_ACMA][17] = 60, -+ [0][0][1][0][RTW89_CN][17] = 127, -+ [0][0][1][0][RTW89_UK][17] = 60, -+ [0][0][1][0][RTW89_FCC][19] = 78, -+ [0][0][1][0][RTW89_ETSI][19] = 60, -+ [0][0][1][0][RTW89_MKK][19] = 74, -+ [0][0][1][0][RTW89_IC][19] = 78, -+ [0][0][1][0][RTW89_KCC][19] = 74, -+ [0][0][1][0][RTW89_ACMA][19] = 60, -+ [0][0][1][0][RTW89_CN][19] = 127, -+ [0][0][1][0][RTW89_UK][19] = 60, -+ [0][0][1][0][RTW89_FCC][21] = 78, -+ [0][0][1][0][RTW89_ETSI][21] = 60, -+ [0][0][1][0][RTW89_MKK][21] = 74, -+ [0][0][1][0][RTW89_IC][21] = 78, -+ [0][0][1][0][RTW89_KCC][21] = 74, -+ [0][0][1][0][RTW89_ACMA][21] = 60, -+ [0][0][1][0][RTW89_CN][21] = 127, -+ [0][0][1][0][RTW89_UK][21] = 60, -+ [0][0][1][0][RTW89_FCC][23] = 78, -+ [0][0][1][0][RTW89_ETSI][23] = 60, -+ [0][0][1][0][RTW89_MKK][23] = 74, -+ [0][0][1][0][RTW89_IC][23] = 78, -+ [0][0][1][0][RTW89_KCC][23] = 74, -+ [0][0][1][0][RTW89_ACMA][23] = 60, -+ [0][0][1][0][RTW89_CN][23] = 127, -+ [0][0][1][0][RTW89_UK][23] = 60, -+ [0][0][1][0][RTW89_FCC][25] = 78, -+ [0][0][1][0][RTW89_ETSI][25] = 60, -+ [0][0][1][0][RTW89_MKK][25] = 74, -+ [0][0][1][0][RTW89_IC][25] = 127, -+ [0][0][1][0][RTW89_KCC][25] = 74, -+ [0][0][1][0][RTW89_ACMA][25] = 127, -+ [0][0][1][0][RTW89_CN][25] = 127, -+ [0][0][1][0][RTW89_UK][25] = 60, -+ [0][0][1][0][RTW89_FCC][27] = 78, -+ [0][0][1][0][RTW89_ETSI][27] = 60, -+ [0][0][1][0][RTW89_MKK][27] = 74, -+ [0][0][1][0][RTW89_IC][27] = 127, -+ [0][0][1][0][RTW89_KCC][27] = 74, -+ [0][0][1][0][RTW89_ACMA][27] = 127, -+ [0][0][1][0][RTW89_CN][27] = 127, -+ [0][0][1][0][RTW89_UK][27] = 60, -+ [0][0][1][0][RTW89_FCC][29] = 78, -+ [0][0][1][0][RTW89_ETSI][29] = 60, -+ [0][0][1][0][RTW89_MKK][29] = 74, -+ [0][0][1][0][RTW89_IC][29] = 127, -+ [0][0][1][0][RTW89_KCC][29] = 74, -+ [0][0][1][0][RTW89_ACMA][29] = 127, -+ [0][0][1][0][RTW89_CN][29] = 127, -+ [0][0][1][0][RTW89_UK][29] = 60, -+ [0][0][1][0][RTW89_FCC][31] = 78, -+ [0][0][1][0][RTW89_ETSI][31] = 60, -+ [0][0][1][0][RTW89_MKK][31] = 74, -+ [0][0][1][0][RTW89_IC][31] = 78, -+ [0][0][1][0][RTW89_KCC][31] = 74, -+ [0][0][1][0][RTW89_ACMA][31] = 60, -+ [0][0][1][0][RTW89_CN][31] = 127, -+ [0][0][1][0][RTW89_UK][31] = 60, -+ [0][0][1][0][RTW89_FCC][33] = 78, -+ [0][0][1][0][RTW89_ETSI][33] = 60, -+ [0][0][1][0][RTW89_MKK][33] = 74, -+ [0][0][1][0][RTW89_IC][33] = 78, -+ [0][0][1][0][RTW89_KCC][33] = 74, -+ [0][0][1][0][RTW89_ACMA][33] = 60, -+ [0][0][1][0][RTW89_CN][33] = 127, -+ [0][0][1][0][RTW89_UK][33] = 60, -+ [0][0][1][0][RTW89_FCC][35] = 70, -+ [0][0][1][0][RTW89_ETSI][35] = 60, -+ [0][0][1][0][RTW89_MKK][35] = 74, -+ [0][0][1][0][RTW89_IC][35] = 70, -+ [0][0][1][0][RTW89_KCC][35] = 74, -+ [0][0][1][0][RTW89_ACMA][35] = 60, -+ [0][0][1][0][RTW89_CN][35] = 127, -+ [0][0][1][0][RTW89_UK][35] = 60, -+ [0][0][1][0][RTW89_FCC][37] = 78, -+ [0][0][1][0][RTW89_ETSI][37] = 127, -+ [0][0][1][0][RTW89_MKK][37] = 74, -+ [0][0][1][0][RTW89_IC][37] = 78, -+ [0][0][1][0][RTW89_KCC][37] = 74, -+ [0][0][1][0][RTW89_ACMA][37] = 74, -+ [0][0][1][0][RTW89_CN][37] = 127, -+ [0][0][1][0][RTW89_UK][37] = 74, -+ [0][0][1][0][RTW89_FCC][38] = 78, -+ [0][0][1][0][RTW89_ETSI][38] = 30, -+ [0][0][1][0][RTW89_MKK][38] = 127, -+ [0][0][1][0][RTW89_IC][38] = 78, -+ [0][0][1][0][RTW89_KCC][38] = 70, -+ [0][0][1][0][RTW89_ACMA][38] = 74, -+ [0][0][1][0][RTW89_CN][38] = 74, -+ [0][0][1][0][RTW89_UK][38] = 58, -+ [0][0][1][0][RTW89_FCC][40] = 78, -+ [0][0][1][0][RTW89_ETSI][40] = 30, -+ [0][0][1][0][RTW89_MKK][40] = 127, -+ [0][0][1][0][RTW89_IC][40] = 78, -+ [0][0][1][0][RTW89_KCC][40] = 74, -+ [0][0][1][0][RTW89_ACMA][40] = 74, -+ [0][0][1][0][RTW89_CN][40] = 74, -+ [0][0][1][0][RTW89_UK][40] = 58, -+ [0][0][1][0][RTW89_FCC][42] = 78, -+ [0][0][1][0][RTW89_ETSI][42] = 30, -+ [0][0][1][0][RTW89_MKK][42] = 127, -+ [0][0][1][0][RTW89_IC][42] = 78, -+ [0][0][1][0][RTW89_KCC][42] = 74, -+ [0][0][1][0][RTW89_ACMA][42] = 74, -+ [0][0][1][0][RTW89_CN][42] = 74, -+ [0][0][1][0][RTW89_UK][42] = 58, -+ [0][0][1][0][RTW89_FCC][44] = 78, -+ [0][0][1][0][RTW89_ETSI][44] = 30, -+ [0][0][1][0][RTW89_MKK][44] = 127, -+ [0][0][1][0][RTW89_IC][44] = 78, -+ [0][0][1][0][RTW89_KCC][44] = 74, -+ [0][0][1][0][RTW89_ACMA][44] = 74, -+ [0][0][1][0][RTW89_CN][44] = 74, -+ [0][0][1][0][RTW89_UK][44] = 58, -+ [0][0][1][0][RTW89_FCC][46] = 78, -+ [0][0][1][0][RTW89_ETSI][46] = 30, -+ [0][0][1][0][RTW89_MKK][46] = 127, -+ [0][0][1][0][RTW89_IC][46] = 78, -+ [0][0][1][0][RTW89_KCC][46] = 74, -+ [0][0][1][0][RTW89_ACMA][46] = 74, -+ [0][0][1][0][RTW89_CN][46] = 74, -+ [0][0][1][0][RTW89_UK][46] = 58, -+ [0][0][1][0][RTW89_FCC][48] = 72, -+ [0][0][1][0][RTW89_ETSI][48] = 127, -+ [0][0][1][0][RTW89_MKK][48] = 127, -+ [0][0][1][0][RTW89_IC][48] = 127, -+ [0][0][1][0][RTW89_KCC][48] = 127, -+ [0][0][1][0][RTW89_ACMA][48] = 127, -+ [0][0][1][0][RTW89_CN][48] = 127, -+ [0][0][1][0][RTW89_UK][48] = 127, -+ [0][0][1][0][RTW89_FCC][50] = 72, -+ [0][0][1][0][RTW89_ETSI][50] = 127, -+ [0][0][1][0][RTW89_MKK][50] = 127, -+ [0][0][1][0][RTW89_IC][50] = 127, -+ [0][0][1][0][RTW89_KCC][50] = 127, -+ [0][0][1][0][RTW89_ACMA][50] = 127, -+ [0][0][1][0][RTW89_CN][50] = 127, -+ [0][0][1][0][RTW89_UK][50] = 127, -+ [0][0][1][0][RTW89_FCC][52] = 72, -+ [0][0][1][0][RTW89_ETSI][52] = 127, -+ [0][0][1][0][RTW89_MKK][52] = 127, -+ [0][0][1][0][RTW89_IC][52] = 127, -+ [0][0][1][0][RTW89_KCC][52] = 127, -+ [0][0][1][0][RTW89_ACMA][52] = 127, -+ [0][0][1][0][RTW89_CN][52] = 127, -+ [0][0][1][0][RTW89_UK][52] = 127, -+ [0][1][1][0][RTW89_FCC][0] = 127, -+ [0][1][1][0][RTW89_ETSI][0] = 127, -+ [0][1][1][0][RTW89_MKK][0] = 127, -+ [0][1][1][0][RTW89_IC][0] = 127, -+ [0][1][1][0][RTW89_KCC][0] = 127, -+ [0][1][1][0][RTW89_ACMA][0] = 127, -+ [0][1][1][0][RTW89_CN][0] = 127, -+ [0][1][1][0][RTW89_UK][0] = 127, -+ [0][1][1][0][RTW89_FCC][2] = 127, -+ [0][1][1][0][RTW89_ETSI][2] = 127, -+ [0][1][1][0][RTW89_MKK][2] = 127, -+ [0][1][1][0][RTW89_IC][2] = 127, -+ [0][1][1][0][RTW89_KCC][2] = 127, -+ [0][1][1][0][RTW89_ACMA][2] = 127, -+ [0][1][1][0][RTW89_CN][2] = 127, -+ [0][1][1][0][RTW89_UK][2] = 127, -+ [0][1][1][0][RTW89_FCC][4] = 127, -+ [0][1][1][0][RTW89_ETSI][4] = 127, -+ [0][1][1][0][RTW89_MKK][4] = 127, -+ [0][1][1][0][RTW89_IC][4] = 127, -+ [0][1][1][0][RTW89_KCC][4] = 127, -+ [0][1][1][0][RTW89_ACMA][4] = 127, -+ [0][1][1][0][RTW89_CN][4] = 127, -+ [0][1][1][0][RTW89_UK][4] = 127, -+ [0][1][1][0][RTW89_FCC][6] = 127, -+ [0][1][1][0][RTW89_ETSI][6] = 127, -+ [0][1][1][0][RTW89_MKK][6] = 127, -+ [0][1][1][0][RTW89_IC][6] = 127, -+ [0][1][1][0][RTW89_KCC][6] = 127, -+ [0][1][1][0][RTW89_ACMA][6] = 127, -+ [0][1][1][0][RTW89_CN][6] = 127, -+ [0][1][1][0][RTW89_UK][6] = 127, -+ [0][1][1][0][RTW89_FCC][8] = 127, -+ [0][1][1][0][RTW89_ETSI][8] = 127, -+ [0][1][1][0][RTW89_MKK][8] = 127, -+ [0][1][1][0][RTW89_IC][8] = 127, -+ [0][1][1][0][RTW89_KCC][8] = 127, -+ [0][1][1][0][RTW89_ACMA][8] = 127, -+ [0][1][1][0][RTW89_CN][8] = 127, -+ [0][1][1][0][RTW89_UK][8] = 127, -+ [0][1][1][0][RTW89_FCC][10] = 127, -+ [0][1][1][0][RTW89_ETSI][10] = 127, -+ [0][1][1][0][RTW89_MKK][10] = 127, -+ [0][1][1][0][RTW89_IC][10] = 127, -+ [0][1][1][0][RTW89_KCC][10] = 127, -+ [0][1][1][0][RTW89_ACMA][10] = 127, -+ [0][1][1][0][RTW89_CN][10] = 127, -+ [0][1][1][0][RTW89_UK][10] = 127, -+ [0][1][1][0][RTW89_FCC][12] = 127, -+ [0][1][1][0][RTW89_ETSI][12] = 127, -+ [0][1][1][0][RTW89_MKK][12] = 127, -+ [0][1][1][0][RTW89_IC][12] = 127, -+ [0][1][1][0][RTW89_KCC][12] = 127, -+ [0][1][1][0][RTW89_ACMA][12] = 127, -+ [0][1][1][0][RTW89_CN][12] = 127, -+ [0][1][1][0][RTW89_UK][12] = 127, -+ [0][1][1][0][RTW89_FCC][14] = 127, -+ [0][1][1][0][RTW89_ETSI][14] = 127, -+ [0][1][1][0][RTW89_MKK][14] = 127, -+ [0][1][1][0][RTW89_IC][14] = 127, -+ [0][1][1][0][RTW89_KCC][14] = 127, -+ [0][1][1][0][RTW89_ACMA][14] = 127, -+ [0][1][1][0][RTW89_CN][14] = 127, -+ [0][1][1][0][RTW89_UK][14] = 127, -+ [0][1][1][0][RTW89_FCC][15] = 127, -+ [0][1][1][0][RTW89_ETSI][15] = 127, -+ [0][1][1][0][RTW89_MKK][15] = 127, -+ [0][1][1][0][RTW89_IC][15] = 127, -+ [0][1][1][0][RTW89_KCC][15] = 127, -+ [0][1][1][0][RTW89_ACMA][15] = 127, -+ [0][1][1][0][RTW89_CN][15] = 127, -+ [0][1][1][0][RTW89_UK][15] = 127, -+ [0][1][1][0][RTW89_FCC][17] = 127, -+ [0][1][1][0][RTW89_ETSI][17] = 127, -+ [0][1][1][0][RTW89_MKK][17] = 127, -+ [0][1][1][0][RTW89_IC][17] = 127, -+ [0][1][1][0][RTW89_KCC][17] = 127, -+ [0][1][1][0][RTW89_ACMA][17] = 127, -+ [0][1][1][0][RTW89_CN][17] = 127, -+ [0][1][1][0][RTW89_UK][17] = 127, -+ [0][1][1][0][RTW89_FCC][19] = 127, -+ [0][1][1][0][RTW89_ETSI][19] = 127, -+ [0][1][1][0][RTW89_MKK][19] = 127, -+ [0][1][1][0][RTW89_IC][19] = 127, -+ [0][1][1][0][RTW89_KCC][19] = 127, -+ [0][1][1][0][RTW89_ACMA][19] = 127, -+ [0][1][1][0][RTW89_CN][19] = 127, -+ [0][1][1][0][RTW89_UK][19] = 127, -+ [0][1][1][0][RTW89_FCC][21] = 127, -+ [0][1][1][0][RTW89_ETSI][21] = 127, -+ [0][1][1][0][RTW89_MKK][21] = 127, -+ [0][1][1][0][RTW89_IC][21] = 127, -+ [0][1][1][0][RTW89_KCC][21] = 127, -+ [0][1][1][0][RTW89_ACMA][21] = 127, -+ [0][1][1][0][RTW89_CN][21] = 127, -+ [0][1][1][0][RTW89_UK][21] = 127, -+ [0][1][1][0][RTW89_FCC][23] = 127, -+ [0][1][1][0][RTW89_ETSI][23] = 127, -+ [0][1][1][0][RTW89_MKK][23] = 127, -+ [0][1][1][0][RTW89_IC][23] = 127, -+ [0][1][1][0][RTW89_KCC][23] = 127, -+ [0][1][1][0][RTW89_ACMA][23] = 127, -+ [0][1][1][0][RTW89_CN][23] = 127, -+ [0][1][1][0][RTW89_UK][23] = 127, -+ [0][1][1][0][RTW89_FCC][25] = 127, -+ [0][1][1][0][RTW89_ETSI][25] = 127, -+ [0][1][1][0][RTW89_MKK][25] = 127, -+ [0][1][1][0][RTW89_IC][25] = 127, -+ [0][1][1][0][RTW89_KCC][25] = 127, -+ [0][1][1][0][RTW89_ACMA][25] = 127, -+ [0][1][1][0][RTW89_CN][25] = 127, -+ [0][1][1][0][RTW89_UK][25] = 127, -+ [0][1][1][0][RTW89_FCC][27] = 127, -+ [0][1][1][0][RTW89_ETSI][27] = 127, -+ [0][1][1][0][RTW89_MKK][27] = 127, -+ [0][1][1][0][RTW89_IC][27] = 127, -+ [0][1][1][0][RTW89_KCC][27] = 127, -+ [0][1][1][0][RTW89_ACMA][27] = 127, -+ [0][1][1][0][RTW89_CN][27] = 127, -+ [0][1][1][0][RTW89_UK][27] = 127, -+ [0][1][1][0][RTW89_FCC][29] = 127, -+ [0][1][1][0][RTW89_ETSI][29] = 127, -+ [0][1][1][0][RTW89_MKK][29] = 127, -+ [0][1][1][0][RTW89_IC][29] = 127, -+ [0][1][1][0][RTW89_KCC][29] = 127, -+ [0][1][1][0][RTW89_ACMA][29] = 127, -+ [0][1][1][0][RTW89_CN][29] = 127, -+ [0][1][1][0][RTW89_UK][29] = 127, -+ [0][1][1][0][RTW89_FCC][31] = 127, -+ [0][1][1][0][RTW89_ETSI][31] = 127, -+ [0][1][1][0][RTW89_MKK][31] = 127, -+ [0][1][1][0][RTW89_IC][31] = 127, -+ [0][1][1][0][RTW89_KCC][31] = 127, -+ [0][1][1][0][RTW89_ACMA][31] = 127, -+ [0][1][1][0][RTW89_CN][31] = 127, -+ [0][1][1][0][RTW89_UK][31] = 127, -+ [0][1][1][0][RTW89_FCC][33] = 127, -+ [0][1][1][0][RTW89_ETSI][33] = 127, -+ [0][1][1][0][RTW89_MKK][33] = 127, -+ [0][1][1][0][RTW89_IC][33] = 127, -+ [0][1][1][0][RTW89_KCC][33] = 127, -+ [0][1][1][0][RTW89_ACMA][33] = 127, -+ [0][1][1][0][RTW89_CN][33] = 127, -+ [0][1][1][0][RTW89_UK][33] = 127, -+ [0][1][1][0][RTW89_FCC][35] = 127, -+ [0][1][1][0][RTW89_ETSI][35] = 127, -+ [0][1][1][0][RTW89_MKK][35] = 127, -+ [0][1][1][0][RTW89_IC][35] = 127, -+ [0][1][1][0][RTW89_KCC][35] = 127, -+ [0][1][1][0][RTW89_ACMA][35] = 127, -+ [0][1][1][0][RTW89_CN][35] = 127, -+ [0][1][1][0][RTW89_UK][35] = 127, -+ [0][1][1][0][RTW89_FCC][37] = 127, -+ [0][1][1][0][RTW89_ETSI][37] = 127, -+ [0][1][1][0][RTW89_MKK][37] = 127, -+ [0][1][1][0][RTW89_IC][37] = 127, -+ [0][1][1][0][RTW89_KCC][37] = 127, -+ [0][1][1][0][RTW89_ACMA][37] = 127, -+ [0][1][1][0][RTW89_CN][37] = 127, -+ [0][1][1][0][RTW89_UK][37] = 127, -+ [0][1][1][0][RTW89_FCC][38] = 127, -+ [0][1][1][0][RTW89_ETSI][38] = 127, -+ [0][1][1][0][RTW89_MKK][38] = 127, -+ [0][1][1][0][RTW89_IC][38] = 127, -+ [0][1][1][0][RTW89_KCC][38] = 127, -+ [0][1][1][0][RTW89_ACMA][38] = 127, -+ [0][1][1][0][RTW89_CN][38] = 127, -+ [0][1][1][0][RTW89_UK][38] = 127, -+ [0][1][1][0][RTW89_FCC][40] = 127, -+ [0][1][1][0][RTW89_ETSI][40] = 127, -+ [0][1][1][0][RTW89_MKK][40] = 127, -+ [0][1][1][0][RTW89_IC][40] = 127, -+ [0][1][1][0][RTW89_KCC][40] = 127, -+ [0][1][1][0][RTW89_ACMA][40] = 127, -+ [0][1][1][0][RTW89_CN][40] = 127, -+ [0][1][1][0][RTW89_UK][40] = 127, -+ [0][1][1][0][RTW89_FCC][42] = 127, -+ [0][1][1][0][RTW89_ETSI][42] = 127, -+ [0][1][1][0][RTW89_MKK][42] = 127, -+ [0][1][1][0][RTW89_IC][42] = 127, -+ [0][1][1][0][RTW89_KCC][42] = 127, -+ [0][1][1][0][RTW89_ACMA][42] = 127, -+ [0][1][1][0][RTW89_CN][42] = 127, -+ [0][1][1][0][RTW89_UK][42] = 127, -+ [0][1][1][0][RTW89_FCC][44] = 127, -+ [0][1][1][0][RTW89_ETSI][44] = 127, -+ [0][1][1][0][RTW89_MKK][44] = 127, -+ [0][1][1][0][RTW89_IC][44] = 127, -+ [0][1][1][0][RTW89_KCC][44] = 127, -+ [0][1][1][0][RTW89_ACMA][44] = 127, -+ [0][1][1][0][RTW89_CN][44] = 127, -+ [0][1][1][0][RTW89_UK][44] = 127, -+ [0][1][1][0][RTW89_FCC][46] = 127, -+ [0][1][1][0][RTW89_ETSI][46] = 127, -+ [0][1][1][0][RTW89_MKK][46] = 127, -+ [0][1][1][0][RTW89_IC][46] = 127, -+ [0][1][1][0][RTW89_KCC][46] = 127, -+ [0][1][1][0][RTW89_ACMA][46] = 127, -+ [0][1][1][0][RTW89_CN][46] = 127, -+ [0][1][1][0][RTW89_UK][46] = 127, -+ [0][1][1][0][RTW89_FCC][48] = 127, -+ [0][1][1][0][RTW89_ETSI][48] = 127, -+ [0][1][1][0][RTW89_MKK][48] = 127, -+ [0][1][1][0][RTW89_IC][48] = 127, -+ [0][1][1][0][RTW89_KCC][48] = 127, -+ [0][1][1][0][RTW89_ACMA][48] = 127, -+ [0][1][1][0][RTW89_CN][48] = 127, -+ [0][1][1][0][RTW89_UK][48] = 127, -+ [0][1][1][0][RTW89_FCC][50] = 127, -+ [0][1][1][0][RTW89_ETSI][50] = 127, -+ [0][1][1][0][RTW89_MKK][50] = 127, -+ [0][1][1][0][RTW89_IC][50] = 127, -+ [0][1][1][0][RTW89_KCC][50] = 127, -+ [0][1][1][0][RTW89_ACMA][50] = 127, -+ [0][1][1][0][RTW89_CN][50] = 127, -+ [0][1][1][0][RTW89_UK][50] = 127, -+ [0][1][1][0][RTW89_FCC][52] = 127, -+ [0][1][1][0][RTW89_ETSI][52] = 127, -+ [0][1][1][0][RTW89_MKK][52] = 127, -+ [0][1][1][0][RTW89_IC][52] = 127, -+ [0][1][1][0][RTW89_KCC][52] = 127, -+ [0][1][1][0][RTW89_ACMA][52] = 127, -+ [0][1][1][0][RTW89_CN][52] = 127, -+ [0][1][1][0][RTW89_UK][52] = 127, -+ [0][0][2][0][RTW89_FCC][0] = 76, -+ [0][0][2][0][RTW89_ETSI][0] = 62, -+ [0][0][2][0][RTW89_MKK][0] = 62, -+ [0][0][2][0][RTW89_IC][0] = 64, -+ [0][0][2][0][RTW89_KCC][0] = 74, -+ [0][0][2][0][RTW89_ACMA][0] = 62, -+ [0][0][2][0][RTW89_CN][0] = 62, -+ [0][0][2][0][RTW89_UK][0] = 62, -+ [0][0][2][0][RTW89_FCC][2] = 78, -+ [0][0][2][0][RTW89_ETSI][2] = 62, -+ [0][0][2][0][RTW89_MKK][2] = 62, -+ [0][0][2][0][RTW89_IC][2] = 64, -+ [0][0][2][0][RTW89_KCC][2] = 74, -+ [0][0][2][0][RTW89_ACMA][2] = 62, -+ [0][0][2][0][RTW89_CN][2] = 62, -+ [0][0][2][0][RTW89_UK][2] = 62, -+ [0][0][2][0][RTW89_FCC][4] = 78, -+ [0][0][2][0][RTW89_ETSI][4] = 62, -+ [0][0][2][0][RTW89_MKK][4] = 62, -+ [0][0][2][0][RTW89_IC][4] = 64, -+ [0][0][2][0][RTW89_KCC][4] = 74, -+ [0][0][2][0][RTW89_ACMA][4] = 62, -+ [0][0][2][0][RTW89_CN][4] = 62, -+ [0][0][2][0][RTW89_UK][4] = 62, -+ [0][0][2][0][RTW89_FCC][6] = 78, -+ [0][0][2][0][RTW89_ETSI][6] = 62, -+ [0][0][2][0][RTW89_MKK][6] = 62, -+ [0][0][2][0][RTW89_IC][6] = 64, -+ [0][0][2][0][RTW89_KCC][6] = 54, -+ [0][0][2][0][RTW89_ACMA][6] = 62, -+ [0][0][2][0][RTW89_CN][6] = 62, -+ [0][0][2][0][RTW89_UK][6] = 62, -+ [0][0][2][0][RTW89_FCC][8] = 78, -+ [0][0][2][0][RTW89_ETSI][8] = 62, -+ [0][0][2][0][RTW89_MKK][8] = 62, -+ [0][0][2][0][RTW89_IC][8] = 64, -+ [0][0][2][0][RTW89_KCC][8] = 74, -+ [0][0][2][0][RTW89_ACMA][8] = 62, -+ [0][0][2][0][RTW89_CN][8] = 62, -+ [0][0][2][0][RTW89_UK][8] = 62, -+ [0][0][2][0][RTW89_FCC][10] = 78, -+ [0][0][2][0][RTW89_ETSI][10] = 62, -+ [0][0][2][0][RTW89_MKK][10] = 62, -+ [0][0][2][0][RTW89_IC][10] = 64, -+ [0][0][2][0][RTW89_KCC][10] = 74, -+ [0][0][2][0][RTW89_ACMA][10] = 62, -+ [0][0][2][0][RTW89_CN][10] = 62, -+ [0][0][2][0][RTW89_UK][10] = 62, -+ [0][0][2][0][RTW89_FCC][12] = 78, -+ [0][0][2][0][RTW89_ETSI][12] = 62, -+ [0][0][2][0][RTW89_MKK][12] = 62, -+ [0][0][2][0][RTW89_IC][12] = 64, -+ [0][0][2][0][RTW89_KCC][12] = 74, -+ [0][0][2][0][RTW89_ACMA][12] = 62, -+ [0][0][2][0][RTW89_CN][12] = 62, -+ [0][0][2][0][RTW89_UK][12] = 62, -+ [0][0][2][0][RTW89_FCC][14] = 74, -+ [0][0][2][0][RTW89_ETSI][14] = 62, -+ [0][0][2][0][RTW89_MKK][14] = 62, -+ [0][0][2][0][RTW89_IC][14] = 64, -+ [0][0][2][0][RTW89_KCC][14] = 74, -+ [0][0][2][0][RTW89_ACMA][14] = 62, -+ [0][0][2][0][RTW89_CN][14] = 62, -+ [0][0][2][0][RTW89_UK][14] = 62, -+ [0][0][2][0][RTW89_FCC][15] = 74, -+ [0][0][2][0][RTW89_ETSI][15] = 60, -+ [0][0][2][0][RTW89_MKK][15] = 74, -+ [0][0][2][0][RTW89_IC][15] = 74, -+ [0][0][2][0][RTW89_KCC][15] = 74, -+ [0][0][2][0][RTW89_ACMA][15] = 60, -+ [0][0][2][0][RTW89_CN][15] = 127, -+ [0][0][2][0][RTW89_UK][15] = 60, -+ [0][0][2][0][RTW89_FCC][17] = 78, -+ [0][0][2][0][RTW89_ETSI][17] = 62, -+ [0][0][2][0][RTW89_MKK][17] = 74, -+ [0][0][2][0][RTW89_IC][17] = 78, -+ [0][0][2][0][RTW89_KCC][17] = 74, -+ [0][0][2][0][RTW89_ACMA][17] = 62, -+ [0][0][2][0][RTW89_CN][17] = 127, -+ [0][0][2][0][RTW89_UK][17] = 62, -+ [0][0][2][0][RTW89_FCC][19] = 78, -+ [0][0][2][0][RTW89_ETSI][19] = 62, -+ [0][0][2][0][RTW89_MKK][19] = 74, -+ [0][0][2][0][RTW89_IC][19] = 78, -+ [0][0][2][0][RTW89_KCC][19] = 74, -+ [0][0][2][0][RTW89_ACMA][19] = 62, -+ [0][0][2][0][RTW89_CN][19] = 127, -+ [0][0][2][0][RTW89_UK][19] = 62, -+ [0][0][2][0][RTW89_FCC][21] = 78, -+ [0][0][2][0][RTW89_ETSI][21] = 62, -+ [0][0][2][0][RTW89_MKK][21] = 74, -+ [0][0][2][0][RTW89_IC][21] = 78, -+ [0][0][2][0][RTW89_KCC][21] = 74, -+ [0][0][2][0][RTW89_ACMA][21] = 62, -+ [0][0][2][0][RTW89_CN][21] = 127, -+ [0][0][2][0][RTW89_UK][21] = 62, -+ [0][0][2][0][RTW89_FCC][23] = 78, -+ [0][0][2][0][RTW89_ETSI][23] = 62, -+ [0][0][2][0][RTW89_MKK][23] = 74, -+ [0][0][2][0][RTW89_IC][23] = 78, -+ [0][0][2][0][RTW89_KCC][23] = 74, -+ [0][0][2][0][RTW89_ACMA][23] = 62, -+ [0][0][2][0][RTW89_CN][23] = 127, -+ [0][0][2][0][RTW89_UK][23] = 62, -+ [0][0][2][0][RTW89_FCC][25] = 78, -+ [0][0][2][0][RTW89_ETSI][25] = 62, -+ [0][0][2][0][RTW89_MKK][25] = 74, -+ [0][0][2][0][RTW89_IC][25] = 127, -+ [0][0][2][0][RTW89_KCC][25] = 74, -+ [0][0][2][0][RTW89_ACMA][25] = 127, -+ [0][0][2][0][RTW89_CN][25] = 127, -+ [0][0][2][0][RTW89_UK][25] = 62, -+ [0][0][2][0][RTW89_FCC][27] = 78, -+ [0][0][2][0][RTW89_ETSI][27] = 62, -+ [0][0][2][0][RTW89_MKK][27] = 74, -+ [0][0][2][0][RTW89_IC][27] = 127, -+ [0][0][2][0][RTW89_KCC][27] = 74, -+ [0][0][2][0][RTW89_ACMA][27] = 127, -+ [0][0][2][0][RTW89_CN][27] = 127, -+ [0][0][2][0][RTW89_UK][27] = 62, -+ [0][0][2][0][RTW89_FCC][29] = 78, -+ [0][0][2][0][RTW89_ETSI][29] = 62, -+ [0][0][2][0][RTW89_MKK][29] = 74, -+ [0][0][2][0][RTW89_IC][29] = 127, -+ [0][0][2][0][RTW89_KCC][29] = 74, -+ [0][0][2][0][RTW89_ACMA][29] = 127, -+ [0][0][2][0][RTW89_CN][29] = 127, -+ [0][0][2][0][RTW89_UK][29] = 62, -+ [0][0][2][0][RTW89_FCC][31] = 78, -+ [0][0][2][0][RTW89_ETSI][31] = 62, -+ [0][0][2][0][RTW89_MKK][31] = 74, -+ [0][0][2][0][RTW89_IC][31] = 78, -+ [0][0][2][0][RTW89_KCC][31] = 74, -+ [0][0][2][0][RTW89_ACMA][31] = 62, -+ [0][0][2][0][RTW89_CN][31] = 127, -+ [0][0][2][0][RTW89_UK][31] = 62, -+ [0][0][2][0][RTW89_FCC][33] = 78, -+ [0][0][2][0][RTW89_ETSI][33] = 62, -+ [0][0][2][0][RTW89_MKK][33] = 74, -+ [0][0][2][0][RTW89_IC][33] = 78, -+ [0][0][2][0][RTW89_KCC][33] = 74, -+ [0][0][2][0][RTW89_ACMA][33] = 62, -+ [0][0][2][0][RTW89_CN][33] = 127, -+ [0][0][2][0][RTW89_UK][33] = 62, -+ [0][0][2][0][RTW89_FCC][35] = 72, -+ [0][0][2][0][RTW89_ETSI][35] = 62, -+ [0][0][2][0][RTW89_MKK][35] = 74, -+ [0][0][2][0][RTW89_IC][35] = 72, -+ [0][0][2][0][RTW89_KCC][35] = 74, -+ [0][0][2][0][RTW89_ACMA][35] = 62, -+ [0][0][2][0][RTW89_CN][35] = 127, -+ [0][0][2][0][RTW89_UK][35] = 62, -+ [0][0][2][0][RTW89_FCC][37] = 78, -+ [0][0][2][0][RTW89_ETSI][37] = 127, -+ [0][0][2][0][RTW89_MKK][37] = 74, -+ [0][0][2][0][RTW89_IC][37] = 78, -+ [0][0][2][0][RTW89_KCC][37] = 74, -+ [0][0][2][0][RTW89_ACMA][37] = 74, -+ [0][0][2][0][RTW89_CN][37] = 127, -+ [0][0][2][0][RTW89_UK][37] = 74, -+ [0][0][2][0][RTW89_FCC][38] = 78, -+ [0][0][2][0][RTW89_ETSI][38] = 30, -+ [0][0][2][0][RTW89_MKK][38] = 127, -+ [0][0][2][0][RTW89_IC][38] = 78, -+ [0][0][2][0][RTW89_KCC][38] = 66, -+ [0][0][2][0][RTW89_ACMA][38] = 74, -+ [0][0][2][0][RTW89_CN][38] = 74, -+ [0][0][2][0][RTW89_UK][38] = 60, -+ [0][0][2][0][RTW89_FCC][40] = 78, -+ [0][0][2][0][RTW89_ETSI][40] = 30, -+ [0][0][2][0][RTW89_MKK][40] = 127, -+ [0][0][2][0][RTW89_IC][40] = 78, -+ [0][0][2][0][RTW89_KCC][40] = 74, -+ [0][0][2][0][RTW89_ACMA][40] = 74, -+ [0][0][2][0][RTW89_CN][40] = 74, -+ [0][0][2][0][RTW89_UK][40] = 60, -+ [0][0][2][0][RTW89_FCC][42] = 78, -+ [0][0][2][0][RTW89_ETSI][42] = 30, -+ [0][0][2][0][RTW89_MKK][42] = 127, -+ [0][0][2][0][RTW89_IC][42] = 78, -+ [0][0][2][0][RTW89_KCC][42] = 74, -+ [0][0][2][0][RTW89_ACMA][42] = 74, -+ [0][0][2][0][RTW89_CN][42] = 74, -+ [0][0][2][0][RTW89_UK][42] = 60, -+ [0][0][2][0][RTW89_FCC][44] = 78, -+ [0][0][2][0][RTW89_ETSI][44] = 30, -+ [0][0][2][0][RTW89_MKK][44] = 127, -+ [0][0][2][0][RTW89_IC][44] = 78, -+ [0][0][2][0][RTW89_KCC][44] = 74, -+ [0][0][2][0][RTW89_ACMA][44] = 74, -+ [0][0][2][0][RTW89_CN][44] = 74, -+ [0][0][2][0][RTW89_UK][44] = 60, -+ [0][0][2][0][RTW89_FCC][46] = 78, -+ [0][0][2][0][RTW89_ETSI][46] = 30, -+ [0][0][2][0][RTW89_MKK][46] = 127, -+ [0][0][2][0][RTW89_IC][46] = 78, -+ [0][0][2][0][RTW89_KCC][46] = 74, -+ [0][0][2][0][RTW89_ACMA][46] = 74, -+ [0][0][2][0][RTW89_CN][46] = 74, -+ [0][0][2][0][RTW89_UK][46] = 60, -+ [0][0][2][0][RTW89_FCC][48] = 74, -+ [0][0][2][0][RTW89_ETSI][48] = 127, -+ [0][0][2][0][RTW89_MKK][48] = 127, -+ [0][0][2][0][RTW89_IC][48] = 127, -+ [0][0][2][0][RTW89_KCC][48] = 127, -+ [0][0][2][0][RTW89_ACMA][48] = 127, -+ [0][0][2][0][RTW89_CN][48] = 127, -+ [0][0][2][0][RTW89_UK][48] = 127, -+ [0][0][2][0][RTW89_FCC][50] = 74, -+ [0][0][2][0][RTW89_ETSI][50] = 127, -+ [0][0][2][0][RTW89_MKK][50] = 127, -+ [0][0][2][0][RTW89_IC][50] = 127, -+ [0][0][2][0][RTW89_KCC][50] = 127, -+ [0][0][2][0][RTW89_ACMA][50] = 127, -+ [0][0][2][0][RTW89_CN][50] = 127, -+ [0][0][2][0][RTW89_UK][50] = 127, -+ [0][0][2][0][RTW89_FCC][52] = 74, -+ [0][0][2][0][RTW89_ETSI][52] = 127, -+ [0][0][2][0][RTW89_MKK][52] = 127, -+ [0][0][2][0][RTW89_IC][52] = 127, -+ [0][0][2][0][RTW89_KCC][52] = 127, -+ [0][0][2][0][RTW89_ACMA][52] = 127, -+ [0][0][2][0][RTW89_CN][52] = 127, -+ [0][0][2][0][RTW89_UK][52] = 127, -+ [0][1][2][0][RTW89_FCC][0] = 127, -+ [0][1][2][0][RTW89_ETSI][0] = 127, -+ [0][1][2][0][RTW89_MKK][0] = 127, -+ [0][1][2][0][RTW89_IC][0] = 127, -+ [0][1][2][0][RTW89_KCC][0] = 127, -+ [0][1][2][0][RTW89_ACMA][0] = 127, -+ [0][1][2][0][RTW89_CN][0] = 127, -+ [0][1][2][0][RTW89_UK][0] = 127, -+ [0][1][2][0][RTW89_FCC][2] = 127, -+ [0][1][2][0][RTW89_ETSI][2] = 127, -+ [0][1][2][0][RTW89_MKK][2] = 127, -+ [0][1][2][0][RTW89_IC][2] = 127, -+ [0][1][2][0][RTW89_KCC][2] = 127, -+ [0][1][2][0][RTW89_ACMA][2] = 127, -+ [0][1][2][0][RTW89_CN][2] = 127, -+ [0][1][2][0][RTW89_UK][2] = 127, -+ [0][1][2][0][RTW89_FCC][4] = 127, -+ [0][1][2][0][RTW89_ETSI][4] = 127, -+ [0][1][2][0][RTW89_MKK][4] = 127, -+ [0][1][2][0][RTW89_IC][4] = 127, -+ [0][1][2][0][RTW89_KCC][4] = 127, -+ [0][1][2][0][RTW89_ACMA][4] = 127, -+ [0][1][2][0][RTW89_CN][4] = 127, -+ [0][1][2][0][RTW89_UK][4] = 127, -+ [0][1][2][0][RTW89_FCC][6] = 127, -+ [0][1][2][0][RTW89_ETSI][6] = 127, -+ [0][1][2][0][RTW89_MKK][6] = 127, -+ [0][1][2][0][RTW89_IC][6] = 127, -+ [0][1][2][0][RTW89_KCC][6] = 127, -+ [0][1][2][0][RTW89_ACMA][6] = 127, -+ [0][1][2][0][RTW89_CN][6] = 127, -+ [0][1][2][0][RTW89_UK][6] = 127, -+ [0][1][2][0][RTW89_FCC][8] = 127, -+ [0][1][2][0][RTW89_ETSI][8] = 127, -+ [0][1][2][0][RTW89_MKK][8] = 127, -+ [0][1][2][0][RTW89_IC][8] = 127, -+ [0][1][2][0][RTW89_KCC][8] = 127, -+ [0][1][2][0][RTW89_ACMA][8] = 127, -+ [0][1][2][0][RTW89_CN][8] = 127, -+ [0][1][2][0][RTW89_UK][8] = 127, -+ [0][1][2][0][RTW89_FCC][10] = 127, -+ [0][1][2][0][RTW89_ETSI][10] = 127, -+ [0][1][2][0][RTW89_MKK][10] = 127, -+ [0][1][2][0][RTW89_IC][10] = 127, -+ [0][1][2][0][RTW89_KCC][10] = 127, -+ [0][1][2][0][RTW89_ACMA][10] = 127, -+ [0][1][2][0][RTW89_CN][10] = 127, -+ [0][1][2][0][RTW89_UK][10] = 127, -+ [0][1][2][0][RTW89_FCC][12] = 127, -+ [0][1][2][0][RTW89_ETSI][12] = 127, -+ [0][1][2][0][RTW89_MKK][12] = 127, -+ [0][1][2][0][RTW89_IC][12] = 127, -+ [0][1][2][0][RTW89_KCC][12] = 127, -+ [0][1][2][0][RTW89_ACMA][12] = 127, -+ [0][1][2][0][RTW89_CN][12] = 127, -+ [0][1][2][0][RTW89_UK][12] = 127, -+ [0][1][2][0][RTW89_FCC][14] = 127, -+ [0][1][2][0][RTW89_ETSI][14] = 127, -+ [0][1][2][0][RTW89_MKK][14] = 127, -+ [0][1][2][0][RTW89_IC][14] = 127, -+ [0][1][2][0][RTW89_KCC][14] = 127, -+ [0][1][2][0][RTW89_ACMA][14] = 127, -+ [0][1][2][0][RTW89_CN][14] = 127, -+ [0][1][2][0][RTW89_UK][14] = 127, -+ [0][1][2][0][RTW89_FCC][15] = 127, -+ [0][1][2][0][RTW89_ETSI][15] = 127, -+ [0][1][2][0][RTW89_MKK][15] = 127, -+ [0][1][2][0][RTW89_IC][15] = 127, -+ [0][1][2][0][RTW89_KCC][15] = 127, -+ [0][1][2][0][RTW89_ACMA][15] = 127, -+ [0][1][2][0][RTW89_CN][15] = 127, -+ [0][1][2][0][RTW89_UK][15] = 127, -+ [0][1][2][0][RTW89_FCC][17] = 127, -+ [0][1][2][0][RTW89_ETSI][17] = 127, -+ [0][1][2][0][RTW89_MKK][17] = 127, -+ [0][1][2][0][RTW89_IC][17] = 127, -+ [0][1][2][0][RTW89_KCC][17] = 127, -+ [0][1][2][0][RTW89_ACMA][17] = 127, -+ [0][1][2][0][RTW89_CN][17] = 127, -+ [0][1][2][0][RTW89_UK][17] = 127, -+ [0][1][2][0][RTW89_FCC][19] = 127, -+ [0][1][2][0][RTW89_ETSI][19] = 127, -+ [0][1][2][0][RTW89_MKK][19] = 127, -+ [0][1][2][0][RTW89_IC][19] = 127, -+ [0][1][2][0][RTW89_KCC][19] = 127, -+ [0][1][2][0][RTW89_ACMA][19] = 127, -+ [0][1][2][0][RTW89_CN][19] = 127, -+ [0][1][2][0][RTW89_UK][19] = 127, -+ [0][1][2][0][RTW89_FCC][21] = 127, -+ [0][1][2][0][RTW89_ETSI][21] = 127, -+ [0][1][2][0][RTW89_MKK][21] = 127, -+ [0][1][2][0][RTW89_IC][21] = 127, -+ [0][1][2][0][RTW89_KCC][21] = 127, -+ [0][1][2][0][RTW89_ACMA][21] = 127, -+ [0][1][2][0][RTW89_CN][21] = 127, -+ [0][1][2][0][RTW89_UK][21] = 127, -+ [0][1][2][0][RTW89_FCC][23] = 127, -+ [0][1][2][0][RTW89_ETSI][23] = 127, -+ [0][1][2][0][RTW89_MKK][23] = 127, -+ [0][1][2][0][RTW89_IC][23] = 127, -+ [0][1][2][0][RTW89_KCC][23] = 127, -+ [0][1][2][0][RTW89_ACMA][23] = 127, -+ [0][1][2][0][RTW89_CN][23] = 127, -+ [0][1][2][0][RTW89_UK][23] = 127, -+ [0][1][2][0][RTW89_FCC][25] = 127, -+ [0][1][2][0][RTW89_ETSI][25] = 127, -+ [0][1][2][0][RTW89_MKK][25] = 127, -+ [0][1][2][0][RTW89_IC][25] = 127, -+ [0][1][2][0][RTW89_KCC][25] = 127, -+ [0][1][2][0][RTW89_ACMA][25] = 127, -+ [0][1][2][0][RTW89_CN][25] = 127, -+ [0][1][2][0][RTW89_UK][25] = 127, -+ [0][1][2][0][RTW89_FCC][27] = 127, -+ [0][1][2][0][RTW89_ETSI][27] = 127, -+ [0][1][2][0][RTW89_MKK][27] = 127, -+ [0][1][2][0][RTW89_IC][27] = 127, -+ [0][1][2][0][RTW89_KCC][27] = 127, -+ [0][1][2][0][RTW89_ACMA][27] = 127, -+ [0][1][2][0][RTW89_CN][27] = 127, -+ [0][1][2][0][RTW89_UK][27] = 127, -+ [0][1][2][0][RTW89_FCC][29] = 127, -+ [0][1][2][0][RTW89_ETSI][29] = 127, -+ [0][1][2][0][RTW89_MKK][29] = 127, -+ [0][1][2][0][RTW89_IC][29] = 127, -+ [0][1][2][0][RTW89_KCC][29] = 127, -+ [0][1][2][0][RTW89_ACMA][29] = 127, -+ [0][1][2][0][RTW89_CN][29] = 127, -+ [0][1][2][0][RTW89_UK][29] = 127, -+ [0][1][2][0][RTW89_FCC][31] = 127, -+ [0][1][2][0][RTW89_ETSI][31] = 127, -+ [0][1][2][0][RTW89_MKK][31] = 127, -+ [0][1][2][0][RTW89_IC][31] = 127, -+ [0][1][2][0][RTW89_KCC][31] = 127, -+ [0][1][2][0][RTW89_ACMA][31] = 127, -+ [0][1][2][0][RTW89_CN][31] = 127, -+ [0][1][2][0][RTW89_UK][31] = 127, -+ [0][1][2][0][RTW89_FCC][33] = 127, -+ [0][1][2][0][RTW89_ETSI][33] = 127, -+ [0][1][2][0][RTW89_MKK][33] = 127, -+ [0][1][2][0][RTW89_IC][33] = 127, -+ [0][1][2][0][RTW89_KCC][33] = 127, -+ [0][1][2][0][RTW89_ACMA][33] = 127, -+ [0][1][2][0][RTW89_CN][33] = 127, -+ [0][1][2][0][RTW89_UK][33] = 127, -+ [0][1][2][0][RTW89_FCC][35] = 127, -+ [0][1][2][0][RTW89_ETSI][35] = 127, -+ [0][1][2][0][RTW89_MKK][35] = 127, -+ [0][1][2][0][RTW89_IC][35] = 127, -+ [0][1][2][0][RTW89_KCC][35] = 127, -+ [0][1][2][0][RTW89_ACMA][35] = 127, -+ [0][1][2][0][RTW89_CN][35] = 127, -+ [0][1][2][0][RTW89_UK][35] = 127, -+ [0][1][2][0][RTW89_FCC][37] = 127, -+ [0][1][2][0][RTW89_ETSI][37] = 127, -+ [0][1][2][0][RTW89_MKK][37] = 127, -+ [0][1][2][0][RTW89_IC][37] = 127, -+ [0][1][2][0][RTW89_KCC][37] = 127, -+ [0][1][2][0][RTW89_ACMA][37] = 127, -+ [0][1][2][0][RTW89_CN][37] = 127, -+ [0][1][2][0][RTW89_UK][37] = 127, -+ [0][1][2][0][RTW89_FCC][38] = 127, -+ [0][1][2][0][RTW89_ETSI][38] = 127, -+ [0][1][2][0][RTW89_MKK][38] = 127, -+ [0][1][2][0][RTW89_IC][38] = 127, -+ [0][1][2][0][RTW89_KCC][38] = 127, -+ [0][1][2][0][RTW89_ACMA][38] = 127, -+ [0][1][2][0][RTW89_CN][38] = 127, -+ [0][1][2][0][RTW89_UK][38] = 127, -+ [0][1][2][0][RTW89_FCC][40] = 127, -+ [0][1][2][0][RTW89_ETSI][40] = 127, -+ [0][1][2][0][RTW89_MKK][40] = 127, -+ [0][1][2][0][RTW89_IC][40] = 127, -+ [0][1][2][0][RTW89_KCC][40] = 127, -+ [0][1][2][0][RTW89_ACMA][40] = 127, -+ [0][1][2][0][RTW89_CN][40] = 127, -+ [0][1][2][0][RTW89_UK][40] = 127, -+ [0][1][2][0][RTW89_FCC][42] = 127, -+ [0][1][2][0][RTW89_ETSI][42] = 127, -+ [0][1][2][0][RTW89_MKK][42] = 127, -+ [0][1][2][0][RTW89_IC][42] = 127, -+ [0][1][2][0][RTW89_KCC][42] = 127, -+ [0][1][2][0][RTW89_ACMA][42] = 127, -+ [0][1][2][0][RTW89_CN][42] = 127, -+ [0][1][2][0][RTW89_UK][42] = 127, -+ [0][1][2][0][RTW89_FCC][44] = 127, -+ [0][1][2][0][RTW89_ETSI][44] = 127, -+ [0][1][2][0][RTW89_MKK][44] = 127, -+ [0][1][2][0][RTW89_IC][44] = 127, -+ [0][1][2][0][RTW89_KCC][44] = 127, -+ [0][1][2][0][RTW89_ACMA][44] = 127, -+ [0][1][2][0][RTW89_CN][44] = 127, -+ [0][1][2][0][RTW89_UK][44] = 127, -+ [0][1][2][0][RTW89_FCC][46] = 127, -+ [0][1][2][0][RTW89_ETSI][46] = 127, -+ [0][1][2][0][RTW89_MKK][46] = 127, -+ [0][1][2][0][RTW89_IC][46] = 127, -+ [0][1][2][0][RTW89_KCC][46] = 127, -+ [0][1][2][0][RTW89_ACMA][46] = 127, -+ [0][1][2][0][RTW89_CN][46] = 127, -+ [0][1][2][0][RTW89_UK][46] = 127, -+ [0][1][2][0][RTW89_FCC][48] = 127, -+ [0][1][2][0][RTW89_ETSI][48] = 127, -+ [0][1][2][0][RTW89_MKK][48] = 127, -+ [0][1][2][0][RTW89_IC][48] = 127, -+ [0][1][2][0][RTW89_KCC][48] = 127, -+ [0][1][2][0][RTW89_ACMA][48] = 127, -+ [0][1][2][0][RTW89_CN][48] = 127, -+ [0][1][2][0][RTW89_UK][48] = 127, -+ [0][1][2][0][RTW89_FCC][50] = 127, -+ [0][1][2][0][RTW89_ETSI][50] = 127, -+ [0][1][2][0][RTW89_MKK][50] = 127, -+ [0][1][2][0][RTW89_IC][50] = 127, -+ [0][1][2][0][RTW89_KCC][50] = 127, -+ [0][1][2][0][RTW89_ACMA][50] = 127, -+ [0][1][2][0][RTW89_CN][50] = 127, -+ [0][1][2][0][RTW89_UK][50] = 127, -+ [0][1][2][0][RTW89_FCC][52] = 127, -+ [0][1][2][0][RTW89_ETSI][52] = 127, -+ [0][1][2][0][RTW89_MKK][52] = 127, -+ [0][1][2][0][RTW89_IC][52] = 127, -+ [0][1][2][0][RTW89_KCC][52] = 127, -+ [0][1][2][0][RTW89_ACMA][52] = 127, -+ [0][1][2][0][RTW89_CN][52] = 127, -+ [0][1][2][0][RTW89_UK][52] = 127, -+ [0][1][2][1][RTW89_FCC][0] = 127, -+ [0][1][2][1][RTW89_ETSI][0] = 127, -+ [0][1][2][1][RTW89_MKK][0] = 127, -+ [0][1][2][1][RTW89_IC][0] = 127, -+ [0][1][2][1][RTW89_KCC][0] = 127, -+ [0][1][2][1][RTW89_ACMA][0] = 127, -+ [0][1][2][1][RTW89_CN][0] = 127, -+ [0][1][2][1][RTW89_UK][0] = 127, -+ [0][1][2][1][RTW89_FCC][2] = 127, -+ [0][1][2][1][RTW89_ETSI][2] = 127, -+ [0][1][2][1][RTW89_MKK][2] = 127, -+ [0][1][2][1][RTW89_IC][2] = 127, -+ [0][1][2][1][RTW89_KCC][2] = 127, -+ [0][1][2][1][RTW89_ACMA][2] = 127, -+ [0][1][2][1][RTW89_CN][2] = 127, -+ [0][1][2][1][RTW89_UK][2] = 127, -+ [0][1][2][1][RTW89_FCC][4] = 127, -+ [0][1][2][1][RTW89_ETSI][4] = 127, -+ [0][1][2][1][RTW89_MKK][4] = 127, -+ [0][1][2][1][RTW89_IC][4] = 127, -+ [0][1][2][1][RTW89_KCC][4] = 127, -+ [0][1][2][1][RTW89_ACMA][4] = 127, -+ [0][1][2][1][RTW89_CN][4] = 127, -+ [0][1][2][1][RTW89_UK][4] = 127, -+ [0][1][2][1][RTW89_FCC][6] = 127, -+ [0][1][2][1][RTW89_ETSI][6] = 127, -+ [0][1][2][1][RTW89_MKK][6] = 127, -+ [0][1][2][1][RTW89_IC][6] = 127, -+ [0][1][2][1][RTW89_KCC][6] = 127, -+ [0][1][2][1][RTW89_ACMA][6] = 127, -+ [0][1][2][1][RTW89_CN][6] = 127, -+ [0][1][2][1][RTW89_UK][6] = 127, -+ [0][1][2][1][RTW89_FCC][8] = 127, -+ [0][1][2][1][RTW89_ETSI][8] = 127, -+ [0][1][2][1][RTW89_MKK][8] = 127, -+ [0][1][2][1][RTW89_IC][8] = 127, -+ [0][1][2][1][RTW89_KCC][8] = 127, -+ [0][1][2][1][RTW89_ACMA][8] = 127, -+ [0][1][2][1][RTW89_CN][8] = 127, -+ [0][1][2][1][RTW89_UK][8] = 127, -+ [0][1][2][1][RTW89_FCC][10] = 127, -+ [0][1][2][1][RTW89_ETSI][10] = 127, -+ [0][1][2][1][RTW89_MKK][10] = 127, -+ [0][1][2][1][RTW89_IC][10] = 127, -+ [0][1][2][1][RTW89_KCC][10] = 127, -+ [0][1][2][1][RTW89_ACMA][10] = 127, -+ [0][1][2][1][RTW89_CN][10] = 127, -+ [0][1][2][1][RTW89_UK][10] = 127, -+ [0][1][2][1][RTW89_FCC][12] = 127, -+ [0][1][2][1][RTW89_ETSI][12] = 127, -+ [0][1][2][1][RTW89_MKK][12] = 127, -+ [0][1][2][1][RTW89_IC][12] = 127, -+ [0][1][2][1][RTW89_KCC][12] = 127, -+ [0][1][2][1][RTW89_ACMA][12] = 127, -+ [0][1][2][1][RTW89_CN][12] = 127, -+ [0][1][2][1][RTW89_UK][12] = 127, -+ [0][1][2][1][RTW89_FCC][14] = 127, -+ [0][1][2][1][RTW89_ETSI][14] = 127, -+ [0][1][2][1][RTW89_MKK][14] = 127, -+ [0][1][2][1][RTW89_IC][14] = 127, -+ [0][1][2][1][RTW89_KCC][14] = 127, -+ [0][1][2][1][RTW89_ACMA][14] = 127, -+ [0][1][2][1][RTW89_CN][14] = 127, -+ [0][1][2][1][RTW89_UK][14] = 127, -+ [0][1][2][1][RTW89_FCC][15] = 127, -+ [0][1][2][1][RTW89_ETSI][15] = 127, -+ [0][1][2][1][RTW89_MKK][15] = 127, -+ [0][1][2][1][RTW89_IC][15] = 127, -+ [0][1][2][1][RTW89_KCC][15] = 127, -+ [0][1][2][1][RTW89_ACMA][15] = 127, -+ [0][1][2][1][RTW89_CN][15] = 127, -+ [0][1][2][1][RTW89_UK][15] = 127, -+ [0][1][2][1][RTW89_FCC][17] = 127, -+ [0][1][2][1][RTW89_ETSI][17] = 127, -+ [0][1][2][1][RTW89_MKK][17] = 127, -+ [0][1][2][1][RTW89_IC][17] = 127, -+ [0][1][2][1][RTW89_KCC][17] = 127, -+ [0][1][2][1][RTW89_ACMA][17] = 127, -+ [0][1][2][1][RTW89_CN][17] = 127, -+ [0][1][2][1][RTW89_UK][17] = 127, -+ [0][1][2][1][RTW89_FCC][19] = 127, -+ [0][1][2][1][RTW89_ETSI][19] = 127, -+ [0][1][2][1][RTW89_MKK][19] = 127, -+ [0][1][2][1][RTW89_IC][19] = 127, -+ [0][1][2][1][RTW89_KCC][19] = 127, -+ [0][1][2][1][RTW89_ACMA][19] = 127, -+ [0][1][2][1][RTW89_CN][19] = 127, -+ [0][1][2][1][RTW89_UK][19] = 127, -+ [0][1][2][1][RTW89_FCC][21] = 127, -+ [0][1][2][1][RTW89_ETSI][21] = 127, -+ [0][1][2][1][RTW89_MKK][21] = 127, -+ [0][1][2][1][RTW89_IC][21] = 127, -+ [0][1][2][1][RTW89_KCC][21] = 127, -+ [0][1][2][1][RTW89_ACMA][21] = 127, -+ [0][1][2][1][RTW89_CN][21] = 127, -+ [0][1][2][1][RTW89_UK][21] = 127, -+ [0][1][2][1][RTW89_FCC][23] = 127, -+ [0][1][2][1][RTW89_ETSI][23] = 127, -+ [0][1][2][1][RTW89_MKK][23] = 127, -+ [0][1][2][1][RTW89_IC][23] = 127, -+ [0][1][2][1][RTW89_KCC][23] = 127, -+ [0][1][2][1][RTW89_ACMA][23] = 127, -+ [0][1][2][1][RTW89_CN][23] = 127, -+ [0][1][2][1][RTW89_UK][23] = 127, -+ [0][1][2][1][RTW89_FCC][25] = 127, -+ [0][1][2][1][RTW89_ETSI][25] = 127, -+ [0][1][2][1][RTW89_MKK][25] = 127, -+ [0][1][2][1][RTW89_IC][25] = 127, -+ [0][1][2][1][RTW89_KCC][25] = 127, -+ [0][1][2][1][RTW89_ACMA][25] = 127, -+ [0][1][2][1][RTW89_CN][25] = 127, -+ [0][1][2][1][RTW89_UK][25] = 127, -+ [0][1][2][1][RTW89_FCC][27] = 127, -+ [0][1][2][1][RTW89_ETSI][27] = 127, -+ [0][1][2][1][RTW89_MKK][27] = 127, -+ [0][1][2][1][RTW89_IC][27] = 127, -+ [0][1][2][1][RTW89_KCC][27] = 127, -+ [0][1][2][1][RTW89_ACMA][27] = 127, -+ [0][1][2][1][RTW89_CN][27] = 127, -+ [0][1][2][1][RTW89_UK][27] = 127, -+ [0][1][2][1][RTW89_FCC][29] = 127, -+ [0][1][2][1][RTW89_ETSI][29] = 127, -+ [0][1][2][1][RTW89_MKK][29] = 127, -+ [0][1][2][1][RTW89_IC][29] = 127, -+ [0][1][2][1][RTW89_KCC][29] = 127, -+ [0][1][2][1][RTW89_ACMA][29] = 127, -+ [0][1][2][1][RTW89_CN][29] = 127, -+ [0][1][2][1][RTW89_UK][29] = 127, -+ [0][1][2][1][RTW89_FCC][31] = 127, -+ [0][1][2][1][RTW89_ETSI][31] = 127, -+ [0][1][2][1][RTW89_MKK][31] = 127, -+ [0][1][2][1][RTW89_IC][31] = 127, -+ [0][1][2][1][RTW89_KCC][31] = 127, -+ [0][1][2][1][RTW89_ACMA][31] = 127, -+ [0][1][2][1][RTW89_CN][31] = 127, -+ [0][1][2][1][RTW89_UK][31] = 127, -+ [0][1][2][1][RTW89_FCC][33] = 127, -+ [0][1][2][1][RTW89_ETSI][33] = 127, -+ [0][1][2][1][RTW89_MKK][33] = 127, -+ [0][1][2][1][RTW89_IC][33] = 127, -+ [0][1][2][1][RTW89_KCC][33] = 127, -+ [0][1][2][1][RTW89_ACMA][33] = 127, -+ [0][1][2][1][RTW89_CN][33] = 127, -+ [0][1][2][1][RTW89_UK][33] = 127, -+ [0][1][2][1][RTW89_FCC][35] = 127, -+ [0][1][2][1][RTW89_ETSI][35] = 127, -+ [0][1][2][1][RTW89_MKK][35] = 127, -+ [0][1][2][1][RTW89_IC][35] = 127, -+ [0][1][2][1][RTW89_KCC][35] = 127, -+ [0][1][2][1][RTW89_ACMA][35] = 127, -+ [0][1][2][1][RTW89_CN][35] = 127, -+ [0][1][2][1][RTW89_UK][35] = 127, -+ [0][1][2][1][RTW89_FCC][37] = 127, -+ [0][1][2][1][RTW89_ETSI][37] = 127, -+ [0][1][2][1][RTW89_MKK][37] = 127, -+ [0][1][2][1][RTW89_IC][37] = 127, -+ [0][1][2][1][RTW89_KCC][37] = 127, -+ [0][1][2][1][RTW89_ACMA][37] = 127, -+ [0][1][2][1][RTW89_CN][37] = 127, -+ [0][1][2][1][RTW89_UK][37] = 127, -+ [0][1][2][1][RTW89_FCC][38] = 127, -+ [0][1][2][1][RTW89_ETSI][38] = 127, -+ [0][1][2][1][RTW89_MKK][38] = 127, -+ [0][1][2][1][RTW89_IC][38] = 127, -+ [0][1][2][1][RTW89_KCC][38] = 127, -+ [0][1][2][1][RTW89_ACMA][38] = 127, -+ [0][1][2][1][RTW89_CN][38] = 127, -+ [0][1][2][1][RTW89_UK][38] = 127, -+ [0][1][2][1][RTW89_FCC][40] = 127, -+ [0][1][2][1][RTW89_ETSI][40] = 127, -+ [0][1][2][1][RTW89_MKK][40] = 127, -+ [0][1][2][1][RTW89_IC][40] = 127, -+ [0][1][2][1][RTW89_KCC][40] = 127, -+ [0][1][2][1][RTW89_ACMA][40] = 127, -+ [0][1][2][1][RTW89_CN][40] = 127, -+ [0][1][2][1][RTW89_UK][40] = 127, -+ [0][1][2][1][RTW89_FCC][42] = 127, -+ [0][1][2][1][RTW89_ETSI][42] = 127, -+ [0][1][2][1][RTW89_MKK][42] = 127, -+ [0][1][2][1][RTW89_IC][42] = 127, -+ [0][1][2][1][RTW89_KCC][42] = 127, -+ [0][1][2][1][RTW89_ACMA][42] = 127, -+ [0][1][2][1][RTW89_CN][42] = 127, -+ [0][1][2][1][RTW89_UK][42] = 127, -+ [0][1][2][1][RTW89_FCC][44] = 127, -+ [0][1][2][1][RTW89_ETSI][44] = 127, -+ [0][1][2][1][RTW89_MKK][44] = 127, -+ [0][1][2][1][RTW89_IC][44] = 127, -+ [0][1][2][1][RTW89_KCC][44] = 127, -+ [0][1][2][1][RTW89_ACMA][44] = 127, -+ [0][1][2][1][RTW89_CN][44] = 127, -+ [0][1][2][1][RTW89_UK][44] = 127, -+ [0][1][2][1][RTW89_FCC][46] = 127, -+ [0][1][2][1][RTW89_ETSI][46] = 127, -+ [0][1][2][1][RTW89_MKK][46] = 127, -+ [0][1][2][1][RTW89_IC][46] = 127, -+ [0][1][2][1][RTW89_KCC][46] = 127, -+ [0][1][2][1][RTW89_ACMA][46] = 127, -+ [0][1][2][1][RTW89_CN][46] = 127, -+ [0][1][2][1][RTW89_UK][46] = 127, -+ [0][1][2][1][RTW89_FCC][48] = 127, -+ [0][1][2][1][RTW89_ETSI][48] = 127, -+ [0][1][2][1][RTW89_MKK][48] = 127, -+ [0][1][2][1][RTW89_IC][48] = 127, -+ [0][1][2][1][RTW89_KCC][48] = 127, -+ [0][1][2][1][RTW89_ACMA][48] = 127, -+ [0][1][2][1][RTW89_CN][48] = 127, -+ [0][1][2][1][RTW89_UK][48] = 127, -+ [0][1][2][1][RTW89_FCC][50] = 127, -+ [0][1][2][1][RTW89_ETSI][50] = 127, -+ [0][1][2][1][RTW89_MKK][50] = 127, -+ [0][1][2][1][RTW89_IC][50] = 127, -+ [0][1][2][1][RTW89_KCC][50] = 127, -+ [0][1][2][1][RTW89_ACMA][50] = 127, -+ [0][1][2][1][RTW89_CN][50] = 127, -+ [0][1][2][1][RTW89_UK][50] = 127, -+ [0][1][2][1][RTW89_FCC][52] = 127, -+ [0][1][2][1][RTW89_ETSI][52] = 127, -+ [0][1][2][1][RTW89_MKK][52] = 127, -+ [0][1][2][1][RTW89_IC][52] = 127, -+ [0][1][2][1][RTW89_KCC][52] = 127, -+ [0][1][2][1][RTW89_ACMA][52] = 127, -+ [0][1][2][1][RTW89_CN][52] = 127, -+ [0][1][2][1][RTW89_UK][52] = 127, -+ [1][0][2][0][RTW89_FCC][1] = 66, -+ [1][0][2][0][RTW89_ETSI][1] = 64, -+ [1][0][2][0][RTW89_MKK][1] = 64, -+ [1][0][2][0][RTW89_IC][1] = 64, -+ [1][0][2][0][RTW89_KCC][1] = 74, -+ [1][0][2][0][RTW89_ACMA][1] = 64, -+ [1][0][2][0][RTW89_CN][1] = 64, -+ [1][0][2][0][RTW89_UK][1] = 64, -+ [1][0][2][0][RTW89_FCC][5] = 80, -+ [1][0][2][0][RTW89_ETSI][5] = 64, -+ [1][0][2][0][RTW89_MKK][5] = 62, -+ [1][0][2][0][RTW89_IC][5] = 64, -+ [1][0][2][0][RTW89_KCC][5] = 66, -+ [1][0][2][0][RTW89_ACMA][5] = 64, -+ [1][0][2][0][RTW89_CN][5] = 64, -+ [1][0][2][0][RTW89_UK][5] = 64, -+ [1][0][2][0][RTW89_FCC][9] = 80, -+ [1][0][2][0][RTW89_ETSI][9] = 64, -+ [1][0][2][0][RTW89_MKK][9] = 64, -+ [1][0][2][0][RTW89_IC][9] = 64, -+ [1][0][2][0][RTW89_KCC][9] = 76, -+ [1][0][2][0][RTW89_ACMA][9] = 64, -+ [1][0][2][0][RTW89_CN][9] = 64, -+ [1][0][2][0][RTW89_UK][9] = 64, -+ [1][0][2][0][RTW89_FCC][13] = 64, -+ [1][0][2][0][RTW89_ETSI][13] = 64, -+ [1][0][2][0][RTW89_MKK][13] = 64, -+ [1][0][2][0][RTW89_IC][13] = 64, -+ [1][0][2][0][RTW89_KCC][13] = 72, -+ [1][0][2][0][RTW89_ACMA][13] = 64, -+ [1][0][2][0][RTW89_CN][13] = 64, -+ [1][0][2][0][RTW89_UK][13] = 64, -+ [1][0][2][0][RTW89_FCC][16] = 66, -+ [1][0][2][0][RTW89_ETSI][16] = 66, -+ [1][0][2][0][RTW89_MKK][16] = 76, -+ [1][0][2][0][RTW89_IC][16] = 66, -+ [1][0][2][0][RTW89_KCC][16] = 74, -+ [1][0][2][0][RTW89_ACMA][16] = 66, -+ [1][0][2][0][RTW89_CN][16] = 127, -+ [1][0][2][0][RTW89_UK][16] = 66, -+ [1][0][2][0][RTW89_FCC][20] = 80, -+ [1][0][2][0][RTW89_ETSI][20] = 66, -+ [1][0][2][0][RTW89_MKK][20] = 76, -+ [1][0][2][0][RTW89_IC][20] = 80, -+ [1][0][2][0][RTW89_KCC][20] = 74, -+ [1][0][2][0][RTW89_ACMA][20] = 66, -+ [1][0][2][0][RTW89_CN][20] = 127, -+ [1][0][2][0][RTW89_UK][20] = 66, -+ [1][0][2][0][RTW89_FCC][24] = 80, -+ [1][0][2][0][RTW89_ETSI][24] = 66, -+ [1][0][2][0][RTW89_MKK][24] = 76, -+ [1][0][2][0][RTW89_IC][24] = 127, -+ [1][0][2][0][RTW89_KCC][24] = 74, -+ [1][0][2][0][RTW89_ACMA][24] = 127, -+ [1][0][2][0][RTW89_CN][24] = 127, -+ [1][0][2][0][RTW89_UK][24] = 66, -+ [1][0][2][0][RTW89_FCC][28] = 80, -+ [1][0][2][0][RTW89_ETSI][28] = 66, -+ [1][0][2][0][RTW89_MKK][28] = 76, -+ [1][0][2][0][RTW89_IC][28] = 127, -+ [1][0][2][0][RTW89_KCC][28] = 74, -+ [1][0][2][0][RTW89_ACMA][28] = 127, -+ [1][0][2][0][RTW89_CN][28] = 127, -+ [1][0][2][0][RTW89_UK][28] = 66, -+ [1][0][2][0][RTW89_FCC][32] = 74, -+ [1][0][2][0][RTW89_ETSI][32] = 66, -+ [1][0][2][0][RTW89_MKK][32] = 76, -+ [1][0][2][0][RTW89_IC][32] = 74, -+ [1][0][2][0][RTW89_KCC][32] = 76, -+ [1][0][2][0][RTW89_ACMA][32] = 66, -+ [1][0][2][0][RTW89_CN][32] = 127, -+ [1][0][2][0][RTW89_UK][32] = 66, -+ [1][0][2][0][RTW89_FCC][36] = 78, -+ [1][0][2][0][RTW89_ETSI][36] = 127, -+ [1][0][2][0][RTW89_MKK][36] = 76, -+ [1][0][2][0][RTW89_IC][36] = 78, -+ [1][0][2][0][RTW89_KCC][36] = 76, -+ [1][0][2][0][RTW89_ACMA][36] = 76, -+ [1][0][2][0][RTW89_CN][36] = 127, -+ [1][0][2][0][RTW89_UK][36] = 76, -+ [1][0][2][0][RTW89_FCC][39] = 80, -+ [1][0][2][0][RTW89_ETSI][39] = 30, -+ [1][0][2][0][RTW89_MKK][39] = 127, -+ [1][0][2][0][RTW89_IC][39] = 80, -+ [1][0][2][0][RTW89_KCC][39] = 68, -+ [1][0][2][0][RTW89_ACMA][39] = 76, -+ [1][0][2][0][RTW89_CN][39] = 70, -+ [1][0][2][0][RTW89_UK][39] = 64, -+ [1][0][2][0][RTW89_FCC][43] = 80, -+ [1][0][2][0][RTW89_ETSI][43] = 30, -+ [1][0][2][0][RTW89_MKK][43] = 127, -+ [1][0][2][0][RTW89_IC][43] = 80, -+ [1][0][2][0][RTW89_KCC][43] = 76, -+ [1][0][2][0][RTW89_ACMA][43] = 76, -+ [1][0][2][0][RTW89_CN][43] = 76, -+ [1][0][2][0][RTW89_UK][43] = 64, -+ [1][0][2][0][RTW89_FCC][47] = 80, -+ [1][0][2][0][RTW89_ETSI][47] = 127, -+ [1][0][2][0][RTW89_MKK][47] = 127, -+ [1][0][2][0][RTW89_IC][47] = 127, -+ [1][0][2][0][RTW89_KCC][47] = 127, -+ [1][0][2][0][RTW89_ACMA][47] = 127, -+ [1][0][2][0][RTW89_CN][47] = 127, -+ [1][0][2][0][RTW89_UK][47] = 127, -+ [1][0][2][0][RTW89_FCC][51] = 80, -+ [1][0][2][0][RTW89_ETSI][51] = 127, -+ [1][0][2][0][RTW89_MKK][51] = 127, -+ [1][0][2][0][RTW89_IC][51] = 127, -+ [1][0][2][0][RTW89_KCC][51] = 127, -+ [1][0][2][0][RTW89_ACMA][51] = 127, -+ [1][0][2][0][RTW89_CN][51] = 127, -+ [1][0][2][0][RTW89_UK][51] = 127, -+ [1][1][2][0][RTW89_FCC][1] = 127, -+ [1][1][2][0][RTW89_ETSI][1] = 127, -+ [1][1][2][0][RTW89_MKK][1] = 127, -+ [1][1][2][0][RTW89_IC][1] = 127, -+ [1][1][2][0][RTW89_KCC][1] = 127, -+ [1][1][2][0][RTW89_ACMA][1] = 127, -+ [1][1][2][0][RTW89_CN][1] = 127, -+ [1][1][2][0][RTW89_UK][1] = 127, -+ [1][1][2][0][RTW89_FCC][5] = 127, -+ [1][1][2][0][RTW89_ETSI][5] = 127, -+ [1][1][2][0][RTW89_MKK][5] = 127, -+ [1][1][2][0][RTW89_IC][5] = 127, -+ [1][1][2][0][RTW89_KCC][5] = 127, -+ [1][1][2][0][RTW89_ACMA][5] = 127, -+ [1][1][2][0][RTW89_CN][5] = 127, -+ [1][1][2][0][RTW89_UK][5] = 127, -+ [1][1][2][0][RTW89_FCC][9] = 127, -+ [1][1][2][0][RTW89_ETSI][9] = 127, -+ [1][1][2][0][RTW89_MKK][9] = 127, -+ [1][1][2][0][RTW89_IC][9] = 127, -+ [1][1][2][0][RTW89_KCC][9] = 127, -+ [1][1][2][0][RTW89_ACMA][9] = 127, -+ [1][1][2][0][RTW89_CN][9] = 127, -+ [1][1][2][0][RTW89_UK][9] = 127, -+ [1][1][2][0][RTW89_FCC][13] = 127, -+ [1][1][2][0][RTW89_ETSI][13] = 127, -+ [1][1][2][0][RTW89_MKK][13] = 127, -+ [1][1][2][0][RTW89_IC][13] = 127, -+ [1][1][2][0][RTW89_KCC][13] = 127, -+ [1][1][2][0][RTW89_ACMA][13] = 127, -+ [1][1][2][0][RTW89_CN][13] = 127, -+ [1][1][2][0][RTW89_UK][13] = 127, -+ [1][1][2][0][RTW89_FCC][16] = 127, -+ [1][1][2][0][RTW89_ETSI][16] = 127, -+ [1][1][2][0][RTW89_MKK][16] = 127, -+ [1][1][2][0][RTW89_IC][16] = 127, -+ [1][1][2][0][RTW89_KCC][16] = 127, -+ [1][1][2][0][RTW89_ACMA][16] = 127, -+ [1][1][2][0][RTW89_CN][16] = 127, -+ [1][1][2][0][RTW89_UK][16] = 127, -+ [1][1][2][0][RTW89_FCC][20] = 127, -+ [1][1][2][0][RTW89_ETSI][20] = 127, -+ [1][1][2][0][RTW89_MKK][20] = 127, -+ [1][1][2][0][RTW89_IC][20] = 127, -+ [1][1][2][0][RTW89_KCC][20] = 127, -+ [1][1][2][0][RTW89_ACMA][20] = 127, -+ [1][1][2][0][RTW89_CN][20] = 127, -+ [1][1][2][0][RTW89_UK][20] = 127, -+ [1][1][2][0][RTW89_FCC][24] = 127, -+ [1][1][2][0][RTW89_ETSI][24] = 127, -+ [1][1][2][0][RTW89_MKK][24] = 127, -+ [1][1][2][0][RTW89_IC][24] = 127, -+ [1][1][2][0][RTW89_KCC][24] = 127, -+ [1][1][2][0][RTW89_ACMA][24] = 127, -+ [1][1][2][0][RTW89_CN][24] = 127, -+ [1][1][2][0][RTW89_UK][24] = 127, -+ [1][1][2][0][RTW89_FCC][28] = 127, -+ [1][1][2][0][RTW89_ETSI][28] = 127, -+ [1][1][2][0][RTW89_MKK][28] = 127, -+ [1][1][2][0][RTW89_IC][28] = 127, -+ [1][1][2][0][RTW89_KCC][28] = 127, -+ [1][1][2][0][RTW89_ACMA][28] = 127, -+ [1][1][2][0][RTW89_CN][28] = 127, -+ [1][1][2][0][RTW89_UK][28] = 127, -+ [1][1][2][0][RTW89_FCC][32] = 127, -+ [1][1][2][0][RTW89_ETSI][32] = 127, -+ [1][1][2][0][RTW89_MKK][32] = 127, -+ [1][1][2][0][RTW89_IC][32] = 127, -+ [1][1][2][0][RTW89_KCC][32] = 127, -+ [1][1][2][0][RTW89_ACMA][32] = 127, -+ [1][1][2][0][RTW89_CN][32] = 127, -+ [1][1][2][0][RTW89_UK][32] = 127, -+ [1][1][2][0][RTW89_FCC][36] = 127, -+ [1][1][2][0][RTW89_ETSI][36] = 127, -+ [1][1][2][0][RTW89_MKK][36] = 127, -+ [1][1][2][0][RTW89_IC][36] = 127, -+ [1][1][2][0][RTW89_KCC][36] = 127, -+ [1][1][2][0][RTW89_ACMA][36] = 127, -+ [1][1][2][0][RTW89_CN][36] = 127, -+ [1][1][2][0][RTW89_UK][36] = 127, -+ [1][1][2][0][RTW89_FCC][39] = 127, -+ [1][1][2][0][RTW89_ETSI][39] = 127, -+ [1][1][2][0][RTW89_MKK][39] = 127, -+ [1][1][2][0][RTW89_IC][39] = 127, -+ [1][1][2][0][RTW89_KCC][39] = 127, -+ [1][1][2][0][RTW89_ACMA][39] = 127, -+ [1][1][2][0][RTW89_CN][39] = 127, -+ [1][1][2][0][RTW89_UK][39] = 127, -+ [1][1][2][0][RTW89_FCC][43] = 127, -+ [1][1][2][0][RTW89_ETSI][43] = 127, -+ [1][1][2][0][RTW89_MKK][43] = 127, -+ [1][1][2][0][RTW89_IC][43] = 127, -+ [1][1][2][0][RTW89_KCC][43] = 127, -+ [1][1][2][0][RTW89_ACMA][43] = 127, -+ [1][1][2][0][RTW89_CN][43] = 127, -+ [1][1][2][0][RTW89_UK][43] = 127, -+ [1][1][2][0][RTW89_FCC][47] = 127, -+ [1][1][2][0][RTW89_ETSI][47] = 127, -+ [1][1][2][0][RTW89_MKK][47] = 127, -+ [1][1][2][0][RTW89_IC][47] = 127, -+ [1][1][2][0][RTW89_KCC][47] = 127, -+ [1][1][2][0][RTW89_ACMA][47] = 127, -+ [1][1][2][0][RTW89_CN][47] = 127, -+ [1][1][2][0][RTW89_UK][47] = 127, -+ [1][1][2][0][RTW89_FCC][51] = 127, -+ [1][1][2][0][RTW89_ETSI][51] = 127, -+ [1][1][2][0][RTW89_MKK][51] = 127, -+ [1][1][2][0][RTW89_IC][51] = 127, -+ [1][1][2][0][RTW89_KCC][51] = 127, -+ [1][1][2][0][RTW89_ACMA][51] = 127, -+ [1][1][2][0][RTW89_CN][51] = 127, -+ [1][1][2][0][RTW89_UK][51] = 127, -+ [1][1][2][1][RTW89_FCC][1] = 127, -+ [1][1][2][1][RTW89_ETSI][1] = 127, -+ [1][1][2][1][RTW89_MKK][1] = 127, -+ [1][1][2][1][RTW89_IC][1] = 127, -+ [1][1][2][1][RTW89_KCC][1] = 127, -+ [1][1][2][1][RTW89_ACMA][1] = 127, -+ [1][1][2][1][RTW89_CN][1] = 127, -+ [1][1][2][1][RTW89_UK][1] = 127, -+ [1][1][2][1][RTW89_FCC][5] = 127, -+ [1][1][2][1][RTW89_ETSI][5] = 127, -+ [1][1][2][1][RTW89_MKK][5] = 127, -+ [1][1][2][1][RTW89_IC][5] = 127, -+ [1][1][2][1][RTW89_KCC][5] = 127, -+ [1][1][2][1][RTW89_ACMA][5] = 127, -+ [1][1][2][1][RTW89_CN][5] = 127, -+ [1][1][2][1][RTW89_UK][5] = 127, -+ [1][1][2][1][RTW89_FCC][9] = 127, -+ [1][1][2][1][RTW89_ETSI][9] = 127, -+ [1][1][2][1][RTW89_MKK][9] = 127, -+ [1][1][2][1][RTW89_IC][9] = 127, -+ [1][1][2][1][RTW89_KCC][9] = 127, -+ [1][1][2][1][RTW89_ACMA][9] = 127, -+ [1][1][2][1][RTW89_CN][9] = 127, -+ [1][1][2][1][RTW89_UK][9] = 127, -+ [1][1][2][1][RTW89_FCC][13] = 127, -+ [1][1][2][1][RTW89_ETSI][13] = 127, -+ [1][1][2][1][RTW89_MKK][13] = 127, -+ [1][1][2][1][RTW89_IC][13] = 127, -+ [1][1][2][1][RTW89_KCC][13] = 127, -+ [1][1][2][1][RTW89_ACMA][13] = 127, -+ [1][1][2][1][RTW89_CN][13] = 127, -+ [1][1][2][1][RTW89_UK][13] = 127, -+ [1][1][2][1][RTW89_FCC][16] = 127, -+ [1][1][2][1][RTW89_ETSI][16] = 127, -+ [1][1][2][1][RTW89_MKK][16] = 127, -+ [1][1][2][1][RTW89_IC][16] = 127, -+ [1][1][2][1][RTW89_KCC][16] = 127, -+ [1][1][2][1][RTW89_ACMA][16] = 127, -+ [1][1][2][1][RTW89_CN][16] = 127, -+ [1][1][2][1][RTW89_UK][16] = 127, -+ [1][1][2][1][RTW89_FCC][20] = 127, -+ [1][1][2][1][RTW89_ETSI][20] = 127, -+ [1][1][2][1][RTW89_MKK][20] = 127, -+ [1][1][2][1][RTW89_IC][20] = 127, -+ [1][1][2][1][RTW89_KCC][20] = 127, -+ [1][1][2][1][RTW89_ACMA][20] = 127, -+ [1][1][2][1][RTW89_CN][20] = 127, -+ [1][1][2][1][RTW89_UK][20] = 127, -+ [1][1][2][1][RTW89_FCC][24] = 127, -+ [1][1][2][1][RTW89_ETSI][24] = 127, -+ [1][1][2][1][RTW89_MKK][24] = 127, -+ [1][1][2][1][RTW89_IC][24] = 127, -+ [1][1][2][1][RTW89_KCC][24] = 127, -+ [1][1][2][1][RTW89_ACMA][24] = 127, -+ [1][1][2][1][RTW89_CN][24] = 127, -+ [1][1][2][1][RTW89_UK][24] = 127, -+ [1][1][2][1][RTW89_FCC][28] = 127, -+ [1][1][2][1][RTW89_ETSI][28] = 127, -+ [1][1][2][1][RTW89_MKK][28] = 127, -+ [1][1][2][1][RTW89_IC][28] = 127, -+ [1][1][2][1][RTW89_KCC][28] = 127, -+ [1][1][2][1][RTW89_ACMA][28] = 127, -+ [1][1][2][1][RTW89_CN][28] = 127, -+ [1][1][2][1][RTW89_UK][28] = 127, -+ [1][1][2][1][RTW89_FCC][32] = 127, -+ [1][1][2][1][RTW89_ETSI][32] = 127, -+ [1][1][2][1][RTW89_MKK][32] = 127, -+ [1][1][2][1][RTW89_IC][32] = 127, -+ [1][1][2][1][RTW89_KCC][32] = 127, -+ [1][1][2][1][RTW89_ACMA][32] = 127, -+ [1][1][2][1][RTW89_CN][32] = 127, -+ [1][1][2][1][RTW89_UK][32] = 127, -+ [1][1][2][1][RTW89_FCC][36] = 127, -+ [1][1][2][1][RTW89_ETSI][36] = 127, -+ [1][1][2][1][RTW89_MKK][36] = 127, -+ [1][1][2][1][RTW89_IC][36] = 127, -+ [1][1][2][1][RTW89_KCC][36] = 127, -+ [1][1][2][1][RTW89_ACMA][36] = 127, -+ [1][1][2][1][RTW89_CN][36] = 127, -+ [1][1][2][1][RTW89_UK][36] = 127, -+ [1][1][2][1][RTW89_FCC][39] = 127, -+ [1][1][2][1][RTW89_ETSI][39] = 127, -+ [1][1][2][1][RTW89_MKK][39] = 127, -+ [1][1][2][1][RTW89_IC][39] = 127, -+ [1][1][2][1][RTW89_KCC][39] = 127, -+ [1][1][2][1][RTW89_ACMA][39] = 127, -+ [1][1][2][1][RTW89_CN][39] = 127, -+ [1][1][2][1][RTW89_UK][39] = 127, -+ [1][1][2][1][RTW89_FCC][43] = 127, -+ [1][1][2][1][RTW89_ETSI][43] = 127, -+ [1][1][2][1][RTW89_MKK][43] = 127, -+ [1][1][2][1][RTW89_IC][43] = 127, -+ [1][1][2][1][RTW89_KCC][43] = 127, -+ [1][1][2][1][RTW89_ACMA][43] = 127, -+ [1][1][2][1][RTW89_CN][43] = 127, -+ [1][1][2][1][RTW89_UK][43] = 127, -+ [1][1][2][1][RTW89_FCC][47] = 127, -+ [1][1][2][1][RTW89_ETSI][47] = 127, -+ [1][1][2][1][RTW89_MKK][47] = 127, -+ [1][1][2][1][RTW89_IC][47] = 127, -+ [1][1][2][1][RTW89_KCC][47] = 127, -+ [1][1][2][1][RTW89_ACMA][47] = 127, -+ [1][1][2][1][RTW89_CN][47] = 127, -+ [1][1][2][1][RTW89_UK][47] = 127, -+ [1][1][2][1][RTW89_FCC][51] = 127, -+ [1][1][2][1][RTW89_ETSI][51] = 127, -+ [1][1][2][1][RTW89_MKK][51] = 127, -+ [1][1][2][1][RTW89_IC][51] = 127, -+ [1][1][2][1][RTW89_KCC][51] = 127, -+ [1][1][2][1][RTW89_ACMA][51] = 127, -+ [1][1][2][1][RTW89_CN][51] = 127, -+ [1][1][2][1][RTW89_UK][51] = 127, -+ [2][0][2][0][RTW89_FCC][3] = 72, -+ [2][0][2][0][RTW89_ETSI][3] = 64, -+ [2][0][2][0][RTW89_MKK][3] = 62, -+ [2][0][2][0][RTW89_IC][3] = 64, -+ [2][0][2][0][RTW89_KCC][3] = 68, -+ [2][0][2][0][RTW89_ACMA][3] = 64, -+ [2][0][2][0][RTW89_CN][3] = 64, -+ [2][0][2][0][RTW89_UK][3] = 64, -+ [2][0][2][0][RTW89_FCC][11] = 62, -+ [2][0][2][0][RTW89_ETSI][11] = 64, -+ [2][0][2][0][RTW89_MKK][11] = 64, -+ [2][0][2][0][RTW89_IC][11] = 62, -+ [2][0][2][0][RTW89_KCC][11] = 68, -+ [2][0][2][0][RTW89_ACMA][11] = 64, -+ [2][0][2][0][RTW89_CN][11] = 64, -+ [2][0][2][0][RTW89_UK][11] = 64, -+ [2][0][2][0][RTW89_FCC][18] = 66, -+ [2][0][2][0][RTW89_ETSI][18] = 64, -+ [2][0][2][0][RTW89_MKK][18] = 68, -+ [2][0][2][0][RTW89_IC][18] = 66, -+ [2][0][2][0][RTW89_KCC][18] = 68, -+ [2][0][2][0][RTW89_ACMA][18] = 64, -+ [2][0][2][0][RTW89_CN][18] = 127, -+ [2][0][2][0][RTW89_UK][18] = 64, -+ [2][0][2][0][RTW89_FCC][26] = 72, -+ [2][0][2][0][RTW89_ETSI][26] = 64, -+ [2][0][2][0][RTW89_MKK][26] = 68, -+ [2][0][2][0][RTW89_IC][26] = 127, -+ [2][0][2][0][RTW89_KCC][26] = 68, -+ [2][0][2][0][RTW89_ACMA][26] = 127, -+ [2][0][2][0][RTW89_CN][26] = 127, -+ [2][0][2][0][RTW89_UK][26] = 64, -+ [2][0][2][0][RTW89_FCC][34] = 72, -+ [2][0][2][0][RTW89_ETSI][34] = 127, -+ [2][0][2][0][RTW89_MKK][34] = 68, -+ [2][0][2][0][RTW89_IC][34] = 72, -+ [2][0][2][0][RTW89_KCC][34] = 68, -+ [2][0][2][0][RTW89_ACMA][34] = 68, -+ [2][0][2][0][RTW89_CN][34] = 127, -+ [2][0][2][0][RTW89_UK][34] = 68, -+ [2][0][2][0][RTW89_FCC][41] = 72, -+ [2][0][2][0][RTW89_ETSI][41] = 30, -+ [2][0][2][0][RTW89_MKK][41] = 127, -+ [2][0][2][0][RTW89_IC][41] = 72, -+ [2][0][2][0][RTW89_KCC][41] = 64, -+ [2][0][2][0][RTW89_ACMA][41] = 68, -+ [2][0][2][0][RTW89_CN][41] = 68, -+ [2][0][2][0][RTW89_UK][41] = 64, -+ [2][0][2][0][RTW89_FCC][49] = 72, -+ [2][0][2][0][RTW89_ETSI][49] = 127, -+ [2][0][2][0][RTW89_MKK][49] = 127, -+ [2][0][2][0][RTW89_IC][49] = 127, -+ [2][0][2][0][RTW89_KCC][49] = 127, -+ [2][0][2][0][RTW89_ACMA][49] = 127, -+ [2][0][2][0][RTW89_CN][49] = 127, -+ [2][0][2][0][RTW89_UK][49] = 127, -+ [2][1][2][0][RTW89_FCC][3] = 127, -+ [2][1][2][0][RTW89_ETSI][3] = 127, -+ [2][1][2][0][RTW89_MKK][3] = 127, -+ [2][1][2][0][RTW89_IC][3] = 127, -+ [2][1][2][0][RTW89_KCC][3] = 127, -+ [2][1][2][0][RTW89_ACMA][3] = 127, -+ [2][1][2][0][RTW89_CN][3] = 127, -+ [2][1][2][0][RTW89_UK][3] = 127, -+ [2][1][2][0][RTW89_FCC][11] = 127, -+ [2][1][2][0][RTW89_ETSI][11] = 127, -+ [2][1][2][0][RTW89_MKK][11] = 127, -+ [2][1][2][0][RTW89_IC][11] = 127, -+ [2][1][2][0][RTW89_KCC][11] = 127, -+ [2][1][2][0][RTW89_ACMA][11] = 127, -+ [2][1][2][0][RTW89_CN][11] = 127, -+ [2][1][2][0][RTW89_UK][11] = 127, -+ [2][1][2][0][RTW89_FCC][18] = 127, -+ [2][1][2][0][RTW89_ETSI][18] = 127, -+ [2][1][2][0][RTW89_MKK][18] = 127, -+ [2][1][2][0][RTW89_IC][18] = 127, -+ [2][1][2][0][RTW89_KCC][18] = 127, -+ [2][1][2][0][RTW89_ACMA][18] = 127, -+ [2][1][2][0][RTW89_CN][18] = 127, -+ [2][1][2][0][RTW89_UK][18] = 127, -+ [2][1][2][0][RTW89_FCC][26] = 127, -+ [2][1][2][0][RTW89_ETSI][26] = 127, -+ [2][1][2][0][RTW89_MKK][26] = 127, -+ [2][1][2][0][RTW89_IC][26] = 127, -+ [2][1][2][0][RTW89_KCC][26] = 127, -+ [2][1][2][0][RTW89_ACMA][26] = 127, -+ [2][1][2][0][RTW89_CN][26] = 127, -+ [2][1][2][0][RTW89_UK][26] = 127, -+ [2][1][2][0][RTW89_FCC][34] = 127, -+ [2][1][2][0][RTW89_ETSI][34] = 127, -+ [2][1][2][0][RTW89_MKK][34] = 127, -+ [2][1][2][0][RTW89_IC][34] = 127, -+ [2][1][2][0][RTW89_KCC][34] = 127, -+ [2][1][2][0][RTW89_ACMA][34] = 127, -+ [2][1][2][0][RTW89_CN][34] = 127, -+ [2][1][2][0][RTW89_UK][34] = 127, -+ [2][1][2][0][RTW89_FCC][41] = 127, -+ [2][1][2][0][RTW89_ETSI][41] = 127, -+ [2][1][2][0][RTW89_MKK][41] = 127, -+ [2][1][2][0][RTW89_IC][41] = 127, -+ [2][1][2][0][RTW89_KCC][41] = 127, -+ [2][1][2][0][RTW89_ACMA][41] = 127, -+ [2][1][2][0][RTW89_CN][41] = 127, -+ [2][1][2][0][RTW89_UK][41] = 127, -+ [2][1][2][0][RTW89_FCC][49] = 127, -+ [2][1][2][0][RTW89_ETSI][49] = 127, -+ [2][1][2][0][RTW89_MKK][49] = 127, -+ [2][1][2][0][RTW89_IC][49] = 127, -+ [2][1][2][0][RTW89_KCC][49] = 127, -+ [2][1][2][0][RTW89_ACMA][49] = 127, -+ [2][1][2][0][RTW89_CN][49] = 127, -+ [2][1][2][0][RTW89_UK][49] = 127, -+ [2][1][2][1][RTW89_FCC][3] = 127, -+ [2][1][2][1][RTW89_ETSI][3] = 127, -+ [2][1][2][1][RTW89_MKK][3] = 127, -+ [2][1][2][1][RTW89_IC][3] = 127, -+ [2][1][2][1][RTW89_KCC][3] = 127, -+ [2][1][2][1][RTW89_ACMA][3] = 127, -+ [2][1][2][1][RTW89_CN][3] = 127, -+ [2][1][2][1][RTW89_UK][3] = 127, -+ [2][1][2][1][RTW89_FCC][11] = 127, -+ [2][1][2][1][RTW89_ETSI][11] = 127, -+ [2][1][2][1][RTW89_MKK][11] = 127, -+ [2][1][2][1][RTW89_IC][11] = 127, -+ [2][1][2][1][RTW89_KCC][11] = 127, -+ [2][1][2][1][RTW89_ACMA][11] = 127, -+ [2][1][2][1][RTW89_CN][11] = 127, -+ [2][1][2][1][RTW89_UK][11] = 127, -+ [2][1][2][1][RTW89_FCC][18] = 127, -+ [2][1][2][1][RTW89_ETSI][18] = 127, -+ [2][1][2][1][RTW89_MKK][18] = 127, -+ [2][1][2][1][RTW89_IC][18] = 127, -+ [2][1][2][1][RTW89_KCC][18] = 127, -+ [2][1][2][1][RTW89_ACMA][18] = 127, -+ [2][1][2][1][RTW89_CN][18] = 127, -+ [2][1][2][1][RTW89_UK][18] = 127, -+ [2][1][2][1][RTW89_FCC][26] = 127, -+ [2][1][2][1][RTW89_ETSI][26] = 127, -+ [2][1][2][1][RTW89_MKK][26] = 127, -+ [2][1][2][1][RTW89_IC][26] = 127, -+ [2][1][2][1][RTW89_KCC][26] = 127, -+ [2][1][2][1][RTW89_ACMA][26] = 127, -+ [2][1][2][1][RTW89_CN][26] = 127, -+ [2][1][2][1][RTW89_UK][26] = 127, -+ [2][1][2][1][RTW89_FCC][34] = 127, -+ [2][1][2][1][RTW89_ETSI][34] = 127, -+ [2][1][2][1][RTW89_MKK][34] = 127, -+ [2][1][2][1][RTW89_IC][34] = 127, -+ [2][1][2][1][RTW89_KCC][34] = 127, -+ [2][1][2][1][RTW89_ACMA][34] = 127, -+ [2][1][2][1][RTW89_CN][34] = 127, -+ [2][1][2][1][RTW89_UK][34] = 127, -+ [2][1][2][1][RTW89_FCC][41] = 127, -+ [2][1][2][1][RTW89_ETSI][41] = 127, -+ [2][1][2][1][RTW89_MKK][41] = 127, -+ [2][1][2][1][RTW89_IC][41] = 127, -+ [2][1][2][1][RTW89_KCC][41] = 127, -+ [2][1][2][1][RTW89_ACMA][41] = 127, -+ [2][1][2][1][RTW89_CN][41] = 127, -+ [2][1][2][1][RTW89_UK][41] = 127, -+ [2][1][2][1][RTW89_FCC][49] = 127, -+ [2][1][2][1][RTW89_ETSI][49] = 127, -+ [2][1][2][1][RTW89_MKK][49] = 127, -+ [2][1][2][1][RTW89_IC][49] = 127, -+ [2][1][2][1][RTW89_KCC][49] = 127, -+ [2][1][2][1][RTW89_ACMA][49] = 127, -+ [2][1][2][1][RTW89_CN][49] = 127, -+ [2][1][2][1][RTW89_UK][49] = 127, -+ [3][0][2][0][RTW89_FCC][7] = 127, -+ [3][0][2][0][RTW89_ETSI][7] = 127, -+ [3][0][2][0][RTW89_MKK][7] = 127, -+ [3][0][2][0][RTW89_IC][7] = 127, -+ [3][0][2][0][RTW89_KCC][7] = 127, -+ [3][0][2][0][RTW89_ACMA][7] = 127, -+ [3][0][2][0][RTW89_CN][7] = 58, -+ [3][0][2][0][RTW89_UK][7] = 127, -+ [3][0][2][0][RTW89_FCC][22] = 127, -+ [3][0][2][0][RTW89_ETSI][22] = 127, -+ [3][0][2][0][RTW89_MKK][22] = 127, -+ [3][0][2][0][RTW89_IC][22] = 127, -+ [3][0][2][0][RTW89_KCC][22] = 127, -+ [3][0][2][0][RTW89_ACMA][22] = 127, -+ [3][0][2][0][RTW89_CN][22] = 58, -+ [3][0][2][0][RTW89_UK][22] = 127, -+ [3][0][2][0][RTW89_FCC][45] = 127, -+ [3][0][2][0][RTW89_ETSI][45] = 127, -+ [3][0][2][0][RTW89_MKK][45] = 127, -+ [3][0][2][0][RTW89_IC][45] = 127, -+ [3][0][2][0][RTW89_KCC][45] = 127, -+ [3][0][2][0][RTW89_ACMA][45] = 127, -+ [3][0][2][0][RTW89_CN][45] = 127, -+ [3][0][2][0][RTW89_UK][45] = 127, -+ [3][1][2][0][RTW89_FCC][7] = 127, -+ [3][1][2][0][RTW89_ETSI][7] = 127, -+ [3][1][2][0][RTW89_MKK][7] = 127, -+ [3][1][2][0][RTW89_IC][7] = 127, -+ [3][1][2][0][RTW89_KCC][7] = 127, -+ [3][1][2][0][RTW89_ACMA][7] = 127, -+ [3][1][2][0][RTW89_CN][7] = 127, -+ [3][1][2][0][RTW89_UK][7] = 127, -+ [3][1][2][0][RTW89_FCC][22] = 127, -+ [3][1][2][0][RTW89_ETSI][22] = 127, -+ [3][1][2][0][RTW89_MKK][22] = 127, -+ [3][1][2][0][RTW89_IC][22] = 127, -+ [3][1][2][0][RTW89_KCC][22] = 127, -+ [3][1][2][0][RTW89_ACMA][22] = 127, -+ [3][1][2][0][RTW89_CN][22] = 127, -+ [3][1][2][0][RTW89_UK][22] = 127, -+ [3][1][2][0][RTW89_FCC][45] = 127, -+ [3][1][2][0][RTW89_ETSI][45] = 127, -+ [3][1][2][0][RTW89_MKK][45] = 127, -+ [3][1][2][0][RTW89_IC][45] = 127, -+ [3][1][2][0][RTW89_KCC][45] = 127, -+ [3][1][2][0][RTW89_ACMA][45] = 127, -+ [3][1][2][0][RTW89_CN][45] = 127, -+ [3][1][2][0][RTW89_UK][45] = 127, -+ [3][1][2][1][RTW89_FCC][7] = 127, -+ [3][1][2][1][RTW89_ETSI][7] = 127, -+ [3][1][2][1][RTW89_MKK][7] = 127, -+ [3][1][2][1][RTW89_IC][7] = 127, -+ [3][1][2][1][RTW89_KCC][7] = 127, -+ [3][1][2][1][RTW89_ACMA][7] = 127, -+ [3][1][2][1][RTW89_CN][7] = 127, -+ [3][1][2][1][RTW89_UK][7] = 127, -+ [3][1][2][1][RTW89_FCC][22] = 127, -+ [3][1][2][1][RTW89_ETSI][22] = 127, -+ [3][1][2][1][RTW89_MKK][22] = 127, -+ [3][1][2][1][RTW89_IC][22] = 127, -+ [3][1][2][1][RTW89_KCC][22] = 127, -+ [3][1][2][1][RTW89_ACMA][22] = 127, -+ [3][1][2][1][RTW89_CN][22] = 127, -+ [3][1][2][1][RTW89_UK][22] = 127, -+ [3][1][2][1][RTW89_FCC][45] = 127, -+ [3][1][2][1][RTW89_ETSI][45] = 127, -+ [3][1][2][1][RTW89_MKK][45] = 127, -+ [3][1][2][1][RTW89_IC][45] = 127, -+ [3][1][2][1][RTW89_KCC][45] = 127, -+ [3][1][2][1][RTW89_ACMA][45] = 127, -+ [3][1][2][1][RTW89_CN][45] = 127, -+ [3][1][2][1][RTW89_UK][45] = 127, -+}; -+ -+static -+const s8 rtw89_8851b_txpwr_lmt_ru_2g_type2[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_2G_CH_NUM] = { -+ [0][0][RTW89_WW][0] = 30, -+ [0][0][RTW89_WW][1] = 30, -+ [0][0][RTW89_WW][2] = 30, -+ [0][0][RTW89_WW][3] = 30, -+ [0][0][RTW89_WW][4] = 30, -+ [0][0][RTW89_WW][5] = 30, -+ [0][0][RTW89_WW][6] = 30, -+ [0][0][RTW89_WW][7] = 30, -+ [0][0][RTW89_WW][8] = 30, -+ [0][0][RTW89_WW][9] = 30, -+ [0][0][RTW89_WW][10] = 30, -+ [0][0][RTW89_WW][11] = 30, -+ [0][0][RTW89_WW][12] = 30, -+ [0][0][RTW89_WW][13] = 0, -+ [0][1][RTW89_WW][0] = 20, -+ [0][1][RTW89_WW][1] = 22, -+ [0][1][RTW89_WW][2] = 22, -+ [0][1][RTW89_WW][3] = 22, -+ [0][1][RTW89_WW][4] = 22, -+ [0][1][RTW89_WW][5] = 22, -+ [0][1][RTW89_WW][6] = 22, -+ [0][1][RTW89_WW][7] = 22, -+ [0][1][RTW89_WW][8] = 22, -+ [0][1][RTW89_WW][9] = 22, -+ [0][1][RTW89_WW][10] = 22, -+ [0][1][RTW89_WW][11] = 22, -+ [0][1][RTW89_WW][12] = 20, -+ [0][1][RTW89_WW][13] = 0, -+ [1][0][RTW89_WW][0] = 42, -+ [1][0][RTW89_WW][1] = 42, -+ [1][0][RTW89_WW][2] = 42, -+ [1][0][RTW89_WW][3] = 42, -+ [1][0][RTW89_WW][4] = 42, -+ [1][0][RTW89_WW][5] = 42, -+ [1][0][RTW89_WW][6] = 42, -+ [1][0][RTW89_WW][7] = 42, -+ [1][0][RTW89_WW][8] = 42, -+ [1][0][RTW89_WW][9] = 42, -+ [1][0][RTW89_WW][10] = 42, -+ [1][0][RTW89_WW][11] = 42, -+ [1][0][RTW89_WW][12] = 34, -+ [1][0][RTW89_WW][13] = 0, -+ [1][1][RTW89_WW][0] = 32, -+ [1][1][RTW89_WW][1] = 32, -+ [1][1][RTW89_WW][2] = 32, -+ [1][1][RTW89_WW][3] = 32, -+ [1][1][RTW89_WW][4] = 32, -+ [1][1][RTW89_WW][5] = 32, -+ [1][1][RTW89_WW][6] = 32, -+ [1][1][RTW89_WW][7] = 32, -+ [1][1][RTW89_WW][8] = 32, -+ [1][1][RTW89_WW][9] = 32, -+ [1][1][RTW89_WW][10] = 32, -+ [1][1][RTW89_WW][11] = 32, -+ [1][1][RTW89_WW][12] = 32, -+ [1][1][RTW89_WW][13] = 0, -+ [2][0][RTW89_WW][0] = 54, -+ [2][0][RTW89_WW][1] = 54, -+ [2][0][RTW89_WW][2] = 54, -+ [2][0][RTW89_WW][3] = 54, -+ [2][0][RTW89_WW][4] = 54, -+ [2][0][RTW89_WW][5] = 54, -+ [2][0][RTW89_WW][6] = 54, -+ [2][0][RTW89_WW][7] = 54, -+ [2][0][RTW89_WW][8] = 54, -+ [2][0][RTW89_WW][9] = 54, -+ [2][0][RTW89_WW][10] = 54, -+ [2][0][RTW89_WW][11] = 54, -+ [2][0][RTW89_WW][12] = 34, -+ [2][0][RTW89_WW][13] = 0, -+ [2][1][RTW89_WW][0] = 44, -+ [2][1][RTW89_WW][1] = 44, -+ [2][1][RTW89_WW][2] = 44, -+ [2][1][RTW89_WW][3] = 44, -+ [2][1][RTW89_WW][4] = 44, -+ [2][1][RTW89_WW][5] = 44, -+ [2][1][RTW89_WW][6] = 44, -+ [2][1][RTW89_WW][7] = 44, -+ [2][1][RTW89_WW][8] = 44, -+ [2][1][RTW89_WW][9] = 44, -+ [2][1][RTW89_WW][10] = 44, -+ [2][1][RTW89_WW][11] = 44, -+ [2][1][RTW89_WW][12] = 42, -+ [2][1][RTW89_WW][13] = 0, -+ [0][0][RTW89_FCC][0] = 60, -+ [0][0][RTW89_ETSI][0] = 30, -+ [0][0][RTW89_MKK][0] = 40, -+ [0][0][RTW89_IC][0] = 60, -+ [0][0][RTW89_KCC][0] = 46, -+ [0][0][RTW89_ACMA][0] = 30, -+ [0][0][RTW89_CN][0] = 32, -+ [0][0][RTW89_UK][0] = 30, -+ [0][0][RTW89_FCC][1] = 60, -+ [0][0][RTW89_ETSI][1] = 30, -+ [0][0][RTW89_MKK][1] = 44, -+ [0][0][RTW89_IC][1] = 60, -+ [0][0][RTW89_KCC][1] = 46, -+ [0][0][RTW89_ACMA][1] = 30, -+ [0][0][RTW89_CN][1] = 32, -+ [0][0][RTW89_UK][1] = 30, -+ [0][0][RTW89_FCC][2] = 64, -+ [0][0][RTW89_ETSI][2] = 30, -+ [0][0][RTW89_MKK][2] = 44, -+ [0][0][RTW89_IC][2] = 64, -+ [0][0][RTW89_KCC][2] = 46, -+ [0][0][RTW89_ACMA][2] = 30, -+ [0][0][RTW89_CN][2] = 32, -+ [0][0][RTW89_UK][2] = 30, -+ [0][0][RTW89_FCC][3] = 68, -+ [0][0][RTW89_ETSI][3] = 30, -+ [0][0][RTW89_MKK][3] = 44, -+ [0][0][RTW89_IC][3] = 68, -+ [0][0][RTW89_KCC][3] = 46, -+ [0][0][RTW89_ACMA][3] = 30, -+ [0][0][RTW89_CN][3] = 32, -+ [0][0][RTW89_UK][3] = 30, -+ [0][0][RTW89_FCC][4] = 68, -+ [0][0][RTW89_ETSI][4] = 30, -+ [0][0][RTW89_MKK][4] = 44, -+ [0][0][RTW89_IC][4] = 68, -+ [0][0][RTW89_KCC][4] = 48, -+ [0][0][RTW89_ACMA][4] = 30, -+ [0][0][RTW89_CN][4] = 32, -+ [0][0][RTW89_UK][4] = 30, -+ [0][0][RTW89_FCC][5] = 82, -+ [0][0][RTW89_ETSI][5] = 30, -+ [0][0][RTW89_MKK][5] = 44, -+ [0][0][RTW89_IC][5] = 82, -+ [0][0][RTW89_KCC][5] = 48, -+ [0][0][RTW89_ACMA][5] = 30, -+ [0][0][RTW89_CN][5] = 32, -+ [0][0][RTW89_UK][5] = 30, -+ [0][0][RTW89_FCC][6] = 64, -+ [0][0][RTW89_ETSI][6] = 30, -+ [0][0][RTW89_MKK][6] = 44, -+ [0][0][RTW89_IC][6] = 64, -+ [0][0][RTW89_KCC][6] = 48, -+ [0][0][RTW89_ACMA][6] = 30, -+ [0][0][RTW89_CN][6] = 32, -+ [0][0][RTW89_UK][6] = 30, -+ [0][0][RTW89_FCC][7] = 64, -+ [0][0][RTW89_ETSI][7] = 30, -+ [0][0][RTW89_MKK][7] = 44, -+ [0][0][RTW89_IC][7] = 64, -+ [0][0][RTW89_KCC][7] = 48, -+ [0][0][RTW89_ACMA][7] = 30, -+ [0][0][RTW89_CN][7] = 32, -+ [0][0][RTW89_UK][7] = 30, -+ [0][0][RTW89_FCC][8] = 60, -+ [0][0][RTW89_ETSI][8] = 30, -+ [0][0][RTW89_MKK][8] = 44, -+ [0][0][RTW89_IC][8] = 60, -+ [0][0][RTW89_KCC][8] = 48, -+ [0][0][RTW89_ACMA][8] = 30, -+ [0][0][RTW89_CN][8] = 32, -+ [0][0][RTW89_UK][8] = 30, -+ [0][0][RTW89_FCC][9] = 56, -+ [0][0][RTW89_ETSI][9] = 30, -+ [0][0][RTW89_MKK][9] = 44, -+ [0][0][RTW89_IC][9] = 56, -+ [0][0][RTW89_KCC][9] = 44, -+ [0][0][RTW89_ACMA][9] = 30, -+ [0][0][RTW89_CN][9] = 32, -+ [0][0][RTW89_UK][9] = 30, -+ [0][0][RTW89_FCC][10] = 56, -+ [0][0][RTW89_ETSI][10] = 30, -+ [0][0][RTW89_MKK][10] = 44, -+ [0][0][RTW89_IC][10] = 56, -+ [0][0][RTW89_KCC][10] = 44, -+ [0][0][RTW89_ACMA][10] = 30, -+ [0][0][RTW89_CN][10] = 32, -+ [0][0][RTW89_UK][10] = 30, -+ [0][0][RTW89_FCC][11] = 54, -+ [0][0][RTW89_ETSI][11] = 30, -+ [0][0][RTW89_MKK][11] = 44, -+ [0][0][RTW89_IC][11] = 54, -+ [0][0][RTW89_KCC][11] = 44, -+ [0][0][RTW89_ACMA][11] = 30, -+ [0][0][RTW89_CN][11] = 32, -+ [0][0][RTW89_UK][11] = 30, -+ [0][0][RTW89_FCC][12] = 34, -+ [0][0][RTW89_ETSI][12] = 30, -+ [0][0][RTW89_MKK][12] = 40, -+ [0][0][RTW89_IC][12] = 34, -+ [0][0][RTW89_KCC][12] = 44, -+ [0][0][RTW89_ACMA][12] = 30, -+ [0][0][RTW89_CN][12] = 32, -+ [0][0][RTW89_UK][12] = 30, -+ [0][0][RTW89_FCC][13] = 127, -+ [0][0][RTW89_ETSI][13] = 127, -+ [0][0][RTW89_MKK][13] = 127, -+ [0][0][RTW89_IC][13] = 127, -+ [0][0][RTW89_KCC][13] = 127, -+ [0][0][RTW89_ACMA][13] = 127, -+ [0][0][RTW89_CN][13] = 127, -+ [0][0][RTW89_UK][13] = 127, -+ [0][1][RTW89_FCC][0] = 127, -+ [0][1][RTW89_ETSI][0] = 127, -+ [0][1][RTW89_MKK][0] = 127, -+ [0][1][RTW89_IC][0] = 127, -+ [0][1][RTW89_KCC][0] = 127, -+ [0][1][RTW89_ACMA][0] = 127, -+ [0][1][RTW89_CN][0] = 20, -+ [0][1][RTW89_UK][0] = 127, -+ [0][1][RTW89_FCC][1] = 127, -+ [0][1][RTW89_ETSI][1] = 127, -+ [0][1][RTW89_MKK][1] = 127, -+ [0][1][RTW89_IC][1] = 127, -+ [0][1][RTW89_KCC][1] = 127, -+ [0][1][RTW89_ACMA][1] = 127, -+ [0][1][RTW89_CN][1] = 22, -+ [0][1][RTW89_UK][1] = 127, -+ [0][1][RTW89_FCC][2] = 127, -+ [0][1][RTW89_ETSI][2] = 127, -+ [0][1][RTW89_MKK][2] = 127, -+ [0][1][RTW89_IC][2] = 127, -+ [0][1][RTW89_KCC][2] = 127, -+ [0][1][RTW89_ACMA][2] = 127, -+ [0][1][RTW89_CN][2] = 22, -+ [0][1][RTW89_UK][2] = 127, -+ [0][1][RTW89_FCC][3] = 127, -+ [0][1][RTW89_ETSI][3] = 127, -+ [0][1][RTW89_MKK][3] = 127, -+ [0][1][RTW89_IC][3] = 127, -+ [0][1][RTW89_KCC][3] = 127, -+ [0][1][RTW89_ACMA][3] = 127, -+ [0][1][RTW89_CN][3] = 22, -+ [0][1][RTW89_UK][3] = 127, -+ [0][1][RTW89_FCC][4] = 127, -+ [0][1][RTW89_ETSI][4] = 127, -+ [0][1][RTW89_MKK][4] = 127, -+ [0][1][RTW89_IC][4] = 127, -+ [0][1][RTW89_KCC][4] = 127, -+ [0][1][RTW89_ACMA][4] = 127, -+ [0][1][RTW89_CN][4] = 22, -+ [0][1][RTW89_UK][4] = 127, -+ [0][1][RTW89_FCC][5] = 127, -+ [0][1][RTW89_ETSI][5] = 127, -+ [0][1][RTW89_MKK][5] = 127, -+ [0][1][RTW89_IC][5] = 127, -+ [0][1][RTW89_KCC][5] = 127, -+ [0][1][RTW89_ACMA][5] = 127, -+ [0][1][RTW89_CN][5] = 22, -+ [0][1][RTW89_UK][5] = 127, -+ [0][1][RTW89_FCC][6] = 127, -+ [0][1][RTW89_ETSI][6] = 127, -+ [0][1][RTW89_MKK][6] = 127, -+ [0][1][RTW89_IC][6] = 127, -+ [0][1][RTW89_KCC][6] = 127, -+ [0][1][RTW89_ACMA][6] = 127, -+ [0][1][RTW89_CN][6] = 22, -+ [0][1][RTW89_UK][6] = 127, -+ [0][1][RTW89_FCC][7] = 127, -+ [0][1][RTW89_ETSI][7] = 127, -+ [0][1][RTW89_MKK][7] = 127, -+ [0][1][RTW89_IC][7] = 127, -+ [0][1][RTW89_KCC][7] = 127, -+ [0][1][RTW89_ACMA][7] = 127, -+ [0][1][RTW89_CN][7] = 22, -+ [0][1][RTW89_UK][7] = 127, -+ [0][1][RTW89_FCC][8] = 127, -+ [0][1][RTW89_ETSI][8] = 127, -+ [0][1][RTW89_MKK][8] = 127, -+ [0][1][RTW89_IC][8] = 127, -+ [0][1][RTW89_KCC][8] = 127, -+ [0][1][RTW89_ACMA][8] = 127, -+ [0][1][RTW89_CN][8] = 22, -+ [0][1][RTW89_UK][8] = 127, -+ [0][1][RTW89_FCC][9] = 127, -+ [0][1][RTW89_ETSI][9] = 127, -+ [0][1][RTW89_MKK][9] = 127, -+ [0][1][RTW89_IC][9] = 127, -+ [0][1][RTW89_KCC][9] = 127, -+ [0][1][RTW89_ACMA][9] = 127, -+ [0][1][RTW89_CN][9] = 22, -+ [0][1][RTW89_UK][9] = 127, -+ [0][1][RTW89_FCC][10] = 127, -+ [0][1][RTW89_ETSI][10] = 127, -+ [0][1][RTW89_MKK][10] = 127, -+ [0][1][RTW89_IC][10] = 127, -+ [0][1][RTW89_KCC][10] = 127, -+ [0][1][RTW89_ACMA][10] = 127, -+ [0][1][RTW89_CN][10] = 22, -+ [0][1][RTW89_UK][10] = 127, -+ [0][1][RTW89_FCC][11] = 127, -+ [0][1][RTW89_ETSI][11] = 127, -+ [0][1][RTW89_MKK][11] = 127, -+ [0][1][RTW89_IC][11] = 127, -+ [0][1][RTW89_KCC][11] = 127, -+ [0][1][RTW89_ACMA][11] = 127, -+ [0][1][RTW89_CN][11] = 22, -+ [0][1][RTW89_UK][11] = 127, -+ [0][1][RTW89_FCC][12] = 127, -+ [0][1][RTW89_ETSI][12] = 127, -+ [0][1][RTW89_MKK][12] = 127, -+ [0][1][RTW89_IC][12] = 127, -+ [0][1][RTW89_KCC][12] = 127, -+ [0][1][RTW89_ACMA][12] = 127, -+ [0][1][RTW89_CN][12] = 20, -+ [0][1][RTW89_UK][12] = 127, -+ [0][1][RTW89_FCC][13] = 127, -+ [0][1][RTW89_ETSI][13] = 127, -+ [0][1][RTW89_MKK][13] = 127, -+ [0][1][RTW89_IC][13] = 127, -+ [0][1][RTW89_KCC][13] = 127, -+ [0][1][RTW89_ACMA][13] = 127, -+ [0][1][RTW89_CN][13] = 127, -+ [0][1][RTW89_UK][13] = 127, -+ [1][0][RTW89_FCC][0] = 70, -+ [1][0][RTW89_ETSI][0] = 42, -+ [1][0][RTW89_MKK][0] = 52, -+ [1][0][RTW89_IC][0] = 70, -+ [1][0][RTW89_KCC][0] = 56, -+ [1][0][RTW89_ACMA][0] = 42, -+ [1][0][RTW89_CN][0] = 42, -+ [1][0][RTW89_UK][0] = 42, -+ [1][0][RTW89_FCC][1] = 70, -+ [1][0][RTW89_ETSI][1] = 42, -+ [1][0][RTW89_MKK][1] = 52, -+ [1][0][RTW89_IC][1] = 70, -+ [1][0][RTW89_KCC][1] = 56, -+ [1][0][RTW89_ACMA][1] = 42, -+ [1][0][RTW89_CN][1] = 44, -+ [1][0][RTW89_UK][1] = 42, -+ [1][0][RTW89_FCC][2] = 74, -+ [1][0][RTW89_ETSI][2] = 42, -+ [1][0][RTW89_MKK][2] = 52, -+ [1][0][RTW89_IC][2] = 74, -+ [1][0][RTW89_KCC][2] = 56, -+ [1][0][RTW89_ACMA][2] = 42, -+ [1][0][RTW89_CN][2] = 44, -+ [1][0][RTW89_UK][2] = 42, -+ [1][0][RTW89_FCC][3] = 76, -+ [1][0][RTW89_ETSI][3] = 42, -+ [1][0][RTW89_MKK][3] = 52, -+ [1][0][RTW89_IC][3] = 76, -+ [1][0][RTW89_KCC][3] = 56, -+ [1][0][RTW89_ACMA][3] = 42, -+ [1][0][RTW89_CN][3] = 44, -+ [1][0][RTW89_UK][3] = 42, -+ [1][0][RTW89_FCC][4] = 76, -+ [1][0][RTW89_ETSI][4] = 42, -+ [1][0][RTW89_MKK][4] = 52, -+ [1][0][RTW89_IC][4] = 76, -+ [1][0][RTW89_KCC][4] = 56, -+ [1][0][RTW89_ACMA][4] = 42, -+ [1][0][RTW89_CN][4] = 44, -+ [1][0][RTW89_UK][4] = 42, -+ [1][0][RTW89_FCC][5] = 82, -+ [1][0][RTW89_ETSI][5] = 42, -+ [1][0][RTW89_MKK][5] = 52, -+ [1][0][RTW89_IC][5] = 82, -+ [1][0][RTW89_KCC][5] = 56, -+ [1][0][RTW89_ACMA][5] = 42, -+ [1][0][RTW89_CN][5] = 44, -+ [1][0][RTW89_UK][5] = 42, -+ [1][0][RTW89_FCC][6] = 72, -+ [1][0][RTW89_ETSI][6] = 42, -+ [1][0][RTW89_MKK][6] = 52, -+ [1][0][RTW89_IC][6] = 72, -+ [1][0][RTW89_KCC][6] = 56, -+ [1][0][RTW89_ACMA][6] = 42, -+ [1][0][RTW89_CN][6] = 44, -+ [1][0][RTW89_UK][6] = 42, -+ [1][0][RTW89_FCC][7] = 72, -+ [1][0][RTW89_ETSI][7] = 42, -+ [1][0][RTW89_MKK][7] = 52, -+ [1][0][RTW89_IC][7] = 72, -+ [1][0][RTW89_KCC][7] = 56, -+ [1][0][RTW89_ACMA][7] = 42, -+ [1][0][RTW89_CN][7] = 44, -+ [1][0][RTW89_UK][7] = 42, -+ [1][0][RTW89_FCC][8] = 72, -+ [1][0][RTW89_ETSI][8] = 42, -+ [1][0][RTW89_MKK][8] = 52, -+ [1][0][RTW89_IC][8] = 72, -+ [1][0][RTW89_KCC][8] = 56, -+ [1][0][RTW89_ACMA][8] = 42, -+ [1][0][RTW89_CN][8] = 44, -+ [1][0][RTW89_UK][8] = 42, -+ [1][0][RTW89_FCC][9] = 68, -+ [1][0][RTW89_ETSI][9] = 42, -+ [1][0][RTW89_MKK][9] = 52, -+ [1][0][RTW89_IC][9] = 68, -+ [1][0][RTW89_KCC][9] = 58, -+ [1][0][RTW89_ACMA][9] = 42, -+ [1][0][RTW89_CN][9] = 44, -+ [1][0][RTW89_UK][9] = 42, -+ [1][0][RTW89_FCC][10] = 68, -+ [1][0][RTW89_ETSI][10] = 42, -+ [1][0][RTW89_MKK][10] = 52, -+ [1][0][RTW89_IC][10] = 68, -+ [1][0][RTW89_KCC][10] = 58, -+ [1][0][RTW89_ACMA][10] = 42, -+ [1][0][RTW89_CN][10] = 44, -+ [1][0][RTW89_UK][10] = 42, -+ [1][0][RTW89_FCC][11] = 66, -+ [1][0][RTW89_ETSI][11] = 42, -+ [1][0][RTW89_MKK][11] = 52, -+ [1][0][RTW89_IC][11] = 66, -+ [1][0][RTW89_KCC][11] = 58, -+ [1][0][RTW89_ACMA][11] = 42, -+ [1][0][RTW89_CN][11] = 44, -+ [1][0][RTW89_UK][11] = 42, -+ [1][0][RTW89_FCC][12] = 34, -+ [1][0][RTW89_ETSI][12] = 42, -+ [1][0][RTW89_MKK][12] = 52, -+ [1][0][RTW89_IC][12] = 34, -+ [1][0][RTW89_KCC][12] = 58, -+ [1][0][RTW89_ACMA][12] = 42, -+ [1][0][RTW89_CN][12] = 42, -+ [1][0][RTW89_UK][12] = 42, -+ [1][0][RTW89_FCC][13] = 127, -+ [1][0][RTW89_ETSI][13] = 127, -+ [1][0][RTW89_MKK][13] = 127, -+ [1][0][RTW89_IC][13] = 127, -+ [1][0][RTW89_KCC][13] = 127, -+ [1][0][RTW89_ACMA][13] = 127, -+ [1][0][RTW89_CN][13] = 127, -+ [1][0][RTW89_UK][13] = 127, -+ [1][1][RTW89_FCC][0] = 127, -+ [1][1][RTW89_ETSI][0] = 127, -+ [1][1][RTW89_MKK][0] = 127, -+ [1][1][RTW89_IC][0] = 127, -+ [1][1][RTW89_KCC][0] = 127, -+ [1][1][RTW89_ACMA][0] = 127, -+ [1][1][RTW89_CN][0] = 32, -+ [1][1][RTW89_UK][0] = 127, -+ [1][1][RTW89_FCC][1] = 127, -+ [1][1][RTW89_ETSI][1] = 127, -+ [1][1][RTW89_MKK][1] = 127, -+ [1][1][RTW89_IC][1] = 127, -+ [1][1][RTW89_KCC][1] = 127, -+ [1][1][RTW89_ACMA][1] = 127, -+ [1][1][RTW89_CN][1] = 32, -+ [1][1][RTW89_UK][1] = 127, -+ [1][1][RTW89_FCC][2] = 127, -+ [1][1][RTW89_ETSI][2] = 127, -+ [1][1][RTW89_MKK][2] = 127, -+ [1][1][RTW89_IC][2] = 127, -+ [1][1][RTW89_KCC][2] = 127, -+ [1][1][RTW89_ACMA][2] = 127, -+ [1][1][RTW89_CN][2] = 32, -+ [1][1][RTW89_UK][2] = 127, -+ [1][1][RTW89_FCC][3] = 127, -+ [1][1][RTW89_ETSI][3] = 127, -+ [1][1][RTW89_MKK][3] = 127, -+ [1][1][RTW89_IC][3] = 127, -+ [1][1][RTW89_KCC][3] = 127, -+ [1][1][RTW89_ACMA][3] = 127, -+ [1][1][RTW89_CN][3] = 32, -+ [1][1][RTW89_UK][3] = 127, -+ [1][1][RTW89_FCC][4] = 127, -+ [1][1][RTW89_ETSI][4] = 127, -+ [1][1][RTW89_MKK][4] = 127, -+ [1][1][RTW89_IC][4] = 127, -+ [1][1][RTW89_KCC][4] = 127, -+ [1][1][RTW89_ACMA][4] = 127, -+ [1][1][RTW89_CN][4] = 32, -+ [1][1][RTW89_UK][4] = 127, -+ [1][1][RTW89_FCC][5] = 127, -+ [1][1][RTW89_ETSI][5] = 127, -+ [1][1][RTW89_MKK][5] = 127, -+ [1][1][RTW89_IC][5] = 127, -+ [1][1][RTW89_KCC][5] = 127, -+ [1][1][RTW89_ACMA][5] = 127, -+ [1][1][RTW89_CN][5] = 32, -+ [1][1][RTW89_UK][5] = 127, -+ [1][1][RTW89_FCC][6] = 127, -+ [1][1][RTW89_ETSI][6] = 127, -+ [1][1][RTW89_MKK][6] = 127, -+ [1][1][RTW89_IC][6] = 127, -+ [1][1][RTW89_KCC][6] = 127, -+ [1][1][RTW89_ACMA][6] = 127, -+ [1][1][RTW89_CN][6] = 32, -+ [1][1][RTW89_UK][6] = 127, -+ [1][1][RTW89_FCC][7] = 127, -+ [1][1][RTW89_ETSI][7] = 127, -+ [1][1][RTW89_MKK][7] = 127, -+ [1][1][RTW89_IC][7] = 127, -+ [1][1][RTW89_KCC][7] = 127, -+ [1][1][RTW89_ACMA][7] = 127, -+ [1][1][RTW89_CN][7] = 32, -+ [1][1][RTW89_UK][7] = 127, -+ [1][1][RTW89_FCC][8] = 127, -+ [1][1][RTW89_ETSI][8] = 127, -+ [1][1][RTW89_MKK][8] = 127, -+ [1][1][RTW89_IC][8] = 127, -+ [1][1][RTW89_KCC][8] = 127, -+ [1][1][RTW89_ACMA][8] = 127, -+ [1][1][RTW89_CN][8] = 32, -+ [1][1][RTW89_UK][8] = 127, -+ [1][1][RTW89_FCC][9] = 127, -+ [1][1][RTW89_ETSI][9] = 127, -+ [1][1][RTW89_MKK][9] = 127, -+ [1][1][RTW89_IC][9] = 127, -+ [1][1][RTW89_KCC][9] = 127, -+ [1][1][RTW89_ACMA][9] = 127, -+ [1][1][RTW89_CN][9] = 32, -+ [1][1][RTW89_UK][9] = 127, -+ [1][1][RTW89_FCC][10] = 127, -+ [1][1][RTW89_ETSI][10] = 127, -+ [1][1][RTW89_MKK][10] = 127, -+ [1][1][RTW89_IC][10] = 127, -+ [1][1][RTW89_KCC][10] = 127, -+ [1][1][RTW89_ACMA][10] = 127, -+ [1][1][RTW89_CN][10] = 32, -+ [1][1][RTW89_UK][10] = 127, -+ [1][1][RTW89_FCC][11] = 127, -+ [1][1][RTW89_ETSI][11] = 127, -+ [1][1][RTW89_MKK][11] = 127, -+ [1][1][RTW89_IC][11] = 127, -+ [1][1][RTW89_KCC][11] = 127, -+ [1][1][RTW89_ACMA][11] = 127, -+ [1][1][RTW89_CN][11] = 32, -+ [1][1][RTW89_UK][11] = 127, -+ [1][1][RTW89_FCC][12] = 127, -+ [1][1][RTW89_ETSI][12] = 127, -+ [1][1][RTW89_MKK][12] = 127, -+ [1][1][RTW89_IC][12] = 127, -+ [1][1][RTW89_KCC][12] = 127, -+ [1][1][RTW89_ACMA][12] = 127, -+ [1][1][RTW89_CN][12] = 32, -+ [1][1][RTW89_UK][12] = 127, -+ [1][1][RTW89_FCC][13] = 127, -+ [1][1][RTW89_ETSI][13] = 127, -+ [1][1][RTW89_MKK][13] = 127, -+ [1][1][RTW89_IC][13] = 127, -+ [1][1][RTW89_KCC][13] = 127, -+ [1][1][RTW89_ACMA][13] = 127, -+ [1][1][RTW89_CN][13] = 127, -+ [1][1][RTW89_UK][13] = 127, -+ [2][0][RTW89_FCC][0] = 74, -+ [2][0][RTW89_ETSI][0] = 54, -+ [2][0][RTW89_MKK][0] = 64, -+ [2][0][RTW89_IC][0] = 74, -+ [2][0][RTW89_KCC][0] = 68, -+ [2][0][RTW89_ACMA][0] = 54, -+ [2][0][RTW89_CN][0] = 56, -+ [2][0][RTW89_UK][0] = 54, -+ [2][0][RTW89_FCC][1] = 74, -+ [2][0][RTW89_ETSI][1] = 54, -+ [2][0][RTW89_MKK][1] = 64, -+ [2][0][RTW89_IC][1] = 74, -+ [2][0][RTW89_KCC][1] = 68, -+ [2][0][RTW89_ACMA][1] = 54, -+ [2][0][RTW89_CN][1] = 56, -+ [2][0][RTW89_UK][1] = 54, -+ [2][0][RTW89_FCC][2] = 76, -+ [2][0][RTW89_ETSI][2] = 54, -+ [2][0][RTW89_MKK][2] = 64, -+ [2][0][RTW89_IC][2] = 76, -+ [2][0][RTW89_KCC][2] = 68, -+ [2][0][RTW89_ACMA][2] = 54, -+ [2][0][RTW89_CN][2] = 56, -+ [2][0][RTW89_UK][2] = 54, -+ [2][0][RTW89_FCC][3] = 76, -+ [2][0][RTW89_ETSI][3] = 54, -+ [2][0][RTW89_MKK][3] = 64, -+ [2][0][RTW89_IC][3] = 76, -+ [2][0][RTW89_KCC][3] = 68, -+ [2][0][RTW89_ACMA][3] = 54, -+ [2][0][RTW89_CN][3] = 56, -+ [2][0][RTW89_UK][3] = 54, -+ [2][0][RTW89_FCC][4] = 76, -+ [2][0][RTW89_ETSI][4] = 54, -+ [2][0][RTW89_MKK][4] = 64, -+ [2][0][RTW89_IC][4] = 76, -+ [2][0][RTW89_KCC][4] = 68, -+ [2][0][RTW89_ACMA][4] = 54, -+ [2][0][RTW89_CN][4] = 56, -+ [2][0][RTW89_UK][4] = 54, -+ [2][0][RTW89_FCC][5] = 80, -+ [2][0][RTW89_ETSI][5] = 54, -+ [2][0][RTW89_MKK][5] = 64, -+ [2][0][RTW89_IC][5] = 80, -+ [2][0][RTW89_KCC][5] = 68, -+ [2][0][RTW89_ACMA][5] = 54, -+ [2][0][RTW89_CN][5] = 56, -+ [2][0][RTW89_UK][5] = 54, -+ [2][0][RTW89_FCC][6] = 72, -+ [2][0][RTW89_ETSI][6] = 54, -+ [2][0][RTW89_MKK][6] = 64, -+ [2][0][RTW89_IC][6] = 72, -+ [2][0][RTW89_KCC][6] = 68, -+ [2][0][RTW89_ACMA][6] = 54, -+ [2][0][RTW89_CN][6] = 56, -+ [2][0][RTW89_UK][6] = 54, -+ [2][0][RTW89_FCC][7] = 72, -+ [2][0][RTW89_ETSI][7] = 54, -+ [2][0][RTW89_MKK][7] = 64, -+ [2][0][RTW89_IC][7] = 72, -+ [2][0][RTW89_KCC][7] = 68, -+ [2][0][RTW89_ACMA][7] = 54, -+ [2][0][RTW89_CN][7] = 56, -+ [2][0][RTW89_UK][7] = 54, -+ [2][0][RTW89_FCC][8] = 72, -+ [2][0][RTW89_ETSI][8] = 54, -+ [2][0][RTW89_MKK][8] = 64, -+ [2][0][RTW89_IC][8] = 72, -+ [2][0][RTW89_KCC][8] = 68, -+ [2][0][RTW89_ACMA][8] = 54, -+ [2][0][RTW89_CN][8] = 56, -+ [2][0][RTW89_UK][8] = 54, -+ [2][0][RTW89_FCC][9] = 70, -+ [2][0][RTW89_ETSI][9] = 54, -+ [2][0][RTW89_MKK][9] = 64, -+ [2][0][RTW89_IC][9] = 70, -+ [2][0][RTW89_KCC][9] = 68, -+ [2][0][RTW89_ACMA][9] = 54, -+ [2][0][RTW89_CN][9] = 56, -+ [2][0][RTW89_UK][9] = 54, -+ [2][0][RTW89_FCC][10] = 70, -+ [2][0][RTW89_ETSI][10] = 54, -+ [2][0][RTW89_MKK][10] = 64, -+ [2][0][RTW89_IC][10] = 70, -+ [2][0][RTW89_KCC][10] = 68, -+ [2][0][RTW89_ACMA][10] = 54, -+ [2][0][RTW89_CN][10] = 56, -+ [2][0][RTW89_UK][10] = 54, -+ [2][0][RTW89_FCC][11] = 62, -+ [2][0][RTW89_ETSI][11] = 54, -+ [2][0][RTW89_MKK][11] = 64, -+ [2][0][RTW89_IC][11] = 62, -+ [2][0][RTW89_KCC][11] = 68, -+ [2][0][RTW89_ACMA][11] = 54, -+ [2][0][RTW89_CN][11] = 56, -+ [2][0][RTW89_UK][11] = 54, -+ [2][0][RTW89_FCC][12] = 34, -+ [2][0][RTW89_ETSI][12] = 54, -+ [2][0][RTW89_MKK][12] = 64, -+ [2][0][RTW89_IC][12] = 34, -+ [2][0][RTW89_KCC][12] = 68, -+ [2][0][RTW89_ACMA][12] = 54, -+ [2][0][RTW89_CN][12] = 56, -+ [2][0][RTW89_UK][12] = 54, -+ [2][0][RTW89_FCC][13] = 127, -+ [2][0][RTW89_ETSI][13] = 127, -+ [2][0][RTW89_MKK][13] = 127, -+ [2][0][RTW89_IC][13] = 127, -+ [2][0][RTW89_KCC][13] = 127, -+ [2][0][RTW89_ACMA][13] = 127, -+ [2][0][RTW89_CN][13] = 127, -+ [2][0][RTW89_UK][13] = 127, -+ [2][1][RTW89_FCC][0] = 127, -+ [2][1][RTW89_ETSI][0] = 127, -+ [2][1][RTW89_MKK][0] = 127, -+ [2][1][RTW89_IC][0] = 127, -+ [2][1][RTW89_KCC][0] = 127, -+ [2][1][RTW89_ACMA][0] = 127, -+ [2][1][RTW89_CN][0] = 44, -+ [2][1][RTW89_UK][0] = 127, -+ [2][1][RTW89_FCC][1] = 127, -+ [2][1][RTW89_ETSI][1] = 127, -+ [2][1][RTW89_MKK][1] = 127, -+ [2][1][RTW89_IC][1] = 127, -+ [2][1][RTW89_KCC][1] = 127, -+ [2][1][RTW89_ACMA][1] = 127, -+ [2][1][RTW89_CN][1] = 44, -+ [2][1][RTW89_UK][1] = 127, -+ [2][1][RTW89_FCC][2] = 127, -+ [2][1][RTW89_ETSI][2] = 127, -+ [2][1][RTW89_MKK][2] = 127, -+ [2][1][RTW89_IC][2] = 127, -+ [2][1][RTW89_KCC][2] = 127, -+ [2][1][RTW89_ACMA][2] = 127, -+ [2][1][RTW89_CN][2] = 44, -+ [2][1][RTW89_UK][2] = 127, -+ [2][1][RTW89_FCC][3] = 127, -+ [2][1][RTW89_ETSI][3] = 127, -+ [2][1][RTW89_MKK][3] = 127, -+ [2][1][RTW89_IC][3] = 127, -+ [2][1][RTW89_KCC][3] = 127, -+ [2][1][RTW89_ACMA][3] = 127, -+ [2][1][RTW89_CN][3] = 44, -+ [2][1][RTW89_UK][3] = 127, -+ [2][1][RTW89_FCC][4] = 127, -+ [2][1][RTW89_ETSI][4] = 127, -+ [2][1][RTW89_MKK][4] = 127, -+ [2][1][RTW89_IC][4] = 127, -+ [2][1][RTW89_KCC][4] = 127, -+ [2][1][RTW89_ACMA][4] = 127, -+ [2][1][RTW89_CN][4] = 44, -+ [2][1][RTW89_UK][4] = 127, -+ [2][1][RTW89_FCC][5] = 127, -+ [2][1][RTW89_ETSI][5] = 127, -+ [2][1][RTW89_MKK][5] = 127, -+ [2][1][RTW89_IC][5] = 127, -+ [2][1][RTW89_KCC][5] = 127, -+ [2][1][RTW89_ACMA][5] = 127, -+ [2][1][RTW89_CN][5] = 44, -+ [2][1][RTW89_UK][5] = 127, -+ [2][1][RTW89_FCC][6] = 127, -+ [2][1][RTW89_ETSI][6] = 127, -+ [2][1][RTW89_MKK][6] = 127, -+ [2][1][RTW89_IC][6] = 127, -+ [2][1][RTW89_KCC][6] = 127, -+ [2][1][RTW89_ACMA][6] = 127, -+ [2][1][RTW89_CN][6] = 44, -+ [2][1][RTW89_UK][6] = 127, -+ [2][1][RTW89_FCC][7] = 127, -+ [2][1][RTW89_ETSI][7] = 127, -+ [2][1][RTW89_MKK][7] = 127, -+ [2][1][RTW89_IC][7] = 127, -+ [2][1][RTW89_KCC][7] = 127, -+ [2][1][RTW89_ACMA][7] = 127, -+ [2][1][RTW89_CN][7] = 44, -+ [2][1][RTW89_UK][7] = 127, -+ [2][1][RTW89_FCC][8] = 127, -+ [2][1][RTW89_ETSI][8] = 127, -+ [2][1][RTW89_MKK][8] = 127, -+ [2][1][RTW89_IC][8] = 127, -+ [2][1][RTW89_KCC][8] = 127, -+ [2][1][RTW89_ACMA][8] = 127, -+ [2][1][RTW89_CN][8] = 44, -+ [2][1][RTW89_UK][8] = 127, -+ [2][1][RTW89_FCC][9] = 127, -+ [2][1][RTW89_ETSI][9] = 127, -+ [2][1][RTW89_MKK][9] = 127, -+ [2][1][RTW89_IC][9] = 127, -+ [2][1][RTW89_KCC][9] = 127, -+ [2][1][RTW89_ACMA][9] = 127, -+ [2][1][RTW89_CN][9] = 44, -+ [2][1][RTW89_UK][9] = 127, -+ [2][1][RTW89_FCC][10] = 127, -+ [2][1][RTW89_ETSI][10] = 127, -+ [2][1][RTW89_MKK][10] = 127, -+ [2][1][RTW89_IC][10] = 127, -+ [2][1][RTW89_KCC][10] = 127, -+ [2][1][RTW89_ACMA][10] = 127, -+ [2][1][RTW89_CN][10] = 44, -+ [2][1][RTW89_UK][10] = 127, -+ [2][1][RTW89_FCC][11] = 127, -+ [2][1][RTW89_ETSI][11] = 127, -+ [2][1][RTW89_MKK][11] = 127, -+ [2][1][RTW89_IC][11] = 127, -+ [2][1][RTW89_KCC][11] = 127, -+ [2][1][RTW89_ACMA][11] = 127, -+ [2][1][RTW89_CN][11] = 44, -+ [2][1][RTW89_UK][11] = 127, -+ [2][1][RTW89_FCC][12] = 127, -+ [2][1][RTW89_ETSI][12] = 127, -+ [2][1][RTW89_MKK][12] = 127, -+ [2][1][RTW89_IC][12] = 127, -+ [2][1][RTW89_KCC][12] = 127, -+ [2][1][RTW89_ACMA][12] = 127, -+ [2][1][RTW89_CN][12] = 42, -+ [2][1][RTW89_UK][12] = 127, -+ [2][1][RTW89_FCC][13] = 127, -+ [2][1][RTW89_ETSI][13] = 127, -+ [2][1][RTW89_MKK][13] = 127, -+ [2][1][RTW89_IC][13] = 127, -+ [2][1][RTW89_KCC][13] = 127, -+ [2][1][RTW89_ACMA][13] = 127, -+ [2][1][RTW89_CN][13] = 127, -+ [2][1][RTW89_UK][13] = 127, -+}; -+ -+static -+const s8 rtw89_8851b_txpwr_lmt_ru_5g_type2[RTW89_RU_NUM][RTW89_NTX_NUM] -+ [RTW89_REGD_NUM][RTW89_5G_CH_NUM] = { -+ [0][0][RTW89_WW][0] = 16, -+ [0][0][RTW89_WW][2] = 16, -+ [0][0][RTW89_WW][4] = 16, -+ [0][0][RTW89_WW][6] = 16, -+ [0][0][RTW89_WW][8] = 16, -+ [0][0][RTW89_WW][10] = 16, -+ [0][0][RTW89_WW][12] = 16, -+ [0][0][RTW89_WW][14] = 16, -+ [0][0][RTW89_WW][15] = 24, -+ [0][0][RTW89_WW][17] = 24, -+ [0][0][RTW89_WW][19] = 24, -+ [0][0][RTW89_WW][21] = 24, -+ [0][0][RTW89_WW][23] = 24, -+ [0][0][RTW89_WW][25] = 24, -+ [0][0][RTW89_WW][27] = 24, -+ [0][0][RTW89_WW][29] = 24, -+ [0][0][RTW89_WW][31] = 24, -+ [0][0][RTW89_WW][33] = 24, -+ [0][0][RTW89_WW][35] = 24, -+ [0][0][RTW89_WW][37] = 44, -+ [0][0][RTW89_WW][38] = 24, -+ [0][0][RTW89_WW][40] = 24, -+ [0][0][RTW89_WW][42] = 24, -+ [0][0][RTW89_WW][44] = 24, -+ [0][0][RTW89_WW][46] = 24, -+ [0][0][RTW89_WW][48] = 40, -+ [0][0][RTW89_WW][50] = 42, -+ [0][0][RTW89_WW][52] = 38, -+ [0][1][RTW89_WW][0] = 4, -+ [0][1][RTW89_WW][2] = 4, -+ [0][1][RTW89_WW][4] = 4, -+ [0][1][RTW89_WW][6] = 4, -+ [0][1][RTW89_WW][8] = 4, -+ [0][1][RTW89_WW][10] = 4, -+ [0][1][RTW89_WW][12] = 4, -+ [0][1][RTW89_WW][14] = 4, -+ [0][1][RTW89_WW][15] = 0, -+ [0][1][RTW89_WW][17] = 0, -+ [0][1][RTW89_WW][19] = 0, -+ [0][1][RTW89_WW][21] = 0, -+ [0][1][RTW89_WW][23] = 0, -+ [0][1][RTW89_WW][25] = 0, -+ [0][1][RTW89_WW][27] = 0, -+ [0][1][RTW89_WW][29] = 0, -+ [0][1][RTW89_WW][31] = 0, -+ [0][1][RTW89_WW][33] = 0, -+ [0][1][RTW89_WW][35] = 0, -+ [0][1][RTW89_WW][37] = 0, -+ [0][1][RTW89_WW][38] = 42, -+ [0][1][RTW89_WW][40] = 42, -+ [0][1][RTW89_WW][42] = 42, -+ [0][1][RTW89_WW][44] = 42, -+ [0][1][RTW89_WW][46] = 42, -+ [0][1][RTW89_WW][48] = 0, -+ [0][1][RTW89_WW][50] = 0, -+ [0][1][RTW89_WW][52] = 0, -+ [1][0][RTW89_WW][0] = 26, -+ [1][0][RTW89_WW][2] = 26, -+ [1][0][RTW89_WW][4] = 26, -+ [1][0][RTW89_WW][6] = 26, -+ [1][0][RTW89_WW][8] = 26, -+ [1][0][RTW89_WW][10] = 26, -+ [1][0][RTW89_WW][12] = 26, -+ [1][0][RTW89_WW][14] = 26, -+ [1][0][RTW89_WW][15] = 34, -+ [1][0][RTW89_WW][17] = 34, -+ [1][0][RTW89_WW][19] = 34, -+ [1][0][RTW89_WW][21] = 34, -+ [1][0][RTW89_WW][23] = 34, -+ [1][0][RTW89_WW][25] = 34, -+ [1][0][RTW89_WW][27] = 34, -+ [1][0][RTW89_WW][29] = 34, -+ [1][0][RTW89_WW][31] = 34, -+ [1][0][RTW89_WW][33] = 34, -+ [1][0][RTW89_WW][35] = 34, -+ [1][0][RTW89_WW][37] = 54, -+ [1][0][RTW89_WW][38] = 28, -+ [1][0][RTW89_WW][40] = 28, -+ [1][0][RTW89_WW][42] = 28, -+ [1][0][RTW89_WW][44] = 28, -+ [1][0][RTW89_WW][46] = 28, -+ [1][0][RTW89_WW][48] = 52, -+ [1][0][RTW89_WW][50] = 52, -+ [1][0][RTW89_WW][52] = 50, -+ [1][1][RTW89_WW][0] = 14, -+ [1][1][RTW89_WW][2] = 14, -+ [1][1][RTW89_WW][4] = 14, -+ [1][1][RTW89_WW][6] = 14, -+ [1][1][RTW89_WW][8] = 14, -+ [1][1][RTW89_WW][10] = 14, -+ [1][1][RTW89_WW][12] = 14, -+ [1][1][RTW89_WW][14] = 14, -+ [1][1][RTW89_WW][15] = 0, -+ [1][1][RTW89_WW][17] = 0, -+ [1][1][RTW89_WW][19] = 0, -+ [1][1][RTW89_WW][21] = 0, -+ [1][1][RTW89_WW][23] = 0, -+ [1][1][RTW89_WW][25] = 0, -+ [1][1][RTW89_WW][27] = 0, -+ [1][1][RTW89_WW][29] = 0, -+ [1][1][RTW89_WW][31] = 0, -+ [1][1][RTW89_WW][33] = 0, -+ [1][1][RTW89_WW][35] = 0, -+ [1][1][RTW89_WW][37] = 0, -+ [1][1][RTW89_WW][38] = 54, -+ [1][1][RTW89_WW][40] = 54, -+ [1][1][RTW89_WW][42] = 54, -+ [1][1][RTW89_WW][44] = 54, -+ [1][1][RTW89_WW][46] = 54, -+ [1][1][RTW89_WW][48] = 0, -+ [1][1][RTW89_WW][50] = 0, -+ [1][1][RTW89_WW][52] = 0, -+ [2][0][RTW89_WW][0] = 40, -+ [2][0][RTW89_WW][2] = 40, -+ [2][0][RTW89_WW][4] = 40, -+ [2][0][RTW89_WW][6] = 40, -+ [2][0][RTW89_WW][8] = 40, -+ [2][0][RTW89_WW][10] = 40, -+ [2][0][RTW89_WW][12] = 40, -+ [2][0][RTW89_WW][14] = 40, -+ [2][0][RTW89_WW][15] = 46, -+ [2][0][RTW89_WW][17] = 46, -+ [2][0][RTW89_WW][19] = 46, -+ [2][0][RTW89_WW][21] = 46, -+ [2][0][RTW89_WW][23] = 46, -+ [2][0][RTW89_WW][25] = 46, -+ [2][0][RTW89_WW][27] = 46, -+ [2][0][RTW89_WW][29] = 46, -+ [2][0][RTW89_WW][31] = 46, -+ [2][0][RTW89_WW][33] = 46, -+ [2][0][RTW89_WW][35] = 46, -+ [2][0][RTW89_WW][37] = 66, -+ [2][0][RTW89_WW][38] = 28, -+ [2][0][RTW89_WW][40] = 28, -+ [2][0][RTW89_WW][42] = 28, -+ [2][0][RTW89_WW][44] = 28, -+ [2][0][RTW89_WW][46] = 28, -+ [2][0][RTW89_WW][48] = 62, -+ [2][0][RTW89_WW][50] = 62, -+ [2][0][RTW89_WW][52] = 60, -+ [2][1][RTW89_WW][0] = 28, -+ [2][1][RTW89_WW][2] = 28, -+ [2][1][RTW89_WW][4] = 28, -+ [2][1][RTW89_WW][6] = 28, -+ [2][1][RTW89_WW][8] = 28, -+ [2][1][RTW89_WW][10] = 28, -+ [2][1][RTW89_WW][12] = 28, -+ [2][1][RTW89_WW][14] = 28, -+ [2][1][RTW89_WW][15] = 0, -+ [2][1][RTW89_WW][17] = 0, -+ [2][1][RTW89_WW][19] = 0, -+ [2][1][RTW89_WW][21] = 0, -+ [2][1][RTW89_WW][23] = 0, -+ [2][1][RTW89_WW][25] = 0, -+ [2][1][RTW89_WW][27] = 0, -+ [2][1][RTW89_WW][29] = 0, -+ [2][1][RTW89_WW][31] = 0, -+ [2][1][RTW89_WW][33] = 0, -+ [2][1][RTW89_WW][35] = 0, -+ [2][1][RTW89_WW][37] = 0, -+ [2][1][RTW89_WW][38] = 56, -+ [2][1][RTW89_WW][40] = 56, -+ [2][1][RTW89_WW][42] = 56, -+ [2][1][RTW89_WW][44] = 56, -+ [2][1][RTW89_WW][46] = 56, -+ [2][1][RTW89_WW][48] = 0, -+ [2][1][RTW89_WW][50] = 0, -+ [2][1][RTW89_WW][52] = 0, -+ [0][0][RTW89_FCC][0] = 50, -+ [0][0][RTW89_ETSI][0] = 24, -+ [0][0][RTW89_MKK][0] = 26, -+ [0][0][RTW89_IC][0] = 28, -+ [0][0][RTW89_KCC][0] = 42, -+ [0][0][RTW89_ACMA][0] = 24, -+ [0][0][RTW89_CN][0] = 16, -+ [0][0][RTW89_UK][0] = 24, -+ [0][0][RTW89_FCC][2] = 54, -+ [0][0][RTW89_ETSI][2] = 24, -+ [0][0][RTW89_MKK][2] = 26, -+ [0][0][RTW89_IC][2] = 28, -+ [0][0][RTW89_KCC][2] = 42, -+ [0][0][RTW89_ACMA][2] = 24, -+ [0][0][RTW89_CN][2] = 16, -+ [0][0][RTW89_UK][2] = 24, -+ [0][0][RTW89_FCC][4] = 50, -+ [0][0][RTW89_ETSI][4] = 24, -+ [0][0][RTW89_MKK][4] = 26, -+ [0][0][RTW89_IC][4] = 28, -+ [0][0][RTW89_KCC][4] = 42, -+ [0][0][RTW89_ACMA][4] = 24, -+ [0][0][RTW89_CN][4] = 16, -+ [0][0][RTW89_UK][4] = 24, -+ [0][0][RTW89_FCC][6] = 50, -+ [0][0][RTW89_ETSI][6] = 24, -+ [0][0][RTW89_MKK][6] = 26, -+ [0][0][RTW89_IC][6] = 28, -+ [0][0][RTW89_KCC][6] = 18, -+ [0][0][RTW89_ACMA][6] = 24, -+ [0][0][RTW89_CN][6] = 16, -+ [0][0][RTW89_UK][6] = 24, -+ [0][0][RTW89_FCC][8] = 52, -+ [0][0][RTW89_ETSI][8] = 24, -+ [0][0][RTW89_MKK][8] = 26, -+ [0][0][RTW89_IC][8] = 52, -+ [0][0][RTW89_KCC][8] = 42, -+ [0][0][RTW89_ACMA][8] = 24, -+ [0][0][RTW89_CN][8] = 16, -+ [0][0][RTW89_UK][8] = 24, -+ [0][0][RTW89_FCC][10] = 52, -+ [0][0][RTW89_ETSI][10] = 24, -+ [0][0][RTW89_MKK][10] = 26, -+ [0][0][RTW89_IC][10] = 52, -+ [0][0][RTW89_KCC][10] = 42, -+ [0][0][RTW89_ACMA][10] = 24, -+ [0][0][RTW89_CN][10] = 16, -+ [0][0][RTW89_UK][10] = 24, -+ [0][0][RTW89_FCC][12] = 56, -+ [0][0][RTW89_ETSI][12] = 24, -+ [0][0][RTW89_MKK][12] = 26, -+ [0][0][RTW89_IC][12] = 56, -+ [0][0][RTW89_KCC][12] = 44, -+ [0][0][RTW89_ACMA][12] = 24, -+ [0][0][RTW89_CN][12] = 16, -+ [0][0][RTW89_UK][12] = 24, -+ [0][0][RTW89_FCC][14] = 56, -+ [0][0][RTW89_ETSI][14] = 24, -+ [0][0][RTW89_MKK][14] = 26, -+ [0][0][RTW89_IC][14] = 56, -+ [0][0][RTW89_KCC][14] = 44, -+ [0][0][RTW89_ACMA][14] = 24, -+ [0][0][RTW89_CN][14] = 16, -+ [0][0][RTW89_UK][14] = 24, -+ [0][0][RTW89_FCC][15] = 52, -+ [0][0][RTW89_ETSI][15] = 24, -+ [0][0][RTW89_MKK][15] = 46, -+ [0][0][RTW89_IC][15] = 52, -+ [0][0][RTW89_KCC][15] = 44, -+ [0][0][RTW89_ACMA][15] = 24, -+ [0][0][RTW89_CN][15] = 127, -+ [0][0][RTW89_UK][15] = 24, -+ [0][0][RTW89_FCC][17] = 52, -+ [0][0][RTW89_ETSI][17] = 24, -+ [0][0][RTW89_MKK][17] = 50, -+ [0][0][RTW89_IC][17] = 52, -+ [0][0][RTW89_KCC][17] = 44, -+ [0][0][RTW89_ACMA][17] = 24, -+ [0][0][RTW89_CN][17] = 127, -+ [0][0][RTW89_UK][17] = 24, -+ [0][0][RTW89_FCC][19] = 52, -+ [0][0][RTW89_ETSI][19] = 24, -+ [0][0][RTW89_MKK][19] = 50, -+ [0][0][RTW89_IC][19] = 52, -+ [0][0][RTW89_KCC][19] = 44, -+ [0][0][RTW89_ACMA][19] = 24, -+ [0][0][RTW89_CN][19] = 127, -+ [0][0][RTW89_UK][19] = 24, -+ [0][0][RTW89_FCC][21] = 52, -+ [0][0][RTW89_ETSI][21] = 24, -+ [0][0][RTW89_MKK][21] = 50, -+ [0][0][RTW89_IC][21] = 52, -+ [0][0][RTW89_KCC][21] = 44, -+ [0][0][RTW89_ACMA][21] = 24, -+ [0][0][RTW89_CN][21] = 127, -+ [0][0][RTW89_UK][21] = 24, -+ [0][0][RTW89_FCC][23] = 52, -+ [0][0][RTW89_ETSI][23] = 24, -+ [0][0][RTW89_MKK][23] = 50, -+ [0][0][RTW89_IC][23] = 52, -+ [0][0][RTW89_KCC][23] = 44, -+ [0][0][RTW89_ACMA][23] = 24, -+ [0][0][RTW89_CN][23] = 127, -+ [0][0][RTW89_UK][23] = 24, -+ [0][0][RTW89_FCC][25] = 52, -+ [0][0][RTW89_ETSI][25] = 24, -+ [0][0][RTW89_MKK][25] = 50, -+ [0][0][RTW89_IC][25] = 127, -+ [0][0][RTW89_KCC][25] = 44, -+ [0][0][RTW89_ACMA][25] = 127, -+ [0][0][RTW89_CN][25] = 127, -+ [0][0][RTW89_UK][25] = 24, -+ [0][0][RTW89_FCC][27] = 52, -+ [0][0][RTW89_ETSI][27] = 24, -+ [0][0][RTW89_MKK][27] = 50, -+ [0][0][RTW89_IC][27] = 127, -+ [0][0][RTW89_KCC][27] = 42, -+ [0][0][RTW89_ACMA][27] = 127, -+ [0][0][RTW89_CN][27] = 127, -+ [0][0][RTW89_UK][27] = 24, -+ [0][0][RTW89_FCC][29] = 52, -+ [0][0][RTW89_ETSI][29] = 24, -+ [0][0][RTW89_MKK][29] = 50, -+ [0][0][RTW89_IC][29] = 127, -+ [0][0][RTW89_KCC][29] = 42, -+ [0][0][RTW89_ACMA][29] = 127, -+ [0][0][RTW89_CN][29] = 127, -+ [0][0][RTW89_UK][29] = 24, -+ [0][0][RTW89_FCC][31] = 52, -+ [0][0][RTW89_ETSI][31] = 24, -+ [0][0][RTW89_MKK][31] = 50, -+ [0][0][RTW89_IC][31] = 56, -+ [0][0][RTW89_KCC][31] = 42, -+ [0][0][RTW89_ACMA][31] = 24, -+ [0][0][RTW89_CN][31] = 127, -+ [0][0][RTW89_UK][31] = 24, -+ [0][0][RTW89_FCC][33] = 56, -+ [0][0][RTW89_ETSI][33] = 24, -+ [0][0][RTW89_MKK][33] = 50, -+ [0][0][RTW89_IC][33] = 56, -+ [0][0][RTW89_KCC][33] = 42, -+ [0][0][RTW89_ACMA][33] = 24, -+ [0][0][RTW89_CN][33] = 127, -+ [0][0][RTW89_UK][33] = 24, -+ [0][0][RTW89_FCC][35] = 56, -+ [0][0][RTW89_ETSI][35] = 24, -+ [0][0][RTW89_MKK][35] = 50, -+ [0][0][RTW89_IC][35] = 56, -+ [0][0][RTW89_KCC][35] = 42, -+ [0][0][RTW89_ACMA][35] = 24, -+ [0][0][RTW89_CN][35] = 127, -+ [0][0][RTW89_UK][35] = 24, -+ [0][0][RTW89_FCC][37] = 84, -+ [0][0][RTW89_ETSI][37] = 127, -+ [0][0][RTW89_MKK][37] = 46, -+ [0][0][RTW89_IC][37] = 84, -+ [0][0][RTW89_KCC][37] = 44, -+ [0][0][RTW89_ACMA][37] = 50, -+ [0][0][RTW89_CN][37] = 127, -+ [0][0][RTW89_UK][37] = 52, -+ [0][0][RTW89_FCC][38] = 68, -+ [0][0][RTW89_ETSI][38] = 28, -+ [0][0][RTW89_MKK][38] = 127, -+ [0][0][RTW89_IC][38] = 68, -+ [0][0][RTW89_KCC][38] = 44, -+ [0][0][RTW89_ACMA][38] = 84, -+ [0][0][RTW89_CN][38] = 54, -+ [0][0][RTW89_UK][38] = 24, -+ [0][0][RTW89_FCC][40] = 68, -+ [0][0][RTW89_ETSI][40] = 28, -+ [0][0][RTW89_MKK][40] = 127, -+ [0][0][RTW89_IC][40] = 68, -+ [0][0][RTW89_KCC][40] = 44, -+ [0][0][RTW89_ACMA][40] = 84, -+ [0][0][RTW89_CN][40] = 54, -+ [0][0][RTW89_UK][40] = 24, -+ [0][0][RTW89_FCC][42] = 70, -+ [0][0][RTW89_ETSI][42] = 28, -+ [0][0][RTW89_MKK][42] = 127, -+ [0][0][RTW89_IC][42] = 70, -+ [0][0][RTW89_KCC][42] = 44, -+ [0][0][RTW89_ACMA][42] = 84, -+ [0][0][RTW89_CN][42] = 54, -+ [0][0][RTW89_UK][42] = 24, -+ [0][0][RTW89_FCC][44] = 62, -+ [0][0][RTW89_ETSI][44] = 28, -+ [0][0][RTW89_MKK][44] = 127, -+ [0][0][RTW89_IC][44] = 62, -+ [0][0][RTW89_KCC][44] = 44, -+ [0][0][RTW89_ACMA][44] = 84, -+ [0][0][RTW89_CN][44] = 54, -+ [0][0][RTW89_UK][44] = 24, -+ [0][0][RTW89_FCC][46] = 62, -+ [0][0][RTW89_ETSI][46] = 28, -+ [0][0][RTW89_MKK][46] = 127, -+ [0][0][RTW89_IC][46] = 62, -+ [0][0][RTW89_KCC][46] = 44, -+ [0][0][RTW89_ACMA][46] = 84, -+ [0][0][RTW89_CN][46] = 54, -+ [0][0][RTW89_UK][46] = 24, -+ [0][0][RTW89_FCC][48] = 40, -+ [0][0][RTW89_ETSI][48] = 127, -+ [0][0][RTW89_MKK][48] = 127, -+ [0][0][RTW89_IC][48] = 127, -+ [0][0][RTW89_KCC][48] = 127, -+ [0][0][RTW89_ACMA][48] = 127, -+ [0][0][RTW89_CN][48] = 127, -+ [0][0][RTW89_UK][48] = 127, -+ [0][0][RTW89_FCC][50] = 42, -+ [0][0][RTW89_ETSI][50] = 127, -+ [0][0][RTW89_MKK][50] = 127, -+ [0][0][RTW89_IC][50] = 127, -+ [0][0][RTW89_KCC][50] = 127, -+ [0][0][RTW89_ACMA][50] = 127, -+ [0][0][RTW89_CN][50] = 127, -+ [0][0][RTW89_UK][50] = 127, -+ [0][0][RTW89_FCC][52] = 38, -+ [0][0][RTW89_ETSI][52] = 127, -+ [0][0][RTW89_MKK][52] = 127, -+ [0][0][RTW89_IC][52] = 127, -+ [0][0][RTW89_KCC][52] = 127, -+ [0][0][RTW89_ACMA][52] = 127, -+ [0][0][RTW89_CN][52] = 127, -+ [0][0][RTW89_UK][52] = 127, -+ [0][1][RTW89_FCC][0] = 127, -+ [0][1][RTW89_ETSI][0] = 127, -+ [0][1][RTW89_MKK][0] = 127, -+ [0][1][RTW89_IC][0] = 127, -+ [0][1][RTW89_KCC][0] = 127, -+ [0][1][RTW89_ACMA][0] = 127, -+ [0][1][RTW89_CN][0] = 4, -+ [0][1][RTW89_UK][0] = 127, -+ [0][1][RTW89_FCC][2] = 127, -+ [0][1][RTW89_ETSI][2] = 127, -+ [0][1][RTW89_MKK][2] = 127, -+ [0][1][RTW89_IC][2] = 127, -+ [0][1][RTW89_KCC][2] = 127, -+ [0][1][RTW89_ACMA][2] = 127, -+ [0][1][RTW89_CN][2] = 4, -+ [0][1][RTW89_UK][2] = 127, -+ [0][1][RTW89_FCC][4] = 127, -+ [0][1][RTW89_ETSI][4] = 127, -+ [0][1][RTW89_MKK][4] = 127, -+ [0][1][RTW89_IC][4] = 127, -+ [0][1][RTW89_KCC][4] = 127, -+ [0][1][RTW89_ACMA][4] = 127, -+ [0][1][RTW89_CN][4] = 4, -+ [0][1][RTW89_UK][4] = 127, -+ [0][1][RTW89_FCC][6] = 127, -+ [0][1][RTW89_ETSI][6] = 127, -+ [0][1][RTW89_MKK][6] = 127, -+ [0][1][RTW89_IC][6] = 127, -+ [0][1][RTW89_KCC][6] = 127, -+ [0][1][RTW89_ACMA][6] = 127, -+ [0][1][RTW89_CN][6] = 4, -+ [0][1][RTW89_UK][6] = 127, -+ [0][1][RTW89_FCC][8] = 127, -+ [0][1][RTW89_ETSI][8] = 127, -+ [0][1][RTW89_MKK][8] = 127, -+ [0][1][RTW89_IC][8] = 127, -+ [0][1][RTW89_KCC][8] = 127, -+ [0][1][RTW89_ACMA][8] = 127, -+ [0][1][RTW89_CN][8] = 4, -+ [0][1][RTW89_UK][8] = 127, -+ [0][1][RTW89_FCC][10] = 127, -+ [0][1][RTW89_ETSI][10] = 127, -+ [0][1][RTW89_MKK][10] = 127, -+ [0][1][RTW89_IC][10] = 127, -+ [0][1][RTW89_KCC][10] = 127, -+ [0][1][RTW89_ACMA][10] = 127, -+ [0][1][RTW89_CN][10] = 4, -+ [0][1][RTW89_UK][10] = 127, -+ [0][1][RTW89_FCC][12] = 127, -+ [0][1][RTW89_ETSI][12] = 127, -+ [0][1][RTW89_MKK][12] = 127, -+ [0][1][RTW89_IC][12] = 127, -+ [0][1][RTW89_KCC][12] = 127, -+ [0][1][RTW89_ACMA][12] = 127, -+ [0][1][RTW89_CN][12] = 4, -+ [0][1][RTW89_UK][12] = 127, -+ [0][1][RTW89_FCC][14] = 127, -+ [0][1][RTW89_ETSI][14] = 127, -+ [0][1][RTW89_MKK][14] = 127, -+ [0][1][RTW89_IC][14] = 127, -+ [0][1][RTW89_KCC][14] = 127, -+ [0][1][RTW89_ACMA][14] = 127, -+ [0][1][RTW89_CN][14] = 4, -+ [0][1][RTW89_UK][14] = 127, -+ [0][1][RTW89_FCC][15] = 127, -+ [0][1][RTW89_ETSI][15] = 127, -+ [0][1][RTW89_MKK][15] = 127, -+ [0][1][RTW89_IC][15] = 127, -+ [0][1][RTW89_KCC][15] = 127, -+ [0][1][RTW89_ACMA][15] = 127, -+ [0][1][RTW89_CN][15] = 127, -+ [0][1][RTW89_UK][15] = 127, -+ [0][1][RTW89_FCC][17] = 127, -+ [0][1][RTW89_ETSI][17] = 127, -+ [0][1][RTW89_MKK][17] = 127, -+ [0][1][RTW89_IC][17] = 127, -+ [0][1][RTW89_KCC][17] = 127, -+ [0][1][RTW89_ACMA][17] = 127, -+ [0][1][RTW89_CN][17] = 127, -+ [0][1][RTW89_UK][17] = 127, -+ [0][1][RTW89_FCC][19] = 127, -+ [0][1][RTW89_ETSI][19] = 127, -+ [0][1][RTW89_MKK][19] = 127, -+ [0][1][RTW89_IC][19] = 127, -+ [0][1][RTW89_KCC][19] = 127, -+ [0][1][RTW89_ACMA][19] = 127, -+ [0][1][RTW89_CN][19] = 127, -+ [0][1][RTW89_UK][19] = 127, -+ [0][1][RTW89_FCC][21] = 127, -+ [0][1][RTW89_ETSI][21] = 127, -+ [0][1][RTW89_MKK][21] = 127, -+ [0][1][RTW89_IC][21] = 127, -+ [0][1][RTW89_KCC][21] = 127, -+ [0][1][RTW89_ACMA][21] = 127, -+ [0][1][RTW89_CN][21] = 127, -+ [0][1][RTW89_UK][21] = 127, -+ [0][1][RTW89_FCC][23] = 127, -+ [0][1][RTW89_ETSI][23] = 127, -+ [0][1][RTW89_MKK][23] = 127, -+ [0][1][RTW89_IC][23] = 127, -+ [0][1][RTW89_KCC][23] = 127, -+ [0][1][RTW89_ACMA][23] = 127, -+ [0][1][RTW89_CN][23] = 127, -+ [0][1][RTW89_UK][23] = 127, -+ [0][1][RTW89_FCC][25] = 127, -+ [0][1][RTW89_ETSI][25] = 127, -+ [0][1][RTW89_MKK][25] = 127, -+ [0][1][RTW89_IC][25] = 127, -+ [0][1][RTW89_KCC][25] = 127, -+ [0][1][RTW89_ACMA][25] = 127, -+ [0][1][RTW89_CN][25] = 127, -+ [0][1][RTW89_UK][25] = 127, -+ [0][1][RTW89_FCC][27] = 127, -+ [0][1][RTW89_ETSI][27] = 127, -+ [0][1][RTW89_MKK][27] = 127, -+ [0][1][RTW89_IC][27] = 127, -+ [0][1][RTW89_KCC][27] = 127, -+ [0][1][RTW89_ACMA][27] = 127, -+ [0][1][RTW89_CN][27] = 127, -+ [0][1][RTW89_UK][27] = 127, -+ [0][1][RTW89_FCC][29] = 127, -+ [0][1][RTW89_ETSI][29] = 127, -+ [0][1][RTW89_MKK][29] = 127, -+ [0][1][RTW89_IC][29] = 127, -+ [0][1][RTW89_KCC][29] = 127, -+ [0][1][RTW89_ACMA][29] = 127, -+ [0][1][RTW89_CN][29] = 127, -+ [0][1][RTW89_UK][29] = 127, -+ [0][1][RTW89_FCC][31] = 127, -+ [0][1][RTW89_ETSI][31] = 127, -+ [0][1][RTW89_MKK][31] = 127, -+ [0][1][RTW89_IC][31] = 127, -+ [0][1][RTW89_KCC][31] = 127, -+ [0][1][RTW89_ACMA][31] = 127, -+ [0][1][RTW89_CN][31] = 127, -+ [0][1][RTW89_UK][31] = 127, -+ [0][1][RTW89_FCC][33] = 127, -+ [0][1][RTW89_ETSI][33] = 127, -+ [0][1][RTW89_MKK][33] = 127, -+ [0][1][RTW89_IC][33] = 127, -+ [0][1][RTW89_KCC][33] = 127, -+ [0][1][RTW89_ACMA][33] = 127, -+ [0][1][RTW89_CN][33] = 127, -+ [0][1][RTW89_UK][33] = 127, -+ [0][1][RTW89_FCC][35] = 127, -+ [0][1][RTW89_ETSI][35] = 127, -+ [0][1][RTW89_MKK][35] = 127, -+ [0][1][RTW89_IC][35] = 127, -+ [0][1][RTW89_KCC][35] = 127, -+ [0][1][RTW89_ACMA][35] = 127, -+ [0][1][RTW89_CN][35] = 127, -+ [0][1][RTW89_UK][35] = 127, -+ [0][1][RTW89_FCC][37] = 127, -+ [0][1][RTW89_ETSI][37] = 127, -+ [0][1][RTW89_MKK][37] = 127, -+ [0][1][RTW89_IC][37] = 127, -+ [0][1][RTW89_KCC][37] = 127, -+ [0][1][RTW89_ACMA][37] = 127, -+ [0][1][RTW89_CN][37] = 127, -+ [0][1][RTW89_UK][37] = 127, -+ [0][1][RTW89_FCC][38] = 127, -+ [0][1][RTW89_ETSI][38] = 127, -+ [0][1][RTW89_MKK][38] = 127, -+ [0][1][RTW89_IC][38] = 127, -+ [0][1][RTW89_KCC][38] = 127, -+ [0][1][RTW89_ACMA][38] = 127, -+ [0][1][RTW89_CN][38] = 42, -+ [0][1][RTW89_UK][38] = 127, -+ [0][1][RTW89_FCC][40] = 127, -+ [0][1][RTW89_ETSI][40] = 127, -+ [0][1][RTW89_MKK][40] = 127, -+ [0][1][RTW89_IC][40] = 127, -+ [0][1][RTW89_KCC][40] = 127, -+ [0][1][RTW89_ACMA][40] = 127, -+ [0][1][RTW89_CN][40] = 42, -+ [0][1][RTW89_UK][40] = 127, -+ [0][1][RTW89_FCC][42] = 127, -+ [0][1][RTW89_ETSI][42] = 127, -+ [0][1][RTW89_MKK][42] = 127, -+ [0][1][RTW89_IC][42] = 127, -+ [0][1][RTW89_KCC][42] = 127, -+ [0][1][RTW89_ACMA][42] = 127, -+ [0][1][RTW89_CN][42] = 42, -+ [0][1][RTW89_UK][42] = 127, -+ [0][1][RTW89_FCC][44] = 127, -+ [0][1][RTW89_ETSI][44] = 127, -+ [0][1][RTW89_MKK][44] = 127, -+ [0][1][RTW89_IC][44] = 127, -+ [0][1][RTW89_KCC][44] = 127, -+ [0][1][RTW89_ACMA][44] = 127, -+ [0][1][RTW89_CN][44] = 42, -+ [0][1][RTW89_UK][44] = 127, -+ [0][1][RTW89_FCC][46] = 127, -+ [0][1][RTW89_ETSI][46] = 127, -+ [0][1][RTW89_MKK][46] = 127, -+ [0][1][RTW89_IC][46] = 127, -+ [0][1][RTW89_KCC][46] = 127, -+ [0][1][RTW89_ACMA][46] = 127, -+ [0][1][RTW89_CN][46] = 42, -+ [0][1][RTW89_UK][46] = 127, -+ [0][1][RTW89_FCC][48] = 127, -+ [0][1][RTW89_ETSI][48] = 127, -+ [0][1][RTW89_MKK][48] = 127, -+ [0][1][RTW89_IC][48] = 127, -+ [0][1][RTW89_KCC][48] = 127, -+ [0][1][RTW89_ACMA][48] = 127, -+ [0][1][RTW89_CN][48] = 127, -+ [0][1][RTW89_UK][48] = 127, -+ [0][1][RTW89_FCC][50] = 127, -+ [0][1][RTW89_ETSI][50] = 127, -+ [0][1][RTW89_MKK][50] = 127, -+ [0][1][RTW89_IC][50] = 127, -+ [0][1][RTW89_KCC][50] = 127, -+ [0][1][RTW89_ACMA][50] = 127, -+ [0][1][RTW89_CN][50] = 127, -+ [0][1][RTW89_UK][50] = 127, -+ [0][1][RTW89_FCC][52] = 127, -+ [0][1][RTW89_ETSI][52] = 127, -+ [0][1][RTW89_MKK][52] = 127, -+ [0][1][RTW89_IC][52] = 127, -+ [0][1][RTW89_KCC][52] = 127, -+ [0][1][RTW89_ACMA][52] = 127, -+ [0][1][RTW89_CN][52] = 127, -+ [0][1][RTW89_UK][52] = 127, -+ [1][0][RTW89_FCC][0] = 64, -+ [1][0][RTW89_ETSI][0] = 34, -+ [1][0][RTW89_MKK][0] = 38, -+ [1][0][RTW89_IC][0] = 38, -+ [1][0][RTW89_KCC][0] = 52, -+ [1][0][RTW89_ACMA][0] = 34, -+ [1][0][RTW89_CN][0] = 26, -+ [1][0][RTW89_UK][0] = 34, -+ [1][0][RTW89_FCC][2] = 66, -+ [1][0][RTW89_ETSI][2] = 34, -+ [1][0][RTW89_MKK][2] = 38, -+ [1][0][RTW89_IC][2] = 38, -+ [1][0][RTW89_KCC][2] = 52, -+ [1][0][RTW89_ACMA][2] = 34, -+ [1][0][RTW89_CN][2] = 26, -+ [1][0][RTW89_UK][2] = 34, -+ [1][0][RTW89_FCC][4] = 60, -+ [1][0][RTW89_ETSI][4] = 34, -+ [1][0][RTW89_MKK][4] = 36, -+ [1][0][RTW89_IC][4] = 38, -+ [1][0][RTW89_KCC][4] = 52, -+ [1][0][RTW89_ACMA][4] = 34, -+ [1][0][RTW89_CN][4] = 26, -+ [1][0][RTW89_UK][4] = 34, -+ [1][0][RTW89_FCC][6] = 60, -+ [1][0][RTW89_ETSI][6] = 34, -+ [1][0][RTW89_MKK][6] = 36, -+ [1][0][RTW89_IC][6] = 38, -+ [1][0][RTW89_KCC][6] = 32, -+ [1][0][RTW89_ACMA][6] = 34, -+ [1][0][RTW89_CN][6] = 26, -+ [1][0][RTW89_UK][6] = 34, -+ [1][0][RTW89_FCC][8] = 62, -+ [1][0][RTW89_ETSI][8] = 34, -+ [1][0][RTW89_MKK][8] = 38, -+ [1][0][RTW89_IC][8] = 62, -+ [1][0][RTW89_KCC][8] = 52, -+ [1][0][RTW89_ACMA][8] = 34, -+ [1][0][RTW89_CN][8] = 26, -+ [1][0][RTW89_UK][8] = 34, -+ [1][0][RTW89_FCC][10] = 62, -+ [1][0][RTW89_ETSI][10] = 34, -+ [1][0][RTW89_MKK][10] = 38, -+ [1][0][RTW89_IC][10] = 62, -+ [1][0][RTW89_KCC][10] = 52, -+ [1][0][RTW89_ACMA][10] = 34, -+ [1][0][RTW89_CN][10] = 26, -+ [1][0][RTW89_UK][10] = 34, -+ [1][0][RTW89_FCC][12] = 62, -+ [1][0][RTW89_ETSI][12] = 34, -+ [1][0][RTW89_MKK][12] = 38, -+ [1][0][RTW89_IC][12] = 62, -+ [1][0][RTW89_KCC][12] = 54, -+ [1][0][RTW89_ACMA][12] = 34, -+ [1][0][RTW89_CN][12] = 26, -+ [1][0][RTW89_UK][12] = 34, -+ [1][0][RTW89_FCC][14] = 62, -+ [1][0][RTW89_ETSI][14] = 34, -+ [1][0][RTW89_MKK][14] = 38, -+ [1][0][RTW89_IC][14] = 62, -+ [1][0][RTW89_KCC][14] = 54, -+ [1][0][RTW89_ACMA][14] = 34, -+ [1][0][RTW89_CN][14] = 26, -+ [1][0][RTW89_UK][14] = 34, -+ [1][0][RTW89_FCC][15] = 60, -+ [1][0][RTW89_ETSI][15] = 34, -+ [1][0][RTW89_MKK][15] = 58, -+ [1][0][RTW89_IC][15] = 60, -+ [1][0][RTW89_KCC][15] = 54, -+ [1][0][RTW89_ACMA][15] = 34, -+ [1][0][RTW89_CN][15] = 127, -+ [1][0][RTW89_UK][15] = 34, -+ [1][0][RTW89_FCC][17] = 60, -+ [1][0][RTW89_ETSI][17] = 34, -+ [1][0][RTW89_MKK][17] = 58, -+ [1][0][RTW89_IC][17] = 60, -+ [1][0][RTW89_KCC][17] = 54, -+ [1][0][RTW89_ACMA][17] = 34, -+ [1][0][RTW89_CN][17] = 127, -+ [1][0][RTW89_UK][17] = 34, -+ [1][0][RTW89_FCC][19] = 62, -+ [1][0][RTW89_ETSI][19] = 34, -+ [1][0][RTW89_MKK][19] = 58, -+ [1][0][RTW89_IC][19] = 62, -+ [1][0][RTW89_KCC][19] = 54, -+ [1][0][RTW89_ACMA][19] = 34, -+ [1][0][RTW89_CN][19] = 127, -+ [1][0][RTW89_UK][19] = 34, -+ [1][0][RTW89_FCC][21] = 62, -+ [1][0][RTW89_ETSI][21] = 34, -+ [1][0][RTW89_MKK][21] = 58, -+ [1][0][RTW89_IC][21] = 62, -+ [1][0][RTW89_KCC][21] = 54, -+ [1][0][RTW89_ACMA][21] = 34, -+ [1][0][RTW89_CN][21] = 127, -+ [1][0][RTW89_UK][21] = 34, -+ [1][0][RTW89_FCC][23] = 62, -+ [1][0][RTW89_ETSI][23] = 34, -+ [1][0][RTW89_MKK][23] = 58, -+ [1][0][RTW89_IC][23] = 62, -+ [1][0][RTW89_KCC][23] = 54, -+ [1][0][RTW89_ACMA][23] = 34, -+ [1][0][RTW89_CN][23] = 127, -+ [1][0][RTW89_UK][23] = 34, -+ [1][0][RTW89_FCC][25] = 62, -+ [1][0][RTW89_ETSI][25] = 34, -+ [1][0][RTW89_MKK][25] = 58, -+ [1][0][RTW89_IC][25] = 127, -+ [1][0][RTW89_KCC][25] = 54, -+ [1][0][RTW89_ACMA][25] = 127, -+ [1][0][RTW89_CN][25] = 127, -+ [1][0][RTW89_UK][25] = 34, -+ [1][0][RTW89_FCC][27] = 62, -+ [1][0][RTW89_ETSI][27] = 34, -+ [1][0][RTW89_MKK][27] = 58, -+ [1][0][RTW89_IC][27] = 127, -+ [1][0][RTW89_KCC][27] = 54, -+ [1][0][RTW89_ACMA][27] = 127, -+ [1][0][RTW89_CN][27] = 127, -+ [1][0][RTW89_UK][27] = 34, -+ [1][0][RTW89_FCC][29] = 62, -+ [1][0][RTW89_ETSI][29] = 34, -+ [1][0][RTW89_MKK][29] = 58, -+ [1][0][RTW89_IC][29] = 127, -+ [1][0][RTW89_KCC][29] = 54, -+ [1][0][RTW89_ACMA][29] = 127, -+ [1][0][RTW89_CN][29] = 127, -+ [1][0][RTW89_UK][29] = 34, -+ [1][0][RTW89_FCC][31] = 62, -+ [1][0][RTW89_ETSI][31] = 34, -+ [1][0][RTW89_MKK][31] = 58, -+ [1][0][RTW89_IC][31] = 64, -+ [1][0][RTW89_KCC][31] = 54, -+ [1][0][RTW89_ACMA][31] = 34, -+ [1][0][RTW89_CN][31] = 127, -+ [1][0][RTW89_UK][31] = 34, -+ [1][0][RTW89_FCC][33] = 64, -+ [1][0][RTW89_ETSI][33] = 34, -+ [1][0][RTW89_MKK][33] = 58, -+ [1][0][RTW89_IC][33] = 64, -+ [1][0][RTW89_KCC][33] = 54, -+ [1][0][RTW89_ACMA][33] = 34, -+ [1][0][RTW89_CN][33] = 127, -+ [1][0][RTW89_UK][33] = 34, -+ [1][0][RTW89_FCC][35] = 64, -+ [1][0][RTW89_ETSI][35] = 34, -+ [1][0][RTW89_MKK][35] = 58, -+ [1][0][RTW89_IC][35] = 64, -+ [1][0][RTW89_KCC][35] = 54, -+ [1][0][RTW89_ACMA][35] = 34, -+ [1][0][RTW89_CN][35] = 127, -+ [1][0][RTW89_UK][35] = 34, -+ [1][0][RTW89_FCC][37] = 76, -+ [1][0][RTW89_ETSI][37] = 127, -+ [1][0][RTW89_MKK][37] = 56, -+ [1][0][RTW89_IC][37] = 76, -+ [1][0][RTW89_KCC][37] = 54, -+ [1][0][RTW89_ACMA][37] = 62, -+ [1][0][RTW89_CN][37] = 127, -+ [1][0][RTW89_UK][37] = 62, -+ [1][0][RTW89_FCC][38] = 82, -+ [1][0][RTW89_ETSI][38] = 28, -+ [1][0][RTW89_MKK][38] = 127, -+ [1][0][RTW89_IC][38] = 82, -+ [1][0][RTW89_KCC][38] = 54, -+ [1][0][RTW89_ACMA][38] = 84, -+ [1][0][RTW89_CN][38] = 66, -+ [1][0][RTW89_UK][38] = 34, -+ [1][0][RTW89_FCC][40] = 82, -+ [1][0][RTW89_ETSI][40] = 28, -+ [1][0][RTW89_MKK][40] = 127, -+ [1][0][RTW89_IC][40] = 82, -+ [1][0][RTW89_KCC][40] = 54, -+ [1][0][RTW89_ACMA][40] = 84, -+ [1][0][RTW89_CN][40] = 66, -+ [1][0][RTW89_UK][40] = 34, -+ [1][0][RTW89_FCC][42] = 78, -+ [1][0][RTW89_ETSI][42] = 28, -+ [1][0][RTW89_MKK][42] = 127, -+ [1][0][RTW89_IC][42] = 78, -+ [1][0][RTW89_KCC][42] = 54, -+ [1][0][RTW89_ACMA][42] = 84, -+ [1][0][RTW89_CN][42] = 66, -+ [1][0][RTW89_UK][42] = 34, -+ [1][0][RTW89_FCC][44] = 82, -+ [1][0][RTW89_ETSI][44] = 28, -+ [1][0][RTW89_MKK][44] = 127, -+ [1][0][RTW89_IC][44] = 82, -+ [1][0][RTW89_KCC][44] = 54, -+ [1][0][RTW89_ACMA][44] = 84, -+ [1][0][RTW89_CN][44] = 66, -+ [1][0][RTW89_UK][44] = 34, -+ [1][0][RTW89_FCC][46] = 82, -+ [1][0][RTW89_ETSI][46] = 28, -+ [1][0][RTW89_MKK][46] = 127, -+ [1][0][RTW89_IC][46] = 82, -+ [1][0][RTW89_KCC][46] = 54, -+ [1][0][RTW89_ACMA][46] = 84, -+ [1][0][RTW89_CN][46] = 66, -+ [1][0][RTW89_UK][46] = 34, -+ [1][0][RTW89_FCC][48] = 52, -+ [1][0][RTW89_ETSI][48] = 127, -+ [1][0][RTW89_MKK][48] = 127, -+ [1][0][RTW89_IC][48] = 127, -+ [1][0][RTW89_KCC][48] = 127, -+ [1][0][RTW89_ACMA][48] = 127, -+ [1][0][RTW89_CN][48] = 127, -+ [1][0][RTW89_UK][48] = 127, -+ [1][0][RTW89_FCC][50] = 52, -+ [1][0][RTW89_ETSI][50] = 127, -+ [1][0][RTW89_MKK][50] = 127, -+ [1][0][RTW89_IC][50] = 127, -+ [1][0][RTW89_KCC][50] = 127, -+ [1][0][RTW89_ACMA][50] = 127, -+ [1][0][RTW89_CN][50] = 127, -+ [1][0][RTW89_UK][50] = 127, -+ [1][0][RTW89_FCC][52] = 50, -+ [1][0][RTW89_ETSI][52] = 127, -+ [1][0][RTW89_MKK][52] = 127, -+ [1][0][RTW89_IC][52] = 127, -+ [1][0][RTW89_KCC][52] = 127, -+ [1][0][RTW89_ACMA][52] = 127, -+ [1][0][RTW89_CN][52] = 127, -+ [1][0][RTW89_UK][52] = 127, -+ [1][1][RTW89_FCC][0] = 127, -+ [1][1][RTW89_ETSI][0] = 127, -+ [1][1][RTW89_MKK][0] = 127, -+ [1][1][RTW89_IC][0] = 127, -+ [1][1][RTW89_KCC][0] = 127, -+ [1][1][RTW89_ACMA][0] = 127, -+ [1][1][RTW89_CN][0] = 14, -+ [1][1][RTW89_UK][0] = 127, -+ [1][1][RTW89_FCC][2] = 127, -+ [1][1][RTW89_ETSI][2] = 127, -+ [1][1][RTW89_MKK][2] = 127, -+ [1][1][RTW89_IC][2] = 127, -+ [1][1][RTW89_KCC][2] = 127, -+ [1][1][RTW89_ACMA][2] = 127, -+ [1][1][RTW89_CN][2] = 14, -+ [1][1][RTW89_UK][2] = 127, -+ [1][1][RTW89_FCC][4] = 127, -+ [1][1][RTW89_ETSI][4] = 127, -+ [1][1][RTW89_MKK][4] = 127, -+ [1][1][RTW89_IC][4] = 127, -+ [1][1][RTW89_KCC][4] = 127, -+ [1][1][RTW89_ACMA][4] = 127, -+ [1][1][RTW89_CN][4] = 14, -+ [1][1][RTW89_UK][4] = 127, -+ [1][1][RTW89_FCC][6] = 127, -+ [1][1][RTW89_ETSI][6] = 127, -+ [1][1][RTW89_MKK][6] = 127, -+ [1][1][RTW89_IC][6] = 127, -+ [1][1][RTW89_KCC][6] = 127, -+ [1][1][RTW89_ACMA][6] = 127, -+ [1][1][RTW89_CN][6] = 14, -+ [1][1][RTW89_UK][6] = 127, -+ [1][1][RTW89_FCC][8] = 127, -+ [1][1][RTW89_ETSI][8] = 127, -+ [1][1][RTW89_MKK][8] = 127, -+ [1][1][RTW89_IC][8] = 127, -+ [1][1][RTW89_KCC][8] = 127, -+ [1][1][RTW89_ACMA][8] = 127, -+ [1][1][RTW89_CN][8] = 14, -+ [1][1][RTW89_UK][8] = 127, -+ [1][1][RTW89_FCC][10] = 127, -+ [1][1][RTW89_ETSI][10] = 127, -+ [1][1][RTW89_MKK][10] = 127, -+ [1][1][RTW89_IC][10] = 127, -+ [1][1][RTW89_KCC][10] = 127, -+ [1][1][RTW89_ACMA][10] = 127, -+ [1][1][RTW89_CN][10] = 14, -+ [1][1][RTW89_UK][10] = 127, -+ [1][1][RTW89_FCC][12] = 127, -+ [1][1][RTW89_ETSI][12] = 127, -+ [1][1][RTW89_MKK][12] = 127, -+ [1][1][RTW89_IC][12] = 127, -+ [1][1][RTW89_KCC][12] = 127, -+ [1][1][RTW89_ACMA][12] = 127, -+ [1][1][RTW89_CN][12] = 14, -+ [1][1][RTW89_UK][12] = 127, -+ [1][1][RTW89_FCC][14] = 127, -+ [1][1][RTW89_ETSI][14] = 127, -+ [1][1][RTW89_MKK][14] = 127, -+ [1][1][RTW89_IC][14] = 127, -+ [1][1][RTW89_KCC][14] = 127, -+ [1][1][RTW89_ACMA][14] = 127, -+ [1][1][RTW89_CN][14] = 14, -+ [1][1][RTW89_UK][14] = 127, -+ [1][1][RTW89_FCC][15] = 127, -+ [1][1][RTW89_ETSI][15] = 127, -+ [1][1][RTW89_MKK][15] = 127, -+ [1][1][RTW89_IC][15] = 127, -+ [1][1][RTW89_KCC][15] = 127, -+ [1][1][RTW89_ACMA][15] = 127, -+ [1][1][RTW89_CN][15] = 127, -+ [1][1][RTW89_UK][15] = 127, -+ [1][1][RTW89_FCC][17] = 127, -+ [1][1][RTW89_ETSI][17] = 127, -+ [1][1][RTW89_MKK][17] = 127, -+ [1][1][RTW89_IC][17] = 127, -+ [1][1][RTW89_KCC][17] = 127, -+ [1][1][RTW89_ACMA][17] = 127, -+ [1][1][RTW89_CN][17] = 127, -+ [1][1][RTW89_UK][17] = 127, -+ [1][1][RTW89_FCC][19] = 127, -+ [1][1][RTW89_ETSI][19] = 127, -+ [1][1][RTW89_MKK][19] = 127, -+ [1][1][RTW89_IC][19] = 127, -+ [1][1][RTW89_KCC][19] = 127, -+ [1][1][RTW89_ACMA][19] = 127, -+ [1][1][RTW89_CN][19] = 127, -+ [1][1][RTW89_UK][19] = 127, -+ [1][1][RTW89_FCC][21] = 127, -+ [1][1][RTW89_ETSI][21] = 127, -+ [1][1][RTW89_MKK][21] = 127, -+ [1][1][RTW89_IC][21] = 127, -+ [1][1][RTW89_KCC][21] = 127, -+ [1][1][RTW89_ACMA][21] = 127, -+ [1][1][RTW89_CN][21] = 127, -+ [1][1][RTW89_UK][21] = 127, -+ [1][1][RTW89_FCC][23] = 127, -+ [1][1][RTW89_ETSI][23] = 127, -+ [1][1][RTW89_MKK][23] = 127, -+ [1][1][RTW89_IC][23] = 127, -+ [1][1][RTW89_KCC][23] = 127, -+ [1][1][RTW89_ACMA][23] = 127, -+ [1][1][RTW89_CN][23] = 127, -+ [1][1][RTW89_UK][23] = 127, -+ [1][1][RTW89_FCC][25] = 127, -+ [1][1][RTW89_ETSI][25] = 127, -+ [1][1][RTW89_MKK][25] = 127, -+ [1][1][RTW89_IC][25] = 127, -+ [1][1][RTW89_KCC][25] = 127, -+ [1][1][RTW89_ACMA][25] = 127, -+ [1][1][RTW89_CN][25] = 127, -+ [1][1][RTW89_UK][25] = 127, -+ [1][1][RTW89_FCC][27] = 127, -+ [1][1][RTW89_ETSI][27] = 127, -+ [1][1][RTW89_MKK][27] = 127, -+ [1][1][RTW89_IC][27] = 127, -+ [1][1][RTW89_KCC][27] = 127, -+ [1][1][RTW89_ACMA][27] = 127, -+ [1][1][RTW89_CN][27] = 127, -+ [1][1][RTW89_UK][27] = 127, -+ [1][1][RTW89_FCC][29] = 127, -+ [1][1][RTW89_ETSI][29] = 127, -+ [1][1][RTW89_MKK][29] = 127, -+ [1][1][RTW89_IC][29] = 127, -+ [1][1][RTW89_KCC][29] = 127, -+ [1][1][RTW89_ACMA][29] = 127, -+ [1][1][RTW89_CN][29] = 127, -+ [1][1][RTW89_UK][29] = 127, -+ [1][1][RTW89_FCC][31] = 127, -+ [1][1][RTW89_ETSI][31] = 127, -+ [1][1][RTW89_MKK][31] = 127, -+ [1][1][RTW89_IC][31] = 127, -+ [1][1][RTW89_KCC][31] = 127, -+ [1][1][RTW89_ACMA][31] = 127, -+ [1][1][RTW89_CN][31] = 127, -+ [1][1][RTW89_UK][31] = 127, -+ [1][1][RTW89_FCC][33] = 127, -+ [1][1][RTW89_ETSI][33] = 127, -+ [1][1][RTW89_MKK][33] = 127, -+ [1][1][RTW89_IC][33] = 127, -+ [1][1][RTW89_KCC][33] = 127, -+ [1][1][RTW89_ACMA][33] = 127, -+ [1][1][RTW89_CN][33] = 127, -+ [1][1][RTW89_UK][33] = 127, -+ [1][1][RTW89_FCC][35] = 127, -+ [1][1][RTW89_ETSI][35] = 127, -+ [1][1][RTW89_MKK][35] = 127, -+ [1][1][RTW89_IC][35] = 127, -+ [1][1][RTW89_KCC][35] = 127, -+ [1][1][RTW89_ACMA][35] = 127, -+ [1][1][RTW89_CN][35] = 127, -+ [1][1][RTW89_UK][35] = 127, -+ [1][1][RTW89_FCC][37] = 127, -+ [1][1][RTW89_ETSI][37] = 127, -+ [1][1][RTW89_MKK][37] = 127, -+ [1][1][RTW89_IC][37] = 127, -+ [1][1][RTW89_KCC][37] = 127, -+ [1][1][RTW89_ACMA][37] = 127, -+ [1][1][RTW89_CN][37] = 127, -+ [1][1][RTW89_UK][37] = 127, -+ [1][1][RTW89_FCC][38] = 127, -+ [1][1][RTW89_ETSI][38] = 127, -+ [1][1][RTW89_MKK][38] = 127, -+ [1][1][RTW89_IC][38] = 127, -+ [1][1][RTW89_KCC][38] = 127, -+ [1][1][RTW89_ACMA][38] = 127, -+ [1][1][RTW89_CN][38] = 54, -+ [1][1][RTW89_UK][38] = 127, -+ [1][1][RTW89_FCC][40] = 127, -+ [1][1][RTW89_ETSI][40] = 127, -+ [1][1][RTW89_MKK][40] = 127, -+ [1][1][RTW89_IC][40] = 127, -+ [1][1][RTW89_KCC][40] = 127, -+ [1][1][RTW89_ACMA][40] = 127, -+ [1][1][RTW89_CN][40] = 54, -+ [1][1][RTW89_UK][40] = 127, -+ [1][1][RTW89_FCC][42] = 127, -+ [1][1][RTW89_ETSI][42] = 127, -+ [1][1][RTW89_MKK][42] = 127, -+ [1][1][RTW89_IC][42] = 127, -+ [1][1][RTW89_KCC][42] = 127, -+ [1][1][RTW89_ACMA][42] = 127, -+ [1][1][RTW89_CN][42] = 54, -+ [1][1][RTW89_UK][42] = 127, -+ [1][1][RTW89_FCC][44] = 127, -+ [1][1][RTW89_ETSI][44] = 127, -+ [1][1][RTW89_MKK][44] = 127, -+ [1][1][RTW89_IC][44] = 127, -+ [1][1][RTW89_KCC][44] = 127, -+ [1][1][RTW89_ACMA][44] = 127, -+ [1][1][RTW89_CN][44] = 54, -+ [1][1][RTW89_UK][44] = 127, -+ [1][1][RTW89_FCC][46] = 127, -+ [1][1][RTW89_ETSI][46] = 127, -+ [1][1][RTW89_MKK][46] = 127, -+ [1][1][RTW89_IC][46] = 127, -+ [1][1][RTW89_KCC][46] = 127, -+ [1][1][RTW89_ACMA][46] = 127, -+ [1][1][RTW89_CN][46] = 54, -+ [1][1][RTW89_UK][46] = 127, -+ [1][1][RTW89_FCC][48] = 127, -+ [1][1][RTW89_ETSI][48] = 127, -+ [1][1][RTW89_MKK][48] = 127, -+ [1][1][RTW89_IC][48] = 127, -+ [1][1][RTW89_KCC][48] = 127, -+ [1][1][RTW89_ACMA][48] = 127, -+ [1][1][RTW89_CN][48] = 127, -+ [1][1][RTW89_UK][48] = 127, -+ [1][1][RTW89_FCC][50] = 127, -+ [1][1][RTW89_ETSI][50] = 127, -+ [1][1][RTW89_MKK][50] = 127, -+ [1][1][RTW89_IC][50] = 127, -+ [1][1][RTW89_KCC][50] = 127, -+ [1][1][RTW89_ACMA][50] = 127, -+ [1][1][RTW89_CN][50] = 127, -+ [1][1][RTW89_UK][50] = 127, -+ [1][1][RTW89_FCC][52] = 127, -+ [1][1][RTW89_ETSI][52] = 127, -+ [1][1][RTW89_MKK][52] = 127, -+ [1][1][RTW89_IC][52] = 127, -+ [1][1][RTW89_KCC][52] = 127, -+ [1][1][RTW89_ACMA][52] = 127, -+ [1][1][RTW89_CN][52] = 127, -+ [1][1][RTW89_UK][52] = 127, -+ [2][0][RTW89_FCC][0] = 76, -+ [2][0][RTW89_ETSI][0] = 46, -+ [2][0][RTW89_MKK][0] = 48, -+ [2][0][RTW89_IC][0] = 50, -+ [2][0][RTW89_KCC][0] = 64, -+ [2][0][RTW89_ACMA][0] = 46, -+ [2][0][RTW89_CN][0] = 40, -+ [2][0][RTW89_UK][0] = 46, -+ [2][0][RTW89_FCC][2] = 72, -+ [2][0][RTW89_ETSI][2] = 46, -+ [2][0][RTW89_MKK][2] = 48, -+ [2][0][RTW89_IC][2] = 48, -+ [2][0][RTW89_KCC][2] = 64, -+ [2][0][RTW89_ACMA][2] = 46, -+ [2][0][RTW89_CN][2] = 40, -+ [2][0][RTW89_UK][2] = 46, -+ [2][0][RTW89_FCC][4] = 74, -+ [2][0][RTW89_ETSI][4] = 46, -+ [2][0][RTW89_MKK][4] = 48, -+ [2][0][RTW89_IC][4] = 48, -+ [2][0][RTW89_KCC][4] = 64, -+ [2][0][RTW89_ACMA][4] = 46, -+ [2][0][RTW89_CN][4] = 40, -+ [2][0][RTW89_UK][4] = 46, -+ [2][0][RTW89_FCC][6] = 74, -+ [2][0][RTW89_ETSI][6] = 46, -+ [2][0][RTW89_MKK][6] = 48, -+ [2][0][RTW89_IC][6] = 48, -+ [2][0][RTW89_KCC][6] = 40, -+ [2][0][RTW89_ACMA][6] = 46, -+ [2][0][RTW89_CN][6] = 40, -+ [2][0][RTW89_UK][6] = 46, -+ [2][0][RTW89_FCC][8] = 72, -+ [2][0][RTW89_ETSI][8] = 46, -+ [2][0][RTW89_MKK][8] = 48, -+ [2][0][RTW89_IC][8] = 64, -+ [2][0][RTW89_KCC][8] = 66, -+ [2][0][RTW89_ACMA][8] = 46, -+ [2][0][RTW89_CN][8] = 40, -+ [2][0][RTW89_UK][8] = 46, -+ [2][0][RTW89_FCC][10] = 72, -+ [2][0][RTW89_ETSI][10] = 46, -+ [2][0][RTW89_MKK][10] = 48, -+ [2][0][RTW89_IC][10] = 64, -+ [2][0][RTW89_KCC][10] = 66, -+ [2][0][RTW89_ACMA][10] = 46, -+ [2][0][RTW89_CN][10] = 40, -+ [2][0][RTW89_UK][10] = 46, -+ [2][0][RTW89_FCC][12] = 74, -+ [2][0][RTW89_ETSI][12] = 46, -+ [2][0][RTW89_MKK][12] = 48, -+ [2][0][RTW89_IC][12] = 64, -+ [2][0][RTW89_KCC][12] = 64, -+ [2][0][RTW89_ACMA][12] = 46, -+ [2][0][RTW89_CN][12] = 40, -+ [2][0][RTW89_UK][12] = 46, -+ [2][0][RTW89_FCC][14] = 80, -+ [2][0][RTW89_ETSI][14] = 46, -+ [2][0][RTW89_MKK][14] = 48, -+ [2][0][RTW89_IC][14] = 64, -+ [2][0][RTW89_KCC][14] = 64, -+ [2][0][RTW89_ACMA][14] = 46, -+ [2][0][RTW89_CN][14] = 40, -+ [2][0][RTW89_UK][14] = 46, -+ [2][0][RTW89_FCC][15] = 72, -+ [2][0][RTW89_ETSI][15] = 46, -+ [2][0][RTW89_MKK][15] = 70, -+ [2][0][RTW89_IC][15] = 72, -+ [2][0][RTW89_KCC][15] = 66, -+ [2][0][RTW89_ACMA][15] = 46, -+ [2][0][RTW89_CN][15] = 127, -+ [2][0][RTW89_UK][15] = 46, -+ [2][0][RTW89_FCC][17] = 72, -+ [2][0][RTW89_ETSI][17] = 46, -+ [2][0][RTW89_MKK][17] = 70, -+ [2][0][RTW89_IC][17] = 72, -+ [2][0][RTW89_KCC][17] = 66, -+ [2][0][RTW89_ACMA][17] = 46, -+ [2][0][RTW89_CN][17] = 127, -+ [2][0][RTW89_UK][17] = 46, -+ [2][0][RTW89_FCC][19] = 68, -+ [2][0][RTW89_ETSI][19] = 46, -+ [2][0][RTW89_MKK][19] = 70, -+ [2][0][RTW89_IC][19] = 68, -+ [2][0][RTW89_KCC][19] = 66, -+ [2][0][RTW89_ACMA][19] = 46, -+ [2][0][RTW89_CN][19] = 127, -+ [2][0][RTW89_UK][19] = 46, -+ [2][0][RTW89_FCC][21] = 68, -+ [2][0][RTW89_ETSI][21] = 46, -+ [2][0][RTW89_MKK][21] = 70, -+ [2][0][RTW89_IC][21] = 68, -+ [2][0][RTW89_KCC][21] = 66, -+ [2][0][RTW89_ACMA][21] = 46, -+ [2][0][RTW89_CN][21] = 127, -+ [2][0][RTW89_UK][21] = 46, -+ [2][0][RTW89_FCC][23] = 68, -+ [2][0][RTW89_ETSI][23] = 46, -+ [2][0][RTW89_MKK][23] = 70, -+ [2][0][RTW89_IC][23] = 68, -+ [2][0][RTW89_KCC][23] = 66, -+ [2][0][RTW89_ACMA][23] = 46, -+ [2][0][RTW89_CN][23] = 127, -+ [2][0][RTW89_UK][23] = 46, -+ [2][0][RTW89_FCC][25] = 68, -+ [2][0][RTW89_ETSI][25] = 46, -+ [2][0][RTW89_MKK][25] = 70, -+ [2][0][RTW89_IC][25] = 127, -+ [2][0][RTW89_KCC][25] = 66, -+ [2][0][RTW89_ACMA][25] = 127, -+ [2][0][RTW89_CN][25] = 127, -+ [2][0][RTW89_UK][25] = 46, -+ [2][0][RTW89_FCC][27] = 68, -+ [2][0][RTW89_ETSI][27] = 46, -+ [2][0][RTW89_MKK][27] = 70, -+ [2][0][RTW89_IC][27] = 127, -+ [2][0][RTW89_KCC][27] = 64, -+ [2][0][RTW89_ACMA][27] = 127, -+ [2][0][RTW89_CN][27] = 127, -+ [2][0][RTW89_UK][27] = 46, -+ [2][0][RTW89_FCC][29] = 68, -+ [2][0][RTW89_ETSI][29] = 46, -+ [2][0][RTW89_MKK][29] = 70, -+ [2][0][RTW89_IC][29] = 127, -+ [2][0][RTW89_KCC][29] = 64, -+ [2][0][RTW89_ACMA][29] = 127, -+ [2][0][RTW89_CN][29] = 127, -+ [2][0][RTW89_UK][29] = 46, -+ [2][0][RTW89_FCC][31] = 68, -+ [2][0][RTW89_ETSI][31] = 46, -+ [2][0][RTW89_MKK][31] = 70, -+ [2][0][RTW89_IC][31] = 70, -+ [2][0][RTW89_KCC][31] = 64, -+ [2][0][RTW89_ACMA][31] = 46, -+ [2][0][RTW89_CN][31] = 127, -+ [2][0][RTW89_UK][31] = 46, -+ [2][0][RTW89_FCC][33] = 70, -+ [2][0][RTW89_ETSI][33] = 46, -+ [2][0][RTW89_MKK][33] = 70, -+ [2][0][RTW89_IC][33] = 70, -+ [2][0][RTW89_KCC][33] = 64, -+ [2][0][RTW89_ACMA][33] = 46, -+ [2][0][RTW89_CN][33] = 127, -+ [2][0][RTW89_UK][33] = 46, -+ [2][0][RTW89_FCC][35] = 70, -+ [2][0][RTW89_ETSI][35] = 46, -+ [2][0][RTW89_MKK][35] = 70, -+ [2][0][RTW89_IC][35] = 70, -+ [2][0][RTW89_KCC][35] = 64, -+ [2][0][RTW89_ACMA][35] = 46, -+ [2][0][RTW89_CN][35] = 127, -+ [2][0][RTW89_UK][35] = 46, -+ [2][0][RTW89_FCC][37] = 84, -+ [2][0][RTW89_ETSI][37] = 127, -+ [2][0][RTW89_MKK][37] = 68, -+ [2][0][RTW89_IC][37] = 84, -+ [2][0][RTW89_KCC][37] = 66, -+ [2][0][RTW89_ACMA][37] = 74, -+ [2][0][RTW89_CN][37] = 127, -+ [2][0][RTW89_UK][37] = 74, -+ [2][0][RTW89_FCC][38] = 84, -+ [2][0][RTW89_ETSI][38] = 28, -+ [2][0][RTW89_MKK][38] = 127, -+ [2][0][RTW89_IC][38] = 84, -+ [2][0][RTW89_KCC][38] = 64, -+ [2][0][RTW89_ACMA][38] = 84, -+ [2][0][RTW89_CN][38] = 68, -+ [2][0][RTW89_UK][38] = 46, -+ [2][0][RTW89_FCC][40] = 84, -+ [2][0][RTW89_ETSI][40] = 28, -+ [2][0][RTW89_MKK][40] = 127, -+ [2][0][RTW89_IC][40] = 84, -+ [2][0][RTW89_KCC][40] = 64, -+ [2][0][RTW89_ACMA][40] = 84, -+ [2][0][RTW89_CN][40] = 68, -+ [2][0][RTW89_UK][40] = 46, -+ [2][0][RTW89_FCC][42] = 78, -+ [2][0][RTW89_ETSI][42] = 28, -+ [2][0][RTW89_MKK][42] = 127, -+ [2][0][RTW89_IC][42] = 78, -+ [2][0][RTW89_KCC][42] = 66, -+ [2][0][RTW89_ACMA][42] = 84, -+ [2][0][RTW89_CN][42] = 68, -+ [2][0][RTW89_UK][42] = 46, -+ [2][0][RTW89_FCC][44] = 80, -+ [2][0][RTW89_ETSI][44] = 28, -+ [2][0][RTW89_MKK][44] = 127, -+ [2][0][RTW89_IC][44] = 80, -+ [2][0][RTW89_KCC][44] = 66, -+ [2][0][RTW89_ACMA][44] = 84, -+ [2][0][RTW89_CN][44] = 68, -+ [2][0][RTW89_UK][44] = 46, -+ [2][0][RTW89_FCC][46] = 80, -+ [2][0][RTW89_ETSI][46] = 28, -+ [2][0][RTW89_MKK][46] = 127, -+ [2][0][RTW89_IC][46] = 80, -+ [2][0][RTW89_KCC][46] = 66, -+ [2][0][RTW89_ACMA][46] = 84, -+ [2][0][RTW89_CN][46] = 68, -+ [2][0][RTW89_UK][46] = 46, -+ [2][0][RTW89_FCC][48] = 62, -+ [2][0][RTW89_ETSI][48] = 127, -+ [2][0][RTW89_MKK][48] = 127, -+ [2][0][RTW89_IC][48] = 127, -+ [2][0][RTW89_KCC][48] = 127, -+ [2][0][RTW89_ACMA][48] = 127, -+ [2][0][RTW89_CN][48] = 127, -+ [2][0][RTW89_UK][48] = 127, -+ [2][0][RTW89_FCC][50] = 62, -+ [2][0][RTW89_ETSI][50] = 127, -+ [2][0][RTW89_MKK][50] = 127, -+ [2][0][RTW89_IC][50] = 127, -+ [2][0][RTW89_KCC][50] = 127, -+ [2][0][RTW89_ACMA][50] = 127, -+ [2][0][RTW89_CN][50] = 127, -+ [2][0][RTW89_UK][50] = 127, -+ [2][0][RTW89_FCC][52] = 60, -+ [2][0][RTW89_ETSI][52] = 127, -+ [2][0][RTW89_MKK][52] = 127, -+ [2][0][RTW89_IC][52] = 127, -+ [2][0][RTW89_KCC][52] = 127, -+ [2][0][RTW89_ACMA][52] = 127, -+ [2][0][RTW89_CN][52] = 127, -+ [2][0][RTW89_UK][52] = 127, -+ [2][1][RTW89_FCC][0] = 127, -+ [2][1][RTW89_ETSI][0] = 127, -+ [2][1][RTW89_MKK][0] = 127, -+ [2][1][RTW89_IC][0] = 127, -+ [2][1][RTW89_KCC][0] = 127, -+ [2][1][RTW89_ACMA][0] = 127, -+ [2][1][RTW89_CN][0] = 28, -+ [2][1][RTW89_UK][0] = 127, -+ [2][1][RTW89_FCC][2] = 127, -+ [2][1][RTW89_ETSI][2] = 127, -+ [2][1][RTW89_MKK][2] = 127, -+ [2][1][RTW89_IC][2] = 127, -+ [2][1][RTW89_KCC][2] = 127, -+ [2][1][RTW89_ACMA][2] = 127, -+ [2][1][RTW89_CN][2] = 28, -+ [2][1][RTW89_UK][2] = 127, -+ [2][1][RTW89_FCC][4] = 127, -+ [2][1][RTW89_ETSI][4] = 127, -+ [2][1][RTW89_MKK][4] = 127, -+ [2][1][RTW89_IC][4] = 127, -+ [2][1][RTW89_KCC][4] = 127, -+ [2][1][RTW89_ACMA][4] = 127, -+ [2][1][RTW89_CN][4] = 28, -+ [2][1][RTW89_UK][4] = 127, -+ [2][1][RTW89_FCC][6] = 127, -+ [2][1][RTW89_ETSI][6] = 127, -+ [2][1][RTW89_MKK][6] = 127, -+ [2][1][RTW89_IC][6] = 127, -+ [2][1][RTW89_KCC][6] = 127, -+ [2][1][RTW89_ACMA][6] = 127, -+ [2][1][RTW89_CN][6] = 28, -+ [2][1][RTW89_UK][6] = 127, -+ [2][1][RTW89_FCC][8] = 127, -+ [2][1][RTW89_ETSI][8] = 127, -+ [2][1][RTW89_MKK][8] = 127, -+ [2][1][RTW89_IC][8] = 127, -+ [2][1][RTW89_KCC][8] = 127, -+ [2][1][RTW89_ACMA][8] = 127, -+ [2][1][RTW89_CN][8] = 28, -+ [2][1][RTW89_UK][8] = 127, -+ [2][1][RTW89_FCC][10] = 127, -+ [2][1][RTW89_ETSI][10] = 127, -+ [2][1][RTW89_MKK][10] = 127, -+ [2][1][RTW89_IC][10] = 127, -+ [2][1][RTW89_KCC][10] = 127, -+ [2][1][RTW89_ACMA][10] = 127, -+ [2][1][RTW89_CN][10] = 28, -+ [2][1][RTW89_UK][10] = 127, -+ [2][1][RTW89_FCC][12] = 127, -+ [2][1][RTW89_ETSI][12] = 127, -+ [2][1][RTW89_MKK][12] = 127, -+ [2][1][RTW89_IC][12] = 127, -+ [2][1][RTW89_KCC][12] = 127, -+ [2][1][RTW89_ACMA][12] = 127, -+ [2][1][RTW89_CN][12] = 28, -+ [2][1][RTW89_UK][12] = 127, -+ [2][1][RTW89_FCC][14] = 127, -+ [2][1][RTW89_ETSI][14] = 127, -+ [2][1][RTW89_MKK][14] = 127, -+ [2][1][RTW89_IC][14] = 127, -+ [2][1][RTW89_KCC][14] = 127, -+ [2][1][RTW89_ACMA][14] = 127, -+ [2][1][RTW89_CN][14] = 28, -+ [2][1][RTW89_UK][14] = 127, -+ [2][1][RTW89_FCC][15] = 127, -+ [2][1][RTW89_ETSI][15] = 127, -+ [2][1][RTW89_MKK][15] = 127, -+ [2][1][RTW89_IC][15] = 127, -+ [2][1][RTW89_KCC][15] = 127, -+ [2][1][RTW89_ACMA][15] = 127, -+ [2][1][RTW89_CN][15] = 127, -+ [2][1][RTW89_UK][15] = 127, -+ [2][1][RTW89_FCC][17] = 127, -+ [2][1][RTW89_ETSI][17] = 127, -+ [2][1][RTW89_MKK][17] = 127, -+ [2][1][RTW89_IC][17] = 127, -+ [2][1][RTW89_KCC][17] = 127, -+ [2][1][RTW89_ACMA][17] = 127, -+ [2][1][RTW89_CN][17] = 127, -+ [2][1][RTW89_UK][17] = 127, -+ [2][1][RTW89_FCC][19] = 127, -+ [2][1][RTW89_ETSI][19] = 127, -+ [2][1][RTW89_MKK][19] = 127, -+ [2][1][RTW89_IC][19] = 127, -+ [2][1][RTW89_KCC][19] = 127, -+ [2][1][RTW89_ACMA][19] = 127, -+ [2][1][RTW89_CN][19] = 127, -+ [2][1][RTW89_UK][19] = 127, -+ [2][1][RTW89_FCC][21] = 127, -+ [2][1][RTW89_ETSI][21] = 127, -+ [2][1][RTW89_MKK][21] = 127, -+ [2][1][RTW89_IC][21] = 127, -+ [2][1][RTW89_KCC][21] = 127, -+ [2][1][RTW89_ACMA][21] = 127, -+ [2][1][RTW89_CN][21] = 127, -+ [2][1][RTW89_UK][21] = 127, -+ [2][1][RTW89_FCC][23] = 127, -+ [2][1][RTW89_ETSI][23] = 127, -+ [2][1][RTW89_MKK][23] = 127, -+ [2][1][RTW89_IC][23] = 127, -+ [2][1][RTW89_KCC][23] = 127, -+ [2][1][RTW89_ACMA][23] = 127, -+ [2][1][RTW89_CN][23] = 127, -+ [2][1][RTW89_UK][23] = 127, -+ [2][1][RTW89_FCC][25] = 127, -+ [2][1][RTW89_ETSI][25] = 127, -+ [2][1][RTW89_MKK][25] = 127, -+ [2][1][RTW89_IC][25] = 127, -+ [2][1][RTW89_KCC][25] = 127, -+ [2][1][RTW89_ACMA][25] = 127, -+ [2][1][RTW89_CN][25] = 127, -+ [2][1][RTW89_UK][25] = 127, -+ [2][1][RTW89_FCC][27] = 127, -+ [2][1][RTW89_ETSI][27] = 127, -+ [2][1][RTW89_MKK][27] = 127, -+ [2][1][RTW89_IC][27] = 127, -+ [2][1][RTW89_KCC][27] = 127, -+ [2][1][RTW89_ACMA][27] = 127, -+ [2][1][RTW89_CN][27] = 127, -+ [2][1][RTW89_UK][27] = 127, -+ [2][1][RTW89_FCC][29] = 127, -+ [2][1][RTW89_ETSI][29] = 127, -+ [2][1][RTW89_MKK][29] = 127, -+ [2][1][RTW89_IC][29] = 127, -+ [2][1][RTW89_KCC][29] = 127, -+ [2][1][RTW89_ACMA][29] = 127, -+ [2][1][RTW89_CN][29] = 127, -+ [2][1][RTW89_UK][29] = 127, -+ [2][1][RTW89_FCC][31] = 127, -+ [2][1][RTW89_ETSI][31] = 127, -+ [2][1][RTW89_MKK][31] = 127, -+ [2][1][RTW89_IC][31] = 127, -+ [2][1][RTW89_KCC][31] = 127, -+ [2][1][RTW89_ACMA][31] = 127, -+ [2][1][RTW89_CN][31] = 127, -+ [2][1][RTW89_UK][31] = 127, -+ [2][1][RTW89_FCC][33] = 127, -+ [2][1][RTW89_ETSI][33] = 127, -+ [2][1][RTW89_MKK][33] = 127, -+ [2][1][RTW89_IC][33] = 127, -+ [2][1][RTW89_KCC][33] = 127, -+ [2][1][RTW89_ACMA][33] = 127, -+ [2][1][RTW89_CN][33] = 127, -+ [2][1][RTW89_UK][33] = 127, -+ [2][1][RTW89_FCC][35] = 127, -+ [2][1][RTW89_ETSI][35] = 127, -+ [2][1][RTW89_MKK][35] = 127, -+ [2][1][RTW89_IC][35] = 127, -+ [2][1][RTW89_KCC][35] = 127, -+ [2][1][RTW89_ACMA][35] = 127, -+ [2][1][RTW89_CN][35] = 127, -+ [2][1][RTW89_UK][35] = 127, -+ [2][1][RTW89_FCC][37] = 127, -+ [2][1][RTW89_ETSI][37] = 127, -+ [2][1][RTW89_MKK][37] = 127, -+ [2][1][RTW89_IC][37] = 127, -+ [2][1][RTW89_KCC][37] = 127, -+ [2][1][RTW89_ACMA][37] = 127, -+ [2][1][RTW89_CN][37] = 127, -+ [2][1][RTW89_UK][37] = 127, -+ [2][1][RTW89_FCC][38] = 127, -+ [2][1][RTW89_ETSI][38] = 127, -+ [2][1][RTW89_MKK][38] = 127, -+ [2][1][RTW89_IC][38] = 127, -+ [2][1][RTW89_KCC][38] = 127, -+ [2][1][RTW89_ACMA][38] = 127, -+ [2][1][RTW89_CN][38] = 56, -+ [2][1][RTW89_UK][38] = 127, -+ [2][1][RTW89_FCC][40] = 127, -+ [2][1][RTW89_ETSI][40] = 127, -+ [2][1][RTW89_MKK][40] = 127, -+ [2][1][RTW89_IC][40] = 127, -+ [2][1][RTW89_KCC][40] = 127, -+ [2][1][RTW89_ACMA][40] = 127, -+ [2][1][RTW89_CN][40] = 56, -+ [2][1][RTW89_UK][40] = 127, -+ [2][1][RTW89_FCC][42] = 127, -+ [2][1][RTW89_ETSI][42] = 127, -+ [2][1][RTW89_MKK][42] = 127, -+ [2][1][RTW89_IC][42] = 127, -+ [2][1][RTW89_KCC][42] = 127, -+ [2][1][RTW89_ACMA][42] = 127, -+ [2][1][RTW89_CN][42] = 56, -+ [2][1][RTW89_UK][42] = 127, -+ [2][1][RTW89_FCC][44] = 127, -+ [2][1][RTW89_ETSI][44] = 127, -+ [2][1][RTW89_MKK][44] = 127, -+ [2][1][RTW89_IC][44] = 127, -+ [2][1][RTW89_KCC][44] = 127, -+ [2][1][RTW89_ACMA][44] = 127, -+ [2][1][RTW89_CN][44] = 56, -+ [2][1][RTW89_UK][44] = 127, -+ [2][1][RTW89_FCC][46] = 127, -+ [2][1][RTW89_ETSI][46] = 127, -+ [2][1][RTW89_MKK][46] = 127, -+ [2][1][RTW89_IC][46] = 127, -+ [2][1][RTW89_KCC][46] = 127, -+ [2][1][RTW89_ACMA][46] = 127, -+ [2][1][RTW89_CN][46] = 56, -+ [2][1][RTW89_UK][46] = 127, -+ [2][1][RTW89_FCC][48] = 127, -+ [2][1][RTW89_ETSI][48] = 127, -+ [2][1][RTW89_MKK][48] = 127, -+ [2][1][RTW89_IC][48] = 127, -+ [2][1][RTW89_KCC][48] = 127, -+ [2][1][RTW89_ACMA][48] = 127, -+ [2][1][RTW89_CN][48] = 127, -+ [2][1][RTW89_UK][48] = 127, -+ [2][1][RTW89_FCC][50] = 127, -+ [2][1][RTW89_ETSI][50] = 127, -+ [2][1][RTW89_MKK][50] = 127, -+ [2][1][RTW89_IC][50] = 127, -+ [2][1][RTW89_KCC][50] = 127, -+ [2][1][RTW89_ACMA][50] = 127, -+ [2][1][RTW89_CN][50] = 127, -+ [2][1][RTW89_UK][50] = 127, -+ [2][1][RTW89_FCC][52] = 127, -+ [2][1][RTW89_ETSI][52] = 127, -+ [2][1][RTW89_MKK][52] = 127, -+ [2][1][RTW89_IC][52] = 127, -+ [2][1][RTW89_KCC][52] = 127, -+ [2][1][RTW89_ACMA][52] = 127, -+ [2][1][RTW89_CN][52] = 127, -+ [2][1][RTW89_UK][52] = 127, -+}; -+ -+const struct rtw89_phy_table rtw89_8851b_phy_bb_table = { -+ .regs = rtw89_8851b_phy_bb_regs, -+ .n_regs = ARRAY_SIZE(rtw89_8851b_phy_bb_regs), -+ .rf_path = 0, /* don't care */ -+}; -+ -+const struct rtw89_phy_table rtw89_8851b_phy_bb_gain_table = { -+ .regs = rtw89_8851b_phy_bb_reg_gain, -+ .n_regs = ARRAY_SIZE(rtw89_8851b_phy_bb_reg_gain), -+ .rf_path = 0, /* don't care */ -+}; -+ -+const struct rtw89_phy_table rtw89_8851b_phy_radioa_table = { -+ .regs = rtw89_8851b_phy_radioa_regs, -+ .n_regs = ARRAY_SIZE(rtw89_8851b_phy_radioa_regs), -+ .rf_path = RF_PATH_A, -+ .config = rtw89_phy_config_rf_reg_v1, -+}; -+ -+const struct rtw89_phy_table rtw89_8851b_phy_nctl_table = { -+ .regs = rtw89_8851b_phy_nctl_regs, -+ .n_regs = ARRAY_SIZE(rtw89_8851b_phy_nctl_regs), -+ .rf_path = 0, /* don't care */ -+}; -+ -+const struct rtw89_txpwr_table rtw89_8851b_byr_table = { -+ .data = rtw89_8851b_txpwr_byrate, -+ .size = ARRAY_SIZE(rtw89_8851b_txpwr_byrate), -+ .load = rtw89_phy_load_txpwr_byrate, -+}; -+ -+const struct rtw89_txpwr_track_cfg rtw89_8851b_trk_cfg = { -+ .delta_swingidx_5ga_n = _txpwr_track_delta_swingidx_5ga_n, -+ .delta_swingidx_5ga_p = _txpwr_track_delta_swingidx_5ga_p, -+ .delta_swingidx_2ga_n = _txpwr_track_delta_swingidx_2ga_n, -+ .delta_swingidx_2ga_p = _txpwr_track_delta_swingidx_2ga_p, -+ .delta_swingidx_2g_cck_a_n = _txpwr_track_delta_swingidx_2g_cck_a_n, -+ .delta_swingidx_2g_cck_a_p = _txpwr_track_delta_swingidx_2g_cck_a_p, -+}; -+ -+const struct rtw89_rfe_parms rtw89_8851b_dflt_parms = { -+ .rule_2ghz = { -+ .lmt = &rtw89_8851b_txpwr_lmt_2g, -+ .lmt_ru = &rtw89_8851b_txpwr_lmt_ru_2g, -+ }, -+ .rule_5ghz = { -+ .lmt = &rtw89_8851b_txpwr_lmt_5g, -+ .lmt_ru = &rtw89_8851b_txpwr_lmt_ru_5g, -+ }, -+}; -+ -+static const struct rtw89_rfe_parms rtw89_8851b_rfe_parms_type2 = { -+ .rule_2ghz = { -+ .lmt = &rtw89_8851b_txpwr_lmt_2g_type2, -+ .lmt_ru = &rtw89_8851b_txpwr_lmt_ru_2g_type2, -+ }, -+ .rule_5ghz = { -+ .lmt = &rtw89_8851b_txpwr_lmt_5g_type2, -+ .lmt_ru = &rtw89_8851b_txpwr_lmt_ru_5g_type2, -+ }, -+}; -+ -+const struct rtw89_rfe_parms_conf rtw89_8851b_rfe_parms_conf[] = { -+ { -+ .rfe_parms = &rtw89_8851b_rfe_parms_type2, -+ .rfe_type = 2, -+ }, -+ {}, -+}; diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-045-wifi-rtw89-8851b-add-tables-for-RFK.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-045-wifi-rtw89-8851b-add-tables-for-RFK.patch deleted file mode 100644 index 1f1701f32..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-045-wifi-rtw89-8851b-add-tables-for-RFK.patch +++ /dev/null @@ -1,596 +0,0 @@ -From 8c36cf0df434e17c9c39a42f87319a6aaca89b05 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sat, 1 Apr 2023 22:25:48 +0800 -Subject: [PATCH 045/136] wifi: rtw89: 8851b: add tables for RFK - -These tables are used by RF calibrations to assist to configure PHY and -RF registers. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230401142548.55466-4-pkshih@realtek.com ---- - .../realtek/rtw89/rtw8851b_rfk_table.c | 534 ++++++++++++++++++ - .../realtek/rtw89/rtw8851b_rfk_table.h | 38 ++ - 2 files changed, 572 insertions(+) - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8851b_rfk_table.c - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8851b_rfk_table.h - ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk_table.c -@@ -0,0 +1,534 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2022-2023 Realtek Corporation -+ */ -+ -+#include "rtw8851b_rfk_table.h" -+ -+static const struct rtw89_reg5_def rtw8851b_dadck_setup_defs[] = { -+ RTW89_DECL_RFK_WM(0xc210, 0x003fc000, 0x80), -+ RTW89_DECL_RFK_WM(0xc224, 0x003fc000, 0x80), -+ RTW89_DECL_RFK_WM(0xc0f8, 0x30000000, 0x3), -+ RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1), -+ RTW89_DECL_RFK_WM(0x030c, 0x1f000000, 0x1f), -+ RTW89_DECL_RFK_WM(0x032c, 0xc0000000, 0x0), -+ RTW89_DECL_RFK_WM(0x032c, BIT(22), 0x0), -+ RTW89_DECL_RFK_WM(0x032c, BIT(22), 0x1), -+ RTW89_DECL_RFK_WM(0x032c, BIT(16), 0x0), -+ RTW89_DECL_RFK_WM(0x032c, BIT(20), 0x1), -+ RTW89_DECL_RFK_WM(0x030c, 0x0f000000, 0x3), -+ RTW89_DECL_RFK_WM(0xc0f4, BIT(2), 0x0), -+ RTW89_DECL_RFK_WM(0xc0f4, BIT(4), 0x0), -+ RTW89_DECL_RFK_WM(0xc0f4, BIT(11), 0x1), -+ RTW89_DECL_RFK_WM(0xc0f4, BIT(11), 0x0), -+ RTW89_DECL_RFK_DELAY(1), -+ RTW89_DECL_RFK_WM(0xc0f4, 0x300, 0x1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_dadck_setup_defs); -+ -+static const struct rtw89_reg5_def rtw8851b_dadck_post_defs[] = { -+ RTW89_DECL_RFK_WM(0x032c, BIT(16), 0x1), -+ RTW89_DECL_RFK_WM(0x032c, BIT(20), 0x0), -+ RTW89_DECL_RFK_WM(0x030c, 0x1f000000, 0xc), -+ RTW89_DECL_RFK_WM(0x032c, 0xc0000000, 0x1), -+ RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x0), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_dadck_post_defs); -+ -+static const struct rtw89_reg5_def rtw8851b_dack_s0_1_defs[] = { -+ RTW89_DECL_RFK_WM(0x12a0, BIT(15), 0x1), -+ RTW89_DECL_RFK_WM(0x12a0, 0x7000, 0x3), -+ RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1), -+ RTW89_DECL_RFK_WM(0x030c, BIT(28), 0x1), -+ RTW89_DECL_RFK_WM(0x032c, 0x80000000, 0x0), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_dack_s0_1_defs); -+ -+static const struct rtw89_reg5_def rtw8851b_dack_s0_2_defs[] = { -+ RTW89_DECL_RFK_WM(0xc004, BIT(0), 0x0), -+ RTW89_DECL_RFK_WM(0x12a0, BIT(15), 0x0), -+ RTW89_DECL_RFK_WM(0x12a0, 0x7000, 0x7), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_dack_s0_2_defs); -+ -+static const struct rtw89_reg5_def rtw8851b_dack_manual_off_defs[] = { -+ RTW89_DECL_RFK_WM(0xc0f8, 0x30000000, 0x0), -+ RTW89_DECL_RFK_WM(0xc210, BIT(0), 0x0), -+ RTW89_DECL_RFK_WM(0xc224, BIT(0), 0x0), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_dack_manual_off_defs); -+ -+static const struct rtw89_reg5_def rtw8851b_iqk_rxclk_80_defs[] = { -+ RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x0101), -+ RTW89_DECL_RFK_WM(0x5670, 0x00002000, 0x1), -+ RTW89_DECL_RFK_WM(0x12a0, 0x00080000, 0x1), -+ RTW89_DECL_RFK_WM(0x12a0, 0x00070000, 0x2), -+ RTW89_DECL_RFK_WM(0x5670, 0x60000000, 0x1), -+ RTW89_DECL_RFK_WM(0xc0d4, 0x00000780, 0x8), -+ RTW89_DECL_RFK_WM(0xc0d4, 0x00007800, 0x2), -+ RTW89_DECL_RFK_WM(0xc0d4, 0x0c000000, 0x2), -+ RTW89_DECL_RFK_WM(0xc0d8, 0x000001e0, 0x5), -+ RTW89_DECL_RFK_WM(0xc0c4, 0x003e0000, 0xf), -+ RTW89_DECL_RFK_WM(0xc0ec, 0x00006000, 0x0), -+ RTW89_DECL_RFK_WM(0x12b8, 0x40000000, 0x1), -+ RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x0f), -+ RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x03), -+ RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x0001), -+ RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x0041), -+ RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x1101), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_iqk_rxclk_80_defs); -+ -+static const struct rtw89_reg5_def rtw8851b_iqk_rxclk_others_defs[] = { -+ RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x0101), -+ RTW89_DECL_RFK_WM(0x5670, 0x00002000, 0x1), -+ RTW89_DECL_RFK_WM(0x12a0, 0x00080000, 0x1), -+ RTW89_DECL_RFK_WM(0x12a0, 0x00070000, 0x2), -+ RTW89_DECL_RFK_WM(0x5670, 0x60000000, 0x0), -+ RTW89_DECL_RFK_WM(0xc0d4, 0x00000780, 0x8), -+ RTW89_DECL_RFK_WM(0xc0d4, 0x00007800, 0x2), -+ RTW89_DECL_RFK_WM(0xc0d4, 0x0c000000, 0x2), -+ RTW89_DECL_RFK_WM(0xc0d8, 0x000001e0, 0x5), -+ RTW89_DECL_RFK_WM(0xc0c4, 0x003e0000, 0xf), -+ RTW89_DECL_RFK_WM(0xc0ec, 0x00006000, 0x2), -+ RTW89_DECL_RFK_WM(0x12b8, 0x40000000, 0x1), -+ RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x0f), -+ RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x03), -+ RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x0001), -+ RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x0041), -+ RTW89_DECL_RFK_WM(0x20fc, 0xffff0000, 0x1101), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_iqk_rxclk_others_defs); -+ -+static const struct rtw89_reg5_def rtw8851b_iqk_txk_2ghz_defs[] = { -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x51, 0x80000, 0x0), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x51, 0x00800, 0x0), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x52, 0x00800, 0x0), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x55, 0x0001f, 0x4), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0xef, 0x00004, 0x1), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x00, 0xffff0, 0x403e), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x11, 0x00003, 0x0), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x11, 0x00070, 0x6), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x11, 0x1f000, 0x10), -+ RTW89_DECL_RFK_DELAY(1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_iqk_txk_2ghz_defs); -+ -+static const struct rtw89_reg5_def rtw8851b_iqk_txk_5ghz_defs[] = { -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x60, 0x00007, 0x0), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x55, 0x0001f, 0x4), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0xef, 0x00004, 0x1), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x00, 0xffff0, 0x403e), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x11, 0x00003, 0x0), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x11, 0x00070, 0x7), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x11, 0x1f000, 0x7), -+ RTW89_DECL_RFK_DELAY(1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_iqk_txk_5ghz_defs); -+ -+static const struct rtw89_reg5_def rtw8851b_iqk_afebb_restore_defs[] = { -+ RTW89_DECL_RFK_WM(0x12b8, 0x40000000, 0x0), -+ RTW89_DECL_RFK_WM(0x20fc, 0x00010000, 0x1), -+ RTW89_DECL_RFK_WM(0x20fc, 0x00100000, 0x0), -+ RTW89_DECL_RFK_WM(0x20fc, 0x01000000, 0x1), -+ RTW89_DECL_RFK_WM(0x20fc, 0x10000000, 0x0), -+ RTW89_DECL_RFK_WM(0x5670, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x12a0, 0x000ff000, 0x00), -+ RTW89_DECL_RFK_WM(0x20fc, 0x00010000, 0x0), -+ RTW89_DECL_RFK_WM(0x20fc, 0x01000000, 0x0), -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x10005, 0x00001, 0x1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_iqk_afebb_restore_defs); -+ -+static const struct rtw89_reg5_def rtw8851b_iqk_macbb_defs[] = { -+ RTW89_DECL_RFK_WRF(RF_PATH_A, 0x10005, 0x00001, 0x0), -+ RTW89_DECL_RFK_WM(0x20fc, 0x00010000, 0x1), -+ RTW89_DECL_RFK_WM(0x20fc, 0x00100000, 0x0), -+ RTW89_DECL_RFK_WM(0x20fc, 0x01000000, 0x1), -+ RTW89_DECL_RFK_WM(0x20fc, 0x10000000, 0x0), -+ RTW89_DECL_RFK_WM(0x5670, MASKDWORD, 0xf801fffd), -+ RTW89_DECL_RFK_WM(0x5670, 0x00004000, 0x1), -+ RTW89_DECL_RFK_WM(0x12a0, 0x00008000, 0x1), -+ RTW89_DECL_RFK_WM(0x5670, 0x80000000, 0x1), -+ RTW89_DECL_RFK_WM(0x12a0, 0x00007000, 0x7), -+ RTW89_DECL_RFK_WM(0x5670, 0x00002000, 0x1), -+ RTW89_DECL_RFK_WM(0x12a0, 0x00080000, 0x1), -+ RTW89_DECL_RFK_WM(0x12a0, 0x00070000, 0x3), -+ RTW89_DECL_RFK_WM(0x5670, 0x60000000, 0x2), -+ RTW89_DECL_RFK_WM(0xc0d4, 0x00000780, 0x9), -+ RTW89_DECL_RFK_WM(0xc0d4, 0x00007800, 0x1), -+ RTW89_DECL_RFK_WM(0xc0d4, 0x0c000000, 0x0), -+ RTW89_DECL_RFK_WM(0xc0d8, 0x000001e0, 0x3), -+ RTW89_DECL_RFK_WM(0xc0c4, 0x003e0000, 0xa), -+ RTW89_DECL_RFK_WM(0xc0ec, 0x00006000, 0x0), -+ RTW89_DECL_RFK_WM(0xc0e8, 0x00000040, 0x1), -+ RTW89_DECL_RFK_WM(0x12b8, 0x40000000, 0x1), -+ RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x1f), -+ RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x13), -+ RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x0001), -+ RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x0041), -+ RTW89_DECL_RFK_WM(0x20fc, 0x00100000, 0x1), -+ RTW89_DECL_RFK_WM(0x20fc, 0x10000000, 0x1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_iqk_macbb_defs); -+ -+static const struct rtw89_reg5_def rtw8851b_iqk_bb_afe_defs[] = { -+ RTW89_DECL_RFK_WM(0x5670, 0x00004000, 0x1), -+ RTW89_DECL_RFK_WM(0x12a0, 0x00008000, 0x1), -+ RTW89_DECL_RFK_WM(0x5670, 0x80000000, 0x1), -+ RTW89_DECL_RFK_WM(0x12a0, 0x00007000, 0x7), -+ RTW89_DECL_RFK_WM(0x5670, 0x00002000, 0x1), -+ RTW89_DECL_RFK_WM(0x12a0, 0x00080000, 0x1), -+ RTW89_DECL_RFK_WM(0x12a0, 0x00070000, 0x3), -+ RTW89_DECL_RFK_WM(0x5670, 0x60000000, 0x2), -+ RTW89_DECL_RFK_WM(0xc0d4, 0x00000780, 0x9), -+ RTW89_DECL_RFK_WM(0xc0d4, 0x00007800, 0x1), -+ RTW89_DECL_RFK_WM(0xc0d4, 0x0c000000, 0x0), -+ RTW89_DECL_RFK_WM(0xc0d8, 0x000001e0, 0x3), -+ RTW89_DECL_RFK_WM(0xc0c4, 0x003e0000, 0xa), -+ RTW89_DECL_RFK_WM(0xc0ec, 0x00006000, 0x0), -+ RTW89_DECL_RFK_WM(0xc0e8, 0x00000040, 0x1), -+ RTW89_DECL_RFK_WM(0x12b8, 0x40000000, 0x1), -+ RTW89_DECL_RFK_WM(0x030c, MASKBYTE3, 0x1f), -+ RTW89_DECL_RFK_WM(0x030c, MASKBYTE3, 0x13), -+ RTW89_DECL_RFK_WM(0x032c, MASKHWORD, 0x0001), -+ RTW89_DECL_RFK_WM(0x032c, MASKHWORD, 0x0041), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_iqk_bb_afe_defs); -+ -+static const struct rtw89_reg5_def rtw8851b_tssi_sys_defs[] = { -+ RTW89_DECL_RFK_WM(0x12bc, 0x000ffff0, 0xb5b5), -+ RTW89_DECL_RFK_WM(0x32bc, 0x000ffff0, 0xb5b5), -+ RTW89_DECL_RFK_WM(0x0300, 0xff000000, 0x16), -+ RTW89_DECL_RFK_WM(0x0304, 0x0000ffff, 0x1f19), -+ RTW89_DECL_RFK_WM(0x0308, 0xff000000, 0x1c), -+ RTW89_DECL_RFK_WM(0x0314, 0xffff0000, 0x2041), -+ RTW89_DECL_RFK_WM(0x0318, 0xffffffff, 0x20012041), -+ RTW89_DECL_RFK_WM(0x0324, 0xffff0000, 0x2001), -+ RTW89_DECL_RFK_WM(0x0020, 0x00006000, 0x3), -+ RTW89_DECL_RFK_WM(0x0024, 0x00006000, 0x3), -+ RTW89_DECL_RFK_WM(0x0704, 0xffff0000, 0x601e), -+ RTW89_DECL_RFK_WM(0x2704, 0xffff0000, 0x601e), -+ RTW89_DECL_RFK_WM(0x0700, 0xf0000000, 0x4), -+ RTW89_DECL_RFK_WM(0x2700, 0xf0000000, 0x4), -+ RTW89_DECL_RFK_WM(0x0650, 0x3c000000, 0x0), -+ RTW89_DECL_RFK_WM(0x2650, 0x3c000000, 0x0), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_tssi_sys_defs); -+ -+static const struct rtw89_reg5_def rtw8851b_tssi_sys_a_defs_2g[] = { -+ RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x33), -+ RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x33), -+ RTW89_DECL_RFK_WM(0x58f8, 0x40000000, 0x1), -+ RTW89_DECL_RFK_WM(0x5814, 0x20000000, 0x0), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_tssi_sys_a_defs_2g); -+ -+static const struct rtw89_reg5_def rtw8851b_tssi_sys_a_defs_5g[] = { -+ RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x44), -+ RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x44), -+ RTW89_DECL_RFK_WM(0x58f8, 0x40000000, 0x0), -+ RTW89_DECL_RFK_WM(0x5814, 0x20000000, 0x0), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_tssi_sys_a_defs_5g); -+ -+static const struct rtw89_reg5_def rtw8851b_tssi_init_txpwr_defs_a[] = { -+ RTW89_DECL_RFK_WM(0x566c, 0x00001000, 0x0), -+ RTW89_DECL_RFK_WM(0x5800, 0xffffffff, 0x003f807f), -+ RTW89_DECL_RFK_WM(0x580c, 0x0000007f, 0x40), -+ RTW89_DECL_RFK_WM(0x580c, 0x0fffff00, 0x00040), -+ RTW89_DECL_RFK_WM(0x5810, 0xffffffff, 0x59010000), -+ RTW89_DECL_RFK_WM(0x5814, 0x01ffffff, 0x026d000), -+ RTW89_DECL_RFK_WM(0x5814, 0xf8000000, 0x00), -+ RTW89_DECL_RFK_WM(0x5818, 0x00ffffff, 0x2c18e8), -+ RTW89_DECL_RFK_WM(0x5818, 0x07000000, 0x0), -+ RTW89_DECL_RFK_WM(0x5818, 0xf0000000, 0x0), -+ RTW89_DECL_RFK_WM(0x581c, 0x3fffffff, 0x3dc80280), -+ RTW89_DECL_RFK_WM(0x5820, 0xffffffff, 0x00000080), -+ RTW89_DECL_RFK_WM(0x58e8, 0x0000003f, 0x04), -+ RTW89_DECL_RFK_WM(0x580c, 0x10000000, 0x1), -+ RTW89_DECL_RFK_WM(0x580c, 0x40000000, 0x1), -+ RTW89_DECL_RFK_WM(0x5834, 0x3fffffff, 0x000115f2), -+ RTW89_DECL_RFK_WM(0x5838, 0x7fffffff, 0x0000121), -+ RTW89_DECL_RFK_WM(0x5854, 0x3fffffff, 0x000115f2), -+ RTW89_DECL_RFK_WM(0x5858, 0x7fffffff, 0x0000121), -+ RTW89_DECL_RFK_WM(0x5860, 0x80000000, 0x0), -+ RTW89_DECL_RFK_WM(0x5864, 0x07ffffff, 0x00801ff), -+ RTW89_DECL_RFK_WM(0x5898, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x589c, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x58a4, 0x000000ff, 0x16), -+ RTW89_DECL_RFK_WM(0x58b0, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x58b4, 0x7fffffff, 0x0a002000), -+ RTW89_DECL_RFK_WM(0x58b8, 0x7fffffff, 0x00007628), -+ RTW89_DECL_RFK_WM(0x58bc, 0x07ffffff, 0x7a7807f), -+ RTW89_DECL_RFK_WM(0x58c0, 0xfffe0000, 0x003f), -+ RTW89_DECL_RFK_WM(0x58c4, 0xffffffff, 0x0003ffff), -+ RTW89_DECL_RFK_WM(0x58c8, 0x00ffffff, 0x000000), -+ RTW89_DECL_RFK_WM(0x58c8, 0xf0000000, 0x0), -+ RTW89_DECL_RFK_WM(0x58cc, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x58d0, 0x07ffffff, 0x2008101), -+ RTW89_DECL_RFK_WM(0x58d4, 0x000000ff, 0x00), -+ RTW89_DECL_RFK_WM(0x58d4, 0x0003fe00, 0x0ff), -+ RTW89_DECL_RFK_WM(0x58d4, 0x07fc0000, 0x100), -+ RTW89_DECL_RFK_WM(0x58d8, 0xffffffff, 0x8008016c), -+ RTW89_DECL_RFK_WM(0x58dc, 0x0001ffff, 0x0807f), -+ RTW89_DECL_RFK_WM(0x58dc, 0xfff00000, 0x800), -+ RTW89_DECL_RFK_WM(0x58f0, 0x0003ffff, 0x001ff), -+ RTW89_DECL_RFK_WM(0x58f4, 0x000fffff, 0x00000), -+ RTW89_DECL_RFK_WM(0x58f8, 0x000fffff, 0x00000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_tssi_init_txpwr_defs_a); -+ -+static const struct rtw89_reg5_def rtw8851b_tssi_init_txpwr_he_tb_defs_a[] = { -+ RTW89_DECL_RFK_WM(0x58a0, MASKDWORD, 0x000000fe), -+ RTW89_DECL_RFK_WM(0x58e4, 0x0000007f, 0x1f), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_tssi_init_txpwr_he_tb_defs_a); -+ -+static const struct rtw89_reg5_def rtw8851b_tssi_dck_defs_a[] = { -+ RTW89_DECL_RFK_WM(0x580c, 0x0fff0000, 0x000), -+ RTW89_DECL_RFK_WM(0x5814, 0x00001000, 0x1), -+ RTW89_DECL_RFK_WM(0x5814, 0x00002000, 0x1), -+ RTW89_DECL_RFK_WM(0x5814, 0x00004000, 0x1), -+ RTW89_DECL_RFK_WM(0x5814, 0x00038000, 0x3), -+ RTW89_DECL_RFK_WM(0x5814, 0x003c0000, 0x5), -+ RTW89_DECL_RFK_WM(0x5814, 0x18000000, 0x0), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_tssi_dck_defs_a); -+ -+static const struct rtw89_reg5_def rtw8851b_tssi_dac_gain_defs_a[] = { -+ RTW89_DECL_RFK_WM(0x58b0, 0x00000fff, 0x000), -+ RTW89_DECL_RFK_WM(0x5a00, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a04, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a08, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a0c, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a10, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a14, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a18, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a1c, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a20, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a24, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a28, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a2c, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a30, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a34, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a38, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a3c, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a40, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a44, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a48, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a4c, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a50, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a54, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a58, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a5c, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a60, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a64, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a68, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a6c, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a70, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a74, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a78, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a7c, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a80, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a84, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a88, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a8c, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a90, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a94, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a98, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5a9c, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5aa0, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5aa4, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5aa8, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5aac, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5ab0, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5ab4, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5ab8, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5abc, MASKDWORD, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5ac0, MASKDWORD, 0x00000000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_tssi_dac_gain_defs_a); -+ -+static const struct rtw89_reg5_def rtw8851b_tssi_slope_a_defs_2g[] = { -+ RTW89_DECL_RFK_WM(0x5608, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x560c, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x5610, 0x07ffffff, 0x0200e08), -+ RTW89_DECL_RFK_WM(0x5614, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x5618, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x561c, 0x000001ff, 0x007), -+ RTW89_DECL_RFK_WM(0x561c, 0xffff0000, 0x0808), -+ RTW89_DECL_RFK_WM(0x5620, 0xffffffff, 0x08080808), -+ RTW89_DECL_RFK_WM(0x5624, 0xffffffff, 0x08080808), -+ RTW89_DECL_RFK_WM(0x5628, 0xffffffff, 0x08080808), -+ RTW89_DECL_RFK_WM(0x562c, 0x0000ffff, 0x0808), -+ RTW89_DECL_RFK_WM(0x581c, 0x00100000, 0x1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_tssi_slope_a_defs_2g); -+ -+static const struct rtw89_reg5_def rtw8851b_tssi_slope_a_defs_5g[] = { -+ RTW89_DECL_RFK_WM(0x5608, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x560c, 0x07ffffff, 0x0341a08), -+ RTW89_DECL_RFK_WM(0x5610, 0x07ffffff, 0x0201417), -+ RTW89_DECL_RFK_WM(0x5614, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x5618, 0x07ffffff, 0x0201008), -+ RTW89_DECL_RFK_WM(0x561c, 0x000001ff, 0x008), -+ RTW89_DECL_RFK_WM(0x561c, 0xffff0000, 0x0808), -+ RTW89_DECL_RFK_WM(0x5620, 0xffffffff, 0x0e0e0808), -+ RTW89_DECL_RFK_WM(0x5624, 0xffffffff, 0x08080d18), -+ RTW89_DECL_RFK_WM(0x5628, 0xffffffff, 0x08080808), -+ RTW89_DECL_RFK_WM(0x562c, 0x0000ffff, 0x0808), -+ RTW89_DECL_RFK_WM(0x581c, 0x00100000, 0x1), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_tssi_slope_a_defs_5g); -+ -+static const struct rtw89_reg5_def rtw8851b_tssi_align_a_2g_defs[] = { -+ RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1), -+ RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x000000), -+ RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x2d2400), -+ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5634, 0x000003ff, 0x000), -+ RTW89_DECL_RFK_WM(0x5634, 0x000ffc00, 0x000), -+ RTW89_DECL_RFK_WM(0x5634, 0x3ff00000, 0x3fa), -+ RTW89_DECL_RFK_WM(0x5638, 0x000003ff, 0x02e), -+ RTW89_DECL_RFK_WM(0x5638, 0x000ffc00, 0x09c), -+ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x3fb00000), -+ RTW89_DECL_RFK_WM(0x5644, 0x000003ff, 0x02f), -+ RTW89_DECL_RFK_WM(0x5644, 0x000ffc00, 0x09c), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_tssi_align_a_2g_defs); -+ -+static const struct rtw89_reg5_def rtw8851b_tssi_align_a_5g_defs[] = { -+ RTW89_DECL_RFK_WM(0x5604, 0x80000000, 0x1), -+ RTW89_DECL_RFK_WM(0x5600, 0x3fffffff, 0x000000), -+ RTW89_DECL_RFK_WM(0x5604, 0x003fffff, 0x3b2d24), -+ RTW89_DECL_RFK_WM(0x5630, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5634, 0x000003ff, 0x000), -+ RTW89_DECL_RFK_WM(0x5634, 0x000ffc00, 0x3cb), -+ RTW89_DECL_RFK_WM(0x5634, 0x3ff00000, 0x030), -+ RTW89_DECL_RFK_WM(0x5638, 0x000003ff, 0x73), -+ RTW89_DECL_RFK_WM(0x5638, 0x000ffc00, 0xd4), -+ RTW89_DECL_RFK_WM(0x563c, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5640, 0x3fffffff, 0x00000000), -+ RTW89_DECL_RFK_WM(0x5644, 0x000fffff, 0x00000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_tssi_align_a_5g_defs); -+ -+static const struct rtw89_reg5_def rtw8851b_tssi_slope_defs_a[] = { -+ RTW89_DECL_RFK_WM(0x5820, 0x80000000, 0x0), -+ RTW89_DECL_RFK_WM(0x5818, 0x10000000, 0x0), -+ RTW89_DECL_RFK_WM(0x5814, 0x00000800, 0x1), -+ RTW89_DECL_RFK_WM(0x581c, 0x20000000, 0x1), -+ RTW89_DECL_RFK_WM(0x5820, 0x0000f000, 0xf), -+ RTW89_DECL_RFK_WM(0x581c, 0x000003ff, 0x280), -+ RTW89_DECL_RFK_WM(0x581c, 0x000ffc00, 0x200), -+ RTW89_DECL_RFK_WM(0x58b8, 0x007f0000, 0x00), -+ RTW89_DECL_RFK_WM(0x58b8, 0x7f000000, 0x00), -+ RTW89_DECL_RFK_WM(0x58b4, 0x7f000000, 0x0a), -+ RTW89_DECL_RFK_WM(0x58b8, 0x0000007f, 0x28), -+ RTW89_DECL_RFK_WM(0x58b8, 0x00007f00, 0x76), -+ RTW89_DECL_RFK_WM(0x5810, 0x20000000, 0x0), -+ RTW89_DECL_RFK_WM(0x580c, 0x10000000, 0x1), -+ RTW89_DECL_RFK_WM(0x580c, 0x40000000, 0x1), -+ RTW89_DECL_RFK_WM(0x5834, 0x0003ffff, 0x115f2), -+ RTW89_DECL_RFK_WM(0x5834, 0x3ffc0000, 0x000), -+ RTW89_DECL_RFK_WM(0x5838, 0x00000fff, 0x121), -+ RTW89_DECL_RFK_WM(0x5838, 0x003ff000, 0x000), -+ RTW89_DECL_RFK_WM(0x5854, 0x0003ffff, 0x115f2), -+ RTW89_DECL_RFK_WM(0x5854, 0x3ffc0000, 0x000), -+ RTW89_DECL_RFK_WM(0x5858, 0x00000fff, 0x121), -+ RTW89_DECL_RFK_WM(0x5858, 0x003ff000, 0x000), -+ RTW89_DECL_RFK_WM(0x5824, 0x0003ffff, 0x115f2), -+ RTW89_DECL_RFK_WM(0x5824, 0x3ffc0000, 0x000), -+ RTW89_DECL_RFK_WM(0x5828, 0x00000fff, 0x121), -+ RTW89_DECL_RFK_WM(0x5828, 0x003ff000, 0x000), -+ RTW89_DECL_RFK_WM(0x582c, 0x0003ffff, 0x115f2), -+ RTW89_DECL_RFK_WM(0x582c, 0x3ffc0000, 0x000), -+ RTW89_DECL_RFK_WM(0x5830, 0x00000fff, 0x121), -+ RTW89_DECL_RFK_WM(0x5830, 0x003ff000, 0x000), -+ RTW89_DECL_RFK_WM(0x583c, 0x0003ffff, 0x115f2), -+ RTW89_DECL_RFK_WM(0x583c, 0x3ffc0000, 0x000), -+ RTW89_DECL_RFK_WM(0x5840, 0x00000fff, 0x121), -+ RTW89_DECL_RFK_WM(0x5840, 0x003ff000, 0x000), -+ RTW89_DECL_RFK_WM(0x5844, 0x0003ffff, 0x115f2), -+ RTW89_DECL_RFK_WM(0x5844, 0x3ffc0000, 0x000), -+ RTW89_DECL_RFK_WM(0x5848, 0x00000fff, 0x121), -+ RTW89_DECL_RFK_WM(0x5848, 0x003ff000, 0x000), -+ RTW89_DECL_RFK_WM(0x584c, 0x0003ffff, 0x115f2), -+ RTW89_DECL_RFK_WM(0x584c, 0x3ffc0000, 0x000), -+ RTW89_DECL_RFK_WM(0x5850, 0x00000fff, 0x121), -+ RTW89_DECL_RFK_WM(0x5850, 0x003ff000, 0x000), -+ RTW89_DECL_RFK_WM(0x585c, 0x0003ffff, 0x115f2), -+ RTW89_DECL_RFK_WM(0x585c, 0x3ffc0000, 0x000), -+ RTW89_DECL_RFK_WM(0x5860, 0x00000fff, 0x121), -+ RTW89_DECL_RFK_WM(0x5860, 0x003ff000, 0x000), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_tssi_slope_defs_a); -+ -+static const struct rtw89_reg5_def rtw8851b_tssi_track_defs_a[] = { -+ RTW89_DECL_RFK_WM(0x5820, 0x80000000, 0x0), -+ RTW89_DECL_RFK_WM(0x5818, 0x10000000, 0x0), -+ RTW89_DECL_RFK_WM(0x5814, 0x00000800, 0x0), -+ RTW89_DECL_RFK_WM(0x581c, 0x20000000, 0x1), -+ RTW89_DECL_RFK_WM(0x5864, 0x000003ff, 0x1ff), -+ RTW89_DECL_RFK_WM(0x5864, 0x000ffc00, 0x200), -+ RTW89_DECL_RFK_WM(0x5820, 0x00000fff, 0x080), -+ RTW89_DECL_RFK_WM(0x5814, 0x01000000, 0x0), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_tssi_track_defs_a); -+ -+static const struct rtw89_reg5_def rtw8851b_tssi_mv_avg_defs_a[] = { -+ RTW89_DECL_RFK_WM(0x58e4, 0x00003800, 0x1), -+ RTW89_DECL_RFK_WM(0x58e4, 0x00004000, 0x0), -+ RTW89_DECL_RFK_WM(0x58e4, 0x00008000, 0x1), -+ RTW89_DECL_RFK_WM(0x58e4, 0x000f0000, 0x0), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_tssi_mv_avg_defs_a); -+ -+static const struct rtw89_reg5_def rtw8851b_nctl_post_defs[] = { -+ RTW89_DECL_RFK_WM(0x5864, 0x18000000, 0x3), -+ RTW89_DECL_RFK_WM(0x7864, 0x18000000, 0x3), -+ RTW89_DECL_RFK_WM(0x030c, 0xff000000, 0x13), -+ RTW89_DECL_RFK_WM(0x032c, 0xffff0000, 0x0041), -+ RTW89_DECL_RFK_WM(0x12b8, 0x10000000, 0x1), -+ RTW89_DECL_RFK_WM(0x2008, 0x01ffffff, 0x00fffff), -+ RTW89_DECL_RFK_WM(0x0c60, 0x00000003, 0x3), -+ RTW89_DECL_RFK_WM(0x0c6c, 0x00000001, 0x1), -+ RTW89_DECL_RFK_WM(0x58ac, 0x08000000, 0x1), -+ RTW89_DECL_RFK_WM(0x78ac, 0x08000000, 0x1), -+ RTW89_DECL_RFK_WM(0x0730, 0x00003800, 0x7), -+ RTW89_DECL_RFK_WM(0x2730, 0x00003800, 0x7), -+ RTW89_DECL_RFK_WM(0x0c7c, 0x00e00000, 0x1), -+ RTW89_DECL_RFK_WM(0x58c0, 0x0001ffff, 0x00000), -+ RTW89_DECL_RFK_WM(0x78c0, 0x0001ffff, 0x00000), -+ RTW89_DECL_RFK_WM(0x58fc, 0x3f000000, 0x00), -+ RTW89_DECL_RFK_WM(0x78fc, 0x3f000000, 0x00), -+}; -+ -+RTW89_DECLARE_RFK_TBL(rtw8851b_nctl_post_defs); ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk_table.h -@@ -0,0 +1,38 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2022-2023 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_8851B_RFK_TABLE_H__ -+#define __RTW89_8851B_RFK_TABLE_H__ -+ -+#include "phy.h" -+ -+extern const struct rtw89_rfk_tbl rtw8851b_dadck_setup_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_dadck_post_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_dack_s0_1_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_dack_s0_2_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_dack_manual_off_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_iqk_rxclk_80_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_iqk_rxclk_others_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_iqk_txk_2ghz_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_iqk_txk_5ghz_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_iqk_afebb_restore_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_iqk_bb_afe_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_iqk_macbb_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_tssi_sys_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_tssi_sys_a_defs_2g_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_tssi_sys_a_defs_5g_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_tssi_init_txpwr_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_tssi_init_txpwr_he_tb_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_tssi_dck_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_tssi_dac_gain_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_tssi_slope_a_defs_2g_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_tssi_slope_a_defs_5g_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_tssi_align_a_2g_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_tssi_align_a_5g_defs_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_tssi_slope_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_tssi_track_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_tssi_mv_avg_defs_a_tbl; -+extern const struct rtw89_rfk_tbl rtw8851b_nctl_post_defs_tbl; -+ -+#endif diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-046-wifi-rtw89-correct-5-MHz-mask-setting.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-046-wifi-rtw89-correct-5-MHz-mask-setting.patch deleted file mode 100644 index 93b47336a..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-046-wifi-rtw89-correct-5-MHz-mask-setting.patch +++ /dev/null @@ -1,75 +0,0 @@ -From d33fc8d0368c180fe2338bfae4f5367a66a719f4 Mon Sep 17 00:00:00 2001 -From: Eric Huang -Date: Thu, 6 Apr 2023 15:28:41 +0800 -Subject: [PATCH 046/136] wifi: rtw89: correct 5 MHz mask setting - -Use primary channel index to determine which 5 MHz mask should be enable. -This mask is used to prevent noise from channel edge to effect CCA -threshold in wide bandwidth (>= 40 MHZ). - -Fixes: 1b00e9236a71 ("rtw89: 8852c: add set channel of BB part") -Fixes: 6b0698984eb0 ("wifi: rtw89: 8852b: add chip_ops::set_channel") -Cc: stable@vger.kernel.org -Signed-off-by: Eric Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230406072841.8308-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 9 +++++---- - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 9 +++++---- - 2 files changed, 10 insertions(+), 8 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -1289,7 +1289,7 @@ static void rtw8852b_ctrl_cck_en(struct - static void rtw8852b_5m_mask(struct rtw89_dev *rtwdev, const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx) - { -- u8 pri_ch = chan->primary_channel; -+ u8 pri_ch = chan->pri_ch_idx; - bool mask_5m_low; - bool mask_5m_en; - -@@ -1297,12 +1297,13 @@ static void rtw8852b_5m_mask(struct rtw8 - case RTW89_CHANNEL_WIDTH_40: - /* Prich=1: Mask 5M High, Prich=2: Mask 5M Low */ - mask_5m_en = true; -- mask_5m_low = pri_ch == 2; -+ mask_5m_low = pri_ch == RTW89_SC_20_LOWER; - break; - case RTW89_CHANNEL_WIDTH_80: - /* Prich=3: Mask 5M High, Prich=4: Mask 5M Low, Else: Disable */ -- mask_5m_en = pri_ch == 3 || pri_ch == 4; -- mask_5m_low = pri_ch == 4; -+ mask_5m_en = pri_ch == RTW89_SC_20_UPMOST || -+ pri_ch == RTW89_SC_20_LOWEST; -+ mask_5m_low = pri_ch == RTW89_SC_20_LOWEST; - break; - default: - mask_5m_en = false; ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -1380,18 +1380,19 @@ static void rtw8852c_5m_mask(struct rtw8 - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx) - { -- u8 pri_ch = chan->primary_channel; -+ u8 pri_ch = chan->pri_ch_idx; - bool mask_5m_low; - bool mask_5m_en; - - switch (chan->band_width) { - case RTW89_CHANNEL_WIDTH_40: - mask_5m_en = true; -- mask_5m_low = pri_ch == 2; -+ mask_5m_low = pri_ch == RTW89_SC_20_LOWER; - break; - case RTW89_CHANNEL_WIDTH_80: -- mask_5m_en = ((pri_ch == 3) || (pri_ch == 4)); -- mask_5m_low = pri_ch == 4; -+ mask_5m_en = pri_ch == RTW89_SC_20_UPMOST || -+ pri_ch == RTW89_SC_20_LOWEST; -+ mask_5m_low = pri_ch == RTW89_SC_20_LOWEST; - break; - default: - mask_5m_en = false; diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-047-wifi-rtw89-fix-crash-due-to-null-pointer-of-sta-in-A.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-047-wifi-rtw89-fix-crash-due-to-null-pointer-of-sta-in-A.patch deleted file mode 100644 index 4f00142cb..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-047-wifi-rtw89-fix-crash-due-to-null-pointer-of-sta-in-A.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 8551844d2c5b28b6809a45eb4f5d6e931838fd04 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Thu, 6 Apr 2023 17:30:09 +0800 -Subject: [PATCH 047/136] wifi: rtw89: fix crash due to null pointer of sta in - AP mode - -In AP mode, 'sta' could be NULL if sending broadcast/multicast packets, -so we should check before accessing, or it causes crash: - - BUG: kernel NULL pointer dereference, address: 0000000000000004 - #PF: supervisor read access in kernel mode - #PF: error_code(0x0000) - not-present page - PGD 0 P4D 0 - Oops: 0000 [#1] PREEMPT SMP PTI - CPU: 2 PID: 92 Comm: kworker/u33:0 Tainted: G OE - Workqueue: rtw89_tx_wq rtw89_core_txq_work [rtw89_core] - RIP: 0010:rtw89_core_tx_update_desc_info+0x2cc/0x7d0 [rtw89_core] - Code: e2 01 41 be 04 00 00 00 41 8b 84 c4 0c 01 00 00 75 0d 45 31 f6 ... - RSP: 0018:ffffb4cf807afce0 EFLAGS: 00010297 - RAX: 0000000000000001 RBX: ffffb4cf807afd48 RCX: 0000000000000000 - RDX: 0000000000000000 RSI: 0000000000000001 RDI: 0000000000000001 - RBP: ffffb4cf807afd30 R08: ffff9b28c1e59808 R09: ffff9b28c0297100 - R10: 00000000052cf7c4 R11: 00000000052cf7c4 R12: ffff9b28c1602040 - R13: ffff9b28c07b3000 R14: 0000000000000004 R15: 0000000000000000 - FS: 0000000000000000(0000) GS:ffff9b2a73280000(0000) knlGS:0000000000000000 - CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 - CR2: 0000000000000004 CR3: 00000001ca410003 CR4: 00000000000606e0 - Call Trace: - - rtw89_core_tx_write+0x7c/0x100 [rtw89_core] - rtw89_core_txq_work+0x1b4/0x530 [rtw89_core] - process_one_work+0x222/0x3f0 - worker_thread+0x50/0x3f0 - kthread+0x16b/0x190 - ? rescuer_thread+0x3a0/0x3a0 - ? set_kthread_struct+0x50/0x50 - ret_from_fork+0x22/0x30 - - -Fixes: e5307c9cd7ee ("wifi: rtw89: set data lowest rate according to AP supported rate") -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230406093009.5869-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -707,7 +707,7 @@ static u16 rtw89_core_get_data_rate(stru - else - lowest_rate = RTW89_HW_RATE_OFDM6; - -- if (!sta->deflink.supp_rates[chan->band_type]) -+ if (!sta || !sta->deflink.supp_rates[chan->band_type]) - return lowest_rate; - - return __ffs(sta->deflink.supp_rates[chan->band_type]) + lowest_rate; diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-048-wifi-rtw89-support-WoWLAN-mode-for-8852be.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-048-wifi-rtw89-support-WoWLAN-mode-for-8852be.patch deleted file mode 100644 index 6636f0835..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-048-wifi-rtw89-support-WoWLAN-mode-for-8852be.patch +++ /dev/null @@ -1,79 +0,0 @@ -From 6863ad915d32990aec79e59db9d2a21a5abedf97 Mon Sep 17 00:00:00 2001 -From: Chin-Yen Lee -Date: Mon, 10 Apr 2023 13:34:37 +0800 -Subject: [PATCH 048/136] wifi: rtw89: support WoWLAN mode for 8852be - -To support WoWLAN mode for 8852be, we add one PLE quota setting and -WoWLAN stub, which shows that supported WLAN events include receiving -magic packet, rekey packet and deauth packet, and disconnecting from AP. - -Signed-off-by: Chin-Yen Lee -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230410053438.10682-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.c | 2 ++ - drivers/net/wireless/realtek/rtw89/mac.h | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 16 ++++++++++++++++ - 3 files changed, 19 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -1473,6 +1473,8 @@ const struct rtw89_mac_size_set rtw89_ma - .ple_qt58 = {147, 0, 16, 20, 157, 13, 229, 0, 172, 14, 24, 0,}, - /* 8852A PCIE WOW */ - .ple_qt_52a_wow = {264, 0, 32, 20, 64, 13, 1005, 0, 64, 128, 120,}, -+ /* 8852B PCIE WOW */ -+ .ple_qt_52b_wow = {147, 0, 16, 20, 157, 13, 133, 0, 172, 14, 24, 0,}, - }; - EXPORT_SYMBOL(rtw89_mac_size); - ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -816,6 +816,7 @@ struct rtw89_mac_size_set { - const struct rtw89_ple_quota ple_qt47; - const struct rtw89_ple_quota ple_qt58; - const struct rtw89_ple_quota ple_qt_52a_wow; -+ const struct rtw89_ple_quota ple_qt_52b_wow; - }; - - extern const struct rtw89_mac_size_set rtw89_mac_size; ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -53,6 +53,10 @@ static const struct rtw89_dle_mem rtw885 - &rtw89_mac_size.ple_size6, &rtw89_mac_size.wde_qt6, - &rtw89_mac_size.wde_qt6, &rtw89_mac_size.ple_qt18, - &rtw89_mac_size.ple_qt58}, -+ [RTW89_QTA_WOW] = {RTW89_QTA_WOW, &rtw89_mac_size.wde_size6, -+ &rtw89_mac_size.ple_size6, &rtw89_mac_size.wde_qt6, -+ &rtw89_mac_size.wde_qt6, &rtw89_mac_size.ple_qt18, -+ &rtw89_mac_size.ple_qt_52b_wow}, - [RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size9, - &rtw89_mac_size.ple_size8, &rtw89_mac_size.wde_qt4, - &rtw89_mac_size.wde_qt4, &rtw89_mac_size.ple_qt13, -@@ -2483,6 +2487,15 @@ static const struct rtw89_chip_ops rtw88 - .btc_set_policy = rtw89_btc_set_policy_v1, - }; - -+#ifdef CONFIG_PM -+static const struct wiphy_wowlan_support rtw_wowlan_stub_8852b = { -+ .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT, -+ .n_patterns = RTW89_MAX_PATTERN_NUM, -+ .pattern_max_len = RTW89_MAX_PATTERN_SIZE, -+ .pattern_min_len = 1, -+}; -+#endif -+ - const struct rtw89_chip_info rtw8852b_chip_info = { - .chip_id = RTL8852B, - .ops = &rtw8852b_chip_ops, -@@ -2579,6 +2592,9 @@ const struct rtw89_chip_info rtw8852b_ch - BIT(RTW89_DMA_ACH6) | BIT(RTW89_DMA_ACH7) | - BIT(RTW89_DMA_B1MG) | BIT(RTW89_DMA_B1HI), - .edcca_lvl_reg = R_SEG0R_EDCCA_LVL_V1, -+#ifdef CONFIG_PM -+ .wowlan_stub = &rtw_wowlan_stub_8852b, -+#endif - }; - EXPORT_SYMBOL(rtw8852b_chip_info); - diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-049-wifi-rtw89-fix-power-save-function-in-WoWLAN-mode.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-049-wifi-rtw89-fix-power-save-function-in-WoWLAN-mode.patch deleted file mode 100644 index a71b73862..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-049-wifi-rtw89-fix-power-save-function-in-WoWLAN-mode.patch +++ /dev/null @@ -1,77 +0,0 @@ -From deb1b2aed763828b54a5be9be76c3a43c295f9f0 Mon Sep 17 00:00:00 2001 -From: Chih-Kang Chang -Date: Mon, 10 Apr 2023 13:34:38 +0800 -Subject: [PATCH 049/136] wifi: rtw89: fix power save function in WoWLAN mode - -In WoWLAN Mode, it's expected that WiFi chip could enter power save mode -only after all setting is finished, but current wow_enter_lps function -break the rule and may lead to WoWLAN function fail in low probability, -so fix it. - -Signed-off-by: Chih-Kang Chang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230410053438.10682-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 2 +- - drivers/net/wireless/realtek/rtw89/ps.c | 6 ++++-- - drivers/net/wireless/realtek/rtw89/ps.h | 3 ++- - drivers/net/wireless/realtek/rtw89/wow.c | 2 +- - 4 files changed, 8 insertions(+), 5 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -2503,7 +2503,7 @@ static void rtw89_vif_enter_lps(struct r - - if (rtwvif->stats.tx_tfc_lv == RTW89_TFC_IDLE && - rtwvif->stats.rx_tfc_lv == RTW89_TFC_IDLE) -- rtw89_enter_lps(rtwdev, rtwvif); -+ rtw89_enter_lps(rtwdev, rtwvif, true); - } - - static void rtw89_enter_lps_track(struct rtw89_dev *rtwdev) ---- a/drivers/net/wireless/realtek/rtw89/ps.c -+++ b/drivers/net/wireless/realtek/rtw89/ps.c -@@ -114,7 +114,8 @@ void rtw89_leave_ps_mode(struct rtw89_de - __rtw89_leave_ps_mode(rtwdev); - } - --void rtw89_enter_lps(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+void rtw89_enter_lps(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ bool ps_mode) - { - lockdep_assert_held(&rtwdev->mutex); - -@@ -122,7 +123,8 @@ void rtw89_enter_lps(struct rtw89_dev *r - return; - - __rtw89_enter_lps(rtwdev, rtwvif->mac_id); -- __rtw89_enter_ps_mode(rtwdev, rtwvif); -+ if (ps_mode) -+ __rtw89_enter_ps_mode(rtwdev, rtwvif); - } - - static void rtw89_leave_lps_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) ---- a/drivers/net/wireless/realtek/rtw89/ps.h -+++ b/drivers/net/wireless/realtek/rtw89/ps.h -@@ -5,7 +5,8 @@ - #ifndef __RTW89_PS_H_ - #define __RTW89_PS_H_ - --void rtw89_enter_lps(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); -+void rtw89_enter_lps(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ bool ps_mode); - void rtw89_leave_lps(struct rtw89_dev *rtwdev); - void __rtw89_leave_ps_mode(struct rtw89_dev *rtwdev); - void __rtw89_enter_ps_mode(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); ---- a/drivers/net/wireless/realtek/rtw89/wow.c -+++ b/drivers/net/wireless/realtek/rtw89/wow.c -@@ -30,7 +30,7 @@ static void rtw89_wow_enter_lps(struct r - struct ieee80211_vif *wow_vif = rtwdev->wow.wow_vif; - struct rtw89_vif *rtwvif = (struct rtw89_vif *)wow_vif->drv_priv; - -- rtw89_enter_lps(rtwdev, rtwvif); -+ rtw89_enter_lps(rtwdev, rtwvif, false); - } - - static void rtw89_wow_leave_lps(struct rtw89_dev *rtwdev) diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-050-wifi-rtw89-coex-Enable-Wi-Fi-RX-gain-control-for-fre.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-050-wifi-rtw89-coex-Enable-Wi-Fi-RX-gain-control-for-fre.patch deleted file mode 100644 index 7473018da..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-050-wifi-rtw89-coex-Enable-Wi-Fi-RX-gain-control-for-fre.patch +++ /dev/null @@ -1,59 +0,0 @@ -From 36ef71db559f6a0dc2d7a9af8edb16c387d18ce2 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Wed, 12 Apr 2023 09:28:28 +0800 -Subject: [PATCH 050/136] wifi: rtw89: coex: Enable Wi-Fi RX gain control for - free run solution - -When Wi-Fi & Bluetooth are both busy at the same time, Wi-Fi need to -enable RX gain to protect Wi-Fi RX RF ability. Without this configure -the interference from Bluetooth will bring a big impact to Wi-Fi RX. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230412012831.10519-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 4 ++-- - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 4 ++-- - 2 files changed, 4 insertions(+), 4 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -332,7 +332,7 @@ static const struct rtw89_btc_rf_trx_par - {255, 0, 0, 7}, /* 2 ->reserved for shared-antenna */ - {255, 0, 0, 7}, /* 3- >reserved for shared-antenna */ - {255, 0, 0, 7}, /* 4 ->reserved for shared-antenna */ -- {255, 0, 0, 7}, /* the below id is for non-shared-antenna free-run */ -+ {255, 1, 0, 7}, /* the below id is for non-shared-antenna free-run */ - {6, 1, 0, 7}, - {13, 1, 0, 7}, - {13, 1, 0, 7} -@@ -344,7 +344,7 @@ static const struct rtw89_btc_rf_trx_par - {255, 0, 0, 7}, /* 2 ->reserved for shared-antenna */ - {255, 0, 0, 7}, /* 3- >reserved for shared-antenna */ - {255, 0, 0, 7}, /* 4 ->reserved for shared-antenna */ -- {255, 0, 0, 7}, /* the below id is for non-shared-antenna free-run */ -+ {255, 1, 0, 7}, /* the below id is for non-shared-antenna free-run */ - {255, 1, 0, 7}, - {255, 1, 0, 7}, - {255, 1, 0, 7} ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2542,7 +2542,7 @@ static const struct rtw89_btc_rf_trx_par - {255, 0, 0, 7}, /* 2 ->reserved for shared-antenna */ - {255, 0, 0, 7}, /* 3- >reserved for shared-antenna */ - {255, 0, 0, 7}, /* 4 ->reserved for shared-antenna */ -- {255, 0, 0, 7}, /* the below id is for non-shared-antenna free-run */ -+ {255, 1, 0, 7}, /* the below id is for non-shared-antenna free-run */ - {6, 1, 0, 7}, - {13, 1, 0, 7}, - {13, 1, 0, 7} -@@ -2554,7 +2554,7 @@ static const struct rtw89_btc_rf_trx_par - {255, 0, 0, 7}, /* 2 ->reserved for shared-antenna */ - {255, 0, 0, 7}, /* 3- >reserved for shared-antenna */ - {255, 0, 0, 7}, /* 4 ->reserved for shared-antenna */ -- {255, 0, 0, 7}, /* the below id is for non-shared-antenna free-run */ -+ {255, 1, 0, 7}, /* the below id is for non-shared-antenna free-run */ - {255, 1, 0, 7}, - {255, 1, 0, 7}, - {255, 1, 0, 7} diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-051-wifi-rtw89-coex-Add-path-control-register-to-monitor.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-051-wifi-rtw89-coex-Add-path-control-register-to-monitor.patch deleted file mode 100644 index b071ccf09..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-051-wifi-rtw89-coex-Add-path-control-register-to-monitor.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 9fde30562840837e4e2138bc3f88dba2b9963d98 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Wed, 12 Apr 2023 09:28:29 +0800 -Subject: [PATCH 051/136] wifi: rtw89: coex: Add path control register to - monitor list - -Chips use similar hardware for path control, but could different -path/antenna configuration. Add these register to monitor, if there are -wrong settings, these register can help to debug. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230412012831.10519-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 4 +++- - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 3 +++ - 2 files changed, 6 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -364,7 +364,9 @@ static const struct rtw89_btc_fbtc_mreg - RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xd200), - RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xd220), - RTW89_DEF_FBTC_MREG(REG_BB, 4, 0x980), -- RTW89_DEF_FBTC_MREG(REG_BT_MODEM, 4, 0x178), -+ RTW89_DEF_FBTC_MREG(REG_BB, 4, 0x4738), -+ RTW89_DEF_FBTC_MREG(REG_BB, 4, 0x4688), -+ RTW89_DEF_FBTC_MREG(REG_BB, 4, 0x4694), - }; - - static const u8 rtw89_btc_8852b_wl_rssi_thres[BTC_WL_RSSI_THMAX] = {70, 60, 50, 40}; ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2576,6 +2576,9 @@ static const struct rtw89_btc_fbtc_mreg - RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xd200), - RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xd220), - RTW89_DEF_FBTC_MREG(REG_BB, 4, 0x980), -+ RTW89_DEF_FBTC_MREG(REG_BB, 4, 0x4aa4), -+ RTW89_DEF_FBTC_MREG(REG_BB, 4, 0x4778), -+ RTW89_DEF_FBTC_MREG(REG_BB, 4, 0x476c), - }; - - static diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-052-wifi-rtw89-coex-Update-function-to-get-BT-RSSI-and-h.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-052-wifi-rtw89-coex-Update-function-to-get-BT-RSSI-and-h.patch deleted file mode 100644 index 9eb9a4a0a..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-052-wifi-rtw89-coex-Update-function-to-get-BT-RSSI-and-h.patch +++ /dev/null @@ -1,55 +0,0 @@ -From 2380a220316fc2e753014b1862ed579796d29ac5 Mon Sep 17 00:00:00 2001 -From: Ching-Te Ku -Date: Wed, 12 Apr 2023 09:28:30 +0800 -Subject: [PATCH 052/136] wifi: rtw89: coex: Update function to get BT RSSI and - hardware counter - -Correct Bluetooth RSSI count method. The 6dB is the gap between hardware -packet sampled value and real RSSI value. - -Signed-off-by: Ching-Te Ku -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230412012831.10519-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 3 ++- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 3 ++- - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 3 ++- - 3 files changed, 6 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -1832,7 +1832,8 @@ rtw8852a_btc_set_wl_txpwr_ctrl(struct rt - static - s8 rtw8852a_btc_get_bt_rssi(struct rtw89_dev *rtwdev, s8 val) - { -- return clamp_t(s8, val, -100, 0) + 100; -+ /* +6 for compensate offset */ -+ return clamp_t(s8, val + 6, -100, 0) + 100; - } - - static struct rtw89_btc_rf_trx_para rtw89_btc_8852a_rf_ul[] = { ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2279,7 +2279,8 @@ do { \ - static - s8 rtw8852b_btc_get_bt_rssi(struct rtw89_dev *rtwdev, s8 val) - { -- return clamp_t(s8, val, -100, 0) + 100; -+ /* +6 for compensate offset */ -+ return clamp_t(s8, val + 6, -100, 0) + 100; - } - - static ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2533,7 +2533,8 @@ do { \ - static - s8 rtw8852c_btc_get_bt_rssi(struct rtw89_dev *rtwdev, s8 val) - { -- return clamp_t(s8, val, -100, 0) + 100; -+ /* +6 for compensate offset */ -+ return clamp_t(s8, val + 6, -100, 0) + 100; - } - - static const struct rtw89_btc_rf_trx_para rtw89_btc_8852c_rf_ul[] = { diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-053-wifi-rtw89-coex-send-more-hardware-module-info-to-fi.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-053-wifi-rtw89-coex-send-more-hardware-module-info-to-fi.patch deleted file mode 100644 index 07029dafd..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-053-wifi-rtw89-coex-send-more-hardware-module-info-to-fi.patch +++ /dev/null @@ -1,256 +0,0 @@ -From c0fea064b2647a5069e2c234fb44286c8a205993 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 12 Apr 2023 09:28:31 +0800 -Subject: [PATCH 053/136] wifi: rtw89: coex: send more hardware module info to - firmware for 8851B - -8851B has various hardware module types, so BT coexistence in firmware -needs these information to make decision. Add them to make 8851B work -well. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230412012831.10519-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 5 +- - drivers/net/wireless/realtek/rtw89/fw.c | 64 ++++++------ - drivers/net/wireless/realtek/rtw89/fw.h | 113 +++++++--------------- - 3 files changed, 75 insertions(+), 107 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -959,6 +959,8 @@ struct rtw89_btc_ant_info { - - u8 single_pos: 1;/* Single antenna at S0 or S1 */ - u8 diversity: 1; -+ u8 btg_pos: 2; -+ u8 stream_cnt: 4; - }; - - enum rtw89_tfc_dir { -@@ -1415,8 +1417,9 @@ struct rtw89_btc_module { - u8 bt_solo: 1; - u8 bt_pos: 1; - u8 switch_type: 1; -+ u8 wa_type: 3; - -- u8 rsvd; -+ u8 kt_ver_adie; - }; - - #define RTW89_BTC_DM_MAXSTEP 30 ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -1924,8 +1924,6 @@ fail: - return ret; - } - --#define H2C_LEN_CXDRVHDR 2 --#define H2C_LEN_CXDRVINFO_INIT (12 + H2C_LEN_CXDRVHDR) - int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev) - { - struct rtw89_btc *btc = &rtwdev->btc; -@@ -1933,44 +1931,52 @@ int rtw89_fw_h2c_cxdrv_init(struct rtw89 - struct rtw89_btc_init_info *init_info = &dm->init_info; - struct rtw89_btc_module *module = &init_info->module; - struct rtw89_btc_ant_info *ant = &module->ant; -+ struct rtw89_h2c_cxinit *h2c; -+ u32 len = sizeof(*h2c); - struct sk_buff *skb; -- u8 *cmd; - int ret; - -- skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_CXDRVINFO_INIT); -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len); - if (!skb) { - rtw89_err(rtwdev, "failed to alloc skb for h2c cxdrv_init\n"); - return -ENOMEM; - } -- skb_put(skb, H2C_LEN_CXDRVINFO_INIT); -- cmd = skb->data; -+ skb_put(skb, len); -+ h2c = (struct rtw89_h2c_cxinit *)skb->data; - -- RTW89_SET_FWCMD_CXHDR_TYPE(cmd, CXDRVINFO_INIT); -- RTW89_SET_FWCMD_CXHDR_LEN(cmd, H2C_LEN_CXDRVINFO_INIT - H2C_LEN_CXDRVHDR); -+ h2c->hdr.type = CXDRVINFO_INIT; -+ h2c->hdr.len = len - H2C_LEN_CXDRVHDR; - -- RTW89_SET_FWCMD_CXINIT_ANT_TYPE(cmd, ant->type); -- RTW89_SET_FWCMD_CXINIT_ANT_NUM(cmd, ant->num); -- RTW89_SET_FWCMD_CXINIT_ANT_ISO(cmd, ant->isolation); -- RTW89_SET_FWCMD_CXINIT_ANT_POS(cmd, ant->single_pos); -- RTW89_SET_FWCMD_CXINIT_ANT_DIVERSITY(cmd, ant->diversity); -- -- RTW89_SET_FWCMD_CXINIT_MOD_RFE(cmd, module->rfe_type); -- RTW89_SET_FWCMD_CXINIT_MOD_CV(cmd, module->cv); -- RTW89_SET_FWCMD_CXINIT_MOD_BT_SOLO(cmd, module->bt_solo); -- RTW89_SET_FWCMD_CXINIT_MOD_BT_POS(cmd, module->bt_pos); -- RTW89_SET_FWCMD_CXINIT_MOD_SW_TYPE(cmd, module->switch_type); -- -- RTW89_SET_FWCMD_CXINIT_WL_GCH(cmd, init_info->wl_guard_ch); -- RTW89_SET_FWCMD_CXINIT_WL_ONLY(cmd, init_info->wl_only); -- RTW89_SET_FWCMD_CXINIT_WL_INITOK(cmd, init_info->wl_init_ok); -- RTW89_SET_FWCMD_CXINIT_DBCC_EN(cmd, init_info->dbcc_en); -- RTW89_SET_FWCMD_CXINIT_CX_OTHER(cmd, init_info->cx_other); -- RTW89_SET_FWCMD_CXINIT_BT_ONLY(cmd, init_info->bt_only); -+ h2c->ant_type = ant->type; -+ h2c->ant_num = ant->num; -+ h2c->ant_iso = ant->isolation; -+ h2c->ant_info = -+ u8_encode_bits(ant->single_pos, RTW89_H2C_CXINIT_ANT_INFO_POS) | -+ u8_encode_bits(ant->diversity, RTW89_H2C_CXINIT_ANT_INFO_DIVERSITY) | -+ u8_encode_bits(ant->btg_pos, RTW89_H2C_CXINIT_ANT_INFO_BTG_POS) | -+ u8_encode_bits(ant->stream_cnt, RTW89_H2C_CXINIT_ANT_INFO_STREAM_CNT); -+ -+ h2c->mod_rfe = module->rfe_type; -+ h2c->mod_cv = module->cv; -+ h2c->mod_info = -+ u8_encode_bits(module->bt_solo, RTW89_H2C_CXINIT_MOD_INFO_BT_SOLO) | -+ u8_encode_bits(module->bt_pos, RTW89_H2C_CXINIT_MOD_INFO_BT_POS) | -+ u8_encode_bits(module->switch_type, RTW89_H2C_CXINIT_MOD_INFO_SW_TYPE) | -+ u8_encode_bits(module->wa_type, RTW89_H2C_CXINIT_MOD_INFO_WA_TYPE); -+ h2c->mod_adie_kt = module->kt_ver_adie; -+ h2c->wl_gch = init_info->wl_guard_ch; -+ -+ h2c->info = -+ u8_encode_bits(init_info->wl_only, RTW89_H2C_CXINIT_INFO_WL_ONLY) | -+ u8_encode_bits(init_info->wl_init_ok, RTW89_H2C_CXINIT_INFO_WL_INITOK) | -+ u8_encode_bits(init_info->dbcc_en, RTW89_H2C_CXINIT_INFO_DBCC_EN) | -+ u8_encode_bits(init_info->cx_other, RTW89_H2C_CXINIT_INFO_CX_OTHER) | -+ u8_encode_bits(init_info->bt_only, RTW89_H2C_CXINIT_INFO_BT_ONLY); - - rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, - H2C_CAT_OUTSRC, BTFC_SET, - SET_DRV_INFO, 0, 0, -- H2C_LEN_CXDRVINFO_INIT); -+ len); - - ret = rtw89_h2c_tx(rtwdev, skb, false); - if (ret) { ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -2197,85 +2197,44 @@ static inline void RTW89_SET_FWCMD_CXHDR - u8p_replace_bits((u8 *)(cmd) + 1, val, GENMASK(7, 0)); - } - --static inline void RTW89_SET_FWCMD_CXINIT_ANT_TYPE(void *cmd, u8 val) --{ -- u8p_replace_bits((u8 *)(cmd) + 2, val, GENMASK(7, 0)); --} -- --static inline void RTW89_SET_FWCMD_CXINIT_ANT_NUM(void *cmd, u8 val) --{ -- u8p_replace_bits((u8 *)(cmd) + 3, val, GENMASK(7, 0)); --} -- --static inline void RTW89_SET_FWCMD_CXINIT_ANT_ISO(void *cmd, u8 val) --{ -- u8p_replace_bits((u8 *)(cmd) + 4, val, GENMASK(7, 0)); --} -- --static inline void RTW89_SET_FWCMD_CXINIT_ANT_POS(void *cmd, u8 val) --{ -- u8p_replace_bits((u8 *)(cmd) + 5, val, BIT(0)); --} -- --static inline void RTW89_SET_FWCMD_CXINIT_ANT_DIVERSITY(void *cmd, u8 val) --{ -- u8p_replace_bits((u8 *)(cmd) + 5, val, BIT(1)); --} -- --static inline void RTW89_SET_FWCMD_CXINIT_MOD_RFE(void *cmd, u8 val) --{ -- u8p_replace_bits((u8 *)(cmd) + 6, val, GENMASK(7, 0)); --} -- --static inline void RTW89_SET_FWCMD_CXINIT_MOD_CV(void *cmd, u8 val) --{ -- u8p_replace_bits((u8 *)(cmd) + 7, val, GENMASK(7, 0)); --} -- --static inline void RTW89_SET_FWCMD_CXINIT_MOD_BT_SOLO(void *cmd, u8 val) --{ -- u8p_replace_bits((u8 *)(cmd) + 8, val, BIT(0)); --} -- --static inline void RTW89_SET_FWCMD_CXINIT_MOD_BT_POS(void *cmd, u8 val) --{ -- u8p_replace_bits((u8 *)(cmd) + 8, val, BIT(1)); --} -- --static inline void RTW89_SET_FWCMD_CXINIT_MOD_SW_TYPE(void *cmd, u8 val) --{ -- u8p_replace_bits((u8 *)(cmd) + 8, val, BIT(2)); --} -- --static inline void RTW89_SET_FWCMD_CXINIT_WL_GCH(void *cmd, u8 val) --{ -- u8p_replace_bits((u8 *)(cmd) + 10, val, GENMASK(7, 0)); --} -- --static inline void RTW89_SET_FWCMD_CXINIT_WL_ONLY(void *cmd, u8 val) --{ -- u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(0)); --} -- --static inline void RTW89_SET_FWCMD_CXINIT_WL_INITOK(void *cmd, u8 val) --{ -- u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(1)); --} -- --static inline void RTW89_SET_FWCMD_CXINIT_DBCC_EN(void *cmd, u8 val) --{ -- u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(2)); --} -- --static inline void RTW89_SET_FWCMD_CXINIT_CX_OTHER(void *cmd, u8 val) --{ -- u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(3)); --} -- --static inline void RTW89_SET_FWCMD_CXINIT_BT_ONLY(void *cmd, u8 val) --{ -- u8p_replace_bits((u8 *)(cmd) + 11, val, BIT(4)); --} -+struct rtw89_h2c_cxhdr { -+ u8 type; -+ u8 len; -+} __packed; -+ -+#define H2C_LEN_CXDRVHDR sizeof(struct rtw89_h2c_cxhdr) -+ -+struct rtw89_h2c_cxinit { -+ struct rtw89_h2c_cxhdr hdr; -+ u8 ant_type; -+ u8 ant_num; -+ u8 ant_iso; -+ u8 ant_info; -+ u8 mod_rfe; -+ u8 mod_cv; -+ u8 mod_info; -+ u8 mod_adie_kt; -+ u8 wl_gch; -+ u8 info; -+ u8 rsvd; -+ u8 rsvd1; -+} __packed; -+ -+#define RTW89_H2C_CXINIT_ANT_INFO_POS BIT(0) -+#define RTW89_H2C_CXINIT_ANT_INFO_DIVERSITY BIT(1) -+#define RTW89_H2C_CXINIT_ANT_INFO_BTG_POS GENMASK(3, 2) -+#define RTW89_H2C_CXINIT_ANT_INFO_STREAM_CNT GENMASK(7, 4) -+ -+#define RTW89_H2C_CXINIT_MOD_INFO_BT_SOLO BIT(0) -+#define RTW89_H2C_CXINIT_MOD_INFO_BT_POS BIT(1) -+#define RTW89_H2C_CXINIT_MOD_INFO_SW_TYPE BIT(2) -+#define RTW89_H2C_CXINIT_MOD_INFO_WA_TYPE GENMASK(5, 3) -+ -+#define RTW89_H2C_CXINIT_INFO_WL_ONLY BIT(0) -+#define RTW89_H2C_CXINIT_INFO_WL_INITOK BIT(1) -+#define RTW89_H2C_CXINIT_INFO_DBCC_EN BIT(2) -+#define RTW89_H2C_CXINIT_INFO_CX_OTHER BIT(3) -+#define RTW89_H2C_CXINIT_INFO_BT_ONLY BIT(4) - - static inline void RTW89_SET_FWCMD_CXROLE_CONNECT_CNT(void *cmd, u8 val) - { diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-054-wifi-rtw89-prohibit-enter-IPS-during-HW-scan.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-054-wifi-rtw89-prohibit-enter-IPS-during-HW-scan.patch deleted file mode 100644 index 0fa3ceb43..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-054-wifi-rtw89-prohibit-enter-IPS-during-HW-scan.patch +++ /dev/null @@ -1,30 +0,0 @@ -From e579e943bac3b52f69a25738fcbd8be945f72689 Mon Sep 17 00:00:00 2001 -From: Chih-Kang Chang -Date: Sat, 15 Apr 2023 11:48:55 +0800 -Subject: [PATCH 054/136] wifi: rtw89: prohibit enter IPS during HW scan - -Mac80211 core may ask driver to change to idle mode during HW scan, -then H2C command for HW scan will send failed since chip is in idle -mode. Therefore, We check the SCANNING flag before entering IPS to -prevent this behavior. - -Signed-off-by: Chih-Kang Chang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230415034900.15679-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac80211.c | 3 ++- - 1 file changed, 2 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -105,7 +105,8 @@ static int rtw89_ops_config(struct ieee8 - } - - if ((changed & IEEE80211_CONF_CHANGE_IDLE) && -- (hw->conf.flags & IEEE80211_CONF_IDLE)) -+ (hw->conf.flags & IEEE80211_CONF_IDLE) && -+ !rtwdev->scanning) - rtw89_enter_ips(rtwdev); - - mutex_unlock(&rtwdev->mutex); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-055-wifi-rtw89-refine-scan-function-after-chanctx.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-055-wifi-rtw89-refine-scan-function-after-chanctx.patch deleted file mode 100644 index 1e872fe2c..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-055-wifi-rtw89-refine-scan-function-after-chanctx.patch +++ /dev/null @@ -1,222 +0,0 @@ -From e7399db231d07f1e5a4179f100ccd0106fdbee03 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Sat, 15 Apr 2023 11:48:56 +0800 -Subject: [PATCH 055/136] wifi: rtw89: refine scan function after chanctx - -Since we can get the current channel definition each interface maps to, -remove store_op function that is no longer required to make things simple. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230415034900.15679-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 9 ++++ - drivers/net/wireless/realtek/rtw89/core.h | 7 ++- - drivers/net/wireless/realtek/rtw89/fw.c | 47 ++++++------------- - drivers/net/wireless/realtek/rtw89/fw.h | 1 - - drivers/net/wireless/realtek/rtw89/mac.c | 14 ++++-- - drivers/net/wireless/realtek/rtw89/mac80211.c | 1 - - 6 files changed, 35 insertions(+), 44 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -360,6 +360,15 @@ void rtw89_set_channel(struct rtw89_dev - rtw89_set_entity_state(rtwdev, true); - } - -+void rtw89_get_channel(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ struct rtw89_chan *chan) -+{ -+ const struct cfg80211_chan_def *chandef; -+ -+ chandef = rtw89_chandef_get(rtwdev, rtwvif->sub_entity_idx); -+ rtw89_get_channel_params(chandef, chan); -+} -+ - static enum rtw89_core_tx_type - rtw89_core_get_tx_type(struct rtw89_dev *rtwdev, - struct sk_buff *skb) ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3936,10 +3936,7 @@ struct rtw89_early_h2c { - struct rtw89_hw_scan_info { - struct ieee80211_vif *scanning_vif; - struct list_head pkt_list[NUM_NL80211_BANDS]; -- u8 op_pri_ch; -- u8 op_chan; -- u8 op_bw; -- u8 op_band; -+ struct rtw89_chan op_chan; - u32 last_chan_idx; - }; - -@@ -4981,6 +4978,8 @@ void rtw89_free_ieee80211_hw(struct rtw8 - void rtw89_core_set_chip_txpwr(struct rtw89_dev *rtwdev); - void rtw89_get_default_chandef(struct cfg80211_chan_def *chandef); - void rtw89_set_channel(struct rtw89_dev *rtwdev); -+void rtw89_get_channel(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif, -+ struct rtw89_chan *chan); - u8 rtw89_core_acquire_bit_map(unsigned long *addr, unsigned long size); - void rtw89_core_release_bit_map(unsigned long *addr, u8 bit); - void rtw89_core_release_all_bits_map(unsigned long *addr, unsigned int nbits); ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -2551,7 +2551,7 @@ int rtw89_fw_h2c_scan_offload(struct rtw - struct rtw89_scan_option *option, - struct rtw89_vif *rtwvif) - { -- struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info; -+ struct rtw89_chan *op = &rtwdev->scan_info.op_chan; - struct sk_buff *skb; - u8 *cmd; - int ret; -@@ -2573,13 +2573,11 @@ int rtw89_fw_h2c_scan_offload(struct rtw - RTW89_SET_FWCMD_SCANOFLD_START_MODE(cmd, RTW89_SCAN_IMMEDIATE); - RTW89_SET_FWCMD_SCANOFLD_SCAN_TYPE(cmd, RTW89_SCAN_ONCE); - if (option->target_ch_mode) { -- RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BW(cmd, scan_info->op_bw); -+ RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BW(cmd, op->band_width); - RTW89_SET_FWCMD_SCANOFLD_TARGET_PRI_CH(cmd, -- scan_info->op_pri_ch); -- RTW89_SET_FWCMD_SCANOFLD_TARGET_CENTRAL_CH(cmd, -- scan_info->op_chan); -- RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BAND(cmd, -- scan_info->op_band); -+ op->primary_channel); -+ RTW89_SET_FWCMD_SCANOFLD_TARGET_CENTRAL_CH(cmd, op->channel); -+ RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BAND(cmd, op->band_type); - } - - rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -@@ -3158,6 +3156,7 @@ static void rtw89_hw_scan_add_chan(struc - struct ieee80211_vif *vif = rtwdev->scan_info.scanning_vif; - struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; - struct cfg80211_scan_request *req = rtwvif->scan_req; -+ struct rtw89_chan *op = &rtwdev->scan_info.op_chan; - struct rtw89_pktofld_info *info; - u8 band, probe_count = 0; - int ret; -@@ -3201,10 +3200,10 @@ static void rtw89_hw_scan_add_chan(struc - - switch (chan_type) { - case RTW89_CHAN_OPERATE: -- ch_info->central_ch = scan_info->op_chan; -- ch_info->pri_ch = scan_info->op_pri_ch; -- ch_info->ch_band = scan_info->op_band; -- ch_info->bw = scan_info->op_bw; -+ ch_info->central_ch = op->channel; -+ ch_info->pri_ch = op->primary_channel; -+ ch_info->ch_band = op->band_type; -+ ch_info->bw = op->band_width; - ch_info->tx_null = true; - ch_info->num_pkt = 0; - break; -@@ -3321,6 +3320,7 @@ void rtw89_hw_scan_start(struct rtw89_de - u32 rx_fltr = rtwdev->hal.rx_fltr; - u8 mac_addr[ETH_ALEN]; - -+ rtw89_get_channel(rtwdev, rtwvif, &rtwdev->scan_info.op_chan); - rtwdev->scan_info.scanning_vif = vif; - rtwdev->scan_info.last_chan_idx = 0; - rtwvif->scan_ies = &scan_req->ies; -@@ -3346,6 +3346,7 @@ void rtw89_hw_scan_start(struct rtw89_de - void rtw89_hw_scan_complete(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, - bool aborted) - { -+ struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info; - struct cfg80211_scan_info info = { - .aborted = aborted, - }; -@@ -3367,11 +3368,9 @@ void rtw89_hw_scan_complete(struct rtw89 - rtwvif = (struct rtw89_vif *)vif->drv_priv; - rtwvif->scan_req = NULL; - rtwvif->scan_ies = NULL; -- rtwdev->scan_info.last_chan_idx = 0; -- rtwdev->scan_info.scanning_vif = NULL; -+ scan_info->last_chan_idx = 0; -+ scan_info->scanning_vif = NULL; - -- if (rtwvif->net_type != RTW89_NET_TYPE_NO_LINK) -- rtw89_store_op_chan(rtwdev, false); - rtw89_set_channel(rtwdev); - } - -@@ -3407,24 +3406,6 @@ out: - return ret; - } - --void rtw89_store_op_chan(struct rtw89_dev *rtwdev, bool backup) --{ -- struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info; -- const struct rtw89_chan *cur = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -- struct rtw89_chan new; -- -- if (backup) { -- scan_info->op_pri_ch = cur->primary_channel; -- scan_info->op_chan = cur->channel; -- scan_info->op_bw = cur->band_width; -- scan_info->op_band = cur->band_type; -- } else { -- rtw89_chan_create(&new, scan_info->op_chan, scan_info->op_pri_ch, -- scan_info->op_band, scan_info->op_bw); -- rtw89_assign_entity_chan(rtwdev, RTW89_SUB_ENTITY_0, &new); -- } --} -- - #define H2C_FW_CPU_EXCEPTION_LEN 4 - #define H2C_FW_CPU_EXCEPTION_TYPE_DEF 0x5566 - int rtw89_fw_h2c_trigger_cpu_exception(struct rtw89_dev *rtwdev) ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -3713,7 +3713,6 @@ int rtw89_fw_msg_reg(struct rtw89_dev *r - struct rtw89_mac_c2h_info *c2h_info); - int rtw89_fw_h2c_fw_log(struct rtw89_dev *rtwdev, bool enable); - void rtw89_fw_st_dbg_dump(struct rtw89_dev *rtwdev); --void rtw89_store_op_chan(struct rtw89_dev *rtwdev, bool backup); - void rtw89_hw_scan_start(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, - struct ieee80211_scan_request *req); - void rtw89_hw_scan_complete(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif, ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -4194,9 +4194,9 @@ rtw89_mac_c2h_macid_pause(struct rtw89_d - - static bool rtw89_is_op_chan(struct rtw89_dev *rtwdev, u8 band, u8 channel) - { -- struct rtw89_hw_scan_info *scan_info = &rtwdev->scan_info; -+ const struct rtw89_chan *op = &rtwdev->scan_info.op_chan; - -- return band == scan_info->op_band && channel == scan_info->op_pri_ch; -+ return band == op->band_type && channel == op->primary_channel; - } - - static void -@@ -4246,11 +4246,15 @@ rtw89_mac_c2h_scanofld_rsp(struct rtw89_ - } - break; - case RTW89_SCAN_ENTER_CH_NOTIFY: -- rtw89_chan_create(&new, chan, chan, band, RTW89_CHANNEL_WIDTH_20); -- rtw89_assign_entity_chan(rtwdev, RTW89_SUB_ENTITY_0, &new); - if (rtw89_is_op_chan(rtwdev, band, chan)) { -- rtw89_store_op_chan(rtwdev, false); -+ rtw89_assign_entity_chan(rtwdev, rtwvif->sub_entity_idx, -+ &rtwdev->scan_info.op_chan); - ieee80211_wake_queues(rtwdev->hw); -+ } else { -+ rtw89_chan_create(&new, chan, chan, band, -+ RTW89_CHANNEL_WIDTH_20); -+ rtw89_assign_entity_chan(rtwdev, rtwvif->sub_entity_idx, -+ &new); - } - break; - default: ---- a/drivers/net/wireless/realtek/rtw89/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -418,7 +418,6 @@ static void rtw89_ops_bss_info_changed(s - rtw89_chip_cfg_txpwr_ul_tb_offset(rtwdev, vif); - rtw89_mac_port_update(rtwdev, rtwvif); - rtw89_mac_set_he_obss_narrow_bw_ru(rtwdev, vif); -- rtw89_store_op_chan(rtwdev, true); - } else { - /* Abort ongoing scan if cancel_scan isn't issued - * when disconnected by peer diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-056-wifi-rtw89-use-struct-instead-of-macros-to-set-H2C-c.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-056-wifi-rtw89-use-struct-instead-of-macros-to-set-H2C-c.patch deleted file mode 100644 index 1ffa1b123..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-056-wifi-rtw89-use-struct-instead-of-macros-to-set-H2C-c.patch +++ /dev/null @@ -1,215 +0,0 @@ -From 8b048bd5ddf700c72734c4a2a79ecdf082273edb Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sat, 15 Apr 2023 11:48:57 +0800 -Subject: [PATCH 056/136] wifi: rtw89: use struct instead of macros to set H2C - command of hardware scan - -Remove macros that set H2C data. Instead, use struct and -le32_encode_bits() with mask definition to make it clean. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230415034900.15679-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 45 ++++++---- - drivers/net/wireless/realtek/rtw89/fw.h | 114 ++++++------------------ - 2 files changed, 51 insertions(+), 108 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -2546,44 +2546,51 @@ fail: - return ret; - } - --#define H2C_LEN_SCAN_OFFLOAD 28 - int rtw89_fw_h2c_scan_offload(struct rtw89_dev *rtwdev, - struct rtw89_scan_option *option, - struct rtw89_vif *rtwvif) - { - struct rtw89_chan *op = &rtwdev->scan_info.op_chan; -+ struct rtw89_h2c_scanofld *h2c; -+ u32 len = sizeof(*h2c); - struct sk_buff *skb; -- u8 *cmd; - int ret; - -- skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, H2C_LEN_SCAN_OFFLOAD); -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len); - if (!skb) { - rtw89_err(rtwdev, "failed to alloc skb for h2c scan offload\n"); - return -ENOMEM; - } -- skb_put(skb, H2C_LEN_SCAN_OFFLOAD); -- cmd = skb->data; -+ skb_put(skb, len); -+ h2c = (struct rtw89_h2c_scanofld *)skb->data; -+ -+ h2c->w0 = le32_encode_bits(rtwvif->mac_id, RTW89_H2C_SCANOFLD_W0_MACID) | -+ le32_encode_bits(rtwvif->port, RTW89_H2C_SCANOFLD_W0_PORT_ID) | -+ le32_encode_bits(RTW89_PHY_0, RTW89_H2C_SCANOFLD_W0_BAND) | -+ le32_encode_bits(option->enable, RTW89_H2C_SCANOFLD_W0_OPERATION); -+ -+ h2c->w1 = le32_encode_bits(true, RTW89_H2C_SCANOFLD_W1_NOTIFY_END) | -+ le32_encode_bits(option->target_ch_mode, -+ RTW89_H2C_SCANOFLD_W1_TARGET_CH_MODE) | -+ le32_encode_bits(RTW89_SCAN_IMMEDIATE, -+ RTW89_H2C_SCANOFLD_W1_START_MODE) | -+ le32_encode_bits(RTW89_SCAN_ONCE, RTW89_H2C_SCANOFLD_W1_SCAN_TYPE); - -- RTW89_SET_FWCMD_SCANOFLD_MACID(cmd, rtwvif->mac_id); -- RTW89_SET_FWCMD_SCANOFLD_PORT_ID(cmd, rtwvif->port); -- RTW89_SET_FWCMD_SCANOFLD_BAND(cmd, RTW89_PHY_0); -- RTW89_SET_FWCMD_SCANOFLD_OPERATION(cmd, option->enable); -- RTW89_SET_FWCMD_SCANOFLD_NOTIFY_END(cmd, true); -- RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_MODE(cmd, option->target_ch_mode); -- RTW89_SET_FWCMD_SCANOFLD_START_MODE(cmd, RTW89_SCAN_IMMEDIATE); -- RTW89_SET_FWCMD_SCANOFLD_SCAN_TYPE(cmd, RTW89_SCAN_ONCE); - if (option->target_ch_mode) { -- RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BW(cmd, op->band_width); -- RTW89_SET_FWCMD_SCANOFLD_TARGET_PRI_CH(cmd, -- op->primary_channel); -- RTW89_SET_FWCMD_SCANOFLD_TARGET_CENTRAL_CH(cmd, op->channel); -- RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BAND(cmd, op->band_type); -+ h2c->w1 |= le32_encode_bits(op->band_width, -+ RTW89_H2C_SCANOFLD_W1_TARGET_CH_BW) | -+ le32_encode_bits(op->primary_channel, -+ RTW89_H2C_SCANOFLD_W1_TARGET_PRI_CH) | -+ le32_encode_bits(op->channel, -+ RTW89_H2C_SCANOFLD_W1_TARGET_CENTRAL_CH); -+ h2c->w0 |= le32_encode_bits(op->band_type, -+ RTW89_H2C_SCANOFLD_W0_TARGET_CH_BAND); - } - - rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, - H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, - H2C_FUNC_SCANOFLD, 1, 1, -- H2C_LEN_SCAN_OFFLOAD); -+ len); - - ret = rtw89_h2c_tx(rtwdev, skb, false); - if (ret) { ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -2731,96 +2731,32 @@ static inline void RTW89_SET_FWCMD_CHINF - le32p_replace_bits((__le32 *)((u8 *)(cmd) + 16), val, GENMASK(15, 0)); - } - --static inline void RTW89_SET_FWCMD_SCANOFLD_MACID(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(7, 0)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_NORM_CY(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(15, 8)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_PORT_ID(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(18, 16)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_BAND(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, BIT(19)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_OPERATION(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(21, 20)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BAND(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd)), val, GENMASK(23, 22)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_NOTIFY_END(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(0)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_MODE(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(1)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_START_MODE(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, BIT(2)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_SCAN_TYPE(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(4, 3)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_CH_BW(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(7, 5)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_PRI_CH(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(15, 8)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_TARGET_CENTRAL_CH(void *cmd, -- u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(23, 16)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_PROBE_REQ_PKT_ID(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd) + 4), val, GENMASK(31, 24)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_NORM_PD(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(15, 0)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_SLOW_PD(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd) + 8), val, GENMASK(23, 16)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_TSF_HIGH(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd) + 12), val, GENMASK(31, 0)); --} -- --static inline void RTW89_SET_FWCMD_SCANOFLD_TSF_SLOW(void *cmd, u32 val) --{ -- le32p_replace_bits((__le32 *)((u8 *)(cmd) + 16), val, GENMASK(31, 0)); --} -+struct rtw89_h2c_scanofld { -+ __le32 w0; -+ __le32 w1; -+ __le32 w2; -+ __le32 tsf_high; -+ __le32 tsf_low; -+ __le32 w5; -+ __le32 w6; -+} __packed; -+ -+#define RTW89_H2C_SCANOFLD_W0_MACID GENMASK(7, 0) -+#define RTW89_H2C_SCANOFLD_W0_NORM_CY GENMASK(15, 8) -+#define RTW89_H2C_SCANOFLD_W0_PORT_ID GENMASK(18, 16) -+#define RTW89_H2C_SCANOFLD_W0_BAND BIT(19) -+#define RTW89_H2C_SCANOFLD_W0_OPERATION GENMASK(21, 20) -+#define RTW89_H2C_SCANOFLD_W0_TARGET_CH_BAND GENMASK(23, 22) -+#define RTW89_H2C_SCANOFLD_W1_NOTIFY_END BIT(0) -+#define RTW89_H2C_SCANOFLD_W1_TARGET_CH_MODE BIT(1) -+#define RTW89_H2C_SCANOFLD_W1_START_MODE BIT(2) -+#define RTW89_H2C_SCANOFLD_W1_SCAN_TYPE GENMASK(4, 3) -+#define RTW89_H2C_SCANOFLD_W1_TARGET_CH_BW GENMASK(7, 5) -+#define RTW89_H2C_SCANOFLD_W1_TARGET_PRI_CH GENMASK(15, 8) -+#define RTW89_H2C_SCANOFLD_W1_TARGET_CENTRAL_CH GENMASK(23, 16) -+#define RTW89_H2C_SCANOFLD_W1_PROBE_REQ_PKT_ID GENMASK(31, 24) -+#define RTW89_H2C_SCANOFLD_W2_NORM_PD GENMASK(15, 0) -+#define RTW89_H2C_SCANOFLD_W2_SLOW_PD GENMASK(23, 16) - - static inline void RTW89_SET_FWCMD_P2P_MACID(void *cmd, u32 val) - { diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-057-wifi-rtw89-update-statistics-to-FW-for-fine-tuning-p.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-057-wifi-rtw89-update-statistics-to-FW-for-fine-tuning-p.patch deleted file mode 100644 index 9c5225b16..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-057-wifi-rtw89-update-statistics-to-FW-for-fine-tuning-p.patch +++ /dev/null @@ -1,116 +0,0 @@ -From ac83f380905591beecfe5b29a9ef811e35a3aa8d Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Sat, 15 Apr 2023 11:48:58 +0800 -Subject: [PATCH 057/136] wifi: rtw89: update statistics to FW for fine-tuning - performance - -Since firmware can't have proper statistics, driver update the -statistics periodically to firmware to assist in tuning performance. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230415034900.15679-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 4 ++- - drivers/net/wireless/realtek/rtw89/fw.c | 41 +++++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/fw.h | 10 ++++++ - 3 files changed, 54 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -2494,8 +2494,10 @@ static bool rtw89_traffic_stats_track(st - bool tfc_changed; - - tfc_changed = rtw89_traffic_stats_calc(rtwdev, &rtwdev->stats); -- rtw89_for_each_rtwvif(rtwdev, rtwvif) -+ rtw89_for_each_rtwvif(rtwdev, rtwvif) { - rtw89_traffic_stats_calc(rtwdev, &rtwvif->stats); -+ rtw89_fw_h2c_tp_offload(rtwdev, rtwvif); -+ } - - return tfc_changed; - } ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -1855,6 +1855,47 @@ fail: - return ret; - } - -+int rtw89_fw_h2c_tp_offload(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif) -+{ -+ struct rtw89_traffic_stats *stats = &rtwvif->stats; -+ struct rtw89_h2c_ofld *h2c; -+ u32 len = sizeof(*h2c); -+ struct sk_buff *skb; -+ int ret; -+ -+ if (rtwvif->net_type != RTW89_NET_TYPE_INFRA) -+ return -EINVAL; -+ -+ skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len); -+ if (!skb) { -+ rtw89_err(rtwdev, "failed to alloc skb for h2c tp\n"); -+ return -ENOMEM; -+ } -+ -+ skb_put(skb, len); -+ h2c = (struct rtw89_h2c_ofld *)skb->data; -+ -+ h2c->w0 = le32_encode_bits(rtwvif->mac_id, RTW89_H2C_OFLD_W0_MAC_ID) | -+ le32_encode_bits(stats->tx_throughput, RTW89_H2C_OFLD_W0_TX_TP) | -+ le32_encode_bits(stats->rx_throughput, RTW89_H2C_OFLD_W0_RX_TP); -+ -+ rtw89_h2c_pkt_set_hdr(rtwdev, skb, FWCMD_TYPE_H2C, -+ H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, -+ H2C_FUNC_OFLD_TP, 0, 1, len); -+ -+ ret = rtw89_h2c_tx(rtwdev, skb, false); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to send h2c\n"); -+ goto fail; -+ } -+ -+ return 0; -+fail: -+ dev_kfree_skb_any(skb); -+ -+ return ret; -+} -+ - #define H2C_RA_LEN 16 - int rtw89_fw_h2c_ra(struct rtw89_dev *rtwdev, struct rtw89_ra_info *ra, bool csi) - { ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -3361,6 +3361,14 @@ struct rtw89_h2c_ofld_rssi { - #define RTW89_H2C_OFLD_RSSI_W0_NUM GENMASK(15, 8) - #define RTW89_H2C_OFLD_RSSI_W1_VAL GENMASK(7, 0) - -+struct rtw89_h2c_ofld { -+ __le32 w0; -+} __packed; -+ -+#define RTW89_H2C_OFLD_W0_MAC_ID GENMASK(7, 0) -+#define RTW89_H2C_OFLD_W0_TX_TP GENMASK(17, 8) -+#define RTW89_H2C_OFLD_W0_RX_TP GENMASK(27, 18) -+ - #define RTW89_FW_HDR_SIZE 32 - #define RTW89_FW_SECTION_HDR_SIZE 16 - -@@ -3499,6 +3507,7 @@ struct rtw89_fw_h2c_rf_reg_info { - #define H2C_FUNC_PKT_DROP 0x1b - #define H2C_FUNC_CFG_BCNFLTR 0x1e - #define H2C_FUNC_OFLD_RSSI 0x1f -+#define H2C_FUNC_OFLD_TP 0x20 - - /* CLASS 10 - Security CAM */ - #define H2C_CL_MAC_SEC_CAM 0xa -@@ -3605,6 +3614,7 @@ int rtw89_fw_h2c_set_bcn_fltr_cfg(struct - bool connect); - int rtw89_fw_h2c_rssi_offload(struct rtw89_dev *rtwdev, - struct rtw89_rx_phy_ppdu *phy_ppdu); -+int rtw89_fw_h2c_tp_offload(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); - int rtw89_fw_h2c_ra(struct rtw89_dev *rtwdev, struct rtw89_ra_info *ra, bool csi); - int rtw89_fw_h2c_cxdrv_init(struct rtw89_dev *rtwdev); - int rtw89_fw_h2c_cxdrv_role(struct rtw89_dev *rtwdev); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-058-wifi-rtw89-Disallow-power-save-with-multiple-station.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-058-wifi-rtw89-Disallow-power-save-with-multiple-station.patch deleted file mode 100644 index 5296f30d1..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-058-wifi-rtw89-Disallow-power-save-with-multiple-station.patch +++ /dev/null @@ -1,30 +0,0 @@ -From 982a91642708bb55246a7b169cb573866260124c Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Sat, 15 Apr 2023 11:50:15 +0800 -Subject: [PATCH 058/136] wifi: rtw89: Disallow power save with multiple - stations - -Power saving for more than one station is not supported currently. -Disallow entering PS mode when we have more than one associated -stations. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230415035016.15788-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -2509,6 +2509,9 @@ static void rtw89_vif_enter_lps(struct r - rtwvif->tdls_peer) - return; - -+ if (rtwdev->total_sta_assoc > 1) -+ return; -+ - if (rtwvif->offchan) - return; - diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-059-wifi-rtw89-add-support-of-concurrent-mode.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-059-wifi-rtw89-add-support-of-concurrent-mode.patch deleted file mode 100644 index 9ec366a01..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-059-wifi-rtw89-add-support-of-concurrent-mode.patch +++ /dev/null @@ -1,59 +0,0 @@ -From f22c0bffe8d9528ace89a853c6065b79dcb88c43 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Sat, 15 Apr 2023 11:50:16 +0800 -Subject: [PATCH 059/136] wifi: rtw89: add support of concurrent mode - -Add iface_combination declaration to enable concurrent mode. Only two -interfaces under same frequency is supported currently. We limit the -role combination to be STA + P2P or STA + AP only for now until new -feature is requested. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230415035016.15788-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 25 +++++++++++++++++++++++ - 1 file changed, 25 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -156,6 +156,28 @@ static struct ieee80211_rate rtw89_bitra - { .bitrate = 540, .hw_value = 0x0b, }, - }; - -+static const struct ieee80211_iface_limit rtw89_iface_limits[] = { -+ { -+ .max = 1, -+ .types = BIT(NL80211_IFTYPE_STATION), -+ }, -+ { -+ .max = 1, -+ .types = BIT(NL80211_IFTYPE_P2P_CLIENT) | -+ BIT(NL80211_IFTYPE_P2P_GO) | -+ BIT(NL80211_IFTYPE_AP), -+ }, -+}; -+ -+static const struct ieee80211_iface_combination rtw89_iface_combs[] = { -+ { -+ .limits = rtw89_iface_limits, -+ .n_limits = ARRAY_SIZE(rtw89_iface_limits), -+ .max_interfaces = 2, -+ .num_different_channels = 1, -+ } -+}; -+ - bool rtw89_ra_report_to_bitrate(struct rtw89_dev *rtwdev, u8 rpt_rate, u16 *bitrate) - { - struct ieee80211_rate rate; -@@ -3834,6 +3856,9 @@ struct rtw89_dev *rtw89_alloc_ieee80211_ - if (!hw) - goto err; - -+ hw->wiphy->iface_combinations = rtw89_iface_combs; -+ hw->wiphy->n_iface_combinations = ARRAY_SIZE(rtw89_iface_combs); -+ - rtwdev = hw->priv; - rtwdev->hw = hw; - rtwdev->dev = device; diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-060-wifi-rtw89-mac-use-regular-int-as-return-type-of-DLE.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-060-wifi-rtw89-mac-use-regular-int-as-return-type-of-DLE.patch deleted file mode 100644 index c886e640f..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-060-wifi-rtw89-mac-use-regular-int-as-return-type-of-DLE.patch +++ /dev/null @@ -1,121 +0,0 @@ -From eaddda248483ff78c4d26f1bf420e5f2af436a74 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 14 Apr 2023 16:22:28 +0800 -Subject: [PATCH 060/136] wifi: rtw89: mac: use regular int as return type of - DLE buffer request - -The function to request DLE (data link engine) buffer uses 'u16' as return -value that mixes error code, so change it to 'int' as regular error code. -Also, treat invalid register value (0xfff) as an error. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230414082228.30766-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/debug.c | 13 ++++--------- - drivers/net/wireless/realtek/rtw89/mac.c | 22 +++++++++++++--------- - drivers/net/wireless/realtek/rtw89/mac.h | 2 +- - drivers/net/wireless/realtek/rtw89/reg.h | 1 + - 4 files changed, 19 insertions(+), 19 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/debug.c -+++ b/drivers/net/wireless/realtek/rtw89/debug.c -@@ -3069,18 +3069,13 @@ static int rtw89_dbg_trigger_ctrl_error( - { - struct rtw89_cpuio_ctrl ctrl_para = {0}; - u16 pkt_id; -+ int ret; - - rtw89_leave_ps_mode(rtwdev); - -- pkt_id = rtw89_mac_dle_buf_req(rtwdev, 0x20, true); -- switch (pkt_id) { -- case 0xffff: -- return -ETIMEDOUT; -- case 0xfff: -- return -ENOMEM; -- default: -- break; -- } -+ ret = rtw89_mac_dle_buf_req(rtwdev, 0x20, true, &pkt_id); -+ if (ret) -+ return ret; - - /* intentionally, enqueue two pkt, but has only one pkt id */ - ctrl_para.cmd_type = CPUIO_OP_CMD_ENQ_TO_HEAD; ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -2813,7 +2813,7 @@ int rtw89_mac_resume_sch_tx_v1(struct rt - } - EXPORT_SYMBOL(rtw89_mac_resume_sch_tx_v1); - --u16 rtw89_mac_dle_buf_req(struct rtw89_dev *rtwdev, u16 buf_len, bool wd) -+int rtw89_mac_dle_buf_req(struct rtw89_dev *rtwdev, u16 buf_len, bool wd, u16 *pkt_id) - { - u32 val, reg; - int ret; -@@ -2828,9 +2828,13 @@ u16 rtw89_mac_dle_buf_req(struct rtw89_d - ret = read_poll_timeout(rtw89_read32, val, val & B_AX_WD_BUF_STAT_DONE, - 1, 2000, false, rtwdev, reg); - if (ret) -- return 0xffff; -+ return ret; -+ -+ *pkt_id = FIELD_GET(B_AX_WD_BUF_STAT_PKTID_MASK, val); -+ if (*pkt_id == S_WD_BUF_STAT_PKTID_INVALID) -+ return -ENOENT; - -- return FIELD_GET(B_AX_WD_BUF_STAT_PKTID_MASK, val); -+ return 0; - } - - int rtw89_mac_set_cpuio(struct rtw89_dev *rtwdev, -@@ -2907,10 +2911,10 @@ static int dle_quota_change(struct rtw89 - - dle_quota_cfg(rtwdev, cfg, INVALID_QT_WCPU); - -- pkt_id = rtw89_mac_dle_buf_req(rtwdev, 0x20, true); -- if (pkt_id == 0xffff) { -+ ret = rtw89_mac_dle_buf_req(rtwdev, 0x20, true, &pkt_id); -+ if (ret) { - rtw89_err(rtwdev, "[ERR]WDE DLE buf req\n"); -- return -ENOMEM; -+ return ret; - } - - ctrl_para.cmd_type = CPUIO_OP_CMD_ENQ_TO_HEAD; -@@ -2925,10 +2929,10 @@ static int dle_quota_change(struct rtw89 - return -EFAULT; - } - -- pkt_id = rtw89_mac_dle_buf_req(rtwdev, 0x20, false); -- if (pkt_id == 0xffff) { -+ ret = rtw89_mac_dle_buf_req(rtwdev, 0x20, false, &pkt_id); -+ if (ret) { - rtw89_err(rtwdev, "[ERR]PLE DLE buf req\n"); -- return -ENOMEM; -+ return ret; - } - - ctrl_para.cmd_type = CPUIO_OP_CMD_ENQ_TO_HEAD; ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -1149,7 +1149,7 @@ enum rtw89_mac_xtal_si_offset { - int rtw89_mac_write_xtal_si(struct rtw89_dev *rtwdev, u8 offset, u8 val, u8 mask); - int rtw89_mac_read_xtal_si(struct rtw89_dev *rtwdev, u8 offset, u8 *val); - void rtw89_mac_pkt_drop_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif); --u16 rtw89_mac_dle_buf_req(struct rtw89_dev *rtwdev, u16 buf_len, bool wd); -+int rtw89_mac_dle_buf_req(struct rtw89_dev *rtwdev, u16 buf_len, bool wd, u16 *pkt_id); - int rtw89_mac_set_cpuio(struct rtw89_dev *rtwdev, - struct rtw89_cpuio_ctrl *ctrl_para, bool wd); - int rtw89_mac_typ_fltr_opt(struct rtw89_dev *rtwdev, ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -1588,6 +1588,7 @@ - #define R_AX_PL_BUF_STATUS 0x9824 - #define B_AX_WD_BUF_STAT_DONE BIT(31) - #define B_AX_WD_BUF_STAT_PKTID_MASK GENMASK(11, 0) -+#define S_WD_BUF_STAT_PKTID_INVALID GENMASK(11, 0) - - #define R_AX_WD_CPUQ_OP_0 0x9810 - #define R_AX_PL_CPUQ_OP_0 0x9830 diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-061-wifi-rtw89-use-struct-rtw89_phy_sts_ie0-instead-of-m.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-061-wifi-rtw89-use-struct-rtw89_phy_sts_ie0-instead-of-m.patch deleted file mode 100644 index 065989eed..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-061-wifi-rtw89-use-struct-rtw89_phy_sts_ie0-instead-of-m.patch +++ /dev/null @@ -1,76 +0,0 @@ -From 9805500606c256cf61ef73a767d7e797fe5ba18e Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Tue, 18 Apr 2023 09:28:14 +0800 -Subject: [PATCH 061/136] wifi: rtw89: use struct rtw89_phy_sts_ie0 instead of - macro to access PHY IE0 status - -To be more clear to know where it gets information from PHY IE0 data, -change to use struct and standard le32_get_bits() to access. This doesn't -change logic at all. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230418012820.5139-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 15 ++++++++++----- - drivers/net/wireless/realtek/rtw89/txrx.h | 16 ++++++++++------ - 2 files changed, 20 insertions(+), 11 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1277,9 +1277,11 @@ static u16 rtw89_core_get_phy_status_ie_ - static void rtw89_core_parse_phy_status_ie01(struct rtw89_dev *rtwdev, u8 *addr, - struct rtw89_rx_phy_ppdu *phy_ppdu) - { -+ const struct rtw89_phy_sts_ie0 *ie = (const struct rtw89_phy_sts_ie0 *)addr; - s16 cfo; -+ u32 t; - -- phy_ppdu->chan_idx = RTW89_GET_PHY_STS_IE01_CH_IDX(addr); -+ phy_ppdu->chan_idx = le32_get_bits(ie->w0, RTW89_PHY_STS_IE01_W0_CH_IDX); - if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6) - return; - -@@ -1287,10 +1289,13 @@ static void rtw89_core_parse_phy_status_ - return; - - /* sign conversion for S(12,2) */ -- if (rtwdev->chip->cfo_src_fd) -- cfo = sign_extend32(RTW89_GET_PHY_STS_IE01_FD_CFO(addr), 11); -- else -- cfo = sign_extend32(RTW89_GET_PHY_STS_IE01_PREMB_CFO(addr), 11); -+ if (rtwdev->chip->cfo_src_fd) { -+ t = le32_get_bits(ie->w1, RTW89_PHY_STS_IE01_W1_FD_CFO); -+ cfo = sign_extend32(t, 11); -+ } else { -+ t = le32_get_bits(ie->w1, RTW89_PHY_STS_IE01_W1_PREMB_CFO); -+ cfo = sign_extend32(t, 11); -+ } - - rtw89_phy_cfo_parse(rtwdev, cfo, phy_ppdu); - } ---- a/drivers/net/wireless/realtek/rtw89/txrx.h -+++ b/drivers/net/wireless/realtek/rtw89/txrx.h -@@ -298,12 +298,16 @@ - le32_get_bits(*((const __le32 *)ie), GENMASK(4, 0)) - #define RTW89_GET_PHY_STS_IE_LEN(ie) \ - le32_get_bits(*((const __le32 *)ie), GENMASK(11, 5)) --#define RTW89_GET_PHY_STS_IE01_CH_IDX(ie) \ -- le32_get_bits(*((const __le32 *)ie), GENMASK(23, 16)) --#define RTW89_GET_PHY_STS_IE01_FD_CFO(ie) \ -- le32_get_bits(*((const __le32 *)(ie) + 1), GENMASK(19, 8)) --#define RTW89_GET_PHY_STS_IE01_PREMB_CFO(ie) \ -- le32_get_bits(*((const __le32 *)(ie) + 1), GENMASK(31, 20)) -+ -+struct rtw89_phy_sts_ie0 { -+ __le32 w0; -+ __le32 w1; -+ __le32 w2; -+} __packed; -+ -+#define RTW89_PHY_STS_IE01_W0_CH_IDX GENMASK(23, 16) -+#define RTW89_PHY_STS_IE01_W1_FD_CFO GENMASK(19, 8) -+#define RTW89_PHY_STS_IE01_W1_PREMB_CFO GENMASK(31, 20) - - enum rtw89_tx_channel { - RTW89_TXCH_ACH0 = 0, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-062-wifi-rtw89-set-capability-of-TX-antenna-diversity.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-062-wifi-rtw89-set-capability-of-TX-antenna-diversity.patch deleted file mode 100644 index eace3291d..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-062-wifi-rtw89-set-capability-of-TX-antenna-diversity.patch +++ /dev/null @@ -1,113 +0,0 @@ -From f48453e058d763e895bde7b072f25b7b519a3500 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Tue, 18 Apr 2023 09:28:15 +0800 -Subject: [PATCH 062/136] wifi: rtw89: set capability of TX antenna diversity - -TX antenna diversity is a mechanism to select a proper antenna from two -antenna for single one hardware PHY chip. It chooses antenna with better -EVM or RSSI, and use GPIO to control SPDT to switch selected antenna. - -RFE type from efuse is used to define if a module can support TX antenna -diversity when (type % 3) is 2. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230418012820.5139-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 10 ++++++++-- - drivers/net/wireless/realtek/rtw89/core.h | 2 ++ - drivers/net/wireless/realtek/rtw89/mac.c | 9 +++++++++ - drivers/net/wireless/realtek/rtw89/mac80211.c | 7 ++++++- - 4 files changed, 25 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -3701,6 +3701,7 @@ static int rtw89_core_register_hw(struct - { - struct ieee80211_hw *hw = rtwdev->hw; - struct rtw89_efuse *efuse = &rtwdev->efuse; -+ struct rtw89_hal *hal = &rtwdev->hal; - int ret; - int tx_headroom = IEEE80211_HT_CTL_LEN; - -@@ -3739,8 +3740,13 @@ static int rtw89_core_register_hw(struct - BIT(NL80211_IFTYPE_P2P_CLIENT) | - BIT(NL80211_IFTYPE_P2P_GO); - -- hw->wiphy->available_antennas_tx = BIT(rtwdev->chip->rf_path_num) - 1; -- hw->wiphy->available_antennas_rx = BIT(rtwdev->chip->rf_path_num) - 1; -+ if (hal->ant_diversity) { -+ hw->wiphy->available_antennas_tx = 0x3; -+ hw->wiphy->available_antennas_rx = 0x3; -+ } else { -+ hw->wiphy->available_antennas_tx = BIT(rtwdev->chip->rf_path_num) - 1; -+ hw->wiphy->available_antennas_rx = BIT(rtwdev->chip->rf_path_num) - 1; -+ } - - hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_TDLS | - WIPHY_FLAG_TDLS_EXTERNAL_SETUP | ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3423,6 +3423,8 @@ struct rtw89_hal { - u8 tx_nss; - u8 rx_nss; - bool tx_path_diversity; -+ bool ant_diversity; -+ bool ant_diversity_fixed; - bool support_cckpd; - bool support_igi; - atomic_t roc_entity_idx; ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -2598,6 +2598,7 @@ static int rtw89_mac_read_phycap(struct - - int rtw89_mac_setup_phycap(struct rtw89_dev *rtwdev) - { -+ struct rtw89_efuse *efuse = &rtwdev->efuse; - struct rtw89_hal *hal = &rtwdev->hal; - const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_mac_c2h_info c2h_info = {0}; -@@ -2629,6 +2630,13 @@ int rtw89_mac_setup_phycap(struct rtw89_ - hal->tx_path_diversity = true; - } - -+ if (chip->rf_path_num == 1) { -+ hal->antenna_tx = RF_A; -+ hal->antenna_rx = RF_A; -+ if ((efuse->rfe_type % 3) == 2) -+ hal->ant_diversity = true; -+ } -+ - rtw89_debug(rtwdev, RTW89_DBG_FW, - "phycap hal/phy/chip: tx_nss=0x%x/0x%x/0x%x rx_nss=0x%x/0x%x/0x%x\n", - hal->tx_nss, tx_nss, chip->tx_nss, -@@ -2637,6 +2645,7 @@ int rtw89_mac_setup_phycap(struct rtw89_ - "ant num/bitmap: tx=%d/0x%x rx=%d/0x%x\n", - tx_ant, hal->antenna_tx, rx_ant, hal->antenna_rx); - rtw89_debug(rtwdev, RTW89_DBG_FW, "TX path diversity=%d\n", hal->tx_path_diversity); -+ rtw89_debug(rtwdev, RTW89_DBG_FW, "Antenna diversity=%d\n", hal->ant_diversity); - - return 0; - } ---- a/drivers/net/wireless/realtek/rtw89/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -762,13 +762,18 @@ int rtw89_ops_set_antenna(struct ieee802 - struct rtw89_dev *rtwdev = hw->priv; - struct rtw89_hal *hal = &rtwdev->hal; - -- if (rx_ant != hw->wiphy->available_antennas_rx && rx_ant != hal->antenna_rx) -+ if (hal->ant_diversity) { -+ if (tx_ant != rx_ant || hweight32(tx_ant) != 1) -+ return -EINVAL; -+ } else if (rx_ant != hw->wiphy->available_antennas_rx && rx_ant != hal->antenna_rx) { - return -EINVAL; -+ } - - mutex_lock(&rtwdev->mutex); - hal->antenna_tx = tx_ant; - hal->antenna_rx = rx_ant; - hal->tx_path_diversity = false; -+ hal->ant_diversity_fixed = true; - mutex_unlock(&rtwdev->mutex); - - return 0; diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-063-wifi-rtw89-add-RSSI-statistics-for-the-case-of-anten.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-063-wifi-rtw89-add-RSSI-statistics-for-the-case-of-anten.patch deleted file mode 100644 index e0b1d3574..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-063-wifi-rtw89-add-RSSI-statistics-for-the-case-of-anten.patch +++ /dev/null @@ -1,92 +0,0 @@ -From f6b24241cbec5236c061f90d52acb3d9430f2d43 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Tue, 18 Apr 2023 09:28:16 +0800 -Subject: [PATCH 063/136] wifi: rtw89: add RSSI statistics for the case of - antenna diversity to debugfs - -RSSI strength is only from PHY path A, but there are two antenna for the -module which supports antenna diversity. So, set RSSI value to index 1 of -RSSI array if current antenna is on antenna B. Then, debugfs can show -two RSSI values with a asterisk mark on selected antenna. - - RSSI: -23 dBm (raw=174, prev=173) [-26, -23*] - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230418012820.5139-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 20 +++++++++++++++++--- - drivers/net/wireless/realtek/rtw89/debug.c | 8 +++++--- - 2 files changed, 22 insertions(+), 6 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1244,10 +1244,22 @@ static void rtw89_core_rx_process_phy_pp - struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; - struct rtw89_rx_phy_ppdu *phy_ppdu = (struct rtw89_rx_phy_ppdu *)data; - struct rtw89_dev *rtwdev = rtwsta->rtwdev; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ u8 ant_num = hal->ant_diversity ? 2 : rtwdev->chip->rf_path_num; -+ u8 ant_pos = U8_MAX; - int i; - -- if (rtwsta->mac_id == phy_ppdu->mac_id && phy_ppdu->to_self) { -- ewma_rssi_add(&rtwsta->avg_rssi, phy_ppdu->rssi_avg); -+ if (rtwsta->mac_id != phy_ppdu->mac_id || !phy_ppdu->to_self) -+ return; -+ -+ if (hal->ant_diversity && hal->antenna_rx) -+ ant_pos = __ffs(hal->antenna_rx); -+ -+ ewma_rssi_add(&rtwsta->avg_rssi, phy_ppdu->rssi_avg); -+ -+ if (ant_pos < ant_num) { -+ ewma_rssi_add(&rtwsta->rssi[ant_pos], phy_ppdu->rssi[0]); -+ } else { - for (i = 0; i < rtwdev->chip->rf_path_num; i++) - ewma_rssi_add(&rtwsta->rssi[i], phy_ppdu->rssi[i]); - } -@@ -2764,6 +2776,8 @@ int rtw89_core_sta_add(struct rtw89_dev - { - struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; - struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ u8 ant_num = hal->ant_diversity ? 2 : rtwdev->chip->rf_path_num; - int i; - int ret; - -@@ -2777,7 +2791,7 @@ int rtw89_core_sta_add(struct rtw89_dev - rtw89_core_txq_init(rtwdev, sta->txq[i]); - - ewma_rssi_init(&rtwsta->avg_rssi); -- for (i = 0; i < rtwdev->chip->rf_path_num; i++) -+ for (i = 0; i < ant_num; i++) - ewma_rssi_init(&rtwsta->rssi[i]); - - if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) { ---- a/drivers/net/wireless/realtek/rtw89/debug.c -+++ b/drivers/net/wireless/realtek/rtw89/debug.c -@@ -3206,6 +3206,8 @@ static void rtw89_sta_info_get_iter(void - struct seq_file *m = (struct seq_file *)data; - struct rtw89_dev *rtwdev = rtwsta->rtwdev; - struct rtw89_hal *hal = &rtwdev->hal; -+ u8 ant_num = hal->ant_diversity ? 2 : rtwdev->chip->rf_path_num; -+ bool ant_asterisk = hal->tx_path_diversity || hal->ant_diversity; - u8 rssi; - int i; - -@@ -3256,11 +3258,11 @@ static void rtw89_sta_info_get_iter(void - rssi = ewma_rssi_read(&rtwsta->avg_rssi); - seq_printf(m, "RSSI: %d dBm (raw=%d, prev=%d) [", - RTW89_RSSI_RAW_TO_DBM(rssi), rssi, rtwsta->prev_rssi); -- for (i = 0; i < rtwdev->chip->rf_path_num; i++) { -+ for (i = 0; i < ant_num; i++) { - rssi = ewma_rssi_read(&rtwsta->rssi[i]); - seq_printf(m, "%d%s%s", RTW89_RSSI_RAW_TO_DBM(rssi), -- hal->tx_path_diversity && (hal->antenna_tx & BIT(i)) ? "*" : "", -- i + 1 == rtwdev->chip->rf_path_num ? "" : ", "); -+ ant_asterisk && (hal->antenna_tx & BIT(i)) ? "*" : "", -+ i + 1 == ant_num ? "" : ", "); - } - seq_puts(m, "]\n"); - } diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-064-wifi-rtw89-add-EVM-and-SNR-statistics-to-debugfs.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-064-wifi-rtw89-add-EVM-and-SNR-statistics-to-debugfs.patch deleted file mode 100644 index 667121935..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-064-wifi-rtw89-add-EVM-and-SNR-statistics-to-debugfs.patch +++ /dev/null @@ -1,179 +0,0 @@ -From 4bb223a19f9b8c226b357ceedad47a00d88fef3a Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Tue, 18 Apr 2023 09:28:17 +0800 -Subject: [PATCH 064/136] wifi: rtw89: add EVM and SNR statistics to debugfs - -To help debug performance problem, add EVM and SNR statistics to debugfs -that shows - - EVM: [(26.75, 26.75) (25.75, 25.75)] SNR: 40 - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230418012820.5139-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 29 ++++++++++++++++++---- - drivers/net/wireless/realtek/rtw89/core.h | 11 ++++++++ - drivers/net/wireless/realtek/rtw89/debug.c | 16 ++++++++++++ - drivers/net/wireless/realtek/rtw89/txrx.h | 3 +++ - 4 files changed, 54 insertions(+), 5 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1247,13 +1247,16 @@ static void rtw89_core_rx_process_phy_pp - struct rtw89_hal *hal = &rtwdev->hal; - u8 ant_num = hal->ant_diversity ? 2 : rtwdev->chip->rf_path_num; - u8 ant_pos = U8_MAX; -+ u8 evm_pos = 0; - int i; - - if (rtwsta->mac_id != phy_ppdu->mac_id || !phy_ppdu->to_self) - return; - -- if (hal->ant_diversity && hal->antenna_rx) -+ if (hal->ant_diversity && hal->antenna_rx) { - ant_pos = __ffs(hal->antenna_rx); -+ evm_pos = ant_pos; -+ } - - ewma_rssi_add(&rtwsta->avg_rssi, phy_ppdu->rssi_avg); - -@@ -1263,6 +1266,12 @@ static void rtw89_core_rx_process_phy_pp - for (i = 0; i < rtwdev->chip->rf_path_num; i++) - ewma_rssi_add(&rtwsta->rssi[i], phy_ppdu->rssi[i]); - } -+ -+ if (phy_ppdu->ofdm.has) { -+ ewma_snr_add(&rtwsta->avg_snr, phy_ppdu->ofdm.avg_snr); -+ ewma_evm_add(&rtwsta->evm_min[evm_pos], phy_ppdu->ofdm.evm_min); -+ ewma_evm_add(&rtwsta->evm_max[evm_pos], phy_ppdu->ofdm.evm_max); -+ } - } - - #define VAR_LEN 0xff -@@ -1300,6 +1309,11 @@ static void rtw89_core_parse_phy_status_ - if (!phy_ppdu->to_self) - return; - -+ phy_ppdu->ofdm.avg_snr = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_AVG_SNR); -+ phy_ppdu->ofdm.evm_max = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_EVM_MAX); -+ phy_ppdu->ofdm.evm_min = le32_get_bits(ie->w2, RTW89_PHY_STS_IE01_W2_EVM_MIN); -+ phy_ppdu->ofdm.has = true; -+ - /* sign conversion for S(12,2) */ - if (rtwdev->chip->cfo_src_fd) { - t = le32_get_bits(ie->w1, RTW89_PHY_STS_IE01_W1_FD_CFO); -@@ -1350,9 +1364,6 @@ static int rtw89_core_rx_process_phy_ppd - return -EINVAL; - } - rtw89_core_update_phy_ppdu(phy_ppdu); -- ieee80211_iterate_stations_atomic(rtwdev->hw, -- rtw89_core_rx_process_phy_ppdu_iter, -- phy_ppdu); - - return 0; - } -@@ -1393,6 +1404,10 @@ static void rtw89_core_rx_process_phy_st - rtw89_debug(rtwdev, RTW89_DBG_TXRX, "parse phy sts failed\n"); - else - phy_ppdu->valid = true; -+ -+ ieee80211_iterate_stations_atomic(rtwdev->hw, -+ rtw89_core_rx_process_phy_ppdu_iter, -+ phy_ppdu); - } - - static u8 rtw89_rxdesc_to_nl_he_gi(struct rtw89_dev *rtwdev, -@@ -2791,8 +2806,12 @@ int rtw89_core_sta_add(struct rtw89_dev - rtw89_core_txq_init(rtwdev, sta->txq[i]); - - ewma_rssi_init(&rtwsta->avg_rssi); -- for (i = 0; i < ant_num; i++) -+ ewma_snr_init(&rtwsta->avg_snr); -+ for (i = 0; i < ant_num; i++) { - ewma_rssi_init(&rtwsta->rssi[i]); -+ ewma_evm_init(&rtwsta->evm_min[i]); -+ ewma_evm_init(&rtwsta->evm_max[i]); -+ } - - if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) { - /* for station mode, assign the mac_id from itself */ ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -551,6 +551,12 @@ struct rtw89_rx_phy_ppdu { - u8 chan_idx; - u8 ie; - u16 rate; -+ struct { -+ bool has; -+ u8 avg_snr; -+ u8 evm_max; -+ u8 evm_min; -+ } ofdm; - bool to_self; - bool valid; - }; -@@ -2533,6 +2539,8 @@ struct rtw89_ra_report { - }; - - DECLARE_EWMA(rssi, 10, 16); -+DECLARE_EWMA(evm, 10, 16); -+DECLARE_EWMA(snr, 10, 16); - - struct rtw89_ba_cam_entry { - struct list_head list; -@@ -2595,6 +2603,9 @@ struct rtw89_sta { - u8 prev_rssi; - struct ewma_rssi avg_rssi; - struct ewma_rssi rssi[RF_PATH_MAX]; -+ struct ewma_snr avg_snr; -+ struct ewma_evm evm_min[RF_PATH_MAX]; -+ struct ewma_evm evm_max[RF_PATH_MAX]; - struct rtw89_ampdu_params ampdu_params[IEEE80211_NUM_TIDS]; - struct ieee80211_rx_status rx_status; - u16 rx_hw_rate; ---- a/drivers/net/wireless/realtek/rtw89/debug.c -+++ b/drivers/net/wireless/realtek/rtw89/debug.c -@@ -3208,7 +3208,9 @@ static void rtw89_sta_info_get_iter(void - struct rtw89_hal *hal = &rtwdev->hal; - u8 ant_num = hal->ant_diversity ? 2 : rtwdev->chip->rf_path_num; - bool ant_asterisk = hal->tx_path_diversity || hal->ant_diversity; -+ u8 evm_min, evm_max; - u8 rssi; -+ u8 snr; - int i; - - seq_printf(m, "TX rate [%d]: ", rtwsta->mac_id); -@@ -3265,6 +3267,20 @@ static void rtw89_sta_info_get_iter(void - i + 1 == ant_num ? "" : ", "); - } - seq_puts(m, "]\n"); -+ -+ seq_puts(m, "EVM: ["); -+ for (i = 0; i < (hal->ant_diversity ? 2 : 1); i++) { -+ evm_min = ewma_evm_read(&rtwsta->evm_min[i]); -+ evm_max = ewma_evm_read(&rtwsta->evm_max[i]); -+ -+ seq_printf(m, "%s(%2u.%02u, %2u.%02u)", i == 0 ? "" : " ", -+ evm_min >> 2, (evm_min & 0x3) * 25, -+ evm_max >> 2, (evm_max & 0x3) * 25); -+ } -+ seq_puts(m, "]\t"); -+ -+ snr = ewma_snr_read(&rtwsta->avg_snr); -+ seq_printf(m, "SNR: %u\n", snr); - } - - static void ---- a/drivers/net/wireless/realtek/rtw89/txrx.h -+++ b/drivers/net/wireless/realtek/rtw89/txrx.h -@@ -308,6 +308,9 @@ struct rtw89_phy_sts_ie0 { - #define RTW89_PHY_STS_IE01_W0_CH_IDX GENMASK(23, 16) - #define RTW89_PHY_STS_IE01_W1_FD_CFO GENMASK(19, 8) - #define RTW89_PHY_STS_IE01_W1_PREMB_CFO GENMASK(31, 20) -+#define RTW89_PHY_STS_IE01_W2_AVG_SNR GENMASK(5, 0) -+#define RTW89_PHY_STS_IE01_W2_EVM_MAX GENMASK(15, 8) -+#define RTW89_PHY_STS_IE01_W2_EVM_MIN GENMASK(23, 16) - - enum rtw89_tx_channel { - RTW89_TXCH_ACH0 = 0, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-065-wifi-rtw89-initialize-antenna-for-antenna-diversity.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-065-wifi-rtw89-initialize-antenna-for-antenna-diversity.patch deleted file mode 100644 index 90fb8fef3..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-065-wifi-rtw89-initialize-antenna-for-antenna-diversity.patch +++ /dev/null @@ -1,149 +0,0 @@ -From a90c613d099ff63587b60bfcfb0f4f1a7bb83252 Mon Sep 17 00:00:00 2001 -From: Eric Huang -Date: Tue, 18 Apr 2023 09:28:18 +0800 -Subject: [PATCH 065/136] wifi: rtw89: initialize antenna for antenna diversity - -Initialize basic antenna switch settings according to hardware module -design, and set to default antenna A. The set antenna function will be -called dynamically to switch antenna according to EVM and RSSI. - -Signed-off-by: Eric Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230418012820.5139-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/phy.c | 69 ++++++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/reg.h | 21 +++++++- - 2 files changed, 88 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -2946,6 +2946,44 @@ static void rtw89_phy_ul_tb_info_init(st - rtw89_phy_read32_mask(rtwdev, R_BANDEDGE, B_BANDEDGE_EN); - } - -+static void rtw89_phy_antdiv_reg_init(struct rtw89_dev *rtwdev) -+{ -+ rtw89_phy_write32_idx(rtwdev, R_P0_TRSW, B_P0_ANT_TRAIN_EN, -+ 0x0, RTW89_PHY_0); -+ rtw89_phy_write32_idx(rtwdev, R_P0_TRSW, B_P0_TX_ANT_SEL, -+ 0x0, RTW89_PHY_0); -+ -+ rtw89_phy_write32_idx(rtwdev, R_P0_ANT_SW, B_P0_TRSW_TX_EXTEND, -+ 0x0, RTW89_PHY_0); -+ rtw89_phy_write32_idx(rtwdev, R_P0_ANT_SW, B_P0_HW_ANTSW_DIS_BY_GNT_BT, -+ 0x0, RTW89_PHY_0); -+ -+ rtw89_phy_write32_idx(rtwdev, R_P0_TRSW, B_P0_BT_FORCE_ANTIDX_EN, -+ 0x0, RTW89_PHY_0); -+ -+ rtw89_phy_write32_idx(rtwdev, R_RFSW_CTRL_ANT0_BASE, B_RFSW_CTRL_ANT_MAPPING, -+ 0x0100, RTW89_PHY_0); -+ -+ rtw89_phy_write32_idx(rtwdev, R_P0_ANTSEL, B_P0_ANTSEL_BTG_TRX, -+ 0x1, RTW89_PHY_0); -+ rtw89_phy_write32_idx(rtwdev, R_P0_ANTSEL, B_P0_ANTSEL_HW_CTRL, -+ 0x0, RTW89_PHY_0); -+ rtw89_phy_write32_idx(rtwdev, R_P0_ANTSEL, B_P0_ANTSEL_SW_2G, -+ 0x0, RTW89_PHY_0); -+ rtw89_phy_write32_idx(rtwdev, R_P0_ANTSEL, B_P0_ANTSEL_SW_5G, -+ 0x0, RTW89_PHY_0); -+} -+ -+static void rtw89_phy_antdiv_init(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_hal *hal = &rtwdev->hal; -+ -+ if (!hal->ant_diversity) -+ return; -+ -+ rtw89_phy_antdiv_reg_init(rtwdev); -+} -+ - static void rtw89_phy_stat_thermal_update(struct rtw89_dev *rtwdev) - { - struct rtw89_phy_stat *phystat = &rtwdev->phystat; -@@ -4114,6 +4152,35 @@ void rtw89_phy_tx_path_div_track(struct - &done); - } - -+#define ANTDIV_MAIN 0 -+#define ANTDIV_AUX 1 -+ -+static void rtw89_phy_antdiv_set_ant(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_hal *hal = &rtwdev->hal; -+ u8 default_ant, optional_ant; -+ -+ if (!hal->ant_diversity || hal->antenna_tx == 0) -+ return; -+ -+ if (hal->antenna_tx == RF_B) { -+ default_ant = ANTDIV_AUX; -+ optional_ant = ANTDIV_MAIN; -+ } else { -+ default_ant = ANTDIV_MAIN; -+ optional_ant = ANTDIV_AUX; -+ } -+ -+ rtw89_phy_write32_idx(rtwdev, R_P0_ANTSEL, B_P0_ANTSEL_CGCS_CTRL, -+ default_ant, RTW89_PHY_0); -+ rtw89_phy_write32_idx(rtwdev, R_P0_ANTSEL, B_P0_ANTSEL_RX_ORI, -+ default_ant, RTW89_PHY_0); -+ rtw89_phy_write32_idx(rtwdev, R_P0_ANTSEL, B_P0_ANTSEL_RX_ALT, -+ optional_ant, RTW89_PHY_0); -+ rtw89_phy_write32_idx(rtwdev, R_P0_ANTSEL, B_P0_ANTSEL_TX_ORI, -+ default_ant, RTW89_PHY_0); -+} -+ - static void rtw89_phy_env_monitor_init(struct rtw89_dev *rtwdev) - { - rtw89_phy_ccx_top_setting_init(rtwdev); -@@ -4133,6 +4200,8 @@ void rtw89_phy_dm_init(struct rtw89_dev - rtw89_phy_dig_init(rtwdev); - rtw89_phy_cfo_init(rtwdev); - rtw89_phy_ul_tb_info_init(rtwdev); -+ rtw89_phy_antdiv_init(rtwdev); -+ rtw89_phy_antdiv_set_ant(rtwdev); - - rtw89_phy_init_rf_nctl(rtwdev); - rtw89_chip_rfk_init(rtwdev); ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3852,6 +3852,9 @@ - #define B_ENABLE_CCK BIT(5) - #define R_RSTB_ASYNC 0x0704 - #define B_RSTB_ASYNC_ALL BIT(1) -+#define R_P0_ANT_SW 0x0728 -+#define B_P0_HW_ANTSW_DIS_BY_GNT_BT BIT(12) -+#define B_P0_TRSW_TX_EXTEND GENMASK(3, 0) - #define R_MAC_PIN_SEL 0x0734 - #define B_CH_IDX_SEG0 GENMASK(23, 16) - #define R_PLCP_HISTOGRAM 0x0738 -@@ -4455,10 +4458,24 @@ - #define B_P0_RFCTM_VAL GENMASK(25, 20) - #define R_P0_RFCTM_RDY BIT(26) - #define R_P0_TRSW 0x5868 --#define B_P0_TRSW_B BIT(0) --#define B_P0_TRSW_A BIT(1) -+#define B_P0_BT_FORCE_ANTIDX_EN BIT(12) - #define B_P0_TRSW_X BIT(2) -+#define B_P0_TRSW_A BIT(1) -+#define B_P0_TX_ANT_SEL BIT(1) -+#define B_P0_TRSW_B BIT(0) -+#define B_P0_ANT_TRAIN_EN BIT(0) - #define B_P0_TRSW_SO_A2 GENMASK(7, 5) -+#define R_P0_ANTSEL 0x586C -+#define B_P0_ANTSEL_SW_5G BIT(25) -+#define B_P0_ANTSEL_SW_2G BIT(23) -+#define B_P0_ANTSEL_BTG_TRX BIT(21) -+#define B_P0_ANTSEL_CGCS_CTRL BIT(17) -+#define B_P0_ANTSEL_HW_CTRL BIT(16) -+#define B_P0_ANTSEL_TX_ORI GENMASK(15, 12) -+#define B_P0_ANTSEL_RX_ALT GENMASK(11, 8) -+#define B_P0_ANTSEL_RX_ORI GENMASK(7, 4) -+#define R_RFSW_CTRL_ANT0_BASE 0x5870 -+#define B_RFSW_CTRL_ANT_MAPPING GENMASK(15, 0) - #define R_P0_RFM 0x5894 - #define B_P0_RFM_DIS_WL BIT(7) - #define B_P0_RFM_TX_OPT BIT(6) diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-066-wifi-rtw89-add-RSSI-based-antenna-diversity.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-066-wifi-rtw89-add-RSSI-based-antenna-diversity.patch deleted file mode 100644 index 6811a3b39..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-066-wifi-rtw89-add-RSSI-based-antenna-diversity.patch +++ /dev/null @@ -1,345 +0,0 @@ -From e3715859c75322fae560c46384f944006f367515 Mon Sep 17 00:00:00 2001 -From: Eric Huang -Date: Tue, 18 Apr 2023 09:28:19 +0800 -Subject: [PATCH 066/136] wifi: rtw89: add RSSI based antenna diversity - -RSSI statistics are grouped by CCK, OFDM or non-legacy rate. These -statistics will be collected in training state for both (main/aux) -antenna. There is a time period (ANTDIV_DELAY) for rate adaptive -settle down before start collect statistics when switch antenna. - -Antenna diversity checks packet count from training state for each -group and use the most one as the final RSSI for comparison, and -then choose the better one as target antenna. - -Signed-off-by: Eric Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230418012820.5139-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 5 + - drivers/net/wireless/realtek/rtw89/core.h | 20 +++ - drivers/net/wireless/realtek/rtw89/phy.c | 177 ++++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/phy.h | 12 ++ - 4 files changed, 214 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1391,6 +1391,8 @@ static int rtw89_core_rx_parse_phy_sts(s - } - } - -+ rtw89_phy_antdiv_parse(rtwdev, phy_ppdu); -+ - return 0; - } - -@@ -2628,6 +2630,7 @@ static void rtw89_track_work(struct work - rtw89_phy_ra_update(rtwdev); - rtw89_phy_cfo_track(rtwdev); - rtw89_phy_tx_path_div_track(rtwdev); -+ rtw89_phy_antdiv_track(rtwdev); - rtw89_phy_ul_tb_ctrl_track(rtwdev); - - if (rtwdev->lps_enabled && !rtwdev->btc.lps) -@@ -3482,6 +3485,7 @@ void rtw89_core_stop(struct rtw89_dev *r - cancel_delayed_work_sync(&rtwdev->coex_rfk_chk_work); - cancel_delayed_work_sync(&rtwdev->cfo_track_work); - cancel_delayed_work_sync(&rtwdev->forbid_ba_work); -+ cancel_delayed_work_sync(&rtwdev->antdiv_work); - - mutex_lock(&rtwdev->mutex); - -@@ -3517,6 +3521,7 @@ int rtw89_core_init(struct rtw89_dev *rt - INIT_DELAYED_WORK(&rtwdev->coex_rfk_chk_work, rtw89_coex_rfk_chk_work); - INIT_DELAYED_WORK(&rtwdev->cfo_track_work, rtw89_phy_cfo_track_work); - INIT_DELAYED_WORK(&rtwdev->forbid_ba_work, rtw89_forbid_ba_work); -+ INIT_DELAYED_WORK(&rtwdev->antdiv_work, rtw89_phy_antdiv_work); - rtwdev->txq_wq = alloc_workqueue("rtw89_tx_wq", WQ_UNBOUND | WQ_HIGHPRI, 0); - if (!rtwdev->txq_wq) - return -ENOMEM; ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3127,6 +3127,24 @@ struct rtw89_phy_ul_tb_info { - u8 def_if_bandedge; - }; - -+struct rtw89_antdiv_stats { -+ struct ewma_rssi cck_rssi_avg; -+ struct ewma_rssi ofdm_rssi_avg; -+ struct ewma_rssi non_legacy_rssi_avg; -+ u16 pkt_cnt_cck; -+ u16 pkt_cnt_ofdm; -+ u16 pkt_cnt_non_legacy; -+}; -+ -+struct rtw89_antdiv_info { -+ struct rtw89_antdiv_stats target_stats; -+ struct rtw89_antdiv_stats main_stats; -+ struct rtw89_antdiv_stats aux_stats; -+ u8 training_count; -+ u8 rssi_pre; -+ bool get_stats; -+}; -+ - struct rtw89_chip_info { - enum rtw89_core_chip_id chip_id; - const struct rtw89_chip_ops *ops; -@@ -4099,6 +4117,7 @@ struct rtw89_dev { - struct rtw89_phy_bb_gain_info bb_gain; - struct rtw89_phy_efuse_gain efuse_gain; - struct rtw89_phy_ul_tb_info ul_tb_info; -+ struct rtw89_antdiv_info antdiv; - - struct delayed_work track_work; - struct delayed_work coex_act1_work; -@@ -4107,6 +4126,7 @@ struct rtw89_dev { - struct delayed_work cfo_track_work; - struct delayed_work forbid_ba_work; - struct delayed_work roc_work; -+ struct delayed_work antdiv_work; - struct rtw89_ppdu_sts_info ppdu_sts; - u8 total_sta_assoc; - bool scanning; ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -10,6 +10,7 @@ - #include "ps.h" - #include "reg.h" - #include "sar.h" -+#include "txrx.h" - #include "util.h" - - static u16 get_max_amsdu_len(struct rtw89_dev *rtwdev, -@@ -2946,6 +2947,67 @@ static void rtw89_phy_ul_tb_info_init(st - rtw89_phy_read32_mask(rtwdev, R_BANDEDGE, B_BANDEDGE_EN); - } - -+static -+void rtw89_phy_antdiv_sts_instance_reset(struct rtw89_antdiv_stats *antdiv_sts) -+{ -+ ewma_rssi_init(&antdiv_sts->cck_rssi_avg); -+ ewma_rssi_init(&antdiv_sts->ofdm_rssi_avg); -+ ewma_rssi_init(&antdiv_sts->non_legacy_rssi_avg); -+ antdiv_sts->pkt_cnt_cck = 0; -+ antdiv_sts->pkt_cnt_ofdm = 0; -+ antdiv_sts->pkt_cnt_non_legacy = 0; -+} -+ -+static void rtw89_phy_antdiv_sts_instance_add(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu, -+ struct rtw89_antdiv_stats *stats) -+{ -+ if (GET_DATA_RATE_MODE(phy_ppdu->rate) == DATA_RATE_MODE_NON_HT) { -+ if (phy_ppdu->rate < RTW89_HW_RATE_OFDM6) { -+ ewma_rssi_add(&stats->cck_rssi_avg, phy_ppdu->rssi_avg); -+ stats->pkt_cnt_cck++; -+ } else { -+ ewma_rssi_add(&stats->ofdm_rssi_avg, phy_ppdu->rssi_avg); -+ stats->pkt_cnt_ofdm++; -+ } -+ } else { -+ ewma_rssi_add(&stats->non_legacy_rssi_avg, phy_ppdu->rssi_avg); -+ stats->pkt_cnt_non_legacy++; -+ } -+} -+ -+static u8 rtw89_phy_antdiv_sts_instance_get_rssi(struct rtw89_antdiv_stats *stats) -+{ -+ if (stats->pkt_cnt_non_legacy >= stats->pkt_cnt_cck && -+ stats->pkt_cnt_non_legacy >= stats->pkt_cnt_ofdm) -+ return ewma_rssi_read(&stats->non_legacy_rssi_avg); -+ else if (stats->pkt_cnt_ofdm >= stats->pkt_cnt_cck && -+ stats->pkt_cnt_ofdm >= stats->pkt_cnt_non_legacy) -+ return ewma_rssi_read(&stats->ofdm_rssi_avg); -+ else -+ return ewma_rssi_read(&stats->cck_rssi_avg); -+} -+ -+void rtw89_phy_antdiv_parse(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu) -+{ -+ struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ -+ if (!hal->ant_diversity || hal->ant_diversity_fixed) -+ return; -+ -+ rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->target_stats); -+ -+ if (!antdiv->get_stats) -+ return; -+ -+ if (hal->antenna_rx == RF_A) -+ rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->main_stats); -+ else if (hal->antenna_rx == RF_B) -+ rtw89_phy_antdiv_sts_instance_add(rtwdev, phy_ppdu, &antdiv->aux_stats); -+} -+ - static void rtw89_phy_antdiv_reg_init(struct rtw89_dev *rtwdev) - { - rtw89_phy_write32_idx(rtwdev, R_P0_TRSW, B_P0_ANT_TRAIN_EN, -@@ -2974,13 +3036,26 @@ static void rtw89_phy_antdiv_reg_init(st - 0x0, RTW89_PHY_0); - } - -+static void rtw89_phy_antdiv_sts_reset(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; -+ -+ rtw89_phy_antdiv_sts_instance_reset(&antdiv->target_stats); -+ rtw89_phy_antdiv_sts_instance_reset(&antdiv->main_stats); -+ rtw89_phy_antdiv_sts_instance_reset(&antdiv->aux_stats); -+} -+ - static void rtw89_phy_antdiv_init(struct rtw89_dev *rtwdev) - { -+ struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; - struct rtw89_hal *hal = &rtwdev->hal; - - if (!hal->ant_diversity) - return; - -+ antdiv->get_stats = false; -+ antdiv->rssi_pre = 0; -+ rtw89_phy_antdiv_sts_reset(rtwdev); - rtw89_phy_antdiv_reg_init(rtwdev); - } - -@@ -4181,6 +4256,108 @@ static void rtw89_phy_antdiv_set_ant(str - default_ant, RTW89_PHY_0); - } - -+static void rtw89_phy_swap_hal_antenna(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_hal *hal = &rtwdev->hal; -+ -+ hal->antenna_rx = hal->antenna_rx == RF_A ? RF_B : RF_A; -+ hal->antenna_tx = hal->antenna_rx; -+} -+ -+static void rtw89_phy_antdiv_decision_state(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ bool no_change = false; -+ u8 main_rssi, aux_rssi; -+ u32 candidate; -+ -+ antdiv->get_stats = false; -+ antdiv->training_count = 0; -+ -+ main_rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->main_stats); -+ aux_rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->aux_stats); -+ -+ if (main_rssi > aux_rssi + RTW89_TX_DIV_RSSI_RAW_TH) -+ candidate = RF_A; -+ else if (aux_rssi > main_rssi + RTW89_TX_DIV_RSSI_RAW_TH) -+ candidate = RF_B; -+ else -+ no_change = true; -+ -+ if (no_change) { -+ /* swap back from training antenna to original */ -+ rtw89_phy_swap_hal_antenna(rtwdev); -+ return; -+ } -+ -+ hal->antenna_tx = candidate; -+ hal->antenna_rx = candidate; -+} -+ -+static void rtw89_phy_antdiv_training_state(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; -+ u64 state_period; -+ -+ if (antdiv->training_count % 2 == 0) { -+ if (antdiv->training_count == 0) -+ rtw89_phy_antdiv_sts_reset(rtwdev); -+ -+ antdiv->get_stats = true; -+ state_period = msecs_to_jiffies(ANTDIV_TRAINNING_INTVL); -+ } else { -+ antdiv->get_stats = false; -+ state_period = msecs_to_jiffies(ANTDIV_DELAY); -+ -+ rtw89_phy_swap_hal_antenna(rtwdev); -+ rtw89_phy_antdiv_set_ant(rtwdev); -+ } -+ -+ antdiv->training_count++; -+ ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->antdiv_work, -+ state_period); -+} -+ -+void rtw89_phy_antdiv_work(struct work_struct *work) -+{ -+ struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, -+ antdiv_work.work); -+ struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; -+ -+ mutex_lock(&rtwdev->mutex); -+ -+ if (antdiv->training_count <= ANTDIV_TRAINNING_CNT) { -+ rtw89_phy_antdiv_training_state(rtwdev); -+ } else { -+ rtw89_phy_antdiv_decision_state(rtwdev); -+ rtw89_phy_antdiv_set_ant(rtwdev); -+ } -+ -+ mutex_unlock(&rtwdev->mutex); -+} -+ -+void rtw89_phy_antdiv_track(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_antdiv_info *antdiv = &rtwdev->antdiv; -+ struct rtw89_hal *hal = &rtwdev->hal; -+ u8 rssi, rssi_pre; -+ -+ if (!hal->ant_diversity || hal->ant_diversity_fixed) -+ return; -+ -+ rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->target_stats); -+ rssi_pre = antdiv->rssi_pre; -+ antdiv->rssi_pre = rssi; -+ rtw89_phy_antdiv_sts_instance_reset(&antdiv->target_stats); -+ -+ if (abs((int)rssi - (int)rssi_pre) < ANTDIV_RSSI_DIFF_TH) -+ return; -+ -+ antdiv->training_count = 0; -+ ieee80211_queue_delayed_work(rtwdev->hw, &rtwdev->antdiv_work, 0); -+} -+ - static void rtw89_phy_env_monitor_init(struct rtw89_dev *rtwdev) - { - rtw89_phy_ccx_top_setting_init(rtwdev); ---- a/drivers/net/wireless/realtek/rtw89/phy.h -+++ b/drivers/net/wireless/realtek/rtw89/phy.h -@@ -67,6 +67,14 @@ - #define UL_TB_TF_CNT_L2H_TH 100 - #define UL_TB_TF_CNT_H2L_TH 70 - -+#define ANTDIV_TRAINNING_CNT 2 -+#define ANTDIV_TRAINNING_INTVL 30 -+#define ANTDIV_DELAY 110 -+#define ANTDIV_TP_DIFF_TH_HIGH 100 -+#define ANTDIV_TP_DIFF_TH_LOW 5 -+#define ANTDIV_EVM_DIFF_TH 8 -+#define ANTDIV_RSSI_DIFF_TH 3 -+ - #define CCX_MAX_PERIOD 2097 - #define CCX_MAX_PERIOD_UNIT 32 - #define MS_TO_4US_RATIO 250 -@@ -549,6 +557,10 @@ void rtw89_phy_set_phy_regs(struct rtw89 - void rtw89_phy_dig_reset(struct rtw89_dev *rtwdev); - void rtw89_phy_dig(struct rtw89_dev *rtwdev); - void rtw89_phy_tx_path_div_track(struct rtw89_dev *rtwdev); -+void rtw89_phy_antdiv_parse(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu); -+void rtw89_phy_antdiv_track(struct rtw89_dev *rtwdev); -+void rtw89_phy_antdiv_work(struct work_struct *work); - void rtw89_phy_set_bss_color(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif); - void rtw89_phy_tssi_ctrl_set_bandedge_cfg(struct rtw89_dev *rtwdev, - enum rtw89_mac_idx mac_idx, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-067-wifi-rtw89-add-EVM-for-antenna-diversity.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-067-wifi-rtw89-add-EVM-for-antenna-diversity.patch deleted file mode 100644 index 0ef9c81b8..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-067-wifi-rtw89-add-EVM-for-antenna-diversity.patch +++ /dev/null @@ -1,87 +0,0 @@ -From 5feecb40e735b7cb4173328fabfc49ddc2b3b1bc Mon Sep 17 00:00:00 2001 -From: Eric Huang -Date: Tue, 18 Apr 2023 09:28:20 +0800 -Subject: [PATCH 067/136] wifi: rtw89: add EVM for antenna diversity - -Take EVM into consideration when doing antenna diversity, and the priority -is higher than RSSI. Since EVM is more relevant to performance than RSSI, -especially in OTA environment. - -Signed-off-by: Eric Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230418012820.5139-8-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - drivers/net/wireless/realtek/rtw89/phy.c | 17 ++++++++++++++++- - 2 files changed, 17 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3134,6 +3134,7 @@ struct rtw89_antdiv_stats { - u16 pkt_cnt_cck; - u16 pkt_cnt_ofdm; - u16 pkt_cnt_non_legacy; -+ u32 evm; - }; - - struct rtw89_antdiv_info { ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -2956,6 +2956,7 @@ void rtw89_phy_antdiv_sts_instance_reset - antdiv_sts->pkt_cnt_cck = 0; - antdiv_sts->pkt_cnt_ofdm = 0; - antdiv_sts->pkt_cnt_non_legacy = 0; -+ antdiv_sts->evm = 0; - } - - static void rtw89_phy_antdiv_sts_instance_add(struct rtw89_dev *rtwdev, -@@ -2969,10 +2970,12 @@ static void rtw89_phy_antdiv_sts_instanc - } else { - ewma_rssi_add(&stats->ofdm_rssi_avg, phy_ppdu->rssi_avg); - stats->pkt_cnt_ofdm++; -+ stats->evm += phy_ppdu->ofdm.evm_min; - } - } else { - ewma_rssi_add(&stats->non_legacy_rssi_avg, phy_ppdu->rssi_avg); - stats->pkt_cnt_non_legacy++; -+ stats->evm += phy_ppdu->ofdm.evm_min; - } - } - -@@ -2988,6 +2991,11 @@ static u8 rtw89_phy_antdiv_sts_instance_ - return ewma_rssi_read(&stats->cck_rssi_avg); - } - -+static u8 rtw89_phy_antdiv_sts_instance_get_evm(struct rtw89_antdiv_stats *stats) -+{ -+ return phy_div(stats->evm, stats->pkt_cnt_non_legacy + stats->pkt_cnt_ofdm); -+} -+ - void rtw89_phy_antdiv_parse(struct rtw89_dev *rtwdev, - struct rtw89_rx_phy_ppdu *phy_ppdu) - { -@@ -4270,15 +4278,22 @@ static void rtw89_phy_antdiv_decision_st - struct rtw89_hal *hal = &rtwdev->hal; - bool no_change = false; - u8 main_rssi, aux_rssi; -+ u8 main_evm, aux_evm; - u32 candidate; - - antdiv->get_stats = false; - antdiv->training_count = 0; - - main_rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->main_stats); -+ main_evm = rtw89_phy_antdiv_sts_instance_get_evm(&antdiv->main_stats); - aux_rssi = rtw89_phy_antdiv_sts_instance_get_rssi(&antdiv->aux_stats); -+ aux_evm = rtw89_phy_antdiv_sts_instance_get_evm(&antdiv->aux_stats); - -- if (main_rssi > aux_rssi + RTW89_TX_DIV_RSSI_RAW_TH) -+ if (main_evm > aux_evm + ANTDIV_EVM_DIFF_TH) -+ candidate = RF_A; -+ else if (aux_evm > main_evm + ANTDIV_EVM_DIFF_TH) -+ candidate = RF_B; -+ else if (main_rssi > aux_rssi + RTW89_TX_DIV_RSSI_RAW_TH) - candidate = RF_A; - else if (aux_rssi > main_rssi + RTW89_TX_DIV_RSSI_RAW_TH) - candidate = RF_B; diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-068-wifi-rtw89-release-bit-in-rtw89_fw_h2c_del_pkt_offlo.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-068-wifi-rtw89-release-bit-in-rtw89_fw_h2c_del_pkt_offlo.patch deleted file mode 100644 index 1304d0749..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-068-wifi-rtw89-release-bit-in-rtw89_fw_h2c_del_pkt_offlo.patch +++ /dev/null @@ -1,62 +0,0 @@ -From 25a7e5072ef1901e671e6f39df40b5028b241804 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Wed, 19 Apr 2023 11:45:51 +0000 -Subject: [PATCH 068/136] wifi: rtw89: release bit in - rtw89_fw_h2c_del_pkt_offload() - -We have a pair of FW functions, rtw89_fw_h2c_add_pkt_offload() and -rtw89_fw_h2c_del_pkt_offload(). The rtw89_fw_h2c_add_pkt_offload() -acquires the bit itself, but the bit needs to be released by the -caller of rtw89_fw_h2c_del_pkt_offload(). This looks asymmetrical -and is not friendly to callers. - -Second, if callers always releases the bits, it might make driver -unaligned to bitmap status of FW after some failures of calling -rtw89_fw_h2c_del_pkt_offload(). So, this commit move bit release -into rtw89_fw_h2c_del_pkt_offload(). - -In general, driver will call rtw89_fw_h2c_add_pkt_offload() and -rtw89_fw_h2c_del_pkt_offload(), and then, SW bitmap can align -with FW one. There is one exception when notify_fw is false. -It happens when driver detects FW problems and is going to -reset FW. Only in this case, driver needs to release bits -outside rtw89_fw_h2c_del_pkt_offload(). - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/8cf5d45c5b04e7b680d4eb9dda62056cdce14cec.camel@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 7 +++---- - 1 file changed, 3 insertions(+), 4 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -997,8 +997,8 @@ void rtw89_fw_release_general_pkt_list_v - list_for_each_entry_safe(info, tmp, pkt_list, list) { - if (notify_fw) - rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id); -- rtw89_core_release_bit_map(rtwdev->pkt_offload, -- info->id); -+ else -+ rtw89_core_release_bit_map(rtwdev->pkt_offload, info->id); - list_del(&info->list); - kfree(info); - } -@@ -2466,6 +2466,7 @@ int rtw89_fw_h2c_del_pkt_offload(struct - goto fail; - } - -+ rtw89_core_release_bit_map(rtwdev->pkt_offload, id); - return 0; - fail: - dev_kfree_skb_any(skb); -@@ -3020,8 +3021,6 @@ static void rtw89_release_pkt_list(struc - - list_for_each_entry_safe(info, tmp, &pkt_list[idx], list) { - rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id); -- rtw89_core_release_bit_map(rtwdev->pkt_offload, -- info->id); - list_del(&info->list); - kfree(info); - } diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-069-wifi-rtw89-refine-packet-offload-delete-flow-of-6-GH.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-069-wifi-rtw89-refine-packet-offload-delete-flow-of-6-GH.patch deleted file mode 100644 index f70498a72..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-069-wifi-rtw89-refine-packet-offload-delete-flow-of-6-GH.patch +++ /dev/null @@ -1,152 +0,0 @@ -From 3ea1cd8d027f189c044de142d58c4b0162396db3 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Wed, 19 Apr 2023 11:45:55 +0000 -Subject: [PATCH 069/136] wifi: rtw89: refine packet offload delete flow of 6 - GHz probe - -There are two places where offload packets of 6 GHz probe would be deleted -from FW, i.e. calling rtw89_fw_h2c_del_pkt_offload(). -* rtw89_core_cancel_6ghz_probe_tx() -* rtw89_release_pkt_list() -It is possible that we try to delete the same one from FW twice. Although -it might not be a big problem for now, it will depend on the runtime chip -firmware. So, we add a check to avoid it. In case things becomes complex -due to racing problem, we don't choose to do list_del(info->list) and -kfree(info) in both sides. - -Besides, rtw89_fw_h2c_del_pkt_offload() will needs to wait for completion -after the follow-up commit. However, rtw89_core_cancel_6ghz_probe_tx() -was called in interrupt context. So, we move the stuffs of calling -rtw89_fw_h2c_del_pkt_offload() from rtw89_core_cancel_6ghz_probe_tx() -into a work. Then, we also need a check there before we call it. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/091966e5709cd7caecf9b81f7fd6388ae2b70a7e.camel@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 43 +++++++++++++++++++++-- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - drivers/net/wireless/realtek/rtw89/fw.c | 3 +- - drivers/net/wireless/realtek/rtw89/fw.h | 1 + - 4 files changed, 44 insertions(+), 4 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1515,6 +1515,34 @@ static void rtw89_stats_trigger_frame(st - } - } - -+static void rtw89_cancel_6ghz_probe_work(struct work_struct *work) -+{ -+ struct rtw89_dev *rtwdev = container_of(work, struct rtw89_dev, -+ cancel_6ghz_probe_work); -+ struct list_head *pkt_list = rtwdev->scan_info.pkt_list; -+ struct rtw89_pktofld_info *info; -+ -+ mutex_lock(&rtwdev->mutex); -+ -+ if (!rtwdev->scanning) -+ goto out; -+ -+ list_for_each_entry(info, &pkt_list[NL80211_BAND_6GHZ], list) { -+ if (!info->cancel || !test_bit(info->id, rtwdev->pkt_offload)) -+ continue; -+ -+ rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id); -+ -+ /* Don't delete/free info from pkt_list at this moment. Let it -+ * be deleted/freed in rtw89_release_pkt_list() after scanning, -+ * since if during scanning, pkt_list is accessed in bottom half. -+ */ -+ } -+ -+out: -+ mutex_unlock(&rtwdev->mutex); -+} -+ - static void rtw89_core_cancel_6ghz_probe_tx(struct rtw89_dev *rtwdev, - struct sk_buff *skb) - { -@@ -1523,6 +1551,7 @@ static void rtw89_core_cancel_6ghz_probe - struct list_head *pkt_list = rtwdev->scan_info.pkt_list; - struct rtw89_pktofld_info *info; - const u8 *ies = mgmt->u.beacon.variable, *ssid_ie; -+ bool queue_work = false; - - if (rx_status->band != NL80211_BAND_6GHZ) - return; -@@ -1531,16 +1560,22 @@ static void rtw89_core_cancel_6ghz_probe - - list_for_each_entry(info, &pkt_list[NL80211_BAND_6GHZ], list) { - if (ether_addr_equal(info->bssid, mgmt->bssid)) { -- rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id); -+ info->cancel = true; -+ queue_work = true; - continue; - } - - if (!ssid_ie || ssid_ie[1] != info->ssid_len || info->ssid_len == 0) - continue; - -- if (memcmp(&ssid_ie[2], info->ssid, info->ssid_len) == 0) -- rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id); -+ if (memcmp(&ssid_ie[2], info->ssid, info->ssid_len) == 0) { -+ info->cancel = true; -+ queue_work = true; -+ } - } -+ -+ if (queue_work) -+ ieee80211_queue_work(rtwdev->hw, &rtwdev->cancel_6ghz_probe_work); - } - - static void rtw89_vif_rx_stats_iter(void *data, u8 *mac, -@@ -3474,6 +3509,7 @@ void rtw89_core_stop(struct rtw89_dev *r - mutex_unlock(&rtwdev->mutex); - - cancel_work_sync(&rtwdev->c2h_work); -+ cancel_work_sync(&rtwdev->cancel_6ghz_probe_work); - cancel_work_sync(&btc->eapol_notify_work); - cancel_work_sync(&btc->arp_notify_work); - cancel_work_sync(&btc->dhcp_notify_work); -@@ -3536,6 +3572,7 @@ int rtw89_core_init(struct rtw89_dev *rt - INIT_WORK(&rtwdev->c2h_work, rtw89_fw_c2h_work); - INIT_WORK(&rtwdev->ips_work, rtw89_ips_work); - INIT_WORK(&rtwdev->load_firmware_work, rtw89_load_firmware_work); -+ INIT_WORK(&rtwdev->cancel_6ghz_probe_work, rtw89_cancel_6ghz_probe_work); - - skb_queue_head_init(&rtwdev->c2h_queue); - rtw89_core_ppdu_sts_init(rtwdev); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -4086,6 +4086,7 @@ struct rtw89_dev { - struct work_struct c2h_work; - struct work_struct ips_work; - struct work_struct load_firmware_work; -+ struct work_struct cancel_6ghz_probe_work; - - struct list_head early_h2c_list; - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -3020,7 +3020,8 @@ static void rtw89_release_pkt_list(struc - continue; - - list_for_each_entry_safe(info, tmp, &pkt_list[idx], list) { -- rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id); -+ if (test_bit(info->id, rtwdev->pkt_offload)) -+ rtw89_fw_h2c_del_pkt_offload(rtwdev, info->id); - list_del(&info->list); - kfree(info); - } ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -277,6 +277,7 @@ struct rtw89_pktofld_info { - u8 ssid_len; - u8 bssid[ETH_ALEN]; - u16 channel_6ghz; -+ bool cancel; - }; - - static inline void RTW89_SET_FWCMD_RA_IS_DIS(void *cmd, u32 val) diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-070-wifi-rtw89-packet-offload-wait-for-FW-response.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-070-wifi-rtw89-packet-offload-wait-for-FW-response.patch deleted file mode 100644 index b344cc544..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-070-wifi-rtw89-packet-offload-wait-for-FW-response.patch +++ /dev/null @@ -1,269 +0,0 @@ -From 8febd68be526c9f256c5490dd4b094a70e1b91ba Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Wed, 19 Apr 2023 11:45:58 +0000 -Subject: [PATCH 070/136] wifi: rtw89: packet offload wait for FW response - -The H2Cs (host to chip packets) related to packet offload functions -need to wait for FW responses in case FW state machine gets wrong -and makes driver status no longer able to align FW one. In flow, -driver may continuously send multiple H2Cs of packet offload series. -If somehow FW doesn't deal with the former yet but the latter has -gotten in, it might cause the problem mentioned above. - -So, we block these H2Cs by rtw89_wait_for_cond(). And then, when -the corresponding C2Hs (chip to host packets) is received, we call -rtw89_complete_cond(). Besides, RTW89_MAC_C2H_FUNC_PKT_OFLD_RSP's -C2H handler should be executed in interrupt context to make our -wait/complete process work as expected. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/9ae8c1f105901c65e3171276a9fd6c99ae51803f.camel@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 1 + - drivers/net/wireless/realtek/rtw89/core.h | 19 +++++---- - drivers/net/wireless/realtek/rtw89/fw.c | 34 +++++++++------- - drivers/net/wireless/realtek/rtw89/fw.h | 48 +++++++++++++++++------ - drivers/net/wireless/realtek/rtw89/mac.c | 22 ++++++++++- - 5 files changed, 90 insertions(+), 34 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -3568,6 +3568,7 @@ int rtw89_core_init(struct rtw89_dev *rt - rtwdev->total_sta_assoc = 0; - - rtw89_init_wait(&rtwdev->mcc.wait); -+ rtw89_init_wait(&rtwdev->mac.fw_ofld_wait); - - INIT_WORK(&rtwdev->c2h_work, rtw89_fw_c2h_work); - INIT_WORK(&rtwdev->ips_work, rtw89_ips_work); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3278,14 +3278,6 @@ enum rtw89_host_rpr_mode { - RTW89_RPR_MODE_STF - }; - --struct rtw89_mac_info { -- struct rtw89_dle_info dle_info; -- struct rtw89_hfc_param hfc_param; -- enum rtw89_qta_mode qta_mode; -- u8 rpwm_seq_num; -- u8 cpwm_seq_num; --}; -- - #define RTW89_COMPLETION_BUF_SIZE 24 - #define RTW89_WAIT_COND_IDLE UINT_MAX - -@@ -3308,6 +3300,17 @@ static inline void rtw89_init_wait(struc - atomic_set(&wait->cond, RTW89_WAIT_COND_IDLE); - } - -+struct rtw89_mac_info { -+ struct rtw89_dle_info dle_info; -+ struct rtw89_hfc_param hfc_param; -+ enum rtw89_qta_mode qta_mode; -+ u8 rpwm_seq_num; -+ u8 cpwm_seq_num; -+ -+ /* see RTW89_FW_OFLD_WAIT_COND series for wait condition */ -+ struct rtw89_wait_info fw_ofld_wait; -+}; -+ - enum rtw89_fw_type { - RTW89_FW_NORMAL = 1, - RTW89_FW_WOWLAN = 3, ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -14,6 +14,8 @@ - - static void rtw89_fw_c2h_cmd_handle(struct rtw89_dev *rtwdev, - struct sk_buff *skb); -+static int rtw89_h2c_tx_and_wait(struct rtw89_dev *rtwdev, struct sk_buff *skb, -+ struct rtw89_wait_info *wait, unsigned int cond); - - static struct sk_buff *rtw89_fw_h2c_alloc_skb(struct rtw89_dev *rtwdev, u32 len, - bool header) -@@ -2440,7 +2442,9 @@ fail: - #define H2C_LEN_PKT_OFLD 4 - int rtw89_fw_h2c_del_pkt_offload(struct rtw89_dev *rtwdev, u8 id) - { -+ struct rtw89_wait_info *wait = &rtwdev->mac.fw_ofld_wait; - struct sk_buff *skb; -+ unsigned int cond; - u8 *cmd; - int ret; - -@@ -2460,24 +2464,26 @@ int rtw89_fw_h2c_del_pkt_offload(struct - H2C_FUNC_PACKET_OFLD, 1, 1, - H2C_LEN_PKT_OFLD); - -- ret = rtw89_h2c_tx(rtwdev, skb, false); -+ cond = RTW89_FW_OFLD_WAIT_COND_PKT_OFLD(id, RTW89_PKT_OFLD_OP_DEL); -+ -+ ret = rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); - if (ret) { -- rtw89_err(rtwdev, "failed to send h2c\n"); -- goto fail; -+ rtw89_debug(rtwdev, RTW89_DBG_FW, -+ "failed to del pkt ofld: id %d, ret %d\n", -+ id, ret); -+ return ret; - } - - rtw89_core_release_bit_map(rtwdev->pkt_offload, id); - return 0; --fail: -- dev_kfree_skb_any(skb); -- -- return ret; - } - - int rtw89_fw_h2c_add_pkt_offload(struct rtw89_dev *rtwdev, u8 *id, - struct sk_buff *skb_ofld) - { -+ struct rtw89_wait_info *wait = &rtwdev->mac.fw_ofld_wait; - struct sk_buff *skb; -+ unsigned int cond; - u8 *cmd; - u8 alloc_id; - int ret; -@@ -2508,18 +2514,18 @@ int rtw89_fw_h2c_add_pkt_offload(struct - H2C_FUNC_PACKET_OFLD, 1, 1, - H2C_LEN_PKT_OFLD + skb_ofld->len); - -- ret = rtw89_h2c_tx(rtwdev, skb, false); -+ cond = RTW89_FW_OFLD_WAIT_COND_PKT_OFLD(alloc_id, RTW89_PKT_OFLD_OP_ADD); -+ -+ ret = rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); - if (ret) { -- rtw89_err(rtwdev, "failed to send h2c\n"); -+ rtw89_debug(rtwdev, RTW89_DBG_FW, -+ "failed to add pkt ofld: id %d, ret %d\n", -+ alloc_id, ret); - rtw89_core_release_bit_map(rtwdev->pkt_offload, alloc_id); -- goto fail; -+ return ret; - } - - return 0; --fail: -- dev_kfree_skb_any(skb); -- -- return ret; - } - - #define H2C_LEN_SCAN_LIST_OFFLOAD 4 ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -138,8 +138,13 @@ enum rtw89_pkt_offload_op { - RTW89_PKT_OFLD_OP_ADD, - RTW89_PKT_OFLD_OP_DEL, - RTW89_PKT_OFLD_OP_READ, -+ -+ NUM_OF_RTW89_PKT_OFFLOAD_OP, - }; - -+#define RTW89_PKT_OFLD_WAIT_TAG(pkt_id, pkt_op) \ -+ ((pkt_id) * NUM_OF_RTW89_PKT_OFFLOAD_OP + (pkt_op)) -+ - enum rtw89_scanofld_notify_reason { - RTW89_SCAN_DWELL_NOTIFY, - RTW89_SCAN_PRE_TX_NOTIFY, -@@ -3340,6 +3345,16 @@ static_assert(sizeof(struct rtw89_mac_mc - #define RTW89_GET_MAC_C2H_MCC_STATUS_RPT_TSF_HIGH(c2h) \ - le32_get_bits(*((const __le32 *)(c2h) + 4), GENMASK(31, 0)) - -+struct rtw89_c2h_pkt_ofld_rsp { -+ __le32 w0; -+ __le32 w1; -+ __le32 w2; -+} __packed; -+ -+#define RTW89_C2H_PKT_OFLD_RSP_W2_PTK_ID GENMASK(7, 0) -+#define RTW89_C2H_PKT_OFLD_RSP_W2_PTK_OP GENMASK(10, 8) -+#define RTW89_C2H_PKT_OFLD_RSP_W2_PTK_LEN GENMASK(31, 16) -+ - struct rtw89_h2c_bcnfltr { - __le32 w0; - } __packed; -@@ -3498,17 +3513,28 @@ struct rtw89_fw_h2c_rf_reg_info { - - /* CLASS 9 - FW offload */ - #define H2C_CL_MAC_FW_OFLD 0x9 --#define H2C_FUNC_PACKET_OFLD 0x1 --#define H2C_FUNC_MAC_MACID_PAUSE 0x8 --#define H2C_FUNC_USR_EDCA 0xF --#define H2C_FUNC_TSF32_TOGL 0x10 --#define H2C_FUNC_OFLD_CFG 0x14 --#define H2C_FUNC_ADD_SCANOFLD_CH 0x16 --#define H2C_FUNC_SCANOFLD 0x17 --#define H2C_FUNC_PKT_DROP 0x1b --#define H2C_FUNC_CFG_BCNFLTR 0x1e --#define H2C_FUNC_OFLD_RSSI 0x1f --#define H2C_FUNC_OFLD_TP 0x20 -+enum rtw89_fw_ofld_h2c_func { -+ H2C_FUNC_PACKET_OFLD = 0x1, -+ H2C_FUNC_MAC_MACID_PAUSE = 0x8, -+ H2C_FUNC_USR_EDCA = 0xF, -+ H2C_FUNC_TSF32_TOGL = 0x10, -+ H2C_FUNC_OFLD_CFG = 0x14, -+ H2C_FUNC_ADD_SCANOFLD_CH = 0x16, -+ H2C_FUNC_SCANOFLD = 0x17, -+ H2C_FUNC_PKT_DROP = 0x1b, -+ H2C_FUNC_CFG_BCNFLTR = 0x1e, -+ H2C_FUNC_OFLD_RSSI = 0x1f, -+ H2C_FUNC_OFLD_TP = 0x20, -+ -+ NUM_OF_RTW89_FW_OFLD_H2C_FUNC, -+}; -+ -+#define RTW89_FW_OFLD_WAIT_COND(tag, func) \ -+ ((tag) * NUM_OF_RTW89_FW_OFLD_H2C_FUNC + (func)) -+ -+#define RTW89_FW_OFLD_WAIT_COND_PKT_OFLD(pkt_id, pkt_op) \ -+ RTW89_FW_OFLD_WAIT_COND(RTW89_PKT_OFLD_WAIT_TAG(pkt_id, pkt_op), \ -+ H2C_FUNC_PACKET_OFLD) - - /* CLASS 10 - Security CAM */ - #define H2C_CL_MAC_SEC_CAM 0xa ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -4369,9 +4369,22 @@ rtw89_mac_c2h_bcn_cnt(struct rtw89_dev * - } - - static void --rtw89_mac_c2h_pkt_ofld_rsp(struct rtw89_dev *rtwdev, struct sk_buff *c2h, -+rtw89_mac_c2h_pkt_ofld_rsp(struct rtw89_dev *rtwdev, struct sk_buff *skb_c2h, - u32 len) - { -+ struct rtw89_wait_info *wait = &rtwdev->mac.fw_ofld_wait; -+ const struct rtw89_c2h_pkt_ofld_rsp *c2h = -+ (const struct rtw89_c2h_pkt_ofld_rsp *)skb_c2h->data; -+ u16 pkt_len = le32_get_bits(c2h->w2, RTW89_C2H_PKT_OFLD_RSP_W2_PTK_LEN); -+ u8 pkt_id = le32_get_bits(c2h->w2, RTW89_C2H_PKT_OFLD_RSP_W2_PTK_ID); -+ u8 pkt_op = le32_get_bits(c2h->w2, RTW89_C2H_PKT_OFLD_RSP_W2_PTK_OP); -+ struct rtw89_completion_data data = {}; -+ unsigned int cond; -+ -+ data.err = !pkt_len; -+ cond = RTW89_FW_OFLD_WAIT_COND_PKT_OFLD(pkt_id, pkt_op); -+ -+ rtw89_complete_cond(wait, cond, &data); - } - - static void -@@ -4579,6 +4592,13 @@ bool rtw89_mac_c2h_chk_atomic(struct rtw - switch (class) { - default: - return false; -+ case RTW89_MAC_C2H_CLASS_OFLD: -+ switch (func) { -+ default: -+ return false; -+ case RTW89_MAC_C2H_FUNC_PKT_OFLD_RSP: -+ return true; -+ } - case RTW89_MAC_C2H_CLASS_MCC: - return true; - } diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-071-wifi-rtw89-mac-handle-C2H-receive-done-ACK-in-interr.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-071-wifi-rtw89-mac-handle-C2H-receive-done-ACK-in-interr.patch deleted file mode 100644 index 36a6939c7..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-071-wifi-rtw89-mac-handle-C2H-receive-done-ACK-in-interr.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 32bb12eb73dceeb78c04a46c333f6f319cf1cebd Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Wed, 19 Apr 2023 11:46:01 +0000 -Subject: [PATCH 071/136] wifi: rtw89: mac: handle C2H receive/done ACK in - interrupt context - -We have some MAC H2Cs (host to chip packets), which have no clear -individual C2Hs (chip to host packets) to indicate FW execution -response, but they are going to require to wait for FW completion. -So, we have to deal with this via common MAC C2H receive/done ACKs. - -This commit changes the context, where common MAC C2H receive/done -ACK handlers are executed, to interrupt context. And, code comments -are added to prevent future commits from using it incorrectly. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/c4d766885e00b9f9dcf7954a80096c8b9d21149b.camel@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -4336,6 +4336,8 @@ rtw89_mac_c2h_bcn_fltr_rpt(struct rtw89_ - static void - rtw89_mac_c2h_rec_ack(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) - { -+ /* N.B. This will run in interrupt context. */ -+ - rtw89_debug(rtwdev, RTW89_DBG_FW, - "C2H rev ack recv, cat: %d, class: %d, func: %d, seq : %d\n", - RTW89_GET_MAC_C2H_REV_ACK_CAT(c2h->data), -@@ -4347,6 +4349,8 @@ rtw89_mac_c2h_rec_ack(struct rtw89_dev * - static void - rtw89_mac_c2h_done_ack(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) - { -+ /* N.B. This will run in interrupt context. */ -+ - rtw89_debug(rtwdev, RTW89_DBG_FW, - "C2H done ack recv, cat: %d, class: %d, func: %d, ret: %d, seq : %d\n", - RTW89_GET_MAC_C2H_DONE_ACK_CAT(c2h->data), -@@ -4592,6 +4596,14 @@ bool rtw89_mac_c2h_chk_atomic(struct rtw - switch (class) { - default: - return false; -+ case RTW89_MAC_C2H_CLASS_INFO: -+ switch (func) { -+ default: -+ return false; -+ case RTW89_MAC_C2H_FUNC_REC_ACK: -+ case RTW89_MAC_C2H_FUNC_DONE_ACK: -+ return true; -+ } - case RTW89_MAC_C2H_CLASS_OFLD: - switch (func) { - default: diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-072-wifi-rtw89-scan-offload-wait-for-FW-done-ACK.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-072-wifi-rtw89-scan-offload-wait-for-FW-done-ACK.patch deleted file mode 100644 index 8c4cd34c7..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-072-wifi-rtw89-scan-offload-wait-for-FW-done-ACK.patch +++ /dev/null @@ -1,182 +0,0 @@ -From b9b632f43f1c8b59ea3d23f7ea941616322dab5a Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Wed, 19 Apr 2023 11:46:03 +0000 -Subject: [PATCH 072/136] wifi: rtw89: scan offload wait for FW done ACK - -The following are scan offload related H2C (host to chip) function types. -* H2C_FUNC_ADD_SCANOFLD_CH -* H2C_FUNC_SCANOFLD -Before doing FW scan, we will continuously send multiple H2Cs with above -types which are used to tell FW the scan configuration of this time. But, -if FW doesn't handle one of these H2Cs well, the FW scan process might -not run as expected and driver should notice it early. - -So, this commits makes scan offload related H2Cs wait for FW done ACK via -rtw89_wait_for_cond() and rtw89_complete_cond(). And, we check the return -code of these H2Cs from FW. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/a15f4bd594f71d7602ea67698b035805143700c9.camel@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 28 ++++++++--------- - drivers/net/wireless/realtek/rtw89/fw.h | 21 +++++++------ - drivers/net/wireless/realtek/rtw89/mac.c | 39 ++++++++++++++++++++---- - 3 files changed, 58 insertions(+), 30 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -2532,9 +2532,11 @@ int rtw89_fw_h2c_add_pkt_offload(struct - int rtw89_fw_h2c_scan_list_offload(struct rtw89_dev *rtwdev, int len, - struct list_head *chan_list) - { -+ struct rtw89_wait_info *wait = &rtwdev->mac.fw_ofld_wait; - struct rtw89_mac_chinfo *ch_info; - struct sk_buff *skb; - int skb_len = H2C_LEN_SCAN_LIST_OFFLOAD + len * RTW89_MAC_CHINFO_SIZE; -+ unsigned int cond; - u8 *cmd; - int ret; - -@@ -2581,27 +2583,27 @@ int rtw89_fw_h2c_scan_list_offload(struc - H2C_CAT_MAC, H2C_CL_MAC_FW_OFLD, - H2C_FUNC_ADD_SCANOFLD_CH, 1, 1, skb_len); - -- ret = rtw89_h2c_tx(rtwdev, skb, false); -+ cond = RTW89_FW_OFLD_WAIT_COND(0, H2C_FUNC_ADD_SCANOFLD_CH); -+ -+ ret = rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); - if (ret) { -- rtw89_err(rtwdev, "failed to send h2c\n"); -- goto fail; -+ rtw89_debug(rtwdev, RTW89_DBG_FW, "failed to add scan ofld ch\n"); -+ return ret; - } - - return 0; --fail: -- dev_kfree_skb_any(skb); -- -- return ret; - } - - int rtw89_fw_h2c_scan_offload(struct rtw89_dev *rtwdev, - struct rtw89_scan_option *option, - struct rtw89_vif *rtwvif) - { -+ struct rtw89_wait_info *wait = &rtwdev->mac.fw_ofld_wait; - struct rtw89_chan *op = &rtwdev->scan_info.op_chan; - struct rtw89_h2c_scanofld *h2c; - u32 len = sizeof(*h2c); - struct sk_buff *skb; -+ unsigned int cond; - int ret; - - skb = rtw89_fw_h2c_alloc_skb_with_hdr(rtwdev, len); -@@ -2640,17 +2642,15 @@ int rtw89_fw_h2c_scan_offload(struct rtw - H2C_FUNC_SCANOFLD, 1, 1, - len); - -- ret = rtw89_h2c_tx(rtwdev, skb, false); -+ cond = RTW89_FW_OFLD_WAIT_COND(0, H2C_FUNC_SCANOFLD); -+ -+ ret = rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); - if (ret) { -- rtw89_err(rtwdev, "failed to send h2c\n"); -- goto fail; -+ rtw89_debug(rtwdev, RTW89_DBG_FW, "failed to scan ofld\n"); -+ return ret; - } - - return 0; --fail: -- dev_kfree_skb_any(skb); -- -- return ret; - } - - int rtw89_fw_h2c_rf_reg(struct rtw89_dev *rtwdev, ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -3221,16 +3221,17 @@ static inline struct rtw89_fw_c2h_attr * - #define RTW89_GET_C2H_LOG_SRT_PRT(c2h) (char *)((__le32 *)(c2h) + 2) - #define RTW89_GET_C2H_LOG_LEN(len) ((len) - RTW89_C2H_HEADER_LEN) - --#define RTW89_GET_MAC_C2H_DONE_ACK_CAT(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(1, 0)) --#define RTW89_GET_MAC_C2H_DONE_ACK_CLASS(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(7, 2)) --#define RTW89_GET_MAC_C2H_DONE_ACK_FUNC(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(15, 8)) --#define RTW89_GET_MAC_C2H_DONE_ACK_H2C_RETURN(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(23, 16)) --#define RTW89_GET_MAC_C2H_DONE_ACK_H2C_SEQ(c2h) \ -- le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(31, 24)) -+struct rtw89_c2h_done_ack { -+ __le32 w0; -+ __le32 w1; -+ __le32 w2; -+} __packed; -+ -+#define RTW89_C2H_DONE_ACK_W2_CAT GENMASK(1, 0) -+#define RTW89_C2H_DONE_ACK_W2_CLASS GENMASK(7, 2) -+#define RTW89_C2H_DONE_ACK_W2_FUNC GENMASK(15, 8) -+#define RTW89_C2H_DONE_ACK_W2_H2C_RETURN GENMASK(23, 16) -+#define RTW89_C2H_DONE_ACK_W2_H2C_SEQ GENMASK(31, 24) - - #define RTW89_GET_MAC_C2H_REV_ACK_CAT(c2h) \ - le32_get_bits(*((const __le32 *)(c2h) + 2), GENMASK(1, 0)) ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -4347,17 +4347,44 @@ rtw89_mac_c2h_rec_ack(struct rtw89_dev * - } - - static void --rtw89_mac_c2h_done_ack(struct rtw89_dev *rtwdev, struct sk_buff *c2h, u32 len) -+rtw89_mac_c2h_done_ack(struct rtw89_dev *rtwdev, struct sk_buff *skb_c2h, u32 len) - { - /* N.B. This will run in interrupt context. */ -+ struct rtw89_wait_info *fw_ofld_wait = &rtwdev->mac.fw_ofld_wait; -+ const struct rtw89_c2h_done_ack *c2h = -+ (const struct rtw89_c2h_done_ack *)skb_c2h->data; -+ u8 h2c_cat = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_CAT); -+ u8 h2c_class = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_CLASS); -+ u8 h2c_func = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_FUNC); -+ u8 h2c_return = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_H2C_RETURN); -+ u8 h2c_seq = le32_get_bits(c2h->w2, RTW89_C2H_DONE_ACK_W2_H2C_SEQ); -+ struct rtw89_completion_data data = {}; -+ unsigned int cond; - - rtw89_debug(rtwdev, RTW89_DBG_FW, - "C2H done ack recv, cat: %d, class: %d, func: %d, ret: %d, seq : %d\n", -- RTW89_GET_MAC_C2H_DONE_ACK_CAT(c2h->data), -- RTW89_GET_MAC_C2H_DONE_ACK_CLASS(c2h->data), -- RTW89_GET_MAC_C2H_DONE_ACK_FUNC(c2h->data), -- RTW89_GET_MAC_C2H_DONE_ACK_H2C_RETURN(c2h->data), -- RTW89_GET_MAC_C2H_DONE_ACK_H2C_SEQ(c2h->data)); -+ h2c_cat, h2c_class, h2c_func, h2c_return, h2c_seq); -+ -+ if (h2c_cat != H2C_CAT_MAC) -+ return; -+ -+ switch (h2c_class) { -+ default: -+ return; -+ case H2C_CL_MAC_FW_OFLD: -+ switch (h2c_func) { -+ default: -+ return; -+ case H2C_FUNC_ADD_SCANOFLD_CH: -+ case H2C_FUNC_SCANOFLD: -+ cond = RTW89_FW_OFLD_WAIT_COND(0, h2c_func); -+ break; -+ } -+ -+ data.err = !!h2c_return; -+ rtw89_complete_cond(fw_ofld_wait, cond, &data); -+ return; -+ } - } - - static void diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-073-wifi-rtw89-8851b-add-8851B-basic-chip_info.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-073-wifi-rtw89-8851b-add-8851B-basic-chip_info.patch deleted file mode 100644 index 01cdfed79..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-073-wifi-rtw89-8851b-add-8851B-basic-chip_info.patch +++ /dev/null @@ -1,140 +0,0 @@ -From c8d89bf6b82f421dda16526233aba264d1331332 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 21 Apr 2023 10:45:44 +0800 -Subject: [PATCH 073/136] wifi: rtw89: 8851b: add 8851B basic chip_info - -8851B is a 1x1 80 MHz bandwidth chip working on 2/5 GHz. Add these basic -information, and more settings will be added by functions. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230421024551.29994-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 101 ++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/rtw8851b.h | 15 +++ - 2 files changed, 116 insertions(+) - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8851b.c - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8851b.h - ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -0,0 +1,101 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2022-2023 Realtek Corporation -+ */ -+ -+#include "coex.h" -+#include "fw.h" -+#include "mac.h" -+#include "phy.h" -+#include "reg.h" -+#include "rtw8851b.h" -+#include "rtw8851b_table.h" -+#include "txrx.h" -+#include "util.h" -+ -+#define RTW8851B_FW_FORMAT_MAX 0 -+#define RTW8851B_FW_BASENAME "rtw89/rtw8851b_fw" -+#define RTW8851B_MODULE_FIRMWARE \ -+ RTW8851B_FW_BASENAME ".bin" -+ -+static const struct rtw89_chip_ops rtw8851b_chip_ops = { -+ .fem_setup = NULL, -+ .fill_txdesc = rtw89_core_fill_txdesc, -+ .fill_txdesc_fwcmd = rtw89_core_fill_txdesc, -+ .h2c_dctl_sec_cam = NULL, -+}; -+ -+const struct rtw89_chip_info rtw8851b_chip_info = { -+ .chip_id = RTL8851B, -+ .ops = &rtw8851b_chip_ops, -+ .fw_basename = RTW8851B_FW_BASENAME, -+ .fw_format_max = RTW8851B_FW_FORMAT_MAX, -+ .try_ce_fw = true, -+ .fifo_size = 196608, -+ .dle_scc_rsvd_size = 98304, -+ .max_amsdu_limit = 3500, -+ .dis_2g_40m_ul_ofdma = true, -+ .rsvd_ple_ofst = 0x2f800, -+ .wde_qempty_acq_num = 4, -+ .wde_qempty_mgq_sel = 4, -+ .rf_base_addr = {0xe000}, -+ .pwr_on_seq = NULL, -+ .pwr_off_seq = NULL, -+ .bb_table = &rtw89_8851b_phy_bb_table, -+ .bb_gain_table = &rtw89_8851b_phy_bb_gain_table, -+ .rf_table = {&rtw89_8851b_phy_radioa_table,}, -+ .nctl_table = &rtw89_8851b_phy_nctl_table, -+ .byr_table = &rtw89_8851b_byr_table, -+ .dflt_parms = &rtw89_8851b_dflt_parms, -+ .rfe_parms_conf = rtw89_8851b_rfe_parms_conf, -+ .txpwr_factor_rf = 2, -+ .txpwr_factor_mac = 1, -+ .dig_table = NULL, -+ .tssi_dbw_table = NULL, -+ .support_chanctx_num = 0, -+ .support_bands = BIT(NL80211_BAND_2GHZ) | -+ BIT(NL80211_BAND_5GHZ), -+ .support_bw160 = false, -+ .support_ul_tb_ctrl = true, -+ .hw_sec_hdr = false, -+ .rf_path_num = 1, -+ .tx_nss = 1, -+ .rx_nss = 1, -+ .acam_num = 32, -+ .bcam_num = 20, -+ .scam_num = 128, -+ .bacam_num = 2, -+ .bacam_dynamic_num = 4, -+ .bacam_v1 = false, -+ .sec_ctrl_efuse_size = 4, -+ .physical_efuse_size = 1216, -+ .logical_efuse_size = 2048, -+ .limit_efuse_size = 1280, -+ .dav_phy_efuse_size = 0, -+ .dav_log_efuse_size = 0, -+ .phycap_addr = 0x580, -+ .phycap_size = 128, -+ .para_ver = 0, -+ .wlcx_desired = 0x06000000, -+ .btcx_desired = 0x7, -+ .scbd = 0x1, -+ .mailbox = 0x1, -+ -+ .ps_mode_supported = BIT(RTW89_PS_MODE_RFOFF) | -+ BIT(RTW89_PS_MODE_CLK_GATED), -+ .low_power_hci_modes = 0, -+ .h2c_cctl_func_id = H2C_FUNC_MAC_CCTLINFO_UD, -+ .hci_func_en_addr = R_AX_HCI_FUNC_EN, -+ .h2c_desc_size = sizeof(struct rtw89_txwd_body), -+ .txwd_body_size = sizeof(struct rtw89_txwd_body), -+ .bss_clr_map_reg = R_BSS_CLR_MAP_V1, -+ .dma_ch_mask = BIT(RTW89_DMA_ACH4) | BIT(RTW89_DMA_ACH5) | -+ BIT(RTW89_DMA_ACH6) | BIT(RTW89_DMA_ACH7) | -+ BIT(RTW89_DMA_B1MG) | BIT(RTW89_DMA_B1HI), -+ .edcca_lvl_reg = R_SEG0R_EDCCA_LVL_V1, -+}; -+EXPORT_SYMBOL(rtw8851b_chip_info); -+ -+MODULE_FIRMWARE(RTW8851B_MODULE_FIRMWARE); -+MODULE_AUTHOR("Realtek Corporation"); -+MODULE_DESCRIPTION("Realtek 802.11ax wireless 8851B driver"); -+MODULE_LICENSE("Dual BSD/GPL"); ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.h -@@ -0,0 +1,15 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2022-2023 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_8851B_H__ -+#define __RTW89_8851B_H__ -+ -+#include "core.h" -+ -+#define RF_PATH_NUM_8851B 1 -+#define BB_PATH_NUM_8851B 1 -+ -+extern const struct rtw89_chip_info rtw8851b_chip_info; -+ -+#endif diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-074-wifi-rtw89-8851be-add-8851BE-PCI-entry-and-fill-PCI-.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-074-wifi-rtw89-8851be-add-8851BE-PCI-entry-and-fill-PCI-.patch deleted file mode 100644 index 692026efa..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-074-wifi-rtw89-8851be-add-8851BE-PCI-entry-and-fill-PCI-.patch +++ /dev/null @@ -1,106 +0,0 @@ -From 99ff8da56322cda9eb9b37021e27b127c2d1cad8 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 21 Apr 2023 10:45:45 +0800 -Subject: [PATCH 074/136] wifi: rtw89: 8851be: add 8851BE PCI entry and fill - PCI capabilities - -Add PCI entry to 8851BE with its device ID 10ec:b851, also fill PCI info -according to its capabilities. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230421024551.29994-3-pkshih@realtek.com ---- - .../net/wireless/realtek/rtw89/rtw8851be.c | 86 +++++++++++++++++++ - 1 file changed, 86 insertions(+) - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8851be.c - ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851be.c -@@ -0,0 +1,86 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2022-2023 Realtek Corporation -+ */ -+ -+#include -+#include -+ -+#include "pci.h" -+#include "reg.h" -+#include "rtw8851b.h" -+ -+static const struct rtw89_pci_info rtw8851b_pci_info = { -+ .txbd_trunc_mode = MAC_AX_BD_TRUNC, -+ .rxbd_trunc_mode = MAC_AX_BD_TRUNC, -+ .rxbd_mode = MAC_AX_RXBD_PKT, -+ .tag_mode = MAC_AX_TAG_MULTI, -+ .tx_burst = MAC_AX_TX_BURST_2048B, -+ .rx_burst = MAC_AX_RX_BURST_128B, -+ .wd_dma_idle_intvl = MAC_AX_WD_DMA_INTVL_256NS, -+ .wd_dma_act_intvl = MAC_AX_WD_DMA_INTVL_256NS, -+ .multi_tag_num = MAC_AX_TAG_NUM_8, -+ .lbc_en = MAC_AX_PCIE_ENABLE, -+ .lbc_tmr = MAC_AX_LBC_TMR_2MS, -+ .autok_en = MAC_AX_PCIE_DISABLE, -+ .io_rcy_en = MAC_AX_PCIE_DISABLE, -+ .io_rcy_tmr = MAC_AX_IO_RCY_ANA_TMR_6MS, -+ -+ .init_cfg_reg = R_AX_PCIE_INIT_CFG1, -+ .txhci_en_bit = B_AX_TXHCI_EN, -+ .rxhci_en_bit = B_AX_RXHCI_EN, -+ .rxbd_mode_bit = B_AX_RXBD_MODE, -+ .exp_ctrl_reg = R_AX_PCIE_EXP_CTRL, -+ .max_tag_num_mask = B_AX_MAX_TAG_NUM, -+ .rxbd_rwptr_clr_reg = R_AX_RXBD_RWPTR_CLR, -+ .txbd_rwptr_clr2_reg = 0, -+ .dma_stop1 = {R_AX_PCIE_DMA_STOP1, B_AX_TX_STOP1_MASK_V1}, -+ .dma_stop2 = {0}, -+ .dma_busy1 = {R_AX_PCIE_DMA_BUSY1, DMA_BUSY1_CHECK_V1}, -+ .dma_busy2_reg = 0, -+ .dma_busy3_reg = R_AX_PCIE_DMA_BUSY1, -+ -+ .rpwm_addr = R_AX_PCIE_HRPWM, -+ .cpwm_addr = R_AX_CPWM, -+ .tx_dma_ch_mask = BIT(RTW89_TXCH_ACH4) | BIT(RTW89_TXCH_ACH5) | -+ BIT(RTW89_TXCH_ACH6) | BIT(RTW89_TXCH_ACH7) | -+ BIT(RTW89_TXCH_CH10) | BIT(RTW89_TXCH_CH11), -+ .bd_idx_addr_low_power = NULL, -+ .dma_addr_set = &rtw89_pci_ch_dma_addr_set, -+ .bd_ram_table = &rtw89_bd_ram_table_single, -+ -+ .ltr_set = rtw89_pci_ltr_set, -+ .fill_txaddr_info = rtw89_pci_fill_txaddr_info, -+ .config_intr_mask = rtw89_pci_config_intr_mask, -+ .enable_intr = rtw89_pci_enable_intr, -+ .disable_intr = rtw89_pci_disable_intr, -+ .recognize_intrs = rtw89_pci_recognize_intrs, -+}; -+ -+static const struct rtw89_driver_info rtw89_8851be_info = { -+ .chip = &rtw8851b_chip_info, -+ .bus = { -+ .pci = &rtw8851b_pci_info, -+ }, -+}; -+ -+static const struct pci_device_id rtw89_8851be_id_table[] = { -+ { -+ PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0xb851), -+ .driver_data = (kernel_ulong_t)&rtw89_8851be_info, -+ }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(pci, rtw89_8851be_id_table); -+ -+static struct pci_driver rtw89_8851be_driver = { -+ .name = "rtw89_8851be", -+ .id_table = rtw89_8851be_id_table, -+ .probe = rtw89_pci_probe, -+ .remove = rtw89_pci_remove, -+ .driver.pm = &rtw89_pm_ops, -+}; -+module_pci_driver(rtw89_8851be_driver); -+ -+MODULE_AUTHOR("Realtek Corporation"); -+MODULE_DESCRIPTION("Realtek 802.11ax wireless 8851BE driver"); -+MODULE_LICENSE("Dual BSD/GPL"); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-075-wifi-rtw89-8851b-add-NCTL-post-table.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-075-wifi-rtw89-8851b-add-NCTL-post-table.patch deleted file mode 100644 index 33e96fb22..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-075-wifi-rtw89-8851b-add-NCTL-post-table.patch +++ /dev/null @@ -1,101 +0,0 @@ -From a24be8bbcbd22cfa53134f6dd399f026874aaa72 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 21 Apr 2023 10:45:46 +0800 -Subject: [PATCH 075/136] wifi: rtw89: 8851b: add NCTL post table - -NCTL (nano-controller) is used to assist RF calibration that sends -commands to NCTL so it can reduce IO from driver. 8851B needs additional -settings, so add a table to do things. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230421024551.29994-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - drivers/net/wireless/realtek/rtw89/phy.c | 6 +++++- - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 2 ++ - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 1 + - 6 files changed, 11 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3192,6 +3192,7 @@ struct rtw89_chip_info { - const struct rtw89_phy_table *bb_gain_table; - const struct rtw89_phy_table *rf_table[RF_PATH_MAX]; - const struct rtw89_phy_table *nctl_table; -+ const struct rtw89_rfk_tbl *nctl_post_table; - const struct rtw89_txpwr_table *byr_table; - const struct rtw89_phy_dig_gain_table *dig_table; - const struct rtw89_dig_regs *dig_regs; ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -1401,7 +1401,8 @@ static void rtw89_phy_init_rf_nctl(struc - rtw89_phy_write32_set(rtwdev, R_IOQ_IQK_DPK, 0x3); - rtw89_phy_write32_set(rtwdev, R_GNT_BT_WGT_EN, 0x1); - rtw89_phy_write32_set(rtwdev, R_P0_PATH_RST, 0x8000000); -- rtw89_phy_write32_set(rtwdev, R_P1_PATH_RST, 0x8000000); -+ if (chip->chip_id != RTL8851B) -+ rtw89_phy_write32_set(rtwdev, R_P1_PATH_RST, 0x8000000); - if (chip->chip_id == RTL8852B) - rtw89_phy_write32_set(rtwdev, R_IOQ_IQK_DPK, 0x2); - -@@ -1415,6 +1416,9 @@ static void rtw89_phy_init_rf_nctl(struc - - nctl_table = chip->nctl_table; - rtw89_phy_init_reg(rtwdev, nctl_table, rtw89_phy_config_bb_reg, NULL); -+ -+ if (chip->nctl_post_table) -+ rtw89_rfk_parser(rtwdev, chip->nctl_post_table); - } - - static u32 rtw89_phy0_phy1_offset(struct rtw89_dev *rtwdev, u32 addr) ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -8,6 +8,7 @@ - #include "phy.h" - #include "reg.h" - #include "rtw8851b.h" -+#include "rtw8851b_rfk_table.h" - #include "rtw8851b_table.h" - #include "txrx.h" - #include "util.h" -@@ -44,6 +45,7 @@ const struct rtw89_chip_info rtw8851b_ch - .bb_gain_table = &rtw89_8851b_phy_bb_gain_table, - .rf_table = {&rtw89_8851b_phy_radioa_table,}, - .nctl_table = &rtw89_8851b_phy_nctl_table, -+ .nctl_post_table = &rtw8851b_nctl_post_defs_tbl, - .byr_table = &rtw89_8851b_byr_table, - .dflt_parms = &rtw89_8851b_dflt_parms, - .rfe_parms_conf = rtw89_8851b_rfe_parms_conf, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -2085,6 +2085,7 @@ const struct rtw89_chip_info rtw8852a_ch - .rf_table = {&rtw89_8852a_phy_radioa_table, - &rtw89_8852a_phy_radiob_table,}, - .nctl_table = &rtw89_8852a_phy_nctl_table, -+ .nctl_post_table = NULL, - .byr_table = &rtw89_8852a_byr_table, - .dflt_parms = &rtw89_8852a_dflt_parms, - .rfe_parms_conf = NULL, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2522,6 +2522,7 @@ const struct rtw89_chip_info rtw8852b_ch - .rf_table = {&rtw89_8852b_phy_radioa_table, - &rtw89_8852b_phy_radiob_table,}, - .nctl_table = &rtw89_8852b_phy_nctl_table, -+ .nctl_post_table = NULL, - .byr_table = &rtw89_8852b_byr_table, - .dflt_parms = &rtw89_8852b_dflt_parms, - .rfe_parms_conf = NULL, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2821,6 +2821,7 @@ const struct rtw89_chip_info rtw8852c_ch - .rf_table = {&rtw89_8852c_phy_radiob_table, - &rtw89_8852c_phy_radioa_table,}, - .nctl_table = &rtw89_8852c_phy_nctl_table, -+ .nctl_post_table = NULL, - .byr_table = &rtw89_8852c_byr_table, - .dflt_parms = &rtw89_8852c_dflt_parms, - .rfe_parms_conf = NULL, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-076-wifi-rtw89-add-CFO-XTAL-registers-field-to-support-8.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-076-wifi-rtw89-add-CFO-XTAL-registers-field-to-support-8.patch deleted file mode 100644 index ccad68808..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-076-wifi-rtw89-add-CFO-XTAL-registers-field-to-support-8.patch +++ /dev/null @@ -1,175 +0,0 @@ -From 0789881aa3703b2ceb4c0f9a9c7d69f3fb7efd8d Mon Sep 17 00:00:00 2001 -From: Chia-Yuan Li -Date: Fri, 21 Apr 2023 10:45:47 +0800 -Subject: [PATCH 076/136] wifi: rtw89: add CFO XTAL registers field to support - 8851B - -Since CFO XTAL registers of 8851B is different from 8852A, add a chip_info -field to define their difference. Other chips use another interface, so -fill NULL to this field. - -Signed-off-by: Chia-Yuan Li -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230421024551.29994-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 7 +++++++ - drivers/net/wireless/realtek/rtw89/phy.c | 16 +++++++++------- - drivers/net/wireless/realtek/rtw89/reg.h | 6 ++++++ - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 7 +++++++ - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 7 +++++++ - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 1 + - 7 files changed, 38 insertions(+), 7 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3101,6 +3101,12 @@ struct rtw89_imr_info { - u32 tmac_imr_set; - }; - -+struct rtw89_xtal_info { -+ u32 xcap_reg; -+ u32 sc_xo_mask; -+ u32 sc_xi_mask; -+}; -+ - struct rtw89_rrsr_cfgs { - struct rtw89_reg3_def ref_rate; - struct rtw89_reg3_def rsc; -@@ -3246,6 +3252,7 @@ struct rtw89_chip_info { - u32 dma_ch_mask; - u32 edcca_lvl_reg; - const struct wiphy_wowlan_support *wowlan_stub; -+ const struct rtw89_xtal_info *xtal_info; - }; - - union rtw89_bus_info { ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -2343,27 +2343,29 @@ void rtw89_phy_c2h_handle(struct rtw89_d - - static u8 rtw89_phy_cfo_get_xcap_reg(struct rtw89_dev *rtwdev, bool sc_xo) - { -+ const struct rtw89_xtal_info *xtal = rtwdev->chip->xtal_info; - u32 reg_mask; - - if (sc_xo) -- reg_mask = B_AX_XTAL_SC_XO_MASK; -+ reg_mask = xtal->sc_xo_mask; - else -- reg_mask = B_AX_XTAL_SC_XI_MASK; -+ reg_mask = xtal->sc_xi_mask; - -- return (u8)rtw89_read32_mask(rtwdev, R_AX_XTAL_ON_CTRL0, reg_mask); -+ return (u8)rtw89_read32_mask(rtwdev, xtal->xcap_reg, reg_mask); - } - - static void rtw89_phy_cfo_set_xcap_reg(struct rtw89_dev *rtwdev, bool sc_xo, - u8 val) - { -+ const struct rtw89_xtal_info *xtal = rtwdev->chip->xtal_info; - u32 reg_mask; - - if (sc_xo) -- reg_mask = B_AX_XTAL_SC_XO_MASK; -+ reg_mask = xtal->sc_xo_mask; - else -- reg_mask = B_AX_XTAL_SC_XI_MASK; -+ reg_mask = xtal->sc_xi_mask; - -- rtw89_write32_mask(rtwdev, R_AX_XTAL_ON_CTRL0, reg_mask, val); -+ rtw89_write32_mask(rtwdev, xtal->xcap_reg, reg_mask, val); - } - - static void rtw89_phy_cfo_set_crystal_cap(struct rtw89_dev *rtwdev, -@@ -2376,7 +2378,7 @@ static void rtw89_phy_cfo_set_crystal_ca - if (!force && cfo->crystal_cap == crystal_cap) - return; - crystal_cap = clamp_t(u8, crystal_cap, 0, 127); -- if (chip->chip_id == RTL8852A) { -+ if (chip->chip_id == RTL8852A || chip->chip_id == RTL8851B) { - rtw89_phy_cfo_set_xcap_reg(rtwdev, true, crystal_cap); - rtw89_phy_cfo_set_xcap_reg(rtwdev, false, crystal_cap); - sc_xo_val = rtw89_phy_cfo_get_xcap_reg(rtwdev, true); ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -243,6 +243,12 @@ - #define B_AX_XTAL_SC_XI_MASK GENMASK(16, 10) - #define B_AX_XTAL_SC_MASK GENMASK(6, 0) - -+#define R_AX_XTAL_ON_CTRL3 0x028C -+#define B_AX_XTAL_SC_INIT_A_BLOCK_MASK GENMASK(30, 24) -+#define B_AX_XTAL_SC_LPS_A_BLOCK_MASK GENMASK(22, 16) -+#define B_AX_XTAL_SC_XO_A_BLOCK_MASK GENMASK(14, 8) -+#define B_AX_XTAL_SC_XI_A_BLOCK_MASK GENMASK(6, 0) -+ - #define R_AX_GPIO0_7_FUNC_SEL 0x02D0 - - #define R_AX_EECS_EESK_FUNC_SEL 0x02D8 ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -18,6 +18,12 @@ - #define RTW8851B_MODULE_FIRMWARE \ - RTW8851B_FW_BASENAME ".bin" - -+static const struct rtw89_xtal_info rtw8851b_xtal_info = { -+ .xcap_reg = R_AX_XTAL_ON_CTRL3, -+ .sc_xo_mask = B_AX_XTAL_SC_XO_A_BLOCK_MASK, -+ .sc_xi_mask = B_AX_XTAL_SC_XI_A_BLOCK_MASK, -+}; -+ - static const struct rtw89_chip_ops rtw8851b_chip_ops = { - .fem_setup = NULL, - .fill_txdesc = rtw89_core_fill_txdesc, -@@ -94,6 +100,7 @@ const struct rtw89_chip_info rtw8851b_ch - BIT(RTW89_DMA_ACH6) | BIT(RTW89_DMA_ACH7) | - BIT(RTW89_DMA_B1MG) | BIT(RTW89_DMA_B1HI), - .edcca_lvl_reg = R_SEG0R_EDCCA_LVL_V1, -+ .xtal_info = &rtw8851b_xtal_info, - }; - EXPORT_SYMBOL(rtw8851b_chip_info); - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -463,6 +463,12 @@ static const struct rtw89_imr_info rtw88 - .tmac_imr_set = B_AX_TMAC_IMR_SET, - }; - -+static const struct rtw89_xtal_info rtw8852a_xtal_info = { -+ .xcap_reg = R_AX_XTAL_ON_CTRL0, -+ .sc_xo_mask = B_AX_XTAL_SC_XO_MASK, -+ .sc_xi_mask = B_AX_XTAL_SC_XI_MASK, -+}; -+ - static const struct rtw89_rrsr_cfgs rtw8852a_rrsr_cfgs = { - .ref_rate = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_REF_RATE_SEL, 0}, - .rsc = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_RSC_MASK, 2}, -@@ -2160,6 +2166,7 @@ const struct rtw89_chip_info rtw8852a_ch - #ifdef CONFIG_PM - .wowlan_stub = &rtw_wowlan_stub_8852a, - #endif -+ .xtal_info = &rtw8852a_xtal_info, - }; - EXPORT_SYMBOL(rtw8852a_chip_info); - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2599,6 +2599,7 @@ const struct rtw89_chip_info rtw8852b_ch - #ifdef CONFIG_PM - .wowlan_stub = &rtw_wowlan_stub_8852b, - #endif -+ .xtal_info = NULL, - }; - EXPORT_SYMBOL(rtw8852b_chip_info); - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2898,6 +2898,7 @@ const struct rtw89_chip_info rtw8852c_ch - #ifdef CONFIG_PM - .wowlan_stub = &rtw_wowlan_stub_8852c, - #endif -+ .xtal_info = NULL, - }; - EXPORT_SYMBOL(rtw8852c_chip_info); - diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-077-wifi-rtw89-use-chip_info-small_fifo_size-to-choose-d.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-077-wifi-rtw89-use-chip_info-small_fifo_size-to-choose-d.patch deleted file mode 100644 index 1b73ab7b0..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-077-wifi-rtw89-use-chip_info-small_fifo_size-to-choose-d.patch +++ /dev/null @@ -1,87 +0,0 @@ -From ce816ab54bc927f893e17e7e6b9b68e30dd4b4a1 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 21 Apr 2023 10:45:48 +0800 -Subject: [PATCH 077/136] wifi: rtw89: use chip_info::small_fifo_size to choose - debug_mask - -Previously, 8852B has smaller FIFO size than others, so I use chip_id to -choose debug_mask before. 8851B has similar design, so add a field to -chip_info as a general expression. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230421024551.29994-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - drivers/net/wireless/realtek/rtw89/pci.c | 4 ++-- - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 1 + - 6 files changed, 7 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3159,6 +3159,7 @@ struct rtw89_chip_info { - u8 fw_format_max; - bool try_ce_fw; - u32 fifo_size; -+ bool small_fifo_size; - u32 dle_scc_rsvd_size; - u16 max_amsdu_limit; - bool dis_2g_40m_ul_ofdma; ---- a/drivers/net/wireless/realtek/rtw89/pci.c -+++ b/drivers/net/wireless/realtek/rtw89/pci.c -@@ -1003,10 +1003,10 @@ static u32 __rtw89_pci_check_and_reclaim - min_cnt = min(bd_cnt, wd_cnt); - if (min_cnt == 0) { - /* This message can be frequently shown in low power mode or -- * high traffic with 8852B, and we have recognized it as normal -+ * high traffic with small FIFO chips, and we have recognized it as normal - * behavior, so print with mask RTW89_DBG_TXRX in these situations. - */ -- if (rtwpci->low_power || chip->chip_id == RTL8852B) -+ if (rtwpci->low_power || chip->small_fifo_size) - debug_mask = RTW89_DBG_TXRX; - else - debug_mask = RTW89_DBG_UNEXP; ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -38,6 +38,7 @@ const struct rtw89_chip_info rtw8851b_ch - .fw_format_max = RTW8851B_FW_FORMAT_MAX, - .try_ce_fw = true, - .fifo_size = 196608, -+ .small_fifo_size = true, - .dle_scc_rsvd_size = 98304, - .max_amsdu_limit = 3500, - .dis_2g_40m_ul_ofdma = true, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -2075,6 +2075,7 @@ const struct rtw89_chip_info rtw8852a_ch - .fw_format_max = RTW8852A_FW_FORMAT_MAX, - .try_ce_fw = false, - .fifo_size = 458752, -+ .small_fifo_size = false, - .dle_scc_rsvd_size = 0, - .max_amsdu_limit = 3500, - .dis_2g_40m_ul_ofdma = true, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2506,6 +2506,7 @@ const struct rtw89_chip_info rtw8852b_ch - .fw_format_max = RTW8852B_FW_FORMAT_MAX, - .try_ce_fw = true, - .fifo_size = 196608, -+ .small_fifo_size = true, - .dle_scc_rsvd_size = 98304, - .max_amsdu_limit = 3500, - .dis_2g_40m_ul_ofdma = true, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2805,6 +2805,7 @@ const struct rtw89_chip_info rtw8852c_ch - .fw_format_max = RTW8852C_FW_FORMAT_MAX, - .try_ce_fw = false, - .fifo_size = 458752, -+ .small_fifo_size = false, - .dle_scc_rsvd_size = 0, - .max_amsdu_limit = 8000, - .dis_2g_40m_ul_ofdma = false, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-078-wifi-rtw89-change-naming-of-BA-CAM-from-V1-to-V0_EXT.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-078-wifi-rtw89-change-naming-of-BA-CAM-from-V1-to-V0_EXT.patch deleted file mode 100644 index f4fbb1847..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-078-wifi-rtw89-change-naming-of-BA-CAM-from-V1-to-V0_EXT.patch +++ /dev/null @@ -1,164 +0,0 @@ -From b6335d91607d6297d3f586e8a4dc6ce8f90652e7 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 21 Apr 2023 10:45:49 +0800 -Subject: [PATCH 078/136] wifi: rtw89: change naming of BA CAM from V1 to - V0_EXT - -BA CAM of 8852C has more entries and more fields of H2C, and needs -initialization before using. Due to differences from 8852A/8852B, we name -it as V1 before. However, real V1 of BA CAM is introduced now, so change -it to V0_EXT to avoid confusing with firmware design. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230421024551.29994-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 9 ++++++++- - drivers/net/wireless/realtek/rtw89/fw.c | 12 ++++++------ - drivers/net/wireless/realtek/rtw89/fw.h | 6 +++--- - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 2 +- - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 2 +- - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 2 +- - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 2 +- - 7 files changed, 21 insertions(+), 14 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -122,6 +122,13 @@ enum rtw89_cv { - CHIP_CV_INVALID = CHIP_CV_MAX, - }; - -+enum rtw89_bacam_ver { -+ RTW89_BACAM_V0, -+ RTW89_BACAM_V1, -+ -+ RTW89_BACAM_V0_EXT = 99, -+}; -+ - enum rtw89_core_tx_type { - RTW89_CORE_TX_TYPE_DATA, - RTW89_CORE_TX_TYPE_MGMT, -@@ -3182,7 +3189,7 @@ struct rtw89_chip_info { - u8 scam_num; - u8 bacam_num; - u8 bacam_dynamic_num; -- bool bacam_v1; -+ enum rtw89_bacam_ver bacam_ver; - - u8 sec_ctrl_efuse_size; - u32 physical_efuse_size; ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -809,7 +809,7 @@ int rtw89_fw_h2c_ba_cam(struct rtw89_dev - } - skb_put(skb, H2C_BA_CAM_LEN); - SET_BA_CAM_MACID(skb->data, macid); -- if (chip->bacam_v1) -+ if (chip->bacam_ver == RTW89_BACAM_V0_EXT) - SET_BA_CAM_ENTRY_IDX_V1(skb->data, entry_idx); - else - SET_BA_CAM_ENTRY_IDX(skb->data, entry_idx); -@@ -825,7 +825,7 @@ int rtw89_fw_h2c_ba_cam(struct rtw89_dev - SET_BA_CAM_INIT_REQ(skb->data, 1); - SET_BA_CAM_SSN(skb->data, params->ssn); - -- if (chip->bacam_v1) { -+ if (chip->bacam_ver == RTW89_BACAM_V0_EXT) { - SET_BA_CAM_STD_EN(skb->data, 1); - SET_BA_CAM_BAND(skb->data, rtwvif->mac_idx); - } -@@ -850,8 +850,8 @@ fail: - return ret; - } - --static int rtw89_fw_h2c_init_dynamic_ba_cam_v1(struct rtw89_dev *rtwdev, -- u8 entry_idx, u8 uid) -+static int rtw89_fw_h2c_init_ba_cam_v0_ext(struct rtw89_dev *rtwdev, -+ u8 entry_idx, u8 uid) - { - struct sk_buff *skb; - int ret; -@@ -888,7 +888,7 @@ fail: - return ret; - } - --void rtw89_fw_h2c_init_ba_cam_v1(struct rtw89_dev *rtwdev) -+void rtw89_fw_h2c_init_dynamic_ba_cam_v0_ext(struct rtw89_dev *rtwdev) - { - const struct rtw89_chip_info *chip = rtwdev->chip; - u8 entry_idx = chip->bacam_num; -@@ -896,7 +896,7 @@ void rtw89_fw_h2c_init_ba_cam_v1(struct - int i; - - for (i = 0; i < chip->bacam_dynamic_num; i++) { -- rtw89_fw_h2c_init_dynamic_ba_cam_v1(rtwdev, entry_idx, uid); -+ rtw89_fw_h2c_init_ba_cam_v0_ext(rtwdev, entry_idx, uid); - entry_idx++; - uid++; - } ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -3676,7 +3676,7 @@ void rtw89_fw_release_general_pkt_list_v - void rtw89_fw_release_general_pkt_list(struct rtw89_dev *rtwdev, bool notify_fw); - int rtw89_fw_h2c_ba_cam(struct rtw89_dev *rtwdev, struct rtw89_sta *rtwsta, - bool valid, struct ieee80211_ampdu_params *params); --void rtw89_fw_h2c_init_ba_cam_v1(struct rtw89_dev *rtwdev); -+void rtw89_fw_h2c_init_dynamic_ba_cam_v0_ext(struct rtw89_dev *rtwdev); - - int rtw89_fw_h2c_lps_parm(struct rtw89_dev *rtwdev, - struct rtw89_lps_parm *lps_param); -@@ -3739,8 +3739,8 @@ static inline void rtw89_fw_h2c_init_ba_ - { - const struct rtw89_chip_info *chip = rtwdev->chip; - -- if (chip->bacam_v1) -- rtw89_fw_h2c_init_ba_cam_v1(rtwdev); -+ if (chip->bacam_ver == RTW89_BACAM_V0_EXT) -+ rtw89_fw_h2c_init_dynamic_ba_cam_v0_ext(rtwdev); - } - - #endif ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -74,7 +74,7 @@ const struct rtw89_chip_info rtw8851b_ch - .scam_num = 128, - .bacam_num = 2, - .bacam_dynamic_num = 4, -- .bacam_v1 = false, -+ .bacam_ver = RTW89_BACAM_V0, - .sec_ctrl_efuse_size = 4, - .physical_efuse_size = 1216, - .logical_efuse_size = 2048, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -2115,7 +2115,7 @@ const struct rtw89_chip_info rtw8852a_ch - .scam_num = 128, - .bacam_num = 2, - .bacam_dynamic_num = 4, -- .bacam_v1 = false, -+ .bacam_ver = RTW89_BACAM_V0, - .sec_ctrl_efuse_size = 4, - .physical_efuse_size = 1216, - .logical_efuse_size = 1536, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2546,7 +2546,7 @@ const struct rtw89_chip_info rtw8852b_ch - .scam_num = 128, - .bacam_num = 2, - .bacam_dynamic_num = 4, -- .bacam_v1 = false, -+ .bacam_ver = RTW89_BACAM_V0, - .sec_ctrl_efuse_size = 4, - .physical_efuse_size = 1216, - .logical_efuse_size = 2048, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2846,7 +2846,7 @@ const struct rtw89_chip_info rtw8852c_ch - .scam_num = 128, - .bacam_num = 8, - .bacam_dynamic_num = 8, -- .bacam_v1 = true, -+ .bacam_ver = RTW89_BACAM_V0_EXT, - .sec_ctrl_efuse_size = 4, - .physical_efuse_size = 1216, - .logical_efuse_size = 2048, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-079-wifi-rtw89-8851b-add-support-WoWLAN-to-8851B.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-079-wifi-rtw89-8851b-add-support-WoWLAN-to-8851B.patch deleted file mode 100644 index bfb172a44..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-079-wifi-rtw89-8851b-add-support-WoWLAN-to-8851B.patch +++ /dev/null @@ -1,56 +0,0 @@ -From 2273dd724a6c6083e126828e56ff9a0a78913449 Mon Sep 17 00:00:00 2001 -From: Chih-Kang Chang -Date: Fri, 21 Apr 2023 10:45:50 +0800 -Subject: [PATCH 079/136] wifi: rtw89: 8851b: add support WoWLAN to 8851B - -Add WoWLAN stub to 8851B, and decalre this chip can support magic packet -and disconnect wakeup. - -Signed-off-by: Chih-Kang Chang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230421024551.29994-8-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 12 ++++++++++++ - drivers/net/wireless/realtek/rtw89/wow.c | 2 +- - 2 files changed, 13 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -31,6 +31,15 @@ static const struct rtw89_chip_ops rtw88 - .h2c_dctl_sec_cam = NULL, - }; - -+#ifdef CONFIG_PM -+static const struct wiphy_wowlan_support rtw_wowlan_stub_8851b = { -+ .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT, -+ .n_patterns = RTW89_MAX_PATTERN_NUM, -+ .pattern_max_len = RTW89_MAX_PATTERN_SIZE, -+ .pattern_min_len = 1, -+}; -+#endif -+ - const struct rtw89_chip_info rtw8851b_chip_info = { - .chip_id = RTL8851B, - .ops = &rtw8851b_chip_ops, -@@ -101,6 +110,9 @@ const struct rtw89_chip_info rtw8851b_ch - BIT(RTW89_DMA_ACH6) | BIT(RTW89_DMA_ACH7) | - BIT(RTW89_DMA_B1MG) | BIT(RTW89_DMA_B1HI), - .edcca_lvl_reg = R_SEG0R_EDCCA_LVL_V1, -+#ifdef CONFIG_PM -+ .wowlan_stub = &rtw_wowlan_stub_8851b, -+#endif - .xtal_info = &rtw8851b_xtal_info, - }; - EXPORT_SYMBOL(rtw8851b_chip_info); ---- a/drivers/net/wireless/realtek/rtw89/wow.c -+++ b/drivers/net/wireless/realtek/rtw89/wow.c -@@ -91,7 +91,7 @@ static void rtw89_wow_show_wakeup_reason - u32 wow_reason_reg; - u8 reason; - -- if (chip_id == RTL8852A || chip_id == RTL8852B) -+ if (chip_id == RTL8852A || chip_id == RTL8852B || chip_id == RTL8851B) - wow_reason_reg = R_AX_C2HREG_DATA3 + 3; - else - wow_reason_reg = R_AX_C2HREG_DATA3_V1 + 3; diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-080-wifi-rtw89-8851b-add-DLE-mem-and-HFC-quota.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-080-wifi-rtw89-8851b-add-DLE-mem-and-HFC-quota.patch deleted file mode 100644 index 403c871c0..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-080-wifi-rtw89-8851b-add-DLE-mem-and-HFC-quota.patch +++ /dev/null @@ -1,105 +0,0 @@ -From 85d1539c0273402911cee89cde1190cd4aec731f Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 21 Apr 2023 10:45:51 +0800 -Subject: [PATCH 080/136] wifi: rtw89: 8851b: add DLE mem and HFC quota - -Configure DLE (data link engine) memory size for operating modes. -Similarly, HFC standing for HCI flow control is used to set quota -according to operating modes, which are SCC or download firmware. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230421024551.29994-9-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.c | 2 + - drivers/net/wireless/realtek/rtw89/mac.h | 1 + - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 50 +++++++++++++++++++ - 3 files changed, 53 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -1475,6 +1475,8 @@ const struct rtw89_mac_size_set rtw89_ma - .ple_qt_52a_wow = {264, 0, 32, 20, 64, 13, 1005, 0, 64, 128, 120,}, - /* 8852B PCIE WOW */ - .ple_qt_52b_wow = {147, 0, 16, 20, 157, 13, 133, 0, 172, 14, 24, 0,}, -+ /* 8851B PCIE WOW */ -+ .ple_qt_51b_wow = {147, 0, 16, 20, 157, 13, 133, 0, 172, 14, 24, 0,}, - }; - EXPORT_SYMBOL(rtw89_mac_size); - ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -817,6 +817,7 @@ struct rtw89_mac_size_set { - const struct rtw89_ple_quota ple_qt58; - const struct rtw89_ple_quota ple_qt_52a_wow; - const struct rtw89_ple_quota ple_qt_52b_wow; -+ const struct rtw89_ple_quota ple_qt_51b_wow; - }; - - extern const struct rtw89_mac_size_set rtw89_mac_size; ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -18,6 +18,54 @@ - #define RTW8851B_MODULE_FIRMWARE \ - RTW8851B_FW_BASENAME ".bin" - -+static const struct rtw89_hfc_ch_cfg rtw8851b_hfc_chcfg_pcie[] = { -+ {5, 343, grp_0}, /* ACH 0 */ -+ {5, 343, grp_0}, /* ACH 1 */ -+ {5, 343, grp_0}, /* ACH 2 */ -+ {5, 343, grp_0}, /* ACH 3 */ -+ {0, 0, grp_0}, /* ACH 4 */ -+ {0, 0, grp_0}, /* ACH 5 */ -+ {0, 0, grp_0}, /* ACH 6 */ -+ {0, 0, grp_0}, /* ACH 7 */ -+ {4, 344, grp_0}, /* B0MGQ */ -+ {4, 344, grp_0}, /* B0HIQ */ -+ {0, 0, grp_0}, /* B1MGQ */ -+ {0, 0, grp_0}, /* B1HIQ */ -+ {40, 0, 0} /* FWCMDQ */ -+}; -+ -+static const struct rtw89_hfc_pub_cfg rtw8851b_hfc_pubcfg_pcie = { -+ 448, /* Group 0 */ -+ 0, /* Group 1 */ -+ 448, /* Public Max */ -+ 0 /* WP threshold */ -+}; -+ -+static const struct rtw89_hfc_param_ini rtw8851b_hfc_param_ini_pcie[] = { -+ [RTW89_QTA_SCC] = {rtw8851b_hfc_chcfg_pcie, &rtw8851b_hfc_pubcfg_pcie, -+ &rtw89_mac_size.hfc_preccfg_pcie, RTW89_HCIFC_POH}, -+ [RTW89_QTA_DLFW] = {NULL, NULL, &rtw89_mac_size.hfc_preccfg_pcie, -+ RTW89_HCIFC_POH}, -+ [RTW89_QTA_INVALID] = {NULL}, -+}; -+ -+static const struct rtw89_dle_mem rtw8851b_dle_mem_pcie[] = { -+ [RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size6, -+ &rtw89_mac_size.ple_size6, &rtw89_mac_size.wde_qt6, -+ &rtw89_mac_size.wde_qt6, &rtw89_mac_size.ple_qt18, -+ &rtw89_mac_size.ple_qt58}, -+ [RTW89_QTA_WOW] = {RTW89_QTA_WOW, &rtw89_mac_size.wde_size6, -+ &rtw89_mac_size.ple_size6, &rtw89_mac_size.wde_qt6, -+ &rtw89_mac_size.wde_qt6, &rtw89_mac_size.ple_qt18, -+ &rtw89_mac_size.ple_qt_51b_wow}, -+ [RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size9, -+ &rtw89_mac_size.ple_size8, &rtw89_mac_size.wde_qt4, -+ &rtw89_mac_size.wde_qt4, &rtw89_mac_size.ple_qt13, -+ &rtw89_mac_size.ple_qt13}, -+ [RTW89_QTA_INVALID] = {RTW89_QTA_INVALID, NULL, NULL, NULL, NULL, NULL, -+ NULL}, -+}; -+ - static const struct rtw89_xtal_info rtw8851b_xtal_info = { - .xcap_reg = R_AX_XTAL_ON_CTRL3, - .sc_xo_mask = B_AX_XTAL_SC_XO_A_BLOCK_MASK, -@@ -52,6 +100,8 @@ const struct rtw89_chip_info rtw8851b_ch - .max_amsdu_limit = 3500, - .dis_2g_40m_ul_ofdma = true, - .rsvd_ple_ofst = 0x2f800, -+ .hfc_param_ini = rtw8851b_hfc_param_ini_pcie, -+ .dle_mem = rtw8851b_dle_mem_pcie, - .wde_qempty_acq_num = 4, - .wde_qempty_mgq_sel = 4, - .rf_base_addr = {0xe000}, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-081-wifi-rtw89-8851b-add-set_channel_rf.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-081-wifi-rtw89-8851b-add-set_channel_rf.patch deleted file mode 100644 index 1ba41a055..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-081-wifi-rtw89-8851b-add-set_channel_rf.patch +++ /dev/null @@ -1,277 +0,0 @@ -From 2a59fe291fb3f1cbe6f08b96b47af84b9fd5b207 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 24 Apr 2023 14:52:38 +0800 -Subject: [PATCH 081/136] wifi: rtw89: 8851b: add set_channel_rf() - -Add to set RF registers according to the channel we want to switch. The -callers will be added afterward. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230424065242.17477-2-pkshih@realtek.com ---- - .../net/wireless/realtek/rtw89/rtw8851b_rfk.c | 239 ++++++++++++++++++ - .../net/wireless/realtek/rtw89/rtw8851b_rfk.h | 14 + - 2 files changed, 253 insertions(+) - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c - create mode 100644 drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h - ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -@@ -0,0 +1,239 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2022-2023 Realtek Corporation -+ */ -+ -+#include "coex.h" -+#include "debug.h" -+#include "mac.h" -+#include "phy.h" -+#include "reg.h" -+#include "rtw8851b.h" -+#include "rtw8851b_rfk.h" -+#include "rtw8851b_rfk_table.h" -+#include "rtw8851b_table.h" -+ -+static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ return RF_A; -+} -+ -+static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, -+ enum rtw89_bandwidth bw, bool dav) -+{ -+ u32 reg18_addr = dav ? RR_CFGCH : RR_CFGCH_V1; -+ u32 rf_reg18; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]===> %s\n", __func__); -+ -+ rf_reg18 = rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK); -+ if (rf_reg18 == INV_RF_DATA) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK]Invalid RF_0x18 for Path-%d\n", path); -+ return; -+ } -+ rf_reg18 &= ~RR_CFGCH_BW; -+ -+ switch (bw) { -+ case RTW89_CHANNEL_WIDTH_5: -+ case RTW89_CHANNEL_WIDTH_10: -+ case RTW89_CHANNEL_WIDTH_20: -+ rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_20M); -+ break; -+ case RTW89_CHANNEL_WIDTH_40: -+ rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_40M); -+ break; -+ case RTW89_CHANNEL_WIDTH_80: -+ rf_reg18 |= FIELD_PREP(RR_CFGCH_BW, CFGCH_BW_80M); -+ break; -+ default: -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]Fail to set CH\n"); -+ } -+ -+ rf_reg18 &= ~(RR_CFGCH_POW_LCK | RR_CFGCH_TRX_AH | RR_CFGCH_BCN | -+ RR_CFGCH_BW2) & RFREG_MASK; -+ rf_reg18 |= RR_CFGCH_BW2; -+ rtw89_write_rf(rtwdev, path, reg18_addr, RFREG_MASK, rf_reg18); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK] set %x at path%d, %x =0x%x\n", -+ bw, path, reg18_addr, -+ rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK)); -+} -+ -+static void _ctrl_bw(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_bandwidth bw) -+{ -+ _bw_setting(rtwdev, RF_PATH_A, bw, true); -+ _bw_setting(rtwdev, RF_PATH_A, bw, false); -+} -+ -+static bool _set_s0_arfc18(struct rtw89_dev *rtwdev, u32 val) -+{ -+ u32 bak; -+ u32 tmp; -+ int ret; -+ -+ bak = rtw89_read_rf(rtwdev, RF_PATH_A, RR_LDO, RFREG_MASK); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LDO, RR_LDO_SEL, 0x1); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_CFGCH, RFREG_MASK, val); -+ -+ ret = read_poll_timeout_atomic(rtw89_read_rf, tmp, tmp == 0, 1, 1000, -+ false, rtwdev, RF_PATH_A, RR_LPF, RR_LPF_BUSY); -+ if (ret) -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]LCK timeout\n"); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LDO, RFREG_MASK, bak); -+ -+ return !!ret; -+} -+ -+static void _lck_check(struct rtw89_dev *rtwdev) -+{ -+ u32 tmp; -+ -+ if (rtw89_read_rf(rtwdev, RF_PATH_A, RR_SYNFB, RR_SYNFB_LK) == 0) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]SYN MMD reset\n"); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MMD, RR_MMD_RST_EN, 0x1); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MMD, RR_MMD_RST_SYN, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MMD, RR_MMD_RST_SYN, 0x1); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MMD, RR_MMD_RST_EN, 0x0); -+ } -+ -+ udelay(10); -+ -+ if (rtw89_read_rf(rtwdev, RF_PATH_A, RR_SYNFB, RR_SYNFB_LK) == 0) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]re-set RF 0x18\n"); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RR_LCK_TRGSEL, 0x1); -+ tmp = rtw89_read_rf(rtwdev, RF_PATH_A, RR_CFGCH, RFREG_MASK); -+ _set_s0_arfc18(rtwdev, tmp); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RR_LCK_TRGSEL, 0x0); -+ } -+ -+ if (rtw89_read_rf(rtwdev, RF_PATH_A, RR_SYNFB, RR_SYNFB_LK) == 0) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]SYN off/on\n"); -+ -+ tmp = rtw89_read_rf(rtwdev, RF_PATH_A, RR_POW, RFREG_MASK); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RFREG_MASK, tmp); -+ tmp = rtw89_read_rf(rtwdev, RF_PATH_A, RR_SX, RFREG_MASK); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_SX, RFREG_MASK, tmp); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_SYNLUT, RR_SYNLUT_MOD, 0x1); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_POW, RR_POW_SYN, 0x3); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_SYNLUT, RR_SYNLUT_MOD, 0x0); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RR_LCK_TRGSEL, 0x1); -+ tmp = rtw89_read_rf(rtwdev, RF_PATH_A, RR_CFGCH, RFREG_MASK); -+ _set_s0_arfc18(rtwdev, tmp); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RR_LCK_TRGSEL, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]0xb2=%x, 0xc5=%x\n", -+ rtw89_read_rf(rtwdev, RF_PATH_A, RR_VCO, RFREG_MASK), -+ rtw89_read_rf(rtwdev, RF_PATH_A, RR_SYNFB, RFREG_MASK)); -+ } -+} -+ -+static void _set_ch(struct rtw89_dev *rtwdev, u32 val) -+{ -+ bool timeout; -+ -+ timeout = _set_s0_arfc18(rtwdev, val); -+ if (!timeout) -+ _lck_check(rtwdev); -+} -+ -+static void _ch_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, -+ u8 central_ch, bool dav) -+{ -+ u32 reg18_addr = dav ? RR_CFGCH : RR_CFGCH_V1; -+ bool is_2g_ch = central_ch <= 14; -+ u32 rf_reg18; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK]===> %s\n", __func__); -+ -+ rf_reg18 = rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK); -+ rf_reg18 &= ~(RR_CFGCH_BAND1 | RR_CFGCH_POW_LCK | RR_CFGCH_TRX_AH | -+ RR_CFGCH_BCN | RR_CFGCH_BAND0 | RR_CFGCH_CH); -+ rf_reg18 |= FIELD_PREP(RR_CFGCH_CH, central_ch); -+ -+ if (!is_2g_ch) -+ rf_reg18 |= FIELD_PREP(RR_CFGCH_BAND1, CFGCH_BAND1_5G) | -+ FIELD_PREP(RR_CFGCH_BAND0, CFGCH_BAND0_5G); -+ -+ rf_reg18 &= ~(RR_CFGCH_POW_LCK | RR_CFGCH_TRX_AH | RR_CFGCH_BCN | -+ RR_CFGCH_BW2) & RFREG_MASK; -+ rf_reg18 |= RR_CFGCH_BW2; -+ -+ if (path == RF_PATH_A && dav) -+ _set_ch(rtwdev, rf_reg18); -+ else -+ rtw89_write_rf(rtwdev, path, reg18_addr, RFREG_MASK, rf_reg18); -+ -+ rtw89_write_rf(rtwdev, path, RR_LCKST, RR_LCKST_BIN, 0); -+ rtw89_write_rf(rtwdev, path, RR_LCKST, RR_LCKST_BIN, 1); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK]CH: %d for Path-%d, reg0x%x = 0x%x\n", -+ central_ch, path, reg18_addr, -+ rtw89_read_rf(rtwdev, path, reg18_addr, RFREG_MASK)); -+} -+ -+static void _ctrl_ch(struct rtw89_dev *rtwdev, u8 central_ch) -+{ -+ _ch_setting(rtwdev, RF_PATH_A, central_ch, true); -+ _ch_setting(rtwdev, RF_PATH_A, central_ch, false); -+} -+ -+static void _set_rxbb_bw(struct rtw89_dev *rtwdev, enum rtw89_bandwidth bw, -+ enum rtw89_rf_path path) -+{ -+ rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_LUTWA, RR_LUTWA_M2, 0x12); -+ -+ if (bw == RTW89_CHANNEL_WIDTH_20) -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0x1b); -+ else if (bw == RTW89_CHANNEL_WIDTH_40) -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0x13); -+ else if (bw == RTW89_CHANNEL_WIDTH_80) -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0xb); -+ else -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB, 0x3); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RFK] set S%d RXBB BW 0x3F = 0x%x\n", path, -+ rtw89_read_rf(rtwdev, path, RR_LUTWD0, RR_LUTWD0_LB)); -+ -+ rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_RTXBW, 0x0); -+} -+ -+static void _rxbb_bw(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_bandwidth bw) -+{ -+ u8 kpath, path; -+ -+ kpath = _kpath(rtwdev, phy); -+ -+ for (path = 0; path < RF_PATH_NUM_8851B; path++) { -+ if (!(kpath & BIT(path))) -+ continue; -+ -+ _set_rxbb_bw(rtwdev, bw, path); -+ } -+} -+ -+static void rtw8851b_ctrl_bw_ch(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, u8 central_ch, -+ enum rtw89_band band, enum rtw89_bandwidth bw) -+{ -+ _ctrl_ch(rtwdev, central_ch); -+ _ctrl_bw(rtwdev, phy, bw); -+ _rxbb_bw(rtwdev, phy, bw); -+} -+ -+void rtw8851b_set_channel_rf(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ rtw8851b_ctrl_bw_ch(rtwdev, phy_idx, chan->channel, chan->band_type, -+ chan->band_width); -+} ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -@@ -0,0 +1,14 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2022-2023 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_8851B_RFK_H__ -+#define __RTW89_8851B_RFK_H__ -+ -+#include "core.h" -+ -+void rtw8851b_set_channel_rf(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx); -+ -+#endif diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-082-wifi-rtw89-8851b-rfk-add-AACK.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-082-wifi-rtw89-8851b-rfk-add-AACK.patch deleted file mode 100644 index 717c81890..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-082-wifi-rtw89-8851b-rfk-add-AACK.patch +++ /dev/null @@ -1,103 +0,0 @@ -From 27d5559fd169676496c65a1d07678115c90dfd34 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 24 Apr 2023 14:52:39 +0800 -Subject: [PATCH 082/136] wifi: rtw89: 8851b: rfk: add AACK - -Automatic amplitude control calibration (AACK) is the calibration to ensure -the oscillator is biased for a constant output amplitude. We do this -calibration if card does power on. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230424065242.17477-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 6 +++ - .../net/wireless/realtek/rtw89/rtw8851b_rfk.c | 42 +++++++++++++++++++ - .../net/wireless/realtek/rtw89/rtw8851b_rfk.h | 1 + - 3 files changed, 49 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3782,15 +3782,21 @@ - #define RR_LOGEN 0xa3 - #define RR_LOGEN_RPT GENMASK(19, 16) - #define RR_SX 0xaf -+#define RR_IBD 0xc9 -+#define RR_IBD_VAL GENMASK(4, 0) - #define RR_LDO 0xb1 - #define RR_LDO_SEL GENMASK(8, 6) - #define RR_VCO 0xb2 -+#define RR_VCO_SEL GENMASK(9, 8) -+#define RR_VCI 0xb3 -+#define RR_VCI_ON BIT(7) - #define RR_LPF 0xb7 - #define RR_LPF_BUSY BIT(8) - #define RR_XTALX2 0xb8 - #define RR_MALSEL 0xbe - #define RR_SYNFB 0xc5 - #define RR_SYNFB_LK BIT(15) -+#define RR_AACK 0xca - #define RR_LCKST 0xcf - #define RR_LCKST_BIN BIT(0) - #define RR_LCK_TRG 0xd3 ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -@@ -17,6 +17,48 @@ static u8 _kpath(struct rtw89_dev *rtwde - return RF_A; - } - -+void rtw8851b_aack(struct rtw89_dev *rtwdev) -+{ -+ u32 tmp05, ib[4]; -+ u32 tmp; -+ int ret; -+ int rek; -+ int i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]DO AACK\n"); -+ -+ tmp05 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_RSV1, RFREG_MASK); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RR_MOD_MASK, 0x3); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RFREG_MASK, 0x0); -+ -+ for (rek = 0; rek < 4; rek++) { -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_AACK, RFREG_MASK, 0x8201e); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_AACK, RFREG_MASK, 0x8201f); -+ fsleep(100); -+ -+ ret = read_poll_timeout_atomic(rtw89_read_rf, tmp, tmp, -+ 1, 1000, false, -+ rtwdev, RF_PATH_A, 0xd0, BIT(16)); -+ if (ret) -+ rtw89_warn(rtwdev, "[LCK]AACK timeout\n"); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_VCI, RR_VCI_ON, 0x1); -+ for (i = 0; i < 4; i++) { -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_VCO, RR_VCO_SEL, i); -+ ib[i] = rtw89_read_rf(rtwdev, RF_PATH_A, RR_IBD, RR_IBD_VAL); -+ } -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_VCI, RR_VCI_ON, 0x0); -+ -+ if (ib[0] != 0 && ib[1] != 0 && ib[2] != 0 && ib[3] != 0) -+ break; -+ } -+ -+ if (rek != 0) -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]AACK rek = %d\n", rek); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RFREG_MASK, tmp05); -+} -+ - static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, - enum rtw89_bandwidth bw, bool dav) - { ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -@@ -7,6 +7,7 @@ - - #include "core.h" - -+void rtw8851b_aack(struct rtw89_dev *rtwdev); - void rtw8851b_set_channel_rf(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-083-wifi-rtw89-8851b-rfk-add-RCK.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-083-wifi-rtw89-8851b-rfk-add-RCK.patch deleted file mode 100644 index 6c2e7b417..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-083-wifi-rtw89-8851b-rfk-add-RCK.patch +++ /dev/null @@ -1,83 +0,0 @@ -From ae546f0a23904761edeee1a154b94fb38b6195c0 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 24 Apr 2023 14:52:40 +0800 -Subject: [PATCH 083/136] wifi: rtw89: 8851b: rfk: add RCK - -RCK is synchronize RC calibration. Driver triggers this calibration and -sets the result to register. This calibration is needed once when interface -is going to up. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230424065242.17477-4-pkshih@realtek.com ---- - .../net/wireless/realtek/rtw89/rtw8851b_rfk.c | 40 +++++++++++++++++++ - .../net/wireless/realtek/rtw89/rtw8851b_rfk.h | 1 + - 2 files changed, 41 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -@@ -17,6 +17,41 @@ static u8 _kpath(struct rtw89_dev *rtwde - return RF_A; - } - -+static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ u32 rf_reg5; -+ u32 rck_val; -+ u32 val; -+ int ret; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] ====== S%d RCK ======\n", path); -+ -+ rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); -+ -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RR_MOD_V_RX); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] RF0x00 = 0x%05x\n", -+ rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); -+ -+ /* RCK trigger */ -+ rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, 0x00240); -+ -+ ret = read_poll_timeout_atomic(rtw89_read_rf, val, val, 2, 30, -+ false, rtwdev, path, RR_RCKS, BIT(3)); -+ -+ rck_val = rtw89_read_rf(rtwdev, path, RR_RCKC, RR_RCKC_CA); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] rck_val = 0x%x, ret = %d\n", -+ rck_val, ret); -+ -+ rtw89_write_rf(rtwdev, path, RR_RCKC, RFREG_MASK, rck_val); -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RCK] RF 0x1b = 0x%x\n", -+ rtw89_read_rf(rtwdev, path, RR_RCKC, RFREG_MASK)); -+} -+ - void rtw8851b_aack(struct rtw89_dev *rtwdev) - { - u32 tmp05, ib[4]; -@@ -59,6 +94,11 @@ void rtw8851b_aack(struct rtw89_dev *rtw - rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RFREG_MASK, tmp05); - } - -+void rtw8851b_rck(struct rtw89_dev *rtwdev) -+{ -+ _rck(rtwdev, RF_PATH_A); -+} -+ - static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, - enum rtw89_bandwidth bw, bool dav) - { ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -@@ -8,6 +8,7 @@ - #include "core.h" - - void rtw8851b_aack(struct rtw89_dev *rtwdev); -+void rtw8851b_rck(struct rtw89_dev *rtwdev); - void rtw8851b_set_channel_rf(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-084-wifi-rtw89-8851b-rfk-add-DACK.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-084-wifi-rtw89-8851b-rfk-add-DACK.patch deleted file mode 100644 index 66bea3053..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-084-wifi-rtw89-8851b-rfk-add-DACK.patch +++ /dev/null @@ -1,432 +0,0 @@ -From 93fbbeedca3bc93abfe5711b62c8749061c66bc0 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 24 Apr 2023 14:52:41 +0800 -Subject: [PATCH 084/136] wifi: rtw89: 8851b: rfk: add DACK - -DACK (digital-to-analog converters calibration) is used to calibrate DAC -to output good quality signals. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230424065242.17477-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 11 + - .../net/wireless/realtek/rtw89/rtw8851b_rfk.c | 343 ++++++++++++++++++ - .../net/wireless/realtek/rtw89/rtw8851b_rfk.h | 1 + - 3 files changed, 355 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -4759,11 +4759,15 @@ - #define B_IQKINF2_KCNT GENMASK(15, 8) - #define B_IQKINF2_NCTLV GENMASK(7, 0) - #define R_DCOF0 0xC000 -+#define B_DCOF0_RST BIT(17) - #define B_DCOF0_V GENMASK(4, 1) - #define R_DCOF1 0xC004 -+#define B_DCOF1_RST BIT(17) - #define B_DCOF1_S BIT(0) - #define R_DCOF8 0xC020 - #define B_DCOF8_V GENMASK(4, 1) -+#define R_DCOF9 0xC024 -+#define B_DCOF9_RST BIT(17) - #define R_DACK_S0P0 0xC040 - #define B_DACK_S0P0_OK BIT(31) - #define R_DACK_BIAS00 0xc048 -@@ -4815,6 +4819,7 @@ - #define B_ADDCK0D_VAL GENMASK(25, 16) - #define R_ADDCK0 0xC0F4 - #define B_ADDCK0_TRG BIT(11) -+#define B_ADDCK0_IQ BIT(10) - #define B_ADDCK0 GENMASK(9, 8) - #define B_ADDCK0_MAN GENMASK(5, 4) - #define B_ADDCK0_EN BIT(4) -@@ -4826,6 +4831,7 @@ - #define B_ADDCK0_RL0 GENMASK(17, 8) - #define R_ADDCKR0 0xC0FC - #define B_ADDCKR0_A0 GENMASK(19, 10) -+#define B_ADDCKR0_DC GENMASK(15, 4) - #define B_ADDCKR0_A1 GENMASK(9, 0) - #define R_DACK10 0xC100 - #define B_DACK10 GENMASK(4, 1) -@@ -4876,6 +4882,11 @@ - #define R_ADDCKR1 0xC1fC - #define B_ADDCKR1_A0 GENMASK(19, 10) - #define B_ADDCKR1_A1 GENMASK(9, 0) -+#define R_DACKN0_CTL 0xC210 -+#define B_DACKN0_EN BIT(0) -+#define B_DACKN0_V GENMASK(21, 14) -+#define R_DACKN1_CTL 0xC224 -+#define B_DACKN1_V GENMASK(21, 14) - - /* WiFi CPU local domain */ - #define R_AX_WDT_CTRL 0x0040 ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -@@ -17,6 +17,344 @@ static u8 _kpath(struct rtw89_dev *rtwde - return RF_A; - } - -+static void _dack_reset(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_DCOF0, B_DCOF0_RST, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_DCOF0, B_DCOF0_RST, 0x1); -+} -+ -+static void _drck(struct rtw89_dev *rtwdev) -+{ -+ u32 rck_d; -+ u32 val; -+ int ret; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]Ddie RCK start!!!\n"); -+ -+ rtw89_phy_write32_mask(rtwdev, R_DRCK, B_DRCK_IDLE, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_DRCK, B_DRCK_EN, 0x1); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, -+ 1, 10000, false, -+ rtwdev, R_DRCK_RES, B_DRCK_POL); -+ if (ret) -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DRCK timeout\n"); -+ -+ rtw89_phy_write32_mask(rtwdev, R_DRCK, B_DRCK_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_DRCK_FH, B_DRCK_LAT, 0x1); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_DRCK_FH, B_DRCK_LAT, 0x0); -+ -+ rck_d = rtw89_phy_read32_mask(rtwdev, R_DRCK_RES, 0x7c00); -+ rtw89_phy_write32_mask(rtwdev, R_DRCK, B_DRCK_IDLE, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_DRCK, B_DRCK_VAL, rck_d); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0xc0c4 = 0x%x\n", -+ rtw89_phy_read32_mask(rtwdev, R_DRCK, MASKDWORD)); -+} -+ -+static void _addck_backup(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0, 0x0); -+ -+ dack->addck_d[0][0] = rtw89_phy_read32_mask(rtwdev, R_ADDCKR0, B_ADDCKR0_A0); -+ dack->addck_d[0][1] = rtw89_phy_read32_mask(rtwdev, R_ADDCKR0, B_ADDCKR0_A1); -+} -+ -+static void _addck_reload(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0_RL, B_ADDCK0_RL1, dack->addck_d[0][0]); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0_RL, B_ADDCK0_RL0, dack->addck_d[0][1]); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0_RL, B_ADDCK0_RLS, 0x3); -+} -+ -+static void _dack_backup_s0(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u8 i; -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x1); -+ -+ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { -+ rtw89_phy_write32_mask(rtwdev, R_DCOF0, B_DCOF0_V, i); -+ dack->msbk_d[0][0][i] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK_S0P2, B_DACK_S0M0); -+ -+ rtw89_phy_write32_mask(rtwdev, R_DCOF8, B_DCOF8_V, i); -+ dack->msbk_d[0][1][i] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK_S0P3, B_DACK_S0M1); -+ } -+ -+ dack->biask_d[0][0] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK_BIAS00, B_DACK_BIAS00); -+ dack->biask_d[0][1] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK_BIAS01, B_DACK_BIAS01); -+ dack->dadck_d[0][0] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK_DADCK00, B_DACK_DADCK00) + 24; -+ dack->dadck_d[0][1] = -+ rtw89_phy_read32_mask(rtwdev, R_DACK_DADCK01, B_DACK_DADCK01) + 24; -+} -+ -+static void _dack_reload_by_path(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, u8 index) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u32 idx_offset, path_offset; -+ u32 offset, reg; -+ u32 tmp; -+ u8 i; -+ -+ if (index == 0) -+ idx_offset = 0; -+ else -+ idx_offset = 0x14; -+ -+ if (path == RF_PATH_A) -+ path_offset = 0; -+ else -+ path_offset = 0x28; -+ -+ offset = idx_offset + path_offset; -+ -+ rtw89_phy_write32_mask(rtwdev, R_DCOF1, B_DCOF1_RST, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_DCOF9, B_DCOF9_RST, 0x1); -+ -+ /* msbk_d: 15/14/13/12 */ -+ tmp = 0x0; -+ for (i = 0; i < 4; i++) -+ tmp |= dack->msbk_d[path][index][i + 12] << (i * 8); -+ reg = 0xc200 + offset; -+ rtw89_phy_write32(rtwdev, reg, tmp); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", reg, -+ rtw89_phy_read32_mask(rtwdev, reg, MASKDWORD)); -+ -+ /* msbk_d: 11/10/9/8 */ -+ tmp = 0x0; -+ for (i = 0; i < 4; i++) -+ tmp |= dack->msbk_d[path][index][i + 8] << (i * 8); -+ reg = 0xc204 + offset; -+ rtw89_phy_write32(rtwdev, reg, tmp); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", reg, -+ rtw89_phy_read32_mask(rtwdev, reg, MASKDWORD)); -+ -+ /* msbk_d: 7/6/5/4 */ -+ tmp = 0x0; -+ for (i = 0; i < 4; i++) -+ tmp |= dack->msbk_d[path][index][i + 4] << (i * 8); -+ reg = 0xc208 + offset; -+ rtw89_phy_write32(rtwdev, reg, tmp); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", reg, -+ rtw89_phy_read32_mask(rtwdev, reg, MASKDWORD)); -+ -+ /* msbk_d: 3/2/1/0 */ -+ tmp = 0x0; -+ for (i = 0; i < 4; i++) -+ tmp |= dack->msbk_d[path][index][i] << (i * 8); -+ reg = 0xc20c + offset; -+ rtw89_phy_write32(rtwdev, reg, tmp); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", reg, -+ rtw89_phy_read32_mask(rtwdev, reg, MASKDWORD)); -+ -+ /* dadak_d/biask_d */ -+ tmp = 0x0; -+ tmp = (dack->biask_d[path][index] << 22) | -+ (dack->dadck_d[path][index] << 14); -+ reg = 0xc210 + offset; -+ rtw89_phy_write32(rtwdev, reg, tmp); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x=0x%x\n", reg, -+ rtw89_phy_read32_mask(rtwdev, reg, MASKDWORD)); -+ -+ rtw89_phy_write32_mask(rtwdev, R_DACKN0_CTL + offset, B_DACKN0_EN, 0x1); -+} -+ -+static void _dack_reload(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ u8 index; -+ -+ for (index = 0; index < 2; index++) -+ _dack_reload_by_path(rtwdev, path, index); -+} -+ -+static void _addck(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u32 val; -+ int ret; -+ -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_RST, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_EN, 0x0); -+ udelay(1); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0, 0x1); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, -+ 1, 10000, false, -+ rtwdev, R_ADDCKR0, BIT(0)); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 ADDCK timeout\n"); -+ dack->addck_timeout[0] = true; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]ADDCK ret = %d\n", ret); -+ -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_RST, 0x0); -+} -+ -+static void _new_dadck(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u32 i_dc, q_dc, ic, qc; -+ u32 val; -+ int ret; -+ -+ rtw89_rfk_parser(rtwdev, &rtw8851b_dadck_setup_defs_tbl); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val, -+ 1, 10000, false, -+ rtwdev, R_ADDCKR0, BIT(0)); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 DADCK timeout\n"); -+ dack->addck_timeout[0] = true; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DADCK ret = %d\n", ret); -+ -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_IQ, 0x0); -+ i_dc = rtw89_phy_read32_mask(rtwdev, R_ADDCKR0, B_ADDCKR0_DC); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0, B_ADDCK0_IQ, 0x1); -+ q_dc = rtw89_phy_read32_mask(rtwdev, R_ADDCKR0, B_ADDCKR0_DC); -+ -+ ic = 0x80 - sign_extend32(i_dc, 11) * 6; -+ qc = 0x80 - sign_extend32(q_dc, 11) * 6; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DACK]before DADCK, i_dc=0x%x, q_dc=0x%x\n", i_dc, q_dc); -+ -+ dack->dadck_d[0][0] = ic; -+ dack->dadck_d[0][1] = qc; -+ -+ rtw89_phy_write32_mask(rtwdev, R_DACKN0_CTL, B_DACKN0_V, dack->dadck_d[0][0]); -+ rtw89_phy_write32_mask(rtwdev, R_DACKN1_CTL, B_DACKN1_V, dack->dadck_d[0][1]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DACK]after DADCK, 0xc210=0x%x, 0xc224=0x%x\n", -+ rtw89_phy_read32_mask(rtwdev, R_DACKN0_CTL, MASKDWORD), -+ rtw89_phy_read32_mask(rtwdev, R_DACKN1_CTL, MASKDWORD)); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8851b_dadck_post_defs_tbl); -+} -+ -+static bool _dack_s0_poll(struct rtw89_dev *rtwdev) -+{ -+ if (rtw89_phy_read32_mask(rtwdev, R_DACK_S0P0, B_DACK_S0P0_OK) == 0 || -+ rtw89_phy_read32_mask(rtwdev, R_DACK_S0P1, B_DACK_S0P1_OK) == 0 || -+ rtw89_phy_read32_mask(rtwdev, R_DACK_S0P2, B_DACK_S0P2_OK) == 0 || -+ rtw89_phy_read32_mask(rtwdev, R_DACK_S0P3, B_DACK_S0P3_OK) == 0) -+ return false; -+ -+ return true; -+} -+ -+static void _dack_s0(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ bool done; -+ int ret; -+ -+ rtw89_rfk_parser(rtwdev, &rtw8851b_dack_s0_1_defs_tbl); -+ _dack_reset(rtwdev, RF_PATH_A); -+ rtw89_phy_write32_mask(rtwdev, R_DCOF1, B_DCOF1_S, 0x1); -+ -+ ret = read_poll_timeout_atomic(_dack_s0_poll, done, done, -+ 1, 10000, false, rtwdev); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 DACK timeout\n"); -+ dack->msbk_timeout[0] = true; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK ret = %d\n", ret); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8851b_dack_s0_2_defs_tbl); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]after S0 DADCK\n"); -+ -+ _dack_backup_s0(rtwdev); -+ _dack_reload(rtwdev, RF_PATH_A); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW, B_P0_NRBW_DBG, 0x0); -+} -+ -+static void _dack(struct rtw89_dev *rtwdev) -+{ -+ _dack_s0(rtwdev); -+} -+ -+static void _dack_dump(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u8 i; -+ u8 t; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 ADC_DCK ic = 0x%x, qc = 0x%x\n", -+ dack->addck_d[0][0], dack->addck_d[0][1]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 DAC_DCK ic = 0x%x, qc = 0x%x\n", -+ dack->dadck_d[0][0], dack->dadck_d[0][1]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 biask ic = 0x%x, qc = 0x%x\n", -+ dack->biask_d[0][0], dack->biask_d[0][1]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 MSBK ic:\n"); -+ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { -+ t = dack->msbk_d[0][0][i]; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]S0 MSBK qc:\n"); -+ for (i = 0; i < RTW89_DACK_MSBK_NR; i++) { -+ t = dack->msbk_d[0][1][i]; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]0x%x\n", t); -+ } -+} -+ -+static void _dack_manual_off(struct rtw89_dev *rtwdev) -+{ -+ rtw89_rfk_parser(rtwdev, &rtw8851b_dack_manual_off_defs_tbl); -+} -+ -+static void _dac_cal(struct rtw89_dev *rtwdev, bool force) -+{ -+ struct rtw89_dack_info *dack = &rtwdev->dack; -+ u32 rf0_0; -+ -+ dack->dack_done = false; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK 0x2\n"); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK start!!!\n"); -+ rf0_0 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]RF0=0x%x\n", rf0_0); -+ -+ _drck(rtwdev); -+ _dack_manual_off(rtwdev); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, 0x337e1); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RR_RSV1_RST, 0x0); -+ -+ _addck(rtwdev); -+ _addck_backup(rtwdev); -+ _addck_reload(rtwdev); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RFREG_MASK, 0x40001); -+ -+ _dack(rtwdev); -+ _new_dadck(rtwdev); -+ _dack_dump(rtwdev); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RR_RSV1_RST, 0x1); -+ -+ dack->dack_done = true; -+ dack->dack_cnt++; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK finish!!!\n"); -+} -+ - static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) - { - u32 rf_reg5; -@@ -99,6 +437,11 @@ void rtw8851b_rck(struct rtw89_dev *rtwd - _rck(rtwdev, RF_PATH_A); - } - -+void rtw8851b_dack(struct rtw89_dev *rtwdev) -+{ -+ _dac_cal(rtwdev, false); -+} -+ - static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, - enum rtw89_bandwidth bw, bool dav) - { ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -@@ -9,6 +9,7 @@ - - void rtw8851b_aack(struct rtw89_dev *rtwdev); - void rtw8851b_rck(struct rtw89_dev *rtwdev); -+void rtw8851b_dack(struct rtw89_dev *rtwdev); - void rtw8851b_set_channel_rf(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-085-wifi-rtw89-8851b-rfk-add-IQK.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-085-wifi-rtw89-8851b-rfk-add-IQK.patch deleted file mode 100644 index 57beb1afd..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-085-wifi-rtw89-8851b-rfk-add-IQK.patch +++ /dev/null @@ -1,1203 +0,0 @@ -From a83c6bb22745168dbe6592a9872f262615ee174b Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 24 Apr 2023 14:52:42 +0800 -Subject: [PATCH 085/136] wifi: rtw89: 8851b: rfk: add IQK - -IQ signal calibration is a very important calibration to yield good RF -performance. We do this calibration only if we are going to run on AP -channel. During scanning phase, without this calibration RF performance -is still acceptable because it transmits with low data rate at this phase. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230424065242.17477-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 5 + - .../net/wireless/realtek/rtw89/rtw8851b_rfk.c | 1111 +++++++++++++++++ - .../net/wireless/realtek/rtw89/rtw8851b_rfk.h | 1 + - 3 files changed, 1117 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3580,6 +3580,7 @@ - #define RR_MOD_MASK GENMASK(19, 16) - #define RR_MOD_DCK GENMASK(14, 10) - #define RR_MOD_RGM GENMASK(13, 4) -+#define RR_MOD_RXB GENMASK(9, 5) - #define RR_MOD_V_DOWN 0x0 - #define RR_MOD_V_STANDBY 0x1 - #define RR_TXAGC 0x10001 -@@ -3719,6 +3720,7 @@ - #define RR_RXBB 0x83 - #define RR_RXBB_VOBUF GENMASK(15, 12) - #define RR_RXBB_C2G GENMASK(16, 10) -+#define RR_RXBB_C2 GENMASK(11, 8) - #define RR_RXBB_C1G GENMASK(9, 8) - #define RR_RXBB_FATT GENMASK(7, 0) - #define RR_RXBB_ATTR GENMASK(7, 4) -@@ -4601,6 +4603,8 @@ - #define IQK_DF4_TXT_8_25MHZ 0x021 - #define R_IQK_CFG 0x8034 - #define B_IQK_CFG_SET GENMASK(5, 4) -+#define R_IQK_RXA 0x8044 -+#define B_IQK_RXAGC GENMASK(15, 13) - #define R_TPG_SEL 0x8068 - #define R_TPG_MOD 0x806C - #define B_TPG_MOD_F GENMASK(2, 1) -@@ -4648,6 +4652,7 @@ - #define B_PRT_COM_SYNERR BIT(30) - #define B_PRT_COM_DCI GENMASK(27, 16) - #define B_PRT_COM_CORV GENMASK(15, 8) -+#define B_RPT_COM_RDY GENMASK(15, 0) - #define B_PRT_COM_DCQ GENMASK(11, 0) - #define B_PRT_COM_RXOV BIT(8) - #define B_PRT_COM_GL GENMASK(7, 4) ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -@@ -12,11 +12,83 @@ - #include "rtw8851b_rfk_table.h" - #include "rtw8851b_table.h" - -+#define RTW8851B_RXK_GROUP_NR 4 -+#define RTW8851B_TXK_GROUP_NR 1 -+#define RTW8851B_IQK_VER 0x2a -+#define RTW8851B_IQK_SS 1 -+#define RTW8851B_LOK_GRAM 10 -+ -+enum rtw8851b_iqk_type { -+ ID_TXAGC = 0x0, -+ ID_FLOK_COARSE = 0x1, -+ ID_FLOK_FINE = 0x2, -+ ID_TXK = 0x3, -+ ID_RXAGC = 0x4, -+ ID_RXK = 0x5, -+ ID_NBTXK = 0x6, -+ ID_NBRXK = 0x7, -+ ID_FLOK_VBUFFER = 0x8, -+ ID_A_FLOK_COARSE = 0x9, -+ ID_G_FLOK_COARSE = 0xa, -+ ID_A_FLOK_FINE = 0xb, -+ ID_G_FLOK_FINE = 0xc, -+ ID_IQK_RESTORE = 0x10, -+}; -+ -+static const u32 g_idxrxgain[RTW8851B_RXK_GROUP_NR] = {0x10e, 0x116, 0x28e, 0x296}; -+static const u32 g_idxattc2[RTW8851B_RXK_GROUP_NR] = {0x0, 0xf, 0x0, 0xf}; -+static const u32 g_idxrxagc[RTW8851B_RXK_GROUP_NR] = {0x0, 0x1, 0x2, 0x3}; -+static const u32 a_idxrxgain[RTW8851B_RXK_GROUP_NR] = {0x10C, 0x112, 0x28c, 0x292}; -+static const u32 a_idxattc2[RTW8851B_RXK_GROUP_NR] = {0xf, 0xf, 0xf, 0xf}; -+static const u32 a_idxrxagc[RTW8851B_RXK_GROUP_NR] = {0x4, 0x5, 0x6, 0x7}; -+static const u32 a_power_range[RTW8851B_TXK_GROUP_NR] = {0x0}; -+static const u32 a_track_range[RTW8851B_TXK_GROUP_NR] = {0x6}; -+static const u32 a_gain_bb[RTW8851B_TXK_GROUP_NR] = {0x0a}; -+static const u32 a_itqt[RTW8851B_TXK_GROUP_NR] = {0x12}; -+static const u32 g_power_range[RTW8851B_TXK_GROUP_NR] = {0x0}; -+static const u32 g_track_range[RTW8851B_TXK_GROUP_NR] = {0x6}; -+static const u32 g_gain_bb[RTW8851B_TXK_GROUP_NR] = {0x10}; -+static const u32 g_itqt[RTW8851B_TXK_GROUP_NR] = {0x12}; -+ -+static const u32 rtw8851b_backup_bb_regs[] = {0xc0ec, 0xc0e8}; -+static const u32 rtw8851b_backup_rf_regs[] = { -+ 0xef, 0xde, 0x0, 0x1e, 0x2, 0x85, 0x90, 0x5}; -+ -+#define BACKUP_BB_REGS_NR ARRAY_SIZE(rtw8851b_backup_bb_regs) -+#define BACKUP_RF_REGS_NR ARRAY_SIZE(rtw8851b_backup_rf_regs) -+ - static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) - { - return RF_A; - } - -+static void _adc_fifo_rst(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ u8 path) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RXK, 0x0101); -+ fsleep(10); -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RXK, 0x1111); -+} -+ -+static void _wait_rx_mode(struct rtw89_dev *rtwdev, u8 kpath) -+{ -+ u32 rf_mode; -+ u8 path; -+ int ret; -+ -+ for (path = 0; path < RF_PATH_MAX; path++) { -+ if (!(kpath & BIT(path))) -+ continue; -+ -+ ret = read_poll_timeout_atomic(rtw89_read_rf, rf_mode, -+ rf_mode != 2, 2, 5000, false, -+ rtwdev, path, 0x00, RR_MOD_MASK); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK] Wait S%d to Rx mode!! (ret = %d)\n", -+ path, ret); -+ } -+} -+ - static void _dack_reset(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) - { - rtw89_phy_write32_mask(rtwdev, R_DCOF0, B_DCOF0_RST, 0x0); -@@ -355,6 +427,1029 @@ static void _dac_cal(struct rtw89_dev *r - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK finish!!!\n"); - } - -+static void _iqk_sram(struct rtw89_dev *rtwdev, u8 path) -+{ -+ u32 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKDWORD, 0x00020000); -+ rtw89_phy_write32_mask(rtwdev, R_MDPK_RX_DCK, MASKDWORD, 0x80000000); -+ rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX2, MASKDWORD, 0x00000080); -+ rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, 0x00010000); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x009); -+ -+ for (i = 0; i <= 0x9f; i++) { -+ rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, -+ 0x00010000 + i); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]0x%x\n", -+ rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCI)); -+ } -+ -+ for (i = 0; i <= 0x9f; i++) { -+ rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, -+ 0x00010000 + i); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]0x%x\n", -+ rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCQ)); -+ } -+ -+ rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX2, MASKDWORD, 0x00000000); -+ rtw89_phy_write32_mask(rtwdev, R_SRAM_IQRX, MASKDWORD, 0x00000000); -+} -+ -+static void _iqk_rxk_setting(struct rtw89_dev *rtwdev, u8 path) -+{ -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, 0xc); -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_POW, 0x1); -+} -+ -+static bool _iqk_check_cal(struct rtw89_dev *rtwdev, u8 path) -+{ -+ bool fail1 = false, fail2 = false; -+ u32 val; -+ int ret; -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val == 0x55, -+ 10, 8200, false, -+ rtwdev, 0xbff8, MASKBYTE0); -+ if (ret) { -+ fail1 = true; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]NCTL1 IQK timeout!!!\n"); -+ } -+ -+ fsleep(10); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val == 0x8000, -+ 10, 200, false, -+ rtwdev, R_RPT_COM, B_RPT_COM_RDY); -+ if (ret) { -+ fail2 = true; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]NCTL2 IQK timeout!!!\n"); -+ } -+ -+ fsleep(10); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, MASKBYTE0, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, ret = %d, notready = %x fail=%d,%d\n", -+ path, ret, fail1 || fail2, fail1, fail2); -+ -+ return fail1 || fail2; -+} -+ -+static bool _iqk_one_shot(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ u8 path, u8 ktype) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool notready; -+ u32 iqk_cmd; -+ -+ switch (ktype) { -+ case ID_A_FLOK_COARSE: -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]============ S%d ID_A_FLOK_COARSE ============\n", path); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK, B_IQK_RFC_ON, 0x1); -+ iqk_cmd = 0x108 | (1 << (4 + path)); -+ break; -+ case ID_G_FLOK_COARSE: -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]============ S%d ID_G_FLOK_COARSE ============\n", path); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK, B_IQK_RFC_ON, 0x1); -+ iqk_cmd = 0x108 | (1 << (4 + path)); -+ break; -+ case ID_A_FLOK_FINE: -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]============ S%d ID_A_FLOK_FINE ============\n", path); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK, B_IQK_RFC_ON, 0x1); -+ iqk_cmd = 0x308 | (1 << (4 + path)); -+ break; -+ case ID_G_FLOK_FINE: -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]============ S%d ID_G_FLOK_FINE ============\n", path); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK, B_IQK_RFC_ON, 0x1); -+ iqk_cmd = 0x308 | (1 << (4 + path)); -+ break; -+ case ID_TXK: -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]============ S%d ID_TXK ============\n", path); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK, B_IQK_RFC_ON, 0x0); -+ iqk_cmd = 0x008 | (1 << (path + 4)) | -+ (((0x8 + iqk_info->iqk_bw[path]) & 0xf) << 8); -+ break; -+ case ID_RXAGC: -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]============ S%d ID_RXAGC ============\n", path); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK, B_IQK_RFC_ON, 0x1); -+ iqk_cmd = 0x708 | (1 << (4 + path)) | (path << 1); -+ break; -+ case ID_RXK: -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]============ S%d ID_RXK ============\n", path); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK, B_IQK_RFC_ON, 0x1); -+ iqk_cmd = 0x008 | (1 << (path + 4)) | -+ (((0xc + iqk_info->iqk_bw[path]) & 0xf) << 8); -+ break; -+ case ID_NBTXK: -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]============ S%d ID_NBTXK ============\n", path); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK, B_IQK_RFC_ON, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, -+ 0x00b); -+ iqk_cmd = 0x408 | (1 << (4 + path)); -+ break; -+ case ID_NBRXK: -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]============ S%d ID_NBRXK ============\n", path); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK, B_IQK_RFC_ON, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, -+ 0x011); -+ iqk_cmd = 0x608 | (1 << (4 + path)); -+ break; -+ default: -+ return false; -+ } -+ -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, iqk_cmd + 1); -+ notready = _iqk_check_cal(rtwdev, path); -+ if (iqk_info->iqk_sram_en && -+ (ktype == ID_NBRXK || ktype == ID_RXK)) -+ _iqk_sram(rtwdev, path); -+ -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK, B_IQK_RFC_ON, 0x0); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, ktype= %x, id = %x, notready = %x\n", -+ path, ktype, iqk_cmd + 1, notready); -+ -+ return notready; -+} -+ -+static bool _rxk_2g_group_sel(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool kfail = false; -+ bool notready; -+ u32 rf_0; -+ u8 gp; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ -+ for (gp = 0; gp < RTW8851B_RXK_GROUP_NR; gp++) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, gp = %x\n", path, gp); -+ -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RGM, g_idxrxgain[gp]); -+ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C2, g_idxattc2[gp]); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_SEL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_G3, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_GP_V1, gp); -+ -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RFREG_MASK, 0x80013); -+ fsleep(10); -+ rf_0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF2, B_IQK_DIF2_RXPI, rf_0); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_RXA, B_IQK_RXAGC, g_idxrxagc[gp]); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x11); -+ -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXAGC); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, RXAGC 0x8008 = 0x%x, rxbb = %x\n", path, -+ rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD), -+ rtw89_read_rf(rtwdev, path, RR_MOD, 0x003e0)); -+ -+ if (gp == 0x3) { -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); -+ iqk_info->nb_rxcfir[path] = -+ rtw89_phy_read32_mask(rtwdev, R_RXIQC, MASKDWORD) | 0x2; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, -+ rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); -+ } -+ -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, WBRXK 0x8008 = 0x%x\n", path, -+ rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); -+ } -+ -+ if (!notready) -+ kfail = !!rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, B_NCTL_RPT_FLG); -+ -+ if (kfail) -+ _iqk_sram(rtwdev, path); -+ -+ if (kfail) { -+ rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), -+ MASKDWORD, iqk_info->nb_rxcfir[path] | 0x2); -+ iqk_info->is_wb_txiqk[path] = false; -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), -+ MASKDWORD, 0x40000000); -+ iqk_info->is_wb_txiqk[path] = true; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, kfail = 0x%x, 0x8%x3c = 0x%x\n", path, kfail, -+ 1 << path, iqk_info->nb_rxcfir[path]); -+ return kfail; -+} -+ -+static bool _rxk_5g_group_sel(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool kfail = false; -+ bool notready; -+ u32 rf_0; -+ u8 gp; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ -+ for (gp = 0; gp < RTW8851B_RXK_GROUP_NR; gp++) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, gp = %x\n", path, gp); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, 0x03ff0, a_idxrxgain[gp]); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_RXA2, RR_RXA2_ATT, a_idxattc2[gp]); -+ -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_SEL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_G3, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_GP_V1, gp); -+ -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RFREG_MASK, 0x80013); -+ fsleep(100); -+ rf_0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF2, B_IQK_DIF2_RXPI, rf_0); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_RXA, B_IQK_RXAGC, a_idxrxagc[gp]); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x11); -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXAGC); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, RXAGC 0x8008 = 0x%x, rxbb = %x\n", path, -+ rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD), -+ rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_RXB)); -+ -+ if (gp == 0x3) { -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); -+ iqk_info->nb_rxcfir[path] = -+ rtw89_phy_read32_mask(rtwdev, R_RXIQC, MASKDWORD) | 0x2; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, -+ rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); -+ } -+ -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, WBRXK 0x8008 = 0x%x\n", path, -+ rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); -+ } -+ -+ if (!notready) -+ kfail = !!rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, B_NCTL_RPT_FLG); -+ -+ if (kfail) -+ _iqk_sram(rtwdev, path); -+ -+ if (kfail) { -+ rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, -+ iqk_info->nb_rxcfir[path] | 0x2); -+ iqk_info->is_wb_txiqk[path] = false; -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, -+ 0x40000000); -+ iqk_info->is_wb_txiqk[path] = true; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, kfail = 0x%x, 0x8%x3c = 0x%x\n", path, kfail, -+ 1 << path, iqk_info->nb_rxcfir[path]); -+ return kfail; -+} -+ -+static bool _iqk_5g_nbrxk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool kfail = false; -+ bool notready; -+ u8 gp = 0x3; -+ u32 rf_0; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, gp = %x\n", path, gp); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RR_MOD_RGM, a_idxrxgain[gp]); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_RXA2, RR_RXA2_ATT, a_idxattc2[gp]); -+ -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_SEL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_G3, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_GP_V1, gp); -+ -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RFREG_MASK, 0x80013); -+ fsleep(100); -+ rf_0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF2, B_IQK_DIF2_RXPI, rf_0); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_RXA, B_IQK_RXAGC, a_idxrxagc[gp]); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x11); -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXAGC); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, RXAGC 0x8008 = 0x%x, rxbb = %x\n", path, -+ rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD), -+ rtw89_read_rf(rtwdev, path, RR_MOD, 0x003e0)); -+ -+ if (gp == 0x3) { -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); -+ iqk_info->nb_rxcfir[path] = -+ rtw89_phy_read32_mask(rtwdev, R_RXIQC, MASKDWORD) | 0x2; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, -+ rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, WBRXK 0x8008 = 0x%x\n", -+ path, rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); -+ -+ if (!notready) -+ kfail = !!rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, B_NCTL_RPT_FLG); -+ -+ if (kfail) { -+ rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), -+ MASKDWORD, 0x40000002); -+ iqk_info->is_wb_rxiqk[path] = false; -+ } else { -+ iqk_info->is_wb_rxiqk[path] = false; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, kfail = 0x%x, 0x8%x3c = 0x%x\n", path, kfail, -+ 1 << path, iqk_info->nb_rxcfir[path]); -+ -+ return kfail; -+} -+ -+static bool _iqk_2g_nbrxk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool kfail = false; -+ bool notready; -+ u8 gp = 0x3; -+ u32 rf_0; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, gp = %x\n", path, gp); -+ -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RGM, g_idxrxgain[gp]); -+ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_C2, g_idxattc2[gp]); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_SEL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_G3, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_GP_V1, gp); -+ -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RFREG_MASK, 0x80013); -+ fsleep(10); -+ rf_0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF2, B_IQK_DIF2_RXPI, rf_0); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_RXA, B_IQK_RXAGC, g_idxrxagc[gp]); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x11); -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXAGC); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, RXAGC 0x8008 = 0x%x, rxbb = %x\n", -+ path, rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD), -+ rtw89_read_rf(rtwdev, path, RR_MOD, 0x003e0)); -+ -+ if (gp == 0x3) { -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); -+ iqk_info->nb_rxcfir[path] = -+ rtw89_phy_read32_mask(rtwdev, R_RXIQC, MASKDWORD) | 0x2; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, -+ rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, WBRXK 0x8008 = 0x%x\n", -+ path, rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); -+ -+ if (!notready) -+ kfail = !!rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, B_NCTL_RPT_FLG); -+ -+ if (kfail) { -+ rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), -+ MASKDWORD, 0x40000002); -+ iqk_info->is_wb_rxiqk[path] = false; -+ } else { -+ iqk_info->is_wb_rxiqk[path] = false; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, kfail = 0x%x, 0x8%x3c = 0x%x\n", path, kfail, -+ 1 << path, iqk_info->nb_rxcfir[path]); -+ return kfail; -+} -+ -+static void _iqk_rxclk_setting(struct rtw89_dev *rtwdev, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ -+ rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_CKT, 0x1); -+ -+ if (iqk_info->iqk_bw[path] == RTW89_CHANNEL_WIDTH_80) -+ rtw89_rfk_parser(rtwdev, &rtw8851b_iqk_rxclk_80_defs_tbl); -+ else -+ rtw89_rfk_parser(rtwdev, &rtw8851b_iqk_rxclk_others_defs_tbl); -+} -+ -+static bool _txk_5g_group_sel(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool kfail = false; -+ bool notready; -+ u8 gp; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ -+ for (gp = 0x0; gp < RTW8851B_TXK_GROUP_NR; gp++) { -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, a_power_range[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, a_track_range[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, a_gain_bb[gp]); -+ -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_SEL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_G3, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_G2, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_GP, gp); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP, MASKDWORD, a_itqt[gp]); -+ -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); -+ iqk_info->nb_txcfir[path] = -+ rtw89_phy_read32_mask(rtwdev, R_TXIQC, MASKDWORD) | 0x2; -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), -+ MASKDWORD, a_itqt[gp]); -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_TXK); -+ } -+ -+ if (!notready) -+ kfail = !!rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, B_NCTL_RPT_FLG); -+ -+ if (kfail) { -+ rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), -+ MASKDWORD, iqk_info->nb_txcfir[path] | 0x2); -+ iqk_info->is_wb_txiqk[path] = false; -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), -+ MASKDWORD, 0x40000000); -+ iqk_info->is_wb_txiqk[path] = true; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, kfail = 0x%x, 0x8%x38 = 0x%x\n", path, kfail, -+ 1 << path, iqk_info->nb_txcfir[path]); -+ return kfail; -+} -+ -+static bool _txk_2g_group_sel(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool kfail = false; -+ bool notready; -+ u8 gp; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ -+ for (gp = 0x0; gp < RTW8851B_TXK_GROUP_NR; gp++) { -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, g_power_range[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, g_track_range[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, g_gain_bb[gp]); -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP, MASKDWORD, g_itqt[gp]); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_SEL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_G3, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_G2, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_GP, gp); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00); -+ -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); -+ iqk_info->nb_txcfir[path] = -+ rtw89_phy_read32_mask(rtwdev, R_TXIQC, MASKDWORD) | 0x2; -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), -+ MASKDWORD, g_itqt[gp]); -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_TXK); -+ } -+ -+ if (!notready) -+ kfail = !!rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, B_NCTL_RPT_FLG); -+ -+ if (kfail) { -+ rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), -+ MASKDWORD, iqk_info->nb_txcfir[path] | 0x2); -+ iqk_info->is_wb_txiqk[path] = false; -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), -+ MASKDWORD, 0x40000000); -+ iqk_info->is_wb_txiqk[path] = true; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, kfail = 0x%x, 0x8%x38 = 0x%x\n", path, kfail, -+ 1 << path, iqk_info->nb_txcfir[path]); -+ return kfail; -+} -+ -+static bool _iqk_5g_nbtxk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool kfail = false; -+ bool notready; -+ u8 gp; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ -+ for (gp = 0x0; gp < RTW8851B_TXK_GROUP_NR; gp++) { -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, a_power_range[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, a_track_range[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, a_gain_bb[gp]); -+ -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_SEL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_G3, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_G2, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_GP, gp); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP, MASKDWORD, a_itqt[gp]); -+ -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); -+ iqk_info->nb_txcfir[path] = -+ rtw89_phy_read32_mask(rtwdev, R_TXIQC, MASKDWORD) | 0x2; -+ } -+ -+ if (!notready) -+ kfail = !!rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, B_NCTL_RPT_FLG); -+ -+ if (kfail) { -+ rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), -+ MASKDWORD, 0x40000002); -+ iqk_info->is_wb_rxiqk[path] = false; -+ } else { -+ iqk_info->is_wb_rxiqk[path] = false; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, kfail = 0x%x, 0x8%x38 = 0x%x\n", path, kfail, -+ 1 << path, iqk_info->nb_txcfir[path]); -+ return kfail; -+} -+ -+static bool _iqk_2g_nbtxk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool kfail = false; -+ bool notready; -+ u8 gp; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ -+ for (gp = 0x0; gp < RTW8851B_TXK_GROUP_NR; gp++) { -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, g_power_range[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, g_track_range[gp]); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, g_gain_bb[gp]); -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP, MASKDWORD, g_itqt[gp]); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_SEL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_G3, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_G2, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_GP, gp); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00); -+ -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBTXK); -+ iqk_info->nb_txcfir[path] = -+ rtw89_phy_read32_mask(rtwdev, R_TXIQC + (path << 8), -+ MASKDWORD) | 0x2; -+ } -+ -+ if (!notready) -+ kfail = !!rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, B_NCTL_RPT_FLG); -+ -+ if (kfail) { -+ rtw89_phy_write32_mask(rtwdev, R_TXIQC + (path << 8), -+ MASKDWORD, 0x40000002); -+ iqk_info->is_wb_rxiqk[path] = false; -+ } else { -+ iqk_info->is_wb_rxiqk[path] = false; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, kfail = 0x%x, 0x8%x38 = 0x%x\n", path, kfail, -+ 1 << path, iqk_info->nb_txcfir[path]); -+ return kfail; -+} -+ -+static bool _iqk_2g_lok(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ u8 path) -+{ -+ static const u32 g_txbb[RTW8851B_LOK_GRAM] = { -+ 0x02, 0x06, 0x0a, 0x0c, 0x0e, 0x10, 0x12, 0x14, 0x16, 0x17}; -+ static const u32 g_itqt[RTW8851B_LOK_GRAM] = { -+ 0x09, 0x09, 0x09, 0x09, 0x09, 0x09, 0x12, 0x12, 0x12, 0x1b}; -+ static const u32 g_wa[RTW8851B_LOK_GRAM] = { -+ 0x00, 0x04, 0x08, 0x0c, 0x0e, 0x10, 0x12, 0x14, 0x16, 0x17}; -+ bool fail = false; -+ u8 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTDBG, RR_LUTDBG_LOK, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_TXIG, RR_TXIG_GR0, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_TXIG, RR_TXIG_GR1, 0x6); -+ -+ for (i = 0; i < RTW8851B_LOK_GRAM; i++) { -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_TXIG, RR_TXIG_TG, g_txbb[i]); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWA, RR_LUTWA_M1, g_wa[i]); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK, B_IQK_RFC_ON, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP, B_KIP_IQP_IQSW, g_itqt[i]); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x021); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, -+ 0x00000109 | (1 << (4 + path))); -+ fail |= _iqk_check_cal(rtwdev, path); -+ -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP, B_KIP_IQP_IQSW, g_itqt[i]); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, -+ 0x00000309 | (1 << (4 + path))); -+ fail |= _iqk_check_cal(rtwdev, path); -+ -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK, B_IQK_RFC_ON, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S0, i = %x, 0x8[19:15] = 0x%x,0x8[09:05] = 0x%x\n", i, -+ rtw89_read_rf(rtwdev, RF_PATH_A, RR_DTXLOK, 0xf8000), -+ rtw89_read_rf(rtwdev, RF_PATH_A, RR_DTXLOK, 0x003e0)); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S0, i = %x, 0x9[19:16] = 0x%x,0x9[09:06] = 0x%x\n", i, -+ rtw89_read_rf(rtwdev, RF_PATH_A, RR_RSV2, 0xf0000), -+ rtw89_read_rf(rtwdev, RF_PATH_A, RR_RSV2, 0x003c0)); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S0, i = %x, 0x58 = %x\n", i, -+ rtw89_read_rf(rtwdev, RF_PATH_A, RR_TXMO, RFREG_MASK)); -+ } -+ -+ return fail; -+} -+ -+static bool _iqk_5g_lok(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ u8 path) -+{ -+ static const u32 a_txbb[RTW8851B_LOK_GRAM] = { -+ 0x02, 0x06, 0x0a, 0x0c, 0x0e, 0x10, 0x12, 0x14, 0x16, 0x17}; -+ static const u32 a_itqt[RTW8851B_LOK_GRAM] = { -+ 0x09, 0x09, 0x09, 0x12, 0x12, 0x12, 0x1b, 0x1b, 0x1b, 0x1b}; -+ static const u32 a_wa[RTW8851B_LOK_GRAM] = { -+ 0x80, 0x84, 0x88, 0x8c, 0x8e, 0x90, 0x92, 0x94, 0x96, 0x97}; -+ bool fail = false; -+ u8 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTDBG, RR_LUTDBG_LOK, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_TXIG, RR_TXIG_GR0, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_TXIG, RR_TXIG_GR1, 0x7); -+ -+ for (i = 0; i < RTW8851B_LOK_GRAM; i++) { -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_TXIG, RR_TXIG_TG, a_txbb[i]); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWA, RR_LUTWA_M1, a_wa[i]); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK, B_IQK_RFC_ON, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP, B_KIP_IQP_IQSW, a_itqt[i]); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x021); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, -+ 0x00000109 | (1 << (4 + path))); -+ fail |= _iqk_check_cal(rtwdev, path); -+ -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP, B_KIP_IQP_IQSW, a_itqt[i]); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_TXT, 0x021); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, -+ 0x00000309 | (1 << (4 + path))); -+ fail |= _iqk_check_cal(rtwdev, path); -+ -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK, B_IQK_RFC_ON, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S0, i = %x, 0x8[19:15] = 0x%x,0x8[09:05] = 0x%x\n", i, -+ rtw89_read_rf(rtwdev, RF_PATH_A, RR_DTXLOK, 0xf8000), -+ rtw89_read_rf(rtwdev, RF_PATH_A, RR_DTXLOK, 0x003e0)); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S0, i = %x, 0x9[19:16] = 0x%x,0x9[09:06] = 0x%x\n", i, -+ rtw89_read_rf(rtwdev, RF_PATH_A, RR_RSV2, 0xf0000), -+ rtw89_read_rf(rtwdev, RF_PATH_A, RR_RSV2, 0x003c0)); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S0, i = %x, 0x58 = %x\n", i, -+ rtw89_read_rf(rtwdev, RF_PATH_A, RR_TXMO, RFREG_MASK)); -+ } -+ -+ return fail; -+} -+ -+static void _iqk_txk_setting(struct rtw89_dev *rtwdev, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ -+ switch (iqk_info->iqk_band[path]) { -+ case RTW89_BAND_2G: -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]RTW89_BAND_2G\n"); -+ rtw89_rfk_parser(rtwdev, &rtw8851b_iqk_txk_2ghz_defs_tbl); -+ break; -+ case RTW89_BAND_5G: -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]RTW89_BAND_5G\n"); -+ rtw89_rfk_parser(rtwdev, &rtw8851b_iqk_txk_5ghz_defs_tbl); -+ break; -+ default: -+ break; -+ } -+} -+ -+#define IQK_LOK_RETRY 1 -+ -+static void _iqk_by_path(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ bool lok_is_fail; -+ u8 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ -+ for (i = 0; i < IQK_LOK_RETRY; i++) { -+ _iqk_txk_setting(rtwdev, path); -+ if (iqk_info->iqk_band[path] == RTW89_BAND_2G) -+ lok_is_fail = _iqk_2g_lok(rtwdev, phy_idx, path); -+ else -+ lok_is_fail = _iqk_5g_lok(rtwdev, phy_idx, path); -+ -+ if (!lok_is_fail) -+ break; -+ } -+ -+ if (iqk_info->is_nbiqk) { -+ if (iqk_info->iqk_band[path] == RTW89_BAND_2G) -+ iqk_info->iqk_tx_fail[0][path] = -+ _iqk_2g_nbtxk(rtwdev, phy_idx, path); -+ else -+ iqk_info->iqk_tx_fail[0][path] = -+ _iqk_5g_nbtxk(rtwdev, phy_idx, path); -+ } else { -+ if (iqk_info->iqk_band[path] == RTW89_BAND_2G) -+ iqk_info->iqk_tx_fail[0][path] = -+ _txk_2g_group_sel(rtwdev, phy_idx, path); -+ else -+ iqk_info->iqk_tx_fail[0][path] = -+ _txk_5g_group_sel(rtwdev, phy_idx, path); -+ } -+ -+ _iqk_rxclk_setting(rtwdev, path); -+ _iqk_rxk_setting(rtwdev, path); -+ _adc_fifo_rst(rtwdev, phy_idx, path); -+ -+ if (iqk_info->is_nbiqk) { -+ if (iqk_info->iqk_band[path] == RTW89_BAND_2G) -+ iqk_info->iqk_rx_fail[0][path] = -+ _iqk_2g_nbrxk(rtwdev, phy_idx, path); -+ else -+ iqk_info->iqk_rx_fail[0][path] = -+ _iqk_5g_nbrxk(rtwdev, phy_idx, path); -+ } else { -+ if (iqk_info->iqk_band[path] == RTW89_BAND_2G) -+ iqk_info->iqk_rx_fail[0][path] = -+ _rxk_2g_group_sel(rtwdev, phy_idx, path); -+ else -+ iqk_info->iqk_rx_fail[0][path] = -+ _rxk_5g_group_sel(rtwdev, phy_idx, path); -+ } -+} -+ -+static void _rfk_backup_bb_reg(struct rtw89_dev *rtwdev, -+ u32 backup_bb_reg_val[]) -+{ -+ u32 i; -+ -+ for (i = 0; i < BACKUP_BB_REGS_NR; i++) { -+ backup_bb_reg_val[i] = -+ rtw89_phy_read32_mask(rtwdev, rtw8851b_backup_bb_regs[i], -+ MASKDWORD); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK]backup bb reg : %x, value =%x\n", -+ rtw8851b_backup_bb_regs[i], backup_bb_reg_val[i]); -+ } -+} -+ -+static void _rfk_backup_rf_reg(struct rtw89_dev *rtwdev, -+ u32 backup_rf_reg_val[], u8 rf_path) -+{ -+ u32 i; -+ -+ for (i = 0; i < BACKUP_RF_REGS_NR; i++) { -+ backup_rf_reg_val[i] = -+ rtw89_read_rf(rtwdev, rf_path, -+ rtw8851b_backup_rf_regs[i], RFREG_MASK); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK]backup rf S%d reg : %x, value =%x\n", rf_path, -+ rtw8851b_backup_rf_regs[i], backup_rf_reg_val[i]); -+ } -+} -+ -+static void _rfk_restore_bb_reg(struct rtw89_dev *rtwdev, -+ const u32 backup_bb_reg_val[]) -+{ -+ u32 i; -+ -+ for (i = 0; i < BACKUP_BB_REGS_NR; i++) { -+ rtw89_phy_write32_mask(rtwdev, rtw8851b_backup_bb_regs[i], -+ MASKDWORD, backup_bb_reg_val[i]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK]restore bb reg : %x, value =%x\n", -+ rtw8851b_backup_bb_regs[i], backup_bb_reg_val[i]); -+ } -+} -+ -+static void _rfk_restore_rf_reg(struct rtw89_dev *rtwdev, -+ const u32 backup_rf_reg_val[], u8 rf_path) -+{ -+ u32 i; -+ -+ for (i = 0; i < BACKUP_RF_REGS_NR; i++) { -+ rtw89_write_rf(rtwdev, rf_path, rtw8851b_backup_rf_regs[i], -+ RFREG_MASK, backup_rf_reg_val[i]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RFK]restore rf S%d reg: %x, value =%x\n", rf_path, -+ rtw8851b_backup_rf_regs[i], backup_rf_reg_val[i]); -+ } -+} -+ -+static void _iqk_get_ch_info(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ u8 path) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u8 idx = 0; -+ -+ iqk_info->iqk_band[path] = chan->band_type; -+ iqk_info->iqk_bw[path] = chan->band_width; -+ iqk_info->iqk_ch[path] = chan->channel; -+ iqk_info->iqk_table_idx[path] = idx; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d (PHY%d): / DBCC %s/ %s/ CH%d/ %s\n", -+ path, phy, rtwdev->dbcc_en ? "on" : "off", -+ iqk_info->iqk_band[path] == 0 ? "2G" : -+ iqk_info->iqk_band[path] == 1 ? "5G" : "6G", -+ iqk_info->iqk_ch[path], -+ iqk_info->iqk_bw[path] == 0 ? "20M" : -+ iqk_info->iqk_bw[path] == 1 ? "40M" : "80M"); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]times = 0x%x, ch =%x\n", -+ iqk_info->iqk_times, idx); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, iqk_info->syn1to2= 0x%x\n", -+ path, iqk_info->syn1to2); -+} -+ -+static void _iqk_start_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, -+ u8 path) -+{ -+ _iqk_by_path(rtwdev, phy_idx, path); -+} -+ -+static void _iqk_restore(struct rtw89_dev *rtwdev, u8 path) -+{ -+ bool fail; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, 0x00001219); -+ fsleep(10); -+ fail = _iqk_check_cal(rtwdev, path); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] restore fail=%d\n", fail); -+ -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000000); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x80000000); -+} -+ -+static void _iqk_afebb_restore(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ rtw89_rfk_parser(rtwdev, &rtw8851b_iqk_afebb_restore_defs_tbl); -+} -+ -+static void _iqk_preset(struct rtw89_dev *rtwdev, u8 path) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000080); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x81ff010a); -+} -+ -+static void _iqk_macbb_setting(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8851b_iqk_macbb_defs_tbl); -+} -+ -+static void _iqk_init(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u8 idx, path; -+ -+ rtw89_phy_write32_mask(rtwdev, R_IQKINF, MASKDWORD, 0x0); -+ -+ if (iqk_info->is_iqk_init) -+ return; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); -+ -+ iqk_info->is_iqk_init = true; -+ iqk_info->is_nbiqk = false; -+ iqk_info->iqk_fft_en = false; -+ iqk_info->iqk_sram_en = false; -+ iqk_info->iqk_cfir_en = false; -+ iqk_info->iqk_xym_en = false; -+ iqk_info->thermal_rek_en = false; -+ iqk_info->iqk_times = 0x0; -+ -+ for (idx = 0; idx < RTW89_IQK_CHS_NR; idx++) { -+ iqk_info->iqk_channel[idx] = 0x0; -+ for (path = 0; path < RF_PATH_NUM_8851B; path++) { -+ iqk_info->lok_cor_fail[idx][path] = false; -+ iqk_info->lok_fin_fail[idx][path] = false; -+ iqk_info->iqk_tx_fail[idx][path] = false; -+ iqk_info->iqk_rx_fail[idx][path] = false; -+ iqk_info->iqk_table_idx[path] = 0x0; -+ } -+ } -+} -+ -+static void _doiqk(struct rtw89_dev *rtwdev, bool force, -+ enum rtw89_phy_idx phy_idx, u8 path) -+{ -+ struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; -+ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, RF_AB); -+ u32 backup_rf_val[RTW8851B_IQK_SS][BACKUP_RF_REGS_NR]; -+ u32 backup_bb_val[BACKUP_BB_REGS_NR]; -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, -+ BTC_WRFK_ONESHOT_START); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]==========IQK strat!!!!!==========\n"); -+ iqk_info->iqk_times++; -+ iqk_info->kcount = 0; -+ iqk_info->version = RTW8851B_IQK_VER; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]Test Ver 0x%x\n", iqk_info->version); -+ _iqk_get_ch_info(rtwdev, phy_idx, path); -+ -+ _rfk_backup_bb_reg(rtwdev, &backup_bb_val[0]); -+ _rfk_backup_rf_reg(rtwdev, &backup_rf_val[path][0], path); -+ _iqk_macbb_setting(rtwdev, phy_idx, path); -+ _iqk_preset(rtwdev, path); -+ _iqk_start_iqk(rtwdev, phy_idx, path); -+ _iqk_restore(rtwdev, path); -+ _iqk_afebb_restore(rtwdev, phy_idx, path); -+ _rfk_restore_bb_reg(rtwdev, &backup_bb_val[0]); -+ _rfk_restore_rf_reg(rtwdev, &backup_rf_val[path][0], path); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, -+ BTC_WRFK_ONESHOT_STOP); -+} -+ -+static void _iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, bool force) -+{ -+ _doiqk(rtwdev, force, phy_idx, RF_PATH_A); -+} -+ - static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) - { - u32 rf_reg5; -@@ -442,6 +1537,22 @@ void rtw8851b_dack(struct rtw89_dev *rtw - _dac_cal(rtwdev, false); - } - -+void rtw8851b_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); -+ u32 tx_en; -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_START); -+ rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); -+ _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); -+ -+ _iqk_init(rtwdev); -+ _iqk(rtwdev, phy_idx, false); -+ -+ rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_STOP); -+} -+ - static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, - enum rtw89_bandwidth bw, bool dav) - { ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -@@ -10,6 +10,7 @@ - void rtw8851b_aack(struct rtw89_dev *rtwdev); - void rtw8851b_rck(struct rtw89_dev *rtwdev); - void rtw8851b_dack(struct rtw89_dev *rtwdev); -+void rtw8851b_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); - void rtw8851b_set_channel_rf(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-086-wifi-rtw89-fix-rtw89_read_chip_ver-for-RTL8852B-and-.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-086-wifi-rtw89-fix-rtw89_read_chip_ver-for-RTL8852B-and-.patch deleted file mode 100644 index 56b6bfcae..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-086-wifi-rtw89-fix-rtw89_read_chip_ver-for-RTL8852B-and-.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 9d4f491b860ea6d04471c3342093b86a46eee63e Mon Sep 17 00:00:00 2001 -From: Dan Carpenter -Date: Fri, 21 Apr 2023 13:44:04 +0300 -Subject: [PATCH 086/136] wifi: rtw89: fix rtw89_read_chip_ver() for RTL8852B - and RTL8851B - -The if statement is reversed so it will not record the chip version. -This was detected using Smatch: - - drivers/net/wireless/realtek/rtw89/core.c:3593 rtw89_read_chip_ver() - error: uninitialized symbol 'val'. - -Fixes: a6fb2bb84654 ("wifi: rtw89: read version of analog hardware") -Signed-off-by: Dan Carpenter -Acked-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/e4d912a2-37f8-4068-8861-7b9494ae731b@kili.mountain ---- - drivers/net/wireless/realtek/rtw89/core.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -3668,7 +3668,7 @@ static void rtw89_read_chip_ver(struct r - - if (chip->chip_id == RTL8852B || chip->chip_id == RTL8851B) { - ret = rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_CV, &val); -- if (!ret) -+ if (ret) - return; - - rtwdev->hal.acv = u8_get_bits(val, XTAL_SI_ACV_MASK); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-087-wifi-rtw89-introduce-realtek-ACPI-DSM-method.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-087-wifi-rtw89-introduce-realtek-ACPI-DSM-method.patch deleted file mode 100644 index 1ee48f49c..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-087-wifi-rtw89-introduce-realtek-ACPI-DSM-method.patch +++ /dev/null @@ -1,114 +0,0 @@ -From e897b0bef38a8b40101c0e6e009395506c256460 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Mon, 8 May 2023 16:12:09 +0800 -Subject: [PATCH 087/136] wifi: rtw89: introduce realtek ACPI DSM method - -Introduce realtek ACPI DSM method to get required BIOS -configurations. It will be used in the following commits. - -And, enum rtw89_acpi_dsm_func is added for listing the functions -which are currently recognized. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230508081211.38760-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/Makefile | 3 +- - drivers/net/wireless/realtek/rtw89/acpi.c | 52 +++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/acpi.h | 21 +++++++++ - 3 files changed, 75 insertions(+), 1 deletion(-) - create mode 100644 drivers/net/wireless/realtek/rtw89/acpi.c - create mode 100644 drivers/net/wireless/realtek/rtw89/acpi.h - ---- a/drivers/net/wireless/realtek/rtw89/Makefile -+++ b/drivers/net/wireless/realtek/rtw89/Makefile -@@ -13,7 +13,8 @@ rtw89_core-y += core.o \ - coex.o \ - ps.o \ - chan.o \ -- ser.o -+ ser.o \ -+ acpi.o - - rtw89_core-$(CPTCFG_PM) += wow.o - ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/acpi.c -@@ -0,0 +1,52 @@ -+// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause -+/* Copyright(c) 2021-2023 Realtek Corporation -+ */ -+ -+#include -+#include -+ -+#include "acpi.h" -+#include "debug.h" -+ -+static const guid_t rtw89_guid = GUID_INIT(0xD2A8C3E8, 0x4B69, 0x4F00, -+ 0x82, 0xBD, 0xFE, 0x86, -+ 0x07, 0x80, 0x3A, 0xA7); -+ -+static int rtw89_acpi_dsm_get(struct rtw89_dev *rtwdev, union acpi_object *obj, -+ u8 *value) -+{ -+ switch (obj->type) { -+ case ACPI_TYPE_INTEGER: -+ *value = (u8)obj->integer.value; -+ break; -+ case ACPI_TYPE_BUFFER: -+ *value = obj->buffer.pointer[0]; -+ break; -+ default: -+ rtw89_debug(rtwdev, RTW89_DBG_UNEXP, -+ "acpi dsm return unhandled type: %d\n", obj->type); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+int rtw89_acpi_evaluate_dsm(struct rtw89_dev *rtwdev, -+ enum rtw89_acpi_dsm_func func, u8 *value) -+{ -+ union acpi_object *obj; -+ int ret; -+ -+ obj = acpi_evaluate_dsm(ACPI_HANDLE(rtwdev->dev), &rtw89_guid, -+ 0, func, NULL); -+ if (!obj) { -+ rtw89_debug(rtwdev, RTW89_DBG_UNEXP, -+ "acpi dsm fail to evaluate func: %d\n", func); -+ return -ENOENT; -+ } -+ -+ ret = rtw89_acpi_dsm_get(rtwdev, obj, value); -+ -+ ACPI_FREE(obj); -+ return ret; -+} ---- /dev/null -+++ b/drivers/net/wireless/realtek/rtw89/acpi.h -@@ -0,0 +1,21 @@ -+/* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */ -+/* Copyright(c) 2021-2023 Realtek Corporation -+ */ -+ -+#ifndef __RTW89_ACPI_H__ -+#define __RTW89_ACPI_H__ -+ -+#include "core.h" -+ -+enum rtw89_acpi_dsm_func { -+ RTW89_ACPI_DSM_FUNC_IDN_BAND_SUP = 2, -+ RTW89_ACPI_DSM_FUNC_6G_DIS = 3, -+ RTW89_ACPI_DSM_FUNC_6G_BP = 4, -+ RTW89_ACPI_DSM_FUNC_TAS_EN = 5, -+ RTW89_ACPI_DSM_FUNC_59G_EN = 6, -+}; -+ -+int rtw89_acpi_evaluate_dsm(struct rtw89_dev *rtwdev, -+ enum rtw89_acpi_dsm_func func, u8 *value); -+ -+#endif diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-088-wifi-rtw89-regd-judge-UNII-4-according-to-BIOS-and-c.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-088-wifi-rtw89-regd-judge-UNII-4-according-to-BIOS-and-c.patch deleted file mode 100644 index 7861ba100..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-088-wifi-rtw89-regd-judge-UNII-4-according-to-BIOS-and-c.patch +++ /dev/null @@ -1,173 +0,0 @@ -From a002f98123dd5e6b6d66c1b42a37dfd6e25ade4c Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Mon, 8 May 2023 16:12:10 +0800 -Subject: [PATCH 088/136] wifi: rtw89: regd: judge UNII-4 according to BIOS and - chip - -For realtek regulatory, there are following two kinds of configurations -to determine whether to allow UNII-4 band, i.e. 5.9GHz channels. - -1. default setting according to whether chip support it or not -2. evaluate realtek ACPI DSM with RTW89_ACPI_DSM_FUNC_59G_EN (func. 6) - -If (1) is false, we won't try (2) and just disallow UNII-4. Otherwise, -if (2) is not supported or returns a non-specific value, we follow the -default setting either. Besides, this commit aims to add decision logic -in rtw89 regulatory. Actually, driver doesn't register UNII-4 yet. That -will be handled by another commit. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230508081211.38760-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 7 ++- - drivers/net/wireless/realtek/rtw89/core.h | 2 + - drivers/net/wireless/realtek/rtw89/regd.c | 51 +++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 1 + - 7 files changed, 63 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -3850,7 +3850,12 @@ static int rtw89_core_register_hw(struct - return ret; - } - -- hw->wiphy->reg_notifier = rtw89_regd_notifier; -+ ret = rtw89_regd_setup(rtwdev); -+ if (ret) { -+ rtw89_err(rtwdev, "failed to set up regd\n"); -+ goto err_free_supported_band; -+ } -+ - hw->wiphy->sar_capa = &rtw89_sar_capa; - - ret = ieee80211_register_hw(hw); ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3179,6 +3179,7 @@ struct rtw89_chip_info { - u8 support_chanctx_num; - u8 support_bands; - bool support_bw160; -+ bool support_unii4; - bool support_ul_tb_ctrl; - bool hw_sec_hdr; - u8 rf_path_num; -@@ -5044,6 +5045,7 @@ int rtw89_core_release_sta_ba_entry(stru - void rtw89_vif_type_mapping(struct ieee80211_vif *vif, bool assoc); - int rtw89_chip_info_setup(struct rtw89_dev *rtwdev); - bool rtw89_ra_report_to_bitrate(struct rtw89_dev *rtwdev, u8 rpt_rate, u16 *bitrate); -+int rtw89_regd_setup(struct rtw89_dev *rtwdev); - int rtw89_regd_init(struct rtw89_dev *rtwdev, - void (*reg_notifier)(struct wiphy *wiphy, struct regulatory_request *request)); - void rtw89_regd_notifier(struct wiphy *wiphy, struct regulatory_request *request); ---- a/drivers/net/wireless/realtek/rtw89/regd.c -+++ b/drivers/net/wireless/realtek/rtw89/regd.c -@@ -2,6 +2,7 @@ - /* Copyright(c) 2019-2020 Realtek Corporation - */ - -+#include "acpi.h" - #include "debug.h" - #include "ps.h" - -@@ -282,6 +283,56 @@ do { \ - __r->txpwr_regd[RTW89_BAND_6G]); \ - } while (0) - -+static void rtw89_regd_setup_unii4(struct rtw89_dev *rtwdev, -+ struct wiphy *wiphy) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ bool regd_allow_unii_4 = chip->support_unii4; -+ int ret; -+ u8 val; -+ -+ if (!chip->support_unii4) -+ goto bottom; -+ -+ ret = rtw89_acpi_evaluate_dsm(rtwdev, RTW89_ACPI_DSM_FUNC_59G_EN, &val); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_REGD, -+ "acpi: cannot eval unii 4: %d\n", ret); -+ goto bottom; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_REGD, -+ "acpi: eval if allow unii 4: %d\n", val); -+ -+ switch (val) { -+ case 0: -+ regd_allow_unii_4 = false; -+ break; -+ case 1: -+ regd_allow_unii_4 = true; -+ break; -+ default: -+ break; -+ } -+ -+bottom: -+ rtw89_debug(rtwdev, RTW89_DBG_REGD, "regd: allow unii 4: %d\n", -+ regd_allow_unii_4); -+} -+ -+int rtw89_regd_setup(struct rtw89_dev *rtwdev) -+{ -+ struct wiphy *wiphy = rtwdev->hw->wiphy; -+ -+ if (!wiphy) -+ return -EINVAL; -+ -+ rtw89_regd_setup_unii4(rtwdev, wiphy); -+ -+ wiphy->reg_notifier = rtw89_regd_notifier; -+ return 0; -+} -+ - int rtw89_regd_init(struct rtw89_dev *rtwdev, - void (*reg_notifier)(struct wiphy *wiphy, - struct regulatory_request *request)) ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -123,6 +123,7 @@ const struct rtw89_chip_info rtw8851b_ch - .support_bands = BIT(NL80211_BAND_2GHZ) | - BIT(NL80211_BAND_5GHZ), - .support_bw160 = false, -+ .support_unii4 = true, - .support_ul_tb_ctrl = true, - .hw_sec_hdr = false, - .rf_path_num = 1, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -2105,6 +2105,7 @@ const struct rtw89_chip_info rtw8852a_ch - .support_bands = BIT(NL80211_BAND_2GHZ) | - BIT(NL80211_BAND_5GHZ), - .support_bw160 = false, -+ .support_unii4 = false, - .support_ul_tb_ctrl = false, - .hw_sec_hdr = false, - .rf_path_num = 2, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2536,6 +2536,7 @@ const struct rtw89_chip_info rtw8852b_ch - .support_bands = BIT(NL80211_BAND_2GHZ) | - BIT(NL80211_BAND_5GHZ), - .support_bw160 = false, -+ .support_unii4 = true, - .support_ul_tb_ctrl = true, - .hw_sec_hdr = false, - .rf_path_num = 2, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2836,6 +2836,7 @@ const struct rtw89_chip_info rtw8852c_ch - BIT(NL80211_BAND_5GHZ) | - BIT(NL80211_BAND_6GHZ), - .support_bw160 = true, -+ .support_unii4 = true, - .support_ul_tb_ctrl = false, - .hw_sec_hdr = true, - .rf_path_num = 2, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-089-wifi-rtw89-support-U-NII-4-channels-on-5GHz-band.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-089-wifi-rtw89-support-U-NII-4-channels-on-5GHz-band.patch deleted file mode 100644 index 1bf08be75..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-089-wifi-rtw89-support-U-NII-4-channels-on-5GHz-band.patch +++ /dev/null @@ -1,62 +0,0 @@ -From e3b77c06c8863a53a0d80f7dcaff923c590e3edd Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Mon, 8 May 2023 16:12:11 +0800 -Subject: [PATCH 089/136] wifi: rtw89: support U-NII-4 channels on 5GHz band - -U-NII-4 band, i.e 5.9GHz channels, can be supported by chip 8852C, 8852B -and 8851B. But, it is not supported by chip 8852A. Flag support_unii4 is -added in chip info and defined by chip accordingly to indicate that. -We reference this flag of runtime chip to decide whether to register -5.9GHz channels. - -After that, we consider if U-NII-4 band is allowed by our regulatory -rule of U-NII-4. If chip::support_unii4 but not regd::allow_unii4, -we stll do not register 5.9GHz channels. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230508081211.38760-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 3 +++ - drivers/net/wireless/realtek/rtw89/regd.c | 10 ++++++++++ - 2 files changed, 13 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -77,6 +77,9 @@ static struct ieee80211_channel rtw89_ch - RTW89_DEF_CHAN_5G(5785, 157), - RTW89_DEF_CHAN_5G(5805, 161), - RTW89_DEF_CHAN_5G_NO_HT40MINUS(5825, 165), -+ RTW89_DEF_CHAN_5G(5845, 169), -+ RTW89_DEF_CHAN_5G(5865, 173), -+ RTW89_DEF_CHAN_5G(5885, 177), - }; - - static struct ieee80211_channel rtw89_channels_6ghz[] = { ---- a/drivers/net/wireless/realtek/rtw89/regd.c -+++ b/drivers/net/wireless/realtek/rtw89/regd.c -@@ -288,6 +288,7 @@ static void rtw89_regd_setup_unii4(struc - { - const struct rtw89_chip_info *chip = rtwdev->chip; - bool regd_allow_unii_4 = chip->support_unii4; -+ struct ieee80211_supported_band *sband; - int ret; - u8 val; - -@@ -318,6 +319,15 @@ static void rtw89_regd_setup_unii4(struc - bottom: - rtw89_debug(rtwdev, RTW89_DBG_REGD, "regd: allow unii 4: %d\n", - regd_allow_unii_4); -+ -+ if (regd_allow_unii_4) -+ return; -+ -+ sband = wiphy->bands[NL80211_BAND_5GHZ]; -+ if (!sband) -+ return; -+ -+ sband->n_channels -= 3; - } - - int rtw89_regd_setup(struct rtw89_dev *rtwdev) diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-090-wifi-rtw89-pci-fix-interrupt-enable-mask-for-HALT-C2.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-090-wifi-rtw89-pci-fix-interrupt-enable-mask-for-HALT-C2.patch deleted file mode 100644 index eaae86cc7..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-090-wifi-rtw89-pci-fix-interrupt-enable-mask-for-HALT-C2.patch +++ /dev/null @@ -1,58 +0,0 @@ -From aa70fa4f7dd80e4e495c30ff10a6c373c26902e0 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Mon, 8 May 2023 16:43:33 +0800 -Subject: [PATCH 090/136] wifi: rtw89: pci: fix interrupt enable mask for HALT - C2H of RTL8851B - -RTL8851B keeps almost the same interrupt flow as RTL8852A and RTL8852B. -But, it uses a different bitmask for interrupt indicator of FW HALT C2H. -So, we make a chip judgement in pci when configuring interrupt mask. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230508084335.42953-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/pci.c | 9 +++++++-- - drivers/net/wireless/realtek/rtw89/pci.h | 1 + - 2 files changed, 8 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/pci.c -+++ b/drivers/net/wireless/realtek/rtw89/pci.c -@@ -3216,11 +3216,16 @@ static void rtw89_pci_clear_resource(str - void rtw89_pci_config_intr_mask(struct rtw89_dev *rtwdev) - { - struct rtw89_pci *rtwpci = (struct rtw89_pci *)rtwdev->priv; -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ u32 hs0isr_ind_int_en = B_AX_HS0ISR_IND_INT_EN; -+ -+ if (chip->chip_id == RTL8851B) -+ hs0isr_ind_int_en = B_AX_HS0ISR_IND_INT_EN_WKARND; - - rtwpci->halt_c2h_intrs = B_AX_HALT_C2H_INT_EN | 0; - - if (rtwpci->under_recovery) { -- rtwpci->intrs[0] = B_AX_HS0ISR_IND_INT_EN; -+ rtwpci->intrs[0] = hs0isr_ind_int_en; - rtwpci->intrs[1] = 0; - } else { - rtwpci->intrs[0] = B_AX_TXDMA_STUCK_INT_EN | -@@ -3230,7 +3235,7 @@ void rtw89_pci_config_intr_mask(struct r - B_AX_RXDMA_STUCK_INT_EN | - B_AX_RDU_INT_EN | - B_AX_RPQBD_FULL_INT_EN | -- B_AX_HS0ISR_IND_INT_EN; -+ hs0isr_ind_int_en; - - rtwpci->intrs[1] = B_AX_HC10ISR_IND_INT_EN; - } ---- a/drivers/net/wireless/realtek/rtw89/pci.h -+++ b/drivers/net/wireless/realtek/rtw89/pci.h -@@ -150,6 +150,7 @@ - #define B_AX_HD1ISR_IND_INT_EN BIT(26) - #define B_AX_HD0ISR_IND_INT_EN BIT(25) - #define B_AX_HS0ISR_IND_INT_EN BIT(24) -+#define B_AX_HS0ISR_IND_INT_EN_WKARND BIT(23) - #define B_AX_RETRAIN_INT_EN BIT(21) - #define B_AX_RPQBD_FULL_INT_EN BIT(20) - #define B_AX_RDU_INT_EN BIT(19) diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-091-wifi-rtw89-ser-L1-add-pre-M0-and-post-M0-states.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-091-wifi-rtw89-ser-L1-add-pre-M0-and-post-M0-states.patch deleted file mode 100644 index 16ee3c61c..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-091-wifi-rtw89-ser-L1-add-pre-M0-and-post-M0-states.patch +++ /dev/null @@ -1,207 +0,0 @@ -From 56617fd02adbf2ce7e18469895846ba82150cb1f Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Mon, 8 May 2023 16:43:34 +0800 -Subject: [PATCH 091/136] wifi: rtw89: ser: L1 add pre-M0 and post-M0 states - -Newer FW re-design SER (syetem error recovery) L1 (level 1) flow. -New L1 flow will expect two extra states before original L1 flow. - -* Before: -fw --- M1 --> driver -fw <-- M2 --- driver -fw --- M3 --> driver -fw <-- M4 --- driver -fw --- M5 --> driver - -* After: -fw --- pre-M0 --> driver -fw <-- post-M0 --- driver -fw --- M1 --> driver -fw <-- M2 --- driver -fw --- M3 --> driver -fw <-- M4 --- driver -fw --- M5 --> driver - -Then before M1, FW gets one more interval to deal with things that FW -should have handled well. To consider backward/forward compatibility, -FW and driver won't change flow from M1 to M5. (only except that halt -trigger control will change a little bit.) So, there will be two differnt -starting points of SER L1. -* old FW: SER L1 starts from M1 -* new FW: SER L1 starts from pre-M0 -Then, driver adds the new SER L1 entry and also keep the original one -instead of changing it. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230508084335.42953-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - drivers/net/wireless/realtek/rtw89/mac.c | 6 ++++ - drivers/net/wireless/realtek/rtw89/mac.h | 2 ++ - drivers/net/wireless/realtek/rtw89/ser.c | 43 ++++++++++++++++++++++- - 4 files changed, 51 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3946,6 +3946,7 @@ enum rtw89_ser_rcvy_step { - struct rtw89_ser { - u8 state; - u8 alarm_event; -+ bool prehandle_l1; - - struct work_struct ser_hdl_work; - struct delayed_work ser_alarm_work; ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -676,6 +676,7 @@ EXPORT_SYMBOL(rtw89_mac_get_err_status); - - int rtw89_mac_set_err_status(struct rtw89_dev *rtwdev, u32 err) - { -+ struct rtw89_ser *ser = &rtwdev->ser; - u32 halt; - int ret = 0; - -@@ -692,6 +693,11 @@ int rtw89_mac_set_err_status(struct rtw8 - } - - rtw89_write32(rtwdev, R_AX_HALT_H2C, err); -+ -+ if (ser->prehandle_l1 && -+ (err == MAC_AX_ERR_L1_DISABLE_EN || err == MAC_AX_ERR_L1_RCVY_EN)) -+ return 0; -+ - rtw89_write32(rtwdev, R_AX_HALT_H2C_CTRL, B_AX_HALT_H2C_TRIGGER); - - return 0; ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -642,6 +642,7 @@ enum mac_ax_err_info { - MAC_AX_ERR_L0_PROMOTE_TO_L1 = 0x0010, - - /* L1 */ -+ MAC_AX_ERR_L1_PREERR_DMAC = 0x999, - MAC_AX_ERR_L1_ERR_DMAC = 0x1000, - MAC_AX_ERR_L1_RESET_DISABLE_DMAC_DONE = 0x1001, - MAC_AX_ERR_L1_RESET_RECOVERY_DONE = 0x1002, -@@ -780,6 +781,7 @@ enum mac_ax_err_info { - MAC_AX_ERR_L1_RCVY_EN = 0x0002, - MAC_AX_ERR_L1_RCVY_STOP_REQ = 0x0003, - MAC_AX_ERR_L1_RCVY_START_REQ = 0x0004, -+ MAC_AX_ERR_L1_RESET_START_DMAC = 0x000A, - MAC_AX_ERR_L0_CFG_NOTIFY = 0x0010, - MAC_AX_ERR_L0_CFG_DIS_NOTIFY = 0x0011, - MAC_AX_ERR_L0_CFG_HANDSHAKE = 0x0012, ---- a/drivers/net/wireless/realtek/rtw89/ser.c -+++ b/drivers/net/wireless/realtek/rtw89/ser.c -@@ -20,12 +20,14 @@ enum ser_evt { - SER_EV_NONE, - SER_EV_STATE_IN, - SER_EV_STATE_OUT, -+ SER_EV_L1_RESET_PREPARE, /* pre-M0 */ - SER_EV_L1_RESET, /* M1 */ - SER_EV_DO_RECOVERY, /* M3 */ - SER_EV_MAC_RESET_DONE, /* M5 */ - SER_EV_L2_RESET, - SER_EV_L2_RECFG_DONE, - SER_EV_L2_RECFG_TIMEOUT, -+ SER_EV_M1_TIMEOUT, - SER_EV_M3_TIMEOUT, - SER_EV_FW_M5_TIMEOUT, - SER_EV_L0_RESET, -@@ -34,6 +36,7 @@ enum ser_evt { - - enum ser_state { - SER_IDLE_ST, -+ SER_L1_RESET_PRE_ST, - SER_RESET_TRX_ST, - SER_DO_HCI_ST, - SER_L2_RESET_ST, -@@ -374,6 +377,13 @@ static int hal_stop_dma(struct rtw89_ser - return ret; - } - -+static void hal_send_post_m0_event(struct rtw89_ser *ser) -+{ -+ struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -+ -+ rtw89_mac_set_err_status(rtwdev, MAC_AX_ERR_L1_RESET_START_DMAC); -+} -+ - static void hal_send_m2_event(struct rtw89_ser *ser) - { - struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -@@ -398,6 +408,9 @@ static void ser_idle_st_hdl(struct rtw89 - rtw89_hci_recovery_complete(rtwdev); - clear_bit(RTW89_FLAG_CRASH_SIMULATING, rtwdev->flags); - break; -+ case SER_EV_L1_RESET_PREPARE: -+ ser_state_goto(ser, SER_L1_RESET_PRE_ST); -+ break; - case SER_EV_L1_RESET: - ser_state_goto(ser, SER_RESET_TRX_ST); - break; -@@ -412,6 +425,28 @@ static void ser_idle_st_hdl(struct rtw89 - } - } - -+static void ser_l1_reset_pre_st_hdl(struct rtw89_ser *ser, u8 evt) -+{ -+ switch (evt) { -+ case SER_EV_STATE_IN: -+ ser->prehandle_l1 = true; -+ hal_send_post_m0_event(ser); -+ ser_set_alarm(ser, 1000, SER_EV_M1_TIMEOUT); -+ break; -+ case SER_EV_L1_RESET: -+ ser_state_goto(ser, SER_RESET_TRX_ST); -+ break; -+ case SER_EV_M1_TIMEOUT: -+ ser_state_goto(ser, SER_L2_RESET_ST); -+ break; -+ case SER_EV_STATE_OUT: -+ ser_del_alarm(ser); -+ break; -+ default: -+ break; -+ } -+} -+ - static void ser_reset_trx_st_hdl(struct rtw89_ser *ser, u8 evt) - { - struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser); -@@ -654,12 +689,14 @@ static const struct event_ent ser_ev_tbl - {SER_EV_NONE, "SER_EV_NONE"}, - {SER_EV_STATE_IN, "SER_EV_STATE_IN"}, - {SER_EV_STATE_OUT, "SER_EV_STATE_OUT"}, -- {SER_EV_L1_RESET, "SER_EV_L1_RESET"}, -+ {SER_EV_L1_RESET_PREPARE, "SER_EV_L1_RESET_PREPARE pre-m0"}, -+ {SER_EV_L1_RESET, "SER_EV_L1_RESET m1"}, - {SER_EV_DO_RECOVERY, "SER_EV_DO_RECOVERY m3"}, - {SER_EV_MAC_RESET_DONE, "SER_EV_MAC_RESET_DONE m5"}, - {SER_EV_L2_RESET, "SER_EV_L2_RESET"}, - {SER_EV_L2_RECFG_DONE, "SER_EV_L2_RECFG_DONE"}, - {SER_EV_L2_RECFG_TIMEOUT, "SER_EV_L2_RECFG_TIMEOUT"}, -+ {SER_EV_M1_TIMEOUT, "SER_EV_M1_TIMEOUT"}, - {SER_EV_M3_TIMEOUT, "SER_EV_M3_TIMEOUT"}, - {SER_EV_FW_M5_TIMEOUT, "SER_EV_FW_M5_TIMEOUT"}, - {SER_EV_L0_RESET, "SER_EV_L0_RESET"}, -@@ -668,6 +705,7 @@ static const struct event_ent ser_ev_tbl - - static const struct state_ent ser_st_tbl[] = { - {SER_IDLE_ST, "SER_IDLE_ST", ser_idle_st_hdl}, -+ {SER_L1_RESET_PRE_ST, "SER_L1_RESET_PRE_ST", ser_l1_reset_pre_st_hdl}, - {SER_RESET_TRX_ST, "SER_RESET_TRX_ST", ser_reset_trx_st_hdl}, - {SER_DO_HCI_ST, "SER_DO_HCI_ST", ser_do_hci_st_hdl}, - {SER_L2_RESET_ST, "SER_L2_RESET_ST", ser_l2_reset_st_hdl} -@@ -713,6 +751,9 @@ int rtw89_ser_notify(struct rtw89_dev *r - rtw89_info(rtwdev, "SER catches error: 0x%x\n", err); - - switch (err) { -+ case MAC_AX_ERR_L1_PREERR_DMAC: /* pre-M0 */ -+ event = SER_EV_L1_RESET_PREPARE; -+ break; - case MAC_AX_ERR_L1_ERR_DMAC: - case MAC_AX_ERR_L0_PROMOTE_TO_L1: - event = SER_EV_L1_RESET; /* M1 */ diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-092-wifi-rtw89-suppress-the-log-for-specific-SER-called-.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-092-wifi-rtw89-suppress-the-log-for-specific-SER-called-.patch deleted file mode 100644 index 1eb6eae75..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-092-wifi-rtw89-suppress-the-log-for-specific-SER-called-.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 8130e94e888bf90e495f88d1a1e63c43e1cfbc18 Mon Sep 17 00:00:00 2001 -From: Chin-Yen Lee -Date: Mon, 8 May 2023 16:43:35 +0800 -Subject: [PATCH 092/136] wifi: rtw89: suppress the log for specific SER called - CMDPSR_FRZTO - -For 8852CE, there is abnormal state called CMDPSR_FRZTO, -which occasionally happens in some platforms, and could be -found by firmware and fixed in current SER flow, so we add -suppress function to avoid verbose message for this resolved case. - -Signed-off-by: Chin-Yen Lee -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230508084335.42953-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - drivers/net/wireless/realtek/rtw89/mac.c | 36 +++++++++++++++++++++++ - 2 files changed, 37 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3940,6 +3940,7 @@ enum rtw89_ser_rcvy_step { - RTW89_SER_DRV_STOP_RX, - RTW89_SER_DRV_STOP_RUN, - RTW89_SER_HAL_STOP_DMA, -+ RTW89_SER_SUPPRESS_LOG, - RTW89_NUM_OF_SER_FLAGS - }; - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -644,6 +644,39 @@ static void rtw89_mac_dump_err_status(st - rtw89_info(rtwdev, "<---\n"); - } - -+static bool rtw89_mac_suppress_log(struct rtw89_dev *rtwdev, u32 err) -+{ -+ struct rtw89_ser *ser = &rtwdev->ser; -+ u32 dmac_err, imr, isr; -+ int ret; -+ -+ if (rtwdev->chip->chip_id == RTL8852C) { -+ ret = rtw89_mac_check_mac_en(rtwdev, 0, RTW89_DMAC_SEL); -+ if (ret) -+ return true; -+ -+ if (err == MAC_AX_ERR_L1_ERR_DMAC) { -+ dmac_err = rtw89_read32(rtwdev, R_AX_DMAC_ERR_ISR); -+ imr = rtw89_read32(rtwdev, R_AX_TXPKTCTL_B0_ERRFLAG_IMR); -+ isr = rtw89_read32(rtwdev, R_AX_TXPKTCTL_B0_ERRFLAG_ISR); -+ -+ if ((dmac_err & B_AX_TXPKTCTRL_ERR_FLAG) && -+ ((isr & imr) & B_AX_B0_ISR_ERR_CMDPSR_FRZTO)) { -+ set_bit(RTW89_SER_SUPPRESS_LOG, ser->flags); -+ return true; -+ } -+ } else if (err == MAC_AX_ERR_L1_RESET_DISABLE_DMAC_DONE) { -+ if (test_bit(RTW89_SER_SUPPRESS_LOG, ser->flags)) -+ return true; -+ } else if (err == MAC_AX_ERR_L1_RESET_RECOVERY_DONE) { -+ if (test_and_clear_bit(RTW89_SER_SUPPRESS_LOG, ser->flags)) -+ return true; -+ } -+ } -+ -+ return false; -+} -+ - u32 rtw89_mac_get_err_status(struct rtw89_dev *rtwdev) - { - u32 err, err_scnr; -@@ -667,6 +700,9 @@ u32 rtw89_mac_get_err_status(struct rtw8 - else if (err_scnr == RTW89_RXI300_ERROR) - err = MAC_AX_ERR_RXI300; - -+ if (rtw89_mac_suppress_log(rtwdev, err)) -+ return err; -+ - rtw89_fw_st_dbg_dump(rtwdev); - rtw89_mac_dump_err_status(rtwdev, err); - diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-093-wifi-rtw89-8852b-adjust-quota-to-avoid-SER-L1-caused.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-093-wifi-rtw89-8852b-adjust-quota-to-avoid-SER-L1-caused.patch deleted file mode 100644 index 96975d07b..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-093-wifi-rtw89-8852b-adjust-quota-to-avoid-SER-L1-caused.patch +++ /dev/null @@ -1,118 +0,0 @@ -From c0426c446d92023d344131d01d929bc25db7a24e Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Wed, 26 Apr 2023 11:47:37 +0800 -Subject: [PATCH 093/136] wifi: rtw89: 8852b: adjust quota to avoid SER L1 - caused by access null page - -Though SER can recover this case, traffic can get stuck for a while. Fix it -by adjusting page quota to avoid hardware access null page of CMAC/DMAC. - -Fixes: a1cb097168fa ("wifi: rtw89: 8852b: configure DLE mem") -Fixes: 3e870b481733 ("wifi: rtw89: 8852b: add HFC quota arrays") -Cc: stable@vger.kernel.org -Tested-by: Larry Finger -Link: https://github.com/lwfinger/rtw89/issues/226#issuecomment-1520776761 -Link: https://github.com/lwfinger/rtw89/issues/240 -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230426034737.24870-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.c | 4 +++ - drivers/net/wireless/realtek/rtw89/mac.h | 2 ++ - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 28 +++++++++---------- - 3 files changed, 20 insertions(+), 14 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -1467,6 +1467,8 @@ const struct rtw89_mac_size_set rtw89_ma - .wde_size4 = {RTW89_WDE_PG_64, 0, 4096,}, - /* PCIE 64 */ - .wde_size6 = {RTW89_WDE_PG_64, 512, 0,}, -+ /* 8852B PCIE SCC */ -+ .wde_size7 = {RTW89_WDE_PG_64, 510, 2,}, - /* DLFW */ - .wde_size9 = {RTW89_WDE_PG_64, 0, 1024,}, - /* 8852C DLFW */ -@@ -1491,6 +1493,8 @@ const struct rtw89_mac_size_set rtw89_ma - .wde_qt4 = {0, 0, 0, 0,}, - /* PCIE 64 */ - .wde_qt6 = {448, 48, 0, 16,}, -+ /* 8852B PCIE SCC */ -+ .wde_qt7 = {446, 48, 0, 16,}, - /* 8852C DLFW */ - .wde_qt17 = {0, 0, 0, 0,}, - /* 8852C PCIE SCC */ ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -794,6 +794,7 @@ struct rtw89_mac_size_set { - const struct rtw89_dle_size wde_size0; - const struct rtw89_dle_size wde_size4; - const struct rtw89_dle_size wde_size6; -+ const struct rtw89_dle_size wde_size7; - const struct rtw89_dle_size wde_size9; - const struct rtw89_dle_size wde_size18; - const struct rtw89_dle_size wde_size19; -@@ -806,6 +807,7 @@ struct rtw89_mac_size_set { - const struct rtw89_wde_quota wde_qt0; - const struct rtw89_wde_quota wde_qt4; - const struct rtw89_wde_quota wde_qt6; -+ const struct rtw89_wde_quota wde_qt7; - const struct rtw89_wde_quota wde_qt17; - const struct rtw89_wde_quota wde_qt18; - const struct rtw89_ple_quota ple_qt4; ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -18,25 +18,25 @@ - RTW8852B_FW_BASENAME "-" __stringify(RTW8852B_FW_FORMAT_MAX) ".bin" - - static const struct rtw89_hfc_ch_cfg rtw8852b_hfc_chcfg_pcie[] = { -- {5, 343, grp_0}, /* ACH 0 */ -- {5, 343, grp_0}, /* ACH 1 */ -- {5, 343, grp_0}, /* ACH 2 */ -- {5, 343, grp_0}, /* ACH 3 */ -+ {5, 341, grp_0}, /* ACH 0 */ -+ {5, 341, grp_0}, /* ACH 1 */ -+ {4, 342, grp_0}, /* ACH 2 */ -+ {4, 342, grp_0}, /* ACH 3 */ - {0, 0, grp_0}, /* ACH 4 */ - {0, 0, grp_0}, /* ACH 5 */ - {0, 0, grp_0}, /* ACH 6 */ - {0, 0, grp_0}, /* ACH 7 */ -- {4, 344, grp_0}, /* B0MGQ */ -- {4, 344, grp_0}, /* B0HIQ */ -+ {4, 342, grp_0}, /* B0MGQ */ -+ {4, 342, grp_0}, /* B0HIQ */ - {0, 0, grp_0}, /* B1MGQ */ - {0, 0, grp_0}, /* B1HIQ */ - {40, 0, 0} /* FWCMDQ */ - }; - - static const struct rtw89_hfc_pub_cfg rtw8852b_hfc_pubcfg_pcie = { -- 448, /* Group 0 */ -+ 446, /* Group 0 */ - 0, /* Group 1 */ -- 448, /* Public Max */ -+ 446, /* Public Max */ - 0 /* WP threshold */ - }; - -@@ -49,13 +49,13 @@ static const struct rtw89_hfc_param_ini - }; - - static const struct rtw89_dle_mem rtw8852b_dle_mem_pcie[] = { -- [RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size6, -- &rtw89_mac_size.ple_size6, &rtw89_mac_size.wde_qt6, -- &rtw89_mac_size.wde_qt6, &rtw89_mac_size.ple_qt18, -+ [RTW89_QTA_SCC] = {RTW89_QTA_SCC, &rtw89_mac_size.wde_size7, -+ &rtw89_mac_size.ple_size6, &rtw89_mac_size.wde_qt7, -+ &rtw89_mac_size.wde_qt7, &rtw89_mac_size.ple_qt18, - &rtw89_mac_size.ple_qt58}, -- [RTW89_QTA_WOW] = {RTW89_QTA_WOW, &rtw89_mac_size.wde_size6, -- &rtw89_mac_size.ple_size6, &rtw89_mac_size.wde_qt6, -- &rtw89_mac_size.wde_qt6, &rtw89_mac_size.ple_qt18, -+ [RTW89_QTA_WOW] = {RTW89_QTA_WOW, &rtw89_mac_size.wde_size7, -+ &rtw89_mac_size.ple_size6, &rtw89_mac_size.wde_qt7, -+ &rtw89_mac_size.wde_qt7, &rtw89_mac_size.ple_qt18, - &rtw89_mac_size.ple_qt_52b_wow}, - [RTW89_QTA_DLFW] = {RTW89_QTA_DLFW, &rtw89_mac_size.wde_size9, - &rtw89_mac_size.ple_size8, &rtw89_mac_size.wde_qt4, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-094-wifi-rtw89-8851b-add-to-read-efuse-version-to-recogn.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-094-wifi-rtw89-8851b-add-to-read-efuse-version-to-recogn.patch deleted file mode 100644 index 8d5cee33f..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-094-wifi-rtw89-8851b-add-to-read-efuse-version-to-recogn.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 40bb2ab49c369b78d1cb37ed63b8a85f3102b239 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 12 May 2023 14:12:15 +0800 -Subject: [PATCH 094/136] wifi: rtw89: 8851b: add to read efuse version to - recognize hardware version B - -8851B hardware version A and B use different firmware, but register version -code of these two are the same, so add this helper to read efuse version to -determine which version is installed. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230512061220.16544-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/efuse.c | 21 +++++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/efuse.h | 1 + - 2 files changed, 22 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/efuse.c -+++ b/drivers/net/wireless/realtek/rtw89/efuse.c -@@ -7,6 +7,10 @@ - #include "mac.h" - #include "reg.h" - -+#define EF_FV_OFSET 0x5ea -+#define EF_CV_MASK GENMASK(7, 4) -+#define EF_CV_INV 15 -+ - enum rtw89_efuse_bank { - RTW89_EFUSE_BANK_WIFI, - RTW89_EFUSE_BANK_BT, -@@ -328,3 +332,20 @@ out_free: - - return ret; - } -+ -+int rtw89_read_efuse_ver(struct rtw89_dev *rtwdev, u8 *ecv) -+{ -+ int ret; -+ u8 val; -+ -+ ret = rtw89_dump_physical_efuse_map(rtwdev, &val, EF_FV_OFSET, 1, false); -+ if (ret) -+ return ret; -+ -+ *ecv = u8_get_bits(val, EF_CV_MASK); -+ if (*ecv == EF_CV_INV) -+ return -ENOENT; -+ -+ return 0; -+} -+EXPORT_SYMBOL(rtw89_read_efuse_ver); ---- a/drivers/net/wireless/realtek/rtw89/efuse.h -+++ b/drivers/net/wireless/realtek/rtw89/efuse.h -@@ -9,5 +9,6 @@ - - int rtw89_parse_efuse_map(struct rtw89_dev *rtwdev); - int rtw89_parse_phycap_map(struct rtw89_dev *rtwdev); -+int rtw89_read_efuse_ver(struct rtw89_dev *rtwdev, u8 *efv); - - #endif diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-095-wifi-rtw89-8851b-configure-GPIO-according-to-RFE-typ.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-095-wifi-rtw89-8851b-configure-GPIO-according-to-RFE-typ.patch deleted file mode 100644 index cee970fae..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-095-wifi-rtw89-8851b-configure-GPIO-according-to-RFE-typ.patch +++ /dev/null @@ -1,194 +0,0 @@ -From f03bd0429f9bc2718ee250b05eb48dc081d4f6b7 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 12 May 2023 14:12:16 +0800 -Subject: [PATCH 095/136] wifi: rtw89: 8851b: configure GPIO according to RFE - type - -Though 8851BE is a 1x1 chip, but it has two antenna hardware module that -needs additional configuration to help choose antenna we are going to use. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230512061220.16544-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 9 +++ - drivers/net/wireless/realtek/rtw89/phy.c | 1 + - drivers/net/wireless/realtek/rtw89/reg.h | 9 +++ - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 64 +++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 1 + - 7 files changed, 86 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -2799,6 +2799,7 @@ struct rtw89_chip_ops { - int (*read_efuse)(struct rtw89_dev *rtwdev, u8 *log_map); - int (*read_phycap)(struct rtw89_dev *rtwdev, u8 *phycap_map); - void (*fem_setup)(struct rtw89_dev *rtwdev); -+ void (*rfe_gpio)(struct rtw89_dev *rtwdev); - void (*rfk_init)(struct rtw89_dev *rtwdev); - void (*rfk_channel)(struct rtw89_dev *rtwdev); - void (*rfk_band_changed)(struct rtw89_dev *rtwdev, -@@ -4700,6 +4701,14 @@ static inline void rtw89_chip_fem_setup( - chip->ops->fem_setup(rtwdev); - } - -+static inline void rtw89_chip_rfe_gpio(struct rtw89_dev *rtwdev) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ if (chip->ops->rfe_gpio) -+ chip->ops->rfe_gpio(rtwdev); -+} -+ - static inline void rtw89_chip_bb_sethw(struct rtw89_dev *rtwdev) - { - const struct rtw89_chip_info *chip = rtwdev->chip; ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -4399,6 +4399,7 @@ void rtw89_phy_dm_init(struct rtw89_dev - rtw89_phy_cfo_init(rtwdev); - rtw89_phy_ul_tb_info_init(rtwdev); - rtw89_phy_antdiv_init(rtwdev); -+ rtw89_chip_rfe_gpio(rtwdev); - rtw89_phy_antdiv_set_ant(rtwdev); - - rtw89_phy_init_rf_nctl(rtwdev); ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -254,6 +254,10 @@ - #define R_AX_EECS_EESK_FUNC_SEL 0x02D8 - #define B_AX_PINMUX_EESK_FUNC_SEL_MASK GENMASK(7, 4) - -+#define R_AX_GPIO16_23_FUNC_SEL 0x02D8 -+#define B_AX_PINMUX_GPIO17_FUNC_SEL_MASK GENMASK(7, 4) -+#define B_AX_PINMUX_GPIO16_FUNC_SEL_MASK GENMASK(3, 0) -+ - #define R_AX_LED1_FUNC_SEL 0x02DC - #define B_AX_PINMUX_EESK_FUNC_SEL_V1_MASK GENMASK(27, 24) - #define PINMUX_EESK_FUNC_SEL_BT_LOG 0x1 -@@ -3846,6 +3850,7 @@ - #define R_RFE_E_A2 0x0334 - #define R_RFE_O_SEL_A2 0x0338 - #define R_RFE_SEL0_A2 0x033C -+#define B_RFE_SEL0_MASK GENMASK(1, 0) - #define R_RFE_SEL32_A2 0x0340 - #define R_CIRST 0x035c - #define B_CIRST_SYN GENMASK(11, 10) -@@ -4490,6 +4495,10 @@ - #define B_P0_ANTSEL_RX_ORI GENMASK(7, 4) - #define R_RFSW_CTRL_ANT0_BASE 0x5870 - #define B_RFSW_CTRL_ANT_MAPPING GENMASK(15, 0) -+#define R_RFE_SEL0_BASE 0x5880 -+#define B_RFE_SEL0_SRC_MASK GENMASK(3, 0) -+#define RFE_SEL0_SRC_ANTSEL_0 8 -+#define R_RFE_INV0 0x5890 - #define R_P0_RFM 0x5894 - #define B_P0_RFM_DIS_WL BIT(7) - #define B_P0_RFM_TX_OPT BIT(6) ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -72,8 +72,72 @@ static const struct rtw89_xtal_info rtw8 - .sc_xi_mask = B_AX_XTAL_SC_XI_A_BLOCK_MASK, - }; - -+static void rtw8851b_set_bb_gpio(struct rtw89_dev *rtwdev, u8 gpio_idx, bool inv, -+ u8 src_sel) -+{ -+ u32 addr, mask; -+ -+ if (gpio_idx >= 32) -+ return; -+ -+ /* 2 continual 32-bit registers for 32 GPIOs, and each GPIO occupies 2 bits */ -+ addr = R_RFE_SEL0_A2 + (gpio_idx / 16) * sizeof(u32); -+ mask = B_RFE_SEL0_MASK << (gpio_idx % 16) * 2; -+ -+ rtw89_phy_write32_mask(rtwdev, addr, mask, RF_PATH_A); -+ rtw89_phy_write32_mask(rtwdev, R_RFE_INV0, BIT(gpio_idx), inv); -+ -+ /* 4 continual 32-bit registers for 32 GPIOs, and each GPIO occupies 4 bits */ -+ addr = R_RFE_SEL0_BASE + (gpio_idx / 8) * sizeof(u32); -+ mask = B_RFE_SEL0_SRC_MASK << (gpio_idx % 8) * 4; -+ -+ rtw89_phy_write32_mask(rtwdev, addr, mask, src_sel); -+} -+ -+static void rtw8851b_set_mac_gpio(struct rtw89_dev *rtwdev, u8 func) -+{ -+ static const struct rtw89_reg3_def func16 = { -+ R_AX_GPIO16_23_FUNC_SEL, B_AX_PINMUX_GPIO16_FUNC_SEL_MASK, BIT(3) -+ }; -+ static const struct rtw89_reg3_def func17 = { -+ R_AX_GPIO16_23_FUNC_SEL, B_AX_PINMUX_GPIO17_FUNC_SEL_MASK, BIT(7) >> 4, -+ }; -+ const struct rtw89_reg3_def *def; -+ -+ switch (func) { -+ case 16: -+ def = &func16; -+ break; -+ case 17: -+ def = &func17; -+ break; -+ default: -+ rtw89_warn(rtwdev, "undefined gpio func %d\n", func); -+ return; -+ } -+ -+ rtw89_write8_mask(rtwdev, def->addr, def->mask, def->data); -+} -+ -+static void rtw8851b_rfe_gpio(struct rtw89_dev *rtwdev) -+{ -+ u8 rfe_type = rtwdev->efuse.rfe_type; -+ -+ if (rfe_type > 50) -+ return; -+ -+ if (rfe_type % 3 == 2) { -+ rtw8851b_set_bb_gpio(rtwdev, 16, true, RFE_SEL0_SRC_ANTSEL_0); -+ rtw8851b_set_bb_gpio(rtwdev, 17, false, RFE_SEL0_SRC_ANTSEL_0); -+ -+ rtw8851b_set_mac_gpio(rtwdev, 16); -+ rtw8851b_set_mac_gpio(rtwdev, 17); -+ } -+} -+ - static const struct rtw89_chip_ops rtw8851b_chip_ops = { - .fem_setup = NULL, -+ .rfe_gpio = rtw8851b_rfe_gpio, - .fill_txdesc = rtw89_core_fill_txdesc, - .fill_txdesc_fwcmd = rtw89_core_fill_txdesc, - .h2c_dctl_sec_cam = NULL, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -2032,6 +2032,7 @@ static const struct rtw89_chip_ops rtw88 - .read_efuse = rtw8852a_read_efuse, - .read_phycap = rtw8852a_read_phycap, - .fem_setup = rtw8852a_fem_setup, -+ .rfe_gpio = NULL, - .rfk_init = rtw8852a_rfk_init, - .rfk_channel = rtw8852a_rfk_channel, - .rfk_band_changed = rtw8852a_rfk_band_changed, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2454,6 +2454,7 @@ static const struct rtw89_chip_ops rtw88 - .read_efuse = rtw8852b_read_efuse, - .read_phycap = rtw8852b_read_phycap, - .fem_setup = NULL, -+ .rfe_gpio = NULL, - .rfk_init = rtw8852b_rfk_init, - .rfk_channel = rtw8852b_rfk_channel, - .rfk_band_changed = rtw8852b_rfk_band_changed, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2762,6 +2762,7 @@ static const struct rtw89_chip_ops rtw88 - .read_efuse = rtw8852c_read_efuse, - .read_phycap = rtw8852c_read_phycap, - .fem_setup = NULL, -+ .rfe_gpio = NULL, - .rfk_init = rtw8852c_rfk_init, - .rfk_channel = rtw8852c_rfk_channel, - .rfk_band_changed = rtw8852c_rfk_band_changed, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-096-wifi-rtw89-8851b-add-BT-coexistence-support-function.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-096-wifi-rtw89-8851b-add-BT-coexistence-support-function.patch deleted file mode 100644 index e7c42f6d5..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-096-wifi-rtw89-8851b-add-BT-coexistence-support-function.patch +++ /dev/null @@ -1,421 +0,0 @@ -From 4885b17ebb92b3cc54e1064ffe52f688ca83d5c7 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 12 May 2023 14:12:17 +0800 -Subject: [PATCH 096/136] wifi: rtw89: 8851b: add BT coexistence support - function - -Add 8851B specific parameters of BT coexistence. Since 8851B has special -two antenna hardware module with antenna diversity, BT coexistence needs -to recognize this, so add some fields to store these information for -further use. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230512061220.16544-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/coex.c | 7 + - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 357 ++++++++++++++++++ - 2 files changed, 364 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -127,6 +127,13 @@ static const u32 cxtbl[] = { - - static const struct rtw89_btc_ver rtw89_btc_ver_defs[] = { - /* firmware version must be in decreasing order for each chip */ -+ {RTL8851B, RTW89_FW_VER_CODE(0, 29, 29, 0), -+ .fcxbtcrpt = 105, .fcxtdma = 3, .fcxslots = 1, .fcxcysta = 5, -+ .fcxstep = 3, .fcxnullsta = 2, .fcxmreg = 2, .fcxgpiodbg = 1, -+ .fcxbtver = 1, .fcxbtscan = 2, .fcxbtafh = 2, .fcxbtdevinfo = 1, -+ .fwlrole = 1, .frptmap = 3, .fcxctrl = 1, -+ .info_buf = 1800, .max_role_num = 6, -+ }, - {RTL8852C, RTW89_FW_VER_CODE(0, 27, 57, 0), - .fcxbtcrpt = 4, .fcxtdma = 3, .fcxslots = 1, .fcxcysta = 3, - .fcxstep = 3, .fcxnullsta = 2, .fcxmreg = 1, .fcxgpiodbg = 1, ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -72,6 +72,52 @@ static const struct rtw89_xtal_info rtw8 - .sc_xi_mask = B_AX_XTAL_SC_XI_A_BLOCK_MASK, - }; - -+static const struct rtw89_btc_rf_trx_para rtw89_btc_8851b_rf_ul[] = { -+ {255, 0, 0, 7}, /* 0 -> original */ -+ {255, 2, 0, 7}, /* 1 -> for BT-connected ACI issue && BTG co-rx */ -+ {255, 0, 0, 7}, /* 2 ->reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* 3- >reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* 4 ->reserved for shared-antenna */ -+ {255, 1, 0, 7}, /* the below id is for non-shared-antenna free-run */ -+ {6, 1, 0, 7}, -+ {13, 1, 0, 7}, -+ {13, 1, 0, 7} -+}; -+ -+static const struct rtw89_btc_rf_trx_para rtw89_btc_8851b_rf_dl[] = { -+ {255, 0, 0, 7}, /* 0 -> original */ -+ {255, 2, 0, 7}, /* 1 -> reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* 2 ->reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* 3- >reserved for shared-antenna */ -+ {255, 0, 0, 7}, /* 4 ->reserved for shared-antenna */ -+ {255, 1, 0, 7}, /* the below id is for non-shared-antenna free-run */ -+ {255, 1, 0, 7}, -+ {255, 1, 0, 7}, -+ {255, 1, 0, 7} -+}; -+ -+static const struct rtw89_btc_fbtc_mreg rtw89_btc_8851b_mon_reg[] = { -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda24), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda28), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda2c), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda30), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda4c), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda10), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda20), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xda34), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xcef4), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0x8424), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xd200), -+ RTW89_DEF_FBTC_MREG(REG_MAC, 4, 0xd220), -+ RTW89_DEF_FBTC_MREG(REG_BB, 4, 0x980), -+ RTW89_DEF_FBTC_MREG(REG_BB, 4, 0x4738), -+ RTW89_DEF_FBTC_MREG(REG_BB, 4, 0x4688), -+ RTW89_DEF_FBTC_MREG(REG_BB, 4, 0x4694), -+}; -+ -+static const u8 rtw89_btc_8851b_wl_rssi_thres[BTC_WL_RSSI_THMAX] = {70, 60, 50, 40}; -+static const u8 rtw89_btc_8851b_bt_rssi_thres[BTC_BT_RSSI_THMAX] = {50, 40, 30, 20}; -+ - static void rtw8851b_set_bb_gpio(struct rtw89_dev *rtwdev, u8 gpio_idx, bool inv, - u8 src_sel) - { -@@ -135,12 +181,313 @@ static void rtw8851b_rfe_gpio(struct rtw - } - } - -+static void rtw8851b_btc_set_rfe(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_module *module = &btc->mdinfo; -+ -+ module->rfe_type = rtwdev->efuse.rfe_type; -+ module->cv = rtwdev->hal.cv; -+ module->bt_solo = 0; -+ module->switch_type = BTC_SWITCH_INTERNAL; -+ module->ant.isolation = 10; -+ module->kt_ver_adie = rtwdev->hal.acv; -+ -+ if (module->rfe_type == 0) -+ return; -+ -+ /* rfe_type 3*n+1: 1-Ant(shared), -+ * 3*n+2: 2-Ant+Div(non-shared), -+ * 3*n+3: 2-Ant+no-Div(non-shared) -+ */ -+ module->ant.num = (module->rfe_type % 3 == 1) ? 1 : 2; -+ /* WL-1ss at S0, btg at s0 (On 1 WL RF) */ -+ module->ant.single_pos = RF_PATH_A; -+ module->ant.btg_pos = RF_PATH_A; -+ module->ant.stream_cnt = 1; -+ -+ if (module->ant.num == 1) { -+ module->ant.type = BTC_ANT_SHARED; -+ module->bt_pos = BTC_BT_BTG; -+ module->wa_type = 1; -+ module->ant.diversity = 0; -+ } else { /* ant.num == 2 */ -+ module->ant.type = BTC_ANT_DEDICATED; -+ module->bt_pos = BTC_BT_ALONE; -+ module->switch_type = BTC_SWITCH_EXTERNAL; -+ module->wa_type = 0; -+ if (module->rfe_type % 3 == 2) -+ module->ant.diversity = 1; -+ } -+} -+ -+static -+void rtw8851b_set_trx_mask(struct rtw89_dev *rtwdev, u8 path, u8 group, u32 val) -+{ -+ if (group > BTC_BT_SS_GROUP) -+ group--; /* Tx-group=1, Rx-group=2 */ -+ -+ if (rtwdev->btc.mdinfo.ant.type == BTC_ANT_SHARED) /* 1-Ant */ -+ group += 3; -+ -+ rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, group); -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, val); -+} -+ -+static void rtw8851b_btc_init_cfg(struct rtw89_dev *rtwdev) -+{ -+ static const struct rtw89_mac_ax_coex coex_params = { -+ .pta_mode = RTW89_MAC_AX_COEX_RTK_MODE, -+ .direction = RTW89_MAC_AX_COEX_INNER, -+ }; -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_module *module = &btc->mdinfo; -+ struct rtw89_btc_ant_info *ant = &module->ant; -+ u8 path, path_min, path_max; -+ -+ /* PTA init */ -+ rtw89_mac_coex_init(rtwdev, &coex_params); -+ -+ /* set WL Tx response = Hi-Pri */ -+ chip->ops->btc_set_wl_pri(rtwdev, BTC_PRI_MASK_TX_RESP, true); -+ chip->ops->btc_set_wl_pri(rtwdev, BTC_PRI_MASK_BEACON, true); -+ -+ /* for 1-Ant && 1-ss case: only 1-path */ -+ if (ant->stream_cnt == 1) { -+ path_min = ant->single_pos; -+ path_max = path_min; -+ } else { -+ path_min = RF_PATH_A; -+ path_max = RF_PATH_B; -+ } -+ -+ for (path = path_min; path <= path_max; path++) { -+ /* set rf gnt-debug off */ -+ rtw89_write_rf(rtwdev, path, RR_WLSEL, RFREG_MASK, 0x0); -+ -+ /* set DEBUG_LUT_RFMODE_MASK = 1 to start trx-mask-setup */ -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, BIT(17)); -+ -+ /* if GNT_WL=0 && BT=SS_group --> WL Tx/Rx = THRU */ -+ rtw8851b_set_trx_mask(rtwdev, path, BTC_BT_SS_GROUP, 0x5ff); -+ -+ /* if GNT_WL=0 && BT=Rx_group --> WL-Rx = THRU + WL-Tx = MASK */ -+ rtw8851b_set_trx_mask(rtwdev, path, BTC_BT_RX_GROUP, 0x5df); -+ -+ /* if GNT_WL = 0 && BT = Tx_group --> -+ * Shared-Ant && BTG-path:WL mask(0x55f), others:WL THRU(0x5ff) -+ */ -+ if (ant->type == BTC_ANT_SHARED && ant->btg_pos == path) -+ rtw8851b_set_trx_mask(rtwdev, path, BTC_BT_TX_GROUP, 0x55f); -+ else -+ rtw8851b_set_trx_mask(rtwdev, path, BTC_BT_TX_GROUP, 0x5ff); -+ -+ /* set DEBUG_LUT_RFMODE_MASK = 0 to stop trx-mask-setup */ -+ rtw89_write_rf(rtwdev, path, RR_LUTWE, RFREG_MASK, 0); -+ } -+ -+ /* set PTA break table */ -+ rtw89_write32(rtwdev, R_BTC_BREAK_TABLE, BTC_BREAK_PARAM); -+ -+ /* enable BT counter 0xda40[16,2] = 2b'11 */ -+ rtw89_write32_set(rtwdev, R_AX_CSR_MODE, B_AX_BT_CNT_RST | B_AX_STATIS_BT_EN); -+ -+ btc->cx.wl.status.map.init_ok = true; -+} -+ -+static -+void rtw8851b_btc_set_wl_pri(struct rtw89_dev *rtwdev, u8 map, bool state) -+{ -+ u32 bitmap; -+ u32 reg; -+ -+ switch (map) { -+ case BTC_PRI_MASK_TX_RESP: -+ reg = R_BTC_BT_COEX_MSK_TABLE; -+ bitmap = B_BTC_PRI_MASK_TX_RESP_V1; -+ break; -+ case BTC_PRI_MASK_BEACON: -+ reg = R_AX_WL_PRI_MSK; -+ bitmap = B_AX_PTA_WL_PRI_MASK_BCNQ; -+ break; -+ case BTC_PRI_MASK_RX_CCK: -+ reg = R_BTC_BT_COEX_MSK_TABLE; -+ bitmap = B_BTC_PRI_MASK_RXCCK_V1; -+ break; -+ default: -+ return; -+ } -+ -+ if (state) -+ rtw89_write32_set(rtwdev, reg, bitmap); -+ else -+ rtw89_write32_clr(rtwdev, reg, bitmap); -+} -+ -+union rtw8851b_btc_wl_txpwr_ctrl { -+ u32 txpwr_val; -+ struct { -+ union { -+ u16 ctrl_all_time; -+ struct { -+ s16 data:9; -+ u16 rsvd:6; -+ u16 flag:1; -+ } all_time; -+ }; -+ union { -+ u16 ctrl_gnt_bt; -+ struct { -+ s16 data:9; -+ u16 rsvd:7; -+ } gnt_bt; -+ }; -+ }; -+} __packed; -+ -+static void -+rtw8851b_btc_set_wl_txpwr_ctrl(struct rtw89_dev *rtwdev, u32 txpwr_val) -+{ -+ union rtw8851b_btc_wl_txpwr_ctrl arg = { .txpwr_val = txpwr_val }; -+ s32 val; -+ -+#define __write_ctrl(_reg, _msk, _val, _en, _cond) \ -+do { \ -+ u32 _wrt = FIELD_PREP(_msk, _val); \ -+ BUILD_BUG_ON(!!(_msk & _en)); \ -+ if (_cond) \ -+ _wrt |= _en; \ -+ else \ -+ _wrt &= ~_en; \ -+ rtw89_mac_txpwr_write32_mask(rtwdev, RTW89_PHY_0, _reg, \ -+ _msk | _en, _wrt); \ -+} while (0) -+ -+ switch (arg.ctrl_all_time) { -+ case 0xffff: -+ val = 0; -+ break; -+ default: -+ val = arg.all_time.data; -+ break; -+ } -+ -+ __write_ctrl(R_AX_PWR_RATE_CTRL, B_AX_FORCE_PWR_BY_RATE_VALUE_MASK, -+ val, B_AX_FORCE_PWR_BY_RATE_EN, -+ arg.ctrl_all_time != 0xffff); -+ -+ switch (arg.ctrl_gnt_bt) { -+ case 0xffff: -+ val = 0; -+ break; -+ default: -+ val = arg.gnt_bt.data; -+ break; -+ } -+ -+ __write_ctrl(R_AX_PWR_COEXT_CTRL, B_AX_TXAGC_BT_MASK, val, -+ B_AX_TXAGC_BT_EN, arg.ctrl_gnt_bt != 0xffff); -+ -+#undef __write_ctrl -+} -+ -+static -+s8 rtw8851b_btc_get_bt_rssi(struct rtw89_dev *rtwdev, s8 val) -+{ -+ val = clamp_t(s8, val, -100, 0) + 100; -+ val = min(val + 6, 100); /* compensate offset */ -+ -+ return val; -+} -+ -+static -+void rtw8851b_btc_update_bt_cnt(struct rtw89_dev *rtwdev) -+{ -+ /* Feature move to firmware */ -+} -+ -+static void rtw8851b_btc_wl_s1_standby(struct rtw89_dev *rtwdev, bool state) -+{ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_ant_info *ant = &btc->mdinfo.ant; -+ -+ rtw89_write_rf(rtwdev, ant->btg_pos, RR_LUTWE, RFREG_MASK, 0x80000); -+ rtw89_write_rf(rtwdev, ant->btg_pos, RR_LUTWA, RFREG_MASK, 0x1); -+ rtw89_write_rf(rtwdev, ant->btg_pos, RR_LUTWD1, RFREG_MASK, 0x110); -+ -+ /* set WL standby = Rx for GNT_BT_Tx = 1->0 settle issue */ -+ if (state) -+ rtw89_write_rf(rtwdev, ant->btg_pos, RR_LUTWD0, RFREG_MASK, 0x179c); -+ else -+ rtw89_write_rf(rtwdev, ant->btg_pos, RR_LUTWD0, RFREG_MASK, 0x208); -+ -+ rtw89_write_rf(rtwdev, ant->btg_pos, RR_LUTWE, RFREG_MASK, 0x0); -+} -+ -+#define LNA2_51B_MA 0x700 -+ -+static const struct rtw89_reg2_def btc_8851b_rf_0[] = {{0x2, 0x0}}; -+static const struct rtw89_reg2_def btc_8851b_rf_1[] = {{0x2, 0x1}}; -+ -+static void rtw8851b_btc_set_wl_rx_gain(struct rtw89_dev *rtwdev, u32 level) -+{ -+ /* To improve BT ACI in co-rx -+ * level=0 Default: TIA 1/0= (LNA2,TIAN6) = (7,1)/(5,1) = 21dB/12dB -+ * level=1 Fix LNA2=5: TIA 1/0= (LNA2,TIAN6) = (5,0)/(5,1) = 18dB/12dB -+ */ -+ struct rtw89_btc *btc = &rtwdev->btc; -+ struct rtw89_btc_ant_info *ant = &btc->mdinfo.ant; -+ const struct rtw89_reg2_def *rf; -+ u32 n, i, val; -+ -+ switch (level) { -+ case 0: /* original */ -+ default: -+ btc->dm.wl_lna2 = 0; -+ break; -+ case 1: /* for FDD free-run */ -+ btc->dm.wl_lna2 = 0; -+ break; -+ case 2: /* for BTG Co-Rx*/ -+ btc->dm.wl_lna2 = 1; -+ break; -+ } -+ -+ if (btc->dm.wl_lna2 == 0) { -+ rf = btc_8851b_rf_0; -+ n = ARRAY_SIZE(btc_8851b_rf_0); -+ } else { -+ rf = btc_8851b_rf_1; -+ n = ARRAY_SIZE(btc_8851b_rf_1); -+ } -+ -+ for (i = 0; i < n; i++, rf++) { -+ val = rf->data; -+ /* bit[10] = 1 if non-shared-ant for 8851b */ -+ if (btc->mdinfo.ant.type == BTC_ANT_DEDICATED) -+ val |= 0x4; -+ -+ rtw89_write_rf(rtwdev, ant->btg_pos, rf->addr, LNA2_51B_MA, val); -+ } -+} -+ - static const struct rtw89_chip_ops rtw8851b_chip_ops = { - .fem_setup = NULL, - .rfe_gpio = rtw8851b_rfe_gpio, - .fill_txdesc = rtw89_core_fill_txdesc, - .fill_txdesc_fwcmd = rtw89_core_fill_txdesc, - .h2c_dctl_sec_cam = NULL, -+ -+ .btc_set_rfe = rtw8851b_btc_set_rfe, -+ .btc_init_cfg = rtw8851b_btc_init_cfg, -+ .btc_set_wl_pri = rtw8851b_btc_set_wl_pri, -+ .btc_set_wl_txpwr_ctrl = rtw8851b_btc_set_wl_txpwr_ctrl, -+ .btc_get_bt_rssi = rtw8851b_btc_get_bt_rssi, -+ .btc_update_bt_cnt = rtw8851b_btc_update_bt_cnt, -+ .btc_wl_s1_standby = rtw8851b_btc_wl_s1_standby, -+ .btc_set_wl_rx_gain = rtw8851b_btc_set_wl_rx_gain, -+ .btc_set_policy = rtw89_btc_set_policy_v1, - }; - - #ifdef CONFIG_PM -@@ -213,6 +560,16 @@ const struct rtw89_chip_info rtw8851b_ch - .scbd = 0x1, - .mailbox = 0x1, - -+ .afh_guard_ch = 6, -+ .wl_rssi_thres = rtw89_btc_8851b_wl_rssi_thres, -+ .bt_rssi_thres = rtw89_btc_8851b_bt_rssi_thres, -+ .rssi_tol = 2, -+ .mon_reg_num = ARRAY_SIZE(rtw89_btc_8851b_mon_reg), -+ .mon_reg = rtw89_btc_8851b_mon_reg, -+ .rf_para_ulink_num = ARRAY_SIZE(rtw89_btc_8851b_rf_ul), -+ .rf_para_ulink = rtw89_btc_8851b_rf_ul, -+ .rf_para_dlink_num = ARRAY_SIZE(rtw89_btc_8851b_rf_dl), -+ .rf_para_dlink = rtw89_btc_8851b_rf_dl, - .ps_mode_supported = BIT(RTW89_PS_MODE_RFOFF) | - BIT(RTW89_PS_MODE_CLK_GATED), - .low_power_hci_modes = 0, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-097-wifi-rtw89-8851b-add-basic-power-on-function.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-097-wifi-rtw89-8851b-add-basic-power-on-function.patch deleted file mode 100644 index 566633a35..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-097-wifi-rtw89-8851b-add-basic-power-on-function.patch +++ /dev/null @@ -1,452 +0,0 @@ -From 31df6df89f9394bc544a4ebad62584d56bff1677 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 12 May 2023 14:12:18 +0800 -Subject: [PATCH 097/136] wifi: rtw89: 8851b: add basic power on function - -Add basic functions to power on chip and enable and access BB/RF, as -well as reset and hardware settings of BB. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230512061220.16544-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac.h | 2 + - drivers/net/wireless/realtek/rtw89/reg.h | 17 + - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 327 ++++++++++++++++++ - 3 files changed, 346 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/mac.h -+++ b/drivers/net/wireless/realtek/rtw89/mac.h -@@ -1118,6 +1118,8 @@ enum rtw89_mac_xtal_si_offset { - XTAL_SI_PWR_CUT = 0x10, - #define XTAL_SI_SMALL_PWR_CUT BIT(0) - #define XTAL_SI_BIG_PWR_CUT BIT(1) -+ XTAL_SI_XTAL_DRV = 0x15, -+#define XTAL_SI_DRV_LATCH BIT(4) - XTAL_SI_XTAL_XMD_2 = 0x24, - #define XTAL_SI_LDO_LPS GENMASK(6, 4) - XTAL_SI_XTAL_XMD_4 = 0x26, ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -19,6 +19,8 @@ - #define B_AX_FEN_BBRSTB BIT(0) - - #define R_AX_SYS_PW_CTRL 0x0004 -+#define B_AX_SOP_ASWRM BIT(31) -+#define B_AX_SOP_PWMM_DSWR BIT(29) - #define B_AX_XTAL_OFF_A_DIE BIT(22) - #define B_AX_DIS_WLBT_PDNSUSEN_SOPC BIT(18) - #define B_AX_RDY_SYSPWR BIT(17) -@@ -134,6 +136,8 @@ - #define B_AX_PLATFORM_EN BIT(0) - - #define R_AX_WLLPS_CTRL 0x0090 -+#define B_AX_LPSOP_ASWRM BIT(17) -+#define B_AX_LPSOP_DSWRM BIT(9) - #define B_AX_DIS_WLBT_LPSEN_LOPC BIT(1) - #define SW_LPS_OPTION 0x0001A0B2 - -@@ -222,9 +226,14 @@ - #define B_AX_OCP_L1_MASK GENMASK(15, 13) - #define B_AX_VOL_L1_MASK GENMASK(3, 0) - -+#define R_AX_SPSLDO_ON_CTRL1 0x0204 -+#define B_AX_FPWMDELAY BIT(3) -+ - #define R_AX_LDO_AON_CTRL0 0x0218 - #define B_AX_PD_REGU_L BIT(16) - -+#define R_AX_SPSANA_ON_CTRL1 0x0224 -+ - #define R_AX_WLAN_XTAL_SI_CTRL 0x0270 - #define B_AX_WL_XTAL_SI_CMD_POLL BIT(31) - #define B_AX_BT_XTAL_SI_ERR_FLAG BIT(30) -@@ -237,6 +246,9 @@ - #define B_AX_WL_XTAL_SI_DATA_MASK GENMASK(15, 8) - #define B_AX_WL_XTAL_SI_ADDR_MASK GENMASK(7, 0) - -+#define R_AX_WLAN_XTAL_SI_CONFIG 0x0274 -+#define B_AX_XTAL_SI_ADDR_NOT_CHK BIT(0) -+ - #define R_AX_XTAL_ON_CTRL0 0x0280 - #define B_AX_XTAL_SC_LPS BIT(31) - #define B_AX_XTAL_SC_XO_MASK GENMASK(23, 17) -@@ -267,6 +279,10 @@ - #define B_AX_EESK_PULL_LOW_EN BIT(17) - #define B_AX_EECS_PULL_LOW_EN BIT(16) - -+#define R_AX_GPIO0_16_EECS_EESK_LED1_PULL_LOW_EN 0x02E4 -+#define B_AX_GPIO16_PULL_LOW_EN_V1 BIT(19) -+#define B_AX_GPIO10_PULL_LOW_EN BIT(10) -+ - #define R_AX_WLRF_CTRL 0x02F0 - #define B_AX_AFC_AFEDIG BIT(17) - #define B_AX_WLRF1_CTRL_7 BIT(15) -@@ -4497,6 +4513,7 @@ - #define B_RFSW_CTRL_ANT_MAPPING GENMASK(15, 0) - #define R_RFE_SEL0_BASE 0x5880 - #define B_RFE_SEL0_SRC_MASK GENMASK(3, 0) -+#define R_RFE_SEL32_BASE 0x5884 - #define RFE_SEL0_SRC_ANTSEL_0 8 - #define R_RFE_INV0 0x5890 - #define R_P0_RFM 0x5894 ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -3,6 +3,7 @@ - */ - - #include "coex.h" -+#include "efuse.h" - #include "fw.h" - #include "mac.h" - #include "phy.h" -@@ -118,6 +119,182 @@ static const struct rtw89_btc_fbtc_mreg - static const u8 rtw89_btc_8851b_wl_rssi_thres[BTC_WL_RSSI_THMAX] = {70, 60, 50, 40}; - static const u8 rtw89_btc_8851b_bt_rssi_thres[BTC_BT_RSSI_THMAX] = {50, 40, 30, 20}; - -+static int rtw8851b_pwr_on_func(struct rtw89_dev *rtwdev) -+{ -+ u32 val32; -+ u8 val8; -+ u32 ret; -+ -+ rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_AFSM_WLSUS_EN | -+ B_AX_AFSM_PCIE_SUS_EN); -+ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_DIS_WLBT_PDNSUSEN_SOPC); -+ rtw89_write32_set(rtwdev, R_AX_WLLPS_CTRL, B_AX_DIS_WLBT_LPSEN_LOPC); -+ rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APDM_HPDN); -+ rtw89_write32_clr(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS); -+ -+ ret = read_poll_timeout(rtw89_read32, val32, val32 & B_AX_RDY_SYSPWR, -+ 1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL); -+ if (ret) -+ return ret; -+ -+ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_EN_WLON); -+ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFN_ONMAC); -+ -+ ret = read_poll_timeout(rtw89_read32, val32, !(val32 & B_AX_APFN_ONMAC), -+ 1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL); -+ if (ret) -+ return ret; -+ -+ rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); -+ rtw89_write8_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); -+ rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); -+ rtw89_write8_clr(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); -+ -+ rtw89_write8_set(rtwdev, R_AX_PLATFORM_ENABLE, B_AX_PLATFORM_EN); -+ rtw89_write32_clr(rtwdev, R_AX_SYS_SDIO_CTRL, B_AX_PCIE_CALIB_EN_V1); -+ -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_OFF_WEI, -+ XTAL_SI_OFF_WEI); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_OFF_EI, -+ XTAL_SI_OFF_EI); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_RFC2RF); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_PON_WEI, -+ XTAL_SI_PON_WEI); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_PON_EI, -+ XTAL_SI_PON_EI); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_SRAM2RFC); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_SRAM_CTRL, 0, XTAL_SI_SRAM_DIS); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_XTAL_XMD_2, 0, XTAL_SI_LDO_LPS); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_XTAL_XMD_4, 0, XTAL_SI_LPS_CAP); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_XTAL_DRV, 0, XTAL_SI_DRV_LATCH); -+ if (ret) -+ return ret; -+ -+ rtw89_write32_set(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); -+ rtw89_write32_set(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_ISO_EB2CORE); -+ rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B15); -+ -+ fsleep(1000); -+ -+ rtw89_write32_clr(rtwdev, R_AX_SYS_ISO_CTRL, B_AX_PWC_EV2EF_B14); -+ rtw89_write32_clr(rtwdev, R_AX_PMC_DBG_CTRL2, B_AX_SYSON_DIS_PMCR_AX_WRMSK); -+ rtw89_write32_set(rtwdev, R_AX_GPIO0_16_EECS_EESK_LED1_PULL_LOW_EN, -+ B_AX_GPIO10_PULL_LOW_EN | B_AX_GPIO16_PULL_LOW_EN_V1); -+ -+ if (rtwdev->hal.cv == CHIP_CAV) { -+ ret = rtw89_read_efuse_ver(rtwdev, &val8); -+ if (!ret) -+ rtwdev->hal.cv = val8; -+ } -+ -+ rtw89_write32_clr(rtwdev, R_AX_WLAN_XTAL_SI_CONFIG, -+ B_AX_XTAL_SI_ADDR_NOT_CHK); -+ if (rtwdev->hal.cv != CHIP_CAV) { -+ rtw89_write32_set(rtwdev, R_AX_SPSLDO_ON_CTRL1, B_AX_FPWMDELAY); -+ rtw89_write32_set(rtwdev, R_AX_SPSANA_ON_CTRL1, B_AX_FPWMDELAY); -+ } -+ -+ rtw89_write32_set(rtwdev, R_AX_DMAC_FUNC_EN, -+ B_AX_MAC_FUNC_EN | B_AX_DMAC_FUNC_EN | B_AX_MPDU_PROC_EN | -+ B_AX_WD_RLS_EN | B_AX_DLE_WDE_EN | B_AX_TXPKT_CTRL_EN | -+ B_AX_STA_SCH_EN | B_AX_DLE_PLE_EN | B_AX_PKT_BUF_EN | -+ B_AX_DMAC_TBL_EN | B_AX_PKT_IN_EN | B_AX_DLE_CPUIO_EN | -+ B_AX_DISPATCHER_EN | B_AX_BBRPT_EN | B_AX_MAC_SEC_EN | -+ B_AX_DMACREG_GCKEN); -+ rtw89_write32_set(rtwdev, R_AX_CMAC_FUNC_EN, -+ B_AX_CMAC_EN | B_AX_CMAC_TXEN | B_AX_CMAC_RXEN | -+ B_AX_FORCE_CMACREG_GCKEN | B_AX_PHYINTF_EN | B_AX_CMAC_DMA_EN | -+ B_AX_PTCLTOP_EN | B_AX_SCHEDULER_EN | B_AX_TMAC_EN | -+ B_AX_RMAC_EN); -+ -+ rtw89_write32_mask(rtwdev, R_AX_EECS_EESK_FUNC_SEL, B_AX_PINMUX_EESK_FUNC_SEL_MASK, -+ PINMUX_EESK_FUNC_SEL_BT_LOG); -+ -+ return 0; -+} -+ -+static void rtw8851b_patch_swr_pfm2pwm(struct rtw89_dev *rtwdev) -+{ -+ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_SOP_PWMM_DSWR); -+ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_SOP_ASWRM); -+ rtw89_write32_set(rtwdev, R_AX_WLLPS_CTRL, B_AX_LPSOP_DSWRM); -+ rtw89_write32_set(rtwdev, R_AX_WLLPS_CTRL, B_AX_LPSOP_ASWRM); -+} -+ -+static int rtw8851b_pwr_off_func(struct rtw89_dev *rtwdev) -+{ -+ u32 val32; -+ u32 ret; -+ -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_RFC2RF, -+ XTAL_SI_RFC2RF); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_OFF_EI); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_OFF_WEI); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S0, 0, XTAL_SI_RF00); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, XTAL_SI_SRAM2RFC, -+ XTAL_SI_SRAM2RFC); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_PON_EI); -+ if (ret) -+ return ret; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_ANAPAR_WL, 0, XTAL_SI_PON_WEI); -+ if (ret) -+ return ret; -+ -+ rtw89_write32_set(rtwdev, R_AX_WLAN_XTAL_SI_CONFIG, -+ B_AX_XTAL_SI_ADDR_NOT_CHK); -+ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_EN_WLON); -+ rtw89_write32_clr(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG); -+ rtw89_write8_clr(rtwdev, R_AX_SYS_FUNC_EN, B_AX_FEN_BB_GLB_RSTN | B_AX_FEN_BBRSTB); -+ -+ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_OFFMAC); -+ -+ ret = read_poll_timeout(rtw89_read32, val32, !(val32 & B_AX_APFM_OFFMAC), -+ 1000, 20000, false, rtwdev, R_AX_SYS_PW_CTRL); -+ if (ret) -+ return ret; -+ -+ rtw89_write32(rtwdev, R_AX_WLLPS_CTRL, SW_LPS_OPTION); -+ -+ if (rtwdev->hal.cv == CHIP_CAV) { -+ rtw8851b_patch_swr_pfm2pwm(rtwdev); -+ } else { -+ rtw89_write32_set(rtwdev, R_AX_SPSLDO_ON_CTRL1, B_AX_FPWMDELAY); -+ rtw89_write32_set(rtwdev, R_AX_SPSANA_ON_CTRL1, B_AX_FPWMDELAY); -+ } -+ -+ rtw89_write32_set(rtwdev, R_AX_SYS_PW_CTRL, B_AX_APFM_SWLPS); -+ -+ return 0; -+} -+ - static void rtw8851b_set_bb_gpio(struct rtw89_dev *rtwdev, u8 gpio_idx, bool inv, - u8 src_sel) - { -@@ -181,6 +358,96 @@ static void rtw8851b_rfe_gpio(struct rtw - } - } - -+static void rtw8851b_bb_reset_all(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG, 0x7, phy_idx); -+ fsleep(1); -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, phy_idx); -+} -+ -+static void rtw8851b_bb_reset(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, -+ B_P0_TXPW_RSTB_MANON | B_P0_TXPW_RSTB_TSSI, 0x1); -+ rtw89_phy_write32_set(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); -+ rtw8851b_bb_reset_all(rtwdev, phy_idx); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, -+ B_P0_TXPW_RSTB_MANON | B_P0_TXPW_RSTB_TSSI, 0x3); -+ rtw89_phy_write32_clr(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN); -+} -+ -+static -+void rtw8851b_bb_gpio_trsw(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, -+ u8 tx_path_en, u8 trsw_tx, -+ u8 trsw_rx, u8 trsw_a, u8 trsw_b) -+{ -+ u32 mask_ofst = 16; -+ u32 val; -+ -+ if (path != RF_PATH_A) -+ return; -+ -+ mask_ofst += (tx_path_en * 4 + trsw_tx * 2 + trsw_rx) * 2; -+ val = u32_encode_bits(trsw_a, B_P0_TRSW_A) | -+ u32_encode_bits(trsw_b, B_P0_TRSW_B); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TRSW, -+ (B_P0_TRSW_A | B_P0_TRSW_B) << mask_ofst, val); -+} -+ -+static void rtw8851b_bb_gpio_init(struct rtw89_dev *rtwdev) -+{ -+ rtw89_phy_write32_set(rtwdev, R_P0_TRSW, B_P0_TRSW_A); -+ rtw89_phy_write32_clr(rtwdev, R_P0_TRSW, B_P0_TRSW_X); -+ rtw89_phy_write32_clr(rtwdev, R_P0_TRSW, B_P0_TRSW_SO_A2); -+ rtw89_phy_write32(rtwdev, R_RFE_SEL0_BASE, 0x77777777); -+ rtw89_phy_write32(rtwdev, R_RFE_SEL32_BASE, 0x77777777); -+ -+ rtw89_phy_write32(rtwdev, R_RFE_E_A2, 0xffffffff); -+ rtw89_phy_write32(rtwdev, R_RFE_O_SEL_A2, 0); -+ rtw89_phy_write32(rtwdev, R_RFE_SEL0_A2, 0); -+ rtw89_phy_write32(rtwdev, R_RFE_SEL32_A2, 0); -+ -+ rtw8851b_bb_gpio_trsw(rtwdev, RF_PATH_A, 0, 0, 0, 0, 1); -+ rtw8851b_bb_gpio_trsw(rtwdev, RF_PATH_A, 0, 0, 1, 1, 0); -+ rtw8851b_bb_gpio_trsw(rtwdev, RF_PATH_A, 0, 1, 0, 1, 0); -+ rtw8851b_bb_gpio_trsw(rtwdev, RF_PATH_A, 0, 1, 1, 1, 0); -+ rtw8851b_bb_gpio_trsw(rtwdev, RF_PATH_A, 1, 0, 0, 0, 1); -+ rtw8851b_bb_gpio_trsw(rtwdev, RF_PATH_A, 1, 0, 1, 1, 0); -+ rtw8851b_bb_gpio_trsw(rtwdev, RF_PATH_A, 1, 1, 0, 1, 0); -+ rtw8851b_bb_gpio_trsw(rtwdev, RF_PATH_A, 1, 1, 1, 1, 0); -+} -+ -+static void rtw8851b_bb_macid_ctrl_init(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ u32 addr; -+ -+ for (addr = R_AX_PWR_MACID_LMT_TABLE0; -+ addr <= R_AX_PWR_MACID_LMT_TABLE127; addr += 4) -+ rtw89_mac_txpwr_write32(rtwdev, phy_idx, addr, 0); -+} -+ -+static void rtw8851b_bb_sethw(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; -+ -+ rtw89_phy_write32_clr(rtwdev, R_P0_EN_SOUND_WO_NDP, B_P0_EN_SOUND_WO_NDP); -+ -+ rtw8851b_bb_macid_ctrl_init(rtwdev, RTW89_PHY_0); -+ rtw8851b_bb_gpio_init(rtwdev); -+ -+ /* read these registers after loading BB parameters */ -+ gain->offset_base[RTW89_PHY_0] = -+ rtw89_phy_read32_mask(rtwdev, R_P0_RPL1, B_P0_RPL1_BIAS_MASK); -+ gain->rssi_base[RTW89_PHY_0] = -+ rtw89_phy_read32_mask(rtwdev, R_P1_RPL1, B_P0_RPL1_BIAS_MASK); -+} -+ - static void rtw8851b_btc_set_rfe(struct rtw89_dev *rtwdev) - { - struct rtw89_btc *btc = &rtwdev->btc; -@@ -472,9 +739,69 @@ static void rtw8851b_btc_set_wl_rx_gain( - } - } - -+static int rtw8851b_mac_enable_bb_rf(struct rtw89_dev *rtwdev) -+{ -+ int ret; -+ -+ rtw89_write8_set(rtwdev, R_AX_SYS_FUNC_EN, -+ B_AX_FEN_BBRSTB | B_AX_FEN_BB_GLB_RSTN); -+ rtw89_write32_set(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG); -+ rtw89_write32_clr(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG); -+ rtw89_write32_set(rtwdev, R_AX_WLRF_CTRL, B_AX_AFC_AFEDIG); -+ -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S0, 0xC7, -+ FULL_BIT_MASK); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S1, 0xC7, -+ FULL_BIT_MASK); -+ if (ret) -+ return ret; -+ -+ rtw89_write8(rtwdev, R_AX_PHYREG_SET, PHYREG_SET_XYN_CYCLE); -+ -+ return 0; -+} -+ -+static int rtw8851b_mac_disable_bb_rf(struct rtw89_dev *rtwdev) -+{ -+ u8 wl_rfc_s0; -+ u8 wl_rfc_s1; -+ int ret; -+ -+ rtw89_write8_clr(rtwdev, R_AX_SYS_FUNC_EN, -+ B_AX_FEN_BBRSTB | B_AX_FEN_BB_GLB_RSTN); -+ -+ ret = rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_WL_RFC_S0, &wl_rfc_s0); -+ if (ret) -+ return ret; -+ wl_rfc_s0 &= ~XTAL_SI_RF00S_EN; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S0, wl_rfc_s0, -+ FULL_BIT_MASK); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_mac_read_xtal_si(rtwdev, XTAL_SI_WL_RFC_S1, &wl_rfc_s1); -+ if (ret) -+ return ret; -+ wl_rfc_s1 &= ~XTAL_SI_RF10S_EN; -+ ret = rtw89_mac_write_xtal_si(rtwdev, XTAL_SI_WL_RFC_S1, wl_rfc_s1, -+ FULL_BIT_MASK); -+ return ret; -+} -+ - static const struct rtw89_chip_ops rtw8851b_chip_ops = { -+ .enable_bb_rf = rtw8851b_mac_enable_bb_rf, -+ .disable_bb_rf = rtw8851b_mac_disable_bb_rf, -+ .bb_reset = rtw8851b_bb_reset, -+ .bb_sethw = rtw8851b_bb_sethw, -+ .read_rf = rtw89_phy_read_rf_v1, -+ .write_rf = rtw89_phy_write_rf_v1, - .fem_setup = NULL, - .rfe_gpio = rtw8851b_rfe_gpio, -+ .pwr_on_func = rtw8851b_pwr_on_func, -+ .pwr_off_func = rtw8851b_pwr_off_func, - .fill_txdesc = rtw89_core_fill_txdesc, - .fill_txdesc_fwcmd = rtw89_core_fill_txdesc, - .h2c_dctl_sec_cam = NULL, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-098-wifi-rtw89-8851b-add-set-channel-function.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-098-wifi-rtw89-8851b-add-set-channel-function.patch deleted file mode 100644 index fc7e2120f..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-098-wifi-rtw89-8851b-add-set-channel-function.patch +++ /dev/null @@ -1,812 +0,0 @@ -From e948213fb8560f6d6af6058351758f13a35c9f8d Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 12 May 2023 14:12:19 +0800 -Subject: [PATCH 098/136] wifi: rtw89: 8851b: add set channel function - -Set MAC/BB/RF registers according to channel we are going to set. In -additional, certain channels or bands need more deals, such as enable CCK -in 2 GHz band, spur elimination at certain frequencies. - -The set channel helper is used to save/restore states before/after setting -channel, and does reset BB to prevent hardware getting stuck in abnormal -state during switching channel and receiving data. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230512061220.16544-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 14 + - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 703 ++++++++++++++++++ - 2 files changed, 717 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3999,6 +3999,7 @@ - #define R_S0_HW_SI_DIS 0x1200 - #define B_S0_HW_SI_DIS_W_R_TRIG GENMASK(30, 28) - #define R_P0_RXCK 0x12A0 -+#define B_P0_RXCK_ADJ GENMASK(31, 23) - #define B_P0_RXCK_BW3 BIT(30) - #define B_P0_TXCK_ALL GENMASK(19, 12) - #define B_P0_RXCK_ON BIT(19) -@@ -4155,8 +4156,10 @@ - #define R_DCFO 0x4264 - #define B_DCFO GENMASK(7, 0) - #define R_SEG0CSI 0x42AC -+#define R_SEG0CSI_V1 0x42B0 - #define B_SEG0CSI_IDX GENMASK(10, 0) - #define R_SEG0CSI_EN 0x42C4 -+#define R_SEG0CSI_EN_V1 0x42C8 - #define B_SEG0CSI_EN BIT(23) - #define R_BSS_CLR_MAP 0x43ac - #define R_BSS_CLR_MAP_V1 0x43B0 -@@ -4388,6 +4391,12 @@ - #define B_PATH0_BT_BACKOFF_V1 GENMASK(23, 0) - #define R_PATH1_BT_BACKOFF_V1 0x4AEC - #define B_PATH1_BT_BACKOFF_V1 GENMASK(23, 0) -+#define R_PATH0_TX_CFR 0x4B30 -+#define B_PATH0_TX_CFR_LGC1 GENMASK(19, 10) -+#define B_PATH0_TX_CFR_LGC0 GENMASK(9, 0) -+#define R_PATH0_TX_POLAR_CLIPPING 0x4B3C -+#define B_PATH0_TX_POLAR_CLIPPING_LGC1 GENMASK(19, 16) -+#define B_PATH0_TX_POLAR_CLIPPING_LGC0 GENMASK(15, 12) - #define R_PATH0_FRC_FIR_TYPE_V1 0x4C00 - #define B_PATH0_FRC_FIR_TYPE_MSK_V1 GENMASK(1, 0) - #define R_PATH0_NOTCH 0x4C14 -@@ -4843,11 +4852,16 @@ - #define R_P0_CFCH_BW1 0xC0D8 - #define B_P0_CFCH_EX BIT(13) - #define B_P0_CFCH_BW1 GENMASK(8, 5) -+#define R_WDADC 0xC0E4 -+#define B_WDADC_SEL GENMASK(5, 4) - #define R_ADCMOD 0xC0E8 - #define B_ADCMOD_LP GENMASK(31, 16) -+#define R_DCIM 0xC0EC -+#define B_DCIM_FR GENMASK(14, 13) - #define R_ADDCK0D 0xC0F0 - #define B_ADDCK0D_VAL2 GENMASK(31, 26) - #define B_ADDCK0D_VAL GENMASK(25, 16) -+#define B_ADDCK_DS BIT(16) - #define R_ADDCK0 0xC0F4 - #define B_ADDCK0_TRG BIT(11) - #define B_ADDCK0_IQ BIT(10) ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -9,6 +9,7 @@ - #include "phy.h" - #include "reg.h" - #include "rtw8851b.h" -+#include "rtw8851b_rfk.h" - #include "rtw8851b_rfk_table.h" - #include "rtw8851b_table.h" - #include "txrx.h" -@@ -358,6 +359,593 @@ static void rtw8851b_rfe_gpio(struct rtw - } - } - -+static void rtw8851b_set_channel_mac(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ u8 mac_idx) -+{ -+ u32 sub_carr = rtw89_mac_reg_by_idx(R_AX_TX_SUB_CARRIER_VALUE, mac_idx); -+ u32 chk_rate = rtw89_mac_reg_by_idx(R_AX_TXRATE_CHK, mac_idx); -+ u32 rf_mod = rtw89_mac_reg_by_idx(R_AX_WMAC_RFMOD, mac_idx); -+ u8 txsc20 = 0, txsc40 = 0; -+ -+ switch (chan->band_width) { -+ case RTW89_CHANNEL_WIDTH_80: -+ txsc40 = rtw89_phy_get_txsc(rtwdev, chan, RTW89_CHANNEL_WIDTH_40); -+ fallthrough; -+ case RTW89_CHANNEL_WIDTH_40: -+ txsc20 = rtw89_phy_get_txsc(rtwdev, chan, RTW89_CHANNEL_WIDTH_20); -+ break; -+ default: -+ break; -+ } -+ -+ switch (chan->band_width) { -+ case RTW89_CHANNEL_WIDTH_80: -+ rtw89_write8_mask(rtwdev, rf_mod, B_AX_WMAC_RFMOD_MASK, BIT(1)); -+ rtw89_write32(rtwdev, sub_carr, txsc20 | (txsc40 << 4)); -+ break; -+ case RTW89_CHANNEL_WIDTH_40: -+ rtw89_write8_mask(rtwdev, rf_mod, B_AX_WMAC_RFMOD_MASK, BIT(0)); -+ rtw89_write32(rtwdev, sub_carr, txsc20); -+ break; -+ case RTW89_CHANNEL_WIDTH_20: -+ rtw89_write8_clr(rtwdev, rf_mod, B_AX_WMAC_RFMOD_MASK); -+ rtw89_write32(rtwdev, sub_carr, 0); -+ break; -+ default: -+ break; -+ } -+ -+ if (chan->channel > 14) { -+ rtw89_write8_clr(rtwdev, chk_rate, B_AX_BAND_MODE); -+ rtw89_write8_set(rtwdev, chk_rate, -+ B_AX_CHECK_CCK_EN | B_AX_RTS_LIMIT_IN_OFDM6); -+ } else { -+ rtw89_write8_set(rtwdev, chk_rate, B_AX_BAND_MODE); -+ rtw89_write8_clr(rtwdev, chk_rate, -+ B_AX_CHECK_CCK_EN | B_AX_RTS_LIMIT_IN_OFDM6); -+ } -+} -+ -+static const u32 rtw8851b_sco_barker_threshold[14] = { -+ 0x1cfea, 0x1d0e1, 0x1d1d7, 0x1d2cd, 0x1d3c3, 0x1d4b9, 0x1d5b0, 0x1d6a6, -+ 0x1d79c, 0x1d892, 0x1d988, 0x1da7f, 0x1db75, 0x1ddc4 -+}; -+ -+static const u32 rtw8851b_sco_cck_threshold[14] = { -+ 0x27de3, 0x27f35, 0x28088, 0x281da, 0x2832d, 0x2847f, 0x285d2, 0x28724, -+ 0x28877, 0x289c9, 0x28b1c, 0x28c6e, 0x28dc1, 0x290ed -+}; -+ -+static void rtw8851b_ctrl_sco_cck(struct rtw89_dev *rtwdev, u8 primary_ch) -+{ -+ u8 ch_element = primary_ch - 1; -+ -+ rtw89_phy_write32_mask(rtwdev, R_RXSCOBC, B_RXSCOBC_TH, -+ rtw8851b_sco_barker_threshold[ch_element]); -+ rtw89_phy_write32_mask(rtwdev, R_RXSCOCCK, B_RXSCOCCK_TH, -+ rtw8851b_sco_cck_threshold[ch_element]); -+} -+ -+static u8 rtw8851b_sco_mapping(u8 central_ch) -+{ -+ if (central_ch == 1) -+ return 109; -+ else if (central_ch >= 2 && central_ch <= 6) -+ return 108; -+ else if (central_ch >= 7 && central_ch <= 10) -+ return 107; -+ else if (central_ch >= 11 && central_ch <= 14) -+ return 106; -+ else if (central_ch == 36 || central_ch == 38) -+ return 51; -+ else if (central_ch >= 40 && central_ch <= 58) -+ return 50; -+ else if (central_ch >= 60 && central_ch <= 64) -+ return 49; -+ else if (central_ch == 100 || central_ch == 102) -+ return 48; -+ else if (central_ch >= 104 && central_ch <= 126) -+ return 47; -+ else if (central_ch >= 128 && central_ch <= 151) -+ return 46; -+ else if (central_ch >= 153 && central_ch <= 177) -+ return 45; -+ else -+ return 0; -+} -+ -+struct rtw8851b_bb_gain { -+ u32 gain_g[BB_PATH_NUM_8851B]; -+ u32 gain_a[BB_PATH_NUM_8851B]; -+ u32 gain_mask; -+}; -+ -+static const struct rtw8851b_bb_gain bb_gain_lna[LNA_GAIN_NUM] = { -+ { .gain_g = {0x4678}, .gain_a = {0x45DC}, -+ .gain_mask = 0x00ff0000 }, -+ { .gain_g = {0x4678}, .gain_a = {0x45DC}, -+ .gain_mask = 0xff000000 }, -+ { .gain_g = {0x467C}, .gain_a = {0x4660}, -+ .gain_mask = 0x000000ff }, -+ { .gain_g = {0x467C}, .gain_a = {0x4660}, -+ .gain_mask = 0x0000ff00 }, -+ { .gain_g = {0x467C}, .gain_a = {0x4660}, -+ .gain_mask = 0x00ff0000 }, -+ { .gain_g = {0x467C}, .gain_a = {0x4660}, -+ .gain_mask = 0xff000000 }, -+ { .gain_g = {0x4680}, .gain_a = {0x4664}, -+ .gain_mask = 0x000000ff }, -+}; -+ -+static const struct rtw8851b_bb_gain bb_gain_tia[TIA_GAIN_NUM] = { -+ { .gain_g = {0x4680}, .gain_a = {0x4664}, -+ .gain_mask = 0x00ff0000 }, -+ { .gain_g = {0x4680}, .gain_a = {0x4664}, -+ .gain_mask = 0xff000000 }, -+}; -+ -+static void rtw8851b_set_gain_error(struct rtw89_dev *rtwdev, -+ enum rtw89_subband subband, -+ enum rtw89_rf_path path) -+{ -+ const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; -+ u8 gain_band = rtw89_subband_to_bb_gain_band(subband); -+ s32 val; -+ u32 reg; -+ u32 mask; -+ int i; -+ -+ for (i = 0; i < LNA_GAIN_NUM; i++) { -+ if (subband == RTW89_CH_2G) -+ reg = bb_gain_lna[i].gain_g[path]; -+ else -+ reg = bb_gain_lna[i].gain_a[path]; -+ -+ mask = bb_gain_lna[i].gain_mask; -+ val = gain->lna_gain[gain_band][path][i]; -+ rtw89_phy_write32_mask(rtwdev, reg, mask, val); -+ } -+ -+ for (i = 0; i < TIA_GAIN_NUM; i++) { -+ if (subband == RTW89_CH_2G) -+ reg = bb_gain_tia[i].gain_g[path]; -+ else -+ reg = bb_gain_tia[i].gain_a[path]; -+ -+ mask = bb_gain_tia[i].gain_mask; -+ val = gain->tia_gain[gain_band][path][i]; -+ rtw89_phy_write32_mask(rtwdev, reg, mask, val); -+ } -+} -+ -+static void rtw8851b_set_gain_offset(struct rtw89_dev *rtwdev, -+ enum rtw89_subband subband, -+ enum rtw89_phy_idx phy_idx) -+{ -+ static const u32 rssi_ofst_addr[] = {R_PATH0_G_TIA1_LNA6_OP1DB_V1}; -+ static const u32 gain_err_addr[] = {R_P0_AGC_RSVD}; -+ struct rtw89_phy_efuse_gain *efuse_gain = &rtwdev->efuse_gain; -+ enum rtw89_gain_offset gain_ofdm_band; -+ s32 offset_ofdm, offset_cck; -+ s32 offset_a; -+ s32 tmp; -+ u8 path; -+ -+ if (!efuse_gain->comp_valid) -+ goto next; -+ -+ for (path = RF_PATH_A; path < BB_PATH_NUM_8851B; path++) { -+ tmp = efuse_gain->comp[path][subband]; -+ tmp = clamp_t(s32, tmp << 2, S8_MIN, S8_MAX); -+ rtw89_phy_write32_mask(rtwdev, gain_err_addr[path], MASKBYTE0, tmp); -+ } -+ -+next: -+ if (!efuse_gain->offset_valid) -+ return; -+ -+ gain_ofdm_band = rtw89_subband_to_gain_offset_band_of_ofdm(subband); -+ -+ offset_a = -efuse_gain->offset[RF_PATH_A][gain_ofdm_band]; -+ -+ tmp = -((offset_a << 2) + (efuse_gain->offset_base[RTW89_PHY_0] >> 2)); -+ tmp = clamp_t(s32, tmp, S8_MIN, S8_MAX); -+ rtw89_phy_write32_mask(rtwdev, rssi_ofst_addr[RF_PATH_A], B_PATH0_R_G_OFST_MASK, tmp); -+ -+ offset_ofdm = -efuse_gain->offset[RF_PATH_A][gain_ofdm_band]; -+ offset_cck = -efuse_gain->offset[RF_PATH_A][0]; -+ -+ tmp = (offset_ofdm << 4) + efuse_gain->offset_base[RTW89_PHY_0]; -+ tmp = clamp_t(s32, tmp, S8_MIN, S8_MAX); -+ rtw89_phy_write32_idx(rtwdev, R_P0_RPL1, B_P0_RPL1_BIAS_MASK, tmp, phy_idx); -+ -+ tmp = (offset_ofdm << 4) + efuse_gain->rssi_base[RTW89_PHY_0]; -+ tmp = clamp_t(s32, tmp, S8_MIN, S8_MAX); -+ rtw89_phy_write32_idx(rtwdev, R_P1_RPL1, B_P0_RPL1_BIAS_MASK, tmp, phy_idx); -+ -+ if (subband == RTW89_CH_2G) { -+ tmp = (offset_cck << 3) + (efuse_gain->offset_base[RTW89_PHY_0] >> 1); -+ tmp = clamp_t(s32, tmp, S8_MIN >> 1, S8_MAX >> 1); -+ rtw89_phy_write32_mask(rtwdev, R_RX_RPL_OFST, -+ B_RX_RPL_OFST_CCK_MASK, tmp); -+ } -+} -+ -+static -+void rtw8851b_set_rxsc_rpl_comp(struct rtw89_dev *rtwdev, enum rtw89_subband subband) -+{ -+ const struct rtw89_phy_bb_gain_info *gain = &rtwdev->bb_gain; -+ u8 band = rtw89_subband_to_bb_gain_band(subband); -+ u32 val; -+ -+ val = u32_encode_bits(gain->rpl_ofst_20[band][RF_PATH_A], B_P0_RPL1_20_MASK) | -+ u32_encode_bits(gain->rpl_ofst_40[band][RF_PATH_A][0], B_P0_RPL1_40_MASK) | -+ u32_encode_bits(gain->rpl_ofst_40[band][RF_PATH_A][1], B_P0_RPL1_41_MASK); -+ val >>= B_P0_RPL1_SHIFT; -+ rtw89_phy_write32_mask(rtwdev, R_P0_RPL1, B_P0_RPL1_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, R_P1_RPL1, B_P0_RPL1_MASK, val); -+ -+ val = u32_encode_bits(gain->rpl_ofst_40[band][RF_PATH_A][2], B_P0_RTL2_42_MASK) | -+ u32_encode_bits(gain->rpl_ofst_80[band][RF_PATH_A][0], B_P0_RTL2_80_MASK) | -+ u32_encode_bits(gain->rpl_ofst_80[band][RF_PATH_A][1], B_P0_RTL2_81_MASK) | -+ u32_encode_bits(gain->rpl_ofst_80[band][RF_PATH_A][10], B_P0_RTL2_8A_MASK); -+ rtw89_phy_write32(rtwdev, R_P0_RPL2, val); -+ rtw89_phy_write32(rtwdev, R_P1_RPL2, val); -+ -+ val = u32_encode_bits(gain->rpl_ofst_80[band][RF_PATH_A][2], B_P0_RTL3_82_MASK) | -+ u32_encode_bits(gain->rpl_ofst_80[band][RF_PATH_A][3], B_P0_RTL3_83_MASK) | -+ u32_encode_bits(gain->rpl_ofst_80[band][RF_PATH_A][4], B_P0_RTL3_84_MASK) | -+ u32_encode_bits(gain->rpl_ofst_80[band][RF_PATH_A][9], B_P0_RTL3_89_MASK); -+ rtw89_phy_write32(rtwdev, R_P0_RPL3, val); -+ rtw89_phy_write32(rtwdev, R_P1_RPL3, val); -+} -+ -+static void rtw8851b_ctrl_ch(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ u8 subband = chan->subband_type; -+ u8 central_ch = chan->channel; -+ bool is_2g = central_ch <= 14; -+ u8 sco_comp; -+ -+ if (is_2g) -+ rtw89_phy_write32_idx(rtwdev, R_PATH0_BAND_SEL_V1, -+ B_PATH0_BAND_SEL_MSK_V1, 1, phy_idx); -+ else -+ rtw89_phy_write32_idx(rtwdev, R_PATH0_BAND_SEL_V1, -+ B_PATH0_BAND_SEL_MSK_V1, 0, phy_idx); -+ /* SCO compensate FC setting */ -+ sco_comp = rtw8851b_sco_mapping(central_ch); -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_INV, sco_comp, phy_idx); -+ -+ if (chan->band_type == RTW89_BAND_6G) -+ return; -+ -+ /* CCK parameters */ -+ if (central_ch == 14) { -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR0, B_TXFIR_C01, 0x3b13ff); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR2, B_TXFIR_C23, 0x1c42de); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR4, B_TXFIR_C45, 0xfdb0ad); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR6, B_TXFIR_C67, 0xf60f6e); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR8, B_TXFIR_C89, 0xfd8f92); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRA, B_TXFIR_CAB, 0x2d011); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRC, B_TXFIR_CCD, 0x1c02c); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRE, B_TXFIR_CEF, 0xfff00a); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR0, B_TXFIR_C01, 0x3d23ff); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR2, B_TXFIR_C23, 0x29b354); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR4, B_TXFIR_C45, 0xfc1c8); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR6, B_TXFIR_C67, 0xfdb053); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIR8, B_TXFIR_C89, 0xf86f9a); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRA, B_TXFIR_CAB, 0xfaef92); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRC, B_TXFIR_CCD, 0xfe5fcc); -+ rtw89_phy_write32_mask(rtwdev, R_TXFIRE, B_TXFIR_CEF, 0xffdff5); -+ } -+ -+ rtw8851b_set_gain_error(rtwdev, subband, RF_PATH_A); -+ rtw8851b_set_gain_offset(rtwdev, subband, phy_idx); -+ rtw8851b_set_rxsc_rpl_comp(rtwdev, subband); -+} -+ -+static void rtw8851b_bw_setting(struct rtw89_dev *rtwdev, u8 bw) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0, B_P0_CFCH_CTL, 0x8); -+ rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0, B_P0_CFCH_EN, 0x2); -+ rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW0, B_P0_CFCH_BW0, 0x2); -+ rtw89_phy_write32_mask(rtwdev, R_P0_CFCH_BW1, B_P0_CFCH_BW1, 0x4); -+ rtw89_phy_write32_mask(rtwdev, R_DRCK, B_DRCK_MUL, 0xf); -+ rtw89_phy_write32_mask(rtwdev, R_ADCMOD, B_ADCMOD_LP, 0xa); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RXCK, B_P0_RXCK_ADJ, 0x92); -+ -+ switch (bw) { -+ case RTW89_CHANNEL_WIDTH_5: -+ rtw89_phy_write32_mask(rtwdev, R_DCIM, B_DCIM_FR, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_WDADC, B_WDADC_SEL, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0D, B_ADDCK_DS, 0x1); -+ break; -+ case RTW89_CHANNEL_WIDTH_10: -+ rtw89_phy_write32_mask(rtwdev, R_DCIM, B_DCIM_FR, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_WDADC, B_WDADC_SEL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0D, B_ADDCK_DS, 0x0); -+ break; -+ case RTW89_CHANNEL_WIDTH_20: -+ rtw89_phy_write32_mask(rtwdev, R_DCIM, B_DCIM_FR, 0x2); -+ rtw89_phy_write32_mask(rtwdev, R_WDADC, B_WDADC_SEL, 0x2); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0D, B_ADDCK_DS, 0x0); -+ break; -+ case RTW89_CHANNEL_WIDTH_40: -+ rtw89_phy_write32_mask(rtwdev, R_DCIM, B_DCIM_FR, 0x2); -+ rtw89_phy_write32_mask(rtwdev, R_WDADC, B_WDADC_SEL, 0x2); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0D, B_ADDCK_DS, 0x0); -+ break; -+ case RTW89_CHANNEL_WIDTH_80: -+ rtw89_phy_write32_mask(rtwdev, R_DCIM, B_DCIM_FR, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_WDADC, B_WDADC_SEL, 0x2); -+ rtw89_phy_write32_mask(rtwdev, R_ADDCK0D, B_ADDCK_DS, 0x0); -+ break; -+ default: -+ rtw89_warn(rtwdev, "Fail to set ADC\n"); -+ } -+} -+ -+static void rtw8851b_ctrl_bw(struct rtw89_dev *rtwdev, u8 pri_ch, u8 bw, -+ enum rtw89_phy_idx phy_idx) -+{ -+ switch (bw) { -+ case RTW89_CHANNEL_WIDTH_5: -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x1, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, 0x0, phy_idx); -+ break; -+ case RTW89_CHANNEL_WIDTH_10: -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x2, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, 0x0, phy_idx); -+ break; -+ case RTW89_CHANNEL_WIDTH_20: -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, 0x0, phy_idx); -+ break; -+ case RTW89_CHANNEL_WIDTH_40: -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x1, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, -+ pri_ch, phy_idx); -+ /* CCK primary channel */ -+ if (pri_ch == RTW89_SC_20_UPPER) -+ rtw89_phy_write32_mask(rtwdev, R_RXSC, B_RXSC_EN, 1); -+ else -+ rtw89_phy_write32_mask(rtwdev, R_RXSC, B_RXSC_EN, 0); -+ -+ break; -+ case RTW89_CHANNEL_WIDTH_80: -+ rtw89_phy_write32_idx(rtwdev, R_FC0_BW_V1, B_FC0_BW_SET, 0x2, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_SBW, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_CHBW_MOD_V1, B_CHBW_MOD_PRICH, -+ pri_ch, phy_idx); -+ break; -+ default: -+ rtw89_warn(rtwdev, "Fail to switch bw (bw:%d, pri ch:%d)\n", bw, -+ pri_ch); -+ } -+ -+ rtw8851b_bw_setting(rtwdev, bw); -+} -+ -+static void rtw8851b_ctrl_cck_en(struct rtw89_dev *rtwdev, bool cck_en) -+{ -+ if (cck_en) { -+ rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 0); -+ rtw89_phy_write32_mask(rtwdev, R_PD_ARBITER_OFF, -+ B_PD_ARBITER_OFF, 0); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_ENABLE_CCK, 1); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 1); -+ rtw89_phy_write32_mask(rtwdev, R_PD_ARBITER_OFF, -+ B_PD_ARBITER_OFF, 1); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK_ADC, B_ENABLE_CCK, 0); -+ } -+} -+ -+static u32 rtw8851b_spur_freq(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan) -+{ -+ u8 center_chan = chan->channel; -+ -+ switch (chan->band_type) { -+ case RTW89_BAND_5G: -+ if (center_chan == 151 || center_chan == 153 || -+ center_chan == 155 || center_chan == 163) -+ return 5760; -+ else if (center_chan == 54 || center_chan == 58) -+ return 5280; -+ break; -+ default: -+ break; -+ } -+ -+ return 0; -+} -+ -+#define CARRIER_SPACING_312_5 312500 /* 312.5 kHz */ -+#define CARRIER_SPACING_78_125 78125 /* 78.125 kHz */ -+#define MAX_TONE_NUM 2048 -+ -+static void rtw8851b_set_csi_tone_idx(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ u32 spur_freq; -+ s32 freq_diff, csi_idx, csi_tone_idx; -+ -+ spur_freq = rtw8851b_spur_freq(rtwdev, chan); -+ if (spur_freq == 0) { -+ rtw89_phy_write32_idx(rtwdev, R_SEG0CSI_EN_V1, B_SEG0CSI_EN, -+ 0, phy_idx); -+ return; -+ } -+ -+ freq_diff = (spur_freq - chan->freq) * 1000000; -+ csi_idx = s32_div_u32_round_closest(freq_diff, CARRIER_SPACING_78_125); -+ s32_div_u32_round_down(csi_idx, MAX_TONE_NUM, &csi_tone_idx); -+ -+ rtw89_phy_write32_idx(rtwdev, R_SEG0CSI_V1, B_SEG0CSI_IDX, -+ csi_tone_idx, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_SEG0CSI_EN_V1, B_SEG0CSI_EN, 1, phy_idx); -+} -+ -+static const struct rtw89_nbi_reg_def rtw8851b_nbi_reg_def = { -+ .notch1_idx = {0x46E4, 0xFF}, -+ .notch1_frac_idx = {0x46E4, 0xC00}, -+ .notch1_en = {0x46E4, 0x1000}, -+ .notch2_idx = {0x47A4, 0xFF}, -+ .notch2_frac_idx = {0x47A4, 0xC00}, -+ .notch2_en = {0x47A4, 0x1000}, -+}; -+ -+static void rtw8851b_set_nbi_tone_idx(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan) -+{ -+ const struct rtw89_nbi_reg_def *nbi = &rtw8851b_nbi_reg_def; -+ s32 nbi_frac_idx, nbi_frac_tone_idx; -+ s32 nbi_idx, nbi_tone_idx; -+ bool notch2_chk = false; -+ u32 spur_freq, fc; -+ s32 freq_diff; -+ -+ spur_freq = rtw8851b_spur_freq(rtwdev, chan); -+ if (spur_freq == 0) { -+ rtw89_phy_write32_mask(rtwdev, nbi->notch1_en.addr, -+ nbi->notch1_en.mask, 0); -+ rtw89_phy_write32_mask(rtwdev, nbi->notch2_en.addr, -+ nbi->notch2_en.mask, 0); -+ return; -+ } -+ -+ fc = chan->freq; -+ if (chan->band_width == RTW89_CHANNEL_WIDTH_160) { -+ fc = (spur_freq > fc) ? fc + 40 : fc - 40; -+ if ((fc > spur_freq && -+ chan->channel < chan->primary_channel) || -+ (fc < spur_freq && -+ chan->channel > chan->primary_channel)) -+ notch2_chk = true; -+ } -+ -+ freq_diff = (spur_freq - fc) * 1000000; -+ nbi_idx = s32_div_u32_round_down(freq_diff, CARRIER_SPACING_312_5, -+ &nbi_frac_idx); -+ -+ if (chan->band_width == RTW89_CHANNEL_WIDTH_20) { -+ s32_div_u32_round_down(nbi_idx + 32, 64, &nbi_tone_idx); -+ } else { -+ u16 tone_para = (chan->band_width == RTW89_CHANNEL_WIDTH_40) ? -+ 128 : 256; -+ -+ s32_div_u32_round_down(nbi_idx, tone_para, &nbi_tone_idx); -+ } -+ nbi_frac_tone_idx = s32_div_u32_round_closest(nbi_frac_idx, -+ CARRIER_SPACING_78_125); -+ -+ if (chan->band_width == RTW89_CHANNEL_WIDTH_160 && notch2_chk) { -+ rtw89_phy_write32_mask(rtwdev, nbi->notch2_idx.addr, -+ nbi->notch2_idx.mask, nbi_tone_idx); -+ rtw89_phy_write32_mask(rtwdev, nbi->notch2_frac_idx.addr, -+ nbi->notch2_frac_idx.mask, nbi_frac_tone_idx); -+ rtw89_phy_write32_mask(rtwdev, nbi->notch2_en.addr, -+ nbi->notch2_en.mask, 0); -+ rtw89_phy_write32_mask(rtwdev, nbi->notch2_en.addr, -+ nbi->notch2_en.mask, 1); -+ rtw89_phy_write32_mask(rtwdev, nbi->notch1_en.addr, -+ nbi->notch1_en.mask, 0); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, nbi->notch1_idx.addr, -+ nbi->notch1_idx.mask, nbi_tone_idx); -+ rtw89_phy_write32_mask(rtwdev, nbi->notch1_frac_idx.addr, -+ nbi->notch1_frac_idx.mask, nbi_frac_tone_idx); -+ rtw89_phy_write32_mask(rtwdev, nbi->notch1_en.addr, -+ nbi->notch1_en.mask, 0); -+ rtw89_phy_write32_mask(rtwdev, nbi->notch1_en.addr, -+ nbi->notch1_en.mask, 1); -+ rtw89_phy_write32_mask(rtwdev, nbi->notch2_en.addr, -+ nbi->notch2_en.mask, 0); -+ } -+} -+ -+static void rtw8851b_set_cfr(struct rtw89_dev *rtwdev, const struct rtw89_chan *chan) -+{ -+ if (chan->band_type == RTW89_BAND_2G && -+ chan->band_width == RTW89_CHANNEL_WIDTH_20 && -+ (chan->channel == 1 || chan->channel == 13)) { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_TX_CFR, -+ B_PATH0_TX_CFR_LGC0, 0xf8); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_TX_CFR, -+ B_PATH0_TX_CFR_LGC1, 0x120); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_TX_POLAR_CLIPPING, -+ B_PATH0_TX_POLAR_CLIPPING_LGC0, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_TX_POLAR_CLIPPING, -+ B_PATH0_TX_POLAR_CLIPPING_LGC1, 0x3); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_TX_CFR, -+ B_PATH0_TX_CFR_LGC0, 0x120); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_TX_CFR, -+ B_PATH0_TX_CFR_LGC1, 0x3ff); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_TX_POLAR_CLIPPING, -+ B_PATH0_TX_POLAR_CLIPPING_LGC0, 0x3); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_TX_POLAR_CLIPPING, -+ B_PATH0_TX_POLAR_CLIPPING_LGC1, 0x7); -+ } -+} -+ -+static void rtw8851b_5m_mask(struct rtw89_dev *rtwdev, const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ u8 pri_ch = chan->pri_ch_idx; -+ bool mask_5m_low; -+ bool mask_5m_en; -+ -+ switch (chan->band_width) { -+ case RTW89_CHANNEL_WIDTH_40: -+ /* Prich=1: Mask 5M High, Prich=2: Mask 5M Low */ -+ mask_5m_en = true; -+ mask_5m_low = pri_ch == RTW89_SC_20_LOWER; -+ break; -+ case RTW89_CHANNEL_WIDTH_80: -+ /* Prich=3: Mask 5M High, Prich=4: Mask 5M Low, Else: Disable */ -+ mask_5m_en = pri_ch == RTW89_SC_20_UPMOST || -+ pri_ch == RTW89_SC_20_LOWEST; -+ mask_5m_low = pri_ch == RTW89_SC_20_LOWEST; -+ break; -+ default: -+ mask_5m_en = false; -+ break; -+ } -+ -+ if (!mask_5m_en) { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_EN, 0x0); -+ rtw89_phy_write32_idx(rtwdev, R_ASSIGN_SBD_OPT_V1, -+ B_ASSIGN_SBD_OPT_EN_V1, 0x0, phy_idx); -+ return; -+ } -+ -+ if (mask_5m_low) { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_TH, 0x5); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_SB2, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_SB0, 0x1); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_TH, 0x5); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_SB2, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_5MDET_V1, B_PATH0_5MDET_SB0, 0x0); -+ } -+ rtw89_phy_write32_idx(rtwdev, R_ASSIGN_SBD_OPT_V1, -+ B_ASSIGN_SBD_OPT_EN_V1, 0x1, phy_idx); -+} -+ - static void rtw8851b_bb_reset_all(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) - { - rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, B_S0_HW_SI_DIS_W_R_TRIG, 0x7, phy_idx); -@@ -368,6 +956,26 @@ static void rtw8851b_bb_reset_all(struct - rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, phy_idx); - } - -+static void rtw8851b_bb_reset_en(struct rtw89_dev *rtwdev, enum rtw89_band band, -+ enum rtw89_phy_idx phy_idx, bool en) -+{ -+ if (en) { -+ rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, -+ B_S0_HW_SI_DIS_W_R_TRIG, 0x0, phy_idx); -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 1, phy_idx); -+ if (band == RTW89_BAND_2G) -+ rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 0x0); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_RXCCA, B_RXCCA_DIS, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PD_CTRL, B_PD_HIT_DIS, 0x1); -+ rtw89_phy_write32_idx(rtwdev, R_S0_HW_SI_DIS, -+ B_S0_HW_SI_DIS_W_R_TRIG, 0x7, phy_idx); -+ fsleep(1); -+ rtw89_phy_write32_idx(rtwdev, R_RSTB_ASYNC, B_RSTB_ASYNC_ALL, 0, phy_idx); -+ } -+} -+ - static void rtw8851b_bb_reset(struct rtw89_dev *rtwdev, - enum rtw89_phy_idx phy_idx) - { -@@ -448,6 +1056,99 @@ static void rtw8851b_bb_sethw(struct rtw - rtw89_phy_read32_mask(rtwdev, R_P1_RPL1, B_P0_RPL1_BIAS_MASK); - } - -+static void rtw8851b_set_channel_bb(struct rtw89_dev *rtwdev, const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ u8 band = chan->band_type, chan_idx; -+ bool cck_en = chan->channel <= 14; -+ u8 pri_ch_idx = chan->pri_ch_idx; -+ -+ if (cck_en) -+ rtw8851b_ctrl_sco_cck(rtwdev, chan->primary_channel); -+ -+ rtw8851b_ctrl_ch(rtwdev, chan, phy_idx); -+ rtw8851b_ctrl_bw(rtwdev, pri_ch_idx, chan->band_width, phy_idx); -+ rtw8851b_ctrl_cck_en(rtwdev, cck_en); -+ rtw8851b_set_nbi_tone_idx(rtwdev, chan); -+ rtw8851b_set_csi_tone_idx(rtwdev, chan, phy_idx); -+ -+ if (chan->band_type == RTW89_BAND_5G) { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_BT_SHARE_V1, -+ B_PATH0_BT_SHARE_V1, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_BTG_PATH_V1, -+ B_PATH0_BTG_PATH_V1, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD_V1, B_BT_SHARE, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_BT_SEG0, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_BT_DYN_DC_EST_EN_V1, -+ B_BT_DYN_DC_EST_EN_MSK, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_GNT_BT_WGT_EN, B_GNT_BT_WGT_EN, 0x0); -+ } -+ -+ chan_idx = rtw89_encode_chan_idx(rtwdev, chan->primary_channel, band); -+ rtw89_phy_write32_mask(rtwdev, R_MAC_PIN_SEL, B_CH_IDX_SEG0, chan_idx); -+ rtw8851b_5m_mask(rtwdev, chan, phy_idx); -+ rtw8851b_set_cfr(rtwdev, chan); -+ rtw8851b_bb_reset_all(rtwdev, phy_idx); -+} -+ -+static void rtw8851b_set_channel(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_mac_idx mac_idx, -+ enum rtw89_phy_idx phy_idx) -+{ -+ rtw8851b_set_channel_mac(rtwdev, chan, mac_idx); -+ rtw8851b_set_channel_bb(rtwdev, chan, phy_idx); -+ rtw8851b_set_channel_rf(rtwdev, chan, phy_idx); -+} -+ -+static void rtw8851b_tssi_cont_en(struct rtw89_dev *rtwdev, bool en, -+ enum rtw89_rf_path path) -+{ -+ if (en) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, B_P0_TXPW_RSTB_MANON, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN, 0x0); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, B_P0_TXPW_RSTB_MANON, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_TRK_EN, 0x1); -+ } -+} -+ -+static void rtw8851b_tssi_cont_en_phyidx(struct rtw89_dev *rtwdev, bool en, -+ u8 phy_idx) -+{ -+ rtw8851b_tssi_cont_en(rtwdev, en, RF_PATH_A); -+} -+ -+static void rtw8851b_adc_en(struct rtw89_dev *rtwdev, bool en) -+{ -+ if (en) -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, 0x0); -+ else -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RST, 0xf); -+} -+ -+static void rtw8851b_set_channel_help(struct rtw89_dev *rtwdev, bool enter, -+ struct rtw89_channel_help_params *p, -+ const struct rtw89_chan *chan, -+ enum rtw89_mac_idx mac_idx, -+ enum rtw89_phy_idx phy_idx) -+{ -+ if (enter) { -+ rtw89_chip_stop_sch_tx(rtwdev, RTW89_MAC_0, &p->tx_en, RTW89_SCH_TX_SEL_ALL); -+ rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, false); -+ rtw8851b_tssi_cont_en_phyidx(rtwdev, false, RTW89_PHY_0); -+ rtw8851b_adc_en(rtwdev, false); -+ fsleep(40); -+ rtw8851b_bb_reset_en(rtwdev, chan->band_type, phy_idx, false); -+ } else { -+ rtw89_mac_cfg_ppdu_status(rtwdev, RTW89_MAC_0, true); -+ rtw8851b_adc_en(rtwdev, true); -+ rtw8851b_tssi_cont_en_phyidx(rtwdev, true, RTW89_PHY_0); -+ rtw8851b_bb_reset_en(rtwdev, chan->band_type, phy_idx, true); -+ rtw89_chip_resume_sch_tx(rtwdev, RTW89_MAC_0, p->tx_en); -+ } -+} -+ - static void rtw8851b_btc_set_rfe(struct rtw89_dev *rtwdev) - { - struct rtw89_btc *btc = &rtwdev->btc; -@@ -798,6 +1499,8 @@ static const struct rtw89_chip_ops rtw88 - .bb_sethw = rtw8851b_bb_sethw, - .read_rf = rtw89_phy_read_rf_v1, - .write_rf = rtw89_phy_write_rf_v1, -+ .set_channel = rtw8851b_set_channel, -+ .set_channel_help = rtw8851b_set_channel_help, - .fem_setup = NULL, - .rfe_gpio = rtw8851b_rfe_gpio, - .pwr_on_func = rtw8851b_pwr_on_func, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-099-wifi-rtw89-8851b-add-to-parse-efuse-content.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-099-wifi-rtw89-8851b-add-to-parse-efuse-content.patch deleted file mode 100644 index 309f0d263..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-099-wifi-rtw89-8851b-add-to-parse-efuse-content.patch +++ /dev/null @@ -1,311 +0,0 @@ -From f4244d7fbc9163a44272c0a9d86fd0784d28f386 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 12 May 2023 14:12:20 +0800 -Subject: [PATCH 099/136] wifi: rtw89: 8851b: add to parse efuse content - -Parse efuse content to recognize MAC address, RFE type, XTAL offset and -so on. And, parse offset of PHY capability to retrieve TX power -calibration data. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230512061220.16544-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 208 ++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/rtw8851b.h | 61 +++++ - 2 files changed, 269 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -296,6 +296,212 @@ static int rtw8851b_pwr_off_func(struct - return 0; - } - -+static void rtw8851b_efuse_parsing(struct rtw89_efuse *efuse, -+ struct rtw8851b_efuse *map) -+{ -+ ether_addr_copy(efuse->addr, map->e.mac_addr); -+ efuse->rfe_type = map->rfe_type; -+ efuse->xtal_cap = map->xtal_k; -+} -+ -+static void rtw8851b_efuse_parsing_tssi(struct rtw89_dev *rtwdev, -+ struct rtw8851b_efuse *map) -+{ -+ struct rtw89_tssi_info *tssi = &rtwdev->tssi; -+ struct rtw8851b_tssi_offset *ofst[] = {&map->path_a_tssi}; -+ u8 i, j; -+ -+ tssi->thermal[RF_PATH_A] = map->path_a_therm; -+ -+ for (i = 0; i < RF_PATH_NUM_8851B; i++) { -+ memcpy(tssi->tssi_cck[i], ofst[i]->cck_tssi, -+ sizeof(ofst[i]->cck_tssi)); -+ -+ for (j = 0; j < TSSI_CCK_CH_GROUP_NUM; j++) -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][EFUSE] path=%d cck[%d]=0x%x\n", -+ i, j, tssi->tssi_cck[i][j]); -+ -+ memcpy(tssi->tssi_mcs[i], ofst[i]->bw40_tssi, -+ sizeof(ofst[i]->bw40_tssi)); -+ memcpy(tssi->tssi_mcs[i] + TSSI_MCS_2G_CH_GROUP_NUM, -+ ofst[i]->bw40_1s_tssi_5g, sizeof(ofst[i]->bw40_1s_tssi_5g)); -+ -+ for (j = 0; j < TSSI_MCS_CH_GROUP_NUM; j++) -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][EFUSE] path=%d mcs[%d]=0x%x\n", -+ i, j, tssi->tssi_mcs[i][j]); -+ } -+} -+ -+static bool _decode_efuse_gain(u8 data, s8 *high, s8 *low) -+{ -+ if (high) -+ *high = sign_extend32(u8_get_bits(data, GENMASK(7, 4)), 3); -+ if (low) -+ *low = sign_extend32(u8_get_bits(data, GENMASK(3, 0)), 3); -+ -+ return data != 0xff; -+} -+ -+static void rtw8851b_efuse_parsing_gain_offset(struct rtw89_dev *rtwdev, -+ struct rtw8851b_efuse *map) -+{ -+ struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; -+ bool valid = false; -+ -+ valid |= _decode_efuse_gain(map->rx_gain_2g_cck, -+ &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_CCK], -+ NULL); -+ valid |= _decode_efuse_gain(map->rx_gain_2g_ofdm, -+ &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_2G_OFDM], -+ NULL); -+ valid |= _decode_efuse_gain(map->rx_gain_5g_low, -+ &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_LOW], -+ NULL); -+ valid |= _decode_efuse_gain(map->rx_gain_5g_mid, -+ &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_MID], -+ NULL); -+ valid |= _decode_efuse_gain(map->rx_gain_5g_high, -+ &gain->offset[RF_PATH_A][RTW89_GAIN_OFFSET_5G_HIGH], -+ NULL); -+ -+ gain->offset_valid = valid; -+} -+ -+static int rtw8851b_read_efuse(struct rtw89_dev *rtwdev, u8 *log_map) -+{ -+ struct rtw89_efuse *efuse = &rtwdev->efuse; -+ struct rtw8851b_efuse *map; -+ -+ map = (struct rtw8851b_efuse *)log_map; -+ -+ efuse->country_code[0] = map->country_code[0]; -+ efuse->country_code[1] = map->country_code[1]; -+ rtw8851b_efuse_parsing_tssi(rtwdev, map); -+ rtw8851b_efuse_parsing_gain_offset(rtwdev, map); -+ -+ switch (rtwdev->hci.type) { -+ case RTW89_HCI_TYPE_PCIE: -+ rtw8851b_efuse_parsing(efuse, map); -+ break; -+ default: -+ return -EOPNOTSUPP; -+ } -+ -+ rtw89_info(rtwdev, "chip rfe_type is %d\n", efuse->rfe_type); -+ -+ return 0; -+} -+ -+static void rtw8851b_phycap_parsing_tssi(struct rtw89_dev *rtwdev, u8 *phycap_map) -+{ -+ struct rtw89_tssi_info *tssi = &rtwdev->tssi; -+ static const u32 tssi_trim_addr[RF_PATH_NUM_8851B] = {0x5D6}; -+ u32 addr = rtwdev->chip->phycap_addr; -+ bool pg = false; -+ u32 ofst; -+ u8 i, j; -+ -+ for (i = 0; i < RF_PATH_NUM_8851B; i++) { -+ for (j = 0; j < TSSI_TRIM_CH_GROUP_NUM; j++) { -+ /* addrs are in decreasing order */ -+ ofst = tssi_trim_addr[i] - addr - j; -+ tssi->tssi_trim[i][j] = phycap_map[ofst]; -+ -+ if (phycap_map[ofst] != 0xff) -+ pg = true; -+ } -+ } -+ -+ if (!pg) { -+ memset(tssi->tssi_trim, 0, sizeof(tssi->tssi_trim)); -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM] no PG, set all trim info to 0\n"); -+ } -+ -+ for (i = 0; i < RF_PATH_NUM_8851B; i++) -+ for (j = 0; j < TSSI_TRIM_CH_GROUP_NUM; j++) -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] path=%d idx=%d trim=0x%x addr=0x%x\n", -+ i, j, tssi->tssi_trim[i][j], -+ tssi_trim_addr[i] - j); -+} -+ -+static void rtw8851b_phycap_parsing_thermal_trim(struct rtw89_dev *rtwdev, -+ u8 *phycap_map) -+{ -+ struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; -+ static const u32 thm_trim_addr[RF_PATH_NUM_8851B] = {0x5DF}; -+ u32 addr = rtwdev->chip->phycap_addr; -+ u8 i; -+ -+ for (i = 0; i < RF_PATH_NUM_8851B; i++) { -+ info->thermal_trim[i] = phycap_map[thm_trim_addr[i] - addr]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[THERMAL][TRIM] path=%d thermal_trim=0x%x\n", -+ i, info->thermal_trim[i]); -+ -+ if (info->thermal_trim[i] != 0xff) -+ info->pg_thermal_trim = true; -+ } -+} -+ -+static void rtw8851b_phycap_parsing_pa_bias_trim(struct rtw89_dev *rtwdev, -+ u8 *phycap_map) -+{ -+ struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; -+ static const u32 pabias_trim_addr[] = {0x5DE}; -+ u32 addr = rtwdev->chip->phycap_addr; -+ u8 i; -+ -+ for (i = 0; i < RF_PATH_NUM_8851B; i++) { -+ info->pa_bias_trim[i] = phycap_map[pabias_trim_addr[i] - addr]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[PA_BIAS][TRIM] path=%d pa_bias_trim=0x%x\n", -+ i, info->pa_bias_trim[i]); -+ -+ if (info->pa_bias_trim[i] != 0xff) -+ info->pg_pa_bias_trim = true; -+ } -+} -+ -+static void rtw8851b_phycap_parsing_gain_comp(struct rtw89_dev *rtwdev, u8 *phycap_map) -+{ -+ static const u32 comp_addrs[][RTW89_SUBBAND_2GHZ_5GHZ_NR] = { -+ {0x5BB, 0x5BA, 0, 0x5B9, 0x5B8}, -+ }; -+ struct rtw89_phy_efuse_gain *gain = &rtwdev->efuse_gain; -+ u32 phycap_addr = rtwdev->chip->phycap_addr; -+ bool valid = false; -+ int path, i; -+ u8 data; -+ -+ for (path = 0; path < BB_PATH_NUM_8851B; path++) -+ for (i = 0; i < RTW89_SUBBAND_2GHZ_5GHZ_NR; i++) { -+ if (comp_addrs[path][i] == 0) -+ continue; -+ -+ data = phycap_map[comp_addrs[path][i] - phycap_addr]; -+ valid |= _decode_efuse_gain(data, NULL, -+ &gain->comp[path][i]); -+ } -+ -+ gain->comp_valid = valid; -+} -+ -+static int rtw8851b_read_phycap(struct rtw89_dev *rtwdev, u8 *phycap_map) -+{ -+ rtw8851b_phycap_parsing_tssi(rtwdev, phycap_map); -+ rtw8851b_phycap_parsing_thermal_trim(rtwdev, phycap_map); -+ rtw8851b_phycap_parsing_pa_bias_trim(rtwdev, phycap_map); -+ rtw8851b_phycap_parsing_gain_comp(rtwdev, phycap_map); -+ -+ return 0; -+} -+ - static void rtw8851b_set_bb_gpio(struct rtw89_dev *rtwdev, u8 gpio_idx, bool inv, - u8 src_sel) - { -@@ -1501,6 +1707,8 @@ static const struct rtw89_chip_ops rtw88 - .write_rf = rtw89_phy_write_rf_v1, - .set_channel = rtw8851b_set_channel, - .set_channel_help = rtw8851b_set_channel_help, -+ .read_efuse = rtw8851b_read_efuse, -+ .read_phycap = rtw8851b_read_phycap, - .fem_setup = NULL, - .rfe_gpio = rtw8851b_rfe_gpio, - .pwr_on_func = rtw8851b_pwr_on_func, ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.h -@@ -10,6 +10,67 @@ - #define RF_PATH_NUM_8851B 1 - #define BB_PATH_NUM_8851B 1 - -+struct rtw8851bu_efuse { -+ u8 rsvd[0x88]; -+ u8 mac_addr[ETH_ALEN]; -+}; -+ -+struct rtw8851be_efuse { -+ u8 mac_addr[ETH_ALEN]; -+}; -+ -+struct rtw8851b_tssi_offset { -+ u8 cck_tssi[TSSI_CCK_CH_GROUP_NUM]; -+ u8 bw40_tssi[TSSI_MCS_2G_CH_GROUP_NUM]; -+ u8 rsvd[7]; -+ u8 bw40_1s_tssi_5g[TSSI_MCS_5G_CH_GROUP_NUM]; -+} __packed; -+ -+struct rtw8851b_efuse { -+ u8 rsvd[0x210]; -+ struct rtw8851b_tssi_offset path_a_tssi; -+ u8 rsvd1[136]; -+ u8 channel_plan; -+ u8 xtal_k; -+ u8 rsvd2; -+ u8 iqk_lck; -+ u8 rsvd3[8]; -+ u8 eeprom_version; -+ u8 customer_id; -+ u8 tx_bb_swing_2g; -+ u8 tx_bb_swing_5g; -+ u8 tx_cali_pwr_trk_mode; -+ u8 trx_path_selection; -+ u8 rfe_type; -+ u8 country_code[2]; -+ u8 rsvd4[3]; -+ u8 path_a_therm; -+ u8 rsvd5[3]; -+ u8 rx_gain_2g_ofdm; -+ u8 rsvd6; -+ u8 rx_gain_2g_cck; -+ u8 rsvd7; -+ u8 rx_gain_5g_low; -+ u8 rsvd8; -+ u8 rx_gain_5g_mid; -+ u8 rsvd9; -+ u8 rx_gain_5g_high; -+ u8 rsvd10[35]; -+ u8 path_a_cck_pwr_idx[6]; -+ u8 path_a_bw40_1tx_pwr_idx[5]; -+ u8 path_a_ofdm_1tx_pwr_idx_diff:4; -+ u8 path_a_bw20_1tx_pwr_idx_diff:4; -+ u8 path_a_bw20_2tx_pwr_idx_diff:4; -+ u8 path_a_bw40_2tx_pwr_idx_diff:4; -+ u8 path_a_cck_2tx_pwr_idx_diff:4; -+ u8 path_a_ofdm_2tx_pwr_idx_diff:4; -+ u8 rsvd11[0xf2]; -+ union { -+ struct rtw8851bu_efuse u; -+ struct rtw8851be_efuse e; -+ }; -+} __packed; -+ - extern const struct rtw89_chip_info rtw8851b_chip_info; - - #endif diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-100-wifi-rtw89-8851b-rfk-add-RX-DCK.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-100-wifi-rtw89-8851b-rfk-add-RX-DCK.patch deleted file mode 100644 index 437e234a1..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-100-wifi-rtw89-8851b-rfk-add-RX-DCK.patch +++ /dev/null @@ -1,172 +0,0 @@ -From fe8a168266eb65d41ebee0b801fffb5278f92a1b Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sat, 13 May 2023 13:44:23 +0800 -Subject: [PATCH 100/136] wifi: rtw89: 8851b: rfk: add RX DCK - -RX DCK is receiver DC calibration. With this calibration, we have proper -DC offset to reflect correct received signal strength indicator. Do this -calibration when bringing up interface and going to run on AP channel. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230513054425.9689-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 1 + - .../net/wireless/realtek/rtw89/rtw8851b_rfk.c | 111 ++++++++++++++++++ - .../net/wireless/realtek/rtw89/rtw8851b_rfk.h | 1 + - 3 files changed, 113 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3841,6 +3841,7 @@ - #define RR_CAL_RW BIT(19) - #define RR_LUTWE2 0xee - #define RR_LUTWE2_RTXBW BIT(2) -+#define RR_LUTWE2_DIS BIT(6) - #define RR_LUTWE 0xef - #define RR_LUTWE_LOK BIT(2) - #define RR_RFC 0xf0 ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -@@ -35,6 +35,17 @@ enum rtw8851b_iqk_type { - ID_IQK_RESTORE = 0x10, - }; - -+enum rf_mode { -+ RF_SHUT_DOWN = 0x0, -+ RF_STANDBY = 0x1, -+ RF_TX = 0x2, -+ RF_RX = 0x3, -+ RF_TXIQK = 0x4, -+ RF_DPK = 0x5, -+ RF_RXK1 = 0x6, -+ RF_RXK2 = 0x7, -+}; -+ - static const u32 g_idxrxgain[RTW8851B_RXK_GROUP_NR] = {0x10e, 0x116, 0x28e, 0x296}; - static const u32 g_idxattc2[RTW8851B_RXK_GROUP_NR] = {0x0, 0xf, 0x0, 0xf}; - static const u32 g_idxrxagc[RTW8851B_RXK_GROUP_NR] = {0x0, 0x1, 0x2, 0x3}; -@@ -427,6 +438,91 @@ static void _dac_cal(struct rtw89_dev *r - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DACK]DACK finish!!!\n"); - } - -+static void _rx_dck_info(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, bool is_afe) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] ==== S%d RX DCK (%s / CH%d / %s / by %s)====\n", path, -+ chan->band_type == RTW89_BAND_2G ? "2G" : -+ chan->band_type == RTW89_BAND_5G ? "5G" : "6G", -+ chan->channel, -+ chan->band_width == RTW89_CHANNEL_WIDTH_20 ? "20M" : -+ chan->band_width == RTW89_CHANNEL_WIDTH_40 ? "40M" : "80M", -+ is_afe ? "AFE" : "RFC"); -+} -+ -+static void _rxbb_ofst_swap(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 rf_mode) -+{ -+ u32 val, val_i, val_q; -+ -+ val_i = rtw89_read_rf(rtwdev, path, RR_DCK, RR_DCK_S1); -+ val_q = rtw89_read_rf(rtwdev, path, RR_DCK1, RR_DCK1_S1); -+ -+ val = val_q << 4 | val_i; -+ -+ rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_DIS, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_LUTWA, RFREG_MASK, rf_mode); -+ rtw89_write_rf(rtwdev, path, RR_LUTWD0, RFREG_MASK, val); -+ rtw89_write_rf(rtwdev, path, RR_LUTWE2, RR_LUTWE2_DIS, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] val_i = 0x%x, val_q = 0x%x, 0x3F = 0x%x\n", -+ val_i, val_q, val); -+} -+ -+static void _set_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 rf_mode) -+{ -+ u32 val; -+ int ret; -+ -+ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x1); -+ -+ ret = read_poll_timeout_atomic(rtw89_read_rf, val, val, -+ 2, 2000, false, -+ rtwdev, path, RR_DCK, BIT(8)); -+ -+ rtw89_write_rf(rtwdev, path, RR_DCK, RR_DCK_LV, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[RX_DCK] S%d RXDCK finish (ret = %d)\n", -+ path, ret); -+ -+ _rxbb_ofst_swap(rtwdev, path, rf_mode); -+} -+ -+static void _rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool is_afe) -+{ -+ u32 rf_reg5; -+ u8 path; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[RX_DCK] ****** RXDCK Start (Ver: 0x%x, Cv: %d) ******\n", -+ 0x2, rtwdev->hal.cv); -+ -+ for (path = 0; path < RF_PATH_NUM_8851B; path++) { -+ _rx_dck_info(rtwdev, phy, path, is_afe); -+ -+ rf_reg5 = rtw89_read_rf(rtwdev, path, RR_RSV1, RFREG_MASK); -+ -+ if (rtwdev->is_tssi_mode[path]) -+ rtw89_phy_write32_mask(rtwdev, -+ R_P0_TSSI_TRK + (path << 13), -+ B_P0_TSSI_TRK_EN, 0x1); -+ -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RF_RX); -+ _set_rx_dck(rtwdev, path, RF_RX); -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RFREG_MASK, rf_reg5); -+ -+ if (rtwdev->is_tssi_mode[path]) -+ rtw89_phy_write32_mask(rtwdev, -+ R_P0_TSSI_TRK + (path << 13), -+ B_P0_TSSI_TRK_EN, 0x0); -+ } -+} -+ - static void _iqk_sram(struct rtw89_dev *rtwdev, u8 path) - { - u32 i; -@@ -1553,6 +1649,21 @@ void rtw8851b_iqk(struct rtw89_dev *rtwd - rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_STOP); - } - -+void rtw8851b_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); -+ u32 tx_en; -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_START); -+ rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); -+ _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); -+ -+ _rx_dck(rtwdev, phy_idx, false); -+ -+ rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_STOP); -+} -+ - static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, - enum rtw89_bandwidth bw, bool dav) - { ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -@@ -11,6 +11,7 @@ void rtw8851b_aack(struct rtw89_dev *rtw - void rtw8851b_rck(struct rtw89_dev *rtwdev); - void rtw8851b_dack(struct rtw89_dev *rtwdev); - void rtw8851b_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); -+void rtw8851b_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); - void rtw8851b_set_channel_rf(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-101-wifi-rtw89-8851b-rfk-add-DPK.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-101-wifi-rtw89-8851b-rfk-add-DPK.patch deleted file mode 100644 index b6a06b296..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-101-wifi-rtw89-8851b-rfk-add-DPK.patch +++ /dev/null @@ -1,1196 +0,0 @@ -From 0194a95cbe721a1eff4af2587b09213b088281b0 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sat, 13 May 2023 13:44:24 +0800 -Subject: [PATCH 101/136] wifi: rtw89: 8851b: rfk: add DPK - -DPK is short for digital pre-distortion calibration. It can adjusts digital -waveform according to PA linear characteristics dynamically to enhance -TX EVM. - -Do this calibration when we are going to run on AP channel. To prevent -power offset out of boundary, it monitors thermal and set proper boundary -to register. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230513054425.9689-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 13 + - .../net/wireless/realtek/rtw89/rtw8851b_rfk.c | 1048 +++++++++++++++++ - .../net/wireless/realtek/rtw89/rtw8851b_rfk.h | 3 + - 3 files changed, 1064 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3325,6 +3325,10 @@ - #define B_AX_TXAGC_BT_EN BIT(1) - #define B_AX_TXAGC_BT_MASK GENMASK(11, 3) - -+#define R_AX_PWR_SWING_OTHER_CTRL0 0xD230 -+#define R_AX_PWR_SWING_OTHER_CTRL0_C1 0xF230 -+#define B_AX_CFIR_BY_RATE_OFF_MASK GENMASK(17, 0) -+ - #define R_AX_PWR_UL_CTRL0 0xD240 - #define R_AX_PWR_UL_CTRL2 0xD248 - #define B_AX_PWR_UL_CFO_MASK GENMASK(2, 0) -@@ -3755,6 +3759,7 @@ - #define RR_RXA_DPK GENMASK(9, 8) - #define RR_RXA_LNA 0x8b - #define RR_RXA2 0x8c -+#define RR_RAA2_SATT GENMASK(15, 13) - #define RR_RAA2_SWATT GENMASK(15, 9) - #define RR_RXA2_C1 GENMASK(12, 10) - #define RR_RXA2_C2 GENMASK(9, 3) -@@ -4074,6 +4079,7 @@ - #define R_TXAGC_BB 0x1C60 - #define B_TXAGC_BB_OFT GENMASK(31, 16) - #define B_TXAGC_BB GENMASK(31, 24) -+#define B_TXAGC_RF GENMASK(5, 0) - #define R_S0_ADDCK 0x1E00 - #define B_S0_ADDCK_I GENMASK(9, 0) - #define B_S0_ADDCK_Q GENMASK(19, 10) -@@ -4647,6 +4653,7 @@ - #define R_MDPK_SYNC 0x8070 - #define B_MDPK_SYNC_SEL BIT(31) - #define B_MDPK_SYNC_MAN GENMASK(31, 28) -+#define B_MDPK_SYNC_DMAN GENMASK(30, 28) - #define R_MDPK_RX_DCK 0x8074 - #define B_MDPK_RX_DCK_EN BIT(31) - #define R_KIP_MOD 0x8078 -@@ -4655,6 +4662,7 @@ - #define R_KIP_SYSCFG 0x8088 - #define R_KIP_CLK 0x808C - #define R_DPK_IDL 0x809C -+#define B_DPK_IDL_SEL GENMASK(10, 9) - #define B_DPK_IDL BIT(8) - #define R_LDL_NORM 0x80A0 - #define B_LDL_NORM_MA BIT(16) -@@ -4673,6 +4681,10 @@ - #define B_KIP_RPT1_SEL GENMASK(21, 16) - #define B_KIP_RPT1_SEL_V1 GENMASK(19, 16) - #define R_SRAM_IQRX 0x80D8 -+#define R_IDL_MPA 0x80DC -+#define B_IDL_DN BIT(31) -+#define B_IDL_MD530 BIT(1) -+#define B_IDL_MD500 BIT(0) - #define R_GAPK 0x80E0 - #define B_GAPK_ADR BIT(0) - #define R_SRAM_IQRX2 0x80E8 -@@ -4760,6 +4772,7 @@ - #define B_DPK_GL_A0 GENMASK(31, 28) - #define B_DPK_GL_A1 GENMASK(17, 0) - #define R_RPT_PER 0x81FC -+#define B_RPT_PER_KSET GENMASK(31, 29) - #define B_RPT_PER_TSSI GENMASK(28, 16) - #define B_RPT_PER_OF GENMASK(15, 8) - #define B_RPT_PER_TH GENMASK(5, 0) ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -@@ -12,12 +12,47 @@ - #include "rtw8851b_rfk_table.h" - #include "rtw8851b_table.h" - -+#define DPK_VER_8851B 0x5 -+#define DPK_KIP_REG_NUM_8851B 7 -+#define DPK_RF_REG_NUM_8851B 4 -+#define DPK_KSET_NUM 4 - #define RTW8851B_RXK_GROUP_NR 4 - #define RTW8851B_TXK_GROUP_NR 1 - #define RTW8851B_IQK_VER 0x2a - #define RTW8851B_IQK_SS 1 - #define RTW8851B_LOK_GRAM 10 - -+enum dpk_id { -+ LBK_RXIQK = 0x06, -+ SYNC = 0x10, -+ MDPK_IDL = 0x11, -+ MDPK_MPA = 0x12, -+ GAIN_LOSS = 0x13, -+ GAIN_CAL = 0x14, -+ DPK_RXAGC = 0x15, -+ KIP_PRESET = 0x16, -+ KIP_RESTORE = 0x17, -+ DPK_TXAGC = 0x19, -+ D_KIP_PRESET = 0x28, -+ D_TXAGC = 0x29, -+ D_RXAGC = 0x2a, -+ D_SYNC = 0x2b, -+ D_GAIN_LOSS = 0x2c, -+ D_MDPK_IDL = 0x2d, -+ D_MDPK_LDL = 0x2e, -+ D_GAIN_NORM = 0x2f, -+ D_KIP_THERMAL = 0x30, -+ D_KIP_RESTORE = 0x31 -+}; -+ -+enum dpk_agc_step { -+ DPK_AGC_STEP_SYNC_DGAIN, -+ DPK_AGC_STEP_GAIN_LOSS_IDX, -+ DPK_AGC_STEP_GL_GT_CRITERION, -+ DPK_AGC_STEP_GL_LT_CRITERION, -+ DPK_AGC_STEP_SET_TX_GAIN, -+}; -+ - enum rtw8851b_iqk_type { - ID_TXAGC = 0x0, - ID_FLOK_COARSE = 0x1, -@@ -68,6 +103,10 @@ static const u32 rtw8851b_backup_rf_regs - #define BACKUP_BB_REGS_NR ARRAY_SIZE(rtw8851b_backup_bb_regs) - #define BACKUP_RF_REGS_NR ARRAY_SIZE(rtw8851b_backup_rf_regs) - -+static const u32 dpk_kip_reg[DPK_KIP_REG_NUM_8851B] = { -+ 0x813c, 0x8124, 0xc0ec, 0xc0e8, 0xc0c4, 0xc0d4, 0xc0d8}; -+static const u32 dpk_rf_reg[DPK_RF_REG_NUM_8851B] = {0xde, 0x8f, 0x5, 0x10005}; -+ - static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) - { - return RF_A; -@@ -81,6 +120,24 @@ static void _adc_fifo_rst(struct rtw89_d - rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, B_ADC_FIFO_RXK, 0x1111); - } - -+static void _rfk_rf_direct_cntrl(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, bool is_bybb) -+{ -+ if (is_bybb) -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x1); -+ else -+ rtw89_write_rf(rtwdev, path, RR_RSV1, RR_RSV1_RST, 0x0); -+} -+ -+static void _rfk_drf_direct_cntrl(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, bool is_bybb) -+{ -+ if (is_bybb) -+ rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x1); -+ else -+ rtw89_write_rf(rtwdev, path, RR_BBDC, RR_BBDC_SEL, 0x0); -+} -+ - static void _wait_rx_mode(struct rtw89_dev *rtwdev, u8 kpath) - { - u32 rf_mode; -@@ -1546,6 +1603,964 @@ static void _iqk(struct rtw89_dev *rtwde - _doiqk(rtwdev, force, phy_idx, RF_PATH_A); - } - -+static void _dpk_bkup_kip(struct rtw89_dev *rtwdev, const u32 *reg, -+ u32 reg_bkup[][DPK_KIP_REG_NUM_8851B], u8 path) -+{ -+ u8 i; -+ -+ for (i = 0; i < DPK_KIP_REG_NUM_8851B; i++) { -+ reg_bkup[path][i] = -+ rtw89_phy_read32_mask(rtwdev, reg[i] + (path << 8), MASKDWORD); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Backup 0x%x = %x\n", -+ reg[i] + (path << 8), reg_bkup[path][i]); -+ } -+} -+ -+static void _dpk_bkup_rf(struct rtw89_dev *rtwdev, const u32 *rf_reg, -+ u32 rf_bkup[][DPK_RF_REG_NUM_8851B], u8 path) -+{ -+ u8 i; -+ -+ for (i = 0; i < DPK_RF_REG_NUM_8851B; i++) { -+ rf_bkup[path][i] = rtw89_read_rf(rtwdev, path, rf_reg[i], RFREG_MASK); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Backup RF S%d 0x%x = %x\n", -+ path, rf_reg[i], rf_bkup[path][i]); -+ } -+} -+ -+static void _dpk_reload_kip(struct rtw89_dev *rtwdev, const u32 *reg, -+ u32 reg_bkup[][DPK_KIP_REG_NUM_8851B], u8 path) -+{ -+ u8 i; -+ -+ for (i = 0; i < DPK_KIP_REG_NUM_8851B; i++) { -+ rtw89_phy_write32_mask(rtwdev, reg[i] + (path << 8), MASKDWORD, -+ reg_bkup[path][i]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Reload 0x%x = %x\n", -+ reg[i] + (path << 8), reg_bkup[path][i]); -+ } -+} -+ -+static void _dpk_reload_rf(struct rtw89_dev *rtwdev, const u32 *rf_reg, -+ u32 rf_bkup[][DPK_RF_REG_NUM_8851B], u8 path) -+{ -+ u8 i; -+ -+ for (i = 0; i < DPK_RF_REG_NUM_8851B; i++) { -+ rtw89_write_rf(rtwdev, path, rf_reg[i], RFREG_MASK, rf_bkup[path][i]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Reload RF S%d 0x%x = %x\n", path, -+ rf_reg[i], rf_bkup[path][i]); -+ } -+} -+ -+static void _dpk_one_shot(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, enum dpk_id id) -+{ -+ u16 dpk_cmd; -+ u32 val; -+ int ret; -+ -+ dpk_cmd = ((id << 8) | (0x19 + path * 0x12)); -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_CFG, MASKDWORD, dpk_cmd); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val == 0x55, -+ 10, 20000, false, -+ rtwdev, 0xbff8, MASKBYTE0); -+ if (ret) -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] one-shot 1 timeout\n"); -+ -+ udelay(1); -+ -+ ret = read_poll_timeout_atomic(rtw89_phy_read32_mask, val, val == 0x8000, -+ 1, 2000, false, -+ rtwdev, R_RPT_COM, MASKLWORD); -+ if (ret) -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] one-shot 2 timeout\n"); -+ -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, MASKBYTE0, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] one-shot for %s = 0x%04x\n", -+ id == 0x28 ? "KIP_PRESET" : -+ id == 0x29 ? "DPK_TXAGC" : -+ id == 0x2a ? "DPK_RXAGC" : -+ id == 0x2b ? "SYNC" : -+ id == 0x2c ? "GAIN_LOSS" : -+ id == 0x2d ? "MDPK_IDL" : -+ id == 0x2f ? "DPK_GAIN_NORM" : -+ id == 0x31 ? "KIP_RESOTRE" : -+ id == 0x6 ? "LBK_RXIQK" : "Unknown id", -+ dpk_cmd); -+} -+ -+static void _dpk_onoff(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, -+ bool off) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ u8 kidx = dpk->cur_idx[path]; -+ u8 off_reverse = off ? 0 : 1; -+ u8 val; -+ -+ val = dpk->is_dpk_enable * off_reverse * dpk->bp[path][kidx].path_ok; -+ -+ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), -+ 0xf0000000, val); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] DPK %s !!!\n", path, -+ kidx, val == 0 ? "disable" : "enable"); -+} -+ -+static void _dpk_init(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ -+ u8 kidx = dpk->cur_idx[path]; -+ -+ dpk->bp[path][kidx].path_ok = 0; -+} -+ -+static void _dpk_information(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ -+ u8 kidx = dpk->cur_idx[path]; -+ -+ dpk->bp[path][kidx].band = chan->band_type; -+ dpk->bp[path][kidx].ch = chan->band_width; -+ dpk->bp[path][kidx].bw = chan->channel; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] S%d[%d] (PHY%d): TSSI %s/ DBCC %s/ %s/ CH%d/ %s\n", -+ path, dpk->cur_idx[path], phy, -+ rtwdev->is_tssi_mode[path] ? "on" : "off", -+ rtwdev->dbcc_en ? "on" : "off", -+ dpk->bp[path][kidx].band == 0 ? "2G" : -+ dpk->bp[path][kidx].band == 1 ? "5G" : "6G", -+ dpk->bp[path][kidx].ch, -+ dpk->bp[path][kidx].bw == 0 ? "20M" : -+ dpk->bp[path][kidx].bw == 1 ? "40M" : -+ dpk->bp[path][kidx].bw == 2 ? "80M" : "160M"); -+} -+ -+static void _dpk_rxagc_onoff(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, -+ bool turn_on) -+{ -+ if (path == RF_PATH_A) -+ rtw89_phy_write32_mask(rtwdev, R_P0_AGC_CTL, B_P0_AGC_EN, turn_on); -+ else -+ rtw89_phy_write32_mask(rtwdev, R_P1_AGC_CTL, B_P1_AGC_EN, turn_on); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d RXAGC is %s\n", path, -+ turn_on ? "turn_on" : "turn_off"); -+} -+ -+static void _dpk_bb_afe_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(16 + path), 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(20 + path), 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(24 + path), 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(28 + path), 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), MASKDWORD, 0xd801dffd); -+ -+ rtw89_rfk_parser(rtwdev, &rtw8851b_iqk_bb_afe_defs_tbl); -+ -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(20 + path), 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(28 + path), 0x1); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d BB/AFE setting\n", path); -+} -+ -+static void _dpk_bb_afe_restore(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_P0_NRBW + (path << 13), B_P0_NRBW_DBG, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(16 + path), 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(20 + path), 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(24 + path), 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(28 + path), 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), MASKDWORD, 0x00000000); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RXCK + (path << 13), B_P0_TXCK_ALL, 0x00); -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(16 + path), 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_ADC_FIFO, BIT(24 + path), 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d BB/AFE restore\n", path); -+} -+ -+static void _dpk_tssi_pause(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, -+ bool is_pause) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK + (path << 13), -+ B_P0_TSSI_TRK_EN, is_pause); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d TSSI %s\n", path, -+ is_pause ? "pause" : "resume"); -+} -+ -+static void _dpk_tpg_sel(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ -+ if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80) { -+ rtw89_phy_write32_mask(rtwdev, R_TPG_MOD, B_TPG_MOD_F, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_TPG_SEL, MASKDWORD, 0xffe0fa00); -+ } else if (dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40) { -+ rtw89_phy_write32_mask(rtwdev, R_TPG_MOD, B_TPG_MOD_F, 0x2); -+ rtw89_phy_write32_mask(rtwdev, R_TPG_SEL, MASKDWORD, 0xff4009e0); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_TPG_MOD, B_TPG_MOD_F, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_TPG_SEL, MASKDWORD, 0xf9f007d0); -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] TPG Select for %s\n", -+ dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_80 ? "80M" : -+ dpk->bp[path][kidx].bw == RTW89_CHANNEL_WIDTH_40 ? "40M" : "20M"); -+} -+ -+static void _dpk_txpwr_bb_force(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, bool force) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_TXPWRB + (path << 13), B_TXPWRB_ON, force); -+ rtw89_phy_write32_mask(rtwdev, R_TXPWRB_H + (path << 13), B_TXPWRB_RDY, force); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d txpwr_bb_force %s\n", -+ path, force ? "on" : "off"); -+} -+ -+static void _dpk_kip_pwr_clk_onoff(struct rtw89_dev *rtwdev, bool turn_on) -+{ -+ if (turn_on) { -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000080); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x807f030a); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000000); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x80000000); -+ rtw89_phy_write32_mask(rtwdev, R_DPK_WR, BIT(18), 0x1); -+ } -+} -+ -+static void _dpk_kip_control_rfc(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path path, bool ctrl_by_kip) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_UPD_CLK + (path << 13), -+ B_IQK_RFC_ON, ctrl_by_kip); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] RFC is controlled by %s\n", -+ ctrl_by_kip ? "KIP" : "BB"); -+} -+ -+static void _dpk_kip_preset(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kidx) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_MOD, B_KIP_MOD, -+ rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); -+ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), -+ B_DPD_SEL, 0x01); -+ -+ _dpk_kip_control_rfc(rtwdev, path, true); -+ _dpk_one_shot(rtwdev, phy, path, D_KIP_PRESET); -+} -+ -+static void _dpk_kip_restore(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ _dpk_one_shot(rtwdev, phy, path, D_KIP_RESTORE); -+ _dpk_kip_control_rfc(rtwdev, path, false); -+ _dpk_txpwr_bb_force(rtwdev, path, false); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d restore KIP\n", path); -+} -+ -+static void _dpk_kset_query(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), B_KIP_RPT_SEL, 0x10); -+ -+ dpk->cur_k_set = -+ rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), B_RPT_PER_KSET) - 1; -+} -+ -+static void _dpk_para_query(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) -+{ -+ static const u32 reg[RTW89_DPK_BKUP_NUM][DPK_KSET_NUM] = { -+ {0x8190, 0x8194, 0x8198, 0x81a4}, -+ {0x81a8, 0x81c4, 0x81c8, 0x81e8} -+ }; -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ u8 cur_k_set = dpk->cur_k_set; -+ u32 para; -+ -+ if (cur_k_set >= DPK_KSET_NUM) { -+ rtw89_warn(rtwdev, "DPK cur_k_set = %d\n", cur_k_set); -+ cur_k_set = 2; -+ } -+ -+ para = rtw89_phy_read32_mask(rtwdev, reg[kidx][cur_k_set] + (path << 8), -+ MASKDWORD); -+ -+ dpk->bp[path][kidx].txagc_dpk = (para >> 10) & 0x3f; -+ dpk->bp[path][kidx].ther_dpk = (para >> 26) & 0x3f; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] thermal/ txagc_RF (K%d) = 0x%x/ 0x%x\n", -+ dpk->cur_k_set, dpk->bp[path][kidx].ther_dpk, -+ dpk->bp[path][kidx].txagc_dpk); -+} -+ -+static bool _dpk_sync_check(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ u8 corr_val, corr_idx, rxbb; -+ u16 dc_i, dc_q; -+ u8 rxbb_ov; -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x0); -+ -+ corr_idx = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_CORI); -+ corr_val = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_CORV); -+ dpk->corr_idx[path][kidx] = corr_idx; -+ dpk->corr_val[path][kidx] = corr_val; -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x9); -+ -+ dc_i = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCI); -+ dc_q = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCQ); -+ -+ dc_i = abs(sign_extend32(dc_i, 11)); -+ dc_q = abs(sign_extend32(dc_q, 11)); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] S%d Corr_idx/ Corr_val /DC I/Q, = %d / %d / %d / %d\n", -+ path, corr_idx, corr_val, dc_i, dc_q); -+ -+ dpk->dc_i[path][kidx] = dc_i; -+ dpk->dc_q[path][kidx] = dc_q; -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x8); -+ rxbb = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_RXBB); -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x31); -+ rxbb_ov = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_RXOV); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] S%d RXBB/ RXAGC_done /RXBB_ovlmt = %d / %d / %d\n", -+ path, rxbb, -+ rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DONE), -+ rxbb_ov); -+ -+ if (dc_i > 200 || dc_q > 200 || corr_val < 170) -+ return true; -+ else -+ return false; -+} -+ -+static void _dpk_kip_set_txagc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 dbm, -+ bool set_from_bb) -+{ -+ if (set_from_bb) { -+ dbm = clamp_t(u8, dbm, 7, 24); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] set S%d txagc to %ddBm\n", path, dbm); -+ rtw89_phy_write32_mask(rtwdev, R_TXPWRB + (path << 13), -+ B_TXPWRB_VAL, dbm << 2); -+ } -+ -+ _dpk_one_shot(rtwdev, phy, path, D_TXAGC); -+ _dpk_kset_query(rtwdev, path); -+} -+ -+static bool _dpk_kip_set_rxagc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kidx) -+{ -+ _dpk_kip_control_rfc(rtwdev, path, false); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_MOD, B_KIP_MOD, -+ rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK)); -+ _dpk_kip_control_rfc(rtwdev, path, true); -+ -+ _dpk_one_shot(rtwdev, phy, path, D_RXAGC); -+ return _dpk_sync_check(rtwdev, path, kidx); -+} -+ -+static void _dpk_lbk_rxiqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ u32 rf_11, reg_81cc; -+ u8 cur_rxbb; -+ -+ rtw89_phy_write32_mask(rtwdev, R_DPD_V1 + (path << 8), B_DPD_LBK, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_MDPK_RX_DCK, B_MDPK_RX_DCK_EN, 0x1); -+ -+ _dpk_kip_control_rfc(rtwdev, path, false); -+ -+ cur_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_RXB); -+ rf_11 = rtw89_read_rf(rtwdev, path, RR_TXIG, RFREG_MASK); -+ reg_81cc = rtw89_phy_read32_mask(rtwdev, R_KIP_IQP + (path << 8), -+ B_KIP_IQP_SW); -+ -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR0, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_GR1, 0x3); -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RR_TXIG_TG, 0xd); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RXB, 0x1f); -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_IQSW, 0x12); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_SW, 0x3); -+ -+ _dpk_kip_control_rfc(rtwdev, path, true); -+ -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, MASKDWORD, 0x00250025); -+ -+ _dpk_one_shot(rtwdev, phy, path, LBK_RXIQK); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d LBK RXIQC = 0x%x\n", path, -+ rtw89_phy_read32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD)); -+ -+ _dpk_kip_control_rfc(rtwdev, path, false); -+ -+ rtw89_write_rf(rtwdev, path, RR_TXIG, RFREG_MASK, rf_11); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RXB, cur_rxbb); -+ rtw89_phy_write32_mask(rtwdev, R_KIP_IQP + (path << 8), B_KIP_IQP_SW, reg_81cc); -+ -+ rtw89_phy_write32_mask(rtwdev, R_MDPK_RX_DCK, B_MDPK_RX_DCK_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_KPATH_CFG, B_KPATH_CFG_ED, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_DI, 0x1); -+ -+ _dpk_kip_control_rfc(rtwdev, path, true); -+} -+ -+static void _dpk_rf_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, u8 kidx) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ -+ if (dpk->bp[path][kidx].band == RTW89_BAND_2G) { -+ rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, 0x50521); -+ rtw89_write_rf(rtwdev, path, RR_MOD_V1, RR_MOD_MASK, RF_DPK); -+ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTC, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RXBB, RR_RXBB_ATTR, 0x7); -+ } else { -+ rtw89_write_rf(rtwdev, path, RR_MOD, RFREG_MASK, -+ 0x50521 | BIT(rtwdev->dbcc_en)); -+ rtw89_write_rf(rtwdev, path, RR_MOD_V1, RR_MOD_MASK, RF_DPK); -+ rtw89_write_rf(rtwdev, path, RR_RXA2, RR_RAA2_SATT, 0x3); -+ } -+ -+ rtw89_write_rf(rtwdev, path, RR_RCKD, RR_RCKD_BW, 0x1); -+ rtw89_write_rf(rtwdev, path, RR_BTC, RR_BTC_TXBB, dpk->bp[path][kidx].bw + 1); -+ rtw89_write_rf(rtwdev, path, RR_BTC, RR_BTC_RXBB, 0x0); -+ rtw89_write_rf(rtwdev, path, RR_RXBB2, RR_RXBB2_EBW, 0x0); -+} -+ -+static void _dpk_bypass_rxiqc(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_DPD_V1 + (path << 8), B_DPD_LBK, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_RXIQC + (path << 8), MASKDWORD, 0x40000002); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Bypass RXIQC\n"); -+} -+ -+static u16 _dpk_dgain_read(struct rtw89_dev *rtwdev) -+{ -+ u16 dgain; -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x0); -+ dgain = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_DCI); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] DGain = 0x%x\n", dgain); -+ -+ return dgain; -+} -+ -+static u8 _dpk_gainloss_read(struct rtw89_dev *rtwdev) -+{ -+ u8 result; -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, B_KIP_RPT1_SEL, 0x6); -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG2, B_DPK_CFG2_ST, 0x1); -+ result = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, B_PRT_COM_GL); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] tmp GL = %d\n", result); -+ -+ return result; -+} -+ -+static u8 _dpk_gainloss(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kidx) -+{ -+ _dpk_one_shot(rtwdev, phy, path, D_GAIN_LOSS); -+ _dpk_kip_set_txagc(rtwdev, phy, path, 0xff, false); -+ -+ rtw89_phy_write32_mask(rtwdev, R_DPK_GL + (path << 8), B_DPK_GL_A1, 0xf078); -+ rtw89_phy_write32_mask(rtwdev, R_DPK_GL + (path << 8), B_DPK_GL_A0, 0x0); -+ -+ return _dpk_gainloss_read(rtwdev); -+} -+ -+static u8 _dpk_pas_read(struct rtw89_dev *rtwdev, u8 is_check) -+{ -+ u32 val1_i = 0, val1_q = 0, val2_i = 0, val2_q = 0; -+ u32 val1_sqrt_sum, val2_sqrt_sum; -+ u8 i; -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT1, MASKBYTE2, 0x06); -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG2, B_DPK_CFG2_ST, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE2, 0x08); -+ -+ if (is_check) { -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, 0x00); -+ val1_i = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKHWORD); -+ val1_i = abs(sign_extend32(val1_i, 11)); -+ val1_q = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKLWORD); -+ val1_q = abs(sign_extend32(val1_q, 11)); -+ -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, 0x1f); -+ val2_i = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKHWORD); -+ val2_i = abs(sign_extend32(val2_i, 11)); -+ val2_q = rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKLWORD); -+ val2_q = abs(sign_extend32(val2_q, 11)); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] PAS_delta = 0x%x\n", -+ phy_div(val1_i * val1_i + val1_q * val1_q, -+ val2_i * val2_i + val2_q * val2_q)); -+ } else { -+ for (i = 0; i < 32; i++) { -+ rtw89_phy_write32_mask(rtwdev, R_DPK_CFG3, MASKBYTE3, i); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] PAS_Read[%02d]= 0x%08x\n", i, -+ rtw89_phy_read32_mask(rtwdev, R_RPT_COM, MASKDWORD)); -+ } -+ } -+ -+ val1_sqrt_sum = val1_i * val1_i + val1_q * val1_q; -+ val2_sqrt_sum = val2_i * val2_i + val2_q * val2_q; -+ -+ if (val1_sqrt_sum < val2_sqrt_sum) -+ return 2; -+ else if (val1_sqrt_sum >= val2_sqrt_sum * 8 / 5) -+ return 1; -+ else -+ return 0; -+} -+ -+static u8 _dpk_agc(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kidx, u8 init_xdbm, u8 loss_only) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ u8 tmp_dbm = init_xdbm, tmp_gl_idx = 0; -+ u8 step = DPK_AGC_STEP_SYNC_DGAIN; -+ u8 goout = 0, agc_cnt = 0; -+ bool is_fail = false; -+ int limit = 200; -+ u8 tmp_rxbb; -+ u16 dgain; -+ -+ do { -+ switch (step) { -+ case DPK_AGC_STEP_SYNC_DGAIN: -+ is_fail = _dpk_kip_set_rxagc(rtwdev, phy, path, kidx); -+ -+ if (is_fail) { -+ goout = 1; -+ break; -+ } -+ -+ dgain = _dpk_dgain_read(rtwdev); -+ -+ if (dgain > 0x5fc || dgain < 0x556) { -+ _dpk_one_shot(rtwdev, phy, path, D_SYNC); -+ dgain = _dpk_dgain_read(rtwdev); -+ } -+ -+ if (agc_cnt == 0) { -+ if (dpk->bp[path][kidx].band == RTW89_BAND_2G) -+ _dpk_bypass_rxiqc(rtwdev, path); -+ else -+ _dpk_lbk_rxiqk(rtwdev, phy, path); -+ } -+ step = DPK_AGC_STEP_GAIN_LOSS_IDX; -+ break; -+ -+ case DPK_AGC_STEP_GAIN_LOSS_IDX: -+ tmp_gl_idx = _dpk_gainloss(rtwdev, phy, path, kidx); -+ -+ if (_dpk_pas_read(rtwdev, true) == 2 && tmp_gl_idx > 0) -+ step = DPK_AGC_STEP_GL_LT_CRITERION; -+ else if ((tmp_gl_idx == 0 && _dpk_pas_read(rtwdev, true) == 1) || -+ tmp_gl_idx >= 7) -+ step = DPK_AGC_STEP_GL_GT_CRITERION; -+ else if (tmp_gl_idx == 0) -+ step = DPK_AGC_STEP_GL_LT_CRITERION; -+ else -+ step = DPK_AGC_STEP_SET_TX_GAIN; -+ break; -+ -+ case DPK_AGC_STEP_GL_GT_CRITERION: -+ if (tmp_dbm <= 7) { -+ goout = 1; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Txagc@lower bound!!\n"); -+ } else { -+ tmp_dbm = max_t(u8, tmp_dbm - 3, 7); -+ _dpk_kip_set_txagc(rtwdev, phy, path, tmp_dbm, true); -+ } -+ step = DPK_AGC_STEP_SYNC_DGAIN; -+ agc_cnt++; -+ break; -+ -+ case DPK_AGC_STEP_GL_LT_CRITERION: -+ if (tmp_dbm >= 24) { -+ goout = 1; -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Txagc@upper bound!!\n"); -+ } else { -+ tmp_dbm = min_t(u8, tmp_dbm + 2, 24); -+ _dpk_kip_set_txagc(rtwdev, phy, path, tmp_dbm, true); -+ } -+ step = DPK_AGC_STEP_SYNC_DGAIN; -+ agc_cnt++; -+ break; -+ -+ case DPK_AGC_STEP_SET_TX_GAIN: -+ _dpk_kip_control_rfc(rtwdev, path, false); -+ tmp_rxbb = rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_RXB); -+ tmp_rxbb = min_t(u8, tmp_rxbb + tmp_gl_idx, 0x1f); -+ -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_RXB, tmp_rxbb); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Adjust RXBB (%+d) = 0x%x\n", -+ tmp_gl_idx, tmp_rxbb); -+ _dpk_kip_control_rfc(rtwdev, path, true); -+ goout = 1; -+ break; -+ default: -+ goout = 1; -+ break; -+ } -+ } while (!goout && agc_cnt < 6 && limit-- > 0); -+ -+ return is_fail; -+} -+ -+static void _dpk_set_mdpd_para(struct rtw89_dev *rtwdev, u8 order) -+{ -+ switch (order) { -+ case 0: /* (5,3,1) */ -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_DPK_IDL, B_DPK_IDL_SEL, 0x2); -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_PN, 0x4); -+ rtw89_phy_write32_mask(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_DMAN, 0x1); -+ break; -+ case 1: /* (5,3,0) */ -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_DPK_IDL, B_DPK_IDL_SEL, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_PN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_DMAN, 0x0); -+ break; -+ case 2: /* (5,0,0) */ -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP, 0x2); -+ rtw89_phy_write32_mask(rtwdev, R_DPK_IDL, B_DPK_IDL_SEL, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_PN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_DMAN, 0x0); -+ break; -+ case 3: /* (7,3,1) */ -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP, 0x3); -+ rtw89_phy_write32_mask(rtwdev, R_DPK_IDL, B_DPK_IDL_SEL, 0x3); -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_PN, 0x4); -+ rtw89_phy_write32_mask(rtwdev, R_MDPK_SYNC, B_MDPK_SYNC_DMAN, 0x1); -+ break; -+ default: -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] Wrong MDPD order!!(0x%x)\n", order); -+ break; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] Set %s for IDL\n", -+ order == 0x0 ? "(5,3,1)" : -+ order == 0x1 ? "(5,3,0)" : -+ order == 0x2 ? "(5,0,0)" : "(7,3,1)"); -+} -+ -+static void _dpk_idl_mpa(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kidx) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_MA, 0x1); -+ -+ if (rtw89_phy_read32_mask(rtwdev, R_IDL_MPA, B_IDL_MD500) == 0x1) -+ _dpk_set_mdpd_para(rtwdev, 0x2); -+ else if (rtw89_phy_read32_mask(rtwdev, R_IDL_MPA, B_IDL_MD530) == 0x1) -+ _dpk_set_mdpd_para(rtwdev, 0x1); -+ else -+ _dpk_set_mdpd_para(rtwdev, 0x0); -+ -+ rtw89_phy_write32_mask(rtwdev, R_DPK_IDL, B_DPK_IDL, 0x0); -+ fsleep(1000); -+ -+ _dpk_one_shot(rtwdev, phy, path, D_MDPK_IDL); -+} -+ -+static u8 _dpk_order_convert(struct rtw89_dev *rtwdev) -+{ -+ u32 order; -+ u8 val; -+ -+ order = rtw89_phy_read32_mask(rtwdev, R_LDL_NORM, B_LDL_NORM_OP); -+ -+ switch (order) { -+ case 0: /* (5,3,1) */ -+ val = 0x6; -+ break; -+ case 1: /* (5,3,0) */ -+ val = 0x2; -+ break; -+ case 2: /* (5,0,0) */ -+ val = 0x0; -+ break; -+ default: -+ val = 0xff; -+ break; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] convert MDPD order to 0x%x\n", val); -+ -+ return val; -+} -+ -+static void _dpk_gain_normalize(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kidx, bool is_execute) -+{ -+ static const u32 reg[RTW89_DPK_BKUP_NUM][DPK_KSET_NUM] = { -+ {0x8190, 0x8194, 0x8198, 0x81a4}, -+ {0x81a8, 0x81c4, 0x81c8, 0x81e8} -+ }; -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ u8 cur_k_set = dpk->cur_k_set; -+ -+ if (cur_k_set >= DPK_KSET_NUM) { -+ rtw89_warn(rtwdev, "DPK cur_k_set = %d\n", cur_k_set); -+ cur_k_set = 2; -+ } -+ -+ if (is_execute) { -+ rtw89_phy_write32_mask(rtwdev, R_DPK_GN + (path << 8), -+ B_DPK_GN_AG, 0x200); -+ rtw89_phy_write32_mask(rtwdev, R_DPK_GN + (path << 8), -+ B_DPK_GN_EN, 0x3); -+ -+ _dpk_one_shot(rtwdev, phy, path, D_GAIN_NORM); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, reg[kidx][cur_k_set] + (path << 8), -+ 0x0000007F, 0x5b); -+ } -+ -+ dpk->bp[path][kidx].gs = -+ rtw89_phy_read32_mask(rtwdev, reg[kidx][cur_k_set] + (path << 8), -+ 0x0000007F); -+} -+ -+static void _dpk_on(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, u8 kidx) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ -+ rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_LOAD_COEF + (path << 8), B_LOAD_COEF_MDPD, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), -+ B_DPD_ORDER, _dpk_order_convert(rtwdev)); -+ -+ dpk->bp[path][kidx].path_ok = -+ dpk->bp[path][kidx].path_ok | BIT(dpk->cur_k_set); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d] path_ok = 0x%x\n", -+ path, kidx, dpk->bp[path][kidx].path_ok); -+ -+ rtw89_phy_write32_mask(rtwdev, R_DPD_CH0A + (path << 8) + (kidx << 2), -+ B_DPD_MEN, dpk->bp[path][kidx].path_ok); -+ -+ _dpk_gain_normalize(rtwdev, phy, path, kidx, false); -+} -+ -+static bool _dpk_main(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ u8 kidx = dpk->cur_idx[path]; -+ u8 init_xdbm = 17; -+ bool is_fail; -+ -+ if (dpk->bp[path][kidx].band != RTW89_BAND_2G) -+ init_xdbm = 15; -+ -+ _dpk_kip_control_rfc(rtwdev, path, false); -+ _rfk_rf_direct_cntrl(rtwdev, path, false); -+ rtw89_write_rf(rtwdev, path, RR_BBDC, RFREG_MASK, 0x03ffd); -+ -+ _dpk_rf_setting(rtwdev, path, kidx); -+ _set_rx_dck(rtwdev, path, RF_DPK); -+ -+ _dpk_kip_pwr_clk_onoff(rtwdev, true); -+ _dpk_kip_preset(rtwdev, phy, path, kidx); -+ _dpk_txpwr_bb_force(rtwdev, path, true); -+ _dpk_kip_set_txagc(rtwdev, phy, path, init_xdbm, true); -+ _dpk_tpg_sel(rtwdev, path, kidx); -+ is_fail = _dpk_agc(rtwdev, phy, path, kidx, init_xdbm, false); -+ if (is_fail) -+ goto _error; -+ -+ _dpk_idl_mpa(rtwdev, phy, path, kidx); -+ _dpk_para_query(rtwdev, path, kidx); -+ -+ _dpk_on(rtwdev, phy, path, kidx); -+_error: -+ _dpk_kip_control_rfc(rtwdev, path, false); -+ rtw89_write_rf(rtwdev, path, RR_MOD, RR_MOD_MASK, RF_RX); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[DPK] S%d[%d]_K%d %s\n", path, kidx, -+ dpk->cur_k_set, is_fail ? "need Check" : "is Success"); -+ -+ return is_fail; -+} -+ -+static void _dpk_cal_select(struct rtw89_dev *rtwdev, bool force, -+ enum rtw89_phy_idx phy, u8 kpath) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ u32 kip_bkup[RF_PATH_NUM_8851B][DPK_KIP_REG_NUM_8851B] = {}; -+ u32 rf_bkup[RF_PATH_NUM_8851B][DPK_RF_REG_NUM_8851B] = {}; -+ bool is_fail; -+ u8 path; -+ -+ for (path = 0; path < RF_PATH_NUM_8851B; path++) -+ dpk->cur_idx[path] = 0; -+ -+ for (path = 0; path < RF_PATH_NUM_8851B; path++) { -+ if (!(kpath & BIT(path))) -+ continue; -+ _dpk_bkup_kip(rtwdev, dpk_kip_reg, kip_bkup, path); -+ _dpk_bkup_rf(rtwdev, dpk_rf_reg, rf_bkup, path); -+ _dpk_information(rtwdev, phy, path); -+ _dpk_init(rtwdev, path); -+ -+ if (rtwdev->is_tssi_mode[path]) -+ _dpk_tssi_pause(rtwdev, path, true); -+ } -+ -+ for (path = 0; path < RF_PATH_NUM_8851B; path++) { -+ if (!(kpath & BIT(path))) -+ continue; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] ========= S%d[%d] DPK Start =========\n", -+ path, dpk->cur_idx[path]); -+ -+ _dpk_rxagc_onoff(rtwdev, path, false); -+ _rfk_drf_direct_cntrl(rtwdev, path, false); -+ _dpk_bb_afe_setting(rtwdev, path); -+ -+ is_fail = _dpk_main(rtwdev, phy, path); -+ _dpk_onoff(rtwdev, path, is_fail); -+ } -+ -+ for (path = 0; path < RF_PATH_NUM_8851B; path++) { -+ if (!(kpath & BIT(path))) -+ continue; -+ -+ _dpk_kip_restore(rtwdev, phy, path); -+ _dpk_reload_kip(rtwdev, dpk_kip_reg, kip_bkup, path); -+ _dpk_reload_rf(rtwdev, dpk_rf_reg, rf_bkup, path); -+ _dpk_bb_afe_restore(rtwdev, path); -+ _dpk_rxagc_onoff(rtwdev, path, true); -+ -+ if (rtwdev->is_tssi_mode[path]) -+ _dpk_tssi_pause(rtwdev, path, false); -+ } -+ -+ _dpk_kip_pwr_clk_onoff(rtwdev, false); -+} -+ -+static void _dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool force) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[DPK] ****** 8851B DPK Start (Ver: 0x%x, Cv: %d) ******\n", -+ DPK_VER_8851B, rtwdev->hal.cv); -+ -+ _dpk_cal_select(rtwdev, force, phy, _kpath(rtwdev, phy)); -+} -+ -+static void _dpk_track(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_dpk_info *dpk = &rtwdev->dpk; -+ s8 txagc_bb, txagc_bb_tp, txagc_ofst; -+ s16 pwsf_tssi_ofst; -+ s8 delta_ther = 0; -+ u8 path, kidx; -+ u8 txagc_rf; -+ u8 cur_ther; -+ -+ for (path = 0; path < RF_PATH_NUM_8851B; path++) { -+ kidx = dpk->cur_idx[path]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] ================[S%d[%d] (CH %d)]================\n", -+ path, kidx, dpk->bp[path][kidx].ch); -+ -+ txagc_rf = rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), -+ B_TXAGC_RF); -+ txagc_bb = rtw89_phy_read32_mask(rtwdev, R_TXAGC_BB + (path << 13), -+ MASKBYTE2); -+ txagc_bb_tp = rtw89_phy_read32_mask(rtwdev, R_TXAGC_BTP + (path << 13), -+ B_TXAGC_BTP); -+ -+ rtw89_phy_write32_mask(rtwdev, R_KIP_RPT + (path << 8), -+ B_KIP_RPT_SEL, 0xf); -+ cur_ther = rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), -+ B_RPT_PER_TH); -+ txagc_ofst = rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), -+ B_RPT_PER_OF); -+ pwsf_tssi_ofst = rtw89_phy_read32_mask(rtwdev, R_RPT_PER + (path << 8), -+ B_RPT_PER_TSSI); -+ pwsf_tssi_ofst = sign_extend32(pwsf_tssi_ofst, 12); -+ -+ delta_ther = cur_ther - dpk->bp[path][kidx].ther_dpk; -+ -+ delta_ther = delta_ther * 2 / 3; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] extra delta_ther = %d (0x%x / 0x%x@k)\n", -+ delta_ther, cur_ther, dpk->bp[path][kidx].ther_dpk); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] delta_txagc = %d (0x%x / 0x%x@k)\n", -+ txagc_rf - dpk->bp[path][kidx].txagc_dpk, -+ txagc_rf, dpk->bp[path][kidx].txagc_dpk); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] txagc_offset / pwsf_tssi_ofst = 0x%x / %+d\n", -+ txagc_ofst, pwsf_tssi_ofst); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] txagc_bb_tp / txagc_bb = 0x%x / 0x%x\n", -+ txagc_bb_tp, txagc_bb); -+ -+ if (rtw89_phy_read32_mask(rtwdev, R_IDL_MPA, B_IDL_DN) == 0x0 && -+ txagc_rf != 0) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[DPK_TRK] New pwsf = 0x%x\n", 0x78 - delta_ther); -+ -+ rtw89_phy_write32_mask(rtwdev, -+ R_DPD_BND + (path << 8) + (kidx << 2), -+ 0x07FC0000, 0x78 - delta_ther); -+ } -+ } -+} -+ - static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) - { - u32 rf_reg5; -@@ -1581,6 +2596,17 @@ static void _rck(struct rtw89_dev *rtwde - rtw89_read_rf(rtwdev, path, RR_RCKC, RFREG_MASK)); - } - -+static void rtw8851b_by_rate_dpd(struct rtw89_dev *rtwdev) -+{ -+ rtw89_write32_mask(rtwdev, R_AX_PWR_SWING_OTHER_CTRL0, -+ B_AX_CFIR_BY_RATE_OFF_MASK, 0x21861); -+} -+ -+void rtw8851b_dpk_init(struct rtw89_dev *rtwdev) -+{ -+ rtw8851b_by_rate_dpd(rtwdev); -+} -+ - void rtw8851b_aack(struct rtw89_dev *rtwdev) - { - u32 tmp05, ib[4]; -@@ -1664,6 +2690,28 @@ void rtw8851b_rx_dck(struct rtw89_dev *r - rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_RXDCK, BTC_WRFK_STOP); - } - -+void rtw8851b_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ u8 phy_map = rtw89_btc_phymap(rtwdev, phy_idx, 0); -+ u32 tx_en; -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_START); -+ rtw89_chip_stop_sch_tx(rtwdev, phy_idx, &tx_en, RTW89_SCH_TX_SEL_ALL); -+ _wait_rx_mode(rtwdev, _kpath(rtwdev, phy_idx)); -+ -+ rtwdev->dpk.is_dpk_enable = true; -+ rtwdev->dpk.is_dpk_reload_en = false; -+ _dpk(rtwdev, phy_idx, false); -+ -+ rtw89_chip_resume_sch_tx(rtwdev, phy_idx, tx_en); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_DPK, BTC_WRFK_STOP); -+} -+ -+void rtw8851b_dpk_track(struct rtw89_dev *rtwdev) -+{ -+ _dpk_track(rtwdev); -+} -+ - static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, - enum rtw89_bandwidth bw, bool dav) - { ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -@@ -12,6 +12,9 @@ void rtw8851b_rck(struct rtw89_dev *rtwd - void rtw8851b_dack(struct rtw89_dev *rtwdev); - void rtw8851b_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); - void rtw8851b_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); -+void rtw8851b_dpk_init(struct rtw89_dev *rtwdev); -+void rtw8851b_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy); -+void rtw8851b_dpk_track(struct rtw89_dev *rtwdev); - void rtw8851b_set_channel_rf(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-102-wifi-rtw89-8851b-rfk-add-TSSI.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-102-wifi-rtw89-8851b-rfk-add-TSSI.patch deleted file mode 100644 index 37c0f5448..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-102-wifi-rtw89-8851b-rfk-add-TSSI.patch +++ /dev/null @@ -1,684 +0,0 @@ -From 3f2da9fc17f66af17a1349d4d32f6a6ba245b94d Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sat, 13 May 2023 13:44:25 +0800 -Subject: [PATCH 102/136] wifi: rtw89: 8851b: rfk: add TSSI - -TSSI is transmitter signal strength indication, which is a close-loop -hardware circuit to feedback actual transmitting power as a reference for -next transmission. - -When we setup channel to connect an AP, it does full calibration. When -switching bands or channels, it needs to reset hardware status to prevent -use wrong feedback of previous transmission. - -To do TX power compensation reflecting current temperature, it loads tables -of compensation values into registers according to channel and band group. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230513054425.9689-4-pkshih@realtek.com ---- - .../net/wireless/realtek/rtw89/rtw8851b_rfk.c | 617 ++++++++++++++++++ - .../net/wireless/realtek/rtw89/rtw8851b_rfk.h | 4 + - 2 files changed, 621 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -@@ -21,6 +21,9 @@ - #define RTW8851B_IQK_VER 0x2a - #define RTW8851B_IQK_SS 1 - #define RTW8851B_LOK_GRAM 10 -+#define RTW8851B_TSSI_PATH_NR 1 -+ -+#define _TSSI_DE_MASK GENMASK(21, 12) - - enum dpk_id { - LBK_RXIQK = 0x06, -@@ -81,6 +84,14 @@ enum rf_mode { - RF_RXK2 = 0x7, - }; - -+static const u32 _tssi_de_cck_long[RF_PATH_NUM_8851B] = {0x5858}; -+static const u32 _tssi_de_cck_short[RF_PATH_NUM_8851B] = {0x5860}; -+static const u32 _tssi_de_mcs_20m[RF_PATH_NUM_8851B] = {0x5838}; -+static const u32 _tssi_de_mcs_40m[RF_PATH_NUM_8851B] = {0x5840}; -+static const u32 _tssi_de_mcs_80m[RF_PATH_NUM_8851B] = {0x5848}; -+static const u32 _tssi_de_mcs_80m_80m[RF_PATH_NUM_8851B] = {0x5850}; -+static const u32 _tssi_de_mcs_5m[RF_PATH_NUM_8851B] = {0x5828}; -+static const u32 _tssi_de_mcs_10m[RF_PATH_NUM_8851B] = {0x5830}; - static const u32 g_idxrxgain[RTW8851B_RXK_GROUP_NR] = {0x10e, 0x116, 0x28e, 0x296}; - static const u32 g_idxattc2[RTW8851B_RXK_GROUP_NR] = {0x0, 0xf, 0x0, 0xf}; - static const u32 g_idxrxagc[RTW8851B_RXK_GROUP_NR] = {0x0, 0x1, 0x2, 0x3}; -@@ -2596,6 +2607,521 @@ static void _rck(struct rtw89_dev *rtwde - rtw89_read_rf(rtwdev, path, RR_RCKC, RFREG_MASK)); - } - -+static void _tssi_set_sys(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ enum rtw89_band band = chan->band_type; -+ -+ rtw89_rfk_parser(rtwdev, &rtw8851b_tssi_sys_defs_tbl); -+ -+ rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G, -+ &rtw8851b_tssi_sys_a_defs_2g_tbl, -+ &rtw8851b_tssi_sys_a_defs_5g_tbl); -+} -+ -+static void _tssi_ini_txpwr_ctrl_bb(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser(rtwdev, &rtw8851b_tssi_init_txpwr_defs_a_tbl); -+} -+ -+static void _tssi_ini_txpwr_ctrl_bb_he_tb(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser(rtwdev, &rtw8851b_tssi_init_txpwr_he_tb_defs_a_tbl); -+} -+ -+static void _tssi_set_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser(rtwdev, &rtw8851b_tssi_dck_defs_a_tbl); -+} -+ -+static void _tssi_set_tmeter_tbl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+#define RTW8851B_TSSI_GET_VAL(ptr, idx) \ -+({ \ -+ s8 *__ptr = (ptr); \ -+ u8 __idx = (idx), __i, __v; \ -+ u32 __val = 0; \ -+ for (__i = 0; __i < 4; __i++) { \ -+ __v = (__ptr[__idx + __i]); \ -+ __val |= (__v << (8 * __i)); \ -+ } \ -+ __val; \ -+}) -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u8 ch = chan->channel; -+ u8 subband = chan->subband_type; -+ const s8 *thm_up_a = NULL; -+ const s8 *thm_down_a = NULL; -+ u8 thermal = 0xff; -+ s8 thm_ofst[64] = {0}; -+ u32 tmp = 0; -+ u8 i, j; -+ -+ switch (subband) { -+ default: -+ case RTW89_CH_2G: -+ thm_up_a = rtw89_8851b_trk_cfg.delta_swingidx_2ga_p; -+ thm_down_a = rtw89_8851b_trk_cfg.delta_swingidx_2ga_n; -+ break; -+ case RTW89_CH_5G_BAND_1: -+ thm_up_a = rtw89_8851b_trk_cfg.delta_swingidx_5ga_p[0]; -+ thm_down_a = rtw89_8851b_trk_cfg.delta_swingidx_5ga_n[0]; -+ break; -+ case RTW89_CH_5G_BAND_3: -+ thm_up_a = rtw89_8851b_trk_cfg.delta_swingidx_5ga_p[1]; -+ thm_down_a = rtw89_8851b_trk_cfg.delta_swingidx_5ga_n[1]; -+ break; -+ case RTW89_CH_5G_BAND_4: -+ thm_up_a = rtw89_8851b_trk_cfg.delta_swingidx_5ga_p[2]; -+ thm_down_a = rtw89_8851b_trk_cfg.delta_swingidx_5ga_n[2]; -+ break; -+ } -+ -+ if (path == RF_PATH_A) { -+ thermal = tssi_info->thermal[RF_PATH_A]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] ch=%d thermal_pathA=0x%x\n", ch, thermal); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER_DIS, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER_TRK, 0x1); -+ -+ if (thermal == 0xff) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER, 32); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_VAL, 32); -+ -+ for (i = 0; i < 64; i += 4) { -+ rtw89_phy_write32(rtwdev, R_P0_TSSI_BASE + i, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] write 0x%x val=0x%08x\n", -+ R_P0_TSSI_BASE + i, 0x0); -+ } -+ -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_P0_TMETER, B_P0_TMETER, -+ thermal); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, B_P0_RFCTM_VAL, -+ thermal); -+ -+ i = 0; -+ for (j = 0; j < 32; j++) -+ thm_ofst[j] = i < DELTA_SWINGIDX_SIZE ? -+ -thm_down_a[i++] : -+ -thm_down_a[DELTA_SWINGIDX_SIZE - 1]; -+ -+ i = 1; -+ for (j = 63; j >= 32; j--) -+ thm_ofst[j] = i < DELTA_SWINGIDX_SIZE ? -+ thm_up_a[i++] : -+ thm_up_a[DELTA_SWINGIDX_SIZE - 1]; -+ -+ for (i = 0; i < 64; i += 4) { -+ tmp = RTW8851B_TSSI_GET_VAL(thm_ofst, i); -+ rtw89_phy_write32(rtwdev, R_P0_TSSI_BASE + i, tmp); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] write 0x%x val=0x%08x\n", -+ 0x5c00 + i, tmp); -+ } -+ } -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, R_P0_RFCTM_RDY, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P0_RFCTM, R_P0_RFCTM_RDY, 0x0); -+ } -+#undef RTW8851B_TSSI_GET_VAL -+} -+ -+static void _tssi_set_dac_gain_tbl(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser(rtwdev, &rtw8851b_tssi_dac_gain_defs_a_tbl); -+} -+ -+static void _tssi_slope_cal_org(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ enum rtw89_band band = chan->band_type; -+ -+ rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G, -+ &rtw8851b_tssi_slope_a_defs_2g_tbl, -+ &rtw8851b_tssi_slope_a_defs_5g_tbl); -+} -+ -+static void _tssi_alignment_default(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path, bool all) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ enum rtw89_band band = chan->band_type; -+ -+ rtw89_rfk_parser_by_cond(rtwdev, band == RTW89_BAND_2G, -+ &rtw8851b_tssi_align_a_2g_defs_tbl, -+ &rtw8851b_tssi_align_a_5g_defs_tbl); -+} -+ -+static void _tssi_set_tssi_slope(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser(rtwdev, &rtw8851b_tssi_slope_defs_a_tbl); -+} -+ -+static void _tssi_set_tssi_track(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser(rtwdev, &rtw8851b_tssi_track_defs_a_tbl); -+} -+ -+static void _tssi_set_txagc_offset_mv_avg(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ rtw89_rfk_parser(rtwdev, &rtw8851b_tssi_mv_avg_defs_a_tbl); -+} -+ -+static void _tssi_enable(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ _tssi_set_tssi_track(rtwdev, phy, RF_PATH_A); -+ _tssi_set_txagc_offset_mv_avg(rtwdev, phy, RF_PATH_A); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_MV_AVG, B_P0_TSSI_MV_CLR, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_AVG, B_P0_TSSI_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_AVG, B_P0_TSSI_EN, 0x1); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_TXGA_V1, RR_TXGA_V1_TRK_EN, 0x1); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_RFC, 0x3); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT, 0xc0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x1); -+ -+ rtwdev->is_tssi_mode[RF_PATH_A] = true; -+} -+ -+static void _tssi_disable(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_AVG, B_P0_TSSI_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_MV_AVG, B_P0_TSSI_MV_CLR, 0x1); -+ -+ rtwdev->is_tssi_mode[RF_PATH_A] = false; -+} -+ -+static u32 _tssi_get_cck_group(struct rtw89_dev *rtwdev, u8 ch) -+{ -+ switch (ch) { -+ case 1 ... 2: -+ return 0; -+ case 3 ... 5: -+ return 1; -+ case 6 ... 8: -+ return 2; -+ case 9 ... 11: -+ return 3; -+ case 12 ... 13: -+ return 4; -+ case 14: -+ return 5; -+ } -+ -+ return 0; -+} -+ -+#define TSSI_EXTRA_GROUP_BIT (BIT(31)) -+#define TSSI_EXTRA_GROUP(idx) (TSSI_EXTRA_GROUP_BIT | (idx)) -+#define IS_TSSI_EXTRA_GROUP(group) ((group) & TSSI_EXTRA_GROUP_BIT) -+#define TSSI_EXTRA_GET_GROUP_IDX1(group) ((group) & ~TSSI_EXTRA_GROUP_BIT) -+#define TSSI_EXTRA_GET_GROUP_IDX2(group) (TSSI_EXTRA_GET_GROUP_IDX1(group) + 1) -+ -+static u32 _tssi_get_ofdm_group(struct rtw89_dev *rtwdev, u8 ch) -+{ -+ switch (ch) { -+ case 1 ... 2: -+ return 0; -+ case 3 ... 5: -+ return 1; -+ case 6 ... 8: -+ return 2; -+ case 9 ... 11: -+ return 3; -+ case 12 ... 14: -+ return 4; -+ case 36 ... 40: -+ return 5; -+ case 41 ... 43: -+ return TSSI_EXTRA_GROUP(5); -+ case 44 ... 48: -+ return 6; -+ case 49 ... 51: -+ return TSSI_EXTRA_GROUP(6); -+ case 52 ... 56: -+ return 7; -+ case 57 ... 59: -+ return TSSI_EXTRA_GROUP(7); -+ case 60 ... 64: -+ return 8; -+ case 100 ... 104: -+ return 9; -+ case 105 ... 107: -+ return TSSI_EXTRA_GROUP(9); -+ case 108 ... 112: -+ return 10; -+ case 113 ... 115: -+ return TSSI_EXTRA_GROUP(10); -+ case 116 ... 120: -+ return 11; -+ case 121 ... 123: -+ return TSSI_EXTRA_GROUP(11); -+ case 124 ... 128: -+ return 12; -+ case 129 ... 131: -+ return TSSI_EXTRA_GROUP(12); -+ case 132 ... 136: -+ return 13; -+ case 137 ... 139: -+ return TSSI_EXTRA_GROUP(13); -+ case 140 ... 144: -+ return 14; -+ case 149 ... 153: -+ return 15; -+ case 154 ... 156: -+ return TSSI_EXTRA_GROUP(15); -+ case 157 ... 161: -+ return 16; -+ case 162 ... 164: -+ return TSSI_EXTRA_GROUP(16); -+ case 165 ... 169: -+ return 17; -+ case 170 ... 172: -+ return TSSI_EXTRA_GROUP(17); -+ case 173 ... 177: -+ return 18; -+ } -+ -+ return 0; -+} -+ -+static u32 _tssi_get_trim_group(struct rtw89_dev *rtwdev, u8 ch) -+{ -+ switch (ch) { -+ case 1 ... 8: -+ return 0; -+ case 9 ... 14: -+ return 1; -+ case 36 ... 48: -+ return 2; -+ case 52 ... 64: -+ return 3; -+ case 100 ... 112: -+ return 4; -+ case 116 ... 128: -+ return 5; -+ case 132 ... 144: -+ return 6; -+ case 149 ... 177: -+ return 7; -+ } -+ -+ return 0; -+} -+ -+static s8 _tssi_get_ofdm_de(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u32 gidx, gidx_1st, gidx_2nd; -+ u8 ch = chan->channel; -+ s8 de_1st; -+ s8 de_2nd; -+ s8 val; -+ -+ gidx = _tssi_get_ofdm_group(rtwdev, ch); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs group_idx=0x%x\n", path, gidx); -+ -+ if (IS_TSSI_EXTRA_GROUP(gidx)) { -+ gidx_1st = TSSI_EXTRA_GET_GROUP_IDX1(gidx); -+ gidx_2nd = TSSI_EXTRA_GET_GROUP_IDX2(gidx); -+ de_1st = tssi_info->tssi_mcs[path][gidx_1st]; -+ de_2nd = tssi_info->tssi_mcs[path][gidx_2nd]; -+ val = (de_1st + de_2nd) / 2; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs de=%d 1st=%d 2nd=%d\n", -+ path, val, de_1st, de_2nd); -+ } else { -+ val = tssi_info->tssi_mcs[path][gidx]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs de=%d\n", path, val); -+ } -+ -+ return val; -+} -+ -+static s8 _tssi_get_ofdm_trim_de(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, -+ enum rtw89_rf_path path) -+{ -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u32 tgidx, tgidx_1st, tgidx_2nd; -+ u8 ch = chan->channel; -+ s8 tde_1st; -+ s8 tde_2nd; -+ s8 val; -+ -+ tgidx = _tssi_get_trim_group(rtwdev, ch); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs trim_group_idx=0x%x\n", -+ path, tgidx); -+ -+ if (IS_TSSI_EXTRA_GROUP(tgidx)) { -+ tgidx_1st = TSSI_EXTRA_GET_GROUP_IDX1(tgidx); -+ tgidx_2nd = TSSI_EXTRA_GET_GROUP_IDX2(tgidx); -+ tde_1st = tssi_info->tssi_trim[path][tgidx_1st]; -+ tde_2nd = tssi_info->tssi_trim[path][tgidx_2nd]; -+ val = (tde_1st + tde_2nd) / 2; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs trim_de=%d 1st=%d 2nd=%d\n", -+ path, val, tde_1st, tde_2nd); -+ } else { -+ val = tssi_info->tssi_trim[path][tgidx]; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs trim_de=%d\n", -+ path, val); -+ } -+ -+ return val; -+} -+ -+static void _tssi_set_efuse_to_de(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u8 ch = chan->channel; -+ u8 gidx; -+ s8 ofdm_de; -+ s8 trim_de; -+ s32 val; -+ u32 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI][TRIM]: phy=%d ch=%d\n", -+ phy, ch); -+ -+ for (i = RF_PATH_A; i < RTW8851B_TSSI_PATH_NR; i++) { -+ gidx = _tssi_get_cck_group(rtwdev, ch); -+ trim_de = _tssi_get_ofdm_trim_de(rtwdev, phy, i); -+ val = tssi_info->tssi_cck[i][gidx] + trim_de; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d cck[%d]=0x%x trim=0x%x\n", -+ i, gidx, tssi_info->tssi_cck[i][gidx], trim_de); -+ -+ rtw89_phy_write32_mask(rtwdev, _tssi_de_cck_long[i], _TSSI_DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, _tssi_de_cck_short[i], _TSSI_DE_MASK, val); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] Set TSSI CCK DE 0x%x[21:12]=0x%x\n", -+ _tssi_de_cck_long[i], -+ rtw89_phy_read32_mask(rtwdev, _tssi_de_cck_long[i], -+ _TSSI_DE_MASK)); -+ -+ ofdm_de = _tssi_get_ofdm_de(rtwdev, phy, i); -+ trim_de = _tssi_get_ofdm_trim_de(rtwdev, phy, i); -+ val = ofdm_de + trim_de; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI][TRIM]: path=%d mcs=0x%x trim=0x%x\n", -+ i, ofdm_de, trim_de); -+ -+ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_20m[i], _TSSI_DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_40m[i], _TSSI_DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_80m[i], _TSSI_DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_80m_80m[i], _TSSI_DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_5m[i], _TSSI_DE_MASK, val); -+ rtw89_phy_write32_mask(rtwdev, _tssi_de_mcs_10m[i], _TSSI_DE_MASK, val); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, -+ "[TSSI] Set TSSI MCS DE 0x%x[21:12]=0x%x\n", -+ _tssi_de_mcs_20m[i], -+ rtw89_phy_read32_mask(rtwdev, _tssi_de_mcs_20m[i], -+ _TSSI_DE_MASK)); -+ } -+} -+ -+static void _tssi_alimentk_dump_result(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) -+{ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[TSSI PA K]\n0x%x = 0x%08x\n0x%x = 0x%08x\n0x%x = 0x%08x\n0x%x = 0x%08x\n" -+ "0x%x = 0x%08x\n0x%x = 0x%08x\n0x%x = 0x%08x\n0x%x = 0x%08x\n", -+ R_TSSI_PA_K1 + (path << 13), -+ rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K1 + (path << 13), MASKDWORD), -+ R_TSSI_PA_K2 + (path << 13), -+ rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K2 + (path << 13), MASKDWORD), -+ R_P0_TSSI_ALIM1 + (path << 13), -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM1 + (path << 13), MASKDWORD), -+ R_P0_TSSI_ALIM3 + (path << 13), -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM3 + (path << 13), MASKDWORD), -+ R_TSSI_PA_K5 + (path << 13), -+ rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K5 + (path << 13), MASKDWORD), -+ R_P0_TSSI_ALIM2 + (path << 13), -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM2 + (path << 13), MASKDWORD), -+ R_P0_TSSI_ALIM4 + (path << 13), -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_ALIM4 + (path << 13), MASKDWORD), -+ R_TSSI_PA_K8 + (path << 13), -+ rtw89_phy_read32_mask(rtwdev, R_TSSI_PA_K8 + (path << 13), MASKDWORD)); -+} -+ -+static void _tssi_alimentk_done(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, enum rtw89_rf_path path) -+{ -+ struct rtw89_tssi_info *tssi_info = &rtwdev->tssi; -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u8 channel = chan->channel; -+ u8 band; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "======>%s phy=%d path=%d\n", __func__, phy, path); -+ -+ if (channel >= 1 && channel <= 14) -+ band = TSSI_ALIMK_2G; -+ else if (channel >= 36 && channel <= 64) -+ band = TSSI_ALIMK_5GL; -+ else if (channel >= 100 && channel <= 144) -+ band = TSSI_ALIMK_5GM; -+ else if (channel >= 149 && channel <= 177) -+ band = TSSI_ALIMK_5GH; -+ else -+ band = TSSI_ALIMK_2G; -+ -+ if (tssi_info->alignment_done[path][band]) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM1 + (path << 13), MASKDWORD, -+ tssi_info->alignment_value[path][band][0]); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM3 + (path << 13), MASKDWORD, -+ tssi_info->alignment_value[path][band][1]); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM2 + (path << 13), MASKDWORD, -+ tssi_info->alignment_value[path][band][2]); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_ALIM4 + (path << 13), MASKDWORD, -+ tssi_info->alignment_value[path][band][3]); -+ } -+ -+ _tssi_alimentk_dump_result(rtwdev, path); -+} -+ - static void rtw8851b_by_rate_dpd(struct rtw89_dev *rtwdev) - { - rtw89_write32_mask(rtwdev, R_AX_PWR_SWING_OTHER_CTRL0, -@@ -2712,6 +3238,97 @@ void rtw8851b_dpk_track(struct rtw89_dev - _dpk_track(rtwdev); - } - -+void rtw8851b_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool hwtx_en) -+{ -+ u8 phy_map = rtw89_btc_phymap(rtwdev, phy, RF_A); -+ u8 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TSSI, "[TSSI] %s: phy=%d\n", __func__, phy); -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_START); -+ -+ _tssi_disable(rtwdev, phy); -+ -+ for (i = RF_PATH_A; i < RF_PATH_NUM_8851B; i++) { -+ _tssi_set_sys(rtwdev, phy, i); -+ _tssi_ini_txpwr_ctrl_bb(rtwdev, phy, i); -+ _tssi_ini_txpwr_ctrl_bb_he_tb(rtwdev, phy, i); -+ _tssi_set_dck(rtwdev, phy, i); -+ _tssi_set_tmeter_tbl(rtwdev, phy, i); -+ _tssi_set_dac_gain_tbl(rtwdev, phy, i); -+ _tssi_slope_cal_org(rtwdev, phy, i); -+ _tssi_alignment_default(rtwdev, phy, i, true); -+ _tssi_set_tssi_slope(rtwdev, phy, i); -+ } -+ -+ _tssi_enable(rtwdev, phy); -+ _tssi_set_efuse_to_de(rtwdev, phy); -+ -+ rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_STOP); -+} -+ -+void rtw8851b_tssi_scan(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u8 channel = chan->channel; -+ u32 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "======>%s phy=%d channel=%d\n", __func__, phy, channel); -+ -+ _tssi_disable(rtwdev, phy); -+ -+ for (i = RF_PATH_A; i < RF_PATH_NUM_8851B; i++) { -+ _tssi_set_sys(rtwdev, phy, i); -+ _tssi_set_tmeter_tbl(rtwdev, phy, i); -+ _tssi_slope_cal_org(rtwdev, phy, i); -+ _tssi_alignment_default(rtwdev, phy, i, true); -+ } -+ -+ _tssi_enable(rtwdev, phy); -+ _tssi_set_efuse_to_de(rtwdev, phy); -+} -+ -+static void rtw8851b_tssi_default_txagc(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy, bool enable) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u8 channel = chan->channel; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "======> %s ch=%d\n", -+ __func__, channel); -+ -+ if (enable) -+ return; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "======>%s 1 SCAN_END Set 0x5818[7:0]=0x%x\n", -+ __func__, -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT)); -+ -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT, 0xc0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT_EN, 0x1); -+ -+ _tssi_alimentk_done(rtwdev, phy, RF_PATH_A); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "======>%s 2 SCAN_END Set 0x5818[7:0]=0x%x\n", -+ __func__, -+ rtw89_phy_read32_mask(rtwdev, R_P0_TSSI_TRK, B_P0_TSSI_OFT)); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "======> %s SCAN_END\n", __func__); -+} -+ -+void rtw8851b_wifi_scan_notify(struct rtw89_dev *rtwdev, bool scan_start, -+ enum rtw89_phy_idx phy_idx) -+{ -+ if (scan_start) -+ rtw8851b_tssi_default_txagc(rtwdev, phy_idx, true); -+ else -+ rtw8851b_tssi_default_txagc(rtwdev, phy_idx, false); -+} -+ - static void _bw_setting(struct rtw89_dev *rtwdev, enum rtw89_rf_path path, - enum rtw89_bandwidth bw, bool dav) - { ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -@@ -15,6 +15,10 @@ void rtw8851b_rx_dck(struct rtw89_dev *r - void rtw8851b_dpk_init(struct rtw89_dev *rtwdev); - void rtw8851b_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy); - void rtw8851b_dpk_track(struct rtw89_dev *rtwdev); -+void rtw8851b_tssi(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy, bool hwtx_en); -+void rtw8851b_tssi_scan(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy); -+void rtw8851b_wifi_scan_notify(struct rtw89_dev *rtwdev, bool scan_start, -+ enum rtw89_phy_idx phy_idx); - void rtw8851b_set_channel_rf(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, - enum rtw89_phy_idx phy_idx); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-103-wifi-rtw89-ser-reset-total_sta_assoc-and-tdls_peer-w.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-103-wifi-rtw89-ser-reset-total_sta_assoc-and-tdls_peer-w.patch deleted file mode 100644 index 9469d7744..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-103-wifi-rtw89-ser-reset-total_sta_assoc-and-tdls_peer-w.patch +++ /dev/null @@ -1,39 +0,0 @@ -From cda66049bab5273c61f09a4ea8c09d1de4d64fc0 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Tue, 16 May 2023 16:24:39 +0800 -Subject: [PATCH 103/136] wifi: rtw89: ser: reset total_sta_assoc and tdls_peer - when L2 - -The total_sta_assoc and the tdls_peer are used for statistics accodring -to stations' information. L2 (Level 2) SER (system error recovery) will -call ieee80211_restart_hw() which re-invokes sta_state ops. And then, -the total_sta_assoc and tdls_peer will be re-increased. In case wrong -statistics results, we reset them in SER L2 handling. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230516082441.11154-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/ser.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/ser.c -+++ b/drivers/net/wireless/realtek/rtw89/ser.c -@@ -303,6 +303,7 @@ static void ser_reset_vif(struct rtw89_d - rtw89_core_release_bit_map(rtwdev->hw_port, rtwvif->port); - rtwvif->net_type = RTW89_NET_TYPE_NO_LINK; - rtwvif->trigger = false; -+ rtwvif->tdls_peer = 0; - } - - static void ser_sta_deinit_cam_iter(void *data, struct ieee80211_sta *sta) -@@ -341,6 +342,8 @@ static void ser_reset_mac_binding(struct - rtw89_core_release_all_bits_map(rtwdev->mac_id_map, RTW89_MAX_MAC_ID_NUM); - rtw89_for_each_rtwvif(rtwdev, rtwvif) - ser_reset_vif(rtwdev, rtwvif); -+ -+ rtwdev->total_sta_assoc = 0; - } - - /* hal function */ diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-104-wifi-rtw89-tweak-H2C-TX-waiting-function-for-SER.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-104-wifi-rtw89-tweak-H2C-TX-waiting-function-for-SER.patch deleted file mode 100644 index c105c86a0..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-104-wifi-rtw89-tweak-H2C-TX-waiting-function-for-SER.patch +++ /dev/null @@ -1,78 +0,0 @@ -From b79a84fbbdb0a715b130ab470c241db211539dfb Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Tue, 16 May 2023 16:24:40 +0800 -Subject: [PATCH 104/136] wifi: rtw89: tweak H2C TX waiting function for SER - -Some specific H2C (host to chip command) needs waiting until FW ACK by -C2H (chip to host event). However, during SER (system error recovery), -most interrupts are disabled, so we can't receive C2H immediately. It -causes this kind of H2C TX waits will always time out during SER. - -To save time spent by SER, we don't do these redundant waits. And, to -make a difference from -ETIMEDOUT in other cases, we make the function -return 1 for SER case. When some H2C callers really catch `ret == 1` at -runtime, they can determine whether it's reasonable or not, and consider -how to resolve their flow if needed. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230516082441.11154-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 1 + - drivers/net/wireless/realtek/rtw89/fw.c | 8 ++++++++ - drivers/net/wireless/realtek/rtw89/ser.c | 2 ++ - 3 files changed, 11 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3505,6 +3505,7 @@ enum rtw89_flags { - RTW89_FLAG_LOW_POWER_MODE, - RTW89_FLAG_INACTIVE_PS, - RTW89_FLAG_CRASH_SIMULATING, -+ RTW89_FLAG_SER_HANDLING, - RTW89_FLAG_WOWLAN, - RTW89_FLAG_FORBIDDEN_TRACK_WROK, - RTW89_FLAG_CHANGING_INTERFACE, ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -3792,6 +3792,11 @@ fail: - return ret; - } - -+/* Return < 0, if failures happen during waiting for the condition. -+ * Return 0, when waiting for the condition succeeds. -+ * Return > 0, if the wait is considered unreachable due to driver/FW design, -+ * where 1 means during SER. -+ */ - static int rtw89_h2c_tx_and_wait(struct rtw89_dev *rtwdev, struct sk_buff *skb, - struct rtw89_wait_info *wait, unsigned int cond) - { -@@ -3804,6 +3809,9 @@ static int rtw89_h2c_tx_and_wait(struct - return -EBUSY; - } - -+ if (test_bit(RTW89_FLAG_SER_HANDLING, rtwdev->flags)) -+ return 1; -+ - return rtw89_wait_for_cond(wait, cond); - } - ---- a/drivers/net/wireless/realtek/rtw89/ser.c -+++ b/drivers/net/wireless/realtek/rtw89/ser.c -@@ -409,6 +409,7 @@ static void ser_idle_st_hdl(struct rtw89 - switch (evt) { - case SER_EV_STATE_IN: - rtw89_hci_recovery_complete(rtwdev); -+ clear_bit(RTW89_FLAG_SER_HANDLING, rtwdev->flags); - clear_bit(RTW89_FLAG_CRASH_SIMULATING, rtwdev->flags); - break; - case SER_EV_L1_RESET_PREPARE: -@@ -421,6 +422,7 @@ static void ser_idle_st_hdl(struct rtw89 - ser_state_goto(ser, SER_L2_RESET_ST); - break; - case SER_EV_STATE_OUT: -+ set_bit(RTW89_FLAG_SER_HANDLING, rtwdev->flags); - rtw89_hci_recovery_start(rtwdev); - break; - default: diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-105-wifi-rtw89-refine-packet-offload-handling-under-SER.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-105-wifi-rtw89-refine-packet-offload-handling-under-SER.patch deleted file mode 100644 index cc1cb2205..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-105-wifi-rtw89-refine-packet-offload-handling-under-SER.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 8b21c08ef7df41aa615439beac323a7b3b1df0e6 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Tue, 16 May 2023 16:24:41 +0800 -Subject: [PATCH 105/136] wifi: rtw89: refine packet offload handling under SER - -H2C of packet offload needs to wait FW ACK by C2H. But, it's possible -that packet offload happens during SER (system error recovery), e.g. -SER L2 which restarts HW. More, packet offload flow isn't deferrable. -So, the H2C wait may get `ret == 1` (unreachable). - -However, the logic FW deals with packet offload is simple enough, just -clone content. It means that as long as the H2C is issued successfully, -the thing will succeed sooner or later. Therefore, after we add a debug -log when receiving ACK to packet offload, it would be acceptable that -during SER, packet offload don't really wait for ACK. And, if debugging, -we can still check its debug logs. Besides, we can expect that if we see -SER before receiving ACK to packet offload, those debug logs of the ACK -have a time difference. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230516082441.11154-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 4 ++-- - drivers/net/wireless/realtek/rtw89/mac.c | 3 +++ - 2 files changed, 5 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -2467,7 +2467,7 @@ int rtw89_fw_h2c_del_pkt_offload(struct - cond = RTW89_FW_OFLD_WAIT_COND_PKT_OFLD(id, RTW89_PKT_OFLD_OP_DEL); - - ret = rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); -- if (ret) { -+ if (ret < 0) { - rtw89_debug(rtwdev, RTW89_DBG_FW, - "failed to del pkt ofld: id %d, ret %d\n", - id, ret); -@@ -2517,7 +2517,7 @@ int rtw89_fw_h2c_add_pkt_offload(struct - cond = RTW89_FW_OFLD_WAIT_COND_PKT_OFLD(alloc_id, RTW89_PKT_OFLD_OP_ADD); - - ret = rtw89_h2c_tx_and_wait(rtwdev, skb, wait, cond); -- if (ret) { -+ if (ret < 0) { - rtw89_debug(rtwdev, RTW89_DBG_FW, - "failed to add pkt ofld: id %d, ret %d\n", - alloc_id, ret); ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -4460,6 +4460,9 @@ rtw89_mac_c2h_pkt_ofld_rsp(struct rtw89_ - struct rtw89_completion_data data = {}; - unsigned int cond; - -+ rtw89_debug(rtwdev, RTW89_DBG_FW, "pkt ofld rsp: id %d op %d len %d\n", -+ pkt_id, pkt_op, pkt_len); -+ - data.err = !pkt_len; - cond = RTW89_FW_OFLD_WAIT_COND_PKT_OFLD(pkt_id, pkt_op); - diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-106-wifi-rtw89-8851b-add-TX-power-related-functions.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-106-wifi-rtw89-8851b-add-TX-power-related-functions.patch deleted file mode 100644 index fa4c8804a..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-106-wifi-rtw89-8851b-add-TX-power-related-functions.patch +++ /dev/null @@ -1,306 +0,0 @@ -From 76f2516f79373e17974ce03c52eba4cfea8483e9 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 19 May 2023 11:14:54 +0800 -Subject: [PATCH 106/136] wifi: rtw89: 8851b: add TX power related functions - -Get TX power value from tables according to selected country and channel, -and set proper power to registers. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230519031500.21087-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 254 ++++++++++++++++++ - 1 file changed, 254 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -448,6 +448,34 @@ static void rtw8851b_phycap_parsing_ther - } - } - -+static void rtw8851b_thermal_trim(struct rtw89_dev *rtwdev) -+{ -+#define __thm_setting(raw) \ -+({ \ -+ u8 __v = (raw); \ -+ ((__v & 0x1) << 3) | ((__v & 0x1f) >> 1); \ -+}) -+ struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; -+ u8 i, val; -+ -+ if (!info->pg_thermal_trim) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[THERMAL][TRIM] no PG, do nothing\n"); -+ -+ return; -+ } -+ -+ for (i = 0; i < RF_PATH_NUM_8851B; i++) { -+ val = __thm_setting(info->thermal_trim[i]); -+ rtw89_write_rf(rtwdev, i, RR_TM2, RR_TM2_OFF, val); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[THERMAL][TRIM] path=%d thermal_setting=0x%x\n", -+ i, val); -+ } -+#undef __thm_setting -+} -+ - static void rtw8851b_phycap_parsing_pa_bias_trim(struct rtw89_dev *rtwdev, - u8 *phycap_map) - { -@@ -468,6 +496,32 @@ static void rtw8851b_phycap_parsing_pa_b - } - } - -+static void rtw8851b_pa_bias_trim(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_power_trim_info *info = &rtwdev->pwr_trim; -+ u8 pabias_2g, pabias_5g; -+ u8 i; -+ -+ if (!info->pg_pa_bias_trim) { -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[PA_BIAS][TRIM] no PG, do nothing\n"); -+ -+ return; -+ } -+ -+ for (i = 0; i < RF_PATH_NUM_8851B; i++) { -+ pabias_2g = u8_get_bits(info->pa_bias_trim[i], GENMASK(3, 0)); -+ pabias_5g = u8_get_bits(info->pa_bias_trim[i], GENMASK(7, 4)); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[PA_BIAS][TRIM] path=%d 2G=0x%x 5G=0x%x\n", -+ i, pabias_2g, pabias_5g); -+ -+ rtw89_write_rf(rtwdev, i, RR_BIASA, RR_BIASA_TXG, pabias_2g); -+ rtw89_write_rf(rtwdev, i, RR_BIASA, RR_BIASA_TXA, pabias_5g); -+ } -+} -+ - static void rtw8851b_phycap_parsing_gain_comp(struct rtw89_dev *rtwdev, u8 *phycap_map) - { - static const u32 comp_addrs[][RTW89_SUBBAND_2GHZ_5GHZ_NR] = { -@@ -565,6 +619,12 @@ static void rtw8851b_rfe_gpio(struct rtw - } - } - -+static void rtw8851b_power_trim(struct rtw89_dev *rtwdev) -+{ -+ rtw8851b_thermal_trim(rtwdev); -+ rtw8851b_pa_bias_trim(rtwdev); -+} -+ - static void rtw8851b_set_channel_mac(struct rtw89_dev *rtwdev, - const struct rtw89_chan *chan, - u8 mac_idx) -@@ -1355,6 +1415,195 @@ static void rtw8851b_set_channel_help(st - } - } - -+static u32 rtw8851b_bb_cal_txpwr_ref(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx, s16 ref) -+{ -+ const u16 tssi_16dbm_cw = 0x12c; -+ const u8 base_cw_0db = 0x27; -+ const s8 ofst_int = 0; -+ s16 pwr_s10_3; -+ s16 rf_pwr_cw; -+ u16 bb_pwr_cw; -+ u32 pwr_cw; -+ u32 tssi_ofst_cw; -+ -+ pwr_s10_3 = (ref << 1) + (s16)(ofst_int) + (s16)(base_cw_0db << 3); -+ bb_pwr_cw = u16_get_bits(pwr_s10_3, GENMASK(2, 0)); -+ rf_pwr_cw = u16_get_bits(pwr_s10_3, GENMASK(8, 3)); -+ rf_pwr_cw = clamp_t(s16, rf_pwr_cw, 15, 63); -+ pwr_cw = (rf_pwr_cw << 3) | bb_pwr_cw; -+ -+ tssi_ofst_cw = (u32)((s16)tssi_16dbm_cw + (ref << 1) - (16 << 3)); -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -+ "[TXPWR] tssi_ofst_cw=%d rf_cw=0x%x bb_cw=0x%x\n", -+ tssi_ofst_cw, rf_pwr_cw, bb_pwr_cw); -+ -+ return u32_encode_bits(tssi_ofst_cw, B_DPD_TSSI_CW) | -+ u32_encode_bits(pwr_cw, B_DPD_PWR_CW) | -+ u32_encode_bits(ref, B_DPD_REF); -+} -+ -+static void rtw8851b_set_txpwr_ref(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ static const u32 addr[RF_PATH_NUM_8851B] = {0x5800}; -+ const u32 mask = B_DPD_TSSI_CW | B_DPD_PWR_CW | B_DPD_REF; -+ const u8 ofst_ofdm = 0x4; -+ const u8 ofst_cck = 0x8; -+ const s16 ref_ofdm = 0; -+ const s16 ref_cck = 0; -+ u32 val; -+ u8 i; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set txpwr reference\n"); -+ -+ rtw89_mac_txpwr_write32_mask(rtwdev, phy_idx, R_AX_PWR_RATE_CTRL, -+ B_AX_PWR_REF, 0x0); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set bb ofdm txpwr ref\n"); -+ val = rtw8851b_bb_cal_txpwr_ref(rtwdev, phy_idx, ref_ofdm); -+ -+ for (i = 0; i < RF_PATH_NUM_8851B; i++) -+ rtw89_phy_write32_idx(rtwdev, addr[i] + ofst_ofdm, mask, val, -+ phy_idx); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set bb cck txpwr ref\n"); -+ val = rtw8851b_bb_cal_txpwr_ref(rtwdev, phy_idx, ref_cck); -+ -+ for (i = 0; i < RF_PATH_NUM_8851B; i++) -+ rtw89_phy_write32_idx(rtwdev, addr[i] + ofst_cck, mask, val, -+ phy_idx); -+} -+ -+static void rtw8851b_bb_set_tx_shape_dfir(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ u8 tx_shape_idx, -+ enum rtw89_phy_idx phy_idx) -+{ -+#define __DFIR_CFG_ADDR(i) (R_TXFIR0 + ((i) << 2)) -+#define __DFIR_CFG_MASK 0xffffffff -+#define __DFIR_CFG_NR 8 -+#define __DECL_DFIR_PARAM(_name, _val...) \ -+ static const u32 param_ ## _name[] = {_val}; \ -+ static_assert(ARRAY_SIZE(param_ ## _name) == __DFIR_CFG_NR) -+ -+ __DECL_DFIR_PARAM(flat, -+ 0x023D23FF, 0x0029B354, 0x000FC1C8, 0x00FDB053, -+ 0x00F86F9A, 0x06FAEF92, 0x00FE5FCC, 0x00FFDFF5); -+ __DECL_DFIR_PARAM(sharp, -+ 0x023D83FF, 0x002C636A, 0x0013F204, 0x00008090, -+ 0x00F87FB0, 0x06F99F83, 0x00FDBFBA, 0x00003FF5); -+ __DECL_DFIR_PARAM(sharp_14, -+ 0x023B13FF, 0x001C42DE, 0x00FDB0AD, 0x00F60F6E, -+ 0x00FD8F92, 0x0602D011, 0x0001C02C, 0x00FFF00A); -+ u8 ch = chan->channel; -+ const u32 *param; -+ u32 addr; -+ int i; -+ -+ if (ch > 14) { -+ rtw89_warn(rtwdev, -+ "set tx shape dfir by unknown ch: %d on 2G\n", ch); -+ return; -+ } -+ -+ if (ch == 14) -+ param = param_sharp_14; -+ else -+ param = tx_shape_idx == 0 ? param_flat : param_sharp; -+ -+ for (i = 0; i < __DFIR_CFG_NR; i++) { -+ addr = __DFIR_CFG_ADDR(i); -+ rtw89_debug(rtwdev, RTW89_DBG_TXPWR, -+ "set tx shape dfir: 0x%x: 0x%x\n", addr, param[i]); -+ rtw89_phy_write32_idx(rtwdev, addr, __DFIR_CFG_MASK, param[i], -+ phy_idx); -+ } -+ -+#undef __DECL_DFIR_PARAM -+#undef __DFIR_CFG_NR -+#undef __DFIR_CFG_MASK -+#undef __DECL_CFG_ADDR -+} -+ -+static void rtw8851b_set_tx_shape(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ u8 band = chan->band_type; -+ u8 regd = rtw89_regd_get(rtwdev, band); -+ u8 tx_shape_cck = rtw89_8851b_tx_shape[band][RTW89_RS_CCK][regd]; -+ u8 tx_shape_ofdm = rtw89_8851b_tx_shape[band][RTW89_RS_OFDM][regd]; -+ -+ if (band == RTW89_BAND_2G) -+ rtw8851b_bb_set_tx_shape_dfir(rtwdev, chan, tx_shape_cck, phy_idx); -+ -+ rtw89_phy_write32_mask(rtwdev, R_DCFO_OPT, B_TXSHAPE_TRIANGULAR_CFG, -+ tx_shape_ofdm); -+} -+ -+static void rtw8851b_set_txpwr(struct rtw89_dev *rtwdev, -+ const struct rtw89_chan *chan, -+ enum rtw89_phy_idx phy_idx) -+{ -+ rtw89_phy_set_txpwr_byrate(rtwdev, chan, phy_idx); -+ rtw89_phy_set_txpwr_offset(rtwdev, chan, phy_idx); -+ rtw8851b_set_tx_shape(rtwdev, chan, phy_idx); -+ rtw89_phy_set_txpwr_limit(rtwdev, chan, phy_idx); -+ rtw89_phy_set_txpwr_limit_ru(rtwdev, chan, phy_idx); -+} -+ -+static void rtw8851b_set_txpwr_ctrl(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ rtw8851b_set_txpwr_ref(rtwdev, phy_idx); -+} -+ -+static -+void rtw8851b_set_txpwr_ul_tb_offset(struct rtw89_dev *rtwdev, -+ s8 pw_ofst, enum rtw89_mac_idx mac_idx) -+{ -+ u32 reg; -+ -+ if (pw_ofst < -16 || pw_ofst > 15) { -+ rtw89_warn(rtwdev, "[ULTB] Err pwr_offset=%d\n", pw_ofst); -+ return; -+ } -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_CTRL, mac_idx); -+ rtw89_write32_set(rtwdev, reg, B_AX_PWR_UL_TB_CTRL_EN); -+ -+ reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_1T, mac_idx); -+ rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_1T_MASK, pw_ofst); -+ -+ pw_ofst = max_t(s8, pw_ofst - 3, -16); -+ reg = rtw89_mac_reg_by_idx(R_AX_PWR_UL_TB_2T, mac_idx); -+ rtw89_write32_mask(rtwdev, reg, B_AX_PWR_UL_TB_2T_MASK, pw_ofst); -+} -+ -+static int -+rtw8851b_init_txpwr_unit(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) -+{ -+ int ret; -+ -+ ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_UL_CTRL2, 0x07763333); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_COEXT_CTRL, 0x01ebf000); -+ if (ret) -+ return ret; -+ -+ ret = rtw89_mac_txpwr_write32(rtwdev, phy_idx, R_AX_PWR_UL_CTRL0, 0x0002f8ff); -+ if (ret) -+ return ret; -+ -+ rtw8851b_set_txpwr_ul_tb_offset(rtwdev, 0, phy_idx == RTW89_PHY_1 ? -+ RTW89_MAC_1 : RTW89_MAC_0); -+ -+ return 0; -+} -+ - static void rtw8851b_btc_set_rfe(struct rtw89_dev *rtwdev) - { - struct rtw89_btc *btc = &rtwdev->btc; -@@ -1711,6 +1960,11 @@ static const struct rtw89_chip_ops rtw88 - .read_phycap = rtw8851b_read_phycap, - .fem_setup = NULL, - .rfe_gpio = rtw8851b_rfe_gpio, -+ .power_trim = rtw8851b_power_trim, -+ .set_txpwr = rtw8851b_set_txpwr, -+ .set_txpwr_ctrl = rtw8851b_set_txpwr_ctrl, -+ .init_txpwr_unit = rtw8851b_init_txpwr_unit, -+ .set_txpwr_ul_tb_offset = rtw8851b_set_txpwr_ul_tb_offset, - .pwr_on_func = rtw8851b_pwr_on_func, - .pwr_off_func = rtw8851b_pwr_off_func, - .fill_txdesc = rtw89_core_fill_txdesc, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-107-wifi-rtw89-8851b-fill-BB-related-capabilities-to-chi.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-107-wifi-rtw89-8851b-fill-BB-related-capabilities-to-chi.patch deleted file mode 100644 index 0bbbbc485..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-107-wifi-rtw89-8851b-fill-BB-related-capabilities-to-chi.patch +++ /dev/null @@ -1,278 +0,0 @@ -From 68a2cb6b0669bf96bbb203cbb81e57ad122ded42 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 19 May 2023 11:14:55 +0800 -Subject: [PATCH 107/136] wifi: rtw89: 8851b: fill BB related capabilities to - chip_info - -These capabilities include helpers of BT coexistence, RX PPDU status -parser, DIG (dynamic initial gain) and CFO (center frequency offset) -settings. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230519031500.21087-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 2 + - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 199 ++++++++++++++++++ - 2 files changed, 201 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -4398,6 +4398,8 @@ - #define B_PATH0_BT_BACKOFF_V1 GENMASK(23, 0) - #define R_PATH1_BT_BACKOFF_V1 0x4AEC - #define B_PATH1_BT_BACKOFF_V1 GENMASK(23, 0) -+#define R_DCFO_COMP_S0_V2 0x4B20 -+#define B_DCFO_COMP_S0_MSK_V2 GENMASK(13, 0) - #define R_PATH0_TX_CFR 0x4B30 - #define B_PATH0_TX_CFR_LGC1 GENMASK(19, 10) - #define B_PATH0_TX_CFR_LGC0 GENMASK(9, 0) ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -68,12 +68,63 @@ static const struct rtw89_dle_mem rtw885 - NULL}, - }; - -+static const struct rtw89_reg3_def rtw8851b_btc_preagc_en_defs[] = { -+ {0x46D0, GENMASK(1, 0), 0x3}, -+ {0x4AD4, GENMASK(31, 0), 0xf}, -+ {0x4688, GENMASK(23, 16), 0x80}, -+ {0x4688, GENMASK(31, 24), 0x80}, -+ {0x4694, GENMASK(7, 0), 0x80}, -+ {0x4694, GENMASK(15, 8), 0x80}, -+ {0x4AE4, GENMASK(11, 6), 0x34}, -+ {0x4AE4, GENMASK(17, 12), 0x0}, -+ {0x469C, GENMASK(31, 26), 0x34}, -+}; -+ -+static DECLARE_PHY_REG3_TBL(rtw8851b_btc_preagc_en_defs); -+ -+static const struct rtw89_reg3_def rtw8851b_btc_preagc_dis_defs[] = { -+ {0x46D0, GENMASK(1, 0), 0x0}, -+ {0x4AD4, GENMASK(31, 0), 0x60}, -+ {0x4688, GENMASK(23, 16), 0x10}, -+ {0x4690, GENMASK(31, 24), 0x2a}, -+ {0x4694, GENMASK(15, 8), 0x2a}, -+ {0x4AE4, GENMASK(11, 6), 0x26}, -+ {0x4AE4, GENMASK(17, 12), 0x1e}, -+ {0x469C, GENMASK(31, 26), 0x26}, -+}; -+ -+static DECLARE_PHY_REG3_TBL(rtw8851b_btc_preagc_dis_defs); -+ -+static const struct rtw89_reg_def rtw8851b_dcfo_comp = { -+ R_DCFO_COMP_S0_V2, B_DCFO_COMP_S0_MSK_V2 -+}; -+ - static const struct rtw89_xtal_info rtw8851b_xtal_info = { - .xcap_reg = R_AX_XTAL_ON_CTRL3, - .sc_xo_mask = B_AX_XTAL_SC_XO_A_BLOCK_MASK, - .sc_xi_mask = B_AX_XTAL_SC_XI_A_BLOCK_MASK, - }; - -+static const struct rtw89_dig_regs rtw8851b_dig_regs = { -+ .seg0_pd_reg = R_SEG0R_PD_V1, -+ .pd_lower_bound_mask = B_SEG0R_PD_LOWER_BOUND_MSK, -+ .pd_spatial_reuse_en = B_SEG0R_PD_SPATIAL_REUSE_EN_MSK_V1, -+ .p0_lna_init = {R_PATH0_LNA_INIT_V1, B_PATH0_LNA_INIT_IDX_MSK}, -+ .p1_lna_init = {R_PATH1_LNA_INIT_V1, B_PATH1_LNA_INIT_IDX_MSK}, -+ .p0_tia_init = {R_PATH0_TIA_INIT_V1, B_PATH0_TIA_INIT_IDX_MSK_V1}, -+ .p1_tia_init = {R_PATH1_TIA_INIT_V1, B_PATH1_TIA_INIT_IDX_MSK_V1}, -+ .p0_rxb_init = {R_PATH0_RXB_INIT_V1, B_PATH0_RXB_INIT_IDX_MSK_V1}, -+ .p1_rxb_init = {R_PATH1_RXB_INIT_V1, B_PATH1_RXB_INIT_IDX_MSK_V1}, -+ .p0_p20_pagcugc_en = {R_PATH0_P20_FOLLOW_BY_PAGCUGC_V2, -+ B_PATH0_P20_FOLLOW_BY_PAGCUGC_EN_MSK}, -+ .p0_s20_pagcugc_en = {R_PATH0_S20_FOLLOW_BY_PAGCUGC_V2, -+ B_PATH0_S20_FOLLOW_BY_PAGCUGC_EN_MSK}, -+ .p1_p20_pagcugc_en = {R_PATH1_P20_FOLLOW_BY_PAGCUGC_V2, -+ B_PATH1_P20_FOLLOW_BY_PAGCUGC_EN_MSK}, -+ .p1_s20_pagcugc_en = {R_PATH1_S20_FOLLOW_BY_PAGCUGC_V2, -+ B_PATH1_S20_FOLLOW_BY_PAGCUGC_EN_MSK}, -+}; -+ - static const struct rtw89_btc_rf_trx_para rtw89_btc_8851b_rf_ul[] = { - {255, 0, 0, 7}, /* 0 -> original */ - {255, 2, 0, 7}, /* 1 -> for BT-connected ACI issue && BTG co-rx */ -@@ -1604,6 +1655,112 @@ rtw8851b_init_txpwr_unit(struct rtw89_de - return 0; - } - -+static void rtw8851b_bb_ctrl_btc_preagc(struct rtw89_dev *rtwdev, bool bt_en) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ -+ rtw89_phy_write_reg3_tbl(rtwdev, bt_en ? &rtw8851b_btc_preagc_en_defs_tbl : -+ &rtw8851b_btc_preagc_dis_defs_tbl); -+ -+ if (!bt_en) { -+ if (chan->band_type == RTW89_BAND_2G) { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_G_LNA6_OP1DB_V1, -+ B_PATH0_G_LNA6_OP1DB_V1, 0x20); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_G_TIA0_LNA6_OP1DB_V1, -+ B_PATH0_G_TIA0_LNA6_OP1DB_V1, 0x30); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_G_LNA6_OP1DB_V1, -+ B_PATH0_G_LNA6_OP1DB_V1, 0x1a); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_G_TIA0_LNA6_OP1DB_V1, -+ B_PATH0_G_TIA0_LNA6_OP1DB_V1, 0x2a); -+ } -+ } -+} -+ -+static void rtw8851b_ctrl_btg(struct rtw89_dev *rtwdev, bool btg) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ -+ if (btg) { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_BT_SHARE_V1, -+ B_PATH0_BT_SHARE_V1, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_BTG_PATH_V1, -+ B_PATH0_BTG_PATH_V1, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_G_LNA6_OP1DB_V1, -+ B_PATH0_G_LNA6_OP1DB_V1, 0x20); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_G_TIA0_LNA6_OP1DB_V1, -+ B_PATH0_G_TIA0_LNA6_OP1DB_V1, 0x30); -+ rtw89_phy_write32_mask(rtwdev, R_PMAC_GNT, B_PMAC_GNT_P1, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD_V1, B_BT_SHARE, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_BT_SEG0, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_BT_DYN_DC_EST_EN_V1, -+ B_BT_DYN_DC_EST_EN_MSK, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_GNT_BT_WGT_EN, B_GNT_BT_WGT_EN, 0x1); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_BT_SHARE_V1, -+ B_PATH0_BT_SHARE_V1, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_BTG_PATH_V1, -+ B_PATH0_BTG_PATH_V1, 0x0); -+ if (chan->band_type == RTW89_BAND_2G) { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_G_LNA6_OP1DB_V1, -+ B_PATH0_G_LNA6_OP1DB_V1, 0x80); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_G_TIA0_LNA6_OP1DB_V1, -+ B_PATH0_G_TIA0_LNA6_OP1DB_V1, 0x80); -+ } else { -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_G_LNA6_OP1DB_V1, -+ B_PATH0_G_LNA6_OP1DB_V1, 0x1a); -+ rtw89_phy_write32_mask(rtwdev, R_PATH0_G_TIA0_LNA6_OP1DB_V1, -+ B_PATH0_G_TIA0_LNA6_OP1DB_V1, 0x2a); -+ } -+ rtw89_phy_write32_mask(rtwdev, R_PMAC_GNT, B_PMAC_GNT_P1, 0xc); -+ rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD_V1, B_BT_SHARE, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_BT_SEG0, 0x0); -+ rtw89_phy_write32_mask(rtwdev, R_BT_DYN_DC_EST_EN_V1, -+ B_BT_DYN_DC_EST_EN_MSK, 0x1); -+ rtw89_phy_write32_mask(rtwdev, R_GNT_BT_WGT_EN, B_GNT_BT_WGT_EN, 0x0); -+ } -+} -+ -+static void rtw8851b_bb_ctrl_rx_path(struct rtw89_dev *rtwdev, -+ enum rtw89_rf_path_bit rx_path) -+{ -+ const struct rtw89_chan *chan = rtw89_chan_get(rtwdev, RTW89_SUB_ENTITY_0); -+ u32 rst_mask0; -+ -+ if (rx_path == RF_A) { -+ rtw89_phy_write32_mask(rtwdev, R_CHBW_MOD_V1, B_ANT_RX_SEG0, 1); -+ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_1RCCA_SEG0, 1); -+ rtw89_phy_write32_mask(rtwdev, R_FC0_BW_V1, B_ANT_RX_1RCCA_SEG1, 1); -+ rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, B_RXHT_MCS_LIMIT, 0); -+ rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, B_RXVHT_MCS_LIMIT, 0); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_USER_MAX, 4); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, 0); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, 0); -+ } -+ -+ rtw8851b_set_gain_offset(rtwdev, chan->subband_type, RTW89_PHY_0); -+ -+ rst_mask0 = B_P0_TXPW_RSTB_MANON | B_P0_TXPW_RSTB_TSSI; -+ if (rx_path == RF_A) { -+ rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, rst_mask0, 1); -+ rtw89_phy_write32_mask(rtwdev, R_P0_TXPW_RSTB, rst_mask0, 3); -+ } -+} -+ -+static void rtw8851b_bb_cfg_txrx_path(struct rtw89_dev *rtwdev) -+{ -+ rtw8851b_bb_ctrl_rx_path(rtwdev, RF_A); -+ -+ if (rtwdev->hal.rx_nss == 1) { -+ rtw89_phy_write32_mask(rtwdev, R_RXHT_MCS_LIMIT, B_RXHT_MCS_LIMIT, 0); -+ rtw89_phy_write32_mask(rtwdev, R_RXVHT_MCS_LIMIT, B_RXVHT_MCS_LIMIT, 0); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHE_MAX_NSS, 0); -+ rtw89_phy_write32_mask(rtwdev, R_RXHE, B_RXHETB_MAX_NSS, 0); -+ } -+ -+ rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 0x0, RTW89_PHY_0); -+} -+ - static void rtw8851b_btc_set_rfe(struct rtw89_dev *rtwdev) - { - struct rtw89_btc *btc = &rtwdev->btc; -@@ -1895,6 +2052,39 @@ static void rtw8851b_btc_set_wl_rx_gain( - } - } - -+static void rtw8851b_fill_freq_with_ppdu(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu, -+ struct ieee80211_rx_status *status) -+{ -+ u16 chan = phy_ppdu->chan_idx; -+ enum nl80211_band band; -+ u8 ch; -+ -+ if (chan == 0) -+ return; -+ -+ rtw89_decode_chan_idx(rtwdev, chan, &ch, &band); -+ status->freq = ieee80211_channel_to_frequency(ch, band); -+ status->band = band; -+} -+ -+static void rtw8851b_query_ppdu(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_phy_ppdu *phy_ppdu, -+ struct ieee80211_rx_status *status) -+{ -+ u8 path; -+ u8 *rx_power = phy_ppdu->rssi; -+ -+ status->signal = RTW89_RSSI_RAW_TO_DBM(rx_power[RF_PATH_A]); -+ -+ for (path = 0; path < rtwdev->chip->rf_path_num; path++) { -+ status->chains |= BIT(path); -+ status->chain_signal[path] = RTW89_RSSI_RAW_TO_DBM(rx_power[path]); -+ } -+ if (phy_ppdu->valid) -+ rtw8851b_fill_freq_with_ppdu(rtwdev, phy_ppdu, status); -+} -+ - static int rtw8851b_mac_enable_bb_rf(struct rtw89_dev *rtwdev) - { - int ret; -@@ -1964,6 +2154,10 @@ static const struct rtw89_chip_ops rtw88 - .set_txpwr = rtw8851b_set_txpwr, - .set_txpwr_ctrl = rtw8851b_set_txpwr_ctrl, - .init_txpwr_unit = rtw8851b_init_txpwr_unit, -+ .ctrl_btg = rtw8851b_ctrl_btg, -+ .query_ppdu = rtw8851b_query_ppdu, -+ .bb_ctrl_btc_preagc = rtw8851b_bb_ctrl_btc_preagc, -+ .cfg_txrx_path = rtw8851b_bb_cfg_txrx_path, - .set_txpwr_ul_tb_offset = rtw8851b_set_txpwr_ul_tb_offset, - .pwr_on_func = rtw8851b_pwr_on_func, - .pwr_off_func = rtw8851b_pwr_off_func, -@@ -2021,6 +2215,7 @@ const struct rtw89_chip_info rtw8851b_ch - .txpwr_factor_rf = 2, - .txpwr_factor_mac = 1, - .dig_table = NULL, -+ .dig_regs = &rtw8851b_dig_regs, - .tssi_dbw_table = NULL, - .support_chanctx_num = 0, - .support_bands = BIT(NL80211_BAND_2GHZ) | -@@ -2069,6 +2264,10 @@ const struct rtw89_chip_info rtw8851b_ch - .hci_func_en_addr = R_AX_HCI_FUNC_EN, - .h2c_desc_size = sizeof(struct rtw89_txwd_body), - .txwd_body_size = sizeof(struct rtw89_txwd_body), -+ .cfo_src_fd = true, -+ .cfo_hw_comp = true, -+ .dcfo_comp = &rtw8851b_dcfo_comp, -+ .dcfo_comp_sft = 12, - .bss_clr_map_reg = R_BSS_CLR_MAP_V1, - .dma_ch_mask = BIT(RTW89_DMA_ACH4) | BIT(RTW89_DMA_ACH5) | - BIT(RTW89_DMA_ACH6) | BIT(RTW89_DMA_ACH7) | diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-108-wifi-rtw89-8851b-add-MAC-configurations-to-chip_info.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-108-wifi-rtw89-8851b-add-MAC-configurations-to-chip_info.patch deleted file mode 100644 index d39f154ba..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-108-wifi-rtw89-8851b-add-MAC-configurations-to-chip_info.patch +++ /dev/null @@ -1,142 +0,0 @@ -From 92aa2643235d72bb01206259362d4e0a845ba02a Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 19 May 2023 11:14:56 +0800 -Subject: [PATCH 108/136] wifi: rtw89: 8851b: add MAC configurations to - chip_info - -These configurations include path control, TX grant, TX scheduler, -register-based H2C/C2H and so on. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230519031500.21087-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 89 +++++++++++++++++++ - 1 file changed, 89 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -95,16 +95,92 @@ static const struct rtw89_reg3_def rtw88 - - static DECLARE_PHY_REG3_TBL(rtw8851b_btc_preagc_dis_defs); - -+static const u32 rtw8851b_h2c_regs[RTW89_H2CREG_MAX] = { -+ R_AX_H2CREG_DATA0, R_AX_H2CREG_DATA1, R_AX_H2CREG_DATA2, -+ R_AX_H2CREG_DATA3 -+}; -+ -+static const u32 rtw8851b_c2h_regs[RTW89_C2HREG_MAX] = { -+ R_AX_C2HREG_DATA0, R_AX_C2HREG_DATA1, R_AX_C2HREG_DATA2, -+ R_AX_C2HREG_DATA3 -+}; -+ -+static const struct rtw89_page_regs rtw8851b_page_regs = { -+ .hci_fc_ctrl = R_AX_HCI_FC_CTRL, -+ .ch_page_ctrl = R_AX_CH_PAGE_CTRL, -+ .ach_page_ctrl = R_AX_ACH0_PAGE_CTRL, -+ .ach_page_info = R_AX_ACH0_PAGE_INFO, -+ .pub_page_info3 = R_AX_PUB_PAGE_INFO3, -+ .pub_page_ctrl1 = R_AX_PUB_PAGE_CTRL1, -+ .pub_page_ctrl2 = R_AX_PUB_PAGE_CTRL2, -+ .pub_page_info1 = R_AX_PUB_PAGE_INFO1, -+ .pub_page_info2 = R_AX_PUB_PAGE_INFO2, -+ .wp_page_ctrl1 = R_AX_WP_PAGE_CTRL1, -+ .wp_page_ctrl2 = R_AX_WP_PAGE_CTRL2, -+ .wp_page_info1 = R_AX_WP_PAGE_INFO1, -+}; -+ - static const struct rtw89_reg_def rtw8851b_dcfo_comp = { - R_DCFO_COMP_S0_V2, B_DCFO_COMP_S0_MSK_V2 - }; - -+static const struct rtw89_imr_info rtw8851b_imr_info = { -+ .wdrls_imr_set = B_AX_WDRLS_IMR_SET, -+ .wsec_imr_reg = R_AX_SEC_DEBUG, -+ .wsec_imr_set = B_AX_IMR_ERROR, -+ .mpdu_tx_imr_set = 0, -+ .mpdu_rx_imr_set = 0, -+ .sta_sch_imr_set = B_AX_STA_SCHEDULER_IMR_SET, -+ .txpktctl_imr_b0_reg = R_AX_TXPKTCTL_ERR_IMR_ISR, -+ .txpktctl_imr_b0_clr = B_AX_TXPKTCTL_IMR_B0_CLR, -+ .txpktctl_imr_b0_set = B_AX_TXPKTCTL_IMR_B0_SET, -+ .txpktctl_imr_b1_reg = R_AX_TXPKTCTL_ERR_IMR_ISR_B1, -+ .txpktctl_imr_b1_clr = B_AX_TXPKTCTL_IMR_B1_CLR, -+ .txpktctl_imr_b1_set = B_AX_TXPKTCTL_IMR_B1_SET, -+ .wde_imr_clr = B_AX_WDE_IMR_CLR, -+ .wde_imr_set = B_AX_WDE_IMR_SET, -+ .ple_imr_clr = B_AX_PLE_IMR_CLR, -+ .ple_imr_set = B_AX_PLE_IMR_SET, -+ .host_disp_imr_clr = B_AX_HOST_DISP_IMR_CLR, -+ .host_disp_imr_set = B_AX_HOST_DISP_IMR_SET, -+ .cpu_disp_imr_clr = B_AX_CPU_DISP_IMR_CLR, -+ .cpu_disp_imr_set = B_AX_CPU_DISP_IMR_SET, -+ .other_disp_imr_clr = B_AX_OTHER_DISP_IMR_CLR, -+ .other_disp_imr_set = 0, -+ .bbrpt_com_err_imr_reg = R_AX_BBRPT_COM_ERR_IMR_ISR, -+ .bbrpt_chinfo_err_imr_reg = R_AX_BBRPT_CHINFO_ERR_IMR_ISR, -+ .bbrpt_err_imr_set = 0, -+ .bbrpt_dfs_err_imr_reg = R_AX_BBRPT_DFS_ERR_IMR_ISR, -+ .ptcl_imr_clr = B_AX_PTCL_IMR_CLR_ALL, -+ .ptcl_imr_set = B_AX_PTCL_IMR_SET, -+ .cdma_imr_0_reg = R_AX_DLE_CTRL, -+ .cdma_imr_0_clr = B_AX_DLE_IMR_CLR, -+ .cdma_imr_0_set = B_AX_DLE_IMR_SET, -+ .cdma_imr_1_reg = 0, -+ .cdma_imr_1_clr = 0, -+ .cdma_imr_1_set = 0, -+ .phy_intf_imr_reg = R_AX_PHYINFO_ERR_IMR, -+ .phy_intf_imr_clr = 0, -+ .phy_intf_imr_set = 0, -+ .rmac_imr_reg = R_AX_RMAC_ERR_ISR, -+ .rmac_imr_clr = B_AX_RMAC_IMR_CLR, -+ .rmac_imr_set = B_AX_RMAC_IMR_SET, -+ .tmac_imr_reg = R_AX_TMAC_ERR_IMR_ISR, -+ .tmac_imr_clr = B_AX_TMAC_IMR_CLR, -+ .tmac_imr_set = B_AX_TMAC_IMR_SET, -+}; -+ - static const struct rtw89_xtal_info rtw8851b_xtal_info = { - .xcap_reg = R_AX_XTAL_ON_CTRL3, - .sc_xo_mask = B_AX_XTAL_SC_XO_A_BLOCK_MASK, - .sc_xi_mask = B_AX_XTAL_SC_XI_A_BLOCK_MASK, - }; - -+static const struct rtw89_rrsr_cfgs rtw8851b_rrsr_cfgs = { -+ .ref_rate = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_REF_RATE_SEL, 0}, -+ .rsc = {R_AX_TRXPTCL_RRSR_CTL_0, B_AX_WMAC_RESP_RSC_MASK, 2}, -+}; -+ - static const struct rtw89_dig_regs rtw8851b_dig_regs = { - .seg0_pd_reg = R_SEG0R_PD_V1, - .pd_lower_bound_mask = B_SEG0R_PD_LOWER_BOUND_MSK, -@@ -2163,6 +2239,10 @@ static const struct rtw89_chip_ops rtw88 - .pwr_off_func = rtw8851b_pwr_off_func, - .fill_txdesc = rtw89_core_fill_txdesc, - .fill_txdesc_fwcmd = rtw89_core_fill_txdesc, -+ .cfg_ctrl_path = rtw89_mac_cfg_ctrl_path, -+ .mac_cfg_gnt = rtw89_mac_cfg_gnt, -+ .stop_sch_tx = rtw89_mac_stop_sch_tx, -+ .resume_sch_tx = rtw89_mac_resume_sch_tx, - .h2c_dctl_sec_cam = NULL, - - .btc_set_rfe = rtw8851b_btc_set_rfe, -@@ -2264,10 +2344,19 @@ const struct rtw89_chip_info rtw8851b_ch - .hci_func_en_addr = R_AX_HCI_FUNC_EN, - .h2c_desc_size = sizeof(struct rtw89_txwd_body), - .txwd_body_size = sizeof(struct rtw89_txwd_body), -+ .h2c_ctrl_reg = R_AX_H2CREG_CTRL, -+ .h2c_counter_reg = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_H2C_DEQ_CNT_MASK >> 8}, -+ .h2c_regs = rtw8851b_h2c_regs, -+ .c2h_ctrl_reg = R_AX_C2HREG_CTRL, -+ .c2h_counter_reg = {R_AX_UDM1 + 1, B_AX_UDM1_HALMAC_C2H_ENQ_CNT_MASK >> 8}, -+ .c2h_regs = rtw8851b_c2h_regs, -+ .page_regs = &rtw8851b_page_regs, - .cfo_src_fd = true, - .cfo_hw_comp = true, - .dcfo_comp = &rtw8851b_dcfo_comp, - .dcfo_comp_sft = 12, -+ .imr_info = &rtw8851b_imr_info, -+ .rrsr_cfgs = &rtw8851b_rrsr_cfgs, - .bss_clr_map_reg = R_BSS_CLR_MAP_V1, - .dma_ch_mask = BIT(RTW89_DMA_ACH4) | BIT(RTW89_DMA_ACH5) | - BIT(RTW89_DMA_ACH6) | BIT(RTW89_DMA_ACH7) | diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-109-wifi-rtw89-8851b-add-RF-configurations.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-109-wifi-rtw89-8851b-add-RF-configurations.patch deleted file mode 100644 index a22d8579a..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-109-wifi-rtw89-8851b-add-RF-configurations.patch +++ /dev/null @@ -1,102 +0,0 @@ -From 791af3fb2decc11b2994f7020378dffecd654fcd Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 19 May 2023 11:14:57 +0800 -Subject: [PATCH 109/136] wifi: rtw89: 8851b: add RF configurations - -RF configurations include RF calibrations and getting thermal value. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230519031500.21087-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 61 +++++++++++++++++++ - 1 file changed, 61 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -1542,6 +1542,44 @@ static void rtw8851b_set_channel_help(st - } - } - -+static void rtw8851b_rfk_init(struct rtw89_dev *rtwdev) -+{ -+ rtwdev->is_tssi_mode[RF_PATH_A] = false; -+ rtwdev->is_tssi_mode[RF_PATH_B] = false; -+ -+ rtw8851b_dpk_init(rtwdev); -+ rtw8851b_aack(rtwdev); -+ rtw8851b_rck(rtwdev); -+ rtw8851b_dack(rtwdev); -+ rtw8851b_rx_dck(rtwdev, RTW89_PHY_0); -+} -+ -+static void rtw8851b_rfk_channel(struct rtw89_dev *rtwdev) -+{ -+ enum rtw89_phy_idx phy_idx = RTW89_PHY_0; -+ -+ rtw8851b_rx_dck(rtwdev, phy_idx); -+ rtw8851b_iqk(rtwdev, phy_idx); -+ rtw8851b_tssi(rtwdev, phy_idx, true); -+ rtw8851b_dpk(rtwdev, phy_idx); -+} -+ -+static void rtw8851b_rfk_band_changed(struct rtw89_dev *rtwdev, -+ enum rtw89_phy_idx phy_idx) -+{ -+ rtw8851b_tssi_scan(rtwdev, phy_idx); -+} -+ -+static void rtw8851b_rfk_scan(struct rtw89_dev *rtwdev, bool start) -+{ -+ rtw8851b_wifi_scan_notify(rtwdev, start, RTW89_PHY_0); -+} -+ -+static void rtw8851b_rfk_track(struct rtw89_dev *rtwdev) -+{ -+ rtw8851b_dpk_track(rtwdev); -+} -+ - static u32 rtw8851b_bb_cal_txpwr_ref(struct rtw89_dev *rtwdev, - enum rtw89_phy_idx phy_idx, s16 ref) - { -@@ -1837,6 +1875,23 @@ static void rtw8851b_bb_cfg_txrx_path(st - rtw89_phy_write32_idx(rtwdev, R_MAC_SEL, B_MAC_SEL_MOD, 0x0, RTW89_PHY_0); - } - -+static u8 rtw8851b_get_thermal(struct rtw89_dev *rtwdev, enum rtw89_rf_path rf_path) -+{ -+ if (rtwdev->is_tssi_mode[rf_path]) { -+ u32 addr = R_TSSI_THER + (rf_path << 13); -+ -+ return rtw89_phy_read32_mask(rtwdev, addr, B_TSSI_THER); -+ } -+ -+ rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x1); -+ rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x0); -+ rtw89_write_rf(rtwdev, rf_path, RR_TM, RR_TM_TRI, 0x1); -+ -+ fsleep(200); -+ -+ return rtw89_read_rf(rtwdev, rf_path, RR_TM, RR_TM_VAL); -+} -+ - static void rtw8851b_btc_set_rfe(struct rtw89_dev *rtwdev) - { - struct rtw89_btc *btc = &rtwdev->btc; -@@ -2226,10 +2281,16 @@ static const struct rtw89_chip_ops rtw88 - .read_phycap = rtw8851b_read_phycap, - .fem_setup = NULL, - .rfe_gpio = rtw8851b_rfe_gpio, -+ .rfk_init = rtw8851b_rfk_init, -+ .rfk_channel = rtw8851b_rfk_channel, -+ .rfk_band_changed = rtw8851b_rfk_band_changed, -+ .rfk_scan = rtw8851b_rfk_scan, -+ .rfk_track = rtw8851b_rfk_track, - .power_trim = rtw8851b_power_trim, - .set_txpwr = rtw8851b_set_txpwr, - .set_txpwr_ctrl = rtw8851b_set_txpwr_ctrl, - .init_txpwr_unit = rtw8851b_init_txpwr_unit, -+ .get_thermal = rtw8851b_get_thermal, - .ctrl_btg = rtw8851b_ctrl_btg, - .query_ppdu = rtw8851b_query_ppdu, - .bb_ctrl_btc_preagc = rtw8851b_bb_ctrl_btc_preagc, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-110-wifi-rtw89-enlarge-supported-length-of-read_reg-debu.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-110-wifi-rtw89-enlarge-supported-length-of-read_reg-debu.patch deleted file mode 100644 index 2cbe76a79..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-110-wifi-rtw89-enlarge-supported-length-of-read_reg-debu.patch +++ /dev/null @@ -1,72 +0,0 @@ -From 4cfad52a5df718a615f8de5ba14370d99537db4c Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 19 May 2023 11:14:58 +0800 -Subject: [PATCH 110/136] wifi: rtw89: enlarge supported length of read_reg - debugfs entry - -The register ranges of upcoming chips are different from current, and even -existing chips have different ranges, so support longer length to dump -registers. Then, user space can decide the ranges according to chip. - -Since arbitrary length (e.g. 7) would be a little complicated, so simply -make length a multiple of 16. The output looks like - -18620000h : 8580801f 82828282 82828282 080800fd - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230519031500.21087-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/debug.c | 23 +++++++++++++++++++--- - 1 file changed, 20 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/debug.c -+++ b/drivers/net/wireless/realtek/rtw89/debug.c -@@ -30,7 +30,7 @@ struct rtw89_debugfs_priv { - u32 cb_data; - struct { - u32 addr; -- u8 len; -+ u32 len; - } read_reg; - struct { - u32 addr; -@@ -164,12 +164,15 @@ static int rtw89_debug_priv_read_reg_get - { - struct rtw89_debugfs_priv *debugfs_priv = m->private; - struct rtw89_dev *rtwdev = debugfs_priv->rtwdev; -- u32 addr, data; -- u8 len; -+ u32 addr, end, data, k; -+ u32 len; - - len = debugfs_priv->read_reg.len; - addr = debugfs_priv->read_reg.addr; - -+ if (len > 4) -+ goto ndata; -+ - switch (len) { - case 1: - data = rtw89_read8(rtwdev, addr); -@@ -188,6 +191,20 @@ static int rtw89_debug_priv_read_reg_get - seq_printf(m, "get %d bytes at 0x%08x=0x%08x\n", len, addr, data); - - return 0; -+ -+ndata: -+ end = addr + len; -+ -+ for (; addr < end; addr += 16) { -+ seq_printf(m, "%08xh : ", 0x18600000 + addr); -+ for (k = 0; k < 16; k += 4) { -+ data = rtw89_read32(rtwdev, addr + k); -+ seq_printf(m, "%08x ", data); -+ } -+ seq_puts(m, "\n"); -+ } -+ -+ return 0; - } - - static ssize_t rtw89_debug_priv_write_reg_set(struct file *filp, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-111-wifi-rtw89-add-tx_wake-notify-for-8851B.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-111-wifi-rtw89-add-tx_wake-notify-for-8851B.patch deleted file mode 100644 index 329b069ff..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-111-wifi-rtw89-add-tx_wake-notify-for-8851B.patch +++ /dev/null @@ -1,27 +0,0 @@ -From c4ff50149885723f24ef9bc3b0220ee20bca3e03 Mon Sep 17 00:00:00 2001 -From: Chin-Yen Lee -Date: Fri, 19 May 2023 11:14:59 +0800 -Subject: [PATCH 111/136] wifi: rtw89: add tx_wake notify for 8851B - -8851B has the same issue: management frames get stuck when WiFi -chip enters low PS mode, so we also add notify wake function to -trigger WiFi chip wake before forwarding management frames. - -Signed-off-by: Chin-Yen Lee -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230519031500.21087-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -256,6 +256,7 @@ struct __fw_feat_cfg { - } - - static const struct __fw_feat_cfg fw_feat_tbl[] = { -+ __CFG_FW_FEAT(RTL8851B, ge, 0, 29, 37, 1, TX_WAKE), - __CFG_FW_FEAT(RTL8852A, le, 0, 13, 29, 0, OLD_HT_RA_FORMAT), - __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 35, 0, SCAN_OFFLOAD), - __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 35, 0, TX_WAKE), diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-112-wifi-rtw89-8851b-add-8851be-to-Makefile-and-Kconfig.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-112-wifi-rtw89-8851b-add-8851be-to-Makefile-and-Kconfig.patch deleted file mode 100644 index 3927f7fde..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-112-wifi-rtw89-8851b-add-8851be-to-Makefile-and-Kconfig.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 14820388aafb10cd051b0883e92326f5f2012ed4 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 19 May 2023 11:15:00 +0800 -Subject: [PATCH 112/136] wifi: rtw89: 8851b: add 8851be to Makefile and - Kconfig - -Since 8851BE is ready, so add 8851BE to Makefile and Kconfig. Currently, -it can support STA, AP and monitor modes with good performance. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230519031500.21087-8-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/Kconfig | 14 ++++++++++++++ - drivers/net/wireless/realtek/rtw89/Makefile | 9 +++++++++ - 2 files changed, 23 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/Kconfig -+++ b/drivers/net/wireless/realtek/rtw89/Kconfig -@@ -19,6 +19,9 @@ config RTW89_PCI - tristate - depends on m - -+config RTW89_8851B -+ tristate -+ - config RTW89_8852A - tristate - depends on m -@@ -31,6 +34,17 @@ config RTW89_8852C - tristate - depends on m - -+config RTW89_8851BE -+ tristate "Realtek 8851BE PCI wireless network (Wi-Fi 6) adapter" -+ depends on PCI -+ select RTW89_CORE -+ select RTW89_PCI -+ select RTW89_8851B -+ help -+ Select this option will enable support for 8851BE chipset -+ -+ 802.11ax PCIe wireless network (Wi-Fi 6) adapter -+ - config RTW89_8852AE - tristate "Realtek 8852AE PCI wireless network (Wi-Fi 6) adapter" - depends on m ---- a/drivers/net/wireless/realtek/rtw89/Makefile -+++ b/drivers/net/wireless/realtek/rtw89/Makefile -@@ -18,6 +18,15 @@ rtw89_core-y += core.o \ - - rtw89_core-$(CPTCFG_PM) += wow.o - -+obj-$(CPTCFG_RTW89_8851B) += rtw89_8851b.o -+rtw89_8851b-objs := rtw8851b.o \ -+ rtw8851b_table.o \ -+ rtw8851b_rfk.o \ -+ rtw8851b_rfk_table.o -+ -+obj-$(CPTCFG_RTW89_8851BE) += rtw89_8851be.o -+rtw89_8851be-objs := rtw8851be.o -+ - obj-$(CPTCFG_RTW89_8852A) += rtw89_8852a.o - rtw89_8852a-objs := rtw8852a.o \ - rtw8852a_table.o \ diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-113-wifi-rtw89-add-chip_ops-query_rxdesc-and-rxd_len-as-.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-113-wifi-rtw89-add-chip_ops-query_rxdesc-and-rxd_len-as-.patch deleted file mode 100644 index c23866c1a..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-113-wifi-rtw89-add-chip_ops-query_rxdesc-and-rxd_len-as-.patch +++ /dev/null @@ -1,151 +0,0 @@ -From de9f93385d0f318b3eba0c1026fd2ec8fba2e982 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 22 May 2023 20:25:09 +0800 -Subject: [PATCH 113/136] wifi: rtw89: add chip_ops::query_rxdesc() and rxd_len - as helpers to support newer chips - -The next generation chips use different RX descriptor format, so add -a chip_ops to hook suitable handlers. Also, the length of RX descriptor is -different, so add a variable to store the length according to chip and -descriptor content dynamically. Then, the code can be more general. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230522122513.13559-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 4 ++++ - drivers/net/wireless/realtek/rtw89/core.h | 14 ++++++++++++++ - drivers/net/wireless/realtek/rtw89/pci.c | 12 ++++-------- - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852b.c | 1 + - drivers/net/wireless/realtek/rtw89/rtw8852c.c | 1 + - 7 files changed, 26 insertions(+), 8 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1819,6 +1819,10 @@ void rtw89_core_query_rxdesc(struct rtw8 - shift_len = desc_info->shift << 1; /* 2-byte unit */ - drv_info_len = desc_info->drv_info_size << 3; /* 8-byte unit */ - desc_info->offset = data_offset + shift_len + drv_info_len; -+ if (desc_info->long_rxdesc) -+ desc_info->rxd_len = sizeof(struct rtw89_rxdesc_long); -+ else -+ desc_info->rxd_len = sizeof(struct rtw89_rxdesc_short); - desc_info->ready = true; - - if (!desc_info->long_rxdesc) ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -776,6 +776,7 @@ struct rtw89_rx_desc_info { - u8 sec_cam_id; - u8 mac_id; - u16 offset; -+ u16 rxd_len; - bool ready; - }; - -@@ -2824,6 +2825,9 @@ struct rtw89_chip_ops { - s8 pw_ofst, enum rtw89_mac_idx mac_idx); - int (*pwr_on_func)(struct rtw89_dev *rtwdev); - int (*pwr_off_func)(struct rtw89_dev *rtwdev); -+ void (*query_rxdesc)(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_desc_info *desc_info, -+ u8 *data, u32 data_offset); - void (*fill_txdesc)(struct rtw89_dev *rtwdev, - struct rtw89_tx_desc_info *desc_info, - void *txdesc); -@@ -4856,6 +4860,16 @@ static inline void rtw89_ctrl_btg(struct - } - - static inline -+void rtw89_chip_query_rxdesc(struct rtw89_dev *rtwdev, -+ struct rtw89_rx_desc_info *desc_info, -+ u8 *data, u32 data_offset) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ -+ chip->ops->query_rxdesc(rtwdev, desc_info, data, data_offset); -+} -+ -+static inline - void rtw89_chip_fill_txdesc(struct rtw89_dev *rtwdev, - struct rtw89_tx_desc_info *desc_info, - void *txdesc) ---- a/drivers/net/wireless/realtek/rtw89/pci.c -+++ b/drivers/net/wireless/realtek/rtw89/pci.c -@@ -265,7 +265,7 @@ static u32 rtw89_pci_rxbd_deliver_skbs(s - goto err_sync_device; - } - -- rtw89_core_query_rxdesc(rtwdev, desc_info, skb->data, rxinfo_size); -+ rtw89_chip_query_rxdesc(rtwdev, desc_info, skb->data, rxinfo_size); - - new = rtw89_alloc_skb_for_rx(rtwdev, desc_info->pkt_size); - if (!new) -@@ -274,9 +274,7 @@ static u32 rtw89_pci_rxbd_deliver_skbs(s - rx_ring->diliver_skb = new; - - /* first segment has RX desc */ -- offset = desc_info->offset; -- offset += desc_info->long_rxdesc ? sizeof(struct rtw89_rxdesc_long) : -- sizeof(struct rtw89_rxdesc_short); -+ offset = desc_info->offset + desc_info->rxd_len; - } else { - offset = sizeof(struct rtw89_pci_rxbd_info); - if (!new) { -@@ -546,12 +544,10 @@ static u32 rtw89_pci_release_tx_skbs(str - return cnt; - } - -- rtw89_core_query_rxdesc(rtwdev, &desc_info, skb->data, rxinfo_size); -+ rtw89_chip_query_rxdesc(rtwdev, &desc_info, skb->data, rxinfo_size); - - /* first segment has RX desc */ -- offset = desc_info.offset; -- offset += desc_info.long_rxdesc ? sizeof(struct rtw89_rxdesc_long) : -- sizeof(struct rtw89_rxdesc_short); -+ offset = desc_info.offset + desc_info.rxd_len; - for (; offset + rpp_size <= rx_info->len; offset += rpp_size) { - rpp = (struct rtw89_pci_rpp_fmt *)(skb->data + offset); - rtw89_pci_release_rpp(rtwdev, rpp); ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -2298,6 +2298,7 @@ static const struct rtw89_chip_ops rtw88 - .set_txpwr_ul_tb_offset = rtw8851b_set_txpwr_ul_tb_offset, - .pwr_on_func = rtw8851b_pwr_on_func, - .pwr_off_func = rtw8851b_pwr_off_func, -+ .query_rxdesc = rtw89_core_query_rxdesc, - .fill_txdesc = rtw89_core_fill_txdesc, - .fill_txdesc_fwcmd = rtw89_core_fill_txdesc, - .cfg_ctrl_path = rtw89_mac_cfg_ctrl_path, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -2050,6 +2050,7 @@ static const struct rtw89_chip_ops rtw88 - .set_txpwr_ul_tb_offset = rtw8852a_set_txpwr_ul_tb_offset, - .pwr_on_func = NULL, - .pwr_off_func = NULL, -+ .query_rxdesc = rtw89_core_query_rxdesc, - .fill_txdesc = rtw89_core_fill_txdesc, - .fill_txdesc_fwcmd = rtw89_core_fill_txdesc, - .cfg_ctrl_path = rtw89_mac_cfg_ctrl_path, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c -@@ -2472,6 +2472,7 @@ static const struct rtw89_chip_ops rtw88 - .set_txpwr_ul_tb_offset = rtw8852b_set_txpwr_ul_tb_offset, - .pwr_on_func = rtw8852b_pwr_on_func, - .pwr_off_func = rtw8852b_pwr_off_func, -+ .query_rxdesc = rtw89_core_query_rxdesc, - .fill_txdesc = rtw89_core_fill_txdesc, - .fill_txdesc_fwcmd = rtw89_core_fill_txdesc, - .cfg_ctrl_path = rtw89_mac_cfg_ctrl_path, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c -@@ -2780,6 +2780,7 @@ static const struct rtw89_chip_ops rtw88 - .set_txpwr_ul_tb_offset = rtw8852c_set_txpwr_ul_tb_offset, - .pwr_on_func = rtw8852c_pwr_on_func, - .pwr_off_func = rtw8852c_pwr_off_func, -+ .query_rxdesc = rtw89_core_query_rxdesc, - .fill_txdesc = rtw89_core_fill_txdesc_v1, - .fill_txdesc_fwcmd = rtw89_core_fill_txdesc_fwcmd_v1, - .cfg_ctrl_path = rtw89_mac_cfg_ctrl_path_v1, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-114-wifi-rtw89-use-struct-and-le32_get_bits-to-access-RX.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-114-wifi-rtw89-use-struct-and-le32_get_bits-to-access-RX.patch deleted file mode 100644 index bb6bff1cc..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-114-wifi-rtw89-use-struct-and-le32_get_bits-to-access-RX.patch +++ /dev/null @@ -1,102 +0,0 @@ -From 88bdc3ff956cd9267777ae8557de46bbf2d49e32 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 22 May 2023 20:25:10 +0800 -Subject: [PATCH 114/136] wifi: rtw89: use struct and le32_get_bits to access - RX info - -If received packet type is PPDU status, RX info provides information -attached by MAC hardware, and mention how long BB information attached. - -This conversion patch doesn't change logic at all. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230522122513.13559-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 7 +-- - drivers/net/wireless/realtek/rtw89/txrx.h | 53 +++++++++++------------ - 2 files changed, 29 insertions(+), 31 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1213,14 +1213,15 @@ static int rtw89_core_rx_process_mac_ppd - struct sk_buff *skb, - struct rtw89_rx_phy_ppdu *phy_ppdu) - { -+ const struct rtw89_rxinfo *rxinfo = (const struct rtw89_rxinfo *)skb->data; - bool rx_cnt_valid = false; - u8 plcp_size = 0; - u8 usr_num = 0; - u8 *phy_sts; - -- rx_cnt_valid = RTW89_GET_RXINFO_RX_CNT_VLD(skb->data); -- plcp_size = RTW89_GET_RXINFO_PLCP_LEN(skb->data) << 3; -- usr_num = RTW89_GET_RXINFO_USR_NUM(skb->data); -+ rx_cnt_valid = le32_get_bits(rxinfo->w0, RTW89_RXINFO_W0_RX_CNT_VLD); -+ plcp_size = le32_get_bits(rxinfo->w1, RTW89_RXINFO_W1_PLCP_LEN) << 3; -+ usr_num = le32_get_bits(rxinfo->w0, RTW89_RXINFO_W0_USR_NUM); - if (usr_num > RTW89_PPDU_MAX_USR) { - rtw89_warn(rtwdev, "Invalid user number in mac info\n"); - return -EINVAL; ---- a/drivers/net/wireless/realtek/rtw89/txrx.h -+++ b/drivers/net/wireless/realtek/rtw89/txrx.h -@@ -251,34 +251,31 @@ - #define RTW89_GET_RXWD_SEC_CAM_ID(rxdesc) \ - le32_get_bits((rxdesc)->dword5, GENMASK(7, 0)) - --#define RTW89_GET_RXINFO_USR_NUM(rpt) \ -- le32_get_bits(*((const __le32 *)rpt), GENMASK(3, 0)) --#define RTW89_GET_RXINFO_FW_DEFINE(rpt) \ -- le32_get_bits(*((const __le32 *)rpt), GENMASK(15, 8)) --#define RTW89_GET_RXINFO_LSIG_LEN(rpt) \ -- le32_get_bits(*((const __le32 *)rpt), GENMASK(27, 16)) --#define RTW89_GET_RXINFO_IS_TO_SELF(rpt) \ -- le32_get_bits(*((const __le32 *)rpt), BIT(28)) --#define RTW89_GET_RXINFO_RX_CNT_VLD(rpt) \ -- le32_get_bits(*((const __le32 *)rpt), BIT(29)) --#define RTW89_GET_RXINFO_LONG_RXD(rpt) \ -- le32_get_bits(*((const __le32 *)rpt), GENMASK(31, 30)) --#define RTW89_GET_RXINFO_SERVICE(rpt) \ -- le32_get_bits(*((const __le32 *)(rpt) + 1), GENMASK(15, 0)) --#define RTW89_GET_RXINFO_PLCP_LEN(rpt) \ -- le32_get_bits(*((const __le32 *)(rpt) + 1), GENMASK(23, 16)) --#define RTW89_GET_RXINFO_MAC_ID_VALID(rpt, usr) \ -- le32_get_bits(*((const __le32 *)(rpt) + (usr) + 2), BIT(0)) --#define RTW89_GET_RXINFO_DATA(rpt, usr) \ -- le32_get_bits(*((const __le32 *)(rpt) + (usr) + 2), BIT(1)) --#define RTW89_GET_RXINFO_CTRL(rpt, usr) \ -- le32_get_bits(*((const __le32 *)(rpt) + (usr) + 2), BIT(2)) --#define RTW89_GET_RXINFO_MGMT(rpt, usr) \ -- le32_get_bits(*((const __le32 *)(rpt) + (usr) + 2), BIT(3)) --#define RTW89_GET_RXINFO_BCM(rpt, usr) \ -- le32_get_bits(*((const __le32 *)(rpt) + (usr) + 2), BIT(4)) --#define RTW89_GET_RXINFO_MACID(rpt, usr) \ -- le32_get_bits(*((const __le32 *)(rpt) + (usr) + 2), GENMASK(15, 8)) -+struct rtw89_rxinfo_user { -+ __le32 w0; -+}; -+ -+#define RTW89_RXINFO_USER_MAC_ID_VALID BIT(0) -+#define RTW89_RXINFO_USER_DATA BIT(1) -+#define RTW89_RXINFO_USER_CTRL BIT(2) -+#define RTW89_RXINFO_USER_MGMT BIT(3) -+#define RTW89_RXINFO_USER_BCM BIT(4) -+#define RTW89_RXINFO_USER_MACID GENMASK(15, 8) -+ -+struct rtw89_rxinfo { -+ __le32 w0; -+ __le32 w1; -+ struct rtw89_rxinfo_user user[]; -+} __packed; -+ -+#define RTW89_RXINFO_W0_USR_NUM GENMASK(3, 0) -+#define RTW89_RXINFO_W0_FW_DEFINE GENMASK(15, 8) -+#define RTW89_RXINFO_W0_LSIG_LEN GENMASK(27, 16) -+#define RTW89_RXINFO_W0_IS_TO_SELF BIT(28) -+#define RTW89_RXINFO_W0_RX_CNT_VLD BIT(29) -+#define RTW89_RXINFO_W0_LONG_RXD GENMASK(31, 30) -+#define RTW89_RXINFO_W1_SERVICE GENMASK(15, 0) -+#define RTW89_RXINFO_W1_PLCP_LEN GENMASK(23, 16) - - #define RTW89_GET_PHY_STS_IE_MAP(sts) \ - le32_get_bits(*((const __le32 *)(sts)), GENMASK(4, 0)) diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-115-wifi-rtw89-use-struct-and-le32_get_bits-to-access-re.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-115-wifi-rtw89-use-struct-and-le32_get_bits-to-access-re.patch deleted file mode 100644 index 10c45d33b..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-115-wifi-rtw89-use-struct-and-le32_get_bits-to-access-re.patch +++ /dev/null @@ -1,197 +0,0 @@ -From 332debb80488e98f6083238bdf61e6f953d5c180 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 22 May 2023 20:25:11 +0800 -Subject: [PATCH 115/136] wifi: rtw89: use struct and le32_get_bits() to access - received PHY status IEs - -PHY status IEs generated by BB hardware is to provide more detail -information related to received packets, such as RSSI and bandwidth. - -To avoid type casting, change buf type from u8* to void* as well. - -This patch doesn't change logic at all. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230522122513.13559-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 53 ++++++++++++++--------- - drivers/net/wireless/realtek/rtw89/core.h | 2 +- - drivers/net/wireless/realtek/rtw89/txrx.h | 37 ++++++++-------- - 3 files changed, 52 insertions(+), 40 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1280,7 +1280,8 @@ static void rtw89_core_rx_process_phy_pp - - #define VAR_LEN 0xff - #define VAR_LEN_UNIT 8 --static u16 rtw89_core_get_phy_status_ie_len(struct rtw89_dev *rtwdev, u8 *addr) -+static u16 rtw89_core_get_phy_status_ie_len(struct rtw89_dev *rtwdev, -+ const struct rtw89_phy_sts_iehdr *iehdr) - { - static const u8 physts_ie_len_tab[32] = { - 16, 32, 24, 24, 8, 8, 8, 8, VAR_LEN, 8, VAR_LEN, 176, VAR_LEN, -@@ -1290,19 +1291,20 @@ static u16 rtw89_core_get_phy_status_ie_ - u16 ie_len; - u8 ie; - -- ie = RTW89_GET_PHY_STS_IE_TYPE(addr); -+ ie = le32_get_bits(iehdr->w0, RTW89_PHY_STS_IEHDR_TYPE); - if (physts_ie_len_tab[ie] != VAR_LEN) - ie_len = physts_ie_len_tab[ie]; - else -- ie_len = RTW89_GET_PHY_STS_IE_LEN(addr) * VAR_LEN_UNIT; -+ ie_len = le32_get_bits(iehdr->w0, RTW89_PHY_STS_IEHDR_LEN) * VAR_LEN_UNIT; - - return ie_len; - } - --static void rtw89_core_parse_phy_status_ie01(struct rtw89_dev *rtwdev, u8 *addr, -+static void rtw89_core_parse_phy_status_ie01(struct rtw89_dev *rtwdev, -+ const struct rtw89_phy_sts_iehdr *iehdr, - struct rtw89_rx_phy_ppdu *phy_ppdu) - { -- const struct rtw89_phy_sts_ie0 *ie = (const struct rtw89_phy_sts_ie0 *)addr; -+ const struct rtw89_phy_sts_ie0 *ie = (const struct rtw89_phy_sts_ie0 *)iehdr; - s16 cfo; - u32 t; - -@@ -1330,15 +1332,17 @@ static void rtw89_core_parse_phy_status_ - rtw89_phy_cfo_parse(rtwdev, cfo, phy_ppdu); - } - --static int rtw89_core_process_phy_status_ie(struct rtw89_dev *rtwdev, u8 *addr, -+static int rtw89_core_process_phy_status_ie(struct rtw89_dev *rtwdev, -+ const struct rtw89_phy_sts_iehdr *iehdr, - struct rtw89_rx_phy_ppdu *phy_ppdu) - { - u8 ie; - -- ie = RTW89_GET_PHY_STS_IE_TYPE(addr); -+ ie = le32_get_bits(iehdr->w0, RTW89_PHY_STS_IEHDR_TYPE); -+ - switch (ie) { - case RTW89_PHYSTS_IE01_CMN_OFDM: -- rtw89_core_parse_phy_status_ie01(rtwdev, addr, phy_ppdu); -+ rtw89_core_parse_phy_status_ie01(rtwdev, iehdr, phy_ppdu); - break; - default: - break; -@@ -1349,21 +1353,26 @@ static int rtw89_core_process_phy_status - - static void rtw89_core_update_phy_ppdu(struct rtw89_rx_phy_ppdu *phy_ppdu) - { -+ const struct rtw89_phy_sts_hdr *hdr = phy_ppdu->buf; - u8 *rssi = phy_ppdu->rssi; -- u8 *buf = phy_ppdu->buf; - -- phy_ppdu->ie = RTW89_GET_PHY_STS_IE_MAP(buf); -- phy_ppdu->rssi_avg = RTW89_GET_PHY_STS_RSSI_AVG(buf); -- rssi[RF_PATH_A] = RTW89_GET_PHY_STS_RSSI_A(buf); -- rssi[RF_PATH_B] = RTW89_GET_PHY_STS_RSSI_B(buf); -- rssi[RF_PATH_C] = RTW89_GET_PHY_STS_RSSI_C(buf); -- rssi[RF_PATH_D] = RTW89_GET_PHY_STS_RSSI_D(buf); -+ phy_ppdu->ie = le32_get_bits(hdr->w0, RTW89_PHY_STS_HDR_W0_IE_MAP); -+ phy_ppdu->rssi_avg = le32_get_bits(hdr->w0, RTW89_PHY_STS_HDR_W0_RSSI_AVG); -+ rssi[RF_PATH_A] = le32_get_bits(hdr->w1, RTW89_PHY_STS_HDR_W1_RSSI_A); -+ rssi[RF_PATH_B] = le32_get_bits(hdr->w1, RTW89_PHY_STS_HDR_W1_RSSI_B); -+ rssi[RF_PATH_C] = le32_get_bits(hdr->w1, RTW89_PHY_STS_HDR_W1_RSSI_C); -+ rssi[RF_PATH_D] = le32_get_bits(hdr->w1, RTW89_PHY_STS_HDR_W1_RSSI_D); - } - - static int rtw89_core_rx_process_phy_ppdu(struct rtw89_dev *rtwdev, - struct rtw89_rx_phy_ppdu *phy_ppdu) - { -- if (RTW89_GET_PHY_STS_LEN(phy_ppdu->buf) << 3 != phy_ppdu->len) { -+ const struct rtw89_phy_sts_hdr *hdr = phy_ppdu->buf; -+ u32 len_from_header; -+ -+ len_from_header = le32_get_bits(hdr->w0, RTW89_PHY_STS_HDR_W0_LEN) << 3; -+ -+ if (len_from_header != phy_ppdu->len) { - rtw89_debug(rtwdev, RTW89_DBG_UNEXP, "phy ppdu len mismatch\n"); - return -EINVAL; - } -@@ -1376,17 +1385,19 @@ static int rtw89_core_rx_parse_phy_sts(s - struct rtw89_rx_phy_ppdu *phy_ppdu) - { - u16 ie_len; -- u8 *pos, *end; -+ void *pos, *end; - - /* mark invalid reports and bypass them */ - if (phy_ppdu->ie < RTW89_CCK_PKT) - return -EINVAL; - -- pos = (u8 *)phy_ppdu->buf + PHY_STS_HDR_LEN; -- end = (u8 *)phy_ppdu->buf + phy_ppdu->len; -+ pos = phy_ppdu->buf + PHY_STS_HDR_LEN; -+ end = phy_ppdu->buf + phy_ppdu->len; - while (pos < end) { -- ie_len = rtw89_core_get_phy_status_ie_len(rtwdev, pos); -- rtw89_core_process_phy_status_ie(rtwdev, pos, phy_ppdu); -+ const struct rtw89_phy_sts_iehdr *iehdr = pos; -+ -+ ie_len = rtw89_core_get_phy_status_ie_len(rtwdev, iehdr); -+ rtw89_core_process_phy_status_ie(rtwdev, iehdr, phy_ppdu); - pos += ie_len; - if (pos > end || ie_len == 0) { - rtw89_debug(rtwdev, RTW89_DBG_TXRX, ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -550,7 +550,7 @@ struct rtw89_rate_desc { - #define RF_PATH_MAX 4 - #define RTW89_MAX_PPDU_CNT 8 - struct rtw89_rx_phy_ppdu { -- u8 *buf; -+ void *buf; - u32 len; - u8 rssi_avg; - u8 rssi[RF_PATH_MAX]; ---- a/drivers/net/wireless/realtek/rtw89/txrx.h -+++ b/drivers/net/wireless/realtek/rtw89/txrx.h -@@ -277,24 +277,25 @@ struct rtw89_rxinfo { - #define RTW89_RXINFO_W1_SERVICE GENMASK(15, 0) - #define RTW89_RXINFO_W1_PLCP_LEN GENMASK(23, 16) - --#define RTW89_GET_PHY_STS_IE_MAP(sts) \ -- le32_get_bits(*((const __le32 *)(sts)), GENMASK(4, 0)) --#define RTW89_GET_PHY_STS_RSSI_A(sts) \ -- le32_get_bits(*((const __le32 *)(sts) + 1), GENMASK(7, 0)) --#define RTW89_GET_PHY_STS_RSSI_B(sts) \ -- le32_get_bits(*((const __le32 *)(sts) + 1), GENMASK(15, 8)) --#define RTW89_GET_PHY_STS_RSSI_C(sts) \ -- le32_get_bits(*((const __le32 *)(sts) + 1), GENMASK(23, 16)) --#define RTW89_GET_PHY_STS_RSSI_D(sts) \ -- le32_get_bits(*((const __le32 *)(sts) + 1), GENMASK(31, 24)) --#define RTW89_GET_PHY_STS_LEN(sts) \ -- le32_get_bits(*((const __le32 *)sts), GENMASK(15, 8)) --#define RTW89_GET_PHY_STS_RSSI_AVG(sts) \ -- le32_get_bits(*((const __le32 *)sts), GENMASK(31, 24)) --#define RTW89_GET_PHY_STS_IE_TYPE(ie) \ -- le32_get_bits(*((const __le32 *)ie), GENMASK(4, 0)) --#define RTW89_GET_PHY_STS_IE_LEN(ie) \ -- le32_get_bits(*((const __le32 *)ie), GENMASK(11, 5)) -+struct rtw89_phy_sts_hdr { -+ __le32 w0; -+ __le32 w1; -+} __packed; -+ -+#define RTW89_PHY_STS_HDR_W0_IE_MAP GENMASK(4, 0) -+#define RTW89_PHY_STS_HDR_W0_LEN GENMASK(15, 8) -+#define RTW89_PHY_STS_HDR_W0_RSSI_AVG GENMASK(31, 24) -+#define RTW89_PHY_STS_HDR_W1_RSSI_A GENMASK(7, 0) -+#define RTW89_PHY_STS_HDR_W1_RSSI_B GENMASK(15, 8) -+#define RTW89_PHY_STS_HDR_W1_RSSI_C GENMASK(23, 16) -+#define RTW89_PHY_STS_HDR_W1_RSSI_D GENMASK(31, 24) -+ -+struct rtw89_phy_sts_iehdr { -+ __le32 w0; -+}; -+ -+#define RTW89_PHY_STS_IEHDR_TYPE GENMASK(4, 0) -+#define RTW89_PHY_STS_IEHDR_LEN GENMASK(11, 5) - - struct rtw89_phy_sts_ie0 { - __le32 w0; diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-116-wifi-rtw89-use-struct-and-le32_get_bits-to-access-RX.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-116-wifi-rtw89-use-struct-and-le32_get_bits-to-access-RX.patch deleted file mode 100644 index 7a3ff1659..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-116-wifi-rtw89-use-struct-and-le32_get_bits-to-access-RX.patch +++ /dev/null @@ -1,160 +0,0 @@ -From c26700d2df01d084ee904ca872fd4db67e772c6f Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 22 May 2023 20:25:12 +0800 -Subject: [PATCH 116/136] wifi: rtw89: use struct and le32_get_bits() to access - RX descriptor - -RX descriptor is to provide basic and important information related to -packets, such as packet size, security, MAC ID and so on. Change to use -struct to access these fields, and not change logic at all. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230522122513.13559-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 50 ++++++++--------- - drivers/net/wireless/realtek/rtw89/txrx.h | 65 ----------------------- - 2 files changed, 25 insertions(+), 90 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -1806,27 +1806,27 @@ void rtw89_core_query_rxdesc(struct rtw8 - u8 shift_len, drv_info_len; - - rxd_s = (struct rtw89_rxdesc_short *)(data + data_offset); -- desc_info->pkt_size = RTW89_GET_RXWD_PKT_SIZE(rxd_s); -- desc_info->drv_info_size = RTW89_GET_RXWD_DRV_INFO_SIZE(rxd_s); -- desc_info->long_rxdesc = RTW89_GET_RXWD_LONG_RXD(rxd_s); -- desc_info->pkt_type = RTW89_GET_RXWD_RPKT_TYPE(rxd_s); -- desc_info->mac_info_valid = RTW89_GET_RXWD_MAC_INFO_VALID(rxd_s); -+ desc_info->pkt_size = le32_get_bits(rxd_s->dword0, AX_RXD_RPKT_LEN_MASK); -+ desc_info->drv_info_size = le32_get_bits(rxd_s->dword0, AX_RXD_DRV_INFO_SIZE_MASK); -+ desc_info->long_rxdesc = le32_get_bits(rxd_s->dword0, AX_RXD_LONG_RXD); -+ desc_info->pkt_type = le32_get_bits(rxd_s->dword0, AX_RXD_RPKT_TYPE_MASK); -+ desc_info->mac_info_valid = le32_get_bits(rxd_s->dword0, AX_RXD_MAC_INFO_VLD); - if (chip->chip_id == RTL8852C) -- desc_info->bw = RTW89_GET_RXWD_BW_V1(rxd_s); -+ desc_info->bw = le32_get_bits(rxd_s->dword1, AX_RXD_BW_v1_MASK); - else -- desc_info->bw = RTW89_GET_RXWD_BW(rxd_s); -- desc_info->data_rate = RTW89_GET_RXWD_DATA_RATE(rxd_s); -- desc_info->gi_ltf = RTW89_GET_RXWD_GI_LTF(rxd_s); -- desc_info->user_id = RTW89_GET_RXWD_USER_ID(rxd_s); -- desc_info->sr_en = RTW89_GET_RXWD_SR_EN(rxd_s); -- desc_info->ppdu_cnt = RTW89_GET_RXWD_PPDU_CNT(rxd_s); -- desc_info->ppdu_type = RTW89_GET_RXWD_PPDU_TYPE(rxd_s); -- desc_info->free_run_cnt = RTW89_GET_RXWD_FREE_RUN_CNT(rxd_s); -- desc_info->icv_err = RTW89_GET_RXWD_ICV_ERR(rxd_s); -- desc_info->crc32_err = RTW89_GET_RXWD_CRC32_ERR(rxd_s); -- desc_info->hw_dec = RTW89_GET_RXWD_HW_DEC(rxd_s); -- desc_info->sw_dec = RTW89_GET_RXWD_SW_DEC(rxd_s); -- desc_info->addr1_match = RTW89_GET_RXWD_A1_MATCH(rxd_s); -+ desc_info->bw = le32_get_bits(rxd_s->dword1, AX_RXD_BW_MASK); -+ desc_info->data_rate = le32_get_bits(rxd_s->dword1, AX_RXD_RX_DATARATE_MASK); -+ desc_info->gi_ltf = le32_get_bits(rxd_s->dword1, AX_RXD_RX_GI_LTF_MASK); -+ desc_info->user_id = le32_get_bits(rxd_s->dword1, AX_RXD_USER_ID_MASK); -+ desc_info->sr_en = le32_get_bits(rxd_s->dword1, AX_RXD_SR_EN); -+ desc_info->ppdu_cnt = le32_get_bits(rxd_s->dword1, AX_RXD_PPDU_CNT_MASK); -+ desc_info->ppdu_type = le32_get_bits(rxd_s->dword1, AX_RXD_PPDU_TYPE_MASK); -+ desc_info->free_run_cnt = le32_get_bits(rxd_s->dword2, AX_RXD_FREERUN_CNT_MASK); -+ desc_info->icv_err = le32_get_bits(rxd_s->dword3, AX_RXD_ICV_ERR); -+ desc_info->crc32_err = le32_get_bits(rxd_s->dword3, AX_RXD_CRC32_ERR); -+ desc_info->hw_dec = le32_get_bits(rxd_s->dword3, AX_RXD_HW_DEC); -+ desc_info->sw_dec = le32_get_bits(rxd_s->dword3, AX_RXD_SW_DEC); -+ desc_info->addr1_match = le32_get_bits(rxd_s->dword3, AX_RXD_A1_MATCH); - - shift_len = desc_info->shift << 1; /* 2-byte unit */ - drv_info_len = desc_info->drv_info_size << 3; /* 8-byte unit */ -@@ -1841,12 +1841,12 @@ void rtw89_core_query_rxdesc(struct rtw8 - return; - - rxd_l = (struct rtw89_rxdesc_long *)(data + data_offset); -- desc_info->frame_type = RTW89_GET_RXWD_TYPE(rxd_l); -- desc_info->addr_cam_valid = RTW89_GET_RXWD_ADDR_CAM_VLD(rxd_l); -- desc_info->addr_cam_id = RTW89_GET_RXWD_ADDR_CAM_ID(rxd_l); -- desc_info->sec_cam_id = RTW89_GET_RXWD_SEC_CAM_ID(rxd_l); -- desc_info->mac_id = RTW89_GET_RXWD_MAC_ID(rxd_l); -- desc_info->rx_pl_id = RTW89_GET_RXWD_RX_PL_ID(rxd_l); -+ desc_info->frame_type = le32_get_bits(rxd_l->dword4, AX_RXD_TYPE_MASK); -+ desc_info->addr_cam_valid = le32_get_bits(rxd_l->dword5, AX_RXD_ADDR_CAM_VLD); -+ desc_info->addr_cam_id = le32_get_bits(rxd_l->dword5, AX_RXD_ADDR_CAM_MASK); -+ desc_info->sec_cam_id = le32_get_bits(rxd_l->dword5, AX_RXD_SEC_CAM_IDX_MASK); -+ desc_info->mac_id = le32_get_bits(rxd_l->dword5, AX_RXD_MAC_ID_MASK); -+ desc_info->rx_pl_id = le32_get_bits(rxd_l->dword5, AX_RXD_RX_PL_ID_MASK); - } - EXPORT_SYMBOL(rtw89_core_query_rxdesc); - ---- a/drivers/net/wireless/realtek/rtw89/txrx.h -+++ b/drivers/net/wireless/realtek/rtw89/txrx.h -@@ -186,71 +186,6 @@ - #define AX_RXD_BIP_KEYID BIT(27) - #define AX_RXD_BIP_ENC BIT(28) - --/* RX DESC helpers */ --/* Short Descriptor */ --#define RTW89_GET_RXWD_LONG_RXD(rxdesc) \ -- le32_get_bits((rxdesc)->dword0, BIT(31)) --#define RTW89_GET_RXWD_DRV_INFO_SIZE(rxdesc) \ -- le32_get_bits((rxdesc)->dword0, GENMASK(30, 28)) --#define RTW89_GET_RXWD_RPKT_TYPE(rxdesc) \ -- le32_get_bits((rxdesc)->dword0, GENMASK(27, 24)) --#define RTW89_GET_RXWD_MAC_INFO_VALID(rxdesc) \ -- le32_get_bits((rxdesc)->dword0, BIT(23)) --#define RTW89_GET_RXWD_BB_SEL(rxdesc) \ -- le32_get_bits((rxdesc)->dword0, BIT(22)) --#define RTW89_GET_RXWD_HD_IV_LEN(rxdesc) \ -- le32_get_bits((rxdesc)->dword0, GENMASK(21, 16)) --#define RTW89_GET_RXWD_SHIFT(rxdesc) \ -- le32_get_bits((rxdesc)->dword0, GENMASK(15, 14)) --#define RTW89_GET_RXWD_PKT_SIZE(rxdesc) \ -- le32_get_bits((rxdesc)->dword0, GENMASK(13, 0)) --#define RTW89_GET_RXWD_BW(rxdesc) \ -- le32_get_bits((rxdesc)->dword1, GENMASK(31, 30)) --#define RTW89_GET_RXWD_BW_V1(rxdesc) \ -- le32_get_bits((rxdesc)->dword1, GENMASK(31, 29)) --#define RTW89_GET_RXWD_GI_LTF(rxdesc) \ -- le32_get_bits((rxdesc)->dword1, GENMASK(27, 25)) --#define RTW89_GET_RXWD_DATA_RATE(rxdesc) \ -- le32_get_bits((rxdesc)->dword1, GENMASK(24, 16)) --#define RTW89_GET_RXWD_USER_ID(rxdesc) \ -- le32_get_bits((rxdesc)->dword1, GENMASK(15, 8)) --#define RTW89_GET_RXWD_SR_EN(rxdesc) \ -- le32_get_bits((rxdesc)->dword1, BIT(7)) --#define RTW89_GET_RXWD_PPDU_CNT(rxdesc) \ -- le32_get_bits((rxdesc)->dword1, GENMASK(6, 4)) --#define RTW89_GET_RXWD_PPDU_TYPE(rxdesc) \ -- le32_get_bits((rxdesc)->dword1, GENMASK(3, 0)) --#define RTW89_GET_RXWD_FREE_RUN_CNT(rxdesc) \ -- le32_get_bits((rxdesc)->dword2, GENMASK(31, 0)) --#define RTW89_GET_RXWD_ICV_ERR(rxdesc) \ -- le32_get_bits((rxdesc)->dword3, BIT(10)) --#define RTW89_GET_RXWD_CRC32_ERR(rxdesc) \ -- le32_get_bits((rxdesc)->dword3, BIT(9)) --#define RTW89_GET_RXWD_HW_DEC(rxdesc) \ -- le32_get_bits((rxdesc)->dword3, BIT(2)) --#define RTW89_GET_RXWD_SW_DEC(rxdesc) \ -- le32_get_bits((rxdesc)->dword3, BIT(1)) --#define RTW89_GET_RXWD_A1_MATCH(rxdesc) \ -- le32_get_bits((rxdesc)->dword3, BIT(0)) -- --/* Long Descriptor */ --#define RTW89_GET_RXWD_FRAG(rxdesc) \ -- le32_get_bits((rxdesc)->dword4, GENMASK(31, 28)) --#define RTW89_GET_RXWD_SEQ(rxdesc) \ -- le32_get_bits((rxdesc)->dword4, GENMASK(27, 16)) --#define RTW89_GET_RXWD_TYPE(rxdesc) \ -- le32_get_bits((rxdesc)->dword4, GENMASK(1, 0)) --#define RTW89_GET_RXWD_ADDR_CAM_VLD(rxdesc) \ -- le32_get_bits((rxdesc)->dword5, BIT(28)) --#define RTW89_GET_RXWD_RX_PL_ID(rxdesc) \ -- le32_get_bits((rxdesc)->dword5, GENMASK(27, 24)) --#define RTW89_GET_RXWD_MAC_ID(rxdesc) \ -- le32_get_bits((rxdesc)->dword5, GENMASK(23, 16)) --#define RTW89_GET_RXWD_ADDR_CAM_ID(rxdesc) \ -- le32_get_bits((rxdesc)->dword5, GENMASK(15, 8)) --#define RTW89_GET_RXWD_SEC_CAM_ID(rxdesc) \ -- le32_get_bits((rxdesc)->dword5, GENMASK(7, 0)) -- - struct rtw89_rxinfo_user { - __le32 w0; - }; diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-117-wifi-rtw89-use-struct-to-access-register-based-H2C-C.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-117-wifi-rtw89-use-struct-to-access-register-based-H2C-C.patch deleted file mode 100644 index 9354a572b..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-117-wifi-rtw89-use-struct-to-access-register-based-H2C-C.patch +++ /dev/null @@ -1,246 +0,0 @@ -From 68012b44dfc723a114748a5e67f98a99b2943852 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Mon, 22 May 2023 20:25:13 +0800 -Subject: [PATCH 117/136] wifi: rtw89: use struct to access register-based - H2C/C2H - -The register-based H2C/C2H are used to exchange commands and events with -firmware. The exchange data is limited, but it is relatively simple, -because it can work before HCI initialization. To make these code clean, -use struct to access them. This patch doesn't change logic at all. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230522122513.13559-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 18 ++-- - drivers/net/wireless/realtek/rtw89/fw.h | 102 ++++++++++++----------- - drivers/net/wireless/realtek/rtw89/mac.c | 23 ++--- - 3 files changed, 77 insertions(+), 66 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -2917,12 +2917,13 @@ static int rtw89_fw_write_h2c_reg(struct - } - - len = DIV_ROUND_UP(info->content_len + RTW89_H2CREG_HDR_LEN, -- sizeof(info->h2creg[0])); -+ sizeof(info->u.h2creg[0])); -+ -+ u32p_replace_bits(&info->u.hdr.w0, info->id, RTW89_H2CREG_HDR_FUNC_MASK); -+ u32p_replace_bits(&info->u.hdr.w0, len, RTW89_H2CREG_HDR_LEN_MASK); - -- RTW89_SET_H2CREG_HDR_FUNC(&info->h2creg[0], info->id); -- RTW89_SET_H2CREG_HDR_LEN(&info->h2creg[0], len); - for (i = 0; i < RTW89_H2CREG_MAX; i++) -- rtw89_write32(rtwdev, h2c_reg[i], info->h2creg[i]); -+ rtw89_write32(rtwdev, h2c_reg[i], info->u.h2creg[i]); - - fw_info->h2c_counter++; - rtw89_write8_mask(rtwdev, chip->h2c_counter_reg.addr, -@@ -2952,13 +2953,14 @@ static int rtw89_fw_read_c2h_reg(struct - } - - for (i = 0; i < RTW89_C2HREG_MAX; i++) -- info->c2hreg[i] = rtw89_read32(rtwdev, c2h_reg[i]); -+ info->u.c2hreg[i] = rtw89_read32(rtwdev, c2h_reg[i]); - - rtw89_write8(rtwdev, chip->c2h_ctrl_reg, 0); - -- info->id = RTW89_GET_C2H_HDR_FUNC(*info->c2hreg); -- info->content_len = (RTW89_GET_C2H_HDR_LEN(*info->c2hreg) << 2) - -- RTW89_C2HREG_HDR_LEN; -+ info->id = u32_get_bits(info->u.hdr.w0, RTW89_C2HREG_HDR_FUNC_MASK); -+ info->content_len = -+ (u32_get_bits(info->u.hdr.w0, RTW89_C2HREG_HDR_LEN_MASK) << 2) - -+ RTW89_C2HREG_HDR_LEN; - - fw_info->c2h_counter++; - rtw89_write8_mask(rtwdev, chip->c2h_counter_reg.addr, ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -18,15 +18,51 @@ enum rtw89_fw_dl_status { - RTW89_FWDL_WCPU_FW_INIT_RDY = 7 - }; - --#define RTW89_GET_C2H_HDR_FUNC(info) \ -- u32_get_bits(info, GENMASK(6, 0)) --#define RTW89_GET_C2H_HDR_LEN(info) \ -- u32_get_bits(info, GENMASK(11, 8)) -- --#define RTW89_SET_H2CREG_HDR_FUNC(info, val) \ -- u32p_replace_bits(info, val, GENMASK(6, 0)) --#define RTW89_SET_H2CREG_HDR_LEN(info, val) \ -- u32p_replace_bits(info, val, GENMASK(11, 8)) -+struct rtw89_c2hreg_hdr { -+ u32 w0; -+}; -+ -+#define RTW89_C2HREG_HDR_FUNC_MASK GENMASK(6, 0) -+#define RTW89_C2HREG_HDR_ACK BIT(7) -+#define RTW89_C2HREG_HDR_LEN_MASK GENMASK(11, 8) -+#define RTW89_C2HREG_HDR_SEQ_MASK GENMASK(15, 12) -+ -+struct rtw89_c2hreg_phycap { -+ u32 w0; -+ u32 w1; -+ u32 w2; -+ u32 w3; -+} __packed; -+ -+#define RTW89_C2HREG_PHYCAP_W0_FUNC GENMASK(6, 0) -+#define RTW89_C2HREG_PHYCAP_W0_ACK BIT(7) -+#define RTW89_C2HREG_PHYCAP_W0_LEN GENMASK(11, 8) -+#define RTW89_C2HREG_PHYCAP_W0_SEQ GENMASK(15, 12) -+#define RTW89_C2HREG_PHYCAP_W0_RX_NSS GENMASK(23, 16) -+#define RTW89_C2HREG_PHYCAP_W0_BW GENMASK(31, 24) -+#define RTW89_C2HREG_PHYCAP_W1_TX_NSS GENMASK(7, 0) -+#define RTW89_C2HREG_PHYCAP_W1_PROT GENMASK(15, 8) -+#define RTW89_C2HREG_PHYCAP_W1_NIC GENMASK(23, 16) -+#define RTW89_C2HREG_PHYCAP_W1_WL_FUNC GENMASK(31, 24) -+#define RTW89_C2HREG_PHYCAP_W2_HW_TYPE GENMASK(7, 0) -+#define RTW89_C2HREG_PHYCAP_W3_ANT_TX_NUM GENMASK(15, 8) -+#define RTW89_C2HREG_PHYCAP_W3_ANT_RX_NUM GENMASK(23, 16) -+ -+struct rtw89_h2creg_hdr { -+ u32 w0; -+}; -+ -+#define RTW89_H2CREG_HDR_FUNC_MASK GENMASK(6, 0) -+#define RTW89_H2CREG_HDR_LEN_MASK GENMASK(11, 8) -+ -+struct rtw89_h2creg_sch_tx_en { -+ u32 w0; -+ u32 w1; -+} __packed; -+ -+#define RTW89_H2CREG_SCH_TX_EN_W0_EN GENMASK(31, 16) -+#define RTW89_H2CREG_SCH_TX_EN_W1_MASK GENMASK(15, 0) -+#define RTW89_H2CREG_SCH_TX_EN_W1_BAND BIT(16) - - #define RTW89_H2CREG_MAX 4 - #define RTW89_C2HREG_MAX 4 -@@ -36,13 +72,21 @@ enum rtw89_fw_dl_status { - struct rtw89_mac_c2h_info { - u8 id; - u8 content_len; -- u32 c2hreg[RTW89_C2HREG_MAX]; -+ union { -+ u32 c2hreg[RTW89_C2HREG_MAX]; -+ struct rtw89_c2hreg_hdr hdr; -+ struct rtw89_c2hreg_phycap phycap; -+ } u; - }; - - struct rtw89_mac_h2c_info { - u8 id; - u8 content_len; -- u32 h2creg[RTW89_H2CREG_MAX]; -+ union { -+ u32 h2creg[RTW89_H2CREG_MAX]; -+ struct rtw89_h2creg_hdr hdr; -+ struct rtw89_h2creg_sch_tx_en sch_tx_en; -+ } u; - }; - - enum rtw89_mac_h2c_type { -@@ -63,33 +107,6 @@ enum rtw89_mac_c2h_type { - RTW89_FWCMD_C2HREG_FUNC_NULL = 0xFF - }; - --#define RTW89_GET_C2H_PHYCAP_FUNC(info) \ -- u32_get_bits(*((const u32 *)(info)), GENMASK(6, 0)) --#define RTW89_GET_C2H_PHYCAP_ACK(info) \ -- u32_get_bits(*((const u32 *)(info)), BIT(7)) --#define RTW89_GET_C2H_PHYCAP_LEN(info) \ -- u32_get_bits(*((const u32 *)(info)), GENMASK(11, 8)) --#define RTW89_GET_C2H_PHYCAP_SEQ(info) \ -- u32_get_bits(*((const u32 *)(info)), GENMASK(15, 12)) --#define RTW89_GET_C2H_PHYCAP_RX_NSS(info) \ -- u32_get_bits(*((const u32 *)(info)), GENMASK(23, 16)) --#define RTW89_GET_C2H_PHYCAP_BW(info) \ -- u32_get_bits(*((const u32 *)(info)), GENMASK(31, 24)) --#define RTW89_GET_C2H_PHYCAP_TX_NSS(info) \ -- u32_get_bits(*((const u32 *)(info) + 1), GENMASK(7, 0)) --#define RTW89_GET_C2H_PHYCAP_PROT(info) \ -- u32_get_bits(*((const u32 *)(info) + 1), GENMASK(15, 8)) --#define RTW89_GET_C2H_PHYCAP_NIC(info) \ -- u32_get_bits(*((const u32 *)(info) + 1), GENMASK(23, 16)) --#define RTW89_GET_C2H_PHYCAP_WL_FUNC(info) \ -- u32_get_bits(*((const u32 *)(info) + 1), GENMASK(31, 24)) --#define RTW89_GET_C2H_PHYCAP_HW_TYPE(info) \ -- u32_get_bits(*((const u32 *)(info) + 2), GENMASK(7, 0)) --#define RTW89_GET_C2H_PHYCAP_ANT_TX_NUM(info) \ -- u32_get_bits(*((const u32 *)(info) + 3), GENMASK(15, 8)) --#define RTW89_GET_C2H_PHYCAP_ANT_RX_NUM(info) \ -- u32_get_bits(*((const u32 *)(info) + 3), GENMASK(23, 16)) -- - enum rtw89_fw_c2h_category { - RTW89_C2H_CAT_TEST, - RTW89_C2H_CAT_MAC, -@@ -214,17 +231,6 @@ struct rtw89_fw_macid_pause_grp { - __le32 mask_grp[4]; - } __packed; - --struct rtw89_h2creg_sch_tx_en { -- u8 func:7; -- u8 ack:1; -- u8 total_len:4; -- u8 seq_num:4; -- u16 tx_en:16; -- u16 mask:16; -- u8 band:1; -- u16 rsvd:15; --} __packed; -- - #define RTW89_H2C_MAX_SIZE 2048 - #define RTW89_CHANNEL_TIME 45 - #define RTW89_CHANNEL_TIME_6G 20 ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -2650,6 +2650,7 @@ int rtw89_mac_setup_phycap(struct rtw89_ - struct rtw89_hal *hal = &rtwdev->hal; - const struct rtw89_chip_info *chip = rtwdev->chip; - struct rtw89_mac_c2h_info c2h_info = {0}; -+ const struct rtw89_c2hreg_phycap *phycap; - u8 tx_nss; - u8 rx_nss; - u8 tx_ant; -@@ -2660,10 +2661,12 @@ int rtw89_mac_setup_phycap(struct rtw89_ - if (ret) - return ret; - -- tx_nss = RTW89_GET_C2H_PHYCAP_TX_NSS(c2h_info.c2hreg); -- rx_nss = RTW89_GET_C2H_PHYCAP_RX_NSS(c2h_info.c2hreg); -- tx_ant = RTW89_GET_C2H_PHYCAP_ANT_TX_NUM(c2h_info.c2hreg); -- rx_ant = RTW89_GET_C2H_PHYCAP_ANT_RX_NUM(c2h_info.c2hreg); -+ phycap = &c2h_info.u.phycap; -+ -+ tx_nss = u32_get_bits(phycap->w1, RTW89_C2HREG_PHYCAP_W1_TX_NSS); -+ rx_nss = u32_get_bits(phycap->w0, RTW89_C2HREG_PHYCAP_W0_RX_NSS); -+ tx_ant = u32_get_bits(phycap->w3, RTW89_C2HREG_PHYCAP_W3_ANT_TX_NUM); -+ rx_ant = u32_get_bits(phycap->w3, RTW89_C2HREG_PHYCAP_W3_ANT_RX_NUM); - - hal->tx_nss = tx_nss ? min_t(u8, tx_nss, chip->tx_nss) : chip->tx_nss; - hal->rx_nss = rx_nss ? min_t(u8, rx_nss, chip->rx_nss) : chip->rx_nss; -@@ -2704,14 +2707,14 @@ static int rtw89_hw_sch_tx_en_h2c(struct - u32 ret; - struct rtw89_mac_c2h_info c2h_info = {0}; - struct rtw89_mac_h2c_info h2c_info = {0}; -- struct rtw89_h2creg_sch_tx_en *h2creg = -- (struct rtw89_h2creg_sch_tx_en *)h2c_info.h2creg; -+ struct rtw89_h2creg_sch_tx_en *sch_tx_en = &h2c_info.u.sch_tx_en; - - h2c_info.id = RTW89_FWCMD_H2CREG_FUNC_SCH_TX_EN; -- h2c_info.content_len = sizeof(*h2creg) - RTW89_H2CREG_HDR_LEN; -- h2creg->tx_en = tx_en_u16; -- h2creg->mask = mask_u16; -- h2creg->band = band; -+ h2c_info.content_len = sizeof(*sch_tx_en) - RTW89_H2CREG_HDR_LEN; -+ -+ u32p_replace_bits(&sch_tx_en->w0, tx_en_u16, RTW89_H2CREG_SCH_TX_EN_W0_EN); -+ u32p_replace_bits(&sch_tx_en->w1, mask_u16, RTW89_H2CREG_SCH_TX_EN_W1_MASK); -+ u32p_replace_bits(&sch_tx_en->w1, band, RTW89_H2CREG_SCH_TX_EN_W1_BAND); - - ret = rtw89_fw_msg_reg(rtwdev, &h2c_info, &c2h_info); - if (ret) diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-118-wifi-rtw89-8851b-rfk-Fix-spelling-mistake-KIP_RESOTR.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-118-wifi-rtw89-8851b-rfk-Fix-spelling-mistake-KIP_RESOTR.patch deleted file mode 100644 index 3f595f2d6..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-118-wifi-rtw89-8851b-rfk-Fix-spelling-mistake-KIP_RESOTR.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 56fc4d482783f5e45a6a2b3ec0d9f557908cdf77 Mon Sep 17 00:00:00 2001 -From: Colin Ian King -Date: Mon, 22 May 2023 09:59:24 +0100 -Subject: [PATCH 118/136] wifi: rtw89: 8851b: rfk: Fix spelling mistake - KIP_RESOTRE -> KIP_RESTORE - -There is a spelling mistake in a literal string. Fix it. - -Signed-off-by: Colin Ian King -Reviewed-by: Simon Horman -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230522085924.913649-1-colin.i.king@gmail.com ---- - drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -@@ -1705,7 +1705,7 @@ static void _dpk_one_shot(struct rtw89_d - id == 0x2c ? "GAIN_LOSS" : - id == 0x2d ? "MDPK_IDL" : - id == 0x2f ? "DPK_GAIN_NORM" : -- id == 0x31 ? "KIP_RESOTRE" : -+ id == 0x31 ? "KIP_RESTORE" : - id == 0x6 ? "LBK_RXIQK" : "Unknown id", - dpk_cmd); - } diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-119-wifi-rtw89-use-flexible-array-member-in-rtw89_btc_bt.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-119-wifi-rtw89-use-flexible-array-member-in-rtw89_btc_bt.patch deleted file mode 100644 index 69af504dd..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-119-wifi-rtw89-use-flexible-array-member-in-rtw89_btc_bt.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 47e612268ea02f7d2bcbaa47528698b5be61a8cf Mon Sep 17 00:00:00 2001 -From: Arnd Bergmann -Date: Tue, 23 May 2023 13:32:35 +0200 -Subject: [PATCH 119/136] wifi: rtw89: use flexible array member in - rtw89_btc_btf_tlv - -struct rtw89_btc_btf_tlv contains a one-byte member that is intended as a -flexible array: - -In function 'fortify_memcpy_chk', - inlined from '_append_tdma' at drivers/net/wireless/realtek/rtw89/coex.c:1579:3: -include/linux/fortify-string.h:583:25: error: call to '__write_overflow_field' declared with attribute warning: detected write beyond size of field (1st parameter); maybe use struct_group()? [-Werror=attribute-warning] - 583 | __write_overflow_field(p_size_field, size); - | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ - -Make this actually use a flexible array to let the compiler understand. - -Signed-off-by: Arnd Bergmann -Reviewed-by: Ping-Ke Shih -Reviewed-by: Gustavo A. R. Silva -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230523113241.2772811-1-arnd@kernel.org ---- - drivers/net/wireless/realtek/rtw89/coex.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/coex.c -+++ b/drivers/net/wireless/realtek/rtw89/coex.c -@@ -206,7 +206,7 @@ static const struct rtw89_btc_ver rtw89_ - struct rtw89_btc_btf_tlv { - u8 type; - u8 len; -- u8 val[1]; -+ u8 val[]; - } __packed; - - enum btc_btf_set_report_en { diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-120-wifi-rtw89-correct-PS-calculation-for-SUPPORTS_DYNAM.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-120-wifi-rtw89-correct-PS-calculation-for-SUPPORTS_DYNAM.patch deleted file mode 100644 index 25100db8f..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-120-wifi-rtw89-correct-PS-calculation-for-SUPPORTS_DYNAM.patch +++ /dev/null @@ -1,117 +0,0 @@ -From 26a125f550a3bf86ac91d38752f4d446426dfe1c Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sat, 27 May 2023 16:29:38 +0800 -Subject: [PATCH 120/136] wifi: rtw89: correct PS calculation for - SUPPORTS_DYNAMIC_PS - -This driver relies on IEEE80211_CONF_PS of hw->conf.flags to turn off PS or -turn on dynamic PS controlled by driver and firmware. Though this would be -incorrect, it did work before because the flag is always recalculated until -the commit 28977e790b5d ("wifi: mac80211: skip powersave recalc if driver SUPPORTS_DYNAMIC_PS") -is introduced by kernel 5.20 to skip to recalculate IEEE80211_CONF_PS -of hw->conf.flags if driver sets SUPPORTS_DYNAMIC_PS. - -Correct this by doing recalculation while BSS_CHANGED_PS is changed and -interface is added or removed. For now, it is allowed to enter PS only if -single one station vif is working, and it could possible to have PS per -vif after firmware can support it. Without this fix, driver doesn't -enter PS anymore that causes higher power consumption. - -Fixes: e3ec7017f6a2 ("rtw89: add Realtek 802.11ax driver") -Cc: stable@vger.kernel.org # 6.1+ -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230527082939.11206-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/mac80211.c | 15 +++++------ - drivers/net/wireless/realtek/rtw89/ps.c | 26 +++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/ps.h | 1 + - 3 files changed, 33 insertions(+), 9 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -89,15 +89,6 @@ static int rtw89_ops_config(struct ieee8 - !(hw->conf.flags & IEEE80211_CONF_IDLE)) - rtw89_leave_ips(rtwdev); - -- if (changed & IEEE80211_CONF_CHANGE_PS) { -- if (hw->conf.flags & IEEE80211_CONF_PS) { -- rtwdev->lps_enabled = true; -- } else { -- rtw89_leave_lps(rtwdev); -- rtwdev->lps_enabled = false; -- } -- } -- - if (changed & IEEE80211_CONF_CHANGE_CHANNEL) { - rtw89_config_entity_chandef(rtwdev, RTW89_SUB_ENTITY_0, - &hw->conf.chandef); -@@ -168,6 +159,8 @@ static int rtw89_ops_add_interface(struc - rtw89_core_txq_init(rtwdev, vif->txq); - - rtw89_btc_ntfy_role_info(rtwdev, rtwvif, NULL, BTC_ROLE_START); -+ -+ rtw89_recalc_lps(rtwdev); - out: - mutex_unlock(&rtwdev->mutex); - -@@ -192,6 +185,7 @@ static void rtw89_ops_remove_interface(s - rtw89_mac_remove_vif(rtwdev, rtwvif); - rtw89_core_release_bit_map(rtwdev->hw_port, rtwvif->port); - list_del_init(&rtwvif->list); -+ rtw89_recalc_lps(rtwdev); - rtw89_enter_ips_by_hwflags(rtwdev); - - mutex_unlock(&rtwdev->mutex); -@@ -451,6 +445,9 @@ static void rtw89_ops_bss_info_changed(s - if (changed & BSS_CHANGED_CQM) - rtw89_fw_h2c_set_bcn_fltr_cfg(rtwdev, vif, true); - -+ if (changed & BSS_CHANGED_PS) -+ rtw89_recalc_lps(rtwdev); -+ - mutex_unlock(&rtwdev->mutex); - } - ---- a/drivers/net/wireless/realtek/rtw89/ps.c -+++ b/drivers/net/wireless/realtek/rtw89/ps.c -@@ -252,3 +252,29 @@ void rtw89_process_p2p_ps(struct rtw89_d - rtw89_p2p_disable_all_noa(rtwdev, vif); - rtw89_p2p_update_noa(rtwdev, vif); - } -+ -+void rtw89_recalc_lps(struct rtw89_dev *rtwdev) -+{ -+ struct ieee80211_vif *vif, *found_vif = NULL; -+ struct rtw89_vif *rtwvif; -+ int count = 0; -+ -+ rtw89_for_each_rtwvif(rtwdev, rtwvif) { -+ vif = rtwvif_to_vif(rtwvif); -+ -+ if (vif->type != NL80211_IFTYPE_STATION) { -+ count = 0; -+ break; -+ } -+ -+ count++; -+ found_vif = vif; -+ } -+ -+ if (count == 1 && found_vif->cfg.ps) { -+ rtwdev->lps_enabled = true; -+ } else { -+ rtw89_leave_lps(rtwdev); -+ rtwdev->lps_enabled = false; -+ } -+} ---- a/drivers/net/wireless/realtek/rtw89/ps.h -+++ b/drivers/net/wireless/realtek/rtw89/ps.h -@@ -15,6 +15,7 @@ void rtw89_enter_ips(struct rtw89_dev *r - void rtw89_leave_ips(struct rtw89_dev *rtwdev); - void rtw89_set_coex_ctrl_lps(struct rtw89_dev *rtwdev, bool btc_ctrl); - void rtw89_process_p2p_ps(struct rtw89_dev *rtwdev, struct ieee80211_vif *vif); -+void rtw89_recalc_lps(struct rtw89_dev *rtwdev); - - static inline void rtw89_leave_ips_by_hwflags(struct rtw89_dev *rtwdev) - { diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-121-wifi-rtw89-remove-redundant-check-of-entering-LPS.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-121-wifi-rtw89-remove-redundant-check-of-entering-LPS.patch deleted file mode 100644 index 42d4582a5..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-121-wifi-rtw89-remove-redundant-check-of-entering-LPS.patch +++ /dev/null @@ -1,28 +0,0 @@ -From b408f33b35a4de606bfbd0de33b8f971bc5488ba Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Sat, 27 May 2023 16:29:39 +0800 -Subject: [PATCH 121/136] wifi: rtw89: remove redundant check of entering LPS - -Originally, add this check rule to prevent entering LPS if more than one -vif (in station mode) connect to AP. Since we have checked this by previous -commit, remove this redundant check. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230527082939.11206-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 3 --- - 1 file changed, 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -2619,9 +2619,6 @@ static void rtw89_vif_enter_lps(struct r - rtwvif->tdls_peer) - return; - -- if (rtwdev->total_sta_assoc > 1) -- return; -- - if (rtwvif->offchan) - return; - diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-122-wifi-rtw89-8851b-enable-hw_scan-support.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-122-wifi-rtw89-8851b-enable-hw_scan-support.patch deleted file mode 100644 index 6a3df97ca..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-122-wifi-rtw89-8851b-enable-hw_scan-support.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 9c52e8bf07c7097e09503fcad7cb156deffef619 Mon Sep 17 00:00:00 2001 -From: Po-Hao Huang -Date: Wed, 31 May 2023 14:07:10 +0800 -Subject: [PATCH 122/136] wifi: rtw89: 8851b: enable hw_scan support - -This enables hw_scan for 8851b after firmware version 0.29.37.1. -Extend the channel info struct with padding zeros so newer firmware -can work properly, this change is backward compatible with older -firmware. - -Signed-off-by: Po-Hao Huang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230531060713.57203-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 1 + - drivers/net/wireless/realtek/rtw89/fw.h | 2 +- - 2 files changed, 2 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -257,6 +257,7 @@ struct __fw_feat_cfg { - - static const struct __fw_feat_cfg fw_feat_tbl[] = { - __CFG_FW_FEAT(RTL8851B, ge, 0, 29, 37, 1, TX_WAKE), -+ __CFG_FW_FEAT(RTL8851B, ge, 0, 29, 37, 1, SCAN_OFFLOAD), - __CFG_FW_FEAT(RTL8852A, le, 0, 13, 29, 0, OLD_HT_RA_FORMAT), - __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 35, 0, SCAN_OFFLOAD), - __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 35, 0, TX_WAKE), ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -243,7 +243,7 @@ struct rtw89_fw_macid_pause_grp { - #define RTW89_SCANOFLD_MAX_IE_LEN 512 - #define RTW89_SCANOFLD_PKT_NONE 0xFF - #define RTW89_SCANOFLD_DEBUG_MASK 0x1F --#define RTW89_MAC_CHINFO_SIZE 24 -+#define RTW89_MAC_CHINFO_SIZE 28 - #define RTW89_SCAN_LIST_GUARD 4 - #define RTW89_SCAN_LIST_LIMIT \ - ((RTW89_H2C_MAX_SIZE / RTW89_MAC_CHINFO_SIZE) - RTW89_SCAN_LIST_GUARD) diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-123-wifi-rtw89-debug-txpwr-table-access-only-valid-page-.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-123-wifi-rtw89-debug-txpwr-table-access-only-valid-page-.patch deleted file mode 100644 index 425c9865b..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-123-wifi-rtw89-debug-txpwr-table-access-only-valid-page-.patch +++ /dev/null @@ -1,103 +0,0 @@ -From b25e755e5e418aa7b537b8b2a2506c34c53df2d5 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Wed, 31 May 2023 14:07:11 +0800 -Subject: [PATCH 123/136] wifi: rtw89: debug: txpwr table access only valid - page according to chip - -We now support RTL8851B which has only single RF path. For chip with -single RF path, TX power page is valid only in single path section. -So, we refine debugfs txpwr table to access TX power page according -to RF path number of runtime chip. It can prevent us from reading -beyond valid sections. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230531060713.57203-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/debug.c | 13 ++++++++++++- - drivers/net/wireless/realtek/rtw89/reg.h | 6 ++++++ - 2 files changed, 18 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/debug.c -+++ b/drivers/net/wireless/realtek/rtw89/debug.c -@@ -376,6 +376,7 @@ struct txpwr_map { - u8 size; - u32 addr_from; - u32 addr_to; -+ u32 addr_to_1ss; - }; - - #define __GEN_TXPWR_ENT2(_t, _e0, _e1) \ -@@ -413,6 +414,7 @@ static const struct txpwr_map __txpwr_ma - .size = ARRAY_SIZE(__txpwr_ent_byr), - .addr_from = R_AX_PWR_BY_RATE, - .addr_to = R_AX_PWR_BY_RATE_MAX, -+ .addr_to_1ss = R_AX_PWR_BY_RATE_1SS_MAX, - }; - - static const struct txpwr_ent __txpwr_ent_lmt[] = { -@@ -468,6 +470,7 @@ static const struct txpwr_map __txpwr_ma - .size = ARRAY_SIZE(__txpwr_ent_lmt), - .addr_from = R_AX_PWR_LMT, - .addr_to = R_AX_PWR_LMT_MAX, -+ .addr_to_1ss = R_AX_PWR_LMT_1SS_MAX, - }; - - static const struct txpwr_ent __txpwr_ent_lmt_ru[] = { -@@ -495,6 +498,7 @@ static const struct txpwr_map __txpwr_ma - .size = ARRAY_SIZE(__txpwr_ent_lmt_ru), - .addr_from = R_AX_PWR_RU_LMT, - .addr_to = R_AX_PWR_RU_LMT_MAX, -+ .addr_to_1ss = R_AX_PWR_RU_LMT_1SS_MAX, - }; - - static u8 __print_txpwr_ent(struct seq_file *m, const struct txpwr_ent *ent, -@@ -527,6 +531,8 @@ static int __print_txpwr_map(struct seq_ - const struct txpwr_map *map) - { - u8 fct = rtwdev->chip->txpwr_factor_mac; -+ u8 path_num = rtwdev->chip->rf_path_num; -+ u32 max_valid_addr; - u32 val, addr; - s8 *buf, tmp; - u8 cur, i; -@@ -536,7 +542,12 @@ static int __print_txpwr_map(struct seq_ - if (!buf) - return -ENOMEM; - -- for (addr = map->addr_from; addr <= map->addr_to; addr += 4) { -+ if (path_num == 1) -+ max_valid_addr = map->addr_to_1ss; -+ else -+ max_valid_addr = map->addr_to; -+ -+ for (addr = map->addr_from; addr <= max_valid_addr; addr += 4) { - ret = rtw89_mac_txpwr_read32(rtwdev, RTW89_PHY_0, addr, &val); - if (ret) - val = MASKDWORD; ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3342,16 +3342,22 @@ - #define B_AX_PWR_UL_TB_2T_MASK GENMASK(4, 0) - #define B_AX_PWR_UL_TB_2T_V1_MASK GENMASK(7, 0) - #define R_AX_PWR_BY_RATE_TABLE0 0xD2C0 -+#define R_AX_PWR_BY_RATE_TABLE6 0xD2D8 - #define R_AX_PWR_BY_RATE_TABLE10 0xD2E8 - #define R_AX_PWR_BY_RATE R_AX_PWR_BY_RATE_TABLE0 -+#define R_AX_PWR_BY_RATE_1SS_MAX R_AX_PWR_BY_RATE_TABLE6 - #define R_AX_PWR_BY_RATE_MAX R_AX_PWR_BY_RATE_TABLE10 - #define R_AX_PWR_LMT_TABLE0 0xD2EC -+#define R_AX_PWR_LMT_TABLE9 0xD310 - #define R_AX_PWR_LMT_TABLE19 0xD338 - #define R_AX_PWR_LMT R_AX_PWR_LMT_TABLE0 -+#define R_AX_PWR_LMT_1SS_MAX R_AX_PWR_LMT_TABLE9 - #define R_AX_PWR_LMT_MAX R_AX_PWR_LMT_TABLE19 - #define R_AX_PWR_RU_LMT_TABLE0 0xD33C -+#define R_AX_PWR_RU_LMT_TABLE5 0xD350 - #define R_AX_PWR_RU_LMT_TABLE11 0xD368 - #define R_AX_PWR_RU_LMT R_AX_PWR_RU_LMT_TABLE0 -+#define R_AX_PWR_RU_LMT_1SS_MAX R_AX_PWR_RU_LMT_TABLE5 - #define R_AX_PWR_RU_LMT_MAX R_AX_PWR_RU_LMT_TABLE11 - #define R_AX_PWR_MACID_LMT_TABLE0 0xD36C - #define R_AX_PWR_MACID_LMT_TABLE127 0xD568 diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-124-wifi-rtw89-set-TX-power-without-precondition-during-.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-124-wifi-rtw89-set-TX-power-without-precondition-during-.patch deleted file mode 100644 index a35c498cb..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-124-wifi-rtw89-set-TX-power-without-precondition-during-.patch +++ /dev/null @@ -1,62 +0,0 @@ -From db67b03b04b4363251c0d8eecaf7a631449b6f3d Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Wed, 31 May 2023 14:07:12 +0800 -Subject: [PATCH 124/136] wifi: rtw89: set TX power without precondition during - setting channel - -The key condition to check in wrapper of setting TX power is whether entity -is active or not. Before entity is active, we restrict TX power from being -set by outside callers, e.g. SAR/regulatory. - -We mark entity as inactive when powering off MAC. Then, we will mark it as -active when we initialize HW channel stuffs after MAC power on. Although we -can get an active entity after leaving idle phase, TX power doesn't be set -well for default channel until stack set target channel for connection. It -causes that RF things cannot use better TX power during this interval. - -Below are some cases which may encounter this or a similar situation. -* hw scan process before connection - As described above. -* right after restart hardware process (SER L2) - HW stuffs of target channel is initialized after mac80211 restart - hardware, but we unexpectedly need to wait one more command to set - channel again or to set TX power. - -To fix it and improve RF behavior in that interval, during setting channel, -we don't need to check entity state before setting TX power, which actually -is used to restrict outside callers. It means we call chip ops directly to -replace the wrapper call. Then, TX power can be initialized as long as we -initialize/setup HW stuffs on one channel. - -Besides, all chips should configure ops of setting TX power, so we remove -trivial check on pointer. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230531060713.57203-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 5 ++--- - 1 file changed, 2 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -336,8 +336,7 @@ void rtw89_core_set_chip_txpwr(struct rt - sub_entity_idx = RTW89_SUB_ENTITY_0; - phy_idx = RTW89_PHY_0; - chan = rtw89_chan_get(rtwdev, sub_entity_idx); -- if (chip->ops->set_txpwr) -- chip->ops->set_txpwr(rtwdev, chan, phy_idx); -+ chip->ops->set_txpwr(rtwdev, chan, phy_idx); - } - - void rtw89_set_channel(struct rtw89_dev *rtwdev) -@@ -373,7 +372,7 @@ void rtw89_set_channel(struct rtw89_dev - - chip->ops->set_channel(rtwdev, &chan, mac_idx, phy_idx); - -- rtw89_core_set_chip_txpwr(rtwdev); -+ chip->ops->set_txpwr(rtwdev, &chan, phy_idx); - - rtw89_chip_set_channel_done(rtwdev, &bak, &chan, mac_idx, phy_idx); - diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-125-wifi-rtw89-8851b-configure-CRASH_TRIGGER-feature-for.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-125-wifi-rtw89-8851b-configure-CRASH_TRIGGER-feature-for.patch deleted file mode 100644 index 25d5b090e..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-125-wifi-rtw89-8851b-configure-CRASH_TRIGGER-feature-for.patch +++ /dev/null @@ -1,29 +0,0 @@ -From 57369e2aa2eb9812368c6cf3c4378d1fbe9e8c8a Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Wed, 31 May 2023 14:07:13 +0800 -Subject: [PATCH 125/136] wifi: rtw89: 8851b: configure CRASH_TRIGGER feature - for 8851B - -RTL8851B firmware supports CRASH_TRIGGER feature from v0.29.41.0. -After this is configured, debugfs fw_crash can support type 1 on -RTL8851B to trigger firmware crash and verify L2 recovery through -simulation. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230531060713.57203-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/fw.c | 1 + - 1 file changed, 1 insertion(+) - ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -258,6 +258,7 @@ struct __fw_feat_cfg { - static const struct __fw_feat_cfg fw_feat_tbl[] = { - __CFG_FW_FEAT(RTL8851B, ge, 0, 29, 37, 1, TX_WAKE), - __CFG_FW_FEAT(RTL8851B, ge, 0, 29, 37, 1, SCAN_OFFLOAD), -+ __CFG_FW_FEAT(RTL8851B, ge, 0, 29, 41, 0, CRASH_TRIGGER), - __CFG_FW_FEAT(RTL8852A, le, 0, 13, 29, 0, OLD_HT_RA_FORMAT), - __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 35, 0, SCAN_OFFLOAD), - __CFG_FW_FEAT(RTL8852A, ge, 0, 13, 35, 0, TX_WAKE), diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-126-wifi-rtw89-refine-clearing-supported-bands-to-check-.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-126-wifi-rtw89-refine-clearing-supported-bands-to-check-.patch deleted file mode 100644 index c53af8697..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-126-wifi-rtw89-refine-clearing-supported-bands-to-check-.patch +++ /dev/null @@ -1,36 +0,0 @@ -From b7d170d5a670de8d30d2db94179099f52f8df485 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Fri, 2 Jun 2023 23:05:49 +0800 -Subject: [PATCH 126/136] wifi: rtw89: refine clearing supported bands to check - 2/5 GHz first - -We refine to check if supported bands of NL80211_BAND_2GHZ and -NL80211_BAND_5GHZ exist before freeing their iftype_data. For -now, it does not really encounter problems because all current -chips support both 2 GHz and 5 GHz. But, driver actually allows -chips to declare whether 2/5 GHz are supported or not. In case -some future chips really don't support them, we refine this code. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230602150556.36777-2-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 6 ++++-- - 1 file changed, 4 insertions(+), 2 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -3386,8 +3386,10 @@ static void rtw89_core_clr_supported_ban - { - struct ieee80211_hw *hw = rtwdev->hw; - -- kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]->iftype_data); -- kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]->iftype_data); -+ if (hw->wiphy->bands[NL80211_BAND_2GHZ]) -+ kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]->iftype_data); -+ if (hw->wiphy->bands[NL80211_BAND_5GHZ]) -+ kfree(hw->wiphy->bands[NL80211_BAND_5GHZ]->iftype_data); - if (hw->wiphy->bands[NL80211_BAND_6GHZ]) - kfree(hw->wiphy->bands[NL80211_BAND_6GHZ]->iftype_data); - kfree(hw->wiphy->bands[NL80211_BAND_2GHZ]); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-127-wifi-rtw89-regd-judge-6-GHz-according-to-chip-and-BI.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-127-wifi-rtw89-regd-judge-6-GHz-according-to-chip-and-BI.patch deleted file mode 100644 index 5138df831..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-127-wifi-rtw89-regd-judge-6-GHz-according-to-chip-and-BI.patch +++ /dev/null @@ -1,84 +0,0 @@ -From ffc23511531341936dbddd24ba0e3a08bcdda01c Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Fri, 2 Jun 2023 23:05:50 +0800 -Subject: [PATCH 127/136] wifi: rtw89: regd: judge 6 GHz according to chip and - BIOS - -We allow platform to disable 6 GHz on chips, which supports 6 GHz, through -BIOS. Driver will evaluate Realtek acpi DSM with RTW89_ACPI_DSM_FUNC_6G_DIS -(function 3) to get whether 6 GHz should be disabled. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230602150556.36777-3-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/regd.c | 50 +++++++++++++++++++++++ - 1 file changed, 50 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/regd.c -+++ b/drivers/net/wireless/realtek/rtw89/regd.c -@@ -330,6 +330,55 @@ bottom: - sband->n_channels -= 3; - } - -+static void rtw89_regd_setup_6ghz(struct rtw89_dev *rtwdev, struct wiphy *wiphy) -+{ -+ const struct rtw89_chip_info *chip = rtwdev->chip; -+ bool chip_support_6ghz = chip->support_bands & BIT(NL80211_BAND_6GHZ); -+ bool regd_allow_6ghz = chip_support_6ghz; -+ struct ieee80211_supported_band *sband; -+ int ret; -+ u8 val; -+ -+ if (!chip_support_6ghz) -+ goto bottom; -+ -+ ret = rtw89_acpi_evaluate_dsm(rtwdev, RTW89_ACPI_DSM_FUNC_6G_DIS, &val); -+ if (ret) { -+ rtw89_debug(rtwdev, RTW89_DBG_REGD, -+ "acpi: cannot eval 6ghz: %d\n", ret); -+ goto bottom; -+ } -+ -+ rtw89_debug(rtwdev, RTW89_DBG_REGD, -+ "acpi: eval if disallow 6ghz: %d\n", val); -+ -+ switch (val) { -+ case 0: -+ regd_allow_6ghz = true; -+ break; -+ case 1: -+ regd_allow_6ghz = false; -+ break; -+ default: -+ break; -+ } -+ -+bottom: -+ rtw89_debug(rtwdev, RTW89_DBG_REGD, "regd: allow 6ghz: %d\n", -+ regd_allow_6ghz); -+ -+ if (regd_allow_6ghz) -+ return; -+ -+ sband = wiphy->bands[NL80211_BAND_6GHZ]; -+ if (!sband) -+ return; -+ -+ wiphy->bands[NL80211_BAND_6GHZ] = NULL; -+ kfree(sband->iftype_data); -+ kfree(sband); -+} -+ - int rtw89_regd_setup(struct rtw89_dev *rtwdev) - { - struct wiphy *wiphy = rtwdev->hw->wiphy; -@@ -338,6 +387,7 @@ int rtw89_regd_setup(struct rtw89_dev *r - return -EINVAL; - - rtw89_regd_setup_unii4(rtwdev, wiphy); -+ rtw89_regd_setup_6ghz(rtwdev, wiphy); - - wiphy->reg_notifier = rtw89_regd_notifier; - return 0; diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-128-wifi-rtw89-regd-update-regulatory-map-to-R64-R40.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-128-wifi-rtw89-regd-update-regulatory-map-to-R64-R40.patch deleted file mode 100644 index e5bcfe5f1..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-128-wifi-rtw89-regd-update-regulatory-map-to-R64-R40.patch +++ /dev/null @@ -1,279 +0,0 @@ -From 9468046ff54eb5b72616c8126105bbf2df711253 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Fri, 2 Jun 2023 23:05:51 +0800 -Subject: [PATCH 128/136] wifi: rtw89: regd: update regulatory map to R64-R40 - -Update notes: -According to Realtek Regulatory R40 and Realtek Channel Plan R64, -configure rtw89_regulatory mapping of 6 GHz for more countries and -adjust rtw89_regulatory mapping of 2/5 GHz for a few countries. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230602150556.36777-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/regd.c | 122 +++++++++++----------- - 1 file changed, 61 insertions(+), 61 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/regd.c -+++ b/drivers/net/wireless/realtek/rtw89/regd.c -@@ -16,20 +16,20 @@ static const struct rtw89_regulatory rtw - - static const struct rtw89_regulatory rtw89_regd_map[] = { - COUNTRY_REGD("AR", RTW89_MEXICO, RTW89_MEXICO, RTW89_NA), -- COUNTRY_REGD("BO", RTW89_FCC, RTW89_FCC, RTW89_NA), -+ COUNTRY_REGD("BO", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("BR", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("CL", RTW89_CHILE, RTW89_CHILE, RTW89_CHILE), -- COUNTRY_REGD("CO", RTW89_FCC, RTW89_FCC, RTW89_NA), -+ COUNTRY_REGD("CO", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("CR", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("EC", RTW89_FCC, RTW89_FCC, RTW89_NA), -- COUNTRY_REGD("SV", RTW89_FCC, RTW89_FCC, RTW89_NA), -- COUNTRY_REGD("GT", RTW89_FCC, RTW89_FCC, RTW89_NA), -+ COUNTRY_REGD("SV", RTW89_FCC, RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("GT", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("HN", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("MX", RTW89_MEXICO, RTW89_MEXICO, RTW89_NA), - COUNTRY_REGD("NI", RTW89_FCC, RTW89_FCC, RTW89_NA), - COUNTRY_REGD("PA", RTW89_FCC, RTW89_FCC, RTW89_NA), - COUNTRY_REGD("PY", RTW89_FCC, RTW89_FCC, RTW89_NA), -- COUNTRY_REGD("PE", RTW89_FCC, RTW89_FCC, RTW89_NA), -+ COUNTRY_REGD("PE", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("US", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("UY", RTW89_FCC, RTW89_FCC, RTW89_NA), - COUNTRY_REGD("VE", RTW89_FCC, RTW89_FCC, RTW89_NA), -@@ -66,37 +66,37 @@ static const struct rtw89_regulatory rtw - COUNTRY_REGD("CH", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("GB", RTW89_UK, RTW89_UK, RTW89_UK), - COUNTRY_REGD("AL", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("AZ", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("BH", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("AZ", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), -+ COUNTRY_REGD("BH", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("BA", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("BG", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("HR", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("BG", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), -+ COUNTRY_REGD("HR", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("EG", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("GH", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("GH", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("IQ", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("IL", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("JO", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("IL", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), -+ COUNTRY_REGD("JO", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("KZ", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("KE", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("KW", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("KG", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("KE", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), -+ COUNTRY_REGD("KW", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), -+ COUNTRY_REGD("KG", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("LB", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("LS", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("MK", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("MA", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("MA", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("MZ", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("NA", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("NG", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("OM", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("QA", RTW89_QATAR, RTW89_QATAR, RTW89_QATAR), -- COUNTRY_REGD("RO", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("RO", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("RU", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("SA", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("SA", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("SN", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("RS", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("RS", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("ME", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("ZA", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("TR", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("TR", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("UA", RTW89_UKRAINE, RTW89_UKRAINE, RTW89_UKRAINE), - COUNTRY_REGD("AE", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("YE", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -@@ -104,11 +104,11 @@ static const struct rtw89_regulatory rtw - COUNTRY_REGD("BD", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("KH", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("CN", RTW89_CN, RTW89_CN, RTW89_CN), -- COUNTRY_REGD("HK", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("HK", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("IN", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("ID", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("KR", RTW89_KCC, RTW89_KCC, RTW89_KCC), -- COUNTRY_REGD("MY", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("MY", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("PK", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("PH", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("SG", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -@@ -116,55 +116,55 @@ static const struct rtw89_regulatory rtw - COUNTRY_REGD("TW", RTW89_FCC, RTW89_FCC, RTW89_NA), - COUNTRY_REGD("TH", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("VN", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("AU", RTW89_ACMA, RTW89_ACMA, RTW89_NA), -- COUNTRY_REGD("NZ", RTW89_ACMA, RTW89_ACMA, RTW89_NA), -- COUNTRY_REGD("PG", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("AU", RTW89_ACMA, RTW89_ACMA, RTW89_ACMA), -+ COUNTRY_REGD("NZ", RTW89_ACMA, RTW89_ACMA, RTW89_ACMA), -+ COUNTRY_REGD("PG", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("CA", RTW89_IC, RTW89_IC, RTW89_IC), -- COUNTRY_REGD("JP", RTW89_MKK, RTW89_MKK, RTW89_NA), -- COUNTRY_REGD("JM", RTW89_FCC, RTW89_FCC, RTW89_NA), -- COUNTRY_REGD("AN", RTW89_FCC, RTW89_FCC, RTW89_NA), -+ COUNTRY_REGD("JP", RTW89_MKK, RTW89_MKK, RTW89_MKK), -+ COUNTRY_REGD("JM", RTW89_FCC, RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("AN", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("TT", RTW89_FCC, RTW89_FCC, RTW89_NA), - COUNTRY_REGD("TN", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("AF", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("DZ", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("DZ", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("AS", RTW89_FCC, RTW89_FCC, RTW89_NA), - COUNTRY_REGD("AD", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("AO", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("AI", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("AI", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("AQ", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("AG", RTW89_FCC, RTW89_FCC, RTW89_NA), -- COUNTRY_REGD("AM", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("AW", RTW89_FCC, RTW89_FCC, RTW89_NA), -- COUNTRY_REGD("BS", RTW89_FCC, RTW89_FCC, RTW89_NA), -- COUNTRY_REGD("BB", RTW89_FCC, RTW89_FCC, RTW89_NA), -+ COUNTRY_REGD("AG", RTW89_FCC, RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("AM", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), -+ COUNTRY_REGD("AW", RTW89_FCC, RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("BS", RTW89_FCC, RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("BB", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("BY", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("BZ", RTW89_FCC, RTW89_FCC, RTW89_NA), - COUNTRY_REGD("BJ", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("BM", RTW89_FCC, RTW89_FCC, RTW89_NA), -+ COUNTRY_REGD("BM", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("BT", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("BW", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("BW", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("BV", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("IO", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("VG", RTW89_FCC, RTW89_FCC, RTW89_NA), -+ COUNTRY_REGD("VG", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("BN", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("BF", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("MM", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("BI", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("BI", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("CM", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("CV", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("KY", RTW89_FCC, RTW89_FCC, RTW89_NA), -+ COUNTRY_REGD("KY", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("CF", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("TD", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("TD", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("CX", RTW89_ACMA, RTW89_ACMA, RTW89_NA), -- COUNTRY_REGD("CC", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("KM", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("CC", RTW89_ACMA, RTW89_ACMA, RTW89_NA), -+ COUNTRY_REGD("KM", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("CG", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("CD", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("CK", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("CI", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("DJ", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("DM", RTW89_FCC, RTW89_FCC, RTW89_NA), -- COUNTRY_REGD("GQ", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("DJ", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), -+ COUNTRY_REGD("DM", RTW89_FCC, RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("GQ", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("ER", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("ET", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("FK", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -@@ -174,17 +174,17 @@ static const struct rtw89_regulatory rtw - COUNTRY_REGD("PF", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("TF", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("GA", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("GM", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("GM", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("GE", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("GI", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("GL", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("GD", RTW89_FCC, RTW89_FCC, RTW89_NA), -+ COUNTRY_REGD("GD", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("GP", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("GU", RTW89_FCC, RTW89_FCC, RTW89_NA), - COUNTRY_REGD("GG", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("GN", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("GN", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("GW", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("GY", RTW89_NCC, RTW89_NCC, RTW89_NA), -+ COUNTRY_REGD("GY", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("HT", RTW89_FCC, RTW89_FCC, RTW89_NA), - COUNTRY_REGD("HM", RTW89_ACMA, RTW89_ACMA, RTW89_NA), - COUNTRY_REGD("VA", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -@@ -195,17 +195,17 @@ static const struct rtw89_regulatory rtw - COUNTRY_REGD("LR", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("LY", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("MO", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("MG", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("MG", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("MW", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("MV", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("ML", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("MH", RTW89_FCC, RTW89_FCC, RTW89_NA), - COUNTRY_REGD("MQ", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("MR", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("MU", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("MU", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("YT", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("FM", RTW89_FCC, RTW89_FCC, RTW89_NA), -- COUNTRY_REGD("MD", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("MD", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("MN", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("MS", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("NR", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -@@ -219,26 +219,26 @@ static const struct rtw89_regulatory rtw - COUNTRY_REGD("RE", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("RW", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("SH", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("KN", RTW89_FCC, RTW89_FCC, RTW89_NA), -- COUNTRY_REGD("LC", RTW89_FCC, RTW89_FCC, RTW89_NA), -+ COUNTRY_REGD("KN", RTW89_FCC, RTW89_FCC, RTW89_FCC), -+ COUNTRY_REGD("LC", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("MF", RTW89_FCC, RTW89_FCC, RTW89_NA), - COUNTRY_REGD("SX", RTW89_FCC, RTW89_FCC, RTW89_NA), - COUNTRY_REGD("PM", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("VC", RTW89_FCC, RTW89_FCC, RTW89_NA), - COUNTRY_REGD("WS", RTW89_FCC, RTW89_FCC, RTW89_NA), - COUNTRY_REGD("SM", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("ST", RTW89_FCC, RTW89_FCC, RTW89_NA), -+ COUNTRY_REGD("ST", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("SC", RTW89_FCC, RTW89_FCC, RTW89_NA), -- COUNTRY_REGD("SL", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("SL", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("SB", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("SO", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("GS", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("SR", RTW89_FCC, RTW89_FCC, RTW89_NA), -+ COUNTRY_REGD("SR", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("SJ", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("SZ", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("TJ", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("TJ", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("TZ", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -- COUNTRY_REGD("TG", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("TG", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("TK", RTW89_ACMA, RTW89_ACMA, RTW89_NA), - COUNTRY_REGD("TO", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("TM", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -@@ -246,7 +246,7 @@ static const struct rtw89_regulatory rtw - COUNTRY_REGD("TV", RTW89_ETSI, RTW89_NA, RTW89_NA), - COUNTRY_REGD("UG", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("VI", RTW89_FCC, RTW89_FCC, RTW89_NA), -- COUNTRY_REGD("UZ", RTW89_ETSI, RTW89_ETSI, RTW89_NA), -+ COUNTRY_REGD("UZ", RTW89_ETSI, RTW89_ETSI, RTW89_ETSI), - COUNTRY_REGD("VU", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("WF", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - COUNTRY_REGD("EH", RTW89_ETSI, RTW89_ETSI, RTW89_NA), diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-129-wifi-rtw89-process-regulatory-for-6-GHz-power-type.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-129-wifi-rtw89-process-regulatory-for-6-GHz-power-type.patch deleted file mode 100644 index 892be2c53..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-129-wifi-rtw89-process-regulatory-for-6-GHz-power-type.patch +++ /dev/null @@ -1,314 +0,0 @@ -From f6baa1d3d5703fe65b87b3149265a1c7f564f450 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Fri, 2 Jun 2023 23:05:52 +0800 -Subject: [PATCH 129/136] wifi: rtw89: process regulatory for 6 GHz power type - -Configure the corresponding power type for 6 GHz regulatory if we can -determine one single target. Otherwise, we use the default one. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230602150556.36777-5-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.c | 7 +- - drivers/net/wireless/realtek/rtw89/core.h | 25 ++++- - drivers/net/wireless/realtek/rtw89/mac80211.c | 9 ++ - drivers/net/wireless/realtek/rtw89/regd.c | 91 ++++++++++++++++--- - 4 files changed, 116 insertions(+), 16 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.c -+++ b/drivers/net/wireless/realtek/rtw89/core.c -@@ -2869,6 +2869,8 @@ int rtw89_core_sta_add(struct rtw89_dev - if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) { - /* for station mode, assign the mac_id from itself */ - rtwsta->mac_id = rtwvif->mac_id; -+ /* must do rtw89_reg_6ghz_power_recalc() before rfk channel */ -+ rtw89_reg_6ghz_power_recalc(rtwdev, rtwvif, true); - rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, - BTC_ROLE_MSTS_STA_CONN_START); - rtw89_chip_rfk_channel(rtwdev); -@@ -3042,10 +3044,11 @@ int rtw89_core_sta_remove(struct rtw89_d - struct rtw89_sta *rtwsta = (struct rtw89_sta *)sta->drv_priv; - int ret; - -- if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) -+ if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) { -+ rtw89_reg_6ghz_power_recalc(rtwdev, rtwvif, false); - rtw89_btc_ntfy_role_info(rtwdev, rtwvif, rtwsta, - BTC_ROLE_MSTS_STA_DIS_CONN); -- else if (vif->type == NL80211_IFTYPE_AP || sta->tdls) { -+ } else if (vif->type == NL80211_IFTYPE_AP || sta->tdls) { - rtw89_core_release_bit_map(rtwdev->mac_id_map, rtwsta->mac_id); - - ret = rtw89_fw_h2c_role_maintain(rtwdev, rtwvif, rtwsta, ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -488,6 +488,15 @@ enum rtw89_regulation_type { - RTW89_REGD_NUM, - }; - -+enum rtw89_reg_6ghz_power { -+ RTW89_REG_6GHZ_POWER_VLP = 0, -+ RTW89_REG_6GHZ_POWER_LPI = 1, -+ RTW89_REG_6GHZ_POWER_STD = 2, -+ -+ NUM_OF_RTW89_REG_6GHZ_POWER, -+ RTW89_REG_6GHZ_POWER_DFLT = RTW89_REG_6GHZ_POWER_VLP, -+}; -+ - enum rtw89_fw_pkt_ofld_type { - RTW89_PKT_OFLD_TYPE_PROBE_RSP = 0, - RTW89_PKT_OFLD_TYPE_PS_POLL = 1, -@@ -2682,6 +2691,7 @@ struct rtw89_vif { - struct rtw89_dev *rtwdev; - struct rtw89_roc roc; - enum rtw89_sub_entity_idx sub_entity_idx; -+ enum rtw89_reg_6ghz_power reg_6ghz_power; - - u8 mac_id; - u8 port; -@@ -3807,11 +3817,16 @@ struct rtw89_power_trim_info { - u8 pa_bias_trim[RF_PATH_MAX]; - }; - --struct rtw89_regulatory { -+struct rtw89_regd { - char alpha2[3]; - u8 txpwr_regd[RTW89_BAND_MAX]; - }; - -+struct rtw89_regulatory_info { -+ const struct rtw89_regd *regd; -+ enum rtw89_reg_6ghz_power reg_6ghz_power; -+}; -+ - enum rtw89_ifs_clm_application { - RTW89_IFS_CLM_INIT = 0, - RTW89_IFS_CLM_BACKGROUND = 1, -@@ -4161,7 +4176,7 @@ struct rtw89_dev { - u8 total_sta_assoc; - bool scanning; - -- const struct rtw89_regulatory *regd; -+ struct rtw89_regulatory_info regulatory; - struct rtw89_sar_info sar; - - struct rtw89_btc btc; -@@ -4848,7 +4863,9 @@ static inline void rtw89_load_txpwr_tabl - - static inline u8 rtw89_regd_get(struct rtw89_dev *rtwdev, u8 band) - { -- return rtwdev->regd->txpwr_regd[band]; -+ const struct rtw89_regd *regd = rtwdev->regulatory.regd; -+ -+ return regd->txpwr_regd[band]; - } - - static inline void rtw89_ctrl_btg(struct rtw89_dev *rtwdev, bool btg) -@@ -5090,5 +5107,7 @@ void rtw89_core_scan_start(struct rtw89_ - const u8 *mac_addr, bool hw_scan); - void rtw89_core_scan_complete(struct rtw89_dev *rtwdev, - struct ieee80211_vif *vif, bool hw_scan); -+void rtw89_reg_6ghz_power_recalc(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, bool active); - - #endif ---- a/drivers/net/wireless/realtek/rtw89/mac80211.c -+++ b/drivers/net/wireless/realtek/rtw89/mac80211.c -@@ -146,6 +146,7 @@ static int rtw89_ops_add_interface(struc - rtwvif->phy_idx = RTW89_PHY_0; - rtwvif->sub_entity_idx = RTW89_SUB_ENTITY_0; - rtwvif->hit_rule = 0; -+ rtwvif->reg_6ghz_power = RTW89_REG_6GHZ_POWER_DFLT; - ether_addr_copy(rtwvif->mac_addr, vif->addr); - INIT_LIST_HEAD(&rtwvif->general_pkt_list); - -@@ -457,8 +458,16 @@ static int rtw89_ops_start_ap(struct iee - { - struct rtw89_dev *rtwdev = hw->priv; - struct rtw89_vif *rtwvif = (struct rtw89_vif *)vif->drv_priv; -+ const struct rtw89_chan *chan; - - mutex_lock(&rtwdev->mutex); -+ -+ chan = rtw89_chan_get(rtwdev, rtwvif->sub_entity_idx); -+ if (chan->band_type == RTW89_BAND_6G) { -+ mutex_unlock(&rtwdev->mutex); -+ return -EOPNOTSUPP; -+ } -+ - ether_addr_copy(rtwvif->bssid, vif->bss_conf.bssid); - rtw89_cam_bssid_changed(rtwdev, rtwvif); - rtw89_mac_port_update(rtwdev, rtwvif); ---- a/drivers/net/wireless/realtek/rtw89/regd.c -+++ b/drivers/net/wireless/realtek/rtw89/regd.c -@@ -5,16 +5,17 @@ - #include "acpi.h" - #include "debug.h" - #include "ps.h" -+#include "util.h" - - #define COUNTRY_REGD(_alpha2, _txpwr_regd...) \ - {.alpha2 = (_alpha2), \ - .txpwr_regd = {_txpwr_regd}, \ - } - --static const struct rtw89_regulatory rtw89_ww_regd = -+static const struct rtw89_regd rtw89_ww_regd = - COUNTRY_REGD("00", RTW89_WW, RTW89_WW); - --static const struct rtw89_regulatory rtw89_regd_map[] = { -+static const struct rtw89_regd rtw89_regd_map[] = { - COUNTRY_REGD("AR", RTW89_MEXICO, RTW89_MEXICO, RTW89_NA), - COUNTRY_REGD("BO", RTW89_FCC, RTW89_FCC, RTW89_FCC), - COUNTRY_REGD("BR", RTW89_FCC, RTW89_FCC, RTW89_FCC), -@@ -255,7 +256,7 @@ static const struct rtw89_regulatory rtw - COUNTRY_REGD("PS", RTW89_ETSI, RTW89_ETSI, RTW89_NA), - }; - --static const struct rtw89_regulatory *rtw89_regd_find_reg_by_name(char *alpha2) -+static const struct rtw89_regd *rtw89_regd_find_reg_by_name(char *alpha2) - { - u32 i; - -@@ -267,7 +268,7 @@ static const struct rtw89_regulatory *rt - return &rtw89_ww_regd; - } - --static bool rtw89_regd_is_ww(const struct rtw89_regulatory *regd) -+static bool rtw89_regd_is_ww(const struct rtw89_regd *regd) - { - return regd == &rtw89_ww_regd; - } -@@ -397,21 +398,25 @@ int rtw89_regd_init(struct rtw89_dev *rt - void (*reg_notifier)(struct wiphy *wiphy, - struct regulatory_request *request)) - { -- const struct rtw89_regulatory *chip_regd; -+ struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; -+ const struct rtw89_regd *chip_regd; - struct wiphy *wiphy = rtwdev->hw->wiphy; - int ret; - -+ regulatory->reg_6ghz_power = RTW89_REG_6GHZ_POWER_DFLT; -+ - if (!wiphy) - return -EINVAL; - - chip_regd = rtw89_regd_find_reg_by_name(rtwdev->efuse.country_code); - if (!rtw89_regd_is_ww(chip_regd)) { -- rtwdev->regd = chip_regd; -+ rtwdev->regulatory.regd = chip_regd; - /* Ignore country ie if there is a country domain programmed in chip */ - wiphy->regulatory_flags |= REGULATORY_COUNTRY_IE_IGNORE; - wiphy->regulatory_flags |= REGULATORY_STRICT_REG; - -- ret = regulatory_hint(rtwdev->hw->wiphy, rtwdev->regd->alpha2); -+ ret = regulatory_hint(rtwdev->hw->wiphy, -+ rtwdev->regulatory.regd->alpha2); - if (ret) - rtw89_warn(rtwdev, "failed to hint regulatory:%d\n", ret); - -@@ -419,7 +424,7 @@ int rtw89_regd_init(struct rtw89_dev *rt - return 0; - } - -- rtw89_debug_regd(rtwdev, rtwdev->regd, -+ rtw89_debug_regd(rtwdev, rtwdev->regulatory.regd, - "worldwide roaming chip, follow the setting of stack"); - return 0; - } -@@ -428,13 +433,13 @@ static void rtw89_regd_notifier_apply(st - struct wiphy *wiphy, - struct regulatory_request *request) - { -- rtwdev->regd = rtw89_regd_find_reg_by_name(request->alpha2); -+ rtwdev->regulatory.regd = rtw89_regd_find_reg_by_name(request->alpha2); - /* This notification might be set from the system of distros, - * and it does not expect the regulatory will be modified by - * connecting to an AP (i.e. country ie). - */ - if (request->initiator == NL80211_REGDOM_SET_BY_USER && -- !rtw89_regd_is_ww(rtwdev->regd)) -+ !rtw89_regd_is_ww(rtwdev->regulatory.regd)) - wiphy->regulatory_flags |= REGULATORY_COUNTRY_IE_IGNORE; - else - wiphy->regulatory_flags &= ~REGULATORY_COUNTRY_IE_IGNORE; -@@ -454,7 +459,8 @@ void rtw89_regd_notifier(struct wiphy *w - goto exit; - } - rtw89_regd_notifier_apply(rtwdev, wiphy, request); -- rtw89_debug_regd(rtwdev, rtwdev->regd, "get from initiator %d, alpha2", -+ rtw89_debug_regd(rtwdev, rtwdev->regulatory.regd, -+ "get from initiator %d, alpha2", - request->initiator); - - rtw89_core_set_chip_txpwr(rtwdev); -@@ -462,3 +468,66 @@ void rtw89_regd_notifier(struct wiphy *w - exit: - mutex_unlock(&rtwdev->mutex); - } -+ -+static void __rtw89_reg_6ghz_power_recalc(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; -+ enum rtw89_reg_6ghz_power sel; -+ const struct rtw89_chan *chan; -+ struct rtw89_vif *rtwvif; -+ int count = 0; -+ -+ rtw89_for_each_rtwvif(rtwdev, rtwvif) { -+ chan = rtw89_chan_get(rtwdev, rtwvif->sub_entity_idx); -+ if (chan->band_type != RTW89_BAND_6G) -+ continue; -+ -+ if (count != 0 && rtwvif->reg_6ghz_power == sel) -+ continue; -+ -+ sel = rtwvif->reg_6ghz_power; -+ count++; -+ } -+ -+ if (count != 1) -+ sel = RTW89_REG_6GHZ_POWER_DFLT; -+ -+ if (regulatory->reg_6ghz_power == sel) -+ return; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_REGD, -+ "recalc 6 GHz reg power type to %d\n", sel); -+ -+ regulatory->reg_6ghz_power = sel; -+ -+ rtw89_core_set_chip_txpwr(rtwdev); -+} -+ -+void rtw89_reg_6ghz_power_recalc(struct rtw89_dev *rtwdev, -+ struct rtw89_vif *rtwvif, bool active) -+{ -+ struct ieee80211_vif *vif = rtwvif_to_vif(rtwvif); -+ -+ lockdep_assert_held(&rtwdev->mutex); -+ -+ if (active) { -+ switch (vif->bss_conf.power_type) { -+ case IEEE80211_REG_VLP_AP: -+ rtwvif->reg_6ghz_power = RTW89_REG_6GHZ_POWER_VLP; -+ break; -+ case IEEE80211_REG_LPI_AP: -+ rtwvif->reg_6ghz_power = RTW89_REG_6GHZ_POWER_LPI; -+ break; -+ case IEEE80211_REG_SP_AP: -+ rtwvif->reg_6ghz_power = RTW89_REG_6GHZ_POWER_STD; -+ break; -+ default: -+ rtwvif->reg_6ghz_power = RTW89_REG_6GHZ_POWER_DFLT; -+ break; -+ } -+ } else { -+ rtwvif->reg_6ghz_power = RTW89_REG_6GHZ_POWER_DFLT; -+ } -+ -+ __rtw89_reg_6ghz_power_recalc(rtwdev); -+} diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-130-wifi-rtw89-8852c-update-TX-power-tables-to-R63-with-.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-130-wifi-rtw89-8852c-update-TX-power-tables-to-R63-with-.patch deleted file mode 100644 index 3312a0b48..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-130-wifi-rtw89-8852c-update-TX-power-tables-to-R63-with-.patch +++ /dev/null @@ -1,8045 +0,0 @@ -From b742394cfe80a51572ff74e0a57b4b21db1489b1 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Fri, 2 Jun 2023 23:05:53 +0800 -Subject: [PATCH 130/136] wifi: rtw89: 8852c: update TX power tables to R63 - with 6 GHz power type (1 of 3) - -Update TX power tables to RF version R63. - -TX power tables' changes: -* TX power byrate: - tweak a bit -* TX power limit, TX power limit RU, TX power shape: - configure values for MEXICO, UKRAINE, CHILE, QATAR - tweak a bit on other configured values -* 6 GHz TX power limit, 6 GHz TX power limit RU: - add an extra dimension for 6 GHz regulatory power type, i.e. - STD (standard power), LPI (low power indoor), VLP (very low power) - -Besides, we adjust TX power handling at 6 GHz in phy to consider 6 GHz -regulatory power type. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230602150556.36777-6-pkshih@realtek.com ---- - .../wireless/realtek/rtw89/rtw8852c_table.c | 3382 +++++++++++++++-- - 1 file changed, 2964 insertions(+), 418 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c -@@ -28430,11 +28430,11 @@ static const struct rtw89_txpwr_byrate_c - { 2, 0, 1, 4, 4, 0x383c4040, }, - { 2, 0, 2, 0, 4, 0x40404040, }, - { 2, 0, 2, 4, 4, 0x34383c40, }, -- { 2, 0, 2, 8, 4, 0x24282c30, }, -+ { 2, 0, 2, 8, 4, 0x20282c30, }, - { 2, 0, 3, 0, 4, 0x40404040, }, - { 2, 1, 2, 0, 4, 0x40404040, }, - { 2, 1, 2, 4, 4, 0x34383c40, }, -- { 2, 1, 2, 8, 4, 0x24282c30, }, -+ { 2, 1, 2, 8, 4, 0x20282c30, }, - { 2, 1, 3, 0, 4, 0x40404040, }, - { 2, 0, 4, 0, 4, 0x00000000, }, - }; -@@ -28562,32 +28562,50 @@ static const s8 _txpwr_track_delta_swing - const u8 rtw89_8852c_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM] - [RTW89_REGD_NUM] = { - [0][0][RTW89_ACMA] = 0, -+ [0][0][RTW89_CHILE] = 0, - [0][0][RTW89_CN] = 0, - [0][0][RTW89_ETSI] = 0, - [0][0][RTW89_FCC] = 1, - [0][0][RTW89_IC] = 1, - [0][0][RTW89_KCC] = 0, -+ [0][0][RTW89_MEXICO] = 1, - [0][0][RTW89_MKK] = 0, -+ [0][0][RTW89_QATAR] = 0, - [0][0][RTW89_UK] = 0, -+ [0][0][RTW89_UKRAINE] = 0, - [0][1][RTW89_ACMA] = 0, -+ [0][1][RTW89_CHILE] = 0, - [0][1][RTW89_CN] = 0, - [0][1][RTW89_ETSI] = 0, - [0][1][RTW89_FCC] = 3, - [0][1][RTW89_IC] = 3, - [0][1][RTW89_KCC] = 0, -+ [0][1][RTW89_MEXICO] = 3, - [0][1][RTW89_MKK] = 0, -+ [0][1][RTW89_QATAR] = 0, - [0][1][RTW89_UK] = 0, -+ [0][1][RTW89_UKRAINE] = 0, - [1][1][RTW89_ACMA] = 0, -+ [1][1][RTW89_CHILE] = 0, - [1][1][RTW89_CN] = 0, - [1][1][RTW89_ETSI] = 0, - [1][1][RTW89_FCC] = 3, - [1][1][RTW89_IC] = 3, - [1][1][RTW89_KCC] = 0, -+ [1][1][RTW89_MEXICO] = 3, - [1][1][RTW89_MKK] = 0, -+ [1][1][RTW89_QATAR] = 0, - [1][1][RTW89_UK] = 0, -+ [1][1][RTW89_UKRAINE] = 0, -+ [2][1][RTW89_ACMA] = 0, -+ [2][1][RTW89_CHILE] = 0, - [2][1][RTW89_ETSI] = 0, - [2][1][RTW89_FCC] = 0, -+ [2][1][RTW89_IC] = 0, - [2][1][RTW89_KCC] = 0, -+ [2][1][RTW89_MKK] = 0, -+ [2][1][RTW89_QATAR] = 0, -+ [2][1][RTW89_UK] = 0, - }; - - static -@@ -28770,6 +28788,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][0][0][RTW89_ACMA][0] = 60, - [0][0][0][0][RTW89_CN][0] = 58, - [0][0][0][0][RTW89_UK][0] = 60, -+ [0][0][0][0][RTW89_MEXICO][0] = 76, -+ [0][0][0][0][RTW89_UKRAINE][0] = 60, -+ [0][0][0][0][RTW89_CHILE][0] = 76, -+ [0][0][0][0][RTW89_QATAR][0] = 60, - [0][0][0][0][RTW89_FCC][1] = 76, - [0][0][0][0][RTW89_ETSI][1] = 60, - [0][0][0][0][RTW89_MKK][1] = 68, -@@ -28778,6 +28800,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][0][0][RTW89_ACMA][1] = 60, - [0][0][0][0][RTW89_CN][1] = 58, - [0][0][0][0][RTW89_UK][1] = 60, -+ [0][0][0][0][RTW89_MEXICO][1] = 76, -+ [0][0][0][0][RTW89_UKRAINE][1] = 60, -+ [0][0][0][0][RTW89_CHILE][1] = 68, -+ [0][0][0][0][RTW89_QATAR][1] = 60, - [0][0][0][0][RTW89_FCC][2] = 76, - [0][0][0][0][RTW89_ETSI][2] = 60, - [0][0][0][0][RTW89_MKK][2] = 68, -@@ -28786,6 +28812,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][0][0][RTW89_ACMA][2] = 60, - [0][0][0][0][RTW89_CN][2] = 58, - [0][0][0][0][RTW89_UK][2] = 60, -+ [0][0][0][0][RTW89_MEXICO][2] = 76, -+ [0][0][0][0][RTW89_UKRAINE][2] = 60, -+ [0][0][0][0][RTW89_CHILE][2] = 68, -+ [0][0][0][0][RTW89_QATAR][2] = 60, - [0][0][0][0][RTW89_FCC][3] = 76, - [0][0][0][0][RTW89_ETSI][3] = 60, - [0][0][0][0][RTW89_MKK][3] = 68, -@@ -28794,6 +28824,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][0][0][RTW89_ACMA][3] = 60, - [0][0][0][0][RTW89_CN][3] = 58, - [0][0][0][0][RTW89_UK][3] = 60, -+ [0][0][0][0][RTW89_MEXICO][3] = 76, -+ [0][0][0][0][RTW89_UKRAINE][3] = 60, -+ [0][0][0][0][RTW89_CHILE][3] = 68, -+ [0][0][0][0][RTW89_QATAR][3] = 60, - [0][0][0][0][RTW89_FCC][4] = 76, - [0][0][0][0][RTW89_ETSI][4] = 60, - [0][0][0][0][RTW89_MKK][4] = 68, -@@ -28802,6 +28836,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][0][0][RTW89_ACMA][4] = 60, - [0][0][0][0][RTW89_CN][4] = 58, - [0][0][0][0][RTW89_UK][4] = 60, -+ [0][0][0][0][RTW89_MEXICO][4] = 76, -+ [0][0][0][0][RTW89_UKRAINE][4] = 60, -+ [0][0][0][0][RTW89_CHILE][4] = 68, -+ [0][0][0][0][RTW89_QATAR][4] = 60, - [0][0][0][0][RTW89_FCC][5] = 76, - [0][0][0][0][RTW89_ETSI][5] = 60, - [0][0][0][0][RTW89_MKK][5] = 68, -@@ -28810,6 +28848,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][0][0][RTW89_ACMA][5] = 60, - [0][0][0][0][RTW89_CN][5] = 58, - [0][0][0][0][RTW89_UK][5] = 60, -+ [0][0][0][0][RTW89_MEXICO][5] = 76, -+ [0][0][0][0][RTW89_UKRAINE][5] = 60, -+ [0][0][0][0][RTW89_CHILE][5] = 76, -+ [0][0][0][0][RTW89_QATAR][5] = 60, - [0][0][0][0][RTW89_FCC][6] = 76, - [0][0][0][0][RTW89_ETSI][6] = 60, - [0][0][0][0][RTW89_MKK][6] = 68, -@@ -28818,6 +28860,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][0][0][RTW89_ACMA][6] = 60, - [0][0][0][0][RTW89_CN][6] = 58, - [0][0][0][0][RTW89_UK][6] = 60, -+ [0][0][0][0][RTW89_MEXICO][6] = 76, -+ [0][0][0][0][RTW89_UKRAINE][6] = 60, -+ [0][0][0][0][RTW89_CHILE][6] = 76, -+ [0][0][0][0][RTW89_QATAR][6] = 60, - [0][0][0][0][RTW89_FCC][7] = 76, - [0][0][0][0][RTW89_ETSI][7] = 60, - [0][0][0][0][RTW89_MKK][7] = 68, -@@ -28826,6 +28872,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][0][0][RTW89_ACMA][7] = 60, - [0][0][0][0][RTW89_CN][7] = 58, - [0][0][0][0][RTW89_UK][7] = 60, -+ [0][0][0][0][RTW89_MEXICO][7] = 76, -+ [0][0][0][0][RTW89_UKRAINE][7] = 60, -+ [0][0][0][0][RTW89_CHILE][7] = 76, -+ [0][0][0][0][RTW89_QATAR][7] = 60, - [0][0][0][0][RTW89_FCC][8] = 76, - [0][0][0][0][RTW89_ETSI][8] = 60, - [0][0][0][0][RTW89_MKK][8] = 68, -@@ -28834,6 +28884,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][0][0][RTW89_ACMA][8] = 60, - [0][0][0][0][RTW89_CN][8] = 58, - [0][0][0][0][RTW89_UK][8] = 60, -+ [0][0][0][0][RTW89_MEXICO][8] = 76, -+ [0][0][0][0][RTW89_UKRAINE][8] = 60, -+ [0][0][0][0][RTW89_CHILE][8] = 76, -+ [0][0][0][0][RTW89_QATAR][8] = 60, - [0][0][0][0][RTW89_FCC][9] = 76, - [0][0][0][0][RTW89_ETSI][9] = 60, - [0][0][0][0][RTW89_MKK][9] = 68, -@@ -28842,6 +28896,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][0][0][RTW89_ACMA][9] = 60, - [0][0][0][0][RTW89_CN][9] = 58, - [0][0][0][0][RTW89_UK][9] = 60, -+ [0][0][0][0][RTW89_MEXICO][9] = 76, -+ [0][0][0][0][RTW89_UKRAINE][9] = 60, -+ [0][0][0][0][RTW89_CHILE][9] = 76, -+ [0][0][0][0][RTW89_QATAR][9] = 60, - [0][0][0][0][RTW89_FCC][10] = 76, - [0][0][0][0][RTW89_ETSI][10] = 60, - [0][0][0][0][RTW89_MKK][10] = 68, -@@ -28850,6 +28908,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][0][0][RTW89_ACMA][10] = 60, - [0][0][0][0][RTW89_CN][10] = 58, - [0][0][0][0][RTW89_UK][10] = 60, -+ [0][0][0][0][RTW89_MEXICO][10] = 76, -+ [0][0][0][0][RTW89_UKRAINE][10] = 60, -+ [0][0][0][0][RTW89_CHILE][10] = 76, -+ [0][0][0][0][RTW89_QATAR][10] = 60, - [0][0][0][0][RTW89_FCC][11] = 58, - [0][0][0][0][RTW89_ETSI][11] = 60, - [0][0][0][0][RTW89_MKK][11] = 68, -@@ -28858,6 +28920,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][0][0][RTW89_ACMA][11] = 60, - [0][0][0][0][RTW89_CN][11] = 58, - [0][0][0][0][RTW89_UK][11] = 60, -+ [0][0][0][0][RTW89_MEXICO][11] = 58, -+ [0][0][0][0][RTW89_UKRAINE][11] = 60, -+ [0][0][0][0][RTW89_CHILE][11] = 58, -+ [0][0][0][0][RTW89_QATAR][11] = 60, - [0][0][0][0][RTW89_FCC][12] = 46, - [0][0][0][0][RTW89_ETSI][12] = 60, - [0][0][0][0][RTW89_MKK][12] = 68, -@@ -28866,6 +28932,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][0][0][RTW89_ACMA][12] = 60, - [0][0][0][0][RTW89_CN][12] = 58, - [0][0][0][0][RTW89_UK][12] = 60, -+ [0][0][0][0][RTW89_MEXICO][12] = 46, -+ [0][0][0][0][RTW89_UKRAINE][12] = 60, -+ [0][0][0][0][RTW89_CHILE][12] = 46, -+ [0][0][0][0][RTW89_QATAR][12] = 60, - [0][0][0][0][RTW89_FCC][13] = 127, - [0][0][0][0][RTW89_ETSI][13] = 127, - [0][0][0][0][RTW89_MKK][13] = 72, -@@ -28874,6 +28944,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][0][0][RTW89_ACMA][13] = 127, - [0][0][0][0][RTW89_CN][13] = 127, - [0][0][0][0][RTW89_UK][13] = 127, -+ [0][0][0][0][RTW89_MEXICO][13] = 127, -+ [0][0][0][0][RTW89_UKRAINE][13] = 127, -+ [0][0][0][0][RTW89_CHILE][13] = 127, -+ [0][0][0][0][RTW89_QATAR][13] = 127, - [0][1][0][0][RTW89_FCC][0] = 76, - [0][1][0][0][RTW89_ETSI][0] = 48, - [0][1][0][0][RTW89_MKK][0] = 58, -@@ -28882,6 +28956,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][0][0][RTW89_ACMA][0] = 48, - [0][1][0][0][RTW89_CN][0] = 42, - [0][1][0][0][RTW89_UK][0] = 48, -+ [0][1][0][0][RTW89_MEXICO][0] = 76, -+ [0][1][0][0][RTW89_UKRAINE][0] = 48, -+ [0][1][0][0][RTW89_CHILE][0] = 76, -+ [0][1][0][0][RTW89_QATAR][0] = 48, - [0][1][0][0][RTW89_FCC][1] = 76, - [0][1][0][0][RTW89_ETSI][1] = 48, - [0][1][0][0][RTW89_MKK][1] = 58, -@@ -28890,6 +28968,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][0][0][RTW89_ACMA][1] = 48, - [0][1][0][0][RTW89_CN][1] = 42, - [0][1][0][0][RTW89_UK][1] = 48, -+ [0][1][0][0][RTW89_MEXICO][1] = 76, -+ [0][1][0][0][RTW89_UKRAINE][1] = 48, -+ [0][1][0][0][RTW89_CHILE][1] = 54, -+ [0][1][0][0][RTW89_QATAR][1] = 48, - [0][1][0][0][RTW89_FCC][2] = 76, - [0][1][0][0][RTW89_ETSI][2] = 48, - [0][1][0][0][RTW89_MKK][2] = 58, -@@ -28898,6 +28980,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][0][0][RTW89_ACMA][2] = 48, - [0][1][0][0][RTW89_CN][2] = 42, - [0][1][0][0][RTW89_UK][2] = 48, -+ [0][1][0][0][RTW89_MEXICO][2] = 76, -+ [0][1][0][0][RTW89_UKRAINE][2] = 48, -+ [0][1][0][0][RTW89_CHILE][2] = 54, -+ [0][1][0][0][RTW89_QATAR][2] = 48, - [0][1][0][0][RTW89_FCC][3] = 76, - [0][1][0][0][RTW89_ETSI][3] = 48, - [0][1][0][0][RTW89_MKK][3] = 58, -@@ -28906,6 +28992,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][0][0][RTW89_ACMA][3] = 48, - [0][1][0][0][RTW89_CN][3] = 42, - [0][1][0][0][RTW89_UK][3] = 48, -+ [0][1][0][0][RTW89_MEXICO][3] = 76, -+ [0][1][0][0][RTW89_UKRAINE][3] = 48, -+ [0][1][0][0][RTW89_CHILE][3] = 54, -+ [0][1][0][0][RTW89_QATAR][3] = 48, - [0][1][0][0][RTW89_FCC][4] = 76, - [0][1][0][0][RTW89_ETSI][4] = 48, - [0][1][0][0][RTW89_MKK][4] = 58, -@@ -28914,6 +29004,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][0][0][RTW89_ACMA][4] = 48, - [0][1][0][0][RTW89_CN][4] = 42, - [0][1][0][0][RTW89_UK][4] = 48, -+ [0][1][0][0][RTW89_MEXICO][4] = 76, -+ [0][1][0][0][RTW89_UKRAINE][4] = 48, -+ [0][1][0][0][RTW89_CHILE][4] = 54, -+ [0][1][0][0][RTW89_QATAR][4] = 48, - [0][1][0][0][RTW89_FCC][5] = 76, - [0][1][0][0][RTW89_ETSI][5] = 48, - [0][1][0][0][RTW89_MKK][5] = 58, -@@ -28922,6 +29016,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][0][0][RTW89_ACMA][5] = 48, - [0][1][0][0][RTW89_CN][5] = 42, - [0][1][0][0][RTW89_UK][5] = 48, -+ [0][1][0][0][RTW89_MEXICO][5] = 76, -+ [0][1][0][0][RTW89_UKRAINE][5] = 48, -+ [0][1][0][0][RTW89_CHILE][5] = 76, -+ [0][1][0][0][RTW89_QATAR][5] = 48, - [0][1][0][0][RTW89_FCC][6] = 76, - [0][1][0][0][RTW89_ETSI][6] = 48, - [0][1][0][0][RTW89_MKK][6] = 58, -@@ -28930,6 +29028,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][0][0][RTW89_ACMA][6] = 48, - [0][1][0][0][RTW89_CN][6] = 42, - [0][1][0][0][RTW89_UK][6] = 48, -+ [0][1][0][0][RTW89_MEXICO][6] = 76, -+ [0][1][0][0][RTW89_UKRAINE][6] = 48, -+ [0][1][0][0][RTW89_CHILE][6] = 76, -+ [0][1][0][0][RTW89_QATAR][6] = 48, - [0][1][0][0][RTW89_FCC][7] = 76, - [0][1][0][0][RTW89_ETSI][7] = 48, - [0][1][0][0][RTW89_MKK][7] = 58, -@@ -28938,6 +29040,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][0][0][RTW89_ACMA][7] = 48, - [0][1][0][0][RTW89_CN][7] = 42, - [0][1][0][0][RTW89_UK][7] = 48, -+ [0][1][0][0][RTW89_MEXICO][7] = 76, -+ [0][1][0][0][RTW89_UKRAINE][7] = 48, -+ [0][1][0][0][RTW89_CHILE][7] = 76, -+ [0][1][0][0][RTW89_QATAR][7] = 48, - [0][1][0][0][RTW89_FCC][8] = 76, - [0][1][0][0][RTW89_ETSI][8] = 48, - [0][1][0][0][RTW89_MKK][8] = 58, -@@ -28946,6 +29052,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][0][0][RTW89_ACMA][8] = 48, - [0][1][0][0][RTW89_CN][8] = 42, - [0][1][0][0][RTW89_UK][8] = 48, -+ [0][1][0][0][RTW89_MEXICO][8] = 76, -+ [0][1][0][0][RTW89_UKRAINE][8] = 48, -+ [0][1][0][0][RTW89_CHILE][8] = 76, -+ [0][1][0][0][RTW89_QATAR][8] = 48, - [0][1][0][0][RTW89_FCC][9] = 70, - [0][1][0][0][RTW89_ETSI][9] = 48, - [0][1][0][0][RTW89_MKK][9] = 58, -@@ -28954,6 +29064,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][0][0][RTW89_ACMA][9] = 48, - [0][1][0][0][RTW89_CN][9] = 42, - [0][1][0][0][RTW89_UK][9] = 48, -+ [0][1][0][0][RTW89_MEXICO][9] = 70, -+ [0][1][0][0][RTW89_UKRAINE][9] = 48, -+ [0][1][0][0][RTW89_CHILE][9] = 70, -+ [0][1][0][0][RTW89_QATAR][9] = 48, - [0][1][0][0][RTW89_FCC][10] = 72, - [0][1][0][0][RTW89_ETSI][10] = 48, - [0][1][0][0][RTW89_MKK][10] = 58, -@@ -28962,6 +29076,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][0][0][RTW89_ACMA][10] = 48, - [0][1][0][0][RTW89_CN][10] = 42, - [0][1][0][0][RTW89_UK][10] = 48, -+ [0][1][0][0][RTW89_MEXICO][10] = 72, -+ [0][1][0][0][RTW89_UKRAINE][10] = 48, -+ [0][1][0][0][RTW89_CHILE][10] = 72, -+ [0][1][0][0][RTW89_QATAR][10] = 48, - [0][1][0][0][RTW89_FCC][11] = 44, - [0][1][0][0][RTW89_ETSI][11] = 48, - [0][1][0][0][RTW89_MKK][11] = 58, -@@ -28970,6 +29088,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][0][0][RTW89_ACMA][11] = 48, - [0][1][0][0][RTW89_CN][11] = 42, - [0][1][0][0][RTW89_UK][11] = 48, -+ [0][1][0][0][RTW89_MEXICO][11] = 44, -+ [0][1][0][0][RTW89_UKRAINE][11] = 48, -+ [0][1][0][0][RTW89_CHILE][11] = 44, -+ [0][1][0][0][RTW89_QATAR][11] = 48, - [0][1][0][0][RTW89_FCC][12] = 18, - [0][1][0][0][RTW89_ETSI][12] = 48, - [0][1][0][0][RTW89_MKK][12] = 58, -@@ -28978,6 +29100,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][0][0][RTW89_ACMA][12] = 48, - [0][1][0][0][RTW89_CN][12] = 42, - [0][1][0][0][RTW89_UK][12] = 48, -+ [0][1][0][0][RTW89_MEXICO][12] = 18, -+ [0][1][0][0][RTW89_UKRAINE][12] = 48, -+ [0][1][0][0][RTW89_CHILE][12] = 18, -+ [0][1][0][0][RTW89_QATAR][12] = 48, - [0][1][0][0][RTW89_FCC][13] = 127, - [0][1][0][0][RTW89_ETSI][13] = 127, - [0][1][0][0][RTW89_MKK][13] = 60, -@@ -28986,6 +29112,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][0][0][RTW89_ACMA][13] = 127, - [0][1][0][0][RTW89_CN][13] = 127, - [0][1][0][0][RTW89_UK][13] = 127, -+ [0][1][0][0][RTW89_MEXICO][13] = 127, -+ [0][1][0][0][RTW89_UKRAINE][13] = 127, -+ [0][1][0][0][RTW89_CHILE][13] = 127, -+ [0][1][0][0][RTW89_QATAR][13] = 127, - [1][0][0][0][RTW89_FCC][0] = 127, - [1][0][0][0][RTW89_ETSI][0] = 127, - [1][0][0][0][RTW89_MKK][0] = 127, -@@ -28994,6 +29124,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][0][0][RTW89_ACMA][0] = 127, - [1][0][0][0][RTW89_CN][0] = 127, - [1][0][0][0][RTW89_UK][0] = 127, -+ [1][0][0][0][RTW89_MEXICO][0] = 127, -+ [1][0][0][0][RTW89_UKRAINE][0] = 127, -+ [1][0][0][0][RTW89_CHILE][0] = 127, -+ [1][0][0][0][RTW89_QATAR][0] = 127, - [1][0][0][0][RTW89_FCC][1] = 127, - [1][0][0][0][RTW89_ETSI][1] = 127, - [1][0][0][0][RTW89_MKK][1] = 127, -@@ -29002,6 +29136,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][0][0][RTW89_ACMA][1] = 127, - [1][0][0][0][RTW89_CN][1] = 127, - [1][0][0][0][RTW89_UK][1] = 127, -+ [1][0][0][0][RTW89_MEXICO][1] = 127, -+ [1][0][0][0][RTW89_UKRAINE][1] = 127, -+ [1][0][0][0][RTW89_CHILE][1] = 127, -+ [1][0][0][0][RTW89_QATAR][1] = 127, - [1][0][0][0][RTW89_FCC][2] = 44, - [1][0][0][0][RTW89_ETSI][2] = 60, - [1][0][0][0][RTW89_MKK][2] = 66, -@@ -29010,6 +29148,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][0][0][RTW89_ACMA][2] = 60, - [1][0][0][0][RTW89_CN][2] = 58, - [1][0][0][0][RTW89_UK][2] = 60, -+ [1][0][0][0][RTW89_MEXICO][2] = 44, -+ [1][0][0][0][RTW89_UKRAINE][2] = 60, -+ [1][0][0][0][RTW89_CHILE][2] = 44, -+ [1][0][0][0][RTW89_QATAR][2] = 60, - [1][0][0][0][RTW89_FCC][3] = 60, - [1][0][0][0][RTW89_ETSI][3] = 60, - [1][0][0][0][RTW89_MKK][3] = 66, -@@ -29018,6 +29160,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][0][0][RTW89_ACMA][3] = 60, - [1][0][0][0][RTW89_CN][3] = 58, - [1][0][0][0][RTW89_UK][3] = 60, -+ [1][0][0][0][RTW89_MEXICO][3] = 60, -+ [1][0][0][0][RTW89_UKRAINE][3] = 60, -+ [1][0][0][0][RTW89_CHILE][3] = 60, -+ [1][0][0][0][RTW89_QATAR][3] = 60, - [1][0][0][0][RTW89_FCC][4] = 60, - [1][0][0][0][RTW89_ETSI][4] = 60, - [1][0][0][0][RTW89_MKK][4] = 66, -@@ -29026,6 +29172,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][0][0][RTW89_ACMA][4] = 60, - [1][0][0][0][RTW89_CN][4] = 58, - [1][0][0][0][RTW89_UK][4] = 60, -+ [1][0][0][0][RTW89_MEXICO][4] = 60, -+ [1][0][0][0][RTW89_UKRAINE][4] = 60, -+ [1][0][0][0][RTW89_CHILE][4] = 60, -+ [1][0][0][0][RTW89_QATAR][4] = 60, - [1][0][0][0][RTW89_FCC][5] = 62, - [1][0][0][0][RTW89_ETSI][5] = 60, - [1][0][0][0][RTW89_MKK][5] = 66, -@@ -29034,6 +29184,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][0][0][RTW89_ACMA][5] = 60, - [1][0][0][0][RTW89_CN][5] = 58, - [1][0][0][0][RTW89_UK][5] = 60, -+ [1][0][0][0][RTW89_MEXICO][5] = 62, -+ [1][0][0][0][RTW89_UKRAINE][5] = 60, -+ [1][0][0][0][RTW89_CHILE][5] = 62, -+ [1][0][0][0][RTW89_QATAR][5] = 60, - [1][0][0][0][RTW89_FCC][6] = 46, - [1][0][0][0][RTW89_ETSI][6] = 60, - [1][0][0][0][RTW89_MKK][6] = 66, -@@ -29042,6 +29196,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][0][0][RTW89_ACMA][6] = 60, - [1][0][0][0][RTW89_CN][6] = 58, - [1][0][0][0][RTW89_UK][6] = 60, -+ [1][0][0][0][RTW89_MEXICO][6] = 46, -+ [1][0][0][0][RTW89_UKRAINE][6] = 60, -+ [1][0][0][0][RTW89_CHILE][6] = 46, -+ [1][0][0][0][RTW89_QATAR][6] = 60, - [1][0][0][0][RTW89_FCC][7] = 46, - [1][0][0][0][RTW89_ETSI][7] = 60, - [1][0][0][0][RTW89_MKK][7] = 66, -@@ -29050,6 +29208,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][0][0][RTW89_ACMA][7] = 60, - [1][0][0][0][RTW89_CN][7] = 58, - [1][0][0][0][RTW89_UK][7] = 60, -+ [1][0][0][0][RTW89_MEXICO][7] = 46, -+ [1][0][0][0][RTW89_UKRAINE][7] = 60, -+ [1][0][0][0][RTW89_CHILE][7] = 46, -+ [1][0][0][0][RTW89_QATAR][7] = 60, - [1][0][0][0][RTW89_FCC][8] = 28, - [1][0][0][0][RTW89_ETSI][8] = 60, - [1][0][0][0][RTW89_MKK][8] = 66, -@@ -29058,6 +29220,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][0][0][RTW89_ACMA][8] = 60, - [1][0][0][0][RTW89_CN][8] = 58, - [1][0][0][0][RTW89_UK][8] = 60, -+ [1][0][0][0][RTW89_MEXICO][8] = 28, -+ [1][0][0][0][RTW89_UKRAINE][8] = 60, -+ [1][0][0][0][RTW89_CHILE][8] = 28, -+ [1][0][0][0][RTW89_QATAR][8] = 60, - [1][0][0][0][RTW89_FCC][9] = 26, - [1][0][0][0][RTW89_ETSI][9] = 60, - [1][0][0][0][RTW89_MKK][9] = 66, -@@ -29066,6 +29232,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][0][0][RTW89_ACMA][9] = 60, - [1][0][0][0][RTW89_CN][9] = 58, - [1][0][0][0][RTW89_UK][9] = 60, -+ [1][0][0][0][RTW89_MEXICO][9] = 26, -+ [1][0][0][0][RTW89_UKRAINE][9] = 60, -+ [1][0][0][0][RTW89_CHILE][9] = 26, -+ [1][0][0][0][RTW89_QATAR][9] = 60, - [1][0][0][0][RTW89_FCC][10] = 26, - [1][0][0][0][RTW89_ETSI][10] = 60, - [1][0][0][0][RTW89_MKK][10] = 66, -@@ -29074,6 +29244,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][0][0][RTW89_ACMA][10] = 60, - [1][0][0][0][RTW89_CN][10] = 58, - [1][0][0][0][RTW89_UK][10] = 60, -+ [1][0][0][0][RTW89_MEXICO][10] = 26, -+ [1][0][0][0][RTW89_UKRAINE][10] = 60, -+ [1][0][0][0][RTW89_CHILE][10] = 26, -+ [1][0][0][0][RTW89_QATAR][10] = 60, - [1][0][0][0][RTW89_FCC][11] = 127, - [1][0][0][0][RTW89_ETSI][11] = 127, - [1][0][0][0][RTW89_MKK][11] = 127, -@@ -29082,6 +29256,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][0][0][RTW89_ACMA][11] = 127, - [1][0][0][0][RTW89_CN][11] = 127, - [1][0][0][0][RTW89_UK][11] = 127, -+ [1][0][0][0][RTW89_MEXICO][11] = 127, -+ [1][0][0][0][RTW89_UKRAINE][11] = 127, -+ [1][0][0][0][RTW89_CHILE][11] = 127, -+ [1][0][0][0][RTW89_QATAR][11] = 127, - [1][0][0][0][RTW89_FCC][12] = 127, - [1][0][0][0][RTW89_ETSI][12] = 127, - [1][0][0][0][RTW89_MKK][12] = 127, -@@ -29090,6 +29268,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][0][0][RTW89_ACMA][12] = 127, - [1][0][0][0][RTW89_CN][12] = 127, - [1][0][0][0][RTW89_UK][12] = 127, -+ [1][0][0][0][RTW89_MEXICO][12] = 127, -+ [1][0][0][0][RTW89_UKRAINE][12] = 127, -+ [1][0][0][0][RTW89_CHILE][12] = 127, -+ [1][0][0][0][RTW89_QATAR][12] = 127, - [1][0][0][0][RTW89_FCC][13] = 127, - [1][0][0][0][RTW89_ETSI][13] = 127, - [1][0][0][0][RTW89_MKK][13] = 127, -@@ -29098,6 +29280,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][0][0][RTW89_ACMA][13] = 127, - [1][0][0][0][RTW89_CN][13] = 127, - [1][0][0][0][RTW89_UK][13] = 127, -+ [1][0][0][0][RTW89_MEXICO][13] = 127, -+ [1][0][0][0][RTW89_UKRAINE][13] = 127, -+ [1][0][0][0][RTW89_CHILE][13] = 127, -+ [1][0][0][0][RTW89_QATAR][13] = 127, - [1][1][0][0][RTW89_FCC][0] = 127, - [1][1][0][0][RTW89_ETSI][0] = 127, - [1][1][0][0][RTW89_MKK][0] = 127, -@@ -29106,6 +29292,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][0][0][RTW89_ACMA][0] = 127, - [1][1][0][0][RTW89_CN][0] = 127, - [1][1][0][0][RTW89_UK][0] = 127, -+ [1][1][0][0][RTW89_MEXICO][0] = 127, -+ [1][1][0][0][RTW89_UKRAINE][0] = 127, -+ [1][1][0][0][RTW89_CHILE][0] = 127, -+ [1][1][0][0][RTW89_QATAR][0] = 127, - [1][1][0][0][RTW89_FCC][1] = 127, - [1][1][0][0][RTW89_ETSI][1] = 127, - [1][1][0][0][RTW89_MKK][1] = 127, -@@ -29114,6 +29304,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][0][0][RTW89_ACMA][1] = 127, - [1][1][0][0][RTW89_CN][1] = 127, - [1][1][0][0][RTW89_UK][1] = 127, -+ [1][1][0][0][RTW89_MEXICO][1] = 127, -+ [1][1][0][0][RTW89_UKRAINE][1] = 127, -+ [1][1][0][0][RTW89_CHILE][1] = 127, -+ [1][1][0][0][RTW89_QATAR][1] = 127, - [1][1][0][0][RTW89_FCC][2] = 46, - [1][1][0][0][RTW89_ETSI][2] = 48, - [1][1][0][0][RTW89_MKK][2] = 58, -@@ -29122,6 +29316,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][0][0][RTW89_ACMA][2] = 48, - [1][1][0][0][RTW89_CN][2] = 46, - [1][1][0][0][RTW89_UK][2] = 48, -+ [1][1][0][0][RTW89_MEXICO][2] = 46, -+ [1][1][0][0][RTW89_UKRAINE][2] = 48, -+ [1][1][0][0][RTW89_CHILE][2] = 46, -+ [1][1][0][0][RTW89_QATAR][2] = 48, - [1][1][0][0][RTW89_FCC][3] = 46, - [1][1][0][0][RTW89_ETSI][3] = 48, - [1][1][0][0][RTW89_MKK][3] = 58, -@@ -29130,6 +29328,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][0][0][RTW89_ACMA][3] = 48, - [1][1][0][0][RTW89_CN][3] = 46, - [1][1][0][0][RTW89_UK][3] = 48, -+ [1][1][0][0][RTW89_MEXICO][3] = 46, -+ [1][1][0][0][RTW89_UKRAINE][3] = 48, -+ [1][1][0][0][RTW89_CHILE][3] = 46, -+ [1][1][0][0][RTW89_QATAR][3] = 48, - [1][1][0][0][RTW89_FCC][4] = 46, - [1][1][0][0][RTW89_ETSI][4] = 48, - [1][1][0][0][RTW89_MKK][4] = 58, -@@ -29138,6 +29340,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][0][0][RTW89_ACMA][4] = 48, - [1][1][0][0][RTW89_CN][4] = 46, - [1][1][0][0][RTW89_UK][4] = 48, -+ [1][1][0][0][RTW89_MEXICO][4] = 46, -+ [1][1][0][0][RTW89_UKRAINE][4] = 48, -+ [1][1][0][0][RTW89_CHILE][4] = 46, -+ [1][1][0][0][RTW89_QATAR][4] = 48, - [1][1][0][0][RTW89_FCC][5] = 48, - [1][1][0][0][RTW89_ETSI][5] = 48, - [1][1][0][0][RTW89_MKK][5] = 58, -@@ -29146,6 +29352,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][0][0][RTW89_ACMA][5] = 48, - [1][1][0][0][RTW89_CN][5] = 46, - [1][1][0][0][RTW89_UK][5] = 48, -+ [1][1][0][0][RTW89_MEXICO][5] = 48, -+ [1][1][0][0][RTW89_UKRAINE][5] = 48, -+ [1][1][0][0][RTW89_CHILE][5] = 48, -+ [1][1][0][0][RTW89_QATAR][5] = 48, - [1][1][0][0][RTW89_FCC][6] = 40, - [1][1][0][0][RTW89_ETSI][6] = 48, - [1][1][0][0][RTW89_MKK][6] = 58, -@@ -29154,6 +29364,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][0][0][RTW89_ACMA][6] = 48, - [1][1][0][0][RTW89_CN][6] = 46, - [1][1][0][0][RTW89_UK][6] = 48, -+ [1][1][0][0][RTW89_MEXICO][6] = 40, -+ [1][1][0][0][RTW89_UKRAINE][6] = 48, -+ [1][1][0][0][RTW89_CHILE][6] = 40, -+ [1][1][0][0][RTW89_QATAR][6] = 48, - [1][1][0][0][RTW89_FCC][7] = 40, - [1][1][0][0][RTW89_ETSI][7] = 48, - [1][1][0][0][RTW89_MKK][7] = 58, -@@ -29162,6 +29376,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][0][0][RTW89_ACMA][7] = 48, - [1][1][0][0][RTW89_CN][7] = 46, - [1][1][0][0][RTW89_UK][7] = 48, -+ [1][1][0][0][RTW89_MEXICO][7] = 40, -+ [1][1][0][0][RTW89_UKRAINE][7] = 48, -+ [1][1][0][0][RTW89_CHILE][7] = 40, -+ [1][1][0][0][RTW89_QATAR][7] = 48, - [1][1][0][0][RTW89_FCC][8] = 14, - [1][1][0][0][RTW89_ETSI][8] = 48, - [1][1][0][0][RTW89_MKK][8] = 58, -@@ -29170,6 +29388,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][0][0][RTW89_ACMA][8] = 48, - [1][1][0][0][RTW89_CN][8] = 46, - [1][1][0][0][RTW89_UK][8] = 48, -+ [1][1][0][0][RTW89_MEXICO][8] = 14, -+ [1][1][0][0][RTW89_UKRAINE][8] = 48, -+ [1][1][0][0][RTW89_CHILE][8] = 14, -+ [1][1][0][0][RTW89_QATAR][8] = 48, - [1][1][0][0][RTW89_FCC][9] = 14, - [1][1][0][0][RTW89_ETSI][9] = 48, - [1][1][0][0][RTW89_MKK][9] = 58, -@@ -29178,6 +29400,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][0][0][RTW89_ACMA][9] = 48, - [1][1][0][0][RTW89_CN][9] = 46, - [1][1][0][0][RTW89_UK][9] = 48, -+ [1][1][0][0][RTW89_MEXICO][9] = 14, -+ [1][1][0][0][RTW89_UKRAINE][9] = 48, -+ [1][1][0][0][RTW89_CHILE][9] = 14, -+ [1][1][0][0][RTW89_QATAR][9] = 48, - [1][1][0][0][RTW89_FCC][10] = 12, - [1][1][0][0][RTW89_ETSI][10] = 48, - [1][1][0][0][RTW89_MKK][10] = 56, -@@ -29186,6 +29412,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][0][0][RTW89_ACMA][10] = 48, - [1][1][0][0][RTW89_CN][10] = 46, - [1][1][0][0][RTW89_UK][10] = 48, -+ [1][1][0][0][RTW89_MEXICO][10] = 12, -+ [1][1][0][0][RTW89_UKRAINE][10] = 48, -+ [1][1][0][0][RTW89_CHILE][10] = 12, -+ [1][1][0][0][RTW89_QATAR][10] = 48, - [1][1][0][0][RTW89_FCC][11] = 127, - [1][1][0][0][RTW89_ETSI][11] = 127, - [1][1][0][0][RTW89_MKK][11] = 127, -@@ -29194,6 +29424,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][0][0][RTW89_ACMA][11] = 127, - [1][1][0][0][RTW89_CN][11] = 127, - [1][1][0][0][RTW89_UK][11] = 127, -+ [1][1][0][0][RTW89_MEXICO][11] = 127, -+ [1][1][0][0][RTW89_UKRAINE][11] = 127, -+ [1][1][0][0][RTW89_CHILE][11] = 127, -+ [1][1][0][0][RTW89_QATAR][11] = 127, - [1][1][0][0][RTW89_FCC][12] = 127, - [1][1][0][0][RTW89_ETSI][12] = 127, - [1][1][0][0][RTW89_MKK][12] = 127, -@@ -29202,6 +29436,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][0][0][RTW89_ACMA][12] = 127, - [1][1][0][0][RTW89_CN][12] = 127, - [1][1][0][0][RTW89_UK][12] = 127, -+ [1][1][0][0][RTW89_MEXICO][12] = 127, -+ [1][1][0][0][RTW89_UKRAINE][12] = 127, -+ [1][1][0][0][RTW89_CHILE][12] = 127, -+ [1][1][0][0][RTW89_QATAR][12] = 127, - [1][1][0][0][RTW89_FCC][13] = 127, - [1][1][0][0][RTW89_ETSI][13] = 127, - [1][1][0][0][RTW89_MKK][13] = 127, -@@ -29210,6 +29448,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][0][0][RTW89_ACMA][13] = 127, - [1][1][0][0][RTW89_CN][13] = 127, - [1][1][0][0][RTW89_UK][13] = 127, -+ [1][1][0][0][RTW89_MEXICO][13] = 127, -+ [1][1][0][0][RTW89_UKRAINE][13] = 127, -+ [1][1][0][0][RTW89_CHILE][13] = 127, -+ [1][1][0][0][RTW89_QATAR][13] = 127, - [0][0][1][0][RTW89_FCC][0] = 66, - [0][0][1][0][RTW89_ETSI][0] = 60, - [0][0][1][0][RTW89_MKK][0] = 76, -@@ -29218,6 +29460,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][1][0][RTW89_ACMA][0] = 60, - [0][0][1][0][RTW89_CN][0] = 58, - [0][0][1][0][RTW89_UK][0] = 60, -+ [0][0][1][0][RTW89_MEXICO][0] = 66, -+ [0][0][1][0][RTW89_UKRAINE][0] = 60, -+ [0][0][1][0][RTW89_CHILE][0] = 66, -+ [0][0][1][0][RTW89_QATAR][0] = 60, - [0][0][1][0][RTW89_FCC][1] = 68, - [0][0][1][0][RTW89_ETSI][1] = 60, - [0][0][1][0][RTW89_MKK][1] = 78, -@@ -29226,6 +29472,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][1][0][RTW89_ACMA][1] = 60, - [0][0][1][0][RTW89_CN][1] = 58, - [0][0][1][0][RTW89_UK][1] = 60, -+ [0][0][1][0][RTW89_MEXICO][1] = 68, -+ [0][0][1][0][RTW89_UKRAINE][1] = 60, -+ [0][0][1][0][RTW89_CHILE][1] = 68, -+ [0][0][1][0][RTW89_QATAR][1] = 60, - [0][0][1][0][RTW89_FCC][2] = 72, - [0][0][1][0][RTW89_ETSI][2] = 60, - [0][0][1][0][RTW89_MKK][2] = 78, -@@ -29234,6 +29484,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][1][0][RTW89_ACMA][2] = 60, - [0][0][1][0][RTW89_CN][2] = 58, - [0][0][1][0][RTW89_UK][2] = 60, -+ [0][0][1][0][RTW89_MEXICO][2] = 72, -+ [0][0][1][0][RTW89_UKRAINE][2] = 60, -+ [0][0][1][0][RTW89_CHILE][2] = 62, -+ [0][0][1][0][RTW89_QATAR][2] = 60, - [0][0][1][0][RTW89_FCC][3] = 76, - [0][0][1][0][RTW89_ETSI][3] = 60, - [0][0][1][0][RTW89_MKK][3] = 78, -@@ -29242,6 +29496,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][1][0][RTW89_ACMA][3] = 60, - [0][0][1][0][RTW89_CN][3] = 58, - [0][0][1][0][RTW89_UK][3] = 60, -+ [0][0][1][0][RTW89_MEXICO][3] = 76, -+ [0][0][1][0][RTW89_UKRAINE][3] = 60, -+ [0][0][1][0][RTW89_CHILE][3] = 62, -+ [0][0][1][0][RTW89_QATAR][3] = 60, - [0][0][1][0][RTW89_FCC][4] = 80, - [0][0][1][0][RTW89_ETSI][4] = 60, - [0][0][1][0][RTW89_MKK][4] = 78, -@@ -29250,6 +29508,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][1][0][RTW89_ACMA][4] = 60, - [0][0][1][0][RTW89_CN][4] = 58, - [0][0][1][0][RTW89_UK][4] = 60, -+ [0][0][1][0][RTW89_MEXICO][4] = 80, -+ [0][0][1][0][RTW89_UKRAINE][4] = 60, -+ [0][0][1][0][RTW89_CHILE][4] = 62, -+ [0][0][1][0][RTW89_QATAR][4] = 60, - [0][0][1][0][RTW89_FCC][5] = 80, - [0][0][1][0][RTW89_ETSI][5] = 60, - [0][0][1][0][RTW89_MKK][5] = 78, -@@ -29258,6 +29520,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][1][0][RTW89_ACMA][5] = 60, - [0][0][1][0][RTW89_CN][5] = 58, - [0][0][1][0][RTW89_UK][5] = 60, -+ [0][0][1][0][RTW89_MEXICO][5] = 80, -+ [0][0][1][0][RTW89_UKRAINE][5] = 60, -+ [0][0][1][0][RTW89_CHILE][5] = 80, -+ [0][0][1][0][RTW89_QATAR][5] = 60, - [0][0][1][0][RTW89_FCC][6] = 80, - [0][0][1][0][RTW89_ETSI][6] = 60, - [0][0][1][0][RTW89_MKK][6] = 76, -@@ -29266,6 +29532,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][1][0][RTW89_ACMA][6] = 60, - [0][0][1][0][RTW89_CN][6] = 58, - [0][0][1][0][RTW89_UK][6] = 60, -+ [0][0][1][0][RTW89_MEXICO][6] = 80, -+ [0][0][1][0][RTW89_UKRAINE][6] = 60, -+ [0][0][1][0][RTW89_CHILE][6] = 70, -+ [0][0][1][0][RTW89_QATAR][6] = 60, - [0][0][1][0][RTW89_FCC][7] = 80, - [0][0][1][0][RTW89_ETSI][7] = 60, - [0][0][1][0][RTW89_MKK][7] = 78, -@@ -29274,6 +29544,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][1][0][RTW89_ACMA][7] = 60, - [0][0][1][0][RTW89_CN][7] = 58, - [0][0][1][0][RTW89_UK][7] = 60, -+ [0][0][1][0][RTW89_MEXICO][7] = 80, -+ [0][0][1][0][RTW89_UKRAINE][7] = 60, -+ [0][0][1][0][RTW89_CHILE][7] = 70, -+ [0][0][1][0][RTW89_QATAR][7] = 60, - [0][0][1][0][RTW89_FCC][8] = 80, - [0][0][1][0][RTW89_ETSI][8] = 60, - [0][0][1][0][RTW89_MKK][8] = 78, -@@ -29282,6 +29556,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][1][0][RTW89_ACMA][8] = 60, - [0][0][1][0][RTW89_CN][8] = 58, - [0][0][1][0][RTW89_UK][8] = 60, -+ [0][0][1][0][RTW89_MEXICO][8] = 80, -+ [0][0][1][0][RTW89_UKRAINE][8] = 60, -+ [0][0][1][0][RTW89_CHILE][8] = 70, -+ [0][0][1][0][RTW89_QATAR][8] = 60, - [0][0][1][0][RTW89_FCC][9] = 76, - [0][0][1][0][RTW89_ETSI][9] = 60, - [0][0][1][0][RTW89_MKK][9] = 78, -@@ -29290,6 +29568,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][1][0][RTW89_ACMA][9] = 60, - [0][0][1][0][RTW89_CN][9] = 58, - [0][0][1][0][RTW89_UK][9] = 60, -+ [0][0][1][0][RTW89_MEXICO][9] = 76, -+ [0][0][1][0][RTW89_UKRAINE][9] = 60, -+ [0][0][1][0][RTW89_CHILE][9] = 76, -+ [0][0][1][0][RTW89_QATAR][9] = 60, - [0][0][1][0][RTW89_FCC][10] = 66, - [0][0][1][0][RTW89_ETSI][10] = 60, - [0][0][1][0][RTW89_MKK][10] = 78, -@@ -29298,6 +29580,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][1][0][RTW89_ACMA][10] = 60, - [0][0][1][0][RTW89_CN][10] = 58, - [0][0][1][0][RTW89_UK][10] = 60, -+ [0][0][1][0][RTW89_MEXICO][10] = 66, -+ [0][0][1][0][RTW89_UKRAINE][10] = 60, -+ [0][0][1][0][RTW89_CHILE][10] = 66, -+ [0][0][1][0][RTW89_QATAR][10] = 60, - [0][0][1][0][RTW89_FCC][11] = 62, - [0][0][1][0][RTW89_ETSI][11] = 60, - [0][0][1][0][RTW89_MKK][11] = 78, -@@ -29306,6 +29592,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][1][0][RTW89_ACMA][11] = 60, - [0][0][1][0][RTW89_CN][11] = 58, - [0][0][1][0][RTW89_UK][11] = 60, -+ [0][0][1][0][RTW89_MEXICO][11] = 62, -+ [0][0][1][0][RTW89_UKRAINE][11] = 60, -+ [0][0][1][0][RTW89_CHILE][11] = 62, -+ [0][0][1][0][RTW89_QATAR][11] = 60, - [0][0][1][0][RTW89_FCC][12] = 60, - [0][0][1][0][RTW89_ETSI][12] = 60, - [0][0][1][0][RTW89_MKK][12] = 78, -@@ -29314,6 +29604,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][1][0][RTW89_ACMA][12] = 60, - [0][0][1][0][RTW89_CN][12] = 58, - [0][0][1][0][RTW89_UK][12] = 60, -+ [0][0][1][0][RTW89_MEXICO][12] = 60, -+ [0][0][1][0][RTW89_UKRAINE][12] = 60, -+ [0][0][1][0][RTW89_CHILE][12] = 60, -+ [0][0][1][0][RTW89_QATAR][12] = 60, - [0][0][1][0][RTW89_FCC][13] = 127, - [0][0][1][0][RTW89_ETSI][13] = 127, - [0][0][1][0][RTW89_MKK][13] = 127, -@@ -29322,6 +29616,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][1][0][RTW89_ACMA][13] = 127, - [0][0][1][0][RTW89_CN][13] = 127, - [0][0][1][0][RTW89_UK][13] = 127, -+ [0][0][1][0][RTW89_MEXICO][13] = 127, -+ [0][0][1][0][RTW89_UKRAINE][13] = 127, -+ [0][0][1][0][RTW89_CHILE][13] = 127, -+ [0][0][1][0][RTW89_QATAR][13] = 127, - [0][1][1][0][RTW89_FCC][0] = 66, - [0][1][1][0][RTW89_ETSI][0] = 48, - [0][1][1][0][RTW89_MKK][0] = 66, -@@ -29330,6 +29628,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][1][0][RTW89_ACMA][0] = 48, - [0][1][1][0][RTW89_CN][0] = 46, - [0][1][1][0][RTW89_UK][0] = 48, -+ [0][1][1][0][RTW89_MEXICO][0] = 66, -+ [0][1][1][0][RTW89_UKRAINE][0] = 48, -+ [0][1][1][0][RTW89_CHILE][0] = 66, -+ [0][1][1][0][RTW89_QATAR][0] = 48, - [0][1][1][0][RTW89_FCC][1] = 68, - [0][1][1][0][RTW89_ETSI][1] = 48, - [0][1][1][0][RTW89_MKK][1] = 66, -@@ -29338,6 +29640,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][1][0][RTW89_ACMA][1] = 48, - [0][1][1][0][RTW89_CN][1] = 46, - [0][1][1][0][RTW89_UK][1] = 48, -+ [0][1][1][0][RTW89_MEXICO][1] = 68, -+ [0][1][1][0][RTW89_UKRAINE][1] = 48, -+ [0][1][1][0][RTW89_CHILE][1] = 68, -+ [0][1][1][0][RTW89_QATAR][1] = 48, - [0][1][1][0][RTW89_FCC][2] = 72, - [0][1][1][0][RTW89_ETSI][2] = 48, - [0][1][1][0][RTW89_MKK][2] = 66, -@@ -29346,6 +29652,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][1][0][RTW89_ACMA][2] = 48, - [0][1][1][0][RTW89_CN][2] = 46, - [0][1][1][0][RTW89_UK][2] = 48, -+ [0][1][1][0][RTW89_MEXICO][2] = 72, -+ [0][1][1][0][RTW89_UKRAINE][2] = 48, -+ [0][1][1][0][RTW89_CHILE][2] = 54, -+ [0][1][1][0][RTW89_QATAR][2] = 48, - [0][1][1][0][RTW89_FCC][3] = 76, - [0][1][1][0][RTW89_ETSI][3] = 48, - [0][1][1][0][RTW89_MKK][3] = 66, -@@ -29354,6 +29664,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][1][0][RTW89_ACMA][3] = 48, - [0][1][1][0][RTW89_CN][3] = 46, - [0][1][1][0][RTW89_UK][3] = 48, -+ [0][1][1][0][RTW89_MEXICO][3] = 76, -+ [0][1][1][0][RTW89_UKRAINE][3] = 48, -+ [0][1][1][0][RTW89_CHILE][3] = 54, -+ [0][1][1][0][RTW89_QATAR][3] = 48, - [0][1][1][0][RTW89_FCC][4] = 80, - [0][1][1][0][RTW89_ETSI][4] = 48, - [0][1][1][0][RTW89_MKK][4] = 66, -@@ -29362,6 +29676,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][1][0][RTW89_ACMA][4] = 48, - [0][1][1][0][RTW89_CN][4] = 46, - [0][1][1][0][RTW89_UK][4] = 48, -+ [0][1][1][0][RTW89_MEXICO][4] = 80, -+ [0][1][1][0][RTW89_UKRAINE][4] = 48, -+ [0][1][1][0][RTW89_CHILE][4] = 54, -+ [0][1][1][0][RTW89_QATAR][4] = 48, - [0][1][1][0][RTW89_FCC][5] = 80, - [0][1][1][0][RTW89_ETSI][5] = 48, - [0][1][1][0][RTW89_MKK][5] = 66, -@@ -29370,6 +29688,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][1][0][RTW89_ACMA][5] = 48, - [0][1][1][0][RTW89_CN][5] = 46, - [0][1][1][0][RTW89_UK][5] = 48, -+ [0][1][1][0][RTW89_MEXICO][5] = 80, -+ [0][1][1][0][RTW89_UKRAINE][5] = 48, -+ [0][1][1][0][RTW89_CHILE][5] = 80, -+ [0][1][1][0][RTW89_QATAR][5] = 48, - [0][1][1][0][RTW89_FCC][6] = 80, - [0][1][1][0][RTW89_ETSI][6] = 48, - [0][1][1][0][RTW89_MKK][6] = 66, -@@ -29378,6 +29700,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][1][0][RTW89_ACMA][6] = 48, - [0][1][1][0][RTW89_CN][6] = 46, - [0][1][1][0][RTW89_UK][6] = 48, -+ [0][1][1][0][RTW89_MEXICO][6] = 80, -+ [0][1][1][0][RTW89_UKRAINE][6] = 48, -+ [0][1][1][0][RTW89_CHILE][6] = 56, -+ [0][1][1][0][RTW89_QATAR][6] = 48, - [0][1][1][0][RTW89_FCC][7] = 78, - [0][1][1][0][RTW89_ETSI][7] = 48, - [0][1][1][0][RTW89_MKK][7] = 66, -@@ -29386,6 +29712,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][1][0][RTW89_ACMA][7] = 48, - [0][1][1][0][RTW89_CN][7] = 46, - [0][1][1][0][RTW89_UK][7] = 48, -+ [0][1][1][0][RTW89_MEXICO][7] = 78, -+ [0][1][1][0][RTW89_UKRAINE][7] = 48, -+ [0][1][1][0][RTW89_CHILE][7] = 56, -+ [0][1][1][0][RTW89_QATAR][7] = 48, - [0][1][1][0][RTW89_FCC][8] = 74, - [0][1][1][0][RTW89_ETSI][8] = 48, - [0][1][1][0][RTW89_MKK][8] = 66, -@@ -29394,6 +29724,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][1][0][RTW89_ACMA][8] = 48, - [0][1][1][0][RTW89_CN][8] = 46, - [0][1][1][0][RTW89_UK][8] = 48, -+ [0][1][1][0][RTW89_MEXICO][8] = 74, -+ [0][1][1][0][RTW89_UKRAINE][8] = 48, -+ [0][1][1][0][RTW89_CHILE][8] = 56, -+ [0][1][1][0][RTW89_QATAR][8] = 48, - [0][1][1][0][RTW89_FCC][9] = 70, - [0][1][1][0][RTW89_ETSI][9] = 48, - [0][1][1][0][RTW89_MKK][9] = 66, -@@ -29402,6 +29736,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][1][0][RTW89_ACMA][9] = 48, - [0][1][1][0][RTW89_CN][9] = 46, - [0][1][1][0][RTW89_UK][9] = 48, -+ [0][1][1][0][RTW89_MEXICO][9] = 70, -+ [0][1][1][0][RTW89_UKRAINE][9] = 48, -+ [0][1][1][0][RTW89_CHILE][9] = 70, -+ [0][1][1][0][RTW89_QATAR][9] = 48, - [0][1][1][0][RTW89_FCC][10] = 62, - [0][1][1][0][RTW89_ETSI][10] = 48, - [0][1][1][0][RTW89_MKK][10] = 66, -@@ -29410,6 +29748,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][1][0][RTW89_ACMA][10] = 48, - [0][1][1][0][RTW89_CN][10] = 46, - [0][1][1][0][RTW89_UK][10] = 48, -+ [0][1][1][0][RTW89_MEXICO][10] = 62, -+ [0][1][1][0][RTW89_UKRAINE][10] = 48, -+ [0][1][1][0][RTW89_CHILE][10] = 62, -+ [0][1][1][0][RTW89_QATAR][10] = 48, - [0][1][1][0][RTW89_FCC][11] = 60, - [0][1][1][0][RTW89_ETSI][11] = 48, - [0][1][1][0][RTW89_MKK][11] = 66, -@@ -29418,6 +29760,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][1][0][RTW89_ACMA][11] = 48, - [0][1][1][0][RTW89_CN][11] = 46, - [0][1][1][0][RTW89_UK][11] = 48, -+ [0][1][1][0][RTW89_MEXICO][11] = 60, -+ [0][1][1][0][RTW89_UKRAINE][11] = 48, -+ [0][1][1][0][RTW89_CHILE][11] = 60, -+ [0][1][1][0][RTW89_QATAR][11] = 48, - [0][1][1][0][RTW89_FCC][12] = 36, - [0][1][1][0][RTW89_ETSI][12] = 48, - [0][1][1][0][RTW89_MKK][12] = 66, -@@ -29426,6 +29772,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][1][0][RTW89_ACMA][12] = 48, - [0][1][1][0][RTW89_CN][12] = 46, - [0][1][1][0][RTW89_UK][12] = 48, -+ [0][1][1][0][RTW89_MEXICO][12] = 36, -+ [0][1][1][0][RTW89_UKRAINE][12] = 48, -+ [0][1][1][0][RTW89_CHILE][12] = 36, -+ [0][1][1][0][RTW89_QATAR][12] = 48, - [0][1][1][0][RTW89_FCC][13] = 127, - [0][1][1][0][RTW89_ETSI][13] = 127, - [0][1][1][0][RTW89_MKK][13] = 127, -@@ -29434,6 +29784,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][1][0][RTW89_ACMA][13] = 127, - [0][1][1][0][RTW89_CN][13] = 127, - [0][1][1][0][RTW89_UK][13] = 127, -+ [0][1][1][0][RTW89_MEXICO][13] = 127, -+ [0][1][1][0][RTW89_UKRAINE][13] = 127, -+ [0][1][1][0][RTW89_CHILE][13] = 127, -+ [0][1][1][0][RTW89_QATAR][13] = 127, - [0][0][2][0][RTW89_FCC][0] = 66, - [0][0][2][0][RTW89_ETSI][0] = 60, - [0][0][2][0][RTW89_MKK][0] = 78, -@@ -29442,6 +29796,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][2][0][RTW89_ACMA][0] = 60, - [0][0][2][0][RTW89_CN][0] = 58, - [0][0][2][0][RTW89_UK][0] = 60, -+ [0][0][2][0][RTW89_MEXICO][0] = 66, -+ [0][0][2][0][RTW89_UKRAINE][0] = 60, -+ [0][0][2][0][RTW89_CHILE][0] = 66, -+ [0][0][2][0][RTW89_QATAR][0] = 60, - [0][0][2][0][RTW89_FCC][1] = 70, - [0][0][2][0][RTW89_ETSI][1] = 60, - [0][0][2][0][RTW89_MKK][1] = 78, -@@ -29450,6 +29808,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][2][0][RTW89_ACMA][1] = 60, - [0][0][2][0][RTW89_CN][1] = 58, - [0][0][2][0][RTW89_UK][1] = 60, -+ [0][0][2][0][RTW89_MEXICO][1] = 70, -+ [0][0][2][0][RTW89_UKRAINE][1] = 60, -+ [0][0][2][0][RTW89_CHILE][1] = 70, -+ [0][0][2][0][RTW89_QATAR][1] = 60, - [0][0][2][0][RTW89_FCC][2] = 74, - [0][0][2][0][RTW89_ETSI][2] = 60, - [0][0][2][0][RTW89_MKK][2] = 78, -@@ -29458,6 +29820,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][2][0][RTW89_ACMA][2] = 60, - [0][0][2][0][RTW89_CN][2] = 58, - [0][0][2][0][RTW89_UK][2] = 60, -+ [0][0][2][0][RTW89_MEXICO][2] = 74, -+ [0][0][2][0][RTW89_UKRAINE][2] = 60, -+ [0][0][2][0][RTW89_CHILE][2] = 64, -+ [0][0][2][0][RTW89_QATAR][2] = 60, - [0][0][2][0][RTW89_FCC][3] = 78, - [0][0][2][0][RTW89_ETSI][3] = 60, - [0][0][2][0][RTW89_MKK][3] = 78, -@@ -29466,6 +29832,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][2][0][RTW89_ACMA][3] = 60, - [0][0][2][0][RTW89_CN][3] = 58, - [0][0][2][0][RTW89_UK][3] = 60, -+ [0][0][2][0][RTW89_MEXICO][3] = 78, -+ [0][0][2][0][RTW89_UKRAINE][3] = 60, -+ [0][0][2][0][RTW89_CHILE][3] = 64, -+ [0][0][2][0][RTW89_QATAR][3] = 60, - [0][0][2][0][RTW89_FCC][4] = 80, - [0][0][2][0][RTW89_ETSI][4] = 60, - [0][0][2][0][RTW89_MKK][4] = 78, -@@ -29474,6 +29844,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][2][0][RTW89_ACMA][4] = 60, - [0][0][2][0][RTW89_CN][4] = 58, - [0][0][2][0][RTW89_UK][4] = 60, -+ [0][0][2][0][RTW89_MEXICO][4] = 80, -+ [0][0][2][0][RTW89_UKRAINE][4] = 60, -+ [0][0][2][0][RTW89_CHILE][4] = 64, -+ [0][0][2][0][RTW89_QATAR][4] = 60, - [0][0][2][0][RTW89_FCC][5] = 80, - [0][0][2][0][RTW89_ETSI][5] = 60, - [0][0][2][0][RTW89_MKK][5] = 78, -@@ -29482,6 +29856,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][2][0][RTW89_ACMA][5] = 60, - [0][0][2][0][RTW89_CN][5] = 58, - [0][0][2][0][RTW89_UK][5] = 60, -+ [0][0][2][0][RTW89_MEXICO][5] = 80, -+ [0][0][2][0][RTW89_UKRAINE][5] = 60, -+ [0][0][2][0][RTW89_CHILE][5] = 80, -+ [0][0][2][0][RTW89_QATAR][5] = 60, - [0][0][2][0][RTW89_FCC][6] = 80, - [0][0][2][0][RTW89_ETSI][6] = 60, - [0][0][2][0][RTW89_MKK][6] = 78, -@@ -29490,6 +29868,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][2][0][RTW89_ACMA][6] = 60, - [0][0][2][0][RTW89_CN][6] = 58, - [0][0][2][0][RTW89_UK][6] = 60, -+ [0][0][2][0][RTW89_MEXICO][6] = 80, -+ [0][0][2][0][RTW89_UKRAINE][6] = 60, -+ [0][0][2][0][RTW89_CHILE][6] = 68, -+ [0][0][2][0][RTW89_QATAR][6] = 60, - [0][0][2][0][RTW89_FCC][7] = 80, - [0][0][2][0][RTW89_ETSI][7] = 60, - [0][0][2][0][RTW89_MKK][7] = 78, -@@ -29498,6 +29880,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][2][0][RTW89_ACMA][7] = 60, - [0][0][2][0][RTW89_CN][7] = 58, - [0][0][2][0][RTW89_UK][7] = 60, -+ [0][0][2][0][RTW89_MEXICO][7] = 80, -+ [0][0][2][0][RTW89_UKRAINE][7] = 60, -+ [0][0][2][0][RTW89_CHILE][7] = 68, -+ [0][0][2][0][RTW89_QATAR][7] = 60, - [0][0][2][0][RTW89_FCC][8] = 78, - [0][0][2][0][RTW89_ETSI][8] = 60, - [0][0][2][0][RTW89_MKK][8] = 78, -@@ -29506,6 +29892,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][2][0][RTW89_ACMA][8] = 60, - [0][0][2][0][RTW89_CN][8] = 58, - [0][0][2][0][RTW89_UK][8] = 60, -+ [0][0][2][0][RTW89_MEXICO][8] = 78, -+ [0][0][2][0][RTW89_UKRAINE][8] = 60, -+ [0][0][2][0][RTW89_CHILE][8] = 68, -+ [0][0][2][0][RTW89_QATAR][8] = 60, - [0][0][2][0][RTW89_FCC][9] = 74, - [0][0][2][0][RTW89_ETSI][9] = 60, - [0][0][2][0][RTW89_MKK][9] = 78, -@@ -29514,6 +29904,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][2][0][RTW89_ACMA][9] = 60, - [0][0][2][0][RTW89_CN][9] = 58, - [0][0][2][0][RTW89_UK][9] = 60, -+ [0][0][2][0][RTW89_MEXICO][9] = 74, -+ [0][0][2][0][RTW89_UKRAINE][9] = 60, -+ [0][0][2][0][RTW89_CHILE][9] = 74, -+ [0][0][2][0][RTW89_QATAR][9] = 60, - [0][0][2][0][RTW89_FCC][10] = 62, - [0][0][2][0][RTW89_ETSI][10] = 60, - [0][0][2][0][RTW89_MKK][10] = 78, -@@ -29522,6 +29916,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][2][0][RTW89_ACMA][10] = 60, - [0][0][2][0][RTW89_CN][10] = 58, - [0][0][2][0][RTW89_UK][10] = 60, -+ [0][0][2][0][RTW89_MEXICO][10] = 62, -+ [0][0][2][0][RTW89_UKRAINE][10] = 60, -+ [0][0][2][0][RTW89_CHILE][10] = 62, -+ [0][0][2][0][RTW89_QATAR][10] = 60, - [0][0][2][0][RTW89_FCC][11] = 60, - [0][0][2][0][RTW89_ETSI][11] = 60, - [0][0][2][0][RTW89_MKK][11] = 78, -@@ -29530,6 +29928,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][2][0][RTW89_ACMA][11] = 60, - [0][0][2][0][RTW89_CN][11] = 58, - [0][0][2][0][RTW89_UK][11] = 60, -+ [0][0][2][0][RTW89_MEXICO][11] = 60, -+ [0][0][2][0][RTW89_UKRAINE][11] = 60, -+ [0][0][2][0][RTW89_CHILE][11] = 60, -+ [0][0][2][0][RTW89_QATAR][11] = 60, - [0][0][2][0][RTW89_FCC][12] = 38, - [0][0][2][0][RTW89_ETSI][12] = 60, - [0][0][2][0][RTW89_MKK][12] = 78, -@@ -29538,6 +29940,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][2][0][RTW89_ACMA][12] = 60, - [0][0][2][0][RTW89_CN][12] = 58, - [0][0][2][0][RTW89_UK][12] = 60, -+ [0][0][2][0][RTW89_MEXICO][12] = 38, -+ [0][0][2][0][RTW89_UKRAINE][12] = 60, -+ [0][0][2][0][RTW89_CHILE][12] = 38, -+ [0][0][2][0][RTW89_QATAR][12] = 60, - [0][0][2][0][RTW89_FCC][13] = 127, - [0][0][2][0][RTW89_ETSI][13] = 127, - [0][0][2][0][RTW89_MKK][13] = 127, -@@ -29546,6 +29952,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][0][2][0][RTW89_ACMA][13] = 127, - [0][0][2][0][RTW89_CN][13] = 127, - [0][0][2][0][RTW89_UK][13] = 127, -+ [0][0][2][0][RTW89_MEXICO][13] = 127, -+ [0][0][2][0][RTW89_UKRAINE][13] = 127, -+ [0][0][2][0][RTW89_CHILE][13] = 127, -+ [0][0][2][0][RTW89_QATAR][13] = 127, - [0][1][2][0][RTW89_FCC][0] = 64, - [0][1][2][0][RTW89_ETSI][0] = 48, - [0][1][2][0][RTW89_MKK][0] = 68, -@@ -29554,6 +29964,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][0][RTW89_ACMA][0] = 48, - [0][1][2][0][RTW89_CN][0] = 46, - [0][1][2][0][RTW89_UK][0] = 48, -+ [0][1][2][0][RTW89_MEXICO][0] = 64, -+ [0][1][2][0][RTW89_UKRAINE][0] = 48, -+ [0][1][2][0][RTW89_CHILE][0] = 64, -+ [0][1][2][0][RTW89_QATAR][0] = 48, - [0][1][2][0][RTW89_FCC][1] = 70, - [0][1][2][0][RTW89_ETSI][1] = 48, - [0][1][2][0][RTW89_MKK][1] = 68, -@@ -29562,6 +29976,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][0][RTW89_ACMA][1] = 48, - [0][1][2][0][RTW89_CN][1] = 46, - [0][1][2][0][RTW89_UK][1] = 48, -+ [0][1][2][0][RTW89_MEXICO][1] = 70, -+ [0][1][2][0][RTW89_UKRAINE][1] = 48, -+ [0][1][2][0][RTW89_CHILE][1] = 70, -+ [0][1][2][0][RTW89_QATAR][1] = 48, - [0][1][2][0][RTW89_FCC][2] = 74, - [0][1][2][0][RTW89_ETSI][2] = 48, - [0][1][2][0][RTW89_MKK][2] = 68, -@@ -29570,6 +29988,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][0][RTW89_ACMA][2] = 48, - [0][1][2][0][RTW89_CN][2] = 46, - [0][1][2][0][RTW89_UK][2] = 48, -+ [0][1][2][0][RTW89_MEXICO][2] = 74, -+ [0][1][2][0][RTW89_UKRAINE][2] = 48, -+ [0][1][2][0][RTW89_CHILE][2] = 56, -+ [0][1][2][0][RTW89_QATAR][2] = 48, - [0][1][2][0][RTW89_FCC][3] = 78, - [0][1][2][0][RTW89_ETSI][3] = 48, - [0][1][2][0][RTW89_MKK][3] = 68, -@@ -29578,6 +30000,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][0][RTW89_ACMA][3] = 48, - [0][1][2][0][RTW89_CN][3] = 46, - [0][1][2][0][RTW89_UK][3] = 48, -+ [0][1][2][0][RTW89_MEXICO][3] = 78, -+ [0][1][2][0][RTW89_UKRAINE][3] = 48, -+ [0][1][2][0][RTW89_CHILE][3] = 56, -+ [0][1][2][0][RTW89_QATAR][3] = 48, - [0][1][2][0][RTW89_FCC][4] = 80, - [0][1][2][0][RTW89_ETSI][4] = 48, - [0][1][2][0][RTW89_MKK][4] = 68, -@@ -29586,6 +30012,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][0][RTW89_ACMA][4] = 48, - [0][1][2][0][RTW89_CN][4] = 46, - [0][1][2][0][RTW89_UK][4] = 48, -+ [0][1][2][0][RTW89_MEXICO][4] = 80, -+ [0][1][2][0][RTW89_UKRAINE][4] = 48, -+ [0][1][2][0][RTW89_CHILE][4] = 56, -+ [0][1][2][0][RTW89_QATAR][4] = 48, - [0][1][2][0][RTW89_FCC][5] = 80, - [0][1][2][0][RTW89_ETSI][5] = 48, - [0][1][2][0][RTW89_MKK][5] = 68, -@@ -29594,6 +30024,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][0][RTW89_ACMA][5] = 48, - [0][1][2][0][RTW89_CN][5] = 46, - [0][1][2][0][RTW89_UK][5] = 48, -+ [0][1][2][0][RTW89_MEXICO][5] = 80, -+ [0][1][2][0][RTW89_UKRAINE][5] = 48, -+ [0][1][2][0][RTW89_CHILE][5] = 78, -+ [0][1][2][0][RTW89_QATAR][5] = 48, - [0][1][2][0][RTW89_FCC][6] = 80, - [0][1][2][0][RTW89_ETSI][6] = 48, - [0][1][2][0][RTW89_MKK][6] = 68, -@@ -29602,6 +30036,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][0][RTW89_ACMA][6] = 48, - [0][1][2][0][RTW89_CN][6] = 46, - [0][1][2][0][RTW89_UK][6] = 48, -+ [0][1][2][0][RTW89_MEXICO][6] = 80, -+ [0][1][2][0][RTW89_UKRAINE][6] = 48, -+ [0][1][2][0][RTW89_CHILE][6] = 54, -+ [0][1][2][0][RTW89_QATAR][6] = 48, - [0][1][2][0][RTW89_FCC][7] = 74, - [0][1][2][0][RTW89_ETSI][7] = 48, - [0][1][2][0][RTW89_MKK][7] = 68, -@@ -29610,6 +30048,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][0][RTW89_ACMA][7] = 48, - [0][1][2][0][RTW89_CN][7] = 46, - [0][1][2][0][RTW89_UK][7] = 48, -+ [0][1][2][0][RTW89_MEXICO][7] = 74, -+ [0][1][2][0][RTW89_UKRAINE][7] = 48, -+ [0][1][2][0][RTW89_CHILE][7] = 54, -+ [0][1][2][0][RTW89_QATAR][7] = 48, - [0][1][2][0][RTW89_FCC][8] = 70, - [0][1][2][0][RTW89_ETSI][8] = 48, - [0][1][2][0][RTW89_MKK][8] = 68, -@@ -29618,6 +30060,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][0][RTW89_ACMA][8] = 48, - [0][1][2][0][RTW89_CN][8] = 46, - [0][1][2][0][RTW89_UK][8] = 48, -+ [0][1][2][0][RTW89_MEXICO][8] = 70, -+ [0][1][2][0][RTW89_UKRAINE][8] = 48, -+ [0][1][2][0][RTW89_CHILE][8] = 54, -+ [0][1][2][0][RTW89_QATAR][8] = 48, - [0][1][2][0][RTW89_FCC][9] = 66, - [0][1][2][0][RTW89_ETSI][9] = 48, - [0][1][2][0][RTW89_MKK][9] = 68, -@@ -29626,6 +30072,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][0][RTW89_ACMA][9] = 48, - [0][1][2][0][RTW89_CN][9] = 46, - [0][1][2][0][RTW89_UK][9] = 48, -+ [0][1][2][0][RTW89_MEXICO][9] = 66, -+ [0][1][2][0][RTW89_UKRAINE][9] = 48, -+ [0][1][2][0][RTW89_CHILE][9] = 66, -+ [0][1][2][0][RTW89_QATAR][9] = 48, - [0][1][2][0][RTW89_FCC][10] = 58, - [0][1][2][0][RTW89_ETSI][10] = 48, - [0][1][2][0][RTW89_MKK][10] = 68, -@@ -29634,6 +30084,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][0][RTW89_ACMA][10] = 48, - [0][1][2][0][RTW89_CN][10] = 46, - [0][1][2][0][RTW89_UK][10] = 48, -+ [0][1][2][0][RTW89_MEXICO][10] = 58, -+ [0][1][2][0][RTW89_UKRAINE][10] = 48, -+ [0][1][2][0][RTW89_CHILE][10] = 58, -+ [0][1][2][0][RTW89_QATAR][10] = 48, - [0][1][2][0][RTW89_FCC][11] = 58, - [0][1][2][0][RTW89_ETSI][11] = 48, - [0][1][2][0][RTW89_MKK][11] = 68, -@@ -29642,6 +30096,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][0][RTW89_ACMA][11] = 48, - [0][1][2][0][RTW89_CN][11] = 46, - [0][1][2][0][RTW89_UK][11] = 48, -+ [0][1][2][0][RTW89_MEXICO][11] = 58, -+ [0][1][2][0][RTW89_UKRAINE][11] = 48, -+ [0][1][2][0][RTW89_CHILE][11] = 58, -+ [0][1][2][0][RTW89_QATAR][11] = 48, - [0][1][2][0][RTW89_FCC][12] = 16, - [0][1][2][0][RTW89_ETSI][12] = 48, - [0][1][2][0][RTW89_MKK][12] = 68, -@@ -29650,6 +30108,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][0][RTW89_ACMA][12] = 48, - [0][1][2][0][RTW89_CN][12] = 46, - [0][1][2][0][RTW89_UK][12] = 48, -+ [0][1][2][0][RTW89_MEXICO][12] = 16, -+ [0][1][2][0][RTW89_UKRAINE][12] = 48, -+ [0][1][2][0][RTW89_CHILE][12] = 16, -+ [0][1][2][0][RTW89_QATAR][12] = 48, - [0][1][2][0][RTW89_FCC][13] = 127, - [0][1][2][0][RTW89_ETSI][13] = 127, - [0][1][2][0][RTW89_MKK][13] = 127, -@@ -29658,6 +30120,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][0][RTW89_ACMA][13] = 127, - [0][1][2][0][RTW89_CN][13] = 127, - [0][1][2][0][RTW89_UK][13] = 127, -+ [0][1][2][0][RTW89_MEXICO][13] = 127, -+ [0][1][2][0][RTW89_UKRAINE][13] = 127, -+ [0][1][2][0][RTW89_CHILE][13] = 127, -+ [0][1][2][0][RTW89_QATAR][13] = 127, - [0][1][2][1][RTW89_FCC][0] = 64, - [0][1][2][1][RTW89_ETSI][0] = 36, - [0][1][2][1][RTW89_MKK][0] = 68, -@@ -29666,6 +30132,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][1][RTW89_ACMA][0] = 36, - [0][1][2][1][RTW89_CN][0] = 36, - [0][1][2][1][RTW89_UK][0] = 36, -+ [0][1][2][1][RTW89_MEXICO][0] = 64, -+ [0][1][2][1][RTW89_UKRAINE][0] = 36, -+ [0][1][2][1][RTW89_CHILE][0] = 64, -+ [0][1][2][1][RTW89_QATAR][0] = 36, - [0][1][2][1][RTW89_FCC][1] = 70, - [0][1][2][1][RTW89_ETSI][1] = 36, - [0][1][2][1][RTW89_MKK][1] = 68, -@@ -29674,6 +30144,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][1][RTW89_ACMA][1] = 36, - [0][1][2][1][RTW89_CN][1] = 34, - [0][1][2][1][RTW89_UK][1] = 36, -+ [0][1][2][1][RTW89_MEXICO][1] = 70, -+ [0][1][2][1][RTW89_UKRAINE][1] = 36, -+ [0][1][2][1][RTW89_CHILE][1] = 70, -+ [0][1][2][1][RTW89_QATAR][1] = 36, - [0][1][2][1][RTW89_FCC][2] = 74, - [0][1][2][1][RTW89_ETSI][2] = 36, - [0][1][2][1][RTW89_MKK][2] = 68, -@@ -29682,6 +30156,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][1][RTW89_ACMA][2] = 36, - [0][1][2][1][RTW89_CN][2] = 34, - [0][1][2][1][RTW89_UK][2] = 36, -+ [0][1][2][1][RTW89_MEXICO][2] = 74, -+ [0][1][2][1][RTW89_UKRAINE][2] = 36, -+ [0][1][2][1][RTW89_CHILE][2] = 44, -+ [0][1][2][1][RTW89_QATAR][2] = 36, - [0][1][2][1][RTW89_FCC][3] = 78, - [0][1][2][1][RTW89_ETSI][3] = 36, - [0][1][2][1][RTW89_MKK][3] = 68, -@@ -29690,6 +30168,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][1][RTW89_ACMA][3] = 36, - [0][1][2][1][RTW89_CN][3] = 34, - [0][1][2][1][RTW89_UK][3] = 36, -+ [0][1][2][1][RTW89_MEXICO][3] = 78, -+ [0][1][2][1][RTW89_UKRAINE][3] = 36, -+ [0][1][2][1][RTW89_CHILE][3] = 44, -+ [0][1][2][1][RTW89_QATAR][3] = 36, - [0][1][2][1][RTW89_FCC][4] = 80, - [0][1][2][1][RTW89_ETSI][4] = 36, - [0][1][2][1][RTW89_MKK][4] = 68, -@@ -29698,6 +30180,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][1][RTW89_ACMA][4] = 36, - [0][1][2][1][RTW89_CN][4] = 34, - [0][1][2][1][RTW89_UK][4] = 36, -+ [0][1][2][1][RTW89_MEXICO][4] = 80, -+ [0][1][2][1][RTW89_UKRAINE][4] = 36, -+ [0][1][2][1][RTW89_CHILE][4] = 44, -+ [0][1][2][1][RTW89_QATAR][4] = 36, - [0][1][2][1][RTW89_FCC][5] = 80, - [0][1][2][1][RTW89_ETSI][5] = 36, - [0][1][2][1][RTW89_MKK][5] = 68, -@@ -29706,6 +30192,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][1][RTW89_ACMA][5] = 36, - [0][1][2][1][RTW89_CN][5] = 34, - [0][1][2][1][RTW89_UK][5] = 36, -+ [0][1][2][1][RTW89_MEXICO][5] = 80, -+ [0][1][2][1][RTW89_UKRAINE][5] = 36, -+ [0][1][2][1][RTW89_CHILE][5] = 74, -+ [0][1][2][1][RTW89_QATAR][5] = 36, - [0][1][2][1][RTW89_FCC][6] = 80, - [0][1][2][1][RTW89_ETSI][6] = 36, - [0][1][2][1][RTW89_MKK][6] = 68, -@@ -29714,6 +30204,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][1][RTW89_ACMA][6] = 36, - [0][1][2][1][RTW89_CN][6] = 34, - [0][1][2][1][RTW89_UK][6] = 36, -+ [0][1][2][1][RTW89_MEXICO][6] = 80, -+ [0][1][2][1][RTW89_UKRAINE][6] = 36, -+ [0][1][2][1][RTW89_CHILE][6] = 42, -+ [0][1][2][1][RTW89_QATAR][6] = 36, - [0][1][2][1][RTW89_FCC][7] = 74, - [0][1][2][1][RTW89_ETSI][7] = 36, - [0][1][2][1][RTW89_MKK][7] = 68, -@@ -29722,6 +30216,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][1][RTW89_ACMA][7] = 36, - [0][1][2][1][RTW89_CN][7] = 34, - [0][1][2][1][RTW89_UK][7] = 36, -+ [0][1][2][1][RTW89_MEXICO][7] = 74, -+ [0][1][2][1][RTW89_UKRAINE][7] = 36, -+ [0][1][2][1][RTW89_CHILE][7] = 42, -+ [0][1][2][1][RTW89_QATAR][7] = 36, - [0][1][2][1][RTW89_FCC][8] = 70, - [0][1][2][1][RTW89_ETSI][8] = 36, - [0][1][2][1][RTW89_MKK][8] = 68, -@@ -29730,6 +30228,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][1][RTW89_ACMA][8] = 36, - [0][1][2][1][RTW89_CN][8] = 34, - [0][1][2][1][RTW89_UK][8] = 36, -+ [0][1][2][1][RTW89_MEXICO][8] = 70, -+ [0][1][2][1][RTW89_UKRAINE][8] = 36, -+ [0][1][2][1][RTW89_CHILE][8] = 42, -+ [0][1][2][1][RTW89_QATAR][8] = 36, - [0][1][2][1][RTW89_FCC][9] = 66, - [0][1][2][1][RTW89_ETSI][9] = 36, - [0][1][2][1][RTW89_MKK][9] = 68, -@@ -29738,6 +30240,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][1][RTW89_ACMA][9] = 36, - [0][1][2][1][RTW89_CN][9] = 34, - [0][1][2][1][RTW89_UK][9] = 36, -+ [0][1][2][1][RTW89_MEXICO][9] = 66, -+ [0][1][2][1][RTW89_UKRAINE][9] = 36, -+ [0][1][2][1][RTW89_CHILE][9] = 66, -+ [0][1][2][1][RTW89_QATAR][9] = 36, - [0][1][2][1][RTW89_FCC][10] = 58, - [0][1][2][1][RTW89_ETSI][10] = 36, - [0][1][2][1][RTW89_MKK][10] = 68, -@@ -29746,6 +30252,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][1][RTW89_ACMA][10] = 36, - [0][1][2][1][RTW89_CN][10] = 34, - [0][1][2][1][RTW89_UK][10] = 36, -+ [0][1][2][1][RTW89_MEXICO][10] = 58, -+ [0][1][2][1][RTW89_UKRAINE][10] = 36, -+ [0][1][2][1][RTW89_CHILE][10] = 58, -+ [0][1][2][1][RTW89_QATAR][10] = 36, - [0][1][2][1][RTW89_FCC][11] = 58, - [0][1][2][1][RTW89_ETSI][11] = 36, - [0][1][2][1][RTW89_MKK][11] = 68, -@@ -29754,6 +30264,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][1][RTW89_ACMA][11] = 36, - [0][1][2][1][RTW89_CN][11] = 34, - [0][1][2][1][RTW89_UK][11] = 36, -+ [0][1][2][1][RTW89_MEXICO][11] = 58, -+ [0][1][2][1][RTW89_UKRAINE][11] = 36, -+ [0][1][2][1][RTW89_CHILE][11] = 58, -+ [0][1][2][1][RTW89_QATAR][11] = 36, - [0][1][2][1][RTW89_FCC][12] = 16, - [0][1][2][1][RTW89_ETSI][12] = 36, - [0][1][2][1][RTW89_MKK][12] = 68, -@@ -29762,6 +30276,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][1][RTW89_ACMA][12] = 36, - [0][1][2][1][RTW89_CN][12] = 34, - [0][1][2][1][RTW89_UK][12] = 36, -+ [0][1][2][1][RTW89_MEXICO][12] = 16, -+ [0][1][2][1][RTW89_UKRAINE][12] = 36, -+ [0][1][2][1][RTW89_CHILE][12] = 16, -+ [0][1][2][1][RTW89_QATAR][12] = 36, - [0][1][2][1][RTW89_FCC][13] = 127, - [0][1][2][1][RTW89_ETSI][13] = 127, - [0][1][2][1][RTW89_MKK][13] = 127, -@@ -29770,6 +30288,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [0][1][2][1][RTW89_ACMA][13] = 127, - [0][1][2][1][RTW89_CN][13] = 127, - [0][1][2][1][RTW89_UK][13] = 127, -+ [0][1][2][1][RTW89_MEXICO][13] = 127, -+ [0][1][2][1][RTW89_UKRAINE][13] = 127, -+ [0][1][2][1][RTW89_CHILE][13] = 127, -+ [0][1][2][1][RTW89_QATAR][13] = 127, - [1][0][2][0][RTW89_FCC][0] = 127, - [1][0][2][0][RTW89_ETSI][0] = 127, - [1][0][2][0][RTW89_MKK][0] = 127, -@@ -29778,6 +30300,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][2][0][RTW89_ACMA][0] = 127, - [1][0][2][0][RTW89_CN][0] = 127, - [1][0][2][0][RTW89_UK][0] = 127, -+ [1][0][2][0][RTW89_MEXICO][0] = 127, -+ [1][0][2][0][RTW89_UKRAINE][0] = 127, -+ [1][0][2][0][RTW89_CHILE][0] = 127, -+ [1][0][2][0][RTW89_QATAR][0] = 127, - [1][0][2][0][RTW89_FCC][1] = 127, - [1][0][2][0][RTW89_ETSI][1] = 127, - [1][0][2][0][RTW89_MKK][1] = 127, -@@ -29786,6 +30312,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][2][0][RTW89_ACMA][1] = 127, - [1][0][2][0][RTW89_CN][1] = 127, - [1][0][2][0][RTW89_UK][1] = 127, -+ [1][0][2][0][RTW89_MEXICO][1] = 127, -+ [1][0][2][0][RTW89_UKRAINE][1] = 127, -+ [1][0][2][0][RTW89_CHILE][1] = 127, -+ [1][0][2][0][RTW89_QATAR][1] = 127, - [1][0][2][0][RTW89_FCC][2] = 64, - [1][0][2][0][RTW89_ETSI][2] = 60, - [1][0][2][0][RTW89_MKK][2] = 74, -@@ -29794,6 +30324,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][2][0][RTW89_ACMA][2] = 60, - [1][0][2][0][RTW89_CN][2] = 58, - [1][0][2][0][RTW89_UK][2] = 60, -+ [1][0][2][0][RTW89_MEXICO][2] = 64, -+ [1][0][2][0][RTW89_UKRAINE][2] = 60, -+ [1][0][2][0][RTW89_CHILE][2] = 64, -+ [1][0][2][0][RTW89_QATAR][2] = 60, - [1][0][2][0][RTW89_FCC][3] = 64, - [1][0][2][0][RTW89_ETSI][3] = 60, - [1][0][2][0][RTW89_MKK][3] = 74, -@@ -29802,6 +30336,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][2][0][RTW89_ACMA][3] = 60, - [1][0][2][0][RTW89_CN][3] = 58, - [1][0][2][0][RTW89_UK][3] = 60, -+ [1][0][2][0][RTW89_MEXICO][3] = 64, -+ [1][0][2][0][RTW89_UKRAINE][3] = 60, -+ [1][0][2][0][RTW89_CHILE][3] = 64, -+ [1][0][2][0][RTW89_QATAR][3] = 60, - [1][0][2][0][RTW89_FCC][4] = 68, - [1][0][2][0][RTW89_ETSI][4] = 60, - [1][0][2][0][RTW89_MKK][4] = 74, -@@ -29810,6 +30348,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][2][0][RTW89_ACMA][4] = 60, - [1][0][2][0][RTW89_CN][4] = 58, - [1][0][2][0][RTW89_UK][4] = 60, -+ [1][0][2][0][RTW89_MEXICO][4] = 68, -+ [1][0][2][0][RTW89_UKRAINE][4] = 60, -+ [1][0][2][0][RTW89_CHILE][4] = 68, -+ [1][0][2][0][RTW89_QATAR][4] = 60, - [1][0][2][0][RTW89_FCC][5] = 68, - [1][0][2][0][RTW89_ETSI][5] = 60, - [1][0][2][0][RTW89_MKK][5] = 74, -@@ -29818,6 +30360,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][2][0][RTW89_ACMA][5] = 60, - [1][0][2][0][RTW89_CN][5] = 58, - [1][0][2][0][RTW89_UK][5] = 60, -+ [1][0][2][0][RTW89_MEXICO][5] = 68, -+ [1][0][2][0][RTW89_UKRAINE][5] = 60, -+ [1][0][2][0][RTW89_CHILE][5] = 68, -+ [1][0][2][0][RTW89_QATAR][5] = 60, - [1][0][2][0][RTW89_FCC][6] = 66, - [1][0][2][0][RTW89_ETSI][6] = 60, - [1][0][2][0][RTW89_MKK][6] = 74, -@@ -29826,6 +30372,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][2][0][RTW89_ACMA][6] = 60, - [1][0][2][0][RTW89_CN][6] = 58, - [1][0][2][0][RTW89_UK][6] = 60, -+ [1][0][2][0][RTW89_MEXICO][6] = 66, -+ [1][0][2][0][RTW89_UKRAINE][6] = 60, -+ [1][0][2][0][RTW89_CHILE][6] = 66, -+ [1][0][2][0][RTW89_QATAR][6] = 60, - [1][0][2][0][RTW89_FCC][7] = 62, - [1][0][2][0][RTW89_ETSI][7] = 60, - [1][0][2][0][RTW89_MKK][7] = 74, -@@ -29834,6 +30384,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][2][0][RTW89_ACMA][7] = 60, - [1][0][2][0][RTW89_CN][7] = 58, - [1][0][2][0][RTW89_UK][7] = 60, -+ [1][0][2][0][RTW89_MEXICO][7] = 62, -+ [1][0][2][0][RTW89_UKRAINE][7] = 60, -+ [1][0][2][0][RTW89_CHILE][7] = 62, -+ [1][0][2][0][RTW89_QATAR][7] = 60, - [1][0][2][0][RTW89_FCC][8] = 62, - [1][0][2][0][RTW89_ETSI][8] = 60, - [1][0][2][0][RTW89_MKK][8] = 74, -@@ -29842,6 +30396,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][2][0][RTW89_ACMA][8] = 60, - [1][0][2][0][RTW89_CN][8] = 58, - [1][0][2][0][RTW89_UK][8] = 60, -+ [1][0][2][0][RTW89_MEXICO][8] = 62, -+ [1][0][2][0][RTW89_UKRAINE][8] = 60, -+ [1][0][2][0][RTW89_CHILE][8] = 62, -+ [1][0][2][0][RTW89_QATAR][8] = 60, - [1][0][2][0][RTW89_FCC][9] = 60, - [1][0][2][0][RTW89_ETSI][9] = 60, - [1][0][2][0][RTW89_MKK][9] = 74, -@@ -29850,6 +30408,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][2][0][RTW89_ACMA][9] = 60, - [1][0][2][0][RTW89_CN][9] = 58, - [1][0][2][0][RTW89_UK][9] = 60, -+ [1][0][2][0][RTW89_MEXICO][9] = 60, -+ [1][0][2][0][RTW89_UKRAINE][9] = 60, -+ [1][0][2][0][RTW89_CHILE][9] = 60, -+ [1][0][2][0][RTW89_QATAR][9] = 60, - [1][0][2][0][RTW89_FCC][10] = 56, - [1][0][2][0][RTW89_ETSI][10] = 60, - [1][0][2][0][RTW89_MKK][10] = 74, -@@ -29858,6 +30420,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][2][0][RTW89_ACMA][10] = 60, - [1][0][2][0][RTW89_CN][10] = 58, - [1][0][2][0][RTW89_UK][10] = 60, -+ [1][0][2][0][RTW89_MEXICO][10] = 56, -+ [1][0][2][0][RTW89_UKRAINE][10] = 60, -+ [1][0][2][0][RTW89_CHILE][10] = 56, -+ [1][0][2][0][RTW89_QATAR][10] = 60, - [1][0][2][0][RTW89_FCC][11] = 127, - [1][0][2][0][RTW89_ETSI][11] = 127, - [1][0][2][0][RTW89_MKK][11] = 127, -@@ -29866,6 +30432,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][2][0][RTW89_ACMA][11] = 127, - [1][0][2][0][RTW89_CN][11] = 127, - [1][0][2][0][RTW89_UK][11] = 127, -+ [1][0][2][0][RTW89_MEXICO][11] = 127, -+ [1][0][2][0][RTW89_UKRAINE][11] = 127, -+ [1][0][2][0][RTW89_CHILE][11] = 127, -+ [1][0][2][0][RTW89_QATAR][11] = 127, - [1][0][2][0][RTW89_FCC][12] = 127, - [1][0][2][0][RTW89_ETSI][12] = 127, - [1][0][2][0][RTW89_MKK][12] = 127, -@@ -29874,6 +30444,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][2][0][RTW89_ACMA][12] = 127, - [1][0][2][0][RTW89_CN][12] = 127, - [1][0][2][0][RTW89_UK][12] = 127, -+ [1][0][2][0][RTW89_MEXICO][12] = 127, -+ [1][0][2][0][RTW89_UKRAINE][12] = 127, -+ [1][0][2][0][RTW89_CHILE][12] = 127, -+ [1][0][2][0][RTW89_QATAR][12] = 127, - [1][0][2][0][RTW89_FCC][13] = 127, - [1][0][2][0][RTW89_ETSI][13] = 127, - [1][0][2][0][RTW89_MKK][13] = 127, -@@ -29882,6 +30456,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][0][2][0][RTW89_ACMA][13] = 127, - [1][0][2][0][RTW89_CN][13] = 127, - [1][0][2][0][RTW89_UK][13] = 127, -+ [1][0][2][0][RTW89_MEXICO][13] = 127, -+ [1][0][2][0][RTW89_UKRAINE][13] = 127, -+ [1][0][2][0][RTW89_CHILE][13] = 127, -+ [1][0][2][0][RTW89_QATAR][13] = 127, - [1][1][2][0][RTW89_FCC][0] = 127, - [1][1][2][0][RTW89_ETSI][0] = 127, - [1][1][2][0][RTW89_MKK][0] = 127, -@@ -29890,6 +30468,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][0][RTW89_ACMA][0] = 127, - [1][1][2][0][RTW89_CN][0] = 127, - [1][1][2][0][RTW89_UK][0] = 127, -+ [1][1][2][0][RTW89_MEXICO][0] = 127, -+ [1][1][2][0][RTW89_UKRAINE][0] = 127, -+ [1][1][2][0][RTW89_CHILE][0] = 127, -+ [1][1][2][0][RTW89_QATAR][0] = 127, - [1][1][2][0][RTW89_FCC][1] = 127, - [1][1][2][0][RTW89_ETSI][1] = 127, - [1][1][2][0][RTW89_MKK][1] = 127, -@@ -29898,6 +30480,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][0][RTW89_ACMA][1] = 127, - [1][1][2][0][RTW89_CN][1] = 127, - [1][1][2][0][RTW89_UK][1] = 127, -+ [1][1][2][0][RTW89_MEXICO][1] = 127, -+ [1][1][2][0][RTW89_UKRAINE][1] = 127, -+ [1][1][2][0][RTW89_CHILE][1] = 127, -+ [1][1][2][0][RTW89_QATAR][1] = 127, - [1][1][2][0][RTW89_FCC][2] = 60, - [1][1][2][0][RTW89_ETSI][2] = 48, - [1][1][2][0][RTW89_MKK][2] = 68, -@@ -29906,6 +30492,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][0][RTW89_ACMA][2] = 48, - [1][1][2][0][RTW89_CN][2] = 34, - [1][1][2][0][RTW89_UK][2] = 48, -+ [1][1][2][0][RTW89_MEXICO][2] = 60, -+ [1][1][2][0][RTW89_UKRAINE][2] = 48, -+ [1][1][2][0][RTW89_CHILE][2] = 60, -+ [1][1][2][0][RTW89_QATAR][2] = 48, - [1][1][2][0][RTW89_FCC][3] = 60, - [1][1][2][0][RTW89_ETSI][3] = 48, - [1][1][2][0][RTW89_MKK][3] = 68, -@@ -29914,6 +30504,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][0][RTW89_ACMA][3] = 48, - [1][1][2][0][RTW89_CN][3] = 34, - [1][1][2][0][RTW89_UK][3] = 48, -+ [1][1][2][0][RTW89_MEXICO][3] = 60, -+ [1][1][2][0][RTW89_UKRAINE][3] = 48, -+ [1][1][2][0][RTW89_CHILE][3] = 56, -+ [1][1][2][0][RTW89_QATAR][3] = 48, - [1][1][2][0][RTW89_FCC][4] = 60, - [1][1][2][0][RTW89_ETSI][4] = 48, - [1][1][2][0][RTW89_MKK][4] = 68, -@@ -29922,6 +30516,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][0][RTW89_ACMA][4] = 48, - [1][1][2][0][RTW89_CN][4] = 34, - [1][1][2][0][RTW89_UK][4] = 48, -+ [1][1][2][0][RTW89_MEXICO][4] = 60, -+ [1][1][2][0][RTW89_UKRAINE][4] = 48, -+ [1][1][2][0][RTW89_CHILE][4] = 56, -+ [1][1][2][0][RTW89_QATAR][4] = 48, - [1][1][2][0][RTW89_FCC][5] = 60, - [1][1][2][0][RTW89_ETSI][5] = 48, - [1][1][2][0][RTW89_MKK][5] = 68, -@@ -29930,6 +30528,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][0][RTW89_ACMA][5] = 48, - [1][1][2][0][RTW89_CN][5] = 34, - [1][1][2][0][RTW89_UK][5] = 48, -+ [1][1][2][0][RTW89_MEXICO][5] = 60, -+ [1][1][2][0][RTW89_UKRAINE][5] = 48, -+ [1][1][2][0][RTW89_CHILE][5] = 60, -+ [1][1][2][0][RTW89_QATAR][5] = 48, - [1][1][2][0][RTW89_FCC][6] = 58, - [1][1][2][0][RTW89_ETSI][6] = 48, - [1][1][2][0][RTW89_MKK][6] = 68, -@@ -29938,6 +30540,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][0][RTW89_ACMA][6] = 48, - [1][1][2][0][RTW89_CN][6] = 34, - [1][1][2][0][RTW89_UK][6] = 48, -+ [1][1][2][0][RTW89_MEXICO][6] = 58, -+ [1][1][2][0][RTW89_UKRAINE][6] = 48, -+ [1][1][2][0][RTW89_CHILE][6] = 52, -+ [1][1][2][0][RTW89_QATAR][6] = 48, - [1][1][2][0][RTW89_FCC][7] = 54, - [1][1][2][0][RTW89_ETSI][7] = 48, - [1][1][2][0][RTW89_MKK][7] = 68, -@@ -29946,6 +30552,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][0][RTW89_ACMA][7] = 48, - [1][1][2][0][RTW89_CN][7] = 34, - [1][1][2][0][RTW89_UK][7] = 48, -+ [1][1][2][0][RTW89_MEXICO][7] = 54, -+ [1][1][2][0][RTW89_UKRAINE][7] = 48, -+ [1][1][2][0][RTW89_CHILE][7] = 52, -+ [1][1][2][0][RTW89_QATAR][7] = 48, - [1][1][2][0][RTW89_FCC][8] = 54, - [1][1][2][0][RTW89_ETSI][8] = 48, - [1][1][2][0][RTW89_MKK][8] = 68, -@@ -29954,6 +30564,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][0][RTW89_ACMA][8] = 48, - [1][1][2][0][RTW89_CN][8] = 34, - [1][1][2][0][RTW89_UK][8] = 48, -+ [1][1][2][0][RTW89_MEXICO][8] = 54, -+ [1][1][2][0][RTW89_UKRAINE][8] = 48, -+ [1][1][2][0][RTW89_CHILE][8] = 54, -+ [1][1][2][0][RTW89_QATAR][8] = 48, - [1][1][2][0][RTW89_FCC][9] = 54, - [1][1][2][0][RTW89_ETSI][9] = 48, - [1][1][2][0][RTW89_MKK][9] = 68, -@@ -29962,6 +30576,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][0][RTW89_ACMA][9] = 48, - [1][1][2][0][RTW89_CN][9] = 34, - [1][1][2][0][RTW89_UK][9] = 48, -+ [1][1][2][0][RTW89_MEXICO][9] = 54, -+ [1][1][2][0][RTW89_UKRAINE][9] = 48, -+ [1][1][2][0][RTW89_CHILE][9] = 54, -+ [1][1][2][0][RTW89_QATAR][9] = 48, - [1][1][2][0][RTW89_FCC][10] = 46, - [1][1][2][0][RTW89_ETSI][10] = 48, - [1][1][2][0][RTW89_MKK][10] = 68, -@@ -29970,6 +30588,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][0][RTW89_ACMA][10] = 48, - [1][1][2][0][RTW89_CN][10] = 34, - [1][1][2][0][RTW89_UK][10] = 48, -+ [1][1][2][0][RTW89_MEXICO][10] = 46, -+ [1][1][2][0][RTW89_UKRAINE][10] = 48, -+ [1][1][2][0][RTW89_CHILE][10] = 46, -+ [1][1][2][0][RTW89_QATAR][10] = 48, - [1][1][2][0][RTW89_FCC][11] = 127, - [1][1][2][0][RTW89_ETSI][11] = 127, - [1][1][2][0][RTW89_MKK][11] = 127, -@@ -29978,6 +30600,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][0][RTW89_ACMA][11] = 127, - [1][1][2][0][RTW89_CN][11] = 127, - [1][1][2][0][RTW89_UK][11] = 127, -+ [1][1][2][0][RTW89_MEXICO][11] = 127, -+ [1][1][2][0][RTW89_UKRAINE][11] = 127, -+ [1][1][2][0][RTW89_CHILE][11] = 127, -+ [1][1][2][0][RTW89_QATAR][11] = 127, - [1][1][2][0][RTW89_FCC][12] = 127, - [1][1][2][0][RTW89_ETSI][12] = 127, - [1][1][2][0][RTW89_MKK][12] = 127, -@@ -29986,6 +30612,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][0][RTW89_ACMA][12] = 127, - [1][1][2][0][RTW89_CN][12] = 127, - [1][1][2][0][RTW89_UK][12] = 127, -+ [1][1][2][0][RTW89_MEXICO][12] = 127, -+ [1][1][2][0][RTW89_UKRAINE][12] = 127, -+ [1][1][2][0][RTW89_CHILE][12] = 127, -+ [1][1][2][0][RTW89_QATAR][12] = 127, - [1][1][2][0][RTW89_FCC][13] = 127, - [1][1][2][0][RTW89_ETSI][13] = 127, - [1][1][2][0][RTW89_MKK][13] = 127, -@@ -29994,6 +30624,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][0][RTW89_ACMA][13] = 127, - [1][1][2][0][RTW89_CN][13] = 127, - [1][1][2][0][RTW89_UK][13] = 127, -+ [1][1][2][0][RTW89_MEXICO][13] = 127, -+ [1][1][2][0][RTW89_UKRAINE][13] = 127, -+ [1][1][2][0][RTW89_CHILE][13] = 127, -+ [1][1][2][0][RTW89_QATAR][13] = 127, - [1][1][2][1][RTW89_FCC][0] = 127, - [1][1][2][1][RTW89_ETSI][0] = 127, - [1][1][2][1][RTW89_MKK][0] = 127, -@@ -30002,6 +30636,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_ACMA][0] = 127, - [1][1][2][1][RTW89_CN][0] = 127, - [1][1][2][1][RTW89_UK][0] = 127, -+ [1][1][2][1][RTW89_MEXICO][0] = 127, -+ [1][1][2][1][RTW89_UKRAINE][0] = 127, -+ [1][1][2][1][RTW89_CHILE][0] = 127, -+ [1][1][2][1][RTW89_QATAR][0] = 127, - [1][1][2][1][RTW89_FCC][1] = 127, - [1][1][2][1][RTW89_ETSI][1] = 127, - [1][1][2][1][RTW89_MKK][1] = 127, -@@ -30010,6 +30648,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_ACMA][1] = 127, - [1][1][2][1][RTW89_CN][1] = 127, - [1][1][2][1][RTW89_UK][1] = 127, -+ [1][1][2][1][RTW89_MEXICO][1] = 127, -+ [1][1][2][1][RTW89_UKRAINE][1] = 127, -+ [1][1][2][1][RTW89_CHILE][1] = 127, -+ [1][1][2][1][RTW89_QATAR][1] = 127, - [1][1][2][1][RTW89_FCC][2] = 60, - [1][1][2][1][RTW89_ETSI][2] = 36, - [1][1][2][1][RTW89_MKK][2] = 68, -@@ -30018,6 +30660,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_ACMA][2] = 36, - [1][1][2][1][RTW89_CN][2] = 34, - [1][1][2][1][RTW89_UK][2] = 36, -+ [1][1][2][1][RTW89_MEXICO][2] = 60, -+ [1][1][2][1][RTW89_UKRAINE][2] = 36, -+ [1][1][2][1][RTW89_CHILE][2] = 60, -+ [1][1][2][1][RTW89_QATAR][2] = 36, - [1][1][2][1][RTW89_FCC][3] = 60, - [1][1][2][1][RTW89_ETSI][3] = 36, - [1][1][2][1][RTW89_MKK][3] = 68, -@@ -30026,6 +30672,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_ACMA][3] = 36, - [1][1][2][1][RTW89_CN][3] = 34, - [1][1][2][1][RTW89_UK][3] = 36, -+ [1][1][2][1][RTW89_MEXICO][3] = 60, -+ [1][1][2][1][RTW89_UKRAINE][3] = 36, -+ [1][1][2][1][RTW89_CHILE][3] = 44, -+ [1][1][2][1][RTW89_QATAR][3] = 36, - [1][1][2][1][RTW89_FCC][4] = 60, - [1][1][2][1][RTW89_ETSI][4] = 36, - [1][1][2][1][RTW89_MKK][4] = 68, -@@ -30034,6 +30684,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_ACMA][4] = 36, - [1][1][2][1][RTW89_CN][4] = 34, - [1][1][2][1][RTW89_UK][4] = 36, -+ [1][1][2][1][RTW89_MEXICO][4] = 60, -+ [1][1][2][1][RTW89_UKRAINE][4] = 36, -+ [1][1][2][1][RTW89_CHILE][4] = 44, -+ [1][1][2][1][RTW89_QATAR][4] = 36, - [1][1][2][1][RTW89_FCC][5] = 60, - [1][1][2][1][RTW89_ETSI][5] = 36, - [1][1][2][1][RTW89_MKK][5] = 68, -@@ -30042,6 +30696,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_ACMA][5] = 36, - [1][1][2][1][RTW89_CN][5] = 34, - [1][1][2][1][RTW89_UK][5] = 36, -+ [1][1][2][1][RTW89_MEXICO][5] = 60, -+ [1][1][2][1][RTW89_UKRAINE][5] = 36, -+ [1][1][2][1][RTW89_CHILE][5] = 60, -+ [1][1][2][1][RTW89_QATAR][5] = 36, - [1][1][2][1][RTW89_FCC][6] = 58, - [1][1][2][1][RTW89_ETSI][6] = 36, - [1][1][2][1][RTW89_MKK][6] = 68, -@@ -30050,6 +30708,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_ACMA][6] = 36, - [1][1][2][1][RTW89_CN][6] = 34, - [1][1][2][1][RTW89_UK][6] = 36, -+ [1][1][2][1][RTW89_MEXICO][6] = 58, -+ [1][1][2][1][RTW89_UKRAINE][6] = 36, -+ [1][1][2][1][RTW89_CHILE][6] = 40, -+ [1][1][2][1][RTW89_QATAR][6] = 36, - [1][1][2][1][RTW89_FCC][7] = 54, - [1][1][2][1][RTW89_ETSI][7] = 36, - [1][1][2][1][RTW89_MKK][7] = 68, -@@ -30058,6 +30720,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_ACMA][7] = 36, - [1][1][2][1][RTW89_CN][7] = 34, - [1][1][2][1][RTW89_UK][7] = 36, -+ [1][1][2][1][RTW89_MEXICO][7] = 54, -+ [1][1][2][1][RTW89_UKRAINE][7] = 36, -+ [1][1][2][1][RTW89_CHILE][7] = 40, -+ [1][1][2][1][RTW89_QATAR][7] = 36, - [1][1][2][1][RTW89_FCC][8] = 54, - [1][1][2][1][RTW89_ETSI][8] = 36, - [1][1][2][1][RTW89_MKK][8] = 68, -@@ -30066,6 +30732,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_ACMA][8] = 36, - [1][1][2][1][RTW89_CN][8] = 34, - [1][1][2][1][RTW89_UK][8] = 36, -+ [1][1][2][1][RTW89_MEXICO][8] = 54, -+ [1][1][2][1][RTW89_UKRAINE][8] = 36, -+ [1][1][2][1][RTW89_CHILE][8] = 54, -+ [1][1][2][1][RTW89_QATAR][8] = 36, - [1][1][2][1][RTW89_FCC][9] = 54, - [1][1][2][1][RTW89_ETSI][9] = 36, - [1][1][2][1][RTW89_MKK][9] = 68, -@@ -30074,6 +30744,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_ACMA][9] = 36, - [1][1][2][1][RTW89_CN][9] = 34, - [1][1][2][1][RTW89_UK][9] = 36, -+ [1][1][2][1][RTW89_MEXICO][9] = 54, -+ [1][1][2][1][RTW89_UKRAINE][9] = 36, -+ [1][1][2][1][RTW89_CHILE][9] = 54, -+ [1][1][2][1][RTW89_QATAR][9] = 36, - [1][1][2][1][RTW89_FCC][10] = 46, - [1][1][2][1][RTW89_ETSI][10] = 36, - [1][1][2][1][RTW89_MKK][10] = 68, -@@ -30082,6 +30756,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_ACMA][10] = 36, - [1][1][2][1][RTW89_CN][10] = 36, - [1][1][2][1][RTW89_UK][10] = 36, -+ [1][1][2][1][RTW89_MEXICO][10] = 46, -+ [1][1][2][1][RTW89_UKRAINE][10] = 36, -+ [1][1][2][1][RTW89_CHILE][10] = 46, -+ [1][1][2][1][RTW89_QATAR][10] = 36, - [1][1][2][1][RTW89_FCC][11] = 127, - [1][1][2][1][RTW89_ETSI][11] = 127, - [1][1][2][1][RTW89_MKK][11] = 127, -@@ -30090,6 +30768,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_ACMA][11] = 127, - [1][1][2][1][RTW89_CN][11] = 127, - [1][1][2][1][RTW89_UK][11] = 127, -+ [1][1][2][1][RTW89_MEXICO][11] = 127, -+ [1][1][2][1][RTW89_UKRAINE][11] = 127, -+ [1][1][2][1][RTW89_CHILE][11] = 127, -+ [1][1][2][1][RTW89_QATAR][11] = 127, - [1][1][2][1][RTW89_FCC][12] = 127, - [1][1][2][1][RTW89_ETSI][12] = 127, - [1][1][2][1][RTW89_MKK][12] = 127, -@@ -30098,6 +30780,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_ACMA][12] = 127, - [1][1][2][1][RTW89_CN][12] = 127, - [1][1][2][1][RTW89_UK][12] = 127, -+ [1][1][2][1][RTW89_MEXICO][12] = 127, -+ [1][1][2][1][RTW89_UKRAINE][12] = 127, -+ [1][1][2][1][RTW89_CHILE][12] = 127, -+ [1][1][2][1][RTW89_QATAR][12] = 127, - [1][1][2][1][RTW89_FCC][13] = 127, - [1][1][2][1][RTW89_ETSI][13] = 127, - [1][1][2][1][RTW89_MKK][13] = 127, -@@ -30106,6 +30792,10 @@ const s8 rtw89_8852c_txpwr_lmt_2g[RTW89_ - [1][1][2][1][RTW89_ACMA][13] = 127, - [1][1][2][1][RTW89_CN][13] = 127, - [1][1][2][1][RTW89_UK][13] = 127, -+ [1][1][2][1][RTW89_MEXICO][13] = 127, -+ [1][1][2][1][RTW89_UKRAINE][13] = 127, -+ [1][1][2][1][RTW89_CHILE][13] = 127, -+ [1][1][2][1][RTW89_QATAR][13] = 127, - }; - - static -@@ -30120,17 +30810,17 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_WW][10] = 50, - [0][0][1][0][RTW89_WW][12] = 50, - [0][0][1][0][RTW89_WW][14] = 50, -- [0][0][1][0][RTW89_WW][15] = 66, -- [0][0][1][0][RTW89_WW][17] = 66, -- [0][0][1][0][RTW89_WW][19] = 66, -- [0][0][1][0][RTW89_WW][21] = 66, -- [0][0][1][0][RTW89_WW][23] = 66, -- [0][0][1][0][RTW89_WW][25] = 66, -- [0][0][1][0][RTW89_WW][27] = 66, -- [0][0][1][0][RTW89_WW][29] = 66, -- [0][0][1][0][RTW89_WW][31] = 66, -- [0][0][1][0][RTW89_WW][33] = 66, -- [0][0][1][0][RTW89_WW][35] = 60, -+ [0][0][1][0][RTW89_WW][15] = 54, -+ [0][0][1][0][RTW89_WW][17] = 54, -+ [0][0][1][0][RTW89_WW][19] = 54, -+ [0][0][1][0][RTW89_WW][21] = 54, -+ [0][0][1][0][RTW89_WW][23] = 54, -+ [0][0][1][0][RTW89_WW][25] = 54, -+ [0][0][1][0][RTW89_WW][27] = 54, -+ [0][0][1][0][RTW89_WW][29] = 54, -+ [0][0][1][0][RTW89_WW][31] = 54, -+ [0][0][1][0][RTW89_WW][33] = 54, -+ [0][0][1][0][RTW89_WW][35] = 54, - [0][0][1][0][RTW89_WW][37] = 64, - [0][0][1][0][RTW89_WW][38] = 30, - [0][0][1][0][RTW89_WW][40] = 30, -@@ -30144,21 +30834,21 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_WW][2] = 34, - [0][1][1][0][RTW89_WW][4] = 34, - [0][1][1][0][RTW89_WW][6] = 36, -- [0][1][1][0][RTW89_WW][8] = 46, -- [0][1][1][0][RTW89_WW][10] = 46, -- [0][1][1][0][RTW89_WW][12] = 46, -- [0][1][1][0][RTW89_WW][14] = 46, -- [0][1][1][0][RTW89_WW][15] = 54, -- [0][1][1][0][RTW89_WW][17] = 54, -- [0][1][1][0][RTW89_WW][19] = 54, -- [0][1][1][0][RTW89_WW][21] = 54, -- [0][1][1][0][RTW89_WW][23] = 54, -- [0][1][1][0][RTW89_WW][25] = 54, -- [0][1][1][0][RTW89_WW][27] = 54, -- [0][1][1][0][RTW89_WW][29] = 54, -- [0][1][1][0][RTW89_WW][31] = 54, -- [0][1][1][0][RTW89_WW][33] = 54, -- [0][1][1][0][RTW89_WW][35] = 52, -+ [0][1][1][0][RTW89_WW][8] = 42, -+ [0][1][1][0][RTW89_WW][10] = 42, -+ [0][1][1][0][RTW89_WW][12] = 42, -+ [0][1][1][0][RTW89_WW][14] = 42, -+ [0][1][1][0][RTW89_WW][15] = 42, -+ [0][1][1][0][RTW89_WW][17] = 42, -+ [0][1][1][0][RTW89_WW][19] = 42, -+ [0][1][1][0][RTW89_WW][21] = 42, -+ [0][1][1][0][RTW89_WW][23] = 42, -+ [0][1][1][0][RTW89_WW][25] = 42, -+ [0][1][1][0][RTW89_WW][27] = 42, -+ [0][1][1][0][RTW89_WW][29] = 42, -+ [0][1][1][0][RTW89_WW][31] = 42, -+ [0][1][1][0][RTW89_WW][33] = 42, -+ [0][1][1][0][RTW89_WW][35] = 42, - [0][1][1][0][RTW89_WW][37] = 52, - [0][1][1][0][RTW89_WW][38] = 18, - [0][1][1][0][RTW89_WW][40] = 18, -@@ -30176,17 +30866,17 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_WW][10] = 52, - [0][0][2][0][RTW89_WW][12] = 52, - [0][0][2][0][RTW89_WW][14] = 52, -- [0][0][2][0][RTW89_WW][15] = 66, -- [0][0][2][0][RTW89_WW][17] = 66, -- [0][0][2][0][RTW89_WW][19] = 66, -- [0][0][2][0][RTW89_WW][21] = 66, -- [0][0][2][0][RTW89_WW][23] = 66, -- [0][0][2][0][RTW89_WW][25] = 66, -- [0][0][2][0][RTW89_WW][27] = 66, -- [0][0][2][0][RTW89_WW][29] = 66, -- [0][0][2][0][RTW89_WW][31] = 66, -- [0][0][2][0][RTW89_WW][33] = 66, -- [0][0][2][0][RTW89_WW][35] = 56, -+ [0][0][2][0][RTW89_WW][15] = 54, -+ [0][0][2][0][RTW89_WW][17] = 54, -+ [0][0][2][0][RTW89_WW][19] = 54, -+ [0][0][2][0][RTW89_WW][21] = 54, -+ [0][0][2][0][RTW89_WW][23] = 54, -+ [0][0][2][0][RTW89_WW][25] = 54, -+ [0][0][2][0][RTW89_WW][27] = 54, -+ [0][0][2][0][RTW89_WW][29] = 54, -+ [0][0][2][0][RTW89_WW][31] = 54, -+ [0][0][2][0][RTW89_WW][33] = 54, -+ [0][0][2][0][RTW89_WW][35] = 54, - [0][0][2][0][RTW89_WW][37] = 64, - [0][0][2][0][RTW89_WW][38] = 30, - [0][0][2][0][RTW89_WW][40] = 30, -@@ -30204,17 +30894,17 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_WW][10] = 40, - [0][1][2][0][RTW89_WW][12] = 40, - [0][1][2][0][RTW89_WW][14] = 40, -- [0][1][2][0][RTW89_WW][15] = 54, -- [0][1][2][0][RTW89_WW][17] = 54, -- [0][1][2][0][RTW89_WW][19] = 54, -- [0][1][2][0][RTW89_WW][21] = 54, -- [0][1][2][0][RTW89_WW][23] = 54, -- [0][1][2][0][RTW89_WW][25] = 54, -- [0][1][2][0][RTW89_WW][27] = 54, -- [0][1][2][0][RTW89_WW][29] = 54, -- [0][1][2][0][RTW89_WW][31] = 54, -- [0][1][2][0][RTW89_WW][33] = 54, -- [0][1][2][0][RTW89_WW][35] = 46, -+ [0][1][2][0][RTW89_WW][15] = 42, -+ [0][1][2][0][RTW89_WW][17] = 42, -+ [0][1][2][0][RTW89_WW][19] = 42, -+ [0][1][2][0][RTW89_WW][21] = 42, -+ [0][1][2][0][RTW89_WW][23] = 42, -+ [0][1][2][0][RTW89_WW][25] = 42, -+ [0][1][2][0][RTW89_WW][27] = 42, -+ [0][1][2][0][RTW89_WW][29] = 42, -+ [0][1][2][0][RTW89_WW][31] = 42, -+ [0][1][2][0][RTW89_WW][33] = 42, -+ [0][1][2][0][RTW89_WW][35] = 42, - [0][1][2][0][RTW89_WW][37] = 52, - [0][1][2][0][RTW89_WW][38] = 18, - [0][1][2][0][RTW89_WW][40] = 18, -@@ -30224,25 +30914,25 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_WW][48] = 48, - [0][1][2][0][RTW89_WW][50] = 50, - [0][1][2][0][RTW89_WW][52] = 48, -- [0][1][2][1][RTW89_WW][0] = 36, -- [0][1][2][1][RTW89_WW][2] = 36, -- [0][1][2][1][RTW89_WW][4] = 36, -- [0][1][2][1][RTW89_WW][6] = 36, -- [0][1][2][1][RTW89_WW][8] = 36, -- [0][1][2][1][RTW89_WW][10] = 36, -- [0][1][2][1][RTW89_WW][12] = 36, -- [0][1][2][1][RTW89_WW][14] = 36, -- [0][1][2][1][RTW89_WW][15] = 40, -- [0][1][2][1][RTW89_WW][17] = 40, -- [0][1][2][1][RTW89_WW][19] = 40, -- [0][1][2][1][RTW89_WW][21] = 40, -- [0][1][2][1][RTW89_WW][23] = 40, -- [0][1][2][1][RTW89_WW][25] = 40, -- [0][1][2][1][RTW89_WW][27] = 40, -- [0][1][2][1][RTW89_WW][29] = 40, -- [0][1][2][1][RTW89_WW][31] = 40, -- [0][1][2][1][RTW89_WW][33] = 40, -- [0][1][2][1][RTW89_WW][35] = 40, -+ [0][1][2][1][RTW89_WW][0] = 30, -+ [0][1][2][1][RTW89_WW][2] = 30, -+ [0][1][2][1][RTW89_WW][4] = 30, -+ [0][1][2][1][RTW89_WW][6] = 30, -+ [0][1][2][1][RTW89_WW][8] = 30, -+ [0][1][2][1][RTW89_WW][10] = 30, -+ [0][1][2][1][RTW89_WW][12] = 30, -+ [0][1][2][1][RTW89_WW][14] = 30, -+ [0][1][2][1][RTW89_WW][15] = 30, -+ [0][1][2][1][RTW89_WW][17] = 30, -+ [0][1][2][1][RTW89_WW][19] = 30, -+ [0][1][2][1][RTW89_WW][21] = 30, -+ [0][1][2][1][RTW89_WW][23] = 30, -+ [0][1][2][1][RTW89_WW][25] = 30, -+ [0][1][2][1][RTW89_WW][27] = 30, -+ [0][1][2][1][RTW89_WW][29] = 30, -+ [0][1][2][1][RTW89_WW][31] = 30, -+ [0][1][2][1][RTW89_WW][33] = 30, -+ [0][1][2][1][RTW89_WW][35] = 30, - [0][1][2][1][RTW89_WW][37] = 40, - [0][1][2][1][RTW89_WW][38] = 6, - [0][1][2][1][RTW89_WW][40] = 6, -@@ -30256,11 +30946,11 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_WW][5] = 54, - [1][0][2][0][RTW89_WW][9] = 54, - [1][0][2][0][RTW89_WW][13] = 52, -- [1][0][2][0][RTW89_WW][16] = 56, -- [1][0][2][0][RTW89_WW][20] = 56, -- [1][0][2][0][RTW89_WW][24] = 56, -- [1][0][2][0][RTW89_WW][28] = 66, -- [1][0][2][0][RTW89_WW][32] = 62, -+ [1][0][2][0][RTW89_WW][16] = 54, -+ [1][0][2][0][RTW89_WW][20] = 54, -+ [1][0][2][0][RTW89_WW][24] = 54, -+ [1][0][2][0][RTW89_WW][28] = 54, -+ [1][0][2][0][RTW89_WW][32] = 54, - [1][0][2][0][RTW89_WW][36] = 64, - [1][0][2][0][RTW89_WW][39] = 30, - [1][0][2][0][RTW89_WW][43] = 30, -@@ -30270,25 +30960,25 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][0][RTW89_WW][5] = 42, - [1][1][2][0][RTW89_WW][9] = 42, - [1][1][2][0][RTW89_WW][13] = 42, -- [1][1][2][0][RTW89_WW][16] = 54, -- [1][1][2][0][RTW89_WW][20] = 54, -- [1][1][2][0][RTW89_WW][24] = 54, -- [1][1][2][0][RTW89_WW][28] = 54, -- [1][1][2][0][RTW89_WW][32] = 54, -+ [1][1][2][0][RTW89_WW][16] = 42, -+ [1][1][2][0][RTW89_WW][20] = 42, -+ [1][1][2][0][RTW89_WW][24] = 42, -+ [1][1][2][0][RTW89_WW][28] = 42, -+ [1][1][2][0][RTW89_WW][32] = 42, - [1][1][2][0][RTW89_WW][36] = 52, - [1][1][2][0][RTW89_WW][39] = 18, - [1][1][2][0][RTW89_WW][43] = 18, - [1][1][2][0][RTW89_WW][47] = 62, - [1][1][2][0][RTW89_WW][51] = 60, -- [1][1][2][1][RTW89_WW][1] = 40, -- [1][1][2][1][RTW89_WW][5] = 40, -- [1][1][2][1][RTW89_WW][9] = 40, -- [1][1][2][1][RTW89_WW][13] = 40, -- [1][1][2][1][RTW89_WW][16] = 40, -- [1][1][2][1][RTW89_WW][20] = 40, -- [1][1][2][1][RTW89_WW][24] = 40, -- [1][1][2][1][RTW89_WW][28] = 40, -- [1][1][2][1][RTW89_WW][32] = 40, -+ [1][1][2][1][RTW89_WW][1] = 30, -+ [1][1][2][1][RTW89_WW][5] = 30, -+ [1][1][2][1][RTW89_WW][9] = 30, -+ [1][1][2][1][RTW89_WW][13] = 30, -+ [1][1][2][1][RTW89_WW][16] = 30, -+ [1][1][2][1][RTW89_WW][20] = 30, -+ [1][1][2][1][RTW89_WW][24] = 30, -+ [1][1][2][1][RTW89_WW][28] = 30, -+ [1][1][2][1][RTW89_WW][32] = 30, - [1][1][2][1][RTW89_WW][36] = 40, - [1][1][2][1][RTW89_WW][39] = 6, - [1][1][2][1][RTW89_WW][43] = 6, -@@ -30296,22 +30986,22 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_WW][51] = 60, - [2][0][2][0][RTW89_WW][3] = 54, - [2][0][2][0][RTW89_WW][11] = 50, -- [2][0][2][0][RTW89_WW][18] = 56, -- [2][0][2][0][RTW89_WW][26] = 60, -+ [2][0][2][0][RTW89_WW][18] = 54, -+ [2][0][2][0][RTW89_WW][26] = 54, - [2][0][2][0][RTW89_WW][34] = 60, - [2][0][2][0][RTW89_WW][41] = 30, - [2][0][2][0][RTW89_WW][49] = 62, -- [2][1][2][0][RTW89_WW][3] = 46, -+ [2][1][2][0][RTW89_WW][3] = 42, - [2][1][2][0][RTW89_WW][11] = 38, -- [2][1][2][0][RTW89_WW][18] = 50, -- [2][1][2][0][RTW89_WW][26] = 52, -+ [2][1][2][0][RTW89_WW][18] = 42, -+ [2][1][2][0][RTW89_WW][26] = 42, - [2][1][2][0][RTW89_WW][34] = 52, - [2][1][2][0][RTW89_WW][41] = 18, - [2][1][2][0][RTW89_WW][49] = 62, -- [2][1][2][1][RTW89_WW][3] = 40, -- [2][1][2][1][RTW89_WW][11] = 38, -- [2][1][2][1][RTW89_WW][18] = 40, -- [2][1][2][1][RTW89_WW][26] = 42, -+ [2][1][2][1][RTW89_WW][3] = 30, -+ [2][1][2][1][RTW89_WW][11] = 30, -+ [2][1][2][1][RTW89_WW][18] = 30, -+ [2][1][2][1][RTW89_WW][26] = 30, - [2][1][2][1][RTW89_WW][34] = 40, - [2][1][2][1][RTW89_WW][41] = 6, - [2][1][2][1][RTW89_WW][49] = 62, -@@ -30328,34 +31018,50 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ETSI][0] = 66, - [0][0][1][0][RTW89_MKK][0] = 66, - [0][0][1][0][RTW89_IC][0] = 60, -- [0][0][1][0][RTW89_KCC][0] = 52, -+ [0][0][1][0][RTW89_KCC][0] = 62, - [0][0][1][0][RTW89_ACMA][0] = 66, - [0][0][1][0][RTW89_CN][0] = 50, - [0][0][1][0][RTW89_UK][0] = 66, -+ [0][0][1][0][RTW89_MEXICO][0] = 62, -+ [0][0][1][0][RTW89_UKRAINE][0] = 54, -+ [0][0][1][0][RTW89_CHILE][0] = 70, -+ [0][0][1][0][RTW89_QATAR][0] = 66, - [0][0][1][0][RTW89_FCC][2] = 72, - [0][0][1][0][RTW89_ETSI][2] = 66, - [0][0][1][0][RTW89_MKK][2] = 66, - [0][0][1][0][RTW89_IC][2] = 60, -- [0][0][1][0][RTW89_KCC][2] = 52, -+ [0][0][1][0][RTW89_KCC][2] = 62, - [0][0][1][0][RTW89_ACMA][2] = 66, - [0][0][1][0][RTW89_CN][2] = 50, - [0][0][1][0][RTW89_UK][2] = 66, -+ [0][0][1][0][RTW89_MEXICO][2] = 62, -+ [0][0][1][0][RTW89_UKRAINE][2] = 54, -+ [0][0][1][0][RTW89_CHILE][2] = 70, -+ [0][0][1][0][RTW89_QATAR][2] = 66, - [0][0][1][0][RTW89_FCC][4] = 72, - [0][0][1][0][RTW89_ETSI][4] = 66, - [0][0][1][0][RTW89_MKK][4] = 66, - [0][0][1][0][RTW89_IC][4] = 60, -- [0][0][1][0][RTW89_KCC][4] = 52, -+ [0][0][1][0][RTW89_KCC][4] = 62, - [0][0][1][0][RTW89_ACMA][4] = 66, - [0][0][1][0][RTW89_CN][4] = 50, - [0][0][1][0][RTW89_UK][4] = 66, -+ [0][0][1][0][RTW89_MEXICO][4] = 62, -+ [0][0][1][0][RTW89_UKRAINE][4] = 54, -+ [0][0][1][0][RTW89_CHILE][4] = 70, -+ [0][0][1][0][RTW89_QATAR][4] = 66, - [0][0][1][0][RTW89_FCC][6] = 72, - [0][0][1][0][RTW89_ETSI][6] = 66, - [0][0][1][0][RTW89_MKK][6] = 66, - [0][0][1][0][RTW89_IC][6] = 58, -- [0][0][1][0][RTW89_KCC][6] = 62, -+ [0][0][1][0][RTW89_KCC][6] = 52, - [0][0][1][0][RTW89_ACMA][6] = 66, - [0][0][1][0][RTW89_CN][6] = 50, - [0][0][1][0][RTW89_UK][6] = 66, -+ [0][0][1][0][RTW89_MEXICO][6] = 62, -+ [0][0][1][0][RTW89_UKRAINE][6] = 54, -+ [0][0][1][0][RTW89_CHILE][6] = 70, -+ [0][0][1][0][RTW89_QATAR][6] = 66, - [0][0][1][0][RTW89_FCC][8] = 72, - [0][0][1][0][RTW89_ETSI][8] = 66, - [0][0][1][0][RTW89_MKK][8] = 66, -@@ -30364,6 +31070,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][8] = 66, - [0][0][1][0][RTW89_CN][8] = 50, - [0][0][1][0][RTW89_UK][8] = 66, -+ [0][0][1][0][RTW89_MEXICO][8] = 72, -+ [0][0][1][0][RTW89_UKRAINE][8] = 54, -+ [0][0][1][0][RTW89_CHILE][8] = 70, -+ [0][0][1][0][RTW89_QATAR][8] = 66, - [0][0][1][0][RTW89_FCC][10] = 72, - [0][0][1][0][RTW89_ETSI][10] = 66, - [0][0][1][0][RTW89_MKK][10] = 66, -@@ -30372,6 +31082,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][10] = 66, - [0][0][1][0][RTW89_CN][10] = 50, - [0][0][1][0][RTW89_UK][10] = 66, -+ [0][0][1][0][RTW89_MEXICO][10] = 72, -+ [0][0][1][0][RTW89_UKRAINE][10] = 54, -+ [0][0][1][0][RTW89_CHILE][10] = 70, -+ [0][0][1][0][RTW89_QATAR][10] = 66, - [0][0][1][0][RTW89_FCC][12] = 72, - [0][0][1][0][RTW89_ETSI][12] = 66, - [0][0][1][0][RTW89_MKK][12] = 66, -@@ -30380,6 +31094,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][12] = 66, - [0][0][1][0][RTW89_CN][12] = 50, - [0][0][1][0][RTW89_UK][12] = 66, -+ [0][0][1][0][RTW89_MEXICO][12] = 72, -+ [0][0][1][0][RTW89_UKRAINE][12] = 54, -+ [0][0][1][0][RTW89_CHILE][12] = 70, -+ [0][0][1][0][RTW89_QATAR][12] = 66, - [0][0][1][0][RTW89_FCC][14] = 70, - [0][0][1][0][RTW89_ETSI][14] = 66, - [0][0][1][0][RTW89_MKK][14] = 66, -@@ -30388,6 +31106,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][14] = 66, - [0][0][1][0][RTW89_CN][14] = 50, - [0][0][1][0][RTW89_UK][14] = 66, -+ [0][0][1][0][RTW89_MEXICO][14] = 70, -+ [0][0][1][0][RTW89_UKRAINE][14] = 54, -+ [0][0][1][0][RTW89_CHILE][14] = 68, -+ [0][0][1][0][RTW89_QATAR][14] = 66, - [0][0][1][0][RTW89_FCC][15] = 72, - [0][0][1][0][RTW89_ETSI][15] = 66, - [0][0][1][0][RTW89_MKK][15] = 70, -@@ -30396,6 +31118,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][15] = 66, - [0][0][1][0][RTW89_CN][15] = 127, - [0][0][1][0][RTW89_UK][15] = 66, -+ [0][0][1][0][RTW89_MEXICO][15] = 72, -+ [0][0][1][0][RTW89_UKRAINE][15] = 54, -+ [0][0][1][0][RTW89_CHILE][15] = 70, -+ [0][0][1][0][RTW89_QATAR][15] = 66, - [0][0][1][0][RTW89_FCC][17] = 72, - [0][0][1][0][RTW89_ETSI][17] = 66, - [0][0][1][0][RTW89_MKK][17] = 70, -@@ -30404,6 +31130,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][17] = 66, - [0][0][1][0][RTW89_CN][17] = 127, - [0][0][1][0][RTW89_UK][17] = 66, -+ [0][0][1][0][RTW89_MEXICO][17] = 72, -+ [0][0][1][0][RTW89_UKRAINE][17] = 54, -+ [0][0][1][0][RTW89_CHILE][17] = 70, -+ [0][0][1][0][RTW89_QATAR][17] = 66, - [0][0][1][0][RTW89_FCC][19] = 72, - [0][0][1][0][RTW89_ETSI][19] = 66, - [0][0][1][0][RTW89_MKK][19] = 70, -@@ -30412,6 +31142,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][19] = 66, - [0][0][1][0][RTW89_CN][19] = 127, - [0][0][1][0][RTW89_UK][19] = 66, -+ [0][0][1][0][RTW89_MEXICO][19] = 72, -+ [0][0][1][0][RTW89_UKRAINE][19] = 54, -+ [0][0][1][0][RTW89_CHILE][19] = 70, -+ [0][0][1][0][RTW89_QATAR][19] = 66, - [0][0][1][0][RTW89_FCC][21] = 72, - [0][0][1][0][RTW89_ETSI][21] = 66, - [0][0][1][0][RTW89_MKK][21] = 70, -@@ -30420,6 +31154,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][21] = 66, - [0][0][1][0][RTW89_CN][21] = 127, - [0][0][1][0][RTW89_UK][21] = 66, -+ [0][0][1][0][RTW89_MEXICO][21] = 72, -+ [0][0][1][0][RTW89_UKRAINE][21] = 54, -+ [0][0][1][0][RTW89_CHILE][21] = 70, -+ [0][0][1][0][RTW89_QATAR][21] = 66, - [0][0][1][0][RTW89_FCC][23] = 72, - [0][0][1][0][RTW89_ETSI][23] = 66, - [0][0][1][0][RTW89_MKK][23] = 70, -@@ -30428,6 +31166,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][23] = 66, - [0][0][1][0][RTW89_CN][23] = 127, - [0][0][1][0][RTW89_UK][23] = 66, -+ [0][0][1][0][RTW89_MEXICO][23] = 72, -+ [0][0][1][0][RTW89_UKRAINE][23] = 54, -+ [0][0][1][0][RTW89_CHILE][23] = 70, -+ [0][0][1][0][RTW89_QATAR][23] = 66, - [0][0][1][0][RTW89_FCC][25] = 72, - [0][0][1][0][RTW89_ETSI][25] = 66, - [0][0][1][0][RTW89_MKK][25] = 70, -@@ -30436,6 +31178,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][25] = 127, - [0][0][1][0][RTW89_CN][25] = 127, - [0][0][1][0][RTW89_UK][25] = 66, -+ [0][0][1][0][RTW89_MEXICO][25] = 72, -+ [0][0][1][0][RTW89_UKRAINE][25] = 54, -+ [0][0][1][0][RTW89_CHILE][25] = 70, -+ [0][0][1][0][RTW89_QATAR][25] = 66, - [0][0][1][0][RTW89_FCC][27] = 72, - [0][0][1][0][RTW89_ETSI][27] = 66, - [0][0][1][0][RTW89_MKK][27] = 70, -@@ -30444,6 +31190,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][27] = 127, - [0][0][1][0][RTW89_CN][27] = 127, - [0][0][1][0][RTW89_UK][27] = 66, -+ [0][0][1][0][RTW89_MEXICO][27] = 72, -+ [0][0][1][0][RTW89_UKRAINE][27] = 54, -+ [0][0][1][0][RTW89_CHILE][27] = 58, -+ [0][0][1][0][RTW89_QATAR][27] = 66, - [0][0][1][0][RTW89_FCC][29] = 72, - [0][0][1][0][RTW89_ETSI][29] = 66, - [0][0][1][0][RTW89_MKK][29] = 70, -@@ -30452,6 +31202,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][29] = 127, - [0][0][1][0][RTW89_CN][29] = 127, - [0][0][1][0][RTW89_UK][29] = 66, -+ [0][0][1][0][RTW89_MEXICO][29] = 72, -+ [0][0][1][0][RTW89_UKRAINE][29] = 54, -+ [0][0][1][0][RTW89_CHILE][29] = 58, -+ [0][0][1][0][RTW89_QATAR][29] = 66, - [0][0][1][0][RTW89_FCC][31] = 72, - [0][0][1][0][RTW89_ETSI][31] = 66, - [0][0][1][0][RTW89_MKK][31] = 70, -@@ -30460,6 +31214,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][31] = 66, - [0][0][1][0][RTW89_CN][31] = 127, - [0][0][1][0][RTW89_UK][31] = 66, -+ [0][0][1][0][RTW89_MEXICO][31] = 72, -+ [0][0][1][0][RTW89_UKRAINE][31] = 54, -+ [0][0][1][0][RTW89_CHILE][31] = 58, -+ [0][0][1][0][RTW89_QATAR][31] = 66, - [0][0][1][0][RTW89_FCC][33] = 72, - [0][0][1][0][RTW89_ETSI][33] = 66, - [0][0][1][0][RTW89_MKK][33] = 70, -@@ -30468,6 +31226,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][33] = 66, - [0][0][1][0][RTW89_CN][33] = 127, - [0][0][1][0][RTW89_UK][33] = 66, -+ [0][0][1][0][RTW89_MEXICO][33] = 72, -+ [0][0][1][0][RTW89_UKRAINE][33] = 54, -+ [0][0][1][0][RTW89_CHILE][33] = 58, -+ [0][0][1][0][RTW89_QATAR][33] = 66, - [0][0][1][0][RTW89_FCC][35] = 60, - [0][0][1][0][RTW89_ETSI][35] = 66, - [0][0][1][0][RTW89_MKK][35] = 70, -@@ -30476,6 +31238,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][35] = 66, - [0][0][1][0][RTW89_CN][35] = 127, - [0][0][1][0][RTW89_UK][35] = 66, -+ [0][0][1][0][RTW89_MEXICO][35] = 60, -+ [0][0][1][0][RTW89_UKRAINE][35] = 54, -+ [0][0][1][0][RTW89_CHILE][35] = 58, -+ [0][0][1][0][RTW89_QATAR][35] = 66, - [0][0][1][0][RTW89_FCC][37] = 72, - [0][0][1][0][RTW89_ETSI][37] = 127, - [0][0][1][0][RTW89_MKK][37] = 70, -@@ -30484,6 +31250,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][37] = 70, - [0][0][1][0][RTW89_CN][37] = 127, - [0][0][1][0][RTW89_UK][37] = 64, -+ [0][0][1][0][RTW89_MEXICO][37] = 72, -+ [0][0][1][0][RTW89_UKRAINE][37] = 127, -+ [0][0][1][0][RTW89_CHILE][37] = 70, -+ [0][0][1][0][RTW89_QATAR][37] = 127, - [0][0][1][0][RTW89_FCC][38] = 72, - [0][0][1][0][RTW89_ETSI][38] = 30, - [0][0][1][0][RTW89_MKK][38] = 127, -@@ -30492,6 +31262,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][38] = 70, - [0][0][1][0][RTW89_CN][38] = 68, - [0][0][1][0][RTW89_UK][38] = 64, -+ [0][0][1][0][RTW89_MEXICO][38] = 72, -+ [0][0][1][0][RTW89_UKRAINE][38] = 30, -+ [0][0][1][0][RTW89_CHILE][38] = 70, -+ [0][0][1][0][RTW89_QATAR][38] = 30, - [0][0][1][0][RTW89_FCC][40] = 72, - [0][0][1][0][RTW89_ETSI][40] = 30, - [0][0][1][0][RTW89_MKK][40] = 127, -@@ -30500,6 +31274,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][40] = 70, - [0][0][1][0][RTW89_CN][40] = 68, - [0][0][1][0][RTW89_UK][40] = 64, -+ [0][0][1][0][RTW89_MEXICO][40] = 72, -+ [0][0][1][0][RTW89_UKRAINE][40] = 30, -+ [0][0][1][0][RTW89_CHILE][40] = 70, -+ [0][0][1][0][RTW89_QATAR][40] = 30, - [0][0][1][0][RTW89_FCC][42] = 72, - [0][0][1][0][RTW89_ETSI][42] = 30, - [0][0][1][0][RTW89_MKK][42] = 127, -@@ -30508,6 +31286,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][42] = 70, - [0][0][1][0][RTW89_CN][42] = 68, - [0][0][1][0][RTW89_UK][42] = 64, -+ [0][0][1][0][RTW89_MEXICO][42] = 72, -+ [0][0][1][0][RTW89_UKRAINE][42] = 30, -+ [0][0][1][0][RTW89_CHILE][42] = 70, -+ [0][0][1][0][RTW89_QATAR][42] = 30, - [0][0][1][0][RTW89_FCC][44] = 72, - [0][0][1][0][RTW89_ETSI][44] = 30, - [0][0][1][0][RTW89_MKK][44] = 127, -@@ -30516,6 +31298,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][44] = 70, - [0][0][1][0][RTW89_CN][44] = 68, - [0][0][1][0][RTW89_UK][44] = 64, -+ [0][0][1][0][RTW89_MEXICO][44] = 72, -+ [0][0][1][0][RTW89_UKRAINE][44] = 30, -+ [0][0][1][0][RTW89_CHILE][44] = 70, -+ [0][0][1][0][RTW89_QATAR][44] = 30, - [0][0][1][0][RTW89_FCC][46] = 72, - [0][0][1][0][RTW89_ETSI][46] = 30, - [0][0][1][0][RTW89_MKK][46] = 127, -@@ -30524,6 +31310,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][46] = 70, - [0][0][1][0][RTW89_CN][46] = 68, - [0][0][1][0][RTW89_UK][46] = 64, -+ [0][0][1][0][RTW89_MEXICO][46] = 72, -+ [0][0][1][0][RTW89_UKRAINE][46] = 30, -+ [0][0][1][0][RTW89_CHILE][46] = 70, -+ [0][0][1][0][RTW89_QATAR][46] = 30, - [0][0][1][0][RTW89_FCC][48] = 72, - [0][0][1][0][RTW89_ETSI][48] = 127, - [0][0][1][0][RTW89_MKK][48] = 127, -@@ -30532,6 +31322,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][48] = 127, - [0][0][1][0][RTW89_CN][48] = 127, - [0][0][1][0][RTW89_UK][48] = 127, -+ [0][0][1][0][RTW89_MEXICO][48] = 127, -+ [0][0][1][0][RTW89_UKRAINE][48] = 127, -+ [0][0][1][0][RTW89_CHILE][48] = 127, -+ [0][0][1][0][RTW89_QATAR][48] = 127, - [0][0][1][0][RTW89_FCC][50] = 72, - [0][0][1][0][RTW89_ETSI][50] = 127, - [0][0][1][0][RTW89_MKK][50] = 127, -@@ -30540,6 +31334,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][50] = 127, - [0][0][1][0][RTW89_CN][50] = 127, - [0][0][1][0][RTW89_UK][50] = 127, -+ [0][0][1][0][RTW89_MEXICO][50] = 127, -+ [0][0][1][0][RTW89_UKRAINE][50] = 127, -+ [0][0][1][0][RTW89_CHILE][50] = 127, -+ [0][0][1][0][RTW89_QATAR][50] = 127, - [0][0][1][0][RTW89_FCC][52] = 72, - [0][0][1][0][RTW89_ETSI][52] = 127, - [0][0][1][0][RTW89_MKK][52] = 127, -@@ -30548,38 +31346,58 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][52] = 127, - [0][0][1][0][RTW89_CN][52] = 127, - [0][0][1][0][RTW89_UK][52] = 127, -+ [0][0][1][0][RTW89_MEXICO][52] = 127, -+ [0][0][1][0][RTW89_UKRAINE][52] = 127, -+ [0][0][1][0][RTW89_CHILE][52] = 127, -+ [0][0][1][0][RTW89_QATAR][52] = 127, - [0][1][1][0][RTW89_FCC][0] = 60, - [0][1][1][0][RTW89_ETSI][0] = 54, - [0][1][1][0][RTW89_MKK][0] = 54, - [0][1][1][0][RTW89_IC][0] = 34, -- [0][1][1][0][RTW89_KCC][0] = 40, -+ [0][1][1][0][RTW89_KCC][0] = 60, - [0][1][1][0][RTW89_ACMA][0] = 54, - [0][1][1][0][RTW89_CN][0] = 46, - [0][1][1][0][RTW89_UK][0] = 54, -+ [0][1][1][0][RTW89_MEXICO][0] = 50, -+ [0][1][1][0][RTW89_UKRAINE][0] = 42, -+ [0][1][1][0][RTW89_CHILE][0] = 60, -+ [0][1][1][0][RTW89_QATAR][0] = 54, - [0][1][1][0][RTW89_FCC][2] = 60, - [0][1][1][0][RTW89_ETSI][2] = 54, - [0][1][1][0][RTW89_MKK][2] = 54, - [0][1][1][0][RTW89_IC][2] = 34, -- [0][1][1][0][RTW89_KCC][2] = 40, -+ [0][1][1][0][RTW89_KCC][2] = 60, - [0][1][1][0][RTW89_ACMA][2] = 54, - [0][1][1][0][RTW89_CN][2] = 46, - [0][1][1][0][RTW89_UK][2] = 54, -+ [0][1][1][0][RTW89_MEXICO][2] = 50, -+ [0][1][1][0][RTW89_UKRAINE][2] = 42, -+ [0][1][1][0][RTW89_CHILE][2] = 60, -+ [0][1][1][0][RTW89_QATAR][2] = 54, - [0][1][1][0][RTW89_FCC][4] = 60, - [0][1][1][0][RTW89_ETSI][4] = 54, - [0][1][1][0][RTW89_MKK][4] = 54, - [0][1][1][0][RTW89_IC][4] = 34, -- [0][1][1][0][RTW89_KCC][4] = 40, -+ [0][1][1][0][RTW89_KCC][4] = 60, - [0][1][1][0][RTW89_ACMA][4] = 54, - [0][1][1][0][RTW89_CN][4] = 46, - [0][1][1][0][RTW89_UK][4] = 54, -+ [0][1][1][0][RTW89_MEXICO][4] = 50, -+ [0][1][1][0][RTW89_UKRAINE][4] = 42, -+ [0][1][1][0][RTW89_CHILE][4] = 60, -+ [0][1][1][0][RTW89_QATAR][4] = 54, - [0][1][1][0][RTW89_FCC][6] = 60, - [0][1][1][0][RTW89_ETSI][6] = 54, - [0][1][1][0][RTW89_MKK][6] = 54, - [0][1][1][0][RTW89_IC][6] = 36, -- [0][1][1][0][RTW89_KCC][6] = 60, -+ [0][1][1][0][RTW89_KCC][6] = 40, - [0][1][1][0][RTW89_ACMA][6] = 54, - [0][1][1][0][RTW89_CN][6] = 46, - [0][1][1][0][RTW89_UK][6] = 54, -+ [0][1][1][0][RTW89_MEXICO][6] = 50, -+ [0][1][1][0][RTW89_UKRAINE][6] = 42, -+ [0][1][1][0][RTW89_CHILE][6] = 60, -+ [0][1][1][0][RTW89_QATAR][6] = 54, - [0][1][1][0][RTW89_FCC][8] = 62, - [0][1][1][0][RTW89_ETSI][8] = 54, - [0][1][1][0][RTW89_MKK][8] = 52, -@@ -30588,6 +31406,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][8] = 54, - [0][1][1][0][RTW89_CN][8] = 46, - [0][1][1][0][RTW89_UK][8] = 54, -+ [0][1][1][0][RTW89_MEXICO][8] = 62, -+ [0][1][1][0][RTW89_UKRAINE][8] = 42, -+ [0][1][1][0][RTW89_CHILE][8] = 62, -+ [0][1][1][0][RTW89_QATAR][8] = 54, - [0][1][1][0][RTW89_FCC][10] = 62, - [0][1][1][0][RTW89_ETSI][10] = 54, - [0][1][1][0][RTW89_MKK][10] = 54, -@@ -30596,6 +31418,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][10] = 54, - [0][1][1][0][RTW89_CN][10] = 46, - [0][1][1][0][RTW89_UK][10] = 54, -+ [0][1][1][0][RTW89_MEXICO][10] = 62, -+ [0][1][1][0][RTW89_UKRAINE][10] = 42, -+ [0][1][1][0][RTW89_CHILE][10] = 62, -+ [0][1][1][0][RTW89_QATAR][10] = 54, - [0][1][1][0][RTW89_FCC][12] = 62, - [0][1][1][0][RTW89_ETSI][12] = 54, - [0][1][1][0][RTW89_MKK][12] = 54, -@@ -30604,6 +31430,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][12] = 54, - [0][1][1][0][RTW89_CN][12] = 46, - [0][1][1][0][RTW89_UK][12] = 54, -+ [0][1][1][0][RTW89_MEXICO][12] = 62, -+ [0][1][1][0][RTW89_UKRAINE][12] = 42, -+ [0][1][1][0][RTW89_CHILE][12] = 62, -+ [0][1][1][0][RTW89_QATAR][12] = 54, - [0][1][1][0][RTW89_FCC][14] = 60, - [0][1][1][0][RTW89_ETSI][14] = 54, - [0][1][1][0][RTW89_MKK][14] = 54, -@@ -30612,6 +31442,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][14] = 54, - [0][1][1][0][RTW89_CN][14] = 46, - [0][1][1][0][RTW89_UK][14] = 54, -+ [0][1][1][0][RTW89_MEXICO][14] = 60, -+ [0][1][1][0][RTW89_UKRAINE][14] = 42, -+ [0][1][1][0][RTW89_CHILE][14] = 60, -+ [0][1][1][0][RTW89_QATAR][14] = 54, - [0][1][1][0][RTW89_FCC][15] = 60, - [0][1][1][0][RTW89_ETSI][15] = 54, - [0][1][1][0][RTW89_MKK][15] = 70, -@@ -30620,6 +31454,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][15] = 54, - [0][1][1][0][RTW89_CN][15] = 127, - [0][1][1][0][RTW89_UK][15] = 54, -+ [0][1][1][0][RTW89_MEXICO][15] = 60, -+ [0][1][1][0][RTW89_UKRAINE][15] = 42, -+ [0][1][1][0][RTW89_CHILE][15] = 60, -+ [0][1][1][0][RTW89_QATAR][15] = 54, - [0][1][1][0][RTW89_FCC][17] = 60, - [0][1][1][0][RTW89_ETSI][17] = 54, - [0][1][1][0][RTW89_MKK][17] = 70, -@@ -30628,6 +31466,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][17] = 54, - [0][1][1][0][RTW89_CN][17] = 127, - [0][1][1][0][RTW89_UK][17] = 54, -+ [0][1][1][0][RTW89_MEXICO][17] = 60, -+ [0][1][1][0][RTW89_UKRAINE][17] = 42, -+ [0][1][1][0][RTW89_CHILE][17] = 60, -+ [0][1][1][0][RTW89_QATAR][17] = 54, - [0][1][1][0][RTW89_FCC][19] = 60, - [0][1][1][0][RTW89_ETSI][19] = 54, - [0][1][1][0][RTW89_MKK][19] = 70, -@@ -30636,6 +31478,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][19] = 54, - [0][1][1][0][RTW89_CN][19] = 127, - [0][1][1][0][RTW89_UK][19] = 54, -+ [0][1][1][0][RTW89_MEXICO][19] = 60, -+ [0][1][1][0][RTW89_UKRAINE][19] = 42, -+ [0][1][1][0][RTW89_CHILE][19] = 60, -+ [0][1][1][0][RTW89_QATAR][19] = 54, - [0][1][1][0][RTW89_FCC][21] = 60, - [0][1][1][0][RTW89_ETSI][21] = 54, - [0][1][1][0][RTW89_MKK][21] = 70, -@@ -30644,6 +31490,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][21] = 54, - [0][1][1][0][RTW89_CN][21] = 127, - [0][1][1][0][RTW89_UK][21] = 54, -+ [0][1][1][0][RTW89_MEXICO][21] = 60, -+ [0][1][1][0][RTW89_UKRAINE][21] = 42, -+ [0][1][1][0][RTW89_CHILE][21] = 60, -+ [0][1][1][0][RTW89_QATAR][21] = 54, - [0][1][1][0][RTW89_FCC][23] = 60, - [0][1][1][0][RTW89_ETSI][23] = 54, - [0][1][1][0][RTW89_MKK][23] = 70, -@@ -30652,6 +31502,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][23] = 54, - [0][1][1][0][RTW89_CN][23] = 127, - [0][1][1][0][RTW89_UK][23] = 54, -+ [0][1][1][0][RTW89_MEXICO][23] = 60, -+ [0][1][1][0][RTW89_UKRAINE][23] = 42, -+ [0][1][1][0][RTW89_CHILE][23] = 60, -+ [0][1][1][0][RTW89_QATAR][23] = 54, - [0][1][1][0][RTW89_FCC][25] = 60, - [0][1][1][0][RTW89_ETSI][25] = 54, - [0][1][1][0][RTW89_MKK][25] = 70, -@@ -30660,6 +31514,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][25] = 127, - [0][1][1][0][RTW89_CN][25] = 127, - [0][1][1][0][RTW89_UK][25] = 54, -+ [0][1][1][0][RTW89_MEXICO][25] = 60, -+ [0][1][1][0][RTW89_UKRAINE][25] = 42, -+ [0][1][1][0][RTW89_CHILE][25] = 60, -+ [0][1][1][0][RTW89_QATAR][25] = 54, - [0][1][1][0][RTW89_FCC][27] = 60, - [0][1][1][0][RTW89_ETSI][27] = 54, - [0][1][1][0][RTW89_MKK][27] = 70, -@@ -30668,6 +31526,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][27] = 127, - [0][1][1][0][RTW89_CN][27] = 127, - [0][1][1][0][RTW89_UK][27] = 54, -+ [0][1][1][0][RTW89_MEXICO][27] = 60, -+ [0][1][1][0][RTW89_UKRAINE][27] = 42, -+ [0][1][1][0][RTW89_CHILE][27] = 52, -+ [0][1][1][0][RTW89_QATAR][27] = 54, - [0][1][1][0][RTW89_FCC][29] = 60, - [0][1][1][0][RTW89_ETSI][29] = 54, - [0][1][1][0][RTW89_MKK][29] = 70, -@@ -30676,6 +31538,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][29] = 127, - [0][1][1][0][RTW89_CN][29] = 127, - [0][1][1][0][RTW89_UK][29] = 54, -+ [0][1][1][0][RTW89_MEXICO][29] = 60, -+ [0][1][1][0][RTW89_UKRAINE][29] = 42, -+ [0][1][1][0][RTW89_CHILE][29] = 52, -+ [0][1][1][0][RTW89_QATAR][29] = 54, - [0][1][1][0][RTW89_FCC][31] = 60, - [0][1][1][0][RTW89_ETSI][31] = 54, - [0][1][1][0][RTW89_MKK][31] = 70, -@@ -30684,6 +31550,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][31] = 54, - [0][1][1][0][RTW89_CN][31] = 127, - [0][1][1][0][RTW89_UK][31] = 54, -+ [0][1][1][0][RTW89_MEXICO][31] = 60, -+ [0][1][1][0][RTW89_UKRAINE][31] = 42, -+ [0][1][1][0][RTW89_CHILE][31] = 52, -+ [0][1][1][0][RTW89_QATAR][31] = 54, - [0][1][1][0][RTW89_FCC][33] = 60, - [0][1][1][0][RTW89_ETSI][33] = 54, - [0][1][1][0][RTW89_MKK][33] = 70, -@@ -30692,6 +31562,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][33] = 54, - [0][1][1][0][RTW89_CN][33] = 127, - [0][1][1][0][RTW89_UK][33] = 54, -+ [0][1][1][0][RTW89_MEXICO][33] = 60, -+ [0][1][1][0][RTW89_UKRAINE][33] = 42, -+ [0][1][1][0][RTW89_CHILE][33] = 52, -+ [0][1][1][0][RTW89_QATAR][33] = 54, - [0][1][1][0][RTW89_FCC][35] = 52, - [0][1][1][0][RTW89_ETSI][35] = 54, - [0][1][1][0][RTW89_MKK][35] = 70, -@@ -30700,6 +31574,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][35] = 54, - [0][1][1][0][RTW89_CN][35] = 127, - [0][1][1][0][RTW89_UK][35] = 54, -+ [0][1][1][0][RTW89_MEXICO][35] = 52, -+ [0][1][1][0][RTW89_UKRAINE][35] = 42, -+ [0][1][1][0][RTW89_CHILE][35] = 52, -+ [0][1][1][0][RTW89_QATAR][35] = 54, - [0][1][1][0][RTW89_FCC][37] = 62, - [0][1][1][0][RTW89_ETSI][37] = 127, - [0][1][1][0][RTW89_MKK][37] = 70, -@@ -30708,6 +31586,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][37] = 64, - [0][1][1][0][RTW89_CN][37] = 127, - [0][1][1][0][RTW89_UK][37] = 52, -+ [0][1][1][0][RTW89_MEXICO][37] = 62, -+ [0][1][1][0][RTW89_UKRAINE][37] = 127, -+ [0][1][1][0][RTW89_CHILE][37] = 62, -+ [0][1][1][0][RTW89_QATAR][37] = 127, - [0][1][1][0][RTW89_FCC][38] = 72, - [0][1][1][0][RTW89_ETSI][38] = 18, - [0][1][1][0][RTW89_MKK][38] = 127, -@@ -30716,6 +31598,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][38] = 70, - [0][1][1][0][RTW89_CN][38] = 64, - [0][1][1][0][RTW89_UK][38] = 52, -+ [0][1][1][0][RTW89_MEXICO][38] = 72, -+ [0][1][1][0][RTW89_UKRAINE][38] = 18, -+ [0][1][1][0][RTW89_CHILE][38] = 70, -+ [0][1][1][0][RTW89_QATAR][38] = 18, - [0][1][1][0][RTW89_FCC][40] = 72, - [0][1][1][0][RTW89_ETSI][40] = 18, - [0][1][1][0][RTW89_MKK][40] = 127, -@@ -30724,6 +31610,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][40] = 70, - [0][1][1][0][RTW89_CN][40] = 64, - [0][1][1][0][RTW89_UK][40] = 52, -+ [0][1][1][0][RTW89_MEXICO][40] = 72, -+ [0][1][1][0][RTW89_UKRAINE][40] = 18, -+ [0][1][1][0][RTW89_CHILE][40] = 70, -+ [0][1][1][0][RTW89_QATAR][40] = 18, - [0][1][1][0][RTW89_FCC][42] = 72, - [0][1][1][0][RTW89_ETSI][42] = 18, - [0][1][1][0][RTW89_MKK][42] = 127, -@@ -30732,6 +31622,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][42] = 70, - [0][1][1][0][RTW89_CN][42] = 64, - [0][1][1][0][RTW89_UK][42] = 52, -+ [0][1][1][0][RTW89_MEXICO][42] = 72, -+ [0][1][1][0][RTW89_UKRAINE][42] = 18, -+ [0][1][1][0][RTW89_CHILE][42] = 70, -+ [0][1][1][0][RTW89_QATAR][42] = 18, - [0][1][1][0][RTW89_FCC][44] = 72, - [0][1][1][0][RTW89_ETSI][44] = 18, - [0][1][1][0][RTW89_MKK][44] = 127, -@@ -30740,6 +31634,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][44] = 70, - [0][1][1][0][RTW89_CN][44] = 60, - [0][1][1][0][RTW89_UK][44] = 52, -+ [0][1][1][0][RTW89_MEXICO][44] = 72, -+ [0][1][1][0][RTW89_UKRAINE][44] = 18, -+ [0][1][1][0][RTW89_CHILE][44] = 70, -+ [0][1][1][0][RTW89_QATAR][44] = 18, - [0][1][1][0][RTW89_FCC][46] = 72, - [0][1][1][0][RTW89_ETSI][46] = 18, - [0][1][1][0][RTW89_MKK][46] = 127, -@@ -30748,6 +31646,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][46] = 70, - [0][1][1][0][RTW89_CN][46] = 60, - [0][1][1][0][RTW89_UK][46] = 52, -+ [0][1][1][0][RTW89_MEXICO][46] = 72, -+ [0][1][1][0][RTW89_UKRAINE][46] = 18, -+ [0][1][1][0][RTW89_CHILE][46] = 70, -+ [0][1][1][0][RTW89_QATAR][46] = 18, - [0][1][1][0][RTW89_FCC][48] = 48, - [0][1][1][0][RTW89_ETSI][48] = 127, - [0][1][1][0][RTW89_MKK][48] = 127, -@@ -30756,6 +31658,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][48] = 127, - [0][1][1][0][RTW89_CN][48] = 127, - [0][1][1][0][RTW89_UK][48] = 127, -+ [0][1][1][0][RTW89_MEXICO][48] = 127, -+ [0][1][1][0][RTW89_UKRAINE][48] = 127, -+ [0][1][1][0][RTW89_CHILE][48] = 127, -+ [0][1][1][0][RTW89_QATAR][48] = 127, - [0][1][1][0][RTW89_FCC][50] = 48, - [0][1][1][0][RTW89_ETSI][50] = 127, - [0][1][1][0][RTW89_MKK][50] = 127, -@@ -30764,6 +31670,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][50] = 127, - [0][1][1][0][RTW89_CN][50] = 127, - [0][1][1][0][RTW89_UK][50] = 127, -+ [0][1][1][0][RTW89_MEXICO][50] = 127, -+ [0][1][1][0][RTW89_UKRAINE][50] = 127, -+ [0][1][1][0][RTW89_CHILE][50] = 127, -+ [0][1][1][0][RTW89_QATAR][50] = 127, - [0][1][1][0][RTW89_FCC][52] = 48, - [0][1][1][0][RTW89_ETSI][52] = 127, - [0][1][1][0][RTW89_MKK][52] = 127, -@@ -30772,38 +31682,58 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][52] = 127, - [0][1][1][0][RTW89_CN][52] = 127, - [0][1][1][0][RTW89_UK][52] = 127, -+ [0][1][1][0][RTW89_MEXICO][52] = 127, -+ [0][1][1][0][RTW89_UKRAINE][52] = 127, -+ [0][1][1][0][RTW89_CHILE][52] = 127, -+ [0][1][1][0][RTW89_QATAR][52] = 127, - [0][0][2][0][RTW89_FCC][0] = 70, - [0][0][2][0][RTW89_ETSI][0] = 66, - [0][0][2][0][RTW89_MKK][0] = 68, - [0][0][2][0][RTW89_IC][0] = 60, -- [0][0][2][0][RTW89_KCC][0] = 54, -+ [0][0][2][0][RTW89_KCC][0] = 68, - [0][0][2][0][RTW89_ACMA][0] = 66, - [0][0][2][0][RTW89_CN][0] = 52, - [0][0][2][0][RTW89_UK][0] = 66, -+ [0][0][2][0][RTW89_MEXICO][0] = 62, -+ [0][0][2][0][RTW89_UKRAINE][0] = 54, -+ [0][0][2][0][RTW89_CHILE][0] = 68, -+ [0][0][2][0][RTW89_QATAR][0] = 66, - [0][0][2][0][RTW89_FCC][2] = 72, - [0][0][2][0][RTW89_ETSI][2] = 66, - [0][0][2][0][RTW89_MKK][2] = 68, - [0][0][2][0][RTW89_IC][2] = 60, -- [0][0][2][0][RTW89_KCC][2] = 54, -+ [0][0][2][0][RTW89_KCC][2] = 68, - [0][0][2][0][RTW89_ACMA][2] = 66, - [0][0][2][0][RTW89_CN][2] = 52, - [0][0][2][0][RTW89_UK][2] = 66, -+ [0][0][2][0][RTW89_MEXICO][2] = 62, -+ [0][0][2][0][RTW89_UKRAINE][2] = 54, -+ [0][0][2][0][RTW89_CHILE][2] = 70, -+ [0][0][2][0][RTW89_QATAR][2] = 66, - [0][0][2][0][RTW89_FCC][4] = 72, - [0][0][2][0][RTW89_ETSI][4] = 66, - [0][0][2][0][RTW89_MKK][4] = 68, - [0][0][2][0][RTW89_IC][4] = 60, -- [0][0][2][0][RTW89_KCC][4] = 54, -+ [0][0][2][0][RTW89_KCC][4] = 68, - [0][0][2][0][RTW89_ACMA][4] = 66, - [0][0][2][0][RTW89_CN][4] = 52, - [0][0][2][0][RTW89_UK][4] = 66, -+ [0][0][2][0][RTW89_MEXICO][4] = 62, -+ [0][0][2][0][RTW89_UKRAINE][4] = 54, -+ [0][0][2][0][RTW89_CHILE][4] = 70, -+ [0][0][2][0][RTW89_QATAR][4] = 66, - [0][0][2][0][RTW89_FCC][6] = 72, - [0][0][2][0][RTW89_ETSI][6] = 66, - [0][0][2][0][RTW89_MKK][6] = 60, - [0][0][2][0][RTW89_IC][6] = 60, -- [0][0][2][0][RTW89_KCC][6] = 68, -+ [0][0][2][0][RTW89_KCC][6] = 54, - [0][0][2][0][RTW89_ACMA][6] = 66, - [0][0][2][0][RTW89_CN][6] = 52, - [0][0][2][0][RTW89_UK][6] = 66, -+ [0][0][2][0][RTW89_MEXICO][6] = 62, -+ [0][0][2][0][RTW89_UKRAINE][6] = 54, -+ [0][0][2][0][RTW89_CHILE][6] = 70, -+ [0][0][2][0][RTW89_QATAR][6] = 66, - [0][0][2][0][RTW89_FCC][8] = 72, - [0][0][2][0][RTW89_ETSI][8] = 66, - [0][0][2][0][RTW89_MKK][8] = 58, -@@ -30812,6 +31742,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][8] = 66, - [0][0][2][0][RTW89_CN][8] = 52, - [0][0][2][0][RTW89_UK][8] = 66, -+ [0][0][2][0][RTW89_MEXICO][8] = 72, -+ [0][0][2][0][RTW89_UKRAINE][8] = 54, -+ [0][0][2][0][RTW89_CHILE][8] = 70, -+ [0][0][2][0][RTW89_QATAR][8] = 66, - [0][0][2][0][RTW89_FCC][10] = 72, - [0][0][2][0][RTW89_ETSI][10] = 66, - [0][0][2][0][RTW89_MKK][10] = 70, -@@ -30820,6 +31754,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][10] = 66, - [0][0][2][0][RTW89_CN][10] = 52, - [0][0][2][0][RTW89_UK][10] = 66, -+ [0][0][2][0][RTW89_MEXICO][10] = 72, -+ [0][0][2][0][RTW89_UKRAINE][10] = 54, -+ [0][0][2][0][RTW89_CHILE][10] = 70, -+ [0][0][2][0][RTW89_QATAR][10] = 66, - [0][0][2][0][RTW89_FCC][12] = 72, - [0][0][2][0][RTW89_ETSI][12] = 66, - [0][0][2][0][RTW89_MKK][12] = 70, -@@ -30828,6 +31766,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][12] = 66, - [0][0][2][0][RTW89_CN][12] = 52, - [0][0][2][0][RTW89_UK][12] = 66, -+ [0][0][2][0][RTW89_MEXICO][12] = 72, -+ [0][0][2][0][RTW89_UKRAINE][12] = 54, -+ [0][0][2][0][RTW89_CHILE][12] = 70, -+ [0][0][2][0][RTW89_QATAR][12] = 66, - [0][0][2][0][RTW89_FCC][14] = 68, - [0][0][2][0][RTW89_ETSI][14] = 66, - [0][0][2][0][RTW89_MKK][14] = 70, -@@ -30836,6 +31778,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][14] = 66, - [0][0][2][0][RTW89_CN][14] = 52, - [0][0][2][0][RTW89_UK][14] = 66, -+ [0][0][2][0][RTW89_MEXICO][14] = 68, -+ [0][0][2][0][RTW89_UKRAINE][14] = 54, -+ [0][0][2][0][RTW89_CHILE][14] = 66, -+ [0][0][2][0][RTW89_QATAR][14] = 66, - [0][0][2][0][RTW89_FCC][15] = 70, - [0][0][2][0][RTW89_ETSI][15] = 66, - [0][0][2][0][RTW89_MKK][15] = 70, -@@ -30844,6 +31790,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][15] = 66, - [0][0][2][0][RTW89_CN][15] = 127, - [0][0][2][0][RTW89_UK][15] = 66, -+ [0][0][2][0][RTW89_MEXICO][15] = 70, -+ [0][0][2][0][RTW89_UKRAINE][15] = 54, -+ [0][0][2][0][RTW89_CHILE][15] = 68, -+ [0][0][2][0][RTW89_QATAR][15] = 66, - [0][0][2][0][RTW89_FCC][17] = 72, - [0][0][2][0][RTW89_ETSI][17] = 66, - [0][0][2][0][RTW89_MKK][17] = 70, -@@ -30852,6 +31802,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][17] = 66, - [0][0][2][0][RTW89_CN][17] = 127, - [0][0][2][0][RTW89_UK][17] = 66, -+ [0][0][2][0][RTW89_MEXICO][17] = 72, -+ [0][0][2][0][RTW89_UKRAINE][17] = 54, -+ [0][0][2][0][RTW89_CHILE][17] = 68, -+ [0][0][2][0][RTW89_QATAR][17] = 66, - [0][0][2][0][RTW89_FCC][19] = 72, - [0][0][2][0][RTW89_ETSI][19] = 66, - [0][0][2][0][RTW89_MKK][19] = 70, -@@ -30860,6 +31814,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][19] = 66, - [0][0][2][0][RTW89_CN][19] = 127, - [0][0][2][0][RTW89_UK][19] = 66, -+ [0][0][2][0][RTW89_MEXICO][19] = 72, -+ [0][0][2][0][RTW89_UKRAINE][19] = 54, -+ [0][0][2][0][RTW89_CHILE][19] = 68, -+ [0][0][2][0][RTW89_QATAR][19] = 66, - [0][0][2][0][RTW89_FCC][21] = 72, - [0][0][2][0][RTW89_ETSI][21] = 66, - [0][0][2][0][RTW89_MKK][21] = 70, -@@ -30868,6 +31826,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][21] = 66, - [0][0][2][0][RTW89_CN][21] = 127, - [0][0][2][0][RTW89_UK][21] = 66, -+ [0][0][2][0][RTW89_MEXICO][21] = 72, -+ [0][0][2][0][RTW89_UKRAINE][21] = 54, -+ [0][0][2][0][RTW89_CHILE][21] = 70, -+ [0][0][2][0][RTW89_QATAR][21] = 66, - [0][0][2][0][RTW89_FCC][23] = 72, - [0][0][2][0][RTW89_ETSI][23] = 66, - [0][0][2][0][RTW89_MKK][23] = 70, -@@ -30876,6 +31838,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][23] = 66, - [0][0][2][0][RTW89_CN][23] = 127, - [0][0][2][0][RTW89_UK][23] = 66, -+ [0][0][2][0][RTW89_MEXICO][23] = 72, -+ [0][0][2][0][RTW89_UKRAINE][23] = 54, -+ [0][0][2][0][RTW89_CHILE][23] = 70, -+ [0][0][2][0][RTW89_QATAR][23] = 66, - [0][0][2][0][RTW89_FCC][25] = 72, - [0][0][2][0][RTW89_ETSI][25] = 66, - [0][0][2][0][RTW89_MKK][25] = 70, -@@ -30884,6 +31850,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][25] = 127, - [0][0][2][0][RTW89_CN][25] = 127, - [0][0][2][0][RTW89_UK][25] = 66, -+ [0][0][2][0][RTW89_MEXICO][25] = 72, -+ [0][0][2][0][RTW89_UKRAINE][25] = 54, -+ [0][0][2][0][RTW89_CHILE][25] = 70, -+ [0][0][2][0][RTW89_QATAR][25] = 66, - [0][0][2][0][RTW89_FCC][27] = 72, - [0][0][2][0][RTW89_ETSI][27] = 66, - [0][0][2][0][RTW89_MKK][27] = 70, -@@ -30892,6 +31862,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][27] = 127, - [0][0][2][0][RTW89_CN][27] = 127, - [0][0][2][0][RTW89_UK][27] = 66, -+ [0][0][2][0][RTW89_MEXICO][27] = 72, -+ [0][0][2][0][RTW89_UKRAINE][27] = 54, -+ [0][0][2][0][RTW89_CHILE][27] = 56, -+ [0][0][2][0][RTW89_QATAR][27] = 66, - [0][0][2][0][RTW89_FCC][29] = 72, - [0][0][2][0][RTW89_ETSI][29] = 66, - [0][0][2][0][RTW89_MKK][29] = 70, -@@ -30900,6 +31874,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][29] = 127, - [0][0][2][0][RTW89_CN][29] = 127, - [0][0][2][0][RTW89_UK][29] = 66, -+ [0][0][2][0][RTW89_MEXICO][29] = 72, -+ [0][0][2][0][RTW89_UKRAINE][29] = 54, -+ [0][0][2][0][RTW89_CHILE][29] = 56, -+ [0][0][2][0][RTW89_QATAR][29] = 66, - [0][0][2][0][RTW89_FCC][31] = 72, - [0][0][2][0][RTW89_ETSI][31] = 66, - [0][0][2][0][RTW89_MKK][31] = 70, -@@ -30908,6 +31886,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][31] = 66, - [0][0][2][0][RTW89_CN][31] = 127, - [0][0][2][0][RTW89_UK][31] = 66, -+ [0][0][2][0][RTW89_MEXICO][31] = 72, -+ [0][0][2][0][RTW89_UKRAINE][31] = 54, -+ [0][0][2][0][RTW89_CHILE][31] = 56, -+ [0][0][2][0][RTW89_QATAR][31] = 66, - [0][0][2][0][RTW89_FCC][33] = 72, - [0][0][2][0][RTW89_ETSI][33] = 66, - [0][0][2][0][RTW89_MKK][33] = 70, -@@ -30916,6 +31898,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][33] = 66, - [0][0][2][0][RTW89_CN][33] = 127, - [0][0][2][0][RTW89_UK][33] = 66, -+ [0][0][2][0][RTW89_MEXICO][33] = 72, -+ [0][0][2][0][RTW89_UKRAINE][33] = 54, -+ [0][0][2][0][RTW89_CHILE][33] = 56, -+ [0][0][2][0][RTW89_QATAR][33] = 66, - [0][0][2][0][RTW89_FCC][35] = 56, - [0][0][2][0][RTW89_ETSI][35] = 66, - [0][0][2][0][RTW89_MKK][35] = 70, -@@ -30924,6 +31910,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][35] = 66, - [0][0][2][0][RTW89_CN][35] = 127, - [0][0][2][0][RTW89_UK][35] = 66, -+ [0][0][2][0][RTW89_MEXICO][35] = 56, -+ [0][0][2][0][RTW89_UKRAINE][35] = 54, -+ [0][0][2][0][RTW89_CHILE][35] = 56, -+ [0][0][2][0][RTW89_QATAR][35] = 66, - [0][0][2][0][RTW89_FCC][37] = 72, - [0][0][2][0][RTW89_ETSI][37] = 127, - [0][0][2][0][RTW89_MKK][37] = 70, -@@ -30932,6 +31922,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][37] = 70, - [0][0][2][0][RTW89_CN][37] = 127, - [0][0][2][0][RTW89_UK][37] = 64, -+ [0][0][2][0][RTW89_MEXICO][37] = 72, -+ [0][0][2][0][RTW89_UKRAINE][37] = 127, -+ [0][0][2][0][RTW89_CHILE][37] = 70, -+ [0][0][2][0][RTW89_QATAR][37] = 127, - [0][0][2][0][RTW89_FCC][38] = 72, - [0][0][2][0][RTW89_ETSI][38] = 30, - [0][0][2][0][RTW89_MKK][38] = 127, -@@ -30940,6 +31934,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][38] = 70, - [0][0][2][0][RTW89_CN][38] = 68, - [0][0][2][0][RTW89_UK][38] = 64, -+ [0][0][2][0][RTW89_MEXICO][38] = 72, -+ [0][0][2][0][RTW89_UKRAINE][38] = 30, -+ [0][0][2][0][RTW89_CHILE][38] = 70, -+ [0][0][2][0][RTW89_QATAR][38] = 30, - [0][0][2][0][RTW89_FCC][40] = 72, - [0][0][2][0][RTW89_ETSI][40] = 30, - [0][0][2][0][RTW89_MKK][40] = 127, -@@ -30948,6 +31946,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][40] = 70, - [0][0][2][0][RTW89_CN][40] = 68, - [0][0][2][0][RTW89_UK][40] = 64, -+ [0][0][2][0][RTW89_MEXICO][40] = 72, -+ [0][0][2][0][RTW89_UKRAINE][40] = 30, -+ [0][0][2][0][RTW89_CHILE][40] = 70, -+ [0][0][2][0][RTW89_QATAR][40] = 30, - [0][0][2][0][RTW89_FCC][42] = 72, - [0][0][2][0][RTW89_ETSI][42] = 30, - [0][0][2][0][RTW89_MKK][42] = 127, -@@ -30956,6 +31958,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][42] = 70, - [0][0][2][0][RTW89_CN][42] = 68, - [0][0][2][0][RTW89_UK][42] = 64, -+ [0][0][2][0][RTW89_MEXICO][42] = 72, -+ [0][0][2][0][RTW89_UKRAINE][42] = 30, -+ [0][0][2][0][RTW89_CHILE][42] = 70, -+ [0][0][2][0][RTW89_QATAR][42] = 30, - [0][0][2][0][RTW89_FCC][44] = 72, - [0][0][2][0][RTW89_ETSI][44] = 30, - [0][0][2][0][RTW89_MKK][44] = 127, -@@ -30964,6 +31970,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][44] = 70, - [0][0][2][0][RTW89_CN][44] = 68, - [0][0][2][0][RTW89_UK][44] = 64, -+ [0][0][2][0][RTW89_MEXICO][44] = 72, -+ [0][0][2][0][RTW89_UKRAINE][44] = 30, -+ [0][0][2][0][RTW89_CHILE][44] = 70, -+ [0][0][2][0][RTW89_QATAR][44] = 30, - [0][0][2][0][RTW89_FCC][46] = 72, - [0][0][2][0][RTW89_ETSI][46] = 30, - [0][0][2][0][RTW89_MKK][46] = 127, -@@ -30972,6 +31982,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][46] = 70, - [0][0][2][0][RTW89_CN][46] = 68, - [0][0][2][0][RTW89_UK][46] = 64, -+ [0][0][2][0][RTW89_MEXICO][46] = 72, -+ [0][0][2][0][RTW89_UKRAINE][46] = 30, -+ [0][0][2][0][RTW89_CHILE][46] = 70, -+ [0][0][2][0][RTW89_QATAR][46] = 30, - [0][0][2][0][RTW89_FCC][48] = 72, - [0][0][2][0][RTW89_ETSI][48] = 127, - [0][0][2][0][RTW89_MKK][48] = 127, -@@ -30980,6 +31994,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][48] = 127, - [0][0][2][0][RTW89_CN][48] = 127, - [0][0][2][0][RTW89_UK][48] = 127, -+ [0][0][2][0][RTW89_MEXICO][48] = 127, -+ [0][0][2][0][RTW89_UKRAINE][48] = 127, -+ [0][0][2][0][RTW89_CHILE][48] = 127, -+ [0][0][2][0][RTW89_QATAR][48] = 127, - [0][0][2][0][RTW89_FCC][50] = 72, - [0][0][2][0][RTW89_ETSI][50] = 127, - [0][0][2][0][RTW89_MKK][50] = 127, -@@ -30988,6 +32006,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][50] = 127, - [0][0][2][0][RTW89_CN][50] = 127, - [0][0][2][0][RTW89_UK][50] = 127, -+ [0][0][2][0][RTW89_MEXICO][50] = 127, -+ [0][0][2][0][RTW89_UKRAINE][50] = 127, -+ [0][0][2][0][RTW89_CHILE][50] = 127, -+ [0][0][2][0][RTW89_QATAR][50] = 127, - [0][0][2][0][RTW89_FCC][52] = 72, - [0][0][2][0][RTW89_ETSI][52] = 127, - [0][0][2][0][RTW89_MKK][52] = 127, -@@ -30996,38 +32018,58 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][52] = 127, - [0][0][2][0][RTW89_CN][52] = 127, - [0][0][2][0][RTW89_UK][52] = 127, -+ [0][0][2][0][RTW89_MEXICO][52] = 127, -+ [0][0][2][0][RTW89_UKRAINE][52] = 127, -+ [0][0][2][0][RTW89_CHILE][52] = 127, -+ [0][0][2][0][RTW89_QATAR][52] = 127, - [0][1][2][0][RTW89_FCC][0] = 60, - [0][1][2][0][RTW89_ETSI][0] = 54, - [0][1][2][0][RTW89_MKK][0] = 54, - [0][1][2][0][RTW89_IC][0] = 36, -- [0][1][2][0][RTW89_KCC][0] = 40, -+ [0][1][2][0][RTW89_KCC][0] = 64, - [0][1][2][0][RTW89_ACMA][0] = 54, - [0][1][2][0][RTW89_CN][0] = 40, - [0][1][2][0][RTW89_UK][0] = 54, -+ [0][1][2][0][RTW89_MEXICO][0] = 50, -+ [0][1][2][0][RTW89_UKRAINE][0] = 42, -+ [0][1][2][0][RTW89_CHILE][0] = 60, -+ [0][1][2][0][RTW89_QATAR][0] = 54, - [0][1][2][0][RTW89_FCC][2] = 62, - [0][1][2][0][RTW89_ETSI][2] = 54, - [0][1][2][0][RTW89_MKK][2] = 54, - [0][1][2][0][RTW89_IC][2] = 36, -- [0][1][2][0][RTW89_KCC][2] = 40, -+ [0][1][2][0][RTW89_KCC][2] = 64, - [0][1][2][0][RTW89_ACMA][2] = 54, - [0][1][2][0][RTW89_CN][2] = 40, - [0][1][2][0][RTW89_UK][2] = 54, -+ [0][1][2][0][RTW89_MEXICO][2] = 50, -+ [0][1][2][0][RTW89_UKRAINE][2] = 42, -+ [0][1][2][0][RTW89_CHILE][2] = 62, -+ [0][1][2][0][RTW89_QATAR][2] = 54, - [0][1][2][0][RTW89_FCC][4] = 62, - [0][1][2][0][RTW89_ETSI][4] = 54, - [0][1][2][0][RTW89_MKK][4] = 54, - [0][1][2][0][RTW89_IC][4] = 36, -- [0][1][2][0][RTW89_KCC][4] = 40, -+ [0][1][2][0][RTW89_KCC][4] = 64, - [0][1][2][0][RTW89_ACMA][4] = 54, - [0][1][2][0][RTW89_CN][4] = 40, - [0][1][2][0][RTW89_UK][4] = 54, -+ [0][1][2][0][RTW89_MEXICO][4] = 50, -+ [0][1][2][0][RTW89_UKRAINE][4] = 42, -+ [0][1][2][0][RTW89_CHILE][4] = 62, -+ [0][1][2][0][RTW89_QATAR][4] = 54, - [0][1][2][0][RTW89_FCC][6] = 62, - [0][1][2][0][RTW89_ETSI][6] = 54, - [0][1][2][0][RTW89_MKK][6] = 50, - [0][1][2][0][RTW89_IC][6] = 38, -- [0][1][2][0][RTW89_KCC][6] = 64, -+ [0][1][2][0][RTW89_KCC][6] = 40, - [0][1][2][0][RTW89_ACMA][6] = 54, - [0][1][2][0][RTW89_CN][6] = 40, - [0][1][2][0][RTW89_UK][6] = 54, -+ [0][1][2][0][RTW89_MEXICO][6] = 50, -+ [0][1][2][0][RTW89_UKRAINE][6] = 42, -+ [0][1][2][0][RTW89_CHILE][6] = 62, -+ [0][1][2][0][RTW89_QATAR][6] = 54, - [0][1][2][0][RTW89_FCC][8] = 62, - [0][1][2][0][RTW89_ETSI][8] = 54, - [0][1][2][0][RTW89_MKK][8] = 42, -@@ -31036,6 +32078,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][8] = 54, - [0][1][2][0][RTW89_CN][8] = 40, - [0][1][2][0][RTW89_UK][8] = 54, -+ [0][1][2][0][RTW89_MEXICO][8] = 62, -+ [0][1][2][0][RTW89_UKRAINE][8] = 42, -+ [0][1][2][0][RTW89_CHILE][8] = 62, -+ [0][1][2][0][RTW89_QATAR][8] = 54, - [0][1][2][0][RTW89_FCC][10] = 62, - [0][1][2][0][RTW89_ETSI][10] = 54, - [0][1][2][0][RTW89_MKK][10] = 54, -@@ -31044,6 +32090,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][10] = 54, - [0][1][2][0][RTW89_CN][10] = 40, - [0][1][2][0][RTW89_UK][10] = 54, -+ [0][1][2][0][RTW89_MEXICO][10] = 62, -+ [0][1][2][0][RTW89_UKRAINE][10] = 42, -+ [0][1][2][0][RTW89_CHILE][10] = 62, -+ [0][1][2][0][RTW89_QATAR][10] = 54, - [0][1][2][0][RTW89_FCC][12] = 62, - [0][1][2][0][RTW89_ETSI][12] = 54, - [0][1][2][0][RTW89_MKK][12] = 54, -@@ -31052,6 +32102,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][12] = 54, - [0][1][2][0][RTW89_CN][12] = 40, - [0][1][2][0][RTW89_UK][12] = 54, -+ [0][1][2][0][RTW89_MEXICO][12] = 62, -+ [0][1][2][0][RTW89_UKRAINE][12] = 42, -+ [0][1][2][0][RTW89_CHILE][12] = 62, -+ [0][1][2][0][RTW89_QATAR][12] = 54, - [0][1][2][0][RTW89_FCC][14] = 62, - [0][1][2][0][RTW89_ETSI][14] = 54, - [0][1][2][0][RTW89_MKK][14] = 54, -@@ -31060,6 +32114,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][14] = 54, - [0][1][2][0][RTW89_CN][14] = 40, - [0][1][2][0][RTW89_UK][14] = 54, -+ [0][1][2][0][RTW89_MEXICO][14] = 62, -+ [0][1][2][0][RTW89_UKRAINE][14] = 42, -+ [0][1][2][0][RTW89_CHILE][14] = 62, -+ [0][1][2][0][RTW89_QATAR][14] = 54, - [0][1][2][0][RTW89_FCC][15] = 60, - [0][1][2][0][RTW89_ETSI][15] = 54, - [0][1][2][0][RTW89_MKK][15] = 68, -@@ -31068,6 +32126,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][15] = 54, - [0][1][2][0][RTW89_CN][15] = 127, - [0][1][2][0][RTW89_UK][15] = 54, -+ [0][1][2][0][RTW89_MEXICO][15] = 60, -+ [0][1][2][0][RTW89_UKRAINE][15] = 42, -+ [0][1][2][0][RTW89_CHILE][15] = 60, -+ [0][1][2][0][RTW89_QATAR][15] = 54, - [0][1][2][0][RTW89_FCC][17] = 62, - [0][1][2][0][RTW89_ETSI][17] = 54, - [0][1][2][0][RTW89_MKK][17] = 68, -@@ -31076,6 +32138,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][17] = 54, - [0][1][2][0][RTW89_CN][17] = 127, - [0][1][2][0][RTW89_UK][17] = 54, -+ [0][1][2][0][RTW89_MEXICO][17] = 62, -+ [0][1][2][0][RTW89_UKRAINE][17] = 42, -+ [0][1][2][0][RTW89_CHILE][17] = 60, -+ [0][1][2][0][RTW89_QATAR][17] = 54, - [0][1][2][0][RTW89_FCC][19] = 62, - [0][1][2][0][RTW89_ETSI][19] = 54, - [0][1][2][0][RTW89_MKK][19] = 68, -@@ -31084,6 +32150,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][19] = 54, - [0][1][2][0][RTW89_CN][19] = 127, - [0][1][2][0][RTW89_UK][19] = 54, -+ [0][1][2][0][RTW89_MEXICO][19] = 62, -+ [0][1][2][0][RTW89_UKRAINE][19] = 42, -+ [0][1][2][0][RTW89_CHILE][19] = 62, -+ [0][1][2][0][RTW89_QATAR][19] = 54, - [0][1][2][0][RTW89_FCC][21] = 62, - [0][1][2][0][RTW89_ETSI][21] = 54, - [0][1][2][0][RTW89_MKK][21] = 68, -@@ -31092,6 +32162,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][21] = 54, - [0][1][2][0][RTW89_CN][21] = 127, - [0][1][2][0][RTW89_UK][21] = 54, -+ [0][1][2][0][RTW89_MEXICO][21] = 62, -+ [0][1][2][0][RTW89_UKRAINE][21] = 42, -+ [0][1][2][0][RTW89_CHILE][21] = 62, -+ [0][1][2][0][RTW89_QATAR][21] = 54, - [0][1][2][0][RTW89_FCC][23] = 62, - [0][1][2][0][RTW89_ETSI][23] = 54, - [0][1][2][0][RTW89_MKK][23] = 68, -@@ -31100,6 +32174,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][23] = 54, - [0][1][2][0][RTW89_CN][23] = 127, - [0][1][2][0][RTW89_UK][23] = 54, -+ [0][1][2][0][RTW89_MEXICO][23] = 62, -+ [0][1][2][0][RTW89_UKRAINE][23] = 42, -+ [0][1][2][0][RTW89_CHILE][23] = 62, -+ [0][1][2][0][RTW89_QATAR][23] = 54, - [0][1][2][0][RTW89_FCC][25] = 62, - [0][1][2][0][RTW89_ETSI][25] = 54, - [0][1][2][0][RTW89_MKK][25] = 68, -@@ -31108,6 +32186,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][25] = 127, - [0][1][2][0][RTW89_CN][25] = 127, - [0][1][2][0][RTW89_UK][25] = 54, -+ [0][1][2][0][RTW89_MEXICO][25] = 62, -+ [0][1][2][0][RTW89_UKRAINE][25] = 42, -+ [0][1][2][0][RTW89_CHILE][25] = 62, -+ [0][1][2][0][RTW89_QATAR][25] = 54, - [0][1][2][0][RTW89_FCC][27] = 62, - [0][1][2][0][RTW89_ETSI][27] = 54, - [0][1][2][0][RTW89_MKK][27] = 68, -@@ -31116,6 +32198,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][27] = 127, - [0][1][2][0][RTW89_CN][27] = 127, - [0][1][2][0][RTW89_UK][27] = 54, -+ [0][1][2][0][RTW89_MEXICO][27] = 62, -+ [0][1][2][0][RTW89_UKRAINE][27] = 42, -+ [0][1][2][0][RTW89_CHILE][27] = 46, -+ [0][1][2][0][RTW89_QATAR][27] = 54, - [0][1][2][0][RTW89_FCC][29] = 62, - [0][1][2][0][RTW89_ETSI][29] = 54, - [0][1][2][0][RTW89_MKK][29] = 68, -@@ -31124,6 +32210,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][29] = 127, - [0][1][2][0][RTW89_CN][29] = 127, - [0][1][2][0][RTW89_UK][29] = 54, -+ [0][1][2][0][RTW89_MEXICO][29] = 62, -+ [0][1][2][0][RTW89_UKRAINE][29] = 42, -+ [0][1][2][0][RTW89_CHILE][29] = 46, -+ [0][1][2][0][RTW89_QATAR][29] = 54, - [0][1][2][0][RTW89_FCC][31] = 62, - [0][1][2][0][RTW89_ETSI][31] = 54, - [0][1][2][0][RTW89_MKK][31] = 68, -@@ -31132,6 +32222,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][31] = 54, - [0][1][2][0][RTW89_CN][31] = 127, - [0][1][2][0][RTW89_UK][31] = 54, -+ [0][1][2][0][RTW89_MEXICO][31] = 62, -+ [0][1][2][0][RTW89_UKRAINE][31] = 42, -+ [0][1][2][0][RTW89_CHILE][31] = 46, -+ [0][1][2][0][RTW89_QATAR][31] = 54, - [0][1][2][0][RTW89_FCC][33] = 62, - [0][1][2][0][RTW89_ETSI][33] = 54, - [0][1][2][0][RTW89_MKK][33] = 68, -@@ -31140,6 +32234,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][33] = 54, - [0][1][2][0][RTW89_CN][33] = 127, - [0][1][2][0][RTW89_UK][33] = 54, -+ [0][1][2][0][RTW89_MEXICO][33] = 62, -+ [0][1][2][0][RTW89_UKRAINE][33] = 42, -+ [0][1][2][0][RTW89_CHILE][33] = 46, -+ [0][1][2][0][RTW89_QATAR][33] = 54, - [0][1][2][0][RTW89_FCC][35] = 46, - [0][1][2][0][RTW89_ETSI][35] = 54, - [0][1][2][0][RTW89_MKK][35] = 68, -@@ -31148,6 +32246,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][35] = 54, - [0][1][2][0][RTW89_CN][35] = 127, - [0][1][2][0][RTW89_UK][35] = 54, -+ [0][1][2][0][RTW89_MEXICO][35] = 46, -+ [0][1][2][0][RTW89_UKRAINE][35] = 42, -+ [0][1][2][0][RTW89_CHILE][35] = 46, -+ [0][1][2][0][RTW89_QATAR][35] = 54, - [0][1][2][0][RTW89_FCC][37] = 64, - [0][1][2][0][RTW89_ETSI][37] = 127, - [0][1][2][0][RTW89_MKK][37] = 68, -@@ -31156,6 +32258,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][37] = 64, - [0][1][2][0][RTW89_CN][37] = 127, - [0][1][2][0][RTW89_UK][37] = 52, -+ [0][1][2][0][RTW89_MEXICO][37] = 64, -+ [0][1][2][0][RTW89_UKRAINE][37] = 127, -+ [0][1][2][0][RTW89_CHILE][37] = 64, -+ [0][1][2][0][RTW89_QATAR][37] = 127, - [0][1][2][0][RTW89_FCC][38] = 72, - [0][1][2][0][RTW89_ETSI][38] = 18, - [0][1][2][0][RTW89_MKK][38] = 127, -@@ -31164,6 +32270,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][38] = 70, - [0][1][2][0][RTW89_CN][38] = 68, - [0][1][2][0][RTW89_UK][38] = 52, -+ [0][1][2][0][RTW89_MEXICO][38] = 72, -+ [0][1][2][0][RTW89_UKRAINE][38] = 18, -+ [0][1][2][0][RTW89_CHILE][38] = 70, -+ [0][1][2][0][RTW89_QATAR][38] = 18, - [0][1][2][0][RTW89_FCC][40] = 72, - [0][1][2][0][RTW89_ETSI][40] = 18, - [0][1][2][0][RTW89_MKK][40] = 127, -@@ -31172,6 +32282,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][40] = 70, - [0][1][2][0][RTW89_CN][40] = 68, - [0][1][2][0][RTW89_UK][40] = 52, -+ [0][1][2][0][RTW89_MEXICO][40] = 72, -+ [0][1][2][0][RTW89_UKRAINE][40] = 18, -+ [0][1][2][0][RTW89_CHILE][40] = 70, -+ [0][1][2][0][RTW89_QATAR][40] = 18, - [0][1][2][0][RTW89_FCC][42] = 72, - [0][1][2][0][RTW89_ETSI][42] = 18, - [0][1][2][0][RTW89_MKK][42] = 127, -@@ -31180,6 +32294,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][42] = 70, - [0][1][2][0][RTW89_CN][42] = 68, - [0][1][2][0][RTW89_UK][42] = 52, -+ [0][1][2][0][RTW89_MEXICO][42] = 72, -+ [0][1][2][0][RTW89_UKRAINE][42] = 18, -+ [0][1][2][0][RTW89_CHILE][42] = 70, -+ [0][1][2][0][RTW89_QATAR][42] = 18, - [0][1][2][0][RTW89_FCC][44] = 72, - [0][1][2][0][RTW89_ETSI][44] = 18, - [0][1][2][0][RTW89_MKK][44] = 127, -@@ -31188,6 +32306,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][44] = 70, - [0][1][2][0][RTW89_CN][44] = 68, - [0][1][2][0][RTW89_UK][44] = 52, -+ [0][1][2][0][RTW89_MEXICO][44] = 72, -+ [0][1][2][0][RTW89_UKRAINE][44] = 18, -+ [0][1][2][0][RTW89_CHILE][44] = 70, -+ [0][1][2][0][RTW89_QATAR][44] = 18, - [0][1][2][0][RTW89_FCC][46] = 72, - [0][1][2][0][RTW89_ETSI][46] = 18, - [0][1][2][0][RTW89_MKK][46] = 127, -@@ -31196,6 +32318,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][46] = 70, - [0][1][2][0][RTW89_CN][46] = 68, - [0][1][2][0][RTW89_UK][46] = 52, -+ [0][1][2][0][RTW89_MEXICO][46] = 72, -+ [0][1][2][0][RTW89_UKRAINE][46] = 18, -+ [0][1][2][0][RTW89_CHILE][46] = 70, -+ [0][1][2][0][RTW89_QATAR][46] = 18, - [0][1][2][0][RTW89_FCC][48] = 48, - [0][1][2][0][RTW89_ETSI][48] = 127, - [0][1][2][0][RTW89_MKK][48] = 127, -@@ -31204,6 +32330,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][48] = 127, - [0][1][2][0][RTW89_CN][48] = 127, - [0][1][2][0][RTW89_UK][48] = 127, -+ [0][1][2][0][RTW89_MEXICO][48] = 127, -+ [0][1][2][0][RTW89_UKRAINE][48] = 127, -+ [0][1][2][0][RTW89_CHILE][48] = 127, -+ [0][1][2][0][RTW89_QATAR][48] = 127, - [0][1][2][0][RTW89_FCC][50] = 50, - [0][1][2][0][RTW89_ETSI][50] = 127, - [0][1][2][0][RTW89_MKK][50] = 127, -@@ -31212,6 +32342,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][50] = 127, - [0][1][2][0][RTW89_CN][50] = 127, - [0][1][2][0][RTW89_UK][50] = 127, -+ [0][1][2][0][RTW89_MEXICO][50] = 127, -+ [0][1][2][0][RTW89_UKRAINE][50] = 127, -+ [0][1][2][0][RTW89_CHILE][50] = 127, -+ [0][1][2][0][RTW89_QATAR][50] = 127, - [0][1][2][0][RTW89_FCC][52] = 48, - [0][1][2][0][RTW89_ETSI][52] = 127, - [0][1][2][0][RTW89_MKK][52] = 127, -@@ -31220,38 +32354,58 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][0][RTW89_ACMA][52] = 127, - [0][1][2][0][RTW89_CN][52] = 127, - [0][1][2][0][RTW89_UK][52] = 127, -+ [0][1][2][0][RTW89_MEXICO][52] = 127, -+ [0][1][2][0][RTW89_UKRAINE][52] = 127, -+ [0][1][2][0][RTW89_CHILE][52] = 127, -+ [0][1][2][0][RTW89_QATAR][52] = 127, - [0][1][2][1][RTW89_FCC][0] = 60, - [0][1][2][1][RTW89_ETSI][0] = 40, - [0][1][2][1][RTW89_MKK][0] = 54, - [0][1][2][1][RTW89_IC][0] = 40, -- [0][1][2][1][RTW89_KCC][0] = 40, -+ [0][1][2][1][RTW89_KCC][0] = 64, - [0][1][2][1][RTW89_ACMA][0] = 40, - [0][1][2][1][RTW89_CN][0] = 36, - [0][1][2][1][RTW89_UK][0] = 40, -+ [0][1][2][1][RTW89_MEXICO][0] = 50, -+ [0][1][2][1][RTW89_UKRAINE][0] = 30, -+ [0][1][2][1][RTW89_CHILE][0] = 60, -+ [0][1][2][1][RTW89_QATAR][0] = 40, - [0][1][2][1][RTW89_FCC][2] = 62, - [0][1][2][1][RTW89_ETSI][2] = 40, - [0][1][2][1][RTW89_MKK][2] = 54, - [0][1][2][1][RTW89_IC][2] = 40, -- [0][1][2][1][RTW89_KCC][2] = 40, -+ [0][1][2][1][RTW89_KCC][2] = 64, - [0][1][2][1][RTW89_ACMA][2] = 40, - [0][1][2][1][RTW89_CN][2] = 36, - [0][1][2][1][RTW89_UK][2] = 40, -+ [0][1][2][1][RTW89_MEXICO][2] = 50, -+ [0][1][2][1][RTW89_UKRAINE][2] = 30, -+ [0][1][2][1][RTW89_CHILE][2] = 60, -+ [0][1][2][1][RTW89_QATAR][2] = 40, - [0][1][2][1][RTW89_FCC][4] = 62, - [0][1][2][1][RTW89_ETSI][4] = 40, - [0][1][2][1][RTW89_MKK][4] = 54, - [0][1][2][1][RTW89_IC][4] = 40, -- [0][1][2][1][RTW89_KCC][4] = 40, -+ [0][1][2][1][RTW89_KCC][4] = 64, - [0][1][2][1][RTW89_ACMA][4] = 40, - [0][1][2][1][RTW89_CN][4] = 36, - [0][1][2][1][RTW89_UK][4] = 40, -+ [0][1][2][1][RTW89_MEXICO][4] = 50, -+ [0][1][2][1][RTW89_UKRAINE][4] = 30, -+ [0][1][2][1][RTW89_CHILE][4] = 60, -+ [0][1][2][1][RTW89_QATAR][4] = 40, - [0][1][2][1][RTW89_FCC][6] = 62, - [0][1][2][1][RTW89_ETSI][6] = 40, - [0][1][2][1][RTW89_MKK][6] = 50, - [0][1][2][1][RTW89_IC][6] = 40, -- [0][1][2][1][RTW89_KCC][6] = 64, -+ [0][1][2][1][RTW89_KCC][6] = 40, - [0][1][2][1][RTW89_ACMA][6] = 40, - [0][1][2][1][RTW89_CN][6] = 36, - [0][1][2][1][RTW89_UK][6] = 40, -+ [0][1][2][1][RTW89_MEXICO][6] = 50, -+ [0][1][2][1][RTW89_UKRAINE][6] = 30, -+ [0][1][2][1][RTW89_CHILE][6] = 60, -+ [0][1][2][1][RTW89_QATAR][6] = 40, - [0][1][2][1][RTW89_FCC][8] = 62, - [0][1][2][1][RTW89_ETSI][8] = 40, - [0][1][2][1][RTW89_MKK][8] = 42, -@@ -31260,6 +32414,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][8] = 40, - [0][1][2][1][RTW89_CN][8] = 36, - [0][1][2][1][RTW89_UK][8] = 40, -+ [0][1][2][1][RTW89_MEXICO][8] = 62, -+ [0][1][2][1][RTW89_UKRAINE][8] = 30, -+ [0][1][2][1][RTW89_CHILE][8] = 60, -+ [0][1][2][1][RTW89_QATAR][8] = 40, - [0][1][2][1][RTW89_FCC][10] = 62, - [0][1][2][1][RTW89_ETSI][10] = 40, - [0][1][2][1][RTW89_MKK][10] = 54, -@@ -31268,6 +32426,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][10] = 40, - [0][1][2][1][RTW89_CN][10] = 36, - [0][1][2][1][RTW89_UK][10] = 40, -+ [0][1][2][1][RTW89_MEXICO][10] = 62, -+ [0][1][2][1][RTW89_UKRAINE][10] = 30, -+ [0][1][2][1][RTW89_CHILE][10] = 60, -+ [0][1][2][1][RTW89_QATAR][10] = 40, - [0][1][2][1][RTW89_FCC][12] = 62, - [0][1][2][1][RTW89_ETSI][12] = 40, - [0][1][2][1][RTW89_MKK][12] = 54, -@@ -31276,6 +32438,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][12] = 40, - [0][1][2][1][RTW89_CN][12] = 36, - [0][1][2][1][RTW89_UK][12] = 40, -+ [0][1][2][1][RTW89_MEXICO][12] = 62, -+ [0][1][2][1][RTW89_UKRAINE][12] = 30, -+ [0][1][2][1][RTW89_CHILE][12] = 60, -+ [0][1][2][1][RTW89_QATAR][12] = 40, - [0][1][2][1][RTW89_FCC][14] = 62, - [0][1][2][1][RTW89_ETSI][14] = 40, - [0][1][2][1][RTW89_MKK][14] = 54, -@@ -31284,6 +32450,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][14] = 40, - [0][1][2][1][RTW89_CN][14] = 36, - [0][1][2][1][RTW89_UK][14] = 40, -+ [0][1][2][1][RTW89_MEXICO][14] = 62, -+ [0][1][2][1][RTW89_UKRAINE][14] = 30, -+ [0][1][2][1][RTW89_CHILE][14] = 60, -+ [0][1][2][1][RTW89_QATAR][14] = 40, - [0][1][2][1][RTW89_FCC][15] = 60, - [0][1][2][1][RTW89_ETSI][15] = 40, - [0][1][2][1][RTW89_MKK][15] = 68, -@@ -31292,6 +32462,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][15] = 40, - [0][1][2][1][RTW89_CN][15] = 127, - [0][1][2][1][RTW89_UK][15] = 40, -+ [0][1][2][1][RTW89_MEXICO][15] = 60, -+ [0][1][2][1][RTW89_UKRAINE][15] = 30, -+ [0][1][2][1][RTW89_CHILE][15] = 60, -+ [0][1][2][1][RTW89_QATAR][15] = 40, - [0][1][2][1][RTW89_FCC][17] = 62, - [0][1][2][1][RTW89_ETSI][17] = 40, - [0][1][2][1][RTW89_MKK][17] = 68, -@@ -31300,6 +32474,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][17] = 40, - [0][1][2][1][RTW89_CN][17] = 127, - [0][1][2][1][RTW89_UK][17] = 40, -+ [0][1][2][1][RTW89_MEXICO][17] = 62, -+ [0][1][2][1][RTW89_UKRAINE][17] = 30, -+ [0][1][2][1][RTW89_CHILE][17] = 60, -+ [0][1][2][1][RTW89_QATAR][17] = 40, - [0][1][2][1][RTW89_FCC][19] = 62, - [0][1][2][1][RTW89_ETSI][19] = 40, - [0][1][2][1][RTW89_MKK][19] = 68, -@@ -31308,6 +32486,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][19] = 40, - [0][1][2][1][RTW89_CN][19] = 127, - [0][1][2][1][RTW89_UK][19] = 40, -+ [0][1][2][1][RTW89_MEXICO][19] = 62, -+ [0][1][2][1][RTW89_UKRAINE][19] = 30, -+ [0][1][2][1][RTW89_CHILE][19] = 60, -+ [0][1][2][1][RTW89_QATAR][19] = 40, - [0][1][2][1][RTW89_FCC][21] = 62, - [0][1][2][1][RTW89_ETSI][21] = 40, - [0][1][2][1][RTW89_MKK][21] = 68, -@@ -31316,6 +32498,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][21] = 40, - [0][1][2][1][RTW89_CN][21] = 127, - [0][1][2][1][RTW89_UK][21] = 40, -+ [0][1][2][1][RTW89_MEXICO][21] = 62, -+ [0][1][2][1][RTW89_UKRAINE][21] = 30, -+ [0][1][2][1][RTW89_CHILE][21] = 60, -+ [0][1][2][1][RTW89_QATAR][21] = 40, - [0][1][2][1][RTW89_FCC][23] = 62, - [0][1][2][1][RTW89_ETSI][23] = 40, - [0][1][2][1][RTW89_MKK][23] = 68, -@@ -31324,6 +32510,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][23] = 40, - [0][1][2][1][RTW89_CN][23] = 127, - [0][1][2][1][RTW89_UK][23] = 40, -+ [0][1][2][1][RTW89_MEXICO][23] = 62, -+ [0][1][2][1][RTW89_UKRAINE][23] = 30, -+ [0][1][2][1][RTW89_CHILE][23] = 60, -+ [0][1][2][1][RTW89_QATAR][23] = 40, - [0][1][2][1][RTW89_FCC][25] = 46, - [0][1][2][1][RTW89_ETSI][25] = 40, - [0][1][2][1][RTW89_MKK][25] = 68, -@@ -31332,6 +32522,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][25] = 127, - [0][1][2][1][RTW89_CN][25] = 127, - [0][1][2][1][RTW89_UK][25] = 40, -+ [0][1][2][1][RTW89_MEXICO][25] = 46, -+ [0][1][2][1][RTW89_UKRAINE][25] = 30, -+ [0][1][2][1][RTW89_CHILE][25] = 60, -+ [0][1][2][1][RTW89_QATAR][25] = 40, - [0][1][2][1][RTW89_FCC][27] = 46, - [0][1][2][1][RTW89_ETSI][27] = 40, - [0][1][2][1][RTW89_MKK][27] = 68, -@@ -31340,6 +32534,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][27] = 127, - [0][1][2][1][RTW89_CN][27] = 127, - [0][1][2][1][RTW89_UK][27] = 40, -+ [0][1][2][1][RTW89_MEXICO][27] = 46, -+ [0][1][2][1][RTW89_UKRAINE][27] = 30, -+ [0][1][2][1][RTW89_CHILE][27] = 46, -+ [0][1][2][1][RTW89_QATAR][27] = 40, - [0][1][2][1][RTW89_FCC][29] = 46, - [0][1][2][1][RTW89_ETSI][29] = 40, - [0][1][2][1][RTW89_MKK][29] = 68, -@@ -31348,6 +32546,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][29] = 127, - [0][1][2][1][RTW89_CN][29] = 127, - [0][1][2][1][RTW89_UK][29] = 40, -+ [0][1][2][1][RTW89_MEXICO][29] = 46, -+ [0][1][2][1][RTW89_UKRAINE][29] = 30, -+ [0][1][2][1][RTW89_CHILE][29] = 46, -+ [0][1][2][1][RTW89_QATAR][29] = 40, - [0][1][2][1][RTW89_FCC][31] = 46, - [0][1][2][1][RTW89_ETSI][31] = 40, - [0][1][2][1][RTW89_MKK][31] = 68, -@@ -31356,6 +32558,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][31] = 40, - [0][1][2][1][RTW89_CN][31] = 127, - [0][1][2][1][RTW89_UK][31] = 40, -+ [0][1][2][1][RTW89_MEXICO][31] = 46, -+ [0][1][2][1][RTW89_UKRAINE][31] = 30, -+ [0][1][2][1][RTW89_CHILE][31] = 46, -+ [0][1][2][1][RTW89_QATAR][31] = 40, - [0][1][2][1][RTW89_FCC][33] = 46, - [0][1][2][1][RTW89_ETSI][33] = 40, - [0][1][2][1][RTW89_MKK][33] = 68, -@@ -31364,6 +32570,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][33] = 40, - [0][1][2][1][RTW89_CN][33] = 127, - [0][1][2][1][RTW89_UK][33] = 40, -+ [0][1][2][1][RTW89_MEXICO][33] = 46, -+ [0][1][2][1][RTW89_UKRAINE][33] = 30, -+ [0][1][2][1][RTW89_CHILE][33] = 46, -+ [0][1][2][1][RTW89_QATAR][33] = 40, - [0][1][2][1][RTW89_FCC][35] = 46, - [0][1][2][1][RTW89_ETSI][35] = 40, - [0][1][2][1][RTW89_MKK][35] = 68, -@@ -31372,6 +32582,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][35] = 40, - [0][1][2][1][RTW89_CN][35] = 127, - [0][1][2][1][RTW89_UK][35] = 40, -+ [0][1][2][1][RTW89_MEXICO][35] = 46, -+ [0][1][2][1][RTW89_UKRAINE][35] = 30, -+ [0][1][2][1][RTW89_CHILE][35] = 46, -+ [0][1][2][1][RTW89_QATAR][35] = 40, - [0][1][2][1][RTW89_FCC][37] = 64, - [0][1][2][1][RTW89_ETSI][37] = 127, - [0][1][2][1][RTW89_MKK][37] = 68, -@@ -31380,6 +32594,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][37] = 64, - [0][1][2][1][RTW89_CN][37] = 127, - [0][1][2][1][RTW89_UK][37] = 40, -+ [0][1][2][1][RTW89_MEXICO][37] = 64, -+ [0][1][2][1][RTW89_UKRAINE][37] = 127, -+ [0][1][2][1][RTW89_CHILE][37] = 64, -+ [0][1][2][1][RTW89_QATAR][37] = 127, - [0][1][2][1][RTW89_FCC][38] = 72, - [0][1][2][1][RTW89_ETSI][38] = 6, - [0][1][2][1][RTW89_MKK][38] = 127, -@@ -31388,6 +32606,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][38] = 70, - [0][1][2][1][RTW89_CN][38] = 60, - [0][1][2][1][RTW89_UK][38] = 40, -+ [0][1][2][1][RTW89_MEXICO][38] = 72, -+ [0][1][2][1][RTW89_UKRAINE][38] = 6, -+ [0][1][2][1][RTW89_CHILE][38] = 60, -+ [0][1][2][1][RTW89_QATAR][38] = 6, - [0][1][2][1][RTW89_FCC][40] = 72, - [0][1][2][1][RTW89_ETSI][40] = 6, - [0][1][2][1][RTW89_MKK][40] = 127, -@@ -31396,6 +32618,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][40] = 70, - [0][1][2][1][RTW89_CN][40] = 60, - [0][1][2][1][RTW89_UK][40] = 40, -+ [0][1][2][1][RTW89_MEXICO][40] = 72, -+ [0][1][2][1][RTW89_UKRAINE][40] = 6, -+ [0][1][2][1][RTW89_CHILE][40] = 60, -+ [0][1][2][1][RTW89_QATAR][40] = 6, - [0][1][2][1][RTW89_FCC][42] = 72, - [0][1][2][1][RTW89_ETSI][42] = 6, - [0][1][2][1][RTW89_MKK][42] = 127, -@@ -31404,6 +32630,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][42] = 70, - [0][1][2][1][RTW89_CN][42] = 60, - [0][1][2][1][RTW89_UK][42] = 40, -+ [0][1][2][1][RTW89_MEXICO][42] = 72, -+ [0][1][2][1][RTW89_UKRAINE][42] = 6, -+ [0][1][2][1][RTW89_CHILE][42] = 60, -+ [0][1][2][1][RTW89_QATAR][42] = 6, - [0][1][2][1][RTW89_FCC][44] = 72, - [0][1][2][1][RTW89_ETSI][44] = 6, - [0][1][2][1][RTW89_MKK][44] = 127, -@@ -31412,6 +32642,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][44] = 70, - [0][1][2][1][RTW89_CN][44] = 54, - [0][1][2][1][RTW89_UK][44] = 40, -+ [0][1][2][1][RTW89_MEXICO][44] = 72, -+ [0][1][2][1][RTW89_UKRAINE][44] = 6, -+ [0][1][2][1][RTW89_CHILE][44] = 60, -+ [0][1][2][1][RTW89_QATAR][44] = 6, - [0][1][2][1][RTW89_FCC][46] = 72, - [0][1][2][1][RTW89_ETSI][46] = 6, - [0][1][2][1][RTW89_MKK][46] = 127, -@@ -31420,6 +32654,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][46] = 70, - [0][1][2][1][RTW89_CN][46] = 54, - [0][1][2][1][RTW89_UK][46] = 40, -+ [0][1][2][1][RTW89_MEXICO][46] = 72, -+ [0][1][2][1][RTW89_UKRAINE][46] = 6, -+ [0][1][2][1][RTW89_CHILE][46] = 60, -+ [0][1][2][1][RTW89_QATAR][46] = 6, - [0][1][2][1][RTW89_FCC][48] = 48, - [0][1][2][1][RTW89_ETSI][48] = 127, - [0][1][2][1][RTW89_MKK][48] = 127, -@@ -31428,6 +32666,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][48] = 127, - [0][1][2][1][RTW89_CN][48] = 127, - [0][1][2][1][RTW89_UK][48] = 127, -+ [0][1][2][1][RTW89_MEXICO][48] = 127, -+ [0][1][2][1][RTW89_UKRAINE][48] = 127, -+ [0][1][2][1][RTW89_CHILE][48] = 127, -+ [0][1][2][1][RTW89_QATAR][48] = 127, - [0][1][2][1][RTW89_FCC][50] = 50, - [0][1][2][1][RTW89_ETSI][50] = 127, - [0][1][2][1][RTW89_MKK][50] = 127, -@@ -31436,6 +32678,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][50] = 127, - [0][1][2][1][RTW89_CN][50] = 127, - [0][1][2][1][RTW89_UK][50] = 127, -+ [0][1][2][1][RTW89_MEXICO][50] = 127, -+ [0][1][2][1][RTW89_UKRAINE][50] = 127, -+ [0][1][2][1][RTW89_CHILE][50] = 127, -+ [0][1][2][1][RTW89_QATAR][50] = 127, - [0][1][2][1][RTW89_FCC][52] = 48, - [0][1][2][1][RTW89_ETSI][52] = 127, - [0][1][2][1][RTW89_MKK][52] = 127, -@@ -31444,22 +32690,34 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][52] = 127, - [0][1][2][1][RTW89_CN][52] = 127, - [0][1][2][1][RTW89_UK][52] = 127, -+ [0][1][2][1][RTW89_MEXICO][52] = 127, -+ [0][1][2][1][RTW89_UKRAINE][52] = 127, -+ [0][1][2][1][RTW89_CHILE][52] = 127, -+ [0][1][2][1][RTW89_QATAR][52] = 127, - [1][0][2][0][RTW89_FCC][1] = 64, - [1][0][2][0][RTW89_ETSI][1] = 66, - [1][0][2][0][RTW89_MKK][1] = 66, - [1][0][2][0][RTW89_IC][1] = 62, -- [1][0][2][0][RTW89_KCC][1] = 66, -+ [1][0][2][0][RTW89_KCC][1] = 54, - [1][0][2][0][RTW89_ACMA][1] = 66, - [1][0][2][0][RTW89_CN][1] = 54, - [1][0][2][0][RTW89_UK][1] = 66, -+ [1][0][2][0][RTW89_MEXICO][1] = 62, -+ [1][0][2][0][RTW89_UKRAINE][1] = 54, -+ [1][0][2][0][RTW89_CHILE][1] = 62, -+ [1][0][2][0][RTW89_QATAR][1] = 66, - [1][0][2][0][RTW89_FCC][5] = 68, - [1][0][2][0][RTW89_ETSI][5] = 66, - [1][0][2][0][RTW89_MKK][5] = 66, - [1][0][2][0][RTW89_IC][5] = 64, -- [1][0][2][0][RTW89_KCC][5] = 54, -+ [1][0][2][0][RTW89_KCC][5] = 66, - [1][0][2][0][RTW89_ACMA][5] = 66, - [1][0][2][0][RTW89_CN][5] = 54, - [1][0][2][0][RTW89_UK][5] = 66, -+ [1][0][2][0][RTW89_MEXICO][5] = 62, -+ [1][0][2][0][RTW89_UKRAINE][5] = 54, -+ [1][0][2][0][RTW89_CHILE][5] = 66, -+ [1][0][2][0][RTW89_QATAR][5] = 66, - [1][0][2][0][RTW89_FCC][9] = 68, - [1][0][2][0][RTW89_ETSI][9] = 66, - [1][0][2][0][RTW89_MKK][9] = 66, -@@ -31468,6 +32726,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_ACMA][9] = 66, - [1][0][2][0][RTW89_CN][9] = 54, - [1][0][2][0][RTW89_UK][9] = 66, -+ [1][0][2][0][RTW89_MEXICO][9] = 68, -+ [1][0][2][0][RTW89_UKRAINE][9] = 54, -+ [1][0][2][0][RTW89_CHILE][9] = 66, -+ [1][0][2][0][RTW89_QATAR][9] = 66, - [1][0][2][0][RTW89_FCC][13] = 60, - [1][0][2][0][RTW89_ETSI][13] = 66, - [1][0][2][0][RTW89_MKK][13] = 66, -@@ -31476,6 +32738,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_ACMA][13] = 66, - [1][0][2][0][RTW89_CN][13] = 54, - [1][0][2][0][RTW89_UK][13] = 66, -+ [1][0][2][0][RTW89_MEXICO][13] = 60, -+ [1][0][2][0][RTW89_UKRAINE][13] = 54, -+ [1][0][2][0][RTW89_CHILE][13] = 60, -+ [1][0][2][0][RTW89_QATAR][13] = 66, - [1][0][2][0][RTW89_FCC][16] = 64, - [1][0][2][0][RTW89_ETSI][16] = 66, - [1][0][2][0][RTW89_MKK][16] = 66, -@@ -31484,6 +32750,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_ACMA][16] = 66, - [1][0][2][0][RTW89_CN][16] = 127, - [1][0][2][0][RTW89_UK][16] = 66, -+ [1][0][2][0][RTW89_MEXICO][16] = 64, -+ [1][0][2][0][RTW89_UKRAINE][16] = 54, -+ [1][0][2][0][RTW89_CHILE][16] = 64, -+ [1][0][2][0][RTW89_QATAR][16] = 66, - [1][0][2][0][RTW89_FCC][20] = 68, - [1][0][2][0][RTW89_ETSI][20] = 66, - [1][0][2][0][RTW89_MKK][20] = 66, -@@ -31492,6 +32762,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_ACMA][20] = 66, - [1][0][2][0][RTW89_CN][20] = 127, - [1][0][2][0][RTW89_UK][20] = 66, -+ [1][0][2][0][RTW89_MEXICO][20] = 68, -+ [1][0][2][0][RTW89_UKRAINE][20] = 54, -+ [1][0][2][0][RTW89_CHILE][20] = 66, -+ [1][0][2][0][RTW89_QATAR][20] = 66, - [1][0][2][0][RTW89_FCC][24] = 68, - [1][0][2][0][RTW89_ETSI][24] = 66, - [1][0][2][0][RTW89_MKK][24] = 66, -@@ -31500,6 +32774,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_ACMA][24] = 127, - [1][0][2][0][RTW89_CN][24] = 127, - [1][0][2][0][RTW89_UK][24] = 66, -+ [1][0][2][0][RTW89_MEXICO][24] = 68, -+ [1][0][2][0][RTW89_UKRAINE][24] = 54, -+ [1][0][2][0][RTW89_CHILE][24] = 66, -+ [1][0][2][0][RTW89_QATAR][24] = 66, - [1][0][2][0][RTW89_FCC][28] = 68, - [1][0][2][0][RTW89_ETSI][28] = 66, - [1][0][2][0][RTW89_MKK][28] = 66, -@@ -31508,6 +32786,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_ACMA][28] = 127, - [1][0][2][0][RTW89_CN][28] = 127, - [1][0][2][0][RTW89_UK][28] = 66, -+ [1][0][2][0][RTW89_MEXICO][28] = 68, -+ [1][0][2][0][RTW89_UKRAINE][28] = 54, -+ [1][0][2][0][RTW89_CHILE][28] = 62, -+ [1][0][2][0][RTW89_QATAR][28] = 66, - [1][0][2][0][RTW89_FCC][32] = 62, - [1][0][2][0][RTW89_ETSI][32] = 66, - [1][0][2][0][RTW89_MKK][32] = 66, -@@ -31516,6 +32798,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_ACMA][32] = 66, - [1][0][2][0][RTW89_CN][32] = 127, - [1][0][2][0][RTW89_UK][32] = 66, -+ [1][0][2][0][RTW89_MEXICO][32] = 62, -+ [1][0][2][0][RTW89_UKRAINE][32] = 54, -+ [1][0][2][0][RTW89_CHILE][32] = 62, -+ [1][0][2][0][RTW89_QATAR][32] = 66, - [1][0][2][0][RTW89_FCC][36] = 68, - [1][0][2][0][RTW89_ETSI][36] = 127, - [1][0][2][0][RTW89_MKK][36] = 66, -@@ -31524,6 +32810,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_ACMA][36] = 66, - [1][0][2][0][RTW89_CN][36] = 127, - [1][0][2][0][RTW89_UK][36] = 64, -+ [1][0][2][0][RTW89_MEXICO][36] = 68, -+ [1][0][2][0][RTW89_UKRAINE][36] = 127, -+ [1][0][2][0][RTW89_CHILE][36] = 66, -+ [1][0][2][0][RTW89_QATAR][36] = 127, - [1][0][2][0][RTW89_FCC][39] = 68, - [1][0][2][0][RTW89_ETSI][39] = 30, - [1][0][2][0][RTW89_MKK][39] = 127, -@@ -31532,6 +32822,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_ACMA][39] = 66, - [1][0][2][0][RTW89_CN][39] = 62, - [1][0][2][0][RTW89_UK][39] = 64, -+ [1][0][2][0][RTW89_MEXICO][39] = 68, -+ [1][0][2][0][RTW89_UKRAINE][39] = 30, -+ [1][0][2][0][RTW89_CHILE][39] = 66, -+ [1][0][2][0][RTW89_QATAR][39] = 30, - [1][0][2][0][RTW89_FCC][43] = 68, - [1][0][2][0][RTW89_ETSI][43] = 30, - [1][0][2][0][RTW89_MKK][43] = 127, -@@ -31540,6 +32834,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_ACMA][43] = 66, - [1][0][2][0][RTW89_CN][43] = 66, - [1][0][2][0][RTW89_UK][43] = 64, -+ [1][0][2][0][RTW89_MEXICO][43] = 68, -+ [1][0][2][0][RTW89_UKRAINE][43] = 30, -+ [1][0][2][0][RTW89_CHILE][43] = 66, -+ [1][0][2][0][RTW89_QATAR][43] = 30, - [1][0][2][0][RTW89_FCC][47] = 68, - [1][0][2][0][RTW89_ETSI][47] = 127, - [1][0][2][0][RTW89_MKK][47] = 127, -@@ -31548,6 +32846,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_ACMA][47] = 127, - [1][0][2][0][RTW89_CN][47] = 127, - [1][0][2][0][RTW89_UK][47] = 127, -+ [1][0][2][0][RTW89_MEXICO][47] = 127, -+ [1][0][2][0][RTW89_UKRAINE][47] = 127, -+ [1][0][2][0][RTW89_CHILE][47] = 127, -+ [1][0][2][0][RTW89_QATAR][47] = 127, - [1][0][2][0][RTW89_FCC][51] = 68, - [1][0][2][0][RTW89_ETSI][51] = 127, - [1][0][2][0][RTW89_MKK][51] = 127, -@@ -31556,6 +32858,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_ACMA][51] = 127, - [1][0][2][0][RTW89_CN][51] = 127, - [1][0][2][0][RTW89_UK][51] = 127, -+ [1][0][2][0][RTW89_MEXICO][51] = 127, -+ [1][0][2][0][RTW89_UKRAINE][51] = 127, -+ [1][0][2][0][RTW89_CHILE][51] = 127, -+ [1][0][2][0][RTW89_QATAR][51] = 127, - [1][1][2][0][RTW89_FCC][1] = 54, - [1][1][2][0][RTW89_ETSI][1] = 54, - [1][1][2][0][RTW89_MKK][1] = 48, -@@ -31564,6 +32870,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][0][RTW89_ACMA][1] = 54, - [1][1][2][0][RTW89_CN][1] = 42, - [1][1][2][0][RTW89_UK][1] = 54, -+ [1][1][2][0][RTW89_MEXICO][1] = 50, -+ [1][1][2][0][RTW89_UKRAINE][1] = 42, -+ [1][1][2][0][RTW89_CHILE][1] = 54, -+ [1][1][2][0][RTW89_QATAR][1] = 54, - [1][1][2][0][RTW89_FCC][5] = 68, - [1][1][2][0][RTW89_ETSI][5] = 54, - [1][1][2][0][RTW89_MKK][5] = 52, -@@ -31572,6 +32882,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][0][RTW89_ACMA][5] = 54, - [1][1][2][0][RTW89_CN][5] = 42, - [1][1][2][0][RTW89_UK][5] = 54, -+ [1][1][2][0][RTW89_MEXICO][5] = 50, -+ [1][1][2][0][RTW89_UKRAINE][5] = 42, -+ [1][1][2][0][RTW89_CHILE][5] = 66, -+ [1][1][2][0][RTW89_QATAR][5] = 54, - [1][1][2][0][RTW89_FCC][9] = 68, - [1][1][2][0][RTW89_ETSI][9] = 54, - [1][1][2][0][RTW89_MKK][9] = 52, -@@ -31580,6 +32894,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][0][RTW89_ACMA][9] = 54, - [1][1][2][0][RTW89_CN][9] = 42, - [1][1][2][0][RTW89_UK][9] = 54, -+ [1][1][2][0][RTW89_MEXICO][9] = 68, -+ [1][1][2][0][RTW89_UKRAINE][9] = 42, -+ [1][1][2][0][RTW89_CHILE][9] = 66, -+ [1][1][2][0][RTW89_QATAR][9] = 54, - [1][1][2][0][RTW89_FCC][13] = 54, - [1][1][2][0][RTW89_ETSI][13] = 54, - [1][1][2][0][RTW89_MKK][13] = 52, -@@ -31588,6 +32906,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][0][RTW89_ACMA][13] = 54, - [1][1][2][0][RTW89_CN][13] = 42, - [1][1][2][0][RTW89_UK][13] = 54, -+ [1][1][2][0][RTW89_MEXICO][13] = 54, -+ [1][1][2][0][RTW89_UKRAINE][13] = 42, -+ [1][1][2][0][RTW89_CHILE][13] = 54, -+ [1][1][2][0][RTW89_QATAR][13] = 54, - [1][1][2][0][RTW89_FCC][16] = 56, - [1][1][2][0][RTW89_ETSI][16] = 54, - [1][1][2][0][RTW89_MKK][16] = 66, -@@ -31596,6 +32918,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][0][RTW89_ACMA][16] = 54, - [1][1][2][0][RTW89_CN][16] = 127, - [1][1][2][0][RTW89_UK][16] = 54, -+ [1][1][2][0][RTW89_MEXICO][16] = 56, -+ [1][1][2][0][RTW89_UKRAINE][16] = 42, -+ [1][1][2][0][RTW89_CHILE][16] = 54, -+ [1][1][2][0][RTW89_QATAR][16] = 54, - [1][1][2][0][RTW89_FCC][20] = 68, - [1][1][2][0][RTW89_ETSI][20] = 54, - [1][1][2][0][RTW89_MKK][20] = 66, -@@ -31604,6 +32930,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][0][RTW89_ACMA][20] = 54, - [1][1][2][0][RTW89_CN][20] = 127, - [1][1][2][0][RTW89_UK][20] = 54, -+ [1][1][2][0][RTW89_MEXICO][20] = 68, -+ [1][1][2][0][RTW89_UKRAINE][20] = 42, -+ [1][1][2][0][RTW89_CHILE][20] = 66, -+ [1][1][2][0][RTW89_QATAR][20] = 54, - [1][1][2][0][RTW89_FCC][24] = 68, - [1][1][2][0][RTW89_ETSI][24] = 54, - [1][1][2][0][RTW89_MKK][24] = 66, -@@ -31612,6 +32942,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][0][RTW89_ACMA][24] = 127, - [1][1][2][0][RTW89_CN][24] = 127, - [1][1][2][0][RTW89_UK][24] = 54, -+ [1][1][2][0][RTW89_MEXICO][24] = 68, -+ [1][1][2][0][RTW89_UKRAINE][24] = 42, -+ [1][1][2][0][RTW89_CHILE][24] = 66, -+ [1][1][2][0][RTW89_QATAR][24] = 54, - [1][1][2][0][RTW89_FCC][28] = 68, - [1][1][2][0][RTW89_ETSI][28] = 54, - [1][1][2][0][RTW89_MKK][28] = 66, -@@ -31620,6 +32954,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][0][RTW89_ACMA][28] = 127, - [1][1][2][0][RTW89_CN][28] = 127, - [1][1][2][0][RTW89_UK][28] = 54, -+ [1][1][2][0][RTW89_MEXICO][28] = 68, -+ [1][1][2][0][RTW89_UKRAINE][28] = 42, -+ [1][1][2][0][RTW89_CHILE][28] = 54, -+ [1][1][2][0][RTW89_QATAR][28] = 54, - [1][1][2][0][RTW89_FCC][32] = 56, - [1][1][2][0][RTW89_ETSI][32] = 54, - [1][1][2][0][RTW89_MKK][32] = 66, -@@ -31628,6 +32966,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][0][RTW89_ACMA][32] = 54, - [1][1][2][0][RTW89_CN][32] = 127, - [1][1][2][0][RTW89_UK][32] = 54, -+ [1][1][2][0][RTW89_MEXICO][32] = 56, -+ [1][1][2][0][RTW89_UKRAINE][32] = 42, -+ [1][1][2][0][RTW89_CHILE][32] = 54, -+ [1][1][2][0][RTW89_QATAR][32] = 54, - [1][1][2][0][RTW89_FCC][36] = 68, - [1][1][2][0][RTW89_ETSI][36] = 127, - [1][1][2][0][RTW89_MKK][36] = 66, -@@ -31636,6 +32978,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][0][RTW89_ACMA][36] = 66, - [1][1][2][0][RTW89_CN][36] = 127, - [1][1][2][0][RTW89_UK][36] = 52, -+ [1][1][2][0][RTW89_MEXICO][36] = 68, -+ [1][1][2][0][RTW89_UKRAINE][36] = 127, -+ [1][1][2][0][RTW89_CHILE][36] = 66, -+ [1][1][2][0][RTW89_QATAR][36] = 127, - [1][1][2][0][RTW89_FCC][39] = 68, - [1][1][2][0][RTW89_ETSI][39] = 18, - [1][1][2][0][RTW89_MKK][39] = 127, -@@ -31644,6 +32990,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][0][RTW89_ACMA][39] = 66, - [1][1][2][0][RTW89_CN][39] = 62, - [1][1][2][0][RTW89_UK][39] = 52, -+ [1][1][2][0][RTW89_MEXICO][39] = 68, -+ [1][1][2][0][RTW89_UKRAINE][39] = 18, -+ [1][1][2][0][RTW89_CHILE][39] = 66, -+ [1][1][2][0][RTW89_QATAR][39] = 18, - [1][1][2][0][RTW89_FCC][43] = 68, - [1][1][2][0][RTW89_ETSI][43] = 18, - [1][1][2][0][RTW89_MKK][43] = 127, -@@ -31652,6 +33002,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][0][RTW89_ACMA][43] = 66, - [1][1][2][0][RTW89_CN][43] = 66, - [1][1][2][0][RTW89_UK][43] = 52, -+ [1][1][2][0][RTW89_MEXICO][43] = 68, -+ [1][1][2][0][RTW89_UKRAINE][43] = 18, -+ [1][1][2][0][RTW89_CHILE][43] = 66, -+ [1][1][2][0][RTW89_QATAR][43] = 18, - [1][1][2][0][RTW89_FCC][47] = 62, - [1][1][2][0][RTW89_ETSI][47] = 127, - [1][1][2][0][RTW89_MKK][47] = 127, -@@ -31660,6 +33014,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][0][RTW89_ACMA][47] = 127, - [1][1][2][0][RTW89_CN][47] = 127, - [1][1][2][0][RTW89_UK][47] = 127, -+ [1][1][2][0][RTW89_MEXICO][47] = 127, -+ [1][1][2][0][RTW89_UKRAINE][47] = 127, -+ [1][1][2][0][RTW89_CHILE][47] = 127, -+ [1][1][2][0][RTW89_QATAR][47] = 127, - [1][1][2][0][RTW89_FCC][51] = 60, - [1][1][2][0][RTW89_ETSI][51] = 127, - [1][1][2][0][RTW89_MKK][51] = 127, -@@ -31668,6 +33026,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][0][RTW89_ACMA][51] = 127, - [1][1][2][0][RTW89_CN][51] = 127, - [1][1][2][0][RTW89_UK][51] = 127, -+ [1][1][2][0][RTW89_MEXICO][51] = 127, -+ [1][1][2][0][RTW89_UKRAINE][51] = 127, -+ [1][1][2][0][RTW89_CHILE][51] = 127, -+ [1][1][2][0][RTW89_QATAR][51] = 127, - [1][1][2][1][RTW89_FCC][1] = 54, - [1][1][2][1][RTW89_ETSI][1] = 40, - [1][1][2][1][RTW89_MKK][1] = 48, -@@ -31676,6 +33038,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_ACMA][1] = 40, - [1][1][2][1][RTW89_CN][1] = 42, - [1][1][2][1][RTW89_UK][1] = 40, -+ [1][1][2][1][RTW89_MEXICO][1] = 50, -+ [1][1][2][1][RTW89_UKRAINE][1] = 30, -+ [1][1][2][1][RTW89_CHILE][1] = 54, -+ [1][1][2][1][RTW89_QATAR][1] = 40, - [1][1][2][1][RTW89_FCC][5] = 68, - [1][1][2][1][RTW89_ETSI][5] = 40, - [1][1][2][1][RTW89_MKK][5] = 52, -@@ -31684,6 +33050,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_ACMA][5] = 40, - [1][1][2][1][RTW89_CN][5] = 42, - [1][1][2][1][RTW89_UK][5] = 40, -+ [1][1][2][1][RTW89_MEXICO][5] = 50, -+ [1][1][2][1][RTW89_UKRAINE][5] = 30, -+ [1][1][2][1][RTW89_CHILE][5] = 60, -+ [1][1][2][1][RTW89_QATAR][5] = 40, - [1][1][2][1][RTW89_FCC][9] = 68, - [1][1][2][1][RTW89_ETSI][9] = 40, - [1][1][2][1][RTW89_MKK][9] = 52, -@@ -31692,6 +33062,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_ACMA][9] = 40, - [1][1][2][1][RTW89_CN][9] = 42, - [1][1][2][1][RTW89_UK][9] = 40, -+ [1][1][2][1][RTW89_MEXICO][9] = 68, -+ [1][1][2][1][RTW89_UKRAINE][9] = 30, -+ [1][1][2][1][RTW89_CHILE][9] = 60, -+ [1][1][2][1][RTW89_QATAR][9] = 40, - [1][1][2][1][RTW89_FCC][13] = 54, - [1][1][2][1][RTW89_ETSI][13] = 40, - [1][1][2][1][RTW89_MKK][13] = 52, -@@ -31700,6 +33074,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_ACMA][13] = 40, - [1][1][2][1][RTW89_CN][13] = 42, - [1][1][2][1][RTW89_UK][13] = 40, -+ [1][1][2][1][RTW89_MEXICO][13] = 54, -+ [1][1][2][1][RTW89_UKRAINE][13] = 30, -+ [1][1][2][1][RTW89_CHILE][13] = 54, -+ [1][1][2][1][RTW89_QATAR][13] = 40, - [1][1][2][1][RTW89_FCC][16] = 56, - [1][1][2][1][RTW89_ETSI][16] = 40, - [1][1][2][1][RTW89_MKK][16] = 66, -@@ -31708,6 +33086,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_ACMA][16] = 40, - [1][1][2][1][RTW89_CN][16] = 127, - [1][1][2][1][RTW89_UK][16] = 40, -+ [1][1][2][1][RTW89_MEXICO][16] = 56, -+ [1][1][2][1][RTW89_UKRAINE][16] = 30, -+ [1][1][2][1][RTW89_CHILE][16] = 54, -+ [1][1][2][1][RTW89_QATAR][16] = 40, - [1][1][2][1][RTW89_FCC][20] = 68, - [1][1][2][1][RTW89_ETSI][20] = 40, - [1][1][2][1][RTW89_MKK][20] = 66, -@@ -31716,6 +33098,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_ACMA][20] = 40, - [1][1][2][1][RTW89_CN][20] = 127, - [1][1][2][1][RTW89_UK][20] = 40, -+ [1][1][2][1][RTW89_MEXICO][20] = 68, -+ [1][1][2][1][RTW89_UKRAINE][20] = 30, -+ [1][1][2][1][RTW89_CHILE][20] = 60, -+ [1][1][2][1][RTW89_QATAR][20] = 40, - [1][1][2][1][RTW89_FCC][24] = 68, - [1][1][2][1][RTW89_ETSI][24] = 40, - [1][1][2][1][RTW89_MKK][24] = 66, -@@ -31724,6 +33110,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_ACMA][24] = 127, - [1][1][2][1][RTW89_CN][24] = 127, - [1][1][2][1][RTW89_UK][24] = 40, -+ [1][1][2][1][RTW89_MEXICO][24] = 68, -+ [1][1][2][1][RTW89_UKRAINE][24] = 30, -+ [1][1][2][1][RTW89_CHILE][24] = 60, -+ [1][1][2][1][RTW89_QATAR][24] = 40, - [1][1][2][1][RTW89_FCC][28] = 68, - [1][1][2][1][RTW89_ETSI][28] = 40, - [1][1][2][1][RTW89_MKK][28] = 66, -@@ -31732,6 +33122,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_ACMA][28] = 127, - [1][1][2][1][RTW89_CN][28] = 127, - [1][1][2][1][RTW89_UK][28] = 40, -+ [1][1][2][1][RTW89_MEXICO][28] = 68, -+ [1][1][2][1][RTW89_UKRAINE][28] = 30, -+ [1][1][2][1][RTW89_CHILE][28] = 54, -+ [1][1][2][1][RTW89_QATAR][28] = 40, - [1][1][2][1][RTW89_FCC][32] = 56, - [1][1][2][1][RTW89_ETSI][32] = 40, - [1][1][2][1][RTW89_MKK][32] = 66, -@@ -31740,6 +33134,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_ACMA][32] = 40, - [1][1][2][1][RTW89_CN][32] = 127, - [1][1][2][1][RTW89_UK][32] = 40, -+ [1][1][2][1][RTW89_MEXICO][32] = 56, -+ [1][1][2][1][RTW89_UKRAINE][32] = 30, -+ [1][1][2][1][RTW89_CHILE][32] = 54, -+ [1][1][2][1][RTW89_QATAR][32] = 40, - [1][1][2][1][RTW89_FCC][36] = 68, - [1][1][2][1][RTW89_ETSI][36] = 127, - [1][1][2][1][RTW89_MKK][36] = 66, -@@ -31748,6 +33146,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_ACMA][36] = 66, - [1][1][2][1][RTW89_CN][36] = 127, - [1][1][2][1][RTW89_UK][36] = 40, -+ [1][1][2][1][RTW89_MEXICO][36] = 68, -+ [1][1][2][1][RTW89_UKRAINE][36] = 127, -+ [1][1][2][1][RTW89_CHILE][36] = 66, -+ [1][1][2][1][RTW89_QATAR][36] = 127, - [1][1][2][1][RTW89_FCC][39] = 68, - [1][1][2][1][RTW89_ETSI][39] = 6, - [1][1][2][1][RTW89_MKK][39] = 127, -@@ -31756,6 +33158,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_ACMA][39] = 66, - [1][1][2][1][RTW89_CN][39] = 60, - [1][1][2][1][RTW89_UK][39] = 40, -+ [1][1][2][1][RTW89_MEXICO][39] = 68, -+ [1][1][2][1][RTW89_UKRAINE][39] = 6, -+ [1][1][2][1][RTW89_CHILE][39] = 60, -+ [1][1][2][1][RTW89_QATAR][39] = 6, - [1][1][2][1][RTW89_FCC][43] = 68, - [1][1][2][1][RTW89_ETSI][43] = 6, - [1][1][2][1][RTW89_MKK][43] = 127, -@@ -31764,6 +33170,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_ACMA][43] = 66, - [1][1][2][1][RTW89_CN][43] = 52, - [1][1][2][1][RTW89_UK][43] = 40, -+ [1][1][2][1][RTW89_MEXICO][43] = 68, -+ [1][1][2][1][RTW89_UKRAINE][43] = 6, -+ [1][1][2][1][RTW89_CHILE][43] = 60, -+ [1][1][2][1][RTW89_QATAR][43] = 6, - [1][1][2][1][RTW89_FCC][47] = 62, - [1][1][2][1][RTW89_ETSI][47] = 127, - [1][1][2][1][RTW89_MKK][47] = 127, -@@ -31772,6 +33182,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_ACMA][47] = 127, - [1][1][2][1][RTW89_CN][47] = 127, - [1][1][2][1][RTW89_UK][47] = 127, -+ [1][1][2][1][RTW89_MEXICO][47] = 127, -+ [1][1][2][1][RTW89_UKRAINE][47] = 127, -+ [1][1][2][1][RTW89_CHILE][47] = 127, -+ [1][1][2][1][RTW89_QATAR][47] = 127, - [1][1][2][1][RTW89_FCC][51] = 60, - [1][1][2][1][RTW89_ETSI][51] = 127, - [1][1][2][1][RTW89_MKK][51] = 127, -@@ -31780,6 +33194,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_ACMA][51] = 127, - [1][1][2][1][RTW89_CN][51] = 127, - [1][1][2][1][RTW89_UK][51] = 127, -+ [1][1][2][1][RTW89_MEXICO][51] = 127, -+ [1][1][2][1][RTW89_UKRAINE][51] = 127, -+ [1][1][2][1][RTW89_CHILE][51] = 127, -+ [1][1][2][1][RTW89_QATAR][51] = 127, - [2][0][2][0][RTW89_FCC][3] = 58, - [2][0][2][0][RTW89_ETSI][3] = 60, - [2][0][2][0][RTW89_MKK][3] = 60, -@@ -31788,6 +33206,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][0][2][0][RTW89_ACMA][3] = 60, - [2][0][2][0][RTW89_CN][3] = 54, - [2][0][2][0][RTW89_UK][3] = 60, -+ [2][0][2][0][RTW89_MEXICO][3] = 58, -+ [2][0][2][0][RTW89_UKRAINE][3] = 54, -+ [2][0][2][0][RTW89_CHILE][3] = 58, -+ [2][0][2][0][RTW89_QATAR][3] = 60, - [2][0][2][0][RTW89_FCC][11] = 50, - [2][0][2][0][RTW89_ETSI][11] = 60, - [2][0][2][0][RTW89_MKK][11] = 60, -@@ -31796,6 +33218,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][0][2][0][RTW89_ACMA][11] = 60, - [2][0][2][0][RTW89_CN][11] = 54, - [2][0][2][0][RTW89_UK][11] = 60, -+ [2][0][2][0][RTW89_MEXICO][11] = 50, -+ [2][0][2][0][RTW89_UKRAINE][11] = 54, -+ [2][0][2][0][RTW89_CHILE][11] = 50, -+ [2][0][2][0][RTW89_QATAR][11] = 60, - [2][0][2][0][RTW89_FCC][18] = 60, - [2][0][2][0][RTW89_ETSI][18] = 60, - [2][0][2][0][RTW89_MKK][18] = 60, -@@ -31804,6 +33230,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][0][2][0][RTW89_ACMA][18] = 60, - [2][0][2][0][RTW89_CN][18] = 127, - [2][0][2][0][RTW89_UK][18] = 60, -+ [2][0][2][0][RTW89_MEXICO][18] = 60, -+ [2][0][2][0][RTW89_UKRAINE][18] = 54, -+ [2][0][2][0][RTW89_CHILE][18] = 60, -+ [2][0][2][0][RTW89_QATAR][18] = 60, - [2][0][2][0][RTW89_FCC][26] = 62, - [2][0][2][0][RTW89_ETSI][26] = 60, - [2][0][2][0][RTW89_MKK][26] = 60, -@@ -31812,6 +33242,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][0][2][0][RTW89_ACMA][26] = 127, - [2][0][2][0][RTW89_CN][26] = 127, - [2][0][2][0][RTW89_UK][26] = 60, -+ [2][0][2][0][RTW89_MEXICO][26] = 62, -+ [2][0][2][0][RTW89_UKRAINE][26] = 54, -+ [2][0][2][0][RTW89_CHILE][26] = 60, -+ [2][0][2][0][RTW89_QATAR][26] = 60, - [2][0][2][0][RTW89_FCC][34] = 62, - [2][0][2][0][RTW89_ETSI][34] = 127, - [2][0][2][0][RTW89_MKK][34] = 60, -@@ -31820,6 +33254,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][0][2][0][RTW89_ACMA][34] = 60, - [2][0][2][0][RTW89_CN][34] = 127, - [2][0][2][0][RTW89_UK][34] = 60, -+ [2][0][2][0][RTW89_MEXICO][34] = 62, -+ [2][0][2][0][RTW89_UKRAINE][34] = 127, -+ [2][0][2][0][RTW89_CHILE][34] = 60, -+ [2][0][2][0][RTW89_QATAR][34] = 127, - [2][0][2][0][RTW89_FCC][41] = 62, - [2][0][2][0][RTW89_ETSI][41] = 30, - [2][0][2][0][RTW89_MKK][41] = 127, -@@ -31828,6 +33266,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][0][2][0][RTW89_ACMA][41] = 60, - [2][0][2][0][RTW89_CN][41] = 62, - [2][0][2][0][RTW89_UK][41] = 60, -+ [2][0][2][0][RTW89_MEXICO][41] = 62, -+ [2][0][2][0][RTW89_UKRAINE][41] = 30, -+ [2][0][2][0][RTW89_CHILE][41] = 60, -+ [2][0][2][0][RTW89_QATAR][41] = 30, - [2][0][2][0][RTW89_FCC][49] = 62, - [2][0][2][0][RTW89_ETSI][49] = 127, - [2][0][2][0][RTW89_MKK][49] = 127, -@@ -31836,6 +33278,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][0][2][0][RTW89_ACMA][49] = 127, - [2][0][2][0][RTW89_CN][49] = 127, - [2][0][2][0][RTW89_UK][49] = 127, -+ [2][0][2][0][RTW89_MEXICO][49] = 127, -+ [2][0][2][0][RTW89_UKRAINE][49] = 127, -+ [2][0][2][0][RTW89_CHILE][49] = 127, -+ [2][0][2][0][RTW89_QATAR][49] = 127, - [2][1][2][0][RTW89_FCC][3] = 48, - [2][1][2][0][RTW89_ETSI][3] = 54, - [2][1][2][0][RTW89_MKK][3] = 56, -@@ -31844,6 +33290,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][1][2][0][RTW89_ACMA][3] = 54, - [2][1][2][0][RTW89_CN][3] = 52, - [2][1][2][0][RTW89_UK][3] = 54, -+ [2][1][2][0][RTW89_MEXICO][3] = 48, -+ [2][1][2][0][RTW89_UKRAINE][3] = 42, -+ [2][1][2][0][RTW89_CHILE][3] = 46, -+ [2][1][2][0][RTW89_QATAR][3] = 54, - [2][1][2][0][RTW89_FCC][11] = 38, - [2][1][2][0][RTW89_ETSI][11] = 54, - [2][1][2][0][RTW89_MKK][11] = 54, -@@ -31852,6 +33302,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][1][2][0][RTW89_ACMA][11] = 54, - [2][1][2][0][RTW89_CN][11] = 52, - [2][1][2][0][RTW89_UK][11] = 54, -+ [2][1][2][0][RTW89_MEXICO][11] = 38, -+ [2][1][2][0][RTW89_UKRAINE][11] = 42, -+ [2][1][2][0][RTW89_CHILE][11] = 38, -+ [2][1][2][0][RTW89_QATAR][11] = 54, - [2][1][2][0][RTW89_FCC][18] = 50, - [2][1][2][0][RTW89_ETSI][18] = 54, - [2][1][2][0][RTW89_MKK][18] = 60, -@@ -31860,6 +33314,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][1][2][0][RTW89_ACMA][18] = 54, - [2][1][2][0][RTW89_CN][18] = 127, - [2][1][2][0][RTW89_UK][18] = 54, -+ [2][1][2][0][RTW89_MEXICO][18] = 50, -+ [2][1][2][0][RTW89_UKRAINE][18] = 42, -+ [2][1][2][0][RTW89_CHILE][18] = 50, -+ [2][1][2][0][RTW89_QATAR][18] = 54, - [2][1][2][0][RTW89_FCC][26] = 52, - [2][1][2][0][RTW89_ETSI][26] = 54, - [2][1][2][0][RTW89_MKK][26] = 56, -@@ -31868,6 +33326,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][1][2][0][RTW89_ACMA][26] = 127, - [2][1][2][0][RTW89_CN][26] = 127, - [2][1][2][0][RTW89_UK][26] = 54, -+ [2][1][2][0][RTW89_MEXICO][26] = 52, -+ [2][1][2][0][RTW89_UKRAINE][26] = 42, -+ [2][1][2][0][RTW89_CHILE][26] = 52, -+ [2][1][2][0][RTW89_QATAR][26] = 54, - [2][1][2][0][RTW89_FCC][34] = 62, - [2][1][2][0][RTW89_ETSI][34] = 127, - [2][1][2][0][RTW89_MKK][34] = 60, -@@ -31876,6 +33338,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][1][2][0][RTW89_ACMA][34] = 60, - [2][1][2][0][RTW89_CN][34] = 127, - [2][1][2][0][RTW89_UK][34] = 52, -+ [2][1][2][0][RTW89_MEXICO][34] = 62, -+ [2][1][2][0][RTW89_UKRAINE][34] = 127, -+ [2][1][2][0][RTW89_CHILE][34] = 60, -+ [2][1][2][0][RTW89_QATAR][34] = 127, - [2][1][2][0][RTW89_FCC][41] = 60, - [2][1][2][0][RTW89_ETSI][41] = 18, - [2][1][2][0][RTW89_MKK][41] = 127, -@@ -31884,6 +33350,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][1][2][0][RTW89_ACMA][41] = 58, - [2][1][2][0][RTW89_CN][41] = 62, - [2][1][2][0][RTW89_UK][41] = 52, -+ [2][1][2][0][RTW89_MEXICO][41] = 60, -+ [2][1][2][0][RTW89_UKRAINE][41] = 18, -+ [2][1][2][0][RTW89_CHILE][41] = 58, -+ [2][1][2][0][RTW89_QATAR][41] = 18, - [2][1][2][0][RTW89_FCC][49] = 62, - [2][1][2][0][RTW89_ETSI][49] = 127, - [2][1][2][0][RTW89_MKK][49] = 127, -@@ -31892,6 +33362,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][1][2][0][RTW89_ACMA][49] = 127, - [2][1][2][0][RTW89_CN][49] = 127, - [2][1][2][0][RTW89_UK][49] = 127, -+ [2][1][2][0][RTW89_MEXICO][49] = 127, -+ [2][1][2][0][RTW89_UKRAINE][49] = 127, -+ [2][1][2][0][RTW89_CHILE][49] = 127, -+ [2][1][2][0][RTW89_QATAR][49] = 127, - [2][1][2][1][RTW89_FCC][3] = 48, - [2][1][2][1][RTW89_ETSI][3] = 40, - [2][1][2][1][RTW89_MKK][3] = 56, -@@ -31900,6 +33374,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][1][2][1][RTW89_ACMA][3] = 40, - [2][1][2][1][RTW89_CN][3] = 42, - [2][1][2][1][RTW89_UK][3] = 40, -+ [2][1][2][1][RTW89_MEXICO][3] = 48, -+ [2][1][2][1][RTW89_UKRAINE][3] = 30, -+ [2][1][2][1][RTW89_CHILE][3] = 46, -+ [2][1][2][1][RTW89_QATAR][3] = 40, - [2][1][2][1][RTW89_FCC][11] = 38, - [2][1][2][1][RTW89_ETSI][11] = 40, - [2][1][2][1][RTW89_MKK][11] = 54, -@@ -31908,6 +33386,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][1][2][1][RTW89_ACMA][11] = 40, - [2][1][2][1][RTW89_CN][11] = 42, - [2][1][2][1][RTW89_UK][11] = 40, -+ [2][1][2][1][RTW89_MEXICO][11] = 38, -+ [2][1][2][1][RTW89_UKRAINE][11] = 30, -+ [2][1][2][1][RTW89_CHILE][11] = 38, -+ [2][1][2][1][RTW89_QATAR][11] = 40, - [2][1][2][1][RTW89_FCC][18] = 50, - [2][1][2][1][RTW89_ETSI][18] = 40, - [2][1][2][1][RTW89_MKK][18] = 60, -@@ -31916,6 +33398,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][1][2][1][RTW89_ACMA][18] = 40, - [2][1][2][1][RTW89_CN][18] = 127, - [2][1][2][1][RTW89_UK][18] = 40, -+ [2][1][2][1][RTW89_MEXICO][18] = 50, -+ [2][1][2][1][RTW89_UKRAINE][18] = 30, -+ [2][1][2][1][RTW89_CHILE][18] = 50, -+ [2][1][2][1][RTW89_QATAR][18] = 40, - [2][1][2][1][RTW89_FCC][26] = 52, - [2][1][2][1][RTW89_ETSI][26] = 42, - [2][1][2][1][RTW89_MKK][26] = 56, -@@ -31924,6 +33410,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][1][2][1][RTW89_ACMA][26] = 127, - [2][1][2][1][RTW89_CN][26] = 127, - [2][1][2][1][RTW89_UK][26] = 42, -+ [2][1][2][1][RTW89_MEXICO][26] = 52, -+ [2][1][2][1][RTW89_UKRAINE][26] = 30, -+ [2][1][2][1][RTW89_CHILE][26] = 52, -+ [2][1][2][1][RTW89_QATAR][26] = 42, - [2][1][2][1][RTW89_FCC][34] = 62, - [2][1][2][1][RTW89_ETSI][34] = 127, - [2][1][2][1][RTW89_MKK][34] = 60, -@@ -31932,6 +33422,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][1][2][1][RTW89_ACMA][34] = 60, - [2][1][2][1][RTW89_CN][34] = 127, - [2][1][2][1][RTW89_UK][34] = 40, -+ [2][1][2][1][RTW89_MEXICO][34] = 62, -+ [2][1][2][1][RTW89_UKRAINE][34] = 127, -+ [2][1][2][1][RTW89_CHILE][34] = 60, -+ [2][1][2][1][RTW89_QATAR][34] = 127, - [2][1][2][1][RTW89_FCC][41] = 60, - [2][1][2][1][RTW89_ETSI][41] = 6, - [2][1][2][1][RTW89_MKK][41] = 127, -@@ -31940,6 +33434,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][1][2][1][RTW89_ACMA][41] = 58, - [2][1][2][1][RTW89_CN][41] = 40, - [2][1][2][1][RTW89_UK][41] = 40, -+ [2][1][2][1][RTW89_MEXICO][41] = 60, -+ [2][1][2][1][RTW89_UKRAINE][41] = 6, -+ [2][1][2][1][RTW89_CHILE][41] = 58, -+ [2][1][2][1][RTW89_QATAR][41] = 6, - [2][1][2][1][RTW89_FCC][49] = 62, - [2][1][2][1][RTW89_ETSI][49] = 127, - [2][1][2][1][RTW89_MKK][49] = 127, -@@ -31948,6 +33446,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [2][1][2][1][RTW89_ACMA][49] = 127, - [2][1][2][1][RTW89_CN][49] = 127, - [2][1][2][1][RTW89_UK][49] = 127, -+ [2][1][2][1][RTW89_MEXICO][49] = 127, -+ [2][1][2][1][RTW89_UKRAINE][49] = 127, -+ [2][1][2][1][RTW89_CHILE][49] = 127, -+ [2][1][2][1][RTW89_QATAR][49] = 127, - [3][0][2][0][RTW89_FCC][7] = 40, - [3][0][2][0][RTW89_ETSI][7] = 50, - [3][0][2][0][RTW89_MKK][7] = 50, -@@ -31956,6 +33458,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [3][0][2][0][RTW89_ACMA][7] = 127, - [3][0][2][0][RTW89_CN][7] = 66, - [3][0][2][0][RTW89_UK][7] = 127, -+ [3][0][2][0][RTW89_MEXICO][7] = 127, -+ [3][0][2][0][RTW89_UKRAINE][7] = 50, -+ [3][0][2][0][RTW89_CHILE][7] = 40, -+ [3][0][2][0][RTW89_QATAR][7] = 50, - [3][0][2][0][RTW89_FCC][22] = 42, - [3][0][2][0][RTW89_ETSI][22] = 50, - [3][0][2][0][RTW89_MKK][22] = 50, -@@ -31964,6 +33470,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [3][0][2][0][RTW89_ACMA][22] = 127, - [3][0][2][0][RTW89_CN][22] = 66, - [3][0][2][0][RTW89_UK][22] = 127, -+ [3][0][2][0][RTW89_MEXICO][22] = 127, -+ [3][0][2][0][RTW89_UKRAINE][22] = 50, -+ [3][0][2][0][RTW89_CHILE][22] = 42, -+ [3][0][2][0][RTW89_QATAR][22] = 50, - [3][0][2][0][RTW89_FCC][45] = 52, - [3][0][2][0][RTW89_ETSI][45] = 127, - [3][0][2][0][RTW89_MKK][45] = 127, -@@ -31972,6 +33482,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [3][0][2][0][RTW89_ACMA][45] = 127, - [3][0][2][0][RTW89_CN][45] = 127, - [3][0][2][0][RTW89_UK][45] = 127, -+ [3][0][2][0][RTW89_MEXICO][45] = 127, -+ [3][0][2][0][RTW89_UKRAINE][45] = 127, -+ [3][0][2][0][RTW89_CHILE][45] = 127, -+ [3][0][2][0][RTW89_QATAR][45] = 127, - [3][1][2][0][RTW89_FCC][7] = 32, - [3][1][2][0][RTW89_ETSI][7] = 50, - [3][1][2][0][RTW89_MKK][7] = 36, -@@ -31980,6 +33494,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [3][1][2][0][RTW89_ACMA][7] = 127, - [3][1][2][0][RTW89_CN][7] = 54, - [3][1][2][0][RTW89_UK][7] = 127, -+ [3][1][2][0][RTW89_MEXICO][7] = 127, -+ [3][1][2][0][RTW89_UKRAINE][7] = 50, -+ [3][1][2][0][RTW89_CHILE][7] = 32, -+ [3][1][2][0][RTW89_QATAR][7] = 50, - [3][1][2][0][RTW89_FCC][22] = 36, - [3][1][2][0][RTW89_ETSI][22] = 50, - [3][1][2][0][RTW89_MKK][22] = 48, -@@ -31988,6 +33506,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [3][1][2][0][RTW89_ACMA][22] = 127, - [3][1][2][0][RTW89_CN][22] = 54, - [3][1][2][0][RTW89_UK][22] = 127, -+ [3][1][2][0][RTW89_MEXICO][22] = 127, -+ [3][1][2][0][RTW89_UKRAINE][22] = 50, -+ [3][1][2][0][RTW89_CHILE][22] = 36, -+ [3][1][2][0][RTW89_QATAR][22] = 50, - [3][1][2][0][RTW89_FCC][45] = 46, - [3][1][2][0][RTW89_ETSI][45] = 127, - [3][1][2][0][RTW89_MKK][45] = 127, -@@ -31996,6 +33518,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [3][1][2][0][RTW89_ACMA][45] = 127, - [3][1][2][0][RTW89_CN][45] = 127, - [3][1][2][0][RTW89_UK][45] = 127, -+ [3][1][2][0][RTW89_MEXICO][45] = 127, -+ [3][1][2][0][RTW89_UKRAINE][45] = 127, -+ [3][1][2][0][RTW89_CHILE][45] = 127, -+ [3][1][2][0][RTW89_QATAR][45] = 127, - [3][1][2][1][RTW89_FCC][7] = 32, - [3][1][2][1][RTW89_ETSI][7] = 42, - [3][1][2][1][RTW89_MKK][7] = 36, -@@ -32004,6 +33530,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [3][1][2][1][RTW89_ACMA][7] = 127, - [3][1][2][1][RTW89_CN][7] = 42, - [3][1][2][1][RTW89_UK][7] = 127, -+ [3][1][2][1][RTW89_MEXICO][7] = 127, -+ [3][1][2][1][RTW89_UKRAINE][7] = 42, -+ [3][1][2][1][RTW89_CHILE][7] = 32, -+ [3][1][2][1][RTW89_QATAR][7] = 42, - [3][1][2][1][RTW89_FCC][22] = 36, - [3][1][2][1][RTW89_ETSI][22] = 42, - [3][1][2][1][RTW89_MKK][22] = 48, -@@ -32012,6 +33542,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [3][1][2][1][RTW89_ACMA][22] = 127, - [3][1][2][1][RTW89_CN][22] = 42, - [3][1][2][1][RTW89_UK][22] = 127, -+ [3][1][2][1][RTW89_MEXICO][22] = 127, -+ [3][1][2][1][RTW89_UKRAINE][22] = 42, -+ [3][1][2][1][RTW89_CHILE][22] = 36, -+ [3][1][2][1][RTW89_QATAR][22] = 42, - [3][1][2][1][RTW89_FCC][45] = 46, - [3][1][2][1][RTW89_ETSI][45] = 127, - [3][1][2][1][RTW89_MKK][45] = 127, -@@ -32020,6 +33554,10 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - [3][1][2][1][RTW89_ACMA][45] = 127, - [3][1][2][1][RTW89_CN][45] = 127, - [3][1][2][1][RTW89_UK][45] = 127, -+ [3][1][2][1][RTW89_MEXICO][45] = 127, -+ [3][1][2][1][RTW89_UKRAINE][45] = 127, -+ [3][1][2][1][RTW89_CHILE][45] = 127, -+ [3][1][2][1][RTW89_QATAR][45] = 127, - }; - - static -@@ -34017,10 +35555,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [1][0][RTW89_WW][3] = 44, - [1][0][RTW89_WW][4] = 44, - [1][0][RTW89_WW][5] = 44, -- [1][0][RTW89_WW][6] = 44, -- [1][0][RTW89_WW][7] = 44, -- [1][0][RTW89_WW][8] = 44, -- [1][0][RTW89_WW][9] = 44, -+ [1][0][RTW89_WW][6] = 40, -+ [1][0][RTW89_WW][7] = 40, -+ [1][0][RTW89_WW][8] = 40, -+ [1][0][RTW89_WW][9] = 40, - [1][0][RTW89_WW][10] = 44, - [1][0][RTW89_WW][11] = 36, - [1][0][RTW89_WW][12] = 4, -@@ -34031,24 +35569,24 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [1][1][RTW89_WW][3] = 32, - [1][1][RTW89_WW][4] = 32, - [1][1][RTW89_WW][5] = 32, -- [1][1][RTW89_WW][6] = 32, -- [1][1][RTW89_WW][7] = 32, -- [1][1][RTW89_WW][8] = 32, -- [1][1][RTW89_WW][9] = 32, -+ [1][1][RTW89_WW][6] = 30, -+ [1][1][RTW89_WW][7] = 30, -+ [1][1][RTW89_WW][8] = 30, -+ [1][1][RTW89_WW][9] = 30, - [1][1][RTW89_WW][10] = 32, - [1][1][RTW89_WW][11] = 30, - [1][1][RTW89_WW][12] = -6, - [1][1][RTW89_WW][13] = 0, - [2][0][RTW89_WW][0] = 56, -- [2][0][RTW89_WW][1] = 56, -- [2][0][RTW89_WW][2] = 56, -- [2][0][RTW89_WW][3] = 56, -- [2][0][RTW89_WW][4] = 56, -+ [2][0][RTW89_WW][1] = 54, -+ [2][0][RTW89_WW][2] = 54, -+ [2][0][RTW89_WW][3] = 54, -+ [2][0][RTW89_WW][4] = 54, - [2][0][RTW89_WW][5] = 56, -- [2][0][RTW89_WW][6] = 56, -- [2][0][RTW89_WW][7] = 56, -- [2][0][RTW89_WW][8] = 56, -- [2][0][RTW89_WW][9] = 56, -+ [2][0][RTW89_WW][6] = 48, -+ [2][0][RTW89_WW][7] = 48, -+ [2][0][RTW89_WW][8] = 48, -+ [2][0][RTW89_WW][9] = 48, - [2][0][RTW89_WW][10] = 56, - [2][0][RTW89_WW][11] = 48, - [2][0][RTW89_WW][12] = 16, -@@ -34059,10 +35597,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [2][1][RTW89_WW][3] = 44, - [2][1][RTW89_WW][4] = 44, - [2][1][RTW89_WW][5] = 44, -- [2][1][RTW89_WW][6] = 44, -- [2][1][RTW89_WW][7] = 44, -- [2][1][RTW89_WW][8] = 44, -- [2][1][RTW89_WW][9] = 44, -+ [2][1][RTW89_WW][6] = 42, -+ [2][1][RTW89_WW][7] = 42, -+ [2][1][RTW89_WW][8] = 42, -+ [2][1][RTW89_WW][9] = 42, - [2][1][RTW89_WW][10] = 44, - [2][1][RTW89_WW][11] = 44, - [2][1][RTW89_WW][12] = 6, -@@ -34075,6 +35613,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [0][0][RTW89_ACMA][0] = 34, - [0][0][RTW89_CN][0] = 32, - [0][0][RTW89_UK][0] = 34, -+ [0][0][RTW89_MEXICO][0] = 60, -+ [0][0][RTW89_UKRAINE][0] = 34, -+ [0][0][RTW89_CHILE][0] = 60, -+ [0][0][RTW89_QATAR][0] = 34, - [0][0][RTW89_FCC][1] = 60, - [0][0][RTW89_ETSI][1] = 38, - [0][0][RTW89_MKK][1] = 40, -@@ -34083,6 +35625,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [0][0][RTW89_ACMA][1] = 38, - [0][0][RTW89_CN][1] = 32, - [0][0][RTW89_UK][1] = 38, -+ [0][0][RTW89_MEXICO][1] = 60, -+ [0][0][RTW89_UKRAINE][1] = 38, -+ [0][0][RTW89_CHILE][1] = 50, -+ [0][0][RTW89_QATAR][1] = 38, - [0][0][RTW89_FCC][2] = 64, - [0][0][RTW89_ETSI][2] = 38, - [0][0][RTW89_MKK][2] = 40, -@@ -34091,6 +35637,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [0][0][RTW89_ACMA][2] = 38, - [0][0][RTW89_CN][2] = 32, - [0][0][RTW89_UK][2] = 38, -+ [0][0][RTW89_MEXICO][2] = 64, -+ [0][0][RTW89_UKRAINE][2] = 38, -+ [0][0][RTW89_CHILE][2] = 50, -+ [0][0][RTW89_QATAR][2] = 38, - [0][0][RTW89_FCC][3] = 68, - [0][0][RTW89_ETSI][3] = 38, - [0][0][RTW89_MKK][3] = 40, -@@ -34099,78 +35649,118 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [0][0][RTW89_ACMA][3] = 38, - [0][0][RTW89_CN][3] = 32, - [0][0][RTW89_UK][3] = 38, -+ [0][0][RTW89_MEXICO][3] = 68, -+ [0][0][RTW89_UKRAINE][3] = 38, -+ [0][0][RTW89_CHILE][3] = 50, -+ [0][0][RTW89_QATAR][3] = 38, - [0][0][RTW89_FCC][4] = 68, - [0][0][RTW89_ETSI][4] = 38, - [0][0][RTW89_MKK][4] = 40, - [0][0][RTW89_IC][4] = 68, -- [0][0][RTW89_KCC][4] = 42, -+ [0][0][RTW89_KCC][4] = 44, - [0][0][RTW89_ACMA][4] = 38, - [0][0][RTW89_CN][4] = 32, - [0][0][RTW89_UK][4] = 38, -+ [0][0][RTW89_MEXICO][4] = 68, -+ [0][0][RTW89_UKRAINE][4] = 38, -+ [0][0][RTW89_CHILE][4] = 50, -+ [0][0][RTW89_QATAR][4] = 38, - [0][0][RTW89_FCC][5] = 78, - [0][0][RTW89_ETSI][5] = 38, - [0][0][RTW89_MKK][5] = 40, - [0][0][RTW89_IC][5] = 78, -- [0][0][RTW89_KCC][5] = 42, -+ [0][0][RTW89_KCC][5] = 44, - [0][0][RTW89_ACMA][5] = 38, - [0][0][RTW89_CN][5] = 32, - [0][0][RTW89_UK][5] = 38, -+ [0][0][RTW89_MEXICO][5] = 78, -+ [0][0][RTW89_UKRAINE][5] = 38, -+ [0][0][RTW89_CHILE][5] = 78, -+ [0][0][RTW89_QATAR][5] = 38, - [0][0][RTW89_FCC][6] = 54, - [0][0][RTW89_ETSI][6] = 38, - [0][0][RTW89_MKK][6] = 40, - [0][0][RTW89_IC][6] = 54, -- [0][0][RTW89_KCC][6] = 42, -+ [0][0][RTW89_KCC][6] = 44, - [0][0][RTW89_ACMA][6] = 38, - [0][0][RTW89_CN][6] = 32, - [0][0][RTW89_UK][6] = 38, -+ [0][0][RTW89_MEXICO][6] = 54, -+ [0][0][RTW89_UKRAINE][6] = 38, -+ [0][0][RTW89_CHILE][6] = 36, -+ [0][0][RTW89_QATAR][6] = 38, - [0][0][RTW89_FCC][7] = 54, - [0][0][RTW89_ETSI][7] = 38, - [0][0][RTW89_MKK][7] = 40, - [0][0][RTW89_IC][7] = 54, -- [0][0][RTW89_KCC][7] = 42, -+ [0][0][RTW89_KCC][7] = 44, - [0][0][RTW89_ACMA][7] = 38, - [0][0][RTW89_CN][7] = 32, - [0][0][RTW89_UK][7] = 38, -+ [0][0][RTW89_MEXICO][7] = 54, -+ [0][0][RTW89_UKRAINE][7] = 38, -+ [0][0][RTW89_CHILE][7] = 36, -+ [0][0][RTW89_QATAR][7] = 38, - [0][0][RTW89_FCC][8] = 50, - [0][0][RTW89_ETSI][8] = 38, - [0][0][RTW89_MKK][8] = 40, - [0][0][RTW89_IC][8] = 50, -- [0][0][RTW89_KCC][8] = 42, -+ [0][0][RTW89_KCC][8] = 44, - [0][0][RTW89_ACMA][8] = 38, - [0][0][RTW89_CN][8] = 32, - [0][0][RTW89_UK][8] = 38, -+ [0][0][RTW89_MEXICO][8] = 50, -+ [0][0][RTW89_UKRAINE][8] = 38, -+ [0][0][RTW89_CHILE][8] = 36, -+ [0][0][RTW89_QATAR][8] = 38, - [0][0][RTW89_FCC][9] = 46, - [0][0][RTW89_ETSI][9] = 38, - [0][0][RTW89_MKK][9] = 40, - [0][0][RTW89_IC][9] = 46, -- [0][0][RTW89_KCC][9] = 40, -+ [0][0][RTW89_KCC][9] = 42, - [0][0][RTW89_ACMA][9] = 38, - [0][0][RTW89_CN][9] = 32, - [0][0][RTW89_UK][9] = 38, -+ [0][0][RTW89_MEXICO][9] = 46, -+ [0][0][RTW89_UKRAINE][9] = 38, -+ [0][0][RTW89_CHILE][9] = 36, -+ [0][0][RTW89_QATAR][9] = 38, - [0][0][RTW89_FCC][10] = 46, - [0][0][RTW89_ETSI][10] = 38, - [0][0][RTW89_MKK][10] = 40, - [0][0][RTW89_IC][10] = 46, -- [0][0][RTW89_KCC][10] = 40, -+ [0][0][RTW89_KCC][10] = 42, - [0][0][RTW89_ACMA][10] = 38, - [0][0][RTW89_CN][10] = 32, - [0][0][RTW89_UK][10] = 38, -+ [0][0][RTW89_MEXICO][10] = 46, -+ [0][0][RTW89_UKRAINE][10] = 38, -+ [0][0][RTW89_CHILE][10] = 46, -+ [0][0][RTW89_QATAR][10] = 38, - [0][0][RTW89_FCC][11] = 26, - [0][0][RTW89_ETSI][11] = 38, - [0][0][RTW89_MKK][11] = 40, - [0][0][RTW89_IC][11] = 26, -- [0][0][RTW89_KCC][11] = 40, -+ [0][0][RTW89_KCC][11] = 42, - [0][0][RTW89_ACMA][11] = 38, - [0][0][RTW89_CN][11] = 32, - [0][0][RTW89_UK][11] = 38, -+ [0][0][RTW89_MEXICO][11] = 26, -+ [0][0][RTW89_UKRAINE][11] = 38, -+ [0][0][RTW89_CHILE][11] = 26, -+ [0][0][RTW89_QATAR][11] = 38, - [0][0][RTW89_FCC][12] = -20, - [0][0][RTW89_ETSI][12] = 34, - [0][0][RTW89_MKK][12] = 36, - [0][0][RTW89_IC][12] = -20, -- [0][0][RTW89_KCC][12] = 40, -+ [0][0][RTW89_KCC][12] = 42, - [0][0][RTW89_ACMA][12] = 34, - [0][0][RTW89_CN][12] = 32, - [0][0][RTW89_UK][12] = 34, -+ [0][0][RTW89_MEXICO][12] = -20, -+ [0][0][RTW89_UKRAINE][12] = 34, -+ [0][0][RTW89_CHILE][12] = -20, -+ [0][0][RTW89_QATAR][12] = 34, - [0][0][RTW89_FCC][13] = 127, - [0][0][RTW89_ETSI][13] = 127, - [0][0][RTW89_MKK][13] = 127, -@@ -34179,6 +35769,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [0][0][RTW89_ACMA][13] = 127, - [0][0][RTW89_CN][13] = 127, - [0][0][RTW89_UK][13] = 127, -+ [0][0][RTW89_MEXICO][13] = 127, -+ [0][0][RTW89_UKRAINE][13] = 127, -+ [0][0][RTW89_CHILE][13] = 127, -+ [0][0][RTW89_QATAR][13] = 127, - [0][1][RTW89_FCC][0] = 56, - [0][1][RTW89_ETSI][0] = 22, - [0][1][RTW89_MKK][0] = 24, -@@ -34187,6 +35781,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [0][1][RTW89_ACMA][0] = 22, - [0][1][RTW89_CN][0] = 20, - [0][1][RTW89_UK][0] = 22, -+ [0][1][RTW89_MEXICO][0] = 56, -+ [0][1][RTW89_UKRAINE][0] = 22, -+ [0][1][RTW89_CHILE][0] = 56, -+ [0][1][RTW89_QATAR][0] = 22, - [0][1][RTW89_FCC][1] = 56, - [0][1][RTW89_ETSI][1] = 24, - [0][1][RTW89_MKK][1] = 30, -@@ -34195,6 +35793,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [0][1][RTW89_ACMA][1] = 24, - [0][1][RTW89_CN][1] = 22, - [0][1][RTW89_UK][1] = 24, -+ [0][1][RTW89_MEXICO][1] = 56, -+ [0][1][RTW89_UKRAINE][1] = 24, -+ [0][1][RTW89_CHILE][1] = 40, -+ [0][1][RTW89_QATAR][1] = 24, - [0][1][RTW89_FCC][2] = 60, - [0][1][RTW89_ETSI][2] = 24, - [0][1][RTW89_MKK][2] = 30, -@@ -34203,6 +35805,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [0][1][RTW89_ACMA][2] = 24, - [0][1][RTW89_CN][2] = 22, - [0][1][RTW89_UK][2] = 24, -+ [0][1][RTW89_MEXICO][2] = 60, -+ [0][1][RTW89_UKRAINE][2] = 24, -+ [0][1][RTW89_CHILE][2] = 40, -+ [0][1][RTW89_QATAR][2] = 24, - [0][1][RTW89_FCC][3] = 64, - [0][1][RTW89_ETSI][3] = 24, - [0][1][RTW89_MKK][3] = 30, -@@ -34211,78 +35817,118 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [0][1][RTW89_ACMA][3] = 24, - [0][1][RTW89_CN][3] = 22, - [0][1][RTW89_UK][3] = 24, -+ [0][1][RTW89_MEXICO][3] = 64, -+ [0][1][RTW89_UKRAINE][3] = 24, -+ [0][1][RTW89_CHILE][3] = 40, -+ [0][1][RTW89_QATAR][3] = 24, - [0][1][RTW89_FCC][4] = 68, - [0][1][RTW89_ETSI][4] = 24, - [0][1][RTW89_MKK][4] = 30, - [0][1][RTW89_IC][4] = 68, -- [0][1][RTW89_KCC][4] = 28, -+ [0][1][RTW89_KCC][4] = 34, - [0][1][RTW89_ACMA][4] = 24, - [0][1][RTW89_CN][4] = 22, - [0][1][RTW89_UK][4] = 24, -+ [0][1][RTW89_MEXICO][4] = 68, -+ [0][1][RTW89_UKRAINE][4] = 24, -+ [0][1][RTW89_CHILE][4] = 40, -+ [0][1][RTW89_QATAR][4] = 24, - [0][1][RTW89_FCC][5] = 76, - [0][1][RTW89_ETSI][5] = 24, - [0][1][RTW89_MKK][5] = 30, - [0][1][RTW89_IC][5] = 76, -- [0][1][RTW89_KCC][5] = 28, -+ [0][1][RTW89_KCC][5] = 34, - [0][1][RTW89_ACMA][5] = 24, - [0][1][RTW89_CN][5] = 22, - [0][1][RTW89_UK][5] = 24, -+ [0][1][RTW89_MEXICO][5] = 76, -+ [0][1][RTW89_UKRAINE][5] = 24, -+ [0][1][RTW89_CHILE][5] = 76, -+ [0][1][RTW89_QATAR][5] = 24, - [0][1][RTW89_FCC][6] = 54, - [0][1][RTW89_ETSI][6] = 24, - [0][1][RTW89_MKK][6] = 30, - [0][1][RTW89_IC][6] = 54, -- [0][1][RTW89_KCC][6] = 28, -+ [0][1][RTW89_KCC][6] = 34, - [0][1][RTW89_ACMA][6] = 24, - [0][1][RTW89_CN][6] = 22, - [0][1][RTW89_UK][6] = 24, -+ [0][1][RTW89_MEXICO][6] = 54, -+ [0][1][RTW89_UKRAINE][6] = 24, -+ [0][1][RTW89_CHILE][6] = 26, -+ [0][1][RTW89_QATAR][6] = 24, - [0][1][RTW89_FCC][7] = 50, - [0][1][RTW89_ETSI][7] = 24, - [0][1][RTW89_MKK][7] = 30, - [0][1][RTW89_IC][7] = 50, -- [0][1][RTW89_KCC][7] = 28, -+ [0][1][RTW89_KCC][7] = 34, - [0][1][RTW89_ACMA][7] = 24, - [0][1][RTW89_CN][7] = 22, - [0][1][RTW89_UK][7] = 24, -+ [0][1][RTW89_MEXICO][7] = 50, -+ [0][1][RTW89_UKRAINE][7] = 24, -+ [0][1][RTW89_CHILE][7] = 26, -+ [0][1][RTW89_QATAR][7] = 24, - [0][1][RTW89_FCC][8] = 46, - [0][1][RTW89_ETSI][8] = 24, - [0][1][RTW89_MKK][8] = 30, - [0][1][RTW89_IC][8] = 46, -- [0][1][RTW89_KCC][8] = 28, -+ [0][1][RTW89_KCC][8] = 34, - [0][1][RTW89_ACMA][8] = 24, - [0][1][RTW89_CN][8] = 22, - [0][1][RTW89_UK][8] = 24, -+ [0][1][RTW89_MEXICO][8] = 46, -+ [0][1][RTW89_UKRAINE][8] = 24, -+ [0][1][RTW89_CHILE][8] = 26, -+ [0][1][RTW89_QATAR][8] = 24, - [0][1][RTW89_FCC][9] = 42, - [0][1][RTW89_ETSI][9] = 24, - [0][1][RTW89_MKK][9] = 30, - [0][1][RTW89_IC][9] = 42, -- [0][1][RTW89_KCC][9] = 28, -+ [0][1][RTW89_KCC][9] = 32, - [0][1][RTW89_ACMA][9] = 24, - [0][1][RTW89_CN][9] = 22, - [0][1][RTW89_UK][9] = 24, -+ [0][1][RTW89_MEXICO][9] = 42, -+ [0][1][RTW89_UKRAINE][9] = 24, -+ [0][1][RTW89_CHILE][9] = 26, -+ [0][1][RTW89_QATAR][9] = 24, - [0][1][RTW89_FCC][10] = 42, - [0][1][RTW89_ETSI][10] = 24, - [0][1][RTW89_MKK][10] = 30, - [0][1][RTW89_IC][10] = 42, -- [0][1][RTW89_KCC][10] = 28, -+ [0][1][RTW89_KCC][10] = 32, - [0][1][RTW89_ACMA][10] = 24, - [0][1][RTW89_CN][10] = 22, - [0][1][RTW89_UK][10] = 24, -+ [0][1][RTW89_MEXICO][10] = 42, -+ [0][1][RTW89_UKRAINE][10] = 24, -+ [0][1][RTW89_CHILE][10] = 42, -+ [0][1][RTW89_QATAR][10] = 24, - [0][1][RTW89_FCC][11] = 22, - [0][1][RTW89_ETSI][11] = 24, - [0][1][RTW89_MKK][11] = 30, - [0][1][RTW89_IC][11] = 22, -- [0][1][RTW89_KCC][11] = 28, -+ [0][1][RTW89_KCC][11] = 32, - [0][1][RTW89_ACMA][11] = 24, - [0][1][RTW89_CN][11] = 22, - [0][1][RTW89_UK][11] = 24, -+ [0][1][RTW89_MEXICO][11] = 22, -+ [0][1][RTW89_UKRAINE][11] = 24, -+ [0][1][RTW89_CHILE][11] = 22, -+ [0][1][RTW89_QATAR][11] = 24, - [0][1][RTW89_FCC][12] = -30, - [0][1][RTW89_ETSI][12] = 20, - [0][1][RTW89_MKK][12] = 24, - [0][1][RTW89_IC][12] = -30, -- [0][1][RTW89_KCC][12] = 28, -+ [0][1][RTW89_KCC][12] = 32, - [0][1][RTW89_ACMA][12] = 20, - [0][1][RTW89_CN][12] = 20, - [0][1][RTW89_UK][12] = 20, -+ [0][1][RTW89_MEXICO][12] = -30, -+ [0][1][RTW89_UKRAINE][12] = 20, -+ [0][1][RTW89_CHILE][12] = -30, -+ [0][1][RTW89_QATAR][12] = 20, - [0][1][RTW89_FCC][13] = 127, - [0][1][RTW89_ETSI][13] = 127, - [0][1][RTW89_MKK][13] = 127, -@@ -34291,110 +35937,166 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [0][1][RTW89_ACMA][13] = 127, - [0][1][RTW89_CN][13] = 127, - [0][1][RTW89_UK][13] = 127, -+ [0][1][RTW89_MEXICO][13] = 127, -+ [0][1][RTW89_UKRAINE][13] = 127, -+ [0][1][RTW89_CHILE][13] = 127, -+ [0][1][RTW89_QATAR][13] = 127, - [1][0][RTW89_FCC][0] = 66, - [1][0][RTW89_ETSI][0] = 46, - [1][0][RTW89_MKK][0] = 48, - [1][0][RTW89_IC][0] = 66, -- [1][0][RTW89_KCC][0] = 50, -+ [1][0][RTW89_KCC][0] = 54, - [1][0][RTW89_ACMA][0] = 46, - [1][0][RTW89_CN][0] = 42, - [1][0][RTW89_UK][0] = 46, -+ [1][0][RTW89_MEXICO][0] = 66, -+ [1][0][RTW89_UKRAINE][0] = 46, -+ [1][0][RTW89_CHILE][0] = 66, -+ [1][0][RTW89_QATAR][0] = 46, - [1][0][RTW89_FCC][1] = 66, - [1][0][RTW89_ETSI][1] = 46, - [1][0][RTW89_MKK][1] = 48, - [1][0][RTW89_IC][1] = 66, -- [1][0][RTW89_KCC][1] = 50, -+ [1][0][RTW89_KCC][1] = 54, - [1][0][RTW89_ACMA][1] = 46, - [1][0][RTW89_CN][1] = 44, - [1][0][RTW89_UK][1] = 46, -+ [1][0][RTW89_MEXICO][1] = 66, -+ [1][0][RTW89_UKRAINE][1] = 46, -+ [1][0][RTW89_CHILE][1] = 54, -+ [1][0][RTW89_QATAR][1] = 46, - [1][0][RTW89_FCC][2] = 70, - [1][0][RTW89_ETSI][2] = 46, - [1][0][RTW89_MKK][2] = 48, - [1][0][RTW89_IC][2] = 70, -- [1][0][RTW89_KCC][2] = 50, -+ [1][0][RTW89_KCC][2] = 54, - [1][0][RTW89_ACMA][2] = 46, - [1][0][RTW89_CN][2] = 44, - [1][0][RTW89_UK][2] = 46, -+ [1][0][RTW89_MEXICO][2] = 70, -+ [1][0][RTW89_UKRAINE][2] = 46, -+ [1][0][RTW89_CHILE][2] = 54, -+ [1][0][RTW89_QATAR][2] = 46, - [1][0][RTW89_FCC][3] = 72, - [1][0][RTW89_ETSI][3] = 46, - [1][0][RTW89_MKK][3] = 48, - [1][0][RTW89_IC][3] = 72, -- [1][0][RTW89_KCC][3] = 50, -+ [1][0][RTW89_KCC][3] = 54, - [1][0][RTW89_ACMA][3] = 46, - [1][0][RTW89_CN][3] = 44, - [1][0][RTW89_UK][3] = 46, -+ [1][0][RTW89_MEXICO][3] = 72, -+ [1][0][RTW89_UKRAINE][3] = 46, -+ [1][0][RTW89_CHILE][3] = 54, -+ [1][0][RTW89_QATAR][3] = 46, - [1][0][RTW89_FCC][4] = 72, - [1][0][RTW89_ETSI][4] = 46, - [1][0][RTW89_MKK][4] = 48, - [1][0][RTW89_IC][4] = 72, -- [1][0][RTW89_KCC][4] = 50, -+ [1][0][RTW89_KCC][4] = 56, - [1][0][RTW89_ACMA][4] = 46, - [1][0][RTW89_CN][4] = 44, - [1][0][RTW89_UK][4] = 46, -+ [1][0][RTW89_MEXICO][4] = 72, -+ [1][0][RTW89_UKRAINE][4] = 46, -+ [1][0][RTW89_CHILE][4] = 54, -+ [1][0][RTW89_QATAR][4] = 46, - [1][0][RTW89_FCC][5] = 82, - [1][0][RTW89_ETSI][5] = 46, - [1][0][RTW89_MKK][5] = 48, - [1][0][RTW89_IC][5] = 82, -- [1][0][RTW89_KCC][5] = 50, -+ [1][0][RTW89_KCC][5] = 56, - [1][0][RTW89_ACMA][5] = 46, - [1][0][RTW89_CN][5] = 44, - [1][0][RTW89_UK][5] = 46, -+ [1][0][RTW89_MEXICO][5] = 82, -+ [1][0][RTW89_UKRAINE][5] = 46, -+ [1][0][RTW89_CHILE][5] = 82, -+ [1][0][RTW89_QATAR][5] = 46, - [1][0][RTW89_FCC][6] = 58, - [1][0][RTW89_ETSI][6] = 44, - [1][0][RTW89_MKK][6] = 48, - [1][0][RTW89_IC][6] = 58, -- [1][0][RTW89_KCC][6] = 50, -+ [1][0][RTW89_KCC][6] = 56, - [1][0][RTW89_ACMA][6] = 44, - [1][0][RTW89_CN][6] = 44, - [1][0][RTW89_UK][6] = 44, -+ [1][0][RTW89_MEXICO][6] = 58, -+ [1][0][RTW89_UKRAINE][6] = 44, -+ [1][0][RTW89_CHILE][6] = 40, -+ [1][0][RTW89_QATAR][6] = 44, - [1][0][RTW89_FCC][7] = 58, - [1][0][RTW89_ETSI][7] = 46, - [1][0][RTW89_MKK][7] = 48, - [1][0][RTW89_IC][7] = 58, -- [1][0][RTW89_KCC][7] = 50, -+ [1][0][RTW89_KCC][7] = 56, - [1][0][RTW89_ACMA][7] = 46, - [1][0][RTW89_CN][7] = 44, - [1][0][RTW89_UK][7] = 46, -+ [1][0][RTW89_MEXICO][7] = 58, -+ [1][0][RTW89_UKRAINE][7] = 46, -+ [1][0][RTW89_CHILE][7] = 40, -+ [1][0][RTW89_QATAR][7] = 46, - [1][0][RTW89_FCC][8] = 58, - [1][0][RTW89_ETSI][8] = 46, - [1][0][RTW89_MKK][8] = 48, - [1][0][RTW89_IC][8] = 58, -- [1][0][RTW89_KCC][8] = 50, -+ [1][0][RTW89_KCC][8] = 56, - [1][0][RTW89_ACMA][8] = 46, - [1][0][RTW89_CN][8] = 44, - [1][0][RTW89_UK][8] = 46, -+ [1][0][RTW89_MEXICO][8] = 58, -+ [1][0][RTW89_UKRAINE][8] = 46, -+ [1][0][RTW89_CHILE][8] = 40, -+ [1][0][RTW89_QATAR][8] = 46, - [1][0][RTW89_FCC][9] = 54, - [1][0][RTW89_ETSI][9] = 46, - [1][0][RTW89_MKK][9] = 48, - [1][0][RTW89_IC][9] = 54, -- [1][0][RTW89_KCC][9] = 50, -+ [1][0][RTW89_KCC][9] = 56, - [1][0][RTW89_ACMA][9] = 46, - [1][0][RTW89_CN][9] = 44, - [1][0][RTW89_UK][9] = 46, -+ [1][0][RTW89_MEXICO][9] = 54, -+ [1][0][RTW89_UKRAINE][9] = 46, -+ [1][0][RTW89_CHILE][9] = 40, -+ [1][0][RTW89_QATAR][9] = 46, - [1][0][RTW89_FCC][10] = 54, - [1][0][RTW89_ETSI][10] = 46, - [1][0][RTW89_MKK][10] = 48, - [1][0][RTW89_IC][10] = 54, -- [1][0][RTW89_KCC][10] = 50, -+ [1][0][RTW89_KCC][10] = 56, - [1][0][RTW89_ACMA][10] = 46, - [1][0][RTW89_CN][10] = 44, - [1][0][RTW89_UK][10] = 46, -+ [1][0][RTW89_MEXICO][10] = 54, -+ [1][0][RTW89_UKRAINE][10] = 46, -+ [1][0][RTW89_CHILE][10] = 54, -+ [1][0][RTW89_QATAR][10] = 46, - [1][0][RTW89_FCC][11] = 36, - [1][0][RTW89_ETSI][11] = 46, - [1][0][RTW89_MKK][11] = 48, - [1][0][RTW89_IC][11] = 36, -- [1][0][RTW89_KCC][11] = 50, -+ [1][0][RTW89_KCC][11] = 56, - [1][0][RTW89_ACMA][11] = 46, - [1][0][RTW89_CN][11] = 44, - [1][0][RTW89_UK][11] = 46, -+ [1][0][RTW89_MEXICO][11] = 36, -+ [1][0][RTW89_UKRAINE][11] = 46, -+ [1][0][RTW89_CHILE][11] = 36, -+ [1][0][RTW89_QATAR][11] = 46, - [1][0][RTW89_FCC][12] = 4, - [1][0][RTW89_ETSI][12] = 46, - [1][0][RTW89_MKK][12] = 46, - [1][0][RTW89_IC][12] = 4, -- [1][0][RTW89_KCC][12] = 50, -+ [1][0][RTW89_KCC][12] = 56, - [1][0][RTW89_ACMA][12] = 46, - [1][0][RTW89_CN][12] = 42, - [1][0][RTW89_UK][12] = 46, -+ [1][0][RTW89_MEXICO][12] = 4, -+ [1][0][RTW89_UKRAINE][12] = 46, -+ [1][0][RTW89_CHILE][12] = 4, -+ [1][0][RTW89_QATAR][12] = 46, - [1][0][RTW89_FCC][13] = 127, - [1][0][RTW89_ETSI][13] = 127, - [1][0][RTW89_MKK][13] = 127, -@@ -34403,110 +36105,166 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [1][0][RTW89_ACMA][13] = 127, - [1][0][RTW89_CN][13] = 127, - [1][0][RTW89_UK][13] = 127, -+ [1][0][RTW89_MEXICO][13] = 127, -+ [1][0][RTW89_UKRAINE][13] = 127, -+ [1][0][RTW89_CHILE][13] = 127, -+ [1][0][RTW89_QATAR][13] = 127, - [1][1][RTW89_FCC][0] = 58, - [1][1][RTW89_ETSI][0] = 32, - [1][1][RTW89_MKK][0] = 34, - [1][1][RTW89_IC][0] = 58, -- [1][1][RTW89_KCC][0] = 38, -+ [1][1][RTW89_KCC][0] = 42, - [1][1][RTW89_ACMA][0] = 32, - [1][1][RTW89_CN][0] = 32, - [1][1][RTW89_UK][0] = 32, -+ [1][1][RTW89_MEXICO][0] = 58, -+ [1][1][RTW89_UKRAINE][0] = 32, -+ [1][1][RTW89_CHILE][0] = 58, -+ [1][1][RTW89_QATAR][0] = 32, - [1][1][RTW89_FCC][1] = 58, - [1][1][RTW89_ETSI][1] = 34, - [1][1][RTW89_MKK][1] = 34, - [1][1][RTW89_IC][1] = 58, -- [1][1][RTW89_KCC][1] = 38, -+ [1][1][RTW89_KCC][1] = 42, - [1][1][RTW89_ACMA][1] = 34, - [1][1][RTW89_CN][1] = 32, - [1][1][RTW89_UK][1] = 34, -+ [1][1][RTW89_MEXICO][1] = 58, -+ [1][1][RTW89_UKRAINE][1] = 34, -+ [1][1][RTW89_CHILE][1] = 40, -+ [1][1][RTW89_QATAR][1] = 34, - [1][1][RTW89_FCC][2] = 62, - [1][1][RTW89_ETSI][2] = 34, - [1][1][RTW89_MKK][2] = 34, - [1][1][RTW89_IC][2] = 62, -- [1][1][RTW89_KCC][2] = 38, -+ [1][1][RTW89_KCC][2] = 42, - [1][1][RTW89_ACMA][2] = 34, - [1][1][RTW89_CN][2] = 32, - [1][1][RTW89_UK][2] = 34, -+ [1][1][RTW89_MEXICO][2] = 62, -+ [1][1][RTW89_UKRAINE][2] = 34, -+ [1][1][RTW89_CHILE][2] = 40, -+ [1][1][RTW89_QATAR][2] = 34, - [1][1][RTW89_FCC][3] = 66, - [1][1][RTW89_ETSI][3] = 34, - [1][1][RTW89_MKK][3] = 34, - [1][1][RTW89_IC][3] = 66, -- [1][1][RTW89_KCC][3] = 38, -+ [1][1][RTW89_KCC][3] = 42, - [1][1][RTW89_ACMA][3] = 34, - [1][1][RTW89_CN][3] = 32, - [1][1][RTW89_UK][3] = 34, -+ [1][1][RTW89_MEXICO][3] = 66, -+ [1][1][RTW89_UKRAINE][3] = 34, -+ [1][1][RTW89_CHILE][3] = 40, -+ [1][1][RTW89_QATAR][3] = 34, - [1][1][RTW89_FCC][4] = 70, - [1][1][RTW89_ETSI][4] = 34, - [1][1][RTW89_MKK][4] = 34, - [1][1][RTW89_IC][4] = 70, -- [1][1][RTW89_KCC][4] = 38, -+ [1][1][RTW89_KCC][4] = 44, - [1][1][RTW89_ACMA][4] = 34, - [1][1][RTW89_CN][4] = 32, - [1][1][RTW89_UK][4] = 34, -+ [1][1][RTW89_MEXICO][4] = 70, -+ [1][1][RTW89_UKRAINE][4] = 34, -+ [1][1][RTW89_CHILE][4] = 40, -+ [1][1][RTW89_QATAR][4] = 34, - [1][1][RTW89_FCC][5] = 82, - [1][1][RTW89_ETSI][5] = 34, - [1][1][RTW89_MKK][5] = 34, - [1][1][RTW89_IC][5] = 82, -- [1][1][RTW89_KCC][5] = 38, -+ [1][1][RTW89_KCC][5] = 44, - [1][1][RTW89_ACMA][5] = 34, - [1][1][RTW89_CN][5] = 32, - [1][1][RTW89_UK][5] = 34, -+ [1][1][RTW89_MEXICO][5] = 82, -+ [1][1][RTW89_UKRAINE][5] = 34, -+ [1][1][RTW89_CHILE][5] = 78, -+ [1][1][RTW89_QATAR][5] = 34, - [1][1][RTW89_FCC][6] = 60, - [1][1][RTW89_ETSI][6] = 34, - [1][1][RTW89_MKK][6] = 34, - [1][1][RTW89_IC][6] = 60, -- [1][1][RTW89_KCC][6] = 38, -+ [1][1][RTW89_KCC][6] = 44, - [1][1][RTW89_ACMA][6] = 34, - [1][1][RTW89_CN][6] = 32, - [1][1][RTW89_UK][6] = 34, -+ [1][1][RTW89_MEXICO][6] = 60, -+ [1][1][RTW89_UKRAINE][6] = 34, -+ [1][1][RTW89_CHILE][6] = 30, -+ [1][1][RTW89_QATAR][6] = 34, - [1][1][RTW89_FCC][7] = 56, - [1][1][RTW89_ETSI][7] = 34, - [1][1][RTW89_MKK][7] = 34, - [1][1][RTW89_IC][7] = 56, -- [1][1][RTW89_KCC][7] = 38, -+ [1][1][RTW89_KCC][7] = 44, - [1][1][RTW89_ACMA][7] = 34, - [1][1][RTW89_CN][7] = 32, - [1][1][RTW89_UK][7] = 34, -+ [1][1][RTW89_MEXICO][7] = 56, -+ [1][1][RTW89_UKRAINE][7] = 34, -+ [1][1][RTW89_CHILE][7] = 30, -+ [1][1][RTW89_QATAR][7] = 34, - [1][1][RTW89_FCC][8] = 52, - [1][1][RTW89_ETSI][8] = 34, - [1][1][RTW89_MKK][8] = 34, - [1][1][RTW89_IC][8] = 52, -- [1][1][RTW89_KCC][8] = 38, -+ [1][1][RTW89_KCC][8] = 44, - [1][1][RTW89_ACMA][8] = 34, - [1][1][RTW89_CN][8] = 32, - [1][1][RTW89_UK][8] = 34, -+ [1][1][RTW89_MEXICO][8] = 52, -+ [1][1][RTW89_UKRAINE][8] = 34, -+ [1][1][RTW89_CHILE][8] = 30, -+ [1][1][RTW89_QATAR][8] = 34, - [1][1][RTW89_FCC][9] = 48, - [1][1][RTW89_ETSI][9] = 34, - [1][1][RTW89_MKK][9] = 34, - [1][1][RTW89_IC][9] = 48, -- [1][1][RTW89_KCC][9] = 38, -+ [1][1][RTW89_KCC][9] = 44, - [1][1][RTW89_ACMA][9] = 34, - [1][1][RTW89_CN][9] = 32, - [1][1][RTW89_UK][9] = 34, -+ [1][1][RTW89_MEXICO][9] = 48, -+ [1][1][RTW89_UKRAINE][9] = 34, -+ [1][1][RTW89_CHILE][9] = 30, -+ [1][1][RTW89_QATAR][9] = 34, - [1][1][RTW89_FCC][10] = 48, - [1][1][RTW89_ETSI][10] = 34, - [1][1][RTW89_MKK][10] = 34, - [1][1][RTW89_IC][10] = 48, -- [1][1][RTW89_KCC][10] = 38, -+ [1][1][RTW89_KCC][10] = 44, - [1][1][RTW89_ACMA][10] = 34, - [1][1][RTW89_CN][10] = 32, - [1][1][RTW89_UK][10] = 34, -+ [1][1][RTW89_MEXICO][10] = 48, -+ [1][1][RTW89_UKRAINE][10] = 34, -+ [1][1][RTW89_CHILE][10] = 48, -+ [1][1][RTW89_QATAR][10] = 34, - [1][1][RTW89_FCC][11] = 30, - [1][1][RTW89_ETSI][11] = 34, - [1][1][RTW89_MKK][11] = 34, - [1][1][RTW89_IC][11] = 30, -- [1][1][RTW89_KCC][11] = 38, -+ [1][1][RTW89_KCC][11] = 44, - [1][1][RTW89_ACMA][11] = 34, - [1][1][RTW89_CN][11] = 32, - [1][1][RTW89_UK][11] = 34, -+ [1][1][RTW89_MEXICO][11] = 30, -+ [1][1][RTW89_UKRAINE][11] = 34, -+ [1][1][RTW89_CHILE][11] = 30, -+ [1][1][RTW89_QATAR][11] = 34, - [1][1][RTW89_FCC][12] = -6, - [1][1][RTW89_ETSI][12] = 34, - [1][1][RTW89_MKK][12] = 34, - [1][1][RTW89_IC][12] = -6, -- [1][1][RTW89_KCC][12] = 38, -+ [1][1][RTW89_KCC][12] = 44, - [1][1][RTW89_ACMA][12] = 34, - [1][1][RTW89_CN][12] = 32, - [1][1][RTW89_UK][12] = 34, -+ [1][1][RTW89_MEXICO][12] = -6, -+ [1][1][RTW89_UKRAINE][12] = 34, -+ [1][1][RTW89_CHILE][12] = -6, -+ [1][1][RTW89_QATAR][12] = 34, - [1][1][RTW89_FCC][13] = 127, - [1][1][RTW89_ETSI][13] = 127, - [1][1][RTW89_MKK][13] = 127, -@@ -34515,110 +36273,166 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [1][1][RTW89_ACMA][13] = 127, - [1][1][RTW89_CN][13] = 127, - [1][1][RTW89_UK][13] = 127, -+ [1][1][RTW89_MEXICO][13] = 127, -+ [1][1][RTW89_UKRAINE][13] = 127, -+ [1][1][RTW89_CHILE][13] = 127, -+ [1][1][RTW89_QATAR][13] = 127, - [2][0][RTW89_FCC][0] = 70, - [2][0][RTW89_ETSI][0] = 58, - [2][0][RTW89_MKK][0] = 58, - [2][0][RTW89_IC][0] = 70, -- [2][0][RTW89_KCC][0] = 64, -+ [2][0][RTW89_KCC][0] = 60, - [2][0][RTW89_ACMA][0] = 58, - [2][0][RTW89_CN][0] = 56, - [2][0][RTW89_UK][0] = 58, -+ [2][0][RTW89_MEXICO][0] = 70, -+ [2][0][RTW89_UKRAINE][0] = 58, -+ [2][0][RTW89_CHILE][0] = 70, -+ [2][0][RTW89_QATAR][0] = 58, - [2][0][RTW89_FCC][1] = 70, - [2][0][RTW89_ETSI][1] = 58, - [2][0][RTW89_MKK][1] = 58, - [2][0][RTW89_IC][1] = 70, -- [2][0][RTW89_KCC][1] = 64, -+ [2][0][RTW89_KCC][1] = 60, - [2][0][RTW89_ACMA][1] = 58, - [2][0][RTW89_CN][1] = 56, - [2][0][RTW89_UK][1] = 58, -+ [2][0][RTW89_MEXICO][1] = 70, -+ [2][0][RTW89_UKRAINE][1] = 58, -+ [2][0][RTW89_CHILE][1] = 54, -+ [2][0][RTW89_QATAR][1] = 58, - [2][0][RTW89_FCC][2] = 72, - [2][0][RTW89_ETSI][2] = 58, - [2][0][RTW89_MKK][2] = 58, - [2][0][RTW89_IC][2] = 72, -- [2][0][RTW89_KCC][2] = 64, -+ [2][0][RTW89_KCC][2] = 60, - [2][0][RTW89_ACMA][2] = 58, - [2][0][RTW89_CN][2] = 56, - [2][0][RTW89_UK][2] = 58, -+ [2][0][RTW89_MEXICO][2] = 72, -+ [2][0][RTW89_UKRAINE][2] = 58, -+ [2][0][RTW89_CHILE][2] = 54, -+ [2][0][RTW89_QATAR][2] = 58, - [2][0][RTW89_FCC][3] = 72, - [2][0][RTW89_ETSI][3] = 58, - [2][0][RTW89_MKK][3] = 58, - [2][0][RTW89_IC][3] = 72, -- [2][0][RTW89_KCC][3] = 64, -+ [2][0][RTW89_KCC][3] = 60, - [2][0][RTW89_ACMA][3] = 58, - [2][0][RTW89_CN][3] = 56, - [2][0][RTW89_UK][3] = 58, -+ [2][0][RTW89_MEXICO][3] = 72, -+ [2][0][RTW89_UKRAINE][3] = 58, -+ [2][0][RTW89_CHILE][3] = 54, -+ [2][0][RTW89_QATAR][3] = 58, - [2][0][RTW89_FCC][4] = 72, - [2][0][RTW89_ETSI][4] = 58, - [2][0][RTW89_MKK][4] = 58, - [2][0][RTW89_IC][4] = 72, -- [2][0][RTW89_KCC][4] = 64, -+ [2][0][RTW89_KCC][4] = 60, - [2][0][RTW89_ACMA][4] = 58, - [2][0][RTW89_CN][4] = 56, - [2][0][RTW89_UK][4] = 58, -+ [2][0][RTW89_MEXICO][4] = 72, -+ [2][0][RTW89_UKRAINE][4] = 58, -+ [2][0][RTW89_CHILE][4] = 54, -+ [2][0][RTW89_QATAR][4] = 58, - [2][0][RTW89_FCC][5] = 82, - [2][0][RTW89_ETSI][5] = 58, - [2][0][RTW89_MKK][5] = 58, - [2][0][RTW89_IC][5] = 82, -- [2][0][RTW89_KCC][5] = 64, -+ [2][0][RTW89_KCC][5] = 60, - [2][0][RTW89_ACMA][5] = 58, - [2][0][RTW89_CN][5] = 56, - [2][0][RTW89_UK][5] = 58, -+ [2][0][RTW89_MEXICO][5] = 82, -+ [2][0][RTW89_UKRAINE][5] = 58, -+ [2][0][RTW89_CHILE][5] = 82, -+ [2][0][RTW89_QATAR][5] = 58, - [2][0][RTW89_FCC][6] = 66, - [2][0][RTW89_ETSI][6] = 56, - [2][0][RTW89_MKK][6] = 58, - [2][0][RTW89_IC][6] = 66, -- [2][0][RTW89_KCC][6] = 64, -+ [2][0][RTW89_KCC][6] = 60, - [2][0][RTW89_ACMA][6] = 56, - [2][0][RTW89_CN][6] = 56, - [2][0][RTW89_UK][6] = 56, -+ [2][0][RTW89_MEXICO][6] = 66, -+ [2][0][RTW89_UKRAINE][6] = 56, -+ [2][0][RTW89_CHILE][6] = 48, -+ [2][0][RTW89_QATAR][6] = 56, - [2][0][RTW89_FCC][7] = 66, - [2][0][RTW89_ETSI][7] = 58, - [2][0][RTW89_MKK][7] = 58, - [2][0][RTW89_IC][7] = 66, -- [2][0][RTW89_KCC][7] = 64, -+ [2][0][RTW89_KCC][7] = 60, - [2][0][RTW89_ACMA][7] = 58, - [2][0][RTW89_CN][7] = 56, - [2][0][RTW89_UK][7] = 58, -+ [2][0][RTW89_MEXICO][7] = 66, -+ [2][0][RTW89_UKRAINE][7] = 58, -+ [2][0][RTW89_CHILE][7] = 48, -+ [2][0][RTW89_QATAR][7] = 58, - [2][0][RTW89_FCC][8] = 66, - [2][0][RTW89_ETSI][8] = 58, - [2][0][RTW89_MKK][8] = 58, - [2][0][RTW89_IC][8] = 66, -- [2][0][RTW89_KCC][8] = 64, -+ [2][0][RTW89_KCC][8] = 60, - [2][0][RTW89_ACMA][8] = 58, - [2][0][RTW89_CN][8] = 56, - [2][0][RTW89_UK][8] = 58, -+ [2][0][RTW89_MEXICO][8] = 66, -+ [2][0][RTW89_UKRAINE][8] = 58, -+ [2][0][RTW89_CHILE][8] = 48, -+ [2][0][RTW89_QATAR][8] = 58, - [2][0][RTW89_FCC][9] = 64, - [2][0][RTW89_ETSI][9] = 58, - [2][0][RTW89_MKK][9] = 58, - [2][0][RTW89_IC][9] = 64, -- [2][0][RTW89_KCC][9] = 64, -+ [2][0][RTW89_KCC][9] = 60, - [2][0][RTW89_ACMA][9] = 58, - [2][0][RTW89_CN][9] = 56, - [2][0][RTW89_UK][9] = 58, -+ [2][0][RTW89_MEXICO][9] = 64, -+ [2][0][RTW89_UKRAINE][9] = 58, -+ [2][0][RTW89_CHILE][9] = 48, -+ [2][0][RTW89_QATAR][9] = 58, - [2][0][RTW89_FCC][10] = 64, - [2][0][RTW89_ETSI][10] = 58, - [2][0][RTW89_MKK][10] = 58, - [2][0][RTW89_IC][10] = 64, -- [2][0][RTW89_KCC][10] = 64, -+ [2][0][RTW89_KCC][10] = 60, - [2][0][RTW89_ACMA][10] = 58, - [2][0][RTW89_CN][10] = 56, - [2][0][RTW89_UK][10] = 58, -+ [2][0][RTW89_MEXICO][10] = 64, -+ [2][0][RTW89_UKRAINE][10] = 58, -+ [2][0][RTW89_CHILE][10] = 64, -+ [2][0][RTW89_QATAR][10] = 58, - [2][0][RTW89_FCC][11] = 48, - [2][0][RTW89_ETSI][11] = 58, - [2][0][RTW89_MKK][11] = 58, - [2][0][RTW89_IC][11] = 48, -- [2][0][RTW89_KCC][11] = 64, -+ [2][0][RTW89_KCC][11] = 60, - [2][0][RTW89_ACMA][11] = 58, - [2][0][RTW89_CN][11] = 56, - [2][0][RTW89_UK][11] = 58, -+ [2][0][RTW89_MEXICO][11] = 48, -+ [2][0][RTW89_UKRAINE][11] = 58, -+ [2][0][RTW89_CHILE][11] = 48, -+ [2][0][RTW89_QATAR][11] = 58, - [2][0][RTW89_FCC][12] = 16, - [2][0][RTW89_ETSI][12] = 58, - [2][0][RTW89_MKK][12] = 58, - [2][0][RTW89_IC][12] = 16, -- [2][0][RTW89_KCC][12] = 64, -+ [2][0][RTW89_KCC][12] = 60, - [2][0][RTW89_ACMA][12] = 58, - [2][0][RTW89_CN][12] = 56, - [2][0][RTW89_UK][12] = 58, -+ [2][0][RTW89_MEXICO][12] = 16, -+ [2][0][RTW89_UKRAINE][12] = 58, -+ [2][0][RTW89_CHILE][12] = 16, -+ [2][0][RTW89_QATAR][12] = 58, - [2][0][RTW89_FCC][13] = 127, - [2][0][RTW89_ETSI][13] = 127, - [2][0][RTW89_MKK][13] = 127, -@@ -34627,110 +36441,166 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [2][0][RTW89_ACMA][13] = 127, - [2][0][RTW89_CN][13] = 127, - [2][0][RTW89_UK][13] = 127, -+ [2][0][RTW89_MEXICO][13] = 127, -+ [2][0][RTW89_UKRAINE][13] = 127, -+ [2][0][RTW89_CHILE][13] = 127, -+ [2][0][RTW89_QATAR][13] = 127, - [2][1][RTW89_FCC][0] = 64, - [2][1][RTW89_ETSI][0] = 46, - [2][1][RTW89_MKK][0] = 46, - [2][1][RTW89_IC][0] = 64, -- [2][1][RTW89_KCC][0] = 52, -+ [2][1][RTW89_KCC][0] = 48, - [2][1][RTW89_ACMA][0] = 46, - [2][1][RTW89_CN][0] = 44, - [2][1][RTW89_UK][0] = 46, -+ [2][1][RTW89_MEXICO][0] = 64, -+ [2][1][RTW89_UKRAINE][0] = 46, -+ [2][1][RTW89_CHILE][0] = 64, -+ [2][1][RTW89_QATAR][0] = 46, - [2][1][RTW89_FCC][1] = 64, - [2][1][RTW89_ETSI][1] = 46, - [2][1][RTW89_MKK][1] = 46, - [2][1][RTW89_IC][1] = 64, -- [2][1][RTW89_KCC][1] = 52, -+ [2][1][RTW89_KCC][1] = 48, - [2][1][RTW89_ACMA][1] = 46, - [2][1][RTW89_CN][1] = 44, - [2][1][RTW89_UK][1] = 46, -+ [2][1][RTW89_MEXICO][1] = 64, -+ [2][1][RTW89_UKRAINE][1] = 46, -+ [2][1][RTW89_CHILE][1] = 44, -+ [2][1][RTW89_QATAR][1] = 46, - [2][1][RTW89_FCC][2] = 68, - [2][1][RTW89_ETSI][2] = 46, - [2][1][RTW89_MKK][2] = 46, - [2][1][RTW89_IC][2] = 68, -- [2][1][RTW89_KCC][2] = 52, -+ [2][1][RTW89_KCC][2] = 48, - [2][1][RTW89_ACMA][2] = 46, - [2][1][RTW89_CN][2] = 44, - [2][1][RTW89_UK][2] = 46, -+ [2][1][RTW89_MEXICO][2] = 68, -+ [2][1][RTW89_UKRAINE][2] = 46, -+ [2][1][RTW89_CHILE][2] = 44, -+ [2][1][RTW89_QATAR][2] = 46, - [2][1][RTW89_FCC][3] = 72, - [2][1][RTW89_ETSI][3] = 46, - [2][1][RTW89_MKK][3] = 46, - [2][1][RTW89_IC][3] = 72, -- [2][1][RTW89_KCC][3] = 52, -+ [2][1][RTW89_KCC][3] = 48, - [2][1][RTW89_ACMA][3] = 46, - [2][1][RTW89_CN][3] = 44, - [2][1][RTW89_UK][3] = 46, -+ [2][1][RTW89_MEXICO][3] = 72, -+ [2][1][RTW89_UKRAINE][3] = 46, -+ [2][1][RTW89_CHILE][3] = 44, -+ [2][1][RTW89_QATAR][3] = 46, - [2][1][RTW89_FCC][4] = 74, - [2][1][RTW89_ETSI][4] = 46, - [2][1][RTW89_MKK][4] = 46, - [2][1][RTW89_IC][4] = 74, -- [2][1][RTW89_KCC][4] = 50, -+ [2][1][RTW89_KCC][4] = 48, - [2][1][RTW89_ACMA][4] = 46, - [2][1][RTW89_CN][4] = 44, - [2][1][RTW89_UK][4] = 46, -+ [2][1][RTW89_MEXICO][4] = 74, -+ [2][1][RTW89_UKRAINE][4] = 46, -+ [2][1][RTW89_CHILE][4] = 44, -+ [2][1][RTW89_QATAR][4] = 46, - [2][1][RTW89_FCC][5] = 82, - [2][1][RTW89_ETSI][5] = 46, - [2][1][RTW89_MKK][5] = 46, - [2][1][RTW89_IC][5] = 82, -- [2][1][RTW89_KCC][5] = 50, -+ [2][1][RTW89_KCC][5] = 48, - [2][1][RTW89_ACMA][5] = 46, - [2][1][RTW89_CN][5] = 44, - [2][1][RTW89_UK][5] = 46, -+ [2][1][RTW89_MEXICO][5] = 82, -+ [2][1][RTW89_UKRAINE][5] = 46, -+ [2][1][RTW89_CHILE][5] = 78, -+ [2][1][RTW89_QATAR][5] = 46, - [2][1][RTW89_FCC][6] = 72, - [2][1][RTW89_ETSI][6] = 44, - [2][1][RTW89_MKK][6] = 46, - [2][1][RTW89_IC][6] = 72, -- [2][1][RTW89_KCC][6] = 50, -+ [2][1][RTW89_KCC][6] = 48, - [2][1][RTW89_ACMA][6] = 44, - [2][1][RTW89_CN][6] = 44, - [2][1][RTW89_UK][6] = 44, -+ [2][1][RTW89_MEXICO][6] = 72, -+ [2][1][RTW89_UKRAINE][6] = 44, -+ [2][1][RTW89_CHILE][6] = 42, -+ [2][1][RTW89_QATAR][6] = 44, - [2][1][RTW89_FCC][7] = 72, - [2][1][RTW89_ETSI][7] = 46, - [2][1][RTW89_MKK][7] = 46, - [2][1][RTW89_IC][7] = 72, -- [2][1][RTW89_KCC][7] = 50, -+ [2][1][RTW89_KCC][7] = 48, - [2][1][RTW89_ACMA][7] = 46, - [2][1][RTW89_CN][7] = 44, - [2][1][RTW89_UK][7] = 46, -+ [2][1][RTW89_MEXICO][7] = 72, -+ [2][1][RTW89_UKRAINE][7] = 46, -+ [2][1][RTW89_CHILE][7] = 42, -+ [2][1][RTW89_QATAR][7] = 46, - [2][1][RTW89_FCC][8] = 68, - [2][1][RTW89_ETSI][8] = 46, - [2][1][RTW89_MKK][8] = 46, - [2][1][RTW89_IC][8] = 68, -- [2][1][RTW89_KCC][8] = 50, -+ [2][1][RTW89_KCC][8] = 48, - [2][1][RTW89_ACMA][8] = 46, - [2][1][RTW89_CN][8] = 44, - [2][1][RTW89_UK][8] = 46, -+ [2][1][RTW89_MEXICO][8] = 68, -+ [2][1][RTW89_UKRAINE][8] = 46, -+ [2][1][RTW89_CHILE][8] = 42, -+ [2][1][RTW89_QATAR][8] = 46, - [2][1][RTW89_FCC][9] = 64, - [2][1][RTW89_ETSI][9] = 46, - [2][1][RTW89_MKK][9] = 46, - [2][1][RTW89_IC][9] = 64, -- [2][1][RTW89_KCC][9] = 52, -+ [2][1][RTW89_KCC][9] = 48, - [2][1][RTW89_ACMA][9] = 46, - [2][1][RTW89_CN][9] = 44, - [2][1][RTW89_UK][9] = 46, -+ [2][1][RTW89_MEXICO][9] = 64, -+ [2][1][RTW89_UKRAINE][9] = 46, -+ [2][1][RTW89_CHILE][9] = 42, -+ [2][1][RTW89_QATAR][9] = 46, - [2][1][RTW89_FCC][10] = 64, - [2][1][RTW89_ETSI][10] = 46, - [2][1][RTW89_MKK][10] = 46, - [2][1][RTW89_IC][10] = 64, -- [2][1][RTW89_KCC][10] = 52, -+ [2][1][RTW89_KCC][10] = 48, - [2][1][RTW89_ACMA][10] = 46, - [2][1][RTW89_CN][10] = 44, - [2][1][RTW89_UK][10] = 46, -+ [2][1][RTW89_MEXICO][10] = 64, -+ [2][1][RTW89_UKRAINE][10] = 46, -+ [2][1][RTW89_CHILE][10] = 64, -+ [2][1][RTW89_QATAR][10] = 46, - [2][1][RTW89_FCC][11] = 46, - [2][1][RTW89_ETSI][11] = 46, - [2][1][RTW89_MKK][11] = 46, - [2][1][RTW89_IC][11] = 46, -- [2][1][RTW89_KCC][11] = 52, -+ [2][1][RTW89_KCC][11] = 48, - [2][1][RTW89_ACMA][11] = 46, - [2][1][RTW89_CN][11] = 44, - [2][1][RTW89_UK][11] = 46, -+ [2][1][RTW89_MEXICO][11] = 46, -+ [2][1][RTW89_UKRAINE][11] = 46, -+ [2][1][RTW89_CHILE][11] = 46, -+ [2][1][RTW89_QATAR][11] = 46, - [2][1][RTW89_FCC][12] = 6, - [2][1][RTW89_ETSI][12] = 44, - [2][1][RTW89_MKK][12] = 46, - [2][1][RTW89_IC][12] = 6, -- [2][1][RTW89_KCC][12] = 52, -+ [2][1][RTW89_KCC][12] = 48, - [2][1][RTW89_ACMA][12] = 44, - [2][1][RTW89_CN][12] = 42, - [2][1][RTW89_UK][12] = 44, -+ [2][1][RTW89_MEXICO][12] = 6, -+ [2][1][RTW89_UKRAINE][12] = 44, -+ [2][1][RTW89_CHILE][12] = 6, -+ [2][1][RTW89_QATAR][12] = 44, - [2][1][RTW89_FCC][13] = 127, - [2][1][RTW89_ETSI][13] = 127, - [2][1][RTW89_MKK][13] = 127, -@@ -34739,6 +36609,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_2g[RTW - [2][1][RTW89_ACMA][13] = 127, - [2][1][RTW89_CN][13] = 127, - [2][1][RTW89_UK][13] = 127, -+ [2][1][RTW89_MEXICO][13] = 127, -+ [2][1][RTW89_UKRAINE][13] = 127, -+ [2][1][RTW89_CHILE][13] = 127, -+ [2][1][RTW89_QATAR][13] = 127, - }; - - static -@@ -34747,168 +36621,168 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_WW][0] = 16, - [0][0][RTW89_WW][2] = 16, - [0][0][RTW89_WW][4] = 16, -- [0][0][RTW89_WW][6] = 10, -+ [0][0][RTW89_WW][6] = 16, - [0][0][RTW89_WW][8] = 16, - [0][0][RTW89_WW][10] = 16, - [0][0][RTW89_WW][12] = 16, - [0][0][RTW89_WW][14] = 16, -- [0][0][RTW89_WW][15] = 30, -- [0][0][RTW89_WW][17] = 30, -- [0][0][RTW89_WW][19] = 30, -- [0][0][RTW89_WW][21] = 30, -- [0][0][RTW89_WW][23] = 30, -- [0][0][RTW89_WW][25] = 30, -- [0][0][RTW89_WW][27] = 30, -- [0][0][RTW89_WW][29] = 30, -- [0][0][RTW89_WW][31] = 30, -- [0][0][RTW89_WW][33] = 30, -- [0][0][RTW89_WW][35] = 30, -+ [0][0][RTW89_WW][15] = 22, -+ [0][0][RTW89_WW][17] = 22, -+ [0][0][RTW89_WW][19] = 22, -+ [0][0][RTW89_WW][21] = 22, -+ [0][0][RTW89_WW][23] = 22, -+ [0][0][RTW89_WW][25] = 22, -+ [0][0][RTW89_WW][27] = 22, -+ [0][0][RTW89_WW][29] = 22, -+ [0][0][RTW89_WW][31] = 22, -+ [0][0][RTW89_WW][33] = 22, -+ [0][0][RTW89_WW][35] = 22, - [0][0][RTW89_WW][37] = 30, -- [0][0][RTW89_WW][38] = 28, -- [0][0][RTW89_WW][40] = 28, -- [0][0][RTW89_WW][42] = 28, -- [0][0][RTW89_WW][44] = 28, -- [0][0][RTW89_WW][46] = 28, -+ [0][0][RTW89_WW][38] = 26, -+ [0][0][RTW89_WW][40] = 26, -+ [0][0][RTW89_WW][42] = 26, -+ [0][0][RTW89_WW][44] = 26, -+ [0][0][RTW89_WW][46] = 26, - [0][0][RTW89_WW][48] = 46, - [0][0][RTW89_WW][50] = 44, - [0][0][RTW89_WW][52] = 34, - [0][1][RTW89_WW][0] = 4, - [0][1][RTW89_WW][2] = 4, - [0][1][RTW89_WW][4] = 4, -- [0][1][RTW89_WW][6] = 1, -+ [0][1][RTW89_WW][6] = 4, - [0][1][RTW89_WW][8] = 4, - [0][1][RTW89_WW][10] = 4, - [0][1][RTW89_WW][12] = 4, - [0][1][RTW89_WW][14] = 4, -- [0][1][RTW89_WW][15] = 18, -- [0][1][RTW89_WW][17] = 18, -- [0][1][RTW89_WW][19] = 18, -- [0][1][RTW89_WW][21] = 18, -- [0][1][RTW89_WW][23] = 18, -- [0][1][RTW89_WW][25] = 18, -- [0][1][RTW89_WW][27] = 16, -- [0][1][RTW89_WW][29] = 16, -- [0][1][RTW89_WW][31] = 16, -- [0][1][RTW89_WW][33] = 16, -- [0][1][RTW89_WW][35] = 16, -+ [0][1][RTW89_WW][15] = 10, -+ [0][1][RTW89_WW][17] = 10, -+ [0][1][RTW89_WW][19] = 10, -+ [0][1][RTW89_WW][21] = 10, -+ [0][1][RTW89_WW][23] = 10, -+ [0][1][RTW89_WW][25] = 10, -+ [0][1][RTW89_WW][27] = 10, -+ [0][1][RTW89_WW][29] = 10, -+ [0][1][RTW89_WW][31] = 10, -+ [0][1][RTW89_WW][33] = 10, -+ [0][1][RTW89_WW][35] = 10, - [0][1][RTW89_WW][37] = 18, -- [0][1][RTW89_WW][38] = 16, -- [0][1][RTW89_WW][40] = 16, -- [0][1][RTW89_WW][42] = 16, -- [0][1][RTW89_WW][44] = 16, -- [0][1][RTW89_WW][46] = 16, -+ [0][1][RTW89_WW][38] = 14, -+ [0][1][RTW89_WW][40] = 14, -+ [0][1][RTW89_WW][42] = 14, -+ [0][1][RTW89_WW][44] = 14, -+ [0][1][RTW89_WW][46] = 14, - [0][1][RTW89_WW][48] = 20, - [0][1][RTW89_WW][50] = 20, - [0][1][RTW89_WW][52] = 8, - [1][0][RTW89_WW][0] = 26, - [1][0][RTW89_WW][2] = 26, - [1][0][RTW89_WW][4] = 26, -- [1][0][RTW89_WW][6] = 24, -+ [1][0][RTW89_WW][6] = 26, - [1][0][RTW89_WW][8] = 26, - [1][0][RTW89_WW][10] = 26, - [1][0][RTW89_WW][12] = 26, - [1][0][RTW89_WW][14] = 26, -- [1][0][RTW89_WW][15] = 40, -- [1][0][RTW89_WW][17] = 40, -- [1][0][RTW89_WW][19] = 40, -- [1][0][RTW89_WW][21] = 40, -- [1][0][RTW89_WW][23] = 40, -- [1][0][RTW89_WW][25] = 40, -- [1][0][RTW89_WW][27] = 42, -- [1][0][RTW89_WW][29] = 42, -- [1][0][RTW89_WW][31] = 42, -- [1][0][RTW89_WW][33] = 42, -- [1][0][RTW89_WW][35] = 42, -+ [1][0][RTW89_WW][15] = 32, -+ [1][0][RTW89_WW][17] = 32, -+ [1][0][RTW89_WW][19] = 32, -+ [1][0][RTW89_WW][21] = 32, -+ [1][0][RTW89_WW][23] = 32, -+ [1][0][RTW89_WW][25] = 32, -+ [1][0][RTW89_WW][27] = 32, -+ [1][0][RTW89_WW][29] = 32, -+ [1][0][RTW89_WW][31] = 32, -+ [1][0][RTW89_WW][33] = 32, -+ [1][0][RTW89_WW][35] = 32, - [1][0][RTW89_WW][37] = 42, -- [1][0][RTW89_WW][38] = 28, -- [1][0][RTW89_WW][40] = 28, -- [1][0][RTW89_WW][42] = 28, -- [1][0][RTW89_WW][44] = 28, -- [1][0][RTW89_WW][46] = 28, -+ [1][0][RTW89_WW][38] = 26, -+ [1][0][RTW89_WW][40] = 26, -+ [1][0][RTW89_WW][42] = 26, -+ [1][0][RTW89_WW][44] = 26, -+ [1][0][RTW89_WW][46] = 26, - [1][0][RTW89_WW][48] = 56, - [1][0][RTW89_WW][50] = 58, - [1][0][RTW89_WW][52] = 56, - [1][1][RTW89_WW][0] = 14, - [1][1][RTW89_WW][2] = 14, - [1][1][RTW89_WW][4] = 14, -- [1][1][RTW89_WW][6] = 8, -+ [1][1][RTW89_WW][6] = 14, - [1][1][RTW89_WW][8] = 14, - [1][1][RTW89_WW][10] = 14, - [1][1][RTW89_WW][12] = 14, - [1][1][RTW89_WW][14] = 14, -- [1][1][RTW89_WW][15] = 28, -- [1][1][RTW89_WW][17] = 28, -- [1][1][RTW89_WW][19] = 28, -- [1][1][RTW89_WW][21] = 28, -- [1][1][RTW89_WW][23] = 28, -- [1][1][RTW89_WW][25] = 28, -- [1][1][RTW89_WW][27] = 30, -- [1][1][RTW89_WW][29] = 30, -- [1][1][RTW89_WW][31] = 30, -- [1][1][RTW89_WW][33] = 30, -- [1][1][RTW89_WW][35] = 30, -+ [1][1][RTW89_WW][15] = 20, -+ [1][1][RTW89_WW][17] = 20, -+ [1][1][RTW89_WW][19] = 20, -+ [1][1][RTW89_WW][21] = 20, -+ [1][1][RTW89_WW][23] = 20, -+ [1][1][RTW89_WW][25] = 20, -+ [1][1][RTW89_WW][27] = 20, -+ [1][1][RTW89_WW][29] = 20, -+ [1][1][RTW89_WW][31] = 20, -+ [1][1][RTW89_WW][33] = 20, -+ [1][1][RTW89_WW][35] = 20, - [1][1][RTW89_WW][37] = 32, -- [1][1][RTW89_WW][38] = 16, -- [1][1][RTW89_WW][40] = 16, -- [1][1][RTW89_WW][42] = 16, -- [1][1][RTW89_WW][44] = 16, -- [1][1][RTW89_WW][46] = 16, -+ [1][1][RTW89_WW][38] = 14, -+ [1][1][RTW89_WW][40] = 14, -+ [1][1][RTW89_WW][42] = 14, -+ [1][1][RTW89_WW][44] = 14, -+ [1][1][RTW89_WW][46] = 14, - [1][1][RTW89_WW][48] = 34, - [1][1][RTW89_WW][50] = 34, - [1][1][RTW89_WW][52] = 30, - [2][0][RTW89_WW][0] = 40, - [2][0][RTW89_WW][2] = 40, - [2][0][RTW89_WW][4] = 40, -- [2][0][RTW89_WW][6] = 36, -+ [2][0][RTW89_WW][6] = 38, - [2][0][RTW89_WW][8] = 40, - [2][0][RTW89_WW][10] = 40, - [2][0][RTW89_WW][12] = 40, - [2][0][RTW89_WW][14] = 40, -- [2][0][RTW89_WW][15] = 52, -- [2][0][RTW89_WW][17] = 52, -- [2][0][RTW89_WW][19] = 52, -- [2][0][RTW89_WW][21] = 52, -- [2][0][RTW89_WW][23] = 52, -- [2][0][RTW89_WW][25] = 52, -- [2][0][RTW89_WW][27] = 52, -- [2][0][RTW89_WW][29] = 52, -- [2][0][RTW89_WW][31] = 52, -- [2][0][RTW89_WW][33] = 52, -- [2][0][RTW89_WW][35] = 52, -+ [2][0][RTW89_WW][15] = 46, -+ [2][0][RTW89_WW][17] = 46, -+ [2][0][RTW89_WW][19] = 46, -+ [2][0][RTW89_WW][21] = 46, -+ [2][0][RTW89_WW][23] = 46, -+ [2][0][RTW89_WW][25] = 46, -+ [2][0][RTW89_WW][27] = 46, -+ [2][0][RTW89_WW][29] = 46, -+ [2][0][RTW89_WW][31] = 46, -+ [2][0][RTW89_WW][33] = 46, -+ [2][0][RTW89_WW][35] = 46, - [2][0][RTW89_WW][37] = 52, -- [2][0][RTW89_WW][38] = 28, -- [2][0][RTW89_WW][40] = 28, -- [2][0][RTW89_WW][42] = 28, -- [2][0][RTW89_WW][44] = 28, -- [2][0][RTW89_WW][46] = 28, -+ [2][0][RTW89_WW][38] = 26, -+ [2][0][RTW89_WW][40] = 26, -+ [2][0][RTW89_WW][42] = 26, -+ [2][0][RTW89_WW][44] = 26, -+ [2][0][RTW89_WW][46] = 26, - [2][0][RTW89_WW][48] = 64, - [2][0][RTW89_WW][50] = 64, - [2][0][RTW89_WW][52] = 64, - [2][1][RTW89_WW][0] = 26, - [2][1][RTW89_WW][2] = 26, - [2][1][RTW89_WW][4] = 26, -- [2][1][RTW89_WW][6] = 20, -+ [2][1][RTW89_WW][6] = 26, - [2][1][RTW89_WW][8] = 28, - [2][1][RTW89_WW][10] = 28, - [2][1][RTW89_WW][12] = 28, - [2][1][RTW89_WW][14] = 28, -- [2][1][RTW89_WW][15] = 40, -- [2][1][RTW89_WW][17] = 40, -- [2][1][RTW89_WW][19] = 40, -- [2][1][RTW89_WW][21] = 40, -- [2][1][RTW89_WW][23] = 40, -- [2][1][RTW89_WW][25] = 40, -- [2][1][RTW89_WW][27] = 40, -- [2][1][RTW89_WW][29] = 40, -- [2][1][RTW89_WW][31] = 40, -- [2][1][RTW89_WW][33] = 40, -- [2][1][RTW89_WW][35] = 40, -+ [2][1][RTW89_WW][15] = 34, -+ [2][1][RTW89_WW][17] = 34, -+ [2][1][RTW89_WW][19] = 34, -+ [2][1][RTW89_WW][21] = 34, -+ [2][1][RTW89_WW][23] = 34, -+ [2][1][RTW89_WW][25] = 34, -+ [2][1][RTW89_WW][27] = 34, -+ [2][1][RTW89_WW][29] = 34, -+ [2][1][RTW89_WW][31] = 34, -+ [2][1][RTW89_WW][33] = 34, -+ [2][1][RTW89_WW][35] = 34, - [2][1][RTW89_WW][37] = 42, -- [2][1][RTW89_WW][38] = 16, -- [2][1][RTW89_WW][40] = 16, -- [2][1][RTW89_WW][42] = 16, -- [2][1][RTW89_WW][44] = 16, -- [2][1][RTW89_WW][46] = 16, -+ [2][1][RTW89_WW][38] = 14, -+ [2][1][RTW89_WW][40] = 14, -+ [2][1][RTW89_WW][42] = 14, -+ [2][1][RTW89_WW][44] = 14, -+ [2][1][RTW89_WW][46] = 14, - [2][1][RTW89_WW][48] = 40, - [2][1][RTW89_WW][50] = 40, - [2][1][RTW89_WW][52] = 40, -@@ -34920,6 +36794,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][0] = 30, - [0][0][RTW89_CN][0] = 16, - [0][0][RTW89_UK][0] = 30, -+ [0][0][RTW89_MEXICO][0] = 50, -+ [0][0][RTW89_UKRAINE][0] = 22, -+ [0][0][RTW89_CHILE][0] = 50, -+ [0][0][RTW89_QATAR][0] = 30, - [0][0][RTW89_FCC][2] = 50, - [0][0][RTW89_ETSI][2] = 30, - [0][0][RTW89_MKK][2] = 36, -@@ -34928,6 +36806,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][2] = 30, - [0][0][RTW89_CN][2] = 16, - [0][0][RTW89_UK][2] = 30, -+ [0][0][RTW89_MEXICO][2] = 50, -+ [0][0][RTW89_UKRAINE][2] = 22, -+ [0][0][RTW89_CHILE][2] = 50, -+ [0][0][RTW89_QATAR][2] = 30, - [0][0][RTW89_FCC][4] = 50, - [0][0][RTW89_ETSI][4] = 30, - [0][0][RTW89_MKK][4] = 22, -@@ -34936,30 +36818,46 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][4] = 30, - [0][0][RTW89_CN][4] = 16, - [0][0][RTW89_UK][4] = 30, -+ [0][0][RTW89_MEXICO][4] = 50, -+ [0][0][RTW89_UKRAINE][4] = 22, -+ [0][0][RTW89_CHILE][4] = 50, -+ [0][0][RTW89_QATAR][4] = 30, - [0][0][RTW89_FCC][6] = 50, - [0][0][RTW89_ETSI][6] = 30, - [0][0][RTW89_MKK][6] = 22, - [0][0][RTW89_IC][6] = 32, -- [0][0][RTW89_KCC][6] = 10, -+ [0][0][RTW89_KCC][6] = 18, - [0][0][RTW89_ACMA][6] = 30, - [0][0][RTW89_CN][6] = 16, - [0][0][RTW89_UK][6] = 30, -+ [0][0][RTW89_MEXICO][6] = 50, -+ [0][0][RTW89_UKRAINE][6] = 22, -+ [0][0][RTW89_CHILE][6] = 50, -+ [0][0][RTW89_QATAR][6] = 30, - [0][0][RTW89_FCC][8] = 52, - [0][0][RTW89_ETSI][8] = 28, - [0][0][RTW89_MKK][8] = 18, - [0][0][RTW89_IC][8] = 52, -- [0][0][RTW89_KCC][8] = 44, -+ [0][0][RTW89_KCC][8] = 40, - [0][0][RTW89_ACMA][8] = 28, - [0][0][RTW89_CN][8] = 16, - [0][0][RTW89_UK][8] = 28, -+ [0][0][RTW89_MEXICO][8] = 52, -+ [0][0][RTW89_UKRAINE][8] = 22, -+ [0][0][RTW89_CHILE][8] = 52, -+ [0][0][RTW89_QATAR][8] = 28, - [0][0][RTW89_FCC][10] = 52, - [0][0][RTW89_ETSI][10] = 28, - [0][0][RTW89_MKK][10] = 18, - [0][0][RTW89_IC][10] = 52, -- [0][0][RTW89_KCC][10] = 44, -+ [0][0][RTW89_KCC][10] = 40, - [0][0][RTW89_ACMA][10] = 28, - [0][0][RTW89_CN][10] = 16, - [0][0][RTW89_UK][10] = 28, -+ [0][0][RTW89_MEXICO][10] = 52, -+ [0][0][RTW89_UKRAINE][10] = 22, -+ [0][0][RTW89_CHILE][10] = 52, -+ [0][0][RTW89_QATAR][10] = 28, - [0][0][RTW89_FCC][12] = 52, - [0][0][RTW89_ETSI][12] = 28, - [0][0][RTW89_MKK][12] = 34, -@@ -34968,6 +36866,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][12] = 28, - [0][0][RTW89_CN][12] = 16, - [0][0][RTW89_UK][12] = 28, -+ [0][0][RTW89_MEXICO][12] = 52, -+ [0][0][RTW89_UKRAINE][12] = 22, -+ [0][0][RTW89_CHILE][12] = 52, -+ [0][0][RTW89_QATAR][12] = 28, - [0][0][RTW89_FCC][14] = 52, - [0][0][RTW89_ETSI][14] = 28, - [0][0][RTW89_MKK][14] = 34, -@@ -34976,70 +36878,106 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][14] = 28, - [0][0][RTW89_CN][14] = 16, - [0][0][RTW89_UK][14] = 28, -+ [0][0][RTW89_MEXICO][14] = 52, -+ [0][0][RTW89_UKRAINE][14] = 22, -+ [0][0][RTW89_CHILE][14] = 52, -+ [0][0][RTW89_QATAR][14] = 28, - [0][0][RTW89_FCC][15] = 52, - [0][0][RTW89_ETSI][15] = 30, - [0][0][RTW89_MKK][15] = 56, - [0][0][RTW89_IC][15] = 52, -- [0][0][RTW89_KCC][15] = 42, -+ [0][0][RTW89_KCC][15] = 40, - [0][0][RTW89_ACMA][15] = 30, - [0][0][RTW89_CN][15] = 127, - [0][0][RTW89_UK][15] = 30, -+ [0][0][RTW89_MEXICO][15] = 52, -+ [0][0][RTW89_UKRAINE][15] = 22, -+ [0][0][RTW89_CHILE][15] = 52, -+ [0][0][RTW89_QATAR][15] = 30, - [0][0][RTW89_FCC][17] = 52, - [0][0][RTW89_ETSI][17] = 30, - [0][0][RTW89_MKK][17] = 58, - [0][0][RTW89_IC][17] = 52, -- [0][0][RTW89_KCC][17] = 42, -+ [0][0][RTW89_KCC][17] = 40, - [0][0][RTW89_ACMA][17] = 30, - [0][0][RTW89_CN][17] = 127, - [0][0][RTW89_UK][17] = 30, -+ [0][0][RTW89_MEXICO][17] = 52, -+ [0][0][RTW89_UKRAINE][17] = 22, -+ [0][0][RTW89_CHILE][17] = 52, -+ [0][0][RTW89_QATAR][17] = 30, - [0][0][RTW89_FCC][19] = 52, - [0][0][RTW89_ETSI][19] = 30, - [0][0][RTW89_MKK][19] = 58, - [0][0][RTW89_IC][19] = 52, -- [0][0][RTW89_KCC][19] = 42, -+ [0][0][RTW89_KCC][19] = 40, - [0][0][RTW89_ACMA][19] = 30, - [0][0][RTW89_CN][19] = 127, - [0][0][RTW89_UK][19] = 30, -+ [0][0][RTW89_MEXICO][19] = 52, -+ [0][0][RTW89_UKRAINE][19] = 22, -+ [0][0][RTW89_CHILE][19] = 52, -+ [0][0][RTW89_QATAR][19] = 30, - [0][0][RTW89_FCC][21] = 52, - [0][0][RTW89_ETSI][21] = 30, - [0][0][RTW89_MKK][21] = 58, - [0][0][RTW89_IC][21] = 52, -- [0][0][RTW89_KCC][21] = 42, -+ [0][0][RTW89_KCC][21] = 40, - [0][0][RTW89_ACMA][21] = 30, - [0][0][RTW89_CN][21] = 127, - [0][0][RTW89_UK][21] = 30, -+ [0][0][RTW89_MEXICO][21] = 52, -+ [0][0][RTW89_UKRAINE][21] = 22, -+ [0][0][RTW89_CHILE][21] = 52, -+ [0][0][RTW89_QATAR][21] = 30, - [0][0][RTW89_FCC][23] = 52, - [0][0][RTW89_ETSI][23] = 30, - [0][0][RTW89_MKK][23] = 58, - [0][0][RTW89_IC][23] = 52, -- [0][0][RTW89_KCC][23] = 42, -+ [0][0][RTW89_KCC][23] = 40, - [0][0][RTW89_ACMA][23] = 30, - [0][0][RTW89_CN][23] = 127, - [0][0][RTW89_UK][23] = 30, -+ [0][0][RTW89_MEXICO][23] = 52, -+ [0][0][RTW89_UKRAINE][23] = 22, -+ [0][0][RTW89_CHILE][23] = 52, -+ [0][0][RTW89_QATAR][23] = 30, - [0][0][RTW89_FCC][25] = 52, - [0][0][RTW89_ETSI][25] = 30, - [0][0][RTW89_MKK][25] = 58, - [0][0][RTW89_IC][25] = 127, -- [0][0][RTW89_KCC][25] = 42, -+ [0][0][RTW89_KCC][25] = 40, - [0][0][RTW89_ACMA][25] = 127, - [0][0][RTW89_CN][25] = 127, - [0][0][RTW89_UK][25] = 30, -+ [0][0][RTW89_MEXICO][25] = 52, -+ [0][0][RTW89_UKRAINE][25] = 22, -+ [0][0][RTW89_CHILE][25] = 52, -+ [0][0][RTW89_QATAR][25] = 30, - [0][0][RTW89_FCC][27] = 52, - [0][0][RTW89_ETSI][27] = 30, - [0][0][RTW89_MKK][27] = 58, - [0][0][RTW89_IC][27] = 127, -- [0][0][RTW89_KCC][27] = 42, -+ [0][0][RTW89_KCC][27] = 40, - [0][0][RTW89_ACMA][27] = 127, - [0][0][RTW89_CN][27] = 127, - [0][0][RTW89_UK][27] = 30, -+ [0][0][RTW89_MEXICO][27] = 52, -+ [0][0][RTW89_UKRAINE][27] = 22, -+ [0][0][RTW89_CHILE][27] = 52, -+ [0][0][RTW89_QATAR][27] = 30, - [0][0][RTW89_FCC][29] = 52, - [0][0][RTW89_ETSI][29] = 30, - [0][0][RTW89_MKK][29] = 58, - [0][0][RTW89_IC][29] = 127, -- [0][0][RTW89_KCC][29] = 42, -+ [0][0][RTW89_KCC][29] = 40, - [0][0][RTW89_ACMA][29] = 127, - [0][0][RTW89_CN][29] = 127, - [0][0][RTW89_UK][29] = 30, -+ [0][0][RTW89_MEXICO][29] = 52, -+ [0][0][RTW89_UKRAINE][29] = 22, -+ [0][0][RTW89_CHILE][29] = 52, -+ [0][0][RTW89_QATAR][29] = 30, - [0][0][RTW89_FCC][31] = 52, - [0][0][RTW89_ETSI][31] = 30, - [0][0][RTW89_MKK][31] = 58, -@@ -35048,6 +36986,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][31] = 30, - [0][0][RTW89_CN][31] = 127, - [0][0][RTW89_UK][31] = 30, -+ [0][0][RTW89_MEXICO][31] = 52, -+ [0][0][RTW89_UKRAINE][31] = 22, -+ [0][0][RTW89_CHILE][31] = 52, -+ [0][0][RTW89_QATAR][31] = 30, - [0][0][RTW89_FCC][33] = 44, - [0][0][RTW89_ETSI][33] = 30, - [0][0][RTW89_MKK][33] = 58, -@@ -35056,6 +36998,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][33] = 30, - [0][0][RTW89_CN][33] = 127, - [0][0][RTW89_UK][33] = 30, -+ [0][0][RTW89_MEXICO][33] = 44, -+ [0][0][RTW89_UKRAINE][33] = 22, -+ [0][0][RTW89_CHILE][33] = 44, -+ [0][0][RTW89_QATAR][33] = 30, - [0][0][RTW89_FCC][35] = 44, - [0][0][RTW89_ETSI][35] = 30, - [0][0][RTW89_MKK][35] = 58, -@@ -35064,6 +37010,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][35] = 30, - [0][0][RTW89_CN][35] = 127, - [0][0][RTW89_UK][35] = 30, -+ [0][0][RTW89_MEXICO][35] = 44, -+ [0][0][RTW89_UKRAINE][35] = 22, -+ [0][0][RTW89_CHILE][35] = 44, -+ [0][0][RTW89_QATAR][35] = 30, - [0][0][RTW89_FCC][37] = 52, - [0][0][RTW89_ETSI][37] = 127, - [0][0][RTW89_MKK][37] = 58, -@@ -35072,6 +37022,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][37] = 52, - [0][0][RTW89_CN][37] = 127, - [0][0][RTW89_UK][37] = 30, -+ [0][0][RTW89_MEXICO][37] = 52, -+ [0][0][RTW89_UKRAINE][37] = 127, -+ [0][0][RTW89_CHILE][37] = 52, -+ [0][0][RTW89_QATAR][37] = 127, - [0][0][RTW89_FCC][38] = 64, - [0][0][RTW89_ETSI][38] = 28, - [0][0][RTW89_MKK][38] = 127, -@@ -35080,6 +37034,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][38] = 64, - [0][0][RTW89_CN][38] = 54, - [0][0][RTW89_UK][38] = 30, -+ [0][0][RTW89_MEXICO][38] = 64, -+ [0][0][RTW89_UKRAINE][38] = 26, -+ [0][0][RTW89_CHILE][38] = 64, -+ [0][0][RTW89_QATAR][38] = 26, - [0][0][RTW89_FCC][40] = 64, - [0][0][RTW89_ETSI][40] = 28, - [0][0][RTW89_MKK][40] = 127, -@@ -35088,6 +37046,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][40] = 64, - [0][0][RTW89_CN][40] = 54, - [0][0][RTW89_UK][40] = 30, -+ [0][0][RTW89_MEXICO][40] = 64, -+ [0][0][RTW89_UKRAINE][40] = 26, -+ [0][0][RTW89_CHILE][40] = 64, -+ [0][0][RTW89_QATAR][40] = 26, - [0][0][RTW89_FCC][42] = 60, - [0][0][RTW89_ETSI][42] = 28, - [0][0][RTW89_MKK][42] = 127, -@@ -35096,6 +37058,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][42] = 60, - [0][0][RTW89_CN][42] = 54, - [0][0][RTW89_UK][42] = 30, -+ [0][0][RTW89_MEXICO][42] = 60, -+ [0][0][RTW89_UKRAINE][42] = 26, -+ [0][0][RTW89_CHILE][42] = 60, -+ [0][0][RTW89_QATAR][42] = 26, - [0][0][RTW89_FCC][44] = 60, - [0][0][RTW89_ETSI][44] = 28, - [0][0][RTW89_MKK][44] = 127, -@@ -35104,6 +37070,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][44] = 60, - [0][0][RTW89_CN][44] = 54, - [0][0][RTW89_UK][44] = 30, -+ [0][0][RTW89_MEXICO][44] = 60, -+ [0][0][RTW89_UKRAINE][44] = 26, -+ [0][0][RTW89_CHILE][44] = 60, -+ [0][0][RTW89_QATAR][44] = 26, - [0][0][RTW89_FCC][46] = 60, - [0][0][RTW89_ETSI][46] = 28, - [0][0][RTW89_MKK][46] = 127, -@@ -35112,6 +37082,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][46] = 60, - [0][0][RTW89_CN][46] = 54, - [0][0][RTW89_UK][46] = 30, -+ [0][0][RTW89_MEXICO][46] = 60, -+ [0][0][RTW89_UKRAINE][46] = 26, -+ [0][0][RTW89_CHILE][46] = 60, -+ [0][0][RTW89_QATAR][46] = 26, - [0][0][RTW89_FCC][48] = 46, - [0][0][RTW89_ETSI][48] = 127, - [0][0][RTW89_MKK][48] = 127, -@@ -35120,6 +37094,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][48] = 127, - [0][0][RTW89_CN][48] = 127, - [0][0][RTW89_UK][48] = 127, -+ [0][0][RTW89_MEXICO][48] = 127, -+ [0][0][RTW89_UKRAINE][48] = 127, -+ [0][0][RTW89_CHILE][48] = 127, -+ [0][0][RTW89_QATAR][48] = 127, - [0][0][RTW89_FCC][50] = 44, - [0][0][RTW89_ETSI][50] = 127, - [0][0][RTW89_MKK][50] = 127, -@@ -35128,6 +37106,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][50] = 127, - [0][0][RTW89_CN][50] = 127, - [0][0][RTW89_UK][50] = 127, -+ [0][0][RTW89_MEXICO][50] = 127, -+ [0][0][RTW89_UKRAINE][50] = 127, -+ [0][0][RTW89_CHILE][50] = 127, -+ [0][0][RTW89_QATAR][50] = 127, - [0][0][RTW89_FCC][52] = 34, - [0][0][RTW89_ETSI][52] = 127, - [0][0][RTW89_MKK][52] = 127, -@@ -35136,38 +37118,58 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][0][RTW89_ACMA][52] = 127, - [0][0][RTW89_CN][52] = 127, - [0][0][RTW89_UK][52] = 127, -+ [0][0][RTW89_MEXICO][52] = 127, -+ [0][0][RTW89_UKRAINE][52] = 127, -+ [0][0][RTW89_CHILE][52] = 127, -+ [0][0][RTW89_QATAR][52] = 127, - [0][1][RTW89_FCC][0] = 30, - [0][1][RTW89_ETSI][0] = 18, - [0][1][RTW89_MKK][0] = 20, - [0][1][RTW89_IC][0] = 8, -- [0][1][RTW89_KCC][0] = 26, -+ [0][1][RTW89_KCC][0] = 32, - [0][1][RTW89_ACMA][0] = 18, - [0][1][RTW89_CN][0] = 4, - [0][1][RTW89_UK][0] = 18, -+ [0][1][RTW89_MEXICO][0] = 30, -+ [0][1][RTW89_UKRAINE][0] = 10, -+ [0][1][RTW89_CHILE][0] = 30, -+ [0][1][RTW89_QATAR][0] = 18, - [0][1][RTW89_FCC][2] = 32, - [0][1][RTW89_ETSI][2] = 18, - [0][1][RTW89_MKK][2] = 20, - [0][1][RTW89_IC][2] = 8, -- [0][1][RTW89_KCC][2] = 26, -+ [0][1][RTW89_KCC][2] = 32, - [0][1][RTW89_ACMA][2] = 18, - [0][1][RTW89_CN][2] = 4, - [0][1][RTW89_UK][2] = 18, -+ [0][1][RTW89_MEXICO][2] = 32, -+ [0][1][RTW89_UKRAINE][2] = 10, -+ [0][1][RTW89_CHILE][2] = 32, -+ [0][1][RTW89_QATAR][2] = 18, - [0][1][RTW89_FCC][4] = 30, - [0][1][RTW89_ETSI][4] = 18, - [0][1][RTW89_MKK][4] = 8, - [0][1][RTW89_IC][4] = 8, -- [0][1][RTW89_KCC][4] = 26, -+ [0][1][RTW89_KCC][4] = 32, - [0][1][RTW89_ACMA][4] = 18, - [0][1][RTW89_CN][4] = 4, - [0][1][RTW89_UK][4] = 18, -+ [0][1][RTW89_MEXICO][4] = 30, -+ [0][1][RTW89_UKRAINE][4] = 10, -+ [0][1][RTW89_CHILE][4] = 30, -+ [0][1][RTW89_QATAR][4] = 18, - [0][1][RTW89_FCC][6] = 30, - [0][1][RTW89_ETSI][6] = 18, - [0][1][RTW89_MKK][6] = 8, - [0][1][RTW89_IC][6] = 8, -- [0][1][RTW89_KCC][6] = 0, -+ [0][1][RTW89_KCC][6] = 6, - [0][1][RTW89_ACMA][6] = 18, - [0][1][RTW89_CN][6] = 4, - [0][1][RTW89_UK][6] = 18, -+ [0][1][RTW89_MEXICO][6] = 30, -+ [0][1][RTW89_UKRAINE][6] = 10, -+ [0][1][RTW89_CHILE][6] = 30, -+ [0][1][RTW89_QATAR][6] = 18, - [0][1][RTW89_FCC][8] = 30, - [0][1][RTW89_ETSI][8] = 16, - [0][1][RTW89_MKK][8] = 20, -@@ -35176,6 +37178,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][8] = 16, - [0][1][RTW89_CN][8] = 4, - [0][1][RTW89_UK][8] = 16, -+ [0][1][RTW89_MEXICO][8] = 30, -+ [0][1][RTW89_UKRAINE][8] = 10, -+ [0][1][RTW89_CHILE][8] = 30, -+ [0][1][RTW89_QATAR][8] = 16, - [0][1][RTW89_FCC][10] = 30, - [0][1][RTW89_ETSI][10] = 16, - [0][1][RTW89_MKK][10] = 20, -@@ -35184,22 +37190,34 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][10] = 16, - [0][1][RTW89_CN][10] = 4, - [0][1][RTW89_UK][10] = 16, -+ [0][1][RTW89_MEXICO][10] = 30, -+ [0][1][RTW89_UKRAINE][10] = 10, -+ [0][1][RTW89_CHILE][10] = 30, -+ [0][1][RTW89_QATAR][10] = 16, - [0][1][RTW89_FCC][12] = 30, - [0][1][RTW89_ETSI][12] = 16, - [0][1][RTW89_MKK][12] = 34, - [0][1][RTW89_IC][12] = 30, -- [0][1][RTW89_KCC][12] = 28, -+ [0][1][RTW89_KCC][12] = 26, - [0][1][RTW89_ACMA][12] = 16, - [0][1][RTW89_CN][12] = 4, - [0][1][RTW89_UK][12] = 16, -+ [0][1][RTW89_MEXICO][12] = 30, -+ [0][1][RTW89_UKRAINE][12] = 10, -+ [0][1][RTW89_CHILE][12] = 30, -+ [0][1][RTW89_QATAR][12] = 16, - [0][1][RTW89_FCC][14] = 30, - [0][1][RTW89_ETSI][14] = 16, - [0][1][RTW89_MKK][14] = 34, - [0][1][RTW89_IC][14] = 30, -- [0][1][RTW89_KCC][14] = 28, -+ [0][1][RTW89_KCC][14] = 26, - [0][1][RTW89_ACMA][14] = 16, - [0][1][RTW89_CN][14] = 4, - [0][1][RTW89_UK][14] = 16, -+ [0][1][RTW89_MEXICO][14] = 30, -+ [0][1][RTW89_UKRAINE][14] = 10, -+ [0][1][RTW89_CHILE][14] = 30, -+ [0][1][RTW89_QATAR][14] = 16, - [0][1][RTW89_FCC][15] = 32, - [0][1][RTW89_ETSI][15] = 18, - [0][1][RTW89_MKK][15] = 44, -@@ -35208,6 +37226,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][15] = 18, - [0][1][RTW89_CN][15] = 127, - [0][1][RTW89_UK][15] = 18, -+ [0][1][RTW89_MEXICO][15] = 32, -+ [0][1][RTW89_UKRAINE][15] = 10, -+ [0][1][RTW89_CHILE][15] = 32, -+ [0][1][RTW89_QATAR][15] = 18, - [0][1][RTW89_FCC][17] = 32, - [0][1][RTW89_ETSI][17] = 18, - [0][1][RTW89_MKK][17] = 44, -@@ -35216,6 +37238,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][17] = 18, - [0][1][RTW89_CN][17] = 127, - [0][1][RTW89_UK][17] = 18, -+ [0][1][RTW89_MEXICO][17] = 32, -+ [0][1][RTW89_UKRAINE][17] = 10, -+ [0][1][RTW89_CHILE][17] = 32, -+ [0][1][RTW89_QATAR][17] = 18, - [0][1][RTW89_FCC][19] = 32, - [0][1][RTW89_ETSI][19] = 18, - [0][1][RTW89_MKK][19] = 44, -@@ -35224,6 +37250,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][19] = 18, - [0][1][RTW89_CN][19] = 127, - [0][1][RTW89_UK][19] = 18, -+ [0][1][RTW89_MEXICO][19] = 32, -+ [0][1][RTW89_UKRAINE][19] = 10, -+ [0][1][RTW89_CHILE][19] = 32, -+ [0][1][RTW89_QATAR][19] = 18, - [0][1][RTW89_FCC][21] = 32, - [0][1][RTW89_ETSI][21] = 18, - [0][1][RTW89_MKK][21] = 44, -@@ -35232,6 +37262,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][21] = 18, - [0][1][RTW89_CN][21] = 127, - [0][1][RTW89_UK][21] = 18, -+ [0][1][RTW89_MEXICO][21] = 32, -+ [0][1][RTW89_UKRAINE][21] = 10, -+ [0][1][RTW89_CHILE][21] = 32, -+ [0][1][RTW89_QATAR][21] = 18, - [0][1][RTW89_FCC][23] = 32, - [0][1][RTW89_ETSI][23] = 18, - [0][1][RTW89_MKK][23] = 44, -@@ -35240,6 +37274,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][23] = 18, - [0][1][RTW89_CN][23] = 127, - [0][1][RTW89_UK][23] = 18, -+ [0][1][RTW89_MEXICO][23] = 32, -+ [0][1][RTW89_UKRAINE][23] = 10, -+ [0][1][RTW89_CHILE][23] = 32, -+ [0][1][RTW89_QATAR][23] = 18, - [0][1][RTW89_FCC][25] = 32, - [0][1][RTW89_ETSI][25] = 18, - [0][1][RTW89_MKK][25] = 44, -@@ -35248,6 +37286,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][25] = 127, - [0][1][RTW89_CN][25] = 127, - [0][1][RTW89_UK][25] = 18, -+ [0][1][RTW89_MEXICO][25] = 32, -+ [0][1][RTW89_UKRAINE][25] = 10, -+ [0][1][RTW89_CHILE][25] = 32, -+ [0][1][RTW89_QATAR][25] = 18, - [0][1][RTW89_FCC][27] = 32, - [0][1][RTW89_ETSI][27] = 16, - [0][1][RTW89_MKK][27] = 44, -@@ -35256,6 +37298,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][27] = 127, - [0][1][RTW89_CN][27] = 127, - [0][1][RTW89_UK][27] = 16, -+ [0][1][RTW89_MEXICO][27] = 32, -+ [0][1][RTW89_UKRAINE][27] = 10, -+ [0][1][RTW89_CHILE][27] = 32, -+ [0][1][RTW89_QATAR][27] = 16, - [0][1][RTW89_FCC][29] = 32, - [0][1][RTW89_ETSI][29] = 16, - [0][1][RTW89_MKK][29] = 44, -@@ -35264,6 +37310,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][29] = 127, - [0][1][RTW89_CN][29] = 127, - [0][1][RTW89_UK][29] = 16, -+ [0][1][RTW89_MEXICO][29] = 32, -+ [0][1][RTW89_UKRAINE][29] = 10, -+ [0][1][RTW89_CHILE][29] = 32, -+ [0][1][RTW89_QATAR][29] = 16, - [0][1][RTW89_FCC][31] = 32, - [0][1][RTW89_ETSI][31] = 16, - [0][1][RTW89_MKK][31] = 44, -@@ -35272,6 +37322,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][31] = 16, - [0][1][RTW89_CN][31] = 127, - [0][1][RTW89_UK][31] = 16, -+ [0][1][RTW89_MEXICO][31] = 32, -+ [0][1][RTW89_UKRAINE][31] = 10, -+ [0][1][RTW89_CHILE][31] = 32, -+ [0][1][RTW89_QATAR][31] = 16, - [0][1][RTW89_FCC][33] = 30, - [0][1][RTW89_ETSI][33] = 16, - [0][1][RTW89_MKK][33] = 44, -@@ -35280,6 +37334,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][33] = 16, - [0][1][RTW89_CN][33] = 127, - [0][1][RTW89_UK][33] = 16, -+ [0][1][RTW89_MEXICO][33] = 30, -+ [0][1][RTW89_UKRAINE][33] = 10, -+ [0][1][RTW89_CHILE][33] = 30, -+ [0][1][RTW89_QATAR][33] = 16, - [0][1][RTW89_FCC][35] = 30, - [0][1][RTW89_ETSI][35] = 16, - [0][1][RTW89_MKK][35] = 44, -@@ -35288,6 +37346,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][35] = 16, - [0][1][RTW89_CN][35] = 127, - [0][1][RTW89_UK][35] = 16, -+ [0][1][RTW89_MEXICO][35] = 30, -+ [0][1][RTW89_UKRAINE][35] = 10, -+ [0][1][RTW89_CHILE][35] = 30, -+ [0][1][RTW89_QATAR][35] = 16, - [0][1][RTW89_FCC][37] = 34, - [0][1][RTW89_ETSI][37] = 127, - [0][1][RTW89_MKK][37] = 44, -@@ -35296,46 +37358,70 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][37] = 34, - [0][1][RTW89_CN][37] = 127, - [0][1][RTW89_UK][37] = 18, -+ [0][1][RTW89_MEXICO][37] = 34, -+ [0][1][RTW89_UKRAINE][37] = 127, -+ [0][1][RTW89_CHILE][37] = 34, -+ [0][1][RTW89_QATAR][37] = 127, - [0][1][RTW89_FCC][38] = 62, - [0][1][RTW89_ETSI][38] = 16, - [0][1][RTW89_MKK][38] = 127, - [0][1][RTW89_IC][38] = 62, -- [0][1][RTW89_KCC][38] = 28, -+ [0][1][RTW89_KCC][38] = 30, - [0][1][RTW89_ACMA][38] = 62, - [0][1][RTW89_CN][38] = 42, - [0][1][RTW89_UK][38] = 18, -+ [0][1][RTW89_MEXICO][38] = 62, -+ [0][1][RTW89_UKRAINE][38] = 14, -+ [0][1][RTW89_CHILE][38] = 62, -+ [0][1][RTW89_QATAR][38] = 14, - [0][1][RTW89_FCC][40] = 62, - [0][1][RTW89_ETSI][40] = 16, - [0][1][RTW89_MKK][40] = 127, - [0][1][RTW89_IC][40] = 62, -- [0][1][RTW89_KCC][40] = 28, -+ [0][1][RTW89_KCC][40] = 30, - [0][1][RTW89_ACMA][40] = 62, - [0][1][RTW89_CN][40] = 42, - [0][1][RTW89_UK][40] = 18, -+ [0][1][RTW89_MEXICO][40] = 62, -+ [0][1][RTW89_UKRAINE][40] = 14, -+ [0][1][RTW89_CHILE][40] = 62, -+ [0][1][RTW89_QATAR][40] = 14, - [0][1][RTW89_FCC][42] = 58, - [0][1][RTW89_ETSI][42] = 16, - [0][1][RTW89_MKK][42] = 127, - [0][1][RTW89_IC][42] = 58, -- [0][1][RTW89_KCC][42] = 28, -+ [0][1][RTW89_KCC][42] = 30, - [0][1][RTW89_ACMA][42] = 58, - [0][1][RTW89_CN][42] = 42, - [0][1][RTW89_UK][42] = 18, -+ [0][1][RTW89_MEXICO][42] = 58, -+ [0][1][RTW89_UKRAINE][42] = 14, -+ [0][1][RTW89_CHILE][42] = 58, -+ [0][1][RTW89_QATAR][42] = 14, - [0][1][RTW89_FCC][44] = 56, - [0][1][RTW89_ETSI][44] = 16, - [0][1][RTW89_MKK][44] = 127, - [0][1][RTW89_IC][44] = 56, -- [0][1][RTW89_KCC][44] = 28, -+ [0][1][RTW89_KCC][44] = 30, - [0][1][RTW89_ACMA][44] = 56, - [0][1][RTW89_CN][44] = 42, - [0][1][RTW89_UK][44] = 18, -+ [0][1][RTW89_MEXICO][44] = 56, -+ [0][1][RTW89_UKRAINE][44] = 14, -+ [0][1][RTW89_CHILE][44] = 56, -+ [0][1][RTW89_QATAR][44] = 14, - [0][1][RTW89_FCC][46] = 56, - [0][1][RTW89_ETSI][46] = 16, - [0][1][RTW89_MKK][46] = 127, - [0][1][RTW89_IC][46] = 56, -- [0][1][RTW89_KCC][46] = 28, -+ [0][1][RTW89_KCC][46] = 30, - [0][1][RTW89_ACMA][46] = 56, - [0][1][RTW89_CN][46] = 42, - [0][1][RTW89_UK][46] = 18, -+ [0][1][RTW89_MEXICO][46] = 56, -+ [0][1][RTW89_UKRAINE][46] = 14, -+ [0][1][RTW89_CHILE][46] = 56, -+ [0][1][RTW89_QATAR][46] = 14, - [0][1][RTW89_FCC][48] = 20, - [0][1][RTW89_ETSI][48] = 127, - [0][1][RTW89_MKK][48] = 127, -@@ -35344,6 +37430,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][48] = 127, - [0][1][RTW89_CN][48] = 127, - [0][1][RTW89_UK][48] = 127, -+ [0][1][RTW89_MEXICO][48] = 127, -+ [0][1][RTW89_UKRAINE][48] = 127, -+ [0][1][RTW89_CHILE][48] = 127, -+ [0][1][RTW89_QATAR][48] = 127, - [0][1][RTW89_FCC][50] = 20, - [0][1][RTW89_ETSI][50] = 127, - [0][1][RTW89_MKK][50] = 127, -@@ -35352,6 +37442,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][50] = 127, - [0][1][RTW89_CN][50] = 127, - [0][1][RTW89_UK][50] = 127, -+ [0][1][RTW89_MEXICO][50] = 127, -+ [0][1][RTW89_UKRAINE][50] = 127, -+ [0][1][RTW89_CHILE][50] = 127, -+ [0][1][RTW89_QATAR][50] = 127, - [0][1][RTW89_FCC][52] = 8, - [0][1][RTW89_ETSI][52] = 127, - [0][1][RTW89_MKK][52] = 127, -@@ -35360,70 +37454,106 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [0][1][RTW89_ACMA][52] = 127, - [0][1][RTW89_CN][52] = 127, - [0][1][RTW89_UK][52] = 127, -+ [0][1][RTW89_MEXICO][52] = 127, -+ [0][1][RTW89_UKRAINE][52] = 127, -+ [0][1][RTW89_CHILE][52] = 127, -+ [0][1][RTW89_QATAR][52] = 127, - [1][0][RTW89_FCC][0] = 62, - [1][0][RTW89_ETSI][0] = 40, - [1][0][RTW89_MKK][0] = 48, - [1][0][RTW89_IC][0] = 42, -- [1][0][RTW89_KCC][0] = 50, -+ [1][0][RTW89_KCC][0] = 54, - [1][0][RTW89_ACMA][0] = 40, - [1][0][RTW89_CN][0] = 26, - [1][0][RTW89_UK][0] = 40, -+ [1][0][RTW89_MEXICO][0] = 62, -+ [1][0][RTW89_UKRAINE][0] = 32, -+ [1][0][RTW89_CHILE][0] = 62, -+ [1][0][RTW89_QATAR][0] = 40, - [1][0][RTW89_FCC][2] = 62, - [1][0][RTW89_ETSI][2] = 40, - [1][0][RTW89_MKK][2] = 48, - [1][0][RTW89_IC][2] = 42, -- [1][0][RTW89_KCC][2] = 50, -+ [1][0][RTW89_KCC][2] = 54, - [1][0][RTW89_ACMA][2] = 40, - [1][0][RTW89_CN][2] = 26, - [1][0][RTW89_UK][2] = 40, -+ [1][0][RTW89_MEXICO][2] = 62, -+ [1][0][RTW89_UKRAINE][2] = 32, -+ [1][0][RTW89_CHILE][2] = 62, -+ [1][0][RTW89_QATAR][2] = 40, - [1][0][RTW89_FCC][4] = 64, - [1][0][RTW89_ETSI][4] = 40, - [1][0][RTW89_MKK][4] = 40, - [1][0][RTW89_IC][4] = 42, -- [1][0][RTW89_KCC][4] = 50, -+ [1][0][RTW89_KCC][4] = 54, - [1][0][RTW89_ACMA][4] = 40, - [1][0][RTW89_CN][4] = 26, - [1][0][RTW89_UK][4] = 40, -+ [1][0][RTW89_MEXICO][4] = 64, -+ [1][0][RTW89_UKRAINE][4] = 32, -+ [1][0][RTW89_CHILE][4] = 64, -+ [1][0][RTW89_QATAR][4] = 40, - [1][0][RTW89_FCC][6] = 64, - [1][0][RTW89_ETSI][6] = 40, - [1][0][RTW89_MKK][6] = 40, - [1][0][RTW89_IC][6] = 42, -- [1][0][RTW89_KCC][6] = 24, -+ [1][0][RTW89_KCC][6] = 32, - [1][0][RTW89_ACMA][6] = 40, - [1][0][RTW89_CN][6] = 26, - [1][0][RTW89_UK][6] = 40, -+ [1][0][RTW89_MEXICO][6] = 64, -+ [1][0][RTW89_UKRAINE][6] = 32, -+ [1][0][RTW89_CHILE][6] = 64, -+ [1][0][RTW89_QATAR][6] = 40, - [1][0][RTW89_FCC][8] = 62, - [1][0][RTW89_ETSI][8] = 40, - [1][0][RTW89_MKK][8] = 34, - [1][0][RTW89_IC][8] = 62, -- [1][0][RTW89_KCC][8] = 52, -+ [1][0][RTW89_KCC][8] = 50, - [1][0][RTW89_ACMA][8] = 40, - [1][0][RTW89_CN][8] = 26, - [1][0][RTW89_UK][8] = 40, -+ [1][0][RTW89_MEXICO][8] = 62, -+ [1][0][RTW89_UKRAINE][8] = 32, -+ [1][0][RTW89_CHILE][8] = 62, -+ [1][0][RTW89_QATAR][8] = 40, - [1][0][RTW89_FCC][10] = 62, - [1][0][RTW89_ETSI][10] = 40, - [1][0][RTW89_MKK][10] = 34, - [1][0][RTW89_IC][10] = 62, -- [1][0][RTW89_KCC][10] = 52, -+ [1][0][RTW89_KCC][10] = 50, - [1][0][RTW89_ACMA][10] = 40, - [1][0][RTW89_CN][10] = 26, - [1][0][RTW89_UK][10] = 40, -+ [1][0][RTW89_MEXICO][10] = 62, -+ [1][0][RTW89_UKRAINE][10] = 32, -+ [1][0][RTW89_CHILE][10] = 62, -+ [1][0][RTW89_QATAR][10] = 40, - [1][0][RTW89_FCC][12] = 62, - [1][0][RTW89_ETSI][12] = 40, - [1][0][RTW89_MKK][12] = 46, - [1][0][RTW89_IC][12] = 62, -- [1][0][RTW89_KCC][12] = 52, -+ [1][0][RTW89_KCC][12] = 50, - [1][0][RTW89_ACMA][12] = 40, - [1][0][RTW89_CN][12] = 26, - [1][0][RTW89_UK][12] = 40, -+ [1][0][RTW89_MEXICO][12] = 62, -+ [1][0][RTW89_UKRAINE][12] = 32, -+ [1][0][RTW89_CHILE][12] = 62, -+ [1][0][RTW89_QATAR][12] = 40, - [1][0][RTW89_FCC][14] = 62, - [1][0][RTW89_ETSI][14] = 40, - [1][0][RTW89_MKK][14] = 46, - [1][0][RTW89_IC][14] = 62, -- [1][0][RTW89_KCC][14] = 52, -+ [1][0][RTW89_KCC][14] = 50, - [1][0][RTW89_ACMA][14] = 40, - [1][0][RTW89_CN][14] = 26, - [1][0][RTW89_UK][14] = 40, -+ [1][0][RTW89_MEXICO][14] = 62, -+ [1][0][RTW89_UKRAINE][14] = 32, -+ [1][0][RTW89_CHILE][14] = 62, -+ [1][0][RTW89_QATAR][14] = 40, - [1][0][RTW89_FCC][15] = 62, - [1][0][RTW89_ETSI][15] = 40, - [1][0][RTW89_MKK][15] = 62, -@@ -35432,6 +37562,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][0][RTW89_ACMA][15] = 40, - [1][0][RTW89_CN][15] = 127, - [1][0][RTW89_UK][15] = 40, -+ [1][0][RTW89_MEXICO][15] = 62, -+ [1][0][RTW89_UKRAINE][15] = 32, -+ [1][0][RTW89_CHILE][15] = 62, -+ [1][0][RTW89_QATAR][15] = 40, - [1][0][RTW89_FCC][17] = 62, - [1][0][RTW89_ETSI][17] = 40, - [1][0][RTW89_MKK][17] = 68, -@@ -35440,6 +37574,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][0][RTW89_ACMA][17] = 40, - [1][0][RTW89_CN][17] = 127, - [1][0][RTW89_UK][17] = 40, -+ [1][0][RTW89_MEXICO][17] = 62, -+ [1][0][RTW89_UKRAINE][17] = 32, -+ [1][0][RTW89_CHILE][17] = 62, -+ [1][0][RTW89_QATAR][17] = 40, - [1][0][RTW89_FCC][19] = 64, - [1][0][RTW89_ETSI][19] = 40, - [1][0][RTW89_MKK][19] = 68, -@@ -35448,6 +37586,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][0][RTW89_ACMA][19] = 40, - [1][0][RTW89_CN][19] = 127, - [1][0][RTW89_UK][19] = 40, -+ [1][0][RTW89_MEXICO][19] = 64, -+ [1][0][RTW89_UKRAINE][19] = 32, -+ [1][0][RTW89_CHILE][19] = 64, -+ [1][0][RTW89_QATAR][19] = 40, - [1][0][RTW89_FCC][21] = 64, - [1][0][RTW89_ETSI][21] = 40, - [1][0][RTW89_MKK][21] = 68, -@@ -35456,6 +37598,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][0][RTW89_ACMA][21] = 40, - [1][0][RTW89_CN][21] = 127, - [1][0][RTW89_UK][21] = 40, -+ [1][0][RTW89_MEXICO][21] = 64, -+ [1][0][RTW89_UKRAINE][21] = 32, -+ [1][0][RTW89_CHILE][21] = 64, -+ [1][0][RTW89_QATAR][21] = 40, - [1][0][RTW89_FCC][23] = 64, - [1][0][RTW89_ETSI][23] = 40, - [1][0][RTW89_MKK][23] = 68, -@@ -35464,6 +37610,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][0][RTW89_ACMA][23] = 40, - [1][0][RTW89_CN][23] = 127, - [1][0][RTW89_UK][23] = 40, -+ [1][0][RTW89_MEXICO][23] = 64, -+ [1][0][RTW89_UKRAINE][23] = 32, -+ [1][0][RTW89_CHILE][23] = 64, -+ [1][0][RTW89_QATAR][23] = 40, - [1][0][RTW89_FCC][25] = 64, - [1][0][RTW89_ETSI][25] = 40, - [1][0][RTW89_MKK][25] = 68, -@@ -35472,6 +37622,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][0][RTW89_ACMA][25] = 127, - [1][0][RTW89_CN][25] = 127, - [1][0][RTW89_UK][25] = 40, -+ [1][0][RTW89_MEXICO][25] = 64, -+ [1][0][RTW89_UKRAINE][25] = 32, -+ [1][0][RTW89_CHILE][25] = 64, -+ [1][0][RTW89_QATAR][25] = 40, - [1][0][RTW89_FCC][27] = 64, - [1][0][RTW89_ETSI][27] = 42, - [1][0][RTW89_MKK][27] = 68, -@@ -35480,6 +37634,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][0][RTW89_ACMA][27] = 127, - [1][0][RTW89_CN][27] = 127, - [1][0][RTW89_UK][27] = 42, -+ [1][0][RTW89_MEXICO][27] = 64, -+ [1][0][RTW89_UKRAINE][27] = 32, -+ [1][0][RTW89_CHILE][27] = 64, -+ [1][0][RTW89_QATAR][27] = 42, - [1][0][RTW89_FCC][29] = 64, - [1][0][RTW89_ETSI][29] = 42, - [1][0][RTW89_MKK][29] = 68, -@@ -35488,38 +37646,58 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][0][RTW89_ACMA][29] = 127, - [1][0][RTW89_CN][29] = 127, - [1][0][RTW89_UK][29] = 42, -+ [1][0][RTW89_MEXICO][29] = 64, -+ [1][0][RTW89_UKRAINE][29] = 32, -+ [1][0][RTW89_CHILE][29] = 64, -+ [1][0][RTW89_QATAR][29] = 42, - [1][0][RTW89_FCC][31] = 64, - [1][0][RTW89_ETSI][31] = 42, - [1][0][RTW89_MKK][31] = 68, - [1][0][RTW89_IC][31] = 56, -- [1][0][RTW89_KCC][31] = 52, -+ [1][0][RTW89_KCC][31] = 50, - [1][0][RTW89_ACMA][31] = 42, - [1][0][RTW89_CN][31] = 127, - [1][0][RTW89_UK][31] = 42, -+ [1][0][RTW89_MEXICO][31] = 64, -+ [1][0][RTW89_UKRAINE][31] = 32, -+ [1][0][RTW89_CHILE][31] = 64, -+ [1][0][RTW89_QATAR][31] = 42, - [1][0][RTW89_FCC][33] = 56, - [1][0][RTW89_ETSI][33] = 42, - [1][0][RTW89_MKK][33] = 68, - [1][0][RTW89_IC][33] = 56, -- [1][0][RTW89_KCC][33] = 52, -+ [1][0][RTW89_KCC][33] = 50, - [1][0][RTW89_ACMA][33] = 42, - [1][0][RTW89_CN][33] = 127, - [1][0][RTW89_UK][33] = 42, -+ [1][0][RTW89_MEXICO][33] = 56, -+ [1][0][RTW89_UKRAINE][33] = 32, -+ [1][0][RTW89_CHILE][33] = 56, -+ [1][0][RTW89_QATAR][33] = 42, - [1][0][RTW89_FCC][35] = 56, - [1][0][RTW89_ETSI][35] = 42, - [1][0][RTW89_MKK][35] = 68, - [1][0][RTW89_IC][35] = 56, -- [1][0][RTW89_KCC][35] = 52, -+ [1][0][RTW89_KCC][35] = 50, - [1][0][RTW89_ACMA][35] = 42, - [1][0][RTW89_CN][35] = 127, - [1][0][RTW89_UK][35] = 42, -+ [1][0][RTW89_MEXICO][35] = 56, -+ [1][0][RTW89_UKRAINE][35] = 32, -+ [1][0][RTW89_CHILE][35] = 56, -+ [1][0][RTW89_QATAR][35] = 42, - [1][0][RTW89_FCC][37] = 66, - [1][0][RTW89_ETSI][37] = 127, - [1][0][RTW89_MKK][37] = 68, - [1][0][RTW89_IC][37] = 66, -- [1][0][RTW89_KCC][37] = 52, -+ [1][0][RTW89_KCC][37] = 50, - [1][0][RTW89_ACMA][37] = 66, - [1][0][RTW89_CN][37] = 127, - [1][0][RTW89_UK][37] = 42, -+ [1][0][RTW89_MEXICO][37] = 66, -+ [1][0][RTW89_UKRAINE][37] = 127, -+ [1][0][RTW89_CHILE][37] = 66, -+ [1][0][RTW89_QATAR][37] = 127, - [1][0][RTW89_FCC][38] = 76, - [1][0][RTW89_ETSI][38] = 28, - [1][0][RTW89_MKK][38] = 127, -@@ -35528,6 +37706,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][0][RTW89_ACMA][38] = 76, - [1][0][RTW89_CN][38] = 66, - [1][0][RTW89_UK][38] = 44, -+ [1][0][RTW89_MEXICO][38] = 76, -+ [1][0][RTW89_UKRAINE][38] = 26, -+ [1][0][RTW89_CHILE][38] = 76, -+ [1][0][RTW89_QATAR][38] = 26, - [1][0][RTW89_FCC][40] = 76, - [1][0][RTW89_ETSI][40] = 28, - [1][0][RTW89_MKK][40] = 127, -@@ -35536,6 +37718,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][0][RTW89_ACMA][40] = 76, - [1][0][RTW89_CN][40] = 66, - [1][0][RTW89_UK][40] = 44, -+ [1][0][RTW89_MEXICO][40] = 76, -+ [1][0][RTW89_UKRAINE][40] = 26, -+ [1][0][RTW89_CHILE][40] = 76, -+ [1][0][RTW89_QATAR][40] = 26, - [1][0][RTW89_FCC][42] = 68, - [1][0][RTW89_ETSI][42] = 28, - [1][0][RTW89_MKK][42] = 127, -@@ -35544,6 +37730,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][0][RTW89_ACMA][42] = 68, - [1][0][RTW89_CN][42] = 66, - [1][0][RTW89_UK][42] = 44, -+ [1][0][RTW89_MEXICO][42] = 68, -+ [1][0][RTW89_UKRAINE][42] = 26, -+ [1][0][RTW89_CHILE][42] = 68, -+ [1][0][RTW89_QATAR][42] = 26, - [1][0][RTW89_FCC][44] = 70, - [1][0][RTW89_ETSI][44] = 28, - [1][0][RTW89_MKK][44] = 127, -@@ -35552,6 +37742,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][0][RTW89_ACMA][44] = 70, - [1][0][RTW89_CN][44] = 66, - [1][0][RTW89_UK][44] = 42, -+ [1][0][RTW89_MEXICO][44] = 70, -+ [1][0][RTW89_UKRAINE][44] = 26, -+ [1][0][RTW89_CHILE][44] = 70, -+ [1][0][RTW89_QATAR][44] = 26, - [1][0][RTW89_FCC][46] = 70, - [1][0][RTW89_ETSI][46] = 28, - [1][0][RTW89_MKK][46] = 127, -@@ -35560,6 +37754,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][0][RTW89_ACMA][46] = 70, - [1][0][RTW89_CN][46] = 66, - [1][0][RTW89_UK][46] = 42, -+ [1][0][RTW89_MEXICO][46] = 70, -+ [1][0][RTW89_UKRAINE][46] = 26, -+ [1][0][RTW89_CHILE][46] = 70, -+ [1][0][RTW89_QATAR][46] = 26, - [1][0][RTW89_FCC][48] = 56, - [1][0][RTW89_ETSI][48] = 127, - [1][0][RTW89_MKK][48] = 127, -@@ -35568,6 +37766,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][0][RTW89_ACMA][48] = 127, - [1][0][RTW89_CN][48] = 127, - [1][0][RTW89_UK][48] = 127, -+ [1][0][RTW89_MEXICO][48] = 127, -+ [1][0][RTW89_UKRAINE][48] = 127, -+ [1][0][RTW89_CHILE][48] = 127, -+ [1][0][RTW89_QATAR][48] = 127, - [1][0][RTW89_FCC][50] = 58, - [1][0][RTW89_ETSI][50] = 127, - [1][0][RTW89_MKK][50] = 127, -@@ -35576,6 +37778,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][0][RTW89_ACMA][50] = 127, - [1][0][RTW89_CN][50] = 127, - [1][0][RTW89_UK][50] = 127, -+ [1][0][RTW89_MEXICO][50] = 127, -+ [1][0][RTW89_UKRAINE][50] = 127, -+ [1][0][RTW89_CHILE][50] = 127, -+ [1][0][RTW89_QATAR][50] = 127, - [1][0][RTW89_FCC][52] = 56, - [1][0][RTW89_ETSI][52] = 127, - [1][0][RTW89_MKK][52] = 127, -@@ -35584,54 +37790,82 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][0][RTW89_ACMA][52] = 127, - [1][0][RTW89_CN][52] = 127, - [1][0][RTW89_UK][52] = 127, -+ [1][0][RTW89_MEXICO][52] = 127, -+ [1][0][RTW89_UKRAINE][52] = 127, -+ [1][0][RTW89_CHILE][52] = 127, -+ [1][0][RTW89_QATAR][52] = 127, - [1][1][RTW89_FCC][0] = 44, - [1][1][RTW89_ETSI][0] = 30, - [1][1][RTW89_MKK][0] = 34, - [1][1][RTW89_IC][0] = 20, -- [1][1][RTW89_KCC][0] = 34, -+ [1][1][RTW89_KCC][0] = 40, - [1][1][RTW89_ACMA][0] = 30, - [1][1][RTW89_CN][0] = 14, - [1][1][RTW89_UK][0] = 30, -+ [1][1][RTW89_MEXICO][0] = 44, -+ [1][1][RTW89_UKRAINE][0] = 20, -+ [1][1][RTW89_CHILE][0] = 44, -+ [1][1][RTW89_QATAR][0] = 30, - [1][1][RTW89_FCC][2] = 44, - [1][1][RTW89_ETSI][2] = 30, - [1][1][RTW89_MKK][2] = 34, - [1][1][RTW89_IC][2] = 18, -- [1][1][RTW89_KCC][2] = 34, -+ [1][1][RTW89_KCC][2] = 40, - [1][1][RTW89_ACMA][2] = 30, - [1][1][RTW89_CN][2] = 14, - [1][1][RTW89_UK][2] = 30, -+ [1][1][RTW89_MEXICO][2] = 44, -+ [1][1][RTW89_UKRAINE][2] = 20, -+ [1][1][RTW89_CHILE][2] = 44, -+ [1][1][RTW89_QATAR][2] = 30, - [1][1][RTW89_FCC][4] = 46, - [1][1][RTW89_ETSI][4] = 30, - [1][1][RTW89_MKK][4] = 26, - [1][1][RTW89_IC][4] = 20, -- [1][1][RTW89_KCC][4] = 34, -+ [1][1][RTW89_KCC][4] = 40, - [1][1][RTW89_ACMA][4] = 30, - [1][1][RTW89_CN][4] = 14, - [1][1][RTW89_UK][4] = 30, -+ [1][1][RTW89_MEXICO][4] = 46, -+ [1][1][RTW89_UKRAINE][4] = 20, -+ [1][1][RTW89_CHILE][4] = 46, -+ [1][1][RTW89_QATAR][4] = 30, - [1][1][RTW89_FCC][6] = 46, - [1][1][RTW89_ETSI][6] = 30, - [1][1][RTW89_MKK][6] = 26, - [1][1][RTW89_IC][6] = 20, -- [1][1][RTW89_KCC][6] = 8, -+ [1][1][RTW89_KCC][6] = 18, - [1][1][RTW89_ACMA][6] = 30, - [1][1][RTW89_CN][6] = 14, - [1][1][RTW89_UK][6] = 30, -+ [1][1][RTW89_MEXICO][6] = 46, -+ [1][1][RTW89_UKRAINE][6] = 20, -+ [1][1][RTW89_CHILE][6] = 46, -+ [1][1][RTW89_QATAR][6] = 30, - [1][1][RTW89_FCC][8] = 44, - [1][1][RTW89_ETSI][8] = 30, - [1][1][RTW89_MKK][8] = 20, - [1][1][RTW89_IC][8] = 44, -- [1][1][RTW89_KCC][8] = 34, -+ [1][1][RTW89_KCC][8] = 38, - [1][1][RTW89_ACMA][8] = 30, - [1][1][RTW89_CN][8] = 14, - [1][1][RTW89_UK][8] = 30, -+ [1][1][RTW89_MEXICO][8] = 44, -+ [1][1][RTW89_UKRAINE][8] = 20, -+ [1][1][RTW89_CHILE][8] = 44, -+ [1][1][RTW89_QATAR][8] = 30, - [1][1][RTW89_FCC][10] = 44, - [1][1][RTW89_ETSI][10] = 30, - [1][1][RTW89_MKK][10] = 20, - [1][1][RTW89_IC][10] = 44, -- [1][1][RTW89_KCC][10] = 34, -+ [1][1][RTW89_KCC][10] = 38, - [1][1][RTW89_ACMA][10] = 30, - [1][1][RTW89_CN][10] = 14, - [1][1][RTW89_UK][10] = 30, -+ [1][1][RTW89_MEXICO][10] = 44, -+ [1][1][RTW89_UKRAINE][10] = 20, -+ [1][1][RTW89_CHILE][10] = 44, -+ [1][1][RTW89_QATAR][10] = 30, - [1][1][RTW89_FCC][12] = 44, - [1][1][RTW89_ETSI][12] = 30, - [1][1][RTW89_MKK][12] = 34, -@@ -35640,6 +37874,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][1][RTW89_ACMA][12] = 30, - [1][1][RTW89_CN][12] = 14, - [1][1][RTW89_UK][12] = 30, -+ [1][1][RTW89_MEXICO][12] = 44, -+ [1][1][RTW89_UKRAINE][12] = 20, -+ [1][1][RTW89_CHILE][12] = 44, -+ [1][1][RTW89_QATAR][12] = 30, - [1][1][RTW89_FCC][14] = 44, - [1][1][RTW89_ETSI][14] = 30, - [1][1][RTW89_MKK][14] = 34, -@@ -35648,142 +37886,214 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][1][RTW89_ACMA][14] = 30, - [1][1][RTW89_CN][14] = 14, - [1][1][RTW89_UK][14] = 30, -+ [1][1][RTW89_MEXICO][14] = 44, -+ [1][1][RTW89_UKRAINE][14] = 20, -+ [1][1][RTW89_CHILE][14] = 44, -+ [1][1][RTW89_QATAR][14] = 30, - [1][1][RTW89_FCC][15] = 44, - [1][1][RTW89_ETSI][15] = 28, - [1][1][RTW89_MKK][15] = 56, - [1][1][RTW89_IC][15] = 44, -- [1][1][RTW89_KCC][15] = 36, -+ [1][1][RTW89_KCC][15] = 38, - [1][1][RTW89_ACMA][15] = 28, - [1][1][RTW89_CN][15] = 127, - [1][1][RTW89_UK][15] = 28, -+ [1][1][RTW89_MEXICO][15] = 44, -+ [1][1][RTW89_UKRAINE][15] = 20, -+ [1][1][RTW89_CHILE][15] = 44, -+ [1][1][RTW89_QATAR][15] = 28, - [1][1][RTW89_FCC][17] = 44, - [1][1][RTW89_ETSI][17] = 28, - [1][1][RTW89_MKK][17] = 58, - [1][1][RTW89_IC][17] = 44, -- [1][1][RTW89_KCC][17] = 36, -+ [1][1][RTW89_KCC][17] = 38, - [1][1][RTW89_ACMA][17] = 28, - [1][1][RTW89_CN][17] = 127, - [1][1][RTW89_UK][17] = 28, -+ [1][1][RTW89_MEXICO][17] = 44, -+ [1][1][RTW89_UKRAINE][17] = 20, -+ [1][1][RTW89_CHILE][17] = 44, -+ [1][1][RTW89_QATAR][17] = 28, - [1][1][RTW89_FCC][19] = 44, - [1][1][RTW89_ETSI][19] = 28, - [1][1][RTW89_MKK][19] = 58, - [1][1][RTW89_IC][19] = 44, -- [1][1][RTW89_KCC][19] = 36, -+ [1][1][RTW89_KCC][19] = 38, - [1][1][RTW89_ACMA][19] = 28, - [1][1][RTW89_CN][19] = 127, - [1][1][RTW89_UK][19] = 28, -+ [1][1][RTW89_MEXICO][19] = 44, -+ [1][1][RTW89_UKRAINE][19] = 20, -+ [1][1][RTW89_CHILE][19] = 44, -+ [1][1][RTW89_QATAR][19] = 28, - [1][1][RTW89_FCC][21] = 44, - [1][1][RTW89_ETSI][21] = 28, - [1][1][RTW89_MKK][21] = 58, - [1][1][RTW89_IC][21] = 44, -- [1][1][RTW89_KCC][21] = 36, -+ [1][1][RTW89_KCC][21] = 38, - [1][1][RTW89_ACMA][21] = 28, - [1][1][RTW89_CN][21] = 127, - [1][1][RTW89_UK][21] = 28, -+ [1][1][RTW89_MEXICO][21] = 44, -+ [1][1][RTW89_UKRAINE][21] = 20, -+ [1][1][RTW89_CHILE][21] = 44, -+ [1][1][RTW89_QATAR][21] = 28, - [1][1][RTW89_FCC][23] = 44, - [1][1][RTW89_ETSI][23] = 28, - [1][1][RTW89_MKK][23] = 58, - [1][1][RTW89_IC][23] = 44, -- [1][1][RTW89_KCC][23] = 36, -+ [1][1][RTW89_KCC][23] = 38, - [1][1][RTW89_ACMA][23] = 28, - [1][1][RTW89_CN][23] = 127, - [1][1][RTW89_UK][23] = 28, -+ [1][1][RTW89_MEXICO][23] = 44, -+ [1][1][RTW89_UKRAINE][23] = 20, -+ [1][1][RTW89_CHILE][23] = 44, -+ [1][1][RTW89_QATAR][23] = 28, - [1][1][RTW89_FCC][25] = 44, - [1][1][RTW89_ETSI][25] = 28, - [1][1][RTW89_MKK][25] = 58, - [1][1][RTW89_IC][25] = 127, -- [1][1][RTW89_KCC][25] = 36, -+ [1][1][RTW89_KCC][25] = 38, - [1][1][RTW89_ACMA][25] = 127, - [1][1][RTW89_CN][25] = 127, - [1][1][RTW89_UK][25] = 28, -+ [1][1][RTW89_MEXICO][25] = 44, -+ [1][1][RTW89_UKRAINE][25] = 20, -+ [1][1][RTW89_CHILE][25] = 44, -+ [1][1][RTW89_QATAR][25] = 28, - [1][1][RTW89_FCC][27] = 44, - [1][1][RTW89_ETSI][27] = 30, - [1][1][RTW89_MKK][27] = 58, - [1][1][RTW89_IC][27] = 127, -- [1][1][RTW89_KCC][27] = 36, -+ [1][1][RTW89_KCC][27] = 38, - [1][1][RTW89_ACMA][27] = 127, - [1][1][RTW89_CN][27] = 127, - [1][1][RTW89_UK][27] = 30, -+ [1][1][RTW89_MEXICO][27] = 44, -+ [1][1][RTW89_UKRAINE][27] = 20, -+ [1][1][RTW89_CHILE][27] = 44, -+ [1][1][RTW89_QATAR][27] = 30, - [1][1][RTW89_FCC][29] = 44, - [1][1][RTW89_ETSI][29] = 30, - [1][1][RTW89_MKK][29] = 58, - [1][1][RTW89_IC][29] = 127, -- [1][1][RTW89_KCC][29] = 36, -+ [1][1][RTW89_KCC][29] = 38, - [1][1][RTW89_ACMA][29] = 127, - [1][1][RTW89_CN][29] = 127, - [1][1][RTW89_UK][29] = 30, -+ [1][1][RTW89_MEXICO][29] = 44, -+ [1][1][RTW89_UKRAINE][29] = 20, -+ [1][1][RTW89_CHILE][29] = 44, -+ [1][1][RTW89_QATAR][29] = 30, - [1][1][RTW89_FCC][31] = 44, - [1][1][RTW89_ETSI][31] = 30, - [1][1][RTW89_MKK][31] = 58, - [1][1][RTW89_IC][31] = 38, -- [1][1][RTW89_KCC][31] = 36, -+ [1][1][RTW89_KCC][31] = 40, - [1][1][RTW89_ACMA][31] = 30, - [1][1][RTW89_CN][31] = 127, - [1][1][RTW89_UK][31] = 30, -+ [1][1][RTW89_MEXICO][31] = 44, -+ [1][1][RTW89_UKRAINE][31] = 20, -+ [1][1][RTW89_CHILE][31] = 44, -+ [1][1][RTW89_QATAR][31] = 30, - [1][1][RTW89_FCC][33] = 38, - [1][1][RTW89_ETSI][33] = 30, - [1][1][RTW89_MKK][33] = 58, - [1][1][RTW89_IC][33] = 38, -- [1][1][RTW89_KCC][33] = 36, -+ [1][1][RTW89_KCC][33] = 40, - [1][1][RTW89_ACMA][33] = 30, - [1][1][RTW89_CN][33] = 127, - [1][1][RTW89_UK][33] = 30, -+ [1][1][RTW89_MEXICO][33] = 38, -+ [1][1][RTW89_UKRAINE][33] = 20, -+ [1][1][RTW89_CHILE][33] = 38, -+ [1][1][RTW89_QATAR][33] = 30, - [1][1][RTW89_FCC][35] = 38, - [1][1][RTW89_ETSI][35] = 30, - [1][1][RTW89_MKK][35] = 58, - [1][1][RTW89_IC][35] = 38, -- [1][1][RTW89_KCC][35] = 36, -+ [1][1][RTW89_KCC][35] = 40, - [1][1][RTW89_ACMA][35] = 30, - [1][1][RTW89_CN][35] = 127, - [1][1][RTW89_UK][35] = 30, -+ [1][1][RTW89_MEXICO][35] = 38, -+ [1][1][RTW89_UKRAINE][35] = 20, -+ [1][1][RTW89_CHILE][35] = 38, -+ [1][1][RTW89_QATAR][35] = 30, - [1][1][RTW89_FCC][37] = 46, - [1][1][RTW89_ETSI][37] = 127, - [1][1][RTW89_MKK][37] = 58, - [1][1][RTW89_IC][37] = 46, -- [1][1][RTW89_KCC][37] = 36, -+ [1][1][RTW89_KCC][37] = 40, - [1][1][RTW89_ACMA][37] = 46, - [1][1][RTW89_CN][37] = 127, - [1][1][RTW89_UK][37] = 32, -+ [1][1][RTW89_MEXICO][37] = 46, -+ [1][1][RTW89_UKRAINE][37] = 127, -+ [1][1][RTW89_CHILE][37] = 46, -+ [1][1][RTW89_QATAR][37] = 127, - [1][1][RTW89_FCC][38] = 74, - [1][1][RTW89_ETSI][38] = 16, - [1][1][RTW89_MKK][38] = 127, - [1][1][RTW89_IC][38] = 74, -- [1][1][RTW89_KCC][38] = 36, -+ [1][1][RTW89_KCC][38] = 38, - [1][1][RTW89_ACMA][38] = 74, - [1][1][RTW89_CN][38] = 54, - [1][1][RTW89_UK][38] = 30, -+ [1][1][RTW89_MEXICO][38] = 74, -+ [1][1][RTW89_UKRAINE][38] = 14, -+ [1][1][RTW89_CHILE][38] = 72, -+ [1][1][RTW89_QATAR][38] = 14, - [1][1][RTW89_FCC][40] = 74, - [1][1][RTW89_ETSI][40] = 16, - [1][1][RTW89_MKK][40] = 127, - [1][1][RTW89_IC][40] = 74, -- [1][1][RTW89_KCC][40] = 36, -+ [1][1][RTW89_KCC][40] = 38, - [1][1][RTW89_ACMA][40] = 74, - [1][1][RTW89_CN][40] = 54, - [1][1][RTW89_UK][40] = 30, -+ [1][1][RTW89_MEXICO][40] = 74, -+ [1][1][RTW89_UKRAINE][40] = 14, -+ [1][1][RTW89_CHILE][40] = 72, -+ [1][1][RTW89_QATAR][40] = 14, - [1][1][RTW89_FCC][42] = 74, - [1][1][RTW89_ETSI][42] = 16, - [1][1][RTW89_MKK][42] = 127, - [1][1][RTW89_IC][42] = 74, -- [1][1][RTW89_KCC][42] = 36, -+ [1][1][RTW89_KCC][42] = 38, - [1][1][RTW89_ACMA][42] = 74, - [1][1][RTW89_CN][42] = 54, - [1][1][RTW89_UK][42] = 30, -+ [1][1][RTW89_MEXICO][42] = 74, -+ [1][1][RTW89_UKRAINE][42] = 14, -+ [1][1][RTW89_CHILE][42] = 72, -+ [1][1][RTW89_QATAR][42] = 14, - [1][1][RTW89_FCC][44] = 74, - [1][1][RTW89_ETSI][44] = 16, - [1][1][RTW89_MKK][44] = 127, - [1][1][RTW89_IC][44] = 74, -- [1][1][RTW89_KCC][44] = 36, -+ [1][1][RTW89_KCC][44] = 38, - [1][1][RTW89_ACMA][44] = 74, - [1][1][RTW89_CN][44] = 54, - [1][1][RTW89_UK][44] = 30, -+ [1][1][RTW89_MEXICO][44] = 74, -+ [1][1][RTW89_UKRAINE][44] = 14, -+ [1][1][RTW89_CHILE][44] = 72, -+ [1][1][RTW89_QATAR][44] = 14, - [1][1][RTW89_FCC][46] = 74, - [1][1][RTW89_ETSI][46] = 16, - [1][1][RTW89_MKK][46] = 127, - [1][1][RTW89_IC][46] = 74, -- [1][1][RTW89_KCC][46] = 36, -+ [1][1][RTW89_KCC][46] = 38, - [1][1][RTW89_ACMA][46] = 74, - [1][1][RTW89_CN][46] = 54, - [1][1][RTW89_UK][46] = 30, -+ [1][1][RTW89_MEXICO][46] = 74, -+ [1][1][RTW89_UKRAINE][46] = 14, -+ [1][1][RTW89_CHILE][46] = 72, -+ [1][1][RTW89_QATAR][46] = 14, - [1][1][RTW89_FCC][48] = 34, - [1][1][RTW89_ETSI][48] = 127, - [1][1][RTW89_MKK][48] = 127, -@@ -35792,6 +38102,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][1][RTW89_ACMA][48] = 127, - [1][1][RTW89_CN][48] = 127, - [1][1][RTW89_UK][48] = 127, -+ [1][1][RTW89_MEXICO][48] = 127, -+ [1][1][RTW89_UKRAINE][48] = 127, -+ [1][1][RTW89_CHILE][48] = 127, -+ [1][1][RTW89_QATAR][48] = 127, - [1][1][RTW89_FCC][50] = 34, - [1][1][RTW89_ETSI][50] = 127, - [1][1][RTW89_MKK][50] = 127, -@@ -35800,6 +38114,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][1][RTW89_ACMA][50] = 127, - [1][1][RTW89_CN][50] = 127, - [1][1][RTW89_UK][50] = 127, -+ [1][1][RTW89_MEXICO][50] = 127, -+ [1][1][RTW89_UKRAINE][50] = 127, -+ [1][1][RTW89_CHILE][50] = 127, -+ [1][1][RTW89_QATAR][50] = 127, - [1][1][RTW89_FCC][52] = 30, - [1][1][RTW89_ETSI][52] = 127, - [1][1][RTW89_MKK][52] = 127, -@@ -35808,206 +38126,310 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [1][1][RTW89_ACMA][52] = 127, - [1][1][RTW89_CN][52] = 127, - [1][1][RTW89_UK][52] = 127, -+ [1][1][RTW89_MEXICO][52] = 127, -+ [1][1][RTW89_UKRAINE][52] = 127, -+ [1][1][RTW89_CHILE][52] = 127, -+ [1][1][RTW89_QATAR][52] = 127, - [2][0][RTW89_FCC][0] = 68, - [2][0][RTW89_ETSI][0] = 52, - [2][0][RTW89_MKK][0] = 60, - [2][0][RTW89_IC][0] = 52, -- [2][0][RTW89_KCC][0] = 64, -+ [2][0][RTW89_KCC][0] = 60, - [2][0][RTW89_ACMA][0] = 52, - [2][0][RTW89_CN][0] = 40, - [2][0][RTW89_UK][0] = 52, -+ [2][0][RTW89_MEXICO][0] = 62, -+ [2][0][RTW89_UKRAINE][0] = 46, -+ [2][0][RTW89_CHILE][0] = 68, -+ [2][0][RTW89_QATAR][0] = 52, - [2][0][RTW89_FCC][2] = 64, - [2][0][RTW89_ETSI][2] = 52, - [2][0][RTW89_MKK][2] = 60, - [2][0][RTW89_IC][2] = 50, -- [2][0][RTW89_KCC][2] = 64, -+ [2][0][RTW89_KCC][2] = 60, - [2][0][RTW89_ACMA][2] = 52, - [2][0][RTW89_CN][2] = 40, - [2][0][RTW89_UK][2] = 52, -+ [2][0][RTW89_MEXICO][2] = 62, -+ [2][0][RTW89_UKRAINE][2] = 46, -+ [2][0][RTW89_CHILE][2] = 64, -+ [2][0][RTW89_QATAR][2] = 52, - [2][0][RTW89_FCC][4] = 68, - [2][0][RTW89_ETSI][4] = 52, - [2][0][RTW89_MKK][4] = 50, - [2][0][RTW89_IC][4] = 50, -- [2][0][RTW89_KCC][4] = 64, -+ [2][0][RTW89_KCC][4] = 60, - [2][0][RTW89_ACMA][4] = 52, - [2][0][RTW89_CN][4] = 40, - [2][0][RTW89_UK][4] = 52, -+ [2][0][RTW89_MEXICO][4] = 62, -+ [2][0][RTW89_UKRAINE][4] = 46, -+ [2][0][RTW89_CHILE][4] = 68, -+ [2][0][RTW89_QATAR][4] = 52, - [2][0][RTW89_FCC][6] = 68, - [2][0][RTW89_ETSI][6] = 52, - [2][0][RTW89_MKK][6] = 50, - [2][0][RTW89_IC][6] = 50, -- [2][0][RTW89_KCC][6] = 36, -+ [2][0][RTW89_KCC][6] = 38, - [2][0][RTW89_ACMA][6] = 52, - [2][0][RTW89_CN][6] = 40, - [2][0][RTW89_UK][6] = 52, -+ [2][0][RTW89_MEXICO][6] = 62, -+ [2][0][RTW89_UKRAINE][6] = 46, -+ [2][0][RTW89_CHILE][6] = 68, -+ [2][0][RTW89_QATAR][6] = 52, - [2][0][RTW89_FCC][8] = 68, - [2][0][RTW89_ETSI][8] = 52, - [2][0][RTW89_MKK][8] = 44, - [2][0][RTW89_IC][8] = 64, -- [2][0][RTW89_KCC][8] = 62, -+ [2][0][RTW89_KCC][8] = 56, - [2][0][RTW89_ACMA][8] = 52, - [2][0][RTW89_CN][8] = 40, - [2][0][RTW89_UK][8] = 52, -+ [2][0][RTW89_MEXICO][8] = 68, -+ [2][0][RTW89_UKRAINE][8] = 46, -+ [2][0][RTW89_CHILE][8] = 68, -+ [2][0][RTW89_QATAR][8] = 52, - [2][0][RTW89_FCC][10] = 68, - [2][0][RTW89_ETSI][10] = 52, - [2][0][RTW89_MKK][10] = 44, - [2][0][RTW89_IC][10] = 64, -- [2][0][RTW89_KCC][10] = 62, -+ [2][0][RTW89_KCC][10] = 56, - [2][0][RTW89_ACMA][10] = 52, - [2][0][RTW89_CN][10] = 40, - [2][0][RTW89_UK][10] = 52, -+ [2][0][RTW89_MEXICO][10] = 68, -+ [2][0][RTW89_UKRAINE][10] = 46, -+ [2][0][RTW89_CHILE][10] = 68, -+ [2][0][RTW89_QATAR][10] = 52, - [2][0][RTW89_FCC][12] = 68, - [2][0][RTW89_ETSI][12] = 52, - [2][0][RTW89_MKK][12] = 58, - [2][0][RTW89_IC][12] = 64, -- [2][0][RTW89_KCC][12] = 62, -+ [2][0][RTW89_KCC][12] = 58, - [2][0][RTW89_ACMA][12] = 52, - [2][0][RTW89_CN][12] = 40, - [2][0][RTW89_UK][12] = 52, -+ [2][0][RTW89_MEXICO][12] = 68, -+ [2][0][RTW89_UKRAINE][12] = 46, -+ [2][0][RTW89_CHILE][12] = 68, -+ [2][0][RTW89_QATAR][12] = 52, - [2][0][RTW89_FCC][14] = 68, - [2][0][RTW89_ETSI][14] = 52, - [2][0][RTW89_MKK][14] = 58, - [2][0][RTW89_IC][14] = 64, -- [2][0][RTW89_KCC][14] = 62, -+ [2][0][RTW89_KCC][14] = 58, - [2][0][RTW89_ACMA][14] = 52, - [2][0][RTW89_CN][14] = 40, - [2][0][RTW89_UK][14] = 52, -+ [2][0][RTW89_MEXICO][14] = 68, -+ [2][0][RTW89_UKRAINE][14] = 46, -+ [2][0][RTW89_CHILE][14] = 68, -+ [2][0][RTW89_QATAR][14] = 52, - [2][0][RTW89_FCC][15] = 68, - [2][0][RTW89_ETSI][15] = 52, - [2][0][RTW89_MKK][15] = 68, - [2][0][RTW89_IC][15] = 68, -- [2][0][RTW89_KCC][15] = 62, -+ [2][0][RTW89_KCC][15] = 58, - [2][0][RTW89_ACMA][15] = 52, - [2][0][RTW89_CN][15] = 127, - [2][0][RTW89_UK][15] = 52, -+ [2][0][RTW89_MEXICO][15] = 68, -+ [2][0][RTW89_UKRAINE][15] = 46, -+ [2][0][RTW89_CHILE][15] = 68, -+ [2][0][RTW89_QATAR][15] = 52, - [2][0][RTW89_FCC][17] = 68, - [2][0][RTW89_ETSI][17] = 52, - [2][0][RTW89_MKK][17] = 74, - [2][0][RTW89_IC][17] = 68, -- [2][0][RTW89_KCC][17] = 62, -+ [2][0][RTW89_KCC][17] = 58, - [2][0][RTW89_ACMA][17] = 52, - [2][0][RTW89_CN][17] = 127, - [2][0][RTW89_UK][17] = 52, -+ [2][0][RTW89_MEXICO][17] = 68, -+ [2][0][RTW89_UKRAINE][17] = 46, -+ [2][0][RTW89_CHILE][17] = 68, -+ [2][0][RTW89_QATAR][17] = 52, - [2][0][RTW89_FCC][19] = 70, - [2][0][RTW89_ETSI][19] = 52, - [2][0][RTW89_MKK][19] = 74, - [2][0][RTW89_IC][19] = 70, -- [2][0][RTW89_KCC][19] = 62, -+ [2][0][RTW89_KCC][19] = 58, - [2][0][RTW89_ACMA][19] = 52, - [2][0][RTW89_CN][19] = 127, - [2][0][RTW89_UK][19] = 52, -+ [2][0][RTW89_MEXICO][19] = 70, -+ [2][0][RTW89_UKRAINE][19] = 46, -+ [2][0][RTW89_CHILE][19] = 70, -+ [2][0][RTW89_QATAR][19] = 52, - [2][0][RTW89_FCC][21] = 70, - [2][0][RTW89_ETSI][21] = 52, - [2][0][RTW89_MKK][21] = 74, - [2][0][RTW89_IC][21] = 70, -- [2][0][RTW89_KCC][21] = 62, -+ [2][0][RTW89_KCC][21] = 58, - [2][0][RTW89_ACMA][21] = 52, - [2][0][RTW89_CN][21] = 127, - [2][0][RTW89_UK][21] = 52, -+ [2][0][RTW89_MEXICO][21] = 70, -+ [2][0][RTW89_UKRAINE][21] = 46, -+ [2][0][RTW89_CHILE][21] = 70, -+ [2][0][RTW89_QATAR][21] = 52, - [2][0][RTW89_FCC][23] = 70, - [2][0][RTW89_ETSI][23] = 52, - [2][0][RTW89_MKK][23] = 74, - [2][0][RTW89_IC][23] = 70, -- [2][0][RTW89_KCC][23] = 62, -+ [2][0][RTW89_KCC][23] = 58, - [2][0][RTW89_ACMA][23] = 52, - [2][0][RTW89_CN][23] = 127, - [2][0][RTW89_UK][23] = 52, -+ [2][0][RTW89_MEXICO][23] = 70, -+ [2][0][RTW89_UKRAINE][23] = 46, -+ [2][0][RTW89_CHILE][23] = 70, -+ [2][0][RTW89_QATAR][23] = 52, - [2][0][RTW89_FCC][25] = 70, - [2][0][RTW89_ETSI][25] = 52, - [2][0][RTW89_MKK][25] = 74, - [2][0][RTW89_IC][25] = 127, -- [2][0][RTW89_KCC][25] = 62, -+ [2][0][RTW89_KCC][25] = 58, - [2][0][RTW89_ACMA][25] = 127, - [2][0][RTW89_CN][25] = 127, - [2][0][RTW89_UK][25] = 52, -+ [2][0][RTW89_MEXICO][25] = 70, -+ [2][0][RTW89_UKRAINE][25] = 46, -+ [2][0][RTW89_CHILE][25] = 70, -+ [2][0][RTW89_QATAR][25] = 52, - [2][0][RTW89_FCC][27] = 70, - [2][0][RTW89_ETSI][27] = 52, - [2][0][RTW89_MKK][27] = 74, - [2][0][RTW89_IC][27] = 127, -- [2][0][RTW89_KCC][27] = 62, -+ [2][0][RTW89_KCC][27] = 58, - [2][0][RTW89_ACMA][27] = 127, - [2][0][RTW89_CN][27] = 127, - [2][0][RTW89_UK][27] = 52, -+ [2][0][RTW89_MEXICO][27] = 70, -+ [2][0][RTW89_UKRAINE][27] = 46, -+ [2][0][RTW89_CHILE][27] = 70, -+ [2][0][RTW89_QATAR][27] = 52, - [2][0][RTW89_FCC][29] = 70, - [2][0][RTW89_ETSI][29] = 52, - [2][0][RTW89_MKK][29] = 74, - [2][0][RTW89_IC][29] = 127, -- [2][0][RTW89_KCC][29] = 62, -+ [2][0][RTW89_KCC][29] = 58, - [2][0][RTW89_ACMA][29] = 127, - [2][0][RTW89_CN][29] = 127, - [2][0][RTW89_UK][29] = 52, -+ [2][0][RTW89_MEXICO][29] = 70, -+ [2][0][RTW89_UKRAINE][29] = 46, -+ [2][0][RTW89_CHILE][29] = 70, -+ [2][0][RTW89_QATAR][29] = 52, - [2][0][RTW89_FCC][31] = 70, - [2][0][RTW89_ETSI][31] = 52, - [2][0][RTW89_MKK][31] = 74, - [2][0][RTW89_IC][31] = 62, -- [2][0][RTW89_KCC][31] = 62, -+ [2][0][RTW89_KCC][31] = 56, - [2][0][RTW89_ACMA][31] = 52, - [2][0][RTW89_CN][31] = 127, - [2][0][RTW89_UK][31] = 52, -+ [2][0][RTW89_MEXICO][31] = 70, -+ [2][0][RTW89_UKRAINE][31] = 46, -+ [2][0][RTW89_CHILE][31] = 70, -+ [2][0][RTW89_QATAR][31] = 52, - [2][0][RTW89_FCC][33] = 62, - [2][0][RTW89_ETSI][33] = 52, - [2][0][RTW89_MKK][33] = 74, - [2][0][RTW89_IC][33] = 62, -- [2][0][RTW89_KCC][33] = 62, -+ [2][0][RTW89_KCC][33] = 56, - [2][0][RTW89_ACMA][33] = 52, - [2][0][RTW89_CN][33] = 127, - [2][0][RTW89_UK][33] = 52, -+ [2][0][RTW89_MEXICO][33] = 62, -+ [2][0][RTW89_UKRAINE][33] = 46, -+ [2][0][RTW89_CHILE][33] = 62, -+ [2][0][RTW89_QATAR][33] = 52, - [2][0][RTW89_FCC][35] = 62, - [2][0][RTW89_ETSI][35] = 52, - [2][0][RTW89_MKK][35] = 74, - [2][0][RTW89_IC][35] = 62, -- [2][0][RTW89_KCC][35] = 62, -+ [2][0][RTW89_KCC][35] = 56, - [2][0][RTW89_ACMA][35] = 52, - [2][0][RTW89_CN][35] = 127, - [2][0][RTW89_UK][35] = 52, -+ [2][0][RTW89_MEXICO][35] = 62, -+ [2][0][RTW89_UKRAINE][35] = 46, -+ [2][0][RTW89_CHILE][35] = 62, -+ [2][0][RTW89_QATAR][35] = 52, - [2][0][RTW89_FCC][37] = 70, - [2][0][RTW89_ETSI][37] = 127, - [2][0][RTW89_MKK][37] = 74, - [2][0][RTW89_IC][37] = 70, -- [2][0][RTW89_KCC][37] = 62, -+ [2][0][RTW89_KCC][37] = 56, - [2][0][RTW89_ACMA][37] = 70, - [2][0][RTW89_CN][37] = 127, - [2][0][RTW89_UK][37] = 52, -+ [2][0][RTW89_MEXICO][37] = 70, -+ [2][0][RTW89_UKRAINE][37] = 127, -+ [2][0][RTW89_CHILE][37] = 70, -+ [2][0][RTW89_QATAR][37] = 127, - [2][0][RTW89_FCC][38] = 82, - [2][0][RTW89_ETSI][38] = 28, - [2][0][RTW89_MKK][38] = 127, - [2][0][RTW89_IC][38] = 82, -- [2][0][RTW89_KCC][38] = 64, -+ [2][0][RTW89_KCC][38] = 60, - [2][0][RTW89_ACMA][38] = 82, - [2][0][RTW89_CN][38] = 68, - [2][0][RTW89_UK][38] = 54, -+ [2][0][RTW89_MEXICO][38] = 82, -+ [2][0][RTW89_UKRAINE][38] = 26, -+ [2][0][RTW89_CHILE][38] = 82, -+ [2][0][RTW89_QATAR][38] = 26, - [2][0][RTW89_FCC][40] = 82, - [2][0][RTW89_ETSI][40] = 28, - [2][0][RTW89_MKK][40] = 127, - [2][0][RTW89_IC][40] = 82, -- [2][0][RTW89_KCC][40] = 64, -+ [2][0][RTW89_KCC][40] = 60, - [2][0][RTW89_ACMA][40] = 82, - [2][0][RTW89_CN][40] = 68, - [2][0][RTW89_UK][40] = 54, -+ [2][0][RTW89_MEXICO][40] = 82, -+ [2][0][RTW89_UKRAINE][40] = 26, -+ [2][0][RTW89_CHILE][40] = 82, -+ [2][0][RTW89_QATAR][40] = 26, - [2][0][RTW89_FCC][42] = 76, - [2][0][RTW89_ETSI][42] = 28, - [2][0][RTW89_MKK][42] = 127, - [2][0][RTW89_IC][42] = 76, -- [2][0][RTW89_KCC][42] = 64, -+ [2][0][RTW89_KCC][42] = 60, - [2][0][RTW89_ACMA][42] = 76, - [2][0][RTW89_CN][42] = 68, - [2][0][RTW89_UK][42] = 54, -+ [2][0][RTW89_MEXICO][42] = 76, -+ [2][0][RTW89_UKRAINE][42] = 26, -+ [2][0][RTW89_CHILE][42] = 76, -+ [2][0][RTW89_QATAR][42] = 26, - [2][0][RTW89_FCC][44] = 80, - [2][0][RTW89_ETSI][44] = 28, - [2][0][RTW89_MKK][44] = 127, - [2][0][RTW89_IC][44] = 80, -- [2][0][RTW89_KCC][44] = 64, -+ [2][0][RTW89_KCC][44] = 60, - [2][0][RTW89_ACMA][44] = 80, - [2][0][RTW89_CN][44] = 68, - [2][0][RTW89_UK][44] = 54, -+ [2][0][RTW89_MEXICO][44] = 80, -+ [2][0][RTW89_UKRAINE][44] = 26, -+ [2][0][RTW89_CHILE][44] = 80, -+ [2][0][RTW89_QATAR][44] = 26, - [2][0][RTW89_FCC][46] = 80, - [2][0][RTW89_ETSI][46] = 28, - [2][0][RTW89_MKK][46] = 127, - [2][0][RTW89_IC][46] = 80, -- [2][0][RTW89_KCC][46] = 64, -+ [2][0][RTW89_KCC][46] = 60, - [2][0][RTW89_ACMA][46] = 80, - [2][0][RTW89_CN][46] = 68, - [2][0][RTW89_UK][46] = 54, -+ [2][0][RTW89_MEXICO][46] = 80, -+ [2][0][RTW89_UKRAINE][46] = 26, -+ [2][0][RTW89_CHILE][46] = 80, -+ [2][0][RTW89_QATAR][46] = 26, - [2][0][RTW89_FCC][48] = 64, - [2][0][RTW89_ETSI][48] = 127, - [2][0][RTW89_MKK][48] = 127, -@@ -36016,6 +38438,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [2][0][RTW89_ACMA][48] = 127, - [2][0][RTW89_CN][48] = 127, - [2][0][RTW89_UK][48] = 127, -+ [2][0][RTW89_MEXICO][48] = 127, -+ [2][0][RTW89_UKRAINE][48] = 127, -+ [2][0][RTW89_CHILE][48] = 127, -+ [2][0][RTW89_QATAR][48] = 127, - [2][0][RTW89_FCC][50] = 64, - [2][0][RTW89_ETSI][50] = 127, - [2][0][RTW89_MKK][50] = 127, -@@ -36024,6 +38450,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [2][0][RTW89_ACMA][50] = 127, - [2][0][RTW89_CN][50] = 127, - [2][0][RTW89_UK][50] = 127, -+ [2][0][RTW89_MEXICO][50] = 127, -+ [2][0][RTW89_UKRAINE][50] = 127, -+ [2][0][RTW89_CHILE][50] = 127, -+ [2][0][RTW89_QATAR][50] = 127, - [2][0][RTW89_FCC][52] = 64, - [2][0][RTW89_ETSI][52] = 127, - [2][0][RTW89_MKK][52] = 127, -@@ -36032,206 +38462,310 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [2][0][RTW89_ACMA][52] = 127, - [2][0][RTW89_CN][52] = 127, - [2][0][RTW89_UK][52] = 127, -+ [2][0][RTW89_MEXICO][52] = 127, -+ [2][0][RTW89_UKRAINE][52] = 127, -+ [2][0][RTW89_CHILE][52] = 127, -+ [2][0][RTW89_QATAR][52] = 127, - [2][1][RTW89_FCC][0] = 50, - [2][1][RTW89_ETSI][0] = 40, - [2][1][RTW89_MKK][0] = 44, - [2][1][RTW89_IC][0] = 26, -- [2][1][RTW89_KCC][0] = 44, -+ [2][1][RTW89_KCC][0] = 52, - [2][1][RTW89_ACMA][0] = 40, - [2][1][RTW89_CN][0] = 28, - [2][1][RTW89_UK][0] = 40, -+ [2][1][RTW89_MEXICO][0] = 50, -+ [2][1][RTW89_UKRAINE][0] = 34, -+ [2][1][RTW89_CHILE][0] = 50, -+ [2][1][RTW89_QATAR][0] = 40, - [2][1][RTW89_FCC][2] = 50, - [2][1][RTW89_ETSI][2] = 40, - [2][1][RTW89_MKK][2] = 44, - [2][1][RTW89_IC][2] = 26, -- [2][1][RTW89_KCC][2] = 44, -+ [2][1][RTW89_KCC][2] = 52, - [2][1][RTW89_ACMA][2] = 40, - [2][1][RTW89_CN][2] = 28, - [2][1][RTW89_UK][2] = 40, -+ [2][1][RTW89_MEXICO][2] = 50, -+ [2][1][RTW89_UKRAINE][2] = 34, -+ [2][1][RTW89_CHILE][2] = 50, -+ [2][1][RTW89_QATAR][2] = 40, - [2][1][RTW89_FCC][4] = 50, - [2][1][RTW89_ETSI][4] = 40, - [2][1][RTW89_MKK][4] = 36, - [2][1][RTW89_IC][4] = 26, -- [2][1][RTW89_KCC][4] = 44, -+ [2][1][RTW89_KCC][4] = 52, - [2][1][RTW89_ACMA][4] = 40, - [2][1][RTW89_CN][4] = 28, - [2][1][RTW89_UK][4] = 40, -+ [2][1][RTW89_MEXICO][4] = 50, -+ [2][1][RTW89_UKRAINE][4] = 34, -+ [2][1][RTW89_CHILE][4] = 50, -+ [2][1][RTW89_QATAR][4] = 40, - [2][1][RTW89_FCC][6] = 50, - [2][1][RTW89_ETSI][6] = 40, - [2][1][RTW89_MKK][6] = 36, - [2][1][RTW89_IC][6] = 26, -- [2][1][RTW89_KCC][6] = 20, -+ [2][1][RTW89_KCC][6] = 30, - [2][1][RTW89_ACMA][6] = 40, - [2][1][RTW89_CN][6] = 28, - [2][1][RTW89_UK][6] = 40, -+ [2][1][RTW89_MEXICO][6] = 50, -+ [2][1][RTW89_UKRAINE][6] = 34, -+ [2][1][RTW89_CHILE][6] = 50, -+ [2][1][RTW89_QATAR][6] = 40, - [2][1][RTW89_FCC][8] = 50, - [2][1][RTW89_ETSI][8] = 40, - [2][1][RTW89_MKK][8] = 32, - [2][1][RTW89_IC][8] = 50, -- [2][1][RTW89_KCC][8] = 46, -+ [2][1][RTW89_KCC][8] = 50, - [2][1][RTW89_ACMA][8] = 40, - [2][1][RTW89_CN][8] = 28, - [2][1][RTW89_UK][8] = 40, -+ [2][1][RTW89_MEXICO][8] = 50, -+ [2][1][RTW89_UKRAINE][8] = 34, -+ [2][1][RTW89_CHILE][8] = 50, -+ [2][1][RTW89_QATAR][8] = 40, - [2][1][RTW89_FCC][10] = 50, - [2][1][RTW89_ETSI][10] = 40, - [2][1][RTW89_MKK][10] = 32, - [2][1][RTW89_IC][10] = 50, -- [2][1][RTW89_KCC][10] = 46, -+ [2][1][RTW89_KCC][10] = 50, - [2][1][RTW89_ACMA][10] = 40, - [2][1][RTW89_CN][10] = 28, - [2][1][RTW89_UK][10] = 40, -+ [2][1][RTW89_MEXICO][10] = 50, -+ [2][1][RTW89_UKRAINE][10] = 34, -+ [2][1][RTW89_CHILE][10] = 50, -+ [2][1][RTW89_QATAR][10] = 40, - [2][1][RTW89_FCC][12] = 48, - [2][1][RTW89_ETSI][12] = 40, - [2][1][RTW89_MKK][12] = 44, - [2][1][RTW89_IC][12] = 48, -- [2][1][RTW89_KCC][12] = 46, -+ [2][1][RTW89_KCC][12] = 48, - [2][1][RTW89_ACMA][12] = 40, - [2][1][RTW89_CN][12] = 28, - [2][1][RTW89_UK][12] = 40, -+ [2][1][RTW89_MEXICO][12] = 48, -+ [2][1][RTW89_UKRAINE][12] = 34, -+ [2][1][RTW89_CHILE][12] = 48, -+ [2][1][RTW89_QATAR][12] = 40, - [2][1][RTW89_FCC][14] = 48, - [2][1][RTW89_ETSI][14] = 40, - [2][1][RTW89_MKK][14] = 44, - [2][1][RTW89_IC][14] = 48, -- [2][1][RTW89_KCC][14] = 46, -+ [2][1][RTW89_KCC][14] = 48, - [2][1][RTW89_ACMA][14] = 40, - [2][1][RTW89_CN][14] = 28, - [2][1][RTW89_UK][14] = 40, -+ [2][1][RTW89_MEXICO][14] = 48, -+ [2][1][RTW89_UKRAINE][14] = 34, -+ [2][1][RTW89_CHILE][14] = 48, -+ [2][1][RTW89_QATAR][14] = 40, - [2][1][RTW89_FCC][15] = 50, - [2][1][RTW89_ETSI][15] = 40, - [2][1][RTW89_MKK][15] = 66, - [2][1][RTW89_IC][15] = 50, -- [2][1][RTW89_KCC][15] = 46, -+ [2][1][RTW89_KCC][15] = 48, - [2][1][RTW89_ACMA][15] = 40, - [2][1][RTW89_CN][15] = 127, - [2][1][RTW89_UK][15] = 40, -+ [2][1][RTW89_MEXICO][15] = 50, -+ [2][1][RTW89_UKRAINE][15] = 34, -+ [2][1][RTW89_CHILE][15] = 50, -+ [2][1][RTW89_QATAR][15] = 40, - [2][1][RTW89_FCC][17] = 50, - [2][1][RTW89_ETSI][17] = 40, - [2][1][RTW89_MKK][17] = 66, - [2][1][RTW89_IC][17] = 50, -- [2][1][RTW89_KCC][17] = 46, -+ [2][1][RTW89_KCC][17] = 48, - [2][1][RTW89_ACMA][17] = 40, - [2][1][RTW89_CN][17] = 127, - [2][1][RTW89_UK][17] = 40, -+ [2][1][RTW89_MEXICO][17] = 50, -+ [2][1][RTW89_UKRAINE][17] = 34, -+ [2][1][RTW89_CHILE][17] = 50, -+ [2][1][RTW89_QATAR][17] = 40, - [2][1][RTW89_FCC][19] = 50, - [2][1][RTW89_ETSI][19] = 40, - [2][1][RTW89_MKK][19] = 66, - [2][1][RTW89_IC][19] = 50, -- [2][1][RTW89_KCC][19] = 46, -+ [2][1][RTW89_KCC][19] = 48, - [2][1][RTW89_ACMA][19] = 40, - [2][1][RTW89_CN][19] = 127, - [2][1][RTW89_UK][19] = 40, -+ [2][1][RTW89_MEXICO][19] = 50, -+ [2][1][RTW89_UKRAINE][19] = 34, -+ [2][1][RTW89_CHILE][19] = 50, -+ [2][1][RTW89_QATAR][19] = 40, - [2][1][RTW89_FCC][21] = 50, - [2][1][RTW89_ETSI][21] = 40, - [2][1][RTW89_MKK][21] = 66, - [2][1][RTW89_IC][21] = 50, -- [2][1][RTW89_KCC][21] = 46, -+ [2][1][RTW89_KCC][21] = 48, - [2][1][RTW89_ACMA][21] = 40, - [2][1][RTW89_CN][21] = 127, - [2][1][RTW89_UK][21] = 40, -+ [2][1][RTW89_MEXICO][21] = 50, -+ [2][1][RTW89_UKRAINE][21] = 34, -+ [2][1][RTW89_CHILE][21] = 50, -+ [2][1][RTW89_QATAR][21] = 40, - [2][1][RTW89_FCC][23] = 50, - [2][1][RTW89_ETSI][23] = 40, - [2][1][RTW89_MKK][23] = 66, - [2][1][RTW89_IC][23] = 50, -- [2][1][RTW89_KCC][23] = 46, -+ [2][1][RTW89_KCC][23] = 48, - [2][1][RTW89_ACMA][23] = 40, - [2][1][RTW89_CN][23] = 127, - [2][1][RTW89_UK][23] = 40, -+ [2][1][RTW89_MEXICO][23] = 50, -+ [2][1][RTW89_UKRAINE][23] = 34, -+ [2][1][RTW89_CHILE][23] = 50, -+ [2][1][RTW89_QATAR][23] = 40, - [2][1][RTW89_FCC][25] = 50, - [2][1][RTW89_ETSI][25] = 40, - [2][1][RTW89_MKK][25] = 66, - [2][1][RTW89_IC][25] = 127, -- [2][1][RTW89_KCC][25] = 46, -+ [2][1][RTW89_KCC][25] = 48, - [2][1][RTW89_ACMA][25] = 127, - [2][1][RTW89_CN][25] = 127, - [2][1][RTW89_UK][25] = 40, -+ [2][1][RTW89_MEXICO][25] = 50, -+ [2][1][RTW89_UKRAINE][25] = 34, -+ [2][1][RTW89_CHILE][25] = 50, -+ [2][1][RTW89_QATAR][25] = 40, - [2][1][RTW89_FCC][27] = 50, - [2][1][RTW89_ETSI][27] = 40, - [2][1][RTW89_MKK][27] = 66, - [2][1][RTW89_IC][27] = 127, -- [2][1][RTW89_KCC][27] = 46, -+ [2][1][RTW89_KCC][27] = 48, - [2][1][RTW89_ACMA][27] = 127, - [2][1][RTW89_CN][27] = 127, - [2][1][RTW89_UK][27] = 40, -+ [2][1][RTW89_MEXICO][27] = 50, -+ [2][1][RTW89_UKRAINE][27] = 34, -+ [2][1][RTW89_CHILE][27] = 50, -+ [2][1][RTW89_QATAR][27] = 40, - [2][1][RTW89_FCC][29] = 50, - [2][1][RTW89_ETSI][29] = 40, - [2][1][RTW89_MKK][29] = 66, - [2][1][RTW89_IC][29] = 127, -- [2][1][RTW89_KCC][29] = 46, -+ [2][1][RTW89_KCC][29] = 48, - [2][1][RTW89_ACMA][29] = 127, - [2][1][RTW89_CN][29] = 127, - [2][1][RTW89_UK][29] = 40, -+ [2][1][RTW89_MEXICO][29] = 50, -+ [2][1][RTW89_UKRAINE][29] = 34, -+ [2][1][RTW89_CHILE][29] = 50, -+ [2][1][RTW89_QATAR][29] = 40, - [2][1][RTW89_FCC][31] = 50, - [2][1][RTW89_ETSI][31] = 40, - [2][1][RTW89_MKK][31] = 66, - [2][1][RTW89_IC][31] = 48, -- [2][1][RTW89_KCC][31] = 46, -+ [2][1][RTW89_KCC][31] = 48, - [2][1][RTW89_ACMA][31] = 40, - [2][1][RTW89_CN][31] = 127, - [2][1][RTW89_UK][31] = 40, -+ [2][1][RTW89_MEXICO][31] = 50, -+ [2][1][RTW89_UKRAINE][31] = 34, -+ [2][1][RTW89_CHILE][31] = 50, -+ [2][1][RTW89_QATAR][31] = 40, - [2][1][RTW89_FCC][33] = 48, - [2][1][RTW89_ETSI][33] = 40, - [2][1][RTW89_MKK][33] = 66, - [2][1][RTW89_IC][33] = 48, -- [2][1][RTW89_KCC][33] = 46, -+ [2][1][RTW89_KCC][33] = 48, - [2][1][RTW89_ACMA][33] = 40, - [2][1][RTW89_CN][33] = 127, - [2][1][RTW89_UK][33] = 40, -+ [2][1][RTW89_MEXICO][33] = 48, -+ [2][1][RTW89_UKRAINE][33] = 34, -+ [2][1][RTW89_CHILE][33] = 48, -+ [2][1][RTW89_QATAR][33] = 40, - [2][1][RTW89_FCC][35] = 48, - [2][1][RTW89_ETSI][35] = 40, - [2][1][RTW89_MKK][35] = 66, - [2][1][RTW89_IC][35] = 48, -- [2][1][RTW89_KCC][35] = 46, -+ [2][1][RTW89_KCC][35] = 48, - [2][1][RTW89_ACMA][35] = 40, - [2][1][RTW89_CN][35] = 127, - [2][1][RTW89_UK][35] = 40, -+ [2][1][RTW89_MEXICO][35] = 48, -+ [2][1][RTW89_UKRAINE][35] = 34, -+ [2][1][RTW89_CHILE][35] = 48, -+ [2][1][RTW89_QATAR][35] = 40, - [2][1][RTW89_FCC][37] = 52, - [2][1][RTW89_ETSI][37] = 127, - [2][1][RTW89_MKK][37] = 66, - [2][1][RTW89_IC][37] = 52, -- [2][1][RTW89_KCC][37] = 46, -+ [2][1][RTW89_KCC][37] = 48, - [2][1][RTW89_ACMA][37] = 52, - [2][1][RTW89_CN][37] = 127, - [2][1][RTW89_UK][37] = 42, -+ [2][1][RTW89_MEXICO][37] = 52, -+ [2][1][RTW89_UKRAINE][37] = 127, -+ [2][1][RTW89_CHILE][37] = 52, -+ [2][1][RTW89_QATAR][37] = 127, - [2][1][RTW89_FCC][38] = 78, - [2][1][RTW89_ETSI][38] = 16, - [2][1][RTW89_MKK][38] = 127, - [2][1][RTW89_IC][38] = 78, -- [2][1][RTW89_KCC][38] = 46, -+ [2][1][RTW89_KCC][38] = 50, - [2][1][RTW89_ACMA][38] = 78, - [2][1][RTW89_CN][38] = 56, - [2][1][RTW89_UK][38] = 42, -+ [2][1][RTW89_MEXICO][38] = 78, -+ [2][1][RTW89_UKRAINE][38] = 14, -+ [2][1][RTW89_CHILE][38] = 72, -+ [2][1][RTW89_QATAR][38] = 14, - [2][1][RTW89_FCC][40] = 78, - [2][1][RTW89_ETSI][40] = 16, - [2][1][RTW89_MKK][40] = 127, - [2][1][RTW89_IC][40] = 78, -- [2][1][RTW89_KCC][40] = 46, -+ [2][1][RTW89_KCC][40] = 50, - [2][1][RTW89_ACMA][40] = 78, - [2][1][RTW89_CN][40] = 56, - [2][1][RTW89_UK][40] = 42, -+ [2][1][RTW89_MEXICO][40] = 78, -+ [2][1][RTW89_UKRAINE][40] = 14, -+ [2][1][RTW89_CHILE][40] = 72, -+ [2][1][RTW89_QATAR][40] = 14, - [2][1][RTW89_FCC][42] = 78, - [2][1][RTW89_ETSI][42] = 16, - [2][1][RTW89_MKK][42] = 127, - [2][1][RTW89_IC][42] = 78, -- [2][1][RTW89_KCC][42] = 46, -+ [2][1][RTW89_KCC][42] = 50, - [2][1][RTW89_ACMA][42] = 78, - [2][1][RTW89_CN][42] = 56, - [2][1][RTW89_UK][42] = 42, -+ [2][1][RTW89_MEXICO][42] = 78, -+ [2][1][RTW89_UKRAINE][42] = 14, -+ [2][1][RTW89_CHILE][42] = 72, -+ [2][1][RTW89_QATAR][42] = 14, - [2][1][RTW89_FCC][44] = 74, - [2][1][RTW89_ETSI][44] = 16, - [2][1][RTW89_MKK][44] = 127, - [2][1][RTW89_IC][44] = 74, -- [2][1][RTW89_KCC][44] = 46, -+ [2][1][RTW89_KCC][44] = 50, - [2][1][RTW89_ACMA][44] = 74, - [2][1][RTW89_CN][44] = 56, - [2][1][RTW89_UK][44] = 42, -+ [2][1][RTW89_MEXICO][44] = 74, -+ [2][1][RTW89_UKRAINE][44] = 14, -+ [2][1][RTW89_CHILE][44] = 72, -+ [2][1][RTW89_QATAR][44] = 14, - [2][1][RTW89_FCC][46] = 74, - [2][1][RTW89_ETSI][46] = 16, - [2][1][RTW89_MKK][46] = 127, - [2][1][RTW89_IC][46] = 74, -- [2][1][RTW89_KCC][46] = 46, -+ [2][1][RTW89_KCC][46] = 50, - [2][1][RTW89_ACMA][46] = 74, - [2][1][RTW89_CN][46] = 56, - [2][1][RTW89_UK][46] = 42, -+ [2][1][RTW89_MEXICO][46] = 74, -+ [2][1][RTW89_UKRAINE][46] = 14, -+ [2][1][RTW89_CHILE][46] = 72, -+ [2][1][RTW89_QATAR][46] = 14, - [2][1][RTW89_FCC][48] = 40, - [2][1][RTW89_ETSI][48] = 127, - [2][1][RTW89_MKK][48] = 127, -@@ -36240,6 +38774,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [2][1][RTW89_ACMA][48] = 127, - [2][1][RTW89_CN][48] = 127, - [2][1][RTW89_UK][48] = 127, -+ [2][1][RTW89_MEXICO][48] = 127, -+ [2][1][RTW89_UKRAINE][48] = 127, -+ [2][1][RTW89_CHILE][48] = 127, -+ [2][1][RTW89_QATAR][48] = 127, - [2][1][RTW89_FCC][50] = 40, - [2][1][RTW89_ETSI][50] = 127, - [2][1][RTW89_MKK][50] = 127, -@@ -36248,6 +38786,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [2][1][RTW89_ACMA][50] = 127, - [2][1][RTW89_CN][50] = 127, - [2][1][RTW89_UK][50] = 127, -+ [2][1][RTW89_MEXICO][50] = 127, -+ [2][1][RTW89_UKRAINE][50] = 127, -+ [2][1][RTW89_CHILE][50] = 127, -+ [2][1][RTW89_QATAR][50] = 127, - [2][1][RTW89_FCC][52] = 40, - [2][1][RTW89_ETSI][52] = 127, - [2][1][RTW89_MKK][52] = 127, -@@ -36256,6 +38798,10 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - [2][1][RTW89_ACMA][52] = 127, - [2][1][RTW89_CN][52] = 127, - [2][1][RTW89_UK][52] = 127, -+ [2][1][RTW89_MEXICO][52] = 127, -+ [2][1][RTW89_UKRAINE][52] = 127, -+ [2][1][RTW89_CHILE][52] = 127, -+ [2][1][RTW89_QATAR][52] = 127, - }; - - static diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-131-wifi-rtw89-8852c-update-TX-power-tables-to-R63-with-.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-131-wifi-rtw89-8852c-update-TX-power-tables-to-R63-with-.patch deleted file mode 100644 index 787ec1c71..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-131-wifi-rtw89-8852c-update-TX-power-tables-to-R63-with-.patch +++ /dev/null @@ -1,11308 +0,0 @@ -From 2a8ec45f4d0eff76cf0cef78b3040ccfd923a72e Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Fri, 2 Jun 2023 23:05:54 +0800 -Subject: [PATCH 131/136] wifi: rtw89: 8852c: update TX power tables to R63 - with 6 GHz power type (2 of 3) - -Update TX power tables to RF version R63. - -TX power tables' changes: -* TX power byrate: - tweak a bit -* TX power limit, TX power limit RU, TX power shape: - configure values for MEXICO, UKRAINE, CHILE, QATAR - tweak a bit on other configured values -* 6 GHz TX power limit, 6 GHz TX power limit RU: - add an extra dimension for 6 GHz regulatory power type, i.e. - STD (standard power), LPI (low power indoor), VLP (very low power) - -Besides, we adjust TX power handling at 6 GHz in phy to consider 6 GHz -regulatory power type. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230602150556.36777-7-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 3 +- - drivers/net/wireless/realtek/rtw89/phy.c | 8 +- - .../wireless/realtek/rtw89/rtw8852c_table.c | 11227 +++++++++++++--- - 3 files changed, 9282 insertions(+), 1956 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3046,7 +3046,8 @@ struct rtw89_txpwr_rule_5ghz { - struct rtw89_txpwr_rule_6ghz { - const s8 (*lmt)[RTW89_6G_BW_NUM][RTW89_NTX_NUM] - [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -- [RTW89_REGD_NUM][RTW89_6G_CH_NUM]; -+ [RTW89_REGD_NUM][NUM_OF_RTW89_REG_6GHZ_POWER] -+ [RTW89_6G_CH_NUM]; - const s8 (*lmt_ru)[RTW89_RU_NUM][RTW89_NTX_NUM] - [RTW89_REGD_NUM][RTW89_6G_CH_NUM]; - }; ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -1626,8 +1626,10 @@ s8 rtw89_phy_read_txpwr_limit(struct rtw - const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz; - const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz; - const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz; -+ struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; - u8 ch_idx = rtw89_channel_to_idx(rtwdev, band, ch); - u8 regd = rtw89_regd_get(rtwdev, band); -+ u8 reg6 = regulatory->reg_6ghz_power; - s8 lmt = 0, sar; - - switch (band) { -@@ -1646,11 +1648,13 @@ s8 rtw89_phy_read_txpwr_limit(struct rtw - lmt = (*rule_5ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; - break; - case RTW89_BAND_6G: -- lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][regd][ch_idx]; -+ lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][regd][reg6][ch_idx]; - if (lmt) - break; - -- lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][RTW89_WW][ch_idx]; -+ lmt = (*rule_6ghz->lmt)[bw][ntx][rs][bf][RTW89_WW] -+ [RTW89_REG_6GHZ_POWER_DFLT] -+ [ch_idx]; - break; - default: - rtw89_warn(rtwdev, "unknown band type: %d\n", band); ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c -@@ -33563,1959 +33563,9280 @@ const s8 rtw89_8852c_txpwr_lmt_5g[RTW89_ - static - const s8 rtw89_8852c_txpwr_lmt_6g[RTW89_6G_BW_NUM][RTW89_NTX_NUM] - [RTW89_RS_LMT_NUM][RTW89_BF_NUM] -- [RTW89_REGD_NUM][RTW89_6G_CH_NUM] = { -- [0][0][1][0][RTW89_WW][0] = 24, -- [0][0][1][0][RTW89_WW][2] = 22, -- [0][0][1][0][RTW89_WW][4] = 22, -- [0][0][1][0][RTW89_WW][6] = 22, -- [0][0][1][0][RTW89_WW][8] = 22, -- [0][0][1][0][RTW89_WW][10] = 22, -- [0][0][1][0][RTW89_WW][12] = 22, -- [0][0][1][0][RTW89_WW][14] = 22, -- [0][0][1][0][RTW89_WW][15] = 22, -- [0][0][1][0][RTW89_WW][17] = 22, -- [0][0][1][0][RTW89_WW][19] = 22, -- [0][0][1][0][RTW89_WW][21] = 22, -- [0][0][1][0][RTW89_WW][23] = 22, -- [0][0][1][0][RTW89_WW][25] = 22, -- [0][0][1][0][RTW89_WW][27] = 22, -- [0][0][1][0][RTW89_WW][29] = 22, -- [0][0][1][0][RTW89_WW][30] = 22, -- [0][0][1][0][RTW89_WW][32] = 22, -- [0][0][1][0][RTW89_WW][34] = 22, -- [0][0][1][0][RTW89_WW][36] = 22, -- [0][0][1][0][RTW89_WW][38] = 22, -- [0][0][1][0][RTW89_WW][40] = 22, -- [0][0][1][0][RTW89_WW][42] = 22, -- [0][0][1][0][RTW89_WW][44] = 22, -- [0][0][1][0][RTW89_WW][45] = 22, -- [0][0][1][0][RTW89_WW][47] = 22, -- [0][0][1][0][RTW89_WW][49] = 24, -- [0][0][1][0][RTW89_WW][51] = 22, -- [0][0][1][0][RTW89_WW][53] = 22, -- [0][0][1][0][RTW89_WW][55] = 22, -- [0][0][1][0][RTW89_WW][57] = 22, -- [0][0][1][0][RTW89_WW][59] = 22, -- [0][0][1][0][RTW89_WW][60] = 22, -- [0][0][1][0][RTW89_WW][62] = 22, -- [0][0][1][0][RTW89_WW][64] = 22, -- [0][0][1][0][RTW89_WW][66] = 22, -- [0][0][1][0][RTW89_WW][68] = 22, -- [0][0][1][0][RTW89_WW][70] = 24, -- [0][0][1][0][RTW89_WW][72] = 22, -- [0][0][1][0][RTW89_WW][74] = 22, -- [0][0][1][0][RTW89_WW][75] = 22, -- [0][0][1][0][RTW89_WW][77] = 22, -- [0][0][1][0][RTW89_WW][79] = 22, -- [0][0][1][0][RTW89_WW][81] = 22, -- [0][0][1][0][RTW89_WW][83] = 22, -- [0][0][1][0][RTW89_WW][85] = 22, -- [0][0][1][0][RTW89_WW][87] = 22, -- [0][0][1][0][RTW89_WW][89] = 22, -- [0][0][1][0][RTW89_WW][90] = 22, -- [0][0][1][0][RTW89_WW][92] = 22, -- [0][0][1][0][RTW89_WW][94] = 22, -- [0][0][1][0][RTW89_WW][96] = 22, -- [0][0][1][0][RTW89_WW][98] = 22, -- [0][0][1][0][RTW89_WW][100] = 22, -- [0][0][1][0][RTW89_WW][102] = 22, -- [0][0][1][0][RTW89_WW][104] = 22, -- [0][0][1][0][RTW89_WW][105] = 22, -- [0][0][1][0][RTW89_WW][107] = 24, -- [0][0][1][0][RTW89_WW][109] = 24, -- [0][0][1][0][RTW89_WW][111] = 0, -- [0][0][1][0][RTW89_WW][113] = 0, -- [0][0][1][0][RTW89_WW][115] = 0, -- [0][0][1][0][RTW89_WW][117] = 0, -- [0][0][1][0][RTW89_WW][119] = 0, -- [0][1][1][0][RTW89_WW][0] = -2, -- [0][1][1][0][RTW89_WW][2] = -4, -- [0][1][1][0][RTW89_WW][4] = -4, -- [0][1][1][0][RTW89_WW][6] = -4, -- [0][1][1][0][RTW89_WW][8] = -4, -- [0][1][1][0][RTW89_WW][10] = -4, -- [0][1][1][0][RTW89_WW][12] = -4, -- [0][1][1][0][RTW89_WW][14] = -4, -- [0][1][1][0][RTW89_WW][15] = -4, -- [0][1][1][0][RTW89_WW][17] = -4, -- [0][1][1][0][RTW89_WW][19] = -4, -- [0][1][1][0][RTW89_WW][21] = -4, -- [0][1][1][0][RTW89_WW][23] = -4, -- [0][1][1][0][RTW89_WW][25] = -4, -- [0][1][1][0][RTW89_WW][27] = -4, -- [0][1][1][0][RTW89_WW][29] = -4, -- [0][1][1][0][RTW89_WW][30] = -4, -- [0][1][1][0][RTW89_WW][32] = -4, -- [0][1][1][0][RTW89_WW][34] = -4, -- [0][1][1][0][RTW89_WW][36] = -4, -- [0][1][1][0][RTW89_WW][38] = -4, -- [0][1][1][0][RTW89_WW][40] = -4, -- [0][1][1][0][RTW89_WW][42] = -4, -- [0][1][1][0][RTW89_WW][44] = -2, -- [0][1][1][0][RTW89_WW][45] = -2, -- [0][1][1][0][RTW89_WW][47] = -2, -- [0][1][1][0][RTW89_WW][49] = -2, -- [0][1][1][0][RTW89_WW][51] = -2, -- [0][1][1][0][RTW89_WW][53] = -2, -- [0][1][1][0][RTW89_WW][55] = -2, -- [0][1][1][0][RTW89_WW][57] = -2, -- [0][1][1][0][RTW89_WW][59] = -2, -- [0][1][1][0][RTW89_WW][60] = -2, -- [0][1][1][0][RTW89_WW][62] = -2, -- [0][1][1][0][RTW89_WW][64] = -2, -- [0][1][1][0][RTW89_WW][66] = -2, -- [0][1][1][0][RTW89_WW][68] = -2, -- [0][1][1][0][RTW89_WW][70] = -2, -- [0][1][1][0][RTW89_WW][72] = -2, -- [0][1][1][0][RTW89_WW][74] = -2, -- [0][1][1][0][RTW89_WW][75] = -2, -- [0][1][1][0][RTW89_WW][77] = -2, -- [0][1][1][0][RTW89_WW][79] = -2, -- [0][1][1][0][RTW89_WW][81] = -2, -- [0][1][1][0][RTW89_WW][83] = -2, -- [0][1][1][0][RTW89_WW][85] = -2, -- [0][1][1][0][RTW89_WW][87] = -2, -- [0][1][1][0][RTW89_WW][89] = -2, -- [0][1][1][0][RTW89_WW][90] = -2, -- [0][1][1][0][RTW89_WW][92] = -2, -- [0][1][1][0][RTW89_WW][94] = -2, -- [0][1][1][0][RTW89_WW][96] = -2, -- [0][1][1][0][RTW89_WW][98] = -2, -- [0][1][1][0][RTW89_WW][100] = -2, -- [0][1][1][0][RTW89_WW][102] = -2, -- [0][1][1][0][RTW89_WW][104] = -2, -- [0][1][1][0][RTW89_WW][105] = -2, -- [0][1][1][0][RTW89_WW][107] = 1, -- [0][1][1][0][RTW89_WW][109] = 1, -- [0][1][1][0][RTW89_WW][111] = 0, -- [0][1][1][0][RTW89_WW][113] = 0, -- [0][1][1][0][RTW89_WW][115] = 0, -- [0][1][1][0][RTW89_WW][117] = 0, -- [0][1][1][0][RTW89_WW][119] = 0, -- [0][0][2][0][RTW89_WW][0] = 24, -- [0][0][2][0][RTW89_WW][2] = 22, -- [0][0][2][0][RTW89_WW][4] = 22, -- [0][0][2][0][RTW89_WW][6] = 22, -- [0][0][2][0][RTW89_WW][8] = 22, -- [0][0][2][0][RTW89_WW][10] = 22, -- [0][0][2][0][RTW89_WW][12] = 22, -- [0][0][2][0][RTW89_WW][14] = 22, -- [0][0][2][0][RTW89_WW][15] = 22, -- [0][0][2][0][RTW89_WW][17] = 22, -- [0][0][2][0][RTW89_WW][19] = 22, -- [0][0][2][0][RTW89_WW][21] = 22, -- [0][0][2][0][RTW89_WW][23] = 22, -- [0][0][2][0][RTW89_WW][25] = 22, -- [0][0][2][0][RTW89_WW][27] = 22, -- [0][0][2][0][RTW89_WW][29] = 22, -- [0][0][2][0][RTW89_WW][30] = 22, -- [0][0][2][0][RTW89_WW][32] = 22, -- [0][0][2][0][RTW89_WW][34] = 22, -- [0][0][2][0][RTW89_WW][36] = 22, -- [0][0][2][0][RTW89_WW][38] = 22, -- [0][0][2][0][RTW89_WW][40] = 22, -- [0][0][2][0][RTW89_WW][42] = 22, -- [0][0][2][0][RTW89_WW][44] = 22, -- [0][0][2][0][RTW89_WW][45] = 22, -- [0][0][2][0][RTW89_WW][47] = 22, -- [0][0][2][0][RTW89_WW][49] = 24, -- [0][0][2][0][RTW89_WW][51] = 22, -- [0][0][2][0][RTW89_WW][53] = 22, -- [0][0][2][0][RTW89_WW][55] = 22, -- [0][0][2][0][RTW89_WW][57] = 22, -- [0][0][2][0][RTW89_WW][59] = 22, -- [0][0][2][0][RTW89_WW][60] = 22, -- [0][0][2][0][RTW89_WW][62] = 22, -- [0][0][2][0][RTW89_WW][64] = 22, -- [0][0][2][0][RTW89_WW][66] = 22, -- [0][0][2][0][RTW89_WW][68] = 22, -- [0][0][2][0][RTW89_WW][70] = 24, -- [0][0][2][0][RTW89_WW][72] = 22, -- [0][0][2][0][RTW89_WW][74] = 22, -- [0][0][2][0][RTW89_WW][75] = 22, -- [0][0][2][0][RTW89_WW][77] = 22, -- [0][0][2][0][RTW89_WW][79] = 22, -- [0][0][2][0][RTW89_WW][81] = 22, -- [0][0][2][0][RTW89_WW][83] = 22, -- [0][0][2][0][RTW89_WW][85] = 22, -- [0][0][2][0][RTW89_WW][87] = 22, -- [0][0][2][0][RTW89_WW][89] = 22, -- [0][0][2][0][RTW89_WW][90] = 22, -- [0][0][2][0][RTW89_WW][92] = 22, -- [0][0][2][0][RTW89_WW][94] = 22, -- [0][0][2][0][RTW89_WW][96] = 22, -- [0][0][2][0][RTW89_WW][98] = 22, -- [0][0][2][0][RTW89_WW][100] = 22, -- [0][0][2][0][RTW89_WW][102] = 22, -- [0][0][2][0][RTW89_WW][104] = 22, -- [0][0][2][0][RTW89_WW][105] = 22, -- [0][0][2][0][RTW89_WW][107] = 24, -- [0][0][2][0][RTW89_WW][109] = 24, -- [0][0][2][0][RTW89_WW][111] = 0, -- [0][0][2][0][RTW89_WW][113] = 0, -- [0][0][2][0][RTW89_WW][115] = 0, -- [0][0][2][0][RTW89_WW][117] = 0, -- [0][0][2][0][RTW89_WW][119] = 0, -- [0][1][2][0][RTW89_WW][0] = -2, -- [0][1][2][0][RTW89_WW][2] = -4, -- [0][1][2][0][RTW89_WW][4] = -4, -- [0][1][2][0][RTW89_WW][6] = -4, -- [0][1][2][0][RTW89_WW][8] = -4, -- [0][1][2][0][RTW89_WW][10] = -4, -- [0][1][2][0][RTW89_WW][12] = -4, -- [0][1][2][0][RTW89_WW][14] = -4, -- [0][1][2][0][RTW89_WW][15] = -4, -- [0][1][2][0][RTW89_WW][17] = -4, -- [0][1][2][0][RTW89_WW][19] = -4, -- [0][1][2][0][RTW89_WW][21] = -4, -- [0][1][2][0][RTW89_WW][23] = -4, -- [0][1][2][0][RTW89_WW][25] = -4, -- [0][1][2][0][RTW89_WW][27] = -4, -- [0][1][2][0][RTW89_WW][29] = -4, -- [0][1][2][0][RTW89_WW][30] = -4, -- [0][1][2][0][RTW89_WW][32] = -4, -- [0][1][2][0][RTW89_WW][34] = -4, -- [0][1][2][0][RTW89_WW][36] = -4, -- [0][1][2][0][RTW89_WW][38] = -4, -- [0][1][2][0][RTW89_WW][40] = -4, -- [0][1][2][0][RTW89_WW][42] = -4, -- [0][1][2][0][RTW89_WW][44] = -2, -- [0][1][2][0][RTW89_WW][45] = -2, -- [0][1][2][0][RTW89_WW][47] = -2, -- [0][1][2][0][RTW89_WW][49] = -2, -- [0][1][2][0][RTW89_WW][51] = -2, -- [0][1][2][0][RTW89_WW][53] = -2, -- [0][1][2][0][RTW89_WW][55] = -2, -- [0][1][2][0][RTW89_WW][57] = -2, -- [0][1][2][0][RTW89_WW][59] = -2, -- [0][1][2][0][RTW89_WW][60] = -2, -- [0][1][2][0][RTW89_WW][62] = -2, -- [0][1][2][0][RTW89_WW][64] = -2, -- [0][1][2][0][RTW89_WW][66] = -2, -- [0][1][2][0][RTW89_WW][68] = -2, -- [0][1][2][0][RTW89_WW][70] = -2, -- [0][1][2][0][RTW89_WW][72] = -2, -- [0][1][2][0][RTW89_WW][74] = -2, -- [0][1][2][0][RTW89_WW][75] = -2, -- [0][1][2][0][RTW89_WW][77] = -2, -- [0][1][2][0][RTW89_WW][79] = -2, -- [0][1][2][0][RTW89_WW][81] = -2, -- [0][1][2][0][RTW89_WW][83] = -2, -- [0][1][2][0][RTW89_WW][85] = -2, -- [0][1][2][0][RTW89_WW][87] = -2, -- [0][1][2][0][RTW89_WW][89] = -2, -- [0][1][2][0][RTW89_WW][90] = -2, -- [0][1][2][0][RTW89_WW][92] = -2, -- [0][1][2][0][RTW89_WW][94] = -2, -- [0][1][2][0][RTW89_WW][96] = -2, -- [0][1][2][0][RTW89_WW][98] = -2, -- [0][1][2][0][RTW89_WW][100] = -2, -- [0][1][2][0][RTW89_WW][102] = -2, -- [0][1][2][0][RTW89_WW][104] = -2, -- [0][1][2][0][RTW89_WW][105] = -2, -- [0][1][2][0][RTW89_WW][107] = 1, -- [0][1][2][0][RTW89_WW][109] = 1, -- [0][1][2][0][RTW89_WW][111] = 0, -- [0][1][2][0][RTW89_WW][113] = 0, -- [0][1][2][0][RTW89_WW][115] = 0, -- [0][1][2][0][RTW89_WW][117] = 0, -- [0][1][2][0][RTW89_WW][119] = 0, -- [0][1][2][1][RTW89_WW][0] = -2, -- [0][1][2][1][RTW89_WW][2] = -4, -- [0][1][2][1][RTW89_WW][4] = -4, -- [0][1][2][1][RTW89_WW][6] = -4, -- [0][1][2][1][RTW89_WW][8] = -4, -- [0][1][2][1][RTW89_WW][10] = -4, -- [0][1][2][1][RTW89_WW][12] = -4, -- [0][1][2][1][RTW89_WW][14] = -4, -- [0][1][2][1][RTW89_WW][15] = -4, -- [0][1][2][1][RTW89_WW][17] = -4, -- [0][1][2][1][RTW89_WW][19] = -4, -- [0][1][2][1][RTW89_WW][21] = -4, -- [0][1][2][1][RTW89_WW][23] = -4, -- [0][1][2][1][RTW89_WW][25] = -4, -- [0][1][2][1][RTW89_WW][27] = -4, -- [0][1][2][1][RTW89_WW][29] = -4, -- [0][1][2][1][RTW89_WW][30] = -4, -- [0][1][2][1][RTW89_WW][32] = -4, -- [0][1][2][1][RTW89_WW][34] = -4, -- [0][1][2][1][RTW89_WW][36] = -4, -- [0][1][2][1][RTW89_WW][38] = -4, -- [0][1][2][1][RTW89_WW][40] = -4, -- [0][1][2][1][RTW89_WW][42] = -4, -- [0][1][2][1][RTW89_WW][44] = -2, -- [0][1][2][1][RTW89_WW][45] = -2, -- [0][1][2][1][RTW89_WW][47] = -2, -- [0][1][2][1][RTW89_WW][49] = -2, -- [0][1][2][1][RTW89_WW][51] = -2, -- [0][1][2][1][RTW89_WW][53] = -2, -- [0][1][2][1][RTW89_WW][55] = -2, -- [0][1][2][1][RTW89_WW][57] = -2, -- [0][1][2][1][RTW89_WW][59] = -2, -- [0][1][2][1][RTW89_WW][60] = -2, -- [0][1][2][1][RTW89_WW][62] = -2, -- [0][1][2][1][RTW89_WW][64] = -2, -- [0][1][2][1][RTW89_WW][66] = -2, -- [0][1][2][1][RTW89_WW][68] = -2, -- [0][1][2][1][RTW89_WW][70] = -2, -- [0][1][2][1][RTW89_WW][72] = -2, -- [0][1][2][1][RTW89_WW][74] = -2, -- [0][1][2][1][RTW89_WW][75] = -2, -- [0][1][2][1][RTW89_WW][77] = -2, -- [0][1][2][1][RTW89_WW][79] = -2, -- [0][1][2][1][RTW89_WW][81] = -2, -- [0][1][2][1][RTW89_WW][83] = -2, -- [0][1][2][1][RTW89_WW][85] = -2, -- [0][1][2][1][RTW89_WW][87] = -2, -- [0][1][2][1][RTW89_WW][89] = -2, -- [0][1][2][1][RTW89_WW][90] = -2, -- [0][1][2][1][RTW89_WW][92] = -2, -- [0][1][2][1][RTW89_WW][94] = -2, -- [0][1][2][1][RTW89_WW][96] = -2, -- [0][1][2][1][RTW89_WW][98] = -2, -- [0][1][2][1][RTW89_WW][100] = -2, -- [0][1][2][1][RTW89_WW][102] = -2, -- [0][1][2][1][RTW89_WW][104] = -2, -- [0][1][2][1][RTW89_WW][105] = -2, -- [0][1][2][1][RTW89_WW][107] = 1, -- [0][1][2][1][RTW89_WW][109] = 1, -- [0][1][2][1][RTW89_WW][111] = 0, -- [0][1][2][1][RTW89_WW][113] = 0, -- [0][1][2][1][RTW89_WW][115] = 0, -- [0][1][2][1][RTW89_WW][117] = 0, -- [0][1][2][1][RTW89_WW][119] = 0, -- [1][0][2][0][RTW89_WW][1] = 34, -- [1][0][2][0][RTW89_WW][5] = 34, -- [1][0][2][0][RTW89_WW][9] = 34, -- [1][0][2][0][RTW89_WW][13] = 34, -- [1][0][2][0][RTW89_WW][16] = 34, -- [1][0][2][0][RTW89_WW][20] = 34, -- [1][0][2][0][RTW89_WW][24] = 36, -- [1][0][2][0][RTW89_WW][28] = 34, -- [1][0][2][0][RTW89_WW][31] = 34, -- [1][0][2][0][RTW89_WW][35] = 34, -- [1][0][2][0][RTW89_WW][39] = 34, -- [1][0][2][0][RTW89_WW][43] = 34, -- [1][0][2][0][RTW89_WW][46] = 34, -- [1][0][2][0][RTW89_WW][50] = 34, -- [1][0][2][0][RTW89_WW][54] = 36, -- [1][0][2][0][RTW89_WW][58] = 36, -- [1][0][2][0][RTW89_WW][61] = 34, -- [1][0][2][0][RTW89_WW][65] = 34, -- [1][0][2][0][RTW89_WW][69] = 34, -- [1][0][2][0][RTW89_WW][73] = 34, -- [1][0][2][0][RTW89_WW][76] = 34, -- [1][0][2][0][RTW89_WW][80] = 34, -- [1][0][2][0][RTW89_WW][84] = 34, -- [1][0][2][0][RTW89_WW][88] = 34, -- [1][0][2][0][RTW89_WW][91] = 36, -- [1][0][2][0][RTW89_WW][95] = 34, -- [1][0][2][0][RTW89_WW][99] = 34, -- [1][0][2][0][RTW89_WW][103] = 34, -- [1][0][2][0][RTW89_WW][106] = 36, -- [1][0][2][0][RTW89_WW][110] = 0, -- [1][0][2][0][RTW89_WW][114] = 0, -- [1][0][2][0][RTW89_WW][118] = 0, -- [1][1][2][0][RTW89_WW][1] = 10, -- [1][1][2][0][RTW89_WW][5] = 10, -- [1][1][2][0][RTW89_WW][9] = 10, -- [1][1][2][0][RTW89_WW][13] = 10, -- [1][1][2][0][RTW89_WW][16] = 10, -- [1][1][2][0][RTW89_WW][20] = 10, -- [1][1][2][0][RTW89_WW][24] = 10, -- [1][1][2][0][RTW89_WW][28] = 10, -- [1][1][2][0][RTW89_WW][31] = 10, -- [1][1][2][0][RTW89_WW][35] = 10, -- [1][1][2][0][RTW89_WW][39] = 10, -- [1][1][2][0][RTW89_WW][43] = 10, -- [1][1][2][0][RTW89_WW][46] = 12, -- [1][1][2][0][RTW89_WW][50] = 12, -- [1][1][2][0][RTW89_WW][54] = 10, -- [1][1][2][0][RTW89_WW][58] = 10, -- [1][1][2][0][RTW89_WW][61] = 10, -- [1][1][2][0][RTW89_WW][65] = 10, -- [1][1][2][0][RTW89_WW][69] = 10, -- [1][1][2][0][RTW89_WW][73] = 10, -- [1][1][2][0][RTW89_WW][76] = 10, -- [1][1][2][0][RTW89_WW][80] = 10, -- [1][1][2][0][RTW89_WW][84] = 10, -- [1][1][2][0][RTW89_WW][88] = 10, -- [1][1][2][0][RTW89_WW][91] = 12, -- [1][1][2][0][RTW89_WW][95] = 10, -- [1][1][2][0][RTW89_WW][99] = 10, -- [1][1][2][0][RTW89_WW][103] = 10, -- [1][1][2][0][RTW89_WW][106] = 12, -- [1][1][2][0][RTW89_WW][110] = 0, -- [1][1][2][0][RTW89_WW][114] = 0, -- [1][1][2][0][RTW89_WW][118] = 0, -- [1][1][2][1][RTW89_WW][1] = 10, -- [1][1][2][1][RTW89_WW][5] = 10, -- [1][1][2][1][RTW89_WW][9] = 10, -- [1][1][2][1][RTW89_WW][13] = 10, -- [1][1][2][1][RTW89_WW][16] = 10, -- [1][1][2][1][RTW89_WW][20] = 10, -- [1][1][2][1][RTW89_WW][24] = 10, -- [1][1][2][1][RTW89_WW][28] = 10, -- [1][1][2][1][RTW89_WW][31] = 10, -- [1][1][2][1][RTW89_WW][35] = 10, -- [1][1][2][1][RTW89_WW][39] = 10, -- [1][1][2][1][RTW89_WW][43] = 10, -- [1][1][2][1][RTW89_WW][46] = 12, -- [1][1][2][1][RTW89_WW][50] = 12, -- [1][1][2][1][RTW89_WW][54] = 10, -- [1][1][2][1][RTW89_WW][58] = 10, -- [1][1][2][1][RTW89_WW][61] = 10, -- [1][1][2][1][RTW89_WW][65] = 10, -- [1][1][2][1][RTW89_WW][69] = 10, -- [1][1][2][1][RTW89_WW][73] = 10, -- [1][1][2][1][RTW89_WW][76] = 10, -- [1][1][2][1][RTW89_WW][80] = 10, -- [1][1][2][1][RTW89_WW][84] = 10, -- [1][1][2][1][RTW89_WW][88] = 10, -- [1][1][2][1][RTW89_WW][91] = 12, -- [1][1][2][1][RTW89_WW][95] = 10, -- [1][1][2][1][RTW89_WW][99] = 10, -- [1][1][2][1][RTW89_WW][103] = 10, -- [1][1][2][1][RTW89_WW][106] = 12, -- [1][1][2][1][RTW89_WW][110] = 0, -- [1][1][2][1][RTW89_WW][114] = 0, -- [1][1][2][1][RTW89_WW][118] = 0, -- [2][0][2][0][RTW89_WW][3] = 46, -- [2][0][2][0][RTW89_WW][11] = 46, -- [2][0][2][0][RTW89_WW][18] = 46, -- [2][0][2][0][RTW89_WW][26] = 46, -- [2][0][2][0][RTW89_WW][33] = 46, -- [2][0][2][0][RTW89_WW][41] = 46, -- [2][0][2][0][RTW89_WW][48] = 46, -- [2][0][2][0][RTW89_WW][56] = 46, -- [2][0][2][0][RTW89_WW][63] = 46, -- [2][0][2][0][RTW89_WW][71] = 46, -- [2][0][2][0][RTW89_WW][78] = 46, -- [2][0][2][0][RTW89_WW][86] = 46, -- [2][0][2][0][RTW89_WW][93] = 46, -- [2][0][2][0][RTW89_WW][101] = 44, -- [2][0][2][0][RTW89_WW][108] = 0, -- [2][0][2][0][RTW89_WW][116] = 0, -- [2][1][2][0][RTW89_WW][3] = 22, -- [2][1][2][0][RTW89_WW][11] = 20, -- [2][1][2][0][RTW89_WW][18] = 20, -- [2][1][2][0][RTW89_WW][26] = 20, -- [2][1][2][0][RTW89_WW][33] = 20, -- [2][1][2][0][RTW89_WW][41] = 22, -- [2][1][2][0][RTW89_WW][48] = 22, -- [2][1][2][0][RTW89_WW][56] = 20, -- [2][1][2][0][RTW89_WW][63] = 22, -- [2][1][2][0][RTW89_WW][71] = 20, -- [2][1][2][0][RTW89_WW][78] = 20, -- [2][1][2][0][RTW89_WW][86] = 20, -- [2][1][2][0][RTW89_WW][93] = 22, -- [2][1][2][0][RTW89_WW][101] = 22, -- [2][1][2][0][RTW89_WW][108] = 0, -- [2][1][2][0][RTW89_WW][116] = 0, -- [2][1][2][1][RTW89_WW][3] = 22, -- [2][1][2][1][RTW89_WW][11] = 20, -- [2][1][2][1][RTW89_WW][18] = 20, -- [2][1][2][1][RTW89_WW][26] = 20, -- [2][1][2][1][RTW89_WW][33] = 20, -- [2][1][2][1][RTW89_WW][41] = 22, -- [2][1][2][1][RTW89_WW][48] = 22, -- [2][1][2][1][RTW89_WW][56] = 20, -- [2][1][2][1][RTW89_WW][63] = 22, -- [2][1][2][1][RTW89_WW][71] = 20, -- [2][1][2][1][RTW89_WW][78] = 20, -- [2][1][2][1][RTW89_WW][86] = 20, -- [2][1][2][1][RTW89_WW][93] = 22, -- [2][1][2][1][RTW89_WW][101] = 22, -- [2][1][2][1][RTW89_WW][108] = 0, -- [2][1][2][1][RTW89_WW][116] = 0, -- [3][0][2][0][RTW89_WW][7] = 38, -- [3][0][2][0][RTW89_WW][22] = 38, -- [3][0][2][0][RTW89_WW][37] = 38, -- [3][0][2][0][RTW89_WW][52] = 54, -- [3][0][2][0][RTW89_WW][67] = 54, -- [3][0][2][0][RTW89_WW][82] = 26, -- [3][0][2][0][RTW89_WW][97] = 26, -- [3][0][2][0][RTW89_WW][112] = 0, -- [3][1][2][0][RTW89_WW][7] = 32, -- [3][1][2][0][RTW89_WW][22] = 30, -- [3][1][2][0][RTW89_WW][37] = 30, -- [3][1][2][0][RTW89_WW][52] = 30, -- [3][1][2][0][RTW89_WW][67] = 32, -- [3][1][2][0][RTW89_WW][82] = 24, -- [3][1][2][0][RTW89_WW][97] = 14, -- [3][1][2][0][RTW89_WW][112] = 0, -- [3][1][2][1][RTW89_WW][7] = 32, -- [3][1][2][1][RTW89_WW][22] = 30, -- [3][1][2][1][RTW89_WW][37] = 30, -- [3][1][2][1][RTW89_WW][52] = 30, -- [3][1][2][1][RTW89_WW][67] = 32, -- [3][1][2][1][RTW89_WW][82] = 24, -- [3][1][2][1][RTW89_WW][97] = 14, -- [3][1][2][1][RTW89_WW][112] = 0, -- [0][0][1][0][RTW89_FCC][0] = 24, -- [0][0][1][0][RTW89_ETSI][0] = 66, -- [0][0][1][0][RTW89_KCC][0] = 24, -- [0][0][1][0][RTW89_FCC][2] = 22, -- [0][0][1][0][RTW89_ETSI][2] = 66, -- [0][0][1][0][RTW89_KCC][2] = 24, -- [0][0][1][0][RTW89_FCC][4] = 22, -- [0][0][1][0][RTW89_ETSI][4] = 66, -- [0][0][1][0][RTW89_KCC][4] = 24, -- [0][0][1][0][RTW89_FCC][6] = 22, -- [0][0][1][0][RTW89_ETSI][6] = 66, -- [0][0][1][0][RTW89_KCC][6] = 24, -- [0][0][1][0][RTW89_FCC][8] = 22, -- [0][0][1][0][RTW89_ETSI][8] = 66, -- [0][0][1][0][RTW89_KCC][8] = 24, -- [0][0][1][0][RTW89_FCC][10] = 22, -- [0][0][1][0][RTW89_ETSI][10] = 66, -- [0][0][1][0][RTW89_KCC][10] = 24, -- [0][0][1][0][RTW89_FCC][12] = 22, -- [0][0][1][0][RTW89_ETSI][12] = 66, -- [0][0][1][0][RTW89_KCC][12] = 24, -- [0][0][1][0][RTW89_FCC][14] = 22, -- [0][0][1][0][RTW89_ETSI][14] = 66, -- [0][0][1][0][RTW89_KCC][14] = 24, -- [0][0][1][0][RTW89_FCC][15] = 22, -- [0][0][1][0][RTW89_ETSI][15] = 66, -- [0][0][1][0][RTW89_KCC][15] = 24, -- [0][0][1][0][RTW89_FCC][17] = 22, -- [0][0][1][0][RTW89_ETSI][17] = 66, -- [0][0][1][0][RTW89_KCC][17] = 24, -- [0][0][1][0][RTW89_FCC][19] = 22, -- [0][0][1][0][RTW89_ETSI][19] = 66, -- [0][0][1][0][RTW89_KCC][19] = 24, -- [0][0][1][0][RTW89_FCC][21] = 22, -- [0][0][1][0][RTW89_ETSI][21] = 66, -- [0][0][1][0][RTW89_KCC][21] = 24, -- [0][0][1][0][RTW89_FCC][23] = 22, -- [0][0][1][0][RTW89_ETSI][23] = 66, -- [0][0][1][0][RTW89_KCC][23] = 24, -- [0][0][1][0][RTW89_FCC][25] = 22, -- [0][0][1][0][RTW89_ETSI][25] = 66, -- [0][0][1][0][RTW89_KCC][25] = 24, -- [0][0][1][0][RTW89_FCC][27] = 22, -- [0][0][1][0][RTW89_ETSI][27] = 66, -- [0][0][1][0][RTW89_KCC][27] = 24, -- [0][0][1][0][RTW89_FCC][29] = 22, -- [0][0][1][0][RTW89_ETSI][29] = 66, -- [0][0][1][0][RTW89_KCC][29] = 24, -- [0][0][1][0][RTW89_FCC][30] = 22, -- [0][0][1][0][RTW89_ETSI][30] = 66, -- [0][0][1][0][RTW89_KCC][30] = 24, -- [0][0][1][0][RTW89_FCC][32] = 22, -- [0][0][1][0][RTW89_ETSI][32] = 66, -- [0][0][1][0][RTW89_KCC][32] = 24, -- [0][0][1][0][RTW89_FCC][34] = 22, -- [0][0][1][0][RTW89_ETSI][34] = 66, -- [0][0][1][0][RTW89_KCC][34] = 24, -- [0][0][1][0][RTW89_FCC][36] = 22, -- [0][0][1][0][RTW89_ETSI][36] = 66, -- [0][0][1][0][RTW89_KCC][36] = 24, -- [0][0][1][0][RTW89_FCC][38] = 22, -- [0][0][1][0][RTW89_ETSI][38] = 66, -- [0][0][1][0][RTW89_KCC][38] = 24, -- [0][0][1][0][RTW89_FCC][40] = 22, -- [0][0][1][0][RTW89_ETSI][40] = 66, -- [0][0][1][0][RTW89_KCC][40] = 24, -- [0][0][1][0][RTW89_FCC][42] = 22, -- [0][0][1][0][RTW89_ETSI][42] = 66, -- [0][0][1][0][RTW89_KCC][42] = 24, -- [0][0][1][0][RTW89_FCC][44] = 22, -- [0][0][1][0][RTW89_ETSI][44] = 66, -- [0][0][1][0][RTW89_KCC][44] = 24, -- [0][0][1][0][RTW89_FCC][45] = 22, -- [0][0][1][0][RTW89_ETSI][45] = 127, -- [0][0][1][0][RTW89_KCC][45] = 24, -- [0][0][1][0][RTW89_FCC][47] = 22, -- [0][0][1][0][RTW89_ETSI][47] = 127, -- [0][0][1][0][RTW89_KCC][47] = 24, -- [0][0][1][0][RTW89_FCC][49] = 24, -- [0][0][1][0][RTW89_ETSI][49] = 127, -- [0][0][1][0][RTW89_KCC][49] = 24, -- [0][0][1][0][RTW89_FCC][51] = 22, -- [0][0][1][0][RTW89_ETSI][51] = 127, -- [0][0][1][0][RTW89_KCC][51] = 24, -- [0][0][1][0][RTW89_FCC][53] = 22, -- [0][0][1][0][RTW89_ETSI][53] = 127, -- [0][0][1][0][RTW89_KCC][53] = 24, -- [0][0][1][0][RTW89_FCC][55] = 22, -- [0][0][1][0][RTW89_ETSI][55] = 127, -- [0][0][1][0][RTW89_KCC][55] = 26, -- [0][0][1][0][RTW89_FCC][57] = 22, -- [0][0][1][0][RTW89_ETSI][57] = 127, -- [0][0][1][0][RTW89_KCC][57] = 26, -- [0][0][1][0][RTW89_FCC][59] = 22, -- [0][0][1][0][RTW89_ETSI][59] = 127, -- [0][0][1][0][RTW89_KCC][59] = 26, -- [0][0][1][0][RTW89_FCC][60] = 22, -- [0][0][1][0][RTW89_ETSI][60] = 127, -- [0][0][1][0][RTW89_KCC][60] = 26, -- [0][0][1][0][RTW89_FCC][62] = 22, -- [0][0][1][0][RTW89_ETSI][62] = 127, -- [0][0][1][0][RTW89_KCC][62] = 26, -- [0][0][1][0][RTW89_FCC][64] = 22, -- [0][0][1][0][RTW89_ETSI][64] = 127, -- [0][0][1][0][RTW89_KCC][64] = 26, -- [0][0][1][0][RTW89_FCC][66] = 22, -- [0][0][1][0][RTW89_ETSI][66] = 127, -- [0][0][1][0][RTW89_KCC][66] = 26, -- [0][0][1][0][RTW89_FCC][68] = 22, -- [0][0][1][0][RTW89_ETSI][68] = 127, -- [0][0][1][0][RTW89_KCC][68] = 26, -- [0][0][1][0][RTW89_FCC][70] = 24, -- [0][0][1][0][RTW89_ETSI][70] = 127, -- [0][0][1][0][RTW89_KCC][70] = 26, -- [0][0][1][0][RTW89_FCC][72] = 22, -- [0][0][1][0][RTW89_ETSI][72] = 127, -- [0][0][1][0][RTW89_KCC][72] = 26, -- [0][0][1][0][RTW89_FCC][74] = 22, -- [0][0][1][0][RTW89_ETSI][74] = 127, -- [0][0][1][0][RTW89_KCC][74] = 26, -- [0][0][1][0][RTW89_FCC][75] = 22, -- [0][0][1][0][RTW89_ETSI][75] = 127, -- [0][0][1][0][RTW89_KCC][75] = 26, -- [0][0][1][0][RTW89_FCC][77] = 22, -- [0][0][1][0][RTW89_ETSI][77] = 127, -- [0][0][1][0][RTW89_KCC][77] = 26, -- [0][0][1][0][RTW89_FCC][79] = 22, -- [0][0][1][0][RTW89_ETSI][79] = 127, -- [0][0][1][0][RTW89_KCC][79] = 26, -- [0][0][1][0][RTW89_FCC][81] = 22, -- [0][0][1][0][RTW89_ETSI][81] = 127, -- [0][0][1][0][RTW89_KCC][81] = 26, -- [0][0][1][0][RTW89_FCC][83] = 22, -- [0][0][1][0][RTW89_ETSI][83] = 127, -- [0][0][1][0][RTW89_KCC][83] = 32, -- [0][0][1][0][RTW89_FCC][85] = 22, -- [0][0][1][0][RTW89_ETSI][85] = 127, -- [0][0][1][0][RTW89_KCC][85] = 32, -- [0][0][1][0][RTW89_FCC][87] = 22, -- [0][0][1][0][RTW89_ETSI][87] = 127, -- [0][0][1][0][RTW89_KCC][87] = 32, -- [0][0][1][0][RTW89_FCC][89] = 22, -- [0][0][1][0][RTW89_ETSI][89] = 127, -- [0][0][1][0][RTW89_KCC][89] = 32, -- [0][0][1][0][RTW89_FCC][90] = 22, -- [0][0][1][0][RTW89_ETSI][90] = 127, -- [0][0][1][0][RTW89_KCC][90] = 32, -- [0][0][1][0][RTW89_FCC][92] = 22, -- [0][0][1][0][RTW89_ETSI][92] = 127, -- [0][0][1][0][RTW89_KCC][92] = 32, -- [0][0][1][0][RTW89_FCC][94] = 22, -- [0][0][1][0][RTW89_ETSI][94] = 127, -- [0][0][1][0][RTW89_KCC][94] = 32, -- [0][0][1][0][RTW89_FCC][96] = 22, -- [0][0][1][0][RTW89_ETSI][96] = 127, -- [0][0][1][0][RTW89_KCC][96] = 32, -- [0][0][1][0][RTW89_FCC][98] = 22, -- [0][0][1][0][RTW89_ETSI][98] = 127, -- [0][0][1][0][RTW89_KCC][98] = 32, -- [0][0][1][0][RTW89_FCC][100] = 22, -- [0][0][1][0][RTW89_ETSI][100] = 127, -- [0][0][1][0][RTW89_KCC][100] = 32, -- [0][0][1][0][RTW89_FCC][102] = 22, -- [0][0][1][0][RTW89_ETSI][102] = 127, -- [0][0][1][0][RTW89_KCC][102] = 32, -- [0][0][1][0][RTW89_FCC][104] = 22, -- [0][0][1][0][RTW89_ETSI][104] = 127, -- [0][0][1][0][RTW89_KCC][104] = 32, -- [0][0][1][0][RTW89_FCC][105] = 22, -- [0][0][1][0][RTW89_ETSI][105] = 127, -- [0][0][1][0][RTW89_KCC][105] = 32, -- [0][0][1][0][RTW89_FCC][107] = 24, -- [0][0][1][0][RTW89_ETSI][107] = 127, -- [0][0][1][0][RTW89_KCC][107] = 32, -- [0][0][1][0][RTW89_FCC][109] = 24, -- [0][0][1][0][RTW89_ETSI][109] = 127, -- [0][0][1][0][RTW89_KCC][109] = 32, -- [0][0][1][0][RTW89_FCC][111] = 127, -- [0][0][1][0][RTW89_ETSI][111] = 127, -- [0][0][1][0][RTW89_KCC][111] = 127, -- [0][0][1][0][RTW89_FCC][113] = 127, -- [0][0][1][0][RTW89_ETSI][113] = 127, -- [0][0][1][0][RTW89_KCC][113] = 127, -- [0][0][1][0][RTW89_FCC][115] = 127, -- [0][0][1][0][RTW89_ETSI][115] = 127, -- [0][0][1][0][RTW89_KCC][115] = 127, -- [0][0][1][0][RTW89_FCC][117] = 127, -- [0][0][1][0][RTW89_ETSI][117] = 127, -- [0][0][1][0][RTW89_KCC][117] = 127, -- [0][0][1][0][RTW89_FCC][119] = 127, -- [0][0][1][0][RTW89_ETSI][119] = 127, -- [0][0][1][0][RTW89_KCC][119] = 127, -- [0][1][1][0][RTW89_FCC][0] = -2, -- [0][1][1][0][RTW89_ETSI][0] = 54, -- [0][1][1][0][RTW89_KCC][0] = 12, -- [0][1][1][0][RTW89_FCC][2] = -4, -- [0][1][1][0][RTW89_ETSI][2] = 54, -- [0][1][1][0][RTW89_KCC][2] = 12, -- [0][1][1][0][RTW89_FCC][4] = -4, -- [0][1][1][0][RTW89_ETSI][4] = 54, -- [0][1][1][0][RTW89_KCC][4] = 12, -- [0][1][1][0][RTW89_FCC][6] = -4, -- [0][1][1][0][RTW89_ETSI][6] = 54, -- [0][1][1][0][RTW89_KCC][6] = 12, -- [0][1][1][0][RTW89_FCC][8] = -4, -- [0][1][1][0][RTW89_ETSI][8] = 54, -- [0][1][1][0][RTW89_KCC][8] = 12, -- [0][1][1][0][RTW89_FCC][10] = -4, -- [0][1][1][0][RTW89_ETSI][10] = 54, -- [0][1][1][0][RTW89_KCC][10] = 12, -- [0][1][1][0][RTW89_FCC][12] = -4, -- [0][1][1][0][RTW89_ETSI][12] = 54, -- [0][1][1][0][RTW89_KCC][12] = 12, -- [0][1][1][0][RTW89_FCC][14] = -4, -- [0][1][1][0][RTW89_ETSI][14] = 54, -- [0][1][1][0][RTW89_KCC][14] = 12, -- [0][1][1][0][RTW89_FCC][15] = -4, -- [0][1][1][0][RTW89_ETSI][15] = 54, -- [0][1][1][0][RTW89_KCC][15] = 12, -- [0][1][1][0][RTW89_FCC][17] = -4, -- [0][1][1][0][RTW89_ETSI][17] = 54, -- [0][1][1][0][RTW89_KCC][17] = 12, -- [0][1][1][0][RTW89_FCC][19] = -4, -- [0][1][1][0][RTW89_ETSI][19] = 54, -- [0][1][1][0][RTW89_KCC][19] = 12, -- [0][1][1][0][RTW89_FCC][21] = -4, -- [0][1][1][0][RTW89_ETSI][21] = 54, -- [0][1][1][0][RTW89_KCC][21] = 12, -- [0][1][1][0][RTW89_FCC][23] = -4, -- [0][1][1][0][RTW89_ETSI][23] = 54, -- [0][1][1][0][RTW89_KCC][23] = 12, -- [0][1][1][0][RTW89_FCC][25] = -4, -- [0][1][1][0][RTW89_ETSI][25] = 54, -- [0][1][1][0][RTW89_KCC][25] = 12, -- [0][1][1][0][RTW89_FCC][27] = -4, -- [0][1][1][0][RTW89_ETSI][27] = 54, -- [0][1][1][0][RTW89_KCC][27] = 12, -- [0][1][1][0][RTW89_FCC][29] = -4, -- [0][1][1][0][RTW89_ETSI][29] = 54, -- [0][1][1][0][RTW89_KCC][29] = 12, -- [0][1][1][0][RTW89_FCC][30] = -4, -- [0][1][1][0][RTW89_ETSI][30] = 54, -- [0][1][1][0][RTW89_KCC][30] = 12, -- [0][1][1][0][RTW89_FCC][32] = -4, -- [0][1][1][0][RTW89_ETSI][32] = 54, -- [0][1][1][0][RTW89_KCC][32] = 12, -- [0][1][1][0][RTW89_FCC][34] = -4, -- [0][1][1][0][RTW89_ETSI][34] = 54, -- [0][1][1][0][RTW89_KCC][34] = 12, -- [0][1][1][0][RTW89_FCC][36] = -4, -- [0][1][1][0][RTW89_ETSI][36] = 54, -- [0][1][1][0][RTW89_KCC][36] = 12, -- [0][1][1][0][RTW89_FCC][38] = -4, -- [0][1][1][0][RTW89_ETSI][38] = 54, -- [0][1][1][0][RTW89_KCC][38] = 12, -- [0][1][1][0][RTW89_FCC][40] = -4, -- [0][1][1][0][RTW89_ETSI][40] = 54, -- [0][1][1][0][RTW89_KCC][40] = 12, -- [0][1][1][0][RTW89_FCC][42] = -4, -- [0][1][1][0][RTW89_ETSI][42] = 54, -- [0][1][1][0][RTW89_KCC][42] = 12, -- [0][1][1][0][RTW89_FCC][44] = -2, -- [0][1][1][0][RTW89_ETSI][44] = 54, -- [0][1][1][0][RTW89_KCC][44] = 12, -- [0][1][1][0][RTW89_FCC][45] = -2, -- [0][1][1][0][RTW89_ETSI][45] = 127, -- [0][1][1][0][RTW89_KCC][45] = 12, -- [0][1][1][0][RTW89_FCC][47] = -2, -- [0][1][1][0][RTW89_ETSI][47] = 127, -- [0][1][1][0][RTW89_KCC][47] = 12, -- [0][1][1][0][RTW89_FCC][49] = -2, -- [0][1][1][0][RTW89_ETSI][49] = 127, -- [0][1][1][0][RTW89_KCC][49] = 12, -- [0][1][1][0][RTW89_FCC][51] = -2, -- [0][1][1][0][RTW89_ETSI][51] = 127, -- [0][1][1][0][RTW89_KCC][51] = 12, -- [0][1][1][0][RTW89_FCC][53] = -2, -- [0][1][1][0][RTW89_ETSI][53] = 127, -- [0][1][1][0][RTW89_KCC][53] = 12, -- [0][1][1][0][RTW89_FCC][55] = -2, -- [0][1][1][0][RTW89_ETSI][55] = 127, -- [0][1][1][0][RTW89_KCC][55] = 12, -- [0][1][1][0][RTW89_FCC][57] = -2, -- [0][1][1][0][RTW89_ETSI][57] = 127, -- [0][1][1][0][RTW89_KCC][57] = 12, -- [0][1][1][0][RTW89_FCC][59] = -2, -- [0][1][1][0][RTW89_ETSI][59] = 127, -- [0][1][1][0][RTW89_KCC][59] = 12, -- [0][1][1][0][RTW89_FCC][60] = -2, -- [0][1][1][0][RTW89_ETSI][60] = 127, -- [0][1][1][0][RTW89_KCC][60] = 12, -- [0][1][1][0][RTW89_FCC][62] = -2, -- [0][1][1][0][RTW89_ETSI][62] = 127, -- [0][1][1][0][RTW89_KCC][62] = 12, -- [0][1][1][0][RTW89_FCC][64] = -2, -- [0][1][1][0][RTW89_ETSI][64] = 127, -- [0][1][1][0][RTW89_KCC][64] = 12, -- [0][1][1][0][RTW89_FCC][66] = -2, -- [0][1][1][0][RTW89_ETSI][66] = 127, -- [0][1][1][0][RTW89_KCC][66] = 12, -- [0][1][1][0][RTW89_FCC][68] = -2, -- [0][1][1][0][RTW89_ETSI][68] = 127, -- [0][1][1][0][RTW89_KCC][68] = 12, -- [0][1][1][0][RTW89_FCC][70] = -2, -- [0][1][1][0][RTW89_ETSI][70] = 127, -- [0][1][1][0][RTW89_KCC][70] = 12, -- [0][1][1][0][RTW89_FCC][72] = -2, -- [0][1][1][0][RTW89_ETSI][72] = 127, -- [0][1][1][0][RTW89_KCC][72] = 12, -- [0][1][1][0][RTW89_FCC][74] = -2, -- [0][1][1][0][RTW89_ETSI][74] = 127, -- [0][1][1][0][RTW89_KCC][74] = 12, -- [0][1][1][0][RTW89_FCC][75] = -2, -- [0][1][1][0][RTW89_ETSI][75] = 127, -- [0][1][1][0][RTW89_KCC][75] = 12, -- [0][1][1][0][RTW89_FCC][77] = -2, -- [0][1][1][0][RTW89_ETSI][77] = 127, -- [0][1][1][0][RTW89_KCC][77] = 12, -- [0][1][1][0][RTW89_FCC][79] = -2, -- [0][1][1][0][RTW89_ETSI][79] = 127, -- [0][1][1][0][RTW89_KCC][79] = 12, -- [0][1][1][0][RTW89_FCC][81] = -2, -- [0][1][1][0][RTW89_ETSI][81] = 127, -- [0][1][1][0][RTW89_KCC][81] = 12, -- [0][1][1][0][RTW89_FCC][83] = -2, -- [0][1][1][0][RTW89_ETSI][83] = 127, -- [0][1][1][0][RTW89_KCC][83] = 20, -- [0][1][1][0][RTW89_FCC][85] = -2, -- [0][1][1][0][RTW89_ETSI][85] = 127, -- [0][1][1][0][RTW89_KCC][85] = 20, -- [0][1][1][0][RTW89_FCC][87] = -2, -- [0][1][1][0][RTW89_ETSI][87] = 127, -- [0][1][1][0][RTW89_KCC][87] = 20, -- [0][1][1][0][RTW89_FCC][89] = -2, -- [0][1][1][0][RTW89_ETSI][89] = 127, -- [0][1][1][0][RTW89_KCC][89] = 20, -- [0][1][1][0][RTW89_FCC][90] = -2, -- [0][1][1][0][RTW89_ETSI][90] = 127, -- [0][1][1][0][RTW89_KCC][90] = 20, -- [0][1][1][0][RTW89_FCC][92] = -2, -- [0][1][1][0][RTW89_ETSI][92] = 127, -- [0][1][1][0][RTW89_KCC][92] = 20, -- [0][1][1][0][RTW89_FCC][94] = -2, -- [0][1][1][0][RTW89_ETSI][94] = 127, -- [0][1][1][0][RTW89_KCC][94] = 20, -- [0][1][1][0][RTW89_FCC][96] = -2, -- [0][1][1][0][RTW89_ETSI][96] = 127, -- [0][1][1][0][RTW89_KCC][96] = 20, -- [0][1][1][0][RTW89_FCC][98] = -2, -- [0][1][1][0][RTW89_ETSI][98] = 127, -- [0][1][1][0][RTW89_KCC][98] = 20, -- [0][1][1][0][RTW89_FCC][100] = -2, -- [0][1][1][0][RTW89_ETSI][100] = 127, -- [0][1][1][0][RTW89_KCC][100] = 20, -- [0][1][1][0][RTW89_FCC][102] = -2, -- [0][1][1][0][RTW89_ETSI][102] = 127, -- [0][1][1][0][RTW89_KCC][102] = 20, -- [0][1][1][0][RTW89_FCC][104] = -2, -- [0][1][1][0][RTW89_ETSI][104] = 127, -- [0][1][1][0][RTW89_KCC][104] = 20, -- [0][1][1][0][RTW89_FCC][105] = -2, -- [0][1][1][0][RTW89_ETSI][105] = 127, -- [0][1][1][0][RTW89_KCC][105] = 20, -- [0][1][1][0][RTW89_FCC][107] = 0, -- [0][1][1][0][RTW89_ETSI][107] = 127, -- [0][1][1][0][RTW89_KCC][107] = 20, -- [0][1][1][0][RTW89_FCC][109] = 0, -- [0][1][1][0][RTW89_ETSI][109] = 127, -- [0][1][1][0][RTW89_KCC][109] = 20, -- [0][1][1][0][RTW89_FCC][111] = 127, -- [0][1][1][0][RTW89_ETSI][111] = 127, -- [0][1][1][0][RTW89_KCC][111] = 127, -- [0][1][1][0][RTW89_FCC][113] = 127, -- [0][1][1][0][RTW89_ETSI][113] = 127, -- [0][1][1][0][RTW89_KCC][113] = 127, -- [0][1][1][0][RTW89_FCC][115] = 127, -- [0][1][1][0][RTW89_ETSI][115] = 127, -- [0][1][1][0][RTW89_KCC][115] = 127, -- [0][1][1][0][RTW89_FCC][117] = 127, -- [0][1][1][0][RTW89_ETSI][117] = 127, -- [0][1][1][0][RTW89_KCC][117] = 127, -- [0][1][1][0][RTW89_FCC][119] = 127, -- [0][1][1][0][RTW89_ETSI][119] = 127, -- [0][1][1][0][RTW89_KCC][119] = 127, -- [0][0][2][0][RTW89_FCC][0] = 24, -- [0][0][2][0][RTW89_ETSI][0] = 66, -- [0][0][2][0][RTW89_KCC][0] = 24, -- [0][0][2][0][RTW89_FCC][2] = 22, -- [0][0][2][0][RTW89_ETSI][2] = 66, -- [0][0][2][0][RTW89_KCC][2] = 24, -- [0][0][2][0][RTW89_FCC][4] = 22, -- [0][0][2][0][RTW89_ETSI][4] = 66, -- [0][0][2][0][RTW89_KCC][4] = 24, -- [0][0][2][0][RTW89_FCC][6] = 22, -- [0][0][2][0][RTW89_ETSI][6] = 66, -- [0][0][2][0][RTW89_KCC][6] = 24, -- [0][0][2][0][RTW89_FCC][8] = 22, -- [0][0][2][0][RTW89_ETSI][8] = 66, -- [0][0][2][0][RTW89_KCC][8] = 24, -- [0][0][2][0][RTW89_FCC][10] = 22, -- [0][0][2][0][RTW89_ETSI][10] = 66, -- [0][0][2][0][RTW89_KCC][10] = 24, -- [0][0][2][0][RTW89_FCC][12] = 22, -- [0][0][2][0][RTW89_ETSI][12] = 66, -- [0][0][2][0][RTW89_KCC][12] = 24, -- [0][0][2][0][RTW89_FCC][14] = 22, -- [0][0][2][0][RTW89_ETSI][14] = 66, -- [0][0][2][0][RTW89_KCC][14] = 24, -- [0][0][2][0][RTW89_FCC][15] = 22, -- [0][0][2][0][RTW89_ETSI][15] = 66, -- [0][0][2][0][RTW89_KCC][15] = 24, -- [0][0][2][0][RTW89_FCC][17] = 22, -- [0][0][2][0][RTW89_ETSI][17] = 66, -- [0][0][2][0][RTW89_KCC][17] = 24, -- [0][0][2][0][RTW89_FCC][19] = 22, -- [0][0][2][0][RTW89_ETSI][19] = 66, -- [0][0][2][0][RTW89_KCC][19] = 24, -- [0][0][2][0][RTW89_FCC][21] = 22, -- [0][0][2][0][RTW89_ETSI][21] = 66, -- [0][0][2][0][RTW89_KCC][21] = 24, -- [0][0][2][0][RTW89_FCC][23] = 22, -- [0][0][2][0][RTW89_ETSI][23] = 66, -- [0][0][2][0][RTW89_KCC][23] = 24, -- [0][0][2][0][RTW89_FCC][25] = 22, -- [0][0][2][0][RTW89_ETSI][25] = 66, -- [0][0][2][0][RTW89_KCC][25] = 24, -- [0][0][2][0][RTW89_FCC][27] = 22, -- [0][0][2][0][RTW89_ETSI][27] = 66, -- [0][0][2][0][RTW89_KCC][27] = 24, -- [0][0][2][0][RTW89_FCC][29] = 22, -- [0][0][2][0][RTW89_ETSI][29] = 66, -- [0][0][2][0][RTW89_KCC][29] = 24, -- [0][0][2][0][RTW89_FCC][30] = 22, -- [0][0][2][0][RTW89_ETSI][30] = 66, -- [0][0][2][0][RTW89_KCC][30] = 24, -- [0][0][2][0][RTW89_FCC][32] = 22, -- [0][0][2][0][RTW89_ETSI][32] = 66, -- [0][0][2][0][RTW89_KCC][32] = 24, -- [0][0][2][0][RTW89_FCC][34] = 22, -- [0][0][2][0][RTW89_ETSI][34] = 66, -- [0][0][2][0][RTW89_KCC][34] = 24, -- [0][0][2][0][RTW89_FCC][36] = 22, -- [0][0][2][0][RTW89_ETSI][36] = 66, -- [0][0][2][0][RTW89_KCC][36] = 24, -- [0][0][2][0][RTW89_FCC][38] = 22, -- [0][0][2][0][RTW89_ETSI][38] = 66, -- [0][0][2][0][RTW89_KCC][38] = 24, -- [0][0][2][0][RTW89_FCC][40] = 22, -- [0][0][2][0][RTW89_ETSI][40] = 66, -- [0][0][2][0][RTW89_KCC][40] = 24, -- [0][0][2][0][RTW89_FCC][42] = 22, -- [0][0][2][0][RTW89_ETSI][42] = 66, -- [0][0][2][0][RTW89_KCC][42] = 24, -- [0][0][2][0][RTW89_FCC][44] = 22, -- [0][0][2][0][RTW89_ETSI][44] = 66, -- [0][0][2][0][RTW89_KCC][44] = 24, -- [0][0][2][0][RTW89_FCC][45] = 22, -- [0][0][2][0][RTW89_ETSI][45] = 127, -- [0][0][2][0][RTW89_KCC][45] = 24, -- [0][0][2][0][RTW89_FCC][47] = 22, -- [0][0][2][0][RTW89_ETSI][47] = 127, -- [0][0][2][0][RTW89_KCC][47] = 24, -- [0][0][2][0][RTW89_FCC][49] = 24, -- [0][0][2][0][RTW89_ETSI][49] = 127, -- [0][0][2][0][RTW89_KCC][49] = 24, -- [0][0][2][0][RTW89_FCC][51] = 22, -- [0][0][2][0][RTW89_ETSI][51] = 127, -- [0][0][2][0][RTW89_KCC][51] = 24, -- [0][0][2][0][RTW89_FCC][53] = 22, -- [0][0][2][0][RTW89_ETSI][53] = 127, -- [0][0][2][0][RTW89_KCC][53] = 24, -- [0][0][2][0][RTW89_FCC][55] = 22, -- [0][0][2][0][RTW89_ETSI][55] = 127, -- [0][0][2][0][RTW89_KCC][55] = 26, -- [0][0][2][0][RTW89_FCC][57] = 22, -- [0][0][2][0][RTW89_ETSI][57] = 127, -- [0][0][2][0][RTW89_KCC][57] = 26, -- [0][0][2][0][RTW89_FCC][59] = 22, -- [0][0][2][0][RTW89_ETSI][59] = 127, -- [0][0][2][0][RTW89_KCC][59] = 26, -- [0][0][2][0][RTW89_FCC][60] = 22, -- [0][0][2][0][RTW89_ETSI][60] = 127, -- [0][0][2][0][RTW89_KCC][60] = 26, -- [0][0][2][0][RTW89_FCC][62] = 22, -- [0][0][2][0][RTW89_ETSI][62] = 127, -- [0][0][2][0][RTW89_KCC][62] = 26, -- [0][0][2][0][RTW89_FCC][64] = 22, -- [0][0][2][0][RTW89_ETSI][64] = 127, -- [0][0][2][0][RTW89_KCC][64] = 26, -- [0][0][2][0][RTW89_FCC][66] = 22, -- [0][0][2][0][RTW89_ETSI][66] = 127, -- [0][0][2][0][RTW89_KCC][66] = 26, -- [0][0][2][0][RTW89_FCC][68] = 22, -- [0][0][2][0][RTW89_ETSI][68] = 127, -- [0][0][2][0][RTW89_KCC][68] = 26, -- [0][0][2][0][RTW89_FCC][70] = 24, -- [0][0][2][0][RTW89_ETSI][70] = 127, -- [0][0][2][0][RTW89_KCC][70] = 26, -- [0][0][2][0][RTW89_FCC][72] = 22, -- [0][0][2][0][RTW89_ETSI][72] = 127, -- [0][0][2][0][RTW89_KCC][72] = 26, -- [0][0][2][0][RTW89_FCC][74] = 22, -- [0][0][2][0][RTW89_ETSI][74] = 127, -- [0][0][2][0][RTW89_KCC][74] = 26, -- [0][0][2][0][RTW89_FCC][75] = 22, -- [0][0][2][0][RTW89_ETSI][75] = 127, -- [0][0][2][0][RTW89_KCC][75] = 26, -- [0][0][2][0][RTW89_FCC][77] = 22, -- [0][0][2][0][RTW89_ETSI][77] = 127, -- [0][0][2][0][RTW89_KCC][77] = 26, -- [0][0][2][0][RTW89_FCC][79] = 22, -- [0][0][2][0][RTW89_ETSI][79] = 127, -- [0][0][2][0][RTW89_KCC][79] = 26, -- [0][0][2][0][RTW89_FCC][81] = 22, -- [0][0][2][0][RTW89_ETSI][81] = 127, -- [0][0][2][0][RTW89_KCC][81] = 26, -- [0][0][2][0][RTW89_FCC][83] = 22, -- [0][0][2][0][RTW89_ETSI][83] = 127, -- [0][0][2][0][RTW89_KCC][83] = 32, -- [0][0][2][0][RTW89_FCC][85] = 22, -- [0][0][2][0][RTW89_ETSI][85] = 127, -- [0][0][2][0][RTW89_KCC][85] = 32, -- [0][0][2][0][RTW89_FCC][87] = 22, -- [0][0][2][0][RTW89_ETSI][87] = 127, -- [0][0][2][0][RTW89_KCC][87] = 32, -- [0][0][2][0][RTW89_FCC][89] = 22, -- [0][0][2][0][RTW89_ETSI][89] = 127, -- [0][0][2][0][RTW89_KCC][89] = 32, -- [0][0][2][0][RTW89_FCC][90] = 22, -- [0][0][2][0][RTW89_ETSI][90] = 127, -- [0][0][2][0][RTW89_KCC][90] = 32, -- [0][0][2][0][RTW89_FCC][92] = 22, -- [0][0][2][0][RTW89_ETSI][92] = 127, -- [0][0][2][0][RTW89_KCC][92] = 32, -- [0][0][2][0][RTW89_FCC][94] = 22, -- [0][0][2][0][RTW89_ETSI][94] = 127, -- [0][0][2][0][RTW89_KCC][94] = 32, -- [0][0][2][0][RTW89_FCC][96] = 22, -- [0][0][2][0][RTW89_ETSI][96] = 127, -- [0][0][2][0][RTW89_KCC][96] = 32, -- [0][0][2][0][RTW89_FCC][98] = 22, -- [0][0][2][0][RTW89_ETSI][98] = 127, -- [0][0][2][0][RTW89_KCC][98] = 32, -- [0][0][2][0][RTW89_FCC][100] = 22, -- [0][0][2][0][RTW89_ETSI][100] = 127, -- [0][0][2][0][RTW89_KCC][100] = 32, -- [0][0][2][0][RTW89_FCC][102] = 22, -- [0][0][2][0][RTW89_ETSI][102] = 127, -- [0][0][2][0][RTW89_KCC][102] = 32, -- [0][0][2][0][RTW89_FCC][104] = 22, -- [0][0][2][0][RTW89_ETSI][104] = 127, -- [0][0][2][0][RTW89_KCC][104] = 32, -- [0][0][2][0][RTW89_FCC][105] = 22, -- [0][0][2][0][RTW89_ETSI][105] = 127, -- [0][0][2][0][RTW89_KCC][105] = 32, -- [0][0][2][0][RTW89_FCC][107] = 24, -- [0][0][2][0][RTW89_ETSI][107] = 127, -- [0][0][2][0][RTW89_KCC][107] = 32, -- [0][0][2][0][RTW89_FCC][109] = 24, -- [0][0][2][0][RTW89_ETSI][109] = 127, -- [0][0][2][0][RTW89_KCC][109] = 32, -- [0][0][2][0][RTW89_FCC][111] = 127, -- [0][0][2][0][RTW89_ETSI][111] = 127, -- [0][0][2][0][RTW89_KCC][111] = 127, -- [0][0][2][0][RTW89_FCC][113] = 127, -- [0][0][2][0][RTW89_ETSI][113] = 127, -- [0][0][2][0][RTW89_KCC][113] = 127, -- [0][0][2][0][RTW89_FCC][115] = 127, -- [0][0][2][0][RTW89_ETSI][115] = 127, -- [0][0][2][0][RTW89_KCC][115] = 127, -- [0][0][2][0][RTW89_FCC][117] = 127, -- [0][0][2][0][RTW89_ETSI][117] = 127, -- [0][0][2][0][RTW89_KCC][117] = 127, -- [0][0][2][0][RTW89_FCC][119] = 127, -- [0][0][2][0][RTW89_ETSI][119] = 127, -- [0][0][2][0][RTW89_KCC][119] = 127, -- [0][1][2][0][RTW89_FCC][0] = -2, -- [0][1][2][0][RTW89_ETSI][0] = 54, -- [0][1][2][0][RTW89_KCC][0] = 12, -- [0][1][2][0][RTW89_FCC][2] = -4, -- [0][1][2][0][RTW89_ETSI][2] = 54, -- [0][1][2][0][RTW89_KCC][2] = 12, -- [0][1][2][0][RTW89_FCC][4] = -4, -- [0][1][2][0][RTW89_ETSI][4] = 54, -- [0][1][2][0][RTW89_KCC][4] = 12, -- [0][1][2][0][RTW89_FCC][6] = -4, -- [0][1][2][0][RTW89_ETSI][6] = 54, -- [0][1][2][0][RTW89_KCC][6] = 12, -- [0][1][2][0][RTW89_FCC][8] = -4, -- [0][1][2][0][RTW89_ETSI][8] = 54, -- [0][1][2][0][RTW89_KCC][8] = 12, -- [0][1][2][0][RTW89_FCC][10] = -4, -- [0][1][2][0][RTW89_ETSI][10] = 54, -- [0][1][2][0][RTW89_KCC][10] = 12, -- [0][1][2][0][RTW89_FCC][12] = -4, -- [0][1][2][0][RTW89_ETSI][12] = 54, -- [0][1][2][0][RTW89_KCC][12] = 12, -- [0][1][2][0][RTW89_FCC][14] = -4, -- [0][1][2][0][RTW89_ETSI][14] = 54, -- [0][1][2][0][RTW89_KCC][14] = 12, -- [0][1][2][0][RTW89_FCC][15] = -4, -- [0][1][2][0][RTW89_ETSI][15] = 54, -- [0][1][2][0][RTW89_KCC][15] = 12, -- [0][1][2][0][RTW89_FCC][17] = -4, -- [0][1][2][0][RTW89_ETSI][17] = 54, -- [0][1][2][0][RTW89_KCC][17] = 12, -- [0][1][2][0][RTW89_FCC][19] = -4, -- [0][1][2][0][RTW89_ETSI][19] = 54, -- [0][1][2][0][RTW89_KCC][19] = 12, -- [0][1][2][0][RTW89_FCC][21] = -4, -- [0][1][2][0][RTW89_ETSI][21] = 54, -- [0][1][2][0][RTW89_KCC][21] = 12, -- [0][1][2][0][RTW89_FCC][23] = -4, -- [0][1][2][0][RTW89_ETSI][23] = 54, -- [0][1][2][0][RTW89_KCC][23] = 12, -- [0][1][2][0][RTW89_FCC][25] = -4, -- [0][1][2][0][RTW89_ETSI][25] = 54, -- [0][1][2][0][RTW89_KCC][25] = 12, -- [0][1][2][0][RTW89_FCC][27] = -4, -- [0][1][2][0][RTW89_ETSI][27] = 54, -- [0][1][2][0][RTW89_KCC][27] = 12, -- [0][1][2][0][RTW89_FCC][29] = -4, -- [0][1][2][0][RTW89_ETSI][29] = 54, -- [0][1][2][0][RTW89_KCC][29] = 12, -- [0][1][2][0][RTW89_FCC][30] = -4, -- [0][1][2][0][RTW89_ETSI][30] = 54, -- [0][1][2][0][RTW89_KCC][30] = 12, -- [0][1][2][0][RTW89_FCC][32] = -4, -- [0][1][2][0][RTW89_ETSI][32] = 54, -- [0][1][2][0][RTW89_KCC][32] = 12, -- [0][1][2][0][RTW89_FCC][34] = -4, -- [0][1][2][0][RTW89_ETSI][34] = 54, -- [0][1][2][0][RTW89_KCC][34] = 12, -- [0][1][2][0][RTW89_FCC][36] = -4, -- [0][1][2][0][RTW89_ETSI][36] = 54, -- [0][1][2][0][RTW89_KCC][36] = 12, -- [0][1][2][0][RTW89_FCC][38] = -4, -- [0][1][2][0][RTW89_ETSI][38] = 54, -- [0][1][2][0][RTW89_KCC][38] = 12, -- [0][1][2][0][RTW89_FCC][40] = -4, -- [0][1][2][0][RTW89_ETSI][40] = 54, -- [0][1][2][0][RTW89_KCC][40] = 12, -- [0][1][2][0][RTW89_FCC][42] = -4, -- [0][1][2][0][RTW89_ETSI][42] = 54, -- [0][1][2][0][RTW89_KCC][42] = 12, -- [0][1][2][0][RTW89_FCC][44] = -2, -- [0][1][2][0][RTW89_ETSI][44] = 54, -- [0][1][2][0][RTW89_KCC][44] = 12, -- [0][1][2][0][RTW89_FCC][45] = -2, -- [0][1][2][0][RTW89_ETSI][45] = 127, -- [0][1][2][0][RTW89_KCC][45] = 12, -- [0][1][2][0][RTW89_FCC][47] = -2, -- [0][1][2][0][RTW89_ETSI][47] = 127, -- [0][1][2][0][RTW89_KCC][47] = 12, -- [0][1][2][0][RTW89_FCC][49] = -2, -- [0][1][2][0][RTW89_ETSI][49] = 127, -- [0][1][2][0][RTW89_KCC][49] = 12, -- [0][1][2][0][RTW89_FCC][51] = -2, -- [0][1][2][0][RTW89_ETSI][51] = 127, -- [0][1][2][0][RTW89_KCC][51] = 12, -- [0][1][2][0][RTW89_FCC][53] = -2, -- [0][1][2][0][RTW89_ETSI][53] = 127, -- [0][1][2][0][RTW89_KCC][53] = 12, -- [0][1][2][0][RTW89_FCC][55] = -2, -- [0][1][2][0][RTW89_ETSI][55] = 127, -- [0][1][2][0][RTW89_KCC][55] = 12, -- [0][1][2][0][RTW89_FCC][57] = -2, -- [0][1][2][0][RTW89_ETSI][57] = 127, -- [0][1][2][0][RTW89_KCC][57] = 12, -- [0][1][2][0][RTW89_FCC][59] = -2, -- [0][1][2][0][RTW89_ETSI][59] = 127, -- [0][1][2][0][RTW89_KCC][59] = 12, -- [0][1][2][0][RTW89_FCC][60] = -2, -- [0][1][2][0][RTW89_ETSI][60] = 127, -- [0][1][2][0][RTW89_KCC][60] = 12, -- [0][1][2][0][RTW89_FCC][62] = -2, -- [0][1][2][0][RTW89_ETSI][62] = 127, -- [0][1][2][0][RTW89_KCC][62] = 12, -- [0][1][2][0][RTW89_FCC][64] = -2, -- [0][1][2][0][RTW89_ETSI][64] = 127, -- [0][1][2][0][RTW89_KCC][64] = 12, -- [0][1][2][0][RTW89_FCC][66] = -2, -- [0][1][2][0][RTW89_ETSI][66] = 127, -- [0][1][2][0][RTW89_KCC][66] = 12, -- [0][1][2][0][RTW89_FCC][68] = -2, -- [0][1][2][0][RTW89_ETSI][68] = 127, -- [0][1][2][0][RTW89_KCC][68] = 12, -- [0][1][2][0][RTW89_FCC][70] = -2, -- [0][1][2][0][RTW89_ETSI][70] = 127, -- [0][1][2][0][RTW89_KCC][70] = 12, -- [0][1][2][0][RTW89_FCC][72] = -2, -- [0][1][2][0][RTW89_ETSI][72] = 127, -- [0][1][2][0][RTW89_KCC][72] = 12, -- [0][1][2][0][RTW89_FCC][74] = -2, -- [0][1][2][0][RTW89_ETSI][74] = 127, -- [0][1][2][0][RTW89_KCC][74] = 12, -- [0][1][2][0][RTW89_FCC][75] = -2, -- [0][1][2][0][RTW89_ETSI][75] = 127, -- [0][1][2][0][RTW89_KCC][75] = 12, -- [0][1][2][0][RTW89_FCC][77] = -2, -- [0][1][2][0][RTW89_ETSI][77] = 127, -- [0][1][2][0][RTW89_KCC][77] = 12, -- [0][1][2][0][RTW89_FCC][79] = -2, -- [0][1][2][0][RTW89_ETSI][79] = 127, -- [0][1][2][0][RTW89_KCC][79] = 12, -- [0][1][2][0][RTW89_FCC][81] = -2, -- [0][1][2][0][RTW89_ETSI][81] = 127, -- [0][1][2][0][RTW89_KCC][81] = 12, -- [0][1][2][0][RTW89_FCC][83] = -2, -- [0][1][2][0][RTW89_ETSI][83] = 127, -- [0][1][2][0][RTW89_KCC][83] = 20, -- [0][1][2][0][RTW89_FCC][85] = -2, -- [0][1][2][0][RTW89_ETSI][85] = 127, -- [0][1][2][0][RTW89_KCC][85] = 20, -- [0][1][2][0][RTW89_FCC][87] = -2, -- [0][1][2][0][RTW89_ETSI][87] = 127, -- [0][1][2][0][RTW89_KCC][87] = 20, -- [0][1][2][0][RTW89_FCC][89] = -2, -- [0][1][2][0][RTW89_ETSI][89] = 127, -- [0][1][2][0][RTW89_KCC][89] = 20, -- [0][1][2][0][RTW89_FCC][90] = -2, -- [0][1][2][0][RTW89_ETSI][90] = 127, -- [0][1][2][0][RTW89_KCC][90] = 20, -- [0][1][2][0][RTW89_FCC][92] = -2, -- [0][1][2][0][RTW89_ETSI][92] = 127, -- [0][1][2][0][RTW89_KCC][92] = 20, -- [0][1][2][0][RTW89_FCC][94] = -2, -- [0][1][2][0][RTW89_ETSI][94] = 127, -- [0][1][2][0][RTW89_KCC][94] = 20, -- [0][1][2][0][RTW89_FCC][96] = -2, -- [0][1][2][0][RTW89_ETSI][96] = 127, -- [0][1][2][0][RTW89_KCC][96] = 20, -- [0][1][2][0][RTW89_FCC][98] = -2, -- [0][1][2][0][RTW89_ETSI][98] = 127, -- [0][1][2][0][RTW89_KCC][98] = 20, -- [0][1][2][0][RTW89_FCC][100] = -2, -- [0][1][2][0][RTW89_ETSI][100] = 127, -- [0][1][2][0][RTW89_KCC][100] = 20, -- [0][1][2][0][RTW89_FCC][102] = -2, -- [0][1][2][0][RTW89_ETSI][102] = 127, -- [0][1][2][0][RTW89_KCC][102] = 20, -- [0][1][2][0][RTW89_FCC][104] = -2, -- [0][1][2][0][RTW89_ETSI][104] = 127, -- [0][1][2][0][RTW89_KCC][104] = 20, -- [0][1][2][0][RTW89_FCC][105] = -2, -- [0][1][2][0][RTW89_ETSI][105] = 127, -- [0][1][2][0][RTW89_KCC][105] = 20, -- [0][1][2][0][RTW89_FCC][107] = 0, -- [0][1][2][0][RTW89_ETSI][107] = 127, -- [0][1][2][0][RTW89_KCC][107] = 20, -- [0][1][2][0][RTW89_FCC][109] = 0, -- [0][1][2][0][RTW89_ETSI][109] = 127, -- [0][1][2][0][RTW89_KCC][109] = 20, -- [0][1][2][0][RTW89_FCC][111] = 127, -- [0][1][2][0][RTW89_ETSI][111] = 127, -- [0][1][2][0][RTW89_KCC][111] = 127, -- [0][1][2][0][RTW89_FCC][113] = 127, -- [0][1][2][0][RTW89_ETSI][113] = 127, -- [0][1][2][0][RTW89_KCC][113] = 127, -- [0][1][2][0][RTW89_FCC][115] = 127, -- [0][1][2][0][RTW89_ETSI][115] = 127, -- [0][1][2][0][RTW89_KCC][115] = 127, -- [0][1][2][0][RTW89_FCC][117] = 127, -- [0][1][2][0][RTW89_ETSI][117] = 127, -- [0][1][2][0][RTW89_KCC][117] = 127, -- [0][1][2][0][RTW89_FCC][119] = 127, -- [0][1][2][0][RTW89_ETSI][119] = 127, -- [0][1][2][0][RTW89_KCC][119] = 127, -- [0][1][2][1][RTW89_FCC][0] = -2, -- [0][1][2][1][RTW89_ETSI][0] = 42, -- [0][1][2][1][RTW89_KCC][0] = 12, -- [0][1][2][1][RTW89_FCC][2] = -4, -- [0][1][2][1][RTW89_ETSI][2] = 42, -- [0][1][2][1][RTW89_KCC][2] = 12, -- [0][1][2][1][RTW89_FCC][4] = -4, -- [0][1][2][1][RTW89_ETSI][4] = 42, -- [0][1][2][1][RTW89_KCC][4] = 12, -- [0][1][2][1][RTW89_FCC][6] = -4, -- [0][1][2][1][RTW89_ETSI][6] = 42, -- [0][1][2][1][RTW89_KCC][6] = 12, -- [0][1][2][1][RTW89_FCC][8] = -4, -- [0][1][2][1][RTW89_ETSI][8] = 42, -- [0][1][2][1][RTW89_KCC][8] = 12, -- [0][1][2][1][RTW89_FCC][10] = -4, -- [0][1][2][1][RTW89_ETSI][10] = 42, -- [0][1][2][1][RTW89_KCC][10] = 12, -- [0][1][2][1][RTW89_FCC][12] = -4, -- [0][1][2][1][RTW89_ETSI][12] = 42, -- [0][1][2][1][RTW89_KCC][12] = 12, -- [0][1][2][1][RTW89_FCC][14] = -4, -- [0][1][2][1][RTW89_ETSI][14] = 42, -- [0][1][2][1][RTW89_KCC][14] = 12, -- [0][1][2][1][RTW89_FCC][15] = -4, -- [0][1][2][1][RTW89_ETSI][15] = 42, -- [0][1][2][1][RTW89_KCC][15] = 12, -- [0][1][2][1][RTW89_FCC][17] = -4, -- [0][1][2][1][RTW89_ETSI][17] = 42, -- [0][1][2][1][RTW89_KCC][17] = 12, -- [0][1][2][1][RTW89_FCC][19] = -4, -- [0][1][2][1][RTW89_ETSI][19] = 42, -- [0][1][2][1][RTW89_KCC][19] = 12, -- [0][1][2][1][RTW89_FCC][21] = -4, -- [0][1][2][1][RTW89_ETSI][21] = 42, -- [0][1][2][1][RTW89_KCC][21] = 12, -- [0][1][2][1][RTW89_FCC][23] = -4, -- [0][1][2][1][RTW89_ETSI][23] = 42, -- [0][1][2][1][RTW89_KCC][23] = 12, -- [0][1][2][1][RTW89_FCC][25] = -4, -- [0][1][2][1][RTW89_ETSI][25] = 42, -- [0][1][2][1][RTW89_KCC][25] = 12, -- [0][1][2][1][RTW89_FCC][27] = -4, -- [0][1][2][1][RTW89_ETSI][27] = 42, -- [0][1][2][1][RTW89_KCC][27] = 12, -- [0][1][2][1][RTW89_FCC][29] = -4, -- [0][1][2][1][RTW89_ETSI][29] = 42, -- [0][1][2][1][RTW89_KCC][29] = 12, -- [0][1][2][1][RTW89_FCC][30] = -4, -- [0][1][2][1][RTW89_ETSI][30] = 42, -- [0][1][2][1][RTW89_KCC][30] = 12, -- [0][1][2][1][RTW89_FCC][32] = -4, -- [0][1][2][1][RTW89_ETSI][32] = 42, -- [0][1][2][1][RTW89_KCC][32] = 12, -- [0][1][2][1][RTW89_FCC][34] = -4, -- [0][1][2][1][RTW89_ETSI][34] = 42, -- [0][1][2][1][RTW89_KCC][34] = 12, -- [0][1][2][1][RTW89_FCC][36] = -4, -- [0][1][2][1][RTW89_ETSI][36] = 42, -- [0][1][2][1][RTW89_KCC][36] = 12, -- [0][1][2][1][RTW89_FCC][38] = -4, -- [0][1][2][1][RTW89_ETSI][38] = 42, -- [0][1][2][1][RTW89_KCC][38] = 12, -- [0][1][2][1][RTW89_FCC][40] = -4, -- [0][1][2][1][RTW89_ETSI][40] = 42, -- [0][1][2][1][RTW89_KCC][40] = 12, -- [0][1][2][1][RTW89_FCC][42] = -4, -- [0][1][2][1][RTW89_ETSI][42] = 42, -- [0][1][2][1][RTW89_KCC][42] = 12, -- [0][1][2][1][RTW89_FCC][44] = -2, -- [0][1][2][1][RTW89_ETSI][44] = 42, -- [0][1][2][1][RTW89_KCC][44] = 12, -- [0][1][2][1][RTW89_FCC][45] = -2, -- [0][1][2][1][RTW89_ETSI][45] = 127, -- [0][1][2][1][RTW89_KCC][45] = 12, -- [0][1][2][1][RTW89_FCC][47] = -2, -- [0][1][2][1][RTW89_ETSI][47] = 127, -- [0][1][2][1][RTW89_KCC][47] = 12, -- [0][1][2][1][RTW89_FCC][49] = -2, -- [0][1][2][1][RTW89_ETSI][49] = 127, -- [0][1][2][1][RTW89_KCC][49] = 12, -- [0][1][2][1][RTW89_FCC][51] = -2, -- [0][1][2][1][RTW89_ETSI][51] = 127, -- [0][1][2][1][RTW89_KCC][51] = 12, -- [0][1][2][1][RTW89_FCC][53] = -2, -- [0][1][2][1][RTW89_ETSI][53] = 127, -- [0][1][2][1][RTW89_KCC][53] = 12, -- [0][1][2][1][RTW89_FCC][55] = -2, -- [0][1][2][1][RTW89_ETSI][55] = 127, -- [0][1][2][1][RTW89_KCC][55] = 12, -- [0][1][2][1][RTW89_FCC][57] = -2, -- [0][1][2][1][RTW89_ETSI][57] = 127, -- [0][1][2][1][RTW89_KCC][57] = 12, -- [0][1][2][1][RTW89_FCC][59] = -2, -- [0][1][2][1][RTW89_ETSI][59] = 127, -- [0][1][2][1][RTW89_KCC][59] = 12, -- [0][1][2][1][RTW89_FCC][60] = -2, -- [0][1][2][1][RTW89_ETSI][60] = 127, -- [0][1][2][1][RTW89_KCC][60] = 12, -- [0][1][2][1][RTW89_FCC][62] = -2, -- [0][1][2][1][RTW89_ETSI][62] = 127, -- [0][1][2][1][RTW89_KCC][62] = 12, -- [0][1][2][1][RTW89_FCC][64] = -2, -- [0][1][2][1][RTW89_ETSI][64] = 127, -- [0][1][2][1][RTW89_KCC][64] = 12, -- [0][1][2][1][RTW89_FCC][66] = -2, -- [0][1][2][1][RTW89_ETSI][66] = 127, -- [0][1][2][1][RTW89_KCC][66] = 12, -- [0][1][2][1][RTW89_FCC][68] = -2, -- [0][1][2][1][RTW89_ETSI][68] = 127, -- [0][1][2][1][RTW89_KCC][68] = 12, -- [0][1][2][1][RTW89_FCC][70] = -2, -- [0][1][2][1][RTW89_ETSI][70] = 127, -- [0][1][2][1][RTW89_KCC][70] = 12, -- [0][1][2][1][RTW89_FCC][72] = -2, -- [0][1][2][1][RTW89_ETSI][72] = 127, -- [0][1][2][1][RTW89_KCC][72] = 12, -- [0][1][2][1][RTW89_FCC][74] = -2, -- [0][1][2][1][RTW89_ETSI][74] = 127, -- [0][1][2][1][RTW89_KCC][74] = 12, -- [0][1][2][1][RTW89_FCC][75] = -2, -- [0][1][2][1][RTW89_ETSI][75] = 127, -- [0][1][2][1][RTW89_KCC][75] = 12, -- [0][1][2][1][RTW89_FCC][77] = -2, -- [0][1][2][1][RTW89_ETSI][77] = 127, -- [0][1][2][1][RTW89_KCC][77] = 12, -- [0][1][2][1][RTW89_FCC][79] = -2, -- [0][1][2][1][RTW89_ETSI][79] = 127, -- [0][1][2][1][RTW89_KCC][79] = 12, -- [0][1][2][1][RTW89_FCC][81] = -2, -- [0][1][2][1][RTW89_ETSI][81] = 127, -- [0][1][2][1][RTW89_KCC][81] = 12, -- [0][1][2][1][RTW89_FCC][83] = -2, -- [0][1][2][1][RTW89_ETSI][83] = 127, -- [0][1][2][1][RTW89_KCC][83] = 20, -- [0][1][2][1][RTW89_FCC][85] = -2, -- [0][1][2][1][RTW89_ETSI][85] = 127, -- [0][1][2][1][RTW89_KCC][85] = 20, -- [0][1][2][1][RTW89_FCC][87] = -2, -- [0][1][2][1][RTW89_ETSI][87] = 127, -- [0][1][2][1][RTW89_KCC][87] = 20, -- [0][1][2][1][RTW89_FCC][89] = -2, -- [0][1][2][1][RTW89_ETSI][89] = 127, -- [0][1][2][1][RTW89_KCC][89] = 20, -- [0][1][2][1][RTW89_FCC][90] = -2, -- [0][1][2][1][RTW89_ETSI][90] = 127, -- [0][1][2][1][RTW89_KCC][90] = 20, -- [0][1][2][1][RTW89_FCC][92] = -2, -- [0][1][2][1][RTW89_ETSI][92] = 127, -- [0][1][2][1][RTW89_KCC][92] = 20, -- [0][1][2][1][RTW89_FCC][94] = -2, -- [0][1][2][1][RTW89_ETSI][94] = 127, -- [0][1][2][1][RTW89_KCC][94] = 20, -- [0][1][2][1][RTW89_FCC][96] = -2, -- [0][1][2][1][RTW89_ETSI][96] = 127, -- [0][1][2][1][RTW89_KCC][96] = 20, -- [0][1][2][1][RTW89_FCC][98] = -2, -- [0][1][2][1][RTW89_ETSI][98] = 127, -- [0][1][2][1][RTW89_KCC][98] = 20, -- [0][1][2][1][RTW89_FCC][100] = -2, -- [0][1][2][1][RTW89_ETSI][100] = 127, -- [0][1][2][1][RTW89_KCC][100] = 20, -- [0][1][2][1][RTW89_FCC][102] = -2, -- [0][1][2][1][RTW89_ETSI][102] = 127, -- [0][1][2][1][RTW89_KCC][102] = 20, -- [0][1][2][1][RTW89_FCC][104] = -2, -- [0][1][2][1][RTW89_ETSI][104] = 127, -- [0][1][2][1][RTW89_KCC][104] = 20, -- [0][1][2][1][RTW89_FCC][105] = -2, -- [0][1][2][1][RTW89_ETSI][105] = 127, -- [0][1][2][1][RTW89_KCC][105] = 20, -- [0][1][2][1][RTW89_FCC][107] = 0, -- [0][1][2][1][RTW89_ETSI][107] = 127, -- [0][1][2][1][RTW89_KCC][107] = 20, -- [0][1][2][1][RTW89_FCC][109] = 0, -- [0][1][2][1][RTW89_ETSI][109] = 127, -- [0][1][2][1][RTW89_KCC][109] = 20, -- [0][1][2][1][RTW89_FCC][111] = 127, -- [0][1][2][1][RTW89_ETSI][111] = 127, -- [0][1][2][1][RTW89_KCC][111] = 127, -- [0][1][2][1][RTW89_FCC][113] = 127, -- [0][1][2][1][RTW89_ETSI][113] = 127, -- [0][1][2][1][RTW89_KCC][113] = 127, -- [0][1][2][1][RTW89_FCC][115] = 127, -- [0][1][2][1][RTW89_ETSI][115] = 127, -- [0][1][2][1][RTW89_KCC][115] = 127, -- [0][1][2][1][RTW89_FCC][117] = 127, -- [0][1][2][1][RTW89_ETSI][117] = 127, -- [0][1][2][1][RTW89_KCC][117] = 127, -- [0][1][2][1][RTW89_FCC][119] = 127, -- [0][1][2][1][RTW89_ETSI][119] = 127, -- [0][1][2][1][RTW89_KCC][119] = 127, -- [1][0][2][0][RTW89_FCC][1] = 34, -- [1][0][2][0][RTW89_ETSI][1] = 66, -- [1][0][2][0][RTW89_KCC][1] = 40, -- [1][0][2][0][RTW89_FCC][5] = 34, -- [1][0][2][0][RTW89_ETSI][5] = 66, -- [1][0][2][0][RTW89_KCC][5] = 40, -- [1][0][2][0][RTW89_FCC][9] = 34, -- [1][0][2][0][RTW89_ETSI][9] = 66, -- [1][0][2][0][RTW89_KCC][9] = 40, -- [1][0][2][0][RTW89_FCC][13] = 34, -- [1][0][2][0][RTW89_ETSI][13] = 66, -- [1][0][2][0][RTW89_KCC][13] = 40, -- [1][0][2][0][RTW89_FCC][16] = 34, -- [1][0][2][0][RTW89_ETSI][16] = 66, -- [1][0][2][0][RTW89_KCC][16] = 40, -- [1][0][2][0][RTW89_FCC][20] = 34, -- [1][0][2][0][RTW89_ETSI][20] = 66, -- [1][0][2][0][RTW89_KCC][20] = 40, -- [1][0][2][0][RTW89_FCC][24] = 36, -- [1][0][2][0][RTW89_ETSI][24] = 66, -- [1][0][2][0][RTW89_KCC][24] = 40, -- [1][0][2][0][RTW89_FCC][28] = 34, -- [1][0][2][0][RTW89_ETSI][28] = 66, -- [1][0][2][0][RTW89_KCC][28] = 40, -- [1][0][2][0][RTW89_FCC][31] = 34, -- [1][0][2][0][RTW89_ETSI][31] = 66, -- [1][0][2][0][RTW89_KCC][31] = 40, -- [1][0][2][0][RTW89_FCC][35] = 34, -- [1][0][2][0][RTW89_ETSI][35] = 66, -- [1][0][2][0][RTW89_KCC][35] = 40, -- [1][0][2][0][RTW89_FCC][39] = 34, -- [1][0][2][0][RTW89_ETSI][39] = 66, -- [1][0][2][0][RTW89_KCC][39] = 40, -- [1][0][2][0][RTW89_FCC][43] = 34, -- [1][0][2][0][RTW89_ETSI][43] = 66, -- [1][0][2][0][RTW89_KCC][43] = 40, -- [1][0][2][0][RTW89_FCC][46] = 34, -- [1][0][2][0][RTW89_ETSI][46] = 127, -- [1][0][2][0][RTW89_KCC][46] = 40, -- [1][0][2][0][RTW89_FCC][50] = 34, -- [1][0][2][0][RTW89_ETSI][50] = 127, -- [1][0][2][0][RTW89_KCC][50] = 40, -- [1][0][2][0][RTW89_FCC][54] = 36, -- [1][0][2][0][RTW89_ETSI][54] = 127, -- [1][0][2][0][RTW89_KCC][54] = 40, -- [1][0][2][0][RTW89_FCC][58] = 36, -- [1][0][2][0][RTW89_ETSI][58] = 127, -- [1][0][2][0][RTW89_KCC][58] = 40, -- [1][0][2][0][RTW89_FCC][61] = 34, -- [1][0][2][0][RTW89_ETSI][61] = 127, -- [1][0][2][0][RTW89_KCC][61] = 40, -- [1][0][2][0][RTW89_FCC][65] = 34, -- [1][0][2][0][RTW89_ETSI][65] = 127, -- [1][0][2][0][RTW89_KCC][65] = 40, -- [1][0][2][0][RTW89_FCC][69] = 34, -- [1][0][2][0][RTW89_ETSI][69] = 127, -- [1][0][2][0][RTW89_KCC][69] = 40, -- [1][0][2][0][RTW89_FCC][73] = 34, -- [1][0][2][0][RTW89_ETSI][73] = 127, -- [1][0][2][0][RTW89_KCC][73] = 40, -- [1][0][2][0][RTW89_FCC][76] = 34, -- [1][0][2][0][RTW89_ETSI][76] = 127, -- [1][0][2][0][RTW89_KCC][76] = 40, -- [1][0][2][0][RTW89_FCC][80] = 34, -- [1][0][2][0][RTW89_ETSI][80] = 127, -- [1][0][2][0][RTW89_KCC][80] = 42, -- [1][0][2][0][RTW89_FCC][84] = 34, -- [1][0][2][0][RTW89_ETSI][84] = 127, -- [1][0][2][0][RTW89_KCC][84] = 42, -- [1][0][2][0][RTW89_FCC][88] = 34, -- [1][0][2][0][RTW89_ETSI][88] = 127, -- [1][0][2][0][RTW89_KCC][88] = 42, -- [1][0][2][0][RTW89_FCC][91] = 36, -- [1][0][2][0][RTW89_ETSI][91] = 127, -- [1][0][2][0][RTW89_KCC][91] = 42, -- [1][0][2][0][RTW89_FCC][95] = 34, -- [1][0][2][0][RTW89_ETSI][95] = 127, -- [1][0][2][0][RTW89_KCC][95] = 42, -- [1][0][2][0][RTW89_FCC][99] = 34, -- [1][0][2][0][RTW89_ETSI][99] = 127, -- [1][0][2][0][RTW89_KCC][99] = 42, -- [1][0][2][0][RTW89_FCC][103] = 34, -- [1][0][2][0][RTW89_ETSI][103] = 127, -- [1][0][2][0][RTW89_KCC][103] = 42, -- [1][0][2][0][RTW89_FCC][106] = 36, -- [1][0][2][0][RTW89_ETSI][106] = 127, -- [1][0][2][0][RTW89_KCC][106] = 42, -- [1][0][2][0][RTW89_FCC][110] = 127, -- [1][0][2][0][RTW89_ETSI][110] = 127, -- [1][0][2][0][RTW89_KCC][110] = 127, -- [1][0][2][0][RTW89_FCC][114] = 127, -- [1][0][2][0][RTW89_ETSI][114] = 127, -- [1][0][2][0][RTW89_KCC][114] = 127, -- [1][0][2][0][RTW89_FCC][118] = 127, -- [1][0][2][0][RTW89_ETSI][118] = 127, -- [1][0][2][0][RTW89_KCC][118] = 127, -- [1][1][2][0][RTW89_FCC][1] = 10, -- [1][1][2][0][RTW89_ETSI][1] = 54, -- [1][1][2][0][RTW89_KCC][1] = 28, -- [1][1][2][0][RTW89_FCC][5] = 10, -- [1][1][2][0][RTW89_ETSI][5] = 54, -- [1][1][2][0][RTW89_KCC][5] = 28, -- [1][1][2][0][RTW89_FCC][9] = 10, -- [1][1][2][0][RTW89_ETSI][9] = 54, -- [1][1][2][0][RTW89_KCC][9] = 28, -- [1][1][2][0][RTW89_FCC][13] = 10, -- [1][1][2][0][RTW89_ETSI][13] = 54, -- [1][1][2][0][RTW89_KCC][13] = 28, -- [1][1][2][0][RTW89_FCC][16] = 10, -- [1][1][2][0][RTW89_ETSI][16] = 54, -- [1][1][2][0][RTW89_KCC][16] = 28, -- [1][1][2][0][RTW89_FCC][20] = 10, -- [1][1][2][0][RTW89_ETSI][20] = 54, -- [1][1][2][0][RTW89_KCC][20] = 28, -- [1][1][2][0][RTW89_FCC][24] = 10, -- [1][1][2][0][RTW89_ETSI][24] = 54, -- [1][1][2][0][RTW89_KCC][24] = 28, -- [1][1][2][0][RTW89_FCC][28] = 10, -- [1][1][2][0][RTW89_ETSI][28] = 54, -- [1][1][2][0][RTW89_KCC][28] = 28, -- [1][1][2][0][RTW89_FCC][31] = 10, -- [1][1][2][0][RTW89_ETSI][31] = 54, -- [1][1][2][0][RTW89_KCC][31] = 28, -- [1][1][2][0][RTW89_FCC][35] = 10, -- [1][1][2][0][RTW89_ETSI][35] = 54, -- [1][1][2][0][RTW89_KCC][35] = 28, -- [1][1][2][0][RTW89_FCC][39] = 10, -- [1][1][2][0][RTW89_ETSI][39] = 54, -- [1][1][2][0][RTW89_KCC][39] = 28, -- [1][1][2][0][RTW89_FCC][43] = 10, -- [1][1][2][0][RTW89_ETSI][43] = 54, -- [1][1][2][0][RTW89_KCC][43] = 28, -- [1][1][2][0][RTW89_FCC][46] = 12, -- [1][1][2][0][RTW89_ETSI][46] = 127, -- [1][1][2][0][RTW89_KCC][46] = 28, -- [1][1][2][0][RTW89_FCC][50] = 12, -- [1][1][2][0][RTW89_ETSI][50] = 127, -- [1][1][2][0][RTW89_KCC][50] = 28, -- [1][1][2][0][RTW89_FCC][54] = 10, -- [1][1][2][0][RTW89_ETSI][54] = 127, -- [1][1][2][0][RTW89_KCC][54] = 28, -- [1][1][2][0][RTW89_FCC][58] = 10, -- [1][1][2][0][RTW89_ETSI][58] = 127, -- [1][1][2][0][RTW89_KCC][58] = 28, -- [1][1][2][0][RTW89_FCC][61] = 10, -- [1][1][2][0][RTW89_ETSI][61] = 127, -- [1][1][2][0][RTW89_KCC][61] = 28, -- [1][1][2][0][RTW89_FCC][65] = 10, -- [1][1][2][0][RTW89_ETSI][65] = 127, -- [1][1][2][0][RTW89_KCC][65] = 28, -- [1][1][2][0][RTW89_FCC][69] = 10, -- [1][1][2][0][RTW89_ETSI][69] = 127, -- [1][1][2][0][RTW89_KCC][69] = 28, -- [1][1][2][0][RTW89_FCC][73] = 10, -- [1][1][2][0][RTW89_ETSI][73] = 127, -- [1][1][2][0][RTW89_KCC][73] = 28, -- [1][1][2][0][RTW89_FCC][76] = 10, -- [1][1][2][0][RTW89_ETSI][76] = 127, -- [1][1][2][0][RTW89_KCC][76] = 28, -- [1][1][2][0][RTW89_FCC][80] = 10, -- [1][1][2][0][RTW89_ETSI][80] = 127, -- [1][1][2][0][RTW89_KCC][80] = 32, -- [1][1][2][0][RTW89_FCC][84] = 10, -- [1][1][2][0][RTW89_ETSI][84] = 127, -- [1][1][2][0][RTW89_KCC][84] = 32, -- [1][1][2][0][RTW89_FCC][88] = 10, -- [1][1][2][0][RTW89_ETSI][88] = 127, -- [1][1][2][0][RTW89_KCC][88] = 32, -- [1][1][2][0][RTW89_FCC][91] = 12, -- [1][1][2][0][RTW89_ETSI][91] = 127, -- [1][1][2][0][RTW89_KCC][91] = 32, -- [1][1][2][0][RTW89_FCC][95] = 10, -- [1][1][2][0][RTW89_ETSI][95] = 127, -- [1][1][2][0][RTW89_KCC][95] = 32, -- [1][1][2][0][RTW89_FCC][99] = 10, -- [1][1][2][0][RTW89_ETSI][99] = 127, -- [1][1][2][0][RTW89_KCC][99] = 32, -- [1][1][2][0][RTW89_FCC][103] = 10, -- [1][1][2][0][RTW89_ETSI][103] = 127, -- [1][1][2][0][RTW89_KCC][103] = 32, -- [1][1][2][0][RTW89_FCC][106] = 12, -- [1][1][2][0][RTW89_ETSI][106] = 127, -- [1][1][2][0][RTW89_KCC][106] = 32, -- [1][1][2][0][RTW89_FCC][110] = 127, -- [1][1][2][0][RTW89_ETSI][110] = 127, -- [1][1][2][0][RTW89_KCC][110] = 127, -- [1][1][2][0][RTW89_FCC][114] = 127, -- [1][1][2][0][RTW89_ETSI][114] = 127, -- [1][1][2][0][RTW89_KCC][114] = 127, -- [1][1][2][0][RTW89_FCC][118] = 127, -- [1][1][2][0][RTW89_ETSI][118] = 127, -- [1][1][2][0][RTW89_KCC][118] = 127, -- [1][1][2][1][RTW89_FCC][1] = 10, -- [1][1][2][1][RTW89_ETSI][1] = 42, -- [1][1][2][1][RTW89_KCC][1] = 28, -- [1][1][2][1][RTW89_FCC][5] = 10, -- [1][1][2][1][RTW89_ETSI][5] = 42, -- [1][1][2][1][RTW89_KCC][5] = 28, -- [1][1][2][1][RTW89_FCC][9] = 10, -- [1][1][2][1][RTW89_ETSI][9] = 42, -- [1][1][2][1][RTW89_KCC][9] = 28, -- [1][1][2][1][RTW89_FCC][13] = 10, -- [1][1][2][1][RTW89_ETSI][13] = 42, -- [1][1][2][1][RTW89_KCC][13] = 28, -- [1][1][2][1][RTW89_FCC][16] = 10, -- [1][1][2][1][RTW89_ETSI][16] = 42, -- [1][1][2][1][RTW89_KCC][16] = 28, -- [1][1][2][1][RTW89_FCC][20] = 10, -- [1][1][2][1][RTW89_ETSI][20] = 42, -- [1][1][2][1][RTW89_KCC][20] = 28, -- [1][1][2][1][RTW89_FCC][24] = 10, -- [1][1][2][1][RTW89_ETSI][24] = 42, -- [1][1][2][1][RTW89_KCC][24] = 28, -- [1][1][2][1][RTW89_FCC][28] = 10, -- [1][1][2][1][RTW89_ETSI][28] = 42, -- [1][1][2][1][RTW89_KCC][28] = 28, -- [1][1][2][1][RTW89_FCC][31] = 10, -- [1][1][2][1][RTW89_ETSI][31] = 42, -- [1][1][2][1][RTW89_KCC][31] = 28, -- [1][1][2][1][RTW89_FCC][35] = 10, -- [1][1][2][1][RTW89_ETSI][35] = 42, -- [1][1][2][1][RTW89_KCC][35] = 28, -- [1][1][2][1][RTW89_FCC][39] = 10, -- [1][1][2][1][RTW89_ETSI][39] = 42, -- [1][1][2][1][RTW89_KCC][39] = 28, -- [1][1][2][1][RTW89_FCC][43] = 10, -- [1][1][2][1][RTW89_ETSI][43] = 42, -- [1][1][2][1][RTW89_KCC][43] = 28, -- [1][1][2][1][RTW89_FCC][46] = 12, -- [1][1][2][1][RTW89_ETSI][46] = 127, -- [1][1][2][1][RTW89_KCC][46] = 28, -- [1][1][2][1][RTW89_FCC][50] = 12, -- [1][1][2][1][RTW89_ETSI][50] = 127, -- [1][1][2][1][RTW89_KCC][50] = 28, -- [1][1][2][1][RTW89_FCC][54] = 10, -- [1][1][2][1][RTW89_ETSI][54] = 127, -- [1][1][2][1][RTW89_KCC][54] = 28, -- [1][1][2][1][RTW89_FCC][58] = 10, -- [1][1][2][1][RTW89_ETSI][58] = 127, -- [1][1][2][1][RTW89_KCC][58] = 28, -- [1][1][2][1][RTW89_FCC][61] = 10, -- [1][1][2][1][RTW89_ETSI][61] = 127, -- [1][1][2][1][RTW89_KCC][61] = 28, -- [1][1][2][1][RTW89_FCC][65] = 10, -- [1][1][2][1][RTW89_ETSI][65] = 127, -- [1][1][2][1][RTW89_KCC][65] = 28, -- [1][1][2][1][RTW89_FCC][69] = 10, -- [1][1][2][1][RTW89_ETSI][69] = 127, -- [1][1][2][1][RTW89_KCC][69] = 28, -- [1][1][2][1][RTW89_FCC][73] = 10, -- [1][1][2][1][RTW89_ETSI][73] = 127, -- [1][1][2][1][RTW89_KCC][73] = 28, -- [1][1][2][1][RTW89_FCC][76] = 10, -- [1][1][2][1][RTW89_ETSI][76] = 127, -- [1][1][2][1][RTW89_KCC][76] = 28, -- [1][1][2][1][RTW89_FCC][80] = 10, -- [1][1][2][1][RTW89_ETSI][80] = 127, -- [1][1][2][1][RTW89_KCC][80] = 32, -- [1][1][2][1][RTW89_FCC][84] = 10, -- [1][1][2][1][RTW89_ETSI][84] = 127, -- [1][1][2][1][RTW89_KCC][84] = 32, -- [1][1][2][1][RTW89_FCC][88] = 10, -- [1][1][2][1][RTW89_ETSI][88] = 127, -- [1][1][2][1][RTW89_KCC][88] = 32, -- [1][1][2][1][RTW89_FCC][91] = 12, -- [1][1][2][1][RTW89_ETSI][91] = 127, -- [1][1][2][1][RTW89_KCC][91] = 32, -- [1][1][2][1][RTW89_FCC][95] = 10, -- [1][1][2][1][RTW89_ETSI][95] = 127, -- [1][1][2][1][RTW89_KCC][95] = 32, -- [1][1][2][1][RTW89_FCC][99] = 10, -- [1][1][2][1][RTW89_ETSI][99] = 127, -- [1][1][2][1][RTW89_KCC][99] = 32, -- [1][1][2][1][RTW89_FCC][103] = 10, -- [1][1][2][1][RTW89_ETSI][103] = 127, -- [1][1][2][1][RTW89_KCC][103] = 32, -- [1][1][2][1][RTW89_FCC][106] = 12, -- [1][1][2][1][RTW89_ETSI][106] = 127, -- [1][1][2][1][RTW89_KCC][106] = 32, -- [1][1][2][1][RTW89_FCC][110] = 127, -- [1][1][2][1][RTW89_ETSI][110] = 127, -- [1][1][2][1][RTW89_KCC][110] = 127, -- [1][1][2][1][RTW89_FCC][114] = 127, -- [1][1][2][1][RTW89_ETSI][114] = 127, -- [1][1][2][1][RTW89_KCC][114] = 127, -- [1][1][2][1][RTW89_FCC][118] = 127, -- [1][1][2][1][RTW89_ETSI][118] = 127, -- [1][1][2][1][RTW89_KCC][118] = 127, -- [2][0][2][0][RTW89_FCC][3] = 46, -- [2][0][2][0][RTW89_ETSI][3] = 48, -- [2][0][2][0][RTW89_KCC][3] = 50, -- [2][0][2][0][RTW89_FCC][11] = 46, -- [2][0][2][0][RTW89_ETSI][11] = 48, -- [2][0][2][0][RTW89_KCC][11] = 50, -- [2][0][2][0][RTW89_FCC][18] = 46, -- [2][0][2][0][RTW89_ETSI][18] = 48, -- [2][0][2][0][RTW89_KCC][18] = 50, -- [2][0][2][0][RTW89_FCC][26] = 46, -- [2][0][2][0][RTW89_ETSI][26] = 48, -- [2][0][2][0][RTW89_KCC][26] = 50, -- [2][0][2][0][RTW89_FCC][33] = 46, -- [2][0][2][0][RTW89_ETSI][33] = 48, -- [2][0][2][0][RTW89_KCC][33] = 50, -- [2][0][2][0][RTW89_FCC][41] = 46, -- [2][0][2][0][RTW89_ETSI][41] = 48, -- [2][0][2][0][RTW89_KCC][41] = 50, -- [2][0][2][0][RTW89_FCC][48] = 46, -- [2][0][2][0][RTW89_ETSI][48] = 127, -- [2][0][2][0][RTW89_KCC][48] = 48, -- [2][0][2][0][RTW89_FCC][56] = 46, -- [2][0][2][0][RTW89_ETSI][56] = 127, -- [2][0][2][0][RTW89_KCC][56] = 48, -- [2][0][2][0][RTW89_FCC][63] = 46, -- [2][0][2][0][RTW89_ETSI][63] = 127, -- [2][0][2][0][RTW89_KCC][63] = 48, -- [2][0][2][0][RTW89_FCC][71] = 46, -- [2][0][2][0][RTW89_ETSI][71] = 127, -- [2][0][2][0][RTW89_KCC][71] = 48, -- [2][0][2][0][RTW89_FCC][78] = 46, -- [2][0][2][0][RTW89_ETSI][78] = 127, -- [2][0][2][0][RTW89_KCC][78] = 52, -- [2][0][2][0][RTW89_FCC][86] = 46, -- [2][0][2][0][RTW89_ETSI][86] = 127, -- [2][0][2][0][RTW89_KCC][86] = 52, -- [2][0][2][0][RTW89_FCC][93] = 46, -- [2][0][2][0][RTW89_ETSI][93] = 127, -- [2][0][2][0][RTW89_KCC][93] = 50, -- [2][0][2][0][RTW89_FCC][101] = 44, -- [2][0][2][0][RTW89_ETSI][101] = 127, -- [2][0][2][0][RTW89_KCC][101] = 50, -- [2][0][2][0][RTW89_FCC][108] = 127, -- [2][0][2][0][RTW89_ETSI][108] = 127, -- [2][0][2][0][RTW89_KCC][108] = 127, -- [2][0][2][0][RTW89_FCC][116] = 127, -- [2][0][2][0][RTW89_ETSI][116] = 127, -- [2][0][2][0][RTW89_KCC][116] = 127, -- [2][1][2][0][RTW89_FCC][3] = 22, -- [2][1][2][0][RTW89_ETSI][3] = 48, -- [2][1][2][0][RTW89_KCC][3] = 38, -- [2][1][2][0][RTW89_FCC][11] = 20, -- [2][1][2][0][RTW89_ETSI][11] = 48, -- [2][1][2][0][RTW89_KCC][11] = 38, -- [2][1][2][0][RTW89_FCC][18] = 20, -- [2][1][2][0][RTW89_ETSI][18] = 48, -- [2][1][2][0][RTW89_KCC][18] = 38, -- [2][1][2][0][RTW89_FCC][26] = 20, -- [2][1][2][0][RTW89_ETSI][26] = 48, -- [2][1][2][0][RTW89_KCC][26] = 38, -- [2][1][2][0][RTW89_FCC][33] = 20, -- [2][1][2][0][RTW89_ETSI][33] = 48, -- [2][1][2][0][RTW89_KCC][33] = 38, -- [2][1][2][0][RTW89_FCC][41] = 22, -- [2][1][2][0][RTW89_ETSI][41] = 48, -- [2][1][2][0][RTW89_KCC][41] = 38, -- [2][1][2][0][RTW89_FCC][48] = 22, -- [2][1][2][0][RTW89_ETSI][48] = 127, -- [2][1][2][0][RTW89_KCC][48] = 38, -- [2][1][2][0][RTW89_FCC][56] = 20, -- [2][1][2][0][RTW89_ETSI][56] = 127, -- [2][1][2][0][RTW89_KCC][56] = 38, -- [2][1][2][0][RTW89_FCC][63] = 22, -- [2][1][2][0][RTW89_ETSI][63] = 127, -- [2][1][2][0][RTW89_KCC][63] = 38, -- [2][1][2][0][RTW89_FCC][71] = 20, -- [2][1][2][0][RTW89_ETSI][71] = 127, -- [2][1][2][0][RTW89_KCC][71] = 38, -- [2][1][2][0][RTW89_FCC][78] = 20, -- [2][1][2][0][RTW89_ETSI][78] = 127, -- [2][1][2][0][RTW89_KCC][78] = 38, -- [2][1][2][0][RTW89_FCC][86] = 20, -- [2][1][2][0][RTW89_ETSI][86] = 127, -- [2][1][2][0][RTW89_KCC][86] = 38, -- [2][1][2][0][RTW89_FCC][93] = 22, -- [2][1][2][0][RTW89_ETSI][93] = 127, -- [2][1][2][0][RTW89_KCC][93] = 38, -- [2][1][2][0][RTW89_FCC][101] = 22, -- [2][1][2][0][RTW89_ETSI][101] = 127, -- [2][1][2][0][RTW89_KCC][101] = 38, -- [2][1][2][0][RTW89_FCC][108] = 127, -- [2][1][2][0][RTW89_ETSI][108] = 127, -- [2][1][2][0][RTW89_KCC][108] = 127, -- [2][1][2][0][RTW89_FCC][116] = 127, -- [2][1][2][0][RTW89_ETSI][116] = 127, -- [2][1][2][0][RTW89_KCC][116] = 127, -- [2][1][2][1][RTW89_FCC][3] = 22, -- [2][1][2][1][RTW89_ETSI][3] = 42, -- [2][1][2][1][RTW89_KCC][3] = 38, -- [2][1][2][1][RTW89_FCC][11] = 20, -- [2][1][2][1][RTW89_ETSI][11] = 42, -- [2][1][2][1][RTW89_KCC][11] = 38, -- [2][1][2][1][RTW89_FCC][18] = 20, -- [2][1][2][1][RTW89_ETSI][18] = 42, -- [2][1][2][1][RTW89_KCC][18] = 38, -- [2][1][2][1][RTW89_FCC][26] = 20, -- [2][1][2][1][RTW89_ETSI][26] = 42, -- [2][1][2][1][RTW89_KCC][26] = 38, -- [2][1][2][1][RTW89_FCC][33] = 20, -- [2][1][2][1][RTW89_ETSI][33] = 42, -- [2][1][2][1][RTW89_KCC][33] = 38, -- [2][1][2][1][RTW89_FCC][41] = 22, -- [2][1][2][1][RTW89_ETSI][41] = 42, -- [2][1][2][1][RTW89_KCC][41] = 38, -- [2][1][2][1][RTW89_FCC][48] = 22, -- [2][1][2][1][RTW89_ETSI][48] = 127, -- [2][1][2][1][RTW89_KCC][48] = 38, -- [2][1][2][1][RTW89_FCC][56] = 20, -- [2][1][2][1][RTW89_ETSI][56] = 127, -- [2][1][2][1][RTW89_KCC][56] = 38, -- [2][1][2][1][RTW89_FCC][63] = 22, -- [2][1][2][1][RTW89_ETSI][63] = 127, -- [2][1][2][1][RTW89_KCC][63] = 38, -- [2][1][2][1][RTW89_FCC][71] = 20, -- [2][1][2][1][RTW89_ETSI][71] = 127, -- [2][1][2][1][RTW89_KCC][71] = 38, -- [2][1][2][1][RTW89_FCC][78] = 20, -- [2][1][2][1][RTW89_ETSI][78] = 127, -- [2][1][2][1][RTW89_KCC][78] = 38, -- [2][1][2][1][RTW89_FCC][86] = 20, -- [2][1][2][1][RTW89_ETSI][86] = 127, -- [2][1][2][1][RTW89_KCC][86] = 38, -- [2][1][2][1][RTW89_FCC][93] = 22, -- [2][1][2][1][RTW89_ETSI][93] = 127, -- [2][1][2][1][RTW89_KCC][93] = 38, -- [2][1][2][1][RTW89_FCC][101] = 22, -- [2][1][2][1][RTW89_ETSI][101] = 127, -- [2][1][2][1][RTW89_KCC][101] = 38, -- [2][1][2][1][RTW89_FCC][108] = 127, -- [2][1][2][1][RTW89_ETSI][108] = 127, -- [2][1][2][1][RTW89_KCC][108] = 127, -- [2][1][2][1][RTW89_FCC][116] = 127, -- [2][1][2][1][RTW89_ETSI][116] = 127, -- [2][1][2][1][RTW89_KCC][116] = 127, -- [3][0][2][0][RTW89_FCC][7] = 52, -- [3][0][2][0][RTW89_ETSI][7] = 38, -- [3][0][2][0][RTW89_KCC][7] = 42, -- [3][0][2][0][RTW89_FCC][22] = 52, -- [3][0][2][0][RTW89_ETSI][22] = 38, -- [3][0][2][0][RTW89_KCC][22] = 42, -- [3][0][2][0][RTW89_FCC][37] = 52, -- [3][0][2][0][RTW89_ETSI][37] = 38, -- [3][0][2][0][RTW89_KCC][37] = 42, -- [3][0][2][0][RTW89_FCC][52] = 54, -- [3][0][2][0][RTW89_ETSI][52] = 127, -- [3][0][2][0][RTW89_KCC][52] = 56, -- [3][0][2][0][RTW89_FCC][67] = 54, -- [3][0][2][0][RTW89_ETSI][67] = 127, -- [3][0][2][0][RTW89_KCC][67] = 54, -- [3][0][2][0][RTW89_FCC][82] = 54, -- [3][0][2][0][RTW89_ETSI][82] = 127, -- [3][0][2][0][RTW89_KCC][82] = 26, -- [3][0][2][0][RTW89_FCC][97] = 40, -- [3][0][2][0][RTW89_ETSI][97] = 127, -- [3][0][2][0][RTW89_KCC][97] = 26, -- [3][0][2][0][RTW89_FCC][112] = 127, -- [3][0][2][0][RTW89_ETSI][112] = 127, -- [3][0][2][0][RTW89_KCC][112] = 127, -- [3][1][2][0][RTW89_FCC][7] = 32, -- [3][1][2][0][RTW89_ETSI][7] = 38, -- [3][1][2][0][RTW89_KCC][7] = 40, -- [3][1][2][0][RTW89_FCC][22] = 30, -- [3][1][2][0][RTW89_ETSI][22] = 38, -- [3][1][2][0][RTW89_KCC][22] = 40, -- [3][1][2][0][RTW89_FCC][37] = 30, -- [3][1][2][0][RTW89_ETSI][37] = 38, -- [3][1][2][0][RTW89_KCC][37] = 40, -- [3][1][2][0][RTW89_FCC][52] = 30, -- [3][1][2][0][RTW89_ETSI][52] = 127, -- [3][1][2][0][RTW89_KCC][52] = 48, -- [3][1][2][0][RTW89_FCC][67] = 32, -- [3][1][2][0][RTW89_ETSI][67] = 127, -- [3][1][2][0][RTW89_KCC][67] = 48, -- [3][1][2][0][RTW89_FCC][82] = 32, -- [3][1][2][0][RTW89_ETSI][82] = 127, -- [3][1][2][0][RTW89_KCC][82] = 24, -- [3][1][2][0][RTW89_FCC][97] = 14, -- [3][1][2][0][RTW89_ETSI][97] = 127, -- [3][1][2][0][RTW89_KCC][97] = 24, -- [3][1][2][0][RTW89_FCC][112] = 127, -- [3][1][2][0][RTW89_ETSI][112] = 127, -- [3][1][2][0][RTW89_KCC][112] = 127, -- [3][1][2][1][RTW89_FCC][7] = 32, -- [3][1][2][1][RTW89_ETSI][7] = 38, -- [3][1][2][1][RTW89_KCC][7] = 40, -- [3][1][2][1][RTW89_FCC][22] = 30, -- [3][1][2][1][RTW89_ETSI][22] = 38, -- [3][1][2][1][RTW89_KCC][22] = 40, -- [3][1][2][1][RTW89_FCC][37] = 30, -- [3][1][2][1][RTW89_ETSI][37] = 38, -- [3][1][2][1][RTW89_KCC][37] = 40, -- [3][1][2][1][RTW89_FCC][52] = 30, -- [3][1][2][1][RTW89_ETSI][52] = 127, -- [3][1][2][1][RTW89_KCC][52] = 48, -- [3][1][2][1][RTW89_FCC][67] = 32, -- [3][1][2][1][RTW89_ETSI][67] = 127, -- [3][1][2][1][RTW89_KCC][67] = 48, -- [3][1][2][1][RTW89_FCC][82] = 32, -- [3][1][2][1][RTW89_ETSI][82] = 127, -- [3][1][2][1][RTW89_KCC][82] = 24, -- [3][1][2][1][RTW89_FCC][97] = 14, -- [3][1][2][1][RTW89_ETSI][97] = 127, -- [3][1][2][1][RTW89_KCC][97] = 24, -- [3][1][2][1][RTW89_FCC][112] = 127, -- [3][1][2][1][RTW89_ETSI][112] = 127, -- [3][1][2][1][RTW89_KCC][112] = 127, -+ [RTW89_REGD_NUM][NUM_OF_RTW89_REG_6GHZ_POWER] -+ [RTW89_6G_CH_NUM] = { -+ [0][0][1][0][RTW89_WW][0][0] = 24, -+ [0][0][1][0][RTW89_WW][1][0] = 24, -+ [0][0][1][0][RTW89_WW][2][0] = 56, -+ [0][0][1][0][RTW89_WW][0][2] = 22, -+ [0][0][1][0][RTW89_WW][1][2] = 22, -+ [0][0][1][0][RTW89_WW][2][2] = 56, -+ [0][0][1][0][RTW89_WW][0][4] = 22, -+ [0][0][1][0][RTW89_WW][1][4] = 22, -+ [0][0][1][0][RTW89_WW][2][4] = 56, -+ [0][0][1][0][RTW89_WW][0][6] = 22, -+ [0][0][1][0][RTW89_WW][1][6] = 22, -+ [0][0][1][0][RTW89_WW][2][6] = 56, -+ [0][0][1][0][RTW89_WW][0][8] = 22, -+ [0][0][1][0][RTW89_WW][1][8] = 22, -+ [0][0][1][0][RTW89_WW][2][8] = 56, -+ [0][0][1][0][RTW89_WW][0][10] = 22, -+ [0][0][1][0][RTW89_WW][1][10] = 22, -+ [0][0][1][0][RTW89_WW][2][10] = 56, -+ [0][0][1][0][RTW89_WW][0][12] = 22, -+ [0][0][1][0][RTW89_WW][1][12] = 22, -+ [0][0][1][0][RTW89_WW][2][12] = 56, -+ [0][0][1][0][RTW89_WW][0][14] = 22, -+ [0][0][1][0][RTW89_WW][1][14] = 22, -+ [0][0][1][0][RTW89_WW][2][14] = 56, -+ [0][0][1][0][RTW89_WW][0][15] = 22, -+ [0][0][1][0][RTW89_WW][1][15] = 22, -+ [0][0][1][0][RTW89_WW][2][15] = 56, -+ [0][0][1][0][RTW89_WW][0][17] = 22, -+ [0][0][1][0][RTW89_WW][1][17] = 22, -+ [0][0][1][0][RTW89_WW][2][17] = 56, -+ [0][0][1][0][RTW89_WW][0][19] = 22, -+ [0][0][1][0][RTW89_WW][1][19] = 22, -+ [0][0][1][0][RTW89_WW][2][19] = 56, -+ [0][0][1][0][RTW89_WW][0][21] = 22, -+ [0][0][1][0][RTW89_WW][1][21] = 22, -+ [0][0][1][0][RTW89_WW][2][21] = 56, -+ [0][0][1][0][RTW89_WW][0][23] = 22, -+ [0][0][1][0][RTW89_WW][1][23] = 22, -+ [0][0][1][0][RTW89_WW][2][23] = 70, -+ [0][0][1][0][RTW89_WW][0][25] = 22, -+ [0][0][1][0][RTW89_WW][1][25] = 22, -+ [0][0][1][0][RTW89_WW][2][25] = 70, -+ [0][0][1][0][RTW89_WW][0][27] = 22, -+ [0][0][1][0][RTW89_WW][1][27] = 22, -+ [0][0][1][0][RTW89_WW][2][27] = 70, -+ [0][0][1][0][RTW89_WW][0][29] = 22, -+ [0][0][1][0][RTW89_WW][1][29] = 22, -+ [0][0][1][0][RTW89_WW][2][29] = 70, -+ [0][0][1][0][RTW89_WW][0][30] = 22, -+ [0][0][1][0][RTW89_WW][1][30] = 22, -+ [0][0][1][0][RTW89_WW][2][30] = 70, -+ [0][0][1][0][RTW89_WW][0][32] = 22, -+ [0][0][1][0][RTW89_WW][1][32] = 22, -+ [0][0][1][0][RTW89_WW][2][32] = 70, -+ [0][0][1][0][RTW89_WW][0][34] = 22, -+ [0][0][1][0][RTW89_WW][1][34] = 22, -+ [0][0][1][0][RTW89_WW][2][34] = 70, -+ [0][0][1][0][RTW89_WW][0][36] = 22, -+ [0][0][1][0][RTW89_WW][1][36] = 22, -+ [0][0][1][0][RTW89_WW][2][36] = 70, -+ [0][0][1][0][RTW89_WW][0][38] = 22, -+ [0][0][1][0][RTW89_WW][1][38] = 22, -+ [0][0][1][0][RTW89_WW][2][38] = 70, -+ [0][0][1][0][RTW89_WW][0][40] = 22, -+ [0][0][1][0][RTW89_WW][1][40] = 22, -+ [0][0][1][0][RTW89_WW][2][40] = 70, -+ [0][0][1][0][RTW89_WW][0][42] = 22, -+ [0][0][1][0][RTW89_WW][1][42] = 22, -+ [0][0][1][0][RTW89_WW][2][42] = 70, -+ [0][0][1][0][RTW89_WW][0][44] = 22, -+ [0][0][1][0][RTW89_WW][1][44] = 22, -+ [0][0][1][0][RTW89_WW][2][44] = 70, -+ [0][0][1][0][RTW89_WW][0][45] = 22, -+ [0][0][1][0][RTW89_WW][1][45] = 22, -+ [0][0][1][0][RTW89_WW][2][45] = 0, -+ [0][0][1][0][RTW89_WW][0][47] = 22, -+ [0][0][1][0][RTW89_WW][1][47] = 22, -+ [0][0][1][0][RTW89_WW][2][47] = 0, -+ [0][0][1][0][RTW89_WW][0][49] = 24, -+ [0][0][1][0][RTW89_WW][1][49] = 24, -+ [0][0][1][0][RTW89_WW][2][49] = 0, -+ [0][0][1][0][RTW89_WW][0][51] = 22, -+ [0][0][1][0][RTW89_WW][1][51] = 22, -+ [0][0][1][0][RTW89_WW][2][51] = 0, -+ [0][0][1][0][RTW89_WW][0][53] = 22, -+ [0][0][1][0][RTW89_WW][1][53] = 22, -+ [0][0][1][0][RTW89_WW][2][53] = 0, -+ [0][0][1][0][RTW89_WW][0][55] = 22, -+ [0][0][1][0][RTW89_WW][1][55] = 22, -+ [0][0][1][0][RTW89_WW][2][55] = 68, -+ [0][0][1][0][RTW89_WW][0][57] = 22, -+ [0][0][1][0][RTW89_WW][1][57] = 22, -+ [0][0][1][0][RTW89_WW][2][57] = 68, -+ [0][0][1][0][RTW89_WW][0][59] = 22, -+ [0][0][1][0][RTW89_WW][1][59] = 22, -+ [0][0][1][0][RTW89_WW][2][59] = 68, -+ [0][0][1][0][RTW89_WW][0][60] = 22, -+ [0][0][1][0][RTW89_WW][1][60] = 22, -+ [0][0][1][0][RTW89_WW][2][60] = 68, -+ [0][0][1][0][RTW89_WW][0][62] = 22, -+ [0][0][1][0][RTW89_WW][1][62] = 22, -+ [0][0][1][0][RTW89_WW][2][62] = 68, -+ [0][0][1][0][RTW89_WW][0][64] = 22, -+ [0][0][1][0][RTW89_WW][1][64] = 22, -+ [0][0][1][0][RTW89_WW][2][64] = 68, -+ [0][0][1][0][RTW89_WW][0][66] = 22, -+ [0][0][1][0][RTW89_WW][1][66] = 22, -+ [0][0][1][0][RTW89_WW][2][66] = 68, -+ [0][0][1][0][RTW89_WW][0][68] = 22, -+ [0][0][1][0][RTW89_WW][1][68] = 22, -+ [0][0][1][0][RTW89_WW][2][68] = 68, -+ [0][0][1][0][RTW89_WW][0][70] = 24, -+ [0][0][1][0][RTW89_WW][1][70] = 24, -+ [0][0][1][0][RTW89_WW][2][70] = 68, -+ [0][0][1][0][RTW89_WW][0][72] = 22, -+ [0][0][1][0][RTW89_WW][1][72] = 22, -+ [0][0][1][0][RTW89_WW][2][72] = 68, -+ [0][0][1][0][RTW89_WW][0][74] = 22, -+ [0][0][1][0][RTW89_WW][1][74] = 22, -+ [0][0][1][0][RTW89_WW][2][74] = 68, -+ [0][0][1][0][RTW89_WW][0][75] = 22, -+ [0][0][1][0][RTW89_WW][1][75] = 22, -+ [0][0][1][0][RTW89_WW][2][75] = 68, -+ [0][0][1][0][RTW89_WW][0][77] = 22, -+ [0][0][1][0][RTW89_WW][1][77] = 22, -+ [0][0][1][0][RTW89_WW][2][77] = 68, -+ [0][0][1][0][RTW89_WW][0][79] = 22, -+ [0][0][1][0][RTW89_WW][1][79] = 22, -+ [0][0][1][0][RTW89_WW][2][79] = 68, -+ [0][0][1][0][RTW89_WW][0][81] = 22, -+ [0][0][1][0][RTW89_WW][1][81] = 22, -+ [0][0][1][0][RTW89_WW][2][81] = 68, -+ [0][0][1][0][RTW89_WW][0][83] = 22, -+ [0][0][1][0][RTW89_WW][1][83] = 22, -+ [0][0][1][0][RTW89_WW][2][83] = 68, -+ [0][0][1][0][RTW89_WW][0][85] = 22, -+ [0][0][1][0][RTW89_WW][1][85] = 22, -+ [0][0][1][0][RTW89_WW][2][85] = 68, -+ [0][0][1][0][RTW89_WW][0][87] = 22, -+ [0][0][1][0][RTW89_WW][1][87] = 22, -+ [0][0][1][0][RTW89_WW][2][87] = 0, -+ [0][0][1][0][RTW89_WW][0][89] = 22, -+ [0][0][1][0][RTW89_WW][1][89] = 22, -+ [0][0][1][0][RTW89_WW][2][89] = 0, -+ [0][0][1][0][RTW89_WW][0][90] = 22, -+ [0][0][1][0][RTW89_WW][1][90] = 22, -+ [0][0][1][0][RTW89_WW][2][90] = 0, -+ [0][0][1][0][RTW89_WW][0][92] = 22, -+ [0][0][1][0][RTW89_WW][1][92] = 22, -+ [0][0][1][0][RTW89_WW][2][92] = 0, -+ [0][0][1][0][RTW89_WW][0][94] = 22, -+ [0][0][1][0][RTW89_WW][1][94] = 22, -+ [0][0][1][0][RTW89_WW][2][94] = 0, -+ [0][0][1][0][RTW89_WW][0][96] = 22, -+ [0][0][1][0][RTW89_WW][1][96] = 22, -+ [0][0][1][0][RTW89_WW][2][96] = 0, -+ [0][0][1][0][RTW89_WW][0][98] = 22, -+ [0][0][1][0][RTW89_WW][1][98] = 22, -+ [0][0][1][0][RTW89_WW][2][98] = 0, -+ [0][0][1][0][RTW89_WW][0][100] = 22, -+ [0][0][1][0][RTW89_WW][1][100] = 22, -+ [0][0][1][0][RTW89_WW][2][100] = 0, -+ [0][0][1][0][RTW89_WW][0][102] = 22, -+ [0][0][1][0][RTW89_WW][1][102] = 22, -+ [0][0][1][0][RTW89_WW][2][102] = 0, -+ [0][0][1][0][RTW89_WW][0][104] = 22, -+ [0][0][1][0][RTW89_WW][1][104] = 22, -+ [0][0][1][0][RTW89_WW][2][104] = 0, -+ [0][0][1][0][RTW89_WW][0][105] = 22, -+ [0][0][1][0][RTW89_WW][1][105] = 22, -+ [0][0][1][0][RTW89_WW][2][105] = 0, -+ [0][0][1][0][RTW89_WW][0][107] = 24, -+ [0][0][1][0][RTW89_WW][1][107] = 24, -+ [0][0][1][0][RTW89_WW][2][107] = 0, -+ [0][0][1][0][RTW89_WW][0][109] = 24, -+ [0][0][1][0][RTW89_WW][1][109] = 24, -+ [0][0][1][0][RTW89_WW][2][109] = 0, -+ [0][0][1][0][RTW89_WW][0][111] = 0, -+ [0][0][1][0][RTW89_WW][1][111] = 0, -+ [0][0][1][0][RTW89_WW][2][111] = 0, -+ [0][0][1][0][RTW89_WW][0][113] = 0, -+ [0][0][1][0][RTW89_WW][1][113] = 0, -+ [0][0][1][0][RTW89_WW][2][113] = 0, -+ [0][0][1][0][RTW89_WW][0][115] = 0, -+ [0][0][1][0][RTW89_WW][1][115] = 0, -+ [0][0][1][0][RTW89_WW][2][115] = 0, -+ [0][0][1][0][RTW89_WW][0][117] = 0, -+ [0][0][1][0][RTW89_WW][1][117] = 0, -+ [0][0][1][0][RTW89_WW][2][117] = 0, -+ [0][0][1][0][RTW89_WW][0][119] = 0, -+ [0][0][1][0][RTW89_WW][1][119] = 0, -+ [0][0][1][0][RTW89_WW][2][119] = 0, -+ [0][1][1][0][RTW89_WW][0][0] = -2, -+ [0][1][1][0][RTW89_WW][1][0] = -2, -+ [0][1][1][0][RTW89_WW][2][0] = 54, -+ [0][1][1][0][RTW89_WW][0][2] = -4, -+ [0][1][1][0][RTW89_WW][1][2] = -4, -+ [0][1][1][0][RTW89_WW][2][2] = 54, -+ [0][1][1][0][RTW89_WW][0][4] = -4, -+ [0][1][1][0][RTW89_WW][1][4] = -4, -+ [0][1][1][0][RTW89_WW][2][4] = 54, -+ [0][1][1][0][RTW89_WW][0][6] = -4, -+ [0][1][1][0][RTW89_WW][1][6] = -4, -+ [0][1][1][0][RTW89_WW][2][6] = 54, -+ [0][1][1][0][RTW89_WW][0][8] = -4, -+ [0][1][1][0][RTW89_WW][1][8] = -4, -+ [0][1][1][0][RTW89_WW][2][8] = 54, -+ [0][1][1][0][RTW89_WW][0][10] = -4, -+ [0][1][1][0][RTW89_WW][1][10] = -4, -+ [0][1][1][0][RTW89_WW][2][10] = 54, -+ [0][1][1][0][RTW89_WW][0][12] = -4, -+ [0][1][1][0][RTW89_WW][1][12] = -4, -+ [0][1][1][0][RTW89_WW][2][12] = 54, -+ [0][1][1][0][RTW89_WW][0][14] = -4, -+ [0][1][1][0][RTW89_WW][1][14] = -4, -+ [0][1][1][0][RTW89_WW][2][14] = 54, -+ [0][1][1][0][RTW89_WW][0][15] = -4, -+ [0][1][1][0][RTW89_WW][1][15] = -4, -+ [0][1][1][0][RTW89_WW][2][15] = 54, -+ [0][1][1][0][RTW89_WW][0][17] = -4, -+ [0][1][1][0][RTW89_WW][1][17] = -4, -+ [0][1][1][0][RTW89_WW][2][17] = 54, -+ [0][1][1][0][RTW89_WW][0][19] = -4, -+ [0][1][1][0][RTW89_WW][1][19] = -4, -+ [0][1][1][0][RTW89_WW][2][19] = 54, -+ [0][1][1][0][RTW89_WW][0][21] = -4, -+ [0][1][1][0][RTW89_WW][1][21] = -4, -+ [0][1][1][0][RTW89_WW][2][21] = 54, -+ [0][1][1][0][RTW89_WW][0][23] = -4, -+ [0][1][1][0][RTW89_WW][1][23] = -4, -+ [0][1][1][0][RTW89_WW][2][23] = 68, -+ [0][1][1][0][RTW89_WW][0][25] = -4, -+ [0][1][1][0][RTW89_WW][1][25] = -4, -+ [0][1][1][0][RTW89_WW][2][25] = 68, -+ [0][1][1][0][RTW89_WW][0][27] = -4, -+ [0][1][1][0][RTW89_WW][1][27] = -4, -+ [0][1][1][0][RTW89_WW][2][27] = 68, -+ [0][1][1][0][RTW89_WW][0][29] = -4, -+ [0][1][1][0][RTW89_WW][1][29] = -4, -+ [0][1][1][0][RTW89_WW][2][29] = 68, -+ [0][1][1][0][RTW89_WW][0][30] = -4, -+ [0][1][1][0][RTW89_WW][1][30] = -4, -+ [0][1][1][0][RTW89_WW][2][30] = 68, -+ [0][1][1][0][RTW89_WW][0][32] = -4, -+ [0][1][1][0][RTW89_WW][1][32] = -4, -+ [0][1][1][0][RTW89_WW][2][32] = 68, -+ [0][1][1][0][RTW89_WW][0][34] = -4, -+ [0][1][1][0][RTW89_WW][1][34] = -4, -+ [0][1][1][0][RTW89_WW][2][34] = 68, -+ [0][1][1][0][RTW89_WW][0][36] = -4, -+ [0][1][1][0][RTW89_WW][1][36] = -4, -+ [0][1][1][0][RTW89_WW][2][36] = 68, -+ [0][1][1][0][RTW89_WW][0][38] = -4, -+ [0][1][1][0][RTW89_WW][1][38] = -4, -+ [0][1][1][0][RTW89_WW][2][38] = 68, -+ [0][1][1][0][RTW89_WW][0][40] = -4, -+ [0][1][1][0][RTW89_WW][1][40] = -4, -+ [0][1][1][0][RTW89_WW][2][40] = 68, -+ [0][1][1][0][RTW89_WW][0][42] = -4, -+ [0][1][1][0][RTW89_WW][1][42] = -4, -+ [0][1][1][0][RTW89_WW][2][42] = 68, -+ [0][1][1][0][RTW89_WW][0][44] = -2, -+ [0][1][1][0][RTW89_WW][1][44] = -2, -+ [0][1][1][0][RTW89_WW][2][44] = 68, -+ [0][1][1][0][RTW89_WW][0][45] = -2, -+ [0][1][1][0][RTW89_WW][1][45] = -2, -+ [0][1][1][0][RTW89_WW][2][45] = 0, -+ [0][1][1][0][RTW89_WW][0][47] = -2, -+ [0][1][1][0][RTW89_WW][1][47] = -2, -+ [0][1][1][0][RTW89_WW][2][47] = 0, -+ [0][1][1][0][RTW89_WW][0][49] = -2, -+ [0][1][1][0][RTW89_WW][1][49] = -2, -+ [0][1][1][0][RTW89_WW][2][49] = 0, -+ [0][1][1][0][RTW89_WW][0][51] = -2, -+ [0][1][1][0][RTW89_WW][1][51] = -2, -+ [0][1][1][0][RTW89_WW][2][51] = 0, -+ [0][1][1][0][RTW89_WW][0][53] = -2, -+ [0][1][1][0][RTW89_WW][1][53] = -2, -+ [0][1][1][0][RTW89_WW][2][53] = 0, -+ [0][1][1][0][RTW89_WW][0][55] = -2, -+ [0][1][1][0][RTW89_WW][1][55] = -2, -+ [0][1][1][0][RTW89_WW][2][55] = 68, -+ [0][1][1][0][RTW89_WW][0][57] = -2, -+ [0][1][1][0][RTW89_WW][1][57] = -2, -+ [0][1][1][0][RTW89_WW][2][57] = 68, -+ [0][1][1][0][RTW89_WW][0][59] = -2, -+ [0][1][1][0][RTW89_WW][1][59] = -2, -+ [0][1][1][0][RTW89_WW][2][59] = 68, -+ [0][1][1][0][RTW89_WW][0][60] = -2, -+ [0][1][1][0][RTW89_WW][1][60] = -2, -+ [0][1][1][0][RTW89_WW][2][60] = 68, -+ [0][1][1][0][RTW89_WW][0][62] = -2, -+ [0][1][1][0][RTW89_WW][1][62] = -2, -+ [0][1][1][0][RTW89_WW][2][62] = 68, -+ [0][1][1][0][RTW89_WW][0][64] = -2, -+ [0][1][1][0][RTW89_WW][1][64] = -2, -+ [0][1][1][0][RTW89_WW][2][64] = 68, -+ [0][1][1][0][RTW89_WW][0][66] = -2, -+ [0][1][1][0][RTW89_WW][1][66] = -2, -+ [0][1][1][0][RTW89_WW][2][66] = 68, -+ [0][1][1][0][RTW89_WW][0][68] = -2, -+ [0][1][1][0][RTW89_WW][1][68] = -2, -+ [0][1][1][0][RTW89_WW][2][68] = 68, -+ [0][1][1][0][RTW89_WW][0][70] = -2, -+ [0][1][1][0][RTW89_WW][1][70] = -2, -+ [0][1][1][0][RTW89_WW][2][70] = 68, -+ [0][1][1][0][RTW89_WW][0][72] = -2, -+ [0][1][1][0][RTW89_WW][1][72] = -2, -+ [0][1][1][0][RTW89_WW][2][72] = 68, -+ [0][1][1][0][RTW89_WW][0][74] = -2, -+ [0][1][1][0][RTW89_WW][1][74] = -2, -+ [0][1][1][0][RTW89_WW][2][74] = 68, -+ [0][1][1][0][RTW89_WW][0][75] = -2, -+ [0][1][1][0][RTW89_WW][1][75] = -2, -+ [0][1][1][0][RTW89_WW][2][75] = 68, -+ [0][1][1][0][RTW89_WW][0][77] = -2, -+ [0][1][1][0][RTW89_WW][1][77] = -2, -+ [0][1][1][0][RTW89_WW][2][77] = 68, -+ [0][1][1][0][RTW89_WW][0][79] = -2, -+ [0][1][1][0][RTW89_WW][1][79] = -2, -+ [0][1][1][0][RTW89_WW][2][79] = 68, -+ [0][1][1][0][RTW89_WW][0][81] = -2, -+ [0][1][1][0][RTW89_WW][1][81] = -2, -+ [0][1][1][0][RTW89_WW][2][81] = 68, -+ [0][1][1][0][RTW89_WW][0][83] = -2, -+ [0][1][1][0][RTW89_WW][1][83] = -2, -+ [0][1][1][0][RTW89_WW][2][83] = 68, -+ [0][1][1][0][RTW89_WW][0][85] = -2, -+ [0][1][1][0][RTW89_WW][1][85] = -2, -+ [0][1][1][0][RTW89_WW][2][85] = 68, -+ [0][1][1][0][RTW89_WW][0][87] = -2, -+ [0][1][1][0][RTW89_WW][1][87] = -2, -+ [0][1][1][0][RTW89_WW][2][87] = 0, -+ [0][1][1][0][RTW89_WW][0][89] = -2, -+ [0][1][1][0][RTW89_WW][1][89] = -2, -+ [0][1][1][0][RTW89_WW][2][89] = 0, -+ [0][1][1][0][RTW89_WW][0][90] = -2, -+ [0][1][1][0][RTW89_WW][1][90] = -2, -+ [0][1][1][0][RTW89_WW][2][90] = 0, -+ [0][1][1][0][RTW89_WW][0][92] = -2, -+ [0][1][1][0][RTW89_WW][1][92] = -2, -+ [0][1][1][0][RTW89_WW][2][92] = 0, -+ [0][1][1][0][RTW89_WW][0][94] = -2, -+ [0][1][1][0][RTW89_WW][1][94] = -2, -+ [0][1][1][0][RTW89_WW][2][94] = 0, -+ [0][1][1][0][RTW89_WW][0][96] = -2, -+ [0][1][1][0][RTW89_WW][1][96] = -2, -+ [0][1][1][0][RTW89_WW][2][96] = 0, -+ [0][1][1][0][RTW89_WW][0][98] = -2, -+ [0][1][1][0][RTW89_WW][1][98] = -2, -+ [0][1][1][0][RTW89_WW][2][98] = 0, -+ [0][1][1][0][RTW89_WW][0][100] = -2, -+ [0][1][1][0][RTW89_WW][1][100] = -2, -+ [0][1][1][0][RTW89_WW][2][100] = 0, -+ [0][1][1][0][RTW89_WW][0][102] = -2, -+ [0][1][1][0][RTW89_WW][1][102] = -2, -+ [0][1][1][0][RTW89_WW][2][102] = 0, -+ [0][1][1][0][RTW89_WW][0][104] = -2, -+ [0][1][1][0][RTW89_WW][1][104] = -2, -+ [0][1][1][0][RTW89_WW][2][104] = 0, -+ [0][1][1][0][RTW89_WW][0][105] = -2, -+ [0][1][1][0][RTW89_WW][1][105] = -2, -+ [0][1][1][0][RTW89_WW][2][105] = 0, -+ [0][1][1][0][RTW89_WW][0][107] = 1, -+ [0][1][1][0][RTW89_WW][1][107] = 1, -+ [0][1][1][0][RTW89_WW][2][107] = 0, -+ [0][1][1][0][RTW89_WW][0][109] = 1, -+ [0][1][1][0][RTW89_WW][1][109] = 1, -+ [0][1][1][0][RTW89_WW][2][109] = 0, -+ [0][1][1][0][RTW89_WW][0][111] = 0, -+ [0][1][1][0][RTW89_WW][1][111] = 0, -+ [0][1][1][0][RTW89_WW][2][111] = 0, -+ [0][1][1][0][RTW89_WW][0][113] = 0, -+ [0][1][1][0][RTW89_WW][1][113] = 0, -+ [0][1][1][0][RTW89_WW][2][113] = 0, -+ [0][1][1][0][RTW89_WW][0][115] = 0, -+ [0][1][1][0][RTW89_WW][1][115] = 0, -+ [0][1][1][0][RTW89_WW][2][115] = 0, -+ [0][1][1][0][RTW89_WW][0][117] = 0, -+ [0][1][1][0][RTW89_WW][1][117] = 0, -+ [0][1][1][0][RTW89_WW][2][117] = 0, -+ [0][1][1][0][RTW89_WW][0][119] = 0, -+ [0][1][1][0][RTW89_WW][1][119] = 0, -+ [0][1][1][0][RTW89_WW][2][119] = 0, -+ [0][0][2][0][RTW89_WW][0][0] = 24, -+ [0][0][2][0][RTW89_WW][1][0] = 24, -+ [0][0][2][0][RTW89_WW][2][0] = 56, -+ [0][0][2][0][RTW89_WW][0][2] = 22, -+ [0][0][2][0][RTW89_WW][1][2] = 22, -+ [0][0][2][0][RTW89_WW][2][2] = 56, -+ [0][0][2][0][RTW89_WW][0][4] = 22, -+ [0][0][2][0][RTW89_WW][1][4] = 22, -+ [0][0][2][0][RTW89_WW][2][4] = 56, -+ [0][0][2][0][RTW89_WW][0][6] = 22, -+ [0][0][2][0][RTW89_WW][1][6] = 22, -+ [0][0][2][0][RTW89_WW][2][6] = 56, -+ [0][0][2][0][RTW89_WW][0][8] = 22, -+ [0][0][2][0][RTW89_WW][1][8] = 22, -+ [0][0][2][0][RTW89_WW][2][8] = 56, -+ [0][0][2][0][RTW89_WW][0][10] = 22, -+ [0][0][2][0][RTW89_WW][1][10] = 22, -+ [0][0][2][0][RTW89_WW][2][10] = 56, -+ [0][0][2][0][RTW89_WW][0][12] = 22, -+ [0][0][2][0][RTW89_WW][1][12] = 22, -+ [0][0][2][0][RTW89_WW][2][12] = 56, -+ [0][0][2][0][RTW89_WW][0][14] = 22, -+ [0][0][2][0][RTW89_WW][1][14] = 22, -+ [0][0][2][0][RTW89_WW][2][14] = 56, -+ [0][0][2][0][RTW89_WW][0][15] = 22, -+ [0][0][2][0][RTW89_WW][1][15] = 22, -+ [0][0][2][0][RTW89_WW][2][15] = 56, -+ [0][0][2][0][RTW89_WW][0][17] = 22, -+ [0][0][2][0][RTW89_WW][1][17] = 22, -+ [0][0][2][0][RTW89_WW][2][17] = 56, -+ [0][0][2][0][RTW89_WW][0][19] = 22, -+ [0][0][2][0][RTW89_WW][1][19] = 22, -+ [0][0][2][0][RTW89_WW][2][19] = 56, -+ [0][0][2][0][RTW89_WW][0][21] = 22, -+ [0][0][2][0][RTW89_WW][1][21] = 22, -+ [0][0][2][0][RTW89_WW][2][21] = 56, -+ [0][0][2][0][RTW89_WW][0][23] = 22, -+ [0][0][2][0][RTW89_WW][1][23] = 22, -+ [0][0][2][0][RTW89_WW][2][23] = 70, -+ [0][0][2][0][RTW89_WW][0][25] = 22, -+ [0][0][2][0][RTW89_WW][1][25] = 22, -+ [0][0][2][0][RTW89_WW][2][25] = 70, -+ [0][0][2][0][RTW89_WW][0][27] = 22, -+ [0][0][2][0][RTW89_WW][1][27] = 22, -+ [0][0][2][0][RTW89_WW][2][27] = 70, -+ [0][0][2][0][RTW89_WW][0][29] = 22, -+ [0][0][2][0][RTW89_WW][1][29] = 22, -+ [0][0][2][0][RTW89_WW][2][29] = 70, -+ [0][0][2][0][RTW89_WW][0][30] = 22, -+ [0][0][2][0][RTW89_WW][1][30] = 22, -+ [0][0][2][0][RTW89_WW][2][30] = 70, -+ [0][0][2][0][RTW89_WW][0][32] = 22, -+ [0][0][2][0][RTW89_WW][1][32] = 22, -+ [0][0][2][0][RTW89_WW][2][32] = 70, -+ [0][0][2][0][RTW89_WW][0][34] = 22, -+ [0][0][2][0][RTW89_WW][1][34] = 22, -+ [0][0][2][0][RTW89_WW][2][34] = 70, -+ [0][0][2][0][RTW89_WW][0][36] = 22, -+ [0][0][2][0][RTW89_WW][1][36] = 22, -+ [0][0][2][0][RTW89_WW][2][36] = 70, -+ [0][0][2][0][RTW89_WW][0][38] = 22, -+ [0][0][2][0][RTW89_WW][1][38] = 22, -+ [0][0][2][0][RTW89_WW][2][38] = 70, -+ [0][0][2][0][RTW89_WW][0][40] = 22, -+ [0][0][2][0][RTW89_WW][1][40] = 22, -+ [0][0][2][0][RTW89_WW][2][40] = 70, -+ [0][0][2][0][RTW89_WW][0][42] = 22, -+ [0][0][2][0][RTW89_WW][1][42] = 22, -+ [0][0][2][0][RTW89_WW][2][42] = 70, -+ [0][0][2][0][RTW89_WW][0][44] = 22, -+ [0][0][2][0][RTW89_WW][1][44] = 22, -+ [0][0][2][0][RTW89_WW][2][44] = 70, -+ [0][0][2][0][RTW89_WW][0][45] = 22, -+ [0][0][2][0][RTW89_WW][1][45] = 22, -+ [0][0][2][0][RTW89_WW][2][45] = 0, -+ [0][0][2][0][RTW89_WW][0][47] = 22, -+ [0][0][2][0][RTW89_WW][1][47] = 22, -+ [0][0][2][0][RTW89_WW][2][47] = 0, -+ [0][0][2][0][RTW89_WW][0][49] = 24, -+ [0][0][2][0][RTW89_WW][1][49] = 24, -+ [0][0][2][0][RTW89_WW][2][49] = 0, -+ [0][0][2][0][RTW89_WW][0][51] = 22, -+ [0][0][2][0][RTW89_WW][1][51] = 22, -+ [0][0][2][0][RTW89_WW][2][51] = 0, -+ [0][0][2][0][RTW89_WW][0][53] = 22, -+ [0][0][2][0][RTW89_WW][1][53] = 22, -+ [0][0][2][0][RTW89_WW][2][53] = 0, -+ [0][0][2][0][RTW89_WW][0][55] = 22, -+ [0][0][2][0][RTW89_WW][1][55] = 22, -+ [0][0][2][0][RTW89_WW][2][55] = 68, -+ [0][0][2][0][RTW89_WW][0][57] = 22, -+ [0][0][2][0][RTW89_WW][1][57] = 22, -+ [0][0][2][0][RTW89_WW][2][57] = 68, -+ [0][0][2][0][RTW89_WW][0][59] = 22, -+ [0][0][2][0][RTW89_WW][1][59] = 22, -+ [0][0][2][0][RTW89_WW][2][59] = 68, -+ [0][0][2][0][RTW89_WW][0][60] = 22, -+ [0][0][2][0][RTW89_WW][1][60] = 22, -+ [0][0][2][0][RTW89_WW][2][60] = 68, -+ [0][0][2][0][RTW89_WW][0][62] = 22, -+ [0][0][2][0][RTW89_WW][1][62] = 22, -+ [0][0][2][0][RTW89_WW][2][62] = 68, -+ [0][0][2][0][RTW89_WW][0][64] = 22, -+ [0][0][2][0][RTW89_WW][1][64] = 22, -+ [0][0][2][0][RTW89_WW][2][64] = 68, -+ [0][0][2][0][RTW89_WW][0][66] = 22, -+ [0][0][2][0][RTW89_WW][1][66] = 22, -+ [0][0][2][0][RTW89_WW][2][66] = 68, -+ [0][0][2][0][RTW89_WW][0][68] = 22, -+ [0][0][2][0][RTW89_WW][1][68] = 22, -+ [0][0][2][0][RTW89_WW][2][68] = 68, -+ [0][0][2][0][RTW89_WW][0][70] = 24, -+ [0][0][2][0][RTW89_WW][1][70] = 24, -+ [0][0][2][0][RTW89_WW][2][70] = 68, -+ [0][0][2][0][RTW89_WW][0][72] = 22, -+ [0][0][2][0][RTW89_WW][1][72] = 22, -+ [0][0][2][0][RTW89_WW][2][72] = 68, -+ [0][0][2][0][RTW89_WW][0][74] = 22, -+ [0][0][2][0][RTW89_WW][1][74] = 22, -+ [0][0][2][0][RTW89_WW][2][74] = 68, -+ [0][0][2][0][RTW89_WW][0][75] = 22, -+ [0][0][2][0][RTW89_WW][1][75] = 22, -+ [0][0][2][0][RTW89_WW][2][75] = 68, -+ [0][0][2][0][RTW89_WW][0][77] = 22, -+ [0][0][2][0][RTW89_WW][1][77] = 22, -+ [0][0][2][0][RTW89_WW][2][77] = 68, -+ [0][0][2][0][RTW89_WW][0][79] = 22, -+ [0][0][2][0][RTW89_WW][1][79] = 22, -+ [0][0][2][0][RTW89_WW][2][79] = 68, -+ [0][0][2][0][RTW89_WW][0][81] = 22, -+ [0][0][2][0][RTW89_WW][1][81] = 22, -+ [0][0][2][0][RTW89_WW][2][81] = 68, -+ [0][0][2][0][RTW89_WW][0][83] = 22, -+ [0][0][2][0][RTW89_WW][1][83] = 22, -+ [0][0][2][0][RTW89_WW][2][83] = 68, -+ [0][0][2][0][RTW89_WW][0][85] = 22, -+ [0][0][2][0][RTW89_WW][1][85] = 22, -+ [0][0][2][0][RTW89_WW][2][85] = 68, -+ [0][0][2][0][RTW89_WW][0][87] = 22, -+ [0][0][2][0][RTW89_WW][1][87] = 22, -+ [0][0][2][0][RTW89_WW][2][87] = 0, -+ [0][0][2][0][RTW89_WW][0][89] = 22, -+ [0][0][2][0][RTW89_WW][1][89] = 22, -+ [0][0][2][0][RTW89_WW][2][89] = 0, -+ [0][0][2][0][RTW89_WW][0][90] = 22, -+ [0][0][2][0][RTW89_WW][1][90] = 22, -+ [0][0][2][0][RTW89_WW][2][90] = 0, -+ [0][0][2][0][RTW89_WW][0][92] = 22, -+ [0][0][2][0][RTW89_WW][1][92] = 22, -+ [0][0][2][0][RTW89_WW][2][92] = 0, -+ [0][0][2][0][RTW89_WW][0][94] = 22, -+ [0][0][2][0][RTW89_WW][1][94] = 22, -+ [0][0][2][0][RTW89_WW][2][94] = 0, -+ [0][0][2][0][RTW89_WW][0][96] = 22, -+ [0][0][2][0][RTW89_WW][1][96] = 22, -+ [0][0][2][0][RTW89_WW][2][96] = 0, -+ [0][0][2][0][RTW89_WW][0][98] = 22, -+ [0][0][2][0][RTW89_WW][1][98] = 22, -+ [0][0][2][0][RTW89_WW][2][98] = 0, -+ [0][0][2][0][RTW89_WW][0][100] = 22, -+ [0][0][2][0][RTW89_WW][1][100] = 22, -+ [0][0][2][0][RTW89_WW][2][100] = 0, -+ [0][0][2][0][RTW89_WW][0][102] = 22, -+ [0][0][2][0][RTW89_WW][1][102] = 22, -+ [0][0][2][0][RTW89_WW][2][102] = 0, -+ [0][0][2][0][RTW89_WW][0][104] = 22, -+ [0][0][2][0][RTW89_WW][1][104] = 22, -+ [0][0][2][0][RTW89_WW][2][104] = 0, -+ [0][0][2][0][RTW89_WW][0][105] = 22, -+ [0][0][2][0][RTW89_WW][1][105] = 22, -+ [0][0][2][0][RTW89_WW][2][105] = 0, -+ [0][0][2][0][RTW89_WW][0][107] = 24, -+ [0][0][2][0][RTW89_WW][1][107] = 24, -+ [0][0][2][0][RTW89_WW][2][107] = 0, -+ [0][0][2][0][RTW89_WW][0][109] = 24, -+ [0][0][2][0][RTW89_WW][1][109] = 24, -+ [0][0][2][0][RTW89_WW][2][109] = 0, -+ [0][0][2][0][RTW89_WW][0][111] = 0, -+ [0][0][2][0][RTW89_WW][1][111] = 0, -+ [0][0][2][0][RTW89_WW][2][111] = 0, -+ [0][0][2][0][RTW89_WW][0][113] = 0, -+ [0][0][2][0][RTW89_WW][1][113] = 0, -+ [0][0][2][0][RTW89_WW][2][113] = 0, -+ [0][0][2][0][RTW89_WW][0][115] = 0, -+ [0][0][2][0][RTW89_WW][1][115] = 0, -+ [0][0][2][0][RTW89_WW][2][115] = 0, -+ [0][0][2][0][RTW89_WW][0][117] = 0, -+ [0][0][2][0][RTW89_WW][1][117] = 0, -+ [0][0][2][0][RTW89_WW][2][117] = 0, -+ [0][0][2][0][RTW89_WW][0][119] = 0, -+ [0][0][2][0][RTW89_WW][1][119] = 0, -+ [0][0][2][0][RTW89_WW][2][119] = 0, -+ [0][1][2][0][RTW89_WW][0][0] = -2, -+ [0][1][2][0][RTW89_WW][1][0] = -2, -+ [0][1][2][0][RTW89_WW][2][0] = 54, -+ [0][1][2][0][RTW89_WW][0][2] = -4, -+ [0][1][2][0][RTW89_WW][1][2] = -4, -+ [0][1][2][0][RTW89_WW][2][2] = 54, -+ [0][1][2][0][RTW89_WW][0][4] = -4, -+ [0][1][2][0][RTW89_WW][1][4] = -4, -+ [0][1][2][0][RTW89_WW][2][4] = 54, -+ [0][1][2][0][RTW89_WW][0][6] = -4, -+ [0][1][2][0][RTW89_WW][1][6] = -4, -+ [0][1][2][0][RTW89_WW][2][6] = 54, -+ [0][1][2][0][RTW89_WW][0][8] = -4, -+ [0][1][2][0][RTW89_WW][1][8] = -4, -+ [0][1][2][0][RTW89_WW][2][8] = 54, -+ [0][1][2][0][RTW89_WW][0][10] = -4, -+ [0][1][2][0][RTW89_WW][1][10] = -4, -+ [0][1][2][0][RTW89_WW][2][10] = 54, -+ [0][1][2][0][RTW89_WW][0][12] = -4, -+ [0][1][2][0][RTW89_WW][1][12] = -4, -+ [0][1][2][0][RTW89_WW][2][12] = 54, -+ [0][1][2][0][RTW89_WW][0][14] = -4, -+ [0][1][2][0][RTW89_WW][1][14] = -4, -+ [0][1][2][0][RTW89_WW][2][14] = 54, -+ [0][1][2][0][RTW89_WW][0][15] = -4, -+ [0][1][2][0][RTW89_WW][1][15] = -4, -+ [0][1][2][0][RTW89_WW][2][15] = 54, -+ [0][1][2][0][RTW89_WW][0][17] = -4, -+ [0][1][2][0][RTW89_WW][1][17] = -4, -+ [0][1][2][0][RTW89_WW][2][17] = 54, -+ [0][1][2][0][RTW89_WW][0][19] = -4, -+ [0][1][2][0][RTW89_WW][1][19] = -4, -+ [0][1][2][0][RTW89_WW][2][19] = 54, -+ [0][1][2][0][RTW89_WW][0][21] = -4, -+ [0][1][2][0][RTW89_WW][1][21] = -4, -+ [0][1][2][0][RTW89_WW][2][21] = 54, -+ [0][1][2][0][RTW89_WW][0][23] = -4, -+ [0][1][2][0][RTW89_WW][1][23] = -4, -+ [0][1][2][0][RTW89_WW][2][23] = 68, -+ [0][1][2][0][RTW89_WW][0][25] = -4, -+ [0][1][2][0][RTW89_WW][1][25] = -4, -+ [0][1][2][0][RTW89_WW][2][25] = 68, -+ [0][1][2][0][RTW89_WW][0][27] = -4, -+ [0][1][2][0][RTW89_WW][1][27] = -4, -+ [0][1][2][0][RTW89_WW][2][27] = 68, -+ [0][1][2][0][RTW89_WW][0][29] = -4, -+ [0][1][2][0][RTW89_WW][1][29] = -4, -+ [0][1][2][0][RTW89_WW][2][29] = 68, -+ [0][1][2][0][RTW89_WW][0][30] = -4, -+ [0][1][2][0][RTW89_WW][1][30] = -4, -+ [0][1][2][0][RTW89_WW][2][30] = 68, -+ [0][1][2][0][RTW89_WW][0][32] = -4, -+ [0][1][2][0][RTW89_WW][1][32] = -4, -+ [0][1][2][0][RTW89_WW][2][32] = 68, -+ [0][1][2][0][RTW89_WW][0][34] = -4, -+ [0][1][2][0][RTW89_WW][1][34] = -4, -+ [0][1][2][0][RTW89_WW][2][34] = 68, -+ [0][1][2][0][RTW89_WW][0][36] = -4, -+ [0][1][2][0][RTW89_WW][1][36] = -4, -+ [0][1][2][0][RTW89_WW][2][36] = 68, -+ [0][1][2][0][RTW89_WW][0][38] = -4, -+ [0][1][2][0][RTW89_WW][1][38] = -4, -+ [0][1][2][0][RTW89_WW][2][38] = 68, -+ [0][1][2][0][RTW89_WW][0][40] = -4, -+ [0][1][2][0][RTW89_WW][1][40] = -4, -+ [0][1][2][0][RTW89_WW][2][40] = 68, -+ [0][1][2][0][RTW89_WW][0][42] = -4, -+ [0][1][2][0][RTW89_WW][1][42] = -4, -+ [0][1][2][0][RTW89_WW][2][42] = 68, -+ [0][1][2][0][RTW89_WW][0][44] = -2, -+ [0][1][2][0][RTW89_WW][1][44] = -2, -+ [0][1][2][0][RTW89_WW][2][44] = 68, -+ [0][1][2][0][RTW89_WW][0][45] = -2, -+ [0][1][2][0][RTW89_WW][1][45] = -2, -+ [0][1][2][0][RTW89_WW][2][45] = 0, -+ [0][1][2][0][RTW89_WW][0][47] = -2, -+ [0][1][2][0][RTW89_WW][1][47] = -2, -+ [0][1][2][0][RTW89_WW][2][47] = 0, -+ [0][1][2][0][RTW89_WW][0][49] = -2, -+ [0][1][2][0][RTW89_WW][1][49] = -2, -+ [0][1][2][0][RTW89_WW][2][49] = 0, -+ [0][1][2][0][RTW89_WW][0][51] = -2, -+ [0][1][2][0][RTW89_WW][1][51] = -2, -+ [0][1][2][0][RTW89_WW][2][51] = 0, -+ [0][1][2][0][RTW89_WW][0][53] = -2, -+ [0][1][2][0][RTW89_WW][1][53] = -2, -+ [0][1][2][0][RTW89_WW][2][53] = 0, -+ [0][1][2][0][RTW89_WW][0][55] = -2, -+ [0][1][2][0][RTW89_WW][1][55] = -2, -+ [0][1][2][0][RTW89_WW][2][55] = 68, -+ [0][1][2][0][RTW89_WW][0][57] = -2, -+ [0][1][2][0][RTW89_WW][1][57] = -2, -+ [0][1][2][0][RTW89_WW][2][57] = 68, -+ [0][1][2][0][RTW89_WW][0][59] = -2, -+ [0][1][2][0][RTW89_WW][1][59] = -2, -+ [0][1][2][0][RTW89_WW][2][59] = 68, -+ [0][1][2][0][RTW89_WW][0][60] = -2, -+ [0][1][2][0][RTW89_WW][1][60] = -2, -+ [0][1][2][0][RTW89_WW][2][60] = 68, -+ [0][1][2][0][RTW89_WW][0][62] = -2, -+ [0][1][2][0][RTW89_WW][1][62] = -2, -+ [0][1][2][0][RTW89_WW][2][62] = 68, -+ [0][1][2][0][RTW89_WW][0][64] = -2, -+ [0][1][2][0][RTW89_WW][1][64] = -2, -+ [0][1][2][0][RTW89_WW][2][64] = 68, -+ [0][1][2][0][RTW89_WW][0][66] = -2, -+ [0][1][2][0][RTW89_WW][1][66] = -2, -+ [0][1][2][0][RTW89_WW][2][66] = 68, -+ [0][1][2][0][RTW89_WW][0][68] = -2, -+ [0][1][2][0][RTW89_WW][1][68] = -2, -+ [0][1][2][0][RTW89_WW][2][68] = 68, -+ [0][1][2][0][RTW89_WW][0][70] = -2, -+ [0][1][2][0][RTW89_WW][1][70] = -2, -+ [0][1][2][0][RTW89_WW][2][70] = 68, -+ [0][1][2][0][RTW89_WW][0][72] = -2, -+ [0][1][2][0][RTW89_WW][1][72] = -2, -+ [0][1][2][0][RTW89_WW][2][72] = 68, -+ [0][1][2][0][RTW89_WW][0][74] = -2, -+ [0][1][2][0][RTW89_WW][1][74] = -2, -+ [0][1][2][0][RTW89_WW][2][74] = 68, -+ [0][1][2][0][RTW89_WW][0][75] = -2, -+ [0][1][2][0][RTW89_WW][1][75] = -2, -+ [0][1][2][0][RTW89_WW][2][75] = 68, -+ [0][1][2][0][RTW89_WW][0][77] = -2, -+ [0][1][2][0][RTW89_WW][1][77] = -2, -+ [0][1][2][0][RTW89_WW][2][77] = 68, -+ [0][1][2][0][RTW89_WW][0][79] = -2, -+ [0][1][2][0][RTW89_WW][1][79] = -2, -+ [0][1][2][0][RTW89_WW][2][79] = 68, -+ [0][1][2][0][RTW89_WW][0][81] = -2, -+ [0][1][2][0][RTW89_WW][1][81] = -2, -+ [0][1][2][0][RTW89_WW][2][81] = 68, -+ [0][1][2][0][RTW89_WW][0][83] = -2, -+ [0][1][2][0][RTW89_WW][1][83] = -2, -+ [0][1][2][0][RTW89_WW][2][83] = 68, -+ [0][1][2][0][RTW89_WW][0][85] = -2, -+ [0][1][2][0][RTW89_WW][1][85] = -2, -+ [0][1][2][0][RTW89_WW][2][85] = 68, -+ [0][1][2][0][RTW89_WW][0][87] = -2, -+ [0][1][2][0][RTW89_WW][1][87] = -2, -+ [0][1][2][0][RTW89_WW][2][87] = 0, -+ [0][1][2][0][RTW89_WW][0][89] = -2, -+ [0][1][2][0][RTW89_WW][1][89] = -2, -+ [0][1][2][0][RTW89_WW][2][89] = 0, -+ [0][1][2][0][RTW89_WW][0][90] = -2, -+ [0][1][2][0][RTW89_WW][1][90] = -2, -+ [0][1][2][0][RTW89_WW][2][90] = 0, -+ [0][1][2][0][RTW89_WW][0][92] = -2, -+ [0][1][2][0][RTW89_WW][1][92] = -2, -+ [0][1][2][0][RTW89_WW][2][92] = 0, -+ [0][1][2][0][RTW89_WW][0][94] = -2, -+ [0][1][2][0][RTW89_WW][1][94] = -2, -+ [0][1][2][0][RTW89_WW][2][94] = 0, -+ [0][1][2][0][RTW89_WW][0][96] = -2, -+ [0][1][2][0][RTW89_WW][1][96] = -2, -+ [0][1][2][0][RTW89_WW][2][96] = 0, -+ [0][1][2][0][RTW89_WW][0][98] = -2, -+ [0][1][2][0][RTW89_WW][1][98] = -2, -+ [0][1][2][0][RTW89_WW][2][98] = 0, -+ [0][1][2][0][RTW89_WW][0][100] = -2, -+ [0][1][2][0][RTW89_WW][1][100] = -2, -+ [0][1][2][0][RTW89_WW][2][100] = 0, -+ [0][1][2][0][RTW89_WW][0][102] = -2, -+ [0][1][2][0][RTW89_WW][1][102] = -2, -+ [0][1][2][0][RTW89_WW][2][102] = 0, -+ [0][1][2][0][RTW89_WW][0][104] = -2, -+ [0][1][2][0][RTW89_WW][1][104] = -2, -+ [0][1][2][0][RTW89_WW][2][104] = 0, -+ [0][1][2][0][RTW89_WW][0][105] = -2, -+ [0][1][2][0][RTW89_WW][1][105] = -2, -+ [0][1][2][0][RTW89_WW][2][105] = 0, -+ [0][1][2][0][RTW89_WW][0][107] = 1, -+ [0][1][2][0][RTW89_WW][1][107] = 1, -+ [0][1][2][0][RTW89_WW][2][107] = 0, -+ [0][1][2][0][RTW89_WW][0][109] = 1, -+ [0][1][2][0][RTW89_WW][1][109] = 1, -+ [0][1][2][0][RTW89_WW][2][109] = 0, -+ [0][1][2][0][RTW89_WW][0][111] = 0, -+ [0][1][2][0][RTW89_WW][1][111] = 0, -+ [0][1][2][0][RTW89_WW][2][111] = 0, -+ [0][1][2][0][RTW89_WW][0][113] = 0, -+ [0][1][2][0][RTW89_WW][1][113] = 0, -+ [0][1][2][0][RTW89_WW][2][113] = 0, -+ [0][1][2][0][RTW89_WW][0][115] = 0, -+ [0][1][2][0][RTW89_WW][1][115] = 0, -+ [0][1][2][0][RTW89_WW][2][115] = 0, -+ [0][1][2][0][RTW89_WW][0][117] = 0, -+ [0][1][2][0][RTW89_WW][1][117] = 0, -+ [0][1][2][0][RTW89_WW][2][117] = 0, -+ [0][1][2][0][RTW89_WW][0][119] = 0, -+ [0][1][2][0][RTW89_WW][1][119] = 0, -+ [0][1][2][0][RTW89_WW][2][119] = 0, -+ [0][1][2][1][RTW89_WW][0][0] = -2, -+ [0][1][2][1][RTW89_WW][1][0] = -2, -+ [0][1][2][1][RTW89_WW][2][0] = 54, -+ [0][1][2][1][RTW89_WW][0][2] = -4, -+ [0][1][2][1][RTW89_WW][1][2] = -4, -+ [0][1][2][1][RTW89_WW][2][2] = 54, -+ [0][1][2][1][RTW89_WW][0][4] = -4, -+ [0][1][2][1][RTW89_WW][1][4] = -4, -+ [0][1][2][1][RTW89_WW][2][4] = 54, -+ [0][1][2][1][RTW89_WW][0][6] = -4, -+ [0][1][2][1][RTW89_WW][1][6] = -4, -+ [0][1][2][1][RTW89_WW][2][6] = 54, -+ [0][1][2][1][RTW89_WW][0][8] = -4, -+ [0][1][2][1][RTW89_WW][1][8] = -4, -+ [0][1][2][1][RTW89_WW][2][8] = 54, -+ [0][1][2][1][RTW89_WW][0][10] = -4, -+ [0][1][2][1][RTW89_WW][1][10] = -4, -+ [0][1][2][1][RTW89_WW][2][10] = 54, -+ [0][1][2][1][RTW89_WW][0][12] = -4, -+ [0][1][2][1][RTW89_WW][1][12] = -4, -+ [0][1][2][1][RTW89_WW][2][12] = 54, -+ [0][1][2][1][RTW89_WW][0][14] = -4, -+ [0][1][2][1][RTW89_WW][1][14] = -4, -+ [0][1][2][1][RTW89_WW][2][14] = 54, -+ [0][1][2][1][RTW89_WW][0][15] = -4, -+ [0][1][2][1][RTW89_WW][1][15] = -4, -+ [0][1][2][1][RTW89_WW][2][15] = 54, -+ [0][1][2][1][RTW89_WW][0][17] = -4, -+ [0][1][2][1][RTW89_WW][1][17] = -4, -+ [0][1][2][1][RTW89_WW][2][17] = 54, -+ [0][1][2][1][RTW89_WW][0][19] = -4, -+ [0][1][2][1][RTW89_WW][1][19] = -4, -+ [0][1][2][1][RTW89_WW][2][19] = 54, -+ [0][1][2][1][RTW89_WW][0][21] = -4, -+ [0][1][2][1][RTW89_WW][1][21] = -4, -+ [0][1][2][1][RTW89_WW][2][21] = 54, -+ [0][1][2][1][RTW89_WW][0][23] = -4, -+ [0][1][2][1][RTW89_WW][1][23] = -4, -+ [0][1][2][1][RTW89_WW][2][23] = 68, -+ [0][1][2][1][RTW89_WW][0][25] = -4, -+ [0][1][2][1][RTW89_WW][1][25] = -4, -+ [0][1][2][1][RTW89_WW][2][25] = 68, -+ [0][1][2][1][RTW89_WW][0][27] = -4, -+ [0][1][2][1][RTW89_WW][1][27] = -4, -+ [0][1][2][1][RTW89_WW][2][27] = 68, -+ [0][1][2][1][RTW89_WW][0][29] = -4, -+ [0][1][2][1][RTW89_WW][1][29] = -4, -+ [0][1][2][1][RTW89_WW][2][29] = 68, -+ [0][1][2][1][RTW89_WW][0][30] = -4, -+ [0][1][2][1][RTW89_WW][1][30] = -4, -+ [0][1][2][1][RTW89_WW][2][30] = 68, -+ [0][1][2][1][RTW89_WW][0][32] = -4, -+ [0][1][2][1][RTW89_WW][1][32] = -4, -+ [0][1][2][1][RTW89_WW][2][32] = 68, -+ [0][1][2][1][RTW89_WW][0][34] = -4, -+ [0][1][2][1][RTW89_WW][1][34] = -4, -+ [0][1][2][1][RTW89_WW][2][34] = 68, -+ [0][1][2][1][RTW89_WW][0][36] = -4, -+ [0][1][2][1][RTW89_WW][1][36] = -4, -+ [0][1][2][1][RTW89_WW][2][36] = 68, -+ [0][1][2][1][RTW89_WW][0][38] = -4, -+ [0][1][2][1][RTW89_WW][1][38] = -4, -+ [0][1][2][1][RTW89_WW][2][38] = 68, -+ [0][1][2][1][RTW89_WW][0][40] = -4, -+ [0][1][2][1][RTW89_WW][1][40] = -4, -+ [0][1][2][1][RTW89_WW][2][40] = 68, -+ [0][1][2][1][RTW89_WW][0][42] = -4, -+ [0][1][2][1][RTW89_WW][1][42] = -4, -+ [0][1][2][1][RTW89_WW][2][42] = 68, -+ [0][1][2][1][RTW89_WW][0][44] = -2, -+ [0][1][2][1][RTW89_WW][1][44] = -2, -+ [0][1][2][1][RTW89_WW][2][44] = 68, -+ [0][1][2][1][RTW89_WW][0][45] = -2, -+ [0][1][2][1][RTW89_WW][1][45] = -2, -+ [0][1][2][1][RTW89_WW][2][45] = 0, -+ [0][1][2][1][RTW89_WW][0][47] = -2, -+ [0][1][2][1][RTW89_WW][1][47] = -2, -+ [0][1][2][1][RTW89_WW][2][47] = 0, -+ [0][1][2][1][RTW89_WW][0][49] = -2, -+ [0][1][2][1][RTW89_WW][1][49] = -2, -+ [0][1][2][1][RTW89_WW][2][49] = 0, -+ [0][1][2][1][RTW89_WW][0][51] = -2, -+ [0][1][2][1][RTW89_WW][1][51] = -2, -+ [0][1][2][1][RTW89_WW][2][51] = 0, -+ [0][1][2][1][RTW89_WW][0][53] = -2, -+ [0][1][2][1][RTW89_WW][1][53] = -2, -+ [0][1][2][1][RTW89_WW][2][53] = 0, -+ [0][1][2][1][RTW89_WW][0][55] = -2, -+ [0][1][2][1][RTW89_WW][1][55] = -2, -+ [0][1][2][1][RTW89_WW][2][55] = 68, -+ [0][1][2][1][RTW89_WW][0][57] = -2, -+ [0][1][2][1][RTW89_WW][1][57] = -2, -+ [0][1][2][1][RTW89_WW][2][57] = 68, -+ [0][1][2][1][RTW89_WW][0][59] = -2, -+ [0][1][2][1][RTW89_WW][1][59] = -2, -+ [0][1][2][1][RTW89_WW][2][59] = 68, -+ [0][1][2][1][RTW89_WW][0][60] = -2, -+ [0][1][2][1][RTW89_WW][1][60] = -2, -+ [0][1][2][1][RTW89_WW][2][60] = 68, -+ [0][1][2][1][RTW89_WW][0][62] = -2, -+ [0][1][2][1][RTW89_WW][1][62] = -2, -+ [0][1][2][1][RTW89_WW][2][62] = 68, -+ [0][1][2][1][RTW89_WW][0][64] = -2, -+ [0][1][2][1][RTW89_WW][1][64] = -2, -+ [0][1][2][1][RTW89_WW][2][64] = 68, -+ [0][1][2][1][RTW89_WW][0][66] = -2, -+ [0][1][2][1][RTW89_WW][1][66] = -2, -+ [0][1][2][1][RTW89_WW][2][66] = 68, -+ [0][1][2][1][RTW89_WW][0][68] = -2, -+ [0][1][2][1][RTW89_WW][1][68] = -2, -+ [0][1][2][1][RTW89_WW][2][68] = 68, -+ [0][1][2][1][RTW89_WW][0][70] = -2, -+ [0][1][2][1][RTW89_WW][1][70] = -2, -+ [0][1][2][1][RTW89_WW][2][70] = 68, -+ [0][1][2][1][RTW89_WW][0][72] = -2, -+ [0][1][2][1][RTW89_WW][1][72] = -2, -+ [0][1][2][1][RTW89_WW][2][72] = 68, -+ [0][1][2][1][RTW89_WW][0][74] = -2, -+ [0][1][2][1][RTW89_WW][1][74] = -2, -+ [0][1][2][1][RTW89_WW][2][74] = 68, -+ [0][1][2][1][RTW89_WW][0][75] = -2, -+ [0][1][2][1][RTW89_WW][1][75] = -2, -+ [0][1][2][1][RTW89_WW][2][75] = 68, -+ [0][1][2][1][RTW89_WW][0][77] = -2, -+ [0][1][2][1][RTW89_WW][1][77] = -2, -+ [0][1][2][1][RTW89_WW][2][77] = 68, -+ [0][1][2][1][RTW89_WW][0][79] = -2, -+ [0][1][2][1][RTW89_WW][1][79] = -2, -+ [0][1][2][1][RTW89_WW][2][79] = 68, -+ [0][1][2][1][RTW89_WW][0][81] = -2, -+ [0][1][2][1][RTW89_WW][1][81] = -2, -+ [0][1][2][1][RTW89_WW][2][81] = 68, -+ [0][1][2][1][RTW89_WW][0][83] = -2, -+ [0][1][2][1][RTW89_WW][1][83] = -2, -+ [0][1][2][1][RTW89_WW][2][83] = 68, -+ [0][1][2][1][RTW89_WW][0][85] = -2, -+ [0][1][2][1][RTW89_WW][1][85] = -2, -+ [0][1][2][1][RTW89_WW][2][85] = 68, -+ [0][1][2][1][RTW89_WW][0][87] = -2, -+ [0][1][2][1][RTW89_WW][1][87] = -2, -+ [0][1][2][1][RTW89_WW][2][87] = 0, -+ [0][1][2][1][RTW89_WW][0][89] = -2, -+ [0][1][2][1][RTW89_WW][1][89] = -2, -+ [0][1][2][1][RTW89_WW][2][89] = 0, -+ [0][1][2][1][RTW89_WW][0][90] = -2, -+ [0][1][2][1][RTW89_WW][1][90] = -2, -+ [0][1][2][1][RTW89_WW][2][90] = 0, -+ [0][1][2][1][RTW89_WW][0][92] = -2, -+ [0][1][2][1][RTW89_WW][1][92] = -2, -+ [0][1][2][1][RTW89_WW][2][92] = 0, -+ [0][1][2][1][RTW89_WW][0][94] = -2, -+ [0][1][2][1][RTW89_WW][1][94] = -2, -+ [0][1][2][1][RTW89_WW][2][94] = 0, -+ [0][1][2][1][RTW89_WW][0][96] = -2, -+ [0][1][2][1][RTW89_WW][1][96] = -2, -+ [0][1][2][1][RTW89_WW][2][96] = 0, -+ [0][1][2][1][RTW89_WW][0][98] = -2, -+ [0][1][2][1][RTW89_WW][1][98] = -2, -+ [0][1][2][1][RTW89_WW][2][98] = 0, -+ [0][1][2][1][RTW89_WW][0][100] = -2, -+ [0][1][2][1][RTW89_WW][1][100] = -2, -+ [0][1][2][1][RTW89_WW][2][100] = 0, -+ [0][1][2][1][RTW89_WW][0][102] = -2, -+ [0][1][2][1][RTW89_WW][1][102] = -2, -+ [0][1][2][1][RTW89_WW][2][102] = 0, -+ [0][1][2][1][RTW89_WW][0][104] = -2, -+ [0][1][2][1][RTW89_WW][1][104] = -2, -+ [0][1][2][1][RTW89_WW][2][104] = 0, -+ [0][1][2][1][RTW89_WW][0][105] = -2, -+ [0][1][2][1][RTW89_WW][1][105] = -2, -+ [0][1][2][1][RTW89_WW][2][105] = 0, -+ [0][1][2][1][RTW89_WW][0][107] = 1, -+ [0][1][2][1][RTW89_WW][1][107] = 1, -+ [0][1][2][1][RTW89_WW][2][107] = 0, -+ [0][1][2][1][RTW89_WW][0][109] = 1, -+ [0][1][2][1][RTW89_WW][1][109] = 1, -+ [0][1][2][1][RTW89_WW][2][109] = 0, -+ [0][1][2][1][RTW89_WW][0][111] = 0, -+ [0][1][2][1][RTW89_WW][1][111] = 0, -+ [0][1][2][1][RTW89_WW][2][111] = 0, -+ [0][1][2][1][RTW89_WW][0][113] = 0, -+ [0][1][2][1][RTW89_WW][1][113] = 0, -+ [0][1][2][1][RTW89_WW][2][113] = 0, -+ [0][1][2][1][RTW89_WW][0][115] = 0, -+ [0][1][2][1][RTW89_WW][1][115] = 0, -+ [0][1][2][1][RTW89_WW][2][115] = 0, -+ [0][1][2][1][RTW89_WW][0][117] = 0, -+ [0][1][2][1][RTW89_WW][1][117] = 0, -+ [0][1][2][1][RTW89_WW][2][117] = 0, -+ [0][1][2][1][RTW89_WW][0][119] = 0, -+ [0][1][2][1][RTW89_WW][1][119] = 0, -+ [0][1][2][1][RTW89_WW][2][119] = 0, -+ [1][0][2][0][RTW89_WW][0][1] = 24, -+ [1][0][2][0][RTW89_WW][1][1] = 34, -+ [1][0][2][0][RTW89_WW][2][1] = 70, -+ [1][0][2][0][RTW89_WW][0][5] = 24, -+ [1][0][2][0][RTW89_WW][1][5] = 34, -+ [1][0][2][0][RTW89_WW][2][5] = 70, -+ [1][0][2][0][RTW89_WW][0][9] = 24, -+ [1][0][2][0][RTW89_WW][1][9] = 34, -+ [1][0][2][0][RTW89_WW][2][9] = 70, -+ [1][0][2][0][RTW89_WW][0][13] = 24, -+ [1][0][2][0][RTW89_WW][1][13] = 34, -+ [1][0][2][0][RTW89_WW][2][13] = 70, -+ [1][0][2][0][RTW89_WW][0][16] = 24, -+ [1][0][2][0][RTW89_WW][1][16] = 34, -+ [1][0][2][0][RTW89_WW][2][16] = 70, -+ [1][0][2][0][RTW89_WW][0][20] = 24, -+ [1][0][2][0][RTW89_WW][1][20] = 34, -+ [1][0][2][0][RTW89_WW][2][20] = 70, -+ [1][0][2][0][RTW89_WW][0][24] = 26, -+ [1][0][2][0][RTW89_WW][1][24] = 36, -+ [1][0][2][0][RTW89_WW][2][24] = 70, -+ [1][0][2][0][RTW89_WW][0][28] = 26, -+ [1][0][2][0][RTW89_WW][1][28] = 34, -+ [1][0][2][0][RTW89_WW][2][28] = 70, -+ [1][0][2][0][RTW89_WW][0][31] = 26, -+ [1][0][2][0][RTW89_WW][1][31] = 34, -+ [1][0][2][0][RTW89_WW][2][31] = 70, -+ [1][0][2][0][RTW89_WW][0][35] = 26, -+ [1][0][2][0][RTW89_WW][1][35] = 34, -+ [1][0][2][0][RTW89_WW][2][35] = 70, -+ [1][0][2][0][RTW89_WW][0][39] = 26, -+ [1][0][2][0][RTW89_WW][1][39] = 34, -+ [1][0][2][0][RTW89_WW][2][39] = 70, -+ [1][0][2][0][RTW89_WW][0][43] = 26, -+ [1][0][2][0][RTW89_WW][1][43] = 34, -+ [1][0][2][0][RTW89_WW][2][43] = 70, -+ [1][0][2][0][RTW89_WW][0][46] = 34, -+ [1][0][2][0][RTW89_WW][1][46] = 34, -+ [1][0][2][0][RTW89_WW][2][46] = 0, -+ [1][0][2][0][RTW89_WW][0][50] = 34, -+ [1][0][2][0][RTW89_WW][1][50] = 34, -+ [1][0][2][0][RTW89_WW][2][50] = 0, -+ [1][0][2][0][RTW89_WW][0][54] = 36, -+ [1][0][2][0][RTW89_WW][1][54] = 36, -+ [1][0][2][0][RTW89_WW][2][54] = 0, -+ [1][0][2][0][RTW89_WW][0][58] = 36, -+ [1][0][2][0][RTW89_WW][1][58] = 36, -+ [1][0][2][0][RTW89_WW][2][58] = 66, -+ [1][0][2][0][RTW89_WW][0][61] = 34, -+ [1][0][2][0][RTW89_WW][1][61] = 34, -+ [1][0][2][0][RTW89_WW][2][61] = 66, -+ [1][0][2][0][RTW89_WW][0][65] = 34, -+ [1][0][2][0][RTW89_WW][1][65] = 34, -+ [1][0][2][0][RTW89_WW][2][65] = 66, -+ [1][0][2][0][RTW89_WW][0][69] = 34, -+ [1][0][2][0][RTW89_WW][1][69] = 34, -+ [1][0][2][0][RTW89_WW][2][69] = 66, -+ [1][0][2][0][RTW89_WW][0][73] = 34, -+ [1][0][2][0][RTW89_WW][1][73] = 34, -+ [1][0][2][0][RTW89_WW][2][73] = 66, -+ [1][0][2][0][RTW89_WW][0][76] = 34, -+ [1][0][2][0][RTW89_WW][1][76] = 34, -+ [1][0][2][0][RTW89_WW][2][76] = 66, -+ [1][0][2][0][RTW89_WW][0][80] = 34, -+ [1][0][2][0][RTW89_WW][1][80] = 34, -+ [1][0][2][0][RTW89_WW][2][80] = 66, -+ [1][0][2][0][RTW89_WW][0][84] = 34, -+ [1][0][2][0][RTW89_WW][1][84] = 34, -+ [1][0][2][0][RTW89_WW][2][84] = 66, -+ [1][0][2][0][RTW89_WW][0][88] = 34, -+ [1][0][2][0][RTW89_WW][1][88] = 34, -+ [1][0][2][0][RTW89_WW][2][88] = 0, -+ [1][0][2][0][RTW89_WW][0][91] = 36, -+ [1][0][2][0][RTW89_WW][1][91] = 36, -+ [1][0][2][0][RTW89_WW][2][91] = 0, -+ [1][0][2][0][RTW89_WW][0][95] = 34, -+ [1][0][2][0][RTW89_WW][1][95] = 34, -+ [1][0][2][0][RTW89_WW][2][95] = 0, -+ [1][0][2][0][RTW89_WW][0][99] = 34, -+ [1][0][2][0][RTW89_WW][1][99] = 34, -+ [1][0][2][0][RTW89_WW][2][99] = 0, -+ [1][0][2][0][RTW89_WW][0][103] = 34, -+ [1][0][2][0][RTW89_WW][1][103] = 34, -+ [1][0][2][0][RTW89_WW][2][103] = 0, -+ [1][0][2][0][RTW89_WW][0][106] = 36, -+ [1][0][2][0][RTW89_WW][1][106] = 36, -+ [1][0][2][0][RTW89_WW][2][106] = 0, -+ [1][0][2][0][RTW89_WW][0][110] = 0, -+ [1][0][2][0][RTW89_WW][1][110] = 0, -+ [1][0][2][0][RTW89_WW][2][110] = 0, -+ [1][0][2][0][RTW89_WW][0][114] = 0, -+ [1][0][2][0][RTW89_WW][1][114] = 0, -+ [1][0][2][0][RTW89_WW][2][114] = 0, -+ [1][0][2][0][RTW89_WW][0][118] = 0, -+ [1][0][2][0][RTW89_WW][1][118] = 0, -+ [1][0][2][0][RTW89_WW][2][118] = 0, -+ [1][1][2][0][RTW89_WW][0][1] = 10, -+ [1][1][2][0][RTW89_WW][1][1] = 10, -+ [1][1][2][0][RTW89_WW][2][1] = 58, -+ [1][1][2][0][RTW89_WW][0][5] = 10, -+ [1][1][2][0][RTW89_WW][1][5] = 10, -+ [1][1][2][0][RTW89_WW][2][5] = 58, -+ [1][1][2][0][RTW89_WW][0][9] = 10, -+ [1][1][2][0][RTW89_WW][1][9] = 10, -+ [1][1][2][0][RTW89_WW][2][9] = 58, -+ [1][1][2][0][RTW89_WW][0][13] = 10, -+ [1][1][2][0][RTW89_WW][1][13] = 10, -+ [1][1][2][0][RTW89_WW][2][13] = 58, -+ [1][1][2][0][RTW89_WW][0][16] = 10, -+ [1][1][2][0][RTW89_WW][1][16] = 10, -+ [1][1][2][0][RTW89_WW][2][16] = 58, -+ [1][1][2][0][RTW89_WW][0][20] = 10, -+ [1][1][2][0][RTW89_WW][1][20] = 10, -+ [1][1][2][0][RTW89_WW][2][20] = 58, -+ [1][1][2][0][RTW89_WW][0][24] = 10, -+ [1][1][2][0][RTW89_WW][1][24] = 10, -+ [1][1][2][0][RTW89_WW][2][24] = 70, -+ [1][1][2][0][RTW89_WW][0][28] = 10, -+ [1][1][2][0][RTW89_WW][1][28] = 10, -+ [1][1][2][0][RTW89_WW][2][28] = 70, -+ [1][1][2][0][RTW89_WW][0][31] = 10, -+ [1][1][2][0][RTW89_WW][1][31] = 10, -+ [1][1][2][0][RTW89_WW][2][31] = 70, -+ [1][1][2][0][RTW89_WW][0][35] = 10, -+ [1][1][2][0][RTW89_WW][1][35] = 10, -+ [1][1][2][0][RTW89_WW][2][35] = 70, -+ [1][1][2][0][RTW89_WW][0][39] = 10, -+ [1][1][2][0][RTW89_WW][1][39] = 10, -+ [1][1][2][0][RTW89_WW][2][39] = 70, -+ [1][1][2][0][RTW89_WW][0][43] = 10, -+ [1][1][2][0][RTW89_WW][1][43] = 10, -+ [1][1][2][0][RTW89_WW][2][43] = 70, -+ [1][1][2][0][RTW89_WW][0][46] = 12, -+ [1][1][2][0][RTW89_WW][1][46] = 12, -+ [1][1][2][0][RTW89_WW][2][46] = 0, -+ [1][1][2][0][RTW89_WW][0][50] = 12, -+ [1][1][2][0][RTW89_WW][1][50] = 12, -+ [1][1][2][0][RTW89_WW][2][50] = 0, -+ [1][1][2][0][RTW89_WW][0][54] = 10, -+ [1][1][2][0][RTW89_WW][1][54] = 10, -+ [1][1][2][0][RTW89_WW][2][54] = 0, -+ [1][1][2][0][RTW89_WW][0][58] = 10, -+ [1][1][2][0][RTW89_WW][1][58] = 10, -+ [1][1][2][0][RTW89_WW][2][58] = 66, -+ [1][1][2][0][RTW89_WW][0][61] = 10, -+ [1][1][2][0][RTW89_WW][1][61] = 10, -+ [1][1][2][0][RTW89_WW][2][61] = 66, -+ [1][1][2][0][RTW89_WW][0][65] = 10, -+ [1][1][2][0][RTW89_WW][1][65] = 10, -+ [1][1][2][0][RTW89_WW][2][65] = 66, -+ [1][1][2][0][RTW89_WW][0][69] = 10, -+ [1][1][2][0][RTW89_WW][1][69] = 10, -+ [1][1][2][0][RTW89_WW][2][69] = 66, -+ [1][1][2][0][RTW89_WW][0][73] = 10, -+ [1][1][2][0][RTW89_WW][1][73] = 10, -+ [1][1][2][0][RTW89_WW][2][73] = 66, -+ [1][1][2][0][RTW89_WW][0][76] = 10, -+ [1][1][2][0][RTW89_WW][1][76] = 10, -+ [1][1][2][0][RTW89_WW][2][76] = 66, -+ [1][1][2][0][RTW89_WW][0][80] = 10, -+ [1][1][2][0][RTW89_WW][1][80] = 10, -+ [1][1][2][0][RTW89_WW][2][80] = 66, -+ [1][1][2][0][RTW89_WW][0][84] = 10, -+ [1][1][2][0][RTW89_WW][1][84] = 10, -+ [1][1][2][0][RTW89_WW][2][84] = 66, -+ [1][1][2][0][RTW89_WW][0][88] = 10, -+ [1][1][2][0][RTW89_WW][1][88] = 10, -+ [1][1][2][0][RTW89_WW][2][88] = 0, -+ [1][1][2][0][RTW89_WW][0][91] = 12, -+ [1][1][2][0][RTW89_WW][1][91] = 12, -+ [1][1][2][0][RTW89_WW][2][91] = 0, -+ [1][1][2][0][RTW89_WW][0][95] = 10, -+ [1][1][2][0][RTW89_WW][1][95] = 10, -+ [1][1][2][0][RTW89_WW][2][95] = 0, -+ [1][1][2][0][RTW89_WW][0][99] = 10, -+ [1][1][2][0][RTW89_WW][1][99] = 10, -+ [1][1][2][0][RTW89_WW][2][99] = 0, -+ [1][1][2][0][RTW89_WW][0][103] = 10, -+ [1][1][2][0][RTW89_WW][1][103] = 10, -+ [1][1][2][0][RTW89_WW][2][103] = 0, -+ [1][1][2][0][RTW89_WW][0][106] = 12, -+ [1][1][2][0][RTW89_WW][1][106] = 12, -+ [1][1][2][0][RTW89_WW][2][106] = 0, -+ [1][1][2][0][RTW89_WW][0][110] = 0, -+ [1][1][2][0][RTW89_WW][1][110] = 0, -+ [1][1][2][0][RTW89_WW][2][110] = 0, -+ [1][1][2][0][RTW89_WW][0][114] = 0, -+ [1][1][2][0][RTW89_WW][1][114] = 0, -+ [1][1][2][0][RTW89_WW][2][114] = 0, -+ [1][1][2][0][RTW89_WW][0][118] = 0, -+ [1][1][2][0][RTW89_WW][1][118] = 0, -+ [1][1][2][0][RTW89_WW][2][118] = 0, -+ [1][1][2][1][RTW89_WW][0][1] = 6, -+ [1][1][2][1][RTW89_WW][1][1] = 10, -+ [1][1][2][1][RTW89_WW][2][1] = 58, -+ [1][1][2][1][RTW89_WW][0][5] = 6, -+ [1][1][2][1][RTW89_WW][1][5] = 10, -+ [1][1][2][1][RTW89_WW][2][5] = 58, -+ [1][1][2][1][RTW89_WW][0][9] = 6, -+ [1][1][2][1][RTW89_WW][1][9] = 10, -+ [1][1][2][1][RTW89_WW][2][9] = 58, -+ [1][1][2][1][RTW89_WW][0][13] = 6, -+ [1][1][2][1][RTW89_WW][1][13] = 10, -+ [1][1][2][1][RTW89_WW][2][13] = 58, -+ [1][1][2][1][RTW89_WW][0][16] = 6, -+ [1][1][2][1][RTW89_WW][1][16] = 10, -+ [1][1][2][1][RTW89_WW][2][16] = 58, -+ [1][1][2][1][RTW89_WW][0][20] = 6, -+ [1][1][2][1][RTW89_WW][1][20] = 10, -+ [1][1][2][1][RTW89_WW][2][20] = 58, -+ [1][1][2][1][RTW89_WW][0][24] = 6, -+ [1][1][2][1][RTW89_WW][1][24] = 10, -+ [1][1][2][1][RTW89_WW][2][24] = 70, -+ [1][1][2][1][RTW89_WW][0][28] = 6, -+ [1][1][2][1][RTW89_WW][1][28] = 10, -+ [1][1][2][1][RTW89_WW][2][28] = 70, -+ [1][1][2][1][RTW89_WW][0][31] = 6, -+ [1][1][2][1][RTW89_WW][1][31] = 10, -+ [1][1][2][1][RTW89_WW][2][31] = 70, -+ [1][1][2][1][RTW89_WW][0][35] = 6, -+ [1][1][2][1][RTW89_WW][1][35] = 10, -+ [1][1][2][1][RTW89_WW][2][35] = 70, -+ [1][1][2][1][RTW89_WW][0][39] = 6, -+ [1][1][2][1][RTW89_WW][1][39] = 10, -+ [1][1][2][1][RTW89_WW][2][39] = 70, -+ [1][1][2][1][RTW89_WW][0][43] = 6, -+ [1][1][2][1][RTW89_WW][1][43] = 10, -+ [1][1][2][1][RTW89_WW][2][43] = 70, -+ [1][1][2][1][RTW89_WW][0][46] = 12, -+ [1][1][2][1][RTW89_WW][1][46] = 12, -+ [1][1][2][1][RTW89_WW][2][46] = 0, -+ [1][1][2][1][RTW89_WW][0][50] = 12, -+ [1][1][2][1][RTW89_WW][1][50] = 12, -+ [1][1][2][1][RTW89_WW][2][50] = 0, -+ [1][1][2][1][RTW89_WW][0][54] = 10, -+ [1][1][2][1][RTW89_WW][1][54] = 10, -+ [1][1][2][1][RTW89_WW][2][54] = 0, -+ [1][1][2][1][RTW89_WW][0][58] = 10, -+ [1][1][2][1][RTW89_WW][1][58] = 10, -+ [1][1][2][1][RTW89_WW][2][58] = 66, -+ [1][1][2][1][RTW89_WW][0][61] = 10, -+ [1][1][2][1][RTW89_WW][1][61] = 10, -+ [1][1][2][1][RTW89_WW][2][61] = 66, -+ [1][1][2][1][RTW89_WW][0][65] = 10, -+ [1][1][2][1][RTW89_WW][1][65] = 10, -+ [1][1][2][1][RTW89_WW][2][65] = 66, -+ [1][1][2][1][RTW89_WW][0][69] = 10, -+ [1][1][2][1][RTW89_WW][1][69] = 10, -+ [1][1][2][1][RTW89_WW][2][69] = 66, -+ [1][1][2][1][RTW89_WW][0][73] = 10, -+ [1][1][2][1][RTW89_WW][1][73] = 10, -+ [1][1][2][1][RTW89_WW][2][73] = 66, -+ [1][1][2][1][RTW89_WW][0][76] = 10, -+ [1][1][2][1][RTW89_WW][1][76] = 10, -+ [1][1][2][1][RTW89_WW][2][76] = 66, -+ [1][1][2][1][RTW89_WW][0][80] = 10, -+ [1][1][2][1][RTW89_WW][1][80] = 10, -+ [1][1][2][1][RTW89_WW][2][80] = 66, -+ [1][1][2][1][RTW89_WW][0][84] = 10, -+ [1][1][2][1][RTW89_WW][1][84] = 10, -+ [1][1][2][1][RTW89_WW][2][84] = 66, -+ [1][1][2][1][RTW89_WW][0][88] = 10, -+ [1][1][2][1][RTW89_WW][1][88] = 10, -+ [1][1][2][1][RTW89_WW][2][88] = 0, -+ [1][1][2][1][RTW89_WW][0][91] = 12, -+ [1][1][2][1][RTW89_WW][1][91] = 12, -+ [1][1][2][1][RTW89_WW][2][91] = 0, -+ [1][1][2][1][RTW89_WW][0][95] = 10, -+ [1][1][2][1][RTW89_WW][1][95] = 10, -+ [1][1][2][1][RTW89_WW][2][95] = 0, -+ [1][1][2][1][RTW89_WW][0][99] = 10, -+ [1][1][2][1][RTW89_WW][1][99] = 10, -+ [1][1][2][1][RTW89_WW][2][99] = 0, -+ [1][1][2][1][RTW89_WW][0][103] = 10, -+ [1][1][2][1][RTW89_WW][1][103] = 10, -+ [1][1][2][1][RTW89_WW][2][103] = 0, -+ [1][1][2][1][RTW89_WW][0][106] = 12, -+ [1][1][2][1][RTW89_WW][1][106] = 12, -+ [1][1][2][1][RTW89_WW][2][106] = 0, -+ [1][1][2][1][RTW89_WW][0][110] = 0, -+ [1][1][2][1][RTW89_WW][1][110] = 0, -+ [1][1][2][1][RTW89_WW][2][110] = 0, -+ [1][1][2][1][RTW89_WW][0][114] = 0, -+ [1][1][2][1][RTW89_WW][1][114] = 0, -+ [1][1][2][1][RTW89_WW][2][114] = 0, -+ [1][1][2][1][RTW89_WW][0][118] = 0, -+ [1][1][2][1][RTW89_WW][1][118] = 0, -+ [1][1][2][1][RTW89_WW][2][118] = 0, -+ [2][0][2][0][RTW89_WW][0][3] = 24, -+ [2][0][2][0][RTW89_WW][1][3] = 46, -+ [2][0][2][0][RTW89_WW][2][3] = 60, -+ [2][0][2][0][RTW89_WW][0][11] = 24, -+ [2][0][2][0][RTW89_WW][1][11] = 46, -+ [2][0][2][0][RTW89_WW][2][11] = 60, -+ [2][0][2][0][RTW89_WW][0][18] = 24, -+ [2][0][2][0][RTW89_WW][1][18] = 46, -+ [2][0][2][0][RTW89_WW][2][18] = 60, -+ [2][0][2][0][RTW89_WW][0][26] = 24, -+ [2][0][2][0][RTW89_WW][1][26] = 46, -+ [2][0][2][0][RTW89_WW][2][26] = 60, -+ [2][0][2][0][RTW89_WW][0][33] = 24, -+ [2][0][2][0][RTW89_WW][1][33] = 46, -+ [2][0][2][0][RTW89_WW][2][33] = 60, -+ [2][0][2][0][RTW89_WW][0][41] = 24, -+ [2][0][2][0][RTW89_WW][1][41] = 46, -+ [2][0][2][0][RTW89_WW][2][41] = 60, -+ [2][0][2][0][RTW89_WW][0][48] = 46, -+ [2][0][2][0][RTW89_WW][1][48] = 46, -+ [2][0][2][0][RTW89_WW][2][48] = 0, -+ [2][0][2][0][RTW89_WW][0][56] = 46, -+ [2][0][2][0][RTW89_WW][1][56] = 46, -+ [2][0][2][0][RTW89_WW][2][56] = 0, -+ [2][0][2][0][RTW89_WW][0][63] = 46, -+ [2][0][2][0][RTW89_WW][1][63] = 46, -+ [2][0][2][0][RTW89_WW][2][63] = 58, -+ [2][0][2][0][RTW89_WW][0][71] = 46, -+ [2][0][2][0][RTW89_WW][1][71] = 46, -+ [2][0][2][0][RTW89_WW][2][71] = 58, -+ [2][0][2][0][RTW89_WW][0][78] = 46, -+ [2][0][2][0][RTW89_WW][1][78] = 46, -+ [2][0][2][0][RTW89_WW][2][78] = 58, -+ [2][0][2][0][RTW89_WW][0][86] = 46, -+ [2][0][2][0][RTW89_WW][1][86] = 46, -+ [2][0][2][0][RTW89_WW][2][86] = 0, -+ [2][0][2][0][RTW89_WW][0][93] = 46, -+ [2][0][2][0][RTW89_WW][1][93] = 46, -+ [2][0][2][0][RTW89_WW][2][93] = 0, -+ [2][0][2][0][RTW89_WW][0][101] = 44, -+ [2][0][2][0][RTW89_WW][1][101] = 44, -+ [2][0][2][0][RTW89_WW][2][101] = 0, -+ [2][0][2][0][RTW89_WW][0][108] = 0, -+ [2][0][2][0][RTW89_WW][1][108] = 0, -+ [2][0][2][0][RTW89_WW][2][108] = 0, -+ [2][0][2][0][RTW89_WW][0][116] = 0, -+ [2][0][2][0][RTW89_WW][1][116] = 0, -+ [2][0][2][0][RTW89_WW][2][116] = 0, -+ [2][1][2][0][RTW89_WW][0][3] = 12, -+ [2][1][2][0][RTW89_WW][1][3] = 22, -+ [2][1][2][0][RTW89_WW][2][3] = 50, -+ [2][1][2][0][RTW89_WW][0][11] = 12, -+ [2][1][2][0][RTW89_WW][1][11] = 20, -+ [2][1][2][0][RTW89_WW][2][11] = 50, -+ [2][1][2][0][RTW89_WW][0][18] = 12, -+ [2][1][2][0][RTW89_WW][1][18] = 20, -+ [2][1][2][0][RTW89_WW][2][18] = 50, -+ [2][1][2][0][RTW89_WW][0][26] = 12, -+ [2][1][2][0][RTW89_WW][1][26] = 20, -+ [2][1][2][0][RTW89_WW][2][26] = 60, -+ [2][1][2][0][RTW89_WW][0][33] = 12, -+ [2][1][2][0][RTW89_WW][1][33] = 20, -+ [2][1][2][0][RTW89_WW][2][33] = 60, -+ [2][1][2][0][RTW89_WW][0][41] = 12, -+ [2][1][2][0][RTW89_WW][1][41] = 22, -+ [2][1][2][0][RTW89_WW][2][41] = 60, -+ [2][1][2][0][RTW89_WW][0][48] = 22, -+ [2][1][2][0][RTW89_WW][1][48] = 22, -+ [2][1][2][0][RTW89_WW][2][48] = 0, -+ [2][1][2][0][RTW89_WW][0][56] = 20, -+ [2][1][2][0][RTW89_WW][1][56] = 20, -+ [2][1][2][0][RTW89_WW][2][56] = 0, -+ [2][1][2][0][RTW89_WW][0][63] = 22, -+ [2][1][2][0][RTW89_WW][1][63] = 22, -+ [2][1][2][0][RTW89_WW][2][63] = 58, -+ [2][1][2][0][RTW89_WW][0][71] = 20, -+ [2][1][2][0][RTW89_WW][1][71] = 20, -+ [2][1][2][0][RTW89_WW][2][71] = 58, -+ [2][1][2][0][RTW89_WW][0][78] = 20, -+ [2][1][2][0][RTW89_WW][1][78] = 20, -+ [2][1][2][0][RTW89_WW][2][78] = 58, -+ [2][1][2][0][RTW89_WW][0][86] = 20, -+ [2][1][2][0][RTW89_WW][1][86] = 20, -+ [2][1][2][0][RTW89_WW][2][86] = 0, -+ [2][1][2][0][RTW89_WW][0][93] = 22, -+ [2][1][2][0][RTW89_WW][1][93] = 22, -+ [2][1][2][0][RTW89_WW][2][93] = 0, -+ [2][1][2][0][RTW89_WW][0][101] = 22, -+ [2][1][2][0][RTW89_WW][1][101] = 22, -+ [2][1][2][0][RTW89_WW][2][101] = 0, -+ [2][1][2][0][RTW89_WW][0][108] = 0, -+ [2][1][2][0][RTW89_WW][1][108] = 0, -+ [2][1][2][0][RTW89_WW][2][108] = 0, -+ [2][1][2][0][RTW89_WW][0][116] = 0, -+ [2][1][2][0][RTW89_WW][1][116] = 0, -+ [2][1][2][0][RTW89_WW][2][116] = 0, -+ [2][1][2][1][RTW89_WW][0][3] = 6, -+ [2][1][2][1][RTW89_WW][1][3] = 22, -+ [2][1][2][1][RTW89_WW][2][3] = 50, -+ [2][1][2][1][RTW89_WW][0][11] = 6, -+ [2][1][2][1][RTW89_WW][1][11] = 20, -+ [2][1][2][1][RTW89_WW][2][11] = 50, -+ [2][1][2][1][RTW89_WW][0][18] = 6, -+ [2][1][2][1][RTW89_WW][1][18] = 20, -+ [2][1][2][1][RTW89_WW][2][18] = 50, -+ [2][1][2][1][RTW89_WW][0][26] = 6, -+ [2][1][2][1][RTW89_WW][1][26] = 20, -+ [2][1][2][1][RTW89_WW][2][26] = 60, -+ [2][1][2][1][RTW89_WW][0][33] = 6, -+ [2][1][2][1][RTW89_WW][1][33] = 20, -+ [2][1][2][1][RTW89_WW][2][33] = 60, -+ [2][1][2][1][RTW89_WW][0][41] = 6, -+ [2][1][2][1][RTW89_WW][1][41] = 22, -+ [2][1][2][1][RTW89_WW][2][41] = 60, -+ [2][1][2][1][RTW89_WW][0][48] = 22, -+ [2][1][2][1][RTW89_WW][1][48] = 22, -+ [2][1][2][1][RTW89_WW][2][48] = 0, -+ [2][1][2][1][RTW89_WW][0][56] = 20, -+ [2][1][2][1][RTW89_WW][1][56] = 20, -+ [2][1][2][1][RTW89_WW][2][56] = 0, -+ [2][1][2][1][RTW89_WW][0][63] = 22, -+ [2][1][2][1][RTW89_WW][1][63] = 22, -+ [2][1][2][1][RTW89_WW][2][63] = 58, -+ [2][1][2][1][RTW89_WW][0][71] = 20, -+ [2][1][2][1][RTW89_WW][1][71] = 20, -+ [2][1][2][1][RTW89_WW][2][71] = 58, -+ [2][1][2][1][RTW89_WW][0][78] = 20, -+ [2][1][2][1][RTW89_WW][1][78] = 20, -+ [2][1][2][1][RTW89_WW][2][78] = 58, -+ [2][1][2][1][RTW89_WW][0][86] = 20, -+ [2][1][2][1][RTW89_WW][1][86] = 20, -+ [2][1][2][1][RTW89_WW][2][86] = 0, -+ [2][1][2][1][RTW89_WW][0][93] = 22, -+ [2][1][2][1][RTW89_WW][1][93] = 22, -+ [2][1][2][1][RTW89_WW][2][93] = 0, -+ [2][1][2][1][RTW89_WW][0][101] = 22, -+ [2][1][2][1][RTW89_WW][1][101] = 22, -+ [2][1][2][1][RTW89_WW][2][101] = 0, -+ [2][1][2][1][RTW89_WW][0][108] = 0, -+ [2][1][2][1][RTW89_WW][1][108] = 0, -+ [2][1][2][1][RTW89_WW][2][108] = 0, -+ [2][1][2][1][RTW89_WW][0][116] = 0, -+ [2][1][2][1][RTW89_WW][1][116] = 0, -+ [2][1][2][1][RTW89_WW][2][116] = 0, -+ [3][0][2][0][RTW89_WW][0][7] = 22, -+ [3][0][2][0][RTW89_WW][1][7] = 42, -+ [3][0][2][0][RTW89_WW][2][7] = 52, -+ [3][0][2][0][RTW89_WW][0][22] = 20, -+ [3][0][2][0][RTW89_WW][1][22] = 42, -+ [3][0][2][0][RTW89_WW][2][22] = 52, -+ [3][0][2][0][RTW89_WW][0][37] = 20, -+ [3][0][2][0][RTW89_WW][1][37] = 42, -+ [3][0][2][0][RTW89_WW][2][37] = 52, -+ [3][0][2][0][RTW89_WW][0][52] = 54, -+ [3][0][2][0][RTW89_WW][1][52] = 54, -+ [3][0][2][0][RTW89_WW][2][52] = 0, -+ [3][0][2][0][RTW89_WW][0][67] = 54, -+ [3][0][2][0][RTW89_WW][1][67] = 54, -+ [3][0][2][0][RTW89_WW][2][67] = 54, -+ [3][0][2][0][RTW89_WW][0][82] = 26, -+ [3][0][2][0][RTW89_WW][1][82] = 26, -+ [3][0][2][0][RTW89_WW][2][82] = 0, -+ [3][0][2][0][RTW89_WW][0][97] = 26, -+ [3][0][2][0][RTW89_WW][1][97] = 26, -+ [3][0][2][0][RTW89_WW][2][97] = 0, -+ [3][0][2][0][RTW89_WW][0][112] = 0, -+ [3][0][2][0][RTW89_WW][1][112] = 0, -+ [3][0][2][0][RTW89_WW][2][112] = 0, -+ [3][1][2][0][RTW89_WW][0][7] = 10, -+ [3][1][2][0][RTW89_WW][1][7] = 32, -+ [3][1][2][0][RTW89_WW][2][7] = 46, -+ [3][1][2][0][RTW89_WW][0][22] = 8, -+ [3][1][2][0][RTW89_WW][1][22] = 30, -+ [3][1][2][0][RTW89_WW][2][22] = 52, -+ [3][1][2][0][RTW89_WW][0][37] = 8, -+ [3][1][2][0][RTW89_WW][1][37] = 30, -+ [3][1][2][0][RTW89_WW][2][37] = 52, -+ [3][1][2][0][RTW89_WW][0][52] = 30, -+ [3][1][2][0][RTW89_WW][1][52] = 30, -+ [3][1][2][0][RTW89_WW][2][52] = 0, -+ [3][1][2][0][RTW89_WW][0][67] = 32, -+ [3][1][2][0][RTW89_WW][1][67] = 32, -+ [3][1][2][0][RTW89_WW][2][67] = 54, -+ [3][1][2][0][RTW89_WW][0][82] = 24, -+ [3][1][2][0][RTW89_WW][1][82] = 24, -+ [3][1][2][0][RTW89_WW][2][82] = 0, -+ [3][1][2][0][RTW89_WW][0][97] = 24, -+ [3][1][2][0][RTW89_WW][1][97] = 24, -+ [3][1][2][0][RTW89_WW][2][97] = 0, -+ [3][1][2][0][RTW89_WW][0][112] = 0, -+ [3][1][2][0][RTW89_WW][1][112] = 0, -+ [3][1][2][0][RTW89_WW][2][112] = 0, -+ [3][1][2][1][RTW89_WW][0][7] = 6, -+ [3][1][2][1][RTW89_WW][1][7] = 32, -+ [3][1][2][1][RTW89_WW][2][7] = 46, -+ [3][1][2][1][RTW89_WW][0][22] = 6, -+ [3][1][2][1][RTW89_WW][1][22] = 30, -+ [3][1][2][1][RTW89_WW][2][22] = 52, -+ [3][1][2][1][RTW89_WW][0][37] = 6, -+ [3][1][2][1][RTW89_WW][1][37] = 30, -+ [3][1][2][1][RTW89_WW][2][37] = 52, -+ [3][1][2][1][RTW89_WW][0][52] = 30, -+ [3][1][2][1][RTW89_WW][1][52] = 30, -+ [3][1][2][1][RTW89_WW][2][52] = 0, -+ [3][1][2][1][RTW89_WW][0][67] = 32, -+ [3][1][2][1][RTW89_WW][1][67] = 32, -+ [3][1][2][1][RTW89_WW][2][67] = 54, -+ [3][1][2][1][RTW89_WW][0][82] = 24, -+ [3][1][2][1][RTW89_WW][1][82] = 24, -+ [3][1][2][1][RTW89_WW][2][82] = 0, -+ [3][1][2][1][RTW89_WW][0][97] = 24, -+ [3][1][2][1][RTW89_WW][1][97] = 24, -+ [3][1][2][1][RTW89_WW][2][97] = 0, -+ [3][1][2][1][RTW89_WW][0][112] = 0, -+ [3][1][2][1][RTW89_WW][1][112] = 0, -+ [3][1][2][1][RTW89_WW][2][112] = 0, -+ [0][0][1][0][RTW89_FCC][1][0] = 24, -+ [0][0][1][0][RTW89_FCC][2][0] = 56, -+ [0][0][1][0][RTW89_ETSI][1][0] = 66, -+ [0][0][1][0][RTW89_ETSI][0][0] = 28, -+ [0][0][1][0][RTW89_MKK][1][0] = 66, -+ [0][0][1][0][RTW89_MKK][0][0] = 26, -+ [0][0][1][0][RTW89_IC][1][0] = 24, -+ [0][0][1][0][RTW89_KCC][1][0] = 24, -+ [0][0][1][0][RTW89_KCC][0][0] = 24, -+ [0][0][1][0][RTW89_ACMA][1][0] = 66, -+ [0][0][1][0][RTW89_ACMA][0][0] = 28, -+ [0][0][1][0][RTW89_CHILE][1][0] = 24, -+ [0][0][1][0][RTW89_QATAR][1][0] = 66, -+ [0][0][1][0][RTW89_QATAR][0][0] = 28, -+ [0][0][1][0][RTW89_UK][1][0] = 66, -+ [0][0][1][0][RTW89_UK][0][0] = 28, -+ [0][0][1][0][RTW89_FCC][1][2] = 22, -+ [0][0][1][0][RTW89_FCC][2][2] = 56, -+ [0][0][1][0][RTW89_ETSI][1][2] = 66, -+ [0][0][1][0][RTW89_ETSI][0][2] = 28, -+ [0][0][1][0][RTW89_MKK][1][2] = 66, -+ [0][0][1][0][RTW89_MKK][0][2] = 26, -+ [0][0][1][0][RTW89_IC][1][2] = 22, -+ [0][0][1][0][RTW89_KCC][1][2] = 24, -+ [0][0][1][0][RTW89_KCC][0][2] = 24, -+ [0][0][1][0][RTW89_ACMA][1][2] = 66, -+ [0][0][1][0][RTW89_ACMA][0][2] = 28, -+ [0][0][1][0][RTW89_CHILE][1][2] = 22, -+ [0][0][1][0][RTW89_QATAR][1][2] = 66, -+ [0][0][1][0][RTW89_QATAR][0][2] = 28, -+ [0][0][1][0][RTW89_UK][1][2] = 66, -+ [0][0][1][0][RTW89_UK][0][2] = 28, -+ [0][0][1][0][RTW89_FCC][1][4] = 22, -+ [0][0][1][0][RTW89_FCC][2][4] = 56, -+ [0][0][1][0][RTW89_ETSI][1][4] = 66, -+ [0][0][1][0][RTW89_ETSI][0][4] = 28, -+ [0][0][1][0][RTW89_MKK][1][4] = 66, -+ [0][0][1][0][RTW89_MKK][0][4] = 26, -+ [0][0][1][0][RTW89_IC][1][4] = 22, -+ [0][0][1][0][RTW89_KCC][1][4] = 24, -+ [0][0][1][0][RTW89_KCC][0][4] = 24, -+ [0][0][1][0][RTW89_ACMA][1][4] = 66, -+ [0][0][1][0][RTW89_ACMA][0][4] = 28, -+ [0][0][1][0][RTW89_CHILE][1][4] = 22, -+ [0][0][1][0][RTW89_QATAR][1][4] = 66, -+ [0][0][1][0][RTW89_QATAR][0][4] = 28, -+ [0][0][1][0][RTW89_UK][1][4] = 66, -+ [0][0][1][0][RTW89_UK][0][4] = 28, -+ [0][0][1][0][RTW89_FCC][1][6] = 22, -+ [0][0][1][0][RTW89_FCC][2][6] = 56, -+ [0][0][1][0][RTW89_ETSI][1][6] = 66, -+ [0][0][1][0][RTW89_ETSI][0][6] = 28, -+ [0][0][1][0][RTW89_MKK][1][6] = 66, -+ [0][0][1][0][RTW89_MKK][0][6] = 26, -+ [0][0][1][0][RTW89_IC][1][6] = 22, -+ [0][0][1][0][RTW89_KCC][1][6] = 24, -+ [0][0][1][0][RTW89_KCC][0][6] = 24, -+ [0][0][1][0][RTW89_ACMA][1][6] = 66, -+ [0][0][1][0][RTW89_ACMA][0][6] = 28, -+ [0][0][1][0][RTW89_CHILE][1][6] = 22, -+ [0][0][1][0][RTW89_QATAR][1][6] = 66, -+ [0][0][1][0][RTW89_QATAR][0][6] = 28, -+ [0][0][1][0][RTW89_UK][1][6] = 66, -+ [0][0][1][0][RTW89_UK][0][6] = 28, -+ [0][0][1][0][RTW89_FCC][1][8] = 22, -+ [0][0][1][0][RTW89_FCC][2][8] = 56, -+ [0][0][1][0][RTW89_ETSI][1][8] = 66, -+ [0][0][1][0][RTW89_ETSI][0][8] = 28, -+ [0][0][1][0][RTW89_MKK][1][8] = 66, -+ [0][0][1][0][RTW89_MKK][0][8] = 26, -+ [0][0][1][0][RTW89_IC][1][8] = 22, -+ [0][0][1][0][RTW89_KCC][1][8] = 24, -+ [0][0][1][0][RTW89_KCC][0][8] = 24, -+ [0][0][1][0][RTW89_ACMA][1][8] = 66, -+ [0][0][1][0][RTW89_ACMA][0][8] = 28, -+ [0][0][1][0][RTW89_CHILE][1][8] = 22, -+ [0][0][1][0][RTW89_QATAR][1][8] = 66, -+ [0][0][1][0][RTW89_QATAR][0][8] = 28, -+ [0][0][1][0][RTW89_UK][1][8] = 66, -+ [0][0][1][0][RTW89_UK][0][8] = 28, -+ [0][0][1][0][RTW89_FCC][1][10] = 22, -+ [0][0][1][0][RTW89_FCC][2][10] = 56, -+ [0][0][1][0][RTW89_ETSI][1][10] = 66, -+ [0][0][1][0][RTW89_ETSI][0][10] = 28, -+ [0][0][1][0][RTW89_MKK][1][10] = 66, -+ [0][0][1][0][RTW89_MKK][0][10] = 26, -+ [0][0][1][0][RTW89_IC][1][10] = 22, -+ [0][0][1][0][RTW89_KCC][1][10] = 24, -+ [0][0][1][0][RTW89_KCC][0][10] = 24, -+ [0][0][1][0][RTW89_ACMA][1][10] = 66, -+ [0][0][1][0][RTW89_ACMA][0][10] = 28, -+ [0][0][1][0][RTW89_CHILE][1][10] = 22, -+ [0][0][1][0][RTW89_QATAR][1][10] = 66, -+ [0][0][1][0][RTW89_QATAR][0][10] = 28, -+ [0][0][1][0][RTW89_UK][1][10] = 66, -+ [0][0][1][0][RTW89_UK][0][10] = 28, -+ [0][0][1][0][RTW89_FCC][1][12] = 22, -+ [0][0][1][0][RTW89_FCC][2][12] = 56, -+ [0][0][1][0][RTW89_ETSI][1][12] = 66, -+ [0][0][1][0][RTW89_ETSI][0][12] = 28, -+ [0][0][1][0][RTW89_MKK][1][12] = 66, -+ [0][0][1][0][RTW89_MKK][0][12] = 26, -+ [0][0][1][0][RTW89_IC][1][12] = 22, -+ [0][0][1][0][RTW89_KCC][1][12] = 24, -+ [0][0][1][0][RTW89_KCC][0][12] = 24, -+ [0][0][1][0][RTW89_ACMA][1][12] = 66, -+ [0][0][1][0][RTW89_ACMA][0][12] = 28, -+ [0][0][1][0][RTW89_CHILE][1][12] = 22, -+ [0][0][1][0][RTW89_QATAR][1][12] = 66, -+ [0][0][1][0][RTW89_QATAR][0][12] = 28, -+ [0][0][1][0][RTW89_UK][1][12] = 66, -+ [0][0][1][0][RTW89_UK][0][12] = 28, -+ [0][0][1][0][RTW89_FCC][1][14] = 22, -+ [0][0][1][0][RTW89_FCC][2][14] = 56, -+ [0][0][1][0][RTW89_ETSI][1][14] = 66, -+ [0][0][1][0][RTW89_ETSI][0][14] = 28, -+ [0][0][1][0][RTW89_MKK][1][14] = 66, -+ [0][0][1][0][RTW89_MKK][0][14] = 26, -+ [0][0][1][0][RTW89_IC][1][14] = 22, -+ [0][0][1][0][RTW89_KCC][1][14] = 24, -+ [0][0][1][0][RTW89_KCC][0][14] = 24, -+ [0][0][1][0][RTW89_ACMA][1][14] = 66, -+ [0][0][1][0][RTW89_ACMA][0][14] = 28, -+ [0][0][1][0][RTW89_CHILE][1][14] = 22, -+ [0][0][1][0][RTW89_QATAR][1][14] = 66, -+ [0][0][1][0][RTW89_QATAR][0][14] = 28, -+ [0][0][1][0][RTW89_UK][1][14] = 66, -+ [0][0][1][0][RTW89_UK][0][14] = 28, -+ [0][0][1][0][RTW89_FCC][1][15] = 22, -+ [0][0][1][0][RTW89_FCC][2][15] = 56, -+ [0][0][1][0][RTW89_ETSI][1][15] = 66, -+ [0][0][1][0][RTW89_ETSI][0][15] = 28, -+ [0][0][1][0][RTW89_MKK][1][15] = 66, -+ [0][0][1][0][RTW89_MKK][0][15] = 26, -+ [0][0][1][0][RTW89_IC][1][15] = 22, -+ [0][0][1][0][RTW89_KCC][1][15] = 24, -+ [0][0][1][0][RTW89_KCC][0][15] = 24, -+ [0][0][1][0][RTW89_ACMA][1][15] = 66, -+ [0][0][1][0][RTW89_ACMA][0][15] = 28, -+ [0][0][1][0][RTW89_CHILE][1][15] = 22, -+ [0][0][1][0][RTW89_QATAR][1][15] = 66, -+ [0][0][1][0][RTW89_QATAR][0][15] = 28, -+ [0][0][1][0][RTW89_UK][1][15] = 66, -+ [0][0][1][0][RTW89_UK][0][15] = 28, -+ [0][0][1][0][RTW89_FCC][1][17] = 22, -+ [0][0][1][0][RTW89_FCC][2][17] = 56, -+ [0][0][1][0][RTW89_ETSI][1][17] = 66, -+ [0][0][1][0][RTW89_ETSI][0][17] = 28, -+ [0][0][1][0][RTW89_MKK][1][17] = 66, -+ [0][0][1][0][RTW89_MKK][0][17] = 26, -+ [0][0][1][0][RTW89_IC][1][17] = 22, -+ [0][0][1][0][RTW89_KCC][1][17] = 24, -+ [0][0][1][0][RTW89_KCC][0][17] = 24, -+ [0][0][1][0][RTW89_ACMA][1][17] = 66, -+ [0][0][1][0][RTW89_ACMA][0][17] = 28, -+ [0][0][1][0][RTW89_CHILE][1][17] = 22, -+ [0][0][1][0][RTW89_QATAR][1][17] = 66, -+ [0][0][1][0][RTW89_QATAR][0][17] = 28, -+ [0][0][1][0][RTW89_UK][1][17] = 66, -+ [0][0][1][0][RTW89_UK][0][17] = 28, -+ [0][0][1][0][RTW89_FCC][1][19] = 22, -+ [0][0][1][0][RTW89_FCC][2][19] = 56, -+ [0][0][1][0][RTW89_ETSI][1][19] = 66, -+ [0][0][1][0][RTW89_ETSI][0][19] = 28, -+ [0][0][1][0][RTW89_MKK][1][19] = 66, -+ [0][0][1][0][RTW89_MKK][0][19] = 26, -+ [0][0][1][0][RTW89_IC][1][19] = 22, -+ [0][0][1][0][RTW89_KCC][1][19] = 24, -+ [0][0][1][0][RTW89_KCC][0][19] = 24, -+ [0][0][1][0][RTW89_ACMA][1][19] = 66, -+ [0][0][1][0][RTW89_ACMA][0][19] = 28, -+ [0][0][1][0][RTW89_CHILE][1][19] = 22, -+ [0][0][1][0][RTW89_QATAR][1][19] = 66, -+ [0][0][1][0][RTW89_QATAR][0][19] = 28, -+ [0][0][1][0][RTW89_UK][1][19] = 66, -+ [0][0][1][0][RTW89_UK][0][19] = 28, -+ [0][0][1][0][RTW89_FCC][1][21] = 22, -+ [0][0][1][0][RTW89_FCC][2][21] = 56, -+ [0][0][1][0][RTW89_ETSI][1][21] = 66, -+ [0][0][1][0][RTW89_ETSI][0][21] = 28, -+ [0][0][1][0][RTW89_MKK][1][21] = 66, -+ [0][0][1][0][RTW89_MKK][0][21] = 26, -+ [0][0][1][0][RTW89_IC][1][21] = 22, -+ [0][0][1][0][RTW89_KCC][1][21] = 24, -+ [0][0][1][0][RTW89_KCC][0][21] = 24, -+ [0][0][1][0][RTW89_ACMA][1][21] = 66, -+ [0][0][1][0][RTW89_ACMA][0][21] = 28, -+ [0][0][1][0][RTW89_CHILE][1][21] = 22, -+ [0][0][1][0][RTW89_QATAR][1][21] = 66, -+ [0][0][1][0][RTW89_QATAR][0][21] = 28, -+ [0][0][1][0][RTW89_UK][1][21] = 66, -+ [0][0][1][0][RTW89_UK][0][21] = 28, -+ [0][0][1][0][RTW89_FCC][1][23] = 22, -+ [0][0][1][0][RTW89_FCC][2][23] = 70, -+ [0][0][1][0][RTW89_ETSI][1][23] = 66, -+ [0][0][1][0][RTW89_ETSI][0][23] = 28, -+ [0][0][1][0][RTW89_MKK][1][23] = 66, -+ [0][0][1][0][RTW89_MKK][0][23] = 26, -+ [0][0][1][0][RTW89_IC][1][23] = 22, -+ [0][0][1][0][RTW89_KCC][1][23] = 24, -+ [0][0][1][0][RTW89_KCC][0][23] = 26, -+ [0][0][1][0][RTW89_ACMA][1][23] = 66, -+ [0][0][1][0][RTW89_ACMA][0][23] = 28, -+ [0][0][1][0][RTW89_CHILE][1][23] = 22, -+ [0][0][1][0][RTW89_QATAR][1][23] = 66, -+ [0][0][1][0][RTW89_QATAR][0][23] = 28, -+ [0][0][1][0][RTW89_UK][1][23] = 66, -+ [0][0][1][0][RTW89_UK][0][23] = 28, -+ [0][0][1][0][RTW89_FCC][1][25] = 22, -+ [0][0][1][0][RTW89_FCC][2][25] = 70, -+ [0][0][1][0][RTW89_ETSI][1][25] = 66, -+ [0][0][1][0][RTW89_ETSI][0][25] = 28, -+ [0][0][1][0][RTW89_MKK][1][25] = 66, -+ [0][0][1][0][RTW89_MKK][0][25] = 26, -+ [0][0][1][0][RTW89_IC][1][25] = 22, -+ [0][0][1][0][RTW89_KCC][1][25] = 24, -+ [0][0][1][0][RTW89_KCC][0][25] = 26, -+ [0][0][1][0][RTW89_ACMA][1][25] = 66, -+ [0][0][1][0][RTW89_ACMA][0][25] = 28, -+ [0][0][1][0][RTW89_CHILE][1][25] = 22, -+ [0][0][1][0][RTW89_QATAR][1][25] = 66, -+ [0][0][1][0][RTW89_QATAR][0][25] = 28, -+ [0][0][1][0][RTW89_UK][1][25] = 66, -+ [0][0][1][0][RTW89_UK][0][25] = 28, -+ [0][0][1][0][RTW89_FCC][1][27] = 22, -+ [0][0][1][0][RTW89_FCC][2][27] = 70, -+ [0][0][1][0][RTW89_ETSI][1][27] = 66, -+ [0][0][1][0][RTW89_ETSI][0][27] = 28, -+ [0][0][1][0][RTW89_MKK][1][27] = 66, -+ [0][0][1][0][RTW89_MKK][0][27] = 26, -+ [0][0][1][0][RTW89_IC][1][27] = 22, -+ [0][0][1][0][RTW89_KCC][1][27] = 24, -+ [0][0][1][0][RTW89_KCC][0][27] = 26, -+ [0][0][1][0][RTW89_ACMA][1][27] = 66, -+ [0][0][1][0][RTW89_ACMA][0][27] = 28, -+ [0][0][1][0][RTW89_CHILE][1][27] = 22, -+ [0][0][1][0][RTW89_QATAR][1][27] = 66, -+ [0][0][1][0][RTW89_QATAR][0][27] = 28, -+ [0][0][1][0][RTW89_UK][1][27] = 66, -+ [0][0][1][0][RTW89_UK][0][27] = 28, -+ [0][0][1][0][RTW89_FCC][1][29] = 22, -+ [0][0][1][0][RTW89_FCC][2][29] = 70, -+ [0][0][1][0][RTW89_ETSI][1][29] = 66, -+ [0][0][1][0][RTW89_ETSI][0][29] = 28, -+ [0][0][1][0][RTW89_MKK][1][29] = 66, -+ [0][0][1][0][RTW89_MKK][0][29] = 26, -+ [0][0][1][0][RTW89_IC][1][29] = 22, -+ [0][0][1][0][RTW89_KCC][1][29] = 24, -+ [0][0][1][0][RTW89_KCC][0][29] = 26, -+ [0][0][1][0][RTW89_ACMA][1][29] = 66, -+ [0][0][1][0][RTW89_ACMA][0][29] = 28, -+ [0][0][1][0][RTW89_CHILE][1][29] = 22, -+ [0][0][1][0][RTW89_QATAR][1][29] = 66, -+ [0][0][1][0][RTW89_QATAR][0][29] = 28, -+ [0][0][1][0][RTW89_UK][1][29] = 66, -+ [0][0][1][0][RTW89_UK][0][29] = 28, -+ [0][0][1][0][RTW89_FCC][1][30] = 22, -+ [0][0][1][0][RTW89_FCC][2][30] = 70, -+ [0][0][1][0][RTW89_ETSI][1][30] = 66, -+ [0][0][1][0][RTW89_ETSI][0][30] = 28, -+ [0][0][1][0][RTW89_MKK][1][30] = 66, -+ [0][0][1][0][RTW89_MKK][0][30] = 26, -+ [0][0][1][0][RTW89_IC][1][30] = 22, -+ [0][0][1][0][RTW89_KCC][1][30] = 24, -+ [0][0][1][0][RTW89_KCC][0][30] = 26, -+ [0][0][1][0][RTW89_ACMA][1][30] = 66, -+ [0][0][1][0][RTW89_ACMA][0][30] = 28, -+ [0][0][1][0][RTW89_CHILE][1][30] = 22, -+ [0][0][1][0][RTW89_QATAR][1][30] = 66, -+ [0][0][1][0][RTW89_QATAR][0][30] = 28, -+ [0][0][1][0][RTW89_UK][1][30] = 66, -+ [0][0][1][0][RTW89_UK][0][30] = 28, -+ [0][0][1][0][RTW89_FCC][1][32] = 22, -+ [0][0][1][0][RTW89_FCC][2][32] = 70, -+ [0][0][1][0][RTW89_ETSI][1][32] = 66, -+ [0][0][1][0][RTW89_ETSI][0][32] = 28, -+ [0][0][1][0][RTW89_MKK][1][32] = 66, -+ [0][0][1][0][RTW89_MKK][0][32] = 26, -+ [0][0][1][0][RTW89_IC][1][32] = 22, -+ [0][0][1][0][RTW89_KCC][1][32] = 24, -+ [0][0][1][0][RTW89_KCC][0][32] = 26, -+ [0][0][1][0][RTW89_ACMA][1][32] = 66, -+ [0][0][1][0][RTW89_ACMA][0][32] = 28, -+ [0][0][1][0][RTW89_CHILE][1][32] = 22, -+ [0][0][1][0][RTW89_QATAR][1][32] = 66, -+ [0][0][1][0][RTW89_QATAR][0][32] = 28, -+ [0][0][1][0][RTW89_UK][1][32] = 66, -+ [0][0][1][0][RTW89_UK][0][32] = 28, -+ [0][0][1][0][RTW89_FCC][1][34] = 22, -+ [0][0][1][0][RTW89_FCC][2][34] = 70, -+ [0][0][1][0][RTW89_ETSI][1][34] = 66, -+ [0][0][1][0][RTW89_ETSI][0][34] = 28, -+ [0][0][1][0][RTW89_MKK][1][34] = 66, -+ [0][0][1][0][RTW89_MKK][0][34] = 26, -+ [0][0][1][0][RTW89_IC][1][34] = 22, -+ [0][0][1][0][RTW89_KCC][1][34] = 24, -+ [0][0][1][0][RTW89_KCC][0][34] = 26, -+ [0][0][1][0][RTW89_ACMA][1][34] = 66, -+ [0][0][1][0][RTW89_ACMA][0][34] = 28, -+ [0][0][1][0][RTW89_CHILE][1][34] = 22, -+ [0][0][1][0][RTW89_QATAR][1][34] = 66, -+ [0][0][1][0][RTW89_QATAR][0][34] = 28, -+ [0][0][1][0][RTW89_UK][1][34] = 66, -+ [0][0][1][0][RTW89_UK][0][34] = 28, -+ [0][0][1][0][RTW89_FCC][1][36] = 22, -+ [0][0][1][0][RTW89_FCC][2][36] = 70, -+ [0][0][1][0][RTW89_ETSI][1][36] = 66, -+ [0][0][1][0][RTW89_ETSI][0][36] = 28, -+ [0][0][1][0][RTW89_MKK][1][36] = 66, -+ [0][0][1][0][RTW89_MKK][0][36] = 26, -+ [0][0][1][0][RTW89_IC][1][36] = 22, -+ [0][0][1][0][RTW89_KCC][1][36] = 24, -+ [0][0][1][0][RTW89_KCC][0][36] = 26, -+ [0][0][1][0][RTW89_ACMA][1][36] = 66, -+ [0][0][1][0][RTW89_ACMA][0][36] = 28, -+ [0][0][1][0][RTW89_CHILE][1][36] = 22, -+ [0][0][1][0][RTW89_QATAR][1][36] = 66, -+ [0][0][1][0][RTW89_QATAR][0][36] = 28, -+ [0][0][1][0][RTW89_UK][1][36] = 66, -+ [0][0][1][0][RTW89_UK][0][36] = 28, -+ [0][0][1][0][RTW89_FCC][1][38] = 22, -+ [0][0][1][0][RTW89_FCC][2][38] = 70, -+ [0][0][1][0][RTW89_ETSI][1][38] = 66, -+ [0][0][1][0][RTW89_ETSI][0][38] = 28, -+ [0][0][1][0][RTW89_MKK][1][38] = 66, -+ [0][0][1][0][RTW89_MKK][0][38] = 26, -+ [0][0][1][0][RTW89_IC][1][38] = 22, -+ [0][0][1][0][RTW89_KCC][1][38] = 24, -+ [0][0][1][0][RTW89_KCC][0][38] = 26, -+ [0][0][1][0][RTW89_ACMA][1][38] = 66, -+ [0][0][1][0][RTW89_ACMA][0][38] = 28, -+ [0][0][1][0][RTW89_CHILE][1][38] = 22, -+ [0][0][1][0][RTW89_QATAR][1][38] = 66, -+ [0][0][1][0][RTW89_QATAR][0][38] = 28, -+ [0][0][1][0][RTW89_UK][1][38] = 66, -+ [0][0][1][0][RTW89_UK][0][38] = 28, -+ [0][0][1][0][RTW89_FCC][1][40] = 22, -+ [0][0][1][0][RTW89_FCC][2][40] = 70, -+ [0][0][1][0][RTW89_ETSI][1][40] = 66, -+ [0][0][1][0][RTW89_ETSI][0][40] = 28, -+ [0][0][1][0][RTW89_MKK][1][40] = 66, -+ [0][0][1][0][RTW89_MKK][0][40] = 26, -+ [0][0][1][0][RTW89_IC][1][40] = 22, -+ [0][0][1][0][RTW89_KCC][1][40] = 24, -+ [0][0][1][0][RTW89_KCC][0][40] = 26, -+ [0][0][1][0][RTW89_ACMA][1][40] = 66, -+ [0][0][1][0][RTW89_ACMA][0][40] = 28, -+ [0][0][1][0][RTW89_CHILE][1][40] = 22, -+ [0][0][1][0][RTW89_QATAR][1][40] = 66, -+ [0][0][1][0][RTW89_QATAR][0][40] = 28, -+ [0][0][1][0][RTW89_UK][1][40] = 66, -+ [0][0][1][0][RTW89_UK][0][40] = 28, -+ [0][0][1][0][RTW89_FCC][1][42] = 22, -+ [0][0][1][0][RTW89_FCC][2][42] = 70, -+ [0][0][1][0][RTW89_ETSI][1][42] = 66, -+ [0][0][1][0][RTW89_ETSI][0][42] = 28, -+ [0][0][1][0][RTW89_MKK][1][42] = 66, -+ [0][0][1][0][RTW89_MKK][0][42] = 26, -+ [0][0][1][0][RTW89_IC][1][42] = 22, -+ [0][0][1][0][RTW89_KCC][1][42] = 24, -+ [0][0][1][0][RTW89_KCC][0][42] = 26, -+ [0][0][1][0][RTW89_ACMA][1][42] = 66, -+ [0][0][1][0][RTW89_ACMA][0][42] = 28, -+ [0][0][1][0][RTW89_CHILE][1][42] = 22, -+ [0][0][1][0][RTW89_QATAR][1][42] = 66, -+ [0][0][1][0][RTW89_QATAR][0][42] = 28, -+ [0][0][1][0][RTW89_UK][1][42] = 66, -+ [0][0][1][0][RTW89_UK][0][42] = 28, -+ [0][0][1][0][RTW89_FCC][1][44] = 22, -+ [0][0][1][0][RTW89_FCC][2][44] = 70, -+ [0][0][1][0][RTW89_ETSI][1][44] = 66, -+ [0][0][1][0][RTW89_ETSI][0][44] = 30, -+ [0][0][1][0][RTW89_MKK][1][44] = 44, -+ [0][0][1][0][RTW89_MKK][0][44] = 28, -+ [0][0][1][0][RTW89_IC][1][44] = 22, -+ [0][0][1][0][RTW89_KCC][1][44] = 24, -+ [0][0][1][0][RTW89_KCC][0][44] = 26, -+ [0][0][1][0][RTW89_ACMA][1][44] = 66, -+ [0][0][1][0][RTW89_ACMA][0][44] = 30, -+ [0][0][1][0][RTW89_CHILE][1][44] = 22, -+ [0][0][1][0][RTW89_QATAR][1][44] = 66, -+ [0][0][1][0][RTW89_QATAR][0][44] = 30, -+ [0][0][1][0][RTW89_UK][1][44] = 66, -+ [0][0][1][0][RTW89_UK][0][44] = 30, -+ [0][0][1][0][RTW89_FCC][1][45] = 22, -+ [0][0][1][0][RTW89_FCC][2][45] = 127, -+ [0][0][1][0][RTW89_ETSI][1][45] = 127, -+ [0][0][1][0][RTW89_ETSI][0][45] = 127, -+ [0][0][1][0][RTW89_MKK][1][45] = 127, -+ [0][0][1][0][RTW89_MKK][0][45] = 127, -+ [0][0][1][0][RTW89_IC][1][45] = 22, -+ [0][0][1][0][RTW89_KCC][1][45] = 24, -+ [0][0][1][0][RTW89_KCC][0][45] = 127, -+ [0][0][1][0][RTW89_ACMA][1][45] = 127, -+ [0][0][1][0][RTW89_ACMA][0][45] = 127, -+ [0][0][1][0][RTW89_CHILE][1][45] = 22, -+ [0][0][1][0][RTW89_QATAR][1][45] = 127, -+ [0][0][1][0][RTW89_QATAR][0][45] = 127, -+ [0][0][1][0][RTW89_UK][1][45] = 127, -+ [0][0][1][0][RTW89_UK][0][45] = 127, -+ [0][0][1][0][RTW89_FCC][1][47] = 22, -+ [0][0][1][0][RTW89_FCC][2][47] = 127, -+ [0][0][1][0][RTW89_ETSI][1][47] = 127, -+ [0][0][1][0][RTW89_ETSI][0][47] = 127, -+ [0][0][1][0][RTW89_MKK][1][47] = 127, -+ [0][0][1][0][RTW89_MKK][0][47] = 127, -+ [0][0][1][0][RTW89_IC][1][47] = 22, -+ [0][0][1][0][RTW89_KCC][1][47] = 24, -+ [0][0][1][0][RTW89_KCC][0][47] = 127, -+ [0][0][1][0][RTW89_ACMA][1][47] = 127, -+ [0][0][1][0][RTW89_ACMA][0][47] = 127, -+ [0][0][1][0][RTW89_CHILE][1][47] = 22, -+ [0][0][1][0][RTW89_QATAR][1][47] = 127, -+ [0][0][1][0][RTW89_QATAR][0][47] = 127, -+ [0][0][1][0][RTW89_UK][1][47] = 127, -+ [0][0][1][0][RTW89_UK][0][47] = 127, -+ [0][0][1][0][RTW89_FCC][1][49] = 24, -+ [0][0][1][0][RTW89_FCC][2][49] = 127, -+ [0][0][1][0][RTW89_ETSI][1][49] = 127, -+ [0][0][1][0][RTW89_ETSI][0][49] = 127, -+ [0][0][1][0][RTW89_MKK][1][49] = 127, -+ [0][0][1][0][RTW89_MKK][0][49] = 127, -+ [0][0][1][0][RTW89_IC][1][49] = 24, -+ [0][0][1][0][RTW89_KCC][1][49] = 24, -+ [0][0][1][0][RTW89_KCC][0][49] = 127, -+ [0][0][1][0][RTW89_ACMA][1][49] = 127, -+ [0][0][1][0][RTW89_ACMA][0][49] = 127, -+ [0][0][1][0][RTW89_CHILE][1][49] = 24, -+ [0][0][1][0][RTW89_QATAR][1][49] = 127, -+ [0][0][1][0][RTW89_QATAR][0][49] = 127, -+ [0][0][1][0][RTW89_UK][1][49] = 127, -+ [0][0][1][0][RTW89_UK][0][49] = 127, -+ [0][0][1][0][RTW89_FCC][1][51] = 22, -+ [0][0][1][0][RTW89_FCC][2][51] = 127, -+ [0][0][1][0][RTW89_ETSI][1][51] = 127, -+ [0][0][1][0][RTW89_ETSI][0][51] = 127, -+ [0][0][1][0][RTW89_MKK][1][51] = 127, -+ [0][0][1][0][RTW89_MKK][0][51] = 127, -+ [0][0][1][0][RTW89_IC][1][51] = 22, -+ [0][0][1][0][RTW89_KCC][1][51] = 24, -+ [0][0][1][0][RTW89_KCC][0][51] = 127, -+ [0][0][1][0][RTW89_ACMA][1][51] = 127, -+ [0][0][1][0][RTW89_ACMA][0][51] = 127, -+ [0][0][1][0][RTW89_CHILE][1][51] = 22, -+ [0][0][1][0][RTW89_QATAR][1][51] = 127, -+ [0][0][1][0][RTW89_QATAR][0][51] = 127, -+ [0][0][1][0][RTW89_UK][1][51] = 127, -+ [0][0][1][0][RTW89_UK][0][51] = 127, -+ [0][0][1][0][RTW89_FCC][1][53] = 22, -+ [0][0][1][0][RTW89_FCC][2][53] = 127, -+ [0][0][1][0][RTW89_ETSI][1][53] = 127, -+ [0][0][1][0][RTW89_ETSI][0][53] = 127, -+ [0][0][1][0][RTW89_MKK][1][53] = 127, -+ [0][0][1][0][RTW89_MKK][0][53] = 127, -+ [0][0][1][0][RTW89_IC][1][53] = 22, -+ [0][0][1][0][RTW89_KCC][1][53] = 24, -+ [0][0][1][0][RTW89_KCC][0][53] = 127, -+ [0][0][1][0][RTW89_ACMA][1][53] = 127, -+ [0][0][1][0][RTW89_ACMA][0][53] = 127, -+ [0][0][1][0][RTW89_CHILE][1][53] = 22, -+ [0][0][1][0][RTW89_QATAR][1][53] = 127, -+ [0][0][1][0][RTW89_QATAR][0][53] = 127, -+ [0][0][1][0][RTW89_UK][1][53] = 127, -+ [0][0][1][0][RTW89_UK][0][53] = 127, -+ [0][0][1][0][RTW89_FCC][1][55] = 22, -+ [0][0][1][0][RTW89_FCC][2][55] = 68, -+ [0][0][1][0][RTW89_ETSI][1][55] = 127, -+ [0][0][1][0][RTW89_ETSI][0][55] = 127, -+ [0][0][1][0][RTW89_MKK][1][55] = 127, -+ [0][0][1][0][RTW89_MKK][0][55] = 127, -+ [0][0][1][0][RTW89_IC][1][55] = 22, -+ [0][0][1][0][RTW89_KCC][1][55] = 26, -+ [0][0][1][0][RTW89_KCC][0][55] = 127, -+ [0][0][1][0][RTW89_ACMA][1][55] = 127, -+ [0][0][1][0][RTW89_ACMA][0][55] = 127, -+ [0][0][1][0][RTW89_CHILE][1][55] = 22, -+ [0][0][1][0][RTW89_QATAR][1][55] = 127, -+ [0][0][1][0][RTW89_QATAR][0][55] = 127, -+ [0][0][1][0][RTW89_UK][1][55] = 127, -+ [0][0][1][0][RTW89_UK][0][55] = 127, -+ [0][0][1][0][RTW89_FCC][1][57] = 22, -+ [0][0][1][0][RTW89_FCC][2][57] = 68, -+ [0][0][1][0][RTW89_ETSI][1][57] = 127, -+ [0][0][1][0][RTW89_ETSI][0][57] = 127, -+ [0][0][1][0][RTW89_MKK][1][57] = 127, -+ [0][0][1][0][RTW89_MKK][0][57] = 127, -+ [0][0][1][0][RTW89_IC][1][57] = 22, -+ [0][0][1][0][RTW89_KCC][1][57] = 26, -+ [0][0][1][0][RTW89_KCC][0][57] = 127, -+ [0][0][1][0][RTW89_ACMA][1][57] = 127, -+ [0][0][1][0][RTW89_ACMA][0][57] = 127, -+ [0][0][1][0][RTW89_CHILE][1][57] = 22, -+ [0][0][1][0][RTW89_QATAR][1][57] = 127, -+ [0][0][1][0][RTW89_QATAR][0][57] = 127, -+ [0][0][1][0][RTW89_UK][1][57] = 127, -+ [0][0][1][0][RTW89_UK][0][57] = 127, -+ [0][0][1][0][RTW89_FCC][1][59] = 22, -+ [0][0][1][0][RTW89_FCC][2][59] = 68, -+ [0][0][1][0][RTW89_ETSI][1][59] = 127, -+ [0][0][1][0][RTW89_ETSI][0][59] = 127, -+ [0][0][1][0][RTW89_MKK][1][59] = 127, -+ [0][0][1][0][RTW89_MKK][0][59] = 127, -+ [0][0][1][0][RTW89_IC][1][59] = 22, -+ [0][0][1][0][RTW89_KCC][1][59] = 26, -+ [0][0][1][0][RTW89_KCC][0][59] = 127, -+ [0][0][1][0][RTW89_ACMA][1][59] = 127, -+ [0][0][1][0][RTW89_ACMA][0][59] = 127, -+ [0][0][1][0][RTW89_CHILE][1][59] = 22, -+ [0][0][1][0][RTW89_QATAR][1][59] = 127, -+ [0][0][1][0][RTW89_QATAR][0][59] = 127, -+ [0][0][1][0][RTW89_UK][1][59] = 127, -+ [0][0][1][0][RTW89_UK][0][59] = 127, -+ [0][0][1][0][RTW89_FCC][1][60] = 22, -+ [0][0][1][0][RTW89_FCC][2][60] = 68, -+ [0][0][1][0][RTW89_ETSI][1][60] = 127, -+ [0][0][1][0][RTW89_ETSI][0][60] = 127, -+ [0][0][1][0][RTW89_MKK][1][60] = 127, -+ [0][0][1][0][RTW89_MKK][0][60] = 127, -+ [0][0][1][0][RTW89_IC][1][60] = 22, -+ [0][0][1][0][RTW89_KCC][1][60] = 26, -+ [0][0][1][0][RTW89_KCC][0][60] = 127, -+ [0][0][1][0][RTW89_ACMA][1][60] = 127, -+ [0][0][1][0][RTW89_ACMA][0][60] = 127, -+ [0][0][1][0][RTW89_CHILE][1][60] = 22, -+ [0][0][1][0][RTW89_QATAR][1][60] = 127, -+ [0][0][1][0][RTW89_QATAR][0][60] = 127, -+ [0][0][1][0][RTW89_UK][1][60] = 127, -+ [0][0][1][0][RTW89_UK][0][60] = 127, -+ [0][0][1][0][RTW89_FCC][1][62] = 22, -+ [0][0][1][0][RTW89_FCC][2][62] = 68, -+ [0][0][1][0][RTW89_ETSI][1][62] = 127, -+ [0][0][1][0][RTW89_ETSI][0][62] = 127, -+ [0][0][1][0][RTW89_MKK][1][62] = 127, -+ [0][0][1][0][RTW89_MKK][0][62] = 127, -+ [0][0][1][0][RTW89_IC][1][62] = 22, -+ [0][0][1][0][RTW89_KCC][1][62] = 26, -+ [0][0][1][0][RTW89_KCC][0][62] = 127, -+ [0][0][1][0][RTW89_ACMA][1][62] = 127, -+ [0][0][1][0][RTW89_ACMA][0][62] = 127, -+ [0][0][1][0][RTW89_CHILE][1][62] = 22, -+ [0][0][1][0][RTW89_QATAR][1][62] = 127, -+ [0][0][1][0][RTW89_QATAR][0][62] = 127, -+ [0][0][1][0][RTW89_UK][1][62] = 127, -+ [0][0][1][0][RTW89_UK][0][62] = 127, -+ [0][0][1][0][RTW89_FCC][1][64] = 22, -+ [0][0][1][0][RTW89_FCC][2][64] = 68, -+ [0][0][1][0][RTW89_ETSI][1][64] = 127, -+ [0][0][1][0][RTW89_ETSI][0][64] = 127, -+ [0][0][1][0][RTW89_MKK][1][64] = 127, -+ [0][0][1][0][RTW89_MKK][0][64] = 127, -+ [0][0][1][0][RTW89_IC][1][64] = 22, -+ [0][0][1][0][RTW89_KCC][1][64] = 26, -+ [0][0][1][0][RTW89_KCC][0][64] = 127, -+ [0][0][1][0][RTW89_ACMA][1][64] = 127, -+ [0][0][1][0][RTW89_ACMA][0][64] = 127, -+ [0][0][1][0][RTW89_CHILE][1][64] = 22, -+ [0][0][1][0][RTW89_QATAR][1][64] = 127, -+ [0][0][1][0][RTW89_QATAR][0][64] = 127, -+ [0][0][1][0][RTW89_UK][1][64] = 127, -+ [0][0][1][0][RTW89_UK][0][64] = 127, -+ [0][0][1][0][RTW89_FCC][1][66] = 22, -+ [0][0][1][0][RTW89_FCC][2][66] = 68, -+ [0][0][1][0][RTW89_ETSI][1][66] = 127, -+ [0][0][1][0][RTW89_ETSI][0][66] = 127, -+ [0][0][1][0][RTW89_MKK][1][66] = 127, -+ [0][0][1][0][RTW89_MKK][0][66] = 127, -+ [0][0][1][0][RTW89_IC][1][66] = 22, -+ [0][0][1][0][RTW89_KCC][1][66] = 26, -+ [0][0][1][0][RTW89_KCC][0][66] = 127, -+ [0][0][1][0][RTW89_ACMA][1][66] = 127, -+ [0][0][1][0][RTW89_ACMA][0][66] = 127, -+ [0][0][1][0][RTW89_CHILE][1][66] = 22, -+ [0][0][1][0][RTW89_QATAR][1][66] = 127, -+ [0][0][1][0][RTW89_QATAR][0][66] = 127, -+ [0][0][1][0][RTW89_UK][1][66] = 127, -+ [0][0][1][0][RTW89_UK][0][66] = 127, -+ [0][0][1][0][RTW89_FCC][1][68] = 22, -+ [0][0][1][0][RTW89_FCC][2][68] = 68, -+ [0][0][1][0][RTW89_ETSI][1][68] = 127, -+ [0][0][1][0][RTW89_ETSI][0][68] = 127, -+ [0][0][1][0][RTW89_MKK][1][68] = 127, -+ [0][0][1][0][RTW89_MKK][0][68] = 127, -+ [0][0][1][0][RTW89_IC][1][68] = 22, -+ [0][0][1][0][RTW89_KCC][1][68] = 26, -+ [0][0][1][0][RTW89_KCC][0][68] = 127, -+ [0][0][1][0][RTW89_ACMA][1][68] = 127, -+ [0][0][1][0][RTW89_ACMA][0][68] = 127, -+ [0][0][1][0][RTW89_CHILE][1][68] = 22, -+ [0][0][1][0][RTW89_QATAR][1][68] = 127, -+ [0][0][1][0][RTW89_QATAR][0][68] = 127, -+ [0][0][1][0][RTW89_UK][1][68] = 127, -+ [0][0][1][0][RTW89_UK][0][68] = 127, -+ [0][0][1][0][RTW89_FCC][1][70] = 24, -+ [0][0][1][0][RTW89_FCC][2][70] = 68, -+ [0][0][1][0][RTW89_ETSI][1][70] = 127, -+ [0][0][1][0][RTW89_ETSI][0][70] = 127, -+ [0][0][1][0][RTW89_MKK][1][70] = 127, -+ [0][0][1][0][RTW89_MKK][0][70] = 127, -+ [0][0][1][0][RTW89_IC][1][70] = 24, -+ [0][0][1][0][RTW89_KCC][1][70] = 26, -+ [0][0][1][0][RTW89_KCC][0][70] = 127, -+ [0][0][1][0][RTW89_ACMA][1][70] = 127, -+ [0][0][1][0][RTW89_ACMA][0][70] = 127, -+ [0][0][1][0][RTW89_CHILE][1][70] = 24, -+ [0][0][1][0][RTW89_QATAR][1][70] = 127, -+ [0][0][1][0][RTW89_QATAR][0][70] = 127, -+ [0][0][1][0][RTW89_UK][1][70] = 127, -+ [0][0][1][0][RTW89_UK][0][70] = 127, -+ [0][0][1][0][RTW89_FCC][1][72] = 22, -+ [0][0][1][0][RTW89_FCC][2][72] = 68, -+ [0][0][1][0][RTW89_ETSI][1][72] = 127, -+ [0][0][1][0][RTW89_ETSI][0][72] = 127, -+ [0][0][1][0][RTW89_MKK][1][72] = 127, -+ [0][0][1][0][RTW89_MKK][0][72] = 127, -+ [0][0][1][0][RTW89_IC][1][72] = 22, -+ [0][0][1][0][RTW89_KCC][1][72] = 26, -+ [0][0][1][0][RTW89_KCC][0][72] = 127, -+ [0][0][1][0][RTW89_ACMA][1][72] = 127, -+ [0][0][1][0][RTW89_ACMA][0][72] = 127, -+ [0][0][1][0][RTW89_CHILE][1][72] = 22, -+ [0][0][1][0][RTW89_QATAR][1][72] = 127, -+ [0][0][1][0][RTW89_QATAR][0][72] = 127, -+ [0][0][1][0][RTW89_UK][1][72] = 127, -+ [0][0][1][0][RTW89_UK][0][72] = 127, -+ [0][0][1][0][RTW89_FCC][1][74] = 22, -+ [0][0][1][0][RTW89_FCC][2][74] = 68, -+ [0][0][1][0][RTW89_ETSI][1][74] = 127, -+ [0][0][1][0][RTW89_ETSI][0][74] = 127, -+ [0][0][1][0][RTW89_MKK][1][74] = 127, -+ [0][0][1][0][RTW89_MKK][0][74] = 127, -+ [0][0][1][0][RTW89_IC][1][74] = 22, -+ [0][0][1][0][RTW89_KCC][1][74] = 26, -+ [0][0][1][0][RTW89_KCC][0][74] = 127, -+ [0][0][1][0][RTW89_ACMA][1][74] = 127, -+ [0][0][1][0][RTW89_ACMA][0][74] = 127, -+ [0][0][1][0][RTW89_CHILE][1][74] = 22, -+ [0][0][1][0][RTW89_QATAR][1][74] = 127, -+ [0][0][1][0][RTW89_QATAR][0][74] = 127, -+ [0][0][1][0][RTW89_UK][1][74] = 127, -+ [0][0][1][0][RTW89_UK][0][74] = 127, -+ [0][0][1][0][RTW89_FCC][1][75] = 22, -+ [0][0][1][0][RTW89_FCC][2][75] = 68, -+ [0][0][1][0][RTW89_ETSI][1][75] = 127, -+ [0][0][1][0][RTW89_ETSI][0][75] = 127, -+ [0][0][1][0][RTW89_MKK][1][75] = 127, -+ [0][0][1][0][RTW89_MKK][0][75] = 127, -+ [0][0][1][0][RTW89_IC][1][75] = 22, -+ [0][0][1][0][RTW89_KCC][1][75] = 26, -+ [0][0][1][0][RTW89_KCC][0][75] = 127, -+ [0][0][1][0][RTW89_ACMA][1][75] = 127, -+ [0][0][1][0][RTW89_ACMA][0][75] = 127, -+ [0][0][1][0][RTW89_CHILE][1][75] = 22, -+ [0][0][1][0][RTW89_QATAR][1][75] = 127, -+ [0][0][1][0][RTW89_QATAR][0][75] = 127, -+ [0][0][1][0][RTW89_UK][1][75] = 127, -+ [0][0][1][0][RTW89_UK][0][75] = 127, -+ [0][0][1][0][RTW89_FCC][1][77] = 22, -+ [0][0][1][0][RTW89_FCC][2][77] = 68, -+ [0][0][1][0][RTW89_ETSI][1][77] = 127, -+ [0][0][1][0][RTW89_ETSI][0][77] = 127, -+ [0][0][1][0][RTW89_MKK][1][77] = 127, -+ [0][0][1][0][RTW89_MKK][0][77] = 127, -+ [0][0][1][0][RTW89_IC][1][77] = 22, -+ [0][0][1][0][RTW89_KCC][1][77] = 26, -+ [0][0][1][0][RTW89_KCC][0][77] = 127, -+ [0][0][1][0][RTW89_ACMA][1][77] = 127, -+ [0][0][1][0][RTW89_ACMA][0][77] = 127, -+ [0][0][1][0][RTW89_CHILE][1][77] = 22, -+ [0][0][1][0][RTW89_QATAR][1][77] = 127, -+ [0][0][1][0][RTW89_QATAR][0][77] = 127, -+ [0][0][1][0][RTW89_UK][1][77] = 127, -+ [0][0][1][0][RTW89_UK][0][77] = 127, -+ [0][0][1][0][RTW89_FCC][1][79] = 22, -+ [0][0][1][0][RTW89_FCC][2][79] = 68, -+ [0][0][1][0][RTW89_ETSI][1][79] = 127, -+ [0][0][1][0][RTW89_ETSI][0][79] = 127, -+ [0][0][1][0][RTW89_MKK][1][79] = 127, -+ [0][0][1][0][RTW89_MKK][0][79] = 127, -+ [0][0][1][0][RTW89_IC][1][79] = 22, -+ [0][0][1][0][RTW89_KCC][1][79] = 26, -+ [0][0][1][0][RTW89_KCC][0][79] = 127, -+ [0][0][1][0][RTW89_ACMA][1][79] = 127, -+ [0][0][1][0][RTW89_ACMA][0][79] = 127, -+ [0][0][1][0][RTW89_CHILE][1][79] = 22, -+ [0][0][1][0][RTW89_QATAR][1][79] = 127, -+ [0][0][1][0][RTW89_QATAR][0][79] = 127, -+ [0][0][1][0][RTW89_UK][1][79] = 127, -+ [0][0][1][0][RTW89_UK][0][79] = 127, -+ [0][0][1][0][RTW89_FCC][1][81] = 22, -+ [0][0][1][0][RTW89_FCC][2][81] = 68, -+ [0][0][1][0][RTW89_ETSI][1][81] = 127, -+ [0][0][1][0][RTW89_ETSI][0][81] = 127, -+ [0][0][1][0][RTW89_MKK][1][81] = 127, -+ [0][0][1][0][RTW89_MKK][0][81] = 127, -+ [0][0][1][0][RTW89_IC][1][81] = 22, -+ [0][0][1][0][RTW89_KCC][1][81] = 26, -+ [0][0][1][0][RTW89_KCC][0][81] = 127, -+ [0][0][1][0][RTW89_ACMA][1][81] = 127, -+ [0][0][1][0][RTW89_ACMA][0][81] = 127, -+ [0][0][1][0][RTW89_CHILE][1][81] = 22, -+ [0][0][1][0][RTW89_QATAR][1][81] = 127, -+ [0][0][1][0][RTW89_QATAR][0][81] = 127, -+ [0][0][1][0][RTW89_UK][1][81] = 127, -+ [0][0][1][0][RTW89_UK][0][81] = 127, -+ [0][0][1][0][RTW89_FCC][1][83] = 22, -+ [0][0][1][0][RTW89_FCC][2][83] = 68, -+ [0][0][1][0][RTW89_ETSI][1][83] = 127, -+ [0][0][1][0][RTW89_ETSI][0][83] = 127, -+ [0][0][1][0][RTW89_MKK][1][83] = 127, -+ [0][0][1][0][RTW89_MKK][0][83] = 127, -+ [0][0][1][0][RTW89_IC][1][83] = 22, -+ [0][0][1][0][RTW89_KCC][1][83] = 32, -+ [0][0][1][0][RTW89_KCC][0][83] = 127, -+ [0][0][1][0][RTW89_ACMA][1][83] = 127, -+ [0][0][1][0][RTW89_ACMA][0][83] = 127, -+ [0][0][1][0][RTW89_CHILE][1][83] = 22, -+ [0][0][1][0][RTW89_QATAR][1][83] = 127, -+ [0][0][1][0][RTW89_QATAR][0][83] = 127, -+ [0][0][1][0][RTW89_UK][1][83] = 127, -+ [0][0][1][0][RTW89_UK][0][83] = 127, -+ [0][0][1][0][RTW89_FCC][1][85] = 22, -+ [0][0][1][0][RTW89_FCC][2][85] = 68, -+ [0][0][1][0][RTW89_ETSI][1][85] = 127, -+ [0][0][1][0][RTW89_ETSI][0][85] = 127, -+ [0][0][1][0][RTW89_MKK][1][85] = 127, -+ [0][0][1][0][RTW89_MKK][0][85] = 127, -+ [0][0][1][0][RTW89_IC][1][85] = 22, -+ [0][0][1][0][RTW89_KCC][1][85] = 32, -+ [0][0][1][0][RTW89_KCC][0][85] = 127, -+ [0][0][1][0][RTW89_ACMA][1][85] = 127, -+ [0][0][1][0][RTW89_ACMA][0][85] = 127, -+ [0][0][1][0][RTW89_CHILE][1][85] = 22, -+ [0][0][1][0][RTW89_QATAR][1][85] = 127, -+ [0][0][1][0][RTW89_QATAR][0][85] = 127, -+ [0][0][1][0][RTW89_UK][1][85] = 127, -+ [0][0][1][0][RTW89_UK][0][85] = 127, -+ [0][0][1][0][RTW89_FCC][1][87] = 22, -+ [0][0][1][0][RTW89_FCC][2][87] = 127, -+ [0][0][1][0][RTW89_ETSI][1][87] = 127, -+ [0][0][1][0][RTW89_ETSI][0][87] = 127, -+ [0][0][1][0][RTW89_MKK][1][87] = 127, -+ [0][0][1][0][RTW89_MKK][0][87] = 127, -+ [0][0][1][0][RTW89_IC][1][87] = 22, -+ [0][0][1][0][RTW89_KCC][1][87] = 32, -+ [0][0][1][0][RTW89_KCC][0][87] = 127, -+ [0][0][1][0][RTW89_ACMA][1][87] = 127, -+ [0][0][1][0][RTW89_ACMA][0][87] = 127, -+ [0][0][1][0][RTW89_CHILE][1][87] = 22, -+ [0][0][1][0][RTW89_QATAR][1][87] = 127, -+ [0][0][1][0][RTW89_QATAR][0][87] = 127, -+ [0][0][1][0][RTW89_UK][1][87] = 127, -+ [0][0][1][0][RTW89_UK][0][87] = 127, -+ [0][0][1][0][RTW89_FCC][1][89] = 22, -+ [0][0][1][0][RTW89_FCC][2][89] = 127, -+ [0][0][1][0][RTW89_ETSI][1][89] = 127, -+ [0][0][1][0][RTW89_ETSI][0][89] = 127, -+ [0][0][1][0][RTW89_MKK][1][89] = 127, -+ [0][0][1][0][RTW89_MKK][0][89] = 127, -+ [0][0][1][0][RTW89_IC][1][89] = 22, -+ [0][0][1][0][RTW89_KCC][1][89] = 32, -+ [0][0][1][0][RTW89_KCC][0][89] = 127, -+ [0][0][1][0][RTW89_ACMA][1][89] = 127, -+ [0][0][1][0][RTW89_ACMA][0][89] = 127, -+ [0][0][1][0][RTW89_CHILE][1][89] = 22, -+ [0][0][1][0][RTW89_QATAR][1][89] = 127, -+ [0][0][1][0][RTW89_QATAR][0][89] = 127, -+ [0][0][1][0][RTW89_UK][1][89] = 127, -+ [0][0][1][0][RTW89_UK][0][89] = 127, -+ [0][0][1][0][RTW89_FCC][1][90] = 22, -+ [0][0][1][0][RTW89_FCC][2][90] = 127, -+ [0][0][1][0][RTW89_ETSI][1][90] = 127, -+ [0][0][1][0][RTW89_ETSI][0][90] = 127, -+ [0][0][1][0][RTW89_MKK][1][90] = 127, -+ [0][0][1][0][RTW89_MKK][0][90] = 127, -+ [0][0][1][0][RTW89_IC][1][90] = 22, -+ [0][0][1][0][RTW89_KCC][1][90] = 32, -+ [0][0][1][0][RTW89_KCC][0][90] = 127, -+ [0][0][1][0][RTW89_ACMA][1][90] = 127, -+ [0][0][1][0][RTW89_ACMA][0][90] = 127, -+ [0][0][1][0][RTW89_CHILE][1][90] = 22, -+ [0][0][1][0][RTW89_QATAR][1][90] = 127, -+ [0][0][1][0][RTW89_QATAR][0][90] = 127, -+ [0][0][1][0][RTW89_UK][1][90] = 127, -+ [0][0][1][0][RTW89_UK][0][90] = 127, -+ [0][0][1][0][RTW89_FCC][1][92] = 22, -+ [0][0][1][0][RTW89_FCC][2][92] = 127, -+ [0][0][1][0][RTW89_ETSI][1][92] = 127, -+ [0][0][1][0][RTW89_ETSI][0][92] = 127, -+ [0][0][1][0][RTW89_MKK][1][92] = 127, -+ [0][0][1][0][RTW89_MKK][0][92] = 127, -+ [0][0][1][0][RTW89_IC][1][92] = 22, -+ [0][0][1][0][RTW89_KCC][1][92] = 32, -+ [0][0][1][0][RTW89_KCC][0][92] = 127, -+ [0][0][1][0][RTW89_ACMA][1][92] = 127, -+ [0][0][1][0][RTW89_ACMA][0][92] = 127, -+ [0][0][1][0][RTW89_CHILE][1][92] = 22, -+ [0][0][1][0][RTW89_QATAR][1][92] = 127, -+ [0][0][1][0][RTW89_QATAR][0][92] = 127, -+ [0][0][1][0][RTW89_UK][1][92] = 127, -+ [0][0][1][0][RTW89_UK][0][92] = 127, -+ [0][0][1][0][RTW89_FCC][1][94] = 22, -+ [0][0][1][0][RTW89_FCC][2][94] = 127, -+ [0][0][1][0][RTW89_ETSI][1][94] = 127, -+ [0][0][1][0][RTW89_ETSI][0][94] = 127, -+ [0][0][1][0][RTW89_MKK][1][94] = 127, -+ [0][0][1][0][RTW89_MKK][0][94] = 127, -+ [0][0][1][0][RTW89_IC][1][94] = 22, -+ [0][0][1][0][RTW89_KCC][1][94] = 32, -+ [0][0][1][0][RTW89_KCC][0][94] = 127, -+ [0][0][1][0][RTW89_ACMA][1][94] = 127, -+ [0][0][1][0][RTW89_ACMA][0][94] = 127, -+ [0][0][1][0][RTW89_CHILE][1][94] = 22, -+ [0][0][1][0][RTW89_QATAR][1][94] = 127, -+ [0][0][1][0][RTW89_QATAR][0][94] = 127, -+ [0][0][1][0][RTW89_UK][1][94] = 127, -+ [0][0][1][0][RTW89_UK][0][94] = 127, -+ [0][0][1][0][RTW89_FCC][1][96] = 22, -+ [0][0][1][0][RTW89_FCC][2][96] = 127, -+ [0][0][1][0][RTW89_ETSI][1][96] = 127, -+ [0][0][1][0][RTW89_ETSI][0][96] = 127, -+ [0][0][1][0][RTW89_MKK][1][96] = 127, -+ [0][0][1][0][RTW89_MKK][0][96] = 127, -+ [0][0][1][0][RTW89_IC][1][96] = 22, -+ [0][0][1][0][RTW89_KCC][1][96] = 32, -+ [0][0][1][0][RTW89_KCC][0][96] = 127, -+ [0][0][1][0][RTW89_ACMA][1][96] = 127, -+ [0][0][1][0][RTW89_ACMA][0][96] = 127, -+ [0][0][1][0][RTW89_CHILE][1][96] = 22, -+ [0][0][1][0][RTW89_QATAR][1][96] = 127, -+ [0][0][1][0][RTW89_QATAR][0][96] = 127, -+ [0][0][1][0][RTW89_UK][1][96] = 127, -+ [0][0][1][0][RTW89_UK][0][96] = 127, -+ [0][0][1][0][RTW89_FCC][1][98] = 22, -+ [0][0][1][0][RTW89_FCC][2][98] = 127, -+ [0][0][1][0][RTW89_ETSI][1][98] = 127, -+ [0][0][1][0][RTW89_ETSI][0][98] = 127, -+ [0][0][1][0][RTW89_MKK][1][98] = 127, -+ [0][0][1][0][RTW89_MKK][0][98] = 127, -+ [0][0][1][0][RTW89_IC][1][98] = 22, -+ [0][0][1][0][RTW89_KCC][1][98] = 32, -+ [0][0][1][0][RTW89_KCC][0][98] = 127, -+ [0][0][1][0][RTW89_ACMA][1][98] = 127, -+ [0][0][1][0][RTW89_ACMA][0][98] = 127, -+ [0][0][1][0][RTW89_CHILE][1][98] = 22, -+ [0][0][1][0][RTW89_QATAR][1][98] = 127, -+ [0][0][1][0][RTW89_QATAR][0][98] = 127, -+ [0][0][1][0][RTW89_UK][1][98] = 127, -+ [0][0][1][0][RTW89_UK][0][98] = 127, -+ [0][0][1][0][RTW89_FCC][1][100] = 22, -+ [0][0][1][0][RTW89_FCC][2][100] = 127, -+ [0][0][1][0][RTW89_ETSI][1][100] = 127, -+ [0][0][1][0][RTW89_ETSI][0][100] = 127, -+ [0][0][1][0][RTW89_MKK][1][100] = 127, -+ [0][0][1][0][RTW89_MKK][0][100] = 127, -+ [0][0][1][0][RTW89_IC][1][100] = 22, -+ [0][0][1][0][RTW89_KCC][1][100] = 32, -+ [0][0][1][0][RTW89_KCC][0][100] = 127, -+ [0][0][1][0][RTW89_ACMA][1][100] = 127, -+ [0][0][1][0][RTW89_ACMA][0][100] = 127, -+ [0][0][1][0][RTW89_CHILE][1][100] = 22, -+ [0][0][1][0][RTW89_QATAR][1][100] = 127, -+ [0][0][1][0][RTW89_QATAR][0][100] = 127, -+ [0][0][1][0][RTW89_UK][1][100] = 127, -+ [0][0][1][0][RTW89_UK][0][100] = 127, -+ [0][0][1][0][RTW89_FCC][1][102] = 22, -+ [0][0][1][0][RTW89_FCC][2][102] = 127, -+ [0][0][1][0][RTW89_ETSI][1][102] = 127, -+ [0][0][1][0][RTW89_ETSI][0][102] = 127, -+ [0][0][1][0][RTW89_MKK][1][102] = 127, -+ [0][0][1][0][RTW89_MKK][0][102] = 127, -+ [0][0][1][0][RTW89_IC][1][102] = 22, -+ [0][0][1][0][RTW89_KCC][1][102] = 32, -+ [0][0][1][0][RTW89_KCC][0][102] = 127, -+ [0][0][1][0][RTW89_ACMA][1][102] = 127, -+ [0][0][1][0][RTW89_ACMA][0][102] = 127, -+ [0][0][1][0][RTW89_CHILE][1][102] = 22, -+ [0][0][1][0][RTW89_QATAR][1][102] = 127, -+ [0][0][1][0][RTW89_QATAR][0][102] = 127, -+ [0][0][1][0][RTW89_UK][1][102] = 127, -+ [0][0][1][0][RTW89_UK][0][102] = 127, -+ [0][0][1][0][RTW89_FCC][1][104] = 22, -+ [0][0][1][0][RTW89_FCC][2][104] = 127, -+ [0][0][1][0][RTW89_ETSI][1][104] = 127, -+ [0][0][1][0][RTW89_ETSI][0][104] = 127, -+ [0][0][1][0][RTW89_MKK][1][104] = 127, -+ [0][0][1][0][RTW89_MKK][0][104] = 127, -+ [0][0][1][0][RTW89_IC][1][104] = 22, -+ [0][0][1][0][RTW89_KCC][1][104] = 32, -+ [0][0][1][0][RTW89_KCC][0][104] = 127, -+ [0][0][1][0][RTW89_ACMA][1][104] = 127, -+ [0][0][1][0][RTW89_ACMA][0][104] = 127, -+ [0][0][1][0][RTW89_CHILE][1][104] = 22, -+ [0][0][1][0][RTW89_QATAR][1][104] = 127, -+ [0][0][1][0][RTW89_QATAR][0][104] = 127, -+ [0][0][1][0][RTW89_UK][1][104] = 127, -+ [0][0][1][0][RTW89_UK][0][104] = 127, -+ [0][0][1][0][RTW89_FCC][1][105] = 22, -+ [0][0][1][0][RTW89_FCC][2][105] = 127, -+ [0][0][1][0][RTW89_ETSI][1][105] = 127, -+ [0][0][1][0][RTW89_ETSI][0][105] = 127, -+ [0][0][1][0][RTW89_MKK][1][105] = 127, -+ [0][0][1][0][RTW89_MKK][0][105] = 127, -+ [0][0][1][0][RTW89_IC][1][105] = 22, -+ [0][0][1][0][RTW89_KCC][1][105] = 32, -+ [0][0][1][0][RTW89_KCC][0][105] = 127, -+ [0][0][1][0][RTW89_ACMA][1][105] = 127, -+ [0][0][1][0][RTW89_ACMA][0][105] = 127, -+ [0][0][1][0][RTW89_CHILE][1][105] = 22, -+ [0][0][1][0][RTW89_QATAR][1][105] = 127, -+ [0][0][1][0][RTW89_QATAR][0][105] = 127, -+ [0][0][1][0][RTW89_UK][1][105] = 127, -+ [0][0][1][0][RTW89_UK][0][105] = 127, -+ [0][0][1][0][RTW89_FCC][1][107] = 24, -+ [0][0][1][0][RTW89_FCC][2][107] = 127, -+ [0][0][1][0][RTW89_ETSI][1][107] = 127, -+ [0][0][1][0][RTW89_ETSI][0][107] = 127, -+ [0][0][1][0][RTW89_MKK][1][107] = 127, -+ [0][0][1][0][RTW89_MKK][0][107] = 127, -+ [0][0][1][0][RTW89_IC][1][107] = 24, -+ [0][0][1][0][RTW89_KCC][1][107] = 32, -+ [0][0][1][0][RTW89_KCC][0][107] = 127, -+ [0][0][1][0][RTW89_ACMA][1][107] = 127, -+ [0][0][1][0][RTW89_ACMA][0][107] = 127, -+ [0][0][1][0][RTW89_CHILE][1][107] = 24, -+ [0][0][1][0][RTW89_QATAR][1][107] = 127, -+ [0][0][1][0][RTW89_QATAR][0][107] = 127, -+ [0][0][1][0][RTW89_UK][1][107] = 127, -+ [0][0][1][0][RTW89_UK][0][107] = 127, -+ [0][0][1][0][RTW89_FCC][1][109] = 24, -+ [0][0][1][0][RTW89_FCC][2][109] = 127, -+ [0][0][1][0][RTW89_ETSI][1][109] = 127, -+ [0][0][1][0][RTW89_ETSI][0][109] = 127, -+ [0][0][1][0][RTW89_MKK][1][109] = 127, -+ [0][0][1][0][RTW89_MKK][0][109] = 127, -+ [0][0][1][0][RTW89_IC][1][109] = 24, -+ [0][0][1][0][RTW89_KCC][1][109] = 32, -+ [0][0][1][0][RTW89_KCC][0][109] = 127, -+ [0][0][1][0][RTW89_ACMA][1][109] = 127, -+ [0][0][1][0][RTW89_ACMA][0][109] = 127, -+ [0][0][1][0][RTW89_CHILE][1][109] = 24, -+ [0][0][1][0][RTW89_QATAR][1][109] = 127, -+ [0][0][1][0][RTW89_QATAR][0][109] = 127, -+ [0][0][1][0][RTW89_UK][1][109] = 127, -+ [0][0][1][0][RTW89_UK][0][109] = 127, -+ [0][0][1][0][RTW89_FCC][1][111] = 127, -+ [0][0][1][0][RTW89_FCC][2][111] = 127, -+ [0][0][1][0][RTW89_ETSI][1][111] = 127, -+ [0][0][1][0][RTW89_ETSI][0][111] = 127, -+ [0][0][1][0][RTW89_MKK][1][111] = 127, -+ [0][0][1][0][RTW89_MKK][0][111] = 127, -+ [0][0][1][0][RTW89_IC][1][111] = 127, -+ [0][0][1][0][RTW89_KCC][1][111] = 127, -+ [0][0][1][0][RTW89_KCC][0][111] = 127, -+ [0][0][1][0][RTW89_ACMA][1][111] = 127, -+ [0][0][1][0][RTW89_ACMA][0][111] = 127, -+ [0][0][1][0][RTW89_CHILE][1][111] = 127, -+ [0][0][1][0][RTW89_QATAR][1][111] = 127, -+ [0][0][1][0][RTW89_QATAR][0][111] = 127, -+ [0][0][1][0][RTW89_UK][1][111] = 127, -+ [0][0][1][0][RTW89_UK][0][111] = 127, -+ [0][0][1][0][RTW89_FCC][1][113] = 127, -+ [0][0][1][0][RTW89_FCC][2][113] = 127, -+ [0][0][1][0][RTW89_ETSI][1][113] = 127, -+ [0][0][1][0][RTW89_ETSI][0][113] = 127, -+ [0][0][1][0][RTW89_MKK][1][113] = 127, -+ [0][0][1][0][RTW89_MKK][0][113] = 127, -+ [0][0][1][0][RTW89_IC][1][113] = 127, -+ [0][0][1][0][RTW89_KCC][1][113] = 127, -+ [0][0][1][0][RTW89_KCC][0][113] = 127, -+ [0][0][1][0][RTW89_ACMA][1][113] = 127, -+ [0][0][1][0][RTW89_ACMA][0][113] = 127, -+ [0][0][1][0][RTW89_CHILE][1][113] = 127, -+ [0][0][1][0][RTW89_QATAR][1][113] = 127, -+ [0][0][1][0][RTW89_QATAR][0][113] = 127, -+ [0][0][1][0][RTW89_UK][1][113] = 127, -+ [0][0][1][0][RTW89_UK][0][113] = 127, -+ [0][0][1][0][RTW89_FCC][1][115] = 127, -+ [0][0][1][0][RTW89_FCC][2][115] = 127, -+ [0][0][1][0][RTW89_ETSI][1][115] = 127, -+ [0][0][1][0][RTW89_ETSI][0][115] = 127, -+ [0][0][1][0][RTW89_MKK][1][115] = 127, -+ [0][0][1][0][RTW89_MKK][0][115] = 127, -+ [0][0][1][0][RTW89_IC][1][115] = 127, -+ [0][0][1][0][RTW89_KCC][1][115] = 127, -+ [0][0][1][0][RTW89_KCC][0][115] = 127, -+ [0][0][1][0][RTW89_ACMA][1][115] = 127, -+ [0][0][1][0][RTW89_ACMA][0][115] = 127, -+ [0][0][1][0][RTW89_CHILE][1][115] = 127, -+ [0][0][1][0][RTW89_QATAR][1][115] = 127, -+ [0][0][1][0][RTW89_QATAR][0][115] = 127, -+ [0][0][1][0][RTW89_UK][1][115] = 127, -+ [0][0][1][0][RTW89_UK][0][115] = 127, -+ [0][0][1][0][RTW89_FCC][1][117] = 127, -+ [0][0][1][0][RTW89_FCC][2][117] = 127, -+ [0][0][1][0][RTW89_ETSI][1][117] = 127, -+ [0][0][1][0][RTW89_ETSI][0][117] = 127, -+ [0][0][1][0][RTW89_MKK][1][117] = 127, -+ [0][0][1][0][RTW89_MKK][0][117] = 127, -+ [0][0][1][0][RTW89_IC][1][117] = 127, -+ [0][0][1][0][RTW89_KCC][1][117] = 127, -+ [0][0][1][0][RTW89_KCC][0][117] = 127, -+ [0][0][1][0][RTW89_ACMA][1][117] = 127, -+ [0][0][1][0][RTW89_ACMA][0][117] = 127, -+ [0][0][1][0][RTW89_CHILE][1][117] = 127, -+ [0][0][1][0][RTW89_QATAR][1][117] = 127, -+ [0][0][1][0][RTW89_QATAR][0][117] = 127, -+ [0][0][1][0][RTW89_UK][1][117] = 127, -+ [0][0][1][0][RTW89_UK][0][117] = 127, -+ [0][0][1][0][RTW89_FCC][1][119] = 127, -+ [0][0][1][0][RTW89_FCC][2][119] = 127, -+ [0][0][1][0][RTW89_ETSI][1][119] = 127, -+ [0][0][1][0][RTW89_ETSI][0][119] = 127, -+ [0][0][1][0][RTW89_MKK][1][119] = 127, -+ [0][0][1][0][RTW89_MKK][0][119] = 127, -+ [0][0][1][0][RTW89_IC][1][119] = 127, -+ [0][0][1][0][RTW89_KCC][1][119] = 127, -+ [0][0][1][0][RTW89_KCC][0][119] = 127, -+ [0][0][1][0][RTW89_ACMA][1][119] = 127, -+ [0][0][1][0][RTW89_ACMA][0][119] = 127, -+ [0][0][1][0][RTW89_CHILE][1][119] = 127, -+ [0][0][1][0][RTW89_QATAR][1][119] = 127, -+ [0][0][1][0][RTW89_QATAR][0][119] = 127, -+ [0][0][1][0][RTW89_UK][1][119] = 127, -+ [0][0][1][0][RTW89_UK][0][119] = 127, -+ [0][1][1][0][RTW89_FCC][1][0] = -2, -+ [0][1][1][0][RTW89_FCC][2][0] = 54, -+ [0][1][1][0][RTW89_ETSI][1][0] = 54, -+ [0][1][1][0][RTW89_ETSI][0][0] = 18, -+ [0][1][1][0][RTW89_MKK][1][0] = 56, -+ [0][1][1][0][RTW89_MKK][0][0] = 16, -+ [0][1][1][0][RTW89_IC][1][0] = -2, -+ [0][1][1][0][RTW89_KCC][1][0] = 12, -+ [0][1][1][0][RTW89_KCC][0][0] = 10, -+ [0][1][1][0][RTW89_ACMA][1][0] = 54, -+ [0][1][1][0][RTW89_ACMA][0][0] = 18, -+ [0][1][1][0][RTW89_CHILE][1][0] = -2, -+ [0][1][1][0][RTW89_QATAR][1][0] = 54, -+ [0][1][1][0][RTW89_QATAR][0][0] = 18, -+ [0][1][1][0][RTW89_UK][1][0] = 54, -+ [0][1][1][0][RTW89_UK][0][0] = 18, -+ [0][1][1][0][RTW89_FCC][1][2] = -4, -+ [0][1][1][0][RTW89_FCC][2][2] = 54, -+ [0][1][1][0][RTW89_ETSI][1][2] = 54, -+ [0][1][1][0][RTW89_ETSI][0][2] = 18, -+ [0][1][1][0][RTW89_MKK][1][2] = 54, -+ [0][1][1][0][RTW89_MKK][0][2] = 16, -+ [0][1][1][0][RTW89_IC][1][2] = -4, -+ [0][1][1][0][RTW89_KCC][1][2] = 12, -+ [0][1][1][0][RTW89_KCC][0][2] = 12, -+ [0][1][1][0][RTW89_ACMA][1][2] = 54, -+ [0][1][1][0][RTW89_ACMA][0][2] = 18, -+ [0][1][1][0][RTW89_CHILE][1][2] = -4, -+ [0][1][1][0][RTW89_QATAR][1][2] = 54, -+ [0][1][1][0][RTW89_QATAR][0][2] = 18, -+ [0][1][1][0][RTW89_UK][1][2] = 54, -+ [0][1][1][0][RTW89_UK][0][2] = 18, -+ [0][1][1][0][RTW89_FCC][1][4] = -4, -+ [0][1][1][0][RTW89_FCC][2][4] = 54, -+ [0][1][1][0][RTW89_ETSI][1][4] = 54, -+ [0][1][1][0][RTW89_ETSI][0][4] = 18, -+ [0][1][1][0][RTW89_MKK][1][4] = 54, -+ [0][1][1][0][RTW89_MKK][0][4] = 16, -+ [0][1][1][0][RTW89_IC][1][4] = -4, -+ [0][1][1][0][RTW89_KCC][1][4] = 12, -+ [0][1][1][0][RTW89_KCC][0][4] = 12, -+ [0][1][1][0][RTW89_ACMA][1][4] = 54, -+ [0][1][1][0][RTW89_ACMA][0][4] = 18, -+ [0][1][1][0][RTW89_CHILE][1][4] = -4, -+ [0][1][1][0][RTW89_QATAR][1][4] = 54, -+ [0][1][1][0][RTW89_QATAR][0][4] = 18, -+ [0][1][1][0][RTW89_UK][1][4] = 54, -+ [0][1][1][0][RTW89_UK][0][4] = 18, -+ [0][1][1][0][RTW89_FCC][1][6] = -4, -+ [0][1][1][0][RTW89_FCC][2][6] = 54, -+ [0][1][1][0][RTW89_ETSI][1][6] = 54, -+ [0][1][1][0][RTW89_ETSI][0][6] = 18, -+ [0][1][1][0][RTW89_MKK][1][6] = 54, -+ [0][1][1][0][RTW89_MKK][0][6] = 16, -+ [0][1][1][0][RTW89_IC][1][6] = -4, -+ [0][1][1][0][RTW89_KCC][1][6] = 12, -+ [0][1][1][0][RTW89_KCC][0][6] = 12, -+ [0][1][1][0][RTW89_ACMA][1][6] = 54, -+ [0][1][1][0][RTW89_ACMA][0][6] = 18, -+ [0][1][1][0][RTW89_CHILE][1][6] = -4, -+ [0][1][1][0][RTW89_QATAR][1][6] = 54, -+ [0][1][1][0][RTW89_QATAR][0][6] = 18, -+ [0][1][1][0][RTW89_UK][1][6] = 54, -+ [0][1][1][0][RTW89_UK][0][6] = 18, -+ [0][1][1][0][RTW89_FCC][1][8] = -4, -+ [0][1][1][0][RTW89_FCC][2][8] = 54, -+ [0][1][1][0][RTW89_ETSI][1][8] = 54, -+ [0][1][1][0][RTW89_ETSI][0][8] = 18, -+ [0][1][1][0][RTW89_MKK][1][8] = 54, -+ [0][1][1][0][RTW89_MKK][0][8] = 16, -+ [0][1][1][0][RTW89_IC][1][8] = -4, -+ [0][1][1][0][RTW89_KCC][1][8] = 12, -+ [0][1][1][0][RTW89_KCC][0][8] = 12, -+ [0][1][1][0][RTW89_ACMA][1][8] = 54, -+ [0][1][1][0][RTW89_ACMA][0][8] = 18, -+ [0][1][1][0][RTW89_CHILE][1][8] = -4, -+ [0][1][1][0][RTW89_QATAR][1][8] = 54, -+ [0][1][1][0][RTW89_QATAR][0][8] = 18, -+ [0][1][1][0][RTW89_UK][1][8] = 54, -+ [0][1][1][0][RTW89_UK][0][8] = 18, -+ [0][1][1][0][RTW89_FCC][1][10] = -4, -+ [0][1][1][0][RTW89_FCC][2][10] = 54, -+ [0][1][1][0][RTW89_ETSI][1][10] = 54, -+ [0][1][1][0][RTW89_ETSI][0][10] = 18, -+ [0][1][1][0][RTW89_MKK][1][10] = 54, -+ [0][1][1][0][RTW89_MKK][0][10] = 16, -+ [0][1][1][0][RTW89_IC][1][10] = -4, -+ [0][1][1][0][RTW89_KCC][1][10] = 12, -+ [0][1][1][0][RTW89_KCC][0][10] = 12, -+ [0][1][1][0][RTW89_ACMA][1][10] = 54, -+ [0][1][1][0][RTW89_ACMA][0][10] = 18, -+ [0][1][1][0][RTW89_CHILE][1][10] = -4, -+ [0][1][1][0][RTW89_QATAR][1][10] = 54, -+ [0][1][1][0][RTW89_QATAR][0][10] = 18, -+ [0][1][1][0][RTW89_UK][1][10] = 54, -+ [0][1][1][0][RTW89_UK][0][10] = 18, -+ [0][1][1][0][RTW89_FCC][1][12] = -4, -+ [0][1][1][0][RTW89_FCC][2][12] = 54, -+ [0][1][1][0][RTW89_ETSI][1][12] = 54, -+ [0][1][1][0][RTW89_ETSI][0][12] = 18, -+ [0][1][1][0][RTW89_MKK][1][12] = 54, -+ [0][1][1][0][RTW89_MKK][0][12] = 16, -+ [0][1][1][0][RTW89_IC][1][12] = -4, -+ [0][1][1][0][RTW89_KCC][1][12] = 12, -+ [0][1][1][0][RTW89_KCC][0][12] = 12, -+ [0][1][1][0][RTW89_ACMA][1][12] = 54, -+ [0][1][1][0][RTW89_ACMA][0][12] = 18, -+ [0][1][1][0][RTW89_CHILE][1][12] = -4, -+ [0][1][1][0][RTW89_QATAR][1][12] = 54, -+ [0][1][1][0][RTW89_QATAR][0][12] = 18, -+ [0][1][1][0][RTW89_UK][1][12] = 54, -+ [0][1][1][0][RTW89_UK][0][12] = 18, -+ [0][1][1][0][RTW89_FCC][1][14] = -4, -+ [0][1][1][0][RTW89_FCC][2][14] = 54, -+ [0][1][1][0][RTW89_ETSI][1][14] = 54, -+ [0][1][1][0][RTW89_ETSI][0][14] = 18, -+ [0][1][1][0][RTW89_MKK][1][14] = 54, -+ [0][1][1][0][RTW89_MKK][0][14] = 16, -+ [0][1][1][0][RTW89_IC][1][14] = -4, -+ [0][1][1][0][RTW89_KCC][1][14] = 12, -+ [0][1][1][0][RTW89_KCC][0][14] = 12, -+ [0][1][1][0][RTW89_ACMA][1][14] = 54, -+ [0][1][1][0][RTW89_ACMA][0][14] = 18, -+ [0][1][1][0][RTW89_CHILE][1][14] = -4, -+ [0][1][1][0][RTW89_QATAR][1][14] = 54, -+ [0][1][1][0][RTW89_QATAR][0][14] = 18, -+ [0][1][1][0][RTW89_UK][1][14] = 54, -+ [0][1][1][0][RTW89_UK][0][14] = 18, -+ [0][1][1][0][RTW89_FCC][1][15] = -4, -+ [0][1][1][0][RTW89_FCC][2][15] = 54, -+ [0][1][1][0][RTW89_ETSI][1][15] = 54, -+ [0][1][1][0][RTW89_ETSI][0][15] = 18, -+ [0][1][1][0][RTW89_MKK][1][15] = 54, -+ [0][1][1][0][RTW89_MKK][0][15] = 16, -+ [0][1][1][0][RTW89_IC][1][15] = -4, -+ [0][1][1][0][RTW89_KCC][1][15] = 12, -+ [0][1][1][0][RTW89_KCC][0][15] = 12, -+ [0][1][1][0][RTW89_ACMA][1][15] = 54, -+ [0][1][1][0][RTW89_ACMA][0][15] = 18, -+ [0][1][1][0][RTW89_CHILE][1][15] = -4, -+ [0][1][1][0][RTW89_QATAR][1][15] = 54, -+ [0][1][1][0][RTW89_QATAR][0][15] = 18, -+ [0][1][1][0][RTW89_UK][1][15] = 54, -+ [0][1][1][0][RTW89_UK][0][15] = 18, -+ [0][1][1][0][RTW89_FCC][1][17] = -4, -+ [0][1][1][0][RTW89_FCC][2][17] = 54, -+ [0][1][1][0][RTW89_ETSI][1][17] = 54, -+ [0][1][1][0][RTW89_ETSI][0][17] = 18, -+ [0][1][1][0][RTW89_MKK][1][17] = 54, -+ [0][1][1][0][RTW89_MKK][0][17] = 16, -+ [0][1][1][0][RTW89_IC][1][17] = -4, -+ [0][1][1][0][RTW89_KCC][1][17] = 12, -+ [0][1][1][0][RTW89_KCC][0][17] = 12, -+ [0][1][1][0][RTW89_ACMA][1][17] = 54, -+ [0][1][1][0][RTW89_ACMA][0][17] = 18, -+ [0][1][1][0][RTW89_CHILE][1][17] = -4, -+ [0][1][1][0][RTW89_QATAR][1][17] = 54, -+ [0][1][1][0][RTW89_QATAR][0][17] = 18, -+ [0][1][1][0][RTW89_UK][1][17] = 54, -+ [0][1][1][0][RTW89_UK][0][17] = 18, -+ [0][1][1][0][RTW89_FCC][1][19] = -4, -+ [0][1][1][0][RTW89_FCC][2][19] = 54, -+ [0][1][1][0][RTW89_ETSI][1][19] = 54, -+ [0][1][1][0][RTW89_ETSI][0][19] = 18, -+ [0][1][1][0][RTW89_MKK][1][19] = 54, -+ [0][1][1][0][RTW89_MKK][0][19] = 16, -+ [0][1][1][0][RTW89_IC][1][19] = -4, -+ [0][1][1][0][RTW89_KCC][1][19] = 12, -+ [0][1][1][0][RTW89_KCC][0][19] = 12, -+ [0][1][1][0][RTW89_ACMA][1][19] = 54, -+ [0][1][1][0][RTW89_ACMA][0][19] = 18, -+ [0][1][1][0][RTW89_CHILE][1][19] = -4, -+ [0][1][1][0][RTW89_QATAR][1][19] = 54, -+ [0][1][1][0][RTW89_QATAR][0][19] = 18, -+ [0][1][1][0][RTW89_UK][1][19] = 54, -+ [0][1][1][0][RTW89_UK][0][19] = 18, -+ [0][1][1][0][RTW89_FCC][1][21] = -4, -+ [0][1][1][0][RTW89_FCC][2][21] = 54, -+ [0][1][1][0][RTW89_ETSI][1][21] = 54, -+ [0][1][1][0][RTW89_ETSI][0][21] = 18, -+ [0][1][1][0][RTW89_MKK][1][21] = 54, -+ [0][1][1][0][RTW89_MKK][0][21] = 16, -+ [0][1][1][0][RTW89_IC][1][21] = -4, -+ [0][1][1][0][RTW89_KCC][1][21] = 12, -+ [0][1][1][0][RTW89_KCC][0][21] = 12, -+ [0][1][1][0][RTW89_ACMA][1][21] = 54, -+ [0][1][1][0][RTW89_ACMA][0][21] = 18, -+ [0][1][1][0][RTW89_CHILE][1][21] = -4, -+ [0][1][1][0][RTW89_QATAR][1][21] = 54, -+ [0][1][1][0][RTW89_QATAR][0][21] = 18, -+ [0][1][1][0][RTW89_UK][1][21] = 54, -+ [0][1][1][0][RTW89_UK][0][21] = 18, -+ [0][1][1][0][RTW89_FCC][1][23] = -4, -+ [0][1][1][0][RTW89_FCC][2][23] = 68, -+ [0][1][1][0][RTW89_ETSI][1][23] = 54, -+ [0][1][1][0][RTW89_ETSI][0][23] = 18, -+ [0][1][1][0][RTW89_MKK][1][23] = 54, -+ [0][1][1][0][RTW89_MKK][0][23] = 16, -+ [0][1][1][0][RTW89_IC][1][23] = -4, -+ [0][1][1][0][RTW89_KCC][1][23] = 12, -+ [0][1][1][0][RTW89_KCC][0][23] = 10, -+ [0][1][1][0][RTW89_ACMA][1][23] = 54, -+ [0][1][1][0][RTW89_ACMA][0][23] = 18, -+ [0][1][1][0][RTW89_CHILE][1][23] = -4, -+ [0][1][1][0][RTW89_QATAR][1][23] = 54, -+ [0][1][1][0][RTW89_QATAR][0][23] = 18, -+ [0][1][1][0][RTW89_UK][1][23] = 54, -+ [0][1][1][0][RTW89_UK][0][23] = 18, -+ [0][1][1][0][RTW89_FCC][1][25] = -4, -+ [0][1][1][0][RTW89_FCC][2][25] = 68, -+ [0][1][1][0][RTW89_ETSI][1][25] = 54, -+ [0][1][1][0][RTW89_ETSI][0][25] = 18, -+ [0][1][1][0][RTW89_MKK][1][25] = 54, -+ [0][1][1][0][RTW89_MKK][0][25] = 16, -+ [0][1][1][0][RTW89_IC][1][25] = -4, -+ [0][1][1][0][RTW89_KCC][1][25] = 12, -+ [0][1][1][0][RTW89_KCC][0][25] = 14, -+ [0][1][1][0][RTW89_ACMA][1][25] = 54, -+ [0][1][1][0][RTW89_ACMA][0][25] = 18, -+ [0][1][1][0][RTW89_CHILE][1][25] = -4, -+ [0][1][1][0][RTW89_QATAR][1][25] = 54, -+ [0][1][1][0][RTW89_QATAR][0][25] = 18, -+ [0][1][1][0][RTW89_UK][1][25] = 54, -+ [0][1][1][0][RTW89_UK][0][25] = 18, -+ [0][1][1][0][RTW89_FCC][1][27] = -4, -+ [0][1][1][0][RTW89_FCC][2][27] = 68, -+ [0][1][1][0][RTW89_ETSI][1][27] = 54, -+ [0][1][1][0][RTW89_ETSI][0][27] = 18, -+ [0][1][1][0][RTW89_MKK][1][27] = 54, -+ [0][1][1][0][RTW89_MKK][0][27] = 16, -+ [0][1][1][0][RTW89_IC][1][27] = -4, -+ [0][1][1][0][RTW89_KCC][1][27] = 12, -+ [0][1][1][0][RTW89_KCC][0][27] = 14, -+ [0][1][1][0][RTW89_ACMA][1][27] = 54, -+ [0][1][1][0][RTW89_ACMA][0][27] = 18, -+ [0][1][1][0][RTW89_CHILE][1][27] = -4, -+ [0][1][1][0][RTW89_QATAR][1][27] = 54, -+ [0][1][1][0][RTW89_QATAR][0][27] = 18, -+ [0][1][1][0][RTW89_UK][1][27] = 54, -+ [0][1][1][0][RTW89_UK][0][27] = 18, -+ [0][1][1][0][RTW89_FCC][1][29] = -4, -+ [0][1][1][0][RTW89_FCC][2][29] = 68, -+ [0][1][1][0][RTW89_ETSI][1][29] = 54, -+ [0][1][1][0][RTW89_ETSI][0][29] = 18, -+ [0][1][1][0][RTW89_MKK][1][29] = 54, -+ [0][1][1][0][RTW89_MKK][0][29] = 16, -+ [0][1][1][0][RTW89_IC][1][29] = -4, -+ [0][1][1][0][RTW89_KCC][1][29] = 12, -+ [0][1][1][0][RTW89_KCC][0][29] = 14, -+ [0][1][1][0][RTW89_ACMA][1][29] = 54, -+ [0][1][1][0][RTW89_ACMA][0][29] = 18, -+ [0][1][1][0][RTW89_CHILE][1][29] = -4, -+ [0][1][1][0][RTW89_QATAR][1][29] = 54, -+ [0][1][1][0][RTW89_QATAR][0][29] = 18, -+ [0][1][1][0][RTW89_UK][1][29] = 54, -+ [0][1][1][0][RTW89_UK][0][29] = 18, -+ [0][1][1][0][RTW89_FCC][1][30] = -4, -+ [0][1][1][0][RTW89_FCC][2][30] = 68, -+ [0][1][1][0][RTW89_ETSI][1][30] = 54, -+ [0][1][1][0][RTW89_ETSI][0][30] = 18, -+ [0][1][1][0][RTW89_MKK][1][30] = 54, -+ [0][1][1][0][RTW89_MKK][0][30] = 16, -+ [0][1][1][0][RTW89_IC][1][30] = -4, -+ [0][1][1][0][RTW89_KCC][1][30] = 12, -+ [0][1][1][0][RTW89_KCC][0][30] = 14, -+ [0][1][1][0][RTW89_ACMA][1][30] = 54, -+ [0][1][1][0][RTW89_ACMA][0][30] = 18, -+ [0][1][1][0][RTW89_CHILE][1][30] = -4, -+ [0][1][1][0][RTW89_QATAR][1][30] = 54, -+ [0][1][1][0][RTW89_QATAR][0][30] = 18, -+ [0][1][1][0][RTW89_UK][1][30] = 54, -+ [0][1][1][0][RTW89_UK][0][30] = 18, -+ [0][1][1][0][RTW89_FCC][1][32] = -4, -+ [0][1][1][0][RTW89_FCC][2][32] = 68, -+ [0][1][1][0][RTW89_ETSI][1][32] = 54, -+ [0][1][1][0][RTW89_ETSI][0][32] = 18, -+ [0][1][1][0][RTW89_MKK][1][32] = 54, -+ [0][1][1][0][RTW89_MKK][0][32] = 16, -+ [0][1][1][0][RTW89_IC][1][32] = -4, -+ [0][1][1][0][RTW89_KCC][1][32] = 12, -+ [0][1][1][0][RTW89_KCC][0][32] = 14, -+ [0][1][1][0][RTW89_ACMA][1][32] = 54, -+ [0][1][1][0][RTW89_ACMA][0][32] = 18, -+ [0][1][1][0][RTW89_CHILE][1][32] = -4, -+ [0][1][1][0][RTW89_QATAR][1][32] = 54, -+ [0][1][1][0][RTW89_QATAR][0][32] = 18, -+ [0][1][1][0][RTW89_UK][1][32] = 54, -+ [0][1][1][0][RTW89_UK][0][32] = 18, -+ [0][1][1][0][RTW89_FCC][1][34] = -4, -+ [0][1][1][0][RTW89_FCC][2][34] = 68, -+ [0][1][1][0][RTW89_ETSI][1][34] = 54, -+ [0][1][1][0][RTW89_ETSI][0][34] = 18, -+ [0][1][1][0][RTW89_MKK][1][34] = 54, -+ [0][1][1][0][RTW89_MKK][0][34] = 16, -+ [0][1][1][0][RTW89_IC][1][34] = -4, -+ [0][1][1][0][RTW89_KCC][1][34] = 12, -+ [0][1][1][0][RTW89_KCC][0][34] = 14, -+ [0][1][1][0][RTW89_ACMA][1][34] = 54, -+ [0][1][1][0][RTW89_ACMA][0][34] = 18, -+ [0][1][1][0][RTW89_CHILE][1][34] = -4, -+ [0][1][1][0][RTW89_QATAR][1][34] = 54, -+ [0][1][1][0][RTW89_QATAR][0][34] = 18, -+ [0][1][1][0][RTW89_UK][1][34] = 54, -+ [0][1][1][0][RTW89_UK][0][34] = 18, -+ [0][1][1][0][RTW89_FCC][1][36] = -4, -+ [0][1][1][0][RTW89_FCC][2][36] = 68, -+ [0][1][1][0][RTW89_ETSI][1][36] = 54, -+ [0][1][1][0][RTW89_ETSI][0][36] = 18, -+ [0][1][1][0][RTW89_MKK][1][36] = 54, -+ [0][1][1][0][RTW89_MKK][0][36] = 16, -+ [0][1][1][0][RTW89_IC][1][36] = -4, -+ [0][1][1][0][RTW89_KCC][1][36] = 12, -+ [0][1][1][0][RTW89_KCC][0][36] = 14, -+ [0][1][1][0][RTW89_ACMA][1][36] = 54, -+ [0][1][1][0][RTW89_ACMA][0][36] = 18, -+ [0][1][1][0][RTW89_CHILE][1][36] = -4, -+ [0][1][1][0][RTW89_QATAR][1][36] = 54, -+ [0][1][1][0][RTW89_QATAR][0][36] = 18, -+ [0][1][1][0][RTW89_UK][1][36] = 54, -+ [0][1][1][0][RTW89_UK][0][36] = 18, -+ [0][1][1][0][RTW89_FCC][1][38] = -4, -+ [0][1][1][0][RTW89_FCC][2][38] = 68, -+ [0][1][1][0][RTW89_ETSI][1][38] = 54, -+ [0][1][1][0][RTW89_ETSI][0][38] = 18, -+ [0][1][1][0][RTW89_MKK][1][38] = 54, -+ [0][1][1][0][RTW89_MKK][0][38] = 16, -+ [0][1][1][0][RTW89_IC][1][38] = -4, -+ [0][1][1][0][RTW89_KCC][1][38] = 12, -+ [0][1][1][0][RTW89_KCC][0][38] = 14, -+ [0][1][1][0][RTW89_ACMA][1][38] = 54, -+ [0][1][1][0][RTW89_ACMA][0][38] = 18, -+ [0][1][1][0][RTW89_CHILE][1][38] = -4, -+ [0][1][1][0][RTW89_QATAR][1][38] = 54, -+ [0][1][1][0][RTW89_QATAR][0][38] = 18, -+ [0][1][1][0][RTW89_UK][1][38] = 54, -+ [0][1][1][0][RTW89_UK][0][38] = 18, -+ [0][1][1][0][RTW89_FCC][1][40] = -4, -+ [0][1][1][0][RTW89_FCC][2][40] = 68, -+ [0][1][1][0][RTW89_ETSI][1][40] = 54, -+ [0][1][1][0][RTW89_ETSI][0][40] = 18, -+ [0][1][1][0][RTW89_MKK][1][40] = 54, -+ [0][1][1][0][RTW89_MKK][0][40] = 16, -+ [0][1][1][0][RTW89_IC][1][40] = -4, -+ [0][1][1][0][RTW89_KCC][1][40] = 12, -+ [0][1][1][0][RTW89_KCC][0][40] = 14, -+ [0][1][1][0][RTW89_ACMA][1][40] = 54, -+ [0][1][1][0][RTW89_ACMA][0][40] = 18, -+ [0][1][1][0][RTW89_CHILE][1][40] = -4, -+ [0][1][1][0][RTW89_QATAR][1][40] = 54, -+ [0][1][1][0][RTW89_QATAR][0][40] = 18, -+ [0][1][1][0][RTW89_UK][1][40] = 54, -+ [0][1][1][0][RTW89_UK][0][40] = 18, -+ [0][1][1][0][RTW89_FCC][1][42] = -4, -+ [0][1][1][0][RTW89_FCC][2][42] = 68, -+ [0][1][1][0][RTW89_ETSI][1][42] = 54, -+ [0][1][1][0][RTW89_ETSI][0][42] = 18, -+ [0][1][1][0][RTW89_MKK][1][42] = 54, -+ [0][1][1][0][RTW89_MKK][0][42] = 16, -+ [0][1][1][0][RTW89_IC][1][42] = -4, -+ [0][1][1][0][RTW89_KCC][1][42] = 12, -+ [0][1][1][0][RTW89_KCC][0][42] = 14, -+ [0][1][1][0][RTW89_ACMA][1][42] = 54, -+ [0][1][1][0][RTW89_ACMA][0][42] = 18, -+ [0][1][1][0][RTW89_CHILE][1][42] = -4, -+ [0][1][1][0][RTW89_QATAR][1][42] = 54, -+ [0][1][1][0][RTW89_QATAR][0][42] = 18, -+ [0][1][1][0][RTW89_UK][1][42] = 54, -+ [0][1][1][0][RTW89_UK][0][42] = 18, -+ [0][1][1][0][RTW89_FCC][1][44] = -2, -+ [0][1][1][0][RTW89_FCC][2][44] = 68, -+ [0][1][1][0][RTW89_ETSI][1][44] = 54, -+ [0][1][1][0][RTW89_ETSI][0][44] = 18, -+ [0][1][1][0][RTW89_MKK][1][44] = 34, -+ [0][1][1][0][RTW89_MKK][0][44] = 16, -+ [0][1][1][0][RTW89_IC][1][44] = -2, -+ [0][1][1][0][RTW89_KCC][1][44] = 12, -+ [0][1][1][0][RTW89_KCC][0][44] = 12, -+ [0][1][1][0][RTW89_ACMA][1][44] = 54, -+ [0][1][1][0][RTW89_ACMA][0][44] = 18, -+ [0][1][1][0][RTW89_CHILE][1][44] = -2, -+ [0][1][1][0][RTW89_QATAR][1][44] = 54, -+ [0][1][1][0][RTW89_QATAR][0][44] = 18, -+ [0][1][1][0][RTW89_UK][1][44] = 54, -+ [0][1][1][0][RTW89_UK][0][44] = 18, -+ [0][1][1][0][RTW89_FCC][1][45] = -2, -+ [0][1][1][0][RTW89_FCC][2][45] = 127, -+ [0][1][1][0][RTW89_ETSI][1][45] = 127, -+ [0][1][1][0][RTW89_ETSI][0][45] = 127, -+ [0][1][1][0][RTW89_MKK][1][45] = 127, -+ [0][1][1][0][RTW89_MKK][0][45] = 127, -+ [0][1][1][0][RTW89_IC][1][45] = -2, -+ [0][1][1][0][RTW89_KCC][1][45] = 12, -+ [0][1][1][0][RTW89_KCC][0][45] = 127, -+ [0][1][1][0][RTW89_ACMA][1][45] = 127, -+ [0][1][1][0][RTW89_ACMA][0][45] = 127, -+ [0][1][1][0][RTW89_CHILE][1][45] = -2, -+ [0][1][1][0][RTW89_QATAR][1][45] = 127, -+ [0][1][1][0][RTW89_QATAR][0][45] = 127, -+ [0][1][1][0][RTW89_UK][1][45] = 127, -+ [0][1][1][0][RTW89_UK][0][45] = 127, -+ [0][1][1][0][RTW89_FCC][1][47] = -2, -+ [0][1][1][0][RTW89_FCC][2][47] = 127, -+ [0][1][1][0][RTW89_ETSI][1][47] = 127, -+ [0][1][1][0][RTW89_ETSI][0][47] = 127, -+ [0][1][1][0][RTW89_MKK][1][47] = 127, -+ [0][1][1][0][RTW89_MKK][0][47] = 127, -+ [0][1][1][0][RTW89_IC][1][47] = -2, -+ [0][1][1][0][RTW89_KCC][1][47] = 12, -+ [0][1][1][0][RTW89_KCC][0][47] = 127, -+ [0][1][1][0][RTW89_ACMA][1][47] = 127, -+ [0][1][1][0][RTW89_ACMA][0][47] = 127, -+ [0][1][1][0][RTW89_CHILE][1][47] = -2, -+ [0][1][1][0][RTW89_QATAR][1][47] = 127, -+ [0][1][1][0][RTW89_QATAR][0][47] = 127, -+ [0][1][1][0][RTW89_UK][1][47] = 127, -+ [0][1][1][0][RTW89_UK][0][47] = 127, -+ [0][1][1][0][RTW89_FCC][1][49] = -2, -+ [0][1][1][0][RTW89_FCC][2][49] = 127, -+ [0][1][1][0][RTW89_ETSI][1][49] = 127, -+ [0][1][1][0][RTW89_ETSI][0][49] = 127, -+ [0][1][1][0][RTW89_MKK][1][49] = 127, -+ [0][1][1][0][RTW89_MKK][0][49] = 127, -+ [0][1][1][0][RTW89_IC][1][49] = -2, -+ [0][1][1][0][RTW89_KCC][1][49] = 12, -+ [0][1][1][0][RTW89_KCC][0][49] = 127, -+ [0][1][1][0][RTW89_ACMA][1][49] = 127, -+ [0][1][1][0][RTW89_ACMA][0][49] = 127, -+ [0][1][1][0][RTW89_CHILE][1][49] = -2, -+ [0][1][1][0][RTW89_QATAR][1][49] = 127, -+ [0][1][1][0][RTW89_QATAR][0][49] = 127, -+ [0][1][1][0][RTW89_UK][1][49] = 127, -+ [0][1][1][0][RTW89_UK][0][49] = 127, -+ [0][1][1][0][RTW89_FCC][1][51] = -2, -+ [0][1][1][0][RTW89_FCC][2][51] = 127, -+ [0][1][1][0][RTW89_ETSI][1][51] = 127, -+ [0][1][1][0][RTW89_ETSI][0][51] = 127, -+ [0][1][1][0][RTW89_MKK][1][51] = 127, -+ [0][1][1][0][RTW89_MKK][0][51] = 127, -+ [0][1][1][0][RTW89_IC][1][51] = -2, -+ [0][1][1][0][RTW89_KCC][1][51] = 12, -+ [0][1][1][0][RTW89_KCC][0][51] = 127, -+ [0][1][1][0][RTW89_ACMA][1][51] = 127, -+ [0][1][1][0][RTW89_ACMA][0][51] = 127, -+ [0][1][1][0][RTW89_CHILE][1][51] = -2, -+ [0][1][1][0][RTW89_QATAR][1][51] = 127, -+ [0][1][1][0][RTW89_QATAR][0][51] = 127, -+ [0][1][1][0][RTW89_UK][1][51] = 127, -+ [0][1][1][0][RTW89_UK][0][51] = 127, -+ [0][1][1][0][RTW89_FCC][1][53] = -2, -+ [0][1][1][0][RTW89_FCC][2][53] = 127, -+ [0][1][1][0][RTW89_ETSI][1][53] = 127, -+ [0][1][1][0][RTW89_ETSI][0][53] = 127, -+ [0][1][1][0][RTW89_MKK][1][53] = 127, -+ [0][1][1][0][RTW89_MKK][0][53] = 127, -+ [0][1][1][0][RTW89_IC][1][53] = -2, -+ [0][1][1][0][RTW89_KCC][1][53] = 12, -+ [0][1][1][0][RTW89_KCC][0][53] = 127, -+ [0][1][1][0][RTW89_ACMA][1][53] = 127, -+ [0][1][1][0][RTW89_ACMA][0][53] = 127, -+ [0][1][1][0][RTW89_CHILE][1][53] = -2, -+ [0][1][1][0][RTW89_QATAR][1][53] = 127, -+ [0][1][1][0][RTW89_QATAR][0][53] = 127, -+ [0][1][1][0][RTW89_UK][1][53] = 127, -+ [0][1][1][0][RTW89_UK][0][53] = 127, -+ [0][1][1][0][RTW89_FCC][1][55] = -2, -+ [0][1][1][0][RTW89_FCC][2][55] = 68, -+ [0][1][1][0][RTW89_ETSI][1][55] = 127, -+ [0][1][1][0][RTW89_ETSI][0][55] = 127, -+ [0][1][1][0][RTW89_MKK][1][55] = 127, -+ [0][1][1][0][RTW89_MKK][0][55] = 127, -+ [0][1][1][0][RTW89_IC][1][55] = -2, -+ [0][1][1][0][RTW89_KCC][1][55] = 12, -+ [0][1][1][0][RTW89_KCC][0][55] = 127, -+ [0][1][1][0][RTW89_ACMA][1][55] = 127, -+ [0][1][1][0][RTW89_ACMA][0][55] = 127, -+ [0][1][1][0][RTW89_CHILE][1][55] = -2, -+ [0][1][1][0][RTW89_QATAR][1][55] = 127, -+ [0][1][1][0][RTW89_QATAR][0][55] = 127, -+ [0][1][1][0][RTW89_UK][1][55] = 127, -+ [0][1][1][0][RTW89_UK][0][55] = 127, -+ [0][1][1][0][RTW89_FCC][1][57] = -2, -+ [0][1][1][0][RTW89_FCC][2][57] = 68, -+ [0][1][1][0][RTW89_ETSI][1][57] = 127, -+ [0][1][1][0][RTW89_ETSI][0][57] = 127, -+ [0][1][1][0][RTW89_MKK][1][57] = 127, -+ [0][1][1][0][RTW89_MKK][0][57] = 127, -+ [0][1][1][0][RTW89_IC][1][57] = -2, -+ [0][1][1][0][RTW89_KCC][1][57] = 12, -+ [0][1][1][0][RTW89_KCC][0][57] = 127, -+ [0][1][1][0][RTW89_ACMA][1][57] = 127, -+ [0][1][1][0][RTW89_ACMA][0][57] = 127, -+ [0][1][1][0][RTW89_CHILE][1][57] = -2, -+ [0][1][1][0][RTW89_QATAR][1][57] = 127, -+ [0][1][1][0][RTW89_QATAR][0][57] = 127, -+ [0][1][1][0][RTW89_UK][1][57] = 127, -+ [0][1][1][0][RTW89_UK][0][57] = 127, -+ [0][1][1][0][RTW89_FCC][1][59] = -2, -+ [0][1][1][0][RTW89_FCC][2][59] = 68, -+ [0][1][1][0][RTW89_ETSI][1][59] = 127, -+ [0][1][1][0][RTW89_ETSI][0][59] = 127, -+ [0][1][1][0][RTW89_MKK][1][59] = 127, -+ [0][1][1][0][RTW89_MKK][0][59] = 127, -+ [0][1][1][0][RTW89_IC][1][59] = -2, -+ [0][1][1][0][RTW89_KCC][1][59] = 12, -+ [0][1][1][0][RTW89_KCC][0][59] = 127, -+ [0][1][1][0][RTW89_ACMA][1][59] = 127, -+ [0][1][1][0][RTW89_ACMA][0][59] = 127, -+ [0][1][1][0][RTW89_CHILE][1][59] = -2, -+ [0][1][1][0][RTW89_QATAR][1][59] = 127, -+ [0][1][1][0][RTW89_QATAR][0][59] = 127, -+ [0][1][1][0][RTW89_UK][1][59] = 127, -+ [0][1][1][0][RTW89_UK][0][59] = 127, -+ [0][1][1][0][RTW89_FCC][1][60] = -2, -+ [0][1][1][0][RTW89_FCC][2][60] = 68, -+ [0][1][1][0][RTW89_ETSI][1][60] = 127, -+ [0][1][1][0][RTW89_ETSI][0][60] = 127, -+ [0][1][1][0][RTW89_MKK][1][60] = 127, -+ [0][1][1][0][RTW89_MKK][0][60] = 127, -+ [0][1][1][0][RTW89_IC][1][60] = -2, -+ [0][1][1][0][RTW89_KCC][1][60] = 12, -+ [0][1][1][0][RTW89_KCC][0][60] = 127, -+ [0][1][1][0][RTW89_ACMA][1][60] = 127, -+ [0][1][1][0][RTW89_ACMA][0][60] = 127, -+ [0][1][1][0][RTW89_CHILE][1][60] = -2, -+ [0][1][1][0][RTW89_QATAR][1][60] = 127, -+ [0][1][1][0][RTW89_QATAR][0][60] = 127, -+ [0][1][1][0][RTW89_UK][1][60] = 127, -+ [0][1][1][0][RTW89_UK][0][60] = 127, -+ [0][1][1][0][RTW89_FCC][1][62] = -2, -+ [0][1][1][0][RTW89_FCC][2][62] = 68, -+ [0][1][1][0][RTW89_ETSI][1][62] = 127, -+ [0][1][1][0][RTW89_ETSI][0][62] = 127, -+ [0][1][1][0][RTW89_MKK][1][62] = 127, -+ [0][1][1][0][RTW89_MKK][0][62] = 127, -+ [0][1][1][0][RTW89_IC][1][62] = -2, -+ [0][1][1][0][RTW89_KCC][1][62] = 12, -+ [0][1][1][0][RTW89_KCC][0][62] = 127, -+ [0][1][1][0][RTW89_ACMA][1][62] = 127, -+ [0][1][1][0][RTW89_ACMA][0][62] = 127, -+ [0][1][1][0][RTW89_CHILE][1][62] = -2, -+ [0][1][1][0][RTW89_QATAR][1][62] = 127, -+ [0][1][1][0][RTW89_QATAR][0][62] = 127, -+ [0][1][1][0][RTW89_UK][1][62] = 127, -+ [0][1][1][0][RTW89_UK][0][62] = 127, -+ [0][1][1][0][RTW89_FCC][1][64] = -2, -+ [0][1][1][0][RTW89_FCC][2][64] = 68, -+ [0][1][1][0][RTW89_ETSI][1][64] = 127, -+ [0][1][1][0][RTW89_ETSI][0][64] = 127, -+ [0][1][1][0][RTW89_MKK][1][64] = 127, -+ [0][1][1][0][RTW89_MKK][0][64] = 127, -+ [0][1][1][0][RTW89_IC][1][64] = -2, -+ [0][1][1][0][RTW89_KCC][1][64] = 12, -+ [0][1][1][0][RTW89_KCC][0][64] = 127, -+ [0][1][1][0][RTW89_ACMA][1][64] = 127, -+ [0][1][1][0][RTW89_ACMA][0][64] = 127, -+ [0][1][1][0][RTW89_CHILE][1][64] = -2, -+ [0][1][1][0][RTW89_QATAR][1][64] = 127, -+ [0][1][1][0][RTW89_QATAR][0][64] = 127, -+ [0][1][1][0][RTW89_UK][1][64] = 127, -+ [0][1][1][0][RTW89_UK][0][64] = 127, -+ [0][1][1][0][RTW89_FCC][1][66] = -2, -+ [0][1][1][0][RTW89_FCC][2][66] = 68, -+ [0][1][1][0][RTW89_ETSI][1][66] = 127, -+ [0][1][1][0][RTW89_ETSI][0][66] = 127, -+ [0][1][1][0][RTW89_MKK][1][66] = 127, -+ [0][1][1][0][RTW89_MKK][0][66] = 127, -+ [0][1][1][0][RTW89_IC][1][66] = -2, -+ [0][1][1][0][RTW89_KCC][1][66] = 12, -+ [0][1][1][0][RTW89_KCC][0][66] = 127, -+ [0][1][1][0][RTW89_ACMA][1][66] = 127, -+ [0][1][1][0][RTW89_ACMA][0][66] = 127, -+ [0][1][1][0][RTW89_CHILE][1][66] = -2, -+ [0][1][1][0][RTW89_QATAR][1][66] = 127, -+ [0][1][1][0][RTW89_QATAR][0][66] = 127, -+ [0][1][1][0][RTW89_UK][1][66] = 127, -+ [0][1][1][0][RTW89_UK][0][66] = 127, -+ [0][1][1][0][RTW89_FCC][1][68] = -2, -+ [0][1][1][0][RTW89_FCC][2][68] = 68, -+ [0][1][1][0][RTW89_ETSI][1][68] = 127, -+ [0][1][1][0][RTW89_ETSI][0][68] = 127, -+ [0][1][1][0][RTW89_MKK][1][68] = 127, -+ [0][1][1][0][RTW89_MKK][0][68] = 127, -+ [0][1][1][0][RTW89_IC][1][68] = -2, -+ [0][1][1][0][RTW89_KCC][1][68] = 12, -+ [0][1][1][0][RTW89_KCC][0][68] = 127, -+ [0][1][1][0][RTW89_ACMA][1][68] = 127, -+ [0][1][1][0][RTW89_ACMA][0][68] = 127, -+ [0][1][1][0][RTW89_CHILE][1][68] = -2, -+ [0][1][1][0][RTW89_QATAR][1][68] = 127, -+ [0][1][1][0][RTW89_QATAR][0][68] = 127, -+ [0][1][1][0][RTW89_UK][1][68] = 127, -+ [0][1][1][0][RTW89_UK][0][68] = 127, -+ [0][1][1][0][RTW89_FCC][1][70] = -2, -+ [0][1][1][0][RTW89_FCC][2][70] = 68, -+ [0][1][1][0][RTW89_ETSI][1][70] = 127, -+ [0][1][1][0][RTW89_ETSI][0][70] = 127, -+ [0][1][1][0][RTW89_MKK][1][70] = 127, -+ [0][1][1][0][RTW89_MKK][0][70] = 127, -+ [0][1][1][0][RTW89_IC][1][70] = -2, -+ [0][1][1][0][RTW89_KCC][1][70] = 12, -+ [0][1][1][0][RTW89_KCC][0][70] = 127, -+ [0][1][1][0][RTW89_ACMA][1][70] = 127, -+ [0][1][1][0][RTW89_ACMA][0][70] = 127, -+ [0][1][1][0][RTW89_CHILE][1][70] = -2, -+ [0][1][1][0][RTW89_QATAR][1][70] = 127, -+ [0][1][1][0][RTW89_QATAR][0][70] = 127, -+ [0][1][1][0][RTW89_UK][1][70] = 127, -+ [0][1][1][0][RTW89_UK][0][70] = 127, -+ [0][1][1][0][RTW89_FCC][1][72] = -2, -+ [0][1][1][0][RTW89_FCC][2][72] = 68, -+ [0][1][1][0][RTW89_ETSI][1][72] = 127, -+ [0][1][1][0][RTW89_ETSI][0][72] = 127, -+ [0][1][1][0][RTW89_MKK][1][72] = 127, -+ [0][1][1][0][RTW89_MKK][0][72] = 127, -+ [0][1][1][0][RTW89_IC][1][72] = -2, -+ [0][1][1][0][RTW89_KCC][1][72] = 12, -+ [0][1][1][0][RTW89_KCC][0][72] = 127, -+ [0][1][1][0][RTW89_ACMA][1][72] = 127, -+ [0][1][1][0][RTW89_ACMA][0][72] = 127, -+ [0][1][1][0][RTW89_CHILE][1][72] = -2, -+ [0][1][1][0][RTW89_QATAR][1][72] = 127, -+ [0][1][1][0][RTW89_QATAR][0][72] = 127, -+ [0][1][1][0][RTW89_UK][1][72] = 127, -+ [0][1][1][0][RTW89_UK][0][72] = 127, -+ [0][1][1][0][RTW89_FCC][1][74] = -2, -+ [0][1][1][0][RTW89_FCC][2][74] = 68, -+ [0][1][1][0][RTW89_ETSI][1][74] = 127, -+ [0][1][1][0][RTW89_ETSI][0][74] = 127, -+ [0][1][1][0][RTW89_MKK][1][74] = 127, -+ [0][1][1][0][RTW89_MKK][0][74] = 127, -+ [0][1][1][0][RTW89_IC][1][74] = -2, -+ [0][1][1][0][RTW89_KCC][1][74] = 12, -+ [0][1][1][0][RTW89_KCC][0][74] = 127, -+ [0][1][1][0][RTW89_ACMA][1][74] = 127, -+ [0][1][1][0][RTW89_ACMA][0][74] = 127, -+ [0][1][1][0][RTW89_CHILE][1][74] = -2, -+ [0][1][1][0][RTW89_QATAR][1][74] = 127, -+ [0][1][1][0][RTW89_QATAR][0][74] = 127, -+ [0][1][1][0][RTW89_UK][1][74] = 127, -+ [0][1][1][0][RTW89_UK][0][74] = 127, -+ [0][1][1][0][RTW89_FCC][1][75] = -2, -+ [0][1][1][0][RTW89_FCC][2][75] = 68, -+ [0][1][1][0][RTW89_ETSI][1][75] = 127, -+ [0][1][1][0][RTW89_ETSI][0][75] = 127, -+ [0][1][1][0][RTW89_MKK][1][75] = 127, -+ [0][1][1][0][RTW89_MKK][0][75] = 127, -+ [0][1][1][0][RTW89_IC][1][75] = -2, -+ [0][1][1][0][RTW89_KCC][1][75] = 12, -+ [0][1][1][0][RTW89_KCC][0][75] = 127, -+ [0][1][1][0][RTW89_ACMA][1][75] = 127, -+ [0][1][1][0][RTW89_ACMA][0][75] = 127, -+ [0][1][1][0][RTW89_CHILE][1][75] = -2, -+ [0][1][1][0][RTW89_QATAR][1][75] = 127, -+ [0][1][1][0][RTW89_QATAR][0][75] = 127, -+ [0][1][1][0][RTW89_UK][1][75] = 127, -+ [0][1][1][0][RTW89_UK][0][75] = 127, -+ [0][1][1][0][RTW89_FCC][1][77] = -2, -+ [0][1][1][0][RTW89_FCC][2][77] = 68, -+ [0][1][1][0][RTW89_ETSI][1][77] = 127, -+ [0][1][1][0][RTW89_ETSI][0][77] = 127, -+ [0][1][1][0][RTW89_MKK][1][77] = 127, -+ [0][1][1][0][RTW89_MKK][0][77] = 127, -+ [0][1][1][0][RTW89_IC][1][77] = -2, -+ [0][1][1][0][RTW89_KCC][1][77] = 12, -+ [0][1][1][0][RTW89_KCC][0][77] = 127, -+ [0][1][1][0][RTW89_ACMA][1][77] = 127, -+ [0][1][1][0][RTW89_ACMA][0][77] = 127, -+ [0][1][1][0][RTW89_CHILE][1][77] = -2, -+ [0][1][1][0][RTW89_QATAR][1][77] = 127, -+ [0][1][1][0][RTW89_QATAR][0][77] = 127, -+ [0][1][1][0][RTW89_UK][1][77] = 127, -+ [0][1][1][0][RTW89_UK][0][77] = 127, -+ [0][1][1][0][RTW89_FCC][1][79] = -2, -+ [0][1][1][0][RTW89_FCC][2][79] = 68, -+ [0][1][1][0][RTW89_ETSI][1][79] = 127, -+ [0][1][1][0][RTW89_ETSI][0][79] = 127, -+ [0][1][1][0][RTW89_MKK][1][79] = 127, -+ [0][1][1][0][RTW89_MKK][0][79] = 127, -+ [0][1][1][0][RTW89_IC][1][79] = -2, -+ [0][1][1][0][RTW89_KCC][1][79] = 12, -+ [0][1][1][0][RTW89_KCC][0][79] = 127, -+ [0][1][1][0][RTW89_ACMA][1][79] = 127, -+ [0][1][1][0][RTW89_ACMA][0][79] = 127, -+ [0][1][1][0][RTW89_CHILE][1][79] = -2, -+ [0][1][1][0][RTW89_QATAR][1][79] = 127, -+ [0][1][1][0][RTW89_QATAR][0][79] = 127, -+ [0][1][1][0][RTW89_UK][1][79] = 127, -+ [0][1][1][0][RTW89_UK][0][79] = 127, -+ [0][1][1][0][RTW89_FCC][1][81] = -2, -+ [0][1][1][0][RTW89_FCC][2][81] = 68, -+ [0][1][1][0][RTW89_ETSI][1][81] = 127, -+ [0][1][1][0][RTW89_ETSI][0][81] = 127, -+ [0][1][1][0][RTW89_MKK][1][81] = 127, -+ [0][1][1][0][RTW89_MKK][0][81] = 127, -+ [0][1][1][0][RTW89_IC][1][81] = -2, -+ [0][1][1][0][RTW89_KCC][1][81] = 12, -+ [0][1][1][0][RTW89_KCC][0][81] = 127, -+ [0][1][1][0][RTW89_ACMA][1][81] = 127, -+ [0][1][1][0][RTW89_ACMA][0][81] = 127, -+ [0][1][1][0][RTW89_CHILE][1][81] = -2, -+ [0][1][1][0][RTW89_QATAR][1][81] = 127, -+ [0][1][1][0][RTW89_QATAR][0][81] = 127, -+ [0][1][1][0][RTW89_UK][1][81] = 127, -+ [0][1][1][0][RTW89_UK][0][81] = 127, -+ [0][1][1][0][RTW89_FCC][1][83] = -2, -+ [0][1][1][0][RTW89_FCC][2][83] = 68, -+ [0][1][1][0][RTW89_ETSI][1][83] = 127, -+ [0][1][1][0][RTW89_ETSI][0][83] = 127, -+ [0][1][1][0][RTW89_MKK][1][83] = 127, -+ [0][1][1][0][RTW89_MKK][0][83] = 127, -+ [0][1][1][0][RTW89_IC][1][83] = -2, -+ [0][1][1][0][RTW89_KCC][1][83] = 20, -+ [0][1][1][0][RTW89_KCC][0][83] = 127, -+ [0][1][1][0][RTW89_ACMA][1][83] = 127, -+ [0][1][1][0][RTW89_ACMA][0][83] = 127, -+ [0][1][1][0][RTW89_CHILE][1][83] = -2, -+ [0][1][1][0][RTW89_QATAR][1][83] = 127, -+ [0][1][1][0][RTW89_QATAR][0][83] = 127, -+ [0][1][1][0][RTW89_UK][1][83] = 127, -+ [0][1][1][0][RTW89_UK][0][83] = 127, -+ [0][1][1][0][RTW89_FCC][1][85] = -2, -+ [0][1][1][0][RTW89_FCC][2][85] = 68, -+ [0][1][1][0][RTW89_ETSI][1][85] = 127, -+ [0][1][1][0][RTW89_ETSI][0][85] = 127, -+ [0][1][1][0][RTW89_MKK][1][85] = 127, -+ [0][1][1][0][RTW89_MKK][0][85] = 127, -+ [0][1][1][0][RTW89_IC][1][85] = -2, -+ [0][1][1][0][RTW89_KCC][1][85] = 20, -+ [0][1][1][0][RTW89_KCC][0][85] = 127, -+ [0][1][1][0][RTW89_ACMA][1][85] = 127, -+ [0][1][1][0][RTW89_ACMA][0][85] = 127, -+ [0][1][1][0][RTW89_CHILE][1][85] = -2, -+ [0][1][1][0][RTW89_QATAR][1][85] = 127, -+ [0][1][1][0][RTW89_QATAR][0][85] = 127, -+ [0][1][1][0][RTW89_UK][1][85] = 127, -+ [0][1][1][0][RTW89_UK][0][85] = 127, -+ [0][1][1][0][RTW89_FCC][1][87] = -2, -+ [0][1][1][0][RTW89_FCC][2][87] = 127, -+ [0][1][1][0][RTW89_ETSI][1][87] = 127, -+ [0][1][1][0][RTW89_ETSI][0][87] = 127, -+ [0][1][1][0][RTW89_MKK][1][87] = 127, -+ [0][1][1][0][RTW89_MKK][0][87] = 127, -+ [0][1][1][0][RTW89_IC][1][87] = -2, -+ [0][1][1][0][RTW89_KCC][1][87] = 20, -+ [0][1][1][0][RTW89_KCC][0][87] = 127, -+ [0][1][1][0][RTW89_ACMA][1][87] = 127, -+ [0][1][1][0][RTW89_ACMA][0][87] = 127, -+ [0][1][1][0][RTW89_CHILE][1][87] = -2, -+ [0][1][1][0][RTW89_QATAR][1][87] = 127, -+ [0][1][1][0][RTW89_QATAR][0][87] = 127, -+ [0][1][1][0][RTW89_UK][1][87] = 127, -+ [0][1][1][0][RTW89_UK][0][87] = 127, -+ [0][1][1][0][RTW89_FCC][1][89] = -2, -+ [0][1][1][0][RTW89_FCC][2][89] = 127, -+ [0][1][1][0][RTW89_ETSI][1][89] = 127, -+ [0][1][1][0][RTW89_ETSI][0][89] = 127, -+ [0][1][1][0][RTW89_MKK][1][89] = 127, -+ [0][1][1][0][RTW89_MKK][0][89] = 127, -+ [0][1][1][0][RTW89_IC][1][89] = -2, -+ [0][1][1][0][RTW89_KCC][1][89] = 20, -+ [0][1][1][0][RTW89_KCC][0][89] = 127, -+ [0][1][1][0][RTW89_ACMA][1][89] = 127, -+ [0][1][1][0][RTW89_ACMA][0][89] = 127, -+ [0][1][1][0][RTW89_CHILE][1][89] = -2, -+ [0][1][1][0][RTW89_QATAR][1][89] = 127, -+ [0][1][1][0][RTW89_QATAR][0][89] = 127, -+ [0][1][1][0][RTW89_UK][1][89] = 127, -+ [0][1][1][0][RTW89_UK][0][89] = 127, -+ [0][1][1][0][RTW89_FCC][1][90] = -2, -+ [0][1][1][0][RTW89_FCC][2][90] = 127, -+ [0][1][1][0][RTW89_ETSI][1][90] = 127, -+ [0][1][1][0][RTW89_ETSI][0][90] = 127, -+ [0][1][1][0][RTW89_MKK][1][90] = 127, -+ [0][1][1][0][RTW89_MKK][0][90] = 127, -+ [0][1][1][0][RTW89_IC][1][90] = -2, -+ [0][1][1][0][RTW89_KCC][1][90] = 20, -+ [0][1][1][0][RTW89_KCC][0][90] = 127, -+ [0][1][1][0][RTW89_ACMA][1][90] = 127, -+ [0][1][1][0][RTW89_ACMA][0][90] = 127, -+ [0][1][1][0][RTW89_CHILE][1][90] = -2, -+ [0][1][1][0][RTW89_QATAR][1][90] = 127, -+ [0][1][1][0][RTW89_QATAR][0][90] = 127, -+ [0][1][1][0][RTW89_UK][1][90] = 127, -+ [0][1][1][0][RTW89_UK][0][90] = 127, -+ [0][1][1][0][RTW89_FCC][1][92] = -2, -+ [0][1][1][0][RTW89_FCC][2][92] = 127, -+ [0][1][1][0][RTW89_ETSI][1][92] = 127, -+ [0][1][1][0][RTW89_ETSI][0][92] = 127, -+ [0][1][1][0][RTW89_MKK][1][92] = 127, -+ [0][1][1][0][RTW89_MKK][0][92] = 127, -+ [0][1][1][0][RTW89_IC][1][92] = -2, -+ [0][1][1][0][RTW89_KCC][1][92] = 20, -+ [0][1][1][0][RTW89_KCC][0][92] = 127, -+ [0][1][1][0][RTW89_ACMA][1][92] = 127, -+ [0][1][1][0][RTW89_ACMA][0][92] = 127, -+ [0][1][1][0][RTW89_CHILE][1][92] = -2, -+ [0][1][1][0][RTW89_QATAR][1][92] = 127, -+ [0][1][1][0][RTW89_QATAR][0][92] = 127, -+ [0][1][1][0][RTW89_UK][1][92] = 127, -+ [0][1][1][0][RTW89_UK][0][92] = 127, -+ [0][1][1][0][RTW89_FCC][1][94] = -2, -+ [0][1][1][0][RTW89_FCC][2][94] = 127, -+ [0][1][1][0][RTW89_ETSI][1][94] = 127, -+ [0][1][1][0][RTW89_ETSI][0][94] = 127, -+ [0][1][1][0][RTW89_MKK][1][94] = 127, -+ [0][1][1][0][RTW89_MKK][0][94] = 127, -+ [0][1][1][0][RTW89_IC][1][94] = -2, -+ [0][1][1][0][RTW89_KCC][1][94] = 20, -+ [0][1][1][0][RTW89_KCC][0][94] = 127, -+ [0][1][1][0][RTW89_ACMA][1][94] = 127, -+ [0][1][1][0][RTW89_ACMA][0][94] = 127, -+ [0][1][1][0][RTW89_CHILE][1][94] = -2, -+ [0][1][1][0][RTW89_QATAR][1][94] = 127, -+ [0][1][1][0][RTW89_QATAR][0][94] = 127, -+ [0][1][1][0][RTW89_UK][1][94] = 127, -+ [0][1][1][0][RTW89_UK][0][94] = 127, -+ [0][1][1][0][RTW89_FCC][1][96] = -2, -+ [0][1][1][0][RTW89_FCC][2][96] = 127, -+ [0][1][1][0][RTW89_ETSI][1][96] = 127, -+ [0][1][1][0][RTW89_ETSI][0][96] = 127, -+ [0][1][1][0][RTW89_MKK][1][96] = 127, -+ [0][1][1][0][RTW89_MKK][0][96] = 127, -+ [0][1][1][0][RTW89_IC][1][96] = -2, -+ [0][1][1][0][RTW89_KCC][1][96] = 20, -+ [0][1][1][0][RTW89_KCC][0][96] = 127, -+ [0][1][1][0][RTW89_ACMA][1][96] = 127, -+ [0][1][1][0][RTW89_ACMA][0][96] = 127, -+ [0][1][1][0][RTW89_CHILE][1][96] = -2, -+ [0][1][1][0][RTW89_QATAR][1][96] = 127, -+ [0][1][1][0][RTW89_QATAR][0][96] = 127, -+ [0][1][1][0][RTW89_UK][1][96] = 127, -+ [0][1][1][0][RTW89_UK][0][96] = 127, -+ [0][1][1][0][RTW89_FCC][1][98] = -2, -+ [0][1][1][0][RTW89_FCC][2][98] = 127, -+ [0][1][1][0][RTW89_ETSI][1][98] = 127, -+ [0][1][1][0][RTW89_ETSI][0][98] = 127, -+ [0][1][1][0][RTW89_MKK][1][98] = 127, -+ [0][1][1][0][RTW89_MKK][0][98] = 127, -+ [0][1][1][0][RTW89_IC][1][98] = -2, -+ [0][1][1][0][RTW89_KCC][1][98] = 20, -+ [0][1][1][0][RTW89_KCC][0][98] = 127, -+ [0][1][1][0][RTW89_ACMA][1][98] = 127, -+ [0][1][1][0][RTW89_ACMA][0][98] = 127, -+ [0][1][1][0][RTW89_CHILE][1][98] = -2, -+ [0][1][1][0][RTW89_QATAR][1][98] = 127, -+ [0][1][1][0][RTW89_QATAR][0][98] = 127, -+ [0][1][1][0][RTW89_UK][1][98] = 127, -+ [0][1][1][0][RTW89_UK][0][98] = 127, -+ [0][1][1][0][RTW89_FCC][1][100] = -2, -+ [0][1][1][0][RTW89_FCC][2][100] = 127, -+ [0][1][1][0][RTW89_ETSI][1][100] = 127, -+ [0][1][1][0][RTW89_ETSI][0][100] = 127, -+ [0][1][1][0][RTW89_MKK][1][100] = 127, -+ [0][1][1][0][RTW89_MKK][0][100] = 127, -+ [0][1][1][0][RTW89_IC][1][100] = -2, -+ [0][1][1][0][RTW89_KCC][1][100] = 20, -+ [0][1][1][0][RTW89_KCC][0][100] = 127, -+ [0][1][1][0][RTW89_ACMA][1][100] = 127, -+ [0][1][1][0][RTW89_ACMA][0][100] = 127, -+ [0][1][1][0][RTW89_CHILE][1][100] = -2, -+ [0][1][1][0][RTW89_QATAR][1][100] = 127, -+ [0][1][1][0][RTW89_QATAR][0][100] = 127, -+ [0][1][1][0][RTW89_UK][1][100] = 127, -+ [0][1][1][0][RTW89_UK][0][100] = 127, -+ [0][1][1][0][RTW89_FCC][1][102] = -2, -+ [0][1][1][0][RTW89_FCC][2][102] = 127, -+ [0][1][1][0][RTW89_ETSI][1][102] = 127, -+ [0][1][1][0][RTW89_ETSI][0][102] = 127, -+ [0][1][1][0][RTW89_MKK][1][102] = 127, -+ [0][1][1][0][RTW89_MKK][0][102] = 127, -+ [0][1][1][0][RTW89_IC][1][102] = -2, -+ [0][1][1][0][RTW89_KCC][1][102] = 20, -+ [0][1][1][0][RTW89_KCC][0][102] = 127, -+ [0][1][1][0][RTW89_ACMA][1][102] = 127, -+ [0][1][1][0][RTW89_ACMA][0][102] = 127, -+ [0][1][1][0][RTW89_CHILE][1][102] = -2, -+ [0][1][1][0][RTW89_QATAR][1][102] = 127, -+ [0][1][1][0][RTW89_QATAR][0][102] = 127, -+ [0][1][1][0][RTW89_UK][1][102] = 127, -+ [0][1][1][0][RTW89_UK][0][102] = 127, -+ [0][1][1][0][RTW89_FCC][1][104] = -2, -+ [0][1][1][0][RTW89_FCC][2][104] = 127, -+ [0][1][1][0][RTW89_ETSI][1][104] = 127, -+ [0][1][1][0][RTW89_ETSI][0][104] = 127, -+ [0][1][1][0][RTW89_MKK][1][104] = 127, -+ [0][1][1][0][RTW89_MKK][0][104] = 127, -+ [0][1][1][0][RTW89_IC][1][104] = -2, -+ [0][1][1][0][RTW89_KCC][1][104] = 20, -+ [0][1][1][0][RTW89_KCC][0][104] = 127, -+ [0][1][1][0][RTW89_ACMA][1][104] = 127, -+ [0][1][1][0][RTW89_ACMA][0][104] = 127, -+ [0][1][1][0][RTW89_CHILE][1][104] = -2, -+ [0][1][1][0][RTW89_QATAR][1][104] = 127, -+ [0][1][1][0][RTW89_QATAR][0][104] = 127, -+ [0][1][1][0][RTW89_UK][1][104] = 127, -+ [0][1][1][0][RTW89_UK][0][104] = 127, -+ [0][1][1][0][RTW89_FCC][1][105] = -2, -+ [0][1][1][0][RTW89_FCC][2][105] = 127, -+ [0][1][1][0][RTW89_ETSI][1][105] = 127, -+ [0][1][1][0][RTW89_ETSI][0][105] = 127, -+ [0][1][1][0][RTW89_MKK][1][105] = 127, -+ [0][1][1][0][RTW89_MKK][0][105] = 127, -+ [0][1][1][0][RTW89_IC][1][105] = -2, -+ [0][1][1][0][RTW89_KCC][1][105] = 20, -+ [0][1][1][0][RTW89_KCC][0][105] = 127, -+ [0][1][1][0][RTW89_ACMA][1][105] = 127, -+ [0][1][1][0][RTW89_ACMA][0][105] = 127, -+ [0][1][1][0][RTW89_CHILE][1][105] = -2, -+ [0][1][1][0][RTW89_QATAR][1][105] = 127, -+ [0][1][1][0][RTW89_QATAR][0][105] = 127, -+ [0][1][1][0][RTW89_UK][1][105] = 127, -+ [0][1][1][0][RTW89_UK][0][105] = 127, -+ [0][1][1][0][RTW89_FCC][1][107] = 1, -+ [0][1][1][0][RTW89_FCC][2][107] = 127, -+ [0][1][1][0][RTW89_ETSI][1][107] = 127, -+ [0][1][1][0][RTW89_ETSI][0][107] = 127, -+ [0][1][1][0][RTW89_MKK][1][107] = 127, -+ [0][1][1][0][RTW89_MKK][0][107] = 127, -+ [0][1][1][0][RTW89_IC][1][107] = 1, -+ [0][1][1][0][RTW89_KCC][1][107] = 20, -+ [0][1][1][0][RTW89_KCC][0][107] = 127, -+ [0][1][1][0][RTW89_ACMA][1][107] = 127, -+ [0][1][1][0][RTW89_ACMA][0][107] = 127, -+ [0][1][1][0][RTW89_CHILE][1][107] = 1, -+ [0][1][1][0][RTW89_QATAR][1][107] = 127, -+ [0][1][1][0][RTW89_QATAR][0][107] = 127, -+ [0][1][1][0][RTW89_UK][1][107] = 127, -+ [0][1][1][0][RTW89_UK][0][107] = 127, -+ [0][1][1][0][RTW89_FCC][1][109] = 1, -+ [0][1][1][0][RTW89_FCC][2][109] = 127, -+ [0][1][1][0][RTW89_ETSI][1][109] = 127, -+ [0][1][1][0][RTW89_ETSI][0][109] = 127, -+ [0][1][1][0][RTW89_MKK][1][109] = 127, -+ [0][1][1][0][RTW89_MKK][0][109] = 127, -+ [0][1][1][0][RTW89_IC][1][109] = 1, -+ [0][1][1][0][RTW89_KCC][1][109] = 20, -+ [0][1][1][0][RTW89_KCC][0][109] = 127, -+ [0][1][1][0][RTW89_ACMA][1][109] = 127, -+ [0][1][1][0][RTW89_ACMA][0][109] = 127, -+ [0][1][1][0][RTW89_CHILE][1][109] = 1, -+ [0][1][1][0][RTW89_QATAR][1][109] = 127, -+ [0][1][1][0][RTW89_QATAR][0][109] = 127, -+ [0][1][1][0][RTW89_UK][1][109] = 127, -+ [0][1][1][0][RTW89_UK][0][109] = 127, -+ [0][1][1][0][RTW89_FCC][1][111] = 127, -+ [0][1][1][0][RTW89_FCC][2][111] = 127, -+ [0][1][1][0][RTW89_ETSI][1][111] = 127, -+ [0][1][1][0][RTW89_ETSI][0][111] = 127, -+ [0][1][1][0][RTW89_MKK][1][111] = 127, -+ [0][1][1][0][RTW89_MKK][0][111] = 127, -+ [0][1][1][0][RTW89_IC][1][111] = 127, -+ [0][1][1][0][RTW89_KCC][1][111] = 127, -+ [0][1][1][0][RTW89_KCC][0][111] = 127, -+ [0][1][1][0][RTW89_ACMA][1][111] = 127, -+ [0][1][1][0][RTW89_ACMA][0][111] = 127, -+ [0][1][1][0][RTW89_CHILE][1][111] = 127, -+ [0][1][1][0][RTW89_QATAR][1][111] = 127, -+ [0][1][1][0][RTW89_QATAR][0][111] = 127, -+ [0][1][1][0][RTW89_UK][1][111] = 127, -+ [0][1][1][0][RTW89_UK][0][111] = 127, -+ [0][1][1][0][RTW89_FCC][1][113] = 127, -+ [0][1][1][0][RTW89_FCC][2][113] = 127, -+ [0][1][1][0][RTW89_ETSI][1][113] = 127, -+ [0][1][1][0][RTW89_ETSI][0][113] = 127, -+ [0][1][1][0][RTW89_MKK][1][113] = 127, -+ [0][1][1][0][RTW89_MKK][0][113] = 127, -+ [0][1][1][0][RTW89_IC][1][113] = 127, -+ [0][1][1][0][RTW89_KCC][1][113] = 127, -+ [0][1][1][0][RTW89_KCC][0][113] = 127, -+ [0][1][1][0][RTW89_ACMA][1][113] = 127, -+ [0][1][1][0][RTW89_ACMA][0][113] = 127, -+ [0][1][1][0][RTW89_CHILE][1][113] = 127, -+ [0][1][1][0][RTW89_QATAR][1][113] = 127, -+ [0][1][1][0][RTW89_QATAR][0][113] = 127, -+ [0][1][1][0][RTW89_UK][1][113] = 127, -+ [0][1][1][0][RTW89_UK][0][113] = 127, -+ [0][1][1][0][RTW89_FCC][1][115] = 127, -+ [0][1][1][0][RTW89_FCC][2][115] = 127, -+ [0][1][1][0][RTW89_ETSI][1][115] = 127, -+ [0][1][1][0][RTW89_ETSI][0][115] = 127, -+ [0][1][1][0][RTW89_MKK][1][115] = 127, -+ [0][1][1][0][RTW89_MKK][0][115] = 127, -+ [0][1][1][0][RTW89_IC][1][115] = 127, -+ [0][1][1][0][RTW89_KCC][1][115] = 127, -+ [0][1][1][0][RTW89_KCC][0][115] = 127, -+ [0][1][1][0][RTW89_ACMA][1][115] = 127, -+ [0][1][1][0][RTW89_ACMA][0][115] = 127, -+ [0][1][1][0][RTW89_CHILE][1][115] = 127, -+ [0][1][1][0][RTW89_QATAR][1][115] = 127, -+ [0][1][1][0][RTW89_QATAR][0][115] = 127, -+ [0][1][1][0][RTW89_UK][1][115] = 127, -+ [0][1][1][0][RTW89_UK][0][115] = 127, -+ [0][1][1][0][RTW89_FCC][1][117] = 127, -+ [0][1][1][0][RTW89_FCC][2][117] = 127, -+ [0][1][1][0][RTW89_ETSI][1][117] = 127, -+ [0][1][1][0][RTW89_ETSI][0][117] = 127, -+ [0][1][1][0][RTW89_MKK][1][117] = 127, -+ [0][1][1][0][RTW89_MKK][0][117] = 127, -+ [0][1][1][0][RTW89_IC][1][117] = 127, -+ [0][1][1][0][RTW89_KCC][1][117] = 127, -+ [0][1][1][0][RTW89_KCC][0][117] = 127, -+ [0][1][1][0][RTW89_ACMA][1][117] = 127, -+ [0][1][1][0][RTW89_ACMA][0][117] = 127, -+ [0][1][1][0][RTW89_CHILE][1][117] = 127, -+ [0][1][1][0][RTW89_QATAR][1][117] = 127, -+ [0][1][1][0][RTW89_QATAR][0][117] = 127, -+ [0][1][1][0][RTW89_UK][1][117] = 127, -+ [0][1][1][0][RTW89_UK][0][117] = 127, -+ [0][1][1][0][RTW89_FCC][1][119] = 127, -+ [0][1][1][0][RTW89_FCC][2][119] = 127, -+ [0][1][1][0][RTW89_ETSI][1][119] = 127, -+ [0][1][1][0][RTW89_ETSI][0][119] = 127, -+ [0][1][1][0][RTW89_MKK][1][119] = 127, -+ [0][1][1][0][RTW89_MKK][0][119] = 127, -+ [0][1][1][0][RTW89_IC][1][119] = 127, -+ [0][1][1][0][RTW89_KCC][1][119] = 127, -+ [0][1][1][0][RTW89_KCC][0][119] = 127, -+ [0][1][1][0][RTW89_ACMA][1][119] = 127, -+ [0][1][1][0][RTW89_ACMA][0][119] = 127, -+ [0][1][1][0][RTW89_CHILE][1][119] = 127, -+ [0][1][1][0][RTW89_QATAR][1][119] = 127, -+ [0][1][1][0][RTW89_QATAR][0][119] = 127, -+ [0][1][1][0][RTW89_UK][1][119] = 127, -+ [0][1][1][0][RTW89_UK][0][119] = 127, -+ [0][0][2][0][RTW89_FCC][1][0] = 24, -+ [0][0][2][0][RTW89_FCC][2][0] = 56, -+ [0][0][2][0][RTW89_ETSI][1][0] = 66, -+ [0][0][2][0][RTW89_ETSI][0][0] = 28, -+ [0][0][2][0][RTW89_MKK][1][0] = 66, -+ [0][0][2][0][RTW89_MKK][0][0] = 26, -+ [0][0][2][0][RTW89_IC][1][0] = 24, -+ [0][0][2][0][RTW89_KCC][1][0] = 24, -+ [0][0][2][0][RTW89_KCC][0][0] = 24, -+ [0][0][2][0][RTW89_ACMA][1][0] = 66, -+ [0][0][2][0][RTW89_ACMA][0][0] = 28, -+ [0][0][2][0][RTW89_CHILE][1][0] = 24, -+ [0][0][2][0][RTW89_QATAR][1][0] = 66, -+ [0][0][2][0][RTW89_QATAR][0][0] = 28, -+ [0][0][2][0][RTW89_UK][1][0] = 66, -+ [0][0][2][0][RTW89_UK][0][0] = 28, -+ [0][0][2][0][RTW89_FCC][1][2] = 22, -+ [0][0][2][0][RTW89_FCC][2][2] = 56, -+ [0][0][2][0][RTW89_ETSI][1][2] = 66, -+ [0][0][2][0][RTW89_ETSI][0][2] = 28, -+ [0][0][2][0][RTW89_MKK][1][2] = 66, -+ [0][0][2][0][RTW89_MKK][0][2] = 26, -+ [0][0][2][0][RTW89_IC][1][2] = 22, -+ [0][0][2][0][RTW89_KCC][1][2] = 24, -+ [0][0][2][0][RTW89_KCC][0][2] = 24, -+ [0][0][2][0][RTW89_ACMA][1][2] = 66, -+ [0][0][2][0][RTW89_ACMA][0][2] = 28, -+ [0][0][2][0][RTW89_CHILE][1][2] = 22, -+ [0][0][2][0][RTW89_QATAR][1][2] = 66, -+ [0][0][2][0][RTW89_QATAR][0][2] = 28, -+ [0][0][2][0][RTW89_UK][1][2] = 66, -+ [0][0][2][0][RTW89_UK][0][2] = 28, -+ [0][0][2][0][RTW89_FCC][1][4] = 22, -+ [0][0][2][0][RTW89_FCC][2][4] = 56, -+ [0][0][2][0][RTW89_ETSI][1][4] = 66, -+ [0][0][2][0][RTW89_ETSI][0][4] = 28, -+ [0][0][2][0][RTW89_MKK][1][4] = 66, -+ [0][0][2][0][RTW89_MKK][0][4] = 26, -+ [0][0][2][0][RTW89_IC][1][4] = 22, -+ [0][0][2][0][RTW89_KCC][1][4] = 24, -+ [0][0][2][0][RTW89_KCC][0][4] = 24, -+ [0][0][2][0][RTW89_ACMA][1][4] = 66, -+ [0][0][2][0][RTW89_ACMA][0][4] = 28, -+ [0][0][2][0][RTW89_CHILE][1][4] = 22, -+ [0][0][2][0][RTW89_QATAR][1][4] = 66, -+ [0][0][2][0][RTW89_QATAR][0][4] = 28, -+ [0][0][2][0][RTW89_UK][1][4] = 66, -+ [0][0][2][0][RTW89_UK][0][4] = 28, -+ [0][0][2][0][RTW89_FCC][1][6] = 22, -+ [0][0][2][0][RTW89_FCC][2][6] = 56, -+ [0][0][2][0][RTW89_ETSI][1][6] = 66, -+ [0][0][2][0][RTW89_ETSI][0][6] = 28, -+ [0][0][2][0][RTW89_MKK][1][6] = 66, -+ [0][0][2][0][RTW89_MKK][0][6] = 26, -+ [0][0][2][0][RTW89_IC][1][6] = 22, -+ [0][0][2][0][RTW89_KCC][1][6] = 24, -+ [0][0][2][0][RTW89_KCC][0][6] = 24, -+ [0][0][2][0][RTW89_ACMA][1][6] = 66, -+ [0][0][2][0][RTW89_ACMA][0][6] = 28, -+ [0][0][2][0][RTW89_CHILE][1][6] = 22, -+ [0][0][2][0][RTW89_QATAR][1][6] = 66, -+ [0][0][2][0][RTW89_QATAR][0][6] = 28, -+ [0][0][2][0][RTW89_UK][1][6] = 66, -+ [0][0][2][0][RTW89_UK][0][6] = 28, -+ [0][0][2][0][RTW89_FCC][1][8] = 22, -+ [0][0][2][0][RTW89_FCC][2][8] = 56, -+ [0][0][2][0][RTW89_ETSI][1][8] = 66, -+ [0][0][2][0][RTW89_ETSI][0][8] = 28, -+ [0][0][2][0][RTW89_MKK][1][8] = 66, -+ [0][0][2][0][RTW89_MKK][0][8] = 26, -+ [0][0][2][0][RTW89_IC][1][8] = 22, -+ [0][0][2][0][RTW89_KCC][1][8] = 24, -+ [0][0][2][0][RTW89_KCC][0][8] = 24, -+ [0][0][2][0][RTW89_ACMA][1][8] = 66, -+ [0][0][2][0][RTW89_ACMA][0][8] = 28, -+ [0][0][2][0][RTW89_CHILE][1][8] = 22, -+ [0][0][2][0][RTW89_QATAR][1][8] = 66, -+ [0][0][2][0][RTW89_QATAR][0][8] = 28, -+ [0][0][2][0][RTW89_UK][1][8] = 66, -+ [0][0][2][0][RTW89_UK][0][8] = 28, -+ [0][0][2][0][RTW89_FCC][1][10] = 22, -+ [0][0][2][0][RTW89_FCC][2][10] = 56, -+ [0][0][2][0][RTW89_ETSI][1][10] = 66, -+ [0][0][2][0][RTW89_ETSI][0][10] = 28, -+ [0][0][2][0][RTW89_MKK][1][10] = 66, -+ [0][0][2][0][RTW89_MKK][0][10] = 26, -+ [0][0][2][0][RTW89_IC][1][10] = 22, -+ [0][0][2][0][RTW89_KCC][1][10] = 24, -+ [0][0][2][0][RTW89_KCC][0][10] = 24, -+ [0][0][2][0][RTW89_ACMA][1][10] = 66, -+ [0][0][2][0][RTW89_ACMA][0][10] = 28, -+ [0][0][2][0][RTW89_CHILE][1][10] = 22, -+ [0][0][2][0][RTW89_QATAR][1][10] = 66, -+ [0][0][2][0][RTW89_QATAR][0][10] = 28, -+ [0][0][2][0][RTW89_UK][1][10] = 66, -+ [0][0][2][0][RTW89_UK][0][10] = 28, -+ [0][0][2][0][RTW89_FCC][1][12] = 22, -+ [0][0][2][0][RTW89_FCC][2][12] = 56, -+ [0][0][2][0][RTW89_ETSI][1][12] = 66, -+ [0][0][2][0][RTW89_ETSI][0][12] = 28, -+ [0][0][2][0][RTW89_MKK][1][12] = 66, -+ [0][0][2][0][RTW89_MKK][0][12] = 26, -+ [0][0][2][0][RTW89_IC][1][12] = 22, -+ [0][0][2][0][RTW89_KCC][1][12] = 24, -+ [0][0][2][0][RTW89_KCC][0][12] = 24, -+ [0][0][2][0][RTW89_ACMA][1][12] = 66, -+ [0][0][2][0][RTW89_ACMA][0][12] = 28, -+ [0][0][2][0][RTW89_CHILE][1][12] = 22, -+ [0][0][2][0][RTW89_QATAR][1][12] = 66, -+ [0][0][2][0][RTW89_QATAR][0][12] = 28, -+ [0][0][2][0][RTW89_UK][1][12] = 66, -+ [0][0][2][0][RTW89_UK][0][12] = 28, -+ [0][0][2][0][RTW89_FCC][1][14] = 22, -+ [0][0][2][0][RTW89_FCC][2][14] = 56, -+ [0][0][2][0][RTW89_ETSI][1][14] = 66, -+ [0][0][2][0][RTW89_ETSI][0][14] = 28, -+ [0][0][2][0][RTW89_MKK][1][14] = 66, -+ [0][0][2][0][RTW89_MKK][0][14] = 26, -+ [0][0][2][0][RTW89_IC][1][14] = 22, -+ [0][0][2][0][RTW89_KCC][1][14] = 24, -+ [0][0][2][0][RTW89_KCC][0][14] = 24, -+ [0][0][2][0][RTW89_ACMA][1][14] = 66, -+ [0][0][2][0][RTW89_ACMA][0][14] = 28, -+ [0][0][2][0][RTW89_CHILE][1][14] = 22, -+ [0][0][2][0][RTW89_QATAR][1][14] = 66, -+ [0][0][2][0][RTW89_QATAR][0][14] = 28, -+ [0][0][2][0][RTW89_UK][1][14] = 66, -+ [0][0][2][0][RTW89_UK][0][14] = 28, -+ [0][0][2][0][RTW89_FCC][1][15] = 22, -+ [0][0][2][0][RTW89_FCC][2][15] = 56, -+ [0][0][2][0][RTW89_ETSI][1][15] = 66, -+ [0][0][2][0][RTW89_ETSI][0][15] = 28, -+ [0][0][2][0][RTW89_MKK][1][15] = 66, -+ [0][0][2][0][RTW89_MKK][0][15] = 26, -+ [0][0][2][0][RTW89_IC][1][15] = 22, -+ [0][0][2][0][RTW89_KCC][1][15] = 24, -+ [0][0][2][0][RTW89_KCC][0][15] = 24, -+ [0][0][2][0][RTW89_ACMA][1][15] = 66, -+ [0][0][2][0][RTW89_ACMA][0][15] = 28, -+ [0][0][2][0][RTW89_CHILE][1][15] = 22, -+ [0][0][2][0][RTW89_QATAR][1][15] = 66, -+ [0][0][2][0][RTW89_QATAR][0][15] = 28, -+ [0][0][2][0][RTW89_UK][1][15] = 66, -+ [0][0][2][0][RTW89_UK][0][15] = 28, -+ [0][0][2][0][RTW89_FCC][1][17] = 22, -+ [0][0][2][0][RTW89_FCC][2][17] = 56, -+ [0][0][2][0][RTW89_ETSI][1][17] = 66, -+ [0][0][2][0][RTW89_ETSI][0][17] = 28, -+ [0][0][2][0][RTW89_MKK][1][17] = 66, -+ [0][0][2][0][RTW89_MKK][0][17] = 26, -+ [0][0][2][0][RTW89_IC][1][17] = 22, -+ [0][0][2][0][RTW89_KCC][1][17] = 24, -+ [0][0][2][0][RTW89_KCC][0][17] = 24, -+ [0][0][2][0][RTW89_ACMA][1][17] = 66, -+ [0][0][2][0][RTW89_ACMA][0][17] = 28, -+ [0][0][2][0][RTW89_CHILE][1][17] = 22, -+ [0][0][2][0][RTW89_QATAR][1][17] = 66, -+ [0][0][2][0][RTW89_QATAR][0][17] = 28, -+ [0][0][2][0][RTW89_UK][1][17] = 66, -+ [0][0][2][0][RTW89_UK][0][17] = 28, -+ [0][0][2][0][RTW89_FCC][1][19] = 22, -+ [0][0][2][0][RTW89_FCC][2][19] = 56, -+ [0][0][2][0][RTW89_ETSI][1][19] = 66, -+ [0][0][2][0][RTW89_ETSI][0][19] = 28, -+ [0][0][2][0][RTW89_MKK][1][19] = 66, -+ [0][0][2][0][RTW89_MKK][0][19] = 26, -+ [0][0][2][0][RTW89_IC][1][19] = 22, -+ [0][0][2][0][RTW89_KCC][1][19] = 24, -+ [0][0][2][0][RTW89_KCC][0][19] = 24, -+ [0][0][2][0][RTW89_ACMA][1][19] = 66, -+ [0][0][2][0][RTW89_ACMA][0][19] = 28, -+ [0][0][2][0][RTW89_CHILE][1][19] = 22, -+ [0][0][2][0][RTW89_QATAR][1][19] = 66, -+ [0][0][2][0][RTW89_QATAR][0][19] = 28, -+ [0][0][2][0][RTW89_UK][1][19] = 66, -+ [0][0][2][0][RTW89_UK][0][19] = 28, -+ [0][0][2][0][RTW89_FCC][1][21] = 22, -+ [0][0][2][0][RTW89_FCC][2][21] = 56, -+ [0][0][2][0][RTW89_ETSI][1][21] = 66, -+ [0][0][2][0][RTW89_ETSI][0][21] = 28, -+ [0][0][2][0][RTW89_MKK][1][21] = 66, -+ [0][0][2][0][RTW89_MKK][0][21] = 26, -+ [0][0][2][0][RTW89_IC][1][21] = 22, -+ [0][0][2][0][RTW89_KCC][1][21] = 24, -+ [0][0][2][0][RTW89_KCC][0][21] = 24, -+ [0][0][2][0][RTW89_ACMA][1][21] = 66, -+ [0][0][2][0][RTW89_ACMA][0][21] = 28, -+ [0][0][2][0][RTW89_CHILE][1][21] = 22, -+ [0][0][2][0][RTW89_QATAR][1][21] = 66, -+ [0][0][2][0][RTW89_QATAR][0][21] = 28, -+ [0][0][2][0][RTW89_UK][1][21] = 66, -+ [0][0][2][0][RTW89_UK][0][21] = 28, -+ [0][0][2][0][RTW89_FCC][1][23] = 22, -+ [0][0][2][0][RTW89_FCC][2][23] = 70, -+ [0][0][2][0][RTW89_ETSI][1][23] = 66, -+ [0][0][2][0][RTW89_ETSI][0][23] = 28, -+ [0][0][2][0][RTW89_MKK][1][23] = 66, -+ [0][0][2][0][RTW89_MKK][0][23] = 26, -+ [0][0][2][0][RTW89_IC][1][23] = 22, -+ [0][0][2][0][RTW89_KCC][1][23] = 24, -+ [0][0][2][0][RTW89_KCC][0][23] = 26, -+ [0][0][2][0][RTW89_ACMA][1][23] = 66, -+ [0][0][2][0][RTW89_ACMA][0][23] = 28, -+ [0][0][2][0][RTW89_CHILE][1][23] = 22, -+ [0][0][2][0][RTW89_QATAR][1][23] = 66, -+ [0][0][2][0][RTW89_QATAR][0][23] = 28, -+ [0][0][2][0][RTW89_UK][1][23] = 66, -+ [0][0][2][0][RTW89_UK][0][23] = 28, -+ [0][0][2][0][RTW89_FCC][1][25] = 22, -+ [0][0][2][0][RTW89_FCC][2][25] = 70, -+ [0][0][2][0][RTW89_ETSI][1][25] = 66, -+ [0][0][2][0][RTW89_ETSI][0][25] = 28, -+ [0][0][2][0][RTW89_MKK][1][25] = 66, -+ [0][0][2][0][RTW89_MKK][0][25] = 26, -+ [0][0][2][0][RTW89_IC][1][25] = 22, -+ [0][0][2][0][RTW89_KCC][1][25] = 24, -+ [0][0][2][0][RTW89_KCC][0][25] = 26, -+ [0][0][2][0][RTW89_ACMA][1][25] = 66, -+ [0][0][2][0][RTW89_ACMA][0][25] = 28, -+ [0][0][2][0][RTW89_CHILE][1][25] = 22, -+ [0][0][2][0][RTW89_QATAR][1][25] = 66, -+ [0][0][2][0][RTW89_QATAR][0][25] = 28, -+ [0][0][2][0][RTW89_UK][1][25] = 66, -+ [0][0][2][0][RTW89_UK][0][25] = 28, -+ [0][0][2][0][RTW89_FCC][1][27] = 22, -+ [0][0][2][0][RTW89_FCC][2][27] = 70, -+ [0][0][2][0][RTW89_ETSI][1][27] = 66, -+ [0][0][2][0][RTW89_ETSI][0][27] = 28, -+ [0][0][2][0][RTW89_MKK][1][27] = 66, -+ [0][0][2][0][RTW89_MKK][0][27] = 26, -+ [0][0][2][0][RTW89_IC][1][27] = 22, -+ [0][0][2][0][RTW89_KCC][1][27] = 24, -+ [0][0][2][0][RTW89_KCC][0][27] = 26, -+ [0][0][2][0][RTW89_ACMA][1][27] = 66, -+ [0][0][2][0][RTW89_ACMA][0][27] = 28, -+ [0][0][2][0][RTW89_CHILE][1][27] = 22, -+ [0][0][2][0][RTW89_QATAR][1][27] = 66, -+ [0][0][2][0][RTW89_QATAR][0][27] = 28, -+ [0][0][2][0][RTW89_UK][1][27] = 66, -+ [0][0][2][0][RTW89_UK][0][27] = 28, -+ [0][0][2][0][RTW89_FCC][1][29] = 22, -+ [0][0][2][0][RTW89_FCC][2][29] = 70, -+ [0][0][2][0][RTW89_ETSI][1][29] = 66, -+ [0][0][2][0][RTW89_ETSI][0][29] = 28, -+ [0][0][2][0][RTW89_MKK][1][29] = 66, -+ [0][0][2][0][RTW89_MKK][0][29] = 26, -+ [0][0][2][0][RTW89_IC][1][29] = 22, -+ [0][0][2][0][RTW89_KCC][1][29] = 24, -+ [0][0][2][0][RTW89_KCC][0][29] = 26, -+ [0][0][2][0][RTW89_ACMA][1][29] = 66, -+ [0][0][2][0][RTW89_ACMA][0][29] = 28, -+ [0][0][2][0][RTW89_CHILE][1][29] = 22, -+ [0][0][2][0][RTW89_QATAR][1][29] = 66, -+ [0][0][2][0][RTW89_QATAR][0][29] = 28, -+ [0][0][2][0][RTW89_UK][1][29] = 66, -+ [0][0][2][0][RTW89_UK][0][29] = 28, -+ [0][0][2][0][RTW89_FCC][1][30] = 22, -+ [0][0][2][0][RTW89_FCC][2][30] = 70, -+ [0][0][2][0][RTW89_ETSI][1][30] = 66, -+ [0][0][2][0][RTW89_ETSI][0][30] = 28, -+ [0][0][2][0][RTW89_MKK][1][30] = 66, -+ [0][0][2][0][RTW89_MKK][0][30] = 26, -+ [0][0][2][0][RTW89_IC][1][30] = 22, -+ [0][0][2][0][RTW89_KCC][1][30] = 24, -+ [0][0][2][0][RTW89_KCC][0][30] = 26, -+ [0][0][2][0][RTW89_ACMA][1][30] = 66, -+ [0][0][2][0][RTW89_ACMA][0][30] = 28, -+ [0][0][2][0][RTW89_CHILE][1][30] = 22, -+ [0][0][2][0][RTW89_QATAR][1][30] = 66, -+ [0][0][2][0][RTW89_QATAR][0][30] = 28, -+ [0][0][2][0][RTW89_UK][1][30] = 66, -+ [0][0][2][0][RTW89_UK][0][30] = 28, -+ [0][0][2][0][RTW89_FCC][1][32] = 22, -+ [0][0][2][0][RTW89_FCC][2][32] = 70, -+ [0][0][2][0][RTW89_ETSI][1][32] = 66, -+ [0][0][2][0][RTW89_ETSI][0][32] = 28, -+ [0][0][2][0][RTW89_MKK][1][32] = 66, -+ [0][0][2][0][RTW89_MKK][0][32] = 26, -+ [0][0][2][0][RTW89_IC][1][32] = 22, -+ [0][0][2][0][RTW89_KCC][1][32] = 24, -+ [0][0][2][0][RTW89_KCC][0][32] = 26, -+ [0][0][2][0][RTW89_ACMA][1][32] = 66, -+ [0][0][2][0][RTW89_ACMA][0][32] = 28, -+ [0][0][2][0][RTW89_CHILE][1][32] = 22, -+ [0][0][2][0][RTW89_QATAR][1][32] = 66, -+ [0][0][2][0][RTW89_QATAR][0][32] = 28, -+ [0][0][2][0][RTW89_UK][1][32] = 66, -+ [0][0][2][0][RTW89_UK][0][32] = 28, -+ [0][0][2][0][RTW89_FCC][1][34] = 22, -+ [0][0][2][0][RTW89_FCC][2][34] = 70, -+ [0][0][2][0][RTW89_ETSI][1][34] = 66, -+ [0][0][2][0][RTW89_ETSI][0][34] = 28, -+ [0][0][2][0][RTW89_MKK][1][34] = 66, -+ [0][0][2][0][RTW89_MKK][0][34] = 26, -+ [0][0][2][0][RTW89_IC][1][34] = 22, -+ [0][0][2][0][RTW89_KCC][1][34] = 24, -+ [0][0][2][0][RTW89_KCC][0][34] = 26, -+ [0][0][2][0][RTW89_ACMA][1][34] = 66, -+ [0][0][2][0][RTW89_ACMA][0][34] = 28, -+ [0][0][2][0][RTW89_CHILE][1][34] = 22, -+ [0][0][2][0][RTW89_QATAR][1][34] = 66, -+ [0][0][2][0][RTW89_QATAR][0][34] = 28, -+ [0][0][2][0][RTW89_UK][1][34] = 66, -+ [0][0][2][0][RTW89_UK][0][34] = 28, -+ [0][0][2][0][RTW89_FCC][1][36] = 22, -+ [0][0][2][0][RTW89_FCC][2][36] = 70, -+ [0][0][2][0][RTW89_ETSI][1][36] = 66, -+ [0][0][2][0][RTW89_ETSI][0][36] = 28, -+ [0][0][2][0][RTW89_MKK][1][36] = 66, -+ [0][0][2][0][RTW89_MKK][0][36] = 26, -+ [0][0][2][0][RTW89_IC][1][36] = 22, -+ [0][0][2][0][RTW89_KCC][1][36] = 24, -+ [0][0][2][0][RTW89_KCC][0][36] = 26, -+ [0][0][2][0][RTW89_ACMA][1][36] = 66, -+ [0][0][2][0][RTW89_ACMA][0][36] = 28, -+ [0][0][2][0][RTW89_CHILE][1][36] = 22, -+ [0][0][2][0][RTW89_QATAR][1][36] = 66, -+ [0][0][2][0][RTW89_QATAR][0][36] = 28, -+ [0][0][2][0][RTW89_UK][1][36] = 66, -+ [0][0][2][0][RTW89_UK][0][36] = 28, -+ [0][0][2][0][RTW89_FCC][1][38] = 22, -+ [0][0][2][0][RTW89_FCC][2][38] = 70, -+ [0][0][2][0][RTW89_ETSI][1][38] = 66, -+ [0][0][2][0][RTW89_ETSI][0][38] = 28, -+ [0][0][2][0][RTW89_MKK][1][38] = 66, -+ [0][0][2][0][RTW89_MKK][0][38] = 26, -+ [0][0][2][0][RTW89_IC][1][38] = 22, -+ [0][0][2][0][RTW89_KCC][1][38] = 24, -+ [0][0][2][0][RTW89_KCC][0][38] = 26, -+ [0][0][2][0][RTW89_ACMA][1][38] = 66, -+ [0][0][2][0][RTW89_ACMA][0][38] = 28, -+ [0][0][2][0][RTW89_CHILE][1][38] = 22, -+ [0][0][2][0][RTW89_QATAR][1][38] = 66, -+ [0][0][2][0][RTW89_QATAR][0][38] = 28, -+ [0][0][2][0][RTW89_UK][1][38] = 66, -+ [0][0][2][0][RTW89_UK][0][38] = 28, -+ [0][0][2][0][RTW89_FCC][1][40] = 22, -+ [0][0][2][0][RTW89_FCC][2][40] = 70, -+ [0][0][2][0][RTW89_ETSI][1][40] = 66, -+ [0][0][2][0][RTW89_ETSI][0][40] = 28, -+ [0][0][2][0][RTW89_MKK][1][40] = 66, -+ [0][0][2][0][RTW89_MKK][0][40] = 26, -+ [0][0][2][0][RTW89_IC][1][40] = 22, -+ [0][0][2][0][RTW89_KCC][1][40] = 24, -+ [0][0][2][0][RTW89_KCC][0][40] = 26, -+ [0][0][2][0][RTW89_ACMA][1][40] = 66, -+ [0][0][2][0][RTW89_ACMA][0][40] = 28, -+ [0][0][2][0][RTW89_CHILE][1][40] = 22, -+ [0][0][2][0][RTW89_QATAR][1][40] = 66, -+ [0][0][2][0][RTW89_QATAR][0][40] = 28, -+ [0][0][2][0][RTW89_UK][1][40] = 66, -+ [0][0][2][0][RTW89_UK][0][40] = 28, -+ [0][0][2][0][RTW89_FCC][1][42] = 22, -+ [0][0][2][0][RTW89_FCC][2][42] = 70, -+ [0][0][2][0][RTW89_ETSI][1][42] = 66, -+ [0][0][2][0][RTW89_ETSI][0][42] = 28, -+ [0][0][2][0][RTW89_MKK][1][42] = 66, -+ [0][0][2][0][RTW89_MKK][0][42] = 26, -+ [0][0][2][0][RTW89_IC][1][42] = 22, -+ [0][0][2][0][RTW89_KCC][1][42] = 24, -+ [0][0][2][0][RTW89_KCC][0][42] = 26, -+ [0][0][2][0][RTW89_ACMA][1][42] = 66, -+ [0][0][2][0][RTW89_ACMA][0][42] = 28, -+ [0][0][2][0][RTW89_CHILE][1][42] = 22, -+ [0][0][2][0][RTW89_QATAR][1][42] = 66, -+ [0][0][2][0][RTW89_QATAR][0][42] = 28, -+ [0][0][2][0][RTW89_UK][1][42] = 66, -+ [0][0][2][0][RTW89_UK][0][42] = 28, -+ [0][0][2][0][RTW89_FCC][1][44] = 22, -+ [0][0][2][0][RTW89_FCC][2][44] = 70, -+ [0][0][2][0][RTW89_ETSI][1][44] = 66, -+ [0][0][2][0][RTW89_ETSI][0][44] = 30, -+ [0][0][2][0][RTW89_MKK][1][44] = 44, -+ [0][0][2][0][RTW89_MKK][0][44] = 28, -+ [0][0][2][0][RTW89_IC][1][44] = 22, -+ [0][0][2][0][RTW89_KCC][1][44] = 24, -+ [0][0][2][0][RTW89_KCC][0][44] = 26, -+ [0][0][2][0][RTW89_ACMA][1][44] = 66, -+ [0][0][2][0][RTW89_ACMA][0][44] = 30, -+ [0][0][2][0][RTW89_CHILE][1][44] = 22, -+ [0][0][2][0][RTW89_QATAR][1][44] = 66, -+ [0][0][2][0][RTW89_QATAR][0][44] = 30, -+ [0][0][2][0][RTW89_UK][1][44] = 66, -+ [0][0][2][0][RTW89_UK][0][44] = 30, -+ [0][0][2][0][RTW89_FCC][1][45] = 22, -+ [0][0][2][0][RTW89_FCC][2][45] = 127, -+ [0][0][2][0][RTW89_ETSI][1][45] = 127, -+ [0][0][2][0][RTW89_ETSI][0][45] = 127, -+ [0][0][2][0][RTW89_MKK][1][45] = 127, -+ [0][0][2][0][RTW89_MKK][0][45] = 127, -+ [0][0][2][0][RTW89_IC][1][45] = 22, -+ [0][0][2][0][RTW89_KCC][1][45] = 24, -+ [0][0][2][0][RTW89_KCC][0][45] = 127, -+ [0][0][2][0][RTW89_ACMA][1][45] = 127, -+ [0][0][2][0][RTW89_ACMA][0][45] = 127, -+ [0][0][2][0][RTW89_CHILE][1][45] = 22, -+ [0][0][2][0][RTW89_QATAR][1][45] = 127, -+ [0][0][2][0][RTW89_QATAR][0][45] = 127, -+ [0][0][2][0][RTW89_UK][1][45] = 127, -+ [0][0][2][0][RTW89_UK][0][45] = 127, -+ [0][0][2][0][RTW89_FCC][1][47] = 22, -+ [0][0][2][0][RTW89_FCC][2][47] = 127, -+ [0][0][2][0][RTW89_ETSI][1][47] = 127, -+ [0][0][2][0][RTW89_ETSI][0][47] = 127, -+ [0][0][2][0][RTW89_MKK][1][47] = 127, -+ [0][0][2][0][RTW89_MKK][0][47] = 127, -+ [0][0][2][0][RTW89_IC][1][47] = 22, -+ [0][0][2][0][RTW89_KCC][1][47] = 24, -+ [0][0][2][0][RTW89_KCC][0][47] = 127, -+ [0][0][2][0][RTW89_ACMA][1][47] = 127, -+ [0][0][2][0][RTW89_ACMA][0][47] = 127, -+ [0][0][2][0][RTW89_CHILE][1][47] = 22, -+ [0][0][2][0][RTW89_QATAR][1][47] = 127, -+ [0][0][2][0][RTW89_QATAR][0][47] = 127, -+ [0][0][2][0][RTW89_UK][1][47] = 127, -+ [0][0][2][0][RTW89_UK][0][47] = 127, -+ [0][0][2][0][RTW89_FCC][1][49] = 24, -+ [0][0][2][0][RTW89_FCC][2][49] = 127, -+ [0][0][2][0][RTW89_ETSI][1][49] = 127, -+ [0][0][2][0][RTW89_ETSI][0][49] = 127, -+ [0][0][2][0][RTW89_MKK][1][49] = 127, -+ [0][0][2][0][RTW89_MKK][0][49] = 127, -+ [0][0][2][0][RTW89_IC][1][49] = 24, -+ [0][0][2][0][RTW89_KCC][1][49] = 24, -+ [0][0][2][0][RTW89_KCC][0][49] = 127, -+ [0][0][2][0][RTW89_ACMA][1][49] = 127, -+ [0][0][2][0][RTW89_ACMA][0][49] = 127, -+ [0][0][2][0][RTW89_CHILE][1][49] = 24, -+ [0][0][2][0][RTW89_QATAR][1][49] = 127, -+ [0][0][2][0][RTW89_QATAR][0][49] = 127, -+ [0][0][2][0][RTW89_UK][1][49] = 127, -+ [0][0][2][0][RTW89_UK][0][49] = 127, -+ [0][0][2][0][RTW89_FCC][1][51] = 22, -+ [0][0][2][0][RTW89_FCC][2][51] = 127, -+ [0][0][2][0][RTW89_ETSI][1][51] = 127, -+ [0][0][2][0][RTW89_ETSI][0][51] = 127, -+ [0][0][2][0][RTW89_MKK][1][51] = 127, -+ [0][0][2][0][RTW89_MKK][0][51] = 127, -+ [0][0][2][0][RTW89_IC][1][51] = 22, -+ [0][0][2][0][RTW89_KCC][1][51] = 24, -+ [0][0][2][0][RTW89_KCC][0][51] = 127, -+ [0][0][2][0][RTW89_ACMA][1][51] = 127, -+ [0][0][2][0][RTW89_ACMA][0][51] = 127, -+ [0][0][2][0][RTW89_CHILE][1][51] = 22, -+ [0][0][2][0][RTW89_QATAR][1][51] = 127, -+ [0][0][2][0][RTW89_QATAR][0][51] = 127, -+ [0][0][2][0][RTW89_UK][1][51] = 127, -+ [0][0][2][0][RTW89_UK][0][51] = 127, -+ [0][0][2][0][RTW89_FCC][1][53] = 22, -+ [0][0][2][0][RTW89_FCC][2][53] = 127, -+ [0][0][2][0][RTW89_ETSI][1][53] = 127, -+ [0][0][2][0][RTW89_ETSI][0][53] = 127, -+ [0][0][2][0][RTW89_MKK][1][53] = 127, -+ [0][0][2][0][RTW89_MKK][0][53] = 127, -+ [0][0][2][0][RTW89_IC][1][53] = 22, -+ [0][0][2][0][RTW89_KCC][1][53] = 24, -+ [0][0][2][0][RTW89_KCC][0][53] = 127, -+ [0][0][2][0][RTW89_ACMA][1][53] = 127, -+ [0][0][2][0][RTW89_ACMA][0][53] = 127, -+ [0][0][2][0][RTW89_CHILE][1][53] = 22, -+ [0][0][2][0][RTW89_QATAR][1][53] = 127, -+ [0][0][2][0][RTW89_QATAR][0][53] = 127, -+ [0][0][2][0][RTW89_UK][1][53] = 127, -+ [0][0][2][0][RTW89_UK][0][53] = 127, -+ [0][0][2][0][RTW89_FCC][1][55] = 22, -+ [0][0][2][0][RTW89_FCC][2][55] = 68, -+ [0][0][2][0][RTW89_ETSI][1][55] = 127, -+ [0][0][2][0][RTW89_ETSI][0][55] = 127, -+ [0][0][2][0][RTW89_MKK][1][55] = 127, -+ [0][0][2][0][RTW89_MKK][0][55] = 127, -+ [0][0][2][0][RTW89_IC][1][55] = 22, -+ [0][0][2][0][RTW89_KCC][1][55] = 26, -+ [0][0][2][0][RTW89_KCC][0][55] = 127, -+ [0][0][2][0][RTW89_ACMA][1][55] = 127, -+ [0][0][2][0][RTW89_ACMA][0][55] = 127, -+ [0][0][2][0][RTW89_CHILE][1][55] = 22, -+ [0][0][2][0][RTW89_QATAR][1][55] = 127, -+ [0][0][2][0][RTW89_QATAR][0][55] = 127, -+ [0][0][2][0][RTW89_UK][1][55] = 127, -+ [0][0][2][0][RTW89_UK][0][55] = 127, -+ [0][0][2][0][RTW89_FCC][1][57] = 22, -+ [0][0][2][0][RTW89_FCC][2][57] = 68, -+ [0][0][2][0][RTW89_ETSI][1][57] = 127, -+ [0][0][2][0][RTW89_ETSI][0][57] = 127, -+ [0][0][2][0][RTW89_MKK][1][57] = 127, -+ [0][0][2][0][RTW89_MKK][0][57] = 127, -+ [0][0][2][0][RTW89_IC][1][57] = 22, -+ [0][0][2][0][RTW89_KCC][1][57] = 26, -+ [0][0][2][0][RTW89_KCC][0][57] = 127, -+ [0][0][2][0][RTW89_ACMA][1][57] = 127, -+ [0][0][2][0][RTW89_ACMA][0][57] = 127, -+ [0][0][2][0][RTW89_CHILE][1][57] = 22, -+ [0][0][2][0][RTW89_QATAR][1][57] = 127, -+ [0][0][2][0][RTW89_QATAR][0][57] = 127, -+ [0][0][2][0][RTW89_UK][1][57] = 127, -+ [0][0][2][0][RTW89_UK][0][57] = 127, -+ [0][0][2][0][RTW89_FCC][1][59] = 22, -+ [0][0][2][0][RTW89_FCC][2][59] = 68, -+ [0][0][2][0][RTW89_ETSI][1][59] = 127, -+ [0][0][2][0][RTW89_ETSI][0][59] = 127, -+ [0][0][2][0][RTW89_MKK][1][59] = 127, -+ [0][0][2][0][RTW89_MKK][0][59] = 127, -+ [0][0][2][0][RTW89_IC][1][59] = 22, -+ [0][0][2][0][RTW89_KCC][1][59] = 26, -+ [0][0][2][0][RTW89_KCC][0][59] = 127, -+ [0][0][2][0][RTW89_ACMA][1][59] = 127, -+ [0][0][2][0][RTW89_ACMA][0][59] = 127, -+ [0][0][2][0][RTW89_CHILE][1][59] = 22, -+ [0][0][2][0][RTW89_QATAR][1][59] = 127, -+ [0][0][2][0][RTW89_QATAR][0][59] = 127, -+ [0][0][2][0][RTW89_UK][1][59] = 127, -+ [0][0][2][0][RTW89_UK][0][59] = 127, -+ [0][0][2][0][RTW89_FCC][1][60] = 22, -+ [0][0][2][0][RTW89_FCC][2][60] = 68, -+ [0][0][2][0][RTW89_ETSI][1][60] = 127, -+ [0][0][2][0][RTW89_ETSI][0][60] = 127, -+ [0][0][2][0][RTW89_MKK][1][60] = 127, -+ [0][0][2][0][RTW89_MKK][0][60] = 127, -+ [0][0][2][0][RTW89_IC][1][60] = 22, -+ [0][0][2][0][RTW89_KCC][1][60] = 26, -+ [0][0][2][0][RTW89_KCC][0][60] = 127, -+ [0][0][2][0][RTW89_ACMA][1][60] = 127, -+ [0][0][2][0][RTW89_ACMA][0][60] = 127, -+ [0][0][2][0][RTW89_CHILE][1][60] = 22, -+ [0][0][2][0][RTW89_QATAR][1][60] = 127, -+ [0][0][2][0][RTW89_QATAR][0][60] = 127, -+ [0][0][2][0][RTW89_UK][1][60] = 127, -+ [0][0][2][0][RTW89_UK][0][60] = 127, -+ [0][0][2][0][RTW89_FCC][1][62] = 22, -+ [0][0][2][0][RTW89_FCC][2][62] = 68, -+ [0][0][2][0][RTW89_ETSI][1][62] = 127, -+ [0][0][2][0][RTW89_ETSI][0][62] = 127, -+ [0][0][2][0][RTW89_MKK][1][62] = 127, -+ [0][0][2][0][RTW89_MKK][0][62] = 127, -+ [0][0][2][0][RTW89_IC][1][62] = 22, -+ [0][0][2][0][RTW89_KCC][1][62] = 26, -+ [0][0][2][0][RTW89_KCC][0][62] = 127, -+ [0][0][2][0][RTW89_ACMA][1][62] = 127, -+ [0][0][2][0][RTW89_ACMA][0][62] = 127, -+ [0][0][2][0][RTW89_CHILE][1][62] = 22, -+ [0][0][2][0][RTW89_QATAR][1][62] = 127, -+ [0][0][2][0][RTW89_QATAR][0][62] = 127, -+ [0][0][2][0][RTW89_UK][1][62] = 127, -+ [0][0][2][0][RTW89_UK][0][62] = 127, -+ [0][0][2][0][RTW89_FCC][1][64] = 22, -+ [0][0][2][0][RTW89_FCC][2][64] = 68, -+ [0][0][2][0][RTW89_ETSI][1][64] = 127, -+ [0][0][2][0][RTW89_ETSI][0][64] = 127, -+ [0][0][2][0][RTW89_MKK][1][64] = 127, -+ [0][0][2][0][RTW89_MKK][0][64] = 127, -+ [0][0][2][0][RTW89_IC][1][64] = 22, -+ [0][0][2][0][RTW89_KCC][1][64] = 26, -+ [0][0][2][0][RTW89_KCC][0][64] = 127, -+ [0][0][2][0][RTW89_ACMA][1][64] = 127, -+ [0][0][2][0][RTW89_ACMA][0][64] = 127, -+ [0][0][2][0][RTW89_CHILE][1][64] = 22, -+ [0][0][2][0][RTW89_QATAR][1][64] = 127, -+ [0][0][2][0][RTW89_QATAR][0][64] = 127, -+ [0][0][2][0][RTW89_UK][1][64] = 127, -+ [0][0][2][0][RTW89_UK][0][64] = 127, -+ [0][0][2][0][RTW89_FCC][1][66] = 22, -+ [0][0][2][0][RTW89_FCC][2][66] = 68, -+ [0][0][2][0][RTW89_ETSI][1][66] = 127, -+ [0][0][2][0][RTW89_ETSI][0][66] = 127, -+ [0][0][2][0][RTW89_MKK][1][66] = 127, -+ [0][0][2][0][RTW89_MKK][0][66] = 127, -+ [0][0][2][0][RTW89_IC][1][66] = 22, -+ [0][0][2][0][RTW89_KCC][1][66] = 26, -+ [0][0][2][0][RTW89_KCC][0][66] = 127, -+ [0][0][2][0][RTW89_ACMA][1][66] = 127, -+ [0][0][2][0][RTW89_ACMA][0][66] = 127, -+ [0][0][2][0][RTW89_CHILE][1][66] = 22, -+ [0][0][2][0][RTW89_QATAR][1][66] = 127, -+ [0][0][2][0][RTW89_QATAR][0][66] = 127, -+ [0][0][2][0][RTW89_UK][1][66] = 127, -+ [0][0][2][0][RTW89_UK][0][66] = 127, -+ [0][0][2][0][RTW89_FCC][1][68] = 22, -+ [0][0][2][0][RTW89_FCC][2][68] = 68, -+ [0][0][2][0][RTW89_ETSI][1][68] = 127, -+ [0][0][2][0][RTW89_ETSI][0][68] = 127, -+ [0][0][2][0][RTW89_MKK][1][68] = 127, -+ [0][0][2][0][RTW89_MKK][0][68] = 127, -+ [0][0][2][0][RTW89_IC][1][68] = 22, -+ [0][0][2][0][RTW89_KCC][1][68] = 26, -+ [0][0][2][0][RTW89_KCC][0][68] = 127, -+ [0][0][2][0][RTW89_ACMA][1][68] = 127, -+ [0][0][2][0][RTW89_ACMA][0][68] = 127, -+ [0][0][2][0][RTW89_CHILE][1][68] = 22, -+ [0][0][2][0][RTW89_QATAR][1][68] = 127, -+ [0][0][2][0][RTW89_QATAR][0][68] = 127, -+ [0][0][2][0][RTW89_UK][1][68] = 127, -+ [0][0][2][0][RTW89_UK][0][68] = 127, -+ [0][0][2][0][RTW89_FCC][1][70] = 24, -+ [0][0][2][0][RTW89_FCC][2][70] = 68, -+ [0][0][2][0][RTW89_ETSI][1][70] = 127, -+ [0][0][2][0][RTW89_ETSI][0][70] = 127, -+ [0][0][2][0][RTW89_MKK][1][70] = 127, -+ [0][0][2][0][RTW89_MKK][0][70] = 127, -+ [0][0][2][0][RTW89_IC][1][70] = 24, -+ [0][0][2][0][RTW89_KCC][1][70] = 26, -+ [0][0][2][0][RTW89_KCC][0][70] = 127, -+ [0][0][2][0][RTW89_ACMA][1][70] = 127, -+ [0][0][2][0][RTW89_ACMA][0][70] = 127, -+ [0][0][2][0][RTW89_CHILE][1][70] = 24, -+ [0][0][2][0][RTW89_QATAR][1][70] = 127, -+ [0][0][2][0][RTW89_QATAR][0][70] = 127, -+ [0][0][2][0][RTW89_UK][1][70] = 127, -+ [0][0][2][0][RTW89_UK][0][70] = 127, -+ [0][0][2][0][RTW89_FCC][1][72] = 22, -+ [0][0][2][0][RTW89_FCC][2][72] = 68, -+ [0][0][2][0][RTW89_ETSI][1][72] = 127, -+ [0][0][2][0][RTW89_ETSI][0][72] = 127, -+ [0][0][2][0][RTW89_MKK][1][72] = 127, -+ [0][0][2][0][RTW89_MKK][0][72] = 127, -+ [0][0][2][0][RTW89_IC][1][72] = 22, -+ [0][0][2][0][RTW89_KCC][1][72] = 26, -+ [0][0][2][0][RTW89_KCC][0][72] = 127, -+ [0][0][2][0][RTW89_ACMA][1][72] = 127, -+ [0][0][2][0][RTW89_ACMA][0][72] = 127, -+ [0][0][2][0][RTW89_CHILE][1][72] = 22, -+ [0][0][2][0][RTW89_QATAR][1][72] = 127, -+ [0][0][2][0][RTW89_QATAR][0][72] = 127, -+ [0][0][2][0][RTW89_UK][1][72] = 127, -+ [0][0][2][0][RTW89_UK][0][72] = 127, -+ [0][0][2][0][RTW89_FCC][1][74] = 22, -+ [0][0][2][0][RTW89_FCC][2][74] = 68, -+ [0][0][2][0][RTW89_ETSI][1][74] = 127, -+ [0][0][2][0][RTW89_ETSI][0][74] = 127, -+ [0][0][2][0][RTW89_MKK][1][74] = 127, -+ [0][0][2][0][RTW89_MKK][0][74] = 127, -+ [0][0][2][0][RTW89_IC][1][74] = 22, -+ [0][0][2][0][RTW89_KCC][1][74] = 26, -+ [0][0][2][0][RTW89_KCC][0][74] = 127, -+ [0][0][2][0][RTW89_ACMA][1][74] = 127, -+ [0][0][2][0][RTW89_ACMA][0][74] = 127, -+ [0][0][2][0][RTW89_CHILE][1][74] = 22, -+ [0][0][2][0][RTW89_QATAR][1][74] = 127, -+ [0][0][2][0][RTW89_QATAR][0][74] = 127, -+ [0][0][2][0][RTW89_UK][1][74] = 127, -+ [0][0][2][0][RTW89_UK][0][74] = 127, -+ [0][0][2][0][RTW89_FCC][1][75] = 22, -+ [0][0][2][0][RTW89_FCC][2][75] = 68, -+ [0][0][2][0][RTW89_ETSI][1][75] = 127, -+ [0][0][2][0][RTW89_ETSI][0][75] = 127, -+ [0][0][2][0][RTW89_MKK][1][75] = 127, -+ [0][0][2][0][RTW89_MKK][0][75] = 127, -+ [0][0][2][0][RTW89_IC][1][75] = 22, -+ [0][0][2][0][RTW89_KCC][1][75] = 26, -+ [0][0][2][0][RTW89_KCC][0][75] = 127, -+ [0][0][2][0][RTW89_ACMA][1][75] = 127, -+ [0][0][2][0][RTW89_ACMA][0][75] = 127, -+ [0][0][2][0][RTW89_CHILE][1][75] = 22, -+ [0][0][2][0][RTW89_QATAR][1][75] = 127, -+ [0][0][2][0][RTW89_QATAR][0][75] = 127, -+ [0][0][2][0][RTW89_UK][1][75] = 127, -+ [0][0][2][0][RTW89_UK][0][75] = 127, -+ [0][0][2][0][RTW89_FCC][1][77] = 22, -+ [0][0][2][0][RTW89_FCC][2][77] = 68, -+ [0][0][2][0][RTW89_ETSI][1][77] = 127, -+ [0][0][2][0][RTW89_ETSI][0][77] = 127, -+ [0][0][2][0][RTW89_MKK][1][77] = 127, -+ [0][0][2][0][RTW89_MKK][0][77] = 127, -+ [0][0][2][0][RTW89_IC][1][77] = 22, -+ [0][0][2][0][RTW89_KCC][1][77] = 26, -+ [0][0][2][0][RTW89_KCC][0][77] = 127, -+ [0][0][2][0][RTW89_ACMA][1][77] = 127, -+ [0][0][2][0][RTW89_ACMA][0][77] = 127, -+ [0][0][2][0][RTW89_CHILE][1][77] = 22, -+ [0][0][2][0][RTW89_QATAR][1][77] = 127, -+ [0][0][2][0][RTW89_QATAR][0][77] = 127, -+ [0][0][2][0][RTW89_UK][1][77] = 127, -+ [0][0][2][0][RTW89_UK][0][77] = 127, -+ [0][0][2][0][RTW89_FCC][1][79] = 22, -+ [0][0][2][0][RTW89_FCC][2][79] = 68, -+ [0][0][2][0][RTW89_ETSI][1][79] = 127, -+ [0][0][2][0][RTW89_ETSI][0][79] = 127, -+ [0][0][2][0][RTW89_MKK][1][79] = 127, -+ [0][0][2][0][RTW89_MKK][0][79] = 127, -+ [0][0][2][0][RTW89_IC][1][79] = 22, -+ [0][0][2][0][RTW89_KCC][1][79] = 26, -+ [0][0][2][0][RTW89_KCC][0][79] = 127, -+ [0][0][2][0][RTW89_ACMA][1][79] = 127, -+ [0][0][2][0][RTW89_ACMA][0][79] = 127, -+ [0][0][2][0][RTW89_CHILE][1][79] = 22, -+ [0][0][2][0][RTW89_QATAR][1][79] = 127, -+ [0][0][2][0][RTW89_QATAR][0][79] = 127, -+ [0][0][2][0][RTW89_UK][1][79] = 127, -+ [0][0][2][0][RTW89_UK][0][79] = 127, -+ [0][0][2][0][RTW89_FCC][1][81] = 22, -+ [0][0][2][0][RTW89_FCC][2][81] = 68, -+ [0][0][2][0][RTW89_ETSI][1][81] = 127, -+ [0][0][2][0][RTW89_ETSI][0][81] = 127, -+ [0][0][2][0][RTW89_MKK][1][81] = 127, -+ [0][0][2][0][RTW89_MKK][0][81] = 127, -+ [0][0][2][0][RTW89_IC][1][81] = 22, -+ [0][0][2][0][RTW89_KCC][1][81] = 26, -+ [0][0][2][0][RTW89_KCC][0][81] = 127, -+ [0][0][2][0][RTW89_ACMA][1][81] = 127, -+ [0][0][2][0][RTW89_ACMA][0][81] = 127, -+ [0][0][2][0][RTW89_CHILE][1][81] = 22, -+ [0][0][2][0][RTW89_QATAR][1][81] = 127, -+ [0][0][2][0][RTW89_QATAR][0][81] = 127, -+ [0][0][2][0][RTW89_UK][1][81] = 127, -+ [0][0][2][0][RTW89_UK][0][81] = 127, -+ [0][0][2][0][RTW89_FCC][1][83] = 22, -+ [0][0][2][0][RTW89_FCC][2][83] = 68, -+ [0][0][2][0][RTW89_ETSI][1][83] = 127, -+ [0][0][2][0][RTW89_ETSI][0][83] = 127, -+ [0][0][2][0][RTW89_MKK][1][83] = 127, -+ [0][0][2][0][RTW89_MKK][0][83] = 127, -+ [0][0][2][0][RTW89_IC][1][83] = 22, -+ [0][0][2][0][RTW89_KCC][1][83] = 32, -+ [0][0][2][0][RTW89_KCC][0][83] = 127, -+ [0][0][2][0][RTW89_ACMA][1][83] = 127, -+ [0][0][2][0][RTW89_ACMA][0][83] = 127, -+ [0][0][2][0][RTW89_CHILE][1][83] = 22, -+ [0][0][2][0][RTW89_QATAR][1][83] = 127, -+ [0][0][2][0][RTW89_QATAR][0][83] = 127, -+ [0][0][2][0][RTW89_UK][1][83] = 127, -+ [0][0][2][0][RTW89_UK][0][83] = 127, -+ [0][0][2][0][RTW89_FCC][1][85] = 22, -+ [0][0][2][0][RTW89_FCC][2][85] = 68, -+ [0][0][2][0][RTW89_ETSI][1][85] = 127, -+ [0][0][2][0][RTW89_ETSI][0][85] = 127, -+ [0][0][2][0][RTW89_MKK][1][85] = 127, -+ [0][0][2][0][RTW89_MKK][0][85] = 127, -+ [0][0][2][0][RTW89_IC][1][85] = 22, -+ [0][0][2][0][RTW89_KCC][1][85] = 32, -+ [0][0][2][0][RTW89_KCC][0][85] = 127, -+ [0][0][2][0][RTW89_ACMA][1][85] = 127, -+ [0][0][2][0][RTW89_ACMA][0][85] = 127, -+ [0][0][2][0][RTW89_CHILE][1][85] = 22, -+ [0][0][2][0][RTW89_QATAR][1][85] = 127, -+ [0][0][2][0][RTW89_QATAR][0][85] = 127, -+ [0][0][2][0][RTW89_UK][1][85] = 127, -+ [0][0][2][0][RTW89_UK][0][85] = 127, -+ [0][0][2][0][RTW89_FCC][1][87] = 22, -+ [0][0][2][0][RTW89_FCC][2][87] = 127, -+ [0][0][2][0][RTW89_ETSI][1][87] = 127, -+ [0][0][2][0][RTW89_ETSI][0][87] = 127, -+ [0][0][2][0][RTW89_MKK][1][87] = 127, -+ [0][0][2][0][RTW89_MKK][0][87] = 127, -+ [0][0][2][0][RTW89_IC][1][87] = 22, -+ [0][0][2][0][RTW89_KCC][1][87] = 32, -+ [0][0][2][0][RTW89_KCC][0][87] = 127, -+ [0][0][2][0][RTW89_ACMA][1][87] = 127, -+ [0][0][2][0][RTW89_ACMA][0][87] = 127, -+ [0][0][2][0][RTW89_CHILE][1][87] = 22, -+ [0][0][2][0][RTW89_QATAR][1][87] = 127, -+ [0][0][2][0][RTW89_QATAR][0][87] = 127, -+ [0][0][2][0][RTW89_UK][1][87] = 127, -+ [0][0][2][0][RTW89_UK][0][87] = 127, -+ [0][0][2][0][RTW89_FCC][1][89] = 22, -+ [0][0][2][0][RTW89_FCC][2][89] = 127, -+ [0][0][2][0][RTW89_ETSI][1][89] = 127, -+ [0][0][2][0][RTW89_ETSI][0][89] = 127, -+ [0][0][2][0][RTW89_MKK][1][89] = 127, -+ [0][0][2][0][RTW89_MKK][0][89] = 127, -+ [0][0][2][0][RTW89_IC][1][89] = 22, -+ [0][0][2][0][RTW89_KCC][1][89] = 32, -+ [0][0][2][0][RTW89_KCC][0][89] = 127, -+ [0][0][2][0][RTW89_ACMA][1][89] = 127, -+ [0][0][2][0][RTW89_ACMA][0][89] = 127, -+ [0][0][2][0][RTW89_CHILE][1][89] = 22, -+ [0][0][2][0][RTW89_QATAR][1][89] = 127, -+ [0][0][2][0][RTW89_QATAR][0][89] = 127, -+ [0][0][2][0][RTW89_UK][1][89] = 127, -+ [0][0][2][0][RTW89_UK][0][89] = 127, -+ [0][0][2][0][RTW89_FCC][1][90] = 22, -+ [0][0][2][0][RTW89_FCC][2][90] = 127, -+ [0][0][2][0][RTW89_ETSI][1][90] = 127, -+ [0][0][2][0][RTW89_ETSI][0][90] = 127, -+ [0][0][2][0][RTW89_MKK][1][90] = 127, -+ [0][0][2][0][RTW89_MKK][0][90] = 127, -+ [0][0][2][0][RTW89_IC][1][90] = 22, -+ [0][0][2][0][RTW89_KCC][1][90] = 32, -+ [0][0][2][0][RTW89_KCC][0][90] = 127, -+ [0][0][2][0][RTW89_ACMA][1][90] = 127, -+ [0][0][2][0][RTW89_ACMA][0][90] = 127, -+ [0][0][2][0][RTW89_CHILE][1][90] = 22, -+ [0][0][2][0][RTW89_QATAR][1][90] = 127, -+ [0][0][2][0][RTW89_QATAR][0][90] = 127, -+ [0][0][2][0][RTW89_UK][1][90] = 127, -+ [0][0][2][0][RTW89_UK][0][90] = 127, -+ [0][0][2][0][RTW89_FCC][1][92] = 22, -+ [0][0][2][0][RTW89_FCC][2][92] = 127, -+ [0][0][2][0][RTW89_ETSI][1][92] = 127, -+ [0][0][2][0][RTW89_ETSI][0][92] = 127, -+ [0][0][2][0][RTW89_MKK][1][92] = 127, -+ [0][0][2][0][RTW89_MKK][0][92] = 127, -+ [0][0][2][0][RTW89_IC][1][92] = 22, -+ [0][0][2][0][RTW89_KCC][1][92] = 32, -+ [0][0][2][0][RTW89_KCC][0][92] = 127, -+ [0][0][2][0][RTW89_ACMA][1][92] = 127, -+ [0][0][2][0][RTW89_ACMA][0][92] = 127, -+ [0][0][2][0][RTW89_CHILE][1][92] = 22, -+ [0][0][2][0][RTW89_QATAR][1][92] = 127, -+ [0][0][2][0][RTW89_QATAR][0][92] = 127, -+ [0][0][2][0][RTW89_UK][1][92] = 127, -+ [0][0][2][0][RTW89_UK][0][92] = 127, -+ [0][0][2][0][RTW89_FCC][1][94] = 22, -+ [0][0][2][0][RTW89_FCC][2][94] = 127, -+ [0][0][2][0][RTW89_ETSI][1][94] = 127, -+ [0][0][2][0][RTW89_ETSI][0][94] = 127, -+ [0][0][2][0][RTW89_MKK][1][94] = 127, -+ [0][0][2][0][RTW89_MKK][0][94] = 127, -+ [0][0][2][0][RTW89_IC][1][94] = 22, -+ [0][0][2][0][RTW89_KCC][1][94] = 32, -+ [0][0][2][0][RTW89_KCC][0][94] = 127, -+ [0][0][2][0][RTW89_ACMA][1][94] = 127, -+ [0][0][2][0][RTW89_ACMA][0][94] = 127, -+ [0][0][2][0][RTW89_CHILE][1][94] = 22, -+ [0][0][2][0][RTW89_QATAR][1][94] = 127, -+ [0][0][2][0][RTW89_QATAR][0][94] = 127, -+ [0][0][2][0][RTW89_UK][1][94] = 127, -+ [0][0][2][0][RTW89_UK][0][94] = 127, -+ [0][0][2][0][RTW89_FCC][1][96] = 22, -+ [0][0][2][0][RTW89_FCC][2][96] = 127, -+ [0][0][2][0][RTW89_ETSI][1][96] = 127, -+ [0][0][2][0][RTW89_ETSI][0][96] = 127, -+ [0][0][2][0][RTW89_MKK][1][96] = 127, -+ [0][0][2][0][RTW89_MKK][0][96] = 127, -+ [0][0][2][0][RTW89_IC][1][96] = 22, -+ [0][0][2][0][RTW89_KCC][1][96] = 32, -+ [0][0][2][0][RTW89_KCC][0][96] = 127, -+ [0][0][2][0][RTW89_ACMA][1][96] = 127, -+ [0][0][2][0][RTW89_ACMA][0][96] = 127, -+ [0][0][2][0][RTW89_CHILE][1][96] = 22, -+ [0][0][2][0][RTW89_QATAR][1][96] = 127, -+ [0][0][2][0][RTW89_QATAR][0][96] = 127, -+ [0][0][2][0][RTW89_UK][1][96] = 127, -+ [0][0][2][0][RTW89_UK][0][96] = 127, -+ [0][0][2][0][RTW89_FCC][1][98] = 22, -+ [0][0][2][0][RTW89_FCC][2][98] = 127, -+ [0][0][2][0][RTW89_ETSI][1][98] = 127, -+ [0][0][2][0][RTW89_ETSI][0][98] = 127, -+ [0][0][2][0][RTW89_MKK][1][98] = 127, -+ [0][0][2][0][RTW89_MKK][0][98] = 127, -+ [0][0][2][0][RTW89_IC][1][98] = 22, -+ [0][0][2][0][RTW89_KCC][1][98] = 32, -+ [0][0][2][0][RTW89_KCC][0][98] = 127, -+ [0][0][2][0][RTW89_ACMA][1][98] = 127, -+ [0][0][2][0][RTW89_ACMA][0][98] = 127, -+ [0][0][2][0][RTW89_CHILE][1][98] = 22, -+ [0][0][2][0][RTW89_QATAR][1][98] = 127, -+ [0][0][2][0][RTW89_QATAR][0][98] = 127, -+ [0][0][2][0][RTW89_UK][1][98] = 127, -+ [0][0][2][0][RTW89_UK][0][98] = 127, -+ [0][0][2][0][RTW89_FCC][1][100] = 22, -+ [0][0][2][0][RTW89_FCC][2][100] = 127, -+ [0][0][2][0][RTW89_ETSI][1][100] = 127, -+ [0][0][2][0][RTW89_ETSI][0][100] = 127, -+ [0][0][2][0][RTW89_MKK][1][100] = 127, -+ [0][0][2][0][RTW89_MKK][0][100] = 127, -+ [0][0][2][0][RTW89_IC][1][100] = 22, -+ [0][0][2][0][RTW89_KCC][1][100] = 32, -+ [0][0][2][0][RTW89_KCC][0][100] = 127, -+ [0][0][2][0][RTW89_ACMA][1][100] = 127, -+ [0][0][2][0][RTW89_ACMA][0][100] = 127, -+ [0][0][2][0][RTW89_CHILE][1][100] = 22, -+ [0][0][2][0][RTW89_QATAR][1][100] = 127, -+ [0][0][2][0][RTW89_QATAR][0][100] = 127, -+ [0][0][2][0][RTW89_UK][1][100] = 127, -+ [0][0][2][0][RTW89_UK][0][100] = 127, -+ [0][0][2][0][RTW89_FCC][1][102] = 22, -+ [0][0][2][0][RTW89_FCC][2][102] = 127, -+ [0][0][2][0][RTW89_ETSI][1][102] = 127, -+ [0][0][2][0][RTW89_ETSI][0][102] = 127, -+ [0][0][2][0][RTW89_MKK][1][102] = 127, -+ [0][0][2][0][RTW89_MKK][0][102] = 127, -+ [0][0][2][0][RTW89_IC][1][102] = 22, -+ [0][0][2][0][RTW89_KCC][1][102] = 32, -+ [0][0][2][0][RTW89_KCC][0][102] = 127, -+ [0][0][2][0][RTW89_ACMA][1][102] = 127, -+ [0][0][2][0][RTW89_ACMA][0][102] = 127, -+ [0][0][2][0][RTW89_CHILE][1][102] = 22, -+ [0][0][2][0][RTW89_QATAR][1][102] = 127, -+ [0][0][2][0][RTW89_QATAR][0][102] = 127, -+ [0][0][2][0][RTW89_UK][1][102] = 127, -+ [0][0][2][0][RTW89_UK][0][102] = 127, -+ [0][0][2][0][RTW89_FCC][1][104] = 22, -+ [0][0][2][0][RTW89_FCC][2][104] = 127, -+ [0][0][2][0][RTW89_ETSI][1][104] = 127, -+ [0][0][2][0][RTW89_ETSI][0][104] = 127, -+ [0][0][2][0][RTW89_MKK][1][104] = 127, -+ [0][0][2][0][RTW89_MKK][0][104] = 127, -+ [0][0][2][0][RTW89_IC][1][104] = 22, -+ [0][0][2][0][RTW89_KCC][1][104] = 32, -+ [0][0][2][0][RTW89_KCC][0][104] = 127, -+ [0][0][2][0][RTW89_ACMA][1][104] = 127, -+ [0][0][2][0][RTW89_ACMA][0][104] = 127, -+ [0][0][2][0][RTW89_CHILE][1][104] = 22, -+ [0][0][2][0][RTW89_QATAR][1][104] = 127, -+ [0][0][2][0][RTW89_QATAR][0][104] = 127, -+ [0][0][2][0][RTW89_UK][1][104] = 127, -+ [0][0][2][0][RTW89_UK][0][104] = 127, -+ [0][0][2][0][RTW89_FCC][1][105] = 22, -+ [0][0][2][0][RTW89_FCC][2][105] = 127, -+ [0][0][2][0][RTW89_ETSI][1][105] = 127, -+ [0][0][2][0][RTW89_ETSI][0][105] = 127, -+ [0][0][2][0][RTW89_MKK][1][105] = 127, -+ [0][0][2][0][RTW89_MKK][0][105] = 127, -+ [0][0][2][0][RTW89_IC][1][105] = 22, -+ [0][0][2][0][RTW89_KCC][1][105] = 32, -+ [0][0][2][0][RTW89_KCC][0][105] = 127, -+ [0][0][2][0][RTW89_ACMA][1][105] = 127, -+ [0][0][2][0][RTW89_ACMA][0][105] = 127, -+ [0][0][2][0][RTW89_CHILE][1][105] = 22, -+ [0][0][2][0][RTW89_QATAR][1][105] = 127, -+ [0][0][2][0][RTW89_QATAR][0][105] = 127, -+ [0][0][2][0][RTW89_UK][1][105] = 127, -+ [0][0][2][0][RTW89_UK][0][105] = 127, -+ [0][0][2][0][RTW89_FCC][1][107] = 24, -+ [0][0][2][0][RTW89_FCC][2][107] = 127, -+ [0][0][2][0][RTW89_ETSI][1][107] = 127, -+ [0][0][2][0][RTW89_ETSI][0][107] = 127, -+ [0][0][2][0][RTW89_MKK][1][107] = 127, -+ [0][0][2][0][RTW89_MKK][0][107] = 127, -+ [0][0][2][0][RTW89_IC][1][107] = 24, -+ [0][0][2][0][RTW89_KCC][1][107] = 32, -+ [0][0][2][0][RTW89_KCC][0][107] = 127, -+ [0][0][2][0][RTW89_ACMA][1][107] = 127, -+ [0][0][2][0][RTW89_ACMA][0][107] = 127, -+ [0][0][2][0][RTW89_CHILE][1][107] = 24, -+ [0][0][2][0][RTW89_QATAR][1][107] = 127, -+ [0][0][2][0][RTW89_QATAR][0][107] = 127, -+ [0][0][2][0][RTW89_UK][1][107] = 127, -+ [0][0][2][0][RTW89_UK][0][107] = 127, -+ [0][0][2][0][RTW89_FCC][1][109] = 24, -+ [0][0][2][0][RTW89_FCC][2][109] = 127, -+ [0][0][2][0][RTW89_ETSI][1][109] = 127, -+ [0][0][2][0][RTW89_ETSI][0][109] = 127, -+ [0][0][2][0][RTW89_MKK][1][109] = 127, -+ [0][0][2][0][RTW89_MKK][0][109] = 127, -+ [0][0][2][0][RTW89_IC][1][109] = 24, -+ [0][0][2][0][RTW89_KCC][1][109] = 32, -+ [0][0][2][0][RTW89_KCC][0][109] = 127, -+ [0][0][2][0][RTW89_ACMA][1][109] = 127, -+ [0][0][2][0][RTW89_ACMA][0][109] = 127, -+ [0][0][2][0][RTW89_CHILE][1][109] = 24, -+ [0][0][2][0][RTW89_QATAR][1][109] = 127, -+ [0][0][2][0][RTW89_QATAR][0][109] = 127, -+ [0][0][2][0][RTW89_UK][1][109] = 127, -+ [0][0][2][0][RTW89_UK][0][109] = 127, -+ [0][0][2][0][RTW89_FCC][1][111] = 127, -+ [0][0][2][0][RTW89_FCC][2][111] = 127, -+ [0][0][2][0][RTW89_ETSI][1][111] = 127, -+ [0][0][2][0][RTW89_ETSI][0][111] = 127, -+ [0][0][2][0][RTW89_MKK][1][111] = 127, -+ [0][0][2][0][RTW89_MKK][0][111] = 127, -+ [0][0][2][0][RTW89_IC][1][111] = 127, -+ [0][0][2][0][RTW89_KCC][1][111] = 127, -+ [0][0][2][0][RTW89_KCC][0][111] = 127, -+ [0][0][2][0][RTW89_ACMA][1][111] = 127, -+ [0][0][2][0][RTW89_ACMA][0][111] = 127, -+ [0][0][2][0][RTW89_CHILE][1][111] = 127, -+ [0][0][2][0][RTW89_QATAR][1][111] = 127, -+ [0][0][2][0][RTW89_QATAR][0][111] = 127, -+ [0][0][2][0][RTW89_UK][1][111] = 127, -+ [0][0][2][0][RTW89_UK][0][111] = 127, -+ [0][0][2][0][RTW89_FCC][1][113] = 127, -+ [0][0][2][0][RTW89_FCC][2][113] = 127, -+ [0][0][2][0][RTW89_ETSI][1][113] = 127, -+ [0][0][2][0][RTW89_ETSI][0][113] = 127, -+ [0][0][2][0][RTW89_MKK][1][113] = 127, -+ [0][0][2][0][RTW89_MKK][0][113] = 127, -+ [0][0][2][0][RTW89_IC][1][113] = 127, -+ [0][0][2][0][RTW89_KCC][1][113] = 127, -+ [0][0][2][0][RTW89_KCC][0][113] = 127, -+ [0][0][2][0][RTW89_ACMA][1][113] = 127, -+ [0][0][2][0][RTW89_ACMA][0][113] = 127, -+ [0][0][2][0][RTW89_CHILE][1][113] = 127, -+ [0][0][2][0][RTW89_QATAR][1][113] = 127, -+ [0][0][2][0][RTW89_QATAR][0][113] = 127, -+ [0][0][2][0][RTW89_UK][1][113] = 127, -+ [0][0][2][0][RTW89_UK][0][113] = 127, -+ [0][0][2][0][RTW89_FCC][1][115] = 127, -+ [0][0][2][0][RTW89_FCC][2][115] = 127, -+ [0][0][2][0][RTW89_ETSI][1][115] = 127, -+ [0][0][2][0][RTW89_ETSI][0][115] = 127, -+ [0][0][2][0][RTW89_MKK][1][115] = 127, -+ [0][0][2][0][RTW89_MKK][0][115] = 127, -+ [0][0][2][0][RTW89_IC][1][115] = 127, -+ [0][0][2][0][RTW89_KCC][1][115] = 127, -+ [0][0][2][0][RTW89_KCC][0][115] = 127, -+ [0][0][2][0][RTW89_ACMA][1][115] = 127, -+ [0][0][2][0][RTW89_ACMA][0][115] = 127, -+ [0][0][2][0][RTW89_CHILE][1][115] = 127, -+ [0][0][2][0][RTW89_QATAR][1][115] = 127, -+ [0][0][2][0][RTW89_QATAR][0][115] = 127, -+ [0][0][2][0][RTW89_UK][1][115] = 127, -+ [0][0][2][0][RTW89_UK][0][115] = 127, -+ [0][0][2][0][RTW89_FCC][1][117] = 127, -+ [0][0][2][0][RTW89_FCC][2][117] = 127, -+ [0][0][2][0][RTW89_ETSI][1][117] = 127, -+ [0][0][2][0][RTW89_ETSI][0][117] = 127, -+ [0][0][2][0][RTW89_MKK][1][117] = 127, -+ [0][0][2][0][RTW89_MKK][0][117] = 127, -+ [0][0][2][0][RTW89_IC][1][117] = 127, -+ [0][0][2][0][RTW89_KCC][1][117] = 127, -+ [0][0][2][0][RTW89_KCC][0][117] = 127, -+ [0][0][2][0][RTW89_ACMA][1][117] = 127, -+ [0][0][2][0][RTW89_ACMA][0][117] = 127, -+ [0][0][2][0][RTW89_CHILE][1][117] = 127, -+ [0][0][2][0][RTW89_QATAR][1][117] = 127, -+ [0][0][2][0][RTW89_QATAR][0][117] = 127, -+ [0][0][2][0][RTW89_UK][1][117] = 127, -+ [0][0][2][0][RTW89_UK][0][117] = 127, -+ [0][0][2][0][RTW89_FCC][1][119] = 127, -+ [0][0][2][0][RTW89_FCC][2][119] = 127, -+ [0][0][2][0][RTW89_ETSI][1][119] = 127, -+ [0][0][2][0][RTW89_ETSI][0][119] = 127, -+ [0][0][2][0][RTW89_MKK][1][119] = 127, -+ [0][0][2][0][RTW89_MKK][0][119] = 127, -+ [0][0][2][0][RTW89_IC][1][119] = 127, -+ [0][0][2][0][RTW89_KCC][1][119] = 127, -+ [0][0][2][0][RTW89_KCC][0][119] = 127, -+ [0][0][2][0][RTW89_ACMA][1][119] = 127, -+ [0][0][2][0][RTW89_ACMA][0][119] = 127, -+ [0][0][2][0][RTW89_CHILE][1][119] = 127, -+ [0][0][2][0][RTW89_QATAR][1][119] = 127, -+ [0][0][2][0][RTW89_QATAR][0][119] = 127, -+ [0][0][2][0][RTW89_UK][1][119] = 127, -+ [0][0][2][0][RTW89_UK][0][119] = 127, -+ [0][1][2][0][RTW89_FCC][1][0] = -2, -+ [0][1][2][0][RTW89_FCC][2][0] = 54, -+ [0][1][2][0][RTW89_ETSI][1][0] = 54, -+ [0][1][2][0][RTW89_ETSI][0][0] = 18, -+ [0][1][2][0][RTW89_MKK][1][0] = 56, -+ [0][1][2][0][RTW89_MKK][0][0] = 16, -+ [0][1][2][0][RTW89_IC][1][0] = -2, -+ [0][1][2][0][RTW89_KCC][1][0] = 12, -+ [0][1][2][0][RTW89_KCC][0][0] = 10, -+ [0][1][2][0][RTW89_ACMA][1][0] = 54, -+ [0][1][2][0][RTW89_ACMA][0][0] = 18, -+ [0][1][2][0][RTW89_CHILE][1][0] = -2, -+ [0][1][2][0][RTW89_QATAR][1][0] = 54, -+ [0][1][2][0][RTW89_QATAR][0][0] = 18, -+ [0][1][2][0][RTW89_UK][1][0] = 54, -+ [0][1][2][0][RTW89_UK][0][0] = 18, -+ [0][1][2][0][RTW89_FCC][1][2] = -4, -+ [0][1][2][0][RTW89_FCC][2][2] = 54, -+ [0][1][2][0][RTW89_ETSI][1][2] = 54, -+ [0][1][2][0][RTW89_ETSI][0][2] = 18, -+ [0][1][2][0][RTW89_MKK][1][2] = 54, -+ [0][1][2][0][RTW89_MKK][0][2] = 16, -+ [0][1][2][0][RTW89_IC][1][2] = -4, -+ [0][1][2][0][RTW89_KCC][1][2] = 12, -+ [0][1][2][0][RTW89_KCC][0][2] = 12, -+ [0][1][2][0][RTW89_ACMA][1][2] = 54, -+ [0][1][2][0][RTW89_ACMA][0][2] = 18, -+ [0][1][2][0][RTW89_CHILE][1][2] = -4, -+ [0][1][2][0][RTW89_QATAR][1][2] = 54, -+ [0][1][2][0][RTW89_QATAR][0][2] = 18, -+ [0][1][2][0][RTW89_UK][1][2] = 54, -+ [0][1][2][0][RTW89_UK][0][2] = 18, -+ [0][1][2][0][RTW89_FCC][1][4] = -4, -+ [0][1][2][0][RTW89_FCC][2][4] = 54, -+ [0][1][2][0][RTW89_ETSI][1][4] = 54, -+ [0][1][2][0][RTW89_ETSI][0][4] = 18, -+ [0][1][2][0][RTW89_MKK][1][4] = 54, -+ [0][1][2][0][RTW89_MKK][0][4] = 16, -+ [0][1][2][0][RTW89_IC][1][4] = -4, -+ [0][1][2][0][RTW89_KCC][1][4] = 12, -+ [0][1][2][0][RTW89_KCC][0][4] = 12, -+ [0][1][2][0][RTW89_ACMA][1][4] = 54, -+ [0][1][2][0][RTW89_ACMA][0][4] = 18, -+ [0][1][2][0][RTW89_CHILE][1][4] = -4, -+ [0][1][2][0][RTW89_QATAR][1][4] = 54, -+ [0][1][2][0][RTW89_QATAR][0][4] = 18, -+ [0][1][2][0][RTW89_UK][1][4] = 54, -+ [0][1][2][0][RTW89_UK][0][4] = 18, -+ [0][1][2][0][RTW89_FCC][1][6] = -4, -+ [0][1][2][0][RTW89_FCC][2][6] = 54, -+ [0][1][2][0][RTW89_ETSI][1][6] = 54, -+ [0][1][2][0][RTW89_ETSI][0][6] = 18, -+ [0][1][2][0][RTW89_MKK][1][6] = 54, -+ [0][1][2][0][RTW89_MKK][0][6] = 16, -+ [0][1][2][0][RTW89_IC][1][6] = -4, -+ [0][1][2][0][RTW89_KCC][1][6] = 12, -+ [0][1][2][0][RTW89_KCC][0][6] = 12, -+ [0][1][2][0][RTW89_ACMA][1][6] = 54, -+ [0][1][2][0][RTW89_ACMA][0][6] = 18, -+ [0][1][2][0][RTW89_CHILE][1][6] = -4, -+ [0][1][2][0][RTW89_QATAR][1][6] = 54, -+ [0][1][2][0][RTW89_QATAR][0][6] = 18, -+ [0][1][2][0][RTW89_UK][1][6] = 54, -+ [0][1][2][0][RTW89_UK][0][6] = 18, -+ [0][1][2][0][RTW89_FCC][1][8] = -4, -+ [0][1][2][0][RTW89_FCC][2][8] = 54, -+ [0][1][2][0][RTW89_ETSI][1][8] = 54, -+ [0][1][2][0][RTW89_ETSI][0][8] = 18, -+ [0][1][2][0][RTW89_MKK][1][8] = 54, -+ [0][1][2][0][RTW89_MKK][0][8] = 16, -+ [0][1][2][0][RTW89_IC][1][8] = -4, -+ [0][1][2][0][RTW89_KCC][1][8] = 12, -+ [0][1][2][0][RTW89_KCC][0][8] = 12, -+ [0][1][2][0][RTW89_ACMA][1][8] = 54, -+ [0][1][2][0][RTW89_ACMA][0][8] = 18, -+ [0][1][2][0][RTW89_CHILE][1][8] = -4, -+ [0][1][2][0][RTW89_QATAR][1][8] = 54, -+ [0][1][2][0][RTW89_QATAR][0][8] = 18, -+ [0][1][2][0][RTW89_UK][1][8] = 54, -+ [0][1][2][0][RTW89_UK][0][8] = 18, -+ [0][1][2][0][RTW89_FCC][1][10] = -4, -+ [0][1][2][0][RTW89_FCC][2][10] = 54, -+ [0][1][2][0][RTW89_ETSI][1][10] = 54, -+ [0][1][2][0][RTW89_ETSI][0][10] = 18, -+ [0][1][2][0][RTW89_MKK][1][10] = 54, -+ [0][1][2][0][RTW89_MKK][0][10] = 16, -+ [0][1][2][0][RTW89_IC][1][10] = -4, -+ [0][1][2][0][RTW89_KCC][1][10] = 12, -+ [0][1][2][0][RTW89_KCC][0][10] = 12, -+ [0][1][2][0][RTW89_ACMA][1][10] = 54, -+ [0][1][2][0][RTW89_ACMA][0][10] = 18, -+ [0][1][2][0][RTW89_CHILE][1][10] = -4, -+ [0][1][2][0][RTW89_QATAR][1][10] = 54, -+ [0][1][2][0][RTW89_QATAR][0][10] = 18, -+ [0][1][2][0][RTW89_UK][1][10] = 54, -+ [0][1][2][0][RTW89_UK][0][10] = 18, -+ [0][1][2][0][RTW89_FCC][1][12] = -4, -+ [0][1][2][0][RTW89_FCC][2][12] = 54, -+ [0][1][2][0][RTW89_ETSI][1][12] = 54, -+ [0][1][2][0][RTW89_ETSI][0][12] = 18, -+ [0][1][2][0][RTW89_MKK][1][12] = 54, -+ [0][1][2][0][RTW89_MKK][0][12] = 16, -+ [0][1][2][0][RTW89_IC][1][12] = -4, -+ [0][1][2][0][RTW89_KCC][1][12] = 12, -+ [0][1][2][0][RTW89_KCC][0][12] = 12, -+ [0][1][2][0][RTW89_ACMA][1][12] = 54, -+ [0][1][2][0][RTW89_ACMA][0][12] = 18, -+ [0][1][2][0][RTW89_CHILE][1][12] = -4, -+ [0][1][2][0][RTW89_QATAR][1][12] = 54, -+ [0][1][2][0][RTW89_QATAR][0][12] = 18, -+ [0][1][2][0][RTW89_UK][1][12] = 54, -+ [0][1][2][0][RTW89_UK][0][12] = 18, -+ [0][1][2][0][RTW89_FCC][1][14] = -4, -+ [0][1][2][0][RTW89_FCC][2][14] = 54, -+ [0][1][2][0][RTW89_ETSI][1][14] = 54, -+ [0][1][2][0][RTW89_ETSI][0][14] = 18, -+ [0][1][2][0][RTW89_MKK][1][14] = 54, -+ [0][1][2][0][RTW89_MKK][0][14] = 16, -+ [0][1][2][0][RTW89_IC][1][14] = -4, -+ [0][1][2][0][RTW89_KCC][1][14] = 12, -+ [0][1][2][0][RTW89_KCC][0][14] = 12, -+ [0][1][2][0][RTW89_ACMA][1][14] = 54, -+ [0][1][2][0][RTW89_ACMA][0][14] = 18, -+ [0][1][2][0][RTW89_CHILE][1][14] = -4, -+ [0][1][2][0][RTW89_QATAR][1][14] = 54, -+ [0][1][2][0][RTW89_QATAR][0][14] = 18, -+ [0][1][2][0][RTW89_UK][1][14] = 54, -+ [0][1][2][0][RTW89_UK][0][14] = 18, -+ [0][1][2][0][RTW89_FCC][1][15] = -4, -+ [0][1][2][0][RTW89_FCC][2][15] = 54, -+ [0][1][2][0][RTW89_ETSI][1][15] = 54, -+ [0][1][2][0][RTW89_ETSI][0][15] = 18, -+ [0][1][2][0][RTW89_MKK][1][15] = 54, -+ [0][1][2][0][RTW89_MKK][0][15] = 16, -+ [0][1][2][0][RTW89_IC][1][15] = -4, -+ [0][1][2][0][RTW89_KCC][1][15] = 12, -+ [0][1][2][0][RTW89_KCC][0][15] = 12, -+ [0][1][2][0][RTW89_ACMA][1][15] = 54, -+ [0][1][2][0][RTW89_ACMA][0][15] = 18, -+ [0][1][2][0][RTW89_CHILE][1][15] = -4, -+ [0][1][2][0][RTW89_QATAR][1][15] = 54, -+ [0][1][2][0][RTW89_QATAR][0][15] = 18, -+ [0][1][2][0][RTW89_UK][1][15] = 54, -+ [0][1][2][0][RTW89_UK][0][15] = 18, -+ [0][1][2][0][RTW89_FCC][1][17] = -4, -+ [0][1][2][0][RTW89_FCC][2][17] = 54, -+ [0][1][2][0][RTW89_ETSI][1][17] = 54, -+ [0][1][2][0][RTW89_ETSI][0][17] = 18, -+ [0][1][2][0][RTW89_MKK][1][17] = 54, -+ [0][1][2][0][RTW89_MKK][0][17] = 16, -+ [0][1][2][0][RTW89_IC][1][17] = -4, -+ [0][1][2][0][RTW89_KCC][1][17] = 12, -+ [0][1][2][0][RTW89_KCC][0][17] = 12, -+ [0][1][2][0][RTW89_ACMA][1][17] = 54, -+ [0][1][2][0][RTW89_ACMA][0][17] = 18, -+ [0][1][2][0][RTW89_CHILE][1][17] = -4, -+ [0][1][2][0][RTW89_QATAR][1][17] = 54, -+ [0][1][2][0][RTW89_QATAR][0][17] = 18, -+ [0][1][2][0][RTW89_UK][1][17] = 54, -+ [0][1][2][0][RTW89_UK][0][17] = 18, -+ [0][1][2][0][RTW89_FCC][1][19] = -4, -+ [0][1][2][0][RTW89_FCC][2][19] = 54, -+ [0][1][2][0][RTW89_ETSI][1][19] = 54, -+ [0][1][2][0][RTW89_ETSI][0][19] = 18, -+ [0][1][2][0][RTW89_MKK][1][19] = 54, -+ [0][1][2][0][RTW89_MKK][0][19] = 16, -+ [0][1][2][0][RTW89_IC][1][19] = -4, -+ [0][1][2][0][RTW89_KCC][1][19] = 12, -+ [0][1][2][0][RTW89_KCC][0][19] = 12, -+ [0][1][2][0][RTW89_ACMA][1][19] = 54, -+ [0][1][2][0][RTW89_ACMA][0][19] = 18, -+ [0][1][2][0][RTW89_CHILE][1][19] = -4, -+ [0][1][2][0][RTW89_QATAR][1][19] = 54, -+ [0][1][2][0][RTW89_QATAR][0][19] = 18, -+ [0][1][2][0][RTW89_UK][1][19] = 54, -+ [0][1][2][0][RTW89_UK][0][19] = 18, -+ [0][1][2][0][RTW89_FCC][1][21] = -4, -+ [0][1][2][0][RTW89_FCC][2][21] = 54, -+ [0][1][2][0][RTW89_ETSI][1][21] = 54, -+ [0][1][2][0][RTW89_ETSI][0][21] = 18, -+ [0][1][2][0][RTW89_MKK][1][21] = 54, -+ [0][1][2][0][RTW89_MKK][0][21] = 16, -+ [0][1][2][0][RTW89_IC][1][21] = -4, -+ [0][1][2][0][RTW89_KCC][1][21] = 12, -+ [0][1][2][0][RTW89_KCC][0][21] = 12, -+ [0][1][2][0][RTW89_ACMA][1][21] = 54, -+ [0][1][2][0][RTW89_ACMA][0][21] = 18, -+ [0][1][2][0][RTW89_CHILE][1][21] = -4, -+ [0][1][2][0][RTW89_QATAR][1][21] = 54, -+ [0][1][2][0][RTW89_QATAR][0][21] = 18, -+ [0][1][2][0][RTW89_UK][1][21] = 54, -+ [0][1][2][0][RTW89_UK][0][21] = 18, -+ [0][1][2][0][RTW89_FCC][1][23] = -4, -+ [0][1][2][0][RTW89_FCC][2][23] = 68, -+ [0][1][2][0][RTW89_ETSI][1][23] = 54, -+ [0][1][2][0][RTW89_ETSI][0][23] = 18, -+ [0][1][2][0][RTW89_MKK][1][23] = 54, -+ [0][1][2][0][RTW89_MKK][0][23] = 16, -+ [0][1][2][0][RTW89_IC][1][23] = -4, -+ [0][1][2][0][RTW89_KCC][1][23] = 12, -+ [0][1][2][0][RTW89_KCC][0][23] = 10, -+ [0][1][2][0][RTW89_ACMA][1][23] = 54, -+ [0][1][2][0][RTW89_ACMA][0][23] = 18, -+ [0][1][2][0][RTW89_CHILE][1][23] = -4, -+ [0][1][2][0][RTW89_QATAR][1][23] = 54, -+ [0][1][2][0][RTW89_QATAR][0][23] = 18, -+ [0][1][2][0][RTW89_UK][1][23] = 54, -+ [0][1][2][0][RTW89_UK][0][23] = 18, -+ [0][1][2][0][RTW89_FCC][1][25] = -4, -+ [0][1][2][0][RTW89_FCC][2][25] = 68, -+ [0][1][2][0][RTW89_ETSI][1][25] = 54, -+ [0][1][2][0][RTW89_ETSI][0][25] = 18, -+ [0][1][2][0][RTW89_MKK][1][25] = 54, -+ [0][1][2][0][RTW89_MKK][0][25] = 16, -+ [0][1][2][0][RTW89_IC][1][25] = -4, -+ [0][1][2][0][RTW89_KCC][1][25] = 12, -+ [0][1][2][0][RTW89_KCC][0][25] = 14, -+ [0][1][2][0][RTW89_ACMA][1][25] = 54, -+ [0][1][2][0][RTW89_ACMA][0][25] = 18, -+ [0][1][2][0][RTW89_CHILE][1][25] = -4, -+ [0][1][2][0][RTW89_QATAR][1][25] = 54, -+ [0][1][2][0][RTW89_QATAR][0][25] = 18, -+ [0][1][2][0][RTW89_UK][1][25] = 54, -+ [0][1][2][0][RTW89_UK][0][25] = 18, -+ [0][1][2][0][RTW89_FCC][1][27] = -4, -+ [0][1][2][0][RTW89_FCC][2][27] = 68, -+ [0][1][2][0][RTW89_ETSI][1][27] = 54, -+ [0][1][2][0][RTW89_ETSI][0][27] = 18, -+ [0][1][2][0][RTW89_MKK][1][27] = 54, -+ [0][1][2][0][RTW89_MKK][0][27] = 16, -+ [0][1][2][0][RTW89_IC][1][27] = -4, -+ [0][1][2][0][RTW89_KCC][1][27] = 12, -+ [0][1][2][0][RTW89_KCC][0][27] = 14, -+ [0][1][2][0][RTW89_ACMA][1][27] = 54, -+ [0][1][2][0][RTW89_ACMA][0][27] = 18, -+ [0][1][2][0][RTW89_CHILE][1][27] = -4, -+ [0][1][2][0][RTW89_QATAR][1][27] = 54, -+ [0][1][2][0][RTW89_QATAR][0][27] = 18, -+ [0][1][2][0][RTW89_UK][1][27] = 54, -+ [0][1][2][0][RTW89_UK][0][27] = 18, -+ [0][1][2][0][RTW89_FCC][1][29] = -4, -+ [0][1][2][0][RTW89_FCC][2][29] = 68, -+ [0][1][2][0][RTW89_ETSI][1][29] = 54, -+ [0][1][2][0][RTW89_ETSI][0][29] = 18, -+ [0][1][2][0][RTW89_MKK][1][29] = 54, -+ [0][1][2][0][RTW89_MKK][0][29] = 16, -+ [0][1][2][0][RTW89_IC][1][29] = -4, -+ [0][1][2][0][RTW89_KCC][1][29] = 12, -+ [0][1][2][0][RTW89_KCC][0][29] = 14, -+ [0][1][2][0][RTW89_ACMA][1][29] = 54, -+ [0][1][2][0][RTW89_ACMA][0][29] = 18, -+ [0][1][2][0][RTW89_CHILE][1][29] = -4, -+ [0][1][2][0][RTW89_QATAR][1][29] = 54, -+ [0][1][2][0][RTW89_QATAR][0][29] = 18, -+ [0][1][2][0][RTW89_UK][1][29] = 54, -+ [0][1][2][0][RTW89_UK][0][29] = 18, -+ [0][1][2][0][RTW89_FCC][1][30] = -4, -+ [0][1][2][0][RTW89_FCC][2][30] = 68, -+ [0][1][2][0][RTW89_ETSI][1][30] = 54, -+ [0][1][2][0][RTW89_ETSI][0][30] = 18, -+ [0][1][2][0][RTW89_MKK][1][30] = 54, -+ [0][1][2][0][RTW89_MKK][0][30] = 16, -+ [0][1][2][0][RTW89_IC][1][30] = -4, -+ [0][1][2][0][RTW89_KCC][1][30] = 12, -+ [0][1][2][0][RTW89_KCC][0][30] = 14, -+ [0][1][2][0][RTW89_ACMA][1][30] = 54, -+ [0][1][2][0][RTW89_ACMA][0][30] = 18, -+ [0][1][2][0][RTW89_CHILE][1][30] = -4, -+ [0][1][2][0][RTW89_QATAR][1][30] = 54, -+ [0][1][2][0][RTW89_QATAR][0][30] = 18, -+ [0][1][2][0][RTW89_UK][1][30] = 54, -+ [0][1][2][0][RTW89_UK][0][30] = 18, -+ [0][1][2][0][RTW89_FCC][1][32] = -4, -+ [0][1][2][0][RTW89_FCC][2][32] = 68, -+ [0][1][2][0][RTW89_ETSI][1][32] = 54, -+ [0][1][2][0][RTW89_ETSI][0][32] = 18, -+ [0][1][2][0][RTW89_MKK][1][32] = 54, -+ [0][1][2][0][RTW89_MKK][0][32] = 16, -+ [0][1][2][0][RTW89_IC][1][32] = -4, -+ [0][1][2][0][RTW89_KCC][1][32] = 12, -+ [0][1][2][0][RTW89_KCC][0][32] = 14, -+ [0][1][2][0][RTW89_ACMA][1][32] = 54, -+ [0][1][2][0][RTW89_ACMA][0][32] = 18, -+ [0][1][2][0][RTW89_CHILE][1][32] = -4, -+ [0][1][2][0][RTW89_QATAR][1][32] = 54, -+ [0][1][2][0][RTW89_QATAR][0][32] = 18, -+ [0][1][2][0][RTW89_UK][1][32] = 54, -+ [0][1][2][0][RTW89_UK][0][32] = 18, -+ [0][1][2][0][RTW89_FCC][1][34] = -4, -+ [0][1][2][0][RTW89_FCC][2][34] = 68, -+ [0][1][2][0][RTW89_ETSI][1][34] = 54, -+ [0][1][2][0][RTW89_ETSI][0][34] = 18, -+ [0][1][2][0][RTW89_MKK][1][34] = 54, -+ [0][1][2][0][RTW89_MKK][0][34] = 16, -+ [0][1][2][0][RTW89_IC][1][34] = -4, -+ [0][1][2][0][RTW89_KCC][1][34] = 12, -+ [0][1][2][0][RTW89_KCC][0][34] = 14, -+ [0][1][2][0][RTW89_ACMA][1][34] = 54, -+ [0][1][2][0][RTW89_ACMA][0][34] = 18, -+ [0][1][2][0][RTW89_CHILE][1][34] = -4, -+ [0][1][2][0][RTW89_QATAR][1][34] = 54, -+ [0][1][2][0][RTW89_QATAR][0][34] = 18, -+ [0][1][2][0][RTW89_UK][1][34] = 54, -+ [0][1][2][0][RTW89_UK][0][34] = 18, -+ [0][1][2][0][RTW89_FCC][1][36] = -4, -+ [0][1][2][0][RTW89_FCC][2][36] = 68, -+ [0][1][2][0][RTW89_ETSI][1][36] = 54, -+ [0][1][2][0][RTW89_ETSI][0][36] = 18, -+ [0][1][2][0][RTW89_MKK][1][36] = 54, -+ [0][1][2][0][RTW89_MKK][0][36] = 16, -+ [0][1][2][0][RTW89_IC][1][36] = -4, -+ [0][1][2][0][RTW89_KCC][1][36] = 12, -+ [0][1][2][0][RTW89_KCC][0][36] = 14, -+ [0][1][2][0][RTW89_ACMA][1][36] = 54, -+ [0][1][2][0][RTW89_ACMA][0][36] = 18, -+ [0][1][2][0][RTW89_CHILE][1][36] = -4, -+ [0][1][2][0][RTW89_QATAR][1][36] = 54, -+ [0][1][2][0][RTW89_QATAR][0][36] = 18, -+ [0][1][2][0][RTW89_UK][1][36] = 54, -+ [0][1][2][0][RTW89_UK][0][36] = 18, -+ [0][1][2][0][RTW89_FCC][1][38] = -4, -+ [0][1][2][0][RTW89_FCC][2][38] = 68, -+ [0][1][2][0][RTW89_ETSI][1][38] = 54, -+ [0][1][2][0][RTW89_ETSI][0][38] = 18, -+ [0][1][2][0][RTW89_MKK][1][38] = 54, -+ [0][1][2][0][RTW89_MKK][0][38] = 16, -+ [0][1][2][0][RTW89_IC][1][38] = -4, -+ [0][1][2][0][RTW89_KCC][1][38] = 12, -+ [0][1][2][0][RTW89_KCC][0][38] = 14, -+ [0][1][2][0][RTW89_ACMA][1][38] = 54, -+ [0][1][2][0][RTW89_ACMA][0][38] = 18, -+ [0][1][2][0][RTW89_CHILE][1][38] = -4, -+ [0][1][2][0][RTW89_QATAR][1][38] = 54, -+ [0][1][2][0][RTW89_QATAR][0][38] = 18, -+ [0][1][2][0][RTW89_UK][1][38] = 54, -+ [0][1][2][0][RTW89_UK][0][38] = 18, -+ [0][1][2][0][RTW89_FCC][1][40] = -4, -+ [0][1][2][0][RTW89_FCC][2][40] = 68, -+ [0][1][2][0][RTW89_ETSI][1][40] = 54, -+ [0][1][2][0][RTW89_ETSI][0][40] = 18, -+ [0][1][2][0][RTW89_MKK][1][40] = 54, -+ [0][1][2][0][RTW89_MKK][0][40] = 16, -+ [0][1][2][0][RTW89_IC][1][40] = -4, -+ [0][1][2][0][RTW89_KCC][1][40] = 12, -+ [0][1][2][0][RTW89_KCC][0][40] = 14, -+ [0][1][2][0][RTW89_ACMA][1][40] = 54, -+ [0][1][2][0][RTW89_ACMA][0][40] = 18, -+ [0][1][2][0][RTW89_CHILE][1][40] = -4, -+ [0][1][2][0][RTW89_QATAR][1][40] = 54, -+ [0][1][2][0][RTW89_QATAR][0][40] = 18, -+ [0][1][2][0][RTW89_UK][1][40] = 54, -+ [0][1][2][0][RTW89_UK][0][40] = 18, -+ [0][1][2][0][RTW89_FCC][1][42] = -4, -+ [0][1][2][0][RTW89_FCC][2][42] = 68, -+ [0][1][2][0][RTW89_ETSI][1][42] = 54, -+ [0][1][2][0][RTW89_ETSI][0][42] = 18, -+ [0][1][2][0][RTW89_MKK][1][42] = 54, -+ [0][1][2][0][RTW89_MKK][0][42] = 16, -+ [0][1][2][0][RTW89_IC][1][42] = -4, -+ [0][1][2][0][RTW89_KCC][1][42] = 12, -+ [0][1][2][0][RTW89_KCC][0][42] = 14, -+ [0][1][2][0][RTW89_ACMA][1][42] = 54, -+ [0][1][2][0][RTW89_ACMA][0][42] = 18, -+ [0][1][2][0][RTW89_CHILE][1][42] = -4, -+ [0][1][2][0][RTW89_QATAR][1][42] = 54, -+ [0][1][2][0][RTW89_QATAR][0][42] = 18, -+ [0][1][2][0][RTW89_UK][1][42] = 54, -+ [0][1][2][0][RTW89_UK][0][42] = 18, -+ [0][1][2][0][RTW89_FCC][1][44] = -2, -+ [0][1][2][0][RTW89_FCC][2][44] = 68, -+ [0][1][2][0][RTW89_ETSI][1][44] = 54, -+ [0][1][2][0][RTW89_ETSI][0][44] = 18, -+ [0][1][2][0][RTW89_MKK][1][44] = 34, -+ [0][1][2][0][RTW89_MKK][0][44] = 16, -+ [0][1][2][0][RTW89_IC][1][44] = -2, -+ [0][1][2][0][RTW89_KCC][1][44] = 12, -+ [0][1][2][0][RTW89_KCC][0][44] = 12, -+ [0][1][2][0][RTW89_ACMA][1][44] = 54, -+ [0][1][2][0][RTW89_ACMA][0][44] = 18, -+ [0][1][2][0][RTW89_CHILE][1][44] = -2, -+ [0][1][2][0][RTW89_QATAR][1][44] = 54, -+ [0][1][2][0][RTW89_QATAR][0][44] = 18, -+ [0][1][2][0][RTW89_UK][1][44] = 54, -+ [0][1][2][0][RTW89_UK][0][44] = 18, -+ [0][1][2][0][RTW89_FCC][1][45] = -2, -+ [0][1][2][0][RTW89_FCC][2][45] = 127, -+ [0][1][2][0][RTW89_ETSI][1][45] = 127, -+ [0][1][2][0][RTW89_ETSI][0][45] = 127, -+ [0][1][2][0][RTW89_MKK][1][45] = 127, -+ [0][1][2][0][RTW89_MKK][0][45] = 127, -+ [0][1][2][0][RTW89_IC][1][45] = -2, -+ [0][1][2][0][RTW89_KCC][1][45] = 12, -+ [0][1][2][0][RTW89_KCC][0][45] = 127, -+ [0][1][2][0][RTW89_ACMA][1][45] = 127, -+ [0][1][2][0][RTW89_ACMA][0][45] = 127, -+ [0][1][2][0][RTW89_CHILE][1][45] = -2, -+ [0][1][2][0][RTW89_QATAR][1][45] = 127, -+ [0][1][2][0][RTW89_QATAR][0][45] = 127, -+ [0][1][2][0][RTW89_UK][1][45] = 127, -+ [0][1][2][0][RTW89_UK][0][45] = 127, -+ [0][1][2][0][RTW89_FCC][1][47] = -2, -+ [0][1][2][0][RTW89_FCC][2][47] = 127, -+ [0][1][2][0][RTW89_ETSI][1][47] = 127, -+ [0][1][2][0][RTW89_ETSI][0][47] = 127, -+ [0][1][2][0][RTW89_MKK][1][47] = 127, -+ [0][1][2][0][RTW89_MKK][0][47] = 127, -+ [0][1][2][0][RTW89_IC][1][47] = -2, -+ [0][1][2][0][RTW89_KCC][1][47] = 12, -+ [0][1][2][0][RTW89_KCC][0][47] = 127, -+ [0][1][2][0][RTW89_ACMA][1][47] = 127, -+ [0][1][2][0][RTW89_ACMA][0][47] = 127, -+ [0][1][2][0][RTW89_CHILE][1][47] = -2, -+ [0][1][2][0][RTW89_QATAR][1][47] = 127, -+ [0][1][2][0][RTW89_QATAR][0][47] = 127, -+ [0][1][2][0][RTW89_UK][1][47] = 127, -+ [0][1][2][0][RTW89_UK][0][47] = 127, -+ [0][1][2][0][RTW89_FCC][1][49] = -2, -+ [0][1][2][0][RTW89_FCC][2][49] = 127, -+ [0][1][2][0][RTW89_ETSI][1][49] = 127, -+ [0][1][2][0][RTW89_ETSI][0][49] = 127, -+ [0][1][2][0][RTW89_MKK][1][49] = 127, -+ [0][1][2][0][RTW89_MKK][0][49] = 127, -+ [0][1][2][0][RTW89_IC][1][49] = -2, -+ [0][1][2][0][RTW89_KCC][1][49] = 12, -+ [0][1][2][0][RTW89_KCC][0][49] = 127, -+ [0][1][2][0][RTW89_ACMA][1][49] = 127, -+ [0][1][2][0][RTW89_ACMA][0][49] = 127, -+ [0][1][2][0][RTW89_CHILE][1][49] = -2, -+ [0][1][2][0][RTW89_QATAR][1][49] = 127, -+ [0][1][2][0][RTW89_QATAR][0][49] = 127, -+ [0][1][2][0][RTW89_UK][1][49] = 127, -+ [0][1][2][0][RTW89_UK][0][49] = 127, -+ [0][1][2][0][RTW89_FCC][1][51] = -2, -+ [0][1][2][0][RTW89_FCC][2][51] = 127, -+ [0][1][2][0][RTW89_ETSI][1][51] = 127, -+ [0][1][2][0][RTW89_ETSI][0][51] = 127, -+ [0][1][2][0][RTW89_MKK][1][51] = 127, -+ [0][1][2][0][RTW89_MKK][0][51] = 127, -+ [0][1][2][0][RTW89_IC][1][51] = -2, -+ [0][1][2][0][RTW89_KCC][1][51] = 12, -+ [0][1][2][0][RTW89_KCC][0][51] = 127, -+ [0][1][2][0][RTW89_ACMA][1][51] = 127, -+ [0][1][2][0][RTW89_ACMA][0][51] = 127, -+ [0][1][2][0][RTW89_CHILE][1][51] = -2, -+ [0][1][2][0][RTW89_QATAR][1][51] = 127, -+ [0][1][2][0][RTW89_QATAR][0][51] = 127, -+ [0][1][2][0][RTW89_UK][1][51] = 127, -+ [0][1][2][0][RTW89_UK][0][51] = 127, -+ [0][1][2][0][RTW89_FCC][1][53] = -2, -+ [0][1][2][0][RTW89_FCC][2][53] = 127, -+ [0][1][2][0][RTW89_ETSI][1][53] = 127, -+ [0][1][2][0][RTW89_ETSI][0][53] = 127, -+ [0][1][2][0][RTW89_MKK][1][53] = 127, -+ [0][1][2][0][RTW89_MKK][0][53] = 127, -+ [0][1][2][0][RTW89_IC][1][53] = -2, -+ [0][1][2][0][RTW89_KCC][1][53] = 12, -+ [0][1][2][0][RTW89_KCC][0][53] = 127, -+ [0][1][2][0][RTW89_ACMA][1][53] = 127, -+ [0][1][2][0][RTW89_ACMA][0][53] = 127, -+ [0][1][2][0][RTW89_CHILE][1][53] = -2, -+ [0][1][2][0][RTW89_QATAR][1][53] = 127, -+ [0][1][2][0][RTW89_QATAR][0][53] = 127, -+ [0][1][2][0][RTW89_UK][1][53] = 127, -+ [0][1][2][0][RTW89_UK][0][53] = 127, -+ [0][1][2][0][RTW89_FCC][1][55] = -2, -+ [0][1][2][0][RTW89_FCC][2][55] = 68, -+ [0][1][2][0][RTW89_ETSI][1][55] = 127, -+ [0][1][2][0][RTW89_ETSI][0][55] = 127, -+ [0][1][2][0][RTW89_MKK][1][55] = 127, -+ [0][1][2][0][RTW89_MKK][0][55] = 127, -+ [0][1][2][0][RTW89_IC][1][55] = -2, -+ [0][1][2][0][RTW89_KCC][1][55] = 12, -+ [0][1][2][0][RTW89_KCC][0][55] = 127, -+ [0][1][2][0][RTW89_ACMA][1][55] = 127, -+ [0][1][2][0][RTW89_ACMA][0][55] = 127, -+ [0][1][2][0][RTW89_CHILE][1][55] = -2, -+ [0][1][2][0][RTW89_QATAR][1][55] = 127, -+ [0][1][2][0][RTW89_QATAR][0][55] = 127, -+ [0][1][2][0][RTW89_UK][1][55] = 127, -+ [0][1][2][0][RTW89_UK][0][55] = 127, -+ [0][1][2][0][RTW89_FCC][1][57] = -2, -+ [0][1][2][0][RTW89_FCC][2][57] = 68, -+ [0][1][2][0][RTW89_ETSI][1][57] = 127, -+ [0][1][2][0][RTW89_ETSI][0][57] = 127, -+ [0][1][2][0][RTW89_MKK][1][57] = 127, -+ [0][1][2][0][RTW89_MKK][0][57] = 127, -+ [0][1][2][0][RTW89_IC][1][57] = -2, -+ [0][1][2][0][RTW89_KCC][1][57] = 12, -+ [0][1][2][0][RTW89_KCC][0][57] = 127, -+ [0][1][2][0][RTW89_ACMA][1][57] = 127, -+ [0][1][2][0][RTW89_ACMA][0][57] = 127, -+ [0][1][2][0][RTW89_CHILE][1][57] = -2, -+ [0][1][2][0][RTW89_QATAR][1][57] = 127, -+ [0][1][2][0][RTW89_QATAR][0][57] = 127, -+ [0][1][2][0][RTW89_UK][1][57] = 127, -+ [0][1][2][0][RTW89_UK][0][57] = 127, -+ [0][1][2][0][RTW89_FCC][1][59] = -2, -+ [0][1][2][0][RTW89_FCC][2][59] = 68, -+ [0][1][2][0][RTW89_ETSI][1][59] = 127, -+ [0][1][2][0][RTW89_ETSI][0][59] = 127, -+ [0][1][2][0][RTW89_MKK][1][59] = 127, -+ [0][1][2][0][RTW89_MKK][0][59] = 127, -+ [0][1][2][0][RTW89_IC][1][59] = -2, -+ [0][1][2][0][RTW89_KCC][1][59] = 12, -+ [0][1][2][0][RTW89_KCC][0][59] = 127, -+ [0][1][2][0][RTW89_ACMA][1][59] = 127, -+ [0][1][2][0][RTW89_ACMA][0][59] = 127, -+ [0][1][2][0][RTW89_CHILE][1][59] = -2, -+ [0][1][2][0][RTW89_QATAR][1][59] = 127, -+ [0][1][2][0][RTW89_QATAR][0][59] = 127, -+ [0][1][2][0][RTW89_UK][1][59] = 127, -+ [0][1][2][0][RTW89_UK][0][59] = 127, -+ [0][1][2][0][RTW89_FCC][1][60] = -2, -+ [0][1][2][0][RTW89_FCC][2][60] = 68, -+ [0][1][2][0][RTW89_ETSI][1][60] = 127, -+ [0][1][2][0][RTW89_ETSI][0][60] = 127, -+ [0][1][2][0][RTW89_MKK][1][60] = 127, -+ [0][1][2][0][RTW89_MKK][0][60] = 127, -+ [0][1][2][0][RTW89_IC][1][60] = -2, -+ [0][1][2][0][RTW89_KCC][1][60] = 12, -+ [0][1][2][0][RTW89_KCC][0][60] = 127, -+ [0][1][2][0][RTW89_ACMA][1][60] = 127, -+ [0][1][2][0][RTW89_ACMA][0][60] = 127, -+ [0][1][2][0][RTW89_CHILE][1][60] = -2, -+ [0][1][2][0][RTW89_QATAR][1][60] = 127, -+ [0][1][2][0][RTW89_QATAR][0][60] = 127, -+ [0][1][2][0][RTW89_UK][1][60] = 127, -+ [0][1][2][0][RTW89_UK][0][60] = 127, -+ [0][1][2][0][RTW89_FCC][1][62] = -2, -+ [0][1][2][0][RTW89_FCC][2][62] = 68, -+ [0][1][2][0][RTW89_ETSI][1][62] = 127, -+ [0][1][2][0][RTW89_ETSI][0][62] = 127, -+ [0][1][2][0][RTW89_MKK][1][62] = 127, -+ [0][1][2][0][RTW89_MKK][0][62] = 127, -+ [0][1][2][0][RTW89_IC][1][62] = -2, -+ [0][1][2][0][RTW89_KCC][1][62] = 12, -+ [0][1][2][0][RTW89_KCC][0][62] = 127, -+ [0][1][2][0][RTW89_ACMA][1][62] = 127, -+ [0][1][2][0][RTW89_ACMA][0][62] = 127, -+ [0][1][2][0][RTW89_CHILE][1][62] = -2, -+ [0][1][2][0][RTW89_QATAR][1][62] = 127, -+ [0][1][2][0][RTW89_QATAR][0][62] = 127, -+ [0][1][2][0][RTW89_UK][1][62] = 127, -+ [0][1][2][0][RTW89_UK][0][62] = 127, -+ [0][1][2][0][RTW89_FCC][1][64] = -2, -+ [0][1][2][0][RTW89_FCC][2][64] = 68, -+ [0][1][2][0][RTW89_ETSI][1][64] = 127, -+ [0][1][2][0][RTW89_ETSI][0][64] = 127, -+ [0][1][2][0][RTW89_MKK][1][64] = 127, -+ [0][1][2][0][RTW89_MKK][0][64] = 127, -+ [0][1][2][0][RTW89_IC][1][64] = -2, -+ [0][1][2][0][RTW89_KCC][1][64] = 12, -+ [0][1][2][0][RTW89_KCC][0][64] = 127, -+ [0][1][2][0][RTW89_ACMA][1][64] = 127, -+ [0][1][2][0][RTW89_ACMA][0][64] = 127, -+ [0][1][2][0][RTW89_CHILE][1][64] = -2, -+ [0][1][2][0][RTW89_QATAR][1][64] = 127, -+ [0][1][2][0][RTW89_QATAR][0][64] = 127, -+ [0][1][2][0][RTW89_UK][1][64] = 127, -+ [0][1][2][0][RTW89_UK][0][64] = 127, -+ [0][1][2][0][RTW89_FCC][1][66] = -2, -+ [0][1][2][0][RTW89_FCC][2][66] = 68, -+ [0][1][2][0][RTW89_ETSI][1][66] = 127, -+ [0][1][2][0][RTW89_ETSI][0][66] = 127, -+ [0][1][2][0][RTW89_MKK][1][66] = 127, -+ [0][1][2][0][RTW89_MKK][0][66] = 127, -+ [0][1][2][0][RTW89_IC][1][66] = -2, -+ [0][1][2][0][RTW89_KCC][1][66] = 12, -+ [0][1][2][0][RTW89_KCC][0][66] = 127, -+ [0][1][2][0][RTW89_ACMA][1][66] = 127, -+ [0][1][2][0][RTW89_ACMA][0][66] = 127, -+ [0][1][2][0][RTW89_CHILE][1][66] = -2, -+ [0][1][2][0][RTW89_QATAR][1][66] = 127, -+ [0][1][2][0][RTW89_QATAR][0][66] = 127, -+ [0][1][2][0][RTW89_UK][1][66] = 127, -+ [0][1][2][0][RTW89_UK][0][66] = 127, -+ [0][1][2][0][RTW89_FCC][1][68] = -2, -+ [0][1][2][0][RTW89_FCC][2][68] = 68, -+ [0][1][2][0][RTW89_ETSI][1][68] = 127, -+ [0][1][2][0][RTW89_ETSI][0][68] = 127, -+ [0][1][2][0][RTW89_MKK][1][68] = 127, -+ [0][1][2][0][RTW89_MKK][0][68] = 127, -+ [0][1][2][0][RTW89_IC][1][68] = -2, -+ [0][1][2][0][RTW89_KCC][1][68] = 12, -+ [0][1][2][0][RTW89_KCC][0][68] = 127, -+ [0][1][2][0][RTW89_ACMA][1][68] = 127, -+ [0][1][2][0][RTW89_ACMA][0][68] = 127, -+ [0][1][2][0][RTW89_CHILE][1][68] = -2, -+ [0][1][2][0][RTW89_QATAR][1][68] = 127, -+ [0][1][2][0][RTW89_QATAR][0][68] = 127, -+ [0][1][2][0][RTW89_UK][1][68] = 127, -+ [0][1][2][0][RTW89_UK][0][68] = 127, -+ [0][1][2][0][RTW89_FCC][1][70] = -2, -+ [0][1][2][0][RTW89_FCC][2][70] = 68, -+ [0][1][2][0][RTW89_ETSI][1][70] = 127, -+ [0][1][2][0][RTW89_ETSI][0][70] = 127, -+ [0][1][2][0][RTW89_MKK][1][70] = 127, -+ [0][1][2][0][RTW89_MKK][0][70] = 127, -+ [0][1][2][0][RTW89_IC][1][70] = -2, -+ [0][1][2][0][RTW89_KCC][1][70] = 12, -+ [0][1][2][0][RTW89_KCC][0][70] = 127, -+ [0][1][2][0][RTW89_ACMA][1][70] = 127, -+ [0][1][2][0][RTW89_ACMA][0][70] = 127, -+ [0][1][2][0][RTW89_CHILE][1][70] = -2, -+ [0][1][2][0][RTW89_QATAR][1][70] = 127, -+ [0][1][2][0][RTW89_QATAR][0][70] = 127, -+ [0][1][2][0][RTW89_UK][1][70] = 127, -+ [0][1][2][0][RTW89_UK][0][70] = 127, -+ [0][1][2][0][RTW89_FCC][1][72] = -2, -+ [0][1][2][0][RTW89_FCC][2][72] = 68, -+ [0][1][2][0][RTW89_ETSI][1][72] = 127, -+ [0][1][2][0][RTW89_ETSI][0][72] = 127, -+ [0][1][2][0][RTW89_MKK][1][72] = 127, -+ [0][1][2][0][RTW89_MKK][0][72] = 127, -+ [0][1][2][0][RTW89_IC][1][72] = -2, -+ [0][1][2][0][RTW89_KCC][1][72] = 12, -+ [0][1][2][0][RTW89_KCC][0][72] = 127, -+ [0][1][2][0][RTW89_ACMA][1][72] = 127, -+ [0][1][2][0][RTW89_ACMA][0][72] = 127, -+ [0][1][2][0][RTW89_CHILE][1][72] = -2, -+ [0][1][2][0][RTW89_QATAR][1][72] = 127, -+ [0][1][2][0][RTW89_QATAR][0][72] = 127, -+ [0][1][2][0][RTW89_UK][1][72] = 127, -+ [0][1][2][0][RTW89_UK][0][72] = 127, -+ [0][1][2][0][RTW89_FCC][1][74] = -2, -+ [0][1][2][0][RTW89_FCC][2][74] = 68, -+ [0][1][2][0][RTW89_ETSI][1][74] = 127, -+ [0][1][2][0][RTW89_ETSI][0][74] = 127, -+ [0][1][2][0][RTW89_MKK][1][74] = 127, -+ [0][1][2][0][RTW89_MKK][0][74] = 127, -+ [0][1][2][0][RTW89_IC][1][74] = -2, -+ [0][1][2][0][RTW89_KCC][1][74] = 12, -+ [0][1][2][0][RTW89_KCC][0][74] = 127, -+ [0][1][2][0][RTW89_ACMA][1][74] = 127, -+ [0][1][2][0][RTW89_ACMA][0][74] = 127, -+ [0][1][2][0][RTW89_CHILE][1][74] = -2, -+ [0][1][2][0][RTW89_QATAR][1][74] = 127, -+ [0][1][2][0][RTW89_QATAR][0][74] = 127, -+ [0][1][2][0][RTW89_UK][1][74] = 127, -+ [0][1][2][0][RTW89_UK][0][74] = 127, -+ [0][1][2][0][RTW89_FCC][1][75] = -2, -+ [0][1][2][0][RTW89_FCC][2][75] = 68, -+ [0][1][2][0][RTW89_ETSI][1][75] = 127, -+ [0][1][2][0][RTW89_ETSI][0][75] = 127, -+ [0][1][2][0][RTW89_MKK][1][75] = 127, -+ [0][1][2][0][RTW89_MKK][0][75] = 127, -+ [0][1][2][0][RTW89_IC][1][75] = -2, -+ [0][1][2][0][RTW89_KCC][1][75] = 12, -+ [0][1][2][0][RTW89_KCC][0][75] = 127, -+ [0][1][2][0][RTW89_ACMA][1][75] = 127, -+ [0][1][2][0][RTW89_ACMA][0][75] = 127, -+ [0][1][2][0][RTW89_CHILE][1][75] = -2, -+ [0][1][2][0][RTW89_QATAR][1][75] = 127, -+ [0][1][2][0][RTW89_QATAR][0][75] = 127, -+ [0][1][2][0][RTW89_UK][1][75] = 127, -+ [0][1][2][0][RTW89_UK][0][75] = 127, -+ [0][1][2][0][RTW89_FCC][1][77] = -2, -+ [0][1][2][0][RTW89_FCC][2][77] = 68, -+ [0][1][2][0][RTW89_ETSI][1][77] = 127, -+ [0][1][2][0][RTW89_ETSI][0][77] = 127, -+ [0][1][2][0][RTW89_MKK][1][77] = 127, -+ [0][1][2][0][RTW89_MKK][0][77] = 127, -+ [0][1][2][0][RTW89_IC][1][77] = -2, -+ [0][1][2][0][RTW89_KCC][1][77] = 12, -+ [0][1][2][0][RTW89_KCC][0][77] = 127, -+ [0][1][2][0][RTW89_ACMA][1][77] = 127, -+ [0][1][2][0][RTW89_ACMA][0][77] = 127, -+ [0][1][2][0][RTW89_CHILE][1][77] = -2, -+ [0][1][2][0][RTW89_QATAR][1][77] = 127, -+ [0][1][2][0][RTW89_QATAR][0][77] = 127, -+ [0][1][2][0][RTW89_UK][1][77] = 127, -+ [0][1][2][0][RTW89_UK][0][77] = 127, -+ [0][1][2][0][RTW89_FCC][1][79] = -2, -+ [0][1][2][0][RTW89_FCC][2][79] = 68, -+ [0][1][2][0][RTW89_ETSI][1][79] = 127, -+ [0][1][2][0][RTW89_ETSI][0][79] = 127, -+ [0][1][2][0][RTW89_MKK][1][79] = 127, -+ [0][1][2][0][RTW89_MKK][0][79] = 127, -+ [0][1][2][0][RTW89_IC][1][79] = -2, -+ [0][1][2][0][RTW89_KCC][1][79] = 12, -+ [0][1][2][0][RTW89_KCC][0][79] = 127, -+ [0][1][2][0][RTW89_ACMA][1][79] = 127, -+ [0][1][2][0][RTW89_ACMA][0][79] = 127, -+ [0][1][2][0][RTW89_CHILE][1][79] = -2, -+ [0][1][2][0][RTW89_QATAR][1][79] = 127, -+ [0][1][2][0][RTW89_QATAR][0][79] = 127, -+ [0][1][2][0][RTW89_UK][1][79] = 127, -+ [0][1][2][0][RTW89_UK][0][79] = 127, -+ [0][1][2][0][RTW89_FCC][1][81] = -2, -+ [0][1][2][0][RTW89_FCC][2][81] = 68, -+ [0][1][2][0][RTW89_ETSI][1][81] = 127, -+ [0][1][2][0][RTW89_ETSI][0][81] = 127, -+ [0][1][2][0][RTW89_MKK][1][81] = 127, -+ [0][1][2][0][RTW89_MKK][0][81] = 127, -+ [0][1][2][0][RTW89_IC][1][81] = -2, -+ [0][1][2][0][RTW89_KCC][1][81] = 12, -+ [0][1][2][0][RTW89_KCC][0][81] = 127, -+ [0][1][2][0][RTW89_ACMA][1][81] = 127, -+ [0][1][2][0][RTW89_ACMA][0][81] = 127, -+ [0][1][2][0][RTW89_CHILE][1][81] = -2, -+ [0][1][2][0][RTW89_QATAR][1][81] = 127, -+ [0][1][2][0][RTW89_QATAR][0][81] = 127, -+ [0][1][2][0][RTW89_UK][1][81] = 127, -+ [0][1][2][0][RTW89_UK][0][81] = 127, -+ [0][1][2][0][RTW89_FCC][1][83] = -2, -+ [0][1][2][0][RTW89_FCC][2][83] = 68, -+ [0][1][2][0][RTW89_ETSI][1][83] = 127, -+ [0][1][2][0][RTW89_ETSI][0][83] = 127, -+ [0][1][2][0][RTW89_MKK][1][83] = 127, -+ [0][1][2][0][RTW89_MKK][0][83] = 127, -+ [0][1][2][0][RTW89_IC][1][83] = -2, -+ [0][1][2][0][RTW89_KCC][1][83] = 20, -+ [0][1][2][0][RTW89_KCC][0][83] = 127, -+ [0][1][2][0][RTW89_ACMA][1][83] = 127, -+ [0][1][2][0][RTW89_ACMA][0][83] = 127, -+ [0][1][2][0][RTW89_CHILE][1][83] = -2, -+ [0][1][2][0][RTW89_QATAR][1][83] = 127, -+ [0][1][2][0][RTW89_QATAR][0][83] = 127, -+ [0][1][2][0][RTW89_UK][1][83] = 127, -+ [0][1][2][0][RTW89_UK][0][83] = 127, -+ [0][1][2][0][RTW89_FCC][1][85] = -2, -+ [0][1][2][0][RTW89_FCC][2][85] = 68, -+ [0][1][2][0][RTW89_ETSI][1][85] = 127, -+ [0][1][2][0][RTW89_ETSI][0][85] = 127, -+ [0][1][2][0][RTW89_MKK][1][85] = 127, -+ [0][1][2][0][RTW89_MKK][0][85] = 127, -+ [0][1][2][0][RTW89_IC][1][85] = -2, -+ [0][1][2][0][RTW89_KCC][1][85] = 20, -+ [0][1][2][0][RTW89_KCC][0][85] = 127, -+ [0][1][2][0][RTW89_ACMA][1][85] = 127, -+ [0][1][2][0][RTW89_ACMA][0][85] = 127, -+ [0][1][2][0][RTW89_CHILE][1][85] = -2, -+ [0][1][2][0][RTW89_QATAR][1][85] = 127, -+ [0][1][2][0][RTW89_QATAR][0][85] = 127, -+ [0][1][2][0][RTW89_UK][1][85] = 127, -+ [0][1][2][0][RTW89_UK][0][85] = 127, -+ [0][1][2][0][RTW89_FCC][1][87] = -2, -+ [0][1][2][0][RTW89_FCC][2][87] = 127, -+ [0][1][2][0][RTW89_ETSI][1][87] = 127, -+ [0][1][2][0][RTW89_ETSI][0][87] = 127, -+ [0][1][2][0][RTW89_MKK][1][87] = 127, -+ [0][1][2][0][RTW89_MKK][0][87] = 127, -+ [0][1][2][0][RTW89_IC][1][87] = -2, -+ [0][1][2][0][RTW89_KCC][1][87] = 20, -+ [0][1][2][0][RTW89_KCC][0][87] = 127, -+ [0][1][2][0][RTW89_ACMA][1][87] = 127, -+ [0][1][2][0][RTW89_ACMA][0][87] = 127, -+ [0][1][2][0][RTW89_CHILE][1][87] = -2, -+ [0][1][2][0][RTW89_QATAR][1][87] = 127, -+ [0][1][2][0][RTW89_QATAR][0][87] = 127, -+ [0][1][2][0][RTW89_UK][1][87] = 127, -+ [0][1][2][0][RTW89_UK][0][87] = 127, -+ [0][1][2][0][RTW89_FCC][1][89] = -2, -+ [0][1][2][0][RTW89_FCC][2][89] = 127, -+ [0][1][2][0][RTW89_ETSI][1][89] = 127, -+ [0][1][2][0][RTW89_ETSI][0][89] = 127, -+ [0][1][2][0][RTW89_MKK][1][89] = 127, -+ [0][1][2][0][RTW89_MKK][0][89] = 127, -+ [0][1][2][0][RTW89_IC][1][89] = -2, -+ [0][1][2][0][RTW89_KCC][1][89] = 20, -+ [0][1][2][0][RTW89_KCC][0][89] = 127, -+ [0][1][2][0][RTW89_ACMA][1][89] = 127, -+ [0][1][2][0][RTW89_ACMA][0][89] = 127, -+ [0][1][2][0][RTW89_CHILE][1][89] = -2, -+ [0][1][2][0][RTW89_QATAR][1][89] = 127, -+ [0][1][2][0][RTW89_QATAR][0][89] = 127, -+ [0][1][2][0][RTW89_UK][1][89] = 127, -+ [0][1][2][0][RTW89_UK][0][89] = 127, -+ [0][1][2][0][RTW89_FCC][1][90] = -2, -+ [0][1][2][0][RTW89_FCC][2][90] = 127, -+ [0][1][2][0][RTW89_ETSI][1][90] = 127, -+ [0][1][2][0][RTW89_ETSI][0][90] = 127, -+ [0][1][2][0][RTW89_MKK][1][90] = 127, -+ [0][1][2][0][RTW89_MKK][0][90] = 127, -+ [0][1][2][0][RTW89_IC][1][90] = -2, -+ [0][1][2][0][RTW89_KCC][1][90] = 20, -+ [0][1][2][0][RTW89_KCC][0][90] = 127, -+ [0][1][2][0][RTW89_ACMA][1][90] = 127, -+ [0][1][2][0][RTW89_ACMA][0][90] = 127, -+ [0][1][2][0][RTW89_CHILE][1][90] = -2, -+ [0][1][2][0][RTW89_QATAR][1][90] = 127, -+ [0][1][2][0][RTW89_QATAR][0][90] = 127, -+ [0][1][2][0][RTW89_UK][1][90] = 127, -+ [0][1][2][0][RTW89_UK][0][90] = 127, -+ [0][1][2][0][RTW89_FCC][1][92] = -2, -+ [0][1][2][0][RTW89_FCC][2][92] = 127, -+ [0][1][2][0][RTW89_ETSI][1][92] = 127, -+ [0][1][2][0][RTW89_ETSI][0][92] = 127, -+ [0][1][2][0][RTW89_MKK][1][92] = 127, -+ [0][1][2][0][RTW89_MKK][0][92] = 127, -+ [0][1][2][0][RTW89_IC][1][92] = -2, -+ [0][1][2][0][RTW89_KCC][1][92] = 20, -+ [0][1][2][0][RTW89_KCC][0][92] = 127, -+ [0][1][2][0][RTW89_ACMA][1][92] = 127, -+ [0][1][2][0][RTW89_ACMA][0][92] = 127, -+ [0][1][2][0][RTW89_CHILE][1][92] = -2, -+ [0][1][2][0][RTW89_QATAR][1][92] = 127, -+ [0][1][2][0][RTW89_QATAR][0][92] = 127, -+ [0][1][2][0][RTW89_UK][1][92] = 127, -+ [0][1][2][0][RTW89_UK][0][92] = 127, -+ [0][1][2][0][RTW89_FCC][1][94] = -2, -+ [0][1][2][0][RTW89_FCC][2][94] = 127, -+ [0][1][2][0][RTW89_ETSI][1][94] = 127, -+ [0][1][2][0][RTW89_ETSI][0][94] = 127, -+ [0][1][2][0][RTW89_MKK][1][94] = 127, -+ [0][1][2][0][RTW89_MKK][0][94] = 127, -+ [0][1][2][0][RTW89_IC][1][94] = -2, -+ [0][1][2][0][RTW89_KCC][1][94] = 20, -+ [0][1][2][0][RTW89_KCC][0][94] = 127, -+ [0][1][2][0][RTW89_ACMA][1][94] = 127, -+ [0][1][2][0][RTW89_ACMA][0][94] = 127, -+ [0][1][2][0][RTW89_CHILE][1][94] = -2, -+ [0][1][2][0][RTW89_QATAR][1][94] = 127, -+ [0][1][2][0][RTW89_QATAR][0][94] = 127, -+ [0][1][2][0][RTW89_UK][1][94] = 127, -+ [0][1][2][0][RTW89_UK][0][94] = 127, -+ [0][1][2][0][RTW89_FCC][1][96] = -2, -+ [0][1][2][0][RTW89_FCC][2][96] = 127, -+ [0][1][2][0][RTW89_ETSI][1][96] = 127, -+ [0][1][2][0][RTW89_ETSI][0][96] = 127, -+ [0][1][2][0][RTW89_MKK][1][96] = 127, -+ [0][1][2][0][RTW89_MKK][0][96] = 127, -+ [0][1][2][0][RTW89_IC][1][96] = -2, -+ [0][1][2][0][RTW89_KCC][1][96] = 20, -+ [0][1][2][0][RTW89_KCC][0][96] = 127, -+ [0][1][2][0][RTW89_ACMA][1][96] = 127, -+ [0][1][2][0][RTW89_ACMA][0][96] = 127, -+ [0][1][2][0][RTW89_CHILE][1][96] = -2, -+ [0][1][2][0][RTW89_QATAR][1][96] = 127, -+ [0][1][2][0][RTW89_QATAR][0][96] = 127, -+ [0][1][2][0][RTW89_UK][1][96] = 127, -+ [0][1][2][0][RTW89_UK][0][96] = 127, -+ [0][1][2][0][RTW89_FCC][1][98] = -2, -+ [0][1][2][0][RTW89_FCC][2][98] = 127, -+ [0][1][2][0][RTW89_ETSI][1][98] = 127, -+ [0][1][2][0][RTW89_ETSI][0][98] = 127, -+ [0][1][2][0][RTW89_MKK][1][98] = 127, -+ [0][1][2][0][RTW89_MKK][0][98] = 127, -+ [0][1][2][0][RTW89_IC][1][98] = -2, -+ [0][1][2][0][RTW89_KCC][1][98] = 20, -+ [0][1][2][0][RTW89_KCC][0][98] = 127, -+ [0][1][2][0][RTW89_ACMA][1][98] = 127, -+ [0][1][2][0][RTW89_ACMA][0][98] = 127, -+ [0][1][2][0][RTW89_CHILE][1][98] = -2, -+ [0][1][2][0][RTW89_QATAR][1][98] = 127, -+ [0][1][2][0][RTW89_QATAR][0][98] = 127, -+ [0][1][2][0][RTW89_UK][1][98] = 127, -+ [0][1][2][0][RTW89_UK][0][98] = 127, -+ [0][1][2][0][RTW89_FCC][1][100] = -2, -+ [0][1][2][0][RTW89_FCC][2][100] = 127, -+ [0][1][2][0][RTW89_ETSI][1][100] = 127, -+ [0][1][2][0][RTW89_ETSI][0][100] = 127, -+ [0][1][2][0][RTW89_MKK][1][100] = 127, -+ [0][1][2][0][RTW89_MKK][0][100] = 127, -+ [0][1][2][0][RTW89_IC][1][100] = -2, -+ [0][1][2][0][RTW89_KCC][1][100] = 20, -+ [0][1][2][0][RTW89_KCC][0][100] = 127, -+ [0][1][2][0][RTW89_ACMA][1][100] = 127, -+ [0][1][2][0][RTW89_ACMA][0][100] = 127, -+ [0][1][2][0][RTW89_CHILE][1][100] = -2, -+ [0][1][2][0][RTW89_QATAR][1][100] = 127, -+ [0][1][2][0][RTW89_QATAR][0][100] = 127, -+ [0][1][2][0][RTW89_UK][1][100] = 127, -+ [0][1][2][0][RTW89_UK][0][100] = 127, -+ [0][1][2][0][RTW89_FCC][1][102] = -2, -+ [0][1][2][0][RTW89_FCC][2][102] = 127, -+ [0][1][2][0][RTW89_ETSI][1][102] = 127, -+ [0][1][2][0][RTW89_ETSI][0][102] = 127, -+ [0][1][2][0][RTW89_MKK][1][102] = 127, -+ [0][1][2][0][RTW89_MKK][0][102] = 127, -+ [0][1][2][0][RTW89_IC][1][102] = -2, -+ [0][1][2][0][RTW89_KCC][1][102] = 20, -+ [0][1][2][0][RTW89_KCC][0][102] = 127, -+ [0][1][2][0][RTW89_ACMA][1][102] = 127, -+ [0][1][2][0][RTW89_ACMA][0][102] = 127, -+ [0][1][2][0][RTW89_CHILE][1][102] = -2, -+ [0][1][2][0][RTW89_QATAR][1][102] = 127, -+ [0][1][2][0][RTW89_QATAR][0][102] = 127, -+ [0][1][2][0][RTW89_UK][1][102] = 127, -+ [0][1][2][0][RTW89_UK][0][102] = 127, -+ [0][1][2][0][RTW89_FCC][1][104] = -2, -+ [0][1][2][0][RTW89_FCC][2][104] = 127, -+ [0][1][2][0][RTW89_ETSI][1][104] = 127, -+ [0][1][2][0][RTW89_ETSI][0][104] = 127, -+ [0][1][2][0][RTW89_MKK][1][104] = 127, -+ [0][1][2][0][RTW89_MKK][0][104] = 127, -+ [0][1][2][0][RTW89_IC][1][104] = -2, -+ [0][1][2][0][RTW89_KCC][1][104] = 20, -+ [0][1][2][0][RTW89_KCC][0][104] = 127, -+ [0][1][2][0][RTW89_ACMA][1][104] = 127, -+ [0][1][2][0][RTW89_ACMA][0][104] = 127, -+ [0][1][2][0][RTW89_CHILE][1][104] = -2, -+ [0][1][2][0][RTW89_QATAR][1][104] = 127, -+ [0][1][2][0][RTW89_QATAR][0][104] = 127, -+ [0][1][2][0][RTW89_UK][1][104] = 127, -+ [0][1][2][0][RTW89_UK][0][104] = 127, -+ [0][1][2][0][RTW89_FCC][1][105] = -2, -+ [0][1][2][0][RTW89_FCC][2][105] = 127, -+ [0][1][2][0][RTW89_ETSI][1][105] = 127, -+ [0][1][2][0][RTW89_ETSI][0][105] = 127, -+ [0][1][2][0][RTW89_MKK][1][105] = 127, -+ [0][1][2][0][RTW89_MKK][0][105] = 127, -+ [0][1][2][0][RTW89_IC][1][105] = -2, -+ [0][1][2][0][RTW89_KCC][1][105] = 20, -+ [0][1][2][0][RTW89_KCC][0][105] = 127, -+ [0][1][2][0][RTW89_ACMA][1][105] = 127, -+ [0][1][2][0][RTW89_ACMA][0][105] = 127, -+ [0][1][2][0][RTW89_CHILE][1][105] = -2, -+ [0][1][2][0][RTW89_QATAR][1][105] = 127, -+ [0][1][2][0][RTW89_QATAR][0][105] = 127, -+ [0][1][2][0][RTW89_UK][1][105] = 127, -+ [0][1][2][0][RTW89_UK][0][105] = 127, -+ [0][1][2][0][RTW89_FCC][1][107] = 1, -+ [0][1][2][0][RTW89_FCC][2][107] = 127, -+ [0][1][2][0][RTW89_ETSI][1][107] = 127, -+ [0][1][2][0][RTW89_ETSI][0][107] = 127, -+ [0][1][2][0][RTW89_MKK][1][107] = 127, -+ [0][1][2][0][RTW89_MKK][0][107] = 127, -+ [0][1][2][0][RTW89_IC][1][107] = 1, -+ [0][1][2][0][RTW89_KCC][1][107] = 20, -+ [0][1][2][0][RTW89_KCC][0][107] = 127, -+ [0][1][2][0][RTW89_ACMA][1][107] = 127, -+ [0][1][2][0][RTW89_ACMA][0][107] = 127, -+ [0][1][2][0][RTW89_CHILE][1][107] = 1, -+ [0][1][2][0][RTW89_QATAR][1][107] = 127, -+ [0][1][2][0][RTW89_QATAR][0][107] = 127, -+ [0][1][2][0][RTW89_UK][1][107] = 127, -+ [0][1][2][0][RTW89_UK][0][107] = 127, -+ [0][1][2][0][RTW89_FCC][1][109] = 1, -+ [0][1][2][0][RTW89_FCC][2][109] = 127, -+ [0][1][2][0][RTW89_ETSI][1][109] = 127, -+ [0][1][2][0][RTW89_ETSI][0][109] = 127, -+ [0][1][2][0][RTW89_MKK][1][109] = 127, -+ [0][1][2][0][RTW89_MKK][0][109] = 127, -+ [0][1][2][0][RTW89_IC][1][109] = 1, -+ [0][1][2][0][RTW89_KCC][1][109] = 20, -+ [0][1][2][0][RTW89_KCC][0][109] = 127, -+ [0][1][2][0][RTW89_ACMA][1][109] = 127, -+ [0][1][2][0][RTW89_ACMA][0][109] = 127, -+ [0][1][2][0][RTW89_CHILE][1][109] = 1, -+ [0][1][2][0][RTW89_QATAR][1][109] = 127, -+ [0][1][2][0][RTW89_QATAR][0][109] = 127, -+ [0][1][2][0][RTW89_UK][1][109] = 127, -+ [0][1][2][0][RTW89_UK][0][109] = 127, -+ [0][1][2][0][RTW89_FCC][1][111] = 127, -+ [0][1][2][0][RTW89_FCC][2][111] = 127, -+ [0][1][2][0][RTW89_ETSI][1][111] = 127, -+ [0][1][2][0][RTW89_ETSI][0][111] = 127, -+ [0][1][2][0][RTW89_MKK][1][111] = 127, -+ [0][1][2][0][RTW89_MKK][0][111] = 127, -+ [0][1][2][0][RTW89_IC][1][111] = 127, -+ [0][1][2][0][RTW89_KCC][1][111] = 127, -+ [0][1][2][0][RTW89_KCC][0][111] = 127, -+ [0][1][2][0][RTW89_ACMA][1][111] = 127, -+ [0][1][2][0][RTW89_ACMA][0][111] = 127, -+ [0][1][2][0][RTW89_CHILE][1][111] = 127, -+ [0][1][2][0][RTW89_QATAR][1][111] = 127, -+ [0][1][2][0][RTW89_QATAR][0][111] = 127, -+ [0][1][2][0][RTW89_UK][1][111] = 127, -+ [0][1][2][0][RTW89_UK][0][111] = 127, -+ [0][1][2][0][RTW89_FCC][1][113] = 127, -+ [0][1][2][0][RTW89_FCC][2][113] = 127, -+ [0][1][2][0][RTW89_ETSI][1][113] = 127, -+ [0][1][2][0][RTW89_ETSI][0][113] = 127, -+ [0][1][2][0][RTW89_MKK][1][113] = 127, -+ [0][1][2][0][RTW89_MKK][0][113] = 127, -+ [0][1][2][0][RTW89_IC][1][113] = 127, -+ [0][1][2][0][RTW89_KCC][1][113] = 127, -+ [0][1][2][0][RTW89_KCC][0][113] = 127, -+ [0][1][2][0][RTW89_ACMA][1][113] = 127, -+ [0][1][2][0][RTW89_ACMA][0][113] = 127, -+ [0][1][2][0][RTW89_CHILE][1][113] = 127, -+ [0][1][2][0][RTW89_QATAR][1][113] = 127, -+ [0][1][2][0][RTW89_QATAR][0][113] = 127, -+ [0][1][2][0][RTW89_UK][1][113] = 127, -+ [0][1][2][0][RTW89_UK][0][113] = 127, -+ [0][1][2][0][RTW89_FCC][1][115] = 127, -+ [0][1][2][0][RTW89_FCC][2][115] = 127, -+ [0][1][2][0][RTW89_ETSI][1][115] = 127, -+ [0][1][2][0][RTW89_ETSI][0][115] = 127, -+ [0][1][2][0][RTW89_MKK][1][115] = 127, -+ [0][1][2][0][RTW89_MKK][0][115] = 127, -+ [0][1][2][0][RTW89_IC][1][115] = 127, -+ [0][1][2][0][RTW89_KCC][1][115] = 127, -+ [0][1][2][0][RTW89_KCC][0][115] = 127, -+ [0][1][2][0][RTW89_ACMA][1][115] = 127, -+ [0][1][2][0][RTW89_ACMA][0][115] = 127, -+ [0][1][2][0][RTW89_CHILE][1][115] = 127, -+ [0][1][2][0][RTW89_QATAR][1][115] = 127, -+ [0][1][2][0][RTW89_QATAR][0][115] = 127, -+ [0][1][2][0][RTW89_UK][1][115] = 127, -+ [0][1][2][0][RTW89_UK][0][115] = 127, -+ [0][1][2][0][RTW89_FCC][1][117] = 127, -+ [0][1][2][0][RTW89_FCC][2][117] = 127, -+ [0][1][2][0][RTW89_ETSI][1][117] = 127, -+ [0][1][2][0][RTW89_ETSI][0][117] = 127, -+ [0][1][2][0][RTW89_MKK][1][117] = 127, -+ [0][1][2][0][RTW89_MKK][0][117] = 127, -+ [0][1][2][0][RTW89_IC][1][117] = 127, -+ [0][1][2][0][RTW89_KCC][1][117] = 127, -+ [0][1][2][0][RTW89_KCC][0][117] = 127, -+ [0][1][2][0][RTW89_ACMA][1][117] = 127, -+ [0][1][2][0][RTW89_ACMA][0][117] = 127, -+ [0][1][2][0][RTW89_CHILE][1][117] = 127, -+ [0][1][2][0][RTW89_QATAR][1][117] = 127, -+ [0][1][2][0][RTW89_QATAR][0][117] = 127, -+ [0][1][2][0][RTW89_UK][1][117] = 127, -+ [0][1][2][0][RTW89_UK][0][117] = 127, -+ [0][1][2][0][RTW89_FCC][1][119] = 127, -+ [0][1][2][0][RTW89_FCC][2][119] = 127, -+ [0][1][2][0][RTW89_ETSI][1][119] = 127, -+ [0][1][2][0][RTW89_ETSI][0][119] = 127, -+ [0][1][2][0][RTW89_MKK][1][119] = 127, -+ [0][1][2][0][RTW89_MKK][0][119] = 127, -+ [0][1][2][0][RTW89_IC][1][119] = 127, -+ [0][1][2][0][RTW89_KCC][1][119] = 127, -+ [0][1][2][0][RTW89_KCC][0][119] = 127, -+ [0][1][2][0][RTW89_ACMA][1][119] = 127, -+ [0][1][2][0][RTW89_ACMA][0][119] = 127, -+ [0][1][2][0][RTW89_CHILE][1][119] = 127, -+ [0][1][2][0][RTW89_QATAR][1][119] = 127, -+ [0][1][2][0][RTW89_QATAR][0][119] = 127, -+ [0][1][2][0][RTW89_UK][1][119] = 127, -+ [0][1][2][0][RTW89_UK][0][119] = 127, -+ [0][1][2][1][RTW89_FCC][1][0] = -2, -+ [0][1][2][1][RTW89_FCC][2][0] = 54, -+ [0][1][2][1][RTW89_ETSI][1][0] = 42, -+ [0][1][2][1][RTW89_ETSI][0][0] = 6, -+ [0][1][2][1][RTW89_MKK][1][0] = 56, -+ [0][1][2][1][RTW89_MKK][0][0] = 16, -+ [0][1][2][1][RTW89_IC][1][0] = -2, -+ [0][1][2][1][RTW89_KCC][1][0] = 12, -+ [0][1][2][1][RTW89_KCC][0][0] = 10, -+ [0][1][2][1][RTW89_ACMA][1][0] = 42, -+ [0][1][2][1][RTW89_ACMA][0][0] = 6, -+ [0][1][2][1][RTW89_CHILE][1][0] = -2, -+ [0][1][2][1][RTW89_QATAR][1][0] = 42, -+ [0][1][2][1][RTW89_QATAR][0][0] = 6, -+ [0][1][2][1][RTW89_UK][1][0] = 42, -+ [0][1][2][1][RTW89_UK][0][0] = 6, -+ [0][1][2][1][RTW89_FCC][1][2] = -4, -+ [0][1][2][1][RTW89_FCC][2][2] = 54, -+ [0][1][2][1][RTW89_ETSI][1][2] = 42, -+ [0][1][2][1][RTW89_ETSI][0][2] = 6, -+ [0][1][2][1][RTW89_MKK][1][2] = 54, -+ [0][1][2][1][RTW89_MKK][0][2] = 16, -+ [0][1][2][1][RTW89_IC][1][2] = -4, -+ [0][1][2][1][RTW89_KCC][1][2] = 12, -+ [0][1][2][1][RTW89_KCC][0][2] = 12, -+ [0][1][2][1][RTW89_ACMA][1][2] = 42, -+ [0][1][2][1][RTW89_ACMA][0][2] = 6, -+ [0][1][2][1][RTW89_CHILE][1][2] = -4, -+ [0][1][2][1][RTW89_QATAR][1][2] = 42, -+ [0][1][2][1][RTW89_QATAR][0][2] = 6, -+ [0][1][2][1][RTW89_UK][1][2] = 42, -+ [0][1][2][1][RTW89_UK][0][2] = 6, -+ [0][1][2][1][RTW89_FCC][1][4] = -4, -+ [0][1][2][1][RTW89_FCC][2][4] = 54, -+ [0][1][2][1][RTW89_ETSI][1][4] = 42, -+ [0][1][2][1][RTW89_ETSI][0][4] = 6, -+ [0][1][2][1][RTW89_MKK][1][4] = 54, -+ [0][1][2][1][RTW89_MKK][0][4] = 16, -+ [0][1][2][1][RTW89_IC][1][4] = -4, -+ [0][1][2][1][RTW89_KCC][1][4] = 12, -+ [0][1][2][1][RTW89_KCC][0][4] = 12, -+ [0][1][2][1][RTW89_ACMA][1][4] = 42, -+ [0][1][2][1][RTW89_ACMA][0][4] = 6, -+ [0][1][2][1][RTW89_CHILE][1][4] = -4, -+ [0][1][2][1][RTW89_QATAR][1][4] = 42, -+ [0][1][2][1][RTW89_QATAR][0][4] = 6, -+ [0][1][2][1][RTW89_UK][1][4] = 42, -+ [0][1][2][1][RTW89_UK][0][4] = 6, -+ [0][1][2][1][RTW89_FCC][1][6] = -4, -+ [0][1][2][1][RTW89_FCC][2][6] = 54, -+ [0][1][2][1][RTW89_ETSI][1][6] = 42, -+ [0][1][2][1][RTW89_ETSI][0][6] = 6, -+ [0][1][2][1][RTW89_MKK][1][6] = 54, -+ [0][1][2][1][RTW89_MKK][0][6] = 16, -+ [0][1][2][1][RTW89_IC][1][6] = -4, -+ [0][1][2][1][RTW89_KCC][1][6] = 12, -+ [0][1][2][1][RTW89_KCC][0][6] = 12, -+ [0][1][2][1][RTW89_ACMA][1][6] = 42, -+ [0][1][2][1][RTW89_ACMA][0][6] = 6, -+ [0][1][2][1][RTW89_CHILE][1][6] = -4, -+ [0][1][2][1][RTW89_QATAR][1][6] = 42, -+ [0][1][2][1][RTW89_QATAR][0][6] = 6, -+ [0][1][2][1][RTW89_UK][1][6] = 42, -+ [0][1][2][1][RTW89_UK][0][6] = 6, -+ [0][1][2][1][RTW89_FCC][1][8] = -4, -+ [0][1][2][1][RTW89_FCC][2][8] = 54, -+ [0][1][2][1][RTW89_ETSI][1][8] = 42, -+ [0][1][2][1][RTW89_ETSI][0][8] = 6, -+ [0][1][2][1][RTW89_MKK][1][8] = 54, -+ [0][1][2][1][RTW89_MKK][0][8] = 16, -+ [0][1][2][1][RTW89_IC][1][8] = -4, -+ [0][1][2][1][RTW89_KCC][1][8] = 12, -+ [0][1][2][1][RTW89_KCC][0][8] = 12, -+ [0][1][2][1][RTW89_ACMA][1][8] = 42, -+ [0][1][2][1][RTW89_ACMA][0][8] = 6, -+ [0][1][2][1][RTW89_CHILE][1][8] = -4, -+ [0][1][2][1][RTW89_QATAR][1][8] = 42, -+ [0][1][2][1][RTW89_QATAR][0][8] = 6, -+ [0][1][2][1][RTW89_UK][1][8] = 42, -+ [0][1][2][1][RTW89_UK][0][8] = 6, -+ [0][1][2][1][RTW89_FCC][1][10] = -4, -+ [0][1][2][1][RTW89_FCC][2][10] = 54, -+ [0][1][2][1][RTW89_ETSI][1][10] = 42, -+ [0][1][2][1][RTW89_ETSI][0][10] = 6, -+ [0][1][2][1][RTW89_MKK][1][10] = 54, -+ [0][1][2][1][RTW89_MKK][0][10] = 16, -+ [0][1][2][1][RTW89_IC][1][10] = -4, -+ [0][1][2][1][RTW89_KCC][1][10] = 12, -+ [0][1][2][1][RTW89_KCC][0][10] = 12, -+ [0][1][2][1][RTW89_ACMA][1][10] = 42, -+ [0][1][2][1][RTW89_ACMA][0][10] = 6, -+ [0][1][2][1][RTW89_CHILE][1][10] = -4, -+ [0][1][2][1][RTW89_QATAR][1][10] = 42, -+ [0][1][2][1][RTW89_QATAR][0][10] = 6, -+ [0][1][2][1][RTW89_UK][1][10] = 42, -+ [0][1][2][1][RTW89_UK][0][10] = 6, -+ [0][1][2][1][RTW89_FCC][1][12] = -4, -+ [0][1][2][1][RTW89_FCC][2][12] = 54, -+ [0][1][2][1][RTW89_ETSI][1][12] = 42, -+ [0][1][2][1][RTW89_ETSI][0][12] = 6, -+ [0][1][2][1][RTW89_MKK][1][12] = 54, -+ [0][1][2][1][RTW89_MKK][0][12] = 16, -+ [0][1][2][1][RTW89_IC][1][12] = -4, -+ [0][1][2][1][RTW89_KCC][1][12] = 12, -+ [0][1][2][1][RTW89_KCC][0][12] = 12, -+ [0][1][2][1][RTW89_ACMA][1][12] = 42, -+ [0][1][2][1][RTW89_ACMA][0][12] = 6, -+ [0][1][2][1][RTW89_CHILE][1][12] = -4, -+ [0][1][2][1][RTW89_QATAR][1][12] = 42, -+ [0][1][2][1][RTW89_QATAR][0][12] = 6, -+ [0][1][2][1][RTW89_UK][1][12] = 42, -+ [0][1][2][1][RTW89_UK][0][12] = 6, -+ [0][1][2][1][RTW89_FCC][1][14] = -4, -+ [0][1][2][1][RTW89_FCC][2][14] = 54, -+ [0][1][2][1][RTW89_ETSI][1][14] = 42, -+ [0][1][2][1][RTW89_ETSI][0][14] = 6, -+ [0][1][2][1][RTW89_MKK][1][14] = 54, -+ [0][1][2][1][RTW89_MKK][0][14] = 16, -+ [0][1][2][1][RTW89_IC][1][14] = -4, -+ [0][1][2][1][RTW89_KCC][1][14] = 12, -+ [0][1][2][1][RTW89_KCC][0][14] = 12, -+ [0][1][2][1][RTW89_ACMA][1][14] = 42, -+ [0][1][2][1][RTW89_ACMA][0][14] = 6, -+ [0][1][2][1][RTW89_CHILE][1][14] = -4, -+ [0][1][2][1][RTW89_QATAR][1][14] = 42, -+ [0][1][2][1][RTW89_QATAR][0][14] = 6, -+ [0][1][2][1][RTW89_UK][1][14] = 42, -+ [0][1][2][1][RTW89_UK][0][14] = 6, -+ [0][1][2][1][RTW89_FCC][1][15] = -4, -+ [0][1][2][1][RTW89_FCC][2][15] = 54, -+ [0][1][2][1][RTW89_ETSI][1][15] = 42, -+ [0][1][2][1][RTW89_ETSI][0][15] = 6, -+ [0][1][2][1][RTW89_MKK][1][15] = 54, -+ [0][1][2][1][RTW89_MKK][0][15] = 16, -+ [0][1][2][1][RTW89_IC][1][15] = -4, -+ [0][1][2][1][RTW89_KCC][1][15] = 12, -+ [0][1][2][1][RTW89_KCC][0][15] = 12, -+ [0][1][2][1][RTW89_ACMA][1][15] = 42, -+ [0][1][2][1][RTW89_ACMA][0][15] = 6, -+ [0][1][2][1][RTW89_CHILE][1][15] = -4, -+ [0][1][2][1][RTW89_QATAR][1][15] = 42, -+ [0][1][2][1][RTW89_QATAR][0][15] = 6, -+ [0][1][2][1][RTW89_UK][1][15] = 42, -+ [0][1][2][1][RTW89_UK][0][15] = 6, -+ [0][1][2][1][RTW89_FCC][1][17] = -4, -+ [0][1][2][1][RTW89_FCC][2][17] = 54, -+ [0][1][2][1][RTW89_ETSI][1][17] = 42, -+ [0][1][2][1][RTW89_ETSI][0][17] = 6, -+ [0][1][2][1][RTW89_MKK][1][17] = 54, -+ [0][1][2][1][RTW89_MKK][0][17] = 16, -+ [0][1][2][1][RTW89_IC][1][17] = -4, -+ [0][1][2][1][RTW89_KCC][1][17] = 12, -+ [0][1][2][1][RTW89_KCC][0][17] = 12, -+ [0][1][2][1][RTW89_ACMA][1][17] = 42, -+ [0][1][2][1][RTW89_ACMA][0][17] = 6, -+ [0][1][2][1][RTW89_CHILE][1][17] = -4, -+ [0][1][2][1][RTW89_QATAR][1][17] = 42, -+ [0][1][2][1][RTW89_QATAR][0][17] = 6, -+ [0][1][2][1][RTW89_UK][1][17] = 42, -+ [0][1][2][1][RTW89_UK][0][17] = 6, -+ [0][1][2][1][RTW89_FCC][1][19] = -4, -+ [0][1][2][1][RTW89_FCC][2][19] = 54, -+ [0][1][2][1][RTW89_ETSI][1][19] = 42, -+ [0][1][2][1][RTW89_ETSI][0][19] = 6, -+ [0][1][2][1][RTW89_MKK][1][19] = 54, -+ [0][1][2][1][RTW89_MKK][0][19] = 16, -+ [0][1][2][1][RTW89_IC][1][19] = -4, -+ [0][1][2][1][RTW89_KCC][1][19] = 12, -+ [0][1][2][1][RTW89_KCC][0][19] = 12, -+ [0][1][2][1][RTW89_ACMA][1][19] = 42, -+ [0][1][2][1][RTW89_ACMA][0][19] = 6, -+ [0][1][2][1][RTW89_CHILE][1][19] = -4, -+ [0][1][2][1][RTW89_QATAR][1][19] = 42, -+ [0][1][2][1][RTW89_QATAR][0][19] = 6, -+ [0][1][2][1][RTW89_UK][1][19] = 42, -+ [0][1][2][1][RTW89_UK][0][19] = 6, -+ [0][1][2][1][RTW89_FCC][1][21] = -4, -+ [0][1][2][1][RTW89_FCC][2][21] = 54, -+ [0][1][2][1][RTW89_ETSI][1][21] = 42, -+ [0][1][2][1][RTW89_ETSI][0][21] = 6, -+ [0][1][2][1][RTW89_MKK][1][21] = 54, -+ [0][1][2][1][RTW89_MKK][0][21] = 16, -+ [0][1][2][1][RTW89_IC][1][21] = -4, -+ [0][1][2][1][RTW89_KCC][1][21] = 12, -+ [0][1][2][1][RTW89_KCC][0][21] = 12, -+ [0][1][2][1][RTW89_ACMA][1][21] = 42, -+ [0][1][2][1][RTW89_ACMA][0][21] = 6, -+ [0][1][2][1][RTW89_CHILE][1][21] = -4, -+ [0][1][2][1][RTW89_QATAR][1][21] = 42, -+ [0][1][2][1][RTW89_QATAR][0][21] = 6, -+ [0][1][2][1][RTW89_UK][1][21] = 42, -+ [0][1][2][1][RTW89_UK][0][21] = 6, -+ [0][1][2][1][RTW89_FCC][1][23] = -4, -+ [0][1][2][1][RTW89_FCC][2][23] = 68, -+ [0][1][2][1][RTW89_ETSI][1][23] = 42, -+ [0][1][2][1][RTW89_ETSI][0][23] = 6, -+ [0][1][2][1][RTW89_MKK][1][23] = 54, -+ [0][1][2][1][RTW89_MKK][0][23] = 16, -+ [0][1][2][1][RTW89_IC][1][23] = -4, -+ [0][1][2][1][RTW89_KCC][1][23] = 12, -+ [0][1][2][1][RTW89_KCC][0][23] = 10, -+ [0][1][2][1][RTW89_ACMA][1][23] = 42, -+ [0][1][2][1][RTW89_ACMA][0][23] = 6, -+ [0][1][2][1][RTW89_CHILE][1][23] = -4, -+ [0][1][2][1][RTW89_QATAR][1][23] = 42, -+ [0][1][2][1][RTW89_QATAR][0][23] = 6, -+ [0][1][2][1][RTW89_UK][1][23] = 42, -+ [0][1][2][1][RTW89_UK][0][23] = 6, -+ [0][1][2][1][RTW89_FCC][1][25] = -4, -+ [0][1][2][1][RTW89_FCC][2][25] = 68, -+ [0][1][2][1][RTW89_ETSI][1][25] = 42, -+ [0][1][2][1][RTW89_ETSI][0][25] = 6, -+ [0][1][2][1][RTW89_MKK][1][25] = 54, -+ [0][1][2][1][RTW89_MKK][0][25] = 16, -+ [0][1][2][1][RTW89_IC][1][25] = -4, -+ [0][1][2][1][RTW89_KCC][1][25] = 12, -+ [0][1][2][1][RTW89_KCC][0][25] = 14, -+ [0][1][2][1][RTW89_ACMA][1][25] = 42, -+ [0][1][2][1][RTW89_ACMA][0][25] = 6, -+ [0][1][2][1][RTW89_CHILE][1][25] = -4, -+ [0][1][2][1][RTW89_QATAR][1][25] = 42, -+ [0][1][2][1][RTW89_QATAR][0][25] = 6, -+ [0][1][2][1][RTW89_UK][1][25] = 42, -+ [0][1][2][1][RTW89_UK][0][25] = 6, -+ [0][1][2][1][RTW89_FCC][1][27] = -4, -+ [0][1][2][1][RTW89_FCC][2][27] = 68, -+ [0][1][2][1][RTW89_ETSI][1][27] = 42, -+ [0][1][2][1][RTW89_ETSI][0][27] = 6, -+ [0][1][2][1][RTW89_MKK][1][27] = 54, -+ [0][1][2][1][RTW89_MKK][0][27] = 16, -+ [0][1][2][1][RTW89_IC][1][27] = -4, -+ [0][1][2][1][RTW89_KCC][1][27] = 12, -+ [0][1][2][1][RTW89_KCC][0][27] = 14, -+ [0][1][2][1][RTW89_ACMA][1][27] = 42, -+ [0][1][2][1][RTW89_ACMA][0][27] = 6, -+ [0][1][2][1][RTW89_CHILE][1][27] = -4, -+ [0][1][2][1][RTW89_QATAR][1][27] = 42, -+ [0][1][2][1][RTW89_QATAR][0][27] = 6, -+ [0][1][2][1][RTW89_UK][1][27] = 42, -+ [0][1][2][1][RTW89_UK][0][27] = 6, -+ [0][1][2][1][RTW89_FCC][1][29] = -4, -+ [0][1][2][1][RTW89_FCC][2][29] = 68, -+ [0][1][2][1][RTW89_ETSI][1][29] = 42, -+ [0][1][2][1][RTW89_ETSI][0][29] = 6, -+ [0][1][2][1][RTW89_MKK][1][29] = 54, -+ [0][1][2][1][RTW89_MKK][0][29] = 16, -+ [0][1][2][1][RTW89_IC][1][29] = -4, -+ [0][1][2][1][RTW89_KCC][1][29] = 12, -+ [0][1][2][1][RTW89_KCC][0][29] = 14, -+ [0][1][2][1][RTW89_ACMA][1][29] = 42, -+ [0][1][2][1][RTW89_ACMA][0][29] = 6, -+ [0][1][2][1][RTW89_CHILE][1][29] = -4, -+ [0][1][2][1][RTW89_QATAR][1][29] = 42, -+ [0][1][2][1][RTW89_QATAR][0][29] = 6, -+ [0][1][2][1][RTW89_UK][1][29] = 42, -+ [0][1][2][1][RTW89_UK][0][29] = 6, -+ [0][1][2][1][RTW89_FCC][1][30] = -4, -+ [0][1][2][1][RTW89_FCC][2][30] = 68, -+ [0][1][2][1][RTW89_ETSI][1][30] = 42, -+ [0][1][2][1][RTW89_ETSI][0][30] = 6, -+ [0][1][2][1][RTW89_MKK][1][30] = 54, -+ [0][1][2][1][RTW89_MKK][0][30] = 16, -+ [0][1][2][1][RTW89_IC][1][30] = -4, -+ [0][1][2][1][RTW89_KCC][1][30] = 12, -+ [0][1][2][1][RTW89_KCC][0][30] = 14, -+ [0][1][2][1][RTW89_ACMA][1][30] = 42, -+ [0][1][2][1][RTW89_ACMA][0][30] = 6, -+ [0][1][2][1][RTW89_CHILE][1][30] = -4, -+ [0][1][2][1][RTW89_QATAR][1][30] = 42, -+ [0][1][2][1][RTW89_QATAR][0][30] = 6, -+ [0][1][2][1][RTW89_UK][1][30] = 42, -+ [0][1][2][1][RTW89_UK][0][30] = 6, -+ [0][1][2][1][RTW89_FCC][1][32] = -4, -+ [0][1][2][1][RTW89_FCC][2][32] = 68, -+ [0][1][2][1][RTW89_ETSI][1][32] = 42, -+ [0][1][2][1][RTW89_ETSI][0][32] = 6, -+ [0][1][2][1][RTW89_MKK][1][32] = 54, -+ [0][1][2][1][RTW89_MKK][0][32] = 16, -+ [0][1][2][1][RTW89_IC][1][32] = -4, -+ [0][1][2][1][RTW89_KCC][1][32] = 12, -+ [0][1][2][1][RTW89_KCC][0][32] = 14, -+ [0][1][2][1][RTW89_ACMA][1][32] = 42, -+ [0][1][2][1][RTW89_ACMA][0][32] = 6, -+ [0][1][2][1][RTW89_CHILE][1][32] = -4, -+ [0][1][2][1][RTW89_QATAR][1][32] = 42, -+ [0][1][2][1][RTW89_QATAR][0][32] = 6, -+ [0][1][2][1][RTW89_UK][1][32] = 42, -+ [0][1][2][1][RTW89_UK][0][32] = 6, -+ [0][1][2][1][RTW89_FCC][1][34] = -4, -+ [0][1][2][1][RTW89_FCC][2][34] = 68, -+ [0][1][2][1][RTW89_ETSI][1][34] = 42, -+ [0][1][2][1][RTW89_ETSI][0][34] = 6, -+ [0][1][2][1][RTW89_MKK][1][34] = 54, -+ [0][1][2][1][RTW89_MKK][0][34] = 16, -+ [0][1][2][1][RTW89_IC][1][34] = -4, -+ [0][1][2][1][RTW89_KCC][1][34] = 12, -+ [0][1][2][1][RTW89_KCC][0][34] = 14, -+ [0][1][2][1][RTW89_ACMA][1][34] = 42, -+ [0][1][2][1][RTW89_ACMA][0][34] = 6, -+ [0][1][2][1][RTW89_CHILE][1][34] = -4, -+ [0][1][2][1][RTW89_QATAR][1][34] = 42, -+ [0][1][2][1][RTW89_QATAR][0][34] = 6, -+ [0][1][2][1][RTW89_UK][1][34] = 42, -+ [0][1][2][1][RTW89_UK][0][34] = 6, -+ [0][1][2][1][RTW89_FCC][1][36] = -4, -+ [0][1][2][1][RTW89_FCC][2][36] = 68, -+ [0][1][2][1][RTW89_ETSI][1][36] = 42, -+ [0][1][2][1][RTW89_ETSI][0][36] = 6, -+ [0][1][2][1][RTW89_MKK][1][36] = 54, -+ [0][1][2][1][RTW89_MKK][0][36] = 16, -+ [0][1][2][1][RTW89_IC][1][36] = -4, -+ [0][1][2][1][RTW89_KCC][1][36] = 12, -+ [0][1][2][1][RTW89_KCC][0][36] = 14, -+ [0][1][2][1][RTW89_ACMA][1][36] = 42, -+ [0][1][2][1][RTW89_ACMA][0][36] = 6, -+ [0][1][2][1][RTW89_CHILE][1][36] = -4, -+ [0][1][2][1][RTW89_QATAR][1][36] = 42, -+ [0][1][2][1][RTW89_QATAR][0][36] = 6, -+ [0][1][2][1][RTW89_UK][1][36] = 42, -+ [0][1][2][1][RTW89_UK][0][36] = 6, -+ [0][1][2][1][RTW89_FCC][1][38] = -4, -+ [0][1][2][1][RTW89_FCC][2][38] = 68, -+ [0][1][2][1][RTW89_ETSI][1][38] = 42, -+ [0][1][2][1][RTW89_ETSI][0][38] = 6, -+ [0][1][2][1][RTW89_MKK][1][38] = 54, -+ [0][1][2][1][RTW89_MKK][0][38] = 16, -+ [0][1][2][1][RTW89_IC][1][38] = -4, -+ [0][1][2][1][RTW89_KCC][1][38] = 12, -+ [0][1][2][1][RTW89_KCC][0][38] = 14, -+ [0][1][2][1][RTW89_ACMA][1][38] = 42, -+ [0][1][2][1][RTW89_ACMA][0][38] = 6, -+ [0][1][2][1][RTW89_CHILE][1][38] = -4, -+ [0][1][2][1][RTW89_QATAR][1][38] = 42, -+ [0][1][2][1][RTW89_QATAR][0][38] = 6, -+ [0][1][2][1][RTW89_UK][1][38] = 42, -+ [0][1][2][1][RTW89_UK][0][38] = 6, -+ [0][1][2][1][RTW89_FCC][1][40] = -4, -+ [0][1][2][1][RTW89_FCC][2][40] = 68, -+ [0][1][2][1][RTW89_ETSI][1][40] = 42, -+ [0][1][2][1][RTW89_ETSI][0][40] = 6, -+ [0][1][2][1][RTW89_MKK][1][40] = 54, -+ [0][1][2][1][RTW89_MKK][0][40] = 16, -+ [0][1][2][1][RTW89_IC][1][40] = -4, -+ [0][1][2][1][RTW89_KCC][1][40] = 12, -+ [0][1][2][1][RTW89_KCC][0][40] = 14, -+ [0][1][2][1][RTW89_ACMA][1][40] = 42, -+ [0][1][2][1][RTW89_ACMA][0][40] = 6, -+ [0][1][2][1][RTW89_CHILE][1][40] = -4, -+ [0][1][2][1][RTW89_QATAR][1][40] = 42, -+ [0][1][2][1][RTW89_QATAR][0][40] = 6, -+ [0][1][2][1][RTW89_UK][1][40] = 42, -+ [0][1][2][1][RTW89_UK][0][40] = 6, -+ [0][1][2][1][RTW89_FCC][1][42] = -4, -+ [0][1][2][1][RTW89_FCC][2][42] = 68, -+ [0][1][2][1][RTW89_ETSI][1][42] = 42, -+ [0][1][2][1][RTW89_ETSI][0][42] = 6, -+ [0][1][2][1][RTW89_MKK][1][42] = 54, -+ [0][1][2][1][RTW89_MKK][0][42] = 16, -+ [0][1][2][1][RTW89_IC][1][42] = -4, -+ [0][1][2][1][RTW89_KCC][1][42] = 12, -+ [0][1][2][1][RTW89_KCC][0][42] = 14, -+ [0][1][2][1][RTW89_ACMA][1][42] = 42, -+ [0][1][2][1][RTW89_ACMA][0][42] = 6, -+ [0][1][2][1][RTW89_CHILE][1][42] = -4, -+ [0][1][2][1][RTW89_QATAR][1][42] = 42, -+ [0][1][2][1][RTW89_QATAR][0][42] = 6, -+ [0][1][2][1][RTW89_UK][1][42] = 42, -+ [0][1][2][1][RTW89_UK][0][42] = 6, -+ [0][1][2][1][RTW89_FCC][1][44] = -2, -+ [0][1][2][1][RTW89_FCC][2][44] = 68, -+ [0][1][2][1][RTW89_ETSI][1][44] = 42, -+ [0][1][2][1][RTW89_ETSI][0][44] = 6, -+ [0][1][2][1][RTW89_MKK][1][44] = 34, -+ [0][1][2][1][RTW89_MKK][0][44] = 16, -+ [0][1][2][1][RTW89_IC][1][44] = -2, -+ [0][1][2][1][RTW89_KCC][1][44] = 12, -+ [0][1][2][1][RTW89_KCC][0][44] = 12, -+ [0][1][2][1][RTW89_ACMA][1][44] = 42, -+ [0][1][2][1][RTW89_ACMA][0][44] = 6, -+ [0][1][2][1][RTW89_CHILE][1][44] = -2, -+ [0][1][2][1][RTW89_QATAR][1][44] = 42, -+ [0][1][2][1][RTW89_QATAR][0][44] = 6, -+ [0][1][2][1][RTW89_UK][1][44] = 42, -+ [0][1][2][1][RTW89_UK][0][44] = 6, -+ [0][1][2][1][RTW89_FCC][1][45] = -2, -+ [0][1][2][1][RTW89_FCC][2][45] = 127, -+ [0][1][2][1][RTW89_ETSI][1][45] = 127, -+ [0][1][2][1][RTW89_ETSI][0][45] = 127, -+ [0][1][2][1][RTW89_MKK][1][45] = 127, -+ [0][1][2][1][RTW89_MKK][0][45] = 127, -+ [0][1][2][1][RTW89_IC][1][45] = -2, -+ [0][1][2][1][RTW89_KCC][1][45] = 12, -+ [0][1][2][1][RTW89_KCC][0][45] = 127, -+ [0][1][2][1][RTW89_ACMA][1][45] = 127, -+ [0][1][2][1][RTW89_ACMA][0][45] = 127, -+ [0][1][2][1][RTW89_CHILE][1][45] = -2, -+ [0][1][2][1][RTW89_QATAR][1][45] = 127, -+ [0][1][2][1][RTW89_QATAR][0][45] = 127, -+ [0][1][2][1][RTW89_UK][1][45] = 127, -+ [0][1][2][1][RTW89_UK][0][45] = 127, -+ [0][1][2][1][RTW89_FCC][1][47] = -2, -+ [0][1][2][1][RTW89_FCC][2][47] = 127, -+ [0][1][2][1][RTW89_ETSI][1][47] = 127, -+ [0][1][2][1][RTW89_ETSI][0][47] = 127, -+ [0][1][2][1][RTW89_MKK][1][47] = 127, -+ [0][1][2][1][RTW89_MKK][0][47] = 127, -+ [0][1][2][1][RTW89_IC][1][47] = -2, -+ [0][1][2][1][RTW89_KCC][1][47] = 12, -+ [0][1][2][1][RTW89_KCC][0][47] = 127, -+ [0][1][2][1][RTW89_ACMA][1][47] = 127, -+ [0][1][2][1][RTW89_ACMA][0][47] = 127, -+ [0][1][2][1][RTW89_CHILE][1][47] = -2, -+ [0][1][2][1][RTW89_QATAR][1][47] = 127, -+ [0][1][2][1][RTW89_QATAR][0][47] = 127, -+ [0][1][2][1][RTW89_UK][1][47] = 127, -+ [0][1][2][1][RTW89_UK][0][47] = 127, -+ [0][1][2][1][RTW89_FCC][1][49] = -2, -+ [0][1][2][1][RTW89_FCC][2][49] = 127, -+ [0][1][2][1][RTW89_ETSI][1][49] = 127, -+ [0][1][2][1][RTW89_ETSI][0][49] = 127, -+ [0][1][2][1][RTW89_MKK][1][49] = 127, -+ [0][1][2][1][RTW89_MKK][0][49] = 127, -+ [0][1][2][1][RTW89_IC][1][49] = -2, -+ [0][1][2][1][RTW89_KCC][1][49] = 12, -+ [0][1][2][1][RTW89_KCC][0][49] = 127, -+ [0][1][2][1][RTW89_ACMA][1][49] = 127, -+ [0][1][2][1][RTW89_ACMA][0][49] = 127, -+ [0][1][2][1][RTW89_CHILE][1][49] = -2, -+ [0][1][2][1][RTW89_QATAR][1][49] = 127, -+ [0][1][2][1][RTW89_QATAR][0][49] = 127, -+ [0][1][2][1][RTW89_UK][1][49] = 127, -+ [0][1][2][1][RTW89_UK][0][49] = 127, -+ [0][1][2][1][RTW89_FCC][1][51] = -2, -+ [0][1][2][1][RTW89_FCC][2][51] = 127, -+ [0][1][2][1][RTW89_ETSI][1][51] = 127, -+ [0][1][2][1][RTW89_ETSI][0][51] = 127, -+ [0][1][2][1][RTW89_MKK][1][51] = 127, -+ [0][1][2][1][RTW89_MKK][0][51] = 127, -+ [0][1][2][1][RTW89_IC][1][51] = -2, -+ [0][1][2][1][RTW89_KCC][1][51] = 12, -+ [0][1][2][1][RTW89_KCC][0][51] = 127, -+ [0][1][2][1][RTW89_ACMA][1][51] = 127, -+ [0][1][2][1][RTW89_ACMA][0][51] = 127, -+ [0][1][2][1][RTW89_CHILE][1][51] = -2, -+ [0][1][2][1][RTW89_QATAR][1][51] = 127, -+ [0][1][2][1][RTW89_QATAR][0][51] = 127, -+ [0][1][2][1][RTW89_UK][1][51] = 127, -+ [0][1][2][1][RTW89_UK][0][51] = 127, -+ [0][1][2][1][RTW89_FCC][1][53] = -2, -+ [0][1][2][1][RTW89_FCC][2][53] = 127, -+ [0][1][2][1][RTW89_ETSI][1][53] = 127, -+ [0][1][2][1][RTW89_ETSI][0][53] = 127, -+ [0][1][2][1][RTW89_MKK][1][53] = 127, -+ [0][1][2][1][RTW89_MKK][0][53] = 127, -+ [0][1][2][1][RTW89_IC][1][53] = -2, -+ [0][1][2][1][RTW89_KCC][1][53] = 12, -+ [0][1][2][1][RTW89_KCC][0][53] = 127, -+ [0][1][2][1][RTW89_ACMA][1][53] = 127, -+ [0][1][2][1][RTW89_ACMA][0][53] = 127, -+ [0][1][2][1][RTW89_CHILE][1][53] = -2, -+ [0][1][2][1][RTW89_QATAR][1][53] = 127, -+ [0][1][2][1][RTW89_QATAR][0][53] = 127, -+ [0][1][2][1][RTW89_UK][1][53] = 127, -+ [0][1][2][1][RTW89_UK][0][53] = 127, -+ [0][1][2][1][RTW89_FCC][1][55] = -2, -+ [0][1][2][1][RTW89_FCC][2][55] = 68, -+ [0][1][2][1][RTW89_ETSI][1][55] = 127, -+ [0][1][2][1][RTW89_ETSI][0][55] = 127, -+ [0][1][2][1][RTW89_MKK][1][55] = 127, -+ [0][1][2][1][RTW89_MKK][0][55] = 127, -+ [0][1][2][1][RTW89_IC][1][55] = -2, -+ [0][1][2][1][RTW89_KCC][1][55] = 12, -+ [0][1][2][1][RTW89_KCC][0][55] = 127, -+ [0][1][2][1][RTW89_ACMA][1][55] = 127, -+ [0][1][2][1][RTW89_ACMA][0][55] = 127, -+ [0][1][2][1][RTW89_CHILE][1][55] = -2, -+ [0][1][2][1][RTW89_QATAR][1][55] = 127, -+ [0][1][2][1][RTW89_QATAR][0][55] = 127, -+ [0][1][2][1][RTW89_UK][1][55] = 127, -+ [0][1][2][1][RTW89_UK][0][55] = 127, -+ [0][1][2][1][RTW89_FCC][1][57] = -2, -+ [0][1][2][1][RTW89_FCC][2][57] = 68, -+ [0][1][2][1][RTW89_ETSI][1][57] = 127, -+ [0][1][2][1][RTW89_ETSI][0][57] = 127, -+ [0][1][2][1][RTW89_MKK][1][57] = 127, -+ [0][1][2][1][RTW89_MKK][0][57] = 127, -+ [0][1][2][1][RTW89_IC][1][57] = -2, -+ [0][1][2][1][RTW89_KCC][1][57] = 12, -+ [0][1][2][1][RTW89_KCC][0][57] = 127, -+ [0][1][2][1][RTW89_ACMA][1][57] = 127, -+ [0][1][2][1][RTW89_ACMA][0][57] = 127, -+ [0][1][2][1][RTW89_CHILE][1][57] = -2, -+ [0][1][2][1][RTW89_QATAR][1][57] = 127, -+ [0][1][2][1][RTW89_QATAR][0][57] = 127, -+ [0][1][2][1][RTW89_UK][1][57] = 127, -+ [0][1][2][1][RTW89_UK][0][57] = 127, -+ [0][1][2][1][RTW89_FCC][1][59] = -2, -+ [0][1][2][1][RTW89_FCC][2][59] = 68, -+ [0][1][2][1][RTW89_ETSI][1][59] = 127, -+ [0][1][2][1][RTW89_ETSI][0][59] = 127, -+ [0][1][2][1][RTW89_MKK][1][59] = 127, -+ [0][1][2][1][RTW89_MKK][0][59] = 127, -+ [0][1][2][1][RTW89_IC][1][59] = -2, -+ [0][1][2][1][RTW89_KCC][1][59] = 12, -+ [0][1][2][1][RTW89_KCC][0][59] = 127, -+ [0][1][2][1][RTW89_ACMA][1][59] = 127, -+ [0][1][2][1][RTW89_ACMA][0][59] = 127, -+ [0][1][2][1][RTW89_CHILE][1][59] = -2, -+ [0][1][2][1][RTW89_QATAR][1][59] = 127, -+ [0][1][2][1][RTW89_QATAR][0][59] = 127, -+ [0][1][2][1][RTW89_UK][1][59] = 127, -+ [0][1][2][1][RTW89_UK][0][59] = 127, -+ [0][1][2][1][RTW89_FCC][1][60] = -2, -+ [0][1][2][1][RTW89_FCC][2][60] = 68, -+ [0][1][2][1][RTW89_ETSI][1][60] = 127, -+ [0][1][2][1][RTW89_ETSI][0][60] = 127, -+ [0][1][2][1][RTW89_MKK][1][60] = 127, -+ [0][1][2][1][RTW89_MKK][0][60] = 127, -+ [0][1][2][1][RTW89_IC][1][60] = -2, -+ [0][1][2][1][RTW89_KCC][1][60] = 12, -+ [0][1][2][1][RTW89_KCC][0][60] = 127, -+ [0][1][2][1][RTW89_ACMA][1][60] = 127, -+ [0][1][2][1][RTW89_ACMA][0][60] = 127, -+ [0][1][2][1][RTW89_CHILE][1][60] = -2, -+ [0][1][2][1][RTW89_QATAR][1][60] = 127, -+ [0][1][2][1][RTW89_QATAR][0][60] = 127, -+ [0][1][2][1][RTW89_UK][1][60] = 127, -+ [0][1][2][1][RTW89_UK][0][60] = 127, -+ [0][1][2][1][RTW89_FCC][1][62] = -2, -+ [0][1][2][1][RTW89_FCC][2][62] = 68, -+ [0][1][2][1][RTW89_ETSI][1][62] = 127, -+ [0][1][2][1][RTW89_ETSI][0][62] = 127, -+ [0][1][2][1][RTW89_MKK][1][62] = 127, -+ [0][1][2][1][RTW89_MKK][0][62] = 127, -+ [0][1][2][1][RTW89_IC][1][62] = -2, -+ [0][1][2][1][RTW89_KCC][1][62] = 12, -+ [0][1][2][1][RTW89_KCC][0][62] = 127, -+ [0][1][2][1][RTW89_ACMA][1][62] = 127, -+ [0][1][2][1][RTW89_ACMA][0][62] = 127, -+ [0][1][2][1][RTW89_CHILE][1][62] = -2, -+ [0][1][2][1][RTW89_QATAR][1][62] = 127, -+ [0][1][2][1][RTW89_QATAR][0][62] = 127, -+ [0][1][2][1][RTW89_UK][1][62] = 127, -+ [0][1][2][1][RTW89_UK][0][62] = 127, -+ [0][1][2][1][RTW89_FCC][1][64] = -2, -+ [0][1][2][1][RTW89_FCC][2][64] = 68, -+ [0][1][2][1][RTW89_ETSI][1][64] = 127, -+ [0][1][2][1][RTW89_ETSI][0][64] = 127, -+ [0][1][2][1][RTW89_MKK][1][64] = 127, -+ [0][1][2][1][RTW89_MKK][0][64] = 127, -+ [0][1][2][1][RTW89_IC][1][64] = -2, -+ [0][1][2][1][RTW89_KCC][1][64] = 12, -+ [0][1][2][1][RTW89_KCC][0][64] = 127, -+ [0][1][2][1][RTW89_ACMA][1][64] = 127, -+ [0][1][2][1][RTW89_ACMA][0][64] = 127, -+ [0][1][2][1][RTW89_CHILE][1][64] = -2, -+ [0][1][2][1][RTW89_QATAR][1][64] = 127, -+ [0][1][2][1][RTW89_QATAR][0][64] = 127, -+ [0][1][2][1][RTW89_UK][1][64] = 127, -+ [0][1][2][1][RTW89_UK][0][64] = 127, -+ [0][1][2][1][RTW89_FCC][1][66] = -2, -+ [0][1][2][1][RTW89_FCC][2][66] = 68, -+ [0][1][2][1][RTW89_ETSI][1][66] = 127, -+ [0][1][2][1][RTW89_ETSI][0][66] = 127, -+ [0][1][2][1][RTW89_MKK][1][66] = 127, -+ [0][1][2][1][RTW89_MKK][0][66] = 127, -+ [0][1][2][1][RTW89_IC][1][66] = -2, -+ [0][1][2][1][RTW89_KCC][1][66] = 12, -+ [0][1][2][1][RTW89_KCC][0][66] = 127, -+ [0][1][2][1][RTW89_ACMA][1][66] = 127, -+ [0][1][2][1][RTW89_ACMA][0][66] = 127, -+ [0][1][2][1][RTW89_CHILE][1][66] = -2, -+ [0][1][2][1][RTW89_QATAR][1][66] = 127, -+ [0][1][2][1][RTW89_QATAR][0][66] = 127, -+ [0][1][2][1][RTW89_UK][1][66] = 127, -+ [0][1][2][1][RTW89_UK][0][66] = 127, -+ [0][1][2][1][RTW89_FCC][1][68] = -2, -+ [0][1][2][1][RTW89_FCC][2][68] = 68, -+ [0][1][2][1][RTW89_ETSI][1][68] = 127, -+ [0][1][2][1][RTW89_ETSI][0][68] = 127, -+ [0][1][2][1][RTW89_MKK][1][68] = 127, -+ [0][1][2][1][RTW89_MKK][0][68] = 127, -+ [0][1][2][1][RTW89_IC][1][68] = -2, -+ [0][1][2][1][RTW89_KCC][1][68] = 12, -+ [0][1][2][1][RTW89_KCC][0][68] = 127, -+ [0][1][2][1][RTW89_ACMA][1][68] = 127, -+ [0][1][2][1][RTW89_ACMA][0][68] = 127, -+ [0][1][2][1][RTW89_CHILE][1][68] = -2, -+ [0][1][2][1][RTW89_QATAR][1][68] = 127, -+ [0][1][2][1][RTW89_QATAR][0][68] = 127, -+ [0][1][2][1][RTW89_UK][1][68] = 127, -+ [0][1][2][1][RTW89_UK][0][68] = 127, -+ [0][1][2][1][RTW89_FCC][1][70] = -2, -+ [0][1][2][1][RTW89_FCC][2][70] = 68, -+ [0][1][2][1][RTW89_ETSI][1][70] = 127, -+ [0][1][2][1][RTW89_ETSI][0][70] = 127, -+ [0][1][2][1][RTW89_MKK][1][70] = 127, -+ [0][1][2][1][RTW89_MKK][0][70] = 127, -+ [0][1][2][1][RTW89_IC][1][70] = -2, -+ [0][1][2][1][RTW89_KCC][1][70] = 12, -+ [0][1][2][1][RTW89_KCC][0][70] = 127, -+ [0][1][2][1][RTW89_ACMA][1][70] = 127, -+ [0][1][2][1][RTW89_ACMA][0][70] = 127, -+ [0][1][2][1][RTW89_CHILE][1][70] = -2, -+ [0][1][2][1][RTW89_QATAR][1][70] = 127, -+ [0][1][2][1][RTW89_QATAR][0][70] = 127, -+ [0][1][2][1][RTW89_UK][1][70] = 127, -+ [0][1][2][1][RTW89_UK][0][70] = 127, -+ [0][1][2][1][RTW89_FCC][1][72] = -2, -+ [0][1][2][1][RTW89_FCC][2][72] = 68, -+ [0][1][2][1][RTW89_ETSI][1][72] = 127, -+ [0][1][2][1][RTW89_ETSI][0][72] = 127, -+ [0][1][2][1][RTW89_MKK][1][72] = 127, -+ [0][1][2][1][RTW89_MKK][0][72] = 127, -+ [0][1][2][1][RTW89_IC][1][72] = -2, -+ [0][1][2][1][RTW89_KCC][1][72] = 12, -+ [0][1][2][1][RTW89_KCC][0][72] = 127, -+ [0][1][2][1][RTW89_ACMA][1][72] = 127, -+ [0][1][2][1][RTW89_ACMA][0][72] = 127, -+ [0][1][2][1][RTW89_CHILE][1][72] = -2, -+ [0][1][2][1][RTW89_QATAR][1][72] = 127, -+ [0][1][2][1][RTW89_QATAR][0][72] = 127, -+ [0][1][2][1][RTW89_UK][1][72] = 127, -+ [0][1][2][1][RTW89_UK][0][72] = 127, -+ [0][1][2][1][RTW89_FCC][1][74] = -2, -+ [0][1][2][1][RTW89_FCC][2][74] = 68, -+ [0][1][2][1][RTW89_ETSI][1][74] = 127, -+ [0][1][2][1][RTW89_ETSI][0][74] = 127, -+ [0][1][2][1][RTW89_MKK][1][74] = 127, -+ [0][1][2][1][RTW89_MKK][0][74] = 127, -+ [0][1][2][1][RTW89_IC][1][74] = -2, -+ [0][1][2][1][RTW89_KCC][1][74] = 12, -+ [0][1][2][1][RTW89_KCC][0][74] = 127, -+ [0][1][2][1][RTW89_ACMA][1][74] = 127, -+ [0][1][2][1][RTW89_ACMA][0][74] = 127, -+ [0][1][2][1][RTW89_CHILE][1][74] = -2, -+ [0][1][2][1][RTW89_QATAR][1][74] = 127, -+ [0][1][2][1][RTW89_QATAR][0][74] = 127, -+ [0][1][2][1][RTW89_UK][1][74] = 127, -+ [0][1][2][1][RTW89_UK][0][74] = 127, -+ [0][1][2][1][RTW89_FCC][1][75] = -2, -+ [0][1][2][1][RTW89_FCC][2][75] = 68, -+ [0][1][2][1][RTW89_ETSI][1][75] = 127, -+ [0][1][2][1][RTW89_ETSI][0][75] = 127, -+ [0][1][2][1][RTW89_MKK][1][75] = 127, -+ [0][1][2][1][RTW89_MKK][0][75] = 127, -+ [0][1][2][1][RTW89_IC][1][75] = -2, -+ [0][1][2][1][RTW89_KCC][1][75] = 12, -+ [0][1][2][1][RTW89_KCC][0][75] = 127, -+ [0][1][2][1][RTW89_ACMA][1][75] = 127, -+ [0][1][2][1][RTW89_ACMA][0][75] = 127, -+ [0][1][2][1][RTW89_CHILE][1][75] = -2, -+ [0][1][2][1][RTW89_QATAR][1][75] = 127, -+ [0][1][2][1][RTW89_QATAR][0][75] = 127, -+ [0][1][2][1][RTW89_UK][1][75] = 127, -+ [0][1][2][1][RTW89_UK][0][75] = 127, -+ [0][1][2][1][RTW89_FCC][1][77] = -2, -+ [0][1][2][1][RTW89_FCC][2][77] = 68, -+ [0][1][2][1][RTW89_ETSI][1][77] = 127, -+ [0][1][2][1][RTW89_ETSI][0][77] = 127, -+ [0][1][2][1][RTW89_MKK][1][77] = 127, -+ [0][1][2][1][RTW89_MKK][0][77] = 127, -+ [0][1][2][1][RTW89_IC][1][77] = -2, -+ [0][1][2][1][RTW89_KCC][1][77] = 12, -+ [0][1][2][1][RTW89_KCC][0][77] = 127, -+ [0][1][2][1][RTW89_ACMA][1][77] = 127, -+ [0][1][2][1][RTW89_ACMA][0][77] = 127, -+ [0][1][2][1][RTW89_CHILE][1][77] = -2, -+ [0][1][2][1][RTW89_QATAR][1][77] = 127, -+ [0][1][2][1][RTW89_QATAR][0][77] = 127, -+ [0][1][2][1][RTW89_UK][1][77] = 127, -+ [0][1][2][1][RTW89_UK][0][77] = 127, -+ [0][1][2][1][RTW89_FCC][1][79] = -2, -+ [0][1][2][1][RTW89_FCC][2][79] = 68, -+ [0][1][2][1][RTW89_ETSI][1][79] = 127, -+ [0][1][2][1][RTW89_ETSI][0][79] = 127, -+ [0][1][2][1][RTW89_MKK][1][79] = 127, -+ [0][1][2][1][RTW89_MKK][0][79] = 127, -+ [0][1][2][1][RTW89_IC][1][79] = -2, -+ [0][1][2][1][RTW89_KCC][1][79] = 12, -+ [0][1][2][1][RTW89_KCC][0][79] = 127, -+ [0][1][2][1][RTW89_ACMA][1][79] = 127, -+ [0][1][2][1][RTW89_ACMA][0][79] = 127, -+ [0][1][2][1][RTW89_CHILE][1][79] = -2, -+ [0][1][2][1][RTW89_QATAR][1][79] = 127, -+ [0][1][2][1][RTW89_QATAR][0][79] = 127, -+ [0][1][2][1][RTW89_UK][1][79] = 127, -+ [0][1][2][1][RTW89_UK][0][79] = 127, -+ [0][1][2][1][RTW89_FCC][1][81] = -2, -+ [0][1][2][1][RTW89_FCC][2][81] = 68, -+ [0][1][2][1][RTW89_ETSI][1][81] = 127, -+ [0][1][2][1][RTW89_ETSI][0][81] = 127, -+ [0][1][2][1][RTW89_MKK][1][81] = 127, -+ [0][1][2][1][RTW89_MKK][0][81] = 127, -+ [0][1][2][1][RTW89_IC][1][81] = -2, -+ [0][1][2][1][RTW89_KCC][1][81] = 12, -+ [0][1][2][1][RTW89_KCC][0][81] = 127, -+ [0][1][2][1][RTW89_ACMA][1][81] = 127, -+ [0][1][2][1][RTW89_ACMA][0][81] = 127, -+ [0][1][2][1][RTW89_CHILE][1][81] = -2, -+ [0][1][2][1][RTW89_QATAR][1][81] = 127, -+ [0][1][2][1][RTW89_QATAR][0][81] = 127, -+ [0][1][2][1][RTW89_UK][1][81] = 127, -+ [0][1][2][1][RTW89_UK][0][81] = 127, -+ [0][1][2][1][RTW89_FCC][1][83] = -2, -+ [0][1][2][1][RTW89_FCC][2][83] = 68, -+ [0][1][2][1][RTW89_ETSI][1][83] = 127, -+ [0][1][2][1][RTW89_ETSI][0][83] = 127, -+ [0][1][2][1][RTW89_MKK][1][83] = 127, -+ [0][1][2][1][RTW89_MKK][0][83] = 127, -+ [0][1][2][1][RTW89_IC][1][83] = -2, -+ [0][1][2][1][RTW89_KCC][1][83] = 20, -+ [0][1][2][1][RTW89_KCC][0][83] = 127, -+ [0][1][2][1][RTW89_ACMA][1][83] = 127, -+ [0][1][2][1][RTW89_ACMA][0][83] = 127, -+ [0][1][2][1][RTW89_CHILE][1][83] = -2, -+ [0][1][2][1][RTW89_QATAR][1][83] = 127, -+ [0][1][2][1][RTW89_QATAR][0][83] = 127, -+ [0][1][2][1][RTW89_UK][1][83] = 127, -+ [0][1][2][1][RTW89_UK][0][83] = 127, -+ [0][1][2][1][RTW89_FCC][1][85] = -2, -+ [0][1][2][1][RTW89_FCC][2][85] = 68, -+ [0][1][2][1][RTW89_ETSI][1][85] = 127, -+ [0][1][2][1][RTW89_ETSI][0][85] = 127, -+ [0][1][2][1][RTW89_MKK][1][85] = 127, -+ [0][1][2][1][RTW89_MKK][0][85] = 127, -+ [0][1][2][1][RTW89_IC][1][85] = -2, -+ [0][1][2][1][RTW89_KCC][1][85] = 20, -+ [0][1][2][1][RTW89_KCC][0][85] = 127, -+ [0][1][2][1][RTW89_ACMA][1][85] = 127, -+ [0][1][2][1][RTW89_ACMA][0][85] = 127, -+ [0][1][2][1][RTW89_CHILE][1][85] = -2, -+ [0][1][2][1][RTW89_QATAR][1][85] = 127, -+ [0][1][2][1][RTW89_QATAR][0][85] = 127, -+ [0][1][2][1][RTW89_UK][1][85] = 127, -+ [0][1][2][1][RTW89_UK][0][85] = 127, -+ [0][1][2][1][RTW89_FCC][1][87] = -2, -+ [0][1][2][1][RTW89_FCC][2][87] = 127, -+ [0][1][2][1][RTW89_ETSI][1][87] = 127, -+ [0][1][2][1][RTW89_ETSI][0][87] = 127, -+ [0][1][2][1][RTW89_MKK][1][87] = 127, -+ [0][1][2][1][RTW89_MKK][0][87] = 127, -+ [0][1][2][1][RTW89_IC][1][87] = -2, -+ [0][1][2][1][RTW89_KCC][1][87] = 20, -+ [0][1][2][1][RTW89_KCC][0][87] = 127, -+ [0][1][2][1][RTW89_ACMA][1][87] = 127, -+ [0][1][2][1][RTW89_ACMA][0][87] = 127, -+ [0][1][2][1][RTW89_CHILE][1][87] = -2, -+ [0][1][2][1][RTW89_QATAR][1][87] = 127, -+ [0][1][2][1][RTW89_QATAR][0][87] = 127, -+ [0][1][2][1][RTW89_UK][1][87] = 127, -+ [0][1][2][1][RTW89_UK][0][87] = 127, -+ [0][1][2][1][RTW89_FCC][1][89] = -2, -+ [0][1][2][1][RTW89_FCC][2][89] = 127, -+ [0][1][2][1][RTW89_ETSI][1][89] = 127, -+ [0][1][2][1][RTW89_ETSI][0][89] = 127, -+ [0][1][2][1][RTW89_MKK][1][89] = 127, -+ [0][1][2][1][RTW89_MKK][0][89] = 127, -+ [0][1][2][1][RTW89_IC][1][89] = -2, -+ [0][1][2][1][RTW89_KCC][1][89] = 20, -+ [0][1][2][1][RTW89_KCC][0][89] = 127, -+ [0][1][2][1][RTW89_ACMA][1][89] = 127, -+ [0][1][2][1][RTW89_ACMA][0][89] = 127, -+ [0][1][2][1][RTW89_CHILE][1][89] = -2, -+ [0][1][2][1][RTW89_QATAR][1][89] = 127, -+ [0][1][2][1][RTW89_QATAR][0][89] = 127, -+ [0][1][2][1][RTW89_UK][1][89] = 127, -+ [0][1][2][1][RTW89_UK][0][89] = 127, -+ [0][1][2][1][RTW89_FCC][1][90] = -2, -+ [0][1][2][1][RTW89_FCC][2][90] = 127, -+ [0][1][2][1][RTW89_ETSI][1][90] = 127, -+ [0][1][2][1][RTW89_ETSI][0][90] = 127, -+ [0][1][2][1][RTW89_MKK][1][90] = 127, -+ [0][1][2][1][RTW89_MKK][0][90] = 127, -+ [0][1][2][1][RTW89_IC][1][90] = -2, -+ [0][1][2][1][RTW89_KCC][1][90] = 20, -+ [0][1][2][1][RTW89_KCC][0][90] = 127, -+ [0][1][2][1][RTW89_ACMA][1][90] = 127, -+ [0][1][2][1][RTW89_ACMA][0][90] = 127, -+ [0][1][2][1][RTW89_CHILE][1][90] = -2, -+ [0][1][2][1][RTW89_QATAR][1][90] = 127, -+ [0][1][2][1][RTW89_QATAR][0][90] = 127, -+ [0][1][2][1][RTW89_UK][1][90] = 127, -+ [0][1][2][1][RTW89_UK][0][90] = 127, -+ [0][1][2][1][RTW89_FCC][1][92] = -2, -+ [0][1][2][1][RTW89_FCC][2][92] = 127, -+ [0][1][2][1][RTW89_ETSI][1][92] = 127, -+ [0][1][2][1][RTW89_ETSI][0][92] = 127, -+ [0][1][2][1][RTW89_MKK][1][92] = 127, -+ [0][1][2][1][RTW89_MKK][0][92] = 127, -+ [0][1][2][1][RTW89_IC][1][92] = -2, -+ [0][1][2][1][RTW89_KCC][1][92] = 20, -+ [0][1][2][1][RTW89_KCC][0][92] = 127, -+ [0][1][2][1][RTW89_ACMA][1][92] = 127, -+ [0][1][2][1][RTW89_ACMA][0][92] = 127, -+ [0][1][2][1][RTW89_CHILE][1][92] = -2, -+ [0][1][2][1][RTW89_QATAR][1][92] = 127, -+ [0][1][2][1][RTW89_QATAR][0][92] = 127, -+ [0][1][2][1][RTW89_UK][1][92] = 127, -+ [0][1][2][1][RTW89_UK][0][92] = 127, -+ [0][1][2][1][RTW89_FCC][1][94] = -2, -+ [0][1][2][1][RTW89_FCC][2][94] = 127, -+ [0][1][2][1][RTW89_ETSI][1][94] = 127, -+ [0][1][2][1][RTW89_ETSI][0][94] = 127, -+ [0][1][2][1][RTW89_MKK][1][94] = 127, -+ [0][1][2][1][RTW89_MKK][0][94] = 127, -+ [0][1][2][1][RTW89_IC][1][94] = -2, -+ [0][1][2][1][RTW89_KCC][1][94] = 20, -+ [0][1][2][1][RTW89_KCC][0][94] = 127, -+ [0][1][2][1][RTW89_ACMA][1][94] = 127, -+ [0][1][2][1][RTW89_ACMA][0][94] = 127, -+ [0][1][2][1][RTW89_CHILE][1][94] = -2, -+ [0][1][2][1][RTW89_QATAR][1][94] = 127, -+ [0][1][2][1][RTW89_QATAR][0][94] = 127, -+ [0][1][2][1][RTW89_UK][1][94] = 127, -+ [0][1][2][1][RTW89_UK][0][94] = 127, -+ [0][1][2][1][RTW89_FCC][1][96] = -2, -+ [0][1][2][1][RTW89_FCC][2][96] = 127, -+ [0][1][2][1][RTW89_ETSI][1][96] = 127, -+ [0][1][2][1][RTW89_ETSI][0][96] = 127, -+ [0][1][2][1][RTW89_MKK][1][96] = 127, -+ [0][1][2][1][RTW89_MKK][0][96] = 127, -+ [0][1][2][1][RTW89_IC][1][96] = -2, -+ [0][1][2][1][RTW89_KCC][1][96] = 20, -+ [0][1][2][1][RTW89_KCC][0][96] = 127, -+ [0][1][2][1][RTW89_ACMA][1][96] = 127, -+ [0][1][2][1][RTW89_ACMA][0][96] = 127, -+ [0][1][2][1][RTW89_CHILE][1][96] = -2, -+ [0][1][2][1][RTW89_QATAR][1][96] = 127, -+ [0][1][2][1][RTW89_QATAR][0][96] = 127, -+ [0][1][2][1][RTW89_UK][1][96] = 127, -+ [0][1][2][1][RTW89_UK][0][96] = 127, -+ [0][1][2][1][RTW89_FCC][1][98] = -2, -+ [0][1][2][1][RTW89_FCC][2][98] = 127, -+ [0][1][2][1][RTW89_ETSI][1][98] = 127, -+ [0][1][2][1][RTW89_ETSI][0][98] = 127, -+ [0][1][2][1][RTW89_MKK][1][98] = 127, -+ [0][1][2][1][RTW89_MKK][0][98] = 127, -+ [0][1][2][1][RTW89_IC][1][98] = -2, -+ [0][1][2][1][RTW89_KCC][1][98] = 20, -+ [0][1][2][1][RTW89_KCC][0][98] = 127, -+ [0][1][2][1][RTW89_ACMA][1][98] = 127, -+ [0][1][2][1][RTW89_ACMA][0][98] = 127, -+ [0][1][2][1][RTW89_CHILE][1][98] = -2, -+ [0][1][2][1][RTW89_QATAR][1][98] = 127, -+ [0][1][2][1][RTW89_QATAR][0][98] = 127, -+ [0][1][2][1][RTW89_UK][1][98] = 127, -+ [0][1][2][1][RTW89_UK][0][98] = 127, -+ [0][1][2][1][RTW89_FCC][1][100] = -2, -+ [0][1][2][1][RTW89_FCC][2][100] = 127, -+ [0][1][2][1][RTW89_ETSI][1][100] = 127, -+ [0][1][2][1][RTW89_ETSI][0][100] = 127, -+ [0][1][2][1][RTW89_MKK][1][100] = 127, -+ [0][1][2][1][RTW89_MKK][0][100] = 127, -+ [0][1][2][1][RTW89_IC][1][100] = -2, -+ [0][1][2][1][RTW89_KCC][1][100] = 20, -+ [0][1][2][1][RTW89_KCC][0][100] = 127, -+ [0][1][2][1][RTW89_ACMA][1][100] = 127, -+ [0][1][2][1][RTW89_ACMA][0][100] = 127, -+ [0][1][2][1][RTW89_CHILE][1][100] = -2, -+ [0][1][2][1][RTW89_QATAR][1][100] = 127, -+ [0][1][2][1][RTW89_QATAR][0][100] = 127, -+ [0][1][2][1][RTW89_UK][1][100] = 127, -+ [0][1][2][1][RTW89_UK][0][100] = 127, -+ [0][1][2][1][RTW89_FCC][1][102] = -2, -+ [0][1][2][1][RTW89_FCC][2][102] = 127, -+ [0][1][2][1][RTW89_ETSI][1][102] = 127, -+ [0][1][2][1][RTW89_ETSI][0][102] = 127, -+ [0][1][2][1][RTW89_MKK][1][102] = 127, -+ [0][1][2][1][RTW89_MKK][0][102] = 127, -+ [0][1][2][1][RTW89_IC][1][102] = -2, -+ [0][1][2][1][RTW89_KCC][1][102] = 20, -+ [0][1][2][1][RTW89_KCC][0][102] = 127, -+ [0][1][2][1][RTW89_ACMA][1][102] = 127, -+ [0][1][2][1][RTW89_ACMA][0][102] = 127, -+ [0][1][2][1][RTW89_CHILE][1][102] = -2, -+ [0][1][2][1][RTW89_QATAR][1][102] = 127, -+ [0][1][2][1][RTW89_QATAR][0][102] = 127, -+ [0][1][2][1][RTW89_UK][1][102] = 127, -+ [0][1][2][1][RTW89_UK][0][102] = 127, -+ [0][1][2][1][RTW89_FCC][1][104] = -2, -+ [0][1][2][1][RTW89_FCC][2][104] = 127, -+ [0][1][2][1][RTW89_ETSI][1][104] = 127, -+ [0][1][2][1][RTW89_ETSI][0][104] = 127, -+ [0][1][2][1][RTW89_MKK][1][104] = 127, -+ [0][1][2][1][RTW89_MKK][0][104] = 127, -+ [0][1][2][1][RTW89_IC][1][104] = -2, -+ [0][1][2][1][RTW89_KCC][1][104] = 20, -+ [0][1][2][1][RTW89_KCC][0][104] = 127, -+ [0][1][2][1][RTW89_ACMA][1][104] = 127, -+ [0][1][2][1][RTW89_ACMA][0][104] = 127, -+ [0][1][2][1][RTW89_CHILE][1][104] = -2, -+ [0][1][2][1][RTW89_QATAR][1][104] = 127, -+ [0][1][2][1][RTW89_QATAR][0][104] = 127, -+ [0][1][2][1][RTW89_UK][1][104] = 127, -+ [0][1][2][1][RTW89_UK][0][104] = 127, -+ [0][1][2][1][RTW89_FCC][1][105] = -2, -+ [0][1][2][1][RTW89_FCC][2][105] = 127, -+ [0][1][2][1][RTW89_ETSI][1][105] = 127, -+ [0][1][2][1][RTW89_ETSI][0][105] = 127, -+ [0][1][2][1][RTW89_MKK][1][105] = 127, -+ [0][1][2][1][RTW89_MKK][0][105] = 127, -+ [0][1][2][1][RTW89_IC][1][105] = -2, -+ [0][1][2][1][RTW89_KCC][1][105] = 20, -+ [0][1][2][1][RTW89_KCC][0][105] = 127, -+ [0][1][2][1][RTW89_ACMA][1][105] = 127, -+ [0][1][2][1][RTW89_ACMA][0][105] = 127, -+ [0][1][2][1][RTW89_CHILE][1][105] = -2, -+ [0][1][2][1][RTW89_QATAR][1][105] = 127, -+ [0][1][2][1][RTW89_QATAR][0][105] = 127, -+ [0][1][2][1][RTW89_UK][1][105] = 127, -+ [0][1][2][1][RTW89_UK][0][105] = 127, -+ [0][1][2][1][RTW89_FCC][1][107] = 1, -+ [0][1][2][1][RTW89_FCC][2][107] = 127, -+ [0][1][2][1][RTW89_ETSI][1][107] = 127, -+ [0][1][2][1][RTW89_ETSI][0][107] = 127, -+ [0][1][2][1][RTW89_MKK][1][107] = 127, -+ [0][1][2][1][RTW89_MKK][0][107] = 127, -+ [0][1][2][1][RTW89_IC][1][107] = 1, -+ [0][1][2][1][RTW89_KCC][1][107] = 20, -+ [0][1][2][1][RTW89_KCC][0][107] = 127, -+ [0][1][2][1][RTW89_ACMA][1][107] = 127, -+ [0][1][2][1][RTW89_ACMA][0][107] = 127, -+ [0][1][2][1][RTW89_CHILE][1][107] = 1, -+ [0][1][2][1][RTW89_QATAR][1][107] = 127, -+ [0][1][2][1][RTW89_QATAR][0][107] = 127, -+ [0][1][2][1][RTW89_UK][1][107] = 127, -+ [0][1][2][1][RTW89_UK][0][107] = 127, -+ [0][1][2][1][RTW89_FCC][1][109] = 1, -+ [0][1][2][1][RTW89_FCC][2][109] = 127, -+ [0][1][2][1][RTW89_ETSI][1][109] = 127, -+ [0][1][2][1][RTW89_ETSI][0][109] = 127, -+ [0][1][2][1][RTW89_MKK][1][109] = 127, -+ [0][1][2][1][RTW89_MKK][0][109] = 127, -+ [0][1][2][1][RTW89_IC][1][109] = 1, -+ [0][1][2][1][RTW89_KCC][1][109] = 20, -+ [0][1][2][1][RTW89_KCC][0][109] = 127, -+ [0][1][2][1][RTW89_ACMA][1][109] = 127, -+ [0][1][2][1][RTW89_ACMA][0][109] = 127, -+ [0][1][2][1][RTW89_CHILE][1][109] = 1, -+ [0][1][2][1][RTW89_QATAR][1][109] = 127, -+ [0][1][2][1][RTW89_QATAR][0][109] = 127, -+ [0][1][2][1][RTW89_UK][1][109] = 127, -+ [0][1][2][1][RTW89_UK][0][109] = 127, -+ [0][1][2][1][RTW89_FCC][1][111] = 127, -+ [0][1][2][1][RTW89_FCC][2][111] = 127, -+ [0][1][2][1][RTW89_ETSI][1][111] = 127, -+ [0][1][2][1][RTW89_ETSI][0][111] = 127, -+ [0][1][2][1][RTW89_MKK][1][111] = 127, -+ [0][1][2][1][RTW89_MKK][0][111] = 127, -+ [0][1][2][1][RTW89_IC][1][111] = 127, -+ [0][1][2][1][RTW89_KCC][1][111] = 127, -+ [0][1][2][1][RTW89_KCC][0][111] = 127, -+ [0][1][2][1][RTW89_ACMA][1][111] = 127, -+ [0][1][2][1][RTW89_ACMA][0][111] = 127, -+ [0][1][2][1][RTW89_CHILE][1][111] = 127, -+ [0][1][2][1][RTW89_QATAR][1][111] = 127, -+ [0][1][2][1][RTW89_QATAR][0][111] = 127, -+ [0][1][2][1][RTW89_UK][1][111] = 127, -+ [0][1][2][1][RTW89_UK][0][111] = 127, -+ [0][1][2][1][RTW89_FCC][1][113] = 127, -+ [0][1][2][1][RTW89_FCC][2][113] = 127, -+ [0][1][2][1][RTW89_ETSI][1][113] = 127, -+ [0][1][2][1][RTW89_ETSI][0][113] = 127, -+ [0][1][2][1][RTW89_MKK][1][113] = 127, -+ [0][1][2][1][RTW89_MKK][0][113] = 127, -+ [0][1][2][1][RTW89_IC][1][113] = 127, -+ [0][1][2][1][RTW89_KCC][1][113] = 127, -+ [0][1][2][1][RTW89_KCC][0][113] = 127, -+ [0][1][2][1][RTW89_ACMA][1][113] = 127, -+ [0][1][2][1][RTW89_ACMA][0][113] = 127, -+ [0][1][2][1][RTW89_CHILE][1][113] = 127, -+ [0][1][2][1][RTW89_QATAR][1][113] = 127, -+ [0][1][2][1][RTW89_QATAR][0][113] = 127, -+ [0][1][2][1][RTW89_UK][1][113] = 127, -+ [0][1][2][1][RTW89_UK][0][113] = 127, -+ [0][1][2][1][RTW89_FCC][1][115] = 127, -+ [0][1][2][1][RTW89_FCC][2][115] = 127, -+ [0][1][2][1][RTW89_ETSI][1][115] = 127, -+ [0][1][2][1][RTW89_ETSI][0][115] = 127, -+ [0][1][2][1][RTW89_MKK][1][115] = 127, -+ [0][1][2][1][RTW89_MKK][0][115] = 127, -+ [0][1][2][1][RTW89_IC][1][115] = 127, -+ [0][1][2][1][RTW89_KCC][1][115] = 127, -+ [0][1][2][1][RTW89_KCC][0][115] = 127, -+ [0][1][2][1][RTW89_ACMA][1][115] = 127, -+ [0][1][2][1][RTW89_ACMA][0][115] = 127, -+ [0][1][2][1][RTW89_CHILE][1][115] = 127, -+ [0][1][2][1][RTW89_QATAR][1][115] = 127, -+ [0][1][2][1][RTW89_QATAR][0][115] = 127, -+ [0][1][2][1][RTW89_UK][1][115] = 127, -+ [0][1][2][1][RTW89_UK][0][115] = 127, -+ [0][1][2][1][RTW89_FCC][1][117] = 127, -+ [0][1][2][1][RTW89_FCC][2][117] = 127, -+ [0][1][2][1][RTW89_ETSI][1][117] = 127, -+ [0][1][2][1][RTW89_ETSI][0][117] = 127, -+ [0][1][2][1][RTW89_MKK][1][117] = 127, -+ [0][1][2][1][RTW89_MKK][0][117] = 127, -+ [0][1][2][1][RTW89_IC][1][117] = 127, -+ [0][1][2][1][RTW89_KCC][1][117] = 127, -+ [0][1][2][1][RTW89_KCC][0][117] = 127, -+ [0][1][2][1][RTW89_ACMA][1][117] = 127, -+ [0][1][2][1][RTW89_ACMA][0][117] = 127, -+ [0][1][2][1][RTW89_CHILE][1][117] = 127, -+ [0][1][2][1][RTW89_QATAR][1][117] = 127, -+ [0][1][2][1][RTW89_QATAR][0][117] = 127, -+ [0][1][2][1][RTW89_UK][1][117] = 127, -+ [0][1][2][1][RTW89_UK][0][117] = 127, -+ [0][1][2][1][RTW89_FCC][1][119] = 127, -+ [0][1][2][1][RTW89_FCC][2][119] = 127, -+ [0][1][2][1][RTW89_ETSI][1][119] = 127, -+ [0][1][2][1][RTW89_ETSI][0][119] = 127, -+ [0][1][2][1][RTW89_MKK][1][119] = 127, -+ [0][1][2][1][RTW89_MKK][0][119] = 127, -+ [0][1][2][1][RTW89_IC][1][119] = 127, -+ [0][1][2][1][RTW89_KCC][1][119] = 127, -+ [0][1][2][1][RTW89_KCC][0][119] = 127, -+ [0][1][2][1][RTW89_ACMA][1][119] = 127, -+ [0][1][2][1][RTW89_ACMA][0][119] = 127, -+ [0][1][2][1][RTW89_CHILE][1][119] = 127, -+ [0][1][2][1][RTW89_QATAR][1][119] = 127, -+ [0][1][2][1][RTW89_QATAR][0][119] = 127, -+ [0][1][2][1][RTW89_UK][1][119] = 127, -+ [0][1][2][1][RTW89_UK][0][119] = 127, -+ [1][0][2][0][RTW89_FCC][1][1] = 34, -+ [1][0][2][0][RTW89_FCC][2][1] = 70, -+ [1][0][2][0][RTW89_ETSI][1][1] = 66, -+ [1][0][2][0][RTW89_ETSI][0][1] = 30, -+ [1][0][2][0][RTW89_MKK][1][1] = 62, -+ [1][0][2][0][RTW89_MKK][0][1] = 26, -+ [1][0][2][0][RTW89_IC][1][1] = 34, -+ [1][0][2][0][RTW89_KCC][1][1] = 40, -+ [1][0][2][0][RTW89_KCC][0][1] = 24, -+ [1][0][2][0][RTW89_ACMA][1][1] = 66, -+ [1][0][2][0][RTW89_ACMA][0][1] = 30, -+ [1][0][2][0][RTW89_CHILE][1][1] = 34, -+ [1][0][2][0][RTW89_QATAR][1][1] = 66, -+ [1][0][2][0][RTW89_QATAR][0][1] = 30, -+ [1][0][2][0][RTW89_UK][1][1] = 66, -+ [1][0][2][0][RTW89_UK][0][1] = 30, -+ [1][0][2][0][RTW89_FCC][1][5] = 34, -+ [1][0][2][0][RTW89_FCC][2][5] = 70, -+ [1][0][2][0][RTW89_ETSI][1][5] = 66, -+ [1][0][2][0][RTW89_ETSI][0][5] = 30, -+ [1][0][2][0][RTW89_MKK][1][5] = 62, -+ [1][0][2][0][RTW89_MKK][0][5] = 26, -+ [1][0][2][0][RTW89_IC][1][5] = 34, -+ [1][0][2][0][RTW89_KCC][1][5] = 40, -+ [1][0][2][0][RTW89_KCC][0][5] = 24, -+ [1][0][2][0][RTW89_ACMA][1][5] = 66, -+ [1][0][2][0][RTW89_ACMA][0][5] = 30, -+ [1][0][2][0][RTW89_CHILE][1][5] = 34, -+ [1][0][2][0][RTW89_QATAR][1][5] = 66, -+ [1][0][2][0][RTW89_QATAR][0][5] = 30, -+ [1][0][2][0][RTW89_UK][1][5] = 66, -+ [1][0][2][0][RTW89_UK][0][5] = 30, -+ [1][0][2][0][RTW89_FCC][1][9] = 34, -+ [1][0][2][0][RTW89_FCC][2][9] = 70, -+ [1][0][2][0][RTW89_ETSI][1][9] = 66, -+ [1][0][2][0][RTW89_ETSI][0][9] = 30, -+ [1][0][2][0][RTW89_MKK][1][9] = 62, -+ [1][0][2][0][RTW89_MKK][0][9] = 26, -+ [1][0][2][0][RTW89_IC][1][9] = 34, -+ [1][0][2][0][RTW89_KCC][1][9] = 40, -+ [1][0][2][0][RTW89_KCC][0][9] = 24, -+ [1][0][2][0][RTW89_ACMA][1][9] = 66, -+ [1][0][2][0][RTW89_ACMA][0][9] = 30, -+ [1][0][2][0][RTW89_CHILE][1][9] = 34, -+ [1][0][2][0][RTW89_QATAR][1][9] = 66, -+ [1][0][2][0][RTW89_QATAR][0][9] = 30, -+ [1][0][2][0][RTW89_UK][1][9] = 66, -+ [1][0][2][0][RTW89_UK][0][9] = 30, -+ [1][0][2][0][RTW89_FCC][1][13] = 34, -+ [1][0][2][0][RTW89_FCC][2][13] = 70, -+ [1][0][2][0][RTW89_ETSI][1][13] = 66, -+ [1][0][2][0][RTW89_ETSI][0][13] = 30, -+ [1][0][2][0][RTW89_MKK][1][13] = 62, -+ [1][0][2][0][RTW89_MKK][0][13] = 26, -+ [1][0][2][0][RTW89_IC][1][13] = 34, -+ [1][0][2][0][RTW89_KCC][1][13] = 40, -+ [1][0][2][0][RTW89_KCC][0][13] = 24, -+ [1][0][2][0][RTW89_ACMA][1][13] = 66, -+ [1][0][2][0][RTW89_ACMA][0][13] = 30, -+ [1][0][2][0][RTW89_CHILE][1][13] = 34, -+ [1][0][2][0][RTW89_QATAR][1][13] = 66, -+ [1][0][2][0][RTW89_QATAR][0][13] = 30, -+ [1][0][2][0][RTW89_UK][1][13] = 66, -+ [1][0][2][0][RTW89_UK][0][13] = 30, -+ [1][0][2][0][RTW89_FCC][1][16] = 34, -+ [1][0][2][0][RTW89_FCC][2][16] = 70, -+ [1][0][2][0][RTW89_ETSI][1][16] = 66, -+ [1][0][2][0][RTW89_ETSI][0][16] = 30, -+ [1][0][2][0][RTW89_MKK][1][16] = 62, -+ [1][0][2][0][RTW89_MKK][0][16] = 26, -+ [1][0][2][0][RTW89_IC][1][16] = 34, -+ [1][0][2][0][RTW89_KCC][1][16] = 40, -+ [1][0][2][0][RTW89_KCC][0][16] = 24, -+ [1][0][2][0][RTW89_ACMA][1][16] = 66, -+ [1][0][2][0][RTW89_ACMA][0][16] = 30, -+ [1][0][2][0][RTW89_CHILE][1][16] = 34, -+ [1][0][2][0][RTW89_QATAR][1][16] = 66, -+ [1][0][2][0][RTW89_QATAR][0][16] = 30, -+ [1][0][2][0][RTW89_UK][1][16] = 66, -+ [1][0][2][0][RTW89_UK][0][16] = 30, -+ [1][0][2][0][RTW89_FCC][1][20] = 34, -+ [1][0][2][0][RTW89_FCC][2][20] = 70, -+ [1][0][2][0][RTW89_ETSI][1][20] = 66, -+ [1][0][2][0][RTW89_ETSI][0][20] = 30, -+ [1][0][2][0][RTW89_MKK][1][20] = 62, -+ [1][0][2][0][RTW89_MKK][0][20] = 26, -+ [1][0][2][0][RTW89_IC][1][20] = 34, -+ [1][0][2][0][RTW89_KCC][1][20] = 40, -+ [1][0][2][0][RTW89_KCC][0][20] = 24, -+ [1][0][2][0][RTW89_ACMA][1][20] = 66, -+ [1][0][2][0][RTW89_ACMA][0][20] = 30, -+ [1][0][2][0][RTW89_CHILE][1][20] = 34, -+ [1][0][2][0][RTW89_QATAR][1][20] = 66, -+ [1][0][2][0][RTW89_QATAR][0][20] = 30, -+ [1][0][2][0][RTW89_UK][1][20] = 66, -+ [1][0][2][0][RTW89_UK][0][20] = 30, -+ [1][0][2][0][RTW89_FCC][1][24] = 36, -+ [1][0][2][0][RTW89_FCC][2][24] = 70, -+ [1][0][2][0][RTW89_ETSI][1][24] = 66, -+ [1][0][2][0][RTW89_ETSI][0][24] = 30, -+ [1][0][2][0][RTW89_MKK][1][24] = 64, -+ [1][0][2][0][RTW89_MKK][0][24] = 28, -+ [1][0][2][0][RTW89_IC][1][24] = 36, -+ [1][0][2][0][RTW89_KCC][1][24] = 40, -+ [1][0][2][0][RTW89_KCC][0][24] = 26, -+ [1][0][2][0][RTW89_ACMA][1][24] = 66, -+ [1][0][2][0][RTW89_ACMA][0][24] = 30, -+ [1][0][2][0][RTW89_CHILE][1][24] = 36, -+ [1][0][2][0][RTW89_QATAR][1][24] = 66, -+ [1][0][2][0][RTW89_QATAR][0][24] = 30, -+ [1][0][2][0][RTW89_UK][1][24] = 66, -+ [1][0][2][0][RTW89_UK][0][24] = 30, -+ [1][0][2][0][RTW89_FCC][1][28] = 34, -+ [1][0][2][0][RTW89_FCC][2][28] = 70, -+ [1][0][2][0][RTW89_ETSI][1][28] = 66, -+ [1][0][2][0][RTW89_ETSI][0][28] = 30, -+ [1][0][2][0][RTW89_MKK][1][28] = 64, -+ [1][0][2][0][RTW89_MKK][0][28] = 26, -+ [1][0][2][0][RTW89_IC][1][28] = 34, -+ [1][0][2][0][RTW89_KCC][1][28] = 40, -+ [1][0][2][0][RTW89_KCC][0][28] = 26, -+ [1][0][2][0][RTW89_ACMA][1][28] = 66, -+ [1][0][2][0][RTW89_ACMA][0][28] = 30, -+ [1][0][2][0][RTW89_CHILE][1][28] = 34, -+ [1][0][2][0][RTW89_QATAR][1][28] = 66, -+ [1][0][2][0][RTW89_QATAR][0][28] = 30, -+ [1][0][2][0][RTW89_UK][1][28] = 66, -+ [1][0][2][0][RTW89_UK][0][28] = 30, -+ [1][0][2][0][RTW89_FCC][1][31] = 34, -+ [1][0][2][0][RTW89_FCC][2][31] = 70, -+ [1][0][2][0][RTW89_ETSI][1][31] = 66, -+ [1][0][2][0][RTW89_ETSI][0][31] = 30, -+ [1][0][2][0][RTW89_MKK][1][31] = 64, -+ [1][0][2][0][RTW89_MKK][0][31] = 26, -+ [1][0][2][0][RTW89_IC][1][31] = 34, -+ [1][0][2][0][RTW89_KCC][1][31] = 40, -+ [1][0][2][0][RTW89_KCC][0][31] = 26, -+ [1][0][2][0][RTW89_ACMA][1][31] = 66, -+ [1][0][2][0][RTW89_ACMA][0][31] = 30, -+ [1][0][2][0][RTW89_CHILE][1][31] = 34, -+ [1][0][2][0][RTW89_QATAR][1][31] = 66, -+ [1][0][2][0][RTW89_QATAR][0][31] = 30, -+ [1][0][2][0][RTW89_UK][1][31] = 66, -+ [1][0][2][0][RTW89_UK][0][31] = 30, -+ [1][0][2][0][RTW89_FCC][1][35] = 34, -+ [1][0][2][0][RTW89_FCC][2][35] = 70, -+ [1][0][2][0][RTW89_ETSI][1][35] = 66, -+ [1][0][2][0][RTW89_ETSI][0][35] = 30, -+ [1][0][2][0][RTW89_MKK][1][35] = 64, -+ [1][0][2][0][RTW89_MKK][0][35] = 26, -+ [1][0][2][0][RTW89_IC][1][35] = 34, -+ [1][0][2][0][RTW89_KCC][1][35] = 40, -+ [1][0][2][0][RTW89_KCC][0][35] = 26, -+ [1][0][2][0][RTW89_ACMA][1][35] = 66, -+ [1][0][2][0][RTW89_ACMA][0][35] = 30, -+ [1][0][2][0][RTW89_CHILE][1][35] = 34, -+ [1][0][2][0][RTW89_QATAR][1][35] = 66, -+ [1][0][2][0][RTW89_QATAR][0][35] = 30, -+ [1][0][2][0][RTW89_UK][1][35] = 66, -+ [1][0][2][0][RTW89_UK][0][35] = 30, -+ [1][0][2][0][RTW89_FCC][1][39] = 34, -+ [1][0][2][0][RTW89_FCC][2][39] = 70, -+ [1][0][2][0][RTW89_ETSI][1][39] = 66, -+ [1][0][2][0][RTW89_ETSI][0][39] = 30, -+ [1][0][2][0][RTW89_MKK][1][39] = 64, -+ [1][0][2][0][RTW89_MKK][0][39] = 26, -+ [1][0][2][0][RTW89_IC][1][39] = 34, -+ [1][0][2][0][RTW89_KCC][1][39] = 40, -+ [1][0][2][0][RTW89_KCC][0][39] = 26, -+ [1][0][2][0][RTW89_ACMA][1][39] = 66, -+ [1][0][2][0][RTW89_ACMA][0][39] = 30, -+ [1][0][2][0][RTW89_CHILE][1][39] = 34, -+ [1][0][2][0][RTW89_QATAR][1][39] = 66, -+ [1][0][2][0][RTW89_QATAR][0][39] = 30, -+ [1][0][2][0][RTW89_UK][1][39] = 66, -+ [1][0][2][0][RTW89_UK][0][39] = 30, -+ [1][0][2][0][RTW89_FCC][1][43] = 34, -+ [1][0][2][0][RTW89_FCC][2][43] = 70, -+ [1][0][2][0][RTW89_ETSI][1][43] = 66, -+ [1][0][2][0][RTW89_ETSI][0][43] = 30, -+ [1][0][2][0][RTW89_MKK][1][43] = 64, -+ [1][0][2][0][RTW89_MKK][0][43] = 26, -+ [1][0][2][0][RTW89_IC][1][43] = 34, -+ [1][0][2][0][RTW89_KCC][1][43] = 40, -+ [1][0][2][0][RTW89_KCC][0][43] = 26, -+ [1][0][2][0][RTW89_ACMA][1][43] = 66, -+ [1][0][2][0][RTW89_ACMA][0][43] = 30, -+ [1][0][2][0][RTW89_CHILE][1][43] = 34, -+ [1][0][2][0][RTW89_QATAR][1][43] = 66, -+ [1][0][2][0][RTW89_QATAR][0][43] = 30, -+ [1][0][2][0][RTW89_UK][1][43] = 66, -+ [1][0][2][0][RTW89_UK][0][43] = 30, -+ [1][0][2][0][RTW89_FCC][1][46] = 34, -+ [1][0][2][0][RTW89_FCC][2][46] = 127, -+ [1][0][2][0][RTW89_ETSI][1][46] = 127, -+ [1][0][2][0][RTW89_ETSI][0][46] = 127, -+ [1][0][2][0][RTW89_MKK][1][46] = 127, -+ [1][0][2][0][RTW89_MKK][0][46] = 127, -+ [1][0][2][0][RTW89_IC][1][46] = 34, -+ [1][0][2][0][RTW89_KCC][1][46] = 40, -+ [1][0][2][0][RTW89_KCC][0][46] = 127, -+ [1][0][2][0][RTW89_ACMA][1][46] = 127, -+ [1][0][2][0][RTW89_ACMA][0][46] = 127, -+ [1][0][2][0][RTW89_CHILE][1][46] = 34, -+ [1][0][2][0][RTW89_QATAR][1][46] = 127, -+ [1][0][2][0][RTW89_QATAR][0][46] = 127, -+ [1][0][2][0][RTW89_UK][1][46] = 127, -+ [1][0][2][0][RTW89_UK][0][46] = 127, -+ [1][0][2][0][RTW89_FCC][1][50] = 34, -+ [1][0][2][0][RTW89_FCC][2][50] = 127, -+ [1][0][2][0][RTW89_ETSI][1][50] = 127, -+ [1][0][2][0][RTW89_ETSI][0][50] = 127, -+ [1][0][2][0][RTW89_MKK][1][50] = 127, -+ [1][0][2][0][RTW89_MKK][0][50] = 127, -+ [1][0][2][0][RTW89_IC][1][50] = 34, -+ [1][0][2][0][RTW89_KCC][1][50] = 40, -+ [1][0][2][0][RTW89_KCC][0][50] = 127, -+ [1][0][2][0][RTW89_ACMA][1][50] = 127, -+ [1][0][2][0][RTW89_ACMA][0][50] = 127, -+ [1][0][2][0][RTW89_CHILE][1][50] = 34, -+ [1][0][2][0][RTW89_QATAR][1][50] = 127, -+ [1][0][2][0][RTW89_QATAR][0][50] = 127, -+ [1][0][2][0][RTW89_UK][1][50] = 127, -+ [1][0][2][0][RTW89_UK][0][50] = 127, -+ [1][0][2][0][RTW89_FCC][1][54] = 36, -+ [1][0][2][0][RTW89_FCC][2][54] = 127, -+ [1][0][2][0][RTW89_ETSI][1][54] = 127, -+ [1][0][2][0][RTW89_ETSI][0][54] = 127, -+ [1][0][2][0][RTW89_MKK][1][54] = 127, -+ [1][0][2][0][RTW89_MKK][0][54] = 127, -+ [1][0][2][0][RTW89_IC][1][54] = 36, -+ [1][0][2][0][RTW89_KCC][1][54] = 40, -+ [1][0][2][0][RTW89_KCC][0][54] = 127, -+ [1][0][2][0][RTW89_ACMA][1][54] = 127, -+ [1][0][2][0][RTW89_ACMA][0][54] = 127, -+ [1][0][2][0][RTW89_CHILE][1][54] = 36, -+ [1][0][2][0][RTW89_QATAR][1][54] = 127, -+ [1][0][2][0][RTW89_QATAR][0][54] = 127, -+ [1][0][2][0][RTW89_UK][1][54] = 127, -+ [1][0][2][0][RTW89_UK][0][54] = 127, -+ [1][0][2][0][RTW89_FCC][1][58] = 36, -+ [1][0][2][0][RTW89_FCC][2][58] = 66, -+ [1][0][2][0][RTW89_ETSI][1][58] = 127, -+ [1][0][2][0][RTW89_ETSI][0][58] = 127, -+ [1][0][2][0][RTW89_MKK][1][58] = 127, -+ [1][0][2][0][RTW89_MKK][0][58] = 127, -+ [1][0][2][0][RTW89_IC][1][58] = 36, -+ [1][0][2][0][RTW89_KCC][1][58] = 40, -+ [1][0][2][0][RTW89_KCC][0][58] = 127, -+ [1][0][2][0][RTW89_ACMA][1][58] = 127, -+ [1][0][2][0][RTW89_ACMA][0][58] = 127, -+ [1][0][2][0][RTW89_CHILE][1][58] = 36, -+ [1][0][2][0][RTW89_QATAR][1][58] = 127, -+ [1][0][2][0][RTW89_QATAR][0][58] = 127, -+ [1][0][2][0][RTW89_UK][1][58] = 127, -+ [1][0][2][0][RTW89_UK][0][58] = 127, -+ [1][0][2][0][RTW89_FCC][1][61] = 34, -+ [1][0][2][0][RTW89_FCC][2][61] = 66, -+ [1][0][2][0][RTW89_ETSI][1][61] = 127, -+ [1][0][2][0][RTW89_ETSI][0][61] = 127, -+ [1][0][2][0][RTW89_MKK][1][61] = 127, -+ [1][0][2][0][RTW89_MKK][0][61] = 127, -+ [1][0][2][0][RTW89_IC][1][61] = 34, -+ [1][0][2][0][RTW89_KCC][1][61] = 40, -+ [1][0][2][0][RTW89_KCC][0][61] = 127, -+ [1][0][2][0][RTW89_ACMA][1][61] = 127, -+ [1][0][2][0][RTW89_ACMA][0][61] = 127, -+ [1][0][2][0][RTW89_CHILE][1][61] = 34, -+ [1][0][2][0][RTW89_QATAR][1][61] = 127, -+ [1][0][2][0][RTW89_QATAR][0][61] = 127, -+ [1][0][2][0][RTW89_UK][1][61] = 127, -+ [1][0][2][0][RTW89_UK][0][61] = 127, -+ [1][0][2][0][RTW89_FCC][1][65] = 34, -+ [1][0][2][0][RTW89_FCC][2][65] = 66, -+ [1][0][2][0][RTW89_ETSI][1][65] = 127, -+ [1][0][2][0][RTW89_ETSI][0][65] = 127, -+ [1][0][2][0][RTW89_MKK][1][65] = 127, -+ [1][0][2][0][RTW89_MKK][0][65] = 127, -+ [1][0][2][0][RTW89_IC][1][65] = 34, -+ [1][0][2][0][RTW89_KCC][1][65] = 40, -+ [1][0][2][0][RTW89_KCC][0][65] = 127, -+ [1][0][2][0][RTW89_ACMA][1][65] = 127, -+ [1][0][2][0][RTW89_ACMA][0][65] = 127, -+ [1][0][2][0][RTW89_CHILE][1][65] = 34, -+ [1][0][2][0][RTW89_QATAR][1][65] = 127, -+ [1][0][2][0][RTW89_QATAR][0][65] = 127, -+ [1][0][2][0][RTW89_UK][1][65] = 127, -+ [1][0][2][0][RTW89_UK][0][65] = 127, -+ [1][0][2][0][RTW89_FCC][1][69] = 34, -+ [1][0][2][0][RTW89_FCC][2][69] = 66, -+ [1][0][2][0][RTW89_ETSI][1][69] = 127, -+ [1][0][2][0][RTW89_ETSI][0][69] = 127, -+ [1][0][2][0][RTW89_MKK][1][69] = 127, -+ [1][0][2][0][RTW89_MKK][0][69] = 127, -+ [1][0][2][0][RTW89_IC][1][69] = 34, -+ [1][0][2][0][RTW89_KCC][1][69] = 40, -+ [1][0][2][0][RTW89_KCC][0][69] = 127, -+ [1][0][2][0][RTW89_ACMA][1][69] = 127, -+ [1][0][2][0][RTW89_ACMA][0][69] = 127, -+ [1][0][2][0][RTW89_CHILE][1][69] = 34, -+ [1][0][2][0][RTW89_QATAR][1][69] = 127, -+ [1][0][2][0][RTW89_QATAR][0][69] = 127, -+ [1][0][2][0][RTW89_UK][1][69] = 127, -+ [1][0][2][0][RTW89_UK][0][69] = 127, -+ [1][0][2][0][RTW89_FCC][1][73] = 34, -+ [1][0][2][0][RTW89_FCC][2][73] = 66, -+ [1][0][2][0][RTW89_ETSI][1][73] = 127, -+ [1][0][2][0][RTW89_ETSI][0][73] = 127, -+ [1][0][2][0][RTW89_MKK][1][73] = 127, -+ [1][0][2][0][RTW89_MKK][0][73] = 127, -+ [1][0][2][0][RTW89_IC][1][73] = 34, -+ [1][0][2][0][RTW89_KCC][1][73] = 40, -+ [1][0][2][0][RTW89_KCC][0][73] = 127, -+ [1][0][2][0][RTW89_ACMA][1][73] = 127, -+ [1][0][2][0][RTW89_ACMA][0][73] = 127, -+ [1][0][2][0][RTW89_CHILE][1][73] = 34, -+ [1][0][2][0][RTW89_QATAR][1][73] = 127, -+ [1][0][2][0][RTW89_QATAR][0][73] = 127, -+ [1][0][2][0][RTW89_UK][1][73] = 127, -+ [1][0][2][0][RTW89_UK][0][73] = 127, -+ [1][0][2][0][RTW89_FCC][1][76] = 34, -+ [1][0][2][0][RTW89_FCC][2][76] = 66, -+ [1][0][2][0][RTW89_ETSI][1][76] = 127, -+ [1][0][2][0][RTW89_ETSI][0][76] = 127, -+ [1][0][2][0][RTW89_MKK][1][76] = 127, -+ [1][0][2][0][RTW89_MKK][0][76] = 127, -+ [1][0][2][0][RTW89_IC][1][76] = 34, -+ [1][0][2][0][RTW89_KCC][1][76] = 40, -+ [1][0][2][0][RTW89_KCC][0][76] = 127, -+ [1][0][2][0][RTW89_ACMA][1][76] = 127, -+ [1][0][2][0][RTW89_ACMA][0][76] = 127, -+ [1][0][2][0][RTW89_CHILE][1][76] = 34, -+ [1][0][2][0][RTW89_QATAR][1][76] = 127, -+ [1][0][2][0][RTW89_QATAR][0][76] = 127, -+ [1][0][2][0][RTW89_UK][1][76] = 127, -+ [1][0][2][0][RTW89_UK][0][76] = 127, -+ [1][0][2][0][RTW89_FCC][1][80] = 34, -+ [1][0][2][0][RTW89_FCC][2][80] = 66, -+ [1][0][2][0][RTW89_ETSI][1][80] = 127, -+ [1][0][2][0][RTW89_ETSI][0][80] = 127, -+ [1][0][2][0][RTW89_MKK][1][80] = 127, -+ [1][0][2][0][RTW89_MKK][0][80] = 127, -+ [1][0][2][0][RTW89_IC][1][80] = 34, -+ [1][0][2][0][RTW89_KCC][1][80] = 42, -+ [1][0][2][0][RTW89_KCC][0][80] = 127, -+ [1][0][2][0][RTW89_ACMA][1][80] = 127, -+ [1][0][2][0][RTW89_ACMA][0][80] = 127, -+ [1][0][2][0][RTW89_CHILE][1][80] = 34, -+ [1][0][2][0][RTW89_QATAR][1][80] = 127, -+ [1][0][2][0][RTW89_QATAR][0][80] = 127, -+ [1][0][2][0][RTW89_UK][1][80] = 127, -+ [1][0][2][0][RTW89_UK][0][80] = 127, -+ [1][0][2][0][RTW89_FCC][1][84] = 34, -+ [1][0][2][0][RTW89_FCC][2][84] = 66, -+ [1][0][2][0][RTW89_ETSI][1][84] = 127, -+ [1][0][2][0][RTW89_ETSI][0][84] = 127, -+ [1][0][2][0][RTW89_MKK][1][84] = 127, -+ [1][0][2][0][RTW89_MKK][0][84] = 127, -+ [1][0][2][0][RTW89_IC][1][84] = 34, -+ [1][0][2][0][RTW89_KCC][1][84] = 42, -+ [1][0][2][0][RTW89_KCC][0][84] = 127, -+ [1][0][2][0][RTW89_ACMA][1][84] = 127, -+ [1][0][2][0][RTW89_ACMA][0][84] = 127, -+ [1][0][2][0][RTW89_CHILE][1][84] = 34, -+ [1][0][2][0][RTW89_QATAR][1][84] = 127, -+ [1][0][2][0][RTW89_QATAR][0][84] = 127, -+ [1][0][2][0][RTW89_UK][1][84] = 127, -+ [1][0][2][0][RTW89_UK][0][84] = 127, -+ [1][0][2][0][RTW89_FCC][1][88] = 34, -+ [1][0][2][0][RTW89_FCC][2][88] = 127, -+ [1][0][2][0][RTW89_ETSI][1][88] = 127, -+ [1][0][2][0][RTW89_ETSI][0][88] = 127, -+ [1][0][2][0][RTW89_MKK][1][88] = 127, -+ [1][0][2][0][RTW89_MKK][0][88] = 127, -+ [1][0][2][0][RTW89_IC][1][88] = 34, -+ [1][0][2][0][RTW89_KCC][1][88] = 42, -+ [1][0][2][0][RTW89_KCC][0][88] = 127, -+ [1][0][2][0][RTW89_ACMA][1][88] = 127, -+ [1][0][2][0][RTW89_ACMA][0][88] = 127, -+ [1][0][2][0][RTW89_CHILE][1][88] = 34, -+ [1][0][2][0][RTW89_QATAR][1][88] = 127, -+ [1][0][2][0][RTW89_QATAR][0][88] = 127, -+ [1][0][2][0][RTW89_UK][1][88] = 127, -+ [1][0][2][0][RTW89_UK][0][88] = 127, -+ [1][0][2][0][RTW89_FCC][1][91] = 36, -+ [1][0][2][0][RTW89_FCC][2][91] = 127, -+ [1][0][2][0][RTW89_ETSI][1][91] = 127, -+ [1][0][2][0][RTW89_ETSI][0][91] = 127, -+ [1][0][2][0][RTW89_MKK][1][91] = 127, -+ [1][0][2][0][RTW89_MKK][0][91] = 127, -+ [1][0][2][0][RTW89_IC][1][91] = 36, -+ [1][0][2][0][RTW89_KCC][1][91] = 42, -+ [1][0][2][0][RTW89_KCC][0][91] = 127, -+ [1][0][2][0][RTW89_ACMA][1][91] = 127, -+ [1][0][2][0][RTW89_ACMA][0][91] = 127, -+ [1][0][2][0][RTW89_CHILE][1][91] = 36, -+ [1][0][2][0][RTW89_QATAR][1][91] = 127, -+ [1][0][2][0][RTW89_QATAR][0][91] = 127, -+ [1][0][2][0][RTW89_UK][1][91] = 127, -+ [1][0][2][0][RTW89_UK][0][91] = 127, -+ [1][0][2][0][RTW89_FCC][1][95] = 34, -+ [1][0][2][0][RTW89_FCC][2][95] = 127, -+ [1][0][2][0][RTW89_ETSI][1][95] = 127, -+ [1][0][2][0][RTW89_ETSI][0][95] = 127, -+ [1][0][2][0][RTW89_MKK][1][95] = 127, -+ [1][0][2][0][RTW89_MKK][0][95] = 127, -+ [1][0][2][0][RTW89_IC][1][95] = 34, -+ [1][0][2][0][RTW89_KCC][1][95] = 42, -+ [1][0][2][0][RTW89_KCC][0][95] = 127, -+ [1][0][2][0][RTW89_ACMA][1][95] = 127, -+ [1][0][2][0][RTW89_ACMA][0][95] = 127, -+ [1][0][2][0][RTW89_CHILE][1][95] = 34, -+ [1][0][2][0][RTW89_QATAR][1][95] = 127, -+ [1][0][2][0][RTW89_QATAR][0][95] = 127, -+ [1][0][2][0][RTW89_UK][1][95] = 127, -+ [1][0][2][0][RTW89_UK][0][95] = 127, -+ [1][0][2][0][RTW89_FCC][1][99] = 34, -+ [1][0][2][0][RTW89_FCC][2][99] = 127, -+ [1][0][2][0][RTW89_ETSI][1][99] = 127, -+ [1][0][2][0][RTW89_ETSI][0][99] = 127, -+ [1][0][2][0][RTW89_MKK][1][99] = 127, -+ [1][0][2][0][RTW89_MKK][0][99] = 127, -+ [1][0][2][0][RTW89_IC][1][99] = 34, -+ [1][0][2][0][RTW89_KCC][1][99] = 42, -+ [1][0][2][0][RTW89_KCC][0][99] = 127, -+ [1][0][2][0][RTW89_ACMA][1][99] = 127, -+ [1][0][2][0][RTW89_ACMA][0][99] = 127, -+ [1][0][2][0][RTW89_CHILE][1][99] = 34, -+ [1][0][2][0][RTW89_QATAR][1][99] = 127, -+ [1][0][2][0][RTW89_QATAR][0][99] = 127, -+ [1][0][2][0][RTW89_UK][1][99] = 127, -+ [1][0][2][0][RTW89_UK][0][99] = 127, -+ [1][0][2][0][RTW89_FCC][1][103] = 34, -+ [1][0][2][0][RTW89_FCC][2][103] = 127, -+ [1][0][2][0][RTW89_ETSI][1][103] = 127, -+ [1][0][2][0][RTW89_ETSI][0][103] = 127, -+ [1][0][2][0][RTW89_MKK][1][103] = 127, -+ [1][0][2][0][RTW89_MKK][0][103] = 127, -+ [1][0][2][0][RTW89_IC][1][103] = 34, -+ [1][0][2][0][RTW89_KCC][1][103] = 42, -+ [1][0][2][0][RTW89_KCC][0][103] = 127, -+ [1][0][2][0][RTW89_ACMA][1][103] = 127, -+ [1][0][2][0][RTW89_ACMA][0][103] = 127, -+ [1][0][2][0][RTW89_CHILE][1][103] = 34, -+ [1][0][2][0][RTW89_QATAR][1][103] = 127, -+ [1][0][2][0][RTW89_QATAR][0][103] = 127, -+ [1][0][2][0][RTW89_UK][1][103] = 127, -+ [1][0][2][0][RTW89_UK][0][103] = 127, -+ [1][0][2][0][RTW89_FCC][1][106] = 36, -+ [1][0][2][0][RTW89_FCC][2][106] = 127, -+ [1][0][2][0][RTW89_ETSI][1][106] = 127, -+ [1][0][2][0][RTW89_ETSI][0][106] = 127, -+ [1][0][2][0][RTW89_MKK][1][106] = 127, -+ [1][0][2][0][RTW89_MKK][0][106] = 127, -+ [1][0][2][0][RTW89_IC][1][106] = 36, -+ [1][0][2][0][RTW89_KCC][1][106] = 42, -+ [1][0][2][0][RTW89_KCC][0][106] = 127, -+ [1][0][2][0][RTW89_ACMA][1][106] = 127, -+ [1][0][2][0][RTW89_ACMA][0][106] = 127, -+ [1][0][2][0][RTW89_CHILE][1][106] = 36, -+ [1][0][2][0][RTW89_QATAR][1][106] = 127, -+ [1][0][2][0][RTW89_QATAR][0][106] = 127, -+ [1][0][2][0][RTW89_UK][1][106] = 127, -+ [1][0][2][0][RTW89_UK][0][106] = 127, -+ [1][0][2][0][RTW89_FCC][1][110] = 127, -+ [1][0][2][0][RTW89_FCC][2][110] = 127, -+ [1][0][2][0][RTW89_ETSI][1][110] = 127, -+ [1][0][2][0][RTW89_ETSI][0][110] = 127, -+ [1][0][2][0][RTW89_MKK][1][110] = 127, -+ [1][0][2][0][RTW89_MKK][0][110] = 127, -+ [1][0][2][0][RTW89_IC][1][110] = 127, -+ [1][0][2][0][RTW89_KCC][1][110] = 127, -+ [1][0][2][0][RTW89_KCC][0][110] = 127, -+ [1][0][2][0][RTW89_ACMA][1][110] = 127, -+ [1][0][2][0][RTW89_ACMA][0][110] = 127, -+ [1][0][2][0][RTW89_CHILE][1][110] = 127, -+ [1][0][2][0][RTW89_QATAR][1][110] = 127, -+ [1][0][2][0][RTW89_QATAR][0][110] = 127, -+ [1][0][2][0][RTW89_UK][1][110] = 127, -+ [1][0][2][0][RTW89_UK][0][110] = 127, -+ [1][0][2][0][RTW89_FCC][1][114] = 127, -+ [1][0][2][0][RTW89_FCC][2][114] = 127, -+ [1][0][2][0][RTW89_ETSI][1][114] = 127, -+ [1][0][2][0][RTW89_ETSI][0][114] = 127, -+ [1][0][2][0][RTW89_MKK][1][114] = 127, -+ [1][0][2][0][RTW89_MKK][0][114] = 127, -+ [1][0][2][0][RTW89_IC][1][114] = 127, -+ [1][0][2][0][RTW89_KCC][1][114] = 127, -+ [1][0][2][0][RTW89_KCC][0][114] = 127, -+ [1][0][2][0][RTW89_ACMA][1][114] = 127, -+ [1][0][2][0][RTW89_ACMA][0][114] = 127, -+ [1][0][2][0][RTW89_CHILE][1][114] = 127, -+ [1][0][2][0][RTW89_QATAR][1][114] = 127, -+ [1][0][2][0][RTW89_QATAR][0][114] = 127, -+ [1][0][2][0][RTW89_UK][1][114] = 127, -+ [1][0][2][0][RTW89_UK][0][114] = 127, -+ [1][0][2][0][RTW89_FCC][1][118] = 127, -+ [1][0][2][0][RTW89_FCC][2][118] = 127, -+ [1][0][2][0][RTW89_ETSI][1][118] = 127, -+ [1][0][2][0][RTW89_ETSI][0][118] = 127, -+ [1][0][2][0][RTW89_MKK][1][118] = 127, -+ [1][0][2][0][RTW89_MKK][0][118] = 127, -+ [1][0][2][0][RTW89_IC][1][118] = 127, -+ [1][0][2][0][RTW89_KCC][1][118] = 127, -+ [1][0][2][0][RTW89_KCC][0][118] = 127, -+ [1][0][2][0][RTW89_ACMA][1][118] = 127, -+ [1][0][2][0][RTW89_ACMA][0][118] = 127, -+ [1][0][2][0][RTW89_CHILE][1][118] = 127, -+ [1][0][2][0][RTW89_QATAR][1][118] = 127, -+ [1][0][2][0][RTW89_QATAR][0][118] = 127, -+ [1][0][2][0][RTW89_UK][1][118] = 127, -+ [1][0][2][0][RTW89_UK][0][118] = 127, -+ [1][1][2][0][RTW89_FCC][1][1] = 10, -+ [1][1][2][0][RTW89_FCC][2][1] = 58, -+ [1][1][2][0][RTW89_ETSI][1][1] = 54, -+ [1][1][2][0][RTW89_ETSI][0][1] = 18, -+ [1][1][2][0][RTW89_MKK][1][1] = 52, -+ [1][1][2][0][RTW89_MKK][0][1] = 12, -+ [1][1][2][0][RTW89_IC][1][1] = 10, -+ [1][1][2][0][RTW89_KCC][1][1] = 28, -+ [1][1][2][0][RTW89_KCC][0][1] = 12, -+ [1][1][2][0][RTW89_ACMA][1][1] = 54, -+ [1][1][2][0][RTW89_ACMA][0][1] = 18, -+ [1][1][2][0][RTW89_CHILE][1][1] = 10, -+ [1][1][2][0][RTW89_QATAR][1][1] = 54, -+ [1][1][2][0][RTW89_QATAR][0][1] = 18, -+ [1][1][2][0][RTW89_UK][1][1] = 54, -+ [1][1][2][0][RTW89_UK][0][1] = 18, -+ [1][1][2][0][RTW89_FCC][1][5] = 10, -+ [1][1][2][0][RTW89_FCC][2][5] = 58, -+ [1][1][2][0][RTW89_ETSI][1][5] = 54, -+ [1][1][2][0][RTW89_ETSI][0][5] = 16, -+ [1][1][2][0][RTW89_MKK][1][5] = 52, -+ [1][1][2][0][RTW89_MKK][0][5] = 12, -+ [1][1][2][0][RTW89_IC][1][5] = 10, -+ [1][1][2][0][RTW89_KCC][1][5] = 28, -+ [1][1][2][0][RTW89_KCC][0][5] = 12, -+ [1][1][2][0][RTW89_ACMA][1][5] = 54, -+ [1][1][2][0][RTW89_ACMA][0][5] = 16, -+ [1][1][2][0][RTW89_CHILE][1][5] = 10, -+ [1][1][2][0][RTW89_QATAR][1][5] = 54, -+ [1][1][2][0][RTW89_QATAR][0][5] = 16, -+ [1][1][2][0][RTW89_UK][1][5] = 54, -+ [1][1][2][0][RTW89_UK][0][5] = 16, -+ [1][1][2][0][RTW89_FCC][1][9] = 10, -+ [1][1][2][0][RTW89_FCC][2][9] = 58, -+ [1][1][2][0][RTW89_ETSI][1][9] = 54, -+ [1][1][2][0][RTW89_ETSI][0][9] = 16, -+ [1][1][2][0][RTW89_MKK][1][9] = 52, -+ [1][1][2][0][RTW89_MKK][0][9] = 12, -+ [1][1][2][0][RTW89_IC][1][9] = 10, -+ [1][1][2][0][RTW89_KCC][1][9] = 28, -+ [1][1][2][0][RTW89_KCC][0][9] = 12, -+ [1][1][2][0][RTW89_ACMA][1][9] = 54, -+ [1][1][2][0][RTW89_ACMA][0][9] = 16, -+ [1][1][2][0][RTW89_CHILE][1][9] = 10, -+ [1][1][2][0][RTW89_QATAR][1][9] = 54, -+ [1][1][2][0][RTW89_QATAR][0][9] = 16, -+ [1][1][2][0][RTW89_UK][1][9] = 54, -+ [1][1][2][0][RTW89_UK][0][9] = 16, -+ [1][1][2][0][RTW89_FCC][1][13] = 10, -+ [1][1][2][0][RTW89_FCC][2][13] = 58, -+ [1][1][2][0][RTW89_ETSI][1][13] = 54, -+ [1][1][2][0][RTW89_ETSI][0][13] = 16, -+ [1][1][2][0][RTW89_MKK][1][13] = 52, -+ [1][1][2][0][RTW89_MKK][0][13] = 12, -+ [1][1][2][0][RTW89_IC][1][13] = 10, -+ [1][1][2][0][RTW89_KCC][1][13] = 28, -+ [1][1][2][0][RTW89_KCC][0][13] = 12, -+ [1][1][2][0][RTW89_ACMA][1][13] = 54, -+ [1][1][2][0][RTW89_ACMA][0][13] = 16, -+ [1][1][2][0][RTW89_CHILE][1][13] = 10, -+ [1][1][2][0][RTW89_QATAR][1][13] = 54, -+ [1][1][2][0][RTW89_QATAR][0][13] = 16, -+ [1][1][2][0][RTW89_UK][1][13] = 54, -+ [1][1][2][0][RTW89_UK][0][13] = 16, -+ [1][1][2][0][RTW89_FCC][1][16] = 10, -+ [1][1][2][0][RTW89_FCC][2][16] = 58, -+ [1][1][2][0][RTW89_ETSI][1][16] = 54, -+ [1][1][2][0][RTW89_ETSI][0][16] = 16, -+ [1][1][2][0][RTW89_MKK][1][16] = 52, -+ [1][1][2][0][RTW89_MKK][0][16] = 12, -+ [1][1][2][0][RTW89_IC][1][16] = 10, -+ [1][1][2][0][RTW89_KCC][1][16] = 28, -+ [1][1][2][0][RTW89_KCC][0][16] = 12, -+ [1][1][2][0][RTW89_ACMA][1][16] = 54, -+ [1][1][2][0][RTW89_ACMA][0][16] = 16, -+ [1][1][2][0][RTW89_CHILE][1][16] = 10, -+ [1][1][2][0][RTW89_QATAR][1][16] = 54, -+ [1][1][2][0][RTW89_QATAR][0][16] = 16, -+ [1][1][2][0][RTW89_UK][1][16] = 54, -+ [1][1][2][0][RTW89_UK][0][16] = 16, -+ [1][1][2][0][RTW89_FCC][1][20] = 10, -+ [1][1][2][0][RTW89_FCC][2][20] = 58, -+ [1][1][2][0][RTW89_ETSI][1][20] = 54, -+ [1][1][2][0][RTW89_ETSI][0][20] = 16, -+ [1][1][2][0][RTW89_MKK][1][20] = 52, -+ [1][1][2][0][RTW89_MKK][0][20] = 12, -+ [1][1][2][0][RTW89_IC][1][20] = 10, -+ [1][1][2][0][RTW89_KCC][1][20] = 28, -+ [1][1][2][0][RTW89_KCC][0][20] = 12, -+ [1][1][2][0][RTW89_ACMA][1][20] = 54, -+ [1][1][2][0][RTW89_ACMA][0][20] = 16, -+ [1][1][2][0][RTW89_CHILE][1][20] = 10, -+ [1][1][2][0][RTW89_QATAR][1][20] = 54, -+ [1][1][2][0][RTW89_QATAR][0][20] = 16, -+ [1][1][2][0][RTW89_UK][1][20] = 54, -+ [1][1][2][0][RTW89_UK][0][20] = 16, -+ [1][1][2][0][RTW89_FCC][1][24] = 10, -+ [1][1][2][0][RTW89_FCC][2][24] = 70, -+ [1][1][2][0][RTW89_ETSI][1][24] = 54, -+ [1][1][2][0][RTW89_ETSI][0][24] = 16, -+ [1][1][2][0][RTW89_MKK][1][24] = 54, -+ [1][1][2][0][RTW89_MKK][0][24] = 14, -+ [1][1][2][0][RTW89_IC][1][24] = 10, -+ [1][1][2][0][RTW89_KCC][1][24] = 28, -+ [1][1][2][0][RTW89_KCC][0][24] = 12, -+ [1][1][2][0][RTW89_ACMA][1][24] = 54, -+ [1][1][2][0][RTW89_ACMA][0][24] = 16, -+ [1][1][2][0][RTW89_CHILE][1][24] = 10, -+ [1][1][2][0][RTW89_QATAR][1][24] = 54, -+ [1][1][2][0][RTW89_QATAR][0][24] = 16, -+ [1][1][2][0][RTW89_UK][1][24] = 54, -+ [1][1][2][0][RTW89_UK][0][24] = 16, -+ [1][1][2][0][RTW89_FCC][1][28] = 10, -+ [1][1][2][0][RTW89_FCC][2][28] = 70, -+ [1][1][2][0][RTW89_ETSI][1][28] = 54, -+ [1][1][2][0][RTW89_ETSI][0][28] = 16, -+ [1][1][2][0][RTW89_MKK][1][28] = 52, -+ [1][1][2][0][RTW89_MKK][0][28] = 14, -+ [1][1][2][0][RTW89_IC][1][28] = 10, -+ [1][1][2][0][RTW89_KCC][1][28] = 28, -+ [1][1][2][0][RTW89_KCC][0][28] = 14, -+ [1][1][2][0][RTW89_ACMA][1][28] = 54, -+ [1][1][2][0][RTW89_ACMA][0][28] = 16, -+ [1][1][2][0][RTW89_CHILE][1][28] = 10, -+ [1][1][2][0][RTW89_QATAR][1][28] = 54, -+ [1][1][2][0][RTW89_QATAR][0][28] = 16, -+ [1][1][2][0][RTW89_UK][1][28] = 54, -+ [1][1][2][0][RTW89_UK][0][28] = 16, -+ [1][1][2][0][RTW89_FCC][1][31] = 10, -+ [1][1][2][0][RTW89_FCC][2][31] = 70, -+ [1][1][2][0][RTW89_ETSI][1][31] = 54, -+ [1][1][2][0][RTW89_ETSI][0][31] = 16, -+ [1][1][2][0][RTW89_MKK][1][31] = 52, -+ [1][1][2][0][RTW89_MKK][0][31] = 14, -+ [1][1][2][0][RTW89_IC][1][31] = 10, -+ [1][1][2][0][RTW89_KCC][1][31] = 28, -+ [1][1][2][0][RTW89_KCC][0][31] = 14, -+ [1][1][2][0][RTW89_ACMA][1][31] = 54, -+ [1][1][2][0][RTW89_ACMA][0][31] = 16, -+ [1][1][2][0][RTW89_CHILE][1][31] = 10, -+ [1][1][2][0][RTW89_QATAR][1][31] = 54, -+ [1][1][2][0][RTW89_QATAR][0][31] = 16, -+ [1][1][2][0][RTW89_UK][1][31] = 54, -+ [1][1][2][0][RTW89_UK][0][31] = 16, -+ [1][1][2][0][RTW89_FCC][1][35] = 10, -+ [1][1][2][0][RTW89_FCC][2][35] = 70, -+ [1][1][2][0][RTW89_ETSI][1][35] = 54, -+ [1][1][2][0][RTW89_ETSI][0][35] = 16, -+ [1][1][2][0][RTW89_MKK][1][35] = 52, -+ [1][1][2][0][RTW89_MKK][0][35] = 14, -+ [1][1][2][0][RTW89_IC][1][35] = 10, -+ [1][1][2][0][RTW89_KCC][1][35] = 28, -+ [1][1][2][0][RTW89_KCC][0][35] = 14, -+ [1][1][2][0][RTW89_ACMA][1][35] = 54, -+ [1][1][2][0][RTW89_ACMA][0][35] = 16, -+ [1][1][2][0][RTW89_CHILE][1][35] = 10, -+ [1][1][2][0][RTW89_QATAR][1][35] = 54, -+ [1][1][2][0][RTW89_QATAR][0][35] = 16, -+ [1][1][2][0][RTW89_UK][1][35] = 54, -+ [1][1][2][0][RTW89_UK][0][35] = 16, -+ [1][1][2][0][RTW89_FCC][1][39] = 10, -+ [1][1][2][0][RTW89_FCC][2][39] = 70, -+ [1][1][2][0][RTW89_ETSI][1][39] = 54, -+ [1][1][2][0][RTW89_ETSI][0][39] = 16, -+ [1][1][2][0][RTW89_MKK][1][39] = 52, -+ [1][1][2][0][RTW89_MKK][0][39] = 14, -+ [1][1][2][0][RTW89_IC][1][39] = 10, -+ [1][1][2][0][RTW89_KCC][1][39] = 28, -+ [1][1][2][0][RTW89_KCC][0][39] = 14, -+ [1][1][2][0][RTW89_ACMA][1][39] = 54, -+ [1][1][2][0][RTW89_ACMA][0][39] = 16, -+ [1][1][2][0][RTW89_CHILE][1][39] = 10, -+ [1][1][2][0][RTW89_QATAR][1][39] = 54, -+ [1][1][2][0][RTW89_QATAR][0][39] = 16, -+ [1][1][2][0][RTW89_UK][1][39] = 54, -+ [1][1][2][0][RTW89_UK][0][39] = 16, -+ [1][1][2][0][RTW89_FCC][1][43] = 10, -+ [1][1][2][0][RTW89_FCC][2][43] = 70, -+ [1][1][2][0][RTW89_ETSI][1][43] = 54, -+ [1][1][2][0][RTW89_ETSI][0][43] = 16, -+ [1][1][2][0][RTW89_MKK][1][43] = 52, -+ [1][1][2][0][RTW89_MKK][0][43] = 14, -+ [1][1][2][0][RTW89_IC][1][43] = 10, -+ [1][1][2][0][RTW89_KCC][1][43] = 28, -+ [1][1][2][0][RTW89_KCC][0][43] = 14, -+ [1][1][2][0][RTW89_ACMA][1][43] = 54, -+ [1][1][2][0][RTW89_ACMA][0][43] = 16, -+ [1][1][2][0][RTW89_CHILE][1][43] = 10, -+ [1][1][2][0][RTW89_QATAR][1][43] = 54, -+ [1][1][2][0][RTW89_QATAR][0][43] = 16, -+ [1][1][2][0][RTW89_UK][1][43] = 54, -+ [1][1][2][0][RTW89_UK][0][43] = 16, -+ [1][1][2][0][RTW89_FCC][1][46] = 12, -+ [1][1][2][0][RTW89_FCC][2][46] = 127, -+ [1][1][2][0][RTW89_ETSI][1][46] = 127, -+ [1][1][2][0][RTW89_ETSI][0][46] = 127, -+ [1][1][2][0][RTW89_MKK][1][46] = 127, -+ [1][1][2][0][RTW89_MKK][0][46] = 127, -+ [1][1][2][0][RTW89_IC][1][46] = 12, -+ [1][1][2][0][RTW89_KCC][1][46] = 28, -+ [1][1][2][0][RTW89_KCC][0][46] = 127, -+ [1][1][2][0][RTW89_ACMA][1][46] = 127, -+ [1][1][2][0][RTW89_ACMA][0][46] = 127, -+ [1][1][2][0][RTW89_CHILE][1][46] = 12, -+ [1][1][2][0][RTW89_QATAR][1][46] = 127, -+ [1][1][2][0][RTW89_QATAR][0][46] = 127, -+ [1][1][2][0][RTW89_UK][1][46] = 127, -+ [1][1][2][0][RTW89_UK][0][46] = 127, -+ [1][1][2][0][RTW89_FCC][1][50] = 12, -+ [1][1][2][0][RTW89_FCC][2][50] = 127, -+ [1][1][2][0][RTW89_ETSI][1][50] = 127, -+ [1][1][2][0][RTW89_ETSI][0][50] = 127, -+ [1][1][2][0][RTW89_MKK][1][50] = 127, -+ [1][1][2][0][RTW89_MKK][0][50] = 127, -+ [1][1][2][0][RTW89_IC][1][50] = 12, -+ [1][1][2][0][RTW89_KCC][1][50] = 28, -+ [1][1][2][0][RTW89_KCC][0][50] = 127, -+ [1][1][2][0][RTW89_ACMA][1][50] = 127, -+ [1][1][2][0][RTW89_ACMA][0][50] = 127, -+ [1][1][2][0][RTW89_CHILE][1][50] = 12, -+ [1][1][2][0][RTW89_QATAR][1][50] = 127, -+ [1][1][2][0][RTW89_QATAR][0][50] = 127, -+ [1][1][2][0][RTW89_UK][1][50] = 127, -+ [1][1][2][0][RTW89_UK][0][50] = 127, -+ [1][1][2][0][RTW89_FCC][1][54] = 10, -+ [1][1][2][0][RTW89_FCC][2][54] = 127, -+ [1][1][2][0][RTW89_ETSI][1][54] = 127, -+ [1][1][2][0][RTW89_ETSI][0][54] = 127, -+ [1][1][2][0][RTW89_MKK][1][54] = 127, -+ [1][1][2][0][RTW89_MKK][0][54] = 127, -+ [1][1][2][0][RTW89_IC][1][54] = 10, -+ [1][1][2][0][RTW89_KCC][1][54] = 28, -+ [1][1][2][0][RTW89_KCC][0][54] = 127, -+ [1][1][2][0][RTW89_ACMA][1][54] = 127, -+ [1][1][2][0][RTW89_ACMA][0][54] = 127, -+ [1][1][2][0][RTW89_CHILE][1][54] = 10, -+ [1][1][2][0][RTW89_QATAR][1][54] = 127, -+ [1][1][2][0][RTW89_QATAR][0][54] = 127, -+ [1][1][2][0][RTW89_UK][1][54] = 127, -+ [1][1][2][0][RTW89_UK][0][54] = 127, -+ [1][1][2][0][RTW89_FCC][1][58] = 10, -+ [1][1][2][0][RTW89_FCC][2][58] = 66, -+ [1][1][2][0][RTW89_ETSI][1][58] = 127, -+ [1][1][2][0][RTW89_ETSI][0][58] = 127, -+ [1][1][2][0][RTW89_MKK][1][58] = 127, -+ [1][1][2][0][RTW89_MKK][0][58] = 127, -+ [1][1][2][0][RTW89_IC][1][58] = 10, -+ [1][1][2][0][RTW89_KCC][1][58] = 28, -+ [1][1][2][0][RTW89_KCC][0][58] = 127, -+ [1][1][2][0][RTW89_ACMA][1][58] = 127, -+ [1][1][2][0][RTW89_ACMA][0][58] = 127, -+ [1][1][2][0][RTW89_CHILE][1][58] = 10, -+ [1][1][2][0][RTW89_QATAR][1][58] = 127, -+ [1][1][2][0][RTW89_QATAR][0][58] = 127, -+ [1][1][2][0][RTW89_UK][1][58] = 127, -+ [1][1][2][0][RTW89_UK][0][58] = 127, -+ [1][1][2][0][RTW89_FCC][1][61] = 10, -+ [1][1][2][0][RTW89_FCC][2][61] = 66, -+ [1][1][2][0][RTW89_ETSI][1][61] = 127, -+ [1][1][2][0][RTW89_ETSI][0][61] = 127, -+ [1][1][2][0][RTW89_MKK][1][61] = 127, -+ [1][1][2][0][RTW89_MKK][0][61] = 127, -+ [1][1][2][0][RTW89_IC][1][61] = 10, -+ [1][1][2][0][RTW89_KCC][1][61] = 28, -+ [1][1][2][0][RTW89_KCC][0][61] = 127, -+ [1][1][2][0][RTW89_ACMA][1][61] = 127, -+ [1][1][2][0][RTW89_ACMA][0][61] = 127, -+ [1][1][2][0][RTW89_CHILE][1][61] = 10, -+ [1][1][2][0][RTW89_QATAR][1][61] = 127, -+ [1][1][2][0][RTW89_QATAR][0][61] = 127, -+ [1][1][2][0][RTW89_UK][1][61] = 127, -+ [1][1][2][0][RTW89_UK][0][61] = 127, -+ [1][1][2][0][RTW89_FCC][1][65] = 10, -+ [1][1][2][0][RTW89_FCC][2][65] = 66, -+ [1][1][2][0][RTW89_ETSI][1][65] = 127, -+ [1][1][2][0][RTW89_ETSI][0][65] = 127, -+ [1][1][2][0][RTW89_MKK][1][65] = 127, -+ [1][1][2][0][RTW89_MKK][0][65] = 127, -+ [1][1][2][0][RTW89_IC][1][65] = 10, -+ [1][1][2][0][RTW89_KCC][1][65] = 28, -+ [1][1][2][0][RTW89_KCC][0][65] = 127, -+ [1][1][2][0][RTW89_ACMA][1][65] = 127, -+ [1][1][2][0][RTW89_ACMA][0][65] = 127, -+ [1][1][2][0][RTW89_CHILE][1][65] = 10, -+ [1][1][2][0][RTW89_QATAR][1][65] = 127, -+ [1][1][2][0][RTW89_QATAR][0][65] = 127, -+ [1][1][2][0][RTW89_UK][1][65] = 127, -+ [1][1][2][0][RTW89_UK][0][65] = 127, -+ [1][1][2][0][RTW89_FCC][1][69] = 10, -+ [1][1][2][0][RTW89_FCC][2][69] = 66, -+ [1][1][2][0][RTW89_ETSI][1][69] = 127, -+ [1][1][2][0][RTW89_ETSI][0][69] = 127, -+ [1][1][2][0][RTW89_MKK][1][69] = 127, -+ [1][1][2][0][RTW89_MKK][0][69] = 127, -+ [1][1][2][0][RTW89_IC][1][69] = 10, -+ [1][1][2][0][RTW89_KCC][1][69] = 28, -+ [1][1][2][0][RTW89_KCC][0][69] = 127, -+ [1][1][2][0][RTW89_ACMA][1][69] = 127, -+ [1][1][2][0][RTW89_ACMA][0][69] = 127, -+ [1][1][2][0][RTW89_CHILE][1][69] = 10, -+ [1][1][2][0][RTW89_QATAR][1][69] = 127, -+ [1][1][2][0][RTW89_QATAR][0][69] = 127, -+ [1][1][2][0][RTW89_UK][1][69] = 127, -+ [1][1][2][0][RTW89_UK][0][69] = 127, -+ [1][1][2][0][RTW89_FCC][1][73] = 10, -+ [1][1][2][0][RTW89_FCC][2][73] = 66, -+ [1][1][2][0][RTW89_ETSI][1][73] = 127, -+ [1][1][2][0][RTW89_ETSI][0][73] = 127, -+ [1][1][2][0][RTW89_MKK][1][73] = 127, -+ [1][1][2][0][RTW89_MKK][0][73] = 127, -+ [1][1][2][0][RTW89_IC][1][73] = 10, -+ [1][1][2][0][RTW89_KCC][1][73] = 28, -+ [1][1][2][0][RTW89_KCC][0][73] = 127, -+ [1][1][2][0][RTW89_ACMA][1][73] = 127, -+ [1][1][2][0][RTW89_ACMA][0][73] = 127, -+ [1][1][2][0][RTW89_CHILE][1][73] = 10, -+ [1][1][2][0][RTW89_QATAR][1][73] = 127, -+ [1][1][2][0][RTW89_QATAR][0][73] = 127, -+ [1][1][2][0][RTW89_UK][1][73] = 127, -+ [1][1][2][0][RTW89_UK][0][73] = 127, -+ [1][1][2][0][RTW89_FCC][1][76] = 10, -+ [1][1][2][0][RTW89_FCC][2][76] = 66, -+ [1][1][2][0][RTW89_ETSI][1][76] = 127, -+ [1][1][2][0][RTW89_ETSI][0][76] = 127, -+ [1][1][2][0][RTW89_MKK][1][76] = 127, -+ [1][1][2][0][RTW89_MKK][0][76] = 127, -+ [1][1][2][0][RTW89_IC][1][76] = 10, -+ [1][1][2][0][RTW89_KCC][1][76] = 28, -+ [1][1][2][0][RTW89_KCC][0][76] = 127, -+ [1][1][2][0][RTW89_ACMA][1][76] = 127, -+ [1][1][2][0][RTW89_ACMA][0][76] = 127, -+ [1][1][2][0][RTW89_CHILE][1][76] = 10, -+ [1][1][2][0][RTW89_QATAR][1][76] = 127, -+ [1][1][2][0][RTW89_QATAR][0][76] = 127, -+ [1][1][2][0][RTW89_UK][1][76] = 127, -+ [1][1][2][0][RTW89_UK][0][76] = 127, -+ [1][1][2][0][RTW89_FCC][1][80] = 10, -+ [1][1][2][0][RTW89_FCC][2][80] = 66, -+ [1][1][2][0][RTW89_ETSI][1][80] = 127, -+ [1][1][2][0][RTW89_ETSI][0][80] = 127, -+ [1][1][2][0][RTW89_MKK][1][80] = 127, -+ [1][1][2][0][RTW89_MKK][0][80] = 127, -+ [1][1][2][0][RTW89_IC][1][80] = 10, -+ [1][1][2][0][RTW89_KCC][1][80] = 32, -+ [1][1][2][0][RTW89_KCC][0][80] = 127, -+ [1][1][2][0][RTW89_ACMA][1][80] = 127, -+ [1][1][2][0][RTW89_ACMA][0][80] = 127, -+ [1][1][2][0][RTW89_CHILE][1][80] = 10, -+ [1][1][2][0][RTW89_QATAR][1][80] = 127, -+ [1][1][2][0][RTW89_QATAR][0][80] = 127, -+ [1][1][2][0][RTW89_UK][1][80] = 127, -+ [1][1][2][0][RTW89_UK][0][80] = 127, -+ [1][1][2][0][RTW89_FCC][1][84] = 10, -+ [1][1][2][0][RTW89_FCC][2][84] = 66, -+ [1][1][2][0][RTW89_ETSI][1][84] = 127, -+ [1][1][2][0][RTW89_ETSI][0][84] = 127, -+ [1][1][2][0][RTW89_MKK][1][84] = 127, -+ [1][1][2][0][RTW89_MKK][0][84] = 127, -+ [1][1][2][0][RTW89_IC][1][84] = 10, -+ [1][1][2][0][RTW89_KCC][1][84] = 32, -+ [1][1][2][0][RTW89_KCC][0][84] = 127, -+ [1][1][2][0][RTW89_ACMA][1][84] = 127, -+ [1][1][2][0][RTW89_ACMA][0][84] = 127, -+ [1][1][2][0][RTW89_CHILE][1][84] = 10, -+ [1][1][2][0][RTW89_QATAR][1][84] = 127, -+ [1][1][2][0][RTW89_QATAR][0][84] = 127, -+ [1][1][2][0][RTW89_UK][1][84] = 127, -+ [1][1][2][0][RTW89_UK][0][84] = 127, -+ [1][1][2][0][RTW89_FCC][1][88] = 10, -+ [1][1][2][0][RTW89_FCC][2][88] = 127, -+ [1][1][2][0][RTW89_ETSI][1][88] = 127, -+ [1][1][2][0][RTW89_ETSI][0][88] = 127, -+ [1][1][2][0][RTW89_MKK][1][88] = 127, -+ [1][1][2][0][RTW89_MKK][0][88] = 127, -+ [1][1][2][0][RTW89_IC][1][88] = 10, -+ [1][1][2][0][RTW89_KCC][1][88] = 32, -+ [1][1][2][0][RTW89_KCC][0][88] = 127, -+ [1][1][2][0][RTW89_ACMA][1][88] = 127, -+ [1][1][2][0][RTW89_ACMA][0][88] = 127, -+ [1][1][2][0][RTW89_CHILE][1][88] = 10, -+ [1][1][2][0][RTW89_QATAR][1][88] = 127, -+ [1][1][2][0][RTW89_QATAR][0][88] = 127, -+ [1][1][2][0][RTW89_UK][1][88] = 127, -+ [1][1][2][0][RTW89_UK][0][88] = 127, -+ [1][1][2][0][RTW89_FCC][1][91] = 12, -+ [1][1][2][0][RTW89_FCC][2][91] = 127, -+ [1][1][2][0][RTW89_ETSI][1][91] = 127, -+ [1][1][2][0][RTW89_ETSI][0][91] = 127, -+ [1][1][2][0][RTW89_MKK][1][91] = 127, -+ [1][1][2][0][RTW89_MKK][0][91] = 127, -+ [1][1][2][0][RTW89_IC][1][91] = 12, -+ [1][1][2][0][RTW89_KCC][1][91] = 32, -+ [1][1][2][0][RTW89_KCC][0][91] = 127, -+ [1][1][2][0][RTW89_ACMA][1][91] = 127, -+ [1][1][2][0][RTW89_ACMA][0][91] = 127, -+ [1][1][2][0][RTW89_CHILE][1][91] = 12, -+ [1][1][2][0][RTW89_QATAR][1][91] = 127, -+ [1][1][2][0][RTW89_QATAR][0][91] = 127, -+ [1][1][2][0][RTW89_UK][1][91] = 127, -+ [1][1][2][0][RTW89_UK][0][91] = 127, -+ [1][1][2][0][RTW89_FCC][1][95] = 10, -+ [1][1][2][0][RTW89_FCC][2][95] = 127, -+ [1][1][2][0][RTW89_ETSI][1][95] = 127, -+ [1][1][2][0][RTW89_ETSI][0][95] = 127, -+ [1][1][2][0][RTW89_MKK][1][95] = 127, -+ [1][1][2][0][RTW89_MKK][0][95] = 127, -+ [1][1][2][0][RTW89_IC][1][95] = 10, -+ [1][1][2][0][RTW89_KCC][1][95] = 32, -+ [1][1][2][0][RTW89_KCC][0][95] = 127, -+ [1][1][2][0][RTW89_ACMA][1][95] = 127, -+ [1][1][2][0][RTW89_ACMA][0][95] = 127, -+ [1][1][2][0][RTW89_CHILE][1][95] = 10, -+ [1][1][2][0][RTW89_QATAR][1][95] = 127, -+ [1][1][2][0][RTW89_QATAR][0][95] = 127, -+ [1][1][2][0][RTW89_UK][1][95] = 127, -+ [1][1][2][0][RTW89_UK][0][95] = 127, -+ [1][1][2][0][RTW89_FCC][1][99] = 10, -+ [1][1][2][0][RTW89_FCC][2][99] = 127, -+ [1][1][2][0][RTW89_ETSI][1][99] = 127, -+ [1][1][2][0][RTW89_ETSI][0][99] = 127, -+ [1][1][2][0][RTW89_MKK][1][99] = 127, -+ [1][1][2][0][RTW89_MKK][0][99] = 127, -+ [1][1][2][0][RTW89_IC][1][99] = 10, -+ [1][1][2][0][RTW89_KCC][1][99] = 32, -+ [1][1][2][0][RTW89_KCC][0][99] = 127, -+ [1][1][2][0][RTW89_ACMA][1][99] = 127, -+ [1][1][2][0][RTW89_ACMA][0][99] = 127, -+ [1][1][2][0][RTW89_CHILE][1][99] = 10, -+ [1][1][2][0][RTW89_QATAR][1][99] = 127, -+ [1][1][2][0][RTW89_QATAR][0][99] = 127, -+ [1][1][2][0][RTW89_UK][1][99] = 127, -+ [1][1][2][0][RTW89_UK][0][99] = 127, -+ [1][1][2][0][RTW89_FCC][1][103] = 10, -+ [1][1][2][0][RTW89_FCC][2][103] = 127, -+ [1][1][2][0][RTW89_ETSI][1][103] = 127, -+ [1][1][2][0][RTW89_ETSI][0][103] = 127, -+ [1][1][2][0][RTW89_MKK][1][103] = 127, -+ [1][1][2][0][RTW89_MKK][0][103] = 127, -+ [1][1][2][0][RTW89_IC][1][103] = 10, -+ [1][1][2][0][RTW89_KCC][1][103] = 32, -+ [1][1][2][0][RTW89_KCC][0][103] = 127, -+ [1][1][2][0][RTW89_ACMA][1][103] = 127, -+ [1][1][2][0][RTW89_ACMA][0][103] = 127, -+ [1][1][2][0][RTW89_CHILE][1][103] = 10, -+ [1][1][2][0][RTW89_QATAR][1][103] = 127, -+ [1][1][2][0][RTW89_QATAR][0][103] = 127, -+ [1][1][2][0][RTW89_UK][1][103] = 127, -+ [1][1][2][0][RTW89_UK][0][103] = 127, -+ [1][1][2][0][RTW89_FCC][1][106] = 12, -+ [1][1][2][0][RTW89_FCC][2][106] = 127, -+ [1][1][2][0][RTW89_ETSI][1][106] = 127, -+ [1][1][2][0][RTW89_ETSI][0][106] = 127, -+ [1][1][2][0][RTW89_MKK][1][106] = 127, -+ [1][1][2][0][RTW89_MKK][0][106] = 127, -+ [1][1][2][0][RTW89_IC][1][106] = 12, -+ [1][1][2][0][RTW89_KCC][1][106] = 32, -+ [1][1][2][0][RTW89_KCC][0][106] = 127, -+ [1][1][2][0][RTW89_ACMA][1][106] = 127, -+ [1][1][2][0][RTW89_ACMA][0][106] = 127, -+ [1][1][2][0][RTW89_CHILE][1][106] = 12, -+ [1][1][2][0][RTW89_QATAR][1][106] = 127, -+ [1][1][2][0][RTW89_QATAR][0][106] = 127, -+ [1][1][2][0][RTW89_UK][1][106] = 127, -+ [1][1][2][0][RTW89_UK][0][106] = 127, -+ [1][1][2][0][RTW89_FCC][1][110] = 127, -+ [1][1][2][0][RTW89_FCC][2][110] = 127, -+ [1][1][2][0][RTW89_ETSI][1][110] = 127, -+ [1][1][2][0][RTW89_ETSI][0][110] = 127, -+ [1][1][2][0][RTW89_MKK][1][110] = 127, -+ [1][1][2][0][RTW89_MKK][0][110] = 127, -+ [1][1][2][0][RTW89_IC][1][110] = 127, -+ [1][1][2][0][RTW89_KCC][1][110] = 127, -+ [1][1][2][0][RTW89_KCC][0][110] = 127, -+ [1][1][2][0][RTW89_ACMA][1][110] = 127, -+ [1][1][2][0][RTW89_ACMA][0][110] = 127, -+ [1][1][2][0][RTW89_CHILE][1][110] = 127, -+ [1][1][2][0][RTW89_QATAR][1][110] = 127, -+ [1][1][2][0][RTW89_QATAR][0][110] = 127, -+ [1][1][2][0][RTW89_UK][1][110] = 127, -+ [1][1][2][0][RTW89_UK][0][110] = 127, -+ [1][1][2][0][RTW89_FCC][1][114] = 127, -+ [1][1][2][0][RTW89_FCC][2][114] = 127, -+ [1][1][2][0][RTW89_ETSI][1][114] = 127, -+ [1][1][2][0][RTW89_ETSI][0][114] = 127, -+ [1][1][2][0][RTW89_MKK][1][114] = 127, -+ [1][1][2][0][RTW89_MKK][0][114] = 127, -+ [1][1][2][0][RTW89_IC][1][114] = 127, -+ [1][1][2][0][RTW89_KCC][1][114] = 127, -+ [1][1][2][0][RTW89_KCC][0][114] = 127, -+ [1][1][2][0][RTW89_ACMA][1][114] = 127, -+ [1][1][2][0][RTW89_ACMA][0][114] = 127, -+ [1][1][2][0][RTW89_CHILE][1][114] = 127, -+ [1][1][2][0][RTW89_QATAR][1][114] = 127, -+ [1][1][2][0][RTW89_QATAR][0][114] = 127, -+ [1][1][2][0][RTW89_UK][1][114] = 127, -+ [1][1][2][0][RTW89_UK][0][114] = 127, -+ [1][1][2][0][RTW89_FCC][1][118] = 127, -+ [1][1][2][0][RTW89_FCC][2][118] = 127, -+ [1][1][2][0][RTW89_ETSI][1][118] = 127, -+ [1][1][2][0][RTW89_ETSI][0][118] = 127, -+ [1][1][2][0][RTW89_MKK][1][118] = 127, -+ [1][1][2][0][RTW89_MKK][0][118] = 127, -+ [1][1][2][0][RTW89_IC][1][118] = 127, -+ [1][1][2][0][RTW89_KCC][1][118] = 127, -+ [1][1][2][0][RTW89_KCC][0][118] = 127, -+ [1][1][2][0][RTW89_ACMA][1][118] = 127, -+ [1][1][2][0][RTW89_ACMA][0][118] = 127, -+ [1][1][2][0][RTW89_CHILE][1][118] = 127, -+ [1][1][2][0][RTW89_QATAR][1][118] = 127, -+ [1][1][2][0][RTW89_QATAR][0][118] = 127, -+ [1][1][2][0][RTW89_UK][1][118] = 127, -+ [1][1][2][0][RTW89_UK][0][118] = 127, -+ [1][1][2][1][RTW89_FCC][1][1] = 10, -+ [1][1][2][1][RTW89_FCC][2][1] = 58, -+ [1][1][2][1][RTW89_ETSI][1][1] = 42, -+ [1][1][2][1][RTW89_ETSI][0][1] = 6, -+ [1][1][2][1][RTW89_MKK][1][1] = 52, -+ [1][1][2][1][RTW89_MKK][0][1] = 12, -+ [1][1][2][1][RTW89_IC][1][1] = 10, -+ [1][1][2][1][RTW89_KCC][1][1] = 28, -+ [1][1][2][1][RTW89_KCC][0][1] = 12, -+ [1][1][2][1][RTW89_ACMA][1][1] = 42, -+ [1][1][2][1][RTW89_ACMA][0][1] = 6, -+ [1][1][2][1][RTW89_CHILE][1][1] = 10, -+ [1][1][2][1][RTW89_QATAR][1][1] = 42, -+ [1][1][2][1][RTW89_QATAR][0][1] = 6, -+ [1][1][2][1][RTW89_UK][1][1] = 42, -+ [1][1][2][1][RTW89_UK][0][1] = 6, -+ [1][1][2][1][RTW89_FCC][1][5] = 10, -+ [1][1][2][1][RTW89_FCC][2][5] = 58, -+ [1][1][2][1][RTW89_ETSI][1][5] = 42, -+ [1][1][2][1][RTW89_ETSI][0][5] = 6, -+ [1][1][2][1][RTW89_MKK][1][5] = 52, -+ [1][1][2][1][RTW89_MKK][0][5] = 12, -+ [1][1][2][1][RTW89_IC][1][5] = 10, -+ [1][1][2][1][RTW89_KCC][1][5] = 28, -+ [1][1][2][1][RTW89_KCC][0][5] = 12, -+ [1][1][2][1][RTW89_ACMA][1][5] = 42, -+ [1][1][2][1][RTW89_ACMA][0][5] = 6, -+ [1][1][2][1][RTW89_CHILE][1][5] = 10, -+ [1][1][2][1][RTW89_QATAR][1][5] = 42, -+ [1][1][2][1][RTW89_QATAR][0][5] = 6, -+ [1][1][2][1][RTW89_UK][1][5] = 42, -+ [1][1][2][1][RTW89_UK][0][5] = 6, -+ [1][1][2][1][RTW89_FCC][1][9] = 10, -+ [1][1][2][1][RTW89_FCC][2][9] = 58, -+ [1][1][2][1][RTW89_ETSI][1][9] = 42, -+ [1][1][2][1][RTW89_ETSI][0][9] = 6, -+ [1][1][2][1][RTW89_MKK][1][9] = 52, -+ [1][1][2][1][RTW89_MKK][0][9] = 12, -+ [1][1][2][1][RTW89_IC][1][9] = 10, -+ [1][1][2][1][RTW89_KCC][1][9] = 28, -+ [1][1][2][1][RTW89_KCC][0][9] = 12, -+ [1][1][2][1][RTW89_ACMA][1][9] = 42, -+ [1][1][2][1][RTW89_ACMA][0][9] = 6, -+ [1][1][2][1][RTW89_CHILE][1][9] = 10, -+ [1][1][2][1][RTW89_QATAR][1][9] = 42, -+ [1][1][2][1][RTW89_QATAR][0][9] = 6, -+ [1][1][2][1][RTW89_UK][1][9] = 42, -+ [1][1][2][1][RTW89_UK][0][9] = 6, -+ [1][1][2][1][RTW89_FCC][1][13] = 10, -+ [1][1][2][1][RTW89_FCC][2][13] = 58, -+ [1][1][2][1][RTW89_ETSI][1][13] = 42, -+ [1][1][2][1][RTW89_ETSI][0][13] = 6, -+ [1][1][2][1][RTW89_MKK][1][13] = 52, -+ [1][1][2][1][RTW89_MKK][0][13] = 12, -+ [1][1][2][1][RTW89_IC][1][13] = 10, -+ [1][1][2][1][RTW89_KCC][1][13] = 28, -+ [1][1][2][1][RTW89_KCC][0][13] = 12, -+ [1][1][2][1][RTW89_ACMA][1][13] = 42, -+ [1][1][2][1][RTW89_ACMA][0][13] = 6, -+ [1][1][2][1][RTW89_CHILE][1][13] = 10, -+ [1][1][2][1][RTW89_QATAR][1][13] = 42, -+ [1][1][2][1][RTW89_QATAR][0][13] = 6, -+ [1][1][2][1][RTW89_UK][1][13] = 42, -+ [1][1][2][1][RTW89_UK][0][13] = 6, -+ [1][1][2][1][RTW89_FCC][1][16] = 10, -+ [1][1][2][1][RTW89_FCC][2][16] = 58, -+ [1][1][2][1][RTW89_ETSI][1][16] = 42, -+ [1][1][2][1][RTW89_ETSI][0][16] = 6, -+ [1][1][2][1][RTW89_MKK][1][16] = 52, -+ [1][1][2][1][RTW89_MKK][0][16] = 12, -+ [1][1][2][1][RTW89_IC][1][16] = 10, -+ [1][1][2][1][RTW89_KCC][1][16] = 28, -+ [1][1][2][1][RTW89_KCC][0][16] = 12, -+ [1][1][2][1][RTW89_ACMA][1][16] = 42, -+ [1][1][2][1][RTW89_ACMA][0][16] = 6, -+ [1][1][2][1][RTW89_CHILE][1][16] = 10, -+ [1][1][2][1][RTW89_QATAR][1][16] = 42, -+ [1][1][2][1][RTW89_QATAR][0][16] = 6, -+ [1][1][2][1][RTW89_UK][1][16] = 42, -+ [1][1][2][1][RTW89_UK][0][16] = 6, -+ [1][1][2][1][RTW89_FCC][1][20] = 10, -+ [1][1][2][1][RTW89_FCC][2][20] = 58, -+ [1][1][2][1][RTW89_ETSI][1][20] = 42, -+ [1][1][2][1][RTW89_ETSI][0][20] = 6, -+ [1][1][2][1][RTW89_MKK][1][20] = 52, -+ [1][1][2][1][RTW89_MKK][0][20] = 12, -+ [1][1][2][1][RTW89_IC][1][20] = 10, -+ [1][1][2][1][RTW89_KCC][1][20] = 28, -+ [1][1][2][1][RTW89_KCC][0][20] = 12, -+ [1][1][2][1][RTW89_ACMA][1][20] = 42, -+ [1][1][2][1][RTW89_ACMA][0][20] = 6, -+ [1][1][2][1][RTW89_CHILE][1][20] = 10, -+ [1][1][2][1][RTW89_QATAR][1][20] = 42, -+ [1][1][2][1][RTW89_QATAR][0][20] = 6, -+ [1][1][2][1][RTW89_UK][1][20] = 42, -+ [1][1][2][1][RTW89_UK][0][20] = 6, -+ [1][1][2][1][RTW89_FCC][1][24] = 10, -+ [1][1][2][1][RTW89_FCC][2][24] = 70, -+ [1][1][2][1][RTW89_ETSI][1][24] = 42, -+ [1][1][2][1][RTW89_ETSI][0][24] = 6, -+ [1][1][2][1][RTW89_MKK][1][24] = 54, -+ [1][1][2][1][RTW89_MKK][0][24] = 14, -+ [1][1][2][1][RTW89_IC][1][24] = 10, -+ [1][1][2][1][RTW89_KCC][1][24] = 28, -+ [1][1][2][1][RTW89_KCC][0][24] = 12, -+ [1][1][2][1][RTW89_ACMA][1][24] = 42, -+ [1][1][2][1][RTW89_ACMA][0][24] = 6, -+ [1][1][2][1][RTW89_CHILE][1][24] = 10, -+ [1][1][2][1][RTW89_QATAR][1][24] = 42, -+ [1][1][2][1][RTW89_QATAR][0][24] = 6, -+ [1][1][2][1][RTW89_UK][1][24] = 42, -+ [1][1][2][1][RTW89_UK][0][24] = 6, -+ [1][1][2][1][RTW89_FCC][1][28] = 10, -+ [1][1][2][1][RTW89_FCC][2][28] = 70, -+ [1][1][2][1][RTW89_ETSI][1][28] = 42, -+ [1][1][2][1][RTW89_ETSI][0][28] = 6, -+ [1][1][2][1][RTW89_MKK][1][28] = 52, -+ [1][1][2][1][RTW89_MKK][0][28] = 14, -+ [1][1][2][1][RTW89_IC][1][28] = 10, -+ [1][1][2][1][RTW89_KCC][1][28] = 28, -+ [1][1][2][1][RTW89_KCC][0][28] = 14, -+ [1][1][2][1][RTW89_ACMA][1][28] = 42, -+ [1][1][2][1][RTW89_ACMA][0][28] = 6, -+ [1][1][2][1][RTW89_CHILE][1][28] = 10, -+ [1][1][2][1][RTW89_QATAR][1][28] = 42, -+ [1][1][2][1][RTW89_QATAR][0][28] = 6, -+ [1][1][2][1][RTW89_UK][1][28] = 42, -+ [1][1][2][1][RTW89_UK][0][28] = 6, -+ [1][1][2][1][RTW89_FCC][1][31] = 10, -+ [1][1][2][1][RTW89_FCC][2][31] = 70, -+ [1][1][2][1][RTW89_ETSI][1][31] = 42, -+ [1][1][2][1][RTW89_ETSI][0][31] = 6, -+ [1][1][2][1][RTW89_MKK][1][31] = 52, -+ [1][1][2][1][RTW89_MKK][0][31] = 14, -+ [1][1][2][1][RTW89_IC][1][31] = 10, -+ [1][1][2][1][RTW89_KCC][1][31] = 28, -+ [1][1][2][1][RTW89_KCC][0][31] = 14, -+ [1][1][2][1][RTW89_ACMA][1][31] = 42, -+ [1][1][2][1][RTW89_ACMA][0][31] = 6, -+ [1][1][2][1][RTW89_CHILE][1][31] = 10, -+ [1][1][2][1][RTW89_QATAR][1][31] = 42, -+ [1][1][2][1][RTW89_QATAR][0][31] = 6, -+ [1][1][2][1][RTW89_UK][1][31] = 42, -+ [1][1][2][1][RTW89_UK][0][31] = 6, -+ [1][1][2][1][RTW89_FCC][1][35] = 10, -+ [1][1][2][1][RTW89_FCC][2][35] = 70, -+ [1][1][2][1][RTW89_ETSI][1][35] = 42, -+ [1][1][2][1][RTW89_ETSI][0][35] = 6, -+ [1][1][2][1][RTW89_MKK][1][35] = 52, -+ [1][1][2][1][RTW89_MKK][0][35] = 14, -+ [1][1][2][1][RTW89_IC][1][35] = 10, -+ [1][1][2][1][RTW89_KCC][1][35] = 28, -+ [1][1][2][1][RTW89_KCC][0][35] = 14, -+ [1][1][2][1][RTW89_ACMA][1][35] = 42, -+ [1][1][2][1][RTW89_ACMA][0][35] = 6, -+ [1][1][2][1][RTW89_CHILE][1][35] = 10, -+ [1][1][2][1][RTW89_QATAR][1][35] = 42, -+ [1][1][2][1][RTW89_QATAR][0][35] = 6, -+ [1][1][2][1][RTW89_UK][1][35] = 42, -+ [1][1][2][1][RTW89_UK][0][35] = 6, -+ [1][1][2][1][RTW89_FCC][1][39] = 10, -+ [1][1][2][1][RTW89_FCC][2][39] = 70, -+ [1][1][2][1][RTW89_ETSI][1][39] = 42, -+ [1][1][2][1][RTW89_ETSI][0][39] = 6, -+ [1][1][2][1][RTW89_MKK][1][39] = 52, -+ [1][1][2][1][RTW89_MKK][0][39] = 14, -+ [1][1][2][1][RTW89_IC][1][39] = 10, -+ [1][1][2][1][RTW89_KCC][1][39] = 28, -+ [1][1][2][1][RTW89_KCC][0][39] = 14, -+ [1][1][2][1][RTW89_ACMA][1][39] = 42, -+ [1][1][2][1][RTW89_ACMA][0][39] = 6, -+ [1][1][2][1][RTW89_CHILE][1][39] = 10, -+ [1][1][2][1][RTW89_QATAR][1][39] = 42, -+ [1][1][2][1][RTW89_QATAR][0][39] = 6, -+ [1][1][2][1][RTW89_UK][1][39] = 42, -+ [1][1][2][1][RTW89_UK][0][39] = 6, -+ [1][1][2][1][RTW89_FCC][1][43] = 10, -+ [1][1][2][1][RTW89_FCC][2][43] = 70, -+ [1][1][2][1][RTW89_ETSI][1][43] = 42, -+ [1][1][2][1][RTW89_ETSI][0][43] = 6, -+ [1][1][2][1][RTW89_MKK][1][43] = 52, -+ [1][1][2][1][RTW89_MKK][0][43] = 14, -+ [1][1][2][1][RTW89_IC][1][43] = 10, -+ [1][1][2][1][RTW89_KCC][1][43] = 28, -+ [1][1][2][1][RTW89_KCC][0][43] = 14, -+ [1][1][2][1][RTW89_ACMA][1][43] = 42, -+ [1][1][2][1][RTW89_ACMA][0][43] = 6, -+ [1][1][2][1][RTW89_CHILE][1][43] = 10, -+ [1][1][2][1][RTW89_QATAR][1][43] = 42, -+ [1][1][2][1][RTW89_QATAR][0][43] = 6, -+ [1][1][2][1][RTW89_UK][1][43] = 42, -+ [1][1][2][1][RTW89_UK][0][43] = 6, -+ [1][1][2][1][RTW89_FCC][1][46] = 12, -+ [1][1][2][1][RTW89_FCC][2][46] = 127, -+ [1][1][2][1][RTW89_ETSI][1][46] = 127, -+ [1][1][2][1][RTW89_ETSI][0][46] = 127, -+ [1][1][2][1][RTW89_MKK][1][46] = 127, -+ [1][1][2][1][RTW89_MKK][0][46] = 127, -+ [1][1][2][1][RTW89_IC][1][46] = 12, -+ [1][1][2][1][RTW89_KCC][1][46] = 28, -+ [1][1][2][1][RTW89_KCC][0][46] = 127, -+ [1][1][2][1][RTW89_ACMA][1][46] = 127, -+ [1][1][2][1][RTW89_ACMA][0][46] = 127, -+ [1][1][2][1][RTW89_CHILE][1][46] = 12, -+ [1][1][2][1][RTW89_QATAR][1][46] = 127, -+ [1][1][2][1][RTW89_QATAR][0][46] = 127, -+ [1][1][2][1][RTW89_UK][1][46] = 127, -+ [1][1][2][1][RTW89_UK][0][46] = 127, -+ [1][1][2][1][RTW89_FCC][1][50] = 12, -+ [1][1][2][1][RTW89_FCC][2][50] = 127, -+ [1][1][2][1][RTW89_ETSI][1][50] = 127, -+ [1][1][2][1][RTW89_ETSI][0][50] = 127, -+ [1][1][2][1][RTW89_MKK][1][50] = 127, -+ [1][1][2][1][RTW89_MKK][0][50] = 127, -+ [1][1][2][1][RTW89_IC][1][50] = 12, -+ [1][1][2][1][RTW89_KCC][1][50] = 28, -+ [1][1][2][1][RTW89_KCC][0][50] = 127, -+ [1][1][2][1][RTW89_ACMA][1][50] = 127, -+ [1][1][2][1][RTW89_ACMA][0][50] = 127, -+ [1][1][2][1][RTW89_CHILE][1][50] = 12, -+ [1][1][2][1][RTW89_QATAR][1][50] = 127, -+ [1][1][2][1][RTW89_QATAR][0][50] = 127, -+ [1][1][2][1][RTW89_UK][1][50] = 127, -+ [1][1][2][1][RTW89_UK][0][50] = 127, -+ [1][1][2][1][RTW89_FCC][1][54] = 10, -+ [1][1][2][1][RTW89_FCC][2][54] = 127, -+ [1][1][2][1][RTW89_ETSI][1][54] = 127, -+ [1][1][2][1][RTW89_ETSI][0][54] = 127, -+ [1][1][2][1][RTW89_MKK][1][54] = 127, -+ [1][1][2][1][RTW89_MKK][0][54] = 127, -+ [1][1][2][1][RTW89_IC][1][54] = 10, -+ [1][1][2][1][RTW89_KCC][1][54] = 28, -+ [1][1][2][1][RTW89_KCC][0][54] = 127, -+ [1][1][2][1][RTW89_ACMA][1][54] = 127, -+ [1][1][2][1][RTW89_ACMA][0][54] = 127, -+ [1][1][2][1][RTW89_CHILE][1][54] = 10, -+ [1][1][2][1][RTW89_QATAR][1][54] = 127, -+ [1][1][2][1][RTW89_QATAR][0][54] = 127, -+ [1][1][2][1][RTW89_UK][1][54] = 127, -+ [1][1][2][1][RTW89_UK][0][54] = 127, -+ [1][1][2][1][RTW89_FCC][1][58] = 10, -+ [1][1][2][1][RTW89_FCC][2][58] = 66, -+ [1][1][2][1][RTW89_ETSI][1][58] = 127, -+ [1][1][2][1][RTW89_ETSI][0][58] = 127, -+ [1][1][2][1][RTW89_MKK][1][58] = 127, -+ [1][1][2][1][RTW89_MKK][0][58] = 127, -+ [1][1][2][1][RTW89_IC][1][58] = 10, -+ [1][1][2][1][RTW89_KCC][1][58] = 28, -+ [1][1][2][1][RTW89_KCC][0][58] = 127, -+ [1][1][2][1][RTW89_ACMA][1][58] = 127, -+ [1][1][2][1][RTW89_ACMA][0][58] = 127, -+ [1][1][2][1][RTW89_CHILE][1][58] = 10, -+ [1][1][2][1][RTW89_QATAR][1][58] = 127, -+ [1][1][2][1][RTW89_QATAR][0][58] = 127, -+ [1][1][2][1][RTW89_UK][1][58] = 127, -+ [1][1][2][1][RTW89_UK][0][58] = 127, -+ [1][1][2][1][RTW89_FCC][1][61] = 10, -+ [1][1][2][1][RTW89_FCC][2][61] = 66, -+ [1][1][2][1][RTW89_ETSI][1][61] = 127, -+ [1][1][2][1][RTW89_ETSI][0][61] = 127, -+ [1][1][2][1][RTW89_MKK][1][61] = 127, -+ [1][1][2][1][RTW89_MKK][0][61] = 127, -+ [1][1][2][1][RTW89_IC][1][61] = 10, -+ [1][1][2][1][RTW89_KCC][1][61] = 28, -+ [1][1][2][1][RTW89_KCC][0][61] = 127, -+ [1][1][2][1][RTW89_ACMA][1][61] = 127, -+ [1][1][2][1][RTW89_ACMA][0][61] = 127, -+ [1][1][2][1][RTW89_CHILE][1][61] = 10, -+ [1][1][2][1][RTW89_QATAR][1][61] = 127, -+ [1][1][2][1][RTW89_QATAR][0][61] = 127, -+ [1][1][2][1][RTW89_UK][1][61] = 127, -+ [1][1][2][1][RTW89_UK][0][61] = 127, -+ [1][1][2][1][RTW89_FCC][1][65] = 10, -+ [1][1][2][1][RTW89_FCC][2][65] = 66, -+ [1][1][2][1][RTW89_ETSI][1][65] = 127, -+ [1][1][2][1][RTW89_ETSI][0][65] = 127, -+ [1][1][2][1][RTW89_MKK][1][65] = 127, -+ [1][1][2][1][RTW89_MKK][0][65] = 127, -+ [1][1][2][1][RTW89_IC][1][65] = 10, -+ [1][1][2][1][RTW89_KCC][1][65] = 28, -+ [1][1][2][1][RTW89_KCC][0][65] = 127, -+ [1][1][2][1][RTW89_ACMA][1][65] = 127, -+ [1][1][2][1][RTW89_ACMA][0][65] = 127, -+ [1][1][2][1][RTW89_CHILE][1][65] = 10, -+ [1][1][2][1][RTW89_QATAR][1][65] = 127, -+ [1][1][2][1][RTW89_QATAR][0][65] = 127, -+ [1][1][2][1][RTW89_UK][1][65] = 127, -+ [1][1][2][1][RTW89_UK][0][65] = 127, -+ [1][1][2][1][RTW89_FCC][1][69] = 10, -+ [1][1][2][1][RTW89_FCC][2][69] = 66, -+ [1][1][2][1][RTW89_ETSI][1][69] = 127, -+ [1][1][2][1][RTW89_ETSI][0][69] = 127, -+ [1][1][2][1][RTW89_MKK][1][69] = 127, -+ [1][1][2][1][RTW89_MKK][0][69] = 127, -+ [1][1][2][1][RTW89_IC][1][69] = 10, -+ [1][1][2][1][RTW89_KCC][1][69] = 28, -+ [1][1][2][1][RTW89_KCC][0][69] = 127, -+ [1][1][2][1][RTW89_ACMA][1][69] = 127, -+ [1][1][2][1][RTW89_ACMA][0][69] = 127, -+ [1][1][2][1][RTW89_CHILE][1][69] = 10, -+ [1][1][2][1][RTW89_QATAR][1][69] = 127, -+ [1][1][2][1][RTW89_QATAR][0][69] = 127, -+ [1][1][2][1][RTW89_UK][1][69] = 127, -+ [1][1][2][1][RTW89_UK][0][69] = 127, -+ [1][1][2][1][RTW89_FCC][1][73] = 10, -+ [1][1][2][1][RTW89_FCC][2][73] = 66, -+ [1][1][2][1][RTW89_ETSI][1][73] = 127, -+ [1][1][2][1][RTW89_ETSI][0][73] = 127, -+ [1][1][2][1][RTW89_MKK][1][73] = 127, -+ [1][1][2][1][RTW89_MKK][0][73] = 127, -+ [1][1][2][1][RTW89_IC][1][73] = 10, -+ [1][1][2][1][RTW89_KCC][1][73] = 28, -+ [1][1][2][1][RTW89_KCC][0][73] = 127, -+ [1][1][2][1][RTW89_ACMA][1][73] = 127, -+ [1][1][2][1][RTW89_ACMA][0][73] = 127, -+ [1][1][2][1][RTW89_CHILE][1][73] = 10, -+ [1][1][2][1][RTW89_QATAR][1][73] = 127, -+ [1][1][2][1][RTW89_QATAR][0][73] = 127, -+ [1][1][2][1][RTW89_UK][1][73] = 127, -+ [1][1][2][1][RTW89_UK][0][73] = 127, -+ [1][1][2][1][RTW89_FCC][1][76] = 10, -+ [1][1][2][1][RTW89_FCC][2][76] = 66, -+ [1][1][2][1][RTW89_ETSI][1][76] = 127, -+ [1][1][2][1][RTW89_ETSI][0][76] = 127, -+ [1][1][2][1][RTW89_MKK][1][76] = 127, -+ [1][1][2][1][RTW89_MKK][0][76] = 127, -+ [1][1][2][1][RTW89_IC][1][76] = 10, -+ [1][1][2][1][RTW89_KCC][1][76] = 28, -+ [1][1][2][1][RTW89_KCC][0][76] = 127, -+ [1][1][2][1][RTW89_ACMA][1][76] = 127, -+ [1][1][2][1][RTW89_ACMA][0][76] = 127, -+ [1][1][2][1][RTW89_CHILE][1][76] = 10, -+ [1][1][2][1][RTW89_QATAR][1][76] = 127, -+ [1][1][2][1][RTW89_QATAR][0][76] = 127, -+ [1][1][2][1][RTW89_UK][1][76] = 127, -+ [1][1][2][1][RTW89_UK][0][76] = 127, -+ [1][1][2][1][RTW89_FCC][1][80] = 10, -+ [1][1][2][1][RTW89_FCC][2][80] = 66, -+ [1][1][2][1][RTW89_ETSI][1][80] = 127, -+ [1][1][2][1][RTW89_ETSI][0][80] = 127, -+ [1][1][2][1][RTW89_MKK][1][80] = 127, -+ [1][1][2][1][RTW89_MKK][0][80] = 127, -+ [1][1][2][1][RTW89_IC][1][80] = 10, -+ [1][1][2][1][RTW89_KCC][1][80] = 32, -+ [1][1][2][1][RTW89_KCC][0][80] = 127, -+ [1][1][2][1][RTW89_ACMA][1][80] = 127, -+ [1][1][2][1][RTW89_ACMA][0][80] = 127, -+ [1][1][2][1][RTW89_CHILE][1][80] = 10, -+ [1][1][2][1][RTW89_QATAR][1][80] = 127, -+ [1][1][2][1][RTW89_QATAR][0][80] = 127, -+ [1][1][2][1][RTW89_UK][1][80] = 127, -+ [1][1][2][1][RTW89_UK][0][80] = 127, -+ [1][1][2][1][RTW89_FCC][1][84] = 10, -+ [1][1][2][1][RTW89_FCC][2][84] = 66, -+ [1][1][2][1][RTW89_ETSI][1][84] = 127, -+ [1][1][2][1][RTW89_ETSI][0][84] = 127, -+ [1][1][2][1][RTW89_MKK][1][84] = 127, -+ [1][1][2][1][RTW89_MKK][0][84] = 127, -+ [1][1][2][1][RTW89_IC][1][84] = 10, -+ [1][1][2][1][RTW89_KCC][1][84] = 32, -+ [1][1][2][1][RTW89_KCC][0][84] = 127, -+ [1][1][2][1][RTW89_ACMA][1][84] = 127, -+ [1][1][2][1][RTW89_ACMA][0][84] = 127, -+ [1][1][2][1][RTW89_CHILE][1][84] = 10, -+ [1][1][2][1][RTW89_QATAR][1][84] = 127, -+ [1][1][2][1][RTW89_QATAR][0][84] = 127, -+ [1][1][2][1][RTW89_UK][1][84] = 127, -+ [1][1][2][1][RTW89_UK][0][84] = 127, -+ [1][1][2][1][RTW89_FCC][1][88] = 10, -+ [1][1][2][1][RTW89_FCC][2][88] = 127, -+ [1][1][2][1][RTW89_ETSI][1][88] = 127, -+ [1][1][2][1][RTW89_ETSI][0][88] = 127, -+ [1][1][2][1][RTW89_MKK][1][88] = 127, -+ [1][1][2][1][RTW89_MKK][0][88] = 127, -+ [1][1][2][1][RTW89_IC][1][88] = 10, -+ [1][1][2][1][RTW89_KCC][1][88] = 32, -+ [1][1][2][1][RTW89_KCC][0][88] = 127, -+ [1][1][2][1][RTW89_ACMA][1][88] = 127, -+ [1][1][2][1][RTW89_ACMA][0][88] = 127, -+ [1][1][2][1][RTW89_CHILE][1][88] = 10, -+ [1][1][2][1][RTW89_QATAR][1][88] = 127, -+ [1][1][2][1][RTW89_QATAR][0][88] = 127, -+ [1][1][2][1][RTW89_UK][1][88] = 127, -+ [1][1][2][1][RTW89_UK][0][88] = 127, -+ [1][1][2][1][RTW89_FCC][1][91] = 12, -+ [1][1][2][1][RTW89_FCC][2][91] = 127, -+ [1][1][2][1][RTW89_ETSI][1][91] = 127, -+ [1][1][2][1][RTW89_ETSI][0][91] = 127, -+ [1][1][2][1][RTW89_MKK][1][91] = 127, -+ [1][1][2][1][RTW89_MKK][0][91] = 127, -+ [1][1][2][1][RTW89_IC][1][91] = 12, -+ [1][1][2][1][RTW89_KCC][1][91] = 32, -+ [1][1][2][1][RTW89_KCC][0][91] = 127, -+ [1][1][2][1][RTW89_ACMA][1][91] = 127, -+ [1][1][2][1][RTW89_ACMA][0][91] = 127, -+ [1][1][2][1][RTW89_CHILE][1][91] = 12, -+ [1][1][2][1][RTW89_QATAR][1][91] = 127, -+ [1][1][2][1][RTW89_QATAR][0][91] = 127, -+ [1][1][2][1][RTW89_UK][1][91] = 127, -+ [1][1][2][1][RTW89_UK][0][91] = 127, -+ [1][1][2][1][RTW89_FCC][1][95] = 10, -+ [1][1][2][1][RTW89_FCC][2][95] = 127, -+ [1][1][2][1][RTW89_ETSI][1][95] = 127, -+ [1][1][2][1][RTW89_ETSI][0][95] = 127, -+ [1][1][2][1][RTW89_MKK][1][95] = 127, -+ [1][1][2][1][RTW89_MKK][0][95] = 127, -+ [1][1][2][1][RTW89_IC][1][95] = 10, -+ [1][1][2][1][RTW89_KCC][1][95] = 32, -+ [1][1][2][1][RTW89_KCC][0][95] = 127, -+ [1][1][2][1][RTW89_ACMA][1][95] = 127, -+ [1][1][2][1][RTW89_ACMA][0][95] = 127, -+ [1][1][2][1][RTW89_CHILE][1][95] = 10, -+ [1][1][2][1][RTW89_QATAR][1][95] = 127, -+ [1][1][2][1][RTW89_QATAR][0][95] = 127, -+ [1][1][2][1][RTW89_UK][1][95] = 127, -+ [1][1][2][1][RTW89_UK][0][95] = 127, -+ [1][1][2][1][RTW89_FCC][1][99] = 10, -+ [1][1][2][1][RTW89_FCC][2][99] = 127, -+ [1][1][2][1][RTW89_ETSI][1][99] = 127, -+ [1][1][2][1][RTW89_ETSI][0][99] = 127, -+ [1][1][2][1][RTW89_MKK][1][99] = 127, -+ [1][1][2][1][RTW89_MKK][0][99] = 127, -+ [1][1][2][1][RTW89_IC][1][99] = 10, -+ [1][1][2][1][RTW89_KCC][1][99] = 32, -+ [1][1][2][1][RTW89_KCC][0][99] = 127, -+ [1][1][2][1][RTW89_ACMA][1][99] = 127, -+ [1][1][2][1][RTW89_ACMA][0][99] = 127, -+ [1][1][2][1][RTW89_CHILE][1][99] = 10, -+ [1][1][2][1][RTW89_QATAR][1][99] = 127, -+ [1][1][2][1][RTW89_QATAR][0][99] = 127, -+ [1][1][2][1][RTW89_UK][1][99] = 127, -+ [1][1][2][1][RTW89_UK][0][99] = 127, -+ [1][1][2][1][RTW89_FCC][1][103] = 10, -+ [1][1][2][1][RTW89_FCC][2][103] = 127, -+ [1][1][2][1][RTW89_ETSI][1][103] = 127, -+ [1][1][2][1][RTW89_ETSI][0][103] = 127, -+ [1][1][2][1][RTW89_MKK][1][103] = 127, -+ [1][1][2][1][RTW89_MKK][0][103] = 127, -+ [1][1][2][1][RTW89_IC][1][103] = 10, -+ [1][1][2][1][RTW89_KCC][1][103] = 32, -+ [1][1][2][1][RTW89_KCC][0][103] = 127, -+ [1][1][2][1][RTW89_ACMA][1][103] = 127, -+ [1][1][2][1][RTW89_ACMA][0][103] = 127, -+ [1][1][2][1][RTW89_CHILE][1][103] = 10, -+ [1][1][2][1][RTW89_QATAR][1][103] = 127, -+ [1][1][2][1][RTW89_QATAR][0][103] = 127, -+ [1][1][2][1][RTW89_UK][1][103] = 127, -+ [1][1][2][1][RTW89_UK][0][103] = 127, -+ [1][1][2][1][RTW89_FCC][1][106] = 12, -+ [1][1][2][1][RTW89_FCC][2][106] = 127, -+ [1][1][2][1][RTW89_ETSI][1][106] = 127, -+ [1][1][2][1][RTW89_ETSI][0][106] = 127, -+ [1][1][2][1][RTW89_MKK][1][106] = 127, -+ [1][1][2][1][RTW89_MKK][0][106] = 127, -+ [1][1][2][1][RTW89_IC][1][106] = 12, -+ [1][1][2][1][RTW89_KCC][1][106] = 32, -+ [1][1][2][1][RTW89_KCC][0][106] = 127, -+ [1][1][2][1][RTW89_ACMA][1][106] = 127, -+ [1][1][2][1][RTW89_ACMA][0][106] = 127, -+ [1][1][2][1][RTW89_CHILE][1][106] = 12, -+ [1][1][2][1][RTW89_QATAR][1][106] = 127, -+ [1][1][2][1][RTW89_QATAR][0][106] = 127, -+ [1][1][2][1][RTW89_UK][1][106] = 127, -+ [1][1][2][1][RTW89_UK][0][106] = 127, -+ [1][1][2][1][RTW89_FCC][1][110] = 127, -+ [1][1][2][1][RTW89_FCC][2][110] = 127, -+ [1][1][2][1][RTW89_ETSI][1][110] = 127, -+ [1][1][2][1][RTW89_ETSI][0][110] = 127, -+ [1][1][2][1][RTW89_MKK][1][110] = 127, -+ [1][1][2][1][RTW89_MKK][0][110] = 127, -+ [1][1][2][1][RTW89_IC][1][110] = 127, -+ [1][1][2][1][RTW89_KCC][1][110] = 127, -+ [1][1][2][1][RTW89_KCC][0][110] = 127, -+ [1][1][2][1][RTW89_ACMA][1][110] = 127, -+ [1][1][2][1][RTW89_ACMA][0][110] = 127, -+ [1][1][2][1][RTW89_CHILE][1][110] = 127, -+ [1][1][2][1][RTW89_QATAR][1][110] = 127, -+ [1][1][2][1][RTW89_QATAR][0][110] = 127, -+ [1][1][2][1][RTW89_UK][1][110] = 127, -+ [1][1][2][1][RTW89_UK][0][110] = 127, -+ [1][1][2][1][RTW89_FCC][1][114] = 127, -+ [1][1][2][1][RTW89_FCC][2][114] = 127, -+ [1][1][2][1][RTW89_ETSI][1][114] = 127, -+ [1][1][2][1][RTW89_ETSI][0][114] = 127, -+ [1][1][2][1][RTW89_MKK][1][114] = 127, -+ [1][1][2][1][RTW89_MKK][0][114] = 127, -+ [1][1][2][1][RTW89_IC][1][114] = 127, -+ [1][1][2][1][RTW89_KCC][1][114] = 127, -+ [1][1][2][1][RTW89_KCC][0][114] = 127, -+ [1][1][2][1][RTW89_ACMA][1][114] = 127, -+ [1][1][2][1][RTW89_ACMA][0][114] = 127, -+ [1][1][2][1][RTW89_CHILE][1][114] = 127, -+ [1][1][2][1][RTW89_QATAR][1][114] = 127, -+ [1][1][2][1][RTW89_QATAR][0][114] = 127, -+ [1][1][2][1][RTW89_UK][1][114] = 127, -+ [1][1][2][1][RTW89_UK][0][114] = 127, -+ [1][1][2][1][RTW89_FCC][1][118] = 127, -+ [1][1][2][1][RTW89_FCC][2][118] = 127, -+ [1][1][2][1][RTW89_ETSI][1][118] = 127, -+ [1][1][2][1][RTW89_ETSI][0][118] = 127, -+ [1][1][2][1][RTW89_MKK][1][118] = 127, -+ [1][1][2][1][RTW89_MKK][0][118] = 127, -+ [1][1][2][1][RTW89_IC][1][118] = 127, -+ [1][1][2][1][RTW89_KCC][1][118] = 127, -+ [1][1][2][1][RTW89_KCC][0][118] = 127, -+ [1][1][2][1][RTW89_ACMA][1][118] = 127, -+ [1][1][2][1][RTW89_ACMA][0][118] = 127, -+ [1][1][2][1][RTW89_CHILE][1][118] = 127, -+ [1][1][2][1][RTW89_QATAR][1][118] = 127, -+ [1][1][2][1][RTW89_QATAR][0][118] = 127, -+ [1][1][2][1][RTW89_UK][1][118] = 127, -+ [1][1][2][1][RTW89_UK][0][118] = 127, -+ [2][0][2][0][RTW89_FCC][1][3] = 46, -+ [2][0][2][0][RTW89_FCC][2][3] = 60, -+ [2][0][2][0][RTW89_ETSI][1][3] = 58, -+ [2][0][2][0][RTW89_ETSI][0][3] = 30, -+ [2][0][2][0][RTW89_MKK][1][3] = 58, -+ [2][0][2][0][RTW89_MKK][0][3] = 26, -+ [2][0][2][0][RTW89_IC][1][3] = 46, -+ [2][0][2][0][RTW89_KCC][1][3] = 50, -+ [2][0][2][0][RTW89_KCC][0][3] = 24, -+ [2][0][2][0][RTW89_ACMA][1][3] = 58, -+ [2][0][2][0][RTW89_ACMA][0][3] = 30, -+ [2][0][2][0][RTW89_CHILE][1][3] = 46, -+ [2][0][2][0][RTW89_QATAR][1][3] = 58, -+ [2][0][2][0][RTW89_QATAR][0][3] = 30, -+ [2][0][2][0][RTW89_UK][1][3] = 58, -+ [2][0][2][0][RTW89_UK][0][3] = 30, -+ [2][0][2][0][RTW89_FCC][1][11] = 46, -+ [2][0][2][0][RTW89_FCC][2][11] = 60, -+ [2][0][2][0][RTW89_ETSI][1][11] = 58, -+ [2][0][2][0][RTW89_ETSI][0][11] = 30, -+ [2][0][2][0][RTW89_MKK][1][11] = 58, -+ [2][0][2][0][RTW89_MKK][0][11] = 24, -+ [2][0][2][0][RTW89_IC][1][11] = 46, -+ [2][0][2][0][RTW89_KCC][1][11] = 50, -+ [2][0][2][0][RTW89_KCC][0][11] = 24, -+ [2][0][2][0][RTW89_ACMA][1][11] = 58, -+ [2][0][2][0][RTW89_ACMA][0][11] = 30, -+ [2][0][2][0][RTW89_CHILE][1][11] = 46, -+ [2][0][2][0][RTW89_QATAR][1][11] = 58, -+ [2][0][2][0][RTW89_QATAR][0][11] = 30, -+ [2][0][2][0][RTW89_UK][1][11] = 58, -+ [2][0][2][0][RTW89_UK][0][11] = 30, -+ [2][0][2][0][RTW89_FCC][1][18] = 46, -+ [2][0][2][0][RTW89_FCC][2][18] = 60, -+ [2][0][2][0][RTW89_ETSI][1][18] = 58, -+ [2][0][2][0][RTW89_ETSI][0][18] = 30, -+ [2][0][2][0][RTW89_MKK][1][18] = 58, -+ [2][0][2][0][RTW89_MKK][0][18] = 24, -+ [2][0][2][0][RTW89_IC][1][18] = 46, -+ [2][0][2][0][RTW89_KCC][1][18] = 50, -+ [2][0][2][0][RTW89_KCC][0][18] = 24, -+ [2][0][2][0][RTW89_ACMA][1][18] = 58, -+ [2][0][2][0][RTW89_ACMA][0][18] = 30, -+ [2][0][2][0][RTW89_CHILE][1][18] = 46, -+ [2][0][2][0][RTW89_QATAR][1][18] = 58, -+ [2][0][2][0][RTW89_QATAR][0][18] = 30, -+ [2][0][2][0][RTW89_UK][1][18] = 58, -+ [2][0][2][0][RTW89_UK][0][18] = 30, -+ [2][0][2][0][RTW89_FCC][1][26] = 46, -+ [2][0][2][0][RTW89_FCC][2][26] = 60, -+ [2][0][2][0][RTW89_ETSI][1][26] = 58, -+ [2][0][2][0][RTW89_ETSI][0][26] = 30, -+ [2][0][2][0][RTW89_MKK][1][26] = 58, -+ [2][0][2][0][RTW89_MKK][0][26] = 24, -+ [2][0][2][0][RTW89_IC][1][26] = 46, -+ [2][0][2][0][RTW89_KCC][1][26] = 50, -+ [2][0][2][0][RTW89_KCC][0][26] = 26, -+ [2][0][2][0][RTW89_ACMA][1][26] = 58, -+ [2][0][2][0][RTW89_ACMA][0][26] = 30, -+ [2][0][2][0][RTW89_CHILE][1][26] = 46, -+ [2][0][2][0][RTW89_QATAR][1][26] = 58, -+ [2][0][2][0][RTW89_QATAR][0][26] = 30, -+ [2][0][2][0][RTW89_UK][1][26] = 58, -+ [2][0][2][0][RTW89_UK][0][26] = 30, -+ [2][0][2][0][RTW89_FCC][1][33] = 46, -+ [2][0][2][0][RTW89_FCC][2][33] = 60, -+ [2][0][2][0][RTW89_ETSI][1][33] = 58, -+ [2][0][2][0][RTW89_ETSI][0][33] = 30, -+ [2][0][2][0][RTW89_MKK][1][33] = 58, -+ [2][0][2][0][RTW89_MKK][0][33] = 24, -+ [2][0][2][0][RTW89_IC][1][33] = 46, -+ [2][0][2][0][RTW89_KCC][1][33] = 50, -+ [2][0][2][0][RTW89_KCC][0][33] = 24, -+ [2][0][2][0][RTW89_ACMA][1][33] = 58, -+ [2][0][2][0][RTW89_ACMA][0][33] = 30, -+ [2][0][2][0][RTW89_CHILE][1][33] = 46, -+ [2][0][2][0][RTW89_QATAR][1][33] = 58, -+ [2][0][2][0][RTW89_QATAR][0][33] = 30, -+ [2][0][2][0][RTW89_UK][1][33] = 58, -+ [2][0][2][0][RTW89_UK][0][33] = 30, -+ [2][0][2][0][RTW89_FCC][1][41] = 46, -+ [2][0][2][0][RTW89_FCC][2][41] = 60, -+ [2][0][2][0][RTW89_ETSI][1][41] = 58, -+ [2][0][2][0][RTW89_ETSI][0][41] = 30, -+ [2][0][2][0][RTW89_MKK][1][41] = 58, -+ [2][0][2][0][RTW89_MKK][0][41] = 24, -+ [2][0][2][0][RTW89_IC][1][41] = 46, -+ [2][0][2][0][RTW89_KCC][1][41] = 50, -+ [2][0][2][0][RTW89_KCC][0][41] = 24, -+ [2][0][2][0][RTW89_ACMA][1][41] = 58, -+ [2][0][2][0][RTW89_ACMA][0][41] = 30, -+ [2][0][2][0][RTW89_CHILE][1][41] = 46, -+ [2][0][2][0][RTW89_QATAR][1][41] = 58, -+ [2][0][2][0][RTW89_QATAR][0][41] = 30, -+ [2][0][2][0][RTW89_UK][1][41] = 58, -+ [2][0][2][0][RTW89_UK][0][41] = 30, -+ [2][0][2][0][RTW89_FCC][1][48] = 46, -+ [2][0][2][0][RTW89_FCC][2][48] = 127, -+ [2][0][2][0][RTW89_ETSI][1][48] = 127, -+ [2][0][2][0][RTW89_ETSI][0][48] = 127, -+ [2][0][2][0][RTW89_MKK][1][48] = 127, -+ [2][0][2][0][RTW89_MKK][0][48] = 127, -+ [2][0][2][0][RTW89_IC][1][48] = 46, -+ [2][0][2][0][RTW89_KCC][1][48] = 48, -+ [2][0][2][0][RTW89_KCC][0][48] = 127, -+ [2][0][2][0][RTW89_ACMA][1][48] = 127, -+ [2][0][2][0][RTW89_ACMA][0][48] = 127, -+ [2][0][2][0][RTW89_CHILE][1][48] = 46, -+ [2][0][2][0][RTW89_QATAR][1][48] = 127, -+ [2][0][2][0][RTW89_QATAR][0][48] = 127, -+ [2][0][2][0][RTW89_UK][1][48] = 127, -+ [2][0][2][0][RTW89_UK][0][48] = 127, -+ [2][0][2][0][RTW89_FCC][1][56] = 46, -+ [2][0][2][0][RTW89_FCC][2][56] = 127, -+ [2][0][2][0][RTW89_ETSI][1][56] = 127, -+ [2][0][2][0][RTW89_ETSI][0][56] = 127, -+ [2][0][2][0][RTW89_MKK][1][56] = 127, -+ [2][0][2][0][RTW89_MKK][0][56] = 127, -+ [2][0][2][0][RTW89_IC][1][56] = 46, -+ [2][0][2][0][RTW89_KCC][1][56] = 48, -+ [2][0][2][0][RTW89_KCC][0][56] = 127, -+ [2][0][2][0][RTW89_ACMA][1][56] = 127, -+ [2][0][2][0][RTW89_ACMA][0][56] = 127, -+ [2][0][2][0][RTW89_CHILE][1][56] = 46, -+ [2][0][2][0][RTW89_QATAR][1][56] = 127, -+ [2][0][2][0][RTW89_QATAR][0][56] = 127, -+ [2][0][2][0][RTW89_UK][1][56] = 127, -+ [2][0][2][0][RTW89_UK][0][56] = 127, -+ [2][0][2][0][RTW89_FCC][1][63] = 46, -+ [2][0][2][0][RTW89_FCC][2][63] = 58, -+ [2][0][2][0][RTW89_ETSI][1][63] = 127, -+ [2][0][2][0][RTW89_ETSI][0][63] = 127, -+ [2][0][2][0][RTW89_MKK][1][63] = 127, -+ [2][0][2][0][RTW89_MKK][0][63] = 127, -+ [2][0][2][0][RTW89_IC][1][63] = 46, -+ [2][0][2][0][RTW89_KCC][1][63] = 48, -+ [2][0][2][0][RTW89_KCC][0][63] = 127, -+ [2][0][2][0][RTW89_ACMA][1][63] = 127, -+ [2][0][2][0][RTW89_ACMA][0][63] = 127, -+ [2][0][2][0][RTW89_CHILE][1][63] = 46, -+ [2][0][2][0][RTW89_QATAR][1][63] = 127, -+ [2][0][2][0][RTW89_QATAR][0][63] = 127, -+ [2][0][2][0][RTW89_UK][1][63] = 127, -+ [2][0][2][0][RTW89_UK][0][63] = 127, -+ [2][0][2][0][RTW89_FCC][1][71] = 46, -+ [2][0][2][0][RTW89_FCC][2][71] = 58, -+ [2][0][2][0][RTW89_ETSI][1][71] = 127, -+ [2][0][2][0][RTW89_ETSI][0][71] = 127, -+ [2][0][2][0][RTW89_MKK][1][71] = 127, -+ [2][0][2][0][RTW89_MKK][0][71] = 127, -+ [2][0][2][0][RTW89_IC][1][71] = 46, -+ [2][0][2][0][RTW89_KCC][1][71] = 48, -+ [2][0][2][0][RTW89_KCC][0][71] = 127, -+ [2][0][2][0][RTW89_ACMA][1][71] = 127, -+ [2][0][2][0][RTW89_ACMA][0][71] = 127, -+ [2][0][2][0][RTW89_CHILE][1][71] = 46, -+ [2][0][2][0][RTW89_QATAR][1][71] = 127, -+ [2][0][2][0][RTW89_QATAR][0][71] = 127, -+ [2][0][2][0][RTW89_UK][1][71] = 127, -+ [2][0][2][0][RTW89_UK][0][71] = 127, -+ [2][0][2][0][RTW89_FCC][1][78] = 46, -+ [2][0][2][0][RTW89_FCC][2][78] = 58, -+ [2][0][2][0][RTW89_ETSI][1][78] = 127, -+ [2][0][2][0][RTW89_ETSI][0][78] = 127, -+ [2][0][2][0][RTW89_MKK][1][78] = 127, -+ [2][0][2][0][RTW89_MKK][0][78] = 127, -+ [2][0][2][0][RTW89_IC][1][78] = 46, -+ [2][0][2][0][RTW89_KCC][1][78] = 52, -+ [2][0][2][0][RTW89_KCC][0][78] = 127, -+ [2][0][2][0][RTW89_ACMA][1][78] = 127, -+ [2][0][2][0][RTW89_ACMA][0][78] = 127, -+ [2][0][2][0][RTW89_CHILE][1][78] = 46, -+ [2][0][2][0][RTW89_QATAR][1][78] = 127, -+ [2][0][2][0][RTW89_QATAR][0][78] = 127, -+ [2][0][2][0][RTW89_UK][1][78] = 127, -+ [2][0][2][0][RTW89_UK][0][78] = 127, -+ [2][0][2][0][RTW89_FCC][1][86] = 46, -+ [2][0][2][0][RTW89_FCC][2][86] = 127, -+ [2][0][2][0][RTW89_ETSI][1][86] = 127, -+ [2][0][2][0][RTW89_ETSI][0][86] = 127, -+ [2][0][2][0][RTW89_MKK][1][86] = 127, -+ [2][0][2][0][RTW89_MKK][0][86] = 127, -+ [2][0][2][0][RTW89_IC][1][86] = 46, -+ [2][0][2][0][RTW89_KCC][1][86] = 52, -+ [2][0][2][0][RTW89_KCC][0][86] = 127, -+ [2][0][2][0][RTW89_ACMA][1][86] = 127, -+ [2][0][2][0][RTW89_ACMA][0][86] = 127, -+ [2][0][2][0][RTW89_CHILE][1][86] = 46, -+ [2][0][2][0][RTW89_QATAR][1][86] = 127, -+ [2][0][2][0][RTW89_QATAR][0][86] = 127, -+ [2][0][2][0][RTW89_UK][1][86] = 127, -+ [2][0][2][0][RTW89_UK][0][86] = 127, -+ [2][0][2][0][RTW89_FCC][1][93] = 46, -+ [2][0][2][0][RTW89_FCC][2][93] = 127, -+ [2][0][2][0][RTW89_ETSI][1][93] = 127, -+ [2][0][2][0][RTW89_ETSI][0][93] = 127, -+ [2][0][2][0][RTW89_MKK][1][93] = 127, -+ [2][0][2][0][RTW89_MKK][0][93] = 127, -+ [2][0][2][0][RTW89_IC][1][93] = 46, -+ [2][0][2][0][RTW89_KCC][1][93] = 50, -+ [2][0][2][0][RTW89_KCC][0][93] = 127, -+ [2][0][2][0][RTW89_ACMA][1][93] = 127, -+ [2][0][2][0][RTW89_ACMA][0][93] = 127, -+ [2][0][2][0][RTW89_CHILE][1][93] = 46, -+ [2][0][2][0][RTW89_QATAR][1][93] = 127, -+ [2][0][2][0][RTW89_QATAR][0][93] = 127, -+ [2][0][2][0][RTW89_UK][1][93] = 127, -+ [2][0][2][0][RTW89_UK][0][93] = 127, -+ [2][0][2][0][RTW89_FCC][1][101] = 44, -+ [2][0][2][0][RTW89_FCC][2][101] = 127, -+ [2][0][2][0][RTW89_ETSI][1][101] = 127, -+ [2][0][2][0][RTW89_ETSI][0][101] = 127, -+ [2][0][2][0][RTW89_MKK][1][101] = 127, -+ [2][0][2][0][RTW89_MKK][0][101] = 127, -+ [2][0][2][0][RTW89_IC][1][101] = 44, -+ [2][0][2][0][RTW89_KCC][1][101] = 50, -+ [2][0][2][0][RTW89_KCC][0][101] = 127, -+ [2][0][2][0][RTW89_ACMA][1][101] = 127, -+ [2][0][2][0][RTW89_ACMA][0][101] = 127, -+ [2][0][2][0][RTW89_CHILE][1][101] = 44, -+ [2][0][2][0][RTW89_QATAR][1][101] = 127, -+ [2][0][2][0][RTW89_QATAR][0][101] = 127, -+ [2][0][2][0][RTW89_UK][1][101] = 127, -+ [2][0][2][0][RTW89_UK][0][101] = 127, -+ [2][0][2][0][RTW89_FCC][1][108] = 127, -+ [2][0][2][0][RTW89_FCC][2][108] = 127, -+ [2][0][2][0][RTW89_ETSI][1][108] = 127, -+ [2][0][2][0][RTW89_ETSI][0][108] = 127, -+ [2][0][2][0][RTW89_MKK][1][108] = 127, -+ [2][0][2][0][RTW89_MKK][0][108] = 127, -+ [2][0][2][0][RTW89_IC][1][108] = 127, -+ [2][0][2][0][RTW89_KCC][1][108] = 127, -+ [2][0][2][0][RTW89_KCC][0][108] = 127, -+ [2][0][2][0][RTW89_ACMA][1][108] = 127, -+ [2][0][2][0][RTW89_ACMA][0][108] = 127, -+ [2][0][2][0][RTW89_CHILE][1][108] = 127, -+ [2][0][2][0][RTW89_QATAR][1][108] = 127, -+ [2][0][2][0][RTW89_QATAR][0][108] = 127, -+ [2][0][2][0][RTW89_UK][1][108] = 127, -+ [2][0][2][0][RTW89_UK][0][108] = 127, -+ [2][0][2][0][RTW89_FCC][1][116] = 127, -+ [2][0][2][0][RTW89_FCC][2][116] = 127, -+ [2][0][2][0][RTW89_ETSI][1][116] = 127, -+ [2][0][2][0][RTW89_ETSI][0][116] = 127, -+ [2][0][2][0][RTW89_MKK][1][116] = 127, -+ [2][0][2][0][RTW89_MKK][0][116] = 127, -+ [2][0][2][0][RTW89_IC][1][116] = 127, -+ [2][0][2][0][RTW89_KCC][1][116] = 127, -+ [2][0][2][0][RTW89_KCC][0][116] = 127, -+ [2][0][2][0][RTW89_ACMA][1][116] = 127, -+ [2][0][2][0][RTW89_ACMA][0][116] = 127, -+ [2][0][2][0][RTW89_CHILE][1][116] = 127, -+ [2][0][2][0][RTW89_QATAR][1][116] = 127, -+ [2][0][2][0][RTW89_QATAR][0][116] = 127, -+ [2][0][2][0][RTW89_UK][1][116] = 127, -+ [2][0][2][0][RTW89_UK][0][116] = 127, -+ [2][1][2][0][RTW89_FCC][1][3] = 22, -+ [2][1][2][0][RTW89_FCC][2][3] = 50, -+ [2][1][2][0][RTW89_ETSI][1][3] = 54, -+ [2][1][2][0][RTW89_ETSI][0][3] = 16, -+ [2][1][2][0][RTW89_MKK][1][3] = 52, -+ [2][1][2][0][RTW89_MKK][0][3] = 14, -+ [2][1][2][0][RTW89_IC][1][3] = 22, -+ [2][1][2][0][RTW89_KCC][1][3] = 38, -+ [2][1][2][0][RTW89_KCC][0][3] = 12, -+ [2][1][2][0][RTW89_ACMA][1][3] = 54, -+ [2][1][2][0][RTW89_ACMA][0][3] = 16, -+ [2][1][2][0][RTW89_CHILE][1][3] = 22, -+ [2][1][2][0][RTW89_QATAR][1][3] = 54, -+ [2][1][2][0][RTW89_QATAR][0][3] = 16, -+ [2][1][2][0][RTW89_UK][1][3] = 54, -+ [2][1][2][0][RTW89_UK][0][3] = 16, -+ [2][1][2][0][RTW89_FCC][1][11] = 20, -+ [2][1][2][0][RTW89_FCC][2][11] = 50, -+ [2][1][2][0][RTW89_ETSI][1][11] = 54, -+ [2][1][2][0][RTW89_ETSI][0][11] = 16, -+ [2][1][2][0][RTW89_MKK][1][11] = 52, -+ [2][1][2][0][RTW89_MKK][0][11] = 12, -+ [2][1][2][0][RTW89_IC][1][11] = 20, -+ [2][1][2][0][RTW89_KCC][1][11] = 38, -+ [2][1][2][0][RTW89_KCC][0][11] = 12, -+ [2][1][2][0][RTW89_ACMA][1][11] = 54, -+ [2][1][2][0][RTW89_ACMA][0][11] = 16, -+ [2][1][2][0][RTW89_CHILE][1][11] = 20, -+ [2][1][2][0][RTW89_QATAR][1][11] = 54, -+ [2][1][2][0][RTW89_QATAR][0][11] = 16, -+ [2][1][2][0][RTW89_UK][1][11] = 54, -+ [2][1][2][0][RTW89_UK][0][11] = 16, -+ [2][1][2][0][RTW89_FCC][1][18] = 20, -+ [2][1][2][0][RTW89_FCC][2][18] = 50, -+ [2][1][2][0][RTW89_ETSI][1][18] = 54, -+ [2][1][2][0][RTW89_ETSI][0][18] = 16, -+ [2][1][2][0][RTW89_MKK][1][18] = 52, -+ [2][1][2][0][RTW89_MKK][0][18] = 12, -+ [2][1][2][0][RTW89_IC][1][18] = 20, -+ [2][1][2][0][RTW89_KCC][1][18] = 38, -+ [2][1][2][0][RTW89_KCC][0][18] = 12, -+ [2][1][2][0][RTW89_ACMA][1][18] = 54, -+ [2][1][2][0][RTW89_ACMA][0][18] = 16, -+ [2][1][2][0][RTW89_CHILE][1][18] = 20, -+ [2][1][2][0][RTW89_QATAR][1][18] = 54, -+ [2][1][2][0][RTW89_QATAR][0][18] = 16, -+ [2][1][2][0][RTW89_UK][1][18] = 54, -+ [2][1][2][0][RTW89_UK][0][18] = 16, -+ [2][1][2][0][RTW89_FCC][1][26] = 20, -+ [2][1][2][0][RTW89_FCC][2][26] = 60, -+ [2][1][2][0][RTW89_ETSI][1][26] = 54, -+ [2][1][2][0][RTW89_ETSI][0][26] = 16, -+ [2][1][2][0][RTW89_MKK][1][26] = 52, -+ [2][1][2][0][RTW89_MKK][0][26] = 12, -+ [2][1][2][0][RTW89_IC][1][26] = 20, -+ [2][1][2][0][RTW89_KCC][1][26] = 38, -+ [2][1][2][0][RTW89_KCC][0][26] = 12, -+ [2][1][2][0][RTW89_ACMA][1][26] = 54, -+ [2][1][2][0][RTW89_ACMA][0][26] = 16, -+ [2][1][2][0][RTW89_CHILE][1][26] = 20, -+ [2][1][2][0][RTW89_QATAR][1][26] = 54, -+ [2][1][2][0][RTW89_QATAR][0][26] = 16, -+ [2][1][2][0][RTW89_UK][1][26] = 54, -+ [2][1][2][0][RTW89_UK][0][26] = 16, -+ [2][1][2][0][RTW89_FCC][1][33] = 20, -+ [2][1][2][0][RTW89_FCC][2][33] = 60, -+ [2][1][2][0][RTW89_ETSI][1][33] = 54, -+ [2][1][2][0][RTW89_ETSI][0][33] = 16, -+ [2][1][2][0][RTW89_MKK][1][33] = 48, -+ [2][1][2][0][RTW89_MKK][0][33] = 12, -+ [2][1][2][0][RTW89_IC][1][33] = 20, -+ [2][1][2][0][RTW89_KCC][1][33] = 38, -+ [2][1][2][0][RTW89_KCC][0][33] = 12, -+ [2][1][2][0][RTW89_ACMA][1][33] = 54, -+ [2][1][2][0][RTW89_ACMA][0][33] = 16, -+ [2][1][2][0][RTW89_CHILE][1][33] = 20, -+ [2][1][2][0][RTW89_QATAR][1][33] = 54, -+ [2][1][2][0][RTW89_QATAR][0][33] = 16, -+ [2][1][2][0][RTW89_UK][1][33] = 54, -+ [2][1][2][0][RTW89_UK][0][33] = 16, -+ [2][1][2][0][RTW89_FCC][1][41] = 22, -+ [2][1][2][0][RTW89_FCC][2][41] = 60, -+ [2][1][2][0][RTW89_ETSI][1][41] = 54, -+ [2][1][2][0][RTW89_ETSI][0][41] = 18, -+ [2][1][2][0][RTW89_MKK][1][41] = 48, -+ [2][1][2][0][RTW89_MKK][0][41] = 12, -+ [2][1][2][0][RTW89_IC][1][41] = 22, -+ [2][1][2][0][RTW89_KCC][1][41] = 38, -+ [2][1][2][0][RTW89_KCC][0][41] = 12, -+ [2][1][2][0][RTW89_ACMA][1][41] = 54, -+ [2][1][2][0][RTW89_ACMA][0][41] = 18, -+ [2][1][2][0][RTW89_CHILE][1][41] = 22, -+ [2][1][2][0][RTW89_QATAR][1][41] = 54, -+ [2][1][2][0][RTW89_QATAR][0][41] = 18, -+ [2][1][2][0][RTW89_UK][1][41] = 54, -+ [2][1][2][0][RTW89_UK][0][41] = 18, -+ [2][1][2][0][RTW89_FCC][1][48] = 22, -+ [2][1][2][0][RTW89_FCC][2][48] = 127, -+ [2][1][2][0][RTW89_ETSI][1][48] = 127, -+ [2][1][2][0][RTW89_ETSI][0][48] = 127, -+ [2][1][2][0][RTW89_MKK][1][48] = 127, -+ [2][1][2][0][RTW89_MKK][0][48] = 127, -+ [2][1][2][0][RTW89_IC][1][48] = 22, -+ [2][1][2][0][RTW89_KCC][1][48] = 38, -+ [2][1][2][0][RTW89_KCC][0][48] = 127, -+ [2][1][2][0][RTW89_ACMA][1][48] = 127, -+ [2][1][2][0][RTW89_ACMA][0][48] = 127, -+ [2][1][2][0][RTW89_CHILE][1][48] = 22, -+ [2][1][2][0][RTW89_QATAR][1][48] = 127, -+ [2][1][2][0][RTW89_QATAR][0][48] = 127, -+ [2][1][2][0][RTW89_UK][1][48] = 127, -+ [2][1][2][0][RTW89_UK][0][48] = 127, -+ [2][1][2][0][RTW89_FCC][1][56] = 20, -+ [2][1][2][0][RTW89_FCC][2][56] = 127, -+ [2][1][2][0][RTW89_ETSI][1][56] = 127, -+ [2][1][2][0][RTW89_ETSI][0][56] = 127, -+ [2][1][2][0][RTW89_MKK][1][56] = 127, -+ [2][1][2][0][RTW89_MKK][0][56] = 127, -+ [2][1][2][0][RTW89_IC][1][56] = 20, -+ [2][1][2][0][RTW89_KCC][1][56] = 38, -+ [2][1][2][0][RTW89_KCC][0][56] = 127, -+ [2][1][2][0][RTW89_ACMA][1][56] = 127, -+ [2][1][2][0][RTW89_ACMA][0][56] = 127, -+ [2][1][2][0][RTW89_CHILE][1][56] = 20, -+ [2][1][2][0][RTW89_QATAR][1][56] = 127, -+ [2][1][2][0][RTW89_QATAR][0][56] = 127, -+ [2][1][2][0][RTW89_UK][1][56] = 127, -+ [2][1][2][0][RTW89_UK][0][56] = 127, -+ [2][1][2][0][RTW89_FCC][1][63] = 22, -+ [2][1][2][0][RTW89_FCC][2][63] = 58, -+ [2][1][2][0][RTW89_ETSI][1][63] = 127, -+ [2][1][2][0][RTW89_ETSI][0][63] = 127, -+ [2][1][2][0][RTW89_MKK][1][63] = 127, -+ [2][1][2][0][RTW89_MKK][0][63] = 127, -+ [2][1][2][0][RTW89_IC][1][63] = 22, -+ [2][1][2][0][RTW89_KCC][1][63] = 38, -+ [2][1][2][0][RTW89_KCC][0][63] = 127, -+ [2][1][2][0][RTW89_ACMA][1][63] = 127, -+ [2][1][2][0][RTW89_ACMA][0][63] = 127, -+ [2][1][2][0][RTW89_CHILE][1][63] = 22, -+ [2][1][2][0][RTW89_QATAR][1][63] = 127, -+ [2][1][2][0][RTW89_QATAR][0][63] = 127, -+ [2][1][2][0][RTW89_UK][1][63] = 127, -+ [2][1][2][0][RTW89_UK][0][63] = 127, -+ [2][1][2][0][RTW89_FCC][1][71] = 20, -+ [2][1][2][0][RTW89_FCC][2][71] = 58, -+ [2][1][2][0][RTW89_ETSI][1][71] = 127, -+ [2][1][2][0][RTW89_ETSI][0][71] = 127, -+ [2][1][2][0][RTW89_MKK][1][71] = 127, -+ [2][1][2][0][RTW89_MKK][0][71] = 127, -+ [2][1][2][0][RTW89_IC][1][71] = 20, -+ [2][1][2][0][RTW89_KCC][1][71] = 38, -+ [2][1][2][0][RTW89_KCC][0][71] = 127, -+ [2][1][2][0][RTW89_ACMA][1][71] = 127, -+ [2][1][2][0][RTW89_ACMA][0][71] = 127, -+ [2][1][2][0][RTW89_CHILE][1][71] = 20, -+ [2][1][2][0][RTW89_QATAR][1][71] = 127, -+ [2][1][2][0][RTW89_QATAR][0][71] = 127, -+ [2][1][2][0][RTW89_UK][1][71] = 127, -+ [2][1][2][0][RTW89_UK][0][71] = 127, -+ [2][1][2][0][RTW89_FCC][1][78] = 20, -+ [2][1][2][0][RTW89_FCC][2][78] = 58, -+ [2][1][2][0][RTW89_ETSI][1][78] = 127, -+ [2][1][2][0][RTW89_ETSI][0][78] = 127, -+ [2][1][2][0][RTW89_MKK][1][78] = 127, -+ [2][1][2][0][RTW89_MKK][0][78] = 127, -+ [2][1][2][0][RTW89_IC][1][78] = 20, -+ [2][1][2][0][RTW89_KCC][1][78] = 38, -+ [2][1][2][0][RTW89_KCC][0][78] = 127, -+ [2][1][2][0][RTW89_ACMA][1][78] = 127, -+ [2][1][2][0][RTW89_ACMA][0][78] = 127, -+ [2][1][2][0][RTW89_CHILE][1][78] = 20, -+ [2][1][2][0][RTW89_QATAR][1][78] = 127, -+ [2][1][2][0][RTW89_QATAR][0][78] = 127, -+ [2][1][2][0][RTW89_UK][1][78] = 127, -+ [2][1][2][0][RTW89_UK][0][78] = 127, -+ [2][1][2][0][RTW89_FCC][1][86] = 20, -+ [2][1][2][0][RTW89_FCC][2][86] = 127, -+ [2][1][2][0][RTW89_ETSI][1][86] = 127, -+ [2][1][2][0][RTW89_ETSI][0][86] = 127, -+ [2][1][2][0][RTW89_MKK][1][86] = 127, -+ [2][1][2][0][RTW89_MKK][0][86] = 127, -+ [2][1][2][0][RTW89_IC][1][86] = 20, -+ [2][1][2][0][RTW89_KCC][1][86] = 38, -+ [2][1][2][0][RTW89_KCC][0][86] = 127, -+ [2][1][2][0][RTW89_ACMA][1][86] = 127, -+ [2][1][2][0][RTW89_ACMA][0][86] = 127, -+ [2][1][2][0][RTW89_CHILE][1][86] = 20, -+ [2][1][2][0][RTW89_QATAR][1][86] = 127, -+ [2][1][2][0][RTW89_QATAR][0][86] = 127, -+ [2][1][2][0][RTW89_UK][1][86] = 127, -+ [2][1][2][0][RTW89_UK][0][86] = 127, -+ [2][1][2][0][RTW89_FCC][1][93] = 22, -+ [2][1][2][0][RTW89_FCC][2][93] = 127, -+ [2][1][2][0][RTW89_ETSI][1][93] = 127, -+ [2][1][2][0][RTW89_ETSI][0][93] = 127, -+ [2][1][2][0][RTW89_MKK][1][93] = 127, -+ [2][1][2][0][RTW89_MKK][0][93] = 127, -+ [2][1][2][0][RTW89_IC][1][93] = 22, -+ [2][1][2][0][RTW89_KCC][1][93] = 38, -+ [2][1][2][0][RTW89_KCC][0][93] = 127, -+ [2][1][2][0][RTW89_ACMA][1][93] = 127, -+ [2][1][2][0][RTW89_ACMA][0][93] = 127, -+ [2][1][2][0][RTW89_CHILE][1][93] = 22, -+ [2][1][2][0][RTW89_QATAR][1][93] = 127, -+ [2][1][2][0][RTW89_QATAR][0][93] = 127, -+ [2][1][2][0][RTW89_UK][1][93] = 127, -+ [2][1][2][0][RTW89_UK][0][93] = 127, -+ [2][1][2][0][RTW89_FCC][1][101] = 22, -+ [2][1][2][0][RTW89_FCC][2][101] = 127, -+ [2][1][2][0][RTW89_ETSI][1][101] = 127, -+ [2][1][2][0][RTW89_ETSI][0][101] = 127, -+ [2][1][2][0][RTW89_MKK][1][101] = 127, -+ [2][1][2][0][RTW89_MKK][0][101] = 127, -+ [2][1][2][0][RTW89_IC][1][101] = 22, -+ [2][1][2][0][RTW89_KCC][1][101] = 38, -+ [2][1][2][0][RTW89_KCC][0][101] = 127, -+ [2][1][2][0][RTW89_ACMA][1][101] = 127, -+ [2][1][2][0][RTW89_ACMA][0][101] = 127, -+ [2][1][2][0][RTW89_CHILE][1][101] = 22, -+ [2][1][2][0][RTW89_QATAR][1][101] = 127, -+ [2][1][2][0][RTW89_QATAR][0][101] = 127, -+ [2][1][2][0][RTW89_UK][1][101] = 127, -+ [2][1][2][0][RTW89_UK][0][101] = 127, -+ [2][1][2][0][RTW89_FCC][1][108] = 127, -+ [2][1][2][0][RTW89_FCC][2][108] = 127, -+ [2][1][2][0][RTW89_ETSI][1][108] = 127, -+ [2][1][2][0][RTW89_ETSI][0][108] = 127, -+ [2][1][2][0][RTW89_MKK][1][108] = 127, -+ [2][1][2][0][RTW89_MKK][0][108] = 127, -+ [2][1][2][0][RTW89_IC][1][108] = 127, -+ [2][1][2][0][RTW89_KCC][1][108] = 127, -+ [2][1][2][0][RTW89_KCC][0][108] = 127, -+ [2][1][2][0][RTW89_ACMA][1][108] = 127, -+ [2][1][2][0][RTW89_ACMA][0][108] = 127, -+ [2][1][2][0][RTW89_CHILE][1][108] = 127, -+ [2][1][2][0][RTW89_QATAR][1][108] = 127, -+ [2][1][2][0][RTW89_QATAR][0][108] = 127, -+ [2][1][2][0][RTW89_UK][1][108] = 127, -+ [2][1][2][0][RTW89_UK][0][108] = 127, -+ [2][1][2][0][RTW89_FCC][1][116] = 127, -+ [2][1][2][0][RTW89_FCC][2][116] = 127, -+ [2][1][2][0][RTW89_ETSI][1][116] = 127, -+ [2][1][2][0][RTW89_ETSI][0][116] = 127, -+ [2][1][2][0][RTW89_MKK][1][116] = 127, -+ [2][1][2][0][RTW89_MKK][0][116] = 127, -+ [2][1][2][0][RTW89_IC][1][116] = 127, -+ [2][1][2][0][RTW89_KCC][1][116] = 127, -+ [2][1][2][0][RTW89_KCC][0][116] = 127, -+ [2][1][2][0][RTW89_ACMA][1][116] = 127, -+ [2][1][2][0][RTW89_ACMA][0][116] = 127, -+ [2][1][2][0][RTW89_CHILE][1][116] = 127, -+ [2][1][2][0][RTW89_QATAR][1][116] = 127, -+ [2][1][2][0][RTW89_QATAR][0][116] = 127, -+ [2][1][2][0][RTW89_UK][1][116] = 127, -+ [2][1][2][0][RTW89_UK][0][116] = 127, -+ [2][1][2][1][RTW89_FCC][1][3] = 22, -+ [2][1][2][1][RTW89_FCC][2][3] = 50, -+ [2][1][2][1][RTW89_ETSI][1][3] = 42, -+ [2][1][2][1][RTW89_ETSI][0][3] = 6, -+ [2][1][2][1][RTW89_MKK][1][3] = 52, -+ [2][1][2][1][RTW89_MKK][0][3] = 14, -+ [2][1][2][1][RTW89_IC][1][3] = 22, -+ [2][1][2][1][RTW89_KCC][1][3] = 38, -+ [2][1][2][1][RTW89_KCC][0][3] = 12, -+ [2][1][2][1][RTW89_ACMA][1][3] = 42, -+ [2][1][2][1][RTW89_ACMA][0][3] = 6, -+ [2][1][2][1][RTW89_CHILE][1][3] = 22, -+ [2][1][2][1][RTW89_QATAR][1][3] = 42, -+ [2][1][2][1][RTW89_QATAR][0][3] = 6, -+ [2][1][2][1][RTW89_UK][1][3] = 42, -+ [2][1][2][1][RTW89_UK][0][3] = 6, -+ [2][1][2][1][RTW89_FCC][1][11] = 20, -+ [2][1][2][1][RTW89_FCC][2][11] = 50, -+ [2][1][2][1][RTW89_ETSI][1][11] = 42, -+ [2][1][2][1][RTW89_ETSI][0][11] = 6, -+ [2][1][2][1][RTW89_MKK][1][11] = 52, -+ [2][1][2][1][RTW89_MKK][0][11] = 12, -+ [2][1][2][1][RTW89_IC][1][11] = 20, -+ [2][1][2][1][RTW89_KCC][1][11] = 38, -+ [2][1][2][1][RTW89_KCC][0][11] = 12, -+ [2][1][2][1][RTW89_ACMA][1][11] = 42, -+ [2][1][2][1][RTW89_ACMA][0][11] = 6, -+ [2][1][2][1][RTW89_CHILE][1][11] = 20, -+ [2][1][2][1][RTW89_QATAR][1][11] = 42, -+ [2][1][2][1][RTW89_QATAR][0][11] = 6, -+ [2][1][2][1][RTW89_UK][1][11] = 42, -+ [2][1][2][1][RTW89_UK][0][11] = 6, -+ [2][1][2][1][RTW89_FCC][1][18] = 20, -+ [2][1][2][1][RTW89_FCC][2][18] = 50, -+ [2][1][2][1][RTW89_ETSI][1][18] = 42, -+ [2][1][2][1][RTW89_ETSI][0][18] = 6, -+ [2][1][2][1][RTW89_MKK][1][18] = 52, -+ [2][1][2][1][RTW89_MKK][0][18] = 12, -+ [2][1][2][1][RTW89_IC][1][18] = 20, -+ [2][1][2][1][RTW89_KCC][1][18] = 38, -+ [2][1][2][1][RTW89_KCC][0][18] = 12, -+ [2][1][2][1][RTW89_ACMA][1][18] = 42, -+ [2][1][2][1][RTW89_ACMA][0][18] = 6, -+ [2][1][2][1][RTW89_CHILE][1][18] = 20, -+ [2][1][2][1][RTW89_QATAR][1][18] = 42, -+ [2][1][2][1][RTW89_QATAR][0][18] = 6, -+ [2][1][2][1][RTW89_UK][1][18] = 42, -+ [2][1][2][1][RTW89_UK][0][18] = 6, -+ [2][1][2][1][RTW89_FCC][1][26] = 20, -+ [2][1][2][1][RTW89_FCC][2][26] = 60, -+ [2][1][2][1][RTW89_ETSI][1][26] = 42, -+ [2][1][2][1][RTW89_ETSI][0][26] = 6, -+ [2][1][2][1][RTW89_MKK][1][26] = 52, -+ [2][1][2][1][RTW89_MKK][0][26] = 12, -+ [2][1][2][1][RTW89_IC][1][26] = 20, -+ [2][1][2][1][RTW89_KCC][1][26] = 38, -+ [2][1][2][1][RTW89_KCC][0][26] = 12, -+ [2][1][2][1][RTW89_ACMA][1][26] = 42, -+ [2][1][2][1][RTW89_ACMA][0][26] = 6, -+ [2][1][2][1][RTW89_CHILE][1][26] = 20, -+ [2][1][2][1][RTW89_QATAR][1][26] = 42, -+ [2][1][2][1][RTW89_QATAR][0][26] = 6, -+ [2][1][2][1][RTW89_UK][1][26] = 42, -+ [2][1][2][1][RTW89_UK][0][26] = 6, -+ [2][1][2][1][RTW89_FCC][1][33] = 20, -+ [2][1][2][1][RTW89_FCC][2][33] = 60, -+ [2][1][2][1][RTW89_ETSI][1][33] = 42, -+ [2][1][2][1][RTW89_ETSI][0][33] = 6, -+ [2][1][2][1][RTW89_MKK][1][33] = 48, -+ [2][1][2][1][RTW89_MKK][0][33] = 12, -+ [2][1][2][1][RTW89_IC][1][33] = 20, -+ [2][1][2][1][RTW89_KCC][1][33] = 38, -+ [2][1][2][1][RTW89_KCC][0][33] = 12, -+ [2][1][2][1][RTW89_ACMA][1][33] = 42, -+ [2][1][2][1][RTW89_ACMA][0][33] = 6, -+ [2][1][2][1][RTW89_CHILE][1][33] = 20, -+ [2][1][2][1][RTW89_QATAR][1][33] = 42, -+ [2][1][2][1][RTW89_QATAR][0][33] = 6, -+ [2][1][2][1][RTW89_UK][1][33] = 42, -+ [2][1][2][1][RTW89_UK][0][33] = 6, -+ [2][1][2][1][RTW89_FCC][1][41] = 22, -+ [2][1][2][1][RTW89_FCC][2][41] = 60, -+ [2][1][2][1][RTW89_ETSI][1][41] = 42, -+ [2][1][2][1][RTW89_ETSI][0][41] = 6, -+ [2][1][2][1][RTW89_MKK][1][41] = 48, -+ [2][1][2][1][RTW89_MKK][0][41] = 12, -+ [2][1][2][1][RTW89_IC][1][41] = 22, -+ [2][1][2][1][RTW89_KCC][1][41] = 38, -+ [2][1][2][1][RTW89_KCC][0][41] = 12, -+ [2][1][2][1][RTW89_ACMA][1][41] = 42, -+ [2][1][2][1][RTW89_ACMA][0][41] = 6, -+ [2][1][2][1][RTW89_CHILE][1][41] = 22, -+ [2][1][2][1][RTW89_QATAR][1][41] = 42, -+ [2][1][2][1][RTW89_QATAR][0][41] = 6, -+ [2][1][2][1][RTW89_UK][1][41] = 42, -+ [2][1][2][1][RTW89_UK][0][41] = 6, -+ [2][1][2][1][RTW89_FCC][1][48] = 22, -+ [2][1][2][1][RTW89_FCC][2][48] = 127, -+ [2][1][2][1][RTW89_ETSI][1][48] = 127, -+ [2][1][2][1][RTW89_ETSI][0][48] = 127, -+ [2][1][2][1][RTW89_MKK][1][48] = 127, -+ [2][1][2][1][RTW89_MKK][0][48] = 127, -+ [2][1][2][1][RTW89_IC][1][48] = 22, -+ [2][1][2][1][RTW89_KCC][1][48] = 38, -+ [2][1][2][1][RTW89_KCC][0][48] = 127, -+ [2][1][2][1][RTW89_ACMA][1][48] = 127, -+ [2][1][2][1][RTW89_ACMA][0][48] = 127, -+ [2][1][2][1][RTW89_CHILE][1][48] = 22, -+ [2][1][2][1][RTW89_QATAR][1][48] = 127, -+ [2][1][2][1][RTW89_QATAR][0][48] = 127, -+ [2][1][2][1][RTW89_UK][1][48] = 127, -+ [2][1][2][1][RTW89_UK][0][48] = 127, -+ [2][1][2][1][RTW89_FCC][1][56] = 20, -+ [2][1][2][1][RTW89_FCC][2][56] = 127, -+ [2][1][2][1][RTW89_ETSI][1][56] = 127, -+ [2][1][2][1][RTW89_ETSI][0][56] = 127, -+ [2][1][2][1][RTW89_MKK][1][56] = 127, -+ [2][1][2][1][RTW89_MKK][0][56] = 127, -+ [2][1][2][1][RTW89_IC][1][56] = 20, -+ [2][1][2][1][RTW89_KCC][1][56] = 38, -+ [2][1][2][1][RTW89_KCC][0][56] = 127, -+ [2][1][2][1][RTW89_ACMA][1][56] = 127, -+ [2][1][2][1][RTW89_ACMA][0][56] = 127, -+ [2][1][2][1][RTW89_CHILE][1][56] = 20, -+ [2][1][2][1][RTW89_QATAR][1][56] = 127, -+ [2][1][2][1][RTW89_QATAR][0][56] = 127, -+ [2][1][2][1][RTW89_UK][1][56] = 127, -+ [2][1][2][1][RTW89_UK][0][56] = 127, -+ [2][1][2][1][RTW89_FCC][1][63] = 22, -+ [2][1][2][1][RTW89_FCC][2][63] = 58, -+ [2][1][2][1][RTW89_ETSI][1][63] = 127, -+ [2][1][2][1][RTW89_ETSI][0][63] = 127, -+ [2][1][2][1][RTW89_MKK][1][63] = 127, -+ [2][1][2][1][RTW89_MKK][0][63] = 127, -+ [2][1][2][1][RTW89_IC][1][63] = 22, -+ [2][1][2][1][RTW89_KCC][1][63] = 38, -+ [2][1][2][1][RTW89_KCC][0][63] = 127, -+ [2][1][2][1][RTW89_ACMA][1][63] = 127, -+ [2][1][2][1][RTW89_ACMA][0][63] = 127, -+ [2][1][2][1][RTW89_CHILE][1][63] = 22, -+ [2][1][2][1][RTW89_QATAR][1][63] = 127, -+ [2][1][2][1][RTW89_QATAR][0][63] = 127, -+ [2][1][2][1][RTW89_UK][1][63] = 127, -+ [2][1][2][1][RTW89_UK][0][63] = 127, -+ [2][1][2][1][RTW89_FCC][1][71] = 20, -+ [2][1][2][1][RTW89_FCC][2][71] = 58, -+ [2][1][2][1][RTW89_ETSI][1][71] = 127, -+ [2][1][2][1][RTW89_ETSI][0][71] = 127, -+ [2][1][2][1][RTW89_MKK][1][71] = 127, -+ [2][1][2][1][RTW89_MKK][0][71] = 127, -+ [2][1][2][1][RTW89_IC][1][71] = 20, -+ [2][1][2][1][RTW89_KCC][1][71] = 38, -+ [2][1][2][1][RTW89_KCC][0][71] = 127, -+ [2][1][2][1][RTW89_ACMA][1][71] = 127, -+ [2][1][2][1][RTW89_ACMA][0][71] = 127, -+ [2][1][2][1][RTW89_CHILE][1][71] = 20, -+ [2][1][2][1][RTW89_QATAR][1][71] = 127, -+ [2][1][2][1][RTW89_QATAR][0][71] = 127, -+ [2][1][2][1][RTW89_UK][1][71] = 127, -+ [2][1][2][1][RTW89_UK][0][71] = 127, -+ [2][1][2][1][RTW89_FCC][1][78] = 20, -+ [2][1][2][1][RTW89_FCC][2][78] = 58, -+ [2][1][2][1][RTW89_ETSI][1][78] = 127, -+ [2][1][2][1][RTW89_ETSI][0][78] = 127, -+ [2][1][2][1][RTW89_MKK][1][78] = 127, -+ [2][1][2][1][RTW89_MKK][0][78] = 127, -+ [2][1][2][1][RTW89_IC][1][78] = 20, -+ [2][1][2][1][RTW89_KCC][1][78] = 38, -+ [2][1][2][1][RTW89_KCC][0][78] = 127, -+ [2][1][2][1][RTW89_ACMA][1][78] = 127, -+ [2][1][2][1][RTW89_ACMA][0][78] = 127, -+ [2][1][2][1][RTW89_CHILE][1][78] = 20, -+ [2][1][2][1][RTW89_QATAR][1][78] = 127, -+ [2][1][2][1][RTW89_QATAR][0][78] = 127, -+ [2][1][2][1][RTW89_UK][1][78] = 127, -+ [2][1][2][1][RTW89_UK][0][78] = 127, -+ [2][1][2][1][RTW89_FCC][1][86] = 20, -+ [2][1][2][1][RTW89_FCC][2][86] = 127, -+ [2][1][2][1][RTW89_ETSI][1][86] = 127, -+ [2][1][2][1][RTW89_ETSI][0][86] = 127, -+ [2][1][2][1][RTW89_MKK][1][86] = 127, -+ [2][1][2][1][RTW89_MKK][0][86] = 127, -+ [2][1][2][1][RTW89_IC][1][86] = 20, -+ [2][1][2][1][RTW89_KCC][1][86] = 38, -+ [2][1][2][1][RTW89_KCC][0][86] = 127, -+ [2][1][2][1][RTW89_ACMA][1][86] = 127, -+ [2][1][2][1][RTW89_ACMA][0][86] = 127, -+ [2][1][2][1][RTW89_CHILE][1][86] = 20, -+ [2][1][2][1][RTW89_QATAR][1][86] = 127, -+ [2][1][2][1][RTW89_QATAR][0][86] = 127, -+ [2][1][2][1][RTW89_UK][1][86] = 127, -+ [2][1][2][1][RTW89_UK][0][86] = 127, -+ [2][1][2][1][RTW89_FCC][1][93] = 22, -+ [2][1][2][1][RTW89_FCC][2][93] = 127, -+ [2][1][2][1][RTW89_ETSI][1][93] = 127, -+ [2][1][2][1][RTW89_ETSI][0][93] = 127, -+ [2][1][2][1][RTW89_MKK][1][93] = 127, -+ [2][1][2][1][RTW89_MKK][0][93] = 127, -+ [2][1][2][1][RTW89_IC][1][93] = 22, -+ [2][1][2][1][RTW89_KCC][1][93] = 38, -+ [2][1][2][1][RTW89_KCC][0][93] = 127, -+ [2][1][2][1][RTW89_ACMA][1][93] = 127, -+ [2][1][2][1][RTW89_ACMA][0][93] = 127, -+ [2][1][2][1][RTW89_CHILE][1][93] = 22, -+ [2][1][2][1][RTW89_QATAR][1][93] = 127, -+ [2][1][2][1][RTW89_QATAR][0][93] = 127, -+ [2][1][2][1][RTW89_UK][1][93] = 127, -+ [2][1][2][1][RTW89_UK][0][93] = 127, -+ [2][1][2][1][RTW89_FCC][1][101] = 22, -+ [2][1][2][1][RTW89_FCC][2][101] = 127, -+ [2][1][2][1][RTW89_ETSI][1][101] = 127, -+ [2][1][2][1][RTW89_ETSI][0][101] = 127, -+ [2][1][2][1][RTW89_MKK][1][101] = 127, -+ [2][1][2][1][RTW89_MKK][0][101] = 127, -+ [2][1][2][1][RTW89_IC][1][101] = 22, -+ [2][1][2][1][RTW89_KCC][1][101] = 38, -+ [2][1][2][1][RTW89_KCC][0][101] = 127, -+ [2][1][2][1][RTW89_ACMA][1][101] = 127, -+ [2][1][2][1][RTW89_ACMA][0][101] = 127, -+ [2][1][2][1][RTW89_CHILE][1][101] = 22, -+ [2][1][2][1][RTW89_QATAR][1][101] = 127, -+ [2][1][2][1][RTW89_QATAR][0][101] = 127, -+ [2][1][2][1][RTW89_UK][1][101] = 127, -+ [2][1][2][1][RTW89_UK][0][101] = 127, -+ [2][1][2][1][RTW89_FCC][1][108] = 127, -+ [2][1][2][1][RTW89_FCC][2][108] = 127, -+ [2][1][2][1][RTW89_ETSI][1][108] = 127, -+ [2][1][2][1][RTW89_ETSI][0][108] = 127, -+ [2][1][2][1][RTW89_MKK][1][108] = 127, -+ [2][1][2][1][RTW89_MKK][0][108] = 127, -+ [2][1][2][1][RTW89_IC][1][108] = 127, -+ [2][1][2][1][RTW89_KCC][1][108] = 127, -+ [2][1][2][1][RTW89_KCC][0][108] = 127, -+ [2][1][2][1][RTW89_ACMA][1][108] = 127, -+ [2][1][2][1][RTW89_ACMA][0][108] = 127, -+ [2][1][2][1][RTW89_CHILE][1][108] = 127, -+ [2][1][2][1][RTW89_QATAR][1][108] = 127, -+ [2][1][2][1][RTW89_QATAR][0][108] = 127, -+ [2][1][2][1][RTW89_UK][1][108] = 127, -+ [2][1][2][1][RTW89_UK][0][108] = 127, -+ [2][1][2][1][RTW89_FCC][1][116] = 127, -+ [2][1][2][1][RTW89_FCC][2][116] = 127, -+ [2][1][2][1][RTW89_ETSI][1][116] = 127, -+ [2][1][2][1][RTW89_ETSI][0][116] = 127, -+ [2][1][2][1][RTW89_MKK][1][116] = 127, -+ [2][1][2][1][RTW89_MKK][0][116] = 127, -+ [2][1][2][1][RTW89_IC][1][116] = 127, -+ [2][1][2][1][RTW89_KCC][1][116] = 127, -+ [2][1][2][1][RTW89_KCC][0][116] = 127, -+ [2][1][2][1][RTW89_ACMA][1][116] = 127, -+ [2][1][2][1][RTW89_ACMA][0][116] = 127, -+ [2][1][2][1][RTW89_CHILE][1][116] = 127, -+ [2][1][2][1][RTW89_QATAR][1][116] = 127, -+ [2][1][2][1][RTW89_QATAR][0][116] = 127, -+ [2][1][2][1][RTW89_UK][1][116] = 127, -+ [2][1][2][1][RTW89_UK][0][116] = 127, -+ [3][0][2][0][RTW89_FCC][1][7] = 52, -+ [3][0][2][0][RTW89_FCC][2][7] = 52, -+ [3][0][2][0][RTW89_ETSI][1][7] = 50, -+ [3][0][2][0][RTW89_ETSI][0][7] = 30, -+ [3][0][2][0][RTW89_MKK][1][7] = 50, -+ [3][0][2][0][RTW89_MKK][0][7] = 22, -+ [3][0][2][0][RTW89_IC][1][7] = 52, -+ [3][0][2][0][RTW89_KCC][1][7] = 42, -+ [3][0][2][0][RTW89_KCC][0][7] = 24, -+ [3][0][2][0][RTW89_ACMA][1][7] = 50, -+ [3][0][2][0][RTW89_ACMA][0][7] = 30, -+ [3][0][2][0][RTW89_CHILE][1][7] = 52, -+ [3][0][2][0][RTW89_QATAR][1][7] = 50, -+ [3][0][2][0][RTW89_QATAR][0][7] = 30, -+ [3][0][2][0][RTW89_UK][1][7] = 50, -+ [3][0][2][0][RTW89_UK][0][7] = 30, -+ [3][0][2][0][RTW89_FCC][1][22] = 52, -+ [3][0][2][0][RTW89_FCC][2][22] = 52, -+ [3][0][2][0][RTW89_ETSI][1][22] = 50, -+ [3][0][2][0][RTW89_ETSI][0][22] = 30, -+ [3][0][2][0][RTW89_MKK][1][22] = 50, -+ [3][0][2][0][RTW89_MKK][0][22] = 20, -+ [3][0][2][0][RTW89_IC][1][22] = 52, -+ [3][0][2][0][RTW89_KCC][1][22] = 42, -+ [3][0][2][0][RTW89_KCC][0][22] = 24, -+ [3][0][2][0][RTW89_ACMA][1][22] = 50, -+ [3][0][2][0][RTW89_ACMA][0][22] = 30, -+ [3][0][2][0][RTW89_CHILE][1][22] = 52, -+ [3][0][2][0][RTW89_QATAR][1][22] = 50, -+ [3][0][2][0][RTW89_QATAR][0][22] = 30, -+ [3][0][2][0][RTW89_UK][1][22] = 50, -+ [3][0][2][0][RTW89_UK][0][22] = 30, -+ [3][0][2][0][RTW89_FCC][1][37] = 52, -+ [3][0][2][0][RTW89_FCC][2][37] = 52, -+ [3][0][2][0][RTW89_ETSI][1][37] = 50, -+ [3][0][2][0][RTW89_ETSI][0][37] = 30, -+ [3][0][2][0][RTW89_MKK][1][37] = 50, -+ [3][0][2][0][RTW89_MKK][0][37] = 20, -+ [3][0][2][0][RTW89_IC][1][37] = 52, -+ [3][0][2][0][RTW89_KCC][1][37] = 42, -+ [3][0][2][0][RTW89_KCC][0][37] = 24, -+ [3][0][2][0][RTW89_ACMA][1][37] = 50, -+ [3][0][2][0][RTW89_ACMA][0][37] = 30, -+ [3][0][2][0][RTW89_CHILE][1][37] = 52, -+ [3][0][2][0][RTW89_QATAR][1][37] = 50, -+ [3][0][2][0][RTW89_QATAR][0][37] = 30, -+ [3][0][2][0][RTW89_UK][1][37] = 50, -+ [3][0][2][0][RTW89_UK][0][37] = 30, -+ [3][0][2][0][RTW89_FCC][1][52] = 54, -+ [3][0][2][0][RTW89_FCC][2][52] = 127, -+ [3][0][2][0][RTW89_ETSI][1][52] = 127, -+ [3][0][2][0][RTW89_ETSI][0][52] = 127, -+ [3][0][2][0][RTW89_MKK][1][52] = 127, -+ [3][0][2][0][RTW89_MKK][0][52] = 127, -+ [3][0][2][0][RTW89_IC][1][52] = 54, -+ [3][0][2][0][RTW89_KCC][1][52] = 56, -+ [3][0][2][0][RTW89_KCC][0][52] = 127, -+ [3][0][2][0][RTW89_ACMA][1][52] = 127, -+ [3][0][2][0][RTW89_ACMA][0][52] = 127, -+ [3][0][2][0][RTW89_CHILE][1][52] = 54, -+ [3][0][2][0][RTW89_QATAR][1][52] = 127, -+ [3][0][2][0][RTW89_QATAR][0][52] = 127, -+ [3][0][2][0][RTW89_UK][1][52] = 127, -+ [3][0][2][0][RTW89_UK][0][52] = 127, -+ [3][0][2][0][RTW89_FCC][1][67] = 54, -+ [3][0][2][0][RTW89_FCC][2][67] = 54, -+ [3][0][2][0][RTW89_ETSI][1][67] = 127, -+ [3][0][2][0][RTW89_ETSI][0][67] = 127, -+ [3][0][2][0][RTW89_MKK][1][67] = 127, -+ [3][0][2][0][RTW89_MKK][0][67] = 127, -+ [3][0][2][0][RTW89_IC][1][67] = 54, -+ [3][0][2][0][RTW89_KCC][1][67] = 54, -+ [3][0][2][0][RTW89_KCC][0][67] = 127, -+ [3][0][2][0][RTW89_ACMA][1][67] = 127, -+ [3][0][2][0][RTW89_ACMA][0][67] = 127, -+ [3][0][2][0][RTW89_CHILE][1][67] = 54, -+ [3][0][2][0][RTW89_QATAR][1][67] = 127, -+ [3][0][2][0][RTW89_QATAR][0][67] = 127, -+ [3][0][2][0][RTW89_UK][1][67] = 127, -+ [3][0][2][0][RTW89_UK][0][67] = 127, -+ [3][0][2][0][RTW89_FCC][1][82] = 46, -+ [3][0][2][0][RTW89_FCC][2][82] = 127, -+ [3][0][2][0][RTW89_ETSI][1][82] = 127, -+ [3][0][2][0][RTW89_ETSI][0][82] = 127, -+ [3][0][2][0][RTW89_MKK][1][82] = 127, -+ [3][0][2][0][RTW89_MKK][0][82] = 127, -+ [3][0][2][0][RTW89_IC][1][82] = 46, -+ [3][0][2][0][RTW89_KCC][1][82] = 26, -+ [3][0][2][0][RTW89_KCC][0][82] = 127, -+ [3][0][2][0][RTW89_ACMA][1][82] = 127, -+ [3][0][2][0][RTW89_ACMA][0][82] = 127, -+ [3][0][2][0][RTW89_CHILE][1][82] = 46, -+ [3][0][2][0][RTW89_QATAR][1][82] = 127, -+ [3][0][2][0][RTW89_QATAR][0][82] = 127, -+ [3][0][2][0][RTW89_UK][1][82] = 127, -+ [3][0][2][0][RTW89_UK][0][82] = 127, -+ [3][0][2][0][RTW89_FCC][1][97] = 40, -+ [3][0][2][0][RTW89_FCC][2][97] = 127, -+ [3][0][2][0][RTW89_ETSI][1][97] = 127, -+ [3][0][2][0][RTW89_ETSI][0][97] = 127, -+ [3][0][2][0][RTW89_MKK][1][97] = 127, -+ [3][0][2][0][RTW89_MKK][0][97] = 127, -+ [3][0][2][0][RTW89_IC][1][97] = 40, -+ [3][0][2][0][RTW89_KCC][1][97] = 26, -+ [3][0][2][0][RTW89_KCC][0][97] = 127, -+ [3][0][2][0][RTW89_ACMA][1][97] = 127, -+ [3][0][2][0][RTW89_ACMA][0][97] = 127, -+ [3][0][2][0][RTW89_CHILE][1][97] = 40, -+ [3][0][2][0][RTW89_QATAR][1][97] = 127, -+ [3][0][2][0][RTW89_QATAR][0][97] = 127, -+ [3][0][2][0][RTW89_UK][1][97] = 127, -+ [3][0][2][0][RTW89_UK][0][97] = 127, -+ [3][0][2][0][RTW89_FCC][1][112] = 127, -+ [3][0][2][0][RTW89_FCC][2][112] = 127, -+ [3][0][2][0][RTW89_ETSI][1][112] = 127, -+ [3][0][2][0][RTW89_ETSI][0][112] = 127, -+ [3][0][2][0][RTW89_MKK][1][112] = 127, -+ [3][0][2][0][RTW89_MKK][0][112] = 127, -+ [3][0][2][0][RTW89_IC][1][112] = 127, -+ [3][0][2][0][RTW89_KCC][1][112] = 127, -+ [3][0][2][0][RTW89_KCC][0][112] = 127, -+ [3][0][2][0][RTW89_ACMA][1][112] = 127, -+ [3][0][2][0][RTW89_ACMA][0][112] = 127, -+ [3][0][2][0][RTW89_CHILE][1][112] = 127, -+ [3][0][2][0][RTW89_QATAR][1][112] = 127, -+ [3][0][2][0][RTW89_QATAR][0][112] = 127, -+ [3][0][2][0][RTW89_UK][1][112] = 127, -+ [3][0][2][0][RTW89_UK][0][112] = 127, -+ [3][1][2][0][RTW89_FCC][1][7] = 32, -+ [3][1][2][0][RTW89_FCC][2][7] = 46, -+ [3][1][2][0][RTW89_ETSI][1][7] = 50, -+ [3][1][2][0][RTW89_ETSI][0][7] = 18, -+ [3][1][2][0][RTW89_MKK][1][7] = 38, -+ [3][1][2][0][RTW89_MKK][0][7] = 10, -+ [3][1][2][0][RTW89_IC][1][7] = 32, -+ [3][1][2][0][RTW89_KCC][1][7] = 40, -+ [3][1][2][0][RTW89_KCC][0][7] = 12, -+ [3][1][2][0][RTW89_ACMA][1][7] = 50, -+ [3][1][2][0][RTW89_ACMA][0][7] = 18, -+ [3][1][2][0][RTW89_CHILE][1][7] = 32, -+ [3][1][2][0][RTW89_QATAR][1][7] = 50, -+ [3][1][2][0][RTW89_QATAR][0][7] = 18, -+ [3][1][2][0][RTW89_UK][1][7] = 50, -+ [3][1][2][0][RTW89_UK][0][7] = 18, -+ [3][1][2][0][RTW89_FCC][1][22] = 30, -+ [3][1][2][0][RTW89_FCC][2][22] = 52, -+ [3][1][2][0][RTW89_ETSI][1][22] = 46, -+ [3][1][2][0][RTW89_ETSI][0][22] = 16, -+ [3][1][2][0][RTW89_MKK][1][22] = 48, -+ [3][1][2][0][RTW89_MKK][0][22] = 8, -+ [3][1][2][0][RTW89_IC][1][22] = 30, -+ [3][1][2][0][RTW89_KCC][1][22] = 40, -+ [3][1][2][0][RTW89_KCC][0][22] = 12, -+ [3][1][2][0][RTW89_ACMA][1][22] = 46, -+ [3][1][2][0][RTW89_ACMA][0][22] = 16, -+ [3][1][2][0][RTW89_CHILE][1][22] = 30, -+ [3][1][2][0][RTW89_QATAR][1][22] = 46, -+ [3][1][2][0][RTW89_QATAR][0][22] = 16, -+ [3][1][2][0][RTW89_UK][1][22] = 46, -+ [3][1][2][0][RTW89_UK][0][22] = 16, -+ [3][1][2][0][RTW89_FCC][1][37] = 30, -+ [3][1][2][0][RTW89_FCC][2][37] = 52, -+ [3][1][2][0][RTW89_ETSI][1][37] = 46, -+ [3][1][2][0][RTW89_ETSI][0][37] = 16, -+ [3][1][2][0][RTW89_MKK][1][37] = 48, -+ [3][1][2][0][RTW89_MKK][0][37] = 8, -+ [3][1][2][0][RTW89_IC][1][37] = 30, -+ [3][1][2][0][RTW89_KCC][1][37] = 40, -+ [3][1][2][0][RTW89_KCC][0][37] = 12, -+ [3][1][2][0][RTW89_ACMA][1][37] = 46, -+ [3][1][2][0][RTW89_ACMA][0][37] = 16, -+ [3][1][2][0][RTW89_CHILE][1][37] = 30, -+ [3][1][2][0][RTW89_QATAR][1][37] = 46, -+ [3][1][2][0][RTW89_QATAR][0][37] = 16, -+ [3][1][2][0][RTW89_UK][1][37] = 46, -+ [3][1][2][0][RTW89_UK][0][37] = 16, -+ [3][1][2][0][RTW89_FCC][1][52] = 30, -+ [3][1][2][0][RTW89_FCC][2][52] = 127, -+ [3][1][2][0][RTW89_ETSI][1][52] = 127, -+ [3][1][2][0][RTW89_ETSI][0][52] = 127, -+ [3][1][2][0][RTW89_MKK][1][52] = 127, -+ [3][1][2][0][RTW89_MKK][0][52] = 127, -+ [3][1][2][0][RTW89_IC][1][52] = 30, -+ [3][1][2][0][RTW89_KCC][1][52] = 48, -+ [3][1][2][0][RTW89_KCC][0][52] = 127, -+ [3][1][2][0][RTW89_ACMA][1][52] = 127, -+ [3][1][2][0][RTW89_ACMA][0][52] = 127, -+ [3][1][2][0][RTW89_CHILE][1][52] = 30, -+ [3][1][2][0][RTW89_QATAR][1][52] = 127, -+ [3][1][2][0][RTW89_QATAR][0][52] = 127, -+ [3][1][2][0][RTW89_UK][1][52] = 127, -+ [3][1][2][0][RTW89_UK][0][52] = 127, -+ [3][1][2][0][RTW89_FCC][1][67] = 32, -+ [3][1][2][0][RTW89_FCC][2][67] = 54, -+ [3][1][2][0][RTW89_ETSI][1][67] = 127, -+ [3][1][2][0][RTW89_ETSI][0][67] = 127, -+ [3][1][2][0][RTW89_MKK][1][67] = 127, -+ [3][1][2][0][RTW89_MKK][0][67] = 127, -+ [3][1][2][0][RTW89_IC][1][67] = 32, -+ [3][1][2][0][RTW89_KCC][1][67] = 48, -+ [3][1][2][0][RTW89_KCC][0][67] = 127, -+ [3][1][2][0][RTW89_ACMA][1][67] = 127, -+ [3][1][2][0][RTW89_ACMA][0][67] = 127, -+ [3][1][2][0][RTW89_CHILE][1][67] = 32, -+ [3][1][2][0][RTW89_QATAR][1][67] = 127, -+ [3][1][2][0][RTW89_QATAR][0][67] = 127, -+ [3][1][2][0][RTW89_UK][1][67] = 127, -+ [3][1][2][0][RTW89_UK][0][67] = 127, -+ [3][1][2][0][RTW89_FCC][1][82] = 32, -+ [3][1][2][0][RTW89_FCC][2][82] = 127, -+ [3][1][2][0][RTW89_ETSI][1][82] = 127, -+ [3][1][2][0][RTW89_ETSI][0][82] = 127, -+ [3][1][2][0][RTW89_MKK][1][82] = 127, -+ [3][1][2][0][RTW89_MKK][0][82] = 127, -+ [3][1][2][0][RTW89_IC][1][82] = 32, -+ [3][1][2][0][RTW89_KCC][1][82] = 24, -+ [3][1][2][0][RTW89_KCC][0][82] = 127, -+ [3][1][2][0][RTW89_ACMA][1][82] = 127, -+ [3][1][2][0][RTW89_ACMA][0][82] = 127, -+ [3][1][2][0][RTW89_CHILE][1][82] = 32, -+ [3][1][2][0][RTW89_QATAR][1][82] = 127, -+ [3][1][2][0][RTW89_QATAR][0][82] = 127, -+ [3][1][2][0][RTW89_UK][1][82] = 127, -+ [3][1][2][0][RTW89_UK][0][82] = 127, -+ [3][1][2][0][RTW89_FCC][1][97] = 32, -+ [3][1][2][0][RTW89_FCC][2][97] = 127, -+ [3][1][2][0][RTW89_ETSI][1][97] = 127, -+ [3][1][2][0][RTW89_ETSI][0][97] = 127, -+ [3][1][2][0][RTW89_MKK][1][97] = 127, -+ [3][1][2][0][RTW89_MKK][0][97] = 127, -+ [3][1][2][0][RTW89_IC][1][97] = 32, -+ [3][1][2][0][RTW89_KCC][1][97] = 24, -+ [3][1][2][0][RTW89_KCC][0][97] = 127, -+ [3][1][2][0][RTW89_ACMA][1][97] = 127, -+ [3][1][2][0][RTW89_ACMA][0][97] = 127, -+ [3][1][2][0][RTW89_CHILE][1][97] = 32, -+ [3][1][2][0][RTW89_QATAR][1][97] = 127, -+ [3][1][2][0][RTW89_QATAR][0][97] = 127, -+ [3][1][2][0][RTW89_UK][1][97] = 127, -+ [3][1][2][0][RTW89_UK][0][97] = 127, -+ [3][1][2][0][RTW89_FCC][1][112] = 127, -+ [3][1][2][0][RTW89_FCC][2][112] = 127, -+ [3][1][2][0][RTW89_ETSI][1][112] = 127, -+ [3][1][2][0][RTW89_ETSI][0][112] = 127, -+ [3][1][2][0][RTW89_MKK][1][112] = 127, -+ [3][1][2][0][RTW89_MKK][0][112] = 127, -+ [3][1][2][0][RTW89_IC][1][112] = 127, -+ [3][1][2][0][RTW89_KCC][1][112] = 127, -+ [3][1][2][0][RTW89_KCC][0][112] = 127, -+ [3][1][2][0][RTW89_ACMA][1][112] = 127, -+ [3][1][2][0][RTW89_ACMA][0][112] = 127, -+ [3][1][2][0][RTW89_CHILE][1][112] = 127, -+ [3][1][2][0][RTW89_QATAR][1][112] = 127, -+ [3][1][2][0][RTW89_QATAR][0][112] = 127, -+ [3][1][2][0][RTW89_UK][1][112] = 127, -+ [3][1][2][0][RTW89_UK][0][112] = 127, -+ [3][1][2][1][RTW89_FCC][1][7] = 32, -+ [3][1][2][1][RTW89_FCC][2][7] = 46, -+ [3][1][2][1][RTW89_ETSI][1][7] = 42, -+ [3][1][2][1][RTW89_ETSI][0][7] = 6, -+ [3][1][2][1][RTW89_MKK][1][7] = 38, -+ [3][1][2][1][RTW89_MKK][0][7] = 10, -+ [3][1][2][1][RTW89_IC][1][7] = 32, -+ [3][1][2][1][RTW89_KCC][1][7] = 40, -+ [3][1][2][1][RTW89_KCC][0][7] = 12, -+ [3][1][2][1][RTW89_ACMA][1][7] = 42, -+ [3][1][2][1][RTW89_ACMA][0][7] = 6, -+ [3][1][2][1][RTW89_CHILE][1][7] = 32, -+ [3][1][2][1][RTW89_QATAR][1][7] = 42, -+ [3][1][2][1][RTW89_QATAR][0][7] = 6, -+ [3][1][2][1][RTW89_UK][1][7] = 42, -+ [3][1][2][1][RTW89_UK][0][7] = 6, -+ [3][1][2][1][RTW89_FCC][1][22] = 30, -+ [3][1][2][1][RTW89_FCC][2][22] = 52, -+ [3][1][2][1][RTW89_ETSI][1][22] = 42, -+ [3][1][2][1][RTW89_ETSI][0][22] = 6, -+ [3][1][2][1][RTW89_MKK][1][22] = 48, -+ [3][1][2][1][RTW89_MKK][0][22] = 8, -+ [3][1][2][1][RTW89_IC][1][22] = 30, -+ [3][1][2][1][RTW89_KCC][1][22] = 40, -+ [3][1][2][1][RTW89_KCC][0][22] = 12, -+ [3][1][2][1][RTW89_ACMA][1][22] = 42, -+ [3][1][2][1][RTW89_ACMA][0][22] = 6, -+ [3][1][2][1][RTW89_CHILE][1][22] = 30, -+ [3][1][2][1][RTW89_QATAR][1][22] = 42, -+ [3][1][2][1][RTW89_QATAR][0][22] = 6, -+ [3][1][2][1][RTW89_UK][1][22] = 42, -+ [3][1][2][1][RTW89_UK][0][22] = 6, -+ [3][1][2][1][RTW89_FCC][1][37] = 30, -+ [3][1][2][1][RTW89_FCC][2][37] = 52, -+ [3][1][2][1][RTW89_ETSI][1][37] = 42, -+ [3][1][2][1][RTW89_ETSI][0][37] = 6, -+ [3][1][2][1][RTW89_MKK][1][37] = 48, -+ [3][1][2][1][RTW89_MKK][0][37] = 8, -+ [3][1][2][1][RTW89_IC][1][37] = 30, -+ [3][1][2][1][RTW89_KCC][1][37] = 40, -+ [3][1][2][1][RTW89_KCC][0][37] = 12, -+ [3][1][2][1][RTW89_ACMA][1][37] = 42, -+ [3][1][2][1][RTW89_ACMA][0][37] = 6, -+ [3][1][2][1][RTW89_CHILE][1][37] = 30, -+ [3][1][2][1][RTW89_QATAR][1][37] = 42, -+ [3][1][2][1][RTW89_QATAR][0][37] = 6, -+ [3][1][2][1][RTW89_UK][1][37] = 42, -+ [3][1][2][1][RTW89_UK][0][37] = 6, -+ [3][1][2][1][RTW89_FCC][1][52] = 30, -+ [3][1][2][1][RTW89_FCC][2][52] = 127, -+ [3][1][2][1][RTW89_ETSI][1][52] = 127, -+ [3][1][2][1][RTW89_ETSI][0][52] = 127, -+ [3][1][2][1][RTW89_MKK][1][52] = 127, -+ [3][1][2][1][RTW89_MKK][0][52] = 127, -+ [3][1][2][1][RTW89_IC][1][52] = 30, -+ [3][1][2][1][RTW89_KCC][1][52] = 48, -+ [3][1][2][1][RTW89_KCC][0][52] = 127, -+ [3][1][2][1][RTW89_ACMA][1][52] = 127, -+ [3][1][2][1][RTW89_ACMA][0][52] = 127, -+ [3][1][2][1][RTW89_CHILE][1][52] = 30, -+ [3][1][2][1][RTW89_QATAR][1][52] = 127, -+ [3][1][2][1][RTW89_QATAR][0][52] = 127, -+ [3][1][2][1][RTW89_UK][1][52] = 127, -+ [3][1][2][1][RTW89_UK][0][52] = 127, -+ [3][1][2][1][RTW89_FCC][1][67] = 32, -+ [3][1][2][1][RTW89_FCC][2][67] = 54, -+ [3][1][2][1][RTW89_ETSI][1][67] = 127, -+ [3][1][2][1][RTW89_ETSI][0][67] = 127, -+ [3][1][2][1][RTW89_MKK][1][67] = 127, -+ [3][1][2][1][RTW89_MKK][0][67] = 127, -+ [3][1][2][1][RTW89_IC][1][67] = 32, -+ [3][1][2][1][RTW89_KCC][1][67] = 48, -+ [3][1][2][1][RTW89_KCC][0][67] = 127, -+ [3][1][2][1][RTW89_ACMA][1][67] = 127, -+ [3][1][2][1][RTW89_ACMA][0][67] = 127, -+ [3][1][2][1][RTW89_CHILE][1][67] = 32, -+ [3][1][2][1][RTW89_QATAR][1][67] = 127, -+ [3][1][2][1][RTW89_QATAR][0][67] = 127, -+ [3][1][2][1][RTW89_UK][1][67] = 127, -+ [3][1][2][1][RTW89_UK][0][67] = 127, -+ [3][1][2][1][RTW89_FCC][1][82] = 32, -+ [3][1][2][1][RTW89_FCC][2][82] = 127, -+ [3][1][2][1][RTW89_ETSI][1][82] = 127, -+ [3][1][2][1][RTW89_ETSI][0][82] = 127, -+ [3][1][2][1][RTW89_MKK][1][82] = 127, -+ [3][1][2][1][RTW89_MKK][0][82] = 127, -+ [3][1][2][1][RTW89_IC][1][82] = 32, -+ [3][1][2][1][RTW89_KCC][1][82] = 24, -+ [3][1][2][1][RTW89_KCC][0][82] = 127, -+ [3][1][2][1][RTW89_ACMA][1][82] = 127, -+ [3][1][2][1][RTW89_ACMA][0][82] = 127, -+ [3][1][2][1][RTW89_CHILE][1][82] = 32, -+ [3][1][2][1][RTW89_QATAR][1][82] = 127, -+ [3][1][2][1][RTW89_QATAR][0][82] = 127, -+ [3][1][2][1][RTW89_UK][1][82] = 127, -+ [3][1][2][1][RTW89_UK][0][82] = 127, -+ [3][1][2][1][RTW89_FCC][1][97] = 32, -+ [3][1][2][1][RTW89_FCC][2][97] = 127, -+ [3][1][2][1][RTW89_ETSI][1][97] = 127, -+ [3][1][2][1][RTW89_ETSI][0][97] = 127, -+ [3][1][2][1][RTW89_MKK][1][97] = 127, -+ [3][1][2][1][RTW89_MKK][0][97] = 127, -+ [3][1][2][1][RTW89_IC][1][97] = 32, -+ [3][1][2][1][RTW89_KCC][1][97] = 24, -+ [3][1][2][1][RTW89_KCC][0][97] = 127, -+ [3][1][2][1][RTW89_ACMA][1][97] = 127, -+ [3][1][2][1][RTW89_ACMA][0][97] = 127, -+ [3][1][2][1][RTW89_CHILE][1][97] = 32, -+ [3][1][2][1][RTW89_QATAR][1][97] = 127, -+ [3][1][2][1][RTW89_QATAR][0][97] = 127, -+ [3][1][2][1][RTW89_UK][1][97] = 127, -+ [3][1][2][1][RTW89_UK][0][97] = 127, -+ [3][1][2][1][RTW89_FCC][1][112] = 127, -+ [3][1][2][1][RTW89_FCC][2][112] = 127, -+ [3][1][2][1][RTW89_ETSI][1][112] = 127, -+ [3][1][2][1][RTW89_ETSI][0][112] = 127, -+ [3][1][2][1][RTW89_MKK][1][112] = 127, -+ [3][1][2][1][RTW89_MKK][0][112] = 127, -+ [3][1][2][1][RTW89_IC][1][112] = 127, -+ [3][1][2][1][RTW89_KCC][1][112] = 127, -+ [3][1][2][1][RTW89_KCC][0][112] = 127, -+ [3][1][2][1][RTW89_ACMA][1][112] = 127, -+ [3][1][2][1][RTW89_ACMA][0][112] = 127, -+ [3][1][2][1][RTW89_CHILE][1][112] = 127, -+ [3][1][2][1][RTW89_QATAR][1][112] = 127, -+ [3][1][2][1][RTW89_QATAR][0][112] = 127, -+ [3][1][2][1][RTW89_UK][1][112] = 127, -+ [3][1][2][1][RTW89_UK][0][112] = 127, - }; - - static diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-132-wifi-rtw89-8852c-update-TX-power-tables-to-R63-with-.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-132-wifi-rtw89-8852c-update-TX-power-tables-to-R63-with-.patch deleted file mode 100644 index ab9aa6a1a..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-132-wifi-rtw89-8852c-update-TX-power-tables-to-R63-with-.patch +++ /dev/null @@ -1,8532 +0,0 @@ -From dad142c3f56a2459b1f18cac63e1a436d0a31c84 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Fri, 2 Jun 2023 23:05:55 +0800 -Subject: [PATCH 132/136] wifi: rtw89: 8852c: update TX power tables to R63 - with 6 GHz power type (3 of 3) - -Update TX power tables to RF version R63. - -TX power tables' changes: -* TX power byrate: - tweak a bit -* TX power limit, TX power limit RU, TX power shape: - configure values for MEXICO, UKRAINE, CHILE, QATAR - tweak a bit on other configured values -* 6 GHz TX power limit, 6 GHz TX power limit RU: - add an extra dimension for 6 GHz regulatory power type, i.e. - STD (standard power), LPI (low power indoor), VLP (very low power) - -Besides, we adjust TX power handling at 6 GHz in phy to consider 6 GHz -regulatory power type. - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230602150556.36777-8-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 3 +- - drivers/net/wireless/realtek/rtw89/phy.c | 8 +- - .../wireless/realtek/rtw89/rtw8852c_table.c | 8451 ++++++++++++++--- - 3 files changed, 7306 insertions(+), 1156 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3049,7 +3049,8 @@ struct rtw89_txpwr_rule_6ghz { - [RTW89_REGD_NUM][NUM_OF_RTW89_REG_6GHZ_POWER] - [RTW89_6G_CH_NUM]; - const s8 (*lmt_ru)[RTW89_RU_NUM][RTW89_NTX_NUM] -- [RTW89_REGD_NUM][RTW89_6G_CH_NUM]; -+ [RTW89_REGD_NUM][NUM_OF_RTW89_REG_6GHZ_POWER] -+ [RTW89_6G_CH_NUM]; - }; - - struct rtw89_rfe_parms { ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -1881,8 +1881,10 @@ static s8 rtw89_phy_read_txpwr_limit_ru( - const struct rtw89_txpwr_rule_2ghz *rule_2ghz = &rfe_parms->rule_2ghz; - const struct rtw89_txpwr_rule_5ghz *rule_5ghz = &rfe_parms->rule_5ghz; - const struct rtw89_txpwr_rule_6ghz *rule_6ghz = &rfe_parms->rule_6ghz; -+ struct rtw89_regulatory_info *regulatory = &rtwdev->regulatory; - u8 ch_idx = rtw89_channel_to_idx(rtwdev, band, ch); - u8 regd = rtw89_regd_get(rtwdev, band); -+ u8 reg6 = regulatory->reg_6ghz_power; - s8 lmt_ru = 0, sar; - - switch (band) { -@@ -1901,11 +1903,13 @@ static s8 rtw89_phy_read_txpwr_limit_ru( - lmt_ru = (*rule_5ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; - break; - case RTW89_BAND_6G: -- lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][regd][ch_idx]; -+ lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][regd][reg6][ch_idx]; - if (lmt_ru) - break; - -- lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][RTW89_WW][ch_idx]; -+ lmt_ru = (*rule_6ghz->lmt_ru)[ru][ntx][RTW89_WW] -+ [RTW89_REG_6GHZ_POWER_DFLT] -+ [ch_idx]; - break; - default: - rtw89_warn(rtwdev, "unknown band type: %d\n", band); ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c -@@ -46127,1159 +46127,7304 @@ const s8 rtw89_8852c_txpwr_lmt_ru_5g[RTW - - static - const s8 rtw89_8852c_txpwr_lmt_ru_6g[RTW89_RU_NUM][RTW89_NTX_NUM] -- [RTW89_REGD_NUM][RTW89_6G_CH_NUM] = { -- [0][0][RTW89_WW][0] = -16, -- [0][0][RTW89_WW][2] = -18, -- [0][0][RTW89_WW][4] = -18, -- [0][0][RTW89_WW][6] = -18, -- [0][0][RTW89_WW][8] = -18, -- [0][0][RTW89_WW][10] = -18, -- [0][0][RTW89_WW][12] = -18, -- [0][0][RTW89_WW][14] = -18, -- [0][0][RTW89_WW][15] = -18, -- [0][0][RTW89_WW][17] = -18, -- [0][0][RTW89_WW][19] = -18, -- [0][0][RTW89_WW][21] = -18, -- [0][0][RTW89_WW][23] = -18, -- [0][0][RTW89_WW][25] = -18, -- [0][0][RTW89_WW][27] = -18, -- [0][0][RTW89_WW][29] = -18, -- [0][0][RTW89_WW][30] = -18, -- [0][0][RTW89_WW][32] = -18, -- [0][0][RTW89_WW][34] = -18, -- [0][0][RTW89_WW][36] = -18, -- [0][0][RTW89_WW][38] = -18, -- [0][0][RTW89_WW][40] = -18, -- [0][0][RTW89_WW][42] = -18, -- [0][0][RTW89_WW][44] = -16, -- [0][0][RTW89_WW][45] = -16, -- [0][0][RTW89_WW][47] = -18, -- [0][0][RTW89_WW][49] = -18, -- [0][0][RTW89_WW][51] = -18, -- [0][0][RTW89_WW][53] = -16, -- [0][0][RTW89_WW][55] = -18, -- [0][0][RTW89_WW][57] = -18, -- [0][0][RTW89_WW][59] = -18, -- [0][0][RTW89_WW][60] = -18, -- [0][0][RTW89_WW][62] = -18, -- [0][0][RTW89_WW][64] = -18, -- [0][0][RTW89_WW][66] = -18, -- [0][0][RTW89_WW][68] = -18, -- [0][0][RTW89_WW][70] = -16, -- [0][0][RTW89_WW][72] = -18, -- [0][0][RTW89_WW][74] = -18, -- [0][0][RTW89_WW][75] = -18, -- [0][0][RTW89_WW][77] = -18, -- [0][0][RTW89_WW][79] = -18, -- [0][0][RTW89_WW][81] = -18, -- [0][0][RTW89_WW][83] = -18, -- [0][0][RTW89_WW][85] = -18, -- [0][0][RTW89_WW][87] = -16, -- [0][0][RTW89_WW][89] = -16, -- [0][0][RTW89_WW][90] = -16, -- [0][0][RTW89_WW][92] = -16, -- [0][0][RTW89_WW][94] = -16, -- [0][0][RTW89_WW][96] = -16, -- [0][0][RTW89_WW][98] = -16, -- [0][0][RTW89_WW][100] = -16, -- [0][0][RTW89_WW][102] = -16, -- [0][0][RTW89_WW][104] = -16, -- [0][0][RTW89_WW][105] = -16, -- [0][0][RTW89_WW][107] = -12, -- [0][0][RTW89_WW][109] = -12, -- [0][0][RTW89_WW][111] = 0, -- [0][0][RTW89_WW][113] = 0, -- [0][0][RTW89_WW][115] = 0, -- [0][0][RTW89_WW][117] = 0, -- [0][0][RTW89_WW][119] = 0, -- [0][1][RTW89_WW][0] = -40, -- [0][1][RTW89_WW][2] = -40, -- [0][1][RTW89_WW][4] = -40, -- [0][1][RTW89_WW][6] = -40, -- [0][1][RTW89_WW][8] = -40, -- [0][1][RTW89_WW][10] = -40, -- [0][1][RTW89_WW][12] = -40, -- [0][1][RTW89_WW][14] = -40, -- [0][1][RTW89_WW][15] = -40, -- [0][1][RTW89_WW][17] = -40, -- [0][1][RTW89_WW][19] = -40, -- [0][1][RTW89_WW][21] = -40, -- [0][1][RTW89_WW][23] = -40, -- [0][1][RTW89_WW][25] = -40, -- [0][1][RTW89_WW][27] = -40, -- [0][1][RTW89_WW][29] = -40, -- [0][1][RTW89_WW][30] = -40, -- [0][1][RTW89_WW][32] = -40, -- [0][1][RTW89_WW][34] = -40, -- [0][1][RTW89_WW][36] = -40, -- [0][1][RTW89_WW][38] = -40, -- [0][1][RTW89_WW][40] = -40, -- [0][1][RTW89_WW][42] = -40, -- [0][1][RTW89_WW][44] = -40, -- [0][1][RTW89_WW][45] = -40, -- [0][1][RTW89_WW][47] = -40, -- [0][1][RTW89_WW][49] = -40, -- [0][1][RTW89_WW][51] = -40, -- [0][1][RTW89_WW][53] = -40, -- [0][1][RTW89_WW][55] = -40, -- [0][1][RTW89_WW][57] = -40, -- [0][1][RTW89_WW][59] = -40, -- [0][1][RTW89_WW][60] = -40, -- [0][1][RTW89_WW][62] = -40, -- [0][1][RTW89_WW][64] = -40, -- [0][1][RTW89_WW][66] = -40, -- [0][1][RTW89_WW][68] = -40, -- [0][1][RTW89_WW][70] = -38, -- [0][1][RTW89_WW][72] = -38, -- [0][1][RTW89_WW][74] = -38, -- [0][1][RTW89_WW][75] = -38, -- [0][1][RTW89_WW][77] = -38, -- [0][1][RTW89_WW][79] = -38, -- [0][1][RTW89_WW][81] = -38, -- [0][1][RTW89_WW][83] = -38, -- [0][1][RTW89_WW][85] = -38, -- [0][1][RTW89_WW][87] = -40, -- [0][1][RTW89_WW][89] = -38, -- [0][1][RTW89_WW][90] = -38, -- [0][1][RTW89_WW][92] = -38, -- [0][1][RTW89_WW][94] = -38, -- [0][1][RTW89_WW][96] = -38, -- [0][1][RTW89_WW][98] = -38, -- [0][1][RTW89_WW][100] = -38, -- [0][1][RTW89_WW][102] = -38, -- [0][1][RTW89_WW][104] = -38, -- [0][1][RTW89_WW][105] = -38, -- [0][1][RTW89_WW][107] = -34, -- [0][1][RTW89_WW][109] = -34, -- [0][1][RTW89_WW][111] = 0, -- [0][1][RTW89_WW][113] = 0, -- [0][1][RTW89_WW][115] = 0, -- [0][1][RTW89_WW][117] = 0, -- [0][1][RTW89_WW][119] = 0, -- [1][0][RTW89_WW][0] = -4, -- [1][0][RTW89_WW][2] = -4, -- [1][0][RTW89_WW][4] = -4, -- [1][0][RTW89_WW][6] = -4, -- [1][0][RTW89_WW][8] = -4, -- [1][0][RTW89_WW][10] = -4, -- [1][0][RTW89_WW][12] = -4, -- [1][0][RTW89_WW][14] = -4, -- [1][0][RTW89_WW][15] = -4, -- [1][0][RTW89_WW][17] = -4, -- [1][0][RTW89_WW][19] = -4, -- [1][0][RTW89_WW][21] = -4, -- [1][0][RTW89_WW][23] = -4, -- [1][0][RTW89_WW][25] = -4, -- [1][0][RTW89_WW][27] = -4, -- [1][0][RTW89_WW][29] = -4, -- [1][0][RTW89_WW][30] = -4, -- [1][0][RTW89_WW][32] = -4, -- [1][0][RTW89_WW][34] = -4, -- [1][0][RTW89_WW][36] = -4, -- [1][0][RTW89_WW][38] = -4, -- [1][0][RTW89_WW][40] = -4, -- [1][0][RTW89_WW][42] = -4, -- [1][0][RTW89_WW][44] = -4, -- [1][0][RTW89_WW][45] = -4, -- [1][0][RTW89_WW][47] = -4, -- [1][0][RTW89_WW][49] = -4, -- [1][0][RTW89_WW][51] = -4, -- [1][0][RTW89_WW][53] = -4, -- [1][0][RTW89_WW][55] = -4, -- [1][0][RTW89_WW][57] = -4, -- [1][0][RTW89_WW][59] = -4, -- [1][0][RTW89_WW][60] = -4, -- [1][0][RTW89_WW][62] = -4, -- [1][0][RTW89_WW][64] = -4, -- [1][0][RTW89_WW][66] = -4, -- [1][0][RTW89_WW][68] = -4, -- [1][0][RTW89_WW][70] = -4, -- [1][0][RTW89_WW][72] = -4, -- [1][0][RTW89_WW][74] = -4, -- [1][0][RTW89_WW][75] = -4, -- [1][0][RTW89_WW][77] = -4, -- [1][0][RTW89_WW][79] = -4, -- [1][0][RTW89_WW][81] = -4, -- [1][0][RTW89_WW][83] = -4, -- [1][0][RTW89_WW][85] = -4, -- [1][0][RTW89_WW][87] = -4, -- [1][0][RTW89_WW][89] = -4, -- [1][0][RTW89_WW][90] = -4, -- [1][0][RTW89_WW][92] = -4, -- [1][0][RTW89_WW][94] = -4, -- [1][0][RTW89_WW][96] = -4, -- [1][0][RTW89_WW][98] = -4, -- [1][0][RTW89_WW][100] = -4, -- [1][0][RTW89_WW][102] = -4, -- [1][0][RTW89_WW][104] = -4, -- [1][0][RTW89_WW][105] = -4, -- [1][0][RTW89_WW][107] = 1, -- [1][0][RTW89_WW][109] = 2, -- [1][0][RTW89_WW][111] = 0, -- [1][0][RTW89_WW][113] = 0, -- [1][0][RTW89_WW][115] = 0, -- [1][0][RTW89_WW][117] = 0, -- [1][0][RTW89_WW][119] = 0, -- [1][1][RTW89_WW][0] = -26, -- [1][1][RTW89_WW][2] = -28, -- [1][1][RTW89_WW][4] = -28, -- [1][1][RTW89_WW][6] = -28, -- [1][1][RTW89_WW][8] = -28, -- [1][1][RTW89_WW][10] = -28, -- [1][1][RTW89_WW][12] = -28, -- [1][1][RTW89_WW][14] = -28, -- [1][1][RTW89_WW][15] = -28, -- [1][1][RTW89_WW][17] = -28, -- [1][1][RTW89_WW][19] = -28, -- [1][1][RTW89_WW][21] = -28, -- [1][1][RTW89_WW][23] = -28, -- [1][1][RTW89_WW][25] = -28, -- [1][1][RTW89_WW][27] = -28, -- [1][1][RTW89_WW][29] = -28, -- [1][1][RTW89_WW][30] = -28, -- [1][1][RTW89_WW][32] = -28, -- [1][1][RTW89_WW][34] = -28, -- [1][1][RTW89_WW][36] = -28, -- [1][1][RTW89_WW][38] = -28, -- [1][1][RTW89_WW][40] = -28, -- [1][1][RTW89_WW][42] = -28, -- [1][1][RTW89_WW][44] = -28, -- [1][1][RTW89_WW][45] = -26, -- [1][1][RTW89_WW][47] = -28, -- [1][1][RTW89_WW][49] = -28, -- [1][1][RTW89_WW][51] = -28, -- [1][1][RTW89_WW][53] = -26, -- [1][1][RTW89_WW][55] = -28, -- [1][1][RTW89_WW][57] = -28, -- [1][1][RTW89_WW][59] = -28, -- [1][1][RTW89_WW][60] = -28, -- [1][1][RTW89_WW][62] = -28, -- [1][1][RTW89_WW][64] = -28, -- [1][1][RTW89_WW][66] = -28, -- [1][1][RTW89_WW][68] = -28, -- [1][1][RTW89_WW][70] = -26, -- [1][1][RTW89_WW][72] = -28, -- [1][1][RTW89_WW][74] = -28, -- [1][1][RTW89_WW][75] = -28, -- [1][1][RTW89_WW][77] = -28, -- [1][1][RTW89_WW][79] = -28, -- [1][1][RTW89_WW][81] = -28, -- [1][1][RTW89_WW][83] = -28, -- [1][1][RTW89_WW][85] = -28, -- [1][1][RTW89_WW][87] = -28, -- [1][1][RTW89_WW][89] = -26, -- [1][1][RTW89_WW][90] = -26, -- [1][1][RTW89_WW][92] = -26, -- [1][1][RTW89_WW][94] = -26, -- [1][1][RTW89_WW][96] = -26, -- [1][1][RTW89_WW][98] = -26, -- [1][1][RTW89_WW][100] = -26, -- [1][1][RTW89_WW][102] = -26, -- [1][1][RTW89_WW][104] = -26, -- [1][1][RTW89_WW][105] = -26, -- [1][1][RTW89_WW][107] = -22, -- [1][1][RTW89_WW][109] = -22, -- [1][1][RTW89_WW][111] = 0, -- [1][1][RTW89_WW][113] = 0, -- [1][1][RTW89_WW][115] = 0, -- [1][1][RTW89_WW][117] = 0, -- [1][1][RTW89_WW][119] = 0, -- [2][0][RTW89_WW][0] = 8, -- [2][0][RTW89_WW][2] = 8, -- [2][0][RTW89_WW][4] = 8, -- [2][0][RTW89_WW][6] = 8, -- [2][0][RTW89_WW][8] = 8, -- [2][0][RTW89_WW][10] = 8, -- [2][0][RTW89_WW][12] = 8, -- [2][0][RTW89_WW][14] = 8, -- [2][0][RTW89_WW][15] = 8, -- [2][0][RTW89_WW][17] = 8, -- [2][0][RTW89_WW][19] = 8, -- [2][0][RTW89_WW][21] = 8, -- [2][0][RTW89_WW][23] = 8, -- [2][0][RTW89_WW][25] = 8, -- [2][0][RTW89_WW][27] = 8, -- [2][0][RTW89_WW][29] = 8, -- [2][0][RTW89_WW][30] = 8, -- [2][0][RTW89_WW][32] = 8, -- [2][0][RTW89_WW][34] = 8, -- [2][0][RTW89_WW][36] = 8, -- [2][0][RTW89_WW][38] = 8, -- [2][0][RTW89_WW][40] = 8, -- [2][0][RTW89_WW][42] = 8, -- [2][0][RTW89_WW][44] = 8, -- [2][0][RTW89_WW][45] = 8, -- [2][0][RTW89_WW][47] = 8, -- [2][0][RTW89_WW][49] = 8, -- [2][0][RTW89_WW][51] = 8, -- [2][0][RTW89_WW][53] = 8, -- [2][0][RTW89_WW][55] = 8, -- [2][0][RTW89_WW][57] = 8, -- [2][0][RTW89_WW][59] = 8, -- [2][0][RTW89_WW][60] = 8, -- [2][0][RTW89_WW][62] = 8, -- [2][0][RTW89_WW][64] = 8, -- [2][0][RTW89_WW][66] = 8, -- [2][0][RTW89_WW][68] = 8, -- [2][0][RTW89_WW][70] = 8, -- [2][0][RTW89_WW][72] = 8, -- [2][0][RTW89_WW][74] = 8, -- [2][0][RTW89_WW][75] = 8, -- [2][0][RTW89_WW][77] = 8, -- [2][0][RTW89_WW][79] = 8, -- [2][0][RTW89_WW][81] = 8, -- [2][0][RTW89_WW][83] = 8, -- [2][0][RTW89_WW][85] = 8, -- [2][0][RTW89_WW][87] = 8, -- [2][0][RTW89_WW][89] = 8, -- [2][0][RTW89_WW][90] = 8, -- [2][0][RTW89_WW][92] = 8, -- [2][0][RTW89_WW][94] = 8, -- [2][0][RTW89_WW][96] = 8, -- [2][0][RTW89_WW][98] = 8, -- [2][0][RTW89_WW][100] = 8, -- [2][0][RTW89_WW][102] = 8, -- [2][0][RTW89_WW][104] = 8, -- [2][0][RTW89_WW][105] = 8, -- [2][0][RTW89_WW][107] = 10, -- [2][0][RTW89_WW][109] = 12, -- [2][0][RTW89_WW][111] = 0, -- [2][0][RTW89_WW][113] = 0, -- [2][0][RTW89_WW][115] = 0, -- [2][0][RTW89_WW][117] = 0, -- [2][0][RTW89_WW][119] = 0, -- [2][1][RTW89_WW][0] = -16, -- [2][1][RTW89_WW][2] = -16, -- [2][1][RTW89_WW][4] = -16, -- [2][1][RTW89_WW][6] = -16, -- [2][1][RTW89_WW][8] = -16, -- [2][1][RTW89_WW][10] = -16, -- [2][1][RTW89_WW][12] = -16, -- [2][1][RTW89_WW][14] = -16, -- [2][1][RTW89_WW][15] = -16, -- [2][1][RTW89_WW][17] = -16, -- [2][1][RTW89_WW][19] = -16, -- [2][1][RTW89_WW][21] = -16, -- [2][1][RTW89_WW][23] = -16, -- [2][1][RTW89_WW][25] = -16, -- [2][1][RTW89_WW][27] = -16, -- [2][1][RTW89_WW][29] = -16, -- [2][1][RTW89_WW][30] = -16, -- [2][1][RTW89_WW][32] = -16, -- [2][1][RTW89_WW][34] = -16, -- [2][1][RTW89_WW][36] = -16, -- [2][1][RTW89_WW][38] = -16, -- [2][1][RTW89_WW][40] = -16, -- [2][1][RTW89_WW][42] = -16, -- [2][1][RTW89_WW][44] = -16, -- [2][1][RTW89_WW][45] = -16, -- [2][1][RTW89_WW][47] = -16, -- [2][1][RTW89_WW][49] = -16, -- [2][1][RTW89_WW][51] = -16, -- [2][1][RTW89_WW][53] = -16, -- [2][1][RTW89_WW][55] = -16, -- [2][1][RTW89_WW][57] = -16, -- [2][1][RTW89_WW][59] = -16, -- [2][1][RTW89_WW][60] = -16, -- [2][1][RTW89_WW][62] = -16, -- [2][1][RTW89_WW][64] = -16, -- [2][1][RTW89_WW][66] = -16, -- [2][1][RTW89_WW][68] = -16, -- [2][1][RTW89_WW][70] = -16, -- [2][1][RTW89_WW][72] = -16, -- [2][1][RTW89_WW][74] = -16, -- [2][1][RTW89_WW][75] = -16, -- [2][1][RTW89_WW][77] = -16, -- [2][1][RTW89_WW][79] = -16, -- [2][1][RTW89_WW][81] = -16, -- [2][1][RTW89_WW][83] = -16, -- [2][1][RTW89_WW][85] = -18, -- [2][1][RTW89_WW][87] = -16, -- [2][1][RTW89_WW][89] = -16, -- [2][1][RTW89_WW][90] = -16, -- [2][1][RTW89_WW][92] = -16, -- [2][1][RTW89_WW][94] = -16, -- [2][1][RTW89_WW][96] = -16, -- [2][1][RTW89_WW][98] = -16, -- [2][1][RTW89_WW][100] = -16, -- [2][1][RTW89_WW][102] = -16, -- [2][1][RTW89_WW][104] = -16, -- [2][1][RTW89_WW][105] = -16, -- [2][1][RTW89_WW][107] = -12, -- [2][1][RTW89_WW][109] = -10, -- [2][1][RTW89_WW][111] = 0, -- [2][1][RTW89_WW][113] = 0, -- [2][1][RTW89_WW][115] = 0, -- [2][1][RTW89_WW][117] = 0, -- [2][1][RTW89_WW][119] = 0, -- [0][0][RTW89_FCC][0] = -16, -- [0][0][RTW89_ETSI][0] = 32, -- [0][0][RTW89_FCC][2] = -18, -- [0][0][RTW89_ETSI][2] = 32, -- [0][0][RTW89_FCC][4] = -18, -- [0][0][RTW89_ETSI][4] = 32, -- [0][0][RTW89_FCC][6] = -18, -- [0][0][RTW89_ETSI][6] = 32, -- [0][0][RTW89_FCC][8] = -18, -- [0][0][RTW89_ETSI][8] = 32, -- [0][0][RTW89_FCC][10] = -18, -- [0][0][RTW89_ETSI][10] = 32, -- [0][0][RTW89_FCC][12] = -18, -- [0][0][RTW89_ETSI][12] = 32, -- [0][0][RTW89_FCC][14] = -18, -- [0][0][RTW89_ETSI][14] = 32, -- [0][0][RTW89_FCC][15] = -18, -- [0][0][RTW89_ETSI][15] = 32, -- [0][0][RTW89_FCC][17] = -18, -- [0][0][RTW89_ETSI][17] = 32, -- [0][0][RTW89_FCC][19] = -18, -- [0][0][RTW89_ETSI][19] = 32, -- [0][0][RTW89_FCC][21] = -18, -- [0][0][RTW89_ETSI][21] = 32, -- [0][0][RTW89_FCC][23] = -18, -- [0][0][RTW89_ETSI][23] = 32, -- [0][0][RTW89_FCC][25] = -18, -- [0][0][RTW89_ETSI][25] = 32, -- [0][0][RTW89_FCC][27] = -18, -- [0][0][RTW89_ETSI][27] = 32, -- [0][0][RTW89_FCC][29] = -18, -- [0][0][RTW89_ETSI][29] = 32, -- [0][0][RTW89_FCC][30] = -18, -- [0][0][RTW89_ETSI][30] = 32, -- [0][0][RTW89_FCC][32] = -18, -- [0][0][RTW89_ETSI][32] = 32, -- [0][0][RTW89_FCC][34] = -18, -- [0][0][RTW89_ETSI][34] = 32, -- [0][0][RTW89_FCC][36] = -18, -- [0][0][RTW89_ETSI][36] = 32, -- [0][0][RTW89_FCC][38] = -18, -- [0][0][RTW89_ETSI][38] = 32, -- [0][0][RTW89_FCC][40] = -18, -- [0][0][RTW89_ETSI][40] = 32, -- [0][0][RTW89_FCC][42] = -18, -- [0][0][RTW89_ETSI][42] = 32, -- [0][0][RTW89_FCC][44] = -16, -- [0][0][RTW89_ETSI][44] = 32, -- [0][0][RTW89_FCC][45] = -16, -- [0][0][RTW89_ETSI][45] = 127, -- [0][0][RTW89_FCC][47] = -18, -- [0][0][RTW89_ETSI][47] = 127, -- [0][0][RTW89_FCC][49] = -18, -- [0][0][RTW89_ETSI][49] = 127, -- [0][0][RTW89_FCC][51] = -18, -- [0][0][RTW89_ETSI][51] = 127, -- [0][0][RTW89_FCC][53] = -16, -- [0][0][RTW89_ETSI][53] = 127, -- [0][0][RTW89_FCC][55] = -18, -- [0][0][RTW89_ETSI][55] = 127, -- [0][0][RTW89_FCC][57] = -18, -- [0][0][RTW89_ETSI][57] = 127, -- [0][0][RTW89_FCC][59] = -18, -- [0][0][RTW89_ETSI][59] = 127, -- [0][0][RTW89_FCC][60] = -18, -- [0][0][RTW89_ETSI][60] = 127, -- [0][0][RTW89_FCC][62] = -18, -- [0][0][RTW89_ETSI][62] = 127, -- [0][0][RTW89_FCC][64] = -18, -- [0][0][RTW89_ETSI][64] = 127, -- [0][0][RTW89_FCC][66] = -18, -- [0][0][RTW89_ETSI][66] = 127, -- [0][0][RTW89_FCC][68] = -18, -- [0][0][RTW89_ETSI][68] = 127, -- [0][0][RTW89_FCC][70] = -16, -- [0][0][RTW89_ETSI][70] = 127, -- [0][0][RTW89_FCC][72] = -18, -- [0][0][RTW89_ETSI][72] = 127, -- [0][0][RTW89_FCC][74] = -18, -- [0][0][RTW89_ETSI][74] = 127, -- [0][0][RTW89_FCC][75] = -18, -- [0][0][RTW89_ETSI][75] = 127, -- [0][0][RTW89_FCC][77] = -18, -- [0][0][RTW89_ETSI][77] = 127, -- [0][0][RTW89_FCC][79] = -18, -- [0][0][RTW89_ETSI][79] = 127, -- [0][0][RTW89_FCC][81] = -18, -- [0][0][RTW89_ETSI][81] = 127, -- [0][0][RTW89_FCC][83] = -18, -- [0][0][RTW89_ETSI][83] = 127, -- [0][0][RTW89_FCC][85] = -18, -- [0][0][RTW89_ETSI][85] = 127, -- [0][0][RTW89_FCC][87] = -16, -- [0][0][RTW89_ETSI][87] = 127, -- [0][0][RTW89_FCC][89] = -16, -- [0][0][RTW89_ETSI][89] = 127, -- [0][0][RTW89_FCC][90] = -16, -- [0][0][RTW89_ETSI][90] = 127, -- [0][0][RTW89_FCC][92] = -16, -- [0][0][RTW89_ETSI][92] = 127, -- [0][0][RTW89_FCC][94] = -16, -- [0][0][RTW89_ETSI][94] = 127, -- [0][0][RTW89_FCC][96] = -16, -- [0][0][RTW89_ETSI][96] = 127, -- [0][0][RTW89_FCC][98] = -16, -- [0][0][RTW89_ETSI][98] = 127, -- [0][0][RTW89_FCC][100] = -16, -- [0][0][RTW89_ETSI][100] = 127, -- [0][0][RTW89_FCC][102] = -16, -- [0][0][RTW89_ETSI][102] = 127, -- [0][0][RTW89_FCC][104] = -16, -- [0][0][RTW89_ETSI][104] = 127, -- [0][0][RTW89_FCC][105] = -16, -- [0][0][RTW89_ETSI][105] = 127, -- [0][0][RTW89_FCC][107] = -12, -- [0][0][RTW89_ETSI][107] = 127, -- [0][0][RTW89_FCC][109] = -12, -- [0][0][RTW89_ETSI][109] = 127, -- [0][0][RTW89_FCC][111] = 127, -- [0][0][RTW89_ETSI][111] = 127, -- [0][0][RTW89_FCC][113] = 127, -- [0][0][RTW89_ETSI][113] = 127, -- [0][0][RTW89_FCC][115] = 127, -- [0][0][RTW89_ETSI][115] = 127, -- [0][0][RTW89_FCC][117] = 127, -- [0][0][RTW89_ETSI][117] = 127, -- [0][0][RTW89_FCC][119] = 127, -- [0][0][RTW89_ETSI][119] = 127, -- [0][1][RTW89_FCC][0] = -40, -- [0][1][RTW89_ETSI][0] = 20, -- [0][1][RTW89_FCC][2] = -40, -- [0][1][RTW89_ETSI][2] = 20, -- [0][1][RTW89_FCC][4] = -40, -- [0][1][RTW89_ETSI][4] = 20, -- [0][1][RTW89_FCC][6] = -40, -- [0][1][RTW89_ETSI][6] = 20, -- [0][1][RTW89_FCC][8] = -40, -- [0][1][RTW89_ETSI][8] = 20, -- [0][1][RTW89_FCC][10] = -40, -- [0][1][RTW89_ETSI][10] = 20, -- [0][1][RTW89_FCC][12] = -40, -- [0][1][RTW89_ETSI][12] = 20, -- [0][1][RTW89_FCC][14] = -40, -- [0][1][RTW89_ETSI][14] = 20, -- [0][1][RTW89_FCC][15] = -40, -- [0][1][RTW89_ETSI][15] = 20, -- [0][1][RTW89_FCC][17] = -40, -- [0][1][RTW89_ETSI][17] = 20, -- [0][1][RTW89_FCC][19] = -40, -- [0][1][RTW89_ETSI][19] = 20, -- [0][1][RTW89_FCC][21] = -40, -- [0][1][RTW89_ETSI][21] = 20, -- [0][1][RTW89_FCC][23] = -40, -- [0][1][RTW89_ETSI][23] = 20, -- [0][1][RTW89_FCC][25] = -40, -- [0][1][RTW89_ETSI][25] = 20, -- [0][1][RTW89_FCC][27] = -40, -- [0][1][RTW89_ETSI][27] = 20, -- [0][1][RTW89_FCC][29] = -40, -- [0][1][RTW89_ETSI][29] = 20, -- [0][1][RTW89_FCC][30] = -40, -- [0][1][RTW89_ETSI][30] = 20, -- [0][1][RTW89_FCC][32] = -40, -- [0][1][RTW89_ETSI][32] = 20, -- [0][1][RTW89_FCC][34] = -40, -- [0][1][RTW89_ETSI][34] = 20, -- [0][1][RTW89_FCC][36] = -40, -- [0][1][RTW89_ETSI][36] = 20, -- [0][1][RTW89_FCC][38] = -40, -- [0][1][RTW89_ETSI][38] = 20, -- [0][1][RTW89_FCC][40] = -40, -- [0][1][RTW89_ETSI][40] = 20, -- [0][1][RTW89_FCC][42] = -40, -- [0][1][RTW89_ETSI][42] = 20, -- [0][1][RTW89_FCC][44] = -40, -- [0][1][RTW89_ETSI][44] = 20, -- [0][1][RTW89_FCC][45] = -40, -- [0][1][RTW89_ETSI][45] = 127, -- [0][1][RTW89_FCC][47] = -40, -- [0][1][RTW89_ETSI][47] = 127, -- [0][1][RTW89_FCC][49] = -40, -- [0][1][RTW89_ETSI][49] = 127, -- [0][1][RTW89_FCC][51] = -40, -- [0][1][RTW89_ETSI][51] = 127, -- [0][1][RTW89_FCC][53] = -40, -- [0][1][RTW89_ETSI][53] = 127, -- [0][1][RTW89_FCC][55] = -40, -- [0][1][RTW89_ETSI][55] = 127, -- [0][1][RTW89_FCC][57] = -40, -- [0][1][RTW89_ETSI][57] = 127, -- [0][1][RTW89_FCC][59] = -40, -- [0][1][RTW89_ETSI][59] = 127, -- [0][1][RTW89_FCC][60] = -40, -- [0][1][RTW89_ETSI][60] = 127, -- [0][1][RTW89_FCC][62] = -40, -- [0][1][RTW89_ETSI][62] = 127, -- [0][1][RTW89_FCC][64] = -40, -- [0][1][RTW89_ETSI][64] = 127, -- [0][1][RTW89_FCC][66] = -40, -- [0][1][RTW89_ETSI][66] = 127, -- [0][1][RTW89_FCC][68] = -40, -- [0][1][RTW89_ETSI][68] = 127, -- [0][1][RTW89_FCC][70] = -38, -- [0][1][RTW89_ETSI][70] = 127, -- [0][1][RTW89_FCC][72] = -38, -- [0][1][RTW89_ETSI][72] = 127, -- [0][1][RTW89_FCC][74] = -38, -- [0][1][RTW89_ETSI][74] = 127, -- [0][1][RTW89_FCC][75] = -38, -- [0][1][RTW89_ETSI][75] = 127, -- [0][1][RTW89_FCC][77] = -38, -- [0][1][RTW89_ETSI][77] = 127, -- [0][1][RTW89_FCC][79] = -38, -- [0][1][RTW89_ETSI][79] = 127, -- [0][1][RTW89_FCC][81] = -38, -- [0][1][RTW89_ETSI][81] = 127, -- [0][1][RTW89_FCC][83] = -38, -- [0][1][RTW89_ETSI][83] = 127, -- [0][1][RTW89_FCC][85] = -38, -- [0][1][RTW89_ETSI][85] = 127, -- [0][1][RTW89_FCC][87] = -40, -- [0][1][RTW89_ETSI][87] = 127, -- [0][1][RTW89_FCC][89] = -38, -- [0][1][RTW89_ETSI][89] = 127, -- [0][1][RTW89_FCC][90] = -38, -- [0][1][RTW89_ETSI][90] = 127, -- [0][1][RTW89_FCC][92] = -38, -- [0][1][RTW89_ETSI][92] = 127, -- [0][1][RTW89_FCC][94] = -38, -- [0][1][RTW89_ETSI][94] = 127, -- [0][1][RTW89_FCC][96] = -38, -- [0][1][RTW89_ETSI][96] = 127, -- [0][1][RTW89_FCC][98] = -38, -- [0][1][RTW89_ETSI][98] = 127, -- [0][1][RTW89_FCC][100] = -38, -- [0][1][RTW89_ETSI][100] = 127, -- [0][1][RTW89_FCC][102] = -38, -- [0][1][RTW89_ETSI][102] = 127, -- [0][1][RTW89_FCC][104] = -38, -- [0][1][RTW89_ETSI][104] = 127, -- [0][1][RTW89_FCC][105] = -38, -- [0][1][RTW89_ETSI][105] = 127, -- [0][1][RTW89_FCC][107] = -34, -- [0][1][RTW89_ETSI][107] = 127, -- [0][1][RTW89_FCC][109] = -34, -- [0][1][RTW89_ETSI][109] = 127, -- [0][1][RTW89_FCC][111] = 127, -- [0][1][RTW89_ETSI][111] = 127, -- [0][1][RTW89_FCC][113] = 127, -- [0][1][RTW89_ETSI][113] = 127, -- [0][1][RTW89_FCC][115] = 127, -- [0][1][RTW89_ETSI][115] = 127, -- [0][1][RTW89_FCC][117] = 127, -- [0][1][RTW89_ETSI][117] = 127, -- [0][1][RTW89_FCC][119] = 127, -- [0][1][RTW89_ETSI][119] = 127, -- [1][0][RTW89_FCC][0] = -4, -- [1][0][RTW89_ETSI][0] = 46, -- [1][0][RTW89_FCC][2] = -4, -- [1][0][RTW89_ETSI][2] = 46, -- [1][0][RTW89_FCC][4] = -4, -- [1][0][RTW89_ETSI][4] = 46, -- [1][0][RTW89_FCC][6] = -4, -- [1][0][RTW89_ETSI][6] = 46, -- [1][0][RTW89_FCC][8] = -4, -- [1][0][RTW89_ETSI][8] = 46, -- [1][0][RTW89_FCC][10] = -4, -- [1][0][RTW89_ETSI][10] = 46, -- [1][0][RTW89_FCC][12] = -4, -- [1][0][RTW89_ETSI][12] = 46, -- [1][0][RTW89_FCC][14] = -4, -- [1][0][RTW89_ETSI][14] = 46, -- [1][0][RTW89_FCC][15] = -4, -- [1][0][RTW89_ETSI][15] = 46, -- [1][0][RTW89_FCC][17] = -4, -- [1][0][RTW89_ETSI][17] = 46, -- [1][0][RTW89_FCC][19] = -4, -- [1][0][RTW89_ETSI][19] = 46, -- [1][0][RTW89_FCC][21] = -4, -- [1][0][RTW89_ETSI][21] = 46, -- [1][0][RTW89_FCC][23] = -4, -- [1][0][RTW89_ETSI][23] = 46, -- [1][0][RTW89_FCC][25] = -4, -- [1][0][RTW89_ETSI][25] = 46, -- [1][0][RTW89_FCC][27] = -4, -- [1][0][RTW89_ETSI][27] = 46, -- [1][0][RTW89_FCC][29] = -4, -- [1][0][RTW89_ETSI][29] = 46, -- [1][0][RTW89_FCC][30] = -4, -- [1][0][RTW89_ETSI][30] = 46, -- [1][0][RTW89_FCC][32] = -4, -- [1][0][RTW89_ETSI][32] = 46, -- [1][0][RTW89_FCC][34] = -4, -- [1][0][RTW89_ETSI][34] = 46, -- [1][0][RTW89_FCC][36] = -4, -- [1][0][RTW89_ETSI][36] = 46, -- [1][0][RTW89_FCC][38] = -4, -- [1][0][RTW89_ETSI][38] = 46, -- [1][0][RTW89_FCC][40] = -4, -- [1][0][RTW89_ETSI][40] = 46, -- [1][0][RTW89_FCC][42] = -4, -- [1][0][RTW89_ETSI][42] = 46, -- [1][0][RTW89_FCC][44] = -4, -- [1][0][RTW89_ETSI][44] = 46, -- [1][0][RTW89_FCC][45] = -4, -- [1][0][RTW89_ETSI][45] = 127, -- [1][0][RTW89_FCC][47] = -4, -- [1][0][RTW89_ETSI][47] = 127, -- [1][0][RTW89_FCC][49] = -4, -- [1][0][RTW89_ETSI][49] = 127, -- [1][0][RTW89_FCC][51] = -4, -- [1][0][RTW89_ETSI][51] = 127, -- [1][0][RTW89_FCC][53] = -4, -- [1][0][RTW89_ETSI][53] = 127, -- [1][0][RTW89_FCC][55] = -4, -- [1][0][RTW89_ETSI][55] = 127, -- [1][0][RTW89_FCC][57] = -4, -- [1][0][RTW89_ETSI][57] = 127, -- [1][0][RTW89_FCC][59] = -4, -- [1][0][RTW89_ETSI][59] = 127, -- [1][0][RTW89_FCC][60] = -4, -- [1][0][RTW89_ETSI][60] = 127, -- [1][0][RTW89_FCC][62] = -4, -- [1][0][RTW89_ETSI][62] = 127, -- [1][0][RTW89_FCC][64] = -4, -- [1][0][RTW89_ETSI][64] = 127, -- [1][0][RTW89_FCC][66] = -4, -- [1][0][RTW89_ETSI][66] = 127, -- [1][0][RTW89_FCC][68] = -4, -- [1][0][RTW89_ETSI][68] = 127, -- [1][0][RTW89_FCC][70] = -4, -- [1][0][RTW89_ETSI][70] = 127, -- [1][0][RTW89_FCC][72] = -4, -- [1][0][RTW89_ETSI][72] = 127, -- [1][0][RTW89_FCC][74] = -4, -- [1][0][RTW89_ETSI][74] = 127, -- [1][0][RTW89_FCC][75] = -4, -- [1][0][RTW89_ETSI][75] = 127, -- [1][0][RTW89_FCC][77] = -4, -- [1][0][RTW89_ETSI][77] = 127, -- [1][0][RTW89_FCC][79] = -4, -- [1][0][RTW89_ETSI][79] = 127, -- [1][0][RTW89_FCC][81] = -4, -- [1][0][RTW89_ETSI][81] = 127, -- [1][0][RTW89_FCC][83] = -4, -- [1][0][RTW89_ETSI][83] = 127, -- [1][0][RTW89_FCC][85] = -4, -- [1][0][RTW89_ETSI][85] = 127, -- [1][0][RTW89_FCC][87] = -4, -- [1][0][RTW89_ETSI][87] = 127, -- [1][0][RTW89_FCC][89] = -4, -- [1][0][RTW89_ETSI][89] = 127, -- [1][0][RTW89_FCC][90] = -4, -- [1][0][RTW89_ETSI][90] = 127, -- [1][0][RTW89_FCC][92] = -4, -- [1][0][RTW89_ETSI][92] = 127, -- [1][0][RTW89_FCC][94] = -4, -- [1][0][RTW89_ETSI][94] = 127, -- [1][0][RTW89_FCC][96] = -4, -- [1][0][RTW89_ETSI][96] = 127, -- [1][0][RTW89_FCC][98] = -4, -- [1][0][RTW89_ETSI][98] = 127, -- [1][0][RTW89_FCC][100] = -4, -- [1][0][RTW89_ETSI][100] = 127, -- [1][0][RTW89_FCC][102] = -4, -- [1][0][RTW89_ETSI][102] = 127, -- [1][0][RTW89_FCC][104] = -4, -- [1][0][RTW89_ETSI][104] = 127, -- [1][0][RTW89_FCC][105] = -4, -- [1][0][RTW89_ETSI][105] = 127, -- [1][0][RTW89_FCC][107] = 0, -- [1][0][RTW89_ETSI][107] = 127, -- [1][0][RTW89_FCC][109] = 2, -- [1][0][RTW89_ETSI][109] = 127, -- [1][0][RTW89_FCC][111] = 127, -- [1][0][RTW89_ETSI][111] = 127, -- [1][0][RTW89_FCC][113] = 127, -- [1][0][RTW89_ETSI][113] = 127, -- [1][0][RTW89_FCC][115] = 127, -- [1][0][RTW89_ETSI][115] = 127, -- [1][0][RTW89_FCC][117] = 127, -- [1][0][RTW89_ETSI][117] = 127, -- [1][0][RTW89_FCC][119] = 127, -- [1][0][RTW89_ETSI][119] = 127, -- [1][1][RTW89_FCC][0] = -26, -- [1][1][RTW89_ETSI][0] = 32, -- [1][1][RTW89_FCC][2] = -28, -- [1][1][RTW89_ETSI][2] = 32, -- [1][1][RTW89_FCC][4] = -28, -- [1][1][RTW89_ETSI][4] = 32, -- [1][1][RTW89_FCC][6] = -28, -- [1][1][RTW89_ETSI][6] = 32, -- [1][1][RTW89_FCC][8] = -28, -- [1][1][RTW89_ETSI][8] = 32, -- [1][1][RTW89_FCC][10] = -28, -- [1][1][RTW89_ETSI][10] = 32, -- [1][1][RTW89_FCC][12] = -28, -- [1][1][RTW89_ETSI][12] = 32, -- [1][1][RTW89_FCC][14] = -28, -- [1][1][RTW89_ETSI][14] = 32, -- [1][1][RTW89_FCC][15] = -28, -- [1][1][RTW89_ETSI][15] = 32, -- [1][1][RTW89_FCC][17] = -28, -- [1][1][RTW89_ETSI][17] = 32, -- [1][1][RTW89_FCC][19] = -28, -- [1][1][RTW89_ETSI][19] = 32, -- [1][1][RTW89_FCC][21] = -28, -- [1][1][RTW89_ETSI][21] = 32, -- [1][1][RTW89_FCC][23] = -28, -- [1][1][RTW89_ETSI][23] = 32, -- [1][1][RTW89_FCC][25] = -28, -- [1][1][RTW89_ETSI][25] = 32, -- [1][1][RTW89_FCC][27] = -28, -- [1][1][RTW89_ETSI][27] = 32, -- [1][1][RTW89_FCC][29] = -28, -- [1][1][RTW89_ETSI][29] = 32, -- [1][1][RTW89_FCC][30] = -28, -- [1][1][RTW89_ETSI][30] = 32, -- [1][1][RTW89_FCC][32] = -28, -- [1][1][RTW89_ETSI][32] = 32, -- [1][1][RTW89_FCC][34] = -28, -- [1][1][RTW89_ETSI][34] = 32, -- [1][1][RTW89_FCC][36] = -28, -- [1][1][RTW89_ETSI][36] = 32, -- [1][1][RTW89_FCC][38] = -28, -- [1][1][RTW89_ETSI][38] = 32, -- [1][1][RTW89_FCC][40] = -28, -- [1][1][RTW89_ETSI][40] = 32, -- [1][1][RTW89_FCC][42] = -28, -- [1][1][RTW89_ETSI][42] = 32, -- [1][1][RTW89_FCC][44] = -28, -- [1][1][RTW89_ETSI][44] = 34, -- [1][1][RTW89_FCC][45] = -26, -- [1][1][RTW89_ETSI][45] = 127, -- [1][1][RTW89_FCC][47] = -28, -- [1][1][RTW89_ETSI][47] = 127, -- [1][1][RTW89_FCC][49] = -28, -- [1][1][RTW89_ETSI][49] = 127, -- [1][1][RTW89_FCC][51] = -28, -- [1][1][RTW89_ETSI][51] = 127, -- [1][1][RTW89_FCC][53] = -26, -- [1][1][RTW89_ETSI][53] = 127, -- [1][1][RTW89_FCC][55] = -28, -- [1][1][RTW89_ETSI][55] = 127, -- [1][1][RTW89_FCC][57] = -28, -- [1][1][RTW89_ETSI][57] = 127, -- [1][1][RTW89_FCC][59] = -28, -- [1][1][RTW89_ETSI][59] = 127, -- [1][1][RTW89_FCC][60] = -28, -- [1][1][RTW89_ETSI][60] = 127, -- [1][1][RTW89_FCC][62] = -28, -- [1][1][RTW89_ETSI][62] = 127, -- [1][1][RTW89_FCC][64] = -28, -- [1][1][RTW89_ETSI][64] = 127, -- [1][1][RTW89_FCC][66] = -28, -- [1][1][RTW89_ETSI][66] = 127, -- [1][1][RTW89_FCC][68] = -28, -- [1][1][RTW89_ETSI][68] = 127, -- [1][1][RTW89_FCC][70] = -26, -- [1][1][RTW89_ETSI][70] = 127, -- [1][1][RTW89_FCC][72] = -28, -- [1][1][RTW89_ETSI][72] = 127, -- [1][1][RTW89_FCC][74] = -28, -- [1][1][RTW89_ETSI][74] = 127, -- [1][1][RTW89_FCC][75] = -28, -- [1][1][RTW89_ETSI][75] = 127, -- [1][1][RTW89_FCC][77] = -28, -- [1][1][RTW89_ETSI][77] = 127, -- [1][1][RTW89_FCC][79] = -28, -- [1][1][RTW89_ETSI][79] = 127, -- [1][1][RTW89_FCC][81] = -28, -- [1][1][RTW89_ETSI][81] = 127, -- [1][1][RTW89_FCC][83] = -28, -- [1][1][RTW89_ETSI][83] = 127, -- [1][1][RTW89_FCC][85] = -28, -- [1][1][RTW89_ETSI][85] = 127, -- [1][1][RTW89_FCC][87] = -28, -- [1][1][RTW89_ETSI][87] = 127, -- [1][1][RTW89_FCC][89] = -26, -- [1][1][RTW89_ETSI][89] = 127, -- [1][1][RTW89_FCC][90] = -26, -- [1][1][RTW89_ETSI][90] = 127, -- [1][1][RTW89_FCC][92] = -26, -- [1][1][RTW89_ETSI][92] = 127, -- [1][1][RTW89_FCC][94] = -26, -- [1][1][RTW89_ETSI][94] = 127, -- [1][1][RTW89_FCC][96] = -26, -- [1][1][RTW89_ETSI][96] = 127, -- [1][1][RTW89_FCC][98] = -26, -- [1][1][RTW89_ETSI][98] = 127, -- [1][1][RTW89_FCC][100] = -26, -- [1][1][RTW89_ETSI][100] = 127, -- [1][1][RTW89_FCC][102] = -26, -- [1][1][RTW89_ETSI][102] = 127, -- [1][1][RTW89_FCC][104] = -26, -- [1][1][RTW89_ETSI][104] = 127, -- [1][1][RTW89_FCC][105] = -26, -- [1][1][RTW89_ETSI][105] = 127, -- [1][1][RTW89_FCC][107] = -22, -- [1][1][RTW89_ETSI][107] = 127, -- [1][1][RTW89_FCC][109] = -22, -- [1][1][RTW89_ETSI][109] = 127, -- [1][1][RTW89_FCC][111] = 127, -- [1][1][RTW89_ETSI][111] = 127, -- [1][1][RTW89_FCC][113] = 127, -- [1][1][RTW89_ETSI][113] = 127, -- [1][1][RTW89_FCC][115] = 127, -- [1][1][RTW89_ETSI][115] = 127, -- [1][1][RTW89_FCC][117] = 127, -- [1][1][RTW89_ETSI][117] = 127, -- [1][1][RTW89_FCC][119] = 127, -- [1][1][RTW89_ETSI][119] = 127, -- [2][0][RTW89_FCC][0] = 8, -- [2][0][RTW89_ETSI][0] = 56, -- [2][0][RTW89_FCC][2] = 8, -- [2][0][RTW89_ETSI][2] = 56, -- [2][0][RTW89_FCC][4] = 8, -- [2][0][RTW89_ETSI][4] = 56, -- [2][0][RTW89_FCC][6] = 8, -- [2][0][RTW89_ETSI][6] = 56, -- [2][0][RTW89_FCC][8] = 8, -- [2][0][RTW89_ETSI][8] = 56, -- [2][0][RTW89_FCC][10] = 8, -- [2][0][RTW89_ETSI][10] = 56, -- [2][0][RTW89_FCC][12] = 8, -- [2][0][RTW89_ETSI][12] = 56, -- [2][0][RTW89_FCC][14] = 8, -- [2][0][RTW89_ETSI][14] = 56, -- [2][0][RTW89_FCC][15] = 8, -- [2][0][RTW89_ETSI][15] = 56, -- [2][0][RTW89_FCC][17] = 8, -- [2][0][RTW89_ETSI][17] = 56, -- [2][0][RTW89_FCC][19] = 8, -- [2][0][RTW89_ETSI][19] = 56, -- [2][0][RTW89_FCC][21] = 8, -- [2][0][RTW89_ETSI][21] = 56, -- [2][0][RTW89_FCC][23] = 8, -- [2][0][RTW89_ETSI][23] = 56, -- [2][0][RTW89_FCC][25] = 8, -- [2][0][RTW89_ETSI][25] = 56, -- [2][0][RTW89_FCC][27] = 8, -- [2][0][RTW89_ETSI][27] = 56, -- [2][0][RTW89_FCC][29] = 8, -- [2][0][RTW89_ETSI][29] = 56, -- [2][0][RTW89_FCC][30] = 8, -- [2][0][RTW89_ETSI][30] = 56, -- [2][0][RTW89_FCC][32] = 8, -- [2][0][RTW89_ETSI][32] = 56, -- [2][0][RTW89_FCC][34] = 8, -- [2][0][RTW89_ETSI][34] = 56, -- [2][0][RTW89_FCC][36] = 8, -- [2][0][RTW89_ETSI][36] = 56, -- [2][0][RTW89_FCC][38] = 8, -- [2][0][RTW89_ETSI][38] = 56, -- [2][0][RTW89_FCC][40] = 8, -- [2][0][RTW89_ETSI][40] = 56, -- [2][0][RTW89_FCC][42] = 8, -- [2][0][RTW89_ETSI][42] = 56, -- [2][0][RTW89_FCC][44] = 8, -- [2][0][RTW89_ETSI][44] = 56, -- [2][0][RTW89_FCC][45] = 8, -- [2][0][RTW89_ETSI][45] = 127, -- [2][0][RTW89_FCC][47] = 8, -- [2][0][RTW89_ETSI][47] = 127, -- [2][0][RTW89_FCC][49] = 8, -- [2][0][RTW89_ETSI][49] = 127, -- [2][0][RTW89_FCC][51] = 8, -- [2][0][RTW89_ETSI][51] = 127, -- [2][0][RTW89_FCC][53] = 8, -- [2][0][RTW89_ETSI][53] = 127, -- [2][0][RTW89_FCC][55] = 8, -- [2][0][RTW89_ETSI][55] = 127, -- [2][0][RTW89_FCC][57] = 8, -- [2][0][RTW89_ETSI][57] = 127, -- [2][0][RTW89_FCC][59] = 8, -- [2][0][RTW89_ETSI][59] = 127, -- [2][0][RTW89_FCC][60] = 8, -- [2][0][RTW89_ETSI][60] = 127, -- [2][0][RTW89_FCC][62] = 8, -- [2][0][RTW89_ETSI][62] = 127, -- [2][0][RTW89_FCC][64] = 8, -- [2][0][RTW89_ETSI][64] = 127, -- [2][0][RTW89_FCC][66] = 8, -- [2][0][RTW89_ETSI][66] = 127, -- [2][0][RTW89_FCC][68] = 8, -- [2][0][RTW89_ETSI][68] = 127, -- [2][0][RTW89_FCC][70] = 8, -- [2][0][RTW89_ETSI][70] = 127, -- [2][0][RTW89_FCC][72] = 8, -- [2][0][RTW89_ETSI][72] = 127, -- [2][0][RTW89_FCC][74] = 8, -- [2][0][RTW89_ETSI][74] = 127, -- [2][0][RTW89_FCC][75] = 8, -- [2][0][RTW89_ETSI][75] = 127, -- [2][0][RTW89_FCC][77] = 8, -- [2][0][RTW89_ETSI][77] = 127, -- [2][0][RTW89_FCC][79] = 8, -- [2][0][RTW89_ETSI][79] = 127, -- [2][0][RTW89_FCC][81] = 8, -- [2][0][RTW89_ETSI][81] = 127, -- [2][0][RTW89_FCC][83] = 8, -- [2][0][RTW89_ETSI][83] = 127, -- [2][0][RTW89_FCC][85] = 8, -- [2][0][RTW89_ETSI][85] = 127, -- [2][0][RTW89_FCC][87] = 8, -- [2][0][RTW89_ETSI][87] = 127, -- [2][0][RTW89_FCC][89] = 8, -- [2][0][RTW89_ETSI][89] = 127, -- [2][0][RTW89_FCC][90] = 8, -- [2][0][RTW89_ETSI][90] = 127, -- [2][0][RTW89_FCC][92] = 8, -- [2][0][RTW89_ETSI][92] = 127, -- [2][0][RTW89_FCC][94] = 8, -- [2][0][RTW89_ETSI][94] = 127, -- [2][0][RTW89_FCC][96] = 8, -- [2][0][RTW89_ETSI][96] = 127, -- [2][0][RTW89_FCC][98] = 8, -- [2][0][RTW89_ETSI][98] = 127, -- [2][0][RTW89_FCC][100] = 8, -- [2][0][RTW89_ETSI][100] = 127, -- [2][0][RTW89_FCC][102] = 8, -- [2][0][RTW89_ETSI][102] = 127, -- [2][0][RTW89_FCC][104] = 8, -- [2][0][RTW89_ETSI][104] = 127, -- [2][0][RTW89_FCC][105] = 8, -- [2][0][RTW89_ETSI][105] = 127, -- [2][0][RTW89_FCC][107] = 10, -- [2][0][RTW89_ETSI][107] = 127, -- [2][0][RTW89_FCC][109] = 12, -- [2][0][RTW89_ETSI][109] = 127, -- [2][0][RTW89_FCC][111] = 127, -- [2][0][RTW89_ETSI][111] = 127, -- [2][0][RTW89_FCC][113] = 127, -- [2][0][RTW89_ETSI][113] = 127, -- [2][0][RTW89_FCC][115] = 127, -- [2][0][RTW89_ETSI][115] = 127, -- [2][0][RTW89_FCC][117] = 127, -- [2][0][RTW89_ETSI][117] = 127, -- [2][0][RTW89_FCC][119] = 127, -- [2][0][RTW89_ETSI][119] = 127, -- [2][1][RTW89_FCC][0] = -16, -- [2][1][RTW89_ETSI][0] = 44, -- [2][1][RTW89_FCC][2] = -16, -- [2][1][RTW89_ETSI][2] = 44, -- [2][1][RTW89_FCC][4] = -16, -- [2][1][RTW89_ETSI][4] = 44, -- [2][1][RTW89_FCC][6] = -16, -- [2][1][RTW89_ETSI][6] = 44, -- [2][1][RTW89_FCC][8] = -16, -- [2][1][RTW89_ETSI][8] = 44, -- [2][1][RTW89_FCC][10] = -16, -- [2][1][RTW89_ETSI][10] = 44, -- [2][1][RTW89_FCC][12] = -16, -- [2][1][RTW89_ETSI][12] = 44, -- [2][1][RTW89_FCC][14] = -16, -- [2][1][RTW89_ETSI][14] = 44, -- [2][1][RTW89_FCC][15] = -16, -- [2][1][RTW89_ETSI][15] = 44, -- [2][1][RTW89_FCC][17] = -16, -- [2][1][RTW89_ETSI][17] = 44, -- [2][1][RTW89_FCC][19] = -16, -- [2][1][RTW89_ETSI][19] = 44, -- [2][1][RTW89_FCC][21] = -16, -- [2][1][RTW89_ETSI][21] = 44, -- [2][1][RTW89_FCC][23] = -16, -- [2][1][RTW89_ETSI][23] = 44, -- [2][1][RTW89_FCC][25] = -16, -- [2][1][RTW89_ETSI][25] = 44, -- [2][1][RTW89_FCC][27] = -16, -- [2][1][RTW89_ETSI][27] = 44, -- [2][1][RTW89_FCC][29] = -16, -- [2][1][RTW89_ETSI][29] = 44, -- [2][1][RTW89_FCC][30] = -16, -- [2][1][RTW89_ETSI][30] = 44, -- [2][1][RTW89_FCC][32] = -16, -- [2][1][RTW89_ETSI][32] = 44, -- [2][1][RTW89_FCC][34] = -16, -- [2][1][RTW89_ETSI][34] = 44, -- [2][1][RTW89_FCC][36] = -16, -- [2][1][RTW89_ETSI][36] = 44, -- [2][1][RTW89_FCC][38] = -16, -- [2][1][RTW89_ETSI][38] = 44, -- [2][1][RTW89_FCC][40] = -16, -- [2][1][RTW89_ETSI][40] = 44, -- [2][1][RTW89_FCC][42] = -16, -- [2][1][RTW89_ETSI][42] = 44, -- [2][1][RTW89_FCC][44] = -16, -- [2][1][RTW89_ETSI][44] = 44, -- [2][1][RTW89_FCC][45] = -16, -- [2][1][RTW89_ETSI][45] = 127, -- [2][1][RTW89_FCC][47] = -16, -- [2][1][RTW89_ETSI][47] = 127, -- [2][1][RTW89_FCC][49] = -16, -- [2][1][RTW89_ETSI][49] = 127, -- [2][1][RTW89_FCC][51] = -16, -- [2][1][RTW89_ETSI][51] = 127, -- [2][1][RTW89_FCC][53] = -16, -- [2][1][RTW89_ETSI][53] = 127, -- [2][1][RTW89_FCC][55] = -16, -- [2][1][RTW89_ETSI][55] = 127, -- [2][1][RTW89_FCC][57] = -16, -- [2][1][RTW89_ETSI][57] = 127, -- [2][1][RTW89_FCC][59] = -16, -- [2][1][RTW89_ETSI][59] = 127, -- [2][1][RTW89_FCC][60] = -16, -- [2][1][RTW89_ETSI][60] = 127, -- [2][1][RTW89_FCC][62] = -16, -- [2][1][RTW89_ETSI][62] = 127, -- [2][1][RTW89_FCC][64] = -16, -- [2][1][RTW89_ETSI][64] = 127, -- [2][1][RTW89_FCC][66] = -16, -- [2][1][RTW89_ETSI][66] = 127, -- [2][1][RTW89_FCC][68] = -16, -- [2][1][RTW89_ETSI][68] = 127, -- [2][1][RTW89_FCC][70] = -16, -- [2][1][RTW89_ETSI][70] = 127, -- [2][1][RTW89_FCC][72] = -16, -- [2][1][RTW89_ETSI][72] = 127, -- [2][1][RTW89_FCC][74] = -16, -- [2][1][RTW89_ETSI][74] = 127, -- [2][1][RTW89_FCC][75] = -16, -- [2][1][RTW89_ETSI][75] = 127, -- [2][1][RTW89_FCC][77] = -16, -- [2][1][RTW89_ETSI][77] = 127, -- [2][1][RTW89_FCC][79] = -16, -- [2][1][RTW89_ETSI][79] = 127, -- [2][1][RTW89_FCC][81] = -16, -- [2][1][RTW89_ETSI][81] = 127, -- [2][1][RTW89_FCC][83] = -16, -- [2][1][RTW89_ETSI][83] = 127, -- [2][1][RTW89_FCC][85] = -18, -- [2][1][RTW89_ETSI][85] = 127, -- [2][1][RTW89_FCC][87] = -16, -- [2][1][RTW89_ETSI][87] = 127, -- [2][1][RTW89_FCC][89] = -16, -- [2][1][RTW89_ETSI][89] = 127, -- [2][1][RTW89_FCC][90] = -16, -- [2][1][RTW89_ETSI][90] = 127, -- [2][1][RTW89_FCC][92] = -16, -- [2][1][RTW89_ETSI][92] = 127, -- [2][1][RTW89_FCC][94] = -16, -- [2][1][RTW89_ETSI][94] = 127, -- [2][1][RTW89_FCC][96] = -16, -- [2][1][RTW89_ETSI][96] = 127, -- [2][1][RTW89_FCC][98] = -16, -- [2][1][RTW89_ETSI][98] = 127, -- [2][1][RTW89_FCC][100] = -16, -- [2][1][RTW89_ETSI][100] = 127, -- [2][1][RTW89_FCC][102] = -16, -- [2][1][RTW89_ETSI][102] = 127, -- [2][1][RTW89_FCC][104] = -16, -- [2][1][RTW89_ETSI][104] = 127, -- [2][1][RTW89_FCC][105] = -16, -- [2][1][RTW89_ETSI][105] = 127, -- [2][1][RTW89_FCC][107] = -12, -- [2][1][RTW89_ETSI][107] = 127, -- [2][1][RTW89_FCC][109] = -10, -- [2][1][RTW89_ETSI][109] = 127, -- [2][1][RTW89_FCC][111] = 127, -- [2][1][RTW89_ETSI][111] = 127, -- [2][1][RTW89_FCC][113] = 127, -- [2][1][RTW89_ETSI][113] = 127, -- [2][1][RTW89_FCC][115] = 127, -- [2][1][RTW89_ETSI][115] = 127, -- [2][1][RTW89_FCC][117] = 127, -- [2][1][RTW89_ETSI][117] = 127, -- [2][1][RTW89_FCC][119] = 127, -- [2][1][RTW89_ETSI][119] = 127, -+ [RTW89_REGD_NUM][NUM_OF_RTW89_REG_6GHZ_POWER] -+ [RTW89_6G_CH_NUM] = { -+ [0][0][RTW89_WW][0][0] = -16, -+ [0][0][RTW89_WW][1][0] = -16, -+ [0][0][RTW89_WW][2][0] = 44, -+ [0][0][RTW89_WW][0][2] = -18, -+ [0][0][RTW89_WW][1][2] = -18, -+ [0][0][RTW89_WW][2][2] = 44, -+ [0][0][RTW89_WW][0][4] = -18, -+ [0][0][RTW89_WW][1][4] = -18, -+ [0][0][RTW89_WW][2][4] = 44, -+ [0][0][RTW89_WW][0][6] = -18, -+ [0][0][RTW89_WW][1][6] = -18, -+ [0][0][RTW89_WW][2][6] = 44, -+ [0][0][RTW89_WW][0][8] = -18, -+ [0][0][RTW89_WW][1][8] = -18, -+ [0][0][RTW89_WW][2][8] = 44, -+ [0][0][RTW89_WW][0][10] = -18, -+ [0][0][RTW89_WW][1][10] = -18, -+ [0][0][RTW89_WW][2][10] = 44, -+ [0][0][RTW89_WW][0][12] = -18, -+ [0][0][RTW89_WW][1][12] = -18, -+ [0][0][RTW89_WW][2][12] = 44, -+ [0][0][RTW89_WW][0][14] = -18, -+ [0][0][RTW89_WW][1][14] = -18, -+ [0][0][RTW89_WW][2][14] = 44, -+ [0][0][RTW89_WW][0][15] = -18, -+ [0][0][RTW89_WW][1][15] = -18, -+ [0][0][RTW89_WW][2][15] = 44, -+ [0][0][RTW89_WW][0][17] = -18, -+ [0][0][RTW89_WW][1][17] = -18, -+ [0][0][RTW89_WW][2][17] = 44, -+ [0][0][RTW89_WW][0][19] = -18, -+ [0][0][RTW89_WW][1][19] = -18, -+ [0][0][RTW89_WW][2][19] = 44, -+ [0][0][RTW89_WW][0][21] = -18, -+ [0][0][RTW89_WW][1][21] = -18, -+ [0][0][RTW89_WW][2][21] = 44, -+ [0][0][RTW89_WW][0][23] = -18, -+ [0][0][RTW89_WW][1][23] = -18, -+ [0][0][RTW89_WW][2][23] = 54, -+ [0][0][RTW89_WW][0][25] = -18, -+ [0][0][RTW89_WW][1][25] = -18, -+ [0][0][RTW89_WW][2][25] = 54, -+ [0][0][RTW89_WW][0][27] = -18, -+ [0][0][RTW89_WW][1][27] = -18, -+ [0][0][RTW89_WW][2][27] = 54, -+ [0][0][RTW89_WW][0][29] = -18, -+ [0][0][RTW89_WW][1][29] = -18, -+ [0][0][RTW89_WW][2][29] = 54, -+ [0][0][RTW89_WW][0][30] = -18, -+ [0][0][RTW89_WW][1][30] = -18, -+ [0][0][RTW89_WW][2][30] = 54, -+ [0][0][RTW89_WW][0][32] = -18, -+ [0][0][RTW89_WW][1][32] = -18, -+ [0][0][RTW89_WW][2][32] = 54, -+ [0][0][RTW89_WW][0][34] = -18, -+ [0][0][RTW89_WW][1][34] = -18, -+ [0][0][RTW89_WW][2][34] = 54, -+ [0][0][RTW89_WW][0][36] = -18, -+ [0][0][RTW89_WW][1][36] = -18, -+ [0][0][RTW89_WW][2][36] = 54, -+ [0][0][RTW89_WW][0][38] = -18, -+ [0][0][RTW89_WW][1][38] = -18, -+ [0][0][RTW89_WW][2][38] = 54, -+ [0][0][RTW89_WW][0][40] = -18, -+ [0][0][RTW89_WW][1][40] = -18, -+ [0][0][RTW89_WW][2][40] = 54, -+ [0][0][RTW89_WW][0][42] = -18, -+ [0][0][RTW89_WW][1][42] = -18, -+ [0][0][RTW89_WW][2][42] = 54, -+ [0][0][RTW89_WW][0][44] = -16, -+ [0][0][RTW89_WW][1][44] = -16, -+ [0][0][RTW89_WW][2][44] = 56, -+ [0][0][RTW89_WW][0][45] = -16, -+ [0][0][RTW89_WW][1][45] = -16, -+ [0][0][RTW89_WW][2][45] = 0, -+ [0][0][RTW89_WW][0][47] = -18, -+ [0][0][RTW89_WW][1][47] = -18, -+ [0][0][RTW89_WW][2][47] = 0, -+ [0][0][RTW89_WW][0][49] = -18, -+ [0][0][RTW89_WW][1][49] = -18, -+ [0][0][RTW89_WW][2][49] = 0, -+ [0][0][RTW89_WW][0][51] = -18, -+ [0][0][RTW89_WW][1][51] = -18, -+ [0][0][RTW89_WW][2][51] = 0, -+ [0][0][RTW89_WW][0][53] = -16, -+ [0][0][RTW89_WW][1][53] = -16, -+ [0][0][RTW89_WW][2][53] = 0, -+ [0][0][RTW89_WW][0][55] = -18, -+ [0][0][RTW89_WW][1][55] = -18, -+ [0][0][RTW89_WW][2][55] = 56, -+ [0][0][RTW89_WW][0][57] = -18, -+ [0][0][RTW89_WW][1][57] = -18, -+ [0][0][RTW89_WW][2][57] = 56, -+ [0][0][RTW89_WW][0][59] = -18, -+ [0][0][RTW89_WW][1][59] = -18, -+ [0][0][RTW89_WW][2][59] = 56, -+ [0][0][RTW89_WW][0][60] = -18, -+ [0][0][RTW89_WW][1][60] = -18, -+ [0][0][RTW89_WW][2][60] = 56, -+ [0][0][RTW89_WW][0][62] = -18, -+ [0][0][RTW89_WW][1][62] = -18, -+ [0][0][RTW89_WW][2][62] = 56, -+ [0][0][RTW89_WW][0][64] = -18, -+ [0][0][RTW89_WW][1][64] = -18, -+ [0][0][RTW89_WW][2][64] = 56, -+ [0][0][RTW89_WW][0][66] = -18, -+ [0][0][RTW89_WW][1][66] = -18, -+ [0][0][RTW89_WW][2][66] = 56, -+ [0][0][RTW89_WW][0][68] = -18, -+ [0][0][RTW89_WW][1][68] = -18, -+ [0][0][RTW89_WW][2][68] = 56, -+ [0][0][RTW89_WW][0][70] = -16, -+ [0][0][RTW89_WW][1][70] = -16, -+ [0][0][RTW89_WW][2][70] = 56, -+ [0][0][RTW89_WW][0][72] = -18, -+ [0][0][RTW89_WW][1][72] = -18, -+ [0][0][RTW89_WW][2][72] = 56, -+ [0][0][RTW89_WW][0][74] = -18, -+ [0][0][RTW89_WW][1][74] = -18, -+ [0][0][RTW89_WW][2][74] = 56, -+ [0][0][RTW89_WW][0][75] = -18, -+ [0][0][RTW89_WW][1][75] = -18, -+ [0][0][RTW89_WW][2][75] = 56, -+ [0][0][RTW89_WW][0][77] = -18, -+ [0][0][RTW89_WW][1][77] = -18, -+ [0][0][RTW89_WW][2][77] = 56, -+ [0][0][RTW89_WW][0][79] = -18, -+ [0][0][RTW89_WW][1][79] = -18, -+ [0][0][RTW89_WW][2][79] = 56, -+ [0][0][RTW89_WW][0][81] = -18, -+ [0][0][RTW89_WW][1][81] = -18, -+ [0][0][RTW89_WW][2][81] = 56, -+ [0][0][RTW89_WW][0][83] = -18, -+ [0][0][RTW89_WW][1][83] = -18, -+ [0][0][RTW89_WW][2][83] = 56, -+ [0][0][RTW89_WW][0][85] = -18, -+ [0][0][RTW89_WW][1][85] = -18, -+ [0][0][RTW89_WW][2][85] = 56, -+ [0][0][RTW89_WW][0][87] = -16, -+ [0][0][RTW89_WW][1][87] = -16, -+ [0][0][RTW89_WW][2][87] = 0, -+ [0][0][RTW89_WW][0][89] = -16, -+ [0][0][RTW89_WW][1][89] = -16, -+ [0][0][RTW89_WW][2][89] = 0, -+ [0][0][RTW89_WW][0][90] = -16, -+ [0][0][RTW89_WW][1][90] = -16, -+ [0][0][RTW89_WW][2][90] = 0, -+ [0][0][RTW89_WW][0][92] = -16, -+ [0][0][RTW89_WW][1][92] = -16, -+ [0][0][RTW89_WW][2][92] = 0, -+ [0][0][RTW89_WW][0][94] = -16, -+ [0][0][RTW89_WW][1][94] = -16, -+ [0][0][RTW89_WW][2][94] = 0, -+ [0][0][RTW89_WW][0][96] = -16, -+ [0][0][RTW89_WW][1][96] = -16, -+ [0][0][RTW89_WW][2][96] = 0, -+ [0][0][RTW89_WW][0][98] = -16, -+ [0][0][RTW89_WW][1][98] = -16, -+ [0][0][RTW89_WW][2][98] = 0, -+ [0][0][RTW89_WW][0][100] = -16, -+ [0][0][RTW89_WW][1][100] = -16, -+ [0][0][RTW89_WW][2][100] = 0, -+ [0][0][RTW89_WW][0][102] = -16, -+ [0][0][RTW89_WW][1][102] = -16, -+ [0][0][RTW89_WW][2][102] = 0, -+ [0][0][RTW89_WW][0][104] = -16, -+ [0][0][RTW89_WW][1][104] = -16, -+ [0][0][RTW89_WW][2][104] = 0, -+ [0][0][RTW89_WW][0][105] = -16, -+ [0][0][RTW89_WW][1][105] = -16, -+ [0][0][RTW89_WW][2][105] = 0, -+ [0][0][RTW89_WW][0][107] = -12, -+ [0][0][RTW89_WW][1][107] = -12, -+ [0][0][RTW89_WW][2][107] = 0, -+ [0][0][RTW89_WW][0][109] = -12, -+ [0][0][RTW89_WW][1][109] = -12, -+ [0][0][RTW89_WW][2][109] = 0, -+ [0][0][RTW89_WW][0][111] = 0, -+ [0][0][RTW89_WW][1][111] = 0, -+ [0][0][RTW89_WW][2][111] = 0, -+ [0][0][RTW89_WW][0][113] = 0, -+ [0][0][RTW89_WW][1][113] = 0, -+ [0][0][RTW89_WW][2][113] = 0, -+ [0][0][RTW89_WW][0][115] = 0, -+ [0][0][RTW89_WW][1][115] = 0, -+ [0][0][RTW89_WW][2][115] = 0, -+ [0][0][RTW89_WW][0][117] = 0, -+ [0][0][RTW89_WW][1][117] = 0, -+ [0][0][RTW89_WW][2][117] = 0, -+ [0][0][RTW89_WW][0][119] = 0, -+ [0][0][RTW89_WW][1][119] = 0, -+ [0][0][RTW89_WW][2][119] = 0, -+ [0][1][RTW89_WW][0][0] = -40, -+ [0][1][RTW89_WW][1][0] = -40, -+ [0][1][RTW89_WW][2][0] = 32, -+ [0][1][RTW89_WW][0][2] = -40, -+ [0][1][RTW89_WW][1][2] = -40, -+ [0][1][RTW89_WW][2][2] = 32, -+ [0][1][RTW89_WW][0][4] = -40, -+ [0][1][RTW89_WW][1][4] = -40, -+ [0][1][RTW89_WW][2][4] = 32, -+ [0][1][RTW89_WW][0][6] = -40, -+ [0][1][RTW89_WW][1][6] = -40, -+ [0][1][RTW89_WW][2][6] = 32, -+ [0][1][RTW89_WW][0][8] = -40, -+ [0][1][RTW89_WW][1][8] = -40, -+ [0][1][RTW89_WW][2][8] = 32, -+ [0][1][RTW89_WW][0][10] = -40, -+ [0][1][RTW89_WW][1][10] = -40, -+ [0][1][RTW89_WW][2][10] = 32, -+ [0][1][RTW89_WW][0][12] = -40, -+ [0][1][RTW89_WW][1][12] = -40, -+ [0][1][RTW89_WW][2][12] = 32, -+ [0][1][RTW89_WW][0][14] = -40, -+ [0][1][RTW89_WW][1][14] = -40, -+ [0][1][RTW89_WW][2][14] = 32, -+ [0][1][RTW89_WW][0][15] = -40, -+ [0][1][RTW89_WW][1][15] = -40, -+ [0][1][RTW89_WW][2][15] = 32, -+ [0][1][RTW89_WW][0][17] = -40, -+ [0][1][RTW89_WW][1][17] = -40, -+ [0][1][RTW89_WW][2][17] = 32, -+ [0][1][RTW89_WW][0][19] = -40, -+ [0][1][RTW89_WW][1][19] = -40, -+ [0][1][RTW89_WW][2][19] = 32, -+ [0][1][RTW89_WW][0][21] = -40, -+ [0][1][RTW89_WW][1][21] = -40, -+ [0][1][RTW89_WW][2][21] = 32, -+ [0][1][RTW89_WW][0][23] = -40, -+ [0][1][RTW89_WW][1][23] = -40, -+ [0][1][RTW89_WW][2][23] = 32, -+ [0][1][RTW89_WW][0][25] = -40, -+ [0][1][RTW89_WW][1][25] = -40, -+ [0][1][RTW89_WW][2][25] = 32, -+ [0][1][RTW89_WW][0][27] = -40, -+ [0][1][RTW89_WW][1][27] = -40, -+ [0][1][RTW89_WW][2][27] = 32, -+ [0][1][RTW89_WW][0][29] = -40, -+ [0][1][RTW89_WW][1][29] = -40, -+ [0][1][RTW89_WW][2][29] = 32, -+ [0][1][RTW89_WW][0][30] = -40, -+ [0][1][RTW89_WW][1][30] = -40, -+ [0][1][RTW89_WW][2][30] = 32, -+ [0][1][RTW89_WW][0][32] = -40, -+ [0][1][RTW89_WW][1][32] = -40, -+ [0][1][RTW89_WW][2][32] = 32, -+ [0][1][RTW89_WW][0][34] = -40, -+ [0][1][RTW89_WW][1][34] = -40, -+ [0][1][RTW89_WW][2][34] = 32, -+ [0][1][RTW89_WW][0][36] = -40, -+ [0][1][RTW89_WW][1][36] = -40, -+ [0][1][RTW89_WW][2][36] = 32, -+ [0][1][RTW89_WW][0][38] = -40, -+ [0][1][RTW89_WW][1][38] = -40, -+ [0][1][RTW89_WW][2][38] = 32, -+ [0][1][RTW89_WW][0][40] = -40, -+ [0][1][RTW89_WW][1][40] = -40, -+ [0][1][RTW89_WW][2][40] = 32, -+ [0][1][RTW89_WW][0][42] = -40, -+ [0][1][RTW89_WW][1][42] = -40, -+ [0][1][RTW89_WW][2][42] = 32, -+ [0][1][RTW89_WW][0][44] = -40, -+ [0][1][RTW89_WW][1][44] = -40, -+ [0][1][RTW89_WW][2][44] = 32, -+ [0][1][RTW89_WW][0][45] = -40, -+ [0][1][RTW89_WW][1][45] = -40, -+ [0][1][RTW89_WW][2][45] = 0, -+ [0][1][RTW89_WW][0][47] = -40, -+ [0][1][RTW89_WW][1][47] = -40, -+ [0][1][RTW89_WW][2][47] = 0, -+ [0][1][RTW89_WW][0][49] = -40, -+ [0][1][RTW89_WW][1][49] = -40, -+ [0][1][RTW89_WW][2][49] = 0, -+ [0][1][RTW89_WW][0][51] = -40, -+ [0][1][RTW89_WW][1][51] = -40, -+ [0][1][RTW89_WW][2][51] = 0, -+ [0][1][RTW89_WW][0][53] = -40, -+ [0][1][RTW89_WW][1][53] = -40, -+ [0][1][RTW89_WW][2][53] = 0, -+ [0][1][RTW89_WW][0][55] = -40, -+ [0][1][RTW89_WW][1][55] = -40, -+ [0][1][RTW89_WW][2][55] = 30, -+ [0][1][RTW89_WW][0][57] = -40, -+ [0][1][RTW89_WW][1][57] = -40, -+ [0][1][RTW89_WW][2][57] = 30, -+ [0][1][RTW89_WW][0][59] = -40, -+ [0][1][RTW89_WW][1][59] = -40, -+ [0][1][RTW89_WW][2][59] = 30, -+ [0][1][RTW89_WW][0][60] = -40, -+ [0][1][RTW89_WW][1][60] = -40, -+ [0][1][RTW89_WW][2][60] = 30, -+ [0][1][RTW89_WW][0][62] = -40, -+ [0][1][RTW89_WW][1][62] = -40, -+ [0][1][RTW89_WW][2][62] = 30, -+ [0][1][RTW89_WW][0][64] = -40, -+ [0][1][RTW89_WW][1][64] = -40, -+ [0][1][RTW89_WW][2][64] = 30, -+ [0][1][RTW89_WW][0][66] = -40, -+ [0][1][RTW89_WW][1][66] = -40, -+ [0][1][RTW89_WW][2][66] = 30, -+ [0][1][RTW89_WW][0][68] = -40, -+ [0][1][RTW89_WW][1][68] = -40, -+ [0][1][RTW89_WW][2][68] = 30, -+ [0][1][RTW89_WW][0][70] = -38, -+ [0][1][RTW89_WW][1][70] = -38, -+ [0][1][RTW89_WW][2][70] = 30, -+ [0][1][RTW89_WW][0][72] = -38, -+ [0][1][RTW89_WW][1][72] = -38, -+ [0][1][RTW89_WW][2][72] = 30, -+ [0][1][RTW89_WW][0][74] = -38, -+ [0][1][RTW89_WW][1][74] = -38, -+ [0][1][RTW89_WW][2][74] = 30, -+ [0][1][RTW89_WW][0][75] = -38, -+ [0][1][RTW89_WW][1][75] = -38, -+ [0][1][RTW89_WW][2][75] = 30, -+ [0][1][RTW89_WW][0][77] = -38, -+ [0][1][RTW89_WW][1][77] = -38, -+ [0][1][RTW89_WW][2][77] = 30, -+ [0][1][RTW89_WW][0][79] = -38, -+ [0][1][RTW89_WW][1][79] = -38, -+ [0][1][RTW89_WW][2][79] = 30, -+ [0][1][RTW89_WW][0][81] = -38, -+ [0][1][RTW89_WW][1][81] = -38, -+ [0][1][RTW89_WW][2][81] = 30, -+ [0][1][RTW89_WW][0][83] = -38, -+ [0][1][RTW89_WW][1][83] = -38, -+ [0][1][RTW89_WW][2][83] = 30, -+ [0][1][RTW89_WW][0][85] = -38, -+ [0][1][RTW89_WW][1][85] = -38, -+ [0][1][RTW89_WW][2][85] = 30, -+ [0][1][RTW89_WW][0][87] = -40, -+ [0][1][RTW89_WW][1][87] = -40, -+ [0][1][RTW89_WW][2][87] = 0, -+ [0][1][RTW89_WW][0][89] = -38, -+ [0][1][RTW89_WW][1][89] = -38, -+ [0][1][RTW89_WW][2][89] = 0, -+ [0][1][RTW89_WW][0][90] = -38, -+ [0][1][RTW89_WW][1][90] = -38, -+ [0][1][RTW89_WW][2][90] = 0, -+ [0][1][RTW89_WW][0][92] = -38, -+ [0][1][RTW89_WW][1][92] = -38, -+ [0][1][RTW89_WW][2][92] = 0, -+ [0][1][RTW89_WW][0][94] = -38, -+ [0][1][RTW89_WW][1][94] = -38, -+ [0][1][RTW89_WW][2][94] = 0, -+ [0][1][RTW89_WW][0][96] = -38, -+ [0][1][RTW89_WW][1][96] = -38, -+ [0][1][RTW89_WW][2][96] = 0, -+ [0][1][RTW89_WW][0][98] = -38, -+ [0][1][RTW89_WW][1][98] = -38, -+ [0][1][RTW89_WW][2][98] = 0, -+ [0][1][RTW89_WW][0][100] = -38, -+ [0][1][RTW89_WW][1][100] = -38, -+ [0][1][RTW89_WW][2][100] = 0, -+ [0][1][RTW89_WW][0][102] = -38, -+ [0][1][RTW89_WW][1][102] = -38, -+ [0][1][RTW89_WW][2][102] = 0, -+ [0][1][RTW89_WW][0][104] = -38, -+ [0][1][RTW89_WW][1][104] = -38, -+ [0][1][RTW89_WW][2][104] = 0, -+ [0][1][RTW89_WW][0][105] = -38, -+ [0][1][RTW89_WW][1][105] = -38, -+ [0][1][RTW89_WW][2][105] = 0, -+ [0][1][RTW89_WW][0][107] = -34, -+ [0][1][RTW89_WW][1][107] = -34, -+ [0][1][RTW89_WW][2][107] = 0, -+ [0][1][RTW89_WW][0][109] = -34, -+ [0][1][RTW89_WW][1][109] = -34, -+ [0][1][RTW89_WW][2][109] = 0, -+ [0][1][RTW89_WW][0][111] = 0, -+ [0][1][RTW89_WW][1][111] = 0, -+ [0][1][RTW89_WW][2][111] = 0, -+ [0][1][RTW89_WW][0][113] = 0, -+ [0][1][RTW89_WW][1][113] = 0, -+ [0][1][RTW89_WW][2][113] = 0, -+ [0][1][RTW89_WW][0][115] = 0, -+ [0][1][RTW89_WW][1][115] = 0, -+ [0][1][RTW89_WW][2][115] = 0, -+ [0][1][RTW89_WW][0][117] = 0, -+ [0][1][RTW89_WW][1][117] = 0, -+ [0][1][RTW89_WW][2][117] = 0, -+ [0][1][RTW89_WW][0][119] = 0, -+ [0][1][RTW89_WW][1][119] = 0, -+ [0][1][RTW89_WW][2][119] = 0, -+ [1][0][RTW89_WW][0][0] = -4, -+ [1][0][RTW89_WW][1][0] = -4, -+ [1][0][RTW89_WW][2][0] = 52, -+ [1][0][RTW89_WW][0][2] = -4, -+ [1][0][RTW89_WW][1][2] = -4, -+ [1][0][RTW89_WW][2][2] = 52, -+ [1][0][RTW89_WW][0][4] = -4, -+ [1][0][RTW89_WW][1][4] = -4, -+ [1][0][RTW89_WW][2][4] = 52, -+ [1][0][RTW89_WW][0][6] = -4, -+ [1][0][RTW89_WW][1][6] = -4, -+ [1][0][RTW89_WW][2][6] = 52, -+ [1][0][RTW89_WW][0][8] = -4, -+ [1][0][RTW89_WW][1][8] = -4, -+ [1][0][RTW89_WW][2][8] = 52, -+ [1][0][RTW89_WW][0][10] = -4, -+ [1][0][RTW89_WW][1][10] = -4, -+ [1][0][RTW89_WW][2][10] = 52, -+ [1][0][RTW89_WW][0][12] = -4, -+ [1][0][RTW89_WW][1][12] = -4, -+ [1][0][RTW89_WW][2][12] = 52, -+ [1][0][RTW89_WW][0][14] = -4, -+ [1][0][RTW89_WW][1][14] = -4, -+ [1][0][RTW89_WW][2][14] = 52, -+ [1][0][RTW89_WW][0][15] = -4, -+ [1][0][RTW89_WW][1][15] = -4, -+ [1][0][RTW89_WW][2][15] = 52, -+ [1][0][RTW89_WW][0][17] = -4, -+ [1][0][RTW89_WW][1][17] = -4, -+ [1][0][RTW89_WW][2][17] = 52, -+ [1][0][RTW89_WW][0][19] = -4, -+ [1][0][RTW89_WW][1][19] = -4, -+ [1][0][RTW89_WW][2][19] = 52, -+ [1][0][RTW89_WW][0][21] = -4, -+ [1][0][RTW89_WW][1][21] = -4, -+ [1][0][RTW89_WW][2][21] = 52, -+ [1][0][RTW89_WW][0][23] = -4, -+ [1][0][RTW89_WW][1][23] = -4, -+ [1][0][RTW89_WW][2][23] = 66, -+ [1][0][RTW89_WW][0][25] = -4, -+ [1][0][RTW89_WW][1][25] = -4, -+ [1][0][RTW89_WW][2][25] = 66, -+ [1][0][RTW89_WW][0][27] = -4, -+ [1][0][RTW89_WW][1][27] = -4, -+ [1][0][RTW89_WW][2][27] = 66, -+ [1][0][RTW89_WW][0][29] = -4, -+ [1][0][RTW89_WW][1][29] = -4, -+ [1][0][RTW89_WW][2][29] = 66, -+ [1][0][RTW89_WW][0][30] = -4, -+ [1][0][RTW89_WW][1][30] = -4, -+ [1][0][RTW89_WW][2][30] = 66, -+ [1][0][RTW89_WW][0][32] = -4, -+ [1][0][RTW89_WW][1][32] = -4, -+ [1][0][RTW89_WW][2][32] = 66, -+ [1][0][RTW89_WW][0][34] = -4, -+ [1][0][RTW89_WW][1][34] = -4, -+ [1][0][RTW89_WW][2][34] = 66, -+ [1][0][RTW89_WW][0][36] = -4, -+ [1][0][RTW89_WW][1][36] = -4, -+ [1][0][RTW89_WW][2][36] = 66, -+ [1][0][RTW89_WW][0][38] = -4, -+ [1][0][RTW89_WW][1][38] = -4, -+ [1][0][RTW89_WW][2][38] = 66, -+ [1][0][RTW89_WW][0][40] = -4, -+ [1][0][RTW89_WW][1][40] = -4, -+ [1][0][RTW89_WW][2][40] = 66, -+ [1][0][RTW89_WW][0][42] = -4, -+ [1][0][RTW89_WW][1][42] = -4, -+ [1][0][RTW89_WW][2][42] = 66, -+ [1][0][RTW89_WW][0][44] = -4, -+ [1][0][RTW89_WW][1][44] = -4, -+ [1][0][RTW89_WW][2][44] = 66, -+ [1][0][RTW89_WW][0][45] = -4, -+ [1][0][RTW89_WW][1][45] = -4, -+ [1][0][RTW89_WW][2][45] = 0, -+ [1][0][RTW89_WW][0][47] = -4, -+ [1][0][RTW89_WW][1][47] = -4, -+ [1][0][RTW89_WW][2][47] = 0, -+ [1][0][RTW89_WW][0][49] = -4, -+ [1][0][RTW89_WW][1][49] = -4, -+ [1][0][RTW89_WW][2][49] = 0, -+ [1][0][RTW89_WW][0][51] = -4, -+ [1][0][RTW89_WW][1][51] = -4, -+ [1][0][RTW89_WW][2][51] = 0, -+ [1][0][RTW89_WW][0][53] = -4, -+ [1][0][RTW89_WW][1][53] = -4, -+ [1][0][RTW89_WW][2][53] = 0, -+ [1][0][RTW89_WW][0][55] = -4, -+ [1][0][RTW89_WW][1][55] = -4, -+ [1][0][RTW89_WW][2][55] = 68, -+ [1][0][RTW89_WW][0][57] = -4, -+ [1][0][RTW89_WW][1][57] = -4, -+ [1][0][RTW89_WW][2][57] = 68, -+ [1][0][RTW89_WW][0][59] = -4, -+ [1][0][RTW89_WW][1][59] = -4, -+ [1][0][RTW89_WW][2][59] = 68, -+ [1][0][RTW89_WW][0][60] = -4, -+ [1][0][RTW89_WW][1][60] = -4, -+ [1][0][RTW89_WW][2][60] = 68, -+ [1][0][RTW89_WW][0][62] = -4, -+ [1][0][RTW89_WW][1][62] = -4, -+ [1][0][RTW89_WW][2][62] = 68, -+ [1][0][RTW89_WW][0][64] = -4, -+ [1][0][RTW89_WW][1][64] = -4, -+ [1][0][RTW89_WW][2][64] = 68, -+ [1][0][RTW89_WW][0][66] = -4, -+ [1][0][RTW89_WW][1][66] = -4, -+ [1][0][RTW89_WW][2][66] = 68, -+ [1][0][RTW89_WW][0][68] = -4, -+ [1][0][RTW89_WW][1][68] = -4, -+ [1][0][RTW89_WW][2][68] = 68, -+ [1][0][RTW89_WW][0][70] = -4, -+ [1][0][RTW89_WW][1][70] = -4, -+ [1][0][RTW89_WW][2][70] = 68, -+ [1][0][RTW89_WW][0][72] = -4, -+ [1][0][RTW89_WW][1][72] = -4, -+ [1][0][RTW89_WW][2][72] = 68, -+ [1][0][RTW89_WW][0][74] = -4, -+ [1][0][RTW89_WW][1][74] = -4, -+ [1][0][RTW89_WW][2][74] = 68, -+ [1][0][RTW89_WW][0][75] = -4, -+ [1][0][RTW89_WW][1][75] = -4, -+ [1][0][RTW89_WW][2][75] = 68, -+ [1][0][RTW89_WW][0][77] = -4, -+ [1][0][RTW89_WW][1][77] = -4, -+ [1][0][RTW89_WW][2][77] = 68, -+ [1][0][RTW89_WW][0][79] = -4, -+ [1][0][RTW89_WW][1][79] = -4, -+ [1][0][RTW89_WW][2][79] = 68, -+ [1][0][RTW89_WW][0][81] = -4, -+ [1][0][RTW89_WW][1][81] = -4, -+ [1][0][RTW89_WW][2][81] = 68, -+ [1][0][RTW89_WW][0][83] = -4, -+ [1][0][RTW89_WW][1][83] = -4, -+ [1][0][RTW89_WW][2][83] = 68, -+ [1][0][RTW89_WW][0][85] = -4, -+ [1][0][RTW89_WW][1][85] = -4, -+ [1][0][RTW89_WW][2][85] = 68, -+ [1][0][RTW89_WW][0][87] = -4, -+ [1][0][RTW89_WW][1][87] = -4, -+ [1][0][RTW89_WW][2][87] = 0, -+ [1][0][RTW89_WW][0][89] = -4, -+ [1][0][RTW89_WW][1][89] = -4, -+ [1][0][RTW89_WW][2][89] = 0, -+ [1][0][RTW89_WW][0][90] = -4, -+ [1][0][RTW89_WW][1][90] = -4, -+ [1][0][RTW89_WW][2][90] = 0, -+ [1][0][RTW89_WW][0][92] = -4, -+ [1][0][RTW89_WW][1][92] = -4, -+ [1][0][RTW89_WW][2][92] = 0, -+ [1][0][RTW89_WW][0][94] = -4, -+ [1][0][RTW89_WW][1][94] = -4, -+ [1][0][RTW89_WW][2][94] = 0, -+ [1][0][RTW89_WW][0][96] = -4, -+ [1][0][RTW89_WW][1][96] = -4, -+ [1][0][RTW89_WW][2][96] = 0, -+ [1][0][RTW89_WW][0][98] = -4, -+ [1][0][RTW89_WW][1][98] = -4, -+ [1][0][RTW89_WW][2][98] = 0, -+ [1][0][RTW89_WW][0][100] = -4, -+ [1][0][RTW89_WW][1][100] = -4, -+ [1][0][RTW89_WW][2][100] = 0, -+ [1][0][RTW89_WW][0][102] = -4, -+ [1][0][RTW89_WW][1][102] = -4, -+ [1][0][RTW89_WW][2][102] = 0, -+ [1][0][RTW89_WW][0][104] = -4, -+ [1][0][RTW89_WW][1][104] = -4, -+ [1][0][RTW89_WW][2][104] = 0, -+ [1][0][RTW89_WW][0][105] = -4, -+ [1][0][RTW89_WW][1][105] = -4, -+ [1][0][RTW89_WW][2][105] = 0, -+ [1][0][RTW89_WW][0][107] = -2, -+ [1][0][RTW89_WW][1][107] = -2, -+ [1][0][RTW89_WW][2][107] = 0, -+ [1][0][RTW89_WW][0][109] = 2, -+ [1][0][RTW89_WW][1][109] = 2, -+ [1][0][RTW89_WW][2][109] = 0, -+ [1][0][RTW89_WW][0][111] = 0, -+ [1][0][RTW89_WW][1][111] = 0, -+ [1][0][RTW89_WW][2][111] = 0, -+ [1][0][RTW89_WW][0][113] = 0, -+ [1][0][RTW89_WW][1][113] = 0, -+ [1][0][RTW89_WW][2][113] = 0, -+ [1][0][RTW89_WW][0][115] = 0, -+ [1][0][RTW89_WW][1][115] = 0, -+ [1][0][RTW89_WW][2][115] = 0, -+ [1][0][RTW89_WW][0][117] = 0, -+ [1][0][RTW89_WW][1][117] = 0, -+ [1][0][RTW89_WW][2][117] = 0, -+ [1][0][RTW89_WW][0][119] = 0, -+ [1][0][RTW89_WW][1][119] = 0, -+ [1][0][RTW89_WW][2][119] = 0, -+ [1][1][RTW89_WW][0][0] = -26, -+ [1][1][RTW89_WW][1][0] = -26, -+ [1][1][RTW89_WW][2][0] = 44, -+ [1][1][RTW89_WW][0][2] = -28, -+ [1][1][RTW89_WW][1][2] = -28, -+ [1][1][RTW89_WW][2][2] = 44, -+ [1][1][RTW89_WW][0][4] = -28, -+ [1][1][RTW89_WW][1][4] = -28, -+ [1][1][RTW89_WW][2][4] = 44, -+ [1][1][RTW89_WW][0][6] = -28, -+ [1][1][RTW89_WW][1][6] = -28, -+ [1][1][RTW89_WW][2][6] = 44, -+ [1][1][RTW89_WW][0][8] = -28, -+ [1][1][RTW89_WW][1][8] = -28, -+ [1][1][RTW89_WW][2][8] = 44, -+ [1][1][RTW89_WW][0][10] = -28, -+ [1][1][RTW89_WW][1][10] = -28, -+ [1][1][RTW89_WW][2][10] = 44, -+ [1][1][RTW89_WW][0][12] = -28, -+ [1][1][RTW89_WW][1][12] = -28, -+ [1][1][RTW89_WW][2][12] = 44, -+ [1][1][RTW89_WW][0][14] = -28, -+ [1][1][RTW89_WW][1][14] = -28, -+ [1][1][RTW89_WW][2][14] = 44, -+ [1][1][RTW89_WW][0][15] = -28, -+ [1][1][RTW89_WW][1][15] = -28, -+ [1][1][RTW89_WW][2][15] = 44, -+ [1][1][RTW89_WW][0][17] = -28, -+ [1][1][RTW89_WW][1][17] = -28, -+ [1][1][RTW89_WW][2][17] = 44, -+ [1][1][RTW89_WW][0][19] = -28, -+ [1][1][RTW89_WW][1][19] = -28, -+ [1][1][RTW89_WW][2][19] = 44, -+ [1][1][RTW89_WW][0][21] = -28, -+ [1][1][RTW89_WW][1][21] = -28, -+ [1][1][RTW89_WW][2][21] = 44, -+ [1][1][RTW89_WW][0][23] = -28, -+ [1][1][RTW89_WW][1][23] = -28, -+ [1][1][RTW89_WW][2][23] = 44, -+ [1][1][RTW89_WW][0][25] = -28, -+ [1][1][RTW89_WW][1][25] = -28, -+ [1][1][RTW89_WW][2][25] = 44, -+ [1][1][RTW89_WW][0][27] = -28, -+ [1][1][RTW89_WW][1][27] = -28, -+ [1][1][RTW89_WW][2][27] = 44, -+ [1][1][RTW89_WW][0][29] = -28, -+ [1][1][RTW89_WW][1][29] = -28, -+ [1][1][RTW89_WW][2][29] = 44, -+ [1][1][RTW89_WW][0][30] = -28, -+ [1][1][RTW89_WW][1][30] = -28, -+ [1][1][RTW89_WW][2][30] = 44, -+ [1][1][RTW89_WW][0][32] = -28, -+ [1][1][RTW89_WW][1][32] = -28, -+ [1][1][RTW89_WW][2][32] = 44, -+ [1][1][RTW89_WW][0][34] = -28, -+ [1][1][RTW89_WW][1][34] = -28, -+ [1][1][RTW89_WW][2][34] = 44, -+ [1][1][RTW89_WW][0][36] = -28, -+ [1][1][RTW89_WW][1][36] = -28, -+ [1][1][RTW89_WW][2][36] = 44, -+ [1][1][RTW89_WW][0][38] = -28, -+ [1][1][RTW89_WW][1][38] = -28, -+ [1][1][RTW89_WW][2][38] = 44, -+ [1][1][RTW89_WW][0][40] = -28, -+ [1][1][RTW89_WW][1][40] = -28, -+ [1][1][RTW89_WW][2][40] = 44, -+ [1][1][RTW89_WW][0][42] = -28, -+ [1][1][RTW89_WW][1][42] = -28, -+ [1][1][RTW89_WW][2][42] = 44, -+ [1][1][RTW89_WW][0][44] = -28, -+ [1][1][RTW89_WW][1][44] = -28, -+ [1][1][RTW89_WW][2][44] = 44, -+ [1][1][RTW89_WW][0][45] = -26, -+ [1][1][RTW89_WW][1][45] = -26, -+ [1][1][RTW89_WW][2][45] = 0, -+ [1][1][RTW89_WW][0][47] = -28, -+ [1][1][RTW89_WW][1][47] = -28, -+ [1][1][RTW89_WW][2][47] = 0, -+ [1][1][RTW89_WW][0][49] = -28, -+ [1][1][RTW89_WW][1][49] = -28, -+ [1][1][RTW89_WW][2][49] = 0, -+ [1][1][RTW89_WW][0][51] = -28, -+ [1][1][RTW89_WW][1][51] = -28, -+ [1][1][RTW89_WW][2][51] = 0, -+ [1][1][RTW89_WW][0][53] = -26, -+ [1][1][RTW89_WW][1][53] = -26, -+ [1][1][RTW89_WW][2][53] = 0, -+ [1][1][RTW89_WW][0][55] = -28, -+ [1][1][RTW89_WW][1][55] = -28, -+ [1][1][RTW89_WW][2][55] = 44, -+ [1][1][RTW89_WW][0][57] = -28, -+ [1][1][RTW89_WW][1][57] = -28, -+ [1][1][RTW89_WW][2][57] = 44, -+ [1][1][RTW89_WW][0][59] = -28, -+ [1][1][RTW89_WW][1][59] = -28, -+ [1][1][RTW89_WW][2][59] = 44, -+ [1][1][RTW89_WW][0][60] = -28, -+ [1][1][RTW89_WW][1][60] = -28, -+ [1][1][RTW89_WW][2][60] = 44, -+ [1][1][RTW89_WW][0][62] = -28, -+ [1][1][RTW89_WW][1][62] = -28, -+ [1][1][RTW89_WW][2][62] = 44, -+ [1][1][RTW89_WW][0][64] = -28, -+ [1][1][RTW89_WW][1][64] = -28, -+ [1][1][RTW89_WW][2][64] = 44, -+ [1][1][RTW89_WW][0][66] = -28, -+ [1][1][RTW89_WW][1][66] = -28, -+ [1][1][RTW89_WW][2][66] = 44, -+ [1][1][RTW89_WW][0][68] = -28, -+ [1][1][RTW89_WW][1][68] = -28, -+ [1][1][RTW89_WW][2][68] = 44, -+ [1][1][RTW89_WW][0][70] = -26, -+ [1][1][RTW89_WW][1][70] = -26, -+ [1][1][RTW89_WW][2][70] = 44, -+ [1][1][RTW89_WW][0][72] = -28, -+ [1][1][RTW89_WW][1][72] = -28, -+ [1][1][RTW89_WW][2][72] = 44, -+ [1][1][RTW89_WW][0][74] = -28, -+ [1][1][RTW89_WW][1][74] = -28, -+ [1][1][RTW89_WW][2][74] = 44, -+ [1][1][RTW89_WW][0][75] = -28, -+ [1][1][RTW89_WW][1][75] = -28, -+ [1][1][RTW89_WW][2][75] = 44, -+ [1][1][RTW89_WW][0][77] = -28, -+ [1][1][RTW89_WW][1][77] = -28, -+ [1][1][RTW89_WW][2][77] = 44, -+ [1][1][RTW89_WW][0][79] = -28, -+ [1][1][RTW89_WW][1][79] = -28, -+ [1][1][RTW89_WW][2][79] = 44, -+ [1][1][RTW89_WW][0][81] = -28, -+ [1][1][RTW89_WW][1][81] = -28, -+ [1][1][RTW89_WW][2][81] = 44, -+ [1][1][RTW89_WW][0][83] = -28, -+ [1][1][RTW89_WW][1][83] = -28, -+ [1][1][RTW89_WW][2][83] = 44, -+ [1][1][RTW89_WW][0][85] = -28, -+ [1][1][RTW89_WW][1][85] = -28, -+ [1][1][RTW89_WW][2][85] = 44, -+ [1][1][RTW89_WW][0][87] = -28, -+ [1][1][RTW89_WW][1][87] = -28, -+ [1][1][RTW89_WW][2][87] = 0, -+ [1][1][RTW89_WW][0][89] = -26, -+ [1][1][RTW89_WW][1][89] = -26, -+ [1][1][RTW89_WW][2][89] = 0, -+ [1][1][RTW89_WW][0][90] = -26, -+ [1][1][RTW89_WW][1][90] = -26, -+ [1][1][RTW89_WW][2][90] = 0, -+ [1][1][RTW89_WW][0][92] = -26, -+ [1][1][RTW89_WW][1][92] = -26, -+ [1][1][RTW89_WW][2][92] = 0, -+ [1][1][RTW89_WW][0][94] = -26, -+ [1][1][RTW89_WW][1][94] = -26, -+ [1][1][RTW89_WW][2][94] = 0, -+ [1][1][RTW89_WW][0][96] = -26, -+ [1][1][RTW89_WW][1][96] = -26, -+ [1][1][RTW89_WW][2][96] = 0, -+ [1][1][RTW89_WW][0][98] = -26, -+ [1][1][RTW89_WW][1][98] = -26, -+ [1][1][RTW89_WW][2][98] = 0, -+ [1][1][RTW89_WW][0][100] = -26, -+ [1][1][RTW89_WW][1][100] = -26, -+ [1][1][RTW89_WW][2][100] = 0, -+ [1][1][RTW89_WW][0][102] = -26, -+ [1][1][RTW89_WW][1][102] = -26, -+ [1][1][RTW89_WW][2][102] = 0, -+ [1][1][RTW89_WW][0][104] = -26, -+ [1][1][RTW89_WW][1][104] = -26, -+ [1][1][RTW89_WW][2][104] = 0, -+ [1][1][RTW89_WW][0][105] = -26, -+ [1][1][RTW89_WW][1][105] = -26, -+ [1][1][RTW89_WW][2][105] = 0, -+ [1][1][RTW89_WW][0][107] = -22, -+ [1][1][RTW89_WW][1][107] = -22, -+ [1][1][RTW89_WW][2][107] = 0, -+ [1][1][RTW89_WW][0][109] = -22, -+ [1][1][RTW89_WW][1][109] = -22, -+ [1][1][RTW89_WW][2][109] = 0, -+ [1][1][RTW89_WW][0][111] = 0, -+ [1][1][RTW89_WW][1][111] = 0, -+ [1][1][RTW89_WW][2][111] = 0, -+ [1][1][RTW89_WW][0][113] = 0, -+ [1][1][RTW89_WW][1][113] = 0, -+ [1][1][RTW89_WW][2][113] = 0, -+ [1][1][RTW89_WW][0][115] = 0, -+ [1][1][RTW89_WW][1][115] = 0, -+ [1][1][RTW89_WW][2][115] = 0, -+ [1][1][RTW89_WW][0][117] = 0, -+ [1][1][RTW89_WW][1][117] = 0, -+ [1][1][RTW89_WW][2][117] = 0, -+ [1][1][RTW89_WW][0][119] = 0, -+ [1][1][RTW89_WW][1][119] = 0, -+ [1][1][RTW89_WW][2][119] = 0, -+ [2][0][RTW89_WW][0][0] = -2, -+ [2][0][RTW89_WW][1][0] = -2, -+ [2][0][RTW89_WW][2][0] = 60, -+ [2][0][RTW89_WW][0][2] = -2, -+ [2][0][RTW89_WW][1][2] = -2, -+ [2][0][RTW89_WW][2][2] = 60, -+ [2][0][RTW89_WW][0][4] = -2, -+ [2][0][RTW89_WW][1][4] = -2, -+ [2][0][RTW89_WW][2][4] = 60, -+ [2][0][RTW89_WW][0][6] = -2, -+ [2][0][RTW89_WW][1][6] = -2, -+ [2][0][RTW89_WW][2][6] = 60, -+ [2][0][RTW89_WW][0][8] = -2, -+ [2][0][RTW89_WW][1][8] = -2, -+ [2][0][RTW89_WW][2][8] = 60, -+ [2][0][RTW89_WW][0][10] = -2, -+ [2][0][RTW89_WW][1][10] = -2, -+ [2][0][RTW89_WW][2][10] = 60, -+ [2][0][RTW89_WW][0][12] = -2, -+ [2][0][RTW89_WW][1][12] = -2, -+ [2][0][RTW89_WW][2][12] = 60, -+ [2][0][RTW89_WW][0][14] = -2, -+ [2][0][RTW89_WW][1][14] = -2, -+ [2][0][RTW89_WW][2][14] = 60, -+ [2][0][RTW89_WW][0][15] = -2, -+ [2][0][RTW89_WW][1][15] = -2, -+ [2][0][RTW89_WW][2][15] = 60, -+ [2][0][RTW89_WW][0][17] = -2, -+ [2][0][RTW89_WW][1][17] = -2, -+ [2][0][RTW89_WW][2][17] = 60, -+ [2][0][RTW89_WW][0][19] = -2, -+ [2][0][RTW89_WW][1][19] = -2, -+ [2][0][RTW89_WW][2][19] = 60, -+ [2][0][RTW89_WW][0][21] = -2, -+ [2][0][RTW89_WW][1][21] = -2, -+ [2][0][RTW89_WW][2][21] = 60, -+ [2][0][RTW89_WW][0][23] = -2, -+ [2][0][RTW89_WW][1][23] = -2, -+ [2][0][RTW89_WW][2][23] = 78, -+ [2][0][RTW89_WW][0][25] = -2, -+ [2][0][RTW89_WW][1][25] = -2, -+ [2][0][RTW89_WW][2][25] = 78, -+ [2][0][RTW89_WW][0][27] = -2, -+ [2][0][RTW89_WW][1][27] = -2, -+ [2][0][RTW89_WW][2][27] = 78, -+ [2][0][RTW89_WW][0][29] = -2, -+ [2][0][RTW89_WW][1][29] = -2, -+ [2][0][RTW89_WW][2][29] = 78, -+ [2][0][RTW89_WW][0][30] = -2, -+ [2][0][RTW89_WW][1][30] = -2, -+ [2][0][RTW89_WW][2][30] = 78, -+ [2][0][RTW89_WW][0][32] = -2, -+ [2][0][RTW89_WW][1][32] = -2, -+ [2][0][RTW89_WW][2][32] = 78, -+ [2][0][RTW89_WW][0][34] = -2, -+ [2][0][RTW89_WW][1][34] = -2, -+ [2][0][RTW89_WW][2][34] = 78, -+ [2][0][RTW89_WW][0][36] = -2, -+ [2][0][RTW89_WW][1][36] = -2, -+ [2][0][RTW89_WW][2][36] = 78, -+ [2][0][RTW89_WW][0][38] = -2, -+ [2][0][RTW89_WW][1][38] = -2, -+ [2][0][RTW89_WW][2][38] = 78, -+ [2][0][RTW89_WW][0][40] = -2, -+ [2][0][RTW89_WW][1][40] = -2, -+ [2][0][RTW89_WW][2][40] = 78, -+ [2][0][RTW89_WW][0][42] = -2, -+ [2][0][RTW89_WW][1][42] = -2, -+ [2][0][RTW89_WW][2][42] = 78, -+ [2][0][RTW89_WW][0][44] = -2, -+ [2][0][RTW89_WW][1][44] = -2, -+ [2][0][RTW89_WW][2][44] = 78, -+ [2][0][RTW89_WW][0][45] = -2, -+ [2][0][RTW89_WW][1][45] = -2, -+ [2][0][RTW89_WW][2][45] = 0, -+ [2][0][RTW89_WW][0][47] = -2, -+ [2][0][RTW89_WW][1][47] = -2, -+ [2][0][RTW89_WW][2][47] = 0, -+ [2][0][RTW89_WW][0][49] = -2, -+ [2][0][RTW89_WW][1][49] = -2, -+ [2][0][RTW89_WW][2][49] = 0, -+ [2][0][RTW89_WW][0][51] = -2, -+ [2][0][RTW89_WW][1][51] = -2, -+ [2][0][RTW89_WW][2][51] = 0, -+ [2][0][RTW89_WW][0][53] = -2, -+ [2][0][RTW89_WW][1][53] = -2, -+ [2][0][RTW89_WW][2][53] = 0, -+ [2][0][RTW89_WW][0][55] = -2, -+ [2][0][RTW89_WW][1][55] = -2, -+ [2][0][RTW89_WW][2][55] = 78, -+ [2][0][RTW89_WW][0][57] = -2, -+ [2][0][RTW89_WW][1][57] = -2, -+ [2][0][RTW89_WW][2][57] = 78, -+ [2][0][RTW89_WW][0][59] = -2, -+ [2][0][RTW89_WW][1][59] = -2, -+ [2][0][RTW89_WW][2][59] = 78, -+ [2][0][RTW89_WW][0][60] = -2, -+ [2][0][RTW89_WW][1][60] = -2, -+ [2][0][RTW89_WW][2][60] = 78, -+ [2][0][RTW89_WW][0][62] = -2, -+ [2][0][RTW89_WW][1][62] = -2, -+ [2][0][RTW89_WW][2][62] = 78, -+ [2][0][RTW89_WW][0][64] = -2, -+ [2][0][RTW89_WW][1][64] = -2, -+ [2][0][RTW89_WW][2][64] = 78, -+ [2][0][RTW89_WW][0][66] = -2, -+ [2][0][RTW89_WW][1][66] = -2, -+ [2][0][RTW89_WW][2][66] = 78, -+ [2][0][RTW89_WW][0][68] = -2, -+ [2][0][RTW89_WW][1][68] = -2, -+ [2][0][RTW89_WW][2][68] = 78, -+ [2][0][RTW89_WW][0][70] = -2, -+ [2][0][RTW89_WW][1][70] = -2, -+ [2][0][RTW89_WW][2][70] = 78, -+ [2][0][RTW89_WW][0][72] = -2, -+ [2][0][RTW89_WW][1][72] = -2, -+ [2][0][RTW89_WW][2][72] = 78, -+ [2][0][RTW89_WW][0][74] = -2, -+ [2][0][RTW89_WW][1][74] = -2, -+ [2][0][RTW89_WW][2][74] = 78, -+ [2][0][RTW89_WW][0][75] = -2, -+ [2][0][RTW89_WW][1][75] = -2, -+ [2][0][RTW89_WW][2][75] = 78, -+ [2][0][RTW89_WW][0][77] = -2, -+ [2][0][RTW89_WW][1][77] = -2, -+ [2][0][RTW89_WW][2][77] = 78, -+ [2][0][RTW89_WW][0][79] = -2, -+ [2][0][RTW89_WW][1][79] = -2, -+ [2][0][RTW89_WW][2][79] = 78, -+ [2][0][RTW89_WW][0][81] = -2, -+ [2][0][RTW89_WW][1][81] = -2, -+ [2][0][RTW89_WW][2][81] = 78, -+ [2][0][RTW89_WW][0][83] = -2, -+ [2][0][RTW89_WW][1][83] = -2, -+ [2][0][RTW89_WW][2][83] = 78, -+ [2][0][RTW89_WW][0][85] = -2, -+ [2][0][RTW89_WW][1][85] = -2, -+ [2][0][RTW89_WW][2][85] = 78, -+ [2][0][RTW89_WW][0][87] = -2, -+ [2][0][RTW89_WW][1][87] = -2, -+ [2][0][RTW89_WW][2][87] = 0, -+ [2][0][RTW89_WW][0][89] = -2, -+ [2][0][RTW89_WW][1][89] = -2, -+ [2][0][RTW89_WW][2][89] = 0, -+ [2][0][RTW89_WW][0][90] = -2, -+ [2][0][RTW89_WW][1][90] = -2, -+ [2][0][RTW89_WW][2][90] = 0, -+ [2][0][RTW89_WW][0][92] = -2, -+ [2][0][RTW89_WW][1][92] = -2, -+ [2][0][RTW89_WW][2][92] = 0, -+ [2][0][RTW89_WW][0][94] = -2, -+ [2][0][RTW89_WW][1][94] = -2, -+ [2][0][RTW89_WW][2][94] = 0, -+ [2][0][RTW89_WW][0][96] = -2, -+ [2][0][RTW89_WW][1][96] = -2, -+ [2][0][RTW89_WW][2][96] = 0, -+ [2][0][RTW89_WW][0][98] = -2, -+ [2][0][RTW89_WW][1][98] = -2, -+ [2][0][RTW89_WW][2][98] = 0, -+ [2][0][RTW89_WW][0][100] = -2, -+ [2][0][RTW89_WW][1][100] = -2, -+ [2][0][RTW89_WW][2][100] = 0, -+ [2][0][RTW89_WW][0][102] = -2, -+ [2][0][RTW89_WW][1][102] = -2, -+ [2][0][RTW89_WW][2][102] = 0, -+ [2][0][RTW89_WW][0][104] = -2, -+ [2][0][RTW89_WW][1][104] = -2, -+ [2][0][RTW89_WW][2][104] = 0, -+ [2][0][RTW89_WW][0][105] = -2, -+ [2][0][RTW89_WW][1][105] = -2, -+ [2][0][RTW89_WW][2][105] = 0, -+ [2][0][RTW89_WW][0][107] = -2, -+ [2][0][RTW89_WW][1][107] = -2, -+ [2][0][RTW89_WW][2][107] = 0, -+ [2][0][RTW89_WW][0][109] = 12, -+ [2][0][RTW89_WW][1][109] = 12, -+ [2][0][RTW89_WW][2][109] = 0, -+ [2][0][RTW89_WW][0][111] = 0, -+ [2][0][RTW89_WW][1][111] = 0, -+ [2][0][RTW89_WW][2][111] = 0, -+ [2][0][RTW89_WW][0][113] = 0, -+ [2][0][RTW89_WW][1][113] = 0, -+ [2][0][RTW89_WW][2][113] = 0, -+ [2][0][RTW89_WW][0][115] = 0, -+ [2][0][RTW89_WW][1][115] = 0, -+ [2][0][RTW89_WW][2][115] = 0, -+ [2][0][RTW89_WW][0][117] = 0, -+ [2][0][RTW89_WW][1][117] = 0, -+ [2][0][RTW89_WW][2][117] = 0, -+ [2][0][RTW89_WW][0][119] = 0, -+ [2][0][RTW89_WW][1][119] = 0, -+ [2][0][RTW89_WW][2][119] = 0, -+ [2][1][RTW89_WW][0][0] = -16, -+ [2][1][RTW89_WW][1][0] = -16, -+ [2][1][RTW89_WW][2][0] = 54, -+ [2][1][RTW89_WW][0][2] = -16, -+ [2][1][RTW89_WW][1][2] = -16, -+ [2][1][RTW89_WW][2][2] = 54, -+ [2][1][RTW89_WW][0][4] = -16, -+ [2][1][RTW89_WW][1][4] = -16, -+ [2][1][RTW89_WW][2][4] = 54, -+ [2][1][RTW89_WW][0][6] = -16, -+ [2][1][RTW89_WW][1][6] = -16, -+ [2][1][RTW89_WW][2][6] = 54, -+ [2][1][RTW89_WW][0][8] = -16, -+ [2][1][RTW89_WW][1][8] = -16, -+ [2][1][RTW89_WW][2][8] = 54, -+ [2][1][RTW89_WW][0][10] = -16, -+ [2][1][RTW89_WW][1][10] = -16, -+ [2][1][RTW89_WW][2][10] = 54, -+ [2][1][RTW89_WW][0][12] = -16, -+ [2][1][RTW89_WW][1][12] = -16, -+ [2][1][RTW89_WW][2][12] = 54, -+ [2][1][RTW89_WW][0][14] = -16, -+ [2][1][RTW89_WW][1][14] = -16, -+ [2][1][RTW89_WW][2][14] = 54, -+ [2][1][RTW89_WW][0][15] = -16, -+ [2][1][RTW89_WW][1][15] = -16, -+ [2][1][RTW89_WW][2][15] = 54, -+ [2][1][RTW89_WW][0][17] = -16, -+ [2][1][RTW89_WW][1][17] = -16, -+ [2][1][RTW89_WW][2][17] = 54, -+ [2][1][RTW89_WW][0][19] = -16, -+ [2][1][RTW89_WW][1][19] = -16, -+ [2][1][RTW89_WW][2][19] = 54, -+ [2][1][RTW89_WW][0][21] = -16, -+ [2][1][RTW89_WW][1][21] = -16, -+ [2][1][RTW89_WW][2][21] = 54, -+ [2][1][RTW89_WW][0][23] = -16, -+ [2][1][RTW89_WW][1][23] = -16, -+ [2][1][RTW89_WW][2][23] = 54, -+ [2][1][RTW89_WW][0][25] = -16, -+ [2][1][RTW89_WW][1][25] = -16, -+ [2][1][RTW89_WW][2][25] = 54, -+ [2][1][RTW89_WW][0][27] = -16, -+ [2][1][RTW89_WW][1][27] = -16, -+ [2][1][RTW89_WW][2][27] = 54, -+ [2][1][RTW89_WW][0][29] = -16, -+ [2][1][RTW89_WW][1][29] = -16, -+ [2][1][RTW89_WW][2][29] = 54, -+ [2][1][RTW89_WW][0][30] = -16, -+ [2][1][RTW89_WW][1][30] = -16, -+ [2][1][RTW89_WW][2][30] = 54, -+ [2][1][RTW89_WW][0][32] = -16, -+ [2][1][RTW89_WW][1][32] = -16, -+ [2][1][RTW89_WW][2][32] = 54, -+ [2][1][RTW89_WW][0][34] = -16, -+ [2][1][RTW89_WW][1][34] = -16, -+ [2][1][RTW89_WW][2][34] = 54, -+ [2][1][RTW89_WW][0][36] = -16, -+ [2][1][RTW89_WW][1][36] = -16, -+ [2][1][RTW89_WW][2][36] = 54, -+ [2][1][RTW89_WW][0][38] = -16, -+ [2][1][RTW89_WW][1][38] = -16, -+ [2][1][RTW89_WW][2][38] = 54, -+ [2][1][RTW89_WW][0][40] = -16, -+ [2][1][RTW89_WW][1][40] = -16, -+ [2][1][RTW89_WW][2][40] = 54, -+ [2][1][RTW89_WW][0][42] = -16, -+ [2][1][RTW89_WW][1][42] = -16, -+ [2][1][RTW89_WW][2][42] = 54, -+ [2][1][RTW89_WW][0][44] = -16, -+ [2][1][RTW89_WW][1][44] = -16, -+ [2][1][RTW89_WW][2][44] = 54, -+ [2][1][RTW89_WW][0][45] = -16, -+ [2][1][RTW89_WW][1][45] = -16, -+ [2][1][RTW89_WW][2][45] = 0, -+ [2][1][RTW89_WW][0][47] = -16, -+ [2][1][RTW89_WW][1][47] = -16, -+ [2][1][RTW89_WW][2][47] = 0, -+ [2][1][RTW89_WW][0][49] = -16, -+ [2][1][RTW89_WW][1][49] = -16, -+ [2][1][RTW89_WW][2][49] = 0, -+ [2][1][RTW89_WW][0][51] = -16, -+ [2][1][RTW89_WW][1][51] = -16, -+ [2][1][RTW89_WW][2][51] = 0, -+ [2][1][RTW89_WW][0][53] = -16, -+ [2][1][RTW89_WW][1][53] = -16, -+ [2][1][RTW89_WW][2][53] = 0, -+ [2][1][RTW89_WW][0][55] = -16, -+ [2][1][RTW89_WW][1][55] = -16, -+ [2][1][RTW89_WW][2][55] = 54, -+ [2][1][RTW89_WW][0][57] = -16, -+ [2][1][RTW89_WW][1][57] = -16, -+ [2][1][RTW89_WW][2][57] = 54, -+ [2][1][RTW89_WW][0][59] = -16, -+ [2][1][RTW89_WW][1][59] = -16, -+ [2][1][RTW89_WW][2][59] = 54, -+ [2][1][RTW89_WW][0][60] = -16, -+ [2][1][RTW89_WW][1][60] = -16, -+ [2][1][RTW89_WW][2][60] = 54, -+ [2][1][RTW89_WW][0][62] = -16, -+ [2][1][RTW89_WW][1][62] = -16, -+ [2][1][RTW89_WW][2][62] = 54, -+ [2][1][RTW89_WW][0][64] = -16, -+ [2][1][RTW89_WW][1][64] = -16, -+ [2][1][RTW89_WW][2][64] = 54, -+ [2][1][RTW89_WW][0][66] = -16, -+ [2][1][RTW89_WW][1][66] = -16, -+ [2][1][RTW89_WW][2][66] = 54, -+ [2][1][RTW89_WW][0][68] = -16, -+ [2][1][RTW89_WW][1][68] = -16, -+ [2][1][RTW89_WW][2][68] = 54, -+ [2][1][RTW89_WW][0][70] = -16, -+ [2][1][RTW89_WW][1][70] = -16, -+ [2][1][RTW89_WW][2][70] = 56, -+ [2][1][RTW89_WW][0][72] = -16, -+ [2][1][RTW89_WW][1][72] = -16, -+ [2][1][RTW89_WW][2][72] = 56, -+ [2][1][RTW89_WW][0][74] = -16, -+ [2][1][RTW89_WW][1][74] = -16, -+ [2][1][RTW89_WW][2][74] = 56, -+ [2][1][RTW89_WW][0][75] = -16, -+ [2][1][RTW89_WW][1][75] = -16, -+ [2][1][RTW89_WW][2][75] = 56, -+ [2][1][RTW89_WW][0][77] = -16, -+ [2][1][RTW89_WW][1][77] = -16, -+ [2][1][RTW89_WW][2][77] = 56, -+ [2][1][RTW89_WW][0][79] = -16, -+ [2][1][RTW89_WW][1][79] = -16, -+ [2][1][RTW89_WW][2][79] = 56, -+ [2][1][RTW89_WW][0][81] = -16, -+ [2][1][RTW89_WW][1][81] = -16, -+ [2][1][RTW89_WW][2][81] = 56, -+ [2][1][RTW89_WW][0][83] = -16, -+ [2][1][RTW89_WW][1][83] = -16, -+ [2][1][RTW89_WW][2][83] = 56, -+ [2][1][RTW89_WW][0][85] = -18, -+ [2][1][RTW89_WW][1][85] = -18, -+ [2][1][RTW89_WW][2][85] = 56, -+ [2][1][RTW89_WW][0][87] = -16, -+ [2][1][RTW89_WW][1][87] = -16, -+ [2][1][RTW89_WW][2][87] = 0, -+ [2][1][RTW89_WW][0][89] = -16, -+ [2][1][RTW89_WW][1][89] = -16, -+ [2][1][RTW89_WW][2][89] = 0, -+ [2][1][RTW89_WW][0][90] = -16, -+ [2][1][RTW89_WW][1][90] = -16, -+ [2][1][RTW89_WW][2][90] = 0, -+ [2][1][RTW89_WW][0][92] = -16, -+ [2][1][RTW89_WW][1][92] = -16, -+ [2][1][RTW89_WW][2][92] = 0, -+ [2][1][RTW89_WW][0][94] = -16, -+ [2][1][RTW89_WW][1][94] = -16, -+ [2][1][RTW89_WW][2][94] = 0, -+ [2][1][RTW89_WW][0][96] = -16, -+ [2][1][RTW89_WW][1][96] = -16, -+ [2][1][RTW89_WW][2][96] = 0, -+ [2][1][RTW89_WW][0][98] = -16, -+ [2][1][RTW89_WW][1][98] = -16, -+ [2][1][RTW89_WW][2][98] = 0, -+ [2][1][RTW89_WW][0][100] = -16, -+ [2][1][RTW89_WW][1][100] = -16, -+ [2][1][RTW89_WW][2][100] = 0, -+ [2][1][RTW89_WW][0][102] = -16, -+ [2][1][RTW89_WW][1][102] = -16, -+ [2][1][RTW89_WW][2][102] = 0, -+ [2][1][RTW89_WW][0][104] = -16, -+ [2][1][RTW89_WW][1][104] = -16, -+ [2][1][RTW89_WW][2][104] = 0, -+ [2][1][RTW89_WW][0][105] = -16, -+ [2][1][RTW89_WW][1][105] = -16, -+ [2][1][RTW89_WW][2][105] = 0, -+ [2][1][RTW89_WW][0][107] = -14, -+ [2][1][RTW89_WW][1][107] = -14, -+ [2][1][RTW89_WW][2][107] = 0, -+ [2][1][RTW89_WW][0][109] = -10, -+ [2][1][RTW89_WW][1][109] = -10, -+ [2][1][RTW89_WW][2][109] = 0, -+ [2][1][RTW89_WW][0][111] = 0, -+ [2][1][RTW89_WW][1][111] = 0, -+ [2][1][RTW89_WW][2][111] = 0, -+ [2][1][RTW89_WW][0][113] = 0, -+ [2][1][RTW89_WW][1][113] = 0, -+ [2][1][RTW89_WW][2][113] = 0, -+ [2][1][RTW89_WW][0][115] = 0, -+ [2][1][RTW89_WW][1][115] = 0, -+ [2][1][RTW89_WW][2][115] = 0, -+ [2][1][RTW89_WW][0][117] = 0, -+ [2][1][RTW89_WW][1][117] = 0, -+ [2][1][RTW89_WW][2][117] = 0, -+ [2][1][RTW89_WW][0][119] = 0, -+ [2][1][RTW89_WW][1][119] = 0, -+ [2][1][RTW89_WW][2][119] = 0, -+ [0][0][RTW89_FCC][1][0] = -16, -+ [0][0][RTW89_FCC][2][0] = 44, -+ [0][0][RTW89_ETSI][1][0] = 32, -+ [0][0][RTW89_ETSI][0][0] = -8, -+ [0][0][RTW89_MKK][1][0] = 30, -+ [0][0][RTW89_MKK][0][0] = -8, -+ [0][0][RTW89_IC][1][0] = -16, -+ [0][0][RTW89_KCC][1][0] = -2, -+ [0][0][RTW89_KCC][0][0] = -2, -+ [0][0][RTW89_ACMA][1][0] = 32, -+ [0][0][RTW89_ACMA][0][0] = -8, -+ [0][0][RTW89_CHILE][1][0] = -16, -+ [0][0][RTW89_QATAR][1][0] = 32, -+ [0][0][RTW89_QATAR][0][0] = -8, -+ [0][0][RTW89_UK][1][0] = 32, -+ [0][0][RTW89_UK][0][0] = -8, -+ [0][0][RTW89_FCC][1][2] = -18, -+ [0][0][RTW89_FCC][2][2] = 44, -+ [0][0][RTW89_ETSI][1][2] = 32, -+ [0][0][RTW89_ETSI][0][2] = -8, -+ [0][0][RTW89_MKK][1][2] = 30, -+ [0][0][RTW89_MKK][0][2] = -8, -+ [0][0][RTW89_IC][1][2] = -18, -+ [0][0][RTW89_KCC][1][2] = -2, -+ [0][0][RTW89_KCC][0][2] = -2, -+ [0][0][RTW89_ACMA][1][2] = 32, -+ [0][0][RTW89_ACMA][0][2] = -8, -+ [0][0][RTW89_CHILE][1][2] = -18, -+ [0][0][RTW89_QATAR][1][2] = 32, -+ [0][0][RTW89_QATAR][0][2] = -8, -+ [0][0][RTW89_UK][1][2] = 32, -+ [0][0][RTW89_UK][0][2] = -8, -+ [0][0][RTW89_FCC][1][4] = -18, -+ [0][0][RTW89_FCC][2][4] = 44, -+ [0][0][RTW89_ETSI][1][4] = 32, -+ [0][0][RTW89_ETSI][0][4] = -8, -+ [0][0][RTW89_MKK][1][4] = 30, -+ [0][0][RTW89_MKK][0][4] = -8, -+ [0][0][RTW89_IC][1][4] = -18, -+ [0][0][RTW89_KCC][1][4] = -2, -+ [0][0][RTW89_KCC][0][4] = -2, -+ [0][0][RTW89_ACMA][1][4] = 32, -+ [0][0][RTW89_ACMA][0][4] = -8, -+ [0][0][RTW89_CHILE][1][4] = -18, -+ [0][0][RTW89_QATAR][1][4] = 32, -+ [0][0][RTW89_QATAR][0][4] = -8, -+ [0][0][RTW89_UK][1][4] = 32, -+ [0][0][RTW89_UK][0][4] = -8, -+ [0][0][RTW89_FCC][1][6] = -18, -+ [0][0][RTW89_FCC][2][6] = 44, -+ [0][0][RTW89_ETSI][1][6] = 32, -+ [0][0][RTW89_ETSI][0][6] = -8, -+ [0][0][RTW89_MKK][1][6] = 30, -+ [0][0][RTW89_MKK][0][6] = -8, -+ [0][0][RTW89_IC][1][6] = -18, -+ [0][0][RTW89_KCC][1][6] = -2, -+ [0][0][RTW89_KCC][0][6] = -2, -+ [0][0][RTW89_ACMA][1][6] = 32, -+ [0][0][RTW89_ACMA][0][6] = -8, -+ [0][0][RTW89_CHILE][1][6] = -18, -+ [0][0][RTW89_QATAR][1][6] = 32, -+ [0][0][RTW89_QATAR][0][6] = -8, -+ [0][0][RTW89_UK][1][6] = 32, -+ [0][0][RTW89_UK][0][6] = -8, -+ [0][0][RTW89_FCC][1][8] = -18, -+ [0][0][RTW89_FCC][2][8] = 44, -+ [0][0][RTW89_ETSI][1][8] = 32, -+ [0][0][RTW89_ETSI][0][8] = -8, -+ [0][0][RTW89_MKK][1][8] = 30, -+ [0][0][RTW89_MKK][0][8] = -8, -+ [0][0][RTW89_IC][1][8] = -18, -+ [0][0][RTW89_KCC][1][8] = -2, -+ [0][0][RTW89_KCC][0][8] = -2, -+ [0][0][RTW89_ACMA][1][8] = 32, -+ [0][0][RTW89_ACMA][0][8] = -8, -+ [0][0][RTW89_CHILE][1][8] = -18, -+ [0][0][RTW89_QATAR][1][8] = 32, -+ [0][0][RTW89_QATAR][0][8] = -8, -+ [0][0][RTW89_UK][1][8] = 32, -+ [0][0][RTW89_UK][0][8] = -8, -+ [0][0][RTW89_FCC][1][10] = -18, -+ [0][0][RTW89_FCC][2][10] = 44, -+ [0][0][RTW89_ETSI][1][10] = 32, -+ [0][0][RTW89_ETSI][0][10] = -8, -+ [0][0][RTW89_MKK][1][10] = 30, -+ [0][0][RTW89_MKK][0][10] = -8, -+ [0][0][RTW89_IC][1][10] = -18, -+ [0][0][RTW89_KCC][1][10] = -2, -+ [0][0][RTW89_KCC][0][10] = -2, -+ [0][0][RTW89_ACMA][1][10] = 32, -+ [0][0][RTW89_ACMA][0][10] = -8, -+ [0][0][RTW89_CHILE][1][10] = -18, -+ [0][0][RTW89_QATAR][1][10] = 32, -+ [0][0][RTW89_QATAR][0][10] = -8, -+ [0][0][RTW89_UK][1][10] = 32, -+ [0][0][RTW89_UK][0][10] = -8, -+ [0][0][RTW89_FCC][1][12] = -18, -+ [0][0][RTW89_FCC][2][12] = 44, -+ [0][0][RTW89_ETSI][1][12] = 32, -+ [0][0][RTW89_ETSI][0][12] = -8, -+ [0][0][RTW89_MKK][1][12] = 30, -+ [0][0][RTW89_MKK][0][12] = -8, -+ [0][0][RTW89_IC][1][12] = -18, -+ [0][0][RTW89_KCC][1][12] = -2, -+ [0][0][RTW89_KCC][0][12] = -2, -+ [0][0][RTW89_ACMA][1][12] = 32, -+ [0][0][RTW89_ACMA][0][12] = -8, -+ [0][0][RTW89_CHILE][1][12] = -18, -+ [0][0][RTW89_QATAR][1][12] = 32, -+ [0][0][RTW89_QATAR][0][12] = -8, -+ [0][0][RTW89_UK][1][12] = 32, -+ [0][0][RTW89_UK][0][12] = -8, -+ [0][0][RTW89_FCC][1][14] = -18, -+ [0][0][RTW89_FCC][2][14] = 44, -+ [0][0][RTW89_ETSI][1][14] = 32, -+ [0][0][RTW89_ETSI][0][14] = -8, -+ [0][0][RTW89_MKK][1][14] = 30, -+ [0][0][RTW89_MKK][0][14] = -8, -+ [0][0][RTW89_IC][1][14] = -18, -+ [0][0][RTW89_KCC][1][14] = -2, -+ [0][0][RTW89_KCC][0][14] = -2, -+ [0][0][RTW89_ACMA][1][14] = 32, -+ [0][0][RTW89_ACMA][0][14] = -8, -+ [0][0][RTW89_CHILE][1][14] = -18, -+ [0][0][RTW89_QATAR][1][14] = 32, -+ [0][0][RTW89_QATAR][0][14] = -8, -+ [0][0][RTW89_UK][1][14] = 32, -+ [0][0][RTW89_UK][0][14] = -8, -+ [0][0][RTW89_FCC][1][15] = -18, -+ [0][0][RTW89_FCC][2][15] = 44, -+ [0][0][RTW89_ETSI][1][15] = 32, -+ [0][0][RTW89_ETSI][0][15] = -8, -+ [0][0][RTW89_MKK][1][15] = 30, -+ [0][0][RTW89_MKK][0][15] = -8, -+ [0][0][RTW89_IC][1][15] = -18, -+ [0][0][RTW89_KCC][1][15] = -2, -+ [0][0][RTW89_KCC][0][15] = -2, -+ [0][0][RTW89_ACMA][1][15] = 32, -+ [0][0][RTW89_ACMA][0][15] = -8, -+ [0][0][RTW89_CHILE][1][15] = -18, -+ [0][0][RTW89_QATAR][1][15] = 32, -+ [0][0][RTW89_QATAR][0][15] = -8, -+ [0][0][RTW89_UK][1][15] = 32, -+ [0][0][RTW89_UK][0][15] = -8, -+ [0][0][RTW89_FCC][1][17] = -18, -+ [0][0][RTW89_FCC][2][17] = 44, -+ [0][0][RTW89_ETSI][1][17] = 32, -+ [0][0][RTW89_ETSI][0][17] = -8, -+ [0][0][RTW89_MKK][1][17] = 30, -+ [0][0][RTW89_MKK][0][17] = -8, -+ [0][0][RTW89_IC][1][17] = -18, -+ [0][0][RTW89_KCC][1][17] = -2, -+ [0][0][RTW89_KCC][0][17] = -2, -+ [0][0][RTW89_ACMA][1][17] = 32, -+ [0][0][RTW89_ACMA][0][17] = -8, -+ [0][0][RTW89_CHILE][1][17] = -18, -+ [0][0][RTW89_QATAR][1][17] = 32, -+ [0][0][RTW89_QATAR][0][17] = -8, -+ [0][0][RTW89_UK][1][17] = 32, -+ [0][0][RTW89_UK][0][17] = -8, -+ [0][0][RTW89_FCC][1][19] = -18, -+ [0][0][RTW89_FCC][2][19] = 44, -+ [0][0][RTW89_ETSI][1][19] = 32, -+ [0][0][RTW89_ETSI][0][19] = -8, -+ [0][0][RTW89_MKK][1][19] = 30, -+ [0][0][RTW89_MKK][0][19] = -8, -+ [0][0][RTW89_IC][1][19] = -18, -+ [0][0][RTW89_KCC][1][19] = -2, -+ [0][0][RTW89_KCC][0][19] = -2, -+ [0][0][RTW89_ACMA][1][19] = 32, -+ [0][0][RTW89_ACMA][0][19] = -8, -+ [0][0][RTW89_CHILE][1][19] = -18, -+ [0][0][RTW89_QATAR][1][19] = 32, -+ [0][0][RTW89_QATAR][0][19] = -8, -+ [0][0][RTW89_UK][1][19] = 32, -+ [0][0][RTW89_UK][0][19] = -8, -+ [0][0][RTW89_FCC][1][21] = -18, -+ [0][0][RTW89_FCC][2][21] = 44, -+ [0][0][RTW89_ETSI][1][21] = 32, -+ [0][0][RTW89_ETSI][0][21] = -8, -+ [0][0][RTW89_MKK][1][21] = 30, -+ [0][0][RTW89_MKK][0][21] = -8, -+ [0][0][RTW89_IC][1][21] = -18, -+ [0][0][RTW89_KCC][1][21] = -2, -+ [0][0][RTW89_KCC][0][21] = -2, -+ [0][0][RTW89_ACMA][1][21] = 32, -+ [0][0][RTW89_ACMA][0][21] = -8, -+ [0][0][RTW89_CHILE][1][21] = -18, -+ [0][0][RTW89_QATAR][1][21] = 32, -+ [0][0][RTW89_QATAR][0][21] = -8, -+ [0][0][RTW89_UK][1][21] = 32, -+ [0][0][RTW89_UK][0][21] = -8, -+ [0][0][RTW89_FCC][1][23] = -18, -+ [0][0][RTW89_FCC][2][23] = 54, -+ [0][0][RTW89_ETSI][1][23] = 32, -+ [0][0][RTW89_ETSI][0][23] = -8, -+ [0][0][RTW89_MKK][1][23] = 30, -+ [0][0][RTW89_MKK][0][23] = -8, -+ [0][0][RTW89_IC][1][23] = -18, -+ [0][0][RTW89_KCC][1][23] = -2, -+ [0][0][RTW89_KCC][0][23] = -2, -+ [0][0][RTW89_ACMA][1][23] = 32, -+ [0][0][RTW89_ACMA][0][23] = -8, -+ [0][0][RTW89_CHILE][1][23] = -18, -+ [0][0][RTW89_QATAR][1][23] = 32, -+ [0][0][RTW89_QATAR][0][23] = -8, -+ [0][0][RTW89_UK][1][23] = 32, -+ [0][0][RTW89_UK][0][23] = -8, -+ [0][0][RTW89_FCC][1][25] = -18, -+ [0][0][RTW89_FCC][2][25] = 54, -+ [0][0][RTW89_ETSI][1][25] = 32, -+ [0][0][RTW89_ETSI][0][25] = -8, -+ [0][0][RTW89_MKK][1][25] = 30, -+ [0][0][RTW89_MKK][0][25] = -8, -+ [0][0][RTW89_IC][1][25] = -18, -+ [0][0][RTW89_KCC][1][25] = -2, -+ [0][0][RTW89_KCC][0][25] = -2, -+ [0][0][RTW89_ACMA][1][25] = 32, -+ [0][0][RTW89_ACMA][0][25] = -8, -+ [0][0][RTW89_CHILE][1][25] = -18, -+ [0][0][RTW89_QATAR][1][25] = 32, -+ [0][0][RTW89_QATAR][0][25] = -8, -+ [0][0][RTW89_UK][1][25] = 32, -+ [0][0][RTW89_UK][0][25] = -8, -+ [0][0][RTW89_FCC][1][27] = -18, -+ [0][0][RTW89_FCC][2][27] = 54, -+ [0][0][RTW89_ETSI][1][27] = 32, -+ [0][0][RTW89_ETSI][0][27] = -8, -+ [0][0][RTW89_MKK][1][27] = 30, -+ [0][0][RTW89_MKK][0][27] = -8, -+ [0][0][RTW89_IC][1][27] = -18, -+ [0][0][RTW89_KCC][1][27] = -2, -+ [0][0][RTW89_KCC][0][27] = -2, -+ [0][0][RTW89_ACMA][1][27] = 32, -+ [0][0][RTW89_ACMA][0][27] = -8, -+ [0][0][RTW89_CHILE][1][27] = -18, -+ [0][0][RTW89_QATAR][1][27] = 32, -+ [0][0][RTW89_QATAR][0][27] = -8, -+ [0][0][RTW89_UK][1][27] = 32, -+ [0][0][RTW89_UK][0][27] = -8, -+ [0][0][RTW89_FCC][1][29] = -18, -+ [0][0][RTW89_FCC][2][29] = 54, -+ [0][0][RTW89_ETSI][1][29] = 32, -+ [0][0][RTW89_ETSI][0][29] = -8, -+ [0][0][RTW89_MKK][1][29] = 30, -+ [0][0][RTW89_MKK][0][29] = -8, -+ [0][0][RTW89_IC][1][29] = -18, -+ [0][0][RTW89_KCC][1][29] = -2, -+ [0][0][RTW89_KCC][0][29] = -2, -+ [0][0][RTW89_ACMA][1][29] = 32, -+ [0][0][RTW89_ACMA][0][29] = -8, -+ [0][0][RTW89_CHILE][1][29] = -18, -+ [0][0][RTW89_QATAR][1][29] = 32, -+ [0][0][RTW89_QATAR][0][29] = -8, -+ [0][0][RTW89_UK][1][29] = 32, -+ [0][0][RTW89_UK][0][29] = -8, -+ [0][0][RTW89_FCC][1][30] = -18, -+ [0][0][RTW89_FCC][2][30] = 54, -+ [0][0][RTW89_ETSI][1][30] = 32, -+ [0][0][RTW89_ETSI][0][30] = -8, -+ [0][0][RTW89_MKK][1][30] = 30, -+ [0][0][RTW89_MKK][0][30] = -8, -+ [0][0][RTW89_IC][1][30] = -18, -+ [0][0][RTW89_KCC][1][30] = -2, -+ [0][0][RTW89_KCC][0][30] = -2, -+ [0][0][RTW89_ACMA][1][30] = 32, -+ [0][0][RTW89_ACMA][0][30] = -8, -+ [0][0][RTW89_CHILE][1][30] = -18, -+ [0][0][RTW89_QATAR][1][30] = 32, -+ [0][0][RTW89_QATAR][0][30] = -8, -+ [0][0][RTW89_UK][1][30] = 32, -+ [0][0][RTW89_UK][0][30] = -8, -+ [0][0][RTW89_FCC][1][32] = -18, -+ [0][0][RTW89_FCC][2][32] = 54, -+ [0][0][RTW89_ETSI][1][32] = 32, -+ [0][0][RTW89_ETSI][0][32] = -8, -+ [0][0][RTW89_MKK][1][32] = 30, -+ [0][0][RTW89_MKK][0][32] = -8, -+ [0][0][RTW89_IC][1][32] = -18, -+ [0][0][RTW89_KCC][1][32] = -2, -+ [0][0][RTW89_KCC][0][32] = -2, -+ [0][0][RTW89_ACMA][1][32] = 32, -+ [0][0][RTW89_ACMA][0][32] = -8, -+ [0][0][RTW89_CHILE][1][32] = -18, -+ [0][0][RTW89_QATAR][1][32] = 32, -+ [0][0][RTW89_QATAR][0][32] = -8, -+ [0][0][RTW89_UK][1][32] = 32, -+ [0][0][RTW89_UK][0][32] = -8, -+ [0][0][RTW89_FCC][1][34] = -18, -+ [0][0][RTW89_FCC][2][34] = 54, -+ [0][0][RTW89_ETSI][1][34] = 32, -+ [0][0][RTW89_ETSI][0][34] = -8, -+ [0][0][RTW89_MKK][1][34] = 30, -+ [0][0][RTW89_MKK][0][34] = -8, -+ [0][0][RTW89_IC][1][34] = -18, -+ [0][0][RTW89_KCC][1][34] = -2, -+ [0][0][RTW89_KCC][0][34] = -2, -+ [0][0][RTW89_ACMA][1][34] = 32, -+ [0][0][RTW89_ACMA][0][34] = -8, -+ [0][0][RTW89_CHILE][1][34] = -18, -+ [0][0][RTW89_QATAR][1][34] = 32, -+ [0][0][RTW89_QATAR][0][34] = -8, -+ [0][0][RTW89_UK][1][34] = 32, -+ [0][0][RTW89_UK][0][34] = -8, -+ [0][0][RTW89_FCC][1][36] = -18, -+ [0][0][RTW89_FCC][2][36] = 54, -+ [0][0][RTW89_ETSI][1][36] = 32, -+ [0][0][RTW89_ETSI][0][36] = -8, -+ [0][0][RTW89_MKK][1][36] = 30, -+ [0][0][RTW89_MKK][0][36] = -8, -+ [0][0][RTW89_IC][1][36] = -18, -+ [0][0][RTW89_KCC][1][36] = -2, -+ [0][0][RTW89_KCC][0][36] = -2, -+ [0][0][RTW89_ACMA][1][36] = 32, -+ [0][0][RTW89_ACMA][0][36] = -8, -+ [0][0][RTW89_CHILE][1][36] = -18, -+ [0][0][RTW89_QATAR][1][36] = 32, -+ [0][0][RTW89_QATAR][0][36] = -8, -+ [0][0][RTW89_UK][1][36] = 32, -+ [0][0][RTW89_UK][0][36] = -8, -+ [0][0][RTW89_FCC][1][38] = -18, -+ [0][0][RTW89_FCC][2][38] = 54, -+ [0][0][RTW89_ETSI][1][38] = 32, -+ [0][0][RTW89_ETSI][0][38] = -8, -+ [0][0][RTW89_MKK][1][38] = 30, -+ [0][0][RTW89_MKK][0][38] = -8, -+ [0][0][RTW89_IC][1][38] = -18, -+ [0][0][RTW89_KCC][1][38] = -2, -+ [0][0][RTW89_KCC][0][38] = -2, -+ [0][0][RTW89_ACMA][1][38] = 32, -+ [0][0][RTW89_ACMA][0][38] = -8, -+ [0][0][RTW89_CHILE][1][38] = -18, -+ [0][0][RTW89_QATAR][1][38] = 32, -+ [0][0][RTW89_QATAR][0][38] = -8, -+ [0][0][RTW89_UK][1][38] = 32, -+ [0][0][RTW89_UK][0][38] = -8, -+ [0][0][RTW89_FCC][1][40] = -18, -+ [0][0][RTW89_FCC][2][40] = 54, -+ [0][0][RTW89_ETSI][1][40] = 32, -+ [0][0][RTW89_ETSI][0][40] = -8, -+ [0][0][RTW89_MKK][1][40] = 30, -+ [0][0][RTW89_MKK][0][40] = -8, -+ [0][0][RTW89_IC][1][40] = -18, -+ [0][0][RTW89_KCC][1][40] = -2, -+ [0][0][RTW89_KCC][0][40] = -2, -+ [0][0][RTW89_ACMA][1][40] = 32, -+ [0][0][RTW89_ACMA][0][40] = -8, -+ [0][0][RTW89_CHILE][1][40] = -18, -+ [0][0][RTW89_QATAR][1][40] = 32, -+ [0][0][RTW89_QATAR][0][40] = -8, -+ [0][0][RTW89_UK][1][40] = 32, -+ [0][0][RTW89_UK][0][40] = -8, -+ [0][0][RTW89_FCC][1][42] = -18, -+ [0][0][RTW89_FCC][2][42] = 54, -+ [0][0][RTW89_ETSI][1][42] = 32, -+ [0][0][RTW89_ETSI][0][42] = -8, -+ [0][0][RTW89_MKK][1][42] = 30, -+ [0][0][RTW89_MKK][0][42] = -8, -+ [0][0][RTW89_IC][1][42] = -18, -+ [0][0][RTW89_KCC][1][42] = -2, -+ [0][0][RTW89_KCC][0][42] = -2, -+ [0][0][RTW89_ACMA][1][42] = 32, -+ [0][0][RTW89_ACMA][0][42] = -8, -+ [0][0][RTW89_CHILE][1][42] = -18, -+ [0][0][RTW89_QATAR][1][42] = 32, -+ [0][0][RTW89_QATAR][0][42] = -8, -+ [0][0][RTW89_UK][1][42] = 32, -+ [0][0][RTW89_UK][0][42] = -8, -+ [0][0][RTW89_FCC][1][44] = -16, -+ [0][0][RTW89_FCC][2][44] = 56, -+ [0][0][RTW89_ETSI][1][44] = 32, -+ [0][0][RTW89_ETSI][0][44] = -6, -+ [0][0][RTW89_MKK][1][44] = 8, -+ [0][0][RTW89_MKK][0][44] = -10, -+ [0][0][RTW89_IC][1][44] = -16, -+ [0][0][RTW89_KCC][1][44] = -2, -+ [0][0][RTW89_KCC][0][44] = -2, -+ [0][0][RTW89_ACMA][1][44] = 32, -+ [0][0][RTW89_ACMA][0][44] = -6, -+ [0][0][RTW89_CHILE][1][44] = -16, -+ [0][0][RTW89_QATAR][1][44] = 32, -+ [0][0][RTW89_QATAR][0][44] = -6, -+ [0][0][RTW89_UK][1][44] = 32, -+ [0][0][RTW89_UK][0][44] = -6, -+ [0][0][RTW89_FCC][1][45] = -16, -+ [0][0][RTW89_FCC][2][45] = 127, -+ [0][0][RTW89_ETSI][1][45] = 127, -+ [0][0][RTW89_ETSI][0][45] = 127, -+ [0][0][RTW89_MKK][1][45] = 127, -+ [0][0][RTW89_MKK][0][45] = 127, -+ [0][0][RTW89_IC][1][45] = -16, -+ [0][0][RTW89_KCC][1][45] = -2, -+ [0][0][RTW89_KCC][0][45] = 127, -+ [0][0][RTW89_ACMA][1][45] = 127, -+ [0][0][RTW89_ACMA][0][45] = 127, -+ [0][0][RTW89_CHILE][1][45] = 127, -+ [0][0][RTW89_QATAR][1][45] = 127, -+ [0][0][RTW89_QATAR][0][45] = 127, -+ [0][0][RTW89_UK][1][45] = 127, -+ [0][0][RTW89_UK][0][45] = 127, -+ [0][0][RTW89_FCC][1][47] = -18, -+ [0][0][RTW89_FCC][2][47] = 127, -+ [0][0][RTW89_ETSI][1][47] = 127, -+ [0][0][RTW89_ETSI][0][47] = 127, -+ [0][0][RTW89_MKK][1][47] = 127, -+ [0][0][RTW89_MKK][0][47] = 127, -+ [0][0][RTW89_IC][1][47] = -18, -+ [0][0][RTW89_KCC][1][47] = -2, -+ [0][0][RTW89_KCC][0][47] = 127, -+ [0][0][RTW89_ACMA][1][47] = 127, -+ [0][0][RTW89_ACMA][0][47] = 127, -+ [0][0][RTW89_CHILE][1][47] = 127, -+ [0][0][RTW89_QATAR][1][47] = 127, -+ [0][0][RTW89_QATAR][0][47] = 127, -+ [0][0][RTW89_UK][1][47] = 127, -+ [0][0][RTW89_UK][0][47] = 127, -+ [0][0][RTW89_FCC][1][49] = -18, -+ [0][0][RTW89_FCC][2][49] = 127, -+ [0][0][RTW89_ETSI][1][49] = 127, -+ [0][0][RTW89_ETSI][0][49] = 127, -+ [0][0][RTW89_MKK][1][49] = 127, -+ [0][0][RTW89_MKK][0][49] = 127, -+ [0][0][RTW89_IC][1][49] = -18, -+ [0][0][RTW89_KCC][1][49] = -2, -+ [0][0][RTW89_KCC][0][49] = 127, -+ [0][0][RTW89_ACMA][1][49] = 127, -+ [0][0][RTW89_ACMA][0][49] = 127, -+ [0][0][RTW89_CHILE][1][49] = 127, -+ [0][0][RTW89_QATAR][1][49] = 127, -+ [0][0][RTW89_QATAR][0][49] = 127, -+ [0][0][RTW89_UK][1][49] = 127, -+ [0][0][RTW89_UK][0][49] = 127, -+ [0][0][RTW89_FCC][1][51] = -18, -+ [0][0][RTW89_FCC][2][51] = 127, -+ [0][0][RTW89_ETSI][1][51] = 127, -+ [0][0][RTW89_ETSI][0][51] = 127, -+ [0][0][RTW89_MKK][1][51] = 127, -+ [0][0][RTW89_MKK][0][51] = 127, -+ [0][0][RTW89_IC][1][51] = -18, -+ [0][0][RTW89_KCC][1][51] = -2, -+ [0][0][RTW89_KCC][0][51] = 127, -+ [0][0][RTW89_ACMA][1][51] = 127, -+ [0][0][RTW89_ACMA][0][51] = 127, -+ [0][0][RTW89_CHILE][1][51] = 127, -+ [0][0][RTW89_QATAR][1][51] = 127, -+ [0][0][RTW89_QATAR][0][51] = 127, -+ [0][0][RTW89_UK][1][51] = 127, -+ [0][0][RTW89_UK][0][51] = 127, -+ [0][0][RTW89_FCC][1][53] = -16, -+ [0][0][RTW89_FCC][2][53] = 127, -+ [0][0][RTW89_ETSI][1][53] = 127, -+ [0][0][RTW89_ETSI][0][53] = 127, -+ [0][0][RTW89_MKK][1][53] = 127, -+ [0][0][RTW89_MKK][0][53] = 127, -+ [0][0][RTW89_IC][1][53] = -16, -+ [0][0][RTW89_KCC][1][53] = -2, -+ [0][0][RTW89_KCC][0][53] = 127, -+ [0][0][RTW89_ACMA][1][53] = 127, -+ [0][0][RTW89_ACMA][0][53] = 127, -+ [0][0][RTW89_CHILE][1][53] = 127, -+ [0][0][RTW89_QATAR][1][53] = 127, -+ [0][0][RTW89_QATAR][0][53] = 127, -+ [0][0][RTW89_UK][1][53] = 127, -+ [0][0][RTW89_UK][0][53] = 127, -+ [0][0][RTW89_FCC][1][55] = -18, -+ [0][0][RTW89_FCC][2][55] = 56, -+ [0][0][RTW89_ETSI][1][55] = 127, -+ [0][0][RTW89_ETSI][0][55] = 127, -+ [0][0][RTW89_MKK][1][55] = 127, -+ [0][0][RTW89_MKK][0][55] = 127, -+ [0][0][RTW89_IC][1][55] = -18, -+ [0][0][RTW89_KCC][1][55] = -2, -+ [0][0][RTW89_KCC][0][55] = 127, -+ [0][0][RTW89_ACMA][1][55] = 127, -+ [0][0][RTW89_ACMA][0][55] = 127, -+ [0][0][RTW89_CHILE][1][55] = 127, -+ [0][0][RTW89_QATAR][1][55] = 127, -+ [0][0][RTW89_QATAR][0][55] = 127, -+ [0][0][RTW89_UK][1][55] = 127, -+ [0][0][RTW89_UK][0][55] = 127, -+ [0][0][RTW89_FCC][1][57] = -18, -+ [0][0][RTW89_FCC][2][57] = 56, -+ [0][0][RTW89_ETSI][1][57] = 127, -+ [0][0][RTW89_ETSI][0][57] = 127, -+ [0][0][RTW89_MKK][1][57] = 127, -+ [0][0][RTW89_MKK][0][57] = 127, -+ [0][0][RTW89_IC][1][57] = -18, -+ [0][0][RTW89_KCC][1][57] = -2, -+ [0][0][RTW89_KCC][0][57] = 127, -+ [0][0][RTW89_ACMA][1][57] = 127, -+ [0][0][RTW89_ACMA][0][57] = 127, -+ [0][0][RTW89_CHILE][1][57] = 127, -+ [0][0][RTW89_QATAR][1][57] = 127, -+ [0][0][RTW89_QATAR][0][57] = 127, -+ [0][0][RTW89_UK][1][57] = 127, -+ [0][0][RTW89_UK][0][57] = 127, -+ [0][0][RTW89_FCC][1][59] = -18, -+ [0][0][RTW89_FCC][2][59] = 56, -+ [0][0][RTW89_ETSI][1][59] = 127, -+ [0][0][RTW89_ETSI][0][59] = 127, -+ [0][0][RTW89_MKK][1][59] = 127, -+ [0][0][RTW89_MKK][0][59] = 127, -+ [0][0][RTW89_IC][1][59] = -18, -+ [0][0][RTW89_KCC][1][59] = -2, -+ [0][0][RTW89_KCC][0][59] = 127, -+ [0][0][RTW89_ACMA][1][59] = 127, -+ [0][0][RTW89_ACMA][0][59] = 127, -+ [0][0][RTW89_CHILE][1][59] = 127, -+ [0][0][RTW89_QATAR][1][59] = 127, -+ [0][0][RTW89_QATAR][0][59] = 127, -+ [0][0][RTW89_UK][1][59] = 127, -+ [0][0][RTW89_UK][0][59] = 127, -+ [0][0][RTW89_FCC][1][60] = -18, -+ [0][0][RTW89_FCC][2][60] = 56, -+ [0][0][RTW89_ETSI][1][60] = 127, -+ [0][0][RTW89_ETSI][0][60] = 127, -+ [0][0][RTW89_MKK][1][60] = 127, -+ [0][0][RTW89_MKK][0][60] = 127, -+ [0][0][RTW89_IC][1][60] = -18, -+ [0][0][RTW89_KCC][1][60] = -2, -+ [0][0][RTW89_KCC][0][60] = 127, -+ [0][0][RTW89_ACMA][1][60] = 127, -+ [0][0][RTW89_ACMA][0][60] = 127, -+ [0][0][RTW89_CHILE][1][60] = 127, -+ [0][0][RTW89_QATAR][1][60] = 127, -+ [0][0][RTW89_QATAR][0][60] = 127, -+ [0][0][RTW89_UK][1][60] = 127, -+ [0][0][RTW89_UK][0][60] = 127, -+ [0][0][RTW89_FCC][1][62] = -18, -+ [0][0][RTW89_FCC][2][62] = 56, -+ [0][0][RTW89_ETSI][1][62] = 127, -+ [0][0][RTW89_ETSI][0][62] = 127, -+ [0][0][RTW89_MKK][1][62] = 127, -+ [0][0][RTW89_MKK][0][62] = 127, -+ [0][0][RTW89_IC][1][62] = -18, -+ [0][0][RTW89_KCC][1][62] = -2, -+ [0][0][RTW89_KCC][0][62] = 127, -+ [0][0][RTW89_ACMA][1][62] = 127, -+ [0][0][RTW89_ACMA][0][62] = 127, -+ [0][0][RTW89_CHILE][1][62] = 127, -+ [0][0][RTW89_QATAR][1][62] = 127, -+ [0][0][RTW89_QATAR][0][62] = 127, -+ [0][0][RTW89_UK][1][62] = 127, -+ [0][0][RTW89_UK][0][62] = 127, -+ [0][0][RTW89_FCC][1][64] = -18, -+ [0][0][RTW89_FCC][2][64] = 56, -+ [0][0][RTW89_ETSI][1][64] = 127, -+ [0][0][RTW89_ETSI][0][64] = 127, -+ [0][0][RTW89_MKK][1][64] = 127, -+ [0][0][RTW89_MKK][0][64] = 127, -+ [0][0][RTW89_IC][1][64] = -18, -+ [0][0][RTW89_KCC][1][64] = -2, -+ [0][0][RTW89_KCC][0][64] = 127, -+ [0][0][RTW89_ACMA][1][64] = 127, -+ [0][0][RTW89_ACMA][0][64] = 127, -+ [0][0][RTW89_CHILE][1][64] = 127, -+ [0][0][RTW89_QATAR][1][64] = 127, -+ [0][0][RTW89_QATAR][0][64] = 127, -+ [0][0][RTW89_UK][1][64] = 127, -+ [0][0][RTW89_UK][0][64] = 127, -+ [0][0][RTW89_FCC][1][66] = -18, -+ [0][0][RTW89_FCC][2][66] = 56, -+ [0][0][RTW89_ETSI][1][66] = 127, -+ [0][0][RTW89_ETSI][0][66] = 127, -+ [0][0][RTW89_MKK][1][66] = 127, -+ [0][0][RTW89_MKK][0][66] = 127, -+ [0][0][RTW89_IC][1][66] = -18, -+ [0][0][RTW89_KCC][1][66] = -2, -+ [0][0][RTW89_KCC][0][66] = 127, -+ [0][0][RTW89_ACMA][1][66] = 127, -+ [0][0][RTW89_ACMA][0][66] = 127, -+ [0][0][RTW89_CHILE][1][66] = 127, -+ [0][0][RTW89_QATAR][1][66] = 127, -+ [0][0][RTW89_QATAR][0][66] = 127, -+ [0][0][RTW89_UK][1][66] = 127, -+ [0][0][RTW89_UK][0][66] = 127, -+ [0][0][RTW89_FCC][1][68] = -18, -+ [0][0][RTW89_FCC][2][68] = 56, -+ [0][0][RTW89_ETSI][1][68] = 127, -+ [0][0][RTW89_ETSI][0][68] = 127, -+ [0][0][RTW89_MKK][1][68] = 127, -+ [0][0][RTW89_MKK][0][68] = 127, -+ [0][0][RTW89_IC][1][68] = -18, -+ [0][0][RTW89_KCC][1][68] = -2, -+ [0][0][RTW89_KCC][0][68] = 127, -+ [0][0][RTW89_ACMA][1][68] = 127, -+ [0][0][RTW89_ACMA][0][68] = 127, -+ [0][0][RTW89_CHILE][1][68] = 127, -+ [0][0][RTW89_QATAR][1][68] = 127, -+ [0][0][RTW89_QATAR][0][68] = 127, -+ [0][0][RTW89_UK][1][68] = 127, -+ [0][0][RTW89_UK][0][68] = 127, -+ [0][0][RTW89_FCC][1][70] = -16, -+ [0][0][RTW89_FCC][2][70] = 56, -+ [0][0][RTW89_ETSI][1][70] = 127, -+ [0][0][RTW89_ETSI][0][70] = 127, -+ [0][0][RTW89_MKK][1][70] = 127, -+ [0][0][RTW89_MKK][0][70] = 127, -+ [0][0][RTW89_IC][1][70] = -16, -+ [0][0][RTW89_KCC][1][70] = -2, -+ [0][0][RTW89_KCC][0][70] = 127, -+ [0][0][RTW89_ACMA][1][70] = 127, -+ [0][0][RTW89_ACMA][0][70] = 127, -+ [0][0][RTW89_CHILE][1][70] = 127, -+ [0][0][RTW89_QATAR][1][70] = 127, -+ [0][0][RTW89_QATAR][0][70] = 127, -+ [0][0][RTW89_UK][1][70] = 127, -+ [0][0][RTW89_UK][0][70] = 127, -+ [0][0][RTW89_FCC][1][72] = -18, -+ [0][0][RTW89_FCC][2][72] = 56, -+ [0][0][RTW89_ETSI][1][72] = 127, -+ [0][0][RTW89_ETSI][0][72] = 127, -+ [0][0][RTW89_MKK][1][72] = 127, -+ [0][0][RTW89_MKK][0][72] = 127, -+ [0][0][RTW89_IC][1][72] = -18, -+ [0][0][RTW89_KCC][1][72] = -2, -+ [0][0][RTW89_KCC][0][72] = 127, -+ [0][0][RTW89_ACMA][1][72] = 127, -+ [0][0][RTW89_ACMA][0][72] = 127, -+ [0][0][RTW89_CHILE][1][72] = 127, -+ [0][0][RTW89_QATAR][1][72] = 127, -+ [0][0][RTW89_QATAR][0][72] = 127, -+ [0][0][RTW89_UK][1][72] = 127, -+ [0][0][RTW89_UK][0][72] = 127, -+ [0][0][RTW89_FCC][1][74] = -18, -+ [0][0][RTW89_FCC][2][74] = 56, -+ [0][0][RTW89_ETSI][1][74] = 127, -+ [0][0][RTW89_ETSI][0][74] = 127, -+ [0][0][RTW89_MKK][1][74] = 127, -+ [0][0][RTW89_MKK][0][74] = 127, -+ [0][0][RTW89_IC][1][74] = -18, -+ [0][0][RTW89_KCC][1][74] = -2, -+ [0][0][RTW89_KCC][0][74] = 127, -+ [0][0][RTW89_ACMA][1][74] = 127, -+ [0][0][RTW89_ACMA][0][74] = 127, -+ [0][0][RTW89_CHILE][1][74] = 127, -+ [0][0][RTW89_QATAR][1][74] = 127, -+ [0][0][RTW89_QATAR][0][74] = 127, -+ [0][0][RTW89_UK][1][74] = 127, -+ [0][0][RTW89_UK][0][74] = 127, -+ [0][0][RTW89_FCC][1][75] = -18, -+ [0][0][RTW89_FCC][2][75] = 56, -+ [0][0][RTW89_ETSI][1][75] = 127, -+ [0][0][RTW89_ETSI][0][75] = 127, -+ [0][0][RTW89_MKK][1][75] = 127, -+ [0][0][RTW89_MKK][0][75] = 127, -+ [0][0][RTW89_IC][1][75] = -18, -+ [0][0][RTW89_KCC][1][75] = -2, -+ [0][0][RTW89_KCC][0][75] = 127, -+ [0][0][RTW89_ACMA][1][75] = 127, -+ [0][0][RTW89_ACMA][0][75] = 127, -+ [0][0][RTW89_CHILE][1][75] = 127, -+ [0][0][RTW89_QATAR][1][75] = 127, -+ [0][0][RTW89_QATAR][0][75] = 127, -+ [0][0][RTW89_UK][1][75] = 127, -+ [0][0][RTW89_UK][0][75] = 127, -+ [0][0][RTW89_FCC][1][77] = -18, -+ [0][0][RTW89_FCC][2][77] = 56, -+ [0][0][RTW89_ETSI][1][77] = 127, -+ [0][0][RTW89_ETSI][0][77] = 127, -+ [0][0][RTW89_MKK][1][77] = 127, -+ [0][0][RTW89_MKK][0][77] = 127, -+ [0][0][RTW89_IC][1][77] = -18, -+ [0][0][RTW89_KCC][1][77] = -2, -+ [0][0][RTW89_KCC][0][77] = 127, -+ [0][0][RTW89_ACMA][1][77] = 127, -+ [0][0][RTW89_ACMA][0][77] = 127, -+ [0][0][RTW89_CHILE][1][77] = 127, -+ [0][0][RTW89_QATAR][1][77] = 127, -+ [0][0][RTW89_QATAR][0][77] = 127, -+ [0][0][RTW89_UK][1][77] = 127, -+ [0][0][RTW89_UK][0][77] = 127, -+ [0][0][RTW89_FCC][1][79] = -18, -+ [0][0][RTW89_FCC][2][79] = 56, -+ [0][0][RTW89_ETSI][1][79] = 127, -+ [0][0][RTW89_ETSI][0][79] = 127, -+ [0][0][RTW89_MKK][1][79] = 127, -+ [0][0][RTW89_MKK][0][79] = 127, -+ [0][0][RTW89_IC][1][79] = -18, -+ [0][0][RTW89_KCC][1][79] = -2, -+ [0][0][RTW89_KCC][0][79] = 127, -+ [0][0][RTW89_ACMA][1][79] = 127, -+ [0][0][RTW89_ACMA][0][79] = 127, -+ [0][0][RTW89_CHILE][1][79] = 127, -+ [0][0][RTW89_QATAR][1][79] = 127, -+ [0][0][RTW89_QATAR][0][79] = 127, -+ [0][0][RTW89_UK][1][79] = 127, -+ [0][0][RTW89_UK][0][79] = 127, -+ [0][0][RTW89_FCC][1][81] = -18, -+ [0][0][RTW89_FCC][2][81] = 56, -+ [0][0][RTW89_ETSI][1][81] = 127, -+ [0][0][RTW89_ETSI][0][81] = 127, -+ [0][0][RTW89_MKK][1][81] = 127, -+ [0][0][RTW89_MKK][0][81] = 127, -+ [0][0][RTW89_IC][1][81] = -18, -+ [0][0][RTW89_KCC][1][81] = -2, -+ [0][0][RTW89_KCC][0][81] = 127, -+ [0][0][RTW89_ACMA][1][81] = 127, -+ [0][0][RTW89_ACMA][0][81] = 127, -+ [0][0][RTW89_CHILE][1][81] = 127, -+ [0][0][RTW89_QATAR][1][81] = 127, -+ [0][0][RTW89_QATAR][0][81] = 127, -+ [0][0][RTW89_UK][1][81] = 127, -+ [0][0][RTW89_UK][0][81] = 127, -+ [0][0][RTW89_FCC][1][83] = -18, -+ [0][0][RTW89_FCC][2][83] = 56, -+ [0][0][RTW89_ETSI][1][83] = 127, -+ [0][0][RTW89_ETSI][0][83] = 127, -+ [0][0][RTW89_MKK][1][83] = 127, -+ [0][0][RTW89_MKK][0][83] = 127, -+ [0][0][RTW89_IC][1][83] = -18, -+ [0][0][RTW89_KCC][1][83] = -2, -+ [0][0][RTW89_KCC][0][83] = 127, -+ [0][0][RTW89_ACMA][1][83] = 127, -+ [0][0][RTW89_ACMA][0][83] = 127, -+ [0][0][RTW89_CHILE][1][83] = 127, -+ [0][0][RTW89_QATAR][1][83] = 127, -+ [0][0][RTW89_QATAR][0][83] = 127, -+ [0][0][RTW89_UK][1][83] = 127, -+ [0][0][RTW89_UK][0][83] = 127, -+ [0][0][RTW89_FCC][1][85] = -18, -+ [0][0][RTW89_FCC][2][85] = 56, -+ [0][0][RTW89_ETSI][1][85] = 127, -+ [0][0][RTW89_ETSI][0][85] = 127, -+ [0][0][RTW89_MKK][1][85] = 127, -+ [0][0][RTW89_MKK][0][85] = 127, -+ [0][0][RTW89_IC][1][85] = -18, -+ [0][0][RTW89_KCC][1][85] = -2, -+ [0][0][RTW89_KCC][0][85] = 127, -+ [0][0][RTW89_ACMA][1][85] = 127, -+ [0][0][RTW89_ACMA][0][85] = 127, -+ [0][0][RTW89_CHILE][1][85] = 127, -+ [0][0][RTW89_QATAR][1][85] = 127, -+ [0][0][RTW89_QATAR][0][85] = 127, -+ [0][0][RTW89_UK][1][85] = 127, -+ [0][0][RTW89_UK][0][85] = 127, -+ [0][0][RTW89_FCC][1][87] = -16, -+ [0][0][RTW89_FCC][2][87] = 127, -+ [0][0][RTW89_ETSI][1][87] = 127, -+ [0][0][RTW89_ETSI][0][87] = 127, -+ [0][0][RTW89_MKK][1][87] = 127, -+ [0][0][RTW89_MKK][0][87] = 127, -+ [0][0][RTW89_IC][1][87] = -16, -+ [0][0][RTW89_KCC][1][87] = -2, -+ [0][0][RTW89_KCC][0][87] = 127, -+ [0][0][RTW89_ACMA][1][87] = 127, -+ [0][0][RTW89_ACMA][0][87] = 127, -+ [0][0][RTW89_CHILE][1][87] = 127, -+ [0][0][RTW89_QATAR][1][87] = 127, -+ [0][0][RTW89_QATAR][0][87] = 127, -+ [0][0][RTW89_UK][1][87] = 127, -+ [0][0][RTW89_UK][0][87] = 127, -+ [0][0][RTW89_FCC][1][89] = -16, -+ [0][0][RTW89_FCC][2][89] = 127, -+ [0][0][RTW89_ETSI][1][89] = 127, -+ [0][0][RTW89_ETSI][0][89] = 127, -+ [0][0][RTW89_MKK][1][89] = 127, -+ [0][0][RTW89_MKK][0][89] = 127, -+ [0][0][RTW89_IC][1][89] = -16, -+ [0][0][RTW89_KCC][1][89] = -2, -+ [0][0][RTW89_KCC][0][89] = 127, -+ [0][0][RTW89_ACMA][1][89] = 127, -+ [0][0][RTW89_ACMA][0][89] = 127, -+ [0][0][RTW89_CHILE][1][89] = 127, -+ [0][0][RTW89_QATAR][1][89] = 127, -+ [0][0][RTW89_QATAR][0][89] = 127, -+ [0][0][RTW89_UK][1][89] = 127, -+ [0][0][RTW89_UK][0][89] = 127, -+ [0][0][RTW89_FCC][1][90] = -16, -+ [0][0][RTW89_FCC][2][90] = 127, -+ [0][0][RTW89_ETSI][1][90] = 127, -+ [0][0][RTW89_ETSI][0][90] = 127, -+ [0][0][RTW89_MKK][1][90] = 127, -+ [0][0][RTW89_MKK][0][90] = 127, -+ [0][0][RTW89_IC][1][90] = -16, -+ [0][0][RTW89_KCC][1][90] = -2, -+ [0][0][RTW89_KCC][0][90] = 127, -+ [0][0][RTW89_ACMA][1][90] = 127, -+ [0][0][RTW89_ACMA][0][90] = 127, -+ [0][0][RTW89_CHILE][1][90] = 127, -+ [0][0][RTW89_QATAR][1][90] = 127, -+ [0][0][RTW89_QATAR][0][90] = 127, -+ [0][0][RTW89_UK][1][90] = 127, -+ [0][0][RTW89_UK][0][90] = 127, -+ [0][0][RTW89_FCC][1][92] = -16, -+ [0][0][RTW89_FCC][2][92] = 127, -+ [0][0][RTW89_ETSI][1][92] = 127, -+ [0][0][RTW89_ETSI][0][92] = 127, -+ [0][0][RTW89_MKK][1][92] = 127, -+ [0][0][RTW89_MKK][0][92] = 127, -+ [0][0][RTW89_IC][1][92] = -16, -+ [0][0][RTW89_KCC][1][92] = -2, -+ [0][0][RTW89_KCC][0][92] = 127, -+ [0][0][RTW89_ACMA][1][92] = 127, -+ [0][0][RTW89_ACMA][0][92] = 127, -+ [0][0][RTW89_CHILE][1][92] = 127, -+ [0][0][RTW89_QATAR][1][92] = 127, -+ [0][0][RTW89_QATAR][0][92] = 127, -+ [0][0][RTW89_UK][1][92] = 127, -+ [0][0][RTW89_UK][0][92] = 127, -+ [0][0][RTW89_FCC][1][94] = -16, -+ [0][0][RTW89_FCC][2][94] = 127, -+ [0][0][RTW89_ETSI][1][94] = 127, -+ [0][0][RTW89_ETSI][0][94] = 127, -+ [0][0][RTW89_MKK][1][94] = 127, -+ [0][0][RTW89_MKK][0][94] = 127, -+ [0][0][RTW89_IC][1][94] = -16, -+ [0][0][RTW89_KCC][1][94] = -2, -+ [0][0][RTW89_KCC][0][94] = 127, -+ [0][0][RTW89_ACMA][1][94] = 127, -+ [0][0][RTW89_ACMA][0][94] = 127, -+ [0][0][RTW89_CHILE][1][94] = 127, -+ [0][0][RTW89_QATAR][1][94] = 127, -+ [0][0][RTW89_QATAR][0][94] = 127, -+ [0][0][RTW89_UK][1][94] = 127, -+ [0][0][RTW89_UK][0][94] = 127, -+ [0][0][RTW89_FCC][1][96] = -16, -+ [0][0][RTW89_FCC][2][96] = 127, -+ [0][0][RTW89_ETSI][1][96] = 127, -+ [0][0][RTW89_ETSI][0][96] = 127, -+ [0][0][RTW89_MKK][1][96] = 127, -+ [0][0][RTW89_MKK][0][96] = 127, -+ [0][0][RTW89_IC][1][96] = -16, -+ [0][0][RTW89_KCC][1][96] = -2, -+ [0][0][RTW89_KCC][0][96] = 127, -+ [0][0][RTW89_ACMA][1][96] = 127, -+ [0][0][RTW89_ACMA][0][96] = 127, -+ [0][0][RTW89_CHILE][1][96] = 127, -+ [0][0][RTW89_QATAR][1][96] = 127, -+ [0][0][RTW89_QATAR][0][96] = 127, -+ [0][0][RTW89_UK][1][96] = 127, -+ [0][0][RTW89_UK][0][96] = 127, -+ [0][0][RTW89_FCC][1][98] = -16, -+ [0][0][RTW89_FCC][2][98] = 127, -+ [0][0][RTW89_ETSI][1][98] = 127, -+ [0][0][RTW89_ETSI][0][98] = 127, -+ [0][0][RTW89_MKK][1][98] = 127, -+ [0][0][RTW89_MKK][0][98] = 127, -+ [0][0][RTW89_IC][1][98] = -16, -+ [0][0][RTW89_KCC][1][98] = -2, -+ [0][0][RTW89_KCC][0][98] = 127, -+ [0][0][RTW89_ACMA][1][98] = 127, -+ [0][0][RTW89_ACMA][0][98] = 127, -+ [0][0][RTW89_CHILE][1][98] = 127, -+ [0][0][RTW89_QATAR][1][98] = 127, -+ [0][0][RTW89_QATAR][0][98] = 127, -+ [0][0][RTW89_UK][1][98] = 127, -+ [0][0][RTW89_UK][0][98] = 127, -+ [0][0][RTW89_FCC][1][100] = -16, -+ [0][0][RTW89_FCC][2][100] = 127, -+ [0][0][RTW89_ETSI][1][100] = 127, -+ [0][0][RTW89_ETSI][0][100] = 127, -+ [0][0][RTW89_MKK][1][100] = 127, -+ [0][0][RTW89_MKK][0][100] = 127, -+ [0][0][RTW89_IC][1][100] = -16, -+ [0][0][RTW89_KCC][1][100] = -2, -+ [0][0][RTW89_KCC][0][100] = 127, -+ [0][0][RTW89_ACMA][1][100] = 127, -+ [0][0][RTW89_ACMA][0][100] = 127, -+ [0][0][RTW89_CHILE][1][100] = 127, -+ [0][0][RTW89_QATAR][1][100] = 127, -+ [0][0][RTW89_QATAR][0][100] = 127, -+ [0][0][RTW89_UK][1][100] = 127, -+ [0][0][RTW89_UK][0][100] = 127, -+ [0][0][RTW89_FCC][1][102] = -16, -+ [0][0][RTW89_FCC][2][102] = 127, -+ [0][0][RTW89_ETSI][1][102] = 127, -+ [0][0][RTW89_ETSI][0][102] = 127, -+ [0][0][RTW89_MKK][1][102] = 127, -+ [0][0][RTW89_MKK][0][102] = 127, -+ [0][0][RTW89_IC][1][102] = -16, -+ [0][0][RTW89_KCC][1][102] = -2, -+ [0][0][RTW89_KCC][0][102] = 127, -+ [0][0][RTW89_ACMA][1][102] = 127, -+ [0][0][RTW89_ACMA][0][102] = 127, -+ [0][0][RTW89_CHILE][1][102] = 127, -+ [0][0][RTW89_QATAR][1][102] = 127, -+ [0][0][RTW89_QATAR][0][102] = 127, -+ [0][0][RTW89_UK][1][102] = 127, -+ [0][0][RTW89_UK][0][102] = 127, -+ [0][0][RTW89_FCC][1][104] = -16, -+ [0][0][RTW89_FCC][2][104] = 127, -+ [0][0][RTW89_ETSI][1][104] = 127, -+ [0][0][RTW89_ETSI][0][104] = 127, -+ [0][0][RTW89_MKK][1][104] = 127, -+ [0][0][RTW89_MKK][0][104] = 127, -+ [0][0][RTW89_IC][1][104] = -16, -+ [0][0][RTW89_KCC][1][104] = -2, -+ [0][0][RTW89_KCC][0][104] = 127, -+ [0][0][RTW89_ACMA][1][104] = 127, -+ [0][0][RTW89_ACMA][0][104] = 127, -+ [0][0][RTW89_CHILE][1][104] = 127, -+ [0][0][RTW89_QATAR][1][104] = 127, -+ [0][0][RTW89_QATAR][0][104] = 127, -+ [0][0][RTW89_UK][1][104] = 127, -+ [0][0][RTW89_UK][0][104] = 127, -+ [0][0][RTW89_FCC][1][105] = -16, -+ [0][0][RTW89_FCC][2][105] = 127, -+ [0][0][RTW89_ETSI][1][105] = 127, -+ [0][0][RTW89_ETSI][0][105] = 127, -+ [0][0][RTW89_MKK][1][105] = 127, -+ [0][0][RTW89_MKK][0][105] = 127, -+ [0][0][RTW89_IC][1][105] = -16, -+ [0][0][RTW89_KCC][1][105] = -2, -+ [0][0][RTW89_KCC][0][105] = 127, -+ [0][0][RTW89_ACMA][1][105] = 127, -+ [0][0][RTW89_ACMA][0][105] = 127, -+ [0][0][RTW89_CHILE][1][105] = 127, -+ [0][0][RTW89_QATAR][1][105] = 127, -+ [0][0][RTW89_QATAR][0][105] = 127, -+ [0][0][RTW89_UK][1][105] = 127, -+ [0][0][RTW89_UK][0][105] = 127, -+ [0][0][RTW89_FCC][1][107] = -12, -+ [0][0][RTW89_FCC][2][107] = 127, -+ [0][0][RTW89_ETSI][1][107] = 127, -+ [0][0][RTW89_ETSI][0][107] = 127, -+ [0][0][RTW89_MKK][1][107] = 127, -+ [0][0][RTW89_MKK][0][107] = 127, -+ [0][0][RTW89_IC][1][107] = -12, -+ [0][0][RTW89_KCC][1][107] = -2, -+ [0][0][RTW89_KCC][0][107] = 127, -+ [0][0][RTW89_ACMA][1][107] = 127, -+ [0][0][RTW89_ACMA][0][107] = 127, -+ [0][0][RTW89_CHILE][1][107] = 127, -+ [0][0][RTW89_QATAR][1][107] = 127, -+ [0][0][RTW89_QATAR][0][107] = 127, -+ [0][0][RTW89_UK][1][107] = 127, -+ [0][0][RTW89_UK][0][107] = 127, -+ [0][0][RTW89_FCC][1][109] = -12, -+ [0][0][RTW89_FCC][2][109] = 127, -+ [0][0][RTW89_ETSI][1][109] = 127, -+ [0][0][RTW89_ETSI][0][109] = 127, -+ [0][0][RTW89_MKK][1][109] = 127, -+ [0][0][RTW89_MKK][0][109] = 127, -+ [0][0][RTW89_IC][1][109] = -12, -+ [0][0][RTW89_KCC][1][109] = 127, -+ [0][0][RTW89_KCC][0][109] = 127, -+ [0][0][RTW89_ACMA][1][109] = 127, -+ [0][0][RTW89_ACMA][0][109] = 127, -+ [0][0][RTW89_CHILE][1][109] = 127, -+ [0][0][RTW89_QATAR][1][109] = 127, -+ [0][0][RTW89_QATAR][0][109] = 127, -+ [0][0][RTW89_UK][1][109] = 127, -+ [0][0][RTW89_UK][0][109] = 127, -+ [0][0][RTW89_FCC][1][111] = 127, -+ [0][0][RTW89_FCC][2][111] = 127, -+ [0][0][RTW89_ETSI][1][111] = 127, -+ [0][0][RTW89_ETSI][0][111] = 127, -+ [0][0][RTW89_MKK][1][111] = 127, -+ [0][0][RTW89_MKK][0][111] = 127, -+ [0][0][RTW89_IC][1][111] = 127, -+ [0][0][RTW89_KCC][1][111] = 127, -+ [0][0][RTW89_KCC][0][111] = 127, -+ [0][0][RTW89_ACMA][1][111] = 127, -+ [0][0][RTW89_ACMA][0][111] = 127, -+ [0][0][RTW89_CHILE][1][111] = 127, -+ [0][0][RTW89_QATAR][1][111] = 127, -+ [0][0][RTW89_QATAR][0][111] = 127, -+ [0][0][RTW89_UK][1][111] = 127, -+ [0][0][RTW89_UK][0][111] = 127, -+ [0][0][RTW89_FCC][1][113] = 127, -+ [0][0][RTW89_FCC][2][113] = 127, -+ [0][0][RTW89_ETSI][1][113] = 127, -+ [0][0][RTW89_ETSI][0][113] = 127, -+ [0][0][RTW89_MKK][1][113] = 127, -+ [0][0][RTW89_MKK][0][113] = 127, -+ [0][0][RTW89_IC][1][113] = 127, -+ [0][0][RTW89_KCC][1][113] = 127, -+ [0][0][RTW89_KCC][0][113] = 127, -+ [0][0][RTW89_ACMA][1][113] = 127, -+ [0][0][RTW89_ACMA][0][113] = 127, -+ [0][0][RTW89_CHILE][1][113] = 127, -+ [0][0][RTW89_QATAR][1][113] = 127, -+ [0][0][RTW89_QATAR][0][113] = 127, -+ [0][0][RTW89_UK][1][113] = 127, -+ [0][0][RTW89_UK][0][113] = 127, -+ [0][0][RTW89_FCC][1][115] = 127, -+ [0][0][RTW89_FCC][2][115] = 127, -+ [0][0][RTW89_ETSI][1][115] = 127, -+ [0][0][RTW89_ETSI][0][115] = 127, -+ [0][0][RTW89_MKK][1][115] = 127, -+ [0][0][RTW89_MKK][0][115] = 127, -+ [0][0][RTW89_IC][1][115] = 127, -+ [0][0][RTW89_KCC][1][115] = 127, -+ [0][0][RTW89_KCC][0][115] = 127, -+ [0][0][RTW89_ACMA][1][115] = 127, -+ [0][0][RTW89_ACMA][0][115] = 127, -+ [0][0][RTW89_CHILE][1][115] = 127, -+ [0][0][RTW89_QATAR][1][115] = 127, -+ [0][0][RTW89_QATAR][0][115] = 127, -+ [0][0][RTW89_UK][1][115] = 127, -+ [0][0][RTW89_UK][0][115] = 127, -+ [0][0][RTW89_FCC][1][117] = 127, -+ [0][0][RTW89_FCC][2][117] = 127, -+ [0][0][RTW89_ETSI][1][117] = 127, -+ [0][0][RTW89_ETSI][0][117] = 127, -+ [0][0][RTW89_MKK][1][117] = 127, -+ [0][0][RTW89_MKK][0][117] = 127, -+ [0][0][RTW89_IC][1][117] = 127, -+ [0][0][RTW89_KCC][1][117] = 127, -+ [0][0][RTW89_KCC][0][117] = 127, -+ [0][0][RTW89_ACMA][1][117] = 127, -+ [0][0][RTW89_ACMA][0][117] = 127, -+ [0][0][RTW89_CHILE][1][117] = 127, -+ [0][0][RTW89_QATAR][1][117] = 127, -+ [0][0][RTW89_QATAR][0][117] = 127, -+ [0][0][RTW89_UK][1][117] = 127, -+ [0][0][RTW89_UK][0][117] = 127, -+ [0][0][RTW89_FCC][1][119] = 127, -+ [0][0][RTW89_FCC][2][119] = 127, -+ [0][0][RTW89_ETSI][1][119] = 127, -+ [0][0][RTW89_ETSI][0][119] = 127, -+ [0][0][RTW89_MKK][1][119] = 127, -+ [0][0][RTW89_MKK][0][119] = 127, -+ [0][0][RTW89_IC][1][119] = 127, -+ [0][0][RTW89_KCC][1][119] = 127, -+ [0][0][RTW89_KCC][0][119] = 127, -+ [0][0][RTW89_ACMA][1][119] = 127, -+ [0][0][RTW89_ACMA][0][119] = 127, -+ [0][0][RTW89_CHILE][1][119] = 127, -+ [0][0][RTW89_QATAR][1][119] = 127, -+ [0][0][RTW89_QATAR][0][119] = 127, -+ [0][0][RTW89_UK][1][119] = 127, -+ [0][0][RTW89_UK][0][119] = 127, -+ [0][1][RTW89_FCC][1][0] = -40, -+ [0][1][RTW89_FCC][2][0] = 32, -+ [0][1][RTW89_ETSI][1][0] = 20, -+ [0][1][RTW89_ETSI][0][0] = -18, -+ [0][1][RTW89_MKK][1][0] = 18, -+ [0][1][RTW89_MKK][0][0] = -20, -+ [0][1][RTW89_IC][1][0] = -40, -+ [0][1][RTW89_KCC][1][0] = -14, -+ [0][1][RTW89_KCC][0][0] = -14, -+ [0][1][RTW89_ACMA][1][0] = 20, -+ [0][1][RTW89_ACMA][0][0] = -18, -+ [0][1][RTW89_CHILE][1][0] = -40, -+ [0][1][RTW89_QATAR][1][0] = 20, -+ [0][1][RTW89_QATAR][0][0] = -18, -+ [0][1][RTW89_UK][1][0] = 20, -+ [0][1][RTW89_UK][0][0] = -18, -+ [0][1][RTW89_FCC][1][2] = -40, -+ [0][1][RTW89_FCC][2][2] = 32, -+ [0][1][RTW89_ETSI][1][2] = 20, -+ [0][1][RTW89_ETSI][0][2] = -18, -+ [0][1][RTW89_MKK][1][2] = 18, -+ [0][1][RTW89_MKK][0][2] = -22, -+ [0][1][RTW89_IC][1][2] = -40, -+ [0][1][RTW89_KCC][1][2] = -14, -+ [0][1][RTW89_KCC][0][2] = -14, -+ [0][1][RTW89_ACMA][1][2] = 20, -+ [0][1][RTW89_ACMA][0][2] = -18, -+ [0][1][RTW89_CHILE][1][2] = -40, -+ [0][1][RTW89_QATAR][1][2] = 20, -+ [0][1][RTW89_QATAR][0][2] = -18, -+ [0][1][RTW89_UK][1][2] = 20, -+ [0][1][RTW89_UK][0][2] = -18, -+ [0][1][RTW89_FCC][1][4] = -40, -+ [0][1][RTW89_FCC][2][4] = 32, -+ [0][1][RTW89_ETSI][1][4] = 20, -+ [0][1][RTW89_ETSI][0][4] = -18, -+ [0][1][RTW89_MKK][1][4] = 18, -+ [0][1][RTW89_MKK][0][4] = -22, -+ [0][1][RTW89_IC][1][4] = -40, -+ [0][1][RTW89_KCC][1][4] = -14, -+ [0][1][RTW89_KCC][0][4] = -14, -+ [0][1][RTW89_ACMA][1][4] = 20, -+ [0][1][RTW89_ACMA][0][4] = -18, -+ [0][1][RTW89_CHILE][1][4] = -40, -+ [0][1][RTW89_QATAR][1][4] = 20, -+ [0][1][RTW89_QATAR][0][4] = -18, -+ [0][1][RTW89_UK][1][4] = 20, -+ [0][1][RTW89_UK][0][4] = -18, -+ [0][1][RTW89_FCC][1][6] = -40, -+ [0][1][RTW89_FCC][2][6] = 32, -+ [0][1][RTW89_ETSI][1][6] = 20, -+ [0][1][RTW89_ETSI][0][6] = -18, -+ [0][1][RTW89_MKK][1][6] = 18, -+ [0][1][RTW89_MKK][0][6] = -22, -+ [0][1][RTW89_IC][1][6] = -40, -+ [0][1][RTW89_KCC][1][6] = -14, -+ [0][1][RTW89_KCC][0][6] = -14, -+ [0][1][RTW89_ACMA][1][6] = 20, -+ [0][1][RTW89_ACMA][0][6] = -18, -+ [0][1][RTW89_CHILE][1][6] = -40, -+ [0][1][RTW89_QATAR][1][6] = 20, -+ [0][1][RTW89_QATAR][0][6] = -18, -+ [0][1][RTW89_UK][1][6] = 20, -+ [0][1][RTW89_UK][0][6] = -18, -+ [0][1][RTW89_FCC][1][8] = -40, -+ [0][1][RTW89_FCC][2][8] = 32, -+ [0][1][RTW89_ETSI][1][8] = 20, -+ [0][1][RTW89_ETSI][0][8] = -18, -+ [0][1][RTW89_MKK][1][8] = 18, -+ [0][1][RTW89_MKK][0][8] = -22, -+ [0][1][RTW89_IC][1][8] = -40, -+ [0][1][RTW89_KCC][1][8] = -14, -+ [0][1][RTW89_KCC][0][8] = -14, -+ [0][1][RTW89_ACMA][1][8] = 20, -+ [0][1][RTW89_ACMA][0][8] = -18, -+ [0][1][RTW89_CHILE][1][8] = -40, -+ [0][1][RTW89_QATAR][1][8] = 20, -+ [0][1][RTW89_QATAR][0][8] = -18, -+ [0][1][RTW89_UK][1][8] = 20, -+ [0][1][RTW89_UK][0][8] = -18, -+ [0][1][RTW89_FCC][1][10] = -40, -+ [0][1][RTW89_FCC][2][10] = 32, -+ [0][1][RTW89_ETSI][1][10] = 20, -+ [0][1][RTW89_ETSI][0][10] = -18, -+ [0][1][RTW89_MKK][1][10] = 18, -+ [0][1][RTW89_MKK][0][10] = -22, -+ [0][1][RTW89_IC][1][10] = -40, -+ [0][1][RTW89_KCC][1][10] = -14, -+ [0][1][RTW89_KCC][0][10] = -14, -+ [0][1][RTW89_ACMA][1][10] = 20, -+ [0][1][RTW89_ACMA][0][10] = -18, -+ [0][1][RTW89_CHILE][1][10] = -40, -+ [0][1][RTW89_QATAR][1][10] = 20, -+ [0][1][RTW89_QATAR][0][10] = -18, -+ [0][1][RTW89_UK][1][10] = 20, -+ [0][1][RTW89_UK][0][10] = -18, -+ [0][1][RTW89_FCC][1][12] = -40, -+ [0][1][RTW89_FCC][2][12] = 32, -+ [0][1][RTW89_ETSI][1][12] = 20, -+ [0][1][RTW89_ETSI][0][12] = -18, -+ [0][1][RTW89_MKK][1][12] = 18, -+ [0][1][RTW89_MKK][0][12] = -22, -+ [0][1][RTW89_IC][1][12] = -40, -+ [0][1][RTW89_KCC][1][12] = -14, -+ [0][1][RTW89_KCC][0][12] = -14, -+ [0][1][RTW89_ACMA][1][12] = 20, -+ [0][1][RTW89_ACMA][0][12] = -18, -+ [0][1][RTW89_CHILE][1][12] = -40, -+ [0][1][RTW89_QATAR][1][12] = 20, -+ [0][1][RTW89_QATAR][0][12] = -18, -+ [0][1][RTW89_UK][1][12] = 20, -+ [0][1][RTW89_UK][0][12] = -18, -+ [0][1][RTW89_FCC][1][14] = -40, -+ [0][1][RTW89_FCC][2][14] = 32, -+ [0][1][RTW89_ETSI][1][14] = 20, -+ [0][1][RTW89_ETSI][0][14] = -18, -+ [0][1][RTW89_MKK][1][14] = 18, -+ [0][1][RTW89_MKK][0][14] = -22, -+ [0][1][RTW89_IC][1][14] = -40, -+ [0][1][RTW89_KCC][1][14] = -14, -+ [0][1][RTW89_KCC][0][14] = -14, -+ [0][1][RTW89_ACMA][1][14] = 20, -+ [0][1][RTW89_ACMA][0][14] = -18, -+ [0][1][RTW89_CHILE][1][14] = -40, -+ [0][1][RTW89_QATAR][1][14] = 20, -+ [0][1][RTW89_QATAR][0][14] = -18, -+ [0][1][RTW89_UK][1][14] = 20, -+ [0][1][RTW89_UK][0][14] = -18, -+ [0][1][RTW89_FCC][1][15] = -40, -+ [0][1][RTW89_FCC][2][15] = 32, -+ [0][1][RTW89_ETSI][1][15] = 20, -+ [0][1][RTW89_ETSI][0][15] = -18, -+ [0][1][RTW89_MKK][1][15] = 18, -+ [0][1][RTW89_MKK][0][15] = -22, -+ [0][1][RTW89_IC][1][15] = -40, -+ [0][1][RTW89_KCC][1][15] = -14, -+ [0][1][RTW89_KCC][0][15] = -14, -+ [0][1][RTW89_ACMA][1][15] = 20, -+ [0][1][RTW89_ACMA][0][15] = -18, -+ [0][1][RTW89_CHILE][1][15] = -40, -+ [0][1][RTW89_QATAR][1][15] = 20, -+ [0][1][RTW89_QATAR][0][15] = -18, -+ [0][1][RTW89_UK][1][15] = 20, -+ [0][1][RTW89_UK][0][15] = -18, -+ [0][1][RTW89_FCC][1][17] = -40, -+ [0][1][RTW89_FCC][2][17] = 32, -+ [0][1][RTW89_ETSI][1][17] = 20, -+ [0][1][RTW89_ETSI][0][17] = -18, -+ [0][1][RTW89_MKK][1][17] = 18, -+ [0][1][RTW89_MKK][0][17] = -22, -+ [0][1][RTW89_IC][1][17] = -40, -+ [0][1][RTW89_KCC][1][17] = -14, -+ [0][1][RTW89_KCC][0][17] = -14, -+ [0][1][RTW89_ACMA][1][17] = 20, -+ [0][1][RTW89_ACMA][0][17] = -18, -+ [0][1][RTW89_CHILE][1][17] = -40, -+ [0][1][RTW89_QATAR][1][17] = 20, -+ [0][1][RTW89_QATAR][0][17] = -18, -+ [0][1][RTW89_UK][1][17] = 20, -+ [0][1][RTW89_UK][0][17] = -18, -+ [0][1][RTW89_FCC][1][19] = -40, -+ [0][1][RTW89_FCC][2][19] = 32, -+ [0][1][RTW89_ETSI][1][19] = 20, -+ [0][1][RTW89_ETSI][0][19] = -18, -+ [0][1][RTW89_MKK][1][19] = 18, -+ [0][1][RTW89_MKK][0][19] = -22, -+ [0][1][RTW89_IC][1][19] = -40, -+ [0][1][RTW89_KCC][1][19] = -14, -+ [0][1][RTW89_KCC][0][19] = -14, -+ [0][1][RTW89_ACMA][1][19] = 20, -+ [0][1][RTW89_ACMA][0][19] = -18, -+ [0][1][RTW89_CHILE][1][19] = -40, -+ [0][1][RTW89_QATAR][1][19] = 20, -+ [0][1][RTW89_QATAR][0][19] = -18, -+ [0][1][RTW89_UK][1][19] = 20, -+ [0][1][RTW89_UK][0][19] = -18, -+ [0][1][RTW89_FCC][1][21] = -40, -+ [0][1][RTW89_FCC][2][21] = 32, -+ [0][1][RTW89_ETSI][1][21] = 20, -+ [0][1][RTW89_ETSI][0][21] = -18, -+ [0][1][RTW89_MKK][1][21] = 18, -+ [0][1][RTW89_MKK][0][21] = -22, -+ [0][1][RTW89_IC][1][21] = -40, -+ [0][1][RTW89_KCC][1][21] = -14, -+ [0][1][RTW89_KCC][0][21] = -14, -+ [0][1][RTW89_ACMA][1][21] = 20, -+ [0][1][RTW89_ACMA][0][21] = -18, -+ [0][1][RTW89_CHILE][1][21] = -40, -+ [0][1][RTW89_QATAR][1][21] = 20, -+ [0][1][RTW89_QATAR][0][21] = -18, -+ [0][1][RTW89_UK][1][21] = 20, -+ [0][1][RTW89_UK][0][21] = -18, -+ [0][1][RTW89_FCC][1][23] = -40, -+ [0][1][RTW89_FCC][2][23] = 32, -+ [0][1][RTW89_ETSI][1][23] = 20, -+ [0][1][RTW89_ETSI][0][23] = -18, -+ [0][1][RTW89_MKK][1][23] = 18, -+ [0][1][RTW89_MKK][0][23] = -22, -+ [0][1][RTW89_IC][1][23] = -40, -+ [0][1][RTW89_KCC][1][23] = -14, -+ [0][1][RTW89_KCC][0][23] = -14, -+ [0][1][RTW89_ACMA][1][23] = 20, -+ [0][1][RTW89_ACMA][0][23] = -18, -+ [0][1][RTW89_CHILE][1][23] = -40, -+ [0][1][RTW89_QATAR][1][23] = 20, -+ [0][1][RTW89_QATAR][0][23] = -18, -+ [0][1][RTW89_UK][1][23] = 20, -+ [0][1][RTW89_UK][0][23] = -18, -+ [0][1][RTW89_FCC][1][25] = -40, -+ [0][1][RTW89_FCC][2][25] = 32, -+ [0][1][RTW89_ETSI][1][25] = 20, -+ [0][1][RTW89_ETSI][0][25] = -18, -+ [0][1][RTW89_MKK][1][25] = -4, -+ [0][1][RTW89_MKK][0][25] = -22, -+ [0][1][RTW89_IC][1][25] = -40, -+ [0][1][RTW89_KCC][1][25] = -14, -+ [0][1][RTW89_KCC][0][25] = -14, -+ [0][1][RTW89_ACMA][1][25] = 20, -+ [0][1][RTW89_ACMA][0][25] = -18, -+ [0][1][RTW89_CHILE][1][25] = -40, -+ [0][1][RTW89_QATAR][1][25] = 20, -+ [0][1][RTW89_QATAR][0][25] = -18, -+ [0][1][RTW89_UK][1][25] = 20, -+ [0][1][RTW89_UK][0][25] = -18, -+ [0][1][RTW89_FCC][1][27] = -40, -+ [0][1][RTW89_FCC][2][27] = 32, -+ [0][1][RTW89_ETSI][1][27] = 20, -+ [0][1][RTW89_ETSI][0][27] = -18, -+ [0][1][RTW89_MKK][1][27] = -4, -+ [0][1][RTW89_MKK][0][27] = -22, -+ [0][1][RTW89_IC][1][27] = -40, -+ [0][1][RTW89_KCC][1][27] = -14, -+ [0][1][RTW89_KCC][0][27] = -14, -+ [0][1][RTW89_ACMA][1][27] = 20, -+ [0][1][RTW89_ACMA][0][27] = -18, -+ [0][1][RTW89_CHILE][1][27] = -40, -+ [0][1][RTW89_QATAR][1][27] = 20, -+ [0][1][RTW89_QATAR][0][27] = -18, -+ [0][1][RTW89_UK][1][27] = 20, -+ [0][1][RTW89_UK][0][27] = -18, -+ [0][1][RTW89_FCC][1][29] = -40, -+ [0][1][RTW89_FCC][2][29] = 32, -+ [0][1][RTW89_ETSI][1][29] = 20, -+ [0][1][RTW89_ETSI][0][29] = -18, -+ [0][1][RTW89_MKK][1][29] = -4, -+ [0][1][RTW89_MKK][0][29] = -22, -+ [0][1][RTW89_IC][1][29] = -40, -+ [0][1][RTW89_KCC][1][29] = -14, -+ [0][1][RTW89_KCC][0][29] = -14, -+ [0][1][RTW89_ACMA][1][29] = 20, -+ [0][1][RTW89_ACMA][0][29] = -18, -+ [0][1][RTW89_CHILE][1][29] = -40, -+ [0][1][RTW89_QATAR][1][29] = 20, -+ [0][1][RTW89_QATAR][0][29] = -18, -+ [0][1][RTW89_UK][1][29] = 20, -+ [0][1][RTW89_UK][0][29] = -18, -+ [0][1][RTW89_FCC][1][30] = -40, -+ [0][1][RTW89_FCC][2][30] = 32, -+ [0][1][RTW89_ETSI][1][30] = 20, -+ [0][1][RTW89_ETSI][0][30] = -18, -+ [0][1][RTW89_MKK][1][30] = -4, -+ [0][1][RTW89_MKK][0][30] = -22, -+ [0][1][RTW89_IC][1][30] = -40, -+ [0][1][RTW89_KCC][1][30] = -14, -+ [0][1][RTW89_KCC][0][30] = -14, -+ [0][1][RTW89_ACMA][1][30] = 20, -+ [0][1][RTW89_ACMA][0][30] = -18, -+ [0][1][RTW89_CHILE][1][30] = -40, -+ [0][1][RTW89_QATAR][1][30] = 20, -+ [0][1][RTW89_QATAR][0][30] = -18, -+ [0][1][RTW89_UK][1][30] = 20, -+ [0][1][RTW89_UK][0][30] = -18, -+ [0][1][RTW89_FCC][1][32] = -40, -+ [0][1][RTW89_FCC][2][32] = 32, -+ [0][1][RTW89_ETSI][1][32] = 20, -+ [0][1][RTW89_ETSI][0][32] = -18, -+ [0][1][RTW89_MKK][1][32] = -4, -+ [0][1][RTW89_MKK][0][32] = -22, -+ [0][1][RTW89_IC][1][32] = -40, -+ [0][1][RTW89_KCC][1][32] = -14, -+ [0][1][RTW89_KCC][0][32] = -14, -+ [0][1][RTW89_ACMA][1][32] = 20, -+ [0][1][RTW89_ACMA][0][32] = -18, -+ [0][1][RTW89_CHILE][1][32] = -40, -+ [0][1][RTW89_QATAR][1][32] = 20, -+ [0][1][RTW89_QATAR][0][32] = -18, -+ [0][1][RTW89_UK][1][32] = 20, -+ [0][1][RTW89_UK][0][32] = -18, -+ [0][1][RTW89_FCC][1][34] = -40, -+ [0][1][RTW89_FCC][2][34] = 32, -+ [0][1][RTW89_ETSI][1][34] = 20, -+ [0][1][RTW89_ETSI][0][34] = -18, -+ [0][1][RTW89_MKK][1][34] = -4, -+ [0][1][RTW89_MKK][0][34] = -22, -+ [0][1][RTW89_IC][1][34] = -40, -+ [0][1][RTW89_KCC][1][34] = -14, -+ [0][1][RTW89_KCC][0][34] = -14, -+ [0][1][RTW89_ACMA][1][34] = 20, -+ [0][1][RTW89_ACMA][0][34] = -18, -+ [0][1][RTW89_CHILE][1][34] = -40, -+ [0][1][RTW89_QATAR][1][34] = 20, -+ [0][1][RTW89_QATAR][0][34] = -18, -+ [0][1][RTW89_UK][1][34] = 20, -+ [0][1][RTW89_UK][0][34] = -18, -+ [0][1][RTW89_FCC][1][36] = -40, -+ [0][1][RTW89_FCC][2][36] = 32, -+ [0][1][RTW89_ETSI][1][36] = 20, -+ [0][1][RTW89_ETSI][0][36] = -18, -+ [0][1][RTW89_MKK][1][36] = -4, -+ [0][1][RTW89_MKK][0][36] = -22, -+ [0][1][RTW89_IC][1][36] = -40, -+ [0][1][RTW89_KCC][1][36] = -14, -+ [0][1][RTW89_KCC][0][36] = -14, -+ [0][1][RTW89_ACMA][1][36] = 20, -+ [0][1][RTW89_ACMA][0][36] = -18, -+ [0][1][RTW89_CHILE][1][36] = -40, -+ [0][1][RTW89_QATAR][1][36] = 20, -+ [0][1][RTW89_QATAR][0][36] = -18, -+ [0][1][RTW89_UK][1][36] = 20, -+ [0][1][RTW89_UK][0][36] = -18, -+ [0][1][RTW89_FCC][1][38] = -40, -+ [0][1][RTW89_FCC][2][38] = 32, -+ [0][1][RTW89_ETSI][1][38] = 20, -+ [0][1][RTW89_ETSI][0][38] = -18, -+ [0][1][RTW89_MKK][1][38] = -4, -+ [0][1][RTW89_MKK][0][38] = -22, -+ [0][1][RTW89_IC][1][38] = -40, -+ [0][1][RTW89_KCC][1][38] = -14, -+ [0][1][RTW89_KCC][0][38] = -14, -+ [0][1][RTW89_ACMA][1][38] = 20, -+ [0][1][RTW89_ACMA][0][38] = -18, -+ [0][1][RTW89_CHILE][1][38] = -40, -+ [0][1][RTW89_QATAR][1][38] = 20, -+ [0][1][RTW89_QATAR][0][38] = -18, -+ [0][1][RTW89_UK][1][38] = 20, -+ [0][1][RTW89_UK][0][38] = -18, -+ [0][1][RTW89_FCC][1][40] = -40, -+ [0][1][RTW89_FCC][2][40] = 32, -+ [0][1][RTW89_ETSI][1][40] = 20, -+ [0][1][RTW89_ETSI][0][40] = -18, -+ [0][1][RTW89_MKK][1][40] = -4, -+ [0][1][RTW89_MKK][0][40] = -22, -+ [0][1][RTW89_IC][1][40] = -40, -+ [0][1][RTW89_KCC][1][40] = -14, -+ [0][1][RTW89_KCC][0][40] = -14, -+ [0][1][RTW89_ACMA][1][40] = 20, -+ [0][1][RTW89_ACMA][0][40] = -18, -+ [0][1][RTW89_CHILE][1][40] = -40, -+ [0][1][RTW89_QATAR][1][40] = 20, -+ [0][1][RTW89_QATAR][0][40] = -18, -+ [0][1][RTW89_UK][1][40] = 20, -+ [0][1][RTW89_UK][0][40] = -18, -+ [0][1][RTW89_FCC][1][42] = -40, -+ [0][1][RTW89_FCC][2][42] = 32, -+ [0][1][RTW89_ETSI][1][42] = 20, -+ [0][1][RTW89_ETSI][0][42] = -18, -+ [0][1][RTW89_MKK][1][42] = -4, -+ [0][1][RTW89_MKK][0][42] = -22, -+ [0][1][RTW89_IC][1][42] = -40, -+ [0][1][RTW89_KCC][1][42] = -14, -+ [0][1][RTW89_KCC][0][42] = -14, -+ [0][1][RTW89_ACMA][1][42] = 20, -+ [0][1][RTW89_ACMA][0][42] = -18, -+ [0][1][RTW89_CHILE][1][42] = -40, -+ [0][1][RTW89_QATAR][1][42] = 20, -+ [0][1][RTW89_QATAR][0][42] = -18, -+ [0][1][RTW89_UK][1][42] = 20, -+ [0][1][RTW89_UK][0][42] = -18, -+ [0][1][RTW89_FCC][1][44] = -40, -+ [0][1][RTW89_FCC][2][44] = 32, -+ [0][1][RTW89_ETSI][1][44] = 20, -+ [0][1][RTW89_ETSI][0][44] = -18, -+ [0][1][RTW89_MKK][1][44] = -4, -+ [0][1][RTW89_MKK][0][44] = -22, -+ [0][1][RTW89_IC][1][44] = -40, -+ [0][1][RTW89_KCC][1][44] = -14, -+ [0][1][RTW89_KCC][0][44] = -14, -+ [0][1][RTW89_ACMA][1][44] = 20, -+ [0][1][RTW89_ACMA][0][44] = -18, -+ [0][1][RTW89_CHILE][1][44] = -40, -+ [0][1][RTW89_QATAR][1][44] = 20, -+ [0][1][RTW89_QATAR][0][44] = -18, -+ [0][1][RTW89_UK][1][44] = 20, -+ [0][1][RTW89_UK][0][44] = -18, -+ [0][1][RTW89_FCC][1][45] = -40, -+ [0][1][RTW89_FCC][2][45] = 127, -+ [0][1][RTW89_ETSI][1][45] = 127, -+ [0][1][RTW89_ETSI][0][45] = 127, -+ [0][1][RTW89_MKK][1][45] = 127, -+ [0][1][RTW89_MKK][0][45] = 127, -+ [0][1][RTW89_IC][1][45] = -40, -+ [0][1][RTW89_KCC][1][45] = -14, -+ [0][1][RTW89_KCC][0][45] = 127, -+ [0][1][RTW89_ACMA][1][45] = 127, -+ [0][1][RTW89_ACMA][0][45] = 127, -+ [0][1][RTW89_CHILE][1][45] = 127, -+ [0][1][RTW89_QATAR][1][45] = 127, -+ [0][1][RTW89_QATAR][0][45] = 127, -+ [0][1][RTW89_UK][1][45] = 127, -+ [0][1][RTW89_UK][0][45] = 127, -+ [0][1][RTW89_FCC][1][47] = -40, -+ [0][1][RTW89_FCC][2][47] = 127, -+ [0][1][RTW89_ETSI][1][47] = 127, -+ [0][1][RTW89_ETSI][0][47] = 127, -+ [0][1][RTW89_MKK][1][47] = 127, -+ [0][1][RTW89_MKK][0][47] = 127, -+ [0][1][RTW89_IC][1][47] = -40, -+ [0][1][RTW89_KCC][1][47] = -14, -+ [0][1][RTW89_KCC][0][47] = 127, -+ [0][1][RTW89_ACMA][1][47] = 127, -+ [0][1][RTW89_ACMA][0][47] = 127, -+ [0][1][RTW89_CHILE][1][47] = 127, -+ [0][1][RTW89_QATAR][1][47] = 127, -+ [0][1][RTW89_QATAR][0][47] = 127, -+ [0][1][RTW89_UK][1][47] = 127, -+ [0][1][RTW89_UK][0][47] = 127, -+ [0][1][RTW89_FCC][1][49] = -40, -+ [0][1][RTW89_FCC][2][49] = 127, -+ [0][1][RTW89_ETSI][1][49] = 127, -+ [0][1][RTW89_ETSI][0][49] = 127, -+ [0][1][RTW89_MKK][1][49] = 127, -+ [0][1][RTW89_MKK][0][49] = 127, -+ [0][1][RTW89_IC][1][49] = -40, -+ [0][1][RTW89_KCC][1][49] = -14, -+ [0][1][RTW89_KCC][0][49] = 127, -+ [0][1][RTW89_ACMA][1][49] = 127, -+ [0][1][RTW89_ACMA][0][49] = 127, -+ [0][1][RTW89_CHILE][1][49] = 127, -+ [0][1][RTW89_QATAR][1][49] = 127, -+ [0][1][RTW89_QATAR][0][49] = 127, -+ [0][1][RTW89_UK][1][49] = 127, -+ [0][1][RTW89_UK][0][49] = 127, -+ [0][1][RTW89_FCC][1][51] = -40, -+ [0][1][RTW89_FCC][2][51] = 127, -+ [0][1][RTW89_ETSI][1][51] = 127, -+ [0][1][RTW89_ETSI][0][51] = 127, -+ [0][1][RTW89_MKK][1][51] = 127, -+ [0][1][RTW89_MKK][0][51] = 127, -+ [0][1][RTW89_IC][1][51] = -40, -+ [0][1][RTW89_KCC][1][51] = -14, -+ [0][1][RTW89_KCC][0][51] = 127, -+ [0][1][RTW89_ACMA][1][51] = 127, -+ [0][1][RTW89_ACMA][0][51] = 127, -+ [0][1][RTW89_CHILE][1][51] = 127, -+ [0][1][RTW89_QATAR][1][51] = 127, -+ [0][1][RTW89_QATAR][0][51] = 127, -+ [0][1][RTW89_UK][1][51] = 127, -+ [0][1][RTW89_UK][0][51] = 127, -+ [0][1][RTW89_FCC][1][53] = -40, -+ [0][1][RTW89_FCC][2][53] = 127, -+ [0][1][RTW89_ETSI][1][53] = 127, -+ [0][1][RTW89_ETSI][0][53] = 127, -+ [0][1][RTW89_MKK][1][53] = 127, -+ [0][1][RTW89_MKK][0][53] = 127, -+ [0][1][RTW89_IC][1][53] = -40, -+ [0][1][RTW89_KCC][1][53] = -14, -+ [0][1][RTW89_KCC][0][53] = 127, -+ [0][1][RTW89_ACMA][1][53] = 127, -+ [0][1][RTW89_ACMA][0][53] = 127, -+ [0][1][RTW89_CHILE][1][53] = 127, -+ [0][1][RTW89_QATAR][1][53] = 127, -+ [0][1][RTW89_QATAR][0][53] = 127, -+ [0][1][RTW89_UK][1][53] = 127, -+ [0][1][RTW89_UK][0][53] = 127, -+ [0][1][RTW89_FCC][1][55] = -40, -+ [0][1][RTW89_FCC][2][55] = 30, -+ [0][1][RTW89_ETSI][1][55] = 127, -+ [0][1][RTW89_ETSI][0][55] = 127, -+ [0][1][RTW89_MKK][1][55] = 127, -+ [0][1][RTW89_MKK][0][55] = 127, -+ [0][1][RTW89_IC][1][55] = -40, -+ [0][1][RTW89_KCC][1][55] = -14, -+ [0][1][RTW89_KCC][0][55] = 127, -+ [0][1][RTW89_ACMA][1][55] = 127, -+ [0][1][RTW89_ACMA][0][55] = 127, -+ [0][1][RTW89_CHILE][1][55] = 127, -+ [0][1][RTW89_QATAR][1][55] = 127, -+ [0][1][RTW89_QATAR][0][55] = 127, -+ [0][1][RTW89_UK][1][55] = 127, -+ [0][1][RTW89_UK][0][55] = 127, -+ [0][1][RTW89_FCC][1][57] = -40, -+ [0][1][RTW89_FCC][2][57] = 30, -+ [0][1][RTW89_ETSI][1][57] = 127, -+ [0][1][RTW89_ETSI][0][57] = 127, -+ [0][1][RTW89_MKK][1][57] = 127, -+ [0][1][RTW89_MKK][0][57] = 127, -+ [0][1][RTW89_IC][1][57] = -40, -+ [0][1][RTW89_KCC][1][57] = -14, -+ [0][1][RTW89_KCC][0][57] = 127, -+ [0][1][RTW89_ACMA][1][57] = 127, -+ [0][1][RTW89_ACMA][0][57] = 127, -+ [0][1][RTW89_CHILE][1][57] = 127, -+ [0][1][RTW89_QATAR][1][57] = 127, -+ [0][1][RTW89_QATAR][0][57] = 127, -+ [0][1][RTW89_UK][1][57] = 127, -+ [0][1][RTW89_UK][0][57] = 127, -+ [0][1][RTW89_FCC][1][59] = -40, -+ [0][1][RTW89_FCC][2][59] = 30, -+ [0][1][RTW89_ETSI][1][59] = 127, -+ [0][1][RTW89_ETSI][0][59] = 127, -+ [0][1][RTW89_MKK][1][59] = 127, -+ [0][1][RTW89_MKK][0][59] = 127, -+ [0][1][RTW89_IC][1][59] = -40, -+ [0][1][RTW89_KCC][1][59] = -14, -+ [0][1][RTW89_KCC][0][59] = 127, -+ [0][1][RTW89_ACMA][1][59] = 127, -+ [0][1][RTW89_ACMA][0][59] = 127, -+ [0][1][RTW89_CHILE][1][59] = 127, -+ [0][1][RTW89_QATAR][1][59] = 127, -+ [0][1][RTW89_QATAR][0][59] = 127, -+ [0][1][RTW89_UK][1][59] = 127, -+ [0][1][RTW89_UK][0][59] = 127, -+ [0][1][RTW89_FCC][1][60] = -40, -+ [0][1][RTW89_FCC][2][60] = 30, -+ [0][1][RTW89_ETSI][1][60] = 127, -+ [0][1][RTW89_ETSI][0][60] = 127, -+ [0][1][RTW89_MKK][1][60] = 127, -+ [0][1][RTW89_MKK][0][60] = 127, -+ [0][1][RTW89_IC][1][60] = -40, -+ [0][1][RTW89_KCC][1][60] = -14, -+ [0][1][RTW89_KCC][0][60] = 127, -+ [0][1][RTW89_ACMA][1][60] = 127, -+ [0][1][RTW89_ACMA][0][60] = 127, -+ [0][1][RTW89_CHILE][1][60] = 127, -+ [0][1][RTW89_QATAR][1][60] = 127, -+ [0][1][RTW89_QATAR][0][60] = 127, -+ [0][1][RTW89_UK][1][60] = 127, -+ [0][1][RTW89_UK][0][60] = 127, -+ [0][1][RTW89_FCC][1][62] = -40, -+ [0][1][RTW89_FCC][2][62] = 30, -+ [0][1][RTW89_ETSI][1][62] = 127, -+ [0][1][RTW89_ETSI][0][62] = 127, -+ [0][1][RTW89_MKK][1][62] = 127, -+ [0][1][RTW89_MKK][0][62] = 127, -+ [0][1][RTW89_IC][1][62] = -40, -+ [0][1][RTW89_KCC][1][62] = -14, -+ [0][1][RTW89_KCC][0][62] = 127, -+ [0][1][RTW89_ACMA][1][62] = 127, -+ [0][1][RTW89_ACMA][0][62] = 127, -+ [0][1][RTW89_CHILE][1][62] = 127, -+ [0][1][RTW89_QATAR][1][62] = 127, -+ [0][1][RTW89_QATAR][0][62] = 127, -+ [0][1][RTW89_UK][1][62] = 127, -+ [0][1][RTW89_UK][0][62] = 127, -+ [0][1][RTW89_FCC][1][64] = -40, -+ [0][1][RTW89_FCC][2][64] = 30, -+ [0][1][RTW89_ETSI][1][64] = 127, -+ [0][1][RTW89_ETSI][0][64] = 127, -+ [0][1][RTW89_MKK][1][64] = 127, -+ [0][1][RTW89_MKK][0][64] = 127, -+ [0][1][RTW89_IC][1][64] = -40, -+ [0][1][RTW89_KCC][1][64] = -14, -+ [0][1][RTW89_KCC][0][64] = 127, -+ [0][1][RTW89_ACMA][1][64] = 127, -+ [0][1][RTW89_ACMA][0][64] = 127, -+ [0][1][RTW89_CHILE][1][64] = 127, -+ [0][1][RTW89_QATAR][1][64] = 127, -+ [0][1][RTW89_QATAR][0][64] = 127, -+ [0][1][RTW89_UK][1][64] = 127, -+ [0][1][RTW89_UK][0][64] = 127, -+ [0][1][RTW89_FCC][1][66] = -40, -+ [0][1][RTW89_FCC][2][66] = 30, -+ [0][1][RTW89_ETSI][1][66] = 127, -+ [0][1][RTW89_ETSI][0][66] = 127, -+ [0][1][RTW89_MKK][1][66] = 127, -+ [0][1][RTW89_MKK][0][66] = 127, -+ [0][1][RTW89_IC][1][66] = -40, -+ [0][1][RTW89_KCC][1][66] = -14, -+ [0][1][RTW89_KCC][0][66] = 127, -+ [0][1][RTW89_ACMA][1][66] = 127, -+ [0][1][RTW89_ACMA][0][66] = 127, -+ [0][1][RTW89_CHILE][1][66] = 127, -+ [0][1][RTW89_QATAR][1][66] = 127, -+ [0][1][RTW89_QATAR][0][66] = 127, -+ [0][1][RTW89_UK][1][66] = 127, -+ [0][1][RTW89_UK][0][66] = 127, -+ [0][1][RTW89_FCC][1][68] = -40, -+ [0][1][RTW89_FCC][2][68] = 30, -+ [0][1][RTW89_ETSI][1][68] = 127, -+ [0][1][RTW89_ETSI][0][68] = 127, -+ [0][1][RTW89_MKK][1][68] = 127, -+ [0][1][RTW89_MKK][0][68] = 127, -+ [0][1][RTW89_IC][1][68] = -40, -+ [0][1][RTW89_KCC][1][68] = -14, -+ [0][1][RTW89_KCC][0][68] = 127, -+ [0][1][RTW89_ACMA][1][68] = 127, -+ [0][1][RTW89_ACMA][0][68] = 127, -+ [0][1][RTW89_CHILE][1][68] = 127, -+ [0][1][RTW89_QATAR][1][68] = 127, -+ [0][1][RTW89_QATAR][0][68] = 127, -+ [0][1][RTW89_UK][1][68] = 127, -+ [0][1][RTW89_UK][0][68] = 127, -+ [0][1][RTW89_FCC][1][70] = -38, -+ [0][1][RTW89_FCC][2][70] = 30, -+ [0][1][RTW89_ETSI][1][70] = 127, -+ [0][1][RTW89_ETSI][0][70] = 127, -+ [0][1][RTW89_MKK][1][70] = 127, -+ [0][1][RTW89_MKK][0][70] = 127, -+ [0][1][RTW89_IC][1][70] = -38, -+ [0][1][RTW89_KCC][1][70] = -14, -+ [0][1][RTW89_KCC][0][70] = 127, -+ [0][1][RTW89_ACMA][1][70] = 127, -+ [0][1][RTW89_ACMA][0][70] = 127, -+ [0][1][RTW89_CHILE][1][70] = 127, -+ [0][1][RTW89_QATAR][1][70] = 127, -+ [0][1][RTW89_QATAR][0][70] = 127, -+ [0][1][RTW89_UK][1][70] = 127, -+ [0][1][RTW89_UK][0][70] = 127, -+ [0][1][RTW89_FCC][1][72] = -38, -+ [0][1][RTW89_FCC][2][72] = 30, -+ [0][1][RTW89_ETSI][1][72] = 127, -+ [0][1][RTW89_ETSI][0][72] = 127, -+ [0][1][RTW89_MKK][1][72] = 127, -+ [0][1][RTW89_MKK][0][72] = 127, -+ [0][1][RTW89_IC][1][72] = -38, -+ [0][1][RTW89_KCC][1][72] = -14, -+ [0][1][RTW89_KCC][0][72] = 127, -+ [0][1][RTW89_ACMA][1][72] = 127, -+ [0][1][RTW89_ACMA][0][72] = 127, -+ [0][1][RTW89_CHILE][1][72] = 127, -+ [0][1][RTW89_QATAR][1][72] = 127, -+ [0][1][RTW89_QATAR][0][72] = 127, -+ [0][1][RTW89_UK][1][72] = 127, -+ [0][1][RTW89_UK][0][72] = 127, -+ [0][1][RTW89_FCC][1][74] = -38, -+ [0][1][RTW89_FCC][2][74] = 30, -+ [0][1][RTW89_ETSI][1][74] = 127, -+ [0][1][RTW89_ETSI][0][74] = 127, -+ [0][1][RTW89_MKK][1][74] = 127, -+ [0][1][RTW89_MKK][0][74] = 127, -+ [0][1][RTW89_IC][1][74] = -38, -+ [0][1][RTW89_KCC][1][74] = -14, -+ [0][1][RTW89_KCC][0][74] = 127, -+ [0][1][RTW89_ACMA][1][74] = 127, -+ [0][1][RTW89_ACMA][0][74] = 127, -+ [0][1][RTW89_CHILE][1][74] = 127, -+ [0][1][RTW89_QATAR][1][74] = 127, -+ [0][1][RTW89_QATAR][0][74] = 127, -+ [0][1][RTW89_UK][1][74] = 127, -+ [0][1][RTW89_UK][0][74] = 127, -+ [0][1][RTW89_FCC][1][75] = -38, -+ [0][1][RTW89_FCC][2][75] = 30, -+ [0][1][RTW89_ETSI][1][75] = 127, -+ [0][1][RTW89_ETSI][0][75] = 127, -+ [0][1][RTW89_MKK][1][75] = 127, -+ [0][1][RTW89_MKK][0][75] = 127, -+ [0][1][RTW89_IC][1][75] = -38, -+ [0][1][RTW89_KCC][1][75] = -14, -+ [0][1][RTW89_KCC][0][75] = 127, -+ [0][1][RTW89_ACMA][1][75] = 127, -+ [0][1][RTW89_ACMA][0][75] = 127, -+ [0][1][RTW89_CHILE][1][75] = 127, -+ [0][1][RTW89_QATAR][1][75] = 127, -+ [0][1][RTW89_QATAR][0][75] = 127, -+ [0][1][RTW89_UK][1][75] = 127, -+ [0][1][RTW89_UK][0][75] = 127, -+ [0][1][RTW89_FCC][1][77] = -38, -+ [0][1][RTW89_FCC][2][77] = 30, -+ [0][1][RTW89_ETSI][1][77] = 127, -+ [0][1][RTW89_ETSI][0][77] = 127, -+ [0][1][RTW89_MKK][1][77] = 127, -+ [0][1][RTW89_MKK][0][77] = 127, -+ [0][1][RTW89_IC][1][77] = -38, -+ [0][1][RTW89_KCC][1][77] = -14, -+ [0][1][RTW89_KCC][0][77] = 127, -+ [0][1][RTW89_ACMA][1][77] = 127, -+ [0][1][RTW89_ACMA][0][77] = 127, -+ [0][1][RTW89_CHILE][1][77] = 127, -+ [0][1][RTW89_QATAR][1][77] = 127, -+ [0][1][RTW89_QATAR][0][77] = 127, -+ [0][1][RTW89_UK][1][77] = 127, -+ [0][1][RTW89_UK][0][77] = 127, -+ [0][1][RTW89_FCC][1][79] = -38, -+ [0][1][RTW89_FCC][2][79] = 30, -+ [0][1][RTW89_ETSI][1][79] = 127, -+ [0][1][RTW89_ETSI][0][79] = 127, -+ [0][1][RTW89_MKK][1][79] = 127, -+ [0][1][RTW89_MKK][0][79] = 127, -+ [0][1][RTW89_IC][1][79] = -38, -+ [0][1][RTW89_KCC][1][79] = -14, -+ [0][1][RTW89_KCC][0][79] = 127, -+ [0][1][RTW89_ACMA][1][79] = 127, -+ [0][1][RTW89_ACMA][0][79] = 127, -+ [0][1][RTW89_CHILE][1][79] = 127, -+ [0][1][RTW89_QATAR][1][79] = 127, -+ [0][1][RTW89_QATAR][0][79] = 127, -+ [0][1][RTW89_UK][1][79] = 127, -+ [0][1][RTW89_UK][0][79] = 127, -+ [0][1][RTW89_FCC][1][81] = -38, -+ [0][1][RTW89_FCC][2][81] = 30, -+ [0][1][RTW89_ETSI][1][81] = 127, -+ [0][1][RTW89_ETSI][0][81] = 127, -+ [0][1][RTW89_MKK][1][81] = 127, -+ [0][1][RTW89_MKK][0][81] = 127, -+ [0][1][RTW89_IC][1][81] = -38, -+ [0][1][RTW89_KCC][1][81] = -14, -+ [0][1][RTW89_KCC][0][81] = 127, -+ [0][1][RTW89_ACMA][1][81] = 127, -+ [0][1][RTW89_ACMA][0][81] = 127, -+ [0][1][RTW89_CHILE][1][81] = 127, -+ [0][1][RTW89_QATAR][1][81] = 127, -+ [0][1][RTW89_QATAR][0][81] = 127, -+ [0][1][RTW89_UK][1][81] = 127, -+ [0][1][RTW89_UK][0][81] = 127, -+ [0][1][RTW89_FCC][1][83] = -38, -+ [0][1][RTW89_FCC][2][83] = 30, -+ [0][1][RTW89_ETSI][1][83] = 127, -+ [0][1][RTW89_ETSI][0][83] = 127, -+ [0][1][RTW89_MKK][1][83] = 127, -+ [0][1][RTW89_MKK][0][83] = 127, -+ [0][1][RTW89_IC][1][83] = -38, -+ [0][1][RTW89_KCC][1][83] = -14, -+ [0][1][RTW89_KCC][0][83] = 127, -+ [0][1][RTW89_ACMA][1][83] = 127, -+ [0][1][RTW89_ACMA][0][83] = 127, -+ [0][1][RTW89_CHILE][1][83] = 127, -+ [0][1][RTW89_QATAR][1][83] = 127, -+ [0][1][RTW89_QATAR][0][83] = 127, -+ [0][1][RTW89_UK][1][83] = 127, -+ [0][1][RTW89_UK][0][83] = 127, -+ [0][1][RTW89_FCC][1][85] = -38, -+ [0][1][RTW89_FCC][2][85] = 30, -+ [0][1][RTW89_ETSI][1][85] = 127, -+ [0][1][RTW89_ETSI][0][85] = 127, -+ [0][1][RTW89_MKK][1][85] = 127, -+ [0][1][RTW89_MKK][0][85] = 127, -+ [0][1][RTW89_IC][1][85] = -38, -+ [0][1][RTW89_KCC][1][85] = -14, -+ [0][1][RTW89_KCC][0][85] = 127, -+ [0][1][RTW89_ACMA][1][85] = 127, -+ [0][1][RTW89_ACMA][0][85] = 127, -+ [0][1][RTW89_CHILE][1][85] = 127, -+ [0][1][RTW89_QATAR][1][85] = 127, -+ [0][1][RTW89_QATAR][0][85] = 127, -+ [0][1][RTW89_UK][1][85] = 127, -+ [0][1][RTW89_UK][0][85] = 127, -+ [0][1][RTW89_FCC][1][87] = -40, -+ [0][1][RTW89_FCC][2][87] = 127, -+ [0][1][RTW89_ETSI][1][87] = 127, -+ [0][1][RTW89_ETSI][0][87] = 127, -+ [0][1][RTW89_MKK][1][87] = 127, -+ [0][1][RTW89_MKK][0][87] = 127, -+ [0][1][RTW89_IC][1][87] = -40, -+ [0][1][RTW89_KCC][1][87] = -14, -+ [0][1][RTW89_KCC][0][87] = 127, -+ [0][1][RTW89_ACMA][1][87] = 127, -+ [0][1][RTW89_ACMA][0][87] = 127, -+ [0][1][RTW89_CHILE][1][87] = 127, -+ [0][1][RTW89_QATAR][1][87] = 127, -+ [0][1][RTW89_QATAR][0][87] = 127, -+ [0][1][RTW89_UK][1][87] = 127, -+ [0][1][RTW89_UK][0][87] = 127, -+ [0][1][RTW89_FCC][1][89] = -38, -+ [0][1][RTW89_FCC][2][89] = 127, -+ [0][1][RTW89_ETSI][1][89] = 127, -+ [0][1][RTW89_ETSI][0][89] = 127, -+ [0][1][RTW89_MKK][1][89] = 127, -+ [0][1][RTW89_MKK][0][89] = 127, -+ [0][1][RTW89_IC][1][89] = -38, -+ [0][1][RTW89_KCC][1][89] = -14, -+ [0][1][RTW89_KCC][0][89] = 127, -+ [0][1][RTW89_ACMA][1][89] = 127, -+ [0][1][RTW89_ACMA][0][89] = 127, -+ [0][1][RTW89_CHILE][1][89] = 127, -+ [0][1][RTW89_QATAR][1][89] = 127, -+ [0][1][RTW89_QATAR][0][89] = 127, -+ [0][1][RTW89_UK][1][89] = 127, -+ [0][1][RTW89_UK][0][89] = 127, -+ [0][1][RTW89_FCC][1][90] = -38, -+ [0][1][RTW89_FCC][2][90] = 127, -+ [0][1][RTW89_ETSI][1][90] = 127, -+ [0][1][RTW89_ETSI][0][90] = 127, -+ [0][1][RTW89_MKK][1][90] = 127, -+ [0][1][RTW89_MKK][0][90] = 127, -+ [0][1][RTW89_IC][1][90] = -38, -+ [0][1][RTW89_KCC][1][90] = -14, -+ [0][1][RTW89_KCC][0][90] = 127, -+ [0][1][RTW89_ACMA][1][90] = 127, -+ [0][1][RTW89_ACMA][0][90] = 127, -+ [0][1][RTW89_CHILE][1][90] = 127, -+ [0][1][RTW89_QATAR][1][90] = 127, -+ [0][1][RTW89_QATAR][0][90] = 127, -+ [0][1][RTW89_UK][1][90] = 127, -+ [0][1][RTW89_UK][0][90] = 127, -+ [0][1][RTW89_FCC][1][92] = -38, -+ [0][1][RTW89_FCC][2][92] = 127, -+ [0][1][RTW89_ETSI][1][92] = 127, -+ [0][1][RTW89_ETSI][0][92] = 127, -+ [0][1][RTW89_MKK][1][92] = 127, -+ [0][1][RTW89_MKK][0][92] = 127, -+ [0][1][RTW89_IC][1][92] = -38, -+ [0][1][RTW89_KCC][1][92] = -14, -+ [0][1][RTW89_KCC][0][92] = 127, -+ [0][1][RTW89_ACMA][1][92] = 127, -+ [0][1][RTW89_ACMA][0][92] = 127, -+ [0][1][RTW89_CHILE][1][92] = 127, -+ [0][1][RTW89_QATAR][1][92] = 127, -+ [0][1][RTW89_QATAR][0][92] = 127, -+ [0][1][RTW89_UK][1][92] = 127, -+ [0][1][RTW89_UK][0][92] = 127, -+ [0][1][RTW89_FCC][1][94] = -38, -+ [0][1][RTW89_FCC][2][94] = 127, -+ [0][1][RTW89_ETSI][1][94] = 127, -+ [0][1][RTW89_ETSI][0][94] = 127, -+ [0][1][RTW89_MKK][1][94] = 127, -+ [0][1][RTW89_MKK][0][94] = 127, -+ [0][1][RTW89_IC][1][94] = -38, -+ [0][1][RTW89_KCC][1][94] = -14, -+ [0][1][RTW89_KCC][0][94] = 127, -+ [0][1][RTW89_ACMA][1][94] = 127, -+ [0][1][RTW89_ACMA][0][94] = 127, -+ [0][1][RTW89_CHILE][1][94] = 127, -+ [0][1][RTW89_QATAR][1][94] = 127, -+ [0][1][RTW89_QATAR][0][94] = 127, -+ [0][1][RTW89_UK][1][94] = 127, -+ [0][1][RTW89_UK][0][94] = 127, -+ [0][1][RTW89_FCC][1][96] = -38, -+ [0][1][RTW89_FCC][2][96] = 127, -+ [0][1][RTW89_ETSI][1][96] = 127, -+ [0][1][RTW89_ETSI][0][96] = 127, -+ [0][1][RTW89_MKK][1][96] = 127, -+ [0][1][RTW89_MKK][0][96] = 127, -+ [0][1][RTW89_IC][1][96] = -38, -+ [0][1][RTW89_KCC][1][96] = -14, -+ [0][1][RTW89_KCC][0][96] = 127, -+ [0][1][RTW89_ACMA][1][96] = 127, -+ [0][1][RTW89_ACMA][0][96] = 127, -+ [0][1][RTW89_CHILE][1][96] = 127, -+ [0][1][RTW89_QATAR][1][96] = 127, -+ [0][1][RTW89_QATAR][0][96] = 127, -+ [0][1][RTW89_UK][1][96] = 127, -+ [0][1][RTW89_UK][0][96] = 127, -+ [0][1][RTW89_FCC][1][98] = -38, -+ [0][1][RTW89_FCC][2][98] = 127, -+ [0][1][RTW89_ETSI][1][98] = 127, -+ [0][1][RTW89_ETSI][0][98] = 127, -+ [0][1][RTW89_MKK][1][98] = 127, -+ [0][1][RTW89_MKK][0][98] = 127, -+ [0][1][RTW89_IC][1][98] = -38, -+ [0][1][RTW89_KCC][1][98] = -14, -+ [0][1][RTW89_KCC][0][98] = 127, -+ [0][1][RTW89_ACMA][1][98] = 127, -+ [0][1][RTW89_ACMA][0][98] = 127, -+ [0][1][RTW89_CHILE][1][98] = 127, -+ [0][1][RTW89_QATAR][1][98] = 127, -+ [0][1][RTW89_QATAR][0][98] = 127, -+ [0][1][RTW89_UK][1][98] = 127, -+ [0][1][RTW89_UK][0][98] = 127, -+ [0][1][RTW89_FCC][1][100] = -38, -+ [0][1][RTW89_FCC][2][100] = 127, -+ [0][1][RTW89_ETSI][1][100] = 127, -+ [0][1][RTW89_ETSI][0][100] = 127, -+ [0][1][RTW89_MKK][1][100] = 127, -+ [0][1][RTW89_MKK][0][100] = 127, -+ [0][1][RTW89_IC][1][100] = -38, -+ [0][1][RTW89_KCC][1][100] = -14, -+ [0][1][RTW89_KCC][0][100] = 127, -+ [0][1][RTW89_ACMA][1][100] = 127, -+ [0][1][RTW89_ACMA][0][100] = 127, -+ [0][1][RTW89_CHILE][1][100] = 127, -+ [0][1][RTW89_QATAR][1][100] = 127, -+ [0][1][RTW89_QATAR][0][100] = 127, -+ [0][1][RTW89_UK][1][100] = 127, -+ [0][1][RTW89_UK][0][100] = 127, -+ [0][1][RTW89_FCC][1][102] = -38, -+ [0][1][RTW89_FCC][2][102] = 127, -+ [0][1][RTW89_ETSI][1][102] = 127, -+ [0][1][RTW89_ETSI][0][102] = 127, -+ [0][1][RTW89_MKK][1][102] = 127, -+ [0][1][RTW89_MKK][0][102] = 127, -+ [0][1][RTW89_IC][1][102] = -38, -+ [0][1][RTW89_KCC][1][102] = -14, -+ [0][1][RTW89_KCC][0][102] = 127, -+ [0][1][RTW89_ACMA][1][102] = 127, -+ [0][1][RTW89_ACMA][0][102] = 127, -+ [0][1][RTW89_CHILE][1][102] = 127, -+ [0][1][RTW89_QATAR][1][102] = 127, -+ [0][1][RTW89_QATAR][0][102] = 127, -+ [0][1][RTW89_UK][1][102] = 127, -+ [0][1][RTW89_UK][0][102] = 127, -+ [0][1][RTW89_FCC][1][104] = -38, -+ [0][1][RTW89_FCC][2][104] = 127, -+ [0][1][RTW89_ETSI][1][104] = 127, -+ [0][1][RTW89_ETSI][0][104] = 127, -+ [0][1][RTW89_MKK][1][104] = 127, -+ [0][1][RTW89_MKK][0][104] = 127, -+ [0][1][RTW89_IC][1][104] = -38, -+ [0][1][RTW89_KCC][1][104] = -14, -+ [0][1][RTW89_KCC][0][104] = 127, -+ [0][1][RTW89_ACMA][1][104] = 127, -+ [0][1][RTW89_ACMA][0][104] = 127, -+ [0][1][RTW89_CHILE][1][104] = 127, -+ [0][1][RTW89_QATAR][1][104] = 127, -+ [0][1][RTW89_QATAR][0][104] = 127, -+ [0][1][RTW89_UK][1][104] = 127, -+ [0][1][RTW89_UK][0][104] = 127, -+ [0][1][RTW89_FCC][1][105] = -38, -+ [0][1][RTW89_FCC][2][105] = 127, -+ [0][1][RTW89_ETSI][1][105] = 127, -+ [0][1][RTW89_ETSI][0][105] = 127, -+ [0][1][RTW89_MKK][1][105] = 127, -+ [0][1][RTW89_MKK][0][105] = 127, -+ [0][1][RTW89_IC][1][105] = -38, -+ [0][1][RTW89_KCC][1][105] = -14, -+ [0][1][RTW89_KCC][0][105] = 127, -+ [0][1][RTW89_ACMA][1][105] = 127, -+ [0][1][RTW89_ACMA][0][105] = 127, -+ [0][1][RTW89_CHILE][1][105] = 127, -+ [0][1][RTW89_QATAR][1][105] = 127, -+ [0][1][RTW89_QATAR][0][105] = 127, -+ [0][1][RTW89_UK][1][105] = 127, -+ [0][1][RTW89_UK][0][105] = 127, -+ [0][1][RTW89_FCC][1][107] = -34, -+ [0][1][RTW89_FCC][2][107] = 127, -+ [0][1][RTW89_ETSI][1][107] = 127, -+ [0][1][RTW89_ETSI][0][107] = 127, -+ [0][1][RTW89_MKK][1][107] = 127, -+ [0][1][RTW89_MKK][0][107] = 127, -+ [0][1][RTW89_IC][1][107] = -34, -+ [0][1][RTW89_KCC][1][107] = -14, -+ [0][1][RTW89_KCC][0][107] = 127, -+ [0][1][RTW89_ACMA][1][107] = 127, -+ [0][1][RTW89_ACMA][0][107] = 127, -+ [0][1][RTW89_CHILE][1][107] = 127, -+ [0][1][RTW89_QATAR][1][107] = 127, -+ [0][1][RTW89_QATAR][0][107] = 127, -+ [0][1][RTW89_UK][1][107] = 127, -+ [0][1][RTW89_UK][0][107] = 127, -+ [0][1][RTW89_FCC][1][109] = -34, -+ [0][1][RTW89_FCC][2][109] = 127, -+ [0][1][RTW89_ETSI][1][109] = 127, -+ [0][1][RTW89_ETSI][0][109] = 127, -+ [0][1][RTW89_MKK][1][109] = 127, -+ [0][1][RTW89_MKK][0][109] = 127, -+ [0][1][RTW89_IC][1][109] = -34, -+ [0][1][RTW89_KCC][1][109] = 127, -+ [0][1][RTW89_KCC][0][109] = 127, -+ [0][1][RTW89_ACMA][1][109] = 127, -+ [0][1][RTW89_ACMA][0][109] = 127, -+ [0][1][RTW89_CHILE][1][109] = 127, -+ [0][1][RTW89_QATAR][1][109] = 127, -+ [0][1][RTW89_QATAR][0][109] = 127, -+ [0][1][RTW89_UK][1][109] = 127, -+ [0][1][RTW89_UK][0][109] = 127, -+ [0][1][RTW89_FCC][1][111] = 127, -+ [0][1][RTW89_FCC][2][111] = 127, -+ [0][1][RTW89_ETSI][1][111] = 127, -+ [0][1][RTW89_ETSI][0][111] = 127, -+ [0][1][RTW89_MKK][1][111] = 127, -+ [0][1][RTW89_MKK][0][111] = 127, -+ [0][1][RTW89_IC][1][111] = 127, -+ [0][1][RTW89_KCC][1][111] = 127, -+ [0][1][RTW89_KCC][0][111] = 127, -+ [0][1][RTW89_ACMA][1][111] = 127, -+ [0][1][RTW89_ACMA][0][111] = 127, -+ [0][1][RTW89_CHILE][1][111] = 127, -+ [0][1][RTW89_QATAR][1][111] = 127, -+ [0][1][RTW89_QATAR][0][111] = 127, -+ [0][1][RTW89_UK][1][111] = 127, -+ [0][1][RTW89_UK][0][111] = 127, -+ [0][1][RTW89_FCC][1][113] = 127, -+ [0][1][RTW89_FCC][2][113] = 127, -+ [0][1][RTW89_ETSI][1][113] = 127, -+ [0][1][RTW89_ETSI][0][113] = 127, -+ [0][1][RTW89_MKK][1][113] = 127, -+ [0][1][RTW89_MKK][0][113] = 127, -+ [0][1][RTW89_IC][1][113] = 127, -+ [0][1][RTW89_KCC][1][113] = 127, -+ [0][1][RTW89_KCC][0][113] = 127, -+ [0][1][RTW89_ACMA][1][113] = 127, -+ [0][1][RTW89_ACMA][0][113] = 127, -+ [0][1][RTW89_CHILE][1][113] = 127, -+ [0][1][RTW89_QATAR][1][113] = 127, -+ [0][1][RTW89_QATAR][0][113] = 127, -+ [0][1][RTW89_UK][1][113] = 127, -+ [0][1][RTW89_UK][0][113] = 127, -+ [0][1][RTW89_FCC][1][115] = 127, -+ [0][1][RTW89_FCC][2][115] = 127, -+ [0][1][RTW89_ETSI][1][115] = 127, -+ [0][1][RTW89_ETSI][0][115] = 127, -+ [0][1][RTW89_MKK][1][115] = 127, -+ [0][1][RTW89_MKK][0][115] = 127, -+ [0][1][RTW89_IC][1][115] = 127, -+ [0][1][RTW89_KCC][1][115] = 127, -+ [0][1][RTW89_KCC][0][115] = 127, -+ [0][1][RTW89_ACMA][1][115] = 127, -+ [0][1][RTW89_ACMA][0][115] = 127, -+ [0][1][RTW89_CHILE][1][115] = 127, -+ [0][1][RTW89_QATAR][1][115] = 127, -+ [0][1][RTW89_QATAR][0][115] = 127, -+ [0][1][RTW89_UK][1][115] = 127, -+ [0][1][RTW89_UK][0][115] = 127, -+ [0][1][RTW89_FCC][1][117] = 127, -+ [0][1][RTW89_FCC][2][117] = 127, -+ [0][1][RTW89_ETSI][1][117] = 127, -+ [0][1][RTW89_ETSI][0][117] = 127, -+ [0][1][RTW89_MKK][1][117] = 127, -+ [0][1][RTW89_MKK][0][117] = 127, -+ [0][1][RTW89_IC][1][117] = 127, -+ [0][1][RTW89_KCC][1][117] = 127, -+ [0][1][RTW89_KCC][0][117] = 127, -+ [0][1][RTW89_ACMA][1][117] = 127, -+ [0][1][RTW89_ACMA][0][117] = 127, -+ [0][1][RTW89_CHILE][1][117] = 127, -+ [0][1][RTW89_QATAR][1][117] = 127, -+ [0][1][RTW89_QATAR][0][117] = 127, -+ [0][1][RTW89_UK][1][117] = 127, -+ [0][1][RTW89_UK][0][117] = 127, -+ [0][1][RTW89_FCC][1][119] = 127, -+ [0][1][RTW89_FCC][2][119] = 127, -+ [0][1][RTW89_ETSI][1][119] = 127, -+ [0][1][RTW89_ETSI][0][119] = 127, -+ [0][1][RTW89_MKK][1][119] = 127, -+ [0][1][RTW89_MKK][0][119] = 127, -+ [0][1][RTW89_IC][1][119] = 127, -+ [0][1][RTW89_KCC][1][119] = 127, -+ [0][1][RTW89_KCC][0][119] = 127, -+ [0][1][RTW89_ACMA][1][119] = 127, -+ [0][1][RTW89_ACMA][0][119] = 127, -+ [0][1][RTW89_CHILE][1][119] = 127, -+ [0][1][RTW89_QATAR][1][119] = 127, -+ [0][1][RTW89_QATAR][0][119] = 127, -+ [0][1][RTW89_UK][1][119] = 127, -+ [0][1][RTW89_UK][0][119] = 127, -+ [1][0][RTW89_FCC][1][0] = -4, -+ [1][0][RTW89_FCC][2][0] = 52, -+ [1][0][RTW89_ETSI][1][0] = 46, -+ [1][0][RTW89_ETSI][0][0] = 6, -+ [1][0][RTW89_MKK][1][0] = 42, -+ [1][0][RTW89_MKK][0][0] = 2, -+ [1][0][RTW89_IC][1][0] = -4, -+ [1][0][RTW89_KCC][1][0] = -2, -+ [1][0][RTW89_KCC][0][0] = -2, -+ [1][0][RTW89_ACMA][1][0] = 46, -+ [1][0][RTW89_ACMA][0][0] = 6, -+ [1][0][RTW89_CHILE][1][0] = -4, -+ [1][0][RTW89_QATAR][1][0] = 46, -+ [1][0][RTW89_QATAR][0][0] = 6, -+ [1][0][RTW89_UK][1][0] = 46, -+ [1][0][RTW89_UK][0][0] = 6, -+ [1][0][RTW89_FCC][1][2] = -4, -+ [1][0][RTW89_FCC][2][2] = 52, -+ [1][0][RTW89_ETSI][1][2] = 46, -+ [1][0][RTW89_ETSI][0][2] = 6, -+ [1][0][RTW89_MKK][1][2] = 42, -+ [1][0][RTW89_MKK][0][2] = 2, -+ [1][0][RTW89_IC][1][2] = -4, -+ [1][0][RTW89_KCC][1][2] = -2, -+ [1][0][RTW89_KCC][0][2] = -2, -+ [1][0][RTW89_ACMA][1][2] = 46, -+ [1][0][RTW89_ACMA][0][2] = 6, -+ [1][0][RTW89_CHILE][1][2] = -4, -+ [1][0][RTW89_QATAR][1][2] = 46, -+ [1][0][RTW89_QATAR][0][2] = 6, -+ [1][0][RTW89_UK][1][2] = 46, -+ [1][0][RTW89_UK][0][2] = 6, -+ [1][0][RTW89_FCC][1][4] = -4, -+ [1][0][RTW89_FCC][2][4] = 52, -+ [1][0][RTW89_ETSI][1][4] = 46, -+ [1][0][RTW89_ETSI][0][4] = 6, -+ [1][0][RTW89_MKK][1][4] = 42, -+ [1][0][RTW89_MKK][0][4] = 2, -+ [1][0][RTW89_IC][1][4] = -4, -+ [1][0][RTW89_KCC][1][4] = -2, -+ [1][0][RTW89_KCC][0][4] = -2, -+ [1][0][RTW89_ACMA][1][4] = 46, -+ [1][0][RTW89_ACMA][0][4] = 6, -+ [1][0][RTW89_CHILE][1][4] = -4, -+ [1][0][RTW89_QATAR][1][4] = 46, -+ [1][0][RTW89_QATAR][0][4] = 6, -+ [1][0][RTW89_UK][1][4] = 46, -+ [1][0][RTW89_UK][0][4] = 6, -+ [1][0][RTW89_FCC][1][6] = -4, -+ [1][0][RTW89_FCC][2][6] = 52, -+ [1][0][RTW89_ETSI][1][6] = 46, -+ [1][0][RTW89_ETSI][0][6] = 6, -+ [1][0][RTW89_MKK][1][6] = 42, -+ [1][0][RTW89_MKK][0][6] = 2, -+ [1][0][RTW89_IC][1][6] = -4, -+ [1][0][RTW89_KCC][1][6] = -2, -+ [1][0][RTW89_KCC][0][6] = -2, -+ [1][0][RTW89_ACMA][1][6] = 46, -+ [1][0][RTW89_ACMA][0][6] = 6, -+ [1][0][RTW89_CHILE][1][6] = -4, -+ [1][0][RTW89_QATAR][1][6] = 46, -+ [1][0][RTW89_QATAR][0][6] = 6, -+ [1][0][RTW89_UK][1][6] = 46, -+ [1][0][RTW89_UK][0][6] = 6, -+ [1][0][RTW89_FCC][1][8] = -4, -+ [1][0][RTW89_FCC][2][8] = 52, -+ [1][0][RTW89_ETSI][1][8] = 46, -+ [1][0][RTW89_ETSI][0][8] = 6, -+ [1][0][RTW89_MKK][1][8] = 42, -+ [1][0][RTW89_MKK][0][8] = 2, -+ [1][0][RTW89_IC][1][8] = -4, -+ [1][0][RTW89_KCC][1][8] = -2, -+ [1][0][RTW89_KCC][0][8] = -2, -+ [1][0][RTW89_ACMA][1][8] = 46, -+ [1][0][RTW89_ACMA][0][8] = 6, -+ [1][0][RTW89_CHILE][1][8] = -4, -+ [1][0][RTW89_QATAR][1][8] = 46, -+ [1][0][RTW89_QATAR][0][8] = 6, -+ [1][0][RTW89_UK][1][8] = 46, -+ [1][0][RTW89_UK][0][8] = 6, -+ [1][0][RTW89_FCC][1][10] = -4, -+ [1][0][RTW89_FCC][2][10] = 52, -+ [1][0][RTW89_ETSI][1][10] = 46, -+ [1][0][RTW89_ETSI][0][10] = 6, -+ [1][0][RTW89_MKK][1][10] = 42, -+ [1][0][RTW89_MKK][0][10] = 2, -+ [1][0][RTW89_IC][1][10] = -4, -+ [1][0][RTW89_KCC][1][10] = -2, -+ [1][0][RTW89_KCC][0][10] = -2, -+ [1][0][RTW89_ACMA][1][10] = 46, -+ [1][0][RTW89_ACMA][0][10] = 6, -+ [1][0][RTW89_CHILE][1][10] = -4, -+ [1][0][RTW89_QATAR][1][10] = 46, -+ [1][0][RTW89_QATAR][0][10] = 6, -+ [1][0][RTW89_UK][1][10] = 46, -+ [1][0][RTW89_UK][0][10] = 6, -+ [1][0][RTW89_FCC][1][12] = -4, -+ [1][0][RTW89_FCC][2][12] = 52, -+ [1][0][RTW89_ETSI][1][12] = 46, -+ [1][0][RTW89_ETSI][0][12] = 6, -+ [1][0][RTW89_MKK][1][12] = 42, -+ [1][0][RTW89_MKK][0][12] = 2, -+ [1][0][RTW89_IC][1][12] = -4, -+ [1][0][RTW89_KCC][1][12] = -2, -+ [1][0][RTW89_KCC][0][12] = -2, -+ [1][0][RTW89_ACMA][1][12] = 46, -+ [1][0][RTW89_ACMA][0][12] = 6, -+ [1][0][RTW89_CHILE][1][12] = -4, -+ [1][0][RTW89_QATAR][1][12] = 46, -+ [1][0][RTW89_QATAR][0][12] = 6, -+ [1][0][RTW89_UK][1][12] = 46, -+ [1][0][RTW89_UK][0][12] = 6, -+ [1][0][RTW89_FCC][1][14] = -4, -+ [1][0][RTW89_FCC][2][14] = 52, -+ [1][0][RTW89_ETSI][1][14] = 46, -+ [1][0][RTW89_ETSI][0][14] = 6, -+ [1][0][RTW89_MKK][1][14] = 42, -+ [1][0][RTW89_MKK][0][14] = 2, -+ [1][0][RTW89_IC][1][14] = -4, -+ [1][0][RTW89_KCC][1][14] = -2, -+ [1][0][RTW89_KCC][0][14] = -2, -+ [1][0][RTW89_ACMA][1][14] = 46, -+ [1][0][RTW89_ACMA][0][14] = 6, -+ [1][0][RTW89_CHILE][1][14] = -4, -+ [1][0][RTW89_QATAR][1][14] = 46, -+ [1][0][RTW89_QATAR][0][14] = 6, -+ [1][0][RTW89_UK][1][14] = 46, -+ [1][0][RTW89_UK][0][14] = 6, -+ [1][0][RTW89_FCC][1][15] = -4, -+ [1][0][RTW89_FCC][2][15] = 52, -+ [1][0][RTW89_ETSI][1][15] = 46, -+ [1][0][RTW89_ETSI][0][15] = 6, -+ [1][0][RTW89_MKK][1][15] = 42, -+ [1][0][RTW89_MKK][0][15] = 2, -+ [1][0][RTW89_IC][1][15] = -4, -+ [1][0][RTW89_KCC][1][15] = -2, -+ [1][0][RTW89_KCC][0][15] = -2, -+ [1][0][RTW89_ACMA][1][15] = 46, -+ [1][0][RTW89_ACMA][0][15] = 6, -+ [1][0][RTW89_CHILE][1][15] = -4, -+ [1][0][RTW89_QATAR][1][15] = 46, -+ [1][0][RTW89_QATAR][0][15] = 6, -+ [1][0][RTW89_UK][1][15] = 46, -+ [1][0][RTW89_UK][0][15] = 6, -+ [1][0][RTW89_FCC][1][17] = -4, -+ [1][0][RTW89_FCC][2][17] = 52, -+ [1][0][RTW89_ETSI][1][17] = 46, -+ [1][0][RTW89_ETSI][0][17] = 6, -+ [1][0][RTW89_MKK][1][17] = 42, -+ [1][0][RTW89_MKK][0][17] = 2, -+ [1][0][RTW89_IC][1][17] = -4, -+ [1][0][RTW89_KCC][1][17] = -2, -+ [1][0][RTW89_KCC][0][17] = -2, -+ [1][0][RTW89_ACMA][1][17] = 46, -+ [1][0][RTW89_ACMA][0][17] = 6, -+ [1][0][RTW89_CHILE][1][17] = -4, -+ [1][0][RTW89_QATAR][1][17] = 46, -+ [1][0][RTW89_QATAR][0][17] = 6, -+ [1][0][RTW89_UK][1][17] = 46, -+ [1][0][RTW89_UK][0][17] = 6, -+ [1][0][RTW89_FCC][1][19] = -4, -+ [1][0][RTW89_FCC][2][19] = 52, -+ [1][0][RTW89_ETSI][1][19] = 46, -+ [1][0][RTW89_ETSI][0][19] = 6, -+ [1][0][RTW89_MKK][1][19] = 42, -+ [1][0][RTW89_MKK][0][19] = 2, -+ [1][0][RTW89_IC][1][19] = -4, -+ [1][0][RTW89_KCC][1][19] = -2, -+ [1][0][RTW89_KCC][0][19] = -2, -+ [1][0][RTW89_ACMA][1][19] = 46, -+ [1][0][RTW89_ACMA][0][19] = 6, -+ [1][0][RTW89_CHILE][1][19] = -4, -+ [1][0][RTW89_QATAR][1][19] = 46, -+ [1][0][RTW89_QATAR][0][19] = 6, -+ [1][0][RTW89_UK][1][19] = 46, -+ [1][0][RTW89_UK][0][19] = 6, -+ [1][0][RTW89_FCC][1][21] = -4, -+ [1][0][RTW89_FCC][2][21] = 52, -+ [1][0][RTW89_ETSI][1][21] = 46, -+ [1][0][RTW89_ETSI][0][21] = 6, -+ [1][0][RTW89_MKK][1][21] = 42, -+ [1][0][RTW89_MKK][0][21] = 2, -+ [1][0][RTW89_IC][1][21] = -4, -+ [1][0][RTW89_KCC][1][21] = -2, -+ [1][0][RTW89_KCC][0][21] = -2, -+ [1][0][RTW89_ACMA][1][21] = 46, -+ [1][0][RTW89_ACMA][0][21] = 6, -+ [1][0][RTW89_CHILE][1][21] = -4, -+ [1][0][RTW89_QATAR][1][21] = 46, -+ [1][0][RTW89_QATAR][0][21] = 6, -+ [1][0][RTW89_UK][1][21] = 46, -+ [1][0][RTW89_UK][0][21] = 6, -+ [1][0][RTW89_FCC][1][23] = -4, -+ [1][0][RTW89_FCC][2][23] = 66, -+ [1][0][RTW89_ETSI][1][23] = 46, -+ [1][0][RTW89_ETSI][0][23] = 6, -+ [1][0][RTW89_MKK][1][23] = 42, -+ [1][0][RTW89_MKK][0][23] = 2, -+ [1][0][RTW89_IC][1][23] = -4, -+ [1][0][RTW89_KCC][1][23] = -2, -+ [1][0][RTW89_KCC][0][23] = -2, -+ [1][0][RTW89_ACMA][1][23] = 46, -+ [1][0][RTW89_ACMA][0][23] = 6, -+ [1][0][RTW89_CHILE][1][23] = -4, -+ [1][0][RTW89_QATAR][1][23] = 46, -+ [1][0][RTW89_QATAR][0][23] = 6, -+ [1][0][RTW89_UK][1][23] = 46, -+ [1][0][RTW89_UK][0][23] = 6, -+ [1][0][RTW89_FCC][1][25] = -4, -+ [1][0][RTW89_FCC][2][25] = 66, -+ [1][0][RTW89_ETSI][1][25] = 46, -+ [1][0][RTW89_ETSI][0][25] = 6, -+ [1][0][RTW89_MKK][1][25] = 42, -+ [1][0][RTW89_MKK][0][25] = 2, -+ [1][0][RTW89_IC][1][25] = -4, -+ [1][0][RTW89_KCC][1][25] = -2, -+ [1][0][RTW89_KCC][0][25] = -2, -+ [1][0][RTW89_ACMA][1][25] = 46, -+ [1][0][RTW89_ACMA][0][25] = 6, -+ [1][0][RTW89_CHILE][1][25] = -4, -+ [1][0][RTW89_QATAR][1][25] = 46, -+ [1][0][RTW89_QATAR][0][25] = 6, -+ [1][0][RTW89_UK][1][25] = 46, -+ [1][0][RTW89_UK][0][25] = 6, -+ [1][0][RTW89_FCC][1][27] = -4, -+ [1][0][RTW89_FCC][2][27] = 66, -+ [1][0][RTW89_ETSI][1][27] = 46, -+ [1][0][RTW89_ETSI][0][27] = 6, -+ [1][0][RTW89_MKK][1][27] = 42, -+ [1][0][RTW89_MKK][0][27] = 2, -+ [1][0][RTW89_IC][1][27] = -4, -+ [1][0][RTW89_KCC][1][27] = -2, -+ [1][0][RTW89_KCC][0][27] = -2, -+ [1][0][RTW89_ACMA][1][27] = 46, -+ [1][0][RTW89_ACMA][0][27] = 6, -+ [1][0][RTW89_CHILE][1][27] = -4, -+ [1][0][RTW89_QATAR][1][27] = 46, -+ [1][0][RTW89_QATAR][0][27] = 6, -+ [1][0][RTW89_UK][1][27] = 46, -+ [1][0][RTW89_UK][0][27] = 6, -+ [1][0][RTW89_FCC][1][29] = -4, -+ [1][0][RTW89_FCC][2][29] = 66, -+ [1][0][RTW89_ETSI][1][29] = 46, -+ [1][0][RTW89_ETSI][0][29] = 6, -+ [1][0][RTW89_MKK][1][29] = 42, -+ [1][0][RTW89_MKK][0][29] = 2, -+ [1][0][RTW89_IC][1][29] = -4, -+ [1][0][RTW89_KCC][1][29] = -2, -+ [1][0][RTW89_KCC][0][29] = -2, -+ [1][0][RTW89_ACMA][1][29] = 46, -+ [1][0][RTW89_ACMA][0][29] = 6, -+ [1][0][RTW89_CHILE][1][29] = -4, -+ [1][0][RTW89_QATAR][1][29] = 46, -+ [1][0][RTW89_QATAR][0][29] = 6, -+ [1][0][RTW89_UK][1][29] = 46, -+ [1][0][RTW89_UK][0][29] = 6, -+ [1][0][RTW89_FCC][1][30] = -4, -+ [1][0][RTW89_FCC][2][30] = 66, -+ [1][0][RTW89_ETSI][1][30] = 46, -+ [1][0][RTW89_ETSI][0][30] = 6, -+ [1][0][RTW89_MKK][1][30] = 42, -+ [1][0][RTW89_MKK][0][30] = 2, -+ [1][0][RTW89_IC][1][30] = -4, -+ [1][0][RTW89_KCC][1][30] = -2, -+ [1][0][RTW89_KCC][0][30] = -2, -+ [1][0][RTW89_ACMA][1][30] = 46, -+ [1][0][RTW89_ACMA][0][30] = 6, -+ [1][0][RTW89_CHILE][1][30] = -4, -+ [1][0][RTW89_QATAR][1][30] = 46, -+ [1][0][RTW89_QATAR][0][30] = 6, -+ [1][0][RTW89_UK][1][30] = 46, -+ [1][0][RTW89_UK][0][30] = 6, -+ [1][0][RTW89_FCC][1][32] = -4, -+ [1][0][RTW89_FCC][2][32] = 66, -+ [1][0][RTW89_ETSI][1][32] = 46, -+ [1][0][RTW89_ETSI][0][32] = 6, -+ [1][0][RTW89_MKK][1][32] = 42, -+ [1][0][RTW89_MKK][0][32] = 2, -+ [1][0][RTW89_IC][1][32] = -4, -+ [1][0][RTW89_KCC][1][32] = -2, -+ [1][0][RTW89_KCC][0][32] = -2, -+ [1][0][RTW89_ACMA][1][32] = 46, -+ [1][0][RTW89_ACMA][0][32] = 6, -+ [1][0][RTW89_CHILE][1][32] = -4, -+ [1][0][RTW89_QATAR][1][32] = 46, -+ [1][0][RTW89_QATAR][0][32] = 6, -+ [1][0][RTW89_UK][1][32] = 46, -+ [1][0][RTW89_UK][0][32] = 6, -+ [1][0][RTW89_FCC][1][34] = -4, -+ [1][0][RTW89_FCC][2][34] = 66, -+ [1][0][RTW89_ETSI][1][34] = 46, -+ [1][0][RTW89_ETSI][0][34] = 6, -+ [1][0][RTW89_MKK][1][34] = 42, -+ [1][0][RTW89_MKK][0][34] = 2, -+ [1][0][RTW89_IC][1][34] = -4, -+ [1][0][RTW89_KCC][1][34] = -2, -+ [1][0][RTW89_KCC][0][34] = -2, -+ [1][0][RTW89_ACMA][1][34] = 46, -+ [1][0][RTW89_ACMA][0][34] = 6, -+ [1][0][RTW89_CHILE][1][34] = -4, -+ [1][0][RTW89_QATAR][1][34] = 46, -+ [1][0][RTW89_QATAR][0][34] = 6, -+ [1][0][RTW89_UK][1][34] = 46, -+ [1][0][RTW89_UK][0][34] = 6, -+ [1][0][RTW89_FCC][1][36] = -4, -+ [1][0][RTW89_FCC][2][36] = 66, -+ [1][0][RTW89_ETSI][1][36] = 46, -+ [1][0][RTW89_ETSI][0][36] = 6, -+ [1][0][RTW89_MKK][1][36] = 42, -+ [1][0][RTW89_MKK][0][36] = 2, -+ [1][0][RTW89_IC][1][36] = -4, -+ [1][0][RTW89_KCC][1][36] = -2, -+ [1][0][RTW89_KCC][0][36] = -2, -+ [1][0][RTW89_ACMA][1][36] = 46, -+ [1][0][RTW89_ACMA][0][36] = 6, -+ [1][0][RTW89_CHILE][1][36] = -4, -+ [1][0][RTW89_QATAR][1][36] = 46, -+ [1][0][RTW89_QATAR][0][36] = 6, -+ [1][0][RTW89_UK][1][36] = 46, -+ [1][0][RTW89_UK][0][36] = 6, -+ [1][0][RTW89_FCC][1][38] = -4, -+ [1][0][RTW89_FCC][2][38] = 66, -+ [1][0][RTW89_ETSI][1][38] = 46, -+ [1][0][RTW89_ETSI][0][38] = 6, -+ [1][0][RTW89_MKK][1][38] = 42, -+ [1][0][RTW89_MKK][0][38] = 2, -+ [1][0][RTW89_IC][1][38] = -4, -+ [1][0][RTW89_KCC][1][38] = -2, -+ [1][0][RTW89_KCC][0][38] = -2, -+ [1][0][RTW89_ACMA][1][38] = 46, -+ [1][0][RTW89_ACMA][0][38] = 6, -+ [1][0][RTW89_CHILE][1][38] = -4, -+ [1][0][RTW89_QATAR][1][38] = 46, -+ [1][0][RTW89_QATAR][0][38] = 6, -+ [1][0][RTW89_UK][1][38] = 46, -+ [1][0][RTW89_UK][0][38] = 6, -+ [1][0][RTW89_FCC][1][40] = -4, -+ [1][0][RTW89_FCC][2][40] = 66, -+ [1][0][RTW89_ETSI][1][40] = 46, -+ [1][0][RTW89_ETSI][0][40] = 6, -+ [1][0][RTW89_MKK][1][40] = 42, -+ [1][0][RTW89_MKK][0][40] = 2, -+ [1][0][RTW89_IC][1][40] = -4, -+ [1][0][RTW89_KCC][1][40] = -2, -+ [1][0][RTW89_KCC][0][40] = -2, -+ [1][0][RTW89_ACMA][1][40] = 46, -+ [1][0][RTW89_ACMA][0][40] = 6, -+ [1][0][RTW89_CHILE][1][40] = -4, -+ [1][0][RTW89_QATAR][1][40] = 46, -+ [1][0][RTW89_QATAR][0][40] = 6, -+ [1][0][RTW89_UK][1][40] = 46, -+ [1][0][RTW89_UK][0][40] = 6, -+ [1][0][RTW89_FCC][1][42] = -4, -+ [1][0][RTW89_FCC][2][42] = 66, -+ [1][0][RTW89_ETSI][1][42] = 46, -+ [1][0][RTW89_ETSI][0][42] = 6, -+ [1][0][RTW89_MKK][1][42] = 42, -+ [1][0][RTW89_MKK][0][42] = 2, -+ [1][0][RTW89_IC][1][42] = -4, -+ [1][0][RTW89_KCC][1][42] = -2, -+ [1][0][RTW89_KCC][0][42] = -2, -+ [1][0][RTW89_ACMA][1][42] = 46, -+ [1][0][RTW89_ACMA][0][42] = 6, -+ [1][0][RTW89_CHILE][1][42] = -4, -+ [1][0][RTW89_QATAR][1][42] = 46, -+ [1][0][RTW89_QATAR][0][42] = 6, -+ [1][0][RTW89_UK][1][42] = 46, -+ [1][0][RTW89_UK][0][42] = 6, -+ [1][0][RTW89_FCC][1][44] = -4, -+ [1][0][RTW89_FCC][2][44] = 66, -+ [1][0][RTW89_ETSI][1][44] = 46, -+ [1][0][RTW89_ETSI][0][44] = 8, -+ [1][0][RTW89_MKK][1][44] = 22, -+ [1][0][RTW89_MKK][0][44] = 4, -+ [1][0][RTW89_IC][1][44] = -4, -+ [1][0][RTW89_KCC][1][44] = -2, -+ [1][0][RTW89_KCC][0][44] = -2, -+ [1][0][RTW89_ACMA][1][44] = 46, -+ [1][0][RTW89_ACMA][0][44] = 8, -+ [1][0][RTW89_CHILE][1][44] = -4, -+ [1][0][RTW89_QATAR][1][44] = 46, -+ [1][0][RTW89_QATAR][0][44] = 8, -+ [1][0][RTW89_UK][1][44] = 46, -+ [1][0][RTW89_UK][0][44] = 8, -+ [1][0][RTW89_FCC][1][45] = -4, -+ [1][0][RTW89_FCC][2][45] = 127, -+ [1][0][RTW89_ETSI][1][45] = 127, -+ [1][0][RTW89_ETSI][0][45] = 127, -+ [1][0][RTW89_MKK][1][45] = 127, -+ [1][0][RTW89_MKK][0][45] = 127, -+ [1][0][RTW89_IC][1][45] = -4, -+ [1][0][RTW89_KCC][1][45] = -2, -+ [1][0][RTW89_KCC][0][45] = 127, -+ [1][0][RTW89_ACMA][1][45] = 127, -+ [1][0][RTW89_ACMA][0][45] = 127, -+ [1][0][RTW89_CHILE][1][45] = 127, -+ [1][0][RTW89_QATAR][1][45] = 127, -+ [1][0][RTW89_QATAR][0][45] = 127, -+ [1][0][RTW89_UK][1][45] = 127, -+ [1][0][RTW89_UK][0][45] = 127, -+ [1][0][RTW89_FCC][1][47] = -4, -+ [1][0][RTW89_FCC][2][47] = 127, -+ [1][0][RTW89_ETSI][1][47] = 127, -+ [1][0][RTW89_ETSI][0][47] = 127, -+ [1][0][RTW89_MKK][1][47] = 127, -+ [1][0][RTW89_MKK][0][47] = 127, -+ [1][0][RTW89_IC][1][47] = -4, -+ [1][0][RTW89_KCC][1][47] = -2, -+ [1][0][RTW89_KCC][0][47] = 127, -+ [1][0][RTW89_ACMA][1][47] = 127, -+ [1][0][RTW89_ACMA][0][47] = 127, -+ [1][0][RTW89_CHILE][1][47] = 127, -+ [1][0][RTW89_QATAR][1][47] = 127, -+ [1][0][RTW89_QATAR][0][47] = 127, -+ [1][0][RTW89_UK][1][47] = 127, -+ [1][0][RTW89_UK][0][47] = 127, -+ [1][0][RTW89_FCC][1][49] = -4, -+ [1][0][RTW89_FCC][2][49] = 127, -+ [1][0][RTW89_ETSI][1][49] = 127, -+ [1][0][RTW89_ETSI][0][49] = 127, -+ [1][0][RTW89_MKK][1][49] = 127, -+ [1][0][RTW89_MKK][0][49] = 127, -+ [1][0][RTW89_IC][1][49] = -4, -+ [1][0][RTW89_KCC][1][49] = -2, -+ [1][0][RTW89_KCC][0][49] = 127, -+ [1][0][RTW89_ACMA][1][49] = 127, -+ [1][0][RTW89_ACMA][0][49] = 127, -+ [1][0][RTW89_CHILE][1][49] = 127, -+ [1][0][RTW89_QATAR][1][49] = 127, -+ [1][0][RTW89_QATAR][0][49] = 127, -+ [1][0][RTW89_UK][1][49] = 127, -+ [1][0][RTW89_UK][0][49] = 127, -+ [1][0][RTW89_FCC][1][51] = -4, -+ [1][0][RTW89_FCC][2][51] = 127, -+ [1][0][RTW89_ETSI][1][51] = 127, -+ [1][0][RTW89_ETSI][0][51] = 127, -+ [1][0][RTW89_MKK][1][51] = 127, -+ [1][0][RTW89_MKK][0][51] = 127, -+ [1][0][RTW89_IC][1][51] = -4, -+ [1][0][RTW89_KCC][1][51] = -2, -+ [1][0][RTW89_KCC][0][51] = 127, -+ [1][0][RTW89_ACMA][1][51] = 127, -+ [1][0][RTW89_ACMA][0][51] = 127, -+ [1][0][RTW89_CHILE][1][51] = 127, -+ [1][0][RTW89_QATAR][1][51] = 127, -+ [1][0][RTW89_QATAR][0][51] = 127, -+ [1][0][RTW89_UK][1][51] = 127, -+ [1][0][RTW89_UK][0][51] = 127, -+ [1][0][RTW89_FCC][1][53] = -4, -+ [1][0][RTW89_FCC][2][53] = 127, -+ [1][0][RTW89_ETSI][1][53] = 127, -+ [1][0][RTW89_ETSI][0][53] = 127, -+ [1][0][RTW89_MKK][1][53] = 127, -+ [1][0][RTW89_MKK][0][53] = 127, -+ [1][0][RTW89_IC][1][53] = -4, -+ [1][0][RTW89_KCC][1][53] = -2, -+ [1][0][RTW89_KCC][0][53] = 127, -+ [1][0][RTW89_ACMA][1][53] = 127, -+ [1][0][RTW89_ACMA][0][53] = 127, -+ [1][0][RTW89_CHILE][1][53] = 127, -+ [1][0][RTW89_QATAR][1][53] = 127, -+ [1][0][RTW89_QATAR][0][53] = 127, -+ [1][0][RTW89_UK][1][53] = 127, -+ [1][0][RTW89_UK][0][53] = 127, -+ [1][0][RTW89_FCC][1][55] = -4, -+ [1][0][RTW89_FCC][2][55] = 68, -+ [1][0][RTW89_ETSI][1][55] = 127, -+ [1][0][RTW89_ETSI][0][55] = 127, -+ [1][0][RTW89_MKK][1][55] = 127, -+ [1][0][RTW89_MKK][0][55] = 127, -+ [1][0][RTW89_IC][1][55] = -4, -+ [1][0][RTW89_KCC][1][55] = -2, -+ [1][0][RTW89_KCC][0][55] = 127, -+ [1][0][RTW89_ACMA][1][55] = 127, -+ [1][0][RTW89_ACMA][0][55] = 127, -+ [1][0][RTW89_CHILE][1][55] = 127, -+ [1][0][RTW89_QATAR][1][55] = 127, -+ [1][0][RTW89_QATAR][0][55] = 127, -+ [1][0][RTW89_UK][1][55] = 127, -+ [1][0][RTW89_UK][0][55] = 127, -+ [1][0][RTW89_FCC][1][57] = -4, -+ [1][0][RTW89_FCC][2][57] = 68, -+ [1][0][RTW89_ETSI][1][57] = 127, -+ [1][0][RTW89_ETSI][0][57] = 127, -+ [1][0][RTW89_MKK][1][57] = 127, -+ [1][0][RTW89_MKK][0][57] = 127, -+ [1][0][RTW89_IC][1][57] = -4, -+ [1][0][RTW89_KCC][1][57] = -2, -+ [1][0][RTW89_KCC][0][57] = 127, -+ [1][0][RTW89_ACMA][1][57] = 127, -+ [1][0][RTW89_ACMA][0][57] = 127, -+ [1][0][RTW89_CHILE][1][57] = 127, -+ [1][0][RTW89_QATAR][1][57] = 127, -+ [1][0][RTW89_QATAR][0][57] = 127, -+ [1][0][RTW89_UK][1][57] = 127, -+ [1][0][RTW89_UK][0][57] = 127, -+ [1][0][RTW89_FCC][1][59] = -4, -+ [1][0][RTW89_FCC][2][59] = 68, -+ [1][0][RTW89_ETSI][1][59] = 127, -+ [1][0][RTW89_ETSI][0][59] = 127, -+ [1][0][RTW89_MKK][1][59] = 127, -+ [1][0][RTW89_MKK][0][59] = 127, -+ [1][0][RTW89_IC][1][59] = -4, -+ [1][0][RTW89_KCC][1][59] = -2, -+ [1][0][RTW89_KCC][0][59] = 127, -+ [1][0][RTW89_ACMA][1][59] = 127, -+ [1][0][RTW89_ACMA][0][59] = 127, -+ [1][0][RTW89_CHILE][1][59] = 127, -+ [1][0][RTW89_QATAR][1][59] = 127, -+ [1][0][RTW89_QATAR][0][59] = 127, -+ [1][0][RTW89_UK][1][59] = 127, -+ [1][0][RTW89_UK][0][59] = 127, -+ [1][0][RTW89_FCC][1][60] = -4, -+ [1][0][RTW89_FCC][2][60] = 68, -+ [1][0][RTW89_ETSI][1][60] = 127, -+ [1][0][RTW89_ETSI][0][60] = 127, -+ [1][0][RTW89_MKK][1][60] = 127, -+ [1][0][RTW89_MKK][0][60] = 127, -+ [1][0][RTW89_IC][1][60] = -4, -+ [1][0][RTW89_KCC][1][60] = -2, -+ [1][0][RTW89_KCC][0][60] = 127, -+ [1][0][RTW89_ACMA][1][60] = 127, -+ [1][0][RTW89_ACMA][0][60] = 127, -+ [1][0][RTW89_CHILE][1][60] = 127, -+ [1][0][RTW89_QATAR][1][60] = 127, -+ [1][0][RTW89_QATAR][0][60] = 127, -+ [1][0][RTW89_UK][1][60] = 127, -+ [1][0][RTW89_UK][0][60] = 127, -+ [1][0][RTW89_FCC][1][62] = -4, -+ [1][0][RTW89_FCC][2][62] = 68, -+ [1][0][RTW89_ETSI][1][62] = 127, -+ [1][0][RTW89_ETSI][0][62] = 127, -+ [1][0][RTW89_MKK][1][62] = 127, -+ [1][0][RTW89_MKK][0][62] = 127, -+ [1][0][RTW89_IC][1][62] = -4, -+ [1][0][RTW89_KCC][1][62] = -2, -+ [1][0][RTW89_KCC][0][62] = 127, -+ [1][0][RTW89_ACMA][1][62] = 127, -+ [1][0][RTW89_ACMA][0][62] = 127, -+ [1][0][RTW89_CHILE][1][62] = 127, -+ [1][0][RTW89_QATAR][1][62] = 127, -+ [1][0][RTW89_QATAR][0][62] = 127, -+ [1][0][RTW89_UK][1][62] = 127, -+ [1][0][RTW89_UK][0][62] = 127, -+ [1][0][RTW89_FCC][1][64] = -4, -+ [1][0][RTW89_FCC][2][64] = 68, -+ [1][0][RTW89_ETSI][1][64] = 127, -+ [1][0][RTW89_ETSI][0][64] = 127, -+ [1][0][RTW89_MKK][1][64] = 127, -+ [1][0][RTW89_MKK][0][64] = 127, -+ [1][0][RTW89_IC][1][64] = -4, -+ [1][0][RTW89_KCC][1][64] = -2, -+ [1][0][RTW89_KCC][0][64] = 127, -+ [1][0][RTW89_ACMA][1][64] = 127, -+ [1][0][RTW89_ACMA][0][64] = 127, -+ [1][0][RTW89_CHILE][1][64] = 127, -+ [1][0][RTW89_QATAR][1][64] = 127, -+ [1][0][RTW89_QATAR][0][64] = 127, -+ [1][0][RTW89_UK][1][64] = 127, -+ [1][0][RTW89_UK][0][64] = 127, -+ [1][0][RTW89_FCC][1][66] = -4, -+ [1][0][RTW89_FCC][2][66] = 68, -+ [1][0][RTW89_ETSI][1][66] = 127, -+ [1][0][RTW89_ETSI][0][66] = 127, -+ [1][0][RTW89_MKK][1][66] = 127, -+ [1][0][RTW89_MKK][0][66] = 127, -+ [1][0][RTW89_IC][1][66] = -4, -+ [1][0][RTW89_KCC][1][66] = -2, -+ [1][0][RTW89_KCC][0][66] = 127, -+ [1][0][RTW89_ACMA][1][66] = 127, -+ [1][0][RTW89_ACMA][0][66] = 127, -+ [1][0][RTW89_CHILE][1][66] = 127, -+ [1][0][RTW89_QATAR][1][66] = 127, -+ [1][0][RTW89_QATAR][0][66] = 127, -+ [1][0][RTW89_UK][1][66] = 127, -+ [1][0][RTW89_UK][0][66] = 127, -+ [1][0][RTW89_FCC][1][68] = -4, -+ [1][0][RTW89_FCC][2][68] = 68, -+ [1][0][RTW89_ETSI][1][68] = 127, -+ [1][0][RTW89_ETSI][0][68] = 127, -+ [1][0][RTW89_MKK][1][68] = 127, -+ [1][0][RTW89_MKK][0][68] = 127, -+ [1][0][RTW89_IC][1][68] = -4, -+ [1][0][RTW89_KCC][1][68] = -2, -+ [1][0][RTW89_KCC][0][68] = 127, -+ [1][0][RTW89_ACMA][1][68] = 127, -+ [1][0][RTW89_ACMA][0][68] = 127, -+ [1][0][RTW89_CHILE][1][68] = 127, -+ [1][0][RTW89_QATAR][1][68] = 127, -+ [1][0][RTW89_QATAR][0][68] = 127, -+ [1][0][RTW89_UK][1][68] = 127, -+ [1][0][RTW89_UK][0][68] = 127, -+ [1][0][RTW89_FCC][1][70] = -4, -+ [1][0][RTW89_FCC][2][70] = 68, -+ [1][0][RTW89_ETSI][1][70] = 127, -+ [1][0][RTW89_ETSI][0][70] = 127, -+ [1][0][RTW89_MKK][1][70] = 127, -+ [1][0][RTW89_MKK][0][70] = 127, -+ [1][0][RTW89_IC][1][70] = -4, -+ [1][0][RTW89_KCC][1][70] = -2, -+ [1][0][RTW89_KCC][0][70] = 127, -+ [1][0][RTW89_ACMA][1][70] = 127, -+ [1][0][RTW89_ACMA][0][70] = 127, -+ [1][0][RTW89_CHILE][1][70] = 127, -+ [1][0][RTW89_QATAR][1][70] = 127, -+ [1][0][RTW89_QATAR][0][70] = 127, -+ [1][0][RTW89_UK][1][70] = 127, -+ [1][0][RTW89_UK][0][70] = 127, -+ [1][0][RTW89_FCC][1][72] = -4, -+ [1][0][RTW89_FCC][2][72] = 68, -+ [1][0][RTW89_ETSI][1][72] = 127, -+ [1][0][RTW89_ETSI][0][72] = 127, -+ [1][0][RTW89_MKK][1][72] = 127, -+ [1][0][RTW89_MKK][0][72] = 127, -+ [1][0][RTW89_IC][1][72] = -4, -+ [1][0][RTW89_KCC][1][72] = -2, -+ [1][0][RTW89_KCC][0][72] = 127, -+ [1][0][RTW89_ACMA][1][72] = 127, -+ [1][0][RTW89_ACMA][0][72] = 127, -+ [1][0][RTW89_CHILE][1][72] = 127, -+ [1][0][RTW89_QATAR][1][72] = 127, -+ [1][0][RTW89_QATAR][0][72] = 127, -+ [1][0][RTW89_UK][1][72] = 127, -+ [1][0][RTW89_UK][0][72] = 127, -+ [1][0][RTW89_FCC][1][74] = -4, -+ [1][0][RTW89_FCC][2][74] = 68, -+ [1][0][RTW89_ETSI][1][74] = 127, -+ [1][0][RTW89_ETSI][0][74] = 127, -+ [1][0][RTW89_MKK][1][74] = 127, -+ [1][0][RTW89_MKK][0][74] = 127, -+ [1][0][RTW89_IC][1][74] = -4, -+ [1][0][RTW89_KCC][1][74] = -2, -+ [1][0][RTW89_KCC][0][74] = 127, -+ [1][0][RTW89_ACMA][1][74] = 127, -+ [1][0][RTW89_ACMA][0][74] = 127, -+ [1][0][RTW89_CHILE][1][74] = 127, -+ [1][0][RTW89_QATAR][1][74] = 127, -+ [1][0][RTW89_QATAR][0][74] = 127, -+ [1][0][RTW89_UK][1][74] = 127, -+ [1][0][RTW89_UK][0][74] = 127, -+ [1][0][RTW89_FCC][1][75] = -4, -+ [1][0][RTW89_FCC][2][75] = 68, -+ [1][0][RTW89_ETSI][1][75] = 127, -+ [1][0][RTW89_ETSI][0][75] = 127, -+ [1][0][RTW89_MKK][1][75] = 127, -+ [1][0][RTW89_MKK][0][75] = 127, -+ [1][0][RTW89_IC][1][75] = -4, -+ [1][0][RTW89_KCC][1][75] = -2, -+ [1][0][RTW89_KCC][0][75] = 127, -+ [1][0][RTW89_ACMA][1][75] = 127, -+ [1][0][RTW89_ACMA][0][75] = 127, -+ [1][0][RTW89_CHILE][1][75] = 127, -+ [1][0][RTW89_QATAR][1][75] = 127, -+ [1][0][RTW89_QATAR][0][75] = 127, -+ [1][0][RTW89_UK][1][75] = 127, -+ [1][0][RTW89_UK][0][75] = 127, -+ [1][0][RTW89_FCC][1][77] = -4, -+ [1][0][RTW89_FCC][2][77] = 68, -+ [1][0][RTW89_ETSI][1][77] = 127, -+ [1][0][RTW89_ETSI][0][77] = 127, -+ [1][0][RTW89_MKK][1][77] = 127, -+ [1][0][RTW89_MKK][0][77] = 127, -+ [1][0][RTW89_IC][1][77] = -4, -+ [1][0][RTW89_KCC][1][77] = -2, -+ [1][0][RTW89_KCC][0][77] = 127, -+ [1][0][RTW89_ACMA][1][77] = 127, -+ [1][0][RTW89_ACMA][0][77] = 127, -+ [1][0][RTW89_CHILE][1][77] = 127, -+ [1][0][RTW89_QATAR][1][77] = 127, -+ [1][0][RTW89_QATAR][0][77] = 127, -+ [1][0][RTW89_UK][1][77] = 127, -+ [1][0][RTW89_UK][0][77] = 127, -+ [1][0][RTW89_FCC][1][79] = -4, -+ [1][0][RTW89_FCC][2][79] = 68, -+ [1][0][RTW89_ETSI][1][79] = 127, -+ [1][0][RTW89_ETSI][0][79] = 127, -+ [1][0][RTW89_MKK][1][79] = 127, -+ [1][0][RTW89_MKK][0][79] = 127, -+ [1][0][RTW89_IC][1][79] = -4, -+ [1][0][RTW89_KCC][1][79] = -2, -+ [1][0][RTW89_KCC][0][79] = 127, -+ [1][0][RTW89_ACMA][1][79] = 127, -+ [1][0][RTW89_ACMA][0][79] = 127, -+ [1][0][RTW89_CHILE][1][79] = 127, -+ [1][0][RTW89_QATAR][1][79] = 127, -+ [1][0][RTW89_QATAR][0][79] = 127, -+ [1][0][RTW89_UK][1][79] = 127, -+ [1][0][RTW89_UK][0][79] = 127, -+ [1][0][RTW89_FCC][1][81] = -4, -+ [1][0][RTW89_FCC][2][81] = 68, -+ [1][0][RTW89_ETSI][1][81] = 127, -+ [1][0][RTW89_ETSI][0][81] = 127, -+ [1][0][RTW89_MKK][1][81] = 127, -+ [1][0][RTW89_MKK][0][81] = 127, -+ [1][0][RTW89_IC][1][81] = -4, -+ [1][0][RTW89_KCC][1][81] = -2, -+ [1][0][RTW89_KCC][0][81] = 127, -+ [1][0][RTW89_ACMA][1][81] = 127, -+ [1][0][RTW89_ACMA][0][81] = 127, -+ [1][0][RTW89_CHILE][1][81] = 127, -+ [1][0][RTW89_QATAR][1][81] = 127, -+ [1][0][RTW89_QATAR][0][81] = 127, -+ [1][0][RTW89_UK][1][81] = 127, -+ [1][0][RTW89_UK][0][81] = 127, -+ [1][0][RTW89_FCC][1][83] = -4, -+ [1][0][RTW89_FCC][2][83] = 68, -+ [1][0][RTW89_ETSI][1][83] = 127, -+ [1][0][RTW89_ETSI][0][83] = 127, -+ [1][0][RTW89_MKK][1][83] = 127, -+ [1][0][RTW89_MKK][0][83] = 127, -+ [1][0][RTW89_IC][1][83] = -4, -+ [1][0][RTW89_KCC][1][83] = -2, -+ [1][0][RTW89_KCC][0][83] = 127, -+ [1][0][RTW89_ACMA][1][83] = 127, -+ [1][0][RTW89_ACMA][0][83] = 127, -+ [1][0][RTW89_CHILE][1][83] = 127, -+ [1][0][RTW89_QATAR][1][83] = 127, -+ [1][0][RTW89_QATAR][0][83] = 127, -+ [1][0][RTW89_UK][1][83] = 127, -+ [1][0][RTW89_UK][0][83] = 127, -+ [1][0][RTW89_FCC][1][85] = -4, -+ [1][0][RTW89_FCC][2][85] = 68, -+ [1][0][RTW89_ETSI][1][85] = 127, -+ [1][0][RTW89_ETSI][0][85] = 127, -+ [1][0][RTW89_MKK][1][85] = 127, -+ [1][0][RTW89_MKK][0][85] = 127, -+ [1][0][RTW89_IC][1][85] = -4, -+ [1][0][RTW89_KCC][1][85] = -2, -+ [1][0][RTW89_KCC][0][85] = 127, -+ [1][0][RTW89_ACMA][1][85] = 127, -+ [1][0][RTW89_ACMA][0][85] = 127, -+ [1][0][RTW89_CHILE][1][85] = 127, -+ [1][0][RTW89_QATAR][1][85] = 127, -+ [1][0][RTW89_QATAR][0][85] = 127, -+ [1][0][RTW89_UK][1][85] = 127, -+ [1][0][RTW89_UK][0][85] = 127, -+ [1][0][RTW89_FCC][1][87] = -4, -+ [1][0][RTW89_FCC][2][87] = 127, -+ [1][0][RTW89_ETSI][1][87] = 127, -+ [1][0][RTW89_ETSI][0][87] = 127, -+ [1][0][RTW89_MKK][1][87] = 127, -+ [1][0][RTW89_MKK][0][87] = 127, -+ [1][0][RTW89_IC][1][87] = -4, -+ [1][0][RTW89_KCC][1][87] = -2, -+ [1][0][RTW89_KCC][0][87] = 127, -+ [1][0][RTW89_ACMA][1][87] = 127, -+ [1][0][RTW89_ACMA][0][87] = 127, -+ [1][0][RTW89_CHILE][1][87] = 127, -+ [1][0][RTW89_QATAR][1][87] = 127, -+ [1][0][RTW89_QATAR][0][87] = 127, -+ [1][0][RTW89_UK][1][87] = 127, -+ [1][0][RTW89_UK][0][87] = 127, -+ [1][0][RTW89_FCC][1][89] = -4, -+ [1][0][RTW89_FCC][2][89] = 127, -+ [1][0][RTW89_ETSI][1][89] = 127, -+ [1][0][RTW89_ETSI][0][89] = 127, -+ [1][0][RTW89_MKK][1][89] = 127, -+ [1][0][RTW89_MKK][0][89] = 127, -+ [1][0][RTW89_IC][1][89] = -4, -+ [1][0][RTW89_KCC][1][89] = -2, -+ [1][0][RTW89_KCC][0][89] = 127, -+ [1][0][RTW89_ACMA][1][89] = 127, -+ [1][0][RTW89_ACMA][0][89] = 127, -+ [1][0][RTW89_CHILE][1][89] = 127, -+ [1][0][RTW89_QATAR][1][89] = 127, -+ [1][0][RTW89_QATAR][0][89] = 127, -+ [1][0][RTW89_UK][1][89] = 127, -+ [1][0][RTW89_UK][0][89] = 127, -+ [1][0][RTW89_FCC][1][90] = -4, -+ [1][0][RTW89_FCC][2][90] = 127, -+ [1][0][RTW89_ETSI][1][90] = 127, -+ [1][0][RTW89_ETSI][0][90] = 127, -+ [1][0][RTW89_MKK][1][90] = 127, -+ [1][0][RTW89_MKK][0][90] = 127, -+ [1][0][RTW89_IC][1][90] = -4, -+ [1][0][RTW89_KCC][1][90] = -2, -+ [1][0][RTW89_KCC][0][90] = 127, -+ [1][0][RTW89_ACMA][1][90] = 127, -+ [1][0][RTW89_ACMA][0][90] = 127, -+ [1][0][RTW89_CHILE][1][90] = 127, -+ [1][0][RTW89_QATAR][1][90] = 127, -+ [1][0][RTW89_QATAR][0][90] = 127, -+ [1][0][RTW89_UK][1][90] = 127, -+ [1][0][RTW89_UK][0][90] = 127, -+ [1][0][RTW89_FCC][1][92] = -4, -+ [1][0][RTW89_FCC][2][92] = 127, -+ [1][0][RTW89_ETSI][1][92] = 127, -+ [1][0][RTW89_ETSI][0][92] = 127, -+ [1][0][RTW89_MKK][1][92] = 127, -+ [1][0][RTW89_MKK][0][92] = 127, -+ [1][0][RTW89_IC][1][92] = -4, -+ [1][0][RTW89_KCC][1][92] = -2, -+ [1][0][RTW89_KCC][0][92] = 127, -+ [1][0][RTW89_ACMA][1][92] = 127, -+ [1][0][RTW89_ACMA][0][92] = 127, -+ [1][0][RTW89_CHILE][1][92] = 127, -+ [1][0][RTW89_QATAR][1][92] = 127, -+ [1][0][RTW89_QATAR][0][92] = 127, -+ [1][0][RTW89_UK][1][92] = 127, -+ [1][0][RTW89_UK][0][92] = 127, -+ [1][0][RTW89_FCC][1][94] = -4, -+ [1][0][RTW89_FCC][2][94] = 127, -+ [1][0][RTW89_ETSI][1][94] = 127, -+ [1][0][RTW89_ETSI][0][94] = 127, -+ [1][0][RTW89_MKK][1][94] = 127, -+ [1][0][RTW89_MKK][0][94] = 127, -+ [1][0][RTW89_IC][1][94] = -4, -+ [1][0][RTW89_KCC][1][94] = -2, -+ [1][0][RTW89_KCC][0][94] = 127, -+ [1][0][RTW89_ACMA][1][94] = 127, -+ [1][0][RTW89_ACMA][0][94] = 127, -+ [1][0][RTW89_CHILE][1][94] = 127, -+ [1][0][RTW89_QATAR][1][94] = 127, -+ [1][0][RTW89_QATAR][0][94] = 127, -+ [1][0][RTW89_UK][1][94] = 127, -+ [1][0][RTW89_UK][0][94] = 127, -+ [1][0][RTW89_FCC][1][96] = -4, -+ [1][0][RTW89_FCC][2][96] = 127, -+ [1][0][RTW89_ETSI][1][96] = 127, -+ [1][0][RTW89_ETSI][0][96] = 127, -+ [1][0][RTW89_MKK][1][96] = 127, -+ [1][0][RTW89_MKK][0][96] = 127, -+ [1][0][RTW89_IC][1][96] = -4, -+ [1][0][RTW89_KCC][1][96] = -2, -+ [1][0][RTW89_KCC][0][96] = 127, -+ [1][0][RTW89_ACMA][1][96] = 127, -+ [1][0][RTW89_ACMA][0][96] = 127, -+ [1][0][RTW89_CHILE][1][96] = 127, -+ [1][0][RTW89_QATAR][1][96] = 127, -+ [1][0][RTW89_QATAR][0][96] = 127, -+ [1][0][RTW89_UK][1][96] = 127, -+ [1][0][RTW89_UK][0][96] = 127, -+ [1][0][RTW89_FCC][1][98] = -4, -+ [1][0][RTW89_FCC][2][98] = 127, -+ [1][0][RTW89_ETSI][1][98] = 127, -+ [1][0][RTW89_ETSI][0][98] = 127, -+ [1][0][RTW89_MKK][1][98] = 127, -+ [1][0][RTW89_MKK][0][98] = 127, -+ [1][0][RTW89_IC][1][98] = -4, -+ [1][0][RTW89_KCC][1][98] = -2, -+ [1][0][RTW89_KCC][0][98] = 127, -+ [1][0][RTW89_ACMA][1][98] = 127, -+ [1][0][RTW89_ACMA][0][98] = 127, -+ [1][0][RTW89_CHILE][1][98] = 127, -+ [1][0][RTW89_QATAR][1][98] = 127, -+ [1][0][RTW89_QATAR][0][98] = 127, -+ [1][0][RTW89_UK][1][98] = 127, -+ [1][0][RTW89_UK][0][98] = 127, -+ [1][0][RTW89_FCC][1][100] = -4, -+ [1][0][RTW89_FCC][2][100] = 127, -+ [1][0][RTW89_ETSI][1][100] = 127, -+ [1][0][RTW89_ETSI][0][100] = 127, -+ [1][0][RTW89_MKK][1][100] = 127, -+ [1][0][RTW89_MKK][0][100] = 127, -+ [1][0][RTW89_IC][1][100] = -4, -+ [1][0][RTW89_KCC][1][100] = -2, -+ [1][0][RTW89_KCC][0][100] = 127, -+ [1][0][RTW89_ACMA][1][100] = 127, -+ [1][0][RTW89_ACMA][0][100] = 127, -+ [1][0][RTW89_CHILE][1][100] = 127, -+ [1][0][RTW89_QATAR][1][100] = 127, -+ [1][0][RTW89_QATAR][0][100] = 127, -+ [1][0][RTW89_UK][1][100] = 127, -+ [1][0][RTW89_UK][0][100] = 127, -+ [1][0][RTW89_FCC][1][102] = -4, -+ [1][0][RTW89_FCC][2][102] = 127, -+ [1][0][RTW89_ETSI][1][102] = 127, -+ [1][0][RTW89_ETSI][0][102] = 127, -+ [1][0][RTW89_MKK][1][102] = 127, -+ [1][0][RTW89_MKK][0][102] = 127, -+ [1][0][RTW89_IC][1][102] = -4, -+ [1][0][RTW89_KCC][1][102] = -2, -+ [1][0][RTW89_KCC][0][102] = 127, -+ [1][0][RTW89_ACMA][1][102] = 127, -+ [1][0][RTW89_ACMA][0][102] = 127, -+ [1][0][RTW89_CHILE][1][102] = 127, -+ [1][0][RTW89_QATAR][1][102] = 127, -+ [1][0][RTW89_QATAR][0][102] = 127, -+ [1][0][RTW89_UK][1][102] = 127, -+ [1][0][RTW89_UK][0][102] = 127, -+ [1][0][RTW89_FCC][1][104] = -4, -+ [1][0][RTW89_FCC][2][104] = 127, -+ [1][0][RTW89_ETSI][1][104] = 127, -+ [1][0][RTW89_ETSI][0][104] = 127, -+ [1][0][RTW89_MKK][1][104] = 127, -+ [1][0][RTW89_MKK][0][104] = 127, -+ [1][0][RTW89_IC][1][104] = -4, -+ [1][0][RTW89_KCC][1][104] = -2, -+ [1][0][RTW89_KCC][0][104] = 127, -+ [1][0][RTW89_ACMA][1][104] = 127, -+ [1][0][RTW89_ACMA][0][104] = 127, -+ [1][0][RTW89_CHILE][1][104] = 127, -+ [1][0][RTW89_QATAR][1][104] = 127, -+ [1][0][RTW89_QATAR][0][104] = 127, -+ [1][0][RTW89_UK][1][104] = 127, -+ [1][0][RTW89_UK][0][104] = 127, -+ [1][0][RTW89_FCC][1][105] = -4, -+ [1][0][RTW89_FCC][2][105] = 127, -+ [1][0][RTW89_ETSI][1][105] = 127, -+ [1][0][RTW89_ETSI][0][105] = 127, -+ [1][0][RTW89_MKK][1][105] = 127, -+ [1][0][RTW89_MKK][0][105] = 127, -+ [1][0][RTW89_IC][1][105] = -4, -+ [1][0][RTW89_KCC][1][105] = -2, -+ [1][0][RTW89_KCC][0][105] = 127, -+ [1][0][RTW89_ACMA][1][105] = 127, -+ [1][0][RTW89_ACMA][0][105] = 127, -+ [1][0][RTW89_CHILE][1][105] = 127, -+ [1][0][RTW89_QATAR][1][105] = 127, -+ [1][0][RTW89_QATAR][0][105] = 127, -+ [1][0][RTW89_UK][1][105] = 127, -+ [1][0][RTW89_UK][0][105] = 127, -+ [1][0][RTW89_FCC][1][107] = 1, -+ [1][0][RTW89_FCC][2][107] = 127, -+ [1][0][RTW89_ETSI][1][107] = 127, -+ [1][0][RTW89_ETSI][0][107] = 127, -+ [1][0][RTW89_MKK][1][107] = 127, -+ [1][0][RTW89_MKK][0][107] = 127, -+ [1][0][RTW89_IC][1][107] = 1, -+ [1][0][RTW89_KCC][1][107] = -2, -+ [1][0][RTW89_KCC][0][107] = 127, -+ [1][0][RTW89_ACMA][1][107] = 127, -+ [1][0][RTW89_ACMA][0][107] = 127, -+ [1][0][RTW89_CHILE][1][107] = 127, -+ [1][0][RTW89_QATAR][1][107] = 127, -+ [1][0][RTW89_QATAR][0][107] = 127, -+ [1][0][RTW89_UK][1][107] = 127, -+ [1][0][RTW89_UK][0][107] = 127, -+ [1][0][RTW89_FCC][1][109] = 2, -+ [1][0][RTW89_FCC][2][109] = 127, -+ [1][0][RTW89_ETSI][1][109] = 127, -+ [1][0][RTW89_ETSI][0][109] = 127, -+ [1][0][RTW89_MKK][1][109] = 127, -+ [1][0][RTW89_MKK][0][109] = 127, -+ [1][0][RTW89_IC][1][109] = 2, -+ [1][0][RTW89_KCC][1][109] = 127, -+ [1][0][RTW89_KCC][0][109] = 127, -+ [1][0][RTW89_ACMA][1][109] = 127, -+ [1][0][RTW89_ACMA][0][109] = 127, -+ [1][0][RTW89_CHILE][1][109] = 127, -+ [1][0][RTW89_QATAR][1][109] = 127, -+ [1][0][RTW89_QATAR][0][109] = 127, -+ [1][0][RTW89_UK][1][109] = 127, -+ [1][0][RTW89_UK][0][109] = 127, -+ [1][0][RTW89_FCC][1][111] = 127, -+ [1][0][RTW89_FCC][2][111] = 127, -+ [1][0][RTW89_ETSI][1][111] = 127, -+ [1][0][RTW89_ETSI][0][111] = 127, -+ [1][0][RTW89_MKK][1][111] = 127, -+ [1][0][RTW89_MKK][0][111] = 127, -+ [1][0][RTW89_IC][1][111] = 127, -+ [1][0][RTW89_KCC][1][111] = 127, -+ [1][0][RTW89_KCC][0][111] = 127, -+ [1][0][RTW89_ACMA][1][111] = 127, -+ [1][0][RTW89_ACMA][0][111] = 127, -+ [1][0][RTW89_CHILE][1][111] = 127, -+ [1][0][RTW89_QATAR][1][111] = 127, -+ [1][0][RTW89_QATAR][0][111] = 127, -+ [1][0][RTW89_UK][1][111] = 127, -+ [1][0][RTW89_UK][0][111] = 127, -+ [1][0][RTW89_FCC][1][113] = 127, -+ [1][0][RTW89_FCC][2][113] = 127, -+ [1][0][RTW89_ETSI][1][113] = 127, -+ [1][0][RTW89_ETSI][0][113] = 127, -+ [1][0][RTW89_MKK][1][113] = 127, -+ [1][0][RTW89_MKK][0][113] = 127, -+ [1][0][RTW89_IC][1][113] = 127, -+ [1][0][RTW89_KCC][1][113] = 127, -+ [1][0][RTW89_KCC][0][113] = 127, -+ [1][0][RTW89_ACMA][1][113] = 127, -+ [1][0][RTW89_ACMA][0][113] = 127, -+ [1][0][RTW89_CHILE][1][113] = 127, -+ [1][0][RTW89_QATAR][1][113] = 127, -+ [1][0][RTW89_QATAR][0][113] = 127, -+ [1][0][RTW89_UK][1][113] = 127, -+ [1][0][RTW89_UK][0][113] = 127, -+ [1][0][RTW89_FCC][1][115] = 127, -+ [1][0][RTW89_FCC][2][115] = 127, -+ [1][0][RTW89_ETSI][1][115] = 127, -+ [1][0][RTW89_ETSI][0][115] = 127, -+ [1][0][RTW89_MKK][1][115] = 127, -+ [1][0][RTW89_MKK][0][115] = 127, -+ [1][0][RTW89_IC][1][115] = 127, -+ [1][0][RTW89_KCC][1][115] = 127, -+ [1][0][RTW89_KCC][0][115] = 127, -+ [1][0][RTW89_ACMA][1][115] = 127, -+ [1][0][RTW89_ACMA][0][115] = 127, -+ [1][0][RTW89_CHILE][1][115] = 127, -+ [1][0][RTW89_QATAR][1][115] = 127, -+ [1][0][RTW89_QATAR][0][115] = 127, -+ [1][0][RTW89_UK][1][115] = 127, -+ [1][0][RTW89_UK][0][115] = 127, -+ [1][0][RTW89_FCC][1][117] = 127, -+ [1][0][RTW89_FCC][2][117] = 127, -+ [1][0][RTW89_ETSI][1][117] = 127, -+ [1][0][RTW89_ETSI][0][117] = 127, -+ [1][0][RTW89_MKK][1][117] = 127, -+ [1][0][RTW89_MKK][0][117] = 127, -+ [1][0][RTW89_IC][1][117] = 127, -+ [1][0][RTW89_KCC][1][117] = 127, -+ [1][0][RTW89_KCC][0][117] = 127, -+ [1][0][RTW89_ACMA][1][117] = 127, -+ [1][0][RTW89_ACMA][0][117] = 127, -+ [1][0][RTW89_CHILE][1][117] = 127, -+ [1][0][RTW89_QATAR][1][117] = 127, -+ [1][0][RTW89_QATAR][0][117] = 127, -+ [1][0][RTW89_UK][1][117] = 127, -+ [1][0][RTW89_UK][0][117] = 127, -+ [1][0][RTW89_FCC][1][119] = 127, -+ [1][0][RTW89_FCC][2][119] = 127, -+ [1][0][RTW89_ETSI][1][119] = 127, -+ [1][0][RTW89_ETSI][0][119] = 127, -+ [1][0][RTW89_MKK][1][119] = 127, -+ [1][0][RTW89_MKK][0][119] = 127, -+ [1][0][RTW89_IC][1][119] = 127, -+ [1][0][RTW89_KCC][1][119] = 127, -+ [1][0][RTW89_KCC][0][119] = 127, -+ [1][0][RTW89_ACMA][1][119] = 127, -+ [1][0][RTW89_ACMA][0][119] = 127, -+ [1][0][RTW89_CHILE][1][119] = 127, -+ [1][0][RTW89_QATAR][1][119] = 127, -+ [1][0][RTW89_QATAR][0][119] = 127, -+ [1][0][RTW89_UK][1][119] = 127, -+ [1][0][RTW89_UK][0][119] = 127, -+ [1][1][RTW89_FCC][1][0] = -26, -+ [1][1][RTW89_FCC][2][0] = 44, -+ [1][1][RTW89_ETSI][1][0] = 32, -+ [1][1][RTW89_ETSI][0][0] = -6, -+ [1][1][RTW89_MKK][1][0] = 30, -+ [1][1][RTW89_MKK][0][0] = -10, -+ [1][1][RTW89_IC][1][0] = -26, -+ [1][1][RTW89_KCC][1][0] = -14, -+ [1][1][RTW89_KCC][0][0] = -14, -+ [1][1][RTW89_ACMA][1][0] = 32, -+ [1][1][RTW89_ACMA][0][0] = -6, -+ [1][1][RTW89_CHILE][1][0] = -26, -+ [1][1][RTW89_QATAR][1][0] = 32, -+ [1][1][RTW89_QATAR][0][0] = -6, -+ [1][1][RTW89_UK][1][0] = 32, -+ [1][1][RTW89_UK][0][0] = -6, -+ [1][1][RTW89_FCC][1][2] = -28, -+ [1][1][RTW89_FCC][2][2] = 44, -+ [1][1][RTW89_ETSI][1][2] = 32, -+ [1][1][RTW89_ETSI][0][2] = -6, -+ [1][1][RTW89_MKK][1][2] = 30, -+ [1][1][RTW89_MKK][0][2] = -10, -+ [1][1][RTW89_IC][1][2] = -28, -+ [1][1][RTW89_KCC][1][2] = -14, -+ [1][1][RTW89_KCC][0][2] = -14, -+ [1][1][RTW89_ACMA][1][2] = 32, -+ [1][1][RTW89_ACMA][0][2] = -6, -+ [1][1][RTW89_CHILE][1][2] = -28, -+ [1][1][RTW89_QATAR][1][2] = 32, -+ [1][1][RTW89_QATAR][0][2] = -6, -+ [1][1][RTW89_UK][1][2] = 32, -+ [1][1][RTW89_UK][0][2] = -6, -+ [1][1][RTW89_FCC][1][4] = -28, -+ [1][1][RTW89_FCC][2][4] = 44, -+ [1][1][RTW89_ETSI][1][4] = 32, -+ [1][1][RTW89_ETSI][0][4] = -6, -+ [1][1][RTW89_MKK][1][4] = 30, -+ [1][1][RTW89_MKK][0][4] = -10, -+ [1][1][RTW89_IC][1][4] = -28, -+ [1][1][RTW89_KCC][1][4] = -14, -+ [1][1][RTW89_KCC][0][4] = -14, -+ [1][1][RTW89_ACMA][1][4] = 32, -+ [1][1][RTW89_ACMA][0][4] = -6, -+ [1][1][RTW89_CHILE][1][4] = -28, -+ [1][1][RTW89_QATAR][1][4] = 32, -+ [1][1][RTW89_QATAR][0][4] = -6, -+ [1][1][RTW89_UK][1][4] = 32, -+ [1][1][RTW89_UK][0][4] = -6, -+ [1][1][RTW89_FCC][1][6] = -28, -+ [1][1][RTW89_FCC][2][6] = 44, -+ [1][1][RTW89_ETSI][1][6] = 32, -+ [1][1][RTW89_ETSI][0][6] = -6, -+ [1][1][RTW89_MKK][1][6] = 30, -+ [1][1][RTW89_MKK][0][6] = -10, -+ [1][1][RTW89_IC][1][6] = -28, -+ [1][1][RTW89_KCC][1][6] = -14, -+ [1][1][RTW89_KCC][0][6] = -14, -+ [1][1][RTW89_ACMA][1][6] = 32, -+ [1][1][RTW89_ACMA][0][6] = -6, -+ [1][1][RTW89_CHILE][1][6] = -28, -+ [1][1][RTW89_QATAR][1][6] = 32, -+ [1][1][RTW89_QATAR][0][6] = -6, -+ [1][1][RTW89_UK][1][6] = 32, -+ [1][1][RTW89_UK][0][6] = -6, -+ [1][1][RTW89_FCC][1][8] = -28, -+ [1][1][RTW89_FCC][2][8] = 44, -+ [1][1][RTW89_ETSI][1][8] = 32, -+ [1][1][RTW89_ETSI][0][8] = -6, -+ [1][1][RTW89_MKK][1][8] = 30, -+ [1][1][RTW89_MKK][0][8] = -10, -+ [1][1][RTW89_IC][1][8] = -28, -+ [1][1][RTW89_KCC][1][8] = -14, -+ [1][1][RTW89_KCC][0][8] = -14, -+ [1][1][RTW89_ACMA][1][8] = 32, -+ [1][1][RTW89_ACMA][0][8] = -6, -+ [1][1][RTW89_CHILE][1][8] = -28, -+ [1][1][RTW89_QATAR][1][8] = 32, -+ [1][1][RTW89_QATAR][0][8] = -6, -+ [1][1][RTW89_UK][1][8] = 32, -+ [1][1][RTW89_UK][0][8] = -6, -+ [1][1][RTW89_FCC][1][10] = -28, -+ [1][1][RTW89_FCC][2][10] = 44, -+ [1][1][RTW89_ETSI][1][10] = 32, -+ [1][1][RTW89_ETSI][0][10] = -6, -+ [1][1][RTW89_MKK][1][10] = 30, -+ [1][1][RTW89_MKK][0][10] = -10, -+ [1][1][RTW89_IC][1][10] = -28, -+ [1][1][RTW89_KCC][1][10] = -14, -+ [1][1][RTW89_KCC][0][10] = -14, -+ [1][1][RTW89_ACMA][1][10] = 32, -+ [1][1][RTW89_ACMA][0][10] = -6, -+ [1][1][RTW89_CHILE][1][10] = -28, -+ [1][1][RTW89_QATAR][1][10] = 32, -+ [1][1][RTW89_QATAR][0][10] = -6, -+ [1][1][RTW89_UK][1][10] = 32, -+ [1][1][RTW89_UK][0][10] = -6, -+ [1][1][RTW89_FCC][1][12] = -28, -+ [1][1][RTW89_FCC][2][12] = 44, -+ [1][1][RTW89_ETSI][1][12] = 32, -+ [1][1][RTW89_ETSI][0][12] = -6, -+ [1][1][RTW89_MKK][1][12] = 30, -+ [1][1][RTW89_MKK][0][12] = -10, -+ [1][1][RTW89_IC][1][12] = -28, -+ [1][1][RTW89_KCC][1][12] = -14, -+ [1][1][RTW89_KCC][0][12] = -14, -+ [1][1][RTW89_ACMA][1][12] = 32, -+ [1][1][RTW89_ACMA][0][12] = -6, -+ [1][1][RTW89_CHILE][1][12] = -28, -+ [1][1][RTW89_QATAR][1][12] = 32, -+ [1][1][RTW89_QATAR][0][12] = -6, -+ [1][1][RTW89_UK][1][12] = 32, -+ [1][1][RTW89_UK][0][12] = -6, -+ [1][1][RTW89_FCC][1][14] = -28, -+ [1][1][RTW89_FCC][2][14] = 44, -+ [1][1][RTW89_ETSI][1][14] = 32, -+ [1][1][RTW89_ETSI][0][14] = -6, -+ [1][1][RTW89_MKK][1][14] = 30, -+ [1][1][RTW89_MKK][0][14] = -10, -+ [1][1][RTW89_IC][1][14] = -28, -+ [1][1][RTW89_KCC][1][14] = -14, -+ [1][1][RTW89_KCC][0][14] = -14, -+ [1][1][RTW89_ACMA][1][14] = 32, -+ [1][1][RTW89_ACMA][0][14] = -6, -+ [1][1][RTW89_CHILE][1][14] = -28, -+ [1][1][RTW89_QATAR][1][14] = 32, -+ [1][1][RTW89_QATAR][0][14] = -6, -+ [1][1][RTW89_UK][1][14] = 32, -+ [1][1][RTW89_UK][0][14] = -6, -+ [1][1][RTW89_FCC][1][15] = -28, -+ [1][1][RTW89_FCC][2][15] = 44, -+ [1][1][RTW89_ETSI][1][15] = 32, -+ [1][1][RTW89_ETSI][0][15] = -6, -+ [1][1][RTW89_MKK][1][15] = 30, -+ [1][1][RTW89_MKK][0][15] = -10, -+ [1][1][RTW89_IC][1][15] = -28, -+ [1][1][RTW89_KCC][1][15] = -14, -+ [1][1][RTW89_KCC][0][15] = -14, -+ [1][1][RTW89_ACMA][1][15] = 32, -+ [1][1][RTW89_ACMA][0][15] = -6, -+ [1][1][RTW89_CHILE][1][15] = -28, -+ [1][1][RTW89_QATAR][1][15] = 32, -+ [1][1][RTW89_QATAR][0][15] = -6, -+ [1][1][RTW89_UK][1][15] = 32, -+ [1][1][RTW89_UK][0][15] = -6, -+ [1][1][RTW89_FCC][1][17] = -28, -+ [1][1][RTW89_FCC][2][17] = 44, -+ [1][1][RTW89_ETSI][1][17] = 32, -+ [1][1][RTW89_ETSI][0][17] = -6, -+ [1][1][RTW89_MKK][1][17] = 30, -+ [1][1][RTW89_MKK][0][17] = -10, -+ [1][1][RTW89_IC][1][17] = -28, -+ [1][1][RTW89_KCC][1][17] = -14, -+ [1][1][RTW89_KCC][0][17] = -14, -+ [1][1][RTW89_ACMA][1][17] = 32, -+ [1][1][RTW89_ACMA][0][17] = -6, -+ [1][1][RTW89_CHILE][1][17] = -28, -+ [1][1][RTW89_QATAR][1][17] = 32, -+ [1][1][RTW89_QATAR][0][17] = -6, -+ [1][1][RTW89_UK][1][17] = 32, -+ [1][1][RTW89_UK][0][17] = -6, -+ [1][1][RTW89_FCC][1][19] = -28, -+ [1][1][RTW89_FCC][2][19] = 44, -+ [1][1][RTW89_ETSI][1][19] = 32, -+ [1][1][RTW89_ETSI][0][19] = -6, -+ [1][1][RTW89_MKK][1][19] = 30, -+ [1][1][RTW89_MKK][0][19] = -10, -+ [1][1][RTW89_IC][1][19] = -28, -+ [1][1][RTW89_KCC][1][19] = -14, -+ [1][1][RTW89_KCC][0][19] = -14, -+ [1][1][RTW89_ACMA][1][19] = 32, -+ [1][1][RTW89_ACMA][0][19] = -6, -+ [1][1][RTW89_CHILE][1][19] = -28, -+ [1][1][RTW89_QATAR][1][19] = 32, -+ [1][1][RTW89_QATAR][0][19] = -6, -+ [1][1][RTW89_UK][1][19] = 32, -+ [1][1][RTW89_UK][0][19] = -6, -+ [1][1][RTW89_FCC][1][21] = -28, -+ [1][1][RTW89_FCC][2][21] = 44, -+ [1][1][RTW89_ETSI][1][21] = 32, -+ [1][1][RTW89_ETSI][0][21] = -6, -+ [1][1][RTW89_MKK][1][21] = 30, -+ [1][1][RTW89_MKK][0][21] = -10, -+ [1][1][RTW89_IC][1][21] = -28, -+ [1][1][RTW89_KCC][1][21] = -14, -+ [1][1][RTW89_KCC][0][21] = -14, -+ [1][1][RTW89_ACMA][1][21] = 32, -+ [1][1][RTW89_ACMA][0][21] = -6, -+ [1][1][RTW89_CHILE][1][21] = -28, -+ [1][1][RTW89_QATAR][1][21] = 32, -+ [1][1][RTW89_QATAR][0][21] = -6, -+ [1][1][RTW89_UK][1][21] = 32, -+ [1][1][RTW89_UK][0][21] = -6, -+ [1][1][RTW89_FCC][1][23] = -28, -+ [1][1][RTW89_FCC][2][23] = 44, -+ [1][1][RTW89_ETSI][1][23] = 32, -+ [1][1][RTW89_ETSI][0][23] = -6, -+ [1][1][RTW89_MKK][1][23] = 32, -+ [1][1][RTW89_MKK][0][23] = -10, -+ [1][1][RTW89_IC][1][23] = -28, -+ [1][1][RTW89_KCC][1][23] = -14, -+ [1][1][RTW89_KCC][0][23] = -14, -+ [1][1][RTW89_ACMA][1][23] = 32, -+ [1][1][RTW89_ACMA][0][23] = -6, -+ [1][1][RTW89_CHILE][1][23] = -28, -+ [1][1][RTW89_QATAR][1][23] = 32, -+ [1][1][RTW89_QATAR][0][23] = -6, -+ [1][1][RTW89_UK][1][23] = 32, -+ [1][1][RTW89_UK][0][23] = -6, -+ [1][1][RTW89_FCC][1][25] = -28, -+ [1][1][RTW89_FCC][2][25] = 44, -+ [1][1][RTW89_ETSI][1][25] = 32, -+ [1][1][RTW89_ETSI][0][25] = -6, -+ [1][1][RTW89_MKK][1][25] = 32, -+ [1][1][RTW89_MKK][0][25] = -10, -+ [1][1][RTW89_IC][1][25] = -28, -+ [1][1][RTW89_KCC][1][25] = -14, -+ [1][1][RTW89_KCC][0][25] = -14, -+ [1][1][RTW89_ACMA][1][25] = 32, -+ [1][1][RTW89_ACMA][0][25] = -6, -+ [1][1][RTW89_CHILE][1][25] = -28, -+ [1][1][RTW89_QATAR][1][25] = 32, -+ [1][1][RTW89_QATAR][0][25] = -6, -+ [1][1][RTW89_UK][1][25] = 32, -+ [1][1][RTW89_UK][0][25] = -6, -+ [1][1][RTW89_FCC][1][27] = -28, -+ [1][1][RTW89_FCC][2][27] = 44, -+ [1][1][RTW89_ETSI][1][27] = 32, -+ [1][1][RTW89_ETSI][0][27] = -6, -+ [1][1][RTW89_MKK][1][27] = 32, -+ [1][1][RTW89_MKK][0][27] = -10, -+ [1][1][RTW89_IC][1][27] = -28, -+ [1][1][RTW89_KCC][1][27] = -14, -+ [1][1][RTW89_KCC][0][27] = -14, -+ [1][1][RTW89_ACMA][1][27] = 32, -+ [1][1][RTW89_ACMA][0][27] = -6, -+ [1][1][RTW89_CHILE][1][27] = -28, -+ [1][1][RTW89_QATAR][1][27] = 32, -+ [1][1][RTW89_QATAR][0][27] = -6, -+ [1][1][RTW89_UK][1][27] = 32, -+ [1][1][RTW89_UK][0][27] = -6, -+ [1][1][RTW89_FCC][1][29] = -28, -+ [1][1][RTW89_FCC][2][29] = 44, -+ [1][1][RTW89_ETSI][1][29] = 32, -+ [1][1][RTW89_ETSI][0][29] = -6, -+ [1][1][RTW89_MKK][1][29] = 32, -+ [1][1][RTW89_MKK][0][29] = -10, -+ [1][1][RTW89_IC][1][29] = -28, -+ [1][1][RTW89_KCC][1][29] = -14, -+ [1][1][RTW89_KCC][0][29] = -14, -+ [1][1][RTW89_ACMA][1][29] = 32, -+ [1][1][RTW89_ACMA][0][29] = -6, -+ [1][1][RTW89_CHILE][1][29] = -28, -+ [1][1][RTW89_QATAR][1][29] = 32, -+ [1][1][RTW89_QATAR][0][29] = -6, -+ [1][1][RTW89_UK][1][29] = 32, -+ [1][1][RTW89_UK][0][29] = -6, -+ [1][1][RTW89_FCC][1][30] = -28, -+ [1][1][RTW89_FCC][2][30] = 44, -+ [1][1][RTW89_ETSI][1][30] = 32, -+ [1][1][RTW89_ETSI][0][30] = -6, -+ [1][1][RTW89_MKK][1][30] = 32, -+ [1][1][RTW89_MKK][0][30] = -10, -+ [1][1][RTW89_IC][1][30] = -28, -+ [1][1][RTW89_KCC][1][30] = -14, -+ [1][1][RTW89_KCC][0][30] = -14, -+ [1][1][RTW89_ACMA][1][30] = 32, -+ [1][1][RTW89_ACMA][0][30] = -6, -+ [1][1][RTW89_CHILE][1][30] = -28, -+ [1][1][RTW89_QATAR][1][30] = 32, -+ [1][1][RTW89_QATAR][0][30] = -6, -+ [1][1][RTW89_UK][1][30] = 32, -+ [1][1][RTW89_UK][0][30] = -6, -+ [1][1][RTW89_FCC][1][32] = -28, -+ [1][1][RTW89_FCC][2][32] = 44, -+ [1][1][RTW89_ETSI][1][32] = 32, -+ [1][1][RTW89_ETSI][0][32] = -6, -+ [1][1][RTW89_MKK][1][32] = 32, -+ [1][1][RTW89_MKK][0][32] = -10, -+ [1][1][RTW89_IC][1][32] = -28, -+ [1][1][RTW89_KCC][1][32] = -14, -+ [1][1][RTW89_KCC][0][32] = -14, -+ [1][1][RTW89_ACMA][1][32] = 32, -+ [1][1][RTW89_ACMA][0][32] = -6, -+ [1][1][RTW89_CHILE][1][32] = -28, -+ [1][1][RTW89_QATAR][1][32] = 32, -+ [1][1][RTW89_QATAR][0][32] = -6, -+ [1][1][RTW89_UK][1][32] = 32, -+ [1][1][RTW89_UK][0][32] = -6, -+ [1][1][RTW89_FCC][1][34] = -28, -+ [1][1][RTW89_FCC][2][34] = 44, -+ [1][1][RTW89_ETSI][1][34] = 32, -+ [1][1][RTW89_ETSI][0][34] = -6, -+ [1][1][RTW89_MKK][1][34] = 32, -+ [1][1][RTW89_MKK][0][34] = -10, -+ [1][1][RTW89_IC][1][34] = -28, -+ [1][1][RTW89_KCC][1][34] = -14, -+ [1][1][RTW89_KCC][0][34] = -14, -+ [1][1][RTW89_ACMA][1][34] = 32, -+ [1][1][RTW89_ACMA][0][34] = -6, -+ [1][1][RTW89_CHILE][1][34] = -28, -+ [1][1][RTW89_QATAR][1][34] = 32, -+ [1][1][RTW89_QATAR][0][34] = -6, -+ [1][1][RTW89_UK][1][34] = 32, -+ [1][1][RTW89_UK][0][34] = -6, -+ [1][1][RTW89_FCC][1][36] = -28, -+ [1][1][RTW89_FCC][2][36] = 44, -+ [1][1][RTW89_ETSI][1][36] = 32, -+ [1][1][RTW89_ETSI][0][36] = -6, -+ [1][1][RTW89_MKK][1][36] = 32, -+ [1][1][RTW89_MKK][0][36] = -10, -+ [1][1][RTW89_IC][1][36] = -28, -+ [1][1][RTW89_KCC][1][36] = -14, -+ [1][1][RTW89_KCC][0][36] = -14, -+ [1][1][RTW89_ACMA][1][36] = 32, -+ [1][1][RTW89_ACMA][0][36] = -6, -+ [1][1][RTW89_CHILE][1][36] = -28, -+ [1][1][RTW89_QATAR][1][36] = 32, -+ [1][1][RTW89_QATAR][0][36] = -6, -+ [1][1][RTW89_UK][1][36] = 32, -+ [1][1][RTW89_UK][0][36] = -6, -+ [1][1][RTW89_FCC][1][38] = -28, -+ [1][1][RTW89_FCC][2][38] = 44, -+ [1][1][RTW89_ETSI][1][38] = 32, -+ [1][1][RTW89_ETSI][0][38] = -6, -+ [1][1][RTW89_MKK][1][38] = 32, -+ [1][1][RTW89_MKK][0][38] = -10, -+ [1][1][RTW89_IC][1][38] = -28, -+ [1][1][RTW89_KCC][1][38] = -14, -+ [1][1][RTW89_KCC][0][38] = -14, -+ [1][1][RTW89_ACMA][1][38] = 32, -+ [1][1][RTW89_ACMA][0][38] = -6, -+ [1][1][RTW89_CHILE][1][38] = -28, -+ [1][1][RTW89_QATAR][1][38] = 32, -+ [1][1][RTW89_QATAR][0][38] = -6, -+ [1][1][RTW89_UK][1][38] = 32, -+ [1][1][RTW89_UK][0][38] = -6, -+ [1][1][RTW89_FCC][1][40] = -28, -+ [1][1][RTW89_FCC][2][40] = 44, -+ [1][1][RTW89_ETSI][1][40] = 32, -+ [1][1][RTW89_ETSI][0][40] = -6, -+ [1][1][RTW89_MKK][1][40] = 32, -+ [1][1][RTW89_MKK][0][40] = -10, -+ [1][1][RTW89_IC][1][40] = -28, -+ [1][1][RTW89_KCC][1][40] = -14, -+ [1][1][RTW89_KCC][0][40] = -14, -+ [1][1][RTW89_ACMA][1][40] = 32, -+ [1][1][RTW89_ACMA][0][40] = -6, -+ [1][1][RTW89_CHILE][1][40] = -28, -+ [1][1][RTW89_QATAR][1][40] = 32, -+ [1][1][RTW89_QATAR][0][40] = -6, -+ [1][1][RTW89_UK][1][40] = 32, -+ [1][1][RTW89_UK][0][40] = -6, -+ [1][1][RTW89_FCC][1][42] = -28, -+ [1][1][RTW89_FCC][2][42] = 44, -+ [1][1][RTW89_ETSI][1][42] = 32, -+ [1][1][RTW89_ETSI][0][42] = -6, -+ [1][1][RTW89_MKK][1][42] = 32, -+ [1][1][RTW89_MKK][0][42] = -10, -+ [1][1][RTW89_IC][1][42] = -28, -+ [1][1][RTW89_KCC][1][42] = -14, -+ [1][1][RTW89_KCC][0][42] = -14, -+ [1][1][RTW89_ACMA][1][42] = 32, -+ [1][1][RTW89_ACMA][0][42] = -6, -+ [1][1][RTW89_CHILE][1][42] = -28, -+ [1][1][RTW89_QATAR][1][42] = 32, -+ [1][1][RTW89_QATAR][0][42] = -6, -+ [1][1][RTW89_UK][1][42] = 32, -+ [1][1][RTW89_UK][0][42] = -6, -+ [1][1][RTW89_FCC][1][44] = -28, -+ [1][1][RTW89_FCC][2][44] = 44, -+ [1][1][RTW89_ETSI][1][44] = 34, -+ [1][1][RTW89_ETSI][0][44] = -4, -+ [1][1][RTW89_MKK][1][44] = 4, -+ [1][1][RTW89_MKK][0][44] = -8, -+ [1][1][RTW89_IC][1][44] = -28, -+ [1][1][RTW89_KCC][1][44] = -14, -+ [1][1][RTW89_KCC][0][44] = -14, -+ [1][1][RTW89_ACMA][1][44] = 34, -+ [1][1][RTW89_ACMA][0][44] = -4, -+ [1][1][RTW89_CHILE][1][44] = -28, -+ [1][1][RTW89_QATAR][1][44] = 34, -+ [1][1][RTW89_QATAR][0][44] = -4, -+ [1][1][RTW89_UK][1][44] = 34, -+ [1][1][RTW89_UK][0][44] = -4, -+ [1][1][RTW89_FCC][1][45] = -26, -+ [1][1][RTW89_FCC][2][45] = 127, -+ [1][1][RTW89_ETSI][1][45] = 127, -+ [1][1][RTW89_ETSI][0][45] = 127, -+ [1][1][RTW89_MKK][1][45] = 127, -+ [1][1][RTW89_MKK][0][45] = 127, -+ [1][1][RTW89_IC][1][45] = -26, -+ [1][1][RTW89_KCC][1][45] = -14, -+ [1][1][RTW89_KCC][0][45] = 127, -+ [1][1][RTW89_ACMA][1][45] = 127, -+ [1][1][RTW89_ACMA][0][45] = 127, -+ [1][1][RTW89_CHILE][1][45] = 127, -+ [1][1][RTW89_QATAR][1][45] = 127, -+ [1][1][RTW89_QATAR][0][45] = 127, -+ [1][1][RTW89_UK][1][45] = 127, -+ [1][1][RTW89_UK][0][45] = 127, -+ [1][1][RTW89_FCC][1][47] = -28, -+ [1][1][RTW89_FCC][2][47] = 127, -+ [1][1][RTW89_ETSI][1][47] = 127, -+ [1][1][RTW89_ETSI][0][47] = 127, -+ [1][1][RTW89_MKK][1][47] = 127, -+ [1][1][RTW89_MKK][0][47] = 127, -+ [1][1][RTW89_IC][1][47] = -28, -+ [1][1][RTW89_KCC][1][47] = -14, -+ [1][1][RTW89_KCC][0][47] = 127, -+ [1][1][RTW89_ACMA][1][47] = 127, -+ [1][1][RTW89_ACMA][0][47] = 127, -+ [1][1][RTW89_CHILE][1][47] = 127, -+ [1][1][RTW89_QATAR][1][47] = 127, -+ [1][1][RTW89_QATAR][0][47] = 127, -+ [1][1][RTW89_UK][1][47] = 127, -+ [1][1][RTW89_UK][0][47] = 127, -+ [1][1][RTW89_FCC][1][49] = -28, -+ [1][1][RTW89_FCC][2][49] = 127, -+ [1][1][RTW89_ETSI][1][49] = 127, -+ [1][1][RTW89_ETSI][0][49] = 127, -+ [1][1][RTW89_MKK][1][49] = 127, -+ [1][1][RTW89_MKK][0][49] = 127, -+ [1][1][RTW89_IC][1][49] = -28, -+ [1][1][RTW89_KCC][1][49] = -14, -+ [1][1][RTW89_KCC][0][49] = 127, -+ [1][1][RTW89_ACMA][1][49] = 127, -+ [1][1][RTW89_ACMA][0][49] = 127, -+ [1][1][RTW89_CHILE][1][49] = 127, -+ [1][1][RTW89_QATAR][1][49] = 127, -+ [1][1][RTW89_QATAR][0][49] = 127, -+ [1][1][RTW89_UK][1][49] = 127, -+ [1][1][RTW89_UK][0][49] = 127, -+ [1][1][RTW89_FCC][1][51] = -28, -+ [1][1][RTW89_FCC][2][51] = 127, -+ [1][1][RTW89_ETSI][1][51] = 127, -+ [1][1][RTW89_ETSI][0][51] = 127, -+ [1][1][RTW89_MKK][1][51] = 127, -+ [1][1][RTW89_MKK][0][51] = 127, -+ [1][1][RTW89_IC][1][51] = -28, -+ [1][1][RTW89_KCC][1][51] = -14, -+ [1][1][RTW89_KCC][0][51] = 127, -+ [1][1][RTW89_ACMA][1][51] = 127, -+ [1][1][RTW89_ACMA][0][51] = 127, -+ [1][1][RTW89_CHILE][1][51] = 127, -+ [1][1][RTW89_QATAR][1][51] = 127, -+ [1][1][RTW89_QATAR][0][51] = 127, -+ [1][1][RTW89_UK][1][51] = 127, -+ [1][1][RTW89_UK][0][51] = 127, -+ [1][1][RTW89_FCC][1][53] = -26, -+ [1][1][RTW89_FCC][2][53] = 127, -+ [1][1][RTW89_ETSI][1][53] = 127, -+ [1][1][RTW89_ETSI][0][53] = 127, -+ [1][1][RTW89_MKK][1][53] = 127, -+ [1][1][RTW89_MKK][0][53] = 127, -+ [1][1][RTW89_IC][1][53] = -26, -+ [1][1][RTW89_KCC][1][53] = -14, -+ [1][1][RTW89_KCC][0][53] = 127, -+ [1][1][RTW89_ACMA][1][53] = 127, -+ [1][1][RTW89_ACMA][0][53] = 127, -+ [1][1][RTW89_CHILE][1][53] = 127, -+ [1][1][RTW89_QATAR][1][53] = 127, -+ [1][1][RTW89_QATAR][0][53] = 127, -+ [1][1][RTW89_UK][1][53] = 127, -+ [1][1][RTW89_UK][0][53] = 127, -+ [1][1][RTW89_FCC][1][55] = -28, -+ [1][1][RTW89_FCC][2][55] = 44, -+ [1][1][RTW89_ETSI][1][55] = 127, -+ [1][1][RTW89_ETSI][0][55] = 127, -+ [1][1][RTW89_MKK][1][55] = 127, -+ [1][1][RTW89_MKK][0][55] = 127, -+ [1][1][RTW89_IC][1][55] = -28, -+ [1][1][RTW89_KCC][1][55] = -14, -+ [1][1][RTW89_KCC][0][55] = 127, -+ [1][1][RTW89_ACMA][1][55] = 127, -+ [1][1][RTW89_ACMA][0][55] = 127, -+ [1][1][RTW89_CHILE][1][55] = 127, -+ [1][1][RTW89_QATAR][1][55] = 127, -+ [1][1][RTW89_QATAR][0][55] = 127, -+ [1][1][RTW89_UK][1][55] = 127, -+ [1][1][RTW89_UK][0][55] = 127, -+ [1][1][RTW89_FCC][1][57] = -28, -+ [1][1][RTW89_FCC][2][57] = 44, -+ [1][1][RTW89_ETSI][1][57] = 127, -+ [1][1][RTW89_ETSI][0][57] = 127, -+ [1][1][RTW89_MKK][1][57] = 127, -+ [1][1][RTW89_MKK][0][57] = 127, -+ [1][1][RTW89_IC][1][57] = -28, -+ [1][1][RTW89_KCC][1][57] = -14, -+ [1][1][RTW89_KCC][0][57] = 127, -+ [1][1][RTW89_ACMA][1][57] = 127, -+ [1][1][RTW89_ACMA][0][57] = 127, -+ [1][1][RTW89_CHILE][1][57] = 127, -+ [1][1][RTW89_QATAR][1][57] = 127, -+ [1][1][RTW89_QATAR][0][57] = 127, -+ [1][1][RTW89_UK][1][57] = 127, -+ [1][1][RTW89_UK][0][57] = 127, -+ [1][1][RTW89_FCC][1][59] = -28, -+ [1][1][RTW89_FCC][2][59] = 44, -+ [1][1][RTW89_ETSI][1][59] = 127, -+ [1][1][RTW89_ETSI][0][59] = 127, -+ [1][1][RTW89_MKK][1][59] = 127, -+ [1][1][RTW89_MKK][0][59] = 127, -+ [1][1][RTW89_IC][1][59] = -28, -+ [1][1][RTW89_KCC][1][59] = -14, -+ [1][1][RTW89_KCC][0][59] = 127, -+ [1][1][RTW89_ACMA][1][59] = 127, -+ [1][1][RTW89_ACMA][0][59] = 127, -+ [1][1][RTW89_CHILE][1][59] = 127, -+ [1][1][RTW89_QATAR][1][59] = 127, -+ [1][1][RTW89_QATAR][0][59] = 127, -+ [1][1][RTW89_UK][1][59] = 127, -+ [1][1][RTW89_UK][0][59] = 127, -+ [1][1][RTW89_FCC][1][60] = -28, -+ [1][1][RTW89_FCC][2][60] = 44, -+ [1][1][RTW89_ETSI][1][60] = 127, -+ [1][1][RTW89_ETSI][0][60] = 127, -+ [1][1][RTW89_MKK][1][60] = 127, -+ [1][1][RTW89_MKK][0][60] = 127, -+ [1][1][RTW89_IC][1][60] = -28, -+ [1][1][RTW89_KCC][1][60] = -14, -+ [1][1][RTW89_KCC][0][60] = 127, -+ [1][1][RTW89_ACMA][1][60] = 127, -+ [1][1][RTW89_ACMA][0][60] = 127, -+ [1][1][RTW89_CHILE][1][60] = 127, -+ [1][1][RTW89_QATAR][1][60] = 127, -+ [1][1][RTW89_QATAR][0][60] = 127, -+ [1][1][RTW89_UK][1][60] = 127, -+ [1][1][RTW89_UK][0][60] = 127, -+ [1][1][RTW89_FCC][1][62] = -28, -+ [1][1][RTW89_FCC][2][62] = 44, -+ [1][1][RTW89_ETSI][1][62] = 127, -+ [1][1][RTW89_ETSI][0][62] = 127, -+ [1][1][RTW89_MKK][1][62] = 127, -+ [1][1][RTW89_MKK][0][62] = 127, -+ [1][1][RTW89_IC][1][62] = -28, -+ [1][1][RTW89_KCC][1][62] = -14, -+ [1][1][RTW89_KCC][0][62] = 127, -+ [1][1][RTW89_ACMA][1][62] = 127, -+ [1][1][RTW89_ACMA][0][62] = 127, -+ [1][1][RTW89_CHILE][1][62] = 127, -+ [1][1][RTW89_QATAR][1][62] = 127, -+ [1][1][RTW89_QATAR][0][62] = 127, -+ [1][1][RTW89_UK][1][62] = 127, -+ [1][1][RTW89_UK][0][62] = 127, -+ [1][1][RTW89_FCC][1][64] = -28, -+ [1][1][RTW89_FCC][2][64] = 44, -+ [1][1][RTW89_ETSI][1][64] = 127, -+ [1][1][RTW89_ETSI][0][64] = 127, -+ [1][1][RTW89_MKK][1][64] = 127, -+ [1][1][RTW89_MKK][0][64] = 127, -+ [1][1][RTW89_IC][1][64] = -28, -+ [1][1][RTW89_KCC][1][64] = -14, -+ [1][1][RTW89_KCC][0][64] = 127, -+ [1][1][RTW89_ACMA][1][64] = 127, -+ [1][1][RTW89_ACMA][0][64] = 127, -+ [1][1][RTW89_CHILE][1][64] = 127, -+ [1][1][RTW89_QATAR][1][64] = 127, -+ [1][1][RTW89_QATAR][0][64] = 127, -+ [1][1][RTW89_UK][1][64] = 127, -+ [1][1][RTW89_UK][0][64] = 127, -+ [1][1][RTW89_FCC][1][66] = -28, -+ [1][1][RTW89_FCC][2][66] = 44, -+ [1][1][RTW89_ETSI][1][66] = 127, -+ [1][1][RTW89_ETSI][0][66] = 127, -+ [1][1][RTW89_MKK][1][66] = 127, -+ [1][1][RTW89_MKK][0][66] = 127, -+ [1][1][RTW89_IC][1][66] = -28, -+ [1][1][RTW89_KCC][1][66] = -14, -+ [1][1][RTW89_KCC][0][66] = 127, -+ [1][1][RTW89_ACMA][1][66] = 127, -+ [1][1][RTW89_ACMA][0][66] = 127, -+ [1][1][RTW89_CHILE][1][66] = 127, -+ [1][1][RTW89_QATAR][1][66] = 127, -+ [1][1][RTW89_QATAR][0][66] = 127, -+ [1][1][RTW89_UK][1][66] = 127, -+ [1][1][RTW89_UK][0][66] = 127, -+ [1][1][RTW89_FCC][1][68] = -28, -+ [1][1][RTW89_FCC][2][68] = 44, -+ [1][1][RTW89_ETSI][1][68] = 127, -+ [1][1][RTW89_ETSI][0][68] = 127, -+ [1][1][RTW89_MKK][1][68] = 127, -+ [1][1][RTW89_MKK][0][68] = 127, -+ [1][1][RTW89_IC][1][68] = -28, -+ [1][1][RTW89_KCC][1][68] = -14, -+ [1][1][RTW89_KCC][0][68] = 127, -+ [1][1][RTW89_ACMA][1][68] = 127, -+ [1][1][RTW89_ACMA][0][68] = 127, -+ [1][1][RTW89_CHILE][1][68] = 127, -+ [1][1][RTW89_QATAR][1][68] = 127, -+ [1][1][RTW89_QATAR][0][68] = 127, -+ [1][1][RTW89_UK][1][68] = 127, -+ [1][1][RTW89_UK][0][68] = 127, -+ [1][1][RTW89_FCC][1][70] = -26, -+ [1][1][RTW89_FCC][2][70] = 44, -+ [1][1][RTW89_ETSI][1][70] = 127, -+ [1][1][RTW89_ETSI][0][70] = 127, -+ [1][1][RTW89_MKK][1][70] = 127, -+ [1][1][RTW89_MKK][0][70] = 127, -+ [1][1][RTW89_IC][1][70] = -26, -+ [1][1][RTW89_KCC][1][70] = -14, -+ [1][1][RTW89_KCC][0][70] = 127, -+ [1][1][RTW89_ACMA][1][70] = 127, -+ [1][1][RTW89_ACMA][0][70] = 127, -+ [1][1][RTW89_CHILE][1][70] = 127, -+ [1][1][RTW89_QATAR][1][70] = 127, -+ [1][1][RTW89_QATAR][0][70] = 127, -+ [1][1][RTW89_UK][1][70] = 127, -+ [1][1][RTW89_UK][0][70] = 127, -+ [1][1][RTW89_FCC][1][72] = -28, -+ [1][1][RTW89_FCC][2][72] = 44, -+ [1][1][RTW89_ETSI][1][72] = 127, -+ [1][1][RTW89_ETSI][0][72] = 127, -+ [1][1][RTW89_MKK][1][72] = 127, -+ [1][1][RTW89_MKK][0][72] = 127, -+ [1][1][RTW89_IC][1][72] = -28, -+ [1][1][RTW89_KCC][1][72] = -14, -+ [1][1][RTW89_KCC][0][72] = 127, -+ [1][1][RTW89_ACMA][1][72] = 127, -+ [1][1][RTW89_ACMA][0][72] = 127, -+ [1][1][RTW89_CHILE][1][72] = 127, -+ [1][1][RTW89_QATAR][1][72] = 127, -+ [1][1][RTW89_QATAR][0][72] = 127, -+ [1][1][RTW89_UK][1][72] = 127, -+ [1][1][RTW89_UK][0][72] = 127, -+ [1][1][RTW89_FCC][1][74] = -28, -+ [1][1][RTW89_FCC][2][74] = 44, -+ [1][1][RTW89_ETSI][1][74] = 127, -+ [1][1][RTW89_ETSI][0][74] = 127, -+ [1][1][RTW89_MKK][1][74] = 127, -+ [1][1][RTW89_MKK][0][74] = 127, -+ [1][1][RTW89_IC][1][74] = -28, -+ [1][1][RTW89_KCC][1][74] = -14, -+ [1][1][RTW89_KCC][0][74] = 127, -+ [1][1][RTW89_ACMA][1][74] = 127, -+ [1][1][RTW89_ACMA][0][74] = 127, -+ [1][1][RTW89_CHILE][1][74] = 127, -+ [1][1][RTW89_QATAR][1][74] = 127, -+ [1][1][RTW89_QATAR][0][74] = 127, -+ [1][1][RTW89_UK][1][74] = 127, -+ [1][1][RTW89_UK][0][74] = 127, -+ [1][1][RTW89_FCC][1][75] = -28, -+ [1][1][RTW89_FCC][2][75] = 44, -+ [1][1][RTW89_ETSI][1][75] = 127, -+ [1][1][RTW89_ETSI][0][75] = 127, -+ [1][1][RTW89_MKK][1][75] = 127, -+ [1][1][RTW89_MKK][0][75] = 127, -+ [1][1][RTW89_IC][1][75] = -28, -+ [1][1][RTW89_KCC][1][75] = -14, -+ [1][1][RTW89_KCC][0][75] = 127, -+ [1][1][RTW89_ACMA][1][75] = 127, -+ [1][1][RTW89_ACMA][0][75] = 127, -+ [1][1][RTW89_CHILE][1][75] = 127, -+ [1][1][RTW89_QATAR][1][75] = 127, -+ [1][1][RTW89_QATAR][0][75] = 127, -+ [1][1][RTW89_UK][1][75] = 127, -+ [1][1][RTW89_UK][0][75] = 127, -+ [1][1][RTW89_FCC][1][77] = -28, -+ [1][1][RTW89_FCC][2][77] = 44, -+ [1][1][RTW89_ETSI][1][77] = 127, -+ [1][1][RTW89_ETSI][0][77] = 127, -+ [1][1][RTW89_MKK][1][77] = 127, -+ [1][1][RTW89_MKK][0][77] = 127, -+ [1][1][RTW89_IC][1][77] = -28, -+ [1][1][RTW89_KCC][1][77] = -14, -+ [1][1][RTW89_KCC][0][77] = 127, -+ [1][1][RTW89_ACMA][1][77] = 127, -+ [1][1][RTW89_ACMA][0][77] = 127, -+ [1][1][RTW89_CHILE][1][77] = 127, -+ [1][1][RTW89_QATAR][1][77] = 127, -+ [1][1][RTW89_QATAR][0][77] = 127, -+ [1][1][RTW89_UK][1][77] = 127, -+ [1][1][RTW89_UK][0][77] = 127, -+ [1][1][RTW89_FCC][1][79] = -28, -+ [1][1][RTW89_FCC][2][79] = 44, -+ [1][1][RTW89_ETSI][1][79] = 127, -+ [1][1][RTW89_ETSI][0][79] = 127, -+ [1][1][RTW89_MKK][1][79] = 127, -+ [1][1][RTW89_MKK][0][79] = 127, -+ [1][1][RTW89_IC][1][79] = -28, -+ [1][1][RTW89_KCC][1][79] = -14, -+ [1][1][RTW89_KCC][0][79] = 127, -+ [1][1][RTW89_ACMA][1][79] = 127, -+ [1][1][RTW89_ACMA][0][79] = 127, -+ [1][1][RTW89_CHILE][1][79] = 127, -+ [1][1][RTW89_QATAR][1][79] = 127, -+ [1][1][RTW89_QATAR][0][79] = 127, -+ [1][1][RTW89_UK][1][79] = 127, -+ [1][1][RTW89_UK][0][79] = 127, -+ [1][1][RTW89_FCC][1][81] = -28, -+ [1][1][RTW89_FCC][2][81] = 44, -+ [1][1][RTW89_ETSI][1][81] = 127, -+ [1][1][RTW89_ETSI][0][81] = 127, -+ [1][1][RTW89_MKK][1][81] = 127, -+ [1][1][RTW89_MKK][0][81] = 127, -+ [1][1][RTW89_IC][1][81] = -28, -+ [1][1][RTW89_KCC][1][81] = -14, -+ [1][1][RTW89_KCC][0][81] = 127, -+ [1][1][RTW89_ACMA][1][81] = 127, -+ [1][1][RTW89_ACMA][0][81] = 127, -+ [1][1][RTW89_CHILE][1][81] = 127, -+ [1][1][RTW89_QATAR][1][81] = 127, -+ [1][1][RTW89_QATAR][0][81] = 127, -+ [1][1][RTW89_UK][1][81] = 127, -+ [1][1][RTW89_UK][0][81] = 127, -+ [1][1][RTW89_FCC][1][83] = -28, -+ [1][1][RTW89_FCC][2][83] = 44, -+ [1][1][RTW89_ETSI][1][83] = 127, -+ [1][1][RTW89_ETSI][0][83] = 127, -+ [1][1][RTW89_MKK][1][83] = 127, -+ [1][1][RTW89_MKK][0][83] = 127, -+ [1][1][RTW89_IC][1][83] = -28, -+ [1][1][RTW89_KCC][1][83] = -14, -+ [1][1][RTW89_KCC][0][83] = 127, -+ [1][1][RTW89_ACMA][1][83] = 127, -+ [1][1][RTW89_ACMA][0][83] = 127, -+ [1][1][RTW89_CHILE][1][83] = 127, -+ [1][1][RTW89_QATAR][1][83] = 127, -+ [1][1][RTW89_QATAR][0][83] = 127, -+ [1][1][RTW89_UK][1][83] = 127, -+ [1][1][RTW89_UK][0][83] = 127, -+ [1][1][RTW89_FCC][1][85] = -28, -+ [1][1][RTW89_FCC][2][85] = 44, -+ [1][1][RTW89_ETSI][1][85] = 127, -+ [1][1][RTW89_ETSI][0][85] = 127, -+ [1][1][RTW89_MKK][1][85] = 127, -+ [1][1][RTW89_MKK][0][85] = 127, -+ [1][1][RTW89_IC][1][85] = -28, -+ [1][1][RTW89_KCC][1][85] = -14, -+ [1][1][RTW89_KCC][0][85] = 127, -+ [1][1][RTW89_ACMA][1][85] = 127, -+ [1][1][RTW89_ACMA][0][85] = 127, -+ [1][1][RTW89_CHILE][1][85] = 127, -+ [1][1][RTW89_QATAR][1][85] = 127, -+ [1][1][RTW89_QATAR][0][85] = 127, -+ [1][1][RTW89_UK][1][85] = 127, -+ [1][1][RTW89_UK][0][85] = 127, -+ [1][1][RTW89_FCC][1][87] = -28, -+ [1][1][RTW89_FCC][2][87] = 127, -+ [1][1][RTW89_ETSI][1][87] = 127, -+ [1][1][RTW89_ETSI][0][87] = 127, -+ [1][1][RTW89_MKK][1][87] = 127, -+ [1][1][RTW89_MKK][0][87] = 127, -+ [1][1][RTW89_IC][1][87] = -28, -+ [1][1][RTW89_KCC][1][87] = -14, -+ [1][1][RTW89_KCC][0][87] = 127, -+ [1][1][RTW89_ACMA][1][87] = 127, -+ [1][1][RTW89_ACMA][0][87] = 127, -+ [1][1][RTW89_CHILE][1][87] = 127, -+ [1][1][RTW89_QATAR][1][87] = 127, -+ [1][1][RTW89_QATAR][0][87] = 127, -+ [1][1][RTW89_UK][1][87] = 127, -+ [1][1][RTW89_UK][0][87] = 127, -+ [1][1][RTW89_FCC][1][89] = -26, -+ [1][1][RTW89_FCC][2][89] = 127, -+ [1][1][RTW89_ETSI][1][89] = 127, -+ [1][1][RTW89_ETSI][0][89] = 127, -+ [1][1][RTW89_MKK][1][89] = 127, -+ [1][1][RTW89_MKK][0][89] = 127, -+ [1][1][RTW89_IC][1][89] = -26, -+ [1][1][RTW89_KCC][1][89] = -14, -+ [1][1][RTW89_KCC][0][89] = 127, -+ [1][1][RTW89_ACMA][1][89] = 127, -+ [1][1][RTW89_ACMA][0][89] = 127, -+ [1][1][RTW89_CHILE][1][89] = 127, -+ [1][1][RTW89_QATAR][1][89] = 127, -+ [1][1][RTW89_QATAR][0][89] = 127, -+ [1][1][RTW89_UK][1][89] = 127, -+ [1][1][RTW89_UK][0][89] = 127, -+ [1][1][RTW89_FCC][1][90] = -26, -+ [1][1][RTW89_FCC][2][90] = 127, -+ [1][1][RTW89_ETSI][1][90] = 127, -+ [1][1][RTW89_ETSI][0][90] = 127, -+ [1][1][RTW89_MKK][1][90] = 127, -+ [1][1][RTW89_MKK][0][90] = 127, -+ [1][1][RTW89_IC][1][90] = -26, -+ [1][1][RTW89_KCC][1][90] = -14, -+ [1][1][RTW89_KCC][0][90] = 127, -+ [1][1][RTW89_ACMA][1][90] = 127, -+ [1][1][RTW89_ACMA][0][90] = 127, -+ [1][1][RTW89_CHILE][1][90] = 127, -+ [1][1][RTW89_QATAR][1][90] = 127, -+ [1][1][RTW89_QATAR][0][90] = 127, -+ [1][1][RTW89_UK][1][90] = 127, -+ [1][1][RTW89_UK][0][90] = 127, -+ [1][1][RTW89_FCC][1][92] = -26, -+ [1][1][RTW89_FCC][2][92] = 127, -+ [1][1][RTW89_ETSI][1][92] = 127, -+ [1][1][RTW89_ETSI][0][92] = 127, -+ [1][1][RTW89_MKK][1][92] = 127, -+ [1][1][RTW89_MKK][0][92] = 127, -+ [1][1][RTW89_IC][1][92] = -26, -+ [1][1][RTW89_KCC][1][92] = -14, -+ [1][1][RTW89_KCC][0][92] = 127, -+ [1][1][RTW89_ACMA][1][92] = 127, -+ [1][1][RTW89_ACMA][0][92] = 127, -+ [1][1][RTW89_CHILE][1][92] = 127, -+ [1][1][RTW89_QATAR][1][92] = 127, -+ [1][1][RTW89_QATAR][0][92] = 127, -+ [1][1][RTW89_UK][1][92] = 127, -+ [1][1][RTW89_UK][0][92] = 127, -+ [1][1][RTW89_FCC][1][94] = -26, -+ [1][1][RTW89_FCC][2][94] = 127, -+ [1][1][RTW89_ETSI][1][94] = 127, -+ [1][1][RTW89_ETSI][0][94] = 127, -+ [1][1][RTW89_MKK][1][94] = 127, -+ [1][1][RTW89_MKK][0][94] = 127, -+ [1][1][RTW89_IC][1][94] = -26, -+ [1][1][RTW89_KCC][1][94] = -14, -+ [1][1][RTW89_KCC][0][94] = 127, -+ [1][1][RTW89_ACMA][1][94] = 127, -+ [1][1][RTW89_ACMA][0][94] = 127, -+ [1][1][RTW89_CHILE][1][94] = 127, -+ [1][1][RTW89_QATAR][1][94] = 127, -+ [1][1][RTW89_QATAR][0][94] = 127, -+ [1][1][RTW89_UK][1][94] = 127, -+ [1][1][RTW89_UK][0][94] = 127, -+ [1][1][RTW89_FCC][1][96] = -26, -+ [1][1][RTW89_FCC][2][96] = 127, -+ [1][1][RTW89_ETSI][1][96] = 127, -+ [1][1][RTW89_ETSI][0][96] = 127, -+ [1][1][RTW89_MKK][1][96] = 127, -+ [1][1][RTW89_MKK][0][96] = 127, -+ [1][1][RTW89_IC][1][96] = -26, -+ [1][1][RTW89_KCC][1][96] = -14, -+ [1][1][RTW89_KCC][0][96] = 127, -+ [1][1][RTW89_ACMA][1][96] = 127, -+ [1][1][RTW89_ACMA][0][96] = 127, -+ [1][1][RTW89_CHILE][1][96] = 127, -+ [1][1][RTW89_QATAR][1][96] = 127, -+ [1][1][RTW89_QATAR][0][96] = 127, -+ [1][1][RTW89_UK][1][96] = 127, -+ [1][1][RTW89_UK][0][96] = 127, -+ [1][1][RTW89_FCC][1][98] = -26, -+ [1][1][RTW89_FCC][2][98] = 127, -+ [1][1][RTW89_ETSI][1][98] = 127, -+ [1][1][RTW89_ETSI][0][98] = 127, -+ [1][1][RTW89_MKK][1][98] = 127, -+ [1][1][RTW89_MKK][0][98] = 127, -+ [1][1][RTW89_IC][1][98] = -26, -+ [1][1][RTW89_KCC][1][98] = -14, -+ [1][1][RTW89_KCC][0][98] = 127, -+ [1][1][RTW89_ACMA][1][98] = 127, -+ [1][1][RTW89_ACMA][0][98] = 127, -+ [1][1][RTW89_CHILE][1][98] = 127, -+ [1][1][RTW89_QATAR][1][98] = 127, -+ [1][1][RTW89_QATAR][0][98] = 127, -+ [1][1][RTW89_UK][1][98] = 127, -+ [1][1][RTW89_UK][0][98] = 127, -+ [1][1][RTW89_FCC][1][100] = -26, -+ [1][1][RTW89_FCC][2][100] = 127, -+ [1][1][RTW89_ETSI][1][100] = 127, -+ [1][1][RTW89_ETSI][0][100] = 127, -+ [1][1][RTW89_MKK][1][100] = 127, -+ [1][1][RTW89_MKK][0][100] = 127, -+ [1][1][RTW89_IC][1][100] = -26, -+ [1][1][RTW89_KCC][1][100] = -14, -+ [1][1][RTW89_KCC][0][100] = 127, -+ [1][1][RTW89_ACMA][1][100] = 127, -+ [1][1][RTW89_ACMA][0][100] = 127, -+ [1][1][RTW89_CHILE][1][100] = 127, -+ [1][1][RTW89_QATAR][1][100] = 127, -+ [1][1][RTW89_QATAR][0][100] = 127, -+ [1][1][RTW89_UK][1][100] = 127, -+ [1][1][RTW89_UK][0][100] = 127, -+ [1][1][RTW89_FCC][1][102] = -26, -+ [1][1][RTW89_FCC][2][102] = 127, -+ [1][1][RTW89_ETSI][1][102] = 127, -+ [1][1][RTW89_ETSI][0][102] = 127, -+ [1][1][RTW89_MKK][1][102] = 127, -+ [1][1][RTW89_MKK][0][102] = 127, -+ [1][1][RTW89_IC][1][102] = -26, -+ [1][1][RTW89_KCC][1][102] = -14, -+ [1][1][RTW89_KCC][0][102] = 127, -+ [1][1][RTW89_ACMA][1][102] = 127, -+ [1][1][RTW89_ACMA][0][102] = 127, -+ [1][1][RTW89_CHILE][1][102] = 127, -+ [1][1][RTW89_QATAR][1][102] = 127, -+ [1][1][RTW89_QATAR][0][102] = 127, -+ [1][1][RTW89_UK][1][102] = 127, -+ [1][1][RTW89_UK][0][102] = 127, -+ [1][1][RTW89_FCC][1][104] = -26, -+ [1][1][RTW89_FCC][2][104] = 127, -+ [1][1][RTW89_ETSI][1][104] = 127, -+ [1][1][RTW89_ETSI][0][104] = 127, -+ [1][1][RTW89_MKK][1][104] = 127, -+ [1][1][RTW89_MKK][0][104] = 127, -+ [1][1][RTW89_IC][1][104] = -26, -+ [1][1][RTW89_KCC][1][104] = -14, -+ [1][1][RTW89_KCC][0][104] = 127, -+ [1][1][RTW89_ACMA][1][104] = 127, -+ [1][1][RTW89_ACMA][0][104] = 127, -+ [1][1][RTW89_CHILE][1][104] = 127, -+ [1][1][RTW89_QATAR][1][104] = 127, -+ [1][1][RTW89_QATAR][0][104] = 127, -+ [1][1][RTW89_UK][1][104] = 127, -+ [1][1][RTW89_UK][0][104] = 127, -+ [1][1][RTW89_FCC][1][105] = -26, -+ [1][1][RTW89_FCC][2][105] = 127, -+ [1][1][RTW89_ETSI][1][105] = 127, -+ [1][1][RTW89_ETSI][0][105] = 127, -+ [1][1][RTW89_MKK][1][105] = 127, -+ [1][1][RTW89_MKK][0][105] = 127, -+ [1][1][RTW89_IC][1][105] = -26, -+ [1][1][RTW89_KCC][1][105] = -14, -+ [1][1][RTW89_KCC][0][105] = 127, -+ [1][1][RTW89_ACMA][1][105] = 127, -+ [1][1][RTW89_ACMA][0][105] = 127, -+ [1][1][RTW89_CHILE][1][105] = 127, -+ [1][1][RTW89_QATAR][1][105] = 127, -+ [1][1][RTW89_QATAR][0][105] = 127, -+ [1][1][RTW89_UK][1][105] = 127, -+ [1][1][RTW89_UK][0][105] = 127, -+ [1][1][RTW89_FCC][1][107] = -22, -+ [1][1][RTW89_FCC][2][107] = 127, -+ [1][1][RTW89_ETSI][1][107] = 127, -+ [1][1][RTW89_ETSI][0][107] = 127, -+ [1][1][RTW89_MKK][1][107] = 127, -+ [1][1][RTW89_MKK][0][107] = 127, -+ [1][1][RTW89_IC][1][107] = -22, -+ [1][1][RTW89_KCC][1][107] = -14, -+ [1][1][RTW89_KCC][0][107] = 127, -+ [1][1][RTW89_ACMA][1][107] = 127, -+ [1][1][RTW89_ACMA][0][107] = 127, -+ [1][1][RTW89_CHILE][1][107] = 127, -+ [1][1][RTW89_QATAR][1][107] = 127, -+ [1][1][RTW89_QATAR][0][107] = 127, -+ [1][1][RTW89_UK][1][107] = 127, -+ [1][1][RTW89_UK][0][107] = 127, -+ [1][1][RTW89_FCC][1][109] = -22, -+ [1][1][RTW89_FCC][2][109] = 127, -+ [1][1][RTW89_ETSI][1][109] = 127, -+ [1][1][RTW89_ETSI][0][109] = 127, -+ [1][1][RTW89_MKK][1][109] = 127, -+ [1][1][RTW89_MKK][0][109] = 127, -+ [1][1][RTW89_IC][1][109] = -22, -+ [1][1][RTW89_KCC][1][109] = 127, -+ [1][1][RTW89_KCC][0][109] = 127, -+ [1][1][RTW89_ACMA][1][109] = 127, -+ [1][1][RTW89_ACMA][0][109] = 127, -+ [1][1][RTW89_CHILE][1][109] = 127, -+ [1][1][RTW89_QATAR][1][109] = 127, -+ [1][1][RTW89_QATAR][0][109] = 127, -+ [1][1][RTW89_UK][1][109] = 127, -+ [1][1][RTW89_UK][0][109] = 127, -+ [1][1][RTW89_FCC][1][111] = 127, -+ [1][1][RTW89_FCC][2][111] = 127, -+ [1][1][RTW89_ETSI][1][111] = 127, -+ [1][1][RTW89_ETSI][0][111] = 127, -+ [1][1][RTW89_MKK][1][111] = 127, -+ [1][1][RTW89_MKK][0][111] = 127, -+ [1][1][RTW89_IC][1][111] = 127, -+ [1][1][RTW89_KCC][1][111] = 127, -+ [1][1][RTW89_KCC][0][111] = 127, -+ [1][1][RTW89_ACMA][1][111] = 127, -+ [1][1][RTW89_ACMA][0][111] = 127, -+ [1][1][RTW89_CHILE][1][111] = 127, -+ [1][1][RTW89_QATAR][1][111] = 127, -+ [1][1][RTW89_QATAR][0][111] = 127, -+ [1][1][RTW89_UK][1][111] = 127, -+ [1][1][RTW89_UK][0][111] = 127, -+ [1][1][RTW89_FCC][1][113] = 127, -+ [1][1][RTW89_FCC][2][113] = 127, -+ [1][1][RTW89_ETSI][1][113] = 127, -+ [1][1][RTW89_ETSI][0][113] = 127, -+ [1][1][RTW89_MKK][1][113] = 127, -+ [1][1][RTW89_MKK][0][113] = 127, -+ [1][1][RTW89_IC][1][113] = 127, -+ [1][1][RTW89_KCC][1][113] = 127, -+ [1][1][RTW89_KCC][0][113] = 127, -+ [1][1][RTW89_ACMA][1][113] = 127, -+ [1][1][RTW89_ACMA][0][113] = 127, -+ [1][1][RTW89_CHILE][1][113] = 127, -+ [1][1][RTW89_QATAR][1][113] = 127, -+ [1][1][RTW89_QATAR][0][113] = 127, -+ [1][1][RTW89_UK][1][113] = 127, -+ [1][1][RTW89_UK][0][113] = 127, -+ [1][1][RTW89_FCC][1][115] = 127, -+ [1][1][RTW89_FCC][2][115] = 127, -+ [1][1][RTW89_ETSI][1][115] = 127, -+ [1][1][RTW89_ETSI][0][115] = 127, -+ [1][1][RTW89_MKK][1][115] = 127, -+ [1][1][RTW89_MKK][0][115] = 127, -+ [1][1][RTW89_IC][1][115] = 127, -+ [1][1][RTW89_KCC][1][115] = 127, -+ [1][1][RTW89_KCC][0][115] = 127, -+ [1][1][RTW89_ACMA][1][115] = 127, -+ [1][1][RTW89_ACMA][0][115] = 127, -+ [1][1][RTW89_CHILE][1][115] = 127, -+ [1][1][RTW89_QATAR][1][115] = 127, -+ [1][1][RTW89_QATAR][0][115] = 127, -+ [1][1][RTW89_UK][1][115] = 127, -+ [1][1][RTW89_UK][0][115] = 127, -+ [1][1][RTW89_FCC][1][117] = 127, -+ [1][1][RTW89_FCC][2][117] = 127, -+ [1][1][RTW89_ETSI][1][117] = 127, -+ [1][1][RTW89_ETSI][0][117] = 127, -+ [1][1][RTW89_MKK][1][117] = 127, -+ [1][1][RTW89_MKK][0][117] = 127, -+ [1][1][RTW89_IC][1][117] = 127, -+ [1][1][RTW89_KCC][1][117] = 127, -+ [1][1][RTW89_KCC][0][117] = 127, -+ [1][1][RTW89_ACMA][1][117] = 127, -+ [1][1][RTW89_ACMA][0][117] = 127, -+ [1][1][RTW89_CHILE][1][117] = 127, -+ [1][1][RTW89_QATAR][1][117] = 127, -+ [1][1][RTW89_QATAR][0][117] = 127, -+ [1][1][RTW89_UK][1][117] = 127, -+ [1][1][RTW89_UK][0][117] = 127, -+ [1][1][RTW89_FCC][1][119] = 127, -+ [1][1][RTW89_FCC][2][119] = 127, -+ [1][1][RTW89_ETSI][1][119] = 127, -+ [1][1][RTW89_ETSI][0][119] = 127, -+ [1][1][RTW89_MKK][1][119] = 127, -+ [1][1][RTW89_MKK][0][119] = 127, -+ [1][1][RTW89_IC][1][119] = 127, -+ [1][1][RTW89_KCC][1][119] = 127, -+ [1][1][RTW89_KCC][0][119] = 127, -+ [1][1][RTW89_ACMA][1][119] = 127, -+ [1][1][RTW89_ACMA][0][119] = 127, -+ [1][1][RTW89_CHILE][1][119] = 127, -+ [1][1][RTW89_QATAR][1][119] = 127, -+ [1][1][RTW89_QATAR][0][119] = 127, -+ [1][1][RTW89_UK][1][119] = 127, -+ [1][1][RTW89_UK][0][119] = 127, -+ [2][0][RTW89_FCC][1][0] = 8, -+ [2][0][RTW89_FCC][2][0] = 60, -+ [2][0][RTW89_ETSI][1][0] = 56, -+ [2][0][RTW89_ETSI][0][0] = 18, -+ [2][0][RTW89_MKK][1][0] = 54, -+ [2][0][RTW89_MKK][0][0] = 14, -+ [2][0][RTW89_IC][1][0] = 8, -+ [2][0][RTW89_KCC][1][0] = -2, -+ [2][0][RTW89_KCC][0][0] = -2, -+ [2][0][RTW89_ACMA][1][0] = 56, -+ [2][0][RTW89_ACMA][0][0] = 18, -+ [2][0][RTW89_CHILE][1][0] = 8, -+ [2][0][RTW89_QATAR][1][0] = 56, -+ [2][0][RTW89_QATAR][0][0] = 18, -+ [2][0][RTW89_UK][1][0] = 56, -+ [2][0][RTW89_UK][0][0] = 18, -+ [2][0][RTW89_FCC][1][2] = 8, -+ [2][0][RTW89_FCC][2][2] = 60, -+ [2][0][RTW89_ETSI][1][2] = 56, -+ [2][0][RTW89_ETSI][0][2] = 18, -+ [2][0][RTW89_MKK][1][2] = 54, -+ [2][0][RTW89_MKK][0][2] = 14, -+ [2][0][RTW89_IC][1][2] = 8, -+ [2][0][RTW89_KCC][1][2] = -2, -+ [2][0][RTW89_KCC][0][2] = -2, -+ [2][0][RTW89_ACMA][1][2] = 56, -+ [2][0][RTW89_ACMA][0][2] = 18, -+ [2][0][RTW89_CHILE][1][2] = 8, -+ [2][0][RTW89_QATAR][1][2] = 56, -+ [2][0][RTW89_QATAR][0][2] = 18, -+ [2][0][RTW89_UK][1][2] = 56, -+ [2][0][RTW89_UK][0][2] = 18, -+ [2][0][RTW89_FCC][1][4] = 8, -+ [2][0][RTW89_FCC][2][4] = 60, -+ [2][0][RTW89_ETSI][1][4] = 56, -+ [2][0][RTW89_ETSI][0][4] = 18, -+ [2][0][RTW89_MKK][1][4] = 54, -+ [2][0][RTW89_MKK][0][4] = 14, -+ [2][0][RTW89_IC][1][4] = 8, -+ [2][0][RTW89_KCC][1][4] = -2, -+ [2][0][RTW89_KCC][0][4] = -2, -+ [2][0][RTW89_ACMA][1][4] = 56, -+ [2][0][RTW89_ACMA][0][4] = 18, -+ [2][0][RTW89_CHILE][1][4] = 8, -+ [2][0][RTW89_QATAR][1][4] = 56, -+ [2][0][RTW89_QATAR][0][4] = 18, -+ [2][0][RTW89_UK][1][4] = 56, -+ [2][0][RTW89_UK][0][4] = 18, -+ [2][0][RTW89_FCC][1][6] = 8, -+ [2][0][RTW89_FCC][2][6] = 60, -+ [2][0][RTW89_ETSI][1][6] = 56, -+ [2][0][RTW89_ETSI][0][6] = 18, -+ [2][0][RTW89_MKK][1][6] = 54, -+ [2][0][RTW89_MKK][0][6] = 14, -+ [2][0][RTW89_IC][1][6] = 8, -+ [2][0][RTW89_KCC][1][6] = -2, -+ [2][0][RTW89_KCC][0][6] = -2, -+ [2][0][RTW89_ACMA][1][6] = 56, -+ [2][0][RTW89_ACMA][0][6] = 18, -+ [2][0][RTW89_CHILE][1][6] = 8, -+ [2][0][RTW89_QATAR][1][6] = 56, -+ [2][0][RTW89_QATAR][0][6] = 18, -+ [2][0][RTW89_UK][1][6] = 56, -+ [2][0][RTW89_UK][0][6] = 18, -+ [2][0][RTW89_FCC][1][8] = 8, -+ [2][0][RTW89_FCC][2][8] = 60, -+ [2][0][RTW89_ETSI][1][8] = 56, -+ [2][0][RTW89_ETSI][0][8] = 18, -+ [2][0][RTW89_MKK][1][8] = 54, -+ [2][0][RTW89_MKK][0][8] = 14, -+ [2][0][RTW89_IC][1][8] = 8, -+ [2][0][RTW89_KCC][1][8] = -2, -+ [2][0][RTW89_KCC][0][8] = -2, -+ [2][0][RTW89_ACMA][1][8] = 56, -+ [2][0][RTW89_ACMA][0][8] = 18, -+ [2][0][RTW89_CHILE][1][8] = 8, -+ [2][0][RTW89_QATAR][1][8] = 56, -+ [2][0][RTW89_QATAR][0][8] = 18, -+ [2][0][RTW89_UK][1][8] = 56, -+ [2][0][RTW89_UK][0][8] = 18, -+ [2][0][RTW89_FCC][1][10] = 8, -+ [2][0][RTW89_FCC][2][10] = 60, -+ [2][0][RTW89_ETSI][1][10] = 56, -+ [2][0][RTW89_ETSI][0][10] = 18, -+ [2][0][RTW89_MKK][1][10] = 54, -+ [2][0][RTW89_MKK][0][10] = 14, -+ [2][0][RTW89_IC][1][10] = 8, -+ [2][0][RTW89_KCC][1][10] = -2, -+ [2][0][RTW89_KCC][0][10] = -2, -+ [2][0][RTW89_ACMA][1][10] = 56, -+ [2][0][RTW89_ACMA][0][10] = 18, -+ [2][0][RTW89_CHILE][1][10] = 8, -+ [2][0][RTW89_QATAR][1][10] = 56, -+ [2][0][RTW89_QATAR][0][10] = 18, -+ [2][0][RTW89_UK][1][10] = 56, -+ [2][0][RTW89_UK][0][10] = 18, -+ [2][0][RTW89_FCC][1][12] = 8, -+ [2][0][RTW89_FCC][2][12] = 60, -+ [2][0][RTW89_ETSI][1][12] = 56, -+ [2][0][RTW89_ETSI][0][12] = 18, -+ [2][0][RTW89_MKK][1][12] = 54, -+ [2][0][RTW89_MKK][0][12] = 14, -+ [2][0][RTW89_IC][1][12] = 8, -+ [2][0][RTW89_KCC][1][12] = -2, -+ [2][0][RTW89_KCC][0][12] = -2, -+ [2][0][RTW89_ACMA][1][12] = 56, -+ [2][0][RTW89_ACMA][0][12] = 18, -+ [2][0][RTW89_CHILE][1][12] = 8, -+ [2][0][RTW89_QATAR][1][12] = 56, -+ [2][0][RTW89_QATAR][0][12] = 18, -+ [2][0][RTW89_UK][1][12] = 56, -+ [2][0][RTW89_UK][0][12] = 18, -+ [2][0][RTW89_FCC][1][14] = 8, -+ [2][0][RTW89_FCC][2][14] = 60, -+ [2][0][RTW89_ETSI][1][14] = 56, -+ [2][0][RTW89_ETSI][0][14] = 18, -+ [2][0][RTW89_MKK][1][14] = 54, -+ [2][0][RTW89_MKK][0][14] = 14, -+ [2][0][RTW89_IC][1][14] = 8, -+ [2][0][RTW89_KCC][1][14] = -2, -+ [2][0][RTW89_KCC][0][14] = -2, -+ [2][0][RTW89_ACMA][1][14] = 56, -+ [2][0][RTW89_ACMA][0][14] = 18, -+ [2][0][RTW89_CHILE][1][14] = 8, -+ [2][0][RTW89_QATAR][1][14] = 56, -+ [2][0][RTW89_QATAR][0][14] = 18, -+ [2][0][RTW89_UK][1][14] = 56, -+ [2][0][RTW89_UK][0][14] = 18, -+ [2][0][RTW89_FCC][1][15] = 8, -+ [2][0][RTW89_FCC][2][15] = 60, -+ [2][0][RTW89_ETSI][1][15] = 56, -+ [2][0][RTW89_ETSI][0][15] = 18, -+ [2][0][RTW89_MKK][1][15] = 54, -+ [2][0][RTW89_MKK][0][15] = 14, -+ [2][0][RTW89_IC][1][15] = 8, -+ [2][0][RTW89_KCC][1][15] = -2, -+ [2][0][RTW89_KCC][0][15] = -2, -+ [2][0][RTW89_ACMA][1][15] = 56, -+ [2][0][RTW89_ACMA][0][15] = 18, -+ [2][0][RTW89_CHILE][1][15] = 8, -+ [2][0][RTW89_QATAR][1][15] = 56, -+ [2][0][RTW89_QATAR][0][15] = 18, -+ [2][0][RTW89_UK][1][15] = 56, -+ [2][0][RTW89_UK][0][15] = 18, -+ [2][0][RTW89_FCC][1][17] = 8, -+ [2][0][RTW89_FCC][2][17] = 60, -+ [2][0][RTW89_ETSI][1][17] = 56, -+ [2][0][RTW89_ETSI][0][17] = 18, -+ [2][0][RTW89_MKK][1][17] = 54, -+ [2][0][RTW89_MKK][0][17] = 14, -+ [2][0][RTW89_IC][1][17] = 8, -+ [2][0][RTW89_KCC][1][17] = -2, -+ [2][0][RTW89_KCC][0][17] = -2, -+ [2][0][RTW89_ACMA][1][17] = 56, -+ [2][0][RTW89_ACMA][0][17] = 18, -+ [2][0][RTW89_CHILE][1][17] = 8, -+ [2][0][RTW89_QATAR][1][17] = 56, -+ [2][0][RTW89_QATAR][0][17] = 18, -+ [2][0][RTW89_UK][1][17] = 56, -+ [2][0][RTW89_UK][0][17] = 18, -+ [2][0][RTW89_FCC][1][19] = 8, -+ [2][0][RTW89_FCC][2][19] = 60, -+ [2][0][RTW89_ETSI][1][19] = 56, -+ [2][0][RTW89_ETSI][0][19] = 18, -+ [2][0][RTW89_MKK][1][19] = 54, -+ [2][0][RTW89_MKK][0][19] = 14, -+ [2][0][RTW89_IC][1][19] = 8, -+ [2][0][RTW89_KCC][1][19] = -2, -+ [2][0][RTW89_KCC][0][19] = -2, -+ [2][0][RTW89_ACMA][1][19] = 56, -+ [2][0][RTW89_ACMA][0][19] = 18, -+ [2][0][RTW89_CHILE][1][19] = 8, -+ [2][0][RTW89_QATAR][1][19] = 56, -+ [2][0][RTW89_QATAR][0][19] = 18, -+ [2][0][RTW89_UK][1][19] = 56, -+ [2][0][RTW89_UK][0][19] = 18, -+ [2][0][RTW89_FCC][1][21] = 8, -+ [2][0][RTW89_FCC][2][21] = 60, -+ [2][0][RTW89_ETSI][1][21] = 56, -+ [2][0][RTW89_ETSI][0][21] = 18, -+ [2][0][RTW89_MKK][1][21] = 54, -+ [2][0][RTW89_MKK][0][21] = 14, -+ [2][0][RTW89_IC][1][21] = 8, -+ [2][0][RTW89_KCC][1][21] = -2, -+ [2][0][RTW89_KCC][0][21] = -2, -+ [2][0][RTW89_ACMA][1][21] = 56, -+ [2][0][RTW89_ACMA][0][21] = 18, -+ [2][0][RTW89_CHILE][1][21] = 8, -+ [2][0][RTW89_QATAR][1][21] = 56, -+ [2][0][RTW89_QATAR][0][21] = 18, -+ [2][0][RTW89_UK][1][21] = 56, -+ [2][0][RTW89_UK][0][21] = 18, -+ [2][0][RTW89_FCC][1][23] = 8, -+ [2][0][RTW89_FCC][2][23] = 78, -+ [2][0][RTW89_ETSI][1][23] = 56, -+ [2][0][RTW89_ETSI][0][23] = 18, -+ [2][0][RTW89_MKK][1][23] = 56, -+ [2][0][RTW89_MKK][0][23] = 14, -+ [2][0][RTW89_IC][1][23] = 8, -+ [2][0][RTW89_KCC][1][23] = -2, -+ [2][0][RTW89_KCC][0][23] = -2, -+ [2][0][RTW89_ACMA][1][23] = 56, -+ [2][0][RTW89_ACMA][0][23] = 18, -+ [2][0][RTW89_CHILE][1][23] = 8, -+ [2][0][RTW89_QATAR][1][23] = 56, -+ [2][0][RTW89_QATAR][0][23] = 18, -+ [2][0][RTW89_UK][1][23] = 56, -+ [2][0][RTW89_UK][0][23] = 18, -+ [2][0][RTW89_FCC][1][25] = 8, -+ [2][0][RTW89_FCC][2][25] = 78, -+ [2][0][RTW89_ETSI][1][25] = 56, -+ [2][0][RTW89_ETSI][0][25] = 18, -+ [2][0][RTW89_MKK][1][25] = 56, -+ [2][0][RTW89_MKK][0][25] = 14, -+ [2][0][RTW89_IC][1][25] = 8, -+ [2][0][RTW89_KCC][1][25] = -2, -+ [2][0][RTW89_KCC][0][25] = -2, -+ [2][0][RTW89_ACMA][1][25] = 56, -+ [2][0][RTW89_ACMA][0][25] = 18, -+ [2][0][RTW89_CHILE][1][25] = 8, -+ [2][0][RTW89_QATAR][1][25] = 56, -+ [2][0][RTW89_QATAR][0][25] = 18, -+ [2][0][RTW89_UK][1][25] = 56, -+ [2][0][RTW89_UK][0][25] = 18, -+ [2][0][RTW89_FCC][1][27] = 8, -+ [2][0][RTW89_FCC][2][27] = 78, -+ [2][0][RTW89_ETSI][1][27] = 56, -+ [2][0][RTW89_ETSI][0][27] = 18, -+ [2][0][RTW89_MKK][1][27] = 56, -+ [2][0][RTW89_MKK][0][27] = 14, -+ [2][0][RTW89_IC][1][27] = 8, -+ [2][0][RTW89_KCC][1][27] = -2, -+ [2][0][RTW89_KCC][0][27] = -2, -+ [2][0][RTW89_ACMA][1][27] = 56, -+ [2][0][RTW89_ACMA][0][27] = 18, -+ [2][0][RTW89_CHILE][1][27] = 8, -+ [2][0][RTW89_QATAR][1][27] = 56, -+ [2][0][RTW89_QATAR][0][27] = 18, -+ [2][0][RTW89_UK][1][27] = 56, -+ [2][0][RTW89_UK][0][27] = 18, -+ [2][0][RTW89_FCC][1][29] = 8, -+ [2][0][RTW89_FCC][2][29] = 78, -+ [2][0][RTW89_ETSI][1][29] = 56, -+ [2][0][RTW89_ETSI][0][29] = 18, -+ [2][0][RTW89_MKK][1][29] = 56, -+ [2][0][RTW89_MKK][0][29] = 14, -+ [2][0][RTW89_IC][1][29] = 8, -+ [2][0][RTW89_KCC][1][29] = -2, -+ [2][0][RTW89_KCC][0][29] = -2, -+ [2][0][RTW89_ACMA][1][29] = 56, -+ [2][0][RTW89_ACMA][0][29] = 18, -+ [2][0][RTW89_CHILE][1][29] = 8, -+ [2][0][RTW89_QATAR][1][29] = 56, -+ [2][0][RTW89_QATAR][0][29] = 18, -+ [2][0][RTW89_UK][1][29] = 56, -+ [2][0][RTW89_UK][0][29] = 18, -+ [2][0][RTW89_FCC][1][30] = 8, -+ [2][0][RTW89_FCC][2][30] = 78, -+ [2][0][RTW89_ETSI][1][30] = 56, -+ [2][0][RTW89_ETSI][0][30] = 18, -+ [2][0][RTW89_MKK][1][30] = 56, -+ [2][0][RTW89_MKK][0][30] = 14, -+ [2][0][RTW89_IC][1][30] = 8, -+ [2][0][RTW89_KCC][1][30] = -2, -+ [2][0][RTW89_KCC][0][30] = -2, -+ [2][0][RTW89_ACMA][1][30] = 56, -+ [2][0][RTW89_ACMA][0][30] = 18, -+ [2][0][RTW89_CHILE][1][30] = 8, -+ [2][0][RTW89_QATAR][1][30] = 56, -+ [2][0][RTW89_QATAR][0][30] = 18, -+ [2][0][RTW89_UK][1][30] = 56, -+ [2][0][RTW89_UK][0][30] = 18, -+ [2][0][RTW89_FCC][1][32] = 8, -+ [2][0][RTW89_FCC][2][32] = 78, -+ [2][0][RTW89_ETSI][1][32] = 56, -+ [2][0][RTW89_ETSI][0][32] = 18, -+ [2][0][RTW89_MKK][1][32] = 56, -+ [2][0][RTW89_MKK][0][32] = 14, -+ [2][0][RTW89_IC][1][32] = 8, -+ [2][0][RTW89_KCC][1][32] = -2, -+ [2][0][RTW89_KCC][0][32] = -2, -+ [2][0][RTW89_ACMA][1][32] = 56, -+ [2][0][RTW89_ACMA][0][32] = 18, -+ [2][0][RTW89_CHILE][1][32] = 8, -+ [2][0][RTW89_QATAR][1][32] = 56, -+ [2][0][RTW89_QATAR][0][32] = 18, -+ [2][0][RTW89_UK][1][32] = 56, -+ [2][0][RTW89_UK][0][32] = 18, -+ [2][0][RTW89_FCC][1][34] = 8, -+ [2][0][RTW89_FCC][2][34] = 78, -+ [2][0][RTW89_ETSI][1][34] = 56, -+ [2][0][RTW89_ETSI][0][34] = 18, -+ [2][0][RTW89_MKK][1][34] = 56, -+ [2][0][RTW89_MKK][0][34] = 14, -+ [2][0][RTW89_IC][1][34] = 8, -+ [2][0][RTW89_KCC][1][34] = -2, -+ [2][0][RTW89_KCC][0][34] = -2, -+ [2][0][RTW89_ACMA][1][34] = 56, -+ [2][0][RTW89_ACMA][0][34] = 18, -+ [2][0][RTW89_CHILE][1][34] = 8, -+ [2][0][RTW89_QATAR][1][34] = 56, -+ [2][0][RTW89_QATAR][0][34] = 18, -+ [2][0][RTW89_UK][1][34] = 56, -+ [2][0][RTW89_UK][0][34] = 18, -+ [2][0][RTW89_FCC][1][36] = 8, -+ [2][0][RTW89_FCC][2][36] = 78, -+ [2][0][RTW89_ETSI][1][36] = 56, -+ [2][0][RTW89_ETSI][0][36] = 18, -+ [2][0][RTW89_MKK][1][36] = 56, -+ [2][0][RTW89_MKK][0][36] = 14, -+ [2][0][RTW89_IC][1][36] = 8, -+ [2][0][RTW89_KCC][1][36] = -2, -+ [2][0][RTW89_KCC][0][36] = -2, -+ [2][0][RTW89_ACMA][1][36] = 56, -+ [2][0][RTW89_ACMA][0][36] = 18, -+ [2][0][RTW89_CHILE][1][36] = 8, -+ [2][0][RTW89_QATAR][1][36] = 56, -+ [2][0][RTW89_QATAR][0][36] = 18, -+ [2][0][RTW89_UK][1][36] = 56, -+ [2][0][RTW89_UK][0][36] = 18, -+ [2][0][RTW89_FCC][1][38] = 8, -+ [2][0][RTW89_FCC][2][38] = 78, -+ [2][0][RTW89_ETSI][1][38] = 56, -+ [2][0][RTW89_ETSI][0][38] = 18, -+ [2][0][RTW89_MKK][1][38] = 56, -+ [2][0][RTW89_MKK][0][38] = 14, -+ [2][0][RTW89_IC][1][38] = 8, -+ [2][0][RTW89_KCC][1][38] = -2, -+ [2][0][RTW89_KCC][0][38] = -2, -+ [2][0][RTW89_ACMA][1][38] = 56, -+ [2][0][RTW89_ACMA][0][38] = 18, -+ [2][0][RTW89_CHILE][1][38] = 8, -+ [2][0][RTW89_QATAR][1][38] = 56, -+ [2][0][RTW89_QATAR][0][38] = 18, -+ [2][0][RTW89_UK][1][38] = 56, -+ [2][0][RTW89_UK][0][38] = 18, -+ [2][0][RTW89_FCC][1][40] = 8, -+ [2][0][RTW89_FCC][2][40] = 78, -+ [2][0][RTW89_ETSI][1][40] = 56, -+ [2][0][RTW89_ETSI][0][40] = 18, -+ [2][0][RTW89_MKK][1][40] = 56, -+ [2][0][RTW89_MKK][0][40] = 14, -+ [2][0][RTW89_IC][1][40] = 8, -+ [2][0][RTW89_KCC][1][40] = -2, -+ [2][0][RTW89_KCC][0][40] = -2, -+ [2][0][RTW89_ACMA][1][40] = 56, -+ [2][0][RTW89_ACMA][0][40] = 18, -+ [2][0][RTW89_CHILE][1][40] = 8, -+ [2][0][RTW89_QATAR][1][40] = 56, -+ [2][0][RTW89_QATAR][0][40] = 18, -+ [2][0][RTW89_UK][1][40] = 56, -+ [2][0][RTW89_UK][0][40] = 18, -+ [2][0][RTW89_FCC][1][42] = 8, -+ [2][0][RTW89_FCC][2][42] = 78, -+ [2][0][RTW89_ETSI][1][42] = 56, -+ [2][0][RTW89_ETSI][0][42] = 18, -+ [2][0][RTW89_MKK][1][42] = 56, -+ [2][0][RTW89_MKK][0][42] = 14, -+ [2][0][RTW89_IC][1][42] = 8, -+ [2][0][RTW89_KCC][1][42] = -2, -+ [2][0][RTW89_KCC][0][42] = -2, -+ [2][0][RTW89_ACMA][1][42] = 56, -+ [2][0][RTW89_ACMA][0][42] = 18, -+ [2][0][RTW89_CHILE][1][42] = 8, -+ [2][0][RTW89_QATAR][1][42] = 56, -+ [2][0][RTW89_QATAR][0][42] = 18, -+ [2][0][RTW89_UK][1][42] = 56, -+ [2][0][RTW89_UK][0][42] = 18, -+ [2][0][RTW89_FCC][1][44] = 8, -+ [2][0][RTW89_FCC][2][44] = 78, -+ [2][0][RTW89_ETSI][1][44] = 56, -+ [2][0][RTW89_ETSI][0][44] = 18, -+ [2][0][RTW89_MKK][1][44] = 32, -+ [2][0][RTW89_MKK][0][44] = 14, -+ [2][0][RTW89_IC][1][44] = 8, -+ [2][0][RTW89_KCC][1][44] = -2, -+ [2][0][RTW89_KCC][0][44] = -2, -+ [2][0][RTW89_ACMA][1][44] = 56, -+ [2][0][RTW89_ACMA][0][44] = 18, -+ [2][0][RTW89_CHILE][1][44] = 8, -+ [2][0][RTW89_QATAR][1][44] = 56, -+ [2][0][RTW89_QATAR][0][44] = 18, -+ [2][0][RTW89_UK][1][44] = 56, -+ [2][0][RTW89_UK][0][44] = 18, -+ [2][0][RTW89_FCC][1][45] = 8, -+ [2][0][RTW89_FCC][2][45] = 127, -+ [2][0][RTW89_ETSI][1][45] = 127, -+ [2][0][RTW89_ETSI][0][45] = 127, -+ [2][0][RTW89_MKK][1][45] = 127, -+ [2][0][RTW89_MKK][0][45] = 127, -+ [2][0][RTW89_IC][1][45] = 8, -+ [2][0][RTW89_KCC][1][45] = -2, -+ [2][0][RTW89_KCC][0][45] = 127, -+ [2][0][RTW89_ACMA][1][45] = 127, -+ [2][0][RTW89_ACMA][0][45] = 127, -+ [2][0][RTW89_CHILE][1][45] = 127, -+ [2][0][RTW89_QATAR][1][45] = 127, -+ [2][0][RTW89_QATAR][0][45] = 127, -+ [2][0][RTW89_UK][1][45] = 127, -+ [2][0][RTW89_UK][0][45] = 127, -+ [2][0][RTW89_FCC][1][47] = 8, -+ [2][0][RTW89_FCC][2][47] = 127, -+ [2][0][RTW89_ETSI][1][47] = 127, -+ [2][0][RTW89_ETSI][0][47] = 127, -+ [2][0][RTW89_MKK][1][47] = 127, -+ [2][0][RTW89_MKK][0][47] = 127, -+ [2][0][RTW89_IC][1][47] = 8, -+ [2][0][RTW89_KCC][1][47] = -2, -+ [2][0][RTW89_KCC][0][47] = 127, -+ [2][0][RTW89_ACMA][1][47] = 127, -+ [2][0][RTW89_ACMA][0][47] = 127, -+ [2][0][RTW89_CHILE][1][47] = 127, -+ [2][0][RTW89_QATAR][1][47] = 127, -+ [2][0][RTW89_QATAR][0][47] = 127, -+ [2][0][RTW89_UK][1][47] = 127, -+ [2][0][RTW89_UK][0][47] = 127, -+ [2][0][RTW89_FCC][1][49] = 8, -+ [2][0][RTW89_FCC][2][49] = 127, -+ [2][0][RTW89_ETSI][1][49] = 127, -+ [2][0][RTW89_ETSI][0][49] = 127, -+ [2][0][RTW89_MKK][1][49] = 127, -+ [2][0][RTW89_MKK][0][49] = 127, -+ [2][0][RTW89_IC][1][49] = 8, -+ [2][0][RTW89_KCC][1][49] = -2, -+ [2][0][RTW89_KCC][0][49] = 127, -+ [2][0][RTW89_ACMA][1][49] = 127, -+ [2][0][RTW89_ACMA][0][49] = 127, -+ [2][0][RTW89_CHILE][1][49] = 127, -+ [2][0][RTW89_QATAR][1][49] = 127, -+ [2][0][RTW89_QATAR][0][49] = 127, -+ [2][0][RTW89_UK][1][49] = 127, -+ [2][0][RTW89_UK][0][49] = 127, -+ [2][0][RTW89_FCC][1][51] = 8, -+ [2][0][RTW89_FCC][2][51] = 127, -+ [2][0][RTW89_ETSI][1][51] = 127, -+ [2][0][RTW89_ETSI][0][51] = 127, -+ [2][0][RTW89_MKK][1][51] = 127, -+ [2][0][RTW89_MKK][0][51] = 127, -+ [2][0][RTW89_IC][1][51] = 8, -+ [2][0][RTW89_KCC][1][51] = -2, -+ [2][0][RTW89_KCC][0][51] = 127, -+ [2][0][RTW89_ACMA][1][51] = 127, -+ [2][0][RTW89_ACMA][0][51] = 127, -+ [2][0][RTW89_CHILE][1][51] = 127, -+ [2][0][RTW89_QATAR][1][51] = 127, -+ [2][0][RTW89_QATAR][0][51] = 127, -+ [2][0][RTW89_UK][1][51] = 127, -+ [2][0][RTW89_UK][0][51] = 127, -+ [2][0][RTW89_FCC][1][53] = 8, -+ [2][0][RTW89_FCC][2][53] = 127, -+ [2][0][RTW89_ETSI][1][53] = 127, -+ [2][0][RTW89_ETSI][0][53] = 127, -+ [2][0][RTW89_MKK][1][53] = 127, -+ [2][0][RTW89_MKK][0][53] = 127, -+ [2][0][RTW89_IC][1][53] = 8, -+ [2][0][RTW89_KCC][1][53] = -2, -+ [2][0][RTW89_KCC][0][53] = 127, -+ [2][0][RTW89_ACMA][1][53] = 127, -+ [2][0][RTW89_ACMA][0][53] = 127, -+ [2][0][RTW89_CHILE][1][53] = 127, -+ [2][0][RTW89_QATAR][1][53] = 127, -+ [2][0][RTW89_QATAR][0][53] = 127, -+ [2][0][RTW89_UK][1][53] = 127, -+ [2][0][RTW89_UK][0][53] = 127, -+ [2][0][RTW89_FCC][1][55] = 8, -+ [2][0][RTW89_FCC][2][55] = 78, -+ [2][0][RTW89_ETSI][1][55] = 127, -+ [2][0][RTW89_ETSI][0][55] = 127, -+ [2][0][RTW89_MKK][1][55] = 127, -+ [2][0][RTW89_MKK][0][55] = 127, -+ [2][0][RTW89_IC][1][55] = 8, -+ [2][0][RTW89_KCC][1][55] = -2, -+ [2][0][RTW89_KCC][0][55] = 127, -+ [2][0][RTW89_ACMA][1][55] = 127, -+ [2][0][RTW89_ACMA][0][55] = 127, -+ [2][0][RTW89_CHILE][1][55] = 127, -+ [2][0][RTW89_QATAR][1][55] = 127, -+ [2][0][RTW89_QATAR][0][55] = 127, -+ [2][0][RTW89_UK][1][55] = 127, -+ [2][0][RTW89_UK][0][55] = 127, -+ [2][0][RTW89_FCC][1][57] = 8, -+ [2][0][RTW89_FCC][2][57] = 78, -+ [2][0][RTW89_ETSI][1][57] = 127, -+ [2][0][RTW89_ETSI][0][57] = 127, -+ [2][0][RTW89_MKK][1][57] = 127, -+ [2][0][RTW89_MKK][0][57] = 127, -+ [2][0][RTW89_IC][1][57] = 8, -+ [2][0][RTW89_KCC][1][57] = -2, -+ [2][0][RTW89_KCC][0][57] = 127, -+ [2][0][RTW89_ACMA][1][57] = 127, -+ [2][0][RTW89_ACMA][0][57] = 127, -+ [2][0][RTW89_CHILE][1][57] = 127, -+ [2][0][RTW89_QATAR][1][57] = 127, -+ [2][0][RTW89_QATAR][0][57] = 127, -+ [2][0][RTW89_UK][1][57] = 127, -+ [2][0][RTW89_UK][0][57] = 127, -+ [2][0][RTW89_FCC][1][59] = 8, -+ [2][0][RTW89_FCC][2][59] = 78, -+ [2][0][RTW89_ETSI][1][59] = 127, -+ [2][0][RTW89_ETSI][0][59] = 127, -+ [2][0][RTW89_MKK][1][59] = 127, -+ [2][0][RTW89_MKK][0][59] = 127, -+ [2][0][RTW89_IC][1][59] = 8, -+ [2][0][RTW89_KCC][1][59] = -2, -+ [2][0][RTW89_KCC][0][59] = 127, -+ [2][0][RTW89_ACMA][1][59] = 127, -+ [2][0][RTW89_ACMA][0][59] = 127, -+ [2][0][RTW89_CHILE][1][59] = 127, -+ [2][0][RTW89_QATAR][1][59] = 127, -+ [2][0][RTW89_QATAR][0][59] = 127, -+ [2][0][RTW89_UK][1][59] = 127, -+ [2][0][RTW89_UK][0][59] = 127, -+ [2][0][RTW89_FCC][1][60] = 8, -+ [2][0][RTW89_FCC][2][60] = 78, -+ [2][0][RTW89_ETSI][1][60] = 127, -+ [2][0][RTW89_ETSI][0][60] = 127, -+ [2][0][RTW89_MKK][1][60] = 127, -+ [2][0][RTW89_MKK][0][60] = 127, -+ [2][0][RTW89_IC][1][60] = 8, -+ [2][0][RTW89_KCC][1][60] = -2, -+ [2][0][RTW89_KCC][0][60] = 127, -+ [2][0][RTW89_ACMA][1][60] = 127, -+ [2][0][RTW89_ACMA][0][60] = 127, -+ [2][0][RTW89_CHILE][1][60] = 127, -+ [2][0][RTW89_QATAR][1][60] = 127, -+ [2][0][RTW89_QATAR][0][60] = 127, -+ [2][0][RTW89_UK][1][60] = 127, -+ [2][0][RTW89_UK][0][60] = 127, -+ [2][0][RTW89_FCC][1][62] = 8, -+ [2][0][RTW89_FCC][2][62] = 78, -+ [2][0][RTW89_ETSI][1][62] = 127, -+ [2][0][RTW89_ETSI][0][62] = 127, -+ [2][0][RTW89_MKK][1][62] = 127, -+ [2][0][RTW89_MKK][0][62] = 127, -+ [2][0][RTW89_IC][1][62] = 8, -+ [2][0][RTW89_KCC][1][62] = -2, -+ [2][0][RTW89_KCC][0][62] = 127, -+ [2][0][RTW89_ACMA][1][62] = 127, -+ [2][0][RTW89_ACMA][0][62] = 127, -+ [2][0][RTW89_CHILE][1][62] = 127, -+ [2][0][RTW89_QATAR][1][62] = 127, -+ [2][0][RTW89_QATAR][0][62] = 127, -+ [2][0][RTW89_UK][1][62] = 127, -+ [2][0][RTW89_UK][0][62] = 127, -+ [2][0][RTW89_FCC][1][64] = 8, -+ [2][0][RTW89_FCC][2][64] = 78, -+ [2][0][RTW89_ETSI][1][64] = 127, -+ [2][0][RTW89_ETSI][0][64] = 127, -+ [2][0][RTW89_MKK][1][64] = 127, -+ [2][0][RTW89_MKK][0][64] = 127, -+ [2][0][RTW89_IC][1][64] = 8, -+ [2][0][RTW89_KCC][1][64] = -2, -+ [2][0][RTW89_KCC][0][64] = 127, -+ [2][0][RTW89_ACMA][1][64] = 127, -+ [2][0][RTW89_ACMA][0][64] = 127, -+ [2][0][RTW89_CHILE][1][64] = 127, -+ [2][0][RTW89_QATAR][1][64] = 127, -+ [2][0][RTW89_QATAR][0][64] = 127, -+ [2][0][RTW89_UK][1][64] = 127, -+ [2][0][RTW89_UK][0][64] = 127, -+ [2][0][RTW89_FCC][1][66] = 8, -+ [2][0][RTW89_FCC][2][66] = 78, -+ [2][0][RTW89_ETSI][1][66] = 127, -+ [2][0][RTW89_ETSI][0][66] = 127, -+ [2][0][RTW89_MKK][1][66] = 127, -+ [2][0][RTW89_MKK][0][66] = 127, -+ [2][0][RTW89_IC][1][66] = 8, -+ [2][0][RTW89_KCC][1][66] = -2, -+ [2][0][RTW89_KCC][0][66] = 127, -+ [2][0][RTW89_ACMA][1][66] = 127, -+ [2][0][RTW89_ACMA][0][66] = 127, -+ [2][0][RTW89_CHILE][1][66] = 127, -+ [2][0][RTW89_QATAR][1][66] = 127, -+ [2][0][RTW89_QATAR][0][66] = 127, -+ [2][0][RTW89_UK][1][66] = 127, -+ [2][0][RTW89_UK][0][66] = 127, -+ [2][0][RTW89_FCC][1][68] = 8, -+ [2][0][RTW89_FCC][2][68] = 78, -+ [2][0][RTW89_ETSI][1][68] = 127, -+ [2][0][RTW89_ETSI][0][68] = 127, -+ [2][0][RTW89_MKK][1][68] = 127, -+ [2][0][RTW89_MKK][0][68] = 127, -+ [2][0][RTW89_IC][1][68] = 8, -+ [2][0][RTW89_KCC][1][68] = -2, -+ [2][0][RTW89_KCC][0][68] = 127, -+ [2][0][RTW89_ACMA][1][68] = 127, -+ [2][0][RTW89_ACMA][0][68] = 127, -+ [2][0][RTW89_CHILE][1][68] = 127, -+ [2][0][RTW89_QATAR][1][68] = 127, -+ [2][0][RTW89_QATAR][0][68] = 127, -+ [2][0][RTW89_UK][1][68] = 127, -+ [2][0][RTW89_UK][0][68] = 127, -+ [2][0][RTW89_FCC][1][70] = 8, -+ [2][0][RTW89_FCC][2][70] = 78, -+ [2][0][RTW89_ETSI][1][70] = 127, -+ [2][0][RTW89_ETSI][0][70] = 127, -+ [2][0][RTW89_MKK][1][70] = 127, -+ [2][0][RTW89_MKK][0][70] = 127, -+ [2][0][RTW89_IC][1][70] = 8, -+ [2][0][RTW89_KCC][1][70] = -2, -+ [2][0][RTW89_KCC][0][70] = 127, -+ [2][0][RTW89_ACMA][1][70] = 127, -+ [2][0][RTW89_ACMA][0][70] = 127, -+ [2][0][RTW89_CHILE][1][70] = 127, -+ [2][0][RTW89_QATAR][1][70] = 127, -+ [2][0][RTW89_QATAR][0][70] = 127, -+ [2][0][RTW89_UK][1][70] = 127, -+ [2][0][RTW89_UK][0][70] = 127, -+ [2][0][RTW89_FCC][1][72] = 8, -+ [2][0][RTW89_FCC][2][72] = 78, -+ [2][0][RTW89_ETSI][1][72] = 127, -+ [2][0][RTW89_ETSI][0][72] = 127, -+ [2][0][RTW89_MKK][1][72] = 127, -+ [2][0][RTW89_MKK][0][72] = 127, -+ [2][0][RTW89_IC][1][72] = 8, -+ [2][0][RTW89_KCC][1][72] = -2, -+ [2][0][RTW89_KCC][0][72] = 127, -+ [2][0][RTW89_ACMA][1][72] = 127, -+ [2][0][RTW89_ACMA][0][72] = 127, -+ [2][0][RTW89_CHILE][1][72] = 127, -+ [2][0][RTW89_QATAR][1][72] = 127, -+ [2][0][RTW89_QATAR][0][72] = 127, -+ [2][0][RTW89_UK][1][72] = 127, -+ [2][0][RTW89_UK][0][72] = 127, -+ [2][0][RTW89_FCC][1][74] = 8, -+ [2][0][RTW89_FCC][2][74] = 78, -+ [2][0][RTW89_ETSI][1][74] = 127, -+ [2][0][RTW89_ETSI][0][74] = 127, -+ [2][0][RTW89_MKK][1][74] = 127, -+ [2][0][RTW89_MKK][0][74] = 127, -+ [2][0][RTW89_IC][1][74] = 8, -+ [2][0][RTW89_KCC][1][74] = -2, -+ [2][0][RTW89_KCC][0][74] = 127, -+ [2][0][RTW89_ACMA][1][74] = 127, -+ [2][0][RTW89_ACMA][0][74] = 127, -+ [2][0][RTW89_CHILE][1][74] = 127, -+ [2][0][RTW89_QATAR][1][74] = 127, -+ [2][0][RTW89_QATAR][0][74] = 127, -+ [2][0][RTW89_UK][1][74] = 127, -+ [2][0][RTW89_UK][0][74] = 127, -+ [2][0][RTW89_FCC][1][75] = 8, -+ [2][0][RTW89_FCC][2][75] = 78, -+ [2][0][RTW89_ETSI][1][75] = 127, -+ [2][0][RTW89_ETSI][0][75] = 127, -+ [2][0][RTW89_MKK][1][75] = 127, -+ [2][0][RTW89_MKK][0][75] = 127, -+ [2][0][RTW89_IC][1][75] = 8, -+ [2][0][RTW89_KCC][1][75] = -2, -+ [2][0][RTW89_KCC][0][75] = 127, -+ [2][0][RTW89_ACMA][1][75] = 127, -+ [2][0][RTW89_ACMA][0][75] = 127, -+ [2][0][RTW89_CHILE][1][75] = 127, -+ [2][0][RTW89_QATAR][1][75] = 127, -+ [2][0][RTW89_QATAR][0][75] = 127, -+ [2][0][RTW89_UK][1][75] = 127, -+ [2][0][RTW89_UK][0][75] = 127, -+ [2][0][RTW89_FCC][1][77] = 8, -+ [2][0][RTW89_FCC][2][77] = 78, -+ [2][0][RTW89_ETSI][1][77] = 127, -+ [2][0][RTW89_ETSI][0][77] = 127, -+ [2][0][RTW89_MKK][1][77] = 127, -+ [2][0][RTW89_MKK][0][77] = 127, -+ [2][0][RTW89_IC][1][77] = 8, -+ [2][0][RTW89_KCC][1][77] = -2, -+ [2][0][RTW89_KCC][0][77] = 127, -+ [2][0][RTW89_ACMA][1][77] = 127, -+ [2][0][RTW89_ACMA][0][77] = 127, -+ [2][0][RTW89_CHILE][1][77] = 127, -+ [2][0][RTW89_QATAR][1][77] = 127, -+ [2][0][RTW89_QATAR][0][77] = 127, -+ [2][0][RTW89_UK][1][77] = 127, -+ [2][0][RTW89_UK][0][77] = 127, -+ [2][0][RTW89_FCC][1][79] = 8, -+ [2][0][RTW89_FCC][2][79] = 78, -+ [2][0][RTW89_ETSI][1][79] = 127, -+ [2][0][RTW89_ETSI][0][79] = 127, -+ [2][0][RTW89_MKK][1][79] = 127, -+ [2][0][RTW89_MKK][0][79] = 127, -+ [2][0][RTW89_IC][1][79] = 8, -+ [2][0][RTW89_KCC][1][79] = -2, -+ [2][0][RTW89_KCC][0][79] = 127, -+ [2][0][RTW89_ACMA][1][79] = 127, -+ [2][0][RTW89_ACMA][0][79] = 127, -+ [2][0][RTW89_CHILE][1][79] = 127, -+ [2][0][RTW89_QATAR][1][79] = 127, -+ [2][0][RTW89_QATAR][0][79] = 127, -+ [2][0][RTW89_UK][1][79] = 127, -+ [2][0][RTW89_UK][0][79] = 127, -+ [2][0][RTW89_FCC][1][81] = 8, -+ [2][0][RTW89_FCC][2][81] = 78, -+ [2][0][RTW89_ETSI][1][81] = 127, -+ [2][0][RTW89_ETSI][0][81] = 127, -+ [2][0][RTW89_MKK][1][81] = 127, -+ [2][0][RTW89_MKK][0][81] = 127, -+ [2][0][RTW89_IC][1][81] = 8, -+ [2][0][RTW89_KCC][1][81] = -2, -+ [2][0][RTW89_KCC][0][81] = 127, -+ [2][0][RTW89_ACMA][1][81] = 127, -+ [2][0][RTW89_ACMA][0][81] = 127, -+ [2][0][RTW89_CHILE][1][81] = 127, -+ [2][0][RTW89_QATAR][1][81] = 127, -+ [2][0][RTW89_QATAR][0][81] = 127, -+ [2][0][RTW89_UK][1][81] = 127, -+ [2][0][RTW89_UK][0][81] = 127, -+ [2][0][RTW89_FCC][1][83] = 8, -+ [2][0][RTW89_FCC][2][83] = 78, -+ [2][0][RTW89_ETSI][1][83] = 127, -+ [2][0][RTW89_ETSI][0][83] = 127, -+ [2][0][RTW89_MKK][1][83] = 127, -+ [2][0][RTW89_MKK][0][83] = 127, -+ [2][0][RTW89_IC][1][83] = 8, -+ [2][0][RTW89_KCC][1][83] = -2, -+ [2][0][RTW89_KCC][0][83] = 127, -+ [2][0][RTW89_ACMA][1][83] = 127, -+ [2][0][RTW89_ACMA][0][83] = 127, -+ [2][0][RTW89_CHILE][1][83] = 127, -+ [2][0][RTW89_QATAR][1][83] = 127, -+ [2][0][RTW89_QATAR][0][83] = 127, -+ [2][0][RTW89_UK][1][83] = 127, -+ [2][0][RTW89_UK][0][83] = 127, -+ [2][0][RTW89_FCC][1][85] = 8, -+ [2][0][RTW89_FCC][2][85] = 78, -+ [2][0][RTW89_ETSI][1][85] = 127, -+ [2][0][RTW89_ETSI][0][85] = 127, -+ [2][0][RTW89_MKK][1][85] = 127, -+ [2][0][RTW89_MKK][0][85] = 127, -+ [2][0][RTW89_IC][1][85] = 8, -+ [2][0][RTW89_KCC][1][85] = -2, -+ [2][0][RTW89_KCC][0][85] = 127, -+ [2][0][RTW89_ACMA][1][85] = 127, -+ [2][0][RTW89_ACMA][0][85] = 127, -+ [2][0][RTW89_CHILE][1][85] = 127, -+ [2][0][RTW89_QATAR][1][85] = 127, -+ [2][0][RTW89_QATAR][0][85] = 127, -+ [2][0][RTW89_UK][1][85] = 127, -+ [2][0][RTW89_UK][0][85] = 127, -+ [2][0][RTW89_FCC][1][87] = 8, -+ [2][0][RTW89_FCC][2][87] = 127, -+ [2][0][RTW89_ETSI][1][87] = 127, -+ [2][0][RTW89_ETSI][0][87] = 127, -+ [2][0][RTW89_MKK][1][87] = 127, -+ [2][0][RTW89_MKK][0][87] = 127, -+ [2][0][RTW89_IC][1][87] = 8, -+ [2][0][RTW89_KCC][1][87] = -2, -+ [2][0][RTW89_KCC][0][87] = 127, -+ [2][0][RTW89_ACMA][1][87] = 127, -+ [2][0][RTW89_ACMA][0][87] = 127, -+ [2][0][RTW89_CHILE][1][87] = 127, -+ [2][0][RTW89_QATAR][1][87] = 127, -+ [2][0][RTW89_QATAR][0][87] = 127, -+ [2][0][RTW89_UK][1][87] = 127, -+ [2][0][RTW89_UK][0][87] = 127, -+ [2][0][RTW89_FCC][1][89] = 8, -+ [2][0][RTW89_FCC][2][89] = 127, -+ [2][0][RTW89_ETSI][1][89] = 127, -+ [2][0][RTW89_ETSI][0][89] = 127, -+ [2][0][RTW89_MKK][1][89] = 127, -+ [2][0][RTW89_MKK][0][89] = 127, -+ [2][0][RTW89_IC][1][89] = 8, -+ [2][0][RTW89_KCC][1][89] = -2, -+ [2][0][RTW89_KCC][0][89] = 127, -+ [2][0][RTW89_ACMA][1][89] = 127, -+ [2][0][RTW89_ACMA][0][89] = 127, -+ [2][0][RTW89_CHILE][1][89] = 127, -+ [2][0][RTW89_QATAR][1][89] = 127, -+ [2][0][RTW89_QATAR][0][89] = 127, -+ [2][0][RTW89_UK][1][89] = 127, -+ [2][0][RTW89_UK][0][89] = 127, -+ [2][0][RTW89_FCC][1][90] = 8, -+ [2][0][RTW89_FCC][2][90] = 127, -+ [2][0][RTW89_ETSI][1][90] = 127, -+ [2][0][RTW89_ETSI][0][90] = 127, -+ [2][0][RTW89_MKK][1][90] = 127, -+ [2][0][RTW89_MKK][0][90] = 127, -+ [2][0][RTW89_IC][1][90] = 8, -+ [2][0][RTW89_KCC][1][90] = -2, -+ [2][0][RTW89_KCC][0][90] = 127, -+ [2][0][RTW89_ACMA][1][90] = 127, -+ [2][0][RTW89_ACMA][0][90] = 127, -+ [2][0][RTW89_CHILE][1][90] = 127, -+ [2][0][RTW89_QATAR][1][90] = 127, -+ [2][0][RTW89_QATAR][0][90] = 127, -+ [2][0][RTW89_UK][1][90] = 127, -+ [2][0][RTW89_UK][0][90] = 127, -+ [2][0][RTW89_FCC][1][92] = 8, -+ [2][0][RTW89_FCC][2][92] = 127, -+ [2][0][RTW89_ETSI][1][92] = 127, -+ [2][0][RTW89_ETSI][0][92] = 127, -+ [2][0][RTW89_MKK][1][92] = 127, -+ [2][0][RTW89_MKK][0][92] = 127, -+ [2][0][RTW89_IC][1][92] = 8, -+ [2][0][RTW89_KCC][1][92] = -2, -+ [2][0][RTW89_KCC][0][92] = 127, -+ [2][0][RTW89_ACMA][1][92] = 127, -+ [2][0][RTW89_ACMA][0][92] = 127, -+ [2][0][RTW89_CHILE][1][92] = 127, -+ [2][0][RTW89_QATAR][1][92] = 127, -+ [2][0][RTW89_QATAR][0][92] = 127, -+ [2][0][RTW89_UK][1][92] = 127, -+ [2][0][RTW89_UK][0][92] = 127, -+ [2][0][RTW89_FCC][1][94] = 8, -+ [2][0][RTW89_FCC][2][94] = 127, -+ [2][0][RTW89_ETSI][1][94] = 127, -+ [2][0][RTW89_ETSI][0][94] = 127, -+ [2][0][RTW89_MKK][1][94] = 127, -+ [2][0][RTW89_MKK][0][94] = 127, -+ [2][0][RTW89_IC][1][94] = 8, -+ [2][0][RTW89_KCC][1][94] = -2, -+ [2][0][RTW89_KCC][0][94] = 127, -+ [2][0][RTW89_ACMA][1][94] = 127, -+ [2][0][RTW89_ACMA][0][94] = 127, -+ [2][0][RTW89_CHILE][1][94] = 127, -+ [2][0][RTW89_QATAR][1][94] = 127, -+ [2][0][RTW89_QATAR][0][94] = 127, -+ [2][0][RTW89_UK][1][94] = 127, -+ [2][0][RTW89_UK][0][94] = 127, -+ [2][0][RTW89_FCC][1][96] = 8, -+ [2][0][RTW89_FCC][2][96] = 127, -+ [2][0][RTW89_ETSI][1][96] = 127, -+ [2][0][RTW89_ETSI][0][96] = 127, -+ [2][0][RTW89_MKK][1][96] = 127, -+ [2][0][RTW89_MKK][0][96] = 127, -+ [2][0][RTW89_IC][1][96] = 8, -+ [2][0][RTW89_KCC][1][96] = -2, -+ [2][0][RTW89_KCC][0][96] = 127, -+ [2][0][RTW89_ACMA][1][96] = 127, -+ [2][0][RTW89_ACMA][0][96] = 127, -+ [2][0][RTW89_CHILE][1][96] = 127, -+ [2][0][RTW89_QATAR][1][96] = 127, -+ [2][0][RTW89_QATAR][0][96] = 127, -+ [2][0][RTW89_UK][1][96] = 127, -+ [2][0][RTW89_UK][0][96] = 127, -+ [2][0][RTW89_FCC][1][98] = 8, -+ [2][0][RTW89_FCC][2][98] = 127, -+ [2][0][RTW89_ETSI][1][98] = 127, -+ [2][0][RTW89_ETSI][0][98] = 127, -+ [2][0][RTW89_MKK][1][98] = 127, -+ [2][0][RTW89_MKK][0][98] = 127, -+ [2][0][RTW89_IC][1][98] = 8, -+ [2][0][RTW89_KCC][1][98] = -2, -+ [2][0][RTW89_KCC][0][98] = 127, -+ [2][0][RTW89_ACMA][1][98] = 127, -+ [2][0][RTW89_ACMA][0][98] = 127, -+ [2][0][RTW89_CHILE][1][98] = 127, -+ [2][0][RTW89_QATAR][1][98] = 127, -+ [2][0][RTW89_QATAR][0][98] = 127, -+ [2][0][RTW89_UK][1][98] = 127, -+ [2][0][RTW89_UK][0][98] = 127, -+ [2][0][RTW89_FCC][1][100] = 8, -+ [2][0][RTW89_FCC][2][100] = 127, -+ [2][0][RTW89_ETSI][1][100] = 127, -+ [2][0][RTW89_ETSI][0][100] = 127, -+ [2][0][RTW89_MKK][1][100] = 127, -+ [2][0][RTW89_MKK][0][100] = 127, -+ [2][0][RTW89_IC][1][100] = 8, -+ [2][0][RTW89_KCC][1][100] = -2, -+ [2][0][RTW89_KCC][0][100] = 127, -+ [2][0][RTW89_ACMA][1][100] = 127, -+ [2][0][RTW89_ACMA][0][100] = 127, -+ [2][0][RTW89_CHILE][1][100] = 127, -+ [2][0][RTW89_QATAR][1][100] = 127, -+ [2][0][RTW89_QATAR][0][100] = 127, -+ [2][0][RTW89_UK][1][100] = 127, -+ [2][0][RTW89_UK][0][100] = 127, -+ [2][0][RTW89_FCC][1][102] = 8, -+ [2][0][RTW89_FCC][2][102] = 127, -+ [2][0][RTW89_ETSI][1][102] = 127, -+ [2][0][RTW89_ETSI][0][102] = 127, -+ [2][0][RTW89_MKK][1][102] = 127, -+ [2][0][RTW89_MKK][0][102] = 127, -+ [2][0][RTW89_IC][1][102] = 8, -+ [2][0][RTW89_KCC][1][102] = -2, -+ [2][0][RTW89_KCC][0][102] = 127, -+ [2][0][RTW89_ACMA][1][102] = 127, -+ [2][0][RTW89_ACMA][0][102] = 127, -+ [2][0][RTW89_CHILE][1][102] = 127, -+ [2][0][RTW89_QATAR][1][102] = 127, -+ [2][0][RTW89_QATAR][0][102] = 127, -+ [2][0][RTW89_UK][1][102] = 127, -+ [2][0][RTW89_UK][0][102] = 127, -+ [2][0][RTW89_FCC][1][104] = 8, -+ [2][0][RTW89_FCC][2][104] = 127, -+ [2][0][RTW89_ETSI][1][104] = 127, -+ [2][0][RTW89_ETSI][0][104] = 127, -+ [2][0][RTW89_MKK][1][104] = 127, -+ [2][0][RTW89_MKK][0][104] = 127, -+ [2][0][RTW89_IC][1][104] = 8, -+ [2][0][RTW89_KCC][1][104] = -2, -+ [2][0][RTW89_KCC][0][104] = 127, -+ [2][0][RTW89_ACMA][1][104] = 127, -+ [2][0][RTW89_ACMA][0][104] = 127, -+ [2][0][RTW89_CHILE][1][104] = 127, -+ [2][0][RTW89_QATAR][1][104] = 127, -+ [2][0][RTW89_QATAR][0][104] = 127, -+ [2][0][RTW89_UK][1][104] = 127, -+ [2][0][RTW89_UK][0][104] = 127, -+ [2][0][RTW89_FCC][1][105] = 8, -+ [2][0][RTW89_FCC][2][105] = 127, -+ [2][0][RTW89_ETSI][1][105] = 127, -+ [2][0][RTW89_ETSI][0][105] = 127, -+ [2][0][RTW89_MKK][1][105] = 127, -+ [2][0][RTW89_MKK][0][105] = 127, -+ [2][0][RTW89_IC][1][105] = 8, -+ [2][0][RTW89_KCC][1][105] = -2, -+ [2][0][RTW89_KCC][0][105] = 127, -+ [2][0][RTW89_ACMA][1][105] = 127, -+ [2][0][RTW89_ACMA][0][105] = 127, -+ [2][0][RTW89_CHILE][1][105] = 127, -+ [2][0][RTW89_QATAR][1][105] = 127, -+ [2][0][RTW89_QATAR][0][105] = 127, -+ [2][0][RTW89_UK][1][105] = 127, -+ [2][0][RTW89_UK][0][105] = 127, -+ [2][0][RTW89_FCC][1][107] = 10, -+ [2][0][RTW89_FCC][2][107] = 127, -+ [2][0][RTW89_ETSI][1][107] = 127, -+ [2][0][RTW89_ETSI][0][107] = 127, -+ [2][0][RTW89_MKK][1][107] = 127, -+ [2][0][RTW89_MKK][0][107] = 127, -+ [2][0][RTW89_IC][1][107] = 10, -+ [2][0][RTW89_KCC][1][107] = -2, -+ [2][0][RTW89_KCC][0][107] = 127, -+ [2][0][RTW89_ACMA][1][107] = 127, -+ [2][0][RTW89_ACMA][0][107] = 127, -+ [2][0][RTW89_CHILE][1][107] = 127, -+ [2][0][RTW89_QATAR][1][107] = 127, -+ [2][0][RTW89_QATAR][0][107] = 127, -+ [2][0][RTW89_UK][1][107] = 127, -+ [2][0][RTW89_UK][0][107] = 127, -+ [2][0][RTW89_FCC][1][109] = 12, -+ [2][0][RTW89_FCC][2][109] = 127, -+ [2][0][RTW89_ETSI][1][109] = 127, -+ [2][0][RTW89_ETSI][0][109] = 127, -+ [2][0][RTW89_MKK][1][109] = 127, -+ [2][0][RTW89_MKK][0][109] = 127, -+ [2][0][RTW89_IC][1][109] = 12, -+ [2][0][RTW89_KCC][1][109] = 127, -+ [2][0][RTW89_KCC][0][109] = 127, -+ [2][0][RTW89_ACMA][1][109] = 127, -+ [2][0][RTW89_ACMA][0][109] = 127, -+ [2][0][RTW89_CHILE][1][109] = 127, -+ [2][0][RTW89_QATAR][1][109] = 127, -+ [2][0][RTW89_QATAR][0][109] = 127, -+ [2][0][RTW89_UK][1][109] = 127, -+ [2][0][RTW89_UK][0][109] = 127, -+ [2][0][RTW89_FCC][1][111] = 127, -+ [2][0][RTW89_FCC][2][111] = 127, -+ [2][0][RTW89_ETSI][1][111] = 127, -+ [2][0][RTW89_ETSI][0][111] = 127, -+ [2][0][RTW89_MKK][1][111] = 127, -+ [2][0][RTW89_MKK][0][111] = 127, -+ [2][0][RTW89_IC][1][111] = 127, -+ [2][0][RTW89_KCC][1][111] = 127, -+ [2][0][RTW89_KCC][0][111] = 127, -+ [2][0][RTW89_ACMA][1][111] = 127, -+ [2][0][RTW89_ACMA][0][111] = 127, -+ [2][0][RTW89_CHILE][1][111] = 127, -+ [2][0][RTW89_QATAR][1][111] = 127, -+ [2][0][RTW89_QATAR][0][111] = 127, -+ [2][0][RTW89_UK][1][111] = 127, -+ [2][0][RTW89_UK][0][111] = 127, -+ [2][0][RTW89_FCC][1][113] = 127, -+ [2][0][RTW89_FCC][2][113] = 127, -+ [2][0][RTW89_ETSI][1][113] = 127, -+ [2][0][RTW89_ETSI][0][113] = 127, -+ [2][0][RTW89_MKK][1][113] = 127, -+ [2][0][RTW89_MKK][0][113] = 127, -+ [2][0][RTW89_IC][1][113] = 127, -+ [2][0][RTW89_KCC][1][113] = 127, -+ [2][0][RTW89_KCC][0][113] = 127, -+ [2][0][RTW89_ACMA][1][113] = 127, -+ [2][0][RTW89_ACMA][0][113] = 127, -+ [2][0][RTW89_CHILE][1][113] = 127, -+ [2][0][RTW89_QATAR][1][113] = 127, -+ [2][0][RTW89_QATAR][0][113] = 127, -+ [2][0][RTW89_UK][1][113] = 127, -+ [2][0][RTW89_UK][0][113] = 127, -+ [2][0][RTW89_FCC][1][115] = 127, -+ [2][0][RTW89_FCC][2][115] = 127, -+ [2][0][RTW89_ETSI][1][115] = 127, -+ [2][0][RTW89_ETSI][0][115] = 127, -+ [2][0][RTW89_MKK][1][115] = 127, -+ [2][0][RTW89_MKK][0][115] = 127, -+ [2][0][RTW89_IC][1][115] = 127, -+ [2][0][RTW89_KCC][1][115] = 127, -+ [2][0][RTW89_KCC][0][115] = 127, -+ [2][0][RTW89_ACMA][1][115] = 127, -+ [2][0][RTW89_ACMA][0][115] = 127, -+ [2][0][RTW89_CHILE][1][115] = 127, -+ [2][0][RTW89_QATAR][1][115] = 127, -+ [2][0][RTW89_QATAR][0][115] = 127, -+ [2][0][RTW89_UK][1][115] = 127, -+ [2][0][RTW89_UK][0][115] = 127, -+ [2][0][RTW89_FCC][1][117] = 127, -+ [2][0][RTW89_FCC][2][117] = 127, -+ [2][0][RTW89_ETSI][1][117] = 127, -+ [2][0][RTW89_ETSI][0][117] = 127, -+ [2][0][RTW89_MKK][1][117] = 127, -+ [2][0][RTW89_MKK][0][117] = 127, -+ [2][0][RTW89_IC][1][117] = 127, -+ [2][0][RTW89_KCC][1][117] = 127, -+ [2][0][RTW89_KCC][0][117] = 127, -+ [2][0][RTW89_ACMA][1][117] = 127, -+ [2][0][RTW89_ACMA][0][117] = 127, -+ [2][0][RTW89_CHILE][1][117] = 127, -+ [2][0][RTW89_QATAR][1][117] = 127, -+ [2][0][RTW89_QATAR][0][117] = 127, -+ [2][0][RTW89_UK][1][117] = 127, -+ [2][0][RTW89_UK][0][117] = 127, -+ [2][0][RTW89_FCC][1][119] = 127, -+ [2][0][RTW89_FCC][2][119] = 127, -+ [2][0][RTW89_ETSI][1][119] = 127, -+ [2][0][RTW89_ETSI][0][119] = 127, -+ [2][0][RTW89_MKK][1][119] = 127, -+ [2][0][RTW89_MKK][0][119] = 127, -+ [2][0][RTW89_IC][1][119] = 127, -+ [2][0][RTW89_KCC][1][119] = 127, -+ [2][0][RTW89_KCC][0][119] = 127, -+ [2][0][RTW89_ACMA][1][119] = 127, -+ [2][0][RTW89_ACMA][0][119] = 127, -+ [2][0][RTW89_CHILE][1][119] = 127, -+ [2][0][RTW89_QATAR][1][119] = 127, -+ [2][0][RTW89_QATAR][0][119] = 127, -+ [2][0][RTW89_UK][1][119] = 127, -+ [2][0][RTW89_UK][0][119] = 127, -+ [2][1][RTW89_FCC][1][0] = -16, -+ [2][1][RTW89_FCC][2][0] = 54, -+ [2][1][RTW89_ETSI][1][0] = 44, -+ [2][1][RTW89_ETSI][0][0] = 6, -+ [2][1][RTW89_MKK][1][0] = 42, -+ [2][1][RTW89_MKK][0][0] = 2, -+ [2][1][RTW89_IC][1][0] = -16, -+ [2][1][RTW89_KCC][1][0] = -14, -+ [2][1][RTW89_KCC][0][0] = -14, -+ [2][1][RTW89_ACMA][1][0] = 44, -+ [2][1][RTW89_ACMA][0][0] = 6, -+ [2][1][RTW89_CHILE][1][0] = -16, -+ [2][1][RTW89_QATAR][1][0] = 44, -+ [2][1][RTW89_QATAR][0][0] = 6, -+ [2][1][RTW89_UK][1][0] = 44, -+ [2][1][RTW89_UK][0][0] = 6, -+ [2][1][RTW89_FCC][1][2] = -16, -+ [2][1][RTW89_FCC][2][2] = 54, -+ [2][1][RTW89_ETSI][1][2] = 44, -+ [2][1][RTW89_ETSI][0][2] = 6, -+ [2][1][RTW89_MKK][1][2] = 40, -+ [2][1][RTW89_MKK][0][2] = 2, -+ [2][1][RTW89_IC][1][2] = -16, -+ [2][1][RTW89_KCC][1][2] = -14, -+ [2][1][RTW89_KCC][0][2] = -14, -+ [2][1][RTW89_ACMA][1][2] = 44, -+ [2][1][RTW89_ACMA][0][2] = 6, -+ [2][1][RTW89_CHILE][1][2] = -16, -+ [2][1][RTW89_QATAR][1][2] = 44, -+ [2][1][RTW89_QATAR][0][2] = 6, -+ [2][1][RTW89_UK][1][2] = 44, -+ [2][1][RTW89_UK][0][2] = 6, -+ [2][1][RTW89_FCC][1][4] = -16, -+ [2][1][RTW89_FCC][2][4] = 54, -+ [2][1][RTW89_ETSI][1][4] = 44, -+ [2][1][RTW89_ETSI][0][4] = 6, -+ [2][1][RTW89_MKK][1][4] = 40, -+ [2][1][RTW89_MKK][0][4] = 2, -+ [2][1][RTW89_IC][1][4] = -16, -+ [2][1][RTW89_KCC][1][4] = -14, -+ [2][1][RTW89_KCC][0][4] = -14, -+ [2][1][RTW89_ACMA][1][4] = 44, -+ [2][1][RTW89_ACMA][0][4] = 6, -+ [2][1][RTW89_CHILE][1][4] = -16, -+ [2][1][RTW89_QATAR][1][4] = 44, -+ [2][1][RTW89_QATAR][0][4] = 6, -+ [2][1][RTW89_UK][1][4] = 44, -+ [2][1][RTW89_UK][0][4] = 6, -+ [2][1][RTW89_FCC][1][6] = -16, -+ [2][1][RTW89_FCC][2][6] = 54, -+ [2][1][RTW89_ETSI][1][6] = 44, -+ [2][1][RTW89_ETSI][0][6] = 6, -+ [2][1][RTW89_MKK][1][6] = 40, -+ [2][1][RTW89_MKK][0][6] = 2, -+ [2][1][RTW89_IC][1][6] = -16, -+ [2][1][RTW89_KCC][1][6] = -14, -+ [2][1][RTW89_KCC][0][6] = -14, -+ [2][1][RTW89_ACMA][1][6] = 44, -+ [2][1][RTW89_ACMA][0][6] = 6, -+ [2][1][RTW89_CHILE][1][6] = -16, -+ [2][1][RTW89_QATAR][1][6] = 44, -+ [2][1][RTW89_QATAR][0][6] = 6, -+ [2][1][RTW89_UK][1][6] = 44, -+ [2][1][RTW89_UK][0][6] = 6, -+ [2][1][RTW89_FCC][1][8] = -16, -+ [2][1][RTW89_FCC][2][8] = 54, -+ [2][1][RTW89_ETSI][1][8] = 44, -+ [2][1][RTW89_ETSI][0][8] = 6, -+ [2][1][RTW89_MKK][1][8] = 40, -+ [2][1][RTW89_MKK][0][8] = 2, -+ [2][1][RTW89_IC][1][8] = -16, -+ [2][1][RTW89_KCC][1][8] = -14, -+ [2][1][RTW89_KCC][0][8] = -14, -+ [2][1][RTW89_ACMA][1][8] = 44, -+ [2][1][RTW89_ACMA][0][8] = 6, -+ [2][1][RTW89_CHILE][1][8] = -16, -+ [2][1][RTW89_QATAR][1][8] = 44, -+ [2][1][RTW89_QATAR][0][8] = 6, -+ [2][1][RTW89_UK][1][8] = 44, -+ [2][1][RTW89_UK][0][8] = 6, -+ [2][1][RTW89_FCC][1][10] = -16, -+ [2][1][RTW89_FCC][2][10] = 54, -+ [2][1][RTW89_ETSI][1][10] = 44, -+ [2][1][RTW89_ETSI][0][10] = 6, -+ [2][1][RTW89_MKK][1][10] = 40, -+ [2][1][RTW89_MKK][0][10] = 2, -+ [2][1][RTW89_IC][1][10] = -16, -+ [2][1][RTW89_KCC][1][10] = -14, -+ [2][1][RTW89_KCC][0][10] = -14, -+ [2][1][RTW89_ACMA][1][10] = 44, -+ [2][1][RTW89_ACMA][0][10] = 6, -+ [2][1][RTW89_CHILE][1][10] = -16, -+ [2][1][RTW89_QATAR][1][10] = 44, -+ [2][1][RTW89_QATAR][0][10] = 6, -+ [2][1][RTW89_UK][1][10] = 44, -+ [2][1][RTW89_UK][0][10] = 6, -+ [2][1][RTW89_FCC][1][12] = -16, -+ [2][1][RTW89_FCC][2][12] = 54, -+ [2][1][RTW89_ETSI][1][12] = 44, -+ [2][1][RTW89_ETSI][0][12] = 6, -+ [2][1][RTW89_MKK][1][12] = 40, -+ [2][1][RTW89_MKK][0][12] = 2, -+ [2][1][RTW89_IC][1][12] = -16, -+ [2][1][RTW89_KCC][1][12] = -14, -+ [2][1][RTW89_KCC][0][12] = -14, -+ [2][1][RTW89_ACMA][1][12] = 44, -+ [2][1][RTW89_ACMA][0][12] = 6, -+ [2][1][RTW89_CHILE][1][12] = -16, -+ [2][1][RTW89_QATAR][1][12] = 44, -+ [2][1][RTW89_QATAR][0][12] = 6, -+ [2][1][RTW89_UK][1][12] = 44, -+ [2][1][RTW89_UK][0][12] = 6, -+ [2][1][RTW89_FCC][1][14] = -16, -+ [2][1][RTW89_FCC][2][14] = 54, -+ [2][1][RTW89_ETSI][1][14] = 44, -+ [2][1][RTW89_ETSI][0][14] = 6, -+ [2][1][RTW89_MKK][1][14] = 40, -+ [2][1][RTW89_MKK][0][14] = 2, -+ [2][1][RTW89_IC][1][14] = -16, -+ [2][1][RTW89_KCC][1][14] = -14, -+ [2][1][RTW89_KCC][0][14] = -14, -+ [2][1][RTW89_ACMA][1][14] = 44, -+ [2][1][RTW89_ACMA][0][14] = 6, -+ [2][1][RTW89_CHILE][1][14] = -16, -+ [2][1][RTW89_QATAR][1][14] = 44, -+ [2][1][RTW89_QATAR][0][14] = 6, -+ [2][1][RTW89_UK][1][14] = 44, -+ [2][1][RTW89_UK][0][14] = 6, -+ [2][1][RTW89_FCC][1][15] = -16, -+ [2][1][RTW89_FCC][2][15] = 54, -+ [2][1][RTW89_ETSI][1][15] = 44, -+ [2][1][RTW89_ETSI][0][15] = 6, -+ [2][1][RTW89_MKK][1][15] = 40, -+ [2][1][RTW89_MKK][0][15] = 2, -+ [2][1][RTW89_IC][1][15] = -16, -+ [2][1][RTW89_KCC][1][15] = -14, -+ [2][1][RTW89_KCC][0][15] = -14, -+ [2][1][RTW89_ACMA][1][15] = 44, -+ [2][1][RTW89_ACMA][0][15] = 6, -+ [2][1][RTW89_CHILE][1][15] = -16, -+ [2][1][RTW89_QATAR][1][15] = 44, -+ [2][1][RTW89_QATAR][0][15] = 6, -+ [2][1][RTW89_UK][1][15] = 44, -+ [2][1][RTW89_UK][0][15] = 6, -+ [2][1][RTW89_FCC][1][17] = -16, -+ [2][1][RTW89_FCC][2][17] = 54, -+ [2][1][RTW89_ETSI][1][17] = 44, -+ [2][1][RTW89_ETSI][0][17] = 6, -+ [2][1][RTW89_MKK][1][17] = 40, -+ [2][1][RTW89_MKK][0][17] = 2, -+ [2][1][RTW89_IC][1][17] = -16, -+ [2][1][RTW89_KCC][1][17] = -14, -+ [2][1][RTW89_KCC][0][17] = -14, -+ [2][1][RTW89_ACMA][1][17] = 44, -+ [2][1][RTW89_ACMA][0][17] = 6, -+ [2][1][RTW89_CHILE][1][17] = -16, -+ [2][1][RTW89_QATAR][1][17] = 44, -+ [2][1][RTW89_QATAR][0][17] = 6, -+ [2][1][RTW89_UK][1][17] = 44, -+ [2][1][RTW89_UK][0][17] = 6, -+ [2][1][RTW89_FCC][1][19] = -16, -+ [2][1][RTW89_FCC][2][19] = 54, -+ [2][1][RTW89_ETSI][1][19] = 44, -+ [2][1][RTW89_ETSI][0][19] = 6, -+ [2][1][RTW89_MKK][1][19] = 40, -+ [2][1][RTW89_MKK][0][19] = 2, -+ [2][1][RTW89_IC][1][19] = -16, -+ [2][1][RTW89_KCC][1][19] = -14, -+ [2][1][RTW89_KCC][0][19] = -14, -+ [2][1][RTW89_ACMA][1][19] = 44, -+ [2][1][RTW89_ACMA][0][19] = 6, -+ [2][1][RTW89_CHILE][1][19] = -16, -+ [2][1][RTW89_QATAR][1][19] = 44, -+ [2][1][RTW89_QATAR][0][19] = 6, -+ [2][1][RTW89_UK][1][19] = 44, -+ [2][1][RTW89_UK][0][19] = 6, -+ [2][1][RTW89_FCC][1][21] = -16, -+ [2][1][RTW89_FCC][2][21] = 54, -+ [2][1][RTW89_ETSI][1][21] = 44, -+ [2][1][RTW89_ETSI][0][21] = 6, -+ [2][1][RTW89_MKK][1][21] = 40, -+ [2][1][RTW89_MKK][0][21] = 2, -+ [2][1][RTW89_IC][1][21] = -16, -+ [2][1][RTW89_KCC][1][21] = -14, -+ [2][1][RTW89_KCC][0][21] = -14, -+ [2][1][RTW89_ACMA][1][21] = 44, -+ [2][1][RTW89_ACMA][0][21] = 6, -+ [2][1][RTW89_CHILE][1][21] = -16, -+ [2][1][RTW89_QATAR][1][21] = 44, -+ [2][1][RTW89_QATAR][0][21] = 6, -+ [2][1][RTW89_UK][1][21] = 44, -+ [2][1][RTW89_UK][0][21] = 6, -+ [2][1][RTW89_FCC][1][23] = -16, -+ [2][1][RTW89_FCC][2][23] = 54, -+ [2][1][RTW89_ETSI][1][23] = 44, -+ [2][1][RTW89_ETSI][0][23] = 6, -+ [2][1][RTW89_MKK][1][23] = 40, -+ [2][1][RTW89_MKK][0][23] = 2, -+ [2][1][RTW89_IC][1][23] = -16, -+ [2][1][RTW89_KCC][1][23] = -14, -+ [2][1][RTW89_KCC][0][23] = -14, -+ [2][1][RTW89_ACMA][1][23] = 44, -+ [2][1][RTW89_ACMA][0][23] = 6, -+ [2][1][RTW89_CHILE][1][23] = -16, -+ [2][1][RTW89_QATAR][1][23] = 44, -+ [2][1][RTW89_QATAR][0][23] = 6, -+ [2][1][RTW89_UK][1][23] = 44, -+ [2][1][RTW89_UK][0][23] = 6, -+ [2][1][RTW89_FCC][1][25] = -16, -+ [2][1][RTW89_FCC][2][25] = 54, -+ [2][1][RTW89_ETSI][1][25] = 44, -+ [2][1][RTW89_ETSI][0][25] = 6, -+ [2][1][RTW89_MKK][1][25] = 40, -+ [2][1][RTW89_MKK][0][25] = 2, -+ [2][1][RTW89_IC][1][25] = -16, -+ [2][1][RTW89_KCC][1][25] = -14, -+ [2][1][RTW89_KCC][0][25] = -14, -+ [2][1][RTW89_ACMA][1][25] = 44, -+ [2][1][RTW89_ACMA][0][25] = 6, -+ [2][1][RTW89_CHILE][1][25] = -16, -+ [2][1][RTW89_QATAR][1][25] = 44, -+ [2][1][RTW89_QATAR][0][25] = 6, -+ [2][1][RTW89_UK][1][25] = 44, -+ [2][1][RTW89_UK][0][25] = 6, -+ [2][1][RTW89_FCC][1][27] = -16, -+ [2][1][RTW89_FCC][2][27] = 54, -+ [2][1][RTW89_ETSI][1][27] = 44, -+ [2][1][RTW89_ETSI][0][27] = 6, -+ [2][1][RTW89_MKK][1][27] = 40, -+ [2][1][RTW89_MKK][0][27] = 2, -+ [2][1][RTW89_IC][1][27] = -16, -+ [2][1][RTW89_KCC][1][27] = -14, -+ [2][1][RTW89_KCC][0][27] = -14, -+ [2][1][RTW89_ACMA][1][27] = 44, -+ [2][1][RTW89_ACMA][0][27] = 6, -+ [2][1][RTW89_CHILE][1][27] = -16, -+ [2][1][RTW89_QATAR][1][27] = 44, -+ [2][1][RTW89_QATAR][0][27] = 6, -+ [2][1][RTW89_UK][1][27] = 44, -+ [2][1][RTW89_UK][0][27] = 6, -+ [2][1][RTW89_FCC][1][29] = -16, -+ [2][1][RTW89_FCC][2][29] = 54, -+ [2][1][RTW89_ETSI][1][29] = 44, -+ [2][1][RTW89_ETSI][0][29] = 6, -+ [2][1][RTW89_MKK][1][29] = 40, -+ [2][1][RTW89_MKK][0][29] = 2, -+ [2][1][RTW89_IC][1][29] = -16, -+ [2][1][RTW89_KCC][1][29] = -14, -+ [2][1][RTW89_KCC][0][29] = -14, -+ [2][1][RTW89_ACMA][1][29] = 44, -+ [2][1][RTW89_ACMA][0][29] = 6, -+ [2][1][RTW89_CHILE][1][29] = -16, -+ [2][1][RTW89_QATAR][1][29] = 44, -+ [2][1][RTW89_QATAR][0][29] = 6, -+ [2][1][RTW89_UK][1][29] = 44, -+ [2][1][RTW89_UK][0][29] = 6, -+ [2][1][RTW89_FCC][1][30] = -16, -+ [2][1][RTW89_FCC][2][30] = 54, -+ [2][1][RTW89_ETSI][1][30] = 44, -+ [2][1][RTW89_ETSI][0][30] = 6, -+ [2][1][RTW89_MKK][1][30] = 40, -+ [2][1][RTW89_MKK][0][30] = 2, -+ [2][1][RTW89_IC][1][30] = -16, -+ [2][1][RTW89_KCC][1][30] = -14, -+ [2][1][RTW89_KCC][0][30] = -14, -+ [2][1][RTW89_ACMA][1][30] = 44, -+ [2][1][RTW89_ACMA][0][30] = 6, -+ [2][1][RTW89_CHILE][1][30] = -16, -+ [2][1][RTW89_QATAR][1][30] = 44, -+ [2][1][RTW89_QATAR][0][30] = 6, -+ [2][1][RTW89_UK][1][30] = 44, -+ [2][1][RTW89_UK][0][30] = 6, -+ [2][1][RTW89_FCC][1][32] = -16, -+ [2][1][RTW89_FCC][2][32] = 54, -+ [2][1][RTW89_ETSI][1][32] = 44, -+ [2][1][RTW89_ETSI][0][32] = 6, -+ [2][1][RTW89_MKK][1][32] = 40, -+ [2][1][RTW89_MKK][0][32] = 2, -+ [2][1][RTW89_IC][1][32] = -16, -+ [2][1][RTW89_KCC][1][32] = -14, -+ [2][1][RTW89_KCC][0][32] = -14, -+ [2][1][RTW89_ACMA][1][32] = 44, -+ [2][1][RTW89_ACMA][0][32] = 6, -+ [2][1][RTW89_CHILE][1][32] = -16, -+ [2][1][RTW89_QATAR][1][32] = 44, -+ [2][1][RTW89_QATAR][0][32] = 6, -+ [2][1][RTW89_UK][1][32] = 44, -+ [2][1][RTW89_UK][0][32] = 6, -+ [2][1][RTW89_FCC][1][34] = -16, -+ [2][1][RTW89_FCC][2][34] = 54, -+ [2][1][RTW89_ETSI][1][34] = 44, -+ [2][1][RTW89_ETSI][0][34] = 6, -+ [2][1][RTW89_MKK][1][34] = 40, -+ [2][1][RTW89_MKK][0][34] = 2, -+ [2][1][RTW89_IC][1][34] = -16, -+ [2][1][RTW89_KCC][1][34] = -14, -+ [2][1][RTW89_KCC][0][34] = -14, -+ [2][1][RTW89_ACMA][1][34] = 44, -+ [2][1][RTW89_ACMA][0][34] = 6, -+ [2][1][RTW89_CHILE][1][34] = -16, -+ [2][1][RTW89_QATAR][1][34] = 44, -+ [2][1][RTW89_QATAR][0][34] = 6, -+ [2][1][RTW89_UK][1][34] = 44, -+ [2][1][RTW89_UK][0][34] = 6, -+ [2][1][RTW89_FCC][1][36] = -16, -+ [2][1][RTW89_FCC][2][36] = 54, -+ [2][1][RTW89_ETSI][1][36] = 44, -+ [2][1][RTW89_ETSI][0][36] = 6, -+ [2][1][RTW89_MKK][1][36] = 40, -+ [2][1][RTW89_MKK][0][36] = 2, -+ [2][1][RTW89_IC][1][36] = -16, -+ [2][1][RTW89_KCC][1][36] = -14, -+ [2][1][RTW89_KCC][0][36] = -14, -+ [2][1][RTW89_ACMA][1][36] = 44, -+ [2][1][RTW89_ACMA][0][36] = 6, -+ [2][1][RTW89_CHILE][1][36] = -16, -+ [2][1][RTW89_QATAR][1][36] = 44, -+ [2][1][RTW89_QATAR][0][36] = 6, -+ [2][1][RTW89_UK][1][36] = 44, -+ [2][1][RTW89_UK][0][36] = 6, -+ [2][1][RTW89_FCC][1][38] = -16, -+ [2][1][RTW89_FCC][2][38] = 54, -+ [2][1][RTW89_ETSI][1][38] = 44, -+ [2][1][RTW89_ETSI][0][38] = 6, -+ [2][1][RTW89_MKK][1][38] = 40, -+ [2][1][RTW89_MKK][0][38] = 2, -+ [2][1][RTW89_IC][1][38] = -16, -+ [2][1][RTW89_KCC][1][38] = -14, -+ [2][1][RTW89_KCC][0][38] = -14, -+ [2][1][RTW89_ACMA][1][38] = 44, -+ [2][1][RTW89_ACMA][0][38] = 6, -+ [2][1][RTW89_CHILE][1][38] = -16, -+ [2][1][RTW89_QATAR][1][38] = 44, -+ [2][1][RTW89_QATAR][0][38] = 6, -+ [2][1][RTW89_UK][1][38] = 44, -+ [2][1][RTW89_UK][0][38] = 6, -+ [2][1][RTW89_FCC][1][40] = -16, -+ [2][1][RTW89_FCC][2][40] = 54, -+ [2][1][RTW89_ETSI][1][40] = 44, -+ [2][1][RTW89_ETSI][0][40] = 6, -+ [2][1][RTW89_MKK][1][40] = 40, -+ [2][1][RTW89_MKK][0][40] = 2, -+ [2][1][RTW89_IC][1][40] = -16, -+ [2][1][RTW89_KCC][1][40] = -14, -+ [2][1][RTW89_KCC][0][40] = -14, -+ [2][1][RTW89_ACMA][1][40] = 44, -+ [2][1][RTW89_ACMA][0][40] = 6, -+ [2][1][RTW89_CHILE][1][40] = -16, -+ [2][1][RTW89_QATAR][1][40] = 44, -+ [2][1][RTW89_QATAR][0][40] = 6, -+ [2][1][RTW89_UK][1][40] = 44, -+ [2][1][RTW89_UK][0][40] = 6, -+ [2][1][RTW89_FCC][1][42] = -16, -+ [2][1][RTW89_FCC][2][42] = 54, -+ [2][1][RTW89_ETSI][1][42] = 44, -+ [2][1][RTW89_ETSI][0][42] = 6, -+ [2][1][RTW89_MKK][1][42] = 40, -+ [2][1][RTW89_MKK][0][42] = 2, -+ [2][1][RTW89_IC][1][42] = -16, -+ [2][1][RTW89_KCC][1][42] = -14, -+ [2][1][RTW89_KCC][0][42] = -14, -+ [2][1][RTW89_ACMA][1][42] = 44, -+ [2][1][RTW89_ACMA][0][42] = 6, -+ [2][1][RTW89_CHILE][1][42] = -16, -+ [2][1][RTW89_QATAR][1][42] = 44, -+ [2][1][RTW89_QATAR][0][42] = 6, -+ [2][1][RTW89_UK][1][42] = 44, -+ [2][1][RTW89_UK][0][42] = 6, -+ [2][1][RTW89_FCC][1][44] = -16, -+ [2][1][RTW89_FCC][2][44] = 54, -+ [2][1][RTW89_ETSI][1][44] = 44, -+ [2][1][RTW89_ETSI][0][44] = 6, -+ [2][1][RTW89_MKK][1][44] = 16, -+ [2][1][RTW89_MKK][0][44] = 2, -+ [2][1][RTW89_IC][1][44] = -16, -+ [2][1][RTW89_KCC][1][44] = -14, -+ [2][1][RTW89_KCC][0][44] = -14, -+ [2][1][RTW89_ACMA][1][44] = 44, -+ [2][1][RTW89_ACMA][0][44] = 6, -+ [2][1][RTW89_CHILE][1][44] = -16, -+ [2][1][RTW89_QATAR][1][44] = 44, -+ [2][1][RTW89_QATAR][0][44] = 6, -+ [2][1][RTW89_UK][1][44] = 44, -+ [2][1][RTW89_UK][0][44] = 6, -+ [2][1][RTW89_FCC][1][45] = -16, -+ [2][1][RTW89_FCC][2][45] = 127, -+ [2][1][RTW89_ETSI][1][45] = 127, -+ [2][1][RTW89_ETSI][0][45] = 127, -+ [2][1][RTW89_MKK][1][45] = 127, -+ [2][1][RTW89_MKK][0][45] = 127, -+ [2][1][RTW89_IC][1][45] = -16, -+ [2][1][RTW89_KCC][1][45] = -14, -+ [2][1][RTW89_KCC][0][45] = 127, -+ [2][1][RTW89_ACMA][1][45] = 127, -+ [2][1][RTW89_ACMA][0][45] = 127, -+ [2][1][RTW89_CHILE][1][45] = 127, -+ [2][1][RTW89_QATAR][1][45] = 127, -+ [2][1][RTW89_QATAR][0][45] = 127, -+ [2][1][RTW89_UK][1][45] = 127, -+ [2][1][RTW89_UK][0][45] = 127, -+ [2][1][RTW89_FCC][1][47] = -16, -+ [2][1][RTW89_FCC][2][47] = 127, -+ [2][1][RTW89_ETSI][1][47] = 127, -+ [2][1][RTW89_ETSI][0][47] = 127, -+ [2][1][RTW89_MKK][1][47] = 127, -+ [2][1][RTW89_MKK][0][47] = 127, -+ [2][1][RTW89_IC][1][47] = -16, -+ [2][1][RTW89_KCC][1][47] = -14, -+ [2][1][RTW89_KCC][0][47] = 127, -+ [2][1][RTW89_ACMA][1][47] = 127, -+ [2][1][RTW89_ACMA][0][47] = 127, -+ [2][1][RTW89_CHILE][1][47] = 127, -+ [2][1][RTW89_QATAR][1][47] = 127, -+ [2][1][RTW89_QATAR][0][47] = 127, -+ [2][1][RTW89_UK][1][47] = 127, -+ [2][1][RTW89_UK][0][47] = 127, -+ [2][1][RTW89_FCC][1][49] = -16, -+ [2][1][RTW89_FCC][2][49] = 127, -+ [2][1][RTW89_ETSI][1][49] = 127, -+ [2][1][RTW89_ETSI][0][49] = 127, -+ [2][1][RTW89_MKK][1][49] = 127, -+ [2][1][RTW89_MKK][0][49] = 127, -+ [2][1][RTW89_IC][1][49] = -16, -+ [2][1][RTW89_KCC][1][49] = -14, -+ [2][1][RTW89_KCC][0][49] = 127, -+ [2][1][RTW89_ACMA][1][49] = 127, -+ [2][1][RTW89_ACMA][0][49] = 127, -+ [2][1][RTW89_CHILE][1][49] = 127, -+ [2][1][RTW89_QATAR][1][49] = 127, -+ [2][1][RTW89_QATAR][0][49] = 127, -+ [2][1][RTW89_UK][1][49] = 127, -+ [2][1][RTW89_UK][0][49] = 127, -+ [2][1][RTW89_FCC][1][51] = -16, -+ [2][1][RTW89_FCC][2][51] = 127, -+ [2][1][RTW89_ETSI][1][51] = 127, -+ [2][1][RTW89_ETSI][0][51] = 127, -+ [2][1][RTW89_MKK][1][51] = 127, -+ [2][1][RTW89_MKK][0][51] = 127, -+ [2][1][RTW89_IC][1][51] = -16, -+ [2][1][RTW89_KCC][1][51] = -14, -+ [2][1][RTW89_KCC][0][51] = 127, -+ [2][1][RTW89_ACMA][1][51] = 127, -+ [2][1][RTW89_ACMA][0][51] = 127, -+ [2][1][RTW89_CHILE][1][51] = 127, -+ [2][1][RTW89_QATAR][1][51] = 127, -+ [2][1][RTW89_QATAR][0][51] = 127, -+ [2][1][RTW89_UK][1][51] = 127, -+ [2][1][RTW89_UK][0][51] = 127, -+ [2][1][RTW89_FCC][1][53] = -16, -+ [2][1][RTW89_FCC][2][53] = 127, -+ [2][1][RTW89_ETSI][1][53] = 127, -+ [2][1][RTW89_ETSI][0][53] = 127, -+ [2][1][RTW89_MKK][1][53] = 127, -+ [2][1][RTW89_MKK][0][53] = 127, -+ [2][1][RTW89_IC][1][53] = -16, -+ [2][1][RTW89_KCC][1][53] = -14, -+ [2][1][RTW89_KCC][0][53] = 127, -+ [2][1][RTW89_ACMA][1][53] = 127, -+ [2][1][RTW89_ACMA][0][53] = 127, -+ [2][1][RTW89_CHILE][1][53] = 127, -+ [2][1][RTW89_QATAR][1][53] = 127, -+ [2][1][RTW89_QATAR][0][53] = 127, -+ [2][1][RTW89_UK][1][53] = 127, -+ [2][1][RTW89_UK][0][53] = 127, -+ [2][1][RTW89_FCC][1][55] = -16, -+ [2][1][RTW89_FCC][2][55] = 54, -+ [2][1][RTW89_ETSI][1][55] = 127, -+ [2][1][RTW89_ETSI][0][55] = 127, -+ [2][1][RTW89_MKK][1][55] = 127, -+ [2][1][RTW89_MKK][0][55] = 127, -+ [2][1][RTW89_IC][1][55] = -16, -+ [2][1][RTW89_KCC][1][55] = -14, -+ [2][1][RTW89_KCC][0][55] = 127, -+ [2][1][RTW89_ACMA][1][55] = 127, -+ [2][1][RTW89_ACMA][0][55] = 127, -+ [2][1][RTW89_CHILE][1][55] = 127, -+ [2][1][RTW89_QATAR][1][55] = 127, -+ [2][1][RTW89_QATAR][0][55] = 127, -+ [2][1][RTW89_UK][1][55] = 127, -+ [2][1][RTW89_UK][0][55] = 127, -+ [2][1][RTW89_FCC][1][57] = -16, -+ [2][1][RTW89_FCC][2][57] = 54, -+ [2][1][RTW89_ETSI][1][57] = 127, -+ [2][1][RTW89_ETSI][0][57] = 127, -+ [2][1][RTW89_MKK][1][57] = 127, -+ [2][1][RTW89_MKK][0][57] = 127, -+ [2][1][RTW89_IC][1][57] = -16, -+ [2][1][RTW89_KCC][1][57] = -14, -+ [2][1][RTW89_KCC][0][57] = 127, -+ [2][1][RTW89_ACMA][1][57] = 127, -+ [2][1][RTW89_ACMA][0][57] = 127, -+ [2][1][RTW89_CHILE][1][57] = 127, -+ [2][1][RTW89_QATAR][1][57] = 127, -+ [2][1][RTW89_QATAR][0][57] = 127, -+ [2][1][RTW89_UK][1][57] = 127, -+ [2][1][RTW89_UK][0][57] = 127, -+ [2][1][RTW89_FCC][1][59] = -16, -+ [2][1][RTW89_FCC][2][59] = 54, -+ [2][1][RTW89_ETSI][1][59] = 127, -+ [2][1][RTW89_ETSI][0][59] = 127, -+ [2][1][RTW89_MKK][1][59] = 127, -+ [2][1][RTW89_MKK][0][59] = 127, -+ [2][1][RTW89_IC][1][59] = -16, -+ [2][1][RTW89_KCC][1][59] = -14, -+ [2][1][RTW89_KCC][0][59] = 127, -+ [2][1][RTW89_ACMA][1][59] = 127, -+ [2][1][RTW89_ACMA][0][59] = 127, -+ [2][1][RTW89_CHILE][1][59] = 127, -+ [2][1][RTW89_QATAR][1][59] = 127, -+ [2][1][RTW89_QATAR][0][59] = 127, -+ [2][1][RTW89_UK][1][59] = 127, -+ [2][1][RTW89_UK][0][59] = 127, -+ [2][1][RTW89_FCC][1][60] = -16, -+ [2][1][RTW89_FCC][2][60] = 54, -+ [2][1][RTW89_ETSI][1][60] = 127, -+ [2][1][RTW89_ETSI][0][60] = 127, -+ [2][1][RTW89_MKK][1][60] = 127, -+ [2][1][RTW89_MKK][0][60] = 127, -+ [2][1][RTW89_IC][1][60] = -16, -+ [2][1][RTW89_KCC][1][60] = -14, -+ [2][1][RTW89_KCC][0][60] = 127, -+ [2][1][RTW89_ACMA][1][60] = 127, -+ [2][1][RTW89_ACMA][0][60] = 127, -+ [2][1][RTW89_CHILE][1][60] = 127, -+ [2][1][RTW89_QATAR][1][60] = 127, -+ [2][1][RTW89_QATAR][0][60] = 127, -+ [2][1][RTW89_UK][1][60] = 127, -+ [2][1][RTW89_UK][0][60] = 127, -+ [2][1][RTW89_FCC][1][62] = -16, -+ [2][1][RTW89_FCC][2][62] = 54, -+ [2][1][RTW89_ETSI][1][62] = 127, -+ [2][1][RTW89_ETSI][0][62] = 127, -+ [2][1][RTW89_MKK][1][62] = 127, -+ [2][1][RTW89_MKK][0][62] = 127, -+ [2][1][RTW89_IC][1][62] = -16, -+ [2][1][RTW89_KCC][1][62] = -14, -+ [2][1][RTW89_KCC][0][62] = 127, -+ [2][1][RTW89_ACMA][1][62] = 127, -+ [2][1][RTW89_ACMA][0][62] = 127, -+ [2][1][RTW89_CHILE][1][62] = 127, -+ [2][1][RTW89_QATAR][1][62] = 127, -+ [2][1][RTW89_QATAR][0][62] = 127, -+ [2][1][RTW89_UK][1][62] = 127, -+ [2][1][RTW89_UK][0][62] = 127, -+ [2][1][RTW89_FCC][1][64] = -16, -+ [2][1][RTW89_FCC][2][64] = 54, -+ [2][1][RTW89_ETSI][1][64] = 127, -+ [2][1][RTW89_ETSI][0][64] = 127, -+ [2][1][RTW89_MKK][1][64] = 127, -+ [2][1][RTW89_MKK][0][64] = 127, -+ [2][1][RTW89_IC][1][64] = -16, -+ [2][1][RTW89_KCC][1][64] = -14, -+ [2][1][RTW89_KCC][0][64] = 127, -+ [2][1][RTW89_ACMA][1][64] = 127, -+ [2][1][RTW89_ACMA][0][64] = 127, -+ [2][1][RTW89_CHILE][1][64] = 127, -+ [2][1][RTW89_QATAR][1][64] = 127, -+ [2][1][RTW89_QATAR][0][64] = 127, -+ [2][1][RTW89_UK][1][64] = 127, -+ [2][1][RTW89_UK][0][64] = 127, -+ [2][1][RTW89_FCC][1][66] = -16, -+ [2][1][RTW89_FCC][2][66] = 54, -+ [2][1][RTW89_ETSI][1][66] = 127, -+ [2][1][RTW89_ETSI][0][66] = 127, -+ [2][1][RTW89_MKK][1][66] = 127, -+ [2][1][RTW89_MKK][0][66] = 127, -+ [2][1][RTW89_IC][1][66] = -16, -+ [2][1][RTW89_KCC][1][66] = -14, -+ [2][1][RTW89_KCC][0][66] = 127, -+ [2][1][RTW89_ACMA][1][66] = 127, -+ [2][1][RTW89_ACMA][0][66] = 127, -+ [2][1][RTW89_CHILE][1][66] = 127, -+ [2][1][RTW89_QATAR][1][66] = 127, -+ [2][1][RTW89_QATAR][0][66] = 127, -+ [2][1][RTW89_UK][1][66] = 127, -+ [2][1][RTW89_UK][0][66] = 127, -+ [2][1][RTW89_FCC][1][68] = -16, -+ [2][1][RTW89_FCC][2][68] = 54, -+ [2][1][RTW89_ETSI][1][68] = 127, -+ [2][1][RTW89_ETSI][0][68] = 127, -+ [2][1][RTW89_MKK][1][68] = 127, -+ [2][1][RTW89_MKK][0][68] = 127, -+ [2][1][RTW89_IC][1][68] = -16, -+ [2][1][RTW89_KCC][1][68] = -14, -+ [2][1][RTW89_KCC][0][68] = 127, -+ [2][1][RTW89_ACMA][1][68] = 127, -+ [2][1][RTW89_ACMA][0][68] = 127, -+ [2][1][RTW89_CHILE][1][68] = 127, -+ [2][1][RTW89_QATAR][1][68] = 127, -+ [2][1][RTW89_QATAR][0][68] = 127, -+ [2][1][RTW89_UK][1][68] = 127, -+ [2][1][RTW89_UK][0][68] = 127, -+ [2][1][RTW89_FCC][1][70] = -16, -+ [2][1][RTW89_FCC][2][70] = 56, -+ [2][1][RTW89_ETSI][1][70] = 127, -+ [2][1][RTW89_ETSI][0][70] = 127, -+ [2][1][RTW89_MKK][1][70] = 127, -+ [2][1][RTW89_MKK][0][70] = 127, -+ [2][1][RTW89_IC][1][70] = -16, -+ [2][1][RTW89_KCC][1][70] = -14, -+ [2][1][RTW89_KCC][0][70] = 127, -+ [2][1][RTW89_ACMA][1][70] = 127, -+ [2][1][RTW89_ACMA][0][70] = 127, -+ [2][1][RTW89_CHILE][1][70] = 127, -+ [2][1][RTW89_QATAR][1][70] = 127, -+ [2][1][RTW89_QATAR][0][70] = 127, -+ [2][1][RTW89_UK][1][70] = 127, -+ [2][1][RTW89_UK][0][70] = 127, -+ [2][1][RTW89_FCC][1][72] = -16, -+ [2][1][RTW89_FCC][2][72] = 56, -+ [2][1][RTW89_ETSI][1][72] = 127, -+ [2][1][RTW89_ETSI][0][72] = 127, -+ [2][1][RTW89_MKK][1][72] = 127, -+ [2][1][RTW89_MKK][0][72] = 127, -+ [2][1][RTW89_IC][1][72] = -16, -+ [2][1][RTW89_KCC][1][72] = -14, -+ [2][1][RTW89_KCC][0][72] = 127, -+ [2][1][RTW89_ACMA][1][72] = 127, -+ [2][1][RTW89_ACMA][0][72] = 127, -+ [2][1][RTW89_CHILE][1][72] = 127, -+ [2][1][RTW89_QATAR][1][72] = 127, -+ [2][1][RTW89_QATAR][0][72] = 127, -+ [2][1][RTW89_UK][1][72] = 127, -+ [2][1][RTW89_UK][0][72] = 127, -+ [2][1][RTW89_FCC][1][74] = -16, -+ [2][1][RTW89_FCC][2][74] = 56, -+ [2][1][RTW89_ETSI][1][74] = 127, -+ [2][1][RTW89_ETSI][0][74] = 127, -+ [2][1][RTW89_MKK][1][74] = 127, -+ [2][1][RTW89_MKK][0][74] = 127, -+ [2][1][RTW89_IC][1][74] = -16, -+ [2][1][RTW89_KCC][1][74] = -14, -+ [2][1][RTW89_KCC][0][74] = 127, -+ [2][1][RTW89_ACMA][1][74] = 127, -+ [2][1][RTW89_ACMA][0][74] = 127, -+ [2][1][RTW89_CHILE][1][74] = 127, -+ [2][1][RTW89_QATAR][1][74] = 127, -+ [2][1][RTW89_QATAR][0][74] = 127, -+ [2][1][RTW89_UK][1][74] = 127, -+ [2][1][RTW89_UK][0][74] = 127, -+ [2][1][RTW89_FCC][1][75] = -16, -+ [2][1][RTW89_FCC][2][75] = 56, -+ [2][1][RTW89_ETSI][1][75] = 127, -+ [2][1][RTW89_ETSI][0][75] = 127, -+ [2][1][RTW89_MKK][1][75] = 127, -+ [2][1][RTW89_MKK][0][75] = 127, -+ [2][1][RTW89_IC][1][75] = -16, -+ [2][1][RTW89_KCC][1][75] = -14, -+ [2][1][RTW89_KCC][0][75] = 127, -+ [2][1][RTW89_ACMA][1][75] = 127, -+ [2][1][RTW89_ACMA][0][75] = 127, -+ [2][1][RTW89_CHILE][1][75] = 127, -+ [2][1][RTW89_QATAR][1][75] = 127, -+ [2][1][RTW89_QATAR][0][75] = 127, -+ [2][1][RTW89_UK][1][75] = 127, -+ [2][1][RTW89_UK][0][75] = 127, -+ [2][1][RTW89_FCC][1][77] = -16, -+ [2][1][RTW89_FCC][2][77] = 56, -+ [2][1][RTW89_ETSI][1][77] = 127, -+ [2][1][RTW89_ETSI][0][77] = 127, -+ [2][1][RTW89_MKK][1][77] = 127, -+ [2][1][RTW89_MKK][0][77] = 127, -+ [2][1][RTW89_IC][1][77] = -16, -+ [2][1][RTW89_KCC][1][77] = -14, -+ [2][1][RTW89_KCC][0][77] = 127, -+ [2][1][RTW89_ACMA][1][77] = 127, -+ [2][1][RTW89_ACMA][0][77] = 127, -+ [2][1][RTW89_CHILE][1][77] = 127, -+ [2][1][RTW89_QATAR][1][77] = 127, -+ [2][1][RTW89_QATAR][0][77] = 127, -+ [2][1][RTW89_UK][1][77] = 127, -+ [2][1][RTW89_UK][0][77] = 127, -+ [2][1][RTW89_FCC][1][79] = -16, -+ [2][1][RTW89_FCC][2][79] = 56, -+ [2][1][RTW89_ETSI][1][79] = 127, -+ [2][1][RTW89_ETSI][0][79] = 127, -+ [2][1][RTW89_MKK][1][79] = 127, -+ [2][1][RTW89_MKK][0][79] = 127, -+ [2][1][RTW89_IC][1][79] = -16, -+ [2][1][RTW89_KCC][1][79] = -14, -+ [2][1][RTW89_KCC][0][79] = 127, -+ [2][1][RTW89_ACMA][1][79] = 127, -+ [2][1][RTW89_ACMA][0][79] = 127, -+ [2][1][RTW89_CHILE][1][79] = 127, -+ [2][1][RTW89_QATAR][1][79] = 127, -+ [2][1][RTW89_QATAR][0][79] = 127, -+ [2][1][RTW89_UK][1][79] = 127, -+ [2][1][RTW89_UK][0][79] = 127, -+ [2][1][RTW89_FCC][1][81] = -16, -+ [2][1][RTW89_FCC][2][81] = 56, -+ [2][1][RTW89_ETSI][1][81] = 127, -+ [2][1][RTW89_ETSI][0][81] = 127, -+ [2][1][RTW89_MKK][1][81] = 127, -+ [2][1][RTW89_MKK][0][81] = 127, -+ [2][1][RTW89_IC][1][81] = -16, -+ [2][1][RTW89_KCC][1][81] = -14, -+ [2][1][RTW89_KCC][0][81] = 127, -+ [2][1][RTW89_ACMA][1][81] = 127, -+ [2][1][RTW89_ACMA][0][81] = 127, -+ [2][1][RTW89_CHILE][1][81] = 127, -+ [2][1][RTW89_QATAR][1][81] = 127, -+ [2][1][RTW89_QATAR][0][81] = 127, -+ [2][1][RTW89_UK][1][81] = 127, -+ [2][1][RTW89_UK][0][81] = 127, -+ [2][1][RTW89_FCC][1][83] = -16, -+ [2][1][RTW89_FCC][2][83] = 56, -+ [2][1][RTW89_ETSI][1][83] = 127, -+ [2][1][RTW89_ETSI][0][83] = 127, -+ [2][1][RTW89_MKK][1][83] = 127, -+ [2][1][RTW89_MKK][0][83] = 127, -+ [2][1][RTW89_IC][1][83] = -16, -+ [2][1][RTW89_KCC][1][83] = -14, -+ [2][1][RTW89_KCC][0][83] = 127, -+ [2][1][RTW89_ACMA][1][83] = 127, -+ [2][1][RTW89_ACMA][0][83] = 127, -+ [2][1][RTW89_CHILE][1][83] = 127, -+ [2][1][RTW89_QATAR][1][83] = 127, -+ [2][1][RTW89_QATAR][0][83] = 127, -+ [2][1][RTW89_UK][1][83] = 127, -+ [2][1][RTW89_UK][0][83] = 127, -+ [2][1][RTW89_FCC][1][85] = -18, -+ [2][1][RTW89_FCC][2][85] = 56, -+ [2][1][RTW89_ETSI][1][85] = 127, -+ [2][1][RTW89_ETSI][0][85] = 127, -+ [2][1][RTW89_MKK][1][85] = 127, -+ [2][1][RTW89_MKK][0][85] = 127, -+ [2][1][RTW89_IC][1][85] = -18, -+ [2][1][RTW89_KCC][1][85] = -14, -+ [2][1][RTW89_KCC][0][85] = 127, -+ [2][1][RTW89_ACMA][1][85] = 127, -+ [2][1][RTW89_ACMA][0][85] = 127, -+ [2][1][RTW89_CHILE][1][85] = 127, -+ [2][1][RTW89_QATAR][1][85] = 127, -+ [2][1][RTW89_QATAR][0][85] = 127, -+ [2][1][RTW89_UK][1][85] = 127, -+ [2][1][RTW89_UK][0][85] = 127, -+ [2][1][RTW89_FCC][1][87] = -16, -+ [2][1][RTW89_FCC][2][87] = 127, -+ [2][1][RTW89_ETSI][1][87] = 127, -+ [2][1][RTW89_ETSI][0][87] = 127, -+ [2][1][RTW89_MKK][1][87] = 127, -+ [2][1][RTW89_MKK][0][87] = 127, -+ [2][1][RTW89_IC][1][87] = -16, -+ [2][1][RTW89_KCC][1][87] = -14, -+ [2][1][RTW89_KCC][0][87] = 127, -+ [2][1][RTW89_ACMA][1][87] = 127, -+ [2][1][RTW89_ACMA][0][87] = 127, -+ [2][1][RTW89_CHILE][1][87] = 127, -+ [2][1][RTW89_QATAR][1][87] = 127, -+ [2][1][RTW89_QATAR][0][87] = 127, -+ [2][1][RTW89_UK][1][87] = 127, -+ [2][1][RTW89_UK][0][87] = 127, -+ [2][1][RTW89_FCC][1][89] = -16, -+ [2][1][RTW89_FCC][2][89] = 127, -+ [2][1][RTW89_ETSI][1][89] = 127, -+ [2][1][RTW89_ETSI][0][89] = 127, -+ [2][1][RTW89_MKK][1][89] = 127, -+ [2][1][RTW89_MKK][0][89] = 127, -+ [2][1][RTW89_IC][1][89] = -16, -+ [2][1][RTW89_KCC][1][89] = -14, -+ [2][1][RTW89_KCC][0][89] = 127, -+ [2][1][RTW89_ACMA][1][89] = 127, -+ [2][1][RTW89_ACMA][0][89] = 127, -+ [2][1][RTW89_CHILE][1][89] = 127, -+ [2][1][RTW89_QATAR][1][89] = 127, -+ [2][1][RTW89_QATAR][0][89] = 127, -+ [2][1][RTW89_UK][1][89] = 127, -+ [2][1][RTW89_UK][0][89] = 127, -+ [2][1][RTW89_FCC][1][90] = -16, -+ [2][1][RTW89_FCC][2][90] = 127, -+ [2][1][RTW89_ETSI][1][90] = 127, -+ [2][1][RTW89_ETSI][0][90] = 127, -+ [2][1][RTW89_MKK][1][90] = 127, -+ [2][1][RTW89_MKK][0][90] = 127, -+ [2][1][RTW89_IC][1][90] = -16, -+ [2][1][RTW89_KCC][1][90] = -14, -+ [2][1][RTW89_KCC][0][90] = 127, -+ [2][1][RTW89_ACMA][1][90] = 127, -+ [2][1][RTW89_ACMA][0][90] = 127, -+ [2][1][RTW89_CHILE][1][90] = 127, -+ [2][1][RTW89_QATAR][1][90] = 127, -+ [2][1][RTW89_QATAR][0][90] = 127, -+ [2][1][RTW89_UK][1][90] = 127, -+ [2][1][RTW89_UK][0][90] = 127, -+ [2][1][RTW89_FCC][1][92] = -16, -+ [2][1][RTW89_FCC][2][92] = 127, -+ [2][1][RTW89_ETSI][1][92] = 127, -+ [2][1][RTW89_ETSI][0][92] = 127, -+ [2][1][RTW89_MKK][1][92] = 127, -+ [2][1][RTW89_MKK][0][92] = 127, -+ [2][1][RTW89_IC][1][92] = -16, -+ [2][1][RTW89_KCC][1][92] = -14, -+ [2][1][RTW89_KCC][0][92] = 127, -+ [2][1][RTW89_ACMA][1][92] = 127, -+ [2][1][RTW89_ACMA][0][92] = 127, -+ [2][1][RTW89_CHILE][1][92] = 127, -+ [2][1][RTW89_QATAR][1][92] = 127, -+ [2][1][RTW89_QATAR][0][92] = 127, -+ [2][1][RTW89_UK][1][92] = 127, -+ [2][1][RTW89_UK][0][92] = 127, -+ [2][1][RTW89_FCC][1][94] = -16, -+ [2][1][RTW89_FCC][2][94] = 127, -+ [2][1][RTW89_ETSI][1][94] = 127, -+ [2][1][RTW89_ETSI][0][94] = 127, -+ [2][1][RTW89_MKK][1][94] = 127, -+ [2][1][RTW89_MKK][0][94] = 127, -+ [2][1][RTW89_IC][1][94] = -16, -+ [2][1][RTW89_KCC][1][94] = -14, -+ [2][1][RTW89_KCC][0][94] = 127, -+ [2][1][RTW89_ACMA][1][94] = 127, -+ [2][1][RTW89_ACMA][0][94] = 127, -+ [2][1][RTW89_CHILE][1][94] = 127, -+ [2][1][RTW89_QATAR][1][94] = 127, -+ [2][1][RTW89_QATAR][0][94] = 127, -+ [2][1][RTW89_UK][1][94] = 127, -+ [2][1][RTW89_UK][0][94] = 127, -+ [2][1][RTW89_FCC][1][96] = -16, -+ [2][1][RTW89_FCC][2][96] = 127, -+ [2][1][RTW89_ETSI][1][96] = 127, -+ [2][1][RTW89_ETSI][0][96] = 127, -+ [2][1][RTW89_MKK][1][96] = 127, -+ [2][1][RTW89_MKK][0][96] = 127, -+ [2][1][RTW89_IC][1][96] = -16, -+ [2][1][RTW89_KCC][1][96] = -14, -+ [2][1][RTW89_KCC][0][96] = 127, -+ [2][1][RTW89_ACMA][1][96] = 127, -+ [2][1][RTW89_ACMA][0][96] = 127, -+ [2][1][RTW89_CHILE][1][96] = 127, -+ [2][1][RTW89_QATAR][1][96] = 127, -+ [2][1][RTW89_QATAR][0][96] = 127, -+ [2][1][RTW89_UK][1][96] = 127, -+ [2][1][RTW89_UK][0][96] = 127, -+ [2][1][RTW89_FCC][1][98] = -16, -+ [2][1][RTW89_FCC][2][98] = 127, -+ [2][1][RTW89_ETSI][1][98] = 127, -+ [2][1][RTW89_ETSI][0][98] = 127, -+ [2][1][RTW89_MKK][1][98] = 127, -+ [2][1][RTW89_MKK][0][98] = 127, -+ [2][1][RTW89_IC][1][98] = -16, -+ [2][1][RTW89_KCC][1][98] = -14, -+ [2][1][RTW89_KCC][0][98] = 127, -+ [2][1][RTW89_ACMA][1][98] = 127, -+ [2][1][RTW89_ACMA][0][98] = 127, -+ [2][1][RTW89_CHILE][1][98] = 127, -+ [2][1][RTW89_QATAR][1][98] = 127, -+ [2][1][RTW89_QATAR][0][98] = 127, -+ [2][1][RTW89_UK][1][98] = 127, -+ [2][1][RTW89_UK][0][98] = 127, -+ [2][1][RTW89_FCC][1][100] = -16, -+ [2][1][RTW89_FCC][2][100] = 127, -+ [2][1][RTW89_ETSI][1][100] = 127, -+ [2][1][RTW89_ETSI][0][100] = 127, -+ [2][1][RTW89_MKK][1][100] = 127, -+ [2][1][RTW89_MKK][0][100] = 127, -+ [2][1][RTW89_IC][1][100] = -16, -+ [2][1][RTW89_KCC][1][100] = -14, -+ [2][1][RTW89_KCC][0][100] = 127, -+ [2][1][RTW89_ACMA][1][100] = 127, -+ [2][1][RTW89_ACMA][0][100] = 127, -+ [2][1][RTW89_CHILE][1][100] = 127, -+ [2][1][RTW89_QATAR][1][100] = 127, -+ [2][1][RTW89_QATAR][0][100] = 127, -+ [2][1][RTW89_UK][1][100] = 127, -+ [2][1][RTW89_UK][0][100] = 127, -+ [2][1][RTW89_FCC][1][102] = -16, -+ [2][1][RTW89_FCC][2][102] = 127, -+ [2][1][RTW89_ETSI][1][102] = 127, -+ [2][1][RTW89_ETSI][0][102] = 127, -+ [2][1][RTW89_MKK][1][102] = 127, -+ [2][1][RTW89_MKK][0][102] = 127, -+ [2][1][RTW89_IC][1][102] = -16, -+ [2][1][RTW89_KCC][1][102] = -14, -+ [2][1][RTW89_KCC][0][102] = 127, -+ [2][1][RTW89_ACMA][1][102] = 127, -+ [2][1][RTW89_ACMA][0][102] = 127, -+ [2][1][RTW89_CHILE][1][102] = 127, -+ [2][1][RTW89_QATAR][1][102] = 127, -+ [2][1][RTW89_QATAR][0][102] = 127, -+ [2][1][RTW89_UK][1][102] = 127, -+ [2][1][RTW89_UK][0][102] = 127, -+ [2][1][RTW89_FCC][1][104] = -16, -+ [2][1][RTW89_FCC][2][104] = 127, -+ [2][1][RTW89_ETSI][1][104] = 127, -+ [2][1][RTW89_ETSI][0][104] = 127, -+ [2][1][RTW89_MKK][1][104] = 127, -+ [2][1][RTW89_MKK][0][104] = 127, -+ [2][1][RTW89_IC][1][104] = -16, -+ [2][1][RTW89_KCC][1][104] = -14, -+ [2][1][RTW89_KCC][0][104] = 127, -+ [2][1][RTW89_ACMA][1][104] = 127, -+ [2][1][RTW89_ACMA][0][104] = 127, -+ [2][1][RTW89_CHILE][1][104] = 127, -+ [2][1][RTW89_QATAR][1][104] = 127, -+ [2][1][RTW89_QATAR][0][104] = 127, -+ [2][1][RTW89_UK][1][104] = 127, -+ [2][1][RTW89_UK][0][104] = 127, -+ [2][1][RTW89_FCC][1][105] = -16, -+ [2][1][RTW89_FCC][2][105] = 127, -+ [2][1][RTW89_ETSI][1][105] = 127, -+ [2][1][RTW89_ETSI][0][105] = 127, -+ [2][1][RTW89_MKK][1][105] = 127, -+ [2][1][RTW89_MKK][0][105] = 127, -+ [2][1][RTW89_IC][1][105] = -16, -+ [2][1][RTW89_KCC][1][105] = -14, -+ [2][1][RTW89_KCC][0][105] = 127, -+ [2][1][RTW89_ACMA][1][105] = 127, -+ [2][1][RTW89_ACMA][0][105] = 127, -+ [2][1][RTW89_CHILE][1][105] = 127, -+ [2][1][RTW89_QATAR][1][105] = 127, -+ [2][1][RTW89_QATAR][0][105] = 127, -+ [2][1][RTW89_UK][1][105] = 127, -+ [2][1][RTW89_UK][0][105] = 127, -+ [2][1][RTW89_FCC][1][107] = -12, -+ [2][1][RTW89_FCC][2][107] = 127, -+ [2][1][RTW89_ETSI][1][107] = 127, -+ [2][1][RTW89_ETSI][0][107] = 127, -+ [2][1][RTW89_MKK][1][107] = 127, -+ [2][1][RTW89_MKK][0][107] = 127, -+ [2][1][RTW89_IC][1][107] = -12, -+ [2][1][RTW89_KCC][1][107] = -14, -+ [2][1][RTW89_KCC][0][107] = 127, -+ [2][1][RTW89_ACMA][1][107] = 127, -+ [2][1][RTW89_ACMA][0][107] = 127, -+ [2][1][RTW89_CHILE][1][107] = 127, -+ [2][1][RTW89_QATAR][1][107] = 127, -+ [2][1][RTW89_QATAR][0][107] = 127, -+ [2][1][RTW89_UK][1][107] = 127, -+ [2][1][RTW89_UK][0][107] = 127, -+ [2][1][RTW89_FCC][1][109] = -10, -+ [2][1][RTW89_FCC][2][109] = 127, -+ [2][1][RTW89_ETSI][1][109] = 127, -+ [2][1][RTW89_ETSI][0][109] = 127, -+ [2][1][RTW89_MKK][1][109] = 127, -+ [2][1][RTW89_MKK][0][109] = 127, -+ [2][1][RTW89_IC][1][109] = -10, -+ [2][1][RTW89_KCC][1][109] = 127, -+ [2][1][RTW89_KCC][0][109] = 127, -+ [2][1][RTW89_ACMA][1][109] = 127, -+ [2][1][RTW89_ACMA][0][109] = 127, -+ [2][1][RTW89_CHILE][1][109] = 127, -+ [2][1][RTW89_QATAR][1][109] = 127, -+ [2][1][RTW89_QATAR][0][109] = 127, -+ [2][1][RTW89_UK][1][109] = 127, -+ [2][1][RTW89_UK][0][109] = 127, -+ [2][1][RTW89_FCC][1][111] = 127, -+ [2][1][RTW89_FCC][2][111] = 127, -+ [2][1][RTW89_ETSI][1][111] = 127, -+ [2][1][RTW89_ETSI][0][111] = 127, -+ [2][1][RTW89_MKK][1][111] = 127, -+ [2][1][RTW89_MKK][0][111] = 127, -+ [2][1][RTW89_IC][1][111] = 127, -+ [2][1][RTW89_KCC][1][111] = 127, -+ [2][1][RTW89_KCC][0][111] = 127, -+ [2][1][RTW89_ACMA][1][111] = 127, -+ [2][1][RTW89_ACMA][0][111] = 127, -+ [2][1][RTW89_CHILE][1][111] = 127, -+ [2][1][RTW89_QATAR][1][111] = 127, -+ [2][1][RTW89_QATAR][0][111] = 127, -+ [2][1][RTW89_UK][1][111] = 127, -+ [2][1][RTW89_UK][0][111] = 127, -+ [2][1][RTW89_FCC][1][113] = 127, -+ [2][1][RTW89_FCC][2][113] = 127, -+ [2][1][RTW89_ETSI][1][113] = 127, -+ [2][1][RTW89_ETSI][0][113] = 127, -+ [2][1][RTW89_MKK][1][113] = 127, -+ [2][1][RTW89_MKK][0][113] = 127, -+ [2][1][RTW89_IC][1][113] = 127, -+ [2][1][RTW89_KCC][1][113] = 127, -+ [2][1][RTW89_KCC][0][113] = 127, -+ [2][1][RTW89_ACMA][1][113] = 127, -+ [2][1][RTW89_ACMA][0][113] = 127, -+ [2][1][RTW89_CHILE][1][113] = 127, -+ [2][1][RTW89_QATAR][1][113] = 127, -+ [2][1][RTW89_QATAR][0][113] = 127, -+ [2][1][RTW89_UK][1][113] = 127, -+ [2][1][RTW89_UK][0][113] = 127, -+ [2][1][RTW89_FCC][1][115] = 127, -+ [2][1][RTW89_FCC][2][115] = 127, -+ [2][1][RTW89_ETSI][1][115] = 127, -+ [2][1][RTW89_ETSI][0][115] = 127, -+ [2][1][RTW89_MKK][1][115] = 127, -+ [2][1][RTW89_MKK][0][115] = 127, -+ [2][1][RTW89_IC][1][115] = 127, -+ [2][1][RTW89_KCC][1][115] = 127, -+ [2][1][RTW89_KCC][0][115] = 127, -+ [2][1][RTW89_ACMA][1][115] = 127, -+ [2][1][RTW89_ACMA][0][115] = 127, -+ [2][1][RTW89_CHILE][1][115] = 127, -+ [2][1][RTW89_QATAR][1][115] = 127, -+ [2][1][RTW89_QATAR][0][115] = 127, -+ [2][1][RTW89_UK][1][115] = 127, -+ [2][1][RTW89_UK][0][115] = 127, -+ [2][1][RTW89_FCC][1][117] = 127, -+ [2][1][RTW89_FCC][2][117] = 127, -+ [2][1][RTW89_ETSI][1][117] = 127, -+ [2][1][RTW89_ETSI][0][117] = 127, -+ [2][1][RTW89_MKK][1][117] = 127, -+ [2][1][RTW89_MKK][0][117] = 127, -+ [2][1][RTW89_IC][1][117] = 127, -+ [2][1][RTW89_KCC][1][117] = 127, -+ [2][1][RTW89_KCC][0][117] = 127, -+ [2][1][RTW89_ACMA][1][117] = 127, -+ [2][1][RTW89_ACMA][0][117] = 127, -+ [2][1][RTW89_CHILE][1][117] = 127, -+ [2][1][RTW89_QATAR][1][117] = 127, -+ [2][1][RTW89_QATAR][0][117] = 127, -+ [2][1][RTW89_UK][1][117] = 127, -+ [2][1][RTW89_UK][0][117] = 127, -+ [2][1][RTW89_FCC][1][119] = 127, -+ [2][1][RTW89_FCC][2][119] = 127, -+ [2][1][RTW89_ETSI][1][119] = 127, -+ [2][1][RTW89_ETSI][0][119] = 127, -+ [2][1][RTW89_MKK][1][119] = 127, -+ [2][1][RTW89_MKK][0][119] = 127, -+ [2][1][RTW89_IC][1][119] = 127, -+ [2][1][RTW89_KCC][1][119] = 127, -+ [2][1][RTW89_KCC][0][119] = 127, -+ [2][1][RTW89_ACMA][1][119] = 127, -+ [2][1][RTW89_ACMA][0][119] = 127, -+ [2][1][RTW89_CHILE][1][119] = 127, -+ [2][1][RTW89_QATAR][1][119] = 127, -+ [2][1][RTW89_QATAR][0][119] = 127, -+ [2][1][RTW89_UK][1][119] = 127, -+ [2][1][RTW89_UK][0][119] = 127, - }; - - const struct rtw89_phy_table rtw89_8852c_phy_bb_table = { diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-133-wifi-rtw89-8852c-update-RF-radio-A-B-parameters-to-R.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-133-wifi-rtw89-8852c-update-RF-radio-A-B-parameters-to-R.patch deleted file mode 100644 index fe309522e..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-133-wifi-rtw89-8852c-update-RF-radio-A-B-parameters-to-R.patch +++ /dev/null @@ -1,7787 +0,0 @@ -From 5883fc2ef8573649ee6a63968ae82e679766b878 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 2 Jun 2023 23:05:56 +0800 -Subject: [PATCH 133/136] wifi: rtw89: 8852c: update RF radio A/B parameters to - R63 - -Update 8852c radio A/B parameters from internal HALRF_029_00_102 R63. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230602150556.36777-9-pkshih@realtek.com ---- - .../wireless/realtek/rtw89/rtw8852c_table.c | 5138 +++++++++++++---- - 1 file changed, 4052 insertions(+), 1086 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c -@@ -2551,19 +2551,27 @@ static const struct rtw89_reg2_def rtw89 - {0xF0040001, 0x0000000A}, - {0xF0050001, 0x0000000B}, - {0xF0070001, 0x0000000C}, -- {0xF0320001, 0x0000000D}, -- {0xF0330001, 0x0000000E}, -- {0xF0340001, 0x0000000F}, -- {0xF0350001, 0x00000010}, -- {0xF0360001, 0x00000011}, -- {0xF03F0001, 0x00000012}, -- {0xF0400001, 0x00000013}, -+ {0xF0150001, 0x0000000D}, -+ {0xF0160001, 0x0000000E}, -+ {0xF0320001, 0x0000000F}, -+ {0xF0330001, 0x00000010}, -+ {0xF0340001, 0x00000011}, -+ {0xF0350001, 0x00000012}, -+ {0xF0360001, 0x00000013}, -+ {0xF03F0001, 0x00000014}, -+ {0xF0400001, 0x00000015}, - {0x005, 0x00000000}, - {0x10005, 0x00000000}, - {0x000, 0x00030001}, - {0x10000, 0x00030000}, - {0x018, 0x00011124}, - {0x10018, 0x00011124}, -+ {0x0A3, 0x000B9204}, -+ {0x0AD, 0x00091E0F}, -+ {0x05D, 0x00001012}, -+ {0x05C, 0x00061C5C}, -+ {0x062, 0x00055220}, -+ {0x0D3, 0x00000103}, - {0x0EF, 0x00080000}, - {0x033, 0x00000001}, - {0x03E, 0x00000620}, -@@ -2636,6 +2644,12 @@ static const struct rtw89_reg2_def rtw89 - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x067, 0x0000D300}, - {0x0DA, 0x000D4000}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x067, 0x0000D300}, -+ {0x0DA, 0x000D4000}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x067, 0x0000D300}, -+ {0x0DA, 0x000D4000}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x067, 0x0000D300}, - {0x0DA, 0x000D4000}, -@@ -2716,6 +2730,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000000CC}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000CC}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000CC}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000CC}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000CC}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -2760,6 +2778,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000000C4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000C4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000C4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000C4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000C4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -2804,6 +2826,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000000BC}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000BC}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000BC}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000BC}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000BC}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -2848,6 +2874,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000000B4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000B4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000B4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000B4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000B4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -2892,6 +2922,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000000AC}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000AC}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000AC}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000AC}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000AC}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -2936,6 +2970,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000000A4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000A4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000A4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000A4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000A4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -2980,6 +3018,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000009C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000009C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000009C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000009C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000009C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3024,6 +3066,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000094}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000094}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000094}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000094}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000094}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3068,6 +3114,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000008C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000008C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000008C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000008C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000008C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3112,6 +3162,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000084}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000084}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000084}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000084}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000084}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3156,6 +3210,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000000BC}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000BC}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000BC}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000BC}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000BC}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3200,6 +3258,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000000B4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000B4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000B4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000B4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000B4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3244,6 +3306,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000000AC}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000AC}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000AC}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000AC}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000AC}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3288,6 +3354,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000000A4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000A4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000A4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000000A4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000000A4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3332,6 +3402,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000009C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000009C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000009C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000009C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000009C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3376,6 +3450,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000094}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000094}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000094}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000094}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000094}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3420,6 +3498,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000008C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000008C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000008C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000008C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000008C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3464,6 +3546,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000084}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000084}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000084}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000084}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000084}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3508,6 +3594,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000003C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000003C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000003C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000003C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3552,6 +3642,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000034}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000034}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000034}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000034}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000034}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3596,6 +3690,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000002C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000002C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000002C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000002C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000002C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3640,6 +3738,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000024}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000024}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000024}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000024}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000024}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3684,6 +3786,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000001C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000001C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000001C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000001C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000001C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3728,6 +3834,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000014}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000014}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000014}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000014}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000014}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3772,6 +3882,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000000C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000000C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000000C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000000C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000000C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3816,6 +3930,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000004}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000004}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000004}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000004}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000004}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3873,6 +3991,10 @@ static const struct rtw89_reg2_def rtw89 - {0x08F, 0x000D1352}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x08F, 0x000D1352}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x08F, 0x000D1352}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x08F, 0x000D1352}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x08F, 0x000D1352}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -3936,6 +4058,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000007}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000007}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000017}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000017}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000007}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -4472,6 +4598,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000EFFF}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000EFFF}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000EFFF}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000EFFF}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000EFFF}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -4810,6 +4940,32 @@ static const struct rtw89_reg2_def rtw89 - {0x030, 0x00050112}, - {0x030, 0x00058101}, - {0x030, 0x00060001}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x000085ED}, -+ {0x030, 0x000105CC}, -+ {0x030, 0x000184AA}, -+ {0x030, 0x00020388}, -+ {0x030, 0x00028377}, -+ {0x030, 0x00030377}, -+ {0x030, 0x00038255}, -+ {0x030, 0x00040244}, -+ {0x030, 0x00048133}, -+ {0x030, 0x00050112}, -+ {0x030, 0x00058101}, -+ {0x030, 0x00060001}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x000085ED}, -+ {0x030, 0x000105CC}, -+ {0x030, 0x000184AA}, -+ {0x030, 0x00020388}, -+ {0x030, 0x00028377}, -+ {0x030, 0x00030377}, -+ {0x030, 0x00038255}, -+ {0x030, 0x00040244}, -+ {0x030, 0x00048133}, -+ {0x030, 0x00050112}, -+ {0x030, 0x00058101}, -+ {0x030, 0x00060001}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x030, 0x000085ED}, - {0x030, 0x000105CC}, -@@ -5157,6 +5313,10 @@ static const struct rtw89_reg2_def rtw89 - {0x030, 0x000300FF}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x030, 0x000300FF}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x000300FF}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x000300FF}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x030, 0x000300FF}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5178,11 +5338,277 @@ static const struct rtw89_reg2_def rtw89 - {0x0EF, 0x00000000}, - {0x06E, 0x00077A18}, - {0x06D, 0x00000C31}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90320000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90330000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90340000, 0x00000000}, {0x40000000, 0x00000000}, - {0x06A, 0x000E0F8A}, - {0x06B, 0x000018A0}, - {0x06F, 0x000F81FC}, - {0x05E, 0x0000001F}, -+ {0x90350000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90360000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0380}, -+ {0x06B, 0x00003CA0}, -+ {0x06F, 0x000C01FC}, -+ {0x05E, 0x0000001F}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0380}, -+ {0x06B, 0x00003CA0}, -+ {0x06F, 0x000C01FC}, -+ {0x05E, 0x0000001F}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0xA0000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x05E, 0x0000001F}, -+ {0xB0000000, 0x00000000}, - {0x0EF, 0x00000200}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90320000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90330000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90340000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90350000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90360000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, - {0x030, 0x0003D407}, - {0x030, 0x00035A87}, - {0x030, 0x0002CF07}, -@@ -5191,14 +5617,216 @@ static const struct rtw89_reg2_def rtw89 - {0x030, 0x00014F07}, - {0x030, 0x0000CF07}, - {0x030, 0x00004F07}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0xA0000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0xB0000000, 0x00000000}, - {0x0EF, 0x00000000}, - {0x0EB, 0x00080000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90320000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90330000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90340000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90350000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90360000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0000803C}, -+ {0x030, 0x0001003C}, -+ {0x030, 0x0001803C}, -+ {0x030, 0x0002003C}, -+ {0x030, 0x0002803C}, -+ {0x030, 0x0003003C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0000803C}, -+ {0x030, 0x0001003C}, -+ {0x030, 0x0001803C}, -+ {0x030, 0x0002003C}, -+ {0x030, 0x0002803C}, -+ {0x030, 0x0003003C}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0xA0000000, 0x00000000}, - {0x030, 0x00008038}, - {0x030, 0x00010038}, - {0x030, 0x00018038}, - {0x030, 0x00020038}, - {0x030, 0x00028038}, - {0x030, 0x00030038}, -+ {0xB0000000, 0x00000000}, - {0x030, 0x0003803C}, - {0x030, 0x0004003C}, - {0x030, 0x0004803C}, -@@ -5235,6 +5863,10 @@ static const struct rtw89_reg2_def rtw89 - {0x095, 0x00000008}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x095, 0x00000008}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x095, 0x00000008}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x095, 0x00000008}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x095, 0x00000008}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5280,6 +5912,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000152}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5324,6 +5960,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000015A}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5368,6 +6008,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000019C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5412,6 +6056,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001A4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5456,6 +6104,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5500,6 +6152,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5548,6 +6204,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000152}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5592,6 +6252,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000015A}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5636,6 +6300,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000019C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5680,6 +6348,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001A4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5724,6 +6396,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5768,6 +6444,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5812,6 +6492,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5856,6 +6540,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000003E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5900,6 +6588,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000152}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5944,6 +6636,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000015A}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -5988,6 +6684,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000019C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -6032,6 +6732,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001A4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -6076,6 +6780,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -6120,6 +6828,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -6164,6 +6876,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -6208,6 +6924,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000003E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -6252,20 +6972,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000152}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0xA0000000, 0x00000000}, - {0x03F, 0x00000052}, - {0xB0000000, 0x00000000}, -@@ -6296,20 +7020,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000015A}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000005A}, - {0xB0000000, 0x00000000}, -@@ -6340,20 +7068,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000019C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000009C}, - {0xB0000000, 0x00000000}, -@@ -6384,20 +7116,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001A4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0xB0000000, 0x00000000}, -@@ -6428,20 +7164,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0xB0000000, 0x00000000}, -@@ -6472,20 +7212,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0xB0000000, 0x00000000}, -@@ -6516,20 +7260,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0xB0000000, 0x00000000}, -@@ -6560,20 +7308,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000003E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000003E6}, - {0xB0000000, 0x00000000}, -@@ -6604,20 +7356,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000152}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0xA0000000, 0x00000000}, - {0x03F, 0x00000052}, - {0xB0000000, 0x00000000}, -@@ -6648,20 +7404,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000015A}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000005A}, - {0xB0000000, 0x00000000}, -@@ -6692,20 +7452,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000019C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000009C}, - {0xB0000000, 0x00000000}, -@@ -6736,20 +7500,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001A4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0xB0000000, 0x00000000}, -@@ -6780,20 +7548,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0xB0000000, 0x00000000}, -@@ -6824,20 +7596,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0xB0000000, 0x00000000}, -@@ -6868,20 +7644,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0xB0000000, 0x00000000}, -@@ -6912,20 +7692,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000003E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000003E6}, - {0xB0000000, 0x00000000}, -@@ -6956,20 +7740,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000152}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0xA0000000, 0x00000000}, - {0x03F, 0x00000052}, - {0xB0000000, 0x00000000}, -@@ -7000,20 +7788,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000015A}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000005A}, - {0xB0000000, 0x00000000}, -@@ -7044,20 +7836,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000019C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000009C}, - {0xB0000000, 0x00000000}, -@@ -7088,20 +7884,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001A4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0xB0000000, 0x00000000}, -@@ -7132,20 +7932,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0xB0000000, 0x00000000}, -@@ -7176,20 +7980,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0xB0000000, 0x00000000}, -@@ -7220,20 +8028,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0xB0000000, 0x00000000}, -@@ -7264,20 +8076,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000003E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000003E6}, - {0xB0000000, 0x00000000}, -@@ -7308,20 +8124,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000152}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0xA0000000, 0x00000000}, - {0x03F, 0x00000052}, - {0xB0000000, 0x00000000}, -@@ -7352,20 +8172,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000015A}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000005A}, - {0xB0000000, 0x00000000}, -@@ -7396,20 +8220,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000019C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000009C}, - {0xB0000000, 0x00000000}, -@@ -7440,20 +8268,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001A4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0xB0000000, 0x00000000}, -@@ -7484,20 +8316,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0xB0000000, 0x00000000}, -@@ -7528,20 +8364,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0xB0000000, 0x00000000}, -@@ -9436,7 +10276,7 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x0007BC1D}, - {0x10030, 0x0007C017}, - {0x10030, 0x0007C40F}, -- {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x000001EF}, - {0x10030, 0x000005E9}, - {0x10030, 0x000009E3}, -@@ -9581,7 +10421,7 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x0007BC1D}, - {0x10030, 0x0007C017}, - {0x10030, 0x0007C40F}, -- {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x000001EF}, - {0x10030, 0x000005E9}, - {0x10030, 0x000009E3}, -@@ -9600,60 +10440,60 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x00003C5F}, - {0x10030, 0x00004059}, - {0x10030, 0x00004453}, -- {0x10030, 0x000201A7}, -- {0x10030, 0x000205A1}, -- {0x10030, 0x0002099B}, -- {0x10030, 0x00020D95}, -- {0x10030, 0x0002115B}, -- {0x10030, 0x00021555}, -- {0x10030, 0x00021921}, -- {0x10030, 0x00021D1B}, -- {0x10030, 0x000220E3}, -- {0x10030, 0x000224DD}, -+ {0x10030, 0x000201EF}, -+ {0x10030, 0x000205E9}, -+ {0x10030, 0x000209E3}, -+ {0x10030, 0x00020DA3}, -+ {0x10030, 0x00021161}, -+ {0x10030, 0x0002155B}, -+ {0x10030, 0x0002191F}, -+ {0x10030, 0x00021D19}, -+ {0x10030, 0x000220E1}, -+ {0x10030, 0x000224DB}, - {0x10030, 0x000228A3}, - {0x10030, 0x00022C9D}, - {0x10030, 0x00023063}, - {0x10030, 0x0002345D}, - {0x10030, 0x00023823}, -- {0x10030, 0x00023C1D}, -- {0x10030, 0x00024017}, -- {0x10030, 0x00024411}, -- {0x10030, 0x000281A9}, -- {0x10030, 0x000285A3}, -- {0x10030, 0x0002899D}, -- {0x10030, 0x00028D97}, -- {0x10030, 0x0002915D}, -- {0x10030, 0x00029557}, -- {0x10030, 0x0002991F}, -- {0x10030, 0x00029D19}, -- {0x10030, 0x0002A0E1}, -- {0x10030, 0x0002A4DB}, -+ {0x10030, 0x00023C1B}, -+ {0x10030, 0x00024015}, -+ {0x10030, 0x0002440F}, -+ {0x10030, 0x000281EF}, -+ {0x10030, 0x000285E7}, -+ {0x10030, 0x000289A7}, -+ {0x10030, 0x00028D65}, -+ {0x10030, 0x0002915F}, -+ {0x10030, 0x00029523}, -+ {0x10030, 0x0002991D}, -+ {0x10030, 0x00029CE5}, -+ {0x10030, 0x0002A0DF}, -+ {0x10030, 0x0002A4A7}, - {0x10030, 0x0002A8A1}, -- {0x10030, 0x0002AC9B}, -+ {0x10030, 0x0002AC67}, - {0x10030, 0x0002B061}, -- {0x10030, 0x0002B45B}, -+ {0x10030, 0x0002B427}, - {0x10030, 0x0002B821}, -- {0x10030, 0x0002BC1B}, -- {0x10030, 0x0002C015}, -- {0x10030, 0x0002C40F}, -- {0x10030, 0x000301A9}, -- {0x10030, 0x000305A3}, -- {0x10030, 0x0003099D}, -- {0x10030, 0x00030D97}, -- {0x10030, 0x0003115D}, -- {0x10030, 0x00031557}, -+ {0x10030, 0x0002BC19}, -+ {0x10030, 0x0002C013}, -+ {0x10030, 0x0002C40D}, -+ {0x10030, 0x000301EF}, -+ {0x10030, 0x000305E7}, -+ {0x10030, 0x000309A7}, -+ {0x10030, 0x00030D65}, -+ {0x10030, 0x0003115F}, -+ {0x10030, 0x00031525}, - {0x10030, 0x0003191F}, -- {0x10030, 0x00031D19}, -+ {0x10030, 0x00031CE7}, - {0x10030, 0x000320E1}, -- {0x10030, 0x000324DB}, -- {0x10030, 0x000328A1}, -- {0x10030, 0x00032C9B}, -- {0x10030, 0x00033061}, -- {0x10030, 0x0003345B}, -- {0x10030, 0x00033821}, -- {0x10030, 0x00033C1B}, -- {0x10030, 0x00034015}, -- {0x10030, 0x0003440F}, -+ {0x10030, 0x000324A9}, -+ {0x10030, 0x000328A3}, -+ {0x10030, 0x00032C69}, -+ {0x10030, 0x00033063}, -+ {0x10030, 0x00033429}, -+ {0x10030, 0x00033823}, -+ {0x10030, 0x00033C1D}, -+ {0x10030, 0x00034013}, -+ {0x10030, 0x0003440D}, - {0x10030, 0x000601F1}, - {0x10030, 0x000605E9}, - {0x10030, 0x000609A9}, -@@ -9697,7 +10537,7 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x0007115B}, - {0x10030, 0x00071523}, - {0x10030, 0x0007191D}, -- {0x10030, 0x00071CE5}, -+ {0x10030, 0x00071D17}, - {0x10030, 0x000720DF}, - {0x10030, 0x000724D9}, - {0x10030, 0x000728A1}, -@@ -9726,7 +10566,7 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x0007BC1D}, - {0x10030, 0x0007C017}, - {0x10030, 0x0007C40F}, -- {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x000001EF}, - {0x10030, 0x000005E9}, - {0x10030, 0x000009E3}, -@@ -9745,60 +10585,60 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x00003C5F}, - {0x10030, 0x00004059}, - {0x10030, 0x00004453}, -- {0x10030, 0x000201A7}, -- {0x10030, 0x000205A1}, -- {0x10030, 0x0002099B}, -- {0x10030, 0x00020D95}, -- {0x10030, 0x0002115B}, -- {0x10030, 0x00021555}, -- {0x10030, 0x00021921}, -- {0x10030, 0x00021D1B}, -- {0x10030, 0x000220E3}, -- {0x10030, 0x000224DD}, -+ {0x10030, 0x000201EF}, -+ {0x10030, 0x000205E9}, -+ {0x10030, 0x000209E3}, -+ {0x10030, 0x00020DA3}, -+ {0x10030, 0x00021161}, -+ {0x10030, 0x0002155B}, -+ {0x10030, 0x0002191F}, -+ {0x10030, 0x00021D19}, -+ {0x10030, 0x000220E1}, -+ {0x10030, 0x000224DB}, - {0x10030, 0x000228A3}, - {0x10030, 0x00022C9D}, - {0x10030, 0x00023063}, - {0x10030, 0x0002345D}, - {0x10030, 0x00023823}, -- {0x10030, 0x00023C1D}, -- {0x10030, 0x00024017}, -- {0x10030, 0x00024411}, -- {0x10030, 0x000281A9}, -- {0x10030, 0x000285A3}, -- {0x10030, 0x0002899D}, -- {0x10030, 0x00028D97}, -- {0x10030, 0x0002915D}, -- {0x10030, 0x00029557}, -- {0x10030, 0x0002991F}, -- {0x10030, 0x00029D19}, -- {0x10030, 0x0002A0E1}, -- {0x10030, 0x0002A4DB}, -+ {0x10030, 0x00023C1B}, -+ {0x10030, 0x00024015}, -+ {0x10030, 0x0002440F}, -+ {0x10030, 0x000281EF}, -+ {0x10030, 0x000285E7}, -+ {0x10030, 0x000289A7}, -+ {0x10030, 0x00028D65}, -+ {0x10030, 0x0002915F}, -+ {0x10030, 0x00029523}, -+ {0x10030, 0x0002991D}, -+ {0x10030, 0x00029CE5}, -+ {0x10030, 0x0002A0DF}, -+ {0x10030, 0x0002A4A7}, - {0x10030, 0x0002A8A1}, -- {0x10030, 0x0002AC9B}, -+ {0x10030, 0x0002AC67}, - {0x10030, 0x0002B061}, -- {0x10030, 0x0002B45B}, -+ {0x10030, 0x0002B427}, - {0x10030, 0x0002B821}, -- {0x10030, 0x0002BC1B}, -- {0x10030, 0x0002C015}, -- {0x10030, 0x0002C40F}, -- {0x10030, 0x000301A9}, -- {0x10030, 0x000305A3}, -- {0x10030, 0x0003099D}, -- {0x10030, 0x00030D97}, -- {0x10030, 0x0003115D}, -- {0x10030, 0x00031557}, -+ {0x10030, 0x0002BC19}, -+ {0x10030, 0x0002C013}, -+ {0x10030, 0x0002C40D}, -+ {0x10030, 0x000301EF}, -+ {0x10030, 0x000305E7}, -+ {0x10030, 0x000309A7}, -+ {0x10030, 0x00030D65}, -+ {0x10030, 0x0003115F}, -+ {0x10030, 0x00031525}, - {0x10030, 0x0003191F}, -- {0x10030, 0x00031D19}, -+ {0x10030, 0x00031CE7}, - {0x10030, 0x000320E1}, -- {0x10030, 0x000324DB}, -- {0x10030, 0x000328A1}, -- {0x10030, 0x00032C9B}, -- {0x10030, 0x00033061}, -- {0x10030, 0x0003345B}, -- {0x10030, 0x00033821}, -- {0x10030, 0x00033C1B}, -- {0x10030, 0x00034015}, -- {0x10030, 0x0003440F}, -+ {0x10030, 0x000324A9}, -+ {0x10030, 0x000328A3}, -+ {0x10030, 0x00032C69}, -+ {0x10030, 0x00033063}, -+ {0x10030, 0x00033429}, -+ {0x10030, 0x00033823}, -+ {0x10030, 0x00033C1D}, -+ {0x10030, 0x00034013}, -+ {0x10030, 0x0003440D}, - {0x10030, 0x000601F1}, - {0x10030, 0x000605E9}, - {0x10030, 0x000609A9}, -@@ -9842,7 +10682,7 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x0007115B}, - {0x10030, 0x00071523}, - {0x10030, 0x0007191D}, -- {0x10030, 0x00071CE5}, -+ {0x10030, 0x00071D17}, - {0x10030, 0x000720DF}, - {0x10030, 0x000724D9}, - {0x10030, 0x000728A1}, -@@ -9871,6 +10711,296 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x0007BC1D}, - {0x10030, 0x0007C017}, - {0x10030, 0x0007C40F}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x000001EF}, -+ {0x10030, 0x000005E9}, -+ {0x10030, 0x000009E3}, -+ {0x10030, 0x00000DDD}, -+ {0x10030, 0x000011D7}, -+ {0x10030, 0x0000159F}, -+ {0x10030, 0x00001999}, -+ {0x10030, 0x00001D5F}, -+ {0x10030, 0x00002159}, -+ {0x10030, 0x0000251F}, -+ {0x10030, 0x00002919}, -+ {0x10030, 0x00002CDF}, -+ {0x10030, 0x000030D9}, -+ {0x10030, 0x0000349F}, -+ {0x10030, 0x00003899}, -+ {0x10030, 0x00003C5F}, -+ {0x10030, 0x00004059}, -+ {0x10030, 0x00004453}, -+ {0x10030, 0x000201A7}, -+ {0x10030, 0x000205A1}, -+ {0x10030, 0x0002099B}, -+ {0x10030, 0x00020D95}, -+ {0x10030, 0x0002115B}, -+ {0x10030, 0x00021555}, -+ {0x10030, 0x00021921}, -+ {0x10030, 0x00021D1B}, -+ {0x10030, 0x000220E3}, -+ {0x10030, 0x000224DD}, -+ {0x10030, 0x000228A3}, -+ {0x10030, 0x00022C9D}, -+ {0x10030, 0x00023063}, -+ {0x10030, 0x0002345D}, -+ {0x10030, 0x00023823}, -+ {0x10030, 0x00023C1D}, -+ {0x10030, 0x00024017}, -+ {0x10030, 0x00024411}, -+ {0x10030, 0x000281A9}, -+ {0x10030, 0x000285A3}, -+ {0x10030, 0x0002899D}, -+ {0x10030, 0x00028D97}, -+ {0x10030, 0x0002915D}, -+ {0x10030, 0x00029557}, -+ {0x10030, 0x0002991F}, -+ {0x10030, 0x00029D19}, -+ {0x10030, 0x0002A0E1}, -+ {0x10030, 0x0002A4DB}, -+ {0x10030, 0x0002A8A1}, -+ {0x10030, 0x0002AC9B}, -+ {0x10030, 0x0002B061}, -+ {0x10030, 0x0002B45B}, -+ {0x10030, 0x0002B821}, -+ {0x10030, 0x0002BC1B}, -+ {0x10030, 0x0002C015}, -+ {0x10030, 0x0002C40F}, -+ {0x10030, 0x000301A9}, -+ {0x10030, 0x000305A3}, -+ {0x10030, 0x0003099D}, -+ {0x10030, 0x00030D97}, -+ {0x10030, 0x0003115D}, -+ {0x10030, 0x00031557}, -+ {0x10030, 0x0003191F}, -+ {0x10030, 0x00031D19}, -+ {0x10030, 0x000320E1}, -+ {0x10030, 0x000324DB}, -+ {0x10030, 0x000328A1}, -+ {0x10030, 0x00032C9B}, -+ {0x10030, 0x00033061}, -+ {0x10030, 0x0003345B}, -+ {0x10030, 0x00033821}, -+ {0x10030, 0x00033C1B}, -+ {0x10030, 0x00034015}, -+ {0x10030, 0x0003440F}, -+ {0x10030, 0x000601F1}, -+ {0x10030, 0x000605E9}, -+ {0x10030, 0x000609A9}, -+ {0x10030, 0x00060D65}, -+ {0x10030, 0x0006115F}, -+ {0x10030, 0x00061527}, -+ {0x10030, 0x00061921}, -+ {0x10030, 0x00061CE9}, -+ {0x10030, 0x000620E3}, -+ {0x10030, 0x000624DD}, -+ {0x10030, 0x000628A5}, -+ {0x10030, 0x00062C6B}, -+ {0x10030, 0x00063065}, -+ {0x10030, 0x0006342B}, -+ {0x10030, 0x00063825}, -+ {0x10030, 0x00063C1F}, -+ {0x10030, 0x00064019}, -+ {0x10030, 0x00064413}, -+ {0x10030, 0x000681EF}, -+ {0x10030, 0x000685E7}, -+ {0x10030, 0x000689A7}, -+ {0x10030, 0x00068D61}, -+ {0x10030, 0x0006915B}, -+ {0x10030, 0x00069525}, -+ {0x10030, 0x0006991F}, -+ {0x10030, 0x00069CE7}, -+ {0x10030, 0x0006A0E1}, -+ {0x10030, 0x0006A4A9}, -+ {0x10030, 0x0006A8A3}, -+ {0x10030, 0x0006AC69}, -+ {0x10030, 0x0006B063}, -+ {0x10030, 0x0006B429}, -+ {0x10030, 0x0006B823}, -+ {0x10030, 0x0006BC1D}, -+ {0x10030, 0x0006C017}, -+ {0x10030, 0x0006C411}, -+ {0x10030, 0x000701EF}, -+ {0x10030, 0x000705E9}, -+ {0x10030, 0x000709A9}, -+ {0x10030, 0x00070D63}, -+ {0x10030, 0x0007115D}, -+ {0x10030, 0x00071525}, -+ {0x10030, 0x0007191F}, -+ {0x10030, 0x00071D19}, -+ {0x10030, 0x000720E1}, -+ {0x10030, 0x000724DB}, -+ {0x10030, 0x000728A3}, -+ {0x10030, 0x00072C69}, -+ {0x10030, 0x00073063}, -+ {0x10030, 0x00073429}, -+ {0x10030, 0x00073823}, -+ {0x10030, 0x00073C1D}, -+ {0x10030, 0x00074017}, -+ {0x10030, 0x00074411}, -+ {0x10030, 0x000781EF}, -+ {0x10030, 0x000785E9}, -+ {0x10030, 0x000789E3}, -+ {0x10030, 0x00078DA1}, -+ {0x10030, 0x0007915F}, -+ {0x10030, 0x00079559}, -+ {0x10030, 0x0007991F}, -+ {0x10030, 0x00079D19}, -+ {0x10030, 0x0007A0DF}, -+ {0x10030, 0x0007A4D9}, -+ {0x10030, 0x0007A8D3}, -+ {0x10030, 0x0007AC99}, -+ {0x10030, 0x0007B05F}, -+ {0x10030, 0x0007B459}, -+ {0x10030, 0x0007B81F}, -+ {0x10030, 0x0007BC19}, -+ {0x10030, 0x0007C013}, -+ {0x10030, 0x0007C40D}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x000001EF}, -+ {0x10030, 0x000005E9}, -+ {0x10030, 0x000009E3}, -+ {0x10030, 0x00000DDD}, -+ {0x10030, 0x000011D7}, -+ {0x10030, 0x0000159F}, -+ {0x10030, 0x00001999}, -+ {0x10030, 0x00001D5F}, -+ {0x10030, 0x00002159}, -+ {0x10030, 0x0000251F}, -+ {0x10030, 0x00002919}, -+ {0x10030, 0x00002CDF}, -+ {0x10030, 0x000030D9}, -+ {0x10030, 0x0000349F}, -+ {0x10030, 0x00003899}, -+ {0x10030, 0x00003C5F}, -+ {0x10030, 0x00004059}, -+ {0x10030, 0x00004453}, -+ {0x10030, 0x000201A7}, -+ {0x10030, 0x000205A1}, -+ {0x10030, 0x0002099B}, -+ {0x10030, 0x00020D95}, -+ {0x10030, 0x0002115B}, -+ {0x10030, 0x00021555}, -+ {0x10030, 0x00021921}, -+ {0x10030, 0x00021D1B}, -+ {0x10030, 0x000220E3}, -+ {0x10030, 0x000224DD}, -+ {0x10030, 0x000228A3}, -+ {0x10030, 0x00022C9D}, -+ {0x10030, 0x00023063}, -+ {0x10030, 0x0002345D}, -+ {0x10030, 0x00023823}, -+ {0x10030, 0x00023C1D}, -+ {0x10030, 0x00024017}, -+ {0x10030, 0x00024411}, -+ {0x10030, 0x000281A9}, -+ {0x10030, 0x000285A3}, -+ {0x10030, 0x0002899D}, -+ {0x10030, 0x00028D97}, -+ {0x10030, 0x0002915D}, -+ {0x10030, 0x00029557}, -+ {0x10030, 0x0002991F}, -+ {0x10030, 0x00029D19}, -+ {0x10030, 0x0002A0E1}, -+ {0x10030, 0x0002A4DB}, -+ {0x10030, 0x0002A8A1}, -+ {0x10030, 0x0002AC9B}, -+ {0x10030, 0x0002B061}, -+ {0x10030, 0x0002B45B}, -+ {0x10030, 0x0002B821}, -+ {0x10030, 0x0002BC1B}, -+ {0x10030, 0x0002C015}, -+ {0x10030, 0x0002C40F}, -+ {0x10030, 0x000301A9}, -+ {0x10030, 0x000305A3}, -+ {0x10030, 0x0003099D}, -+ {0x10030, 0x00030D97}, -+ {0x10030, 0x0003115D}, -+ {0x10030, 0x00031557}, -+ {0x10030, 0x0003191F}, -+ {0x10030, 0x00031D19}, -+ {0x10030, 0x000320E1}, -+ {0x10030, 0x000324DB}, -+ {0x10030, 0x000328A1}, -+ {0x10030, 0x00032C9B}, -+ {0x10030, 0x00033061}, -+ {0x10030, 0x0003345B}, -+ {0x10030, 0x00033821}, -+ {0x10030, 0x00033C1B}, -+ {0x10030, 0x00034015}, -+ {0x10030, 0x0003440F}, -+ {0x10030, 0x000601F1}, -+ {0x10030, 0x000605E9}, -+ {0x10030, 0x000609A9}, -+ {0x10030, 0x00060D65}, -+ {0x10030, 0x0006115F}, -+ {0x10030, 0x00061527}, -+ {0x10030, 0x00061921}, -+ {0x10030, 0x00061CE9}, -+ {0x10030, 0x000620E3}, -+ {0x10030, 0x000624DD}, -+ {0x10030, 0x000628A5}, -+ {0x10030, 0x00062C6B}, -+ {0x10030, 0x00063065}, -+ {0x10030, 0x0006342B}, -+ {0x10030, 0x00063825}, -+ {0x10030, 0x00063C1F}, -+ {0x10030, 0x00064019}, -+ {0x10030, 0x00064413}, -+ {0x10030, 0x000681EF}, -+ {0x10030, 0x000685E7}, -+ {0x10030, 0x000689A7}, -+ {0x10030, 0x00068D61}, -+ {0x10030, 0x0006915B}, -+ {0x10030, 0x00069525}, -+ {0x10030, 0x0006991F}, -+ {0x10030, 0x00069CE7}, -+ {0x10030, 0x0006A0E1}, -+ {0x10030, 0x0006A4A9}, -+ {0x10030, 0x0006A8A3}, -+ {0x10030, 0x0006AC69}, -+ {0x10030, 0x0006B063}, -+ {0x10030, 0x0006B429}, -+ {0x10030, 0x0006B823}, -+ {0x10030, 0x0006BC1D}, -+ {0x10030, 0x0006C017}, -+ {0x10030, 0x0006C411}, -+ {0x10030, 0x000701EF}, -+ {0x10030, 0x000705E9}, -+ {0x10030, 0x000709A9}, -+ {0x10030, 0x00070D63}, -+ {0x10030, 0x0007115D}, -+ {0x10030, 0x00071525}, -+ {0x10030, 0x0007191F}, -+ {0x10030, 0x00071D19}, -+ {0x10030, 0x000720E1}, -+ {0x10030, 0x000724DB}, -+ {0x10030, 0x000728A3}, -+ {0x10030, 0x00072C69}, -+ {0x10030, 0x00073063}, -+ {0x10030, 0x00073429}, -+ {0x10030, 0x00073823}, -+ {0x10030, 0x00073C1D}, -+ {0x10030, 0x00074017}, -+ {0x10030, 0x00074411}, -+ {0x10030, 0x000781EF}, -+ {0x10030, 0x000785E9}, -+ {0x10030, 0x000789E3}, -+ {0x10030, 0x00078DA1}, -+ {0x10030, 0x0007915F}, -+ {0x10030, 0x00079559}, -+ {0x10030, 0x0007991F}, -+ {0x10030, 0x00079D19}, -+ {0x10030, 0x0007A0DF}, -+ {0x10030, 0x0007A4D9}, -+ {0x10030, 0x0007A8D3}, -+ {0x10030, 0x0007AC99}, -+ {0x10030, 0x0007B05F}, -+ {0x10030, 0x0007B459}, -+ {0x10030, 0x0007B81F}, -+ {0x10030, 0x0007BC19}, -+ {0x10030, 0x0007C013}, -+ {0x10030, 0x0007C40D}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x000001EF}, - {0x10030, 0x000005E9}, -@@ -9949,73 +11079,73 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x000609A9}, - {0x10030, 0x00060D65}, - {0x10030, 0x0006115F}, -- {0x10030, 0x00061525}, -- {0x10030, 0x0006191F}, -- {0x10030, 0x00061CE7}, -- {0x10030, 0x000620E1}, -- {0x10030, 0x000624DB}, -- {0x10030, 0x000628A3}, -- {0x10030, 0x00062C69}, -- {0x10030, 0x00063063}, -- {0x10030, 0x00063429}, -- {0x10030, 0x00063823}, -- {0x10030, 0x00063C1D}, -- {0x10030, 0x00064013}, -- {0x10030, 0x0006440D}, -+ {0x10030, 0x00061527}, -+ {0x10030, 0x00061921}, -+ {0x10030, 0x00061CE9}, -+ {0x10030, 0x000620E3}, -+ {0x10030, 0x000624DD}, -+ {0x10030, 0x000628A5}, -+ {0x10030, 0x00062C6B}, -+ {0x10030, 0x00063065}, -+ {0x10030, 0x0006342B}, -+ {0x10030, 0x00063825}, -+ {0x10030, 0x00063C1F}, -+ {0x10030, 0x00064019}, -+ {0x10030, 0x00064413}, - {0x10030, 0x000681EF}, - {0x10030, 0x000685E7}, - {0x10030, 0x000689A7}, - {0x10030, 0x00068D61}, - {0x10030, 0x0006915B}, -- {0x10030, 0x00069523}, -- {0x10030, 0x0006991D}, -- {0x10030, 0x00069CE5}, -- {0x10030, 0x0006A0DF}, -- {0x10030, 0x0006A4A7}, -- {0x10030, 0x0006A8A1}, -- {0x10030, 0x0006AC67}, -- {0x10030, 0x0006B061}, -+ {0x10030, 0x00069525}, -+ {0x10030, 0x0006991F}, -+ {0x10030, 0x00069CE7}, -+ {0x10030, 0x0006A0E1}, -+ {0x10030, 0x0006A4A9}, -+ {0x10030, 0x0006A8A3}, -+ {0x10030, 0x0006AC69}, -+ {0x10030, 0x0006B063}, - {0x10030, 0x0006B429}, - {0x10030, 0x0006B823}, - {0x10030, 0x0006BC1D}, - {0x10030, 0x0006C017}, -- {0x10030, 0x0006C40D}, -+ {0x10030, 0x0006C411}, - {0x10030, 0x000701EF}, -- {0x10030, 0x000705E7}, -- {0x10030, 0x000709A7}, -- {0x10030, 0x00070D61}, -- {0x10030, 0x0007115B}, -- {0x10030, 0x00071523}, -- {0x10030, 0x0007191D}, -- {0x10030, 0x00071CE5}, -- {0x10030, 0x000720DF}, -- {0x10030, 0x000724D9}, -- {0x10030, 0x000728A1}, -- {0x10030, 0x00072C67}, -- {0x10030, 0x00073061}, -- {0x10030, 0x00073427}, -- {0x10030, 0x00073821}, -- {0x10030, 0x00073C1B}, -- {0x10030, 0x00074015}, -- {0x10030, 0x0007440D}, -+ {0x10030, 0x000705E9}, -+ {0x10030, 0x000709A9}, -+ {0x10030, 0x00070D63}, -+ {0x10030, 0x0007115D}, -+ {0x10030, 0x00071525}, -+ {0x10030, 0x0007191F}, -+ {0x10030, 0x00071D19}, -+ {0x10030, 0x000720E1}, -+ {0x10030, 0x000724DB}, -+ {0x10030, 0x000728A3}, -+ {0x10030, 0x00072C69}, -+ {0x10030, 0x00073063}, -+ {0x10030, 0x00073429}, -+ {0x10030, 0x00073823}, -+ {0x10030, 0x00073C1D}, -+ {0x10030, 0x00074017}, -+ {0x10030, 0x00074411}, - {0x10030, 0x000781EF}, - {0x10030, 0x000785E9}, - {0x10030, 0x000789E3}, - {0x10030, 0x00078DA1}, - {0x10030, 0x0007915F}, - {0x10030, 0x00079559}, -- {0x10030, 0x00079921}, -- {0x10030, 0x00079D1B}, -- {0x10030, 0x0007A0E3}, -- {0x10030, 0x0007A4DD}, -- {0x10030, 0x0007A8D7}, -- {0x10030, 0x0007AC9D}, -- {0x10030, 0x0007B063}, -- {0x10030, 0x0007B45D}, -- {0x10030, 0x0007B823}, -- {0x10030, 0x0007BC1D}, -- {0x10030, 0x0007C017}, -- {0x10030, 0x0007C40F}, -+ {0x10030, 0x0007991F}, -+ {0x10030, 0x00079D19}, -+ {0x10030, 0x0007A0DF}, -+ {0x10030, 0x0007A4D9}, -+ {0x10030, 0x0007A8D3}, -+ {0x10030, 0x0007AC99}, -+ {0x10030, 0x0007B05F}, -+ {0x10030, 0x0007B459}, -+ {0x10030, 0x0007B81F}, -+ {0x10030, 0x0007BC19}, -+ {0x10030, 0x0007C013}, -+ {0x10030, 0x0007C40D}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x000001EF}, - {0x10030, 0x000005E9}, -@@ -10094,73 +11224,73 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x000609A9}, - {0x10030, 0x00060D65}, - {0x10030, 0x0006115F}, -- {0x10030, 0x00061525}, -- {0x10030, 0x0006191F}, -- {0x10030, 0x00061CE7}, -- {0x10030, 0x000620E1}, -- {0x10030, 0x000624DB}, -- {0x10030, 0x000628A3}, -- {0x10030, 0x00062C69}, -- {0x10030, 0x00063063}, -- {0x10030, 0x00063429}, -- {0x10030, 0x00063823}, -- {0x10030, 0x00063C1D}, -- {0x10030, 0x00064013}, -- {0x10030, 0x0006440D}, -+ {0x10030, 0x00061527}, -+ {0x10030, 0x00061921}, -+ {0x10030, 0x00061CE9}, -+ {0x10030, 0x000620E3}, -+ {0x10030, 0x000624DD}, -+ {0x10030, 0x000628A5}, -+ {0x10030, 0x00062C6B}, -+ {0x10030, 0x00063065}, -+ {0x10030, 0x0006342B}, -+ {0x10030, 0x00063825}, -+ {0x10030, 0x00063C1F}, -+ {0x10030, 0x00064019}, -+ {0x10030, 0x00064413}, - {0x10030, 0x000681EF}, - {0x10030, 0x000685E7}, - {0x10030, 0x000689A7}, - {0x10030, 0x00068D61}, - {0x10030, 0x0006915B}, -- {0x10030, 0x00069523}, -- {0x10030, 0x0006991D}, -- {0x10030, 0x00069CE5}, -- {0x10030, 0x0006A0DF}, -- {0x10030, 0x0006A4A7}, -- {0x10030, 0x0006A8A1}, -- {0x10030, 0x0006AC67}, -- {0x10030, 0x0006B061}, -+ {0x10030, 0x00069525}, -+ {0x10030, 0x0006991F}, -+ {0x10030, 0x00069CE7}, -+ {0x10030, 0x0006A0E1}, -+ {0x10030, 0x0006A4A9}, -+ {0x10030, 0x0006A8A3}, -+ {0x10030, 0x0006AC69}, -+ {0x10030, 0x0006B063}, - {0x10030, 0x0006B429}, - {0x10030, 0x0006B823}, - {0x10030, 0x0006BC1D}, - {0x10030, 0x0006C017}, -- {0x10030, 0x0006C40D}, -+ {0x10030, 0x0006C411}, - {0x10030, 0x000701EF}, -- {0x10030, 0x000705E7}, -- {0x10030, 0x000709A7}, -- {0x10030, 0x00070D61}, -- {0x10030, 0x0007115B}, -- {0x10030, 0x00071523}, -- {0x10030, 0x0007191D}, -- {0x10030, 0x00071CE5}, -- {0x10030, 0x000720DF}, -- {0x10030, 0x000724D9}, -- {0x10030, 0x000728A1}, -- {0x10030, 0x00072C67}, -- {0x10030, 0x00073061}, -- {0x10030, 0x00073427}, -- {0x10030, 0x00073821}, -- {0x10030, 0x00073C1B}, -- {0x10030, 0x00074015}, -- {0x10030, 0x0007440D}, -+ {0x10030, 0x000705E9}, -+ {0x10030, 0x000709A9}, -+ {0x10030, 0x00070D63}, -+ {0x10030, 0x0007115D}, -+ {0x10030, 0x00071525}, -+ {0x10030, 0x0007191F}, -+ {0x10030, 0x00071D19}, -+ {0x10030, 0x000720E1}, -+ {0x10030, 0x000724DB}, -+ {0x10030, 0x000728A3}, -+ {0x10030, 0x00072C69}, -+ {0x10030, 0x00073063}, -+ {0x10030, 0x00073429}, -+ {0x10030, 0x00073823}, -+ {0x10030, 0x00073C1D}, -+ {0x10030, 0x00074017}, -+ {0x10030, 0x00074411}, - {0x10030, 0x000781EF}, - {0x10030, 0x000785E9}, - {0x10030, 0x000789E3}, - {0x10030, 0x00078DA1}, - {0x10030, 0x0007915F}, - {0x10030, 0x00079559}, -- {0x10030, 0x00079921}, -- {0x10030, 0x00079D1B}, -- {0x10030, 0x0007A0E3}, -- {0x10030, 0x0007A4DD}, -- {0x10030, 0x0007A8D7}, -- {0x10030, 0x0007AC9D}, -- {0x10030, 0x0007B063}, -- {0x10030, 0x0007B45D}, -- {0x10030, 0x0007B823}, -- {0x10030, 0x0007BC1D}, -- {0x10030, 0x0007C017}, -- {0x10030, 0x0007C40F}, -+ {0x10030, 0x0007991F}, -+ {0x10030, 0x00079D19}, -+ {0x10030, 0x0007A0DF}, -+ {0x10030, 0x0007A4D9}, -+ {0x10030, 0x0007A8D3}, -+ {0x10030, 0x0007AC99}, -+ {0x10030, 0x0007B05F}, -+ {0x10030, 0x0007B459}, -+ {0x10030, 0x0007B81F}, -+ {0x10030, 0x0007BC19}, -+ {0x10030, 0x0007C013}, -+ {0x10030, 0x0007C40D}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x000001EF}, - {0x10030, 0x000005E9}, -@@ -10239,73 +11369,73 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x000609A9}, - {0x10030, 0x00060D65}, - {0x10030, 0x0006115F}, -- {0x10030, 0x00061525}, -- {0x10030, 0x0006191F}, -- {0x10030, 0x00061CE7}, -- {0x10030, 0x000620E1}, -- {0x10030, 0x000624DB}, -- {0x10030, 0x000628A3}, -- {0x10030, 0x00062C69}, -- {0x10030, 0x00063063}, -- {0x10030, 0x00063429}, -- {0x10030, 0x00063823}, -- {0x10030, 0x00063C1D}, -- {0x10030, 0x00064013}, -- {0x10030, 0x0006440D}, -+ {0x10030, 0x00061527}, -+ {0x10030, 0x00061921}, -+ {0x10030, 0x00061CE9}, -+ {0x10030, 0x000620E3}, -+ {0x10030, 0x000624DD}, -+ {0x10030, 0x000628A5}, -+ {0x10030, 0x00062C6B}, -+ {0x10030, 0x00063065}, -+ {0x10030, 0x0006342B}, -+ {0x10030, 0x00063825}, -+ {0x10030, 0x00063C1F}, -+ {0x10030, 0x00064019}, -+ {0x10030, 0x00064413}, - {0x10030, 0x000681EF}, - {0x10030, 0x000685E7}, - {0x10030, 0x000689A7}, - {0x10030, 0x00068D61}, - {0x10030, 0x0006915B}, -- {0x10030, 0x00069523}, -- {0x10030, 0x0006991D}, -- {0x10030, 0x00069CE5}, -- {0x10030, 0x0006A0DF}, -- {0x10030, 0x0006A4A7}, -- {0x10030, 0x0006A8A1}, -- {0x10030, 0x0006AC67}, -- {0x10030, 0x0006B061}, -+ {0x10030, 0x00069525}, -+ {0x10030, 0x0006991F}, -+ {0x10030, 0x00069CE7}, -+ {0x10030, 0x0006A0E1}, -+ {0x10030, 0x0006A4A9}, -+ {0x10030, 0x0006A8A3}, -+ {0x10030, 0x0006AC69}, -+ {0x10030, 0x0006B063}, - {0x10030, 0x0006B429}, - {0x10030, 0x0006B823}, - {0x10030, 0x0006BC1D}, - {0x10030, 0x0006C017}, -- {0x10030, 0x0006C40D}, -+ {0x10030, 0x0006C411}, - {0x10030, 0x000701EF}, -- {0x10030, 0x000705E7}, -- {0x10030, 0x000709A7}, -- {0x10030, 0x00070D61}, -- {0x10030, 0x0007115B}, -- {0x10030, 0x00071523}, -- {0x10030, 0x0007191D}, -- {0x10030, 0x00071CE5}, -- {0x10030, 0x000720DF}, -- {0x10030, 0x000724D9}, -- {0x10030, 0x000728A1}, -- {0x10030, 0x00072C67}, -- {0x10030, 0x00073061}, -- {0x10030, 0x00073427}, -- {0x10030, 0x00073821}, -- {0x10030, 0x00073C1B}, -- {0x10030, 0x00074015}, -- {0x10030, 0x0007440D}, -+ {0x10030, 0x000705E9}, -+ {0x10030, 0x000709A9}, -+ {0x10030, 0x00070D63}, -+ {0x10030, 0x0007115D}, -+ {0x10030, 0x00071525}, -+ {0x10030, 0x0007191F}, -+ {0x10030, 0x00071D19}, -+ {0x10030, 0x000720E1}, -+ {0x10030, 0x000724DB}, -+ {0x10030, 0x000728A3}, -+ {0x10030, 0x00072C69}, -+ {0x10030, 0x00073063}, -+ {0x10030, 0x00073429}, -+ {0x10030, 0x00073823}, -+ {0x10030, 0x00073C1D}, -+ {0x10030, 0x00074017}, -+ {0x10030, 0x00074411}, - {0x10030, 0x000781EF}, - {0x10030, 0x000785E9}, - {0x10030, 0x000789E3}, - {0x10030, 0x00078DA1}, - {0x10030, 0x0007915F}, - {0x10030, 0x00079559}, -- {0x10030, 0x00079921}, -- {0x10030, 0x00079D1B}, -- {0x10030, 0x0007A0E3}, -- {0x10030, 0x0007A4DD}, -- {0x10030, 0x0007A8D7}, -- {0x10030, 0x0007AC9D}, -- {0x10030, 0x0007B063}, -- {0x10030, 0x0007B45D}, -- {0x10030, 0x0007B823}, -- {0x10030, 0x0007BC1D}, -- {0x10030, 0x0007C017}, -- {0x10030, 0x0007C40F}, -+ {0x10030, 0x0007991F}, -+ {0x10030, 0x00079D19}, -+ {0x10030, 0x0007A0DF}, -+ {0x10030, 0x0007A4D9}, -+ {0x10030, 0x0007A8D3}, -+ {0x10030, 0x0007AC99}, -+ {0x10030, 0x0007B05F}, -+ {0x10030, 0x0007B459}, -+ {0x10030, 0x0007B81F}, -+ {0x10030, 0x0007BC19}, -+ {0x10030, 0x0007C013}, -+ {0x10030, 0x0007C40D}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x000001EF}, - {0x10030, 0x000005E9}, -@@ -10384,73 +11514,73 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x000609A9}, - {0x10030, 0x00060D65}, - {0x10030, 0x0006115F}, -- {0x10030, 0x00061525}, -- {0x10030, 0x0006191F}, -- {0x10030, 0x00061CE7}, -- {0x10030, 0x000620E1}, -- {0x10030, 0x000624DB}, -- {0x10030, 0x000628A3}, -- {0x10030, 0x00062C69}, -- {0x10030, 0x00063063}, -- {0x10030, 0x00063429}, -- {0x10030, 0x00063823}, -- {0x10030, 0x00063C1D}, -- {0x10030, 0x00064013}, -- {0x10030, 0x0006440D}, -+ {0x10030, 0x00061527}, -+ {0x10030, 0x00061921}, -+ {0x10030, 0x00061CE9}, -+ {0x10030, 0x000620E3}, -+ {0x10030, 0x000624DD}, -+ {0x10030, 0x000628A5}, -+ {0x10030, 0x00062C6B}, -+ {0x10030, 0x00063065}, -+ {0x10030, 0x0006342B}, -+ {0x10030, 0x00063825}, -+ {0x10030, 0x00063C1F}, -+ {0x10030, 0x00064019}, -+ {0x10030, 0x00064413}, - {0x10030, 0x000681EF}, - {0x10030, 0x000685E7}, - {0x10030, 0x000689A7}, - {0x10030, 0x00068D61}, - {0x10030, 0x0006915B}, -- {0x10030, 0x00069523}, -- {0x10030, 0x0006991D}, -- {0x10030, 0x00069CE5}, -- {0x10030, 0x0006A0DF}, -- {0x10030, 0x0006A4A7}, -- {0x10030, 0x0006A8A1}, -- {0x10030, 0x0006AC67}, -- {0x10030, 0x0006B061}, -+ {0x10030, 0x00069525}, -+ {0x10030, 0x0006991F}, -+ {0x10030, 0x00069CE7}, -+ {0x10030, 0x0006A0E1}, -+ {0x10030, 0x0006A4A9}, -+ {0x10030, 0x0006A8A3}, -+ {0x10030, 0x0006AC69}, -+ {0x10030, 0x0006B063}, - {0x10030, 0x0006B429}, - {0x10030, 0x0006B823}, - {0x10030, 0x0006BC1D}, - {0x10030, 0x0006C017}, -- {0x10030, 0x0006C40D}, -+ {0x10030, 0x0006C411}, - {0x10030, 0x000701EF}, -- {0x10030, 0x000705E7}, -- {0x10030, 0x000709A7}, -- {0x10030, 0x00070D61}, -- {0x10030, 0x0007115B}, -- {0x10030, 0x00071523}, -- {0x10030, 0x0007191D}, -- {0x10030, 0x00071CE5}, -- {0x10030, 0x000720DF}, -- {0x10030, 0x000724D9}, -- {0x10030, 0x000728A1}, -- {0x10030, 0x00072C67}, -- {0x10030, 0x00073061}, -- {0x10030, 0x00073427}, -- {0x10030, 0x00073821}, -- {0x10030, 0x00073C1B}, -- {0x10030, 0x00074015}, -- {0x10030, 0x0007440D}, -+ {0x10030, 0x000705E9}, -+ {0x10030, 0x000709A9}, -+ {0x10030, 0x00070D63}, -+ {0x10030, 0x0007115D}, -+ {0x10030, 0x00071525}, -+ {0x10030, 0x0007191F}, -+ {0x10030, 0x00071D19}, -+ {0x10030, 0x000720E1}, -+ {0x10030, 0x000724DB}, -+ {0x10030, 0x000728A3}, -+ {0x10030, 0x00072C69}, -+ {0x10030, 0x00073063}, -+ {0x10030, 0x00073429}, -+ {0x10030, 0x00073823}, -+ {0x10030, 0x00073C1D}, -+ {0x10030, 0x00074017}, -+ {0x10030, 0x00074411}, - {0x10030, 0x000781EF}, - {0x10030, 0x000785E9}, - {0x10030, 0x000789E3}, - {0x10030, 0x00078DA1}, - {0x10030, 0x0007915F}, - {0x10030, 0x00079559}, -- {0x10030, 0x00079921}, -- {0x10030, 0x00079D1B}, -- {0x10030, 0x0007A0E3}, -- {0x10030, 0x0007A4DD}, -- {0x10030, 0x0007A8D7}, -- {0x10030, 0x0007AC9D}, -- {0x10030, 0x0007B063}, -- {0x10030, 0x0007B45D}, -- {0x10030, 0x0007B823}, -- {0x10030, 0x0007BC1D}, -- {0x10030, 0x0007C017}, -- {0x10030, 0x0007C40F}, -+ {0x10030, 0x0007991F}, -+ {0x10030, 0x00079D19}, -+ {0x10030, 0x0007A0DF}, -+ {0x10030, 0x0007A4D9}, -+ {0x10030, 0x0007A8D3}, -+ {0x10030, 0x0007AC99}, -+ {0x10030, 0x0007B05F}, -+ {0x10030, 0x0007B459}, -+ {0x10030, 0x0007B81F}, -+ {0x10030, 0x0007BC19}, -+ {0x10030, 0x0007C013}, -+ {0x10030, 0x0007C40D}, - {0xA0000000, 0x00000000}, - {0x10030, 0x000001EF}, - {0x10030, 0x000005E9}, -@@ -11294,6 +12424,110 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x000338CC}, - {0x10030, 0x00033C09}, - {0x10030, 0x00034006}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x000200E8}, -+ {0x10030, 0x000204E5}, -+ {0x10030, 0x000208E2}, -+ {0x10030, 0x00020CDF}, -+ {0x10030, 0x000210DC}, -+ {0x10030, 0x000214D9}, -+ {0x10030, 0x000218D6}, -+ {0x10030, 0x00021CD3}, -+ {0x10030, 0x000220D0}, -+ {0x10030, 0x0002240D}, -+ {0x10030, 0x0002280A}, -+ {0x10030, 0x00022C07}, -+ {0x10030, 0x00023004}, -+ {0x10030, 0x00023401}, -+ {0x10030, 0x00023800}, -+ {0x10030, 0x00023C00}, -+ {0x10030, 0x00024000}, -+ {0x10030, 0x000280ED}, -+ {0x10030, 0x000284EA}, -+ {0x10030, 0x000288E7}, -+ {0x10030, 0x00028CE4}, -+ {0x10030, 0x000290E1}, -+ {0x10030, 0x000294DE}, -+ {0x10030, 0x000298DB}, -+ {0x10030, 0x00029CD8}, -+ {0x10030, 0x0002A0D5}, -+ {0x10030, 0x0002A4D2}, -+ {0x10030, 0x0002A8CF}, -+ {0x10030, 0x0002AC0C}, -+ {0x10030, 0x0002B009}, -+ {0x10030, 0x0002B406}, -+ {0x10030, 0x0002B803}, -+ {0x10030, 0x0002BC00}, -+ {0x10030, 0x0002C000}, -+ {0x10030, 0x000300EE}, -+ {0x10030, 0x000304EB}, -+ {0x10030, 0x000308E8}, -+ {0x10030, 0x00030CE5}, -+ {0x10030, 0x000310E2}, -+ {0x10030, 0x000314DF}, -+ {0x10030, 0x000318DC}, -+ {0x10030, 0x00031CD9}, -+ {0x10030, 0x000320D6}, -+ {0x10030, 0x000324D3}, -+ {0x10030, 0x000328D0}, -+ {0x10030, 0x00032CCD}, -+ {0x10030, 0x0003300A}, -+ {0x10030, 0x00033407}, -+ {0x10030, 0x00033804}, -+ {0x10030, 0x00033C01}, -+ {0x10030, 0x00034000}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x000200E8}, -+ {0x10030, 0x000204E5}, -+ {0x10030, 0x000208E2}, -+ {0x10030, 0x00020CDF}, -+ {0x10030, 0x000210DC}, -+ {0x10030, 0x000214D9}, -+ {0x10030, 0x000218D6}, -+ {0x10030, 0x00021CD3}, -+ {0x10030, 0x000220D0}, -+ {0x10030, 0x0002240D}, -+ {0x10030, 0x0002280A}, -+ {0x10030, 0x00022C07}, -+ {0x10030, 0x00023004}, -+ {0x10030, 0x00023401}, -+ {0x10030, 0x00023800}, -+ {0x10030, 0x00023C00}, -+ {0x10030, 0x00024000}, -+ {0x10030, 0x000280ED}, -+ {0x10030, 0x000284EA}, -+ {0x10030, 0x000288E7}, -+ {0x10030, 0x00028CE4}, -+ {0x10030, 0x000290E1}, -+ {0x10030, 0x000294DE}, -+ {0x10030, 0x000298DB}, -+ {0x10030, 0x00029CD8}, -+ {0x10030, 0x0002A0D5}, -+ {0x10030, 0x0002A4D2}, -+ {0x10030, 0x0002A8CF}, -+ {0x10030, 0x0002AC0C}, -+ {0x10030, 0x0002B009}, -+ {0x10030, 0x0002B406}, -+ {0x10030, 0x0002B803}, -+ {0x10030, 0x0002BC00}, -+ {0x10030, 0x0002C000}, -+ {0x10030, 0x000300EE}, -+ {0x10030, 0x000304EB}, -+ {0x10030, 0x000308E8}, -+ {0x10030, 0x00030CE5}, -+ {0x10030, 0x000310E2}, -+ {0x10030, 0x000314DF}, -+ {0x10030, 0x000318DC}, -+ {0x10030, 0x00031CD9}, -+ {0x10030, 0x000320D6}, -+ {0x10030, 0x000324D3}, -+ {0x10030, 0x000328D0}, -+ {0x10030, 0x00032CCD}, -+ {0x10030, 0x0003300A}, -+ {0x10030, 0x00033407}, -+ {0x10030, 0x00033804}, -+ {0x10030, 0x00033C01}, -+ {0x10030, 0x00034000}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x000200FA}, - {0x10030, 0x000204F7}, -@@ -11841,6 +13075,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -11885,6 +13123,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -11941,6 +13183,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -11985,6 +13231,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12041,6 +13291,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12085,6 +13339,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12141,6 +13399,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12185,6 +13447,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12241,6 +13507,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12285,6 +13555,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12305,7 +13579,53 @@ static const struct rtw89_reg2_def rtw89 - {0x033, 0x00000070}, - {0x03F, 0x00050002}, - {0x033, 0x00000071}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90320000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90330000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90340000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90350000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90360000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00060032}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0xB0000000, 0x00000000}, - {0x033, 0x00000072}, - {0x03F, 0x00050042}, - {0x033, 0x00000073}, -@@ -12341,6 +13661,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12385,6 +13709,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12405,7 +13733,53 @@ static const struct rtw89_reg2_def rtw89 - {0x033, 0x00000078}, - {0x03F, 0x00050002}, - {0x033, 0x00000079}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90320000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90330000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90340000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90350000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90360000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00060032}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0xA0000000, 0x00000000}, -+ {0x03F, 0x00060032}, -+ {0xB0000000, 0x00000000}, - {0x033, 0x0000007A}, - {0x03F, 0x00050042}, - {0x033, 0x0000007B}, -@@ -12441,6 +13815,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12485,6 +13863,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12541,6 +13923,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12585,6 +13971,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12641,6 +14031,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12685,6 +14079,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12741,6 +14139,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12785,6 +14187,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12841,6 +14247,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12885,6 +14295,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12941,6 +14355,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -12985,6 +14403,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13041,6 +14463,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13085,6 +14511,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13141,6 +14571,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13185,6 +14619,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13241,6 +14679,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13285,6 +14727,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13341,6 +14787,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13385,6 +14835,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13441,6 +14895,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13485,6 +14943,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13541,6 +15003,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13585,6 +15051,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13641,6 +15111,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13685,6 +15159,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13741,6 +15219,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13785,6 +15267,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13841,6 +15327,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13885,6 +15375,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13941,6 +15435,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -13985,6 +15483,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14041,6 +15543,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14085,6 +15591,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14141,6 +15651,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14185,6 +15699,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14241,6 +15759,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14285,6 +15807,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14341,6 +15867,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14385,6 +15915,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14441,6 +15975,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14485,6 +16023,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14541,6 +16083,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14585,6 +16131,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14669,6 +16219,10 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x00025003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x00025003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x00025003}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x00025003}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x00025003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14719,6 +16273,10 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x0002D003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x0002D003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x0002D003}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x0002D003}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x0002D003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14769,6 +16327,10 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x00035003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x00035003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x00035003}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x00035003}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x00035003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14819,6 +16381,10 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x0003D003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x0003D003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x0003D003}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x0003D003}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x0003D003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -14882,6 +16448,12 @@ static const struct rtw89_reg2_def rtw89 - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x00065003}, - {0x10030, 0x00066003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x00065003}, -+ {0x10030, 0x00066003}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x00065003}, -+ {0x10030, 0x00066003}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x00065003}, - {0x10030, 0x00066003}, -@@ -14952,6 +16524,12 @@ static const struct rtw89_reg2_def rtw89 - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x0006D003}, - {0x10030, 0x0006E003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x0006D003}, -+ {0x10030, 0x0006E003}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x0006D003}, -+ {0x10030, 0x0006E003}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x0006D003}, - {0x10030, 0x0006E003}, -@@ -15022,6 +16600,12 @@ static const struct rtw89_reg2_def rtw89 - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x00075003}, - {0x10030, 0x00076003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x00075003}, -+ {0x10030, 0x00076003}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x00075003}, -+ {0x10030, 0x00076003}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x00075003}, - {0x10030, 0x00076003}, -@@ -15092,6 +16676,12 @@ static const struct rtw89_reg2_def rtw89 - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x0007D003}, - {0x10030, 0x0007E003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x0007D003}, -+ {0x10030, 0x0007E003}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x0007D003}, -+ {0x10030, 0x0007E003}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x0007D003}, - {0x10030, 0x0007E003}, -@@ -15119,7 +16709,7 @@ static const struct rtw89_reg2_def rtw89 - {0xB0000000, 0x00000000}, - {0x10030, 0x0007F003}, - {0x100EE, 0x00000000}, -- {0x0FE, 0x00000048}, -+ {0x0FE, 0x00000063}, - }; - - static const struct rtw89_reg2_def rtw89_8852c_phy_radiob_regs[] = { -@@ -15136,13 +16726,15 @@ static const struct rtw89_reg2_def rtw89 - {0xF0040001, 0x0000000A}, - {0xF0050001, 0x0000000B}, - {0xF0070001, 0x0000000C}, -- {0xF0320001, 0x0000000D}, -- {0xF0330001, 0x0000000E}, -- {0xF0340001, 0x0000000F}, -- {0xF0350001, 0x00000010}, -- {0xF0360001, 0x00000011}, -- {0xF03F0001, 0x00000012}, -- {0xF0400001, 0x00000013}, -+ {0xF0150001, 0x0000000D}, -+ {0xF0160001, 0x0000000E}, -+ {0xF0320001, 0x0000000F}, -+ {0xF0330001, 0x00000010}, -+ {0xF0340001, 0x00000011}, -+ {0xF0350001, 0x00000012}, -+ {0xF0360001, 0x00000013}, -+ {0xF03F0001, 0x00000014}, -+ {0xF0400001, 0x00000015}, - {0x005, 0x00000000}, - {0x10005, 0x00000000}, - {0x0B9, 0x00020440}, -@@ -15150,6 +16742,12 @@ static const struct rtw89_reg2_def rtw89 - {0x10000, 0x00030000}, - {0x018, 0x00011124}, - {0x10018, 0x00011124}, -+ {0x0A3, 0x000B9204}, -+ {0x0AD, 0x00091E0F}, -+ {0x05D, 0x00001012}, -+ {0x05C, 0x00079C5C}, -+ {0x062, 0x00055220}, -+ {0x0D3, 0x00000103}, - {0x05F, 0x00000038}, - {0x097, 0x00043200}, - {0x0A6, 0x00066DB7}, -@@ -15253,6 +16851,12 @@ static const struct rtw89_reg2_def rtw89 - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x067, 0x0000D300}, - {0x0DA, 0x000D4000}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x067, 0x0000D300}, -+ {0x0DA, 0x000D4000}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x067, 0x0000D300}, -+ {0x0DA, 0x000D4000}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x067, 0x0000D300}, - {0x0DA, 0x000D4000}, -@@ -15319,6 +16923,10 @@ static const struct rtw89_reg2_def rtw89 - {0x08F, 0x000D1352}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x08F, 0x000D1352}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x08F, 0x000D1352}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x08F, 0x000D1352}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x08F, 0x000D1352}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -15382,6 +16990,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000007}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000007}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000017}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000017}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000007}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -15918,6 +17530,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000EFFF}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000EFFF}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000EFFF}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000EFFF}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000EFFF}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -16256,6 +17872,32 @@ static const struct rtw89_reg2_def rtw89 - {0x030, 0x00050112}, - {0x030, 0x00058101}, - {0x030, 0x00060001}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x000085ED}, -+ {0x030, 0x000105CC}, -+ {0x030, 0x000184AA}, -+ {0x030, 0x00020388}, -+ {0x030, 0x00028377}, -+ {0x030, 0x00030377}, -+ {0x030, 0x00038255}, -+ {0x030, 0x00040244}, -+ {0x030, 0x00048133}, -+ {0x030, 0x00050112}, -+ {0x030, 0x00058101}, -+ {0x030, 0x00060001}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x000085ED}, -+ {0x030, 0x000105CC}, -+ {0x030, 0x000184AA}, -+ {0x030, 0x00020388}, -+ {0x030, 0x00028377}, -+ {0x030, 0x00030377}, -+ {0x030, 0x00038255}, -+ {0x030, 0x00040244}, -+ {0x030, 0x00048133}, -+ {0x030, 0x00050112}, -+ {0x030, 0x00058101}, -+ {0x030, 0x00060001}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x030, 0x000085ED}, - {0x030, 0x000105CC}, -@@ -16582,11 +18224,264 @@ static const struct rtw89_reg2_def rtw89 - {0x0EF, 0x00000000}, - {0x06E, 0x00077A18}, - {0x06D, 0x00000C31}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, - {0x06A, 0x000E0F8A}, - {0x06B, 0x000018A0}, - {0x06F, 0x000F81FC}, -+ {0x90320000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90330000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90340000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90350000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90360000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0380}, -+ {0x06B, 0x00003CA0}, -+ {0x06F, 0x000C01FC}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0380}, -+ {0x06B, 0x00003CA0}, -+ {0x06F, 0x000C01FC}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0xA0000000, 0x00000000}, -+ {0x06A, 0x000E0F8A}, -+ {0x06B, 0x000018A0}, -+ {0x06F, 0x000F81FC}, -+ {0xB0000000, 0x00000000}, - {0x05E, 0x0000001F}, - {0x0EF, 0x00000200}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90320000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90330000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90340000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90350000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90360000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x030, 0x0003E207}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, - {0x030, 0x0003D407}, - {0x030, 0x00035A87}, - {0x030, 0x0002CF07}, -@@ -16595,14 +18490,207 @@ static const struct rtw89_reg2_def rtw89 - {0x030, 0x00014F07}, - {0x030, 0x0000CF07}, - {0x030, 0x00004F07}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0xA0000000, 0x00000000}, -+ {0x030, 0x0003D407}, -+ {0x030, 0x00035A87}, -+ {0x030, 0x0002CF07}, -+ {0x030, 0x00024F07}, -+ {0x030, 0x0001CF07}, -+ {0x030, 0x00014F07}, -+ {0x030, 0x0000CF07}, -+ {0x030, 0x00004F07}, -+ {0xB0000000, 0x00000000}, - {0x0EF, 0x00000000}, - {0x0EB, 0x00080000}, -+ {0x80010000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90020000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90320000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90330000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90340000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90350000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90360000, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90010001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90020001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90030001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90040001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90050001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0000803C}, -+ {0x030, 0x0001003C}, -+ {0x030, 0x0001803C}, -+ {0x030, 0x0002003C}, -+ {0x030, 0x0002803C}, -+ {0x030, 0x0003003C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x0000803C}, -+ {0x030, 0x0001003C}, -+ {0x030, 0x0001803C}, -+ {0x030, 0x0002003C}, -+ {0x030, 0x0002803C}, -+ {0x030, 0x0003003C}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x030, 0x00008038}, -+ {0x030, 0x00010038}, -+ {0x030, 0x00018038}, -+ {0x030, 0x00020038}, -+ {0x030, 0x00028038}, -+ {0x030, 0x00030038}, -+ {0xA0000000, 0x00000000}, - {0x030, 0x00008038}, - {0x030, 0x00010038}, - {0x030, 0x00018038}, - {0x030, 0x00020038}, - {0x030, 0x00028038}, - {0x030, 0x00030038}, -+ {0xB0000000, 0x00000000}, - {0x030, 0x0003803C}, - {0x030, 0x0004003C}, - {0x030, 0x0004803C}, -@@ -16639,6 +18727,10 @@ static const struct rtw89_reg2_def rtw89 - {0x095, 0x00000008}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x095, 0x00000008}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x095, 0x00000008}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x095, 0x00000008}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x095, 0x00000008}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -16684,6 +18776,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000152}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -16728,6 +18824,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000015A}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -16772,6 +18872,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000019C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -16816,6 +18920,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001A4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -16860,6 +18968,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -16904,6 +19016,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -16948,6 +19064,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -16992,6 +19112,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000003E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17036,6 +19160,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000152}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17080,6 +19208,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000015A}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17124,6 +19256,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000019C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17168,6 +19304,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001A4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17212,6 +19352,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17256,6 +19400,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17300,6 +19448,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17344,6 +19496,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000003E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17388,6 +19544,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000152}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17432,6 +19592,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000015A}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17476,6 +19640,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000019C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17520,6 +19688,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001A4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17564,6 +19736,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17608,6 +19784,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17652,6 +19832,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17696,6 +19880,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000003E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -17740,20 +19928,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000152}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0xA0000000, 0x00000000}, - {0x03F, 0x00000052}, - {0xB0000000, 0x00000000}, -@@ -17784,20 +19976,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000015A}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000005A}, - {0xB0000000, 0x00000000}, -@@ -17828,20 +20024,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000019C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000009C}, - {0xB0000000, 0x00000000}, -@@ -17872,20 +20072,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001A4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0xB0000000, 0x00000000}, -@@ -17916,20 +20120,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0xB0000000, 0x00000000}, -@@ -17960,20 +20168,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0xB0000000, 0x00000000}, -@@ -18004,20 +20216,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0xB0000000, 0x00000000}, -@@ -18048,20 +20264,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000003E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000003E6}, - {0xB0000000, 0x00000000}, -@@ -18092,20 +20312,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000152}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0xA0000000, 0x00000000}, - {0x03F, 0x00000052}, - {0xB0000000, 0x00000000}, -@@ -18136,20 +20360,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000015A}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000005A}, - {0xB0000000, 0x00000000}, -@@ -18180,20 +20408,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000019C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000009C}, - {0xB0000000, 0x00000000}, -@@ -18224,20 +20456,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001A4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0xB0000000, 0x00000000}, -@@ -18268,20 +20504,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0xB0000000, 0x00000000}, -@@ -18312,20 +20552,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0xB0000000, 0x00000000}, -@@ -18356,20 +20600,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0xB0000000, 0x00000000}, -@@ -18400,20 +20648,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000003E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000003E6}, - {0xB0000000, 0x00000000}, -@@ -18444,20 +20696,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000152}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0xA0000000, 0x00000000}, - {0x03F, 0x00000052}, - {0xB0000000, 0x00000000}, -@@ -18488,20 +20744,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000015A}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000005A}, - {0xB0000000, 0x00000000}, -@@ -18532,20 +20792,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000019C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000009C}, - {0xB0000000, 0x00000000}, -@@ -18576,20 +20840,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001A4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0xB0000000, 0x00000000}, -@@ -18620,20 +20888,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0xB0000000, 0x00000000}, -@@ -18664,20 +20936,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0xB0000000, 0x00000000}, -@@ -18708,20 +20984,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000002E6}, -+ {0x03F, 0x000002E7}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0xB0000000, 0x00000000}, -@@ -18752,20 +21032,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000003E7}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000003E7}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000003E7}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000003E6}, -+ {0x03F, 0x000003E7}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000003E6}, - {0xB0000000, 0x00000000}, -@@ -18796,20 +21080,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000152}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00000152}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000152}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x00000052}, -+ {0x03F, 0x00000152}, - {0xA0000000, 0x00000000}, - {0x03F, 0x00000052}, - {0xB0000000, 0x00000000}, -@@ -18840,20 +21128,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000015A}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000015A}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000015A}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000005A}, -+ {0x03F, 0x0000015A}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000005A}, - {0xB0000000, 0x00000000}, -@@ -18884,20 +21176,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000019C}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x0000019C}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000009C}, -+ {0x03F, 0x0000019C}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000009C}, - {0xB0000000, 0x00000000}, -@@ -18928,20 +21224,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001A4}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001A4}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x0000019C}, -+ {0x03F, 0x000001A4}, - {0xA0000000, 0x00000000}, - {0x03F, 0x0000019C}, - {0xB0000000, 0x00000000}, -@@ -18972,20 +21272,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000001E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000001E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001A4}, -+ {0x03F, 0x000001E6}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000001A4}, - {0xB0000000, 0x00000000}, -@@ -19016,20 +21320,24 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x000002E6}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x000002E6}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x000002E6}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, -- {0x03F, 0x000001E6}, -+ {0x03F, 0x000002E6}, - {0xA0000000, 0x00000000}, - {0x03F, 0x000001E6}, - {0xB0000000, 0x00000000}, -@@ -20924,7 +23232,7 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x0007BC1D}, - {0x10030, 0x0007C017}, - {0x10030, 0x0007C40F}, -- {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x000001EF}, - {0x10030, 0x000005E9}, - {0x10030, 0x000009E3}, -@@ -21069,7 +23377,7 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x0007BC1D}, - {0x10030, 0x0007C017}, - {0x10030, 0x0007C40F}, -- {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x000001EF}, - {0x10030, 0x000005E9}, - {0x10030, 0x000009E3}, -@@ -21088,60 +23396,60 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x00003C5F}, - {0x10030, 0x00004059}, - {0x10030, 0x00004453}, -- {0x10030, 0x000201A7}, -- {0x10030, 0x000205A1}, -- {0x10030, 0x0002099B}, -- {0x10030, 0x00020D95}, -- {0x10030, 0x0002115B}, -- {0x10030, 0x00021555}, -- {0x10030, 0x00021921}, -- {0x10030, 0x00021D1B}, -- {0x10030, 0x000220E3}, -- {0x10030, 0x000224DD}, -+ {0x10030, 0x000201EF}, -+ {0x10030, 0x000205E9}, -+ {0x10030, 0x000209E3}, -+ {0x10030, 0x00020DA3}, -+ {0x10030, 0x00021161}, -+ {0x10030, 0x0002155B}, -+ {0x10030, 0x0002191F}, -+ {0x10030, 0x00021D19}, -+ {0x10030, 0x000220E1}, -+ {0x10030, 0x000224DB}, - {0x10030, 0x000228A3}, - {0x10030, 0x00022C9D}, - {0x10030, 0x00023063}, - {0x10030, 0x0002345D}, - {0x10030, 0x00023823}, -- {0x10030, 0x00023C1D}, -- {0x10030, 0x00024017}, -- {0x10030, 0x00024411}, -- {0x10030, 0x000281A9}, -- {0x10030, 0x000285A3}, -- {0x10030, 0x0002899D}, -- {0x10030, 0x00028D97}, -- {0x10030, 0x0002915D}, -- {0x10030, 0x00029557}, -- {0x10030, 0x0002991F}, -- {0x10030, 0x00029D19}, -- {0x10030, 0x0002A0E1}, -- {0x10030, 0x0002A4DB}, -+ {0x10030, 0x00023C1B}, -+ {0x10030, 0x00024015}, -+ {0x10030, 0x0002440F}, -+ {0x10030, 0x000281EF}, -+ {0x10030, 0x000285E7}, -+ {0x10030, 0x000289A7}, -+ {0x10030, 0x00028D65}, -+ {0x10030, 0x0002915F}, -+ {0x10030, 0x00029523}, -+ {0x10030, 0x0002991D}, -+ {0x10030, 0x00029CE5}, -+ {0x10030, 0x0002A0DF}, -+ {0x10030, 0x0002A4A7}, - {0x10030, 0x0002A8A1}, -- {0x10030, 0x0002AC9B}, -+ {0x10030, 0x0002AC67}, - {0x10030, 0x0002B061}, -- {0x10030, 0x0002B45B}, -+ {0x10030, 0x0002B427}, - {0x10030, 0x0002B821}, -- {0x10030, 0x0002BC1B}, -- {0x10030, 0x0002C015}, -- {0x10030, 0x0002C40F}, -- {0x10030, 0x000301A9}, -- {0x10030, 0x000305A3}, -- {0x10030, 0x0003099D}, -- {0x10030, 0x00030D97}, -- {0x10030, 0x0003115D}, -- {0x10030, 0x00031557}, -+ {0x10030, 0x0002BC19}, -+ {0x10030, 0x0002C013}, -+ {0x10030, 0x0002C40D}, -+ {0x10030, 0x000301EF}, -+ {0x10030, 0x000305E7}, -+ {0x10030, 0x000309A7}, -+ {0x10030, 0x00030D65}, -+ {0x10030, 0x0003115F}, -+ {0x10030, 0x00031525}, - {0x10030, 0x0003191F}, -- {0x10030, 0x00031D19}, -+ {0x10030, 0x00031CE7}, - {0x10030, 0x000320E1}, -- {0x10030, 0x000324DB}, -- {0x10030, 0x000328A1}, -- {0x10030, 0x00032C9B}, -- {0x10030, 0x00033061}, -- {0x10030, 0x0003345B}, -- {0x10030, 0x00033821}, -- {0x10030, 0x00033C1B}, -- {0x10030, 0x00034015}, -- {0x10030, 0x0003440F}, -+ {0x10030, 0x000324A9}, -+ {0x10030, 0x000328A3}, -+ {0x10030, 0x00032C69}, -+ {0x10030, 0x00033063}, -+ {0x10030, 0x00033429}, -+ {0x10030, 0x00033823}, -+ {0x10030, 0x00033C1D}, -+ {0x10030, 0x00034013}, -+ {0x10030, 0x0003440D}, - {0x10030, 0x000601F1}, - {0x10030, 0x000605E9}, - {0x10030, 0x000609A9}, -@@ -21186,7 +23494,7 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x00071523}, - {0x10030, 0x0007191D}, - {0x10030, 0x00071D17}, -- {0x10030, 0x000720DF}, -+ {0x10030, 0x00072111}, - {0x10030, 0x000724D9}, - {0x10030, 0x000728D3}, - {0x10030, 0x00072C67}, -@@ -21214,7 +23522,7 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x0007BC1D}, - {0x10030, 0x0007C017}, - {0x10030, 0x0007C40F}, -- {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x000001EF}, - {0x10030, 0x000005E9}, - {0x10030, 0x000009E3}, -@@ -21233,60 +23541,60 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x00003C5F}, - {0x10030, 0x00004059}, - {0x10030, 0x00004453}, -- {0x10030, 0x000201A7}, -- {0x10030, 0x000205A1}, -- {0x10030, 0x0002099B}, -- {0x10030, 0x00020D95}, -- {0x10030, 0x0002115B}, -- {0x10030, 0x00021555}, -- {0x10030, 0x00021921}, -- {0x10030, 0x00021D1B}, -- {0x10030, 0x000220E3}, -- {0x10030, 0x000224DD}, -+ {0x10030, 0x000201EF}, -+ {0x10030, 0x000205E9}, -+ {0x10030, 0x000209E3}, -+ {0x10030, 0x00020DA3}, -+ {0x10030, 0x00021161}, -+ {0x10030, 0x0002155B}, -+ {0x10030, 0x0002191F}, -+ {0x10030, 0x00021D19}, -+ {0x10030, 0x000220E1}, -+ {0x10030, 0x000224DB}, - {0x10030, 0x000228A3}, - {0x10030, 0x00022C9D}, - {0x10030, 0x00023063}, - {0x10030, 0x0002345D}, - {0x10030, 0x00023823}, -- {0x10030, 0x00023C1D}, -- {0x10030, 0x00024017}, -- {0x10030, 0x00024411}, -- {0x10030, 0x000281A9}, -- {0x10030, 0x000285A3}, -- {0x10030, 0x0002899D}, -- {0x10030, 0x00028D97}, -- {0x10030, 0x0002915D}, -- {0x10030, 0x00029557}, -- {0x10030, 0x0002991F}, -- {0x10030, 0x00029D19}, -- {0x10030, 0x0002A0E1}, -- {0x10030, 0x0002A4DB}, -+ {0x10030, 0x00023C1B}, -+ {0x10030, 0x00024015}, -+ {0x10030, 0x0002440F}, -+ {0x10030, 0x000281EF}, -+ {0x10030, 0x000285E7}, -+ {0x10030, 0x000289A7}, -+ {0x10030, 0x00028D65}, -+ {0x10030, 0x0002915F}, -+ {0x10030, 0x00029523}, -+ {0x10030, 0x0002991D}, -+ {0x10030, 0x00029CE5}, -+ {0x10030, 0x0002A0DF}, -+ {0x10030, 0x0002A4A7}, - {0x10030, 0x0002A8A1}, -- {0x10030, 0x0002AC9B}, -+ {0x10030, 0x0002AC67}, - {0x10030, 0x0002B061}, -- {0x10030, 0x0002B45B}, -+ {0x10030, 0x0002B427}, - {0x10030, 0x0002B821}, -- {0x10030, 0x0002BC1B}, -- {0x10030, 0x0002C015}, -- {0x10030, 0x0002C40F}, -- {0x10030, 0x000301A9}, -- {0x10030, 0x000305A3}, -- {0x10030, 0x0003099D}, -- {0x10030, 0x00030D97}, -- {0x10030, 0x0003115D}, -- {0x10030, 0x00031557}, -+ {0x10030, 0x0002BC19}, -+ {0x10030, 0x0002C013}, -+ {0x10030, 0x0002C40D}, -+ {0x10030, 0x000301EF}, -+ {0x10030, 0x000305E7}, -+ {0x10030, 0x000309A7}, -+ {0x10030, 0x00030D65}, -+ {0x10030, 0x0003115F}, -+ {0x10030, 0x00031525}, - {0x10030, 0x0003191F}, -- {0x10030, 0x00031D19}, -+ {0x10030, 0x00031CE7}, - {0x10030, 0x000320E1}, -- {0x10030, 0x000324DB}, -- {0x10030, 0x000328A1}, -- {0x10030, 0x00032C9B}, -- {0x10030, 0x00033061}, -- {0x10030, 0x0003345B}, -- {0x10030, 0x00033821}, -- {0x10030, 0x00033C1B}, -- {0x10030, 0x00034015}, -- {0x10030, 0x0003440F}, -+ {0x10030, 0x000324A9}, -+ {0x10030, 0x000328A3}, -+ {0x10030, 0x00032C69}, -+ {0x10030, 0x00033063}, -+ {0x10030, 0x00033429}, -+ {0x10030, 0x00033823}, -+ {0x10030, 0x00033C1D}, -+ {0x10030, 0x00034013}, -+ {0x10030, 0x0003440D}, - {0x10030, 0x000601F1}, - {0x10030, 0x000605E9}, - {0x10030, 0x000609A9}, -@@ -21331,7 +23639,7 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x00071523}, - {0x10030, 0x0007191D}, - {0x10030, 0x00071D17}, -- {0x10030, 0x000720DF}, -+ {0x10030, 0x00072111}, - {0x10030, 0x000724D9}, - {0x10030, 0x000728D3}, - {0x10030, 0x00072C67}, -@@ -21359,6 +23667,296 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x0007BC1D}, - {0x10030, 0x0007C017}, - {0x10030, 0x0007C40F}, -+ {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x000001EF}, -+ {0x10030, 0x000005E9}, -+ {0x10030, 0x000009E3}, -+ {0x10030, 0x00000DDD}, -+ {0x10030, 0x000011D7}, -+ {0x10030, 0x0000159F}, -+ {0x10030, 0x00001999}, -+ {0x10030, 0x00001D5F}, -+ {0x10030, 0x00002159}, -+ {0x10030, 0x0000251F}, -+ {0x10030, 0x00002919}, -+ {0x10030, 0x00002CDF}, -+ {0x10030, 0x000030D9}, -+ {0x10030, 0x0000349F}, -+ {0x10030, 0x00003899}, -+ {0x10030, 0x00003C5F}, -+ {0x10030, 0x00004059}, -+ {0x10030, 0x00004453}, -+ {0x10030, 0x000201A7}, -+ {0x10030, 0x000205A1}, -+ {0x10030, 0x0002099B}, -+ {0x10030, 0x00020D95}, -+ {0x10030, 0x0002115B}, -+ {0x10030, 0x00021555}, -+ {0x10030, 0x00021921}, -+ {0x10030, 0x00021D1B}, -+ {0x10030, 0x000220E3}, -+ {0x10030, 0x000224DD}, -+ {0x10030, 0x000228A3}, -+ {0x10030, 0x00022C9D}, -+ {0x10030, 0x00023063}, -+ {0x10030, 0x0002345D}, -+ {0x10030, 0x00023823}, -+ {0x10030, 0x00023C1D}, -+ {0x10030, 0x00024017}, -+ {0x10030, 0x00024411}, -+ {0x10030, 0x000281A9}, -+ {0x10030, 0x000285A3}, -+ {0x10030, 0x0002899D}, -+ {0x10030, 0x00028D97}, -+ {0x10030, 0x0002915D}, -+ {0x10030, 0x00029557}, -+ {0x10030, 0x0002991F}, -+ {0x10030, 0x00029D19}, -+ {0x10030, 0x0002A0E1}, -+ {0x10030, 0x0002A4DB}, -+ {0x10030, 0x0002A8A1}, -+ {0x10030, 0x0002AC9B}, -+ {0x10030, 0x0002B061}, -+ {0x10030, 0x0002B45B}, -+ {0x10030, 0x0002B821}, -+ {0x10030, 0x0002BC1B}, -+ {0x10030, 0x0002C015}, -+ {0x10030, 0x0002C40F}, -+ {0x10030, 0x000301A9}, -+ {0x10030, 0x000305A3}, -+ {0x10030, 0x0003099D}, -+ {0x10030, 0x00030D97}, -+ {0x10030, 0x0003115D}, -+ {0x10030, 0x00031557}, -+ {0x10030, 0x0003191F}, -+ {0x10030, 0x00031D19}, -+ {0x10030, 0x000320E1}, -+ {0x10030, 0x000324DB}, -+ {0x10030, 0x000328A1}, -+ {0x10030, 0x00032C9B}, -+ {0x10030, 0x00033061}, -+ {0x10030, 0x0003345B}, -+ {0x10030, 0x00033821}, -+ {0x10030, 0x00033C1B}, -+ {0x10030, 0x00034015}, -+ {0x10030, 0x0003440F}, -+ {0x10030, 0x000601F1}, -+ {0x10030, 0x000605E9}, -+ {0x10030, 0x000609A9}, -+ {0x10030, 0x00060D65}, -+ {0x10030, 0x0006115F}, -+ {0x10030, 0x00061527}, -+ {0x10030, 0x00061921}, -+ {0x10030, 0x00061CE9}, -+ {0x10030, 0x000620E3}, -+ {0x10030, 0x000624DD}, -+ {0x10030, 0x000628A5}, -+ {0x10030, 0x00062C6B}, -+ {0x10030, 0x00063065}, -+ {0x10030, 0x0006342B}, -+ {0x10030, 0x00063825}, -+ {0x10030, 0x00063C1F}, -+ {0x10030, 0x00064019}, -+ {0x10030, 0x00064413}, -+ {0x10030, 0x000681EF}, -+ {0x10030, 0x000685E7}, -+ {0x10030, 0x000689A7}, -+ {0x10030, 0x00068D61}, -+ {0x10030, 0x0006915B}, -+ {0x10030, 0x00069525}, -+ {0x10030, 0x0006991F}, -+ {0x10030, 0x00069CE7}, -+ {0x10030, 0x0006A0E1}, -+ {0x10030, 0x0006A4A9}, -+ {0x10030, 0x0006A8A3}, -+ {0x10030, 0x0006AC69}, -+ {0x10030, 0x0006B063}, -+ {0x10030, 0x0006B429}, -+ {0x10030, 0x0006B823}, -+ {0x10030, 0x0006BC1D}, -+ {0x10030, 0x0006C017}, -+ {0x10030, 0x0006C411}, -+ {0x10030, 0x000701EF}, -+ {0x10030, 0x000705E9}, -+ {0x10030, 0x000709A9}, -+ {0x10030, 0x00070D63}, -+ {0x10030, 0x0007115D}, -+ {0x10030, 0x00071525}, -+ {0x10030, 0x0007191F}, -+ {0x10030, 0x00071D19}, -+ {0x10030, 0x000720E1}, -+ {0x10030, 0x000724DB}, -+ {0x10030, 0x000728A3}, -+ {0x10030, 0x00072C69}, -+ {0x10030, 0x00073063}, -+ {0x10030, 0x00073429}, -+ {0x10030, 0x00073823}, -+ {0x10030, 0x00073C1D}, -+ {0x10030, 0x00074017}, -+ {0x10030, 0x00074411}, -+ {0x10030, 0x000781EF}, -+ {0x10030, 0x000785E9}, -+ {0x10030, 0x000789E3}, -+ {0x10030, 0x00078DA1}, -+ {0x10030, 0x0007915F}, -+ {0x10030, 0x00079559}, -+ {0x10030, 0x0007991F}, -+ {0x10030, 0x00079D19}, -+ {0x10030, 0x0007A0DF}, -+ {0x10030, 0x0007A4D9}, -+ {0x10030, 0x0007A8D3}, -+ {0x10030, 0x0007AC99}, -+ {0x10030, 0x0007B05F}, -+ {0x10030, 0x0007B459}, -+ {0x10030, 0x0007B81F}, -+ {0x10030, 0x0007BC19}, -+ {0x10030, 0x0007C013}, -+ {0x10030, 0x0007C40D}, -+ {0x90340001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x000001EF}, -+ {0x10030, 0x000005E9}, -+ {0x10030, 0x000009E3}, -+ {0x10030, 0x00000DDD}, -+ {0x10030, 0x000011D7}, -+ {0x10030, 0x0000159F}, -+ {0x10030, 0x00001999}, -+ {0x10030, 0x00001D5F}, -+ {0x10030, 0x00002159}, -+ {0x10030, 0x0000251F}, -+ {0x10030, 0x00002919}, -+ {0x10030, 0x00002CDF}, -+ {0x10030, 0x000030D9}, -+ {0x10030, 0x0000349F}, -+ {0x10030, 0x00003899}, -+ {0x10030, 0x00003C5F}, -+ {0x10030, 0x00004059}, -+ {0x10030, 0x00004453}, -+ {0x10030, 0x000201A7}, -+ {0x10030, 0x000205A1}, -+ {0x10030, 0x0002099B}, -+ {0x10030, 0x00020D95}, -+ {0x10030, 0x0002115B}, -+ {0x10030, 0x00021555}, -+ {0x10030, 0x00021921}, -+ {0x10030, 0x00021D1B}, -+ {0x10030, 0x000220E3}, -+ {0x10030, 0x000224DD}, -+ {0x10030, 0x000228A3}, -+ {0x10030, 0x00022C9D}, -+ {0x10030, 0x00023063}, -+ {0x10030, 0x0002345D}, -+ {0x10030, 0x00023823}, -+ {0x10030, 0x00023C1D}, -+ {0x10030, 0x00024017}, -+ {0x10030, 0x00024411}, -+ {0x10030, 0x000281A9}, -+ {0x10030, 0x000285A3}, -+ {0x10030, 0x0002899D}, -+ {0x10030, 0x00028D97}, -+ {0x10030, 0x0002915D}, -+ {0x10030, 0x00029557}, -+ {0x10030, 0x0002991F}, -+ {0x10030, 0x00029D19}, -+ {0x10030, 0x0002A0E1}, -+ {0x10030, 0x0002A4DB}, -+ {0x10030, 0x0002A8A1}, -+ {0x10030, 0x0002AC9B}, -+ {0x10030, 0x0002B061}, -+ {0x10030, 0x0002B45B}, -+ {0x10030, 0x0002B821}, -+ {0x10030, 0x0002BC1B}, -+ {0x10030, 0x0002C015}, -+ {0x10030, 0x0002C40F}, -+ {0x10030, 0x000301A9}, -+ {0x10030, 0x000305A3}, -+ {0x10030, 0x0003099D}, -+ {0x10030, 0x00030D97}, -+ {0x10030, 0x0003115D}, -+ {0x10030, 0x00031557}, -+ {0x10030, 0x0003191F}, -+ {0x10030, 0x00031D19}, -+ {0x10030, 0x000320E1}, -+ {0x10030, 0x000324DB}, -+ {0x10030, 0x000328A1}, -+ {0x10030, 0x00032C9B}, -+ {0x10030, 0x00033061}, -+ {0x10030, 0x0003345B}, -+ {0x10030, 0x00033821}, -+ {0x10030, 0x00033C1B}, -+ {0x10030, 0x00034015}, -+ {0x10030, 0x0003440F}, -+ {0x10030, 0x000601F1}, -+ {0x10030, 0x000605E9}, -+ {0x10030, 0x000609A9}, -+ {0x10030, 0x00060D65}, -+ {0x10030, 0x0006115F}, -+ {0x10030, 0x00061527}, -+ {0x10030, 0x00061921}, -+ {0x10030, 0x00061CE9}, -+ {0x10030, 0x000620E3}, -+ {0x10030, 0x000624DD}, -+ {0x10030, 0x000628A5}, -+ {0x10030, 0x00062C6B}, -+ {0x10030, 0x00063065}, -+ {0x10030, 0x0006342B}, -+ {0x10030, 0x00063825}, -+ {0x10030, 0x00063C1F}, -+ {0x10030, 0x00064019}, -+ {0x10030, 0x00064413}, -+ {0x10030, 0x000681EF}, -+ {0x10030, 0x000685E7}, -+ {0x10030, 0x000689A7}, -+ {0x10030, 0x00068D61}, -+ {0x10030, 0x0006915B}, -+ {0x10030, 0x00069525}, -+ {0x10030, 0x0006991F}, -+ {0x10030, 0x00069CE7}, -+ {0x10030, 0x0006A0E1}, -+ {0x10030, 0x0006A4A9}, -+ {0x10030, 0x0006A8A3}, -+ {0x10030, 0x0006AC69}, -+ {0x10030, 0x0006B063}, -+ {0x10030, 0x0006B429}, -+ {0x10030, 0x0006B823}, -+ {0x10030, 0x0006BC1D}, -+ {0x10030, 0x0006C017}, -+ {0x10030, 0x0006C411}, -+ {0x10030, 0x000701EF}, -+ {0x10030, 0x000705E9}, -+ {0x10030, 0x000709A9}, -+ {0x10030, 0x00070D63}, -+ {0x10030, 0x0007115D}, -+ {0x10030, 0x00071525}, -+ {0x10030, 0x0007191F}, -+ {0x10030, 0x00071D19}, -+ {0x10030, 0x000720E1}, -+ {0x10030, 0x000724DB}, -+ {0x10030, 0x000728A3}, -+ {0x10030, 0x00072C69}, -+ {0x10030, 0x00073063}, -+ {0x10030, 0x00073429}, -+ {0x10030, 0x00073823}, -+ {0x10030, 0x00073C1D}, -+ {0x10030, 0x00074017}, -+ {0x10030, 0x00074411}, -+ {0x10030, 0x000781EF}, -+ {0x10030, 0x000785E9}, -+ {0x10030, 0x000789E3}, -+ {0x10030, 0x00078DA1}, -+ {0x10030, 0x0007915F}, -+ {0x10030, 0x00079559}, -+ {0x10030, 0x0007991F}, -+ {0x10030, 0x00079D19}, -+ {0x10030, 0x0007A0DF}, -+ {0x10030, 0x0007A4D9}, -+ {0x10030, 0x0007A8D3}, -+ {0x10030, 0x0007AC99}, -+ {0x10030, 0x0007B05F}, -+ {0x10030, 0x0007B459}, -+ {0x10030, 0x0007B81F}, -+ {0x10030, 0x0007BC19}, -+ {0x10030, 0x0007C013}, -+ {0x10030, 0x0007C40D}, - {0x90350001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x000001EF}, - {0x10030, 0x000005E9}, -@@ -21437,73 +24035,73 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x000609A9}, - {0x10030, 0x00060D65}, - {0x10030, 0x0006115F}, -- {0x10030, 0x00061525}, -- {0x10030, 0x0006191F}, -- {0x10030, 0x00061CE7}, -- {0x10030, 0x000620E1}, -- {0x10030, 0x000624DB}, -- {0x10030, 0x000628A3}, -- {0x10030, 0x00062C69}, -- {0x10030, 0x00063063}, -- {0x10030, 0x00063429}, -- {0x10030, 0x00063823}, -- {0x10030, 0x00063C1D}, -- {0x10030, 0x00064013}, -- {0x10030, 0x0006440D}, -+ {0x10030, 0x00061527}, -+ {0x10030, 0x00061921}, -+ {0x10030, 0x00061CE9}, -+ {0x10030, 0x000620E3}, -+ {0x10030, 0x000624DD}, -+ {0x10030, 0x000628A5}, -+ {0x10030, 0x00062C6B}, -+ {0x10030, 0x00063065}, -+ {0x10030, 0x0006342B}, -+ {0x10030, 0x00063825}, -+ {0x10030, 0x00063C1F}, -+ {0x10030, 0x00064019}, -+ {0x10030, 0x00064413}, - {0x10030, 0x000681EF}, - {0x10030, 0x000685E7}, - {0x10030, 0x000689A7}, - {0x10030, 0x00068D61}, - {0x10030, 0x0006915B}, -- {0x10030, 0x00069523}, -- {0x10030, 0x0006991D}, -- {0x10030, 0x00069CE5}, -- {0x10030, 0x0006A0DF}, -- {0x10030, 0x0006A4A7}, -- {0x10030, 0x0006A8A1}, -- {0x10030, 0x0006AC67}, -- {0x10030, 0x0006B061}, -+ {0x10030, 0x00069525}, -+ {0x10030, 0x0006991F}, -+ {0x10030, 0x00069CE7}, -+ {0x10030, 0x0006A0E1}, -+ {0x10030, 0x0006A4A9}, -+ {0x10030, 0x0006A8A3}, -+ {0x10030, 0x0006AC69}, -+ {0x10030, 0x0006B063}, - {0x10030, 0x0006B429}, - {0x10030, 0x0006B823}, - {0x10030, 0x0006BC1D}, - {0x10030, 0x0006C017}, -- {0x10030, 0x0006C40D}, -- {0x10030, 0x000701F1}, -+ {0x10030, 0x0006C411}, -+ {0x10030, 0x000701EF}, - {0x10030, 0x000705E9}, - {0x10030, 0x000709A9}, - {0x10030, 0x00070D63}, - {0x10030, 0x0007115D}, -- {0x10030, 0x00071523}, -- {0x10030, 0x0007191D}, -- {0x10030, 0x00071D17}, -- {0x10030, 0x000720DF}, -- {0x10030, 0x000724D9}, -- {0x10030, 0x000728D3}, -- {0x10030, 0x00072C67}, -- {0x10030, 0x00073061}, -- {0x10030, 0x00073427}, -- {0x10030, 0x00073821}, -- {0x10030, 0x00073C1B}, -- {0x10030, 0x00074015}, -- {0x10030, 0x0007440D}, -- {0x10030, 0x000781F1}, -- {0x10030, 0x000785EB}, -- {0x10030, 0x000789E5}, -- {0x10030, 0x00078DA3}, -- {0x10030, 0x00079161}, -- {0x10030, 0x0007955B}, -- {0x10030, 0x00079923}, -- {0x10030, 0x00079D1D}, -- {0x10030, 0x0007A117}, -- {0x10030, 0x0007A4DD}, -- {0x10030, 0x0007A8D7}, -- {0x10030, 0x0007AC9D}, -- {0x10030, 0x0007B063}, -- {0x10030, 0x0007B45D}, -- {0x10030, 0x0007B857}, -- {0x10030, 0x0007BC1D}, -- {0x10030, 0x0007C017}, -- {0x10030, 0x0007C40F}, -+ {0x10030, 0x00071525}, -+ {0x10030, 0x0007191F}, -+ {0x10030, 0x00071D19}, -+ {0x10030, 0x000720E1}, -+ {0x10030, 0x000724DB}, -+ {0x10030, 0x000728A3}, -+ {0x10030, 0x00072C69}, -+ {0x10030, 0x00073063}, -+ {0x10030, 0x00073429}, -+ {0x10030, 0x00073823}, -+ {0x10030, 0x00073C1D}, -+ {0x10030, 0x00074017}, -+ {0x10030, 0x00074411}, -+ {0x10030, 0x000781EF}, -+ {0x10030, 0x000785E9}, -+ {0x10030, 0x000789E3}, -+ {0x10030, 0x00078DA1}, -+ {0x10030, 0x0007915F}, -+ {0x10030, 0x00079559}, -+ {0x10030, 0x0007991F}, -+ {0x10030, 0x00079D19}, -+ {0x10030, 0x0007A0DF}, -+ {0x10030, 0x0007A4D9}, -+ {0x10030, 0x0007A8D3}, -+ {0x10030, 0x0007AC99}, -+ {0x10030, 0x0007B05F}, -+ {0x10030, 0x0007B459}, -+ {0x10030, 0x0007B81F}, -+ {0x10030, 0x0007BC19}, -+ {0x10030, 0x0007C013}, -+ {0x10030, 0x0007C40D}, - {0x90360001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x000001EF}, - {0x10030, 0x000005E9}, -@@ -21582,73 +24180,73 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x000609A9}, - {0x10030, 0x00060D65}, - {0x10030, 0x0006115F}, -- {0x10030, 0x00061525}, -- {0x10030, 0x0006191F}, -- {0x10030, 0x00061CE7}, -- {0x10030, 0x000620E1}, -- {0x10030, 0x000624DB}, -- {0x10030, 0x000628A3}, -- {0x10030, 0x00062C69}, -- {0x10030, 0x00063063}, -- {0x10030, 0x00063429}, -- {0x10030, 0x00063823}, -- {0x10030, 0x00063C1D}, -- {0x10030, 0x00064013}, -- {0x10030, 0x0006440D}, -+ {0x10030, 0x00061527}, -+ {0x10030, 0x00061921}, -+ {0x10030, 0x00061CE9}, -+ {0x10030, 0x000620E3}, -+ {0x10030, 0x000624DD}, -+ {0x10030, 0x000628A5}, -+ {0x10030, 0x00062C6B}, -+ {0x10030, 0x00063065}, -+ {0x10030, 0x0006342B}, -+ {0x10030, 0x00063825}, -+ {0x10030, 0x00063C1F}, -+ {0x10030, 0x00064019}, -+ {0x10030, 0x00064413}, - {0x10030, 0x000681EF}, - {0x10030, 0x000685E7}, - {0x10030, 0x000689A7}, - {0x10030, 0x00068D61}, - {0x10030, 0x0006915B}, -- {0x10030, 0x00069523}, -- {0x10030, 0x0006991D}, -- {0x10030, 0x00069CE5}, -- {0x10030, 0x0006A0DF}, -- {0x10030, 0x0006A4A7}, -- {0x10030, 0x0006A8A1}, -- {0x10030, 0x0006AC67}, -- {0x10030, 0x0006B061}, -+ {0x10030, 0x00069525}, -+ {0x10030, 0x0006991F}, -+ {0x10030, 0x00069CE7}, -+ {0x10030, 0x0006A0E1}, -+ {0x10030, 0x0006A4A9}, -+ {0x10030, 0x0006A8A3}, -+ {0x10030, 0x0006AC69}, -+ {0x10030, 0x0006B063}, - {0x10030, 0x0006B429}, - {0x10030, 0x0006B823}, - {0x10030, 0x0006BC1D}, - {0x10030, 0x0006C017}, -- {0x10030, 0x0006C40D}, -- {0x10030, 0x000701F1}, -+ {0x10030, 0x0006C411}, -+ {0x10030, 0x000701EF}, - {0x10030, 0x000705E9}, - {0x10030, 0x000709A9}, - {0x10030, 0x00070D63}, - {0x10030, 0x0007115D}, -- {0x10030, 0x00071523}, -- {0x10030, 0x0007191D}, -- {0x10030, 0x00071D17}, -- {0x10030, 0x000720DF}, -- {0x10030, 0x000724D9}, -- {0x10030, 0x000728D3}, -- {0x10030, 0x00072C67}, -- {0x10030, 0x00073061}, -- {0x10030, 0x00073427}, -- {0x10030, 0x00073821}, -- {0x10030, 0x00073C1B}, -- {0x10030, 0x00074015}, -- {0x10030, 0x0007440D}, -- {0x10030, 0x000781F1}, -- {0x10030, 0x000785EB}, -- {0x10030, 0x000789E5}, -- {0x10030, 0x00078DA3}, -- {0x10030, 0x00079161}, -- {0x10030, 0x0007955B}, -- {0x10030, 0x00079923}, -- {0x10030, 0x00079D1D}, -- {0x10030, 0x0007A117}, -- {0x10030, 0x0007A4DD}, -- {0x10030, 0x0007A8D7}, -- {0x10030, 0x0007AC9D}, -- {0x10030, 0x0007B063}, -- {0x10030, 0x0007B45D}, -- {0x10030, 0x0007B857}, -- {0x10030, 0x0007BC1D}, -- {0x10030, 0x0007C017}, -- {0x10030, 0x0007C40F}, -+ {0x10030, 0x00071525}, -+ {0x10030, 0x0007191F}, -+ {0x10030, 0x00071D19}, -+ {0x10030, 0x000720E1}, -+ {0x10030, 0x000724DB}, -+ {0x10030, 0x000728A3}, -+ {0x10030, 0x00072C69}, -+ {0x10030, 0x00073063}, -+ {0x10030, 0x00073429}, -+ {0x10030, 0x00073823}, -+ {0x10030, 0x00073C1D}, -+ {0x10030, 0x00074017}, -+ {0x10030, 0x00074411}, -+ {0x10030, 0x000781EF}, -+ {0x10030, 0x000785E9}, -+ {0x10030, 0x000789E3}, -+ {0x10030, 0x00078DA1}, -+ {0x10030, 0x0007915F}, -+ {0x10030, 0x00079559}, -+ {0x10030, 0x0007991F}, -+ {0x10030, 0x00079D19}, -+ {0x10030, 0x0007A0DF}, -+ {0x10030, 0x0007A4D9}, -+ {0x10030, 0x0007A8D3}, -+ {0x10030, 0x0007AC99}, -+ {0x10030, 0x0007B05F}, -+ {0x10030, 0x0007B459}, -+ {0x10030, 0x0007B81F}, -+ {0x10030, 0x0007BC19}, -+ {0x10030, 0x0007C013}, -+ {0x10030, 0x0007C40D}, - {0x903f0001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x000001EF}, - {0x10030, 0x000005E9}, -@@ -21727,73 +24325,73 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x000609A9}, - {0x10030, 0x00060D65}, - {0x10030, 0x0006115F}, -- {0x10030, 0x00061525}, -- {0x10030, 0x0006191F}, -- {0x10030, 0x00061CE7}, -- {0x10030, 0x000620E1}, -- {0x10030, 0x000624DB}, -- {0x10030, 0x000628A3}, -- {0x10030, 0x00062C69}, -- {0x10030, 0x00063063}, -- {0x10030, 0x00063429}, -- {0x10030, 0x00063823}, -- {0x10030, 0x00063C1D}, -- {0x10030, 0x00064013}, -- {0x10030, 0x0006440D}, -+ {0x10030, 0x00061527}, -+ {0x10030, 0x00061921}, -+ {0x10030, 0x00061CE9}, -+ {0x10030, 0x000620E3}, -+ {0x10030, 0x000624DD}, -+ {0x10030, 0x000628A5}, -+ {0x10030, 0x00062C6B}, -+ {0x10030, 0x00063065}, -+ {0x10030, 0x0006342B}, -+ {0x10030, 0x00063825}, -+ {0x10030, 0x00063C1F}, -+ {0x10030, 0x00064019}, -+ {0x10030, 0x00064413}, - {0x10030, 0x000681EF}, - {0x10030, 0x000685E7}, - {0x10030, 0x000689A7}, - {0x10030, 0x00068D61}, - {0x10030, 0x0006915B}, -- {0x10030, 0x00069523}, -- {0x10030, 0x0006991D}, -- {0x10030, 0x00069CE5}, -- {0x10030, 0x0006A0DF}, -- {0x10030, 0x0006A4A7}, -- {0x10030, 0x0006A8A1}, -- {0x10030, 0x0006AC67}, -- {0x10030, 0x0006B061}, -+ {0x10030, 0x00069525}, -+ {0x10030, 0x0006991F}, -+ {0x10030, 0x00069CE7}, -+ {0x10030, 0x0006A0E1}, -+ {0x10030, 0x0006A4A9}, -+ {0x10030, 0x0006A8A3}, -+ {0x10030, 0x0006AC69}, -+ {0x10030, 0x0006B063}, - {0x10030, 0x0006B429}, - {0x10030, 0x0006B823}, - {0x10030, 0x0006BC1D}, - {0x10030, 0x0006C017}, -- {0x10030, 0x0006C40D}, -- {0x10030, 0x000701F1}, -+ {0x10030, 0x0006C411}, -+ {0x10030, 0x000701EF}, - {0x10030, 0x000705E9}, - {0x10030, 0x000709A9}, - {0x10030, 0x00070D63}, - {0x10030, 0x0007115D}, -- {0x10030, 0x00071523}, -- {0x10030, 0x0007191D}, -- {0x10030, 0x00071D17}, -- {0x10030, 0x000720DF}, -- {0x10030, 0x000724D9}, -- {0x10030, 0x000728D3}, -- {0x10030, 0x00072C67}, -- {0x10030, 0x00073061}, -- {0x10030, 0x00073427}, -- {0x10030, 0x00073821}, -- {0x10030, 0x00073C1B}, -- {0x10030, 0x00074015}, -- {0x10030, 0x0007440D}, -- {0x10030, 0x000781F1}, -- {0x10030, 0x000785EB}, -- {0x10030, 0x000789E5}, -- {0x10030, 0x00078DA3}, -- {0x10030, 0x00079161}, -- {0x10030, 0x0007955B}, -- {0x10030, 0x00079923}, -- {0x10030, 0x00079D1D}, -- {0x10030, 0x0007A117}, -- {0x10030, 0x0007A4DD}, -- {0x10030, 0x0007A8D7}, -- {0x10030, 0x0007AC9D}, -- {0x10030, 0x0007B063}, -- {0x10030, 0x0007B45D}, -- {0x10030, 0x0007B857}, -- {0x10030, 0x0007BC1D}, -- {0x10030, 0x0007C017}, -- {0x10030, 0x0007C40F}, -+ {0x10030, 0x00071525}, -+ {0x10030, 0x0007191F}, -+ {0x10030, 0x00071D19}, -+ {0x10030, 0x000720E1}, -+ {0x10030, 0x000724DB}, -+ {0x10030, 0x000728A3}, -+ {0x10030, 0x00072C69}, -+ {0x10030, 0x00073063}, -+ {0x10030, 0x00073429}, -+ {0x10030, 0x00073823}, -+ {0x10030, 0x00073C1D}, -+ {0x10030, 0x00074017}, -+ {0x10030, 0x00074411}, -+ {0x10030, 0x000781EF}, -+ {0x10030, 0x000785E9}, -+ {0x10030, 0x000789E3}, -+ {0x10030, 0x00078DA1}, -+ {0x10030, 0x0007915F}, -+ {0x10030, 0x00079559}, -+ {0x10030, 0x0007991F}, -+ {0x10030, 0x00079D19}, -+ {0x10030, 0x0007A0DF}, -+ {0x10030, 0x0007A4D9}, -+ {0x10030, 0x0007A8D3}, -+ {0x10030, 0x0007AC99}, -+ {0x10030, 0x0007B05F}, -+ {0x10030, 0x0007B459}, -+ {0x10030, 0x0007B81F}, -+ {0x10030, 0x0007BC19}, -+ {0x10030, 0x0007C013}, -+ {0x10030, 0x0007C40D}, - {0x90400001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x000001EF}, - {0x10030, 0x000005E9}, -@@ -21872,73 +24470,73 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x000609A9}, - {0x10030, 0x00060D65}, - {0x10030, 0x0006115F}, -- {0x10030, 0x00061525}, -- {0x10030, 0x0006191F}, -- {0x10030, 0x00061CE7}, -- {0x10030, 0x000620E1}, -- {0x10030, 0x000624DB}, -- {0x10030, 0x000628A3}, -- {0x10030, 0x00062C69}, -- {0x10030, 0x00063063}, -- {0x10030, 0x00063429}, -- {0x10030, 0x00063823}, -- {0x10030, 0x00063C1D}, -- {0x10030, 0x00064013}, -- {0x10030, 0x0006440D}, -+ {0x10030, 0x00061527}, -+ {0x10030, 0x00061921}, -+ {0x10030, 0x00061CE9}, -+ {0x10030, 0x000620E3}, -+ {0x10030, 0x000624DD}, -+ {0x10030, 0x000628A5}, -+ {0x10030, 0x00062C6B}, -+ {0x10030, 0x00063065}, -+ {0x10030, 0x0006342B}, -+ {0x10030, 0x00063825}, -+ {0x10030, 0x00063C1F}, -+ {0x10030, 0x00064019}, -+ {0x10030, 0x00064413}, - {0x10030, 0x000681EF}, - {0x10030, 0x000685E7}, - {0x10030, 0x000689A7}, - {0x10030, 0x00068D61}, - {0x10030, 0x0006915B}, -- {0x10030, 0x00069523}, -- {0x10030, 0x0006991D}, -- {0x10030, 0x00069CE5}, -- {0x10030, 0x0006A0DF}, -- {0x10030, 0x0006A4A7}, -- {0x10030, 0x0006A8A1}, -- {0x10030, 0x0006AC67}, -- {0x10030, 0x0006B061}, -+ {0x10030, 0x00069525}, -+ {0x10030, 0x0006991F}, -+ {0x10030, 0x00069CE7}, -+ {0x10030, 0x0006A0E1}, -+ {0x10030, 0x0006A4A9}, -+ {0x10030, 0x0006A8A3}, -+ {0x10030, 0x0006AC69}, -+ {0x10030, 0x0006B063}, - {0x10030, 0x0006B429}, - {0x10030, 0x0006B823}, - {0x10030, 0x0006BC1D}, - {0x10030, 0x0006C017}, -- {0x10030, 0x0006C40D}, -- {0x10030, 0x000701F1}, -+ {0x10030, 0x0006C411}, -+ {0x10030, 0x000701EF}, - {0x10030, 0x000705E9}, - {0x10030, 0x000709A9}, - {0x10030, 0x00070D63}, - {0x10030, 0x0007115D}, -- {0x10030, 0x00071523}, -- {0x10030, 0x0007191D}, -- {0x10030, 0x00071D17}, -- {0x10030, 0x000720DF}, -- {0x10030, 0x000724D9}, -- {0x10030, 0x000728D3}, -- {0x10030, 0x00072C67}, -- {0x10030, 0x00073061}, -- {0x10030, 0x00073427}, -- {0x10030, 0x00073821}, -- {0x10030, 0x00073C1B}, -- {0x10030, 0x00074015}, -- {0x10030, 0x0007440D}, -- {0x10030, 0x000781F1}, -- {0x10030, 0x000785EB}, -- {0x10030, 0x000789E5}, -- {0x10030, 0x00078DA3}, -- {0x10030, 0x00079161}, -- {0x10030, 0x0007955B}, -- {0x10030, 0x00079923}, -- {0x10030, 0x00079D1D}, -- {0x10030, 0x0007A117}, -- {0x10030, 0x0007A4DD}, -- {0x10030, 0x0007A8D7}, -- {0x10030, 0x0007AC9D}, -- {0x10030, 0x0007B063}, -- {0x10030, 0x0007B45D}, -- {0x10030, 0x0007B857}, -- {0x10030, 0x0007BC1D}, -- {0x10030, 0x0007C017}, -- {0x10030, 0x0007C40F}, -+ {0x10030, 0x00071525}, -+ {0x10030, 0x0007191F}, -+ {0x10030, 0x00071D19}, -+ {0x10030, 0x000720E1}, -+ {0x10030, 0x000724DB}, -+ {0x10030, 0x000728A3}, -+ {0x10030, 0x00072C69}, -+ {0x10030, 0x00073063}, -+ {0x10030, 0x00073429}, -+ {0x10030, 0x00073823}, -+ {0x10030, 0x00073C1D}, -+ {0x10030, 0x00074017}, -+ {0x10030, 0x00074411}, -+ {0x10030, 0x000781EF}, -+ {0x10030, 0x000785E9}, -+ {0x10030, 0x000789E3}, -+ {0x10030, 0x00078DA1}, -+ {0x10030, 0x0007915F}, -+ {0x10030, 0x00079559}, -+ {0x10030, 0x0007991F}, -+ {0x10030, 0x00079D19}, -+ {0x10030, 0x0007A0DF}, -+ {0x10030, 0x0007A4D9}, -+ {0x10030, 0x0007A8D3}, -+ {0x10030, 0x0007AC99}, -+ {0x10030, 0x0007B05F}, -+ {0x10030, 0x0007B459}, -+ {0x10030, 0x0007B81F}, -+ {0x10030, 0x0007BC19}, -+ {0x10030, 0x0007C013}, -+ {0x10030, 0x0007C40D}, - {0xA0000000, 0x00000000}, - {0x10030, 0x000001EF}, - {0x10030, 0x000005E9}, -@@ -22782,6 +25380,110 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x000338CC}, - {0x10030, 0x00033C09}, - {0x10030, 0x00034006}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x000200E8}, -+ {0x10030, 0x000204E5}, -+ {0x10030, 0x000208E2}, -+ {0x10030, 0x00020CDF}, -+ {0x10030, 0x000210DC}, -+ {0x10030, 0x000214D9}, -+ {0x10030, 0x000218D6}, -+ {0x10030, 0x00021CD3}, -+ {0x10030, 0x000220D0}, -+ {0x10030, 0x0002240D}, -+ {0x10030, 0x0002280A}, -+ {0x10030, 0x00022C07}, -+ {0x10030, 0x00023004}, -+ {0x10030, 0x00023401}, -+ {0x10030, 0x00023800}, -+ {0x10030, 0x00023C00}, -+ {0x10030, 0x00024000}, -+ {0x10030, 0x000280E7}, -+ {0x10030, 0x000284E4}, -+ {0x10030, 0x000288E1}, -+ {0x10030, 0x00028CDE}, -+ {0x10030, 0x000290DB}, -+ {0x10030, 0x000294D8}, -+ {0x10030, 0x000298D5}, -+ {0x10030, 0x00029CD2}, -+ {0x10030, 0x0002A0CF}, -+ {0x10030, 0x0002A40C}, -+ {0x10030, 0x0002A809}, -+ {0x10030, 0x0002AC06}, -+ {0x10030, 0x0002B003}, -+ {0x10030, 0x0002B400}, -+ {0x10030, 0x0002B800}, -+ {0x10030, 0x0002BC00}, -+ {0x10030, 0x0002C000}, -+ {0x10030, 0x000300E7}, -+ {0x10030, 0x000304E4}, -+ {0x10030, 0x000308E1}, -+ {0x10030, 0x00030CDE}, -+ {0x10030, 0x000310DB}, -+ {0x10030, 0x000314D8}, -+ {0x10030, 0x000318D5}, -+ {0x10030, 0x00031CD2}, -+ {0x10030, 0x000320CF}, -+ {0x10030, 0x000324CC}, -+ {0x10030, 0x00032809}, -+ {0x10030, 0x00032C06}, -+ {0x10030, 0x00033003}, -+ {0x10030, 0x00033400}, -+ {0x10030, 0x00033800}, -+ {0x10030, 0x00033C00}, -+ {0x10030, 0x00034000}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x000200E8}, -+ {0x10030, 0x000204E5}, -+ {0x10030, 0x000208E2}, -+ {0x10030, 0x00020CDF}, -+ {0x10030, 0x000210DC}, -+ {0x10030, 0x000214D9}, -+ {0x10030, 0x000218D6}, -+ {0x10030, 0x00021CD3}, -+ {0x10030, 0x000220D0}, -+ {0x10030, 0x0002240D}, -+ {0x10030, 0x0002280A}, -+ {0x10030, 0x00022C07}, -+ {0x10030, 0x00023004}, -+ {0x10030, 0x00023401}, -+ {0x10030, 0x00023800}, -+ {0x10030, 0x00023C00}, -+ {0x10030, 0x00024000}, -+ {0x10030, 0x000280E7}, -+ {0x10030, 0x000284E4}, -+ {0x10030, 0x000288E1}, -+ {0x10030, 0x00028CDE}, -+ {0x10030, 0x000290DB}, -+ {0x10030, 0x000294D8}, -+ {0x10030, 0x000298D5}, -+ {0x10030, 0x00029CD2}, -+ {0x10030, 0x0002A0CF}, -+ {0x10030, 0x0002A40C}, -+ {0x10030, 0x0002A809}, -+ {0x10030, 0x0002AC06}, -+ {0x10030, 0x0002B003}, -+ {0x10030, 0x0002B400}, -+ {0x10030, 0x0002B800}, -+ {0x10030, 0x0002BC00}, -+ {0x10030, 0x0002C000}, -+ {0x10030, 0x000300E7}, -+ {0x10030, 0x000304E4}, -+ {0x10030, 0x000308E1}, -+ {0x10030, 0x00030CDE}, -+ {0x10030, 0x000310DB}, -+ {0x10030, 0x000314D8}, -+ {0x10030, 0x000318D5}, -+ {0x10030, 0x00031CD2}, -+ {0x10030, 0x000320CF}, -+ {0x10030, 0x000324CC}, -+ {0x10030, 0x00032809}, -+ {0x10030, 0x00032C06}, -+ {0x10030, 0x00033003}, -+ {0x10030, 0x00033400}, -+ {0x10030, 0x00033800}, -+ {0x10030, 0x00033C00}, -+ {0x10030, 0x00034000}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x000200FA}, - {0x10030, 0x000204F7}, -@@ -23329,6 +26031,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -23373,6 +26079,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -23429,6 +26139,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -23473,6 +26187,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -23529,6 +26247,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -23573,6 +26295,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -23629,6 +26355,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -23673,6 +26403,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -23729,6 +26463,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -23773,6 +26511,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -23829,6 +26571,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -23873,6 +26619,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -23929,6 +26679,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -23973,6 +26727,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24029,6 +26787,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24073,6 +26835,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24129,6 +26895,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24173,6 +26943,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24229,6 +27003,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24273,6 +27051,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24329,6 +27111,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24373,6 +27159,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24429,6 +27219,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24473,6 +27267,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24529,6 +27327,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24573,6 +27375,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24629,6 +27435,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24673,6 +27483,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24729,6 +27543,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24773,6 +27591,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24829,6 +27651,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24873,6 +27699,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24929,6 +27759,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -24973,6 +27807,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25029,6 +27867,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25073,6 +27915,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25129,6 +27975,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25173,6 +28023,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25229,6 +28083,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25273,6 +28131,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25329,6 +28191,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25373,6 +28239,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25429,6 +28299,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25473,6 +28347,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25529,6 +28407,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25573,6 +28455,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25629,6 +28515,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25673,6 +28563,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25729,6 +28623,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25773,6 +28671,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25829,6 +28731,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25873,6 +28779,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25929,6 +28839,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -25973,6 +28887,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -26029,6 +28947,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -26073,6 +28995,10 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x00000003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x03F, 0x00008002}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x03F, 0x00000003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -26157,6 +29083,10 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x00025003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x00025003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x00025003}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x00025003}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x00025003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -26207,6 +29137,10 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x0002D003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x0002D003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x0002D003}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x0002D003}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x0002D003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -26257,6 +29191,10 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x00035003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x00035003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x00035003}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x00035003}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x00035003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -26307,6 +29245,10 @@ static const struct rtw89_reg2_def rtw89 - {0x10030, 0x0003D003}, - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x0003D003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x0003D003}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x0003D003}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x0003D003}, - {0x90330001, 0x00000000}, {0x40000000, 0x00000000}, -@@ -26370,6 +29312,12 @@ static const struct rtw89_reg2_def rtw89 - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x00065003}, - {0x10030, 0x00066003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x00065003}, -+ {0x10030, 0x00066003}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x00065003}, -+ {0x10030, 0x00066003}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x00065003}, - {0x10030, 0x00066003}, -@@ -26440,6 +29388,12 @@ static const struct rtw89_reg2_def rtw89 - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x0006D003}, - {0x10030, 0x0006E003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x0006D003}, -+ {0x10030, 0x0006E003}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x0006D003}, -+ {0x10030, 0x0006E003}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x0006D003}, - {0x10030, 0x0006E003}, -@@ -26510,6 +29464,12 @@ static const struct rtw89_reg2_def rtw89 - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x00075003}, - {0x10030, 0x00076003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x00075003}, -+ {0x10030, 0x00076003}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x00075003}, -+ {0x10030, 0x00076003}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x00075003}, - {0x10030, 0x00076003}, -@@ -26580,6 +29540,12 @@ static const struct rtw89_reg2_def rtw89 - {0x90070001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x0007D003}, - {0x10030, 0x0007E003}, -+ {0x90150001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x0007D003}, -+ {0x10030, 0x0007E003}, -+ {0x90160001, 0x00000000}, {0x40000000, 0x00000000}, -+ {0x10030, 0x0007D003}, -+ {0x10030, 0x0007E003}, - {0x90320001, 0x00000000}, {0x40000000, 0x00000000}, - {0x10030, 0x0007D003}, - {0x10030, 0x0007E003}, -@@ -26621,7 +29587,7 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0000000A}, - {0x0ED, 0x00000000}, - {0x100EE, 0x00000000}, -- {0x0FE, 0x00000048}, -+ {0x0FE, 0x00000063}, - }; - - static const struct rtw89_reg2_def rtw89_8852c_phy_nctl_regs[] = { diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-134-wifi-rtw89-cleanup-private-data-structures.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-134-wifi-rtw89-cleanup-private-data-structures.patch deleted file mode 100644 index f5f6687f4..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-134-wifi-rtw89-cleanup-private-data-structures.patch +++ /dev/null @@ -1,158 +0,0 @@ -From 65a9140e38b6f3318af90860ab0128a47996aaa9 Mon Sep 17 00:00:00 2001 -From: Dmitry Antipov -Date: Wed, 14 Jun 2023 11:15:53 +0300 -Subject: [PATCH 134/136] wifi: rtw89: cleanup private data structures - -Remove a bunch of unused (and set but unused) fields -from 'struct rtw89_btc_wl_nhm', 'struct rtw89_dle_info', -'struct rtw89_hal' and 'struct rtw89_env_monitor_info' -driver-specific data structures, adjust related bits. - -Signed-off-by: Dmitry Antipov -Acked-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230614081555.91395-1-dmantipov@yandex.ru ---- - drivers/net/wireless/realtek/rtw89/core.h | 39 ----------------------- - drivers/net/wireless/realtek/rtw89/mac.c | 6 +--- - drivers/net/wireless/realtek/rtw89/phy.c | 4 --- - 3 files changed, 1 insertion(+), 48 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -1405,7 +1405,6 @@ struct rtw89_btc_wl_nhm { - u8 current_status; - u8 refresh; - bool start_flag; -- u8 last_ccx_rpt_stamp; - s8 pwr_max; - s8 pwr_min; - }; -@@ -3301,7 +3300,6 @@ enum rtw89_hcifc_mode { - - struct rtw89_dle_info { - enum rtw89_qta_mode qta_mode; -- u16 wde_pg_size; - u16 ple_pg_size; - u16 c0_rx_qta; - u16 c1_rx_qta; -@@ -3484,7 +3482,6 @@ struct rtw89_hal { - u32 rx_fltr; - u8 cv; - u8 acv; -- u32 sw_amsdu_max_size; - u32 antenna_tx; - u32 antenna_rx; - u8 tx_nss; -@@ -3890,35 +3887,16 @@ enum rtw89_ccx_edcca_opt_bw_idx { - #define RTW89_FAHM_RPT_NUM 12 - #define RTW89_IFS_CLM_NUM 4 - struct rtw89_env_monitor_info { -- u32 ccx_trigger_time; -- u64 start_time; -- u8 ccx_rpt_stamp; - u8 ccx_watchdog_result; - bool ccx_ongoing; - u8 ccx_rac_lv; - bool ccx_manual_ctrl; -- u8 ccx_pre_rssi; -- u16 clm_mntr_time; -- u16 nhm_mntr_time; - u16 ifs_clm_mntr_time; - enum rtw89_ifs_clm_application ifs_clm_app; -- u16 fahm_mntr_time; -- u16 edcca_clm_mntr_time; - u16 ccx_period; - u8 ccx_unit_idx; -- enum rtw89_ccx_edcca_opt_bw_idx ccx_edcca_opt_bw_idx; -- u8 nhm_th[RTW89_NHM_TH_NUM]; - u16 ifs_clm_th_l[RTW89_IFS_CLM_NUM]; - u16 ifs_clm_th_h[RTW89_IFS_CLM_NUM]; -- u8 fahm_numer_opt; -- u8 fahm_denom_opt; -- u8 fahm_th[RTW89_FAHM_TH_NUM]; -- u16 clm_result; -- u16 nhm_result[RTW89_NHM_RPT_NUM]; -- u8 nhm_wgt[RTW89_NHM_RPT_NUM]; -- u16 nhm_tx_cnt; -- u16 nhm_cca_cnt; -- u16 nhm_idle_cnt; - u16 ifs_clm_tx; - u16 ifs_clm_edcca_excl_cca; - u16 ifs_clm_ofdmfa; -@@ -3929,17 +3907,6 @@ struct rtw89_env_monitor_info { - u8 ifs_clm_his[RTW89_IFS_CLM_NUM]; - u16 ifs_clm_avg[RTW89_IFS_CLM_NUM]; - u16 ifs_clm_cca[RTW89_IFS_CLM_NUM]; -- u16 fahm_result[RTW89_FAHM_RPT_NUM]; -- u16 fahm_denom_result; -- u16 edcca_clm_result; -- u8 clm_ratio; -- u8 nhm_rpt[RTW89_NHM_RPT_NUM]; -- u8 nhm_tx_ratio; -- u8 nhm_cca_ratio; -- u8 nhm_idle_ratio; -- u8 nhm_ratio; -- u16 nhm_result_sum; -- u8 nhm_pwr; - u8 ifs_clm_tx_ratio; - u8 ifs_clm_edcca_excl_cca_ratio; - u8 ifs_clm_cck_fa_ratio; -@@ -3950,12 +3917,6 @@ struct rtw89_env_monitor_info { - u16 ifs_clm_ofdm_fa_permil; - u32 ifs_clm_ifs_avg[RTW89_IFS_CLM_NUM]; - u32 ifs_clm_cca_avg[RTW89_IFS_CLM_NUM]; -- u8 fahm_rpt[RTW89_FAHM_RPT_NUM]; -- u16 fahm_result_sum; -- u8 fahm_ratio; -- u8 fahm_denom_ratio; -- u8 fahm_pwr; -- u8 edcca_clm_ratio; - }; - - enum rtw89_ser_rcvy_step { ---- a/drivers/net/wireless/realtek/rtw89/mac.c -+++ b/drivers/net/wireless/realtek/rtw89/mac.c -@@ -758,11 +758,8 @@ static int hfc_reset_param(struct rtw89_ - if (param_ini.pub_cfg) - param->pub_cfg = *param_ini.pub_cfg; - -- if (param_ini.prec_cfg) { -+ if (param_ini.prec_cfg) - param->prec_cfg = *param_ini.prec_cfg; -- rtwdev->hal.sw_amsdu_max_size = -- param->prec_cfg.wp_ch07_prec * HFC_PAGE_UNIT; -- } - - if (param_ini.ch_cfg) - param->ch_cfg = param_ini.ch_cfg; -@@ -1541,7 +1538,6 @@ static const struct rtw89_dle_mem *get_d - return NULL; - } - -- mac->dle_info.wde_pg_size = cfg->wde_size->pge_size; - mac->dle_info.ple_pg_size = cfg->ple_size->pge_size; - mac->dle_info.qta_mode = mode; - mac->dle_info.c0_rx_qta = cfg->ple_min_qt->cma0_dma; ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -3188,11 +3188,8 @@ static void rtw89_phy_ccx_top_setting_in - env->ccx_manual_ctrl = false; - env->ccx_ongoing = false; - env->ccx_rac_lv = RTW89_RAC_RELEASE; -- env->ccx_rpt_stamp = 0; - env->ccx_period = 0; - env->ccx_unit_idx = RTW89_CCX_32_US; -- env->ccx_trigger_time = 0; -- env->ccx_edcca_opt_bw_idx = RTW89_CCX_EDCCA_BW20_0; - - rtw89_phy_set_phy_regs(rtwdev, R_CCX, B_CCX_EN_MSK, 1); - rtw89_phy_set_phy_regs(rtwdev, R_CCX, B_CCX_TRIG_OPT_MSK, 1); -@@ -3400,7 +3397,6 @@ static void rtw89_phy_ccx_trigger(struct - rtw89_phy_set_phy_regs(rtwdev, R_IFS_COUNTER, B_IFS_COUNTER_CLR_MSK, 1); - rtw89_phy_set_phy_regs(rtwdev, R_CCX, B_MEASUREMENT_TRIG_MSK, 1); - -- env->ccx_rpt_stamp++; - env->ccx_ongoing = true; - } - diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-135-wifi-rtw89-cleanup-rtw89_iqk_info-and-related-code.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-135-wifi-rtw89-cleanup-rtw89_iqk_info-and-related-code.patch deleted file mode 100644 index 24af5f2ae..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-135-wifi-rtw89-cleanup-rtw89_iqk_info-and-related-code.patch +++ /dev/null @@ -1,218 +0,0 @@ -From 686317a246cd10e343f8ca519a54e6a51a3eb142 Mon Sep 17 00:00:00 2001 -From: Dmitry Antipov -Date: Wed, 14 Jun 2023 11:15:54 +0300 -Subject: [PATCH 135/136] wifi: rtw89: cleanup rtw89_iqk_info and related code - -Drop useless '_iqk_track()' and 'rtw8852a_iqk_track()' (they -just change 'thermal_rek_en' field which is set but unused -and so removed as well) functions, set but unused 'kcount' -field of 'struct rtw89_iqk_info', and convert 'thermal' to -local variables where appropriate (it doesn't need to have -longer storage duration because it is actually used for the -debugging purposes only). - -Signed-off-by: Dmitry Antipov -Acked-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230614081555.91395-2-dmantipov@yandex.ru ---- - drivers/net/wireless/realtek/rtw89/core.h | 3 -- - .../net/wireless/realtek/rtw89/rtw8851b_rfk.c | 2 -- - drivers/net/wireless/realtek/rtw89/rtw8852a.c | 1 - - .../net/wireless/realtek/rtw89/rtw8852a_rfk.c | 36 ++----------------- - .../net/wireless/realtek/rtw89/rtw8852a_rfk.h | 1 - - .../net/wireless/realtek/rtw89/rtw8852b_rfk.c | 6 ---- - .../net/wireless/realtek/rtw89/rtw8852c_rfk.c | 9 ++--- - 7 files changed, 4 insertions(+), 54 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3610,7 +3610,6 @@ struct rtw89_iqk_info { - u8 iqk_band[RTW89_IQK_PATH_NR]; - u8 iqk_ch[RTW89_IQK_PATH_NR]; - u8 iqk_bw[RTW89_IQK_PATH_NR]; -- u8 kcount; - u8 iqk_times; - u8 version; - u32 nb_txcfir[RTW89_IQK_PATH_NR]; -@@ -3625,8 +3624,6 @@ struct rtw89_iqk_info { - bool iqk_xym_en; - bool iqk_sram_en; - bool iqk_cfir_en; -- u8 thermal[RTW89_IQK_PATH_NR]; -- bool thermal_rek_en; - u32 syn1to2; - u8 iqk_mcc_ch[RTW89_IQK_CHS_NR][RTW89_IQK_PATH_NR]; - u8 iqk_table_idx[RTW89_IQK_PATH_NR]; ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -@@ -1560,7 +1560,6 @@ static void _iqk_init(struct rtw89_dev * - iqk_info->iqk_sram_en = false; - iqk_info->iqk_cfir_en = false; - iqk_info->iqk_xym_en = false; -- iqk_info->thermal_rek_en = false; - iqk_info->iqk_times = 0x0; - - for (idx = 0; idx < RTW89_IQK_CHS_NR; idx++) { -@@ -1589,7 +1588,6 @@ static void _doiqk(struct rtw89_dev *rtw - rtw89_debug(rtwdev, RTW89_DBG_RFK, - "[IQK]==========IQK strat!!!!!==========\n"); - iqk_info->iqk_times++; -- iqk_info->kcount = 0; - iqk_info->version = RTW8851B_IQK_VER; - - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]Test Ver 0x%x\n", iqk_info->version); ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c -@@ -1338,7 +1338,6 @@ static void rtw8852a_rfk_scan(struct rtw - static void rtw8852a_rfk_track(struct rtw89_dev *rtwdev) - { - rtw8852a_dpk_track(rtwdev); -- rtw8852a_iqk_track(rtwdev); - rtw8852a_tssi_track(rtwdev); - } - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.c -@@ -1284,11 +1284,8 @@ static void _iqk_info_iqk(struct rtw89_d - u32 tmp = 0x0; - bool flag = 0x0; - -- iqk_info->thermal[path] = -- ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); -- iqk_info->thermal_rek_en = false; -- rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_thermal = %d\n", path, -- iqk_info->thermal[path]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_thermal = %lu\n", path, -+ ewma_thermal_read(&rtwdev->phystat.avg_thermal[path])); - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_LOK_COR_fail= %d\n", path, - iqk_info->lok_cor_fail[0][path]); - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_LOK_FIN_fail= %d\n", path, -@@ -1536,28 +1533,6 @@ static void _iqk_dbcc(struct rtw89_dev * - _iqk_afebb_restore(rtwdev, phy_idx, path); - } - --static void _iqk_track(struct rtw89_dev *rtwdev) --{ -- struct rtw89_iqk_info *iqk = &rtwdev->iqk; -- u8 path = 0x0; -- u8 cur_ther; -- -- if (iqk->iqk_band[0] == RTW89_BAND_2G) -- return; -- if (iqk->iqk_bw[0] < RTW89_CHANNEL_WIDTH_80) -- return; -- -- /* only check path 0 */ -- for (path = 0; path < 1; path++) { -- cur_ther = ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); -- -- if (abs(cur_ther - iqk->thermal[path]) > RTW8852A_IQK_THR_REK) -- iqk->thermal_rek_en = true; -- else -- iqk->thermal_rek_en = false; -- } --} -- - static void _rck(struct rtw89_dev *rtwdev, enum rtw89_rf_path path) - { - u32 rf_reg5, rck_val = 0; -@@ -1616,7 +1591,6 @@ static void _iqk_init(struct rtw89_dev * - iqk_info->iqk_sram_en = false; - iqk_info->iqk_cfir_en = false; - iqk_info->iqk_xym_en = false; -- iqk_info->thermal_rek_en = false; - iqk_info->iqk_times = 0x0; - - for (ch = 0; ch < RTW89_IQK_CHS_NR; ch++) { -@@ -1645,7 +1619,6 @@ static void _doiqk(struct rtw89_dev *rtw - rtw89_debug(rtwdev, RTW89_DBG_RFK, - "[IQK]==========IQK start!!!!!==========\n"); - iqk_info->iqk_times++; -- iqk_info->kcount = 0; - iqk_info->version = RTW8852A_IQK_VER; - - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]Test Ver 0x%x\n", iqk_info->version); -@@ -3655,11 +3628,6 @@ void rtw8852a_iqk(struct rtw89_dev *rtwd - rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_STOP); - } - --void rtw8852a_iqk_track(struct rtw89_dev *rtwdev) --{ -- _iqk_track(rtwdev); --} -- - void rtw8852a_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, - bool is_afe) - { ---- a/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a_rfk.h -@@ -10,7 +10,6 @@ - void rtw8852a_rck(struct rtw89_dev *rtwdev); - void rtw8852a_dack(struct rtw89_dev *rtwdev); - void rtw8852a_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); --void rtw8852a_iqk_track(struct rtw89_dev *rtwdev); - void rtw8852a_rx_dck(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx, - bool is_afe); - void rtw8852a_dpk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy); ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -@@ -1317,10 +1317,6 @@ static void _iqk_info_iqk(struct rtw89_d - u32 tmp; - bool flag; - -- iqk_info->thermal[path] = -- ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); -- iqk_info->thermal_rek_en = false; -- - flag = iqk_info->lok_cor_fail[0][path]; - rtw89_phy_write32_mask(rtwdev, R_IQKINF, B_IQKINF_FCOR << (path * 4), flag); - flag = iqk_info->lok_fin_fail[0][path]; -@@ -1568,7 +1564,6 @@ static void _iqk_init(struct rtw89_dev * - iqk_info->iqk_sram_en = false; - iqk_info->iqk_cfir_en = false; - iqk_info->iqk_xym_en = false; -- iqk_info->thermal_rek_en = false; - iqk_info->iqk_times = 0x0; - - for (idx = 0; idx < RTW89_IQK_CHS_NR; idx++) { -@@ -1624,7 +1619,6 @@ static void _doiqk(struct rtw89_dev *rtw - rtw89_debug(rtwdev, RTW89_DBG_RFK, - "[IQK]==========IQK strat!!!!!==========\n"); - iqk_info->iqk_times++; -- iqk_info->kcount = 0; - iqk_info->version = RTW8852B_IQK_VER; - - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]Test Ver 0x%x\n", iqk_info->version); ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c -@@ -1261,11 +1261,8 @@ static void _iqk_info_iqk(struct rtw89_d - u32 tmp; - bool flag; - -- iqk_info->thermal[path] = -- ewma_thermal_read(&rtwdev->phystat.avg_thermal[path]); -- iqk_info->thermal_rek_en = false; -- rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_thermal = %d\n", path, -- iqk_info->thermal[path]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_thermal = %lu\n", path, -+ ewma_thermal_read(&rtwdev->phystat.avg_thermal[path])); - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_LOK_COR_fail= %d\n", path, - iqk_info->lok_cor_fail[0][path]); - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%d_LOK_FIN_fail= %d\n", path, -@@ -1502,7 +1499,6 @@ static void _iqk_init(struct rtw89_dev * - iqk_info->iqk_sram_en = false; - iqk_info->iqk_cfir_en = false; - iqk_info->iqk_xym_en = false; -- iqk_info->thermal_rek_en = false; - iqk_info->iqk_times = 0x0; - - for (ch = 0; ch < RTW89_IQK_CHS_NR; ch++) { -@@ -1531,7 +1527,6 @@ static void _doiqk(struct rtw89_dev *rtw - rtw89_debug(rtwdev, RTW89_DBG_RFK, - "[IQK]==========IQK strat!!!!!==========\n"); - iqk_info->iqk_times++; -- iqk_info->kcount = 0; - iqk_info->version = RTW8852C_IQK_VER; - - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]Test Ver 0x%x\n", iqk_info->version); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-136-wifi-rtw89-fix-spelling-typo-of-IQK-debug-messages.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-136-wifi-rtw89-fix-spelling-typo-of-IQK-debug-messages.patch deleted file mode 100644 index 7b8a954d1..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-136-wifi-rtw89-fix-spelling-typo-of-IQK-debug-messages.patch +++ /dev/null @@ -1,50 +0,0 @@ -From 5bc9a34ce87bee0ca53b86ff1a5ca340a62c2117 Mon Sep 17 00:00:00 2001 -From: Dmitry Antipov -Date: Wed, 14 Jun 2023 11:15:55 +0300 -Subject: [PATCH 136/136] wifi: rtw89: fix spelling typo of IQK debug messages - -Fix spelling typo of IQK debug messages. - -Signed-off-by: Dmitry Antipov -Acked-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230614081555.91395-3-dmantipov@yandex.ru ---- - drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c | 2 +- - drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c | 2 +- - drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c | 2 +- - 3 files changed, 3 insertions(+), 3 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -@@ -1586,7 +1586,7 @@ static void _doiqk(struct rtw89_dev *rtw - BTC_WRFK_ONESHOT_START); - - rtw89_debug(rtwdev, RTW89_DBG_RFK, -- "[IQK]==========IQK strat!!!!!==========\n"); -+ "[IQK]==========IQK start!!!!!==========\n"); - iqk_info->iqk_times++; - iqk_info->version = RTW8851B_IQK_VER; - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_rfk.c -@@ -1617,7 +1617,7 @@ static void _doiqk(struct rtw89_dev *rtw - rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_START); - - rtw89_debug(rtwdev, RTW89_DBG_RFK, -- "[IQK]==========IQK strat!!!!!==========\n"); -+ "[IQK]==========IQK start!!!!!==========\n"); - iqk_info->iqk_times++; - iqk_info->version = RTW8852B_IQK_VER; - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_rfk.c -@@ -1525,7 +1525,7 @@ static void _doiqk(struct rtw89_dev *rtw - rtw89_btc_ntfy_wl_rfk(rtwdev, phy_map, BTC_WRFKT_IQK, BTC_WRFK_ONESHOT_START); - - rtw89_debug(rtwdev, RTW89_DBG_RFK, -- "[IQK]==========IQK strat!!!!!==========\n"); -+ "[IQK]==========IQK start!!!!!==========\n"); - iqk_info->iqk_times++; - iqk_info->version = RTW8852C_IQK_VER; - diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-137-wifi-rtw89-8851b-update-RF-radio-A-parameters-to-R28.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-137-wifi-rtw89-8851b-update-RF-radio-A-parameters-to-R28.patch deleted file mode 100644 index 916cfa843..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-137-wifi-rtw89-8851b-update-RF-radio-A-parameters-to-R28.patch +++ /dev/null @@ -1,74 +0,0 @@ -From f5993f39f3a734ba8e84913dfd69d56d997e0aa1 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Thu, 15 Jun 2023 21:04:38 +0800 -Subject: [PATCH 1/7] wifi: rtw89: 8851b: update RF radio A parameters to R28 - -Update 8851b radio A parameters to R28 along with internal HALRF_029_00_103 - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230615130442.18116-2-pkshih@realtek.com ---- - .../wireless/realtek/rtw89/rtw8851b_table.c | 28 +++++++++++++++---- - 1 file changed, 22 insertions(+), 6 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_table.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_table.c -@@ -1273,6 +1273,25 @@ static const struct rtw89_reg2_def rtw89 - {0xF0010000, 0x00000000}, - {0xF0020000, 0x00000001}, - {0xF0030000, 0x00000002}, -+ {0xF0010001, 0x00000003}, -+ {0xF0020001, 0x00000004}, -+ {0xF0030001, 0x00000005}, -+ {0xF0040001, 0x00000006}, -+ {0xF0050001, 0x00000007}, -+ {0xF0060001, 0x00000008}, -+ {0x000, 0x00000000}, -+ {0x0EF, 0x00080000}, -+ {0x033, 0x00000003}, -+ {0x03E, 0x00000150}, -+ {0x03F, 0x0000D79C}, -+ {0x0EF, 0x00000000}, -+ {0x052, 0x000C3338}, -+ {0x053, 0x000608AF}, -+ {0x054, 0x00006C04}, -+ {0x063, 0x000FC082}, -+ {0x065, 0x00018122}, -+ {0x000, 0x00010000}, -+ {0x0FE, 0x0000005A}, - {0x000, 0x00030000}, - {0x018, 0x00013124}, - {0x0EF, 0x00080000}, -@@ -1834,8 +1853,6 @@ static const struct rtw89_reg2_def rtw89 - {0x059, 0x00050033}, - {0x061, 0x0005F48A}, - {0x062, 0x00077435}, -- {0x063, 0x000F80A2}, -- {0x065, 0x00018F22}, - {0x067, 0x00008060}, - {0x07E, 0x0009780B}, - {0x0EE, 0x00000004}, -@@ -2074,9 +2091,6 @@ static const struct rtw89_reg2_def rtw89 - {0x03F, 0x0001C3C3}, - {0x0EF, 0x00000000}, - {0x051, 0x0003D368}, -- {0x052, 0x000A3338}, -- {0x053, 0x000688AF}, -- {0x054, 0x00012C04}, - {0x058, 0x00084221}, - {0x05B, 0x000EB000}, - {0x100EE, 0x00002000}, -@@ -2229,9 +2243,11 @@ static const struct rtw89_reg2_def rtw89 - {0x033, 0x00000000}, - {0x03F, 0x00000004}, - {0x0EF, 0x00000000}, -+ {0x000, 0x00010000}, -+ {0x0FE, 0x0000005A}, - {0x005, 0x00000001}, - {0x10005, 0x00000001}, -- {0x0FE, 0x00000022}, -+ {0x0FE, 0x00000028}, - }; - - static const struct rtw89_reg2_def rtw89_8851b_phy_nctl_regs[] = { diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-138-wifi-rtw89-8851b-update-TX-power-tables-to-R28.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-138-wifi-rtw89-8851b-update-TX-power-tables-to-R28.patch deleted file mode 100644 index 2322bbfff..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-138-wifi-rtw89-8851b-update-TX-power-tables-to-R28.patch +++ /dev/null @@ -1,740 +0,0 @@ -From b067acb1325abe06159768c351f149b8b621392c Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Thu, 15 Jun 2023 21:04:39 +0800 -Subject: [PATCH 2/7] wifi: rtw89: 8851b: update TX power tables to R28 - -Update 8851B TX power tables to RF version R28. - -TX power tables' changes: -* TX power limit and TX power shape: - update 5 GHz configurations for FCC and IC - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230615130442.18116-3-pkshih@realtek.com ---- - .../wireless/realtek/rtw89/rtw8851b_table.c | 220 +++++++++--------- - 1 file changed, 110 insertions(+), 110 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_table.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_table.c -@@ -3342,8 +3342,8 @@ const u8 rtw89_8851b_tx_shape[RTW89_BAND - [1][1][RTW89_ACMA] = 0, - [1][1][RTW89_CN] = 0, - [1][1][RTW89_ETSI] = 0, -- [1][1][RTW89_FCC] = 3, -- [1][1][RTW89_IC] = 3, -+ [1][1][RTW89_FCC] = 1, -+ [1][1][RTW89_IC] = 1, - [1][1][RTW89_KCC] = 0, - [1][1][RTW89_MKK] = 0, - [1][1][RTW89_UK] = 0, -@@ -4896,9 +4896,9 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_WW][42] = 30, - [0][0][1][0][RTW89_WW][44] = 30, - [0][0][1][0][RTW89_WW][46] = 30, -- [0][0][1][0][RTW89_WW][48] = 72, -- [0][0][1][0][RTW89_WW][50] = 72, -- [0][0][1][0][RTW89_WW][52] = 72, -+ [0][0][1][0][RTW89_WW][48] = 68, -+ [0][0][1][0][RTW89_WW][50] = 68, -+ [0][0][1][0][RTW89_WW][52] = 68, - [0][1][1][0][RTW89_WW][0] = 0, - [0][1][1][0][RTW89_WW][2] = 0, - [0][1][1][0][RTW89_WW][4] = 0, -@@ -4952,9 +4952,9 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_WW][42] = 30, - [0][0][2][0][RTW89_WW][44] = 30, - [0][0][2][0][RTW89_WW][46] = 30, -- [0][0][2][0][RTW89_WW][48] = 74, -- [0][0][2][0][RTW89_WW][50] = 76, -- [0][0][2][0][RTW89_WW][52] = 76, -+ [0][0][2][0][RTW89_WW][48] = 70, -+ [0][0][2][0][RTW89_WW][50] = 72, -+ [0][0][2][0][RTW89_WW][52] = 72, - [0][1][2][0][RTW89_WW][0] = 0, - [0][1][2][0][RTW89_WW][2] = 0, - [0][1][2][0][RTW89_WW][4] = 0, -@@ -5011,11 +5011,11 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_WW][48] = 0, - [0][1][2][1][RTW89_WW][50] = 0, - [0][1][2][1][RTW89_WW][52] = 0, -- [1][0][2][0][RTW89_WW][1] = 64, -+ [1][0][2][0][RTW89_WW][1] = 60, - [1][0][2][0][RTW89_WW][5] = 62, - [1][0][2][0][RTW89_WW][9] = 64, -- [1][0][2][0][RTW89_WW][13] = 64, -- [1][0][2][0][RTW89_WW][16] = 66, -+ [1][0][2][0][RTW89_WW][13] = 60, -+ [1][0][2][0][RTW89_WW][16] = 62, - [1][0][2][0][RTW89_WW][20] = 66, - [1][0][2][0][RTW89_WW][24] = 66, - [1][0][2][0][RTW89_WW][28] = 66, -@@ -5023,8 +5023,8 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_WW][36] = 76, - [1][0][2][0][RTW89_WW][39] = 30, - [1][0][2][0][RTW89_WW][43] = 30, -- [1][0][2][0][RTW89_WW][47] = 84, -- [1][0][2][0][RTW89_WW][51] = 84, -+ [1][0][2][0][RTW89_WW][47] = 80, -+ [1][0][2][0][RTW89_WW][51] = 80, - [1][1][2][0][RTW89_WW][1] = 0, - [1][1][2][0][RTW89_WW][5] = 0, - [1][1][2][0][RTW89_WW][9] = 0, -@@ -5053,13 +5053,13 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_WW][43] = 0, - [1][1][2][1][RTW89_WW][47] = 0, - [1][1][2][1][RTW89_WW][51] = 0, -- [2][0][2][0][RTW89_WW][3] = 62, -- [2][0][2][0][RTW89_WW][11] = 62, -- [2][0][2][0][RTW89_WW][18] = 64, -+ [2][0][2][0][RTW89_WW][3] = 60, -+ [2][0][2][0][RTW89_WW][11] = 58, -+ [2][0][2][0][RTW89_WW][18] = 62, - [2][0][2][0][RTW89_WW][26] = 64, - [2][0][2][0][RTW89_WW][34] = 72, - [2][0][2][0][RTW89_WW][41] = 30, -- [2][0][2][0][RTW89_WW][49] = 74, -+ [2][0][2][0][RTW89_WW][49] = 70, - [2][1][2][0][RTW89_WW][3] = 0, - [2][1][2][0][RTW89_WW][11] = 0, - [2][1][2][0][RTW89_WW][18] = 0, -@@ -5083,7 +5083,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [3][1][2][1][RTW89_WW][7] = 0, - [3][1][2][1][RTW89_WW][22] = 0, - [3][1][2][1][RTW89_WW][45] = 0, -- [0][0][1][0][RTW89_FCC][0] = 80, -+ [0][0][1][0][RTW89_FCC][0] = 76, - [0][0][1][0][RTW89_ETSI][0] = 58, - [0][0][1][0][RTW89_MKK][0] = 60, - [0][0][1][0][RTW89_IC][0] = 62, -@@ -5139,7 +5139,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][12] = 58, - [0][0][1][0][RTW89_CN][12] = 60, - [0][0][1][0][RTW89_UK][12] = 58, -- [0][0][1][0][RTW89_FCC][14] = 78, -+ [0][0][1][0][RTW89_FCC][14] = 74, - [0][0][1][0][RTW89_ETSI][14] = 58, - [0][0][1][0][RTW89_MKK][14] = 60, - [0][0][1][0][RTW89_IC][14] = 64, -@@ -5147,10 +5147,10 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][14] = 58, - [0][0][1][0][RTW89_CN][14] = 60, - [0][0][1][0][RTW89_UK][14] = 58, -- [0][0][1][0][RTW89_FCC][15] = 78, -+ [0][0][1][0][RTW89_FCC][15] = 74, - [0][0][1][0][RTW89_ETSI][15] = 58, - [0][0][1][0][RTW89_MKK][15] = 78, -- [0][0][1][0][RTW89_IC][15] = 78, -+ [0][0][1][0][RTW89_IC][15] = 74, - [0][0][1][0][RTW89_KCC][15] = 78, - [0][0][1][0][RTW89_ACMA][15] = 58, - [0][0][1][0][RTW89_CN][15] = 127, -@@ -5227,10 +5227,10 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][33] = 60, - [0][0][1][0][RTW89_CN][33] = 127, - [0][0][1][0][RTW89_UK][33] = 60, -- [0][0][1][0][RTW89_FCC][35] = 72, -+ [0][0][1][0][RTW89_FCC][35] = 68, - [0][0][1][0][RTW89_ETSI][35] = 60, - [0][0][1][0][RTW89_MKK][35] = 78, -- [0][0][1][0][RTW89_IC][35] = 72, -+ [0][0][1][0][RTW89_IC][35] = 68, - [0][0][1][0][RTW89_KCC][35] = 74, - [0][0][1][0][RTW89_ACMA][35] = 60, - [0][0][1][0][RTW89_CN][35] = 127, -@@ -5283,7 +5283,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][46] = 78, - [0][0][1][0][RTW89_CN][46] = 78, - [0][0][1][0][RTW89_UK][46] = 58, -- [0][0][1][0][RTW89_FCC][48] = 72, -+ [0][0][1][0][RTW89_FCC][48] = 68, - [0][0][1][0][RTW89_ETSI][48] = 127, - [0][0][1][0][RTW89_MKK][48] = 127, - [0][0][1][0][RTW89_IC][48] = 127, -@@ -5291,7 +5291,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][48] = 127, - [0][0][1][0][RTW89_CN][48] = 127, - [0][0][1][0][RTW89_UK][48] = 127, -- [0][0][1][0][RTW89_FCC][50] = 72, -+ [0][0][1][0][RTW89_FCC][50] = 68, - [0][0][1][0][RTW89_ETSI][50] = 127, - [0][0][1][0][RTW89_MKK][50] = 127, - [0][0][1][0][RTW89_IC][50] = 127, -@@ -5299,7 +5299,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][0][1][0][RTW89_ACMA][50] = 127, - [0][0][1][0][RTW89_CN][50] = 127, - [0][0][1][0][RTW89_UK][50] = 127, -- [0][0][1][0][RTW89_FCC][52] = 72, -+ [0][0][1][0][RTW89_FCC][52] = 68, - [0][0][1][0][RTW89_ETSI][52] = 127, - [0][0][1][0][RTW89_MKK][52] = 127, - [0][0][1][0][RTW89_IC][52] = 127, -@@ -5531,7 +5531,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][1][1][0][RTW89_ACMA][52] = 127, - [0][1][1][0][RTW89_CN][52] = 127, - [0][1][1][0][RTW89_UK][52] = 127, -- [0][0][2][0][RTW89_FCC][0] = 78, -+ [0][0][2][0][RTW89_FCC][0] = 74, - [0][0][2][0][RTW89_ETSI][0] = 62, - [0][0][2][0][RTW89_MKK][0] = 62, - [0][0][2][0][RTW89_IC][0] = 64, -@@ -5587,7 +5587,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][12] = 62, - [0][0][2][0][RTW89_CN][12] = 62, - [0][0][2][0][RTW89_UK][12] = 62, -- [0][0][2][0][RTW89_FCC][14] = 76, -+ [0][0][2][0][RTW89_FCC][14] = 72, - [0][0][2][0][RTW89_ETSI][14] = 62, - [0][0][2][0][RTW89_MKK][14] = 62, - [0][0][2][0][RTW89_IC][14] = 64, -@@ -5595,10 +5595,10 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][14] = 62, - [0][0][2][0][RTW89_CN][14] = 62, - [0][0][2][0][RTW89_UK][14] = 62, -- [0][0][2][0][RTW89_FCC][15] = 76, -+ [0][0][2][0][RTW89_FCC][15] = 72, - [0][0][2][0][RTW89_ETSI][15] = 60, - [0][0][2][0][RTW89_MKK][15] = 78, -- [0][0][2][0][RTW89_IC][15] = 76, -+ [0][0][2][0][RTW89_IC][15] = 72, - [0][0][2][0][RTW89_KCC][15] = 78, - [0][0][2][0][RTW89_ACMA][15] = 60, - [0][0][2][0][RTW89_CN][15] = 127, -@@ -5675,10 +5675,10 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][33] = 62, - [0][0][2][0][RTW89_CN][33] = 127, - [0][0][2][0][RTW89_UK][33] = 62, -- [0][0][2][0][RTW89_FCC][35] = 72, -+ [0][0][2][0][RTW89_FCC][35] = 68, - [0][0][2][0][RTW89_ETSI][35] = 62, - [0][0][2][0][RTW89_MKK][35] = 78, -- [0][0][2][0][RTW89_IC][35] = 72, -+ [0][0][2][0][RTW89_IC][35] = 68, - [0][0][2][0][RTW89_KCC][35] = 74, - [0][0][2][0][RTW89_ACMA][35] = 62, - [0][0][2][0][RTW89_CN][35] = 127, -@@ -5731,7 +5731,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][46] = 78, - [0][0][2][0][RTW89_CN][46] = 78, - [0][0][2][0][RTW89_UK][46] = 60, -- [0][0][2][0][RTW89_FCC][48] = 74, -+ [0][0][2][0][RTW89_FCC][48] = 70, - [0][0][2][0][RTW89_ETSI][48] = 127, - [0][0][2][0][RTW89_MKK][48] = 127, - [0][0][2][0][RTW89_IC][48] = 127, -@@ -5739,7 +5739,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][48] = 127, - [0][0][2][0][RTW89_CN][48] = 127, - [0][0][2][0][RTW89_UK][48] = 127, -- [0][0][2][0][RTW89_FCC][50] = 76, -+ [0][0][2][0][RTW89_FCC][50] = 72, - [0][0][2][0][RTW89_ETSI][50] = 127, - [0][0][2][0][RTW89_MKK][50] = 127, - [0][0][2][0][RTW89_IC][50] = 127, -@@ -5747,7 +5747,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][0][2][0][RTW89_ACMA][50] = 127, - [0][0][2][0][RTW89_CN][50] = 127, - [0][0][2][0][RTW89_UK][50] = 127, -- [0][0][2][0][RTW89_FCC][52] = 76, -+ [0][0][2][0][RTW89_FCC][52] = 72, - [0][0][2][0][RTW89_ETSI][52] = 127, - [0][0][2][0][RTW89_MKK][52] = 127, - [0][0][2][0][RTW89_IC][52] = 127, -@@ -6203,10 +6203,10 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [0][1][2][1][RTW89_ACMA][52] = 127, - [0][1][2][1][RTW89_CN][52] = 127, - [0][1][2][1][RTW89_UK][52] = 127, -- [1][0][2][0][RTW89_FCC][1] = 68, -+ [1][0][2][0][RTW89_FCC][1] = 64, - [1][0][2][0][RTW89_ETSI][1] = 64, - [1][0][2][0][RTW89_MKK][1] = 64, -- [1][0][2][0][RTW89_IC][1] = 64, -+ [1][0][2][0][RTW89_IC][1] = 60, - [1][0][2][0][RTW89_KCC][1] = 74, - [1][0][2][0][RTW89_ACMA][1] = 64, - [1][0][2][0][RTW89_CN][1] = 64, -@@ -6227,18 +6227,18 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_ACMA][9] = 64, - [1][0][2][0][RTW89_CN][9] = 64, - [1][0][2][0][RTW89_UK][9] = 64, -- [1][0][2][0][RTW89_FCC][13] = 66, -+ [1][0][2][0][RTW89_FCC][13] = 62, - [1][0][2][0][RTW89_ETSI][13] = 64, - [1][0][2][0][RTW89_MKK][13] = 64, -- [1][0][2][0][RTW89_IC][13] = 64, -+ [1][0][2][0][RTW89_IC][13] = 60, - [1][0][2][0][RTW89_KCC][13] = 72, - [1][0][2][0][RTW89_ACMA][13] = 64, - [1][0][2][0][RTW89_CN][13] = 64, - [1][0][2][0][RTW89_UK][13] = 64, -- [1][0][2][0][RTW89_FCC][16] = 66, -+ [1][0][2][0][RTW89_FCC][16] = 62, - [1][0][2][0][RTW89_ETSI][16] = 66, - [1][0][2][0][RTW89_MKK][16] = 80, -- [1][0][2][0][RTW89_IC][16] = 66, -+ [1][0][2][0][RTW89_IC][16] = 62, - [1][0][2][0][RTW89_KCC][16] = 74, - [1][0][2][0][RTW89_ACMA][16] = 66, - [1][0][2][0][RTW89_CN][16] = 127, -@@ -6246,7 +6246,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_FCC][20] = 80, - [1][0][2][0][RTW89_ETSI][20] = 66, - [1][0][2][0][RTW89_MKK][20] = 80, -- [1][0][2][0][RTW89_IC][20] = 80, -+ [1][0][2][0][RTW89_IC][20] = 76, - [1][0][2][0][RTW89_KCC][20] = 74, - [1][0][2][0][RTW89_ACMA][20] = 66, - [1][0][2][0][RTW89_CN][20] = 127, -@@ -6267,10 +6267,10 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_ACMA][28] = 127, - [1][0][2][0][RTW89_CN][28] = 127, - [1][0][2][0][RTW89_UK][28] = 66, -- [1][0][2][0][RTW89_FCC][32] = 76, -+ [1][0][2][0][RTW89_FCC][32] = 72, - [1][0][2][0][RTW89_ETSI][32] = 66, - [1][0][2][0][RTW89_MKK][32] = 80, -- [1][0][2][0][RTW89_IC][32] = 76, -+ [1][0][2][0][RTW89_IC][32] = 72, - [1][0][2][0][RTW89_KCC][32] = 78, - [1][0][2][0][RTW89_ACMA][32] = 66, - [1][0][2][0][RTW89_CN][32] = 127, -@@ -6286,7 +6286,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_FCC][39] = 84, - [1][0][2][0][RTW89_ETSI][39] = 30, - [1][0][2][0][RTW89_MKK][39] = 127, -- [1][0][2][0][RTW89_IC][39] = 84, -+ [1][0][2][0][RTW89_IC][39] = 80, - [1][0][2][0][RTW89_KCC][39] = 68, - [1][0][2][0][RTW89_ACMA][39] = 80, - [1][0][2][0][RTW89_CN][39] = 70, -@@ -6299,7 +6299,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_ACMA][43] = 80, - [1][0][2][0][RTW89_CN][43] = 80, - [1][0][2][0][RTW89_UK][43] = 64, -- [1][0][2][0][RTW89_FCC][47] = 84, -+ [1][0][2][0][RTW89_FCC][47] = 80, - [1][0][2][0][RTW89_ETSI][47] = 127, - [1][0][2][0][RTW89_MKK][47] = 127, - [1][0][2][0][RTW89_IC][47] = 127, -@@ -6307,7 +6307,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [1][0][2][0][RTW89_ACMA][47] = 127, - [1][0][2][0][RTW89_CN][47] = 127, - [1][0][2][0][RTW89_UK][47] = 127, -- [1][0][2][0][RTW89_FCC][51] = 84, -+ [1][0][2][0][RTW89_FCC][51] = 80, - [1][0][2][0][RTW89_ETSI][51] = 127, - [1][0][2][0][RTW89_MKK][51] = 127, - [1][0][2][0][RTW89_IC][51] = 127, -@@ -6539,26 +6539,26 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [1][1][2][1][RTW89_ACMA][51] = 127, - [1][1][2][1][RTW89_CN][51] = 127, - [1][1][2][1][RTW89_UK][51] = 127, -- [2][0][2][0][RTW89_FCC][3] = 76, -+ [2][0][2][0][RTW89_FCC][3] = 72, - [2][0][2][0][RTW89_ETSI][3] = 64, - [2][0][2][0][RTW89_MKK][3] = 62, -- [2][0][2][0][RTW89_IC][3] = 64, -+ [2][0][2][0][RTW89_IC][3] = 60, - [2][0][2][0][RTW89_KCC][3] = 72, - [2][0][2][0][RTW89_ACMA][3] = 64, - [2][0][2][0][RTW89_CN][3] = 64, - [2][0][2][0][RTW89_UK][3] = 64, -- [2][0][2][0][RTW89_FCC][11] = 64, -+ [2][0][2][0][RTW89_FCC][11] = 60, - [2][0][2][0][RTW89_ETSI][11] = 64, - [2][0][2][0][RTW89_MKK][11] = 64, -- [2][0][2][0][RTW89_IC][11] = 62, -+ [2][0][2][0][RTW89_IC][11] = 58, - [2][0][2][0][RTW89_KCC][11] = 72, - [2][0][2][0][RTW89_ACMA][11] = 64, - [2][0][2][0][RTW89_CN][11] = 64, - [2][0][2][0][RTW89_UK][11] = 64, -- [2][0][2][0][RTW89_FCC][18] = 66, -+ [2][0][2][0][RTW89_FCC][18] = 62, - [2][0][2][0][RTW89_ETSI][18] = 64, - [2][0][2][0][RTW89_MKK][18] = 72, -- [2][0][2][0][RTW89_IC][18] = 66, -+ [2][0][2][0][RTW89_IC][18] = 62, - [2][0][2][0][RTW89_KCC][18] = 72, - [2][0][2][0][RTW89_ACMA][18] = 64, - [2][0][2][0][RTW89_CN][18] = 127, -@@ -6574,7 +6574,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [2][0][2][0][RTW89_FCC][34] = 76, - [2][0][2][0][RTW89_ETSI][34] = 127, - [2][0][2][0][RTW89_MKK][34] = 72, -- [2][0][2][0][RTW89_IC][34] = 76, -+ [2][0][2][0][RTW89_IC][34] = 72, - [2][0][2][0][RTW89_KCC][34] = 72, - [2][0][2][0][RTW89_ACMA][34] = 72, - [2][0][2][0][RTW89_CN][34] = 127, -@@ -6582,12 +6582,12 @@ const s8 rtw89_8851b_txpwr_lmt_5g[RTW89_ - [2][0][2][0][RTW89_FCC][41] = 76, - [2][0][2][0][RTW89_ETSI][41] = 30, - [2][0][2][0][RTW89_MKK][41] = 127, -- [2][0][2][0][RTW89_IC][41] = 76, -+ [2][0][2][0][RTW89_IC][41] = 72, - [2][0][2][0][RTW89_KCC][41] = 64, - [2][0][2][0][RTW89_ACMA][41] = 72, - [2][0][2][0][RTW89_CN][41] = 72, - [2][0][2][0][RTW89_UK][41] = 64, -- [2][0][2][0][RTW89_FCC][49] = 74, -+ [2][0][2][0][RTW89_FCC][49] = 70, - [2][0][2][0][RTW89_ETSI][49] = 127, - [2][0][2][0][RTW89_MKK][49] = 127, - [2][0][2][0][RTW89_IC][49] = 127, -@@ -10606,9 +10606,9 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][0][1][0][RTW89_WW][42] = 30, - [0][0][1][0][RTW89_WW][44] = 30, - [0][0][1][0][RTW89_WW][46] = 30, -- [0][0][1][0][RTW89_WW][48] = 72, -- [0][0][1][0][RTW89_WW][50] = 72, -- [0][0][1][0][RTW89_WW][52] = 72, -+ [0][0][1][0][RTW89_WW][48] = 68, -+ [0][0][1][0][RTW89_WW][50] = 68, -+ [0][0][1][0][RTW89_WW][52] = 68, - [0][1][1][0][RTW89_WW][0] = 0, - [0][1][1][0][RTW89_WW][2] = 0, - [0][1][1][0][RTW89_WW][4] = 0, -@@ -10662,9 +10662,9 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][0][2][0][RTW89_WW][42] = 30, - [0][0][2][0][RTW89_WW][44] = 30, - [0][0][2][0][RTW89_WW][46] = 30, -- [0][0][2][0][RTW89_WW][48] = 74, -- [0][0][2][0][RTW89_WW][50] = 74, -- [0][0][2][0][RTW89_WW][52] = 74, -+ [0][0][2][0][RTW89_WW][48] = 70, -+ [0][0][2][0][RTW89_WW][50] = 70, -+ [0][0][2][0][RTW89_WW][52] = 70, - [0][1][2][0][RTW89_WW][0] = 0, - [0][1][2][0][RTW89_WW][2] = 0, - [0][1][2][0][RTW89_WW][4] = 0, -@@ -10721,11 +10721,11 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][1][2][1][RTW89_WW][48] = 0, - [0][1][2][1][RTW89_WW][50] = 0, - [0][1][2][1][RTW89_WW][52] = 0, -- [1][0][2][0][RTW89_WW][1] = 64, -+ [1][0][2][0][RTW89_WW][1] = 60, - [1][0][2][0][RTW89_WW][5] = 62, - [1][0][2][0][RTW89_WW][9] = 64, -- [1][0][2][0][RTW89_WW][13] = 64, -- [1][0][2][0][RTW89_WW][16] = 66, -+ [1][0][2][0][RTW89_WW][13] = 60, -+ [1][0][2][0][RTW89_WW][16] = 62, - [1][0][2][0][RTW89_WW][20] = 66, - [1][0][2][0][RTW89_WW][24] = 66, - [1][0][2][0][RTW89_WW][28] = 66, -@@ -10733,8 +10733,8 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [1][0][2][0][RTW89_WW][36] = 76, - [1][0][2][0][RTW89_WW][39] = 30, - [1][0][2][0][RTW89_WW][43] = 30, -- [1][0][2][0][RTW89_WW][47] = 80, -- [1][0][2][0][RTW89_WW][51] = 80, -+ [1][0][2][0][RTW89_WW][47] = 76, -+ [1][0][2][0][RTW89_WW][51] = 76, - [1][1][2][0][RTW89_WW][1] = 0, - [1][1][2][0][RTW89_WW][5] = 0, - [1][1][2][0][RTW89_WW][9] = 0, -@@ -10763,13 +10763,13 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [1][1][2][1][RTW89_WW][43] = 0, - [1][1][2][1][RTW89_WW][47] = 0, - [1][1][2][1][RTW89_WW][51] = 0, -- [2][0][2][0][RTW89_WW][3] = 62, -- [2][0][2][0][RTW89_WW][11] = 62, -- [2][0][2][0][RTW89_WW][18] = 64, -+ [2][0][2][0][RTW89_WW][3] = 60, -+ [2][0][2][0][RTW89_WW][11] = 58, -+ [2][0][2][0][RTW89_WW][18] = 62, - [2][0][2][0][RTW89_WW][26] = 64, - [2][0][2][0][RTW89_WW][34] = 68, - [2][0][2][0][RTW89_WW][41] = 30, -- [2][0][2][0][RTW89_WW][49] = 72, -+ [2][0][2][0][RTW89_WW][49] = 68, - [2][1][2][0][RTW89_WW][3] = 0, - [2][1][2][0][RTW89_WW][11] = 0, - [2][1][2][0][RTW89_WW][18] = 0, -@@ -10793,7 +10793,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [3][1][2][1][RTW89_WW][7] = 0, - [3][1][2][1][RTW89_WW][22] = 0, - [3][1][2][1][RTW89_WW][45] = 0, -- [0][0][1][0][RTW89_FCC][0] = 78, -+ [0][0][1][0][RTW89_FCC][0] = 74, - [0][0][1][0][RTW89_ETSI][0] = 58, - [0][0][1][0][RTW89_MKK][0] = 60, - [0][0][1][0][RTW89_IC][0] = 62, -@@ -10849,7 +10849,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][0][1][0][RTW89_ACMA][12] = 58, - [0][0][1][0][RTW89_CN][12] = 60, - [0][0][1][0][RTW89_UK][12] = 58, -- [0][0][1][0][RTW89_FCC][14] = 76, -+ [0][0][1][0][RTW89_FCC][14] = 72, - [0][0][1][0][RTW89_ETSI][14] = 58, - [0][0][1][0][RTW89_MKK][14] = 60, - [0][0][1][0][RTW89_IC][14] = 62, -@@ -10857,10 +10857,10 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][0][1][0][RTW89_ACMA][14] = 58, - [0][0][1][0][RTW89_CN][14] = 60, - [0][0][1][0][RTW89_UK][14] = 58, -- [0][0][1][0][RTW89_FCC][15] = 76, -+ [0][0][1][0][RTW89_FCC][15] = 72, - [0][0][1][0][RTW89_ETSI][15] = 58, - [0][0][1][0][RTW89_MKK][15] = 74, -- [0][0][1][0][RTW89_IC][15] = 76, -+ [0][0][1][0][RTW89_IC][15] = 72, - [0][0][1][0][RTW89_KCC][15] = 74, - [0][0][1][0][RTW89_ACMA][15] = 58, - [0][0][1][0][RTW89_CN][15] = 127, -@@ -10937,10 +10937,10 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][0][1][0][RTW89_ACMA][33] = 60, - [0][0][1][0][RTW89_CN][33] = 127, - [0][0][1][0][RTW89_UK][33] = 60, -- [0][0][1][0][RTW89_FCC][35] = 70, -+ [0][0][1][0][RTW89_FCC][35] = 66, - [0][0][1][0][RTW89_ETSI][35] = 60, - [0][0][1][0][RTW89_MKK][35] = 74, -- [0][0][1][0][RTW89_IC][35] = 70, -+ [0][0][1][0][RTW89_IC][35] = 66, - [0][0][1][0][RTW89_KCC][35] = 74, - [0][0][1][0][RTW89_ACMA][35] = 60, - [0][0][1][0][RTW89_CN][35] = 127, -@@ -10993,7 +10993,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][0][1][0][RTW89_ACMA][46] = 74, - [0][0][1][0][RTW89_CN][46] = 74, - [0][0][1][0][RTW89_UK][46] = 58, -- [0][0][1][0][RTW89_FCC][48] = 72, -+ [0][0][1][0][RTW89_FCC][48] = 68, - [0][0][1][0][RTW89_ETSI][48] = 127, - [0][0][1][0][RTW89_MKK][48] = 127, - [0][0][1][0][RTW89_IC][48] = 127, -@@ -11001,7 +11001,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][0][1][0][RTW89_ACMA][48] = 127, - [0][0][1][0][RTW89_CN][48] = 127, - [0][0][1][0][RTW89_UK][48] = 127, -- [0][0][1][0][RTW89_FCC][50] = 72, -+ [0][0][1][0][RTW89_FCC][50] = 68, - [0][0][1][0][RTW89_ETSI][50] = 127, - [0][0][1][0][RTW89_MKK][50] = 127, - [0][0][1][0][RTW89_IC][50] = 127, -@@ -11009,7 +11009,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][0][1][0][RTW89_ACMA][50] = 127, - [0][0][1][0][RTW89_CN][50] = 127, - [0][0][1][0][RTW89_UK][50] = 127, -- [0][0][1][0][RTW89_FCC][52] = 72, -+ [0][0][1][0][RTW89_FCC][52] = 68, - [0][0][1][0][RTW89_ETSI][52] = 127, - [0][0][1][0][RTW89_MKK][52] = 127, - [0][0][1][0][RTW89_IC][52] = 127, -@@ -11241,7 +11241,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][1][1][0][RTW89_ACMA][52] = 127, - [0][1][1][0][RTW89_CN][52] = 127, - [0][1][1][0][RTW89_UK][52] = 127, -- [0][0][2][0][RTW89_FCC][0] = 76, -+ [0][0][2][0][RTW89_FCC][0] = 72, - [0][0][2][0][RTW89_ETSI][0] = 62, - [0][0][2][0][RTW89_MKK][0] = 62, - [0][0][2][0][RTW89_IC][0] = 64, -@@ -11297,7 +11297,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][0][2][0][RTW89_ACMA][12] = 62, - [0][0][2][0][RTW89_CN][12] = 62, - [0][0][2][0][RTW89_UK][12] = 62, -- [0][0][2][0][RTW89_FCC][14] = 74, -+ [0][0][2][0][RTW89_FCC][14] = 70, - [0][0][2][0][RTW89_ETSI][14] = 62, - [0][0][2][0][RTW89_MKK][14] = 62, - [0][0][2][0][RTW89_IC][14] = 64, -@@ -11305,10 +11305,10 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][0][2][0][RTW89_ACMA][14] = 62, - [0][0][2][0][RTW89_CN][14] = 62, - [0][0][2][0][RTW89_UK][14] = 62, -- [0][0][2][0][RTW89_FCC][15] = 74, -+ [0][0][2][0][RTW89_FCC][15] = 70, - [0][0][2][0][RTW89_ETSI][15] = 60, - [0][0][2][0][RTW89_MKK][15] = 74, -- [0][0][2][0][RTW89_IC][15] = 74, -+ [0][0][2][0][RTW89_IC][15] = 70, - [0][0][2][0][RTW89_KCC][15] = 74, - [0][0][2][0][RTW89_ACMA][15] = 60, - [0][0][2][0][RTW89_CN][15] = 127, -@@ -11385,10 +11385,10 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][0][2][0][RTW89_ACMA][33] = 62, - [0][0][2][0][RTW89_CN][33] = 127, - [0][0][2][0][RTW89_UK][33] = 62, -- [0][0][2][0][RTW89_FCC][35] = 72, -+ [0][0][2][0][RTW89_FCC][35] = 68, - [0][0][2][0][RTW89_ETSI][35] = 62, - [0][0][2][0][RTW89_MKK][35] = 74, -- [0][0][2][0][RTW89_IC][35] = 72, -+ [0][0][2][0][RTW89_IC][35] = 68, - [0][0][2][0][RTW89_KCC][35] = 74, - [0][0][2][0][RTW89_ACMA][35] = 62, - [0][0][2][0][RTW89_CN][35] = 127, -@@ -11441,7 +11441,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][0][2][0][RTW89_ACMA][46] = 74, - [0][0][2][0][RTW89_CN][46] = 74, - [0][0][2][0][RTW89_UK][46] = 60, -- [0][0][2][0][RTW89_FCC][48] = 74, -+ [0][0][2][0][RTW89_FCC][48] = 70, - [0][0][2][0][RTW89_ETSI][48] = 127, - [0][0][2][0][RTW89_MKK][48] = 127, - [0][0][2][0][RTW89_IC][48] = 127, -@@ -11449,7 +11449,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][0][2][0][RTW89_ACMA][48] = 127, - [0][0][2][0][RTW89_CN][48] = 127, - [0][0][2][0][RTW89_UK][48] = 127, -- [0][0][2][0][RTW89_FCC][50] = 74, -+ [0][0][2][0][RTW89_FCC][50] = 70, - [0][0][2][0][RTW89_ETSI][50] = 127, - [0][0][2][0][RTW89_MKK][50] = 127, - [0][0][2][0][RTW89_IC][50] = 127, -@@ -11457,7 +11457,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][0][2][0][RTW89_ACMA][50] = 127, - [0][0][2][0][RTW89_CN][50] = 127, - [0][0][2][0][RTW89_UK][50] = 127, -- [0][0][2][0][RTW89_FCC][52] = 74, -+ [0][0][2][0][RTW89_FCC][52] = 70, - [0][0][2][0][RTW89_ETSI][52] = 127, - [0][0][2][0][RTW89_MKK][52] = 127, - [0][0][2][0][RTW89_IC][52] = 127, -@@ -11913,10 +11913,10 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [0][1][2][1][RTW89_ACMA][52] = 127, - [0][1][2][1][RTW89_CN][52] = 127, - [0][1][2][1][RTW89_UK][52] = 127, -- [1][0][2][0][RTW89_FCC][1] = 66, -+ [1][0][2][0][RTW89_FCC][1] = 62, - [1][0][2][0][RTW89_ETSI][1] = 64, - [1][0][2][0][RTW89_MKK][1] = 64, -- [1][0][2][0][RTW89_IC][1] = 64, -+ [1][0][2][0][RTW89_IC][1] = 60, - [1][0][2][0][RTW89_KCC][1] = 74, - [1][0][2][0][RTW89_ACMA][1] = 64, - [1][0][2][0][RTW89_CN][1] = 64, -@@ -11937,18 +11937,18 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [1][0][2][0][RTW89_ACMA][9] = 64, - [1][0][2][0][RTW89_CN][9] = 64, - [1][0][2][0][RTW89_UK][9] = 64, -- [1][0][2][0][RTW89_FCC][13] = 64, -+ [1][0][2][0][RTW89_FCC][13] = 60, - [1][0][2][0][RTW89_ETSI][13] = 64, - [1][0][2][0][RTW89_MKK][13] = 64, -- [1][0][2][0][RTW89_IC][13] = 64, -+ [1][0][2][0][RTW89_IC][13] = 60, - [1][0][2][0][RTW89_KCC][13] = 72, - [1][0][2][0][RTW89_ACMA][13] = 64, - [1][0][2][0][RTW89_CN][13] = 64, - [1][0][2][0][RTW89_UK][13] = 64, -- [1][0][2][0][RTW89_FCC][16] = 66, -+ [1][0][2][0][RTW89_FCC][16] = 62, - [1][0][2][0][RTW89_ETSI][16] = 66, - [1][0][2][0][RTW89_MKK][16] = 76, -- [1][0][2][0][RTW89_IC][16] = 66, -+ [1][0][2][0][RTW89_IC][16] = 62, - [1][0][2][0][RTW89_KCC][16] = 74, - [1][0][2][0][RTW89_ACMA][16] = 66, - [1][0][2][0][RTW89_CN][16] = 127, -@@ -11956,7 +11956,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [1][0][2][0][RTW89_FCC][20] = 80, - [1][0][2][0][RTW89_ETSI][20] = 66, - [1][0][2][0][RTW89_MKK][20] = 76, -- [1][0][2][0][RTW89_IC][20] = 80, -+ [1][0][2][0][RTW89_IC][20] = 76, - [1][0][2][0][RTW89_KCC][20] = 74, - [1][0][2][0][RTW89_ACMA][20] = 66, - [1][0][2][0][RTW89_CN][20] = 127, -@@ -11977,10 +11977,10 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [1][0][2][0][RTW89_ACMA][28] = 127, - [1][0][2][0][RTW89_CN][28] = 127, - [1][0][2][0][RTW89_UK][28] = 66, -- [1][0][2][0][RTW89_FCC][32] = 74, -+ [1][0][2][0][RTW89_FCC][32] = 70, - [1][0][2][0][RTW89_ETSI][32] = 66, - [1][0][2][0][RTW89_MKK][32] = 76, -- [1][0][2][0][RTW89_IC][32] = 74, -+ [1][0][2][0][RTW89_IC][32] = 70, - [1][0][2][0][RTW89_KCC][32] = 76, - [1][0][2][0][RTW89_ACMA][32] = 66, - [1][0][2][0][RTW89_CN][32] = 127, -@@ -11996,7 +11996,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [1][0][2][0][RTW89_FCC][39] = 80, - [1][0][2][0][RTW89_ETSI][39] = 30, - [1][0][2][0][RTW89_MKK][39] = 127, -- [1][0][2][0][RTW89_IC][39] = 80, -+ [1][0][2][0][RTW89_IC][39] = 76, - [1][0][2][0][RTW89_KCC][39] = 68, - [1][0][2][0][RTW89_ACMA][39] = 76, - [1][0][2][0][RTW89_CN][39] = 70, -@@ -12009,7 +12009,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [1][0][2][0][RTW89_ACMA][43] = 76, - [1][0][2][0][RTW89_CN][43] = 76, - [1][0][2][0][RTW89_UK][43] = 64, -- [1][0][2][0][RTW89_FCC][47] = 80, -+ [1][0][2][0][RTW89_FCC][47] = 76, - [1][0][2][0][RTW89_ETSI][47] = 127, - [1][0][2][0][RTW89_MKK][47] = 127, - [1][0][2][0][RTW89_IC][47] = 127, -@@ -12017,7 +12017,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [1][0][2][0][RTW89_ACMA][47] = 127, - [1][0][2][0][RTW89_CN][47] = 127, - [1][0][2][0][RTW89_UK][47] = 127, -- [1][0][2][0][RTW89_FCC][51] = 80, -+ [1][0][2][0][RTW89_FCC][51] = 76, - [1][0][2][0][RTW89_ETSI][51] = 127, - [1][0][2][0][RTW89_MKK][51] = 127, - [1][0][2][0][RTW89_IC][51] = 127, -@@ -12249,26 +12249,26 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [1][1][2][1][RTW89_ACMA][51] = 127, - [1][1][2][1][RTW89_CN][51] = 127, - [1][1][2][1][RTW89_UK][51] = 127, -- [2][0][2][0][RTW89_FCC][3] = 72, -+ [2][0][2][0][RTW89_FCC][3] = 68, - [2][0][2][0][RTW89_ETSI][3] = 64, - [2][0][2][0][RTW89_MKK][3] = 62, -- [2][0][2][0][RTW89_IC][3] = 64, -+ [2][0][2][0][RTW89_IC][3] = 60, - [2][0][2][0][RTW89_KCC][3] = 68, - [2][0][2][0][RTW89_ACMA][3] = 64, - [2][0][2][0][RTW89_CN][3] = 64, - [2][0][2][0][RTW89_UK][3] = 64, -- [2][0][2][0][RTW89_FCC][11] = 62, -+ [2][0][2][0][RTW89_FCC][11] = 58, - [2][0][2][0][RTW89_ETSI][11] = 64, - [2][0][2][0][RTW89_MKK][11] = 64, -- [2][0][2][0][RTW89_IC][11] = 62, -+ [2][0][2][0][RTW89_IC][11] = 58, - [2][0][2][0][RTW89_KCC][11] = 68, - [2][0][2][0][RTW89_ACMA][11] = 64, - [2][0][2][0][RTW89_CN][11] = 64, - [2][0][2][0][RTW89_UK][11] = 64, -- [2][0][2][0][RTW89_FCC][18] = 66, -+ [2][0][2][0][RTW89_FCC][18] = 62, - [2][0][2][0][RTW89_ETSI][18] = 64, - [2][0][2][0][RTW89_MKK][18] = 68, -- [2][0][2][0][RTW89_IC][18] = 66, -+ [2][0][2][0][RTW89_IC][18] = 62, - [2][0][2][0][RTW89_KCC][18] = 68, - [2][0][2][0][RTW89_ACMA][18] = 64, - [2][0][2][0][RTW89_CN][18] = 127, -@@ -12284,7 +12284,7 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [2][0][2][0][RTW89_FCC][34] = 72, - [2][0][2][0][RTW89_ETSI][34] = 127, - [2][0][2][0][RTW89_MKK][34] = 68, -- [2][0][2][0][RTW89_IC][34] = 72, -+ [2][0][2][0][RTW89_IC][34] = 68, - [2][0][2][0][RTW89_KCC][34] = 68, - [2][0][2][0][RTW89_ACMA][34] = 68, - [2][0][2][0][RTW89_CN][34] = 127, -@@ -12292,12 +12292,12 @@ const s8 rtw89_8851b_txpwr_lmt_5g_type2[ - [2][0][2][0][RTW89_FCC][41] = 72, - [2][0][2][0][RTW89_ETSI][41] = 30, - [2][0][2][0][RTW89_MKK][41] = 127, -- [2][0][2][0][RTW89_IC][41] = 72, -+ [2][0][2][0][RTW89_IC][41] = 68, - [2][0][2][0][RTW89_KCC][41] = 64, - [2][0][2][0][RTW89_ACMA][41] = 68, - [2][0][2][0][RTW89_CN][41] = 68, - [2][0][2][0][RTW89_UK][41] = 64, -- [2][0][2][0][RTW89_FCC][49] = 72, -+ [2][0][2][0][RTW89_FCC][49] = 68, - [2][0][2][0][RTW89_ETSI][49] = 127, - [2][0][2][0][RTW89_MKK][49] = 127, - [2][0][2][0][RTW89_IC][49] = 127, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-139-wifi-rtw89-8851b-rfk-add-LCK-track.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-139-wifi-rtw89-8851b-rfk-add-LCK-track.patch deleted file mode 100644 index ba8e45291..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-139-wifi-rtw89-8851b-rfk-add-LCK-track.patch +++ /dev/null @@ -1,154 +0,0 @@ -From b686bc67e0437eb5791bca6ec89479470ef40513 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Thu, 15 Jun 2023 21:04:40 +0800 -Subject: [PATCH 3/7] wifi: rtw89: 8851b: rfk: add LCK track - -LCK is short for LC Tank calibration. To keep RF performance, do this -calibration if difference of thermal value is over a threshold. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230615130442.18116-4-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 1 + - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 2 + - .../net/wireless/realtek/rtw89/rtw8851b_rfk.c | 65 ++++++++++++++++++- - .../net/wireless/realtek/rtw89/rtw8851b_rfk.h | 2 + - 4 files changed, 69 insertions(+), 1 deletion(-) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3834,6 +3834,7 @@ - #define RR_LCKST_BIN BIT(0) - #define RR_LCK_TRG 0xd3 - #define RR_LCK_TRGSEL BIT(8) -+#define RR_LCK_ST BIT(4) - #define RR_MMD 0xd5 - #define RR_MMD_RST_EN BIT(8) - #define RR_MMD_RST_SYN BIT(6) ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -1546,6 +1546,7 @@ static void rtw8851b_rfk_init(struct rtw - { - rtwdev->is_tssi_mode[RF_PATH_A] = false; - rtwdev->is_tssi_mode[RF_PATH_B] = false; -+ rtw8851b_lck_init(rtwdev); - - rtw8851b_dpk_init(rtwdev); - rtw8851b_aack(rtwdev); -@@ -1578,6 +1579,7 @@ static void rtw8851b_rfk_scan(struct rtw - static void rtw8851b_rfk_track(struct rtw89_dev *rtwdev) - { - rtw8851b_dpk_track(rtwdev); -+ rtw8851b_lck_track(rtwdev); - } - - static u32 rtw8851b_bb_cal_txpwr_ref(struct rtw89_dev *rtwdev, ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -@@ -118,6 +118,8 @@ static const u32 dpk_kip_reg[DPK_KIP_REG - 0x813c, 0x8124, 0xc0ec, 0xc0e8, 0xc0c4, 0xc0d4, 0xc0d8}; - static const u32 dpk_rf_reg[DPK_RF_REG_NUM_8851B] = {0xde, 0x8f, 0x5, 0x10005}; - -+static void _set_ch(struct rtw89_dev *rtwdev, u32 val); -+ - static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) - { - return RF_A; -@@ -3133,7 +3135,7 @@ void rtw8851b_dpk_init(struct rtw89_dev - - void rtw8851b_aack(struct rtw89_dev *rtwdev) - { -- u32 tmp05, ib[4]; -+ u32 tmp05, tmpd3, ib[4]; - u32 tmp; - int ret; - int rek; -@@ -3142,8 +3144,10 @@ void rtw8851b_aack(struct rtw89_dev *rtw - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]DO AACK\n"); - - tmp05 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_RSV1, RFREG_MASK); -+ tmpd3 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RFREG_MASK); - rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RR_MOD_MASK, 0x3); - rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RFREG_MASK, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RR_LCK_ST, 0x0); - - for (rek = 0; rek < 4; rek++) { - rtw89_write_rf(rtwdev, RF_PATH_A, RR_AACK, RFREG_MASK, 0x8201e); -@@ -3171,6 +3175,65 @@ void rtw8851b_aack(struct rtw89_dev *rtw - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]AACK rek = %d\n", rek); - - rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RFREG_MASK, tmp05); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RFREG_MASK, tmpd3); -+} -+ -+static void _lck_keep_thermal(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_lck_info *lck = &rtwdev->lck; -+ -+ lck->thermal[RF_PATH_A] = -+ ewma_thermal_read(&rtwdev->phystat.avg_thermal[RF_PATH_A]); -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[LCK] path=%d thermal=0x%x", RF_PATH_A, lck->thermal[RF_PATH_A]); -+} -+ -+static void rtw8851b_lck(struct rtw89_dev *rtwdev) -+{ -+ u32 tmp05, tmp18, tmpd3; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, "[LCK]DO LCK\n"); -+ -+ tmp05 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_RSV1, RFREG_MASK); -+ tmp18 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_CFGCH, RFREG_MASK); -+ tmpd3 = rtw89_read_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RFREG_MASK); -+ -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RR_MOD_MASK, 0x3); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RFREG_MASK, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RR_LCK_TRGSEL, 0x1); -+ -+ _set_ch(rtwdev, tmp18); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LCK_TRG, RFREG_MASK, tmpd3); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_RSV1, RFREG_MASK, tmp05); -+ -+ _lck_keep_thermal(rtwdev); -+} -+ -+#define RTW8851B_LCK_TH 8 -+ -+void rtw8851b_lck_track(struct rtw89_dev *rtwdev) -+{ -+ struct rtw89_lck_info *lck = &rtwdev->lck; -+ u8 cur_thermal; -+ int delta; -+ -+ cur_thermal = -+ ewma_thermal_read(&rtwdev->phystat.avg_thermal[RF_PATH_A]); -+ delta = abs((int)cur_thermal - lck->thermal[RF_PATH_A]); -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK_TRACK, -+ "[LCK] path=%d current thermal=0x%x delta=0x%x\n", -+ RF_PATH_A, cur_thermal, delta); -+ -+ if (delta >= RTW8851B_LCK_TH) { -+ rtw8851b_aack(rtwdev); -+ rtw8851b_lck(rtwdev); -+ } -+} -+ -+void rtw8851b_lck_init(struct rtw89_dev *rtwdev) -+{ -+ _lck_keep_thermal(rtwdev); - } - - void rtw8851b_rck(struct rtw89_dev *rtwdev) ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.h -@@ -8,6 +8,8 @@ - #include "core.h" - - void rtw8851b_aack(struct rtw89_dev *rtwdev); -+void rtw8851b_lck_init(struct rtw89_dev *rtwdev); -+void rtw8851b_lck_track(struct rtw89_dev *rtwdev); - void rtw8851b_rck(struct rtw89_dev *rtwdev); - void rtw8851b_dack(struct rtw89_dev *rtwdev); - void rtw8851b_iqk(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-140-wifi-rtw89-8851b-rfk-update-IQK-to-version-0x8.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-140-wifi-rtw89-8851b-rfk-update-IQK-to-version-0x8.patch deleted file mode 100644 index dae91af6b..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-140-wifi-rtw89-8851b-rfk-update-IQK-to-version-0x8.patch +++ /dev/null @@ -1,253 +0,0 @@ -From 76a7c7acaa78b1a4ab59868808fadbeb7a939b81 Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Thu, 15 Jun 2023 21:04:41 +0800 -Subject: [PATCH 4/7] wifi: rtw89: 8851b: rfk: update IQK to version 0x8 - -The main change is to adjust RX calibration groups from {0,1,2,3} to {0,2} -in 5 GHz, so reduce elements from 4 to 2, and use index to iterate them. -Meanwhile, always do RX narrowband calibration (ID_NBRXK) for each group. -NCTL is used to assist IQK, so also update NCTL to 0x6 along with internal -tag HALRF_029_00_103. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230615130442.18116-5-pkshih@realtek.com ---- - .../net/wireless/realtek/rtw89/rtw8851b_rfk.c | 115 ++++++++++-------- - .../wireless/realtek/rtw89/rtw8851b_table.c | 2 +- - 2 files changed, 63 insertions(+), 54 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_rfk.c -@@ -17,6 +17,7 @@ - #define DPK_RF_REG_NUM_8851B 4 - #define DPK_KSET_NUM 4 - #define RTW8851B_RXK_GROUP_NR 4 -+#define RTW8851B_RXK_GROUP_IDX_NR 2 - #define RTW8851B_TXK_GROUP_NR 1 - #define RTW8851B_IQK_VER 0x2a - #define RTW8851B_IQK_SS 1 -@@ -95,9 +96,9 @@ static const u32 _tssi_de_mcs_10m[RF_PAT - static const u32 g_idxrxgain[RTW8851B_RXK_GROUP_NR] = {0x10e, 0x116, 0x28e, 0x296}; - static const u32 g_idxattc2[RTW8851B_RXK_GROUP_NR] = {0x0, 0xf, 0x0, 0xf}; - static const u32 g_idxrxagc[RTW8851B_RXK_GROUP_NR] = {0x0, 0x1, 0x2, 0x3}; --static const u32 a_idxrxgain[RTW8851B_RXK_GROUP_NR] = {0x10C, 0x112, 0x28c, 0x292}; --static const u32 a_idxattc2[RTW8851B_RXK_GROUP_NR] = {0xf, 0xf, 0xf, 0xf}; --static const u32 a_idxrxagc[RTW8851B_RXK_GROUP_NR] = {0x4, 0x5, 0x6, 0x7}; -+static const u32 a_idxrxgain[RTW8851B_RXK_GROUP_IDX_NR] = {0x10C, 0x28c}; -+static const u32 a_idxattc2[RTW8851B_RXK_GROUP_IDX_NR] = {0xf, 0xf}; -+static const u32 a_idxrxagc[RTW8851B_RXK_GROUP_IDX_NR] = {0x4, 0x6}; - static const u32 a_power_range[RTW8851B_TXK_GROUP_NR] = {0x0}; - static const u32 a_track_range[RTW8851B_TXK_GROUP_NR] = {0x6}; - static const u32 a_gain_bb[RTW8851B_TXK_GROUP_NR] = {0x0a}; -@@ -107,7 +108,7 @@ static const u32 g_track_range[RTW8851B_ - static const u32 g_gain_bb[RTW8851B_TXK_GROUP_NR] = {0x10}; - static const u32 g_itqt[RTW8851B_TXK_GROUP_NR] = {0x12}; - --static const u32 rtw8851b_backup_bb_regs[] = {0xc0ec, 0xc0e8}; -+static const u32 rtw8851b_backup_bb_regs[] = {0xc0d4, 0xc0d8, 0xc0c4, 0xc0ec, 0xc0e8}; - static const u32 rtw8851b_backup_rf_regs[] = { - 0xef, 0xde, 0x0, 0x1e, 0x2, 0x85, 0x90, 0x5}; - -@@ -120,6 +121,17 @@ static const u32 dpk_rf_reg[DPK_RF_REG_N - - static void _set_ch(struct rtw89_dev *rtwdev, u32 val); - -+static u8 _rxk_5ghz_group_from_idx(u8 idx) -+{ -+ /* There are four RXK groups (RTW8851B_RXK_GROUP_NR), but only group 0 -+ * and 2 are used in 5 GHz band, so reduce elements to 2. -+ */ -+ if (idx < RTW8851B_RXK_GROUP_IDX_NR) -+ return idx * 2; -+ -+ return 0; -+} -+ - static u8 _kpath(struct rtw89_dev *rtwdev, enum rtw89_phy_idx phy_idx) - { - return RF_A; -@@ -786,17 +798,11 @@ static bool _rxk_2g_group_sel(struct rtw - rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD), - rtw89_read_rf(rtwdev, path, RR_MOD, 0x003e0)); - -- if (gp == 0x3) { -- rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); -- rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); -- notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); -- iqk_info->nb_rxcfir[path] = -- rtw89_phy_read32_mask(rtwdev, R_RXIQC, MASKDWORD) | 0x2; -- -- rtw89_debug(rtwdev, RTW89_DBG_RFK, -- "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, -- rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); -- } -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); -+ iqk_info->nb_rxcfir[path] = -+ rtw89_phy_read32_mask(rtwdev, R_RXIQC, MASKDWORD) | 0x2; - - notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); - -@@ -834,15 +840,18 @@ static bool _rxk_5g_group_sel(struct rtw - bool kfail = false; - bool notready; - u32 rf_0; -+ u8 idx; - u8 gp; - - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); - -- for (gp = 0; gp < RTW8851B_RXK_GROUP_NR; gp++) { -+ for (idx = 0; idx < RTW8851B_RXK_GROUP_IDX_NR; idx++) { -+ gp = _rxk_5ghz_group_from_idx(idx); -+ - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, gp = %x\n", path, gp); - -- rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, 0x03ff0, a_idxrxgain[gp]); -- rtw89_write_rf(rtwdev, RF_PATH_A, RR_RXA2, RR_RXA2_ATT, a_idxattc2[gp]); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RR_MOD_RGM, a_idxrxgain[idx]); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_RXA2, RR_RXA2_ATT, a_idxattc2[idx]); - - rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_SEL, 0x1); - rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_G3, 0x0); -@@ -852,7 +861,7 @@ static bool _rxk_5g_group_sel(struct rtw - fsleep(100); - rf_0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); - rtw89_phy_write32_mask(rtwdev, R_IQK_DIF2, B_IQK_DIF2_RXPI, rf_0); -- rtw89_phy_write32_mask(rtwdev, R_IQK_RXA, B_IQK_RXAGC, a_idxrxagc[gp]); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_RXA, B_IQK_RXAGC, a_idxrxagc[idx]); - rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x11); - notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXAGC); - -@@ -861,17 +870,15 @@ static bool _rxk_5g_group_sel(struct rtw - rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD), - rtw89_read_rf(rtwdev, path, RR_MOD, RR_MOD_RXB)); - -- if (gp == 0x3) { -- rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); -- rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); -- notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); -- iqk_info->nb_rxcfir[path] = -- rtw89_phy_read32_mask(rtwdev, R_RXIQC, MASKDWORD) | 0x2; -- -- rtw89_debug(rtwdev, RTW89_DBG_RFK, -- "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, -- rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); -- } -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); -+ iqk_info->nb_rxcfir[path] = -+ rtw89_phy_read32_mask(rtwdev, R_RXIQC, MASKDWORD) | 0x2; -+ -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, -+ rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); - - notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXK); - -@@ -908,14 +915,17 @@ static bool _iqk_5g_nbrxk(struct rtw89_d - struct rtw89_iqk_info *iqk_info = &rtwdev->iqk; - bool kfail = false; - bool notready; -- u8 gp = 0x3; -+ u8 idx = 0x1; - u32 rf_0; -+ u8 gp; -+ -+ gp = _rxk_5ghz_group_from_idx(idx); - - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]===>%s\n", __func__); - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, gp = %x\n", path, gp); - -- rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RR_MOD_RGM, a_idxrxgain[gp]); -- rtw89_write_rf(rtwdev, RF_PATH_A, RR_RXA2, RR_RXA2_ATT, a_idxattc2[gp]); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_MOD, RR_MOD_RGM, a_idxrxgain[idx]); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_RXA2, RR_RXA2_ATT, a_idxattc2[idx]); - - rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_SEL, 0x1); - rtw89_phy_write32_mask(rtwdev, R_CFIR_LUT, B_CFIR_LUT_G3, 0x0); -@@ -925,7 +935,7 @@ static bool _iqk_5g_nbrxk(struct rtw89_d - fsleep(100); - rf_0 = rtw89_read_rf(rtwdev, path, RR_MOD, RFREG_MASK); - rtw89_phy_write32_mask(rtwdev, R_IQK_DIF2, B_IQK_DIF2_RXPI, rf_0); -- rtw89_phy_write32_mask(rtwdev, R_IQK_RXA, B_IQK_RXAGC, a_idxrxagc[gp]); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_RXA, B_IQK_RXAGC, a_idxrxagc[idx]); - rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x11); - notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_RXAGC); - -@@ -934,17 +944,15 @@ static bool _iqk_5g_nbrxk(struct rtw89_d - rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD), - rtw89_read_rf(rtwdev, path, RR_MOD, 0x003e0)); - -- if (gp == 0x3) { -- rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); -- rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); -- notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); -- iqk_info->nb_rxcfir[path] = -- rtw89_phy_read32_mask(rtwdev, R_RXIQC, MASKDWORD) | 0x2; -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); -+ iqk_info->nb_rxcfir[path] = -+ rtw89_phy_read32_mask(rtwdev, R_RXIQC, MASKDWORD) | 0x2; - -- rtw89_debug(rtwdev, RTW89_DBG_RFK, -- "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, -- rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); -- } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, -+ rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); - - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, WBRXK 0x8008 = 0x%x\n", - path, rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); -@@ -998,17 +1006,15 @@ static bool _iqk_2g_nbrxk(struct rtw89_d - path, rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD), - rtw89_read_rf(rtwdev, path, RR_MOD, 0x003e0)); - -- if (gp == 0x3) { -- rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); -- rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); -- notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); -- iqk_info->nb_rxcfir[path] = -- rtw89_phy_read32_mask(rtwdev, R_RXIQC, MASKDWORD) | 0x2; -+ rtw89_write_rf(rtwdev, path, RR_RXKPLL, RR_RXKPLL_OFF, 0x13); -+ rtw89_phy_write32_mask(rtwdev, R_IQK_DIF4, B_IQK_DIF4_RXT, 0x011); -+ notready = _iqk_one_shot(rtwdev, phy_idx, path, ID_NBRXK); -+ iqk_info->nb_rxcfir[path] = -+ rtw89_phy_read32_mask(rtwdev, R_RXIQC, MASKDWORD) | 0x2; - -- rtw89_debug(rtwdev, RTW89_DBG_RFK, -- "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, -- rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); -- } -+ rtw89_debug(rtwdev, RTW89_DBG_RFK, -+ "[IQK]S%x, NBRXK 0x8008 = 0x%x\n", path, -+ rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); - - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK]S%x, WBRXK 0x8008 = 0x%x\n", - path, rtw89_phy_read32_mask(rtwdev, R_NCTL_RPT, MASKDWORD)); -@@ -1516,6 +1522,9 @@ static void _iqk_restore(struct rtw89_de - fail = _iqk_check_cal(rtwdev, path); - rtw89_debug(rtwdev, RTW89_DBG_RFK, "[IQK] restore fail=%d\n", fail); - -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTWE, RR_LUTWE_LOK, 0x0); -+ rtw89_write_rf(rtwdev, RF_PATH_A, RR_LUTDBG, RR_LUTDBG_TIA, 0x0); -+ - rtw89_phy_write32_mask(rtwdev, R_NCTL_N1, B_NCTL_N1_CIP, 0x00); - rtw89_phy_write32_mask(rtwdev, R_NCTL_RPT, MASKDWORD, 0x00000000); - rtw89_phy_write32_mask(rtwdev, R_KIP_SYSCFG, MASKDWORD, 0x80000000); ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_table.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_table.c -@@ -2322,7 +2322,7 @@ static const struct rtw89_reg2_def rtw89 - {0x8144, 0x0b040b03}, - {0x8148, 0x07020b04}, - {0x814c, 0x07020b04}, -- {0x8150, 0xe4e40000}, -+ {0x8150, 0xa0a00000}, - {0x8158, 0xffffffff}, - {0x815c, 0xffffffff}, - {0x8160, 0xffffffff}, diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-141-wifi-rtw89-8851b-configure-to-force-1-TX-power-value.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-141-wifi-rtw89-8851b-configure-to-force-1-TX-power-value.patch deleted file mode 100644 index beac33886..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-141-wifi-rtw89-8851b-configure-to-force-1-TX-power-value.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 076031a09ae9e9394a56805aab92973612763d7e Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Thu, 15 Jun 2023 21:04:42 +0800 -Subject: [PATCH 5/7] wifi: rtw89: 8851b: configure to force 1 TX power value - -RTL8851B is a chip with only single RF path, and it must use 1 TX power -value for transmission, so force 1 TX power value to prevent hardware -logic gets wrong TX power values randomly in certain samples. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230615130442.18116-6-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/reg.h | 22 +++++++++++++++++++ - drivers/net/wireless/realtek/rtw89/rtw8851b.c | 3 +++ - 2 files changed, 25 insertions(+) - ---- a/drivers/net/wireless/realtek/rtw89/reg.h -+++ b/drivers/net/wireless/realtek/rtw89/reg.h -@@ -3333,6 +3333,28 @@ - #define R_AX_PWR_UL_CTRL2 0xD248 - #define B_AX_PWR_UL_CFO_MASK GENMASK(2, 0) - #define B_AX_PWR_UL_CTRL2_MASK 0x07700007 -+ -+#define R_AX_PWR_NORM_FORCE1 0xD260 -+#define R_AX_PWR_NORM_FORCE1_C1 0xF260 -+#define B_AX_TXAGC_BF_PWR_BOOST_FORCE_VAL_EN BIT(29) -+#define B_AX_TXAGC_BF_PWR_BOOST_FORCE_VAL_MASK GENMASK(28, 24) -+#define B_AX_FORCE_HE_ER_SU_EN_EN BIT(23) -+#define B_AX_FORCE_HE_ER_SU_EN_VALUE BIT(22) -+#define B_AX_FORCE_MACID_CCA_TH_EN_EN BIT(21) -+#define B_AX_FORCE_MACID_CCA_TH_EN_VALUE BIT(20) -+#define B_AX_FORCE_BT_GRANT_EN BIT(19) -+#define B_AX_FORCE_BT_GRANT_VALUE BIT(18) -+#define B_AX_FORCE_RX_LTE_EN BIT(17) -+#define B_AX_FORCE_RX_LTE_VALUE BIT(16) -+#define B_AX_FORCE_TXBF_EN_EN BIT(15) -+#define B_AX_FORCE_TXBF_EN_VALUE BIT(14) -+#define B_AX_FORCE_TXSC_EN BIT(13) -+#define B_AX_FORCE_TXSC_VALUE_MASK GENMASK(12, 9) -+#define B_AX_FORCE_NTX_EN BIT(6) -+#define B_AX_FORCE_NTX_VALUE BIT(5) -+#define B_AX_FORCE_PWR_MODE_EN BIT(3) -+#define B_AX_FORCE_PWR_MODE_VALUE_MASK GENMASK(2, 0) -+ - #define R_AX_PWR_UL_TB_CTRL 0xD288 - #define B_AX_PWR_UL_TB_CTRL_EN BIT(31) - #define R_AX_PWR_UL_TB_1T 0xD28C ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c -@@ -1442,6 +1442,9 @@ static void rtw8851b_bb_sethw(struct rtw - rtw8851b_bb_macid_ctrl_init(rtwdev, RTW89_PHY_0); - rtw8851b_bb_gpio_init(rtwdev); - -+ rtw89_write32_clr(rtwdev, R_AX_PWR_NORM_FORCE1, B_AX_FORCE_NTX_VALUE); -+ rtw89_write32_set(rtwdev, R_AX_PWR_NORM_FORCE1, B_AX_FORCE_NTX_EN); -+ - /* read these registers after loading BB parameters */ - gain->offset_base[RTW89_PHY_0] = - rtw89_phy_read32_mask(rtwdev, R_P0_RPL1, B_P0_RPL1_BIAS_MASK); diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-142-wifi-rtw89-TX-power-stuffs-replace-confusing-naming-.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-142-wifi-rtw89-TX-power-stuffs-replace-confusing-naming-.patch deleted file mode 100644 index f80e79979..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-142-wifi-rtw89-TX-power-stuffs-replace-confusing-naming-.patch +++ /dev/null @@ -1,264 +0,0 @@ -From b4a283fb6227fa01cdfb4bec891ded3e32b4a287 Mon Sep 17 00:00:00 2001 -From: Zong-Zhe Yang -Date: Fri, 16 Jun 2023 14:05:23 +0800 -Subject: [PATCH 6/7] wifi: rtw89: TX power stuffs replace confusing naming of - _max with _num - -Some old declarations about TX power stuffs were named with confusing -`_max`. But, they mean "the number of". So we change them to be named -with `_num`. - -(No logic is changed.) - -Signed-off-by: Zong-Zhe Yang -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230616060523.28396-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 34 ++++++++-------- - drivers/net/wireless/realtek/rtw89/phy.c | 40 +++++++++---------- - .../wireless/realtek/rtw89/rtw8851b_table.c | 2 +- - .../wireless/realtek/rtw89/rtw8851b_table.h | 2 +- - .../wireless/realtek/rtw89/rtw8852b_table.c | 2 +- - .../wireless/realtek/rtw89/rtw8852b_table.h | 2 +- - .../wireless/realtek/rtw89/rtw8852c_table.c | 2 +- - .../wireless/realtek/rtw89/rtw8852c_table.h | 2 +- - 8 files changed, 43 insertions(+), 43 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -251,7 +251,7 @@ enum rtw89_band { - RTW89_BAND_2G = 0, - RTW89_BAND_5G = 1, - RTW89_BAND_6G = 2, -- RTW89_BAND_MAX, -+ RTW89_BAND_NUM, - }; - - enum rtw89_hw_rate { -@@ -434,27 +434,27 @@ enum rtw89_rate_section { - RTW89_RS_MCS, /* for HT/VHT/HE */ - RTW89_RS_HEDCM, - RTW89_RS_OFFSET, -- RTW89_RS_MAX, -+ RTW89_RS_NUM, - RTW89_RS_LMT_NUM = RTW89_RS_MCS + 1, - RTW89_RS_TX_SHAPE_NUM = RTW89_RS_OFDM + 1, - }; - --enum rtw89_rate_max { -- RTW89_RATE_CCK_MAX = 4, -- RTW89_RATE_OFDM_MAX = 8, -- RTW89_RATE_MCS_MAX = 12, -- RTW89_RATE_HEDCM_MAX = 4, /* for HEDCM MCS0/1/3/4 */ -- RTW89_RATE_OFFSET_MAX = 5, /* for HE(HEDCM)/VHT/HT/OFDM/CCK offset */ -+enum rtw89_rate_num { -+ RTW89_RATE_CCK_NUM = 4, -+ RTW89_RATE_OFDM_NUM = 8, -+ RTW89_RATE_MCS_NUM = 12, -+ RTW89_RATE_HEDCM_NUM = 4, /* for HEDCM MCS0/1/3/4 */ -+ RTW89_RATE_OFFSET_NUM = 5, /* for HE(HEDCM)/VHT/HT/OFDM/CCK offset */ - }; - - enum rtw89_nss { - RTW89_NSS_1 = 0, - RTW89_NSS_2 = 1, - /* HE DCM only support 1ss and 2ss */ -- RTW89_NSS_HEDCM_MAX = RTW89_NSS_2 + 1, -+ RTW89_NSS_HEDCM_NUM = RTW89_NSS_2 + 1, - RTW89_NSS_3 = 2, - RTW89_NSS_4 = 3, -- RTW89_NSS_MAX, -+ RTW89_NSS_NUM, - }; - - enum rtw89_ntx { -@@ -512,11 +512,11 @@ enum rtw89_fw_pkt_ofld_type { - }; - - struct rtw89_txpwr_byrate { -- s8 cck[RTW89_RATE_CCK_MAX]; -- s8 ofdm[RTW89_RATE_OFDM_MAX]; -- s8 mcs[RTW89_NSS_MAX][RTW89_RATE_MCS_MAX]; -- s8 hedcm[RTW89_NSS_HEDCM_MAX][RTW89_RATE_HEDCM_MAX]; -- s8 offset[RTW89_RATE_OFFSET_MAX]; -+ s8 cck[RTW89_RATE_CCK_NUM]; -+ s8 ofdm[RTW89_RATE_OFDM_NUM]; -+ s8 mcs[RTW89_NSS_NUM][RTW89_RATE_MCS_NUM]; -+ s8 hedcm[RTW89_NSS_HEDCM_NUM][RTW89_RATE_HEDCM_NUM]; -+ s8 offset[RTW89_RATE_OFFSET_NUM]; - }; - - enum rtw89_bandwidth_section_num { -@@ -3815,7 +3815,7 @@ struct rtw89_power_trim_info { - - struct rtw89_regd { - char alpha2[3]; -- u8 txpwr_regd[RTW89_BAND_MAX]; -+ u8 txpwr_regd[RTW89_BAND_NUM]; - }; - - struct rtw89_regulatory_info { -@@ -4111,7 +4111,7 @@ struct rtw89_dev { - bool is_bt_iqk_timeout; - - struct rtw89_fem_info fem; -- struct rtw89_txpwr_byrate byr[RTW89_BAND_MAX]; -+ struct rtw89_txpwr_byrate byr[RTW89_BAND_NUM]; - struct rtw89_tssi_info tssi; - struct rtw89_power_trim_info pwr_trim; - ---- a/drivers/net/wireless/realtek/rtw89/phy.c -+++ b/drivers/net/wireless/realtek/rtw89/phy.c -@@ -1494,19 +1494,19 @@ void rtw89_phy_write_reg3_tbl(struct rtw - } - EXPORT_SYMBOL(rtw89_phy_write_reg3_tbl); - --static const u8 rtw89_rs_idx_max[] = { -- [RTW89_RS_CCK] = RTW89_RATE_CCK_MAX, -- [RTW89_RS_OFDM] = RTW89_RATE_OFDM_MAX, -- [RTW89_RS_MCS] = RTW89_RATE_MCS_MAX, -- [RTW89_RS_HEDCM] = RTW89_RATE_HEDCM_MAX, -- [RTW89_RS_OFFSET] = RTW89_RATE_OFFSET_MAX, -+static const u8 rtw89_rs_idx_num[] = { -+ [RTW89_RS_CCK] = RTW89_RATE_CCK_NUM, -+ [RTW89_RS_OFDM] = RTW89_RATE_OFDM_NUM, -+ [RTW89_RS_MCS] = RTW89_RATE_MCS_NUM, -+ [RTW89_RS_HEDCM] = RTW89_RATE_HEDCM_NUM, -+ [RTW89_RS_OFFSET] = RTW89_RATE_OFFSET_NUM, - }; - --static const u8 rtw89_rs_nss_max[] = { -+static const u8 rtw89_rs_nss_num[] = { - [RTW89_RS_CCK] = 1, - [RTW89_RS_OFDM] = 1, -- [RTW89_RS_MCS] = RTW89_NSS_MAX, -- [RTW89_RS_HEDCM] = RTW89_NSS_HEDCM_MAX, -+ [RTW89_RS_MCS] = RTW89_NSS_NUM, -+ [RTW89_RS_HEDCM] = RTW89_NSS_HEDCM_NUM, - [RTW89_RS_OFFSET] = 1, - }; - -@@ -1519,9 +1519,9 @@ static const u8 _byr_of_rs[] = { - }; - - #define _byr_seek(rs, raw) ((s8 *)(raw) + _byr_of_rs[rs]) --#define _byr_idx(rs, nss, idx) ((nss) * rtw89_rs_idx_max[rs] + (idx)) -+#define _byr_idx(rs, nss, idx) ((nss) * rtw89_rs_idx_num[rs] + (idx)) - #define _byr_chk(rs, nss, idx) \ -- ((nss) < rtw89_rs_nss_max[rs] && (idx) < rtw89_rs_idx_max[rs]) -+ ((nss) < rtw89_rs_nss_num[rs] && (idx) < rtw89_rs_idx_num[rs]) - - void rtw89_phy_load_txpwr_byrate(struct rtw89_dev *rtwdev, - const struct rtw89_txpwr_table *tbl) -@@ -2084,19 +2084,19 @@ void rtw89_phy_set_txpwr_byrate(struct r - rtw89_debug(rtwdev, RTW89_DBG_TXPWR, - "[TXPWR] set txpwr byrate with ch=%d\n", ch); - -- BUILD_BUG_ON(rtw89_rs_idx_max[RTW89_RS_CCK] % 4); -- BUILD_BUG_ON(rtw89_rs_idx_max[RTW89_RS_OFDM] % 4); -- BUILD_BUG_ON(rtw89_rs_idx_max[RTW89_RS_MCS] % 4); -- BUILD_BUG_ON(rtw89_rs_idx_max[RTW89_RS_HEDCM] % 4); -+ BUILD_BUG_ON(rtw89_rs_idx_num[RTW89_RS_CCK] % 4); -+ BUILD_BUG_ON(rtw89_rs_idx_num[RTW89_RS_OFDM] % 4); -+ BUILD_BUG_ON(rtw89_rs_idx_num[RTW89_RS_MCS] % 4); -+ BUILD_BUG_ON(rtw89_rs_idx_num[RTW89_RS_HEDCM] % 4); - - addr = R_AX_PWR_BY_RATE; - for (cur.nss = 0; cur.nss < max_nss_num; cur.nss++) { - for (i = 0; i < ARRAY_SIZE(rs); i++) { -- if (cur.nss >= rtw89_rs_nss_max[rs[i]]) -+ if (cur.nss >= rtw89_rs_nss_num[rs[i]]) - continue; - - cur.rs = rs[i]; -- for (cur.idx = 0; cur.idx < rtw89_rs_idx_max[rs[i]]; -+ for (cur.idx = 0; cur.idx < rtw89_rs_idx_num[rs[i]]; - cur.idx++) { - v[cur.idx % 4] = - rtw89_phy_read_txpwr_byrate(rtwdev, -@@ -2129,15 +2129,15 @@ void rtw89_phy_set_txpwr_offset(struct r - .rs = RTW89_RS_OFFSET, - }; - u8 band = chan->band_type; -- s8 v[RTW89_RATE_OFFSET_MAX] = {}; -+ s8 v[RTW89_RATE_OFFSET_NUM] = {}; - u32 val; - - rtw89_debug(rtwdev, RTW89_DBG_TXPWR, "[TXPWR] set txpwr offset\n"); - -- for (desc.idx = 0; desc.idx < RTW89_RATE_OFFSET_MAX; desc.idx++) -+ for (desc.idx = 0; desc.idx < RTW89_RATE_OFFSET_NUM; desc.idx++) - v[desc.idx] = rtw89_phy_read_txpwr_byrate(rtwdev, band, &desc); - -- BUILD_BUG_ON(RTW89_RATE_OFFSET_MAX != 5); -+ BUILD_BUG_ON(RTW89_RATE_OFFSET_NUM != 5); - val = FIELD_PREP(GENMASK(3, 0), v[0]) | - FIELD_PREP(GENMASK(7, 4), v[1]) | - FIELD_PREP(GENMASK(11, 8), v[2]) | ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_table.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_table.c -@@ -3321,7 +3321,7 @@ static const s8 _txpwr_track_delta_swing - 0, 1, 1, 1, 1, 2, 2, 2, 3, 3, 3, 3, 4, 4 - }; - --const u8 rtw89_8851b_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM] -+const u8 rtw89_8851b_tx_shape[RTW89_BAND_NUM][RTW89_RS_TX_SHAPE_NUM] - [RTW89_REGD_NUM] = { - [0][0][RTW89_ACMA] = 0, - [0][0][RTW89_CN] = 0, ---- a/drivers/net/wireless/realtek/rtw89/rtw8851b_table.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b_table.h -@@ -13,7 +13,7 @@ extern const struct rtw89_phy_table rtw8 - extern const struct rtw89_phy_table rtw89_8851b_phy_nctl_table; - extern const struct rtw89_txpwr_table rtw89_8851b_byr_table; - extern const struct rtw89_txpwr_track_cfg rtw89_8851b_trk_cfg; --extern const u8 rtw89_8851b_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM] -+extern const u8 rtw89_8851b_tx_shape[RTW89_BAND_NUM][RTW89_RS_TX_SHAPE_NUM] - [RTW89_REGD_NUM]; - extern const struct rtw89_rfe_parms rtw89_8851b_dflt_parms; - extern const struct rtw89_rfe_parms_conf rtw89_8851b_rfe_parms_conf[]; ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_table.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_table.c -@@ -14666,7 +14666,7 @@ static const s8 _txpwr_track_delta_swing - 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, - 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}; - --const u8 rtw89_8852b_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM] -+const u8 rtw89_8852b_tx_shape[RTW89_BAND_NUM][RTW89_RS_TX_SHAPE_NUM] - [RTW89_REGD_NUM] = { - [0][0][RTW89_ACMA] = 0, - [0][0][RTW89_CHILE] = 0, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852b_table.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b_table.h -@@ -14,7 +14,7 @@ extern const struct rtw89_phy_table rtw8 - extern const struct rtw89_phy_table rtw89_8852b_phy_nctl_table; - extern const struct rtw89_txpwr_table rtw89_8852b_byr_table; - extern const struct rtw89_txpwr_track_cfg rtw89_8852b_trk_cfg; --extern const u8 rtw89_8852b_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM] -+extern const u8 rtw89_8852b_tx_shape[RTW89_BAND_NUM][RTW89_RS_TX_SHAPE_NUM] - [RTW89_REGD_NUM]; - extern const struct rtw89_rfe_parms rtw89_8852b_dflt_parms; - ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_table.c -@@ -31525,7 +31525,7 @@ static const s8 _txpwr_track_delta_swing - 3, 3, 3, 3, 3, 4, 4, 4, 4, 4, 4, 5, 5, 5 - }; - --const u8 rtw89_8852c_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM] -+const u8 rtw89_8852c_tx_shape[RTW89_BAND_NUM][RTW89_RS_TX_SHAPE_NUM] - [RTW89_REGD_NUM] = { - [0][0][RTW89_ACMA] = 0, - [0][0][RTW89_CHILE] = 0, ---- a/drivers/net/wireless/realtek/rtw89/rtw8852c_table.h -+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c_table.h -@@ -15,7 +15,7 @@ extern const struct rtw89_phy_table rtw8 - extern const struct rtw89_txpwr_table rtw89_8852c_byr_table; - extern const struct rtw89_phy_tssi_dbw_table rtw89_8852c_tssi_dbw_table; - extern const struct rtw89_txpwr_track_cfg rtw89_8852c_trk_cfg; --extern const u8 rtw89_8852c_tx_shape[RTW89_BAND_MAX][RTW89_RS_TX_SHAPE_NUM] -+extern const u8 rtw89_8852c_tx_shape[RTW89_BAND_NUM][RTW89_RS_TX_SHAPE_NUM] - [RTW89_REGD_NUM]; - extern const struct rtw89_rfe_parms rtw89_8852c_dflt_parms; - diff --git a/package/kernel/mac80211/patches/rtl/202-v6.4-143-wifi-rtw89-use-struct-to-parse-firmware-header.patch b/package/kernel/mac80211/patches/rtl/202-v6.4-143-wifi-rtw89-use-struct-to-parse-firmware-header.patch deleted file mode 100644 index 6cffbafdf..000000000 --- a/package/kernel/mac80211/patches/rtl/202-v6.4-143-wifi-rtw89-use-struct-to-parse-firmware-header.patch +++ /dev/null @@ -1,263 +0,0 @@ -From f072eb39e4f2c1df60d8641f6260f11a42366abc Mon Sep 17 00:00:00 2001 -From: Ping-Ke Shih -Date: Fri, 16 Jun 2023 14:06:01 +0800 -Subject: [PATCH 7/7] wifi: rtw89: use struct to parse firmware header - -A firmware contains basic header, sections and optional dynamic header. -Define them by a struct, so it will be easier to understand the layout, -and also simply access these elements. - -Signed-off-by: Ping-Ke Shih -Signed-off-by: Kalle Valo -Link: https://lore.kernel.org/r/20230616060601.28460-1-pkshih@realtek.com ---- - drivers/net/wireless/realtek/rtw89/core.h | 8 +- - drivers/net/wireless/realtek/rtw89/fw.c | 58 +++++++------ - drivers/net/wireless/realtek/rtw89/fw.h | 101 ++++++++++++---------- - 3 files changed, 87 insertions(+), 80 deletions(-) - ---- a/drivers/net/wireless/realtek/rtw89/core.h -+++ b/drivers/net/wireless/realtek/rtw89/core.h -@@ -3387,10 +3387,10 @@ struct rtw89_fw_suit { - (mfw_hdr)->ver.idx) - - #define RTW89_FW_HDR_VER_CODE(fw_hdr) \ -- RTW89_FW_VER_CODE(GET_FW_HDR_MAJOR_VERSION(fw_hdr), \ -- GET_FW_HDR_MINOR_VERSION(fw_hdr), \ -- GET_FW_HDR_SUBVERSION(fw_hdr), \ -- GET_FW_HDR_SUBINDEX(fw_hdr)) -+ RTW89_FW_VER_CODE(le32_get_bits((fw_hdr)->w1, FW_HDR_W1_MAJOR_VERSION), \ -+ le32_get_bits((fw_hdr)->w1, FW_HDR_W1_MINOR_VERSION), \ -+ le32_get_bits((fw_hdr)->w1, FW_HDR_W1_SUBVERSION), \ -+ le32_get_bits((fw_hdr)->w1, FW_HDR_W1_SUBINDEX)) - - struct rtw89_fw_req_info { - const struct firmware *firmware; ---- a/drivers/net/wireless/realtek/rtw89/fw.c -+++ b/drivers/net/wireless/realtek/rtw89/fw.c -@@ -89,9 +89,11 @@ int rtw89_fw_check_rdy(struct rtw89_dev - static int rtw89_fw_hdr_parser(struct rtw89_dev *rtwdev, const u8 *fw, u32 len, - struct rtw89_fw_bin_info *info) - { -+ const struct rtw89_fw_hdr *fw_hdr = (const struct rtw89_fw_hdr *)fw; - struct rtw89_fw_hdr_section_info *section_info; -+ const struct rtw89_fw_dynhdr_hdr *fwdynhdr; -+ const struct rtw89_fw_hdr_section *section; - const u8 *fw_end = fw + len; -- const u8 *fwdynhdr; - const u8 *bin; - u32 base_hdr_len; - u32 mssc_len = 0; -@@ -100,16 +102,15 @@ static int rtw89_fw_hdr_parser(struct rt - if (!info) - return -EINVAL; - -- info->section_num = GET_FW_HDR_SEC_NUM(fw); -- base_hdr_len = RTW89_FW_HDR_SIZE + -- info->section_num * RTW89_FW_SECTION_HDR_SIZE; -- info->dynamic_hdr_en = GET_FW_HDR_DYN_HDR(fw); -+ info->section_num = le32_get_bits(fw_hdr->w6, FW_HDR_W6_SEC_NUM); -+ base_hdr_len = struct_size(fw_hdr, sections, info->section_num); -+ info->dynamic_hdr_en = le32_get_bits(fw_hdr->w7, FW_HDR_W7_DYN_HDR); - - if (info->dynamic_hdr_en) { -- info->hdr_len = GET_FW_HDR_LEN(fw); -+ info->hdr_len = le32_get_bits(fw_hdr->w3, FW_HDR_W3_LEN); - info->dynamic_hdr_len = info->hdr_len - base_hdr_len; -- fwdynhdr = fw + base_hdr_len; -- if (GET_FW_DYNHDR_LEN(fwdynhdr) != info->dynamic_hdr_len) { -+ fwdynhdr = (const struct rtw89_fw_dynhdr_hdr *)(fw + base_hdr_len); -+ if (le32_to_cpu(fwdynhdr->hdr_len) != info->dynamic_hdr_len) { - rtw89_err(rtwdev, "[ERR]invalid fw dynamic header len\n"); - return -EINVAL; - } -@@ -121,26 +122,27 @@ static int rtw89_fw_hdr_parser(struct rt - bin = fw + info->hdr_len; - - /* jump to section header */ -- fw += RTW89_FW_HDR_SIZE; - section_info = info->section_info; - for (i = 0; i < info->section_num; i++) { -- section_info->type = GET_FWSECTION_HDR_SECTIONTYPE(fw); -+ section = &fw_hdr->sections[i]; -+ section_info->type = -+ le32_get_bits(section->w1, FWSECTION_HDR_W1_SECTIONTYPE); - if (section_info->type == FWDL_SECURITY_SECTION_TYPE) { -- section_info->mssc = GET_FWSECTION_HDR_MSSC(fw); -+ section_info->mssc = -+ le32_get_bits(section->w2, FWSECTION_HDR_W2_MSSC); - mssc_len += section_info->mssc * FWDL_SECURITY_SIGLEN; - } else { - section_info->mssc = 0; - } - -- section_info->len = GET_FWSECTION_HDR_SEC_SIZE(fw); -- if (GET_FWSECTION_HDR_CHECKSUM(fw)) -+ section_info->len = le32_get_bits(section->w1, FWSECTION_HDR_W1_SEC_SIZE); -+ if (le32_get_bits(section->w1, FWSECTION_HDR_W1_CHECKSUM)) - section_info->len += FWDL_SECTION_CHKSUM_LEN; -- section_info->redl = GET_FWSECTION_HDR_REDL(fw); -+ section_info->redl = le32_get_bits(section->w1, FWSECTION_HDR_W1_REDL); - section_info->dladdr = -- GET_FWSECTION_HDR_DL_ADDR(fw) & 0x1fffffff; -+ le32_get_bits(section->w0, FWSECTION_HDR_W0_DL_ADDR) & 0x1fffffff; - section_info->addr = bin; - bin += section_info->len; -- fw += RTW89_FW_SECTION_HDR_SIZE; - section_info++; - } - -@@ -195,18 +197,18 @@ static void rtw89_fw_update_ver(struct r - enum rtw89_fw_type type, - struct rtw89_fw_suit *fw_suit) - { -- const u8 *hdr = fw_suit->data; -+ const struct rtw89_fw_hdr *hdr = (const struct rtw89_fw_hdr *)fw_suit->data; - -- fw_suit->major_ver = GET_FW_HDR_MAJOR_VERSION(hdr); -- fw_suit->minor_ver = GET_FW_HDR_MINOR_VERSION(hdr); -- fw_suit->sub_ver = GET_FW_HDR_SUBVERSION(hdr); -- fw_suit->sub_idex = GET_FW_HDR_SUBINDEX(hdr); -- fw_suit->build_year = GET_FW_HDR_YEAR(hdr); -- fw_suit->build_mon = GET_FW_HDR_MONTH(hdr); -- fw_suit->build_date = GET_FW_HDR_DATE(hdr); -- fw_suit->build_hour = GET_FW_HDR_HOUR(hdr); -- fw_suit->build_min = GET_FW_HDR_MIN(hdr); -- fw_suit->cmd_ver = GET_FW_HDR_CMD_VERSERION(hdr); -+ fw_suit->major_ver = le32_get_bits(hdr->w1, FW_HDR_W1_MAJOR_VERSION); -+ fw_suit->minor_ver = le32_get_bits(hdr->w1, FW_HDR_W1_MINOR_VERSION); -+ fw_suit->sub_ver = le32_get_bits(hdr->w1, FW_HDR_W1_SUBVERSION); -+ fw_suit->sub_idex = le32_get_bits(hdr->w1, FW_HDR_W1_SUBINDEX); -+ fw_suit->build_year = le32_get_bits(hdr->w5, FW_HDR_W5_YEAR); -+ fw_suit->build_mon = le32_get_bits(hdr->w4, FW_HDR_W4_MONTH); -+ fw_suit->build_date = le32_get_bits(hdr->w4, FW_HDR_W4_DATE); -+ fw_suit->build_hour = le32_get_bits(hdr->w4, FW_HDR_W4_HOUR); -+ fw_suit->build_min = le32_get_bits(hdr->w4, FW_HDR_W4_MIN); -+ fw_suit->cmd_ver = le32_get_bits(hdr->w7, FW_HDR_W7_CMD_VERSERION); - - rtw89_info(rtwdev, - "Firmware version %u.%u.%u.%u, cmd version %u, type %u\n", ---- a/drivers/net/wireless/realtek/rtw89/fw.h -+++ b/drivers/net/wireless/realtek/rtw89/fw.h -@@ -528,50 +528,58 @@ static inline void RTW89_SET_EDCA_PARAM( - #define FWDL_SECURITY_SECTION_TYPE 9 - #define FWDL_SECURITY_SIGLEN 512 - --#define GET_FWSECTION_HDR_DL_ADDR(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr)), GENMASK(31, 0)) --#define GET_FWSECTION_HDR_SECTIONTYPE(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(27, 24)) --#define GET_FWSECTION_HDR_SEC_SIZE(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(23, 0)) --#define GET_FWSECTION_HDR_CHECKSUM(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 1), BIT(28)) --#define GET_FWSECTION_HDR_REDL(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 1), BIT(29)) --#define GET_FWSECTION_HDR_MSSC(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 2), GENMASK(31, 0)) -- --#define GET_FW_HDR_MAJOR_VERSION(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(7, 0)) --#define GET_FW_HDR_MINOR_VERSION(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(15, 8)) --#define GET_FW_HDR_SUBVERSION(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(23, 16)) --#define GET_FW_HDR_SUBINDEX(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 1), GENMASK(31, 24)) --#define GET_FW_HDR_LEN(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 3), GENMASK(23, 16)) --#define GET_FW_HDR_MONTH(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(7, 0)) --#define GET_FW_HDR_DATE(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(15, 8)) --#define GET_FW_HDR_HOUR(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(23, 16)) --#define GET_FW_HDR_MIN(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 4), GENMASK(31, 24)) --#define GET_FW_HDR_YEAR(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 5), GENMASK(31, 0)) --#define GET_FW_HDR_SEC_NUM(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 6), GENMASK(15, 8)) --#define GET_FW_HDR_DYN_HDR(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 7), BIT(16)) --#define GET_FW_HDR_CMD_VERSERION(fwhdr) \ -- le32_get_bits(*((const __le32 *)(fwhdr) + 7), GENMASK(31, 24)) -- --#define GET_FW_DYNHDR_LEN(fwdynhdr) \ -- le32_get_bits(*((const __le32 *)(fwdynhdr)), GENMASK(31, 0)) --#define GET_FW_DYNHDR_COUNT(fwdynhdr) \ -- le32_get_bits(*((const __le32 *)(fwdynhdr) + 1), GENMASK(31, 0)) -+struct rtw89_fw_dynhdr_sec { -+ __le32 w0; -+ u8 content[]; -+} __packed; -+ -+struct rtw89_fw_dynhdr_hdr { -+ __le32 hdr_len; -+ __le32 setcion_count; -+ /* struct rtw89_fw_dynhdr_sec (nested flexible structures) */ -+} __packed; -+ -+struct rtw89_fw_hdr_section { -+ __le32 w0; -+ __le32 w1; -+ __le32 w2; -+ __le32 w3; -+} __packed; -+ -+#define FWSECTION_HDR_W0_DL_ADDR GENMASK(31, 0) -+#define FWSECTION_HDR_W1_METADATA GENMASK(31, 24) -+#define FWSECTION_HDR_W1_SECTIONTYPE GENMASK(27, 24) -+#define FWSECTION_HDR_W1_SEC_SIZE GENMASK(23, 0) -+#define FWSECTION_HDR_W1_CHECKSUM BIT(28) -+#define FWSECTION_HDR_W1_REDL BIT(29) -+#define FWSECTION_HDR_W2_MSSC GENMASK(31, 0) -+ -+struct rtw89_fw_hdr { -+ __le32 w0; -+ __le32 w1; -+ __le32 w2; -+ __le32 w3; -+ __le32 w4; -+ __le32 w5; -+ __le32 w6; -+ __le32 w7; -+ struct rtw89_fw_hdr_section sections[]; -+ /* struct rtw89_fw_dynhdr_hdr (optional) */ -+} __packed; -+ -+#define FW_HDR_W1_MAJOR_VERSION GENMASK(7, 0) -+#define FW_HDR_W1_MINOR_VERSION GENMASK(15, 8) -+#define FW_HDR_W1_SUBVERSION GENMASK(23, 16) -+#define FW_HDR_W1_SUBINDEX GENMASK(31, 24) -+#define FW_HDR_W3_LEN GENMASK(23, 16) -+#define FW_HDR_W4_MONTH GENMASK(7, 0) -+#define FW_HDR_W4_DATE GENMASK(15, 8) -+#define FW_HDR_W4_HOUR GENMASK(23, 16) -+#define FW_HDR_W4_MIN GENMASK(31, 24) -+#define FW_HDR_W5_YEAR GENMASK(31, 0) -+#define FW_HDR_W6_SEC_NUM GENMASK(15, 8) -+#define FW_HDR_W7_DYN_HDR BIT(16) -+#define FW_HDR_W7_CMD_VERSERION GENMASK(31, 24) - - static inline void SET_FW_HDR_PART_SIZE(void *fwhdr, u32 val) - { -@@ -3392,9 +3400,6 @@ struct rtw89_h2c_ofld { - #define RTW89_H2C_OFLD_W0_TX_TP GENMASK(17, 8) - #define RTW89_H2C_OFLD_W0_RX_TP GENMASK(27, 18) - --#define RTW89_FW_HDR_SIZE 32 --#define RTW89_FW_SECTION_HDR_SIZE 16 -- - #define RTW89_MFW_SIG 0xFF - - struct rtw89_mfw_info { -@@ -3428,7 +3433,7 @@ struct fwcmd_hdr { - - union rtw89_compat_fw_hdr { - struct rtw89_mfw_hdr mfw_hdr; -- u8 fw_hdr[RTW89_FW_HDR_SIZE]; -+ struct rtw89_fw_hdr fw_hdr; - }; - - static inline u32 rtw89_compat_fw_hdr_ver_code(const void *fw_buf) diff --git a/package/kernel/mac80211/patches/subsys/338-mac80211-split-mesh-fast-tx-cache-into-local-proxied.patch b/package/kernel/mac80211/patches/subsys/338-mac80211-split-mesh-fast-tx-cache-into-local-proxied.patch new file mode 100644 index 000000000..f7391a580 --- /dev/null +++ b/package/kernel/mac80211/patches/subsys/338-mac80211-split-mesh-fast-tx-cache-into-local-proxied.patch @@ -0,0 +1,219 @@ +From: Felix Fietkau +Date: Fri, 30 Jun 2023 13:11:51 +0200 +Subject: [PATCH] mac80211: split mesh fast tx cache into + local/proxied/forwarded + +Depending on the origin of the packets (and their SA), 802.11 + mesh headers +could be filled in differently. In order to properly deal with that, add a +new field to the lookup key, indicating the type (local, proxied or +forwarded). This can fix spurious packet drop issues that depend on the order +in which nodes/hosts communicate with each other. + +Signed-off-by: Felix Fietkau +--- + +--- a/net/mac80211/mesh.c ++++ b/net/mac80211/mesh.c +@@ -703,6 +703,9 @@ bool ieee80211_mesh_xmit_fast(struct iee + struct sk_buff *skb, u32 ctrl_flags) + { + struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh; ++ struct ieee80211_mesh_fast_tx_key key = { ++ .type = MESH_FAST_TX_TYPE_LOCAL ++ }; + struct ieee80211_mesh_fast_tx *entry; + struct ieee80211s_hdr *meshhdr; + u8 sa[ETH_ALEN] __aligned(2); +@@ -738,7 +741,10 @@ bool ieee80211_mesh_xmit_fast(struct iee + return false; + } + +- entry = mesh_fast_tx_get(sdata, skb->data); ++ ether_addr_copy(key.addr, skb->data); ++ if (!ether_addr_equal(skb->data + ETH_ALEN, sdata->vif.addr)) ++ key.type = MESH_FAST_TX_TYPE_PROXIED; ++ entry = mesh_fast_tx_get(sdata, &key); + if (!entry) + return false; + +--- a/net/mac80211/mesh.h ++++ b/net/mac80211/mesh.h +@@ -133,9 +133,33 @@ struct mesh_path { + #define MESH_FAST_TX_CACHE_TIMEOUT 8000 /* msecs */ + + /** ++ * enum ieee80211_mesh_fast_tx_type - cached mesh fast tx entry type ++ * ++ * @MESH_FAST_TX_TYPE_LOCAL: tx from the local vif address as SA ++ * @MESH_FAST_TX_TYPE_PROXIED: local tx with a different SA (e.g. bridged) ++ * @MESH_FAST_TX_TYPE_FORWARDED: forwarded from a different mesh point ++ */ ++enum ieee80211_mesh_fast_tx_type { ++ MESH_FAST_TX_TYPE_LOCAL, ++ MESH_FAST_TX_TYPE_PROXIED, ++ MESH_FAST_TX_TYPE_FORWARDED, ++}; ++ ++/** ++ * struct ieee80211_mesh_fast_tx_key - cached mesh fast tx entry key ++ * ++ * @addr: The Ethernet DA for this entry ++ * @type: cache entry type ++ */ ++struct ieee80211_mesh_fast_tx_key { ++ u8 addr[ETH_ALEN] __aligned(2); ++ enum ieee80211_mesh_fast_tx_type type; ++}; ++ ++/** + * struct ieee80211_mesh_fast_tx - cached mesh fast tx entry + * @rhash: rhashtable pointer +- * @addr_key: The Ethernet DA which is the key for this entry ++ * @key: the lookup key for this cache entry + * @fast_tx: base fast_tx data + * @hdr: cached mesh and rfc1042 headers + * @hdrlen: length of mesh + rfc1042 +@@ -146,7 +170,7 @@ struct mesh_path { + */ + struct ieee80211_mesh_fast_tx { + struct rhash_head rhash; +- u8 addr_key[ETH_ALEN] __aligned(2); ++ struct ieee80211_mesh_fast_tx_key key; + + struct ieee80211_fast_tx fast_tx; + u8 hdr[sizeof(struct ieee80211s_hdr) + sizeof(rfc1042_header)]; +@@ -329,7 +353,8 @@ void mesh_path_tx_root_frame(struct ieee + + bool mesh_action_is_path_sel(struct ieee80211_mgmt *mgmt); + struct ieee80211_mesh_fast_tx * +-mesh_fast_tx_get(struct ieee80211_sub_if_data *sdata, const u8 *addr); ++mesh_fast_tx_get(struct ieee80211_sub_if_data *sdata, ++ struct ieee80211_mesh_fast_tx_key *key); + bool ieee80211_mesh_xmit_fast(struct ieee80211_sub_if_data *sdata, + struct sk_buff *skb, u32 ctrl_flags); + void mesh_fast_tx_cache(struct ieee80211_sub_if_data *sdata, +--- a/net/mac80211/mesh_pathtbl.c ++++ b/net/mac80211/mesh_pathtbl.c +@@ -36,8 +36,8 @@ static const struct rhashtable_params me + static const struct rhashtable_params fast_tx_rht_params = { + .nelem_hint = 10, + .automatic_shrinking = true, +- .key_len = ETH_ALEN, +- .key_offset = offsetof(struct ieee80211_mesh_fast_tx, addr_key), ++ .key_len = sizeof(struct ieee80211_mesh_fast_tx_key), ++ .key_offset = offsetof(struct ieee80211_mesh_fast_tx, key), + .head_offset = offsetof(struct ieee80211_mesh_fast_tx, rhash), + .hashfn = mesh_table_hash, + }; +@@ -426,20 +426,21 @@ static void mesh_fast_tx_entry_free(stru + } + + struct ieee80211_mesh_fast_tx * +-mesh_fast_tx_get(struct ieee80211_sub_if_data *sdata, const u8 *addr) ++mesh_fast_tx_get(struct ieee80211_sub_if_data *sdata, ++ struct ieee80211_mesh_fast_tx_key *key) + { + struct ieee80211_mesh_fast_tx *entry; + struct mesh_tx_cache *cache; + + cache = &sdata->u.mesh.tx_cache; +- entry = rhashtable_lookup(&cache->rht, addr, fast_tx_rht_params); ++ entry = rhashtable_lookup(&cache->rht, key, fast_tx_rht_params); + if (!entry) + return NULL; + + if (!(entry->mpath->flags & MESH_PATH_ACTIVE) || + mpath_expired(entry->mpath)) { + spin_lock_bh(&cache->walk_lock); +- entry = rhashtable_lookup(&cache->rht, addr, fast_tx_rht_params); ++ entry = rhashtable_lookup(&cache->rht, key, fast_tx_rht_params); + if (entry) + mesh_fast_tx_entry_free(cache, entry); + spin_unlock_bh(&cache->walk_lock); +@@ -484,18 +485,24 @@ void mesh_fast_tx_cache(struct ieee80211 + if (!sta) + return; + ++ build.key.type = MESH_FAST_TX_TYPE_LOCAL; + if ((meshhdr->flags & MESH_FLAGS_AE) == MESH_FLAGS_AE_A5_A6) { + /* This is required to keep the mppath alive */ + mppath = mpp_path_lookup(sdata, meshhdr->eaddr1); + if (!mppath) + return; + build.mppath = mppath; ++ if (!ether_addr_equal(meshhdr->eaddr2, sdata->vif.addr)) ++ build.key.type = MESH_FAST_TX_TYPE_PROXIED; + } else if (ieee80211_has_a4(hdr->frame_control)) { + mppath = mpath; + } else { + return; + } + ++ if (!ether_addr_equal(hdr->addr4, sdata->vif.addr)) ++ build.key.type = MESH_FAST_TX_TYPE_FORWARDED; ++ + /* rate limit, in case fast xmit can't be enabled */ + if (mppath->fast_tx_check == jiffies) + return; +@@ -542,7 +549,7 @@ void mesh_fast_tx_cache(struct ieee80211 + } + } + +- memcpy(build.addr_key, mppath->dst, ETH_ALEN); ++ memcpy(build.key.addr, mppath->dst, ETH_ALEN); + build.timestamp = jiffies; + build.fast_tx.band = info->band; + build.fast_tx.da_offs = offsetof(struct ieee80211_hdr, addr3); +@@ -644,13 +651,19 @@ void mesh_fast_tx_flush_addr(struct ieee + const u8 *addr) + { + struct mesh_tx_cache *cache = &sdata->u.mesh.tx_cache; ++ struct ieee80211_mesh_fast_tx_key key = {}; + struct ieee80211_mesh_fast_tx *entry; ++ int i; + ++ ether_addr_copy(key.addr, addr); + cache = &sdata->u.mesh.tx_cache; + spin_lock_bh(&cache->walk_lock); +- entry = rhashtable_lookup(&cache->rht, addr, fast_tx_rht_params); +- if (entry) +- mesh_fast_tx_entry_free(cache, entry); ++ for (i = MESH_FAST_TX_TYPE_LOCAL; i < MESH_FAST_TX_TYPE_FORWARDED; i++) { ++ key.type = i; ++ entry = rhashtable_lookup(&cache->rht, &key, fast_tx_rht_params); ++ if (entry) ++ mesh_fast_tx_entry_free(cache, entry); ++ } + spin_unlock_bh(&cache->walk_lock); + } + +--- a/net/mac80211/rx.c ++++ b/net/mac80211/rx.c +@@ -2726,7 +2726,10 @@ ieee80211_rx_mesh_fast_forward(struct ie + struct sk_buff *skb, int hdrlen) + { + struct ieee80211_if_mesh *ifmsh = &sdata->u.mesh; +- struct ieee80211_mesh_fast_tx *entry = NULL; ++ struct ieee80211_mesh_fast_tx_key key = { ++ .type = MESH_FAST_TX_TYPE_FORWARDED ++ }; ++ struct ieee80211_mesh_fast_tx *entry; + struct ieee80211s_hdr *mesh_hdr; + struct tid_ampdu_tx *tid_tx; + struct sta_info *sta; +@@ -2735,9 +2738,13 @@ ieee80211_rx_mesh_fast_forward(struct ie + + mesh_hdr = (struct ieee80211s_hdr *)(skb->data + sizeof(eth)); + if ((mesh_hdr->flags & MESH_FLAGS_AE) == MESH_FLAGS_AE_A5_A6) +- entry = mesh_fast_tx_get(sdata, mesh_hdr->eaddr1); ++ ether_addr_copy(key.addr, mesh_hdr->eaddr1); + else if (!(mesh_hdr->flags & MESH_FLAGS_AE)) +- entry = mesh_fast_tx_get(sdata, skb->data); ++ ether_addr_copy(key.addr, skb->data); ++ else ++ return false; ++ ++ entry = mesh_fast_tx_get(sdata, &key); + if (!entry) + return false; + diff --git a/package/kernel/mac80211/patches/subsys/340-mac80211-always-use-mac80211-loss-detection.patch b/package/kernel/mac80211/patches/subsys/340-mac80211-always-use-mac80211-loss-detection.patch deleted file mode 100644 index e084773fd..000000000 --- a/package/kernel/mac80211/patches/subsys/340-mac80211-always-use-mac80211-loss-detection.patch +++ /dev/null @@ -1,36 +0,0 @@ -From cdf461888f900c3a149b10a04d72b4a590ecdec3 Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Tue, 16 May 2023 23:11:32 +0200 -Subject: [PATCH] mac80211: always use mac80211 loss detection - -ath10k does not report excessive loss in case of broken block-ack -sessions. The loss is communicated to the host-os, but ath10k does not -trigger a low-ack events by itself. - -The mac80211 framework for loss detection however detects this -circumstance well in case of ath10k. So use it regardless of ath10k's -own loss detection mechanism. - -Patching this in mac80211 does allow this hack to be used with any -flavor of ath10k/ath11k. - -Signed-off-by: David Bauer ---- - net/mac80211/status.c | 6 ------ - 1 file changed, 6 deletions(-) - ---- a/net/mac80211/status.c -+++ b/net/mac80211/status.c -@@ -794,12 +794,6 @@ static void ieee80211_lost_packet(struct - unsigned long pkt_time = STA_LOST_PKT_TIME; - unsigned int pkt_thr = STA_LOST_PKT_THRESHOLD; - -- /* If driver relies on its own algorithm for station kickout, skip -- * mac80211 packet loss mechanism. -- */ -- if (ieee80211_hw_check(&sta->local->hw, REPORTS_LOW_ACK)) -- return; -- - /* This packet was aggregated but doesn't carry status info */ - if ((info->flags & IEEE80211_TX_CTL_AMPDU) && - !(info->flags & IEEE80211_TX_STAT_AMPDU)) diff --git a/package/kernel/mac80211/patches/subsys/401-mac80211-allow-vht-on-2g.patch b/package/kernel/mac80211/patches/subsys/401-mac80211-allow-vht-on-2g.patch new file mode 100644 index 000000000..5d8742ba9 --- /dev/null +++ b/package/kernel/mac80211/patches/subsys/401-mac80211-allow-vht-on-2g.patch @@ -0,0 +1,36 @@ +--- a/net/mac80211/vht.c ++++ b/net/mac80211/vht.c +@@ -135,7 +135,8 @@ ieee80211_vht_cap_ie_to_sta_vht_cap(stru + have_80mhz = false; + for (i = 0; i < sband->n_channels; i++) { + if (sband->channels[i].flags & (IEEE80211_CHAN_DISABLED | +- IEEE80211_CHAN_NO_80MHZ)) ++ IEEE80211_CHAN_NO_80MHZ) & ++ (sband->band != NL80211_BAND_2GHZ)) + continue; + + have_80mhz = true; +--- a/net/mac80211/util.c ++++ b/net/mac80211/util.c +@@ -1955,7 +1955,8 @@ static int ieee80211_build_preq_ies_band + /* Check if any channel in this sband supports at least 80 MHz */ + for (i = 0; i < sband->n_channels; i++) { + if (sband->channels[i].flags & (IEEE80211_CHAN_DISABLED | +- IEEE80211_CHAN_NO_80MHZ)) ++ IEEE80211_CHAN_NO_80MHZ) & ++ (sband->band != NL80211_BAND_2GHZ)) + continue; + + have_80mhz = true; +--- a/net/mac80211/mlme.c ++++ b/net/mac80211/mlme.c +@@ -4744,7 +4744,8 @@ static int ieee80211_prep_channel(struct + have_80mhz = false; + for (i = 0; i < sband->n_channels; i++) { + if (sband->channels[i].flags & (IEEE80211_CHAN_DISABLED | +- IEEE80211_CHAN_NO_80MHZ)) ++ IEEE80211_CHAN_NO_80MHZ) & ++ (sband->band != NL80211_BAND_2GHZ)) + continue; + + have_80mhz = true; diff --git a/package/kernel/mac80211/patches/subsys/500-mac80211_configure_antenna_gain.patch b/package/kernel/mac80211/patches/subsys/500-mac80211_configure_antenna_gain.patch index 58a590682..bc5e7e76c 100644 --- a/package/kernel/mac80211/patches/subsys/500-mac80211_configure_antenna_gain.patch +++ b/package/kernel/mac80211/patches/subsys/500-mac80211_configure_antenna_gain.patch @@ -129,7 +129,7 @@ local->hw.max_mtu = IEEE80211_MAX_DATA_LEN; --- a/net/wireless/nl80211.c +++ b/net/wireless/nl80211.c -@@ -799,6 +799,7 @@ static const struct nla_policy nl80211_p +@@ -823,6 +823,7 @@ static const struct nla_policy nl80211_p [NL80211_ATTR_MLD_ADDR] = NLA_POLICY_EXACT_LEN(ETH_ALEN), [NL80211_ATTR_MLO_SUPPORT] = { .type = NLA_FLAG }, [NL80211_ATTR_MAX_NUM_AKM_SUITES] = { .type = NLA_REJECT }, @@ -137,7 +137,7 @@ }; /* policy for the key attributes */ -@@ -3511,6 +3512,22 @@ static int nl80211_set_wiphy(struct sk_b +@@ -3535,6 +3536,22 @@ static int nl80211_set_wiphy(struct sk_b if (result) goto out; } diff --git a/package/kernel/mac80211/patches/subsys/780-avoid-crashing-missing-band.patch b/package/kernel/mac80211/patches/subsys/780-avoid-crashing-missing-band.patch new file mode 100644 index 000000000..2bc11efd0 --- /dev/null +++ b/package/kernel/mac80211/patches/subsys/780-avoid-crashing-missing-band.patch @@ -0,0 +1,34 @@ +From: David Bauer +Date: Thu, 30 Nov 2023 07:32:52 +0100 +Subject: [PATCH] mac80211: avoid crashing on invalid band info + +Frequent crashes have been observed on MT7916 based platforms. While the +root of these crashes are currently unknown, they happen when decoding +rate information of connected STAs in AP mode. The rate-information is +associated with a band which is not available on the PHY. + +Check for this condition in order to avoid crashing the whole system. +This patch should be removed once the roout cause has been found and +fixed. + +Link: https://github.com/freifunk-gluon/gluon/issues/2980 + +Signed-off-by: David Bauer +--- + +--- a/net/mac80211/sta_info.c ++++ b/net/mac80211/sta_info.c +@@ -2422,6 +2422,13 @@ static void sta_stats_decode_rate(struct + + sband = local->hw.wiphy->bands[band]; + ++ if (!sband) { ++ wiphy_warn(local->hw.wiphy, ++ "Invalid band %d\n", ++ band); ++ break; ++ } ++ + if (WARN_ON_ONCE(!sband->bitrates)) + break; + diff --git a/package/kernel/mac80211/patches/subsys/800-rework-eth_hw_addr_set.patch b/package/kernel/mac80211/patches/subsys/800-rework-eth_hw_addr_set.patch new file mode 100644 index 000000000..20f857f2d --- /dev/null +++ b/package/kernel/mac80211/patches/subsys/800-rework-eth_hw_addr_set.patch @@ -0,0 +1,11 @@ +--- a/backport-include/linux/etherdevice.h ++++ b/backport-include/linux/etherdevice.h +@@ -39,7 +39,7 @@ static inline void u64_to_ether_addr(u64 + } + #endif /* LINUX_VERSION_IS_LESS(4,11,0) */ + +-#if LINUX_VERSION_IS_LESS(5,15,0) ++#if LINUX_VERSION_IS_LESS(5,4,0) + /** + * eth_hw_addr_set - Assign Ethernet address to a net_device + * @dev: pointer to net_device structure diff --git a/package/kernel/mac80211/realtek.mk b/package/kernel/mac80211/realtek.mk index 40af2f0f4..2f1fa8376 100644 --- a/package/kernel/mac80211/realtek.mk +++ b/package/kernel/mac80211/realtek.mk @@ -1,9 +1,7 @@ PKG_DRIVERS += \ rtlwifi rtlwifi-pci rtlwifi-btcoexist rtlwifi-usb rtl8192c-common \ rtl8192ce rtl8192se rtl8192de rtl8192cu rtl8723bs rtl8821ae \ - rtl8xxxu rtw88 rtw88-pci rtw88-usb rtw88-8821c rtw88-8822b rtw88-8822c \ - rtw88-8723d rtw88-8821ce rtw88-8821cu rtw88-8822be rtw88-8822bu \ - rtw88-8822ce rtw88-8822cu rtw88-8723de rtw89 + rtl8xxxu rtw88 config-$(call config_package,rtlwifi) += RTL_CARDS RTLWIFI config-$(call config_package,rtlwifi-pci) += RTLWIFI_PCI @@ -23,29 +21,11 @@ config-y += RTL8XXXU_UNTESTED config-$(call config_package,rtl8723bs) += RTL8723BS config-y += STAGING -config-$(call config_package,rtw88) += RTW88 RTW88_CORE -config-$(call config_package,rtw88-pci) += RTW88_PCI -config-$(call config_package,rtw88-usb) += RTW88_USB -config-$(call config_package,rtw88-8821c) += RTW88_8821C -config-$(call config_package,rtw88-8821ce) += RTW88_8821CE -config-$(call config_package,rtw88-8821cu) += RTW88_8821CU -config-$(call config_package,rtw88-8822b) += RTW88_8822B -config-$(call config_package,rtw88-8822be) += RTW88_8822BE -config-$(call config_package,rtw88-8822bu) += RTW88_8822BU -config-$(call config_package,rtw88-8822c) += RTW88_8822C -config-$(call config_package,rtw88-8822ce) += RTW88_8822CE -config-$(call config_package,rtw88-8822cu) += RTW88_8822CU -config-$(call config_package,rtw88-8723d) += RTW88_8723D -config-$(call config_package,rtw88-8723de) += RTW88_8723DE +config-$(call config_package,rtw88) += RTW88 RTW88_CORE RTW88_PCI +config-y += RTW88_8821CE RTW88_8822BE RTW88_8822CE RTW88_8723DE config-$(CONFIG_PACKAGE_RTW88_DEBUG) += RTW88_DEBUG config-$(CONFIG_PACKAGE_RTW88_DEBUGFS) += RTW88_DEBUGFS -config-$(call config_package,rtw89) += RTW89 RTW89_CORE RTW89_PCI -config-y += RTW89_8852AE RTW89_8852BE RTW89_8852CE -config-$(CONFIG_PACKAGE_RTW89_DEBUG) += RTW89_DEBUG -config-$(CONFIG_PACKAGE_RTW89_DEBUGFS) += RTW89_DEBUGFS -config-$(CONFIG_PACKAGE_RTW89_DEBUGMSG) += RTW89_DEBUGMSG - define KernelPackage/rtlwifi/config config PACKAGE_RTLWIFI_DEBUG bool "Realtek wireless debugging" @@ -58,7 +38,7 @@ endef define KernelPackage/rtlwifi $(call KernelPackage/mac80211/Default) TITLE:=Realtek common driver part - DEPENDS+= @(PCI_SUPPORT||USB_SUPPORT) +kmod-mac80211 + DEPENDS+= @(PCI_SUPPORT||USB_SUPPORT) +kmod-mac80211 +@DRIVER_11N_SUPPORT FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtlwifi/rtlwifi.ko HIDDEN:=1 endef @@ -188,121 +168,20 @@ endef define KernelPackage/rtw88 $(call KernelPackage/mac80211/Default) - TITLE:=Realtek RTW88 common part - DEPENDS+= @(PCI_SUPPORT||USB_SUPPORT) +kmod-mac80211 - FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_core.ko - AUTOLOAD:=$(call AutoProbe,rtw88_core) - HIDDEN:=1 -endef - -define KernelPackage/rtw88-pci - $(call KernelPackage/mac80211/Default) - TITLE:=Realtek RTW88 PCI chips support - DEPENDS+= @PCI_SUPPORT +kmod-rtw88 - FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_pci.ko - AUTOLOAD:=$(call AutoProbe,rtw88_pci) - HIDDEN:=1 -endef - -define KernelPackage/rtw88-usb - $(call KernelPackage/mac80211/Default) - TITLE:=Realtek RTW88 USB chips support - DEPENDS+= @USB_SUPPORT +kmod-rtw88 +kmod-usb-core - FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_usb.ko - AUTOLOAD:=$(call AutoProbe,rtw88_usb) - HIDDEN:=1 -endef - -define KernelPackage/rtw88-8821c - $(call KernelPackage/mac80211/Default) - TITLE:=Realtek RTL8821C family support - DEPENDS+= +kmod-rtw88 +rtl8821ce-firmware +@DRIVER_11AC_SUPPORT - FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8821c.ko - AUTOLOAD:=$(call AutoProbe,rtw88_8821c) - HIDDEN:=1 -endef - -define KernelPackage/rtw88-8822b - $(call KernelPackage/mac80211/Default) - TITLE:=Realtek RTL8822B family support - DEPENDS+= +kmod-rtw88 +rtl8822be-firmware +@DRIVER_11AC_SUPPORT - FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822b.ko - AUTOLOAD:=$(call AutoProbe,rtw88_8822b) - HIDDEN:=1 -endef - -define KernelPackage/rtw88-8822c - $(call KernelPackage/mac80211/Default) - TITLE:=Realtek RTL8822C family support - DEPENDS+= +kmod-rtw88 +rtl8822ce-firmware +@DRIVER_11AC_SUPPORT - FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822c.ko - AUTOLOAD:=$(call AutoProbe,rtw88_8822c) - HIDDEN:=1 -endef - -define KernelPackage/rtw88-8723d - $(call KernelPackage/mac80211/Default) - TITLE:=Realtek RTL8723D family support - DEPENDS+= +kmod-rtw88 +rtl8723de-firmware - FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8723d.ko - AUTOLOAD:=$(call AutoProbe,rtw88_8723d) - HIDDEN:=1 -endef - -define KernelPackage/rtw88-8821ce - $(call KernelPackage/mac80211/Default) - TITLE:=Realtek RTL8821CE support - DEPENDS+= +kmod-rtw88-pci +kmod-rtw88-8821c - FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8821ce.ko - AUTOLOAD:=$(call AutoProbe,rtw88_8821ce) -endef - -define KernelPackage/rtw88-8821cu - $(call KernelPackage/mac80211/Default) - TITLE:=Realtek RTL8821CU support - DEPENDS+= +kmod-rtw88-usb +kmod-rtw88-8821c - FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8821cu.ko - AUTOLOAD:=$(call AutoProbe,rtw88_8821cu) -endef - -define KernelPackage/rtw88-8822be - $(call KernelPackage/mac80211/Default) - TITLE:=Realtek RTL8822BE support - DEPENDS+= +kmod-rtw88-pci +kmod-rtw88-8822b - FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822be.ko - AUTOLOAD:=$(call AutoProbe,rtw88_8822be) -endef - -define KernelPackage/rtw88-8822bu - $(call KernelPackage/mac80211/Default) - TITLE:=Realtek RTL8822BU support - DEPENDS+= +kmod-rtw88-usb +kmod-rtw88-8822b - FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822bu.ko - AUTOLOAD:=$(call AutoProbe,rtw88_8822bu) -endef - -define KernelPackage/rtw88-8822ce - $(call KernelPackage/mac80211/Default) - TITLE:=Realtek RTL8822CE support - DEPENDS+= +kmod-rtw88-pci +kmod-rtw88-8822c - FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822ce.ko - AUTOLOAD:=$(call AutoProbe,rtw88_8822ce) -endef - -define KernelPackage/rtw88-8822cu - $(call KernelPackage/mac80211/Default) - TITLE:=Realtek RTL8822CU support - DEPENDS+= +kmod-rtw88-usb +kmod-rtw88-8822c - FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822cu.ko - AUTOLOAD:=$(call AutoProbe,rtw88_8822cu) -endef - -define KernelPackage/rtw88-8723de - $(call KernelPackage/mac80211/Default) - TITLE:=Realtek RTL8723DE support - DEPENDS+= +kmod-rtw88-pci +kmod-rtw88-8723d - FILES:= $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8723de.ko - AUTOLOAD:=$(call AutoProbe,rtw88_8723) + TITLE:=Realtek RTL8821CE/RTL8822BE/RTL8822CE/RTL8723DE + DEPENDS+= @(PCI_SUPPORT) +kmod-mac80211 +@DRIVER_11AC_SUPPORT +@DRIVER_11N_SUPPORT + FILES:=\ + $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8821ce.ko \ + $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8821c.ko \ + $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822be.ko \ + $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822b.ko \ + $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822ce.ko \ + $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8822c.ko \ + $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8723de.ko \ + $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_8723d.ko \ + $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_core.ko \ + $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw88/rtw88_pci.ko + AUTOLOAD:=$(call AutoProbe,rtw88_8821ce rtw88_8822be rtw88_8822ce rtw88_8723de) endef define KernelPackage/rtl8723bs @@ -318,40 +197,3 @@ define KernelPackage/rtl8723bs/description on the 1st gen Intel Compute Stick, the CHIP and many other Intel Atom and ARM based devices. endef - -define KernelPackage/rtw89/config - config PACKAGE_RTW89_DEBUG - bool "Realtek wireless debugging (rtw89)" - depends on PACKAGE_kmod-rtw89 - help - Enable debugging output for rtw89 devices - - config PACKAGE_RTW89_DEBUGFS - bool "Enable rtw89 debugfs support" - select KERNEL_DEBUG_FS - depends on PACKAGE_kmod-rtw89 - help - Select this to see extensive information about - the internal state of rtw89 in debugfs. - config PACKAGE_RTW89_DEBUGMSG - bool "Realtek rtw89 debug message support" - depends on PACKAGE_kmod-rtw89 - help - Enable debug message support -endef - -define KernelPackage/rtw89 - $(call KernelPackage/mac80211/Default) - TITLE:=Realtek RTL8852AE/BE/CE - DEPENDS+= @(PCI_SUPPORT) +kmod-mac80211 +@DRIVER_11AX_SUPPORT +rtl8851be-firmware +rtl8852ae-firmware +rtl8852be-firmware +rtl8852ce-firmware - FILES:=\ - $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_8852a.ko \ - $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_8852ae.ko \ - $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_8852b.ko \ - $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_8852be.ko \ - $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_8852c.ko \ - $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_8852ce.ko \ - $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_core.ko \ - $(PKG_BUILD_DIR)/drivers/net/wireless/realtek/rtw89/rtw89_pci.ko - AUTOLOAD:=$(call AutoProbe,rtw89_8852ae rtw89_8852be rtw89_8852ce) -endef diff --git a/package/kernel/rtw88-usb/Makefile b/package/kernel/rtw88-usb/Makefile new file mode 100644 index 000000000..7afa41c7f --- /dev/null +++ b/package/kernel/rtw88-usb/Makefile @@ -0,0 +1,105 @@ +# +# Copyright (C) 2017 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk + +PKG_NAME:=rtw88-usb +PKG_RELEASE:=1 + +PKG_SOURCE_PROTO:=git +PKG_SOURCE_DATE:=2024-04-10 +PKG_SOURCE_URL:=https://github.com/lwfinger/rtw88.git +PKG_SOURCE_VERSION:=2e9f468009df592a51990d024928034e0af1c2b4 +PKG_MIRROR_HASH:=684b30e58d8b990bbe141baae00c48439f45c9f39faa6f552ffb18afb6594c74 + +PKG_BUILD_PARALLEL:=1 + +STAMP_CONFIGURED_DEPENDS := $(STAGING_DIR)/usr/include/mac80211-backport/backport/autoconf.h + +include $(INCLUDE_DIR)/kernel.mk +include $(INCLUDE_DIR)/package.mk + +define KernelPackage/rtw88-default + SUBMENU:=Wireless Drivers + TITLE:=Realtek rtw88 family usb driver + DEPENDS:=+kmod-mac80211 +kmod-usb-core \ + +@DRIVER_11N_SUPPORT +@DRIVER_11AC_SUPPORT +endef + +define KernelPackage/rtw88-usb + $(KernelPackage/rtw88-default) + HIDDEN:=1 + FILES:= \ + $(PKG_BUILD_DIR)/rtw_core.ko \ + $(PKG_BUILD_DIR)/rtw_usb.ko +endef + +define KernelPackage/rtl8723du + $(KernelPackage/rtw88-default) + TITLE:=Realtek RTL8723DU support + DEPENDS+=+kmod-rtw88-usb +rtl8723du-firmware + FILES:= \ + $(PKG_BUILD_DIR)/rtw_8723d.ko \ + $(PKG_BUILD_DIR)/rtw_8723du.ko + AUTOLOAD:=$(call AutoProbe,rtw_8723du) +endef + +define KernelPackage/rtl8821cu + $(KernelPackage/rtw88-default) + TITLE:=Realtek RTL8821CU support + DEPENDS+=+kmod-rtw88-usb +rtl8821ce-firmware + FILES:= \ + $(PKG_BUILD_DIR)/rtw_8821c.ko \ + $(PKG_BUILD_DIR)/rtw_8821cu.ko + AUTOLOAD:=$(call AutoProbe,rtw_8821cu) +endef + +define KernelPackage/rtl8822bu + $(KernelPackage/rtw88-default) + TITLE:=Realtek RTL8822BU support + DEPENDS+=+kmod-rtw88-usb +rtl8822be-firmware + FILES:= \ + $(PKG_BUILD_DIR)/rtw_8822b.ko \ + $(PKG_BUILD_DIR)/rtw_8822bu.ko + AUTOLOAD:=$(call AutoProbe,rtw_8822bu) +endef + +define KernelPackage/rtl8822cu + $(KernelPackage/rtw88-default) + TITLE:=Realtek RTL8822CU support + DEPENDS+=+kmod-rtw88-usb +rtl8822ce-firmware + FILES:= \ + $(PKG_BUILD_DIR)/rtw_8822c.ko \ + $(PKG_BUILD_DIR)/rtw_8822cu.ko + AUTOLOAD:=$(call AutoProbe,rtw_8822cu) +endef + +NOSTDINC_FLAGS := \ + $(KERNEL_NOSTDINC_FLAGS) \ + -I$(PKG_BUILD_DIR) \ + -I$(STAGING_DIR)/usr/include/mac80211-backport/uapi \ + -I$(STAGING_DIR)/usr/include/mac80211-backport \ + -I$(STAGING_DIR)/usr/include/mac80211/uapi \ + -I$(STAGING_DIR)/usr/include/mac80211 \ + -include backport/autoconf.h \ + -include backport/backport.h + +NOSTDINC_FLAGS+=-DBUILD_OPENWRT + +define Build/Compile + +$(MAKE) $(PKG_JOBS) -C "$(LINUX_DIR)" \ + $(KERNEL_MAKE_FLAGS) \ + M="$(PKG_BUILD_DIR)" \ + NOSTDINC_FLAGS="$(NOSTDINC_FLAGS)" \ + modules +endef + +$(eval $(call KernelPackage,rtw88-usb)) +$(eval $(call KernelPackage,rtl8723du)) +$(eval $(call KernelPackage,rtl8821cu)) +$(eval $(call KernelPackage,rtl8822bu)) +$(eval $(call KernelPackage,rtl8822cu)) diff --git a/package/kernel/rtw88-usb/patches/001-fix-merge-error.patch b/package/kernel/rtw88-usb/patches/001-fix-merge-error.patch new file mode 100644 index 000000000..4439c4f18 --- /dev/null +++ b/package/kernel/rtw88-usb/patches/001-fix-merge-error.patch @@ -0,0 +1,96 @@ +--- a/fw.c ++++ b/fw.c +@@ -1009,7 +1009,7 @@ static u8 rtw_get_rsvd_page_probe_req_location(struct rtw_dev *rtwdev, + if (rsvd_pkt->type != RSVD_PROBE_REQ) + continue; + if ((!ssid && !rsvd_pkt->ssid) || +- cfg80211_ssid_eq(rsvd_pkt->ssid, ssid)) ++ cfg80211_ssid_eq(rsvd_pkt->ssid, ssid)) + location = rsvd_pkt->page; + } + +--- a/mac.c ++++ b/mac.c +@@ -316,13 +316,6 @@ static int rtw_mac_power_switch(struct rtw_dev *rtwdev, bool pwr_on) + rtw_write8_clr(rtwdev, REG_SYS_STATUS1 + 1, BIT(0)); + } + +- if (pwr_on && rtw_hci_type(rtwdev) == RTW_HCI_TYPE_USB) { +- if (chip->id == RTW_CHIP_TYPE_8822C || +- chip->id == RTW_CHIP_TYPE_8822B || +- chip->id == RTW_CHIP_TYPE_8821C) +- rtw_write8_clr(rtwdev, REG_SYS_STATUS1 + 1, BIT(0)); +- } +- + if (rtw_hci_type(rtwdev) == RTW_HCI_TYPE_SDIO) + rtw_write32(rtwdev, REG_SDIO_HIMR, imr); + +@@ -956,18 +949,6 @@ static int __rtw_download_firmware_legacy(struct rtw_dev *rtwdev, + rtw_write8(rtwdev, REG_MCUFW_CTRL, 0x00); + } + +- /* reset firmware if still present */ +- if (rtwdev->chip->id == RTW_CHIP_TYPE_8703B && +- rtw_read8_mask(rtwdev, REG_MCUFW_CTRL, BIT_RAM_DL_SEL)) { +- rtw_write8(rtwdev, REG_MCUFW_CTRL, 0x00); +- } +- +- /* reset firmware if still present */ +- if (rtwdev->chip->id == RTW_CHIP_TYPE_8703B && +- rtw_read8_mask(rtwdev, REG_MCUFW_CTRL, BIT_RAM_DL_SEL)) { +- rtw_write8(rtwdev, REG_MCUFW_CTRL, 0x00); +- } +- + en_download_firmware_legacy(rtwdev, true); + ret = download_firmware_legacy(rtwdev, fw->firmware->data, fw->firmware->size); + en_download_firmware_legacy(rtwdev, false); +--- a/main.c ++++ b/main.c +@@ -110,9 +110,7 @@ static const struct ieee80211_iface_limit rtw_iface_limits[] = { + }, + { + .max = 1, +- .types = BIT(NL80211_IFTYPE_AP) | +- BIT(NL80211_IFTYPE_P2P_CLIENT) | +- BIT(NL80211_IFTYPE_P2P_GO) ++ .types = BIT(NL80211_IFTYPE_AP), + } + }; + +@@ -2124,11 +2122,6 @@ static int rtw_chip_efuse_info_setup(struct rtw_dev *rtwdev) + dev_warn(rtwdev->dev, "efuse MAC invalid, using random\n"); + } + +- if (!is_valid_ether_addr(efuse->addr)) { +- eth_random_addr(efuse->addr); +- dev_warn(rtwdev->dev, "efuse MAC invalid, using random\n"); +- } +- + out_disable: + rtw_chip_efuse_disable(rtwdev); + +@@ -2361,9 +2354,7 @@ int rtw_register_hw(struct rtw_dev *rtwdev, struct ieee80211_hw *hw) + hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | + BIT(NL80211_IFTYPE_AP) | + BIT(NL80211_IFTYPE_ADHOC) | +- BIT(NL80211_IFTYPE_MESH_POINT) | +- BIT(NL80211_IFTYPE_P2P_CLIENT) | +- BIT(NL80211_IFTYPE_P2P_GO); ++ BIT(NL80211_IFTYPE_MESH_POINT); + hw->wiphy->available_antennas_tx = hal->antenna_tx; + hw->wiphy->available_antennas_rx = hal->antenna_rx; + +--- a/usb.c ++++ b/usb.c +@@ -93,11 +93,6 @@ static u32 rtw_usb_read(struct rtw_dev *rtwdev, u32 addr, u16 len) + rtwdev->chip->id == RTW_CHIP_TYPE_8821C) + rtw_usb_reg_sec(rtwdev, addr, data); + +- if (rtwdev->chip->id == RTW_CHIP_TYPE_8822C || +- rtwdev->chip->id == RTW_CHIP_TYPE_8822B || +- rtwdev->chip->id == RTW_CHIP_TYPE_8821C) +- rtw_usb_reg_sec(rtwdev, addr, data); +- + return le32_to_cpu(*data); + } + diff --git a/package/kernel/rtw88-usb/patches/101-wireless-6.1.patch b/package/kernel/rtw88-usb/patches/101-wireless-6.1.patch new file mode 100644 index 000000000..37a9bca9f --- /dev/null +++ b/package/kernel/rtw88-usb/patches/101-wireless-6.1.patch @@ -0,0 +1,432 @@ +--- a/bf.c ++++ b/bf.c +@@ -57,7 +57,7 @@ void rtw_bf_assoc(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, + } + + ic_vht_cap = &hw->wiphy->bands[NL80211_BAND_5GHZ]->vht_cap; +-#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 19, 0) && !defined(BUILD_OPENWRT) + vht_cap = &sta->vht_cap; + #else + vht_cap = &sta->deflink.vht_cap; +@@ -75,7 +75,7 @@ void rtw_bf_assoc(struct rtw_dev *rtwdev, struct ieee80211_vif *vif, + ether_addr_copy(bfee->mac_addr, bssid); + bfee->role = RTW_BFEE_MU; + bfee->p_aid = (bssid[5] << 1) | (bssid[4] >> 7); +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) || defined(BUILD_OPENWRT) + bfee->aid = vif->cfg.aid; + #else + bfee->aid = bss_conf->aid; +--- a/fw.c ++++ b/fw.c +@@ -191,7 +191,7 @@ legacy: + si->ra_report.desc_rate = rate; + si->ra_report.bit_rate = bit_rate; + +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0) || defined(BUILD_OPENWRT) + sta->deflink.agg.max_rc_amsdu_len = get_max_amsdu_len(bit_rate); + #else + sta->max_rc_amsdu_len = get_max_amsdu_len(bit_rate); +@@ -726,7 +726,7 @@ void rtw_fw_send_rssi_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) + rtw_fw_send_h2c_command(rtwdev, h2c_pkt); + } + +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0) || defined(BUILD_OPENWRT) + void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + bool reset_ra_mask) + #else +@@ -735,7 +735,7 @@ void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si) + { + u8 h2c_pkt[H2C_PKT_SIZE] = {0}; + bool disable_pt = true; +-#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 18, 0) ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 18, 0) && !defined(BUILD_OPENWRT) + bool reset_ra_mask = true; + #endif + +@@ -1228,7 +1228,7 @@ static struct sk_buff *rtw_get_rsvd_page_skb(struct ieee80211_hw *hw, + + switch (rsvd_pkt->type) { + case RSVD_BEACON: +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) || defined(BUILD_OPENWRT) + skb_new = ieee80211_beacon_get_tim(hw, vif, &tim_offset, NULL, 0); + #else + skb_new = ieee80211_beacon_get_tim(hw, vif, &tim_offset, NULL); +@@ -1243,7 +1243,7 @@ static struct sk_buff *rtw_get_rsvd_page_skb(struct ieee80211_hw *hw, + break; + case RSVD_NULL: + #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 17) +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0) || defined(BUILD_OPENWRT) + skb_new = ieee80211_nullfunc_get(hw, vif, -1, false); + #else + skb_new = ieee80211_nullfunc_get(hw, vif, false); +@@ -1254,7 +1254,7 @@ static struct sk_buff *rtw_get_rsvd_page_skb(struct ieee80211_hw *hw, + break; + case RSVD_QOS_NULL: + #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 14, 17) +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0) || defined(BUILD_OPENWRT) + skb_new = ieee80211_nullfunc_get(hw, vif, -1, true); + #else + skb_new = ieee80211_nullfunc_get(hw, vif, true); +--- a/fw.h ++++ b/fw.h +@@ -834,7 +834,7 @@ void rtw_fw_coex_query_hid_info(struct rtw_dev *rtwdev, u8 sub_id, u8 data); + + void rtw_fw_bt_wifi_control(struct rtw_dev *rtwdev, u8 op_code, u8 *data); + void rtw_fw_send_rssi_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si); +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0) || defined(BUILD_OPENWRT) + void rtw_fw_send_ra_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + bool reset_ra_mask); + #else +--- a/mac80211.c ++++ b/mac80211.c +@@ -365,7 +365,7 @@ static void rtw_conf_tx(struct rtw_dev *rtwdev, + static void rtw_ops_bss_info_changed(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + struct ieee80211_bss_conf *conf, +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) || defined(BUILD_OPENWRT) + u64 changed) + #else + u32 changed) +@@ -383,7 +383,7 @@ static void rtw_ops_bss_info_changed(struct ieee80211_hw *hw, + + if (changed & BSS_CHANGED_ASSOC) { + rtw_vif_assoc_changed(rtwvif, conf); +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) || defined(BUILD_OPENWRT) + if (vif->cfg.assoc) { + #else + if (conf->assoc) { +@@ -393,7 +393,7 @@ static void rtw_ops_bss_info_changed(struct ieee80211_hw *hw, + rtw_fw_download_rsvd_page(rtwdev); + rtw_send_rsvd_page_h2c(rtwdev); + rtw_fw_default_port(rtwdev, rtwvif); +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) || defined(BUILD_OPENWRT) + rtw_coex_media_status_notify(rtwdev, vif->cfg.assoc); + #else + rtw_coex_media_status_notify(rtwdev, conf->assoc); +@@ -460,7 +460,7 @@ static void rtw_ops_bss_info_changed(struct ieee80211_hw *hw, + mutex_unlock(&rtwdev->mutex); + } + +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) || defined(BUILD_OPENWRT) + static int rtw_ops_start_ap(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + struct ieee80211_bss_conf *link_conf) +@@ -481,7 +481,7 @@ static int rtw_ops_start_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif) + return 0; + } + +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) || defined(BUILD_OPENWRT) + static void rtw_ops_stop_ap(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, + struct ieee80211_bss_conf *link_conf) +@@ -502,7 +502,7 @@ static void rtw_ops_stop_ap(struct ieee80211_hw *hw, + + static int rtw_ops_conf_tx(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) || defined(BUILD_OPENWRT) + unsigned int link_id, u16 ac, + #else + u16 ac, +@@ -731,7 +731,7 @@ static void rtw_ops_sw_scan_complete(struct ieee80211_hw *hw, + #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 18, 0) + static void rtw_ops_mgd_prepare_tx(struct ieee80211_hw *hw, + struct ieee80211_vif *vif, +- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,14,0)) ++ #if (LINUX_VERSION_CODE >= KERNEL_VERSION(5,14,0)) || defined(BUILD_OPENWRT) + struct ieee80211_prep_tx_info *info) + #else + u16 duration) +--- a/main.c ++++ b/main.c +@@ -191,7 +191,7 @@ static void rtw_vif_watch_dog_iter(void *data, struct ieee80211_vif *vif) + struct rtw_vif *rtwvif = (struct rtw_vif *)vif->drv_priv; + + if (vif->type == NL80211_IFTYPE_STATION) +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) || defined(BUILD_OPENWRT) + if (vif->cfg.assoc) + #else + if (vif->bss_conf.assoc) +@@ -343,7 +343,7 @@ int rtw_sta_add(struct rtw_dev *rtwdev, struct ieee80211_sta *sta, + if (si->mac_id >= RTW_MAX_MAC_ID_NUM) + return -ENOSPC; + +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) || defined(BUILD_OPENWRT) + if (vif->type == NL80211_IFTYPE_STATION && vif->cfg.assoc == 0) + #else + if (vif->type == NL80211_IFTYPE_STATION && vif->bss_conf.assoc == 0) +@@ -572,7 +572,7 @@ EXPORT_SYMBOL(rtw_dump_reg); + void rtw_vif_assoc_changed(struct rtw_vif *rtwvif, + struct ieee80211_bss_conf *conf) + { +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) || defined(BUILD_OPENWRT) + struct ieee80211_vif *vif = NULL; + + if (conf) +@@ -1000,7 +1000,7 @@ static void rtw_hw_config_rf_ant_num(struct rtw_dev *rtwdev, u8 hw_ant_num) + static u64 get_vht_ra_mask(struct ieee80211_sta *sta) + { + u64 ra_mask = 0; +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + u16 mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.rx_mcs_map); + #else + u16 mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.rx_mcs_map); +@@ -1224,26 +1224,26 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + bool is_vht_enable = false; + bool is_support_sgi = false; + +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + if (sta->deflink.vht_cap.vht_supported) { + #else + if (sta->vht_cap.vht_supported) { + #endif + is_vht_enable = true; + ra_mask |= get_vht_ra_mask(sta); +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) + #else + if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXSTBC_MASK) + #endif + stbc_en = VHT_STBC_EN; +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + if (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) + #else + if (sta->vht_cap.cap & IEEE80211_VHT_CAP_RXLDPC) + #endif + ldpc_en = VHT_LDPC_EN; +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + } else if (sta->deflink.ht_cap.ht_supported) { + ra_mask |= (sta->deflink.ht_cap.mcs.rx_mask[1] << 20) | + (sta->deflink.ht_cap.mcs.rx_mask[0] << 12); +@@ -1266,20 +1266,20 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + ra_mask &= RA_MASK_VHT_RATES_1SS | RA_MASK_HT_RATES_1SS; + + if (hal->current_band_type == RTW_BAND_5G) { +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + ra_mask |= (u64)sta->deflink.supp_rates[NL80211_BAND_5GHZ] << 4; + #else + ra_mask |= (u64)sta->supp_rates[NL80211_BAND_5GHZ] << 4; + #endif + ra_mask_bak = ra_mask; +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + if (sta->deflink.vht_cap.vht_supported) { + #else + if (sta->vht_cap.vht_supported) { + #endif + ra_mask &= RA_MASK_VHT_RATES | RA_MASK_OFDM_IN_VHT; + wireless_set = WIRELESS_OFDM | WIRELESS_VHT; +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + } else if (sta->deflink.ht_cap.ht_supported) { + #else + } else if (sta->ht_cap.ht_supported) { +@@ -1291,13 +1291,13 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + } + dm_info->rrsr_val_init = RRSR_INIT_5G; + } else if (hal->current_band_type == RTW_BAND_2G) { +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + ra_mask |= sta->deflink.supp_rates[NL80211_BAND_2GHZ]; + #else + ra_mask |= sta->supp_rates[NL80211_BAND_2GHZ]; + #endif + ra_mask_bak = ra_mask; +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + if (sta->deflink.vht_cap.vht_supported) { + #else + if (sta->vht_cap.vht_supported) { +@@ -1306,7 +1306,7 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + RA_MASK_OFDM_IN_VHT; + wireless_set = WIRELESS_CCK | WIRELESS_OFDM | + WIRELESS_HT | WIRELESS_VHT; +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + } else if (sta->deflink.ht_cap.ht_supported) { + #else + } else if (sta->ht_cap.ht_supported) { +@@ -1315,7 +1315,7 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + RA_MASK_OFDM_IN_HT_2G; + wireless_set = WIRELESS_CCK | WIRELESS_OFDM | + WIRELESS_HT; +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + } else if (sta->deflink.supp_rates[0] <= 0xf) { + #else + } else if (sta->supp_rates[0] <= 0xf) { +@@ -1332,14 +1332,14 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + wireless_set = 0; + } + +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + switch (sta->deflink.bandwidth) { + #else + switch (sta->bandwidth) { + #endif + case IEEE80211_STA_RX_BW_80: + bw_mode = RTW_CHANNEL_WIDTH_80; +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + is_support_sgi = sta->deflink.vht_cap.vht_supported && + (sta->deflink.vht_cap.cap & IEEE80211_VHT_CAP_SHORT_GI_80); + #else +@@ -1349,7 +1349,7 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + break; + case IEEE80211_STA_RX_BW_40: + bw_mode = RTW_CHANNEL_WIDTH_40; +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + is_support_sgi = sta->deflink.ht_cap.ht_supported && + (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_40); + #else +@@ -1359,7 +1359,7 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + break; + default: + bw_mode = RTW_CHANNEL_WIDTH_20; +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + is_support_sgi = sta->deflink.ht_cap.ht_supported && + (sta->deflink.ht_cap.cap & IEEE80211_HT_CAP_SGI_20); + #else +@@ -1369,14 +1369,14 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + break; + } + +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + if (sta->deflink.vht_cap.vht_supported && ra_mask & 0xffc00000) { + #else + if (sta->vht_cap.vht_supported && ra_mask & 0xffc00000) { + #endif + tx_num = 2; + rf_type = RF_2T2R; +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + } else if (sta->deflink.ht_cap.ht_supported && ra_mask & 0xfff00000) { + #else + } else if (sta->ht_cap.ht_supported && ra_mask & 0xfff00000) { +@@ -1400,7 +1400,7 @@ void rtw_update_sta_info(struct rtw_dev *rtwdev, struct rtw_sta_info *si, + si->ra_mask = ra_mask; + si->rate_id = rate_id; + +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0) || defined(BUILD_OPENWRT) + rtw_fw_send_ra_info(rtwdev, si, reset_ra_mask); + #else + rtw_fw_send_ra_info(rtwdev, si); +@@ -1780,7 +1780,7 @@ static void rtw_vif_smps_iter(void *data, u8 *mac, + { + struct rtw_dev *rtwdev = (struct rtw_dev *)data; + +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) || defined(BUILD_OPENWRT) + if (vif->type != NL80211_IFTYPE_STATION || !vif->cfg.assoc) + #else + if (vif->type != NL80211_IFTYPE_STATION || !vif->bss_conf.assoc) +@@ -1788,13 +1788,13 @@ static void rtw_vif_smps_iter(void *data, u8 *mac, + return; + + if (rtwdev->hal.txrx_1ss) +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) || defined(BUILD_OPENWRT) + ieee80211_request_smps(vif, 0, IEEE80211_SMPS_STATIC); + #else + ieee80211_request_smps(vif, IEEE80211_SMPS_STATIC); + #endif + else +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) || defined(BUILD_OPENWRT) + ieee80211_request_smps(vif, 0, IEEE80211_SMPS_OFF); + #else + ieee80211_request_smps(vif, IEEE80211_SMPS_OFF); +@@ -2516,7 +2516,7 @@ static void rtw_check_sta_active_iter(void *data, struct ieee80211_vif *vif) + if (vif->type != NL80211_IFTYPE_STATION) + return; + +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0) || defined(BUILD_OPENWRT) + if (vif->cfg.assoc || !is_zero_ether_addr(rtwvif->bssid)) + #else + if (vif->bss_conf.assoc || !is_zero_ether_addr(rtwvif->bssid)) +--- a/ps.c ++++ b/ps.c +@@ -334,7 +334,7 @@ void rtw_recalc_lps(struct rtw_dev *rtwdev, struct ieee80211_vif *new_vif) + __rtw_vif_recalc_lps(&data, new_vif); + rtw_iterate_vifs(rtwdev, rtw_vif_recalc_lps_iter, &data); + +-#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(6, 0, 0)) || defined(BUILD_OPENWRT) + if (data.count == 1 && data.found_vif->cfg.ps) { + rtwdev->ps_enabled = true; + } else { +--- a/tx.c ++++ b/tx.c +@@ -90,7 +90,7 @@ EXPORT_SYMBOL(rtw_tx_fill_tx_desc); + + static u8 get_tx_ampdu_factor(struct ieee80211_sta *sta) + { +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + u8 exp = sta->deflink.ht_cap.ampdu_factor; + #else + u8 exp = sta->ht_cap.ampdu_factor; +@@ -105,7 +105,7 @@ static u8 get_tx_ampdu_factor(struct ieee80211_sta *sta) + + static u8 get_tx_ampdu_density(struct ieee80211_sta *sta) + { +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + return sta->deflink.ht_cap.ampdu_density; + #else + return sta->ht_cap.ampdu_density; +@@ -117,7 +117,7 @@ static u8 get_highest_ht_tx_rate(struct rtw_dev *rtwdev, + { + u8 rate; + +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + if (rtwdev->hal.rf_type == RF_2T2R && sta->deflink.ht_cap.mcs.rx_mask[1] != 0) + #else + if (rtwdev->hal.rf_type == RF_2T2R && sta->ht_cap.mcs.rx_mask[1] != 0) +@@ -136,7 +136,7 @@ static u8 get_highest_vht_tx_rate(struct rtw_dev *rtwdev, + u8 rate; + u16 tx_mcs_map; + +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + tx_mcs_map = le16_to_cpu(sta->deflink.vht_cap.vht_mcs.tx_mcs_map); + #else + tx_mcs_map = le16_to_cpu(sta->vht_cap.vht_mcs.tx_mcs_map); +@@ -382,7 +382,7 @@ static void rtw_tx_data_pkt_info_update(struct rtw_dev *rtwdev, + if (info->control.use_rts || skb->len > hw->wiphy->rts_threshold) + pkt_info->rts = true; + +-#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 19, 0) || defined(BUILD_OPENWRT) + if (sta->deflink.vht_cap.vht_supported) + rate = get_highest_vht_tx_rate(rtwdev, sta); + else if (sta->deflink.ht_cap.ht_supported) diff --git a/package/kernel/rtw88-usb/patches/102-disable-pcie.patch b/package/kernel/rtw88-usb/patches/102-disable-pcie.patch new file mode 100644 index 000000000..f57ad4c88 --- /dev/null +++ b/package/kernel/rtw88-usb/patches/102-disable-pcie.patch @@ -0,0 +1,69 @@ +--- a/Makefile ++++ b/Makefile +@@ -30,10 +30,6 @@ NO_SKIP_SIGN := y + endif + + EXTRA_CFLAGS += -O2 +-EXTRA_CFLAGS += -DCONFIG_RTW88_8822BE=1 +-EXTRA_CFLAGS += -DCONFIG_RTW88_8821CE=1 +-EXTRA_CFLAGS += -DCONFIG_RTW88_8822CE=1 +-EXTRA_CFLAGS += -DCONFIG_RTW88_8723DE=1 + EXTRA_CFLAGS += -DCONFIG_RTW88_DEBUG=1 + EXTRA_CFLAGS += -DCONFIG_RTW88_DEBUGFS=1 + #EXTRA_CFLAGS += -DCONFIG_RTW88_REGD_USER_REG_HINTS +@@ -60,9 +56,6 @@ rtw_core-objs += main.o \ + obj-m += rtw_8822b.o + rtw_8822b-objs := rtw8822b.o rtw8822b_table.o + +-obj-m += rtw_8822be.o +-rtw_8822be-objs := rtw8822be.o +- + obj-m += rtw_8822bu.o + rtw_8822bu-objs := rtw8822bu.o + +@@ -72,9 +65,6 @@ rtw_8822bs-objs := rtw8822bs.o + obj-m += rtw_8822c.o + rtw_8822c-objs := rtw8822c.o rtw8822c_table.o + +-obj-m += rtw_8822ce.o +-rtw_8822ce-objs := rtw8822ce.o +- + obj-m += rtw_8822cu.o + rtw_8822cu-objs := rtw8822cu.o + +@@ -102,9 +92,6 @@ rtw_8723cs-objs := rtw8723cs.o + obj-m += rtw_8723d.o + rtw_8723d-objs := rtw8723d.o rtw8723d_table.o + +-obj-m += rtw_8723de.o +-rtw_8723de-objs := rtw8723de.o +- + obj-m += rtw_8723du.o + rtw_8723du-objs := rtw8723du.o + +@@ -114,15 +101,9 @@ rtw_8723ds-objs := rtw8723ds.o + obj-m += rtw_8821c.o + rtw_8821c-objs := rtw8821c.o rtw8821c_table.o + +-obj-m += rtw_8821ce.o +-rtw_8821ce-objs := rtw8821ce.o +- + obj-m += rtw_8821a.o + rtw_8821a-objs := rtw8821a.o rtw8821a_table.o + +-obj-m += rtw_8821ae.o +-rtw_8821ae-objs := rtw8821ae.o +- + obj-m += rtw_8821au.o + rtw_8821au-objs := rtw8821au.o + +@@ -132,9 +113,6 @@ rtw_8821cs-objs := rtw8821cs.o + obj-m += rtw_8821cu.o + rtw_8821cu-objs := rtw8821cu.o + +-obj-m += rtw_pci.o +-rtw_pci-objs := pci.o +- + obj-m += rtw_sdio.o + rtw_sdio-objs := sdio.o + diff --git a/package/lean/autocore/Makefile b/package/lean/autocore/Makefile index 125421234..d0b460558 100644 --- a/package/lean/autocore/Makefile +++ b/package/lean/autocore/Makefile @@ -47,6 +47,7 @@ define Package/autocore-arm/install $(INSTALL_DIR) $(1)/sbin $(INSTALL_BIN) ./files/arm/sbin/cpuinfo $(1)/sbin/cpuinfo $(INSTALL_BIN) ./files/arm/sbin/ethinfo $(1)/sbin/ethinfo + $(INSTALL_BIN) ./files/arm/sbin/usage $(1)/sbin/usage endef define Package/autocore-x86/install diff --git a/package/lean/autocore/files/arm/index.htm b/package/lean/autocore/files/arm/index.htm index 0537b0903..b2eb1fccd 100644 --- a/package/lean/autocore/files/arm/index.htm +++ b/package/lean/autocore/files/arm/index.htm @@ -15,7 +15,7 @@ local has_dhcp = fs.access("/etc/config/dhcp") local has_wifi = ((fs.stat("/etc/config/wireless", "size") or 0) > 0) local has_switch = false - + uci:foreach("network", "switch", function(s) has_switch = true @@ -32,7 +32,7 @@ buffered = 0, shared = 0 } - + local mem_cached = luci.sys.exec("sed -e '/^Cached: /!d; s#Cached: *##; s# kB##g' /proc/meminfo") local swapinfo = sysinfo.swap or { @@ -56,8 +56,8 @@ local user_info = luci.sys.exec("cat /proc/net/arp | grep 'br-lan' | grep '0x2' | wc -l") - local cpu_usage = luci.sys.exec("top -n1 | awk '/^CPU/ { printf(\"%d%%\", 100 - $8) }'") or "6%" - local cpu_info = luci.sys.exec("/sbin/cpuinfo") or "ARM Processor x 0 (233MHz, 2.3°C)" + local cpu_usage = luci.sys.exec("/sbin/usage") or "6%" + local cpu_info = luci.sys.exec("/sbin/cpuinfo") or "?" local eth_info = luci.sys.exec("ethinfo") local rv = { @@ -162,7 +162,7 @@ if (ht) s += ', MCS %s'.format(mcs); if (sgi) s += ', <%:Short GI%>'; } - + if (he) { s += ', HE-MCS %d'.format(mcs); if (nss) s += ', HE-NSS %d'.format(nss); @@ -265,7 +265,7 @@ '<%:Type%>: %s%s
    ', ifc6.proto, (ifc6.ip6prefix) ? '-pd' : '' ); - + if (!ifc6.ip6prefix) { s += String.format( @@ -652,7 +652,7 @@ <% end %> var e; - + if (e = document.getElementById('ethinfo')) { var ports = eval('(' + info.ethinfo + ')'); var tmp = ""; @@ -672,10 +672,10 @@ if (e = document.getElementById('uptime')) e.innerHTML = String.format('%t', info.uptime); - + if (e = document.getElementById('userinfo')) e.innerHTML = info.userinfo; - + if (e = document.getElementById('cpuusage')) e.innerHTML = info.cpuusage; @@ -738,7 +738,7 @@ <%:Local Time%>- <%:Uptime%>- <%:Load Average%>- - <%:CPU usage (%)%>- + <%:CPU usage%>- diff --git a/package/lean/autocore/files/arm/sbin/usage b/package/lean/autocore/files/arm/sbin/usage new file mode 100755 index 000000000..6a170393f --- /dev/null +++ b/package/lean/autocore/files/arm/sbin/usage @@ -0,0 +1,14 @@ +#!/bin/sh + +NSS_PATH="/sys/kernel/debug/qca-nss-drv/stats" + +cpu_usage="$(top -n1 | awk '/^CPU/ {printf("%d%", 100 - $8)}')" + +[ ! -d "$NSS_PATH" ] || \ +npu_usage="$(grep '%' "$NSS_PATH"/cpu_load_ubi | awk -F ' ' '{print $2}')" + +if [ -d "$NSS_PATH" ]; then + echo -n "CPU: ${cpu_usage}, NPU: ${npu_usage}" +else + echo -n "CPU: ${cpu_usage}" +fi diff --git a/package/lean/cpufreq/Makefile b/package/lean/cpufreq/Makefile new file mode 100644 index 000000000..c71f1f36f --- /dev/null +++ b/package/lean/cpufreq/Makefile @@ -0,0 +1,30 @@ +# SPDX-License-Identifier: GPL-2.0-only +# +# Copyright (C) 2024 ImmortalWrt.org + +include $(TOPDIR)/rules.mk + +PKG_NAME:=cpufreq +PKG_RELEASE:=1 + +include $(INCLUDE_DIR)/package.mk + +define Package/cpufreq + TITLE:=CPU Frequency Scaling adjustment tool + DEPENDS:=@(arm||aarch64) + PKGARCH:=all +endef + +define Build/Compile +endef + +define Package/cpufreq/install + $(INSTALL_DIR) $(1)/etc/config + $(INSTALL_CONF) $(CURDIR)/files/cpufreq.config $(1)/etc/config/cpufreq + $(INSTALL_DIR) $(1)/etc/init.d + $(INSTALL_BIN) $(CURDIR)/files/cpufreq.init $(1)/etc/init.d/cpufreq + $(INSTALL_DIR) $(1)/etc/uci-defaults + $(INSTALL_BIN) $(CURDIR)/files/cpufreq.uci $(1)/etc/uci-defaults/10-cpufreq +endef + +$(eval $(call BuildPackage,cpufreq)) diff --git a/package/lean/cpufreq/files/cpufreq.config b/package/lean/cpufreq/files/cpufreq.config new file mode 100644 index 000000000..9004f1bd8 --- /dev/null +++ b/package/lean/cpufreq/files/cpufreq.config @@ -0,0 +1,5 @@ + +config settings 'cpufreq' + +config settings 'global' + diff --git a/package/lean/cpufreq/files/cpufreq.init b/package/lean/cpufreq/files/cpufreq.init new file mode 100755 index 000000000..fc5dc4777 --- /dev/null +++ b/package/lean/cpufreq/files/cpufreq.init @@ -0,0 +1,58 @@ +#!/bin/sh /etc/rc.common + +START=15 +USE_PROCD=1 + +NAME="cpufreq" +CPUFREQ_PATH="/sys/devices/system/cpu/cpufreq" + +extra_command "get_policies" "Get CPU scaling governors and frequencies" + +get_policies() { + json_init + for policy in $(ls -d "$CPUFREQ_PATH"/policy[0-9]* 2>"/dev/null"); do + [ -s "$policy/scaling_available_frequencies" ] || continue + json_add_object "$(basename "$policy")" + json_add_string "index" "$(basename "$policy" | grep -Eo "[0-9]*$")" + json_add_string "cpus" "$(cat "$policy/affected_cpus")" + json_add_array "freqs" + for freq in $(cat "$policy/scaling_available_frequencies"); do + json_add_string "" "$freq" + done + json_close_array + json_add_array "governors" + for governor in $(cat "$policy/scaling_available_governors"); do + json_add_string "" "$governor" + done + json_close_array + json_close_object + done + json_dump +} + +write_cpufreq_config() { + local value + config_get value "$NAME" "$1" + [ -z "$value" ] || echo -n "$value" > "$2" +} + +start_service() { + config_load "$NAME" + + for i in $(ls -d "$CPUFREQ_PATH"/policy[0-9]* 2>"/dev/null" | grep -Eo "[0-9]*$") + do + [ -z "$(config_get "$NAME" "governor$i")" ] && return + + write_cpufreq_config "governor$i" "$CPUFREQ_PATH/policy$i/scaling_governor" + write_cpufreq_config "minfreq$i" "$CPUFREQ_PATH/policy$i/scaling_min_freq" + write_cpufreq_config "maxfreq$i" "$CPUFREQ_PATH/policy$i/scaling_max_freq" + if [ "$(config_get "$NAME" "governor$i")" = "ondemand" ]; then + write_cpufreq_config "sdfactor$i" "$CPUFREQ_PATH/ondemand/sampling_down_factor" + write_cpufreq_config "upthreshold$i" "$CPUFREQ_PATH/ondemand/up_threshold" + fi + done +} + +service_triggers() { + procd_add_reload_trigger "$NAME" +} diff --git a/package/lean/cpufreq/files/cpufreq.uci b/package/lean/cpufreq/files/cpufreq.uci new file mode 100644 index 000000000..4ee49c931 --- /dev/null +++ b/package/lean/cpufreq/files/cpufreq.uci @@ -0,0 +1,75 @@ +#!/bin/sh + +uci_write_config() { + uci -q set "cpufreq.cpufreq.governor$1"="$2" + uci -q set "cpufreq.cpufreq.minfreq$1"="$3" + uci -q set "cpufreq.cpufreq.maxfreq$1"="$4" + [ -n "$5" ] && uci -q set "cpufreq.cpufreq.sdfactor$1"="$5" + [ -n "$6" ] && uci -q set "cpufreq.cpufreq.upthreshold$1"="$6" + uci -q commit cpufreq +} + +[ "$(uci -q get cpufreq.global.set)" -eq "1" ] && exit 0 + +CPU_FREQS="$(cat '/sys/devices/system/cpu/cpufreq/policy0/scaling_available_frequencies')" +CPU_MIN_FREQ="$(cat '/sys/devices/system/cpu/cpufreq/policy0/scaling_min_freq')" +CPU_MAX_FREQ="$(cat '/sys/devices/system/cpu/cpufreq/policy0/scaling_max_freq')" +CPU_POLICYS="$(find '/sys/devices/system/cpu/cpufreq/policy'* -maxdepth 0 | grep -Eo '[0-9]+')" + +source "/etc/openwrt_release" +case "$DISTRIB_TARGET" in + "bcm27xx/bcm2710"|\ + "bcm27xx/bcm2711") + uci_write_config 0 ondemand 600000 "$CPU_MAX_FREQ" 10 50 + ;; + "ipq40xx/generic") + uci_write_config 0 performance 200000 "$CPU_MAX_FREQ" + ;; + "ipq806x/generic") + uci_write_config 0 performance 600000 "$CPU_MAX_FREQ" + # IPQ8064/5 + echo "$CPU_POLICYS" | grep -q "1" && uci_write_config 1 performance 600000 1200000 + ;; + "mediatek/mt7622") + uci_write_config 0 ondemand 600000 1350000 10 50 + ;; + "qualcommax/ipq60xx"|\ + "qualcommax/ipq807x") + uci_write_config 0 schedutil "$CPU_MIN_FREQ" "$CPU_MAX_FREQ" + ;; + "rockchip/armv8") + if echo "$CPU_POLICYS" | grep -q "6"; then + # RK3588/S + uci_write_config 0 schedutil 1008000 1800000 + uci_write_config 4 schedutil 816000 2208000 + uci_write_config 6 schedutil 816000 2208000 + elif echo "$CPU_POLICYS" | grep -q "4"; then + # RK3399 + uci_write_config 0 schedutil 600000 1608000 + uci_write_config 4 schedutil 600000 2016000 + else + if ! echo "$CPU_FREQS" | grep -q "1992000"; then + # RK3328 + CPU_MAX_FREQ="1512000" + fi + uci_write_config 0 schedutil 816000 "$CPU_MAX_FREQ" + fi + ;; + "sunxi/cortexa53") + if echo "$CPU_FREQS" | grep -q "1800000"; then + # H6 + uci_write_config 0 schedutil "888000" "$CPU_MAX_FREQ" + elif echo "$CPU_FREQS" | grep -q "1512000"; then + # H616/8 + uci_write_config 0 schedutil "936000" "1512000" + elif echo "$CPU_FREQS" | grep -q "1296000"; then + # H5 + uci_write_config 0 ondemand "$CPU_MIN_FREQ" "1296000" 10 50 + else + # A64 + uci_write_config 0 ondemand "$CPU_MIN_FREQ" "$CPU_MAX_FREQ" 10 50 + fi + ;; +esac + +exit 0 diff --git a/package/lean/csstidy/Makefile b/package/lean/csstidy/Makefile deleted file mode 100644 index 5f0910aa3..000000000 --- a/package/lean/csstidy/Makefile +++ /dev/null @@ -1,39 +0,0 @@ -include $(TOPDIR)/rules.mk - -PKG_NAME:=csstidy -PKG_RELEASE:=1 - -PKG_SOURCE_PROTO:=git -PKG_SOURCE_URL=https://github.com/jow-/csstidy-cpp.git -PKG_SOURCE_DATE:=2021-06-13 -PKG_SOURCE_VERSION:=707feaec556c40c999514a598b1a1ea5b50826c6 -PKG_MIRROR_HASH:=a6db35de692d1b94561e725634ce410b75f5f7e26dc6f3fc92931813c0721ded - -PKG_LICENSE:=LGPL-2.1 -PKG_LICENSE_FILES:=COPYING - -PKG_MAINTAINER:=Jo-Philipp Wich - -include $(INCLUDE_DIR)/host-build.mk -include $(INCLUDE_DIR)/package.mk - -define Package/csstidy - SECTION:=utils - CATEGORY:=Utilities - TITLE:=CSSTidy parser and optimiser - DEPENDS:=+libstdcpp -endef - -define Package/csstidy/install - $(INSTALL_DIR) $(1)/usr/bin - $(INSTALL_BIN) $(PKG_BUILD_DIR)/csstidy/csstidy $(1)/usr/bin/ -endef - - -define Host/Install - $(INSTALL_DIR) $(STAGING_DIR_HOSTPKG)/bin/ - $(INSTALL_BIN) $(HOST_BUILD_DIR)/csstidy/csstidy $(1)/bin/ -endef - -$(eval $(call HostBuild)) -$(eval $(call BuildPackage,csstidy)) diff --git a/package/lean/default-settings/Makefile b/package/lean/default-settings/Makefile index 12388dac6..acd35b1bb 100644 --- a/package/lean/default-settings/Makefile +++ b/package/lean/default-settings/Makefile @@ -1,5 +1,5 @@ # -# Copyright (C) 2016-2017 GitHub +# Copyright (C) 2016-2023 GitHub # # This is free software, licensed under the GNU General Public License v3. # See /LICENSE for more information. @@ -7,8 +7,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=default-settings -PKG_VERSION:=2 -PKG_RELEASE:=35 +PKG_RELEASE:=$(COMMITCOUNT) PKG_LICENSE:=GPLv3 PKG_LICENSE_FILES:=LICENSE @@ -19,7 +18,7 @@ define Package/default-settings CATEGORY:=LuCI TITLE:=LuCI support for Default Settings PKGARCH:=all - DEPENDS:=+luci-base +luci +@LUCI_LANG_zh-cn + DEPENDS:=+luci-base +luci +@LUCI_LANG_zh-cn +@LUCI_LANG_zh_Hans endef define Package/default-settings/description diff --git a/package/lean/default-settings/files/zzz-default-settings b/package/lean/default-settings/files/zzz-default-settings index 47965500e..61b4c5e2c 100755 --- a/package/lean/default-settings/files/zzz-default-settings +++ b/package/lean/default-settings/files/zzz-default-settings @@ -28,7 +28,7 @@ sed -i 's/\"services\"/\"nas\"/g' /usr/lib/lua/luci/controller/usb_printer.lua sed -i 's/\"services\"/\"nas\"/g' /usr/lib/lua/luci/controller/xunlei.lua sed -i 's/services/nas/g' /usr/lib/lua/luci/view/minidlna_status.htm -ln -sf /sbin/ip /usr/bin/ip +#ln -sf /sbin/ip /usr/bin/ip sed -i 's#downloads.openwrt.org#mirrors.cloud.tencent.com/lede#g' /etc/opkg/distfeeds.conf sed -i 's/root::0:0:99999:7:::/root:$1$V4UetPzk$CYXluq4wUazHjmCDBCqXF.:0:0:99999:7:::/g' /etc/shadow @@ -37,13 +37,21 @@ sed -i 's/root:::0:99999:7:::/root:$1$V4UetPzk$CYXluq4wUazHjmCDBCqXF.:0:0:99999: sed -i "s/# //g" /etc/opkg/distfeeds.conf sed -i '/openwrt_luci/ { s/snapshots/releases\/18.06.9/g; }' /etc/opkg/distfeeds.conf +sed -i '/check_signature/d' /etc/opkg.conf + sed -i '/REDIRECT --to-ports 53/d' /etc/firewall.user -# echo 'iptables -A OUTPUT -m string --string "api.installer.xiaomi.cn" --algo bm --to 65535 -j DROP' >> /etc/firewall.user +#echo 'iptables -t nat -A PREROUTING -p udp --dport 53 -j REDIRECT --to-ports 53' >> /etc/firewall.user +#echo 'iptables -t nat -A PREROUTING -p tcp --dport 53 -j REDIRECT --to-ports 53' >> /etc/firewall.user +#echo '[ -n "$(command -v ip6tables)" ] && ip6tables -t nat -A PREROUTING -p udp --dport 53 -j REDIRECT --to-ports 53' >> /etc/firewall.user +#echo '[ -n "$(command -v ip6tables)" ] && ip6tables -t nat -A PREROUTING -p tcp --dport 53 -j REDIRECT --to-ports 53' >> /etc/firewall.user + +#echo 'iptables -A OUTPUT -m string --string "api.installer.xiaomi.cn" --algo bm --to 65535 -j DROP' >> /etc/firewall.user sed -i '/option disabled/d' /etc/config/wireless +sed -i '/set wireless.radio${devidx}.disabled/d' /lib/wifi/mac80211.sh sed -i '/DISTRIB_REVISION/d' /etc/openwrt_release -echo "DISTRIB_REVISION='R24.03.20-D'" >> /etc/openwrt_release +echo "DISTRIB_REVISION='R24.6.6'" >> /etc/openwrt_release sed -i '/DISTRIB_DESCRIPTION/d' /etc/openwrt_release echo "DISTRIB_DESCRIPTION='OpenWrt '" >> /etc/openwrt_release diff --git a/package/lean/default-settings/po/zh-cn/default.po b/package/lean/default-settings/po/zh-cn/default.po index f6c36823c..9ba70ec28 100644 --- a/package/lean/default-settings/po/zh-cn/default.po +++ b/package/lean/default-settings/po/zh-cn/default.po @@ -1,3 +1,6 @@ +msgid "Swap" +msgstr "虚拟内存" + msgid "Processor" msgstr "处理器" @@ -13,6 +16,9 @@ msgstr "CPU 信息" msgid "CPU Model" msgstr "处理器型号" +msgid "CPU usage" +msgstr "CPU 使用率" + msgid "CPU frequency" msgstr "CPU 频率" @@ -49,9 +55,6 @@ msgstr "划分给 ZRam 分区的内存大小（MB），推荐留空由系统自 msgid "Number of parallel threads used for compression" msgstr "用于压缩内存数据的CPU并发线程数" -msgid "Swap" -msgstr "虚拟内存" - msgid "Force 40MHz mode" msgstr "强制 40MHz 频宽" diff --git a/package/lean/default-settings/po/zh-cn/more.po b/package/lean/default-settings/po/zh-cn/more.po deleted file mode 100644 index 6a3b160a7..000000000 --- a/package/lean/default-settings/po/zh-cn/more.po +++ /dev/null @@ -1,1035 +0,0 @@ -msgid "%d hour" -msgstr "%d 小时" - -msgid "%d minute" -msgstr "%d 分钟" - -msgid "%d minutes" -msgstr "%d 分钟" - -msgid "%d second" -msgstr "%d 秒" - -msgid "%d seconds" -msgstr "%d 秒" - -msgid "" -"Acceptable values: 1-100. This many Tracking IP addresses must respond for " -"the link to be deemed up" -msgstr "" -"取值范围: 1-100。这个设置项指定了当多少个 IP 地址能够连通时接口会被认为在线" - -msgid "Acceptable values: 1-1000. Defaults to 1 if not set" -msgstr "取值范围: 1-100。如果不填写，默认值为 1" - -msgid "Advanced" -msgstr "高级" - -msgid "Check IP rules" -msgstr "检查 IP 规则" - -msgid "Check routing table" -msgstr "检查路由表" - -msgid "Collecting data..." -msgstr "正在收集数据..." - -msgid "Configuration" -msgstr "配置" - -msgid "Currently Configured Interfaces" -msgstr "当前配置的接口" - -msgid "Currently Configured Members" -msgstr "当前配置的成员" - -msgid "Currently Configured Policies" -msgstr "当前配置的策略" - -msgid "Destination address" -msgstr "目标地址" - -msgid "Destination port" -msgstr "目标端口" - -msgid "Detailed Status" -msgstr "详细状态" - -msgid "Diagnostic Results" -msgstr "诊断结果" - -msgid "Diagnostics" -msgstr "诊断" - -msgid "Disabled" -msgstr "禁用" - -msgid "" -"Downed interface will be deemed up after this many successful ping tests" -msgstr "当 Ping 成功次数达到这个数值后，已经被认为离线的接口将会重新上线" - -msgid "Enabled" -msgstr "启用" - -msgid "Error collecting troubleshooting information" -msgstr "收集故障排除信息时出错" - -msgid "Errors" -msgstr "错误" - -msgid "Failure interval" -msgstr "故障检测间隔" - -msgid "Flush conntrack table" -msgstr "刷新连接跟踪表" - -msgid "Flush global firewall conntrack table on interface events" -msgstr "在接口事件触发时刷新全局防火墙连接跟踪表" - -msgid "Hotplug Script" -msgstr "Hotplug 脚本" - -msgid "Hotplug ifdown" -msgstr "Hotplug ifdown" - -msgid "Hotplug ifup" -msgstr "Hotplug ifup" - -msgid "IPset" -msgstr "IPset" - -msgid "IPv4" -msgstr "IPv4" - -msgid "IPv6" -msgstr "IPv6" - -msgid "Interface" -msgstr "接口" - -msgid "Interface Status" -msgstr "接口状态" - -msgid "Interface down" -msgstr "接口离线" - -msgid "Interface up" -msgstr "接口上线" - -msgid "Interface will be deemed down after this many failed ping tests" -msgstr "当 Ping 失败次数达到这个数值后接口会被认为离线" - -msgid "Interfaces" -msgstr "接口" - -msgid "Internet Protocol" -msgstr "互联网协议" - -msgid "Last 50 MWAN systemlog entries. Newest entries sorted at the top :" -msgstr "最近 50 条 MWAN 系统日志，最新条目排在顶部:" - -msgid "Last resort" -msgstr "备用成员" - -msgid "Load Balancing" -msgstr "负载均衡" - -msgid "Loading" -msgstr "载入中" - -msgid "MWAN Config" -msgstr "MWAN 配置文件" - -msgid "MWAN Detailed Status" -msgstr "MWAN 详细状态" - -msgid "MWAN Interface Configuration" -msgstr "MWAN 接口配置" - -msgid "MWAN Interface Configuration - %s" -msgstr "MWAN 接口配置 - %s" - -msgid "MWAN Interface Diagnostics" -msgstr "MWAN 接口诊断" - -msgid "MWAN Interface Live Status" -msgstr "MWAN 接口实时状态" - -msgid "MWAN Interface Systemlog" -msgstr "MWAN 接口系统日志" - -msgid "MWAN Member Configuration" -msgstr "MWAN 成员配置" - -msgid "MWAN Member Configuration - %s" -msgstr "MWAN 成员配置 - %s" - -msgid "MWAN Policy Configuration" -msgstr "MWAN 策略配置" - -msgid "MWAN Policy Configuration - %s" -msgstr "MWAN 策略配置 - %s" - -msgid "MWAN Rule Configuration" -msgstr "MWAN 规则配置" - -msgid "MWAN Rule Configuration - %s" -msgstr "MWAN 规则配置 - %s" - -msgid "MWAN Service Control" -msgstr "MWAN 服务控制" - -msgid "" -"MWAN supports up to 250 physical and/or logical interfaces
    MWAN " -"requires that all interfaces have a unique metric configured in /etc/config/" -"network
    Names must match the interface name found in /etc/config/" -"network (see advanced tab)
    Names may contain characters A-Z, a-z, 0-9, " -"_ and no spaces
    Interfaces may not share the same name as configured " -"members, policies or rules" -msgstr "" -"MWAN 支持最多 250 个物理或逻辑接口。
    MWAN 要求所有接口必须在 /etc/" -"config/network 中设定唯一的网关跃点。
    名称必须与 /etc/config/network 中" -"的接口名称匹配。（可查看“高级”选项卡）
    名称允许包括A-Z、a-z、0-9、_ 但是" -"不能有空格。
    接口不应该与成员、策略、规则中的任意一个设置项使用相同的名" -"称" - -msgid "" -"May be entered as a single or multiple port(s) (eg \"22\" or \"80,443\") or " -"as a portrange (eg \"1024:2048\") without quotes" -msgstr "" -"可以输入一个或多个端口（例如 \"22\" 或者 \"80,443\"）或者是一个端口范围（例" -"如 \"1024:2048\"）不含引号" - -msgid "Member" -msgstr "成员" - -msgid "Member used" -msgstr "使用的成员" - -msgid "Members" -msgstr "成员" - -msgid "" -"Members are profiles attaching a metric and weight to an MWAN interface
    Names may contain characters A-Z, a-z, 0-9, _ and no spaces
    Members " -"may not share the same name as configured interfaces, policies or rules" -msgstr "" -"“成员”用来设置每一个 MWAN 接口的跃点数（即接口优先级）和所占比重。
    名称" -"允许包括 A-Z、 a-、0-9、_ 但是不能有空格。
    成员不应该与接口、策略、规则" -"中的任意一个设置项使用相同的名称" - -msgid "Members assigned" -msgstr "分配的成员" - -msgid "Metric" -msgstr "跃点数" - -msgid "" -"Name of IPset rule. Requires IPset rule in /etc/dnsmasq.conf (eg \"ipset=/" -"youtube.com/youtube\")" -msgstr "" -"匹配 IPset 规则列表名称。需要先配置 /etc/dnsmasq.conf 中的 IPset 规则 (例如: " -"\"ipset=/youtube.com/youtube\")" - -msgid "Network Config" -msgstr "网络配置文件" - -msgid "No" -msgstr "否" - -msgid "No MWAN interfaces found" -msgstr "没有找到 MWAN 接口" - -msgid "No MWAN systemlog history found" -msgstr "没有在系统日志中找到 MWAN 历史信息" - -msgid "No detailed status information available" -msgstr "没有状态详细信息可用" - -msgid "No diagnostic results returned" -msgstr "没有返回诊断结果" - -msgid "No protocol specified" -msgstr "未指定协议" - -msgid "Offline" -msgstr "离线" - -msgid "Online (tracking active)" -msgstr "在线（追踪启用中）" - -msgid "Online (tracking off)" -msgstr "在线（追踪已关闭）" - -msgid "Overview" -msgstr "概况" - -msgid "Ping count" -msgstr "Ping 计数" - -msgid "Ping default gateway" -msgstr "Ping 默认网关" - -msgid "Ping interval" -msgstr "Ping 间隔" - -msgid "Ping interval during failure detection" -msgstr "故障检测期间的 Ping 间隔" - -msgid "Ping interval during failure recovering" -msgstr "故障恢复期间的 Ping 间隔" - -msgid "Ping size" -msgstr "Ping 大小" - -msgid "Ping timeout" -msgstr "Ping 超时" - -msgid "Ping tracking IP" -msgstr "Ping 跟踪 IP" - -msgid "Policies" -msgstr "策略" - -msgid "" -"Policies are profiles grouping one or more members controlling how MWAN " -"distributes traffic
    Member interfaces with lower metrics are used " -"first. Interfaces with the same metric load-balance
    Load-balanced " -"member interfaces distribute more traffic out those with higher weights
    Names may contain characters A-Z, a-z, 0-9, _ and no spaces. Names must be " -"15 characters or less
    Policies may not share the same name as " -"configured interfaces, members or rules" -msgstr "" -"“策略”把成员进行分组，告诉 MWAN 如何分配“规则”中使用这一策略的流量
    拥有" -"较低跃点数的成员将会被优先使用。拥有相同跃点数的成员把流量进行负载均衡。
    进行负载均衡的成员之间拥有较高比重的成员将会被分配到更多流量。
    名称允许" -"包括A-Z、a-z、0-9、_ 但是不能有空格。名称应该在 15 个字符以内
    策略不应该" -"与接口、成员、规则中的任意一个设置项使用相同的名称" - -msgid "Policy" -msgstr "策略" - -msgid "Policy assigned" -msgstr "分配的策略" - -msgid "Protocol" -msgstr "协议" - -msgid "Recovery interval" -msgstr "故障恢复间隔" - -msgid "Restart MWAN" -msgstr "重启 MWAN" - -msgid "Restore default hotplug script" -msgstr "恢复默认的 hotplug 脚本" - -msgid "Restore..." -msgstr "恢复..." - -msgid "Rule" -msgstr "规则" - -msgid "Rules" -msgstr "规则" - -msgid "" -"Rules specify which traffic will use a particular MWAN policy based on IP " -"address, port or protocol
    Rules are matched from top to bottom. Rules " -"below a matching rule are ignored. Traffic not matching any rule is routed " -"using the main routing table
    Traffic destined for known (other than " -"default) networks is handled by the main routing table. Traffic matching a " -"rule, but all WAN interfaces for that policy are down will be blackholed
    Names may contain characters A-Z, a-z, 0-9, _ and no spaces
    Rules may " -"not share the same name as configured interfaces, members or policies" -msgstr "" -"“规则”基于 IP 地址、协议、端口把流量划分到指定的“策略”中。
    规则按照从上" -"到下的顺序进行匹配。除了第一条能够匹配一次通信的规则以外，其它规则将被忽略。" -"不匹配任何规则的通信将会由系统默认路由表进行。
    来自已知的网络的转发流量" -"由系统默认路由表接手，然后 MWAN 从中匹配出相应的流量并转移到 MWAN 自己的路由" -"表。但是所有被划分到一个无法使用的策略的流量将会无法正常进行路由。
    名称" -"允许包括A-Z、a-z、0-9、_ 但是不能有空格。
    规则不应该与接口、成员、策略中" -"的任意一个设置项使用相同的名称" - -msgid "Seconds. Acceptable values: 1-1000000. Defaults to 600 if not set" -msgstr "单位为秒。接受的值: 1-1000000。留空则使用默认值 600 秒" - -msgid "Source address" -msgstr "源地址" - -msgid "Source port" -msgstr "源端口" - -msgid "Start MWAN" -msgstr "启动 MWAN" - -msgid "Sticky" -msgstr "粘滞模式" - -msgid "Sticky timeout" -msgstr "粘滞超时" - -msgid "Stop MWAN" -msgstr "停止 MWAN" - -msgid "Supports CIDR notation (eg \"192.168.100.0/24\") without quotes" -msgstr "支持 CIDR 记法（例如: \"192.168.100.0/24\"）不含引号" - -msgid "There are currently %d of 250 supported interfaces configured" -msgstr "当前已配置 %d 个接口，最大支持 250 个" - -msgid "" -"This displays the metric assigned to this interface in /etc/config/network" -msgstr "这里显示了这个接口在 /etc/config/network 中配置的跃点数" - -msgid "" -"This hostname or IP address will be pinged to determine if the link is up or " -"down. Leave blank to assume interface is always online" -msgstr "通过 ping 此主机或 IP 地址来确定链路是否在线。留空则认为接口始终在线" - -msgid "This section allows you to modify the contents of /etc/config/mwan3" -msgstr "这里允许你修改 /etc/config/mwan3 的内容" - -msgid "This section allows you to modify the contents of /etc/config/network" -msgstr "这里允许你修改 /etc/config/network 的内容" - -msgid "This section allows you to modify the contents of /etc/config/wireless" -msgstr "这里允许你修改 /etc/config/wireless 的内容" - -msgid "" -"This section allows you to modify the contents of /etc/hotplug.d/iface/16-" -"mwancustom
    This is useful for running system commands and/or scripts " -"based on interface ifup or ifdown hotplug events

    Notes:
    The " -"first line of the script must be "#!/bin/sh" without quotes
    Lines beginning with # are comments and are not executed

    Available variables:
    $ACTION is the hotplug event (ifup, ifdown)
    " -"$INTERFACE is the interface name (wan1, wan2, etc.)
    $DEVICE is the " -"device name attached to the interface (eth0.1, eth1, etc.)" -msgstr "" -"这里允许你修改 /etc/hotplug.d/iface/16-mwancustom 的内容
    这可以在接口 " -"ifup 或 ifdown Hotplug 事件时运行系统命令或脚本

    注意:
    脚本的" -"第一行必须是 "#!/bin/sh" 不含引号
    以＃开头的行是注释，不会执行" -"

    可用变量:
    $ACTION 是 Hotplug 事件（ifup, ifdown）
    " -"$INTERFACE 是接口名称（wan1、wan2 等）
    $DEVICE 是连接到接口的设备名称 " -"（eth0.1、eth1 等）" - -msgid "Tracking IP" -msgstr "追踪的 IP" - -msgid "Tracking hostname or IP address" -msgstr "追踪的主机或 IP 地址" - -msgid "Tracking reliability" -msgstr "追踪可靠性" - -msgid "Traffic Rules" -msgstr "流量规则" - -msgid "" -"Traffic from the same source IP address that previously matched this rule " -"within the sticky timeout period will use the same WAN interface" -msgstr "" -"来自相同源 IP 的流量，如果已经匹配过此规则并且在粘滞超时时间内，将会使用相同" -"的 WAN 接口" - -msgid "Troubleshooting" -msgstr "故障排除" - -msgid "Troubleshooting Data" -msgstr "故障排除数据" - -msgid "View the contents of /etc/protocols for protocol descriptions" -msgstr "请查看 /etc/protocols 获取可选协议详情" - -msgid "WARNING: %d interfaces are configured exceeding the maximum of 250!" -msgstr "警告: 已配置 %d 个接口，超过最大值 250！" - -msgid "" -"WARNING: Some policies have names exceeding the maximum of 15 characters!" -msgstr "警告: 某些策略的名称超过了 15 个字符！" - -msgid "" -"WARNING: some interfaces are configured incorrectly or not at all in /etc/" -"config/network!" -msgstr "警告: 某些接口配置不正确或未配置到 /etc/config/network！" - -msgid "" -"WARNING: some interfaces have a higher reliability requirement than there " -"are tracking IP addresses!" -msgstr "警告: 某些接口的追踪可靠性要求大于了追踪 IP 地址总数！" - -msgid "" -"WARNING: some interfaces have duplicate metrics configured in /etc/config/" -"network!" -msgstr "警告: 某些接口在 /etc/config/network 中配置了相同的跃点数！" - -msgid "" -"WARNING: some interfaces have no default route in the main routing table!" -msgstr "警告: 某些接口在主路由表中没有默认路由！" - -msgid "" -"WARNING: some interfaces have no metric configured in /etc/config/network!" -msgstr "警告: 某些接口没有在 /etc/config/network 中配置跃点数！" - -msgid "" -"WARNING: some rules have a port configured with no or improper protocol " -"specified! Please configure a specific protocol!" -msgstr "" -"警告: 某些规则指定了端口却没有配置或配置了不正确的协议，请重新指定协议！" - -msgid "" -"WARNING: this and other interfaces have duplicate metrics configured in /etc/" -"config/network!" -msgstr "警告: 此接口和其他接口在 /etc/config/network 中配置了相同的跃点数！" - -msgid "" -"WARNING: this interface has a higher reliability requirement than there are " -"tracking IP addresses!" -msgstr "警告: 此接口的追踪可靠性要求大于了追踪 IP 地址总数！" - -msgid "WARNING: this interface has no default route in the main routing table!" -msgstr "警告: 此接口在主路由表中没有默认路由！" - -msgid "" -"WARNING: this interface has no metric configured in /etc/config/network!" -msgstr "警告: 此接口没有在 /etc/config/network 中配置跃点数！" - -msgid "" -"WARNING: this interface is configured incorrectly or not at all in /etc/" -"config/network!" -msgstr "警告: 此接口配置不正确或未配置到 /etc/config/network！" - -msgid "" -"WARNING: this policy's name is %d characters exceeding the maximum of 15!" -msgstr "警告: 此策略的名称具有 %d 个字符，超过了 15 个字符！" - -msgid "" -"WARNING: this rule is incorrectly configured with no or improper protocol " -"specified! Please configure a specific protocol!" -msgstr "警告: 此规则没有配置或配置了不正确的协议，请重新指定协议！" - -msgid "Waiting for MWAN to %s..." -msgstr "等待 MWAN %s..." - -msgid "Waiting for diagnostic results..." -msgstr "等待诊断结果..." - -msgid "Weight" -msgstr "比重" - -msgid "" -"When all policy members are offline use this behavior for matched traffic" -msgstr "当所有策略成员都无法使用的时候，对使用该策略的流量使用这个操作" - -msgid "Wireless Config" -msgstr "无线配置" - -msgid "Yes" -msgstr "是" - -msgid "always" -msgstr "总是" - -msgid "blackhole (drop)" -msgstr "黑洞（丢弃）" - -msgid "default (use main routing table)" -msgstr "默认（使用主路由表）" - -msgid "ifdown" -msgstr "ifdown" - -msgid "ifup" -msgstr "ifup" - -msgid "never" -msgstr "从不" - -msgid "restart" -msgstr "重启" - -msgid "start" -msgstr "启动" - -msgid "stop" -msgstr "关闭" - -msgid "unreachable (reject)" -msgstr "不可达（拒绝）" - -msgid "%d IPv4-only hosts" -msgstr "%d 个主机仅支持 IPv4" - -msgid "%d IPv6-only hosts" -msgstr "%d 个主机仅支持 IPv6" - -msgid "%d dual-stack hosts" -msgstr "%d 个双协议栈主机" - -msgid "%s and %s" -msgstr "%s 和 %s" - -msgid "%s, %s and %s" -msgstr "%s, %s 和 %s" - -msgid "-1 - Restart every last day of month" -msgstr "-1 - 每月的最后一天重新开始" - -msgid "-7 - Restart a week before end of month" -msgstr "-7 - 每月底前一周重新开始" - -msgid "1 - Restart every 1st of month" -msgstr "1 - 每月的第一天重新开始" - -msgid "10m - frequent commits at the expense of flash wear" -msgstr "10m - 频繁提交，闪存损耗的开销也增大" - -msgid "12h - compromise between risk of data loss and flash wear" -msgstr "12h - 平衡统计数据丢失的风险以及闪存使用寿命" - -msgid "24h - least flash wear at the expense of data loss risk" -msgstr "24h - 以数据丢失风险的代价换取最小的闪存损耗" - -msgid "30s - refresh twice per minute for reasonably current stats" -msgstr "30s - 每分钟刷新二次以获得较准确的当前统计值" - -msgid "5m - rarely refresh to avoid frequently clearing conntrack counters" -msgstr "5m - 较少刷新以避免频繁清除连接跟踪计数器" - -msgid "60s - commit minutely, useful for non-flash storage" -msgstr "60s - 每分钟提交，适用于非闪存类型存储" - -msgid "0 connections" -msgstr "连接：0" - -msgid "0 hosts" -msgstr "主机：0" - -msgid "0% IPv6 support rate among hosts" -msgstr "支持 IPv6 的主机比例：0%" - -msgid "0B total IPv6 download" -msgstr "IPv6 总下载量：0B" - -msgid "0% of the total traffic is IPv6" -msgstr "IPv6 流量比例：0%" - -msgid "0B total IPv6 upload" -msgstr "IPv6 总上传量：0B" - -msgid "0 cause the most connections" -msgstr "0 是连接数最多的协议" - -msgid "0 cause the most download" -msgstr "0 是下载量最大的协议" - -msgid "0 cause the most upload" -msgstr "0 是上传量最大的协议" - -msgid "0 different application protocols" -msgstr "0 种不同的应用层协议" - -msgid "0 download" -msgstr "下载：0" - -msgid "0 upload" -msgstr "上传：0" - -msgid "Accounting period" -msgstr "统计周期" - -msgid "Advanced Settings" -msgstr "高级设置" - -msgid "Application" -msgstr "应用层协议" - -msgid "Application Protocols" -msgstr "应用层协议" - -msgid "Backup" -msgstr "备份" - -msgid "Bandwidth Monitor" -msgstr "带宽监控" - -msgid "CSV, grouped by IP" -msgstr "CSV，按 IP 分组" - -msgid "CSV, grouped by MAC" -msgstr "CSV，按 MAC 分组" - -msgid "CSV, grouped by protocol" -msgstr "CSV，按协议分组" - -msgid "" -"Changing the accounting interval type will invalidate existing databases!" -"
    Download backup." -msgstr "" -"更改统计周期类型会使现有数据库无效！
    下载备份." - -msgid "" -"Choose \"Day of month\" to restart the accounting period monthly on a " -"specific date, e.g. every 3rd. Choose \"Fixed interval\" to restart the " -"accounting period exactly every N days, beginning at a given date." -msgstr "" -"选择“每月的某一天”来设置统计周期的重启时间，例如：每个月的第 3 天。选择“固定" -"周期”来设置从给定日期开始每 N 天重启统计周期。" - -msgid "Commit interval" -msgstr "提交间隔" - -msgid "Compress database" -msgstr "压缩数据库" - -msgid "Conn." -msgstr "连接。" - -msgid "Connections" -msgstr "连接" - -msgid "Connections / Host" -msgstr "连接 / 主机" - -msgid "Database directory" -msgstr "数据库目录" - -msgid "" -"Database storage directory. One file per accounting period will be placed " -"into this directory." -msgstr "数据库存储目录。每个“统计周期”的文件将被放到这个目录中。" - -msgid "Day of month" -msgstr "每月的某一天" - -msgid "" -"Day of month to restart the accounting period. Use negative values to count " -"towards the end of month, e.g. \"-5\" to specify the 27th of July or the " -"24th of Februrary." -msgstr "" -"每个月重启统计周期的日期。使用负数表示从月底开始计算，例如：\"-5\" 可以表示 " -"7 月份的 27 号或者 2 月份的 24 号。" - -msgid "Display" -msgstr "显示" - -msgid "Down. (Bytes / Pkts.)" -msgstr "下载（字节 / 数据包）" - -msgid "Download (Bytes / Packets)" -msgstr "下载（字节 / 数据包）" - -msgid "Download / Application" -msgstr "下载 / 应用层协议" - -msgid "Download Database Backup" -msgstr "下载数据库备份" - -msgid "Dualstack enabled hosts" -msgstr "双协议栈主机" - -msgid "Due date" -msgstr "重置日期" - -msgid "Export" -msgstr "导出" - -msgid "Family" -msgstr "协议类型" - -msgid "Fixed interval" -msgstr "固定周期" - -msgid "Force reload…" -msgstr "强制重新加载..…" - -msgid "General Settings" -msgstr "基本设置" - -msgid "Generate Backup" -msgstr "生成备份" - -msgid "Host" -msgstr "主机" - -msgid "Hostname: example.org" -msgstr "主机名：example.org" - -msgid "IPv4 vs. IPv6" -msgstr "IPv4 与 IPv6" - -msgid "Interval" -msgstr "周期" - -msgid "" -"Interval at which the temporary in-memory database is committed to the " -"persistent database directory." -msgstr "将内存中的临时数据库提交到持久性数据库目录的间隔时间。" - -msgid "" -"Interval at which traffic counters of still established connections are " -"refreshed from netlink information." -msgstr "从 netlink 信息中刷新“已建立连接”的流量计数器的间隔时间。" - -msgid "Invalid or empty backup archive" -msgstr "备份存档无效或为空" - -msgid "JSON dump" -msgstr "JSON 输出" - -msgid "Length of accounting interval in days." -msgstr "统计周期（天）。" - -msgid "Local interfaces" -msgstr "本地接口" - -msgid "Local subnets" -msgstr "本地子网" - -msgid "MAC" -msgstr "MAC" - -msgid "Maximum entries" -msgstr "最大条目" - -msgid "" -"Maximum number of accounting periods to keep, use zero to keep databases " -"forever." -msgstr "保留的统计周期数据库的最大数量，设置 0 表示不限制。" - -msgid "Netlink Bandwidth Monitor" -msgstr "网络带宽监视器" - -msgid "Netlink Bandwidth Monitor - Backup / Restore" -msgstr "网络带宽监视器 - 备份 / 恢复" - -msgid "Netlink Bandwidth Monitor - Configuration" -msgstr "网络带宽监视器 - 配置" - -msgid "No data recorded yet." -msgstr "暂无数据记录。" - -msgid "Only conntrack streams from or to any of these networks are counted." -msgstr "仅统计来自或目标为这些网络接口的连接流量。" - -msgid "Only conntrack streams from or to any of these subnets are counted." -msgstr "仅统计来自或目标为这些子网的连接流量。" - -msgid "Preallocate database" -msgstr "预分配数据库" - -msgid "Protocol Mapping" -msgstr "协议映射" - -msgid "" -"Protocol mappings to distinguish traffic types per host, one mapping per " -"line. The first value specifies the IP protocol, the second value the port " -"number and the third column is the name of the mapped protocol." -msgstr "" -"协议映射用于区分流量类型，每行一条。第一个值指定 IP 协议类型，第二个值是端口" -"号，第三个值是映射的协议名称。" - -msgid "Refresh interval" -msgstr "刷新间隔" - -msgid "Restore" -msgstr "恢复" - -msgid "Restore Database Backup" -msgstr "恢复数据库备份" - -msgid "Select accounting period:" -msgstr "选择统计周期：" - -msgid "Source IP" -msgstr "源 IP" - -msgid "Start date" -msgstr "起始日期" - -msgid "Start date of the first accounting period, e.g. begin of ISP contract." -msgstr "第一个统计周期的起始日期，例如：ISP 合约的起始日期。" - -msgid "Stored periods" -msgstr "储存周期" - -msgid "" -"The Netlink Bandwidth Monitor (nlbwmon) is a lightweight, efficient traffic " -"accounting program keeping track of bandwidth usage per host and protocol." -msgstr "" -"网络带宽监视器（nlbwmon）是一个轻量、高效的流量统计程序，可以统计每个主机和协" -"议的带宽使用情况。" - -msgid "The following database files have been restored: %s" -msgstr "以下数据库文件已恢复：%s" - -msgid "" -"The maximum amount of entries that should be put into the database, setting " -"the limit to 0 will allow databases to grow indefinitely." -msgstr "数据库中的最大条目数量, 设置为 0 将允许数据库无限增长。" - -msgid "Traffic / Host" -msgstr "流量 / 主机" - -msgid "Traffic Distribution" -msgstr "流量分布" - -msgid "Up. (Bytes / Pkts.)" -msgstr "上传（字节 / 数据包）" - -msgid "Upload (Bytes / Packets)" -msgstr "上传（字节 / 数据包）" - -msgid "Upload / Application" -msgstr "上传 / 应用层协议" - -msgid "Vendor: Example Corp." -msgstr "供应商: Example Corp." - -msgid "Warning" -msgstr "警告" - -msgid "" -"Whether to gzip compress archive databases. Compressing the database files " -"makes accessing old data slightly slower but helps to reduce storage " -"requirements." -msgstr "" -"是否使用 gzip 压缩数据库存档。压缩数据库文件会使访问旧数据稍微慢一些, 但有助" -"于减少存储占用空间。" - -msgid "" -"Whether to preallocate the maximum possible database size in memory. This is " -"mainly useful for memory constrained systems which might not be able to " -"satisfy memory allocation after longer uptime periods." -msgstr "" -"是否预先分配数据库最大可能占用的内存大小。这主要适用于内存较小系统，这些系统" -"在长时间运行之后可能无法满足数据库的内存需求。" - -msgid "no traffic" -msgstr "无流量数据" - -msgid "other" -msgstr "其他" - -msgid "" -"Enable IGMP " -"snooping" -msgstr "" -"开启 IGMP snooping" - -msgid "Enables IGMP snooping on this bridge" -msgstr "在此桥接上启用 IGMP snooping 组播（多播）" - -msgid "Action" -msgstr "动作" - -msgid "Advanced Reboot" -msgstr "双分区启动切换" - -msgid "Alternative" -msgstr "备选" - -msgid "Cancel" -msgstr "取消" - -msgid "Confirm" -msgstr "确定" - -msgid "Current" -msgstr "当前" - -msgid "Firmware/OS (Kernel)" -msgstr "固件/系统 (内核)" - -msgid "Partition" -msgstr "分区" - -msgid "Partitions" -msgstr "分区" - -msgid "Perform power off..." -msgstr "点击关机..." - -msgid "Power Off Device" -msgstr "关闭设备" - -msgid "Proceed" -msgstr "处理" - -msgid "Reboot Device to an Alternative Partition" -msgstr "重启设备到备选分区" - -msgid "Reboot to alternative partition..." -msgstr "重启到备选分区。" - -msgid "Reboot to current partition" -msgstr "重启到当前分区" - -msgid "Rebooting..." -msgstr "正在重启..." - -msgid "Shutting down..." -msgstr "正在关闭..." - -msgid "Status" -msgstr "状态" - -msgid "" -"The system is rebooting now.
    DO NOT POWER OFF THE DEVICE!
    Wait a " -"few minutes before you try to reconnect. It might be necessary to renew the " -"address of your computer to reach the device again, depending on your " -"settings." -msgstr "" -"系统正在重启。
    请勿关闭设备电源！
    请等待几分钟，然后再尝试重新连" -"接。根据您的设置，可能需要更新计算机的地址才能再次访问该设备。" - -msgid "" -"The system is rebooting to an alternative partition now.
    DO NOT POWER " -"OFF THE DEVICE!
    Wait a few minutes before you try to reconnect. It " -"might be necessary to renew the address of your computer to reach the device " -"again, depending on your settings." -msgstr "" -"系统正在重新引导到备用分区。
    请勿关闭设备电源！
    请等待几分钟，然" -"后再尝试重新连接。根据您的设置，可能需要更新计算机的地址才能再次访问该设备。" - -msgid "" -"The system is shutting down now.
    DO NOT POWER OFF THE DEVICE!
    It " -"might be necessary to renew the address of your computer to reach the device " -"again, depending on your settings." -msgstr "" -"系统正在关闭。
    请勿关闭设备电源！
    根据您的设置，可能需要更新计算" -"机的地址才能再次访问该设备。" - -msgid "" -"WARNING: An alternative partition might have its own settings and completely " -"different firmware.

    As your network configuration and WiFi SSID/" -"password on alternative partition might be different, you might have to " -"adjust your computer settings to be able to access your device once it " -"reboots.

    Please also be aware that alternative partition " -"firmware might not provide an easy way to switch active partition and boot " -"back to the currently active partition.

    Click \"Proceed\" below " -"to reboot device to an alternative partition." -msgstr "" -"警告：备用分区可能具有自己的设置和完全不同的固件。

    由于备用分区上" -"的网络配置和WiFi SSID /密码可能有所不同，因此您可能必须调整计算机设置才能在设" -"备重启后访问设备。

    另请注意，备用分区固件可能无法提供切换活动分区" -"并引导回当前活动分区的简便方法。

    点击 \"继续\" 下面将设备重新引导" -"到备用分区。" - -msgid "" -"WARNING: Power off might result in a reboot on a device which doesn't " -"support power off.

    Click \"Proceed\" below to power off your " -"device." -msgstr "" -"警告： 关闭电源可能会导致不支持关闭电源的设备重新启动。

    单击下面的" -"\"继续\"以关闭设备电源。" - -msgid "Warning: There are unsaved changes that will get lost on reboot!" -msgstr "警告：某些设置没有保存，重启将导致丢失这些配置！" - -msgid "Warning: This system does not have two partitions!" -msgstr "警告：当前系统没有包括两个分区!" - -msgid "Warning: This system does not support powering off!" -msgstr "警告：本系统不支持软关机!" diff --git a/package/lean/r8125/Makefile b/package/lean/r8125/Makefile index 16062ab37..a1ec478cb 100644 --- a/package/lean/r8125/Makefile +++ b/package/lean/r8125/Makefile @@ -7,12 +7,12 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=r8125 -PKG_VERSION:=9.012.03-1 -PKG_RELEASE:=$(AUTORELEASE) +PKG_VERSION:=9.013.02-2 +PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=https://codeload.github.com/awesometic/realtek-r8125-dkms/tar.gz/$(PKG_VERSION)? -PKG_HASH:=7964aacf4a2873cbe4133aeca830bd0725f819ea286bab162026ff283510144f +PKG_HASH:=eae10100680de13e8119602c50a1748b8a0669eccd61d9a4515b4c846deb3960 PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/realtek-$(PKG_NAME)-dkms-$(PKG_VERSION) PKG_LICENSE:=GPL-2.0-only diff --git a/package/lean/r8125/patches/010-config.patch b/package/lean/r8125/patches/010-config.patch index fe4e7008d..a923f3efc 100644 --- a/package/lean/r8125/patches/010-config.patch +++ b/package/lean/r8125/patches/010-config.patch @@ -1,6 +1,6 @@ --- a/src/Makefile +++ b/src/Makefile -@@ -35,16 +35,16 @@ ENABLE_REALWOW_SUPPORT = n +@@ -35,7 +35,7 @@ ENABLE_REALWOW_SUPPORT = n ENABLE_DASH_SUPPORT = n ENABLE_DASH_PRINTER_SUPPORT = n CONFIG_DOWN_SPEED_100 = n @@ -9,10 +9,8 @@ ENABLE_S5WOL = y ENABLE_S5_KEEP_CURR_MAC = n ENABLE_EEE = y - ENABLE_S0_MAGIC_PACKET = n - ENABLE_TX_NO_CLOSE = y --ENABLE_MULTIPLE_TX_QUEUE = n -+ENABLE_MULTIPLE_TX_QUEUE = y +@@ -44,7 +44,7 @@ ENABLE_TX_NO_CLOSE = y + ENABLE_MULTIPLE_TX_QUEUE = y ENABLE_PTP_SUPPORT = n ENABLE_PTP_MASTER_MODE = n -ENABLE_RSS_SUPPORT = n diff --git a/package/lean/r8125/patches/011-ignore-rss-log.patch b/package/lean/r8125/patches/011-ignore-rss-log.patch new file mode 100644 index 000000000..05e9eee6b --- /dev/null +++ b/package/lean/r8125/patches/011-ignore-rss-log.patch @@ -0,0 +1,11 @@ +--- a/src/r8125_rss.c ++++ b/src/r8125_rss.c +@@ -91,7 +91,7 @@ int rtl8125_get_rxnfc(struct net_device + struct rtl8125_private *tp = netdev_priv(dev); + int ret = -EOPNOTSUPP; + +- netif_info(tp, drv, tp->dev, "rss get rxnfc\n"); ++ netif_dbg(tp, drv, tp->dev, "rss get rxnfc\n"); + + if (!(dev->features & NETIF_F_RXHASH)) + return ret; diff --git a/package/lean/r8125/patches/020-fixes-build-werror.patch b/package/lean/r8125/patches/020-fixes-build-werror.patch deleted file mode 100644 index 640b50b1a..000000000 --- a/package/lean/r8125/patches/020-fixes-build-werror.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- a/src/r8125_rss.c -+++ b/src/r8125_rss.c -@@ -60,21 +60,21 @@ static int rtl8125_get_rss_hash_opts(str - switch (cmd->flow_type) { - case TCP_V4_FLOW: - cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; -- /* fallthrough */ -+ fallthrough; - case UDP_V4_FLOW: - if (tp->rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV4) - cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; -- /* fallthrough */ -+ fallthrough; - case IPV4_FLOW: - cmd->data |= RXH_IP_SRC | RXH_IP_DST; - break; - case TCP_V6_FLOW: - cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; -- /* fallthrough */ -+ fallthrough; - case UDP_V6_FLOW: - if (tp->rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV6) - cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; -- /* fallthrough */ -+ fallthrough; - case IPV6_FLOW: - cmd->data |= RXH_IP_SRC | RXH_IP_DST; - break; diff --git a/package/lean/r8125/patches/030-add-LED-configuration-from-OF.patch b/package/lean/r8125/patches/030-add-LED-configuration-from-OF.patch index 9b5d8d340..5fb3f941a 100644 --- a/package/lean/r8125/patches/030-add-LED-configuration-from-OF.patch +++ b/package/lean/r8125/patches/030-add-LED-configuration-from-OF.patch @@ -8,8 +8,8 @@ #include #include #include -@@ -14818,6 +14819,23 @@ rtl8125_setup_mqs_reg(struct rtl8125_pri - } +@@ -13626,6 +13627,23 @@ rtl8125_setup_mqs_reg(struct rtl8125_pri + tp->imr_reg[i] = (u16)(IMR1_8125 + (i - 1) * 4); } +static int @@ -32,9 +32,9 @@ static void rtl8125_init_software_variable(struct net_device *dev) { -@@ -15384,6 +15402,8 @@ rtl8125_init_software_variable(struct ne - if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) - tp->rtl8125_rx_config |= EnableRxDescV3; +@@ -14260,6 +14278,8 @@ rtl8125_init_software_variable(struct ne + else if (tp->InitRxDescType == RX_DESC_RING_TYPE_4) + tp->rtl8125_rx_config &= ~EnableRxDescV4_1; + rtl8125_led_configuration(tp); + diff --git a/package/lean/r8125/patches/040-add-devname-configuration-from-OF.patch b/package/lean/r8125/patches/040-add-devname-configuration-from-OF.patch index 8caea8b94..48f991749 100644 --- a/package/lean/r8125/patches/040-add-devname-configuration-from-OF.patch +++ b/package/lean/r8125/patches/040-add-devname-configuration-from-OF.patch @@ -1,6 +1,6 @@ --- a/src/r8125_n.c +++ b/src/r8125_n.c -@@ -14820,6 +14820,23 @@ rtl8125_setup_mqs_reg(struct rtl8125_pri +@@ -13628,6 +13628,23 @@ rtl8125_setup_mqs_reg(struct rtl8125_pri } static int @@ -24,9 +24,9 @@ rtl8125_led_configuration(struct rtl8125_private *tp) { u32 led_data; -@@ -15402,6 +15419,7 @@ rtl8125_init_software_variable(struct ne - if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) - tp->rtl8125_rx_config |= EnableRxDescV3; +@@ -14278,6 +14295,7 @@ rtl8125_init_software_variable(struct ne + else if (tp->InitRxDescType == RX_DESC_RING_TYPE_4) + tp->rtl8125_rx_config &= ~EnableRxDescV4_1; + rtl8125_devname_configuration(tp); rtl8125_led_configuration(tp); diff --git a/package/lean/r8126/Makefile b/package/lean/r8126/Makefile new file mode 100644 index 000000000..0ea28b3e4 --- /dev/null +++ b/package/lean/r8126/Makefile @@ -0,0 +1,34 @@ +# +# Download realtek r8126 linux driver from official site: +# [https://www.realtek.com/en/component/zoo/category/network-interface-controllers-10-100-1000m-gigabit-ethernet-pci-express-software] +# + +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk + +PKG_NAME:=r8126 +PKG_VERSION:=10.013.00 +PKG_RELEASE:=1 + +PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)-$(PKG_VERSION) + +include $(INCLUDE_DIR)/package.mk + +define KernelPackage/r8126 + TITLE:=Driver for Realtek r8126 chipsets + SUBMENU:=Network Devices + VERSION:=$(LINUX_VERSION)+$(PKG_VERSION)-$(BOARD)-$(PKG_RELEASE) + DEPENDS:=@PCI_SUPPORT + FILES:= $(PKG_BUILD_DIR)/r8126.ko + AUTOLOAD:=$(call AutoProbe,r8126) +endef + +define Package/r8126/description + This package contains a driver for Realtek r8126 chipsets. +endef + +define Build/Compile + +$(KERNEL_MAKE) M=$(PKG_BUILD_DIR) modules +endef + +$(eval $(call KernelPackage,r8126)) diff --git a/package/lean/r8126/patches/010-config.patch b/package/lean/r8126/patches/010-config.patch new file mode 100644 index 000000000..e0837e9b1 --- /dev/null +++ b/package/lean/r8126/patches/010-config.patch @@ -0,0 +1,11 @@ +--- a/Makefile ++++ b/Makefile +@@ -44,7 +44,7 @@ ENABLE_TX_NO_CLOSE = y + ENABLE_MULTIPLE_TX_QUEUE = y + ENABLE_PTP_SUPPORT = n + ENABLE_PTP_MASTER_MODE = n +-ENABLE_RSS_SUPPORT = n ++ENABLE_RSS_SUPPORT = y + ENABLE_LIB_SUPPORT = n + ENABLE_USE_FIRMWARE_FILE = n + DISABLE_WOL_SUPPORT = n diff --git a/package/lean/r8126/src/Makefile b/package/lean/r8126/src/Makefile new file mode 100644 index 000000000..3e75c19ef --- /dev/null +++ b/package/lean/r8126/src/Makefile @@ -0,0 +1,209 @@ +# SPDX-License-Identifier: GPL-2.0-only +################################################################################ +# +# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see . +# +# Author: +# Realtek NIC software team +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ + +################################################################################ +# This product is covered by one or more of the following patents: +# US6,570,884, US6,115,776, and US6,327,625. +################################################################################ + +CONFIG_SOC_LAN = n +ENABLE_REALWOW_SUPPORT = n +ENABLE_DASH_SUPPORT = n +ENABLE_DASH_PRINTER_SUPPORT = n +CONFIG_DOWN_SPEED_100 = n +CONFIG_ASPM = y +ENABLE_S5WOL = y +ENABLE_S5_KEEP_CURR_MAC = n +ENABLE_EEE = y +ENABLE_S0_MAGIC_PACKET = n +ENABLE_TX_NO_CLOSE = y +ENABLE_MULTIPLE_TX_QUEUE = y +ENABLE_PTP_SUPPORT = n +ENABLE_PTP_MASTER_MODE = n +ENABLE_RSS_SUPPORT = n +ENABLE_LIB_SUPPORT = n +ENABLE_USE_FIRMWARE_FILE = n +DISABLE_WOL_SUPPORT = n +DISABLE_MULTI_MSIX_VECTOR = n +ENABLE_DOUBLE_VLAN = n +ENABLE_PAGE_REUSE = n +ENABLE_RX_PACKET_FRAGMENT = n + +ifneq ($(KERNELRELEASE),) + obj-m := r8126.o + r8126-objs := r8126_n.o rtl_eeprom.o rtltool.o + ifeq ($(CONFIG_SOC_LAN), y) + EXTRA_CFLAGS += -DCONFIG_SOC_LAN + endif + ifeq ($(ENABLE_REALWOW_SUPPORT), y) + r8126-objs += r8126_realwow.o + EXTRA_CFLAGS += -DENABLE_REALWOW_SUPPORT + endif + ifeq ($(ENABLE_DASH_SUPPORT), y) + r8126-objs += r8126_dash.o + EXTRA_CFLAGS += -DENABLE_DASH_SUPPORT + endif + ifeq ($(ENABLE_DASH_PRINTER_SUPPORT), y) + r8126-objs += r8126_dash.o + EXTRA_CFLAGS += -DENABLE_DASH_SUPPORT -DENABLE_DASH_PRINTER_SUPPORT + endif + EXTRA_CFLAGS += -DCONFIG_R8126_NAPI + EXTRA_CFLAGS += -DCONFIG_R8126_VLAN + ifeq ($(CONFIG_DOWN_SPEED_100), y) + EXTRA_CFLAGS += -DCONFIG_DOWN_SPEED_100 + endif + ifeq ($(CONFIG_ASPM), y) + EXTRA_CFLAGS += -DCONFIG_ASPM + endif + ifeq ($(ENABLE_S5WOL), y) + EXTRA_CFLAGS += -DENABLE_S5WOL + endif + ifeq ($(ENABLE_S5_KEEP_CURR_MAC), y) + EXTRA_CFLAGS += -DENABLE_S5_KEEP_CURR_MAC + endif + ifeq ($(ENABLE_EEE), y) + EXTRA_CFLAGS += -DENABLE_EEE + endif + ifeq ($(ENABLE_S0_MAGIC_PACKET), y) + EXTRA_CFLAGS += -DENABLE_S0_MAGIC_PACKET + endif + ifeq ($(ENABLE_TX_NO_CLOSE), y) + EXTRA_CFLAGS += -DENABLE_TX_NO_CLOSE + endif + ifeq ($(ENABLE_MULTIPLE_TX_QUEUE), y) + EXTRA_CFLAGS += -DENABLE_MULTIPLE_TX_QUEUE + endif + ifeq ($(ENABLE_PTP_SUPPORT), y) + r8126-objs += r8126_ptp.o + EXTRA_CFLAGS += -DENABLE_PTP_SUPPORT + endif + ifeq ($(ENABLE_PTP_MASTER_MODE), y) + EXTRA_CFLAGS += -DENABLE_PTP_MASTER_MODE + endif + ifeq ($(ENABLE_RSS_SUPPORT), y) + r8126-objs += r8126_rss.o + EXTRA_CFLAGS += -DENABLE_RSS_SUPPORT + endif + ifeq ($(ENABLE_LIB_SUPPORT), y) + r8126-objs += r8126_lib.o + EXTRA_CFLAGS += -DENABLE_LIB_SUPPORT + endif + ifeq ($(ENABLE_USE_FIRMWARE_FILE), y) + r8126-objs += r8126_firmware.o + EXTRA_CFLAGS += -DENABLE_USE_FIRMWARE_FILE + endif + ifeq ($(DISABLE_WOL_SUPPORT), y) + EXTRA_CFLAGS += -DDISABLE_WOL_SUPPORT + endif + ifeq ($(DISABLE_MULTI_MSIX_VECTOR), y) + EXTRA_CFLAGS += -DDISABLE_MULTI_MSIX_VECTOR + endif + ifeq ($(ENABLE_DOUBLE_VLAN), y) + EXTRA_CFLAGS += -DENABLE_DOUBLE_VLAN + endif + ifeq ($(ENABLE_PAGE_REUSE), y) + EXTRA_CFLAGS += -DENABLE_PAGE_REUSE + endif + ifeq ($(ENABLE_RX_PACKET_FRAGMENT), y) + EXTRA_CFLAGS += -DENABLE_RX_PACKET_FRAGMENT + endif +else + BASEDIR := /lib/modules/$(shell uname -r) + KERNELDIR ?= $(BASEDIR)/build + PWD :=$(shell pwd) + DRIVERDIR := $(shell find $(BASEDIR)/kernel/drivers/net/ethernet -name realtek -type d) + ifeq ($(DRIVERDIR),) + DRIVERDIR := $(shell find $(BASEDIR)/kernel/drivers/net -name realtek -type d) + endif + ifeq ($(DRIVERDIR),) + DRIVERDIR := $(BASEDIR)/kernel/drivers/net + endif + RTKDIR := $(subst $(BASEDIR)/,,$(DRIVERDIR)) + + KERNEL_GCC_VERSION := $(shell cat /proc/version | sed -n 's/.*gcc version \([[:digit:]]\.[[:digit:]]\.[[:digit:]]\).*/\1/p') + CCVERSION = $(shell $(CC) -dumpversion) + + KVER = $(shell uname -r) + KMAJ = $(shell echo $(KVER) | \ + sed -e 's/^\([0-9][0-9]*\)\.[0-9][0-9]*\.[0-9][0-9]*.*/\1/') + KMIN = $(shell echo $(KVER) | \ + sed -e 's/^[0-9][0-9]*\.\([0-9][0-9]*\)\.[0-9][0-9]*.*/\1/') + KREV = $(shell echo $(KVER) | \ + sed -e 's/^[0-9][0-9]*\.[0-9][0-9]*\.\([0-9][0-9]*\).*/\1/') + + kver_ge = $(shell \ + echo test | awk '{if($(KMAJ) < $(1)) {print 0} else { \ + if($(KMAJ) > $(1)) {print 1} else { \ + if($(KMIN) < $(2)) {print 0} else { \ + if($(KMIN) > $(2)) {print 1} else { \ + if($(KREV) < $(3)) {print 0} else { print 1 } \ + }}}}}' \ + ) + +.PHONY: all +all: print_vars clean modules install + +print_vars: + @echo + @echo "CC: " $(CC) + @echo "CCVERSION: " $(CCVERSION) + @echo "KERNEL_GCC_VERSION: " $(KERNEL_GCC_VERSION) + @echo "KVER: " $(KVER) + @echo "KMAJ: " $(KMAJ) + @echo "KMIN: " $(KMIN) + @echo "KREV: " $(KREV) + @echo "BASEDIR: " $(BASEDIR) + @echo "DRIVERDIR: " $(DRIVERDIR) + @echo "PWD: " $(PWD) + @echo "RTKDIR: " $(RTKDIR) + @echo + +.PHONY:modules +modules: +#ifeq ($(call kver_ge,5,0,0),1) + $(MAKE) -C $(KERNELDIR) M=$(PWD) modules +#else +# $(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) modules +#endif + +.PHONY:clean +clean: +#ifeq ($(call kver_ge,5,0,0),1) + $(MAKE) -C $(KERNELDIR) M=$(PWD) clean +#else +# $(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) clean +#endif + +.PHONY:install +install: +#ifeq ($(call kver_ge,5,0,0),1) + $(MAKE) -C $(KERNELDIR) M=$(PWD) INSTALL_MOD_DIR=$(RTKDIR) modules_install +#else +# $(MAKE) -C $(KERNELDIR) SUBDIRS=$(PWD) INSTALL_MOD_DIR=$(RTKDIR) modules_install +#endif + +endif diff --git a/package/lean/r8126/src/Makefile_linux24x b/package/lean/r8126/src/Makefile_linux24x new file mode 100644 index 000000000..244bb08c8 --- /dev/null +++ b/package/lean/r8126/src/Makefile_linux24x @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: GPL-2.0-only +################################################################################ +# +# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see . +# +# Author: +# Realtek NIC software team +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ + +################################################################################ +# This product is covered by one or more of the following patents: +# US6,570,884, US6,115,776, and US6,327,625. +################################################################################ + +CC := gcc +LD := ld +ARCH := $(shell uname -m | sed 's/i.86/i386/') +KSRC := /lib/modules/$(shell uname -r)/build +CONFIG_FILE := $(KSRC)/include/linux/autoconf.h +KMISC := /lib/modules/$(shell uname -r)/kernel/drivers/net/ + + +ifeq ($(ARCH),x86_64) + MODCFLAGS += -mcmodel=kernel -mno-red-zone +endif + +#standard flags for module builds +MODCFLAGS += -DLINUX -D__KERNEL__ -DMODULE -O2 -pipe -Wall +MODCFLAGS += -I$(KSRC)/include -I. +MODCFLAGS += -DMODVERSIONS -DEXPORT_SYMTAB -include $(KSRC)/include/linux/modversions.h +SOURCE := r8126_n.c rtl_eeprom.c rtltool.c +OBJS := $(SOURCE:.c=.o) + + +SMP := $(shell $(CC) $(MODCFLAGS) -E -dM $(CONFIG_FILE) | \ + grep CONFIG_SMP | awk '{print $$3}') + +ifneq ($(SMP),1) + SMP := 0 +endif + +ifeq ($(SMP),1) + MODCFLAGS += -D__SMP__ +endif + +modules: $(OBJS) + $(LD) -r $^ -o r8126.o + strip --strip-debug r8126.o + +%.o: %.c + $(CC) $(MODCFLAGS) -c $< -o $@ + +clean: + rm *.o -f + +install: + install -m 744 -c r8126.o $(KMISC) diff --git a/package/lean/r8126/src/r8126.h b/package/lean/r8126/src/r8126.h new file mode 100644 index 000000000..9c66f2441 --- /dev/null +++ b/package/lean/r8126/src/r8126.h @@ -0,0 +1,2789 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* +################################################################################ +# +# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see . +# +# Author: +# Realtek NIC software team +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ +*/ + +/************************************************************************************ + * This product is covered by one or more of the following patents: + * US6,570,884, US6,115,776, and US6,327,625. + ***********************************************************************************/ + +#ifndef __R8126_H +#define __R8126_H + +//#include +#include +#include +#include +#include "r8126_dash.h" +#include "r8126_realwow.h" +#include "r8126_ptp.h" +#include "r8126_rss.h" +#ifdef ENABLE_LIB_SUPPORT +#include "r8126_lib.h" +#endif + +#ifndef fallthrough +#define fallthrough +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,3,0) +static inline +ssize_t strscpy(char *dest, const char *src, size_t count) +{ + long res = 0; + + if (count == 0) + return -E2BIG; + + while (count) { + char c; + + c = src[res]; + dest[res] = c; + if (!c) + return res; + res++; + count--; + } + + /* Hit buffer length without finding a NUL; force NUL-termination. */ + if (res) + dest[res-1] = '\0'; + + return -E2BIG; +} +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)) +static inline unsigned char *skb_checksum_start(const struct sk_buff *skb) +{ +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22)) + return skb->head + skb->csum_start; +#else /* < 2.6.22 */ + return skb_transport_header(skb); +#endif +} +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) +static inline void netdev_tx_sent_queue(struct netdev_queue *dev_queue, + unsigned int bytes) +{} +static inline void netdev_tx_completed_queue(struct netdev_queue *dev_queue, + unsigned int pkts, + unsigned int bytes) +{} +static inline void netdev_tx_reset_queue(struct netdev_queue *q) {} +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(5,2,0) +#define netdev_xmit_more() (0) +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(5,8,0) +#define netif_testing_on(dev) +#define netif_testing_off(dev) +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,32) +typedef int netdev_tx_t; +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0) +static inline bool dev_page_is_reusable(struct page *page) +{ + return likely(page_to_nid(page) == numa_mem_id() && + !page_is_pfmemalloc(page)); +} +#endif + +/* +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0)&& !defined(ENABLE_LIB_SUPPORT) +#define RTL_USE_NEW_INTR_API +#endif +*/ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0) +#define dma_map_page_attrs(dev, page, offset, size, dir, attrs) \ + dma_map_page(dev, page, offset, size, dir) +#define dma_unmap_page_attrs(dev, page, size, dir, attrs) \ + dma_unmap_page(dev, page, size, dir) +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) +#define page_ref_inc(page) atomic_inc(&page->_count) +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,4,216) +#define page_ref_count(page) atomic_read(&page->_count) +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,4,216) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) +#define skb_transport_offset(skb) (skb->h.raw - skb->data) +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,26) +#define device_set_wakeup_enable(dev, val) do {} while (0) +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,14,0) +static inline void ether_addr_copy(u8 *dst, const u8 *src) +{ + u16 *a = (u16 *)dst; + const u16 *b = (const u16 *)src; + + a[0] = b[0]; + a[1] = b[1]; + a[2] = b[2]; +} +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,15,0) +#define IS_ERR_OR_NULL(ptr) (!ptr) +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,13,0) +#define reinit_completion(x) ((x)->done = 0) +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,39) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32) +#define pm_runtime_mark_last_busy(x) +#define pm_runtime_put_autosuspend(x) pm_runtime_put(x) +#define pm_runtime_put_sync_autosuspend(x) pm_runtime_put_sync(x) + +static inline bool pm_runtime_suspended(struct device *dev) +{ + return dev->power.runtime_status == RPM_SUSPENDED + && !dev->power.disable_depth; +} + +static inline bool pm_runtime_active(struct device *dev) +{ + return dev->power.runtime_status == RPM_ACTIVE + || dev->power.disable_depth; +} +#endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,36) +#define queue_delayed_work(long_wq, work, delay) schedule_delayed_work(work, delay) +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34) +#define netif_printk(priv, type, level, netdev, fmt, args...) \ + do { \ + if (netif_msg_##type(priv)) \ + printk(level "%s: " fmt,(netdev)->name , ##args); \ + } while (0) + +#define netif_emerg(priv, type, netdev, fmt, args...) \ + netif_printk(priv, type, KERN_EMERG, netdev, fmt, ##args) +#define netif_alert(priv, type, netdev, fmt, args...) \ + netif_printk(priv, type, KERN_ALERT, netdev, fmt, ##args) +#define netif_crit(priv, type, netdev, fmt, args...) \ + netif_printk(priv, type, KERN_CRIT, netdev, fmt, ##args) +#define netif_err(priv, type, netdev, fmt, args...) \ + netif_printk(priv, type, KERN_ERR, netdev, fmt, ##args) +#define netif_warn(priv, type, netdev, fmt, args...) \ + netif_printk(priv, type, KERN_WARNING, netdev, fmt, ##args) +#define netif_notice(priv, type, netdev, fmt, args...) \ + netif_printk(priv, type, KERN_NOTICE, netdev, fmt, ##args) +#define netif_info(priv, type, netdev, fmt, args...) \ + netif_printk(priv, type, KERN_INFO, (netdev), fmt, ##args) +#endif +#endif +#endif +#endif +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15) +#define setup_timer(_timer, _function, _data) \ +do { \ + (_timer)->function = _function; \ + (_timer)->data = _data; \ + init_timer(_timer); \ +} while (0) +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,15) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) +#if defined(skb_vlan_tag_present) && !defined(vlan_tx_tag_present) +#define vlan_tx_tag_present skb_vlan_tag_present +#endif +#if defined(skb_vlan_tag_get) && !defined(vlan_tx_tag_get) +#define vlan_tx_tag_get skb_vlan_tag_get +#endif +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) + +#define RTL_ALLOC_SKB_INTR(napi, length) dev_alloc_skb(length) +#define R8126_USE_NAPI_ALLOC_SKB 0 +#ifdef CONFIG_R8126_NAPI +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0) +#undef RTL_ALLOC_SKB_INTR +#define RTL_ALLOC_SKB_INTR(napi, length) napi_alloc_skb(napi, length) +#undef R8126_USE_NAPI_ALLOC_SKB +#define R8126_USE_NAPI_ALLOC_SKB 1 +#endif +#endif + +#define RTL_BUILD_SKB_INTR(data, frag_size) build_skb(data, frag_size) +#ifdef CONFIG_R8126_NAPI +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,12,0) +#undef RTL_BUILD_SKB_INTR +#define RTL_BUILD_SKB_INTR(data, frag_size) napi_build_skb(data, frag_size) +#endif +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0) +#define eth_random_addr(addr) random_ether_addr(addr) +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,6,0) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0) +#define netdev_features_t u32 +#endif +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,5,0) +#define NETIF_F_ALL_CSUM NETIF_F_CSUM_MASK +#else +#ifndef NETIF_F_ALL_CSUM +#define NETIF_F_ALL_CSUM NETIF_F_CSUM_MASK +#endif +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37) +#define ENABLE_R8126_PROCFS +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) +#define ENABLE_R8126_SYSFS +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) +#define NETIF_F_HW_VLAN_RX NETIF_F_HW_VLAN_CTAG_RX +#define NETIF_F_HW_VLAN_TX NETIF_F_HW_VLAN_CTAG_TX +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,8,0) +#define __devinit +#define __devexit +#define __devexit_p(func) func +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) +#define CHECKSUM_PARTIAL CHECKSUM_HW +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) +#define irqreturn_t void +#define IRQ_HANDLED 1 +#define IRQ_NONE 0 +#define IRQ_RETVAL(x) +#endif + +#ifndef NETIF_F_RXALL +#define NETIF_F_RXALL 0 +#endif + +#ifndef NETIF_F_RXFCS +#define NETIF_F_RXFCS 0 +#endif + +#if !defined(HAVE_FREE_NETDEV) && (LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0)) +#define free_netdev(x) kfree(x) +#endif + +#ifndef SET_NETDEV_DEV +#define SET_NETDEV_DEV(net, pdev) +#endif + +#ifndef SET_MODULE_OWNER +#define SET_MODULE_OWNER(dev) +#endif + +#ifndef SA_SHIRQ +#define SA_SHIRQ IRQF_SHARED +#endif + +#ifndef NETIF_F_GSO +#define gso_size tso_size +#define gso_segs tso_segs +#endif + +#ifndef PCI_VENDOR_ID_DLINK +#define PCI_VENDOR_ID_DLINK 0x1186 +#endif + +#ifndef dma_mapping_error +#define dma_mapping_error(a,b) 0 +#endif + +#ifndef netif_err +#define netif_err(a,b,c,d) +#endif + +#ifndef AUTONEG_DISABLE +#define AUTONEG_DISABLE 0x00 +#endif + +#ifndef AUTONEG_ENABLE +#define AUTONEG_ENABLE 0x01 +#endif + +#ifndef BMCR_SPEED1000 +#define BMCR_SPEED1000 0x0040 +#endif + +#ifndef BMCR_SPEED100 +#define BMCR_SPEED100 0x2000 +#endif + +#ifndef BMCR_SPEED10 +#define BMCR_SPEED10 0x0000 +#endif + +#ifndef SPEED_UNKNOWN +#define SPEED_UNKNOWN -1 +#endif + +#ifndef DUPLEX_UNKNOWN +#define DUPLEX_UNKNOWN 0xff +#endif + +#ifndef SUPPORTED_Pause +#define SUPPORTED_Pause (1 << 13) +#endif + +#ifndef SUPPORTED_Asym_Pause +#define SUPPORTED_Asym_Pause (1 << 14) +#endif + +#ifndef MDIO_EEE_100TX +#define MDIO_EEE_100TX 0x0002 +#endif + +#ifndef MDIO_EEE_1000T +#define MDIO_EEE_1000T 0x0004 +#endif + +#ifndef MDIO_EEE_2_5GT +#define MDIO_EEE_2_5GT 0x0001 +#endif + +#ifndef MDIO_EEE_5GT +#define MDIO_EEE_5GT 0x0002 +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29) +#ifdef CONFIG_NET_POLL_CONTROLLER +#define RTL_NET_POLL_CONTROLLER dev->poll_controller=rtl8126_netpoll +#else +#define RTL_NET_POLL_CONTROLLER +#endif + +#ifdef CONFIG_R8126_VLAN +#define RTL_SET_VLAN dev->vlan_rx_register=rtl8126_vlan_rx_register +#else +#define RTL_SET_VLAN +#endif + +#define RTL_NET_DEVICE_OPS(ops) dev->open=rtl8126_open; \ + dev->hard_start_xmit=rtl8126_start_xmit; \ + dev->get_stats=rtl8126_get_stats; \ + dev->stop=rtl8126_close; \ + dev->tx_timeout=rtl8126_tx_timeout; \ + dev->set_multicast_list=rtl8126_set_rx_mode; \ + dev->change_mtu=rtl8126_change_mtu; \ + dev->set_mac_address=rtl8126_set_mac_address; \ + dev->do_ioctl=rtl8126_do_ioctl; \ + RTL_NET_POLL_CONTROLLER; \ + RTL_SET_VLAN; +#else +#define RTL_NET_DEVICE_OPS(ops) dev->netdev_ops=&ops +#endif + +#ifndef FALSE +#define FALSE 0 +#endif + +#ifndef TRUE +#define TRUE 1 +#endif + +#ifndef false +#define false 0 +#endif + +#ifndef true +#define true 1 +#endif + +//Hardware will continue interrupt 10 times after interrupt finished. +#define RTK_KEEP_INTERRUPT_COUNT (10) + +//the low 32 bit address of receive buffer must be 8-byte alignment. +#ifndef NET_IP_ALIGN +#define NET_IP_ALIGN 2 +#endif +#define R8126_RX_ALIGN NET_IP_ALIGN + +#ifdef CONFIG_R8126_NAPI +#define NAPI_SUFFIX "-NAPI" +#else +#define NAPI_SUFFIX "" +#endif +#if defined(ENABLE_DASH_PRINTER_SUPPORT) +#define DASH_SUFFIX "-PRINTER" +#elif defined(ENABLE_DASH_SUPPORT) +#define DASH_SUFFIX "-DASH" +#else +#define DASH_SUFFIX "" +#endif + +#if defined(ENABLE_REALWOW_SUPPORT) +#define REALWOW_SUFFIX "-REALWOW" +#else +#define REALWOW_SUFFIX "" +#endif + +#if defined(ENABLE_PTP_SUPPORT) +#define PTP_SUFFIX "-PTP" +#else +#define PTP_SUFFIX "" +#endif + +#if defined(ENABLE_RSS_SUPPORT) +#define RSS_SUFFIX "-RSS" +#else +#define RSS_SUFFIX "" +#endif + +#define RTL8126_VERSION "10.013.00" NAPI_SUFFIX DASH_SUFFIX REALWOW_SUFFIX PTP_SUFFIX RSS_SUFFIX +#define MODULENAME "r8126" +#define PFX MODULENAME ": " + +#define GPL_CLAIM "\ +r8126 Copyright (C) 2024 Realtek NIC software team \n \ +This program comes with ABSOLUTELY NO WARRANTY; for details, please see . \n \ +This is free software, and you are welcome to redistribute it under certain conditions; see . \n" + +#ifdef RTL8126_DEBUG +#define assert(expr) \ + if(!(expr)) { \ + printk( "Assertion failed! %s,%s,%s,line=%d\n", \ + #expr,__FILE__,__FUNCTION__,__LINE__); \ + } +#define dprintk(fmt, args...) do { printk(PFX fmt, ## args); } while (0) +#else +#define assert(expr) do {} while (0) +#define dprintk(fmt, args...) do {} while (0) +#endif /* RTL8126_DEBUG */ + +#define R8126_MSG_DEFAULT \ + (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN) + +#ifdef CONFIG_R8126_NAPI +#define rtl8126_rx_hwaccel_skb vlan_hwaccel_receive_skb +#define rtl8126_rx_quota(count, quota) min(count, quota) +#else +#define rtl8126_rx_hwaccel_skb vlan_hwaccel_rx +#define rtl8126_rx_quota(count, quota) count +#endif + +/* MAC address length */ +#ifndef MAC_ADDR_LEN +#define MAC_ADDR_LEN 6 +#endif + +#ifndef MAC_PROTOCOL_LEN +#define MAC_PROTOCOL_LEN 2 +#endif + +#ifndef ETH_FCS_LEN +#define ETH_FCS_LEN 4 +#endif + +#ifndef NETIF_F_TSO6 +#define NETIF_F_TSO6 0 +#endif + +#define Reserved2_data 7 +#define RX_DMA_BURST_unlimited 7 /* Maximum PCI burst, '7' is unlimited */ +#define RX_DMA_BURST_512 5 +#define RX_DMA_BURST_256 4 +#define TX_DMA_BURST_unlimited 7 +#define TX_DMA_BURST_1024 6 +#define TX_DMA_BURST_512 5 +#define TX_DMA_BURST_256 4 +#define TX_DMA_BURST_128 3 +#define TX_DMA_BURST_64 2 +#define TX_DMA_BURST_32 1 +#define TX_DMA_BURST_16 0 +#define Reserved1_data 0x3F +#define RxPacketMaxSize 0x3FE8 /* 16K - 1 - ETH_HLEN - VLAN - CRC... */ +#define Jumbo_Frame_1k ETH_DATA_LEN +#define Jumbo_Frame_2k (2*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN) +#define Jumbo_Frame_3k (3*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN) +#define Jumbo_Frame_4k (4*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN) +#define Jumbo_Frame_5k (5*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN) +#define Jumbo_Frame_6k (6*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN) +#define Jumbo_Frame_7k (7*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN) +#define Jumbo_Frame_8k (8*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN) +#define Jumbo_Frame_9k (9*1024 - ETH_HLEN - VLAN_HLEN - ETH_FCS_LEN) +#define InterFrameGap 0x03 /* 3 means InterFrameGap = the shortest one */ +#define RxEarly_off_V1 (0x07 << 11) +#define RxEarly_off_V2 (1 << 11) +#define Rx_Single_fetch_V2 (1 << 14) +#define Rx_Close_Multiple (1 << 21) +#define Rx_Fetch_Number_8 (1 << 30) + +#define R8126_REGS_SIZE (256) +#define R8126_MAC_REGS_SIZE (256) +#define R8126_PHY_REGS_SIZE (16*2) +#define R8126_EPHY_REGS_SIZE (31*2) +#define R8126_ERI_REGS_SIZE (0x100) +#define R8126_REGS_DUMP_SIZE (0x400) +#define R8126_PCI_REGS_SIZE (0x100) +#define R8126_NAPI_WEIGHT 64 + +#define R8126_MAX_MSIX_VEC_8125A 4 +#define R8126_MAX_MSIX_VEC_8125B 32 +#define R8126_MAX_MSIX_VEC_8125D 32 +#define R8126_MIN_MSIX_VEC_8125B 22 +#define R8126_MIN_MSIX_VEC_8125BP 31 +#define R8126_MIN_MSIX_VEC_8125D 20 +#define R8126_MAX_MSIX_VEC 32 +#define R8126_MAX_RX_QUEUES_VEC_V3 (16) + +#define RTL8126_TX_TIMEOUT (6 * HZ) +#define RTL8126_LINK_TIMEOUT (1 * HZ) +#define RTL8126_ESD_TIMEOUT (2 * HZ) + +#define rtl8126_rx_page_size(order) (PAGE_SIZE << order) + +#define MAX_NUM_TX_DESC 1024 /* Maximum number of Tx descriptor registers */ +#define MAX_NUM_RX_DESC 1024 /* Maximum number of Rx descriptor registers */ + +#define MIN_NUM_TX_DESC 256 /* Minimum number of Tx descriptor registers */ +#define MIN_NUM_RX_DESC 256 /* Minimum number of Rx descriptor registers */ + +#define NUM_TX_DESC MAX_NUM_TX_DESC /* Number of Tx descriptor registers */ +#define NUM_RX_DESC MAX_NUM_RX_DESC /* Number of Rx descriptor registers */ + +#ifdef ENABLE_DOUBLE_VLAN +#define RX_BUF_SIZE 0x05F6 /* 0x05F6(1526) = 1514 + 8(double vlan) + 4(crc) bytes */ +#define RT_VALN_HLEN 8 /* 8(double vlan) bytes */ +#else +#define RX_BUF_SIZE 0x05F2 /* 0x05F2(1522) = 1514 + 4(single vlan) + 4(crc) bytes */ +#define RT_VALN_HLEN 4 /* 4(single vlan) bytes */ +#endif + +#define R8126_MAX_TX_QUEUES (2) +#define R8126_MAX_RX_QUEUES (4) +#define R8126_MAX_QUEUES R8126_MAX_RX_QUEUES + +#define OCP_STD_PHY_BASE 0xa400 + +//Channel Wait Count +#define R8126_CHANNEL_WAIT_COUNT (20000) +#define R8126_CHANNEL_WAIT_TIME (1) // 1us +#define R8126_CHANNEL_EXIT_DELAY_TIME (20) //20us + +#ifdef ENABLE_LIB_SUPPORT +#define R8126_MULTI_RX_Q(tp) 0 +#else +#define R8126_MULTI_RX_Q(tp) (tp->num_rx_rings > 1) +#endif + +#define NODE_ADDRESS_SIZE 6 + +#define SHORT_PACKET_PADDING_BUF_SIZE 256 + +#define RTK_MAGIC_DEBUG_VALUE 0x0badbeef + +/* write/read MMIO register */ +#define RTL_W8(tp, reg, val8) writeb((val8), tp->mmio_addr + (reg)) +#define RTL_W16(tp, reg, val16) writew((val16), tp->mmio_addr + (reg)) +#define RTL_W32(tp, reg, val32) writel((val32), tp->mmio_addr + (reg)) +#define RTL_R8(tp, reg) readb(tp->mmio_addr + (reg)) +#define RTL_R16(tp, reg) readw(tp->mmio_addr + (reg)) +#define RTL_R32(tp, reg) ((unsigned long) readl(tp->mmio_addr + (reg))) + +#ifndef DMA_64BIT_MASK +#define DMA_64BIT_MASK 0xffffffffffffffffULL +#endif + +#ifndef DMA_32BIT_MASK +#define DMA_32BIT_MASK 0x00000000ffffffffULL +#endif + +#ifndef NETDEV_TX_OK +#define NETDEV_TX_OK 0 /* driver took care of packet */ +#endif + +#ifndef NETDEV_TX_BUSY +#define NETDEV_TX_BUSY 1 /* driver tx path was busy*/ +#endif + +#ifndef NETDEV_TX_LOCKED +#define NETDEV_TX_LOCKED -1t /* driver tx lock was already taken */ +#endif + +#ifndef ADVERTISED_Pause +#define ADVERTISED_Pause (1 << 13) +#endif + +#ifndef ADVERTISED_Asym_Pause +#define ADVERTISED_Asym_Pause (1 << 14) +#endif + +#ifndef ADVERTISE_PAUSE_CAP +#define ADVERTISE_PAUSE_CAP 0x400 +#endif + +#ifndef ADVERTISE_PAUSE_ASYM +#define ADVERTISE_PAUSE_ASYM 0x800 +#endif + +#ifndef MII_CTRL1000 +#define MII_CTRL1000 0x09 +#endif + +#ifndef ADVERTISE_1000FULL +#define ADVERTISE_1000FULL 0x200 +#endif + +#ifndef ADVERTISE_1000HALF +#define ADVERTISE_1000HALF 0x100 +#endif + +#ifndef ADVERTISED_2500baseX_Full +#define ADVERTISED_2500baseX_Full 0x8000 +#endif +#define RTK_ADVERTISED_5000baseX_Full BIT(48) + +#define RTK_ADVERTISE_2500FULL 0x80 +#define RTK_ADVERTISE_5000FULL 0x100 +#define RTK_ADVERTISE_10000FULL 0x1000 +#define RTK_LPA_ADVERTISE_2500FULL 0x20 +#define RTK_LPA_ADVERTISE_5000FULL 0x40 +#define RTK_LPA_ADVERTISE_10000FULL 0x800 + +#define RTK_EEE_ADVERTISE_2500FULL BIT(0) +#define RTK_EEE_ADVERTISE_5000FULL BIT(1) +#define RTK_LPA_EEE_ADVERTISE_2500FULL BIT(0) +#define RTK_LPA_EEE_ADVERTISE_5000FULL BIT(1) + +/* Tx NO CLOSE */ +#define MAX_TX_NO_CLOSE_DESC_PTR_V2 0x10000 +#define MAX_TX_NO_CLOSE_DESC_PTR_MASK_V2 0xFFFF +#define MAX_TX_NO_CLOSE_DESC_PTR_V3 0x100000000 +#define MAX_TX_NO_CLOSE_DESC_PTR_MASK_V3 0xFFFFFFFF +#define MAX_TX_NO_CLOSE_DESC_PTR_V4 0x80000000 +#define MAX_TX_NO_CLOSE_DESC_PTR_MASK_V4 0x7FFFFFFF +#define TX_NO_CLOSE_SW_PTR_MASK_V2 0x1FFFF + +#ifndef ETH_MIN_MTU +#define ETH_MIN_MTU 68 +#endif + +#define D0_SPEED_UP_SPEED_DISABLE 0 +#define D0_SPEED_UP_SPEED_1000 1 +#define D0_SPEED_UP_SPEED_2500 2 +#define D0_SPEED_UP_SPEED_5000 3 + +#define RTL8126_MAC_MCU_PAGE_SIZE 256 //256 words + +#ifndef WRITE_ONCE +#define WRITE_ONCE(var, val) (*((volatile typeof(val) *)(&(var))) = (val)) +#endif +#ifndef READ_ONCE +#define READ_ONCE(var) (*((volatile typeof(var) *)(&(var)))) +#endif + +#ifndef SPEED_5000 +#define SPEED_5000 5000 +#endif + +/*****************************************************************************/ + +//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3) +#if (( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,27) ) || \ + (( LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) ) && \ + ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3) ))) +/* copied from linux kernel 2.6.20 include/linux/netdev.h */ +#define NETDEV_ALIGN 32 +#define NETDEV_ALIGN_CONST (NETDEV_ALIGN - 1) + +static inline void *netdev_priv(struct net_device *dev) +{ + return (char *)dev + ((sizeof(struct net_device) + + NETDEV_ALIGN_CONST) + & ~NETDEV_ALIGN_CONST); +} +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,3) + +/*****************************************************************************/ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) +#define RTLDEV tp +#else +#define RTLDEV dev +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) +/*****************************************************************************/ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) +typedef struct net_device *napi_ptr; +typedef int *napi_budget; + +#define napi dev +#define RTL_NAPI_CONFIG(ndev, priv, function, weig) ndev->poll=function; \ + ndev->weight=weig; +#define RTL_NAPI_QUOTA(budget, ndev) min(*budget, ndev->quota) +#define RTL_GET_PRIV(stuct_ptr, priv_struct) netdev_priv(stuct_ptr) +#define RTL_GET_NETDEV(priv_ptr) +#define RTL_RX_QUOTA(budget) *budget +#define RTL_NAPI_QUOTA_UPDATE(ndev, work_done, budget) *budget -= work_done; \ + ndev->quota -= work_done; +#define RTL_NETIF_RX_COMPLETE(dev, napi, work_done) netif_rx_complete(dev) +#define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi) netif_rx_schedule_prep(dev) +#define __RTL_NETIF_RX_SCHEDULE(dev, napi) __netif_rx_schedule(dev) +#define RTL_NAPI_RETURN_VALUE work_done >= work_to_do +#define RTL_NAPI_ENABLE(dev, napi) netif_poll_enable(dev) +#define RTL_NAPI_DISABLE(dev, napi) netif_poll_disable(dev) +#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) +#else +typedef struct napi_struct *napi_ptr; +typedef int napi_budget; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,1,0) +#define RTL_NAPI_CONFIG(ndev, priv, function, weight) netif_napi_add_weight(ndev, &priv->napi, function, weight) +#else +#define RTL_NAPI_CONFIG(ndev, priv, function, weight) netif_napi_add(ndev, &priv->napi, function, weight) +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(6,1,0) +#define RTL_NAPI_QUOTA(budget, ndev) min(budget, budget) +#define RTL_GET_PRIV(stuct_ptr, priv_struct) container_of(stuct_ptr, priv_struct, stuct_ptr) +#define RTL_GET_NETDEV(priv_ptr) struct net_device *dev = priv_ptr->dev; +#define RTL_RX_QUOTA(budget) budget +#define RTL_NAPI_QUOTA_UPDATE(ndev, work_done, budget) +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29) +#define RTL_NETIF_RX_COMPLETE(dev, napi, work_done) netif_rx_complete(dev, napi) +#define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi) netif_rx_schedule_prep(dev, napi) +#define __RTL_NETIF_RX_SCHEDULE(dev, napi) __netif_rx_schedule(dev, napi) +#endif +#if LINUX_VERSION_CODE == KERNEL_VERSION(2,6,29) +#define RTL_NETIF_RX_COMPLETE(dev, napi, work_done) netif_rx_complete(napi) +#define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi) netif_rx_schedule_prep(napi) +#define __RTL_NETIF_RX_SCHEDULE(dev, napi) __netif_rx_schedule(napi) +#endif +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,29) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,19,0) +#define RTL_NETIF_RX_COMPLETE(dev, napi, work_done) napi_complete_done(napi, work_done) +#else +#define RTL_NETIF_RX_COMPLETE(dev, napi, work_done) napi_complete(napi) +#endif +#define RTL_NETIF_RX_SCHEDULE_PREP(dev, napi) napi_schedule_prep(napi) +#define __RTL_NETIF_RX_SCHEDULE(dev, napi) __napi_schedule(napi) +#endif +#define RTL_NAPI_RETURN_VALUE work_done +#define RTL_NAPI_ENABLE(dev, napi) napi_enable(napi) +#define RTL_NAPI_DISABLE(dev, napi) napi_disable(napi) +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27) +#define RTL_NAPI_DEL(priv) +#else +#define RTL_NAPI_DEL(priv) netif_napi_del(&priv->napi) +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,27) + +/*****************************************************************************/ +#ifdef CONFIG_R8126_NAPI +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0) +#define RTL_NAPI_CONSUME_SKB_ANY(skb, budget) napi_consume_skb(skb, budget) +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0) +#define RTL_NAPI_CONSUME_SKB_ANY(skb, budget) dev_consume_skb_any(skb); +#else +#define RTL_NAPI_CONSUME_SKB_ANY(skb, budget) dev_kfree_skb_any(skb); +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,0) +#else //CONFIG_R8126_NAPI +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0) +#define RTL_NAPI_CONSUME_SKB_ANY(skb, budget) dev_consume_skb_any(skb); +#else +#define RTL_NAPI_CONSUME_SKB_ANY(skb, budget) dev_kfree_skb_any(skb); +#endif +#endif //CONFIG_R8126_NAPI + +/*****************************************************************************/ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9) +#ifdef __CHECKER__ +#define __iomem __attribute__((noderef, address_space(2))) +extern void __chk_io_ptr(void __iomem *); +#define __bitwise __attribute__((bitwise)) +#else +#define __iomem +#define __chk_io_ptr(x) (void)0 +#define __bitwise +#endif +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9) + +/*****************************************************************************/ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8) +#ifdef __CHECKER__ +#define __force __attribute__((force)) +#else +#define __force +#endif +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,8) + +#ifndef module_param +#define module_param(v,t,p) MODULE_PARM(v, "i"); +#endif + +#ifndef PCI_DEVICE +#define PCI_DEVICE(vend,dev) \ + .vendor = (vend), .device = (dev), \ + .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID +#endif + +/*****************************************************************************/ +/* 2.5.28 => 2.4.23 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,5,28) ) + +static inline void _kc_synchronize_irq(void) +{ + synchronize_irq(); +} +#undef synchronize_irq +#define synchronize_irq(X) _kc_synchronize_irq() + +#include +#define work_struct tq_struct +#undef INIT_WORK +#define INIT_WORK(a,b,c) INIT_TQUEUE(a,(void (*)(void *))b,c) +#undef container_of +#define container_of list_entry +#define schedule_work schedule_task +#define flush_scheduled_work flush_scheduled_tasks +#endif /* 2.5.28 => 2.4.17 */ + +/*****************************************************************************/ +/* 2.6.4 => 2.6.0 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4) ) +#define MODULE_VERSION(_version) MODULE_INFO(version, _version) +#endif /* 2.6.4 => 2.6.0 */ +/*****************************************************************************/ +/* 2.6.0 => 2.5.28 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) ) +#define MODULE_INFO(version, _version) +#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT +#define CONFIG_E1000_DISABLE_PACKET_SPLIT 1 +#endif + +#define pci_set_consistent_dma_mask(dev,mask) 1 + +#undef dev_put +#define dev_put(dev) __dev_put(dev) + +#ifndef skb_fill_page_desc +#define skb_fill_page_desc _kc_skb_fill_page_desc +extern void _kc_skb_fill_page_desc(struct sk_buff *skb, int i, struct page *page, int off, int size); +#endif + +#ifndef pci_dma_mapping_error +#define pci_dma_mapping_error _kc_pci_dma_mapping_error +static inline int _kc_pci_dma_mapping_error(dma_addr_t dma_addr) +{ + return dma_addr == 0; +} +#endif + +#undef ALIGN +#define ALIGN(x,a) (((x)+(a)-1)&~((a)-1)) + +#endif /* 2.6.0 => 2.5.28 */ + +/*****************************************************************************/ +/* 2.4.22 => 2.4.17 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,4,22) ) +#define pci_name(x) ((x)->slot_name) +#endif /* 2.4.22 => 2.4.17 */ + +/*****************************************************************************/ +/* 2.6.5 => 2.6.0 */ +#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) ) +#define pci_dma_sync_single_for_cpu pci_dma_sync_single +#define pci_dma_sync_single_for_device pci_dma_sync_single_for_cpu +#endif /* 2.6.5 => 2.6.0 */ + +/*****************************************************************************/ + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) +/* + * initialize a work-struct's func and data pointers: + */ +#define PREPARE_WORK(_work, _func, _data) \ + do { \ + (_work)->func = _func; \ + (_work)->data = _data; \ + } while (0) + +#endif +/*****************************************************************************/ +/* 2.6.4 => 2.6.0 */ +#if ((LINUX_VERSION_CODE < KERNEL_VERSION(2,4,25) && \ + LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22)) || \ + (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) && \ + LINUX_VERSION_CODE < KERNEL_VERSION(2,6,4))) +#define ETHTOOL_OPS_COMPAT +#endif /* 2.6.4 => 2.6.0 */ + +/*****************************************************************************/ +/* Installations with ethtool version without eeprom, adapter id, or statistics + * support */ + +#ifndef ETH_GSTRING_LEN +#define ETH_GSTRING_LEN 32 +#endif + +#ifndef ETHTOOL_GSTATS +#define ETHTOOL_GSTATS 0x1d +#undef ethtool_drvinfo +#define ethtool_drvinfo k_ethtool_drvinfo +struct k_ethtool_drvinfo { + u32 cmd; + char driver[32]; + char version[32]; + char fw_version[32]; + char bus_info[32]; + char reserved1[32]; + char reserved2[16]; + u32 n_stats; + u32 testinfo_len; + u32 eedump_len; + u32 regdump_len; +}; + +struct ethtool_stats { + u32 cmd; + u32 n_stats; + u64 data[0]; +}; +#endif /* ETHTOOL_GSTATS */ + +#ifndef ETHTOOL_PHYS_ID +#define ETHTOOL_PHYS_ID 0x1c +#endif /* ETHTOOL_PHYS_ID */ + +#ifndef ETHTOOL_GSTRINGS +#define ETHTOOL_GSTRINGS 0x1b +enum ethtool_stringset { + ETH_SS_TEST = 0, + ETH_SS_STATS, +}; +struct ethtool_gstrings { + u32 cmd; /* ETHTOOL_GSTRINGS */ + u32 string_set; /* string set id e.c. ETH_SS_TEST, etc*/ + u32 len; /* number of strings in the string set */ + u8 data[0]; +}; +#endif /* ETHTOOL_GSTRINGS */ + +#ifndef ETHTOOL_TEST +#define ETHTOOL_TEST 0x1a +enum ethtool_test_flags { + ETH_TEST_FL_OFFLINE = (1 << 0), + ETH_TEST_FL_FAILED = (1 << 1), +}; +struct ethtool_test { + u32 cmd; + u32 flags; + u32 reserved; + u32 len; + u64 data[0]; +}; +#endif /* ETHTOOL_TEST */ + +#ifndef ETHTOOL_GEEPROM +#define ETHTOOL_GEEPROM 0xb +#undef ETHTOOL_GREGS +struct ethtool_eeprom { + u32 cmd; + u32 magic; + u32 offset; + u32 len; + u8 data[0]; +}; + +struct ethtool_value { + u32 cmd; + u32 data; +}; +#endif /* ETHTOOL_GEEPROM */ + +#ifndef ETHTOOL_GLINK +#define ETHTOOL_GLINK 0xa +#endif /* ETHTOOL_GLINK */ + +#ifndef ETHTOOL_GREGS +#define ETHTOOL_GREGS 0x00000004 /* Get NIC registers */ +#define ethtool_regs _kc_ethtool_regs +/* for passing big chunks of data */ +struct _kc_ethtool_regs { + u32 cmd; + u32 version; /* driver-specific, indicates different chips/revs */ + u32 len; /* bytes */ + u8 data[0]; +}; +#endif /* ETHTOOL_GREGS */ + +#ifndef ETHTOOL_GMSGLVL +#define ETHTOOL_GMSGLVL 0x00000007 /* Get driver message level */ +#endif +#ifndef ETHTOOL_SMSGLVL +#define ETHTOOL_SMSGLVL 0x00000008 /* Set driver msg level, priv. */ +#endif +#ifndef ETHTOOL_NWAY_RST +#define ETHTOOL_NWAY_RST 0x00000009 /* Restart autonegotiation, priv */ +#endif +#ifndef ETHTOOL_GLINK +#define ETHTOOL_GLINK 0x0000000a /* Get link status */ +#endif +#ifndef ETHTOOL_GEEPROM +#define ETHTOOL_GEEPROM 0x0000000b /* Get EEPROM data */ +#endif +#ifndef ETHTOOL_SEEPROM +#define ETHTOOL_SEEPROM 0x0000000c /* Set EEPROM data */ +#endif +#ifndef ETHTOOL_GCOALESCE +#define ETHTOOL_GCOALESCE 0x0000000e /* Get coalesce config */ +/* for configuring coalescing parameters of chip */ +#define ethtool_coalesce _kc_ethtool_coalesce +struct _kc_ethtool_coalesce { + u32 cmd; /* ETHTOOL_{G,S}COALESCE */ + + /* How many usecs to delay an RX interrupt after + * a packet arrives. If 0, only rx_max_coalesced_frames + * is used. + */ + u32 rx_coalesce_usecs; + + /* How many packets to delay an RX interrupt after + * a packet arrives. If 0, only rx_coalesce_usecs is + * used. It is illegal to set both usecs and max frames + * to zero as this would cause RX interrupts to never be + * generated. + */ + u32 rx_max_coalesced_frames; + + /* Same as above two parameters, except that these values + * apply while an IRQ is being serviced by the host. Not + * all cards support this feature and the values are ignored + * in that case. + */ + u32 rx_coalesce_usecs_irq; + u32 rx_max_coalesced_frames_irq; + + /* How many usecs to delay a TX interrupt after + * a packet is sent. If 0, only tx_max_coalesced_frames + * is used. + */ + u32 tx_coalesce_usecs; + + /* How many packets to delay a TX interrupt after + * a packet is sent. If 0, only tx_coalesce_usecs is + * used. It is illegal to set both usecs and max frames + * to zero as this would cause TX interrupts to never be + * generated. + */ + u32 tx_max_coalesced_frames; + + /* Same as above two parameters, except that these values + * apply while an IRQ is being serviced by the host. Not + * all cards support this feature and the values are ignored + * in that case. + */ + u32 tx_coalesce_usecs_irq; + u32 tx_max_coalesced_frames_irq; + + /* How many usecs to delay in-memory statistics + * block updates. Some drivers do not have an in-memory + * statistic block, and in such cases this value is ignored. + * This value must not be zero. + */ + u32 stats_block_coalesce_usecs; + + /* Adaptive RX/TX coalescing is an algorithm implemented by + * some drivers to improve latency under low packet rates and + * improve throughput under high packet rates. Some drivers + * only implement one of RX or TX adaptive coalescing. Anything + * not implemented by the driver causes these values to be + * silently ignored. + */ + u32 use_adaptive_rx_coalesce; + u32 use_adaptive_tx_coalesce; + + /* When the packet rate (measured in packets per second) + * is below pkt_rate_low, the {rx,tx}_*_low parameters are + * used. + */ + u32 pkt_rate_low; + u32 rx_coalesce_usecs_low; + u32 rx_max_coalesced_frames_low; + u32 tx_coalesce_usecs_low; + u32 tx_max_coalesced_frames_low; + + /* When the packet rate is below pkt_rate_high but above + * pkt_rate_low (both measured in packets per second) the + * normal {rx,tx}_* coalescing parameters are used. + */ + + /* When the packet rate is (measured in packets per second) + * is above pkt_rate_high, the {rx,tx}_*_high parameters are + * used. + */ + u32 pkt_rate_high; + u32 rx_coalesce_usecs_high; + u32 rx_max_coalesced_frames_high; + u32 tx_coalesce_usecs_high; + u32 tx_max_coalesced_frames_high; + + /* How often to do adaptive coalescing packet rate sampling, + * measured in seconds. Must not be zero. + */ + u32 rate_sample_interval; +}; +#endif /* ETHTOOL_GCOALESCE */ + +#ifndef ETHTOOL_SCOALESCE +#define ETHTOOL_SCOALESCE 0x0000000f /* Set coalesce config. */ +#endif +#ifndef ETHTOOL_GRINGPARAM +#define ETHTOOL_GRINGPARAM 0x00000010 /* Get ring parameters */ +/* for configuring RX/TX ring parameters */ +#define ethtool_ringparam _kc_ethtool_ringparam +struct _kc_ethtool_ringparam { + u32 cmd; /* ETHTOOL_{G,S}RINGPARAM */ + + /* Read only attributes. These indicate the maximum number + * of pending RX/TX ring entries the driver will allow the + * user to set. + */ + u32 rx_max_pending; + u32 rx_mini_max_pending; + u32 rx_jumbo_max_pending; + u32 tx_max_pending; + + /* Values changeable by the user. The valid values are + * in the range 1 to the "*_max_pending" counterpart above. + */ + u32 rx_pending; + u32 rx_mini_pending; + u32 rx_jumbo_pending; + u32 tx_pending; +}; +#endif /* ETHTOOL_GRINGPARAM */ + +#ifndef ETHTOOL_SRINGPARAM +#define ETHTOOL_SRINGPARAM 0x00000011 /* Set ring parameters, priv. */ +#endif +#ifndef ETHTOOL_GPAUSEPARAM +#define ETHTOOL_GPAUSEPARAM 0x00000012 /* Get pause parameters */ +/* for configuring link flow control parameters */ +#define ethtool_pauseparam _kc_ethtool_pauseparam +struct _kc_ethtool_pauseparam { + u32 cmd; /* ETHTOOL_{G,S}PAUSEPARAM */ + + /* If the link is being auto-negotiated (via ethtool_cmd.autoneg + * being true) the user may set 'autonet' here non-zero to have the + * pause parameters be auto-negotiated too. In such a case, the + * {rx,tx}_pause values below determine what capabilities are + * advertised. + * + * If 'autoneg' is zero or the link is not being auto-negotiated, + * then {rx,tx}_pause force the driver to use/not-use pause + * flow control. + */ + u32 autoneg; + u32 rx_pause; + u32 tx_pause; +}; +#endif /* ETHTOOL_GPAUSEPARAM */ + +#ifndef ETHTOOL_SPAUSEPARAM +#define ETHTOOL_SPAUSEPARAM 0x00000013 /* Set pause parameters. */ +#endif +#ifndef ETHTOOL_GRXCSUM +#define ETHTOOL_GRXCSUM 0x00000014 /* Get RX hw csum enable (ethtool_value) */ +#endif +#ifndef ETHTOOL_SRXCSUM +#define ETHTOOL_SRXCSUM 0x00000015 /* Set RX hw csum enable (ethtool_value) */ +#endif +#ifndef ETHTOOL_GTXCSUM +#define ETHTOOL_GTXCSUM 0x00000016 /* Get TX hw csum enable (ethtool_value) */ +#endif +#ifndef ETHTOOL_STXCSUM +#define ETHTOOL_STXCSUM 0x00000017 /* Set TX hw csum enable (ethtool_value) */ +#endif +#ifndef ETHTOOL_GSG +#define ETHTOOL_GSG 0x00000018 /* Get scatter-gather enable +* (ethtool_value) */ +#endif +#ifndef ETHTOOL_SSG +#define ETHTOOL_SSG 0x00000019 /* Set scatter-gather enable +* (ethtool_value). */ +#endif +#ifndef ETHTOOL_TEST +#define ETHTOOL_TEST 0x0000001a /* execute NIC self-test, priv. */ +#endif +#ifndef ETHTOOL_GSTRINGS +#define ETHTOOL_GSTRINGS 0x0000001b /* get specified string set */ +#endif +#ifndef ETHTOOL_PHYS_ID +#define ETHTOOL_PHYS_ID 0x0000001c /* identify the NIC */ +#endif +#ifndef ETHTOOL_GSTATS +#define ETHTOOL_GSTATS 0x0000001d /* get NIC-specific statistics */ +#endif +#ifndef ETHTOOL_GTSO +#define ETHTOOL_GTSO 0x0000001e /* Get TSO enable (ethtool_value) */ +#endif +#ifndef ETHTOOL_STSO +#define ETHTOOL_STSO 0x0000001f /* Set TSO enable (ethtool_value) */ +#endif + +#ifndef ETHTOOL_BUSINFO_LEN +#define ETHTOOL_BUSINFO_LEN 32 +#endif + +/*****************************************************************************/ + +enum RTL8126_registers { + MAC0 = 0x00, /* Ethernet hardware address. */ + MAC4 = 0x04, + MAR0 = 0x08, /* Multicast filter. */ + CounterAddrLow = 0x10, + CounterAddrHigh = 0x14, + CustomLED = 0x18, + TxDescStartAddrLow = 0x20, + TxDescStartAddrHigh = 0x24, + TxHDescStartAddrLow = 0x28, + TxHDescStartAddrHigh = 0x2c, + FLASH = 0x30, + INT_CFG0_8125 = 0x34, + ERSR = 0x36, + ChipCmd = 0x37, + TxPoll = 0x38, + IntrMask = 0x3C, + IntrStatus = 0x3E, + TxConfig = 0x40, + RxConfig = 0x44, + TCTR = 0x48, + Cfg9346 = 0x50, + Config0 = 0x51, + Config1 = 0x52, + Config2 = 0x53, + Config3 = 0x54, + Config4 = 0x55, + Config5 = 0x56, + TDFNR = 0x57, + TimeInt0 = 0x58, + TimeInt1 = 0x5C, + PHYAR = 0x60, + CSIDR = 0x64, + CSIAR = 0x68, + PHYstatus = 0x6C, + MACDBG = 0x6D, + GPIO = 0x6E, + PMCH = 0x6F, + ERIDR = 0x70, + ERIAR = 0x74, + INT_CFG1_8125 = 0x7A, + EPHY_RXER_NUM = 0x7C, + EPHYAR = 0x80, + TimeInt2 = 0x8C, + OCPDR = 0xB0, + MACOCP = 0xB0, + OCPAR = 0xB4, + SecMAC0 = 0xB4, + SecMAC4 = 0xB8, + PHYOCP = 0xB8, + DBG_reg = 0xD1, + TwiCmdReg = 0xD2, + MCUCmd_reg = 0xD3, + RxMaxSize = 0xDA, + EFUSEAR = 0xDC, + CPlusCmd = 0xE0, + IntrMitigate = 0xE2, + RxDescAddrLow = 0xE4, + RxDescAddrHigh = 0xE8, + MTPS = 0xEC, + FuncEvent = 0xF0, + PPSW = 0xF2, + FuncEventMask = 0xF4, + TimeInt3 = 0xF4, + FuncPresetState = 0xF8, + CMAC_IBCR0 = 0xF8, + CMAC_IBCR2 = 0xF9, + CMAC_IBIMR0 = 0xFA, + CMAC_IBISR0 = 0xFB, + FuncForceEvent = 0xFC, + //8125 + IMR0_8125 = 0x38, + ISR0_8125 = 0x3C, + TPPOLL_8125 = 0x90, + IMR1_8125 = 0x800, + ISR1_8125 = 0x802, + IMR2_8125 = 0x804, + ISR2_8125 = 0x806, + IMR3_8125 = 0x808, + ISR3_8125 = 0x80A, + BACKUP_ADDR0_8125 = 0x19E0, + BACKUP_ADDR1_8125 = 0X19E4, + TCTR0_8125 = 0x0048, + TCTR1_8125 = 0x004C, + TCTR2_8125 = 0x0088, + TCTR3_8125 = 0x001C, + TIMER_INT0_8125 = 0x0058, + TIMER_INT1_8125 = 0x005C, + TIMER_INT2_8125 = 0x008C, + TIMER_INT3_8125 = 0x00F4, + INT_MITI_V2_0_RX = 0x0A00, + INT_MITI_V2_0_TX = 0x0A02, + INT_MITI_V2_1_RX = 0x0A08, + INT_MITI_V2_1_TX = 0x0A0A, + IMR_V2_CLEAR_REG_8125 = 0x0D00, + ISR_V2_8125 = 0x0D04, + IMR_V2_SET_REG_8125 = 0x0D0C, + TDU_STA_8125 = 0x0D08, + RDU_STA_8125 = 0x0D0A, + IMR_V4_L2_CLEAR_REG_8125 = 0x0D10, + IMR_V4_L2_SET_REG_8125 = 0x0D18, + ISR_V4_L2_8125 = 0x0D14, + SW_TAIL_PTR0_8125BP = 0x0D30, + SW_TAIL_PTR1_8125BP = 0x0D38, + HW_CLO_PTR0_8125BP = 0x0D34, + HW_CLO_PTR1_8125BP = 0x0D3C, + DOUBLE_VLAN_CONFIG = 0x1000, + TX_NEW_CTRL = 0x203E, + TNPDS_Q1_LOW_8125 = 0x2100, + PLA_TXQ0_IDLE_CREDIT = 0x2500, + PLA_TXQ1_IDLE_CREDIT = 0x2504, + SW_TAIL_PTR0_8125 = 0x2800, + HW_CLO_PTR0_8125 = 0x2802, + SW_TAIL_PTR0_8126 = 0x2800, + HW_CLO_PTR0_8126 = 0x2800, + RDSAR_Q1_LOW_8125 = 0x4000, + RSS_CTRL_8125 = 0x4500, + Q_NUM_CTRL_8125 = 0x4800, + RSS_KEY_8125 = 0x4600, + RSS_INDIRECTION_TBL_8125_V2 = 0x4700, + EEE_TXIDLE_TIMER_8125 = 0x6048, + PTP_CTRL_8125 = 0x6800, + PTP_STATUS_8125 = 0x6802, + PTP_ISR_8125 = 0x6804, + PTP_IMR_8125 = 0x6805, + PTP_TIME_CORRECT_CMD_8125 = 0x6806, + PTP_SOFT_CONFIG_Time_NS_8125 = 0x6808, + PTP_SOFT_CONFIG_Time_S_8125 = 0x680C, + PTP_SOFT_CONFIG_Time_Sign = 0x6812, + PTP_LOCAL_Time_SUB_NS_8125 = 0x6814, + PTP_LOCAL_Time_NS_8125 = 0x6818, + PTP_LOCAL_Time_S_8125 = 0x681C, + PTP_Time_SHIFTER_S_8125 = 0x6856, + PPS_RISE_TIME_NS_8125 = 0x68A0, + PPS_RISE_TIME_S_8125 = 0x68A4, + PTP_EGRESS_TIME_BASE_NS_8125 = 0XCF20, + PTP_EGRESS_TIME_BASE_S_8125 = 0XCF24, + + //TCAM + TCAM_NOTVALID_ADDR = 0xA000, + TCAM_VALID_ADDR = 0xA800, + TCAM_MAC_ADDR = 448, + TCAM_VLAN_TAG = 496, + //TCAM V2 + TCAM_NOTVALID_ADDR_V2 = 0xA000, + TCAM_VALID_ADDR_V2 = 0xB000, + TCAM_MAC_ADDR_V2 = 0x00, + TCAM_VLAN_TAG_V2 = 0x03, +}; + +enum RTL8126_register_content { + /* InterruptStatusBits */ + SYSErr = 0x8000, + PCSTimeout = 0x4000, + SWInt = 0x0100, + TxDescUnavail = 0x0080, + RxFIFOOver = 0x0040, + LinkChg = 0x0020, + RxDescUnavail = 0x0010, + TxErr = 0x0008, + TxOK = 0x0004, + RxErr = 0x0002, + RxOK = 0x0001, + RxDU1 = 0x0002, + RxOK1 = 0x0001, + + /* RxStatusDesc */ + RxRWT = (1 << 22), + RxRES = (1 << 21), + RxRUNT = (1 << 20), + RxCRC = (1 << 19), + + RxRWT_V3 = (1 << 18), + RxRES_V3 = (1 << 20), + RxRUNT_V3 = (1 << 19), + RxCRC_V3 = (1 << 17), + + /* ChipCmdBits */ + StopReq = 0x80, + CmdReset = 0x10, + CmdRxEnb = 0x08, + CmdTxEnb = 0x04, + RxBufEmpty = 0x01, + + /* Cfg9346Bits */ + Cfg9346_Lock = 0x00, + Cfg9346_Unlock = 0xC0, + Cfg9346_EEDO = (1 << 0), + Cfg9346_EEDI = (1 << 1), + Cfg9346_EESK = (1 << 2), + Cfg9346_EECS = (1 << 3), + Cfg9346_EEM0 = (1 << 6), + Cfg9346_EEM1 = (1 << 7), + + /* rx_mode_bits */ + AcceptErr = 0x20, + AcceptRunt = 0x10, + AcceptBroadcast = 0x08, + AcceptMulticast = 0x04, + AcceptMyPhys = 0x02, + AcceptAllPhys = 0x01, + + /* Transmit Priority Polling*/ + HPQ = 0x80, + NPQ = 0x40, + FSWInt = 0x01, + + /* RxConfigBits */ + Reserved2_shift = 13, + RxCfgDMAShift = 8, + EnableRxDescV3 = (1 << 24), + EnableOuterVlan = (1 << 23), + EnableInnerVlan = (1 << 22), + RxCfg_128_int_en = (1 << 15), + RxCfg_fet_multi_en = (1 << 14), + RxCfg_half_refetch = (1 << 13), + RxCfg_pause_slot_en = (1 << 11), + RxCfg_9356SEL = (1 << 6), + EnableRxDescV4_0 = (1 << 1), //not in rcr + + /* TxConfigBits */ + TxInterFrameGapShift = 24, + TxDMAShift = 8, /* DMA burst value (0-7) is shift this many bits */ + TxMACLoopBack = (1 << 17), /* MAC loopback */ + + /* Config1 register */ + LEDS1 = (1 << 7), + LEDS0 = (1 << 6), + Speed_down = (1 << 4), + MEMMAP = (1 << 3), + IOMAP = (1 << 2), + VPD = (1 << 1), + PMEnable = (1 << 0), /* Power Management Enable */ + + /* Config2 register */ + PMSTS_En = (1 << 5), + + /* Config3 register */ + Isolate_en = (1 << 12), /* Isolate enable */ + MagicPacket = (1 << 5), /* Wake up when receives a Magic Packet */ + LinkUp = (1 << 4), /* This bit is reserved in RTL8125B.*/ + /* Wake up when the cable connection is re-established */ + ECRCEN = (1 << 3), /* This bit is reserved in RTL8125B*/ + Jumbo_En0 = (1 << 2), /* This bit is reserved in RTL8125B*/ + RDY_TO_L23 = (1 << 1), /* This bit is reserved in RTL8125B*/ + Beacon_en = (1 << 0), /* This bit is reserved in RTL8125B*/ + + /* Config4 register */ + Jumbo_En1 = (1 << 1), /* This bit is reserved in RTL8125B*/ + + /* Config5 register */ + BWF = (1 << 6), /* Accept Broadcast wakeup frame */ + MWF = (1 << 5), /* Accept Multicast wakeup frame */ + UWF = (1 << 4), /* Accept Unicast wakeup frame */ + LanWake = (1 << 1), /* LanWake enable/disable */ + PMEStatus = (1 << 0), /* PME status can be reset by PCI RST# */ + + /* CPlusCmd */ + EnableBist = (1 << 15), + Macdbgo_oe = (1 << 14), + Normal_mode = (1 << 13), + Force_halfdup = (1 << 12), + Force_rxflow_en = (1 << 11), + Force_txflow_en = (1 << 10), + Cxpl_dbg_sel = (1 << 9),//This bit is reserved in RTL8125B + ASF = (1 << 8),//This bit is reserved in RTL8125C + PktCntrDisable = (1 << 7), + RxVlan = (1 << 6), + RxChkSum = (1 << 5), + Macdbgo_sel = 0x001C, + INTT_0 = 0x0000, + INTT_1 = 0x0001, + INTT_2 = 0x0002, + INTT_3 = 0x0003, + + /* rtl8126_PHYstatus */ + PowerSaveStatus = 0x80, + _5000bpsF = 0x1000, + _2500bpsF = 0x400, + TxFlowCtrl = 0x40, + RxFlowCtrl = 0x20, + _1000bpsF = 0x10, + _100bps = 0x08, + _10bps = 0x04, + LinkStatus = 0x02, + FullDup = 0x01, + + /* DBG_reg */ + Fix_Nak_1 = (1 << 4), + Fix_Nak_2 = (1 << 3), + DBGPIN_E2 = (1 << 0), + + /* ResetCounterCommand */ + CounterReset = 0x1, + /* DumpCounterCommand */ + CounterDump = 0x8, + + /* PHY access */ + PHYAR_Flag = 0x80000000, + PHYAR_Write = 0x80000000, + PHYAR_Read = 0x00000000, + PHYAR_Reg_Mask = 0x1f, + PHYAR_Reg_shift = 16, + PHYAR_Data_Mask = 0xffff, + + /* EPHY access */ + EPHYAR_Flag = 0x80000000, + EPHYAR_Write = 0x80000000, + EPHYAR_Read = 0x00000000, + EPHYAR_Reg_Mask = 0x3f, + EPHYAR_Reg_Mask_v2 = 0x7f, + EPHYAR_Reg_shift = 16, + EPHYAR_Data_Mask = 0xffff, + + /* CSI access */ + CSIAR_Flag = 0x80000000, + CSIAR_Write = 0x80000000, + CSIAR_Read = 0x00000000, + CSIAR_ByteEn = 0x0f, + CSIAR_ByteEn_shift = 12, + CSIAR_Addr_Mask = 0x0fff, + + /* ERI access */ + ERIAR_Flag = 0x80000000, + ERIAR_Write = 0x80000000, + ERIAR_Read = 0x00000000, + ERIAR_Addr_Align = 4, /* ERI access register address must be 4 byte alignment */ + ERIAR_ExGMAC = 0, + ERIAR_MSIX = 1, + ERIAR_ASF = 2, + ERIAR_OOB = 2, + ERIAR_Type_shift = 16, + ERIAR_ByteEn = 0x0f, + ERIAR_ByteEn_shift = 12, + + /* OCP GPHY access */ + OCPDR_Write = 0x80000000, + OCPDR_Read = 0x00000000, + OCPDR_Reg_Mask = 0xFF, + OCPDR_Data_Mask = 0xFFFF, + OCPDR_GPHY_Reg_shift = 16, + OCPAR_Flag = 0x80000000, + OCPAR_GPHY_Write = 0x8000F060, + OCPAR_GPHY_Read = 0x0000F060, + OCPR_Write = 0x80000000, + OCPR_Read = 0x00000000, + OCPR_Addr_Reg_shift = 16, + OCPR_Flag = 0x80000000, + OCP_STD_PHY_BASE_PAGE = 0x0A40, + + /* MCU Command */ + Now_is_oob = (1 << 7), + Txfifo_empty = (1 << 5), + Rxfifo_empty = (1 << 4), + + /* E-FUSE access */ + EFUSE_WRITE = 0x80000000, + EFUSE_WRITE_OK = 0x00000000, + EFUSE_READ = 0x00000000, + EFUSE_READ_OK = 0x80000000, + EFUSE_WRITE_V3 = 0x40000000, + EFUSE_WRITE_OK_V3 = 0x00000000, + EFUSE_READ_V3 = 0x80000000, + EFUSE_READ_OK_V3 = 0x00000000, + EFUSE_Reg_Mask = 0x03FF, + EFUSE_Reg_Shift = 8, + EFUSE_Check_Cnt = 300, + EFUSE_READ_FAIL = 0xFF, + EFUSE_Data_Mask = 0x000000FF, + + /* GPIO */ + GPIO_en = (1 << 0), + + /* PTP */ + PTP_ISR_TOK = (1 << 1), + PTP_ISR_TER = (1 << 2), + PTP_EXEC_CMD = (1 << 7), + PTP_ADJUST_TIME_NS_NEGATIVE = (1 << 30), + PTP_ADJUST_TIME_S_NEGATIVE = (1ULL << 48), + PTP_SOFT_CONFIG_TIME_NS_NEGATIVE = (1 << 30), + PTP_SOFT_CONFIG_TIME_S_NEGATIVE = (1ULL << 48), + + /* New Interrupt Bits */ + INT_CFG0_ENABLE_8125 = (1 << 0), + INT_CFG0_TIMEOUT0_BYPASS_8125 = (1 << 1), + INT_CFG0_MITIGATION_BYPASS_8125 = (1 << 2), + INT_CFG0_RDU_BYPASS_8126 = (1 << 4), + INT_CFG0_MSIX_ENTRY_NUM_MODE = (1 << 5), + ISRIMR_V2_ROK_Q0 = (1 << 0), + ISRIMR_TOK_Q0 = (1 << 16), + ISRIMR_TOK_Q1 = (1 << 18), + ISRIMR_V2_LINKCHG = (1 << 21), + + ISRIMR_V4_ROK_Q0 = (1 << 0), + ISRIMR_V4_LINKCHG = (1 << 29), + + ISRIMR_V5_ROK_Q0 = (1 << 0), + ISRIMR_V5_TOK_Q0 = (1 << 16), + ISRIMR_V5_TOK_Q1 = (1 << 17), + ISRIMR_V5_LINKCHG = (1 << 18), + + /* Magic Number */ + RTL8126_MAGIC_NUMBER = 0x0badbadbadbadbadull, +}; + +enum _DescStatusBit { + DescOwn = (1 << 31), /* Descriptor is owned by NIC */ + RingEnd = (1 << 30), /* End of descriptor ring */ + FirstFrag = (1 << 29), /* First segment of a packet */ + LastFrag = (1 << 28), /* Final segment of a packet */ + + DescOwn_V3 = (DescOwn), /* Descriptor is owned by NIC */ + RingEnd_V3 = (RingEnd), /* End of descriptor ring */ + FirstFrag_V3 = (1 << 25), /* First segment of a packet */ + LastFrag_V3 = (1 << 24), /* Final segment of a packet */ + + /* Tx private */ + /*------ offset 0 of tx descriptor ------*/ + LargeSend = (1 << 27), /* TCP Large Send Offload (TSO) */ + GiantSendv4 = (1 << 26), /* TCP Giant Send Offload V4 (GSOv4) */ + GiantSendv6 = (1 << 25), /* TCP Giant Send Offload V6 (GSOv6) */ + LargeSend_DP = (1 << 16), /* TCP Large Send Offload (TSO) */ + MSSShift = 16, /* MSS value position */ + MSSMask = 0x7FFU, /* MSS value 11 bits */ + TxIPCS = (1 << 18), /* Calculate IP checksum */ + TxUDPCS = (1 << 17), /* Calculate UDP/IP checksum */ + TxTCPCS = (1 << 16), /* Calculate TCP/IP checksum */ + TxVlanTag = (1 << 17), /* Add VLAN tag */ + + /*@@@@@@ offset 4 of tx descriptor => bits for RTL8125 only begin @@@@@@*/ + TxUDPCS_C = (1 << 31), /* Calculate UDP/IP checksum */ + TxTCPCS_C = (1 << 30), /* Calculate TCP/IP checksum */ + TxIPCS_C = (1 << 29), /* Calculate IP checksum */ + TxIPV6F_C = (1 << 28), /* Indicate it is an IPv6 packet */ + /*@@@@@@ offset 4 of tx descriptor => bits for RTL8125 only end @@@@@@*/ + + + /* Rx private */ + /*------ offset 0 of rx descriptor ------*/ + PID1 = (1 << 18), /* Protocol ID bit 1/2 */ + PID0 = (1 << 17), /* Protocol ID bit 2/2 */ + +#define RxProtoUDP (PID1) +#define RxProtoTCP (PID0) +#define RxProtoIP (PID1 | PID0) +#define RxProtoMask RxProtoIP + + RxIPF = (1 << 16), /* IP checksum failed */ + RxUDPF = (1 << 15), /* UDP/IP checksum failed */ + RxTCPF = (1 << 14), /* TCP/IP checksum failed */ + RxVlanTag = (1 << 16), /* VLAN tag available */ + + /*@@@@@@ offset 0 of rx descriptor => bits for RTL8125 only begin @@@@@@*/ + RxUDPT = (1 << 18), + RxTCPT = (1 << 17), + /*@@@@@@ offset 0 of rx descriptor => bits for RTL8125 only end @@@@@@*/ + + /*@@@@@@ offset 4 of rx descriptor => bits for RTL8125 only begin @@@@@@*/ + RxV6F = (1 << 31), + RxV4F = (1 << 30), + /*@@@@@@ offset 4 of rx descriptor => bits for RTL8125 only end @@@@@@*/ + + + PID1_v3 = (1 << 29), /* Protocol ID bit 1/2 */ + PID0_v3 = (1 << 28), /* Protocol ID bit 2/2 */ + +#define RxProtoUDP_v3 (PID1_v3) +#define RxProtoTCP_v3 (PID0_v3) +#define RxProtoIP_v3 (PID1_v3 | PID0_v3) +#define RxProtoMask_v3 RxProtoIP_v3 + + RxIPF_v3 = (1 << 26), /* IP checksum failed */ + RxUDPF_v3 = (1 << 25), /* UDP/IP checksum failed */ + RxTCPF_v3 = (1 << 24), /* TCP/IP checksum failed */ + RxSCTPF_v3 = (1 << 23), /* TCP/IP checksum failed */ + RxVlanTag_v3 = (RxVlanTag), /* VLAN tag available */ + + /*@@@@@@ offset 0 of rx descriptor => bits for RTL8125 only begin @@@@@@*/ + RxUDPT_v3 = (1 << 29), + RxTCPT_v3 = (1 << 28), + RxSCTP_v3 = (1 << 27), + /*@@@@@@ offset 0 of rx descriptor => bits for RTL8125 only end @@@@@@*/ + + /*@@@@@@ offset 4 of rx descriptor => bits for RTL8125 only begin @@@@@@*/ + RxV6F_v3 = (RxV6F), + RxV4F_v3 = (RxV4F), + /*@@@@@@ offset 4 of rx descriptor => bits for RTL8125 only end @@@@@@*/ +}; + +enum features { +// RTL_FEATURE_WOL = (1 << 0), + RTL_FEATURE_MSI = (1 << 1), + RTL_FEATURE_MSIX = (1 << 2), +}; + +enum wol_capability { + WOL_DISABLED = 0, + WOL_ENABLED = 1 +}; + +enum bits { + BIT_0 = (1 << 0), + BIT_1 = (1 << 1), + BIT_2 = (1 << 2), + BIT_3 = (1 << 3), + BIT_4 = (1 << 4), + BIT_5 = (1 << 5), + BIT_6 = (1 << 6), + BIT_7 = (1 << 7), + BIT_8 = (1 << 8), + BIT_9 = (1 << 9), + BIT_10 = (1 << 10), + BIT_11 = (1 << 11), + BIT_12 = (1 << 12), + BIT_13 = (1 << 13), + BIT_14 = (1 << 14), + BIT_15 = (1 << 15), + BIT_16 = (1 << 16), + BIT_17 = (1 << 17), + BIT_18 = (1 << 18), + BIT_19 = (1 << 19), + BIT_20 = (1 << 20), + BIT_21 = (1 << 21), + BIT_22 = (1 << 22), + BIT_23 = (1 << 23), + BIT_24 = (1 << 24), + BIT_25 = (1 << 25), + BIT_26 = (1 << 26), + BIT_27 = (1 << 27), + BIT_28 = (1 << 28), + BIT_29 = (1 << 29), + BIT_30 = (1 << 30), + BIT_31 = (1 << 31) +}; + +#define RTL8126_CP_NUM 4 +#define RTL8126_MAX_SUPPORT_CP_LEN 110 + +enum rtl8126_cp_status { + rtl8126_cp_normal = 0, + rtl8126_cp_short, + rtl8126_cp_open, + rtl8126_cp_mismatch, + rtl8126_cp_unknown +}; + +enum efuse { + EFUSE_NOT_SUPPORT = 0, + EFUSE_SUPPORT_V1, + EFUSE_SUPPORT_V2, + EFUSE_SUPPORT_V3, + EFUSE_SUPPORT_V4, +}; +#define RsvdMask 0x3fffc000 +#define RsvdMaskV3 0x3fff8000 + +struct TxDesc { + u32 opts1; + u32 opts2; + u64 addr; + u32 reserved0; + u32 reserved1; + u32 reserved2; + u32 reserved3; +}; + +struct RxDesc { + u32 opts1; + u32 opts2; + u64 addr; +}; + +struct RxDescV3 { + union { + struct { + u32 rsv1; + u32 rsv2; + } RxDescDDWord1; + }; + + union { + struct { + u32 RSSResult; + u16 HeaderBufferLen; + u16 HeaderInfo; + } RxDescNormalDDWord2; + + struct { + u32 rsv5; + u32 rsv6; + } RxDescDDWord2; + }; + + union { + u64 addr; + + struct { + u32 TimeStampLow; + u32 TimeStampHigh; + } RxDescTimeStamp; + + struct { + u32 rsv8; + u32 rsv9; + } RxDescDDWord3; + }; + + union { + struct { + u32 opts2; + u32 opts1; + } RxDescNormalDDWord4; + + struct { + u16 TimeStampHHigh; + u16 rsv11; + u32 opts1; + } RxDescPTPDDWord4; + }; +}; + +enum rxdesc_type { + RXDESC_TYPE_NORMAL=0, + RXDESC_TYPE_NEXT, + RXDESC_TYPE_PTP, + RXDESC_TYPE_MAX +}; + +//Rx Desc Type +enum rx_desc_ring_type { + RX_DESC_RING_TYPE_UNKNOWN=0, + RX_DESC_RING_TYPE_1, + RX_DESC_RING_TYPE_2, + RX_DESC_RING_TYPE_3, + RX_DESC_RING_TYPE_4, + RX_DESC_RING_TYPE_MAX +}; + +enum rx_desc_len { + RX_DESC_LEN_TYPE_1 = (sizeof(struct RxDesc)), + RX_DESC_LEN_TYPE_3 = (sizeof(struct RxDescV3)) +}; + +struct ring_info { + struct sk_buff *skb; + u32 len; + unsigned int bytecount; + unsigned short gso_segs; + u8 __pad[sizeof(void *) - sizeof(u32)]; +}; + +struct pci_resource { + u8 cmd; + u8 cls; + u16 io_base_h; + u16 io_base_l; + u16 mem_base_h; + u16 mem_base_l; + u8 ilr; + u16 resv_0x1c_h; + u16 resv_0x1c_l; + u16 resv_0x20_h; + u16 resv_0x20_l; + u16 resv_0x24_h; + u16 resv_0x24_l; + u16 resv_0x2c_h; + u16 resv_0x2c_l; + u32 pci_sn_l; + u32 pci_sn_h; +}; + +enum r8126_flag { + R8126_FLAG_DOWN = 0, + R8126_FLAG_TASK_RESET_PENDING, + R8126_FLAG_TASK_ESD_CHECK_PENDING, + R8126_FLAG_TASK_LINKCHG_CHECK_PENDING, + R8126_FLAG_MAX +}; + +enum r8126_sysfs_flag { + R8126_SYSFS_RTL_ADV = 0, + R8126_SYSFS_FLAG_MAX +}; + +struct rtl8126_tx_ring { + void* priv; + struct net_device *netdev; + u32 index; + u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */ + u32 dirty_tx; + u32 num_tx_desc; /* Number of Tx descriptor registers */ + struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */ + dma_addr_t TxPhyAddr; + u32 TxDescAllocSize; + struct ring_info tx_skb[MAX_NUM_TX_DESC]; /* Tx data buffers */ + + u32 NextHwDesCloPtr; + u32 BeginHwDesCloPtr; + + u16 hw_clo_ptr_reg; + u16 sw_tail_ptr_reg; + + u16 tdsar_reg; /* Transmit Descriptor Start Address */ +}; + +struct rtl8126_rx_buffer { + struct page *page; + u32 page_offset; + dma_addr_t dma; + void* data; + struct sk_buff *skb; +}; + +struct rtl8126_rx_ring { + void* priv; + struct net_device *netdev; + u32 index; + u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */ + u32 dirty_rx; + u32 num_rx_desc; /* Number of Rx descriptor registers */ + struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */ + u32 RxDescAllocSize; + u64 RxDescPhyAddr[MAX_NUM_RX_DESC]; /* Rx desc physical address*/ + dma_addr_t RxPhyAddr; +#ifdef ENABLE_PAGE_REUSE + struct rtl8126_rx_buffer rx_buffer[MAX_NUM_RX_DESC]; + u16 rx_offset; +#else + struct sk_buff *Rx_skbuff[MAX_NUM_RX_DESC]; /* Rx data buffers */ +#endif //ENABLE_PAGE_REUSE + + u16 rdsar_reg; /* Receive Descriptor Start Address */ +}; + +struct r8126_napi { +#ifdef CONFIG_R8126_NAPI +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,24) + struct napi_struct napi; +#endif +#endif + void* priv; + int index; +}; + +struct r8126_irq { + irq_handler_t handler; + unsigned int vector; + u8 requested; + char name[IFNAMSIZ + 10]; +}; + +#pragma pack(1) +struct rtl8126_regs { + //00 + u8 mac_id[6]; + u16 reg_06; + u8 mar[8]; + //10 + u64 dtccr; + u16 ledsel0; + u16 legreg; + u32 tctr3; + //20 + u32 txq0_dsc_st_addr_0; + u32 txq0_dsc_st_addr_2; + u64 reg_28; + //30 + u16 rit; + u16 ritc; + u16 reg_34; + u8 reg_36; + u8 command; + u32 imr0; + u32 isr0; + //40 + u32 tcr; + u32 rcr; + u32 tctr0; + u32 tctr1; + //50 + u8 cr93c46; + u8 config0; + u8 config1; + u8 config2; + u8 config3; + u8 config4; + u8 config5; + u8 tdfnr; + u32 timer_int0; + u32 timer_int1; + //60 + u32 gphy_mdcmdio; + u32 csidr; + u32 csiar; + u16 phy_status; + u8 config6; + u8 pmch; + //70 + u32 eridr; + u32 eriar; + u16 config7; + u16 reg_7a; + u32 ephy_rxerr_cnt; + //80 + u32 ephy_mdcmdio; + u16 ledsel2; + u16 ledsel1; + u32 tctr2; + u32 timer_int2; + //90 + u8 tppoll0; + u8 reg_91; + u16 reg_92; + u16 led_feature; + u16 ledsel3; + u16 eee_led_config; + u16 reg_9a; + u32 reg_9c; + //a0 + u32 reg_a0; + u32 reg_a4; + u32 reg_a8; + u32 reg_ac; + //b0 + u32 patch_dbg; + u32 reg_b4; + u32 gphy_ocp; + u32 reg_bc; + //c0 + u32 reg_c0; + u32 reg_c4; + u32 reg_c8; + u16 otp_cmd; + u16 otp_pg_config; + //d0 + u16 phy_pwr; + u8 twsi_ctrl; + u8 oob_ctrl; + u16 mac_dbgo; + u16 mac_dbg; + u16 reg_d8; + u16 rms; + u32 efuse_data; + //e0 + u16 cplus_cmd; + u16 reg_e2; + u32 rxq0_dsc_st_addr_0; + u32 rxq0_dsc_st_addr_2; + u16 reg_ec; + u16 tx10midle_cnt; + //f0 + u16 misc0; + u16 misc1; + u32 timer_int3; + u32 cmac_ib; + u16 reg_fc; + u16 sw_rst; +}; +#pragma pack() + +struct rtl8126_regs_save { + union { + u8 mac_io[R8126_MAC_REGS_SIZE]; + + struct rtl8126_regs mac_reg; + }; + u16 pcie_phy[R8126_EPHY_REGS_SIZE/2]; + u16 eth_phy[R8126_PHY_REGS_SIZE/2]; + u32 eri_reg[R8126_ERI_REGS_SIZE/4]; + u32 pci_reg[R8126_PCI_REGS_SIZE/4]; + u16 sw_tail_ptr_reg[R8126_MAX_TX_QUEUES]; + u16 hw_clo_ptr_reg[R8126_MAX_TX_QUEUES]; + + //ktime_t begin_ktime; + //ktime_t end_ktime; + //u64 duration_ns; + + u16 sw0_tail_ptr; + u16 next_hwq0_clo_ptr; + u16 sw1_tail_ptr; + u16 next_hwq1_clo_ptr; + + u16 int_miti_rxq0; + u16 int_miti_txq0; + u16 int_miti_rxq1; + u16 int_miti_txq1; + u8 int_config; + u32 imr_new; + u32 isr_new; + + u8 tdu_status; + u16 rdu_status; + + u16 tc_mode; + + u32 txq1_dsc_st_addr_0; + u32 txq1_dsc_st_addr_2; + + u32 pla_tx_q0_idle_credit; + u32 pla_tx_q1_idle_credit; + + u32 rxq1_dsc_st_addr_0; + u32 rxq1_dsc_st_addr_2; + + u32 rss_ctrl; + u8 rss_key[RTL8126_RSS_KEY_SIZE]; + u8 rss_i_table[RTL8126_MAX_INDIRECTION_TABLE_ENTRIES]; + u16 rss_queue_num_sel_r; +}; + +struct rtl8126_counters { + /* legacy */ + u64 tx_packets; + u64 rx_packets; + u64 tx_errors; + u32 rx_errors; + u16 rx_missed; + u16 align_errors; + u32 tx_one_collision; + u32 tx_multi_collision; + u64 rx_unicast; + u64 rx_broadcast; + u32 rx_multicast; + u16 tx_aborted; + u16 tx_underrun; + + /* extended */ + u64 tx_octets; + u64 rx_octets; + u64 rx_multicast64; + u64 tx_unicast64; + u64 tx_broadcast64; + u64 tx_multicast64; + u32 tx_pause_on; + u32 tx_pause_off; + u32 tx_pause_all; + u32 tx_deferred; + u32 tx_late_collision; + u32 tx_all_collision; + u32 tx_aborted32; + u32 align_errors32; + u32 rx_frame_too_long; + u32 rx_runt; + u32 rx_pause_on; + u32 rx_pause_off; + u32 rx_pause_all; + u32 rx_unknown_opcode; + u32 rx_mac_error; + u32 tx_underrun32; + u32 rx_mac_missed; + u32 rx_tcam_dropped; + u32 tdu; + u32 rdu; +}; + +/* Flow Control Settings */ +enum rtl8126_fc_mode { + rtl8126_fc_none = 0, + rtl8126_fc_rx_pause, + rtl8126_fc_tx_pause, + rtl8126_fc_full, + rtl8126_fc_default +}; + +enum rtl8126_state_t { + __RTL8126_TESTING = 0, + __RTL8126_RESETTING, + __RTL8126_DOWN, + __RTL8126_PTP_TX_IN_PROGRESS, +}; + +struct rtl8126_private { + void __iomem *mmio_addr; /* memory map physical address */ + struct pci_dev *pci_dev; /* Index of PCI device */ + struct net_device *dev; + struct r8126_napi r8126napi[R8126_MAX_MSIX_VEC]; + struct r8126_irq irq_tbl[R8126_MAX_MSIX_VEC]; + unsigned int irq_nvecs; + unsigned int max_irq_nvecs; + unsigned int min_irq_nvecs; + unsigned int hw_supp_irq_nvecs; + //struct msix_entry msix_entries[R8126_MAX_MSIX_VEC]; + struct net_device_stats stats; /* statistics of net device */ + unsigned long state; + + u32 msg_enable; + u32 tx_tcp_csum_cmd; + u32 tx_udp_csum_cmd; + u32 tx_ip_csum_cmd; + u32 tx_ipv6_csum_cmd; + int max_jumbo_frame_size; + int chipset; + u32 mcfg; + //u32 cur_rx; /* Index into the Rx descriptor buffer of next Rx pkt. */ + //u32 cur_tx; /* Index into the Tx descriptor buffer of next Rx pkt. */ + //u32 dirty_rx; + //u32 dirty_tx; + //struct TxDesc *TxDescArray; /* 256-aligned Tx descriptor ring */ + //struct RxDesc *RxDescArray; /* 256-aligned Rx descriptor ring */ + //dma_addr_t TxPhyAddr; + //dma_addr_t RxPhyAddr; + //struct sk_buff *Rx_skbuff[MAX_NUM_RX_DESC]; /* Rx data buffers */ + //struct ring_info tx_skb[MAX_NUM_TX_DESC]; /* Tx data buffers */ + unsigned rx_buf_sz; +#ifdef ENABLE_PAGE_REUSE + unsigned rx_buf_page_order; + unsigned rx_buf_page_size; + u32 page_reuse_fail_cnt; +#endif //ENABLE_PAGE_REUSE + u16 HwSuppNumTxQueues; + u16 HwSuppNumRxQueues; + unsigned int num_tx_rings; + unsigned int num_rx_rings; + struct rtl8126_tx_ring tx_ring[R8126_MAX_TX_QUEUES]; + struct rtl8126_rx_ring rx_ring[R8126_MAX_RX_QUEUES]; +#ifdef ENABLE_LIB_SUPPORT + struct blocking_notifier_head lib_nh; + struct rtl8126_ring lib_tx_ring[R8126_MAX_TX_QUEUES]; + struct rtl8126_ring lib_rx_ring[R8126_MAX_RX_QUEUES]; +#endif + //struct timer_list esd_timer; + //struct timer_list link_timer; + struct pci_resource pci_cfg_space; + unsigned int esd_flag; + unsigned int pci_cfg_is_read; + unsigned int rtl8126_rx_config; + u16 rms; + u16 cp_cmd; + u32 intr_mask; + u32 timer_intr_mask; + u16 isr_reg[R8126_MAX_QUEUES]; + u16 imr_reg[R8126_MAX_QUEUES]; + int phy_auto_nego_reg; + int phy_1000_ctrl_reg; + int phy_2500_ctrl_reg; + u8 org_mac_addr[NODE_ADDRESS_SIZE]; + struct rtl8126_counters *tally_vaddr; + dma_addr_t tally_paddr; + +#ifdef CONFIG_R8126_VLAN + struct vlan_group *vlgrp; +#endif + u8 wol_enabled; + u32 wol_opts; + u8 efuse_ver; + u8 eeprom_type; + u8 autoneg; + u8 duplex; + u32 speed; + u64 advertising; + enum rtl8126_fc_mode fcpause; + u32 HwSuppMaxPhyLinkSpeed; + u16 eeprom_len; + u16 cur_page; + u32 bios_setting; + + int (*set_speed)(struct net_device *, u8 autoneg, u32 speed, u8 duplex, u64 adv); +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) + void (*get_settings)(struct net_device *, struct ethtool_cmd *); +#else + void (*get_settings)(struct net_device *, struct ethtool_link_ksettings *); +#endif + void (*phy_reset_enable)(struct net_device *); + unsigned int (*phy_reset_pending)(struct net_device *); + unsigned int (*link_ok)(struct net_device *); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) + struct work_struct reset_task; + struct work_struct esd_task; + struct work_struct linkchg_task; +#else + struct delayed_work reset_task; + struct delayed_work esd_task; + struct delayed_work linkchg_task; +#endif + DECLARE_BITMAP(task_flags, R8126_FLAG_MAX); + unsigned features; + + u8 org_pci_offset_99; + u8 org_pci_offset_180; + u8 issue_offset_99_event; + + u8 org_pci_offset_80; + u8 org_pci_offset_81; + u8 use_timer_interrupt; + + u32 keep_intr_cnt; + + u8 HwIcVerUnknown; + u8 NotWrRamCodeToMicroP; + u8 NotWrMcuPatchCode; + u8 HwHasWrRamCodeToMicroP; + + u16 sw_ram_code_ver; + u16 hw_ram_code_ver; + + u8 rtk_enable_diag; + + u8 ShortPacketSwChecksum; + + u8 UseSwPaddingShortPkt; + + u8 RequireAdcBiasPatch; + u16 AdcBiasPatchIoffset; + + u8 RequireAdjustUpsTxLinkPulseTiming; + u16 SwrCnt1msIni; + + u8 HwSuppNowIsOobVer; + + u8 RequiredSecLanDonglePatch; + + u8 RequirePhyMdiSwapPatch; + + u32 HwFiberModeVer; + u32 HwFiberStat; + u8 HwSwitchMdiToFiber; + + u16 NicCustLedValue; + + u8 HwSuppMagicPktVer; + + u8 HwSuppLinkChgWakeUpVer; + + u8 HwSuppCheckPhyDisableModeVer; + + u8 random_mac; + + u16 phy_reg_aner; + u16 phy_reg_anlpar; + u16 phy_reg_gbsr; + u16 phy_reg_status_2500; + + u32 HwPcieSNOffset; + + u32 MaxTxDescPtrMask; + u8 HwSuppTxNoCloseVer; + u8 EnableTxNoClose; + + u8 HwSuppIsrVer; + u8 HwCurrIsrVer; + + u8 HwSuppIntMitiVer; + + u8 HwSuppExtendTallyCounterVer; + + u8 check_keep_link_speed; + u8 resume_not_chg_speed; + + u8 HwSuppD0SpeedUpVer; + u8 D0SpeedUpSpeed; + + u8 ring_lib_enabled; + + const char *fw_name; + struct rtl8126_fw *rtl_fw; + u32 ocp_base; + + //Dash+++++++++++++++++ + u8 HwSuppDashVer; + u8 DASH; + u8 dash_printer_enabled; + u8 HwPkgDet; + u8 AllowAccessDashOcp; + void __iomem *mapped_cmac_ioaddr; /* mapped cmac memory map physical address */ + void __iomem *cmac_ioaddr; /* cmac memory map physical address */ + +#ifdef ENABLE_DASH_SUPPORT + u16 AfterRecvFromFwBufLen; + u8 AfterRecvFromFwBuf[RECV_FROM_FW_BUF_SIZE]; + u16 AfterSendToFwBufLen; + u8 AfterSendToFwBuf[SEND_TO_FW_BUF_SIZE]; + u16 SendToFwBufferLen; + u32 SizeOfSendToFwBuffer; + u32 SizeOfSendToFwBufferMemAlloc; + u32 NumOfSendToFwBuffer; + + u8 OobReq; + u8 OobAck; + u32 OobReqComplete; + u32 OobAckComplete; + + u8 RcvFwReqSysOkEvt; + u8 RcvFwDashOkEvt; + u8 SendFwHostOkEvt; + + u8 DashFwDisableRx; + + void *UnalignedSendToFwBufferVa; + void *SendToFwBuffer; + u64 SendToFwBufferPhy; + u8 SendingToFw; + dma_addr_t UnalignedSendToFwBufferPa; + PTX_DASH_SEND_FW_DESC TxDashSendFwDesc; + u64 TxDashSendFwDescPhy; + u8 *UnalignedTxDashSendFwDescVa; + u32 SizeOfTxDashSendFwDescMemAlloc; + u32 SizeOfTxDashSendFwDesc; + u32 NumTxDashSendFwDesc; + u32 CurrNumTxDashSendFwDesc; + u32 LastSendNumTxDashSendFwDesc; + dma_addr_t UnalignedTxDashSendFwDescPa; + + u32 NumRecvFromFwBuffer; + u32 SizeOfRecvFromFwBuffer; + u32 SizeOfRecvFromFwBufferMemAlloc; + void *RecvFromFwBuffer; + u64 RecvFromFwBufferPhy; + + void *UnalignedRecvFromFwBufferVa; + dma_addr_t UnalignedRecvFromFwBufferPa; + PRX_DASH_FROM_FW_DESC RxDashRecvFwDesc; + u64 RxDashRecvFwDescPhy; + u8 *UnalignedRxDashRecvFwDescVa; + u32 SizeOfRxDashRecvFwDescMemAlloc; + u32 SizeOfRxDashRecvFwDesc; + u32 NumRxDashRecvFwDesc; + u32 CurrNumRxDashRecvFwDesc; + dma_addr_t UnalignedRxDashRecvFwDescPa; + u8 DashReqRegValue; + u16 HostReqValue; + + u32 CmacResetIsrCounter; + u8 CmacResetIntr; + u8 CmacResetting; + u8 CmacOobIssueCmacReset; + u32 CmacResetbyFwCnt; + +#if defined(ENABLE_DASH_PRINTER_SUPPORT) + struct completion fw_ack; + struct completion fw_req; + struct completion fw_host_ok; +#endif + //Dash----------------- +#endif //ENABLE_DASH_SUPPORT + + //Realwow++++++++++++++ + u8 HwSuppKCPOffloadVer; + + u8 EnableDhcpTimeoutWake; + u8 EnableTeredoOffload; + u8 EnableKCPOffload; +#ifdef ENABLE_REALWOW_SUPPORT + u32 DhcpTimeout; + MP_KCP_INFO MpKCPInfo; + //Realwow-------------- +#endif //ENABLE_REALWOW_SUPPORT + + struct ethtool_eee eee; + +#ifdef ENABLE_R8126_PROCFS + //Procfs support + struct proc_dir_entry *proc_dir; + struct proc_dir_entry *proc_dir_debug; + struct proc_dir_entry *proc_dir_test; +#endif +#ifdef ENABLE_R8126_SYSFS + //sysfs support + DECLARE_BITMAP(sysfs_flag, R8126_SYSFS_FLAG_MAX); + u32 testmode; +#endif + u8 InitRxDescType; + u16 RxDescLength; //V1 16 Byte V2 32 Bytes + + u8 HwSuppPtpVer; + u8 EnablePtp; + u8 ptp_master_mode; +#ifdef ENABLE_PTP_SUPPORT + u32 tx_hwtstamp_timeouts; + u32 tx_hwtstamp_skipped; + struct work_struct ptp_tx_work; + struct sk_buff *ptp_tx_skb; + struct hwtstamp_config hwtstamp_config; + unsigned long ptp_tx_start; + struct ptp_clock_info ptp_clock_info; + struct ptp_clock *ptp_clock; +#endif + + u8 HwSuppRssVer; + u8 EnableRss; + u16 HwSuppIndirTblEntries; +#ifdef ENABLE_RSS_SUPPORT + u32 rss_flags; + /* Receive Side Scaling settings */ + u8 rss_key[RTL8126_RSS_KEY_SIZE]; + u8 rss_indir_tbl[RTL8126_MAX_INDIRECTION_TABLE_ENTRIES]; + u32 rss_options; +#endif + + u8 HwSuppMacMcuVer; + u16 MacMcuPageSize; + + u8 HwSuppTcamVer; + + u16 TcamNotValidReg; + u16 TcamValidReg; + u16 TcamMaAddrcOffset; + u16 TcamVlanTagOffset; +}; + +#ifdef ENABLE_LIB_SUPPORT +static inline unsigned int +rtl8126_num_lib_tx_rings(struct rtl8126_private *tp) +{ + int count, i; + + for (count = 0, i = tp->num_tx_rings; i < tp->HwSuppNumTxQueues; i++) + if(tp->lib_tx_ring[i].enabled) + count++; + + return count; +} + +static inline unsigned int +rtl8126_num_lib_rx_rings(struct rtl8126_private *tp) +{ + int count, i; + + for (count = 0, i = tp->num_rx_rings; i < tp->HwSuppNumRxQueues; i++) + if(tp->lib_rx_ring[i].enabled) + count++; + + return count; +} + +#else +static inline unsigned int +rtl8126_num_lib_tx_rings(struct rtl8126_private *tp) +{ + return 0; +} + +static inline unsigned int +rtl8126_num_lib_rx_rings(struct rtl8126_private *tp) +{ + return 0; +} +#endif + +static inline unsigned int +rtl8126_tot_tx_rings(struct rtl8126_private *tp) +{ + return tp->num_tx_rings + rtl8126_num_lib_tx_rings(tp); +} + +static inline unsigned int +rtl8126_tot_rx_rings(struct rtl8126_private *tp) +{ + return tp->num_rx_rings + rtl8126_num_lib_rx_rings(tp); +} + +static inline struct netdev_queue *txring_txq(const struct rtl8126_tx_ring *ring) +{ + return netdev_get_tx_queue(ring->netdev, ring->index); +} + +enum eetype { + EEPROM_TYPE_NONE=0, + EEPROM_TYPE_93C46, + EEPROM_TYPE_93C56, + EEPROM_TWSI +}; + +enum mcfg { + CFG_METHOD_1=1, + CFG_METHOD_2, + CFG_METHOD_3, + CFG_METHOD_DEFAULT, + CFG_METHOD_MAX +}; + +#define LSO_32K 32000 +#define LSO_64K 64000 + +#define NIC_MIN_PHYS_BUF_COUNT (2) +#define NIC_MAX_PHYS_BUF_COUNT_LSO_64K (24) +#define NIC_MAX_PHYS_BUF_COUNT_LSO2 (16*4) + +#define GTTCPHO_SHIFT 18 +#define GTTCPHO_MAX 0x70U +#define GTPKTSIZE_MAX 0x3ffffU +#define TCPHO_SHIFT 18 +#define TCPHO_MAX 0x3ffU +#define LSOPKTSIZE_MAX 0xffffU +#define MSS_MAX 0x07ffu /* MSS value */ + +#define OOB_CMD_RESET 0x00 +#define OOB_CMD_DRIVER_START 0x05 +#define OOB_CMD_DRIVER_STOP 0x06 +#define OOB_CMD_SET_IPMAC 0x41 + +#define WAKEUP_MAGIC_PACKET_NOT_SUPPORT (0) +#define WAKEUP_MAGIC_PACKET_V1 (1) +#define WAKEUP_MAGIC_PACKET_V2 (2) +#define WAKEUP_MAGIC_PACKET_V3 (3) + +//Ram Code Version +#define NIC_RAMCODE_VERSION_CFG_METHOD_1 (0x0023) +#define NIC_RAMCODE_VERSION_CFG_METHOD_2 (0x0033) +#define NIC_RAMCODE_VERSION_CFG_METHOD_3 (0x0048) + +//hwoptimize +#define HW_PATCH_SOC_LAN (BIT_0) +#define HW_PATCH_SAMSUNG_LAN_DONGLE (BIT_2) + +static const u16 other_q_intr_mask = (RxOK1 | RxDU1); + +void rtl8126_mdio_write(struct rtl8126_private *tp, u16 RegAddr, u16 value); +void rtl8126_mdio_prot_write(struct rtl8126_private *tp, u32 RegAddr, u32 value); +void rtl8126_mdio_prot_direct_write_phy_ocp(struct rtl8126_private *tp, u32 RegAddr, u32 value); +u32 rtl8126_mdio_read(struct rtl8126_private *tp, u16 RegAddr); +u32 rtl8126_mdio_prot_read(struct rtl8126_private *tp, u32 RegAddr); +u32 rtl8126_mdio_prot_direct_read_phy_ocp(struct rtl8126_private *tp, u32 RegAddr); +void rtl8126_ephy_write(struct rtl8126_private *tp, int RegAddr, int value); +void rtl8126_mac_ocp_write(struct rtl8126_private *tp, u16 reg_addr, u16 value); +u16 rtl8126_mac_ocp_read(struct rtl8126_private *tp, u16 reg_addr); +void rtl8126_clear_eth_phy_bit(struct rtl8126_private *tp, u8 addr, u16 mask); +void rtl8126_set_eth_phy_bit(struct rtl8126_private *tp, u8 addr, u16 mask); +void rtl8126_ocp_write(struct rtl8126_private *tp, u16 addr, u8 len, u32 data); +void rtl8126_oob_notify(struct rtl8126_private *tp, u8 cmd); +void rtl8126_init_ring_indexes(struct rtl8126_private *tp); +void rtl8126_oob_mutex_lock(struct rtl8126_private *tp); +u32 rtl8126_ocp_read(struct rtl8126_private *tp, u16 addr, u8 len); +u32 rtl8126_ocp_read_with_oob_base_address(struct rtl8126_private *tp, u16 addr, u8 len, u32 base_address); +u32 rtl8126_ocp_write_with_oob_base_address(struct rtl8126_private *tp, u16 addr, u8 len, u32 value, u32 base_address); +u32 rtl8126_eri_read(struct rtl8126_private *tp, int addr, int len, int type); +u32 rtl8126_eri_read_with_oob_base_address(struct rtl8126_private *tp, int addr, int len, int type, u32 base_address); +int rtl8126_eri_write(struct rtl8126_private *tp, int addr, int len, u32 value, int type); +int rtl8126_eri_write_with_oob_base_address(struct rtl8126_private *tp, int addr, int len, u32 value, int type, u32 base_address); +u16 rtl8126_ephy_read(struct rtl8126_private *tp, int RegAddr); +void rtl8126_wait_txrx_fifo_empty(struct net_device *dev); +void rtl8126_enable_now_is_oob(struct rtl8126_private *tp); +void rtl8126_disable_now_is_oob(struct rtl8126_private *tp); +void rtl8126_oob_mutex_unlock(struct rtl8126_private *tp); +void rtl8126_dash2_disable_tx(struct rtl8126_private *tp); +void rtl8126_dash2_enable_tx(struct rtl8126_private *tp); +void rtl8126_dash2_disable_rx(struct rtl8126_private *tp); +void rtl8126_dash2_enable_rx(struct rtl8126_private *tp); +void rtl8126_hw_disable_mac_mcu_bps(struct net_device *dev); +void rtl8126_mark_to_asic(struct rtl8126_private *tp, struct RxDesc *desc, u32 rx_buf_sz); + +static inline void +rtl8126_make_unusable_by_asic(struct rtl8126_private *tp, + struct RxDesc *desc) +{ + if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) { + ((struct RxDescV3 *)desc)->addr = RTL8126_MAGIC_NUMBER; + ((struct RxDescV3 *)desc)->RxDescNormalDDWord4.opts1 &= ~cpu_to_le32(DescOwn | RsvdMaskV3); + } else { + desc->addr = RTL8126_MAGIC_NUMBER; + desc->opts1 &= ~cpu_to_le32(DescOwn | RsvdMask); + } +} + +static inline struct RxDesc* +rtl8126_get_rxdesc(struct rtl8126_private *tp, struct RxDesc *RxDescBase, u32 const cur_rx) +{ + return (struct RxDesc*)((u8*)RxDescBase + (cur_rx * tp->RxDescLength)); +} + +static inline void +rtl8126_disable_hw_interrupt_v2(struct rtl8126_private *tp, + u32 message_id) +{ + RTL_W32(tp, IMR_V2_CLEAR_REG_8125, BIT(message_id)); +} + +static inline void +rtl8126_enable_hw_interrupt_v2(struct rtl8126_private *tp, u32 message_id) +{ + RTL_W32(tp, IMR_V2_SET_REG_8125, BIT(message_id)); +} + +int rtl8126_open(struct net_device *dev); +int rtl8126_close(struct net_device *dev); +void rtl8126_hw_config(struct net_device *dev); +void rtl8126_hw_set_timer_int_8125(struct rtl8126_private *tp, u32 message_id, u8 timer_intmiti_val); +void rtl8126_set_rx_q_num(struct rtl8126_private *tp, unsigned int num_rx_queues); +void rtl8126_set_tx_q_num(struct rtl8126_private *tp, unsigned int num_tx_queues); +void rtl8126_enable_mcu(struct rtl8126_private *tp, bool enable); +void rtl8126_hw_start(struct net_device *dev); +void rtl8126_hw_reset(struct net_device *dev); +void rtl8126_tx_clear(struct rtl8126_private *tp); +void rtl8126_rx_clear(struct rtl8126_private *tp); +int rtl8126_init_ring(struct net_device *dev); +void rtl8126_hw_set_rx_packet_filter(struct net_device *dev); +void rtl8126_enable_hw_linkchg_interrupt(struct rtl8126_private *tp); +int rtl8126_dump_tally_counter(struct rtl8126_private *tp, dma_addr_t paddr); +void rtl8126_enable_napi(struct rtl8126_private *tp); +void _rtl8126_wait_for_quiescence(struct net_device *dev); + +#ifndef ENABLE_LIB_SUPPORT +static inline void rtl8126_lib_reset_prepare(struct rtl8126_private *tp) { } +static inline void rtl8126_lib_reset_complete(struct rtl8126_private *tp) { } +#endif + +#define HW_SUPPORT_CHECK_PHY_DISABLE_MODE(_M) ((_M)->HwSuppCheckPhyDisableModeVer > 0 ) +#define HW_HAS_WRITE_PHY_MCU_RAM_CODE(_M) (((_M)->HwHasWrRamCodeToMicroP == TRUE) ? 1 : 0) +#define HW_SUPPORT_D0_SPEED_UP(_M) ((_M)->HwSuppD0SpeedUpVer > 0) +#define HW_SUPPORT_MAC_MCU(_M) ((_M)->HwSuppMacMcuVer > 0) +#define HW_SUPPORT_TCAM(_M) ((_M)->HwSuppTcamVer > 0) + +#define HW_SUPP_PHY_LINK_SPEED_GIGA(_M) ((_M)->HwSuppMaxPhyLinkSpeed >= 1000) +#define HW_SUPP_PHY_LINK_SPEED_2500M(_M) ((_M)->HwSuppMaxPhyLinkSpeed >= 2500) +#define HW_SUPP_PHY_LINK_SPEED_5000M(_M) ((_M)->HwSuppMaxPhyLinkSpeed >= 5000) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34) +#define netdev_mc_count(dev) ((dev)->mc_count) +#define netdev_mc_empty(dev) (netdev_mc_count(dev) == 0) +#define netdev_for_each_mc_addr(mclist, dev) \ + for (mclist = dev->mc_list; mclist; mclist = mclist->next) +#endif + +#endif /* __R8126_H */ diff --git a/package/lean/r8126/src/r8126_dash.h b/package/lean/r8126/src/r8126_dash.h new file mode 100644 index 000000000..b0a2f11fa --- /dev/null +++ b/package/lean/r8126/src/r8126_dash.h @@ -0,0 +1,261 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* +################################################################################ +# +# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see . +# +# Author: +# Realtek NIC software team +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ +*/ + +/************************************************************************************ + * This product is covered by one or more of the following patents: + * US6,570,884, US6,115,776, and US6,327,625. + ***********************************************************************************/ + +#ifndef _LINUX_R8126_DASH_H +#define _LINUX_R8126_DASH_H + +#include + +#define SIOCDEVPRIVATE_RTLDASH SIOCDEVPRIVATE+2 + +enum rtl_dash_cmd { + RTL_DASH_ARP_NS_OFFLOAD = 0, + RTL_DASH_SET_OOB_IPMAC, + RTL_DASH_NOTIFY_OOB, + + RTL_DASH_SEND_BUFFER_DATA_TO_DASH_FW, + RTL_DASH_CHECK_SEND_BUFFER_TO_DASH_FW_COMPLETE, + RTL_DASH_GET_RCV_FROM_FW_BUFFER_DATA, + RTL_DASH_OOB_REQ, + RTL_DASH_OOB_ACK, + RTL_DASH_DETACH_OOB_REQ, + RTL_DASH_DETACH_OOB_ACK, + + RTL_FW_SET_IPV4 = 0x10, + RTL_FW_GET_IPV4, + RTL_FW_SET_IPV6, + RTL_FW_GET_IPV6, + RTL_FW_SET_EXT_SNMP, + RTL_FW_GET_EXT_SNMP, + RTL_FW_SET_WAKEUP_PATTERN, + RTL_FW_GET_WAKEUP_PATTERN, + RTL_FW_DEL_WAKEUP_PATTERN, + + RTLT_DASH_COMMAND_INVALID, +}; + +struct rtl_dash_ip_mac { + struct sockaddr ifru_addr; + struct sockaddr ifru_netmask; + struct sockaddr ifru_hwaddr; +}; + +struct rtl_dash_ioctl_struct { + __u32 cmd; + __u32 offset; + __u32 len; + union { + __u32 data; + void *data_buffer; + }; +}; + +struct settings_ipv4 { + __u32 IPv4addr; + __u32 IPv4mask; + __u32 IPv4Gateway; +}; + +struct settings_ipv6 { + __u32 reserved; + __u32 prefixLen; + __u16 IPv6addr[8]; + __u16 IPv6Gateway[8]; +}; + +struct settings_ext_snmp { + __u16 index; + __u16 oid_get_len; + __u8 oid_for_get[24]; + __u8 reserved0[26]; + __u16 value_len; + __u8 value[256]; + __u8 supported; + __u8 reserved1[27]; +}; + +struct wakeup_pattern { + __u8 index; + __u8 valid; + __u8 start; + __u8 length; + __u8 name[36]; + __u8 mask[16]; + __u8 pattern[128]; + __u32 reserved[2]; +}; + +typedef struct _RX_DASH_FROM_FW_DESC { + u16 length; + u8 statusLowByte; + u8 statusHighByte; + u32 resv; + u64 BufferAddress; +} +RX_DASH_FROM_FW_DESC, *PRX_DASH_FROM_FW_DESC; + +typedef struct _TX_DASH_SEND_FW_DESC { + u16 length; + u8 statusLowByte; + u8 statusHighByte; + u32 resv; + u64 BufferAddress; +} +TX_DASH_SEND_FW_DESC, *PTX_DASH_SEND_FW_DESC; + +typedef struct _OSOOBHdr { + u32 len; + u8 type; + u8 flag; + u8 hostReqV; + u8 res; +} +OSOOBHdr, *POSOOBHdr; + +typedef struct _RX_DASH_BUFFER_TYPE_2 { + OSOOBHdr oobhdr; + u8 RxDataBuffer[0]; +} +RX_DASH_BUFFER_TYPE_2, *PRX_DASH_BUFFER_TYPE_2; + +#define ALIGN_8 (0x7) +#define ALIGN_16 (0xf) +#define ALIGN_32 (0x1f) +#define ALIGN_64 (0x3f) +#define ALIGN_256 (0xff) +#define ALIGN_4096 (0xfff) + +#define OCP_REG_CONFIG0 (0x10) +#define OCP_REG_CONFIG0_REV_F (0xB8) +#define OCP_REG_DASH_POLL (0x30) +#define OCP_REG_HOST_REQ (0x34) +#define OCP_REG_DASH_REQ (0x35) +#define OCP_REG_CR (0x36) +#define OCP_REG_DMEMSTA (0x38) +#define OCP_REG_GPHYAR (0x60) + + +#define OCP_REG_CONFIG0_DASHEN BIT_15 +#define OCP_REG_CONFIG0_OOBRESET BIT_14 +#define OCP_REG_CONFIG0_APRDY BIT_13 +#define OCP_REG_CONFIG0_FIRMWARERDY BIT_12 +#define OCP_REG_CONFIG0_DRIVERRDY BIT_11 +#define OCP_REG_CONFIG0_OOB_WDT BIT_9 +#define OCP_REG_CONFIG0_DRV_WAIT_OOB BIT_8 +#define OCP_REG_CONFIG0_TLSEN BIT_7 + +#define HW_DASH_SUPPORT_DASH(_M) ((_M)->HwSuppDashVer > 0 ) +#define HW_DASH_SUPPORT_TYPE_1(_M) ((_M)->HwSuppDashVer == 1 ) +#define HW_DASH_SUPPORT_TYPE_2(_M) ((_M)->HwSuppDashVer == 2 ) +#define HW_DASH_SUPPORT_TYPE_3(_M) ((_M)->HwSuppDashVer == 3 ) + +#define RECV_FROM_FW_BUF_SIZE (1520) +#define SEND_TO_FW_BUF_SIZE (1520) + +#define RX_DASH_FROM_FW_OWN BIT_15 +#define TX_DASH_SEND_FW_OWN BIT_15 +#define TX_DASH_SEND_FW_OWN_HIGHBYTE BIT_7 + +#define TXS_CC3_0 (BIT_0|BIT_1|BIT_2|BIT_3) +#define TXS_EXC BIT_4 +#define TXS_LNKF BIT_5 +#define TXS_OWC BIT_6 +#define TXS_TES BIT_7 +#define TXS_UNF BIT_9 +#define TXS_LGSEN BIT_11 +#define TXS_LS BIT_12 +#define TXS_FS BIT_13 +#define TXS_EOR BIT_14 +#define TXS_OWN BIT_15 + +#define TPPool_HRDY 0x20 + +#define HostReqReg (0xC0) +#define SystemMasterDescStartAddrLow (0xF0) +#define SystemMasterDescStartAddrHigh (0xF4) +#define SystemSlaveDescStartAddrLow (0xF8) +#define SystemSlaveDescStartAddrHigh (0xFC) + +//DASH Request Type +#define WSMANREG 0x01 +#define OSPUSHDATA 0x02 + +#define RXS_OWN BIT_15 +#define RXS_EOR BIT_14 +#define RXS_FS BIT_13 +#define RXS_LS BIT_12 + +#define ISRIMR_DP_DASH_OK BIT_15 +#define ISRIMR_DP_HOST_OK BIT_13 +#define ISRIMR_DP_REQSYS_OK BIT_11 + +#define ISRIMR_DASH_INTR_EN BIT_12 +#define ISRIMR_DASH_INTR_CMAC_RESET BIT_15 + +#define ISRIMR_DASH_TYPE2_ROK BIT_0 +#define ISRIMR_DASH_TYPE2_RDU BIT_1 +#define ISRIMR_DASH_TYPE2_TOK BIT_2 +#define ISRIMR_DASH_TYPE2_TDU BIT_3 +#define ISRIMR_DASH_TYPE2_TX_FIFO_FULL BIT_4 +#define ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE BIT_5 +#define ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE BIT_6 + +#define CMAC_OOB_STOP 0x25 +#define CMAC_OOB_INIT 0x26 +#define CMAC_OOB_RESET 0x2a + +#define NO_BASE_ADDRESS 0x00000000 +#define RTL8168FP_OOBMAC_BASE 0xBAF70000 +#define RTL8168FP_CMAC_IOBASE 0xBAF20000 +#define RTL8168FP_KVM_BASE 0xBAF80400 +#define CMAC_SYNC_REG 0x20 +#define CMAC_RXDESC_OFFSET 0x90 //RX: 0x90 - 0x98 +#define CMAC_TXDESC_OFFSET 0x98 //TX: 0x98 - 0x9F + +/* cmac write/read MMIO register */ +#define RTL_CMAC_W8(tp, reg, val8) writeb ((val8), tp->cmac_ioaddr + (reg)) +#define RTL_CMAC_W16(tp, reg, val16) writew ((val16), tp->cmac_ioaddr + (reg)) +#define RTL_CMAC_W32(tp, reg, val32) writel ((val32), tp->cmac_ioaddr + (reg)) +#define RTL_CMAC_R8(tp, reg) readb (tp->cmac_ioaddr + (reg)) +#define RTL_CMAC_R16(tp, reg) readw (tp->cmac_ioaddr + (reg)) +#define RTL_CMAC_R32(tp, reg) ((unsigned long) readl (tp->cmac_ioaddr + (reg))) + +int rtl8126_dash_ioctl(struct net_device *dev, struct ifreq *ifr); +void HandleDashInterrupt(struct net_device *dev); +int AllocateDashShareMemory(struct net_device *dev); +void FreeAllocatedDashShareMemory(struct net_device *dev); +void DashHwInit(struct net_device *dev); + + +#endif /* _LINUX_R8126_DASH_H */ diff --git a/package/lean/r8126/src/r8126_firmware.c b/package/lean/r8126/src/r8126_firmware.c new file mode 100644 index 000000000..a7b13cbcb --- /dev/null +++ b/package/lean/r8126/src/r8126_firmware.c @@ -0,0 +1,264 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* +################################################################################ +# +# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see . +# +# Author: +# Realtek NIC software team +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ +*/ + +/************************************************************************************ + * This product is covered by one or more of the following patents: + * US6,570,884, US6,115,776, and US6,327,625. + ***********************************************************************************/ + +#include +#include +#include + +#include "r8126_firmware.h" + +enum rtl_fw_opcode { + PHY_READ = 0x0, + PHY_DATA_OR = 0x1, + PHY_DATA_AND = 0x2, + PHY_BJMPN = 0x3, + PHY_MDIO_CHG = 0x4, + PHY_CLEAR_READCOUNT = 0x7, + PHY_WRITE = 0x8, + PHY_READCOUNT_EQ_SKIP = 0x9, + PHY_COMP_EQ_SKIPN = 0xa, + PHY_COMP_NEQ_SKIPN = 0xb, + PHY_WRITE_PREVIOUS = 0xc, + PHY_SKIPN = 0xd, + PHY_DELAY_MS = 0xe, +}; + +struct fw_info { + u32 magic; + char version[RTL8126_VER_SIZE]; + __le32 fw_start; + __le32 fw_len; + u8 chksum; +} __packed; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,16,0) +#define sizeof_field(TYPE, MEMBER) sizeof((((TYPE *)0)->MEMBER)) +#endif +#define FW_OPCODE_SIZE sizeof_field(struct rtl8126_fw_phy_action, code[0]) + +static bool rtl8126_fw_format_ok(struct rtl8126_fw *rtl_fw) +{ + const struct firmware *fw = rtl_fw->fw; + struct fw_info *fw_info = (struct fw_info *)fw->data; + struct rtl8126_fw_phy_action *pa = &rtl_fw->phy_action; + + if (fw->size < FW_OPCODE_SIZE) + return false; + + if (!fw_info->magic) { + size_t i, size, start; + u8 checksum = 0; + + if (fw->size < sizeof(*fw_info)) + return false; + + for (i = 0; i < fw->size; i++) + checksum += fw->data[i]; + if (checksum != 0) + return false; + + start = le32_to_cpu(fw_info->fw_start); + if (start > fw->size) + return false; + + size = le32_to_cpu(fw_info->fw_len); + if (size > (fw->size - start) / FW_OPCODE_SIZE) + return false; + + strscpy(rtl_fw->version, fw_info->version, RTL8126_VER_SIZE); + + pa->code = (__le32 *)(fw->data + start); + pa->size = size; + } else { + if (fw->size % FW_OPCODE_SIZE) + return false; + + strscpy(rtl_fw->version, rtl_fw->fw_name, RTL8126_VER_SIZE); + + pa->code = (__le32 *)fw->data; + pa->size = fw->size / FW_OPCODE_SIZE; + } + + return true; +} + +static bool rtl8126_fw_data_ok(struct rtl8126_fw *rtl_fw) +{ + struct rtl8126_fw_phy_action *pa = &rtl_fw->phy_action; + size_t index; + + for (index = 0; index < pa->size; index++) { + u32 action = le32_to_cpu(pa->code[index]); + u32 val = action & 0x0000ffff; + u32 regno = (action & 0x0fff0000) >> 16; + + switch (action >> 28) { + case PHY_READ: + case PHY_DATA_OR: + case PHY_DATA_AND: + case PHY_CLEAR_READCOUNT: + case PHY_WRITE: + case PHY_WRITE_PREVIOUS: + case PHY_DELAY_MS: + break; + + case PHY_MDIO_CHG: + if (val > 1) + goto out; + break; + + case PHY_BJMPN: + if (regno > index) + goto out; + break; + case PHY_READCOUNT_EQ_SKIP: + if (index + 2 >= pa->size) + goto out; + break; + case PHY_COMP_EQ_SKIPN: + case PHY_COMP_NEQ_SKIPN: + case PHY_SKIPN: + if (index + 1 + regno >= pa->size) + goto out; + break; + + default: + dev_err(rtl_fw->dev, "Invalid action 0x%08x\n", action); + return false; + } + } + + return true; +out: + dev_err(rtl_fw->dev, "Out of range of firmware\n"); + return false; +} + +void rtl8126_fw_write_firmware(struct rtl8126_private *tp, struct rtl8126_fw *rtl_fw) +{ + struct rtl8126_fw_phy_action *pa = &rtl_fw->phy_action; + rtl8126_fw_write_t fw_write = rtl_fw->phy_write; + rtl8126_fw_read_t fw_read = rtl_fw->phy_read; + int predata = 0, count = 0; + size_t index; + + for (index = 0; index < pa->size; index++) { + u32 action = le32_to_cpu(pa->code[index]); + u32 data = action & 0x0000ffff; + u32 regno = (action & 0x0fff0000) >> 16; + enum rtl_fw_opcode opcode = action >> 28; + + if (!action) + break; + + switch (opcode) { + case PHY_READ: + predata = fw_read(tp, regno); + count++; + break; + case PHY_DATA_OR: + predata |= data; + break; + case PHY_DATA_AND: + predata &= data; + break; + case PHY_BJMPN: + index -= (regno + 1); + break; + case PHY_MDIO_CHG: + if (data) { + fw_write = rtl_fw->mac_mcu_write; + fw_read = rtl_fw->mac_mcu_read; + } else { + fw_write = rtl_fw->phy_write; + fw_read = rtl_fw->phy_read; + } + + break; + case PHY_CLEAR_READCOUNT: + count = 0; + break; + case PHY_WRITE: + fw_write(tp, regno, data); + break; + case PHY_READCOUNT_EQ_SKIP: + if (count == data) + index++; + break; + case PHY_COMP_EQ_SKIPN: + if (predata == data) + index += regno; + break; + case PHY_COMP_NEQ_SKIPN: + if (predata != data) + index += regno; + break; + case PHY_WRITE_PREVIOUS: + fw_write(tp, regno, predata); + break; + case PHY_SKIPN: + index += regno; + break; + case PHY_DELAY_MS: + mdelay(data); + break; + } + } +} + +void rtl8126_fw_release_firmware(struct rtl8126_fw *rtl_fw) +{ + release_firmware(rtl_fw->fw); +} + +int rtl8126_fw_request_firmware(struct rtl8126_fw *rtl_fw) +{ + int rc; + + rc = request_firmware(&rtl_fw->fw, rtl_fw->fw_name, rtl_fw->dev); + if (rc < 0) + goto out; + + if (!rtl8126_fw_format_ok(rtl_fw) || !rtl8126_fw_data_ok(rtl_fw)) { + release_firmware(rtl_fw->fw); + rc = -EINVAL; + goto out; + } + + return 0; +out: + dev_err(rtl_fw->dev, "Unable to load firmware %s (%d)\n", + rtl_fw->fw_name, rc); + return rc; +} diff --git a/package/lean/r8126/src/r8126_firmware.h b/package/lean/r8126/src/r8126_firmware.h new file mode 100644 index 000000000..5ae6f936a --- /dev/null +++ b/package/lean/r8126/src/r8126_firmware.h @@ -0,0 +1,68 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* +################################################################################ +# +# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see . +# +# Author: +# Realtek NIC software team +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ +*/ + +/************************************************************************************ + * This product is covered by one or more of the following patents: + * US6,570,884, US6,115,776, and US6,327,625. + ***********************************************************************************/ + +#ifndef _LINUX_R8126_FIRMWARE_H +#define _LINUX_R8126_FIRMWARE_H + +#include +#include + +struct rtl8126_private; +typedef void (*rtl8126_fw_write_t)(struct rtl8126_private *tp, u16 reg, u16 val); +typedef u32 (*rtl8126_fw_read_t)(struct rtl8126_private *tp, u16 reg); + +#define RTL8126_VER_SIZE 32 + +struct rtl8126_fw { + rtl8126_fw_write_t phy_write; + rtl8126_fw_read_t phy_read; + rtl8126_fw_write_t mac_mcu_write; + rtl8126_fw_read_t mac_mcu_read; + const struct firmware *fw; + const char *fw_name; + struct device *dev; + + char version[RTL8126_VER_SIZE]; + + struct rtl8126_fw_phy_action { + __le32 *code; + size_t size; + } phy_action; +}; + +int rtl8126_fw_request_firmware(struct rtl8126_fw *rtl_fw); +void rtl8126_fw_release_firmware(struct rtl8126_fw *rtl_fw); +void rtl8126_fw_write_firmware(struct rtl8126_private *tp, struct rtl8126_fw *rtl_fw); + +#endif /* _LINUX_R8126_FIRMWARE_H */ diff --git a/package/lean/r8126/src/r8126_n.c b/package/lean/r8126/src/r8126_n.c new file mode 100644 index 000000000..d01c7ef94 --- /dev/null +++ b/package/lean/r8126/src/r8126_n.c @@ -0,0 +1,17425 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* +################################################################################ +# +# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see . +# +# Author: +# Realtek NIC software team +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ +*/ + +/************************************************************************************ + * This product is covered by one or more of the following patents: + * US6,570,884, US6,115,776, and US6,327,625. + ***********************************************************************************/ + +/* + * This driver is modified from r8169.c in Linux kernel 2.6.18 + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22) +#include +#include +#endif +#include +#include +#include +#include + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) +#if LINUX_VERSION_CODE < KERNEL_VERSION(5,4,0) +#include +#endif +#endif +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37) +#include +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) +#define dev_printk(A,B,fmt,args...) printk(A fmt,##args) +#else +#include +#include +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,31) +#include +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,4,10) +#include +#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(6,4,10) */ + +#include +#include + +#include "r8126.h" +#include "rtl_eeprom.h" +#include "rtltool.h" +#include "r8126_firmware.h" + +#ifdef ENABLE_R8126_PROCFS +#include +#include +#endif + +#define FIRMWARE_8126A_2 "rtl_nic/rtl8126a-2.fw" +#define FIRMWARE_8126A_3 "rtl_nic/rtl8126a-3.fw" + +static const struct { + const char *name; + const char *fw_name; +} rtl_chip_fw_infos[] = { + /* PCI-E devices. */ + [CFG_METHOD_1] = {"RTL8126A", }, + [CFG_METHOD_2] = {"RTL8126A", FIRMWARE_8126A_2}, + [CFG_METHOD_3] = {"RTL8126A", FIRMWARE_8126A_3}, + [CFG_METHOD_DEFAULT] = {"Unknown", }, +}; + +#define _R(NAME,MAC,RCR,MASK,JumFrameSz) \ + { .name = NAME, .mcfg = MAC, .RCR_Cfg = RCR, .RxConfigMask = MASK, .jumbo_frame_sz = JumFrameSz } + +static const struct { + const char *name; + u8 mcfg; + u32 RCR_Cfg; + u32 RxConfigMask; /* Clears the bits supported by this chip */ + u32 jumbo_frame_sz; +} rtl_chip_info[] = { + _R("RTL8126A", + CFG_METHOD_1, + Rx_Fetch_Number_8 | RxCfg_pause_slot_en | EnableInnerVlan | EnableOuterVlan | (RX_DMA_BURST_unlimited << RxCfgDMAShift), + 0xff7e5880, + Jumbo_Frame_9k), + + _R("RTL8126A", + CFG_METHOD_2, + Rx_Fetch_Number_8 | Rx_Close_Multiple | RxCfg_pause_slot_en | EnableInnerVlan | EnableOuterVlan | (RX_DMA_BURST_512 << RxCfgDMAShift), + 0xff7e5880, + Jumbo_Frame_9k), + + _R("RTL8126A", + CFG_METHOD_3, + Rx_Fetch_Number_8 | Rx_Close_Multiple | RxCfg_pause_slot_en | EnableInnerVlan | EnableOuterVlan | (RX_DMA_BURST_512 << RxCfgDMAShift), + 0xff7e5880, + Jumbo_Frame_9k), + + _R("Unknown", + CFG_METHOD_DEFAULT, + (RX_DMA_BURST_unlimited << RxCfgDMAShift), + 0xff7e5880, + Jumbo_Frame_1k) +}; +#undef _R + + +#ifndef PCI_VENDOR_ID_DLINK +#define PCI_VENDOR_ID_DLINK 0x1186 +#endif + +static struct pci_device_id rtl8126_pci_tbl[] = { + { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x8126), }, + { PCI_DEVICE(PCI_VENDOR_ID_REALTEK, 0x5000), }, + {0,}, +}; + +MODULE_DEVICE_TABLE(pci, rtl8126_pci_tbl); + +static int use_dac = 1; +static int timer_count = 0x2600; +static int timer_count_v2 = (0x2600 / 0x100); + +static struct { + u32 msg_enable; +} debug = { -1 }; + +static unsigned int speed_mode = SPEED_5000; +static unsigned int duplex_mode = DUPLEX_FULL; +static unsigned int autoneg_mode = AUTONEG_ENABLE; +#ifdef CONFIG_ASPM +static int aspm = 1; +#else +static int aspm = 0; +#endif +#ifdef ENABLE_S5WOL +static int s5wol = 1; +#else +static int s5wol = 0; +#endif +#ifdef ENABLE_S5_KEEP_CURR_MAC +static int s5_keep_curr_mac = 1; +#else +static int s5_keep_curr_mac = 0; +#endif +#ifdef ENABLE_EEE +static int eee_enable = 1; +#else +static int eee_enable = 0; +#endif +#ifdef CONFIG_SOC_LAN +static ulong hwoptimize = HW_PATCH_SOC_LAN; +#else +static ulong hwoptimize = 0; +#endif +#ifdef ENABLE_S0_MAGIC_PACKET +static int s0_magic_packet = 1; +#else +static int s0_magic_packet = 0; +#endif +#ifdef ENABLE_TX_NO_CLOSE +static int tx_no_close_enable = 1; +#else +static int tx_no_close_enable = 0; +#endif +#ifdef ENABLE_PTP_MASTER_MODE +static int enable_ptp_master_mode = 1; +#else +static int enable_ptp_master_mode = 0; +#endif +#ifdef DISABLE_WOL_SUPPORT +static int disable_wol_support = 1; +#else +static int disable_wol_support = 0; +#endif + +#ifdef ENABLE_DOUBLE_VLAN +static int enable_double_vlan = 1; +#else +static int enable_double_vlan = 0; +#endif + +MODULE_AUTHOR("Realtek and the Linux r8126 crew "); +MODULE_DESCRIPTION("Realtek r8126 Ethernet controller driver"); + +module_param(speed_mode, uint, 0); +MODULE_PARM_DESC(speed_mode, "force phy operation. Deprecated by ethtool (8)."); + +module_param(duplex_mode, uint, 0); +MODULE_PARM_DESC(duplex_mode, "force phy operation. Deprecated by ethtool (8)."); + +module_param(autoneg_mode, uint, 0); +MODULE_PARM_DESC(autoneg_mode, "force phy operation. Deprecated by ethtool (8)."); + +module_param(aspm, int, 0); +MODULE_PARM_DESC(aspm, "Enable ASPM."); + +module_param(s5wol, int, 0); +MODULE_PARM_DESC(s5wol, "Enable Shutdown Wake On Lan."); + +module_param(s5_keep_curr_mac, int, 0); +MODULE_PARM_DESC(s5_keep_curr_mac, "Enable Shutdown Keep Current MAC Address."); + +module_param(use_dac, int, 0); +MODULE_PARM_DESC(use_dac, "Enable PCI DAC. Unsafe on 32 bit PCI slot."); + +module_param(timer_count, int, 0); +MODULE_PARM_DESC(timer_count, "Timer Interrupt Interval."); + +module_param(eee_enable, int, 0); +MODULE_PARM_DESC(eee_enable, "Enable Energy Efficient Ethernet."); + +module_param(hwoptimize, ulong, 0); +MODULE_PARM_DESC(hwoptimize, "Enable HW optimization function."); + +module_param(s0_magic_packet, int, 0); +MODULE_PARM_DESC(s0_magic_packet, "Enable S0 Magic Packet."); + +module_param(tx_no_close_enable, int, 0); +MODULE_PARM_DESC(tx_no_close_enable, "Enable TX No Close."); + +module_param(enable_ptp_master_mode, int, 0); +MODULE_PARM_DESC(enable_ptp_master_mode, "Enable PTP Master Mode."); + +module_param(disable_wol_support, int, 0); +MODULE_PARM_DESC(disable_wol_support, "Disable PM support."); + +module_param(enable_double_vlan, int, 0); +MODULE_PARM_DESC(enable_double_vlan, "Enable Double VLAN."); + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) +module_param_named(debug, debug.msg_enable, int, 0); +MODULE_PARM_DESC(debug, "Debug verbosity level (0=none, ..., 16=all)"); +#endif//LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + +MODULE_LICENSE("GPL"); +#ifdef ENABLE_USE_FIRMWARE_FILE +MODULE_FIRMWARE(FIRMWARE_8126A_2); +MODULE_FIRMWARE(FIRMWARE_8126A_3); +#endif + +MODULE_VERSION(RTL8126_VERSION); + +/* +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0) +static void rtl8126_esd_timer(unsigned long __opaque); +#else +static void rtl8126_esd_timer(struct timer_list *t); +#endif +*/ +/* +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0) +static void rtl8126_link_timer(unsigned long __opaque); +#else +static void rtl8126_link_timer(struct timer_list *t); +#endif +*/ + +static netdev_tx_t rtl8126_start_xmit(struct sk_buff *skb, struct net_device *dev); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) +static irqreturn_t rtl8126_interrupt(int irq, void *dev_instance, struct pt_regs *regs); +#else +static irqreturn_t rtl8126_interrupt(int irq, void *dev_instance); +#endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) +static irqreturn_t rtl8126_interrupt_msix(int irq, void *dev_instance, struct pt_regs *regs); +#else +static irqreturn_t rtl8126_interrupt_msix(int irq, void *dev_instance); +#endif +static void rtl8126_set_rx_mode(struct net_device *dev); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) +static void rtl8126_tx_timeout(struct net_device *dev, unsigned int txqueue); +#else +static void rtl8126_tx_timeout(struct net_device *dev); +#endif +static int rtl8126_rx_interrupt(struct net_device *, struct rtl8126_private *, struct rtl8126_rx_ring *, napi_budget); +static int rtl8126_tx_interrupt(struct rtl8126_tx_ring *ring, int budget); +static int rtl8126_tx_interrupt_with_vector(struct rtl8126_private *tp, const int message_id, int budget); +static void rtl8126_wait_for_quiescence(struct net_device *dev); +static int rtl8126_change_mtu(struct net_device *dev, int new_mtu); +static void rtl8126_down(struct net_device *dev); + +static int rtl8126_set_mac_address(struct net_device *dev, void *p); +static void rtl8126_rar_set(struct rtl8126_private *tp, const u8 *addr); +static void rtl8126_desc_addr_fill(struct rtl8126_private *); +static void rtl8126_tx_desc_init(struct rtl8126_private *tp); +static void rtl8126_rx_desc_init(struct rtl8126_private *tp); + +static void rtl8126_mdio_direct_write_phy_ocp(struct rtl8126_private *tp, u16 RegAddr,u16 value); +static u32 rtl8126_mdio_direct_read_phy_ocp(struct rtl8126_private *tp, u16 RegAddr); +static void rtl8126_clear_and_set_eth_phy_ocp_bit(struct rtl8126_private *tp, u16 addr, u16 clearmask, u16 setmask); +static void rtl8126_clear_eth_phy_ocp_bit(struct rtl8126_private *tp, u16 addr, u16 mask); +static void rtl8126_set_eth_phy_ocp_bit(struct rtl8126_private *tp, u16 addr, u16 mask); +static u16 rtl8126_get_hw_phy_mcu_code_ver(struct rtl8126_private *tp); +static void rtl8126_phy_power_up(struct net_device *dev); +static void rtl8126_phy_power_down(struct net_device *dev); +static int rtl8126_set_speed(struct net_device *dev, u8 autoneg, u32 speed, u8 duplex, u64 adv); +static bool rtl8126_set_phy_mcu_patch_request(struct rtl8126_private *tp); +static bool rtl8126_clear_phy_mcu_patch_request(struct rtl8126_private *tp); + +#ifdef CONFIG_R8126_NAPI +static int rtl8126_poll(napi_ptr napi, napi_budget budget); +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) +static void rtl8126_reset_task(void *_data); +static void rtl8126_esd_task(void *_data); +static void rtl8126_linkchg_task(void *_data); +#else +static void rtl8126_reset_task(struct work_struct *work); +static void rtl8126_esd_task(struct work_struct *work); +static void rtl8126_linkchg_task(struct work_struct *work); +#endif +static void rtl8126_schedule_reset_work(struct rtl8126_private *tp); +static void rtl8126_schedule_esd_work(struct rtl8126_private *tp); +static void rtl8126_schedule_linkchg_work(struct rtl8126_private *tp); +static void rtl8126_init_all_schedule_work(struct rtl8126_private *tp); +static void rtl8126_cancel_all_schedule_work(struct rtl8126_private *tp); + +static inline struct device *tp_to_dev(struct rtl8126_private *tp) +{ + return &tp->pci_dev->dev; +} + +#if ((LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) && \ + LINUX_VERSION_CODE >= KERNEL_VERSION(4,6,00))) +void ethtool_convert_legacy_u32_to_link_mode(unsigned long *dst, + u32 legacy_u32) +{ + bitmap_zero(dst, __ETHTOOL_LINK_MODE_MASK_NBITS); + dst[0] = legacy_u32; +} + +bool ethtool_convert_link_mode_to_legacy_u32(u32 *legacy_u32, + const unsigned long *src) +{ + bool retval = true; + + /* TODO: following test will soon always be true */ + if (__ETHTOOL_LINK_MODE_MASK_NBITS > 32) { + __ETHTOOL_DECLARE_LINK_MODE_MASK(ext); + + bitmap_zero(ext, __ETHTOOL_LINK_MODE_MASK_NBITS); + bitmap_fill(ext, 32); + bitmap_complement(ext, ext, __ETHTOOL_LINK_MODE_MASK_NBITS); + if (bitmap_intersects(ext, src, + __ETHTOOL_LINK_MODE_MASK_NBITS)) { + /* src mask goes beyond bit 31 */ + retval = false; + } + } + *legacy_u32 = src[0]; + return retval; +} +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) + +#ifndef LPA_1000FULL +#define LPA_1000FULL 0x0800 +#endif + +#ifndef LPA_1000HALF +#define LPA_1000HALF 0x0400 +#endif + +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,4,0) +static inline void eth_hw_addr_random(struct net_device *dev) +{ + random_ether_addr(dev->dev_addr); +} +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) +#undef ethtool_ops +#define ethtool_ops _kc_ethtool_ops + +struct _kc_ethtool_ops { + int (*get_settings)(struct net_device *, struct ethtool_cmd *); + int (*set_settings)(struct net_device *, struct ethtool_cmd *); + void (*get_drvinfo)(struct net_device *, struct ethtool_drvinfo *); + int (*get_regs_len)(struct net_device *); + void (*get_regs)(struct net_device *, struct ethtool_regs *, void *); + void (*get_wol)(struct net_device *, struct ethtool_wolinfo *); + int (*set_wol)(struct net_device *, struct ethtool_wolinfo *); + u32 (*get_msglevel)(struct net_device *); + void (*set_msglevel)(struct net_device *, u32); + int (*nway_reset)(struct net_device *); + u32 (*get_link)(struct net_device *); + int (*get_eeprom_len)(struct net_device *); + int (*get_eeprom)(struct net_device *, struct ethtool_eeprom *, u8 *); + int (*set_eeprom)(struct net_device *, struct ethtool_eeprom *, u8 *); + int (*get_coalesce)(struct net_device *, struct ethtool_coalesce *); + int (*set_coalesce)(struct net_device *, struct ethtool_coalesce *); + void (*get_ringparam)(struct net_device *, struct ethtool_ringparam *); + int (*set_ringparam)(struct net_device *, struct ethtool_ringparam *); + void (*get_pauseparam)(struct net_device *, + struct ethtool_pauseparam*); + int (*set_pauseparam)(struct net_device *, + struct ethtool_pauseparam*); + u32 (*get_rx_csum)(struct net_device *); + int (*set_rx_csum)(struct net_device *, u32); + u32 (*get_tx_csum)(struct net_device *); + int (*set_tx_csum)(struct net_device *, u32); + u32 (*get_sg)(struct net_device *); + int (*set_sg)(struct net_device *, u32); + u32 (*get_tso)(struct net_device *); + int (*set_tso)(struct net_device *, u32); + int (*self_test_count)(struct net_device *); + void (*self_test)(struct net_device *, struct ethtool_test *, u64 *); + void (*get_strings)(struct net_device *, u32 stringset, u8 *); + int (*phys_id)(struct net_device *, u32); + int (*get_stats_count)(struct net_device *); + void (*get_ethtool_stats)(struct net_device *, struct ethtool_stats *, + u64 *); +} *ethtool_ops = NULL; + +#undef SET_ETHTOOL_OPS +#define SET_ETHTOOL_OPS(netdev, ops) (ethtool_ops = (ops)) + +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,16,0) +#ifndef SET_ETHTOOL_OPS +#define SET_ETHTOOL_OPS(netdev,ops) \ + ( (netdev)->ethtool_ops = (ops) ) +#endif //SET_ETHTOOL_OPS +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,16,0) + +//#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) +#ifndef netif_msg_init +#define netif_msg_init _kc_netif_msg_init +/* copied from linux kernel 2.6.20 include/linux/netdevice.h */ +static inline u32 netif_msg_init(int debug_value, int default_msg_enable_bits) +{ + /* use default */ + if (debug_value < 0 || debug_value >= (sizeof(u32) * 8)) + return default_msg_enable_bits; + if (debug_value == 0) /* no output */ + return 0; + /* set low N bits */ + return (1 << debug_value) - 1; +} + +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,5) + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22) +static inline void eth_copy_and_sum (struct sk_buff *dest, + const unsigned char *src, + int len, int base) +{ + skb_copy_to_linear_data(dest, src, len); +} +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,22) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7) +/* copied from linux kernel 2.6.20 /include/linux/time.h */ +/* Parameters used to convert the timespec values: */ +#define MSEC_PER_SEC 1000L + +/* copied from linux kernel 2.6.20 /include/linux/jiffies.h */ +/* + * Change timeval to jiffies, trying to avoid the + * most obvious overflows.. + * + * And some not so obvious. + * + * Note that we don't want to return MAX_LONG, because + * for various timeout reasons we often end up having + * to wait "jiffies+1" in order to guarantee that we wait + * at _least_ "jiffies" - so "jiffies+1" had better still + * be positive. + */ +#define MAX_JIFFY_OFFSET ((~0UL >> 1)-1) + +/* + * Convert jiffies to milliseconds and back. + * + * Avoid unnecessary multiplications/divisions in the + * two most common HZ cases: + */ +static inline unsigned int _kc_jiffies_to_msecs(const unsigned long j) +{ +#if HZ <= MSEC_PER_SEC && !(MSEC_PER_SEC % HZ) + return (MSEC_PER_SEC / HZ) * j; +#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC) + return (j + (HZ / MSEC_PER_SEC) - 1)/(HZ / MSEC_PER_SEC); +#else + return (j * MSEC_PER_SEC) / HZ; +#endif +} + +static inline unsigned long _kc_msecs_to_jiffies(const unsigned int m) +{ + if (m > _kc_jiffies_to_msecs(MAX_JIFFY_OFFSET)) + return MAX_JIFFY_OFFSET; +#if HZ <= MSEC_PER_SEC && !(MSEC_PER_SEC % HZ) + return (m + (MSEC_PER_SEC / HZ) - 1) / (MSEC_PER_SEC / HZ); +#elif HZ > MSEC_PER_SEC && !(HZ % MSEC_PER_SEC) + return m * (HZ / MSEC_PER_SEC); +#else + return (m * HZ + MSEC_PER_SEC - 1) / MSEC_PER_SEC; +#endif +} +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7) + + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) + +/* copied from linux kernel 2.6.12.6 /include/linux/pm.h */ +typedef int __bitwise pci_power_t; + +/* copied from linux kernel 2.6.12.6 /include/linux/pci.h */ +typedef u32 __bitwise pm_message_t; + +#define PCI_D0 ((pci_power_t __force) 0) +#define PCI_D1 ((pci_power_t __force) 1) +#define PCI_D2 ((pci_power_t __force) 2) +#define PCI_D3hot ((pci_power_t __force) 3) +#define PCI_D3cold ((pci_power_t __force) 4) +#define PCI_POWER_ERROR ((pci_power_t __force) -1) + +/* copied from linux kernel 2.6.12.6 /drivers/pci/pci.c */ +/** + * pci_choose_state - Choose the power state of a PCI device + * @dev: PCI device to be suspended + * @state: target sleep state for the whole system. This is the value + * that is passed to suspend() function. + * + * Returns PCI power state suitable for given device and given system + * message. + */ + +pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state) +{ + if (!pci_find_capability(dev, PCI_CAP_ID_PM)) + return PCI_D0; + + switch (state) { + case 0: + return PCI_D0; + case 3: + return PCI_D3hot; + default: + printk("They asked me for state %d\n", state); +// BUG(); + } + return PCI_D0; +} +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9) +/** + * msleep_interruptible - sleep waiting for waitqueue interruptions + * @msecs: Time in milliseconds to sleep for + */ +#define msleep_interruptible _kc_msleep_interruptible +unsigned long _kc_msleep_interruptible(unsigned int msecs) +{ + unsigned long timeout = _kc_msecs_to_jiffies(msecs); + + while (timeout && !signal_pending(current)) { + set_current_state(TASK_INTERRUPTIBLE); + timeout = schedule_timeout(timeout); + } + return _kc_jiffies_to_msecs(timeout); +} +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,9) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7) +/* copied from linux kernel 2.6.20 include/linux/sched.h */ +#ifndef __sched +#define __sched __attribute__((__section__(".sched.text"))) +#endif + +/* copied from linux kernel 2.6.20 kernel/timer.c */ +signed long __sched schedule_timeout_uninterruptible(signed long timeout) +{ + __set_current_state(TASK_UNINTERRUPTIBLE); + return schedule_timeout(timeout); +} + +/* copied from linux kernel 2.6.20 include/linux/mii.h */ +#undef if_mii +#define if_mii _kc_if_mii +static inline struct mii_ioctl_data *if_mii(struct ifreq *rq) +{ + return (struct mii_ioctl_data *) &rq->ifr_ifru; +} +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,7) + +static u32 rtl8126_read_thermal_sensor(struct rtl8126_private *tp) +{ + u16 ts_digout; + + switch (tp->mcfg) { + default: + ts_digout = 0xffff; + break; + } + + return ts_digout; +} + +int rtl8126_dump_tally_counter(struct rtl8126_private *tp, dma_addr_t paddr) +{ + u32 cmd; + u32 WaitCnt; + int retval = -1; + + RTL_W32(tp, CounterAddrHigh, (u64)paddr >> 32); + cmd = (u64)paddr & DMA_BIT_MASK(32); + RTL_W32(tp, CounterAddrLow, cmd); + RTL_W32(tp, CounterAddrLow, cmd | CounterDump); + + WaitCnt = 0; + while (RTL_R32(tp, CounterAddrLow) & CounterDump) { + udelay(10); + + WaitCnt++; + if (WaitCnt > 20) + break; + } + + if (WaitCnt <= 20) + retval = 0; + + return retval; +} + +static u32 +rtl8126_get_hw_clo_ptr(struct rtl8126_tx_ring *ring) +{ + struct rtl8126_private *tp = ring->priv; + + switch (tp->HwSuppTxNoCloseVer) { + case 3: + return RTL_R16(tp, ring->hw_clo_ptr_reg); + case 4: + case 5: + case 6: + return RTL_R32(tp, ring->hw_clo_ptr_reg); + default: +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + WARN_ON(1); +#endif + return 0; + } +} + +static u32 +rtl8126_get_sw_tail_ptr(struct rtl8126_tx_ring *ring) +{ + struct rtl8126_private *tp = ring->priv; + + switch (tp->HwSuppTxNoCloseVer) { + case 3: + return RTL_R16(tp, ring->sw_tail_ptr_reg); + case 4: + case 5: + case 6: + return RTL_R32(tp, ring->sw_tail_ptr_reg); + default: +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + WARN_ON(1); +#endif + return 0; + } +} + +static bool +rtl8126_sysfs_testmode_on(struct rtl8126_private *tp) +{ +#ifdef ENABLE_R8126_SYSFS + return !!tp->testmode; +#else + return 1; +#endif +} + +static u32 rtl8126_convert_link_speed(u16 status) +{ + u32 speed = SPEED_UNKNOWN; + + if (status & LinkStatus) { + if (status & _5000bpsF) + speed = SPEED_5000; + else if (status & _2500bpsF) + speed = SPEED_2500; + else if (status & _1000bpsF) + speed = SPEED_1000; + else if (status & _100bps) + speed = SPEED_100; + else if (status & _10bps) + speed = SPEED_10; + } + + return speed; +} + +static void rtl8126_mdi_swap(struct rtl8126_private *tp) +{ + int i; + u16 reg, val, mdi_reverse; + u16 tps_p0, tps_p1, tps_p2, tps_p3, tps_p3_p0; + + switch (tp->mcfg) { + default: + return; + }; + + tps_p3_p0 = rtl8126_mac_ocp_read(tp, 0xD440) & 0xF000; + tps_p3 = !!(tps_p3_p0 & BIT_15); + tps_p2 = !!(tps_p3_p0 & BIT_14); + tps_p1 = !!(tps_p3_p0 & BIT_13); + tps_p0 = !!(tps_p3_p0 & BIT_12); + mdi_reverse = rtl8126_mac_ocp_read(tp, 0xD442); + + if ((mdi_reverse & BIT_5) && tps_p3_p0 == 0xA000) + return; + + if (!(mdi_reverse & BIT_5)) + val = tps_p0 << 8 | + tps_p1 << 9 | + tps_p2 << 10 | + tps_p3 << 11; + else + val = tps_p3 << 8 | + tps_p2 << 9 | + tps_p1 << 10 | + tps_p0 << 11; + + for (i=8; i<12; i++) { + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, reg); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xA438, + BIT(i), + val & BIT(i)); + } +} + +static int rtl8126_vcd_test(struct rtl8126_private *tp) +{ + u16 val; + u32 wait_cnt; + int ret = -1; + + rtl8126_mdi_swap(tp); + + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA422, BIT(0)); + rtl8126_set_eth_phy_ocp_bit(tp, 0xA422, 0x00F0); + rtl8126_set_eth_phy_ocp_bit(tp, 0xA422, BIT(0)); + + wait_cnt = 0; + do { + mdelay(1); + val = rtl8126_mdio_direct_read_phy_ocp(tp, 0xA422); + wait_cnt++; + } while (!(val & BIT_15) && (wait_cnt < 5000)); + + if (wait_cnt == 5000) + goto exit; + + ret = 0; + +exit: + return ret; +} + +static void rtl8126_get_cp_len(struct rtl8126_private *tp, + int cp_len[RTL8126_CP_NUM]) +{ + int i; + u16 status; + int tmp_cp_len; + + status = RTL_R16(tp, PHYstatus); + if (status & LinkStatus) { + if (status & _10bps) { + tmp_cp_len = -1; + } else if (status & (_100bps | _1000bpsF)) { + rtl8126_mdio_write(tp, 0x1f, 0x0a88); + tmp_cp_len = rtl8126_mdio_read(tp, 0x10); + } else if (status & _2500bpsF) { + switch (tp->mcfg) { + default: + rtl8126_mdio_write(tp, 0x1f, 0x0acb); + tmp_cp_len = rtl8126_mdio_read(tp, 0x15); + tmp_cp_len >>= 2; + break; + } + } else + tmp_cp_len = 0; + } else + tmp_cp_len = 0; + + if (tmp_cp_len > 0) + tmp_cp_len &= 0xff; + for (i=0; i RTL8126_MAX_SUPPORT_CP_LEN) + cp_len[i] = RTL8126_MAX_SUPPORT_CP_LEN; + + return; +} + +static int __rtl8126_get_cp_status(u16 val) +{ + switch (val) { + case 0x0060: + return rtl8126_cp_normal; + case 0x0048: + return rtl8126_cp_open; + case 0x0050: + return rtl8126_cp_short; + case 0x0042: + case 0x0044: + return rtl8126_cp_mismatch; + default: + return rtl8126_cp_normal; + } +} + +static int _rtl8126_get_cp_status(struct rtl8126_private *tp, u8 pair_num) +{ + u16 val; + int cp_status = rtl8126_cp_unknown; + + if (pair_num > 3) + goto exit; + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x8027 + 4 * pair_num); + val = rtl8126_mdio_direct_read_phy_ocp(tp, 0xA438); + + cp_status = __rtl8126_get_cp_status(val); + +exit: + return cp_status; +} + +static const char * rtl8126_get_cp_status_string(int cp_status) +{ + switch(cp_status) { + case rtl8126_cp_normal: + return "normal "; + case rtl8126_cp_short: + return "short "; + case rtl8126_cp_open: + return "open "; + case rtl8126_cp_mismatch: + return "mismatch"; + default: + return "unknown "; + } +} + +static u16 rtl8126_get_cp_pp(struct rtl8126_private *tp, u8 pair_num) +{ + u16 pp = 0; + + if (pair_num > 3) + goto exit; + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x8029 + 4 * pair_num); + pp = rtl8126_mdio_direct_read_phy_ocp(tp, 0xA438); + + pp &= 0x3fff; + pp /= 80; + +exit: + return pp; +} + +static void rtl8126_get_cp_status(struct rtl8126_private *tp, + int cp_status[RTL8126_CP_NUM], + bool poe_mode) +{ + u16 status; + int i; + + status = RTL_R16(tp, PHYstatus); + if (status & LinkStatus && !(status & (_10bps | _100bps))) { + for (i=0; i= KERNEL_VERSION(3,10,0) +static int proc_get_driver_variable(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + struct rtl8126_private *tp = netdev_priv(dev); + + seq_puts(m, "\nDump Driver Variable\n"); + + rtnl_lock(); + + seq_puts(m, "Variable\tValue\n----------\t-----\n"); + seq_printf(m, "MODULENAME\t%s\n", MODULENAME); + seq_printf(m, "driver version\t%s\n", RTL8126_VERSION); + seq_printf(m, "mcfg\t%d\n", tp->mcfg); + seq_printf(m, "chipset\t%d\n", tp->chipset); + seq_printf(m, "chipset_name\t%s\n", rtl_chip_info[tp->chipset].name); + seq_printf(m, "mtu\t%d\n", dev->mtu); + seq_printf(m, "NUM_RX_DESC\t0x%x\n", tp->rx_ring[0].num_rx_desc); + seq_printf(m, "cur_rx0\t0x%x\n", tp->rx_ring[0].cur_rx); + seq_printf(m, "dirty_rx0\t0x%x\n", tp->rx_ring[0].dirty_rx); + seq_printf(m, "cur_rx1\t0x%x\n", tp->rx_ring[1].cur_rx); + seq_printf(m, "dirty_rx1\t0x%x\n", tp->rx_ring[1].dirty_rx); + seq_printf(m, "cur_rx2\t0x%x\n", tp->rx_ring[2].cur_rx); + seq_printf(m, "dirty_rx2\t0x%x\n", tp->rx_ring[2].dirty_rx); + seq_printf(m, "cur_rx3\t0x%x\n", tp->rx_ring[3].cur_rx); + seq_printf(m, "dirty_rx3\t0x%x\n", tp->rx_ring[3].dirty_rx); + seq_printf(m, "NUM_TX_DESC\t0x%x\n", tp->tx_ring[0].num_tx_desc); + seq_printf(m, "cur_tx0\t0x%x\n", tp->tx_ring[0].cur_tx); + seq_printf(m, "dirty_tx0\t0x%x\n", tp->tx_ring[0].dirty_tx); + seq_printf(m, "cur_tx1\t0x%x\n", tp->tx_ring[1].cur_tx); + seq_printf(m, "dirty_tx1\t0x%x\n", tp->tx_ring[1].dirty_tx); + seq_printf(m, "rx_buf_sz\t0x%x\n", tp->rx_buf_sz); +#ifdef ENABLE_PAGE_REUSE + seq_printf(m, "rx_buf_page_order\t0x%x\n", tp->rx_buf_page_order); + seq_printf(m, "rx_buf_page_size\t0x%x\n", tp->rx_buf_page_size); + seq_printf(m, "page_reuse_fail_cnt\t0x%x\n", tp->page_reuse_fail_cnt); +#endif //ENABLE_PAGE_REUSE + seq_printf(m, "esd_flag\t0x%x\n", tp->esd_flag); + seq_printf(m, "pci_cfg_is_read\t0x%x\n", tp->pci_cfg_is_read); + seq_printf(m, "rtl8126_rx_config\t0x%x\n", tp->rtl8126_rx_config); + seq_printf(m, "cp_cmd\t0x%x\n", tp->cp_cmd); + seq_printf(m, "intr_mask\t0x%x\n", tp->intr_mask); + seq_printf(m, "timer_intr_mask\t0x%x\n", tp->timer_intr_mask); + seq_printf(m, "wol_enabled\t0x%x\n", tp->wol_enabled); + seq_printf(m, "wol_opts\t0x%x\n", tp->wol_opts); + seq_printf(m, "efuse_ver\t0x%x\n", tp->efuse_ver); + seq_printf(m, "eeprom_type\t0x%x\n", tp->eeprom_type); + seq_printf(m, "autoneg\t0x%x\n", tp->autoneg); + seq_printf(m, "duplex\t0x%x\n", tp->duplex); + seq_printf(m, "speed\t%d\n", tp->speed); + seq_printf(m, "advertising\t0x%llx\n", tp->advertising); + seq_printf(m, "eeprom_len\t0x%x\n", tp->eeprom_len); + seq_printf(m, "cur_page\t0x%x\n", tp->cur_page); + seq_printf(m, "features\t0x%x\n", tp->features); + seq_printf(m, "org_pci_offset_99\t0x%x\n", tp->org_pci_offset_99); + seq_printf(m, "org_pci_offset_180\t0x%x\n", tp->org_pci_offset_180); + seq_printf(m, "issue_offset_99_event\t0x%x\n", tp->issue_offset_99_event); + seq_printf(m, "org_pci_offset_80\t0x%x\n", tp->org_pci_offset_80); + seq_printf(m, "org_pci_offset_81\t0x%x\n", tp->org_pci_offset_81); + seq_printf(m, "use_timer_interrupt\t0x%x\n", tp->use_timer_interrupt); + seq_printf(m, "HwIcVerUnknown\t0x%x\n", tp->HwIcVerUnknown); + seq_printf(m, "NotWrRamCodeToMicroP\t0x%x\n", tp->NotWrRamCodeToMicroP); + seq_printf(m, "NotWrMcuPatchCode\t0x%x\n", tp->NotWrMcuPatchCode); + seq_printf(m, "HwHasWrRamCodeToMicroP\t0x%x\n", tp->HwHasWrRamCodeToMicroP); + seq_printf(m, "sw_ram_code_ver\t0x%x\n", tp->sw_ram_code_ver); + seq_printf(m, "hw_ram_code_ver\t0x%x\n", tp->hw_ram_code_ver); + seq_printf(m, "rtk_enable_diag\t0x%x\n", tp->rtk_enable_diag); + seq_printf(m, "ShortPacketSwChecksum\t0x%x\n", tp->ShortPacketSwChecksum); + seq_printf(m, "UseSwPaddingShortPkt\t0x%x\n", tp->UseSwPaddingShortPkt); + seq_printf(m, "RequireAdcBiasPatch\t0x%x\n", tp->RequireAdcBiasPatch); + seq_printf(m, "AdcBiasPatchIoffset\t0x%x\n", tp->AdcBiasPatchIoffset); + seq_printf(m, "RequireAdjustUpsTxLinkPulseTiming\t0x%x\n", tp->RequireAdjustUpsTxLinkPulseTiming); + seq_printf(m, "SwrCnt1msIni\t0x%x\n", tp->SwrCnt1msIni); + seq_printf(m, "HwSuppNowIsOobVer\t0x%x\n", tp->HwSuppNowIsOobVer); + seq_printf(m, "HwFiberModeVer\t0x%x\n", tp->HwFiberModeVer); + seq_printf(m, "HwFiberStat\t0x%x\n", tp->HwFiberStat); + seq_printf(m, "HwSwitchMdiToFiber\t0x%x\n", tp->HwSwitchMdiToFiber); + seq_printf(m, "NicCustLedValue\t0x%x\n", tp->NicCustLedValue); + seq_printf(m, "RequiredSecLanDonglePatch\t0x%x\n", tp->RequiredSecLanDonglePatch); + seq_printf(m, "HwSuppDashVer\t0x%x\n", tp->HwSuppDashVer); + seq_printf(m, "DASH\t0x%x\n", tp->DASH); + seq_printf(m, "dash_printer_enabled\t0x%x\n", tp->dash_printer_enabled); + seq_printf(m, "HwSuppKCPOffloadVer\t0x%x\n", tp->HwSuppKCPOffloadVer); + seq_printf(m, "speed_mode\t0x%x\n", speed_mode); + seq_printf(m, "duplex_mode\t0x%x\n", duplex_mode); + seq_printf(m, "autoneg_mode\t0x%x\n", autoneg_mode); + seq_printf(m, "aspm\t0x%x\n", aspm); + seq_printf(m, "s5wol\t0x%x\n", s5wol); + seq_printf(m, "s5_keep_curr_mac\t0x%x\n", s5_keep_curr_mac); + seq_printf(m, "eee_enable\t0x%x\n", tp->eee.eee_enabled); + seq_printf(m, "hwoptimize\t0x%lx\n", hwoptimize); + seq_printf(m, "proc_init_num\t0x%x\n", proc_init_num); + seq_printf(m, "s0_magic_packet\t0x%x\n", s0_magic_packet); + seq_printf(m, "disable_wol_support\t0x%x\n", disable_wol_support); + seq_printf(m, "enable_double_vlan\t0x%x\n", enable_double_vlan); + seq_printf(m, "HwSuppMagicPktVer\t0x%x\n", tp->HwSuppMagicPktVer); + seq_printf(m, "HwSuppLinkChgWakeUpVer\t0x%x\n", tp->HwSuppLinkChgWakeUpVer); + seq_printf(m, "HwSuppD0SpeedUpVer\t0x%x\n", tp->HwSuppD0SpeedUpVer); + seq_printf(m, "D0SpeedUpSpeed\t0x%x\n", tp->D0SpeedUpSpeed); + seq_printf(m, "HwSuppCheckPhyDisableModeVer\t0x%x\n", tp->HwSuppCheckPhyDisableModeVer); + seq_printf(m, "HwPkgDet\t0x%x\n", tp->HwPkgDet); + seq_printf(m, "HwSuppTxNoCloseVer\t0x%x\n", tp->HwSuppTxNoCloseVer); + seq_printf(m, "EnableTxNoClose\t0x%x\n", tp->EnableTxNoClose); + seq_printf(m, "NextHwDesCloPtr0\t0x%x\n", tp->tx_ring[0].NextHwDesCloPtr); + seq_printf(m, "BeginHwDesCloPtr0\t0x%x\n", tp->tx_ring[0].BeginHwDesCloPtr); + seq_printf(m, "hw_clo_ptr_reg0\t0x%x\n", rtl8126_get_hw_clo_ptr(&tp->tx_ring[0])); + seq_printf(m, "sw_tail_ptr_reg0\t0x%x\n", rtl8126_get_sw_tail_ptr(&tp->tx_ring[0])); + seq_printf(m, "NextHwDesCloPtr1\t0x%x\n", tp->tx_ring[1].NextHwDesCloPtr); + seq_printf(m, "BeginHwDesCloPtr1\t0x%x\n", tp->tx_ring[1].BeginHwDesCloPtr); + seq_printf(m, "hw_clo_ptr_reg1\t0x%x\n", rtl8126_get_hw_clo_ptr(&tp->tx_ring[1])); + seq_printf(m, "sw_tail_ptr_reg1\t0x%x\n", rtl8126_get_sw_tail_ptr(&tp->tx_ring[1])); + seq_printf(m, "InitRxDescType\t0x%x\n", tp->InitRxDescType); + seq_printf(m, "RxDescLength\t0x%x\n", tp->RxDescLength); + seq_printf(m, "num_rx_rings\t0x%x\n", tp->num_rx_rings); + seq_printf(m, "num_tx_rings\t0x%x\n", tp->num_tx_rings); + seq_printf(m, "tot_rx_rings\t0x%x\n", rtl8126_tot_rx_rings(tp)); + seq_printf(m, "tot_tx_rings\t0x%x\n", rtl8126_tot_tx_rings(tp)); + seq_printf(m, "HwSuppNumRxQueues\t0x%x\n", tp->HwSuppNumRxQueues); + seq_printf(m, "HwSuppNumTxQueues\t0x%x\n", tp->HwSuppNumTxQueues); + seq_printf(m, "EnableRss\t0x%x\n", tp->EnableRss); + seq_printf(m, "EnablePtp\t0x%x\n", tp->EnablePtp); + seq_printf(m, "ptp_master_mode\t0x%x\n", tp->ptp_master_mode); + seq_printf(m, "min_irq_nvecs\t0x%x\n", tp->min_irq_nvecs); + seq_printf(m, "irq_nvecs\t0x%x\n", tp->irq_nvecs); + seq_printf(m, "hw_supp_irq_nvecs\t0x%x\n", tp->hw_supp_irq_nvecs); + seq_printf(m, "ring_lib_enabled\t0x%x\n", tp->ring_lib_enabled); + seq_printf(m, "HwSuppIsrVer\t0x%x\n", tp->HwSuppIsrVer); + seq_printf(m, "HwCurrIsrVer\t0x%x\n", tp->HwCurrIsrVer); +#ifdef ENABLE_PTP_SUPPORT + seq_printf(m, "tx_hwtstamp_timeouts\t0x%x\n", tp->tx_hwtstamp_timeouts); + seq_printf(m, "tx_hwtstamp_skipped\t0x%x\n", tp->tx_hwtstamp_skipped); +#endif + seq_printf(m, "random_mac\t0x%x\n", tp->random_mac); + seq_printf(m, "org_mac_addr\t%pM\n", tp->org_mac_addr); +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13) + seq_printf(m, "perm_addr\t%pM\n", dev->perm_addr); +#endif + seq_printf(m, "dev_addr\t%pM\n", dev->dev_addr); + + rtnl_unlock(); + + seq_putc(m, '\n'); + return 0; +} + +static int proc_get_tally_counter(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + struct rtl8126_private *tp = netdev_priv(dev); + struct rtl8126_counters *counters; + dma_addr_t paddr; + + seq_puts(m, "\nDump Tally Counter\n"); + + rtnl_lock(); + + counters = tp->tally_vaddr; + paddr = tp->tally_paddr; + if (!counters) { + seq_puts(m, "\nDump Tally Counter Fail\n"); + goto out_unlock; + } + + rtl8126_dump_tally_counter(tp, paddr); + + seq_puts(m, "Statistics\tValue\n----------\t-----\n"); + seq_printf(m, "tx_packets\t%lld\n", le64_to_cpu(counters->tx_packets)); + seq_printf(m, "rx_packets\t%lld\n", le64_to_cpu(counters->rx_packets)); + seq_printf(m, "tx_errors\t%lld\n", le64_to_cpu(counters->tx_errors)); + seq_printf(m, "rx_errors\t%d\n", le32_to_cpu(counters->rx_errors)); + seq_printf(m, "rx_missed\t%d\n", le16_to_cpu(counters->rx_missed)); + seq_printf(m, "align_errors\t%d\n", le16_to_cpu(counters->align_errors)); + seq_printf(m, "tx_one_collision\t%d\n", le32_to_cpu(counters->tx_one_collision)); + seq_printf(m, "tx_multi_collision\t%d\n", le32_to_cpu(counters->tx_multi_collision)); + seq_printf(m, "rx_unicast\t%lld\n", le64_to_cpu(counters->rx_unicast)); + seq_printf(m, "rx_broadcast\t%lld\n", le64_to_cpu(counters->rx_broadcast)); + seq_printf(m, "rx_multicast\t%d\n", le32_to_cpu(counters->rx_multicast)); + seq_printf(m, "tx_aborted\t%d\n", le16_to_cpu(counters->tx_aborted)); + seq_printf(m, "tx_underrun\t%d\n", le16_to_cpu(counters->tx_underrun)); + + seq_printf(m, "tx_octets\t%lld\n", le64_to_cpu(counters->tx_octets)); + seq_printf(m, "rx_octets\t%lld\n", le64_to_cpu(counters->rx_octets)); + seq_printf(m, "rx_multicast64\t%lld\n", le64_to_cpu(counters->rx_multicast64)); + seq_printf(m, "tx_unicast64\t%lld\n", le64_to_cpu(counters->tx_unicast64)); + seq_printf(m, "tx_broadcast64\t%lld\n", le64_to_cpu(counters->tx_broadcast64)); + seq_printf(m, "tx_multicast64\t%lld\n", le64_to_cpu(counters->tx_multicast64)); + seq_printf(m, "tx_pause_on\t%d\n", le32_to_cpu(counters->tx_pause_on)); + seq_printf(m, "tx_pause_off\t%d\n", le32_to_cpu(counters->tx_pause_off)); + seq_printf(m, "tx_pause_all\t%d\n", le32_to_cpu(counters->tx_pause_all)); + seq_printf(m, "tx_deferred\t%d\n", le32_to_cpu(counters->tx_deferred)); + seq_printf(m, "tx_late_collision\t%d\n", le32_to_cpu(counters->tx_late_collision)); + seq_printf(m, "tx_all_collision\t%d\n", le32_to_cpu(counters->tx_all_collision)); + seq_printf(m, "tx_aborted32\t%d\n", le32_to_cpu(counters->tx_aborted32)); + seq_printf(m, "align_errors32\t%d\n", le32_to_cpu(counters->align_errors32)); + seq_printf(m, "rx_frame_too_long\t%d\n", le32_to_cpu(counters->rx_frame_too_long)); + seq_printf(m, "rx_runt\t%d\n", le32_to_cpu(counters->rx_runt)); + seq_printf(m, "rx_pause_on\t%d\n", le32_to_cpu(counters->rx_pause_on)); + seq_printf(m, "rx_pause_off\t%d\n", le32_to_cpu(counters->rx_pause_off)); + seq_printf(m, "rx_pause_all\t%d\n", le32_to_cpu(counters->rx_pause_all)); + seq_printf(m, "rx_unknown_opcode\t%d\n", le32_to_cpu(counters->rx_unknown_opcode)); + seq_printf(m, "rx_mac_error\t%d\n", le32_to_cpu(counters->rx_mac_error)); + seq_printf(m, "tx_underrun32\t%d\n", le32_to_cpu(counters->tx_underrun32)); + seq_printf(m, "rx_mac_missed\t%d\n", le32_to_cpu(counters->rx_mac_missed)); + seq_printf(m, "rx_tcam_dropped\t%d\n", le32_to_cpu(counters->rx_tcam_dropped)); + seq_printf(m, "tdu\t%d\n", le32_to_cpu(counters->tdu)); + seq_printf(m, "rdu\t%d\n", le32_to_cpu(counters->rdu)); + + seq_putc(m, '\n'); + +out_unlock: + rtnl_unlock(); + + return 0; +} + +static int proc_get_registers(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + int i, n, max = R8126_MAC_REGS_SIZE; + u8 byte_rd; + struct rtl8126_private *tp = netdev_priv(dev); + void __iomem *ioaddr = tp->mmio_addr; + + seq_puts(m, "\nDump MAC Registers\n"); + seq_puts(m, "Offset\tValue\n------\t-----\n"); + + rtnl_lock(); + + for (n = 0; n < max;) { + seq_printf(m, "\n0x%04x:\t", n); + + for (i = 0; i < 16 && n < max; i++, n++) { + byte_rd = readb(ioaddr + n); + seq_printf(m, "%02x ", byte_rd); + } + } + + max = 0xB00; + for (n = 0xA00; n < max;) { + seq_printf(m, "\n0x%04x:\t", n); + + for (i = 0; i < 16 && n < max; i++, n++) { + byte_rd = readb(ioaddr + n); + seq_printf(m, "%02x ", byte_rd); + } + } + + max = 0xD40; + for (n = 0xD00; n < max;) { + seq_printf(m, "\n0x%04x:\t", n); + + for (i = 0; i < 16 && n < max; i++, n++) { + byte_rd = readb(ioaddr + n); + seq_printf(m, "%02x ", byte_rd); + } + } + + max = 0x2840; + for (n = 0x2800; n < max;) { + seq_printf(m, "\n0x%04x:\t", n); + + for (i = 0; i < 16 && n < max; i++, n++) { + byte_rd = readb(ioaddr + n); + seq_printf(m, "%02x ", byte_rd); + } + } + + rtnl_unlock(); + + seq_putc(m, '\n'); + return 0; +} + +static int proc_get_all_registers(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + int i, n, max; + u8 byte_rd; + struct rtl8126_private *tp = netdev_priv(dev); + void __iomem *ioaddr = tp->mmio_addr; + struct pci_dev *pdev = tp->pci_dev; + + seq_puts(m, "\nDump All MAC Registers\n"); + seq_puts(m, "Offset\tValue\n------\t-----\n"); + + rtnl_lock(); + + max = pci_resource_len(pdev, 2); + + for (n = 0; n < max;) { + seq_printf(m, "\n0x%04x:\t", n); + + for (i = 0; i < 16 && n < max; i++, n++) { + byte_rd = readb(ioaddr + n); + seq_printf(m, "%02x ", byte_rd); + } + } + + rtnl_unlock(); + + seq_printf(m, "\nTotal length:0x%X", max); + + seq_putc(m, '\n'); + return 0; +} + +static int proc_get_pcie_phy(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + int i, n, max = R8126_EPHY_REGS_SIZE/2; + u16 word_rd; + struct rtl8126_private *tp = netdev_priv(dev); + + seq_puts(m, "\nDump PCIE PHY\n"); + seq_puts(m, "\nOffset\tValue\n------\t-----\n "); + + rtnl_lock(); + + for (n = 0; n < max;) { + seq_printf(m, "\n0x%02x:\t", n); + + for (i = 0; i < 8 && n < max; i++, n++) { + word_rd = rtl8126_ephy_read(tp, n); + seq_printf(m, "%04x ", word_rd); + } + } + + rtnl_unlock(); + + seq_putc(m, '\n'); + return 0; +} + +static int proc_get_eth_phy(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + int i, n, max = R8126_PHY_REGS_SIZE/2; + u16 word_rd; + struct rtl8126_private *tp = netdev_priv(dev); + + seq_puts(m, "\nDump Ethernet PHY\n"); + seq_puts(m, "\nOffset\tValue\n------\t-----\n "); + + rtnl_lock(); + + seq_puts(m, "\n####################page 0##################\n "); + rtl8126_mdio_write(tp, 0x1f, 0x0000); + for (n = 0; n < max;) { + seq_printf(m, "\n0x%02x:\t", n); + + for (i = 0; i < 8 && n < max; i++, n++) { + word_rd = rtl8126_mdio_read(tp, n); + seq_printf(m, "%04x ", word_rd); + } + } + + seq_puts(m, "\n####################extra reg##################\n "); + n = 0xA400; + seq_printf(m, "\n0x%02x:\t", n); + for (i = 0; i < 8; i++, n+=2) { + word_rd = rtl8126_mdio_direct_read_phy_ocp(tp, n); + seq_printf(m, "%04x ", word_rd); + } + + n = 0xA410; + seq_printf(m, "\n0x%02x:\t", n); + for (i = 0; i < 3; i++, n+=2) { + word_rd = rtl8126_mdio_direct_read_phy_ocp(tp, n); + seq_printf(m, "%04x ", word_rd); + } + + n = 0xA434; + seq_printf(m, "\n0x%02x:\t", n); + word_rd = rtl8126_mdio_direct_read_phy_ocp(tp, n); + seq_printf(m, "%04x ", word_rd); + + n = 0xA5D0; + seq_printf(m, "\n0x%02x:\t", n); + for (i = 0; i < 4; i++, n+=2) { + word_rd = rtl8126_mdio_direct_read_phy_ocp(tp, n); + seq_printf(m, "%04x ", word_rd); + } + + n = 0xA61A; + seq_printf(m, "\n0x%02x:\t", n); + word_rd = rtl8126_mdio_direct_read_phy_ocp(tp, n); + seq_printf(m, "%04x ", word_rd); + + n = 0xA6D0; + seq_printf(m, "\n0x%02x:\t", n); + for (i = 0; i < 3; i++, n+=2) { + word_rd = rtl8126_mdio_direct_read_phy_ocp(tp, n); + seq_printf(m, "%04x ", word_rd); + } + + rtnl_unlock(); + + seq_putc(m, '\n'); + return 0; +} + +static int proc_get_extended_registers(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + int i, n, max = R8126_ERI_REGS_SIZE; + u32 dword_rd; + struct rtl8126_private *tp = netdev_priv(dev); + + seq_puts(m, "\nDump Extended Registers\n"); + seq_puts(m, "\nOffset\tValue\n------\t-----\n "); + + rtnl_lock(); + + for (n = 0; n < max;) { + seq_printf(m, "\n0x%02x:\t", n); + + for (i = 0; i < 4 && n < max; i++, n+=4) { + dword_rd = rtl8126_eri_read(tp, n, 4, ERIAR_ExGMAC); + seq_printf(m, "%08x ", dword_rd); + } + } + + rtnl_unlock(); + + seq_putc(m, '\n'); + return 0; +} + +static int proc_get_pci_registers(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + int i, n, max = R8126_PCI_REGS_SIZE; + u32 dword_rd; + struct rtl8126_private *tp = netdev_priv(dev); + + seq_puts(m, "\nDump PCI Registers\n"); + seq_puts(m, "\nOffset\tValue\n------\t-----\n "); + + rtnl_lock(); + + for (n = 0; n < max;) { + seq_printf(m, "\n0x%03x:\t", n); + + for (i = 0; i < 4 && n < max; i++, n+=4) { + pci_read_config_dword(tp->pci_dev, n, &dword_rd); + seq_printf(m, "%08x ", dword_rd); + } + } + + n = 0x110; + pci_read_config_dword(tp->pci_dev, n, &dword_rd); + seq_printf(m, "\n0x%03x:\t%08x ", n, dword_rd); + n = 0x70c; + pci_read_config_dword(tp->pci_dev, n, &dword_rd); + seq_printf(m, "\n0x%03x:\t%08x ", n, dword_rd); + + rtnl_unlock(); + + seq_putc(m, '\n'); + return 0; +} + +static int proc_get_temperature(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + struct rtl8126_private *tp = netdev_priv(dev); + u16 ts_digout, tj, fah; + + switch (tp->mcfg) { + default: + return -EOPNOTSUPP; + } + + rtnl_lock(); + + if (!rtl8126_sysfs_testmode_on(tp)) { + seq_puts(m, "\nPlease turn on ""/sys/class/net//rtk_adv/testmode"".\n\n"); + rtnl_unlock(); + return 0; + } + + netif_testing_on(dev); + ts_digout = rtl8126_read_thermal_sensor(tp); + netif_testing_off(dev); + + rtnl_unlock(); + + tj = ts_digout / 2; + if (ts_digout <= 512) { + tj = ts_digout / 2; + seq_printf(m, "Cel:%d\n", tj); + fah = tj * (9/5) + 32; + seq_printf(m, "Fah:%d\n", fah); + } else { + tj = (512 - ((ts_digout / 2) - 512)) / 2; + seq_printf(m, "Cel:-%d\n", tj); + fah = tj * (9/5) + 32; + seq_printf(m, "Fah:-%d\n", fah); + } + + seq_putc(m, '\n'); + return 0; +} + +static int _proc_get_cable_info(struct seq_file *m, void *v, bool poe_mode) +{ + int i; + u16 status; + int cp_status[RTL8126_CP_NUM]; + int cp_len[RTL8126_CP_NUM] = {0}; + struct net_device *dev = m->private; + struct rtl8126_private *tp = netdev_priv(dev); + const char *pair_str[RTL8126_CP_NUM] = {"1-2", "3-6", "4-5", "7-8"}; + int ret; + + switch (tp->mcfg) { + default: + ret = -EOPNOTSUPP; + goto error_out; + } + + rtnl_lock(); + + if (!rtl8126_sysfs_testmode_on(tp)) { + seq_puts(m, "\nPlease turn on ""/sys/class/net//rtk_adv/testmode"".\n\n"); + ret = 0; + goto error_unlock; + } + + rtl8126_mdio_write(tp, 0x1F, 0x0000); + if (rtl8126_mdio_read(tp, MII_BMCR) & BMCR_PDOWN) { + ret = -EIO; + goto error_unlock; + } + + netif_testing_on(dev); + + status = RTL_R16(tp, PHYstatus); + if (status & LinkStatus) + seq_printf(m, "\nlink speed:%d", + rtl8126_convert_link_speed(status)); + else + seq_puts(m, "\nlink status:off"); + + rtl8126_get_cp_len(tp, cp_len); + + rtl8126_get_cp_status(tp, cp_status, poe_mode); + + seq_puts(m, "\npair\tlength\tstatus \tpp\n"); + + for (i=0; iprivate; + struct rtl8126_private *tp = netdev_priv(dev); + int i; + + rtnl_lock(); + + for (i = 0; i < tp->num_rx_rings; i++) { + struct rtl8126_rx_ring *ring = &tp->rx_ring[i]; + + if (!ring) + continue; + + seq_printf(m, "\ndump rx %d desc:%d\n", i, ring->num_rx_desc); + + _proc_dump_desc(m, (void*)ring->RxDescArray, ring->RxDescAllocSize); + } + +#ifdef ENABLE_LIB_SUPPORT + if (rtl8126_num_lib_rx_rings(tp) > 0) { + for (i = 0; i < tp->HwSuppNumRxQueues; i++) { + struct rtl8126_ring *lib_ring = &tp->lib_rx_ring[i]; + if (lib_ring->enabled) { + seq_printf(m, "\ndump lib rx %d desc:%d\n", i, + lib_ring->ring_size); + _proc_dump_desc(m, (void*)lib_ring->desc_addr, + lib_ring->desc_size); + } + } + } +#endif //ENABLE_LIB_SUPPORT + + rtnl_unlock(); + + seq_putc(m, '\n'); + return 0; +} + +static int proc_dump_tx_desc(struct seq_file *m, void *v) +{ + struct net_device *dev = m->private; + struct rtl8126_private *tp = netdev_priv(dev); + int i; + + rtnl_lock(); + + for (i = 0; i < tp->num_tx_rings; i++) { + struct rtl8126_tx_ring *ring = &tp->tx_ring[i]; + + if (!ring) + continue; + + seq_printf(m, "\ndump tx %d desc:%d\n", i, ring->num_tx_desc); + + _proc_dump_desc(m, (void*)ring->TxDescArray, ring->TxDescAllocSize); + } + +#ifdef ENABLE_LIB_SUPPORT + if (rtl8126_num_lib_tx_rings(tp) > 0) { + for (i = 0; i < tp->HwSuppNumTxQueues; i++) { + struct rtl8126_ring *lib_ring = &tp->lib_tx_ring[i]; + if (lib_ring->enabled) { + seq_printf(m, "\ndump lib tx %d desc:%d\n", i, + lib_ring->ring_size); + _proc_dump_desc(m, (void*)lib_ring->desc_addr, + lib_ring->desc_size); + } + } + } +#endif //ENABLE_LIB_SUPPORT + + rtnl_unlock(); + + seq_putc(m, '\n'); + return 0; +} + +static int proc_dump_msix_tbl(struct seq_file *m, void *v) +{ + int i, j; + void __iomem *ioaddr; + struct net_device *dev = m->private; + struct rtl8126_private *tp = netdev_priv(dev); + + /* ioremap MMIO region */ + ioaddr = ioremap(pci_resource_start(tp->pci_dev, 4), pci_resource_len(tp->pci_dev, 4)); + if (!ioaddr) + return -EFAULT; + + rtnl_lock(); + + seq_printf(m, "\ndump MSI-X Table. Total Entry %d. \n", tp->hw_supp_irq_nvecs); + + for (i=0; ihw_supp_irq_nvecs; i++) { + seq_printf(m, "\n%04x ", i); + for (j=0; j<4; j++) + seq_printf(m, "%08x ", + readl(ioaddr + i*0x10 + 4*j)); + } + + rtnl_unlock(); + + iounmap(ioaddr); + + seq_putc(m, '\n'); + return 0; +} + +#else //LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) + +static int proc_get_driver_variable(char *page, char **start, + off_t offset, int count, + int *eof, void *data) +{ + struct net_device *dev = data; + struct rtl8126_private *tp = netdev_priv(dev); + int len = 0; + + len += snprintf(page + len, count - len, + "\nDump Driver Driver\n"); + + rtnl_lock(); + + len += snprintf(page + len, count - len, + "Variable\tValue\n----------\t-----\n"); + + len += snprintf(page + len, count - len, + "MODULENAME\t%s\n" + "driver version\t%s\n" + "mcfg\t%d\n" + "chipset\t%d\n" + "chipset_name\t%s\n" + "mtu\t%d\n" + "NUM_RX_DESC\t0x%x\n" + "cur_rx0\t0x%x\n" + "dirty_rx0\t0x%x\n" + "cur_rx1\t0x%x\n" + "dirty_rx1\t0x%x\n" + "cur_rx2\t0x%x\n" + "dirty_rx2\t0x%x\n" + "cur_rx3\t0x%x\n" + "dirty_rx3\t0x%x\n" + "NUM_TX_DESC\t0x%x\n" + "cur_tx0\t0x%x\n" + "dirty_tx0\t0x%x\n" + "cur_tx1\t0x%x\n" + "dirty_tx1\t0x%x\n" + "rx_buf_sz\t0x%x\n" +#ifdef ENABLE_PAGE_REUSE + "rx_buf_page_order\t0x%x\n" + "rx_buf_page_size\t0x%x\n" + "page_reuse_fail_cnt\t0x%x\n" +#endif //ENABLE_PAGE_REUSE + "esd_flag\t0x%x\n" + "pci_cfg_is_read\t0x%x\n" + "rtl8126_rx_config\t0x%x\n" + "cp_cmd\t0x%x\n" + "intr_mask\t0x%x\n" + "timer_intr_mask\t0x%x\n" + "wol_enabled\t0x%x\n" + "wol_opts\t0x%x\n" + "efuse_ver\t0x%x\n" + "eeprom_type\t0x%x\n" + "autoneg\t0x%x\n" + "duplex\t0x%x\n" + "speed\t%d\n" + "advertising\t0x%llx\n" + "eeprom_len\t0x%x\n" + "cur_page\t0x%x\n" + "features\t0x%x\n" + "org_pci_offset_99\t0x%x\n" + "org_pci_offset_180\t0x%x\n" + "issue_offset_99_event\t0x%x\n" + "org_pci_offset_80\t0x%x\n" + "org_pci_offset_81\t0x%x\n" + "use_timer_interrupt\t0x%x\n" + "HwIcVerUnknown\t0x%x\n" + "NotWrRamCodeToMicroP\t0x%x\n" + "NotWrMcuPatchCode\t0x%x\n" + "HwHasWrRamCodeToMicroP\t0x%x\n" + "sw_ram_code_ver\t0x%x\n" + "hw_ram_code_ver\t0x%x\n" + "rtk_enable_diag\t0x%x\n" + "ShortPacketSwChecksum\t0x%x\n" + "UseSwPaddingShortPkt\t0x%x\n" + "RequireAdcBiasPatch\t0x%x\n" + "AdcBiasPatchIoffset\t0x%x\n" + "RequireAdjustUpsTxLinkPulseTiming\t0x%x\n" + "SwrCnt1msIni\t0x%x\n" + "HwSuppNowIsOobVer\t0x%x\n" + "HwFiberModeVer\t0x%x\n" + "HwFiberStat\t0x%x\n" + "HwSwitchMdiToFiber\t0x%x\n" + "NicCustLedValue\t0x%x\n" + "RequiredSecLanDonglePatch\t0x%x\n" + "HwSuppDashVer\t0x%x\n" + "DASH\t0x%x\n" + "dash_printer_enabled\t0x%x\n" + "HwSuppKCPOffloadVer\t0x%x\n" + "speed_mode\t0x%x\n" + "duplex_mode\t0x%x\n" + "autoneg_mode\t0x%x\n" + "aspm\t0x%x\n" + "s5wol\t0x%x\n" + "s5_keep_curr_mac\t0x%x\n" + "eee_enable\t0x%x\n" + "hwoptimize\t0x%lx\n" + "proc_init_num\t0x%x\n" + "s0_magic_packet\t0x%x\n" + "disable_wol_support\t0x%x\n" + "enable_double_vlan\t0x%x\n" + "HwSuppMagicPktVer\t0x%x\n" + "HwSuppLinkChgWakeUpVer\t0x%x\n" + "HwSuppD0SpeedUpVer\t0x%x\n" + "D0SpeedUpSpeed\t0x%x\n" + "HwSuppCheckPhyDisableModeVer\t0x%x\n" + "HwPkgDet\t0x%x\n" + "HwSuppTxNoCloseVer\t0x%x\n" + "EnableTxNoClose\t0x%x\n" + "NextHwDesCloPtr0\t0x%x\n" + "BeginHwDesCloPtr0\t0x%x\n" + "hw_clo_ptr_reg0\t0x%x\n" + "sw_tail_ptr_reg0\t0x%x\n" + "NextHwDesCloPtr1\t0x%x\n" + "BeginHwDesCloPtr1\t0x%x\n" + "hw_clo_ptr_reg1\t0x%x\n" + "sw_tail_ptr_reg1\t0x%x\n" + "InitRxDescType\t0x%x\n" + "RxDescLength\t0x%x\n" + "num_rx_rings\t0x%x\n" + "num_tx_rings\t0x%x\n" + "tot_rx_rings\t0x%x\n" + "tot_tx_rings\t0x%x\n" + "HwSuppNumRxQueues\t0x%x\n" + "HwSuppNumTxQueues\t0x%x\n" + "EnableRss\t0x%x\n" + "EnablePtp\t0x%x\n" + "ptp_master_mode\t0x%x\n" + "min_irq_nvecs\t0x%x\n" + "irq_nvecs\t0x%x\n" + "hw_supp_irq_nvecs\t0x%x\n" + "ring_lib_enabled\t0x%x\n" + "HwSuppIsrVer\t0x%x\n" + "HwCurrIsrVer\t0x%x\n" +#ifdef ENABLE_PTP_SUPPORT + "tx_hwtstamp_timeouts\t0x%x\n" + "tx_hwtstamp_skipped\t0x%x\n" +#endif + "random_mac\t0x%x\n" + "org_mac_addr\t%pM\n" +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13) + "perm_addr\t%pM\n" +#endif + "dev_addr\t%pM\n", + MODULENAME, + RTL8126_VERSION, + tp->mcfg, + tp->chipset, + rtl_chip_info[tp->chipset].name, + dev->mtu, + tp->rx_ring[0].num_rx_desc, + tp->rx_ring[0].cur_rx, + tp->rx_ring[0].dirty_rx, + tp->rx_ring[1].cur_rx, + tp->rx_ring[1].dirty_rx, + tp->rx_ring[2].cur_rx, + tp->rx_ring[2].dirty_rx, + tp->rx_ring[3].cur_rx, + tp->rx_ring[3].dirty_rx, + tp->tx_ring[0].num_tx_desc, + tp->tx_ring[0].cur_tx, + tp->tx_ring[0].dirty_tx, + tp->tx_ring[1].cur_tx, + tp->tx_ring[1].dirty_tx, + tp->rx_buf_sz, +#ifdef ENABLE_PAGE_REUSE + tp->rx_buf_page_order, + tp->rx_buf_page_size, + tp->page_reuse_fail_cnt, +#endif //ENABLE_PAGE_REUSE + tp->esd_flag, + tp->pci_cfg_is_read, + tp->rtl8126_rx_config, + tp->cp_cmd, + tp->intr_mask, + tp->timer_intr_mask, + tp->wol_enabled, + tp->wol_opts, + tp->efuse_ver, + tp->eeprom_type, + tp->autoneg, + tp->duplex, + tp->speed, + tp->advertising, + tp->eeprom_len, + tp->cur_page, + tp->features, + tp->org_pci_offset_99, + tp->org_pci_offset_180, + tp->issue_offset_99_event, + tp->org_pci_offset_80, + tp->org_pci_offset_81, + tp->use_timer_interrupt, + tp->HwIcVerUnknown, + tp->NotWrRamCodeToMicroP, + tp->NotWrMcuPatchCode, + tp->HwHasWrRamCodeToMicroP, + tp->sw_ram_code_ver, + tp->hw_ram_code_ver, + tp->rtk_enable_diag, + tp->ShortPacketSwChecksum, + tp->UseSwPaddingShortPkt, + tp->RequireAdcBiasPatch, + tp->AdcBiasPatchIoffset, + tp->RequireAdjustUpsTxLinkPulseTiming, + tp->SwrCnt1msIni, + tp->HwSuppNowIsOobVer, + tp->HwFiberModeVer, + tp->HwFiberStat, + tp->HwSwitchMdiToFiber, + tp->NicCustLedValue, + tp->RequiredSecLanDonglePatch, + tp->HwSuppDashVer, + tp->DASH, + tp->dash_printer_enabled, + tp->HwSuppKCPOffloadVer, + speed_mode, + duplex_mode, + autoneg_mode, + aspm, + s5wol, + s5_keep_curr_mac, + tp->eee.eee_enabled, + hwoptimize, + proc_init_num, + s0_magic_packet, + disable_wol_support, + enable_double_vlan, + tp->HwSuppMagicPktVer, + tp->HwSuppLinkChgWakeUpVer, + tp->HwSuppD0SpeedUpVer, + tp->D0SpeedUpSpeed, + tp->HwSuppCheckPhyDisableModeVer, + tp->HwPkgDet, + tp->HwSuppTxNoCloseVer, + tp->EnableTxNoClose, + tp->tx_ring[0].NextHwDesCloPtr, + tp->tx_ring[0].BeginHwDesCloPtr, + rtl8126_get_hw_clo_ptr(&tp->tx_ring[0]), + rtl8126_get_sw_tail_ptr(&tp->tx_ring[0]), + tp->tx_ring[1].NextHwDesCloPtr, + tp->tx_ring[1].BeginHwDesCloPtr, + rtl8126_get_hw_clo_ptr(&tp->tx_ring[1]), + rtl8126_get_sw_tail_ptr(&tp->tx_ring[1]), + tp->InitRxDescType, + tp->RxDescLength, + tp->num_rx_rings, + tp->num_tx_rings, + rtl8126_tot_rx_rings(tp), + rtl8126_tot_tx_rings(tp), + tp->HwSuppNumRxQueues, + tp->HwSuppNumTxQueues, + tp->EnableRss, + tp->EnablePtp, + tp->ptp_master_mode, + tp->min_irq_nvecs, + tp->irq_nvecs, + tp->hw_supp_irq_nvecs, + tp->ring_lib_enabled, + tp->HwSuppIsrVer, + tp->HwCurrIsrVer, +#ifdef ENABLE_PTP_SUPPORT + tp->tx_hwtstamp_timeouts, + tp->tx_hwtstamp_skipped, +#endif + tp->random_mac, + tp->org_mac_addr, +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13) + dev->perm_addr, +#endif + dev->dev_addr + ); + + rtnl_unlock(); + + len += snprintf(page + len, count - len, "\n"); + + *eof = 1; + return len; +} + +static int proc_get_tally_counter(char *page, char **start, + off_t offset, int count, + int *eof, void *data) +{ + struct net_device *dev = data; + struct rtl8126_private *tp = netdev_priv(dev); + struct rtl8126_counters *counters; + dma_addr_t paddr; + int len = 0; + + len += snprintf(page + len, count - len, + "\nDump Tally Counter\n"); + + rtnl_lock(); + + counters = tp->tally_vaddr; + paddr = tp->tally_paddr; + if (!counters) { + len += snprintf(page + len, count - len, + "\nDump Tally Counter Fail\n"); + goto out_unlock; + } + + rtl8126_dump_tally_counter(tp, paddr); + + len += snprintf(page + len, count - len, + "Statistics\tValue\n----------\t-----\n"); + + len += snprintf(page + len, count - len, + "tx_packets\t%lld\n" + "rx_packets\t%lld\n" + "tx_errors\t%lld\n" + "rx_errors\t%d\n" + "rx_missed\t%d\n" + "align_errors\t%d\n" + "tx_one_collision\t%d\n" + "tx_multi_collision\t%d\n" + "rx_unicast\t%lld\n" + "rx_broadcast\t%lld\n" + "rx_multicast\t%d\n" + "tx_aborted\t%d\n" + "tx_underrun\t%d\n", + + "tx_octets\t%lld\n", + "rx_octets\t%lld\n", + "rx_multicast64\t%lld\n", + "tx_unicast64\t%lld\n", + "tx_broadcast64\t%lld\n", + "tx_multicast64\t%lld\n", + "tx_pause_on\t%d\n", + "tx_pause_off\t%d\n", + "tx_pause_all\t%d\n", + "tx_deferred\t%d\n", + "tx_late_collision\t%d\n", + "tx_all_collision\t%d\n", + "tx_aborted32\t%d\n", + "align_errors32\t%d\n", + "rx_frame_too_long\t%d\n", + "rx_runt\t%d\n", + "rx_pause_on\t%d\n", + "rx_pause_off\t%d\n", + "rx_pause_all\t%d\n", + "rx_unknown_opcode\t%d\n", + "rx_mac_error\t%d\n", + "tx_underrun32\t%d\n", + "rx_mac_missed\t%d\n", + "rx_tcam_dropped\t%d\n", + "tdu\t%d\n", + "rdu\t%d\n", + le64_to_cpu(counters->tx_packets), + le64_to_cpu(counters->rx_packets), + le64_to_cpu(counters->tx_errors), + le32_to_cpu(counters->rx_errors), + le16_to_cpu(counters->rx_missed), + le16_to_cpu(counters->align_errors), + le32_to_cpu(counters->tx_one_collision), + le32_to_cpu(counters->tx_multi_collision), + le64_to_cpu(counters->rx_unicast), + le64_to_cpu(counters->rx_broadcast), + le32_to_cpu(counters->rx_multicast), + le16_to_cpu(counters->tx_aborted), + le16_to_cpu(counters->tx_underrun), + + le64_to_cpu(counters->tx_octets), + le64_to_cpu(counters->rx_octets), + le64_to_cpu(counters->rx_multicast64), + le64_to_cpu(counters->tx_unicast64), + le64_to_cpu(counters->tx_broadcast64), + le64_to_cpu(counters->tx_multicast64), + le32_to_cpu(counters->tx_pause_on), + le32_to_cpu(counters->tx_pause_off), + le32_to_cpu(counters->tx_pause_all), + le32_to_cpu(counters->tx_deferred), + le32_to_cpu(counters->tx_late_collision), + le32_to_cpu(counters->tx_all_collision), + le32_to_cpu(counters->tx_aborted32), + le32_to_cpu(counters->align_errors32), + le32_to_cpu(counters->rx_frame_too_long), + le32_to_cpu(counters->rx_runt), + le32_to_cpu(counters->rx_pause_on), + le32_to_cpu(counters->rx_pause_off), + le32_to_cpu(counters->rx_pause_all), + le32_to_cpu(counters->rx_unknown_opcode), + le32_to_cpu(counters->rx_mac_error), + le32_to_cpu(counters->tx_underrun32), + le32_to_cpu(counters->rx_mac_missed), + le32_to_cpu(counters->rx_tcam_dropped), + le32_to_cpu(counters->tdu), + le32_to_cpu(counters->rdu), + ); + + len += snprintf(page + len, count - len, "\n"); +out_unlock: + rtnl_unlock(); + + *eof = 1; + return len; +} + +static int proc_get_registers(char *page, char **start, + off_t offset, int count, + int *eof, void *data) +{ + struct net_device *dev = data; + int i, n, max = R8126_MAC_REGS_SIZE; + u8 byte_rd; + struct rtl8126_private *tp = netdev_priv(dev); + void __iomem *ioaddr = tp->mmio_addr; + int len = 0; + + len += snprintf(page + len, count - len, + "\nDump MAC Registers\n" + "Offset\tValue\n------\t-----\n"); + + rtnl_lock(); + + for (n = 0; n < max;) { + len += snprintf(page + len, count - len, + "\n0x%04x:\t", + n); + + for (i = 0; i < 16 && n < max; i++, n++) { + byte_rd = readb(ioaddr + n); + len += snprintf(page + len, count - len, + "%02x ", + byte_rd); + } + } + + max = 0xB00; + for (n = 0xA00; n < max;) { + len += snprintf(page + len, count - len, + "\n0x%04x:\t", + n); + + for (i = 0; i < 16 && n < max; i++, n++) { + byte_rd = readb(ioaddr + n); + len += snprintf(page + len, count - len, + "%02x ", + byte_rd); + } + } + + max = 0xD40; + for (n = 0xD00; n < max;) { + len += snprintf(page + len, count - len, + "\n0x%04x:\t", + n); + + for (i = 0; i < 16 && n < max; i++, n++) { + byte_rd = readb(ioaddr + n); + len += snprintf(page + len, count - len, + "%02x ", + byte_rd); + } + } + + max = 0x2840; + for (n = 0x2800; n < max;) { + len += snprintf(page + len, count - len, + "\n0x%04x:\t", + n); + + for (i = 0; i < 16 && n < max; i++, n++) { + byte_rd = readb(ioaddr + n); + len += snprintf(page + len, count - len, + "%02x ", + byte_rd); + } + } + + rtnl_unlock(); + + len += snprintf(page + len, count - len, "\n"); + + *eof = 1; + return len; +} + +static int proc_get_all_registers(char *page, char **start, + off_t offset, int count, + int *eof, void *data) +{ + struct net_device *dev = data; + int i, n, max; + u8 byte_rd; + struct rtl8126_private *tp = netdev_priv(dev); + void __iomem *ioaddr = tp->mmio_addr; + struct pci_dev *pdev = tp->pci_dev; + int len = 0; + + len += snprintf(page + len, count - len, + "\nDump All MAC Registers\n" + "Offset\tValue\n------\t-----\n"); + + rtnl_lock(); + + max = pci_resource_len(pdev, 2); + + for (n = 0; n < max;) { + len += snprintf(page + len, count - len, + "\n0x%04x:\t", + n); + + for (i = 0; i < 16 && n < max; i++, n++) { + byte_rd = readb(ioaddr + n); + len += snprintf(page + len, count - len, + "%02x ", + byte_rd); + } + } + + rtnl_unlock(); + + len += snprintf(page + len, count - len, "\nTotal length:0x%X", max); + + len += snprintf(page + len, count - len, "\n"); + + *eof = 1; + return len; +} + +static int proc_get_pcie_phy(char *page, char **start, + off_t offset, int count, + int *eof, void *data) +{ + struct net_device *dev = data; + int i, n, max = R8126_EPHY_REGS_SIZE/2; + u16 word_rd; + struct rtl8126_private *tp = netdev_priv(dev); + int len = 0; + + len += snprintf(page + len, count - len, + "\nDump PCIE PHY\n" + "Offset\tValue\n------\t-----\n"); + + rtnl_lock(); + + for (n = 0; n < max;) { + len += snprintf(page + len, count - len, + "\n0x%02x:\t", + n); + + for (i = 0; i < 8 && n < max; i++, n++) { + word_rd = rtl8126_ephy_read(tp, n); + len += snprintf(page + len, count - len, + "%04x ", + word_rd); + } + } + + rtnl_unlock(); + + len += snprintf(page + len, count - len, "\n"); + + *eof = 1; + return len; +} + +static int proc_get_eth_phy(char *page, char **start, + off_t offset, int count, + int *eof, void *data) +{ + struct net_device *dev = data; + int i, n, max = R8126_PHY_REGS_SIZE/2; + u16 word_rd; + struct rtl8126_private *tp = netdev_priv(dev); + int len = 0; + + len += snprintf(page + len, count - len, + "\nDump Ethernet PHY\n" + "Offset\tValue\n------\t-----\n"); + + rtnl_lock(); + + len += snprintf(page + len, count - len, + "\n####################page 0##################\n"); + rtl8126_mdio_write(tp, 0x1f, 0x0000); + for (n = 0; n < max;) { + len += snprintf(page + len, count - len, + "\n0x%02x:\t", + n); + + for (i = 0; i < 8 && n < max; i++, n++) { + word_rd = rtl8126_mdio_read(tp, n); + len += snprintf(page + len, count - len, + "%04x ", + word_rd); + } + } + + len += snprintf(page + len, count - len, + "\n####################extra reg##################\n"); + n = 0xA400; + len += snprintf(page + len, count - len, + "\n0x%02x:\t", + n); + for (i = 0; i < 8; i++, n+=2) { + word_rd = rtl8126_mdio_direct_read_phy_ocp(tp, n); + len += snprintf(page + len, count - len, + "%04x ", + word_rd); + } + + n = 0xA410; + len += snprintf(page + len, count - len, + "\n0x%02x:\t", + n); + for (i = 0; i < 3; i++, n+=2) { + word_rd = rtl8126_mdio_direct_read_phy_ocp(tp, n); + len += snprintf(page + len, count - len, + "%04x ", + word_rd); + } + + n = 0xA434; + len += snprintf(page + len, count - len, + "\n0x%02x:\t", + n); + word_rd = rtl8126_mdio_direct_read_phy_ocp(tp, n); + len += snprintf(page + len, count - len, + "%04x ", + word_rd); + + n = 0xA5D0; + len += snprintf(page + len, count - len, + "\n0x%02x:\t", + n); + for (i = 0; i < 4; i++, n+=2) { + word_rd = rtl8126_mdio_direct_read_phy_ocp(tp, n); + len += snprintf(page + len, count - len, + "%04x ", + word_rd); + } + + n = 0xA61A; + len += snprintf(page + len, count - len, + "\n0x%02x:\t", + n); + word_rd = rtl8126_mdio_direct_read_phy_ocp(tp, n); + len += snprintf(page + len, count - len, + "%04x ", + word_rd); + + n = 0xA6D0; + len += snprintf(page + len, count - len, + "\n0x%02x:\t", + n); + for (i = 0; i < 3; i++, n+=2) { + word_rd = rtl8126_mdio_direct_read_phy_ocp(tp, n); + len += snprintf(page + len, count - len, + "%04x ", + word_rd); + } + + rtnl_unlock(); + + len += snprintf(page + len, count - len, "\n"); + + *eof = 1; + return len; +} + +static int proc_get_extended_registers(char *page, char **start, + off_t offset, int count, + int *eof, void *data) +{ + struct net_device *dev = data; + int i, n, max = R8126_ERI_REGS_SIZE; + u32 dword_rd; + struct rtl8126_private *tp = netdev_priv(dev); + int len = 0; + + len += snprintf(page + len, count - len, + "\nDump Extended Registers\n" + "Offset\tValue\n------\t-----\n"); + + rtnl_lock(); + + for (n = 0; n < max;) { + len += snprintf(page + len, count - len, + "\n0x%02x:\t", + n); + + for (i = 0; i < 4 && n < max; i++, n+=4) { + dword_rd = rtl8126_eri_read(tp, n, 4, ERIAR_ExGMAC); + len += snprintf(page + len, count - len, + "%08x ", + dword_rd); + } + } + + rtnl_unlock(); + + len += snprintf(page + len, count - len, "\n"); + + *eof = 1; + return len; +} + +static int proc_get_pci_registers(char *page, char **start, + off_t offset, int count, + int *eof, void *data) +{ + struct net_device *dev = data; + int i, n, max = R8126_PCI_REGS_SIZE; + u32 dword_rd; + struct rtl8126_private *tp = netdev_priv(dev); + int len = 0; + + len += snprintf(page + len, count - len, + "\nDump PCI Registers\n" + "Offset\tValue\n------\t-----\n"); + + rtnl_lock(); + + for (n = 0; n < max;) { + len += snprintf(page + len, count - len, + "\n0x%03x:\t", + n); + + for (i = 0; i < 4 && n < max; i++, n+=4) { + pci_read_config_dword(tp->pci_dev, n, &dword_rd); + len += snprintf(page + len, count - len, + "%08x ", + dword_rd); + } + } + + n = 0x110; + pci_read_config_dword(tp->pci_dev, n, &dword_rd); + len += snprintf(page + len, count - len, + "\n0x%03x:\t%08x ", + n, + dword_rd); + n = 0x70c; + pci_read_config_dword(tp->pci_dev, n, &dword_rd); + len += snprintf(page + len, count - len, + "\n0x%03x:\t%08x ", + n, + dword_rd); + + rtnl_unlock(); + + len += snprintf(page + len, count - len, "\n"); + + *eof = 1; + return len; +} + +static int proc_get_temperature(char *page, char **start, + off_t offset, int count, + int *eof, void *data) +{ + struct net_device *dev = data; + struct rtl8126_private *tp = netdev_priv(dev); + u16 ts_digout, tj, fah; + int len = 0; + + switch (tp->mcfg) { + default: + return -EOPNOTSUPP; + } + + rtnl_lock(); + + if (!rtl8126_sysfs_testmode_on(tp)) { + len += snprintf(page + len, count - len, + "\nPlease turn on ""/sys/class/net//rtk_adv/testmode"".\n\n"); + goto out_unlock; + } + + ts_digout = rtl8126_read_thermal_sensor(tp); + + tj = ts_digout / 2; + if (ts_digout <= 512) { + tj = ts_digout / 2; + len += snprintf(page + len, count - len, + "Cel:%d\n", + tj); + fah = tj * (9/5) + 32; + len += snprintf(page + len, count - len, + "Fah:%d\n", + fah); + + } else { + tj = (512 - ((ts_digout / 2) - 512)) / 2; + len += snprintf(page + len, count - len, + "Cel:-%d\n", + tj); + fah = tj * (9/5) + 32; + len += snprintf(page + len, count - len, + "Fah:-%d\n", + fah); + } + + len += snprintf(page + len, count - len, "\n"); + +out_unlock: + rtnl_unlock(); + + *eof = 1; + return len; +} + +static int proc_get_cable_info(char *page, char **start, + off_t offset, int count, + int *eof, void *data, + bool poe_mode) +{ + int i; + u16 status; + int len = 0; + struct net_device *dev = data; + int cp_status[RTL8126_CP_NUM] = {0}; + int cp_len[RTL8126_CP_NUM] = {0}; + struct rtl8126_private *tp = netdev_priv(dev); + const char *pair_str[RTL8126_CP_NUM] = {"1-2", "3-6", "4-5", "7-8"}; + + switch (tp->mcfg) { + default: + return -EOPNOTSUPP; + } + + rtnl_lock(); + + if (!rtl8126_sysfs_testmode_on(tp)) { + len += snprintf(page + len, count - len, + "\nPlease turn on ""/sys/class/net//rtk_adv/testmode"".\n\n"); + goto out_unlock; + } + + status = RTL_R16(tp, PHYstatus); + if (status & LinkStatus) + len += snprintf(page + len, count - len, + "\nlink speed:%d", + rtl8126_convert_link_speed(status)); + else + len += snprintf(page + len, count - len, + "\nlink status:off"); + + rtl8126_get_cp_len(tp, cp_len); + + rtl8126_get_cp_status(tp, cp_status, poe_mode); + + len += snprintf(page + len, count - len, + "\npair\tlength\tstatus \tpp\n"); + + for (i=0; inum_rx_rings; i++) { + struct rtl8126_rx_ring *ring = &tp->rx_ring[i]; + + if (!ring) + continue; + + len += snprintf(page + len, count - len, + "\ndump rx &d desc:%d", + i, ring->num_rx_desc); + + _proc_dump_desc(page, &len, &count, + ring->RxDescArray, + ring->RxDescAllocSize); + } + +#ifdef ENABLE_LIB_SUPPORT + if (rtl8126_num_lib_rx_rings(tp) > 0) { + for (i = 0; i < tp->HwSuppNumRxQueues; i++) { + struct rtl8126_ring *lib_ring = &tp->lib_rx_ring[i]; + if (lib_ring->enabled) { + len += snprintf(page + len, count - len, + "\ndump lib rx %d desc:%d", + i, + ring->ring_size); + _proc_dump_desc(page, &len, &count, + (void*)lib_ring->desc_addr, + lib_ring->desc_size); + } + } + } +#endif //ENABLE_LIB_SUPPORT + + rtnl_unlock(); + + len += snprintf(page + len, count - len, "\n"); + + *eof = 1; + + return len; +} + +static int proc_dump_tx_desc(char *page, char **start, + off_t offset, int count, + int *eof, void *data) +{ + int len = 0; + struct net_device *dev = data; + struct rtl8126_private *tp = netdev_priv(dev); + int i; + + rtnl_lock(); + + for (i = 0; i < tp->num_tx_rings; i++) { + struct rtl8126_tx_ring *ring = &tp->tx_ring[i]; + + if (!ring) + continue; + + len += snprintf(page + len, count - len, + "\ndump tx desc:%d", + ring->num_tx_desc); + + _proc_dump_desc(page, &len, &count, + ring->TxDescArray, + ring->TxDescAllocSize); + } + +#ifdef ENABLE_LIB_SUPPORT + if (rtl8126_num_lib_tx_rings(tp) > 0) { + for (i = 0; i < tp->HwSuppNumTxQueues; i++) { + struct rtl8126_ring *lib_ring = &tp->lib_tx_ring[i]; + if (lib_ring->enabled) { + len += snprintf(page + len, count - len, + "\ndump lib tx %d desc:%d", + i, + ring->ring_size); + _proc_dump_desc(page, &len, &count, + (void*)lib_ring->desc_addr, + lib_ring->desc_size); + } + } + } +#endif //ENABLE_LIB_SUPPORT + + rtnl_unlock(); + + len += snprintf(page + len, count - len, "\n"); + + *eof = 1; + + return len; +} + +static int proc_dump_msix_tbl(char *page, char **start, + off_t offset, int count, + int *eof, void *data) +{ + int i, j; + int len = 0; + void __iomem *ioaddr; + struct net_device *dev = data; + struct rtl8126_private *tp = netdev_priv(dev); + + /* ioremap MMIO region */ + ioaddr = ioremap(pci_resource_start(tp->pci_dev, 4), pci_resource_len(tp->pci_dev, 4)); + if (!ioaddr) + return -EFAULT; + + rtnl_lock(); + + len += snprintf(page + len, count - len, + "\ndump MSI-X Table. Total Entry %d. \n", + tp->hw_supp_irq_nvecs); + + for (i=0; ihw_supp_irq_nvecs; i++) { + len += snprintf(page + len, count - len, + "\n%04x ", i); + for (j=0; j<4; j++) + len += snprintf(page + len, count - len, "%08x ", + readl(ioaddr + i*0x10 + 4*j)); + } + + rtnl_unlock(); + + len += snprintf(page + len, count - len, "\n"); + + *eof = 1; + return 0; +} + +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) + +static void rtl8126_proc_module_init(void) +{ + //create /proc/net/r8126 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32) + rtl8126_proc = proc_mkdir(MODULENAME, init_net.proc_net); +#else + rtl8126_proc = proc_mkdir(MODULENAME, proc_net); +#endif + if (!rtl8126_proc) + dprintk("cannot create %s proc entry \n", MODULENAME); +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) +/* + * seq_file wrappers for procfile show routines. + */ +static int rtl8126_proc_open(struct inode *inode, struct file *file) +{ + struct net_device *dev = proc_get_parent_data(inode); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) + int (*show)(struct seq_file *, void *) = pde_data(inode); +#else + int (*show)(struct seq_file *, void *) = PDE_DATA(inode); +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) + + return single_open(file, show, dev); +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) +static const struct proc_ops rtl8126_proc_fops = { + .proc_open = rtl8126_proc_open, + .proc_read = seq_read, + .proc_lseek = seq_lseek, + .proc_release = single_release, +}; +#else +static const struct file_operations rtl8126_proc_fops = { + .open = rtl8126_proc_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, +}; +#endif + +#endif + +/* + * Table of proc files we need to create. + */ +struct rtl8126_proc_file { + char name[16]; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) + int (*show)(struct seq_file *, void *); +#else + int (*show)(char *, char **, off_t, int, int *, void *); +#endif +}; + +static const struct rtl8126_proc_file rtl8126_debug_proc_files[] = { + { "driver_var", &proc_get_driver_variable }, + { "tally", &proc_get_tally_counter }, + { "registers", &proc_get_registers }, + { "registers2", &proc_get_all_registers }, + { "pcie_phy", &proc_get_pcie_phy }, + { "eth_phy", &proc_get_eth_phy }, + { "ext_regs", &proc_get_extended_registers }, + { "pci_regs", &proc_get_pci_registers }, + { "tx_desc", &proc_dump_tx_desc }, + { "rx_desc", &proc_dump_rx_desc }, + { "msix_tbl", &proc_dump_msix_tbl }, + { "", NULL } +}; + +static const struct rtl8126_proc_file rtl8126_test_proc_files[] = { + { "temp", &proc_get_temperature }, + { "cdt", &proc_get_cable_info }, + { "cdt_poe", &proc_get_poe_cable_info }, + { "", NULL } +}; + +#define R8126_PROC_DEBUG_DIR "debug" +#define R8126_PROC_TEST_DIR "test" + +static void rtl8126_proc_init(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + const struct rtl8126_proc_file *f; + struct proc_dir_entry *dir; + + if (!rtl8126_proc) + return; + + if (tp->proc_dir_debug || tp->proc_dir_test) + return; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) + dir = proc_mkdir_data(dev->name, 0, rtl8126_proc, dev); + if (!dir) { + printk("Unable to initialize /proc/net/%s/%s\n", + MODULENAME, dev->name); + return; + } + tp->proc_dir = dir; + proc_init_num++; + + /* create debug entry */ + dir = proc_mkdir_data(R8126_PROC_DEBUG_DIR, 0, tp->proc_dir, dev); + if (!dir) { + printk("Unable to initialize /proc/net/%s/%s/%s\n", + MODULENAME, dev->name, R8126_PROC_DEBUG_DIR); + return; + } + + tp->proc_dir_debug = dir; + for (f = rtl8126_debug_proc_files; f->name[0]; f++) { + if (!proc_create_data(f->name, S_IFREG | S_IRUGO, dir, + &rtl8126_proc_fops, f->show)) { + printk("Unable to initialize " + "/proc/net/%s/%s/%s/%s\n", + MODULENAME, dev->name, R8126_PROC_DEBUG_DIR, + f->name); + return; + } + } + + /* create test entry */ + dir = proc_mkdir_data(R8126_PROC_TEST_DIR, 0, tp->proc_dir, dev); + if (!dir) { + printk("Unable to initialize /proc/net/%s/%s/%s\n", + MODULENAME, dev->name, R8126_PROC_TEST_DIR); + return; + } + + tp->proc_dir_test = dir; + for (f = rtl8126_test_proc_files; f->name[0]; f++) { + if (!proc_create_data(f->name, S_IFREG | S_IRUGO, dir, + &rtl8126_proc_fops, f->show)) { + printk("Unable to initialize " + "/proc/net/%s/%s/%s/%s\n", + MODULENAME, dev->name, R8126_PROC_TEST_DIR, + f->name); + return; + } + } +#else + dir = proc_mkdir(dev->name, rtl8126_proc); + if (!dir) { + printk("Unable to initialize /proc/net/%s/%s\n", + MODULENAME, dev->name); + return; + } + + tp->proc_dir = dir; + proc_init_num++; + + /* create debug entry */ + dir = proc_mkdir(R8126_PROC_DEBUG_DIR, tp->proc_dir); + if (!dir) { + printk("Unable to initialize /proc/net/%s/%s/%s\n", + MODULENAME, dev->name, R8126_PROC_DEBUG_DIR); + return; + } + + tp->proc_dir_debug = dir; + for (f = rtl8126_debug_proc_files; f->name[0]; f++) { + if (!create_proc_read_entry(f->name, S_IFREG | S_IRUGO, + dir, f->show, dev)) { + printk("Unable to initialize " + "/proc/net/%s/%s/%s/%s\n", + MODULENAME, dev->name, R8126_PROC_DEBUG_DIR, + f->name); + return; + } + } + + /* create test entry */ + dir = proc_mkdir(R8126_PROC_TEST_DIR, tp->proc_dir); + if (!dir) { + printk("Unable to initialize /proc/net/%s/%s/%s\n", + MODULENAME, dev->name, R8126_PROC_TEST_DIR); + return; + } + + tp->proc_dir_test = dir; + for (f = rtl8126_test_proc_files; f->name[0]; f++) { + if (!create_proc_read_entry(f->name, S_IFREG | S_IRUGO, + dir, f->show, dev)) { + printk("Unable to initialize " + "/proc/net/%s/%s/%s/%s\n", + MODULENAME, dev->name, R8126_PROC_TEST_DIR, + f->name); + return; + } + } +#endif +} + +static void rtl8126_proc_remove(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + if (tp->proc_dir) { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) + remove_proc_subtree(dev->name, rtl8126_proc); +#else + const struct rtl8126_proc_file *f; + struct rtl8126_private *tp = netdev_priv(dev); + + if (tp->proc_dir_debug) { + for (f = rtl8126_debug_proc_files; f->name[0]; f++) + remove_proc_entry(f->name, tp->proc_dir_debug); + remove_proc_entry(R8126_PROC_DEBUG_DIR, tp->proc_dir); + } + + if (tp->proc_dir_test) { + for (f = rtl8126_test_proc_files; f->name[0]; f++) + remove_proc_entry(f->name, tp->proc_dir_test); + remove_proc_entry(R8126_PROC_TEST_DIR, tp->proc_dir); + } + + remove_proc_entry(dev->name, rtl8126_proc); +#endif + proc_init_num--; + + tp->proc_dir_debug = NULL; + tp->proc_dir_test = NULL; + tp->proc_dir = NULL; + } +} + +#endif //ENABLE_R8126_PROCFS + +#ifdef ENABLE_R8126_SYSFS +/**************************************************************************** +* -----------------------------SYSFS STUFF------------------------- +***************************************************************************** +*/ +static ssize_t testmode_show(struct device *dev, + struct device_attribute *attr, char *buf) +{ + struct net_device *netdev = to_net_dev(dev); + struct rtl8126_private *tp = netdev_priv(netdev); + + sprintf(buf, "%u\n", tp->testmode); + + return strlen(buf); +} + +static ssize_t testmode_store(struct device *dev, + struct device_attribute *attr, + const char *buf, size_t count) +{ + struct net_device *netdev = to_net_dev(dev); + struct rtl8126_private *tp = netdev_priv(netdev); + u32 testmode; + + if (sscanf(buf, "%u\n", &testmode) != 1) + return -EINVAL; + + if (tp->testmode != testmode) { + rtnl_lock(); + tp->testmode = testmode; + rtnl_unlock(); + } + + return count; +} + +static DEVICE_ATTR_RW(testmode); + +static struct attribute *rtk_adv_attrs[] = { + &dev_attr_testmode.attr, + NULL +}; + +static struct attribute_group rtk_adv_grp = { + .name = "rtl_adv", + .attrs = rtk_adv_attrs, +}; + +static void rtl8126_sysfs_init(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int ret; + + /* init rtl_adv */ +#ifdef ENABLE_LIB_SUPPORT + tp->testmode = 0; +#else + tp->testmode = 1; +#endif //ENABLE_LIB_SUPPORT + + ret = sysfs_create_group(&dev->dev.kobj, &rtk_adv_grp); + if (ret < 0) + netif_warn(tp, probe, dev, "create rtk_adv_grp fail\n"); + else + set_bit(R8126_SYSFS_RTL_ADV, tp->sysfs_flag); +} + +static void rtl8126_sysfs_remove(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + if (test_and_clear_bit(R8126_SYSFS_RTL_ADV, tp->sysfs_flag)) + sysfs_remove_group(&dev->dev.kobj, &rtk_adv_grp); +} +#endif //ENABLE_R8126_SYSFS + +static inline u16 map_phy_ocp_addr(u16 PageNum, u8 RegNum) +{ + u16 OcpPageNum = 0; + u8 OcpRegNum = 0; + u16 OcpPhyAddress = 0; + + if (PageNum == 0) { + OcpPageNum = OCP_STD_PHY_BASE_PAGE + (RegNum / 8); + OcpRegNum = 0x10 + (RegNum % 8); + } else { + OcpPageNum = PageNum; + OcpRegNum = RegNum; + } + + OcpPageNum <<= 4; + + if (OcpRegNum < 16) { + OcpPhyAddress = 0; + } else { + OcpRegNum -= 16; + OcpRegNum <<= 1; + + OcpPhyAddress = OcpPageNum + OcpRegNum; + } + + + return OcpPhyAddress; +} + +static void mdio_real_direct_write_phy_ocp(struct rtl8126_private *tp, + u16 RegAddr, + u16 value) +{ + u32 data32; + int i; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18) + WARN_ON_ONCE(RegAddr % 2); +#endif + data32 = RegAddr/2; + data32 <<= OCPR_Addr_Reg_shift; + data32 |= OCPR_Write | value; + + RTL_W32(tp, PHYOCP, data32); + for (i = 0; i < R8126_CHANNEL_WAIT_COUNT; i++) { + udelay(R8126_CHANNEL_WAIT_TIME); + + if (!(RTL_R32(tp, PHYOCP) & OCPR_Flag)) + break; + } +} + +static void rtl8126_mdio_direct_write_phy_ocp(struct rtl8126_private *tp, + u16 RegAddr, + u16 value) +{ + if (tp->rtk_enable_diag) + return; + + mdio_real_direct_write_phy_ocp(tp, RegAddr, value); +} + +/* +static void rtl8126_mdio_write_phy_ocp(struct rtl8126_private *tp, + u16 PageNum, + u32 RegAddr, + u32 value) +{ + u16 ocp_addr; + + ocp_addr = map_phy_ocp_addr(PageNum, RegAddr); + + rtl8126_mdio_direct_write_phy_ocp(tp, ocp_addr, value); +} +*/ + +static void rtl8126_mdio_real_write_phy_ocp(struct rtl8126_private *tp, + u16 PageNum, + u32 RegAddr, + u32 value) +{ + u16 ocp_addr; + + ocp_addr = map_phy_ocp_addr(PageNum, RegAddr); + + mdio_real_direct_write_phy_ocp(tp, ocp_addr, value); +} + +static void mdio_real_write(struct rtl8126_private *tp, + u16 RegAddr, + u16 value) +{ + if (RegAddr == 0x1F) { + tp->cur_page = value; + return; + } + rtl8126_mdio_real_write_phy_ocp(tp, tp->cur_page, RegAddr, value); +} + +void rtl8126_mdio_write(struct rtl8126_private *tp, + u16 RegAddr, + u16 value) +{ + if (tp->rtk_enable_diag) + return; + + mdio_real_write(tp, RegAddr, value); +} + +void rtl8126_mdio_prot_write(struct rtl8126_private *tp, + u32 RegAddr, + u32 value) +{ + mdio_real_write(tp, RegAddr, value); +} + +void rtl8126_mdio_prot_direct_write_phy_ocp(struct rtl8126_private *tp, + u32 RegAddr, + u32 value) +{ + mdio_real_direct_write_phy_ocp(tp, RegAddr, value); +} + +static u32 mdio_real_direct_read_phy_ocp(struct rtl8126_private *tp, + u16 RegAddr) +{ + u32 data32; + int i, value = 0; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18) + WARN_ON_ONCE(RegAddr % 2); +#endif + data32 = RegAddr/2; + data32 <<= OCPR_Addr_Reg_shift; + + RTL_W32(tp, PHYOCP, data32); + for (i = 0; i < R8126_CHANNEL_WAIT_COUNT; i++) { + udelay(R8126_CHANNEL_WAIT_TIME); + + if (RTL_R32(tp, PHYOCP) & OCPR_Flag) + break; + } + value = RTL_R32(tp, PHYOCP) & OCPDR_Data_Mask; + + return value; +} + +static u32 rtl8126_mdio_direct_read_phy_ocp(struct rtl8126_private *tp, + u16 RegAddr) +{ + if (tp->rtk_enable_diag) + return 0xffffffff; + + return mdio_real_direct_read_phy_ocp(tp, RegAddr); +} + +/* +static u32 rtl8126_mdio_read_phy_ocp(struct rtl8126_private *tp, + u16 PageNum, + u32 RegAddr) +{ + u16 ocp_addr; + + ocp_addr = map_phy_ocp_addr(PageNum, RegAddr); + + return rtl8126_mdio_direct_read_phy_ocp(tp, ocp_addr); +} +*/ + +static u32 rtl8126_mdio_real_read_phy_ocp(struct rtl8126_private *tp, + u16 PageNum, + u32 RegAddr) +{ + u16 ocp_addr; + + ocp_addr = map_phy_ocp_addr(PageNum, RegAddr); + + return mdio_real_direct_read_phy_ocp(tp, ocp_addr); +} + +static u32 mdio_real_read(struct rtl8126_private *tp, + u16 RegAddr) +{ + return rtl8126_mdio_real_read_phy_ocp(tp, tp->cur_page, RegAddr); +} + +u32 rtl8126_mdio_read(struct rtl8126_private *tp, + u16 RegAddr) +{ + if (tp->rtk_enable_diag) + return 0xffffffff; + + return mdio_real_read(tp, RegAddr); +} + +u32 rtl8126_mdio_prot_read(struct rtl8126_private *tp, + u32 RegAddr) +{ + return mdio_real_read(tp, RegAddr); +} + +u32 rtl8126_mdio_prot_direct_read_phy_ocp(struct rtl8126_private *tp, + u32 RegAddr) +{ + return mdio_real_direct_read_phy_ocp(tp, RegAddr); +} + +static void rtl8126_clear_and_set_eth_phy_bit(struct rtl8126_private *tp, u8 addr, u16 clearmask, u16 setmask) +{ + u16 PhyRegValue; + + PhyRegValue = rtl8126_mdio_read(tp, addr); + PhyRegValue &= ~clearmask; + PhyRegValue |= setmask; + rtl8126_mdio_write(tp, addr, PhyRegValue); +} + +void rtl8126_clear_eth_phy_bit(struct rtl8126_private *tp, u8 addr, u16 mask) +{ + rtl8126_clear_and_set_eth_phy_bit(tp, + addr, + mask, + 0); +} + +void rtl8126_set_eth_phy_bit(struct rtl8126_private *tp, u8 addr, u16 mask) +{ + rtl8126_clear_and_set_eth_phy_bit(tp, + addr, + 0, + mask); +} + +static void rtl8126_clear_and_set_eth_phy_ocp_bit(struct rtl8126_private *tp, u16 addr, u16 clearmask, u16 setmask) +{ + u16 PhyRegValue; + + PhyRegValue = rtl8126_mdio_direct_read_phy_ocp(tp, addr); + PhyRegValue &= ~clearmask; + PhyRegValue |= setmask; + rtl8126_mdio_direct_write_phy_ocp(tp, addr, PhyRegValue); +} + +static void rtl8126_clear_eth_phy_ocp_bit(struct rtl8126_private *tp, u16 addr, u16 mask) +{ + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + addr, + mask, + 0); +} + +static void rtl8126_set_eth_phy_ocp_bit(struct rtl8126_private *tp, u16 addr, u16 mask) +{ + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + addr, + 0, + mask); +} + +void rtl8126_mac_ocp_write(struct rtl8126_private *tp, u16 reg_addr, u16 value) +{ + u32 data32; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18) + WARN_ON_ONCE(reg_addr % 2); +#endif + + data32 = reg_addr/2; + data32 <<= OCPR_Addr_Reg_shift; + data32 += value; + data32 |= OCPR_Write; + + RTL_W32(tp, MACOCP, data32); +} + +u16 rtl8126_mac_ocp_read(struct rtl8126_private *tp, u16 reg_addr) +{ + u32 data32; + u16 data16 = 0; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18) + WARN_ON_ONCE(reg_addr % 2); +#endif + + data32 = reg_addr/2; + data32 <<= OCPR_Addr_Reg_shift; + + RTL_W32(tp, MACOCP, data32); + data16 = (u16)RTL_R32(tp, MACOCP); + + return data16; +} + +#ifdef ENABLE_USE_FIRMWARE_FILE +static void mac_mcu_write(struct rtl8126_private *tp, u16 reg, u16 value) +{ + if (reg == 0x1f) { + tp->ocp_base = value << 4; + return; + } + + rtl8126_mac_ocp_write(tp, tp->ocp_base + reg, value); +} + +static u32 mac_mcu_read(struct rtl8126_private *tp, u16 reg) +{ + return rtl8126_mac_ocp_read(tp, tp->ocp_base + reg); +} +#endif + +static void +rtl8126_clear_set_mac_ocp_bit( + struct rtl8126_private *tp, + u16 addr, + u16 clearmask, + u16 setmask +) +{ + u16 PhyRegValue; + + PhyRegValue = rtl8126_mac_ocp_read(tp, addr); + PhyRegValue &= ~clearmask; + PhyRegValue |= setmask; + rtl8126_mac_ocp_write(tp, addr, PhyRegValue); +} + +static void +rtl8126_clear_mac_ocp_bit( + struct rtl8126_private *tp, + u16 addr, + u16 mask +) +{ + rtl8126_clear_set_mac_ocp_bit(tp, + addr, + mask, + 0); +} + +static void +rtl8126_set_mac_ocp_bit( + struct rtl8126_private *tp, + u16 addr, + u16 mask +) +{ + rtl8126_clear_set_mac_ocp_bit(tp, + addr, + 0, + mask); +} + +u32 rtl8126_ocp_read_with_oob_base_address(struct rtl8126_private *tp, u16 addr, u8 len, const u32 base_address) +{ + return rtl8126_eri_read_with_oob_base_address(tp, addr, len, ERIAR_OOB, base_address); +} + +u32 rtl8126_ocp_read(struct rtl8126_private *tp, u16 addr, u8 len) +{ + u32 value = 0; + + if (!tp->AllowAccessDashOcp) + return 0xffffffff; + + if (HW_DASH_SUPPORT_TYPE_2(tp)) + value = rtl8126_ocp_read_with_oob_base_address(tp, addr, len, NO_BASE_ADDRESS); + else if (HW_DASH_SUPPORT_TYPE_3(tp)) + value = rtl8126_ocp_read_with_oob_base_address(tp, addr, len, RTL8168FP_OOBMAC_BASE); + + return value; +} + +u32 rtl8126_ocp_write_with_oob_base_address(struct rtl8126_private *tp, u16 addr, u8 len, u32 value, const u32 base_address) +{ + return rtl8126_eri_write_with_oob_base_address(tp, addr, len, value, ERIAR_OOB, base_address); +} + +void rtl8126_ocp_write(struct rtl8126_private *tp, u16 addr, u8 len, u32 value) +{ + if (!tp->AllowAccessDashOcp) + return; + + if (HW_DASH_SUPPORT_TYPE_2(tp)) + rtl8126_ocp_write_with_oob_base_address(tp, addr, len, value, NO_BASE_ADDRESS); + else if (HW_DASH_SUPPORT_TYPE_3(tp)) + rtl8126_ocp_write_with_oob_base_address(tp, addr, len, value, RTL8168FP_OOBMAC_BASE); +} + +void rtl8126_oob_mutex_lock(struct rtl8126_private *tp) +{ + u8 reg_16, reg_a0; + u32 wait_cnt_0, wait_Cnt_1; + u16 ocp_reg_mutex_ib; + u16 ocp_reg_mutex_oob; + u16 ocp_reg_mutex_prio; + + if (!tp->DASH) + return; + + switch (tp->mcfg) { + default: + return; + } + + rtl8126_ocp_write(tp, ocp_reg_mutex_ib, 1, BIT_0); + reg_16 = rtl8126_ocp_read(tp, ocp_reg_mutex_oob, 1); + wait_cnt_0 = 0; + while(reg_16) { + reg_a0 = rtl8126_ocp_read(tp, ocp_reg_mutex_prio, 1); + if (reg_a0) { + rtl8126_ocp_write(tp, ocp_reg_mutex_ib, 1, 0x00); + reg_a0 = rtl8126_ocp_read(tp, ocp_reg_mutex_prio, 1); + wait_Cnt_1 = 0; + while(reg_a0) { + reg_a0 = rtl8126_ocp_read(tp, ocp_reg_mutex_prio, 1); + + wait_Cnt_1++; + + if (wait_Cnt_1 > 2000) + break; + }; + rtl8126_ocp_write(tp, ocp_reg_mutex_ib, 1, BIT_0); + + } + reg_16 = rtl8126_ocp_read(tp, ocp_reg_mutex_oob, 1); + + wait_cnt_0++; + + if (wait_cnt_0 > 2000) + break; + }; +} + +void rtl8126_oob_mutex_unlock(struct rtl8126_private *tp) +{ + //u16 ocp_reg_mutex_ib; + //u16 ocp_reg_mutex_oob; + //u16 ocp_reg_mutex_prio; + + if (!tp->DASH) + return; + + switch (tp->mcfg) { + default: + return; + } + + //rtl8126_ocp_write(tp, ocp_reg_mutex_prio, 1, BIT_0); + //rtl8126_ocp_write(tp, ocp_reg_mutex_ib, 1, 0x00); +} + +static bool +rtl8126_is_allow_access_dash_ocp(struct rtl8126_private *tp) +{ + bool allow_access = false; + + if (!HW_DASH_SUPPORT_DASH(tp)) + goto exit; + + allow_access = true; + switch (tp->mcfg) { + default: + goto exit; + } +exit: + return allow_access; +} + +static int rtl8126_check_dash(struct rtl8126_private *tp) +{ + if (!tp->AllowAccessDashOcp) + return 0; + + if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { + if (rtl8126_ocp_read(tp, 0x128, 1) & BIT_0) + return 1; + } + + return 0; +} + +void rtl8126_dash2_disable_tx(struct rtl8126_private *tp) +{ + if (!tp->DASH) + return; + + if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { + u16 WaitCnt; + u8 TmpUchar; + + //Disable oob Tx + RTL_CMAC_W8(tp, CMAC_IBCR2, RTL_CMAC_R8(tp, CMAC_IBCR2) & ~(BIT_0)); + WaitCnt = 0; + + //wait oob tx disable + do { + TmpUchar = RTL_CMAC_R8(tp, CMAC_IBISR0); + + if (TmpUchar & ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE) { + break; + } + + udelay(50); + WaitCnt++; + } while(WaitCnt < 2000); + + //Clear ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE + RTL_CMAC_W8(tp, CMAC_IBISR0, RTL_CMAC_R8(tp, CMAC_IBISR0) | ISRIMR_DASH_TYPE2_TX_DISABLE_IDLE); + } +} + +void rtl8126_dash2_enable_tx(struct rtl8126_private *tp) +{ + if (!tp->DASH) + return; + + if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { + RTL_CMAC_W8(tp, CMAC_IBCR2, RTL_CMAC_R8(tp, CMAC_IBCR2) | BIT_0); + } +} + +void rtl8126_dash2_disable_rx(struct rtl8126_private *tp) +{ + if (!tp->DASH) + return; + + if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { + RTL_CMAC_W8(tp, CMAC_IBCR0, RTL_CMAC_R8(tp, CMAC_IBCR0) & ~(BIT_0)); + } +} + +void rtl8126_dash2_enable_rx(struct rtl8126_private *tp) +{ + if (!tp->DASH) + return; + + if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { + RTL_CMAC_W8(tp, CMAC_IBCR0, RTL_CMAC_R8(tp, CMAC_IBCR0) | BIT_0); + } +} + +static void rtl8126_dash2_disable_txrx(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { + rtl8126_dash2_disable_tx(tp); + rtl8126_dash2_disable_rx(tp); + } +} + +static int rtl8126_wait_dash_fw_ready(struct rtl8126_private *tp) +{ + int rc = -1; + int timeout; + + if (HW_DASH_SUPPORT_TYPE_2(tp) == FALSE && + HW_DASH_SUPPORT_TYPE_3(tp) == FALSE) + goto out; + + if (!tp->DASH) + goto out; + + for (timeout = 0; timeout < 10; timeout++) { + mdelay(10); + if (rtl8126_ocp_read(tp, 0x124, 1) & BIT_0) { + rc = 1; + goto out; + } + } + + rc = 0; + +out: + return rc; +} + +static void rtl8126_driver_start(struct rtl8126_private *tp) +{ + u32 tmp_value; + + if (HW_DASH_SUPPORT_TYPE_2(tp) == FALSE && + HW_DASH_SUPPORT_TYPE_3(tp) == FALSE) + return; + + if (!tp->AllowAccessDashOcp) + return; + + rtl8126_ocp_write(tp, 0x180, 1, OOB_CMD_DRIVER_START); + tmp_value = rtl8126_ocp_read(tp, 0x30, 1); + tmp_value |= BIT_0; + rtl8126_ocp_write(tp, 0x30, 1, tmp_value); + + rtl8126_wait_dash_fw_ready(tp); +} + +static void rtl8126_driver_stop(struct rtl8126_private *tp) +{ + u32 tmp_value; + struct net_device *dev = tp->dev; + + if (HW_DASH_SUPPORT_TYPE_2(tp) == FALSE && + HW_DASH_SUPPORT_TYPE_3(tp) == FALSE) + return; + + if (!tp->AllowAccessDashOcp) + return; + + rtl8126_dash2_disable_txrx(dev); + + rtl8126_ocp_write(tp, 0x180, 1, OOB_CMD_DRIVER_STOP); + tmp_value = rtl8126_ocp_read(tp, 0x30, 1); + tmp_value |= BIT_0; + rtl8126_ocp_write(tp, 0x30, 1, tmp_value); + + rtl8126_wait_dash_fw_ready(tp); +} + +void rtl8126_ephy_write(struct rtl8126_private *tp, int RegAddr, int value) +{ + int i; + + RTL_W32(tp, EPHYAR, + EPHYAR_Write | + (RegAddr & EPHYAR_Reg_Mask_v2) << EPHYAR_Reg_shift | + (value & EPHYAR_Data_Mask)); + + for (i = 0; i < R8126_CHANNEL_WAIT_COUNT; i++) { + udelay(R8126_CHANNEL_WAIT_TIME); + + /* Check if the RTL8125 has completed EPHY write */ + if (!(RTL_R32(tp, EPHYAR) & EPHYAR_Flag)) + break; + } + + udelay(R8126_CHANNEL_EXIT_DELAY_TIME); +} + +u16 rtl8126_ephy_read(struct rtl8126_private *tp, int RegAddr) +{ + int i; + u16 value = 0xffff; + + RTL_W32(tp, EPHYAR, + EPHYAR_Read | (RegAddr & EPHYAR_Reg_Mask_v2) << EPHYAR_Reg_shift); + + for (i = 0; i < R8126_CHANNEL_WAIT_COUNT; i++) { + udelay(R8126_CHANNEL_WAIT_TIME); + + /* Check if the RTL8125 has completed EPHY read */ + if (RTL_R32(tp, EPHYAR) & EPHYAR_Flag) { + value = (u16) (RTL_R32(tp, EPHYAR) & EPHYAR_Data_Mask); + break; + } + } + + udelay(R8126_CHANNEL_EXIT_DELAY_TIME); + + return value; +} + +/* +static void ClearAndSetPCIePhyBit(struct rtl8126_private *tp, u8 addr, u16 clearmask, u16 setmask) +{ + u16 EphyValue; + + EphyValue = rtl8126_ephy_read(tp, addr); + EphyValue &= ~clearmask; + EphyValue |= setmask; + rtl8126_ephy_write(tp, addr, EphyValue); +} + +static void ClearPCIePhyBit(struct rtl8126_private *tp, u8 addr, u16 mask) +{ + ClearAndSetPCIePhyBit(tp, + addr, + mask, + 0); +} + +static void SetPCIePhyBit(struct rtl8126_private *tp, u8 addr, u16 mask) +{ + ClearAndSetPCIePhyBit(tp, + addr, + 0, + mask); +} +*/ + +static u32 +rtl8126_csi_other_fun_read(struct rtl8126_private *tp, + u8 multi_fun_sel_bit, + u32 addr) +{ + u32 cmd; + int i; + u32 value = 0xffffffff; + + cmd = CSIAR_Read | CSIAR_ByteEn << CSIAR_ByteEn_shift | (addr & CSIAR_Addr_Mask); + + if (tp->mcfg == CFG_METHOD_DEFAULT) + multi_fun_sel_bit = 0; + + if (multi_fun_sel_bit > 7) + goto exit; + + cmd |= multi_fun_sel_bit << 16; + + RTL_W32(tp, CSIAR, cmd); + + for (i = 0; i < R8126_CHANNEL_WAIT_COUNT; i++) { + udelay(R8126_CHANNEL_WAIT_TIME); + + /* Check if the RTL8125 has completed CSI read */ + if (RTL_R32(tp, CSIAR) & CSIAR_Flag) { + value = (u32)RTL_R32(tp, CSIDR); + break; + } + } + + udelay(R8126_CHANNEL_EXIT_DELAY_TIME); + +exit: + return value; +} + +static void +rtl8126_csi_other_fun_write(struct rtl8126_private *tp, + u8 multi_fun_sel_bit, + u32 addr, + u32 value) +{ + u32 cmd; + int i; + + RTL_W32(tp, CSIDR, value); + cmd = CSIAR_Write | CSIAR_ByteEn << CSIAR_ByteEn_shift | (addr & CSIAR_Addr_Mask); + if (tp->mcfg == CFG_METHOD_DEFAULT) + multi_fun_sel_bit = 0; + + if (multi_fun_sel_bit > 7) + return; + + cmd |= multi_fun_sel_bit << 16; + + RTL_W32(tp, CSIAR, cmd); + + for (i = 0; i < R8126_CHANNEL_WAIT_COUNT; i++) { + udelay(R8126_CHANNEL_WAIT_TIME); + + /* Check if the RTL8125 has completed CSI write */ + if (!(RTL_R32(tp, CSIAR) & CSIAR_Flag)) + break; + } + + udelay(R8126_CHANNEL_EXIT_DELAY_TIME); +} + +static u32 +rtl8126_csi_read(struct rtl8126_private *tp, + u32 addr) +{ + u8 multi_fun_sel_bit; + + multi_fun_sel_bit = 0; + + return rtl8126_csi_other_fun_read(tp, multi_fun_sel_bit, addr); +} + +static void +rtl8126_csi_write(struct rtl8126_private *tp, + u32 addr, + u32 value) +{ + u8 multi_fun_sel_bit; + + multi_fun_sel_bit = 0; + + rtl8126_csi_other_fun_write(tp, multi_fun_sel_bit, addr, value); +} + +static u8 +rtl8126_csi_fun0_read_byte(struct rtl8126_private *tp, + u32 addr) +{ + u8 RetVal = 0; + + if (tp->mcfg == CFG_METHOD_DEFAULT) { + struct pci_dev *pdev = tp->pci_dev; + + pci_read_config_byte(pdev, addr, &RetVal); + } else { + u32 TmpUlong; + u16 RegAlignAddr; + u8 ShiftByte; + + RegAlignAddr = addr & ~(0x3); + ShiftByte = addr & (0x3); + TmpUlong = rtl8126_csi_other_fun_read(tp, 0, RegAlignAddr); + TmpUlong >>= (8*ShiftByte); + RetVal = (u8)TmpUlong; + } + + udelay(R8126_CHANNEL_EXIT_DELAY_TIME); + + return RetVal; +} + +static void +rtl8126_csi_fun0_write_byte(struct rtl8126_private *tp, + u32 addr, + u8 value) +{ + if (tp->mcfg == CFG_METHOD_DEFAULT) { + struct pci_dev *pdev = tp->pci_dev; + + pci_write_config_byte(pdev, addr, value); + } else { + u32 TmpUlong; + u16 RegAlignAddr; + u8 ShiftByte; + + RegAlignAddr = addr & ~(0x3); + ShiftByte = addr & (0x3); + TmpUlong = rtl8126_csi_other_fun_read(tp, 0, RegAlignAddr); + TmpUlong &= ~(0xFF << (8*ShiftByte)); + TmpUlong |= (value << (8*ShiftByte)); + rtl8126_csi_other_fun_write(tp, 0, RegAlignAddr, TmpUlong); + } + + udelay(R8126_CHANNEL_EXIT_DELAY_TIME); +} + +u32 rtl8126_eri_read_with_oob_base_address(struct rtl8126_private *tp, int addr, int len, int type, const u32 base_address) +{ + int i, val_shift, shift = 0; + u32 value1 = 0, value2 = 0, mask; + u32 eri_cmd; + const u32 transformed_base_address = ((base_address & 0x00FFF000) << 6) | (base_address & 0x000FFF); + + if (len > 4 || len <= 0) + return -1; + + while (len > 0) { + val_shift = addr % ERIAR_Addr_Align; + addr = addr & ~0x3; + + eri_cmd = ERIAR_Read | + transformed_base_address | + type << ERIAR_Type_shift | + ERIAR_ByteEn << ERIAR_ByteEn_shift | + (addr & 0x0FFF); + if (addr & 0xF000) { + u32 tmp; + + tmp = addr & 0xF000; + tmp >>= 12; + eri_cmd |= (tmp << 20) & 0x00F00000; + } + + RTL_W32(tp, ERIAR, eri_cmd); + + for (i = 0; i < R8126_CHANNEL_WAIT_COUNT; i++) { + udelay(R8126_CHANNEL_WAIT_TIME); + + /* Check if the RTL8125 has completed ERI read */ + if (RTL_R32(tp, ERIAR) & ERIAR_Flag) + break; + } + + if (len == 1) mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF; + else if (len == 2) mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF; + else if (len == 3) mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF; + else mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF; + + value1 = RTL_R32(tp, ERIDR) & mask; + value2 |= (value1 >> val_shift * 8) << shift * 8; + + if (len <= 4 - val_shift) { + len = 0; + } else { + len -= (4 - val_shift); + shift = 4 - val_shift; + addr += 4; + } + } + + udelay(R8126_CHANNEL_EXIT_DELAY_TIME); + + return value2; +} + +u32 rtl8126_eri_read(struct rtl8126_private *tp, int addr, int len, int type) +{ + return rtl8126_eri_read_with_oob_base_address(tp, addr, len, type, 0); +} + +int rtl8126_eri_write_with_oob_base_address(struct rtl8126_private *tp, int addr, int len, u32 value, int type, const u32 base_address) +{ + int i, val_shift, shift = 0; + u32 value1 = 0, mask; + u32 eri_cmd; + const u32 transformed_base_address = ((base_address & 0x00FFF000) << 6) | (base_address & 0x000FFF); + + if (len > 4 || len <= 0) + return -1; + + while (len > 0) { + val_shift = addr % ERIAR_Addr_Align; + addr = addr & ~0x3; + + if (len == 1) mask = (0xFF << (val_shift * 8)) & 0xFFFFFFFF; + else if (len == 2) mask = (0xFFFF << (val_shift * 8)) & 0xFFFFFFFF; + else if (len == 3) mask = (0xFFFFFF << (val_shift * 8)) & 0xFFFFFFFF; + else mask = (0xFFFFFFFF << (val_shift * 8)) & 0xFFFFFFFF; + + value1 = rtl8126_eri_read_with_oob_base_address(tp, addr, 4, type, base_address) & ~mask; + value1 |= ((value << val_shift * 8) >> shift * 8); + + RTL_W32(tp, ERIDR, value1); + + eri_cmd = ERIAR_Write | + transformed_base_address | + type << ERIAR_Type_shift | + ERIAR_ByteEn << ERIAR_ByteEn_shift | + (addr & 0x0FFF); + if (addr & 0xF000) { + u32 tmp; + + tmp = addr & 0xF000; + tmp >>= 12; + eri_cmd |= (tmp << 20) & 0x00F00000; + } + + RTL_W32(tp, ERIAR, eri_cmd); + + for (i = 0; i < R8126_CHANNEL_WAIT_COUNT; i++) { + udelay(R8126_CHANNEL_WAIT_TIME); + + /* Check if the RTL8125 has completed ERI write */ + if (!(RTL_R32(tp, ERIAR) & ERIAR_Flag)) + break; + } + + if (len <= 4 - val_shift) { + len = 0; + } else { + len -= (4 - val_shift); + shift = 4 - val_shift; + addr += 4; + } + } + + udelay(R8126_CHANNEL_EXIT_DELAY_TIME); + + return 0; +} + +int rtl8126_eri_write(struct rtl8126_private *tp, int addr, int len, u32 value, int type) +{ + return rtl8126_eri_write_with_oob_base_address(tp, addr, len, value, type, NO_BASE_ADDRESS); +} + +static void +rtl8126_enable_rxdvgate(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_3); + mdelay(2); + break; + } +} + +static void +rtl8126_disable_rxdvgate(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_3); + mdelay(2); + break; + } +} + +static u8 +rtl8126_is_gpio_low(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + u8 gpio_low = FALSE; + + switch (tp->HwSuppCheckPhyDisableModeVer) { + case 3: + if (!(rtl8126_mac_ocp_read(tp, 0xDC04) & BIT_13)) + gpio_low = TRUE; + break; + } + + if (gpio_low) + dprintk("gpio is low.\n"); + + return gpio_low; +} + +static u8 +rtl8126_is_phy_disable_mode_enabled(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + u8 phy_disable_mode_enabled = FALSE; + + switch (tp->HwSuppCheckPhyDisableModeVer) { + case 3: + if (RTL_R8(tp, 0xF2) & BIT_5) + phy_disable_mode_enabled = TRUE; + break; + } + + if (phy_disable_mode_enabled) + dprintk("phy disable mode enabled.\n"); + + return phy_disable_mode_enabled; +} + +static u8 +rtl8126_is_in_phy_disable_mode(struct net_device *dev) +{ + u8 in_phy_disable_mode = FALSE; + + if (rtl8126_is_phy_disable_mode_enabled(dev) && rtl8126_is_gpio_low(dev)) + in_phy_disable_mode = TRUE; + + if (in_phy_disable_mode) + dprintk("Hardware is in phy disable mode.\n"); + + return in_phy_disable_mode; +} + +static bool +rtl8126_stop_all_request(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq); + + return 1; +} + +void +rtl8126_wait_txrx_fifo_empty(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int i; + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_stop_all_request(dev); + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + for (i = 0; i < 3000; i++) { + udelay(50); + if ((RTL_R8(tp, MCUCmd_reg) & (Txfifo_empty | Rxfifo_empty)) == (Txfifo_empty | Rxfifo_empty)) + break; + } + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + for (i = 0; i < 3000; i++) { + udelay(50); + if ((RTL_R16(tp, IntrMitigate) & (BIT_0 | BIT_1 | BIT_8)) == (BIT_0 | BIT_1 | BIT_8)) + break; + } + break; + } +} + +#ifdef ENABLE_DASH_SUPPORT + +static inline void +rtl8126_enable_dash2_interrupt(struct rtl8126_private *tp) +{ + if (!tp->DASH) + return; + + if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { + RTL_CMAC_W8(tp, CMAC_IBIMR0, (ISRIMR_DASH_TYPE2_ROK | ISRIMR_DASH_TYPE2_TOK | ISRIMR_DASH_TYPE2_TDU | ISRIMR_DASH_TYPE2_RDU | ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE)); + } +} + +static inline void +rtl8126_disable_dash2_interrupt(struct rtl8126_private *tp) +{ + if (!tp->DASH) + return; + + if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { + RTL_CMAC_W8(tp, CMAC_IBIMR0, 0); + } +} +#endif + +void +rtl8126_enable_hw_linkchg_interrupt(struct rtl8126_private *tp) +{ + switch (tp->HwCurrIsrVer) { + case 5: + RTL_W32(tp, IMR_V2_SET_REG_8125, ISRIMR_V5_LINKCHG); + break; + case 4: + RTL_W32(tp, IMR_V2_SET_REG_8125, ISRIMR_V4_LINKCHG); + break; + case 2: + case 3: + RTL_W32(tp, IMR_V2_SET_REG_8125, ISRIMR_V2_LINKCHG); + break; + case 1: + RTL_W32(tp, tp->imr_reg[0], LinkChg | RTL_R32(tp, tp->imr_reg[0])); + break; + } + +#ifdef ENABLE_DASH_SUPPORT + if (tp->DASH) + rtl8126_enable_dash2_interrupt(tp); +#endif +} + +static inline void +rtl8126_enable_hw_interrupt(struct rtl8126_private *tp) +{ + switch (tp->HwCurrIsrVer) { + case 2: + case 3: + case 4: + case 5: + RTL_W32(tp, IMR_V2_SET_REG_8125, tp->intr_mask); + break; + case 1: + RTL_W32(tp, tp->imr_reg[0], tp->intr_mask); + + if (R8126_MULTI_RX_Q(tp)) { + int i; + for (i=1; inum_rx_rings; i++) + RTL_W16(tp, tp->imr_reg[i], other_q_intr_mask); + } + break; + } + +#ifdef ENABLE_DASH_SUPPORT + if (tp->DASH) + rtl8126_enable_dash2_interrupt(tp); +#endif +} + +static inline void rtl8126_clear_hw_isr_v2(struct rtl8126_private *tp, + u32 message_id) +{ + RTL_W32(tp, ISR_V2_8125, BIT(message_id)); +} + +static inline void +rtl8126_disable_hw_interrupt(struct rtl8126_private *tp) +{ + if (tp->HwCurrIsrVer > 1) { + RTL_W32(tp, IMR_V2_CLEAR_REG_8125, 0xFFFFFFFF); + if (tp->HwCurrIsrVer > 3) + RTL_W32(tp, IMR_V4_L2_CLEAR_REG_8125, 0xFFFFFFFF); + } else { + RTL_W32(tp, tp->imr_reg[0], 0x0000); + + if (R8126_MULTI_RX_Q(tp)) { + int i; + for (i=1; inum_rx_rings; i++) + RTL_W16(tp, tp->imr_reg[i], 0); + } + +#ifdef ENABLE_DASH_SUPPORT + if (tp->DASH) + rtl8126_disable_dash2_interrupt(tp); +#endif + } +} + +static inline void +rtl8126_switch_to_hw_interrupt(struct rtl8126_private *tp) +{ + RTL_W32(tp, TIMER_INT0_8125, 0x0000); + + rtl8126_enable_hw_interrupt(tp); +} + +static inline void +rtl8126_switch_to_timer_interrupt(struct rtl8126_private *tp) +{ + if (tp->use_timer_interrupt) { + RTL_W32(tp, TIMER_INT0_8125, timer_count); + RTL_W32(tp, TCTR0_8125, timer_count); + RTL_W32(tp, tp->imr_reg[0], tp->timer_intr_mask); + +#ifdef ENABLE_DASH_SUPPORT + if (tp->DASH) + rtl8126_enable_dash2_interrupt(tp); +#endif + } else { + rtl8126_switch_to_hw_interrupt(tp); + } +} + +static void +rtl8126_irq_mask_and_ack(struct rtl8126_private *tp) +{ + rtl8126_disable_hw_interrupt(tp); + + if (tp->HwCurrIsrVer > 1) { + RTL_W32(tp, ISR_V2_8125, 0xFFFFFFFF); + if (tp->HwCurrIsrVer > 3) + RTL_W32(tp, ISR_V4_L2_8125, 0xFFFFFFFF); + } else { +#ifdef ENABLE_DASH_SUPPORT + if (tp->DASH) { + if (tp->dash_printer_enabled) { + RTL_W32(tp, tp->isr_reg[0], RTL_R32(tp, tp->isr_reg[0]) & + ~(ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET)); + } else { + if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { + RTL_CMAC_W8(tp, CMAC_IBISR0, RTL_CMAC_R8(tp, CMAC_IBISR0)); + } + } + } else { + RTL_W32(tp, tp->isr_reg[0], RTL_R32(tp, tp->isr_reg[0])); + } +#else + RTL_W32(tp, tp->isr_reg[0], RTL_R32(tp, tp->isr_reg[0])); +#endif + if (R8126_MULTI_RX_Q(tp)) { + int i; + for (i=1; inum_rx_rings; i++) + RTL_W16(tp, tp->isr_reg[i], RTL_R16(tp, tp->isr_reg[i])); + } + } +} + +static void +rtl8126_disable_rx_packet_filter(struct rtl8126_private *tp) +{ + + RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) & + ~(AcceptErr | AcceptRunt |AcceptBroadcast | AcceptMulticast | + AcceptMyPhys | AcceptAllPhys)); +} + +static void +rtl8126_nic_reset(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int i; + + rtl8126_disable_rx_packet_filter(tp); + + rtl8126_enable_rxdvgate(dev); + + rtl8126_stop_all_request(dev); + + rtl8126_wait_txrx_fifo_empty(dev); + + mdelay(2); + + /* Soft reset the chip. */ + RTL_W8(tp, ChipCmd, CmdReset); + + /* Check that the chip has finished the reset. */ + for (i = 100; i > 0; i--) { + udelay(100); + if ((RTL_R8(tp, ChipCmd) & CmdReset) == 0) + break; + } + + /* reset rcr */ + RTL_W32(tp, RxConfig, (RX_DMA_BURST_512 << RxCfgDMAShift)); +} + +static void +rtl8126_hw_set_interrupt_type(struct rtl8126_private *tp, u8 isr_ver) +{ + u8 tmp; + + if (tp->HwSuppIsrVer < 2) + return; + + tmp = RTL_R8(tp, INT_CFG0_8125); + + switch (tp->HwSuppIsrVer) { + case 4: + case 5: + tmp &= ~INT_CFG0_MSIX_ENTRY_NUM_MODE; + fallthrough; + case 2: + case 3: + tmp &= ~(INT_CFG0_ENABLE_8125); + if (isr_ver > 1) + tmp |= INT_CFG0_ENABLE_8125; + break; + default: + return; + } + + RTL_W8(tp, INT_CFG0_8125, tmp); +} + +static void +rtl8126_hw_clear_timer_int(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + RTL_W32(tp, TIMER_INT0_8125, 0x0000); + RTL_W32(tp, TIMER_INT1_8125, 0x0000); + RTL_W32(tp, TIMER_INT2_8125, 0x0000); + RTL_W32(tp, TIMER_INT3_8125, 0x0000); + break; + } +} + +static void +rtl8126_hw_clear_int_miti(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int i; + + switch (tp->HwSuppIntMitiVer) { + case 3: + case 6: + //IntMITI_0-IntMITI_31 + for (i=0xA00; i<0xB00; i+=4) + RTL_W32(tp, i, 0x0000); + break; + case 4: + case 5: + //IntMITI_0-IntMITI_15 + for (i = 0xA00; i < 0xA80; i += 4) + RTL_W32(tp, i, 0x0000); + + if (tp->HwSuppIntMitiVer == 5) + RTL_W8(tp, INT_CFG0_8125, RTL_R8(tp, INT_CFG0_8125) & + ~(INT_CFG0_TIMEOUT0_BYPASS_8125 | + INT_CFG0_MITIGATION_BYPASS_8125 | + INT_CFG0_RDU_BYPASS_8126)); + else + RTL_W8(tp, INT_CFG0_8125, RTL_R8(tp, INT_CFG0_8125) & + ~(INT_CFG0_TIMEOUT0_BYPASS_8125 | INT_CFG0_MITIGATION_BYPASS_8125)); + + RTL_W16(tp, INT_CFG1_8125, 0x0000); + break; + } +} + +void +rtl8126_hw_set_timer_int_8125(struct rtl8126_private *tp, + u32 message_id, + u8 timer_intmiti_val) +{ + switch (tp->HwSuppIntMitiVer) { + case 4: +#ifdef ENABLE_LIB_SUPPORT + if (message_id < R8126_MAX_RX_QUEUES_VEC_V3) + timer_intmiti_val = 0; +#else + if ((tp->HwCurrIsrVer == 2) && (message_id < R8126_MAX_RX_QUEUES_VEC_V3)) + timer_intmiti_val = 0; +#endif //ENABLE_LIB_SUPPORT + if (message_id < R8126_MAX_RX_QUEUES_VEC_V3) //ROK + RTL_W8(tp,INT_MITI_V2_0_RX + 8 * message_id, timer_intmiti_val); + if (message_id == 16) //TOK + RTL_W8(tp,INT_MITI_V2_0_TX, timer_intmiti_val); + if (message_id == 18 && tp->num_tx_rings > 0) //TOK + RTL_W8(tp,INT_MITI_V2_1_TX, timer_intmiti_val); + break; + case 5: + case 6: + if (message_id < R8126_MAX_RX_QUEUES_VEC_V3) //ROK + RTL_W8(tp,INT_MITI_V2_0_RX + 8 * message_id, timer_intmiti_val); + if (message_id == 0) //TOK + RTL_W8(tp,INT_MITI_V2_0_TX, timer_intmiti_val); + if (message_id == 1 && tp->num_tx_rings > 0) //TOK + RTL_W8(tp,INT_MITI_V2_1_TX, timer_intmiti_val); + break; + } +} + +void +rtl8126_hw_reset(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + rtl8126_lib_reset_prepare(tp); + + /* Disable interrupts */ + rtl8126_irq_mask_and_ack(tp); + + rtl8126_hw_clear_timer_int(dev); + + rtl8126_nic_reset(dev); +} + +static unsigned int +rtl8126_xmii_reset_pending(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + unsigned int retval; + + rtl8126_mdio_write(tp, 0x1f, 0x0000); + retval = rtl8126_mdio_read(tp, MII_BMCR) & BMCR_RESET; + + return retval; +} + +static unsigned int +rtl8126_xmii_link_ok(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + u16 status; + + status = RTL_R16(tp, PHYstatus); + if (status == 0xffff) + return 0; + + return (status & LinkStatus) ? 1 : 0; +} + +static int +rtl8126_wait_phy_reset_complete(struct rtl8126_private *tp) +{ + int i, val; + + for (i = 0; i < 2500; i++) { + val = rtl8126_mdio_read(tp, MII_BMCR) & BMCR_RESET; + if (!val) + return 0; + + mdelay(1); + } + + return -1; +} + +static void +rtl8126_xmii_reset_enable(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + if (rtl8126_is_in_phy_disable_mode(dev)) + return; + + rtl8126_mdio_write(tp, 0x1f, 0x0000); + rtl8126_mdio_write(tp, MII_ADVERTISE, rtl8126_mdio_read(tp, MII_ADVERTISE) & + ~(ADVERTISE_10HALF | ADVERTISE_10FULL | + ADVERTISE_100HALF | ADVERTISE_100FULL)); + rtl8126_mdio_write(tp, MII_CTRL1000, rtl8126_mdio_read(tp, MII_CTRL1000) & + ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL)); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA5D4, rtl8126_mdio_direct_read_phy_ocp(tp, 0xA5D4) & + ~(RTK_ADVERTISE_2500FULL | RTK_ADVERTISE_5000FULL)); + rtl8126_mdio_write(tp, MII_BMCR, BMCR_RESET | BMCR_ANENABLE); + + if (rtl8126_wait_phy_reset_complete(tp) == 0) + return; + + if (netif_msg_link(tp)) + printk(KERN_ERR "%s: PHY reset failed.\n", dev->name); +} + +void +rtl8126_init_ring_indexes(struct rtl8126_private *tp) +{ + int i; + + for (i = 0; i < tp->HwSuppNumTxQueues; i++) { + struct rtl8126_tx_ring *ring = &tp->tx_ring[i]; + ring->dirty_tx = ring->cur_tx = 0; + ring->NextHwDesCloPtr = 0; + ring->BeginHwDesCloPtr = 0; + ring->index = i; + ring->priv = tp; + ring->netdev = tp->dev; + + /* reset BQL for queue */ + netdev_tx_reset_queue(txring_txq(ring)); + } + + for (i = 0; i < tp->HwSuppNumRxQueues; i++) { + struct rtl8126_rx_ring *ring = &tp->rx_ring[i]; + ring->dirty_rx = ring->cur_rx = 0; + ring->index = i; + ring->priv = tp; + ring->netdev = tp->dev; + } + +#ifdef ENABLE_LIB_SUPPORT + for (i = 0; i < tp->HwSuppNumTxQueues; i++) { + struct rtl8126_ring *ring = &tp->lib_tx_ring[i]; + ring->direction = RTL8126_CH_DIR_TX; + ring->queue_num = i; + ring->private = tp; + } + + for (i = 0; i < tp->HwSuppNumRxQueues; i++) { + struct rtl8126_ring *ring = &tp->lib_rx_ring[i]; + ring->direction = RTL8126_CH_DIR_RX; + ring->queue_num = i; + ring->private = tp; + } +#endif +} + +static void +rtl8126_issue_offset_99_event(struct rtl8126_private *tp) +{ + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_mac_ocp_write(tp, 0xE09A, rtl8126_mac_ocp_read(tp, 0xE09A) | BIT_0); + break; + } +} + +#ifdef ENABLE_DASH_SUPPORT +static void +NICChkTypeEnableDashInterrupt(struct rtl8126_private *tp) +{ + if (tp->DASH) { + // + // even disconnected, enable 3 dash interrupt mask bits for in-band/out-band communication + // + if (HW_DASH_SUPPORT_TYPE_2(tp) || HW_DASH_SUPPORT_TYPE_3(tp)) { + rtl8126_enable_dash2_interrupt(tp); + RTL_W16(tp, IntrMask, (ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET)); + } + } +} +#endif + +static int rtl8126_enable_eee_plus(struct rtl8126_private *tp) +{ + int ret; + + ret = 0; + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_mac_ocp_write(tp, 0xE080, rtl8126_mac_ocp_read(tp, 0xE080)|BIT_1); + break; + default: +// dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support EEEPlus\n"); + ret = -EOPNOTSUPP; + break; + } + + return ret; +} + +static int rtl8126_disable_eee_plus(struct rtl8126_private *tp) +{ + int ret; + + ret = 0; + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_mac_ocp_write(tp, 0xE080, rtl8126_mac_ocp_read(tp, 0xE080)&~BIT_1); + break; + default: +// dev_printk(KERN_DEBUG, tp_to_dev(tp), "Not Support EEEPlus\n"); + ret = -EOPNOTSUPP; + break; + } + + return ret; +} + +static void rtl8126_enable_double_vlan(struct rtl8126_private *tp) +{ + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + RTL_W16(tp, DOUBLE_VLAN_CONFIG, 0xf002); + break; + default: + break; + } +} + +static void rtl8126_disable_double_vlan(struct rtl8126_private *tp) +{ + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + RTL_W16(tp, DOUBLE_VLAN_CONFIG, 0); + break; + default: + break; + } +} + +static void +rtl8126_link_on_patch(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + rtl8126_hw_config(dev); + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + if (RTL_R8(tp, PHYstatus) & _10bps) + rtl8126_enable_eee_plus(tp); + break; + default: + break; + } + + rtl8126_hw_start(dev); + + netif_carrier_on(dev); + + netif_tx_wake_all_queues(dev); + + tp->phy_reg_aner = rtl8126_mdio_read(tp, MII_EXPANSION); + tp->phy_reg_anlpar = rtl8126_mdio_read(tp, MII_LPA); + tp->phy_reg_gbsr = rtl8126_mdio_read(tp, MII_STAT1000); + tp->phy_reg_status_2500 = rtl8126_mdio_direct_read_phy_ocp(tp, 0xA5D6); +} + +static void +rtl8126_link_down_patch(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + tp->phy_reg_aner = 0; + tp->phy_reg_anlpar = 0; + tp->phy_reg_gbsr = 0; + tp->phy_reg_status_2500 = 0; + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_disable_eee_plus(tp); + break; + default: + break; + } + + netif_carrier_off(dev); + + netif_tx_disable(dev); + + rtl8126_hw_reset(dev); + + rtl8126_tx_clear(tp); + + rtl8126_rx_clear(tp); + + rtl8126_init_ring(dev); + + rtl8126_enable_hw_linkchg_interrupt(tp); + + //rtl8126_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising); + +#ifdef ENABLE_DASH_SUPPORT + if (tp->DASH) { + NICChkTypeEnableDashInterrupt(tp); + } +#endif +} + +static void +_rtl8126_check_link_status(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + if (tp->link_ok(dev)) { + rtl8126_link_on_patch(dev); + + if (netif_msg_ifup(tp)) + printk(KERN_INFO PFX "%s: link up\n", dev->name); + } else { + if (netif_msg_ifdown(tp)) + printk(KERN_INFO PFX "%s: link down\n", dev->name); + + rtl8126_link_down_patch(dev); + } +} + +static void +rtl8126_check_link_status(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + _rtl8126_check_link_status(dev); + + tp->resume_not_chg_speed = 0; +} + +static bool +rtl8126_is_autoneg_mode_valid(u32 autoneg) +{ + switch(autoneg) { + case AUTONEG_ENABLE: + case AUTONEG_DISABLE: + return true; + default: + return false; + } +} + +static bool +rtl8126_is_speed_mode_valid(u32 speed) +{ + switch(speed) { + case SPEED_5000: + case SPEED_2500: + case SPEED_1000: + case SPEED_100: + case SPEED_10: + return true; + default: + return false; + } +} + +static bool +rtl8126_is_duplex_mode_valid(u8 duplex) +{ + switch(duplex) { + case DUPLEX_FULL: + case DUPLEX_HALF: + return true; + default: + return false; + } +} + +static void +rtl8126_set_link_option(struct rtl8126_private *tp, + u8 autoneg, + u32 speed, + u8 duplex, + enum rtl8126_fc_mode fc) +{ + u64 adv; + + if (!rtl8126_is_speed_mode_valid(speed)) + speed = SPEED_5000; + + if (!rtl8126_is_duplex_mode_valid(duplex)) + duplex = DUPLEX_FULL; + + if (!rtl8126_is_autoneg_mode_valid(autoneg)) + autoneg = AUTONEG_ENABLE; + + speed = min(speed, tp->HwSuppMaxPhyLinkSpeed); + + adv = 0; + switch(speed) { + case SPEED_5000: + adv |= RTK_ADVERTISED_5000baseX_Full; + fallthrough; + case SPEED_2500: + adv |= ADVERTISED_2500baseX_Full; + fallthrough; + default: + adv |= (ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full | + ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full | + ADVERTISED_1000baseT_Half | ADVERTISED_1000baseT_Full); + break; + } + + tp->autoneg = autoneg; + tp->speed = speed; + tp->duplex = duplex; + tp->advertising = adv; + tp->fcpause = fc; +} + +static void +rtl8126_wait_ll_share_fifo_ready(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int i; + + for (i = 0; i < 10; i++) { + udelay(100); + if (RTL_R16(tp, 0xD2) & BIT_9) + break; + } +} + +static void +rtl8126_disable_pci_offset_99(struct rtl8126_private *tp) +{ + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_mac_ocp_write(tp, 0xE032, rtl8126_mac_ocp_read(tp, 0xE032) & ~(BIT_0 | BIT_1)); + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_csi_fun0_write_byte(tp, 0x99, 0x00); + break; + } +} + +static void +rtl8126_enable_pci_offset_99(struct rtl8126_private *tp) +{ + u32 csi_tmp; + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_csi_fun0_write_byte(tp, 0x99, tp->org_pci_offset_99); + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + csi_tmp = rtl8126_mac_ocp_read(tp, 0xE032); + csi_tmp &= ~(BIT_0 | BIT_1); + if (tp->org_pci_offset_99 & (BIT_5 | BIT_6)) + csi_tmp |= BIT_1; + if (tp->org_pci_offset_99 & BIT_2) + csi_tmp |= BIT_0; + rtl8126_mac_ocp_write(tp, 0xE032, csi_tmp); + break; + } +} + +static void +rtl8126_init_pci_offset_99(struct rtl8126_private *tp) +{ + u32 csi_tmp; + + switch (tp->mcfg) { + case CFG_METHOD_1: + rtl8126_mac_ocp_write(tp, 0xCDD0, 0x9003); + csi_tmp = rtl8126_mac_ocp_read(tp, 0xE034); + csi_tmp |= (BIT_15 | BIT_14); + rtl8126_mac_ocp_write(tp, 0xE034, csi_tmp); + rtl8126_mac_ocp_write(tp, 0xCDD2, 0x889C); + rtl8126_mac_ocp_write(tp, 0xCDD8, 0x9003); + rtl8126_mac_ocp_write(tp, 0xCDD4, 0x8C30); + rtl8126_mac_ocp_write(tp, 0xCDDA, 0x9003); + rtl8126_mac_ocp_write(tp, 0xCDD6, 0x9003); + rtl8126_mac_ocp_write(tp, 0xCDDC, 0x9003); + rtl8126_mac_ocp_write(tp, 0xCDE8, 0x883E); + rtl8126_mac_ocp_write(tp, 0xCDEA, 0x9003); + rtl8126_mac_ocp_write(tp, 0xCDEC, 0x889C); + rtl8126_mac_ocp_write(tp, 0xCDEE, 0x9003); + rtl8126_mac_ocp_write(tp, 0xCDF0, 0x8C09); + rtl8126_mac_ocp_write(tp, 0xCDF2, 0x9003); + csi_tmp = rtl8126_mac_ocp_read(tp, 0xE032); + csi_tmp |= (BIT_14); + rtl8126_mac_ocp_write(tp, 0xE032, csi_tmp); + csi_tmp = rtl8126_mac_ocp_read(tp, 0xE0A2); + csi_tmp |= (BIT_0); + rtl8126_mac_ocp_write(tp, 0xE0A2, csi_tmp); + break; + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_mac_ocp_write(tp, 0xCDD0, 0x9003); + csi_tmp = rtl8126_mac_ocp_read(tp, 0xE034); + csi_tmp |= (BIT_15 | BIT_14); + rtl8126_mac_ocp_write(tp, 0xE034, csi_tmp); + rtl8126_mac_ocp_write(tp, 0xCDD2, 0x8A71); + rtl8126_mac_ocp_write(tp, 0xCDD8, 0x9003); + rtl8126_mac_ocp_write(tp, 0xCDD4, 0x9003); + rtl8126_mac_ocp_write(tp, 0xCDDA, 0x9003); + rtl8126_mac_ocp_write(tp, 0xCDD6, 0x9003); + rtl8126_mac_ocp_write(tp, 0xCDDC, 0x9003); + rtl8126_mac_ocp_write(tp, 0xCDE8, 0x88FA); + rtl8126_mac_ocp_write(tp, 0xCDEA, 0x9003); + rtl8126_mac_ocp_write(tp, 0xCDEC, 0x89F4); + rtl8126_mac_ocp_write(tp, 0xCDEE, 0x9003); + rtl8126_mac_ocp_write(tp, 0xCDF0, 0x8C27); + rtl8126_mac_ocp_write(tp, 0xCDF2, 0x9003); + rtl8126_mac_ocp_write(tp, 0xCDF4, 0x887D); + rtl8126_mac_ocp_write(tp, 0xCDF6, 0x9003); + csi_tmp = rtl8126_mac_ocp_read(tp, 0xE032); + csi_tmp |= (BIT_14); + rtl8126_mac_ocp_write(tp, 0xE032, csi_tmp); + csi_tmp = rtl8126_mac_ocp_read(tp, 0xE0A2); + csi_tmp |= (BIT_0); + rtl8126_mac_ocp_write(tp, 0xE0A2, csi_tmp); + break; + } + + rtl8126_enable_pci_offset_99(tp); +} + +static void +rtl8126_disable_pci_offset_180(struct rtl8126_private *tp) +{ + u32 csi_tmp; + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + csi_tmp = rtl8126_mac_ocp_read(tp, 0xE092); + csi_tmp &= 0xFF00; + rtl8126_mac_ocp_write(tp, 0xE092, csi_tmp); + break; + } +} + +static void +rtl8126_enable_pci_offset_180(struct rtl8126_private *tp) +{ + u32 csi_tmp; + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + csi_tmp = rtl8126_mac_ocp_read(tp, 0xE094); + csi_tmp &= 0x00FF; + rtl8126_mac_ocp_write(tp, 0xE094, csi_tmp); + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + csi_tmp = rtl8126_mac_ocp_read(tp, 0xE092); + csi_tmp &= 0xFF00; + csi_tmp |= BIT_2; + rtl8126_mac_ocp_write(tp, 0xE092, csi_tmp); + break; + } +} + +static void +rtl8126_init_pci_offset_180(struct rtl8126_private *tp) +{ + rtl8126_enable_pci_offset_180(tp); +} + +static void +rtl8126_set_pci_99_180_exit_driver_para(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + if (tp->org_pci_offset_99 & BIT_2) + rtl8126_issue_offset_99_event(tp); + rtl8126_disable_pci_offset_99(tp); + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_disable_pci_offset_180(tp); + break; + } +} + +static void +rtl8126_enable_cfg9346_write(struct rtl8126_private *tp) +{ + RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) | Cfg9346_Unlock); +} + +static void +rtl8126_disable_cfg9346_write(struct rtl8126_private *tp) +{ + RTL_W8(tp, Cfg9346, RTL_R8(tp, Cfg9346) & ~Cfg9346_Unlock); +} + +static void +rtl8126_enable_exit_l1_mask(struct rtl8126_private *tp) +{ + //(1)ERI(0xD4)(OCP 0xC0AC).bit[7:12]=6'b111111, L1 Mask + rtl8126_set_mac_ocp_bit(tp, 0xC0AC, (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12)); +} + +static void +rtl8126_disable_exit_l1_mask(struct rtl8126_private *tp) +{ + //(1)ERI(0xD4)(OCP 0xC0AC).bit[7:12]=6'b000000, L1 Mask + rtl8126_clear_mac_ocp_bit(tp, 0xC0AC, (BIT_7 | BIT_8 | BIT_9 | BIT_10 | BIT_11 | BIT_12)); +} + +static void +rtl8126_enable_extend_tally_couter(struct rtl8126_private *tp) +{ + switch (tp->HwSuppExtendTallyCounterVer) { + case 1: + rtl8126_set_mac_ocp_bit(tp, 0xEA84, (BIT_1 | BIT_0)); + break; + } +} + +static void +rtl8126_disable_extend_tally_couter(struct rtl8126_private *tp) +{ + switch (tp->HwSuppExtendTallyCounterVer) { + case 1: + rtl8126_clear_mac_ocp_bit(tp, 0xEA84, (BIT_1 | BIT_0)); + break; + } +} + +static void +rtl8126_enable_force_clkreq(struct rtl8126_private *tp, bool enable) +{ + if (enable) + RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) | BIT_7); + else + RTL_W8(tp, 0xF1, RTL_R8(tp, 0xF1) & ~BIT_7); +} + +static void +rtl8126_enable_aspm_clkreq_lock(struct rtl8126_private *tp, bool enable) +{ + switch (tp->mcfg) { + case CFG_METHOD_1: + rtl8126_enable_cfg9346_write(tp); + if (enable) { + RTL_W8(tp, Config2, RTL_R8(tp, Config2) | BIT_7); + RTL_W8(tp, Config5, RTL_R8(tp, Config5) | BIT_0); + } else { + RTL_W8(tp, Config2, RTL_R8(tp, Config2) & ~BIT_7); + RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0); + } + rtl8126_disable_cfg9346_write(tp); + break; + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_enable_cfg9346_write(tp); + if (enable) { + RTL_W8(tp, INT_CFG0_8125, RTL_R8(tp, INT_CFG0_8125) | BIT_3); + RTL_W8(tp, Config5, RTL_R8(tp, Config5) | BIT_0); + } else { + RTL_W8(tp, INT_CFG0_8125, RTL_R8(tp, INT_CFG0_8125) & ~BIT_3); + RTL_W8(tp, Config5, RTL_R8(tp, Config5) & ~BIT_0); + } + rtl8126_disable_cfg9346_write(tp); + break; + } +} + +static void +rtl8126_hw_d3_para(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + RTL_W16(tp, RxMaxSize, RX_BUF_SIZE); + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_enable_force_clkreq(tp, 0); + rtl8126_enable_aspm_clkreq_lock(tp, 0); + break; + } + + rtl8126_disable_exit_l1_mask(tp); + +#ifdef ENABLE_REALWOW_SUPPORT + rtl8126_set_realwow_d3_para(dev); +#endif + + rtl8126_set_pci_99_180_exit_driver_para(dev); + + rtl8126_disable_rxdvgate(dev); + + rtl8126_disable_extend_tally_couter(tp); +} + +static void +rtl8126_enable_magic_packet(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->HwSuppMagicPktVer) { + case WAKEUP_MAGIC_PACKET_V3: + rtl8126_mac_ocp_write(tp, 0xC0B6, rtl8126_mac_ocp_read(tp, 0xC0B6) | BIT_0); + break; + } +} +static void +rtl8126_disable_magic_packet(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->HwSuppMagicPktVer) { + case WAKEUP_MAGIC_PACKET_V3: + rtl8126_mac_ocp_write(tp, 0xC0B6, rtl8126_mac_ocp_read(tp, 0xC0B6) & ~BIT_0); + break; + } +} + +static void +rtl8126_enable_linkchg_wakeup(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->HwSuppLinkChgWakeUpVer) { + case 3: + RTL_W8(tp, Config3, RTL_R8(tp, Config3) | LinkUp); + rtl8126_clear_set_mac_ocp_bit(tp, 0xE0C6, (BIT_5 | BIT_3 | BIT_2), (BIT_4 | BIT_1 | BIT_0)); + break; + } +} + +static void +rtl8126_disable_linkchg_wakeup(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->HwSuppLinkChgWakeUpVer) { + case 3: + RTL_W8(tp, Config3, RTL_R8(tp, Config3) & ~LinkUp); + rtl8126_clear_mac_ocp_bit(tp, 0xE0C6, (BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0)); + break; + } +} + +#define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST) + +static u32 +rtl8126_get_hw_wol(struct rtl8126_private *tp) +{ + u8 options; + u32 csi_tmp; + u32 wol_opts = 0; + + if (disable_wol_support) + goto out; + + options = RTL_R8(tp, Config1); + if (!(options & PMEnable)) + goto out; + + options = RTL_R8(tp, Config3); + if (options & LinkUp) + wol_opts |= WAKE_PHY; + + switch (tp->HwSuppMagicPktVer) { + case WAKEUP_MAGIC_PACKET_V3: + csi_tmp = rtl8126_mac_ocp_read(tp, 0xC0B6); + if (csi_tmp & BIT_0) + wol_opts |= WAKE_MAGIC; + break; + } + + options = RTL_R8(tp, Config5); + if (options & UWF) + wol_opts |= WAKE_UCAST; + if (options & BWF) + wol_opts |= WAKE_BCAST; + if (options & MWF) + wol_opts |= WAKE_MCAST; + +out: + return wol_opts; +} + +static void +rtl8126_enable_d0_speedup(struct rtl8126_private *tp) +{ + u16 clearmask; + u16 setmask; + + if (FALSE == HW_SUPPORT_D0_SPEED_UP(tp)) + return; + + if (tp->D0SpeedUpSpeed == D0_SPEED_UP_SPEED_DISABLE) + return; + + if (tp->HwSuppD0SpeedUpVer == 1 || tp->HwSuppD0SpeedUpVer == 2) { + //speed up speed + clearmask = (BIT_10 | BIT_9 | BIT_8 | BIT_7); + if (tp->D0SpeedUpSpeed == D0_SPEED_UP_SPEED_2500) + setmask = BIT_7; + else if (tp->D0SpeedUpSpeed == D0_SPEED_UP_SPEED_5000) + setmask = BIT_8; + else + setmask = 0; + rtl8126_clear_set_mac_ocp_bit(tp, 0xE10A, clearmask, setmask); + + //speed up flowcontrol + clearmask = (BIT_15 | BIT_14); + if (tp->HwSuppD0SpeedUpVer == 2) + clearmask |= BIT_13; + + if (tp->fcpause == rtl8126_fc_full) { + setmask = (BIT_15 | BIT_14); + if (tp->HwSuppD0SpeedUpVer == 2) + setmask |= BIT_13; + } else + setmask = 0; + rtl8126_clear_set_mac_ocp_bit(tp, 0xE860, clearmask, setmask); + } + + RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_3); +} + +static void +rtl8126_disable_d0_speedup(struct rtl8126_private *tp) +{ + if (FALSE == HW_SUPPORT_D0_SPEED_UP(tp)) + return; + + RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~BIT_3); +} + +static void +rtl8126_set_hw_wol(struct net_device *dev, u32 wolopts) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int i,tmp; + static struct { + u32 opt; + u16 reg; + u8 mask; + } cfg[] = { + { WAKE_PHY, Config3, LinkUp }, + { WAKE_UCAST, Config5, UWF }, + { WAKE_BCAST, Config5, BWF }, + { WAKE_MCAST, Config5, MWF }, + { WAKE_ANY, Config5, LanWake }, + { WAKE_MAGIC, Config3, MagicPacket }, + }; + + switch (tp->HwSuppMagicPktVer) { + case WAKEUP_MAGIC_PACKET_V3: + default: + tmp = ARRAY_SIZE(cfg) - 1; + + if (wolopts & WAKE_MAGIC) + rtl8126_enable_magic_packet(dev); + else + rtl8126_disable_magic_packet(dev); + break; + } + + rtl8126_enable_cfg9346_write(tp); + + for (i = 0; i < tmp; i++) { + u8 options = RTL_R8(tp, cfg[i].reg) & ~cfg[i].mask; + if (wolopts & cfg[i].opt) + options |= cfg[i].mask; + RTL_W8(tp, cfg[i].reg, options); + } + + switch (tp->HwSuppLinkChgWakeUpVer) { + case 3: + if (wolopts & WAKE_PHY) + rtl8126_enable_linkchg_wakeup(dev); + else + rtl8126_disable_linkchg_wakeup(dev); + break; + } + + rtl8126_disable_cfg9346_write(tp); +} + +static void +rtl8126_phy_restart_nway(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + if (rtl8126_is_in_phy_disable_mode(dev)) + return; + + rtl8126_mdio_write(tp, 0x1F, 0x0000); + rtl8126_mdio_write(tp, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART); +} + +static void +rtl8126_phy_setup_force_mode(struct net_device *dev, u32 speed, u8 duplex) +{ + struct rtl8126_private *tp = netdev_priv(dev); + u16 bmcr_true_force = 0; + + if (rtl8126_is_in_phy_disable_mode(dev)) + return; + + if ((speed == SPEED_10) && (duplex == DUPLEX_HALF)) { + bmcr_true_force = BMCR_SPEED10; + } else if ((speed == SPEED_10) && (duplex == DUPLEX_FULL)) { + bmcr_true_force = BMCR_SPEED10 | BMCR_FULLDPLX; + } else if ((speed == SPEED_100) && (duplex == DUPLEX_HALF)) { + bmcr_true_force = BMCR_SPEED100; + } else if ((speed == SPEED_100) && (duplex == DUPLEX_FULL)) { + bmcr_true_force = BMCR_SPEED100 | BMCR_FULLDPLX; + } else { + netif_err(tp, drv, dev, "Failed to set phy force mode!\n"); + return; + } + + rtl8126_mdio_write(tp, 0x1F, 0x0000); + rtl8126_mdio_write(tp, MII_BMCR, bmcr_true_force); +} + +static void +rtl8126_set_pci_pme(struct rtl8126_private *tp, int set) +{ + struct pci_dev *pdev = tp->pci_dev; + u16 pmc; + + if (!pdev->pm_cap) + return; + + pci_read_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, &pmc); + pmc |= PCI_PM_CTRL_PME_STATUS; + if (set) + pmc |= PCI_PM_CTRL_PME_ENABLE; + else + pmc &= ~PCI_PM_CTRL_PME_ENABLE; + pci_write_config_word(pdev, pdev->pm_cap + PCI_PM_CTRL, pmc); +} + +static void +rtl8126_set_wol_link_speed(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int auto_nego; + int giga_ctrl; + int ctrl_2500; + u64 adv; + u16 anlpar; + u16 gbsr; + u16 status_2500; + u16 aner; + + if (tp->autoneg != AUTONEG_ENABLE) + goto exit; + + rtl8126_mdio_write(tp, 0x1F, 0x0000); + + auto_nego = rtl8126_mdio_read(tp, MII_ADVERTISE); + auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL + | ADVERTISE_100HALF | ADVERTISE_100FULL); + + giga_ctrl = rtl8126_mdio_read(tp, MII_CTRL1000); + giga_ctrl &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL); + + ctrl_2500 = rtl8126_mdio_direct_read_phy_ocp(tp, 0xA5D4); + ctrl_2500 &= ~(RTK_ADVERTISE_2500FULL | RTK_ADVERTISE_5000FULL); + + aner = tp->phy_reg_aner; + anlpar = tp->phy_reg_anlpar; + gbsr = tp->phy_reg_gbsr; + status_2500 = tp->phy_reg_status_2500; + if (tp->link_ok(dev)) { + aner = rtl8126_mdio_read(tp, MII_EXPANSION); + anlpar = rtl8126_mdio_read(tp, MII_LPA); + gbsr = rtl8126_mdio_read(tp, MII_STAT1000); + status_2500 = rtl8126_mdio_direct_read_phy_ocp(tp, 0xA5D6); + } + + adv = tp->advertising; + if ((aner | anlpar | gbsr | status_2500) == 0) { + int auto_nego_tmp = 0; + if (adv & ADVERTISED_10baseT_Half) + auto_nego_tmp |= ADVERTISE_10HALF; + if (adv & ADVERTISED_10baseT_Full) + auto_nego_tmp |= ADVERTISE_10FULL; + if (adv & ADVERTISED_100baseT_Half) + auto_nego_tmp |= ADVERTISE_100HALF; + if (adv & ADVERTISED_100baseT_Full) + auto_nego_tmp |= ADVERTISE_100FULL; + + if (auto_nego_tmp == 0) + goto exit; + + auto_nego |= auto_nego_tmp; + goto skip_check_lpa; + } + if (!(aner & EXPANSION_NWAY)) + goto exit; + + if ((adv & ADVERTISED_10baseT_Half) && (anlpar & LPA_10HALF)) + auto_nego |= ADVERTISE_10HALF; + else if ((adv & ADVERTISED_10baseT_Full) && (anlpar & LPA_10FULL)) + auto_nego |= ADVERTISE_10FULL; + else if ((adv & ADVERTISED_100baseT_Half) && (anlpar & LPA_100HALF)) + auto_nego |= ADVERTISE_100HALF; + else if ((adv & ADVERTISED_100baseT_Full) && (anlpar & LPA_100FULL)) + auto_nego |= ADVERTISE_100FULL; + else if (adv & ADVERTISED_1000baseT_Half && (gbsr & LPA_1000HALF)) + giga_ctrl |= ADVERTISE_1000HALF; + else if (adv & ADVERTISED_1000baseT_Full && (gbsr & LPA_1000FULL)) + giga_ctrl |= ADVERTISE_1000FULL; + else if (adv & ADVERTISED_2500baseX_Full && (status_2500 & RTK_LPA_ADVERTISE_2500FULL)) + ctrl_2500 |= RTK_ADVERTISE_2500FULL; + else if (adv & RTK_ADVERTISED_5000baseX_Full && (status_2500 & RTK_LPA_ADVERTISE_5000FULL)) + ctrl_2500 |= RTK_ADVERTISE_5000FULL; + else + goto exit; + +skip_check_lpa: + if (tp->DASH) + auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL); + +#ifdef CONFIG_DOWN_SPEED_100 + auto_nego |= (ADVERTISE_100FULL | ADVERTISE_100HALF | ADVERTISE_10HALF | ADVERTISE_10FULL); +#endif + + rtl8126_mdio_write(tp, MII_ADVERTISE, auto_nego); + rtl8126_mdio_write(tp, MII_CTRL1000, giga_ctrl); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA5D4, ctrl_2500); + + rtl8126_phy_restart_nway(dev); + +exit: + return; +} + +static bool +rtl8126_keep_wol_link_speed(struct net_device *dev, u8 from_suspend) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + if ((from_suspend && !tp->link_ok(dev)) || + (!from_suspend && tp->resume_not_chg_speed)) + return 1; + + return 0; +} +static void +rtl8126_powerdown_pll(struct net_device *dev, u8 from_suspend) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + tp->check_keep_link_speed = 0; + if (tp->wol_enabled == WOL_ENABLED || tp->DASH || tp->EnableKCPOffload) { + rtl8126_set_hw_wol(dev, tp->wol_opts); + + switch (tp->mcfg) { + case CFG_METHOD_1 ... CFG_METHOD_3: + rtl8126_enable_cfg9346_write(tp); + RTL_W8(tp, Config2, RTL_R8(tp, Config2) | PMSTS_En); + rtl8126_disable_cfg9346_write(tp); + break; + default: + break; + }; + + /* Enable the PME and clear the status */ + rtl8126_set_pci_pme(tp, 1); + + if (rtl8126_keep_wol_link_speed(dev, from_suspend)) { + if (tp->wol_opts & WAKE_PHY) + tp->check_keep_link_speed = 1; + } else { + if (HW_SUPPORT_D0_SPEED_UP(tp)) { + rtl8126_enable_d0_speedup(tp); + tp->check_keep_link_speed = 1; + } + + rtl8126_set_wol_link_speed(dev); + } + + RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | AcceptBroadcast | AcceptMulticast | AcceptMyPhys); + + return; + } + + if (tp->DASH) + return; + + rtl8126_phy_power_down(dev); + + if (!tp->HwIcVerUnknown) { + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~BIT_7); + break; + } + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_6); + break; + } +} + +static void rtl8126_powerup_pll(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) | BIT_7 | BIT_6); + break; + } + + if (tp->resume_not_chg_speed) + return; + + rtl8126_phy_power_up(dev); +} + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) +static void +rtl8126_get_wol(struct net_device *dev, + struct ethtool_wolinfo *wol) +{ + struct rtl8126_private *tp = netdev_priv(dev); + u8 options; + + wol->wolopts = 0; + + if (tp->mcfg == CFG_METHOD_DEFAULT || disable_wol_support) { + wol->supported = 0; + return; + } else { + wol->supported = WAKE_ANY; + } + + options = RTL_R8(tp, Config1); + if (!(options & PMEnable)) + return; + + wol->wolopts = tp->wol_opts; +} + +static int +rtl8126_set_wol(struct net_device *dev, + struct ethtool_wolinfo *wol) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + if (tp->mcfg == CFG_METHOD_DEFAULT || disable_wol_support) + return -EOPNOTSUPP; + + tp->wol_opts = wol->wolopts; + + tp->wol_enabled = (tp->wol_opts) ? WOL_ENABLED : WOL_DISABLED; + + device_set_wakeup_enable(tp_to_dev(tp), wol->wolopts); + + return 0; +} + +static void +rtl8126_get_drvinfo(struct net_device *dev, + struct ethtool_drvinfo *info) +{ + struct rtl8126_private *tp = netdev_priv(dev); + struct rtl8126_fw *rtl_fw = tp->rtl_fw; + + strscpy(info->driver, MODULENAME, sizeof(info->driver)); + strscpy(info->version, RTL8126_VERSION, sizeof(info->version)); + strscpy(info->bus_info, pci_name(tp->pci_dev), sizeof(info->bus_info)); + info->regdump_len = R8126_REGS_DUMP_SIZE; + info->eedump_len = tp->eeprom_len; + BUILD_BUG_ON(sizeof(info->fw_version) < sizeof(rtl_fw->version)); + if (rtl_fw) + strscpy(info->fw_version, rtl_fw->version, + sizeof(info->fw_version)); +} + +static int +rtl8126_get_regs_len(struct net_device *dev) +{ + return R8126_REGS_DUMP_SIZE; +} +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) + +static void +rtl8126_set_d0_speedup_speed(struct rtl8126_private *tp) +{ + if (FALSE == HW_SUPPORT_D0_SPEED_UP(tp)) + return; + + tp->D0SpeedUpSpeed = D0_SPEED_UP_SPEED_DISABLE; + if (tp->autoneg == AUTONEG_ENABLE) { + if (tp->speed == SPEED_5000) + tp->D0SpeedUpSpeed = D0_SPEED_UP_SPEED_5000; + else if (tp->speed == SPEED_2500) + tp->D0SpeedUpSpeed = D0_SPEED_UP_SPEED_2500; + else if (tp->speed == SPEED_1000) + tp->D0SpeedUpSpeed = D0_SPEED_UP_SPEED_1000; + } +} + +static int +rtl8126_set_speed_xmii(struct net_device *dev, + u8 autoneg, + u32 speed, + u8 duplex, + u64 adv) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int auto_nego = 0; + int giga_ctrl = 0; + int ctrl_2500 = 0; + int rc = -EINVAL; + + //Disable Giga Lite + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA428, BIT_9); + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA5EA, BIT_0); + if (HW_SUPP_PHY_LINK_SPEED_5000M(tp)) + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA5EA, BIT_1); + + if (!rtl8126_is_speed_mode_valid(speed)) { + speed = SPEED_5000; + duplex = DUPLEX_FULL; + adv |= tp->advertising; + } + + giga_ctrl = rtl8126_mdio_read(tp, MII_CTRL1000); + giga_ctrl &= ~(ADVERTISE_1000HALF | ADVERTISE_1000FULL); + ctrl_2500 = rtl8126_mdio_direct_read_phy_ocp(tp, 0xA5D4); + ctrl_2500 &= ~(RTK_ADVERTISE_2500FULL | RTK_ADVERTISE_5000FULL); + + if (autoneg == AUTONEG_ENABLE) { + /*n-way force*/ + auto_nego = rtl8126_mdio_read(tp, MII_ADVERTISE); + auto_nego &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL | + ADVERTISE_100HALF | ADVERTISE_100FULL | + ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM); + + if (adv & ADVERTISED_10baseT_Half) + auto_nego |= ADVERTISE_10HALF; + if (adv & ADVERTISED_10baseT_Full) + auto_nego |= ADVERTISE_10FULL; + if (adv & ADVERTISED_100baseT_Half) + auto_nego |= ADVERTISE_100HALF; + if (adv & ADVERTISED_100baseT_Full) + auto_nego |= ADVERTISE_100FULL; + if (adv & ADVERTISED_1000baseT_Half) + giga_ctrl |= ADVERTISE_1000HALF; + if (adv & ADVERTISED_1000baseT_Full) + giga_ctrl |= ADVERTISE_1000FULL; + if (adv & ADVERTISED_2500baseX_Full) + ctrl_2500 |= RTK_ADVERTISE_2500FULL; + if (HW_SUPP_PHY_LINK_SPEED_5000M(tp)) { + if (adv & RTK_ADVERTISED_5000baseX_Full) + ctrl_2500 |= RTK_ADVERTISE_5000FULL; + } + + //flow control + if (tp->fcpause == rtl8126_fc_full) + auto_nego |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM; + + tp->phy_auto_nego_reg = auto_nego; + tp->phy_1000_ctrl_reg = giga_ctrl; + + tp->phy_2500_ctrl_reg = ctrl_2500; + + rtl8126_mdio_write(tp, 0x1f, 0x0000); + rtl8126_mdio_write(tp, MII_ADVERTISE, auto_nego); + rtl8126_mdio_write(tp, MII_CTRL1000, giga_ctrl); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA5D4, ctrl_2500); + rtl8126_phy_restart_nway(dev); + mdelay(20); + } else { + /*true force*/ + if (speed == SPEED_10 || speed == SPEED_100) + rtl8126_phy_setup_force_mode(dev, speed, duplex); + else + goto out; + } + + tp->autoneg = autoneg; + tp->speed = speed; + tp->duplex = duplex; + tp->advertising = adv; + + rtl8126_set_d0_speedup_speed(tp); + + rc = 0; +out: + return rc; +} + +static int +rtl8126_set_speed(struct net_device *dev, + u8 autoneg, + u32 speed, + u8 duplex, + u64 adv) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int ret; + + if (tp->resume_not_chg_speed) + return 0; + + ret = tp->set_speed(dev, autoneg, speed, duplex, adv); + + return ret; +} + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) +static int +rtl8126_set_settings(struct net_device *dev, +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) + struct ethtool_cmd *cmd +#else + const struct ethtool_link_ksettings *cmd +#endif + ) +{ + int ret; + u8 autoneg; + u32 speed; + u8 duplex; + u64 supported = 0, advertising = 0; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) + autoneg = cmd->autoneg; + speed = cmd->speed; + duplex = cmd->duplex; + supported = cmd->supported; + advertising = cmd->advertising; +#else + struct rtl8126_private *tp = netdev_priv(dev); + const struct ethtool_link_settings *base = &cmd->base; + autoneg = base->autoneg; + speed = base->speed; + duplex = base->duplex; + ethtool_convert_link_mode_to_legacy_u32((u32*)&supported, + cmd->link_modes.supported); + ethtool_convert_link_mode_to_legacy_u32((u32*)&advertising, + cmd->link_modes.advertising); + if (test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, + cmd->link_modes.supported)) + supported |= ADVERTISED_2500baseX_Full; + if (test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, + cmd->link_modes.advertising)) + advertising |= ADVERTISED_2500baseX_Full; + if (HW_SUPP_PHY_LINK_SPEED_5000M(tp)) { + if (test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, + cmd->link_modes.supported)) + supported |= RTK_ADVERTISED_5000baseX_Full; + if (test_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, + cmd->link_modes.advertising)) + advertising |= RTK_ADVERTISED_5000baseX_Full; + } +#endif + if (advertising & ~supported) + return -EINVAL; + + ret = rtl8126_set_speed(dev, autoneg, speed, duplex, advertising); + + return ret; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) +static u32 +rtl8126_get_tx_csum(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + u32 ret; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) + ret = ((dev->features & NETIF_F_IP_CSUM) != 0); +#else + ret = ((dev->features & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM)) != 0); +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) + + return ret; +} + +static u32 +rtl8126_get_rx_csum(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + u32 ret; + + ret = tp->cp_cmd & RxChkSum; + + return ret; +} + +static int +rtl8126_set_tx_csum(struct net_device *dev, + u32 data) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + if (tp->mcfg == CFG_METHOD_DEFAULT) + return -EOPNOTSUPP; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) + if (data) + dev->features |= NETIF_F_IP_CSUM; + else + dev->features &= ~NETIF_F_IP_CSUM; +#else + if (data) + dev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); + else + dev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM); +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) + + return 0; +} + +static int +rtl8126_set_rx_csum(struct net_device *dev, + u32 data) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + if (tp->mcfg == CFG_METHOD_DEFAULT) + return -EOPNOTSUPP; + + if (data) + tp->cp_cmd |= RxChkSum; + else + tp->cp_cmd &= ~RxChkSum; + + RTL_W16(tp, CPlusCmd, tp->cp_cmd); + + return 0; +} +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) + +static u32 +rtl8126_rx_desc_opts1(struct rtl8126_private *tp, + struct RxDesc *desc) +{ + if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) + return ((struct RxDescV3 *)desc)->RxDescNormalDDWord4.opts1; + else + return desc->opts1; +} + +static u32 +rtl8126_rx_desc_opts2(struct rtl8126_private *tp, + struct RxDesc *desc) +{ + if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) + return ((struct RxDescV3 *)desc)->RxDescNormalDDWord4.opts2; + else + return desc->opts2; +} + +#ifdef CONFIG_R8126_VLAN + +static void +rtl8126_clear_rx_desc_opts2(struct rtl8126_private *tp, + struct RxDesc *desc) +{ + if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) + ((struct RxDescV3 *)desc)->RxDescNormalDDWord4.opts2 = 0; + else + desc->opts2 = 0; +} + +static inline u32 +rtl8126_tx_vlan_tag(struct rtl8126_private *tp, + struct sk_buff *skb) +{ +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) + return (tp->vlgrp && vlan_tx_tag_present(skb)) ? + TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00; +#elif LINUX_VERSION_CODE < KERNEL_VERSION(4,0,0) + return (vlan_tx_tag_present(skb)) ? + TxVlanTag | swab16(vlan_tx_tag_get(skb)) : 0x00; +#else + return (skb_vlan_tag_present(skb)) ? + TxVlanTag | swab16(skb_vlan_tag_get(skb)) : 0x00; +#endif + + return 0; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) + +static void +rtl8126_vlan_rx_register(struct net_device *dev, + struct vlan_group *grp) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + tp->vlgrp = grp; + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + if (tp->vlgrp) { + tp->rtl8126_rx_config |= (EnableInnerVlan | EnableOuterVlan); + RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) | (EnableInnerVlan | EnableOuterVlan)) + } else { + tp->rtl8126_rx_config &= ~(EnableInnerVlan | EnableOuterVlan); + RTL_W32(tp, RxConfig, RTL_R32(tp, RxConfig) & ~(EnableInnerVlan | EnableOuterVlan)) + } + break; + } +} + +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) +static void +rtl8126_vlan_rx_kill_vid(struct net_device *dev, + unsigned short vid) +{ + struct rtl8126_private *tp = netdev_priv(dev); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21) + if (tp->vlgrp) + tp->vlgrp->vlan_devices[vid] = NULL; +#else + vlan_group_set_device(tp->vlgrp, vid, NULL); +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,21) +} +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) + +static int +rtl8126_rx_vlan_skb(struct rtl8126_private *tp, + struct RxDesc *desc, + struct sk_buff *skb) +{ + u32 opts2 = le32_to_cpu(rtl8126_rx_desc_opts2(tp, desc)); + int ret = -1; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) + if (tp->vlgrp && (opts2 & RxVlanTag)) { + rtl8126_rx_hwaccel_skb(skb, tp->vlgrp, + swab16(opts2 & 0xffff)); + ret = 0; + } +#elif LINUX_VERSION_CODE < KERNEL_VERSION(3,10,0) + if (opts2 & RxVlanTag) + __vlan_hwaccel_put_tag(skb, swab16(opts2 & 0xffff)); +#else + if (opts2 & RxVlanTag) + __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), swab16(opts2 & 0xffff)); +#endif + + rtl8126_clear_rx_desc_opts2(tp, desc); + return ret; +} + +#else /* !CONFIG_R8126_VLAN */ + +static inline u32 +rtl8126_tx_vlan_tag(struct rtl8126_private *tp, + struct sk_buff *skb) +{ + return 0; +} + +static int +rtl8126_rx_vlan_skb(struct rtl8126_private *tp, + struct RxDesc *desc, + struct sk_buff *skb) +{ + return -1; +} + +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0) + +static netdev_features_t rtl8126_fix_features(struct net_device *dev, + netdev_features_t features) +{ + if (dev->mtu > MSS_MAX) + features &= ~NETIF_F_ALL_TSO; + if (dev->mtu > ETH_DATA_LEN) { + features &= ~NETIF_F_ALL_TSO; + features &= ~NETIF_F_ALL_CSUM; + } +#ifndef CONFIG_R8126_VLAN + features &= ~NETIF_F_ALL_CSUM; +#endif + + return features; +} + +static int rtl8126_hw_set_features(struct net_device *dev, + netdev_features_t features) +{ + struct rtl8126_private *tp = netdev_priv(dev); + u32 rx_config; + + rx_config = RTL_R32(tp, RxConfig); + if (features & NETIF_F_RXALL) { + tp->rtl8126_rx_config |= (AcceptErr | AcceptRunt); + rx_config |= (AcceptErr | AcceptRunt); + } else { + tp->rtl8126_rx_config &= ~(AcceptErr | AcceptRunt); + rx_config &= ~(AcceptErr | AcceptRunt); + } + + if (features & NETIF_F_HW_VLAN_RX) { + tp->rtl8126_rx_config |= (EnableInnerVlan | EnableOuterVlan); + rx_config |= (EnableInnerVlan | EnableOuterVlan); + } else { + tp->rtl8126_rx_config &= ~(EnableInnerVlan | EnableOuterVlan); + rx_config &= ~(EnableInnerVlan | EnableOuterVlan); + } + + RTL_W32(tp, RxConfig, rx_config); + + if (features & NETIF_F_RXCSUM) + tp->cp_cmd |= RxChkSum; + else + tp->cp_cmd &= ~RxChkSum; + + RTL_W16(tp, CPlusCmd, tp->cp_cmd); + RTL_R16(tp, CPlusCmd); + + return 0; +} + +static int rtl8126_set_features(struct net_device *dev, + netdev_features_t features) +{ + features &= NETIF_F_RXALL | NETIF_F_RXCSUM | NETIF_F_HW_VLAN_RX; + + rtl8126_hw_set_features(dev, features); + + return 0; +} + +#endif + +static u8 rtl8126_get_mdi_status(struct rtl8126_private *tp) +{ + if (!tp->link_ok(tp->dev)) + return ETH_TP_MDI_INVALID; + + if (rtl8126_mdio_direct_read_phy_ocp(tp, 0xA444) & BIT_1) + return ETH_TP_MDI; + else + return ETH_TP_MDI_X; +} + +static void rtl8126_gset_xmii(struct net_device *dev, +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) + struct ethtool_cmd *cmd +#else + struct ethtool_link_ksettings *cmd +#endif + ) +{ + struct rtl8126_private *tp = netdev_priv(dev); + u16 aner = tp->phy_reg_aner; + u16 anlpar = tp->phy_reg_anlpar; + u16 gbsr = tp->phy_reg_gbsr; + u16 status_2500 = tp->phy_reg_status_2500; + u64 lpa_adv = 0; + u16 status; + u8 autoneg, duplex; + u32 speed = 0; + u16 bmcr; + u64 supported, advertising; + u8 report_lpa = 0; + + supported = SUPPORTED_10baseT_Half | + SUPPORTED_10baseT_Full | + SUPPORTED_100baseT_Half | + SUPPORTED_100baseT_Full | + SUPPORTED_1000baseT_Full | + SUPPORTED_2500baseX_Full | + SUPPORTED_Autoneg | + SUPPORTED_TP | + SUPPORTED_Pause | + SUPPORTED_Asym_Pause; + + if (!HW_SUPP_PHY_LINK_SPEED_2500M(tp)) + supported &= ~SUPPORTED_2500baseX_Full; + + advertising = tp->advertising; + if (tp->phy_auto_nego_reg || tp->phy_1000_ctrl_reg || + tp->phy_2500_ctrl_reg) { + advertising = 0; + if (tp->phy_auto_nego_reg & ADVERTISE_10HALF) + advertising |= ADVERTISED_10baseT_Half; + if (tp->phy_auto_nego_reg & ADVERTISE_10FULL) + advertising |= ADVERTISED_10baseT_Full; + if (tp->phy_auto_nego_reg & ADVERTISE_100HALF) + advertising |= ADVERTISED_100baseT_Half; + if (tp->phy_auto_nego_reg & ADVERTISE_100FULL) + advertising |= ADVERTISED_100baseT_Full; + if (tp->phy_1000_ctrl_reg & ADVERTISE_1000FULL) + advertising |= ADVERTISED_1000baseT_Full; + if (tp->phy_2500_ctrl_reg & RTK_ADVERTISE_2500FULL) + advertising |= ADVERTISED_2500baseX_Full; + if (tp->phy_2500_ctrl_reg & RTK_ADVERTISE_5000FULL) + advertising |= RTK_ADVERTISED_5000baseX_Full; + } + + rtl8126_mdio_write(tp, 0x1F, 0x0000); + bmcr = rtl8126_mdio_read(tp, MII_BMCR); + if (bmcr & BMCR_ANENABLE) { + autoneg = AUTONEG_ENABLE; + advertising |= ADVERTISED_Autoneg; + } else { + autoneg = AUTONEG_DISABLE; + } + + advertising |= ADVERTISED_TP; + + status = RTL_R16(tp, PHYstatus); + if (netif_running(dev) && (status & LinkStatus)) + report_lpa = 1; + + if (report_lpa) { + /*link on*/ + speed = rtl8126_convert_link_speed(status); + + if (status & TxFlowCtrl) + advertising |= ADVERTISED_Asym_Pause; + + if (status & RxFlowCtrl) + advertising |= ADVERTISED_Pause; + + duplex = ((status & (_1000bpsF | _2500bpsF | _5000bpsF)) || + (status & FullDup)) ? + DUPLEX_FULL : DUPLEX_HALF; + + /*link partner*/ + if (aner & EXPANSION_NWAY) + lpa_adv |= ADVERTISED_Autoneg; + if (anlpar & LPA_10HALF) + lpa_adv |= ADVERTISED_10baseT_Half; + if (anlpar & LPA_10FULL) + lpa_adv |= ADVERTISED_10baseT_Full; + if (anlpar & LPA_100HALF) + lpa_adv |= ADVERTISED_100baseT_Half; + if (anlpar & LPA_100FULL) + lpa_adv |= ADVERTISED_100baseT_Full; + if (anlpar & LPA_PAUSE_CAP) + lpa_adv |= ADVERTISED_Pause; + if (anlpar & LPA_PAUSE_ASYM) + lpa_adv |= ADVERTISED_Asym_Pause; + if (gbsr & LPA_1000HALF) + lpa_adv |= ADVERTISED_1000baseT_Half; + if (gbsr & LPA_1000FULL) + lpa_adv |= ADVERTISED_1000baseT_Full; + if (status_2500 & RTK_LPA_ADVERTISE_2500FULL) + lpa_adv |= ADVERTISED_2500baseX_Full; + if (status_2500 & RTK_LPA_ADVERTISE_5000FULL) + lpa_adv |= RTK_ADVERTISED_5000baseX_Full; + } else { + /*link down*/ + speed = SPEED_UNKNOWN; + duplex = DUPLEX_UNKNOWN; + lpa_adv = 0; + } + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) + cmd->supported = (u32)supported; + cmd->advertising = (u32)advertising; + cmd->autoneg = autoneg; + cmd->speed = speed; + cmd->duplex = duplex; + cmd->port = PORT_TP; + cmd->lp_advertising = (u32)lpa_adv; + cmd->eth_tp_mdix = rtl8126_get_mdi_status(tp); +#else + ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported, + supported); + ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising, + advertising); + ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.lp_advertising, + lpa_adv); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,0,0) + if (supported & SUPPORTED_2500baseX_Full) { + linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, + cmd->link_modes.supported, 0); + linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, + cmd->link_modes.supported, 1); + } + if (advertising & ADVERTISED_2500baseX_Full) { + linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, + cmd->link_modes.advertising, 0); + linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, + cmd->link_modes.advertising, 1); + } + if (HW_SUPP_PHY_LINK_SPEED_5000M(tp)) { + linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, + cmd->link_modes.supported, 1); + linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, + cmd->link_modes.advertising, tp->phy_2500_ctrl_reg & RTK_ADVERTISE_5000FULL); + } + if (report_lpa) { + if (lpa_adv & ADVERTISED_2500baseX_Full) { + linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, + cmd->link_modes.lp_advertising, 0); + linkmode_mod_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, + cmd->link_modes.lp_advertising, 1); + } + if (lpa_adv & RTK_ADVERTISED_5000baseX_Full) + linkmode_mod_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, + cmd->link_modes.lp_advertising, 1); + } +#endif + cmd->base.autoneg = autoneg; + cmd->base.speed = speed; + cmd->base.duplex = duplex; + cmd->base.port = PORT_TP; + cmd->base.eth_tp_mdix = rtl8126_get_mdi_status(tp); +#endif +} + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) +static int +rtl8126_get_settings(struct net_device *dev, +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) + struct ethtool_cmd *cmd +#else + struct ethtool_link_ksettings *cmd +#endif + ) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + tp->get_settings(dev, cmd); + + return 0; +} + +static void rtl8126_get_regs(struct net_device *dev, struct ethtool_regs *regs, + void *p) +{ + struct rtl8126_private *tp = netdev_priv(dev); + void __iomem *ioaddr = tp->mmio_addr; + unsigned int i; + u8 *data = p; + + if (regs->len < R8126_REGS_DUMP_SIZE) + return /* -EINVAL */; + + memset(p, 0, regs->len); + + for (i = 0; i < R8126_MAC_REGS_SIZE; i++) + *data++ = readb(ioaddr + i); + data = (u8*)p + 256; + + rtl8126_mdio_write(tp, 0x1F, 0x0000); + for (i = 0; i < R8126_PHY_REGS_SIZE/2; i++) { + *(u16*)data = rtl8126_mdio_read(tp, i); + data += 2; + } + data = (u8*)p + 256 * 2; + + for (i = 0; i < R8126_EPHY_REGS_SIZE/2; i++) { + *(u16*)data = rtl8126_ephy_read(tp, i); + data += 2; + } + data = (u8*)p + 256 * 3; + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + default: + for (i = 0; i < R8126_ERI_REGS_SIZE; i+=4) { + *(u32*)data = rtl8126_eri_read(tp, i , 4, ERIAR_ExGMAC); + data += 4; + } + break; + } +} + +static void rtl8126_get_pauseparam(struct net_device *dev, + struct ethtool_pauseparam *pause) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + pause->autoneg = (tp->autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE); + if (tp->fcpause == rtl8126_fc_rx_pause) + pause->rx_pause = 1; + else if (tp->fcpause == rtl8126_fc_tx_pause) + pause->tx_pause = 1; + else if (tp->fcpause == rtl8126_fc_full) { + pause->rx_pause = 1; + pause->tx_pause = 1; + } +} + +static int rtl8126_set_pauseparam(struct net_device *dev, + struct ethtool_pauseparam *pause) +{ + struct rtl8126_private *tp = netdev_priv(dev); + enum rtl8126_fc_mode newfc; + + if (pause->tx_pause || pause->rx_pause) + newfc = rtl8126_fc_full; + else + newfc = rtl8126_fc_none; + + if (tp->fcpause != newfc) { + tp->fcpause = newfc; + + rtl8126_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising); + } + + return 0; + +} + +static u32 +rtl8126_get_msglevel(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + return tp->msg_enable; +} + +static void +rtl8126_set_msglevel(struct net_device *dev, + u32 value) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + tp->msg_enable = value; +} + +static const char rtl8126_gstrings[][ETH_GSTRING_LEN] = { + /* legacy */ + "tx_packets", + "rx_packets", + "tx_errors", + "rx_errors", + "rx_missed", + "align_errors", + "tx_single_collisions", + "tx_multi_collisions", + "unicast", + "broadcast", + "multicast", + "tx_aborted", + "tx_underrun", + + /* extended */ + "tx_octets", + "rx_octets", + "rx_multicast64", + "tx_unicast64", + "tx_broadcast64", + "tx_multicast64", + "tx_pause_on", + "tx_pause_off", + "tx_pause_all", + "tx_deferred", + "tx_late_collision", + "tx_all_collision", + "tx_aborted32", + "align_errors32", + "rx_frame_too_long", + "rx_runt", + "rx_pause_on", + "rx_pause_off", + "rx_pause_all", + "rx_unknown_opcode", + "rx_mac_error", + "tx_underrun32", + "rx_mac_missed", + "rx_tcam_dropped", + "tdu", + "rdu", +}; +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33) +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) +static int rtl8126_get_stats_count(struct net_device *dev) +{ + return ARRAY_SIZE(rtl8126_gstrings); +} +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) +#else +static int rtl8126_get_sset_count(struct net_device *dev, int sset) +{ + switch (sset) { + case ETH_SS_STATS: + return ARRAY_SIZE(rtl8126_gstrings); + default: + return -EOPNOTSUPP; + } +} +#endif + +static void +rtl8126_set_ring_size(struct rtl8126_private *tp, u32 rx, u32 tx) +{ + int i; + + for (i = 0; i < R8126_MAX_RX_QUEUES; i++) + tp->rx_ring[i].num_rx_desc = rx; + + for (i = 0; i < R8126_MAX_TX_QUEUES; i++) + tp->tx_ring[i].num_tx_desc = tx; +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) +static void rtl8126_get_ringparam(struct net_device *dev, + struct ethtool_ringparam *ring, + struct kernel_ethtool_ringparam *kernel_ring, + struct netlink_ext_ack *extack) +#else +static void rtl8126_get_ringparam(struct net_device *dev, + struct ethtool_ringparam *ring) +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + ring->rx_max_pending = MAX_NUM_TX_DESC; + ring->tx_max_pending = MAX_NUM_RX_DESC; + ring->rx_pending = tp->rx_ring[0].num_rx_desc; + ring->tx_pending = tp->tx_ring[0].num_tx_desc; +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) +static int rtl8126_set_ringparam(struct net_device *dev, + struct ethtool_ringparam *ring, + struct kernel_ethtool_ringparam *kernel_ring, + struct netlink_ext_ack *extack) +#else +static int rtl8126_set_ringparam(struct net_device *dev, + struct ethtool_ringparam *ring) +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) +{ + struct rtl8126_private *tp = netdev_priv(dev); + u32 new_rx_count, new_tx_count; + int rc = 0; + + if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) + return -EINVAL; + + new_tx_count = clamp_t(u32, ring->tx_pending, + MIN_NUM_TX_DESC, MAX_NUM_TX_DESC); + + new_rx_count = clamp_t(u32, ring->rx_pending, + MIN_NUM_RX_DESC, MAX_NUM_RX_DESC); + + if ((new_rx_count == tp->rx_ring[0].num_rx_desc) && + (new_tx_count == tp->tx_ring[0].num_tx_desc)) { + /* nothing to do */ + return 0; + } + + if (netif_running(dev)) { + rtl8126_wait_for_quiescence(dev); + rtl8126_close(dev); + } + + rtl8126_set_ring_size(tp, new_rx_count, new_tx_count); + + if (netif_running(dev)) + rc = rtl8126_open(dev); + + return rc; +} +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) +static void +rtl8126_get_ethtool_stats(struct net_device *dev, + struct ethtool_stats *stats, + u64 *data) +{ + struct rtl8126_private *tp = netdev_priv(dev); + struct rtl8126_counters *counters; + dma_addr_t paddr; + + ASSERT_RTNL(); + + counters = tp->tally_vaddr; + paddr = tp->tally_paddr; + if (!counters) + return; + + rtl8126_dump_tally_counter(tp, paddr); + + data[0] = le64_to_cpu(counters->tx_packets); + data[1] = le64_to_cpu(counters->rx_packets); + data[2] = le64_to_cpu(counters->tx_errors); + data[3] = le32_to_cpu(counters->rx_errors); + data[4] = le16_to_cpu(counters->rx_missed); + data[5] = le16_to_cpu(counters->align_errors); + data[6] = le32_to_cpu(counters->tx_one_collision); + data[7] = le32_to_cpu(counters->tx_multi_collision); + data[8] = le64_to_cpu(counters->rx_unicast); + data[9] = le64_to_cpu(counters->rx_broadcast); + data[10] = le32_to_cpu(counters->rx_multicast); + data[11] = le16_to_cpu(counters->tx_aborted); + data[12] = le16_to_cpu(counters->tx_underrun); + + data[13] = le64_to_cpu(counters->tx_octets); + data[14] = le64_to_cpu(counters->rx_octets); + data[15] = le64_to_cpu(counters->rx_multicast64); + data[16] = le64_to_cpu(counters->tx_unicast64); + data[17] = le64_to_cpu(counters->tx_broadcast64); + data[18] = le64_to_cpu(counters->tx_multicast64); + data[19] = le32_to_cpu(counters->tx_pause_on); + data[20] = le32_to_cpu(counters->tx_pause_off); + data[21] = le32_to_cpu(counters->tx_pause_all); + data[22] = le32_to_cpu(counters->tx_deferred); + data[23] = le32_to_cpu(counters->tx_late_collision); + data[24] = le32_to_cpu(counters->tx_all_collision); + data[25] = le32_to_cpu(counters->tx_aborted32); + data[26] = le32_to_cpu(counters->align_errors32); + data[27] = le32_to_cpu(counters->rx_frame_too_long); + data[28] = le32_to_cpu(counters->rx_runt); + data[29] = le32_to_cpu(counters->rx_pause_on); + data[30] = le32_to_cpu(counters->rx_pause_off); + data[31] = le32_to_cpu(counters->rx_pause_all); + data[32] = le32_to_cpu(counters->rx_unknown_opcode); + data[33] = le32_to_cpu(counters->rx_mac_error); + data[34] = le32_to_cpu(counters->tx_underrun32); + data[35] = le32_to_cpu(counters->rx_mac_missed); + data[36] = le32_to_cpu(counters->rx_tcam_dropped); + data[37] = le32_to_cpu(counters->tdu); + data[38] = le32_to_cpu(counters->rdu); +} + +static void +rtl8126_get_strings(struct net_device *dev, + u32 stringset, + u8 *data) +{ + switch (stringset) { + case ETH_SS_STATS: + memcpy(data, rtl8126_gstrings, sizeof(rtl8126_gstrings)); + break; + } +} +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) + +static int rtl_get_eeprom_len(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + return tp->eeprom_len; +} + +static int rtl_get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *buf) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int i,j,ret; + int start_w, end_w; + int VPD_addr, VPD_data; + u32 *eeprom_buff; + u16 tmp; + + if (tp->eeprom_type == EEPROM_TYPE_NONE) { + dev_printk(KERN_DEBUG, tp_to_dev(tp), "Detect none EEPROM\n"); + return -EOPNOTSUPP; + } else if (eeprom->len == 0 || (eeprom->offset+eeprom->len) > tp->eeprom_len) { + dev_printk(KERN_DEBUG, tp_to_dev(tp), "Invalid parameter\n"); + return -EINVAL; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + default: + VPD_addr = 0xD2; + VPD_data = 0xD4; + break; + } + + start_w = eeprom->offset >> 2; + end_w = (eeprom->offset + eeprom->len - 1) >> 2; + + eeprom_buff = kmalloc(sizeof(u32)*(end_w - start_w + 1), GFP_KERNEL); + if (!eeprom_buff) + return -ENOMEM; + + rtl8126_enable_cfg9346_write(tp); + ret = -EFAULT; + for (i=start_w; i<=end_w; i++) { + pci_write_config_word(tp->pci_dev, VPD_addr, (u16)i*4); + ret = -EFAULT; + for (j = 0; j < 10; j++) { + udelay(400); + pci_read_config_word(tp->pci_dev, VPD_addr, &tmp); + if (tmp&0x8000) { + ret = 0; + break; + } + } + + if (ret) + break; + + pci_read_config_dword(tp->pci_dev, VPD_data, &eeprom_buff[i-start_w]); + } + rtl8126_disable_cfg9346_write(tp); + + if (!ret) + memcpy(buf, (u8 *)eeprom_buff + (eeprom->offset & 3), eeprom->len); + + kfree(eeprom_buff); + + return ret; +} + +#undef ethtool_op_get_link +#define ethtool_op_get_link _kc_ethtool_op_get_link +static u32 _kc_ethtool_op_get_link(struct net_device *dev) +{ + return netif_carrier_ok(dev) ? 1 : 0; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) +#undef ethtool_op_get_sg +#define ethtool_op_get_sg _kc_ethtool_op_get_sg +static u32 _kc_ethtool_op_get_sg(struct net_device *dev) +{ +#ifdef NETIF_F_SG + return (dev->features & NETIF_F_SG) != 0; +#else + return 0; +#endif +} + +#undef ethtool_op_set_sg +#define ethtool_op_set_sg _kc_ethtool_op_set_sg +static int _kc_ethtool_op_set_sg(struct net_device *dev, u32 data) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + if (tp->mcfg == CFG_METHOD_DEFAULT) + return -EOPNOTSUPP; + +#ifdef NETIF_F_SG + if (data) + dev->features |= NETIF_F_SG; + else + dev->features &= ~NETIF_F_SG; +#endif + + return 0; +} +#endif + +static void +rtl8126_set_eee_lpi_timer(struct rtl8126_private *tp) +{ + u16 dev_lpi_timer; + + dev_lpi_timer = tp->eee.tx_lpi_timer; + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + RTL_W16(tp, EEE_TXIDLE_TIMER_8125, dev_lpi_timer); + break; + default: + break; + } +} + +static bool rtl8126_is_adv_eee_enabled(struct rtl8126_private *tp) +{ + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + if (rtl8126_mdio_direct_read_phy_ocp(tp, 0xA430) & BIT_15) + return true; + break; + default: + break; + } + + return false; +} + +static void rtl8126_disable_adv_eee(struct rtl8126_private *tp) +{ + bool lock; + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + break; + default: + return; + } + + if (rtl8126_is_adv_eee_enabled(tp)) + lock = true; + else + lock = false; + + if (lock) + rtl8126_set_phy_mcu_patch_request(tp); + + rtl8126_clear_mac_ocp_bit(tp, 0xE052, BIT_0); + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA442, BIT_12 | BIT_13); + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA430, BIT_15); + + if (lock) + rtl8126_clear_phy_mcu_patch_request(tp); +} + +static int rtl8126_enable_eee(struct rtl8126_private *tp) +{ + struct ethtool_eee *eee = &tp->eee; + u16 eee_adv_t = ethtool_adv_to_mmd_eee_adv_t(eee->advertised); + int ret; + + ret = 0; + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_set_mac_ocp_bit(tp, 0xE040, (BIT_1|BIT_0)); + + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xA5D0, + MDIO_EEE_100TX | MDIO_EEE_1000T, + eee_adv_t); + if (eee->advertised & SUPPORTED_2500baseX_Full) + rtl8126_set_eth_phy_ocp_bit(tp, 0xA6D4, MDIO_EEE_2_5GT); + else + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA6D4, MDIO_EEE_2_5GT); + if (HW_SUPP_PHY_LINK_SPEED_5000M(tp)) + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA6D4, MDIO_EEE_5GT); + + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA6D8, BIT_4); + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA428, BIT_7); + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA4A2, BIT_9); + break; + default: + ret = -EOPNOTSUPP; + break; + } + + /*Advanced EEE*/ + rtl8126_disable_adv_eee(tp); + + return ret; +} + +static int rtl8126_disable_eee(struct rtl8126_private *tp) +{ + int ret; + + ret = 0; + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_clear_mac_ocp_bit(tp, 0xE040, (BIT_1|BIT_0)); + + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA5D0, (MDIO_EEE_100TX | MDIO_EEE_1000T)); + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA6D4, MDIO_EEE_2_5GT); + if (HW_SUPP_PHY_LINK_SPEED_5000M(tp)) + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA6D4, MDIO_EEE_5GT); + + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA6D8, BIT_4); + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA428, BIT_7); + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA4A2, BIT_9); + break; + default: + ret = -EOPNOTSUPP; + break; + } + + /*Advanced EEE*/ + rtl8126_disable_adv_eee(tp); + + return ret; +} + +static int rtl_nway_reset(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int ret, bmcr; + + if (unlikely(tp->rtk_enable_diag)) + return -EBUSY; + + /* if autoneg is off, it's an error */ + rtl8126_mdio_write(tp, 0x1F, 0x0000); + bmcr = rtl8126_mdio_read(tp, MII_BMCR); + + if (bmcr & BMCR_ANENABLE) { + bmcr |= BMCR_ANRESTART; + rtl8126_mdio_write(tp, MII_BMCR, bmcr); + ret = 0; + } else { + ret = -EINVAL; + } + + return ret; +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0) +static u32 +rtl8126_device_lpi_t_to_ethtool_lpi_t(struct rtl8126_private *tp , u32 lpi_timer) +{ + u32 to_us; + u16 status; + + to_us = lpi_timer * 80; + status = RTL_R16(tp, PHYstatus); + if (status & LinkStatus) { + /*link on*/ + if (HW_SUPP_PHY_LINK_SPEED_5000M(tp)) { + //5G : lpi_timer * 12.8ns + //2.5G : lpi_timer * 25.6ns + //Giga: lpi_timer * 8ns + //100M : lpi_timer * 80ns + if (status & (_5000bpsF)) + to_us = (lpi_timer * 128) / 10; + else if (status & _2500bpsF) + to_us = (lpi_timer * 256) / 10; + else if (status & _1000bpsF) + to_us = lpi_timer * 8; + } else { + //2.5G : lpi_timer * 3.2ns + //Giga: lpi_timer * 8ns + //100M : lpi_timer * 80ns + if (status & _2500bpsF) + to_us = (lpi_timer * 32) / 10; + else if (status & _1000bpsF) + to_us = lpi_timer * 8; + } + } + + //ns to us + to_us /= 1000; + + return to_us; +} + +static int +rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata) +{ + struct rtl8126_private *tp = netdev_priv(net); + struct ethtool_eee *eee = &tp->eee; + u32 lp, adv, tx_lpi_timer, supported = 0; + u16 val; + + if (unlikely(tp->rtk_enable_diag)) + return -EBUSY; + + /* Get Supported EEE */ + //val = rtl8126_mdio_direct_read_phy_ocp(tp, 0xA5C4); + //supported = mmd_eee_cap_to_ethtool_sup_t(val); + supported = eee->supported; + + /* Get advertisement EEE */ + adv = eee->advertised; + + /* Get LP advertisement EEE */ + val = rtl8126_mdio_direct_read_phy_ocp(tp, 0xA5D2); + lp = mmd_eee_adv_to_ethtool_adv_t(val); + val = rtl8126_mdio_direct_read_phy_ocp(tp, 0xA6D0); + if (val & RTK_LPA_EEE_ADVERTISE_2500FULL) + lp |= ADVERTISED_2500baseX_Full; + + /* Get EEE Tx LPI timer*/ + tx_lpi_timer = rtl8126_device_lpi_t_to_ethtool_lpi_t(tp, eee->tx_lpi_timer); + + val = rtl8126_mac_ocp_read(tp, 0xE040); + val &= BIT_1 | BIT_0; + + edata->eee_enabled = !!val; + edata->eee_active = !!(supported & adv & lp); + edata->supported = supported; + edata->advertised = adv; + edata->lp_advertised = lp; + edata->tx_lpi_enabled = edata->eee_enabled; + edata->tx_lpi_timer = tx_lpi_timer; + + return 0; +} + +static int +rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata) +{ + struct rtl8126_private *tp = netdev_priv(net); + struct ethtool_eee *eee = &tp->eee; + u32 advertising; + int rc = 0; + + if (!HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp) || + tp->DASH) + return -EOPNOTSUPP; + + if (unlikely(tp->rtk_enable_diag)) { + dev_printk(KERN_WARNING, tp_to_dev(tp), "Diag Enabled\n"); + rc = -EBUSY; + goto out; + } + + if (tp->autoneg != AUTONEG_ENABLE) { + dev_printk(KERN_WARNING, tp_to_dev(tp), "EEE requires autoneg\n"); + rc = -EINVAL; + goto out; + } + + /* + if (edata->tx_lpi_enabled) { + if (edata->tx_lpi_timer > tp->max_jumbo_frame_size || + edata->tx_lpi_timer < ETH_MIN_MTU) { + dev_printk(KERN_WARNING, tp_to_dev(tp), "Valid LPI timer range is %d to %d. \n", + ETH_MIN_MTU, tp->max_jumbo_frame_size); + rc = -EINVAL; + goto out; + } + } + */ + + advertising = tp->advertising; + if (!edata->advertised) { + edata->advertised = advertising & eee->supported; + } else if (edata->advertised & ~advertising) { + dev_printk(KERN_WARNING, tp_to_dev(tp), "EEE advertised %x must be a subset of autoneg advertised speeds %x\n", + edata->advertised, advertising); + rc = -EINVAL; + goto out; + } + + if (edata->advertised & ~eee->supported) { + dev_printk(KERN_WARNING, tp_to_dev(tp), "EEE advertised %x must be a subset of support %x\n", + edata->advertised, eee->supported); + rc = -EINVAL; + goto out; + } + + //tp->eee.eee_enabled = edata->eee_enabled; + //tp->eee_adv_t = ethtool_adv_to_mmd_eee_adv_t(edata->advertised); + + dev_printk(KERN_WARNING, tp_to_dev(tp), "EEE tx_lpi_timer %x must be a subset of support %x\n", + edata->tx_lpi_timer, eee->tx_lpi_timer); + + eee->advertised = edata->advertised; + //eee->tx_lpi_enabled = edata->tx_lpi_enabled; + //eee->tx_lpi_timer = edata->tx_lpi_timer; + eee->eee_enabled = edata->eee_enabled; + + if (eee->eee_enabled) + rtl8126_enable_eee(tp); + else + rtl8126_disable_eee(tp); + + rtl_nway_reset(net); + + return rc; + +out: + + return rc; +} +#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0) */ + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) +static const struct ethtool_ops rtl8126_ethtool_ops = { + .get_drvinfo = rtl8126_get_drvinfo, + .get_regs_len = rtl8126_get_regs_len, + .get_link = ethtool_op_get_link, +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) + .get_ringparam = rtl8126_get_ringparam, + .set_ringparam = rtl8126_set_ringparam, +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) + .get_settings = rtl8126_get_settings, + .set_settings = rtl8126_set_settings, +#else + .get_link_ksettings = rtl8126_get_settings, + .set_link_ksettings = rtl8126_set_settings, +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) + .get_pauseparam = rtl8126_get_pauseparam, + .set_pauseparam = rtl8126_set_pauseparam, +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0) + .get_msglevel = rtl8126_get_msglevel, + .set_msglevel = rtl8126_set_msglevel, +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) + .get_rx_csum = rtl8126_get_rx_csum, + .set_rx_csum = rtl8126_set_rx_csum, + .get_tx_csum = rtl8126_get_tx_csum, + .set_tx_csum = rtl8126_set_tx_csum, + .get_sg = ethtool_op_get_sg, + .set_sg = ethtool_op_set_sg, +#ifdef NETIF_F_TSO + .get_tso = ethtool_op_get_tso, + .set_tso = ethtool_op_set_tso, +#endif //NETIF_F_TSO +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,3,0) + .get_regs = rtl8126_get_regs, + .get_wol = rtl8126_get_wol, + .set_wol = rtl8126_set_wol, + .get_strings = rtl8126_get_strings, +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33) + .get_stats_count = rtl8126_get_stats_count, +#else + .get_sset_count = rtl8126_get_sset_count, +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,33) + .get_ethtool_stats = rtl8126_get_ethtool_stats, +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) +#ifdef ETHTOOL_GPERMADDR + .get_perm_addr = ethtool_op_get_perm_addr, +#endif //ETHTOOL_GPERMADDR +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,23) + .get_eeprom = rtl_get_eeprom, + .get_eeprom_len = rtl_get_eeprom_len, +#ifdef ENABLE_RSS_SUPPORT + .get_rxnfc = rtl8126_get_rxnfc, + .set_rxnfc = rtl8126_set_rxnfc, + .get_rxfh_indir_size = rtl8126_rss_indir_size, + .get_rxfh_key_size = rtl8126_get_rxfh_key_size, + .get_rxfh = rtl8126_get_rxfh, + .set_rxfh = rtl8126_set_rxfh, +#endif //ENABLE_RSS_SUPPORT +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0) +#ifdef ENABLE_PTP_SUPPORT + .get_ts_info = rtl8126_get_ts_info, +#else + .get_ts_info = ethtool_op_get_ts_info, +#endif //ENABLE_PTP_SUPPORT +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,5,0) +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0) + .get_eee = rtl_ethtool_get_eee, + .set_eee = rtl_ethtool_set_eee, +#endif /* LINUX_VERSION_CODE >= KERNEL_VERSION(3,6,0) */ + .nway_reset = rtl_nway_reset, + +}; +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) + +static void rtl8126_get_mac_version(struct rtl8126_private *tp) +{ + u32 reg,val32; + u32 ICVerID; + + val32 = RTL_R32(tp, TxConfig); + reg = val32 & 0x7c800000; + ICVerID = val32 & 0x00700000; + + switch (reg) { + case 0x64800000: + if (ICVerID == 0x00000000) { + tp->mcfg = CFG_METHOD_1; + } else if (ICVerID == 0x100000) { + tp->mcfg = CFG_METHOD_2; + } else if (ICVerID == 0x200000) { + tp->mcfg = CFG_METHOD_3; + } else { + tp->mcfg = CFG_METHOD_3; + tp->HwIcVerUnknown = TRUE; + } + + tp->efuse_ver = EFUSE_SUPPORT_V4; + break; + default: + printk("unknown chip version (%x)\n",reg); + tp->mcfg = CFG_METHOD_DEFAULT; + tp->HwIcVerUnknown = TRUE; + tp->efuse_ver = EFUSE_NOT_SUPPORT; + break; + } +} + +static void +rtl8126_print_mac_version(struct rtl8126_private *tp) +{ + int i; + for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) { + if (tp->mcfg == rtl_chip_info[i].mcfg) { + dprintk("Realtek %s Ethernet controller mcfg = %04d\n", + MODULENAME, rtl_chip_info[i].mcfg); + return; + } + } + + dprintk("mac_version == Unknown\n"); +} + +static void +rtl8126_tally_counter_addr_fill(struct rtl8126_private *tp) +{ + if (!tp->tally_paddr) + return; + + RTL_W32(tp, CounterAddrHigh, (u64)tp->tally_paddr >> 32); + RTL_W32(tp, CounterAddrLow, (u64)tp->tally_paddr & (DMA_BIT_MASK(32))); +} + +static void +rtl8126_tally_counter_clear(struct rtl8126_private *tp) +{ + if (!tp->tally_paddr) + return; + + RTL_W32(tp, CounterAddrHigh, (u64)tp->tally_paddr >> 32); + RTL_W32(tp, CounterAddrLow, ((u64)tp->tally_paddr & (DMA_BIT_MASK(32))) | CounterReset); +} + +static void +rtl8126_clear_phy_ups_reg(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA466, BIT_0); + break; + }; + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA468, BIT_3 | BIT_1); +} + +static int +rtl8126_is_ups_resume(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->mcfg) { + case CFG_METHOD_1 ... CFG_METHOD_3: + return (rtl8126_mac_ocp_read(tp, 0xD42C) & BIT_8); + default: + return 0; + }; +} + +static void +rtl8126_clear_ups_resume_bit(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->mcfg) { + case CFG_METHOD_1 ... CFG_METHOD_3: + rtl8126_clear_mac_ocp_bit(tp, 0xD42C, BIT_8); + break; + default: + return; + }; +} + +static u8 +rtl8126_get_phy_state(struct rtl8126_private *tp) +{ + switch (tp->mcfg) { + case CFG_METHOD_1 ... CFG_METHOD_3: + return (rtl8126_mdio_direct_read_phy_ocp(tp, 0xA420) & 0x7); + default: + return 0xff; + }; +} + +static void +rtl8126_wait_phy_ups_resume(struct net_device *dev, u16 PhyState) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int i; + + switch (tp->mcfg) { + case CFG_METHOD_1 ... CFG_METHOD_3: + for (i=0; i< 100; i++) { + if (rtl8126_get_phy_state(tp) == PhyState) + break; + else + mdelay(1); + } + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,18) + WARN_ON_ONCE(i == 100); +#endif + break; + default: + break; + }; +} + +void +rtl8126_enable_now_is_oob(struct rtl8126_private *tp) +{ + if (tp->HwSuppNowIsOobVer == 1) + RTL_W8(tp, MCUCmd_reg, RTL_R8(tp, MCUCmd_reg) | Now_is_oob); +} + +void +rtl8126_disable_now_is_oob(struct rtl8126_private *tp) +{ + if (tp->HwSuppNowIsOobVer == 1) + RTL_W8(tp, MCUCmd_reg, RTL_R8(tp, MCUCmd_reg) & ~Now_is_oob); +} + +static void +rtl8126_exit_oob(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + u16 data16; + + rtl8126_disable_rx_packet_filter(tp); + + if (HW_DASH_SUPPORT_DASH(tp)) { + rtl8126_driver_start(tp); + rtl8126_dash2_disable_txrx(dev); +#ifdef ENABLE_DASH_SUPPORT + DashHwInit(dev); +#endif + } + +#ifdef ENABLE_REALWOW_SUPPORT + rtl8126_realwow_hw_init(dev); +#else + //Disable realwow function + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_mac_ocp_write(tp, 0xC0BC, 0x00FF); + break; + } +#endif //ENABLE_REALWOW_SUPPORT + + rtl8126_nic_reset(dev); + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_disable_now_is_oob(tp); + + data16 = rtl8126_mac_ocp_read(tp, 0xE8DE) & ~BIT_14; + rtl8126_mac_ocp_write(tp, 0xE8DE, data16); + rtl8126_wait_ll_share_fifo_ready(dev); + + rtl8126_mac_ocp_write(tp, 0xC0AA, 0x07D0); +#ifdef ENABLE_LIB_SUPPORT + rtl8126_mac_ocp_write(tp, 0xC0A6, 0x04E2); +#else + rtl8126_mac_ocp_write(tp, 0xC0A6, 0x01B5); +#endif + rtl8126_mac_ocp_write(tp, 0xC01E, 0x5555); + + rtl8126_wait_ll_share_fifo_ready(dev); + break; + } + + //wait ups resume (phy state 2) + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + if (rtl8126_is_ups_resume(dev)) { + rtl8126_wait_phy_ups_resume(dev, 2); + rtl8126_clear_ups_resume_bit(dev); + rtl8126_clear_phy_ups_reg(dev); + } + break; + }; +} + +void +rtl8126_hw_disable_mac_mcu_bps(struct net_device *dev) +{ + u16 regAddr; + + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_enable_aspm_clkreq_lock(tp, 0); + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_mac_ocp_write(tp, 0xFC48, 0x0000); + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + for (regAddr = 0xFC28; regAddr < 0xFC48; regAddr += 2) { + rtl8126_mac_ocp_write(tp, regAddr, 0x0000); + } + + mdelay(3); + + rtl8126_mac_ocp_write(tp, 0xFC26, 0x0000); + break; + } +} + +#ifndef ENABLE_USE_FIRMWARE_FILE +static void +rtl8126_switch_mac_mcu_ram_code_page(struct rtl8126_private *tp, u16 page) +{ + u16 tmpUshort; + + page &= (BIT_1 | BIT_0); + tmpUshort = rtl8126_mac_ocp_read(tp, 0xE446); + tmpUshort &= ~(BIT_1 | BIT_0); + tmpUshort |= page; + rtl8126_mac_ocp_write(tp, 0xE446, tmpUshort); +} + +static void +_rtl8126_write_mac_mcu_ram_code(struct rtl8126_private *tp, const u16 *entry, u16 entry_cnt) +{ + u16 i; + + for (i = 0; i < entry_cnt; i++) { + rtl8126_mac_ocp_write(tp, 0xF800 + i * 2, entry[i]); + } +} + +static void +_rtl8126_write_mac_mcu_ram_code_with_page(struct rtl8126_private *tp, const u16 *entry, u16 entry_cnt, u16 page_size) +{ + u16 i; + u16 offset; + + if (page_size == 0) + return; + + for (i = 0; i < entry_cnt; i++) { + offset = i % page_size; + if (offset == 0) { + u16 page = (i / page_size); + rtl8126_switch_mac_mcu_ram_code_page(tp, page); + } + rtl8126_mac_ocp_write(tp, 0xF800 + offset * 2, entry[i]); + } +} + +static void +rtl8126_write_mac_mcu_ram_code(struct rtl8126_private *tp, const u16 *entry, u16 entry_cnt) +{ + if (FALSE == HW_SUPPORT_MAC_MCU(tp)) + return; + + if (entry == NULL || entry_cnt == 0) + return; + + if (tp->MacMcuPageSize > 0) + _rtl8126_write_mac_mcu_ram_code_with_page(tp, entry, entry_cnt, tp->MacMcuPageSize); + else + _rtl8126_write_mac_mcu_ram_code(tp, entry, entry_cnt); +} + +static void +rtl8126_set_mac_mcu_8126a_1(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + static const u16 mcu_patch_code_8126a_1[] = { + 0xE010, 0xE019, 0xE01B, 0xE01D, 0xE01F, 0xE021, 0xE023, 0xE025, 0xE027, + 0xE029, 0xE02B, 0xE02D, 0xE02F, 0xE031, 0xE033, 0xE035, 0x48C0, 0x9C66, + 0x7446, 0x4840, 0x48C1, 0x48C2, 0x9C46, 0xC402, 0xBC00, 0x0AD6, 0xC602, + 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, + 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, + 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, + 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, + 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000, 0xC602, 0xBE00, 0x0000 + }; + + rtl8126_hw_disable_mac_mcu_bps(dev); + + rtl8126_write_mac_mcu_ram_code(tp, mcu_patch_code_8126a_1, ARRAY_SIZE(mcu_patch_code_8126a_1)); + + rtl8126_mac_ocp_write(tp, 0xFC26, 0x8000); + + rtl8126_mac_ocp_write(tp, 0xFC28, 0x0AAA); + + rtl8126_mac_ocp_write(tp, 0xFC48, 0x0001); +} + +static void +rtl8126_set_mac_mcu_8126a_2(struct net_device *dev) +{ + rtl8126_hw_disable_mac_mcu_bps(dev); +} + +static void +rtl8126_set_mac_mcu_8126a_3(struct net_device *dev) +{ + rtl8126_hw_disable_mac_mcu_bps(dev); +} + +static void +rtl8126_hw_mac_mcu_config(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + if (tp->NotWrMcuPatchCode == TRUE) + return; + + switch (tp->mcfg) { + case CFG_METHOD_1: + rtl8126_set_mac_mcu_8126a_1(dev); + break; + case CFG_METHOD_2: + rtl8126_set_mac_mcu_8126a_2(dev); + break; + case CFG_METHOD_3: + rtl8126_set_mac_mcu_8126a_3(dev); + break; + } +} +#endif + +#ifdef ENABLE_USE_FIRMWARE_FILE +static void rtl8126_release_firmware(struct rtl8126_private *tp) +{ + if (tp->rtl_fw) { + rtl8126_fw_release_firmware(tp->rtl_fw); + kfree(tp->rtl_fw); + tp->rtl_fw = NULL; + } +} + +void rtl8126_apply_firmware(struct rtl8126_private *tp) +{ + /* TODO: release firmware if rtl_fw_write_firmware signals failure. */ + if (tp->rtl_fw) { + rtl8126_fw_write_firmware(tp, tp->rtl_fw); + /* At least one firmware doesn't reset tp->ocp_base. */ + tp->ocp_base = OCP_STD_PHY_BASE; + + /* PHY soft reset may still be in progress */ + //phy_read_poll_timeout(tp->phydev, MII_BMCR, val, + // !(val & BMCR_RESET), + // 50000, 600000, true); + rtl8126_wait_phy_reset_complete(tp); + + tp->hw_ram_code_ver = rtl8126_get_hw_phy_mcu_code_ver(tp); + tp->sw_ram_code_ver = tp->hw_ram_code_ver; + tp->HwHasWrRamCodeToMicroP = TRUE; + } +} +#endif + +static void +rtl8126_hw_init(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + u32 csi_tmp; + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_enable_aspm_clkreq_lock(tp, 0); + rtl8126_enable_force_clkreq(tp, 0); + break; + } + + //Disable UPS + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_mac_ocp_write(tp, 0xD40A, rtl8126_mac_ocp_read(tp, 0xD40A) & ~(BIT_4)); + break; + } + +#ifndef ENABLE_USE_FIRMWARE_FILE + if (!tp->rtl_fw) + rtl8126_hw_mac_mcu_config(dev); +#endif + + //Set PCIE uncorrectable error status mask pcie 0x108 + csi_tmp = rtl8126_csi_read(tp, 0x108); + csi_tmp |= BIT_20; + rtl8126_csi_write(tp, 0x108, csi_tmp); + + rtl8126_enable_cfg9346_write(tp); + rtl8126_disable_linkchg_wakeup(dev); + rtl8126_disable_cfg9346_write(tp); + rtl8126_disable_magic_packet(dev); + rtl8126_disable_d0_speedup(tp); + rtl8126_set_pci_pme(tp, 0); + if (s0_magic_packet == 1) + rtl8126_enable_magic_packet(dev); + +#ifdef ENABLE_USE_FIRMWARE_FILE + if (tp->rtl_fw && + !tp->resume_not_chg_speed && + !(HW_DASH_SUPPORT_TYPE_3(tp) && + tp->HwPkgDet == 0x06)) + rtl8126_apply_firmware(tp); +#endif +} + +static void +rtl8126_hw_ephy_config(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + /* nothing to do */ + break; + } +} + +static u16 +rtl8126_get_hw_phy_mcu_code_ver(struct rtl8126_private *tp) +{ + u16 hw_ram_code_ver = ~0; + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x801E); + hw_ram_code_ver = rtl8126_mdio_direct_read_phy_ocp(tp, 0xA438); + break; + } + + return hw_ram_code_ver; +} + +static int +rtl8126_check_hw_phy_mcu_code_ver(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int ram_code_ver_match = 0; + + tp->hw_ram_code_ver = rtl8126_get_hw_phy_mcu_code_ver(tp); + + if (tp->hw_ram_code_ver == tp->sw_ram_code_ver) { + ram_code_ver_match = 1; + tp->HwHasWrRamCodeToMicroP = TRUE; + } + + return ram_code_ver_match; +} + +bool +rtl8126_set_phy_mcu_patch_request(struct rtl8126_private *tp) +{ + u16 gphy_val; + u16 WaitCount; + bool bSuccess = TRUE; + + rtl8126_set_eth_phy_ocp_bit(tp, 0xB820, BIT_4); + + WaitCount = 0; + do { + gphy_val = rtl8126_mdio_direct_read_phy_ocp(tp, 0xB800); + udelay(100); + WaitCount++; + } while (!(gphy_val & BIT_6) && (WaitCount < 1000)); + + if (!(gphy_val & BIT_6) && (WaitCount == 1000)) + bSuccess = FALSE; + + if (!bSuccess) + dprintk("rtl8126_set_phy_mcu_patch_request fail.\n"); + + return bSuccess; +} + +bool +rtl8126_clear_phy_mcu_patch_request(struct rtl8126_private *tp) +{ + u16 gphy_val; + u16 WaitCount; + bool bSuccess = TRUE; + + rtl8126_clear_eth_phy_ocp_bit(tp, 0xB820, BIT_4); + + WaitCount = 0; + do { + gphy_val = rtl8126_mdio_direct_read_phy_ocp(tp, 0xB800); + udelay(100); + WaitCount++; + } while ((gphy_val & BIT_6) && (WaitCount < 1000)); + + if ((gphy_val & BIT_6) && (WaitCount == 1000)) + bSuccess = FALSE; + + if (!bSuccess) + dprintk("rtl8126_clear_phy_mcu_patch_request fail.\n"); + + return bSuccess; +} + +#ifndef ENABLE_USE_FIRMWARE_FILE +static void +rtl8126_write_hw_phy_mcu_code_ver(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x801E); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, tp->sw_ram_code_ver); + tp->hw_ram_code_ver = tp->sw_ram_code_ver; + break; + } +} + +static void +rtl8126_set_phy_mcu_ram_code(struct net_device *dev, const u16 *ramcode, u16 codesize) +{ + struct rtl8126_private *tp = netdev_priv(dev); + u16 i; + u16 addr; + u16 val; + + if (ramcode == NULL || codesize % 2) { + goto out; + } + + for (i = 0; i < codesize; i += 2) { + addr = ramcode[i]; + val = ramcode[i + 1]; + if (addr == 0xFFFF && val == 0xFFFF) { + break; + } + rtl8126_mdio_direct_write_phy_ocp(tp, addr, val); + } + +out: + return; +} + +static void +rtl8126_enable_phy_disable_mode(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->HwSuppCheckPhyDisableModeVer) { + case 3: + RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) | BIT_5); + break; + } + + dprintk("enable phy disable mode.\n"); +} + +static void +rtl8126_disable_phy_disable_mode(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + switch (tp->HwSuppCheckPhyDisableModeVer) { + case 3: + RTL_W8(tp, 0xF2, RTL_R8(tp, 0xF2) & ~BIT_5); + break; + } + + mdelay(1); + + dprintk("disable phy disable mode.\n"); +} + +static const u16 phy_mcu_ram_code_8126a_1_1[] = { + 0xa436, 0x8023, 0xa438, 0x4900, 0xa436, 0xB82E, 0xa438, 0x0001, + 0xBFBA, 0xE000, 0xBF1A, 0xC1B9, 0xBFA8, 0x10F0, 0xBFB0, 0x0210, + 0xBFB4, 0xE7E4, 0xb820, 0x0090, 0xa436, 0xA016, 0xa438, 0x0000, + 0xa436, 0xA012, 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, + 0xa438, 0x8010, 0xa438, 0x1800, 0xa438, 0x8062, 0xa438, 0x1800, + 0xa438, 0x8069, 0xa438, 0x1800, 0xa438, 0x80e2, 0xa438, 0x1800, + 0xa438, 0x80eb, 0xa438, 0x1800, 0xa438, 0x80f5, 0xa438, 0x1800, + 0xa438, 0x811b, 0xa438, 0x1800, 0xa438, 0x8120, 0xa438, 0xd500, + 0xa438, 0xd049, 0xa438, 0xd1b9, 0xa438, 0xa208, 0xa438, 0x8208, + 0xa438, 0xd503, 0xa438, 0xa104, 0xa438, 0x0c07, 0xa438, 0x0902, + 0xa438, 0xd500, 0xa438, 0xbc10, 0xa438, 0xc484, 0xa438, 0xd503, + 0xa438, 0xcc02, 0xa438, 0xcd0d, 0xa438, 0xaf01, 0xa438, 0xd500, + 0xa438, 0xd703, 0xa438, 0x4531, 0xa438, 0xbd08, 0xa438, 0x1000, + 0xa438, 0x16bb, 0xa438, 0xd75e, 0xa438, 0x5fb3, 0xa438, 0xd503, + 0xa438, 0xd04d, 0xa438, 0xd1c7, 0xa438, 0x0cf0, 0xa438, 0x0e10, + 0xa438, 0xd704, 0xa438, 0x5ffc, 0xa438, 0xd04d, 0xa438, 0xd1c7, + 0xa438, 0x0cf0, 0xa438, 0x0e20, 0xa438, 0xd704, 0xa438, 0x5ffc, + 0xa438, 0xd04d, 0xa438, 0xd1c7, 0xa438, 0x0cf0, 0xa438, 0x0e40, + 0xa438, 0xd704, 0xa438, 0x5ffc, 0xa438, 0xd04d, 0xa438, 0xd1c7, + 0xa438, 0x0cf0, 0xa438, 0x0e80, 0xa438, 0xd704, 0xa438, 0x5ffc, + 0xa438, 0xd07b, 0xa438, 0xd1c5, 0xa438, 0x8ef0, 0xa438, 0xd704, + 0xa438, 0x5ffc, 0xa438, 0x9d08, 0xa438, 0x1000, 0xa438, 0x16bb, + 0xa438, 0xd75e, 0xa438, 0x7fb3, 0xa438, 0x1000, 0xa438, 0x16bb, + 0xa438, 0xd75e, 0xa438, 0x5fad, 0xa438, 0x1000, 0xa438, 0x181f, + 0xa438, 0xd703, 0xa438, 0x3181, 0xa438, 0x8059, 0xa438, 0x60ad, + 0xa438, 0x1000, 0xa438, 0x16bb, 0xa438, 0xd703, 0xa438, 0x5fbb, + 0xa438, 0x1000, 0xa438, 0x16bb, 0xa438, 0xd719, 0xa438, 0x7fa8, + 0xa438, 0xd500, 0xa438, 0xd049, 0xa438, 0xd1b9, 0xa438, 0x1800, + 0xa438, 0x0f0b, 0xa438, 0xd500, 0xa438, 0xd07b, 0xa438, 0xd1b5, + 0xa438, 0xd0f6, 0xa438, 0xd1c5, 0xa438, 0x1800, 0xa438, 0x1049, + 0xa438, 0xd707, 0xa438, 0x4121, 0xa438, 0xd706, 0xa438, 0x40fa, + 0xa438, 0xd099, 0xa438, 0xd1c6, 0xa438, 0x1000, 0xa438, 0x16bb, + 0xa438, 0xd704, 0xa438, 0x5fbc, 0xa438, 0xbc80, 0xa438, 0xc489, + 0xa438, 0xd503, 0xa438, 0xcc08, 0xa438, 0xcd46, 0xa438, 0xaf01, + 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x0903, 0xa438, 0x1000, + 0xa438, 0x16bb, 0xa438, 0xd75e, 0xa438, 0x5f6d, 0xa438, 0x1000, + 0xa438, 0x181f, 0xa438, 0xd504, 0xa438, 0xa210, 0xa438, 0xd500, + 0xa438, 0x1000, 0xa438, 0x16bb, 0xa438, 0xd719, 0xa438, 0x5fbc, + 0xa438, 0xd504, 0xa438, 0x8210, 0xa438, 0xd503, 0xa438, 0xc6d0, + 0xa438, 0xa521, 0xa438, 0xcd49, 0xa438, 0xaf01, 0xa438, 0xd504, + 0xa438, 0xa220, 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x16bb, + 0xa438, 0xd75e, 0xa438, 0x5fad, 0xa438, 0x1000, 0xa438, 0x181f, + 0xa438, 0xd503, 0xa438, 0xa704, 0xa438, 0x0c07, 0xa438, 0x0904, + 0xa438, 0xd504, 0xa438, 0xa102, 0xa438, 0xd500, 0xa438, 0x1000, + 0xa438, 0x16bb, 0xa438, 0xd718, 0xa438, 0x5fab, 0xa438, 0xd503, + 0xa438, 0xc6f0, 0xa438, 0xa521, 0xa438, 0xd505, 0xa438, 0xa404, + 0xa438, 0xd500, 0xa438, 0xd701, 0xa438, 0x6085, 0xa438, 0xd504, + 0xa438, 0xc9f1, 0xa438, 0xf003, 0xa438, 0xd504, 0xa438, 0xc9f0, + 0xa438, 0xd503, 0xa438, 0xcd4a, 0xa438, 0xaf01, 0xa438, 0xd500, + 0xa438, 0xd504, 0xa438, 0xa802, 0xa438, 0xd500, 0xa438, 0x1000, + 0xa438, 0x16bb, 0xa438, 0xd707, 0xa438, 0x5fb1, 0xa438, 0xd707, + 0xa438, 0x5f10, 0xa438, 0xd505, 0xa438, 0xa402, 0xa438, 0xd503, + 0xa438, 0xd707, 0xa438, 0x41a1, 0xa438, 0xd706, 0xa438, 0x60ba, + 0xa438, 0x60fc, 0xa438, 0x0c07, 0xa438, 0x0204, 0xa438, 0xf009, + 0xa438, 0x0c07, 0xa438, 0x0202, 0xa438, 0xf006, 0xa438, 0x0c07, + 0xa438, 0x0206, 0xa438, 0xf003, 0xa438, 0x0c07, 0xa438, 0x0202, + 0xa438, 0xd500, 0xa438, 0xd703, 0xa438, 0x3181, 0xa438, 0x80e0, + 0xa438, 0x616d, 0xa438, 0xd701, 0xa438, 0x6065, 0xa438, 0x1800, + 0xa438, 0x1229, 0xa438, 0x1000, 0xa438, 0x16bb, 0xa438, 0xd707, + 0xa438, 0x6061, 0xa438, 0xd704, 0xa438, 0x5f7c, 0xa438, 0x1800, + 0xa438, 0x124a, 0xa438, 0xd504, 0xa438, 0x8c0f, 0xa438, 0xd505, + 0xa438, 0xa20e, 0xa438, 0xd500, 0xa438, 0x1000, 0xa438, 0x1871, + 0xa438, 0x1800, 0xa438, 0x1899, 0xa438, 0xd70b, 0xa438, 0x60b0, + 0xa438, 0xd05a, 0xa438, 0xd19a, 0xa438, 0x1800, 0xa438, 0x1aef, + 0xa438, 0xd0ef, 0xa438, 0xd19a, 0xa438, 0x1800, 0xa438, 0x1aef, + 0xa438, 0x1000, 0xa438, 0x1d09, 0xa438, 0xd708, 0xa438, 0x3399, + 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0xa438, 0x1404, + 0xa438, 0xffef, 0xa438, 0x96fe, 0xa438, 0xfdc4, 0xa438, 0xfcfc, + 0xa438, 0x04f8, 0xa438, 0xf9ef, 0xa438, 0x59e0, 0xa438, 0x8018, + 0xa438, 0xad22, 0xa438, 0x06bf, 0xa438, 0x8a28, 0xa438, 0x026f, + 0xa438, 0x17ef, 0xa438, 0x95fd, 0xa438, 0xfc04, 0xa438, 0xf8f9, + 0xa438, 0xf9ef, 0xa438, 0x59fa, 0xa438, 0xface, 0xa438, 0xe48f, + 0xa438, 0xfee5, 0xa438, 0x8fff, 0xa438, 0xbf6e, 0xa438, 0x1b02, + 0xa438, 0x6f20, 0xa438, 0xbf6e, 0xa438, 0x1802, 0xa438, 0x6f17, + 0xa438, 0xd102, 0xa438, 0xbf6e, 0xa438, 0x1202, 0xa438, 0x6733, + 0xa438, 0xbf6e, 0xa438, 0x1502, 0xa438, 0x6f17, 0xa438, 0xbe00, + 0xa438, 0x00cc, 0xa438, 0xbf69, 0xa438, 0xcb02, 0xa438, 0x6733, + 0xa438, 0xbf69, 0xa438, 0xce02, 0xa438, 0x6f17, 0xa438, 0xbf69, + 0xa438, 0xce02, 0xa438, 0x6f20, 0xa438, 0xbf69, 0xa438, 0xd102, + 0xa438, 0x6752, 0xa438, 0xad28, 0xa438, 0xf70c, 0xa438, 0x81bf, + 0xa438, 0x8ff6, 0xa438, 0x1a98, 0xa438, 0xef59, 0xa438, 0xbf69, + 0xa438, 0xd402, 0xa438, 0x6752, 0xa438, 0xef95, 0xa438, 0xdc19, + 0xa438, 0xdd0d, 0xa438, 0x8118, 0xa438, 0xa800, 0xa438, 0x04c9, + 0xa438, 0xbf69, 0xa438, 0xce02, 0xa438, 0x6f17, 0xa438, 0xe08f, + 0xa438, 0xfce1, 0xa438, 0x8ffd, 0xa438, 0xef74, 0xa438, 0xe08f, + 0xa438, 0xfae1, 0xa438, 0x8ffb, 0xa438, 0xef64, 0xa438, 0x026e, + 0xa438, 0x57ad, 0xa438, 0x5008, 0xa438, 0xe08f, 0xa438, 0xfce1, + 0xa438, 0x8ffd, 0xa438, 0xae06, 0xa438, 0xe08f, 0xa438, 0xfae1, + 0xa438, 0x8ffb, 0xa438, 0xe28f, 0xa438, 0xf8e3, 0xa438, 0x8ff9, + 0xa438, 0xef75, 0xa438, 0xe28f, 0xa438, 0xf6e3, 0xa438, 0x8ff7, + 0xa438, 0xef65, 0xa438, 0x026e, 0xa438, 0x57ad, 0xa438, 0x5008, + 0xa438, 0xe28f, 0xa438, 0xf8e3, 0xa438, 0x8ff9, 0xa438, 0xae06, + 0xa438, 0xe28f, 0xa438, 0xf6e3, 0xa438, 0x8ff7, 0xa438, 0x1b45, + 0xa438, 0xad27, 0xa438, 0x05d7, 0xa438, 0x0000, 0xa438, 0xae0d, + 0xa438, 0xef74, 0xa438, 0xe08f, 0xa438, 0xfee1, 0xa438, 0x8fff, + 0xa438, 0xef64, 0xa438, 0x026e, 0xa438, 0x57c6, 0xa438, 0xfefe, + 0xa438, 0xef95, 0xa438, 0xfdfd, 0xa438, 0xfc04, 0xa438, 0xf8f9, + 0xa438, 0xfaef, 0xa438, 0x69fb, 0xa438, 0xe080, 0xa438, 0x18ac, + 0xa438, 0x2103, 0xa438, 0xaf8a, 0xa438, 0x06bf, 0xa438, 0x8a2b, + 0xa438, 0xac21, 0xa438, 0x03af, 0xa438, 0x8a06, 0xa438, 0xbf8a, + 0xa438, 0x2802, 0xa438, 0x6f17, 0xa438, 0xee8f, 0xa438, 0xee00, + 0xa438, 0xee8f, 0xa438, 0xed00, 0xa438, 0xbf8a, 0xa438, 0x2e02, + 0xa438, 0x6752, 0xa438, 0xad28, 0xa438, 0x03af, 0xa438, 0x8a06, + 0xa438, 0xe28f, 0xa438, 0xefe3, 0xa438, 0x8ff0, 0xa438, 0xbf68, + 0xa438, 0x5102, 0xa438, 0x6752, 0xa438, 0xac28, 0xa438, 0x11e2, + 0xa438, 0x8ff1, 0xa438, 0xe38f, 0xa438, 0xf2bf, 0xa438, 0x6848, + 0xa438, 0x0267, 0xa438, 0x52ac, 0xa438, 0x2802, 0xa438, 0xae53, + 0xa438, 0xbf68, 0xa438, 0x5a02, 0xa438, 0x6752, 0xa438, 0xad28, + 0xa438, 0x0aef, 0xa438, 0x4502, 0xa438, 0x8891, 0xa438, 0xac50, + 0xa438, 0x38ae, 0xa438, 0x40bf, 0xa438, 0x8a31, 0xa438, 0x0267, + 0xa438, 0x52ef, 0xa438, 0x31bf, 0xa438, 0x8a34, 0xa438, 0x0267, + 0xa438, 0x520c, 0xa438, 0x311e, 0xa438, 0x31bf, 0xa438, 0x8a37, + 0xa438, 0x0267, 0xa438, 0x520c, 0xa438, 0x311e, 0xa438, 0x31bf, + 0xa438, 0x8a3a, 0xa438, 0x0267, 0xa438, 0x520c, 0xa438, 0x311e, + 0xa438, 0x31e7, 0xa438, 0x8fee, 0xa438, 0xa30c, 0xa438, 0x02ae, + 0xa438, 0x08a3, 0xa438, 0x0e02, 0xa438, 0xae03, 0xa438, 0xa30d, + 0xa438, 0x0aee, 0xa438, 0x8fed, 0xa438, 0x01bf, 0xa438, 0x8a28, + 0xa438, 0x026f, 0xa438, 0x2002, 0xa438, 0x1404, 0xa438, 0xffef, + 0xa438, 0x96fe, 0xa438, 0xfdfc, 0xa438, 0x04f8, 0xa438, 0xfaef, + 0xa438, 0x69e0, 0xa438, 0x8018, 0xa438, 0xad21, 0xa438, 0x06bf, + 0xa438, 0x8a28, 0xa438, 0x026f, 0xa438, 0x17ef, 0xa438, 0x96fe, + 0xa438, 0xfc04, 0xa438, 0xf8a4, 0xa438, 0xb677, 0xa438, 0xa4b6, + 0xa438, 0x22a4, 0xa438, 0x4222, 0xa438, 0xa668, 0xa438, 0x00b2, + 0xa438, 0x3e00, 0xa438, 0xb2be, 0xa438, 0x00b3, 0xa438, 0x3e00, + 0xa438, 0xb3be, 0xa438, 0xd10f, 0xa438, 0xbf8a, 0xa438, 0x5c02, + 0xa438, 0x6733, 0xa438, 0xbf8a, 0xa438, 0x5f02, 0xa438, 0x6733, + 0xa438, 0xbf8a, 0xa438, 0x5c02, 0xa438, 0x6f17, 0xa438, 0xbf8a, + 0xa438, 0x5f02, 0xa438, 0x6f17, 0xa438, 0x1f00, 0xa438, 0xaf3d, + 0xa438, 0x0c30, 0xa438, 0xa85a, 0xa438, 0xfcad, 0xa438, 0x0e00, + 0xa436, 0xb818, 0xa438, 0x3f31, 0xa436, 0xb81a, 0xa438, 0x13a4, + 0xa436, 0xb81c, 0xa438, 0x3d0a, 0xa436, 0xb81e, 0xa438, 0xffff, + 0xa436, 0xb850, 0xa438, 0xffff, 0xa436, 0xb852, 0xa438, 0xffff, + 0xa436, 0xb878, 0xa438, 0xffff, 0xa436, 0xb884, 0xa438, 0xffff, + 0xa436, 0xb832, 0xa438, 0x0007, 0xa436, 0x84cf, 0xa438, 0x0101, + 0xa466, 0x0002, 0xa436, 0x86a7, 0xa438, 0x0000, 0xa436, 0x0000, + 0xa438, 0x0000, 0xa436, 0xB82E, 0xa438, 0x0000, 0xa436, 0x8023, + 0xa438, 0x0000, 0xa436, 0x801E, 0xa438, 0x0023, 0xb820, 0x0000, + 0xFFFF, 0xFFFF +}; + +static const u16 phy_mcu_ram_code_8126a_1_2[] = { + 0xB87C, 0x8a32, 0xB87E, 0x0400, 0xB87C, 0x8376, 0xB87E, 0x0300, + 0xce00, 0x6CAF, 0xB87C, 0x8301, 0xB87E, 0x1133, 0xB87C, 0x8105, + 0xB87E, 0xa000, 0xB87C, 0x8148, 0xB87E, 0xa000, 0xa436, 0x81d8, + 0xa438, 0x5865, 0xacf8, 0xCCC0, 0xac90, 0x52B0, 0xad2C, 0x8000, + 0xB87C, 0x83e6, 0xB87E, 0x4A0E, 0xB87C, 0x83d2, 0xB87E, 0x0A0E, + 0xB87C, 0x80a0, 0xB87E, 0xB8B6, 0xB87C, 0x805e, 0xB87E, 0xB8B6, + 0xB87C, 0x8057, 0xB87E, 0x305A, 0xB87C, 0x8099, 0xB87E, 0x305A, + 0xB87C, 0x8052, 0xB87E, 0x3333, 0xB87C, 0x8094, 0xB87E, 0x3333, + 0xB87C, 0x807F, 0xB87E, 0x7975, 0xB87C, 0x803D, 0xB87E, 0x7975, + 0xB87C, 0x8036, 0xB87E, 0x305A, 0xB87C, 0x8078, 0xB87E, 0x305A, + 0xB87C, 0x8031, 0xB87E, 0x3335, 0xB87C, 0x8073, 0xB87E, 0x3335, + 0xa436, 0x81D8, 0xa438, 0x5865, 0xB87C, 0x867c, 0xB87E, 0x0617, + 0xad94, 0x0092, 0xB87C, 0x89B1, 0xB87E, 0x5050, 0xB87C, 0x86E0, + 0xB87E, 0x809A, 0xB87C, 0x86E2, 0xB87E, 0xB34D, 0xB87C, 0x8FD2, + 0xB87E, 0x004B, 0xB87C, 0x8691, 0xB87E, 0x007D, 0xB87E, 0x00AF, + 0xB87E, 0x00E1, 0xB87E, 0x00FF, 0xB87C, 0x867F, 0xB87E, 0x0201, + 0xB87E, 0x0201, 0xB87E, 0x0201, 0xB87E, 0x0201, 0xB87E, 0x0201, + 0xB87E, 0x0201, 0xB87C, 0x86DA, 0xB87E, 0xCDCD, 0xB87E, 0xE6CD, + 0xB87E, 0xCDCD, 0xB87C, 0x8FE8, 0xB87E, 0x0368, 0xB87E, 0x033F, + 0xB87E, 0x1046, 0xB87E, 0x147D, 0xB87E, 0x147D, 0xB87E, 0x147D, + 0xB87E, 0x0368, 0xB87E, 0x033F, 0xB87E, 0x1046, 0xB87E, 0x147D, + 0xB87E, 0x147D, 0xB87E, 0x147D, 0xa436, 0x80dd, 0xa438, 0xf0AB, + 0xa436, 0x80df, 0xa438, 0xC009, 0xa436, 0x80e7, 0xa438, 0x401E, + 0xa436, 0x80e1, 0xa438, 0x120A, 0xa436, 0x86f2, 0xa438, 0x5094, + 0xa436, 0x8701, 0xa438, 0x5094, 0xa436, 0x80f1, 0xa438, 0x30CC, + 0xa436, 0x80f3, 0xa438, 0x0001, 0xa436, 0x80f5, 0xa438, 0x330B, + 0xa436, 0x80f8, 0xa438, 0xCB76, 0xa436, 0x8105, 0xa438, 0xf0D3, + 0xa436, 0x8107, 0xa438, 0x0002, 0xa436, 0x8109, 0xa438, 0xff0B, + 0xa436, 0x810c, 0xa438, 0xC86D, 0xB87C, 0x8a32, 0xB87E, 0x0400, + 0xa6f8, 0x0000, 0xa6f8, 0x0000, 0xa436, 0x81bc, 0xa438, 0x1300, + 0xa846, 0x2410, 0xa86A, 0x0801, 0xa85C, 0x9680, 0xa436, 0x841D, + 0xa438, 0x4A28, 0xa436, 0x8016, 0xa438, 0xBE05, 0xBF9C, 0x004A, + 0xBF96, 0x41FA, 0xBF9A, 0xDC81, 0xa436, 0x8018, 0xa438, 0x0700, + 0xa436, 0x8ff4, 0xa438, 0x01AE, 0xa436, 0x8fef, 0xa438, 0x0172, + 0xa438, 0x00dc, 0xc842, 0x0002, 0xFFFF, 0xFFFF +}; + +static const u16 phy_mcu_ram_code_8126a_1_3[] = { + 0xb892, 0x0000, 0xB88E, 0xC236, 0xB890, 0x1A1C, 0xB88E, 0xC238, + 0xB890, 0x1C1C, 0xB890, 0x1C1C, 0xB890, 0x2D2D, 0xB890, 0x2D2D, + 0xB890, 0x2D2A, 0xB890, 0x2A2A, 0xB890, 0x2A2A, 0xB890, 0x2A19, + 0xB88E, 0xC272, 0xB890, 0x8484, 0xB890, 0x8484, 0xB890, 0x84B4, + 0xB890, 0xB4B4, 0xB890, 0xB4B4, 0xB890, 0xF8F8, 0xB890, 0xF8F8, + 0xB890, 0xF8F8, 0xB88E, 0xC000, 0xB890, 0x0303, 0xB890, 0x0405, + 0xB890, 0x0608, 0xB890, 0x0A0B, 0xB890, 0x0E11, 0xB890, 0x1519, + 0xB890, 0x2028, 0xB890, 0x3503, 0xB890, 0x0304, 0xB890, 0x0405, + 0xB890, 0x0606, 0xB890, 0x0708, 0xB890, 0x090A, 0xB890, 0x0B0D, + 0xB890, 0x0F11, 0xB890, 0x1315, 0xB890, 0x181A, 0xB890, 0x2029, + 0xB890, 0x2F36, 0xB890, 0x3D43, 0xB890, 0x0101, 0xB890, 0x0102, + 0xB890, 0x0202, 0xB890, 0x0303, 0xB890, 0x0405, 0xB890, 0x0607, + 0xB890, 0x090A, 0xB890, 0x0C0E, 0xB88E, 0xC038, 0xB890, 0x6AE1, + 0xB890, 0x8E6B, 0xB890, 0xA767, 0xB890, 0x01EF, 0xB890, 0x5A63, + 0xB890, 0x2B99, 0xB890, 0x7F5D, 0xB890, 0x361F, 0xB890, 0xA127, + 0xB890, 0xB558, 0xB890, 0x11C3, 0xB890, 0x7D85, 0xB890, 0xBAC5, + 0xB890, 0xE691, 0xB890, 0x8F79, 0xB890, 0x3164, 0xB890, 0x3293, + 0xB890, 0xB80D, 0xB890, 0xE2B7, 0xB890, 0x0D62, 0xB890, 0x4F85, + 0xB890, 0xC919, 0xB890, 0x78F3, 0xB890, 0x77FF, 0xB890, 0xBD9E, + 0xB890, 0x69D6, 0xB890, 0x6DA4, 0xB890, 0x0CC5, 0xB88E, 0xC1D2, + 0xB890, 0x2425, 0xB890, 0x2627, 0xB890, 0x2829, 0xB890, 0x2A2B, + 0xB890, 0x2C2D, 0xB890, 0x2E2F, 0xB890, 0x3031, 0xB890, 0x3233, + 0xB890, 0x2323, 0xB890, 0x2424, 0xB890, 0x2525, 0xB890, 0x2626, + 0xB890, 0x2727, 0xB890, 0x2828, 0xB890, 0x2929, 0xB890, 0x2A2A, + 0xB890, 0x2B2C, 0xB890, 0x2C2D, 0xB890, 0x2D2E, 0xB890, 0x2E2F, + 0xB890, 0x2F30, 0xB890, 0x1A1B, 0xB890, 0x1D1E, 0xB890, 0x1F20, + 0xB890, 0x2123, 0xB890, 0x2425, 0xB890, 0x2628, 0xB890, 0x292A, + 0xB890, 0x2B2C, 0xB890, 0x2E12, 0xB88E, 0xC09A, 0xB890, 0xD3D3, + 0xB890, 0xD3D3, 0xB890, 0xD3D3, 0xB890, 0xD3D3, 0xB890, 0xD3D3, + 0xB890, 0xD3D3, 0xB890, 0xD3D3, 0xB890, 0xD3D3, 0xFFFF, 0xFFFF +}; + +static const u16 phy_mcu_ram_code_8126a_2_1[] = { + 0xa436, 0x8023, 0xa438, 0x4700, 0xa436, 0xB82E, 0xa438, 0x0001, + 0xb820, 0x0090, 0xa436, 0xA016, 0xa438, 0x0000, 0xa436, 0xA012, + 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010, + 0xa438, 0x1800, 0xa438, 0x8025, 0xa438, 0x1800, 0xa438, 0x8033, + 0xa438, 0x1800, 0xa438, 0x8037, 0xa438, 0x1800, 0xa438, 0x803c, + 0xa438, 0x1800, 0xa438, 0x8044, 0xa438, 0x1800, 0xa438, 0x8054, + 0xa438, 0x1800, 0xa438, 0x8059, 0xa438, 0xd504, 0xa438, 0xc9b5, + 0xa438, 0xd500, 0xa438, 0xd707, 0xa438, 0x4070, 0xa438, 0x1800, + 0xa438, 0x107a, 0xa438, 0xd504, 0xa438, 0xc994, 0xa438, 0xd500, + 0xa438, 0xd707, 0xa438, 0x60d0, 0xa438, 0xd701, 0xa438, 0x252d, + 0xa438, 0x8023, 0xa438, 0x1800, 0xa438, 0x1064, 0xa438, 0x1800, + 0xa438, 0x107a, 0xa438, 0x1800, 0xa438, 0x1052, 0xa438, 0xd504, + 0xa438, 0xc9d0, 0xa438, 0xd500, 0xa438, 0xd707, 0xa438, 0x60d0, + 0xa438, 0xd701, 0xa438, 0x252d, 0xa438, 0x8031, 0xa438, 0x1800, + 0xa438, 0x1171, 0xa438, 0x1800, 0xa438, 0x1187, 0xa438, 0x1800, + 0xa438, 0x116a, 0xa438, 0xc0ff, 0xa438, 0xcaff, 0xa438, 0x1800, + 0xa438, 0x00d6, 0xa438, 0xd504, 0xa438, 0xa001, 0xa438, 0xd704, + 0xa438, 0x1800, 0xa438, 0x128b, 0xa438, 0xd707, 0xa438, 0x2005, + 0xa438, 0x8042, 0xa438, 0xd75e, 0xa438, 0x1800, 0xa438, 0x137a, + 0xa438, 0x1800, 0xa438, 0x13ed, 0xa438, 0x61d0, 0xa438, 0xd701, + 0xa438, 0x60a5, 0xa438, 0xd504, 0xa438, 0xc9b2, 0xa438, 0xd500, + 0xa438, 0xf004, 0xa438, 0xd504, 0xa438, 0xc9b1, 0xa438, 0xd500, + 0xa438, 0xd707, 0xa438, 0x6070, 0xa438, 0x1800, 0xa438, 0x10a8, + 0xa438, 0x1800, 0xa438, 0x10bd, 0xa438, 0xd500, 0xa438, 0xc492, + 0xa438, 0xd501, 0xa438, 0x1800, 0xa438, 0x13c1, 0xa438, 0xa980, + 0xa438, 0xd500, 0xa438, 0x1800, 0xa438, 0x143b, 0xa436, 0xA026, + 0xa438, 0x143a, 0xa436, 0xA024, 0xa438, 0x13c0, 0xa436, 0xA022, + 0xa438, 0x10bc, 0xa436, 0xA020, 0xa438, 0x1379, 0xa436, 0xA006, + 0xa438, 0x128a, 0xa436, 0xA004, 0xa438, 0x00d5, 0xa436, 0xA002, + 0xa438, 0x1182, 0xa436, 0xA000, 0xa438, 0x1075, 0xa436, 0xA008, + 0xa438, 0xff00, 0xa436, 0xA016, 0xa438, 0x0010, 0xa436, 0xA012, + 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010, + 0xa438, 0x1800, 0xa438, 0x8015, 0xa438, 0x1800, 0xa438, 0x801a, + 0xa438, 0x1800, 0xa438, 0x801e, 0xa438, 0x1800, 0xa438, 0x8027, + 0xa438, 0x1800, 0xa438, 0x8027, 0xa438, 0x1800, 0xa438, 0x8027, + 0xa438, 0x1800, 0xa438, 0x8027, 0xa438, 0x0c0f, 0xa438, 0x0505, + 0xa438, 0xba01, 0xa438, 0x1800, 0xa438, 0x015e, 0xa438, 0x0c0f, + 0xa438, 0x0506, 0xa438, 0xba02, 0xa438, 0x1800, 0xa438, 0x017c, + 0xa438, 0x9910, 0xa438, 0x9a03, 0xa438, 0x1800, 0xa438, 0x02d4, + 0xa438, 0x8580, 0xa438, 0xc090, 0xa438, 0x9a03, 0xa438, 0x1000, + 0xa438, 0x02c9, 0xa438, 0xd700, 0xa438, 0x5fa3, 0xa438, 0x1800, + 0xa438, 0x0067, 0xa436, 0xA08E, 0xa438, 0xffff, 0xa436, 0xA08C, + 0xa438, 0xffff, 0xa436, 0xA08A, 0xa438, 0xffff, 0xa436, 0xA088, + 0xa438, 0xffff, 0xa436, 0xA086, 0xa438, 0x018c, 0xa436, 0xA084, + 0xa438, 0x02d3, 0xa436, 0xA082, 0xa438, 0x017a, 0xa436, 0xA080, + 0xa438, 0x015c, 0xa436, 0xA090, 0xa438, 0x000f, 0xa436, 0xA016, + 0xa438, 0x0020, 0xa436, 0xA012, 0xa438, 0x0000, 0xa436, 0xA014, + 0xa438, 0x1800, 0xa438, 0x8010, 0xa438, 0x1800, 0xa438, 0x8023, + 0xa438, 0x1800, 0xa438, 0x8313, 0xa438, 0x1800, 0xa438, 0x831a, + 0xa438, 0x1800, 0xa438, 0x8489, 0xa438, 0x1800, 0xa438, 0x86b9, + 0xa438, 0x1800, 0xa438, 0x86c1, 0xa438, 0x1800, 0xa438, 0x87ad, + 0xa438, 0x1000, 0xa438, 0x124e, 0xa438, 0x9308, 0xa438, 0xb201, + 0xa438, 0xb301, 0xa438, 0xd701, 0xa438, 0x5fe0, 0xa438, 0xd2ff, + 0xa438, 0xb302, 0xa438, 0xd200, 0xa438, 0xb201, 0xa438, 0xb309, + 0xa438, 0xd701, 0xa438, 0x5fe0, 0xa438, 0xd2ff, 0xa438, 0xb302, + 0xa438, 0xd200, 0xa438, 0x1800, 0xa438, 0x0025, 0xa438, 0xd706, + 0xa438, 0x6069, 0xa438, 0xd700, 0xa438, 0x6421, 0xa438, 0xd70c, + 0xa438, 0x43ab, 0xa438, 0x800a, 0xa438, 0x8190, 0xa438, 0x8204, + 0xa438, 0xa280, 0xa438, 0x8406, 0xa438, 0x0c03, 0xa438, 0x1502, + 0xa438, 0xa108, 0xa438, 0x9503, 0xa438, 0x0c03, 0xa438, 0x1502, + 0xa438, 0x0c1f, 0xa438, 0x0f19, 0xa438, 0x9503, 0xa438, 0x1000, + 0xa438, 0x1175, 0xa438, 0xd70c, 0xa438, 0x5fb3, 0xa438, 0x0c03, + 0xa438, 0x1502, 0xa438, 0x8f1f, 0xa438, 0x9503, 0xa438, 0x1000, + 0xa438, 0x1175, 0xa438, 0xd70c, 0xa438, 0x7f33, 0xa438, 0x1000, + 0xa438, 0x11bd, 0xa438, 0x1800, 0xa438, 0x81aa, 0xa438, 0x8710, + 0xa438, 0xd701, 0xa438, 0x33b1, 0xa438, 0x8051, 0xa438, 0xd701, + 0xa438, 0x60b5, 0xa438, 0xd706, 0xa438, 0x6069, 0xa438, 0x1800, + 0xa438, 0x8056, 0xa438, 0xa00a, 0xa438, 0xa280, 0xa438, 0xa404, + 0xa438, 0x1800, 0xa438, 0x80f3, 0xa438, 0xd173, 0xa438, 0xd04d, + 0xa438, 0x1000, 0xa438, 0x1175, 0xa438, 0xd700, 0xa438, 0x5fb4, + 0xa438, 0xd173, 0xa438, 0xd05d, 0xa438, 0xd10d, 0xa438, 0xd049, + 0xa438, 0x1000, 0xa438, 0x1175, 0xa438, 0xd700, 0xa438, 0x5fb4, + 0xa438, 0xd700, 0xa438, 0x64f5, 0xa438, 0xd700, 0xa438, 0x5ee7, + 0xa438, 0xb920, 0xa438, 0x1000, 0xa438, 0x1175, 0xa438, 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0xad00, 0xa438, 0xe7ff, 0xa436, 0xad02, + 0xa438, 0xdbe7, 0xa436, 0xad04, 0xa438, 0xfffe, 0xa436, 0xad06, + 0xa438, 0xffff, 0xa436, 0xad08, 0xa438, 0x0017, 0xa436, 0xad00, + 0xa438, 0x07ff, 0xa436, 0xad02, 0xa438, 0xdfe7, 0xa436, 0xad04, + 0xa438, 0xfffe, 0xa436, 0xad06, 0xa438, 0xffff, 0xa436, 0xad08, + 0xa438, 0x0017, 0xa436, 0xacfc, 0xa438, 0x0000, 0xa436, 0xaccc, + 0xa438, 0x2000, 0xa436, 0xacce, 0xa438, 0x6000, 0xa436, 0xaccc, + 0xa438, 0x2001, 0xa436, 0xacce, 0xa438, 0x6008, 0xa436, 0xaccc, + 0xa438, 0x2002, 0xa436, 0xacce, 0xa438, 0x6010, 0xa436, 0xaccc, + 0xa438, 0x2003, 0xa436, 0xacce, 0xa438, 0x6020, 0xa436, 0xaccc, + 0xa438, 0x2004, 0xa436, 0xacce, 0xa438, 0x6060, 0xa436, 0xaccc, + 0xa438, 0x2005, 0xa436, 0xacce, 0xa438, 0x60a0, 0xa436, 0xaccc, + 0xa438, 0x2006, 0xa436, 0xacce, 0xa438, 0x60e0, 0xa436, 0xaccc, + 0xa438, 0x2007, 0xa436, 0xacce, 0xa438, 0x6128, 0xa436, 0xaccc, + 0xa438, 0x2008, 0xa436, 0xacce, 0xa438, 0x6178, 0xa436, 0xaccc, + 0xa438, 0x2009, 0xa436, 0xacce, 0xa438, 0x61a8, 0xa436, 0xaccc, + 0xa438, 0x200a, 0xa436, 0xacce, 0xa438, 0x61f0, 0xa436, 0xaccc, + 0xa438, 0x200b, 0xa436, 0xacce, 0xa438, 0x6248, 0xa436, 0xaccc, + 0xa438, 0x200c, 0xa436, 0xacce, 0xa438, 0x6258, 0xa436, 0xaccc, + 0xa438, 0x200d, 0xa436, 0xacce, 0xa438, 0x6268, 0xa436, 0xaccc, + 0xa438, 0x200e, 0xa436, 0xacce, 0xa438, 0x6270, 0xa436, 0xaccc, + 0xa438, 0x200f, 0xa436, 0xacce, 0xa438, 0x6274, 0xa436, 0xaccc, + 0xa438, 0x2010, 0xa436, 0xacce, 0xa438, 0x627c, 0xa436, 0xaccc, + 0xa438, 0x2011, 0xa436, 0xacce, 0xa438, 0x6284, 0xa436, 0xaccc, + 0xa438, 0x2012, 0xa436, 0xacce, 0xa438, 0x6294, 0xa436, 0xaccc, + 0xa438, 0x2013, 0xa436, 0xacce, 0xa438, 0x629c, 0xa436, 0xaccc, + 0xa438, 0x2014, 0xa436, 0xacce, 0xa438, 0x62ac, 0xa436, 0xaccc, + 0xa438, 0x2015, 0xa436, 0xacce, 0xa438, 0x62bc, 0xa436, 0xaccc, + 0xa438, 0x2016, 0xa436, 0xacce, 0xa438, 0x62c4, 0xa436, 0xaccc, + 0xa438, 0x2017, 0xa436, 0xacce, 0xa438, 0x7000, 0xa436, 0xaccc, + 0xa438, 0x2018, 0xa436, 0xacce, 0xa438, 0x6000, 0xa436, 0xaccc, + 0xa438, 0x2019, 0xa436, 0xacce, 0xa438, 0x6000, 0xa436, 0xaccc, + 0xa438, 0x201a, 0xa436, 0xacce, 0xa438, 0x6000, 0xa436, 0xaccc, + 0xa438, 0x201b, 0xa436, 0xacce, 0xa438, 0x6000, 0xa436, 0xaccc, + 0xa438, 0x201c, 0xa436, 0xacce, 0xa438, 0x6000, 0xa436, 0xaccc, + 0xa438, 0x201d, 0xa436, 0xacce, 0xa438, 0x6000, 0xa436, 0xaccc, + 0xa438, 0x201e, 0xa436, 0xacce, 0xa438, 0x6000, 0xa436, 0xaccc, + 0xa438, 0x201f, 0xa436, 0xacce, 0xa438, 0x6000, 0xa436, 0xacce, + 0xa438, 0x0000, 0xa436, 0x0000, 0xa438, 0x0000, 0xb82e, 0x0000, + 0xa436, 0x8023, 0xa438, 0x0000, 0xa436, 0x801E, 0xa438, 0x0027, + 0xB820, 0x0000, 0xFFFF, 0xFFFF +}; + +static const u16 phy_mcu_ram_code_8126a_2_3[] = { + 0xb892, 0x0000, 0xb88e, 0xC15C, 0xb890, 0x0303, 0xb890, 0x0506, + 0xb890, 0x0807, 0xb890, 0x090B, 0xb890, 0x0E12, 0xb890, 0x1617, + 0xb890, 0x1C24, 0xb890, 0x2B37, 0xb890, 0x0203, 0xb890, 0x0304, + 0xb890, 0x0504, 0xb890, 0x0506, 0xb890, 0x0708, 0xb890, 0x090A, + 0xb890, 0x0B0E, 0xb890, 0x1013, 0xb890, 0x1519, 0xb890, 0x1D22, + 0xb890, 0x282E, 0xb890, 0x363E, 0xb890, 0x474B, 0xb88e, 0xC196, + 0xb890, 0x3F5E, 0xb890, 0xF834, 0xb890, 0x6C01, 0xb890, 0xA67F, + 0xb890, 0xA06C, 0xb890, 0x043B, 0xb890, 0x6190, 0xb890, 0x88DB, + 0xb890, 0x9ECD, 0xb890, 0x4DBC, 0xb890, 0x6E0E, 0xb890, 0x9F2D, + 0xb890, 0x2C18, 0xb890, 0x5E8C, 0xb890, 0x5BFE, 0xb890, 0x183C, + 0xb890, 0x23C9, 0xb890, 0x3E84, 0xb890, 0x3C20, 0xb890, 0xCC56, + 0xb890, 0x3480, 0xb890, 0x0040, 0xb88e, 0xC00F, 0xb890, 0x3502, + 0xb890, 0x0203, 0xb890, 0x0303, 0xb890, 0x0404, 0xb890, 0x0506, + 0xb890, 0x0607, 0xb890, 0x080A, 0xb890, 0x0B0D, 0xb890, 0x0E10, + 0xb890, 0x1114, 0xb890, 0x171B, 0xb890, 0x1F22, 0xb890, 0x2832, + 0xb890, 0x0101, 0xb890, 0x0101, 0xb890, 0x0202, 0xb890, 0x0303, + 0xb890, 0x0404, 0xb890, 0x0506, 0xb890, 0x0709, 0xb890, 0x0A0D, + 0xb88e, 0xC047, 0xb890, 0x365F, 0xb890, 0xBE10, 0xb890, 0x84E4, + 0xb890, 0x60E9, 0xb890, 0xA86A, 0xb890, 0xF1E3, 0xb890, 0xF73F, + 0xb890, 0x5C02, 0xb890, 0x9547, 0xb890, 0xC30C, 0xb890, 0xB064, + 0xb890, 0x079A, 0xb890, 0x1E23, 0xb890, 0x1B5D, 0xb890, 0x92E7, + 0xb890, 0x4BAF, 0xb890, 0x2386, 0xb890, 0x01B6, 0xb890, 0x6F82, + 0xb890, 0xDC1C, 0xb890, 0x8C92, 0xb88e, 0xC110, 0xb890, 0x0C7F, + 0xb890, 0x1014, 0xb890, 0x231D, 0xb890, 0x2023, 0xb890, 0x2628, + 0xb890, 0x2A2D, 0xb890, 0x2D2C, 0xb890, 0x2C2E, 0xb890, 0x320D, + 0xb88e, 0xC186, 0xb890, 0x0306, 0xb890, 0x0804, 0xb890, 0x0406, + 0xb890, 0x0707, 0xb890, 0x0709, 0xb890, 0x0B0F, 0xb890, 0x161D, + 0xb890, 0x202A, 0xb890, 0x3F5E, 0xb88e, 0xC1C1, 0xb890, 0x0040, + 0xb890, 0x5920, 0xb890, 0x88CD, 0xb890, 0x1CA1, 0xb890, 0x3D20, + 0xb890, 0x3AE4, 0xb890, 0x6A43, 0xb890, 0x30AF, 0xb890, 0xDD16, + 0xb88e, 0xC283, 0xb890, 0x1611, 0xb890, 0x161C, 0xb890, 0x2127, + 0xb890, 0x2C32, 0xb890, 0x373D, 0xb890, 0x4247, 0xb890, 0x4D52, + 0xb890, 0x585A, 0xb890, 0x0004, 0xb890, 0x080C, 0xb890, 0x1014, + 0xb890, 0x181B, 0xb890, 0x1F23, 0xb890, 0x272B, 0xb890, 0x2F33, + 0xb890, 0x363A, 0xb890, 0x3E42, 0xb890, 0x464A, 0xb890, 0x4D51, + 0xb890, 0x5559, 0xb890, 0x5D65, 0xb890, 0xE769, 0xb890, 0xEB56, + 0xb890, 0xC04B, 0xb890, 0xD502, 0xb890, 0x2FB1, 0xb890, 0x33B5, + 0xb890, 0x37F8, 0xb890, 0xBB98, 0xb890, 0x7450, 0xb890, 0x4C48, + 0xb890, 0x12DC, 0xb890, 0xDCDC, 0xb890, 0x934A, 0xb890, 0x3E33, + 0xb890, 0xE496, 0xb890, 0x724E, 0xb890, 0x2B07, 0xb890, 0xE4C0, + 0xb890, 0x9C79, 0xb890, 0x5512, 0xb88e, 0xC212, 0xb890, 0x2020, + 0xb890, 0x2020, 0xb890, 0x2020, 0xb890, 0x2020, 0xb890, 0x2020, + 0xb890, 0x2019, 0xb88e, 0xC24D, 0xb890, 0x8400, 0xb890, 0x0000, + 0xb890, 0x0000, 0xb890, 0x0000, 0xb890, 0x0000, 0xb890, 0x0000, + 0xb88e, 0xC2D3, 0xb890, 0x5524, 0xb890, 0x2526, 0xb890, 0x2728, + 0xb88e, 0xC2E3, 0xb890, 0x3323, 0xb890, 0x2324, 0xb890, 0x2425, + 0xFFFF, 0xFFFF +}; + +static const u16 phy_mcu_ram_code_8126a_3_1[] = { + 0xa436, 0x8023, 0xa438, 0x4701, 0xa436, 0xB82E, 0xa438, 0x0001, + 0xb820, 0x0090, 0xa436, 0xA016, 0xa438, 0x0000, 0xa436, 0xA012, + 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, 0xa438, 0x8010, + 0xa438, 0x1800, 0xa438, 0x801a, 0xa438, 0x1800, 0xa438, 0x802a, + 0xa438, 0x1800, 0xa438, 0x8032, 0xa438, 0x1800, 0xa438, 0x803a, + 0xa438, 0x1800, 0xa438, 0x803e, 0xa438, 0x1800, 0xa438, 0x8044, + 0xa438, 0x1800, 0xa438, 0x804b, 0xa438, 0xd504, 0xa438, 0xc9b5, + 0xa438, 0xd500, 0xa438, 0xd707, 0xa438, 0x4070, 0xa438, 0x1800, + 0xa438, 0x1082, 0xa438, 0xd504, 0xa438, 0x1800, 0xa438, 0x107a, + 0xa438, 0x61d0, 0xa438, 0xd701, 0xa438, 0x60a5, 0xa438, 0xd504, + 0xa438, 0xc9b2, 0xa438, 0xd500, 0xa438, 0xf004, 0xa438, 0xd504, + 0xa438, 0xc9b1, 0xa438, 0xd500, 0xa438, 0xd707, 0xa438, 0x6070, + 0xa438, 0x1800, 0xa438, 0x10b0, 0xa438, 0x1800, 0xa438, 0x10c5, + 0xa438, 0xd707, 0xa438, 0x2005, 0xa438, 0x8030, 0xa438, 0xd75e, + 0xa438, 0x1800, 0xa438, 0x138c, 0xa438, 0x1800, 0xa438, 0x13ff, + 0xa438, 0xc504, 0xa438, 0xce20, 0xa438, 0xcf01, 0xa438, 0xd70a, + 0xa438, 0x4005, 0xa438, 0xcf02, 0xa438, 0x1800, 0xa438, 0x1b99, + 0xa438, 0xa980, 0xa438, 0xd500, 0xa438, 0x1800, 0xa438, 0x144d, + 0xa438, 0x907f, 0xa438, 0x91a3, 0xa438, 0x9306, 0xa438, 0xb118, + 0xa438, 0x1800, 0xa438, 0x2147, 0xa438, 0x907f, 0xa438, 0x9209, + 0xa438, 0x91a3, 0xa438, 0x9306, 0xa438, 0xb118, 0xa438, 0x1800, + 0xa438, 0x203c, 0xa436, 0xA026, 0xa438, 0xffff, 0xa436, 0xA024, + 0xa438, 0x2033, 0xa436, 0xA022, 0xa438, 0x213f, 0xa436, 0xA020, + 0xa438, 0x144c, 0xa436, 0xA006, 0xa438, 0x1b98, 0xa436, 0xA004, + 0xa438, 0x138b, 0xa436, 0xA002, 0xa438, 0x10c4, 0xa436, 0xA000, + 0xa438, 0x1079, 0xa436, 0xA008, 0xa438, 0x7f00, 0xa436, 0xA016, + 0xa438, 0x0000, 0xa436, 0xA012, 0xa438, 0x0ff8, 0xa436, 0xA014, + 0xa438, 0xd04d, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, + 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, 0xa438, 0x0000, + 0xa436, 0xA152, 0xa438, 0x12dc, 0xa436, 0xA154, 0xa438, 0x3fff, + 0xa436, 0xA156, 0xa438, 0x3fff, 0xa436, 0xA158, 0xa438, 0x3fff, + 0xa436, 0xA15A, 0xa438, 0x3fff, 0xa436, 0xA15C, 0xa438, 0x3fff, + 0xa436, 0xA15E, 0xa438, 0x3fff, 0xa436, 0xA160, 0xa438, 0x3fff, + 0xa436, 0xA150, 0xa438, 0x0001, 0xa436, 0xA016, 0xa438, 0x0020, + 0xa436, 0xA012, 0xa438, 0x0000, 0xa436, 0xA014, 0xa438, 0x1800, + 0xa438, 0x8010, 0xa438, 0x1800, 0xa438, 0x801a, 0xa438, 0x1800, + 0xa438, 0x801a, 0xa438, 0x1800, 0xa438, 0x810a, 0xa438, 0x1800, + 0xa438, 0x8111, 0xa438, 0x1800, 0xa438, 0x8341, 0xa438, 0x1800, + 0xa438, 0x8349, 0xa438, 0x1800, 0xa438, 0x83df, 0xa438, 0xd706, + 0xa438, 0x60a9, 0xa438, 0xd700, 0xa438, 0x60a1, 0xa438, 0x1800, + 0xa438, 0x0962, 0xa438, 0x1800, 0xa438, 0x0962, 0xa438, 0x1800, + 0xa438, 0x0982, 0xa438, 0xd70d, 0xa438, 0x40fd, 0xa438, 0xd702, + 0xa438, 0x40a0, 0xa438, 0xd70c, 0xa438, 0x4066, 0xa438, 0x8710, + 0xa438, 0xf002, 0xa438, 0xa710, 0xa438, 0x9580, 0xa438, 0x0c03, + 0xa438, 0x1502, 0xa438, 0xa304, 0xa438, 0x9503, 0xa438, 0x0c1f, + 0xa438, 0x0d07, 0xa438, 0x8dc0, 0xa438, 0x1000, 0xa438, 0x12b5, + 0xa438, 0xcb81, 0xa438, 0xd70c, 0xa438, 0x4882, 0xa438, 0xd706, + 0xa438, 0x407a, 0xa438, 0xd70c, 0xa438, 0x4807, 0xa438, 0xd706, + 0xa438, 0x405a, 0xa438, 0x8910, 0xa438, 0xa210, 0xa438, 0xd704, + 0xa438, 0x611c, 0xa438, 0x0cc0, 0xa438, 0x0080, 0xa438, 0x0c03, + 0xa438, 0x0101, 0xa438, 0x0ce0, 0xa438, 0x03a0, 0xa438, 0xccb5, + 0xa438, 0x0cc0, 0xa438, 0x0080, 0xa438, 0x0c03, 0xa438, 0x0102, + 0xa438, 0x0ce0, 0xa438, 0x0340, 0xa438, 0xcc52, 0xa438, 0xd706, + 0xa438, 0x42ba, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x0c1f, + 0xa438, 0x0f1c, 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x126b, + 0xa438, 0xd70c, 0xa438, 0x5fb3, 0xa438, 0x0c03, 0xa438, 0x1502, + 0xa438, 0x8f1f, 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x126b, + 0xa438, 0xd70c, 0xa438, 0x7f33, 0xa438, 0x8190, 0xa438, 0x8204, + 0xa438, 0xf016, 0xa438, 0x0c03, 0xa438, 0x1502, 0xa438, 0x0c1f, + 0xa438, 0x0f1b, 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x126b, + 0xa438, 0xd70c, 0xa438, 0x5fb3, 0xa438, 0x0c03, 0xa438, 0x1502, + 0xa438, 0x8f1f, 0xa438, 0x9503, 0xa438, 0x1000, 0xa438, 0x126b, + 0xa438, 0xd70c, 0xa438, 0x7f33, 0xa438, 0xd70c, 0xa438, 0x6047, + 0xa438, 0xf002, 0xa438, 0xf00c, 0xa438, 0xd403, 0xa438, 0xcb82, + 0xa438, 0x1000, 0xa438, 0x1203, 0xa438, 0xd40a, 0xa438, 0x1000, + 0xa438, 0x1203, 0xa438, 0xd70c, 0xa438, 0x4247, 0xa438, 0x1000, + 0xa438, 0x131d, 0xa438, 0x8a40, 0xa438, 0x1000, 0xa438, 0x120e, + 0xa438, 0xa104, 0xa438, 0x1000, 0xa438, 0x1220, 0xa438, 0x8104, + 0xa438, 0x1000, 0xa438, 0x1217, 0xa438, 0x0c03, 0xa438, 0x1502, + 0xa438, 0xa704, 0xa438, 0x9503, 0xa438, 0xcb88, 0xa438, 0xf012, + 0xa438, 0xa210, 0xa438, 0xa00a, 0xa438, 0xaa40, 0xa438, 0x1000, + 0xa438, 0x120e, 0xa438, 0xa104, 0xa438, 0x1000, 0xa438, 0x1220, + 0xa438, 0x8104, 0xa438, 0x1000, 0xa438, 0x1217, 0xa438, 0xa190, + 0xa438, 0xa284, 0xa438, 0xa404, 0xa438, 0x8a10, 0xa438, 0x8a80, + 0xa438, 0xcb84, 0xa438, 0xd13e, 0xa438, 0xd05a, 0xa438, 0xd13e, + 0xa438, 0xd06b, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd700, + 0xa438, 0x3559, 0xa438, 0x80a8, 0xa438, 0xfffb, 0xa438, 0xd700, + 0xa438, 0x604b, 0xa438, 0xcb8a, 0xa438, 0x1000, 0xa438, 0x126b, + 0xa438, 0xd700, 0xa438, 0x3659, 0xa438, 0x80b1, 0xa438, 0xfffb, + 0xa438, 0xd700, 0xa438, 0x606b, 0xa438, 0xcb8b, 0xa438, 0x5eeb, + 0xa438, 0xd700, 0xa438, 0x6041, 0xa438, 0xa402, 0xa438, 0xcb8c, + 0xa438, 0xd706, 0xa438, 0x609a, 0xa438, 0xd1b7, 0xa438, 0xd049, + 0xa438, 0xf003, 0xa438, 0xd160, 0xa438, 0xd04b, 0xa438, 0x1000, + 0xa438, 0x126b, 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0xcb8d, + 0xa438, 0x8710, 0xa438, 0xd71f, 0xa438, 0x5fd4, 0xa438, 0xb920, + 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd71f, 0xa438, 0x7fb4, + 0xa438, 0x9920, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd71f, + 0xa438, 0x6105, 0xa438, 0x6054, 0xa438, 0xfffb, 0xa438, 0x1000, + 0xa438, 0x126b, 0xa438, 0xd700, 0xa438, 0x5fab, 0xa438, 0xfff0, + 0xa438, 0xa710, 0xa438, 0xb820, 0xa438, 0x1000, 0xa438, 0x126b, + 0xa438, 0xd71f, 0xa438, 0x7fa5, 0xa438, 0x9820, 0xa438, 0xd114, + 0xa438, 0xd040, 0xa438, 0x1000, 0xa438, 0x126b, 0xa438, 0xd700, + 0xa438, 0x5fba, 0xa438, 0xd704, 0xa438, 0x5f76, 0xa438, 0xd700, + 0xa438, 0x5f34, 0xa438, 0xd700, 0xa438, 0x6081, 0xa438, 0xd706, + 0xa438, 0x405a, 0xa438, 0xa480, 0xa438, 0xcb86, 0xa438, 0xd706, + 0xa438, 0x609a, 0xa438, 0xd1c8, 0xa438, 0xd045, 0xa438, 0xf003, + 0xa438, 0xd17a, 0xa438, 0xd04b, 0xa438, 0x1000, 0xa438, 0x126b, + 0xa438, 0xd700, 0xa438, 0x5fb4, 0xa438, 0x0cc0, 0xa438, 0x0000, + 0xa438, 0x0c03, 0xa438, 0x0101, 0xa438, 0x0ce0, 0xa438, 0x0320, + 0xa438, 0xcc29, 0xa438, 0xa208, 0xa438, 0x8204, 0xa438, 0xd114, + 0xa438, 0xd040, 0xa438, 0xd700, 0xa438, 0x5ff4, 0xa438, 0x1800, + 0xa438, 0x0c3e, 0xa438, 0xd706, 0xa438, 0x609d, 0xa438, 0xd417, + 0xa438, 0x1000, 0xa438, 0x1203, 0xa438, 0x1800, 0xa438, 0x0d2e, + 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0xd70c, 0xa438, 0x5fa4, + 0xa438, 0xa706, 0xa438, 0xd70c, 0xa438, 0x408b, 0xa438, 0xa701, + 0xa438, 0xa502, 0xa438, 0xa880, 0xa438, 0x8801, 0xa438, 0x8e01, + 0xa438, 0xca50, 0xa438, 0x1000, 0xa438, 0x81b6, 0xa438, 0xca51, + 0xa438, 0xd70e, 0xa438, 0x2210, 0xa438, 0x81b4, 0xa438, 0xd70c, + 0xa438, 0x4084, 0xa438, 0xd705, 0xa438, 0x5efd, 0xa438, 0xf007, + 0xa438, 0x1000, 0xa438, 0x17c2, 0xa438, 0xd70c, 0xa438, 0x5ca2, + 0xa438, 0x1800, 0xa438, 0x1692, 0xa438, 0xd70c, 0xa438, 0x605a, + 0xa438, 0x9a10, 0xa438, 0x8e40, 0xa438, 0x8404, 0xa438, 0x1000, + 0xa438, 0x1827, 0xa438, 0x8e80, 0xa438, 0xca62, 0xa438, 0xd705, + 0xa438, 0x3084, 0xa438, 0x8196, 0xa438, 0xba10, 0xa438, 0x0000, + 0xa438, 0x0000, 0xa438, 0x1000, 0xa438, 0x8290, 0xa438, 0x0c03, + 0xa438, 0x0100, 0xa438, 0xd702, 0xa438, 0x4638, 0xa438, 0xd1c4, + 0xa438, 0xd044, 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0x1000, + 0xa438, 0x17e8, 0xa438, 0xd70c, 0xa438, 0x5f7c, 0xa438, 0x8108, + 0xa438, 0x0c1f, 0xa438, 0x0907, 0xa438, 0x8940, 0xa438, 0x1000, + 0xa438, 0x17db, 0xa438, 0xa0c4, 0xa438, 0x8610, 0xa438, 0x8030, + 0xa438, 0x8706, 0xa438, 0x0c07, 0xa438, 0x0b06, 0xa438, 0x8410, + 0xa438, 0xa980, 0xa438, 0xa702, 0xa438, 0xd1c4, 0xa438, 0xd045, + 0xa438, 0x1000, 0xa438, 0x17be, 0xa438, 0x1000, 0xa438, 0x17e8, + 0xa438, 0xd70c, 0xa438, 0x5f7c, 0xa438, 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0x8641, 0xa438, 0x00af, 0xa438, 0x6aa6, 0xa438, 0xd100, + 0xa438, 0xd300, 0xa438, 0xee86, 0xa438, 0x4001, 0xa438, 0xee86, + 0xa438, 0x4124, 0xa438, 0xd00f, 0xa438, 0xaf6a, 0xa438, 0xa6bf, + 0xa438, 0x739e, 0xa438, 0x027b, 0xa438, 0x07ad, 0xa438, 0x280b, + 0xa438, 0xe18f, 0xa438, 0xfdad, 0xa438, 0x2805, 0xa438, 0xe08f, + 0xa438, 0xfeae, 0xa438, 0x03e0, 0xa438, 0x8fff, 0xa438, 0xe489, + 0xa438, 0xe7e0, 0xa438, 0x89e7, 0xa438, 0xaf67, 0xa438, 0x9fa0, + 0xa438, 0x9402, 0xa438, 0xae03, 0xa438, 0xa0b5, 0xa438, 0x03af, + 0xa438, 0x0d89, 0xa438, 0xaf0d, 0xa438, 0xafa0, 0xa438, 0x9402, + 0xa438, 0xae03, 0xa438, 0xa0b5, 0xa438, 0x03af, 0xa438, 0x0c64, + 0xa438, 0xaf0c, 0xa438, 0xcce0, 0xa438, 0x8013, 0xa438, 0x026b, + 0xa438, 0xa4ad, 0xa438, 0x2109, 0xa438, 0x0264, 0xa438, 0x47bf, + 0xa438, 0x769b, 0xa438, 0x027a, 0xa438, 0xbcaf, 0xa438, 0x6562, + 0xa436, 0xb85e, 0xa438, 0x6A7F, 0xa436, 0xb860, 0xa438, 0x679C, + 0xa436, 0xb862, 0xa438, 0x0d86, 0xa436, 0xb864, 0xa438, 0x0c61, + 0xa436, 0xb886, 0xa438, 0x6553, 0xa436, 0xb888, 0xa438, 0xffff, + 0xa436, 0xb88a, 0xa438, 0xffff, 0xa436, 0xb88c, 0xa438, 0xffff, + 0xa436, 0xb838, 0xa438, 0x001f, 0xb820, 0x0010, 0xa436, 0x8629, + 0xa438, 0xaf86, 0xa438, 0x41af, 0xa438, 0x8644, 0xa438, 0xaf88, + 0xa438, 0x0caf, 0xa438, 0x8813, 0xa438, 0xaf88, 0xa438, 0x4baf, + 0xa438, 0x884b, 0xa438, 0xaf88, 0xa438, 0x4baf, 0xa438, 0x884b, + 0xa438, 0xaf1d, 0xa438, 0x8a02, 0xa438, 0x864d, 0xa438, 0x0210, + 0xa438, 0x64af, 0xa438, 0x1063, 0xa438, 0xf8fa, 0xa438, 0xef69, + 0xa438, 0xe080, 0xa438, 0x4cac, 0xa438, 0x2517, 0xa438, 0xe080, + 0xa438, 0x40ad, 0xa438, 0x251a, 0xa438, 0x0286, 0xa438, 0x7ce0, + 0xa438, 0x8040, 0xa438, 0xac25, 0xa438, 0x11bf, 0xa438, 0x87f4, + 0xa438, 0x0277, 0xa438, 0xf6ae, 0xa438, 0x0902, 0xa438, 0x87b3, + 0xa438, 0x0287, 0xa438, 0xe902, 0xa438, 0x87de, 0xa438, 0xef96, + 0xa438, 0xfefc, 0xa438, 0x04f8, 0xa438, 0xe080, 0xa438, 0x18ad, + 0xa438, 0x2611, 0xa438, 0xe08f, 0xa438, 0x9cac, 0xa438, 0x2005, + 0xa438, 0x0286, 0xa438, 0x99ae, 0xa438, 0x0302, 0xa438, 0x8707, + 0xa438, 0x0287, 0xa438, 0x5002, 0xa438, 0x87de, 0xa438, 0xfc04, + 0xa438, 0xf8f9, 0xa438, 0xef79, 0xa438, 0xfbbf, 0xa438, 0x87f7, + 0xa438, 0x0278, 0xa438, 0x385c, 0xa438, 0x2000, 0xa438, 0x0d4d, + 0xa438, 0xa101, 0xa438, 0x51bf, 0xa438, 0x87f7, 0xa438, 0x0278, + 0xa438, 0x385c, 0xa438, 0x07ff, 0xa438, 0xe38f, 0xa438, 0x9d1b, + 0xa438, 0x319f, 0xa438, 0x410d, 0xa438, 0x48e3, 0xa438, 0x8f9e, + 0xa438, 0x1b31, 0xa438, 0x9f38, 0xa438, 0xbf87, 0xa438, 0xfa02, + 0xa438, 0x7838, 0xa438, 0x5c07, 0xa438, 0xffe3, 0xa438, 0x8f9f, + 0xa438, 0x1b31, 0xa438, 0x9f28, 0xa438, 0x0d48, 0xa438, 0xe38f, + 0xa438, 0xa01b, 0xa438, 0x319f, 0xa438, 0x1fbf, 0xa438, 0x87fd, + 0xa438, 0x0278, 0xa438, 0x385c, 0xa438, 0x07ff, 0xa438, 0xe38f, + 0xa438, 0xa11b, 0xa438, 0x319f, 0xa438, 0x0f0d, 0xa438, 0x48e3, + 0xa438, 0x8fa2, 0xa438, 0x1b31, 0xa438, 0x9f06, 0xa438, 0xee8f, + 0xa438, 0x9c01, 0xa438, 0xae04, 0xa438, 0xee8f, 0xa438, 0x9c00, + 0xa438, 0xffef, 0xa438, 0x97fd, 0xa438, 0xfc04, 0xa438, 0xf8f9, + 0xa438, 0xef79, 0xa438, 0xfbbf, 0xa438, 0x87f7, 0xa438, 0x0278, + 0xa438, 0x385c, 0xa438, 0x2000, 0xa438, 0x0d4d, 0xa438, 0xa100, + 0xa438, 0x20bf, 0xa438, 0x87f7, 0xa438, 0x0278, 0xa438, 0x385c, + 0xa438, 0x0600, 0xa438, 0x0d49, 0xa438, 0xe38f, 0xa438, 0xa31b, + 0xa438, 0x319f, 0xa438, 0x0ebf, 0xa438, 0x8800, 0xa438, 0x0277, + 0xa438, 0xf6bf, 0xa438, 0x8806, 0xa438, 0x0277, 0xa438, 0xf6ae, + 0xa438, 0x0cbf, 0xa438, 0x8800, 0xa438, 0x0277, 0xa438, 0xedbf, + 0xa438, 0x8806, 0xa438, 0x0277, 0xa438, 0xedee, 0xa438, 0x8f9c, + 0xa438, 0x00ff, 0xa438, 0xef97, 0xa438, 0xfdfc, 0xa438, 0x04f8, + 0xa438, 0xf9ef, 0xa438, 0x79fb, 0xa438, 0xbf87, 0xa438, 0xf702, + 0xa438, 0x7838, 0xa438, 0x5c20, 0xa438, 0x000d, 0xa438, 0x4da1, + 0xa438, 0x014a, 0xa438, 0xbf87, 0xa438, 0xf702, 0xa438, 0x7838, + 0xa438, 0x5c07, 0xa438, 0xffe3, 0xa438, 0x8fa4, 0xa438, 0x1b31, + 0xa438, 0x9f3a, 0xa438, 0x0d48, 0xa438, 0xe38f, 0xa438, 0xa51b, + 0xa438, 0x319f, 0xa438, 0x31bf, 0xa438, 0x87fa, 0xa438, 0x0278, + 0xa438, 0x38e3, 0xa438, 0x8fa6, 0xa438, 0x1b31, 0xa438, 0x9f24, + 0xa438, 0x0d48, 0xa438, 0xe38f, 0xa438, 0xa71b, 0xa438, 0x319f, + 0xa438, 0x1bbf, 0xa438, 0x87fd, 0xa438, 0x0278, 0xa438, 0x38e3, + 0xa438, 0x8fa8, 0xa438, 0x1b31, 0xa438, 0x9f0e, 0xa438, 0xbf88, + 0xa438, 0x0302, 0xa438, 0x77f6, 0xa438, 0xbf88, 0xa438, 0x0902, + 0xa438, 0x77f6, 0xa438, 0xae00, 0xa438, 0xffef, 0xa438, 0x97fd, + 0xa438, 0xfc04, 0xa438, 0xf8ef, 0xa438, 0x79fb, 0xa438, 0xe080, + 0xa438, 0x18ad, 0xa438, 0x261c, 0xa438, 0xee8f, 0xa438, 0x9c00, + 0xa438, 0xbf88, 0xa438, 0x0002, 0xa438, 0x77ed, 0xa438, 0xbf88, + 0xa438, 0x0602, 0xa438, 0x77ed, 0xa438, 0xbf88, 0xa438, 0x0302, + 0xa438, 0x77ed, 0xa438, 0xbf88, 0xa438, 0x0902, 0xa438, 0x77ed, + 0xa438, 0xffef, 0xa438, 0x97fc, 0xa438, 0x04f8, 0xa438, 0xe080, + 0xa438, 0x40f6, 0xa438, 0x25e4, 0xa438, 0x8040, 0xa438, 0xfc04, + 0xa438, 0xf8e0, 0xa438, 0x804c, 0xa438, 0xf625, 0xa438, 0xe480, + 0xa438, 0x4cfc, 0xa438, 0x0455, 0xa438, 0xa4ba, 0xa438, 0xf0a6, + 0xa438, 0x4af0, 0xa438, 0xa64c, 0xa438, 0xf0a6, 0xa438, 0x4e66, + 0xa438, 0xa4b6, 0xa438, 0x55a4, 0xa438, 0xb600, 0xa438, 0xac56, + 0xa438, 0x11ac, 0xa438, 0x56ee, 0xa438, 0x804c, 0xa438, 0x3aaf, + 0xa438, 0x0627, 0xa438, 0xbf88, 0xa438, 0x4802, 0xa438, 0x77ed, + 0xa438, 0xd203, 0xa438, 0xe083, 0xa438, 0x8a0d, 0xa438, 0x01f6, + 0xa438, 0x271b, 0xa438, 0x03aa, 0xa438, 0x0182, 0xa438, 0xe083, + 0xa438, 0x890d, 0xa438, 0x01f6, 0xa438, 0x271b, 0xa438, 0x03aa, + 0xa438, 0x0182, 0xa438, 0xe083, 0xa438, 0x880d, 0xa438, 0x01f6, + 0xa438, 0x271b, 0xa438, 0x03aa, 0xa438, 0x0782, 0xa438, 0xbf88, + 0xa438, 0x4802, 0xa438, 0x77f6, 0xa438, 0xaf16, 0xa438, 0x1500, + 0xa438, 0xa86a, 0xa436, 0xb818, 0xa438, 0x1D84, 0xa436, 0xb81a, + 0xa438, 0x1060, 0xa436, 0xb81c, 0xa438, 0x0623, 0xa436, 0xb81e, + 0xa438, 0x15ef, 0xa436, 0xb850, 0xa438, 0xffff, 0xa436, 0xb852, + 0xa438, 0xffff, 0xa436, 0xb878, 0xa438, 0xffff, 0xa436, 0xb884, + 0xa438, 0xffff, 0xa436, 0xb832, 0xa438, 0x000f, 0xa436, 0x0000, + 0xa438, 0x0000, 0xB82E, 0x0000, 0xa436, 0x8023, 0xa438, 0x0000, + 0xB820, 0x0000, 0xFFFF, 0xFFFF +}; + +static void +rtl8126_real_set_phy_mcu_8126a_1_1(struct net_device *dev) +{ + rtl8126_set_phy_mcu_ram_code(dev, + phy_mcu_ram_code_8126a_1_1, + ARRAY_SIZE(phy_mcu_ram_code_8126a_1_1)); +} + +static void +rtl8126_real_set_phy_mcu_8126a_1_2(struct net_device *dev) +{ + rtl8126_set_phy_mcu_ram_code(dev, + phy_mcu_ram_code_8126a_1_2, + ARRAY_SIZE(phy_mcu_ram_code_8126a_1_2)); +} + +static void +rtl8126_real_set_phy_mcu_8126a_1_3(struct net_device *dev) +{ + rtl8126_set_phy_mcu_ram_code(dev, + phy_mcu_ram_code_8126a_1_3, + ARRAY_SIZE(phy_mcu_ram_code_8126a_1_3)); +} + +static void +rtl8126_set_phy_mcu_8126a_1(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + rtl8126_set_phy_mcu_patch_request(tp); + + rtl8126_real_set_phy_mcu_8126a_1_1(dev); + + rtl8126_clear_phy_mcu_patch_request(tp); + + rtl8126_set_phy_mcu_patch_request(tp); + + rtl8126_real_set_phy_mcu_8126a_1_2(dev); + + rtl8126_clear_phy_mcu_patch_request(tp); + + rtl8126_set_phy_mcu_patch_request(tp); + + rtl8126_real_set_phy_mcu_8126a_1_3(dev); + + rtl8126_clear_phy_mcu_patch_request(tp); +} + +static void +rtl8126_real_set_phy_mcu_8126a_2_1(struct net_device *dev) +{ + rtl8126_set_phy_mcu_ram_code(dev, + phy_mcu_ram_code_8126a_2_1, + ARRAY_SIZE(phy_mcu_ram_code_8126a_2_1)); +} + +static void +rtl8126_real_set_phy_mcu_8126a_2_3(struct net_device *dev) +{ + rtl8126_set_phy_mcu_ram_code(dev, + phy_mcu_ram_code_8126a_2_3, + ARRAY_SIZE(phy_mcu_ram_code_8126a_2_3)); +} + +static void +rtl8126_set_phy_mcu_8126a_2(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + rtl8126_set_phy_mcu_patch_request(tp); + + rtl8126_real_set_phy_mcu_8126a_2_1(dev); + + rtl8126_clear_phy_mcu_patch_request(tp); + + rtl8126_set_phy_mcu_patch_request(tp); + + rtl8126_real_set_phy_mcu_8126a_2_3(dev); + + rtl8126_clear_phy_mcu_patch_request(tp); +} + +static void +rtl8126_real_set_phy_mcu_8126a_3_1(struct net_device *dev) +{ + rtl8126_set_phy_mcu_ram_code(dev, + phy_mcu_ram_code_8126a_3_1, + ARRAY_SIZE(phy_mcu_ram_code_8126a_3_1)); +} + +static void +rtl8126_set_phy_mcu_8126a_3(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + rtl8126_set_phy_mcu_patch_request(tp); + + rtl8126_real_set_phy_mcu_8126a_3_1(dev); + + rtl8126_clear_phy_mcu_patch_request(tp); +} + +static void +rtl8126_init_hw_phy_mcu(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + u8 require_disable_phy_disable_mode = FALSE; + + if (tp->NotWrRamCodeToMicroP == TRUE) + return; + + if (rtl8126_check_hw_phy_mcu_code_ver(dev)) + return; + + if (HW_SUPPORT_CHECK_PHY_DISABLE_MODE(tp) && rtl8126_is_in_phy_disable_mode(dev)) + require_disable_phy_disable_mode = TRUE; + + if (require_disable_phy_disable_mode) + rtl8126_disable_phy_disable_mode(dev); + + switch (tp->mcfg) { + case CFG_METHOD_1: + rtl8126_set_phy_mcu_8126a_1(dev); + break; + case CFG_METHOD_2: + rtl8126_set_phy_mcu_8126a_2(dev); + break; + case CFG_METHOD_3: + rtl8126_set_phy_mcu_8126a_3(dev); + break; + } + + if (require_disable_phy_disable_mode) + rtl8126_enable_phy_disable_mode(dev); + + rtl8126_write_hw_phy_mcu_code_ver(dev); + + rtl8126_mdio_write(tp,0x1F, 0x0000); + + tp->HwHasWrRamCodeToMicroP = TRUE; +} +#endif + +static void +rtl8126_enable_phy_aldps(struct rtl8126_private *tp) +{ + //enable aldps + //GPHY OCP 0xA430 bit[2] = 0x1 (en_aldps) + rtl8126_set_eth_phy_ocp_bit(tp, 0xA430, BIT_2); +} + +static void +rtl8126_hw_phy_config_8126a_1(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + rtl8126_set_eth_phy_ocp_bit(tp, 0xA442, BIT_11); + + + if (aspm) { + if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) { + rtl8126_enable_phy_aldps(tp); + } + } +} + +static void +rtl8126_hw_phy_config_8126a_2(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + rtl8126_set_eth_phy_ocp_bit(tp, 0xA442, BIT_11); + + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x80BF); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xA438, + 0xFF00, + 0xED00); + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x80CD); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xA438, + 0xFF00, + 0x1000); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x80D1); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xA438, + 0xFF00, + 0xC800); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x80D4); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xA438, + 0xFF00, + 0xC800); + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x80E1); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x10CC); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x80E5); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x4F0C); + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x8387); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xA438, + 0xFF00, + 0x4700); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xA80C, + BIT_7 | BIT_6, + BIT_7); + + + rtl8126_clear_eth_phy_ocp_bit(tp, 0xAC90, BIT_4); + rtl8126_clear_eth_phy_ocp_bit(tp, 0xAD2C, BIT_15); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8321); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x1100); + rtl8126_set_eth_phy_ocp_bit(tp, 0xACF8, (BIT_3 | BIT_2)); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x8183); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xA438, + 0xFF00, + 0x5900); + rtl8126_set_eth_phy_ocp_bit(tp, 0xAD94, BIT_5); + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA654, BIT_11); + rtl8126_set_eth_phy_ocp_bit(tp, 0xB648, BIT_14); + + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x839E); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x2F00); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x83F2); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0800); + rtl8126_set_eth_phy_ocp_bit(tp, 0xADA0, BIT_1); + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80F3); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x9900); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8126); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0xC100); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x893A); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x8080); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8647); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0xE600); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x862C); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x1200); + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x864A); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0xE600); + + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80A0); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0xBCBC); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x805E); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0xBCBC); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8056); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x3077); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8058); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x5A00); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8098); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x3077); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x809A); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x5A00); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8052); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x3733); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8094); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x3733); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x807F); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x7C75); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x803D); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x7C75); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8036); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x3000); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8078); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x3000); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8031); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x3300); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8073); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x3300); + + + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xAE06, + 0xFC00, + 0x7C00); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x89D1); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0004); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x8FBD); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xA438, + 0xFF00, + 0x0A00); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x8FBE); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x0D09); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x89CD); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0F0F); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x89CF); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0F0F); + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x83A4); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x6600); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x83A6); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x6601); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x83C0); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x6600); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x83C2); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x6601); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8414); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x6600); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8416); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x6601); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x83F8); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x6600); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x83FA); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x6601); + + + rtl8126_set_phy_mcu_patch_request(tp); + + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xBD96, + 0x1F00, + 0x1000); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xBF1C, + 0x0007, + 0x0007); + rtl8126_clear_eth_phy_ocp_bit(tp, 0xBFBE, BIT_15); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xBF40, + 0x0380, + 0x0280); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xBF90, + BIT_7, + (BIT_6 | BIT_5)); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xBF90, + BIT_4, + BIT_3 | BIT_2); + + rtl8126_clear_phy_mcu_patch_request(tp); + + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x843B); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xA438, + 0xFF00, + 0x2000); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x843D); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xA438, + 0xFF00, + 0x2000); + + + rtl8126_clear_eth_phy_ocp_bit(tp, 0xB516, 0x7F); + + + rtl8126_clear_eth_phy_ocp_bit(tp, 0xBF80, (BIT_5 | BIT_4)); + + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x8188); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x0044); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x00A8); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x00D6); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x00EC); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x00F6); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x00FC); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x00FE); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x00FE); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x00BC); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x0058); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x002A); + + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8015); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0800); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FFD); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0000); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FFF); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x7F00); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FFB); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0100); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FE9); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0002); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FEF); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x00A5); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FF1); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0106); + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FE1); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0102); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FE3); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0400); + + + rtl8126_set_eth_phy_ocp_bit(tp, 0xA654, BIT_11); + rtl8126_clear_eth_phy_ocp_bit(tp, 0XA65A, (BIT_1 | BIT_0)); + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xAC3A, 0x5851); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0XAC3C, + BIT_15 | BIT_14 | BIT_12, + BIT_13); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xAC42, + BIT_9, + BIT_8 | BIT_7 | BIT_6); + rtl8126_clear_eth_phy_ocp_bit(tp, 0xAC3E, BIT_15 | BIT_14 | BIT_13); + rtl8126_clear_eth_phy_ocp_bit(tp, 0xAC42, BIT_5 | BIT_4 | BIT_3); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xAC42, + BIT_1, + BIT_2 | BIT_0); + + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xAC1A, 0x00DB); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xADE4, 0x01B5); + rtl8126_clear_eth_phy_ocp_bit(tp, 0xAD9C, BIT_11 | BIT_10); + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x814B); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x1100); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x814D); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x1100); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x814F); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0B00); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8142); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0100); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8144); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0100); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8150); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0100); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8118); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0700); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x811A); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0700); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x811C); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0500); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x810F); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0100); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8111); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0100); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x811D); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0100); + + rtl8126_set_eth_phy_ocp_bit(tp, 0xAC36, BIT_12); + rtl8126_clear_eth_phy_ocp_bit(tp, 0xAD1C, BIT_8); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xADE8, + 0xFFC0, + 0x1400); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x864B); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x9D00); + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x8F97); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x003F); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x3F02); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x023C); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x3B0A); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x1C00); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + + + rtl8126_set_eth_phy_ocp_bit(tp, 0xAD9C, BIT_5); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8122); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0C00); + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x82C8); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03ED); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03FF); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0009); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03FE); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x000B); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0021); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03F7); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03B8); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03E0); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0049); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0049); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03E0); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03B8); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03F7); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0021); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x000B); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03FE); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0009); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03FF); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03ED); + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80EF); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0C00); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x82A0); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x000E); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03FE); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03ED); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0006); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x001A); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03F1); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03D8); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0023); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0054); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0322); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x00DD); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03AB); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03DC); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0027); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x000E); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03E5); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03F9); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0012); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0001); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03F1); + + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x8018); + rtl8126_set_eth_phy_ocp_bit(tp, 0xA438, BIT_13); + + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FE4); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0000); + + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB54C, + 0xFFC0, + 0x3700); + + + if (aspm) { + if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) { + rtl8126_enable_phy_aldps(tp); + } + } +} + +static void +rtl8126_hw_phy_config_8126a_3(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + rtl8126_set_eth_phy_ocp_bit(tp, 0xA442, BIT_11); + + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x8183); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xA438, + 0xFF00, + 0x5900); + rtl8126_set_eth_phy_ocp_bit(tp, 0xA654, BIT_11); + rtl8126_set_eth_phy_ocp_bit(tp, 0xB648, BIT_14); + rtl8126_set_eth_phy_ocp_bit(tp, 0xAD2C, BIT_15); + rtl8126_set_eth_phy_ocp_bit(tp, 0xAD94, BIT_5); + rtl8126_set_eth_phy_ocp_bit(tp, 0xADA0, BIT_1); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xAE06, + BIT_15 | BIT_14 | BIT_13 | BIT_12 | BIT_11 | BIT_10, + BIT_14 | BIT_13 | BIT_12 | BIT_11 | BIT_10); + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8647); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0xE600); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8036); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x3000); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8078); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x3000); + + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x89E9); + rtl8126_set_eth_phy_ocp_bit(tp, 0xB87E, 0xFF00); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FFD); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0100); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FFE); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0200); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8FFF); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0400); + + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x8018); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xA438, + 0xFF00, + 0x7700); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x8F9C); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x0005); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x00ED); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x0502); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x0B00); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0xD401); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x8FA8); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xA438, + 0xFF00, + 0x2900); + + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x814B); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x1100); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x814D); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x1100); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x814F); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0B00); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8142); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0100); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8144); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0100); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8150); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0100); + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8118); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0700); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x811A); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0700); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x811C); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0500); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x810F); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0100); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8111); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0100); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x811D); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0100); + + + rtl8126_set_eth_phy_ocp_bit(tp, 0xAD1C, BIT_8); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xADE8, + BIT_15 | BIT_14 | BIT_13 | BIT_12 | BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6, + BIT_12 | BIT_10); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x864B); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x9D00); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x862C); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x1200); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA436, 0x8566); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x003F); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x3F02); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x023C); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x3B0A); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x1C00); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xA438, 0x0000); + + + rtl8126_set_eth_phy_ocp_bit(tp, 0xAD9C, BIT_5); + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x8122); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0C00); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x82C8); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03ED); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03FF); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0009); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03FE); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x000B); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0021); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03F7); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03B8); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03E0); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0049); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0049); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03E0); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03B8); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03F7); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0021); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x000B); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03FE); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0009); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03FF); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03ED); + + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x80EF); + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB87E, + 0xFF00, + 0x0C00); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87C, 0x82A0); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x000E); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03FE); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03ED); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0006); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x001A); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03F1); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03D8); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0023); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0054); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0322); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x00DD); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03AB); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03DC); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0027); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x000E); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03E5); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03F9); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0012); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x0001); + rtl8126_mdio_direct_write_phy_ocp(tp, 0xB87E, 0x03F1); + + + rtl8126_set_eth_phy_ocp_bit(tp, 0xA430, BIT_1 | BIT_0); + + + rtl8126_clear_and_set_eth_phy_ocp_bit(tp, + 0xB54C, + 0xFFC0, + 0x3700); + + + if (aspm) { + if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) { + rtl8126_enable_phy_aldps(tp); + } + } +} + +static void +rtl8126_hw_phy_config(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + if (tp->resume_not_chg_speed) + return; + + tp->phy_reset_enable(dev); + + if (HW_DASH_SUPPORT_TYPE_3(tp) && tp->HwPkgDet == 0x06) + return; + +#ifndef ENABLE_USE_FIRMWARE_FILE + if (!tp->rtl_fw) + rtl8126_init_hw_phy_mcu(dev); +#endif + + switch (tp->mcfg) { + case CFG_METHOD_1: + rtl8126_hw_phy_config_8126a_1(dev); + break; + case CFG_METHOD_2: + rtl8126_hw_phy_config_8126a_2(dev); + break; + case CFG_METHOD_3: + rtl8126_hw_phy_config_8126a_3(dev); + break; + } + + //legacy force mode(Chap 22) + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + default: + rtl8126_clear_eth_phy_ocp_bit(tp, 0xA5B4, BIT_15); + break; + } + + rtl8126_mdio_write(tp, 0x1F, 0x0000); + + if (HW_HAS_WRITE_PHY_MCU_RAM_CODE(tp)) { + if (tp->eee.eee_enabled) + rtl8126_enable_eee(tp); + else + rtl8126_disable_eee(tp); + } +} + +static void +rtl8126_up(struct net_device *dev) +{ + rtl8126_hw_init(dev); + rtl8126_hw_reset(dev); + rtl8126_powerup_pll(dev); + rtl8126_hw_ephy_config(dev); + rtl8126_hw_phy_config(dev); + rtl8126_hw_config(dev); +} + +/* +static inline void rtl8126_delete_esd_timer(struct net_device *dev, struct timer_list *timer) +{ + del_timer_sync(timer); +} + +static inline void rtl8126_request_esd_timer(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + struct timer_list *timer = &tp->esd_timer; +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0) + setup_timer(timer, rtl8126_esd_timer, (unsigned long)dev); +#else + timer_setup(timer, rtl8126_esd_timer, 0); +#endif + mod_timer(timer, jiffies + RTL8126_ESD_TIMEOUT); +} +*/ + +/* +static inline void rtl8126_delete_link_timer(struct net_device *dev, struct timer_list *timer) +{ + del_timer_sync(timer); +} + +static inline void rtl8126_request_link_timer(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + struct timer_list *timer = &tp->link_timer; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0) + setup_timer(timer, rtl8126_link_timer, (unsigned long)dev); +#else + timer_setup(timer, rtl8126_link_timer, 0); +#endif + mod_timer(timer, jiffies + RTL8126_LINK_TIMEOUT); +} +*/ + +#ifdef CONFIG_NET_POLL_CONTROLLER +/* + * Polling 'interrupt' - used by things like netconsole to send skbs + * without having to re-enable interrupts. It's not called while + * the interrupt routine is executing. + */ +static void +rtl8126_netpoll(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int i; + for (i = 0; i < tp->irq_nvecs; i++) { + struct r8126_irq *irq = &tp->irq_tbl[i]; + struct r8126_napi *r8126napi = &tp->r8126napi[i]; + + disable_irq(irq->vector); + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,12,0) + irq->handler(irq->vector, r8126napi); +#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) + irq->handler(irq->vector, r8126napi, NULL); +#else + irq->handler(irq->vector, r8126napi); +#endif + + enable_irq(irq->vector); + } +} +#endif //CONFIG_NET_POLL_CONTROLLER + +static void +rtl8126_setup_interrupt_mask(struct rtl8126_private *tp) +{ + int i; + + if (tp->HwCurrIsrVer == 5) { + tp->intr_mask = ISRIMR_V5_LINKCHG | ISRIMR_V5_TOK_Q0; + if (tp->num_tx_rings > 1) + tp->intr_mask |= ISRIMR_V5_TOK_Q1; + for (i = 0; i < tp->num_rx_rings; i++) + tp->intr_mask |= ISRIMR_V5_ROK_Q0 << i; + } else if (tp->HwCurrIsrVer == 4) { + tp->intr_mask = ISRIMR_V4_LINKCHG; + for (i = 0; i < tp->num_rx_rings; i++) + tp->intr_mask |= ISRIMR_V4_ROK_Q0 << i; + } else if (tp->HwCurrIsrVer == 3) { + tp->intr_mask = ISRIMR_V2_LINKCHG; + for (i = 0; i < max(tp->num_tx_rings, tp->num_rx_rings); i++) + tp->intr_mask |= ISRIMR_V2_ROK_Q0 << i; + } else if (tp->HwCurrIsrVer == 2) { + tp->intr_mask = ISRIMR_V2_LINKCHG | ISRIMR_TOK_Q0; + if (tp->num_tx_rings > 1) + tp->intr_mask |= ISRIMR_TOK_Q1; + + for (i = 0; i < tp->num_rx_rings; i++) + tp->intr_mask |= ISRIMR_V2_ROK_Q0 << i; + } else { + tp->intr_mask = LinkChg | RxDescUnavail | TxOK | RxOK | SWInt; + tp->timer_intr_mask = LinkChg | PCSTimeout; + +#ifdef ENABLE_DASH_SUPPORT + if (tp->DASH) { + if (HW_DASH_SUPPORT_TYPE_3(tp)) { + tp->timer_intr_mask |= (ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET); + tp->intr_mask |= (ISRIMR_DASH_INTR_EN | ISRIMR_DASH_INTR_CMAC_RESET); + } + } +#endif + } +} + +static void +rtl8126_setup_mqs_reg(struct rtl8126_private *tp) +{ + u16 hw_clo_ptr0_reg, sw_tail_ptr0_reg; + u16 reg_len; + int i; + + //tx + tp->tx_ring[0].tdsar_reg = TxDescStartAddrLow; + for (i = 1; i < R8126_MAX_TX_QUEUES; i++) { + tp->tx_ring[i].tdsar_reg = (u16)(TNPDS_Q1_LOW_8125 + (i - 1) * 8); + } + + switch (tp->HwSuppTxNoCloseVer) { + case 4: + case 5: + hw_clo_ptr0_reg = HW_CLO_PTR0_8126; + sw_tail_ptr0_reg = SW_TAIL_PTR0_8126; + reg_len = 4; + break; + case 6: + hw_clo_ptr0_reg = HW_CLO_PTR0_8125BP; + sw_tail_ptr0_reg = SW_TAIL_PTR0_8125BP; + reg_len = 8; + break; + default: + hw_clo_ptr0_reg = HW_CLO_PTR0_8125; + sw_tail_ptr0_reg = SW_TAIL_PTR0_8125; + reg_len = 4; + break; + } + + for (i = 0; i < R8126_MAX_TX_QUEUES; i++) { + tp->tx_ring[i].hw_clo_ptr_reg = (u16)(hw_clo_ptr0_reg + i * reg_len); + tp->tx_ring[i].sw_tail_ptr_reg = (u16)(sw_tail_ptr0_reg + i * reg_len); + } + + //rx + tp->rx_ring[0].rdsar_reg = RxDescAddrLow; + for (i = 1; i < R8126_MAX_RX_QUEUES; i++) { + tp->rx_ring[i].rdsar_reg = (u16)(RDSAR_Q1_LOW_8125 + (i - 1) * 8); + } + + tp->isr_reg[0] = ISR0_8125; + for (i = 1; i < R8126_MAX_QUEUES; i++) { + tp->isr_reg[i] = (u16)(ISR1_8125 + (i - 1) * 4); + } + + tp->imr_reg[0] = IMR0_8125; + for (i = 1; i < R8126_MAX_QUEUES; i++) { + tp->imr_reg[i] = (u16)(IMR1_8125 + (i - 1) * 4); + } +} + +static void +rtl8126_init_software_variable(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + struct pci_dev *pdev = tp->pci_dev; + +#ifdef ENABLE_LIB_SUPPORT + tp->ring_lib_enabled = 1; +#endif + + switch (tp->mcfg) { + default: + tp->HwSuppDashVer = 0; + break; + } + tp->AllowAccessDashOcp = rtl8126_is_allow_access_dash_ocp(tp); + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->HwPkgDet = rtl8126_mac_ocp_read(tp, 0xDC00); + tp->HwPkgDet = (tp->HwPkgDet >> 3) & 0x07; + break; + } + + if (HW_DASH_SUPPORT_TYPE_3(tp) && tp->HwPkgDet == 0x06) + eee_enable = 0; + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->HwSuppNowIsOobVer = 1; + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->HwPcieSNOffset = 0x174; + break; + } + +#ifdef ENABLE_REALWOW_SUPPORT + rtl8126_get_realwow_hw_version(dev); +#endif //ENABLE_REALWOW_SUPPORT + + if (HW_DASH_SUPPORT_DASH(tp) && rtl8126_check_dash(tp)) + tp->DASH = 1; + else + tp->DASH = 0; + + if (tp->DASH) { + if (HW_DASH_SUPPORT_TYPE_3(tp)) { + u64 CmacMemPhysAddress; + void __iomem *cmac_ioaddr = NULL; + + //map CMAC IO space + CmacMemPhysAddress = rtl8126_csi_other_fun_read(tp, 0, 0x18); + if (!(CmacMemPhysAddress & BIT_0)) { + if (CmacMemPhysAddress & BIT_2) + CmacMemPhysAddress |= (u64)rtl8126_csi_other_fun_read(tp, 0, 0x1C) << 32; + + CmacMemPhysAddress &= 0xFFFFFFF0; + /* ioremap MMIO region */ + cmac_ioaddr = ioremap(CmacMemPhysAddress, R8126_REGS_SIZE); + } + + if (cmac_ioaddr == NULL) { +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + if (netif_msg_probe(tp)) + dev_err(&pdev->dev, "cannot remap CMAC MMIO, aborting\n"); +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + } + + if (cmac_ioaddr == NULL) { + tp->DASH = 0; + } else { + tp->mapped_cmac_ioaddr = cmac_ioaddr; + } + } + + eee_enable = 0; + } + + if (HW_DASH_SUPPORT_TYPE_3(tp)) + tp->cmac_ioaddr = tp->mapped_cmac_ioaddr; + + if (aspm) { + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->org_pci_offset_99 = rtl8126_csi_fun0_read_byte(tp, 0x99); + tp->org_pci_offset_99 &= ~(BIT_5|BIT_6); + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->org_pci_offset_180 = rtl8126_csi_fun0_read_byte(tp, 0x22c); + break; + } + } + + pci_read_config_byte(pdev, 0x80, &tp->org_pci_offset_80); + pci_read_config_byte(pdev, 0x81, &tp->org_pci_offset_81); + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + default: + tp->use_timer_interrupt = TRUE; + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + default: + tp->HwSuppMaxPhyLinkSpeed = 5000; + break; + } + + if (timer_count == 0 || tp->mcfg == CFG_METHOD_DEFAULT) + tp->use_timer_interrupt = FALSE; + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->ShortPacketSwChecksum = TRUE; + tp->UseSwPaddingShortPkt = TRUE; + break; + default: + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->HwSuppMagicPktVer = WAKEUP_MAGIC_PACKET_V3; + break; + default: + tp->HwSuppMagicPktVer = WAKEUP_MAGIC_PACKET_NOT_SUPPORT; + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->HwSuppLinkChgWakeUpVer = 3; + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->HwSuppD0SpeedUpVer = 1; + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->HwSuppCheckPhyDisableModeVer = 3; + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + tp->HwSuppTxNoCloseVer = 4; + break; + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->HwSuppTxNoCloseVer = 5; + break; + } + + switch (tp->HwSuppTxNoCloseVer) { + case 5: + case 6: + tp->MaxTxDescPtrMask = MAX_TX_NO_CLOSE_DESC_PTR_MASK_V4; + break; + case 4: + tp->MaxTxDescPtrMask = MAX_TX_NO_CLOSE_DESC_PTR_MASK_V3; + break; + case 3: + tp->MaxTxDescPtrMask = MAX_TX_NO_CLOSE_DESC_PTR_MASK_V2; + break; + default: + tx_no_close_enable = 0; + break; + } + + if (tp->HwSuppTxNoCloseVer > 0 && tx_no_close_enable == 1) + tp->EnableTxNoClose = TRUE; + + switch (tp->mcfg) { + case CFG_METHOD_1: + tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_1; + break; + case CFG_METHOD_2: + tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_2; + break; + case CFG_METHOD_3: + tp->sw_ram_code_ver = NIC_RAMCODE_VERSION_CFG_METHOD_3; + break; + } + + if (tp->HwIcVerUnknown) { + tp->NotWrRamCodeToMicroP = TRUE; + tp->NotWrMcuPatchCode = TRUE; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->HwSuppMacMcuVer = 2; + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->MacMcuPageSize = RTL8126_MAC_MCU_PAGE_SIZE; + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->HwSuppNumTxQueues = 2; + tp->HwSuppNumRxQueues = 4; + break; + default: + tp->HwSuppNumTxQueues = 1; + tp->HwSuppNumRxQueues = 1; + break; + } + +#ifdef ENABLE_PTP_SUPPORT + if (tp->HwSuppPtpVer > 0) + tp->EnablePtp = 1; +#endif + + //init interrupt + switch (tp->mcfg) { + case CFG_METHOD_1: + tp->HwSuppIsrVer = 2; + break; + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->HwSuppIsrVer = 3; + break; + default: + tp->HwSuppIsrVer = 1; + break; + } + + tp->HwCurrIsrVer = tp->HwSuppIsrVer; + if (tp->HwCurrIsrVer > 1) { + if (!(tp->features & RTL_FEATURE_MSIX) || + tp->irq_nvecs < tp->min_irq_nvecs) + tp->HwCurrIsrVer = 1; + } + + tp->num_tx_rings = 1; +#ifdef ENABLE_MULTIPLE_TX_QUEUE +#ifndef ENABLE_LIB_SUPPORT + tp->num_tx_rings = tp->HwSuppNumTxQueues; +#endif +#endif + if (tp->HwCurrIsrVer < 2 || + (tp->HwCurrIsrVer == 2 && tp->irq_nvecs < 19)) + tp->num_tx_rings = 1; + + //RSS + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->HwSuppRssVer = 5; + tp->HwSuppIndirTblEntries = 128; + break; + } + + tp->num_rx_rings = 1; +#ifdef ENABLE_RSS_SUPPORT +#ifdef ENABLE_LIB_SUPPORT + if (tp->HwSuppRssVer > 0) + tp->EnableRss = 1; +#else + if (tp->HwSuppRssVer > 0 && tp->HwCurrIsrVer > 1) { + u8 rss_queue_num = netif_get_num_default_rss_queues(); + tp->num_rx_rings = (tp->HwSuppNumRxQueues > rss_queue_num)? + rss_queue_num : tp->HwSuppNumRxQueues; + + if (!(tp->num_rx_rings >= 2 && tp->irq_nvecs >= tp->num_rx_rings)) + tp->num_rx_rings = 1; + + if (tp->num_rx_rings >= 2) + tp->EnableRss = 1; + } +#endif +#endif + + //interrupt mask + rtl8126_setup_interrupt_mask(tp); + + rtl8126_setup_mqs_reg(tp); + + rtl8126_set_ring_size(tp, NUM_RX_DESC, NUM_TX_DESC); + + switch (tp->mcfg) { + case CFG_METHOD_1: + tp->HwSuppIntMitiVer = 4; + break; + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->HwSuppIntMitiVer = 5; + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->HwSuppTcamVer = 2; + + tp->TcamNotValidReg = TCAM_NOTVALID_ADDR_V2; + tp->TcamValidReg = TCAM_VALID_ADDR_V2; + tp->TcamMaAddrcOffset = TCAM_MAC_ADDR_V2; + tp->TcamVlanTagOffset = TCAM_VLAN_TAG_V2; + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->HwSuppExtendTallyCounterVer = 1; + break; + } + + timer_count_v2 = (timer_count / 0x100); + + tp->InitRxDescType = RX_DESC_RING_TYPE_1; + if (tp->EnableRss || tp->EnablePtp) + tp->InitRxDescType = RX_DESC_RING_TYPE_3; + + tp->RxDescLength = RX_DESC_LEN_TYPE_1; + if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) + tp->RxDescLength = RX_DESC_LEN_TYPE_3; + + tp->rtl8126_rx_config = rtl_chip_info[tp->chipset].RCR_Cfg; + if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) + tp->rtl8126_rx_config |= EnableRxDescV3; + + tp->NicCustLedValue = RTL_R16(tp, CustomLED); + + tp->wol_opts = rtl8126_get_hw_wol(tp); + tp->wol_enabled = (tp->wol_opts) ? WOL_ENABLED : WOL_DISABLED; + + rtl8126_set_link_option(tp, autoneg_mode, speed_mode, duplex_mode, + rtl8126_fc_full); + + tp->max_jumbo_frame_size = rtl_chip_info[tp->chipset].jumbo_frame_sz; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0) + /* MTU range: 60 - hw-specific max */ + dev->min_mtu = ETH_MIN_MTU; + dev->max_mtu = tp->max_jumbo_frame_size; +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0) + + if (tp->mcfg != CFG_METHOD_DEFAULT) { + struct ethtool_eee *eee = &tp->eee; + + eee->eee_enabled = eee_enable; + eee->supported = SUPPORTED_100baseT_Full | + SUPPORTED_1000baseT_Full; + eee->advertised = mmd_eee_adv_to_ethtool_adv_t(MDIO_EEE_1000T | MDIO_EEE_100TX); + switch (tp->mcfg) { + default: + if (HW_SUPP_PHY_LINK_SPEED_2500M(tp)) { + eee->supported |= SUPPORTED_2500baseX_Full; + eee->advertised |= SUPPORTED_2500baseX_Full; + } + break; + } + eee->tx_lpi_enabled = eee_enable; + eee->tx_lpi_timer = dev->mtu + ETH_HLEN + 0x20; + } + + tp->ptp_master_mode = enable_ptp_master_mode; + +#ifdef ENABLE_RSS_SUPPORT + if (tp->EnableRss) + rtl8126_init_rss(tp); +#endif +} + +static void +rtl8126_release_board(struct pci_dev *pdev, + struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + void __iomem *ioaddr = tp->mmio_addr; + + rtl8126_rar_set(tp, tp->org_mac_addr); + tp->wol_enabled = WOL_DISABLED; + + if (!tp->DASH) + rtl8126_phy_power_down(dev); + +#ifdef ENABLE_DASH_SUPPORT + if (tp->DASH) + FreeAllocatedDashShareMemory(dev); +#endif + + if (tp->mapped_cmac_ioaddr != NULL) + iounmap(tp->mapped_cmac_ioaddr); + + iounmap(ioaddr); + pci_release_regions(pdev); + pci_clear_mwi(pdev); + pci_disable_device(pdev); + free_netdev(dev); +} + +static void +rtl8126_hw_address_set(struct net_device *dev, u8 mac_addr[MAC_ADDR_LEN]) +{ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) + eth_hw_addr_set(dev, mac_addr); +#else + memcpy(dev->dev_addr, mac_addr, MAC_ADDR_LEN); +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,17,0) +} + +static int +rtl8126_get_mac_address(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int i; + u8 mac_addr[MAC_ADDR_LEN]; + + for (i = 0; i < MAC_ADDR_LEN; i++) + mac_addr[i] = RTL_R8(tp, MAC0 + i); + + switch (tp->mcfg) { + case CFG_METHOD_1 ... CFG_METHOD_3: + *(u32*)&mac_addr[0] = RTL_R32(tp, BACKUP_ADDR0_8125); + *(u16*)&mac_addr[4] = RTL_R16(tp, BACKUP_ADDR1_8125); + break; + default: + break; + }; + + if (!is_valid_ether_addr(mac_addr)) { + netif_err(tp, probe, dev, "Invalid ether addr %pM\n", + mac_addr); + eth_random_addr(mac_addr); + dev->addr_assign_type = NET_ADDR_RANDOM; + netif_info(tp, probe, dev, "Random ether addr %pM\n", + mac_addr); + tp->random_mac = 1; + } + + rtl8126_hw_address_set(dev, mac_addr); + rtl8126_rar_set(tp, mac_addr); + + /* keep the original MAC address */ + memcpy(tp->org_mac_addr, dev->dev_addr, MAC_ADDR_LEN); +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13) + memcpy(dev->perm_addr, dev->dev_addr, MAC_ADDR_LEN); +#endif + return 0; +} + +/** + * rtl8126_set_mac_address - Change the Ethernet Address of the NIC + * @dev: network interface device structure + * @p: pointer to an address structure + * + * Return 0 on success, negative on failure + **/ +static int +rtl8126_set_mac_address(struct net_device *dev, + void *p) +{ + struct rtl8126_private *tp = netdev_priv(dev); + struct sockaddr *addr = p; + + if (!is_valid_ether_addr(addr->sa_data)) + return -EADDRNOTAVAIL; + + rtl8126_hw_address_set(dev, addr->sa_data); + + rtl8126_rar_set(tp, dev->dev_addr); + + return 0; +} + +/****************************************************************************** + * rtl8126_rar_set - Puts an ethernet address into a receive address register. + * + * tp - The private data structure for driver + * addr - Address to put into receive address register + *****************************************************************************/ +void +rtl8126_rar_set(struct rtl8126_private *tp, + const u8 *addr) +{ + uint32_t rar_low = 0; + uint32_t rar_high = 0; + + rar_low = ((uint32_t) addr[0] | + ((uint32_t) addr[1] << 8) | + ((uint32_t) addr[2] << 16) | + ((uint32_t) addr[3] << 24)); + + rar_high = ((uint32_t) addr[4] | + ((uint32_t) addr[5] << 8)); + + rtl8126_enable_cfg9346_write(tp); + RTL_W32(tp, MAC0, rar_low); + RTL_W32(tp, MAC4, rar_high); + + rtl8126_disable_cfg9346_write(tp); +} + +#ifdef ETHTOOL_OPS_COMPAT +static int ethtool_get_settings(struct net_device *dev, void *useraddr) +{ + struct ethtool_cmd cmd = { ETHTOOL_GSET }; + int err; + + if (!ethtool_ops->get_settings) + return -EOPNOTSUPP; + + err = ethtool_ops->get_settings(dev, &cmd); + if (err < 0) + return err; + + if (copy_to_user(useraddr, &cmd, sizeof(cmd))) + return -EFAULT; + return 0; +} + +static int ethtool_set_settings(struct net_device *dev, void *useraddr) +{ + struct ethtool_cmd cmd; + + if (!ethtool_ops->set_settings) + return -EOPNOTSUPP; + + if (copy_from_user(&cmd, useraddr, sizeof(cmd))) + return -EFAULT; + + return ethtool_ops->set_settings(dev, &cmd); +} + +static int ethtool_get_drvinfo(struct net_device *dev, void *useraddr) +{ + struct ethtool_drvinfo info; + struct ethtool_ops *ops = ethtool_ops; + + if (!ops->get_drvinfo) + return -EOPNOTSUPP; + + memset(&info, 0, sizeof(info)); + info.cmd = ETHTOOL_GDRVINFO; + ops->get_drvinfo(dev, &info); + + if (ops->self_test_count) + info.testinfo_len = ops->self_test_count(dev); + if (ops->get_stats_count) + info.n_stats = ops->get_stats_count(dev); + if (ops->get_regs_len) + info.regdump_len = ops->get_regs_len(dev); + if (ops->get_eeprom_len) + info.eedump_len = ops->get_eeprom_len(dev); + + if (copy_to_user(useraddr, &info, sizeof(info))) + return -EFAULT; + return 0; +} + +static int ethtool_get_regs(struct net_device *dev, char *useraddr) +{ + struct ethtool_regs regs; + struct ethtool_ops *ops = ethtool_ops; + void *regbuf; + int reglen, ret; + + if (!ops->get_regs || !ops->get_regs_len) + return -EOPNOTSUPP; + + if (copy_from_user(®s, useraddr, sizeof(regs))) + return -EFAULT; + + reglen = ops->get_regs_len(dev); + if (regs.len > reglen) + regs.len = reglen; + + regbuf = kmalloc(reglen, GFP_USER); + if (!regbuf) + return -ENOMEM; + + ops->get_regs(dev, ®s, regbuf); + + ret = -EFAULT; + if (copy_to_user(useraddr, ®s, sizeof(regs))) + goto out; + useraddr += offsetof(struct ethtool_regs, data); + if (copy_to_user(useraddr, regbuf, reglen)) + goto out; + ret = 0; + +out: + kfree(regbuf); + return ret; +} + +static int ethtool_get_wol(struct net_device *dev, char *useraddr) +{ + struct ethtool_wolinfo wol = { ETHTOOL_GWOL }; + + if (!ethtool_ops->get_wol) + return -EOPNOTSUPP; + + ethtool_ops->get_wol(dev, &wol); + + if (copy_to_user(useraddr, &wol, sizeof(wol))) + return -EFAULT; + return 0; +} + +static int ethtool_set_wol(struct net_device *dev, char *useraddr) +{ + struct ethtool_wolinfo wol; + + if (!ethtool_ops->set_wol) + return -EOPNOTSUPP; + + if (copy_from_user(&wol, useraddr, sizeof(wol))) + return -EFAULT; + + return ethtool_ops->set_wol(dev, &wol); +} + +static int ethtool_get_msglevel(struct net_device *dev, char *useraddr) +{ + struct ethtool_value edata = { ETHTOOL_GMSGLVL }; + + if (!ethtool_ops->get_msglevel) + return -EOPNOTSUPP; + + edata.data = ethtool_ops->get_msglevel(dev); + + if (copy_to_user(useraddr, &edata, sizeof(edata))) + return -EFAULT; + return 0; +} + +static int ethtool_set_msglevel(struct net_device *dev, char *useraddr) +{ + struct ethtool_value edata; + + if (!ethtool_ops->set_msglevel) + return -EOPNOTSUPP; + + if (copy_from_user(&edata, useraddr, sizeof(edata))) + return -EFAULT; + + ethtool_ops->set_msglevel(dev, edata.data); + return 0; +} + +static int ethtool_nway_reset(struct net_device *dev) +{ + if (!ethtool_ops->nway_reset) + return -EOPNOTSUPP; + + return ethtool_ops->nway_reset(dev); +} + +static int ethtool_get_link(struct net_device *dev, void *useraddr) +{ + struct ethtool_value edata = { ETHTOOL_GLINK }; + + if (!ethtool_ops->get_link) + return -EOPNOTSUPP; + + edata.data = ethtool_ops->get_link(dev); + + if (copy_to_user(useraddr, &edata, sizeof(edata))) + return -EFAULT; + return 0; +} + +static int ethtool_get_eeprom(struct net_device *dev, void *useraddr) +{ + struct ethtool_eeprom eeprom; + struct ethtool_ops *ops = ethtool_ops; + u8 *data; + int ret; + + if (!ops->get_eeprom || !ops->get_eeprom_len) + return -EOPNOTSUPP; + + if (copy_from_user(&eeprom, useraddr, sizeof(eeprom))) + return -EFAULT; + + /* Check for wrap and zero */ + if (eeprom.offset + eeprom.len <= eeprom.offset) + return -EINVAL; + + /* Check for exceeding total eeprom len */ + if (eeprom.offset + eeprom.len > ops->get_eeprom_len(dev)) + return -EINVAL; + + data = kmalloc(eeprom.len, GFP_USER); + if (!data) + return -ENOMEM; + + ret = -EFAULT; + if (copy_from_user(data, useraddr + sizeof(eeprom), eeprom.len)) + goto out; + + ret = ops->get_eeprom(dev, &eeprom, data); + if (ret) + goto out; + + ret = -EFAULT; + if (copy_to_user(useraddr, &eeprom, sizeof(eeprom))) + goto out; + if (copy_to_user(useraddr + sizeof(eeprom), data, eeprom.len)) + goto out; + ret = 0; + +out: + kfree(data); + return ret; +} + +static int ethtool_set_eeprom(struct net_device *dev, void *useraddr) +{ + struct ethtool_eeprom eeprom; + struct ethtool_ops *ops = ethtool_ops; + u8 *data; + int ret; + + if (!ops->set_eeprom || !ops->get_eeprom_len) + return -EOPNOTSUPP; + + if (copy_from_user(&eeprom, useraddr, sizeof(eeprom))) + return -EFAULT; + + /* Check for wrap and zero */ + if (eeprom.offset + eeprom.len <= eeprom.offset) + return -EINVAL; + + /* Check for exceeding total eeprom len */ + if (eeprom.offset + eeprom.len > ops->get_eeprom_len(dev)) + return -EINVAL; + + data = kmalloc(eeprom.len, GFP_USER); + if (!data) + return -ENOMEM; + + ret = -EFAULT; + if (copy_from_user(data, useraddr + sizeof(eeprom), eeprom.len)) + goto out; + + ret = ops->set_eeprom(dev, &eeprom, data); + if (ret) + goto out; + + if (copy_to_user(useraddr + sizeof(eeprom), data, eeprom.len)) + ret = -EFAULT; + +out: + kfree(data); + return ret; +} + +static int ethtool_get_coalesce(struct net_device *dev, void *useraddr) +{ + struct ethtool_coalesce coalesce = { ETHTOOL_GCOALESCE }; + + if (!ethtool_ops->get_coalesce) + return -EOPNOTSUPP; + + ethtool_ops->get_coalesce(dev, &coalesce); + + if (copy_to_user(useraddr, &coalesce, sizeof(coalesce))) + return -EFAULT; + return 0; +} + +static int ethtool_set_coalesce(struct net_device *dev, void *useraddr) +{ + struct ethtool_coalesce coalesce; + + if (!ethtool_ops->get_coalesce) + return -EOPNOTSUPP; + + if (copy_from_user(&coalesce, useraddr, sizeof(coalesce))) + return -EFAULT; + + return ethtool_ops->set_coalesce(dev, &coalesce); +} + +static int ethtool_get_ringparam(struct net_device *dev, void *useraddr) +{ + struct ethtool_ringparam ringparam = { ETHTOOL_GRINGPARAM }; + + if (!ethtool_ops->get_ringparam) + return -EOPNOTSUPP; + + ethtool_ops->get_ringparam(dev, &ringparam); + + if (copy_to_user(useraddr, &ringparam, sizeof(ringparam))) + return -EFAULT; + return 0; +} + +static int ethtool_set_ringparam(struct net_device *dev, void *useraddr) +{ + struct ethtool_ringparam ringparam; + + if (!ethtool_ops->get_ringparam) + return -EOPNOTSUPP; + + if (copy_from_user(&ringparam, useraddr, sizeof(ringparam))) + return -EFAULT; + + return ethtool_ops->set_ringparam(dev, &ringparam); +} + +static int ethtool_get_pauseparam(struct net_device *dev, void *useraddr) +{ + struct ethtool_pauseparam pauseparam = { ETHTOOL_GPAUSEPARAM }; + + if (!ethtool_ops->get_pauseparam) + return -EOPNOTSUPP; + + ethtool_ops->get_pauseparam(dev, &pauseparam); + + if (copy_to_user(useraddr, &pauseparam, sizeof(pauseparam))) + return -EFAULT; + return 0; +} + +static int ethtool_set_pauseparam(struct net_device *dev, void *useraddr) +{ + struct ethtool_pauseparam pauseparam; + + if (!ethtool_ops->get_pauseparam) + return -EOPNOTSUPP; + + if (copy_from_user(&pauseparam, useraddr, sizeof(pauseparam))) + return -EFAULT; + + return ethtool_ops->set_pauseparam(dev, &pauseparam); +} + +static int ethtool_get_rx_csum(struct net_device *dev, char *useraddr) +{ + struct ethtool_value edata = { ETHTOOL_GRXCSUM }; + + if (!ethtool_ops->get_rx_csum) + return -EOPNOTSUPP; + + edata.data = ethtool_ops->get_rx_csum(dev); + + if (copy_to_user(useraddr, &edata, sizeof(edata))) + return -EFAULT; + return 0; +} + +static int ethtool_set_rx_csum(struct net_device *dev, char *useraddr) +{ + struct ethtool_value edata; + + if (!ethtool_ops->set_rx_csum) + return -EOPNOTSUPP; + + if (copy_from_user(&edata, useraddr, sizeof(edata))) + return -EFAULT; + + ethtool_ops->set_rx_csum(dev, edata.data); + return 0; +} + +static int ethtool_get_tx_csum(struct net_device *dev, char *useraddr) +{ + struct ethtool_value edata = { ETHTOOL_GTXCSUM }; + + if (!ethtool_ops->get_tx_csum) + return -EOPNOTSUPP; + + edata.data = ethtool_ops->get_tx_csum(dev); + + if (copy_to_user(useraddr, &edata, sizeof(edata))) + return -EFAULT; + return 0; +} + +static int ethtool_set_tx_csum(struct net_device *dev, char *useraddr) +{ + struct ethtool_value edata; + + if (!ethtool_ops->set_tx_csum) + return -EOPNOTSUPP; + + if (copy_from_user(&edata, useraddr, sizeof(edata))) + return -EFAULT; + + return ethtool_ops->set_tx_csum(dev, edata.data); +} + +static int ethtool_get_sg(struct net_device *dev, char *useraddr) +{ + struct ethtool_value edata = { ETHTOOL_GSG }; + + if (!ethtool_ops->get_sg) + return -EOPNOTSUPP; + + edata.data = ethtool_ops->get_sg(dev); + + if (copy_to_user(useraddr, &edata, sizeof(edata))) + return -EFAULT; + return 0; +} + +static int ethtool_set_sg(struct net_device *dev, char *useraddr) +{ + struct ethtool_value edata; + + if (!ethtool_ops->set_sg) + return -EOPNOTSUPP; + + if (copy_from_user(&edata, useraddr, sizeof(edata))) + return -EFAULT; + + return ethtool_ops->set_sg(dev, edata.data); +} + +static int ethtool_get_tso(struct net_device *dev, char *useraddr) +{ + struct ethtool_value edata = { ETHTOOL_GTSO }; + + if (!ethtool_ops->get_tso) + return -EOPNOTSUPP; + + edata.data = ethtool_ops->get_tso(dev); + + if (copy_to_user(useraddr, &edata, sizeof(edata))) + return -EFAULT; + return 0; +} + +static int ethtool_set_tso(struct net_device *dev, char *useraddr) +{ + struct ethtool_value edata; + + if (!ethtool_ops->set_tso) + return -EOPNOTSUPP; + + if (copy_from_user(&edata, useraddr, sizeof(edata))) + return -EFAULT; + + return ethtool_ops->set_tso(dev, edata.data); +} + +static int ethtool_self_test(struct net_device *dev, char *useraddr) +{ + struct ethtool_test test; + struct ethtool_ops *ops = ethtool_ops; + u64 *data; + int ret; + + if (!ops->self_test || !ops->self_test_count) + return -EOPNOTSUPP; + + if (copy_from_user(&test, useraddr, sizeof(test))) + return -EFAULT; + + test.len = ops->self_test_count(dev); + data = kmalloc(test.len * sizeof(u64), GFP_USER); + if (!data) + return -ENOMEM; + + ops->self_test(dev, &test, data); + + ret = -EFAULT; + if (copy_to_user(useraddr, &test, sizeof(test))) + goto out; + useraddr += sizeof(test); + if (copy_to_user(useraddr, data, test.len * sizeof(u64))) + goto out; + ret = 0; + +out: + kfree(data); + return ret; +} + +static int ethtool_get_strings(struct net_device *dev, void *useraddr) +{ + struct ethtool_gstrings gstrings; + struct ethtool_ops *ops = ethtool_ops; + u8 *data; + int ret; + + if (!ops->get_strings) + return -EOPNOTSUPP; + + if (copy_from_user(&gstrings, useraddr, sizeof(gstrings))) + return -EFAULT; + + switch (gstrings.string_set) { + case ETH_SS_TEST: + if (!ops->self_test_count) + return -EOPNOTSUPP; + gstrings.len = ops->self_test_count(dev); + break; + case ETH_SS_STATS: + if (!ops->get_stats_count) + return -EOPNOTSUPP; + gstrings.len = ops->get_stats_count(dev); + break; + default: + return -EINVAL; + } + + data = kmalloc(gstrings.len * ETH_GSTRING_LEN, GFP_USER); + if (!data) + return -ENOMEM; + + ops->get_strings(dev, gstrings.string_set, data); + + ret = -EFAULT; + if (copy_to_user(useraddr, &gstrings, sizeof(gstrings))) + goto out; + useraddr += sizeof(gstrings); + if (copy_to_user(useraddr, data, gstrings.len * ETH_GSTRING_LEN)) + goto out; + ret = 0; + +out: + kfree(data); + return ret; +} + +static int ethtool_phys_id(struct net_device *dev, void *useraddr) +{ + struct ethtool_value id; + + if (!ethtool_ops->phys_id) + return -EOPNOTSUPP; + + if (copy_from_user(&id, useraddr, sizeof(id))) + return -EFAULT; + + return ethtool_ops->phys_id(dev, id.data); +} + +static int ethtool_get_stats(struct net_device *dev, void *useraddr) +{ + struct ethtool_stats stats; + struct ethtool_ops *ops = ethtool_ops; + u64 *data; + int ret; + + if (!ops->get_ethtool_stats || !ops->get_stats_count) + return -EOPNOTSUPP; + + if (copy_from_user(&stats, useraddr, sizeof(stats))) + return -EFAULT; + + stats.n_stats = ops->get_stats_count(dev); + data = kmalloc(stats.n_stats * sizeof(u64), GFP_USER); + if (!data) + return -ENOMEM; + + ops->get_ethtool_stats(dev, &stats, data); + + ret = -EFAULT; + if (copy_to_user(useraddr, &stats, sizeof(stats))) + goto out; + useraddr += sizeof(stats); + if (copy_to_user(useraddr, data, stats.n_stats * sizeof(u64))) + goto out; + ret = 0; + +out: + kfree(data); + return ret; +} + +static int ethtool_ioctl(struct ifreq *ifr) +{ + struct net_device *dev = __dev_get_by_name(ifr->ifr_name); + void *useraddr = (void *) ifr->ifr_data; + u32 ethcmd; + + /* + * XXX: This can be pushed down into the ethtool_* handlers that + * need it. Keep existing behaviour for the moment. + */ + if (!capable(CAP_NET_ADMIN)) + return -EPERM; + + if (!dev || !netif_device_present(dev)) + return -ENODEV; + + if (copy_from_user(ðcmd, useraddr, sizeof (ethcmd))) + return -EFAULT; + + switch (ethcmd) { + case ETHTOOL_GSET: + return ethtool_get_settings(dev, useraddr); + case ETHTOOL_SSET: + return ethtool_set_settings(dev, useraddr); + case ETHTOOL_GDRVINFO: + return ethtool_get_drvinfo(dev, useraddr); + case ETHTOOL_GREGS: + return ethtool_get_regs(dev, useraddr); + case ETHTOOL_GWOL: + return ethtool_get_wol(dev, useraddr); + case ETHTOOL_SWOL: + return ethtool_set_wol(dev, useraddr); + case ETHTOOL_GMSGLVL: + return ethtool_get_msglevel(dev, useraddr); + case ETHTOOL_SMSGLVL: + return ethtool_set_msglevel(dev, useraddr); + case ETHTOOL_NWAY_RST: + return ethtool_nway_reset(dev); + case ETHTOOL_GLINK: + return ethtool_get_link(dev, useraddr); + case ETHTOOL_GEEPROM: + return ethtool_get_eeprom(dev, useraddr); + case ETHTOOL_SEEPROM: + return ethtool_set_eeprom(dev, useraddr); + case ETHTOOL_GCOALESCE: + return ethtool_get_coalesce(dev, useraddr); + case ETHTOOL_SCOALESCE: + return ethtool_set_coalesce(dev, useraddr); + case ETHTOOL_GRINGPARAM: + return ethtool_get_ringparam(dev, useraddr); + case ETHTOOL_SRINGPARAM: + return ethtool_set_ringparam(dev, useraddr); + case ETHTOOL_GPAUSEPARAM: + return ethtool_get_pauseparam(dev, useraddr); + case ETHTOOL_SPAUSEPARAM: + return ethtool_set_pauseparam(dev, useraddr); + case ETHTOOL_GRXCSUM: + return ethtool_get_rx_csum(dev, useraddr); + case ETHTOOL_SRXCSUM: + return ethtool_set_rx_csum(dev, useraddr); + case ETHTOOL_GTXCSUM: + return ethtool_get_tx_csum(dev, useraddr); + case ETHTOOL_STXCSUM: + return ethtool_set_tx_csum(dev, useraddr); + case ETHTOOL_GSG: + return ethtool_get_sg(dev, useraddr); + case ETHTOOL_SSG: + return ethtool_set_sg(dev, useraddr); + case ETHTOOL_GTSO: + return ethtool_get_tso(dev, useraddr); + case ETHTOOL_STSO: + return ethtool_set_tso(dev, useraddr); + case ETHTOOL_TEST: + return ethtool_self_test(dev, useraddr); + case ETHTOOL_GSTRINGS: + return ethtool_get_strings(dev, useraddr); + case ETHTOOL_PHYS_ID: + return ethtool_phys_id(dev, useraddr); + case ETHTOOL_GSTATS: + return ethtool_get_stats(dev, useraddr); + default: + return -EOPNOTSUPP; + } + + return -EOPNOTSUPP; +} +#endif //ETHTOOL_OPS_COMPAT + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0) +static int rtl8126_siocdevprivate(struct net_device *dev, struct ifreq *ifr, + void __user *data, int cmd) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int ret = 0; + + switch (cmd) { +#ifdef ENABLE_DASH_SUPPORT + case SIOCDEVPRIVATE_RTLDASH: + if (!netif_running(dev)) { + ret = -ENODEV; + break; + } + if (!capable(CAP_NET_ADMIN)) { + ret = -EPERM; + break; + } + + ret = rtl8126_dash_ioctl(dev, ifr); + break; +#endif + +#ifdef ENABLE_REALWOW_SUPPORT + case SIOCDEVPRIVATE_RTLREALWOW: + if (!netif_running(dev)) { + ret = -ENODEV; + break; + } + + ret = rtl8126_realwow_ioctl(dev, ifr); + break; +#endif + + case SIOCRTLTOOL: + if (!capable(CAP_NET_ADMIN)) { + ret = -EPERM; + break; + } + + ret = rtl8126_tool_ioctl(tp, ifr); + break; + + default: + ret = -EOPNOTSUPP; + } + + return ret; +} +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0) + +static int +rtl8126_do_ioctl(struct net_device *dev, + struct ifreq *ifr, + int cmd) +{ + struct rtl8126_private *tp = netdev_priv(dev); + struct mii_ioctl_data *data = if_mii(ifr); + int ret = 0; + + switch (cmd) { + case SIOCGMIIPHY: + data->phy_id = 32; /* Internal PHY */ + break; + + case SIOCGMIIREG: + rtl8126_mdio_write(tp, 0x1F, 0x0000); + data->val_out = rtl8126_mdio_read(tp, data->reg_num); + break; + + case SIOCSMIIREG: + if (!capable(CAP_NET_ADMIN)) + return -EPERM; + rtl8126_mdio_write(tp, 0x1F, 0x0000); + rtl8126_mdio_write(tp, data->reg_num, data->val_in); + break; + +#ifdef ETHTOOL_OPS_COMPAT + case SIOCETHTOOL: + ret = ethtool_ioctl(ifr); + break; +#endif + +#ifdef ENABLE_PTP_SUPPORT + case SIOCSHWTSTAMP: + case SIOCGHWTSTAMP: + if (tp->EnablePtp) + ret = rtl8126_ptp_ioctl(dev, ifr, cmd); + else + ret = -EOPNOTSUPP; + break; +#endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0) +#ifdef ENABLE_DASH_SUPPORT + case SIOCDEVPRIVATE_RTLDASH: + if (!netif_running(dev)) { + ret = -ENODEV; + break; + } + if (!capable(CAP_NET_ADMIN)) { + ret = -EPERM; + break; + } + + ret = rtl8126_dash_ioctl(dev, ifr); + break; +#endif + +#ifdef ENABLE_REALWOW_SUPPORT + case SIOCDEVPRIVATE_RTLREALWOW: + if (!netif_running(dev)) { + ret = -ENODEV; + break; + } + + if (!capable(CAP_NET_ADMIN)) { + ret = -EPERM; + break; + } + + ret = rtl8126_realwow_ioctl(dev, ifr); + break; +#endif + + case SIOCRTLTOOL: + if (!capable(CAP_NET_ADMIN)) { + ret = -EPERM; + break; + } + + ret = rtl8126_tool_ioctl(tp, ifr); + break; +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0) + + default: + ret = -EOPNOTSUPP; + break; + } + + return ret; +} + +static void +rtl8126_phy_power_up(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + if (rtl8126_is_in_phy_disable_mode(dev)) + return; + + rtl8126_mdio_write(tp, 0x1F, 0x0000); + rtl8126_mdio_write(tp, MII_BMCR, BMCR_ANENABLE); + + //wait ups resume (phy state 3) + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_wait_phy_ups_resume(dev, 3); + break; + }; +} + +static void +rtl8126_phy_power_down(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + rtl8126_mdio_write(tp, 0x1F, 0x0000); + rtl8126_mdio_write(tp, MII_BMCR, BMCR_ANENABLE | BMCR_PDOWN); +} + +static int __devinit +rtl8126_init_board(struct pci_dev *pdev, + struct net_device **dev_out, + void __iomem **ioaddr_out) +{ + void __iomem *ioaddr; + struct net_device *dev; + struct rtl8126_private *tp; + int rc = -ENOMEM, i, pm_cap; + + assert(ioaddr_out != NULL); + + /* dev zeroed in alloc_etherdev */ + dev = alloc_etherdev_mq(sizeof (*tp), R8126_MAX_QUEUES); + if (dev == NULL) { +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + if (netif_msg_drv(&debug)) + dev_err(&pdev->dev, "unable to alloc new ethernet\n"); +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + goto err_out; + } + + SET_MODULE_OWNER(dev); + SET_NETDEV_DEV(dev, &pdev->dev); + tp = netdev_priv(dev); + tp->dev = dev; + tp->pci_dev = pdev; + tp->msg_enable = netif_msg_init(debug.msg_enable, R8126_MSG_DEFAULT); + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,26) + if (!aspm) + pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 | + PCIE_LINK_STATE_CLKPM); +#endif + + /* enable device (incl. PCI PM wakeup and hotplug setup) */ + rc = pci_enable_device(pdev); + if (rc < 0) { +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + if (netif_msg_probe(tp)) + dev_err(&pdev->dev, "enable failure\n"); +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + goto err_out_free_dev; + } + + if (pci_set_mwi(pdev) < 0) { +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + if (netif_msg_drv(&debug)) + dev_info(&pdev->dev, "Mem-Wr-Inval unavailable.\n"); +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + } + + /* save power state before pci_enable_device overwrites it */ + pm_cap = pci_find_capability(pdev, PCI_CAP_ID_PM); + if (pm_cap) { + u16 pwr_command; + + pci_read_config_word(pdev, pm_cap + PCI_PM_CTRL, &pwr_command); + } else { +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + if (netif_msg_probe(tp)) { + dev_err(&pdev->dev, "PowerManagement capability not found.\n"); + } +#else + printk("PowerManagement capability not found.\n"); +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + + } + + /* make sure PCI base addr 1 is MMIO */ + if (!(pci_resource_flags(pdev, 2) & IORESOURCE_MEM)) { +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + if (netif_msg_probe(tp)) + dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n"); +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + rc = -ENODEV; + goto err_out_mwi; + } + /* check for weird/broken PCI region reporting */ + if (pci_resource_len(pdev, 2) < R8126_REGS_SIZE) { +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + if (netif_msg_probe(tp)) + dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n"); +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + rc = -ENODEV; + goto err_out_mwi; + } + + rc = pci_request_regions(pdev, MODULENAME); + if (rc < 0) { +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + if (netif_msg_probe(tp)) + dev_err(&pdev->dev, "could not request regions.\n"); +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + goto err_out_mwi; + } + + if ((sizeof(dma_addr_t) > 4) && + use_dac && + !dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) && + !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) { + dev->features |= NETIF_F_HIGHDMA; + } else { + rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); + if (rc < 0) { +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + if (netif_msg_probe(tp)) + dev_err(&pdev->dev, "DMA configuration failed.\n"); +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + goto err_out_free_res; + } + } + + /* ioremap MMIO region */ + ioaddr = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2)); + if (ioaddr == NULL) { +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + if (netif_msg_probe(tp)) + dev_err(&pdev->dev, "cannot remap MMIO, aborting\n"); +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + rc = -EIO; + goto err_out_free_res; + } + + tp->mmio_addr = ioaddr; + + /* Identify chip attached to board */ + rtl8126_get_mac_version(tp); + + rtl8126_print_mac_version(tp); + + for (i = ARRAY_SIZE(rtl_chip_info) - 1; i >= 0; i--) { + if (tp->mcfg == rtl_chip_info[i].mcfg) + break; + } + + if (i < 0) { + /* Unknown chip: assume array element #0, original RTL-8125 */ +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + if (netif_msg_probe(tp)) + dev_printk(KERN_DEBUG, &pdev->dev, "unknown chip version, assuming %s\n", rtl_chip_info[0].name); +#else + printk("Realtek unknown chip version, assuming %s\n", rtl_chip_info[0].name); +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,0) + i++; + } + + tp->chipset = i; + + *ioaddr_out = ioaddr; + *dev_out = dev; +out: + return rc; + +err_out_free_res: + pci_release_regions(pdev); +err_out_mwi: + pci_clear_mwi(pdev); + pci_disable_device(pdev); +err_out_free_dev: + free_netdev(dev); +err_out: + *ioaddr_out = NULL; + *dev_out = NULL; + goto out; +} + +static void +rtl8126_esd_checker(struct rtl8126_private *tp) +{ + struct net_device *dev = tp->dev; + struct pci_dev *pdev = tp->pci_dev; + u8 cmd; + u16 io_base_l; + u16 mem_base_l; + u16 mem_base_h; + u8 ilr; + u16 resv_0x1c_h; + u16 resv_0x1c_l; + u16 resv_0x20_l; + u16 resv_0x20_h; + u16 resv_0x24_l; + u16 resv_0x24_h; + u16 resv_0x2c_h; + u16 resv_0x2c_l; + u32 pci_sn_l; + u32 pci_sn_h; + + if (unlikely(tp->rtk_enable_diag)) + goto exit; + + tp->esd_flag = 0; + + pci_read_config_byte(pdev, PCI_COMMAND, &cmd); + if (cmd != tp->pci_cfg_space.cmd) { + printk(KERN_ERR "%s: cmd = 0x%02x, should be 0x%02x \n.", dev->name, cmd, tp->pci_cfg_space.cmd); + pci_write_config_byte(pdev, PCI_COMMAND, tp->pci_cfg_space.cmd); + tp->esd_flag |= BIT_0; + + pci_read_config_byte(pdev, PCI_COMMAND, &cmd); + if (cmd == 0xff) { + printk(KERN_ERR "%s: pci link is down \n.", dev->name); + goto exit; + } + } + + pci_read_config_word(pdev, PCI_BASE_ADDRESS_0, &io_base_l); + if (io_base_l != tp->pci_cfg_space.io_base_l) { + printk(KERN_ERR "%s: io_base_l = 0x%04x, should be 0x%04x \n.", dev->name, io_base_l, tp->pci_cfg_space.io_base_l); + pci_write_config_word(pdev, PCI_BASE_ADDRESS_0, tp->pci_cfg_space.io_base_l); + tp->esd_flag |= BIT_1; + } + + pci_read_config_word(pdev, PCI_BASE_ADDRESS_2, &mem_base_l); + if (mem_base_l != tp->pci_cfg_space.mem_base_l) { + printk(KERN_ERR "%s: mem_base_l = 0x%04x, should be 0x%04x \n.", dev->name, mem_base_l, tp->pci_cfg_space.mem_base_l); + pci_write_config_word(pdev, PCI_BASE_ADDRESS_2, tp->pci_cfg_space.mem_base_l); + tp->esd_flag |= BIT_2; + } + + pci_read_config_word(pdev, PCI_BASE_ADDRESS_2 + 2, &mem_base_h); + if (mem_base_h!= tp->pci_cfg_space.mem_base_h) { + printk(KERN_ERR "%s: mem_base_h = 0x%04x, should be 0x%04x \n.", dev->name, mem_base_h, tp->pci_cfg_space.mem_base_h); + pci_write_config_word(pdev, PCI_BASE_ADDRESS_2 + 2, tp->pci_cfg_space.mem_base_h); + tp->esd_flag |= BIT_3; + } + + pci_read_config_word(pdev, PCI_BASE_ADDRESS_3, &resv_0x1c_l); + if (resv_0x1c_l != tp->pci_cfg_space.resv_0x1c_l) { + printk(KERN_ERR "%s: resv_0x1c_l = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x1c_l, tp->pci_cfg_space.resv_0x1c_l); + pci_write_config_word(pdev, PCI_BASE_ADDRESS_3, tp->pci_cfg_space.resv_0x1c_l); + tp->esd_flag |= BIT_4; + } + + pci_read_config_word(pdev, PCI_BASE_ADDRESS_3 + 2, &resv_0x1c_h); + if (resv_0x1c_h != tp->pci_cfg_space.resv_0x1c_h) { + printk(KERN_ERR "%s: resv_0x1c_h = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x1c_h, tp->pci_cfg_space.resv_0x1c_h); + pci_write_config_word(pdev, PCI_BASE_ADDRESS_3 + 2, tp->pci_cfg_space.resv_0x1c_h); + tp->esd_flag |= BIT_5; + } + + pci_read_config_word(pdev, PCI_BASE_ADDRESS_4, &resv_0x20_l); + if (resv_0x20_l != tp->pci_cfg_space.resv_0x20_l) { + printk(KERN_ERR "%s: resv_0x20_l = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x20_l, tp->pci_cfg_space.resv_0x20_l); + pci_write_config_word(pdev, PCI_BASE_ADDRESS_4, tp->pci_cfg_space.resv_0x20_l); + tp->esd_flag |= BIT_6; + } + + pci_read_config_word(pdev, PCI_BASE_ADDRESS_4 + 2, &resv_0x20_h); + if (resv_0x20_h != tp->pci_cfg_space.resv_0x20_h) { + printk(KERN_ERR "%s: resv_0x20_h = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x20_h, tp->pci_cfg_space.resv_0x20_h); + pci_write_config_word(pdev, PCI_BASE_ADDRESS_4 + 2, tp->pci_cfg_space.resv_0x20_h); + tp->esd_flag |= BIT_7; + } + + pci_read_config_word(pdev, PCI_BASE_ADDRESS_5, &resv_0x24_l); + if (resv_0x24_l != tp->pci_cfg_space.resv_0x24_l) { + printk(KERN_ERR "%s: resv_0x24_l = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x24_l, tp->pci_cfg_space.resv_0x24_l); + pci_write_config_word(pdev, PCI_BASE_ADDRESS_5, tp->pci_cfg_space.resv_0x24_l); + tp->esd_flag |= BIT_8; + } + + pci_read_config_word(pdev, PCI_BASE_ADDRESS_5 + 2, &resv_0x24_h); + if (resv_0x24_h != tp->pci_cfg_space.resv_0x24_h) { + printk(KERN_ERR "%s: resv_0x24_h = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x24_h, tp->pci_cfg_space.resv_0x24_h); + pci_write_config_word(pdev, PCI_BASE_ADDRESS_5 + 2, tp->pci_cfg_space.resv_0x24_h); + tp->esd_flag |= BIT_9; + } + + pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ilr); + if (ilr != tp->pci_cfg_space.ilr) { + printk(KERN_ERR "%s: ilr = 0x%02x, should be 0x%02x \n.", dev->name, ilr, tp->pci_cfg_space.ilr); + pci_write_config_byte(pdev, PCI_INTERRUPT_LINE, tp->pci_cfg_space.ilr); + tp->esd_flag |= BIT_10; + } + + pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &resv_0x2c_l); + if (resv_0x2c_l != tp->pci_cfg_space.resv_0x2c_l) { + printk(KERN_ERR "%s: resv_0x2c_l = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x2c_l, tp->pci_cfg_space.resv_0x2c_l); + pci_write_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, tp->pci_cfg_space.resv_0x2c_l); + tp->esd_flag |= BIT_11; + } + + pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID + 2, &resv_0x2c_h); + if (resv_0x2c_h != tp->pci_cfg_space.resv_0x2c_h) { + printk(KERN_ERR "%s: resv_0x2c_h = 0x%04x, should be 0x%04x \n.", dev->name, resv_0x2c_h, tp->pci_cfg_space.resv_0x2c_h); + pci_write_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID + 2, tp->pci_cfg_space.resv_0x2c_h); + tp->esd_flag |= BIT_12; + } + + if (tp->HwPcieSNOffset > 0) { + pci_sn_l = rtl8126_csi_read(tp, tp->HwPcieSNOffset); + if (pci_sn_l != tp->pci_cfg_space.pci_sn_l) { + printk(KERN_ERR "%s: pci_sn_l = 0x%08x, should be 0x%08x \n.", dev->name, pci_sn_l, tp->pci_cfg_space.pci_sn_l); + rtl8126_csi_write(tp, tp->HwPcieSNOffset, tp->pci_cfg_space.pci_sn_l); + tp->esd_flag |= BIT_13; + } + + pci_sn_h = rtl8126_csi_read(tp, tp->HwPcieSNOffset + 4); + if (pci_sn_h != tp->pci_cfg_space.pci_sn_h) { + printk(KERN_ERR "%s: pci_sn_h = 0x%08x, should be 0x%08x \n.", dev->name, pci_sn_h, tp->pci_cfg_space.pci_sn_h); + rtl8126_csi_write(tp, tp->HwPcieSNOffset + 4, tp->pci_cfg_space.pci_sn_h); + tp->esd_flag |= BIT_14; + } + } + + if (tp->esd_flag != 0) { + printk(KERN_ERR "%s: esd_flag = 0x%04x\n.\n", dev->name, tp->esd_flag); + netif_carrier_off(dev); + netif_tx_disable(dev); + rtl8126_hw_reset(dev); + rtl8126_tx_clear(tp); + rtl8126_rx_clear(tp); + rtl8126_init_ring(dev); + rtl8126_up(dev); + rtl8126_enable_hw_linkchg_interrupt(tp); + rtl8126_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising); + tp->esd_flag = 0; + } +exit: + return; +} +/* +static void +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0) +rtl8126_esd_timer(unsigned long __opaque) +#else +rtl8126_esd_timer(struct timer_list *t) +#endif +{ +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0) + struct net_device *dev = (struct net_device *)__opaque; + struct rtl8126_private *tp = netdev_priv(dev); + struct timer_list *timer = &tp->esd_timer; +#else + struct rtl8126_private *tp = from_timer(tp, t, esd_timer); + //struct net_device *dev = tp->dev; + struct timer_list *timer = t; +#endif + rtl8126_esd_checker(tp); + + mod_timer(timer, jiffies + timeout); +} +*/ + +/* +static void +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0) +rtl8126_link_timer(unsigned long __opaque) +#else +rtl8126_link_timer(struct timer_list *t) +#endif +{ +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,14,0) + struct net_device *dev = (struct net_device *)__opaque; + struct rtl8126_private *tp = netdev_priv(dev); + struct timer_list *timer = &tp->link_timer; +#else + struct rtl8126_private *tp = from_timer(tp, t, link_timer); + struct net_device *dev = tp->dev; + struct timer_list *timer = t; +#endif + rtl8126_check_link_status(dev); + + mod_timer(timer, jiffies + RTL8126_LINK_TIMEOUT); +} +*/ + +int +rtl8126_enable_msix(struct rtl8126_private *tp) +{ + int i, nvecs = 0; + struct msix_entry msix_ent[R8126_MAX_MSIX_VEC]; + //struct net_device *dev = tp->dev; + //const int len = sizeof(tp->irq_tbl[0].name); + + for (i = 0; i < R8126_MAX_MSIX_VEC; i++) { + msix_ent[i].entry = i; + msix_ent[i].vector = 0; + } + + nvecs = pci_enable_msix_range(tp->pci_dev, msix_ent, + tp->min_irq_nvecs, tp->max_irq_nvecs); + if (nvecs < 0) + goto out; + + for (i = 0; i < nvecs; i++) { + struct r8126_irq *irq = &tp->irq_tbl[i]; + irq->vector = msix_ent[i].vector; + //snprintf(irq->name, len, "%s-%d", dev->name, i); + //irq->handler = rtl8126_interrupt_msix; + } + +out: + return nvecs; +} + +/* Cfg9346_Unlock assumed. */ +static int rtl8126_try_msi(struct rtl8126_private *tp) +{ + struct pci_dev *pdev = tp->pci_dev; + unsigned int hw_supp_irq_nvecs; + unsigned msi = 0; + int nvecs = 1; + + switch (tp->mcfg) { + case CFG_METHOD_1 ... CFG_METHOD_3: + hw_supp_irq_nvecs = R8126_MAX_MSIX_VEC_8125B; + break; + default: + hw_supp_irq_nvecs = 1; + break; + } + tp->hw_supp_irq_nvecs = clamp_val(hw_supp_irq_nvecs, 1, + R8126_MAX_MSIX_VEC); + + tp->max_irq_nvecs = 1; + tp->min_irq_nvecs = 1; +#ifndef DISABLE_MULTI_MSIX_VECTOR + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + tp->max_irq_nvecs = tp->hw_supp_irq_nvecs; + tp->min_irq_nvecs = R8126_MIN_MSIX_VEC_8125B; + break; + } +#endif + +#if defined(RTL_USE_NEW_INTR_API) + if ((nvecs = pci_alloc_irq_vectors(pdev, tp->min_irq_nvecs, tp->max_irq_nvecs, PCI_IRQ_MSIX)) > 0) + msi |= RTL_FEATURE_MSIX; + else if ((nvecs = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES)) > 0 && + pci_dev_msi_enabled(pdev)) + msi |= RTL_FEATURE_MSI; +#elif LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13) + if ((nvecs = rtl8126_enable_msix(tp)) > 0) + msi |= RTL_FEATURE_MSIX; + else if (!pci_enable_msi(pdev)) + msi |= RTL_FEATURE_MSI; +#endif + if (!(msi & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX))) + dev_info(&pdev->dev, "no MSI/MSI-X. Back to INTx.\n"); + + if (!(msi & RTL_FEATURE_MSIX) || nvecs < 1) + nvecs = 1; + + tp->irq_nvecs = nvecs; + + tp->features |= msi; + + return nvecs; +} + +static void rtl8126_disable_msi(struct pci_dev *pdev, struct rtl8126_private *tp) +{ +#if defined(RTL_USE_NEW_INTR_API) + if (tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX)) + pci_free_irq_vectors(pdev); +#elif LINUX_VERSION_CODE > KERNEL_VERSION(2,6,13) + if (tp->features & (RTL_FEATURE_MSIX)) + pci_disable_msix(pdev); + else if (tp->features & (RTL_FEATURE_MSI)) + pci_disable_msi(pdev); +#endif + tp->features &= ~(RTL_FEATURE_MSI | RTL_FEATURE_MSIX); +} + +static int rtl8126_get_irq(struct pci_dev *pdev) +{ +#if defined(RTL_USE_NEW_INTR_API) + return pci_irq_vector(pdev, 0); +#else + return pdev->irq; +#endif +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,11,0) +static void +rtl8126_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats) +{ + struct rtl8126_private *tp = netdev_priv(dev); + struct rtl8126_counters *counters = tp->tally_vaddr; + dma_addr_t paddr = tp->tally_paddr; + + if (!counters) + return; + + netdev_stats_to_stats64(stats, &dev->stats); + dev_fetch_sw_netstats(stats, dev->tstats); + + /* + * Fetch additional counter values missing in stats collected by driver + * from tally counters. + */ + rtl8126_dump_tally_counter(tp, paddr); + + stats->tx_errors = le64_to_cpu(counters->tx_errors); + stats->collisions = le32_to_cpu(counters->tx_multi_collision); + stats->tx_aborted_errors = le16_to_cpu(counters->tx_aborted) ; + stats->rx_missed_errors = le16_to_cpu(counters->rx_missed); +} +#else +/** + * rtl8126_get_stats - Get rtl8126 read/write statistics + * @dev: The Ethernet Device to get statistics for + * + * Get TX/RX statistics for rtl8126 + */ +static struct +net_device_stats *rtl8126_get_stats(struct net_device *dev) +{ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) + struct rtl8126_private *tp = netdev_priv(dev); +#endif + return &RTLDEV->stats; +} +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,36) + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) +static const struct net_device_ops rtl8126_netdev_ops = { + .ndo_open = rtl8126_open, + .ndo_stop = rtl8126_close, +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,11,0) + .ndo_get_stats64 = rtl8126_get_stats64, +#else + .ndo_get_stats = rtl8126_get_stats, +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,11,0) + .ndo_start_xmit = rtl8126_start_xmit, + .ndo_tx_timeout = rtl8126_tx_timeout, + .ndo_change_mtu = rtl8126_change_mtu, + .ndo_set_mac_address = rtl8126_set_mac_address, +#if LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0) + .ndo_do_ioctl = rtl8126_do_ioctl, +#else + .ndo_siocdevprivate = rtl8126_siocdevprivate, + .ndo_eth_ioctl = rtl8126_do_ioctl, +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(5,15,0) +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,1,0) + .ndo_set_multicast_list = rtl8126_set_rx_mode, +#else + .ndo_set_rx_mode = rtl8126_set_rx_mode, +#endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) +#ifdef CONFIG_R8126_VLAN + .ndo_vlan_rx_register = rtl8126_vlan_rx_register, +#endif +#else + .ndo_fix_features = rtl8126_fix_features, + .ndo_set_features = rtl8126_set_features, +#endif +#ifdef CONFIG_NET_POLL_CONTROLLER + .ndo_poll_controller = rtl8126_netpoll, +#endif +}; +#endif + + +#ifdef CONFIG_R8126_NAPI + +static int rtl8126_poll(napi_ptr napi, napi_budget budget) +{ + struct r8126_napi *r8126napi = RTL_GET_PRIV(napi, struct r8126_napi); + struct rtl8126_private *tp = r8126napi->priv; + RTL_GET_NETDEV(tp) + unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev); + unsigned int work_done = 0; + int i; + + for (i = 0; i < tp->num_tx_rings; i++) + rtl8126_tx_interrupt(&tp->tx_ring[i], budget); + + for (i = 0; i < tp->num_rx_rings; i++) + work_done += rtl8126_rx_interrupt(dev, tp, &tp->rx_ring[i], budget); + + RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget); + + if (work_done < work_to_do) { +#ifdef ENABLE_DASH_SUPPORT + if (tp->DASH) + HandleDashInterrupt(tp->dev); +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0) + if (RTL_NETIF_RX_COMPLETE(dev, napi, work_done) == FALSE) + return RTL_NAPI_RETURN_VALUE; +#else + RTL_NETIF_RX_COMPLETE(dev, napi, work_done); +#endif + /* + * 20040426: the barrier is not strictly required but the + * behavior of the irq handler could be less predictable + * without it. Btw, the lack of flush for the posted pci + * write is safe - FR + */ + smp_wmb(); + + rtl8126_switch_to_timer_interrupt(tp); + } + + return RTL_NAPI_RETURN_VALUE; +} + +static int rtl8126_poll_msix_ring(napi_ptr napi, napi_budget budget) +{ + struct r8126_napi *r8126napi = RTL_GET_PRIV(napi, struct r8126_napi); + struct rtl8126_private *tp = r8126napi->priv; + RTL_GET_NETDEV(tp) + unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev); + unsigned int work_done = 0; + const int message_id = r8126napi->index; + + rtl8126_tx_interrupt_with_vector(tp, message_id, budget); + + work_done += rtl8126_rx_interrupt(dev, tp, &tp->rx_ring[message_id], budget); + + RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget); + + if (work_done < work_to_do) { +#ifdef ENABLE_DASH_SUPPORT + if (tp->DASH && message_id == 0) + HandleDashInterrupt(tp->dev); +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0) + if (RTL_NETIF_RX_COMPLETE(dev, napi, work_done) == FALSE) + return RTL_NAPI_RETURN_VALUE; +#else + RTL_NETIF_RX_COMPLETE(dev, napi, work_done); +#endif + /* + * 20040426: the barrier is not strictly required but the + * behavior of the irq handler could be less predictable + * without it. Btw, the lack of flush for the posted pci + * write is safe - FR + */ + smp_wmb(); + + rtl8126_enable_hw_interrupt_v2(tp, message_id); + } + + return RTL_NAPI_RETURN_VALUE; +} + +static int rtl8126_poll_msix_tx(napi_ptr napi, napi_budget budget) +{ + struct r8126_napi *r8126napi = RTL_GET_PRIV(napi, struct r8126_napi); + struct rtl8126_private *tp = r8126napi->priv; + RTL_GET_NETDEV(tp) + unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev); + unsigned int work_done = 0; + const int message_id = r8126napi->index; + + //suppress unused variable + (void)(dev); + + rtl8126_tx_interrupt_with_vector(tp, message_id, budget); + + RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget); + + if (work_done < work_to_do) { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0) + if (RTL_NETIF_RX_COMPLETE(dev, napi, work_done) == FALSE) + return RTL_NAPI_RETURN_VALUE; +#else + RTL_NETIF_RX_COMPLETE(dev, napi, work_done); +#endif + /* + * 20040426: the barrier is not strictly required but the + * behavior of the irq handler could be less predictable + * without it. Btw, the lack of flush for the posted pci + * write is safe - FR + */ + smp_wmb(); + + rtl8126_enable_hw_interrupt_v2(tp, message_id); + } + + return RTL_NAPI_RETURN_VALUE; +} + +static int rtl8126_poll_msix_other(napi_ptr napi, napi_budget budget) +{ + struct r8126_napi *r8126napi = RTL_GET_PRIV(napi, struct r8126_napi); + struct rtl8126_private *tp = r8126napi->priv; + RTL_GET_NETDEV(tp) + unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev); + const int message_id = r8126napi->index; + + //suppress unused variable + (void)(dev); + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0) + RTL_NETIF_RX_COMPLETE(dev, napi, work_to_do); +#else + RTL_NETIF_RX_COMPLETE(dev, napi, work_to_do); +#endif + + rtl8126_enable_hw_interrupt_v2(tp, message_id); + + return 1; +} + +static int rtl8126_poll_msix_rx(napi_ptr napi, napi_budget budget) +{ + struct r8126_napi *r8126napi = RTL_GET_PRIV(napi, struct r8126_napi); + struct rtl8126_private *tp = r8126napi->priv; + RTL_GET_NETDEV(tp) + unsigned int work_to_do = RTL_NAPI_QUOTA(budget, dev); + unsigned int work_done = 0; + const int message_id = r8126napi->index; + + work_done += rtl8126_rx_interrupt(dev, tp, &tp->rx_ring[message_id], budget); + + RTL_NAPI_QUOTA_UPDATE(dev, work_done, budget); + + if (work_done < work_to_do) { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(4,10,0) + if (RTL_NETIF_RX_COMPLETE(dev, napi, work_done) == FALSE) + return RTL_NAPI_RETURN_VALUE; +#else + RTL_NETIF_RX_COMPLETE(dev, napi, work_done); +#endif + /* + * 20040426: the barrier is not strictly required but the + * behavior of the irq handler could be less predictable + * without it. Btw, the lack of flush for the posted pci + * write is safe - FR + */ + smp_wmb(); + + rtl8126_enable_hw_interrupt_v2(tp, message_id); + } + + return RTL_NAPI_RETURN_VALUE; +} + +void rtl8126_enable_napi(struct rtl8126_private *tp) +{ +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + int i; + + for (i = 0; i < tp->irq_nvecs; i++) + RTL_NAPI_ENABLE(tp->dev, &tp->r8126napi[i].napi); +#endif +} + +static void rtl8126_disable_napi(struct rtl8126_private *tp) +{ +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + int i; + + for (i = 0; i < tp->irq_nvecs; i++) + RTL_NAPI_DISABLE(tp->dev, &tp->r8126napi[i].napi); +#endif +} + +static void rtl8126_del_napi(struct rtl8126_private *tp) +{ +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + int i; + + for (i = 0; i < tp->irq_nvecs; i++) + RTL_NAPI_DEL((&tp->r8126napi[i])); +#endif +} +#endif //CONFIG_R8126_NAPI + +static void rtl8126_init_napi(struct rtl8126_private *tp) +{ + int i; + + for (i=0; iirq_nvecs; i++) { + struct r8126_napi *r8126napi = &tp->r8126napi[i]; +#ifdef CONFIG_R8126_NAPI + int (*poll)(struct napi_struct *, int); + + poll = rtl8126_poll; + if (tp->features & RTL_FEATURE_MSIX) { + switch (tp->HwCurrIsrVer) { + case 5: + if (i < R8126_MAX_RX_QUEUES_VEC_V3) + poll = rtl8126_poll_msix_rx; + else if (i == 16 || i == 17) + poll = rtl8126_poll_msix_tx; + else + poll = rtl8126_poll_msix_other; + break; + case 2: + if (i < R8126_MAX_RX_QUEUES_VEC_V3) + poll = rtl8126_poll_msix_rx; + else if (i == 16 || i == 18) + poll = rtl8126_poll_msix_tx; + else + poll = rtl8126_poll_msix_other; + break; + case 3: + case 4: + if (i < R8126_MAX_RX_QUEUES_VEC_V3) + poll = rtl8126_poll_msix_ring; + else + poll = rtl8126_poll_msix_other; + break; + } + } + + RTL_NAPI_CONFIG(tp->dev, r8126napi, poll, R8126_NAPI_WEIGHT); +#endif + + r8126napi->priv = tp; + r8126napi->index = i; + } +} + +static int +rtl8126_set_real_num_queue(struct rtl8126_private *tp) +{ + int retval = 0; + + retval = netif_set_real_num_tx_queues(tp->dev, tp->num_tx_rings); + if (retval < 0) + goto exit; + + retval = netif_set_real_num_rx_queues(tp->dev, tp->num_rx_rings); + if (retval < 0) + goto exit; + +exit: + return retval; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,2,0) +void netdev_sw_irq_coalesce_default_on(struct net_device *dev) +{ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0) + WARN_ON(dev->reg_state == NETREG_REGISTERED); + + dev->gro_flush_timeout = 20000; + dev->napi_defer_hard_irqs = 1; +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,8,0) +} +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(6,2,0) + +static int __devinit +rtl8126_init_one(struct pci_dev *pdev, + const struct pci_device_id *ent) +{ + struct net_device *dev = NULL; + struct rtl8126_private *tp; + void __iomem *ioaddr = NULL; + static int board_idx = -1; + + int rc; + + assert(pdev != NULL); + assert(ent != NULL); + + board_idx++; + + if (netif_msg_drv(&debug)) + printk(KERN_INFO "%s Ethernet controller driver %s loaded\n", + MODULENAME, RTL8126_VERSION); + + rc = rtl8126_init_board(pdev, &dev, &ioaddr); + if (rc) + goto out; + + tp = netdev_priv(dev); + assert(ioaddr != NULL); + + tp->set_speed = rtl8126_set_speed_xmii; + tp->get_settings = rtl8126_gset_xmii; + tp->phy_reset_enable = rtl8126_xmii_reset_enable; + tp->phy_reset_pending = rtl8126_xmii_reset_pending; + tp->link_ok = rtl8126_xmii_link_ok; + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,11,0) + dev->tstats = devm_netdev_alloc_pcpu_stats(&pdev->dev, + struct pcpu_sw_netstats); + if (!dev->tstats) + goto err_out_1; +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,11,0) + + rc = rtl8126_try_msi(tp); + if (rc < 0) { + dev_err(&pdev->dev, "Can't allocate interrupt\n"); + goto err_out_1; + } + + rtl8126_init_software_variable(dev); + + RTL_NET_DEVICE_OPS(rtl8126_netdev_ops); + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,4,22) + SET_ETHTOOL_OPS(dev, &rtl8126_ethtool_ops); +#endif + + dev->watchdog_timeo = RTL8126_TX_TIMEOUT; + dev->irq = rtl8126_get_irq(pdev); + dev->base_addr = (unsigned long) ioaddr; + + rtl8126_init_napi(tp); + +#ifdef CONFIG_R8126_VLAN + if (tp->mcfg != CFG_METHOD_DEFAULT) { + dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) + dev->vlan_rx_kill_vid = rtl8126_vlan_rx_kill_vid; +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) + } +#endif + + /* There has been a number of reports that using SG/TSO results in + * tx timeouts. However for a lot of people SG/TSO works fine. + * Therefore disable both features by default, but allow users to + * enable them. Use at own risk! + */ + tp->cp_cmd |= RTL_R16(tp, CPlusCmd); + if (tp->mcfg != CFG_METHOD_DEFAULT) { + dev->features |= NETIF_F_IP_CSUM; +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) + tp->cp_cmd |= RxChkSum; +#else + dev->features |= NETIF_F_RXCSUM; + switch (tp->mcfg) { + default: + dev->features |= NETIF_F_SG | NETIF_F_TSO; + break; + }; + dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO | + NETIF_F_RXCSUM | NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; + dev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO | + NETIF_F_HIGHDMA; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,15,0) + dev->priv_flags |= IFF_LIVE_ADDR_CHANGE; +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,15,0) + dev->hw_features |= NETIF_F_RXALL; + dev->hw_features |= NETIF_F_RXFCS; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22) + dev->hw_features |= NETIF_F_IPV6_CSUM | NETIF_F_TSO6; + dev->features |= NETIF_F_IPV6_CSUM; + switch (tp->mcfg) { + default: + dev->features |= NETIF_F_TSO6; + break; + }; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0) + netif_set_tso_max_size(dev, LSO_64K); + netif_set_tso_max_segs(dev, NIC_MAX_PHYS_BUF_COUNT_LSO2); +#else //LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0) + netif_set_gso_max_size(dev, LSO_64K); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0) + dev->gso_max_segs = NIC_MAX_PHYS_BUF_COUNT_LSO2; +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) + dev->gso_min_segs = NIC_MIN_PHYS_BUF_COUNT; +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,7,0) +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,18,0) +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(5,19,0) + +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22) +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) + +#ifdef ENABLE_RSS_SUPPORT + if (tp->EnableRss) { + dev->hw_features |= NETIF_F_RXHASH; + dev->features |= NETIF_F_RXHASH; + } +#endif + } + + netdev_sw_irq_coalesce_default_on(dev); + +#ifdef ENABLE_DASH_SUPPORT + if (tp->DASH) + AllocateDashShareMemory(dev); +#endif + +#ifdef ENABLE_LIB_SUPPORT + BLOCKING_INIT_NOTIFIER_HEAD(&tp->lib_nh); +#endif + rtl8126_init_all_schedule_work(tp); + + rc = rtl8126_set_real_num_queue(tp); + if (rc < 0) + goto err_out; + + rtl8126_exit_oob(dev); + + rtl8126_powerup_pll(dev); + + rtl8126_hw_init(dev); + + rtl8126_hw_reset(dev); + + /* Get production from EEPROM */ + rtl8126_eeprom_type(tp); + + if (tp->eeprom_type == EEPROM_TYPE_93C46 || tp->eeprom_type == EEPROM_TYPE_93C56) + rtl8126_set_eeprom_sel_low(tp); + + rtl8126_get_mac_address(dev); + + tp->fw_name = rtl_chip_fw_infos[tp->mcfg].fw_name; + + tp->tally_vaddr = dma_alloc_coherent(&pdev->dev, sizeof(*tp->tally_vaddr), + &tp->tally_paddr, GFP_KERNEL); + if (!tp->tally_vaddr) { + rc = -ENOMEM; + goto err_out; + } + + rtl8126_tally_counter_clear(tp); + + pci_set_drvdata(pdev, dev); + + rc = register_netdev(dev); + if (rc) + goto err_out; + + printk(KERN_INFO "%s: This product is covered by one or more of the following patents: US6,570,884, US6,115,776, and US6,327,625.\n", MODULENAME); + + rtl8126_disable_rxdvgate(dev); + + device_set_wakeup_enable(&pdev->dev, tp->wol_enabled); + + netif_carrier_off(dev); + + rtl8126_sysfs_init(dev); + + printk("%s", GPL_CLAIM); + +out: + return rc; + +err_out: + if (tp->tally_vaddr != NULL) { + dma_free_coherent(&pdev->dev, sizeof(*tp->tally_vaddr), tp->tally_vaddr, + tp->tally_paddr); + + tp->tally_vaddr = NULL; + } +#ifdef CONFIG_R8126_NAPI + rtl8126_del_napi(tp); +#endif + rtl8126_disable_msi(pdev, tp); + +err_out_1: + rtl8126_release_board(pdev, dev); + + goto out; +} + +static void __devexit +rtl8126_remove_one(struct pci_dev *pdev) +{ + struct net_device *dev = pci_get_drvdata(pdev); + struct rtl8126_private *tp = netdev_priv(dev); + + assert(dev != NULL); + assert(tp != NULL); + + set_bit(R8126_FLAG_DOWN, tp->task_flags); + + rtl8126_cancel_all_schedule_work(tp); + +#ifdef CONFIG_R8126_NAPI + rtl8126_del_napi(tp); +#endif + if (HW_DASH_SUPPORT_DASH(tp)) + rtl8126_driver_stop(tp); + +#ifdef ENABLE_R8126_SYSFS + rtl8126_sysfs_remove(dev); +#endif //ENABLE_R8126_SYSFS + + unregister_netdev(dev); + rtl8126_disable_msi(pdev, tp); +#ifdef ENABLE_R8126_PROCFS + rtl8126_proc_remove(dev); +#endif + if (tp->tally_vaddr != NULL) { + dma_free_coherent(&pdev->dev, sizeof(*tp->tally_vaddr), tp->tally_vaddr, tp->tally_paddr); + tp->tally_vaddr = NULL; + } + + rtl8126_release_board(pdev, dev); + +#ifdef ENABLE_USE_FIRMWARE_FILE + rtl8126_release_firmware(tp); +#endif + + pci_set_drvdata(pdev, NULL); +} + +#ifdef ENABLE_PAGE_REUSE +static inline unsigned int rtl8126_rx_page_order(unsigned rx_buf_sz, unsigned page_size) +{ + unsigned truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) + + SKB_DATA_ALIGN(rx_buf_sz + R8126_RX_ALIGN); + + return get_order(truesize * 2); +} +#endif //ENABLE_PAGE_REUSE + +static void +rtl8126_set_rxbufsize(struct rtl8126_private *tp, + struct net_device *dev) +{ + unsigned int mtu = dev->mtu; + + tp->rms = (mtu > ETH_DATA_LEN) ? + mtu + ETH_HLEN + RT_VALN_HLEN + ETH_FCS_LEN: + RX_BUF_SIZE; + tp->rx_buf_sz = tp->rms; +#ifdef ENABLE_RX_PACKET_FRAGMENT + tp->rx_buf_sz = SKB_DATA_ALIGN(RX_BUF_SIZE); +#endif //ENABLE_RX_PACKET_FRAGMENT +#ifdef ENABLE_PAGE_REUSE + tp->rx_buf_page_order = rtl8126_rx_page_order(tp->rx_buf_sz, PAGE_SIZE); + tp->rx_buf_page_size = rtl8126_rx_page_size(tp->rx_buf_page_order); +#endif //ENABLE_PAGE_REUSE +} + +static void rtl8126_free_irq(struct rtl8126_private *tp) +{ + int i; + + for (i=0; iirq_nvecs; i++) { + struct r8126_irq *irq = &tp->irq_tbl[i]; + struct r8126_napi *r8126napi = &tp->r8126napi[i]; + + if (irq->requested) { + irq->requested = 0; +#if defined(RTL_USE_NEW_INTR_API) + pci_free_irq(tp->pci_dev, i, r8126napi); +#else + free_irq(irq->vector, r8126napi); +#endif + } + } +} + +static int rtl8126_alloc_irq(struct rtl8126_private *tp) +{ + struct net_device *dev = tp->dev; + int rc = 0; + struct r8126_irq *irq; + struct r8126_napi *r8126napi; + int i = 0; + const int len = sizeof(tp->irq_tbl[0].name); + +#if defined(RTL_USE_NEW_INTR_API) + for (i=0; iirq_nvecs; i++) { + irq = &tp->irq_tbl[i]; + if (tp->features & RTL_FEATURE_MSIX && + tp->HwCurrIsrVer > 1) + irq->handler = rtl8126_interrupt_msix; + else + irq->handler = rtl8126_interrupt; + + r8126napi = &tp->r8126napi[i]; + snprintf(irq->name, len, "%s-%d", dev->name, i); + rc = pci_request_irq(tp->pci_dev, i, irq->handler, NULL, r8126napi, + irq->name); + if (rc) + break; + + irq->vector = pci_irq_vector(tp->pci_dev, i); + irq->requested = 1; + } +#else + unsigned long irq_flags = 0; +#ifdef ENABLE_LIB_SUPPORT + irq_flags |= IRQF_NO_SUSPEND; +#endif + if (tp->features & RTL_FEATURE_MSIX && + tp->HwCurrIsrVer > 1) { + for (i=0; iirq_nvecs; i++) { + irq = &tp->irq_tbl[i]; + irq->handler = rtl8126_interrupt_msix; + r8126napi = &tp->r8126napi[i]; + snprintf(irq->name, len, "%s-%d", dev->name, i); + rc = request_irq(irq->vector, irq->handler, irq_flags, irq->name, r8126napi); + + if (rc) + break; + + irq->requested = 1; + } + } else { + irq = &tp->irq_tbl[0]; + irq->handler = rtl8126_interrupt; + r8126napi = &tp->r8126napi[0]; + snprintf(irq->name, len, "%s-0", dev->name); + if (!(tp->features & RTL_FEATURE_MSIX)) + irq->vector = dev->irq; + irq_flags |= (tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX)) ? 0 : SA_SHIRQ; + rc = request_irq(irq->vector, irq->handler, irq_flags, irq->name, r8126napi); + + if (rc == 0) + irq->requested = 1; + } +#endif + if (rc) + rtl8126_free_irq(tp); + + return rc; +} + +static int rtl8126_alloc_tx_desc(struct rtl8126_private *tp) +{ + struct rtl8126_tx_ring *ring; + struct pci_dev *pdev = tp->pci_dev; + int i; + + for (i = 0; i < tp->num_tx_rings; i++) { + ring = &tp->tx_ring[i]; + ring->TxDescAllocSize = (ring->num_tx_desc + 1) * sizeof(struct TxDesc); + ring->TxDescArray = dma_alloc_coherent(&pdev->dev, + ring->TxDescAllocSize, + &ring->TxPhyAddr, + GFP_KERNEL); + + if (!ring->TxDescArray) + return -1; + } + + return 0; +} + +static int rtl8126_alloc_rx_desc(struct rtl8126_private *tp) +{ + struct rtl8126_rx_ring *ring; + struct pci_dev *pdev = tp->pci_dev; + int i; + + for (i = 0; i < tp->num_rx_rings; i++) { + ring = &tp->rx_ring[i]; + ring->RxDescAllocSize = (ring->num_rx_desc + 1) * tp->RxDescLength; + ring->RxDescArray = dma_alloc_coherent(&pdev->dev, + ring->RxDescAllocSize, + &ring->RxPhyAddr, + GFP_KERNEL); + + if (!ring->RxDescArray) + return -1; + } + + return 0; +} + +static void rtl8126_free_tx_desc(struct rtl8126_private *tp) +{ + struct rtl8126_tx_ring *ring; + struct pci_dev *pdev = tp->pci_dev; + int i; + + for (i = 0; i < tp->num_tx_rings; i++) { + ring = &tp->tx_ring[i]; + if (ring->TxDescArray) { + dma_free_coherent(&pdev->dev, + ring->TxDescAllocSize, + ring->TxDescArray, + ring->TxPhyAddr); + ring->TxDescArray = NULL; + } + } +} + +static void rtl8126_free_rx_desc(struct rtl8126_private *tp) +{ + struct rtl8126_rx_ring *ring; + struct pci_dev *pdev = tp->pci_dev; + int i; + + for (i = 0; i < tp->num_rx_rings; i++) { + ring = &tp->rx_ring[i]; + if (ring->RxDescArray) { + dma_free_coherent(&pdev->dev, + ring->RxDescAllocSize, + ring->RxDescArray, + ring->RxPhyAddr); + ring->RxDescArray = NULL; + } + } +} + +static void rtl8126_free_alloc_resources(struct rtl8126_private *tp) +{ + rtl8126_free_rx_desc(tp); + + rtl8126_free_tx_desc(tp); +} + +#ifdef ENABLE_USE_FIRMWARE_FILE +static void rtl8126_request_firmware(struct rtl8126_private *tp) +{ + struct rtl8126_fw *rtl_fw; + + /* firmware loaded already or no firmware available */ + if (tp->rtl_fw || !tp->fw_name) + return; + + rtl_fw = kzalloc(sizeof(*rtl_fw), GFP_KERNEL); + if (!rtl_fw) + return; + + rtl_fw->phy_write = rtl8126_mdio_write; + rtl_fw->phy_read = rtl8126_mdio_read; + rtl_fw->mac_mcu_write = mac_mcu_write; + rtl_fw->mac_mcu_read = mac_mcu_read; + rtl_fw->fw_name = tp->fw_name; + rtl_fw->dev = tp_to_dev(tp); + + if (rtl8126_fw_request_firmware(rtl_fw)) + kfree(rtl_fw); + else + tp->rtl_fw = rtl_fw; +} +#endif + +int rtl8126_open(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int retval; + + retval = -ENOMEM; + +#ifdef ENABLE_R8126_PROCFS + rtl8126_proc_init(dev); +#endif + rtl8126_set_rxbufsize(tp, dev); + /* + * Rx and Tx descriptors needs 256 bytes alignment. + * pci_alloc_consistent provides more. + */ + if (rtl8126_alloc_tx_desc(tp) < 0 || rtl8126_alloc_rx_desc(tp) < 0) + goto err_free_all_allocated_mem; + + retval = rtl8126_init_ring(dev); + if (retval < 0) + goto err_free_all_allocated_mem; + + retval = rtl8126_alloc_irq(tp); + if (retval < 0) + goto err_free_all_allocated_mem; + + if (netif_msg_probe(tp)) { + printk(KERN_INFO "%s: 0x%lx, " + "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, " + "IRQ %d\n", + dev->name, + dev->base_addr, + dev->dev_addr[0], dev->dev_addr[1], + dev->dev_addr[2], dev->dev_addr[3], + dev->dev_addr[4], dev->dev_addr[5], dev->irq); + } + +#ifdef ENABLE_USE_FIRMWARE_FILE + rtl8126_request_firmware(tp); +#endif + pci_set_master(tp->pci_dev); + +#ifdef CONFIG_R8126_NAPI + rtl8126_enable_napi(tp); +#endif + + rtl8126_exit_oob(dev); + + rtl8126_up(dev); + +#ifdef ENABLE_PTP_SUPPORT + if (tp->EnablePtp) + rtl8126_ptp_init(tp); +#endif + clear_bit(R8126_FLAG_DOWN, tp->task_flags); + + if (tp->resume_not_chg_speed) + rtl8126_check_link_status(dev); + else + rtl8126_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising); + + if (tp->esd_flag == 0) { + //rtl8126_request_esd_timer(dev); + + rtl8126_schedule_esd_work(tp); + } + + //rtl8126_request_link_timer(dev); + + rtl8126_enable_hw_linkchg_interrupt(tp); + +out: + + return retval; + +err_free_all_allocated_mem: + rtl8126_free_alloc_resources(tp); + + goto out; +} + +static void +set_offset70F(struct rtl8126_private *tp, u8 setting) +{ + u32 csi_tmp; + u32 temp = (u32)setting; + temp = temp << 24; + /*set PCI configuration space offset 0x70F to setting*/ + /*When the register offset of PCI configuration space larger than 0xff, use CSI to access it.*/ + + csi_tmp = rtl8126_csi_read(tp, 0x70c) & 0x00ffffff; + rtl8126_csi_write(tp, 0x70c, csi_tmp | temp); +} + +static void +set_offset79(struct rtl8126_private *tp, u8 setting) +{ + //Set PCI configuration space offset 0x79 to setting + + struct pci_dev *pdev = tp->pci_dev; + u8 device_control; + + if (hwoptimize & HW_PATCH_SOC_LAN) + return; + + pci_read_config_byte(pdev, 0x79, &device_control); + device_control &= ~0x70; + device_control |= setting; + pci_write_config_byte(pdev, 0x79, device_control); +} + +static void +rtl8126_disable_l1_timeout(struct rtl8126_private *tp) +{ + rtl8126_csi_write(tp, 0x890, rtl8126_csi_read(tp, 0x890) & ~BIT(0)); +} + +void +rtl8126_hw_set_rx_packet_filter(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + u32 mc_filter[2]; /* Multicast hash filter */ + int rx_mode; + u32 tmp = 0; + + if (dev->flags & IFF_PROMISC) { + /* Unconditionally log net taps. */ + if (netif_msg_link(tp)) + printk(KERN_NOTICE "%s: Promiscuous mode enabled.\n", + dev->name); + + rx_mode = + AcceptBroadcast | AcceptMulticast | AcceptMyPhys | + AcceptAllPhys; + mc_filter[1] = mc_filter[0] = 0xffffffff; + } else if (dev->flags & IFF_ALLMULTI) { + /* accept all multicasts. */ + rx_mode = AcceptBroadcast | AcceptMulticast | AcceptMyPhys; + mc_filter[1] = mc_filter[0] = 0xffffffff; + } else { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35) + struct dev_mc_list *mclist; + unsigned int i; + + rx_mode = AcceptBroadcast | AcceptMyPhys; + mc_filter[1] = mc_filter[0] = 0; + for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; + i++, mclist = mclist->next) { + int bit_nr = ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26; + mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); + rx_mode |= AcceptMulticast; + } +#else + struct netdev_hw_addr *ha; + + rx_mode = AcceptBroadcast | AcceptMyPhys; + mc_filter[1] = mc_filter[0] = 0; + netdev_for_each_mc_addr(ha, dev) { + int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26; + mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31); + rx_mode |= AcceptMulticast; + } +#endif + } + + if (dev->features & NETIF_F_RXALL) + rx_mode |= (AcceptErr | AcceptRunt); + + tmp = mc_filter[0]; + mc_filter[0] = swab32(mc_filter[1]); + mc_filter[1] = swab32(tmp); + + tmp = tp->rtl8126_rx_config | rx_mode | (RTL_R32(tp, RxConfig) & rtl_chip_info[tp->chipset].RxConfigMask); + + RTL_W32(tp, RxConfig, tmp); + RTL_W32(tp, MAR0 + 0, mc_filter[0]); + RTL_W32(tp, MAR0 + 4, mc_filter[1]); +} + +static void +rtl8126_set_rx_mode(struct net_device *dev) +{ + rtl8126_hw_set_rx_packet_filter(dev); +} + +void +rtl8126_set_rx_q_num(struct rtl8126_private *tp, + unsigned int num_rx_queues) +{ + u16 q_ctrl; + u16 rx_q_num; + + rx_q_num = (u16)ilog2(num_rx_queues); + rx_q_num &= (BIT_0 | BIT_1 | BIT_2); + rx_q_num <<= 2; + q_ctrl = RTL_R16(tp, Q_NUM_CTRL_8125); + q_ctrl &= ~(BIT_2 | BIT_3 | BIT_4); + q_ctrl |= rx_q_num; + RTL_W16(tp, Q_NUM_CTRL_8125, q_ctrl); +} + +void +rtl8126_set_tx_q_num(struct rtl8126_private *tp, + unsigned int num_tx_queues) +{ + u16 mac_ocp_data; + + mac_ocp_data = rtl8126_mac_ocp_read(tp, 0xE63E); + mac_ocp_data &= ~(BIT_11 | BIT_10); + mac_ocp_data |= ((ilog2(num_tx_queues) & 0x03) << 10); + rtl8126_mac_ocp_write(tp, 0xE63E, mac_ocp_data); +} + +void +rtl8126_enable_mcu(struct rtl8126_private *tp, bool enable) +{ + if (FALSE == HW_SUPPORT_MAC_MCU(tp)) + return; + + if (enable) + rtl8126_set_mac_ocp_bit(tp, 0xC0B4, BIT_0); + else + rtl8126_clear_mac_ocp_bit(tp, 0xC0B4, BIT_0); +} + +static void +rtl8126_clear_tcam_entries(struct rtl8126_private *tp) +{ + if (FALSE == HW_SUPPORT_TCAM(tp)) + return; + + rtl8126_set_mac_ocp_bit(tp, 0xEB54, BIT_0); + udelay(1); + rtl8126_clear_mac_ocp_bit(tp, 0xEB54, BIT_0); +} + +static u8 +rtl8126_get_l1off_cap_bits(struct rtl8126_private *tp) +{ + u8 l1offCapBits = 0; + + l1offCapBits = (BIT_0 | BIT_1); + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + l1offCapBits |= (BIT_2 | BIT_3); + default: + break; + } + + return l1offCapBits; +} + +void +rtl8126_hw_config(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + struct pci_dev *pdev = tp->pci_dev; + u16 mac_ocp_data; + + rtl8126_disable_rx_packet_filter(tp); + + rtl8126_hw_reset(dev); + + rtl8126_enable_cfg9346_write(tp); + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_enable_force_clkreq(tp, 0); + rtl8126_enable_aspm_clkreq_lock(tp, 0); + break; + } + + rtl8126_set_eee_lpi_timer(tp); + + //keep magic packet only + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + mac_ocp_data = rtl8126_mac_ocp_read(tp, 0xC0B6); + mac_ocp_data &= BIT_0; + rtl8126_mac_ocp_write(tp, 0xC0B6, mac_ocp_data); + break; + } + + rtl8126_tally_counter_addr_fill(tp); + + rtl8126_enable_extend_tally_couter(tp); + + rtl8126_desc_addr_fill(tp); + + /* Set DMA burst size and Interframe Gap Time */ + RTL_W32(tp, TxConfig, (TX_DMA_BURST_unlimited << TxDMAShift) | + (InterFrameGap << TxInterFrameGapShift)); + + if (tp->EnableTxNoClose) + RTL_W32(tp, TxConfig, (RTL_R32(tp, TxConfig) | BIT_6)); + + if (enable_double_vlan) + rtl8126_enable_double_vlan(tp); + else + rtl8126_disable_double_vlan(tp); + + if (tp->mcfg == CFG_METHOD_1 || + tp->mcfg == CFG_METHOD_2 || + tp->mcfg == CFG_METHOD_3) { + set_offset70F(tp, 0x27); + set_offset79(tp, 0x40); + + rtl8126_disable_l1_timeout(tp); + +#ifdef ENABLE_RSS_SUPPORT + rtl8126_config_rss(tp); +#else + RTL_W32(tp, RSS_CTRL_8125, 0x00); +#endif + rtl8126_set_rx_q_num(tp, rtl8126_tot_rx_rings(tp)); + + RTL_W8(tp, Config1, RTL_R8(tp, Config1) & ~0x10); + + rtl8126_mac_ocp_write(tp, 0xC140, 0xFFFF); + rtl8126_mac_ocp_write(tp, 0xC142, 0xFFFF); + + //new tx desc format + mac_ocp_data = rtl8126_mac_ocp_read(tp, 0xEB58); + if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) + mac_ocp_data &= ~(BIT_0 | BIT_1); + mac_ocp_data |= (BIT_0); + rtl8126_mac_ocp_write(tp, 0xEB58, mac_ocp_data); + + if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) + RTL_W8(tp, 0xD8, RTL_R8(tp, 0xD8) & ~BIT_1); + + mac_ocp_data = rtl8126_mac_ocp_read(tp, 0xE614); + mac_ocp_data &= ~(BIT_10 | BIT_9 | BIT_8); + if (tp->mcfg == CFG_METHOD_1 || tp->mcfg == CFG_METHOD_2 || + tp->mcfg == CFG_METHOD_3) + mac_ocp_data |= ((4 & 0x07) << 8); + else + mac_ocp_data |= ((3 & 0x07) << 8); + rtl8126_mac_ocp_write(tp, 0xE614, mac_ocp_data); + + rtl8126_set_tx_q_num(tp, rtl8126_tot_tx_rings(tp)); + + mac_ocp_data = rtl8126_mac_ocp_read(tp, 0xE63E); + mac_ocp_data &= ~(BIT_5 | BIT_4); + if (tp->mcfg == CFG_METHOD_1 || tp->mcfg == CFG_METHOD_2 || + tp->mcfg == CFG_METHOD_3) + mac_ocp_data |= ((0x02 & 0x03) << 4); + rtl8126_mac_ocp_write(tp, 0xE63E, mac_ocp_data); + + rtl8126_enable_mcu(tp, 0); + rtl8126_enable_mcu(tp, 1); + + mac_ocp_data = rtl8126_mac_ocp_read(tp, 0xC0B4); + mac_ocp_data |= (BIT_3 | BIT_2); + rtl8126_mac_ocp_write(tp, 0xC0B4, mac_ocp_data); + + mac_ocp_data = rtl8126_mac_ocp_read(tp, 0xEB6A); + mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0); + mac_ocp_data |= (BIT_5 | BIT_4 | BIT_1 | BIT_0); + rtl8126_mac_ocp_write(tp, 0xEB6A, mac_ocp_data); + + mac_ocp_data = rtl8126_mac_ocp_read(tp, 0xEB50); + mac_ocp_data &= ~(BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5); + mac_ocp_data |= (BIT_6); + rtl8126_mac_ocp_write(tp, 0xEB50, mac_ocp_data); + + mac_ocp_data = rtl8126_mac_ocp_read(tp, 0xE056); + mac_ocp_data &= ~(BIT_7 | BIT_6 | BIT_5 | BIT_4); + //mac_ocp_data |= (BIT_4 | BIT_5); + rtl8126_mac_ocp_write(tp, 0xE056, mac_ocp_data); + + RTL_W8(tp, TDFNR, 0x10); + + mac_ocp_data = rtl8126_mac_ocp_read(tp, 0xE040); + mac_ocp_data &= ~(BIT_12); + rtl8126_mac_ocp_write(tp, 0xE040, mac_ocp_data); + + mac_ocp_data = rtl8126_mac_ocp_read(tp, 0xEA1C); + mac_ocp_data &= ~(BIT_1 | BIT_0); + mac_ocp_data |= (BIT_0); + rtl8126_mac_ocp_write(tp, 0xEA1C, mac_ocp_data); + + rtl8126_mac_ocp_write(tp, 0xE0C0, 0x4000); + + rtl8126_set_mac_ocp_bit(tp, 0xE052, (BIT_6 | BIT_5)); + rtl8126_clear_mac_ocp_bit(tp, 0xE052, BIT_3 | BIT_7); + + mac_ocp_data = rtl8126_mac_ocp_read(tp, 0xD430); + mac_ocp_data &= ~(BIT_11 | BIT_10 | BIT_9 | BIT_8 | BIT_7 | BIT_6 | BIT_5 | BIT_4 | BIT_3 | BIT_2 | BIT_1 | BIT_0); + mac_ocp_data |= 0x45F; + rtl8126_mac_ocp_write(tp, 0xD430, mac_ocp_data); + + //rtl8126_mac_ocp_write(tp, 0xE0C0, 0x4F87); + if (!tp->DASH) + RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) | BIT_6 | BIT_7); + else + RTL_W8(tp, 0xD0, RTL_R8(tp, 0xD0) & ~(BIT_6 | BIT_7)); + + rtl8126_disable_eee_plus(tp); + + mac_ocp_data = rtl8126_mac_ocp_read(tp, 0xEA1C); + mac_ocp_data &= ~(BIT_2); + if (tp->mcfg == CFG_METHOD_2 || tp->mcfg == CFG_METHOD_3) + mac_ocp_data &= ~(BIT_9 | BIT_8); + rtl8126_mac_ocp_write(tp, 0xEA1C, mac_ocp_data); + + rtl8126_clear_tcam_entries(tp); + + RTL_W16(tp, 0x1880, RTL_R16(tp, 0x1880) & ~(BIT_4 | BIT_5)); + } + + /* csum offload command for RTL8125 */ + tp->tx_tcp_csum_cmd = TxTCPCS_C; + tp->tx_udp_csum_cmd = TxUDPCS_C; + tp->tx_ip_csum_cmd = TxIPCS_C; + tp->tx_ipv6_csum_cmd = TxIPV6F_C; + + /* config interrupt type for RTL8125B */ + if (tp->HwSuppIsrVer > 1) + rtl8126_hw_set_interrupt_type(tp, tp->HwCurrIsrVer); + + //other hw parameters + rtl8126_hw_clear_timer_int(dev); + + rtl8126_hw_clear_int_miti(dev); + + if (tp->use_timer_interrupt && + (tp->HwCurrIsrVer > 1) && + (tp->HwSuppIntMitiVer > 3) && + (tp->features & RTL_FEATURE_MSIX)) { + int i; + for (i = 0; i < tp->irq_nvecs; i++) + rtl8126_hw_set_timer_int_8125(tp, i, timer_count_v2); + } + + rtl8126_enable_exit_l1_mask(tp); + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_mac_ocp_write(tp, 0xE098, 0xC302); + break; + } + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_disable_pci_offset_99(tp); + if (aspm) { + if (tp->org_pci_offset_99 & (BIT_2 | BIT_5 | BIT_6)) + rtl8126_init_pci_offset_99(tp); + } + break; + } + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_disable_pci_offset_180(tp); + if (aspm) { + if (tp->org_pci_offset_180 & rtl8126_get_l1off_cap_bits(tp)) + rtl8126_init_pci_offset_180(tp); + } + break; + } + + tp->cp_cmd &= ~(EnableBist | Macdbgo_oe | Force_halfdup | + Force_rxflow_en | Force_txflow_en | Cxpl_dbg_sel | + ASF | Macdbgo_sel); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,0,0) + RTL_W16(tp, CPlusCmd, tp->cp_cmd); +#else + rtl8126_hw_set_features(dev, dev->features); +#endif + RTL_W16(tp, RxMaxSize, tp->rms); + + rtl8126_disable_rxdvgate(dev); + + if (!tp->pci_cfg_is_read) { + pci_read_config_byte(pdev, PCI_COMMAND, &tp->pci_cfg_space.cmd); + pci_read_config_word(pdev, PCI_BASE_ADDRESS_0, &tp->pci_cfg_space.io_base_l); + pci_read_config_word(pdev, PCI_BASE_ADDRESS_0 + 2, &tp->pci_cfg_space.io_base_h); + pci_read_config_word(pdev, PCI_BASE_ADDRESS_2, &tp->pci_cfg_space.mem_base_l); + pci_read_config_word(pdev, PCI_BASE_ADDRESS_2 + 2, &tp->pci_cfg_space.mem_base_h); + pci_read_config_word(pdev, PCI_BASE_ADDRESS_3, &tp->pci_cfg_space.resv_0x1c_l); + pci_read_config_word(pdev, PCI_BASE_ADDRESS_3 + 2, &tp->pci_cfg_space.resv_0x1c_h); + pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &tp->pci_cfg_space.ilr); + pci_read_config_word(pdev, PCI_BASE_ADDRESS_4, &tp->pci_cfg_space.resv_0x20_l); + pci_read_config_word(pdev, PCI_BASE_ADDRESS_4 + 2, &tp->pci_cfg_space.resv_0x20_h); + pci_read_config_word(pdev, PCI_BASE_ADDRESS_5, &tp->pci_cfg_space.resv_0x24_l); + pci_read_config_word(pdev, PCI_BASE_ADDRESS_5 + 2, &tp->pci_cfg_space.resv_0x24_h); + pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &tp->pci_cfg_space.resv_0x2c_l); + pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID + 2, &tp->pci_cfg_space.resv_0x2c_h); + if (tp->HwPcieSNOffset > 0) { + tp->pci_cfg_space.pci_sn_l = rtl8126_csi_read(tp, tp->HwPcieSNOffset); + tp->pci_cfg_space.pci_sn_h = rtl8126_csi_read(tp, tp->HwPcieSNOffset + 4); + } + + tp->pci_cfg_is_read = 1; + } + + /* Set Rx packet filter */ + rtl8126_hw_set_rx_packet_filter(dev); + +#ifdef ENABLE_DASH_SUPPORT + if (tp->DASH && !tp->dash_printer_enabled) + NICChkTypeEnableDashInterrupt(tp); +#endif + + switch (tp->mcfg) { + case CFG_METHOD_1: + case CFG_METHOD_2: + case CFG_METHOD_3: + rtl8126_enable_aspm_clkreq_lock(tp, aspm ? 1 : 0); + break; + } + + rtl8126_disable_cfg9346_write(tp); + + udelay(10); +} + +void +rtl8126_hw_start(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + +#ifdef ENABLE_LIB_SUPPORT + rtl8126_init_lib_ring(tp); +#endif + + RTL_W8(tp, ChipCmd, CmdTxEnb | CmdRxEnb); + + rtl8126_enable_hw_interrupt(tp); + + rtl8126_lib_reset_complete(tp); +} + +static int +rtl8126_change_mtu(struct net_device *dev, + int new_mtu) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int ret = 0; + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0) + if (new_mtu < ETH_MIN_MTU) + return -EINVAL; + else if (new_mtu > tp->max_jumbo_frame_size) + new_mtu = tp->max_jumbo_frame_size; +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,10,0) + + dev->mtu = new_mtu; + + tp->eee.tx_lpi_timer = dev->mtu + ETH_HLEN + 0x20; + + if (!netif_running(dev)) + goto out; + + rtl8126_down(dev); + + rtl8126_set_rxbufsize(tp, dev); + + ret = rtl8126_init_ring(dev); + + if (ret < 0) + goto err_out; + +#ifdef CONFIG_R8126_NAPI + rtl8126_enable_napi(tp); +#endif//CONFIG_R8126_NAPI + + if (tp->link_ok(dev)) + rtl8126_link_on_patch(dev); + else + rtl8126_link_down_patch(dev); + + //mod_timer(&tp->esd_timer, jiffies + RTL8126_ESD_TIMEOUT); + //mod_timer(&tp->link_timer, jiffies + RTL8126_LINK_TIMEOUT); +out: +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,0,0) + netdev_update_features(dev); +#endif + +err_out: + return ret; +} + +static inline void +rtl8126_set_desc_dma_addr(struct rtl8126_private *tp, + struct RxDesc *desc, + dma_addr_t mapping) +{ + if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) + ((struct RxDescV3 *)desc)->addr = cpu_to_le64(mapping); + else + desc->addr = cpu_to_le64(mapping); +} + +static inline void +rtl8126_mark_to_asic_v3(struct RxDescV3 *descv3, + u32 rx_buf_sz) +{ + u32 eor = le32_to_cpu(descv3->RxDescNormalDDWord4.opts1) & RingEnd; + + WRITE_ONCE(descv3->RxDescNormalDDWord4.opts1, cpu_to_le32(DescOwn | eor | rx_buf_sz)); +} + +void +rtl8126_mark_to_asic(struct rtl8126_private *tp, + struct RxDesc *desc, + u32 rx_buf_sz) +{ + if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) + rtl8126_mark_to_asic_v3((struct RxDescV3 *)desc, rx_buf_sz); + else { + u32 eor = le32_to_cpu(desc->opts1) & RingEnd; + + WRITE_ONCE(desc->opts1, cpu_to_le32(DescOwn | eor | rx_buf_sz)); + } +} + +static inline void +rtl8126_map_to_asic(struct rtl8126_private *tp, + struct rtl8126_rx_ring *ring, + struct RxDesc *desc, + dma_addr_t mapping, + u32 rx_buf_sz, + const u32 cur_rx) +{ + ring->RxDescPhyAddr[cur_rx] = mapping; + rtl8126_set_desc_dma_addr(tp, desc, mapping); + wmb(); + rtl8126_mark_to_asic(tp, desc, rx_buf_sz); +} + +#ifdef ENABLE_PAGE_REUSE + +static int +rtl8126_alloc_rx_page(struct rtl8126_private *tp, struct rtl8126_rx_ring *ring, + struct rtl8126_rx_buffer *rxb) +{ + struct page *page; + dma_addr_t dma; + unsigned int order = tp->rx_buf_page_order; + + //get free page + page = dev_alloc_pages(order); + + if (unlikely(!page)) + return -ENOMEM; + + dma = dma_map_page_attrs(&tp->pci_dev->dev, page, 0, + tp->rx_buf_page_size, + DMA_FROM_DEVICE, + (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)); + + if (unlikely(dma_mapping_error(&tp->pci_dev->dev, dma))) { + __free_pages(page, order); + return -ENOMEM; + } + + rxb->page = page; + rxb->data = page_address(page); + rxb->page_offset = ring->rx_offset; + rxb->dma = dma; + + //after page alloc, page refcount already = 1 + + return 0; +} + +static void +rtl8126_free_rx_page(struct rtl8126_private *tp, struct rtl8126_rx_buffer *rxb) +{ + if (!rxb->page) + return; + + dma_unmap_page_attrs(&tp->pci_dev->dev, rxb->dma, + tp->rx_buf_page_size, + DMA_FROM_DEVICE, + (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)); + __free_pages(rxb->page, tp->rx_buf_page_order); + rxb->page = NULL; +} + +static void +_rtl8126_rx_clear(struct rtl8126_private *tp, struct rtl8126_rx_ring *ring) +{ + int i; + struct rtl8126_rx_buffer *rxb; + + for (i = 0; i < ring->num_rx_desc; i++) { + rxb = &ring->rx_buffer[i]; + if (rxb->skb) { + dev_kfree_skb(rxb->skb); + rxb->skb = NULL; + } + rtl8126_free_rx_page(tp, rxb); + } +} + +static u32 +rtl8126_rx_fill(struct rtl8126_private *tp, + struct rtl8126_rx_ring *ring, + struct net_device *dev, + u32 start, + u32 end, + u8 in_intr) +{ + u32 cur; + struct rtl8126_rx_buffer *rxb; + + for (cur = start; end - cur > 0; cur++) { + int ret, i = cur % ring->num_rx_desc; + + rxb = &ring->rx_buffer[i]; + if (rxb->page) + continue; + + ret = rtl8126_alloc_rx_page(tp, ring, rxb); + if (ret) + break; + + dma_sync_single_range_for_device(tp_to_dev(tp), + rxb->dma, + rxb->page_offset, + tp->rx_buf_sz, + DMA_FROM_DEVICE); + + rtl8126_map_to_asic(tp, ring, + rtl8126_get_rxdesc(tp, ring->RxDescArray, i), + rxb->dma + rxb->page_offset, + tp->rx_buf_sz, i); + } + return cur - start; +} + +#else //ENABLE_PAGE_REUSE + +static void +rtl8126_free_rx_skb(struct rtl8126_private *tp, + struct rtl8126_rx_ring *ring, + struct sk_buff **sk_buff, + struct RxDesc *desc, + const u32 cur_rx) +{ + struct pci_dev *pdev = tp->pci_dev; + + dma_unmap_single(&pdev->dev, ring->RxDescPhyAddr[cur_rx], tp->rx_buf_sz, + DMA_FROM_DEVICE); + dev_kfree_skb(*sk_buff); + *sk_buff = NULL; + rtl8126_make_unusable_by_asic(tp, desc); +} + +static int +rtl8126_alloc_rx_skb(struct rtl8126_private *tp, + struct rtl8126_rx_ring *ring, + struct sk_buff **sk_buff, + struct RxDesc *desc, + int rx_buf_sz, + const u32 cur_rx, + u8 in_intr) +{ + struct sk_buff *skb; + dma_addr_t mapping; + int ret = 0; + + if (in_intr) + skb = RTL_ALLOC_SKB_INTR(&tp->r8126napi[ring->index].napi, rx_buf_sz + R8126_RX_ALIGN); + else + skb = dev_alloc_skb(rx_buf_sz + R8126_RX_ALIGN); + + if (unlikely(!skb)) + goto err_out; + + if (!in_intr || !R8126_USE_NAPI_ALLOC_SKB) + skb_reserve(skb, R8126_RX_ALIGN); + + mapping = dma_map_single(tp_to_dev(tp), skb->data, rx_buf_sz, + DMA_FROM_DEVICE); + if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) { + if (unlikely(net_ratelimit())) + netif_err(tp, drv, tp->dev, "Failed to map RX DMA!\n"); + goto err_out; + } + + *sk_buff = skb; + rtl8126_map_to_asic(tp, ring, desc, mapping, rx_buf_sz, cur_rx); +out: + return ret; + +err_out: + if (skb) + dev_kfree_skb(skb); + ret = -ENOMEM; + rtl8126_make_unusable_by_asic(tp, desc); + goto out; +} + +static void +_rtl8126_rx_clear(struct rtl8126_private *tp, struct rtl8126_rx_ring *ring) +{ + int i; + + for (i = 0; i < ring->num_rx_desc; i++) { + if (ring->Rx_skbuff[i]) { + rtl8126_free_rx_skb(tp, + ring, + ring->Rx_skbuff + i, + rtl8126_get_rxdesc(tp, ring->RxDescArray, i), + i); + ring->Rx_skbuff[i] = NULL; + } + } +} + +static u32 +rtl8126_rx_fill(struct rtl8126_private *tp, + struct rtl8126_rx_ring *ring, + struct net_device *dev, + u32 start, + u32 end, + u8 in_intr) +{ + u32 cur; + + for (cur = start; end - cur > 0; cur++) { + int ret, i = cur % ring->num_rx_desc; + + if (ring->Rx_skbuff[i]) + continue; + + ret = rtl8126_alloc_rx_skb(tp, + ring, + ring->Rx_skbuff + i, + rtl8126_get_rxdesc(tp, ring->RxDescArray, i), + tp->rx_buf_sz, + i, + in_intr); + if (ret < 0) + break; + } + return cur - start; +} + +#endif //ENABLE_PAGE_REUSE + +void +rtl8126_rx_clear(struct rtl8126_private *tp) +{ + int i; + + for (i = 0; i < tp->num_rx_rings; i++) { + struct rtl8126_rx_ring *ring = &tp->rx_ring[i]; + + _rtl8126_rx_clear(tp, ring); + } +} + +static inline void +rtl8126_mark_as_last_descriptor_8125(struct RxDescV3 *descv3) +{ + descv3->RxDescNormalDDWord4.opts1 |= cpu_to_le32(RingEnd); +} + +static inline void +rtl8126_mark_as_last_descriptor(struct rtl8126_private *tp, + struct RxDesc *desc) +{ + if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) + rtl8126_mark_as_last_descriptor_8125((struct RxDescV3 *)desc); + else + desc->opts1 |= cpu_to_le32(RingEnd); +} + +static void +rtl8126_desc_addr_fill(struct rtl8126_private *tp) +{ + int i; + + for (i = 0; i < tp->num_tx_rings; i++) { + struct rtl8126_tx_ring *ring = &tp->tx_ring[i]; + RTL_W32(tp, ring->tdsar_reg, ((u64)ring->TxPhyAddr & DMA_BIT_MASK(32))); + RTL_W32(tp, ring->tdsar_reg + 4, ((u64)ring->TxPhyAddr >> 32)); + } + + for (i = 0; i < tp->num_rx_rings; i++) { + struct rtl8126_rx_ring *ring = &tp->rx_ring[i]; + RTL_W32(tp, ring->rdsar_reg, ((u64)ring->RxPhyAddr & DMA_BIT_MASK(32))); + RTL_W32(tp, ring->rdsar_reg + 4, ((u64)ring->RxPhyAddr >> 32)); + } +} + +static void +rtl8126_tx_desc_init(struct rtl8126_private *tp) +{ + int i = 0; + + for (i = 0; i < tp->num_tx_rings; i++) { + struct rtl8126_tx_ring *ring = &tp->tx_ring[i]; + memset(ring->TxDescArray, 0x0, ring->TxDescAllocSize); + + ring->TxDescArray[ring->num_tx_desc - 1].opts1 = cpu_to_le32(RingEnd); + } +} + +static void +rtl8126_rx_desc_init(struct rtl8126_private *tp) +{ + int i; + + for (i = 0; i < tp->num_rx_rings; i++) { + struct rtl8126_rx_ring *ring = &tp->rx_ring[i]; + memset(ring->RxDescArray, 0x0, ring->RxDescAllocSize); + } +} + +int +rtl8126_init_ring(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int i; + + rtl8126_init_ring_indexes(tp); + + rtl8126_tx_desc_init(tp); + rtl8126_rx_desc_init(tp); + + for (i = 0; i < tp->num_tx_rings; i++) { + struct rtl8126_tx_ring *ring = &tp->tx_ring[i]; + memset(ring->tx_skb, 0x0, sizeof(ring->tx_skb)); + } + + for (i = 0; i < tp->num_rx_rings; i++) { + struct rtl8126_rx_ring *ring = &tp->rx_ring[i]; +#ifdef ENABLE_PAGE_REUSE + ring->rx_offset = R8126_RX_ALIGN; +#else + memset(ring->Rx_skbuff, 0x0, sizeof(ring->Rx_skbuff)); +#endif //ENABLE_PAGE_REUSE + if (rtl8126_rx_fill(tp, ring, dev, 0, ring->num_rx_desc, 0) != ring->num_rx_desc) + goto err_out; + + rtl8126_mark_as_last_descriptor(tp, rtl8126_get_rxdesc(tp, ring->RxDescArray, ring->num_rx_desc - 1)); + } + + return 0; + +err_out: + rtl8126_rx_clear(tp); + return -ENOMEM; +} + +static void +rtl8126_unmap_tx_skb(struct pci_dev *pdev, + struct ring_info *tx_skb, + struct TxDesc *desc) +{ + unsigned int len = tx_skb->len; + + dma_unmap_single(&pdev->dev, le64_to_cpu(desc->addr), len, DMA_TO_DEVICE); + + desc->opts1 = cpu_to_le32(RTK_MAGIC_DEBUG_VALUE); + desc->opts2 = 0x00; + desc->addr = RTL8126_MAGIC_NUMBER; + tx_skb->len = 0; +} + +static void +rtl8126_tx_clear_range(struct rtl8126_private *tp, + struct rtl8126_tx_ring *ring, + u32 start, + unsigned int n) +{ + unsigned int i; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,22) + struct net_device *dev = tp->dev; +#endif + + for (i = 0; i < n; i++) { + unsigned int entry = (start + i) % ring->num_tx_desc; + struct ring_info *tx_skb = ring->tx_skb + entry; + unsigned int len = tx_skb->len; + + if (len) { + struct sk_buff *skb = tx_skb->skb; + + rtl8126_unmap_tx_skb(tp->pci_dev, tx_skb, + ring->TxDescArray + entry); + if (skb) { + RTLDEV->stats.tx_dropped++; + dev_kfree_skb_any(skb); + tx_skb->skb = NULL; + } + } + } +} + +void +rtl8126_tx_clear(struct rtl8126_private *tp) +{ + int i; + + for (i = 0; i < tp->num_tx_rings; i++) { + struct rtl8126_tx_ring *ring = &tp->tx_ring[i]; + rtl8126_tx_clear_range(tp, ring, ring->dirty_tx, ring->num_tx_desc); + ring->cur_tx = ring->dirty_tx = 0; + } +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) +static void rtl8126_schedule_reset_work(struct rtl8126_private *tp) +{ +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + set_bit(R8126_FLAG_TASK_RESET_PENDING, tp->task_flags); + schedule_delayed_work(&tp->reset_task, 4); +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) +} + +static void rtl8126_schedule_esd_work(struct rtl8126_private *tp) +{ +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + set_bit(R8126_FLAG_TASK_ESD_CHECK_PENDING, tp->task_flags); + schedule_delayed_work(&tp->esd_task, RTL8126_ESD_TIMEOUT); +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) +} + +static void rtl8126_schedule_linkchg_work(struct rtl8126_private *tp) +{ +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + set_bit(R8126_FLAG_TASK_LINKCHG_CHECK_PENDING, tp->task_flags); + schedule_delayed_work(&tp->linkchg_task, 4); +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) +} + +#define rtl8126_cancel_schedule_reset_work(a) +#define rtl8126_cancel_schedule_esd_work(a) +#define rtl8126_cancel_schedule_linkchg_work(a) + +#else +static void rtl8126_schedule_reset_work(struct rtl8126_private *tp) +{ + set_bit(R8126_FLAG_TASK_RESET_PENDING, tp->task_flags); + schedule_delayed_work(&tp->reset_task, 4); +} + +static void rtl8126_cancel_schedule_reset_work(struct rtl8126_private *tp) +{ + struct work_struct *work = &tp->reset_task.work; + + if (!work->func) + return; + + cancel_delayed_work_sync(&tp->reset_task); +} + +static void rtl8126_schedule_esd_work(struct rtl8126_private *tp) +{ + set_bit(R8126_FLAG_TASK_ESD_CHECK_PENDING, tp->task_flags); + schedule_delayed_work(&tp->esd_task, RTL8126_ESD_TIMEOUT); +} + +static void rtl8126_cancel_schedule_esd_work(struct rtl8126_private *tp) +{ + struct work_struct *work = &tp->esd_task.work; + + if (!work->func) + return; + + cancel_delayed_work_sync(&tp->esd_task); +} + +static void rtl8126_schedule_linkchg_work(struct rtl8126_private *tp) +{ + set_bit(R8126_FLAG_TASK_LINKCHG_CHECK_PENDING, tp->task_flags); + schedule_delayed_work(&tp->linkchg_task, 4); +} + +static void rtl8126_cancel_schedule_linkchg_work(struct rtl8126_private *tp) +{ + struct work_struct *work = &tp->linkchg_task.work; + + if (!work->func) + return; + + cancel_delayed_work_sync(&tp->linkchg_task); +} +#endif + +static void rtl8126_init_all_schedule_work(struct rtl8126_private *tp) +{ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) + INIT_WORK(&tp->reset_task, rtl8126_reset_task, dev); + INIT_WORK(&tp->esd_task, rtl8126_esd_task, dev); + INIT_WORK(&tp->linkchg_task, rtl8126_linkchg_task, dev); +#else + INIT_DELAYED_WORK(&tp->reset_task, rtl8126_reset_task); + INIT_DELAYED_WORK(&tp->esd_task, rtl8126_esd_task); + INIT_DELAYED_WORK(&tp->linkchg_task, rtl8126_linkchg_task); +#endif +} + +static void rtl8126_cancel_all_schedule_work(struct rtl8126_private *tp) +{ + rtl8126_cancel_schedule_reset_work(tp); + rtl8126_cancel_schedule_esd_work(tp); + rtl8126_cancel_schedule_linkchg_work(tp); +} + +static void +rtl8126_wait_for_irq_complete(struct rtl8126_private *tp) +{ + if (tp->features & RTL_FEATURE_MSIX) { + int i; + for (i = 0; i < tp->irq_nvecs; i++) + synchronize_irq(tp->irq_tbl[i].vector); + } else { + synchronize_irq(tp->dev->irq); + } +} + +void +_rtl8126_wait_for_quiescence(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + /* Wait for any pending NAPI task to complete */ +#ifdef CONFIG_R8126_NAPI + rtl8126_disable_napi(tp); +#endif//CONFIG_R8126_NAPI + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,5,67) + /* Give a racing hard_start_xmit a few cycles to complete. */ + synchronize_net(); +#endif + + rtl8126_irq_mask_and_ack(tp); + + rtl8126_wait_for_irq_complete(tp); +} + +static void +rtl8126_wait_for_quiescence(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + //suppress unused variable + (void)(tp); + + _rtl8126_wait_for_quiescence(dev); + +#ifdef CONFIG_R8126_NAPI + rtl8126_enable_napi(tp); +#endif//CONFIG_R8126_NAPI +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) +static void rtl8126_reset_task(void *_data) +{ + struct net_device *dev = _data; + struct rtl8126_private *tp = netdev_priv(dev); +#else +static void rtl8126_reset_task(struct work_struct *work) +{ + struct rtl8126_private *tp = + container_of(work, struct rtl8126_private, reset_task.work); + struct net_device *dev = tp->dev; +#endif + int i; + + rtnl_lock(); + + if (!netif_running(dev) || + test_bit(R8126_FLAG_DOWN, tp->task_flags) || + !test_and_clear_bit(R8126_FLAG_TASK_RESET_PENDING, tp->task_flags)) + goto out_unlock; + + netdev_err(dev, "Device reseting!\n"); + + netif_carrier_off(dev); + netif_tx_disable(dev); + _rtl8126_wait_for_quiescence(dev); + rtl8126_hw_reset(dev); + + rtl8126_tx_clear(tp); + + rtl8126_init_ring_indexes(tp); + + rtl8126_tx_desc_init(tp); + for (i = 0; i < tp->num_rx_rings; i++) { + struct rtl8126_rx_ring *ring; + u32 entry; + + ring = &tp->rx_ring[i]; + for (entry = 0; entry < ring->num_rx_desc; entry++) { + struct RxDesc *desc; + + desc = rtl8126_get_rxdesc(tp, ring->RxDescArray, entry); + rtl8126_mark_to_asic(tp, desc, tp->rx_buf_sz); + } + } + +#ifdef ENABLE_PTP_SUPPORT + rtl8126_ptp_reset(tp); +#endif + +#ifdef CONFIG_R8126_NAPI + rtl8126_enable_napi(tp); +#endif //CONFIG_R8126_NAPI + + if (tp->resume_not_chg_speed) { + _rtl8126_check_link_status(dev); + + tp->resume_not_chg_speed = 0; + } else { + rtl8126_enable_hw_linkchg_interrupt(tp); + + rtl8126_set_speed(dev, tp->autoneg, tp->speed, tp->duplex, tp->advertising); + } + +out_unlock: + rtnl_unlock(); +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) +static void rtl8126_esd_task(void *_data) +{ + struct net_device *dev = _data; + struct rtl8126_private *tp = netdev_priv(dev); +#else +static void rtl8126_esd_task(struct work_struct *work) +{ + struct rtl8126_private *tp = + container_of(work, struct rtl8126_private, esd_task.work); + struct net_device *dev = tp->dev; +#endif + rtnl_lock(); + + if (!netif_running(dev) || + test_bit(R8126_FLAG_DOWN, tp->task_flags) || + !test_and_clear_bit(R8126_FLAG_TASK_ESD_CHECK_PENDING, tp->task_flags)) + goto out_unlock; + + rtl8126_esd_checker(tp); + + rtl8126_schedule_esd_work(tp); + +out_unlock: + rtnl_unlock(); +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,20) +static void rtl8126_linkchg_task(void *_data) +{ + struct net_device *dev = _data; + //struct rtl8126_private *tp = netdev_priv(dev); +#else +static void rtl8126_linkchg_task(struct work_struct *work) +{ + struct rtl8126_private *tp = + container_of(work, struct rtl8126_private, linkchg_task.work); + struct net_device *dev = tp->dev; +#endif + rtnl_lock(); + + if (!netif_running(dev) || + test_bit(R8126_FLAG_DOWN, tp->task_flags) || + !test_and_clear_bit(R8126_FLAG_TASK_LINKCHG_CHECK_PENDING, tp->task_flags)) + goto out_unlock; + + rtl8126_check_link_status(dev); + +out_unlock: + rtnl_unlock(); +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) +static void +rtl8126_tx_timeout(struct net_device *dev, unsigned int txqueue) +#else +static void +rtl8126_tx_timeout(struct net_device *dev) +#endif +{ + struct rtl8126_private *tp = netdev_priv(dev); + + netdev_err(dev, "Transmit timeout reset Device!\n"); + + /* Let's wait a bit while any (async) irq lands on */ + rtl8126_schedule_reset_work(tp); +} + +static u32 +rtl8126_get_txd_opts1(struct rtl8126_tx_ring *ring, + u32 opts1, + u32 len, + unsigned int entry) +{ + u32 status = opts1 | len; + + if (entry == ring->num_tx_desc - 1) + status |= RingEnd; + + return status; +} + +static int +rtl8126_xmit_frags(struct rtl8126_private *tp, + struct rtl8126_tx_ring *ring, + struct sk_buff *skb, + const u32 *opts) +{ + struct skb_shared_info *info = skb_shinfo(skb); + unsigned int cur_frag, entry; + struct TxDesc *txd = NULL; + const unsigned char nr_frags = info->nr_frags; + unsigned long PktLenCnt = 0; + bool LsoPatchEnabled = FALSE; + + entry = ring->cur_tx; + for (cur_frag = 0; cur_frag < nr_frags; cur_frag++) { + skb_frag_t *frag = info->frags + cur_frag; + dma_addr_t mapping; + u32 status, len; + void *addr; + + entry = (entry + 1) % ring->num_tx_desc; + + txd = ring->TxDescArray + entry; +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,2,0) + len = frag->size; + addr = ((void *) page_address(frag->page)) + frag->page_offset; +#else + len = skb_frag_size(frag); + addr = skb_frag_address(frag); +#endif + mapping = dma_map_single(tp_to_dev(tp), addr, len, DMA_TO_DEVICE); + + if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) { + if (unlikely(net_ratelimit())) + netif_err(tp, drv, tp->dev, + "Failed to map TX fragments DMA!\n"); + goto err_out; + } + + /* anti gcc 2.95.3 bugware (sic) */ + status = rtl8126_get_txd_opts1(ring, opts[0], len, entry); + if (cur_frag == (nr_frags - 1) || LsoPatchEnabled == TRUE) + status |= LastFrag; + + txd->addr = cpu_to_le64(mapping); + + ring->tx_skb[entry].len = len; + + txd->opts2 = cpu_to_le32(opts[1]); + wmb(); + txd->opts1 = cpu_to_le32(status); + + PktLenCnt += len; + } + + return cur_frag; + +err_out: + rtl8126_tx_clear_range(tp, ring, ring->cur_tx + 1, cur_frag); + return -EIO; +} + +static inline +__be16 get_protocol(struct sk_buff *skb) +{ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,37) + return vlan_get_protocol(skb); +#else + __be16 protocol; + + if (skb->protocol == htons(ETH_P_8021Q)) + protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto; + else + protocol = skb->protocol; + + return protocol; +#endif +} + +static inline +u8 rtl8126_get_l4_protocol(struct sk_buff *skb) +{ + int no = skb_network_offset(skb); + struct ipv6hdr *i6h, _i6h; + struct iphdr *ih, _ih; + u8 ip_protocol = IPPROTO_RAW; + + switch (get_protocol(skb)) { + case __constant_htons(ETH_P_IP): + ih = skb_header_pointer(skb, no, sizeof(_ih), &_ih); + if (ih) + ip_protocol = ih->protocol; + break; + case __constant_htons(ETH_P_IPV6): + i6h = skb_header_pointer(skb, no, sizeof(_i6h), &_i6h); + if (i6h) + ip_protocol = i6h->nexthdr; + break; + } + + return ip_protocol; +} + +static bool rtl8126_skb_pad_with_len(struct sk_buff *skb, unsigned int len) +{ + if (skb_padto(skb, len)) + return false; + skb_put(skb, len - skb->len); + return true; +} + +static bool rtl8126_skb_pad(struct sk_buff *skb) +{ +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,19,0) + return rtl8126_skb_pad_with_len(skb, ETH_ZLEN); +#else + return !eth_skb_pad(skb); +#endif +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0) +/* msdn_giant_send_check() + * According to the document of microsoft, the TCP Pseudo Header excludes the + * packet length for IPv6 TCP large packets. + */ +static int msdn_giant_send_check(struct sk_buff *skb) +{ + const struct ipv6hdr *ipv6h; + struct tcphdr *th; + int ret; + + ret = skb_cow_head(skb, 0); + if (ret) + return ret; + + ipv6h = ipv6_hdr(skb); + th = tcp_hdr(skb); + + th->check = 0; + th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0); + + return ret; +} +#endif + +static bool rtl8126_require_pad_ptp_pkt(struct rtl8126_private *tp) +{ + switch (tp->mcfg) { + default: + return false; + } +} + +#define MIN_PATCH_LEN (47) +static u32 +rtl8126_get_patch_pad_len(struct rtl8126_private *tp, + struct sk_buff *skb) +{ + u32 pad_len = 0; + int trans_data_len; + u32 hdr_len; + u32 pkt_len = skb->len; + u8 ip_protocol; + bool has_trans = skb_transport_header_was_set(skb); + + if (!rtl8126_require_pad_ptp_pkt(tp)) + goto no_padding; + + if (!(has_trans && (pkt_len < 175))) //128 + MIN_PATCH_LEN + goto no_padding; + + ip_protocol = rtl8126_get_l4_protocol(skb); + if (!(ip_protocol == IPPROTO_TCP || ip_protocol == IPPROTO_UDP)) + goto no_padding; + + trans_data_len = pkt_len - + (skb->transport_header - + skb_headroom(skb)); + if (ip_protocol == IPPROTO_UDP) { + if (trans_data_len > 3 && trans_data_len < MIN_PATCH_LEN) { + u16 dest_port = 0; + + skb_copy_bits(skb, skb->transport_header - skb_headroom(skb) + 2, &dest_port, 2); + dest_port = ntohs(dest_port); + + if (dest_port == 0x13f || + dest_port == 0x140) { + pad_len = MIN_PATCH_LEN - trans_data_len; + goto out; + } + } + } + + hdr_len = 0; + if (ip_protocol == IPPROTO_TCP) + hdr_len = 20; + else if (ip_protocol == IPPROTO_UDP) + hdr_len = 8; + if (trans_data_len < hdr_len) + pad_len = hdr_len - trans_data_len; + +out: + if ((pkt_len + pad_len) < ETH_ZLEN) + pad_len = ETH_ZLEN - pkt_len; + + return pad_len; + +no_padding: + + return 0; +} + +static bool +rtl8126_tso_csum(struct sk_buff *skb, + struct net_device *dev, + u32 *opts, + unsigned int *bytecount, + unsigned short *gso_segs) +{ + struct rtl8126_private *tp = netdev_priv(dev); + unsigned long large_send = 0; + u32 csum_cmd = 0; + u8 sw_calc_csum = false; + u8 check_patch_required = true; + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + if (dev->features & (NETIF_F_TSO | NETIF_F_TSO6)) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) + u32 mss = skb_shinfo(skb)->tso_size; +#else + u32 mss = skb_shinfo(skb)->gso_size; +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,18) + + /* TCP Segmentation Offload (or TCP Large Send) */ + if (mss) { + union { + struct iphdr *v4; + struct ipv6hdr *v6; + unsigned char *hdr; + } ip; + union { + struct tcphdr *tcp; + struct udphdr *udp; + unsigned char *hdr; + } l4; + u32 l4_offset, hdr_len; + + ip.hdr = skb_network_header(skb); + l4.hdr = skb_checksum_start(skb); + + l4_offset = skb_transport_offset(skb); + assert((l4_offset%2) == 0); + switch (get_protocol(skb)) { + case __constant_htons(ETH_P_IP): + if (l4_offset <= GTTCPHO_MAX) { + opts[0] |= GiantSendv4; + opts[0] |= l4_offset << GTTCPHO_SHIFT; + opts[1] |= min(mss, MSS_MAX) << 18; + large_send = 1; + } + break; + case __constant_htons(ETH_P_IPV6): +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,14,0) + if (msdn_giant_send_check(skb)) + return false; +#endif + if (l4_offset <= GTTCPHO_MAX) { + opts[0] |= GiantSendv6; + opts[0] |= l4_offset << GTTCPHO_SHIFT; + opts[1] |= min(mss, MSS_MAX) << 18; + large_send = 1; + } + break; + default: + if (unlikely(net_ratelimit())) + dprintk("tso proto=%x!\n", skb->protocol); + break; + } + + if (large_send == 0) + return false; + + + /* compute length of segmentation header */ + hdr_len = (l4.tcp->doff * 4) + l4_offset; + /* update gso size and bytecount with header size */ + *gso_segs = skb_shinfo(skb)->gso_segs; + *bytecount += (*gso_segs - 1) * hdr_len; + + return true; + } + } +#endif //LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + + if (skb->ip_summed == CHECKSUM_PARTIAL) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,22) + const struct iphdr *ip = skb->nh.iph; + + if (dev->features & NETIF_F_IP_CSUM) { + if (ip->protocol == IPPROTO_TCP) + csum_cmd = tp->tx_ip_csum_cmd | tp->tx_tcp_csum_cmd; + else if (ip->protocol == IPPROTO_UDP) + csum_cmd = tp->tx_ip_csum_cmd | tp->tx_udp_csum_cmd; + else if (ip->protocol == IPPROTO_IP) + csum_cmd = tp->tx_ip_csum_cmd; + } +#else + u8 ip_protocol = IPPROTO_RAW; + + switch (get_protocol(skb)) { + case __constant_htons(ETH_P_IP): + if (dev->features & NETIF_F_IP_CSUM) { + ip_protocol = ip_hdr(skb)->protocol; + csum_cmd = tp->tx_ip_csum_cmd; + } + break; + case __constant_htons(ETH_P_IPV6): + if (dev->features & NETIF_F_IPV6_CSUM) { + if (skb_transport_offset(skb) > 0 && skb_transport_offset(skb) <= TCPHO_MAX) { + ip_protocol = ipv6_hdr(skb)->nexthdr; + csum_cmd = tp->tx_ipv6_csum_cmd; + csum_cmd |= skb_transport_offset(skb) << TCPHO_SHIFT; + } + } + break; + default: + if (unlikely(net_ratelimit())) + dprintk("checksum_partial proto=%x!\n", skb->protocol); + break; + } + + if (ip_protocol == IPPROTO_TCP) + csum_cmd |= tp->tx_tcp_csum_cmd; + else if (ip_protocol == IPPROTO_UDP) + csum_cmd |= tp->tx_udp_csum_cmd; +#endif + if (csum_cmd == 0) { + sw_calc_csum = true; +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + WARN_ON(1); /* we need a WARN() */ +#endif + } + + if (ip_protocol == IPPROTO_TCP) + check_patch_required = false; + } + + if (check_patch_required) { + u32 pad_len = rtl8126_get_patch_pad_len(tp, skb); + + if (pad_len > 0) { + if (!rtl8126_skb_pad_with_len(skb, skb->len + pad_len)) + return false; + + if (csum_cmd != 0) + sw_calc_csum = true; + } + } + + if (skb->len < ETH_ZLEN) { + if (tp->UseSwPaddingShortPkt || + (tp->ShortPacketSwChecksum && csum_cmd != 0)) { + if (!rtl8126_skb_pad(skb)) + return false; + + if (csum_cmd != 0) + sw_calc_csum = true; + } + } + + if (sw_calc_csum) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,7) + skb_checksum_help(&skb, 0); +#elif LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) && LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,10) + skb_checksum_help(skb, 0); +#else + skb_checksum_help(skb); +#endif + } else + opts[1] |= csum_cmd; + + return true; +} + +static bool rtl8126_tx_slots_avail(struct rtl8126_private *tp, + struct rtl8126_tx_ring *ring) +{ + unsigned int slots_avail = READ_ONCE(ring->dirty_tx) + ring->num_tx_desc + - READ_ONCE(ring->cur_tx); + + /* A skbuff with nr_frags needs nr_frags+1 entries in the tx queue */ + return slots_avail > MAX_SKB_FRAGS; +} + +static inline u32 +rtl8126_fast_mod_mask(const u32 input, const u32 mask) +{ + return input > mask ? input & mask : input; +} + +static void rtl8126_doorbell(struct rtl8126_private *tp, + struct rtl8126_tx_ring *ring) +{ + if (tp->EnableTxNoClose) { + if (tp->HwSuppTxNoCloseVer > 3) + RTL_W32(tp, ring->sw_tail_ptr_reg, ring->cur_tx); + else + RTL_W16(tp, ring->sw_tail_ptr_reg, ring->cur_tx); + } else + RTL_W16(tp, TPPOLL_8125, BIT(ring->index)); /* set polling bit */ +} + +static netdev_tx_t +rtl8126_start_xmit(struct sk_buff *skb, + struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + unsigned int bytecount; + unsigned short gso_segs; + struct ring_info *last; + unsigned int last_entry; + unsigned int entry; + struct TxDesc *txd; + dma_addr_t mapping; + u32 len; + u32 opts[2]; + netdev_tx_t ret = NETDEV_TX_OK; + int frags; + u8 EnableTxNoClose = tp->EnableTxNoClose; + const u16 queue_mapping = skb_get_queue_mapping(skb); + struct rtl8126_tx_ring *ring; + bool stop_queue; + + assert(queue_mapping < tp->num_tx_rings); + + ring = &tp->tx_ring[queue_mapping]; + + if (unlikely(!rtl8126_tx_slots_avail(tp, ring))) { + if (netif_msg_drv(tp)) { + printk(KERN_ERR + "%s: BUG! Tx Ring[%d] full when queue awake!\n", + dev->name, + queue_mapping); + } + goto err_stop; + } + + entry = ring->cur_tx % ring->num_tx_desc; + txd = ring->TxDescArray + entry; + + if (!EnableTxNoClose) { + if (unlikely(le32_to_cpu(txd->opts1) & DescOwn)) { + if (netif_msg_drv(tp)) { + printk(KERN_ERR + "%s: BUG! Tx Desc is own by hardware!\n", + dev->name); + } + goto err_stop; + } + } + + bytecount = skb->len; + gso_segs = 1; + + opts[0] = DescOwn; + opts[1] = rtl8126_tx_vlan_tag(tp, skb); + + if (unlikely(!rtl8126_tso_csum(skb, dev, opts, &bytecount, &gso_segs))) + goto err_dma_0; + + frags = rtl8126_xmit_frags(tp, ring, skb, opts); + if (unlikely(frags < 0)) + goto err_dma_0; + if (frags) { + len = skb_headlen(skb); + opts[0] |= FirstFrag; + } else { + len = skb->len; + opts[0] |= FirstFrag | LastFrag; + } + + opts[0] = rtl8126_get_txd_opts1(ring, opts[0], len, entry); + mapping = dma_map_single(tp_to_dev(tp), skb->data, len, DMA_TO_DEVICE); + if (unlikely(dma_mapping_error(tp_to_dev(tp), mapping))) { + if (unlikely(net_ratelimit())) + netif_err(tp, drv, dev, "Failed to map TX DMA!\n"); + goto err_dma_1; + } + +#ifdef ENABLE_PTP_SUPPORT + if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) { + if (!test_and_set_bit_lock(__RTL8126_PTP_TX_IN_PROGRESS, &tp->state)) { + if (tp->hwtstamp_config.tx_type == HWTSTAMP_TX_ON && + !tp->ptp_tx_skb) { + skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; + + tp->ptp_tx_skb = skb_get(skb); + tp->ptp_tx_start = jiffies; + schedule_work(&tp->ptp_tx_work); + } else + tp->tx_hwtstamp_skipped++; + } + } +#endif + /* set first fragment's length */ + ring->tx_skb[entry].len = len; + + /* set skb to last fragment */ + last_entry = (entry + frags) % ring->num_tx_desc; + last = &ring->tx_skb[last_entry]; + last->skb = skb; + last->gso_segs = gso_segs; + last->bytecount = bytecount; + + txd->addr = cpu_to_le64(mapping); + txd->opts2 = cpu_to_le32(opts[1]); + wmb(); + txd->opts1 = cpu_to_le32(opts[0]); + + netdev_tx_sent_queue(txring_txq(ring), bytecount); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) + dev->trans_start = jiffies; +#else + skb_tx_timestamp(skb); +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(3,5,0) + + /* rtl_tx needs to see descriptor changes before updated tp->cur_tx */ + smp_wmb(); + + WRITE_ONCE(ring->cur_tx, ring->cur_tx + frags + 1); + + stop_queue = !rtl8126_tx_slots_avail(tp, ring); + if (unlikely(stop_queue)) { + /* Avoid wrongly optimistic queue wake-up: rtl_tx thread must + * not miss a ring update when it notices a stopped queue. + */ + smp_wmb(); + netif_stop_subqueue(dev, queue_mapping); + } + + if (netif_xmit_stopped(txring_txq(ring)) || !netdev_xmit_more()) + rtl8126_doorbell(tp, ring); + + if (unlikely(stop_queue)) { + /* Sync with rtl_tx: + * - publish queue status and cur_tx ring index (write barrier) + * - refresh dirty_tx ring index (read barrier). + * May the current thread have a pessimistic view of the ring + * status and forget to wake up queue, a racing rtl_tx thread + * can't. + */ + smp_mb(); + if (rtl8126_tx_slots_avail(tp, ring)) + netif_start_subqueue(dev, queue_mapping); + } +out: + return ret; +err_dma_1: + rtl8126_tx_clear_range(tp, ring, ring->cur_tx + 1, frags); +err_dma_0: + RTLDEV->stats.tx_dropped++; + dev_kfree_skb_any(skb); + ret = NETDEV_TX_OK; + goto out; +err_stop: + netif_stop_subqueue(dev, queue_mapping); + ret = NETDEV_TX_BUSY; + RTLDEV->stats.tx_dropped++; + goto out; +} + +/* recycle tx no close desc*/ +static int +rtl8126_tx_interrupt_noclose(struct rtl8126_tx_ring *ring, int budget) +{ + unsigned int total_bytes = 0, total_packets = 0; + struct rtl8126_private *tp = ring->priv; + struct net_device *dev = tp->dev; + unsigned int dirty_tx, tx_left; + unsigned int tx_desc_closed; + unsigned int count = 0; + + dirty_tx = ring->dirty_tx; + ring->NextHwDesCloPtr = rtl8126_get_hw_clo_ptr(ring); + tx_desc_closed = rtl8126_fast_mod_mask(ring->NextHwDesCloPtr - + ring->BeginHwDesCloPtr, + tp->MaxTxDescPtrMask); + tx_left = min((READ_ONCE(ring->cur_tx) - dirty_tx), tx_desc_closed); + ring->BeginHwDesCloPtr += tx_left; + + while (tx_left > 0) { + unsigned int entry = dirty_tx % ring->num_tx_desc; + struct ring_info *tx_skb = ring->tx_skb + entry; + + rtl8126_unmap_tx_skb(tp->pci_dev, + tx_skb, + ring->TxDescArray + entry); + + if (tx_skb->skb != NULL) { + /* update the statistics for this packet */ + total_bytes += tx_skb->bytecount; + total_packets += tx_skb->gso_segs; + + RTL_NAPI_CONSUME_SKB_ANY(tx_skb->skb, budget); + tx_skb->skb = NULL; + } + dirty_tx++; + tx_left--; + } + + if (total_packets) { + netdev_tx_completed_queue(txring_txq(ring), + total_packets, total_bytes); + + RTLDEV->stats.tx_bytes += total_bytes; + RTLDEV->stats.tx_packets+= total_packets; + } + + if (ring->dirty_tx != dirty_tx) { + count = dirty_tx - ring->dirty_tx; + WRITE_ONCE(ring->dirty_tx, dirty_tx); + smp_wmb(); + if (__netif_subqueue_stopped(dev, ring->index) && + (rtl8126_tx_slots_avail(tp, ring))) { + netif_start_subqueue(dev, ring->index); + } + } + + return count; +} + +/* recycle tx close desc*/ +static int +rtl8126_tx_interrupt_close(struct rtl8126_tx_ring *ring, int budget) +{ + unsigned int total_bytes = 0, total_packets = 0; + struct rtl8126_private *tp = ring->priv; + struct net_device *dev = tp->dev; + unsigned int dirty_tx, tx_left; + unsigned int count = 0; + + dirty_tx = ring->dirty_tx; + tx_left = READ_ONCE(ring->cur_tx) - dirty_tx; + + while (tx_left > 0) { + unsigned int entry = dirty_tx % ring->num_tx_desc; + struct ring_info *tx_skb = ring->tx_skb + entry; + + if (le32_to_cpu(ring->TxDescArray[entry].opts1) & DescOwn) + break; + + rtl8126_unmap_tx_skb(tp->pci_dev, + tx_skb, + ring->TxDescArray + entry); + + if (tx_skb->skb != NULL) { + /* update the statistics for this packet */ + total_bytes += tx_skb->bytecount; + total_packets += tx_skb->gso_segs; + + RTL_NAPI_CONSUME_SKB_ANY(tx_skb->skb, budget); + tx_skb->skb = NULL; + } + dirty_tx++; + tx_left--; + } + + if (total_packets) { + netdev_tx_completed_queue(txring_txq(ring), + total_packets, total_bytes); + + RTLDEV->stats.tx_bytes += total_bytes; + RTLDEV->stats.tx_packets+= total_packets; + } + + if (ring->dirty_tx != dirty_tx) { + count = dirty_tx - ring->dirty_tx; + WRITE_ONCE(ring->dirty_tx, dirty_tx); + smp_wmb(); + if (__netif_subqueue_stopped(dev, ring->index) && + (rtl8126_tx_slots_avail(tp, ring))) { + netif_start_subqueue(dev, ring->index); + } + + if (ring->cur_tx != dirty_tx) + rtl8126_doorbell(tp, ring); + } + + return count; +} + +static int +rtl8126_tx_interrupt(struct rtl8126_tx_ring *ring, int budget) +{ + struct rtl8126_private *tp = ring->priv; + + if (tp->EnableTxNoClose) + return rtl8126_tx_interrupt_noclose(ring, budget); + else + return rtl8126_tx_interrupt_close(ring, budget); +} + +static int +rtl8126_tx_interrupt_with_vector(struct rtl8126_private *tp, + const int message_id, + int budget) +{ + int count = 0; + + switch (tp->HwCurrIsrVer) { + case 3: + case 4: + if (message_id < tp->num_tx_rings) + count += rtl8126_tx_interrupt(&tp->tx_ring[message_id], budget); + break; + case 5: + if (message_id == 16) + count += rtl8126_tx_interrupt(&tp->tx_ring[0], budget); +#ifdef ENABLE_MULTIPLE_TX_QUEUE + else if (message_id == 17) + count += rtl8126_tx_interrupt(&tp->tx_ring[1], budget); +#endif + break; + default: + if (message_id == 16) + count += rtl8126_tx_interrupt(&tp->tx_ring[0], budget); +#ifdef ENABLE_MULTIPLE_TX_QUEUE + else if (message_id == 18) + count += rtl8126_tx_interrupt(&tp->tx_ring[1], budget); +#endif + break; + } + + return count; +} + +static inline int +rtl8126_fragmented_frame(struct rtl8126_private *tp, u32 status) +{ + if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) + return (status & (FirstFrag_V3 | LastFrag_V3)) != (FirstFrag_V3 | LastFrag_V3); + else + return (status & (FirstFrag | LastFrag)) != (FirstFrag | LastFrag); +} + +static inline int +rtl8126_is_non_eop(struct rtl8126_private *tp, u32 status) +{ + if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) + return !(status & LastFrag_V3); + else + return !(status & LastFrag); +} + +static inline int +rtl8126_rx_desc_type(u32 status) +{ + return ((status >> 26) & 0x0F); +} + +static inline void +rtl8126_rx_v3_csum(struct rtl8126_private *tp, + struct sk_buff *skb, + struct RxDescV3 *descv3) +{ + u32 opts2 = le32_to_cpu(descv3->RxDescNormalDDWord4.opts2); + + /* rx csum offload for RTL8125 */ + if (((opts2 & RxTCPT_v3) && !(opts2 & RxTCPF_v3)) || + ((opts2 & RxUDPT_v3) && !(opts2 & RxUDPF_v3))) + skb->ip_summed = CHECKSUM_UNNECESSARY; + else + skb_checksum_none_assert(skb); +} + +static inline void +rtl8126_rx_csum(struct rtl8126_private *tp, + struct sk_buff *skb, + struct RxDesc *desc, + u32 opts1) +{ + if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) + rtl8126_rx_v3_csum(tp, skb, (struct RxDescV3 *)desc); + else { + /* rx csum offload for RTL8125 */ + if (((opts1 & RxTCPT) && !(opts1 & RxTCPF)) || + ((opts1 & RxUDPT) && !(opts1 & RxUDPF))) + skb->ip_summed = CHECKSUM_UNNECESSARY; + else + skb_checksum_none_assert(skb); + } +} + +/* +static inline int +rtl8126_try_rx_copy(struct rtl8126_private *tp, + struct rtl8126_rx_ring *ring, + struct sk_buff **sk_buff, + int pkt_size, + struct RxDesc *desc, + int rx_buf_sz) +{ + int ret = -1; + + struct sk_buff *skb; + + skb = RTL_ALLOC_SKB_INTR(&tp->r8126napi[ring->index].napi, pkt_size + R8126_RX_ALIGN); + if (skb) { + u8 *data; + + data = sk_buff[0]->data; + if (!R8126_USE_NAPI_ALLOC_SKB) + skb_reserve(skb, R8126_RX_ALIGN); +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37) + prefetch(data - R8126_RX_ALIGN); +#endif + eth_copy_and_sum(skb, data, pkt_size, 0); + *sk_buff = skb; + rtl8126_mark_to_asic(tp, desc, rx_buf_sz); + ret = 0; + } + + return ret; +} +*/ + +static inline void +rtl8126_rx_skb(struct rtl8126_private *tp, + struct sk_buff *skb, + u32 ring_index) +{ +#ifdef CONFIG_R8126_NAPI +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29) + netif_receive_skb(skb); +#else + napi_gro_receive(&tp->r8126napi[ring_index].napi, skb); +#endif +#else + netif_rx(skb); +#endif +} + +static int +rtl8126_check_rx_desc_error(struct net_device *dev, + struct rtl8126_private *tp, + u32 status) +{ + int ret = 0; + + if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) { + if (unlikely(status & RxRES_V3)) { + if (status & (RxRWT_V3 | RxRUNT_V3)) + RTLDEV->stats.rx_length_errors++; + if (status & RxCRC_V3) + RTLDEV->stats.rx_crc_errors++; + + ret = -1; + } + } else { + if (unlikely(status & RxRES)) { + if (status & (RxRWT | RxRUNT)) + RTLDEV->stats.rx_length_errors++; + if (status & RxCRC) + RTLDEV->stats.rx_crc_errors++; + + ret = -1; + } + } + + return ret; +} + +#ifdef ENABLE_PAGE_REUSE + +static inline bool +rtl8126_reuse_rx_ok(struct page *page) +{ + /* avoid re-using remote pages */ + if (!dev_page_is_reusable(page)) { + //printk(KERN_INFO "r8126 page pfmemalloc, can't reuse!\n"); + return false; + } + /* if we are only owner of page we can reuse it */ + if (unlikely(page_ref_count(page) != 1)) { + //printk(KERN_INFO "r8126 page refcnt %d, can't reuse!\n", page_ref_count(page)); + return false; + } + + return true; +} + +static void +rtl8126_reuse_rx_buffer(struct rtl8126_private *tp, struct rtl8126_rx_ring *ring, u32 cur_rx, struct rtl8126_rx_buffer *rxb) +{ + struct page *page = rxb->page; + + u32 dirty_rx = ring->dirty_rx; + u32 entry = dirty_rx % ring->num_rx_desc; + struct rtl8126_rx_buffer *nrxb = &ring->rx_buffer[entry]; + + u32 noffset; + + //the page gonna be shared by us and kernel, keep page ref = 2 + page_ref_inc(page); + + //flip the buffer in page to use next + noffset = rxb->page_offset ^ (tp->rx_buf_page_size / 2); //one page, two buffer, ping-pong + + nrxb->dma = rxb->dma; + nrxb->page_offset = noffset; + nrxb->data = rxb->data; + + if (cur_rx != dirty_rx) { + //move the buffer to other slot + nrxb->page = page; + rxb->page = NULL; + } +} + +static void rtl8126_put_rx_buffer(struct rtl8126_private *tp, + struct rtl8126_rx_ring *ring, + u32 cur_rx, + struct rtl8126_rx_buffer *rxb) +{ + struct rtl8126_rx_buffer *nrxb; + struct page *page = rxb->page; + u32 entry; + + entry = ring->dirty_rx % ring->num_rx_desc; + nrxb = &ring->rx_buffer[entry]; + if (likely(rtl8126_reuse_rx_ok(page))) { + /* hand second half of page back to the ring */ + rtl8126_reuse_rx_buffer(tp, ring, cur_rx, rxb); + } else { + tp->page_reuse_fail_cnt++; + + dma_unmap_page_attrs(&tp->pci_dev->dev, rxb->dma, + tp->rx_buf_page_size, + DMA_FROM_DEVICE, + (DMA_ATTR_SKIP_CPU_SYNC | DMA_ATTR_WEAK_ORDERING)); + //the page ref is kept 1, uniquely owned by kernel now + rxb->page = NULL; + + return; + } + + dma_sync_single_range_for_device(tp_to_dev(tp), + nrxb->dma, + nrxb->page_offset, + tp->rx_buf_sz, + DMA_FROM_DEVICE); + + rtl8126_map_to_asic(tp, ring, + rtl8126_get_rxdesc(tp, ring->RxDescArray, entry), + nrxb->dma + nrxb->page_offset, + tp->rx_buf_sz, entry); + + ring->dirty_rx++; +} + +#endif //ENABLE_PAGE_REUSE + +static int +rtl8126_rx_interrupt(struct net_device *dev, + struct rtl8126_private *tp, + struct rtl8126_rx_ring *ring, + napi_budget budget) +{ + unsigned int cur_rx, rx_left; + unsigned int delta, count = 0; + unsigned int entry; + struct RxDesc *desc; + struct sk_buff *skb; + u32 status; + u32 rx_quota; + u32 ring_index = ring->index; +#ifdef ENABLE_PAGE_REUSE + struct rtl8126_rx_buffer *rxb; +#else //ENABLE_PAGE_REUSE + u64 rx_buf_phy_addr; +#endif //ENABLE_PAGE_REUSE + unsigned int total_rx_multicast_packets = 0; + unsigned int total_rx_bytes = 0, total_rx_packets = 0; + + assert(dev != NULL); + assert(tp != NULL); + + if (ring->RxDescArray == NULL) + goto rx_out; + + rx_quota = RTL_RX_QUOTA(budget); + cur_rx = ring->cur_rx; + rx_left = ring->num_rx_desc + ring->dirty_rx - cur_rx; + rx_left = rtl8126_rx_quota(rx_left, (u32)rx_quota); + + for (; rx_left > 0; rx_left--, cur_rx++) { +#ifdef ENABLE_PTP_SUPPORT + u8 desc_type = RXDESC_TYPE_NORMAL; + struct RxDescV3 ptp_desc; +#endif //ENABLE_PTP_SUPPORT +#ifndef ENABLE_PAGE_REUSE + const void *rx_buf; +#endif //!ENABLE_PAGE_REUSE + u32 pkt_size; + + entry = cur_rx % ring->num_rx_desc; + desc = rtl8126_get_rxdesc(tp, ring->RxDescArray, entry); + status = le32_to_cpu(rtl8126_rx_desc_opts1(tp, desc)); + + if (status & DescOwn) + break; + + rmb(); + + if (unlikely(rtl8126_check_rx_desc_error(dev, tp, status) < 0)) { + if (netif_msg_rx_err(tp)) { + printk(KERN_INFO + "%s: Rx ERROR. status = %08x\n", + dev->name, status); + } + + RTLDEV->stats.rx_errors++; + + if (!(dev->features & NETIF_F_RXALL)) + goto release_descriptor; + } + pkt_size = status & 0x00003fff; + if (likely(!(dev->features & NETIF_F_RXFCS))) { +#ifdef ENABLE_RX_PACKET_FRAGMENT + if (rtl8126_is_non_eop(tp, status) && + pkt_size == tp->rx_buf_sz) { + struct RxDesc *desc_next; + unsigned int entry_next; + int pkt_size_next; + u32 status_next; + + entry_next = (cur_rx + 1) % ring->num_rx_desc; + desc_next = rtl8126_get_rxdesc(tp, ring->RxDescArray, entry_next); + status_next = le32_to_cpu(rtl8126_rx_desc_opts1(tp, desc_next)); + if (!(status_next & DescOwn)) { + pkt_size_next = status_next & 0x00003fff; + if (pkt_size_next < ETH_FCS_LEN) + pkt_size -= (ETH_FCS_LEN - pkt_size_next); + } + } +#endif //ENABLE_RX_PACKET_FRAGMENT + if (!rtl8126_is_non_eop(tp, status)) { + if (pkt_size < ETH_FCS_LEN) { +#ifdef ENABLE_RX_PACKET_FRAGMENT + pkt_size = 0; +#else + goto drop_packet; +#endif //ENABLE_RX_PACKET_FRAGMENT + } else + pkt_size -= ETH_FCS_LEN; + } + } + + if (unlikely(pkt_size > tp->rx_buf_sz)) + goto drop_packet; + +#if !defined(ENABLE_RX_PACKET_FRAGMENT) || !defined(ENABLE_PAGE_REUSE) + /* + * The driver does not support incoming fragmented + * frames. They are seen as a symptom of over-mtu + * sized frames. + */ + if (unlikely(rtl8126_fragmented_frame(tp, status))) + goto drop_packet; +#endif //!ENABLE_RX_PACKET_FRAGMENT || !ENABLE_PAGE_REUSE + +#ifdef ENABLE_PTP_SUPPORT + if (tp->EnablePtp) { + desc_type = rtl8126_rx_desc_type(status); + if (desc_type == RXDESC_TYPE_NEXT && rx_left > 0) { + u32 status_next; + struct RxDescV3 *desc_next; + unsigned int entry_next; + + cur_rx++; + rx_left--; + entry_next = cur_rx % ring->num_rx_desc; + desc_next = (struct RxDescV3 *)rtl8126_get_rxdesc(tp, ring->RxDescArray, entry_next); + status_next = le32_to_cpu(desc_next->RxDescNormalDDWord4.opts1); + if (unlikely(status_next & DescOwn)) { + udelay(1); + status_next = le32_to_cpu(desc_next->RxDescNormalDDWord4.opts1); + if (unlikely(status_next & DescOwn)) { + if (netif_msg_rx_err(tp)) { + printk(KERN_ERR + "%s: Rx Next Desc ERROR. status = %08x\n", + dev->name, status_next); + } + rtl8126_set_desc_dma_addr(tp, (struct RxDesc *)desc_next, + ring->RxDescPhyAddr[entry_next]); + wmb(); + rtl8126_mark_to_asic(tp, (struct RxDesc *)desc_next, tp->rx_buf_sz); + goto drop_packet; + } + } + + rmb(); + + desc_type = rtl8126_rx_desc_type(status_next); + if (desc_type == RXDESC_TYPE_PTP) { + ptp_desc = *desc_next; + rmb(); + rtl8126_set_desc_dma_addr(tp, (struct RxDesc *)desc_next, + ring->RxDescPhyAddr[entry_next]); + wmb(); + rtl8126_mark_to_asic(tp, (struct RxDesc *)desc_next, tp->rx_buf_sz); + } else { + WARN_ON(1); + rtl8126_set_desc_dma_addr(tp, (struct RxDesc *)desc_next, + ring->RxDescPhyAddr[entry_next]); + wmb(); + rtl8126_mark_to_asic(tp, (struct RxDesc *)desc_next, tp->rx_buf_sz); + goto drop_packet; + } + } else + WARN_ON(desc_type != RXDESC_TYPE_NORMAL); + } +#endif +#ifdef ENABLE_PAGE_REUSE + rxb = &ring->rx_buffer[entry]; + skb = rxb->skb; + rxb->skb = NULL; + if (!skb) { + skb = RTL_BUILD_SKB_INTR(rxb->data + rxb->page_offset - ring->rx_offset, tp->rx_buf_page_size / 2); + if (!skb) { + //netdev_err(tp->dev, "Failed to allocate RX skb!\n"); + goto drop_packet; + } + + skb->dev = dev; + if (!R8126_USE_NAPI_ALLOC_SKB) + skb_reserve(skb, R8126_RX_ALIGN); + skb_put(skb, pkt_size); + } else + skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rxb->page, + rxb->page_offset, pkt_size, tp->rx_buf_page_size / 2); +#ifdef ENABLE_PTP_SUPPORT + if (desc_type == RXDESC_TYPE_PTP) + rtl8126_rx_ptp_pktstamp(tp, skb, &ptp_desc); +#endif //ENABLE_PTP_SUPPORT + //recycle desc + rtl8126_put_rx_buffer(tp, ring, cur_rx, rxb); + + dma_sync_single_range_for_cpu(tp_to_dev(tp), + rxb->dma, + rxb->page_offset, + tp->rx_buf_sz, + DMA_FROM_DEVICE); +#else //ENABLE_PAGE_REUSE + skb = RTL_ALLOC_SKB_INTR(&tp->r8126napi[ring->index].napi, pkt_size + R8126_RX_ALIGN); + if (!skb) { + //netdev_err(tp->dev, "Failed to allocate RX skb!\n"); + goto drop_packet; + } + + skb->dev = dev; + if (!R8126_USE_NAPI_ALLOC_SKB) + skb_reserve(skb, R8126_RX_ALIGN); + skb_put(skb, pkt_size); +#ifdef ENABLE_PTP_SUPPORT + if (desc_type == RXDESC_TYPE_PTP) + rtl8126_rx_ptp_pktstamp(tp, skb, &ptp_desc); +#endif //ENABLE_PTP_SUPPORT + rx_buf_phy_addr = ring->RxDescPhyAddr[entry]; + dma_sync_single_for_cpu(tp_to_dev(tp), + rx_buf_phy_addr, tp->rx_buf_sz, + DMA_FROM_DEVICE); + rx_buf = ring->Rx_skbuff[entry]->data; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,4,37) + prefetch(rx_buf - R8126_RX_ALIGN); +#endif + eth_copy_and_sum(skb, rx_buf, pkt_size, 0); + + dma_sync_single_for_device(tp_to_dev(tp), rx_buf_phy_addr, + tp->rx_buf_sz, DMA_FROM_DEVICE); +#endif //ENABLE_PAGE_REUSE + +#ifdef ENABLE_RX_PACKET_FRAGMENT + if (rtl8126_is_non_eop(tp, status)) { + unsigned int entry_next; + entry_next = (entry + 1) % ring->num_rx_desc; + rxb = &ring->rx_buffer[entry_next]; + rxb->skb = skb; + continue; + } +#endif //ENABLE_RX_PACKET_FRAGMENT + +#ifdef ENABLE_RSS_SUPPORT + rtl8126_rx_hash(tp, (struct RxDescV3 *)desc, skb); +#endif + rtl8126_rx_csum(tp, skb, desc, status); + + skb->protocol = eth_type_trans(skb, dev); + + total_rx_bytes += skb->len; + + if (skb->pkt_type == PACKET_MULTICAST) + total_rx_multicast_packets++; + + if (rtl8126_rx_vlan_skb(tp, desc, skb) < 0) + rtl8126_rx_skb(tp, skb, ring_index); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(4,11,0) + dev->last_rx = jiffies; +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(4,11,0) + total_rx_packets++; + +#ifdef ENABLE_PAGE_REUSE + rxb->skb = NULL; + continue; +#endif + +release_descriptor: + if (tp->InitRxDescType == RX_DESC_RING_TYPE_3) { + rtl8126_set_desc_dma_addr(tp, desc, + ring->RxDescPhyAddr[entry]); + wmb(); + } + rtl8126_mark_to_asic(tp, desc, tp->rx_buf_sz); + continue; +drop_packet: + RTLDEV->stats.rx_dropped++; + RTLDEV->stats.rx_length_errors++; + goto release_descriptor; + } + + count = cur_rx - ring->cur_rx; + ring->cur_rx = cur_rx; + + delta = rtl8126_rx_fill(tp, ring, dev, ring->dirty_rx, ring->cur_rx, 1); + if (!delta && count && netif_msg_intr(tp)) + printk(KERN_INFO "%s: no Rx buffer allocated\n", dev->name); + ring->dirty_rx += delta; + + RTLDEV->stats.rx_bytes += total_rx_bytes; + RTLDEV->stats.rx_packets += total_rx_packets; + RTLDEV->stats.multicast += total_rx_multicast_packets; + + /* + * FIXME: until there is periodic timer to try and refill the ring, + * a temporary shortage may definitely kill the Rx process. + * - disable the asic to try and avoid an overflow and kick it again + * after refill ? + * - how do others driver handle this condition (Uh oh...). + */ + if ((ring->dirty_rx + ring->num_rx_desc == ring->cur_rx) && netif_msg_intr(tp)) + printk(KERN_EMERG "%s: Rx buffers exhausted\n", dev->name); + +rx_out: + return total_rx_packets; +} + +static bool +rtl8126_linkchg_interrupt(struct rtl8126_private *tp, u32 status) +{ + switch (tp->HwCurrIsrVer) { + case 2: + case 3: + return status & ISRIMR_V2_LINKCHG; + case 4: + return status & ISRIMR_V4_LINKCHG; + case 5: + return status & ISRIMR_V5_LINKCHG; + default: + return status & LinkChg; + } +} + +static u32 +rtl8126_get_linkchg_message_id(struct rtl8126_private *tp) +{ + switch (tp->HwCurrIsrVer) { + case 4: + return 29; + case 5: + return 18; + default: + return 21; + } +} + +/* + *The interrupt handler does all of the Rx thread work and cleans up after + *the Tx thread. + */ +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) +static irqreturn_t rtl8126_interrupt(int irq, void *dev_instance, struct pt_regs *regs) +#else +static irqreturn_t rtl8126_interrupt(int irq, void *dev_instance) +#endif +{ + struct r8126_napi *r8126napi = dev_instance; + struct rtl8126_private *tp = r8126napi->priv; + struct net_device *dev = tp->dev; + u32 status; + int handled = 0; + + do { + status = RTL_R32(tp, tp->isr_reg[0]); + + if (!(tp->features & (RTL_FEATURE_MSI | RTL_FEATURE_MSIX))) { + /* hotplug/major error/no more work/shared irq */ + if (!status) + break; + + if (status == 0xFFFFFFFF) + break; + + if (!(status & (tp->intr_mask | tp->timer_intr_mask))) + break; + } + + handled = 1; + +#if defined(RTL_USE_NEW_INTR_API) + if (!tp->irq_tbl[0].requested) + break; +#endif + rtl8126_disable_hw_interrupt(tp); + + RTL_W32(tp, tp->isr_reg[0], status&~RxFIFOOver); + + if (rtl8126_linkchg_interrupt(tp, status)) + rtl8126_schedule_linkchg_work(tp); + +#ifdef ENABLE_DASH_SUPPORT + if (tp->DASH) { + if (HW_DASH_SUPPORT_TYPE_3(tp)) { + u8 DashIntType2Status; + + if (status & ISRIMR_DASH_INTR_CMAC_RESET) + tp->CmacResetIntr = TRUE; + + DashIntType2Status = RTL_CMAC_R8(tp, CMAC_IBISR0); + if (DashIntType2Status & ISRIMR_DASH_TYPE2_ROK) { + tp->RcvFwDashOkEvt = TRUE; + } + if (DashIntType2Status & ISRIMR_DASH_TYPE2_TOK) { + tp->SendFwHostOkEvt = TRUE; + } + if (DashIntType2Status & ISRIMR_DASH_TYPE2_RX_DISABLE_IDLE) { + tp->DashFwDisableRx = TRUE; + } + + RTL_CMAC_W8(tp, CMAC_IBISR0, DashIntType2Status); + } + } +#endif + +#ifdef CONFIG_R8126_NAPI + if (status & tp->intr_mask || tp->keep_intr_cnt-- > 0) { + if (status & tp->intr_mask) + tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT; + + if (likely(RTL_NETIF_RX_SCHEDULE_PREP(dev, &tp->r8126napi[0].napi))) + __RTL_NETIF_RX_SCHEDULE(dev, &tp->r8126napi[0].napi); + else if (netif_msg_intr(tp)) + printk(KERN_INFO "%s: interrupt %04x in poll\n", + dev->name, status); + } else { + tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT; + rtl8126_switch_to_hw_interrupt(tp); + } +#else + if (status & tp->intr_mask || tp->keep_intr_cnt-- > 0) { + u32 budget = ~(u32)0; + int i; + + if (status & tp->intr_mask) + tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT; + + for (i = 0; i < tp->num_tx_rings; i++) + rtl8126_tx_interrupt(&tp->tx_ring[i], ~(u32)0); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) + rtl8126_rx_interrupt(dev, tp, &tp->rx_ring[0], &budget); +#else + rtl8126_rx_interrupt(dev, tp, &tp->rx_ring[0], budget); +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) + +#ifdef ENABLE_DASH_SUPPORT + if (tp->DASH) { + struct net_device *dev = tp->dev; + + HandleDashInterrupt(dev); + } +#endif + + rtl8126_switch_to_timer_interrupt(tp); + } else { + tp->keep_intr_cnt = RTK_KEEP_INTERRUPT_COUNT; + rtl8126_switch_to_hw_interrupt(tp); + } +#endif + } while (false); + + return IRQ_RETVAL(handled); +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,19) +static irqreturn_t rtl8126_interrupt_msix(int irq, void *dev_instance, struct pt_regs *regs) +#else +static irqreturn_t rtl8126_interrupt_msix(int irq, void *dev_instance) +#endif +{ + struct r8126_napi *r8126napi = dev_instance; + struct rtl8126_private *tp = r8126napi->priv; + struct net_device *dev = tp->dev; + int message_id = r8126napi->index; +#ifndef CONFIG_R8126_NAPI + u32 budget = ~(u32)0; +#endif + + do { +#if defined(RTL_USE_NEW_INTR_API) + if (!tp->irq_tbl[message_id].requested) + break; +#endif + //link change + if (message_id == rtl8126_get_linkchg_message_id(tp)) { + rtl8126_disable_hw_interrupt_v2(tp, message_id); + rtl8126_clear_hw_isr_v2(tp, message_id); + rtl8126_schedule_linkchg_work(tp); + break; + } + +#ifdef CONFIG_R8126_NAPI + if (likely(RTL_NETIF_RX_SCHEDULE_PREP(dev, &r8126napi->napi))) { + rtl8126_disable_hw_interrupt_v2(tp, message_id); + __RTL_NETIF_RX_SCHEDULE(dev, &r8126napi->napi); + } else if (netif_msg_intr(tp)) + printk(KERN_INFO "%s: interrupt message id %d in poll_msix\n", + dev->name, message_id); + rtl8126_clear_hw_isr_v2(tp, message_id); +#else + rtl8126_tx_interrupt_with_vector(tp, message_id, ~(u32)0); + + if (message_id < tp->num_rx_rings) { +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) + rtl8126_rx_interrupt(dev, tp, &tp->rx_ring[message_id], &budget); +#else + rtl8126_rx_interrupt(dev, tp, &tp->rx_ring[message_id], budget); +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(2,6,24) + } + + rtl8126_enable_hw_interrupt_v2(tp, message_id); +#endif + + } while (false); + + return IRQ_HANDLED; +} + +static void rtl8126_down(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + //rtl8126_delete_esd_timer(dev, &tp->esd_timer); + + //rtl8126_delete_link_timer(dev, &tp->link_timer); + + netif_carrier_off(dev); + + netif_tx_disable(dev); + + _rtl8126_wait_for_quiescence(dev); + + rtl8126_hw_reset(dev); + + rtl8126_tx_clear(tp); + + rtl8126_rx_clear(tp); +} + +static int rtl8126_resource_freed(struct rtl8126_private *tp) +{ + int i; + + for (i = 0; i < tp->num_tx_rings; i++) + if (tp->tx_ring[i].TxDescArray) + return 0; + + for (i = 0; i < tp->num_rx_rings; i++) + if (tp->rx_ring[i].RxDescArray) + return 0; + + return 1; +} + +int rtl8126_close(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + if (!rtl8126_resource_freed(tp)) { + set_bit(R8126_FLAG_DOWN, tp->task_flags); + + rtl8126_down(dev); + + pci_clear_master(tp->pci_dev); + +#ifdef ENABLE_PTP_SUPPORT + rtl8126_ptp_stop(tp); +#endif + rtl8126_hw_d3_para(dev); + + rtl8126_powerdown_pll(dev, 0); + + rtl8126_free_irq(tp); + + rtl8126_free_alloc_resources(tp); + } else { + rtl8126_hw_d3_para(dev); + + rtl8126_powerdown_pll(dev, 0); + } + + return 0; +} + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,11) +static void rtl8126_shutdown(struct pci_dev *pdev) +{ + struct net_device *dev = pci_get_drvdata(pdev); + struct rtl8126_private *tp = netdev_priv(dev); + + rtnl_lock(); + + if (HW_DASH_SUPPORT_DASH(tp)) + rtl8126_driver_stop(tp); + + if (s5_keep_curr_mac == 0 && tp->random_mac == 0) + rtl8126_rar_set(tp, tp->org_mac_addr); + + if (s5wol == 0) + tp->wol_enabled = WOL_DISABLED; + + rtl8126_close(dev); + rtl8126_disable_msi(pdev, tp); + + rtnl_unlock(); + + if (system_state == SYSTEM_POWER_OFF) { + pci_clear_master(tp->pci_dev); + pci_wake_from_d3(pdev, tp->wol_enabled); + pci_set_power_state(pdev, PCI_D3hot); + } +} +#endif + +#ifdef CONFIG_PM + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,11) +static int +rtl8126_suspend(struct pci_dev *pdev, u32 state) +#elif LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) +static int +rtl8126_suspend(struct device *device) +#else +static int +rtl8126_suspend(struct pci_dev *pdev, pm_message_t state) +#endif +{ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) + struct pci_dev *pdev = to_pci_dev(device); + struct net_device *dev = pci_get_drvdata(pdev); +#else + struct net_device *dev = pci_get_drvdata(pdev); +#endif + struct rtl8126_private *tp = netdev_priv(dev); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) + u32 pci_pm_state = pci_choose_state(pdev, state); +#endif + if (!netif_running(dev)) + goto out; + + //rtl8126_cancel_all_schedule_work(tp); + + //rtl8126_delete_esd_timer(dev, &tp->esd_timer); + + //rtl8126_delete_link_timer(dev, &tp->link_timer); + + rtnl_lock(); + + set_bit(R8126_FLAG_DOWN, tp->task_flags); + + netif_carrier_off(dev); + + netif_tx_disable(dev); + + netif_device_detach(dev); + +#ifdef ENABLE_PTP_SUPPORT + rtl8126_ptp_suspend(tp); +#endif + rtl8126_hw_reset(dev); + + pci_clear_master(pdev); + + rtl8126_hw_d3_para(dev); + + rtl8126_powerdown_pll(dev, 1); + + if (HW_DASH_SUPPORT_DASH(tp)) + rtl8126_driver_stop(tp); + + rtnl_unlock(); +out: + + pci_disable_device(pdev); + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) + pci_save_state(pdev, &pci_pm_state); +#else + pci_save_state(pdev); +#endif +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29) + pci_enable_wake(pdev, pci_choose_state(pdev, state), tp->wol_enabled); +#endif + + pci_prepare_to_sleep(pdev); + + return 0; +} + +static int +rtl8126_hw_d3_not_power_off(struct net_device *dev) +{ + return rtl8126_check_hw_phy_mcu_code_ver(dev); +} + +static int rtl8126_wait_phy_nway_complete_sleep(struct rtl8126_private *tp) +{ + int i, val; + + for (i = 0; i < 30; i++) { + val = rtl8126_mdio_read(tp, MII_BMSR) & BMSR_ANEGCOMPLETE; + if (val) + return 0; + + msleep(100); + } + + return -1; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29) +static int +rtl8126_resume(struct pci_dev *pdev) +#else +static int +rtl8126_resume(struct device *device) +#endif +{ +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) + struct pci_dev *pdev = to_pci_dev(device); + struct net_device *dev = pci_get_drvdata(pdev); +#else + struct net_device *dev = pci_get_drvdata(pdev); +#endif + struct rtl8126_private *tp = netdev_priv(dev); +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) + u32 pci_pm_state = PCI_D0; +#endif + u32 err; + + rtnl_lock(); + + err = pci_enable_device(pdev); + if (err) { + dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n"); + goto out_unlock; + } +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,10) + pci_restore_state(pdev, &pci_pm_state); +#else + pci_restore_state(pdev); +#endif + pci_enable_wake(pdev, PCI_D0, 0); + + /* restore last modified mac address */ + rtl8126_rar_set(tp, dev->dev_addr); + + tp->resume_not_chg_speed = 0; + if (tp->check_keep_link_speed && + //tp->link_ok(dev) && + rtl8126_hw_d3_not_power_off(dev) && + rtl8126_wait_phy_nway_complete_sleep(tp) == 0) + tp->resume_not_chg_speed = 1; + + if (!netif_running(dev)) + goto out_unlock; + + pci_set_master(pdev); + + rtl8126_exit_oob(dev); + + rtl8126_up(dev); + + clear_bit(R8126_FLAG_DOWN, tp->task_flags); + + rtl8126_schedule_reset_work(tp); + + rtl8126_schedule_esd_work(tp); + + //mod_timer(&tp->esd_timer, jiffies + RTL8126_ESD_TIMEOUT); + //mod_timer(&tp->link_timer, jiffies + RTL8126_LINK_TIMEOUT); +out_unlock: + netif_device_attach(dev); + + rtnl_unlock(); + + return err; +} + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,29) + +static struct dev_pm_ops rtl8126_pm_ops = { + .suspend = rtl8126_suspend, + .resume = rtl8126_resume, + .freeze = rtl8126_suspend, + .thaw = rtl8126_resume, + .poweroff = rtl8126_suspend, + .restore = rtl8126_resume, +}; + +#define RTL8126_PM_OPS (&rtl8126_pm_ops) + +#endif + +#else /* !CONFIG_PM */ + +#define RTL8126_PM_OPS NULL + +#endif /* CONFIG_PM */ + +static struct pci_driver rtl8126_pci_driver = { + .name = MODULENAME, + .id_table = rtl8126_pci_tbl, + .probe = rtl8126_init_one, + .remove = __devexit_p(rtl8126_remove_one), +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,11) + .shutdown = rtl8126_shutdown, +#endif +#ifdef CONFIG_PM +#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,29) + .suspend = rtl8126_suspend, + .resume = rtl8126_resume, +#else + .driver.pm = RTL8126_PM_OPS, +#endif +#endif +}; + +static int __init +rtl8126_init_module(void) +{ + int ret = 0; +#ifdef ENABLE_R8126_PROCFS + rtl8126_proc_module_init(); +#endif + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,0) + + ret = pci_register_driver(&rtl8126_pci_driver); +#else + ret = pci_module_init(&rtl8126_pci_driver); +#endif + + return ret; +} + +static void __exit +rtl8126_cleanup_module(void) +{ + pci_unregister_driver(&rtl8126_pci_driver); + +#ifdef ENABLE_R8126_PROCFS + if (rtl8126_proc) { +#if LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) + remove_proc_subtree(MODULENAME, init_net.proc_net); +#else +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32) + remove_proc_entry(MODULENAME, init_net.proc_net); +#else + remove_proc_entry(MODULENAME, proc_net); +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,32) +#endif //LINUX_VERSION_CODE >= KERNEL_VERSION(3,10,0) + rtl8126_proc = NULL; + } +#endif +} + +module_init(rtl8126_init_module); +module_exit(rtl8126_cleanup_module); diff --git a/package/lean/r8126/src/r8126_ptp.c b/package/lean/r8126/src/r8126_ptp.c new file mode 100644 index 000000000..8743f5e62 --- /dev/null +++ b/package/lean/r8126/src/r8126_ptp.c @@ -0,0 +1,619 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* +################################################################################ +# +# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see . +# +# Author: +# Realtek NIC software team +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ +*/ + +/************************************************************************************ + * This product is covered by one or more of the following patents: + * US6,570,884, US6,115,776, and US6,327,625. + ***********************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "r8126.h" +#include "r8126_ptp.h" + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) +static inline struct timespec timespec64_to_timespec(const struct timespec64 ts64) +{ + return *(const struct timespec *)&ts64; +} + +static inline struct timespec64 timespec_to_timespec64(const struct timespec ts) +{ + return *(const struct timespec64 *)&ts; +} +#endif + +static int _rtl8126_phc_gettime(struct rtl8126_private *tp, struct timespec64 *ts64) +{ + //get local time + RTL_W16(tp, PTP_TIME_CORRECT_CMD_8125, (PTP_CMD_LATCHED_LOCAL_TIME | PTP_EXEC_CMD)); + + /* nanoseconds */ + //0x6808[29:0] + ts64->tv_nsec = (RTL_R32(tp, PTP_SOFT_CONFIG_Time_NS_8125) & 0x3fffffff); + + /* seconds */ + //0x680C[47:0] + ts64->tv_sec = RTL_R16(tp, PTP_SOFT_CONFIG_Time_S_8125 + 4); + ts64->tv_sec <<= 32; + ts64->tv_sec |= RTL_R32(tp, PTP_SOFT_CONFIG_Time_S_8125); + + return 0; +} + +static int _rtl8126_phc_settime(struct rtl8126_private *tp, const struct timespec64 *ts64) +{ + /* nanoseconds */ + //0x6808[29:0] + RTL_W32(tp, PTP_SOFT_CONFIG_Time_NS_8125, (ts64->tv_nsec & 0x3fffffff)); + + /* seconds */ + //0x680C[47:0] + RTL_W32(tp, PTP_SOFT_CONFIG_Time_S_8125, ts64->tv_sec); + RTL_W16(tp, PTP_SOFT_CONFIG_Time_S_8125 + 4, (ts64->tv_sec >> 32)); + + //set local time + RTL_W16(tp, PTP_TIME_CORRECT_CMD_8125, (PTP_CMD_SET_LOCAL_TIME | PTP_EXEC_CMD)); + + return 0; +} + +static int _rtl8126_phc_adjtime(struct rtl8126_private *tp, s64 delta) +{ + struct timespec64 d; + bool negative = false; + u64 tohw; + u32 nsec; + u64 sec; + + if (delta < 0) { + negative = true; + tohw = -delta; + } else { + tohw = delta; + } + + d = ns_to_timespec64(tohw); + + nsec = d.tv_nsec; + sec = d.tv_sec; + + if (negative) { + nsec = -nsec; + sec = -sec; + } + + nsec &= 0x3fffffff; + sec &= 0x0000ffffffffffff; + + if (negative) { + nsec |= PTP_SOFT_CONFIG_TIME_NS_NEGATIVE; + sec |= PTP_SOFT_CONFIG_TIME_S_NEGATIVE; + } + + /* nanoseconds */ + //0x6808[29:0] + RTL_W32(tp, PTP_SOFT_CONFIG_Time_NS_8125, nsec); + + /* seconds */ + //0x680C[47:0] + RTL_W32(tp, PTP_SOFT_CONFIG_Time_S_8125, sec); + RTL_W16(tp, PTP_SOFT_CONFIG_Time_S_8125 + 4, (sec >> 32)); + + //adjust local time + //RTL_W16(tp, PTP_TIME_CORRECT_CMD_8125, (PTP_CMD_DRIFT_LOCAL_TIME | PTP_EXEC_CMD)); + RTL_W16(tp, PTP_TIME_CORRECT_CMD_8125, (PTP_CMD_SET_LOCAL_TIME | PTP_EXEC_CMD)); + + return 0; +} + +static int rtl8126_phc_adjtime(struct ptp_clock_info *ptp, s64 delta) +{ + struct rtl8126_private *tp = container_of(ptp, struct rtl8126_private, ptp_clock_info); + int ret; + + //netif_info(tp, drv, tp->dev, "phc adjust time\n"); + + rtnl_lock(); + ret = _rtl8126_phc_adjtime(tp, delta); + rtnl_unlock(); + + return ret; +} + +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,2,0) +/* +1ppm means every 125MHz plus 125Hz. It also means every 8ns minus 8ns*10^(-6) + +1ns=2^30 sub_ns + +8ns*10^(-6) = 8 * 2^30 sub_ns * 10^(-6) = 2^33 sub_ns * 10^(-6) = 8590 = 0x218E sub_ns + +1ppb means every 125MHz plus 0.125Hz. It also means every 8ns minus 8ns*10^(-9) + +1ns=2^30 sub_ns + +8ns*10^(-9) = 8 * 2^30 sub_ns * 10^(-9) = 2^33 sub_ns * 10^(-9) = 8.59 sub_ns = 9 sub_ns +*/ +static int _rtl8126_phc_adjfreq(struct ptp_clock_info *ptp, s32 ppb) +{ + struct rtl8126_private *tp = container_of(ptp, struct rtl8126_private, ptp_clock_info); + bool negative = false; + u32 sub_ns; + + if (ppb < 0) { + negative = true; + ppb = -ppb; + } + + sub_ns = ppb * 9; + if (negative) { + sub_ns = -sub_ns; + sub_ns &= 0x3fffffff; + sub_ns |= PTP_ADJUST_TIME_NS_NEGATIVE; + } else + sub_ns &= 0x3fffffff; + + /* nanoseconds */ + //0x6808[29:0] + RTL_W32(tp, PTP_SOFT_CONFIG_Time_NS_8125, sub_ns); + + //adjust local time + RTL_W16(tp, PTP_TIME_CORRECT_CMD_8125, (PTP_CMD_DRIFT_LOCAL_TIME | PTP_EXEC_CMD)); + //RTL_W16(tp, PTP_TIME_CORRECT_CMD_8125, (PTP_CMD_SET_LOCAL_TIME | PTP_EXEC_CMD)); + + return 0; +} + +static int rtl8126_phc_adjfreq(struct ptp_clock_info *ptp, s32 delta) +{ + //struct rtl8126_private *tp = container_of(ptp, struct rtl8126_private, ptp_clock_info); + + //netif_info(tp, drv, tp->dev, "phc adjust freq\n"); + + if (delta > ptp->max_adj || delta < -ptp->max_adj) + return -EINVAL; + + _rtl8126_phc_adjfreq(ptp, delta); + + return 0; +} +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(6,2,0) + +static int rtl8126_phc_gettime(struct ptp_clock_info *ptp, struct timespec64 *ts64) +{ + struct rtl8126_private *tp = container_of(ptp, struct rtl8126_private, ptp_clock_info); + int ret; + + //netif_info(tp, drv, tp->dev, "phc get ts\n"); + + rtnl_lock(); + ret = _rtl8126_phc_gettime(tp, ts64); + rtnl_unlock(); + + return ret; +} + +static int rtl8126_phc_settime(struct ptp_clock_info *ptp, + const struct timespec64 *ts64) +{ + struct rtl8126_private *tp = container_of(ptp, struct rtl8126_private, ptp_clock_info); + int ret; + + //netif_info(tp, drv, tp->dev, "phc set ts\n"); + + rtnl_lock(); + ret = _rtl8126_phc_settime(tp, ts64); + rtnl_unlock(); + + return ret; +} + +static int rtl8126_phc_enable(struct ptp_clock_info *ptp, + struct ptp_clock_request *rq, int on) +{ + struct rtl8126_private *tp = container_of(ptp, struct rtl8126_private, ptp_clock_info); + u16 ptp_ctrl; + + //netif_info(tp, drv, tp->dev, "phc enable type %x on %d\n", rq->type, on); + + switch (rq->type) { + case PTP_CLK_REQ_PPS: + rtnl_lock(); + ptp_ctrl = RTL_R16(tp, PTP_CTRL_8125); + ptp_ctrl &= ~BIT_15; + if (on) + ptp_ctrl |= BIT_14; + else + ptp_ctrl &= ~BIT_14; + RTL_W16(tp, PTP_CTRL_8125, ptp_ctrl); + rtnl_unlock(); + return 0; + default: + return -EOPNOTSUPP; + } +} + +int rtl8126_get_ts_info(struct net_device *netdev, + struct ethtool_ts_info *info) +{ + struct rtl8126_private *tp = netdev_priv(netdev); + + /* we always support timestamping disabled */ + info->rx_filters = BIT(HWTSTAMP_FILTER_NONE); + + if (tp->HwSuppPtpVer == 0) + return ethtool_op_get_ts_info(netdev, info); + + info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE | + SOF_TIMESTAMPING_RX_SOFTWARE | + SOF_TIMESTAMPING_SOFTWARE | + SOF_TIMESTAMPING_TX_HARDWARE | + SOF_TIMESTAMPING_RX_HARDWARE | + SOF_TIMESTAMPING_RAW_HARDWARE; + + if (tp->ptp_clock) + info->phc_index = ptp_clock_index(tp->ptp_clock); + else + info->phc_index = -1; + + info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON); + + info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) | + BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) | + BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) | + BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) | + BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) | + BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) | + BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ); + + return 0; +} + +static const struct ptp_clock_info rtl_ptp_clock_info = { + .owner = THIS_MODULE, + .n_alarm = 0, + .n_ext_ts = 0, + .n_per_out = 0, + .n_pins = 0, + .pps = 1, +#if LINUX_VERSION_CODE < KERNEL_VERSION(6,2,0) + .adjfreq = rtl8126_phc_adjfreq, +#endif //LINUX_VERSION_CODE < KERNEL_VERSION(6,2,0) + .adjtime = rtl8126_phc_adjtime, + .gettime64 = rtl8126_phc_gettime, + .settime64 = rtl8126_phc_settime, + .enable = rtl8126_phc_enable, +}; + +static int rtl8126_ptp_egresstime(struct rtl8126_private *tp, struct timespec64 *ts64, u32 regnum) +{ + /* nanoseconds */ + //[29:0] + ts64->tv_nsec = rtl8126_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_NS_8125 + regnum * 16 + 2); + ts64->tv_nsec <<= 16; + ts64->tv_nsec |= rtl8126_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_NS_8125 + regnum * 16); + ts64->tv_nsec &= 0x3fffffff; + + /* seconds */ + //[47:0] + ts64->tv_sec = rtl8126_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_S_8125 + regnum * 16 + 4); + ts64->tv_sec <<= 16; + ts64->tv_sec |= rtl8126_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_S_8125 + regnum * 16 + 2); + ts64->tv_sec <<= 16; + ts64->tv_sec |= rtl8126_mac_ocp_read(tp, PTP_EGRESS_TIME_BASE_S_8125 + regnum * 16); + ts64->tv_sec &= 0x0000ffffffffffff; + + return 0; +} + +static void rtl8126_ptp_tx_hwtstamp(struct rtl8126_private *tp) +{ + struct sk_buff *skb = tp->ptp_tx_skb; + struct skb_shared_hwtstamps shhwtstamps = {0}; + struct timespec64 ts64; + u32 regnum; + + RTL_W8(tp, PTP_ISR_8125, PTP_ISR_TOK | PTP_ISR_TER); + + //IO 0x2302 bit 10~11 WR_PTR + regnum = RTL_R16(tp, 0x2032) & 0x0C00; + regnum >>= 10; + regnum = (regnum + 3) % 4; + + rtnl_lock(); + rtl8126_ptp_egresstime(tp, &ts64, regnum); + rtnl_unlock(); + + /* Upper 32 bits contain s, lower 32 bits contain ns. */ + shhwtstamps.hwtstamp = ktime_set(ts64.tv_sec, + ts64.tv_nsec); + + /* Clear the lock early before calling skb_tstamp_tx so that + * applications are not woken up before the lock bit is clear. We use + * a copy of the skb pointer to ensure other threads can't change it + * while we're notifying the stack. + */ + tp->ptp_tx_skb = NULL; + clear_bit_unlock(__RTL8126_PTP_TX_IN_PROGRESS, &tp->state); + + /* Notify the stack and free the skb after we've unlocked */ + skb_tstamp_tx(skb, &shhwtstamps); + dev_kfree_skb_any(skb); +} + +#define RTL8126_PTP_TX_TIMEOUT (HZ * 15) +static void rtl8126_ptp_tx_work(struct work_struct *work) +{ + struct rtl8126_private *tp = container_of(work, struct rtl8126_private, + ptp_tx_work); + + if (!tp->ptp_tx_skb) + return; + + if (time_is_before_jiffies(tp->ptp_tx_start + + RTL8126_PTP_TX_TIMEOUT)) { + dev_kfree_skb_any(tp->ptp_tx_skb); + tp->ptp_tx_skb = NULL; + clear_bit_unlock(__RTL8126_PTP_TX_IN_PROGRESS, &tp->state); + tp->tx_hwtstamp_timeouts++; + /* Clear the tx valid bit in TSYNCTXCTL register to enable + * interrupt + */ + RTL_W8(tp, PTP_ISR_8125, PTP_ISR_TOK | PTP_ISR_TER); + return; + } + + if (RTL_R8(tp, PTP_ISR_8125) & (PTP_ISR_TOK)) + rtl8126_ptp_tx_hwtstamp(tp); + else + /* reschedule to check later */ + schedule_work(&tp->ptp_tx_work); + +} + +static int rtl8126_hwtstamp_enable(struct rtl8126_private *tp, bool enable) +{ + RTL_W16(tp, PTP_CTRL_8125, 0); + if (enable) { + u16 ptp_ctrl; + struct timespec64 ts64; + + //clear ptp isr + RTL_W8(tp, PTP_ISR_8125, 0xff); + //ptp source 0:gphy 1:mac + rtl8126_mac_ocp_write(tp, 0xDC00, rtl8126_mac_ocp_read(tp, 0xDC00) | BIT_6); + //enable ptp + ptp_ctrl = (BIT_0 | BIT_3 | BIT_4 | BIT_6 | BIT_10 | BIT_12); + if (tp->ptp_master_mode) + ptp_ctrl |= BIT_1; + RTL_W16(tp, PTP_CTRL_8125, ptp_ctrl); + + //set system time + /* + if (ktime_to_timespec64_cond(ktime_get_real(), &ts64)) + _rtl8126_phc_settime(tp, timespec64_to_timespec(ts64)); + */ + ktime_get_real_ts64(&ts64); + _rtl8126_phc_settime(tp, &ts64); + } + + return 0; +} + +static long rtl8126_ptp_create_clock(struct rtl8126_private *tp) +{ + struct net_device *netdev = tp->dev; + long err; + + if (!IS_ERR_OR_NULL(tp->ptp_clock)) + return 0; + + if (tp->HwSuppPtpVer == 0) { + tp->ptp_clock = NULL; + return -EOPNOTSUPP; + } + + tp->ptp_clock_info = rtl_ptp_clock_info; + snprintf(tp->ptp_clock_info.name, sizeof(tp->ptp_clock_info.name), + "%pm", tp->dev->dev_addr); + tp->ptp_clock_info.max_adj = 119304647; + tp->ptp_clock = ptp_clock_register(&tp->ptp_clock_info, &tp->pci_dev->dev); + if (IS_ERR(tp->ptp_clock)) { + err = PTR_ERR(tp->ptp_clock); + tp->ptp_clock = NULL; + netif_err(tp, drv, tp->dev, "ptp_clock_register failed\n"); + return err; + } else + netif_info(tp, drv, tp->dev, "registered PHC device on %s\n", netdev->name); + + return 0; +} + +void rtl8126_ptp_reset(struct rtl8126_private *tp) +{ + if (!tp->ptp_clock) + return; + + netif_info(tp, drv, tp->dev, "reset PHC clock\n"); + + rtl8126_hwtstamp_enable(tp, false); +} + +void rtl8126_ptp_init(struct rtl8126_private *tp) +{ + /* obtain a PTP device, or re-use an existing device */ + if (rtl8126_ptp_create_clock(tp)) + return; + + /* we have a clock so we can initialize work now */ + INIT_WORK(&tp->ptp_tx_work, rtl8126_ptp_tx_work); + + /* reset the PTP related hardware bits */ + rtl8126_ptp_reset(tp); + + return; +} + +void rtl8126_ptp_suspend(struct rtl8126_private *tp) +{ + if (!tp->ptp_clock) + return; + + netif_info(tp, drv, tp->dev, "suspend PHC clock\n"); + + rtl8126_hwtstamp_enable(tp, false); + + /* ensure that we cancel any pending PTP Tx work item in progress */ + cancel_work_sync(&tp->ptp_tx_work); +} + +void rtl8126_ptp_stop(struct rtl8126_private *tp) +{ + struct net_device *netdev = tp->dev; + + netif_info(tp, drv, tp->dev, "stop PHC clock\n"); + + /* first, suspend PTP activity */ + rtl8126_ptp_suspend(tp); + + /* disable the PTP clock device */ + if (tp->ptp_clock) { + ptp_clock_unregister(tp->ptp_clock); + tp->ptp_clock = NULL; + netif_info(tp, drv, tp->dev, "removed PHC on %s\n", + netdev->name); + } +} + +static int rtl8126_set_tstamp(struct net_device *netdev, struct ifreq *ifr) +{ + struct rtl8126_private *tp = netdev_priv(netdev); + struct hwtstamp_config config; + bool hwtstamp = 0; + + //netif_info(tp, drv, tp->dev, "ptp set ts\n"); + + if (copy_from_user(&config, ifr->ifr_data, sizeof(config))) + return -EFAULT; + + if (config.flags) + return -EINVAL; + + switch (config.tx_type) { + case HWTSTAMP_TX_ON: + hwtstamp = 1; + case HWTSTAMP_TX_OFF: + break; + case HWTSTAMP_TX_ONESTEP_SYNC: + default: + return -ERANGE; + } + + switch (config.rx_filter) { + case HWTSTAMP_FILTER_PTP_V2_EVENT: + case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: + case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: + case HWTSTAMP_FILTER_PTP_V2_SYNC: + case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: + case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: + case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: + case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: + case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: + config.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; + hwtstamp = 1; + case HWTSTAMP_FILTER_NONE: + break; + default: + return -ERANGE; + } + + if (tp->hwtstamp_config.tx_type != config.tx_type || + tp->hwtstamp_config.rx_filter != config.rx_filter) { + tp->hwtstamp_config = config; + rtl8126_hwtstamp_enable(tp, hwtstamp); + } + + return copy_to_user(ifr->ifr_data, &config, + sizeof(config)) ? -EFAULT : 0; +} + +static int rtl8126_get_tstamp(struct net_device *netdev, struct ifreq *ifr) +{ + struct rtl8126_private *tp = netdev_priv(netdev); + + //netif_info(tp, drv, tp->dev, "ptp get ts\n"); + + return copy_to_user(ifr->ifr_data, &tp->hwtstamp_config, + sizeof(tp->hwtstamp_config)) ? -EFAULT : 0; +} + +int rtl8126_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd) +{ + int ret; + + //netif_info(tp, drv, tp->dev, "ptp ioctl\n"); + + switch (cmd) { +#ifdef ENABLE_PTP_SUPPORT + case SIOCSHWTSTAMP: + ret = rtl8126_set_tstamp(netdev, ifr); + break; + case SIOCGHWTSTAMP: + ret = rtl8126_get_tstamp(netdev, ifr); + break; +#endif + default: + ret = -EOPNOTSUPP; + break; + } + + return ret; +} + +void rtl8126_rx_ptp_pktstamp(struct rtl8126_private *tp, struct sk_buff *skb, + struct RxDescV3 *descv3) +{ + time64_t tv_sec; + long tv_nsec; + + tv_sec = le32_to_cpu(descv3->RxDescTimeStamp.TimeStampHigh) + + ((u64)le32_to_cpu(descv3->RxDescPTPDDWord4.TimeStampHHigh) << 32); + tv_nsec = le32_to_cpu(descv3->RxDescTimeStamp.TimeStampLow); + + skb_hwtstamps(skb)->hwtstamp = ktime_set(tv_sec, tv_nsec); +} diff --git a/package/lean/r8126/src/r8126_ptp.h b/package/lean/r8126/src/r8126_ptp.h new file mode 100644 index 000000000..37b72b0df --- /dev/null +++ b/package/lean/r8126/src/r8126_ptp.h @@ -0,0 +1,81 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* +################################################################################ +# +# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see . +# +# Author: +# Realtek NIC software team +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ +*/ + +/************************************************************************************ + * This product is covered by one or more of the following patents: + * US6,570,884, US6,115,776, and US6,327,625. + ***********************************************************************************/ + +#ifndef _LINUX_R8126_PTP_H +#define _LINUX_R8126_PTP_H + +#include +#include +#include +#include +#include + +struct rtl8126_ptp_info { + s64 time_sec; + u32 time_ns; + u16 ts_info; +}; + +#ifndef _STRUCT_TIMESPEC +#define _STRUCT_TIMESPEC +struct timespec { + __kernel_old_time_t tv_sec; /* seconds */ + long tv_nsec; /* nanoseconds */ +}; +#endif + +enum PTP_CMD_TYPE { + PTP_CMD_SET_LOCAL_TIME = 0, + PTP_CMD_DRIFT_LOCAL_TIME, + PTP_CMD_LATCHED_LOCAL_TIME, +}; + + +struct rtl8126_private; +struct RxDescV3; + +int rtl8126_get_ts_info(struct net_device *netdev, + struct ethtool_ts_info *info); + +void rtl8126_ptp_reset(struct rtl8126_private *tp); +void rtl8126_ptp_init(struct rtl8126_private *tp); +void rtl8126_ptp_suspend(struct rtl8126_private *tp); +void rtl8126_ptp_stop(struct rtl8126_private *tp); + +int rtl8126_ptp_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd); + +void rtl8126_rx_ptp_pktstamp(struct rtl8126_private *tp, struct sk_buff *skb, + struct RxDescV3 *descv3); + +#endif /* _LINUX_R8126_PTP_H */ diff --git a/package/lean/r8126/src/r8126_realwow.h b/package/lean/r8126/src/r8126_realwow.h new file mode 100644 index 000000000..8d8998ee3 --- /dev/null +++ b/package/lean/r8126/src/r8126_realwow.h @@ -0,0 +1,118 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* +################################################################################ +# +# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see . +# +# Author: +# Realtek NIC software team +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ +*/ + +/************************************************************************************ + * This product is covered by one or more of the following patents: + * US6,570,884, US6,115,776, and US6,327,625. + ***********************************************************************************/ + +#ifndef _LINUX_R8126_REALWOW_H +#define _LINUX_R8126_REALWOW_H + +#define SIOCDEVPRIVATE_RTLREALWOW SIOCDEVPRIVATE+3 + +#define MAX_RealWoW_KCP_SIZE (100) +#define MAX_RealWoW_Payload (64) + +#define KA_TX_PACKET_SIZE (100) +#define KA_WAKEUP_PATTERN_SIZE (120) + +//HwSuppKeepAliveOffloadVer +#define HW_SUPPORT_KCP_OFFLOAD(_M) ((_M)->HwSuppKCPOffloadVer > 0) + +enum rtl_realwow_cmd { + + RTL_REALWOW_SET_KCP_DISABLE=0, + RTL_REALWOW_SET_KCP_INFO, + RTL_REALWOW_SET_KCP_CONTENT, + + RTL_REALWOW_SET_KCP_ACKPKTINFO, + RTL_REALWOW_SET_KCP_WPINFO, + RTL_REALWOW_SET_KCPDHCP_TIMEOUT, + + RTLT_REALWOW_COMMAND_INVALID +}; + +struct rtl_realwow_ioctl_struct { + __u32 cmd; + __u32 offset; + __u32 len; + union { + __u32 data; + void *data_buffer; + }; +}; + +typedef struct _MP_KCPInfo { + u8 DIPv4[4]; + u8 MacID[6]; + u16 UdpPort[2]; + u8 PKTLEN[2]; + + u16 ackLostCnt; + u8 KCP_WakePattern[MAX_RealWoW_Payload]; + u8 KCP_AckPacket[MAX_RealWoW_Payload]; + u32 KCP_interval; + u8 KCP_WakePattern_Len; + u8 KCP_AckPacket_Len; + u8 KCP_TxPacket[2][KA_TX_PACKET_SIZE]; +} MP_KCP_INFO, *PMP_KCP_INFO; + +typedef struct _KCPInfo { + u32 nId; // = id + u8 DIPv4[4]; + u8 MacID[6]; + u16 UdpPort; + u16 PKTLEN; +} KCPInfo, *PKCPInfo; + +typedef struct _KCPContent { + u32 id; // = id + u32 mSec; // = msec + u32 size; // =size + u8 bPacket[MAX_RealWoW_KCP_SIZE]; // put packet here +} KCPContent, *PKCPContent; + +typedef struct _RealWoWAckPktInfo { + u16 ackLostCnt; + u16 patterntSize; + u8 pattern[MAX_RealWoW_Payload]; +} RealWoWAckPktInfo,*PRealWoWAckPktInfo; + +typedef struct _RealWoWWPInfo { + u16 patterntSize; + u8 pattern[MAX_RealWoW_Payload]; +} RealWoWWPInfo,*PRealWoWWPInfo; + +int rtl8126_realwow_ioctl(struct net_device *dev, struct ifreq *ifr); +void rtl8126_realwow_hw_init(struct net_device *dev); +void rtl8126_get_realwow_hw_version(struct net_device *dev); +void rtl8126_set_realwow_d3_para(struct net_device *dev); + +#endif /* _LINUX_R8126_REALWOW_H */ diff --git a/package/lean/r8126/src/r8126_rss.c b/package/lean/r8126/src/r8126_rss.c new file mode 100644 index 000000000..666e24e10 --- /dev/null +++ b/package/lean/r8126/src/r8126_rss.c @@ -0,0 +1,491 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* +################################################################################ +# +# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see . +# +# Author: +# Realtek NIC software team +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ +*/ + +/************************************************************************************ + * This product is covered by one or more of the following patents: + * US6,570,884, US6,115,776, and US6,327,625. + ***********************************************************************************/ + +#include +#include "r8126.h" + +enum rtl8126_rss_register_content { + /* RSS */ + RSS_CTRL_TCP_IPV4_SUPP = (1 << 0), + RSS_CTRL_IPV4_SUPP = (1 << 1), + RSS_CTRL_TCP_IPV6_SUPP = (1 << 2), + RSS_CTRL_IPV6_SUPP = (1 << 3), + RSS_CTRL_IPV6_EXT_SUPP = (1 << 4), + RSS_CTRL_TCP_IPV6_EXT_SUPP = (1 << 5), + RSS_HALF_SUPP = (1 << 7), + RSS_CTRL_UDP_IPV4_SUPP = (1 << 11), + RSS_CTRL_UDP_IPV6_SUPP = (1 << 12), + RSS_CTRL_UDP_IPV6_EXT_SUPP = (1 << 13), + RSS_QUAD_CPU_EN = (1 << 16), + RSS_HQ_Q_SUP_R = (1 << 31), +}; + +static int rtl8126_get_rss_hash_opts(struct rtl8126_private *tp, + struct ethtool_rxnfc *cmd) +{ + cmd->data = 0; + + /* Report default options for RSS */ + switch (cmd->flow_type) { + case TCP_V4_FLOW: + cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; + fallthrough; + case UDP_V4_FLOW: + if (tp->rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV4) + cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; + fallthrough; + case IPV4_FLOW: + cmd->data |= RXH_IP_SRC | RXH_IP_DST; + break; + case TCP_V6_FLOW: + cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; + fallthrough; + case UDP_V6_FLOW: + if (tp->rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV6) + cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3; + fallthrough; + case IPV6_FLOW: + cmd->data |= RXH_IP_SRC | RXH_IP_DST; + break; + default: + return -EINVAL; + } + + return 0; +} + +int rtl8126_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, + u32 *rule_locs) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int ret = -EOPNOTSUPP; + + netif_info(tp, drv, tp->dev, "rss get rxnfc\n"); + + if (!(dev->features & NETIF_F_RXHASH)) + return ret; + + switch (cmd->cmd) { + case ETHTOOL_GRXRINGS: + cmd->data = rtl8126_tot_rx_rings(tp); + ret = 0; + break; + case ETHTOOL_GRXFH: + ret = rtl8126_get_rss_hash_opts(tp, cmd); + break; + default: + break; + } + + return ret; +} + +u32 rtl8126_rss_indir_tbl_entries(struct rtl8126_private *tp) +{ + return tp->HwSuppIndirTblEntries; +} + +#define RSS_MASK_BITS_OFFSET (8) +#define RSS_CPU_NUM_OFFSET (16) +#define RTL8126_UDP_RSS_FLAGS (RTL_8125_RSS_FLAG_HASH_UDP_IPV4 | \ + RTL_8125_RSS_FLAG_HASH_UDP_IPV6) +static int _rtl8126_set_rss_hash_opt(struct rtl8126_private *tp) +{ + u32 rss_flags = tp->rss_flags; + u32 hash_mask_len; + u32 rss_ctrl; + + rss_ctrl = ilog2(rtl8126_tot_rx_rings(tp)); + rss_ctrl &= (BIT_0 | BIT_1 | BIT_2); + rss_ctrl <<= RSS_CPU_NUM_OFFSET; + + /* Perform hash on these packet types */ + rss_ctrl |= RSS_CTRL_TCP_IPV4_SUPP + | RSS_CTRL_IPV4_SUPP + | RSS_CTRL_IPV6_SUPP + | RSS_CTRL_IPV6_EXT_SUPP + | RSS_CTRL_TCP_IPV6_SUPP + | RSS_CTRL_TCP_IPV6_EXT_SUPP; + + if (rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV4) + rss_ctrl |= RSS_CTRL_UDP_IPV4_SUPP; + + if (rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV6) + rss_ctrl |= RSS_CTRL_UDP_IPV6_SUPP | + RSS_CTRL_UDP_IPV6_EXT_SUPP; + + hash_mask_len = ilog2(rtl8126_rss_indir_tbl_entries(tp)); + hash_mask_len &= (BIT_0 | BIT_1 | BIT_2); + rss_ctrl |= hash_mask_len << RSS_MASK_BITS_OFFSET; + + RTL_W32(tp, RSS_CTRL_8125, rss_ctrl); + + return 0; +} + +static int rtl8126_set_rss_hash_opt(struct rtl8126_private *tp, + struct ethtool_rxnfc *nfc) +{ + u32 rss_flags = tp->rss_flags; + + netif_info(tp, drv, tp->dev, "rss set hash\n"); + + /* + * RSS does not support anything other than hashing + * to queues on src and dst IPs and ports + */ + if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST | + RXH_L4_B_0_1 | RXH_L4_B_2_3)) + return -EINVAL; + + switch (nfc->flow_type) { + case TCP_V4_FLOW: + case TCP_V6_FLOW: + if (!(nfc->data & RXH_IP_SRC) || + !(nfc->data & RXH_IP_DST) || + !(nfc->data & RXH_L4_B_0_1) || + !(nfc->data & RXH_L4_B_2_3)) + return -EINVAL; + break; + case UDP_V4_FLOW: + if (!(nfc->data & RXH_IP_SRC) || + !(nfc->data & RXH_IP_DST)) + return -EINVAL; + switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { + case 0: + rss_flags &= ~RTL_8125_RSS_FLAG_HASH_UDP_IPV4; + break; + case (RXH_L4_B_0_1 | RXH_L4_B_2_3): + rss_flags |= RTL_8125_RSS_FLAG_HASH_UDP_IPV4; + break; + default: + return -EINVAL; + } + break; + case UDP_V6_FLOW: + if (!(nfc->data & RXH_IP_SRC) || + !(nfc->data & RXH_IP_DST)) + return -EINVAL; + switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) { + case 0: + rss_flags &= ~RTL_8125_RSS_FLAG_HASH_UDP_IPV6; + break; + case (RXH_L4_B_0_1 | RXH_L4_B_2_3): + rss_flags |= RTL_8125_RSS_FLAG_HASH_UDP_IPV6; + break; + default: + return -EINVAL; + } + break; + case SCTP_V4_FLOW: + case AH_ESP_V4_FLOW: + case AH_V4_FLOW: + case ESP_V4_FLOW: + case SCTP_V6_FLOW: + case AH_ESP_V6_FLOW: + case AH_V6_FLOW: + case ESP_V6_FLOW: + case IP_USER_FLOW: + case ETHER_FLOW: + /* RSS is not supported for these protocols */ + if (nfc->data) { + netif_err(tp, drv, tp->dev, "Command parameters not supported\n"); + return -EINVAL; + } + return 0; + break; + default: + return -EINVAL; + } + + /* if we changed something we need to update flags */ + if (rss_flags != tp->rss_flags) { + u32 rss_ctrl = RTL_R32(tp, RSS_CTRL_8125); + + if ((rss_flags & RTL8126_UDP_RSS_FLAGS) && + !(tp->rss_flags & RTL8126_UDP_RSS_FLAGS)) + netdev_warn(tp->dev, + "enabling UDP RSS: fragmented packets may " + "arrive out of order to the stack above\n"); + + tp->rss_flags = rss_flags; + + /* Perform hash on these packet types */ + rss_ctrl |= RSS_CTRL_TCP_IPV4_SUPP + | RSS_CTRL_IPV4_SUPP + | RSS_CTRL_IPV6_SUPP + | RSS_CTRL_IPV6_EXT_SUPP + | RSS_CTRL_TCP_IPV6_SUPP + | RSS_CTRL_TCP_IPV6_EXT_SUPP; + + rss_ctrl &= ~(RSS_CTRL_UDP_IPV4_SUPP | + RSS_CTRL_UDP_IPV6_SUPP | + RSS_CTRL_UDP_IPV6_EXT_SUPP); + + if (rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV4) + rss_ctrl |= RSS_CTRL_UDP_IPV4_SUPP; + + if (rss_flags & RTL_8125_RSS_FLAG_HASH_UDP_IPV6) + rss_ctrl |= RSS_CTRL_UDP_IPV6_SUPP | + RSS_CTRL_UDP_IPV6_EXT_SUPP; + + RTL_W32(tp, RSS_CTRL_8125, rss_ctrl); + } + + return 0; +} + +int rtl8126_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int ret = -EOPNOTSUPP; + + netif_info(tp, drv, tp->dev, "rss set rxnfc\n"); + + if (!(dev->features & NETIF_F_RXHASH)) + return ret; + + switch (cmd->cmd) { + case ETHTOOL_SRXFH: + ret = rtl8126_set_rss_hash_opt(tp, cmd); + break; + default: + break; + } + + return ret; +} + +static u32 _rtl8126_get_rxfh_key_size(struct rtl8126_private *tp) +{ + return sizeof(tp->rss_key); +} + +u32 rtl8126_get_rxfh_key_size(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + netif_info(tp, drv, tp->dev, "rss get key size\n"); + + if (!(dev->features & NETIF_F_RXHASH)) + return 0; + + return _rtl8126_get_rxfh_key_size(tp); +} + +u32 rtl8126_rss_indir_size(struct net_device *dev) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + netif_info(tp, drv, tp->dev, "rss get indir tbl size\n"); + + if (!(dev->features & NETIF_F_RXHASH)) + return 0; + + return rtl8126_rss_indir_tbl_entries(tp); +} + +static void rtl8126_get_reta(struct rtl8126_private *tp, u32 *indir) +{ + int i, reta_size = rtl8126_rss_indir_tbl_entries(tp); + + for (i = 0; i < reta_size; i++) + indir[i] = tp->rss_indir_tbl[i]; +} + +int rtl8126_get_rxfh(struct net_device *dev, u32 *indir, u8 *key, + u8 *hfunc) +{ + struct rtl8126_private *tp = netdev_priv(dev); + + netif_info(tp, drv, tp->dev, "rss get rxfh\n"); + + if (!(dev->features & NETIF_F_RXHASH)) + return -EOPNOTSUPP; + + if (hfunc) + *hfunc = ETH_RSS_HASH_TOP; + + if (indir) + rtl8126_get_reta(tp, indir); + + if (key) + memcpy(key, tp->rss_key, RTL8126_RSS_KEY_SIZE); + + return 0; +} + +static u32 rtl8126_rss_key_reg(struct rtl8126_private *tp) +{ + return RSS_KEY_8125; +} + +static u32 rtl8126_rss_indir_tbl_reg(struct rtl8126_private *tp) +{ + return RSS_INDIRECTION_TBL_8125_V2; +} + +static void rtl8126_store_reta(struct rtl8126_private *tp) +{ + u16 indir_tbl_reg = rtl8126_rss_indir_tbl_reg(tp); + u32 i, reta_entries = rtl8126_rss_indir_tbl_entries(tp); + u32 reta = 0; + u8 *indir_tbl = tp->rss_indir_tbl; + + /* Write redirection table to HW */ + for (i = 0; i < reta_entries; i++) { + reta |= indir_tbl[i] << (i & 0x3) * 8; + if ((i & 3) == 3) { + RTL_W32(tp, indir_tbl_reg, reta); + + indir_tbl_reg += 4; + reta = 0; + } + } +} + +static void rtl8126_store_rss_key(struct rtl8126_private *tp) +{ + const u16 rss_key_reg = rtl8126_rss_key_reg(tp); + u32 i, rss_key_size = _rtl8126_get_rxfh_key_size(tp); + u32 *rss_key = (u32*)tp->rss_key; + + /* Write redirection table to HW */ + for (i = 0; i < rss_key_size; i+=4) + RTL_W32(tp, rss_key_reg + i, *rss_key++); +} + +int rtl8126_set_rxfh(struct net_device *dev, const u32 *indir, + const u8 *key, const u8 hfunc) +{ + struct rtl8126_private *tp = netdev_priv(dev); + int i; + u32 reta_entries = rtl8126_rss_indir_tbl_entries(tp); + + netif_info(tp, drv, tp->dev, "rss set rxfh\n"); + + /* We require at least one supported parameter to be changed and no + * change in any of the unsupported parameters + */ + if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP) + return -EOPNOTSUPP; + + /* Fill out the redirection table */ + if (indir) { + int max_queues = tp->num_rx_rings; + + /* Verify user input. */ + for (i = 0; i < reta_entries; i++) + if (indir[i] >= max_queues) + return -EINVAL; + + for (i = 0; i < reta_entries; i++) + tp->rss_indir_tbl[i] = indir[i]; + } + + /* Fill out the rss hash key */ + if (key) + memcpy(tp->rss_key, key, RTL8126_RSS_KEY_SIZE); + + rtl8126_store_reta(tp); + + rtl8126_store_rss_key(tp); + + return 0; +} + +static u32 rtl8126_get_rx_desc_hash(struct rtl8126_private *tp, + struct RxDescV3 *descv3) +{ + return le32_to_cpu(descv3->RxDescNormalDDWord2.RSSResult); +} + +#define RXS_8125B_RSS_UDP BIT(9) +#define RXS_8125_RSS_IPV4 BIT(10) +#define RXS_8125_RSS_IPV6 BIT(12) +#define RXS_8125_RSS_TCP BIT(13) +#define RTL8126_RXS_RSS_L3_TYPE_MASK (RXS_8125_RSS_IPV4 | RXS_8125_RSS_IPV6) +#define RTL8126_RXS_RSS_L4_TYPE_MASK (RXS_8125_RSS_TCP | RXS_8125B_RSS_UDP) +void rtl8126_rx_hash(struct rtl8126_private *tp, + struct RxDescV3 *descv3, + struct sk_buff *skb) +{ + u16 rss_header_info; + + if (!(tp->dev->features & NETIF_F_RXHASH)) + return; + + rss_header_info = le16_to_cpu(descv3->RxDescNormalDDWord2.HeaderInfo); + + if (!(rss_header_info & RTL8126_RXS_RSS_L3_TYPE_MASK)) + return; + + skb_set_hash(skb, rtl8126_get_rx_desc_hash(tp, descv3), + (RTL8126_RXS_RSS_L4_TYPE_MASK & rss_header_info) ? + PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3); +} + +void rtl8126_disable_rss(struct rtl8126_private *tp) +{ + RTL_W32(tp, RSS_CTRL_8125, 0x00); +} + +void _rtl8126_config_rss(struct rtl8126_private *tp) +{ + _rtl8126_set_rss_hash_opt(tp); + + rtl8126_store_reta(tp); + + rtl8126_store_rss_key(tp); +} + +void rtl8126_config_rss(struct rtl8126_private *tp) +{ + if (!tp->EnableRss) { + rtl8126_disable_rss(tp); + return; + } + + _rtl8126_config_rss(tp); +} + +void rtl8126_init_rss(struct rtl8126_private *tp) +{ + int i; + + for (i = 0; i < rtl8126_rss_indir_tbl_entries(tp); i++) + tp->rss_indir_tbl[i] = ethtool_rxfh_indir_default(i, tp->num_rx_rings); + + netdev_rss_key_fill(tp->rss_key, RTL8126_RSS_KEY_SIZE); +} diff --git a/package/lean/r8126/src/r8126_rss.h b/package/lean/r8126/src/r8126_rss.h new file mode 100644 index 000000000..0d6062dba --- /dev/null +++ b/package/lean/r8126/src/r8126_rss.h @@ -0,0 +1,69 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* +################################################################################ +# +# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see . +# +# Author: +# Realtek NIC software team +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ +*/ + +/************************************************************************************ + * This product is covered by one or more of the following patents: + * US6,570,884, US6,115,776, and US6,327,625. + ***********************************************************************************/ + +#ifndef _LINUX_R8126_RSS_H +#define _LINUX_R8126_RSS_H + +#include +#include + +#define RTL8126_RSS_KEY_SIZE 40 /* size of RSS Hash Key in bytes */ +#define RTL8126_MAX_INDIRECTION_TABLE_ENTRIES 128 + +enum rtl8126_rss_flag { + RTL_8125_RSS_FLAG_HASH_UDP_IPV4 = (1 << 0), + RTL_8125_RSS_FLAG_HASH_UDP_IPV6 = (1 << 1), +}; + +struct rtl8126_private; + +int rtl8126_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd, + u32 *rule_locs); +int rtl8126_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd); +u32 rtl8126_get_rxfh_key_size(struct net_device *netdev); +u32 rtl8126_rss_indir_size(struct net_device *netdev); +int rtl8126_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key, + u8 *hfunc); +int rtl8126_set_rxfh(struct net_device *netdev, const u32 *indir, + const u8 *key, const u8 hfunc); +void rtl8126_rx_hash(struct rtl8126_private *tp, + struct RxDescV3 *descv3, + struct sk_buff *skb); +void _rtl8126_config_rss(struct rtl8126_private *tp); +void rtl8126_config_rss(struct rtl8126_private *tp); +void rtl8126_init_rss(struct rtl8126_private *tp); +u32 rtl8126_rss_indir_tbl_entries(struct rtl8126_private *tp); +void rtl8126_disable_rss(struct rtl8126_private *tp); + +#endif /* _LINUX_R8126_RSS_H */ diff --git a/package/lean/r8126/src/rtl_eeprom.c b/package/lean/r8126/src/rtl_eeprom.c new file mode 100644 index 000000000..6421df4bb --- /dev/null +++ b/package/lean/r8126/src/rtl_eeprom.c @@ -0,0 +1,289 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* +################################################################################ +# +# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see . +# +# Author: +# Realtek NIC software team +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ +*/ + +/************************************************************************************ + * This product is covered by one or more of the following patents: + * US6,570,884, US6,115,776, and US6,327,625. + ***********************************************************************************/ + +#include +#include +#include +#include +#include +#include + +#include + +#include "r8126.h" +#include "rtl_eeprom.h" + +//------------------------------------------------------------------- +//rtl8126_eeprom_type(): +// tell the eeprom type +//return value: +// 0: the eeprom type is 93C46 +// 1: the eeprom type is 93C56 or 93C66 +//------------------------------------------------------------------- +void rtl8126_eeprom_type(struct rtl8126_private *tp) +{ + u16 magic = 0; + + if (tp->mcfg == CFG_METHOD_DEFAULT) + goto out_no_eeprom; + + if(RTL_R8(tp, 0xD2)&0x04) { + //not support + //tp->eeprom_type = EEPROM_TWSI; + //tp->eeprom_len = 256; + goto out_no_eeprom; + } else if(RTL_R32(tp, RxConfig) & RxCfg_9356SEL) { + tp->eeprom_type = EEPROM_TYPE_93C56; + tp->eeprom_len = 256; + } else { + tp->eeprom_type = EEPROM_TYPE_93C46; + tp->eeprom_len = 128; + } + + magic = rtl8126_eeprom_read_sc(tp, 0); + +out_no_eeprom: + if ((magic != 0x8129) && (magic != 0x8128)) { + tp->eeprom_type = EEPROM_TYPE_NONE; + tp->eeprom_len = 0; + } +} + +void rtl8126_eeprom_cleanup(struct rtl8126_private *tp) +{ + u8 x; + + x = RTL_R8(tp, Cfg9346); + x &= ~(Cfg9346_EEDI | Cfg9346_EECS); + + RTL_W8(tp, Cfg9346, x); + + rtl8126_raise_clock(tp, &x); + rtl8126_lower_clock(tp, &x); +} + +int rtl8126_eeprom_cmd_done(struct rtl8126_private *tp) +{ + u8 x; + int i; + + rtl8126_stand_by(tp); + + for (i = 0; i < 50000; i++) { + x = RTL_R8(tp, Cfg9346); + + if (x & Cfg9346_EEDO) { + udelay(RTL_CLOCK_RATE * 2 * 3); + return 0; + } + udelay(1); + } + + return -1; +} + +//------------------------------------------------------------------- +//rtl8126_eeprom_read_sc(): +// read one word from eeprom +//------------------------------------------------------------------- +u16 rtl8126_eeprom_read_sc(struct rtl8126_private *tp, u16 reg) +{ + int addr_sz = 6; + u8 x; + u16 data; + + if(tp->eeprom_type == EEPROM_TYPE_NONE) { + return -1; + } + + if (tp->eeprom_type==EEPROM_TYPE_93C46) + addr_sz = 6; + else if (tp->eeprom_type==EEPROM_TYPE_93C56) + addr_sz = 8; + + x = Cfg9346_EEM1 | Cfg9346_EECS; + RTL_W8(tp, Cfg9346, x); + + rtl8126_shift_out_bits(tp, RTL_EEPROM_READ_OPCODE, 3); + rtl8126_shift_out_bits(tp, reg, addr_sz); + + data = rtl8126_shift_in_bits(tp); + + rtl8126_eeprom_cleanup(tp); + + RTL_W8(tp, Cfg9346, 0); + + return data; +} + +//------------------------------------------------------------------- +//rtl8126_eeprom_write_sc(): +// write one word to a specific address in the eeprom +//------------------------------------------------------------------- +void rtl8126_eeprom_write_sc(struct rtl8126_private *tp, u16 reg, u16 data) +{ + u8 x; + int addr_sz = 6; + int w_dummy_addr = 4; + + if(tp->eeprom_type == EEPROM_TYPE_NONE) { + return ; + } + + if (tp->eeprom_type==EEPROM_TYPE_93C46) { + addr_sz = 6; + w_dummy_addr = 4; + } else if (tp->eeprom_type==EEPROM_TYPE_93C56) { + addr_sz = 8; + w_dummy_addr = 6; + } + + x = Cfg9346_EEM1 | Cfg9346_EECS; + RTL_W8(tp, Cfg9346, x); + + rtl8126_shift_out_bits(tp, RTL_EEPROM_EWEN_OPCODE, 5); + rtl8126_shift_out_bits(tp, reg, w_dummy_addr); + rtl8126_stand_by(tp); + + rtl8126_shift_out_bits(tp, RTL_EEPROM_ERASE_OPCODE, 3); + rtl8126_shift_out_bits(tp, reg, addr_sz); + if (rtl8126_eeprom_cmd_done(tp) < 0) { + return; + } + rtl8126_stand_by(tp); + + rtl8126_shift_out_bits(tp, RTL_EEPROM_WRITE_OPCODE, 3); + rtl8126_shift_out_bits(tp, reg, addr_sz); + rtl8126_shift_out_bits(tp, data, 16); + if (rtl8126_eeprom_cmd_done(tp) < 0) { + return; + } + rtl8126_stand_by(tp); + + rtl8126_shift_out_bits(tp, RTL_EEPROM_EWDS_OPCODE, 5); + rtl8126_shift_out_bits(tp, reg, w_dummy_addr); + + rtl8126_eeprom_cleanup(tp); + RTL_W8(tp, Cfg9346, 0); +} + +void rtl8126_raise_clock(struct rtl8126_private *tp, u8 *x) +{ + *x = *x | Cfg9346_EESK; + RTL_W8(tp, Cfg9346, *x); + udelay(RTL_CLOCK_RATE); +} + +void rtl8126_lower_clock(struct rtl8126_private *tp, u8 *x) +{ + + *x = *x & ~Cfg9346_EESK; + RTL_W8(tp, Cfg9346, *x); + udelay(RTL_CLOCK_RATE); +} + +void rtl8126_shift_out_bits(struct rtl8126_private *tp, int data, int count) +{ + u8 x; + int mask; + + mask = 0x01 << (count - 1); + x = RTL_R8(tp, Cfg9346); + x &= ~(Cfg9346_EEDI | Cfg9346_EEDO); + + do { + if (data & mask) + x |= Cfg9346_EEDI; + else + x &= ~Cfg9346_EEDI; + + RTL_W8(tp, Cfg9346, x); + udelay(RTL_CLOCK_RATE); + rtl8126_raise_clock(tp, &x); + rtl8126_lower_clock(tp, &x); + mask = mask >> 1; + } while(mask); + + x &= ~Cfg9346_EEDI; + RTL_W8(tp, Cfg9346, x); +} + +u16 rtl8126_shift_in_bits(struct rtl8126_private *tp) +{ + u8 x; + u16 d, i; + + x = RTL_R8(tp, Cfg9346); + x &= ~(Cfg9346_EEDI | Cfg9346_EEDO); + + d = 0; + + for (i = 0; i < 16; i++) { + d = d << 1; + rtl8126_raise_clock(tp, &x); + + x = RTL_R8(tp, Cfg9346); + x &= ~Cfg9346_EEDI; + + if (x & Cfg9346_EEDO) + d |= 1; + + rtl8126_lower_clock(tp, &x); + } + + return d; +} + +void rtl8126_stand_by(struct rtl8126_private *tp) +{ + u8 x; + + x = RTL_R8(tp, Cfg9346); + x &= ~(Cfg9346_EECS | Cfg9346_EESK); + RTL_W8(tp, Cfg9346, x); + udelay(RTL_CLOCK_RATE); + + x |= Cfg9346_EECS; + RTL_W8(tp, Cfg9346, x); +} + +void rtl8126_set_eeprom_sel_low(struct rtl8126_private *tp) +{ + RTL_W8(tp, Cfg9346, Cfg9346_EEM1); + RTL_W8(tp, Cfg9346, Cfg9346_EEM1 | Cfg9346_EESK); + + udelay(20); + + RTL_W8(tp, Cfg9346, Cfg9346_EEM1); +} diff --git a/package/lean/r8126/src/rtl_eeprom.h b/package/lean/r8126/src/rtl_eeprom.h new file mode 100644 index 000000000..1e4b56874 --- /dev/null +++ b/package/lean/r8126/src/rtl_eeprom.h @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* +################################################################################ +# +# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see . +# +# Author: +# Realtek NIC software team +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ +*/ + +/************************************************************************************ + * This product is covered by one or more of the following patents: + * US6,570,884, US6,115,776, and US6,327,625. + ***********************************************************************************/ + +#ifndef _LINUX_RTLEEPROM_H +#define _LINUX_RTLEEPROM_H + +//EEPROM opcodes +#define RTL_EEPROM_READ_OPCODE 06 +#define RTL_EEPROM_WRITE_OPCODE 05 +#define RTL_EEPROM_ERASE_OPCODE 07 +#define RTL_EEPROM_EWEN_OPCODE 19 +#define RTL_EEPROM_EWDS_OPCODE 16 + +#define RTL_CLOCK_RATE 3 + +void rtl8126_eeprom_type(struct rtl8126_private *tp); +void rtl8126_eeprom_cleanup(struct rtl8126_private *tp); +u16 rtl8126_eeprom_read_sc(struct rtl8126_private *tp, u16 reg); +void rtl8126_eeprom_write_sc(struct rtl8126_private *tp, u16 reg, u16 data); +void rtl8126_shift_out_bits(struct rtl8126_private *tp, int data, int count); +u16 rtl8126_shift_in_bits(struct rtl8126_private *tp); +void rtl8126_raise_clock(struct rtl8126_private *tp, u8 *x); +void rtl8126_lower_clock(struct rtl8126_private *tp, u8 *x); +void rtl8126_stand_by(struct rtl8126_private *tp); +void rtl8126_set_eeprom_sel_low(struct rtl8126_private *tp); + +#endif /* _LINUX_RTLEEPROM_H */ diff --git a/package/lean/r8126/src/rtltool.c b/package/lean/r8126/src/rtltool.c new file mode 100644 index 000000000..c4b7d52fc --- /dev/null +++ b/package/lean/r8126/src/rtltool.c @@ -0,0 +1,260 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* +################################################################################ +# +# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see . +# +# Author: +# Realtek NIC software team +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ +*/ + +/************************************************************************************ + * This product is covered by one or more of the following patents: + * US6,570,884, US6,115,776, and US6,327,625. + ***********************************************************************************/ + +#include +#include +#include +#include +#include +#include +#include +#include +#include "r8126.h" +#include "rtl_eeprom.h" +#include "rtltool.h" + +int rtl8126_tool_ioctl(struct rtl8126_private *tp, struct ifreq *ifr) +{ + struct rtltool_cmd my_cmd; + int ret; + + if (copy_from_user(&my_cmd, ifr->ifr_data, sizeof(my_cmd))) + return -EFAULT; + + ret = 0; + switch (my_cmd.cmd) { + case RTLTOOL_READ_MAC: + if (my_cmd.len==1) + my_cmd.data = readb(tp->mmio_addr+my_cmd.offset); + else if (my_cmd.len==2) + my_cmd.data = readw(tp->mmio_addr+(my_cmd.offset&~1)); + else if (my_cmd.len==4) + my_cmd.data = readl(tp->mmio_addr+(my_cmd.offset&~3)); + else { + ret = -EOPNOTSUPP; + break; + } + + if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) { + ret = -EFAULT; + break; + } + break; + + case RTLTOOL_WRITE_MAC: + if (my_cmd.len==1) + writeb(my_cmd.data, tp->mmio_addr+my_cmd.offset); + else if (my_cmd.len==2) + writew(my_cmd.data, tp->mmio_addr+(my_cmd.offset&~1)); + else if (my_cmd.len==4) + writel(my_cmd.data, tp->mmio_addr+(my_cmd.offset&~3)); + else { + ret = -EOPNOTSUPP; + break; + } + + break; + + case RTLTOOL_READ_PHY: + my_cmd.data = rtl8126_mdio_prot_read(tp, my_cmd.offset); + if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) { + ret = -EFAULT; + break; + } + + break; + + case RTLTOOL_WRITE_PHY: + rtl8126_mdio_prot_write(tp, my_cmd.offset, my_cmd.data); + break; + + case RTLTOOL_READ_EPHY: + my_cmd.data = rtl8126_ephy_read(tp, my_cmd.offset); + if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) { + ret = -EFAULT; + break; + } + + break; + + case RTLTOOL_WRITE_EPHY: + rtl8126_ephy_write(tp, my_cmd.offset, my_cmd.data); + break; + + case RTLTOOL_READ_ERI: + my_cmd.data = 0; + if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) { + my_cmd.data = rtl8126_eri_read(tp, my_cmd.offset, my_cmd.len, ERIAR_ExGMAC); + } else { + ret = -EOPNOTSUPP; + break; + } + + if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) { + ret = -EFAULT; + break; + } + + break; + + case RTLTOOL_WRITE_ERI: + if (my_cmd.len==1 || my_cmd.len==2 || my_cmd.len==4) { + rtl8126_eri_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data, ERIAR_ExGMAC); + } else { + ret = -EOPNOTSUPP; + break; + } + break; + + case RTLTOOL_READ_PCI: + my_cmd.data = 0; + if (my_cmd.len==1) + pci_read_config_byte(tp->pci_dev, my_cmd.offset, + (u8 *)&my_cmd.data); + else if (my_cmd.len==2) + pci_read_config_word(tp->pci_dev, my_cmd.offset, + (u16 *)&my_cmd.data); + else if (my_cmd.len==4) + pci_read_config_dword(tp->pci_dev, my_cmd.offset, + &my_cmd.data); + else { + ret = -EOPNOTSUPP; + break; + } + + if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) { + ret = -EFAULT; + break; + } + break; + + case RTLTOOL_WRITE_PCI: + if (my_cmd.len==1) + pci_write_config_byte(tp->pci_dev, my_cmd.offset, + my_cmd.data); + else if (my_cmd.len==2) + pci_write_config_word(tp->pci_dev, my_cmd.offset, + my_cmd.data); + else if (my_cmd.len==4) + pci_write_config_dword(tp->pci_dev, my_cmd.offset, + my_cmd.data); + else { + ret = -EOPNOTSUPP; + break; + } + + break; + + case RTLTOOL_READ_EEPROM: + my_cmd.data = rtl8126_eeprom_read_sc(tp, my_cmd.offset); + if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) { + ret = -EFAULT; + break; + } + + break; + + case RTLTOOL_WRITE_EEPROM: + rtl8126_eeprom_write_sc(tp, my_cmd.offset, my_cmd.data); + break; + + case RTL_READ_OOB_MAC: + rtl8126_oob_mutex_lock(tp); + my_cmd.data = rtl8126_ocp_read(tp, my_cmd.offset, 4); + rtl8126_oob_mutex_unlock(tp); + if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) { + ret = -EFAULT; + break; + } + break; + + case RTL_WRITE_OOB_MAC: + if (my_cmd.len == 0 || my_cmd.len > 4) + return -EOPNOTSUPP; + + rtl8126_oob_mutex_lock(tp); + rtl8126_ocp_write(tp, my_cmd.offset, my_cmd.len, my_cmd.data); + rtl8126_oob_mutex_unlock(tp); + break; + + case RTL_ENABLE_PCI_DIAG: + tp->rtk_enable_diag = 1; + + dprintk("enable rtk diag\n"); + break; + + case RTL_DISABLE_PCI_DIAG: + tp->rtk_enable_diag = 0; + + dprintk("disable rtk diag\n"); + break; + + case RTL_READ_MAC_OCP: + if (my_cmd.offset % 2) + return -EOPNOTSUPP; + + my_cmd.data = rtl8126_mac_ocp_read(tp, my_cmd.offset); + if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) { + ret = -EFAULT; + break; + } + break; + + case RTL_WRITE_MAC_OCP: + if ((my_cmd.offset % 2) || (my_cmd.len != 2)) + return -EOPNOTSUPP; + + rtl8126_mac_ocp_write(tp, my_cmd.offset, (u16)my_cmd.data); + break; + + case RTL_DIRECT_READ_PHY_OCP: + my_cmd.data = rtl8126_mdio_prot_direct_read_phy_ocp(tp, my_cmd.offset); + if (copy_to_user(ifr->ifr_data, &my_cmd, sizeof(my_cmd))) { + ret = -EFAULT; + break; + } + + break; + + case RTL_DIRECT_WRITE_PHY_OCP: + rtl8126_mdio_prot_direct_write_phy_ocp(tp, my_cmd.offset, my_cmd.data); + break; + + default: + ret = -EOPNOTSUPP; + break; + } + + return ret; +} diff --git a/package/lean/r8126/src/rtltool.h b/package/lean/r8126/src/rtltool.h new file mode 100644 index 000000000..1ae1b219b --- /dev/null +++ b/package/lean/r8126/src/rtltool.h @@ -0,0 +1,86 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* +################################################################################ +# +# r8126 is the Linux device driver released for Realtek 5 Gigabit Ethernet +# controllers with PCI-Express interface. +# +# Copyright(c) 2024 Realtek Semiconductor Corp. All rights reserved. +# +# This program is free software; you can redistribute it and/or modify it +# under the terms of the GNU General Public License as published by the Free +# Software Foundation; either version 2 of the License, or (at your option) +# any later version. +# +# This program is distributed in the hope that it will be useful, but WITHOUT +# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or +# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for +# more details. +# +# You should have received a copy of the GNU General Public License along with +# this program; if not, see . +# +# Author: +# Realtek NIC software team +# No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan +# +################################################################################ +*/ + +/************************************************************************************ + * This product is covered by one or more of the following patents: + * US6,570,884, US6,115,776, and US6,327,625. + ***********************************************************************************/ + +#ifndef _LINUX_RTLTOOL_H +#define _LINUX_RTLTOOL_H + +#define SIOCRTLTOOL SIOCDEVPRIVATE+1 + +enum rtl_cmd { + RTLTOOL_READ_MAC=0, + RTLTOOL_WRITE_MAC, + RTLTOOL_READ_PHY, + RTLTOOL_WRITE_PHY, + RTLTOOL_READ_EPHY, + RTLTOOL_WRITE_EPHY, + RTLTOOL_READ_ERI, + RTLTOOL_WRITE_ERI, + RTLTOOL_READ_PCI, + RTLTOOL_WRITE_PCI, + RTLTOOL_READ_EEPROM, + RTLTOOL_WRITE_EEPROM, + + RTL_READ_OOB_MAC, + RTL_WRITE_OOB_MAC, + + RTL_ENABLE_PCI_DIAG, + RTL_DISABLE_PCI_DIAG, + + RTL_READ_MAC_OCP, + RTL_WRITE_MAC_OCP, + + RTL_DIRECT_READ_PHY_OCP, + RTL_DIRECT_WRITE_PHY_OCP, + + RTLTOOL_INVALID +}; + +struct rtltool_cmd { + __u32 cmd; + __u32 offset; + __u32 len; + __u32 data; +}; + +enum mode_access { + MODE_NONE=0, + MODE_READ, + MODE_WRITE +}; + +#ifdef __KERNEL__ +int rtl8126_tool_ioctl(struct rtl8126_private *tp, struct ifreq *ifr); +#endif + +#endif /* _LINUX_RTLTOOL_H */ diff --git a/package/lean/r8168/Makefile b/package/lean/r8168/Makefile index c1e59280a..1760cc50b 100644 --- a/package/lean/r8168/Makefile +++ b/package/lean/r8168/Makefile @@ -7,12 +7,12 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=r8168 -PKG_VERSION:=8.052.01 +PKG_VERSION:=8.053.00 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=https://codeload.github.com/mtorromeo/r8168/tar.gz/$(PKG_VERSION)? -PKG_HASH:=cd8ee58a260e9b654080d39e3a42e3a3fb821041ee79e631b4647d84120aa999 +PKG_HASH:=7c00cc13f17c45e1d1002e4c390f118204b04d42caba9d04d8ae95e953770857 PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)-$(PKG_VERSION) diff --git a/package/lean/r8168/patches/100-add-LED-configuration-from-OF.patch b/package/lean/r8168/patches/100-add-LED-configuration-from-OF.patch index 62e2e56b8..6b556e961 100644 --- a/package/lean/r8168/patches/100-add-LED-configuration-from-OF.patch +++ b/package/lean/r8168/patches/100-add-LED-configuration-from-OF.patch @@ -8,7 +8,7 @@ #include #include #include -@@ -25852,6 +25853,22 @@ rtl8168_setup_mqs_reg(struct rtl8168_pri +@@ -25945,6 +25946,22 @@ rtl8168_setup_mqs_reg(struct rtl8168_pri tp->imr_reg[3] = IntrMask3; } @@ -31,7 +31,7 @@ static void rtl8168_init_software_variable(struct net_device *dev) { -@@ -26547,6 +26564,8 @@ err1: +@@ -26640,6 +26657,8 @@ err1: if (tp->InitRxDescType == RX_DESC_RING_TYPE_2) tp->RxDescLength = RX_DESC_LEN_TYPE_2; diff --git a/package/lean/vsftpd-alt/Makefile b/package/lean/vsftpd-alt/Makefile index db88e30c5..0d3cded03 100644 --- a/package/lean/vsftpd-alt/Makefile +++ b/package/lean/vsftpd-alt/Makefile @@ -9,12 +9,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=vsftpd-alt PKG_VERSION:=3.0.5 -PKG_RELEASE:=1 +PKG_RELEASE:=2 PKG_SOURCE:=vsftpd-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=https://security.appspot.com/downloads/ PKG_HASH:=26b602ae454b0ba6d99ef44a09b6b9e0dfa7f67228106736df1f278c70bc91d3 PKG_LICENSE:=GPLv2 +PKG_CPE_ID:=cpe:/a:vsftpd_project:vsftpd BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-$(PKG_VERSION) PKG_BUILD_DIR:=$(BUILD_DIR)/vsftpd-$(PKG_VERSION) @@ -48,6 +49,7 @@ endef ifneq ($(CONFIG_USE_MUSL),) NLSSTRING:=-lcrypt + TARGET_CFLAGS += -D_LARGEFILE64_SOURCE else ifneq ($(CONFIG_USE_GLIBC),) NLSSTRING:=-lcrypt else @@ -64,7 +66,7 @@ define Build/Compile $(SED) 's/-lcrypt -lnsl/$(NLSSTRING)/' $(PKG_BUILD_DIR)/Makefile $(MAKE) -C $(PKG_BUILD_DIR) \ CC="$(TARGET_CC)" \ - CFLAGS="$(TARGET_CFLAGS)" \ + CFLAGS="$(TARGET_CFLAGS) $(TARGET_CPPFLAGS)" \ LDFLAGS="$(TARGET_LDFLAGS)" \ vsftpd endef diff --git a/package/libs/elfutils/Makefile b/package/libs/elfutils/Makefile index d4e5d994e..94b01d73b 100644 --- a/package/libs/elfutils/Makefile +++ b/package/libs/elfutils/Makefile @@ -83,6 +83,11 @@ CONFIGURE_VARS += \ TARGET_CFLAGS += -D_GNU_SOURCE -Wno-unused-result -Wno-format-nonliteral +ifneq ($(filter $(GCC_MAJOR_VERSION),12 13),) +TARGET_CFLAGS += \ + -Wno-error=use-after-free +endif + define Build/InstallDev $(INSTALL_DIR) $(1)/usr/include $(CP) $(PKG_INSTALL_DIR)/usr/include/* $(1)/usr/include/ diff --git a/package/libs/gettext-full/Makefile b/package/libs/gettext-full/Makefile index 2319401ba..55164644e 100644 --- a/package/libs/gettext-full/Makefile +++ b/package/libs/gettext-full/Makefile @@ -64,6 +64,7 @@ HOST_CONFIGURE_ARGS += \ --disable-rpath \ --disable-java \ --disable-openmp \ + --disable-curses \ --without-emacs \ --without-libxml2-prefix diff --git a/package/libs/gettext-full/patches/020-fix_clang.patch b/package/libs/gettext-full/patches/020-fix_clang.patch new file mode 100644 index 000000000..284b5ab9f --- /dev/null +++ b/package/libs/gettext-full/patches/020-fix_clang.patch @@ -0,0 +1,11 @@ +--- a/libtextstyle/lib/iconv-ostream.c ++++ b/libtextstyle/lib/iconv-ostream.c +@@ -231,7 +231,7 @@ iconv_ostream__write_mem (iconv_ostream_t stream, const void *data, size_t len) + } + + static void +-iconv_ostream__flush (iconv_ostream_t stream) ++iconv_ostream__flush (iconv_ostream_t stream, ostream_flush_scope_t scope) + { + abort (); + } diff --git a/package/libs/libjson-c/Makefile b/package/libs/libjson-c/Makefile index 2c312f200..063cf2644 100644 --- a/package/libs/libjson-c/Makefile +++ b/package/libs/libjson-c/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=json-c -PKG_VERSION:=0.16 -PKG_RELEASE:=2 +PKG_VERSION:=0.17 +PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION)-nodoc.tar.gz PKG_SOURCE_URL:=https://s3.amazonaws.com/json-c_releases/releases/ -PKG_HASH:=ac8a3dd6820daaca579b23fbc74664310fbc3d67f52f6707cda67d21dde5570f +PKG_HASH:=8df3b66597333dd365762cab2de2ff68e41e3808a04b692e696e0550648eefaa PKG_MAINTAINER:=Felix Fietkau PKG_LICENSE:=MIT diff --git a/package/libs/libjson-c/patches/001-dont-build-docs.patch b/package/libs/libjson-c/patches/001-dont-build-docs.patch index f35da8072..1de420f8b 100644 --- a/package/libs/libjson-c/patches/001-dont-build-docs.patch +++ b/package/libs/libjson-c/patches/001-dont-build-docs.patch @@ -1,6 +1,6 @@ --- a/CMakeLists.txt +++ b/CMakeLists.txt -@@ -433,8 +433,6 @@ configure_file(json.h.cmakein ${PROJECT_ +@@ -451,8 +451,6 @@ configure_file(json.h.cmakein ${PROJECT_ include_directories(${PROJECT_SOURCE_DIR}) include_directories(${PROJECT_BINARY_DIR}) diff --git a/package/libs/libnl-tiny/Makefile b/package/libs/libnl-tiny/Makefile index 4f09861ed..048c3e793 100644 --- a/package/libs/libnl-tiny/Makefile +++ b/package/libs/libnl-tiny/Makefile @@ -12,9 +12,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/libnl-tiny.git -PKG_SOURCE_DATE:=2022-11-01 -PKG_SOURCE_VERSION:=db3b2cdbca5277723326a2720024a59fb821ae36 -PKG_MIRROR_HASH:=f6f9e2cb5366cda3be6d27a6320aa6cf3681c0b10df07b29ab4e4005e9f04f1c +PKG_SOURCE_DATE:=2023-07-01 +PKG_SOURCE_VERSION:=d433990c00e804593f253cc709b8fe901492b530 +PKG_MIRROR_HASH:=fffb2782c7ed2ebabc7d57e5513f52ac53d1828014bc9a8ea131f50eab093086 CMAKE_INSTALL:=1 PKG_LICENSE:=LGPL-2.1 diff --git a/package/libs/libubox/Makefile b/package/libs/libubox/Makefile index a987304ba..e19a97cbb 100644 --- a/package/libs/libubox/Makefile +++ b/package/libs/libubox/Makefile @@ -5,9 +5,9 @@ PKG_RELEASE=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/libubox.git -PKG_MIRROR_HASH:=071139fed757bea240d4ba8f55a0ff5a81862d23e16b39fc871ae07da78ae6a4 -PKG_SOURCE_DATE:=2024-01-26 -PKG_SOURCE_VERSION:=c1be505732e6d254464973bdeacb955214c76c46 +PKG_MIRROR_HASH:=400bef38b8c0f382e4e595a50bb52dfbdb8da820eb80f3447b9bd7be3f5499a5 +PKG_SOURCE_DATE:=2022-09-27 +PKG_SOURCE_VERSION:=ea56013409d5823001b47a9bba6f74055a6d76a5 PKG_ABI_VERSION:=$(call abi_version_str,$(PKG_SOURCE_DATE)) CMAKE_INSTALL:=1 @@ -105,14 +105,6 @@ CMAKE_HOST_OPTIONS += \ -DCMAKE_MACOSX_RPATH=1 \ -DCMAKE_INSTALL_RPATH="${STAGING_DIR_HOST}/lib" \ -ifeq ($(HOST_OS),Darwin) - define Host/Install - $(Host/Install/Default) - $(INSTALL_DIR) $(STAGING_DIR_HOSTPKG)/lib - cd "$(STAGING_DIR_HOSTPKG)/lib" && ln -sf ../../host/lib/libubox.* . - endef -endif - $(eval $(call BuildPackage,libubox)) $(eval $(call BuildPackage,libblobmsg-json)) $(eval $(call BuildPackage,jshn)) diff --git a/package/libs/libusb/Makefile b/package/libs/libusb/Makefile index 0c6de7cb6..65c624409 100644 --- a/package/libs/libusb/Makefile +++ b/package/libs/libusb/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=libusb PKG_VERSION:=1.0.26 -PKG_RELEASE:=3 +PKG_RELEASE:=$(AUTORELEASE) PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 PKG_SOURCE_URL:=\ diff --git a/package/libs/openssl/Makefile b/package/libs/openssl/Makefile index 4f49375b1..0067723ed 100644 --- a/package/libs/openssl/Makefile +++ b/package/libs/openssl/Makefile @@ -8,7 +8,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=openssl -PKG_VERSION:=3.0.13 +PKG_VERSION:=3.0.14 PKG_RELEASE:=1 PKG_USE_MIPS16:=0 PKG_BUILD_FLAGS:=gc-sections no-lto @@ -27,7 +27,7 @@ PKG_SOURCE_URL:= \ ftp://ftp.pca.dfn.de/pub/tools/net/openssl/source/ \ ftp://ftp.pca.dfn.de/pub/tools/net/openssl/source/old/$(PKG_BASE)/ -PKG_HASH:=88525753f79d3bec27d2fa7c66aa0b92b3aa9498dafd93d7cfa4b3780cdae313 +PKG_HASH:=eeca035d4dd4e84fc25846d952da6297484afa0650a6f84c682e39df3a4123ca PKG_LICENSE:=Apache-2.0 PKG_LICENSE_FILES:=LICENSE diff --git a/package/network/config/firewall/Makefile b/package/network/config/firewall/Makefile index 6e99960ec..087ef5d0f 100644 --- a/package/network/config/firewall/Makefile +++ b/package/network/config/firewall/Makefile @@ -28,7 +28,9 @@ define Package/firewall SECTION:=net CATEGORY:=Base system TITLE:=OpenWrt C Firewall - DEPENDS:=+libubox +libubus +libuci +libip4tc +IPV6:libip6tc +libxtables +kmod-ipt-core +kmod-ipt-conntrack +IPV6:kmod-nf-conntrack6 +kmod-ipt-nat +iptables-mod-fullconenat + DEPENDS:=+libubox +libubus +libuci +libip4tc +IPV6:libip6tc +libxtables +kmod-ipt-core +kmod-ipt-conntrack +iptables-mod-conntrack-extra +IPV6:kmod-nf-conntrack6 +kmod-ipt-nat +iptables-mod-fullconenat + PROVIDES:=uci-firewall + CONFLICTS:=firewall4 endef define Package/firewall/description diff --git a/package/network/config/firewall/files/firewall.config b/package/network/config/firewall/files/firewall.config index 42e3f27df..42f6f6aa3 100644 --- a/package/network/config/firewall/files/firewall.config +++ b/package/network/config/firewall/files/firewall.config @@ -3,7 +3,7 @@ config defaults option input ACCEPT option output ACCEPT option forward REJECT - option fullcone 0 + option fullcone 0 # Uncomment this line to disable ipv6 rules # option disable_ipv6 1 diff --git a/package/network/config/firewall/files/firewall.init b/package/network/config/firewall/files/firewall.init index 8fc8c6b07..2d641d049 100755 --- a/package/network/config/firewall/files/firewall.init +++ b/package/network/config/firewall/files/firewall.init @@ -69,8 +69,8 @@ stop_service() { } reload_service() { - unset_lock - set_lock + unset_lock + set_lock reload_config firewall fw3 reload unset_lock diff --git a/package/network/ipv6/ipip6/Makefile b/package/network/ipv6/ipip6/Makefile new file mode 100644 index 000000000..4f1469610 --- /dev/null +++ b/package/network/ipv6/ipip6/Makefile @@ -0,0 +1,39 @@ +# +# Copyright (C) 2013 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk + +PKG_NAME:=ipip6 +PKG_RELEASE:=1 + +include $(INCLUDE_DIR)/package.mk + +define Package/ipip6 + SECTION:=net + CATEGORY:=Network + DEPENDS:=@IPV6 +kmod-ip6-tunnel +resolveip + TITLE:=IPv4 over IPv6 (ipip6) configuration support + MAINTAINER:=Missing + PKGARCH:=all +endef + +define Package/ipip6/description +Provides support for IPv4 over IPv6 (ipip6) in /etc/config/network. +endef + +define Build/Compile +endef + +define Build/Configure +endef + +define Package/ipip6/install + $(INSTALL_DIR) $(1)/lib/netifd/proto + $(INSTALL_BIN) ./files/ipip6.sh $(1)/lib/netifd/proto/ipip6.sh +endef + +$(eval $(call BuildPackage,ipip6)) diff --git a/package/network/ipv6/ipip6/files/ipip6.sh b/package/network/ipv6/ipip6/files/ipip6.sh new file mode 100755 index 000000000..6653b29a7 --- /dev/null +++ b/package/network/ipv6/ipip6/files/ipip6.sh @@ -0,0 +1,105 @@ +#!/bin/sh +# ipip6.sh - ipip6 tunnel backend +# Copyright (c) 2013 OpenWrt.org + +[ -n "$INCLUDE_ONLY" ] || { + . /lib/functions.sh + . /lib/functions/network.sh + . ../netifd-proto.sh + init_proto "$@" +} + +proto_ipip6_setup() { + local cfg="$1" + local iface="$2" + local link="ipip6-$cfg" + local remoteip6 + + local mtu ttl peeraddr ip6addr tunlink zone weakif encaplimit ip4ifaddr + json_get_vars mtu ttl peeraddr ip6addr tunlink zone weakif encaplimit ip4ifaddr + + [ -z "$peeraddr" ] && { + proto_notify_error "$cfg" "MISSING_ADDRESS" + proto_block_restart "$cfg" + return + } + + ( proto_add_host_dependency "$cfg" "::" "$tunlink" ) + + remoteip6=$(resolveip -6 "$peeraddr") + if [ -z "$remoteip6" ]; then + sleep 3 + remoteip6=$(resolveip -6 "$peeraddr") + if [ -z "$remoteip6" ]; then + proto_notify_error "$cfg" "AFTR_DNS_FAIL" + return + fi + fi + + for ip6 in $remoteip6; do + peeraddr=$ip6 + break + done + + [ -z "$ip6addr" ] && { + local wanif="$tunlink" + if [ -z "$wanif" ] && ! network_find_wan6 wanif; then + proto_notify_error "$cfg" "NO_WAN_LINK" + return + fi + + if ! network_get_ipaddr6 ip6addr "$wanif"; then + [ -z "$weakif" ] && weakif="lan" + if ! network_get_ipaddr6 ip6addr "$weakif"; then + proto_notify_error "$cfg" "NO_WAN_LINK" + return + fi + fi + } + + proto_init_update "$link" 1 + proto_add_ipv4_route "0.0.0.0" 0 + proto_add_ipv4_address "$ip4ifaddr" "" "" "0.0.0.0" + + proto_add_tunnel + json_add_string mode ipip6 + json_add_int mtu "${mtu:-1280}" + json_add_int ttl "${ttl:-64}" + json_add_string local "$ip6addr" + json_add_string remote "$peeraddr" + [ -n "$tunlink" ] && json_add_string link "$tunlink" + json_add_object "data" + [ -n "$encaplimit" ] && json_add_string encaplimit "$encaplimit" + json_close_object + proto_close_tunnel + + proto_add_data + [ -n "$zone" ] && json_add_string zone "$zone" + + proto_close_data + + proto_send_update "$cfg" +} + +proto_ipip6_teardown() { + local cfg="$1" +} + +proto_ipip6_init_config() { + no_device=1 + available=1 + + proto_config_add_string "ip6addr" + proto_config_add_string "peeraddr" + proto_config_add_string "tunlink" + proto_config_add_int "mtu" + proto_config_add_int "ttl" + proto_config_add_string "encaplimit" + proto_config_add_string "zone" + proto_config_add_string "weakif" + proto_config_add_string "ip4ifaddr" +} + +[ -n "$INCLUDE_ONLY" ] || { + add_protocol ipip6 +} diff --git a/package/network/ipv6/map/Makefile b/package/network/ipv6/map/Makefile index f73b5eefb..cb2b5c579 100644 --- a/package/network/ipv6/map/Makefile +++ b/package/network/ipv6/map/Makefile @@ -17,7 +17,7 @@ include $(INCLUDE_DIR)/cmake.mk define Package/map SECTION:=net CATEGORY:=Network - DEPENDS:=@IPV6 +kmod-ip6-tunnel +libubox +libubus +iptables-mod-conntrack-extra +kmod-nat46 + DEPENDS:=@IPV6 +kmod-ip6-tunnel +libubox +libubus +kmod-nat46 TITLE:=MAP-E/MAP-T and Lightweight 4over6 configuration support MAINTAINER:=Hans Dedecker PROVIDES:=map-t diff --git a/package/network/services/bridger/Makefile b/package/network/services/bridger/Makefile index f8f21be4d..e228de517 100644 --- a/package/network/services/bridger/Makefile +++ b/package/network/services/bridger/Makefile @@ -10,15 +10,17 @@ include $(TOPDIR)/rules.mk PKG_NAME:=bridger PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=https://github.com/nbd168/bridger -PKG_SOURCE_DATE:=2023-01-03 -PKG_SOURCE_VERSION:=978c1f9eed07504cc0b84f72ee7384aab722386a -PKG_MIRROR_HASH:=2a019b188d8de2fdc95453529d1820b0a7a5576adf161bd19e182c9c1c2b2c85 +PKG_SOURCE_DATE:=2023-05-12 +PKG_SOURCE_VERSION:=d0f79a16c749ad310d79e1c31f593860619f99eb +PKG_MIRROR_HASH:=bee35594767cbcd13764f5c95e4837a4fc73171a91fcdae73aaefe00f4e8f8fa PKG_LICENSE:=GPL-2.0 PKG_MAINTAINER:=Felix Fietkau PKG_BUILD_DEPENDS:=bpf-headers +PKG_BUILD_PARALLEL:=1 + include $(INCLUDE_DIR)/package.mk include $(INCLUDE_DIR)/cmake.mk include $(INCLUDE_DIR)/bpf.mk diff --git a/package/network/services/dnsmasq/files/dhcp.conf b/package/network/services/dnsmasq/files/dhcp.conf index 9865eb696..3f054f5fe 100644 --- a/package/network/services/dnsmasq/files/dhcp.conf +++ b/package/network/services/dnsmasq/files/dhcp.conf @@ -31,7 +31,6 @@ config dhcp lan option start 100 option limit 150 option leasetime 12h - option force 1 config dhcp wan option interface wan diff --git a/package/network/services/dnsmasq/files/dnsmasq.init b/package/network/services/dnsmasq/files/dnsmasq.init index 25f670a90..7fa50803f 100755 --- a/package/network/services/dnsmasq/files/dnsmasq.init +++ b/package/network/services/dnsmasq/files/dnsmasq.init @@ -1285,4 +1285,4 @@ stop_service() { else config_foreach dnsmasq_stop dnsmasq fi -} \ No newline at end of file +} diff --git a/package/network/services/fullconenat/Makefile b/package/network/services/fullconenat/Makefile index 94383510d..151b2b70f 100644 --- a/package/network/services/fullconenat/Makefile +++ b/package/network/services/fullconenat/Makefile @@ -28,7 +28,7 @@ define Package/iptables-mod-fullconenat SECTION:=net CATEGORY:=Network TITLE:=FULLCONENAT iptables extension - DEPENDS:=+iptables +kmod-ipt-fullconenat + DEPENDS:=+libxtables +kmod-ipt-fullconenat endef define Package/iptables-mod-fullconenat/install @@ -44,6 +44,7 @@ define KernelPackage/ipt-fullconenat CONFIG_NF_CONNTRACK_EVENTS=y \ CONFIG_NF_CONNTRACK_CHAIN_EVENTS=y FILES:=$(PKG_BUILD_DIR)/xt_FULLCONENAT.ko + AUTOLOAD:=$(call AutoProbe,xt_FULLCONENAT) endef include $(INCLUDE_DIR)/kernel-defaults.mk diff --git a/package/network/services/hostapd/Config.in b/package/network/services/hostapd/Config.in index 87ad7e093..8f28eb2bd 100644 --- a/package/network/services/hostapd/Config.in +++ b/package/network/services/hostapd/Config.in @@ -73,6 +73,11 @@ config WPA_WOLFSSL select WOLFSSL_HAS_SESSION_TICKET select WOLFSSL_HAS_WPAS +config DRIVER_WEXT_SUPPORT + bool + select KERNEL_WIRELESS_EXT + default n + config DRIVER_11AC_SUPPORT bool default n diff --git a/package/network/services/hostapd/Makefile b/package/network/services/hostapd/Makefile index dc2967048..d91ba3dbe 100644 --- a/package/network/services/hostapd/Makefile +++ b/package/network/services/hostapd/Makefile @@ -5,13 +5,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=hostapd -PKG_RELEASE:=1.2 +PKG_RELEASE:=$(AUTORELEASE) PKG_SOURCE_URL:=http://w1.fi/hostap.git PKG_SOURCE_PROTO:=git -PKG_SOURCE_DATE:=2023-03-29 -PKG_SOURCE_VERSION:=bb945b98fefc64887dffb40773a19d77585cee42 -PKG_MIRROR_HASH:=1da8a39c7c81ce257994874402a86d00080a6145b5eb5c5fc44b2fae1853fe8d +PKG_SOURCE_DATE:=2022-07-29 +PKG_SOURCE_VERSION:=b704dc72ef824dfdd96674b90179b274d1d38105 +PKG_MIRROR_HASH:=6c9dd359ef5a4595b6576e07928566d6864957c4af6466d641d6c3f7717f4689 PKG_MAINTAINER:=Felix Fietkau PKG_LICENSE:=BSD-3-Clause @@ -27,6 +27,7 @@ PKG_CONFIG_DEPENDS:= \ CONFIG_PACKAGE_hostapd-basic \ CONFIG_PACKAGE_hostapd-mini \ CONFIG_WPA_RFKILL_SUPPORT \ + CONFIG_DRIVER_WEXT_SUPPORT \ CONFIG_DRIVER_11AC_SUPPORT \ CONFIG_DRIVER_11AX_SUPPORT \ CONFIG_WPA_ENABLE_WEP @@ -86,6 +87,7 @@ DRIVER_MAKEOPTS= \ CONFIG_DRIVER_NL80211=$(CONFIG_PACKAGE_kmod-cfg80211) \ CONFIG_IEEE80211AC=$(HOSTAPD_IEEE80211AC) \ CONFIG_IEEE80211AX=$(HOSTAPD_IEEE80211AX) \ + CONFIG_DRIVER_WEXT=$(CONFIG_DRIVER_WEXT_SUPPORT) \ CONFIG_MBO=$(CONFIG_WPA_MBO_SUPPORT) ifeq ($(SSL_VARIANT),openssl) @@ -139,7 +141,7 @@ ifneq ($(LOCAL_TYPE),hostapd) endif endif -DRV_DEPENDS:=+PACKAGE_kmod-cfg80211:libnl-tiny +DRV_DEPENDS:=+PACKAGE_kmod-cfg80211:libnl-tiny +kmod-cfg80211 define Package/hostapd/Default diff --git a/package/network/services/hostapd/README.md b/package/network/services/hostapd/README.md deleted file mode 100644 index 215086330..000000000 --- a/package/network/services/hostapd/README.md +++ /dev/null @@ -1,419 +0,0 @@ -# UBUS methods - hostapd - -## bss_mgmt_enable -Enable 802.11k/v features. - -### arguments -| Name | Type | Required | Description | -|---|---|---|---| -| neighbor_report | bool | no | enable 802.11k neighbor reports | -| beacon_report | bool | no | enable 802.11k beacon reports | -| link_measurements | bool | no | enable 802.11k link measurements | -| bss_transition | bool | no | enable 802.11v BSS transition support | - -### example -`ubus call hostapd.wl5-fb bss_mgmt_enable '{ "neighbor_report": true, "beacon_report": true, "link_measurements": true, "bss_transition": true -}'` - - -## bss_transition_request -Initiate an 802.11v transition request. - -### arguments -| Name | Type | Required | Description | -|---|---|---|---| -| addr | string | yes | client MAC address | -| disassociation_imminent | bool | no | set Disassociation Imminent bit | -| disassociation_timer | int32 | no | disassociate client if it doesn't roam after this time | -| validity_period | int32 | no | validity of the BSS Transition Candiate List | -| neighbors | array | no | BSS Transition Candidate List | -| abridged | bool | no | prefer APs in the BSS Transition Candidate List | -| dialog_token | int32 | no | identifier for the request/report transaction | -| mbo_reason | int32 | no | MBO Transition Reason Code Attribute | -| cell_pref | int32 | no | MBO Cellular Data Connection Preference Attribute | -| reassoc_delay | int32 | no | MBO Re-association retry delay | - -### example -`ubus call hostapd.wl5-fb bss_transition_request '{ "addr": "68:2F:67:8B:98:ED", "disassociation_imminent": false, "disassociation_timer": 0, "validity_period": 30, "neighbors": ["b6a7b9cbeebabf5900008064090603026a00"], "abridged": 1 }'` - - -## config_add -Dynamically load a BSS configuration from a file. This is used by netifd's mac80211 support script to configure BSSes on multiple PHYs in a single hostapd instance. - -### arguments -| Name | Type | Required | Description | -|---|---|---|---| -| iface | string | yes | WiFi interface name | -| config | string | yes | path to hostapd config file | - - -## config_remove -Dynamically remove a BSS configuration. - -### arguments -| Name | Type | Required | Description | -|---|---|---|---| -| iface | string | yes | WiFi interface name | - - -## del_client -Kick a client off the network. - -### arguments -| Name | Type | Required | Description | -|---|---|---|---| -| addr | string | yes | client MAC address | -| reason | int32 | no | 802.11 reason code | -| deauth | bool | no | deauthenticates client instead of disassociating | -| ban_time | int32 | no | ban client for N milliseconds | - -### example -`ubus call hostapd.wl5-fb del_client '{ "addr": "68:2f:67:8b:98:ed", "reason": 5, "deauth": true, "ban_time": 10000 }'` - - -## get_clients -Show associated clients. - -### example -`ubus call hostapd.wl5-fb get_clients` - -### output -```json -{ - "freq": 5260, - "clients": { - "68:2f:67:8b:98:ed": { - "auth": true, - "assoc": true, - "authorized": true, - "preauth": false, - "wds": false, - "wmm": true, - "ht": true, - "vht": true, - "he": false, - "wps": false, - "mfp": true, - "rrm": [ - 0, - 0, - 0, - 0, - 0 - ], - "extended_capabilities": [ - 0, - 0, - 0, - 0, - 0, - 0, - 0, - 64 - ], - "aid": 3, - "signature": "wifi4|probe:0,1,45,127,107,191,221(0017f2,10),221(001018,2),htcap:006f,htagg:1b,htmcs:0000ffff,vhtcap:0f825832,vhtrxmcs:0000ffea,vhttxmcs:0000ffea,extcap:0000008000000040|assoc:0,1,33,36,48,45,127,191,221(0017f2,10),221(001018,2),221(0050f2,2),htcap:006f,htagg:1b,htmcs:0000ffff,vhtcap:0f825832,vhtrxmcs:0000ffea,vhttxmcs:0000ffea,txpow:14f9,extcap:0000000000000040", - "bytes": { - "rx": 1933667, - "tx": 746805 - }, - "airtime": { - "rx": 208863, - "tx": 9037883 - }, - "packets": { - "rx": 3587, - "tx": 2185 - }, - "rate": { - "rx": 866700, - "tx": 866700 - }, - "signal": -50, - "capabilities": { - "vht": { - "su_beamformee": true, - "mu_beamformee": false, - "mcs_map": { - "rx": { - "1ss": 9, - "2ss": 9, - "3ss": 9, - "4ss": -1, - "5ss": -1, - "6ss": -1, - "7ss": -1, - "8ss": -1 - }, - "tx": { - "1ss": 9, - "2ss": 9, - "3ss": 9, - "4ss": -1, - "5ss": -1, - "6ss": -1, - "7ss": -1, - "8ss": -1 - } - } - } - } - } - } -} -``` - - -## get_features -Show HT/VHT support. - -### example -`ubus call hostapd.wl5-fb get_features` - -### output -```json -{ - "ht_supported": true, - "vht_supported": true -} -``` - - -## get_status -Get BSS status. - -### example -`ubus call hostapd.wl5-fb get_status` - -### output -```json -{ - "status": "ENABLED", - "bssid": "b6:a7:b9:cb:ee:bc", - "ssid": "fb", - "freq": 5260, - "channel": 52, - "op_class": 128, - "beacon_interval": 100, - "phy": "wl5-lan", - "rrm": { - "neighbor_report_tx": 0 - }, - "wnm": { - "bss_transition_query_rx": 0, - "bss_transition_request_tx": 0, - "bss_transition_response_rx": 0 - }, - "airtime": { - "time": 259561738, - "time_busy": 2844249, - "utilization": 0 - }, - "dfs": { - "cac_seconds": 60, - "cac_active": false, - "cac_seconds_left": 0 - } -} -``` - - -## link_measurement_req -Initiate an 802.11k Link Measurement Request. - -### arguments -| Name | Type | Required | Description | -|---|---|---|---| -| addr | string | yes | client MAC address | -| tx-power-used | int32 | no | transmit power used to transmit the Link Measurement Request frame | -| tx-power-max | int32 | no | upper limit of transmit power to be used by the client | - - -## list_bans -List banned clients. - -### example -`ubus call hostapd.wl5-fb list_bans` - -### output -```json -{ - "clients": [ - "68:2f:67:8b:98:ed" - ] -} -``` - - -## notify_response -When enabled, hostapd will send a ubus notification and wait for a response before responding to various requests. This is used by e.g. usteer to make it possible to ignore probe requests. - -:warning: enabling this will cause hostapd to stop responding to probe requests unless a ubus subscriber responds to the ubus notifications. - -### arguments -| Name | Type | Required | Description | -|---|---|---|---| -| notify_response | int32 | yes | disable (0) or enable (!0) | - -### example -`ubus call hostapd.wl5-fb notify_response '{ "notify_response": 1 }'` - -## reload -Reload BSS configuration. - -:warning: this can cause problems for certain configurations: - -``` -Mon May 16 16:09:08 2022 daemon.warn hostapd: Failed to check if DFS is required; ret=-1 -Mon May 16 16:09:08 2022 daemon.warn hostapd: Failed to check if DFS is required; ret=-1 -Mon May 16 16:09:08 2022 daemon.err hostapd: Wrong coupling between HT and VHT/HE channel setting -``` - -### example -`ubus call hostapd.wl5-fb reload` - - -## rrm_beacon_req -Send a Beacon Measurement Request to a client. - -### arguments -| Name | Type | Required | Description | -|---|---|---|---| -| addr | string | yes | client MAC address | -| op_class | int32 | yes | the Regulatory Class for which this Measurement Request applies | -| channel | int32 | yes | channel to measure | -| duration | int32 | yes | compile Beacon Measurement Report after N TU | -| mode | int32 | yes | mode to be used for measurement (0: passive, 1: active, 2: beacon table) | -| bssid | string | no | filter BSSes in Beacon Measurement Report by BSSID | -| ssid | string | no | filter BSSes in Beacon Measurement Report by SSID| - - -## rrm_nr_get_own -Show Neighbor Report Element for this BSS. - -### example -`ubus call hostapd.wl5-fb rrm_nr_get_own` - -### output -```json -{ - "value": [ - "b6:a7:b9:cb:ee:bc", - "fb", - "b6a7b9cbeebcaf5900008095090603029b00" - ] -} -``` - - -## rrm_nr_list -Show Neighbor Report Elements for other BSSes in this ESS. - -### example -`ubus call hostapd.wl5-fb rrm_nr_list` - -### output -```json -{ - "list": [ - [ - "b6:a7:b9:cb:ee:ba", - "fb", - "b6a7b9cbeebabf5900008064090603026a00" - ] - ] -} -``` - -## rrm_nr_set -Set the Neighbor Report Elements. An element for the node on which this command is executed will always be added. - -### arguments -| Name | Type | Required | Description | -|---|---|---|---| -| list | array | yes | array of Neighbor Report Elements in the format of the rrm_nr_list output | - -### example -`ubus call hostapd.wl5-fb rrm_nr_set '{ "list": [ [ "b6:a7:b9:cb:ee:ba", "fb", "b6a7b9cbeebabf5900008064090603026a00" ] ] }'` - - -## set_vendor_elements -Configure Vendor-specific Information Elements for BSS. - -### arguments -| Name | Type | Required | Description | -|---|---|---|---| -| vendor_elements | string | yes | Vendor-specific Information Elements as hex string | - -### example -`ubus call hostapd.wl5-fb set_vendor_elements '{ "vendor_elements": "dd054857dd6662" }'` - - -## switch_chan -Initiate a channel switch. - -:warning: trying to switch to the channel that is currently in use will fail: `Command failed: Operation not supported` - -### arguments -| Name | Type | Required | Description | -|---|---|---|---| -| freq | int32 | yes | frequency in MHz to switch to | -| bcn_count | int32 | no | count in Beacon frames (TBTT) to perform the switch | -| center_freq1 | int32 | no | segment 0 center frequency in MHz (valid for HT and VHT) | -| center_freq2 | int32 | no | segment 1 center frequency in MHz (valid only for 80 MHz channel width and an 80+80 channel) | -| bandwidth | int32 | no | channel width to use | -| sec_channel_offset| int32 | no | secondary channel offset for HT40 (0 = disabled, 1 = HT40+, -1 = HT40-) | -| ht | bool | no | enable 802.11n | -| vht | bool | no | enable 802.11ac | -| he | bool | no | enable 802.11ax | -| block_tx | bool | no | block transmission during CSA period | -| csa_force | bool | no | restart the interface in case the CSA fails | - -## example -`ubus call hostapd.wl5-fb switch_chan '{ "freq": 5180, "bcn_count": 10, "center_freq1": 5210, "bandwidth": 80, "he": 1, "block_tx": 1, "csa_force": 0 }'` - - -## update_airtime -Set dynamic airtime weight for client. - -### arguments -| Name | Type | Required | Description | -|---|---|---|---| -| sta | string | yes | client MAC address | -| weight | int32 | yes | airtime weight | - - -## update_beacon -Force beacon frame content to be updated and to start beaconing on an interface that uses start_disabled=1. - -### example -`ubus call hostapd.wl5-fb update_beacon` - - -## wps_status -Get WPS status for BSS. - -### example -`ubus call hostapd.wl5-fb wps_status` - -### output -```json -{ - "pbc_status": "Disabled", - "last_wps_result": "None" -} -``` - - -## wps_cancel -Cancel WPS Push Button Configuration. - -### example -`ubus call hostapd.wl5-fb wps_cancel` - - -## wps_start -Start WPS Push Button Configuration. - -### example -`ubus call hostapd.wl5-fb wps_start` diff --git a/package/network/services/hostapd/files/hostapd.sh b/package/network/services/hostapd/files/hostapd.sh index bf3625c92..a714356e0 100644 --- a/package/network/services/hostapd/files/hostapd.sh +++ b/package/network/services/hostapd/files/hostapd.sh @@ -116,12 +116,12 @@ hostapd_common_add_device_config() { config_add_int rssi_reject_assoc_rssi config_add_int rssi_ignore_probe_request config_add_int maxassoc + config_add_boolean vendor_vht config_add_string acs_chan_bias config_add_array hostapd_options config_add_int airtime_mode - config_add_int mbssid hostapd_add_log_config } @@ -135,7 +135,7 @@ hostapd_prepare_device_config() { json_get_vars country country3 country_ie beacon_int:100 doth require_mode legacy_rates \ acs_chan_bias local_pwr_constraint spectrum_mgmt_required airtime_mode cell_density \ rts_threshold beacon_rate rssi_reject_assoc_rssi rssi_ignore_probe_request maxassoc \ - mbssid:0 + vendor_vht hostapd_set_log_options base_cfg @@ -204,6 +204,7 @@ hostapd_prepare_device_config() { set_default rate_list "24000 36000 48000 54000" set_default basic_rate_list "24000" fi + [ -n "$vendor_vht" ] && append base_cfg "vendor_vht=$vendor_vht" "$N" ;; a) if [ "$cell_density" -eq 1 ]; then @@ -236,7 +237,6 @@ hostapd_prepare_device_config() { [ -n "$rts_threshold" ] && append base_cfg "rts_threshold=$rts_threshold" "$N" [ "$airtime_mode" -gt 0 ] && append base_cfg "airtime_mode=$airtime_mode" "$N" [ -n "$maxassoc" ] && append base_cfg "iface_max_num_sta=$maxassoc" "$N" - [ "$mbssid" -gt 0 ] && [ "$mbssid" -le 2 ] && append base_cfg "mbssid=$mbssid" "$N" json_get_values opts hostapd_options for val in $opts; do diff --git a/package/network/services/hostapd/files/wpa_supplicant-basic.config b/package/network/services/hostapd/files/wpa_supplicant-basic.config index 944b4d928..6abd8e233 100644 --- a/package/network/services/hostapd/files/wpa_supplicant-basic.config +++ b/package/network/services/hostapd/files/wpa_supplicant-basic.config @@ -26,7 +26,7 @@ # replacement for WEXT and its use allows wpa_supplicant to properly control # the driver to improve existing functionality like roaming and to support new # functionality. -#CONFIG_DRIVER_WEXT=y +CONFIG_DRIVER_WEXT=y # Driver interface for Linux drivers using the nl80211 kernel interface CONFIG_DRIVER_NL80211=y diff --git a/package/network/services/hostapd/files/wpa_supplicant-full.config b/package/network/services/hostapd/files/wpa_supplicant-full.config index b39dabca0..d24fbbb01 100644 --- a/package/network/services/hostapd/files/wpa_supplicant-full.config +++ b/package/network/services/hostapd/files/wpa_supplicant-full.config @@ -26,7 +26,7 @@ # replacement for WEXT and its use allows wpa_supplicant to properly control # the driver to improve existing functionality like roaming and to support new # functionality. -#CONFIG_DRIVER_WEXT=y +CONFIG_DRIVER_WEXT=y # Driver interface for Linux drivers using the nl80211 kernel interface CONFIG_DRIVER_NL80211=y diff --git a/package/network/services/hostapd/files/wpa_supplicant-mini.config b/package/network/services/hostapd/files/wpa_supplicant-mini.config index 2a3f8fb69..9eb1111e5 100644 --- a/package/network/services/hostapd/files/wpa_supplicant-mini.config +++ b/package/network/services/hostapd/files/wpa_supplicant-mini.config @@ -26,7 +26,7 @@ # replacement for WEXT and its use allows wpa_supplicant to properly control # the driver to improve existing functionality like roaming and to support new # functionality. -#CONFIG_DRIVER_WEXT=y +CONFIG_DRIVER_WEXT=y # Driver interface for Linux drivers using the nl80211 kernel interface CONFIG_DRIVER_NL80211=y diff --git a/package/network/services/hostapd/files/wpa_supplicant-p2p.config b/package/network/services/hostapd/files/wpa_supplicant-p2p.config index 7f5140622..0dcc88e64 100644 --- a/package/network/services/hostapd/files/wpa_supplicant-p2p.config +++ b/package/network/services/hostapd/files/wpa_supplicant-p2p.config @@ -26,7 +26,7 @@ # replacement for WEXT and its use allows wpa_supplicant to properly control # the driver to improve existing functionality like roaming and to support new # functionality. -#CONFIG_DRIVER_WEXT=y +CONFIG_DRIVER_WEXT=y # Driver interface for Linux drivers using the nl80211 kernel interface CONFIG_DRIVER_NL80211=y diff --git a/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch b/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch index 761fe368c..6bc48abfb 100644 --- a/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch +++ b/package/network/services/hostapd/patches/010-mesh-Allow-DFS-channels-to-be-selected-if-dfs-is-ena.patch @@ -14,7 +14,7 @@ Signed-off-by: Peter Oh --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -2621,7 +2621,7 @@ static int drv_supports_vht(struct wpa_s +@@ -2436,7 +2436,7 @@ static int drv_supports_vht(struct wpa_s } @@ -23,7 +23,7 @@ Signed-off-by: Peter Oh { int i; -@@ -2630,7 +2630,10 @@ static bool ibss_mesh_is_80mhz_avail(int +@@ -2445,7 +2445,10 @@ static bool ibss_mesh_is_80mhz_avail(int chan = hw_get_channel_chan(mode, i, NULL); if (!chan || @@ -35,16 +35,16 @@ Signed-off-by: Peter Oh return false; } -@@ -2757,7 +2760,7 @@ static void ibss_mesh_select_40mhz(struc - const struct wpa_ssid *ssid, - struct hostapd_hw_modes *mode, - struct hostapd_freq_params *freq, -- int obss_scan) { -+ int obss_scan, bool dfs_enabled) { - int chan_idx; - struct hostapd_channel_data *pri_chan = NULL, *sec_chan = NULL; - int i, res; -@@ -2781,8 +2784,11 @@ static void ibss_mesh_select_40mhz(struc +@@ -2474,6 +2477,8 @@ void ibss_mesh_setup_freq(struct wpa_sup + int chwidth, seg0, seg1; + u32 vht_caps = 0; + bool is_24ghz, is_6ghz; ++ bool dfs_enabled = wpa_s->conf->country[0] && ++ (wpa_s->drv_flags & WPA_DRIVER_FLAGS_RADAR); + + freq->freq = ssid->frequency; + +@@ -2570,8 +2575,11 @@ void ibss_mesh_setup_freq(struct wpa_sup return; /* Check primary channel flags */ @@ -55,9 +55,9 @@ Signed-off-by: Peter Oh + if (!dfs_enabled) + return; - #ifdef CONFIG_HT_OVERRIDES - if (ssid->disable_ht40) -@@ -2808,8 +2814,11 @@ static void ibss_mesh_select_40mhz(struc + freq->channel = pri_chan->chan; + +@@ -2604,8 +2612,11 @@ void ibss_mesh_setup_freq(struct wpa_sup return; /* Check secondary channel flags */ @@ -70,34 +70,25 @@ Signed-off-by: Peter Oh if (ht40 == -1) { if (!(pri_chan->flag & HOSTAPD_CHAN_HT40MINUS)) -@@ -2863,7 +2872,7 @@ static bool ibss_mesh_select_80_160mhz(s - const struct wpa_ssid *ssid, - struct hostapd_hw_modes *mode, - struct hostapd_freq_params *freq, -- int ieee80211_mode, bool is_6ghz) { -+ int ieee80211_mode, bool is_6ghz, bool dfs_enabled) { - static const int bw80[] = { - 5180, 5260, 5500, 5580, 5660, 5745, 5825, - 5955, 6035, 6115, 6195, 6275, 6355, 6435, -@@ -2908,7 +2917,7 @@ static bool ibss_mesh_select_80_160mhz(s - goto skip_80mhz; +@@ -2694,7 +2705,7 @@ skip_to_6ghz: + return; - /* Use 40 MHz if channel not usable */ + /* Back to HT configuration if channel not usable */ - if (!ibss_mesh_is_80mhz_avail(channel, mode)) + if (!ibss_mesh_is_80mhz_avail(channel, mode, dfs_enabled)) - goto skip_80mhz; + return; chwidth = CONF_OPER_CHWIDTH_80MHZ; -@@ -2922,7 +2931,7 @@ static bool ibss_mesh_select_80_160mhz(s - if ((mode->he_capab[ieee80211_mode].phy_cap[ - HE_PHYCAP_CHANNEL_WIDTH_SET_IDX] & - HE_PHYCAP_CHANNEL_WIDTH_SET_160MHZ_IN_5G) && is_6ghz && -- ibss_mesh_is_80mhz_avail(channel + 16, mode)) { -+ ibss_mesh_is_80mhz_avail(channel + 16, mode, dfs_enabled)) { +@@ -2708,7 +2719,7 @@ skip_to_6ghz: + * above; check the remaining four 20 MHz channels for the total + * of 160 MHz bandwidth. + */ +- if (!ibss_mesh_is_80mhz_avail(channel + 16, mode)) ++ if (!ibss_mesh_is_80mhz_avail(channel + 16, mode, dfs_enabled)) + return; + for (j = 0; j < ARRAY_SIZE(bw160); j++) { - if (freq->freq == bw160[j]) { - chwidth = CONF_OPER_CHWIDTH_160MHZ; -@@ -2950,10 +2959,12 @@ static bool ibss_mesh_select_80_160mhz(s +@@ -2738,10 +2749,12 @@ skip_to_6ghz: if (!chan) continue; @@ -113,23 +104,3 @@ Signed-off-by: Peter Oh /* Found a suitable second segment for 80+80 */ chwidth = CONF_OPER_CHWIDTH_80P80MHZ; -@@ -3008,6 +3019,7 @@ void ibss_mesh_setup_freq(struct wpa_sup - int i, obss_scan = 1; - u8 channel; - bool is_6ghz; -+ bool dfs_enabled = wpa_s->conf->country[0] && (wpa_s->drv_flags & WPA_DRIVER_FLAGS_RADAR); - - freq->freq = ssid->frequency; - -@@ -3053,9 +3065,9 @@ void ibss_mesh_setup_freq(struct wpa_sup - freq->channel = channel; - /* Setup higher BW only for 5 GHz */ - if (mode->mode == HOSTAPD_MODE_IEEE80211A) { -- ibss_mesh_select_40mhz(wpa_s, ssid, mode, freq, obss_scan); -+ ibss_mesh_select_40mhz(wpa_s, ssid, mode, freq, obss_scan, dfs_enabled); - if (!ibss_mesh_select_80_160mhz(wpa_s, ssid, mode, freq, -- ieee80211_mode, is_6ghz)) -+ ieee80211_mode, is_6ghz, dfs_enabled)) - freq->he_enabled = freq->vht_enabled = false; - } - diff --git a/package/network/services/hostapd/patches/011-mesh-use-deterministic-channel-on-channel-switch.patch b/package/network/services/hostapd/patches/011-mesh-use-deterministic-channel-on-channel-switch.patch index 20a8bee07..32a447914 100644 --- a/package/network/services/hostapd/patches/011-mesh-use-deterministic-channel-on-channel-switch.patch +++ b/package/network/services/hostapd/patches/011-mesh-use-deterministic-channel-on-channel-switch.patch @@ -29,7 +29,7 @@ Signed-off-by: Markus Theil enum dfs_channel_type { -@@ -521,9 +522,14 @@ dfs_get_valid_channel(struct hostapd_ifa +@@ -515,9 +516,14 @@ dfs_get_valid_channel(struct hostapd_ifa int num_available_chandefs; int chan_idx, chan_idx2; int sec_chan_idx_80p80 = -1; @@ -44,7 +44,7 @@ Signed-off-by: Markus Theil wpa_printf(MSG_DEBUG, "DFS: Selecting random channel"); *secondary_channel = 0; *oper_centr_freq_seg0_idx = 0; -@@ -543,8 +549,20 @@ dfs_get_valid_channel(struct hostapd_ifa +@@ -537,8 +543,20 @@ dfs_get_valid_channel(struct hostapd_ifa if (num_available_chandefs == 0) return NULL; @@ -68,7 +68,7 @@ Signed-off-by: Markus Theil if (!chan) { --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -10739,6 +10739,10 @@ static int nl80211_switch_channel(void * +@@ -9948,6 +9948,10 @@ static int nl80211_switch_channel(void * if (ret) goto error; diff --git a/package/network/services/hostapd/patches/021-fix-sta-add-after-previous-connection.patch b/package/network/services/hostapd/patches/021-fix-sta-add-after-previous-connection.patch index 827e122ba..80b23bdfc 100644 --- a/package/network/services/hostapd/patches/021-fix-sta-add-after-previous-connection.patch +++ b/package/network/services/hostapd/patches/021-fix-sta-add-after-previous-connection.patch @@ -1,6 +1,6 @@ --- a/src/ap/ieee802_11.c +++ b/src/ap/ieee802_11.c -@@ -4168,6 +4168,13 @@ static int add_associated_sta(struct hos +@@ -4963,6 +4963,13 @@ static int add_associated_sta(struct hos * drivers to accept the STA parameter configuration. Since this is * after a new FT-over-DS exchange, a new TK has been derived, so key * reinstallation is not a concern for this case. @@ -14,7 +14,7 @@ */ wpa_printf(MSG_DEBUG, "Add associated STA " MACSTR " (added_unassoc=%d auth_alg=%u ft_over_ds=%u reassoc=%d authorized=%d ft_tk=%d fils_tk=%d)", -@@ -4181,7 +4188,8 @@ static int add_associated_sta(struct hos +@@ -4976,7 +4983,8 @@ static int add_associated_sta(struct hos (!(sta->flags & WLAN_STA_AUTHORIZED) || (reassoc && sta->ft_over_ds && sta->auth_alg == WLAN_AUTH_FT) || (!wpa_auth_sta_ft_tk_already_set(sta->wpa_sm) && diff --git a/package/network/services/hostapd/patches/022-hostapd-fix-use-of-uninitialized-stack-variables.patch b/package/network/services/hostapd/patches/022-hostapd-fix-use-of-uninitialized-stack-variables.patch index f4f56f510..25801da33 100644 --- a/package/network/services/hostapd/patches/022-hostapd-fix-use-of-uninitialized-stack-variables.patch +++ b/package/network/services/hostapd/patches/022-hostapd-fix-use-of-uninitialized-stack-variables.patch @@ -14,7 +14,7 @@ Signed-off-by: Felix Fietkau --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -3562,7 +3562,7 @@ static int hostapd_change_config_freq(st +@@ -3453,7 +3453,7 @@ static int hostapd_change_config_freq(st struct hostapd_freq_params *old_params) { int channel; diff --git a/package/network/services/hostapd/patches/030-driver_nl80211-rewrite-neigh-code-to-not-depend-on-l.patch b/package/network/services/hostapd/patches/030-driver_nl80211-rewrite-neigh-code-to-not-depend-on-l.patch index c02d4b497..988fbbc6f 100644 --- a/package/network/services/hostapd/patches/030-driver_nl80211-rewrite-neigh-code-to-not-depend-on-l.patch +++ b/package/network/services/hostapd/patches/030-driver_nl80211-rewrite-neigh-code-to-not-depend-on-l.patch @@ -20,7 +20,7 @@ Signed-off-by: Felix Fietkau #include #include #include -@@ -5590,26 +5587,29 @@ fail: +@@ -5344,26 +5341,29 @@ fail: static void rtnl_neigh_delete_fdb_entry(struct i802_bss *bss, const u8 *addr) { @@ -64,7 +64,7 @@ Signed-off-by: Felix Fietkau if (err < 0) { wpa_printf(MSG_DEBUG, "nl80211: bridge FDB entry delete for " MACSTR " ifindex=%d failed: %s", MAC2STR(addr), -@@ -5619,9 +5619,8 @@ static void rtnl_neigh_delete_fdb_entry( +@@ -5373,9 +5373,8 @@ static void rtnl_neigh_delete_fdb_entry( MACSTR, MAC2STR(addr)); } @@ -76,7 +76,7 @@ Signed-off-by: Felix Fietkau } -@@ -8275,7 +8274,6 @@ static void *i802_init(struct hostapd_da +@@ -7763,7 +7762,6 @@ static void *i802_init(struct hostapd_da (params->num_bridge == 0 || !params->bridge[0])) add_ifidx(drv, br_ifindex, drv->ifindex); @@ -84,7 +84,7 @@ Signed-off-by: Felix Fietkau if (bss->added_if_into_bridge || bss->already_in_bridge) { int err; -@@ -8292,7 +8290,6 @@ static void *i802_init(struct hostapd_da +@@ -7780,7 +7778,6 @@ static void *i802_init(struct hostapd_da goto failed; } } @@ -92,7 +92,7 @@ Signed-off-by: Felix Fietkau if (drv->capa.flags2 & WPA_DRIVER_FLAGS2_CONTROL_PORT_RX) { wpa_printf(MSG_DEBUG, -@@ -11605,13 +11602,14 @@ static int wpa_driver_br_add_ip_neigh(vo +@@ -10813,13 +10810,14 @@ static int wpa_driver_br_add_ip_neigh(vo const u8 *ipaddr, int prefixlen, const u8 *addr) { @@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau int res; if (!ipaddr || prefixlen == 0 || !addr) -@@ -11630,85 +11628,66 @@ static int wpa_driver_br_add_ip_neigh(vo +@@ -10838,85 +10836,66 @@ static int wpa_driver_br_add_ip_neigh(vo } if (version == 4) { @@ -220,7 +220,7 @@ Signed-off-by: Felix Fietkau addrsize = 16; } else { return -EINVAL; -@@ -11726,41 +11705,30 @@ static int wpa_driver_br_delete_ip_neigh +@@ -10934,41 +10913,30 @@ static int wpa_driver_br_delete_ip_neigh return -1; } diff --git a/package/network/services/hostapd/patches/040-mesh-allow-processing-authentication-frames-in-block.patch b/package/network/services/hostapd/patches/040-mesh-allow-processing-authentication-frames-in-block.patch index 179d47ecc..6b34cd435 100644 --- a/package/network/services/hostapd/patches/040-mesh-allow-processing-authentication-frames-in-block.patch +++ b/package/network/services/hostapd/patches/040-mesh-allow-processing-authentication-frames-in-block.patch @@ -16,7 +16,7 @@ Signed-off-by: Felix Fietkau --- a/src/ap/ieee802_11.c +++ b/src/ap/ieee802_11.c -@@ -2948,15 +2948,6 @@ static void handle_auth(struct hostapd_d +@@ -3781,15 +3781,6 @@ static void handle_auth(struct hostapd_d seq_ctrl); return; } diff --git a/package/network/services/hostapd/patches/050-build_fix.patch b/package/network/services/hostapd/patches/050-build_fix.patch index 8680b07c6..c9268f59e 100644 --- a/package/network/services/hostapd/patches/050-build_fix.patch +++ b/package/network/services/hostapd/patches/050-build_fix.patch @@ -10,7 +10,7 @@ CFLAGS += -DCONFIG_FILS_SK_PFS --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -331,6 +331,7 @@ endif +@@ -320,6 +320,7 @@ endif ifdef CONFIG_FILS CFLAGS += -DCONFIG_FILS NEED_SHA384=y diff --git a/package/network/services/hostapd/patches/110-mbedtls-TLS-crypto-option-initial-port.patch b/package/network/services/hostapd/patches/110-mbedtls-TLS-crypto-option-initial-port.patch index 22107944d..01af14b71 100644 --- a/package/network/services/hostapd/patches/110-mbedtls-TLS-crypto-option-initial-port.patch +++ b/package/network/services/hostapd/patches/110-mbedtls-TLS-crypto-option-initial-port.patch @@ -273,7 +273,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_RADIUS_SERVER CFLAGS += -DRADIUS_SERVER -@@ -1329,7 +1414,9 @@ NOBJS += ../src/utils/trace.o +@@ -1327,7 +1412,9 @@ NOBJS += ../src/utils/trace.o endif HOBJS += hlr_auc_gw.o ../src/utils/common.o ../src/utils/wpa_debug.o ../src/utils/os_$(CONFIG_OS).o ../src/utils/wpabuf.o ../src/crypto/milenage.o @@ -283,7 +283,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_INTERNAL_AES HOBJS += ../src/crypto/aes-internal.o HOBJS += ../src/crypto/aes-internal-enc.o -@@ -1352,13 +1439,17 @@ SOBJS += ../src/common/sae.o +@@ -1350,13 +1437,17 @@ SOBJS += ../src/common/sae.o SOBJS += ../src/common/sae_pk.o SOBJS += ../src/common/dragonfly.o SOBJS += $(AESOBJS) @@ -7765,7 +7765,7 @@ Signed-off-by: Glenn Strauss CONFIG_SIM_SIMULATOR=y --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -1163,6 +1163,29 @@ endif +@@ -1149,6 +1149,29 @@ endif CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONFIG_TLS_DEFAULT_CIPHERS)\" endif @@ -7795,7 +7795,7 @@ Signed-off-by: Glenn Strauss ifeq ($(CONFIG_TLS), gnutls) ifndef CONFIG_CRYPTO # default to libgcrypt -@@ -1355,9 +1378,11 @@ endif +@@ -1341,9 +1364,11 @@ endif ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), wolfssl) @@ -7807,7 +7807,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_OPENSSL_INTERNAL_AES_WRAP # Seems to be needed at least with BoringSSL NEED_INTERNAL_AES_WRAP=y -@@ -1371,9 +1396,11 @@ endif +@@ -1357,9 +1382,11 @@ endif ifdef NEED_INTERNAL_AES_WRAP ifneq ($(CONFIG_TLS), linux) @@ -7819,7 +7819,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_AES_EAX AESOBJS += ../src/crypto/aes-eax.o NEED_AES_CTR=y -@@ -1383,35 +1410,45 @@ AESOBJS += ../src/crypto/aes-siv.o +@@ -1369,35 +1396,45 @@ AESOBJS += ../src/crypto/aes-siv.o NEED_AES_CTR=y endif ifdef NEED_AES_CTR @@ -7865,7 +7865,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_AES_ENC ifdef CONFIG_INTERNAL_AES AESOBJS += ../src/crypto/aes-internal-enc.o -@@ -1426,12 +1463,16 @@ ifneq ($(CONFIG_TLS), openssl) +@@ -1412,12 +1449,16 @@ ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), linux) ifneq ($(CONFIG_TLS), gnutls) ifneq ($(CONFIG_TLS), wolfssl) @@ -7882,7 +7882,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_INTERNAL_SHA1 SHA1OBJS += ../src/crypto/sha1-internal.o ifdef NEED_FIPS186_2_PRF -@@ -1443,29 +1484,37 @@ CFLAGS += -DCONFIG_NO_PBKDF2 +@@ -1429,29 +1470,37 @@ CFLAGS += -DCONFIG_NO_PBKDF2 else ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), wolfssl) @@ -7920,7 +7920,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_MD5 ifdef CONFIG_INTERNAL_MD5 MD5OBJS += ../src/crypto/md5-internal.o -@@ -1520,12 +1569,17 @@ ifneq ($(CONFIG_TLS), openssl) +@@ -1506,12 +1555,17 @@ ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), linux) ifneq ($(CONFIG_TLS), gnutls) ifneq ($(CONFIG_TLS), wolfssl) @@ -7938,7 +7938,7 @@ Signed-off-by: Glenn Strauss ifdef CONFIG_INTERNAL_SHA256 SHA256OBJS += ../src/crypto/sha256-internal.o endif -@@ -1538,50 +1592,68 @@ CFLAGS += -DCONFIG_INTERNAL_SHA512 +@@ -1524,50 +1578,68 @@ CFLAGS += -DCONFIG_INTERNAL_SHA512 SHA256OBJS += ../src/crypto/sha512-internal.o endif ifdef NEED_TLS_PRF_SHA256 @@ -8007,7 +8007,7 @@ Signed-off-by: Glenn Strauss ifdef NEED_ASN1 OBJS += ../src/tls/asn1.o -@@ -1756,10 +1828,12 @@ ifdef CONFIG_FIPS +@@ -1742,10 +1814,12 @@ ifdef CONFIG_FIPS CFLAGS += -DCONFIG_FIPS ifneq ($(CONFIG_TLS), openssl) ifneq ($(CONFIG_TLS), wolfssl) diff --git a/package/network/services/hostapd/patches/120-mbedtls-fips186_2_prf.patch b/package/network/services/hostapd/patches/120-mbedtls-fips186_2_prf.patch index a48725264..a0d287086 100644 --- a/package/network/services/hostapd/patches/120-mbedtls-fips186_2_prf.patch +++ b/package/network/services/hostapd/patches/120-mbedtls-fips186_2_prf.patch @@ -101,7 +101,7 @@ Signed-off-by: Glenn Strauss --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -1174,10 +1174,6 @@ endif +@@ -1160,10 +1160,6 @@ endif OBJS += ../src/crypto/crypto_$(CONFIG_CRYPTO).o OBJS_p += ../src/crypto/crypto_$(CONFIG_CRYPTO).o OBJS_priv += ../src/crypto/crypto_$(CONFIG_CRYPTO).o diff --git a/package/network/services/hostapd/patches/140-tests-Makefile-make-run-tests-with-CONFIG_TLS.patch b/package/network/services/hostapd/patches/140-tests-Makefile-make-run-tests-with-CONFIG_TLS.patch index 148c268f9..9e9e88c1e 100644 --- a/package/network/services/hostapd/patches/140-tests-Makefile-make-run-tests-with-CONFIG_TLS.patch +++ b/package/network/services/hostapd/patches/140-tests-Makefile-make-run-tests-with-CONFIG_TLS.patch @@ -727,7 +727,7 @@ Signed-off-by: Glenn Strauss def check_ec_support(dev): tls = dev.request("GET tls_library") -@@ -1595,7 +1638,7 @@ def test_ap_wpa2_eap_ttls_pap_subject_ma +@@ -1625,7 +1668,7 @@ def test_ap_wpa2_eap_ttls_pap_subject_ma eap_connect(dev[0], hapd, "TTLS", "pap user", anonymous_identity="ttls", password="password", ca_cert="auth_serv/ca.pem", phase2="auth=PAP", @@ -736,7 +736,7 @@ Signed-off-by: Glenn Strauss altsubject_match="EMAIL:noone@example.com;DNS:server.w1.fi;URI:http://example.com/") eap_reauth(dev[0], "TTLS") -@@ -2830,6 +2873,7 @@ def test_ap_wpa2_eap_tls_neg_domain_matc +@@ -2860,6 +2903,7 @@ def test_ap_wpa2_eap_tls_neg_domain_matc def test_ap_wpa2_eap_tls_neg_subject_match(dev, apdev): """WPA2-Enterprise negative test - subject mismatch""" @@ -744,7 +744,7 @@ Signed-off-by: Glenn Strauss params = hostapd.wpa2_eap_params(ssid="test-wpa2-eap") hostapd.add_ap(apdev[0], params) dev[0].connect("test-wpa2-eap", key_mgmt="WPA-EAP", eap="TTLS", -@@ -2890,6 +2934,7 @@ def test_ap_wpa2_eap_tls_neg_subject_mat +@@ -2920,6 +2964,7 @@ def test_ap_wpa2_eap_tls_neg_subject_mat def test_ap_wpa2_eap_tls_neg_altsubject_match(dev, apdev): """WPA2-Enterprise negative test - altsubject mismatch""" @@ -752,7 +752,7 @@ Signed-off-by: Glenn Strauss params = hostapd.wpa2_eap_params(ssid="test-wpa2-eap") hostapd.add_ap(apdev[0], params) -@@ -3430,7 +3475,7 @@ def test_ap_wpa2_eap_ikev2_oom(dev, apde +@@ -3460,7 +3505,7 @@ def test_ap_wpa2_eap_ikev2_oom(dev, apde dev[0].request("REMOVE_NETWORK all") tls = dev[0].request("GET tls_library") @@ -761,7 +761,7 @@ Signed-off-by: Glenn Strauss tests = [(1, "os_get_random;dh_init")] else: tests = [(1, "crypto_dh_init;dh_init")] -@@ -4744,7 +4789,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca +@@ -4774,7 +4819,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca params["private_key"] = "auth_serv/iCA-server/server.key" hostapd.add_ap(apdev[0], params) tls = dev[0].request("GET tls_library") @@ -770,7 +770,7 @@ Signed-off-by: Glenn Strauss ca_cert = "auth_serv/iCA-user/ca-and-root.pem" client_cert = "auth_serv/iCA-user/user_and_ica.pem" else: -@@ -4810,6 +4855,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca +@@ -4840,6 +4885,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca run_ap_wpa2_eap_tls_intermediate_ca_ocsp(dev, apdev, params, "-sha1") def run_ap_wpa2_eap_tls_intermediate_ca_ocsp(dev, apdev, params, md): @@ -778,7 +778,7 @@ Signed-off-by: Glenn Strauss params = int_eap_server_params() params["ca_cert"] = "auth_serv/iCA-server/ca-and-root.pem" params["server_cert"] = "auth_serv/iCA-server/server.pem" -@@ -4819,7 +4865,7 @@ def run_ap_wpa2_eap_tls_intermediate_ca_ +@@ -4849,7 +4895,7 @@ def run_ap_wpa2_eap_tls_intermediate_ca_ try: hostapd.add_ap(apdev[0], params) tls = dev[0].request("GET tls_library") @@ -787,7 +787,7 @@ Signed-off-by: Glenn Strauss ca_cert = "auth_serv/iCA-user/ca-and-root.pem" client_cert = "auth_serv/iCA-user/user_and_ica.pem" else: -@@ -4855,7 +4901,7 @@ def run_ap_wpa2_eap_tls_intermediate_ca_ +@@ -4885,7 +4931,7 @@ def run_ap_wpa2_eap_tls_intermediate_ca_ try: hostapd.add_ap(apdev[0], params) tls = dev[0].request("GET tls_library") @@ -796,7 +796,7 @@ Signed-off-by: Glenn Strauss ca_cert = "auth_serv/iCA-user/ca-and-root.pem" client_cert = "auth_serv/iCA-user/user_and_ica.pem" else: -@@ -4905,7 +4951,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca +@@ -4935,7 +4981,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca try: hostapd.add_ap(apdev[0], params) tls = dev[0].request("GET tls_library") @@ -805,7 +805,7 @@ Signed-off-by: Glenn Strauss ca_cert = "auth_serv/iCA-user/ca-and-root.pem" client_cert = "auth_serv/iCA-user/user_and_ica.pem" else: -@@ -4972,7 +5018,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca +@@ -5002,7 +5048,7 @@ def test_ap_wpa2_eap_tls_intermediate_ca hostapd.add_ap(apdev[0], params) tls = dev[0].request("GET tls_library") @@ -814,7 +814,7 @@ Signed-off-by: Glenn Strauss ca_cert = "auth_serv/iCA-user/ca-and-root.pem" client_cert = "auth_serv/iCA-user/user_and_ica.pem" else: -@@ -5230,6 +5276,7 @@ def test_ap_wpa2_eap_ttls_server_cert_ek +@@ -5260,6 +5306,7 @@ def test_ap_wpa2_eap_ttls_server_cert_ek def test_ap_wpa2_eap_ttls_server_pkcs12(dev, apdev): """WPA2-Enterprise using EAP-TTLS and server PKCS#12 file""" @@ -822,7 +822,7 @@ Signed-off-by: Glenn Strauss skip_with_fips(dev[0]) params = int_eap_server_params() del params["server_cert"] -@@ -5242,6 +5289,7 @@ def test_ap_wpa2_eap_ttls_server_pkcs12( +@@ -5272,6 +5319,7 @@ def test_ap_wpa2_eap_ttls_server_pkcs12( def test_ap_wpa2_eap_ttls_server_pkcs12_extra(dev, apdev): """EAP-TTLS and server PKCS#12 file with extra certs""" @@ -830,7 +830,7 @@ Signed-off-by: Glenn Strauss skip_with_fips(dev[0]) params = int_eap_server_params() del params["server_cert"] -@@ -5264,6 +5312,7 @@ def test_ap_wpa2_eap_ttls_dh_params_serv +@@ -5294,6 +5342,7 @@ def test_ap_wpa2_eap_ttls_dh_params_serv def test_ap_wpa2_eap_ttls_dh_params_dsa_server(dev, apdev): """WPA2-Enterprise using EAP-TTLS and alternative server dhparams (DSA)""" @@ -838,7 +838,7 @@ Signed-off-by: Glenn Strauss params = int_eap_server_params() params["dh_file"] = "auth_serv/dsaparam.pem" hapd = hostapd.add_ap(apdev[0], params) -@@ -5575,8 +5624,8 @@ def test_ap_wpa2_eap_non_ascii_identity2 +@@ -5605,8 +5654,8 @@ def test_ap_wpa2_eap_non_ascii_identity2 def test_openssl_cipher_suite_config_wpas(dev, apdev): """OpenSSL cipher suite configuration on wpa_supplicant""" tls = dev[0].request("GET tls_library") @@ -849,7 +849,7 @@ Signed-off-by: Glenn Strauss params = hostapd.wpa2_eap_params(ssid="test-wpa2-eap") hapd = hostapd.add_ap(apdev[0], params) eap_connect(dev[0], hapd, "TTLS", "pap user", -@@ -5602,14 +5651,14 @@ def test_openssl_cipher_suite_config_wpa +@@ -5632,14 +5681,14 @@ def test_openssl_cipher_suite_config_wpa def test_openssl_cipher_suite_config_hapd(dev, apdev): """OpenSSL cipher suite configuration on hostapd""" tls = dev[0].request("GET tls_library") @@ -868,7 +868,7 @@ Signed-off-by: Glenn Strauss eap_connect(dev[0], hapd, "TTLS", "pap user", anonymous_identity="ttls", password="password", ca_cert="auth_serv/ca.pem", phase2="auth=PAP") -@@ -6051,13 +6100,17 @@ def test_ap_wpa2_eap_tls_versions(dev, a +@@ -6081,13 +6130,17 @@ def test_ap_wpa2_eap_tls_versions(dev, a check_tls_ver(dev[0], hapd, "tls_disable_tlsv1_0=1 tls_disable_tlsv1_1=1", "TLSv1.2") @@ -891,7 +891,7 @@ Signed-off-by: Glenn Strauss if "run=OpenSSL 1.1.1" in tls or "run=OpenSSL 3.0" in tls: check_tls_ver(dev[0], hapd, "tls_disable_tlsv1_0=1 tls_disable_tlsv1_1=1 tls_disable_tlsv1_2=1 tls_disable_tlsv1_3=0", "TLSv1.3") -@@ -6079,6 +6132,11 @@ def test_ap_wpa2_eap_tls_versions_server +@@ -6109,6 +6162,11 @@ def test_ap_wpa2_eap_tls_versions_server tests = [("TLSv1", "[ENABLE-TLSv1.0][DISABLE-TLSv1.1][DISABLE-TLSv1.2][DISABLE-TLSv1.3]"), ("TLSv1.1", "[ENABLE-TLSv1.0][ENABLE-TLSv1.1][DISABLE-TLSv1.2][DISABLE-TLSv1.3]"), ("TLSv1.2", "[ENABLE-TLSv1.0][ENABLE-TLSv1.1][ENABLE-TLSv1.2][DISABLE-TLSv1.3]")] @@ -903,7 +903,7 @@ Signed-off-by: Glenn Strauss for exp, flags in tests: hapd.disable() hapd.set("tls_flags", flags) -@@ -7115,6 +7173,7 @@ def test_ap_wpa2_eap_assoc_rsn(dev, apde +@@ -7145,6 +7203,7 @@ def test_ap_wpa2_eap_assoc_rsn(dev, apde def test_eap_tls_ext_cert_check(dev, apdev): """EAP-TLS and external server certification validation""" # With internal server certificate chain validation @@ -911,7 +911,7 @@ Signed-off-by: Glenn Strauss id = dev[0].connect("test-wpa2-eap", key_mgmt="WPA-EAP", eap="TLS", identity="tls user", ca_cert="auth_serv/ca.pem", -@@ -7127,6 +7186,7 @@ def test_eap_tls_ext_cert_check(dev, apd +@@ -7157,6 +7216,7 @@ def test_eap_tls_ext_cert_check(dev, apd def test_eap_ttls_ext_cert_check(dev, apdev): """EAP-TTLS and external server certification validation""" # Without internal server certificate chain validation @@ -919,7 +919,7 @@ Signed-off-by: Glenn Strauss id = dev[0].connect("test-wpa2-eap", key_mgmt="WPA-EAP", eap="TTLS", identity="pap user", anonymous_identity="ttls", password="password", phase2="auth=PAP", -@@ -7137,6 +7197,7 @@ def test_eap_ttls_ext_cert_check(dev, ap +@@ -7167,6 +7227,7 @@ def test_eap_ttls_ext_cert_check(dev, ap def test_eap_peap_ext_cert_check(dev, apdev): """EAP-PEAP and external server certification validation""" # With internal server certificate chain validation @@ -927,7 +927,7 @@ Signed-off-by: Glenn Strauss id = dev[0].connect("test-wpa2-eap", key_mgmt="WPA-EAP", eap="PEAP", identity="user", anonymous_identity="peap", ca_cert="auth_serv/ca.pem", -@@ -7147,6 +7208,7 @@ def test_eap_peap_ext_cert_check(dev, ap +@@ -7177,6 +7238,7 @@ def test_eap_peap_ext_cert_check(dev, ap def test_eap_fast_ext_cert_check(dev, apdev): """EAP-FAST and external server certification validation""" @@ -935,7 +935,7 @@ Signed-off-by: Glenn Strauss check_eap_capa(dev[0], "FAST") # With internal server certificate chain validation dev[0].request("SET blob fast_pac_auth_ext ") -@@ -7161,10 +7223,6 @@ def test_eap_fast_ext_cert_check(dev, ap +@@ -7191,10 +7253,6 @@ def test_eap_fast_ext_cert_check(dev, ap run_ext_cert_check(dev, apdev, id) def run_ext_cert_check(dev, apdev, net_id): @@ -948,7 +948,7 @@ Signed-off-by: Glenn Strauss --- a/tests/hwsim/test_ap_ft.py +++ b/tests/hwsim/test_ap_ft.py -@@ -2471,11 +2471,11 @@ def test_ap_ft_ap_oom5(dev, apdev): +@@ -2347,11 +2347,11 @@ def test_ap_ft_ap_oom5(dev, apdev): # This will fail to roam dev[0].roam(bssid1, check_bssid=False) @@ -992,7 +992,7 @@ Signed-off-by: Glenn Strauss raise HwsimSkip("Crypto library does not support Brainpool curves: " + tls) capa = dev.request("GET_CAPABILITY dpp") ver = 1 -@@ -3892,6 +3893,9 @@ def test_dpp_proto_auth_req_no_i_proto_k +@@ -3621,6 +3622,9 @@ def test_dpp_proto_auth_req_no_i_proto_k def test_dpp_proto_auth_req_invalid_i_proto_key(dev, apdev): """DPP protocol testing - invalid I-proto key in Auth Req""" @@ -1002,7 +1002,7 @@ Signed-off-by: Glenn Strauss run_dpp_proto_auth_req_missing(dev, 66, "Invalid Initiator Protocol Key") def test_dpp_proto_auth_req_no_i_nonce(dev, apdev): -@@ -3987,7 +3991,12 @@ def test_dpp_proto_auth_resp_no_r_proto_ +@@ -3716,7 +3720,12 @@ def test_dpp_proto_auth_resp_no_r_proto_ def test_dpp_proto_auth_resp_invalid_r_proto_key(dev, apdev): """DPP protocol testing - invalid R-Proto Key in Auth Resp""" @@ -1016,7 +1016,7 @@ Signed-off-by: Glenn Strauss def test_dpp_proto_auth_resp_no_r_nonce(dev, apdev): """DPP protocol testing - no R-nonce in Auth Resp""" -@@ -4349,11 +4358,17 @@ def test_dpp_proto_pkex_exchange_resp_in +@@ -4078,11 +4087,17 @@ def test_dpp_proto_pkex_exchange_resp_in def test_dpp_proto_pkex_cr_req_invalid_bootstrap_key(dev, apdev): """DPP protocol testing - invalid Bootstrap Key in PKEX Commit-Reveal Request""" @@ -1106,7 +1106,7 @@ Signed-off-by: Glenn Strauss raise HwsimSkip("EC group not supported") --- a/tests/hwsim/test_pmksa_cache.py +++ b/tests/hwsim/test_pmksa_cache.py -@@ -955,7 +955,7 @@ def test_pmksa_cache_preauth_wpas_oom(de +@@ -954,7 +954,7 @@ def test_pmksa_cache_preauth_wpas_oom(de eap_connect(dev[0], hapd, "PAX", "pax.user@example.com", password_hex="0123456789abcdef0123456789abcdef", bssid=apdev[0]['bssid']) @@ -1115,7 +1115,7 @@ Signed-off-by: Glenn Strauss with alloc_fail(dev[0], i, "rsn_preauth_init"): res = dev[0].request("PREAUTH f2:11:22:33:44:55").strip() logger.info("Iteration %d - PREAUTH command results: %s" % (i, res)) -@@ -963,7 +963,7 @@ def test_pmksa_cache_preauth_wpas_oom(de +@@ -962,7 +962,7 @@ def test_pmksa_cache_preauth_wpas_oom(de state = dev[0].request('GET_ALLOC_FAIL') if state.startswith('0:'): break @@ -1138,7 +1138,7 @@ Signed-off-by: Glenn Strauss heavy_groups = [14, 15, 16] suitable_groups = [15, 16, 17, 18, 19, 20, 21] groups = [str(g) for g in sae_groups] -@@ -2188,6 +2193,8 @@ def run_sae_pwe_group(dev, apdev, group) +@@ -2122,6 +2127,8 @@ def run_sae_pwe_group(dev, apdev, group) logger.info("Add Brainpool EC groups since OpenSSL is new enough") elif tls.startswith("wolfSSL"): logger.info("Make sure Brainpool EC groups were enabled when compiling wolfSSL") @@ -1149,7 +1149,7 @@ Signed-off-by: Glenn Strauss start_sae_pwe_ap(apdev[0], group, 2) --- a/tests/hwsim/test_suite_b.py +++ b/tests/hwsim/test_suite_b.py -@@ -27,6 +27,8 @@ def check_suite_b_tls_lib(dev, dhe=False +@@ -26,6 +26,8 @@ def check_suite_b_tls_lib(dev, dhe=False return if tls.startswith("wolfSSL"): return @@ -1158,7 +1158,7 @@ Signed-off-by: Glenn Strauss if not tls.startswith("OpenSSL"): raise HwsimSkip("TLS library not supported for Suite B: " + tls) supported = False -@@ -520,6 +522,7 @@ def test_suite_b_192_rsa_insufficient_dh +@@ -499,6 +501,7 @@ def test_suite_b_192_rsa_insufficient_dh dev[0].connect("test-suite-b", key_mgmt="WPA-EAP-SUITE-B-192", ieee80211w="2", @@ -1168,7 +1168,7 @@ Signed-off-by: Glenn Strauss ca_cert="auth_serv/rsa3072-ca.pem", --- a/tests/hwsim/test_wpas_ctrl.py +++ b/tests/hwsim/test_wpas_ctrl.py -@@ -1842,7 +1842,7 @@ def _test_wpas_ctrl_oom(dev): +@@ -1834,7 +1834,7 @@ def _test_wpas_ctrl_oom(dev): tls = dev[0].request("GET tls_library") if not tls.startswith("internal"): tests.append(('NFC_GET_HANDOVER_SEL NDEF P2P-CR-TAG', 'FAIL', @@ -1179,7 +1179,7 @@ Signed-off-by: Glenn Strauss res = dev[0].request(cmd) --- a/tests/hwsim/utils.py +++ b/tests/hwsim/utils.py -@@ -141,7 +141,13 @@ def check_imsi_privacy_support(dev): +@@ -135,7 +135,13 @@ def check_fils_sk_pfs_capa(dev): def check_tls_tod(dev): tls = dev.request("GET tls_library") @@ -1308,7 +1308,7 @@ Signed-off-by: Glenn Strauss if (need_more_data) { --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -1122,6 +1122,7 @@ CFLAGS += -DCONFIG_TLSV12 +@@ -1108,6 +1108,7 @@ CFLAGS += -DCONFIG_TLSV12 endif ifeq ($(CONFIG_TLS), wolfssl) @@ -1316,7 +1316,7 @@ Signed-off-by: Glenn Strauss ifdef TLS_FUNCS CFLAGS += -DWOLFSSL_DER_LOAD OBJS += ../src/crypto/tls_wolfssl.o -@@ -1137,6 +1138,7 @@ LIBS_p += -lwolfssl -lm +@@ -1123,6 +1124,7 @@ LIBS_p += -lwolfssl -lm endif ifeq ($(CONFIG_TLS), openssl) @@ -1324,7 +1324,7 @@ Signed-off-by: Glenn Strauss CFLAGS += -DCRYPTO_RSA_OAEP_SHA256 ifdef TLS_FUNCS CFLAGS += -DEAP_TLS_OPENSSL -@@ -1164,6 +1166,7 @@ CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONF +@@ -1150,6 +1152,7 @@ CFLAGS += -DTLS_DEFAULT_CIPHERS=\"$(CONF endif ifeq ($(CONFIG_TLS), mbedtls) @@ -1332,7 +1332,7 @@ Signed-off-by: Glenn Strauss ifndef CONFIG_CRYPTO CONFIG_CRYPTO=mbedtls endif -@@ -1183,6 +1186,7 @@ endif +@@ -1169,6 +1172,7 @@ endif endif ifeq ($(CONFIG_TLS), gnutls) @@ -1340,7 +1340,7 @@ Signed-off-by: Glenn Strauss ifndef CONFIG_CRYPTO # default to libgcrypt CONFIG_CRYPTO=gnutls -@@ -1213,6 +1217,7 @@ endif +@@ -1199,6 +1203,7 @@ endif endif ifeq ($(CONFIG_TLS), internal) @@ -1348,7 +1348,7 @@ Signed-off-by: Glenn Strauss ifndef CONFIG_CRYPTO CONFIG_CRYPTO=internal endif -@@ -1293,6 +1298,7 @@ endif +@@ -1279,6 +1284,7 @@ endif endif ifeq ($(CONFIG_TLS), linux) diff --git a/package/network/services/hostapd/patches/150-add-NULL-checks-encountered-during-tests-hwsim.patch b/package/network/services/hostapd/patches/150-add-NULL-checks-encountered-during-tests-hwsim.patch index c8c3ff33f..361f72614 100644 --- a/package/network/services/hostapd/patches/150-add-NULL-checks-encountered-during-tests-hwsim.patch +++ b/package/network/services/hostapd/patches/150-add-NULL-checks-encountered-during-tests-hwsim.patch @@ -14,7 +14,7 @@ Signed-off-by: Glenn Strauss --- a/src/common/dpp_crypto.c +++ b/src/common/dpp_crypto.c -@@ -269,6 +269,12 @@ int dpp_get_pubkey_hash(struct crypto_ec +@@ -248,6 +248,12 @@ struct crypto_ec_key * dpp_set_pubkey_po struct crypto_ec_key * dpp_gen_keypair(const struct dpp_curve_params *curve) { diff --git a/package/network/services/hostapd/patches/160-dpp_pkex-EC-point-mul-w-value-prime.patch b/package/network/services/hostapd/patches/160-dpp_pkex-EC-point-mul-w-value-prime.patch index db4fcfe23..56ae8d0b8 100644 --- a/package/network/services/hostapd/patches/160-dpp_pkex-EC-point-mul-w-value-prime.patch +++ b/package/network/services/hostapd/patches/160-dpp_pkex-EC-point-mul-w-value-prime.patch @@ -13,7 +13,7 @@ Signed-off-by: Glenn Strauss --- a/src/common/dpp_crypto.c +++ b/src/common/dpp_crypto.c -@@ -1588,7 +1588,9 @@ dpp_pkex_derive_Qr(const struct dpp_curv +@@ -1567,7 +1567,9 @@ dpp_pkex_derive_Qr(const struct dpp_curv Pr = crypto_ec_key_get_public_key(Pr_key); Qr = crypto_ec_point_init(ec); hash_bn = crypto_bignum_init_set(hash, curve->hash_len); diff --git a/package/network/services/hostapd/patches/170-DPP-fix-memleak-of-intro.peer_key.patch b/package/network/services/hostapd/patches/170-DPP-fix-memleak-of-intro.peer_key.patch new file mode 100644 index 000000000..157347d6d --- /dev/null +++ b/package/network/services/hostapd/patches/170-DPP-fix-memleak-of-intro.peer_key.patch @@ -0,0 +1,32 @@ +From 639bb1bb912029ec4ff110c3ed807b62f583d6bf Mon Sep 17 00:00:00 2001 +From: Glenn Strauss +Date: Sun, 9 Oct 2022 04:02:44 -0400 +Subject: [PATCH 7/7] DPP: fix memleak of intro.peer_key + +fix memleak of intro.peer_key in wpas_dpp_rx_peer_disc_resp() + +Signed-off-by: Glenn Strauss +--- + wpa_supplicant/dpp_supplicant.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/wpa_supplicant/dpp_supplicant.c ++++ b/wpa_supplicant/dpp_supplicant.c +@@ -2610,6 +2610,8 @@ static void wpas_dpp_rx_peer_disc_resp(s + return; + } + ++ os_memset(&intro, 0, sizeof(intro)); ++ + trans_id = dpp_get_attr(buf, len, DPP_ATTR_TRANSACTION_ID, + &trans_id_len); + if (!trans_id || trans_id_len != 1) { +@@ -2720,7 +2722,7 @@ static void wpas_dpp_rx_peer_disc_resp(s + wpa_supplicant_req_scan(wpa_s, 0, 0); + } + fail: +- os_memset(&intro, 0, sizeof(intro)); ++ dpp_peer_intro_deinit(&intro); + } + + diff --git a/package/network/services/hostapd/patches/170-wpa_supplicant-fix-compiling-without-IEEE8021X_EAPOL.patch b/package/network/services/hostapd/patches/170-wpa_supplicant-fix-compiling-without-IEEE8021X_EAPOL.patch deleted file mode 100644 index 7724f1ae8..000000000 --- a/package/network/services/hostapd/patches/170-wpa_supplicant-fix-compiling-without-IEEE8021X_EAPOL.patch +++ /dev/null @@ -1,41 +0,0 @@ -From c85ce84d942e1eabde33e120b18e5b1f1637b76e Mon Sep 17 00:00:00 2001 -From: Nick Hainke -Date: Tue, 14 Mar 2023 21:40:53 +0100 -Subject: [PATCH] wpa_supplicant: fix compiling without IEEE8021X_EAPOL - -If IEEE8021X_EAPOL is not defined wpa_supplicant will not compile with -following error: - - events.c: In function 'wpa_supplicant_connect': - events.c:1827:14: warning: implicit declaration of function 'eap_is_wps_pbc_enrollee' [-Wimplicit-function-declaration] - 1827 | if ((eap_is_wps_pbc_enrollee(&ssid->eap) && - | ^~~~~~~~~~~~~~~~~~~~~~~ - events.c:1827:43: error: 'struct wpa_ssid' has no member named 'eap' - 1827 | if ((eap_is_wps_pbc_enrollee(&ssid->eap) && - | ^~ - -Adding ifdef statements around the calling function fixes the issue. - -Signed-off-by: Nick Hainke ---- - wpa_supplicant/events.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/wpa_supplicant/events.c -+++ b/wpa_supplicant/events.c -@@ -1824,6 +1824,7 @@ int wpa_supplicant_connect(struct wpa_su - struct wpa_bss *selected, - struct wpa_ssid *ssid) - { -+#ifdef IEEE8021X_EAPOL - if ((eap_is_wps_pbc_enrollee(&ssid->eap) && - wpas_wps_partner_link_overlap_detect(wpa_s)) || - wpas_wps_scan_pbc_overlap(wpa_s, selected, ssid)) { -@@ -1846,6 +1847,7 @@ int wpa_supplicant_connect(struct wpa_su - #endif /* CONFIG_WPS */ - return -1; - } -+#endif /* IEEE8021X_EAPOL */ - - wpa_msg(wpa_s, MSG_DEBUG, - "Considering connect request: reassociate: %d selected: " diff --git a/package/network/services/hostapd/patches/200-multicall.patch b/package/network/services/hostapd/patches/200-multicall.patch index f12aeb0ca..0db8caa20 100644 --- a/package/network/services/hostapd/patches/200-multicall.patch +++ b/package/network/services/hostapd/patches/200-multicall.patch @@ -36,7 +36,7 @@ LIBS += $(DRV_AP_LIBS) ifdef CONFIG_L2_PACKET -@@ -1380,6 +1386,12 @@ install: $(addprefix $(DESTDIR)$(BINDIR) +@@ -1378,6 +1384,12 @@ install: $(addprefix $(DESTDIR)$(BINDIR) _OBJS_VAR := OBJS include ../src/objs.mk @@ -49,7 +49,7 @@ hostapd: $(OBJS) $(Q)$(CC) $(LDFLAGS) -o hostapd $(OBJS) $(LIBS) @$(E) " LD " $@ -@@ -1460,6 +1472,12 @@ include ../src/objs.mk +@@ -1458,6 +1470,12 @@ include ../src/objs.mk _OBJS_VAR := SOBJS include ../src/objs.mk @@ -71,8 +71,8 @@ +-include $(if $(MULTICALL),../hostapd/.config) include ../src/build.rules - ifdef CONFIG_BUILD_PASN_SO -@@ -382,7 +383,9 @@ endif + ifdef CONFIG_BUILD_WPA_CLIENT_SO +@@ -371,7 +372,9 @@ endif ifdef CONFIG_IBSS_RSN NEED_RSN_AUTHENTICATOR=y CFLAGS += -DCONFIG_IBSS_RSN @@ -82,7 +82,7 @@ OBJS += ibss_rsn.o endif -@@ -924,6 +927,10 @@ ifdef CONFIG_DYNAMIC_EAP_METHODS +@@ -912,6 +915,10 @@ ifdef CONFIG_DYNAMIC_EAP_METHODS CFLAGS += -DCONFIG_DYNAMIC_EAP_METHODS LIBS += -ldl -rdynamic endif @@ -93,7 +93,7 @@ endif ifdef CONFIG_AP -@@ -931,9 +938,11 @@ NEED_EAP_COMMON=y +@@ -919,9 +926,11 @@ NEED_EAP_COMMON=y NEED_RSN_AUTHENTICATOR=y CFLAGS += -DCONFIG_AP OBJS += ap.o @@ -105,7 +105,7 @@ OBJS += ../src/ap/hostapd.o OBJS += ../src/ap/wpa_auth_glue.o OBJS += ../src/ap/utils.o -@@ -1022,6 +1031,12 @@ endif +@@ -1008,6 +1017,12 @@ endif ifdef CONFIG_HS20 OBJS += ../src/ap/hs20.o endif @@ -118,7 +118,7 @@ endif ifdef CONFIG_MBO -@@ -1030,7 +1045,9 @@ CFLAGS += -DCONFIG_MBO +@@ -1016,7 +1031,9 @@ CFLAGS += -DCONFIG_MBO endif ifdef NEED_RSN_AUTHENTICATOR @@ -128,7 +128,7 @@ NEED_AES_WRAP=y OBJS += ../src/ap/wpa_auth.o OBJS += ../src/ap/wpa_auth_ie.o -@@ -2010,6 +2027,12 @@ wpa_priv: $(BCHECK) $(OBJS_priv) +@@ -1996,6 +2013,12 @@ wpa_priv: $(BCHECK) $(OBJS_priv) _OBJS_VAR := OBJS include ../src/objs.mk @@ -141,7 +141,7 @@ wpa_supplicant: $(BCHECK) $(OBJS) $(EXTRA_progs) $(Q)$(LDO) $(LDFLAGS) -o wpa_supplicant $(OBJS) $(LIBS) $(EXTRALIBS) @$(E) " LD " $@ -@@ -2142,6 +2165,12 @@ eap_gpsk.so: $(SRC_EAP_GPSK) +@@ -2128,6 +2151,12 @@ eap_gpsk.so: $(SRC_EAP_GPSK) $(Q)sed -e 's|\@BINDIR\@|$(BINDIR)|g' $< >$@ @$(E) " sed" $< @@ -156,7 +156,7 @@ wpa_cli.exe: wpa_cli --- a/src/drivers/driver.h +++ b/src/drivers/driver.h -@@ -6544,8 +6544,8 @@ union wpa_event_data { +@@ -6171,8 +6171,8 @@ union wpa_event_data { * Driver wrapper code should call this function whenever an event is received * from the driver. */ @@ -167,7 +167,7 @@ /** * wpa_supplicant_event_global - Report a driver event for wpa_supplicant -@@ -6557,7 +6557,7 @@ void wpa_supplicant_event(void *ctx, enu +@@ -6184,7 +6184,7 @@ void wpa_supplicant_event(void *ctx, enu * Same as wpa_supplicant_event(), but we search for the interface in * wpa_global. */ @@ -178,7 +178,7 @@ /* --- a/src/ap/drv_callbacks.c +++ b/src/ap/drv_callbacks.c -@@ -1887,8 +1887,8 @@ err: +@@ -1872,8 +1872,8 @@ err: #endif /* CONFIG_OWE */ @@ -189,7 +189,7 @@ { struct hostapd_data *hapd = ctx; #ifndef CONFIG_NO_STDOUT_DEBUG -@@ -2161,7 +2161,7 @@ void wpa_supplicant_event(void *ctx, enu +@@ -2145,7 +2145,7 @@ void wpa_supplicant_event(void *ctx, enu } @@ -200,7 +200,7 @@ struct hapd_interfaces *interfaces = ctx; --- a/wpa_supplicant/wpa_priv.c +++ b/wpa_supplicant/wpa_priv.c -@@ -1039,8 +1039,8 @@ static void wpa_priv_send_ft_response(st +@@ -1038,8 +1038,8 @@ static void wpa_priv_send_ft_response(st } @@ -211,7 +211,7 @@ { struct wpa_priv_interface *iface = ctx; -@@ -1103,7 +1103,7 @@ void wpa_supplicant_event(void *ctx, enu +@@ -1102,7 +1102,7 @@ void wpa_supplicant_event(void *ctx, enu } @@ -220,7 +220,7 @@ union wpa_event_data *data) { struct wpa_priv_global *global = ctx; -@@ -1217,6 +1217,8 @@ int main(int argc, char *argv[]) +@@ -1216,6 +1216,8 @@ int main(int argc, char *argv[]) if (os_program_init()) return -1; @@ -231,7 +231,7 @@ os_memset(&global, 0, sizeof(global)); --- a/wpa_supplicant/events.c +++ b/wpa_supplicant/events.c -@@ -5237,8 +5237,8 @@ static void wpas_event_unprot_beacon(str +@@ -4953,8 +4953,8 @@ static void wpas_event_unprot_beacon(str } @@ -242,7 +242,7 @@ { struct wpa_supplicant *wpa_s = ctx; int resched; -@@ -6149,7 +6149,7 @@ void wpa_supplicant_event(void *ctx, enu +@@ -5813,7 +5813,7 @@ void wpa_supplicant_event(void *ctx, enu } @@ -253,7 +253,7 @@ struct wpa_supplicant *wpa_s; --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -7408,7 +7408,6 @@ struct wpa_interface * wpa_supplicant_ma +@@ -7087,7 +7087,6 @@ struct wpa_interface * wpa_supplicant_ma return NULL; } @@ -261,7 +261,7 @@ /** * wpa_supplicant_match_existing - Match existing interfaces * @global: Pointer to global data from wpa_supplicant_init() -@@ -7443,6 +7442,11 @@ static int wpa_supplicant_match_existing +@@ -7122,6 +7121,11 @@ static int wpa_supplicant_match_existing #endif /* CONFIG_MATCH_IFACE */ @@ -273,7 +273,7 @@ /** * wpa_supplicant_add_iface - Add a new network interface -@@ -7699,6 +7703,8 @@ struct wpa_global * wpa_supplicant_init( +@@ -7378,6 +7382,8 @@ struct wpa_global * wpa_supplicant_init( #ifndef CONFIG_NO_WPA_MSG wpa_msg_register_ifname_cb(wpa_supplicant_msg_ifname_cb); #endif /* CONFIG_NO_WPA_MSG */ @@ -284,7 +284,7 @@ wpa_debug_open_file(params->wpa_debug_file_path); --- a/hostapd/main.c +++ b/hostapd/main.c -@@ -595,6 +595,11 @@ fail: +@@ -591,6 +591,11 @@ fail: return -1; } @@ -296,7 +296,7 @@ #ifdef CONFIG_WPS static int gen_uuid(const char *txt_addr) -@@ -688,6 +693,8 @@ int main(int argc, char *argv[]) +@@ -684,6 +689,8 @@ int main(int argc, char *argv[]) return -1; #endif /* CONFIG_DPP */ diff --git a/package/network/services/hostapd/patches/300-noscan.patch b/package/network/services/hostapd/patches/300-noscan.patch index 91e1aaad8..a0e00c4d5 100644 --- a/package/network/services/hostapd/patches/300-noscan.patch +++ b/package/network/services/hostapd/patches/300-noscan.patch @@ -1,6 +1,6 @@ --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -3446,6 +3446,10 @@ static int hostapd_config_fill(struct ho +@@ -3439,6 +3439,10 @@ static int hostapd_config_fill(struct ho if (bss->ocv && !bss->ieee80211w) bss->ieee80211w = 1; #endif /* CONFIG_OCV */ @@ -13,7 +13,7 @@ } else if (os_strcmp(buf, "ht_capab") == 0) { --- a/src/ap/ap_config.h +++ b/src/ap/ap_config.h -@@ -1061,6 +1061,8 @@ struct hostapd_config { +@@ -1043,6 +1043,8 @@ struct hostapd_config { int ht_op_mode_fixed; u16 ht_capab; diff --git a/package/network/services/hostapd/patches/301-mesh-noscan.patch b/package/network/services/hostapd/patches/301-mesh-noscan.patch index 8a1bdaa18..998540198 100644 --- a/package/network/services/hostapd/patches/301-mesh-noscan.patch +++ b/package/network/services/hostapd/patches/301-mesh-noscan.patch @@ -1,6 +1,6 @@ --- a/wpa_supplicant/config.c +++ b/wpa_supplicant/config.c -@@ -2599,6 +2599,7 @@ static const struct parse_data ssid_fiel +@@ -2555,6 +2555,7 @@ static const struct parse_data ssid_fiel #else /* CONFIG_MESH */ { INT_RANGE(mode, 0, 4) }, #endif /* CONFIG_MESH */ @@ -10,7 +10,7 @@ { STR(id_str) }, --- a/wpa_supplicant/config_file.c +++ b/wpa_supplicant/config_file.c -@@ -775,6 +775,7 @@ static void wpa_config_write_network(FIL +@@ -766,6 +766,7 @@ static void wpa_config_write_network(FIL #endif /* IEEE8021X_EAPOL */ INT(mode); INT(no_auto_peer); @@ -31,36 +31,36 @@ /* --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -2693,7 +2693,7 @@ static bool ibss_mesh_can_use_vht(struct - const struct wpa_ssid *ssid, - struct hostapd_hw_modes *mode) - { -- if (mode->mode != HOSTAPD_MODE_IEEE80211A) -+ if (mode->mode != HOSTAPD_MODE_IEEE80211A && !(ssid->noscan)) - return false; - - if (!drv_supports_vht(wpa_s, ssid)) -@@ -2766,7 +2766,7 @@ static void ibss_mesh_select_40mhz(struc - int i, res; - unsigned int j; - static const int ht40plus[] = { -- 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157, 165, 173, -+ 1, 2, 3, 4, 5, 6, 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157, 165, 173, - 184, 192 - }; - int ht40 = -1; -@@ -3016,7 +3016,7 @@ void ibss_mesh_setup_freq(struct wpa_sup +@@ -2463,7 +2463,7 @@ void ibss_mesh_setup_freq(struct wpa_sup int ieee80211_mode = wpas_mode_to_ieee80211_mode(ssid->mode); enum hostapd_hw_mode hw_mode; struct hostapd_hw_modes *mode = NULL; -- int i, obss_scan = 1; -+ int i, obss_scan = !(ssid->noscan); +- int ht40plus[] = { 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157, ++ int ht40plus[] = { 1, 2, 3, 4, 5, 6, 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157, + 184, 192 }; + int bw80[] = { 5180, 5260, 5500, 5580, 5660, 5745, 5955, + 6035, 6115, 6195, 6275, 6355, 6435, 6515, +@@ -2471,7 +2471,7 @@ void ibss_mesh_setup_freq(struct wpa_sup + int bw160[] = { 5955, 6115, 6275, 6435, 6595, 6755, 6915 }; + struct hostapd_channel_data *pri_chan = NULL, *sec_chan = NULL; u8 channel; - bool is_6ghz; - bool dfs_enabled = wpa_s->conf->country[0] && (wpa_s->drv_flags & WPA_DRIVER_FLAGS_RADAR); +- int i, chan_idx, ht40 = -1, res, obss_scan = 1; ++ int i, chan_idx, ht40 = -1, res, obss_scan = !(ssid->noscan); + unsigned int j, k; + struct hostapd_freq_params vht_freq; + int chwidth, seg0, seg1; +@@ -2562,7 +2562,7 @@ void ibss_mesh_setup_freq(struct wpa_sup + #endif /* CONFIG_HE_OVERRIDES */ + + /* Setup higher BW only for 5 GHz */ +- if (mode->mode != HOSTAPD_MODE_IEEE80211A) ++ if (mode->mode != HOSTAPD_MODE_IEEE80211A && !(ssid->noscan)) + return; + + for (chan_idx = 0; chan_idx < mode->num_channels; chan_idx++) { --- a/wpa_supplicant/config_ssid.h +++ b/wpa_supplicant/config_ssid.h -@@ -1035,6 +1035,8 @@ struct wpa_ssid { +@@ -981,6 +981,8 @@ struct wpa_ssid { */ int no_auto_peer; diff --git a/package/network/services/hostapd/patches/310-rescan_immediately.patch b/package/network/services/hostapd/patches/310-rescan_immediately.patch index 033f76309..2c2541947 100644 --- a/package/network/services/hostapd/patches/310-rescan_immediately.patch +++ b/package/network/services/hostapd/patches/310-rescan_immediately.patch @@ -1,6 +1,6 @@ --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -5713,7 +5713,7 @@ wpa_supplicant_alloc(struct wpa_supplica +@@ -5419,7 +5419,7 @@ wpa_supplicant_alloc(struct wpa_supplica if (wpa_s == NULL) return NULL; wpa_s->scan_req = INITIAL_SCAN_REQ; diff --git a/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch b/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch index 93a03a6db..8218a439a 100644 --- a/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch +++ b/package/network/services/hostapd/patches/330-nl80211_fix_set_freq.patch @@ -1,6 +1,6 @@ --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -5224,7 +5224,7 @@ static int nl80211_set_channel(struct i8 +@@ -5022,7 +5022,7 @@ static int nl80211_set_channel(struct i8 freq->he_enabled, freq->eht_enabled, freq->bandwidth, freq->center_freq1, freq->center_freq2); diff --git a/package/network/services/hostapd/patches/340-reload_freq_change.patch b/package/network/services/hostapd/patches/340-reload_freq_change.patch index 9a468079d..b59107463 100644 --- a/package/network/services/hostapd/patches/340-reload_freq_change.patch +++ b/package/network/services/hostapd/patches/340-reload_freq_change.patch @@ -1,6 +1,6 @@ --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -142,6 +142,29 @@ static void hostapd_reload_bss(struct ho +@@ -119,6 +119,29 @@ static void hostapd_reload_bss(struct ho #endif /* CONFIG_NO_RADIUS */ ssid = &hapd->conf->ssid; @@ -30,7 +30,7 @@ if (!ssid->wpa_psk_set && ssid->wpa_psk && !ssid->wpa_psk->next && ssid->wpa_passphrase_set && ssid->wpa_passphrase) { /* -@@ -250,6 +273,7 @@ int hostapd_reload_config(struct hostapd +@@ -220,6 +243,7 @@ int hostapd_reload_config(struct hostapd struct hostapd_data *hapd = iface->bss[0]; struct hostapd_config *newconf, *oldconf; size_t j; @@ -38,7 +38,7 @@ if (iface->config_fname == NULL) { /* Only in-memory config in use - assume it has been updated */ -@@ -300,6 +324,17 @@ int hostapd_reload_config(struct hostapd +@@ -270,24 +294,20 @@ int hostapd_reload_config(struct hostapd } iface->conf = newconf; @@ -55,10 +55,6 @@ + for (j = 0; j < iface->num_bss; j++) { hapd = iface->bss[j]; - if (!hapd->conf->config_id || !newconf->bss[j]->config_id || -@@ -307,21 +342,6 @@ int hostapd_reload_config(struct hostapd - newconf->bss[j]->config_id) != 0) - hostapd_clear_old_bss(hapd); hapd->iconf = newconf; - hapd->iconf->channel = oldconf->channel; - hapd->iconf->acs = oldconf->acs; diff --git a/package/network/services/hostapd/patches/341-mesh-ctrl-iface-channel-switch.patch b/package/network/services/hostapd/patches/341-mesh-ctrl-iface-channel-switch.patch index 878445287..29a3799b5 100644 --- a/package/network/services/hostapd/patches/341-mesh-ctrl-iface-channel-switch.patch +++ b/package/network/services/hostapd/patches/341-mesh-ctrl-iface-channel-switch.patch @@ -1,6 +1,6 @@ --- a/wpa_supplicant/ap.c +++ b/wpa_supplicant/ap.c -@@ -1825,15 +1825,35 @@ int ap_switch_channel(struct wpa_supplic +@@ -1803,15 +1803,35 @@ int ap_switch_channel(struct wpa_supplic #ifdef CONFIG_CTRL_IFACE diff --git a/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch b/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch index a943395b5..a88b63e91 100644 --- a/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch +++ b/package/network/services/hostapd/patches/350-nl80211_del_beacon_bss.patch @@ -1,35 +1,34 @@ --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -3006,12 +3006,12 @@ static int wpa_driver_nl80211_del_beacon - return 0; +@@ -2938,11 +2938,11 @@ static int wpa_driver_nl80211_del_beacon + struct wpa_driver_nl80211_data *drv = bss->drv; wpa_printf(MSG_DEBUG, "nl80211: Remove beacon (ifindex=%d)", - drv->ifindex); + bss->ifindex); - link->beacon_set = 0; - link->freq = 0; - + bss->beacon_set = 0; + bss->freq = 0; nl80211_put_wiphy_data_ap(bss); - msg = nl80211_drv_msg(drv, 0, NL80211_CMD_DEL_BEACON); + msg = nl80211_bss_msg(bss, 0, NL80211_CMD_DEL_BEACON); - if (!msg) - return -ENOBUFS; + return send_and_recv_msgs(drv, msg, NULL, NULL, NULL, NULL); + } -@@ -5907,7 +5907,7 @@ static void nl80211_teardown_ap(struct i +@@ -5661,7 +5661,7 @@ static void nl80211_teardown_ap(struct i nl80211_mgmt_unsubscribe(bss, "AP teardown"); nl80211_put_wiphy_data_ap(bss); -- bss->flink->beacon_set = 0; -+ wpa_driver_nl80211_del_beacon_all(bss); +- bss->beacon_set = 0; ++ wpa_driver_nl80211_del_beacon(bss); } -@@ -8642,8 +8642,6 @@ static int wpa_driver_nl80211_if_remove( +@@ -8120,8 +8120,6 @@ static int wpa_driver_nl80211_if_remove( } else { wpa_printf(MSG_DEBUG, "nl80211: First BSS - reassign context"); nl80211_teardown_ap(bss); - if (!bss->added_if && !drv->first_bss->next) -- wpa_driver_nl80211_del_beacon_all(bss); +- wpa_driver_nl80211_del_beacon(bss); nl80211_destroy_bss(bss); if (!bss->added_if) i802_set_iface_flags(bss, 0); diff --git a/package/network/services/hostapd/patches/360-ctrl_iface_reload.patch b/package/network/services/hostapd/patches/360-ctrl_iface_reload.patch index e9f46ce9d..7699541fd 100644 --- a/package/network/services/hostapd/patches/360-ctrl_iface_reload.patch +++ b/package/network/services/hostapd/patches/360-ctrl_iface_reload.patch @@ -1,6 +1,6 @@ --- a/hostapd/ctrl_iface.c +++ b/hostapd/ctrl_iface.c -@@ -68,6 +68,7 @@ +@@ -67,6 +67,7 @@ #include "fst/fst_ctrl_iface.h" #include "config_file.h" #include "ctrl_iface.h" @@ -8,7 +8,7 @@ #define HOSTAPD_CLI_DUP_VALUE_MAX_LEN 256 -@@ -83,6 +84,7 @@ static void hostapd_ctrl_iface_send(stru +@@ -82,6 +83,7 @@ static void hostapd_ctrl_iface_send(stru enum wpa_msg_type type, const char *buf, size_t len); @@ -16,7 +16,7 @@ static int hostapd_ctrl_iface_attach(struct hostapd_data *hapd, struct sockaddr_storage *from, -@@ -134,6 +136,61 @@ static int hostapd_ctrl_iface_new_sta(st +@@ -133,6 +135,61 @@ static int hostapd_ctrl_iface_new_sta(st return 0; } @@ -78,7 +78,7 @@ #ifdef NEED_AP_MLME static int hostapd_ctrl_iface_sa_query(struct hostapd_data *hapd, -@@ -3529,6 +3586,8 @@ static int hostapd_ctrl_iface_receive_pr +@@ -3449,6 +3506,8 @@ static int hostapd_ctrl_iface_receive_pr } else if (os_strncmp(buf, "VENDOR ", 7) == 0) { reply_len = hostapd_ctrl_iface_vendor(hapd, buf + 7, reply, reply_size); @@ -89,7 +89,7 @@ #ifdef RADIUS_SERVER --- a/src/ap/ctrl_iface_ap.c +++ b/src/ap/ctrl_iface_ap.c -@@ -1008,7 +1008,13 @@ int hostapd_parse_csa_settings(const cha +@@ -945,7 +945,13 @@ int hostapd_parse_csa_settings(const cha int hostapd_ctrl_iface_stop_ap(struct hostapd_data *hapd) { diff --git a/package/network/services/hostapd/patches/370-ap_sta_support.patch b/package/network/services/hostapd/patches/370-ap_sta_support.patch index 24064839f..6faaffcf7 100644 --- a/package/network/services/hostapd/patches/370-ap_sta_support.patch +++ b/package/network/services/hostapd/patches/370-ap_sta_support.patch @@ -1,6 +1,6 @@ --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -126,6 +126,8 @@ OBJS_c += ../src/utils/common.o +@@ -115,6 +115,8 @@ OBJS_c += ../src/utils/common.o OBJS_c += ../src/common/cli.o OBJS += wmm_ac.o @@ -19,7 +19,7 @@ #include "drivers/driver.h" #include "eap_peer/eap.h" #include "wpa_supplicant_i.h" -@@ -283,6 +284,10 @@ void calculate_update_time(const struct +@@ -282,6 +283,10 @@ void calculate_update_time(const struct static void wpa_bss_copy_res(struct wpa_bss *dst, struct wpa_scan_res *src, struct os_reltime *fetch_time) { @@ -30,7 +30,7 @@ dst->flags = src->flags; os_memcpy(dst->bssid, src->bssid, ETH_ALEN); dst->freq = src->freq; -@@ -296,6 +301,15 @@ static void wpa_bss_copy_res(struct wpa_ +@@ -295,6 +300,15 @@ static void wpa_bss_copy_res(struct wpa_ dst->est_throughput = src->est_throughput; dst->snr = src->snr; @@ -154,7 +154,7 @@ #ifdef CONFIG_WEP /* Configure default/group WEP keys for static WEP */ -@@ -1026,6 +1074,8 @@ void wpa_supplicant_set_state(struct wpa +@@ -1016,6 +1064,8 @@ void wpa_supplicant_set_state(struct wpa sme_sched_obss_scan(wpa_s, 1); @@ -163,7 +163,7 @@ #if defined(CONFIG_FILS) && defined(IEEE8021X_EAPOL) if (!fils_hlp_sent && ssid && ssid->eap.erp) update_fils_connect_params = true; -@@ -1036,6 +1086,8 @@ void wpa_supplicant_set_state(struct wpa +@@ -1026,6 +1076,8 @@ void wpa_supplicant_set_state(struct wpa #endif /* CONFIG_OWE */ } else if (state == WPA_DISCONNECTED || state == WPA_ASSOCIATING || state == WPA_ASSOCIATED) { @@ -172,7 +172,7 @@ wpa_s->new_connection = 1; wpa_drv_set_operstate(wpa_s, 0); #ifndef IEEE8021X_EAPOL -@@ -2520,6 +2572,8 @@ void wpa_supplicant_associate(struct wpa +@@ -2335,6 +2387,8 @@ void wpa_supplicant_associate(struct wpa return; } wpa_s->current_bss = bss; @@ -181,7 +181,7 @@ #else /* CONFIG_MESH */ wpa_msg(wpa_s, MSG_ERROR, "mesh mode support not included in the build"); -@@ -7010,6 +7064,16 @@ static int wpa_supplicant_init_iface(str +@@ -6693,6 +6747,16 @@ static int wpa_supplicant_init_iface(str sizeof(wpa_s->bridge_ifname)); } @@ -198,7 +198,7 @@ /* RSNA Supplicant Key Management - INITIALIZE */ eapol_sm_notify_portEnabled(wpa_s->eapol, false); eapol_sm_notify_portValid(wpa_s->eapol, false); -@@ -7352,6 +7416,11 @@ static void wpa_supplicant_deinit_iface( +@@ -7031,6 +7095,11 @@ static void wpa_supplicant_deinit_iface( if (terminate) wpa_msg(wpa_s, MSG_INFO, WPA_EVENT_TERMINATING); @@ -212,7 +212,7 @@ --- a/wpa_supplicant/wpa_supplicant_i.h +++ b/wpa_supplicant/wpa_supplicant_i.h -@@ -106,6 +106,11 @@ struct wpa_interface { +@@ -105,6 +105,11 @@ struct wpa_interface { const char *ifname; /** @@ -224,7 +224,7 @@ * bridge_ifname - Optional bridge interface name * * If the driver interface (ifname) is included in a Linux bridge -@@ -665,6 +670,8 @@ struct wpa_supplicant { +@@ -717,6 +722,8 @@ struct wpa_supplicant { #endif /* CONFIG_CTRL_IFACE_BINDER */ char bridge_ifname[16]; @@ -235,7 +235,7 @@ --- a/hostapd/ctrl_iface.c +++ b/hostapd/ctrl_iface.c -@@ -2716,6 +2716,12 @@ static int hostapd_ctrl_iface_chan_switc +@@ -2641,6 +2641,12 @@ static int hostapd_ctrl_iface_chan_switc return 0; } @@ -250,7 +250,7 @@ /* Save CHAN_SWITCH VHT, HE, and EHT config */ --- a/src/ap/beacon.c +++ b/src/ap/beacon.c -@@ -2052,11 +2052,6 @@ static int __ieee802_11_set_beacon(struc +@@ -1903,11 +1903,6 @@ static int __ieee802_11_set_beacon(struc return -1; } @@ -264,7 +264,7 @@ if (ieee802_11_build_ap_params(hapd, ¶ms) < 0) --- a/wpa_supplicant/events.c +++ b/wpa_supplicant/events.c -@@ -5237,6 +5237,60 @@ static void wpas_event_unprot_beacon(str +@@ -4953,6 +4953,60 @@ static void wpas_event_unprot_beacon(str } @@ -325,7 +325,7 @@ void supplicant_event(void *ctx, enum wpa_event_type event, union wpa_event_data *data) { -@@ -5586,8 +5640,10 @@ void supplicant_event(void *ctx, enum wp +@@ -5268,8 +5322,10 @@ void supplicant_event(void *ctx, enum wp channel_width_to_string(data->ch_switch.ch_width), data->ch_switch.cf1, data->ch_switch.cf2); @@ -339,7 +339,7 @@ wpa_s->current_ssid->frequency = data->ch_switch.freq; --- a/src/drivers/driver.h +++ b/src/drivers/driver.h -@@ -6324,6 +6324,7 @@ union wpa_event_data { +@@ -5968,6 +5968,7 @@ union wpa_event_data { /** * struct ch_switch @@ -347,8 +347,8 @@ * @freq: Frequency of new channel in MHz * @ht_enabled: Whether this is an HT channel * @ch_offset: Secondary channel offset -@@ -6334,6 +6335,7 @@ union wpa_event_data { - * @punct_bitmap: Puncturing bitmap +@@ -5976,6 +5977,7 @@ union wpa_event_data { + * @cf2: Center frequency 2 */ struct ch_switch { + int count; @@ -357,15 +357,16 @@ int ch_offset; --- a/src/drivers/driver_nl80211_event.c +++ b/src/drivers/driver_nl80211_event.c -@@ -997,6 +997,7 @@ static void mlme_event_ch_switch(struct - struct nlattr *bw, struct nlattr *cf1, - struct nlattr *cf2, - struct nlattr *punct_bitmap, -+ struct nlattr *count, - int finished) +@@ -694,7 +694,7 @@ static void mlme_event_ch_switch(struct + struct nlattr *ifindex, struct nlattr *freq, + struct nlattr *type, struct nlattr *bw, + struct nlattr *cf1, struct nlattr *cf2, +- int finished) ++ struct nlattr *count, int finished) { struct i802_bss *bss; -@@ -1060,6 +1061,8 @@ static void mlme_event_ch_switch(struct + union wpa_event_data data; +@@ -755,6 +755,8 @@ static void mlme_event_ch_switch(struct data.ch_switch.cf1 = nla_get_u32(cf1); if (cf2) data.ch_switch.cf2 = nla_get_u32(cf2); @@ -373,19 +374,19 @@ + data.ch_switch.count = nla_get_u32(count); if (finished) - bss->flink->freq = data.ch_switch.freq; -@@ -3604,6 +3607,7 @@ static void do_process_drv_event(struct + bss->freq = data.ch_switch.freq; +@@ -3113,6 +3115,7 @@ static void do_process_drv_event(struct + tb[NL80211_ATTR_CHANNEL_WIDTH], tb[NL80211_ATTR_CENTER_FREQ1], tb[NL80211_ATTR_CENTER_FREQ2], - tb[NL80211_ATTR_PUNCT_BITMAP], + tb[NL80211_ATTR_CH_SWITCH_COUNT], 0); break; case NL80211_CMD_CH_SWITCH_NOTIFY: -@@ -3616,6 +3620,7 @@ static void do_process_drv_event(struct +@@ -3123,6 +3126,7 @@ static void do_process_drv_event(struct + tb[NL80211_ATTR_CHANNEL_WIDTH], tb[NL80211_ATTR_CENTER_FREQ1], tb[NL80211_ATTR_CENTER_FREQ2], - tb[NL80211_ATTR_PUNCT_BITMAP], + NULL, 1); break; diff --git a/package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch b/package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch index b886ab749..1f78c42de 100644 --- a/package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch +++ b/package/network/services/hostapd/patches/380-disable_ctrl_iface_mib.patch @@ -12,7 +12,7 @@ else --- a/hostapd/ctrl_iface.c +++ b/hostapd/ctrl_iface.c -@@ -3342,6 +3342,7 @@ static int hostapd_ctrl_iface_receive_pr +@@ -3265,6 +3265,7 @@ static int hostapd_ctrl_iface_receive_pr reply_size); } else if (os_strcmp(buf, "STATUS-DRIVER") == 0) { reply_len = hostapd_drv_status(hapd, reply, reply_size); @@ -20,7 +20,7 @@ } else if (os_strcmp(buf, "MIB") == 0) { reply_len = ieee802_11_get_mib(hapd, reply, reply_size); if (reply_len >= 0) { -@@ -3383,6 +3384,7 @@ static int hostapd_ctrl_iface_receive_pr +@@ -3306,6 +3307,7 @@ static int hostapd_ctrl_iface_receive_pr } else if (os_strncmp(buf, "STA-NEXT ", 9) == 0) { reply_len = hostapd_ctrl_iface_sta_next(hapd, buf + 9, reply, reply_size); @@ -30,7 +30,7 @@ reply_len = -1; --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -985,6 +985,9 @@ ifdef CONFIG_FILS +@@ -973,6 +973,9 @@ ifdef CONFIG_FILS OBJS += ../src/ap/fils_hlp.o endif ifdef CONFIG_CTRL_IFACE @@ -42,7 +42,7 @@ --- a/wpa_supplicant/ctrl_iface.c +++ b/wpa_supplicant/ctrl_iface.c -@@ -2326,7 +2326,7 @@ static int wpa_supplicant_ctrl_iface_sta +@@ -2325,7 +2325,7 @@ static int wpa_supplicant_ctrl_iface_sta pos += ret; } @@ -51,7 +51,7 @@ if (wpa_s->ap_iface) { pos += ap_ctrl_iface_wpa_get_status(wpa_s, pos, end - pos, -@@ -11964,6 +11964,7 @@ char * wpa_supplicant_ctrl_iface_process +@@ -11565,6 +11565,7 @@ char * wpa_supplicant_ctrl_iface_process reply_len = -1; } else if (os_strncmp(buf, "NOTE ", 5) == 0) { wpa_printf(MSG_INFO, "NOTE: %s", buf + 5); @@ -59,7 +59,7 @@ } else if (os_strcmp(buf, "MIB") == 0) { reply_len = wpa_sm_get_mib(wpa_s->wpa, reply, reply_size); if (reply_len >= 0) { -@@ -11976,6 +11977,7 @@ char * wpa_supplicant_ctrl_iface_process +@@ -11577,6 +11578,7 @@ char * wpa_supplicant_ctrl_iface_process reply_size - reply_len); #endif /* CONFIG_MACSEC */ } @@ -67,7 +67,7 @@ } else if (os_strncmp(buf, "STATUS", 6) == 0) { reply_len = wpa_supplicant_ctrl_iface_status( wpa_s, buf + 6, reply, reply_size); -@@ -12464,6 +12466,7 @@ char * wpa_supplicant_ctrl_iface_process +@@ -12065,6 +12067,7 @@ char * wpa_supplicant_ctrl_iface_process reply_len = wpa_supplicant_ctrl_iface_bss( wpa_s, buf + 4, reply, reply_size); #ifdef CONFIG_AP @@ -75,7 +75,7 @@ } else if (os_strcmp(buf, "STA-FIRST") == 0) { reply_len = ap_ctrl_iface_sta_first(wpa_s, reply, reply_size); } else if (os_strncmp(buf, "STA ", 4) == 0) { -@@ -12472,12 +12475,15 @@ char * wpa_supplicant_ctrl_iface_process +@@ -12073,12 +12076,15 @@ char * wpa_supplicant_ctrl_iface_process } else if (os_strncmp(buf, "STA-NEXT ", 9) == 0) { reply_len = ap_ctrl_iface_sta_next(wpa_s, buf + 9, reply, reply_size); @@ -93,61 +93,15 @@ reply_len = -1; --- a/src/ap/ctrl_iface_ap.c +++ b/src/ap/ctrl_iface_ap.c -@@ -26,6 +26,26 @@ +@@ -26,6 +26,7 @@ #include "taxonomy.h" #include "wnm_ap.h" -+static const char * hw_mode_str(enum hostapd_hw_mode mode) -+{ -+ switch (mode) { -+ case HOSTAPD_MODE_IEEE80211B: -+ return "b"; -+ case HOSTAPD_MODE_IEEE80211G: -+ return "g"; -+ case HOSTAPD_MODE_IEEE80211A: -+ return "a"; -+ case HOSTAPD_MODE_IEEE80211AD: -+ return "ad"; -+ case HOSTAPD_MODE_IEEE80211ANY: -+ return "any"; -+ case NUM_HOSTAPD_MODES: -+ return "invalid"; -+ } -+ return "unknown"; -+} -+ +#ifdef CONFIG_CTRL_IFACE_MIB static size_t hostapd_write_ht_mcs_bitmask(char *buf, size_t buflen, size_t curr_len, const u8 *mcs_set) -@@ -212,26 +232,6 @@ static const char * timeout_next_str(int - } - - --static const char * hw_mode_str(enum hostapd_hw_mode mode) --{ -- switch (mode) { -- case HOSTAPD_MODE_IEEE80211B: -- return "b"; -- case HOSTAPD_MODE_IEEE80211G: -- return "g"; -- case HOSTAPD_MODE_IEEE80211A: -- return "a"; -- case HOSTAPD_MODE_IEEE80211AD: -- return "ad"; -- case HOSTAPD_MODE_IEEE80211ANY: -- return "any"; -- case NUM_HOSTAPD_MODES: -- return "invalid"; -- } -- return "unknown"; --} -- -- - static int hostapd_ctrl_iface_sta_mib(struct hostapd_data *hapd, - struct sta_info *sta, - char *buf, size_t buflen) -@@ -493,6 +493,7 @@ int hostapd_ctrl_iface_sta_next(struct h +@@ -460,6 +461,7 @@ int hostapd_ctrl_iface_sta_next(struct h return hostapd_ctrl_iface_sta_mib(hapd, sta->next, buf, buflen); } @@ -155,7 +109,7 @@ #ifdef CONFIG_P2P_MANAGER static int p2p_manager_disconnect(struct hostapd_data *hapd, u16 stype, -@@ -884,12 +885,12 @@ int hostapd_ctrl_iface_status(struct hos +@@ -832,12 +834,12 @@ int hostapd_ctrl_iface_status(struct hos return len; len += ret; } @@ -172,7 +126,7 @@ if (os_snprintf_error(buflen - len, ret)) --- a/src/ap/ieee802_1x.c +++ b/src/ap/ieee802_1x.c -@@ -2753,6 +2753,7 @@ static const char * bool_txt(bool val) +@@ -2740,6 +2740,7 @@ static const char * bool_txt(bool val) return val ? "TRUE" : "FALSE"; } @@ -180,7 +134,7 @@ int ieee802_1x_get_mib(struct hostapd_data *hapd, char *buf, size_t buflen) { -@@ -2939,6 +2940,7 @@ int ieee802_1x_get_mib_sta(struct hostap +@@ -2926,6 +2927,7 @@ int ieee802_1x_get_mib_sta(struct hostap return len; } @@ -190,7 +144,7 @@ static void ieee802_1x_wnm_notif_send(void *eloop_ctx, void *timeout_ctx) --- a/src/ap/wpa_auth.c +++ b/src/ap/wpa_auth.c -@@ -4786,6 +4786,7 @@ static const char * wpa_bool_txt(int val +@@ -4559,6 +4559,7 @@ static const char * wpa_bool_txt(int val return val ? "TRUE" : "FALSE"; } @@ -198,7 +152,7 @@ #define RSN_SUITE "%02x-%02x-%02x-%d" #define RSN_SUITE_ARG(s) \ -@@ -4938,7 +4939,7 @@ int wpa_get_mib_sta(struct wpa_state_mac +@@ -4709,7 +4710,7 @@ int wpa_get_mib_sta(struct wpa_state_mac return len; } @@ -209,7 +163,7 @@ { --- a/src/rsn_supp/wpa.c +++ b/src/rsn_supp/wpa.c -@@ -3834,6 +3834,8 @@ static u32 wpa_key_mgmt_suite(struct wpa +@@ -2802,6 +2802,8 @@ static u32 wpa_key_mgmt_suite(struct wpa } @@ -218,7 +172,7 @@ #define RSN_SUITE "%02x-%02x-%02x-%d" #define RSN_SUITE_ARG(s) \ ((s) >> 24) & 0xff, ((s) >> 16) & 0xff, ((s) >> 8) & 0xff, (s) & 0xff -@@ -3915,6 +3917,7 @@ int wpa_sm_get_mib(struct wpa_sm *sm, ch +@@ -2883,6 +2885,7 @@ int wpa_sm_get_mib(struct wpa_sm *sm, ch return (int) len; } @@ -228,7 +182,7 @@ --- a/wpa_supplicant/ap.c +++ b/wpa_supplicant/ap.c -@@ -1499,7 +1499,7 @@ int wpas_ap_wps_nfc_report_handover(stru +@@ -1477,7 +1477,7 @@ int wpas_ap_wps_nfc_report_handover(stru #endif /* CONFIG_WPS */ diff --git a/package/network/services/hostapd/patches/381-hostapd_cli_UNKNOWN-COMMAND.patch b/package/network/services/hostapd/patches/381-hostapd_cli_UNKNOWN-COMMAND.patch index e9083f6ec..d2414faf0 100644 --- a/package/network/services/hostapd/patches/381-hostapd_cli_UNKNOWN-COMMAND.patch +++ b/package/network/services/hostapd/patches/381-hostapd_cli_UNKNOWN-COMMAND.patch @@ -1,6 +1,6 @@ --- a/hostapd/hostapd_cli.c +++ b/hostapd/hostapd_cli.c -@@ -757,7 +757,7 @@ static int wpa_ctrl_command_sta(struct w +@@ -744,7 +744,7 @@ static int wpa_ctrl_command_sta(struct w } buf[len] = '\0'; diff --git a/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch b/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch index 40c39ff29..bf481c3ba 100644 --- a/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch +++ b/package/network/services/hostapd/patches/390-wpa_ie_cap_workaround.patch @@ -1,6 +1,6 @@ --- a/src/common/wpa_common.c +++ b/src/common/wpa_common.c -@@ -2719,6 +2719,31 @@ u32 wpa_akm_to_suite(int akm) +@@ -2529,6 +2529,31 @@ u32 wpa_akm_to_suite(int akm) } @@ -32,7 +32,7 @@ int wpa_compare_rsn_ie(int ft_initial_assoc, const u8 *ie1, size_t ie1len, const u8 *ie2, size_t ie2len) -@@ -2726,8 +2751,19 @@ int wpa_compare_rsn_ie(int ft_initial_as +@@ -2536,8 +2561,19 @@ int wpa_compare_rsn_ie(int ft_initial_as if (ie1 == NULL || ie2 == NULL) return -1; diff --git a/package/network/services/hostapd/patches/410-limit_debug_messages.patch b/package/network/services/hostapd/patches/410-limit_debug_messages.patch index 48a558920..d2713fc29 100644 --- a/package/network/services/hostapd/patches/410-limit_debug_messages.patch +++ b/package/network/services/hostapd/patches/410-limit_debug_messages.patch @@ -60,7 +60,7 @@ #ifdef CONFIG_DEBUG_FILE static char *last_path = NULL; #endif /* CONFIG_DEBUG_FILE */ -@@ -644,7 +618,7 @@ void wpa_msg_register_ifname_cb(wpa_msg_ +@@ -636,7 +610,7 @@ void wpa_msg_register_ifname_cb(wpa_msg_ } @@ -69,7 +69,7 @@ { va_list ap; char *buf; -@@ -682,7 +656,7 @@ void wpa_msg(void *ctx, int level, const +@@ -674,7 +648,7 @@ void wpa_msg(void *ctx, int level, const } @@ -80,9 +80,9 @@ char *buf; --- a/src/utils/wpa_debug.h +++ b/src/utils/wpa_debug.h -@@ -51,6 +51,17 @@ void wpa_debug_close_file(void); +@@ -50,6 +50,17 @@ int wpa_debug_reopen_file(void); + void wpa_debug_close_file(void); void wpa_debug_setup_stdout(void); - void wpa_debug_stop_log(void); +/* internal */ +void _wpa_hexdump(int level, const char *title, const u8 *buf, @@ -98,7 +98,7 @@ /** * wpa_debug_printf_timestamp - Print timestamp for debug output * -@@ -71,9 +82,15 @@ void wpa_debug_print_timestamp(void); +@@ -70,9 +81,15 @@ void wpa_debug_print_timestamp(void); * * Note: New line '\n' is added to the end of the text when printing to stdout. */ @@ -115,7 +115,7 @@ /** * wpa_hexdump - conditional hex dump * @level: priority level (MSG_*) of the message -@@ -85,7 +102,13 @@ PRINTF_FORMAT(2, 3); +@@ -84,7 +101,13 @@ PRINTF_FORMAT(2, 3); * output may be directed to stdout, stderr, and/or syslog based on * configuration. The contents of buf is printed out has hex dump. */ @@ -130,7 +130,7 @@ static inline void wpa_hexdump_buf(int level, const char *title, const struct wpabuf *buf) -@@ -107,7 +130,13 @@ static inline void wpa_hexdump_buf(int l +@@ -106,7 +129,13 @@ static inline void wpa_hexdump_buf(int l * like wpa_hexdump(), but by default, does not include secret keys (passwords, * etc.) in debug output. */ @@ -145,7 +145,7 @@ static inline void wpa_hexdump_buf_key(int level, const char *title, const struct wpabuf *buf) -@@ -129,8 +158,14 @@ static inline void wpa_hexdump_buf_key(i +@@ -128,8 +157,14 @@ static inline void wpa_hexdump_buf_key(i * the hex numbers and ASCII characters (for printable range) are shown. 16 * bytes per line will be shown. */ @@ -162,7 +162,7 @@ /** * wpa_hexdump_ascii_key - conditional hex dump, hide keys -@@ -146,8 +181,14 @@ void wpa_hexdump_ascii(int level, const +@@ -145,8 +180,14 @@ void wpa_hexdump_ascii(int level, const * bytes per line will be shown. This works like wpa_hexdump_ascii(), but by * default, does not include secret keys (passwords, etc.) in debug output. */ @@ -179,7 +179,7 @@ /* * wpa_dbg() behaves like wpa_msg(), but it can be removed from build to reduce -@@ -184,7 +225,12 @@ void wpa_hexdump_ascii_key(int level, co +@@ -183,7 +224,12 @@ void wpa_hexdump_ascii_key(int level, co * * Note: New line '\n' is added to the end of the text when printing to stdout. */ @@ -193,7 +193,7 @@ /** * wpa_msg_ctrl - Conditional printf for ctrl_iface monitors -@@ -198,8 +244,13 @@ void wpa_msg(void *ctx, int level, const +@@ -197,8 +243,13 @@ void wpa_msg(void *ctx, int level, const * attached ctrl_iface monitors. In other words, it can be used for frequent * events that do not need to be sent to syslog. */ diff --git a/package/network/services/hostapd/patches/420-indicate-features.patch b/package/network/services/hostapd/patches/420-indicate-features.patch index 356d5f8c6..12edb6bac 100644 --- a/package/network/services/hostapd/patches/420-indicate-features.patch +++ b/package/network/services/hostapd/patches/420-indicate-features.patch @@ -9,7 +9,7 @@ struct hapd_global { void **drv_priv; -@@ -696,7 +696,7 @@ int main(int argc, char *argv[]) +@@ -692,7 +692,7 @@ int main(int argc, char *argv[]) wpa_supplicant_event = hostapd_wpa_event; wpa_supplicant_event_global = hostapd_wpa_event_global; for (;;) { @@ -18,7 +18,7 @@ if (c < 0) break; switch (c) { -@@ -733,6 +733,8 @@ int main(int argc, char *argv[]) +@@ -729,6 +729,8 @@ int main(int argc, char *argv[]) break; #endif /* CONFIG_DEBUG_LINUX_TRACING */ case 'v': diff --git a/package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch b/package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch index a21f0bf7c..e52420953 100644 --- a/package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch +++ b/package/network/services/hostapd/patches/430-hostapd_cli_ifdef.patch @@ -1,6 +1,6 @@ --- a/hostapd/hostapd_cli.c +++ b/hostapd/hostapd_cli.c -@@ -401,7 +401,6 @@ static int hostapd_cli_cmd_disassociate( +@@ -388,7 +388,6 @@ static int hostapd_cli_cmd_disassociate( } @@ -8,7 +8,7 @@ static int hostapd_cli_cmd_signature(struct wpa_ctrl *ctrl, int argc, char *argv[]) { -@@ -414,7 +413,6 @@ static int hostapd_cli_cmd_signature(str +@@ -401,7 +400,6 @@ static int hostapd_cli_cmd_signature(str os_snprintf(buf, sizeof(buf), "SIGNATURE %s", argv[0]); return wpa_ctrl_command(ctrl, buf); } @@ -16,7 +16,7 @@ static int hostapd_cli_cmd_sa_query(struct wpa_ctrl *ctrl, int argc, -@@ -431,7 +429,6 @@ static int hostapd_cli_cmd_sa_query(stru +@@ -418,7 +416,6 @@ static int hostapd_cli_cmd_sa_query(stru } @@ -24,7 +24,7 @@ static int hostapd_cli_cmd_wps_pin(struct wpa_ctrl *ctrl, int argc, char *argv[]) { -@@ -657,7 +654,6 @@ static int hostapd_cli_cmd_wps_config(st +@@ -644,7 +641,6 @@ static int hostapd_cli_cmd_wps_config(st ssid_hex, argv[1]); return wpa_ctrl_command(ctrl, buf); } @@ -32,7 +32,7 @@ static int hostapd_cli_cmd_disassoc_imminent(struct wpa_ctrl *ctrl, int argc, -@@ -1610,13 +1606,10 @@ static const struct hostapd_cli_cmd host +@@ -1588,13 +1584,10 @@ static const struct hostapd_cli_cmd host { "disassociate", hostapd_cli_cmd_disassociate, hostapd_complete_stations, " = disassociate a station" }, @@ -46,7 +46,7 @@ { "wps_pin", hostapd_cli_cmd_wps_pin, NULL, " [timeout] [addr] = add WPS Enrollee PIN" }, { "wps_check_pin", hostapd_cli_cmd_wps_check_pin, NULL, -@@ -1641,7 +1634,6 @@ static const struct hostapd_cli_cmd host +@@ -1619,7 +1612,6 @@ static const struct hostapd_cli_cmd host " = configure AP" }, { "wps_get_status", hostapd_cli_cmd_wps_get_status, NULL, "= show current WPS status" }, diff --git a/package/network/services/hostapd/patches/432-missing-typedef.patch b/package/network/services/hostapd/patches/432-missing-typedef.patch new file mode 100644 index 000000000..7a100f1a0 --- /dev/null +++ b/package/network/services/hostapd/patches/432-missing-typedef.patch @@ -0,0 +1,10 @@ +--- a/src/drivers/linux_wext.h ++++ b/src/drivers/linux_wext.h +@@ -26,6 +26,7 @@ typedef int32_t __s32; + typedef uint16_t __u16; + typedef int16_t __s16; + typedef uint8_t __u8; ++typedef int8_t __s8; + #ifndef __user + #define __user + #endif /* __user */ diff --git a/package/network/services/hostapd/patches/450-scan_wait.patch b/package/network/services/hostapd/patches/450-scan_wait.patch index e265d1ac7..ac874ad66 100644 --- a/package/network/services/hostapd/patches/450-scan_wait.patch +++ b/package/network/services/hostapd/patches/450-scan_wait.patch @@ -33,7 +33,7 @@ /* Initialize the driver interface */ if (!(b[0] | b[1] | b[2] | b[3] | b[4] | b[5])) b = NULL; -@@ -407,8 +419,6 @@ static void hostapd_global_deinit(const +@@ -404,8 +416,6 @@ static void hostapd_global_deinit(const #endif /* CONFIG_NATIVE_WINDOWS */ eap_server_unregister_methods(); @@ -42,7 +42,7 @@ } -@@ -434,18 +444,6 @@ static int hostapd_global_run(struct hap +@@ -431,18 +441,6 @@ static int hostapd_global_run(struct hap } #endif /* EAP_SERVER_TNC */ @@ -61,7 +61,7 @@ eloop_run(); return 0; -@@ -649,8 +647,7 @@ int main(int argc, char *argv[]) +@@ -645,8 +643,7 @@ int main(int argc, char *argv[]) struct hapd_interfaces interfaces; int ret = 1; size_t i, j; diff --git a/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch b/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch index 809877745..38ff66317 100644 --- a/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch +++ b/package/network/services/hostapd/patches/460-wpa_supplicant-add-new-config-params-to-be-used-with.patch @@ -22,7 +22,7 @@ Signed-hostap: Antonio Quartulli #include "common/defs.h" #include "common/ieee802_11_defs.h" #include "common/wpa_common.h" -@@ -936,6 +937,9 @@ struct wpa_driver_associate_params { +@@ -894,6 +895,9 @@ struct wpa_driver_associate_params { * responsible for selecting with which BSS to associate. */ const u8 *bssid; @@ -42,7 +42,7 @@ Signed-hostap: Antonio Quartulli #include "config.h" -@@ -2389,6 +2390,97 @@ static char * wpa_config_write_mac_value +@@ -2345,6 +2346,97 @@ static char * wpa_config_write_peerkey(c #endif /* NO_CONFIG_WRITE */ @@ -140,7 +140,7 @@ Signed-hostap: Antonio Quartulli /* Helper macros for network block parser */ #ifdef OFFSET -@@ -2673,6 +2765,8 @@ static const struct parse_data ssid_fiel +@@ -2629,6 +2721,8 @@ static const struct parse_data ssid_fiel { INT(ap_max_inactivity) }, { INT(dtim_period) }, { INT(beacon_int) }, @@ -162,7 +162,7 @@ Signed-hostap: Antonio Quartulli #define DEFAULT_EAP_WORKAROUND ((unsigned int) -1) -@@ -879,6 +881,9 @@ struct wpa_ssid { +@@ -846,6 +848,9 @@ struct wpa_ssid { */ void *parent_cred; @@ -174,7 +174,7 @@ Signed-hostap: Antonio Quartulli * macsec_policy - Determines the policy for MACsec secure session --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -4177,6 +4177,12 @@ static void wpas_start_assoc_cb(struct w +@@ -3899,6 +3899,12 @@ static void wpas_start_assoc_cb(struct w params.beacon_int = ssid->beacon_int; else params.beacon_int = wpa_s->conf->beacon_int; diff --git a/package/network/services/hostapd/patches/461-driver_nl80211-use-new-parameters-during-ibss-join.patch b/package/network/services/hostapd/patches/461-driver_nl80211-use-new-parameters-during-ibss-join.patch new file mode 100644 index 000000000..65d67b8b0 --- /dev/null +++ b/package/network/services/hostapd/patches/461-driver_nl80211-use-new-parameters-during-ibss-join.patch @@ -0,0 +1,59 @@ +From ffc4445958a3ed4064f2e1bf73fa478a61c5cf7b Mon Sep 17 00:00:00 2001 +From: Antonio Quartulli +Date: Sun, 3 Jun 2012 18:42:25 +0200 +Subject: [PATCHv2 602/602] driver_nl80211: use new parameters during ibss join + +Signed-hostap: Antonio Quartulli +--- + src/drivers/driver_nl80211.c | 33 ++++++++++++++++++++++++++++++++- + 1 file changed, 32 insertions(+), 1 deletion(-) + +--- a/src/drivers/driver_nl80211.c ++++ b/src/drivers/driver_nl80211.c +@@ -6005,7 +6005,7 @@ static int wpa_driver_nl80211_ibss(struc + struct wpa_driver_associate_params *params) + { + struct nl_msg *msg; +- int ret = -1; ++ int ret = -1, i; + int count = 0; + + wpa_printf(MSG_DEBUG, "nl80211: Join IBSS (ifindex=%d)", drv->ifindex); +@@ -6032,6 +6032,37 @@ retry: + nl80211_put_beacon_int(msg, params->beacon_int)) + goto fail; + ++ if (params->fixed_freq) { ++ wpa_printf(MSG_DEBUG, " * fixed_freq"); ++ nla_put_flag(msg, NL80211_ATTR_FREQ_FIXED); ++ } ++ ++ if (params->beacon_int > 0) { ++ wpa_printf(MSG_DEBUG, " * beacon_int=%d", ++ params->beacon_int); ++ nla_put_u32(msg, NL80211_ATTR_BEACON_INTERVAL, ++ params->beacon_int); ++ } ++ ++ if (params->rates[0] > 0) { ++ wpa_printf(MSG_DEBUG, " * basic_rates:"); ++ i = 0; ++ while (i < NL80211_MAX_SUPP_RATES && ++ params->rates[i] > 0) { ++ wpa_printf(MSG_DEBUG, " %.1f", ++ (double)params->rates[i] / 2); ++ i++; ++ } ++ nla_put(msg, NL80211_ATTR_BSS_BASIC_RATES, i, ++ params->rates); ++ } ++ ++ if (params->mcast_rate > 0) { ++ wpa_printf(MSG_DEBUG, " * mcast_rate=%.1f", ++ (double)params->mcast_rate / 10); ++ nla_put_u32(msg, NL80211_ATTR_MCAST_RATE, params->mcast_rate); ++ } ++ + ret = nl80211_set_conn_keys(params, msg); + if (ret) + goto fail; diff --git a/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch b/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch index e738ea131..5dc19fede 100644 --- a/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch +++ b/package/network/services/hostapd/patches/463-add-mcast_rate-to-11s.patch @@ -19,7 +19,7 @@ Tested-by: Simon Wunderlich --- a/src/drivers/driver.h +++ b/src/drivers/driver.h -@@ -1768,6 +1768,7 @@ struct wpa_driver_mesh_join_params { +@@ -1661,6 +1661,7 @@ struct wpa_driver_mesh_join_params { #define WPA_DRIVER_MESH_FLAG_AMPE 0x00000008 unsigned int flags; bool handle_dfs; @@ -29,7 +29,7 @@ Tested-by: Simon Wunderlich struct wpa_driver_set_key_params { --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -11388,6 +11388,18 @@ static int nl80211_put_mesh_id(struct nl +@@ -10627,6 +10627,18 @@ static int nl80211_put_mesh_id(struct nl } @@ -48,7 +48,7 @@ Tested-by: Simon Wunderlich static int nl80211_put_mesh_config(struct nl_msg *msg, struct wpa_driver_mesh_bss_params *params) { -@@ -11449,6 +11461,7 @@ static int nl80211_join_mesh(struct i802 +@@ -10688,6 +10700,7 @@ static int nl80211_join_mesh(struct i802 nl80211_put_basic_rates(msg, params->basic_rates) || nl80211_put_mesh_id(msg, params->meshid, params->meshid_len) || nl80211_put_beacon_int(msg, params->beacon_int) || diff --git a/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch b/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch index 73ccc65ad..48086ea0e 100644 --- a/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch +++ b/package/network/services/hostapd/patches/464-fix-mesh-obss-check.patch @@ -1,13 +1,19 @@ --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -3077,6 +3077,10 @@ void ibss_mesh_setup_freq(struct wpa_sup +@@ -2539,11 +2539,13 @@ void ibss_mesh_setup_freq(struct wpa_sup + for (j = 0; j < wpa_s->last_scan_res_used; j++) { + struct wpa_bss *bss = wpa_s->last_scan_res[j]; - freq->freq = ssid->frequency; +- if (ssid->mode != WPAS_MODE_IBSS) ++ /* Don't adjust control freq in case of fixed_freq */ ++ if (ssid->fixed_freq) { ++ obss_scan = 0; + break; ++ } -+ if (ssid->fixed_freq) { -+ obss_scan = 0; -+ } -+ - if (ssid->mode == WPAS_MODE_IBSS && !ssid->fixed_freq) { - struct wpa_bss *bss = ibss_find_existing_bss(wpa_s, ssid); +- /* Don't adjust control freq in case of fixed_freq */ +- if (ssid->fixed_freq) ++ if (ssid->mode != WPAS_MODE_IBSS) + break; + if (!bss_is_ibss(bss)) diff --git a/package/network/services/hostapd/patches/465-hostapd-config-support-random-BSS-color.patch b/package/network/services/hostapd/patches/465-hostapd-config-support-random-BSS-color.patch index ada77853f..6810b797c 100644 --- a/package/network/services/hostapd/patches/465-hostapd-config-support-random-BSS-color.patch +++ b/package/network/services/hostapd/patches/465-hostapd-config-support-random-BSS-color.patch @@ -13,7 +13,7 @@ Signed-off-by: David Bauer --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -3498,6 +3498,8 @@ static int hostapd_config_fill(struct ho +@@ -3489,6 +3489,8 @@ static int hostapd_config_fill(struct ho } else if (os_strcmp(buf, "he_bss_color") == 0) { conf->he_op.he_bss_color = atoi(pos) & 0x3f; conf->he_op.he_bss_color_disabled = 0; diff --git a/package/network/services/hostapd/patches/470-survey_data_fallback.patch b/package/network/services/hostapd/patches/470-survey_data_fallback.patch index 79ab48c5c..359b5f3ef 100644 --- a/package/network/services/hostapd/patches/470-survey_data_fallback.patch +++ b/package/network/services/hostapd/patches/470-survey_data_fallback.patch @@ -1,29 +1,24 @@ --- a/src/ap/acs.c +++ b/src/ap/acs.c -@@ -455,17 +455,17 @@ static int acs_get_bw_center_chan(int fr +@@ -420,20 +420,19 @@ static int acs_usable_bw160_chan(const s static int acs_survey_is_sufficient(struct freq_survey *survey) { if (!(survey->filled & SURVEY_HAS_NF)) { + survey->nf = -95; - wpa_printf(MSG_INFO, - "ACS: Survey for freq %d is missing noise floor", - survey->freq); + wpa_printf(MSG_INFO, "ACS: Survey is missing noise floor"); - return 0; } if (!(survey->filled & SURVEY_HAS_CHAN_TIME)) { + survey->channel_time = 0; - wpa_printf(MSG_INFO, - "ACS: Survey for freq %d is missing channel time", - survey->freq); + wpa_printf(MSG_INFO, "ACS: Survey is missing channel time"); - return 0; } if (!(survey->filled & SURVEY_HAS_CHAN_TIME_BUSY) && -@@ -473,7 +473,6 @@ static int acs_survey_is_sufficient(stru + !(survey->filled & SURVEY_HAS_CHAN_TIME_RX)) { wpa_printf(MSG_INFO, - "ACS: Survey for freq %d is missing RX and busy time (at least one is required)", - survey->freq); + "ACS: Survey is missing RX and busy time (at least one is required)"); - return 0; } diff --git a/package/network/services/hostapd/patches/500-lto-jobserver-support.patch b/package/network/services/hostapd/patches/500-lto-jobserver-support.patch index 046da42ab..1a0ce1256 100644 --- a/package/network/services/hostapd/patches/500-lto-jobserver-support.patch +++ b/package/network/services/hostapd/patches/500-lto-jobserver-support.patch @@ -1,6 +1,6 @@ --- a/hostapd/Makefile +++ b/hostapd/Makefile -@@ -1396,7 +1396,7 @@ hostapd_multi.a: $(BCHECK) $(OBJS) +@@ -1394,7 +1394,7 @@ hostapd_multi.a: $(BCHECK) $(OBJS) @$(AR) cr $@ hostapd_multi.o $(OBJS) hostapd: $(OBJS) @@ -9,7 +9,7 @@ @$(E) " LD " $@ ifdef CONFIG_WPA_TRACE -@@ -1407,7 +1407,7 @@ _OBJS_VAR := OBJS_c +@@ -1405,7 +1405,7 @@ _OBJS_VAR := OBJS_c include ../src/objs.mk hostapd_cli: $(OBJS_c) @@ -20,7 +20,7 @@ NOBJS = nt_password_hash.o ../src/crypto/ms_funcs.o $(SHA1OBJS) --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -2039,31 +2039,31 @@ wpa_supplicant_multi.a: .config $(BCHECK +@@ -2025,31 +2025,31 @@ wpa_supplicant_multi.a: .config $(BCHECK @$(AR) cr $@ wpa_supplicant_multi.o $(OBJS) wpa_supplicant: $(BCHECK) $(OBJS) $(EXTRA_progs) diff --git a/package/network/services/hostapd/patches/590-rrm-wnm-statistics.patch b/package/network/services/hostapd/patches/590-rrm-wnm-statistics.patch index a6f43171c..98b8820cd 100644 --- a/package/network/services/hostapd/patches/590-rrm-wnm-statistics.patch +++ b/package/network/services/hostapd/patches/590-rrm-wnm-statistics.patch @@ -42,9 +42,9 @@ wpa_printf(MSG_DEBUG, "WNM: Send BSS Transition Management Request to " MACSTR " dialog_token=%u req_mode=0x%x disassoc_timer=%u " "validity_interval=%u", -@@ -790,10 +791,12 @@ int ieee802_11_rx_wnm_action_ap(struct h - plen); - return 0; +@@ -659,10 +660,12 @@ int ieee802_11_rx_wnm_action_ap(struct h + + switch (action) { case WNM_BSS_TRANS_MGMT_QUERY: + hapd->openwrt_stats.wnm.bss_transition_query_rx++; ieee802_11_rx_bss_trans_mgmt_query(hapd, mgmt->sa, payload, @@ -55,7 +55,7 @@ ieee802_11_rx_bss_trans_mgmt_resp(hapd, mgmt->sa, payload, plen); return 0; -@@ -840,6 +843,7 @@ int wnm_send_disassoc_imminent(struct ho +@@ -709,6 +712,7 @@ int wnm_send_disassoc_imminent(struct ho pos = mgmt->u.action.u.bss_tm_req.variable; @@ -63,7 +63,7 @@ wpa_printf(MSG_DEBUG, "WNM: Send BSS Transition Management Request frame to indicate imminent disassociation (disassoc_timer=%d) to " MACSTR, disassoc_timer, MAC2STR(sta->addr)); if (hostapd_drv_send_mlme(hapd, buf, pos - buf, 0, NULL, 0, 0) < 0) { -@@ -921,6 +925,7 @@ int wnm_send_ess_disassoc_imminent(struc +@@ -790,6 +794,7 @@ int wnm_send_ess_disassoc_imminent(struc return -1; } @@ -71,7 +71,7 @@ if (disassoc_timer) { /* send disassociation frame after time-out */ set_disassoc_timer(hapd, sta, disassoc_timer); -@@ -1001,6 +1006,7 @@ int wnm_send_bss_tm_req(struct hostapd_d +@@ -870,6 +875,7 @@ int wnm_send_bss_tm_req(struct hostapd_d } os_free(buf); diff --git a/package/network/services/hostapd/patches/600-ubus_support.patch b/package/network/services/hostapd/patches/600-ubus_support.patch index aa68079fb..521e7df82 100644 --- a/package/network/services/hostapd/patches/600-ubus_support.patch +++ b/package/network/services/hostapd/patches/600-ubus_support.patch @@ -39,7 +39,7 @@ int interface_added; /* virtual interface added for this BSS */ unsigned int started:1; unsigned int disabled:1; -@@ -682,6 +684,7 @@ hostapd_alloc_bss_data(struct hostapd_if +@@ -673,6 +675,7 @@ hostapd_alloc_bss_data(struct hostapd_if struct hostapd_bss_config *bss); int hostapd_setup_interface(struct hostapd_iface *iface); int hostapd_setup_interface_complete(struct hostapd_iface *iface, int err); @@ -49,7 +49,7 @@ struct hostapd_iface * hostapd_alloc_iface(void); --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -435,6 +435,7 @@ void hostapd_free_hapd_data(struct hosta +@@ -401,6 +401,7 @@ void hostapd_free_hapd_data(struct hosta hapd->beacon_set_done = 0; wpa_printf(MSG_DEBUG, "%s(%s)", __func__, hapd->conf->iface); @@ -57,7 +57,7 @@ accounting_deinit(hapd); hostapd_deinit_wpa(hapd); vlan_deinit(hapd); -@@ -1185,6 +1186,8 @@ static int hostapd_start_beacon(struct h +@@ -1431,6 +1432,8 @@ static int hostapd_setup_bss(struct host if (hapd->driver && hapd->driver->set_operstate) hapd->driver->set_operstate(hapd->drv_priv, 1); @@ -66,7 +66,7 @@ return 0; } -@@ -2126,6 +2129,7 @@ static int hostapd_setup_interface_compl +@@ -2050,6 +2053,7 @@ static int hostapd_setup_interface_compl if (err) goto fail; @@ -74,7 +74,7 @@ wpa_printf(MSG_DEBUG, "Completing interface initialization"); if (iface->freq) { #ifdef NEED_AP_MLME -@@ -2342,6 +2346,7 @@ dfs_offload: +@@ -2248,6 +2252,7 @@ dfs_offload: fail: wpa_printf(MSG_ERROR, "Interface initialization failed"); @@ -82,7 +82,7 @@ hostapd_set_state(iface, HAPD_IFACE_DISABLED); wpa_msg(hapd->msg_ctx, MSG_INFO, AP_EVENT_DISABLED); #ifdef CONFIG_FST -@@ -2817,6 +2822,7 @@ void hostapd_interface_deinit_free(struc +@@ -2723,6 +2728,7 @@ void hostapd_interface_deinit_free(struc (unsigned int) iface->conf->num_bss); driver = iface->bss[0]->driver; drv_priv = iface->bss[0]->drv_priv; @@ -92,7 +92,7 @@ __func__, driver, drv_priv); --- a/src/ap/ieee802_11.c +++ b/src/ap/ieee802_11.c -@@ -2740,13 +2740,18 @@ static void handle_auth(struct hostapd_d +@@ -3573,13 +3573,18 @@ static void handle_auth(struct hostapd_d u16 auth_alg, auth_transaction, status_code; u16 resp = WLAN_STATUS_SUCCESS; struct sta_info *sta = NULL; @@ -112,7 +112,7 @@ if (len < IEEE80211_HDRLEN + sizeof(mgmt->u.auth)) { wpa_printf(MSG_INFO, "handle_auth - too short payload (len=%lu)", -@@ -2914,6 +2919,13 @@ static void handle_auth(struct hostapd_d +@@ -3747,6 +3752,13 @@ static void handle_auth(struct hostapd_d resp = WLAN_STATUS_UNSPECIFIED_FAILURE; goto fail; } @@ -126,7 +126,7 @@ if (res == HOSTAPD_ACL_PENDING) return; -@@ -4695,7 +4707,7 @@ static void handle_assoc(struct hostapd_ +@@ -5488,7 +5500,7 @@ static void handle_assoc(struct hostapd_ int resp = WLAN_STATUS_SUCCESS; u16 reply_res = WLAN_STATUS_UNSPECIFIED_FAILURE; const u8 *pos; @@ -135,7 +135,7 @@ struct sta_info *sta; u8 *tmp = NULL; #ifdef CONFIG_FILS -@@ -4908,6 +4920,11 @@ static void handle_assoc(struct hostapd_ +@@ -5701,6 +5713,11 @@ static void handle_assoc(struct hostapd_ left = res; } #endif /* CONFIG_FILS */ @@ -147,7 +147,7 @@ /* followed by SSID and Supported rates; and HT capabilities if 802.11n * is used */ -@@ -5006,6 +5023,13 @@ static void handle_assoc(struct hostapd_ +@@ -5799,6 +5816,13 @@ static void handle_assoc(struct hostapd_ } #endif /* CONFIG_FILS */ @@ -161,7 +161,7 @@ fail: /* -@@ -5099,6 +5123,7 @@ static void handle_disassoc(struct hosta +@@ -5892,6 +5916,7 @@ static void handle_disassoc(struct hosta wpa_printf(MSG_DEBUG, "disassocation: STA=" MACSTR " reason_code=%d", MAC2STR(mgmt->sa), le_to_host16(mgmt->u.disassoc.reason_code)); @@ -169,7 +169,7 @@ sta = ap_get_sta(hapd, mgmt->sa); if (sta == NULL) { -@@ -5168,6 +5193,8 @@ static void handle_deauth(struct hostapd +@@ -5961,6 +5986,8 @@ static void handle_deauth(struct hostapd /* Clear the PTKSA cache entries for PASN */ ptksa_cache_flush(hapd->ptksa, mgmt->sa, WPA_CIPHER_NONE); @@ -180,7 +180,7 @@ wpa_msg(hapd->msg_ctx, MSG_DEBUG, "Station " MACSTR " trying " --- a/src/ap/beacon.c +++ b/src/ap/beacon.c -@@ -1006,6 +1006,12 @@ void handle_probe_req(struct hostapd_dat +@@ -919,6 +919,12 @@ void handle_probe_req(struct hostapd_dat u16 csa_offs[2]; size_t csa_offs_len; struct radius_sta rad_info; @@ -193,7 +193,7 @@ if (hapd->iconf->rssi_ignore_probe_request && ssi_signal && ssi_signal < hapd->iconf->rssi_ignore_probe_request) -@@ -1192,6 +1198,12 @@ void handle_probe_req(struct hostapd_dat +@@ -1105,6 +1111,12 @@ void handle_probe_req(struct hostapd_dat } #endif /* CONFIG_P2P */ @@ -250,7 +250,7 @@ ap_free_sta(hapd, sta); break; } -@@ -1305,15 +1307,28 @@ void ap_sta_set_authorized(struct hostap +@@ -1298,12 +1300,25 @@ void ap_sta_set_authorized(struct hostap sta->addr, authorized, dev_addr); if (authorized) { @@ -265,21 +265,18 @@ + [WLAN_AUTH_PASN] = "pasn", + }; + const char *auth_alg = NULL; - const u8 *dpp_pkhash; const char *keyid; - char dpp_pkhash_buf[100]; char keyid_buf[100]; char ip_addr[100]; + char alg_buf[100]; - dpp_pkhash_buf[0] = '\0'; keyid_buf[0] = '\0'; ip_addr[0] = '\0'; + alg_buf[0] = '\0'; #ifdef CONFIG_P2P if (wpa_auth_get_ip_addr(sta->wpa_sm, ip_addr_buf) == 0) { os_snprintf(ip_addr, sizeof(ip_addr), -@@ -1323,6 +1338,13 @@ void ap_sta_set_authorized(struct hostap +@@ -1313,22 +1328,31 @@ void ap_sta_set_authorized(struct hostap } #endif /* CONFIG_P2P */ @@ -288,29 +285,27 @@ + + if (auth_alg) + os_snprintf(alg_buf, sizeof(alg_buf), -+ " auth_alg=%s", auth_alg); ++ " auth_alg=%s", auth_alg); + keyid = ap_sta_wpa_get_keyid(hapd, sta); if (keyid) { os_snprintf(keyid_buf, sizeof(keyid_buf), -@@ -1341,17 +1363,19 @@ void ap_sta_set_authorized(struct hostap - dpp_pkhash, SHA256_MAC_LEN); + " keyid=%s", keyid); } -- wpa_msg(hapd->msg_ctx, MSG_INFO, AP_STA_CONNECTED "%s%s%s%s", -- buf, ip_addr, keyid_buf, dpp_pkhash_buf); +- wpa_msg(hapd->msg_ctx, MSG_INFO, AP_STA_CONNECTED "%s%s%s", +- buf, ip_addr, keyid_buf); + hostapd_ubus_notify_authorized(hapd, sta, auth_alg); -+ wpa_msg(hapd->msg_ctx, MSG_INFO, AP_STA_CONNECTED "%s%s%s%s%s", -+ buf, ip_addr, keyid_buf, dpp_pkhash_buf, alg_buf); ++ wpa_msg(hapd->msg_ctx, MSG_INFO, AP_STA_CONNECTED "%s%s%s%s", ++ buf, ip_addr, keyid_buf, alg_buf); if (hapd->msg_ctx_parent && hapd->msg_ctx_parent != hapd->msg_ctx) wpa_msg_no_global(hapd->msg_ctx_parent, MSG_INFO, -- AP_STA_CONNECTED "%s%s%s%s", -+ AP_STA_CONNECTED "%s%s%s%s%s", - buf, ip_addr, keyid_buf, -- dpp_pkhash_buf); -+ dpp_pkhash_buf, alg_buf); +- AP_STA_CONNECTED "%s%s%s", +- buf, ip_addr, keyid_buf); ++ AP_STA_CONNECTED "%s%s%s%s", ++ buf, ip_addr, keyid_buf, alg_buf); } else { wpa_msg(hapd->msg_ctx, MSG_INFO, AP_STA_DISCONNECTED "%s", buf); + hostapd_ubus_notify(hapd, "disassoc", sta->addr); @@ -319,7 +314,7 @@ hapd->msg_ctx_parent != hapd->msg_ctx) --- a/src/ap/wpa_auth_glue.c +++ b/src/ap/wpa_auth_glue.c -@@ -269,6 +269,7 @@ static void hostapd_wpa_auth_psk_failure +@@ -268,6 +268,7 @@ static void hostapd_wpa_auth_psk_failure struct hostapd_data *hapd = ctx; wpa_msg(hapd->msg_ctx, MSG_INFO, AP_STA_POSSIBLE_PSK_MISMATCH MACSTR, MAC2STR(addr)); @@ -329,7 +324,7 @@ --- a/wpa_supplicant/Makefile +++ b/wpa_supplicant/Makefile -@@ -194,6 +194,12 @@ ifdef CONFIG_EAPOL_TEST +@@ -183,6 +183,12 @@ ifdef CONFIG_EAPOL_TEST CFLAGS += -Werror -DEAPOL_TEST endif @@ -342,7 +337,7 @@ ifdef CONFIG_CODE_COVERAGE CFLAGS += -O0 -fprofile-arcs -ftest-coverage LIBS += -lgcov -@@ -989,6 +995,9 @@ ifdef CONFIG_CTRL_IFACE_MIB +@@ -977,6 +983,9 @@ ifdef CONFIG_CTRL_IFACE_MIB CFLAGS += -DCONFIG_CTRL_IFACE_MIB endif OBJS += ../src/ap/ctrl_iface_ap.o @@ -354,7 +349,7 @@ CFLAGS += -DEAP_SERVER -DEAP_SERVER_IDENTITY --- a/wpa_supplicant/wpa_supplicant.c +++ b/wpa_supplicant/wpa_supplicant.c -@@ -7608,6 +7608,8 @@ struct wpa_supplicant * wpa_supplicant_a +@@ -7285,6 +7285,8 @@ struct wpa_supplicant * wpa_supplicant_a } #endif /* CONFIG_P2P */ @@ -363,7 +358,7 @@ return wpa_s; } -@@ -7634,6 +7636,8 @@ int wpa_supplicant_remove_iface(struct w +@@ -7311,6 +7313,8 @@ int wpa_supplicant_remove_iface(struct w struct wpa_supplicant *parent = wpa_s->parent; #endif /* CONFIG_MESH */ @@ -372,7 +367,7 @@ /* Remove interface from the global list of interfaces */ prev = global->ifaces; if (prev == wpa_s) { -@@ -7980,8 +7984,12 @@ int wpa_supplicant_run(struct wpa_global +@@ -7614,8 +7618,12 @@ int wpa_supplicant_run(struct wpa_global eloop_register_signal_terminate(wpa_supplicant_terminate, global); eloop_register_signal_reconfig(wpa_supplicant_reconfig, global); @@ -387,15 +382,15 @@ --- a/wpa_supplicant/wpa_supplicant_i.h +++ b/wpa_supplicant/wpa_supplicant_i.h -@@ -21,6 +21,7 @@ +@@ -20,6 +20,7 @@ + #include "wps/wps_defs.h" #include "config_ssid.h" #include "wmm_ac.h" - #include "pasn/pasn_common.h" +#include "ubus.h" extern const char *const wpa_supplicant_version; extern const char *const wpa_supplicant_license; -@@ -324,6 +325,8 @@ struct wpa_global { +@@ -323,6 +324,8 @@ struct wpa_global { #endif /* CONFIG_WIFI_DISPLAY */ struct psk_list_entry *add_psk; /* From group formation */ @@ -404,7 +399,7 @@ }; -@@ -655,6 +658,7 @@ struct wpa_supplicant { +@@ -707,6 +710,7 @@ struct wpa_supplicant { unsigned char own_addr[ETH_ALEN]; unsigned char perm_addr[ETH_ALEN]; char ifname[100]; @@ -422,7 +417,7 @@ #ifndef WPS_PIN_SCAN_IGNORE_SEL_REG -@@ -402,6 +403,8 @@ static int wpa_supplicant_wps_cred(void +@@ -391,6 +392,8 @@ static int wpa_supplicant_wps_cred(void wpa_hexdump_key(MSG_DEBUG, "WPS: Received Credential attribute", cred->cred_attr, cred->cred_attr_len); @@ -433,7 +428,7 @@ --- a/hostapd/main.c +++ b/hostapd/main.c -@@ -901,6 +901,7 @@ int main(int argc, char *argv[]) +@@ -897,6 +897,7 @@ int main(int argc, char *argv[]) } hostapd_global_ctrl_iface_init(&interfaces); @@ -441,7 +436,7 @@ if (hostapd_global_run(&interfaces, daemonize, pid_file)) { wpa_printf(MSG_ERROR, "Failed to start eloop"); -@@ -910,6 +911,7 @@ int main(int argc, char *argv[]) +@@ -906,6 +907,7 @@ int main(int argc, char *argv[]) ret = 0; out: @@ -532,7 +527,7 @@ --- a/src/ap/dfs.c +++ b/src/ap/dfs.c -@@ -1211,6 +1211,8 @@ int hostapd_dfs_pre_cac_expired(struct h +@@ -1203,6 +1203,8 @@ int hostapd_dfs_pre_cac_expired(struct h "freq=%d ht_enabled=%d chan_offset=%d chan_width=%d cf1=%d cf2=%d", freq, ht_enabled, chan_offset, chan_width, cf1, cf2); @@ -574,7 +569,7 @@ } --- a/src/ap/sta_info.h +++ b/src/ap/sta_info.h -@@ -293,6 +293,7 @@ struct sta_info { +@@ -328,6 +328,7 @@ struct sta_info { #endif /* CONFIG_TESTING_OPTIONS */ #ifdef CONFIG_AIRTIME_POLICY unsigned int airtime_weight; diff --git a/package/network/services/hostapd/patches/700-wifi-reload.patch b/package/network/services/hostapd/patches/700-wifi-reload.patch index 5ac7f711a..174127df6 100644 --- a/package/network/services/hostapd/patches/700-wifi-reload.patch +++ b/package/network/services/hostapd/patches/700-wifi-reload.patch @@ -1,6 +1,6 @@ --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -2418,6 +2418,8 @@ static int hostapd_config_fill(struct ho +@@ -2416,6 +2416,8 @@ static int hostapd_config_fill(struct ho bss->isolate = atoi(pos); } else if (os_strcmp(buf, "ap_max_inactivity") == 0) { bss->ap_max_inactivity = atoi(pos); @@ -8,8 +8,8 @@ + bss->config_id = os_strdup(pos); } else if (os_strcmp(buf, "skip_inactivity_poll") == 0) { bss->skip_inactivity_poll = atoi(pos); - } else if (os_strcmp(buf, "config_id") == 0) { -@@ -3128,6 +3130,8 @@ static int hostapd_config_fill(struct ho + } else if (os_strcmp(buf, "country_code") == 0) { +@@ -3121,6 +3123,8 @@ static int hostapd_config_fill(struct ho } } else if (os_strcmp(buf, "acs_exclude_dfs") == 0) { conf->acs_exclude_dfs = atoi(pos); @@ -20,7 +20,15 @@ } else if (os_strcmp(buf, "channel") == 0) { --- a/src/ap/ap_config.c +++ b/src/ap/ap_config.c -@@ -997,6 +997,7 @@ void hostapd_config_free(struct hostapd_ +@@ -796,6 +796,7 @@ void hostapd_config_free_bss(struct host + os_free(conf->radius_req_attr_sqlite); + os_free(conf->rsn_preauth_interfaces); + os_free(conf->ctrl_interface); ++ os_free(conf->config_id); + os_free(conf->ca_cert); + os_free(conf->server_cert); + os_free(conf->server_cert2); +@@ -995,6 +996,7 @@ void hostapd_config_free(struct hostapd_ for (i = 0; i < conf->num_bss; i++) hostapd_config_free_bss(conf->bss[i]); @@ -30,7 +38,16 @@ os_free(conf->basic_rates); --- a/src/ap/ap_config.h +++ b/src/ap/ap_config.h -@@ -987,6 +987,7 @@ struct eht_phy_capabilities_info { +@@ -285,6 +285,8 @@ struct hostapd_bss_config { + char vlan_bridge[IFNAMSIZ + 1]; + char wds_bridge[IFNAMSIZ + 1]; + ++ char *config_id; ++ + enum hostapd_logger_level logger_syslog_level, logger_stdout_level; + + unsigned int logger_syslog; /* module bitfield */ +@@ -969,6 +971,7 @@ struct eht_phy_capabilities_info { struct hostapd_config { struct hostapd_bss_config **bss, *last_bss; size_t num_bss; @@ -40,7 +57,7 @@ int rts_threshold; --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -254,6 +254,10 @@ static int hostapd_iface_conf_changed(st +@@ -224,6 +224,10 @@ static int hostapd_iface_conf_changed(st { size_t i; @@ -51,7 +68,7 @@ if (newconf->num_bss != oldconf->num_bss) return 1; -@@ -267,7 +271,7 @@ static int hostapd_iface_conf_changed(st +@@ -237,7 +241,7 @@ static int hostapd_iface_conf_changed(st } @@ -60,17 +77,26 @@ { struct hapd_interfaces *interfaces = iface->interfaces; struct hostapd_data *hapd = iface->bss[0]; -@@ -295,6 +299,9 @@ int hostapd_reload_config(struct hostapd +@@ -260,13 +264,16 @@ int hostapd_reload_config(struct hostapd + if (newconf == NULL) + return -1; + +- hostapd_clear_old(iface); +- + oldconf = hapd->iconf; + if (hostapd_iface_conf_changed(newconf, oldconf)) { char *fname; int res; + if (reconf) + return -1; + - hostapd_clear_old(iface); - ++ hostapd_clear_old(iface); ++ wpa_printf(MSG_DEBUG, -@@ -321,6 +328,24 @@ int hostapd_reload_config(struct hostapd + "Configuration changes include interface/BSS modification - force full disable+enable sequence"); + fname = os_strdup(iface->config_fname); +@@ -291,6 +298,24 @@ int hostapd_reload_config(struct hostapd wpa_printf(MSG_ERROR, "Failed to enable interface on config reload"); return res; @@ -95,7 +121,7 @@ } iface->conf = newconf; -@@ -337,6 +362,12 @@ int hostapd_reload_config(struct hostapd +@@ -307,6 +332,12 @@ int hostapd_reload_config(struct hostapd for (j = 0; j < iface->num_bss; j++) { hapd = iface->bss[j]; @@ -105,10 +131,10 @@ + } + if (newconf->bss[j]->config_id) + hapd->config_id = strdup(newconf->bss[j]->config_id); - if (!hapd->conf->config_id || !newconf->bss[j]->config_id || - os_strcmp(hapd->conf->config_id, - newconf->bss[j]->config_id) != 0) -@@ -2514,6 +2545,10 @@ hostapd_alloc_bss_data(struct hostapd_if + hapd->iconf = newconf; + hapd->conf = newconf->bss[j]; + hostapd_reload_bss(hapd); +@@ -2420,6 +2451,10 @@ hostapd_alloc_bss_data(struct hostapd_if hapd->iconf = conf; hapd->conf = bss; hapd->iface = hapd_iface; @@ -138,7 +164,7 @@ int interface_added; /* virtual interface added for this BSS */ unsigned int started:1; unsigned int disabled:1; -@@ -676,7 +677,7 @@ struct hostapd_iface { +@@ -667,7 +668,7 @@ struct hostapd_iface { int hostapd_for_each_interface(struct hapd_interfaces *interfaces, int (*cb)(struct hostapd_iface *iface, void *ctx), void *ctx); @@ -149,19 +175,19 @@ hostapd_alloc_bss_data(struct hostapd_iface *hapd_iface, --- a/src/drivers/driver_nl80211.c +++ b/src/drivers/driver_nl80211.c -@@ -5054,6 +5054,9 @@ static int wpa_driver_nl80211_set_ap(voi +@@ -4852,6 +4852,9 @@ static int wpa_driver_nl80211_set_ap(voi if (ret) { wpa_printf(MSG_DEBUG, "nl80211: Beacon set failed: %d (%s)", ret, strerror(-ret)); -+ if (!bss->flink->beacon_set) ++ if (!bss->beacon_set) + ret = 0; -+ bss->flink->beacon_set = 0; ++ bss->beacon_set = 0; } else { - bss->flink->beacon_set = 1; + bss->beacon_set = 1; nl80211_set_bss(bss, params->cts_protect, params->preamble, --- a/hostapd/ctrl_iface.c +++ b/hostapd/ctrl_iface.c -@@ -187,7 +187,7 @@ static int hostapd_ctrl_iface_update(str +@@ -186,7 +186,7 @@ static int hostapd_ctrl_iface_update(str iface->interfaces->config_read_cb = hostapd_ctrl_iface_config_read; reload_opts = txt; @@ -172,7 +198,7 @@ } --- a/hostapd/main.c +++ b/hostapd/main.c -@@ -320,7 +320,7 @@ static void handle_term(int sig, void *s +@@ -317,7 +317,7 @@ static void handle_term(int sig, void *s static int handle_reload_iface(struct hostapd_iface *iface, void *ctx) { diff --git a/package/network/services/hostapd/patches/710-vlan_no_bridge.patch b/package/network/services/hostapd/patches/710-vlan_no_bridge.patch index f625f4bda..b06ef8f68 100644 --- a/package/network/services/hostapd/patches/710-vlan_no_bridge.patch +++ b/package/network/services/hostapd/patches/710-vlan_no_bridge.patch @@ -30,7 +30,7 @@ --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -3353,6 +3353,8 @@ static int hostapd_config_fill(struct ho +@@ -3346,6 +3346,8 @@ static int hostapd_config_fill(struct ho #ifndef CONFIG_NO_VLAN } else if (os_strcmp(buf, "dynamic_vlan") == 0) { bss->ssid.dynamic_vlan = atoi(pos); diff --git a/package/network/services/hostapd/patches/711-wds_bridge_force.patch b/package/network/services/hostapd/patches/711-wds_bridge_force.patch index e04ae6253..169807c61 100644 --- a/package/network/services/hostapd/patches/711-wds_bridge_force.patch +++ b/package/network/services/hostapd/patches/711-wds_bridge_force.patch @@ -6,12 +6,12 @@ os_strlcpy(bss->bridge, pos, sizeof(bss->bridge)); + if (!bss->wds_bridge[0]) + os_strlcpy(bss->wds_bridge, pos, sizeof(bss->wds_bridge)); - } else if (os_strcmp(buf, "bridge_hairpin") == 0) { - bss->bridge_hairpin = atoi(pos); } else if (os_strcmp(buf, "vlan_bridge") == 0) { + os_strlcpy(bss->vlan_bridge, pos, sizeof(bss->vlan_bridge)); + } else if (os_strcmp(buf, "wds_bridge") == 0) { --- a/src/ap/ap_drv_ops.c +++ b/src/ap/ap_drv_ops.c -@@ -348,8 +348,6 @@ int hostapd_set_wds_sta(struct hostapd_d +@@ -340,8 +340,6 @@ int hostapd_set_wds_sta(struct hostapd_d return -1; if (hapd->conf->wds_bridge[0]) bridge = hapd->conf->wds_bridge; diff --git a/package/network/services/hostapd/patches/720-iface_max_num_sta.patch b/package/network/services/hostapd/patches/720-iface_max_num_sta.patch index a06f141c8..ed76d22dd 100644 --- a/package/network/services/hostapd/patches/720-iface_max_num_sta.patch +++ b/package/network/services/hostapd/patches/720-iface_max_num_sta.patch @@ -1,6 +1,6 @@ --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -2848,6 +2848,14 @@ static int hostapd_config_fill(struct ho +@@ -2841,6 +2841,14 @@ static int hostapd_config_fill(struct ho line, bss->max_num_sta, MAX_STA_COUNT); return 1; } @@ -17,7 +17,7 @@ } else if (os_strcmp(buf, "extended_key_id") == 0) { --- a/src/ap/hostapd.h +++ b/src/ap/hostapd.h -@@ -721,6 +721,7 @@ void hostapd_cleanup_cs_params(struct ho +@@ -711,6 +711,7 @@ void hostapd_cleanup_cs_params(struct ho void hostapd_periodic_iface(struct hostapd_iface *iface); int hostapd_owe_trans_get_info(struct hostapd_data *hapd); void hostapd_ocv_check_csa_sa_query(void *eloop_ctx, void *timeout_ctx); @@ -27,7 +27,7 @@ void hostapd_cleanup_cca_params(struct hostapd_data *hapd); --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -271,6 +271,30 @@ static int hostapd_iface_conf_changed(st +@@ -241,6 +241,30 @@ static int hostapd_iface_conf_changed(st } @@ -60,7 +60,7 @@ struct hapd_interfaces *interfaces = iface->interfaces; --- a/src/ap/beacon.c +++ b/src/ap/beacon.c -@@ -1222,7 +1222,7 @@ void handle_probe_req(struct hostapd_dat +@@ -1135,7 +1135,7 @@ void handle_probe_req(struct hostapd_dat if (hapd->conf->no_probe_resp_if_max_sta && is_multicast_ether_addr(mgmt->da) && is_multicast_ether_addr(mgmt->bssid) && @@ -71,7 +71,7 @@ " since no room for additional STA", --- a/src/ap/ap_config.h +++ b/src/ap/ap_config.h -@@ -1026,6 +1026,8 @@ struct hostapd_config { +@@ -1010,6 +1010,8 @@ struct hostapd_config { unsigned int track_sta_max_num; unsigned int track_sta_max_age; diff --git a/package/network/services/hostapd/patches/730-ft_iface.patch b/package/network/services/hostapd/patches/730-ft_iface.patch index 1826c9762..d9a4f15f0 100644 --- a/package/network/services/hostapd/patches/730-ft_iface.patch +++ b/package/network/services/hostapd/patches/730-ft_iface.patch @@ -1,6 +1,6 @@ --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -3007,6 +3007,8 @@ static int hostapd_config_fill(struct ho +@@ -3000,6 +3000,8 @@ static int hostapd_config_fill(struct ho wpa_printf(MSG_INFO, "Line %d: Obsolete peerkey parameter ignored", line); #ifdef CONFIG_IEEE80211R_AP @@ -18,10 +18,10 @@ + char ft_iface[IFNAMSIZ + 1]; char vlan_bridge[IFNAMSIZ + 1]; char wds_bridge[IFNAMSIZ + 1]; - int bridge_hairpin; /* hairpin_mode on bridge members */ + --- a/src/ap/wpa_auth_glue.c +++ b/src/ap/wpa_auth_glue.c -@@ -1616,8 +1616,12 @@ int hostapd_setup_wpa(struct hostapd_dat +@@ -1595,8 +1595,12 @@ int hostapd_setup_wpa(struct hostapd_dat wpa_key_mgmt_ft(hapd->conf->wpa_key_mgmt)) { const char *ft_iface; diff --git a/package/network/services/hostapd/patches/740-snoop_iface.patch b/package/network/services/hostapd/patches/740-snoop_iface.patch index a11664473..608f15a25 100644 --- a/package/network/services/hostapd/patches/740-snoop_iface.patch +++ b/package/network/services/hostapd/patches/740-snoop_iface.patch @@ -7,7 +7,7 @@ + char snoop_iface[IFNAMSIZ + 1]; char vlan_bridge[IFNAMSIZ + 1]; char wds_bridge[IFNAMSIZ + 1]; - int bridge_hairpin; /* hairpin_mode on bridge members */ + --- a/src/ap/x_snoop.c +++ b/src/ap/x_snoop.c @@ -33,14 +33,16 @@ int x_snoop_init(struct hostapd_data *ha @@ -55,10 +55,10 @@ "x_snoop: Failed to initialize L2 packet processing %s", --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -2320,6 +2320,8 @@ static int hostapd_config_fill(struct ho +@@ -2318,6 +2318,8 @@ static int hostapd_config_fill(struct ho + os_strlcpy(bss->bridge, pos, sizeof(bss->bridge)); + if (!bss->wds_bridge[0]) os_strlcpy(bss->wds_bridge, pos, sizeof(bss->wds_bridge)); - } else if (os_strcmp(buf, "bridge_hairpin") == 0) { - bss->bridge_hairpin = atoi(pos); + } else if (os_strcmp(buf, "snoop_iface") == 0) { + os_strlcpy(bss->snoop_iface, pos, sizeof(bss->snoop_iface)); } else if (os_strcmp(buf, "vlan_bridge") == 0) { diff --git a/package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch b/package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch index c3a77bc65..479d56155 100644 --- a/package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch +++ b/package/network/services/hostapd/patches/750-qos_map_set_without_interworking.patch @@ -18,7 +18,7 @@ #ifdef CONFIG_HS20 static int hs20_parse_conn_capab(struct hostapd_bss_config *bss, char *buf, -@@ -4064,10 +4064,10 @@ static int hostapd_config_fill(struct ho +@@ -4046,10 +4046,10 @@ static int hostapd_config_fill(struct ho bss->gas_frag_limit = val; } else if (os_strcmp(buf, "gas_comeback_delay") == 0) { bss->gas_comeback_delay = atoi(pos); @@ -32,7 +32,7 @@ os_free(bss->dump_msk_file); --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -1499,6 +1499,7 @@ static int hostapd_setup_bss(struct host +@@ -1424,6 +1424,7 @@ static int hostapd_setup_bss(struct host wpa_printf(MSG_ERROR, "GAS server initialization failed"); return -1; } @@ -40,7 +40,7 @@ if (conf->qos_map_set_len && hostapd_drv_set_qos_map(hapd, conf->qos_map_set, -@@ -1506,7 +1507,6 @@ static int hostapd_setup_bss(struct host +@@ -1431,7 +1432,6 @@ static int hostapd_setup_bss(struct host wpa_printf(MSG_ERROR, "Failed to initialize QoS Map"); return -1; } @@ -50,7 +50,7 @@ wpa_printf(MSG_ERROR, "BSS Load initialization failed"); --- a/wpa_supplicant/events.c +++ b/wpa_supplicant/events.c -@@ -2672,8 +2672,6 @@ void wnm_bss_keep_alive_deinit(struct wp +@@ -2586,8 +2586,6 @@ void wnm_bss_keep_alive_deinit(struct wp } @@ -59,16 +59,16 @@ static int wpas_qos_map_set(struct wpa_supplicant *wpa_s, const u8 *qos_map, size_t len) { -@@ -2706,8 +2704,6 @@ static void interworking_process_assoc_r +@@ -2620,8 +2618,6 @@ static void interworking_process_assoc_r } } -#endif /* CONFIG_INTERWORKING */ - - static void wpa_supplicant_set_4addr_mode(struct wpa_supplicant *wpa_s) - { -@@ -3087,10 +3083,8 @@ static int wpa_supplicant_event_associnf + static void multi_ap_process_assoc_resp(struct wpa_supplicant *wpa_s, + const u8 *ies, size_t ies_len) +@@ -2954,10 +2950,8 @@ static int wpa_supplicant_event_associnf wnm_process_assoc_resp(wpa_s, data->assoc_info.resp_ies, data->assoc_info.resp_ies_len); #endif /* CONFIG_WNM */ @@ -81,7 +81,7 @@ data->assoc_info.resp_ies_len, WLAN_EID_VHT_CAP)) --- a/src/ap/ieee802_11_shared.c +++ b/src/ap/ieee802_11_shared.c -@@ -1116,13 +1116,11 @@ u8 * hostapd_eid_rsnxe(struct hostapd_da +@@ -1100,13 +1100,11 @@ u8 * hostapd_eid_rsnxe(struct hostapd_da u16 check_ext_capab(struct hostapd_data *hapd, struct sta_info *sta, const u8 *ext_capab_ie, size_t ext_capab_ie_len) { diff --git a/package/network/services/hostapd/patches/751-qos_map_ignore_when_unsupported.patch b/package/network/services/hostapd/patches/751-qos_map_ignore_when_unsupported.patch index 1fc4e8a77..d90a27523 100644 --- a/package/network/services/hostapd/patches/751-qos_map_ignore_when_unsupported.patch +++ b/package/network/services/hostapd/patches/751-qos_map_ignore_when_unsupported.patch @@ -1,6 +1,6 @@ --- a/src/ap/ap_drv_ops.c +++ b/src/ap/ap_drv_ops.c -@@ -874,7 +874,8 @@ int hostapd_start_dfs_cac(struct hostapd +@@ -864,7 +864,8 @@ int hostapd_start_dfs_cac(struct hostapd int hostapd_drv_set_qos_map(struct hostapd_data *hapd, const u8 *qos_map_set, u8 qos_map_set_len) { diff --git a/package/network/services/hostapd/patches/760-dynamic_own_ip.patch b/package/network/services/hostapd/patches/760-dynamic_own_ip.patch index 2f5015892..3d2b59e8c 100644 --- a/package/network/services/hostapd/patches/760-dynamic_own_ip.patch +++ b/package/network/services/hostapd/patches/760-dynamic_own_ip.patch @@ -1,6 +1,6 @@ --- a/src/ap/ap_config.h +++ b/src/ap/ap_config.h -@@ -310,6 +310,7 @@ struct hostapd_bss_config { +@@ -311,6 +311,7 @@ struct hostapd_bss_config { unsigned int eap_sim_db_timeout; int eap_server_erp; /* Whether ERP is enabled on internal EAP server */ struct hostapd_ip_addr own_ip_addr; @@ -98,7 +98,7 @@ hapd->conf->own_ip_addr.af == AF_INET && --- a/hostapd/config_file.c +++ b/hostapd/config_file.c -@@ -2688,6 +2688,8 @@ static int hostapd_config_fill(struct ho +@@ -2681,6 +2681,8 @@ static int hostapd_config_fill(struct ho } else if (os_strcmp(buf, "iapp_interface") == 0) { wpa_printf(MSG_INFO, "DEPRECATED: iapp_interface not used"); #endif /* CONFIG_IAPP */ diff --git a/package/network/services/hostapd/patches/761-shared_das_port.patch b/package/network/services/hostapd/patches/761-shared_das_port.patch index 59c2a9679..7516b7349 100644 --- a/package/network/services/hostapd/patches/761-shared_das_port.patch +++ b/package/network/services/hostapd/patches/761-shared_das_port.patch @@ -10,7 +10,7 @@ unsigned int time_window; --- a/src/ap/hostapd.c +++ b/src/ap/hostapd.c -@@ -1442,6 +1442,7 @@ static int hostapd_setup_bss(struct host +@@ -1367,6 +1367,7 @@ static int hostapd_setup_bss(struct host struct radius_das_conf das_conf; os_memset(&das_conf, 0, sizeof(das_conf)); das_conf.port = conf->radius_das_port; diff --git a/package/network/services/hostapd/patches/800-acs-don-t-select-indoor-channel-on-outdoor-operation.patch b/package/network/services/hostapd/patches/800-acs-don-t-select-indoor-channel-on-outdoor-operation.patch new file mode 100644 index 000000000..1d9e9564e --- /dev/null +++ b/package/network/services/hostapd/patches/800-acs-don-t-select-indoor-channel-on-outdoor-operation.patch @@ -0,0 +1,58 @@ +From 37528a5205cb0b9e2238b7d97fb2ff5457448f1c Mon Sep 17 00:00:00 2001 +From: David Bauer +Date: Thu, 8 Sep 2022 01:45:41 +0200 +Subject: [PATCH] acs: don't select indoor channel on outdoor operation + +Don't select channels designated for exclusive-indoor use when the +country3 element is set on outdoor operation. + +Signed-off-by: David Bauer +--- + src/ap/acs.c | 9 +++++++++ + src/ap/dfs.c | 3 +++ + 2 files changed, 12 insertions(+) + +--- a/src/ap/acs.c ++++ b/src/ap/acs.c +@@ -552,6 +552,9 @@ static void acs_survey_mode_interference + if (chan->max_tx_power < iface->conf->min_tx_power) + continue; + ++ if (chan->flag & HOSTAPD_CHAN_INDOOR_ONLY && iface->conf->country[2] == 0x4f) ++ continue; ++ + wpa_printf(MSG_DEBUG, "ACS: Survey analysis for channel %d (%d MHz)", + chan->chan, chan->freq); + +@@ -686,6 +689,9 @@ acs_find_ideal_chan_mode(struct hostapd_ + if (chan->max_tx_power < iface->conf->min_tx_power) + continue; + ++ if (chan->flag & HOSTAPD_CHAN_INDOOR_ONLY && iface->conf->country[2] == 0x4f) ++ continue; ++ + if (!chan_bw_allowed(chan, bw, 1, 1)) { + wpa_printf(MSG_DEBUG, + "ACS: Channel %d: BW %u is not supported", +@@ -1067,6 +1073,9 @@ static int * acs_request_scan_add_freqs( + if (chan->max_tx_power < iface->conf->min_tx_power) + continue; + ++ if (chan->flag & HOSTAPD_CHAN_INDOOR_ONLY && iface->conf->country[2] == 0x4f) ++ continue; ++ + *freq++ = chan->freq; + } + +--- a/src/ap/dfs.c ++++ b/src/ap/dfs.c +@@ -282,6 +282,9 @@ static int dfs_find_channel(struct hosta + if (chan->max_tx_power < iface->conf->min_tx_power) + continue; + ++ if (chan->flag & HOSTAPD_CHAN_INDOOR_ONLY && iface->conf->country[2] == 0x4f) ++ continue; ++ + if (ret_chan && idx == channel_idx) { + wpa_printf(MSG_DEBUG, "Selected channel %d (%d)", + chan->freq, chan->chan); diff --git a/package/network/services/hostapd/patches/990-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch b/package/network/services/hostapd/patches/990-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch index 51690def0..e78a4ef5c 100644 --- a/package/network/services/hostapd/patches/990-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch +++ b/package/network/services/hostapd/patches/990-ctrl-make-WNM_AP-functions-dependant-on-CONFIG_AP.patch @@ -13,7 +13,7 @@ Signed-off-by: David Bauer --- a/wpa_supplicant/ctrl_iface.c +++ b/wpa_supplicant/ctrl_iface.c -@@ -12640,7 +12640,7 @@ char * wpa_supplicant_ctrl_iface_process +@@ -12241,7 +12241,7 @@ char * wpa_supplicant_ctrl_iface_process if (wpas_ctrl_iface_coloc_intf_report(wpa_s, buf + 18)) reply_len = -1; #endif /* CONFIG_WNM */ @@ -22,7 +22,7 @@ Signed-off-by: David Bauer } else if (os_strncmp(buf, "DISASSOC_IMMINENT ", 18) == 0) { if (ap_ctrl_iface_disassoc_imminent(wpa_s, buf + 18)) reply_len = -1; -@@ -12650,7 +12650,7 @@ char * wpa_supplicant_ctrl_iface_process +@@ -12251,7 +12251,7 @@ char * wpa_supplicant_ctrl_iface_process } else if (os_strncmp(buf, "BSS_TM_REQ ", 11) == 0) { if (ap_ctrl_iface_bss_tm_req(wpa_s, buf + 11)) reply_len = -1; diff --git a/package/network/services/hostapd/patches/991-s8-u8.patch b/package/network/services/hostapd/patches/991-s8-u8.patch deleted file mode 100644 index e01101685..000000000 --- a/package/network/services/hostapd/patches/991-s8-u8.patch +++ /dev/null @@ -1,23 +0,0 @@ -Index: hostapd-2023-06-22-599d00be/src/drivers/driver_nl80211.c -=================================================================== ---- hostapd-2023-06-22-599d00be.orig/src/drivers/driver_nl80211.c -+++ hostapd-2023-06-22-599d00be/src/drivers/driver_nl80211.c -@@ -7686,7 +7686,7 @@ static int get_sta_handler(struct nl_msg - [NL80211_STA_INFO_BEACON_SIGNAL_AVG] = { .type = NLA_U8}, - [NL80211_STA_INFO_RX_DURATION] = { .type = NLA_U64 }, - [NL80211_STA_INFO_ACK_SIGNAL] = { .type = NLA_U8 }, -- [NL80211_STA_INFO_ACK_SIGNAL_AVG] = { .type = NLA_S8 }, -+ [NL80211_STA_INFO_ACK_SIGNAL_AVG] = { .type = NLA_U8 }, - [NL80211_STA_INFO_RX_MPDUS] = { .type = NLA_U32 }, - [NL80211_STA_INFO_FCS_ERROR_COUNT] = { .type = NLA_U32 }, - [NL80211_STA_INFO_TX_DURATION] = { .type = NLA_U64 }, -@@ -7792,7 +7792,7 @@ static int get_sta_handler(struct nl_msg - } - if (stats[NL80211_STA_INFO_ACK_SIGNAL_AVG]) - data->avg_ack_signal = -- nla_get_s8(stats[NL80211_STA_INFO_ACK_SIGNAL_AVG]); -+ nla_get_u8(stats[NL80211_STA_INFO_ACK_SIGNAL_AVG]); - if (stats[NL80211_STA_INFO_RX_MPDUS]) - data->rx_mpdus = nla_get_u32(stats[NL80211_STA_INFO_RX_MPDUS]); - if (stats[NL80211_STA_INFO_FCS_ERROR_COUNT]) - \ No newline at end of file diff --git a/package/network/services/hostapd/patches/992-openssl-include-rsa.patch b/package/network/services/hostapd/patches/992-openssl-include-rsa.patch new file mode 100644 index 000000000..581ae9f67 --- /dev/null +++ b/package/network/services/hostapd/patches/992-openssl-include-rsa.patch @@ -0,0 +1,32 @@ +From f374d52079111a4340acb6df835f45ac6b5f3f60 Mon Sep 17 00:00:00 2001 +From: Andre Heider +Date: Wed, 22 Jun 2022 14:13:55 +0200 +Subject: OpenSSL: Include rsa.h for all OpenSSL versions + +This fixes the build with OpenSSL 1.1.1: +../src/crypto/crypto_openssl.c: In function 'crypto_rsa_oaep_sha256_decrypt': +../src/crypto/crypto_openssl.c:4404:49: error: 'RSA_PKCS1_OAEP_PADDING' undeclared (first use in this function) + +Signed-off-by: Andre Heider +--- + src/crypto/crypto_openssl.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/src/crypto/crypto_openssl.c ++++ b/src/crypto/crypto_openssl.c +@@ -16,6 +16,7 @@ + #include + #include + #include ++#include + #include + #ifdef CONFIG_ECC + #include +@@ -25,7 +26,6 @@ + #include + #include + #include +-#include + #include + #include + #else /* OpenSSL version >= 3.0 */ diff --git a/package/network/services/hostapd/patches/993-fix-mbo-module-build.patch b/package/network/services/hostapd/patches/993-fix-mbo-module-build.patch new file mode 100644 index 000000000..3efc484f8 --- /dev/null +++ b/package/network/services/hostapd/patches/993-fix-mbo-module-build.patch @@ -0,0 +1,10 @@ +--- a/wpa_supplicant/Makefile ++++ b/wpa_supplicant/Makefile +@@ -339,6 +339,7 @@ + + ifdef CONFIG_MBO + CONFIG_WNM=y ++NEED_GAS=y + endif + + ifdef CONFIG_WNM diff --git a/package/network/services/unetd/Makefile b/package/network/services/unetd/Makefile new file mode 100644 index 000000000..687306149 --- /dev/null +++ b/package/network/services/unetd/Makefile @@ -0,0 +1,113 @@ +# +# Copyright (C) 2022 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk + +PKG_NAME:=unetd +PKG_SOURCE_PROTO:=git +PKG_SOURCE_URL=$(PROJECT_GIT)/project/unetd.git +PKG_SOURCE_DATE:=2024-03-31 +PKG_SOURCE_VERSION:=806457664ab6e952a7f4febb82e891f596fe577c +PKG_MIRROR_HASH:=0d3952f8079476e68487094b49c9c39074a1068c932f204a87c609074ce30d74 + +PKG_LICENSE:=GPL-2.0 +PKG_MAINTAINER:=Felix Fietkau + +PKG_BUILD_DEPENDS:=HAS_BPF_TOOLCHAIN:bpf-headers + +PKG_BUILD_PARALLEL:=1 + +PKG_CONFIG_DEPENDS += CONFIG_UNETD_VXLAN_SUPPORT + +include $(INCLUDE_DIR)/package.mk +include $(INCLUDE_DIR)/cmake.mk +include $(INCLUDE_DIR)/bpf.mk +include $(INCLUDE_DIR)/nls.mk + +define Package/unetd + SECTION:=net + CATEGORY:=Network + TITLE:=WireGuard based VPN connection manager for OpenWrt + DEPENDS:=+libubox +libubus +libblobmsg-json +libnl-tiny +kmod-wireguard +UNETD_VXLAN_SUPPORT:libbpf +endef + +define Package/unetd/config + config UNETD_VXLAN_SUPPORT + bool "VXLAN support" + depends on PACKAGE_unetd + depends on HAS_BPF_TOOLCHAIN + default y + +endef + +define Package/unet-dht + SECTION:=net + CATEGORY:=Network + DEPENDS:=unetd + TITLE:=unetd DHT discovery support +endef + +define Package/unet-cli + SECTION:=net + CATEGORY:=Network + DEPENDS:=+unetd +ucode +ucode-mod-fs + TITLE:=unetd administration command line utility +endef + +TARGET_CFLAGS += \ + -I$(STAGING_DIR)/usr/include/libnl-tiny \ + -I$(STAGING_DIR)/usr/include + +CMAKE_OPTIONS += \ + -DLIBNL_LIBS=-lnl-tiny \ + -DVXLAN_SUPPORT=$(if $(CONFIG_UNETD_VXLAN_SUPPORT),ON,OFF) + +ifdef CONFIG_UNETD_VXLAN_SUPPORT + define Build/Compile + $(call CompileBPF,$(PKG_BUILD_DIR)/mss-bpf.c) + $(call Build/Compile/Default,) + endef +endif + +define Package/unetd/conffiles +/etc/unetd +endef + +define Package/unetd/install + $(INSTALL_DIR) \ + $(1)/etc/unetd \ + $(1)/lib/bpf \ + $(1)/etc/init.d \ + $(1)/lib/netifd/proto \ + $(1)/usr/sbin \ + $(1)/usr/lib + $(INSTALL_DATA) $(PKG_INSTALL_DIR)/usr/lib/libunet.so* $(1)/usr/lib/ + $(INSTALL_BIN) \ + $(PKG_INSTALL_DIR)/usr/sbin/unetd \ + $(PKG_INSTALL_DIR)/usr/sbin/unet-tool \ + $(1)/usr/sbin/ + $(if $(CONFIG_UNETD_VXLAN_SUPPORT),$(INSTALL_DATA) $(PKG_BUILD_DIR)/mss-bpf.o $(1)/lib/bpf/mss.o) + $(INSTALL_BIN) ./files/unetd.init $(1)/etc/init.d/unetd + $(INSTALL_BIN) ./files/unetd.sh $(1)/lib/netifd/proto +endef + +define Package/unet-dht/install + $(INSTALL_DIR) \ + $(1)/etc/init.d \ + $(1)/usr/sbin + $(INSTALL_BIN) $(PKG_BUILD_DIR)/unet-dht $(1)/usr/sbin + $(INSTALL_BIN) ./files/unet-dht.init $(1)/etc/init.d/unet-dht +endef + +define Package/unet-cli/install + $(INSTALL_DIR) $(1)/usr/sbin + $(INSTALL_BIN) $(PKG_BUILD_DIR)/scripts/unet-cli $(1)/usr/sbin +endef + +$(eval $(call BuildPackage,unetd)) +$(eval $(call BuildPackage,unet-dht)) +$(eval $(call BuildPackage,unet-cli)) diff --git a/package/network/services/unetd/files/unet-dht.init b/package/network/services/unetd/files/unet-dht.init new file mode 100644 index 000000000..272626a93 --- /dev/null +++ b/package/network/services/unetd/files/unet-dht.init @@ -0,0 +1,24 @@ +#!/bin/sh /etc/rc.common +# Copyright (c) 2022 OpenWrt.org + +START=19 + +USE_PROCD=1 +PROG=/usr/sbin/unet-dht + +unet_dht_id() { + cat \ + /sys/class/net/eth?/address \ + /sys/class/ieee80211/phy*/macaddress \ + /etc/board.json | md5sum | awk '{ print $1 }' +} + +start_service() { + mkdir -p /var/run/unetd /etc/unetd + + procd_open_instance + procd_set_param command "$PROG" -u /var/run/unetd/socket -n /var/run/unetd/nodes.dat $(unet_dht_id) + procd_set_param respawn + procd_set_param limits core="unlimited" + procd_close_instance +} diff --git a/package/network/services/unetd/files/unetd.init b/package/network/services/unetd/files/unetd.init new file mode 100644 index 000000000..c1124821e --- /dev/null +++ b/package/network/services/unetd/files/unetd.init @@ -0,0 +1,17 @@ +#!/bin/sh /etc/rc.common +# Copyright (c) 2022 OpenWrt.org + +START=19 + +USE_PROCD=1 +PROG=/usr/sbin/unetd + +start_service() { + mkdir -p /var/run/unetd /etc/unetd + + procd_open_instance + procd_set_param command "$PROG" -h /var/run/unetd/hosts -u /var/run/unetd/socket + procd_set_param respawn + procd_set_param limits core="unlimited" + procd_close_instance +} diff --git a/package/network/services/unetd/files/unetd.sh b/package/network/services/unetd/files/unetd.sh new file mode 100644 index 000000000..2f0f0c478 --- /dev/null +++ b/package/network/services/unetd/files/unetd.sh @@ -0,0 +1,99 @@ +#!/bin/sh + +[ -x /usr/sbin/unetd ] || exit 0 + +. /lib/functions.sh +. /lib/functions/network.sh +. ../netifd-proto.sh + +init_proto "$@" + +proto_unet_init_config() { + proto_config_add_string device + proto_config_add_string type + proto_config_add_string auth_key + proto_config_add_string key + proto_config_add_string file + proto_config_add_int keepalive + proto_config_add_string domain + proto_config_add_boolean dht + proto_config_add_array "tunnels:list(string)" + proto_config_add_array "connect:list(string)" + proto_config_add_array "peer_data:list(string)" + no_device=1 + available=1 + no_proto_task=1 +} + +proto_unet_setup() { + local config="$1" + + local device type key file keepalive domain tunnels + json_get_vars device type auth_key key file keepalive domain dht + json_get_values tunnels tunnels + json_get_values connect connect + json_get_values peer_data peer_data + device="${device:-$config}" + + [ -n "$auth_key" ] && type="${type:-dynamic}" + [ -n "$file" ] && type="${type:-file}" + + json_init + json_add_string name "$device" + json_add_string type "$type" + json_add_string interface "$config" + json_add_string auth_key "$auth_key" + json_add_string key "$key" + json_add_string file "$file" + [ -n "$keepalive" ] && json_add_int keepalive "$keepalive" + [ -n "$dht" ] && json_add_boolean dht "$dht" + json_add_string domain "$domain" + + json_add_object tunnels + for t in $tunnels; do + local ifname="${t%%=*}" + local service="${t#*=}" + [ -n "$ifname" -a -n "$service" -a "$ifname" != "$t" ] || continue + json_add_string "$ifname" "$service" + done + json_close_object + + json_add_array auth_connect + for c in $connect; do + json_add_string "" "$c" + done + json_close_array + + json_add_array peer_data + for c in $peer_data; do + json_add_string "" "$c" + done + json_close_array + + ip link del dev "$device" >/dev/null 2>&1 + ip link add dev "$device" type wireguard || { + echo "Could not create wireguard device $device" + proto_setup_failed "$config" + exit 1 + } + + ubus call unetd network_add "$(json_dump)" +} + +proto_unet_teardown() { + local config="$1" + local iface="$2" + + local device + json_get_vars device + device="${device:-$iface}" + + json_init + json_add_string name "$device" + + ip link del dev "$device" + + ubus call unetd network_del "$(json_dump)" +} + +add_protocol unet diff --git a/package/network/utils/iwinfo/Makefile b/package/network/utils/iwinfo/Makefile index da38d6b78..7dde2522f 100644 --- a/package/network/utils/iwinfo/Makefile +++ b/package/network/utils/iwinfo/Makefile @@ -11,9 +11,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/iwinfo.git -PKG_SOURCE_DATE:=2023-02-06 -PKG_SOURCE_VERSION:=c7eb8ebe33de2ff2d08064258edb047e5ac09f29 -PKG_MIRROR_HASH:=f1124cf305710b0f04e2ea6dd42ba96ba4a3367da4d4afb4c19d5af9905b1cc2 +PKG_SOURCE_DATE:=2024-03-08 +PKG_SOURCE_VERSION:=8ffb8bfd1115ae95265aa52590aa948aba7672e4 +PKG_MIRROR_HASH:=77bb6018b5001268c0f442dbfd8159893db620c575c9810221b1a42a30be4b5f PKG_MAINTAINER:=Jo-Philipp Wich PKG_LICENSE:=GPL-2.0 @@ -23,7 +23,7 @@ PKG_CONFIG_DEPENDS := \ CONFIG_PACKAGE_kmod-mt7615d_dbdc \ CONFIG_PACKAGE_kmod-cfg80211 -IWINFO_ABI_VERSION:=20230121 +IWINFO_ABI_VERSION:=20230701 include $(INCLUDE_DIR)/package.mk diff --git a/package/network/utils/iwinfo/patches/001-ralink.patch b/package/network/utils/iwinfo/patches/001-ralink.patch index 2d4e2c7a3..379e6eba8 100644 --- a/package/network/utils/iwinfo/patches/001-ralink.patch +++ b/package/network/utils/iwinfo/patches/001-ralink.patch @@ -1494,42 +1494,3 @@ compile: clean $(IWINFO_LIB) $(IWINFO_LUA) $(IWINFO_CLI) ---- a/devices.txt -+++ b/devices.txt -@@ -174,6 +174,36 @@ - 0x1814 0x3662 0x1814 0x000d 0 0 "Ralink" "Rt3662" - 0x1814 0x3883 0x1814 0x000d 0 0 "Ralink" "Rt3883" - 0x1814 0x5350 0x1814 0x000f 0 0 "Ralink" "Rt5350" -+/* MT7620 */ -+0x1814 0x7620 0x1814 0x0000 0 0 "Mediatek" "MT7620" -+0x1814 0x7620 0x1814 0xffff 0 0 "Mediatek" "MT7620" -+0x1814 0x7620 0x1814 0x7620 0 0 "Mediatek" "MT7620" -+/* MT7610 */ -+0x1814 0x7610 0x1814 0x0000 0 0 "Mediatek" "MT7610" -+0x1814 0x7610 0x1814 0xffff 0 0 "Mediatek" "MT7610" -+0x1814 0x7610 0x1814 0x7610 0 0 "Mediatek" "MT7610" -+/* MT7602/MT7612/MT7662 */ -+0x1814 0x7662 0x1814 0x0000 0 0 "Mediatek" "MT7612" -+0x1814 0x7662 0x1814 0xffff 0 0 "Mediatek" "MT7612" -+0x1814 0x7662 0x1814 0x7602 0 0 "Mediatek" "MT7602" -+0x1814 0x7662 0x1814 0x7612 0 0 "Mediatek" "MT7612" -+0x1814 0x7662 0x1814 0x7662 0 0 "Mediatek" "MT7662" -+/* MT7603 */ -+0x1814 0x7603 0x1814 0x0000 0 0 "Mediatek" "MT7603" -+0x1814 0x7603 0x1814 0xffff 0 0 "Mediatek" "MT7603" -+0x1814 0x7603 0x1814 0x7603 0 0 "Mediatek" "MT7603" -+/* MT7628/MT7688 */ -+0x1814 0x7628 0x1814 0x0000 0 0 "Mediatek" "MT7628" -+0x1814 0x7628 0x1814 0xffff 0 0 "Mediatek" "MT7628" -+0x1814 0x7628 0x1814 0x7628 0 0 "Mediatek" "MT7628" -+0x1814 0x7628 0x1814 0x7688 0 0 "Mediatek" "MT7688" -+/* MT7615 */ -+0x1814 0x7615 0x1814 0x0000 0 0 "Mediatek" "MT7615" -+0x1814 0x7615 0x1814 0xffff 0 0 "Mediatek" "MT7615" -+0x1814 0x7615 0x1814 0x7615 0 0 "Mediatek" "MT7615" -+ -+0x14c3 0x7615 0x14c3 0x0000 0 0 "MediaTek" "MT7615E" -+ - 0x11ab 0x2a55 0x11ab 0x0000 0 0 "Marvell" "88W8864" - 0x02df 0x9135 0x0000 0x0000 0 0 "Marvell" "88W8887" - 0x11ab 0x2b40 0x11ab 0x0000 0 0 "Marvell" "88W8964" diff --git a/package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh b/package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh index 27a2e62c8..c0134f44d 100755 --- a/package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh +++ b/package/network/utils/uqmi/files/lib/netifd/proto/qmi.sh @@ -187,7 +187,7 @@ proto_qmi_setup() { # Cleanup current state if any uqmi -s -d "$device" --stop-network 0xffffffff --autoconnect > /dev/null 2>&1 - uqmi -s -d "$device" --set-ip-family ipv6 --stop-network 0xffffffff --autoconnect > /dev/null 2>&1 + # Go online uqmi -s -d "$device" --set-device-operating-mode online > /dev/null 2>&1 diff --git a/package/qca/nss-firmware/Makefile b/package/qca/nss-firmware/Makefile new file mode 100644 index 000000000..fda27749c --- /dev/null +++ b/package/qca/nss-firmware/Makefile @@ -0,0 +1,88 @@ +# +# Copyright (C) 2021 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk + +PKG_NAME:=nss-firmware +PKG_SOURCE_DATE:=2022-07-14 +PKG_SOURCE_VERSION:=ade6bff594377c9d9c79b45e39bf104303d919bc +PKG_MIRROR_HASH:=99ca44dd0733cff569308550c6c74febb0e7a03093b14df092d0f53362189647 +PKG_RELEASE:=1 + +PKG_SOURCE_PROTO:=git +PKG_SOURCE_URL:=https://github.com/quic/qca-sdk-nss-fw.git + +PKG_LICENSE_FILES:=LICENSE.md + +PKG_MAINTAINER:=Robert Marko + +include $(INCLUDE_DIR)/package.mk + +VERSION_PATH=$(PKG_BUILD_DIR)/QCA_Networking_2022.SPF_12.0.0/ED1 + +define Package/nss-firmware-default + SECTION:=firmware + CATEGORY:=Firmware + URL:=$(PKG_SOURCE_URL) + DEPENDS:=@TARGET_qualcommax +endef + +define Package/nss-firmware-ipq5018 +$(Package/nss-firmware-default) + TITLE:=NSS firmware for IPQ5018 devices + NSS_ARCHIVE:=$(VERSION_PATH)/IPQ5018.ATH.12.0.0/BIN-NSS.FW.12.1-022-MP.R.tar.bz2 +endef + +define Package/nss-firmware-ipq6018 +$(Package/nss-firmware-default) + TITLE:=NSS firmware for IPQ6018 devices + NSS_ARCHIVE:=$(VERSION_PATH)/IPQ6018.ATH.12.0.0/BIN-NSS.FW.12.1-022-CP.R.tar.bz2 +endef + +define Package/nss-firmware-ipq8074 +$(Package/nss-firmware-default) + TITLE:=NSS firmware for IPQ8074 devices + NSS_ARCHIVE:=$(VERSION_PATH)/IPQ8074.ATH.12.0.0/BIN-NSS.FW.12.1-022-HK.R.tar.bz2 +endef + +define Build/Compile + true +endef + +define Package/nss-firmware-ipq5018/install + mkdir -p $(PKG_BUILD_DIR)/IPQ5018 + $(TAR) -C $(PKG_BUILD_DIR)/IPQ5018 -xf $(NSS_ARCHIVE) --strip-components=1 + $(INSTALL_DIR) $(1)/lib/firmware/ + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/IPQ5018/retail_router0.bin \ + $(1)/lib/firmware/qca-nss0.bin +endef + +define Package/nss-firmware-ipq6018/install + mkdir -p $(PKG_BUILD_DIR)/IPQ6018 + $(TAR) -C $(PKG_BUILD_DIR)/IPQ6018 -xf $(NSS_ARCHIVE) --strip-components=1 + $(INSTALL_DIR) $(1)/lib/firmware/ + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/IPQ6018/retail_router0.bin \ + $(1)/lib/firmware/qca-nss0.bin +endef + +define Package/nss-firmware-ipq8074/install + mkdir -p $(PKG_BUILD_DIR)/IPQ8074 + $(TAR) -C $(PKG_BUILD_DIR)/IPQ8074 -xf $(NSS_ARCHIVE) --strip-components=1 + $(INSTALL_DIR) $(1)/lib/firmware/ + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/IPQ8074/retail_router0.bin \ + $(1)/lib/firmware/qca-nss0.bin + $(INSTALL_DATA) \ + $(PKG_BUILD_DIR)/IPQ8074/retail_router1.bin \ + $(1)/lib/firmware/qca-nss1.bin +endef + +$(eval $(call BuildPackage,nss-firmware-ipq5018)) +$(eval $(call BuildPackage,nss-firmware-ipq6018)) +$(eval $(call BuildPackage,nss-firmware-ipq8074)) diff --git a/package/qca/qca-mcs/Makefile b/package/qca/qca-mcs/Makefile new file mode 100644 index 000000000..b3cbe7675 --- /dev/null +++ b/package/qca/qca-mcs/Makefile @@ -0,0 +1,68 @@ +include $(TOPDIR)/rules.mk + +PKG_NAME:=qca-mcs +PKG_RELEASE:=1 + +PKG_SOURCE_PROTO:=git +PKG_SOURCE_DATE:=2023-04-21 +PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/qca-mcs.git +PKG_SOURCE_VERSION:=8797823e392ac3d9098c090964afd46805a0eb2b +PKG_MIRROR_HASH:=f0fa76af4545842ebf8b4f0743e1079e190dfa5f3f0d464c063063521d3d30df + +PKG_BUILD_PARALLEL:=1 + +include $(INCLUDE_DIR)/kernel.mk +include $(INCLUDE_DIR)/package.mk + +define KernelPackage/qca-mcs + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Support + URL:=http://www.qca.qualcomm.com + MAINTAINER:=Qualcomm Atheros, Inc. + TITLE:=QCA Multicast Snooping Support + DEPENDS:=@TARGET_qualcommax \ + +@KERNEL_IPV6_MROUTE +@KERNEL_IP_MROUTE + KCONFIG:=CONFIG_NETFILTER=y \ + CONFIG_BRIDGE_NETFILTER=y + FILES:=$(PKG_BUILD_DIR)/qca-mcs.ko + AUTOLOAD:=$(call AutoLoad,41,qca-mcs) +endef + +define KernelPackage/qca-mcs/Description + This package installs the IGMP/MLD Snooping Module +endef + +QCA_MC_SNOOPING_HEADERS= \ + $(PKG_BUILD_DIR)/mc_api.h \ + $(PKG_BUILD_DIR)/mc_ecm.h \ + +define Build/InstallDev + $(INSTALL_DIR) $(1)/usr/include/qca-mcs + $(foreach header_file,$(QCA_MC_SNOOPING_HEADERS), $(CP) $(header_file) $(1)/usr/include/qca-mcs;) + $(foreach header_file,$(QCA_MC_SNOOPING_HEADERS), $(CP) $(header_file) $(1)/usr/include/;) +endef + +EXTRA_CFLAGS+=-Wno-implicit-fallthrough + +QCA_MC_SNOOPING_MAKE_OPTS:= \ + $(KERNEL_MAKE_FLAGS) \ + CONFIG_SUPPORT_MLD=y \ + MDIR=$(PKG_BUILD_DIR) \ + KBUILDPATH=$(LINUX_DIR) \ + KERNELPATH=$(LINUX_SRC_DIR) \ + KERNELRELEASE=$(LINUX_RELEASE) + +define Build/Compile + +$(MAKE) -C $(LINUX_DIR) \ + $(KERNEL_MAKE_FLAGS) \ + $(PKG_JOBS) \ + KBUILDPATH=$(LINUX_DIR) \ + $(PKG_MAKE_FLAGS) \ + M=$(PKG_BUILD_DIR) \ + EXTRA_CFLAGS="$(EXTRA_CFLAGS)" \ + $(strip $(QCA_MC_SNOOPING_MAKE_OPTS)) \ + modules +endef + +$(eval $(call KernelPackage,qca-mcs)) diff --git a/package/qca/qca-mcs/patches/0001-kernel-5.10-compat.patch b/package/qca/qca-mcs/patches/0001-kernel-5.10-compat.patch new file mode 100644 index 000000000..958a7a337 --- /dev/null +++ b/package/qca/qca-mcs/patches/0001-kernel-5.10-compat.patch @@ -0,0 +1,40 @@ +--- a/mc_osdep.h ++++ b/mc_osdep.h +@@ -189,7 +189,7 @@ static inline struct net_bridge_port *mc + + dst = os_br_fdb_get((struct net_bridge *)br, eth_hdr(*skb)->h_dest); + +- if (dst && !dst->is_local) ++ if (dst && !test_bit(BR_FDB_LOCAL, &dst->flags)) + return dst->dst; + + return NULL; +--- a/mc_snooping.c ++++ b/mc_snooping.c +@@ -3453,6 +3453,18 @@ static int mc_proc_snooper_open(struct i + return single_open(file, mc_proc_snooper_show, NULL); + } + ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) ++#define HAVE_PROC_OPS ++#endif ++ ++#ifdef HAVE_PROC_OPS ++static const struct proc_ops mc_proc_snooper_fops = { ++ .proc_open = mc_proc_snooper_open, ++ .proc_read = seq_read, ++ .proc_lseek = seq_lseek, ++ .proc_release = single_release, ++}; ++#else + static const struct file_operations mc_proc_snooper_fops = { + .owner = THIS_MODULE, + .open = mc_proc_snooper_open, +@@ -3460,6 +3472,7 @@ static const struct file_operations mc_p + .llseek = seq_lseek, + .release = single_release, + }; ++#endif + + /* mc_proc_create_snooper_entry + * create proc entry for information show diff --git a/package/qca/qca-nss-cfi/Makefile b/package/qca/qca-nss-cfi/Makefile new file mode 100644 index 000000000..c9964abd3 --- /dev/null +++ b/package/qca/qca-nss-cfi/Makefile @@ -0,0 +1,82 @@ +include $(TOPDIR)/rules.mk + +PKG_NAME:=qca-nss-cfi +PKG_RELEASE:=1 + +PKG_SOURCE_PROTO:=git +PKG_SOURCE_DATE:=2022-12-15 +PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/nss-cfi.git +PKG_SOURCE_VERSION:=5cd07ce299ee3ce62dbe4f6783ad36361e57583b +PKG_MIRROR_HASH:=e449eee24fccc09b1cf0f1367bb54cedadcc46a30423934744e78272443197e7 + +PKG_BUILD_PARALLEL:=1 + +include $(INCLUDE_DIR)/kernel.mk +include $(INCLUDE_DIR)/package.mk + +ifneq (, $(findstring $(CONFIG_TARGET_SUBTARGET), "ipq807x" "ipq60xx")) + CFI_OCF_DIR:=ocf/v2.0 + CFI_CRYPTOAPI_DIR:=cryptoapi/v2.0 +else + CFI_CRYPTOAPI_DIR:=cryptoapi/v1.1 + CFI_OCF_DIR:=ocf/v1.0 + CFI_IPSEC_DIR:=ipsec/v1.0 +endif + +define KernelPackage/qca-nss-cfi-cryptoapi + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Cryptographic API modules + DEPENDS:=@TARGET_qualcommax +kmod-qca-nss-crypto +kmod-crypto-authenc + TITLE:=Kernel driver for NSS cfi + FILES:=$(PKG_BUILD_DIR)/$(CFI_CRYPTOAPI_DIR)/qca-nss-cfi-cryptoapi.ko + AUTOLOAD:=$(call AutoLoad,59,qca-nss-cfi-cryptoapi) +endef + +define Build/InstallDev + $(INSTALL_DIR) $(1)/usr/include/qca-nss-cfi + $(CP) $(PKG_BUILD_DIR)/$(CFI_CRYPTOAPI_DIR)/../exports/* $(1)/usr/include/qca-nss-cfi + $(CP) $(PKG_BUILD_DIR)/include/* $(1)/usr/include/qca-nss-cfi +endef + +define KernelPackage/qca-nss-cfi/Description +This package contains a NSS cfi driver for QCA chipset +endef + +EXTRA_CFLAGS+= \ + -DCONFIG_NSS_DEBUG_LEVEL=4 \ + -I$(LINUX_DIR)/crypto/ocf \ + -I$(STAGING_DIR)/usr/include/qca-nss-crypto \ + -I$(STAGING_DIR)/usr/include/crypto \ + -I$(STAGING_DIR)/usr/include/qca-nss-drv + +ifneq (, $(findstring $(CONFIG_TARGET_SUBTARGET), "ipq807x")) +EXTRA_CFLAGS+= -I$(STAGING_DIR)/usr/include/qca-nss-clients +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-cfi-cryptoapi),) +MAKE_OPTS+= \ + cryptoapi=y \ + NSS_CRYPTOAPI_ABLK=n \ + NSS_CRYPTOAPI_SKCIPHER=y +endif + +ifeq ($(CONFIG_TARGET_BOARD), "qualcommax") + SOC:=$(CONFIG_TARGET_SUBTARGET) +endif + +define Build/Compile + +$(MAKE) -C "$(LINUX_DIR)" $(strip $(MAKE_OPTS)) \ + $(KERNEL_MAKE_FLAGS) \ + M="$(PKG_BUILD_DIR)" \ + EXTRA_CFLAGS="$(EXTRA_CFLAGS)" \ + CC="$(TARGET_CC)" \ + CFI_CRYPTOAPI_DIR=$(CFI_CRYPTOAPI_DIR) \ + CFI_OCF_DIR=$(CFI_OCF_DIR) \ + CFI_IPSEC_DIR=$(CFI_IPSEC_DIR) \ + SoC=$(SOC) \ + $(PKG_JOBS) \ + modules +endef + +$(eval $(call KernelPackage,qca-nss-cfi-cryptoapi)) diff --git a/package/qca/qca-nss-cfi/patches/0001-cryptoapi-v2.0-fix-SHA1-header-include.patch b/package/qca/qca-nss-cfi/patches/0001-cryptoapi-v2.0-fix-SHA1-header-include.patch new file mode 100644 index 000000000..12df90fdc --- /dev/null +++ b/package/qca/qca-nss-cfi/patches/0001-cryptoapi-v2.0-fix-SHA1-header-include.patch @@ -0,0 +1,62 @@ +From 1569ac3b6bbcae9c3f4898e0d34aec8f88297ee6 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Sun, 22 Jan 2023 21:45:23 +0100 +Subject: [PATCH 1/5] cryptoapi: v2.0: fix SHA1 header include + +SHA1 header has been merged to the generic SHA one, +and with that the cryptohash.h was dropped. + +So, fix include in kernels 5.8 and newer. + +Signed-off-by: Robert Marko +--- + cryptoapi/v2.0/nss_cryptoapi.c | 5 +++++ + cryptoapi/v2.0/nss_cryptoapi_aead.c | 5 +++++ + cryptoapi/v2.0/nss_cryptoapi_ahash.c | 5 +++++ + 3 files changed, 15 insertions(+) + +--- a/cryptoapi/v2.0/nss_cryptoapi.c ++++ b/cryptoapi/v2.0/nss_cryptoapi.c +@@ -39,7 +39,12 @@ + + #include + #include ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0) + #include ++#else ++#include ++#include ++#endif + #include + #include + #include +--- a/cryptoapi/v2.0/nss_cryptoapi_aead.c ++++ b/cryptoapi/v2.0/nss_cryptoapi_aead.c +@@ -39,7 +39,12 @@ + + #include + #include ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0) + #include ++#else ++#include ++#include ++#endif + #include + #include + #include +--- a/cryptoapi/v2.0/nss_cryptoapi_ahash.c ++++ b/cryptoapi/v2.0/nss_cryptoapi_ahash.c +@@ -38,7 +38,12 @@ + + #include + #include ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0) + #include ++#else ++#include ++#include ++#endif + #include + #include + #include diff --git a/package/qca/qca-nss-cfi/patches/0002-cryptoapi-v2.0-make-ablkcipher-optional.patch b/package/qca/qca-nss-cfi/patches/0002-cryptoapi-v2.0-make-ablkcipher-optional.patch new file mode 100644 index 000000000..e9702eb33 --- /dev/null +++ b/package/qca/qca-nss-cfi/patches/0002-cryptoapi-v2.0-make-ablkcipher-optional.patch @@ -0,0 +1,116 @@ +From 26cca5006bddb0da57398452616e07ee7b11edb1 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Sun, 22 Jan 2023 22:01:34 +0100 +Subject: [PATCH 2/5] cryptoapi: v2.0: make ablkcipher optional + +albkcipher has been removed from the kernel in v5.5, so until it has been +converted to skcipher, lets make it optional to at least have hashes +working. + +Signed-off-by: Robert Marko +--- + cryptoapi/v2.0/Makefile | 3 +++ + cryptoapi/v2.0/nss_cryptoapi.c | 10 ++++++++++ + cryptoapi/v2.0/nss_cryptoapi_private.h | 2 ++ + 3 files changed, 15 insertions(+) + +--- a/cryptoapi/v2.0/Makefile ++++ b/cryptoapi/v2.0/Makefile +@@ -5,7 +5,10 @@ NSS_CRYPTOAPI_MOD_NAME=qca-nss-cfi-crypt + obj-m += $(NSS_CRYPTOAPI_MOD_NAME).o + $(NSS_CRYPTOAPI_MOD_NAME)-objs = nss_cryptoapi.o + $(NSS_CRYPTOAPI_MOD_NAME)-objs += nss_cryptoapi_aead.o ++ifneq "$(NSS_CRYPTOAPI_ABLK)" "n" + $(NSS_CRYPTOAPI_MOD_NAME)-objs += nss_cryptoapi_ablk.o ++ccflags-y += -DNSS_CRYPTOAPI_ABLK ++endif + $(NSS_CRYPTOAPI_MOD_NAME)-objs += nss_cryptoapi_ahash.o + + obj ?= . +--- a/cryptoapi/v2.0/nss_cryptoapi.c ++++ b/cryptoapi/v2.0/nss_cryptoapi.c +@@ -1367,6 +1367,7 @@ struct aead_alg cryptoapi_aead_algs[] = + /* + * ABLK cipher algorithms + */ ++#if defined(NSS_CRYPTOAPI_ABLK) + static struct crypto_alg cryptoapi_ablkcipher_algs[] = { + { + .cra_name = "cbc(aes)", +@@ -1466,6 +1467,7 @@ static struct crypto_alg cryptoapi_ablkc + }, + } + }; ++#endif + + /* + * AHASH algorithms +@@ -2189,7 +2191,9 @@ void nss_cryptoapi_add_ctx2debugfs(struc + */ + void nss_cryptoapi_attach_user(void *app_data, struct nss_crypto_user *user) + { ++#if defined(NSS_CRYPTOAPI_ABLK) + struct crypto_alg *ablk = cryptoapi_ablkcipher_algs; ++#endif + struct aead_alg *aead = cryptoapi_aead_algs; + struct ahash_alg *ahash = cryptoapi_ahash_algs; + struct nss_cryptoapi *sc = app_data; +@@ -2212,6 +2216,7 @@ void nss_cryptoapi_attach_user(void *app + g_cryptoapi.user = user; + } + ++#if defined(NSS_CRYPTOAPI_ABLK) + for (i = 0; enable_ablk && (i < ARRAY_SIZE(cryptoapi_ablkcipher_algs)); i++, ablk++) { + info = nss_cryptoapi_cra_name_lookup(ablk->cra_name); + if(!info || !nss_crypto_algo_is_supp(info->algo)) +@@ -2222,6 +2227,7 @@ void nss_cryptoapi_attach_user(void *app + ablk->cra_flags = 0; + } + } ++#endif + + for (i = 0; enable_aead && (i < ARRAY_SIZE(cryptoapi_aead_algs)); i++, aead++) { + info = nss_cryptoapi_cra_name_lookup(aead->base.cra_name); +@@ -2257,7 +2263,9 @@ void nss_cryptoapi_attach_user(void *app + */ + void nss_cryptoapi_detach_user(void *app_data, struct nss_crypto_user *user) + { ++#if defined(NSS_CRYPTOAPI_ABLK) + struct crypto_alg *ablk = cryptoapi_ablkcipher_algs; ++#endif + struct aead_alg *aead = cryptoapi_aead_algs; + struct ahash_alg *ahash = cryptoapi_ahash_algs; + struct nss_cryptoapi *sc = app_data; +@@ -2270,6 +2278,7 @@ void nss_cryptoapi_detach_user(void *app + */ + atomic_set(&g_cryptoapi.registered, 0); + ++#if defined(NSS_CRYPTOAPI_ABLK) + for (i = 0; enable_ablk && (i < ARRAY_SIZE(cryptoapi_ablkcipher_algs)); i++, ablk++) { + if (!ablk->cra_flags) + continue; +@@ -2277,6 +2286,7 @@ void nss_cryptoapi_detach_user(void *app + crypto_unregister_alg(ablk); + nss_cfi_info("%px: ABLK unregister succeeded, algo: %s\n", sc, ablk->cra_name); + } ++#endif + + for (i = 0; enable_aead && (i < ARRAY_SIZE(cryptoapi_aead_algs)); i++, aead++) { + if (!aead->base.cra_flags) +--- a/cryptoapi/v2.0/nss_cryptoapi_private.h ++++ b/cryptoapi/v2.0/nss_cryptoapi_private.h +@@ -250,12 +250,14 @@ extern void nss_cryptoapi_aead_tx_proc(s + /* + * ABLKCIPHER + */ ++#if defined(NSS_CRYPTOAPI_ABLK) + extern int nss_cryptoapi_ablkcipher_init(struct crypto_tfm *tfm); + extern void nss_cryptoapi_ablkcipher_exit(struct crypto_tfm *tfm); + extern int nss_cryptoapi_ablk_setkey(struct crypto_ablkcipher *cipher, const u8 *key, unsigned int len); + extern int nss_cryptoapi_ablk_encrypt(struct ablkcipher_request *req); + extern int nss_cryptoapi_ablk_decrypt(struct ablkcipher_request *req); + extern void nss_cryptoapi_copy_iv(struct nss_cryptoapi_ctx *ctx, struct scatterlist *sg, uint8_t *iv, uint8_t iv_len); ++#endif + + /* + * AHASH diff --git a/package/qca/qca-nss-cfi/patches/0003-cryptoapi-v2.0-remove-setting-crypto_ahash_type-for-.patch b/package/qca/qca-nss-cfi/patches/0003-cryptoapi-v2.0-remove-setting-crypto_ahash_type-for-.patch new file mode 100644 index 000000000..ad11b8b35 --- /dev/null +++ b/package/qca/qca-nss-cfi/patches/0003-cryptoapi-v2.0-remove-setting-crypto_ahash_type-for-.patch @@ -0,0 +1,137 @@ +From 797b5166783cda0886038ffb22f5386b9363a961 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Sun, 22 Jan 2023 22:08:27 +0100 +Subject: [PATCH 3/5] cryptoapi: v2.0: remove setting crypto_ahash_type for + newer kernels + +Upstream has stopped exporting crypto_ahash_type and removed setting it +on ahash algos since v4.19 as its easily identifiable by the struct type +and its being set in the core directly, so lets do the same. + +Signed-off-by: Robert Marko +--- + cryptoapi/v2.0/nss_cryptoapi.c | 24 ++++++++++++++++++++++++ + 1 file changed, 24 insertions(+) + +--- a/cryptoapi/v2.0/nss_cryptoapi.c ++++ b/cryptoapi/v2.0/nss_cryptoapi.c +@@ -1495,7 +1495,9 @@ static struct ahash_alg cryptoapi_ahash_ + .cra_blocksize = MD5_HMAC_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), + .cra_alignmask = 0, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0) + .cra_type = &crypto_ahash_type, ++#endif + .cra_module = THIS_MODULE, + .cra_init = nss_cryptoapi_ahash_cra_init, + .cra_exit = nss_cryptoapi_ahash_cra_exit, +@@ -1521,7 +1523,9 @@ static struct ahash_alg cryptoapi_ahash_ + .cra_blocksize = SHA1_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), + .cra_alignmask = 0, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0) + .cra_type = &crypto_ahash_type, ++#endif + .cra_module = THIS_MODULE, + .cra_init = nss_cryptoapi_ahash_cra_init, + .cra_exit = nss_cryptoapi_ahash_cra_exit, +@@ -1547,7 +1551,9 @@ static struct ahash_alg cryptoapi_ahash_ + .cra_blocksize = SHA224_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), + .cra_alignmask = 0, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0) + .cra_type = &crypto_ahash_type, ++#endif + .cra_module = THIS_MODULE, + .cra_init = nss_cryptoapi_ahash_cra_init, + .cra_exit = nss_cryptoapi_ahash_cra_exit, +@@ -1573,7 +1579,9 @@ static struct ahash_alg cryptoapi_ahash_ + .cra_blocksize = SHA256_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), + .cra_alignmask = 0, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0) + .cra_type = &crypto_ahash_type, ++#endif + .cra_module = THIS_MODULE, + .cra_init = nss_cryptoapi_ahash_cra_init, + .cra_exit = nss_cryptoapi_ahash_cra_exit, +@@ -1599,7 +1607,9 @@ static struct ahash_alg cryptoapi_ahash_ + .cra_blocksize = SHA384_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), + .cra_alignmask = 0, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0) + .cra_type = &crypto_ahash_type, ++#endif + .cra_module = THIS_MODULE, + .cra_init = nss_cryptoapi_ahash_cra_init, + .cra_exit = nss_cryptoapi_ahash_cra_exit, +@@ -1625,7 +1635,9 @@ static struct ahash_alg cryptoapi_ahash_ + .cra_blocksize = SHA512_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), + .cra_alignmask = 0, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0) + .cra_type = &crypto_ahash_type, ++#endif + .cra_module = THIS_MODULE, + .cra_init = nss_cryptoapi_ahash_cra_init, + .cra_exit = nss_cryptoapi_ahash_cra_exit, +@@ -1655,7 +1667,9 @@ static struct ahash_alg cryptoapi_ahash_ + .cra_blocksize = MD5_HMAC_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), + .cra_alignmask = 0, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0) + .cra_type = &crypto_ahash_type, ++#endif + .cra_module = THIS_MODULE, + .cra_init = nss_cryptoapi_ahash_cra_init, + .cra_exit = nss_cryptoapi_ahash_cra_exit, +@@ -1681,7 +1695,9 @@ static struct ahash_alg cryptoapi_ahash_ + .cra_blocksize = SHA1_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), + .cra_alignmask = 0, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0) + .cra_type = &crypto_ahash_type, ++#endif + .cra_module = THIS_MODULE, + .cra_init = nss_cryptoapi_ahash_cra_init, + .cra_exit = nss_cryptoapi_ahash_cra_exit, +@@ -1707,7 +1723,9 @@ static struct ahash_alg cryptoapi_ahash_ + .cra_blocksize = SHA224_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), + .cra_alignmask = 0, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0) + .cra_type = &crypto_ahash_type, ++#endif + .cra_module = THIS_MODULE, + .cra_init = nss_cryptoapi_ahash_cra_init, + .cra_exit = nss_cryptoapi_ahash_cra_exit, +@@ -1733,7 +1751,9 @@ static struct ahash_alg cryptoapi_ahash_ + .cra_blocksize = SHA256_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), + .cra_alignmask = 0, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0) + .cra_type = &crypto_ahash_type, ++#endif + .cra_module = THIS_MODULE, + .cra_init = nss_cryptoapi_ahash_cra_init, + .cra_exit = nss_cryptoapi_ahash_cra_exit, +@@ -1759,7 +1779,9 @@ static struct ahash_alg cryptoapi_ahash_ + .cra_blocksize = SHA384_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), + .cra_alignmask = 0, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0) + .cra_type = &crypto_ahash_type, ++#endif + .cra_module = THIS_MODULE, + .cra_init = nss_cryptoapi_ahash_cra_init, + .cra_exit = nss_cryptoapi_ahash_cra_exit, +@@ -1785,7 +1807,9 @@ static struct ahash_alg cryptoapi_ahash_ + .cra_blocksize = SHA512_BLOCK_SIZE, + .cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), + .cra_alignmask = 0, ++#if LINUX_VERSION_CODE < KERNEL_VERSION(4, 19, 0) + .cra_type = &crypto_ahash_type, ++#endif + .cra_module = THIS_MODULE, + .cra_init = nss_cryptoapi_ahash_cra_init, + .cra_exit = nss_cryptoapi_ahash_cra_exit, diff --git a/package/qca/qca-nss-cfi/patches/0004-cryptoapi-v2.0-aead-add-downstream-crypto_tfm_alg_fl.patch b/package/qca/qca-nss-cfi/patches/0004-cryptoapi-v2.0-aead-add-downstream-crypto_tfm_alg_fl.patch new file mode 100644 index 000000000..a872321fb --- /dev/null +++ b/package/qca/qca-nss-cfi/patches/0004-cryptoapi-v2.0-aead-add-downstream-crypto_tfm_alg_fl.patch @@ -0,0 +1,28 @@ +From 8db77add1a794bdee8eef0a351e40bf1cdf6dfa9 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Sun, 22 Jan 2023 22:09:51 +0100 +Subject: [PATCH 4/5] cryptoapi: v2.0: aead: add downstream + crypto_tfm_alg_flags + +crypto_tfm_alg_flags newer made it upstream, but as a temporary stopgap +until a better solution is figured out lets add it. + +Signed-off-by: Robert Marko +--- + cryptoapi/v2.0/nss_cryptoapi_aead.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/cryptoapi/v2.0/nss_cryptoapi_aead.c ++++ b/cryptoapi/v2.0/nss_cryptoapi_aead.c +@@ -61,6 +61,11 @@ + #include + #include "nss_cryptoapi_private.h" + ++static inline u32 crypto_tfm_alg_flags(struct crypto_tfm *tfm) ++{ ++ return tfm->__crt_alg->cra_flags & ~CRYPTO_ALG_TYPE_MASK; ++} ++ + /* + * nss_cryptoapi_aead_ctx2session() + * Cryptoapi function to get the session ID for an AEAD diff --git a/package/qca/qca-nss-cfi/patches/0005-cryptoapi-v2.0-remove-dropped-flags.patch b/package/qca/qca-nss-cfi/patches/0005-cryptoapi-v2.0-remove-dropped-flags.patch new file mode 100644 index 000000000..645633abc --- /dev/null +++ b/package/qca/qca-nss-cfi/patches/0005-cryptoapi-v2.0-remove-dropped-flags.patch @@ -0,0 +1,97 @@ +From 62bbb188e1a72d28916e1eca31f4cb9fbbf51cd1 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Sun, 22 Jan 2023 22:11:06 +0100 +Subject: [PATCH 5/5] cryptoapi: v2.0: remove dropped flags + +Upstream has dropped these flags as there was no use for them, so lets do +the same. + +Signed-off-by: Robert Marko +--- + cryptoapi/v2.0/nss_cryptoapi_aead.c | 6 ------ + cryptoapi/v2.0/nss_cryptoapi_ahash.c | 4 ---- + 2 files changed, 10 deletions(-) + +--- a/cryptoapi/v2.0/nss_cryptoapi_aead.c ++++ b/cryptoapi/v2.0/nss_cryptoapi_aead.c +@@ -207,7 +207,6 @@ int nss_cryptoapi_aead_setkey_noauth(str + ctx->info = nss_cryptoapi_cra_name2info(crypto_tfm_alg_name(tfm), keylen, 0); + if (!ctx->info) { + nss_cfi_err("%px: Unable to find algorithm with keylen\n", ctx); +- crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN); + return -ENOENT; + } + +@@ -239,7 +238,6 @@ int nss_cryptoapi_aead_setkey_noauth(str + status = nss_crypto_session_alloc(ctx->user, &data, &ctx->sid); + if (status < 0) { + nss_cfi_err("%px: Unable to allocate crypto session(%d)\n", ctx, status); +- crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_FLAGS); + return status; + } + +@@ -271,14 +269,12 @@ int nss_cryptoapi_aead_setkey(struct cry + */ + if (crypto_authenc_extractkeys(&keys, key, keylen) != 0) { + nss_cfi_err("%px: Unable to extract keys\n", ctx); +- crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN); + return -EIO; + } + + ctx->info = nss_cryptoapi_cra_name2info(crypto_tfm_alg_name(tfm), keys.enckeylen, crypto_aead_maxauthsize(aead)); + if (!ctx->info) { + nss_cfi_err("%px: Unable to find algorithm with keylen\n", ctx); +- crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN); + return -ENOENT; + } + +@@ -299,7 +295,6 @@ int nss_cryptoapi_aead_setkey(struct cry + */ + if (keys.authkeylen > ctx->info->auth_blocksize) { + nss_cfi_err("%px: Auth keylen(%d) exceeds supported\n", ctx, keys.authkeylen); +- crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_KEY_LEN); + return -EINVAL; + } + +@@ -342,7 +337,6 @@ int nss_cryptoapi_aead_setkey(struct cry + status = nss_crypto_session_alloc(ctx->user, &data, &ctx->sid); + if (status < 0) { + nss_cfi_err("%px: Unable to allocate crypto session(%d)\n", ctx, status); +- crypto_aead_set_flags(aead, CRYPTO_TFM_RES_BAD_FLAGS); + return status; + } + +--- a/cryptoapi/v2.0/nss_cryptoapi_ahash.c ++++ b/cryptoapi/v2.0/nss_cryptoapi_ahash.c +@@ -192,7 +192,6 @@ int nss_cryptoapi_ahash_setkey(struct cr + + ctx->info = nss_cryptoapi_cra_name2info(crypto_tfm_alg_name(tfm), 0, crypto_ahash_digestsize(ahash)); + if (!ctx->info) { +- crypto_ahash_set_flags(ahash, CRYPTO_TFM_RES_BAD_KEY_LEN); + return -EINVAL; + } + +@@ -215,7 +214,6 @@ int nss_cryptoapi_ahash_setkey(struct cr + status = nss_crypto_session_alloc(ctx->user, &data, &ctx->sid); + if (status < 0) { + nss_cfi_warn("%px: Unable to allocate crypto session(%d)\n", ctx, status); +- crypto_ahash_set_flags(ahash, CRYPTO_TFM_RES_BAD_FLAGS); + return status; + } + +@@ -299,7 +297,6 @@ int nss_cryptoapi_ahash_init(struct ahas + */ + ctx->info = nss_cryptoapi_cra_name2info(crypto_tfm_alg_name(tfm), 0, 0); + if (!ctx->info) { +- crypto_ahash_set_flags(ahash, CRYPTO_TFM_RES_BAD_KEY_LEN); + return -EINVAL; + } + +@@ -314,7 +311,6 @@ int nss_cryptoapi_ahash_init(struct ahas + status = nss_crypto_session_alloc(ctx->user, &data, &ctx->sid); + if (status < 0) { + nss_cfi_err("%px: Unable to allocate crypto session(%d)\n", ctx, status); +- crypto_ahash_set_flags(ahash, CRYPTO_TFM_RES_BAD_FLAGS); + return status; + } + diff --git a/package/qca/qca-nss-cfi/patches/0006-cryptoapi-v2.0-convert-to-skcipher.patch b/package/qca/qca-nss-cfi/patches/0006-cryptoapi-v2.0-convert-to-skcipher.patch new file mode 100644 index 000000000..f85e3d892 --- /dev/null +++ b/package/qca/qca-nss-cfi/patches/0006-cryptoapi-v2.0-convert-to-skcipher.patch @@ -0,0 +1,1199 @@ +From 1b30927548c2498c76b815b87f604f9a1de40a48 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Sun, 22 Jan 2023 23:31:09 +0100 +Subject: [PATCH] cryptoapi: v2.0: convert to skcipher + +Finally convert the driver from ablkcipher that was dropped in v5.5 to +skcipher. + +Signed-off-by: Robert Marko +--- + cryptoapi/v2.0/Makefile | 6 +- + cryptoapi/v2.0/nss_cryptoapi.c | 200 ++++++++---------- + cryptoapi/v2.0/nss_cryptoapi_private.h | 14 +- + ...ptoapi_ablk.c => nss_cryptoapi_skcipher.c} | 116 +++++----- + 4 files changed, 145 insertions(+), 191 deletions(-) + rename cryptoapi/v2.0/{nss_cryptoapi_ablk.c => nss_cryptoapi_skcipher.c} (74%) + +--- a/cryptoapi/v2.0/Makefile ++++ b/cryptoapi/v2.0/Makefile +@@ -5,9 +5,9 @@ NSS_CRYPTOAPI_MOD_NAME=qca-nss-cfi-crypt + obj-m += $(NSS_CRYPTOAPI_MOD_NAME).o + $(NSS_CRYPTOAPI_MOD_NAME)-objs = nss_cryptoapi.o + $(NSS_CRYPTOAPI_MOD_NAME)-objs += nss_cryptoapi_aead.o +-ifneq "$(NSS_CRYPTOAPI_ABLK)" "n" +-$(NSS_CRYPTOAPI_MOD_NAME)-objs += nss_cryptoapi_ablk.o +-ccflags-y += -DNSS_CRYPTOAPI_ABLK ++ifneq "$(NSS_CRYPTOAPI_SKCIPHER)" "n" ++$(NSS_CRYPTOAPI_MOD_NAME)-objs += nss_cryptoapi_skcipher.o ++ccflags-y += -DNSS_CRYPTOAPI_SKCIPHER + endif + $(NSS_CRYPTOAPI_MOD_NAME)-objs += nss_cryptoapi_ahash.o + +--- a/cryptoapi/v2.0/nss_cryptoapi.c ++++ b/cryptoapi/v2.0/nss_cryptoapi.c +@@ -1367,104 +1367,78 @@ struct aead_alg cryptoapi_aead_algs[] = + /* + * ABLK cipher algorithms + */ +-#if defined(NSS_CRYPTOAPI_ABLK) +-static struct crypto_alg cryptoapi_ablkcipher_algs[] = { ++#if defined(NSS_CRYPTOAPI_SKCIPHER) ++static struct skcipher_alg cryptoapi_skcipher_algs[] = { + { +- .cra_name = "cbc(aes)", +- .cra_driver_name = "nss-cbc-aes", +- .cra_priority = 10000, +- .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC, +- .cra_blocksize = AES_BLOCK_SIZE, +- .cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), +- .cra_alignmask = 0, +- .cra_type = &crypto_ablkcipher_type, +- .cra_module = THIS_MODULE, +- .cra_init = nss_cryptoapi_ablkcipher_init, +- .cra_exit = nss_cryptoapi_ablkcipher_exit, +- .cra_u = { +- .ablkcipher = { +- .ivsize = AES_BLOCK_SIZE, +- .min_keysize = AES_MIN_KEY_SIZE, +- .max_keysize = AES_MAX_KEY_SIZE, +- .setkey = nss_cryptoapi_ablk_setkey, +- .encrypt = nss_cryptoapi_ablk_encrypt, +- .decrypt = nss_cryptoapi_ablk_decrypt, +- }, +- }, +- }, +- { +- .cra_name = "rfc3686(ctr(aes))", +- .cra_driver_name = "nss-rfc3686-ctr-aes", +- .cra_priority = 30000, +- .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC, +- .cra_blocksize = AES_BLOCK_SIZE, +- .cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), +- .cra_alignmask = 0, +- .cra_type = &crypto_ablkcipher_type, +- .cra_module = THIS_MODULE, +- .cra_init = nss_cryptoapi_ablkcipher_init, +- .cra_exit = nss_cryptoapi_ablkcipher_exit, +- .cra_u = { +- .ablkcipher = { +- .ivsize = CTR_RFC3686_IV_SIZE, +-/* +- * geniv deprecated from kernel version 5.0 and above +- */ +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 0, 0)) +- .geniv = "seqiv", +-#endif +- .min_keysize = AES_MIN_KEY_SIZE + CTR_RFC3686_NONCE_SIZE, +- .max_keysize = AES_MAX_KEY_SIZE + CTR_RFC3686_NONCE_SIZE, +- .setkey = nss_cryptoapi_ablk_setkey, +- .encrypt = nss_cryptoapi_ablk_encrypt, +- .decrypt = nss_cryptoapi_ablk_decrypt, +- }, +- }, +- }, +- { +- .cra_name = "ecb(aes)", +- .cra_driver_name = "nss-ecb-aes", +- .cra_priority = 10000, +- .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC, +- .cra_blocksize = AES_BLOCK_SIZE, +- .cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), +- .cra_alignmask = 0, +- .cra_type = &crypto_ablkcipher_type, +- .cra_module = THIS_MODULE, +- .cra_init = nss_cryptoapi_ablkcipher_init, +- .cra_exit = nss_cryptoapi_ablkcipher_exit, +- .cra_u = { +- .ablkcipher = { +- .min_keysize = AES_MIN_KEY_SIZE, +- .max_keysize = AES_MAX_KEY_SIZE, +- .setkey = nss_cryptoapi_ablk_setkey, +- .encrypt = nss_cryptoapi_ablk_encrypt, +- .decrypt = nss_cryptoapi_ablk_decrypt, +- }, +- }, +- }, +- { +- .cra_name = "cbc(des3_ede)", +- .cra_driver_name = "nss-cbc-des-ede", +- .cra_priority = 10000, +- .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER | CRYPTO_ALG_ASYNC, +- .cra_blocksize = DES3_EDE_BLOCK_SIZE, +- .cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), +- .cra_alignmask = 0, +- .cra_type = &crypto_ablkcipher_type, +- .cra_module = THIS_MODULE, +- .cra_init = nss_cryptoapi_ablkcipher_init, +- .cra_exit = nss_cryptoapi_ablkcipher_exit, +- .cra_u = { +- .ablkcipher = { +- .ivsize = DES3_EDE_BLOCK_SIZE, +- .min_keysize = DES3_EDE_KEY_SIZE, +- .max_keysize = DES3_EDE_KEY_SIZE, +- .setkey = nss_cryptoapi_ablk_setkey, +- .encrypt = nss_cryptoapi_ablk_encrypt, +- .decrypt = nss_cryptoapi_ablk_decrypt, +- }, +- }, ++ .base.cra_name = "cbc(aes)", ++ .base.cra_driver_name = "nss-cbc-aes", ++ .base.cra_priority = 10000, ++ .base.cra_flags = CRYPTO_ALG_ASYNC, ++ .base.cra_blocksize = AES_BLOCK_SIZE, ++ .base.cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), ++ .base.cra_alignmask = 0, ++ .base.cra_module = THIS_MODULE, ++ .init = nss_cryptoapi_skcipher_init, ++ .exit = nss_cryptoapi_skcipher_exit, ++ .ivsize = AES_BLOCK_SIZE, ++ .min_keysize = AES_MIN_KEY_SIZE, ++ .max_keysize = AES_MAX_KEY_SIZE, ++ .setkey = nss_cryptoapi_skcipher_setkey, ++ .encrypt = nss_cryptoapi_skcipher_encrypt, ++ .decrypt = nss_cryptoapi_skcipher_decrypt, ++ }, ++ { ++ .base.cra_name = "rfc3686(ctr(aes))", ++ .base.cra_driver_name = "nss-rfc3686-ctr-aes", ++ .base.cra_priority = 30000, ++ .base.cra_flags = CRYPTO_ALG_ASYNC, ++ .base.cra_blocksize = AES_BLOCK_SIZE, ++ .base.cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), ++ .base.cra_alignmask = 0, ++ .base.cra_module = THIS_MODULE, ++ .init = nss_cryptoapi_skcipher_init, ++ .exit = nss_cryptoapi_skcipher_exit, ++ .ivsize = CTR_RFC3686_IV_SIZE, ++ .min_keysize = AES_MIN_KEY_SIZE + CTR_RFC3686_NONCE_SIZE, ++ .max_keysize = AES_MAX_KEY_SIZE + CTR_RFC3686_NONCE_SIZE, ++ .setkey = nss_cryptoapi_skcipher_setkey, ++ .encrypt = nss_cryptoapi_skcipher_encrypt, ++ .decrypt = nss_cryptoapi_skcipher_decrypt, ++ }, ++ { ++ .base.cra_name = "ecb(aes)", ++ .base.cra_driver_name = "nss-ecb-aes", ++ .base.cra_priority = 10000, ++ .base.cra_flags = CRYPTO_ALG_ASYNC, ++ .base.cra_blocksize = AES_BLOCK_SIZE, ++ .base.cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), ++ .base.cra_alignmask = 0, ++ .base.cra_module = THIS_MODULE, ++ .init = nss_cryptoapi_skcipher_init, ++ .exit = nss_cryptoapi_skcipher_exit, ++ .min_keysize = AES_MIN_KEY_SIZE, ++ .max_keysize = AES_MAX_KEY_SIZE, ++ .setkey = nss_cryptoapi_skcipher_setkey, ++ .encrypt = nss_cryptoapi_skcipher_encrypt, ++ .decrypt = nss_cryptoapi_skcipher_decrypt, ++ }, ++ { ++ .base.cra_name = "cbc(des3_ede)", ++ .base.cra_driver_name = "nss-cbc-des-ede", ++ .base.cra_priority = 10000, ++ .base.cra_flags = CRYPTO_ALG_ASYNC, ++ .base.cra_blocksize = DES3_EDE_BLOCK_SIZE, ++ .base.cra_ctxsize = sizeof(struct nss_cryptoapi_ctx), ++ .base.cra_alignmask = 0, ++ .base.cra_module = THIS_MODULE, ++ .init = nss_cryptoapi_skcipher_init, ++ .exit = nss_cryptoapi_skcipher_exit, ++ .ivsize = DES3_EDE_BLOCK_SIZE, ++ .min_keysize = DES3_EDE_KEY_SIZE, ++ .max_keysize = DES3_EDE_KEY_SIZE, ++ .setkey = nss_cryptoapi_skcipher_setkey, ++ .encrypt = nss_cryptoapi_skcipher_encrypt, ++ .decrypt = nss_cryptoapi_skcipher_decrypt, + } + }; + #endif +@@ -2215,8 +2189,8 @@ void nss_cryptoapi_add_ctx2debugfs(struc + */ + void nss_cryptoapi_attach_user(void *app_data, struct nss_crypto_user *user) + { +-#if defined(NSS_CRYPTOAPI_ABLK) +- struct crypto_alg *ablk = cryptoapi_ablkcipher_algs; ++#if defined(NSS_CRYPTOAPI_SKCIPHER) ++ struct skcipher_alg *ablk = cryptoapi_skcipher_algs; + #endif + struct aead_alg *aead = cryptoapi_aead_algs; + struct ahash_alg *ahash = cryptoapi_ahash_algs; +@@ -2240,15 +2214,15 @@ void nss_cryptoapi_attach_user(void *app + g_cryptoapi.user = user; + } + +-#if defined(NSS_CRYPTOAPI_ABLK) +- for (i = 0; enable_ablk && (i < ARRAY_SIZE(cryptoapi_ablkcipher_algs)); i++, ablk++) { +- info = nss_cryptoapi_cra_name_lookup(ablk->cra_name); ++#if defined(NSS_CRYPTOAPI_SKCIPHER) ++ for (i = 0; enable_ablk && (i < ARRAY_SIZE(cryptoapi_skcipher_algs)); i++, ablk++) { ++ info = nss_cryptoapi_cra_name_lookup(ablk->base.cra_name); + if(!info || !nss_crypto_algo_is_supp(info->algo)) + continue; + +- if (crypto_register_alg(ablk)) { +- nss_cfi_err("%px: ABLK registration failed(%s)\n", sc, ablk->cra_name); +- ablk->cra_flags = 0; ++ if (crypto_register_skcipher(ablk)) { ++ nss_cfi_err("%px: skcipher registration failed(%s)\n", sc, ablk->base.cra_name); ++ ablk->base.cra_flags = 0; + } + } + #endif +@@ -2287,8 +2261,8 @@ void nss_cryptoapi_attach_user(void *app + */ + void nss_cryptoapi_detach_user(void *app_data, struct nss_crypto_user *user) + { +-#if defined(NSS_CRYPTOAPI_ABLK) +- struct crypto_alg *ablk = cryptoapi_ablkcipher_algs; ++#if defined(NSS_CRYPTOAPI_SKCIPHER) ++ struct skcipher_alg *ablk = cryptoapi_skcipher_algs; + #endif + struct aead_alg *aead = cryptoapi_aead_algs; + struct ahash_alg *ahash = cryptoapi_ahash_algs; +@@ -2302,13 +2276,13 @@ void nss_cryptoapi_detach_user(void *app + */ + atomic_set(&g_cryptoapi.registered, 0); + +-#if defined(NSS_CRYPTOAPI_ABLK) +- for (i = 0; enable_ablk && (i < ARRAY_SIZE(cryptoapi_ablkcipher_algs)); i++, ablk++) { +- if (!ablk->cra_flags) ++#if defined(NSS_CRYPTOAPI_SKCIPHER) ++ for (i = 0; enable_ablk && (i < ARRAY_SIZE(cryptoapi_skcipher_algs)); i++, ablk++) { ++ if (!ablk->base.cra_flags) + continue; + +- crypto_unregister_alg(ablk); +- nss_cfi_info("%px: ABLK unregister succeeded, algo: %s\n", sc, ablk->cra_name); ++ crypto_unregister_skcipher(ablk); ++ nss_cfi_info("%px: skcipher unregister succeeded, algo: %s\n", sc, ablk->base.cra_name); + } + #endif + +--- a/cryptoapi/v2.0/nss_cryptoapi_private.h ++++ b/cryptoapi/v2.0/nss_cryptoapi_private.h +@@ -248,14 +248,14 @@ extern void nss_cryptoapi_aead_tx_proc(s + struct nss_cryptoapi_info *info, bool encrypt); + + /* +- * ABLKCIPHER ++ * SKCIPHER + */ +-#if defined(NSS_CRYPTOAPI_ABLK) +-extern int nss_cryptoapi_ablkcipher_init(struct crypto_tfm *tfm); +-extern void nss_cryptoapi_ablkcipher_exit(struct crypto_tfm *tfm); +-extern int nss_cryptoapi_ablk_setkey(struct crypto_ablkcipher *cipher, const u8 *key, unsigned int len); +-extern int nss_cryptoapi_ablk_encrypt(struct ablkcipher_request *req); +-extern int nss_cryptoapi_ablk_decrypt(struct ablkcipher_request *req); ++#if defined(NSS_CRYPTOAPI_SKCIPHER) ++extern int nss_cryptoapi_skcipher_init(struct crypto_skcipher *tfm); ++extern void nss_cryptoapi_skcipher_exit(struct crypto_skcipher *tfm); ++extern int nss_cryptoapi_skcipher_setkey(struct crypto_skcipher *cipher, const u8 *key, unsigned int len); ++extern int nss_cryptoapi_skcipher_encrypt(struct skcipher_request *req); ++extern int nss_cryptoapi_skcipher_decrypt(struct skcipher_request *req); + extern void nss_cryptoapi_copy_iv(struct nss_cryptoapi_ctx *ctx, struct scatterlist *sg, uint8_t *iv, uint8_t iv_len); + #endif + +--- a/cryptoapi/v2.0/nss_cryptoapi_ablk.c ++++ /dev/null +@@ -1,458 +0,0 @@ +-/* Copyright (c) 2015-2020 The Linux Foundation. All rights reserved. +- * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. +- * +- * Permission to use, copy, modify, and/or distribute this software for any +- * purpose with or without fee is hereby granted, provided that the above +- * copyright notice and this permission notice appear in all copies. +- * +- * +- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY +- * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT +- * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM +- * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE +- * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR +- * PERFORMANCE OF THIS SOFTWARE. +- * +- * +- */ +- +-/** +- * nss_cryptoapi_ablk.c +- * Interface to communicate Native Linux crypto framework specific data +- * to Crypto core specific data +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include "nss_cryptoapi_private.h" +- +-extern struct nss_cryptoapi g_cryptoapi; +- +-/* +- * nss_cryptoapi_skcipher_ctx2session() +- * Cryptoapi function to get the session ID for an skcipher +- */ +-int nss_cryptoapi_skcipher_ctx2session(struct crypto_skcipher *sk, uint32_t *sid) +-{ +- struct crypto_tfm *tfm = crypto_skcipher_tfm(sk); +- struct crypto_ablkcipher **actx, *ablk; +- struct ablkcipher_tfm *ablk_tfm; +- struct nss_cryptoapi_ctx *ctx; +- +- if (strncmp("nss-", crypto_tfm_alg_driver_name(tfm), 4)) +- return -EINVAL; +- +- /* Get the ablkcipher from the skcipher */ +- actx = crypto_skcipher_ctx(sk); +- if (!actx || !(*actx)) +- return -EINVAL; +- +- /* +- * The ablkcipher now obtained is a wrapper around the actual +- * ablkcipher that is created when the skcipher is created. +- * Hence we derive the required ablkcipher through ablkcipher_tfm. +- */ +- ablk_tfm = crypto_ablkcipher_crt(*actx); +- if (!ablk_tfm) +- return -EINVAL; +- +- ablk = ablk_tfm->base; +- if (!ablk) +- return -EINVAL; +- +- /* Get the nss_cryptoapi context stored in the ablkcipher */ +- ctx = crypto_ablkcipher_ctx(ablk); +- +- BUG_ON(!ctx); +- NSS_CRYPTOAPI_VERIFY_MAGIC(ctx); +- +- *sid = ctx->sid; +- return 0; +-} +-EXPORT_SYMBOL(nss_cryptoapi_skcipher_ctx2session); +- +-/* +- * nss_cryptoapi_ablkcipher_init() +- * Cryptoapi ablkcipher init function. +- */ +-int nss_cryptoapi_ablkcipher_init(struct crypto_tfm *tfm) +-{ +- struct nss_cryptoapi_ctx *ctx = crypto_tfm_ctx(tfm); +- +- BUG_ON(!ctx); +- NSS_CRYPTOAPI_SET_MAGIC(ctx); +- +- memset(ctx, 0, sizeof(struct nss_cryptoapi_ctx)); +- +- ctx->user = g_cryptoapi.user; +- ctx->stats.init++; +- ctx->sid = NSS_CRYPTO_SESSION_MAX; +- init_completion(&ctx->complete); +- +- return 0; +-} +- +-/* +- * nss_cryptoapi_ablkcipher_exit() +- * Cryptoapi ablkcipher exit function. +- */ +-void nss_cryptoapi_ablkcipher_exit(struct crypto_tfm *tfm) +-{ +- struct nss_cryptoapi_ctx *ctx = crypto_tfm_ctx(tfm); +- int ret; +- +- BUG_ON(!ctx); +- NSS_CRYPTOAPI_VERIFY_MAGIC(ctx); +- +- ctx->stats.exit++; +- +- /* +- * When fallback_req is set, it means that fallback tfm was used +- * we didn't create any sessions. +- */ +- if (ctx->fallback_req) { +- ctx->stats.failed_fallback++; +- return; +- } +- +- if (!atomic_read(&ctx->active)) { +- ctx->stats.failed_exit++; +- return; +- } +- +- /* +- * Mark cryptoapi context as inactive +- */ +- atomic_set(&ctx->active, 0); +- +- if (!atomic_sub_and_test(1, &ctx->refcnt)) { +- /* +- * We need to wait for any outstanding packet using this ctx. +- * Once the last packet get processed, reference count will become +- * 0 this ctx. We will wait for the reference to go down to 0. +- */ +- ret = wait_for_completion_timeout(&ctx->complete, NSS_CRYPTOAPI_REQ_TIMEOUT_TICKS); +- WARN_ON(!ret); +- } +- +- if (ctx->sid != NSS_CRYPTO_SESSION_MAX) { +- nss_crypto_session_free(ctx->user, ctx->sid); +- debugfs_remove_recursive(ctx->dentry); +- ctx->sid = NSS_CRYPTO_SESSION_MAX; +- } +- +- NSS_CRYPTOAPI_CLEAR_MAGIC(ctx); +-} +- +-/* +- * nss_cryptoapi_ablk_setkey() +- * Cryptoapi setkey routine for aes. +- */ +-int nss_cryptoapi_ablk_setkey(struct crypto_ablkcipher *cipher, const u8 *key, unsigned int keylen) +-{ +- struct crypto_tfm *tfm = crypto_ablkcipher_tfm(cipher); +- struct nss_cryptoapi_ctx *ctx = crypto_tfm_ctx(tfm); +- struct nss_crypto_session_data data = {0}; +- int status; +- +- /* +- * Validate magic number - init should be called before setkey +- */ +- NSS_CRYPTOAPI_VERIFY_MAGIC(ctx); +- +- ctx->info = nss_cryptoapi_cra_name2info(crypto_tfm_alg_name(tfm), keylen, 0); +- if (!ctx->info) { +- crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_KEY_LEN); +- return -EINVAL; +- } +- +- ctx->iv_size = crypto_ablkcipher_ivsize(cipher); +- +- if (ctx->info->cipher_mode == NSS_CRYPTOAPI_CIPHER_MODE_CTR_RFC3686) { +- keylen = keylen - CTR_RFC3686_NONCE_SIZE; +- memcpy(ctx->ctx_iv, key + keylen, CTR_RFC3686_NONCE_SIZE); +- ctx->ctx_iv[3] = ntohl(0x1); +- ctx->iv_size += CTR_RFC3686_NONCE_SIZE + sizeof(uint32_t); +- } +- +- /* +- * Fill NSS crypto session data +- */ +- data.algo = ctx->info->algo; +- data.cipher_key = key; +- +- if (data.algo >= NSS_CRYPTO_CMN_ALGO_MAX) +- return -ERANGE; +- +- if (ctx->sid != NSS_CRYPTO_SESSION_MAX) { +- nss_crypto_session_free(ctx->user, ctx->sid); +- debugfs_remove_recursive(ctx->dentry); +- ctx->sid = NSS_CRYPTO_SESSION_MAX; +- } +- +- status = nss_crypto_session_alloc(ctx->user, &data, &ctx->sid); +- if (status < 0) { +- nss_cfi_err("%px: Unable to allocate crypto session(%d)\n", ctx, status); +- crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_FLAGS); +- return status; +- } +- +- nss_cryptoapi_add_ctx2debugfs(ctx); +- atomic_set(&ctx->active, 1); +- atomic_set(&ctx->refcnt, 1); +- return 0; +-} +- +-/* +- * nss_cryptoapi_ablkcipher_done() +- * Cipher operation completion callback function +- */ +-void nss_cryptoapi_ablkcipher_done(void *app_data, struct nss_crypto_hdr *ch, uint8_t status) +-{ +- struct ablkcipher_request *req = app_data; +- struct nss_cryptoapi_ctx *ctx = crypto_tfm_ctx(req->base.tfm); +- int error; +- +- BUG_ON(!ch); +- +- /* +- * Check cryptoapi context magic number. +- */ +- NSS_CRYPTOAPI_VERIFY_MAGIC(ctx); +- +- /* +- * For skcipher decryption case, the last block of encrypted data is used as +- * an IV for the next data +- */ +- if (ch->op == NSS_CRYPTO_OP_DIR_ENC) { +- nss_cryptoapi_copy_iv(ctx, req->dst, req->info, ch->iv_len); +- } +- +- /* +- * Free crypto hdr +- */ +- nss_crypto_hdr_free(ctx->user, ch); +- +- nss_cfi_dbg("data dump after transformation\n"); +- nss_cfi_dbg_data(sg_virt(req->dst), req->nbytes, ' '); +- +- /* +- * Check if there is any error reported by hardware +- */ +- error = nss_cryptoapi_status2error(ctx, status); +- ctx->stats.completed++; +- +- /* +- * Decrement cryptoapi reference +- */ +- nss_cryptoapi_ref_dec(ctx); +- req->base.complete(&req->base, error); +-} +- +-/* +- * nss_cryptoapi_ablk_encrypt() +- * Crytoapi encrypt for AES and 3DES algorithms. +- */ +-int nss_cryptoapi_ablk_encrypt(struct ablkcipher_request *req) +-{ +- struct nss_cryptoapi_info info = {.op_dir = NSS_CRYPTO_OP_DIR_ENC}; +- struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(req); +- struct nss_cryptoapi_ctx *ctx = crypto_ablkcipher_ctx(cipher); +- struct crypto_tfm *tfm = req->base.tfm; +- struct scatterlist *cur; +- int tot_len = 0; +- int i; +- +- /* +- * Check cryptoapi context magic number. +- */ +- NSS_CRYPTOAPI_VERIFY_MAGIC(ctx); +- +- /* +- * Check if cryptoapi context is active or not +- */ +- if (!atomic_read(&ctx->active)) +- return -EINVAL; +- +- if (sg_nents(req->src) != sg_nents(req->dst)) { +- ctx->stats.failed_req++; +- return -EINVAL; +- } +- +- /* +- * Block size not aligned. +- * AES-CTR requires only a one-byte block size alignment. +- */ +- if (!IS_ALIGNED(req->nbytes, crypto_tfm_alg_blocksize(tfm)) && ctx->info->blk_align) { +- ctx->stats.failed_align++; +- crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_BLOCK_LEN); +- return -EFAULT; +- } +- +- /* +- * Fill the request information structure +- */ +- info.iv = req->info; +- info.src.nsegs = sg_nents(req->src); +- info.dst.nsegs = sg_nents(req->dst); +- info.op_dir = NSS_CRYPTO_OP_DIR_ENC; +- info.cb = nss_cryptoapi_ablkcipher_done; +- info.iv_size = ctx->iv_size; +- info.src.first_sg = req->src; +- info.dst.first_sg = req->dst; +- info.dst.last_sg = sg_last(req->dst, info.dst.nsegs); +- +- /* out and in length will be same as ablk does only encrypt/decryt operation */ +- info.total_in_len = info.total_out_len = req->nbytes; +- info.in_place = (req->src == req->dst) ? true : false; +- +- /* +- * The exact length of data that needs to be ciphered for an ABLK +- * request is stored in req->nbytes. Hence we may have to reduce +- * the DMA length to what is specified in req->nbytes and later +- * restore the length of scatterlist back to its original value. +- */ +- for_each_sg(req->src, cur, info.src.nsegs, i) { +- if (!cur) +- break; +- +- tot_len += cur->length; +- if (!sg_next(cur)) +- break; +- } +- +- /* +- * We only support (2^16 - 1) length. +- */ +- if (tot_len > U16_MAX) { +- ctx->stats.failed_len++; +- return -EFBIG; +- } +- +- info.src.last_sg = cur; +- info.ahash_skip = tot_len - req->nbytes; +- +- if (!atomic_inc_not_zero(&ctx->refcnt)) +- return -ENOENT; +- +- return nss_cryptoapi_transform(ctx, &info, (void *)req, false); +-} +- +-/* +- * nss_cryptoapi_ablk_decrypt() +- * Crytoapi decrypt for AES and 3DES CBC algorithms. +- */ +-int nss_cryptoapi_ablk_decrypt(struct ablkcipher_request *req) +-{ +- struct nss_cryptoapi_info info = {.op_dir = NSS_CRYPTO_OP_DIR_DEC}; +- struct crypto_ablkcipher *cipher = crypto_ablkcipher_reqtfm(req); +- struct nss_cryptoapi_ctx *ctx = crypto_ablkcipher_ctx(cipher); +- struct crypto_tfm *tfm = req->base.tfm; +- struct scatterlist *cur; +- int tot_len = 0; +- int i; +- +- /* +- * Check cryptoapi context magic number. +- */ +- NSS_CRYPTOAPI_VERIFY_MAGIC(ctx); +- +- /* +- * Check if cryptoapi context is active or not +- */ +- if (!atomic_read(&ctx->active)) +- return -EINVAL; +- +- if (sg_nents(req->src) != sg_nents(req->dst)) { +- ctx->stats.failed_req++; +- return -EINVAL; +- } +- +- /* +- * Block size not aligned +- */ +- if (!IS_ALIGNED(req->nbytes, crypto_tfm_alg_blocksize(tfm)) && ctx->info->blk_align) { +- ctx->stats.failed_align++; +- crypto_ablkcipher_set_flags(cipher, CRYPTO_TFM_RES_BAD_BLOCK_LEN); +- return -EFAULT; +- } +- +- /* +- * Fill the request information structure +- * Note: For CTR mode, IV size will be set to AES_BLOCK_SIZE. +- * This is because linux gives iv size as 8 while we need to alloc 16 bytes +- * in crypto hdr to accomodate +- * - 4 bytes of nonce +- * - 8 bytes of IV +- * - 4 bytes of initial counter +- */ +- info.iv = req->info; +- info.src.nsegs = sg_nents(req->src); +- info.dst.nsegs = sg_nents(req->dst); +- info.iv_size = ctx->iv_size; +- info.op_dir = NSS_CRYPTO_OP_DIR_DEC; +- info.cb = nss_cryptoapi_ablkcipher_done; +- info.src.first_sg = req->src; +- info.dst.first_sg = req->dst; +- info.dst.last_sg = sg_last(req->dst, info.dst.nsegs); +- +- /* out and in length will be same as ablk does only encrypt/decryt operation */ +- info.total_in_len = info.total_out_len = req->nbytes; +- info.in_place = (req->src == req->dst) ? true : false; +- +- /* +- * The exact length of data that needs to be ciphered for an ABLK +- * request is stored in req->nbytes. Hence we may have to reduce +- * the DMA length to what is specified in req->nbytes and later +- * restore the length of scatterlist back to its original value. +- */ +- for_each_sg(req->src, cur, info.src.nsegs, i) { +- tot_len += cur->length; +- if (!sg_next(cur)) +- break; +- } +- +- /* +- * We only support (2^16 - 1) length. +- */ +- if (tot_len > U16_MAX) { +- ctx->stats.failed_len++; +- return -EFBIG; +- } +- +- info.ahash_skip = tot_len - req->nbytes; +- info.src.last_sg = cur; +- +- if (!atomic_inc_not_zero(&ctx->refcnt)) +- return -ENOENT; +- +- return nss_cryptoapi_transform(ctx, &info, (void *)req, false); +-} +--- /dev/null ++++ b/cryptoapi/v2.0/nss_cryptoapi_skcipher.c +@@ -0,0 +1,438 @@ ++/* Copyright (c) 2015-2020 The Linux Foundation. All rights reserved. ++ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY ++ * AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT ++ * INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM ++ * LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE ++ * OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR ++ * PERFORMANCE OF THIS SOFTWARE. ++ * ++ * ++ */ ++ ++/** ++ * nss_cryptoapi_ablk.c ++ * Interface to communicate Native Linux crypto framework specific data ++ * to Crypto core specific data ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0) ++#include ++#else ++#include ++#include ++#endif ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "nss_cryptoapi_private.h" ++ ++extern struct nss_cryptoapi g_cryptoapi; ++ ++/* ++ * nss_cryptoapi_skcipher_ctx2session() ++ * Cryptoapi function to get the session ID for an skcipher ++ */ ++int nss_cryptoapi_skcipher_ctx2session(struct crypto_skcipher *sk, uint32_t *sid) ++{ ++ struct crypto_tfm *tfm = crypto_skcipher_tfm(sk); ++ struct nss_cryptoapi_ctx *ctx; ++ ++ if (strncmp("nss-", crypto_tfm_alg_driver_name(tfm), 4)) ++ return -EINVAL; ++ ++ /* Get the nss_cryptoapi context stored in skcipher */ ++ ctx = crypto_skcipher_ctx(sk); ++ BUG_ON(!ctx); ++ NSS_CRYPTOAPI_VERIFY_MAGIC(ctx); ++ ++ *sid = ctx->sid; ++ return 0; ++} ++EXPORT_SYMBOL(nss_cryptoapi_skcipher_ctx2session); ++ ++/* ++ * nss_cryptoapi_skcipher_init() ++ * Cryptoapi skcipher init function. ++ */ ++int nss_cryptoapi_skcipher_init(struct crypto_skcipher *tfm) ++{ ++ struct nss_cryptoapi_ctx *ctx = crypto_skcipher_ctx(tfm); ++ ++ BUG_ON(!ctx); ++ NSS_CRYPTOAPI_SET_MAGIC(ctx); ++ ++ memset(ctx, 0, sizeof(struct nss_cryptoapi_ctx)); ++ ++ ctx->user = g_cryptoapi.user; ++ ctx->stats.init++; ++ ctx->sid = NSS_CRYPTO_SESSION_MAX; ++ init_completion(&ctx->complete); ++ ++ return 0; ++} ++ ++/* ++ * nss_cryptoapi_skcipher_exit() ++ * Cryptoapi skcipher exit function. ++ */ ++void nss_cryptoapi_skcipher_exit(struct crypto_skcipher *tfm) ++{ ++ struct nss_cryptoapi_ctx *ctx = crypto_skcipher_ctx(tfm); ++ int ret; ++ ++ BUG_ON(!ctx); ++ NSS_CRYPTOAPI_VERIFY_MAGIC(ctx); ++ ++ ctx->stats.exit++; ++ ++ /* ++ * When fallback_req is set, it means that fallback tfm was used ++ * we didn't create any sessions. ++ */ ++ if (ctx->fallback_req) { ++ ctx->stats.failed_fallback++; ++ return; ++ } ++ ++ if (!atomic_read(&ctx->active)) { ++ ctx->stats.failed_exit++; ++ return; ++ } ++ ++ /* ++ * Mark cryptoapi context as inactive ++ */ ++ atomic_set(&ctx->active, 0); ++ ++ if (!atomic_sub_and_test(1, &ctx->refcnt)) { ++ /* ++ * We need to wait for any outstanding packet using this ctx. ++ * Once the last packet get processed, reference count will become ++ * 0 this ctx. We will wait for the reference to go down to 0. ++ */ ++ ret = wait_for_completion_timeout(&ctx->complete, NSS_CRYPTOAPI_REQ_TIMEOUT_TICKS); ++ WARN_ON(!ret); ++ } ++ ++ if (ctx->sid != NSS_CRYPTO_SESSION_MAX) { ++ nss_crypto_session_free(ctx->user, ctx->sid); ++ debugfs_remove_recursive(ctx->dentry); ++ ctx->sid = NSS_CRYPTO_SESSION_MAX; ++ } ++ ++ NSS_CRYPTOAPI_CLEAR_MAGIC(ctx); ++} ++ ++/* ++ * nss_cryptoapi_skcipher_setkey() ++ * Cryptoapi setkey routine for aes. ++ */ ++int nss_cryptoapi_skcipher_setkey(struct crypto_skcipher *cipher, const u8 *key, unsigned int keylen) ++{ ++ struct crypto_tfm *tfm = crypto_skcipher_tfm(cipher); ++ struct nss_cryptoapi_ctx *ctx = crypto_skcipher_ctx(cipher); ++ struct nss_crypto_session_data data = {0}; ++ int status; ++ ++ /* ++ * Validate magic number - init should be called before setkey ++ */ ++ NSS_CRYPTOAPI_VERIFY_MAGIC(ctx); ++ ++ ctx->info = nss_cryptoapi_cra_name2info(crypto_tfm_alg_name(tfm), keylen, 0); ++ if (!ctx->info) { ++ return -EINVAL; ++ } ++ ++ ctx->iv_size = crypto_skcipher_ivsize(cipher); ++ ++ if (ctx->info->cipher_mode == NSS_CRYPTOAPI_CIPHER_MODE_CTR_RFC3686) { ++ keylen = keylen - CTR_RFC3686_NONCE_SIZE; ++ memcpy(ctx->ctx_iv, key + keylen, CTR_RFC3686_NONCE_SIZE); ++ ctx->ctx_iv[3] = ntohl(0x1); ++ ctx->iv_size += CTR_RFC3686_NONCE_SIZE + sizeof(uint32_t); ++ } ++ ++ /* ++ * Fill NSS crypto session data ++ */ ++ data.algo = ctx->info->algo; ++ data.cipher_key = key; ++ ++ if (data.algo >= NSS_CRYPTO_CMN_ALGO_MAX) ++ return -ERANGE; ++ ++ if (ctx->sid != NSS_CRYPTO_SESSION_MAX) { ++ nss_crypto_session_free(ctx->user, ctx->sid); ++ debugfs_remove_recursive(ctx->dentry); ++ ctx->sid = NSS_CRYPTO_SESSION_MAX; ++ } ++ ++ status = nss_crypto_session_alloc(ctx->user, &data, &ctx->sid); ++ if (status < 0) { ++ nss_cfi_err("%px: Unable to allocate crypto session(%d)\n", ctx, status); ++ return status; ++ } ++ ++ nss_cryptoapi_add_ctx2debugfs(ctx); ++ atomic_set(&ctx->active, 1); ++ atomic_set(&ctx->refcnt, 1); ++ return 0; ++} ++ ++/* ++ * nss_cryptoapi_skcipher_done() ++ * Cipher operation completion callback function ++ */ ++void nss_cryptoapi_skcipher_done(void *app_data, struct nss_crypto_hdr *ch, uint8_t status) ++{ ++ struct skcipher_request *req = app_data; ++ struct nss_cryptoapi_ctx *ctx = skcipher_request_ctx(req); ++ int error; ++ ++ BUG_ON(!ch); ++ ++ /* ++ * Check cryptoapi context magic number. ++ */ ++ NSS_CRYPTOAPI_VERIFY_MAGIC(ctx); ++ ++ /* ++ * For skcipher decryption case, the last block of encrypted data is used as ++ * an IV for the next data ++ */ ++ if (ch->op == NSS_CRYPTO_OP_DIR_ENC) { ++ nss_cryptoapi_copy_iv(ctx, req->dst, req->iv, ch->iv_len); ++ } ++ ++ /* ++ * Free crypto hdr ++ */ ++ nss_crypto_hdr_free(ctx->user, ch); ++ ++ nss_cfi_dbg("data dump after transformation\n"); ++ nss_cfi_dbg_data(sg_virt(req->dst), req->cryptlen, ' '); ++ ++ /* ++ * Check if there is any error reported by hardware ++ */ ++ error = nss_cryptoapi_status2error(ctx, status); ++ ctx->stats.completed++; ++ ++ /* ++ * Decrement cryptoapi reference ++ */ ++ nss_cryptoapi_ref_dec(ctx); ++ req->base.complete(&req->base, error); ++} ++ ++/* ++ * nss_cryptoapi_skcipher_encrypt() ++ * Crytoapi encrypt for AES and 3DES algorithms. ++ */ ++int nss_cryptoapi_skcipher_encrypt(struct skcipher_request *req) ++{ ++ struct nss_cryptoapi_info info = {.op_dir = NSS_CRYPTO_OP_DIR_ENC}; ++ struct crypto_skcipher *cipher = crypto_skcipher_reqtfm(req); ++ struct nss_cryptoapi_ctx *ctx = crypto_skcipher_ctx(cipher); ++ struct crypto_tfm *tfm = req->base.tfm; ++ struct scatterlist *cur; ++ int tot_len = 0; ++ int i; ++ ++ /* ++ * Check cryptoapi context magic number. ++ */ ++ NSS_CRYPTOAPI_VERIFY_MAGIC(ctx); ++ ++ /* ++ * Check if cryptoapi context is active or not ++ */ ++ if (!atomic_read(&ctx->active)) ++ return -EINVAL; ++ ++ if (sg_nents(req->src) != sg_nents(req->dst)) { ++ ctx->stats.failed_req++; ++ return -EINVAL; ++ } ++ ++ /* ++ * Block size not aligned. ++ * AES-CTR requires only a one-byte block size alignment. ++ */ ++ if (!IS_ALIGNED(req->cryptlen, crypto_tfm_alg_blocksize(tfm)) && ctx->info->blk_align) { ++ ctx->stats.failed_align++; ++ return -EFAULT; ++ } ++ ++ /* ++ * Fill the request information structure ++ */ ++ info.iv = req->iv; ++ info.src.nsegs = sg_nents(req->src); ++ info.dst.nsegs = sg_nents(req->dst); ++ info.op_dir = NSS_CRYPTO_OP_DIR_ENC; ++ info.cb = nss_cryptoapi_skcipher_done; ++ info.iv_size = ctx->iv_size; ++ info.src.first_sg = req->src; ++ info.dst.first_sg = req->dst; ++ info.dst.last_sg = sg_last(req->dst, info.dst.nsegs); ++ ++ /* out and in length will be same as ablk does only encrypt/decryt operation */ ++ info.total_in_len = info.total_out_len = req->cryptlen; ++ info.in_place = (req->src == req->dst) ? true : false; ++ ++ /* ++ * The exact length of data that needs to be ciphered for an ABLK ++ * request is stored in req->cryptlen. Hence we may have to reduce ++ * the DMA length to what is specified in req->cryptlen and later ++ * restore the length of scatterlist back to its original value. ++ */ ++ for_each_sg(req->src, cur, info.src.nsegs, i) { ++ if (!cur) ++ break; ++ ++ tot_len += cur->length; ++ if (!sg_next(cur)) ++ break; ++ } ++ ++ /* ++ * We only support (2^16 - 1) length. ++ */ ++ if (tot_len > U16_MAX) { ++ ctx->stats.failed_len++; ++ return -EFBIG; ++ } ++ ++ info.src.last_sg = cur; ++ info.ahash_skip = tot_len - req->cryptlen; ++ ++ if (!atomic_inc_not_zero(&ctx->refcnt)) ++ return -ENOENT; ++ ++ return nss_cryptoapi_transform(ctx, &info, (void *)req, false); ++} ++ ++/* ++ * nss_cryptoapi_skcipher_decrypt() ++ * Crytoapi decrypt for AES and 3DES CBC algorithms. ++ */ ++int nss_cryptoapi_skcipher_decrypt(struct skcipher_request *req) ++{ ++ struct nss_cryptoapi_info info = {.op_dir = NSS_CRYPTO_OP_DIR_DEC}; ++ struct crypto_skcipher *cipher = crypto_skcipher_reqtfm(req); ++ struct nss_cryptoapi_ctx *ctx = crypto_skcipher_ctx(cipher); ++ struct crypto_tfm *tfm = req->base.tfm; ++ struct scatterlist *cur; ++ int tot_len = 0; ++ int i; ++ ++ /* ++ * Check cryptoapi context magic number. ++ */ ++ NSS_CRYPTOAPI_VERIFY_MAGIC(ctx); ++ ++ /* ++ * Check if cryptoapi context is active or not ++ */ ++ if (!atomic_read(&ctx->active)) ++ return -EINVAL; ++ ++ if (sg_nents(req->src) != sg_nents(req->dst)) { ++ ctx->stats.failed_req++; ++ return -EINVAL; ++ } ++ ++ /* ++ * Block size not aligned ++ */ ++ if (!IS_ALIGNED(req->cryptlen, crypto_tfm_alg_blocksize(tfm)) && ctx->info->blk_align) { ++ ctx->stats.failed_align++; ++ return -EFAULT; ++ } ++ ++ /* ++ * Fill the request information structure ++ * Note: For CTR mode, IV size will be set to AES_BLOCK_SIZE. ++ * This is because linux gives iv size as 8 while we need to alloc 16 bytes ++ * in crypto hdr to accomodate ++ * - 4 bytes of nonce ++ * - 8 bytes of IV ++ * - 4 bytes of initial counter ++ */ ++ info.iv = req->iv; ++ info.src.nsegs = sg_nents(req->src); ++ info.dst.nsegs = sg_nents(req->dst); ++ info.iv_size = ctx->iv_size; ++ info.op_dir = NSS_CRYPTO_OP_DIR_DEC; ++ info.cb = nss_cryptoapi_skcipher_done; ++ info.src.first_sg = req->src; ++ info.dst.first_sg = req->dst; ++ info.dst.last_sg = sg_last(req->dst, info.dst.nsegs); ++ ++ /* out and in length will be same as ablk does only encrypt/decryt operation */ ++ info.total_in_len = info.total_out_len = req->cryptlen; ++ info.in_place = (req->src == req->dst) ? true : false; ++ ++ /* ++ * The exact length of data that needs to be ciphered for an ABLK ++ * request is stored in req->cryptlen. Hence we may have to reduce ++ * the DMA length to what is specified in req->cryptlen and later ++ * restore the length of scatterlist back to its original value. ++ */ ++ for_each_sg(req->src, cur, info.src.nsegs, i) { ++ tot_len += cur->length; ++ if (!sg_next(cur)) ++ break; ++ } ++ ++ /* ++ * We only support (2^16 - 1) length. ++ */ ++ if (tot_len > U16_MAX) { ++ ctx->stats.failed_len++; ++ return -EFBIG; ++ } ++ ++ info.ahash_skip = tot_len - req->cryptlen; ++ info.src.last_sg = cur; ++ ++ if (!atomic_inc_not_zero(&ctx->refcnt)) ++ return -ENOENT; ++ ++ return nss_cryptoapi_transform(ctx, &info, (void *)req, false); ++} diff --git a/package/qca/qca-nss-clients/Makefile b/package/qca/qca-nss-clients/Makefile new file mode 100644 index 000000000..555fd790f --- /dev/null +++ b/package/qca/qca-nss-clients/Makefile @@ -0,0 +1,612 @@ +include $(TOPDIR)/rules.mk + +PKG_NAME:=qca-nss-clients +PKG_RELEASE:=1 + +PKG_SOURCE_PROTO:=git +PKG_SOURCE_DATE:=2023-10-04 +PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/nss-clients.git +PKG_SOURCE_VERSION:=f058ae199b42f30be9925b2ed1ce53afb128200c +PKG_MIRROR_HASH:=90401b577a7750d3b7eadb423700aab7e1da1af392637598e08f6007f23a92e1 + +PKG_BUILD_PARALLEL:=1 + +include $(INCLUDE_DIR)/kernel.mk +include $(INCLUDE_DIR)/package.mk + +ifeq ($(CONFIG_TARGET_SUBTARGET), "ipq807x") + SOC="ipq807x_64" + subtarget:=$(CONFIG_TARGET_SUBTARGET) +else ifeq ($(CONFIG_TARGET_SUBTARGET), "ipq60xx") + SOC="ipq60xx_64" + subtarget:=$(CONFIG_TARGET_SUBTARGET) +endif + +ifneq (, $(findstring $(subtarget), "ipq807x" "ipq60xx")) + DTLSMGR_DIR:=v2.0 + IPSECMGR_DIR:=v2.0 + IPSECMGR_KLIPS:= $(PKG_BUILD_DIR)/ipsecmgr/$(IPSECMGR_DIR)/plugins/klips/qca-nss-ipsec-klips.ko +endif + +define KernelPackage/qca-nss-drv-gre + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=Kernel driver for NSS (connection manager) - GRE + DEPENDS:=@TARGET_qualcommax +@NSS_DRV_GRE_ENABLE +kmod-gre6 \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv + FILES:= \ + $(PKG_BUILD_DIR)/gre/qca-nss-gre.ko \ + $(PKG_BUILD_DIR)/gre/test/qca-nss-gre-test.ko + AUTOLOAD:=$(call AutoLoad,51,qca-nss-gre) +endef + +define KernelPackage/qca-nss-drv-gre/description +Kernel modules for NSS connection manager - Support for GRE +endef + +define KernelPackage/qca-nss-drv-l2tpv2 + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=Kernel driver for NSS (connection manager) - l2tp + DEPENDS:=@NSS_DRV_L2TP_ENABLE +kmod-ppp +kmod-l2tp \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv + FILES:=$(PKG_BUILD_DIR)/l2tp/l2tpv2/qca-nss-l2tpv2.ko + KCONFIG:=CONFIG_L2TP=y + AUTOLOAD:=$(call AutoLoad,51,qca-nss-l2tpv2) +endef + +define KernelPackage/qca-nss-drv-l2tp/description +Kernel modules for NSS connection manager - Support for l2tp tunnel +endef + +define KernelPackage/qca-nss-drv-pptp + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=Kernel driver for NSS (connection manager) - PPTP + DEPENDS:=@TARGET_qualcommax +@NSS_DRV_PPTP_ENABLE +kmod-pptp \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv + FILES:=$(PKG_BUILD_DIR)/pptp/qca-nss-pptp.ko + AUTOLOAD:=$(call AutoLoad,51,qca-nss-pptp) +endef + +define KernelPackage/qca-nss-drv-pptp/description +Kernel modules for NSS connection manager - Support for PPTP tunnel +endef + +define KernelPackage/qca-nss-drv-pppoe + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=Kernel driver for NSS (connection manager) - PPPoE + DEPENDS:=@TARGET_qualcommax +@NSS_DRV_PPPOE_ENABLE \ + +PACKAGE_kmod-bonding:kmod-bonding +kmod-pppoe \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv + FILES:=$(PKG_BUILD_DIR)/pppoe/qca-nss-pppoe.ko + AUTOLOAD:=$(call AutoLoad,51,qca-nss-pppoe) +endef + +define KernelPackage/qca-nss-drv-pppoe/Description +Kernel modules for NSS connection manager - Support for PPPoE +endef + +define KernelPackage/qca-nss-drv-map-t + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=Kernel driver for NSS (connection manager) - MAP-T + DEPENDS:=@TARGET_qualcommax +@NSS_DRV_MAPT_ENABLE \ + +PACKAGE_kmod-nat46:kmod-nat46 \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv + FILES:=$(PKG_BUILD_DIR)/map/map-t/qca-nss-map-t.ko + AUTOLOAD:=$(call AutoLoad,51,qca-nss-map-t) +endef + +define KernelPackage/qca-nss-drv-map-t/description +Kernel modules for NSS connection manager - Support for MAP-T +endef + +define KernelPackage/qca-nss-drv-tun6rd + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=Kernel driver for NSS (connection manager) - tun6rd + DEPENDS:=@TARGET_qualcommax +@NSS_DRV_TUN6RD_ENABLE +6rd \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv +kmod-sit + FILES:=$(PKG_BUILD_DIR)/qca-nss-tun6rd.ko + AUTOLOAD:=$(call AutoLoad,60,qca-nss-tun6rd) +endef + +define KernelPackage/qca-nss-drv-tun6rd/description +Kernel modules for NSS connection manager - Support for 6rd tunnel +endef + +define KernelPackage/qca-nss-drv-tunipip6 + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=Kernel driver for NSS (connection manager) - DS-lite and ipip6 Tunnel + DEPENDS:=@TARGET_qualcommax +@NSS_DRV_TUNIPIP6_ENABLE +kmod-iptunnel6 \ + +kmod-ip6-tunnel +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv + FILES:=$(PKG_BUILD_DIR)/tunipip6/qca-nss-tunipip6.ko + AUTOLOAD:=$(call AutoLoad,60,qca-nss-tunipip6) +endef + +define KernelPackage/qca-nss-drv-tunipip6/description +Kernel modules for NSS connection manager +Add support for DS-lite and ipip6 tunnel +endef + +define KernelPackage/qca-nss-drv-bridge-mgr + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=Kernel driver for NSS bridge manager + DEPENDS:=@TARGET_qualcommax \ + +kmod-qca-nss-drv-vlan-mgr \ + +@NSS_DRV_BRIDGE_ENABLE \ + +PACKAGE_kmod-bonding:kmod-bonding \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv +ifneq ($(CONFIG_PACKAGE_kmod-qca-ovsmgr),) + DEPENDS+=kmod-qca-ovsmgr +endif + FILES:=$(PKG_BUILD_DIR)/bridge/qca-nss-bridge-mgr.ko + AUTOLOAD:=$(call AutoLoad,51,qca-nss-bridge-mgr) +endef + +define KernelPackage/qca-nss-drv-bridge-mgr/Description +Kernel modules for NSS bridge manager +endef + +define KernelPackage/qca-nss-drv-clmapmgr + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + DEPENDS:=+@NSS_DRV_CLMAP_ENABLE \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv \ + +kmod-qca-nss-drv-eogremgr + TITLE:=NSS clmap Manager for QCA NSS driver + FILES:=$(PKG_BUILD_DIR)/clmapmgr/qca-nss-clmapmgr.ko +endef + +define KernelPackage/qca-nss-drv-clmapmgr/description +Kernel module for managing NSS clmap +endef + +define KernelPackage/qca-nss-drv-dtlsmgr + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=Kernel driver for NSS (connection manager) - dtlsmgr + DEPENDS:=@TARGET_qualcommax +@NSS_DRV_DTLS_ENABLE \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv \ + +PACKAGE_kmod-qca-nss-cfi-cryptoapi:kmod-qca-nss-cfi-cryptoapi + FILES:=$(PKG_BUILD_DIR)/dtls/$(DTLSMGR_DIR)/qca-nss-dtlsmgr.ko +endef + +define KernelPackage/qca-nss-drv-dtls/description +Kernel modules for NSS connection manager - Support for DTLS sessions +endef + +define KernelPackage/qca-nss-drv-tlsmgr + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=Kernel driver for NSS (connection manager) - tlsmgr + DEPENDS:=@TARGET_qualcommax +@NSS_DRV_TLS_ENABLE \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv \ + +PACKAGE_kmod-qca-nss-cfi-cryptoapi:kmod-qca-nss-cfi-cryptoapi + FILES:=$(PKG_BUILD_DIR)/tls/qca-nss-tlsmgr.ko +endef + +define KernelPackage/qca-nss-drv-tls/description +Kernel modules for NSS connection manager - Support for TLS sessions +endef + +define KernelPackage/qca-nss-drv-ipsecmgr + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=Kernel driver for NSS (ipsec manager) - ipsecmgr + DEPENDS:=@TARGET_qualcommax \ + +@NSS_DRV_IPSEC_ENABLE \ + +@NSS_DRV_TSTAMP_ENABLE \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv \ + +PACKAGE_kmod-qca-nss-cfi-cryptoapi:kmod-qca-nss-cfi-cryptoapi +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-l2tpv2),) + DEPENDS+=+kmod-qca-nss-drv-l2tpv2 +endif + FILES:=$(PKG_BUILD_DIR)/ipsecmgr/$(IPSECMGR_DIR)/qca-nss-ipsecmgr.ko $(IPSECMGR_KLIPS) + AUTOLOAD:=$(call AutoLoad,60,qca-nss-ipsecmgr) +endef + +define KernelPackage/qca-nss-drv-ipsecmgr/description +Kernel module for NSS IPsec offload manager +endef + +define KernelPackage/qca-nss-drv-ovpn-mgr + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=Kernel driver for NSS OpenVPN manager + DEPENDS:=@TARGET_qualcommax +@NSS_DRV_OVPN_ENABLE \ + +kmod-qca-nss-drv +kmod-tun +kmod-ipt-conntrack \ + +PACKAGE_kmod-qca-nss-cfi-cryptoapi:kmod-qca-nss-cfi-cryptoapi + FILES:=$(PKG_BUILD_DIR)/openvpn/src/qca-nss-ovpn-mgr.ko +endef + +define KernelPackage/qca-nss-drv-ovpn-mgr/description +Kernel module for NSS OpenVPN manager +endef + +define KernelPackage/qca-nss-drv-ovpn-link + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=Kernel driver for interfacing NSS OpenVPN manager with ECM + DEPENDS:=@TARGET_qualcommax \ + +kmod-qca-nss-drv-ovpn-mgr \ + +@PACKAGE_kmod-qca-nss-ecm + FILES:=$(PKG_BUILD_DIR)/openvpn/plugins/qca-nss-ovpn-link.ko +endef + +define KernelPackage/qca-nss-drv-ovpn-link/description +This module registers with ECM and communicates with NSS OpenVPN manager for supporting OpenVPN offload. +endef + +define KernelPackage/qca-nss-drv-pvxlanmgr + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + DEPENDS:=@TARGET_qualcommax +@NSS_DRV_PVXLAN_ENABLE \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv + TITLE:=NSS PVXLAN Manager for QCA NSS driver + FILES:=$(PKG_BUILD_DIR)/pvxlanmgr/qca-nss-pvxlanmgr.ko +endef + +define KernelPackage/qca-nss-drv-pvxlanmgr/description +Kernel module for managing NSS PVxLAN +endef + +define KernelPackage/qca-nss-drv-eogremgr + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + DEPENDS:=+@NSS_DRV_GRE_ENABLE \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv \ + +kmod-qca-nss-drv-gre + TITLE:=NSS EOGRE Manager for QCA NSS driver + FILES:=$(PKG_BUILD_DIR)/eogremgr/qca-nss-eogremgr.ko +endef + +define KernelPackage/qca-nss-drv-eogremgr/description +Kernel module for managing NSS EoGRE +endef + +define KernelPackage/qca-nss-drv-clmapmgr + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + DEPENDS:=+@NSS_DRV_CLMAP_ENABLE \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv \ + +kmod-qca-nss-drv-eogremgr + TITLE:=NSS clmap Manager for QCA NSS driver + FILES:=$(PKG_BUILD_DIR)/clmapmgr/qca-nss-clmapmgr.ko +endef + +define KernelPackage/qca-nss-drv-clmapmgr/description +Kernel module for managing NSS clmap +endef + +define KernelPackage/qca-nss-drv-lag-mgr + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=Kernel driver for NSS LAG manager + DEPENDS:=+@NSS_DRV_LAG_ENABLE \ + +kmod-qca-nss-drv-vlan-mgr \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv \ + +PACKAGE_kmod-bonding:kmod-bonding + FILES:=$(PKG_BUILD_DIR)/lag/qca-nss-lag-mgr.ko + AUTOLOAD:=$(call AutoLoad,51,qca-nss-lag-mgr) +endef + +define KernelPackage/qca-nss-drv-lag-mgr/description +Kernel modules for NSS LAG manager +endef + +define KernelPackage/qca-nss-drv-vxlanmgr + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + DEPENDS:=@TARGET_qualcommax +kmod-vxlan \ + +@NSS_DRV_VXLAN_ENABLE +@NSS_DRV_PVXLAN_ENABLE \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv + TITLE:=NSS VxLAN Manager for QCA NSS driver + FILES:=$(PKG_BUILD_DIR)/vxlanmgr/qca-nss-vxlanmgr.ko + AUTOLOAD:=$(call AutoLoad,51,qca-nss-vxlanmgr) +endef + +define KernelPackage/qca-nss-drv-vxlanmgr/description +Kernel module for managing NSS VxLAN +endef + +define KernelPackage/qca-nss-drv-vlan-mgr + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=Kernel driver for NSS vlan manager + DEPENDS:=@TARGET_qualcommax \ + +@NSS_DRV_VLAN_ENABLE \ + +PACKAGE_kmod-bonding:kmod-bonding \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv + FILES:=$(PKG_BUILD_DIR)/vlan/qca-nss-vlan.ko + AUTOLOAD:=$(call AutoLoad,51,qca-nss-vlan) +endef + +define KernelPackage/qca-nss-drv-vlan-mgr/Description +Kernel modules for NSS vlan manager +endef + +define KernelPackage/qca-nss-drv-igs + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Support + TITLE:=Action for offloading traffic to an IFB interface to perform ingress shaping. + DEPENDS:=@TARGET_qualcommax +@NSS_DRV_IGS_ENABLE +kmod-qca-nss-drv-qdisc \ + +kmod-sched-core +kmod-nf-conntrack +kmod-ifb \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv + FILES:=$(PKG_BUILD_DIR)/nss_qdisc/igs/act_nssmirred.ko +endef + +define KernelPackage/qca-nss-drv-igs/description +Linux action that helps in offloading traffic to an IFB interface to perform ingress shaping. +endef + +define KernelPackage/qca-nss-drv-match + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + DEPENDS:=@TARGET_qualcommax +@NSS_DRV_MATCH_ENABLE \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv + TITLE:=NSS Match for QCA NSS driver + FILES:=$(PKG_BUILD_DIR)/match/qca-nss-match.ko +endef + +define KernelPackage/qca-nss-drv-match/description +Kernel module for managing NSS Match +endef + +define KernelPackage/qca-nss-drv-mirror + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Support + TITLE:=Module for mirroring packets from NSS to host. + DEPENDS:=+@NSS_DRV_MIRROR_ENABLE \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv + FILES:=$(PKG_BUILD_DIR)/mirror/qca-nss-mirror.ko +endef + +define KernelPackage/qca-nss-drv-mirror/Description +Kernel module for managing NSS Mirror +endef + +define KernelPackage/qca-nss-drv-netlink + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + TITLE:=NSS NETLINK Manager for QCA NSS driver + DEPENDS:=@TARGET_qualcommax +@NSS_DRV_C2C_ENABLE +@NSS_DRV_GRE_REDIR_ENABLE \ + +@NSS_DRV_IPV4_REASM_ENABLE +@NSS_DRV_IPV6_ENABLE +@NSS_DRV_IPV6_REASM_ENABLE \ + +@NSS_DRV_RMNET_ENABLE +@NSS_DRV_OAM_ENABLE +@NSS_DRV_QRFS_ENABLE \ + +kmod-pppoe +kmod-qca-nss-drv-dtlsmgr \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv + FILES:=$(PKG_BUILD_DIR)/netlink/qca-nss-netlink.ko +endef + +define KernelPackage/qca-nss-drv-netlink/Description +Kernel module for NSS netlink manager +endef + +define KernelPackage/qca-nss-drv-qdisc + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Support + TITLE:=Qdisc for configuring shapers in NSS + DEPENDS:=@TARGET_qualcommax \ + +@NSS_DRV_SHAPER_ENABLE +@NSS_DRV_IGS_ENABLE \ + +PACKAGE_kmod-qca-nss-drv:kmod-qca-nss-drv + FILES:=$(PKG_BUILD_DIR)/nss_qdisc/qca-nss-qdisc.ko + KCONFIG:=CONFIG_NET_CLS_ACT=y + AUTOLOAD:=$(call AutoLoad,58,qca-nss-qdisc) +endef + +define KernelPackage/qca-nss-drv-qdisc/Description +Linux qdisc that aids in configuring shapers in the NSS +endef + +define Build/InstallDev + $(INSTALL_DIR) $(1)/usr/include/qca-nss-clients + $(CP) $(PKG_BUILD_DIR)/netlink/include/* $(1)/usr/include/qca-nss-clients/ + $(CP) $(PKG_BUILD_DIR)/exports/* $(1)/usr/include/qca-nss-clients/ +endef + +define KernelPackage/qca-nss-drv-ovpn-mgr/install + $(INSTALL_DIR) $(1)/etc/init.d + $(INSTALL_BIN) ./files/qca-nss-ovpn.init $(1)/etc/init.d/qca-nss-ovpn +endef + +define KernelPackage/qca-nss-drv-ipsecmgr/install + $(INSTALL_DIR) $(1)/etc/init.d + $(INSTALL_BIN) ./files/qca-nss-ipsec $(1)/etc/init.d/qca-nss-ipsec +endef + +define KernelPackage/qca-nss-drv-igs/install + $(INSTALL_DIR) $(1)/etc/init.d + $(INSTALL_BIN) ./files/qca-nss-mirred.init $(1)/etc/init.d/qca-nss-mirred +endef + +define KernelPackage/qca-nss-drv-netlink/install + $(INSTALL_DIR) $(1)/etc/init.d + $(INSTALL_BIN) ./files/qca-nss-netlink.init $(1)/etc/init.d/qca-nss-netlink +endef + +EXTRA_CFLAGS+= \ + -I$(STAGING_DIR)/usr/include/qca-nss-drv \ + -I$(STAGING_DIR)/usr/include/qca-nss-crypto \ + -I$(STAGING_DIR)/usr/include/qca-nss-cfi \ + -I$(STAGING_DIR)/usr/include/qca-nss-ecm \ + -I$(STAGING_DIR)/usr/include/qca-ssdk \ + -I$(STAGING_DIR)/usr/include/qca-ssdk/fal \ + -I$(STAGING_DIR)/usr/include/nat46 + +# Build individual packages if selected +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-tun6rd),) +NSS_CLIENTS_MAKE_OPTS+=tun6rd=m +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-dtlsmgr),) +NSS_CLIENTS_MAKE_OPTS+=dtlsmgr=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-tlsmgr),) +EXTRA_CFLAGS+= -I$(PKG_BUILD_DIR)/exports +NSS_CLIENTS_MAKE_OPTS+=tlsmgr=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-l2tpv2),) +NSS_CLIENTS_MAKE_OPTS+=l2tpv2=y +EXTRA_CFLAGS += -DNSS_L2TPV2_ENABLED +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-gre),) +EXTRA_CFLAGS+= -I$(PKG_BUILD_DIR)/exports +NSS_CLIENTS_MAKE_OPTS+=gre=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-pppoe),) +NSS_CLIENTS_MAKE_OPTS+=pppoe=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-bridge-mgr),) +NSS_CLIENTS_MAKE_OPTS+=bridge-mgr=y +#enable OVS bridge if ovsmgr is enabled +ifneq ($(CONFIG_PACKAGE_kmod-qca-ovsmgr),) +NSS_CLIENTS_MAKE_OPTS+= NSS_BRIDGE_MGR_OVS_ENABLE=y +EXTRA_CFLAGS+= -I$(STAGING_DIR)/usr/include/qca-ovsmgr +endif +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-ipsecmgr),) +EXTRA_CFLAGS+= -I$(PKG_BUILD_DIR)/exports \ + -I$(STAGING_DIR)/usr/include/qca-nss-ecm +NSS_CLIENTS_MAKE_OPTS+=ipsecmgr=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-vlan-mgr),) +NSS_CLIENTS_MAKE_OPTS+=vlan-mgr=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-lag-mgr),) +NSS_CLIENTS_MAKE_OPTS+=lag-mgr=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-pvxlanmgr),) +# The memset() call in nss_pvxlanmgr_get_tunnel_stats +# triggers a compilation error with GCC 13, most likely +# it is a false positive, disable the warning for now. +EXTRA_CFLAGS+= -Wno-stringop-overread +NSS_CLIENTS_MAKE_OPTS+=pvxlanmgr=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-clmapmgr),) +NSS_CLIENTS_MAKE_OPTS+=clmapmgr=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-eogremgr),) +NSS_CLIENTS_MAKE_OPTS+=eogremgr=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-vlan-mgr),) +NSS_CLIENTS_MAKE_OPTS+=vlan-mgr=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-vxlanmgr),) +NSS_CLIENTS_MAKE_OPTS+=vxlanmgr=y +EXTRA_CFLAGS += -DNSS_VXLAN_ENABLED +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-pptp),) +NSS_CLIENTS_MAKE_OPTS+=pptp=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-map-t),) +NSS_CLIENTS_MAKE_OPTS+=map-t=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-ovpn-mgr),) +NSS_CLIENTS_MAKE_OPTS+=ovpn-mgr=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-ovpn-link),) +NSS_CLIENTS_MAKE_OPTS+=ovpn-link=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-tunipip6),) +NSS_CLIENTS_MAKE_OPTS+=tunipip6=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-igs),) +NSS_CLIENTS_MAKE_OPTS+=igs=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-netlink),) +NSS_CLIENTS_MAKE_OPTS+=netlink=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-qdisc),) +NSS_CLIENTS_MAKE_OPTS+=qdisc=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-match),) +NSS_CLIENTS_MAKE_OPTS+=match=y +endif + +define Build/Compile + +$(MAKE) -C "$(LINUX_DIR)" $(strip $(NSS_CLIENTS_MAKE_OPTS)) \ + CROSS_COMPILE="$(TARGET_CROSS)" \ + ARCH="$(LINUX_KARCH)" \ + M="$(PKG_BUILD_DIR)" \ + EXTRA_CFLAGS="$(EXTRA_CFLAGS)" \ + DTLSMGR_DIR="$(DTLSMGR_DIR)" \ + IPSECMGR_DIR="$(IPSECMGR_DIR)" \ + SoC=$(SOC) \ + $(KERNEL_MAKE_FLAGS) \ + modules +endef + +$(eval $(call KernelPackage,qca-nss-drv-gre)) +$(eval $(call KernelPackage,qca-nss-drv-l2tpv2)) +$(eval $(call KernelPackage,qca-nss-drv-pptp)) +$(eval $(call KernelPackage,qca-nss-drv-pppoe)) +$(eval $(call KernelPackage,qca-nss-drv-ipsecmgr)) +$(eval $(call KernelPackage,qca-nss-drv-bridge-mgr)) +$(eval $(call KernelPackage,qca-nss-drv-clmapmgr)) +$(eval $(call KernelPackage,qca-nss-drv-eogremgr)) +$(eval $(call KernelPackage,qca-nss-drv-lag-mgr)) +$(eval $(call KernelPackage,qca-nss-drv-vlan-mgr)) +$(eval $(call KernelPackage,qca-nss-drv-vxlanmgr)) +$(eval $(call KernelPackage,qca-nss-drv-pvxlanmgr)) +$(eval $(call KernelPackage,qca-nss-drv-ovpn-mgr)) +$(eval $(call KernelPackage,qca-nss-drv-ovpn-link)) +$(eval $(call KernelPackage,qca-nss-drv-dtlsmgr)) +$(eval $(call KernelPackage,qca-nss-drv-tlsmgr)) +$(eval $(call KernelPackage,qca-nss-drv-match)) +$(eval $(call KernelPackage,qca-nss-drv-map-t)) +$(eval $(call KernelPackage,qca-nss-drv-tunipip6)) +$(eval $(call KernelPackage,qca-nss-drv-tun6rd)) +$(eval $(call KernelPackage,qca-nss-drv-qdisc)) +$(eval $(call KernelPackage,qca-nss-drv-igs)) +$(eval $(call KernelPackage,qca-nss-drv-netlink)) diff --git a/package/qca/qca-nss-clients/files/qca-nss-ipsec b/package/qca/qca-nss-clients/files/qca-nss-ipsec new file mode 100755 index 000000000..21eea7c4c --- /dev/null +++ b/package/qca/qca-nss-clients/files/qca-nss-ipsec @@ -0,0 +1,231 @@ +#!/bin/sh /etc/rc.common +# +# Copyright (c) 2018-2019, 2021 The Linux Foundation. All rights reserved. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + +NSS_IPSEC_LOG_FILE=/tmp/.nss_ipsec_log +NSS_IPSEC_LOG_STR_ECM="ECM_Loaded" +NSS_IPSEC_OL_FILE=/tmp/qca_nss_ipsec_ol + +ecm_load () { + if [ ! -d /sys/module/ecm ]; then + /etc/init.d/qca-nss-ecm start + if [ -d /sys/module/ecm ]; then + echo ${NSS_IPSEC_LOG_STR_ECM} >> ${NSS_IPSEC_LOG_FILE} + fi + fi +} + +ecm_unload () { + if [ -f /tmp/.nss_ipsec_log ]; then + str=`grep ${NSS_IPSEC_LOG_STR_ECM} ${NSS_IPSEC_LOG_FILE}` + if [[ $str == ${NSS_IPSEC_LOG_STR_ECM} ]]; then + /etc/init.d/qca-nss-ecm stop + `sed 's/${NSS_IPSEC_LOG_STR_ECM}/ /g' $NSS_IPSEC_LOG_FILE > $NSS_IPSEC_LOG_FILE` + fi + fi +} + +ecm_disable() { + if [ ! -d /sys/module/ecm ]; then + return; + fi + + echo 1 > /sys/kernel/debug/ecm/front_end_ipv4_stop + echo 1 > /sys/kernel/debug/ecm/front_end_ipv6_stop + echo 1 > /sys/kernel/debug/ecm/ecm_db/defunct_all + sleep 2 +} + +ecm_enable() { + if [ ! -d /sys/module/ecm ]; then + return; + fi + + echo 0 > /sys/kernel/debug/ecm/ecm_db/defunct_all + echo 0 > /sys/kernel/debug/ecm/front_end_ipv4_stop + echo 0 > /sys/kernel/debug/ecm/front_end_ipv6_stop +} + +kernel_version_check_5_4() { + major_ver=$(uname -r | awk -F '.' '{print $1}') + minor_ver=$(uname -r | awk -F '.' '{print $2}') + if [ $major_ver -lt 5 ] || ([ $major_ver -eq 5 ] && [ $minor_ver -lt 4 ] ); then + return 1 + else + return 0 + fi +} + +kernel_version_check_5_15() { + major_ver=$(uname -r | awk -F '.' '{print $1}') + minor_ver=$(uname -r | awk -F '.' '{print $2}') + if [ $major_ver -lt 5 ] || ([ $major_ver -eq 5 ] && [ $minor_ver -lt 15 ] ); then + return 1 + else + return 0 + fi +} + +start_klips() { + if kernel_version_check_5_4; then + echo "Kernel 5.4 doesn't support klips stack." + return $? + fi + + if kernel_version_check_5_15; then + echo "Kernel 5.15 doesn't support klips stack." + return $? + fi + + touch $NSS_IPSEC_OL_FILE + ecm_load + + local kernel_version=$(uname -r) + + insmod /lib/modules/${kernel_version}/qca-nss-ipsec-klips.ko + if [ "$?" -gt 0 ]; then + echo "Failed to load plugin. Please start ecm if not done already" + ecm_enable + rm $NSS_IPSEC_OL_FILE + return + fi + + /etc/init.d/ipsec start + sleep 2 + ipsec eroute + + ecm_enable +} + +stop_klips() { + if kernel_version_check_5_4; then + echo "Kernel 5.4 doesn't support klips stack." + return $? + fi + + if kernel_version_check_5_15; then + echo "Kernel 5.15 doesn't support klips stack." + return $? + fi + + ecm_disable + + /etc/init.d/ipsec stop + rmmod qca-nss-ipsec-klips + rm $NSS_IPSEC_OL_FILE + + ecm_unload +} + +start_xfrm() { + touch $NSS_IPSEC_OL_FILE + ecm_load + + local kernel_version=$(uname -r) + + # load all NETKEY modules first. + for mod in xfrm_ipcomp ipcomp xfrm6_tunnel ipcomp6 xfrm6_mode_tunnel xfrm6_mode_beet xfrm6_mode_ro \ + xfrm6_mode_transport xfrm4_mode_transport xfrm4_mode_tunnel \ + xfrm4_tunnel xfrm4_mode_beet esp4 esp6 ah4 ah6 af_key + do + insmod $mod 2> /dev/null + done + + # Now load the xfrm plugin + insmod /lib/modules/${kernel_version}/qca-nss-ipsec-xfrm.ko + if [ "$?" -gt 0 ]; then + echo "Failed to load plugin. Please start ecm if not done already" + ecm_enable + rm $NSS_IPSEC_OL_FILE + return + fi + + /etc/init.d/ipsec start + sleep 2 + + ecm_enable +} + +stop_xfrm() { + ecm_disable + + #Shutdown Pluto first. Then only plugin can be removed. + plutopid=/var/run/pluto/pluto.pid + if [ -f $plutopid ]; then + pid=`cat $plutopid` + if [ ! -z "$pid" ]; then + ipsec whack --shutdown | grep -v "002"; + if [ -s $plutopid ]; then + echo "Attempt to shut Pluto down failed! Trying kill:" + kill $pid; + sleep 5; + fi + fi + rm -rf $plutopid + fi + ip xfrm state flush; + ip xfrm policy flush; + sleep 2 + + #Now we can remove the plugin + retries=5 + while [ -d /sys/module/qca_nss_ipsec_xfrm ] + do + rmmod qca-nss-ipsec-xfrm + if [ "$?" -eq 0 ]; then + rm $NSS_IPSEC_OL_FILE + break + fi + + if [ ${retries} -eq 0 ]; then + echo "Failed to unload qca-nss-ipsec-xfrm plugin!" + exit + fi + + echo "XFRM plugin unload failed; retrying ${retries} times" + sleep 1 + retries=`expr ${retries} - 1` + done + + /etc/init.d/ipsec stop + ecm_unload +} + +start() { + local protostack=`uci -q get ipsec.setup.protostack` + if [ "$protostack" = "klips" ]; then + start_klips + return $? + fi + + start_xfrm + return $? +} + +stop() { + local protostack=`uci -q get ipsec.setup.protostack` + if [ "$protostack" = "klips" ]; then + stop_klips + return $? + fi + + stop_xfrm + return $? +} + +restart() { + stop + start +} diff --git a/package/qca/qca-nss-clients/files/qca-nss-mirred.init b/package/qca/qca-nss-clients/files/qca-nss-mirred.init new file mode 100644 index 000000000..259aaa090 --- /dev/null +++ b/package/qca/qca-nss-clients/files/qca-nss-mirred.init @@ -0,0 +1,28 @@ +#!/bin/sh /etc/rc.common + +########################################################################### +# Copyright (c) 2019, The Linux Foundation. All rights reserved. +# Permission to use, copy, modify, and/or distribute this software for +# any purpose with or without fee is hereby granted, provided that the +# above copyright notice and this permission notice appear in all copies. +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT +# OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +########################################################################### + +start() { + insmod act_nssmirred.ko +} + +stop() { + rmmod act_nssmirred.ko +} + +restart() { + stop + start +} diff --git a/package/qca/qca-nss-clients/files/qca-nss-netlink.init b/package/qca/qca-nss-clients/files/qca-nss-netlink.init new file mode 100644 index 000000000..8d38ad33f --- /dev/null +++ b/package/qca/qca-nss-clients/files/qca-nss-netlink.init @@ -0,0 +1,31 @@ +#!/bin/sh /etc/rc.common +# +# Copyright (c) 2023, The Linux Foundation. All rights reserved. +# +# Permission to use, copy, modify, and/or distribute this software for +# any purpose with or without fee is hereby granted, provided that the +# above copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT +# OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + +start() { + modprobe qca-nss-netlink + + echo 2048 > /proc/sys/dev/nss/n2hcfg/n2h_queue_limit_core0 + echo 2048 > /proc/sys/dev/nss/n2hcfg/n2h_queue_limit_core1 +} + +stop() { + rmmod qca-nss-netlink.ko +} + +restart() { + stop + start +} diff --git a/package/qca/qca-nss-clients/files/qca-nss-ovpn.init b/package/qca/qca-nss-clients/files/qca-nss-ovpn.init new file mode 100644 index 000000000..622e295ee --- /dev/null +++ b/package/qca/qca-nss-clients/files/qca-nss-ovpn.init @@ -0,0 +1,69 @@ +#!/bin/sh /etc/rc.common + +########################################################################### +# Copyright (c) 2019, The Linux Foundation. All rights reserved. +# Permission to use, copy, modify, and/or distribute this software for +# any purpose with or without fee is hereby granted, provided that the +# above copyright notice and this permission notice appear in all copies. +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT +# OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +########################################################################### + +ecm_disable() { + if [ ! -d /sys/module/ecm ]; then + return + fi + + echo 1 > /sys/kernel/debug/ecm/front_end_ipv4_stop + echo 1 > /sys/kernel/debug/ecm/front_end_ipv6_stop + echo 1 > /sys/kernel/debug/ecm/ecm_db/defunct_all + sleep 2 +} + +ecm_enable() { + if [ ! -d /sys/module/ecm ]; then + return + fi + + echo 0 > /sys/kernel/debug/ecm/ecm_db/defunct_all + echo 0 > /sys/kernel/debug/ecm/front_end_ipv4_stop + echo 0 > /sys/kernel/debug/ecm/front_end_ipv6_stop +} + +restart() { + ecm_disable + + /etc/init.d/openvpn stop + rmmod qca-nss-ovpn-link + rmmod qca-nss-ovpn-mgr + + insmod qca-nss-ovpn-mgr + insmod qca-nss-ovpn-link + + if [ "$?" -gt 0 ]; then + echo "Failed to load plugin. Please start ecm if not done already" + ecm_enable + return + fi + + ecm_enable +} + +start() { + restart +} + +stop() { + ecm_disable + + /etc/init.d/openvpn stop + rmmod qca-nss-ovpn-link + rmmod qca-nss-ovpn-mgr + + ecm_enable +} diff --git a/package/qca/qca-nss-clients/patches/0001-kernel-5.15-support-qdisc.patch b/package/qca/qca-nss-clients/patches/0001-kernel-5.15-support-qdisc.patch new file mode 100644 index 000000000..97479d9b9 --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0001-kernel-5.15-support-qdisc.patch @@ -0,0 +1,162 @@ +--- a/nss_qdisc/igs/nss_mirred.c ++++ b/nss_qdisc/igs/nss_mirred.c +@@ -82,20 +82,24 @@ static const struct nla_policy nss_mirre + * nss_mirred_init() + * Initialize the nss mirred action. + */ +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 0)) + static int nss_mirred_init(struct net *net, struct nlattr *nla, +- struct nlattr *est, struct tc_action *tc_act, int ovr, +- int bind) ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 0)) ++ struct nlattr *est, struct tc_action *tc_act, int ovr, ++ int bind) ++{ ++#elif (LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0)) ++ struct nlattr *est, struct tc_action **tc_act, int ovr, ++ int bind, bool rtnl_held, struct tcf_proto *tp, ++ u32 flags, struct netlink_ext_ack *extack) + { + #else +-static int nss_mirred_init(struct net *net, struct nlattr *nla, +- struct nlattr *est, struct tc_action **tc_act, int ovr, +- int bind, bool rtnl_held, struct tcf_proto *tp, +- struct netlink_ext_ack *extack) ++ struct nlattr *est, struct tc_action **tc_act, ++ struct tcf_proto *tp, u32 flags, struct netlink_ext_ack *extack) + { ++ bool bind = flags & TCA_ACT_FLAGS_BIND; ++#endif + struct tc_action_net *tn = net_generic(net, nss_mirred_net_id); + u32 index; +-#endif + struct nlattr *arr[TC_NSS_MIRRED_MAX + 1]; + struct tc_nss_mirred *parm; + struct nss_mirred_tcf *act; +@@ -239,8 +243,13 @@ static int nss_mirred_init(struct net *n + } + + if (!ret) { ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 0)) + ret = tcf_idr_create(tn, index, est, tc_act, &nss_mirred_act_ops, + bind, true); ++#else ++ ret = tcf_idr_create(tn, index, est, tc_act, &nss_mirred_act_ops, ++ bind, true, 0); ++#endif + if (ret) { + tcf_idr_cleanup(tn, index); + return ret; +--- a/nss_qdisc/nss_bf.c ++++ b/nss_qdisc/nss_bf.c +@@ -74,7 +74,7 @@ static inline struct nss_bf_class_data * + */ + #if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 16, 0)) + static int nss_bf_change_class(struct Qdisc *sch, u32 classid, u32 parentid, +- struct nlattr **tca, unsigned long *arg) ++ struct nlattr **tca, unsigned long *arg, struct netlink_ext_ack *extack) + { + struct netlink_ext_ack *extack = NULL; + #else +@@ -290,7 +290,11 @@ static void nss_bf_destroy_class(struct + * nss_bf_delete_class() + * Detaches a class from operation, but does not destroy it. + */ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 12, 0)) ++static int nss_bf_delete_class(struct Qdisc *sch, unsigned long arg, struct netlink_ext_ack *extack) ++#else + static int nss_bf_delete_class(struct Qdisc *sch, unsigned long arg) ++#endif + { + struct nss_bf_sched_data *q = qdisc_priv(sch); + struct nss_bf_class_data *cl = (struct nss_bf_class_data *)arg; +--- a/nss_qdisc/nss_htb.c ++++ b/nss_qdisc/nss_htb.c +@@ -282,7 +282,7 @@ static int nss_htb_ppe_change_class(stru + */ + #if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 16, 0)) + static int nss_htb_change_class(struct Qdisc *sch, u32 classid, u32 parentid, +- struct nlattr **tca, unsigned long *arg) ++ struct nlattr **tca, unsigned long *arg, struct netlink_ext_ack *extack) + { + struct netlink_ext_ack *extack = NULL; + #else +@@ -516,7 +516,11 @@ static void nss_htb_destroy_class(struct + * nss_htb_delete_class() + * Detaches a class from operation, but does not destroy it. + */ ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 12, 0)) ++static int nss_htb_delete_class(struct Qdisc *sch, unsigned long arg, struct netlink_ext_ack *extack) ++#else + static int nss_htb_delete_class(struct Qdisc *sch, unsigned long arg) ++#endif + { + struct nss_htb_sched_data *q = qdisc_priv(sch); + struct nss_htb_class_data *cl = (struct nss_htb_class_data *)arg; +--- a/nss_qdisc/nss_qdisc.c ++++ b/nss_qdisc/nss_qdisc.c +@@ -1140,15 +1140,16 @@ unsigned int nss_qdisc_drop(struct Qdisc + { + struct nss_qdisc *nq = qdisc_priv(sch); + unsigned int ret; ++ struct sk_buff *to_free = qdisc_peek_head(sch); + + if (!nq->is_virtual) { +- ret = __qdisc_queue_drop_head(sch, &sch->q); ++ ret = __qdisc_queue_drop_head(sch, &sch->q, &to_free); + } else { + spin_lock_bh(&nq->bounce_protection_lock); + /* + * This function is safe to call within locks + */ +- ret = __qdisc_queue_drop_head(sch, &sch->q); ++ ret = __qdisc_queue_drop_head(sch, &sch->q, &to_free); + spin_unlock_bh(&nq->bounce_protection_lock); + } + +@@ -1209,10 +1210,10 @@ static bool nss_qdisc_iterate_fl(struct + return 0; + } + +-#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 0)) +- status = tc_classify(skb, tcf, &res, false); +-#else ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 15, 0)) + status = tcf_classify(skb, tcf, &res, false); ++#else ++ status = tcf_classify(skb, NULL, tcf, &res, false); + #endif + if ((status == TC_ACT_STOLEN) || (status == TC_ACT_QUEUED)) { + return 1; +@@ -2188,6 +2189,8 @@ int __nss_qdisc_init(struct Qdisc *sch, + * This is to prevent mixing NSS and PPE qdisc with linux qdisc. + */ + if ((parent != TC_H_ROOT) && (root->ops->owner != THIS_MODULE)) { ++ nss_qdisc_warning("parent (%d) and TC_H_ROOT (%d))", parent, TC_H_ROOT); ++ nss_qdisc_warning("root->ops->owner (%px) and THIS_MODULE (%px))", root->ops->owner , THIS_MODULE); + nss_qdisc_warning("NSS qdisc %px (type %d) used along with non-nss qdiscs," + " or the interface is currently down", nq->qdisc, nq->type); + } +--- a/nss_qdisc/nss_wrr.c ++++ b/nss_qdisc/nss_wrr.c +@@ -229,7 +229,7 @@ static int nss_wrr_ppe_change_class(stru + + #if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 16, 0)) + static int nss_wrr_change_class(struct Qdisc *sch, u32 classid, u32 parentid, +- struct nlattr **tca, unsigned long *arg) ++ struct nlattr **tca, unsigned long *arg, struct netlink_ext_ack *extack) + { + struct netlink_ext_ack *extack = NULL; + #else +@@ -400,7 +400,11 @@ failure: + return -EINVAL; + } + ++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 12, 0)) ++static int nss_wrr_delete_class(struct Qdisc *sch, unsigned long arg, struct netlink_ext_ack *extack) ++#else + static int nss_wrr_delete_class(struct Qdisc *sch, unsigned long arg) ++#endif + { + struct nss_wrr_sched_data *q = qdisc_priv(sch); + struct nss_wrr_class_data *cl = (struct nss_wrr_class_data *)arg; diff --git a/package/qca/qca-nss-clients/patches/0002-kernel-5.4-support-gre.patch b/package/qca/qca-nss-clients/patches/0002-kernel-5.4-support-gre.patch new file mode 100644 index 000000000..7ed66bd45 --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0002-kernel-5.4-support-gre.patch @@ -0,0 +1,31 @@ +--- a/gre/nss_connmgr_gre_v6.c ++++ b/gre/nss_connmgr_gre_v6.c +@@ -95,7 +95,8 @@ static int nss_connmgr_gre_v6_get_mac_ad + /* + * Find src MAC address + */ +- local_dev = (struct net_device *)ipv6_dev_find(&init_net, &src_addr, 1); ++ local_dev = NULL; ++ local_dev = (struct net_device *)ipv6_dev_find(&init_net, &src_addr, local_dev); + if (!local_dev) { + nss_connmgr_gre_warning("Unable to find local dev for %pI6", src_ip); + return GRE_ERR_NO_LOCAL_NETDEV; +--- a/gre/test/nss_connmgr_gre_test.c ++++ b/gre/test/nss_connmgr_gre_test.c +@@ -229,10 +229,12 @@ static int nss_connmgr_gre_test_open_pro + /* + * Proc ops + */ +-static const struct file_operations nss_connmgr_gre_test_proc_ops = { +- .open = nss_connmgr_gre_test_open_proc, +- .write = nss_connmgr_gre_test_write_proc, +- .read = seq_read, ++static const struct proc_ops nss_connmgr_gre_test_proc_ops = { ++ .proc_open = nss_connmgr_gre_test_open_proc, ++ .proc_read = seq_read, ++ .proc_lseek = seq_lseek, ++ .proc_release = single_release, ++ .proc_write = nss_connmgr_gre_test_write_proc, + }; + + /* diff --git a/package/qca/qca-nss-clients/patches/0003-kernel-5.4-support-ipsec.patch b/package/qca/qca-nss-clients/patches/0003-kernel-5.4-support-ipsec.patch new file mode 100644 index 000000000..de43b4d01 --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0003-kernel-5.4-support-ipsec.patch @@ -0,0 +1,29 @@ +--- a/ipsecmgr/v1.0/nss_ipsecmgr.c ++++ b/ipsecmgr/v1.0/nss_ipsecmgr.c +@@ -377,7 +377,7 @@ free: + * nss_ipsecmgr_tunnel_stats() + * get tunnel statistics + */ +-static struct rtnl_link_stats64 *nss_ipsecmgr_tunnel_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats) ++void nss_ipsecmgr_tunnel_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats) + { + struct nss_ipsecmgr_priv *priv = netdev_priv(dev); + +@@ -389,8 +389,6 @@ static struct rtnl_link_stats64 *nss_ips + read_lock_bh(&ipsecmgr_ctx->lock); + memcpy(stats, &priv->stats, sizeof(struct rtnl_link_stats64)); + read_unlock_bh(&ipsecmgr_ctx->lock); +- +- return stats; + } + + /* +@@ -442,7 +440,7 @@ static void nss_ipsecmgr_tunnel_setup(st + dev->header_ops = NULL; + dev->netdev_ops = &nss_ipsecmgr_tunnel_ops; + +- dev->destructor = nss_ipsecmgr_tunnel_free; ++ dev->priv_destructor = nss_ipsecmgr_tunnel_free; + + /* + * get the MAC address from the ethernet device diff --git a/package/qca/qca-nss-clients/patches/0004-kernel-5.4-support-dtls.patch b/package/qca/qca-nss-clients/patches/0004-kernel-5.4-support-dtls.patch new file mode 100644 index 000000000..ae9c91470 --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0004-kernel-5.4-support-dtls.patch @@ -0,0 +1,11 @@ +--- a/dtls/v1.0/nss_connmgr_dtls_netdev.c ++++ b/dtls/v1.0/nss_connmgr_dtls_netdev.c +@@ -160,7 +160,7 @@ static void nss_dtlsmgr_dev_setup(struct + dev->ethtool_ops = NULL; + dev->header_ops = NULL; + dev->netdev_ops = &nss_dtlsmgr_session_ops; +- dev->destructor = NULL; ++ dev->priv_destructor = NULL; + + memcpy(dev->dev_addr, "\xaa\xbb\xcc\xdd\xee\xff", dev->addr_len); + memset(dev->broadcast, 0xff, dev->addr_len); diff --git a/package/qca/qca-nss-clients/patches/0005-vlanmgr-fix-compile-error.patch b/package/qca/qca-nss-clients/patches/0005-vlanmgr-fix-compile-error.patch new file mode 100644 index 000000000..13fb7673b --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0005-vlanmgr-fix-compile-error.patch @@ -0,0 +1,59 @@ +--- a/vlan/nss_vlan_mgr.c ++++ b/vlan/nss_vlan_mgr.c +@@ -800,8 +800,10 @@ static struct nss_vlan_pvt *nss_vlan_mgr + */ + static void nss_vlan_mgr_instance_free(struct nss_vlan_pvt *v) + { ++#ifdef NSS_VLAN_MGR_PPE_SUPPORT + int32_t i; + int ret = 0; ++#endif + + spin_lock(&vlan_mgr_ctx.lock); + BUG_ON(--v->refs); +@@ -961,8 +963,11 @@ static int nss_vlan_mgr_register_event(s + int ret; + #endif + uint32_t vlan_tag; ++#ifdef NSS_VLAN_MGR_PPE_SUPPORT + struct net_device *slave; +- int32_t port, port_if; ++ int32_t port; ++#endif ++ int32_t port_if; + struct vlan_dev_priv *vlan; + struct net_device *real_dev; + bool is_bond_master = false; +@@ -1355,8 +1360,10 @@ return_with_error: + int nss_vlan_mgr_join_bridge(struct net_device *dev, uint32_t bridge_vsi) + { + struct nss_vlan_pvt *v = nss_vlan_mgr_instance_find_and_ref(dev); ++#ifdef NSS_VLAN_MGR_PPE_SUPPORT + struct net_device *real_dev; + int ret; ++#endif + + if (!v) + return 0; +@@ -1416,8 +1423,10 @@ EXPORT_SYMBOL(nss_vlan_mgr_join_bridge); + int nss_vlan_mgr_leave_bridge(struct net_device *dev, uint32_t bridge_vsi) + { + struct nss_vlan_pvt *v = nss_vlan_mgr_instance_find_and_ref(dev); ++#ifdef NSS_VLAN_MGR_PPE_SUPPORT + struct net_device *real_dev; + int ret; ++#endif + + if (!v) + return 0; +--- a/vlan/Makefile ++++ b/vlan/Makefile +@@ -8,7 +8,7 @@ ifeq ($(SoC),$(filter $(SoC),ipq807x ipq + ccflags-y += -DNSS_VLAN_MGR_PPE_SUPPORT + endif + +-ccflags-y += -DNSS_VLAN_MGR_DEBUG_LEVEL=0 ++ccflags-y += -DNSS_VLAN_MGR_DEBUG_LEVEL=4 + ccflags-y += -Wall -Werror + + ifneq (,$(filter $(CONFIG_BONDING),y m)) diff --git a/package/qca/qca-nss-clients/patches/0006-match-fix-compile-error.patch b/package/qca/qca-nss-clients/patches/0006-match-fix-compile-error.patch new file mode 100644 index 000000000..ad3ad0b91 --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0006-match-fix-compile-error.patch @@ -0,0 +1,25 @@ +--- a/match/nss_match_priv.h ++++ b/match/nss_match_priv.h +@@ -29,19 +29,19 @@ + /* + * Statically compile messages at different levels + */ +-#if (NSS_match_DEBUG_LEVEL < 2) ++#if (NSS_MATCH_DEBUG_LEVEL < 2) + #define nss_match_warn(s, ...) + #else + #define nss_match_warn(s, ...) pr_warn("%s[%d]:" s, __FUNCTION__, __LINE__, ##__VA_ARGS__) + #endif + +-#if (NSS_match_DEBUG_LEVEL < 3) ++#if (NSS_MATCH_DEBUG_LEVEL < 3) + #define nss_match_info(s, ...) + #else + #define nss_match_info(s, ...) pr_notice("%s[%d]:" s, __FUNCTION__, __LINE__, ##__VA_ARGS__) + #endif + +-#if (NSS_match_DEBUG_LEVEL < 4) ++#if (NSS_MATCH_DEBUG_LEVEL < 4) + #define nss_match_trace(s, ...) + #else + #define nss_match_trace(s, ...) pr_info("%s[%d]:" s, __FUNCTION__, __LINE__, ##__VA_ARGS__) diff --git a/package/qca/qca-nss-clients/patches/0007-bridge-fix-compile-error.patch b/package/qca/qca-nss-clients/patches/0007-bridge-fix-compile-error.patch new file mode 100644 index 000000000..539ff6874 --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0007-bridge-fix-compile-error.patch @@ -0,0 +1,29 @@ +--- a/bridge/nss_bridge_mgr.c ++++ b/bridge/nss_bridge_mgr.c +@@ -1098,8 +1098,10 @@ int nss_bridge_mgr_register_br(struct ne + */ + b_pvt->ifnum = ifnum; + b_pvt->mtu = dev->mtu; ++#if defined(NSS_BRIDGE_MGR_PPE_SUPPORT) + b_pvt->wan_if_num = -1; + b_pvt->wan_if_enabled = false; ++#endif + ether_addr_copy(b_pvt->dev_addr, dev->dev_addr); + spin_lock(&br_mgr_ctx.lock); + list_add(&b_pvt->list, &br_mgr_ctx.list); +@@ -1165,6 +1167,7 @@ static int nss_bridge_mgr_bond_slave_cha + return NOTIFY_DONE; + } + ++#if defined(NSS_BRIDGE_MGR_PPE_SUPPORT) + /* + * Add or remove the slave based based on linking event + */ +@@ -1179,6 +1182,7 @@ static int nss_bridge_mgr_bond_slave_cha + cu_info->upper_dev->name, master->name); + } + } ++#endif + + return NOTIFY_DONE; + } diff --git a/package/qca/qca-nss-clients/patches/0008-profiler-fix-compile-error.patch b/package/qca/qca-nss-clients/patches/0008-profiler-fix-compile-error.patch new file mode 100644 index 000000000..8b6d92c05 --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0008-profiler-fix-compile-error.patch @@ -0,0 +1,61 @@ +--- a/profiler/profile.c ++++ b/profiler/profile.c +@@ -31,6 +31,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -937,12 +938,26 @@ static ssize_t debug_if(struct file *fil + return count; + } + ++#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,6,0) ++#define HAVE_PROC_OPS ++#endif ++ ++#ifdef HAVE_PROC_OPS ++static const struct proc_ops profile_fops = { ++ .proc_open = profile_open, ++ .proc_read = profile_read, ++ .proc_lseek = seq_lseek, ++ .proc_release = profile_release, ++ .proc_write = debug_if, ++}; ++#else + static const struct file_operations profile_fops = { + .open = profile_open, + .read = profile_read, + .release = profile_release, + .write = debug_if, + }; ++#endif + + /* + * showing sample status on Linux console +@@ -971,6 +986,15 @@ static ssize_t profile_rate_write(struct + return 0; + } + ++#ifdef HAVE_PROC_OPS ++static const struct proc_ops profile_rate_fops = { ++ .proc_open = profile_rate_open, ++ .proc_read = seq_read, ++ .proc_lseek = seq_lseek, ++ .proc_release = single_release, ++ .proc_write = profile_rate_write, ++}; ++#else + static const struct file_operations profile_rate_fops = { + .open = profile_rate_open, + .read = seq_read, +@@ -978,6 +1002,7 @@ static const struct file_operations prof + .release = single_release, + .write = profile_rate_write, + }; ++#endif + + /* + * hexdump diff --git a/package/qca/qca-nss-clients/patches/0009-gre-fix-compile-error.patch b/package/qca/qca-nss-clients/patches/0009-gre-fix-compile-error.patch new file mode 100644 index 000000000..e833327ed --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0009-gre-fix-compile-error.patch @@ -0,0 +1,17 @@ +--- a/gre/nss_connmgr_gre_v4.c ++++ b/gre/nss_connmgr_gre_v4.c +@@ -172,14 +172,6 @@ int nss_connmgr_gre_v4_set_config(struct + } + } + +- /* +- * IP address validate +- */ +- if ((cfg->src_ip == 0) || (cfg->dest_ip == 0)) { +- nss_connmgr_gre_warning("Source ip/Destination IP is invalid"); +- return GRE_ERR_INVALID_IP; +- } +- + memset(t, 0, sizeof(struct ip_tunnel)); + + priv->pad_len = (cfg->add_padding) ? GRE_HDR_PAD_LEN : 0; diff --git a/package/qca/qca-nss-clients/patches/0010-fix-portifmgr.patch b/package/qca/qca-nss-clients/patches/0010-fix-portifmgr.patch new file mode 100644 index 000000000..343f17b84 --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0010-fix-portifmgr.patch @@ -0,0 +1,35 @@ +--- a/portifmgr/nss_portifmgr.c ++++ b/portifmgr/nss_portifmgr.c +@@ -187,16 +187,20 @@ drop: + } + + /* +- * nss_portifmgr_get_stats() ++ * nss_portifmgr_get_stats64() + * Netdev get stats function to get port stats + */ +-static struct rtnl_link_stats64 *nss_portifmgr_get_stats(struct net_device *dev, struct rtnl_link_stats64 *stats) ++/* ++ * nss_nlgre_redir_cmn_dev_stats64 ++ * Report packet statistics to linux ++ */ ++static void nss_portifmgr_get_stats64(struct net_device *dev, ++ struct rtnl_link_stats64 *stats) + { + struct nss_portifmgr_priv *priv = (struct nss_portifmgr_priv *)netdev_priv(dev); + BUG_ON(priv == NULL); + + nss_portid_get_stats(priv->if_num, stats); +- return stats; + } + + /* +@@ -225,7 +229,7 @@ static const struct net_device_ops nss_p + .ndo_start_xmit = nss_portifmgr_start_xmit, + .ndo_set_mac_address = eth_mac_addr, + .ndo_change_mtu = nss_portifmgr_change_mtu, +- .ndo_get_stats64 = nss_portifmgr_get_stats, ++ .ndo_get_stats64 = nss_portifmgr_get_stats64, + }; + + /* diff --git a/package/qca/qca-nss-clients/patches/0011-dtlsmgr-fix-SHA-header-include-in-5.15.patch b/package/qca/qca-nss-clients/patches/0011-dtlsmgr-fix-SHA-header-include-in-5.15.patch new file mode 100644 index 000000000..a095a5370 --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0011-dtlsmgr-fix-SHA-header-include-in-5.15.patch @@ -0,0 +1,48 @@ +--- a/dtls/v2.0/nss_dtlsmgr.c ++++ b/dtls/v2.0/nss_dtlsmgr.c +@@ -38,7 +38,13 @@ + #include + #include + #include ++#include ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0) + #include ++#else ++#include ++#include ++#endif + #include + #include + +--- a/dtls/v2.0/nss_dtlsmgr_ctx.c ++++ b/dtls/v2.0/nss_dtlsmgr_ctx.c +@@ -40,7 +40,13 @@ + #include + #include + #include ++#include ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0) + #include ++#else ++#include ++#include ++#endif + #include + #include + +--- a/dtls/v2.0/nss_dtlsmgr_ctx_dev.c ++++ b/dtls/v2.0/nss_dtlsmgr_ctx_dev.c +@@ -36,7 +36,13 @@ + #include + #include + #include ++#include ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0) + #include ++#else ++#include ++#include ++#endif + + #include + #include diff --git a/package/qca/qca-nss-clients/patches/0012-dtlsmgr-fix-debug-print-in-5.15.patch b/package/qca/qca-nss-clients/patches/0012-dtlsmgr-fix-debug-print-in-5.15.patch new file mode 100644 index 000000000..89936dbdc --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0012-dtlsmgr-fix-debug-print-in-5.15.patch @@ -0,0 +1,36 @@ +--- a/dtls/v2.0/nss_dtlsmgr_private.h ++++ b/dtls/v2.0/nss_dtlsmgr_private.h +@@ -36,9 +36,9 @@ + /* + * Compile messages for dynamic enable/disable + */ +-#define nss_dtlsmgr_warn(s, ...) pr_debug("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__) +-#define nss_dtlsmgr_info(s, ...) pr_debug("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__) +-#define nss_dtlsmgr_trace(s, ...) pr_debug("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__) ++#define nss_dtlsmgr_warn(s, ...) pr_debug("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__); ++#define nss_dtlsmgr_info(s, ...) pr_debug("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__); ++#define nss_dtlsmgr_trace(s, ...) pr_debug("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__); + #else + + /* +@@ -46,17 +46,17 @@ + */ + #define nss_dtlsmgr_warn(s, ...) { \ + if (NSS_DTLSMGR_DEBUG_LEVEL > NSS_DTLSMGR_DEBUG_LEVEL_ERROR) \ +- pr_warn("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__) \ ++ pr_warn("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__); \ + } + + #define nss_dtlsmgr_info(s, ...) { \ + if (NSS_DTLSMGR_DEBUG_LEVEL > NSS_DTLSMGR_DEBUG_LEVEL_WARN) \ +- pr_notice("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__) \ ++ pr_notice("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__); \ + } + + #define nss_dtlsmgr_trace(s, ...) { \ + if (NSS_DTLSMGR_DEBUG_LEVEL > NSS_DTLSMGR_DEBUG_LEVEL_INFO) \ +- pr_info("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__) \ ++ pr_info("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__); \ + } + + #endif /* CONFIG_DYNAMIC_DEBUG */ diff --git a/package/qca/qca-nss-clients/patches/0013-tlsmgr-fix-SHA-header-include-in-5.15.patch b/package/qca/qca-nss-clients/patches/0013-tlsmgr-fix-SHA-header-include-in-5.15.patch new file mode 100644 index 000000000..f3cee731d --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0013-tlsmgr-fix-SHA-header-include-in-5.15.patch @@ -0,0 +1,32 @@ +--- a/tls/nss_tlsmgr_crypto.c ++++ b/tls/nss_tlsmgr_crypto.c +@@ -41,7 +41,13 @@ + #include + #include + #include ++#include ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0) + #include ++#else ++#include ++#include ++#endif + #include + #include + #include +--- a/tls/nss_tlsmgr_tun.c ++++ b/tls/nss_tlsmgr_tun.c +@@ -35,7 +35,13 @@ + #include + #include + #include ++#include ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0) + #include ++#else ++#include ++#include ++#endif + + #include + #include diff --git a/package/qca/qca-nss-clients/patches/0014-ovpnmgr-fix-SHA-header-include-in-5.15.patch b/package/qca/qca-nss-clients/patches/0014-ovpnmgr-fix-SHA-header-include-in-5.15.patch new file mode 100644 index 000000000..0b8cd17eb --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0014-ovpnmgr-fix-SHA-header-include-in-5.15.patch @@ -0,0 +1,32 @@ +--- a/openvpn/src/nss_ovpnmgr_crypto.c ++++ b/openvpn/src/nss_ovpnmgr_crypto.c +@@ -28,7 +28,13 @@ + #include + #include + #include ++#include ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0) + #include ++#else ++#include ++#include ++#endif + #include + + #include +--- a/openvpn/src/nss_ovpnmgr_route.c ++++ b/openvpn/src/nss_ovpnmgr_route.c +@@ -34,7 +34,13 @@ + #include + #include + #include ++#include ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0) + #include ++#else ++#include ++#include ++#endif + #include + + #include diff --git a/package/qca/qca-nss-clients/patches/0015-tunipip6-fix-compile-error-in-5.15.patch b/package/qca/qca-nss-clients/patches/0015-tunipip6-fix-compile-error-in-5.15.patch new file mode 100644 index 000000000..b9d6c2e22 --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0015-tunipip6-fix-compile-error-in-5.15.patch @@ -0,0 +1,11 @@ +--- a/tunipip6/nss_connmgr_tunipip6.c ++++ b/tunipip6/nss_connmgr_tunipip6.c +@@ -258,7 +258,7 @@ static void nss_tunipip6_decap_exception + struct iphdr *iph; + struct rtable *rt; + int cpu; +- int8_t ver = skb->data[0] >> 4; ++ __attribute__((unused)) int8_t ver = skb->data[0] >> 4; + + nss_tunipip6_trace("%px: received - %d bytes name %s ver %x\n", + dev, skb->len, dev->name, ver); diff --git a/package/qca/qca-nss-clients/patches/0016-vxlanmgr-fix-compile-error-in-5.15.patch b/package/qca/qca-nss-clients/patches/0016-vxlanmgr-fix-compile-error-in-5.15.patch new file mode 100644 index 000000000..80173f88a --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0016-vxlanmgr-fix-compile-error-in-5.15.patch @@ -0,0 +1,11 @@ +--- a/vxlanmgr/nss_vxlanmgr.c ++++ b/vxlanmgr/nss_vxlanmgr.c +@@ -84,7 +84,7 @@ int32_t nss_vxlanmgr_bind_ipsec_by_ip(un + { + int32_t ipsec_if_num; + nss_vxlanmgr_get_ipsec_if_num_by_ip_callback_t ipsec_cb; +- struct nss_ctx_instance *nss_ctx = nss_vxlan_get_ctx(); ++ __attribute__((unused)) struct nss_ctx_instance *nss_ctx = nss_vxlan_get_ctx(); + + /* + * Check if the VxLAN interface is applied over an IPsec interface by querying the IPsec. diff --git a/package/qca/qca-nss-clients/patches/0017-tlsmgr-fix-debug-print-in-5.15.patch b/package/qca/qca-nss-clients/patches/0017-tlsmgr-fix-debug-print-in-5.15.patch new file mode 100644 index 000000000..4fbdecb49 --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0017-tlsmgr-fix-debug-print-in-5.15.patch @@ -0,0 +1,34 @@ +--- a/tls/nss_tlsmgr_priv.h ++++ b/tls/nss_tlsmgr_priv.h +@@ -28,7 +28,7 @@ + #define NSS_TLSMGR_DEBUG_LEVEL_INFO 3 + #define NSS_TLSMGR_DEBUG_LEVEL_TRACE 4 + +-#define nss_tlsmgr_info_always(s, ...) pr_info("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__) ++#define nss_tlsmgr_info_always(s, ...) pr_info("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__); + + #define nss_tlsmgr_error(s, ...) do { \ + if (net_ratelimit()) { \ +@@ -43,18 +43,18 @@ + } while (0) + + #if defined(CONFIG_DYNAMIC_DEBUG) +-#define nss_tlsmgr_info(s, ...) pr_debug("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__) +-#define nss_tlsmgr_trace(s, ...) pr_debug("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__) ++#define nss_tlsmgr_info(s, ...) pr_debug("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__); ++#define nss_tlsmgr_trace(s, ...) pr_debug("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__); + #else + + #define nss_tlsmgr_info(s, ...) { \ + if (NSS_TLSMGR_DEBUG_LEVEL > NSS_TLSMGR_DEBUG_LEVEL_WARN) \ +- pr_notice("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__) \ ++ pr_notice("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__); \ + } + + #define nss_tlsmgr_trace(s, ...) { \ + if (NSS_TLSMGR_DEBUG_LEVEL > NSS_TLSMGR_DEBUG_LEVEL_INFO) \ +- pr_info("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__) \ ++ pr_info("%s[%d]:" s "\n", __func__, __LINE__, ##__VA_ARGS__); \ + } + + #endif /* CONFIG_DYNAMIC_DEBUG */ diff --git a/package/qca/qca-nss-clients/patches/0018-kernel-6.1-support.patch b/package/qca/qca-nss-clients/patches/0018-kernel-6.1-support.patch new file mode 100644 index 000000000..7606a1535 --- /dev/null +++ b/package/qca/qca-nss-clients/patches/0018-kernel-6.1-support.patch @@ -0,0 +1,301 @@ +--- a/bridge/nss_bridge_mgr.c ++++ b/bridge/nss_bridge_mgr.c +@@ -1081,7 +1081,7 @@ int nss_bridge_mgr_register_br(struct ne + } + #endif + +- err = nss_bridge_tx_set_mac_addr_msg(ifnum, dev->dev_addr); ++ err = nss_bridge_tx_set_mac_addr_msg(ifnum, (uint8_t *) dev->dev_addr); + if (err != NSS_TX_SUCCESS) { + nss_bridge_mgr_warn("%px: failed to set mac_addr msg, error = %d\n", b_pvt, err); + goto fail_4; +@@ -1242,7 +1242,7 @@ static int nss_bridge_mgr_changeaddr_eve + + nss_bridge_mgr_trace("%px: MAC changed to %pM, update NSS\n", b_pvt, dev->dev_addr); + +- if (nss_bridge_tx_set_mac_addr_msg(b_pvt->ifnum, dev->dev_addr) != NSS_TX_SUCCESS) { ++ if (nss_bridge_tx_set_mac_addr_msg(b_pvt->ifnum, (uint8_t *) dev->dev_addr) != NSS_TX_SUCCESS) { + nss_bridge_mgr_warn("%px: Failed to send change MAC address message to NSS\n", b_pvt); + return NOTIFY_DONE; + } +--- a/dtls/v2.0/nss_dtlsmgr_ctx_dev.c ++++ b/dtls/v2.0/nss_dtlsmgr_ctx_dev.c +@@ -532,7 +532,7 @@ void nss_dtlsmgr_ctx_dev_setup(struct ne + #else + dev->priv_destructor = nss_dtlsmgr_ctx_dev_free; + #endif +- memcpy(dev->dev_addr, "\xaa\xbb\xcc\xdd\xee\xff", dev->addr_len); ++ memcpy((void *) dev->dev_addr, "\xaa\xbb\xcc\xdd\xee\xff", dev->addr_len); + memset(dev->broadcast, 0xff, dev->addr_len); + memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); + } +--- a/gre/test/nss_connmgr_gre_test.c ++++ b/gre/test/nss_connmgr_gre_test.c +@@ -223,7 +223,7 @@ static int nss_connmgr_gre_test_show_pro + */ + static int nss_connmgr_gre_test_open_proc(struct inode *inode, struct file *filp) + { +- return single_open(filp, nss_connmgr_gre_test_show_proc, PDE_DATA(inode)); ++ return single_open(filp, nss_connmgr_gre_test_show_proc, pde_data(inode)); + } + + /* +--- a/gre/nss_connmgr_gre.c ++++ b/gre/nss_connmgr_gre.c +@@ -279,10 +279,10 @@ static struct rtnl_link_stats64 *nss_con + #else + start = u64_stats_fetch_begin_irq(&tstats->syncp); + #endif +- rx_packets = tstats->rx_packets; +- tx_packets = tstats->tx_packets; +- rx_bytes = tstats->rx_bytes; +- tx_bytes = tstats->tx_bytes; ++ rx_packets = u64_stats_read(&tstats->rx_packets); ++ tx_packets = u64_stats_read(&tstats->tx_packets); ++ rx_bytes = u64_stats_read(&tstats->rx_bytes); ++ tx_bytes = u64_stats_read(&tstats->tx_bytes); + #if (LINUX_VERSION_CODE < KERNEL_VERSION(3, 15, 0)) + } while (u64_stats_fetch_retry_bh(&tstats->syncp, start)); + #else +@@ -697,11 +697,11 @@ static void nss_connmgr_gre_event_receiv + tstats = this_cpu_ptr(dev->tstats); + u64_stats_update_begin(&tstats->syncp); + if (interface_type == NSS_DYNAMIC_INTERFACE_TYPE_GRE_INNER) { +- tstats->tx_packets += stats->tx_packets; +- tstats->tx_bytes += stats->tx_bytes; ++ u64_stats_add(&tstats->tx_packets, stats->tx_packets); ++ u64_stats_add(&tstats->tx_bytes, stats->tx_bytes); + } else if (interface_type == NSS_DYNAMIC_INTERFACE_TYPE_GRE_OUTER) { +- tstats->rx_packets += stats->rx_packets; +- tstats->rx_bytes += stats->rx_bytes; ++ u64_stats_add(&tstats->rx_packets, stats->rx_packets); ++ u64_stats_add(&tstats->rx_bytes, stats->rx_bytes); + } + u64_stats_update_end(&tstats->syncp); + dev->stats.rx_dropped += nss_cmn_rx_dropped_sum(stats); +--- a/tunipip6/nss_connmgr_tunipip6.c ++++ b/tunipip6/nss_connmgr_tunipip6.c +@@ -354,11 +354,11 @@ static void nss_tunipip6_update_dev_stat + + memset(&stats, 0, sizeof(stats)); + if (interface_type == NSS_DYNAMIC_INTERFACE_TYPE_TUNIPIP6_INNER) { +- stats.tx_packets = sync_stats->node_stats.tx_packets; +- stats.tx_bytes = sync_stats->node_stats.tx_bytes; ++ u64_stats_set(&stats.tx_packets, sync_stats->node_stats.tx_packets); ++ u64_stats_set(&stats.tx_bytes, sync_stats->node_stats.tx_bytes); + } else if (interface_type == NSS_DYNAMIC_INTERFACE_TYPE_TUNIPIP6_OUTER) { +- stats.rx_packets = sync_stats->node_stats.rx_packets; +- stats.rx_bytes = sync_stats->node_stats.rx_bytes; ++ u64_stats_set(&stats.rx_packets, sync_stats->node_stats.rx_packets); ++ u64_stats_set(&stats.rx_bytes, sync_stats->node_stats.rx_bytes); + } else { + nss_tunipip6_warning("%px: Invalid interface type received from NSS\n", dev); + return; +--- a/nss_qdisc/igs/nss_mirred.c ++++ b/nss_qdisc/igs/nss_mirred.c +@@ -317,7 +317,7 @@ static int nss_mirred_act(struct sk_buff + * Update the last use of action. + */ + tcf_lastuse_update(&act->tcf_tm); +- bstats_cpu_update(this_cpu_ptr(act->common.cpu_bstats), skb); ++ bstats_update(this_cpu_ptr(act->common.cpu_bstats), skb); + + rcu_read_lock(); + retval = READ_ONCE(act->tcf_action); +--- a/nss_qdisc/nss_qdisc.h ++++ b/nss_qdisc/nss_qdisc.h +@@ -217,7 +217,7 @@ struct nss_qdisc { + /* Shaper configure callback for reading shaper specific + * responses (e.g. memory size). + */ +- struct gnet_stats_basic_packed bstats; /* Basic class statistics */ ++ struct gnet_stats_basic_sync bstats; /* Basic class statistics */ + struct gnet_stats_queue qstats; /* Qstats for use by classes */ + #if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0)) + atomic_t refcnt; /* Reference count for class use */ +@@ -464,7 +464,7 @@ extern int nss_qdisc_init(struct Qdisc * + * Wrapper around gnet_stats_copy_basic() + */ + extern int nss_qdisc_gnet_stats_copy_basic(struct Qdisc *sch, +- struct gnet_dump *d, struct gnet_stats_basic_packed *b); ++ struct gnet_dump *d, struct gnet_stats_basic_sync *b); + + /* + * nss_qdisc_gnet_stats_copy_queue() +--- a/nss_qdisc/igs/nss_ifb.c ++++ b/nss_qdisc/igs/nss_ifb.c +@@ -544,8 +544,10 @@ static void nss_ifb_update_dev_stats(str + * post shaping. Therefore IFB interface's stats should be updated + * with NSS firmware's IFB TX stats only. + */ +- stats.rx_packets = stats.tx_packets = node_stats->tx_packets; +- stats.rx_bytes = stats.tx_bytes = node_stats->tx_bytes; ++ u64_stats_set(&stats.rx_packets, node_stats->tx_packets); ++ u64_stats_set(&stats.tx_packets, node_stats->tx_packets); ++ u64_stats_set(&stats.rx_bytes, node_stats->tx_bytes); ++ u64_stats_set(&stats.tx_bytes, node_stats->tx_bytes); + dev->stats.rx_dropped = dev->stats.tx_dropped += sync_stats->igs_stats.tx_dropped; + u64_stats_update_end(&stats.syncp); + +--- a/nss_qdisc/nss_qdisc.c ++++ b/nss_qdisc/nss_qdisc.c +@@ -2608,12 +2608,14 @@ int nss_qdisc_init(struct Qdisc *sch, st + * Wrapper around gnet_stats_copy_basic() + */ + int nss_qdisc_gnet_stats_copy_basic(struct Qdisc *sch, struct gnet_dump *d, +- struct gnet_stats_basic_packed *b) ++ struct gnet_stats_basic_sync *b) + { + #if (LINUX_VERSION_CODE <= KERNEL_VERSION(3, 18, 0)) + return gnet_stats_copy_basic(d, b); + #elif (LINUX_VERSION_CODE < KERNEL_VERSION(4, 8, 0)) + return gnet_stats_copy_basic(d, NULL, b); ++#elif (LINUX_VERSION_CODE >= KERNEL_VERSION(5, 16, 0)) ++ return gnet_stats_copy_basic(d, NULL, b, true); + #else + return gnet_stats_copy_basic(qdisc_root_sleeping_running(sch), d, NULL, b); + #endif +--- a/nss_qdisc/nss_qdisc_stats.c ++++ b/nss_qdisc/nss_qdisc_stats.c +@@ -160,7 +160,7 @@ static void nss_qdisc_stats_process_node + { + struct Qdisc *qdisc; + struct nss_qdisc *nq; +- struct gnet_stats_basic_packed *bstats; ++ struct gnet_stats_basic_sync *bstats; + struct gnet_stats_queue *qstats; + uint32_t qos_tag = response->qos_tag; + #if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 13, 0)) +@@ -214,8 +214,8 @@ static void nss_qdisc_stats_process_node + * Update qdisc->bstats + */ + spin_lock_bh(&nq->lock); +- bstats->bytes += (__u64)response->sn_stats.delta.dequeued_bytes; +- bstats->packets += response->sn_stats.delta.dequeued_packets; ++ u64_stats_add(&bstats->bytes, (__u64)response->sn_stats.delta.dequeued_bytes); ++ u64_stats_add(&bstats->packets, response->sn_stats.delta.dequeued_packets); + + /* + * Update qdisc->qstats +--- a/vlan/nss_vlan_mgr.c ++++ b/vlan/nss_vlan_mgr.c +@@ -787,7 +787,7 @@ static struct nss_vlan_pvt *nss_vlan_mgr + } + + v->mtu = dev->mtu; +- ether_addr_copy(v->dev_addr, dev->dev_addr); ++ ether_addr_copy(v->dev_addr, (uint8_t *) dev->dev_addr); + v->ifindex = dev->ifindex; + v->refs = 1; + +@@ -936,14 +936,14 @@ static int nss_vlan_mgr_changeaddr_event + } + spin_unlock(&vlan_mgr_ctx.lock); + +- if (nss_vlan_tx_set_mac_addr_msg(v_pvt->nss_if, dev->dev_addr) != NSS_TX_SUCCESS) { ++ if (nss_vlan_tx_set_mac_addr_msg(v_pvt->nss_if, (uint8_t *) dev->dev_addr) != NSS_TX_SUCCESS) { + nss_vlan_mgr_warn("%s: Failed to send change MAC address message to NSS\n", dev->name); + nss_vlan_mgr_instance_deref(v_pvt); + return NOTIFY_BAD; + } + + spin_lock(&vlan_mgr_ctx.lock); +- ether_addr_copy(v_pvt->dev_addr, dev->dev_addr); ++ ether_addr_copy(v_pvt->dev_addr, (uint8_t *) dev->dev_addr); + spin_unlock(&vlan_mgr_ctx.lock); + nss_vlan_mgr_trace("%s: MAC changed to %pM, updated NSS\n", dev->name, dev->dev_addr); + nss_vlan_mgr_instance_deref(v_pvt); +--- a/vxlanmgr/nss_vxlanmgr_tunnel.c ++++ b/vxlanmgr/nss_vxlanmgr_tunnel.c +@@ -489,8 +489,8 @@ static void nss_vxlanmgr_tunnel_inner_st + + tstats = this_cpu_ptr(dev->tstats); + u64_stats_update_begin(&tstats->syncp); +- tstats->tx_packets += stats->node_stats.tx_packets; +- tstats->tx_bytes += stats->node_stats.tx_bytes; ++ u64_stats_add(&tstats->tx_packets, stats->node_stats.tx_packets); ++ u64_stats_add(&tstats->tx_bytes, stats->node_stats.tx_bytes); + u64_stats_update_end(&tstats->syncp); + netdev_stats->tx_dropped += dropped; + } +@@ -526,8 +526,8 @@ static void nss_vxlanmgr_tunnel_outer_st + + tstats = this_cpu_ptr(dev->tstats); + u64_stats_update_begin(&tstats->syncp); +- tstats->rx_packets += stats->node_stats.tx_packets; +- tstats->rx_bytes += stats->node_stats.tx_bytes; ++ u64_stats_add(&tstats->rx_packets, stats->node_stats.tx_packets); ++ u64_stats_add(&tstats->rx_bytes, stats->node_stats.tx_bytes); + u64_stats_update_end(&tstats->syncp); + netdev_stats->rx_dropped += dropped; + dev_put(dev); +--- a/pvxlanmgr/nss_pvxlanmgr.c ++++ b/pvxlanmgr/nss_pvxlanmgr.c +@@ -177,7 +177,7 @@ static struct rtnl_link_stats64 *nss_pvx + * Netdev seems to be incrementing rx_dropped because we don't give IP header. + * So reset it as it's of no use for us. + */ +- atomic_long_set(&dev->rx_dropped, 0); ++ atomic_long_set(&(dev)->stats.__rx_dropped, 0); + priv = netdev_priv(dev); + memset(stats, 0, sizeof(struct rtnl_link_stats64)); + memcpy(stats, &priv->stats, sizeof(struct rtnl_link_stats64)); +@@ -305,7 +305,7 @@ static void nss_pvxlanmgr_dummy_netdev_s + dev->priv_destructor = NULL; + #endif + +- memcpy(dev->dev_addr, "\x00\x00\x00\x00\x00\x00", dev->addr_len); ++ memcpy((void *) dev->dev_addr, "\x00\x00\x00\x00\x00\x00", dev->addr_len); + memset(dev->broadcast, 0xff, dev->addr_len); + memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); + } +--- a/clmapmgr/nss_clmapmgr.c ++++ b/clmapmgr/nss_clmapmgr.c +@@ -103,7 +103,7 @@ static struct rtnl_link_stats64 *nss_clm + * Netdev seems to be incrementing rx_dropped because we don't give IP header. + * So reset it as it's of no use for us. + */ +- atomic_long_set(&dev->rx_dropped, 0); ++ atomic_long_set(&(dev)->stats.__rx_dropped, 0); + priv = netdev_priv(dev); + memset(stats, 0, sizeof(struct rtnl_link_stats64)); + memcpy(stats, &priv->stats, sizeof(struct rtnl_link_stats64)); +--- a/tls/nss_tlsmgr_tun.c ++++ b/tls/nss_tlsmgr_tun.c +@@ -185,7 +185,7 @@ static void nss_tlsmgr_tun_setup(struct + /* + * Get the MAC address from the ethernet device + */ +- random_ether_addr(dev->dev_addr); ++ eth_random_addr((u8 *) dev->dev_addr); + + memset(dev->broadcast, 0xff, dev->addr_len); + memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len); +--- a/netlink/nss_nlgre_redir_cmn.c ++++ b/netlink/nss_nlgre_redir_cmn.c +@@ -384,7 +384,7 @@ static int nss_nlgre_redir_cmn_set_mac_a + return -EINVAL; + } + +- memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); ++ memcpy((void *) dev->dev_addr, addr->sa_data, ETH_ALEN); + return 0; + } + +--- a/nss_connmgr_tun6rd.c ++++ b/nss_connmgr_tun6rd.c +@@ -101,10 +101,10 @@ static void nss_tun6rd_update_dev_stats( + + u64_stats_init(&stats.syncp); + u64_stats_update_begin(&stats.syncp); +- stats.rx_packets = sync_stats->node_stats.rx_packets; +- stats.rx_bytes = sync_stats->node_stats.rx_bytes; +- stats.tx_packets = sync_stats->node_stats.tx_packets; +- stats.tx_bytes = sync_stats->node_stats.tx_bytes; ++ u64_stats_set(&stats.rx_packets, sync_stats->node_stats.rx_packets); ++ u64_stats_set(&stats.rx_bytes, sync_stats->node_stats.rx_bytes); ++ u64_stats_set(&stats.tx_packets, sync_stats->node_stats.tx_packets); ++ u64_stats_set(&stats.tx_bytes, sync_stats->node_stats.tx_bytes); + u64_stats_update_end(&stats.syncp); + #else + struct nss_tun6rd_stats stats; diff --git a/package/qca/qca-nss-crypto/Makefile b/package/qca/qca-nss-crypto/Makefile new file mode 100644 index 000000000..c0d2dc4bb --- /dev/null +++ b/package/qca/qca-nss-crypto/Makefile @@ -0,0 +1,68 @@ +include $(TOPDIR)/rules.mk + +PKG_NAME:=qca-nss-crypto +PKG_RELEASE:=1 + +PKG_SOURCE_PROTO:=git +PKG_SOURCE_DATE:=2022-12-15 +PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/nss-crypto.git +PKG_SOURCE_VERSION:=3c5a574ce99d7f0b9f892002020f1bf9bfc57a81 +PKG_MIRROR_HASH:=ff487c5574481f548eef7b61129fa7be1d83ae285dcc3356a06be237440d8782 + +PKG_BUILD_PARALLEL:=1 + +include $(INCLUDE_DIR)/kernel.mk +include $(INCLUDE_DIR)/package.mk + +# v1.0 is for Akronite +# v2.0 is for Hawkeye/Cypress/Maple +ifneq (, $(findstring $(CONFIG_TARGET_SUBTARGET), "ipq807x" "ipq60xx")) +NSS_CRYPTO_DIR:=v2.0 +else +NSS_CRYPTO_DIR:=v1.0 +endif + +define KernelPackage/qca-nss-crypto + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Cryptographic API modules + DEPENDS:=@TARGET_qualcommax +kmod-qca-nss-drv + TITLE:=Kernel driver for NSS crypto driver + FILES:=$(PKG_BUILD_DIR)/$(NSS_CRYPTO_DIR)/src/qca-nss-crypto.ko \ + $(PKG_BUILD_DIR)/$(NSS_CRYPTO_DIR)/tool/qca-nss-crypto-tool.ko + AUTOLOAD:=$(call AutoProbe,qca-nss-crypto) +endef + +define KernelPackage/qca-nss-crypto/Description +This package contains a NSS crypto driver for QCA chipset +endef + +define Build/InstallDev + $(INSTALL_DIR) $(1)/usr/include/qca-nss-crypto + $(CP) $(PKG_BUILD_DIR)/$(NSS_CRYPTO_DIR)/include/* $(1)/usr/include/qca-nss-crypto +endef + +EXTRA_CFLAGS+= \ + -DCONFIG_NSS_DEBUG_LEVEL=4 \ + -I$(STAGING_DIR)/usr/include/qca-nss-crypto \ + -I$(STAGING_DIR)/usr/include/qca-nss-drv \ + -I$(PKG_BUILD_DIR)/$(NSS_CRYPTO_DIR)/include \ + -I$(PKG_BUILD_DIR)/$(NSS_CRYPTO_DIR)/src + +ifeq ($(CONFIG_TARGET_BOARD), "qualcommax") + SOC:=$(CONFIG_TARGET_SUBTARGET) +endif + +define Build/Compile + +$(MAKE) -C "$(LINUX_DIR)" \ + CC="$(TARGET_CC)" \ + $(KERNEL_MAKE_FLAGS) \ + M="$(PKG_BUILD_DIR)" \ + EXTRA_CFLAGS="$(EXTRA_CFLAGS)" \ + NSS_CRYPTO_DIR=$(NSS_CRYPTO_DIR) \ + SoC=$(SOC) \ + $(PKG_JOBS) \ + modules +endef + +$(eval $(call KernelPackage,qca-nss-crypto)) diff --git a/package/qca/qca-nss-crypto/patches/0001-nss-crypto-fix-SHA1-header-include.patch b/package/qca/qca-nss-crypto/patches/0001-nss-crypto-fix-SHA1-header-include.patch new file mode 100644 index 000000000..c9849a2e8 --- /dev/null +++ b/package/qca/qca-nss-crypto/patches/0001-nss-crypto-fix-SHA1-header-include.patch @@ -0,0 +1,27 @@ +From 0c6c593783f2d64a429ad38523661a915aa462fc Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Sun, 13 Mar 2022 13:44:47 +0100 +Subject: [PATCH 1/3] nss-crypto: fix SHA1 header include + +SHA1 header has been merged to the generic SHA one, +and with that the cryptohash.h was dropped. + +So, fix include in kernels 5.8 and newer. + +Signed-off-by: Robert Marko +--- + v2.0/src/nss_crypto_hlos.h | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/v2.0/src/nss_crypto_hlos.h ++++ b/v2.0/src/nss_crypto_hlos.h +@@ -55,7 +55,9 @@ + #include + #include + #include ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 8, 0) + #include ++#endif + #include + #include + #include diff --git a/package/qca/qca-nss-crypto/patches/0002-nss-crypto-replace-ioremap_nocache-with-ioremap.patch b/package/qca/qca-nss-crypto/patches/0002-nss-crypto-replace-ioremap_nocache-with-ioremap.patch new file mode 100644 index 000000000..19454c457 --- /dev/null +++ b/package/qca/qca-nss-crypto/patches/0002-nss-crypto-replace-ioremap_nocache-with-ioremap.patch @@ -0,0 +1,94 @@ +From 8baa8e747247403c6f814ea5dc3e463c70e0415f Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Tue, 8 Jun 2021 22:14:34 +0200 +Subject: [PATCH 2/3] nss-crypto: replace ioremap_nocache() with ioremap + +ioremap_nocache() was dropped in kernel 5.5 as regular +ioremap() was exactly the same. + +So, simply replace all of the ioremap_nocache() calls +with ioremap(). + +Signed-off-by: Robert Marko +--- + v1.0/src/nss_crypto_dtsi.c | 4 ++-- + v1.0/src/nss_crypto_platform.c | 4 ++-- + v2.0/src/hal/ipq50xx/nss_crypto_ce5.c | 4 ++-- + v2.0/src/hal/ipq60xx/nss_crypto_eip197.c | 2 +- + v2.0/src/hal/ipq807x/nss_crypto_eip197.c | 2 +- + 5 files changed, 8 insertions(+), 8 deletions(-) + +--- a/v1.0/src/nss_crypto_dtsi.c ++++ b/v1.0/src/nss_crypto_dtsi.c +@@ -311,11 +311,11 @@ static int nss_crypto_probe(struct platf + e_ctrl->dev = &pdev->dev; + + e_ctrl->cmd_base = crypto_res.start; +- e_ctrl->crypto_base = ioremap_nocache(e_ctrl->cmd_base, resource_size(&crypto_res)); ++ e_ctrl->crypto_base = ioremap(e_ctrl->cmd_base, resource_size(&crypto_res)); + nss_crypto_assert(e_ctrl->crypto_base); + + e_ctrl->bam_pbase = bam_res.start; +- e_ctrl->bam_base = ioremap_nocache(e_ctrl->bam_pbase, resource_size(&bam_res)); ++ e_ctrl->bam_base = ioremap(e_ctrl->bam_pbase, resource_size(&bam_res)); + nss_crypto_assert(e_ctrl->bam_base); + + e_ctrl->bam_ee = bam_ee; +--- a/v1.0/src/nss_crypto_platform.c ++++ b/v1.0/src/nss_crypto_platform.c +@@ -134,11 +134,11 @@ static int nss_crypto_probe(struct platf + e_ctrl->bam_ee = res->bam_ee; + + e_ctrl->cmd_base = res->crypto_pbase; +- e_ctrl->crypto_base = ioremap_nocache(res->crypto_pbase, res->crypto_pbase_sz); ++ e_ctrl->crypto_base = ioremap(res->crypto_pbase, res->crypto_pbase_sz); + nss_crypto_assert(e_ctrl->crypto_base); + + e_ctrl->bam_pbase = res->bam_pbase; +- e_ctrl->bam_base = ioremap_nocache(res->bam_pbase, res->bam_pbase_sz); ++ e_ctrl->bam_base = ioremap(res->bam_pbase, res->bam_pbase_sz); + nss_crypto_assert(e_ctrl->bam_base); + + /* +--- a/v2.0/src/hal/ipq50xx/nss_crypto_ce5.c ++++ b/v2.0/src/hal/ipq50xx/nss_crypto_ce5.c +@@ -288,7 +288,7 @@ int nss_crypto_ce5_engine_init(struct pl + * remap the I/O addresses for crypto + */ + eng->crypto_paddr = crypto_res->start; +- eng->crypto_vaddr = ioremap_nocache(crypto_res->start, resource_size(crypto_res)); ++ eng->crypto_vaddr = ioremap(crypto_res->start, resource_size(crypto_res)); + if (!eng->crypto_vaddr) { + nss_crypto_warn("%px: unable to remap crypto_addr(0x%px)\n", node, (void *)eng->crypto_paddr); + nss_crypto_engine_free(eng); +@@ -299,7 +299,7 @@ int nss_crypto_ce5_engine_init(struct pl + * remap the I/O addresses for bam + */ + eng->dma_paddr = bam_res->start; +- eng->dma_vaddr = ioremap_nocache(bam_res->start, resource_size(bam_res)); ++ eng->dma_vaddr = ioremap(bam_res->start, resource_size(bam_res)); + if (!eng->dma_vaddr) { + iounmap(eng->crypto_vaddr); + nss_crypto_warn("%px: unable to remap dma_addr(0x%px)\n", node, (void *)eng->dma_paddr); +--- a/v2.0/src/hal/ipq60xx/nss_crypto_eip197.c ++++ b/v2.0/src/hal/ipq60xx/nss_crypto_eip197.c +@@ -490,7 +490,7 @@ int nss_crypto_eip197_engine_init(struct + * remap the I/O addresses + */ + paddr = res->start + offset; +- vaddr = ioremap_nocache(paddr, resource_size(res)); ++ vaddr = ioremap(paddr, resource_size(res)); + if (!vaddr) { + nss_crypto_warn("%px: unable to remap crypto_addr(0x%px)\n", node, (void *)paddr); + return -EIO; +--- a/v2.0/src/hal/ipq807x/nss_crypto_eip197.c ++++ b/v2.0/src/hal/ipq807x/nss_crypto_eip197.c +@@ -490,7 +490,7 @@ int nss_crypto_eip197_engine_init(struct + * remap the I/O addresses + */ + paddr = res->start + offset; +- vaddr = ioremap_nocache(paddr, resource_size(res)); ++ vaddr = ioremap(paddr, resource_size(res)); + if (!vaddr) { + nss_crypto_warn("%px: unable to remap crypto_addr(0x%px)\n", node, (void *)paddr); + return -EIO; diff --git a/package/qca/qca-nss-crypto/patches/0003-nss-crypto-fix-SHA-header-include-in-5.15.patch b/package/qca/qca-nss-crypto/patches/0003-nss-crypto-fix-SHA-header-include-in-5.15.patch new file mode 100644 index 000000000..61df791fd --- /dev/null +++ b/package/qca/qca-nss-crypto/patches/0003-nss-crypto-fix-SHA-header-include-in-5.15.patch @@ -0,0 +1,44 @@ +From 96da3ca01ac172e5d858209b3d3d9aefad04423c Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Sun, 13 Mar 2022 13:47:24 +0100 +Subject: [PATCH 3/3] nss-crypto: fix SHA header include in 5.15 + +SHA header was split into SHA-1 and SHA-2 headers in kernel 5.11, so +fix the include for newer kernels. + +Signed-off-by: Robert Marko +--- + v2.0/src/nss_crypto_ctrl.c | 6 ++++++ + v2.0/src/nss_crypto_hlos.h | 4 ++++ + 2 files changed, 10 insertions(+) + +--- a/v2.0/src/nss_crypto_ctrl.c ++++ b/v2.0/src/nss_crypto_ctrl.c +@@ -38,7 +38,13 @@ + #include + #include + #include ++#include ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0) + #include ++#else ++#include ++#include ++#endif + #include + #include + #include +--- a/v2.0/src/nss_crypto_hlos.h ++++ b/v2.0/src/nss_crypto_hlos.h +@@ -58,7 +58,11 @@ + #if LINUX_VERSION_CODE < KERNEL_VERSION(5, 8, 0) + #include + #endif ++#if LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0) + #include ++#else ++#include ++#endif + #include + #include + #include diff --git a/package/qca/qca-nss-drv/Config.in b/package/qca/qca-nss-drv/Config.in new file mode 100644 index 000000000..c1bd4760a --- /dev/null +++ b/package/qca/qca-nss-drv/Config.in @@ -0,0 +1,184 @@ +menu "Configuration" + depends on PACKAGE_kmod-qca-nss-drv + +comment "Build Options" + +config NSS_DRV_BRIDGE_ENABLE + bool + default n + prompt "Enable BRIDGE" +config NSS_DRV_C2C_ENABLE + bool + default n + prompt "Enable C2C" +config NSS_DRV_CLMAP_ENABLE + bool + default n + prompt "Enable CLMAP" +config NSS_DRV_CRYPTO_ENABLE + bool + default y + prompt "Enable CRYPTO" +config NSS_DRV_DTLS_ENABLE + bool + default n + prompt "Enable DTLS" +config NSS_DRV_EDMA_ENABLE + bool + default n + prompt "Enable EDMA" +config NSS_DRV_GRE_ENABLE + bool + default n + prompt "Enable GRE" +config NSS_DRV_GRE_REDIR_ENABLE + bool + default n + depends on NSS_DRV_GRE_ENABLE + prompt "Enable GRE_REDIR" +config NSS_DRV_GRE_TUNNEL_ENABLE + bool + default n + depends on NSS_DRV_GRE_ENABLE + prompt "Enable GRE_TUNNEL" +config NSS_DRV_IGS_ENABLE + bool + default n + prompt "Enable IGS" +config NSS_DRV_IPSEC_ENABLE + bool + default n + prompt "Enable IPSEC" +config NSS_DRV_IPV4_REASM_ENABLE + bool + default n + prompt "Enable IPV4_REASM" +config NSS_DRV_IPV6_ENABLE + bool + default n + prompt "Enable IPV6" +config NSS_DRV_IPV6_REASM_ENABLE + bool + default n + depends on NSS_DRV_IPV6_ENABLE + prompt "Enable IPV6_REASM" +config NSS_DRV_L2TP_ENABLE + bool + default n + prompt "Enable L2TP" +config NSS_DRV_LAG_ENABLE + bool + default n + prompt "Enable LAG" +config NSS_DRV_MAPT_ENABLE + bool + default n + prompt "Enable MAPT" +config NSS_DRV_MATCH_ENABLE + bool + default n + prompt "Enable MATCH" +config NSS_DRV_MIRROR_ENABLE + bool + default n + prompt "Enable MIRROR" +config NSS_DRV_OAM_ENABLE + bool + default n + prompt "Enable OAM" +config NSS_DRV_PORTID_ENABLE + bool + default n + prompt "Enable PORTID" +config NSS_DRV_PPE_ENABLE + bool + default n + prompt "Enable PPE" +config NSS_DRV_PPPOE_ENABLE + bool + default n + prompt "Enable PPPOE" +config NSS_DRV_PPTP_ENABLE + bool + default y + prompt "Enable PPTP" +config NSS_DRV_PVXLAN_ENABLE + bool + default n + prompt "Enable PVXLAN" +config NSS_DRV_QRFS_ENABLE + bool + default n + prompt "Enable QRFS" +config NSS_DRV_QVPN_ENABLE + bool + default n + prompt "Enable QVPN" +config NSS_DRV_OVPN_ENABLE + bool + default n + prompt "Enable OVPN" +config NSS_DRV_RMNET_ENABLE + bool + default n + prompt "Enable RMNET" +config NSS_DRV_SHAPER_ENABLE + bool + default n + prompt "Enable SHAPER" +config NSS_DRV_SJACK_ENABLE + bool + default n + prompt "Enable SJACK" +config NSS_DRV_TLS_ENABLE + bool + default n + prompt "Enable TLS" +config NSS_DRV_TRUSTSEC_ENABLE + bool + default n + prompt "Enable TRUSTSEC" +config NSS_DRV_TRUSTSEC_RX_ENABLE + bool + default n + prompt "Enable TRUSTSEC_RX" + depends on NSS_DRV_TRUSTSEC_ENABLE +config NSS_DRV_TSTAMP_ENABLE + bool + default n + prompt "Enable TSTAMP" +config NSS_DRV_TUN6RD_ENABLE + bool + default n + prompt "Enable TUN6RD" +config NSS_DRV_TUNIPIP6_ENABLE + bool + default n + prompt "Enable TUNIPIP6" +config NSS_DRV_VIRT_IF_ENABLE + bool + default y + prompt "Enable VIRT_IF" +config NSS_DRV_VLAN_ENABLE + bool + default n + prompt "Enable VLAN" +config NSS_DRV_VXLAN_ENABLE + bool + default n + prompt "Enable VXLAN" +config NSS_DRV_WIFI_ENABLE + bool + default n + prompt "Enable WIFI" +config NSS_DRV_WIFI_EXT_VDEV_ENABLE + bool + default n + depends on NSS_DRV_WIFI_ENABLE + prompt "Enable WIFI EXT VDEV" +config NSS_DRV_WIFI_MESH_ENABLE + bool + default n + depends on NSS_DRV_WIFI_ENABLE + prompt "Enable WIFI MESH" +endmenu diff --git a/package/qca/qca-nss-drv/Makefile b/package/qca/qca-nss-drv/Makefile new file mode 100644 index 000000000..f7ef833f9 --- /dev/null +++ b/package/qca/qca-nss-drv/Makefile @@ -0,0 +1,275 @@ +include $(TOPDIR)/rules.mk + +PKG_NAME:=qca-nss-drv +PKG_RELEASE:=1 + +PKG_SOURCE_PROTO:=git +PKG_SOURCE_DATE:=2023-08-06 +PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/nss-drv.git +PKG_SOURCE_VERSION:=1ab184034529539f61093184a67d4454cb3eb352 +PKG_MIRROR_HASH:=6aa081c0853d3e3b6d78eee588a0967e540b2317d15aef3c3f6f7129925653f7 + +PKG_BUILD_PARALLEL:=1 +PKG_FLAGS:=nonshared + +PKG_CONFIG_DEPENDS:= \ + CONFIG_NSS_DRV_BRIDGE_ENABLE \ + CONFIG_NSS_DRV_C2C_ENABLE \ + CONFIG_NSS_DRV_CLMAP_ENABLE \ + CONFIG_NSS_DRV_CRYPTO_ENABLE \ + CONFIG_NSS_DRV_DMA_ENABLE \ + CONFIG_NSS_DRV_DTLS_ENABLE \ + CONFIG_NSS_DRV_EDMA_ENABLE \ + CONFIG_NSS_DRV_GRE_ENABLE \ + CONFIG_NSS_DRV_GRE_REDIR_ENABLE \ + CONFIG_NSS_DRV_GRE_TUNNEL_ENABLE \ + CONFIG_NSS_DRV_IGS_ENABLE \ + CONFIG_NSS_DRV_IPSEC_ENABLE \ + CONFIG_NSS_DRV_IPV4_REASM_ENABLE \ + CONFIG_NSS_DRV_IPV6_ENABLE \ + CONFIG_NSS_DRV_IPV6_REASM_ENABLE \ + CONFIG_NSS_DRV_L2TP_ENABLE \ + CONFIG_NSS_DRV_LAG_ENABLE \ + CONFIG_NSS_DRV_MAPT_ENABLE \ + CONFIG_NSS_DRV_MATCH_ENABLE \ + CONFIG_NSS_DRV_MIRROR_ENABLE \ + CONFIG_NSS_DRV_OAM_ENABLE \ + CONFIG_NSS_DRV_PORTID_ENABLE \ + CONFIG_NSS_DRV_PPE_ENABLE \ + CONFIG_NSS_DRV_PPPOE_ENABLE \ + CONFIG_NSS_DRV_PPTP_ENABLE \ + CONFIG_NSS_DRV_PVXLAN_ENABLE \ + CONFIG_NSS_DRV_QRFS_ENABLE \ + CONFIG_NSS_DRV_QVPN_ENABLE \ + CONFIG_NSS_DRV_OVPN_ENABLE \ + CONFIG_NSS_DRV_RMNET_ENABLE \ + CONFIG_NSS_DRV_SHAPER_ENABLE \ + CONFIG_NSS_DRV_SJACK_ENABLE \ + CONFIG_NSS_DRV_TLS_ENABLE \ + CONFIG_NSS_DRV_TRUSTSEC_ENABLE \ + CONFIG_NSS_DRV_TRUSTSEC_RX_ENABLE \ + CONFIG_NSS_DRV_TSTAMP_ENABLE \ + CONFIG_NSS_DRV_TUN6RD_ENABLE \ + CONFIG_NSS_DRV_TUNIPIP6_ENABLE \ + CONFIG_NSS_DRV_VIRT_IF_ENABLE \ + CONFIG_NSS_DRV_VLAN_ENABLE \ + CONFIG_NSS_DRV_VXLAN_ENABLE \ + CONFIG_NSS_DRV_WIFI_ENABLE \ + CONFIG_NSS_DRV_WIFI_EXT_VDEV_ENABLE \ + CONFIG_NSS_DRV_WIFI_MESH_ENABLE + +include $(INCLUDE_DIR)/kernel.mk +include $(INCLUDE_DIR)/package.mk + +NSS_CLIENTS_DIR:=$(TOPDIR)/qca/src/qca-nss-clients + +define KernelPackage/qca-nss-drv + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Devices + DEPENDS:=@TARGET_qualcommax +kmod-qca-nss-dp + TITLE:=Qualcomm NSS core driver + FILES:=$(PKG_BUILD_DIR)/qca-nss-drv.ko + AUTOLOAD:=$(call AutoLoad,32,qca-nss-drv) +endef + +define KernelPackage/qca-nss-drv/config + source "$(SOURCE)/Config.in" +endef + +define KernelPackage/qca-nss-drv/install + $(INSTALL_DIR) $(1)/etc/init.d + $(INSTALL_DIR) $(1)/etc/sysctl.d + $(INSTALL_DIR) $(1)/etc/config + $(INSTALL_DIR) $(1)/etc/hotplug.d/firmware + $(INSTALL_DIR) $(1)/lib/debug + + $(INSTALL_BIN) ./files/qca-nss-drv.init $(1)/etc/init.d/qca-nss-drv + $(INSTALL_BIN) ./files/qca-nss-drv.sysctl $(1)/etc/sysctl.d/qca-nss-drv.conf + $(INSTALL_BIN) ./files/qca-nss-drv.conf $(1)/etc/config/nss + $(INSTALL_BIN) ./files/qca-nss-drv.hotplug $(1)/etc/hotplug.d/firmware/10-qca-nss-fw + $(INSTALL_BIN) ./files/qca-nss-drv.debug $(1)/lib/debug/qca-nss-drv +endef + +define KernelPackage/qca-nss-drv/Description +This package contains a NSS driver for QCA chipset +endef + +ifeq ($(CONFIG_TARGET_SUBTARGET), "ipq807x") + SOC="ipq807x_64" + subtarget:=$(CONFIG_TARGET_SUBTARGET) +else ifeq ($(CONFIG_TARGET_SUBTARGET), "ipq60xx") + SOC="ipq60xx_64" + subtarget:=$(CONFIG_TARGET_SUBTARGET) +endif + +define Build/InstallDev + mkdir -p $(1)/usr/include/qca-nss-drv + $(CP) $(PKG_BUILD_DIR)/exports/* $(1)/usr/include/qca-nss-drv/ +ifneq (, $(findstring $(subtarget), "ipq807x" "ipq60xx")) + $(RM) $(1)/usr/include/qca-nss-drv/nss_ipsecmgr.h + # $(INSTALL_DIR) $(1)/usr/include/qca-nss-clients + # $(CP) $(NSS_CLIENTS_DIR)/exports/nss_ipsecmgr.h $(1)/usr/include/qca-nss-clients/. +endif +endef + +EXTRA_CFLAGS+= -I$(STAGING_DIR)/usr/include/qca-nss-gmac \ + -I$(STAGING_DIR)/usr/include/qca-nss-dp \ + -I$(STAGING_DIR)/usr/include/qca-ssdk \ + -Wno-unused-variable \ + -Wno-error=unused-function + +ifeq ($(BOARD),qualcommax) +EXTRA_CFLAGS+= -DNSS_MEM_PROFILE_MEDIUM +endif + +DRV_MAKE_OPTS:= +ifndef CONFIG_NSS_DRV_BRIDGE_ENABLE + DRV_MAKE_OPTS += NSS_DRV_BRIDGE_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_C2C_ENABLE + DRV_MAKE_OPTS += NSS_DRV_C2C_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_CLMAP_ENABLE + DRV_MAKE_OPTS += NSS_DRV_CLMAP_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_CRYPTO_ENABLE + DRV_MAKE_OPTS += NSS_DRV_CRYPTO_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_DMA_ENABLE + DRV_MAKE_OPTS += NSS_DRV_DMA_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_DTLS_ENABLE + DRV_MAKE_OPTS += NSS_DRV_DTLS_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_EDMA_ENABLE + DRV_MAKE_OPTS += NSS_DRV_EDMA_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_GRE_ENABLE + DRV_MAKE_OPTS += NSS_DRV_GRE_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_GRE_REDIR_ENABLE + DRV_MAKE_OPTS += NSS_DRV_GRE_REDIR_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_GRE_TUNNEL_ENABLE + DRV_MAKE_OPTS += NSS_DRV_GRE_TUNNEL_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_IGS_ENABLE + DRV_MAKE_OPTS += NSS_DRV_IGS_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_IPSEC_ENABLE + DRV_MAKE_OPTS += NSS_DRV_IPSEC_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_IPV4_REASM_ENABLE + DRV_MAKE_OPTS += NSS_DRV_IPV4_REASM_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_IPV6_ENABLE + DRV_MAKE_OPTS += NSS_DRV_IPV6_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_IPV6_REASM_ENABLE + DRV_MAKE_OPTS += NSS_DRV_IPV6_REASM_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_L2TP_ENABLE + DRV_MAKE_OPTS += NSS_DRV_L2TP_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_LAG_ENABLE + DRV_MAKE_OPTS += NSS_DRV_LAG_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_MAPT_ENABLE + DRV_MAKE_OPTS += NSS_DRV_MAPT_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_MATCH_ENABLE + DRV_MAKE_OPTS += NSS_DRV_MATCH_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_MIRROR_ENABLE + DRV_MAKE_OPTS += NSS_DRV_MIRROR_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_OAM_ENABLE + DRV_MAKE_OPTS += NSS_DRV_OAM_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_PORTID_ENABLE + DRV_MAKE_OPTS += NSS_DRV_PORTID_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_PPE_ENABLE + DRV_MAKE_OPTS += NSS_DRV_PPE_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_PPPOE_ENABLE + DRV_MAKE_OPTS += NSS_DRV_PPPOE_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_PPTP_ENABLE + DRV_MAKE_OPTS += NSS_DRV_PPTP_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_PVXLAN_ENABLE + DRV_MAKE_OPTS += NSS_DRV_PVXLAN_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_QRFS_ENABLE + DRV_MAKE_OPTS += NSS_DRV_QRFS_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_QVPN_ENABLE + DRV_MAKE_OPTS += NSS_DRV_QVPN_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_OVPN_ENABLE + DRV_MAKE_OPTS += NSS_DRV_OVPN_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_RMNET_ENABLE + DRV_MAKE_OPTS += NSS_DRV_RMNET_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_SHAPER_ENABLE + DRV_MAKE_OPTS += NSS_DRV_SHAPER_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_SJACK_ENABLE + DRV_MAKE_OPTS += NSS_DRV_SJACK_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_TLS_ENABLE + DRV_MAKE_OPTS += NSS_DRV_TLS_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_TRUSTSEC_ENABLE + DRV_MAKE_OPTS += NSS_DRV_TRUSTSEC_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_TRUSTSEC_RX_ENABLE + DRV_MAKE_OPTS += NSS_DRV_TRUSTSEC_RX_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_TSTAMP_ENABLE + DRV_MAKE_OPTS += NSS_DRV_TSTAMP_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_TUN6RD_ENABLE + DRV_MAKE_OPTS += NSS_DRV_TUN6RD_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_TUNIPIP6_ENABLE + DRV_MAKE_OPTS += NSS_DRV_TUNIPIP6_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_VIRT_IF_ENABLE + DRV_MAKE_OPTS += NSS_DRV_VIRT_IF_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_VLAN_ENABLE + DRV_MAKE_OPTS += NSS_DRV_VLAN_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_VXLAN_ENABLE + DRV_MAKE_OPTS += NSS_DRV_VXLAN_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_WIFI_ENABLE + DRV_MAKE_OPTS += NSS_DRV_WIFI_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_WIFI_EXT_VDEV_ENABLE + DRV_MAKE_OPTS += NSS_DRV_WIFI_EXT_VDEV_ENABLE=n +endif +ifndef CONFIG_NSS_DRV_WIFI_MESH_ENABLE + DRV_MAKE_OPTS += NSS_DRV_WIFI_MESH_ENABLE=n +endif + +define Build/Configure + $(LN) arch/nss_$(SOC).h $(PKG_BUILD_DIR)/exports/nss_arch.h +endef + +define Build/Compile + +$(MAKE) -C "$(LINUX_DIR)" $(strip $(DRV_MAKE_OPTS)) \ + CROSS_COMPILE="$(TARGET_CROSS)" \ + $(KERNEL_MAKE_FLAGS) \ + M="$(PKG_BUILD_DIR)" \ + EXTRA_CFLAGS="$(EXTRA_CFLAGS)" \ + SoC=$(SOC) \ + $(PKG_JOBS) \ + modules +endef + +$(eval $(call KernelPackage,qca-nss-drv)) diff --git a/package/qca/qca-nss-drv/files/qca-nss-drv.conf b/package/qca/qca-nss-drv/files/qca-nss-drv.conf new file mode 100644 index 000000000..a8a1fbf40 --- /dev/null +++ b/package/qca/qca-nss-drv/files/qca-nss-drv.conf @@ -0,0 +1,6 @@ +config nss_firmware 'qca_nss_0' + +config nss_firmware 'qca_nss_1' + +config general + option enable_rps '1' diff --git a/package/qca/qca-nss-drv/files/qca-nss-drv.debug b/package/qca/qca-nss-drv/files/qca-nss-drv.debug new file mode 100644 index 000000000..5d435c3a7 --- /dev/null +++ b/package/qca/qca-nss-drv/files/qca-nss-drv.debug @@ -0,0 +1,26 @@ +#!/bin/sh /sbin/sysdebug +# +# Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +# + +log cat /sys/kernel/debug/qca-nss-drv/stats/pppoe +log cat /sys/kernel/debug/qca-nss-drv/stats/n2h +log cat /sys/kernel/debug/qca-nss-drv/stats/ipv6 +log cat /sys/kernel/debug/qca-nss-drv/stats/ipv4 +log cat /sys/kernel/debug/qca-nss-drv/stats/gmac +log cat /sys/kernel/debug/qca-nss-drv/stats/drv +log cat /sys/kernel/debug/qca-nss-drv/stats/wifi +log cat /sys/kernel/debug/qca-nss-drv/stats/wifi_if +log cat /sys/kernel/debug/qca-nss-drv/stats/eth_rx diff --git a/package/qca/qca-nss-drv/files/qca-nss-drv.hotplug b/package/qca/qca-nss-drv/files/qca-nss-drv.hotplug new file mode 100644 index 000000000..1e4813838 --- /dev/null +++ b/package/qca/qca-nss-drv/files/qca-nss-drv.hotplug @@ -0,0 +1,70 @@ +#!/bin/sh +# +# Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +# + +KERNEL=`uname -r` +case "${KERNEL}" in + 3.4*) + select_or_load=load_nss_fw + ;; + *) + select_or_load=select_nss_fw + ;; +esac + +load_nss_fw () { + ls -l $1 | awk ' { print $9,$5 } '> /dev/console + echo 1 > /sys/class/firmware/$DEVICENAME/loading + cat $1 > /sys/class/firmware/$DEVICENAME/data + echo 0 > /sys/class/firmware/$DEVICENAME/loading +} + +select_nss_fw () { + rm -f /lib/firmware/$DEVICENAME + ln -s $1 /lib/firmware/$DEVICENAME + ls -l /lib/firmware/$DEVICENAME | awk ' { print $9,$5 } '> /dev/console +} + +[ "$ACTION" != "add" ] && exit + +# dev name for UCI, since it doesn't let you use . or - +SDEVNAME=$(echo ${DEVICENAME} | sed s/[.-]/_/g) + +SELECTED_FW=$(uci get nss.${SDEVNAME}.firmware 2>/dev/null) +[ -e "${SELECTED_FW}" ] && { + $select_or_load ${SELECTED_FW} + exit +} + +case $DEVICENAME in + qca-nss0* | qca-nss.0*) + if [ -e /lib/firmware/qca-nss0-enterprise.bin ] ; then + $select_or_load /lib/firmware/qca-nss0-enterprise.bin + else + $select_or_load /lib/firmware/qca-nss0-retail.bin + fi + exit + ;; + qca-nss1* | qca-nss.1*) + if [ -e /lib/firmware/qca-nss1-enterprise.bin ] ; then + $select_or_load /lib/firmware/qca-nss1-enterprise.bin + else + $select_or_load /lib/firmware/qca-nss1-retail.bin + fi + exit + ;; +esac + diff --git a/package/qca/qca-nss-drv/files/qca-nss-drv.init b/package/qca/qca-nss-drv/files/qca-nss-drv.init new file mode 100644 index 000000000..de12cb6d1 --- /dev/null +++ b/package/qca/qca-nss-drv/files/qca-nss-drv.init @@ -0,0 +1,50 @@ +#!/bin/sh /etc/rc.common +# +# Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +# + +START=70 + +enable_rps() { + irq_nss_rps=`grep nss_queue1 /proc/interrupts | cut -d ':' -f 1 | tr -d ' '` + for entry in $irq_nss_rps + do + echo 2 > /proc/irq/$entry/smp_affinity + done + + irq_nss_rps=`grep nss_queue2 /proc/interrupts | cut -d ':' -f 1 | tr -d ' '` + for entry in $irq_nss_rps + do + echo 4 > /proc/irq/$entry/smp_affinity + done + + irq_nss_rps=`grep nss_queue3 /proc/interrupts | cut -d ':' -f 1 | tr -d ' '` + for entry in $irq_nss_rps + do + echo 8 > /proc/irq/$entry/smp_affinity + done + + # Enable NSS RPS + sysctl -w dev.nss.rps.enable=1 >/dev/null 2>/dev/null + +} + + +start() { + local rps_enabled="$(uci_get nss @general[0] enable_rps)" + if [ "$rps_enabled" -eq 1 ]; then + enable_rps + fi +} diff --git a/package/qca/qca-nss-drv/files/qca-nss-drv.sysctl b/package/qca/qca-nss-drv/files/qca-nss-drv.sysctl new file mode 100644 index 000000000..0276bba12 --- /dev/null +++ b/package/qca/qca-nss-drv/files/qca-nss-drv.sysctl @@ -0,0 +1,3 @@ +# Default Number of connection configuration +dev.nss.ipv4cfg.ipv4_conn=4096 +dev.nss.ipv6cfg.ipv6_conn=4096 diff --git a/package/qca/qca-nss-drv/patches/0001-nss-drv-replace-ioremap_nocache-with-ioremap.patch b/package/qca/qca-nss-drv/patches/0001-nss-drv-replace-ioremap_nocache-with-ioremap.patch new file mode 100644 index 000000000..edbd10434 --- /dev/null +++ b/package/qca/qca-nss-drv/patches/0001-nss-drv-replace-ioremap_nocache-with-ioremap.patch @@ -0,0 +1,207 @@ +From dddfe22459a988a5b86d195bc3cc3bd3c2ac7037 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Sat, 14 Jan 2023 21:52:38 +0100 +Subject: [PATCH 1/4] nss-drv: replace ioremap_nocache() with ioremap() + +Since 5.5 ioremap_nocache is equal to ioremap on all archs and was removed +from the kernel, so just use ioremap instead. + +Signed-off-by: Robert Marko +--- + nss_hal/fsm9010/nss_hal_pvt.c | 2 +- + nss_hal/ipq50xx/nss_hal_pvt.c | 6 +++--- + nss_hal/ipq60xx/nss_hal_pvt.c | 8 ++++---- + nss_hal/ipq806x/nss_hal_pvt.c | 4 ++-- + nss_hal/ipq807x/nss_hal_pvt.c | 6 +++--- + nss_hal/ipq95xx/nss_hal_pvt.c | 6 +++--- + nss_hal/nss_hal.c | 4 ++-- + nss_meminfo.c | 2 +- + nss_ppe.c | 2 +- + 9 files changed, 20 insertions(+), 20 deletions(-) + +--- a/nss_hal/fsm9010/nss_hal_pvt.c ++++ b/nss_hal/fsm9010/nss_hal_pvt.c +@@ -145,7 +145,7 @@ static struct nss_platform_data *__nss_h + npd->nphys = res_nphys.start; + npd->vphys = res_vphys.start; + +- npd->nmap = ioremap_nocache(npd->nphys, resource_size(&res_nphys)); ++ npd->nmap = ioremap(npd->nphys, resource_size(&res_nphys)); + if (!npd->nmap) { + nss_info_always("%px: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id); + goto out; +--- a/nss_hal/ipq50xx/nss_hal_pvt.c ++++ b/nss_hal/ipq50xx/nss_hal_pvt.c +@@ -185,13 +185,13 @@ static struct nss_platform_data *__nss_h + npd->nphys = res_nphys.start; + npd->qgic_phys = res_qgic_phys.start; + +- npd->nmap = ioremap_nocache(npd->nphys, resource_size(&res_nphys)); ++ npd->nmap = ioremap(npd->nphys, resource_size(&res_nphys)); + if (!npd->nmap) { + nss_info_always("%px: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id); + goto out; + } + +- npd->qgic_map = ioremap_nocache(npd->qgic_phys, resource_size(&res_qgic_phys)); ++ npd->qgic_map = ioremap(npd->qgic_phys, resource_size(&res_qgic_phys)); + if (!npd->qgic_map) { + nss_info_always("%px: nss%d: ioremap() fail for qgic map\n", nss_ctx, nss_ctx->id); + goto out; +@@ -349,7 +349,7 @@ static int __nss_hal_common_reset(struct + + of_node_put(cmn); + +- nss_misc_reset = ioremap_nocache(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset)); ++ nss_misc_reset = ioremap(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset)); + if (!nss_misc_reset) { + pr_err("%px: ioremap fail for nss_misc_reset\n", nss_dev); + return -EFAULT; +--- a/nss_hal/ipq60xx/nss_hal_pvt.c ++++ b/nss_hal/ipq60xx/nss_hal_pvt.c +@@ -208,13 +208,13 @@ static struct nss_platform_data *__nss_h + npd->nphys = res_nphys.start; + npd->qgic_phys = res_qgic_phys.start; + +- npd->nmap = ioremap_nocache(npd->nphys, resource_size(&res_nphys)); ++ npd->nmap = ioremap(npd->nphys, resource_size(&res_nphys)); + if (!npd->nmap) { + nss_info_always("%px: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id); + goto out; + } + +- npd->qgic_map = ioremap_nocache(npd->qgic_phys, resource_size(&res_qgic_phys)); ++ npd->qgic_map = ioremap(npd->qgic_phys, resource_size(&res_qgic_phys)); + if (!npd->qgic_map) { + nss_info_always("%px: nss%d: ioremap() fail for qgic map\n", nss_ctx, nss_ctx->id); + goto out; +@@ -434,13 +434,13 @@ static int __nss_hal_common_reset(struct + + of_node_put(cmn); + +- nss_misc_reset = ioremap_nocache(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset)); ++ nss_misc_reset = ioremap(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset)); + if (!nss_misc_reset) { + pr_err("%px: ioremap fail for nss_misc_reset\n", nss_dev); + return -EFAULT; + } + +- nss_misc_reset_flag = ioremap_nocache(res_nss_misc_reset_flag.start, resource_size(&res_nss_misc_reset_flag)); ++ nss_misc_reset_flag = ioremap(res_nss_misc_reset_flag.start, resource_size(&res_nss_misc_reset_flag)); + if (!nss_misc_reset_flag) { + pr_err("%px: ioremap fail for nss_misc_reset_flag\n", nss_dev); + return -EFAULT; +--- a/nss_hal/ipq806x/nss_hal_pvt.c ++++ b/nss_hal/ipq806x/nss_hal_pvt.c +@@ -461,7 +461,7 @@ static struct nss_platform_data *__nss_h + npd->nphys = res_nphys.start; + npd->vphys = res_vphys.start; + +- npd->nmap = ioremap_nocache(npd->nphys, resource_size(&res_nphys)); ++ npd->nmap = ioremap(npd->nphys, resource_size(&res_nphys)); + if (!npd->nmap) { + nss_info_always("%px: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id); + goto out; +@@ -714,7 +714,7 @@ static int __nss_hal_common_reset(struct + } + of_node_put(cmn); + +- fpb_base = ioremap_nocache(res_nss_fpb_base.start, resource_size(&res_nss_fpb_base)); ++ fpb_base = ioremap(res_nss_fpb_base.start, resource_size(&res_nss_fpb_base)); + if (!fpb_base) { + pr_err("%px: ioremap fail for nss_fpb_base\n", nss_dev); + return -EFAULT; +--- a/nss_hal/ipq807x/nss_hal_pvt.c ++++ b/nss_hal/ipq807x/nss_hal_pvt.c +@@ -237,7 +237,7 @@ static struct nss_platform_data *__nss_h + npd->vphys = res_vphys.start; + npd->qgic_phys = res_qgic_phys.start; + +- npd->nmap = ioremap_nocache(npd->nphys, resource_size(&res_nphys)); ++ npd->nmap = ioremap(npd->nphys, resource_size(&res_nphys)); + if (!npd->nmap) { + nss_info_always("%px: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id); + goto out; +@@ -250,7 +250,7 @@ static struct nss_platform_data *__nss_h + goto out; + } + +- npd->qgic_map = ioremap_nocache(npd->qgic_phys, resource_size(&res_qgic_phys)); ++ npd->qgic_map = ioremap(npd->qgic_phys, resource_size(&res_qgic_phys)); + if (!npd->qgic_map) { + nss_info_always("%px: nss%d: ioremap() fail for qgic map\n", nss_ctx, nss_ctx->id); + goto out; +@@ -470,7 +470,7 @@ static int __nss_hal_common_reset(struct + } + of_node_put(cmn); + +- nss_misc_reset = ioremap_nocache(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset)); ++ nss_misc_reset = ioremap(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset)); + if (!nss_misc_reset) { + pr_err("%px: ioremap fail for nss_misc_reset\n", nss_dev); + return -EFAULT; +--- a/nss_hal/ipq95xx/nss_hal_pvt.c ++++ b/nss_hal/ipq95xx/nss_hal_pvt.c +@@ -291,7 +291,7 @@ static struct nss_platform_data *__nss_h + npd->vphys = res_vphys.start; + npd->qgic_phys = res_qgic_phys.start; + +- npd->nmap = ioremap_nocache(npd->nphys, resource_size(&res_nphys)); ++ npd->nmap = ioremap(npd->nphys, resource_size(&res_nphys)); + if (!npd->nmap) { + nss_info_always("%px: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id); + goto out; +@@ -303,7 +303,7 @@ static struct nss_platform_data *__nss_h + goto out; + } + +- npd->qgic_map = ioremap_nocache(npd->qgic_phys, resource_size(&res_qgic_phys)); ++ npd->qgic_map = ioremap(npd->qgic_phys, resource_size(&res_qgic_phys)); + if (!npd->qgic_map) { + nss_info_always("%px: nss%d: ioremap() fail for qgic map\n", nss_ctx, nss_ctx->id); + goto out; +@@ -608,7 +608,7 @@ static int __nss_hal_common_reset(struct + + of_node_put(cmn); + +- nss_misc_reset = ioremap_nocache(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset)); ++ nss_misc_reset = ioremap(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset)); + if (!nss_misc_reset) { + pr_err("%px: ioremap fail for nss_misc_reset\n", nss_dev); + return -EFAULT; +--- a/nss_hal/nss_hal.c ++++ b/nss_hal/nss_hal.c +@@ -81,9 +81,9 @@ int nss_hal_firmware_load(struct nss_ctx + } + + +- load_mem = ioremap_nocache(npd->load_addr, nss_fw->size); ++ load_mem = ioremap(npd->load_addr, nss_fw->size); + if (!load_mem) { +- nss_info_always("%px: ioremap_nocache failed: %x", nss_ctx, npd->load_addr); ++ nss_info_always("%px: ioremap failed: %x", nss_ctx, npd->load_addr); + release_firmware(nss_fw); + return rc; + } +--- a/nss_meminfo.c ++++ b/nss_meminfo.c +@@ -736,7 +736,7 @@ bool nss_meminfo_init(struct nss_ctx_ins + /* + * meminfo_start is the label where the start address of meminfo map is stored. + */ +- meminfo_start = (uint32_t *)ioremap_nocache(nss_ctx->load + NSS_MEMINFO_MAP_START_OFFSET, ++ meminfo_start = (uint32_t *)ioremap(nss_ctx->load + NSS_MEMINFO_MAP_START_OFFSET, + NSS_MEMINFO_RESERVE_AREA_SIZE); + if (!meminfo_start) { + nss_info_always("%px: cannot remap meminfo start\n", nss_ctx); +--- a/nss_ppe.c ++++ b/nss_ppe.c +@@ -357,7 +357,7 @@ void nss_ppe_init(void) + /* + * Get the PPE base address + */ +- ppe_pvt.ppe_base = ioremap_nocache(PPE_BASE_ADDR, PPE_REG_SIZE); ++ ppe_pvt.ppe_base = ioremap(PPE_BASE_ADDR, PPE_REG_SIZE); + if (!ppe_pvt.ppe_base) { + nss_warning("DRV can't get PPE base address\n"); + return; diff --git a/package/qca/qca-nss-drv/patches/0002-nss-drv-add-support-for-kernel-5.15.patch b/package/qca/qca-nss-drv/patches/0002-nss-drv-add-support-for-kernel-5.15.patch new file mode 100644 index 000000000..279c18e57 --- /dev/null +++ b/package/qca/qca-nss-drv/patches/0002-nss-drv-add-support-for-kernel-5.15.patch @@ -0,0 +1,62 @@ +From 2a3b9f4659542e529f4e1a535c33dfde7e272707 Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Tue, 5 Apr 2022 18:10:57 +0200 +Subject: [PATCH 2/4] nss-drv: add support for kernel 5.15 + +- Fix coredump panic notifier include change. +- Fix skb ZEROCOPY flag. +- Add skb reuse support for 5.15 kernel version. + +Signed-off-by: Ansuel Smith +--- + nss_core.c | 5 +++-- + nss_coredump.c | 4 ++++ + nss_hal/nss_hal.c | 1 + + 3 files changed, 9 insertions(+), 2 deletions(-) + +--- a/nss_core.c ++++ b/nss_core.c +@@ -61,7 +61,9 @@ + (((LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0)))) || \ + (((LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 19, 0)))) || \ + (((LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0)))) || \ +-(((LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 0)))))) ++(((LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 0)))) || \ ++(((LINUX_VERSION_CODE >= KERNEL_VERSION(5, 15, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(5, 16, 0)))) || \ ++(((LINUX_VERSION_CODE >= KERNEL_VERSION(6, 1, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(6, 2, 0)))))) + #error "Check skb recycle code in this file to match Linux version" + #endif + +@@ -2658,7 +2660,7 @@ static inline bool nss_core_skb_can_reus + if (unlikely(irqs_disabled())) + return false; + +- if (unlikely(skb_shinfo(nbuf)->tx_flags & SKBTX_DEV_ZEROCOPY)) ++ if (unlikely(skb_shinfo(nbuf)->flags & SKBFL_ZEROCOPY_ENABLE)) + return false; + + if (unlikely(skb_is_nonlinear(nbuf))) +--- a/nss_coredump.c ++++ b/nss_coredump.c +@@ -25,7 +25,11 @@ + #include "nss_hal.h" + #include "nss_log.h" + #include ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 14, 0)) + #include /* for panic_notifier_list */ ++#else ++#include ++#endif + #include /* for time */ + #include "nss_tx_rx_common.h" + +--- a/nss_hal/nss_hal.c ++++ b/nss_hal/nss_hal.c +@@ -27,6 +27,7 @@ + #include + #include + #include ++#include + + #include "nss_hal.h" + #include "nss_arch.h" diff --git a/package/qca/qca-nss-drv/patches/0003-DMA-Fix-NULL-pointer-exceptions.patch b/package/qca/qca-nss-drv/patches/0003-DMA-Fix-NULL-pointer-exceptions.patch new file mode 100644 index 000000000..4577b8a4b --- /dev/null +++ b/package/qca/qca-nss-drv/patches/0003-DMA-Fix-NULL-pointer-exceptions.patch @@ -0,0 +1,28 @@ +From a6e3e81daab4eb9acbdef0ad1fed056e1bfbe320 Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Tue, 8 Jun 2021 23:24:43 +0200 +Subject: [PATCH 3/4] DMA: Fix NULL pointer exceptions + +There are multiple instances that pass NULL instead +of device to DMA functions. +That is incorrect and will cause kernel NULL pointer +exceptions. + +So, simply pass the device structure pointers. + +Signed-off-by: Robert Marko +--- + nss_core.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/nss_core.c ++++ b/nss_core.c +@@ -1660,7 +1660,7 @@ static int32_t nss_core_handle_cause_que + * + */ + if (unlikely((buffer_type == N2H_BUFFER_CRYPTO_RESP))) { +- dma_unmap_single(NULL, (desc->buffer + desc->payload_offs), desc->payload_len, DMA_FROM_DEVICE); ++ dma_unmap_single(nss_ctx->dev, (desc->buffer + desc->payload_offs), desc->payload_len, DMA_FROM_DEVICE); + goto consume; + } + diff --git a/package/qca/qca-nss-drv/patches/0004-nss-drv-rework-NSS_CORE_DMA_CACHE_MAINT-ops.patch b/package/qca/qca-nss-drv/patches/0004-nss-drv-rework-NSS_CORE_DMA_CACHE_MAINT-ops.patch new file mode 100644 index 000000000..793da70f0 --- /dev/null +++ b/package/qca/qca-nss-drv/patches/0004-nss-drv-rework-NSS_CORE_DMA_CACHE_MAINT-ops.patch @@ -0,0 +1,558 @@ +From e6814c47d22ee5133a71016375239f87ea265794 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Tue, 5 Apr 2022 15:38:18 +0200 +Subject: [PATCH 4/4] nss-drv: rework NSS_CORE_DMA_CACHE_MAINT ops + +Rework NSS_CORE_DMA_CACHE_MAINT ops to use standard dma sync ops instead +of using the direct arch function. This permit to skip any hack/patch +needed for nss-drv to correctly compile on upstream kernel. + +We drop any NSS_CORE_DMA_CACHE_MAINT use in nss_core and we correctly +use the dma_sync_single_for_device we correctly dma addr using the new +DMA helper. +We drop sync for IOREMAP addr and we just leave a memory block. +We hope the nss_profiler is correctly ported. +We finally drop the NSS_CORE_DMA_CACHE_MAINT jus in case someone wants +to use it. + +Signed-off-by: Christian Marangi +--- + nss_core.c | 136 +++++++++++++++++++++++++--------- + nss_core.h | 41 +++++----- + nss_hal/ipq806x/nss_hal_pvt.c | 5 +- + nss_hal/ipq807x/nss_hal_pvt.c | 5 +- + nss_meminfo.c | 5 +- + nss_profiler.c | 3 +- + 6 files changed, 127 insertions(+), 68 deletions(-) + +--- a/nss_core.c ++++ b/nss_core.c +@@ -1472,6 +1472,8 @@ static inline void nss_core_handle_empty + uint32_t count, uint32_t hlos_index, + uint16_t mask) + { ++ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx; ++ + while (count) { + /* + * Since we only return the primary skb, we have no way to unmap +@@ -1525,7 +1527,9 @@ next: + n2h_desc_ring->hlos_index = hlos_index; + if_map->n2h_hlos_index[NSS_IF_N2H_EMPTY_BUFFER_RETURN_QUEUE] = hlos_index; + +- NSS_CORE_DMA_CACHE_MAINT((void *)&if_map->n2h_hlos_index[NSS_IF_N2H_EMPTY_BUFFER_RETURN_QUEUE], sizeof(uint32_t), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, ++ n2h_hlos_index_to_dma(mem_ctx->if_map_dma, NSS_IF_N2H_EMPTY_BUFFER_RETURN_QUEUE), ++ sizeof(uint32_t), DMA_TO_DEVICE); + NSS_CORE_DSB(); + } + +@@ -1547,6 +1551,7 @@ static int32_t nss_core_handle_cause_que + struct nss_ctx_instance *nss_ctx = int_ctx->nss_ctx; + struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx; + struct nss_if_mem_map *if_map = mem_ctx->if_map; ++ int dma_size; + + qid = nss_core_cause_to_queue(cause); + +@@ -1558,7 +1563,8 @@ static int32_t nss_core_handle_cause_que + n2h_desc_ring = &nss_ctx->n2h_desc_ring[qid]; + desc_if = &n2h_desc_ring->desc_ring; + desc_ring = desc_if->desc; +- NSS_CORE_DMA_CACHE_MAINT((void *)&if_map->n2h_nss_index[qid], sizeof(uint32_t), DMA_FROM_DEVICE); ++ dma_sync_single_for_cpu(nss_ctx->dev, n2h_nss_index_to_dma(mem_ctx->if_map_dma, qid), ++ sizeof(uint32_t), DMA_FROM_DEVICE); + NSS_CORE_DSB(); + nss_index = if_map->n2h_nss_index[qid]; + +@@ -1587,13 +1593,23 @@ static int32_t nss_core_handle_cause_que + start = hlos_index; + end = (hlos_index + count) & mask; + if (end > start) { +- dmac_inv_range((void *)&desc_ring[start], (void *)&desc_ring[end] + sizeof(struct n2h_descriptor)); ++ dma_size = sizeof(struct n2h_descriptor) * (end - start + 1); ++ ++ dma_sync_single_for_cpu(nss_ctx->dev, n2h_desc_index_to_dma(if_map, qid, start), ++ dma_size, DMA_FROM_DEVICE); + } else { + /* + * We have wrapped around + */ +- dmac_inv_range((void *)&desc_ring[start], (void *)&desc_ring[mask] + sizeof(struct n2h_descriptor)); +- dmac_inv_range((void *)&desc_ring[0], (void *)&desc_ring[end] + sizeof(struct n2h_descriptor)); ++ dma_size = sizeof(struct n2h_descriptor) * (mask - start + 1); ++ ++ dma_sync_single_for_cpu(nss_ctx->dev, n2h_desc_index_to_dma(if_map, qid, start), ++ dma_size, DMA_FROM_DEVICE); ++ ++ dma_size = sizeof(struct n2h_descriptor) * (end + 1); ++ ++ dma_sync_single_for_cpu(nss_ctx->dev, n2h_desc_index_to_dma(if_map, qid, 0), dma_size, ++ DMA_FROM_DEVICE); + } + + /* +@@ -1722,7 +1738,8 @@ next: + n2h_desc_ring->hlos_index = hlos_index; + if_map->n2h_hlos_index[qid] = hlos_index; + +- NSS_CORE_DMA_CACHE_MAINT((void *)&if_map->n2h_hlos_index[qid], sizeof(uint32_t), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, n2h_hlos_index_to_dma(mem_ctx->if_map_dma, qid), ++ sizeof(uint32_t), DMA_TO_DEVICE); + NSS_CORE_DSB(); + + return count; +@@ -1734,11 +1751,12 @@ next: + */ + static void nss_core_init_nss(struct nss_ctx_instance *nss_ctx, struct nss_if_mem_map *if_map) + { ++ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx; + struct nss_top_instance *nss_top; + int ret; + int i; + +- NSS_CORE_DMA_CACHE_MAINT((void *)if_map, sizeof(*if_map), DMA_FROM_DEVICE); ++ dma_sync_single_for_cpu(nss_ctx->dev, mem_ctx->if_map_dma, sizeof(*if_map), DMA_FROM_DEVICE); + NSS_CORE_DSB(); + + /* +@@ -1835,6 +1853,7 @@ static void nss_core_alloc_paged_buffers + uint16_t count, int16_t mask, int32_t hlos_index, uint32_t alloc_fail_count, + uint32_t buffer_type, uint32_t buffer_queue, uint32_t stats_index) + { ++ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx; + struct sk_buff *nbuf; + struct page *npage; + struct hlos_h2n_desc_rings *h2n_desc_ring = &nss_ctx->h2n_desc_rings[buffer_queue]; +@@ -1904,7 +1923,9 @@ static void nss_core_alloc_paged_buffers + /* + * Flush the descriptor + */ +- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, ++ h2n_desc_index_to_dma(if_map, buffer_queue, hlos_index), ++ sizeof(*desc), DMA_TO_DEVICE); + + hlos_index = (hlos_index + 1) & (mask); + count--; +@@ -1918,7 +1939,8 @@ static void nss_core_alloc_paged_buffers + h2n_desc_ring->hlos_index = hlos_index; + if_map->h2n_hlos_index[buffer_queue] = hlos_index; + +- NSS_CORE_DMA_CACHE_MAINT(&if_map->h2n_hlos_index[buffer_queue], sizeof(uint32_t), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, h2n_hlos_index_to_dma(mem_ctx->if_map_dma, buffer_queue), ++ sizeof(uint32_t), DMA_TO_DEVICE); + NSS_CORE_DSB(); + + NSS_PKT_STATS_INC(&nss_top->stats_drv[stats_index]); +@@ -1931,7 +1953,7 @@ static void nss_core_alloc_paged_buffers + static void nss_core_alloc_jumbo_mru_buffers(struct nss_ctx_instance *nss_ctx, struct nss_if_mem_map *if_map, + int jumbo_mru, uint16_t count, int16_t mask, int32_t hlos_index) + { +- ++ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx; + struct sk_buff *nbuf; + struct hlos_h2n_desc_rings *h2n_desc_ring = &nss_ctx->h2n_desc_rings[NSS_IF_H2N_EMPTY_BUFFER_QUEUE]; + struct h2n_desc_if_instance *desc_if = &h2n_desc_ring->desc_ring; +@@ -1978,7 +2000,9 @@ static void nss_core_alloc_jumbo_mru_buf + /* + * Flush the descriptor + */ +- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, ++ h2n_desc_index_to_dma(if_map, NSS_IF_H2N_EMPTY_BUFFER_QUEUE, hlos_index), ++ sizeof(*desc), DMA_TO_DEVICE); + + hlos_index = (hlos_index + 1) & (mask); + count--; +@@ -1992,7 +2016,8 @@ static void nss_core_alloc_jumbo_mru_buf + h2n_desc_ring->hlos_index = hlos_index; + if_map->h2n_hlos_index[NSS_IF_H2N_EMPTY_BUFFER_QUEUE] = hlos_index; + +- NSS_CORE_DMA_CACHE_MAINT(&if_map->h2n_hlos_index[NSS_IF_H2N_EMPTY_BUFFER_QUEUE], sizeof(uint32_t), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, h2n_hlos_index_to_dma(mem_ctx->if_map_dma, NSS_IF_H2N_EMPTY_BUFFER_QUEUE), ++ sizeof(uint32_t), DMA_TO_DEVICE); + NSS_CORE_DSB(); + + NSS_PKT_STATS_INC(&nss_top->stats_drv[NSS_DRV_STATS_TX_EMPTY]); +@@ -2005,6 +2030,7 @@ static void nss_core_alloc_jumbo_mru_buf + static void nss_core_alloc_max_avail_size_buffers(struct nss_ctx_instance *nss_ctx, struct nss_if_mem_map *if_map, + uint16_t max_buf_size, uint16_t count, int16_t mask, int32_t hlos_index) + { ++ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx; + struct hlos_h2n_desc_rings *h2n_desc_ring = &nss_ctx->h2n_desc_rings[NSS_IF_H2N_EMPTY_BUFFER_QUEUE]; + struct h2n_desc_if_instance *desc_if = &h2n_desc_ring->desc_ring; + struct h2n_descriptor *desc_ring = desc_if->desc; +@@ -2012,6 +2038,7 @@ static void nss_core_alloc_max_avail_siz + uint16_t payload_len = max_buf_size + NET_SKB_PAD; + uint16_t start = hlos_index; + uint16_t prev_hlos_index; ++ int dma_size; + + while (count) { + dma_addr_t buffer; +@@ -2064,13 +2091,26 @@ static void nss_core_alloc_max_avail_siz + * Flush the descriptors, including the descriptor at prev_hlos_index. + */ + if (prev_hlos_index > start) { +- dmac_clean_range((void *)&desc_ring[start], (void *)&desc_ring[prev_hlos_index] + sizeof(struct h2n_descriptor)); ++ dma_size = sizeof(struct h2n_descriptor) * (prev_hlos_index - start + 1); ++ ++ dma_sync_single_for_device(nss_ctx->dev, ++ h2n_desc_index_to_dma(if_map, NSS_IF_H2N_EMPTY_BUFFER_QUEUE, start), ++ dma_size, DMA_TO_DEVICE); + } else { + /* + * We have wrapped around + */ +- dmac_clean_range((void *)&desc_ring[start], (void *)&desc_ring[mask] + sizeof(struct h2n_descriptor)); +- dmac_clean_range((void *)&desc_ring[0], (void *)&desc_ring[prev_hlos_index] + sizeof(struct h2n_descriptor)); ++ dma_size = sizeof(struct h2n_descriptor) * (mask - start + 1); ++ ++ dma_sync_single_for_device(nss_ctx->dev, ++ h2n_desc_index_to_dma(if_map, NSS_IF_H2N_EMPTY_BUFFER_QUEUE, start), ++ dma_size, DMA_TO_DEVICE); ++ ++ dma_size = sizeof(struct h2n_descriptor) * (prev_hlos_index + 1); ++ ++ dma_sync_single_for_device(nss_ctx->dev, ++ h2n_desc_index_to_dma(if_map, NSS_IF_H2N_EMPTY_BUFFER_QUEUE, 0), ++ dma_size, DMA_TO_DEVICE); + } + + /* +@@ -2081,7 +2121,8 @@ static void nss_core_alloc_max_avail_siz + h2n_desc_ring->hlos_index = hlos_index; + if_map->h2n_hlos_index[NSS_IF_H2N_EMPTY_BUFFER_QUEUE] = hlos_index; + +- NSS_CORE_DMA_CACHE_MAINT(&if_map->h2n_hlos_index[NSS_IF_H2N_EMPTY_BUFFER_QUEUE], sizeof(uint32_t), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, h2n_hlos_index_to_dma(mem_ctx->if_map_dma, NSS_IF_H2N_EMPTY_BUFFER_QUEUE), ++ sizeof(uint32_t), DMA_TO_DEVICE); + NSS_CORE_DSB(); + + NSS_PKT_STATS_INC(&nss_top->stats_drv[NSS_DRV_STATS_TX_EMPTY]); +@@ -2094,6 +2135,7 @@ static void nss_core_alloc_max_avail_siz + static inline void nss_core_handle_empty_buffer_sos(struct nss_ctx_instance *nss_ctx, + struct nss_if_mem_map *if_map, uint16_t max_buf_size) + { ++ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx; + uint16_t count, size, mask; + int32_t nss_index, hlos_index; + struct hlos_h2n_desc_rings *h2n_desc_ring = &nss_ctx->h2n_desc_rings[NSS_IF_H2N_EMPTY_BUFFER_QUEUE]; +@@ -2104,7 +2146,8 @@ static inline void nss_core_handle_empty + /* + * Check how many empty buffers could be filled in queue + */ +- NSS_CORE_DMA_CACHE_MAINT(&if_map->h2n_nss_index[NSS_IF_H2N_EMPTY_BUFFER_QUEUE], sizeof(uint32_t), DMA_FROM_DEVICE); ++ dma_sync_single_for_cpu(nss_ctx->dev, h2n_nss_index_to_dma(mem_ctx->if_map_dma, NSS_IF_H2N_EMPTY_BUFFER_QUEUE), ++ sizeof(uint32_t), DMA_FROM_DEVICE); + NSS_CORE_DSB(); + nss_index = if_map->h2n_nss_index[NSS_IF_H2N_EMPTY_BUFFER_QUEUE]; + +@@ -2149,6 +2192,7 @@ static inline void nss_core_handle_empty + static inline void nss_core_handle_paged_empty_buffer_sos(struct nss_ctx_instance *nss_ctx, + struct nss_if_mem_map *if_map, uint16_t max_buf_size) + { ++ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx; + uint16_t count, size, mask; + int32_t nss_index, hlos_index; + struct hlos_h2n_desc_rings *h2n_desc_ring = &nss_ctx->h2n_desc_rings[NSS_IF_H2N_EMPTY_PAGED_BUFFER_QUEUE]; +@@ -2156,7 +2200,8 @@ static inline void nss_core_handle_paged + /* + * Check how many empty buffers could be filled in queue + */ +- NSS_CORE_DMA_CACHE_MAINT((void *)&if_map->h2n_nss_index[NSS_IF_H2N_EMPTY_PAGED_BUFFER_QUEUE], sizeof(uint32_t), DMA_FROM_DEVICE); ++ dma_sync_single_for_cpu(nss_ctx->dev, h2n_nss_index_to_dma(mem_ctx->if_map_dma, NSS_IF_H2N_EMPTY_PAGED_BUFFER_QUEUE), ++ sizeof(uint32_t), DMA_FROM_DEVICE); + NSS_CORE_DSB(); + nss_index = if_map->h2n_nss_index[NSS_IF_H2N_EMPTY_PAGED_BUFFER_QUEUE]; + +@@ -2733,9 +2778,11 @@ void nss_skb_reuse(struct sk_buff *nbuf) + * Sends one skb to NSS FW + */ + static inline int32_t nss_core_send_buffer_simple_skb(struct nss_ctx_instance *nss_ctx, +- struct h2n_desc_if_instance *desc_if, uint32_t if_num, +- struct sk_buff *nbuf, uint16_t hlos_index, uint16_t flags, uint8_t buffer_type, uint16_t mss) ++ struct h2n_desc_if_instance *desc_if, uint32_t if_num, struct sk_buff *nbuf, ++ uint16_t qid, uint16_t hlos_index, uint16_t flags, uint8_t buffer_type, uint16_t mss) + { ++ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx; ++ struct nss_if_mem_map *if_map = mem_ctx->if_map; + struct h2n_descriptor *desc_ring = desc_if->desc; + struct h2n_descriptor *desc; + uint16_t bit_flags; +@@ -2789,7 +2836,8 @@ static inline int32_t nss_core_send_buff + (nss_ptr_t)nbuf, (uint16_t)(nbuf->data - nbuf->head), nbuf->len, + sz, (uint32_t)nbuf->priority, mss, bit_flags); + +- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, h2n_desc_index_to_dma(if_map, qid, hlos_index), ++ sizeof(*desc), DMA_TO_DEVICE); + + /* + * We are done using the skb fields and can reuse it now +@@ -2813,7 +2861,8 @@ no_reuse: + (nss_ptr_t)nbuf, (uint16_t)(nbuf->data - nbuf->head), nbuf->len, + (uint16_t)skb_end_offset(nbuf), (uint32_t)nbuf->priority, mss, bit_flags); + +- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, h2n_desc_index_to_dma(if_map, qid, hlos_index), ++ sizeof(*desc), DMA_TO_DEVICE); + + NSS_PKT_STATS_INC(&nss_ctx->nss_top->stats_drv[NSS_DRV_STATS_TX_SIMPLE]); + return 1; +@@ -2827,9 +2876,11 @@ no_reuse: + * Used to differentiate from FRAGLIST + */ + static inline int32_t nss_core_send_buffer_nr_frags(struct nss_ctx_instance *nss_ctx, +- struct h2n_desc_if_instance *desc_if, uint32_t if_num, +- struct sk_buff *nbuf, uint16_t hlos_index, uint16_t flags, uint8_t buffer_type, uint16_t mss) ++ struct h2n_desc_if_instance *desc_if, uint32_t if_num, struct sk_buff *nbuf, ++ uint16_t qid, uint16_t hlos_index, uint16_t flags, uint8_t buffer_type, uint16_t mss) + { ++ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx; ++ struct nss_if_mem_map *if_map = mem_ctx->if_map; + struct h2n_descriptor *desc_ring = desc_if->desc; + struct h2n_descriptor *desc; + const skb_frag_t *frag; +@@ -2869,7 +2920,8 @@ static inline int32_t nss_core_send_buff + (nss_ptr_t)NULL, nbuf->data - nbuf->head, nbuf->len - nbuf->data_len, + skb_end_offset(nbuf), (uint32_t)nbuf->priority, mss, bit_flags | H2N_BIT_FLAG_FIRST_SEGMENT); + +- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, h2n_desc_index_to_dma(if_map, qid, hlos_index), ++ sizeof(*desc), DMA_TO_DEVICE); + + /* + * Now handle rest of the fragments. +@@ -2893,7 +2945,8 @@ static inline int32_t nss_core_send_buff + (nss_ptr_t)NULL, 0, skb_frag_size(frag), skb_frag_size(frag), + nbuf->priority, mss, bit_flags); + +- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, h2n_desc_index_to_dma(if_map, qid, hlos_index), ++ sizeof(*desc), DMA_TO_DEVICE); + } + + /* +@@ -2909,7 +2962,8 @@ static inline int32_t nss_core_send_buff + desc->bit_flags &= ~(H2N_BIT_FLAG_DISCARD); + desc->opaque = (nss_ptr_t)nbuf; + +- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, h2n_desc_index_to_dma(if_map, qid, hlos_index), ++ sizeof(*desc), DMA_TO_DEVICE); + + NSS_PKT_STATS_INC(&nss_ctx->nss_top->stats_drv[NSS_DRV_STATS_TX_NR_FRAGS]); + return i+1; +@@ -2923,9 +2977,11 @@ static inline int32_t nss_core_send_buff + * Used to differentiate from FRAGS + */ + static inline int32_t nss_core_send_buffer_fraglist(struct nss_ctx_instance *nss_ctx, +- struct h2n_desc_if_instance *desc_if, uint32_t if_num, +- struct sk_buff *nbuf, uint16_t hlos_index, uint16_t flags, uint8_t buffer_type, uint16_t mss) ++ struct h2n_desc_if_instance *desc_if, uint32_t if_num, struct sk_buff *nbuf, ++ uint16_t qid, uint16_t hlos_index, uint16_t flags, uint8_t buffer_type, uint16_t mss) + { ++ struct nss_meminfo_ctx *mem_ctx = &nss_ctx->meminfo_ctx; ++ struct nss_if_mem_map *if_map = mem_ctx->if_map; + struct h2n_descriptor *desc_ring = desc_if->desc; + struct h2n_descriptor *desc; + dma_addr_t buffer; +@@ -2964,7 +3020,8 @@ static inline int32_t nss_core_send_buff + (nss_ptr_t)nbuf, nbuf->data - nbuf->head, nbuf->len - nbuf->data_len, + skb_end_offset(nbuf), (uint32_t)nbuf->priority, mss, bit_flags | H2N_BIT_FLAG_FIRST_SEGMENT); + +- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, h2n_desc_index_to_dma(if_map, qid, hlos_index), ++ sizeof(*desc), DMA_TO_DEVICE); + + /* + * Walk the frag_list in nbuf +@@ -3017,7 +3074,8 @@ static inline int32_t nss_core_send_buff + (nss_ptr_t)iter, iter->data - iter->head, iter->len - iter->data_len, + skb_end_offset(iter), iter->priority, mss, bit_flags); + +- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, h2n_desc_index_to_dma(if_map, qid, hlos_index), ++ sizeof(*desc), DMA_TO_DEVICE); + + i++; + } +@@ -3036,7 +3094,8 @@ static inline int32_t nss_core_send_buff + * Update bit flag for last descriptor. + */ + desc->bit_flags |= H2N_BIT_FLAG_LAST_SEGMENT; +- NSS_CORE_DMA_CACHE_MAINT((void *)desc, sizeof(*desc), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, h2n_desc_index_to_dma(if_map, qid, hlos_index), ++ sizeof(*desc), DMA_TO_DEVICE); + + NSS_PKT_STATS_INC(&nss_ctx->nss_top->stats_drv[NSS_DRV_STATS_TX_FRAGLIST]); + return i+1; +@@ -3115,8 +3174,10 @@ int32_t nss_core_send_buffer(struct nss_ + * We need to work out if there's sufficent space in our transmit descriptor + * ring to place all the segments of a nbuf. + */ +- NSS_CORE_DMA_CACHE_MAINT((void *)&if_map->h2n_nss_index[qid], sizeof(uint32_t), DMA_FROM_DEVICE); ++ dma_sync_single_for_cpu(nss_ctx->dev, h2n_nss_index_to_dma(mem_ctx->if_map_dma, qid), ++ sizeof(uint32_t), DMA_FROM_DEVICE); + NSS_CORE_DSB(); ++ + nss_index = if_map->h2n_nss_index[qid]; + h2n_desc_ring->nss_index_local = nss_index; + count = ((nss_index - hlos_index - 1) + size) & (mask); +@@ -3181,13 +3242,13 @@ int32_t nss_core_send_buffer(struct nss_ + count = 0; + if (likely((segments == 0) || is_bounce)) { + count = nss_core_send_buffer_simple_skb(nss_ctx, desc_if, if_num, +- nbuf, hlos_index, flags, buffer_type, mss); ++ nbuf, qid, hlos_index, flags, buffer_type, mss); + } else if (skb_has_frag_list(nbuf)) { + count = nss_core_send_buffer_fraglist(nss_ctx, desc_if, if_num, +- nbuf, hlos_index, flags, buffer_type, mss); ++ nbuf, qid, hlos_index, flags, buffer_type, mss); + } else { + count = nss_core_send_buffer_nr_frags(nss_ctx, desc_if, if_num, +- nbuf, hlos_index, flags, buffer_type, mss); ++ nbuf, qid, hlos_index, flags, buffer_type, mss); + } + + if (unlikely(count <= 0)) { +@@ -3211,7 +3272,8 @@ int32_t nss_core_send_buffer(struct nss_ + h2n_desc_ring->hlos_index = hlos_index; + if_map->h2n_hlos_index[qid] = hlos_index; + +- NSS_CORE_DMA_CACHE_MAINT(&if_map->h2n_hlos_index[qid], sizeof(uint32_t), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, h2n_hlos_index_to_dma(mem_ctx->if_map_dma, qid), ++ sizeof(uint32_t), DMA_TO_DEVICE); + NSS_CORE_DSB(); + + #ifdef CONFIG_DEBUG_KMEMLEAK +--- a/nss_core.h ++++ b/nss_core.h +@@ -105,31 +105,30 @@ + #endif + + /* +- * Cache operation ++ * DMA Offset helper + */ +-#define NSS_CORE_DSB() dsb(sy) +-#define NSS_CORE_DMA_CACHE_MAINT(start, size, dir) nss_core_dma_cache_maint(start, size, dir) ++#define n2h_desc_index_offset(_index) sizeof(struct n2h_descriptor) * (_index) ++#define h2n_desc_index_offset(_index) sizeof(struct h2n_descriptor) * (_index) ++ ++#define n2h_desc_index_to_dma(_if_map_addr, _qid, _index) (_if_map_addr)->n2h_desc_if[(_qid)].desc_addr + n2h_desc_index_offset(_index) ++#define h2n_desc_index_to_dma(_if_map_addr, _qid, _index) (_if_map_addr)->h2n_desc_if[(_qid)].desc_addr + h2n_desc_index_offset(_index) ++ ++#define h2n_nss_index_offset offsetof(struct nss_if_mem_map, h2n_nss_index) ++#define n2h_nss_index_offset offsetof(struct nss_if_mem_map, n2h_nss_index) ++#define h2n_hlos_index_offset offsetof(struct nss_if_mem_map, h2n_hlos_index) ++#define n2h_hlos_index_offset offsetof(struct nss_if_mem_map, n2h_hlos_index) ++ ++#define h2n_nss_index_to_dma(_if_map_addr, _index) (_if_map_addr) + h2n_nss_index_offset + (sizeof(uint32_t) * (_index)) ++#define n2h_nss_index_to_dma(_if_map_addr, _index) (_if_map_addr) + n2h_nss_index_offset + (sizeof(uint32_t) * (_index)) ++#define h2n_hlos_index_to_dma(_if_map_addr, _index) (_if_map_addr) + h2n_hlos_index_offset + (sizeof(uint32_t) * (_index)) ++#define n2h_hlos_index_to_dma(_if_map_addr, _index) (_if_map_addr) + n2h_hlos_index_offset + (sizeof(uint32_t) * (_index)) + + /* +- * nss_core_dma_cache_maint() +- * Perform the appropriate cache op based on direction ++ * Cache operation + */ +-static inline void nss_core_dma_cache_maint(void *start, uint32_t size, int direction) +-{ +- switch (direction) { +- case DMA_FROM_DEVICE:/* invalidate only */ +- dmac_inv_range(start, start + size); +- break; +- case DMA_TO_DEVICE:/* writeback only */ +- dmac_clean_range(start, start + size); +- break; +- case DMA_BIDIRECTIONAL:/* writeback and invalidate */ +- dmac_flush_range(start, start + size); +- break; +- default: +- BUG(); +- } +-} ++#define NSS_CORE_DSB() dsb(sy) ++#define NSS_CORE_DMA_CACHE_MAINT(dev, start, size, dir) BUILD_BUG_ON_MSG(1, \ ++ "NSS_CORE_DMA_CACHE_MAINT is deprecated. Fix the code to use correct dma_sync_* API") + + #define NSS_DEVICE_IF_START NSS_PHYSICAL_IF_START + +--- a/nss_hal/ipq806x/nss_hal_pvt.c ++++ b/nss_hal/ipq806x/nss_hal_pvt.c +@@ -477,10 +477,9 @@ static struct nss_platform_data *__nss_h + /* + * Clear TCM memory used by this core + */ +- for (i = 0; i < resource_size(&res_vphys) ; i += 4) { ++ for (i = 0; i < resource_size(&res_vphys) ; i += 4) + nss_write_32(npd->vmap, i, 0); +- NSS_CORE_DMA_CACHE_MAINT((npd->vmap + i), 4, DMA_TO_DEVICE); +- } ++ + NSS_CORE_DSB(); + + /* +--- a/nss_hal/ipq807x/nss_hal_pvt.c ++++ b/nss_hal/ipq807x/nss_hal_pvt.c +@@ -259,10 +259,9 @@ static struct nss_platform_data *__nss_h + /* + * Clear TCM memory used by this core + */ +- for (i = 0; i < resource_size(&res_vphys) ; i += 4) { ++ for (i = 0; i < resource_size(&res_vphys) ; i += 4) + nss_write_32(npd->vmap, i, 0); +- NSS_CORE_DMA_CACHE_MAINT((npd->vmap + i), 4, DMA_TO_DEVICE); +- } ++ + NSS_CORE_DSB(); + + /* +--- a/nss_meminfo.c ++++ b/nss_meminfo.c +@@ -415,7 +415,6 @@ static bool nss_meminfo_init_block_lists + /* + * Flush the updated meminfo request. + */ +- NSS_CORE_DMA_CACHE_MAINT(r, sizeof(struct nss_meminfo_request), DMA_TO_DEVICE); + NSS_CORE_DSB(); + + /* +@@ -546,7 +545,7 @@ static bool nss_meminfo_configure_n2h_h2 + * Bring a fresh copy of if_map from memory in order to read it correctly. + */ + if_map = mem_ctx->if_map; +- NSS_CORE_DMA_CACHE_MAINT((void *)if_map, sizeof(struct nss_if_mem_map), DMA_FROM_DEVICE); ++ dma_sync_single_for_cpu(nss_ctx->dev, mem_ctx->if_map_dma, sizeof(struct nss_if_mem_map), DMA_FROM_DEVICE); + NSS_CORE_DSB(); + + if_map->n2h_rings = NSS_N2H_RING_COUNT; +@@ -584,7 +583,7 @@ static bool nss_meminfo_configure_n2h_h2 + /* + * Flush the updated nss_if_mem_map. + */ +- NSS_CORE_DMA_CACHE_MAINT((void *)if_map, sizeof(struct nss_if_mem_map), DMA_TO_DEVICE); ++ dma_sync_single_for_device(nss_ctx->dev, mem_ctx->if_map_dma, sizeof(struct nss_if_mem_map), DMA_TO_DEVICE); + NSS_CORE_DSB(); + + return true; +--- a/nss_profiler.c ++++ b/nss_profiler.c +@@ -209,11 +209,12 @@ EXPORT_SYMBOL(nss_profile_dma_deregister + struct nss_profile_sdma_ctrl *nss_profile_dma_get_ctrl(struct nss_ctx_instance *nss_ctx) + { + struct nss_profile_sdma_ctrl *ctrl = nss_ctx->meminfo_ctx.sdma_ctrl; ++ int size = offsetof(struct nss_profile_sdma_ctrl, cidx); + if (!ctrl) { + return ctrl; + } + +- dmac_inv_range(ctrl, &ctrl->cidx); ++ dma_sync_single_for_cpu(nss_ctx->dev, (dma_addr_t) ctrl, size, DMA_FROM_DEVICE); + dsb(sy); + return ctrl; + } diff --git a/package/qca/qca-nss-drv/patches/0005-nss-drv-rework-getting-the-reserved-memory-size.patch b/package/qca/qca-nss-drv/patches/0005-nss-drv-rework-getting-the-reserved-memory-size.patch new file mode 100644 index 000000000..7bb8549e5 --- /dev/null +++ b/package/qca/qca-nss-drv/patches/0005-nss-drv-rework-getting-the-reserved-memory-size.patch @@ -0,0 +1,114 @@ +From 1c2b564d7b29644765925a784d468f40555ded8a Mon Sep 17 00:00:00 2001 +From: Robert Marko +Date: Fri, 10 Feb 2023 12:50:51 +0100 +Subject: [PATCH] nss-drv: rework getting the reserved-memory size + +Currently, the way NSS DRV gets the reserved memory node strictly depends +on the nss@40000000 node being present so it can find it after globaly +looking for the reserved-memory node and then going through its children. + +After that its evaluation the address and size cells manually in order to +properly calculate the size of reserved-memory. + +We can make this way more reliable and generic, so lets pass the memory +region wia the NSS common DTS node, match it via its compatible and then +get the memory region phandle and simply convert it to a resource. + +Signed-off-by: Robert Marko +--- + nss_core.c | 70 +++++++++++++++++++++++------------------------------- + 1 file changed, 30 insertions(+), 40 deletions(-) + +--- a/nss_core.c ++++ b/nss_core.c +@@ -26,6 +26,8 @@ + #include + #include + #include ++#include ++#include + #include + #include + #ifdef CONFIG_BRIDGE_NETFILTER +@@ -492,50 +494,38 @@ static void nss_core_handle_crypto_pkt(s + */ + static uint32_t nss_soc_mem_info(void) + { +- struct device_node *node; +- struct device_node *snode; +- int addr_cells; +- int size_cells; +- int n_items; +- uint32_t nss_msize = 8 << 20; /* default: 8MB */ +- const __be32 *ppp; +- +- node = of_find_node_by_name(NULL, "reserved-memory"); +- if (!node) { +- nss_info_always("reserved-memory not found\n"); +- return nss_msize; +- } +- +- ppp = (__be32 *)of_get_property(node, "#address-cells", NULL); +- addr_cells = ppp ? be32_to_cpup(ppp) : 2; +- nss_info("%px addr cells %d\n", ppp, addr_cells); +- ppp = (__be32 *)of_get_property(node, "#size-cells", NULL); +- size_cells = ppp ? be32_to_cpup(ppp) : 2; +- nss_info("%px size cells %d\n", ppp, size_cells); +- +- for_each_child_of_node(node, snode) { +- /* +- * compare (snode->full_name, "/reserved-memory/nss@40000000") may be safer +- */ +- nss_info("%px snode %s fn %s\n", snode, snode->name, snode->full_name); +- if (strcmp(snode->name, "nss") == 0) +- break; +- } +- of_node_put(node); +- if (!snode) { +- nss_info_always("nss@node not found: needed to determine NSS reserved DDR\n"); +- return nss_msize; +- } +- +- ppp = (__be32 *)of_get_property(snode, "reg", &n_items); +- if (ppp) { +- n_items /= sizeof(ppp[0]); +- nss_msize = be32_to_cpup(ppp + addr_cells + size_cells - 1); +- nss_info("addr/size storage words %d %d # words %d in DTS, ddr size %x\n", +- addr_cells, size_cells, n_items, nss_msize); ++ struct device_node *common_node, *memory_node; ++ struct resource r; ++ int ret; ++ ++ common_node = of_find_compatible_node(NULL, NULL, "qcom,nss-common"); ++ if (!common_node) { ++ nss_info_always("NSS common node not found!\n"); ++ goto err_use_default_memsize; ++ } ++ ++ memory_node = of_parse_phandle(common_node, "memory-region", 0); ++ if (!memory_node) { ++ nss_info_always("NSS reserved-memory node not found!\n"); ++ goto err_use_default_memsize; ++ } ++ ++ ret = of_address_to_resource(memory_node, 0, &r); ++ of_node_put(common_node); ++ of_node_put(memory_node); ++ if (ret) { ++ nss_info_always("NSS reserved-memory resource not found!\n"); ++ goto err_use_default_memsize; + } +- of_node_put(snode); +- return nss_msize; ++ ++ nss_info_always("NSS DDR size is 0x%x\n", (uint32_t) resource_size(&r)); ++ ++ return resource_size(&r); ++ ++err_use_default_memsize: ++ nss_info_always("Using default NSS reserved-memory size of 0x%x !\n", SZ_8M); ++ ++ return SZ_8M; + } + + /* diff --git a/package/qca/qca-nss-drv/patches/0006-nss-drv-Fix-nss_clmap_stats-enum-int-compilation-error-GCC-13.patch b/package/qca/qca-nss-drv/patches/0006-nss-drv-Fix-nss_clmap_stats-enum-int-compilation-error-GCC-13.patch new file mode 100644 index 000000000..7cdb0127f --- /dev/null +++ b/package/qca/qca-nss-drv/patches/0006-nss-drv-Fix-nss_clmap_stats-enum-int-compilation-error-GCC-13.patch @@ -0,0 +1,11 @@ +--- a/nss_clmap_stats.c ++++ b/nss_clmap_stats.c +@@ -63,7 +63,7 @@ void nss_clmap_stats_session_unregister( + * nss_clmap_stats_session_register + * Register debug statistic for clmap session. + */ +-bool nss_clmap_stats_session_register(uint32_t if_num, uint32_t if_type, struct net_device *netdev) ++bool nss_clmap_stats_session_register(uint32_t if_num, enum nss_clmap_interface_type if_type, struct net_device *netdev) + { + uint32_t i; + bool stats_status = false; diff --git a/package/qca/qca-nss-drv/patches/0007-nss-drv-Fix-nss_wifili_if-compilation-error-GCC-13.patch b/package/qca/qca-nss-drv/patches/0007-nss-drv-Fix-nss_wifili_if-compilation-error-GCC-13.patch new file mode 100644 index 000000000..0abeab1ad --- /dev/null +++ b/package/qca/qca-nss-drv/patches/0007-nss-drv-Fix-nss_wifili_if-compilation-error-GCC-13.patch @@ -0,0 +1,11 @@ +--- a/exports/nss_wifili_if.h ++++ b/exports/nss_wifili_if.h +@@ -2207,7 +2207,7 @@ void nss_wifili_release_external_if(nss_ + */ + uint8_t nss_wifili_thread_scheme_alloc(struct nss_ctx_instance *nss_ctx, + int32_t radio_ifnum, +- uint32_t radio_priority); ++ enum nss_wifili_thread_scheme_priority radio_priority); + + /** + * nss_wifili_thread_scheme_dealloc diff --git a/package/qca/qca-nss-drv/patches/0008-add-kernel-6.1-support.patch b/package/qca/qca-nss-drv/patches/0008-add-kernel-6.1-support.patch new file mode 100644 index 000000000..1ab62585f --- /dev/null +++ b/package/qca/qca-nss-drv/patches/0008-add-kernel-6.1-support.patch @@ -0,0 +1,250 @@ +--- a/nss_hal/fsm9010/nss_hal_pvt.c ++++ b/nss_hal/fsm9010/nss_hal_pvt.c +@@ -291,7 +291,11 @@ static int __nss_hal_request_irq(struct + } + + int_ctx->irq = npd->irq[irq_num]; +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi, 64); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) ++ netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi, 64); ++#else ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi, 64); ++#endif + return 0; + } + +--- a/nss_hal/ipq50xx/nss_hal_pvt.c ++++ b/nss_hal/ipq50xx/nss_hal_pvt.c +@@ -599,7 +599,11 @@ static int __nss_hal_request_irq(struct + return err; + } + +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, napi_poll_cb, napi_wgt); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) ++ netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, napi_poll_cb, napi_wgt); ++#else ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, napi_poll_cb, napi_wgt); ++#endif + int_ctx->cause = cause; + err = request_irq(irq, nss_hal_handle_irq, 0, irq_name, int_ctx); + if (err) { +--- a/nss_hal/ipq60xx/nss_hal_pvt.c ++++ b/nss_hal/ipq60xx/nss_hal_pvt.c +@@ -615,62 +615,102 @@ static int __nss_hal_request_irq(struct + irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY); + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_EMPTY_BUFFER_SOS) { +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_non_queue, NSS_EMPTY_BUFFER_SOS_PROCESSING_WEIGHT); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) ++ netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_non_queue, NSS_EMPTY_BUFFER_SOS_PROCESSING_WEIGHT); ++#else ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_non_queue, NSS_EMPTY_BUFFER_SOS_PROCESSING_WEIGHT); ++#endif + int_ctx->cause = NSS_N2H_INTR_EMPTY_BUFFERS_SOS; + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_empty_buf_sos", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_EMPTY_BUFFER_QUEUE) { +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_EMPTY_BUFFER_RETURN_PROCESSING_WEIGHT); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) ++ netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_EMPTY_BUFFER_RETURN_PROCESSING_WEIGHT); ++#else ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_EMPTY_BUFFER_RETURN_PROCESSING_WEIGHT); ++#endif + int_ctx->cause = NSS_N2H_INTR_EMPTY_BUFFER_QUEUE; + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_empty_buf_queue", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_TX_UNBLOCKED) { +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_non_queue, NSS_TX_UNBLOCKED_PROCESSING_WEIGHT); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) ++ netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_non_queue, NSS_TX_UNBLOCKED_PROCESSING_WEIGHT); ++#else ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_non_queue, NSS_TX_UNBLOCKED_PROCESSING_WEIGHT); ++#endif + int_ctx->cause = NSS_N2H_INTR_TX_UNBLOCKED; + err = request_irq(irq, nss_hal_handle_irq, 0, "nss-tx-unblock", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_DATA_QUEUE_0) { +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) ++ netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#else ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#endif + int_ctx->cause = NSS_N2H_INTR_DATA_QUEUE_0; + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_queue0", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_DATA_QUEUE_1) { + int_ctx->cause = NSS_N2H_INTR_DATA_QUEUE_1; +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) ++ netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#else ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#endif + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_queue1", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_DATA_QUEUE_2) { + int_ctx->cause = NSS_N2H_INTR_DATA_QUEUE_2; +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) ++ netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#else ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#endif + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_queue2", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_DATA_QUEUE_3) { + int_ctx->cause = NSS_N2H_INTR_DATA_QUEUE_3; +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) ++ netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#else ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#endif + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_queue3", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_COREDUMP_COMPLETE) { + int_ctx->cause = NSS_N2H_INTR_COREDUMP_COMPLETE; +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_emergency, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) ++ netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_emergency, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#else ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_emergency, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#endif + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_coredump_complete", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_PAGED_EMPTY_BUFFER_SOS) { +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_non_queue, NSS_EMPTY_BUFFER_SOS_PROCESSING_WEIGHT); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) ++ netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_non_queue, NSS_EMPTY_BUFFER_SOS_PROCESSING_WEIGHT); ++#else ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_non_queue, NSS_EMPTY_BUFFER_SOS_PROCESSING_WEIGHT); ++#endif + int_ctx->cause = NSS_N2H_INTR_PAGED_EMPTY_BUFFERS_SOS; + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_paged_empty_buf_sos", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_PROFILE_DMA) { + int_ctx->cause = NSS_N2H_INTR_PROFILE_DMA; +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_sdma, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) ++ netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_sdma, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#else ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_sdma, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++#endif + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_profile_dma", int_ctx); + } + +--- a/nss_hal/ipq806x/nss_hal_pvt.c ++++ b/nss_hal/ipq806x/nss_hal_pvt.c +@@ -1185,7 +1185,11 @@ static int __nss_hal_request_irq(struct + } + + int_ctx->irq = npd->irq[irq_num]; +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi, 64); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) ++ netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi, 64); ++#else ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi, 64); ++#endif + + return 0; + } +--- a/nss_hal/ipq807x/nss_hal_pvt.c ++++ b/nss_hal/ipq807x/nss_hal_pvt.c +@@ -659,62 +659,62 @@ static int __nss_hal_request_irq(struct + irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY); + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_EMPTY_BUFFER_SOS) { +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_non_queue, NSS_EMPTY_BUFFER_SOS_PROCESSING_WEIGHT); ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_non_queue, NSS_EMPTY_BUFFER_SOS_PROCESSING_WEIGHT); + int_ctx->cause = NSS_N2H_INTR_EMPTY_BUFFERS_SOS; + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_empty_buf_sos", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_EMPTY_BUFFER_QUEUE) { +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_EMPTY_BUFFER_RETURN_PROCESSING_WEIGHT); ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_EMPTY_BUFFER_RETURN_PROCESSING_WEIGHT); + int_ctx->cause = NSS_N2H_INTR_EMPTY_BUFFER_QUEUE; + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_empty_buf_queue", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_TX_UNBLOCKED) { +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_non_queue, NSS_TX_UNBLOCKED_PROCESSING_WEIGHT); ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_non_queue, NSS_TX_UNBLOCKED_PROCESSING_WEIGHT); + int_ctx->cause = NSS_N2H_INTR_TX_UNBLOCKED; + err = request_irq(irq, nss_hal_handle_irq, 0, "nss-tx-unblock", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_DATA_QUEUE_0) { +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); + int_ctx->cause = NSS_N2H_INTR_DATA_QUEUE_0; + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_queue0", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_DATA_QUEUE_1) { + int_ctx->cause = NSS_N2H_INTR_DATA_QUEUE_1; +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_queue1", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_DATA_QUEUE_2) { + int_ctx->cause = NSS_N2H_INTR_DATA_QUEUE_2; +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_queue2", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_DATA_QUEUE_3) { + int_ctx->cause = NSS_N2H_INTR_DATA_QUEUE_3; +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_queue, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_queue3", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_COREDUMP_COMPLETE) { + int_ctx->cause = NSS_N2H_INTR_COREDUMP_COMPLETE; +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_emergency, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_emergency, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_coredump_complete", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_PAGED_EMPTY_BUFFER_SOS) { +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_non_queue, NSS_EMPTY_BUFFER_SOS_PROCESSING_WEIGHT); ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_non_queue, NSS_EMPTY_BUFFER_SOS_PROCESSING_WEIGHT); + int_ctx->cause = NSS_N2H_INTR_PAGED_EMPTY_BUFFERS_SOS; + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_paged_empty_buf_sos", int_ctx); + } + + if (irq_num == NSS_HAL_N2H_INTR_PURPOSE_PROFILE_DMA) { + int_ctx->cause = NSS_N2H_INTR_PROFILE_DMA; +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_sdma, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, nss_core_handle_napi_sdma, NSS_DATA_COMMAND_BUFFER_PROCESSING_WEIGHT); + err = request_irq(irq, nss_hal_handle_irq, 0, "nss_profile_dma", int_ctx); + } + +--- a/nss_hal/ipq95xx/nss_hal_pvt.c ++++ b/nss_hal/ipq95xx/nss_hal_pvt.c +@@ -889,7 +889,11 @@ static int __nss_hal_request_irq(struct + return err; + } + +- netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, napi_poll_cb, napi_wgt); ++#if LINUX_VERSION_CODE < KERNEL_VERSION(6, 1, 0) ++ netif_napi_add(&nss_ctx->napi_ndev, &int_ctx->napi, napi_poll_cb, napi_wgt); ++#else ++ netif_napi_add_weight(&nss_ctx->napi_ndev, &int_ctx->napi, napi_poll_cb, napi_wgt); ++#endif + int_ctx->cause = cause; + err = request_irq(irq, nss_hal_handle_irq, 0, irq_name, int_ctx); + if (err) { diff --git a/package/qca/qca-nss-ecm/Makefile b/package/qca/qca-nss-ecm/Makefile new file mode 100644 index 000000000..c5de42d92 --- /dev/null +++ b/package/qca/qca-nss-ecm/Makefile @@ -0,0 +1,161 @@ +include $(TOPDIR)/rules.mk + +PKG_NAME:=qca-nss-ecm +PKG_RELEASE=2 + +PKG_SOURCE_PROTO:=git +PKG_SOURCE_DATE:=2023-10-20 +PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/qca-nss-ecm.git +PKG_SOURCE_VERSION:=82b27915fffdbe2cdb2d4eb70e5736ccf92e2560 +PKG_MIRROR_HASH:=643895cb187cacfcde337c19dc5a34512acc225c0db1813a15cc1b66523835c4 + +PKG_BUILD_PARALLEL:=1 +PKG_FLAGS:=nonshared + +include $(INCLUDE_DIR)/kernel.mk +include $(INCLUDE_DIR)/package.mk + +define KernelPackage/qca-nss-ecm + SECTION:=kernel + CATEGORY:=Kernel modules + SUBMENU:=Network Support + DEPENDS:=@TARGET_qualcommax \ + +@NSS_DRV_IPV6_ENABLE \ + +@NSS_DRV_PPE_ENABLE \ + +@NSS_DRV_TUN6RD_ENABLE \ + +@NSS_DRV_PPPOE_ENABLE \ + +@NSS_DRV_PPTP_ENABLE \ + +@NSS_DRV_VIRT_IF_ENABLE \ + +@NSS_DRV_WIFI_ENABLE \ + +kmod-qca-nss-drv \ + +kmod-bonding +kmod-nf-conntrack \ + +kmod-ppp +kmod-pppoe +kmod-pptp \ + +PACKAGE_kmod-pppol2tp:kmod-pppol2tp \ + +PACKAGE_kmod-qca-mcs:kmod-qca-mcs \ + +PACKAGE_kmod-nat46:kmod-nat46 \ + +PACKAGE_kmod-vxlan:kmod-vxlan + TITLE:=QCA NSS Enhanced Connection Manager (ECM) + FILES:=$(PKG_BUILD_DIR)/ecm.ko + KCONFIG:=CONFIG_BRIDGE_NETFILTER=y \ + CONFIG_NF_CONNTRACK_EVENTS=y \ + CONFIG_NF_CONNTRACK_DSCPREMARK_EXT=y +endef + +define KernelPackage/qca-nss-ecm/Description +This package contains the QCA NSS Enhanced Connection Manager +endef + +define KernelPackage/qca-nss-ecm/install + $(INSTALL_DIR) $(1)/etc/firewall.d $(1)/etc/init.d $(1)/usr/bin $(1)/lib/netifd/offload $(1)/etc/config $(1)/etc/uci-defaults $(1)/etc/sysctl.d $(1)/etc/hotplug.d/net + $(INSTALL_DATA) ./files/qca-nss-ecm.firewall $(1)/etc/firewall.d/qca-nss-ecm + $(INSTALL_BIN) ./files/qca-nss-ecm.init $(1)/etc/init.d/qca-nss-ecm + $(INSTALL_BIN) ./files/ecm_dump.sh $(1)/usr/bin/ + $(INSTALL_BIN) ./files/disable_offloads.sh $(1)/usr/bin/ + $(INSTALL_BIN) ./files/on-demand-down $(1)/lib/netifd/offload/on-demand-down + $(INSTALL_DATA) ./files/qca-nss-ecm.uci $(1)/etc/config/ecm + $(INSTALL_DATA) ./files/qca-nss-ecm.defaults $(1)/etc/uci-defaults/99-qca-nss-ecm + $(INSTALL_BIN) ./files/qca-nss-ecm.sysctl $(1)/etc/sysctl.d/qca-nss-ecm.conf + $(INSTALL_BIN) ./files/disable_offloads.hotplug $(1)/etc/hotplug.d/net/99-disable_offloads +endef + +EXTRA_CFLAGS+= \ + -I$(STAGING_DIR)/usr/include/qca-nss-drv \ + -I$(STAGING_DIR)/usr/include/qca-mcs \ + -I$(STAGING_DIR)/usr/include/nat46 + +ifeq ($(BOARD),qualcommax) +ECM_MAKE_OPTS+=ECM_FRONT_END_NSS_ENABLE=y \ + ECM_FRONT_END_SFE_ENABLE=n \ + ECM_NON_PORTED_SUPPORT_ENABLE=y \ + ECM_INTERFACE_BOND_ENABLE=y \ + ECM_INTERFACE_VLAN_ENABLE=y \ + ECM_CLASSIFIER_MARK_ENABLE=y \ + ECM_CLASSIFIER_DSCP_ENABLE=y \ + ECM_CLASSIFIER_PCC_ENABLE=n \ + ECM_BAND_STEERING_ENABLE=n +endif + +# Disable ECM IPv6 support when global IPv6 support is disabled. +ifneq ($(CONFIG_IPV6),) +ECM_MAKE_OPTS+=ECM_IPV6_ENABLE=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-ovpn-link),) +ECM_MAKE_OPTS+=ECM_INTERFACE_OVPN_ENABLE=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-vxlanmgr),) +ECM_MAKE_OPTS+=ECM_INTERFACE_VXLAN_ENABLE=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-ovsmgr),) +ECM_MAKE_OPTS+=ECM_INTERFACE_OVS_BRIDGE_ENABLE=y \ + ECM_CLASSIFIER_OVS_ENABLE=y +EXTRA_CFLAGS+= -I$(STAGING_DIR)/usr/include/qca-ovsmgr +endif + +ifneq ($(CONFIG_PACKAGE_kmod-macvlan),) +ECM_MAKE_OPTS+=ECM_INTERFACE_MACVLAN_ENABLE=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-mcs),) +ECM_MAKE_OPTS+=ECM_MULTICAST_ENABLE=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-nat46),) +ECM_MAKE_OPTS+=ECM_INTERFACE_MAP_T_ENABLE=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-ipsec),) +ECM_MAKE_OPTS+=ECM_INTERFACE_IPSEC_ENABLE=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-pppoe),) +ECM_MAKE_OPTS+=ECM_INTERFACE_PPPOE_ENABLE=y \ + ECM_INTERFACE_PPTP_ENABLE=y \ + ECM_INTERFACE_PPP_ENABLE=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-pppol2tp),) +ECM_MAKE_OPTS+=ECM_INTERFACE_L2TPV2_ENABLE=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-gre)$(CONFIG_PACKAGE_kmod-gre6),) +ECM_MAKE_OPTS+=ECM_INTERFACE_GRE_TAP_ENABLE=y \ + ECM_INTERFACE_GRE_TUN_ENABLE=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-sit),) +ECM_MAKE_OPTS+=ECM_INTERFACE_SIT_ENABLE=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-ip6-tunnel),) +ECM_MAKE_OPTS+=ECM_INTERFACE_TUNIPIP6_ENABLE=y +endif + +ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-mscs),) +ECM_MAKE_OPTS+=ECM_CLASSIFIER_MSCS_ENABLE=y +endif + +define Build/InstallDev + mkdir -p $(1)/usr/include/qca-nss-ecm + $(CP) $(PKG_BUILD_DIR)/exports/* $(1)/usr/include/qca-nss-ecm +endef + +ifeq ($(CONFIG_TARGET_BOARD), "qualcommax") + SOC:=$(CONFIG_TARGET_SUBTARGET) +endif + +define Build/Compile + +$(MAKE) -C "$(LINUX_DIR)" $(strip $(ECM_MAKE_OPTS)) \ + CROSS_COMPILE="$(TARGET_CROSS)" \ + ARCH="$(LINUX_KARCH)" \ + $(KERNEL_MAKE_FLAGS) \ + M="$(PKG_BUILD_DIR)" \ + EXTRA_CFLAGS="$(EXTRA_CFLAGS) -Wno-error=unused-function " \ + SoC=$(SOC) \ + $(PKG_JOBS) \ + modules +endef + +$(eval $(call KernelPackage,qca-nss-ecm)) diff --git a/package/qca/qca-nss-ecm/files/disable_offloads.hotplug b/package/qca/qca-nss-ecm/files/disable_offloads.hotplug new file mode 100755 index 000000000..01c564740 --- /dev/null +++ b/package/qca/qca-nss-ecm/files/disable_offloads.hotplug @@ -0,0 +1,187 @@ +#!/bin/sh + +[ "$ACTION" != "add" ] && exit + +function log() +{ + local status="$1" + local feature="$2" + local interface="$3" + + if [ $status -eq 0 ]; then + logger "[ethtool] $feature: disabled on $interface" + fi + + if [ $status -eq 1 ]; then + logger -s "[ethtool] $feature: failed to disable on $interface" + fi + + if [ $status -gt 1 ]; then + logger "[ethtool] $feature: no changes performed on $interface" + fi +} + +function interface_is_virtual() +{ + local interface="$1" + [ -d /sys/devices/virtual/net/"$interface"/ ] || return 1 + return 0 +} + +function get_base_interface() +{ + local interface="$1" + echo "$interface" | grep -Eo '^[a-z]*[0-9]*' 2>/dev/null || return 1 + return 0 +} + +function disable_offloads() +{ + local interface="$1" + local features + local cmd + + # Check if we can change features + if ethtool -k $interface 1>/dev/null 2>/dev/null; then + # Filter whitespaces + # Get only enabled/not fixed features + # Filter features that are only changeable by global keyword + # Filter empty lines + # Cut to First column + features=$(ethtool -k "$interface" | awk '{$1=$1;print}' \ + | grep -E '^.+: on$' \ + | grep -v -E '^tx-checksum-.+$' \ + | grep -v -E '^tx-scatter-gather.+$' \ + | grep -v -E '^tx-tcp.+segmentation.+$' \ + | grep -v -E '^tx-udp-fragmentation$' \ + | grep -v -E '^tx-generic-segmentation$' \ + | grep -v -E '^rx-gro$' \ + | grep -v -E '^rx-gro$' \ + | grep -v -E '^$' \ + | cut -d: -f1) + + # Replace feature name by global keyword + features=$(echo "$features" | sed -e s/rx-checksumming/rx/ \ + -e s/tx-checksumming/tx/ \ + -e s/scatter-gather/sg/ \ + -e s/tcp-segmentation-offload/tso/ \ + -e s/udp-fragmentation-offload/ufo/ \ + -e s/generic-segmentation-offload/gso/ \ + -e s/generic-receive-offload/gro/ \ + -e s/large-receive-offload/lro/ \ + -e s/rx-vlan-offload/rxvlan/ \ + -e s/tx-vlan-offload/txvlan/ \ + -e s/ntuple-filters/ntuple/ \ + -e s/receive-hashing/rxhash/) + + # Check if we can disable anything + if [ -z "$features" ]; then + logger "[ethtool] offloads: no changes performed on $interface" + return 0 + fi + + # Construct ethtool command line + cmd="-K $interface" + + for feature in $features; do + cmd="$cmd $feature off" + done + + # Try to disable offloads + ethtool $cmd 1>/dev/null 2>/dev/null + log $? "Offloads" "$interface" + + else + log $? "Offloads" "$interface" + fi +} + +function disable_flow_control() +{ + local interface="$1" + local features + local cmd + + # Check if we can change settings + if ethtool -a $interface 1>/dev/null 2>/dev/null; then + # Construct ethtool command line + cmd="-A $interface autoneg off tx off rx off" + + # Try to disable flow control + ethtool $cmd 1>/dev/null 2>/dev/null + log $? "Flow Control" "$interface" + + else + log $? "Flow Control" "$interface" + fi +} + +function disable_interrupt_moderation() +{ + local interface="$1" + local features + local cmd + + # Check if we can change settings + if ethtool -c $interface 1>/dev/null 2>/dev/null; then + # Construct ethtool command line + cmd="-C $interface adaptive-tx off adaptive-rx off" + + # Try to disable adaptive interrupt moderation + ethtool $cmd 1>/dev/null 2>/dev/null + log $? "Adaptive Interrupt Moderation" "$interface" + + features=$(ethtool -c $interface | awk '{$1=$1;print}' \ + | grep -v -E '^.+: 0$|Adaptive|Coalesce' \ + | grep -v -E '^$' \ + | cut -d: -f1) + + # Check if we can disable anything + if [ -z "$features" ]; then + logger "[ethtool] Interrupt Moderation: no changes performed on $interface" + return 0 + fi + + # Construct ethtool command line + cmd="-C $interface" + + for feature in $features; do + cmd="$cmd $feature 0" + done + + # Try to disable interrupt Moderation + ethtool $cmd 1>/dev/null 2>/dev/null + log $? "Interrupt Moderation" "$interface" + + else + log $? "Interrupt Moderation" "$interface" + fi +} + +function disable_interface_offloads() { + #local interface=$(get_base_interface "$1") + #{ [ -z "$interface" ] || interface_is_virtual "$interface"; } && exit 0 + + local interface="$1" + + local disable_offloads="$(uci get ecm.@general[0].disable_offloads)" + if [ "$disable_offloads" -eq 1 ]; then + disable_offloads "$interface" + fi + + local disable_flow_control="$(uci get ecm.@general[0].disable_flow_control)" + if [ "$disable_flow_control" -eq 1 ]; then + disable_flow_control "$interface" + fi + + local disable_interrupt_moderation="$(uci get ecm.@general[0].disable_interrupt_moderation)" + if [ "$disable_interrupt_moderation" -eq 1 ]; then + disable_interrupt_moderation "$interface" + fi +} + +if [ "$ACTION" = add ]; then + disable_interface_offloads "$INTERFACE" +fi + +exit 0 diff --git a/package/qca/qca-nss-ecm/files/disable_offloads.sh b/package/qca/qca-nss-ecm/files/disable_offloads.sh new file mode 100755 index 000000000..9f8394fe7 --- /dev/null +++ b/package/qca/qca-nss-ecm/files/disable_offloads.sh @@ -0,0 +1,189 @@ +#!/bin/sh +# +# Helper script which uses ethtool to disable (most) +# interface offloads, if possible. +# +# Reference: +# https://forum.openwrt.org/t/how-to-make-ethtool-setting-persistent-on-br-lan/6433/14 +# + +function log() +{ + local status="$1" + local feature="$2" + local interface="$3" + + if [ $status -eq 0 ]; then + logger "[ethtool] $feature: disabled on $interface" + fi + + if [ $status -eq 1 ]; then + logger -s "[ethtool] $feature: failed to disable on $interface" + fi + + if [ $status -gt 1 ]; then + logger "[ethtool] $feature: no changes performed on $interface" + fi +} + +function interface_is_virtual() +{ + local interface="$1" + [ -d /sys/devices/virtual/net/"$interface"/ ] || return 1 + return 0 +} + +function get_base_interface() +{ + local interface="$1" + echo "$interface" | grep -Eo '^[a-z]*[0-9]*' 2>/dev/null || return 1 + return 0 +} + +function disable_offloads() +{ + local interface="$1" + local features + local cmd + + # Check if we can change features + if ethtool -k $interface 1>/dev/null 2>/dev/null; then + + # Filter whitespaces + # Get only enabled/not fixed features + # Filter features that are only changeable by global keyword + # Filter empty lines + # Cut to First column + features=$(ethtool -k "$interface" | awk '{$1=$1;print}' \ + | grep -E '^.+: on$' \ + | grep -v -E '^tx-checksum-.+$' \ + | grep -v -E '^tx-scatter-gather.+$' \ + | grep -v -E '^tx-tcp.+segmentation.+$' \ + | grep -v -E '^tx-udp-fragmentation$' \ + | grep -v -E '^tx-generic-segmentation$' \ + | grep -v -E '^rx-gro$' \ + | grep -v -E '^rx-gro$' \ + | grep -v -E '^$' \ + | cut -d: -f1) + + # Replace feature name by global keyword + features=$(echo "$features" | sed -e s/rx-checksumming/rx/ \ + -e s/tx-checksumming/tx/ \ + -e s/scatter-gather/sg/ \ + -e s/tcp-segmentation-offload/tso/ \ + -e s/udp-fragmentation-offload/ufo/ \ + -e s/generic-segmentation-offload/gso/ \ + -e s/generic-receive-offload/gro/ \ + -e s/large-receive-offload/lro/ \ + -e s/rx-vlan-offload/rxvlan/ \ + -e s/tx-vlan-offload/txvlan/ \ + -e s/ntuple-filters/ntuple/ \ + -e s/receive-hashing/rxhash/) + + # Check if we can disable anything + if [ -z "$features" ]; then + logger "[ethtool] offloads: no changes performed on $interface" + return 0 + fi + + # Construct ethtool command line + cmd="-K $interface" + + for feature in $features; do + cmd="$cmd $feature off" + done + + # Try to disable offloads + ethtool $cmd 1>/dev/null 2>/dev/null + log $? "Offloads" "$interface" + + else + log $? "Offloads" "$interface" + fi +} + +function disable_flow_control() +{ + local interface="$1" + local features + local cmd + + # Check if we can change settings + if ethtool -a $interface 1>/dev/null 2>/dev/null; then + + # Construct ethtool command line + cmd="-A $interface autoneg off tx off rx off" + + # Try to disable flow control + ethtool $cmd 1>/dev/null 2>/dev/null + log $? "Flow Control" "$interface" + + else + log $? "Flow Control" "$interface" + fi +} + +function disable_interrupt_moderation() +{ + local interface="$1" + local features + local cmd + + # Check if we can change settings + if ethtool -c $interface 1>/dev/null 2>/dev/null; then + # Construct ethtool command line + cmd="-C $interface adaptive-tx off adaptive-rx off" + + # Try to disable adaptive interrupt moderation + ethtool $cmd 1>/dev/null 2>/dev/null + log $? "Adaptive Interrupt Moderation" "$interface" + + features=$(ethtool -c $interface | awk '{$1=$1;print}' \ + | grep -v -E '^.+: 0$|Adaptive|Coalesce' \ + | grep -v -E '^$' \ + | cut -d: -f1) + + # Check if we can disable anything + if [ -z "$features" ]; then + logger "[ethtool] Interrupt Moderation: no changes performed on $interface" + return 0 + fi + + # Construct ethtool command line + cmd="-C $interface" + + for feature in $features; do + cmd="$cmd $feature 0" + done + + # Try to disable interrupt Moderation + ethtool $cmd 1>/dev/null 2>/dev/null + log $? "Interrupt Moderation" "$interface" + + else + log $? "Interrupt Moderation" "$interface" + fi +} + +function main() +{ + for interface in /sys/class/net/*; do + interface=$(basename $interface) + + #interface=$(get_base_interface "$interface") + #{ [ -z "$interface" ] || interface_is_virtual "$interface"; } && exit 0 + + # Skip Loopback + if [ $interface == lo ]; then + continue + fi + + disable_offloads "$interface" + disable_flow_control "$interface" + disable_interrupt_moderation "$interface" + done +} + +main + +exit 0 diff --git a/package/qca/qca-nss-ecm/files/ecm_dump.sh b/package/qca/qca-nss-ecm/files/ecm_dump.sh new file mode 100755 index 000000000..dbf7de753 --- /dev/null +++ b/package/qca/qca-nss-ecm/files/ecm_dump.sh @@ -0,0 +1,95 @@ +#!/bin/sh +# +# Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +# + +ECM_MODULE=${1:-ecm_state} +MOUNT_ROOT=/dev/ecm + +# +# usage: ecm_dump.sh [module=ecm_db] +# +# with no parameters, ecm_dump.sh will attempt to mount the +# ecm_db state file and cat its contents. +# +# example with a parameter: ecm_dump.sh ecm_classifier_default +# +# this will cause ecm_dump to attempt to find and mount the state +# file for the ecm_classifier_default module, and if successful +# cat the contents. +# + +# this is one of the state files, which happens to be the +# last module started in ecm +ECM_STATE=/sys/kernel/debug/ecm/ecm_state/state_dev_major + +# tests to see if ECM is up and ready to receive commands. +# returns 0 if ECM is fully up and ready, else 1 +ecm_is_ready() { + if [ ! -e "${ECM_STATE}" ] + then + return 1 + fi + return 0 +} + +# +# module_state_mount(module_name) +# Mounts the state file of the module, if supported +# +module_state_mount() { + local module_name=$1 + local mount_dir=$2 + local state_file="/sys/kernel/debug/ecm/${module_name}/state_dev_major" + + if [ -e "${mount_dir}/${module_name}" ] + then + # already mounted + return 0 + fi + + #echo "Mount state file for $module_name ..." + if [ ! -e "$state_file" ] + then + #echo "... $module_name does not support state" + return 1 + fi + + local major="`cat $state_file`" + #echo "... Mounting state $state_file with major: $major" + mknod "${mount_dir}/${module_name}" c $major 0 +} + +# +# main +# +ecm_is_ready || { + #echo "ECM is not running" + exit 1 +} + +# all state files are mounted under MOUNT_ROOT, so make sure it exists +mkdir -p ${MOUNT_ROOT} + +# +# attempt to mount state files for the requested module and cat it +# if the mount succeeded +# +module_state_mount ${ECM_MODULE} ${MOUNT_ROOT} && { + cat ${MOUNT_ROOT}/${ECM_MODULE} + exit 0 +} + +exit 2 diff --git a/package/qca/qca-nss-ecm/files/on-demand-down b/package/qca/qca-nss-ecm/files/on-demand-down new file mode 100644 index 000000000..02d708e03 --- /dev/null +++ b/package/qca/qca-nss-ecm/files/on-demand-down @@ -0,0 +1,6 @@ +#!/bin/sh +# Copyright (c) 2016 The Linux Foundation. All rights reserved. + +[ -e "/sys/kernel/debug/ecm/ecm_db/defunct_all" ] && { + echo 1 > /sys/kernel/debug/ecm/ecm_db/defunct_all +} diff --git a/package/qca/qca-nss-ecm/files/qca-nss-ecm.defaults b/package/qca/qca-nss-ecm/files/qca-nss-ecm.defaults new file mode 100644 index 000000000..308e265c9 --- /dev/null +++ b/package/qca/qca-nss-ecm/files/qca-nss-ecm.defaults @@ -0,0 +1,28 @@ +#!/bin/sh +# +# Copyright (c) 2015-2016, The Linux Foundation. All rights reserved. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +# + +uci -q batch << EOF + delete firewall.qcanssecm + set firewall.qcanssecm=include + set firewall.qcanssecm.type=script + set firewall.qcanssecm.path=/etc/firewall.d/qca-nss-ecm + set firewall.qcanssecm.family=any + set firewall.qcanssecm.reload=1 + commit firewall +EOF + +exit 0 diff --git a/package/qca/qca-nss-ecm/files/qca-nss-ecm.firewall b/package/qca/qca-nss-ecm/files/qca-nss-ecm.firewall new file mode 100644 index 000000000..2ec5b7e51 --- /dev/null +++ b/package/qca/qca-nss-ecm/files/qca-nss-ecm.firewall @@ -0,0 +1,11 @@ +#!/bin/sh +if [ ! -r /sbin/fw4 ]; then +iptables-save|grep physdev-is-bridged|while read a; do + iptables -D FORWARD -m physdev --physdev-is-bridged -j ACCEPT +done +iptables -I FORWARD 1 -m physdev --physdev-is-bridged -j ACCEPT +ip6tables-save|grep physdev-is-bridged|while read a; do + ip6tables -D FORWARD -m physdev --physdev-is-bridged -j ACCEPT +done +ip6tables -I FORWARD 1 -m physdev --physdev-is-bridged -j ACCEPT +fi diff --git a/package/qca/qca-nss-ecm/files/qca-nss-ecm.init b/package/qca/qca-nss-ecm/files/qca-nss-ecm.init new file mode 100644 index 000000000..461c70d49 --- /dev/null +++ b/package/qca/qca-nss-ecm/files/qca-nss-ecm.init @@ -0,0 +1,137 @@ +#!/bin/sh /etc/rc.common +# +# Copyright (c) 2014, 2019-2020 The Linux Foundation. All rights reserved. +# +# Permission to use, copy, modify, and/or distribute this software for any +# purpose with or without fee is hereby granted, provided that the above +# copyright notice and this permission notice appear in all copies. +# +# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + +# The shebang above has an extra space intentially to avoid having +# openwrt build scripts automatically enable this package starting +# at boot. + +START=19 + +get_front_end_mode() { + config_load "ecm" + config_get front_end global acceleration_engine "auto" + + case $front_end in + auto) + echo '0' + ;; + nss) + echo '1' + ;; + *) + echo 'uci_option_acceleration_engine is invalid' + esac +} + +support_bridge() { + # NSS support bridge acceleration + [ -d /sys/kernel/debug/ecm/ecm_nss_ipv4 ] && [ -d /sys/kernel/debug/ecm/ecm_nss_ipv6 ] && return 0 +} + +enable_bridge_filtering() { + sysctl -w net.bridge.bridge-nf-call-arptables=0 + sysctl -w net.bridge.bridge-nf-call-iptables=0 + sysctl -w net.bridge.bridge-nf-call-ip6tables=0 + + if ([ -z "$(grep "net.bridge.bridge-nf-call-arptables=0" /etc/sysctl.d/qca-nss-ecm.conf)" ] && \ + [ -z "$(grep "net.bridge.bridge-nf-call-iptables=0" /etc/sysctl.d/qca-nss-ecm.conf)" ] && \ + [ -z "$(grep "net.bridge.bridge-nf-call-ip6tables=0" /etc/sysctl.d/qca-nss-ecm.conf)" ] \ + ); then + echo 'net.bridge.bridge-nf-call-arptables=0' >> /etc/sysctl.d/qca-nss-ecm.conf + echo 'net.bridge.bridge-nf-call-iptables=0' >> /etc/sysctl.d/qca-nss-ecm.conf + echo 'net.bridge.bridge-nf-call-ip6tables=0' >> /etc/sysctl.d/qca-nss-ecm.conf + fi +} + +disable_bridge_filtering() { + sysctl -w net.bridge.bridge-nf-call-arptables=0 + sysctl -w net.bridge.bridge-nf-call-iptables=0 + sysctl -w net.bridge.bridge-nf-call-ip6tables=0 + + sed '/net.bridge.bridge-nf-call-arptables/d' -i /etc/sysctl.d/qca-nss-ecm.conf + sed '/net.bridge.bridge-nf-call-iptables/d' -i /etc/sysctl.d/qca-nss-ecm.conf + sed '/net.bridge.bridge-nf-call-ip6tables/d' -i /etc/sysctl.d/qca-nss-ecm.conf +} + +load_ecm() { + [ -d /sys/module/ecm ] || { + insmod ecm front_end_selection=$(get_front_end_mode) + echo 1 > /sys/kernel/debug/ecm/ecm_classifier_default/accel_delay_pkts + } + + support_bridge && enable_bridge_filtering +} + +unload_ecm() { + disable_bridge_filtering + + if [ -d /sys/module/ecm ]; then + # + # Stop ECM frontends + # + echo 1 > /sys/kernel/debug/ecm/front_end_ipv4_stop + echo 1 > /sys/kernel/debug/ecm/front_end_ipv6_stop + + # + # Defunct the connections + # + echo 1 > /sys/kernel/debug/ecm/ecm_db/defunct_all + sleep 5 + + rmmod ecm + sleep 1 + fi +} + +start() { + load_ecm + + # If the acceleration engine is NSS, enable wifi redirect + [ -d /sys/kernel/debug/ecm/ecm_nss_ipv4 ] && sysctl -w dev.nss.general.redirect=1 + + # If bridge filtering is enabled, apply and persist the sysctl flags + local bridge_filtering_enabled="$(uci_get ecm @general[0] enable_bridge_filtering)" + if [ "$bridge_filtering_enabled" -eq 1 ]; then + echo "Bridge filtering is enabled in the ECM config, this will cause issues with NAT loopback!" + enable_bridge_filtering + fi + + if [ -d /sys/module/qca_ovsmgr ]; then + insmod ecm_ovs + fi +} + +stop() { + # If ECM is already not loaded, just return + if [ ! -d /sys/module/ecm ]; then + return + fi + + # If the acceleration engine is NSS, disable wifi redirect + [ -d /sys/kernel/debug/ecm/ecm_nss_ipv4 ] && sysctl -w dev.nss.general.redirect=0 + + # If bridge filtering is enabled, reset the sysctl flags + local bridge_filtering_enabled="$(uci_get ecm @general[0] enable_bridge_filtering)" + if [ "$bridge_filtering_enabled" -eq 1 ]; then + disable_bridge_filtering + fi + + if [ -d /sys/module/ecm_ovs ]; then + rmmod ecm_ovs + fi + + unload_ecm +} diff --git a/package/qca/qca-nss-ecm/files/qca-nss-ecm.sysctl b/package/qca/qca-nss-ecm/files/qca-nss-ecm.sysctl new file mode 100644 index 000000000..e5b0dced3 --- /dev/null +++ b/package/qca/qca-nss-ecm/files/qca-nss-ecm.sysctl @@ -0,0 +1 @@ +net.netfilter.nf_conntrack_max=65536 diff --git a/package/qca/qca-nss-ecm/files/qca-nss-ecm.uci b/package/qca/qca-nss-ecm/files/qca-nss-ecm.uci new file mode 100644 index 000000000..20c02bbf2 --- /dev/null +++ b/package/qca/qca-nss-ecm/files/qca-nss-ecm.uci @@ -0,0 +1,8 @@ +config ecm 'global' + option acceleration_engine 'auto' + +config general + option enable_bridge_filtering '1' + option disable_offloads '0' + option disable_flow_control '0' + option disable_interrupt_moderation '0' diff --git a/package/qca/qca-nss-ecm/patches/0001-treewide-componentize-the-module-even-more.patch b/package/qca/qca-nss-ecm/patches/0001-treewide-componentize-the-module-even-more.patch new file mode 100644 index 000000000..584f0a3fc --- /dev/null +++ b/package/qca/qca-nss-ecm/patches/0001-treewide-componentize-the-module-even-more.patch @@ -0,0 +1,361 @@ +From 09980e54011e2d95a9db2d6134f635bc90e5a7f2 Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Wed, 19 May 2021 02:38:53 +0200 +Subject: [PATCH 01/12] treewide: componentize the module even more + +Signed-off-by: Ansuel Smith +--- + Makefile | 57 +++++++++++++++++++++++++------- + Makefile_61.mk | 1 - + ecm_db/ecm_db_connection.c | 8 +++++ + ecm_db/ecm_db_node.c | 4 +++ + ecm_interface.c | 8 +++++ + frontends/ecm_front_end_common.c | 7 ++++ + 6 files changed, 72 insertions(+), 13 deletions(-) + +--- a/Makefile ++++ b/Makefile +@@ -17,7 +17,7 @@ + # ################################################### + # Makefile for the QCA NSS ECM + # ################################################### +-ifneq ($(findstring 6.1., $(KERNELVERSION)),) ++ifneq ($(findstring 6.2., $(KERNELVERSION)),) + include $(obj)/Makefile_61.mk + else + ifeq ($(ECM_FRONT_END_SFE_ENABLE), y) +@@ -134,9 +134,17 @@ ccflags-$(ECM_INTERFACE_BOND_ENABLE) += -DECM_INTERFACE_BOND_ENABLE + # Define ECM_INTERFACE_PPPOE_ENABLE=y in order + # to enable support for PPPoE acceleration. + # ############################################################################# +-ECM_INTERFACE_PPPOE_ENABLE=y ++ifndef $(ECM_INTERFACE_PPPOE_ENABLE) ++ ECM_INTERFACE_PPPOE_ENABLE=y ++endif + ccflags-$(ECM_INTERFACE_PPPOE_ENABLE) += -DECM_INTERFACE_PPPOE_ENABLE + ++# ############################################################################# ++# Define ECM_INTERFACE_L2TPV2_PPTP_ENABLE=y in order ++# to enable support for l2tpv2 or PPTP detection. ++# ############################################################################# ++ccflags-$(ECM_INTERFACE_L2TPV2_PPTP_ENABLE) += -DECM_INTERFACE_L2TPV2_PPTP_ENABLE ++ + # ############################################################################# + # Define ECM_INTERFACE_L2TPV2_ENABLE=y in order + # to enable support for l2tpv2 acceleration. +@@ -163,6 +171,12 @@ endif + endif + ccflags-$(ECM_INTERFACE_PPP_ENABLE) += -DECM_INTERFACE_PPP_ENABLE + ++# ############################################################################# ++# Define ECM_INTERFACE_GRE_ENABLE=y in order ++# to enable support for GRE detection. ++# ############################################################################# ++ccflags-$(ECM_INTERFACE_GRE_ENABLE) += -DECM_INTERFACE_GRE_ENABLE ++ + # ############################################################################# + # Define ECM_INTERFACE_GRE_TAP_ENABLE=y in order + # to enable support for GRE TAP interface. +@@ -246,7 +260,9 @@ ccflags-$(ECM_INTERFACE_OVS_BRIDGE_ENABLE) += -DECM_INTERFACE_OVS_BRIDGE_ENABLE + # ############################################################################# + # Define ECM_INTERFACE_VLAN_ENABLE=y in order to enable support for VLAN + # ############################################################################# +-ECM_INTERFACE_VLAN_ENABLE=y ++ifndef $(ECM_INTERFACE_VLAN_ENABLE) ++ ECM_INTERFACE_VLAN_ENABLE=y ++endif + ccflags-$(ECM_INTERFACE_VLAN_ENABLE) += -DECM_INTERFACE_VLAN_ENABLE + + # ############################################################################# +@@ -288,7 +304,9 @@ ccflags-$(ECM_CLASSIFIER_OVS_ENABLE) += -DECM_CLASSIFIER_OVS_ENABLE + # ############################################################################# + # Define ECM_CLASSIFIER_MARK_ENABLE=y in order to enable mark classifier. + # ############################################################################# +-ECM_CLASSIFIER_MARK_ENABLE=y ++ifndef $(ECM_CLASSIFIER_MARK_ENABLE) ++ ECM_CLASSIFIER_MARK_ENABLE=y ++endif + ecm-$(ECM_CLASSIFIER_MARK_ENABLE) += ecm_classifier_mark.o + ccflags-$(ECM_CLASSIFIER_MARK_ENABLE) += -DECM_CLASSIFIER_MARK_ENABLE + +@@ -312,7 +330,9 @@ ccflags-$(ECM_CLASSIFIER_NL_ENABLE) += -DECM_CLASSIFIER_NL_ENABLE + # ############################################################################# + # Define ECM_CLASSIFIER_DSCP_ENABLE=y in order to enable DSCP classifier. + # ############################################################################# +-ECM_CLASSIFIER_DSCP_ENABLE=y ++ifndef $(ECM_CLASSIFIER_DSCP_ENABLE) ++ ECM_CLASSIFIER_DSCP_ENABLE=y ++endif + ecm-$(ECM_CLASSIFIER_DSCP_ENABLE) += ecm_classifier_dscp.o + ccflags-$(ECM_CLASSIFIER_DSCP_ENABLE) += -DECM_CLASSIFIER_DSCP_ENABLE + ccflags-$(ECM_CLASSIFIER_DSCP_IGS) += -DECM_CLASSIFIER_DSCP_IGS +@@ -331,7 +351,9 @@ ccflags-$(ECM_CLASSIFIER_HYFI_ENABLE) += -DECM_CLASSIFIER_HYFI_ENABLE + # the Parental Controls subsystem classifier in ECM. Currently disabled until + # customers require it / if they need to integrate their Parental Controls with it. + # ############################################################################# +-ECM_CLASSIFIER_PCC_ENABLE=y ++ifndef $(ECM_CLASSIFIER_PCC_ENABLE) ++ ECM_CLASSIFIER_PCC_ENABLE=y ++endif + ecm-$(ECM_CLASSIFIER_PCC_ENABLE) += ecm_classifier_pcc.o + ccflags-$(ECM_CLASSIFIER_PCC_ENABLE) += -DECM_CLASSIFIER_PCC_ENABLE + +@@ -372,27 +394,36 @@ ccflags-$(ECM_NON_PORTED_SUPPORT_ENABLE) += -DECM_NON_PORTED_SUPPORT_ENABLE + # ############################################################################# + # Define ECM_STATE_OUTPUT_ENABLE=y to support XML state output + # ############################################################################# +-ECM_STATE_OUTPUT_ENABLE=y ++ifndef $(ECM_STATE_OUTPUT_ENABLE) ++ ECM_STATE_OUTPUT_ENABLE=y ++endif + ecm-$(ECM_STATE_OUTPUT_ENABLE) += ecm_state.o + ccflags-$(ECM_STATE_OUTPUT_ENABLE) += -DECM_STATE_OUTPUT_ENABLE + + # ############################################################################# + # Define ECM_DB_ADVANCED_STATS_ENABLE to support XML state output + # ############################################################################# +-ECM_DB_ADVANCED_STATS_ENABLE=y ++ifndef $(ECM_DB_ADVANCED_STATS_ENABLE) ++ ECM_DB_ADVANCED_STATS_ENABLE=y ++endif + ccflags-$(ECM_DB_ADVANCED_STATS_ENABLE) += -DECM_DB_ADVANCED_STATS_ENABLE + + # ############################################################################# + # Define ECM_DB_CONNECTION_CROSS_REFERENCING_ENABLE=y in order to enable + # the database to track relationships between objects. + # ############################################################################# +-ECM_DB_CONNECTION_CROSS_REFERENCING_ENABLE=y ++ifndef $(ECM_DB_CONNECTION_CROSS_REFERENCING_ENABLE) ++ ECM_DB_CONNECTION_CROSS_REFERENCING_ENABLE=y ++endif + ccflags-$(ECM_DB_CONNECTION_CROSS_REFERENCING_ENABLE) += -DECM_DB_XREF_ENABLE + + # ############################################################################# + # Define ECM_TRACKER_DPI_SUPPORT_ENABLE=y in order to enable support for + # deep packet inspection and tracking of data with the trackers. + # ############################################################################# ++ifndef $(ECM_TRACKER_DPI_SUPPORT_ENABLE) ++ ECM_TRACKER_DPI_SUPPORT_ENABLE=y ++endif + ccflags-$(ECM_TRACKER_DPI_SUPPORT_ENABLE) += -DECM_TRACKER_DPI_SUPPORT_ENABLE + + # ############################################################################# +@@ -400,14 +431,18 @@ ccflags-$(ECM_TRACKER_DPI_SUPPORT_ENABLE) += -DECM_TRACKER_DPI_SUPPORT_ENABLE + # support for the database keeping lists of connections that are assigned + # on a per TYPE of classifier basis. + # ############################################################################# +-ECM_DB_CLASSIFIER_TYPE_ASSIGNMENTS_TRACK_ENABLE=y ++ifndef $(ECM_DB_CLASSIFIER_TYPE_ASSIGNMENTS_TRACK_ENABLE) ++ ECM_DB_CLASSIFIER_TYPE_ASSIGNMENTS_TRACK_ENABLE=y ++endif + ccflags-$(ECM_DB_CLASSIFIER_TYPE_ASSIGNMENTS_TRACK_ENABLE) += -DECM_DB_CTA_TRACK_ENABLE + + # ############################################################################# + # Define ECM_BAND_STEERING_ENABLE=y in order to enable + # band steering feature. + # ############################################################################# +-ECM_BAND_STEERING_ENABLE=y ++ifndef $(ECM_BAND_STEERING_ENABLE) ++ ECM_BAND_STEERING_ENABLE=y ++endif + ccflags-$(ECM_BAND_STEERING_ENABLE) += -DECM_BAND_STEERING_ENABLE + + # ############################################################################# +@@ -488,7 +523,6 @@ ccflags-y += -DECM_TRACKER_UDP_DEBUG_LEVEL=1 + ccflags-y += -DECM_BOND_NOTIFIER_DEBUG_LEVEL=1 + ccflags-y += -DECM_INTERFACE_DEBUG_LEVEL=1 + ccflags-y += -DECM_STATE_DEBUG_LEVEL=1 +-ccflags-y += -DECM_OPENWRT_SUPPORT=1 + ccflags-y += -DECM_NOTIFIER_DEBUG_LEVEL=1 + ccflags-y += -DECM_AE_CLASSIFIER_DEBUG_LEVEL=1 + ccflags-y += -DECM_STATS_DEBUG_LEVEL=1 +--- a/Makefile_61.mk ++++ b/Makefile_61.mk +@@ -465,7 +465,6 @@ ccflags-y += -DECM_TRACKER_UDP_DEBUG_LEVEL=1 + ccflags-y += -DECM_BOND_NOTIFIER_DEBUG_LEVEL=1 + ccflags-y += -DECM_INTERFACE_DEBUG_LEVEL=1 + ccflags-y += -DECM_STATE_DEBUG_LEVEL=1 +-ccflags-y += -DECM_OPENWRT_SUPPORT=1 + ccflags-y += -DECM_NOTIFIER_DEBUG_LEVEL=1 + ccflags-y += -DECM_AE_CLASSIFIER_DEBUG_LEVEL=1 + ccflags-y += -DECM_STATS_DEBUG_LEVEL=1 +--- a/ecm_db/ecm_db_connection.c ++++ b/ecm_db/ecm_db_connection.c +@@ -446,7 +446,9 @@ EXPORT_SYMBOL(ecm_db_connection_make_def + */ + void ecm_db_connection_data_totals_update(struct ecm_db_connection_instance *ci, bool is_from, uint64_t size, uint64_t packets) + { ++#ifdef ECM_DB_ADVANCED_STATS_ENABLE + int32_t i; ++#endif + + DEBUG_CHECK_MAGIC(ci, ECM_DB_CONNECTION_INSTANCE_MAGIC, "%px: magic failed\n", ci); + +@@ -545,7 +547,9 @@ EXPORT_SYMBOL(ecm_db_connection_data_tot + */ + void ecm_db_connection_data_totals_update_dropped(struct ecm_db_connection_instance *ci, bool is_from, uint64_t size, uint64_t packets) + { ++#ifdef ECM_DB_ADVANCED_STATS_ENABLE + int32_t i; ++#endif + + DEBUG_CHECK_MAGIC(ci, ECM_DB_CONNECTION_INSTANCE_MAGIC, "%px: magic failed\n", ci); + +@@ -1539,6 +1543,7 @@ void ecm_db_connection_defunct_all(void) + } + EXPORT_SYMBOL(ecm_db_connection_defunct_all); + ++#ifdef ECM_INTERFACE_OVS_BRIDGE_ENABLE + /* + * ecm_db_connection_defunct_by_classifier() + * Make defunct based on masked fields +@@ -1705,6 +1710,7 @@ next_ci: + ECM_IP_ADDR_TO_OCTAL(dest_addr_mask), dest_port_mask, proto_mask, cnt); + } + } ++#endif + + /* + * ecm_db_connection_defunct_by_port() +@@ -1994,6 +2000,7 @@ struct ecm_db_node_instance *ecm_db_conn + } + EXPORT_SYMBOL(ecm_db_connection_node_get_and_ref); + ++#ifdef ECM_DB_XREF_ENABLE + /* + * ecm_db_connection_mapping_get_and_ref_next() + * Return reference to next connection in the mapping chain in the specified direction. +@@ -2035,6 +2042,7 @@ struct ecm_db_connection_instance *ecm_d + return nci; + } + EXPORT_SYMBOL(ecm_db_connection_iface_get_and_ref_next); ++#endif + + /* + * ecm_db_connection_mapping_get_and_ref() +--- a/ecm_db/ecm_db_node.c ++++ b/ecm_db/ecm_db_node.c +@@ -227,9 +227,11 @@ EXPORT_SYMBOL(ecm_db_node_get_and_ref_ne + */ + int ecm_db_node_deref(struct ecm_db_node_instance *ni) + { ++#ifdef ECM_DB_XREF_ENABLE + #if (DEBUG_LEVEL >= 1) + int dir; + #endif ++#endif + DEBUG_CHECK_MAGIC(ni, ECM_DB_NODE_INSTANCE_MAGIC, "%px: magic failed\n", ni); + + spin_lock_bh(&ecm_db_lock); +@@ -489,9 +491,11 @@ EXPORT_SYMBOL(ecm_db_node_iface_get_and_ + void ecm_db_node_add(struct ecm_db_node_instance *ni, struct ecm_db_iface_instance *ii, uint8_t *address, + ecm_db_node_final_callback_t final, void *arg) + { ++#ifdef ECM_DB_XREF_ENABLE + #if (DEBUG_LEVEL >= 1) + int dir; + #endif ++#endif + ecm_db_node_hash_t hash_index; + struct ecm_db_listener_instance *li; + +--- a/ecm_interface.c ++++ b/ecm_interface.c +@@ -1509,6 +1509,7 @@ struct neighbour *ecm_interface_ipv6_nei + */ + bool ecm_interface_is_pptp(struct sk_buff *skb, const struct net_device *out) + { ++#ifdef ECM_INTERFACE_PPTP_ENABLE + struct net_device *in; + + /* +@@ -1533,6 +1534,7 @@ bool ecm_interface_is_pptp(struct sk_buf + } + + dev_put(in); ++#endif + return false; + } + +@@ -1545,6 +1547,7 @@ bool ecm_interface_is_pptp(struct sk_buf + */ + bool ecm_interface_is_l2tp_packet_by_version(struct sk_buff *skb, const struct net_device *out, int ver) + { ++#ifdef ECM_INTERFACE_L2TPV2_PPTP_ENABLE + uint32_t flag = 0; + struct net_device *in; + +@@ -1577,6 +1580,7 @@ bool ecm_interface_is_l2tp_packet_by_ver + } + + dev_put(in); ++#endif + return false; + } + +@@ -1589,6 +1593,7 @@ bool ecm_interface_is_l2tp_packet_by_ver + */ + bool ecm_interface_is_l2tp_pptp(struct sk_buff *skb, const struct net_device *out) + { ++#ifdef ECM_INTERFACE_L2TPV2_PPTP_ENABLE + struct net_device *in; + + /* +@@ -1611,6 +1616,7 @@ bool ecm_interface_is_l2tp_pptp(struct s + } + + dev_put(in); ++#endif + return false; + } + +@@ -7127,6 +7133,7 @@ static void ecm_interface_regenerate_con + return; + } + ++#ifdef ECM_DB_XREF_ENABLE + for (dir = 0; dir < ECM_DB_OBJ_DIR_MAX; dir++) { + /* + * Re-generate all connections associated with this interface +@@ -7142,6 +7149,7 @@ static void ecm_interface_regenerate_con + ci[dir] = cin; + } + } ++#endif + + #ifdef ECM_MULTICAST_ENABLE + /* +--- a/frontends/ecm_front_end_common.c ++++ b/frontends/ecm_front_end_common.c +@@ -517,6 +517,7 @@ bool ecm_front_end_gre_proto_is_accel_al + struct nf_conntrack_tuple *reply_tuple, + int ip_version, uint16_t offset) + { ++#ifdef ECM_INTERFACE_GRE_ENABLE + struct net_device *dev; + struct gre_base_hdr *greh; + +@@ -528,10 +529,12 @@ bool ecm_front_end_gre_proto_is_accel_al + /* + * Case 1: PPTP locally terminated + */ ++#ifdef ECM_INTERFACE_PPTP_ENABLE + if (ecm_interface_is_pptp(skb, outdev)) { + DEBUG_TRACE("%px: PPTP GRE locally terminated - allow acceleration\n", skb); + return true; + } ++#endif + + /* + * Case 2: PPTP pass through +@@ -657,6 +660,10 @@ bool ecm_front_end_gre_proto_is_accel_al + */ + DEBUG_TRACE("%px: GRE IPv%d pass through non NAT - allow acceleration\n", skb, ip_version); + return true; ++#else ++ DEBUG_TRACE("%px: GRE%d feature is disabled - do not allow acceleration\n", skb, ip_version); ++ return false; ++#endif + } + + #ifdef ECM_CLASSIFIER_DSCP_ENABLE diff --git a/package/qca/qca-nss-ecm/patches/0002-treewide-rework-ipv6_dev_find_and_hold.patch b/package/qca/qca-nss-ecm/patches/0002-treewide-rework-ipv6_dev_find_and_hold.patch new file mode 100644 index 000000000..57765758c --- /dev/null +++ b/package/qca/qca-nss-ecm/patches/0002-treewide-rework-ipv6_dev_find_and_hold.patch @@ -0,0 +1,63 @@ +--- a/ecm_interface.c ++++ b/ecm_interface.c +@@ -339,9 +339,9 @@ static struct net_device *ecm_interface_ + + ECM_IP_ADDR_TO_NIN6_ADDR(addr6, addr); + #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 9, 0)) +- dev = (struct net_device *)ipv6_dev_find(&init_net, &addr6, 1); ++ dev = (struct net_device *)ipv6_dev_find_and_hold(&init_net, &addr6, 1); + #else +- dev = (struct net_device *)ipv6_dev_find(&init_net, &addr6, NULL); ++ dev = (struct net_device *)ipv6_dev_find_and_hold(&init_net, &addr6, 1); + #endif + return dev; + } +@@ -802,9 +802,9 @@ static bool ecm_interface_mac_addr_get_i + */ + ECM_IP_ADDR_TO_NIN6_ADDR(daddr, addr); + #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 9, 0)) +- local_dev = ipv6_dev_find(&init_net, &daddr, 1); ++ local_dev = ipv6_dev_find_and_hold(&init_net, &daddr, 1); + #else +- local_dev = ipv6_dev_find(&init_net, &daddr, NULL); ++ local_dev = ipv6_dev_find_and_hold(&init_net, &daddr, 1); + #endif + if (local_dev) { + DEBUG_TRACE("%pi6 is a local address\n", &daddr); +--- a/frontends/ecm_front_end_common.c ++++ b/frontends/ecm_front_end_common.c +@@ -103,6 +103,10 @@ + #endif + #endif + ++#ifdef ECM_IPV6_ENABLE ++#include "ecm_front_end_ipv6.h" ++#endif ++ + #ifdef ECM_FRONT_END_FSE_ENABLE + /* + * Callback object for ECM frontend interaction with wlan driver to add/delete FSE rules. +@@ -614,9 +618,9 @@ bool ecm_front_end_gre_proto_is_accel_al + } else { + #ifdef ECM_IPV6_ENABLE + #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 9, 0)) +- dev = ipv6_dev_find(&init_net, &(orig_tuple->src.u3.in6), 1); ++ dev = ipv6_dev_find_and_hold(&init_net, &(orig_tuple->src.u3.in6), 1); + #else +- dev = ipv6_dev_find(&init_net, &(orig_tuple->src.u3.in6), NULL); ++ dev = ipv6_dev_find_and_hold(&init_net, &(orig_tuple->src.u3.in6), 1); + #endif + if (dev) { + /* +@@ -628,9 +632,9 @@ bool ecm_front_end_gre_proto_is_accel_al + } + + #if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 9, 0)) +- dev = ipv6_dev_find(&init_net, &(orig_tuple->dst.u3.in6), 1); ++ dev = ipv6_dev_find_and_hold(&init_net, &(orig_tuple->dst.u3.in6), 1); + #else +- dev = ipv6_dev_find(&init_net, &(orig_tuple->dst.u3.in6), NULL); ++ dev = ipv6_dev_find_and_hold(&init_net, &(orig_tuple->dst.u3.in6), 1); + #endif + if (dev) { + /* diff --git a/package/qca/qca-nss-ecm/patches/0003-qca-nss-ecm-resolve-the-cpu-high-load-regarding-ecm.patch b/package/qca/qca-nss-ecm/patches/0003-qca-nss-ecm-resolve-the-cpu-high-load-regarding-ecm.patch new file mode 100644 index 000000000..00476932b --- /dev/null +++ b/package/qca/qca-nss-ecm/patches/0003-qca-nss-ecm-resolve-the-cpu-high-load-regarding-ecm.patch @@ -0,0 +1,55 @@ +From 65aa71f33891bcf0b75995219e31abaf674c6199 Mon Sep 17 00:00:00 2001 +From: Dirk Buchwalder +Date: Sun, 27 Jun 2021 16:52:39 +0200 +Subject: [PATCH 05/12] qca-nss-ecm: resolve the cpu high load regarding ecm + +If using ECM, cpu load goes up (around 1.0) and stucks there. +This is due to using uninterruptible sleep function, +the patch changes this to interruptible sleep function. + +Signed-off-by: Dirk Buchwalder buchwalder@posteo.de +--- + frontends/nss/ecm_nss_ipv4.c | 4 ++-- + frontends/nss/ecm_nss_ipv6.c | 4 ++-- + 2 files changed, 4 insertions(+), 4 deletions(-) + +--- a/frontends/nss/ecm_nss_ipv4.c ++++ b/frontends/nss/ecm_nss_ipv4.c +@@ -700,7 +700,7 @@ static void ecm_nss_ipv4_stats_sync_req_ + } + spin_unlock_bh(&ecm_nss_ipv4_lock); + +- usleep_range(ECM_NSS_IPV4_STATS_SYNC_UDELAY - 100, ECM_NSS_IPV4_STATS_SYNC_UDELAY); ++ msleep_interruptible(ECM_NSS_IPV4_STATS_SYNC_UDELAY / 1000); + + /* + * If index is 0, we are starting a new round, but if we still have time remain +@@ -714,7 +714,7 @@ static void ecm_nss_ipv4_stats_sync_req_ + } + + if (time_after(ecm_nss_ipv4_next_req_time, current_jiffies)) { +- msleep(jiffies_to_msecs(ecm_nss_ipv4_next_req_time - current_jiffies)); ++ msleep_interruptible(jiffies_to_msecs(ecm_nss_ipv4_next_req_time - current_jiffies)); + } + ecm_nss_ipv4_roll_check_jiffies = jiffies; + ecm_nss_ipv4_next_req_time = ecm_nss_ipv4_roll_check_jiffies + ECM_NSS_IPV4_STATS_SYNC_PERIOD; +--- a/frontends/nss/ecm_nss_ipv6.c ++++ b/frontends/nss/ecm_nss_ipv6.c +@@ -676,7 +676,7 @@ static void ecm_nss_ipv6_stats_sync_req_ + } + spin_unlock_bh(&ecm_nss_ipv6_lock); + +- usleep_range(ECM_NSS_IPV6_STATS_SYNC_UDELAY - 100, ECM_NSS_IPV6_STATS_SYNC_UDELAY); ++ msleep_interruptible(ECM_NSS_IPV6_STATS_SYNC_UDELAY / 1000); + + /* + * If index is 0, we are starting a new round, but if we still have time remain +@@ -690,7 +690,7 @@ static void ecm_nss_ipv6_stats_sync_req_ + } + + if (time_after(ecm_nss_ipv6_next_req_time, current_jiffies)) { +- msleep(jiffies_to_msecs(ecm_nss_ipv6_next_req_time - current_jiffies)); ++ msleep_interruptible(jiffies_to_msecs(ecm_nss_ipv6_next_req_time - current_jiffies)); + } + ecm_nss_ipv6_roll_check_jiffies = jiffies; + ecm_nss_ipv6_next_req_time = ecm_nss_ipv6_roll_check_jiffies + ECM_NSS_IPV6_STATS_SYNC_PERIOD; diff --git a/package/qca/qca-nss-ecm/patches/0005-frontends-drop-use-of-static-be_liberal-and-no_windo.patch b/package/qca/qca-nss-ecm/patches/0005-frontends-drop-use-of-static-be_liberal-and-no_windo.patch new file mode 100644 index 000000000..fc3ff0e38 --- /dev/null +++ b/package/qca/qca-nss-ecm/patches/0005-frontends-drop-use-of-static-be_liberal-and-no_windo.patch @@ -0,0 +1,88 @@ +--- a/frontends/nss/ecm_nss_ported_ipv4.c ++++ b/frontends/nss/ecm_nss_ported_ipv4.c +@@ -1213,7 +1213,6 @@ static void ecm_nss_ported_ipv4_connection_accelerate(struct ecm_front_end_conne + #else + struct nf_tcp_net *tn = nf_tcp_pernet(nf_ct_net(ct)); + uint32_t tcp_be_liberal = tn->tcp_be_liberal; +- uint32_t tcp_no_window_check = tn->tcp_no_window_check; + #endif + ecm_db_connection_address_get(feci->ci, ECM_DB_OBJ_DIR_FROM, addr); + ecm_front_end_flow_and_return_directions_get(ct, addr, 4, &flow_dir, &return_dir); +@@ -1228,11 +1227,7 @@ static void ecm_nss_ported_ipv4_connection_accelerate(struct ecm_front_end_conne + nircm->tcp_rule.return_max_window = ct->proto.tcp.seen[return_dir].td_maxwin; + nircm->tcp_rule.return_end = ct->proto.tcp.seen[return_dir].td_end; + nircm->tcp_rule.return_max_end = ct->proto.tcp.seen[return_dir].td_maxend; +-#ifdef ECM_OPENWRT_SUPPORT +- if (tcp_be_liberal || tcp_no_window_check +-#else + if (tcp_be_liberal +-#endif + || (ct->proto.tcp.seen[flow_dir].flags & IP_CT_TCP_FLAG_BE_LIBERAL) + || (ct->proto.tcp.seen[return_dir].flags & IP_CT_TCP_FLAG_BE_LIBERAL)) { + nircm->rule_flags |= NSS_IPV4_RULE_CREATE_FLAG_NO_SEQ_CHECK; +--- a/frontends/nss/ecm_nss_ported_ipv6.c ++++ b/frontends/nss/ecm_nss_ported_ipv6.c +@@ -1133,7 +1133,6 @@ static void ecm_nss_ported_ipv6_connection_accelerate(struct ecm_front_end_conne + #else + struct nf_tcp_net *tn = nf_tcp_pernet(nf_ct_net(ct)); + uint32_t tcp_be_liberal = tn->tcp_be_liberal; +- uint32_t tcp_no_window_check = tn->tcp_no_window_check; + #endif + ecm_front_end_flow_and_return_directions_get(ct, src_ip, 6, &flow_dir, &return_dir); + +@@ -1147,11 +1146,7 @@ static void ecm_nss_ported_ipv6_connection_accelerate(struct ecm_front_end_conne + nircm->tcp_rule.return_max_window = ct->proto.tcp.seen[return_dir].td_maxwin; + nircm->tcp_rule.return_end = ct->proto.tcp.seen[return_dir].td_end; + nircm->tcp_rule.return_max_end = ct->proto.tcp.seen[return_dir].td_maxend; +-#ifdef ECM_OPENWRT_SUPPORT +- if (tcp_be_liberal || tcp_no_window_check +-#else + if (tcp_be_liberal +-#endif + || (ct->proto.tcp.seen[flow_dir].flags & IP_CT_TCP_FLAG_BE_LIBERAL) + || (ct->proto.tcp.seen[return_dir].flags & IP_CT_TCP_FLAG_BE_LIBERAL)) { + nircm->rule_flags |= NSS_IPV6_RULE_CREATE_FLAG_NO_SEQ_CHECK; +--- a/frontends/sfe/ecm_sfe_ported_ipv4.c ++++ b/frontends/sfe/ecm_sfe_ported_ipv4.c +@@ -1358,7 +1358,6 @@ static void ecm_sfe_ported_ipv4_connection_accelerate(struct ecm_front_end_conne + #else + struct nf_tcp_net *tn = nf_tcp_pernet(nf_ct_net(ct)); + uint32_t tcp_be_liberal = tn->tcp_be_liberal; +- uint32_t tcp_no_window_check = tn->tcp_no_window_check; + #endif + ecm_db_connection_address_get(feci->ci, ECM_DB_OBJ_DIR_FROM, addr); + ecm_front_end_flow_and_return_directions_get(ct, addr, 4, &flow_dir, &return_dir); +@@ -1374,11 +1373,7 @@ static void ecm_sfe_ported_ipv4_connection_accelerate(struct ecm_front_end_conne + nircm->tcp_rule.return_end = ct->proto.tcp.seen[return_dir].td_end; + nircm->tcp_rule.return_max_end = ct->proto.tcp.seen[return_dir].td_maxend; + +-#ifdef ECM_OPENWRT_SUPPORT +- if (tcp_be_liberal || tcp_no_window_check +-#else + if (tcp_be_liberal +-#endif + || (ct->proto.tcp.seen[flow_dir].flags & IP_CT_TCP_FLAG_BE_LIBERAL) + || (ct->proto.tcp.seen[return_dir].flags & IP_CT_TCP_FLAG_BE_LIBERAL)) { + nircm->rule_flags |= SFE_RULE_CREATE_FLAG_NO_SEQ_CHECK; +--- a/frontends/sfe/ecm_sfe_ported_ipv6.c ++++ b/frontends/sfe/ecm_sfe_ported_ipv6.c +@@ -1371,7 +1371,6 @@ static void ecm_sfe_ported_ipv6_connection_accelerate(struct ecm_front_end_conne + #else + struct nf_tcp_net *tn = nf_tcp_pernet(nf_ct_net(ct)); + uint32_t tcp_be_liberal = tn->tcp_be_liberal; +- uint32_t tcp_no_window_check = tn->tcp_no_window_check; + #endif + ecm_front_end_flow_and_return_directions_get(ct, src_ip, 6, &flow_dir, &return_dir); + +@@ -1385,11 +1384,7 @@ static void ecm_sfe_ported_ipv6_connection_accelerate(struct ecm_front_end_conne + nircm->tcp_rule.return_max_window = ct->proto.tcp.seen[return_dir].td_maxwin; + nircm->tcp_rule.return_end = ct->proto.tcp.seen[return_dir].td_end; + nircm->tcp_rule.return_max_end = ct->proto.tcp.seen[return_dir].td_maxend; +-#ifdef ECM_OPENWRT_SUPPORT +- if (tcp_be_liberal || tcp_no_window_check +-#else + if (tcp_be_liberal +-#endif + || (ct->proto.tcp.seen[flow_dir].flags & IP_CT_TCP_FLAG_BE_LIBERAL) + || (ct->proto.tcp.seen[return_dir].flags & IP_CT_TCP_FLAG_BE_LIBERAL)) { + nircm->rule_flags |= SFE_RULE_CREATE_FLAG_NO_SEQ_CHECK; diff --git a/package/qca/qca-nss-ecm/patches/0006-ecm_tracker_datagram-drop-static-for-EXPORT_SYMBOL.patch b/package/qca/qca-nss-ecm/patches/0006-ecm_tracker_datagram-drop-static-for-EXPORT_SYMBOL.patch new file mode 100644 index 000000000..aa95ce15d --- /dev/null +++ b/package/qca/qca-nss-ecm/patches/0006-ecm_tracker_datagram-drop-static-for-EXPORT_SYMBOL.patch @@ -0,0 +1,50 @@ +From 9827d8597545ecfee17eba7b08d48dbcdf55c614 Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Sun, 8 May 2022 18:39:39 +0200 +Subject: [PATCH 09/12] ecm_tracker_datagram: drop static for EXPORT_SYMBOL + +EXPORT_SYMBOL should NOT be static + +Signed-off-by: Ansuel Smith +--- + ecm_tracker_datagram.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/ecm_tracker_datagram.c ++++ b/ecm_tracker_datagram.c +@@ -203,7 +203,7 @@ static void ecm_tracker_datagram_datagra + * ecm_tracker_datagram_discard_all() + * Discard all tracked data + */ +-static void ecm_tracker_datagram_discard_all(struct ecm_tracker_datagram_internal_instance *dtii) ++void ecm_tracker_datagram_discard_all(struct ecm_tracker_datagram_internal_instance *dtii) + { + int32_t src_count; + int32_t dest_count; +@@ -364,7 +364,7 @@ static void ecm_tracker_datagram_datagra + * ecm_tracker_datagram_datagram_size_get() + * Return size in bytes of datagram at index i that was sent to the target + */ +-static int32_t ecm_tracker_datagram_datagram_size_get(struct ecm_tracker_datagram_instance *uti, ecm_tracker_sender_type_t sender, int32_t i) ++int32_t ecm_tracker_datagram_datagram_size_get(struct ecm_tracker_datagram_instance *uti, ecm_tracker_sender_type_t sender, int32_t i) + { + struct ecm_tracker_datagram_internal_instance *dtii = (struct ecm_tracker_datagram_internal_instance *)uti; + +@@ -412,7 +412,7 @@ static int32_t ecm_tracker_datagram_data + * ecm_tracker_datagram_datagram_read() + * Read size bytes from datagram at index i into the buffer + */ +-static int ecm_tracker_datagram_datagram_read(struct ecm_tracker_datagram_instance *uti, ecm_tracker_sender_type_t sender, int32_t i, int32_t offset, int32_t size, void *buffer) ++int ecm_tracker_datagram_datagram_read(struct ecm_tracker_datagram_instance *uti, ecm_tracker_sender_type_t sender, int32_t i, int32_t offset, int32_t size, void *buffer) + { + struct ecm_tracker_datagram_internal_instance *dtii = (struct ecm_tracker_datagram_internal_instance *)uti; + int res; +@@ -466,7 +466,7 @@ static int ecm_tracker_datagram_datagram + * ecm_tracker_datagram_datagram_add() + * Append the datagram onto the tracker queue for the given target + */ +-static bool ecm_tracker_datagram_datagram_add(struct ecm_tracker_datagram_instance *uti, ecm_tracker_sender_type_t sender, struct sk_buff *skb) ++bool ecm_tracker_datagram_datagram_add(struct ecm_tracker_datagram_instance *uti, ecm_tracker_sender_type_t sender, struct sk_buff *skb) + { + struct ecm_tracker_datagram_internal_instance *dtii = (struct ecm_tracker_datagram_internal_instance *)uti; + struct sk_buff *skbc; diff --git a/package/qca/qca-nss-ecm/patches/0007-frontends-drop-udp_get_timeouts-and-use-standard-ups.patch b/package/qca/qca-nss-ecm/patches/0007-frontends-drop-udp_get_timeouts-and-use-standard-ups.patch new file mode 100644 index 000000000..1554f2138 --- /dev/null +++ b/package/qca/qca-nss-ecm/patches/0007-frontends-drop-udp_get_timeouts-and-use-standard-ups.patch @@ -0,0 +1,63 @@ +From ef638a84405c9f6556a9d7c257ccbba74efd228e Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Sat, 14 May 2022 20:15:10 +0200 +Subject: [PATCH 10/12] frontends: drop udp_get_timeouts and use standard + upstream api + +Drop udp_get_timeouts and use nf_udp_pernet and ->timeouts +instead or relying on a downstream api not present upstream. +--- + frontends/nss/ecm_nss_ipv4.c | 3 ++- + frontends/nss/ecm_nss_ipv6.c | 3 ++- + frontends/sfe/ecm_sfe_ipv4.c | 3 ++- + frontends/sfe/ecm_sfe_ipv6.c | 3 ++- + 4 files changed, 8 insertions(+), 4 deletions(-) + +--- a/frontends/nss/ecm_nss_ipv4.c ++++ b/frontends/nss/ecm_nss_ipv4.c +@@ -610,7 +610,8 @@ sync_conntrack: + #else + timeouts = nf_ct_timeout_lookup(ct); + if (!timeouts) { +- timeouts = udp_get_timeouts(nf_ct_net(ct)); ++ struct nf_udp_net *un = nf_udp_pernet(nf_ct_net(ct)); ++ timeouts = un->timeouts; + } + + spin_lock_bh(&ct->lock); +--- a/frontends/nss/ecm_nss_ipv6.c ++++ b/frontends/nss/ecm_nss_ipv6.c +@@ -587,7 +587,8 @@ sync_conntrack: + #else + timeouts = nf_ct_timeout_lookup(ct); + if (!timeouts) { +- timeouts = udp_get_timeouts(nf_ct_net(ct)); ++ struct nf_udp_net *un = nf_udp_pernet(nf_ct_net(ct)); ++ timeouts = un->timeouts; + } + + spin_lock_bh(&ct->lock); +--- a/frontends/sfe/ecm_sfe_ipv4.c ++++ b/frontends/sfe/ecm_sfe_ipv4.c +@@ -562,7 +562,8 @@ sync_conntrack: + #else + timeouts = nf_ct_timeout_lookup(ct); + if (!timeouts) { +- timeouts = udp_get_timeouts(nf_ct_net(ct)); ++ struct nf_udp_net *un = nf_udp_pernet(nf_ct_net(ct)); ++ timeouts = un->timeouts; + } + + spin_lock_bh(&ct->lock); +--- a/frontends/sfe/ecm_sfe_ipv6.c ++++ b/frontends/sfe/ecm_sfe_ipv6.c +@@ -556,7 +556,8 @@ sync_conntrack: + #else + timeouts = nf_ct_timeout_lookup(ct); + if (!timeouts) { +- timeouts = udp_get_timeouts(nf_ct_net(ct)); ++ struct nf_udp_net *un = nf_udp_pernet(nf_ct_net(ct)); ++ timeouts = un->timeouts; + } + + spin_lock_bh(&ct->lock); diff --git a/package/qca/qca-nss-ecm/patches/0008-ecm_interface-fix-ppp-generic-function-calls-for-5.15.patch b/package/qca/qca-nss-ecm/patches/0008-ecm_interface-fix-ppp-generic-function-calls-for-5.15.patch new file mode 100644 index 000000000..e314dc1ef --- /dev/null +++ b/package/qca/qca-nss-ecm/patches/0008-ecm_interface-fix-ppp-generic-function-calls-for-5.15.patch @@ -0,0 +1,20 @@ +--- a/ecm_interface.c ++++ b/ecm_interface.c +@@ -3606,7 +3606,7 @@ identifier_update: + if (skb && (skb->skb_iif == dev->ifindex)) { + struct pppol2tp_common_addr info; + +- if (__ppp_is_multilink(dev) > 0) { ++ if (ppp_is_multilink(dev) > 0) { + DEBUG_TRACE("%px: Net device: %px is MULTILINK PPP - Unknown to the ECM\n", feci, dev); + type_info.unknown.os_specific_ident = dev_interface_num; + +@@ -3616,7 +3616,7 @@ identifier_update: + ii = ecm_interface_unknown_interface_establish(&type_info.unknown, dev_name, dev_interface_num, ae_interface_num, dev_mtu); + return ii; + } +- channel_count = __ppp_hold_channels(dev, ppp_chan, 1); ++ channel_count = ppp_hold_channels(dev, ppp_chan, 1); + if (channel_count != 1) { + DEBUG_TRACE("%px: Net device: %px PPP has %d channels - ECM cannot handle this (interface becomes Unknown type)\n", + feci, dev, channel_count); diff --git a/package/qca/qca-nss-ecm/patches/0009-treewide-export-ipv4-and-ipv6-symbols.patch b/package/qca/qca-nss-ecm/patches/0009-treewide-export-ipv4-and-ipv6-symbols.patch new file mode 100644 index 000000000..6c4cf8b5b --- /dev/null +++ b/package/qca/qca-nss-ecm/patches/0009-treewide-export-ipv4-and-ipv6-symbols.patch @@ -0,0 +1,99 @@ +--- a/frontends/nss/ecm_nss_common.c ++++ b/frontends/nss/ecm_nss_common.c +@@ -67,6 +67,7 @@ bool ecm_nss_ipv6_is_conn_limit_reached( + + return false; + } ++EXPORT_SYMBOL(ecm_nss_ipv6_is_conn_limit_reached); + #endif + + /* +@@ -116,3 +117,4 @@ bool ecm_nss_ipv4_is_conn_limit_reached( + + return false; + } ++EXPORT_SYMBOL(ecm_nss_ipv4_is_conn_limit_reached); +--- a/frontends/nss/ecm_nss_non_ported_ipv4.c ++++ b/frontends/nss/ecm_nss_non_ported_ipv4.c +@@ -1831,6 +1831,7 @@ struct ecm_front_end_connection_instance + + return feci; + } ++EXPORT_SYMBOL(ecm_nss_non_ported_ipv4_connection_instance_alloc); + + /* + * ecm_nss_non_ported_ipv4_debugfs_init() +--- a/frontends/nss/ecm_nss_non_ported_ipv4.h ++++ b/frontends/nss/ecm_nss_non_ported_ipv4.h +@@ -19,7 +19,7 @@ + + extern bool ecm_nss_non_ported_ipv4_debugfs_init(struct dentry *dentry); + +-extern struct ecm_front_end_connection_instance *ecm_nss_non_ported_ipv4_connection_instance_alloc( ++struct ecm_front_end_connection_instance *ecm_nss_non_ported_ipv4_connection_instance_alloc( + uint32_t accel_flags, + int protocol, + struct ecm_db_connection_instance **nci); +--- a/frontends/nss/ecm_nss_non_ported_ipv6.c ++++ b/frontends/nss/ecm_nss_non_ported_ipv6.c +@@ -1657,6 +1657,7 @@ struct ecm_front_end_connection_instance + + return feci; + } ++EXPORT_SYMBOL(ecm_nss_non_ported_ipv6_connection_instance_alloc); + + /* + * ecm_nss_non_ported_ipv6_debugfs_init() +--- a/frontends/nss/ecm_nss_non_ported_ipv6.h ++++ b/frontends/nss/ecm_nss_non_ported_ipv6.h +@@ -19,7 +19,7 @@ + + extern bool ecm_nss_non_ported_ipv6_debugfs_init(struct dentry *dentry); + +-extern struct ecm_front_end_connection_instance *ecm_nss_non_ported_ipv6_connection_instance_alloc( ++struct ecm_front_end_connection_instance *ecm_nss_non_ported_ipv6_connection_instance_alloc( + uint32_t accel_flags, + int protocol, + struct ecm_db_connection_instance **nci); +--- a/frontends/nss/ecm_nss_ported_ipv4.c ++++ b/frontends/nss/ecm_nss_ported_ipv4.c +@@ -1906,6 +1906,7 @@ struct ecm_front_end_connection_instance + + return feci; + } ++EXPORT_SYMBOL(ecm_nss_ported_ipv4_connection_instance_alloc); + + /* + * ecm_nss_ported_ipv4_debugfs_init() +--- a/frontends/nss/ecm_nss_ported_ipv4.h ++++ b/frontends/nss/ecm_nss_ported_ipv4.h +@@ -19,7 +19,7 @@ + + extern bool ecm_nss_ported_ipv4_debugfs_init(struct dentry *dentry); + +-extern struct ecm_front_end_connection_instance *ecm_nss_ported_ipv4_connection_instance_alloc( ++struct ecm_front_end_connection_instance *ecm_nss_ported_ipv4_connection_instance_alloc( + uint32_t accel_flags, + int protocol, + struct ecm_db_connection_instance **nci); +--- a/frontends/nss/ecm_nss_ported_ipv6.c ++++ b/frontends/nss/ecm_nss_ported_ipv6.c +@@ -1812,6 +1812,7 @@ struct ecm_front_end_connection_instance + + return feci; + } ++EXPORT_SYMBOL(ecm_nss_ported_ipv6_connection_instance_alloc); + + /* + * ecm_nss_ported_ipv6_debugfs_init() +--- a/frontends/nss/ecm_nss_ported_ipv6.h ++++ b/frontends/nss/ecm_nss_ported_ipv6.h +@@ -19,7 +19,7 @@ + + extern bool ecm_nss_ported_ipv6_debugfs_init(struct dentry *dentry); + +-extern struct ecm_front_end_connection_instance *ecm_nss_ported_ipv6_connection_instance_alloc( ++struct ecm_front_end_connection_instance *ecm_nss_ported_ipv6_connection_instance_alloc( + uint32_t accel_flags, + int protocol, + struct ecm_db_connection_instance **nci); diff --git a/package/qca/qca-nss-ecm/patches/1000-fix-missing-include-header.patch b/package/qca/qca-nss-ecm/patches/1000-fix-missing-include-header.patch new file mode 100644 index 000000000..cdc42b18e --- /dev/null +++ b/package/qca/qca-nss-ecm/patches/1000-fix-missing-include-header.patch @@ -0,0 +1,10 @@ +--- a/frontends/ecm_front_end_common.c ++++ b/frontends/ecm_front_end_common.c +@@ -26,6 +26,7 @@ + #include + #include + #include ++#include + #ifdef ECM_CLASSIFIER_DSCP_ENABLE + #include + #include diff --git a/package/qca/qca-nss-ecm/patches/900-qca-nss-ecm-fix-a-memcpy-overflow-in-ecm_db.patch b/package/qca/qca-nss-ecm/patches/900-qca-nss-ecm-fix-a-memcpy-overflow-in-ecm_db.patch new file mode 100644 index 000000000..529c79292 --- /dev/null +++ b/package/qca/qca-nss-ecm/patches/900-qca-nss-ecm-fix-a-memcpy-overflow-in-ecm_db.patch @@ -0,0 +1,61 @@ +From 1958e34c4c1b8b4fb62eba693fbd7693536947b9 Mon Sep 17 00:00:00 2001 +From: flebourse +Date: Thu, 23 Dec 2021 16:11:06 +0100 +Subject: [PATCH] qca-nss-ecm: fix a memcpy overflow in ecm_db + +Calls to ipv6_addr_prefix() trigger a memcpy overflow if the prefix len +argument is greater than 128, cap it at this value. + +stack bactrace: +detected buffer overflow in memcpy +Kernel BUG at fortify_panic+0x20/0x24 +Internal error: Oops - BUG: 0 [#1] SMP +CPU: 2 PID: 2592 Comm: netifd Not tainted 5.10.80 #0 +Hardware name: Xiaomi AX9000 (DT) +Call trace: + fortify_panic+0x20/0x24 + ecm_db_exit+0x42c/0x49c [ecm] + ecm_db_exit+0x464/0x49c [ecm] + atomic_notifier_call_chain+0x5c/0x90 + ip6_route_add+0x13c/0x1a4 + inet6_rtm_newroute+0x98/0xa0 + rtnetlink_rcv_msg+0x10c/0x34c + netlink_rcv_skb+0x5c/0x130 + rtnetlink_rcv+0x1c/0x2c + netlink_unicast+0x1ec/0x2e0 + netlink_sendmsg+0x1a4/0x394 + ____sys_sendmsg+0x270/0x2b4 + ___sys_sendmsg+0x7c/0xc0 + __sys_sendmsg+0x5c/0xb0 + __arm64_sys_sendmsg+0x28/0x34 + el0_svc_common.constprop.0+0x88/0x190 + do_el0_svc+0x74/0x94 + el0_svc+0x14/0x20 + el0_sync_handler+0xa8/0x130 + el0_sync+0x184/0x1c0 +Code: aa0003e1 912b4040 910003fd 97fff56c (d4210000) + +Signed-off-By: Francis Le Bourse +--- + ecm_db/ecm_db.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/ecm_db/ecm_db.c ++++ b/ecm_db/ecm_db.c +@@ -298,7 +298,7 @@ static int ecm_db_ipv6_route_table_updat + * Compute ECM connection's prefix destination address by masking it with the + * route config's destination address prefix length. + */ +- ipv6_addr_prefix(&prefix_addr, &ecm_in6, cfg->fc_dst_len); ++ ipv6_addr_prefix(&prefix_addr, &ecm_in6, min(128, cfg->fc_dst_len)); + + DEBUG_TRACE("dest addr prefix: %pI6 prefix_len: %d ecm_in6: %pI6\n", &prefix_addr, cfg->fc_dst_len, &ecm_in6); + +@@ -326,7 +326,7 @@ static int ecm_db_ipv6_route_table_updat + * Compute ECM connection's prefix source address by masking it with the + * route config's destination address prefix length. + */ +- ipv6_addr_prefix(&prefix_addr, &ecm_in6, cfg->fc_dst_len); ++ ipv6_addr_prefix(&prefix_addr, &ecm_in6, min(128, cfg->fc_dst_len)); + + DEBUG_TRACE("src addr prefix: %pI6 prefix_len: %d ecm_in6: %pI6\n", &prefix_addr, cfg->fc_dst_len, &ecm_in6); diff --git a/package/qca/qca-ssdk-shell/Makefile b/package/qca/qca-ssdk-shell/Makefile new file mode 100644 index 000000000..f177e3788 --- /dev/null +++ b/package/qca/qca-ssdk-shell/Makefile @@ -0,0 +1,48 @@ +include $(TOPDIR)/rules.mk + +PKG_NAME:=qca-ssdk-shell +PKG_RELEASE:=1 + +PKG_SOURCE_PROTO:=git +PKG_SOURCE_DATE:=2023-10-04 +PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/ssdk-shell.git +PKG_SOURCE_VERSION:=451c3a26e366ea1acdb4305999a72a0389e74fed +PKG_MIRROR_HASH:=e2da723c12120096f1c851808b868abe1affa14e4d969eff7bedb1e1eb984418 + +include $(INCLUDE_DIR)/kernel.mk +include $(INCLUDE_DIR)/package.mk + +define Package/qca-ssdk-shell + SECTION:=utils + CATEGORY:=Utilities + TITLE:=Shell application for QCA SSDK + DEPENDS:=@(TARGET_qualcommax) +endef + +define Package/qca-ssdk-shell/Description + This package contains a qca-ssdk shell application for QCA chipset +endef + +ifndef CONFIG_TOOLCHAIN_BIN_PATH +CONFIG_TOOLCHAIN_BIN_PATH=$(TOOLCHAIN_DIR)/bin +endif + +QCASSDK_CONFIG_OPTS+= \ + TOOL_PATH=$(CONFIG_TOOLCHAIN_BIN_PATH) \ + SYS_PATH=$(LINUX_DIR) \ + TOOLPREFIX=$(TARGET_CROSS) \ + KVER=$(LINUX_VERSION) \ + CFLAGS="$(TARGET_CFLAGS)" \ + LDFLAGS="$(TARGET_LDFLAGS)" \ + ARCH=$(LINUX_KARCH) + +define Build/Compile + $(MAKE) -C $(PKG_BUILD_DIR) $(strip $(QCASSDK_CONFIG_OPTS)) +endef + +define Package/qca-ssdk-shell/install + $(INSTALL_DIR) $(1)/usr/sbin + $(INSTALL_BIN) $(PKG_BUILD_DIR)/build/bin/ssdk_sh $(1)/usr/sbin/ +endef + +$(eval $(call BuildPackage,qca-ssdk-shell)) diff --git a/package/qca/qca-ssdk-shell/patches/0001-qca-ssdk-shell-Fix-fal_port_cdt-compilation-error-GCC-13.patch b/package/qca/qca-ssdk-shell/patches/0001-qca-ssdk-shell-Fix-fal_port_cdt-compilation-error-GCC-13.patch new file mode 100644 index 000000000..9a97ff2d9 --- /dev/null +++ b/package/qca/qca-ssdk-shell/patches/0001-qca-ssdk-shell-Fix-fal_port_cdt-compilation-error-GCC-13.patch @@ -0,0 +1,10 @@ +--- a/src/fal_uk/fal_port_ctrl.c ++++ b/src/fal_uk/fal_port_ctrl.c +@@ -214,7 +214,7 @@ fal_port_hibernate_get(a_uint32_t dev_id + + sw_error_t + fal_port_cdt(a_uint32_t dev_id, fal_port_t port_id, a_uint32_t mdi_pair, +- a_uint32_t *cable_status, a_uint32_t *cable_len) ++ fal_cable_status_t * cable_status, a_uint32_t *cable_len) + { + sw_error_t rv; diff --git a/scripts/download.pl b/scripts/download.pl index 12e83325d..419fb947a 100755 --- a/scripts/download.pl +++ b/scripts/download.pl @@ -248,59 +248,49 @@ foreach my $mirror (@ARGV) { } } elsif ($mirror =~ /^\@OPENWRT$/) { # use OpenWrt source server directly - } elsif ($mirror =~ /^\@IMMORTALWRT$/) { - # use ImmortalWrt source server directly } elsif ($mirror =~ /^\@DEBIAN\/(.+)$/) { - push @mirrors, "https://mirrors.tencent.com/debian/$1"; push @mirrors, "https://mirrors.aliyun.com/debian/$1"; - push @mirrors, "https://mirrors.tuna.tsinghua.edu.cn/debian/$1"; - push @mirrors, "https://mirrors.ustc.edu.cn/debian/$1"; + push @mirrors, "https://mirrors.tencent.com/debian/$1"; push @mirrors, "https://ftp.debian.org/debian/$1"; push @mirrors, "https://mirror.leaseweb.com/debian/$1"; push @mirrors, "https://mirror.netcologne.de/debian/$1"; } elsif ($mirror =~ /^\@APACHE\/(.+)$/) { - push @mirrors, "https://mirrors.tencent.com/apache/$1"; push @mirrors, "https://mirrors.aliyun.com/apache/$1"; - push @mirrors, "https://mirrors.tuna.tsinghua.edu.cn/apache/$1"; - push @mirrors, "https://mirrors.ustc.edu.cn/apache/$1"; - push @mirrors, "https://dlcdn.apache.org/$1"; + push @mirrors, "https://mirrors.tencent.com/apache/$1"; + push @mirrors, "https://mirror.netcologne.de/apache.org/$1"; push @mirrors, "https://mirror.aarnet.edu.au/pub/apache/$1"; push @mirrors, "https://mirror.csclub.uwaterloo.ca/apache/$1"; push @mirrors, "https://archive.apache.org/dist/$1"; - push @mirrors, "https://mirror.cogentco.com/pub/apache/$1"; - push @mirrors, "https://mirror.navercorp.com/apache/$1"; - push @mirrors, "https://ftp.jaist.ac.jp/pub/apache/$1"; - push @mirrors, "https://apache.cs.utah.edu/apache.org/$1"; - push @mirrors, "http://apache.mirrors.ovh.net/ftp.apache.org/dist/$1"; + push @mirrors, "http://mirror.cogentco.com/pub/apache/$1"; + push @mirrors, "http://mirror.navercorp.com/apache/$1"; + push @mirrors, "http://ftp.jaist.ac.jp/pub/apache/$1"; + push @mirrors, "ftp://apache.cs.utah.edu/apache.org/$1"; + push @mirrors, "ftp://apache.mirrors.ovh.net/ftp.apache.org/dist/$1"; } elsif ($mirror =~ /^\@GITHUB\/(.+)$/) { - my $dir = $1; - my $i = 0; - # replace the 2nd '/' with '@' for jsDelivr mirror - push @mirrors, "https://cdn.jsdelivr.net/gh/". $dir =~ s{\/}{++$i == 2 ? '@' : $&}ger; - push @mirrors, "https://raw.sevencdn.com/$dir"; - push @mirrors, "https://raw.fastgit.org/$dir"; # give github a few more tries (different mirrors) for (1 .. 5) { - push @mirrors, "https://raw.githubusercontent.com/$dir"; + push @mirrors, "https://raw.githubusercontent.com/$1"; } } elsif ($mirror =~ /^\@GNU\/(.+)$/) { - push @mirrors, "https://mirrors.tencent.com/gnu/$1"; push @mirrors, "https://mirrors.aliyun.com/gnu/$1"; - push @mirrors, "https://mirrors.tuna.tsinghua.edu.cn/gnu/$1"; - push @mirrors, "https://mirrors.ustc.edu.cn/gnu/$1"; + push @mirrors, "https://mirrors.tencent.com/gnu/$1"; push @mirrors, "https://mirror.csclub.uwaterloo.ca/gnu/$1"; push @mirrors, "https://mirror.netcologne.de/gnu/$1"; - push @mirrors, "https://ftp.kddilabs.jp/GNU/gnu/$1"; - push @mirrors, "https://www.nic.funet.fi/pub/gnu/gnu/$1"; - push @mirrors, "https://mirror.navercorp.com/gnu/$1"; - push @mirrors, "https://mirrors.rit.edu/gnu/$1"; + push @mirrors, "http://ftp.kddilabs.jp/GNU/gnu/$1"; + push @mirrors, "http://www.nic.funet.fi/pub/gnu/gnu/$1"; + push @mirrors, "http://mirror.internode.on.net/pub/gnu/$1"; + push @mirrors, "http://mirror.navercorp.com/gnu/$1"; + push @mirrors, "ftp://mirrors.rit.edu/gnu/$1"; + push @mirrors, "ftp://download.xs4all.nl/pub/gnu/$1"; push @mirrors, "https://ftp.gnu.org/gnu/$1"; } elsif ($mirror =~ /^\@SAVANNAH\/(.+)$/) { push @mirrors, "https://mirror.netcologne.de/savannah/$1"; push @mirrors, "https://mirror.csclub.uwaterloo.ca/nongnu/$1"; - push @mirrors, "https://ftp.acc.umu.se/mirror/gnu.org/savannah/$1"; - push @mirrors, "https://nongnu.uib.no/$1"; - push @mirrors, "https://cdimage.debian.org/mirror/gnu.org/savannah/$1"; + push @mirrors, "http://ftp.acc.umu.se/mirror/gnu.org/savannah/$1"; + push @mirrors, "http://nongnu.uib.no/$1"; + push @mirrors, "http://ftp.igh.cnrs.fr/pub/nongnu/$1"; + push @mirrors, "ftp://cdimage.debian.org/mirror/gnu.org/savannah/$1"; + push @mirrors, "ftp://ftp.acc.umu.se/mirror/gnu.org/savannah/$1"; } elsif ($mirror =~ /^\@KERNEL\/(.+)$/) { my @extra = ( $1 ); if ($filename =~ /linux-\d+\.\d+(?:\.\d+)?-rc/) { @@ -311,20 +301,19 @@ foreach my $mirror (@ARGV) { foreach my $dir (@extra) { push @mirrors, "https://mirror.iscas.ac.cn/kernel.org/$dir"; push @mirrors, "https://mirrors.ustc.edu.cn/kernel.org/$dir"; - push @mirrors, "https://mirror.nju.edu.cn/kernel.org/$dir"; push @mirrors, "https://cdn.kernel.org/pub/$dir"; + push @mirrors, "https://download.xs4all.nl/ftp.kernel.org/pub/$dir"; push @mirrors, "https://mirrors.mit.edu/kernel/$dir"; push @mirrors, "http://ftp.nara.wide.ad.jp/pub/kernel.org/$dir"; push @mirrors, "http://www.ring.gr.jp/archives/linux/kernel.org/$dir"; - push @mirrors, "https://ftp.riken.jp/Linux/kernel.org/$dir"; - push @mirrors, "https://www.mirrorservice.org/sites/ftp.kernel.org/pub/$dir"; + push @mirrors, "ftp://ftp.riken.jp/Linux/kernel.org/$dir"; + push @mirrors, "ftp://www.mirrorservice.org/sites/ftp.kernel.org/pub/$dir"; } } elsif ($mirror =~ /^\@GNOME\/(.+)$/) { push @mirrors, "https://mirrors.ustc.edu.cn/gnome/sources/$1"; - push @mirrors, "https://mirror.nju.edu.cn/gnome/$1"; push @mirrors, "https://download.gnome.org/sources/$1"; push @mirrors, "https://mirror.csclub.uwaterloo.ca/gnome/sources/$1"; - push @mirrors, "https://ftp.acc.umu.se/pub/GNOME/sources/$1"; + push @mirrors, "http://ftp.acc.umu.se/pub/GNOME/sources/$1"; push @mirrors, "http://ftp.cse.buffalo.edu/pub/Gnome/sources/$1"; push @mirrors, "http://ftp.nara.wide.ad.jp/pub/X11/GNOME/sources/$1"; } else { @@ -332,11 +321,6 @@ foreach my $mirror (@ARGV) { } } -# push @mirrors, 'https://mirror01.download.immortalwrt.eu.org'; -push @mirrors, 'https://mirror2.immortalwrt.org/sources'; -push @mirrors, 'https://mirror.immortalwrt.org/sources'; -push @mirrors, 'https://sources-cdn.immortalwrt.org'; -push @mirrors, 'https://sources.immortalwrt.org'; push @mirrors, 'https://sources.cdn.openwrt.org'; push @mirrors, 'https://sources.openwrt.org'; push @mirrors, 'https://mirror2.openwrt.org/sources'; diff --git a/target/linux/meson/Makefile b/target/linux/amlogic/Makefile similarity index 71% rename from target/linux/meson/Makefile rename to target/linux/amlogic/Makefile index 19e97332a..31dfb3ab1 100644 --- a/target/linux/meson/Makefile +++ b/target/linux/amlogic/Makefile @@ -4,11 +4,11 @@ include $(TOPDIR)/rules.mk -ARCH:=arm -BOARD:=meson +BOARD:=amlogic +BOARDNAME:=Amlogic BOARDNAME:=Amlogic Meson family -FEATURES:=boot-part ext4 fpu legacy-sdcard squashfs usbgadget -SUBTARGETS:=meson8b +FEATURES:=boot-part ext4 audio usb fpu legacy-sdcard squashfs usbgadget display gpio fpu pci pcie +SUBTARGETS:=meson8b mesongx KERNEL_PATCHVER:=6.1 @@ -25,7 +25,7 @@ DEFAULT_PACKAGES += \ automount \ resize2fs \ partx-utils \ - losetup + losetup htop autocore-arm KERNELNAME:=Image dtbs diff --git a/target/linux/amlogic/config-5.15 b/target/linux/amlogic/config-5.15 new file mode 100644 index 000000000..6922acd2f --- /dev/null +++ b/target/linux/amlogic/config-5.15 @@ -0,0 +1,46 @@ +CONFIG_AMLOGIC_THERMAL=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_DEVFREQ_THERMAL=y +# CONFIG_DRM_MESON is not set +# CONFIG_DRM_MESON_DW_HDMI is not set +CONFIG_HW_CONSOLE=y +CONFIG_HW_RANDOM_MESON=y +CONFIG_HW_RANDOM_OPTEE=y +CONFIG_INPUT=y +CONFIG_KVM_ARM_PMU=y +# CONFIG_MAX77620_WATCHDOG is not set +# CONFIG_MAX77620_THERMAL is not set +CONFIG_MESON_EFUSE=y +# CONFIG_MESON_MX_EFUSE is not set +# CONFIG_MFD_KHADAS_MCU is not set +# CONFIG_MMC_DEBUG is not set +# CONFIG_MMC_UNSAFE_RESUME is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_WBSD is not set +# CONFIG_NVMEM_SPMI_SDAM is not set +# CONFIG_PHY_MESON8B_USB2 is not set +# CONFIG_PINCTRL_MESON8_PMX is not set +# CONFIG_REGULATOR_S2MPA01 is not set +# CONFIG_REGULATOR_S2MPS11 is not set +# CONFIG_REGULATOR_S5M8767 is not set +# CONFIG_REGULATOR_VEXPRESS is not set +# CONFIG_SDIO_UART is not set +CONFIG_SENSORS_ARM_SCMI=y +CONFIG_SENSORS_ARM_SCPI=y +# CONFIG_SND_MESON_AIU is not set +# CONFIG_SND_MESON_AXG_FRDDR is not set +# CONFIG_SND_MESON_AXG_TODDR is not set +# CONFIG_SND_MESON_AXG_TDMIN is not set +# CONFIG_SND_MESON_AXG_TDMOUT is not set +# CONFIG_SND_MESON_AXG_SOUND_CARD is not set +# CONFIG_SND_MESON_AXG_SPDIFOUT is not set +# CONFIG_SND_MESON_AXG_SPDIFIN is not set +# CONFIG_SND_MESON_AXG_PDM is not set +# CONFIG_SND_MESON_GX_SOUND_CARD is not set +# CONFIG_SND_MESON_G12A_TOACODEC is not set +# CONFIG_SND_MESON_G12A_TOHDMITX is not set +# CONFIG_SND_SOC_MESON_T9015 is not set +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_VT_HW_CONSOLE_BINDING=y diff --git a/target/linux/meson/files/arch/arm/boot/dts/meson8b-onecloud.dts b/target/linux/amlogic/files/arch/arm/boot/dts/meson8b-onecloud.dts similarity index 100% rename from target/linux/meson/files/arch/arm/boot/dts/meson8b-onecloud.dts rename to target/linux/amlogic/files/arch/arm/boot/dts/meson8b-onecloud.dts diff --git a/target/linux/amlogic/image/Makefile b/target/linux/amlogic/image/Makefile new file mode 100644 index 000000000..3190b93d7 --- /dev/null +++ b/target/linux/amlogic/image/Makefile @@ -0,0 +1,91 @@ +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/image.mk + +DEVICE_VARS += UBOOT_DEVICE_NAME + +FAT32_BLOCK_SIZE=1024 +FAT32_BLOCKS=$(shell echo $$(($(CONFIG_TARGET_KERNEL_PARTSIZE)*1024*1024/$(FAT32_BLOCK_SIZE)))) + +define Build/boot-script + # Make an U-boot image and copy it to the boot partition + mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "boot.scr" -d boot.txt $(KDIR)/boot.scr +endef + +define Build/emmc-common + $(RM) -f $@.boot + mkfs.fat -C $@.boot $(FAT32_BLOCKS) + + mkdir -p $(KDIR)/boot.fat + + $(CP) $(KDIR)/boot.scr $(KDIR)/boot.fat/boot.scr + mcopy -i $@.boot $(KDIR)/boot.scr :: + $(CP) $(IMAGE_KERNEL) $(KDIR)/boot.fat/uImage + mcopy -i $@.boot $(KDIR)/boot.fat/uImage :: + + $(foreach dts,$(shell echo $(DEVICE_DTS)),$(CP) $(DTS_DIR)/$(dts).dtb $(KDIR)/boot.fat/dtb;) + mcopy -i $@.boot $(KDIR)/boot.fat/dtb :: + + $(RM) -rf $(KDIR)/boot.fat + + ./gen_aml_emmc_img.sh $@ $@.boot $(IMAGE_ROOTFS) \ + $(CONFIG_TARGET_KERNEL_PARTSIZE) $(CONFIG_TARGET_ROOTFS_PARTSIZE) +endef + +### Image scripts ### + +define Build/boot-common + # This creates a new folder copies the dtb (as amlogic.dtb) + # and the kernel image (as kernel.img) + rm -fR $@.boot + mkdir -p $@.boot + + $(CP) $(KDIR)/image-$(firstword $(DEVICE_DTS)).dtb $@.boot/amlogic.dtb + $(CP) $(IMAGE_KERNEL) $@.boot/kernel.img + $(CP) "$(STAGING_DIR_IMAGE)"/$(UBOOT_DEVICE_NAME)-u-boot-overlay.bin $@.boot/u-boot.emmc +endef + +define Build/boot-combined + # This creates a new folder copies the dtbs (as amlogic*.dtb) + # and the kernel image (as kernel.img) + rm -fR $@.boot + mkdir -p $@.boot + + i=0; \ + for dts in $(DEVICE_DTS); do \ + $(CP) $(KDIR)/image-$${dts}.dtb $@.boot/amlogic$$(perl -e 'printf "%b\n",'$$i).dtb; \ + let i+=1; \ + done + $(CP) $(IMAGE_KERNEL) $@.boot/kernel.img + $(CP) "$(STAGING_DIR_IMAGE)"/$(UBOOT_DEVICE_NAME)-u-boot-overlay.bin $@.boot/u-boot.emmc +endef + +define Build/boot-combined-script + # Make an U-boot image and copy it to the boot partition + mkimage -A arm -O linux -T script -C none -a 0 -e 0 -d aml_autoscript.cmd $@.boot/aml_autoscript + mkimage -A arm -O linux -T script -C none -a 0 -e 0 -d emmc_autoscript.cmd $@.boot/emmc_autoscript + mkimage -A arm -O linux -T script -C none -a 0 -e 0 -d s905_autoscript.cmd $@.boot/s905_autoscript + mkimage -A arm -O linux -T script -C none -a 0 -e 0 -d $(if $(1),$(1),amlogic).bootscript $@.boot/boot.scr +endef + +define Build/aml-img + # Creates the final SD/USB images, + # combining boot partition, root partition + + SIGNATURE="$(IMG_PART_SIGNATURE)" \ + ./gen_amlogic_image.sh \ + $@ \ + 64 $@.boot \ + 256 $(IMAGE_ROOTFS) \ + 2048 + +endef + +### Devices ### + +include $(SUBTARGET).mk + +$(eval $(call BuildImage)) diff --git a/target/linux/amlogic/image/aml_autoscript.cmd b/target/linux/amlogic/image/aml_autoscript.cmd new file mode 100644 index 000000000..637f7e4cd --- /dev/null +++ b/target/linux/amlogic/image/aml_autoscript.cmd @@ -0,0 +1,10 @@ +if printenv bootfromsd; then exit; else setenv ab 0; fi; +setenv bootcmd 'run start_autoscript; run storeboot' +setenv start_autoscript 'if mmcinfo; then run start_mmc_autoscript; fi; if usb start; then run start_usb_autoscript; fi; run start_emmc_autoscript' +setenv start_emmc_autoscript 'if fatload mmc 1 1020000 emmc_autoscript; then autoscr 1020000; fi;' +setenv start_mmc_autoscript 'if fatload mmc 0 1020000 s905_autoscript; then env delete usbdev; autoscr 1020000; fi;' +setenv start_usb_autoscript 'for usbdev in 0 1 2 3; do if fatload usb ${usbdev} 1020000 s905_autoscript; then autoscr 1020000; fi; done' +setenv upgrade_step 2 +saveenv +sleep 1 +reboot \ No newline at end of file diff --git a/target/linux/amlogic/image/amlogic.bootscript b/target/linux/amlogic/image/amlogic.bootscript new file mode 100644 index 000000000..3369e5c4f --- /dev/null +++ b/target/linux/amlogic/image/amlogic.bootscript @@ -0,0 +1,34 @@ +echo "Start AMLOGIC mainline U-boot" +setenv l_mmc "0" +for l_devtype in "sd usb mmc" ; do + if test "${l_devtype}" = "usb"; then + setenv l_mmc "0 1 2 3" + fi + if test "${l_devtype}" = "mmc"; then + setenv l_mmc "1" + fi + if test "${l_devtype}" = "sd"; then + setenv devtype "mmc" + else + setenv devtype "${l_devtype}" + fi + for devnum in ${l_mmc} ; do + if test -e ${devtype} ${devnum}:1 /boot.scr; then + part uuid ${devtype} ${devnum}:2 uuid + setenv bootargs "console=tty0 no_console_suspend consoleblank=0 console=ttyAML0,115200n8 root=PARTUUID=${uuid} rw rootwait" + if printenv mac; then + setenv bootargs ${bootargs} mac=${mac} + elif printenv eth_mac; then + setenv bootargs ${bootargs} mac=${eth_mac} + elif printenv ethaddr; then + setenv bootargs ${bootargs} mac=${ethaddr} + fi + load ${devtype} ${devnum}:1 ${fdt_addr_r} /amlogic.dtb + load ${devtype} ${devnum}:1 ${kernel_addr_r} /kernel.img + fdt addr ${fdt_addr_r} + booti ${kernel_addr_r} - ${fdt_addr_r} + fi + done +done +# Recompile with: +# mkimage -C none -A arm -T script -d /boot/boot.cmd /boot/boot.scr \ No newline at end of file diff --git a/target/linux/meson/image/boot.txt b/target/linux/amlogic/image/boot.txt similarity index 100% rename from target/linux/meson/image/boot.txt rename to target/linux/amlogic/image/boot.txt diff --git a/target/linux/amlogic/image/emmc_autoscript.cmd b/target/linux/amlogic/image/emmc_autoscript.cmd new file mode 100755 index 000000000..eec1c7fd2 --- /dev/null +++ b/target/linux/amlogic/image/emmc_autoscript.cmd @@ -0,0 +1,8 @@ +if fatload mmc 1 0x1000000 u-boot.emmc; then go 0x1000000; fi; +setenv dtb_addr 0x1000000 +setenv env_addr 0x1040000 +setenv kernel_addr 0x11000000 +setenv initrd_addr 0x13000000 +setenv boot_start booti ${kernel_addr} ${initrd_addr} ${dtb_addr} +setenv addmac 'if printenv mac; then setenv bootargs ${bootargs} mac=${mac}; elif printenv eth_mac; then setenv bootargs ${bootargs} mac=${eth_mac}; elif printenv ethaddr; then setenv bootargs ${bootargs} mac=${ethaddr}; fi' +if fatload mmc 1 ${env_addr} uEnv.txt && env import -t ${env_addr} ${filesize}; setenv bootargs ${APPEND}; then if fatload mmc 1 ${kernel_addr} ${LINUX}; then if fatload mmc 1 ${initrd_addr} ${INITRD}; then if fatload mmc 1 ${dtb_addr} ${FDT}; then run addmac; run boot_start; fi; fi; fi; fi; diff --git a/target/linux/meson/image/gen_aml_emmc_img.sh b/target/linux/amlogic/image/gen_aml_emmc_img.sh similarity index 100% rename from target/linux/meson/image/gen_aml_emmc_img.sh rename to target/linux/amlogic/image/gen_aml_emmc_img.sh diff --git a/target/linux/amlogic/image/gen_amlogic_image.sh b/target/linux/amlogic/image/gen_amlogic_image.sh new file mode 100755 index 000000000..650df1304 --- /dev/null +++ b/target/linux/amlogic/image/gen_amlogic_image.sh @@ -0,0 +1,60 @@ +#!/bin/sh +# Copyright (C) 2006-2012 OpenWrt.org +set -e -x +if [ $# -ne 5 ] && [ $# -ne 6 ]; then + echo "SYNTAX: $0 []" + exit 1 +fi + +OUTPUT="$1" +KERNELSIZE="$2" +KERNELDIR="$3" +ROOTFSSIZE="$4" +ROOTFSIMAGE="$5" +ALIGN="$6" +USERDATASIZE="2048" + +rm -f "$OUTPUT" + +head=16 +sect=63 + +# create partition table +set $(ptgen -o "$OUTPUT" -h $head -s $sect -p "${KERNELSIZE}m" -p "${ROOTFSSIZE}m" -p "${USERDATASIZE}m" ${ALIGN:+-l $ALIGN} ${SIGNATURE:+-S 0x$SIGNATURE}) + +KERNELOFFSET="$(($1 / 512))" +KERNELSIZE="$2" +ROOTFSOFFSET="$(($3 / 512))" +ROOTFSSIZE="$(($4 / 512))" +USERDATAOFFSET="$(($5 / 512))" +USERDATASIZE="$(($6 / 512))" + +# Using mcopy -s ... is using READDIR(3) to iterate through the directory +# entries, hence they end up in the FAT filesystem in traversal order which +# breaks reproducibility. +# Implement recursive copy with reproducible order. +dos_dircopy() { + local entry + local baseentry + for entry in "$1"/* ; do + if [ -f "$entry" ]; then + mcopy -i "$OUTPUT.kernel" "$entry" ::"$2" + elif [ -d "$entry" ]; then + baseentry="$(basename "$entry")" + mmd -i "$OUTPUT.kernel" ::"$2""$baseentry" + dos_dircopy "$entry" "$2""$baseentry"/ + fi + done +} + +dd if=/dev/zero of="$OUTPUT" bs=512 seek="$ROOTFSOFFSET" conv=notrunc count="$ROOTFSSIZE" +dd if="$ROOTFSIMAGE" of="$OUTPUT" bs=512 seek="$ROOTFSOFFSET" conv=notrunc + +[ -n "$PADDING" ] && dd if=/dev/zero of="$OUTPUT" bs=512 seek="$USERDATAOFFSET" conv=notrunc count="$USERDATASIZE" +echo "RESET000" | dd of="$OUTPUT" bs=512 seek="$USERDATAOFFSET" conv=notrunc,sync count=1 + +mkfs.fat --invariant -n kernel -C "$OUTPUT.kernel" -S 512 "$((KERNELSIZE / 1024))" +LC_ALL=C dos_dircopy "$KERNELDIR" / + +dd if="$OUTPUT.kernel" of="$OUTPUT" bs=512 seek="$KERNELOFFSET" conv=notrunc +rm -f "$OUTPUT.kernel" diff --git a/target/linux/amlogic/image/meson8b.mk b/target/linux/amlogic/image/meson8b.mk new file mode 100644 index 000000000..bab17477e --- /dev/null +++ b/target/linux/amlogic/image/meson8b.mk @@ -0,0 +1,18 @@ + +define Device/Default + FILESYSTEMS := ext4 + IMAGES := emmc.img + KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts) + KERNEL_LOADADDR := 0x01080000 + KERNEL_NAME := Image + KERNEL := kernel-bin | uImage none + PROFILES = Default $$(DEVICE_NAME) +endef + +define Device/thunder-onecloud + DEVICE_DTS := meson8b-onecloud + DEVICE_TITLE := Thunder OneCloud + KERNEL_LOADADDR := 0x00208000 + IMAGE/emmc.img := boot-script onecloud | emmc-common $$(DEVICE_NAME) +endef +TARGET_DEVICES += thunder-onecloud diff --git a/target/linux/amlogic/image/mesongx.mk b/target/linux/amlogic/image/mesongx.mk new file mode 100644 index 000000000..c285014d8 --- /dev/null +++ b/target/linux/amlogic/image/mesongx.mk @@ -0,0 +1,19 @@ +# SPDX-License-Identifier: GPL-2.0-only + +define Device/Default + PROFILES := Default + KERNEL := kernel-bin + IMAGES := sysupgrade.img.gz + DEVICE_DTS_DIR := $(DTS_DIR)/amlogic + DEVICE_DTS = $$(SOC)-$(subst _,-,$(1)) +endef + +define Device/phicomm_n1 + DEVICE_VENDOR := Phicomm + DEVICE_MODEL := N1 + SOC := meson-gxl-s905d + UBOOT_DEVICE_NAME := phicomm-n1 + IMAGE/sysupgrade.img.gz := boot-common | boot-combined-script | aml-img | gzip | append-metadata + DEVICE_PACKAGES := ethtool kmod-brcmfmac brcmfmac-firmware-43455-sdio-phicomm-n1 wpad-openssl +endef +TARGET_DEVICES += phicomm_n1 \ No newline at end of file diff --git a/target/linux/amlogic/image/s905_autoscript.cmd b/target/linux/amlogic/image/s905_autoscript.cmd new file mode 100755 index 000000000..16ad8df4b --- /dev/null +++ b/target/linux/amlogic/image/s905_autoscript.cmd @@ -0,0 +1,16 @@ +if test "${usbdev}" = ""; then + setenv devtype "mmc" + setenv devnum 0 +else + setenv devtype "usb" + setenv devnum ${usbdev} +fi + +if fatload ${devtype} ${devnum} 0x1000000 u-boot.emmc; then go 0x1000000; fi; +setenv dtb_addr 0x1000000 +setenv env_addr 0x1040000 +setenv kernel_addr 0x11000000 +setenv initrd_addr 0x13000000 +setenv boot_start booti ${kernel_addr} ${initrd_addr} ${dtb_addr} +setenv addmac 'if printenv mac; then setenv bootargs ${bootargs} mac=${mac}; elif printenv eth_mac; then setenv bootargs ${bootargs} mac=${eth_mac}; elif printenv ethaddr; then setenv bootargs ${bootargs} mac=${ethaddr}; fi' +if fatload ${devtype} ${devnum} ${env_addr} uEnv.txt && env import -t ${env_addr} ${filesize}; setenv bootargs ${APPEND}; then if fatload ${devtype} ${devnum} ${kernel_addr} ${LINUX}; then if fatload ${devtype} ${devnum} ${initrd_addr} ${INITRD}; then if fatload ${devtype} ${devnum} ${dtb_addr} ${FDT}; then run addmac; run boot_start; fi; fi; fi; fi; diff --git a/target/linux/meson/base-files/etc/inittab b/target/linux/amlogic/meson8b/base-files/etc/inittab similarity index 100% rename from target/linux/meson/base-files/etc/inittab rename to target/linux/amlogic/meson8b/base-files/etc/inittab diff --git a/target/linux/meson/base-files/etc/rc.local b/target/linux/amlogic/meson8b/base-files/etc/rc.local similarity index 100% rename from target/linux/meson/base-files/etc/rc.local rename to target/linux/amlogic/meson8b/base-files/etc/rc.local diff --git a/target/linux/meson/base-files/lib/preinit/79_move_config b/target/linux/amlogic/meson8b/base-files/lib/preinit/79_move_config similarity index 100% rename from target/linux/meson/base-files/lib/preinit/79_move_config rename to target/linux/amlogic/meson8b/base-files/lib/preinit/79_move_config diff --git a/target/linux/meson/base-files/lib/upgrade/platform.sh b/target/linux/amlogic/meson8b/base-files/lib/upgrade/platform.sh similarity index 100% rename from target/linux/meson/base-files/lib/upgrade/platform.sh rename to target/linux/amlogic/meson8b/base-files/lib/upgrade/platform.sh diff --git a/target/linux/meson/base-files/root/resize.sh b/target/linux/amlogic/meson8b/base-files/root/resize.sh similarity index 100% rename from target/linux/meson/base-files/root/resize.sh rename to target/linux/amlogic/meson8b/base-files/root/resize.sh diff --git a/target/linux/meson/meson8b/config-6.1 b/target/linux/amlogic/meson8b/config-6.1 similarity index 100% rename from target/linux/meson/meson8b/config-6.1 rename to target/linux/amlogic/meson8b/config-6.1 diff --git a/target/linux/meson/meson8b/target.mk b/target/linux/amlogic/meson8b/target.mk similarity index 100% rename from target/linux/meson/meson8b/target.mk rename to target/linux/amlogic/meson8b/target.mk diff --git a/target/linux/amlogic/mesongx/base-files/etc/board.d/02_network b/target/linux/amlogic/mesongx/base-files/etc/board.d/02_network new file mode 100755 index 000000000..187c66c7a --- /dev/null +++ b/target/linux/amlogic/mesongx/base-files/etc/board.d/02_network @@ -0,0 +1,59 @@ +#!/bin/sh +# +# Copyright (C) 2013-2015 OpenWrt.org +# + +. /lib/functions/uci-defaults.sh +. /lib/functions/system.sh + +amlogic_setup_interfaces() +{ + local board="$1" + + case "$board" in + *) + ucidef_set_interface_lan 'eth0' + ;; + esac +} + +generate_mac_from_mmc() +{ + local sd_hash + local bootdisk=$( + . /lib/upgrade/common.sh + export_bootdevice && export_partdevice bootdisk 0 && echo $bootdisk + ) + if echo "$bootdisk" | grep -q '^mmcblk' && [ -f "/sys/class/block/$bootdisk/device/cid" ]; then + sd_hash=$(sha256sum /sys/class/block/$bootdisk/device/cid | head -n 1) + else + sd_hash=$(sha256sum /sys/class/block/mmcblk*/device/cid | head -n 1) + fi + local mac_base=$(macaddr_canonicalize "$(echo "${sd_hash}" | dd bs=1 count=12 2>/dev/null)") + echo "$(macaddr_unsetbit_mc "$(macaddr_setbit_la "${mac_base}")")" +} + +amlogic_setup_macs() +{ + local board="$1" + local lan_mac="" + local wan_mac="" + + case "$board" in + *) + lan_mac=$(generate_mac_from_mmc) + ;; + esac + + [ -n "$wan_mac" ] && ucidef_set_interface_macaddr "wan" $wan_mac + [ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac +} + + +board_config_update +board=$(board_name) +amlogic_setup_interfaces $board +amlogic_setup_macs $board +board_config_flush + +exit 0 diff --git a/target/linux/amlogic/mesongx/base-files/etc/uci-defaults/12_enable-netifd-smp-tune b/target/linux/amlogic/mesongx/base-files/etc/uci-defaults/12_enable-netifd-smp-tune new file mode 100755 index 000000000..e6a9e6a9a --- /dev/null +++ b/target/linux/amlogic/mesongx/base-files/etc/uci-defaults/12_enable-netifd-smp-tune @@ -0,0 +1,7 @@ +#!/bin/sh +uci -q batch <<-EOF >/dev/null + set network.globals.packet_steering=1 + commit network +EOF + +exit 0 diff --git a/target/linux/amlogic/mesongx/base-files/lib/preinit/79_move_config b/target/linux/amlogic/mesongx/base-files/lib/preinit/79_move_config new file mode 100644 index 000000000..10d9181d5 --- /dev/null +++ b/target/linux/amlogic/mesongx/base-files/lib/preinit/79_move_config @@ -0,0 +1,16 @@ +move_config() { + local partdev parttype=ext4 + + . /lib/upgrade/common.sh + + if export_bootdevice && export_partdevice partdev 1; then + mkdir -p /boot + part_magic_fat "/dev/$partdev" && parttype=vfat + mount -t $parttype -o rw,noatime "/dev/$partdev" /boot + if [ -f "/boot/$BACKUP_FILE" ]; then + mv -f "/boot/$BACKUP_FILE" / + fi + fi +} + +boot_hook_add preinit_mount_root move_config diff --git a/target/linux/amlogic/mesongx/base-files/lib/upgrade/platform.sh b/target/linux/amlogic/mesongx/base-files/lib/upgrade/platform.sh new file mode 100644 index 000000000..8de2e1a9a --- /dev/null +++ b/target/linux/amlogic/mesongx/base-files/lib/upgrade/platform.sh @@ -0,0 +1,84 @@ + +platform_check_image() { + local diskdev partdev diff + + export_bootdevice && export_partdevice diskdev 0 || { + v "Unable to determine upgrade device" + return 1 + } + [ "$SAVE_CONFIG" -eq 1 ] && return 0 + + get_partitions "/dev/$diskdev" bootdisk + + #extract the boot sector from the image + get_image "$@" | dd of=/tmp/image.bs count=1 bs=512b 2>/dev/null + + get_partitions /tmp/image.bs image + + #compare tables + diff="$(grep -F -x -v -f /tmp/partmap.bootdisk /tmp/partmap.image)" + + rm -f /tmp/image.bs /tmp/partmap.bootdisk /tmp/partmap.image + + if [ -n "$diff" ]; then + v "Partition layout has changed. Full image will be written." + ask_bool 0 "Abort" && exit 1 + return 0 + fi +} + +platform_do_upgrade() { + local diskdev partdev part start size cursize + + export_bootdevice && export_partdevice diskdev 0 || { + v "Unable to determine upgrade device" + return 1 + } + + sync + + get_partitions "/dev/$diskdev" bootdisk + + #extract the boot sector from the image + get_image "$@" | dd of=/tmp/image.bs count=1 bs=512b + + get_partitions /tmp/image.bs image + + #iterate over each partition from the image and check boot disk partition size + while read part start size; do + if [ -n "$UPGRADE_BACKUP" -a "$part" -ge 3 ]; then + continue + fi + cursize=$(echo $(grep -m1 '^ *'"$part"' *' /tmp/partmap.bootdisk) | cut -d' ' -f 3) + if [ -z "$cursize" ]; then + v "Unable to find partition $part on boot disk" + return 1 + fi + if [ "$size" -gt "$cursize" ]; then + v "Partition $part on image is bigger than boot disk ($size > $cursize)" + return 1 + fi + done < /tmp/partmap.image + + #iterate over each partition from the image and write it to the boot disk + while read part start size; do + if [ -n "$UPGRADE_BACKUP" -a "$part" -ge 3 ]; then + v "Skip partition $part >= 3 when upgrading" + continue + fi + if export_partdevice partdev $part; then + v "Writing image to /dev/$partdev..." + if [ "$part" -eq 3 ]; then + echo "RESET000" | dd of="/dev/$partdev" bs=512 count=1 conv=sync,fsync 2>/dev/null + else + get_image "$@" | dd of="/dev/$partdev" ibs="512" obs=1M skip="$start" count="$size" conv=fsync + fi + else + v "Unable to find partition $part device, skipped." + fi + done < /tmp/partmap.image + + #copy partition uuid + v "Writing new UUID to /dev/$diskdev..." + get_image "$@" | dd of="/dev/$diskdev" bs=1 skip=440 count=4 seek=440 conv=fsync +} diff --git a/target/linux/amlogic/mesongx/base-files/usr/sbin/install-to-emmc.sh b/target/linux/amlogic/mesongx/base-files/usr/sbin/install-to-emmc.sh new file mode 100755 index 000000000..299684c18 --- /dev/null +++ b/target/linux/amlogic/mesongx/base-files/usr/sbin/install-to-emmc.sh @@ -0,0 +1,144 @@ +#!/bin/sh +# Copy running OpenWrt to eMMC for amlogic + +. /lib/functions.sh +. /lib/functions/system.sh + +include /lib/upgrade +NEWLINE=" +" + +function umount_disk() { + local mounted + local to="${1#/dev/}" + umount "/dev/$to"* 2>/dev/null + mounted="`mount | cut -d' ' -f1 | grep -Fm1 "/dev/$to"`" + if [ -n "$mounted" ] ; then + echo "can not umount $mounted" >&2 + return 1 + fi + return 0 +} + +function part_disk() { + local to="${1#/dev/}" + dd if=/dev/zero of="/dev/$to" bs=512 count=1 conv=notrunc 2>/dev/null + parted --script "/dev/$to" \ + mktable msdos \ + mkpart primary 68MiB 132MiB \ + mkpart primary 132MiB 388MiB \ + mkpart primary 764MiB 2812MiB +} + +function get_bootdisk() { + local var=$1 + local diskdev + export_bootdevice && export_partdevice diskdev 0 || { + echo "Unable to determine upgrade device" >&2 + return 1 + } + export "$var=$diskdev" + return 0 +} + +function get_emmcs() { + local disk index disks + local bootdisk=$1 + + index=1 + for disk in `cd /sys/block && ls | grep '^mmcblk' | grep -Ev 'mmcblk\d+boot\d+'`; do + [[ "$bootdisk" = "$disk" ]] && continue + [ -b /dev/$disk ] && [ "`cat /sys/block/$disk/size`" -gt 0 ] || continue + local diskinfo="`parted -ms "/dev/$disk" unit GiB print 2>/dev/null | grep -m1 "^/dev/$disk:"`" + [ -z "$diskinfo" ] && continue + local size="`echo "$diskinfo" | cut -d: -f2`" + # check disk greater than 2.8GB + [ $(( `echo "${size%%GiB}" | sed 's/\.\(.\).*/ * 10 + \1/'` )) -ge 28 ] || continue + local model="`echo "$diskinfo" | cut -d: -f7 | sed 's/"/_/g'`" + disks="${disks}$index. $disk $size \"$model\"$NEWLINE" + index=$(($index + 1)) + done + echo "$disks" + return 0 +} + +function get_emmc() { + local index + local var=$2 + local emmcs="$(get_emmcs $1)" + [ -z "$emmcs" ] && { + echo "Get eMMC list failed! (Maybe already running on eMMC? Current boot disk is $1)" >&2 + return 1 + } + local count=$(echo "$emmcs" | wc -l) + if [ "$count" -gt 1 ]; then + while true; do + echo "Found these eMMC devices:" + echo "Index. device size model" + echo "$emmcs" + echo -n "Select a disk to install (input index then press Enter): " + read index || { + echo "No input!" >&2 + exit 1 + } + if [ -z "$index" ]; then + echo "Empty input!" + else + echo "$emmcs" | grep -q "^${index}. " && break + echo "Wrong index!" + fi + done + else + echo "Found eMMC device:" + echo "Index. device size model" + echo "$emmcs" + index=1 + fi + local value=$(echo "$emmcs" | grep "^${index}. " | cut -d' ' -f 2) + export "$var=$value" +} + +function main() { + local bootdisk yn partdev part partdevto to + get_bootdisk bootdisk + [ -z "$bootdisk" ] && return 1 + get_emmc $bootdisk to + [ -n "$to" ] || return 1 + echo -ne "Will install to $to, confirm? y/N [n]\b\b" + read yn + if [ "$yn" = Y -o "$yn" = y ]; then + echo "" + echo "umount /dev/$to*" + umount_disk "$to" || return 1 + echo "part /dev/$to" + part_disk "$to" || return 1 + partprobe "/dev/$to" + if export_partdevice partdev 1; then + # umount /boot + echo "try umount /boot" + /bin/mount -o noatime,remount,ro /dev/$partdev + /usr/bin/umount -R -d -l /dev/$partdev 2>/dev/null || /bin/umount -l /dev/$partdev + fi + sleep 1 + echo "copy rom data from /dev/$bootdisk to /dev/$to" + for part in 1 2; do + # copy boot and rootfs partitions + export_partdevice partdev $part + partdevto=${to}p$part + echo "copy /dev/$partdev to /dev/$partdevto" + dd if=/dev/$partdev of=/dev/$partdevto bs=1M conv=notrunc + done + # mark RESET overlay partition + partdevto=${to}p3 + echo "mark /dev/$partdevto as RESET" + echo "RESET000" | dd of="/dev/$partdevto" bs=512 count=1 conv=sync,fsync + echo "All Done!" + else + echo "Bye!" + fi +} + +echo "Copy running OpenWrt to eMMC for amlogic" +echo "" + +main diff --git a/target/linux/amlogic/mesongx/config-5.15 b/target/linux/amlogic/mesongx/config-5.15 new file mode 100644 index 000000000..d3dc2df62 --- /dev/null +++ b/target/linux/amlogic/mesongx/config-5.15 @@ -0,0 +1,710 @@ +CONFIG_64BIT=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_HIBERNATION_HEADER=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MESON=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=33 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_DEFAULT=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_STACKWALK=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM64=y +CONFIG_ARM64_4K_PAGES=y +CONFIG_ARM64_CRYPTO=y +CONFIG_ARM64_MODULE_PLTS=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_PA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_PTR_AUTH=y +CONFIG_ARM64_TAGGED_ADDR_ABI=y +CONFIG_ARM64_VA_BITS=48 +# CONFIG_ARM64_VA_BITS_39 is not set +CONFIG_ARM64_VA_BITS_48=y +# CONFIG_ARMV8_DEPRECATED is not set +CONFIG_ARM_AMBA=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_GIC=y +CONFIG_ARM_GIC_V2M=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_ARM_GIC_V3_ITS_PCI=y +CONFIG_ARM_MHU=y +# CONFIG_ARM_PL172_MPMC is not set +CONFIG_ARM_PSCI_CPUIDLE=y +CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y +CONFIG_ARM_PSCI_FW=y +CONFIG_ARM_SBSA_WATCHDOG=y +CONFIG_ARM_SCMI_CPUFREQ=y +CONFIG_ARM_SCMI_POWER_DOMAIN=y +CONFIG_ARM_SCMI_PROTOCOL=y +CONFIG_ARM_SCPI_CPUFREQ=y +CONFIG_ARM_SCPI_POWER_DOMAIN=y +CONFIG_ARM_SCPI_PROTOCOL=y +CONFIG_ARM_SMC_WATCHDOG=y +CONFIG_ARM_SP805_WATCHDOG=y +CONFIG_ASSOCIATIVE_ARRAY=y +CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y +CONFIG_ATA=y +CONFIG_ATA_LINK_SUPPORTS_LEDS=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_BALLOON_COMPACTION=y +CONFIG_BINFMT_MISC=y +CONFIG_BLK_CGROUP=y +CONFIG_BLK_DEV_BSG=y +CONFIG_BLK_DEV_BSGLIB=y +# CONFIG_BLK_DEV_DM is not set +CONFIG_BLK_DEV_INTEGRITY=y +CONFIG_BLK_DEV_INTEGRITY_T10=y +CONFIG_BLK_DEV_LOOP=y +# CONFIG_BLK_DEV_MD is not set +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_MQ_VIRTIO=y +CONFIG_BLK_PM=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLOCK_COMPAT=y +CONFIG_BRCMSTB_GISB_ARB=y +CONFIG_BSD_PROCESS_ACCT=y +CONFIG_BSD_PROCESS_ACCT_V3=y +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +# CONFIG_CFS_BANDWIDTH is not set +CONFIG_CGROUPS=y +CONFIG_CGROUP_BPF=y +CONFIG_CGROUP_CPUACCT=y +# CONFIG_CGROUP_DEBUG is not set +CONFIG_CGROUP_DEVICE=y +CONFIG_CGROUP_FREEZER=y +CONFIG_CGROUP_HUGETLB=y +# CONFIG_CGROUP_NET_CLASSID is not set +# CONFIG_CGROUP_NET_PRIO is not set +CONFIG_CGROUP_PIDS=y +# CONFIG_CGROUP_RDMA is not set +CONFIG_CGROUP_SCHED=y +CONFIG_CGROUP_WRITEBACK=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMMON_CLK_AXG=y +# CONFIG_COMMON_CLK_AXG_AUDIO is not set +CONFIG_COMMON_CLK_CS2000_CP=y +CONFIG_COMMON_CLK_G12A=y +CONFIG_COMMON_CLK_GXBB=y +CONFIG_COMMON_CLK_MESON_AO_CLKC=y +CONFIG_COMMON_CLK_MESON_CPU_DYNDIV=y +CONFIG_COMMON_CLK_MESON_DUALDIV=y +CONFIG_COMMON_CLK_MESON_EE_CLKC=y +CONFIG_COMMON_CLK_MESON_MPLL=y +CONFIG_COMMON_CLK_MESON_PLL=y +CONFIG_COMMON_CLK_MESON_REGMAP=y +CONFIG_COMMON_CLK_MESON_VID_PLL_DIV=y +CONFIG_COMMON_CLK_PWM=y +CONFIG_COMMON_CLK_S2MPS11=y +CONFIG_COMMON_CLK_SCMI=y +CONFIG_COMMON_CLK_SCPI=y +CONFIG_COMMON_CLK_VC5=y +CONFIG_COMMON_CLK_XGENE=y +CONFIG_COMPAT=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_COMPAT_BINFMT_ELF=y +CONFIG_COMPAT_NETLINK_MESSAGES=y +CONFIG_COMPAT_OLD_SIGACTION=y +CONFIG_CONFIGFS_FS=y +CONFIG_CONTIG_ALLOC=y +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_CPUSETS=y +CONFIG_CPU_FREQ=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_MENU=y +CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y +CONFIG_CPU_PM=y +CONFIG_CPU_RMAP=y +CONFIG_CRASH_CORE=y +CONFIG_CRASH_DUMP=y +CONFIG_CRC16=y +CONFIG_CRC7=y +CONFIG_CRC_ITU_T=y +CONFIG_CRC_T10DIF=y +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_ANSI_CPRNG=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_DRBG=y +CONFIG_CRYPTO_DRBG_HMAC=y +CONFIG_CRYPTO_DRBG_MENU=y +CONFIG_CRYPTO_ECHAINIV=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_HMAC=y +CONFIG_CRYPTO_JITTERENTROPY=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_LIB_SHA256=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_RNG_DEFAULT=y +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA256_ARM64=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_SIMD=y +CONFIG_DCACHE_WORD_ACCESS=y +# CONFIG_DEVFREQ_GOV_PASSIVE is not set +# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set +# CONFIG_DEVFREQ_GOV_POWERSAVE is not set +CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y +# CONFIG_DEVFREQ_GOV_USERSPACE is not set +CONFIG_DEVTMPFS=y +CONFIG_DEVTMPFS_MOUNT=y +CONFIG_DEV_COREDUMP=y +CONFIG_DMADEVICES=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_ENGINE_RAID=y +CONFIG_DMA_OF=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_SHARED_BUFFER=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DNS_RESOLVER=y +CONFIG_DTC=y +CONFIG_DT_IDLE_STATES=y +CONFIG_DWMAC_GENERIC=y +CONFIG_DWMAC_MESON=y +CONFIG_DW_WATCHDOG=y +CONFIG_EDAC=y +# CONFIG_EDAC_DEBUG is not set +# CONFIG_EDAC_DMC520 is not set +CONFIG_EDAC_LEGACY_SYSFS=y +CONFIG_EDAC_SUPPORT=y +# CONFIG_EDAC_THUNDERX is not set +# CONFIG_EDAC_XGENE is not set +CONFIG_ENERGY_MODEL=y +CONFIG_EXT2_FS=y +# CONFIG_EXT2_FS_POSIX_ACL is not set +# CONFIG_EXT2_FS_SECURITY is not set +CONFIG_EXT3_FS=y +# CONFIG_EXT3_FS_POSIX_ACL is not set +# CONFIG_EXT3_FS_SECURITY is not set +CONFIG_EXT4_FS=y +CONFIG_EXT4_FS_POSIX_ACL=y +CONFIG_EXTCON=y +CONFIG_EXTCON_USB_GPIO=y +CONFIG_F2FS_FS=y +CONFIG_FAILOVER=y +CONFIG_FAIR_GROUP_SCHED=y +CONFIG_FANOTIFY=y +CONFIG_FANOTIFY_ACCESS_PERMISSIONS=y +CONFIG_FAT_FS=y +CONFIG_FB=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_SIMPLE=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +# CONFIG_FLATMEM_MANUAL is not set +CONFIG_FRAME_POINTER=y +CONFIG_FREEZER=y +CONFIG_FS_IOMAP=y +CONFIG_FS_MBCACHE=y +CONFIG_FS_POSIX_ACL=y +CONFIG_FW_CACHE=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GARP=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GLOB=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_GENERIC_PLATFORM=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HIBERNATE_CALLBACKS=y +CONFIG_HIBERNATION=y +CONFIG_HIBERNATION_SNAPSHOT_DEV=y +CONFIG_HOLES_IN_ZONE=y +CONFIG_HOTPLUG_CPU=y +CONFIG_HUGETLBFS=y +CONFIG_HUGETLB_PAGE=y +CONFIG_HVC_DRIVER=y +CONFIG_HWMON=y +# CONFIG_HWPOISON_INJECT is not set +CONFIG_HWSPINLOCK=y +CONFIG_I2C=y +CONFIG_I2C_ALGOBIT=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_DESIGNWARE_CORE=y +CONFIG_I2C_DESIGNWARE_PLATFORM=y +CONFIG_I2C_MESON=y +CONFIG_I2C_MUX=y +CONFIG_I2C_MUX_PCA954x=y +CONFIG_I2C_SLAVE=y +# CONFIG_I2C_SLAVE_TESTUNIT is not set +CONFIG_IIO=y +CONFIG_IKCONFIG=y +CONFIG_IKCONFIG_PROC=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_INDIRECT_PIO=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_INTERCONNECT=y +CONFIG_INTERVAL_TREE=y +CONFIG_IOMMU_API=y +CONFIG_IPC_NS=y +CONFIG_IP_PNP=y +CONFIG_IP_PNP_BOOTP=y +CONFIG_IP_PNP_DHCP=y +# CONFIG_IP_PNP_RARP is not set +CONFIG_IRQCHIP=y +CONFIG_IRQ_BYPASS_MANAGER=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_POLL=y +CONFIG_IRQ_TIME_ACCOUNTING=y +CONFIG_IRQ_WORK=y +CONFIG_JBD2=y +CONFIG_JUMP_LABEL=y +CONFIG_KALLSYMS=y +CONFIG_KEXEC=y +CONFIG_KEXEC_CORE=y +CONFIG_KEXEC_FILE=y +CONFIG_KEYS=y +CONFIG_KSM=y +CONFIG_KVM=y +CONFIG_KVM_GENERIC_DIRTYLOG_READ_PROTECT=y +CONFIG_KVM_MMIO=y +CONFIG_KVM_VFIO=y +CONFIG_LEDS_GPIO=y +CONFIG_LEDS_PWM=y +CONFIG_LEDS_SYSCON=y +CONFIG_LEDS_TRIGGER_CPU=y +CONFIG_LEDS_TRIGGER_DISK=y +CONFIG_LEDS_TRIGGER_PANIC=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LZO_COMPRESS=y +CONFIG_LZO_DECOMPRESS=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_MAILBOX=y +# CONFIG_MAILBOX_TEST is not set +CONFIG_MD=y +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_BUS_MUX=y +CONFIG_MDIO_BUS_MUX_MESON_G12A=y +CONFIG_MDIO_BUS_MUX_MMIOREG=y +CONFIG_MDIO_BUS_MUX_MULTIPLEXER=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +# CONFIG_MDIO_GPIO is not set +CONFIG_MEMCG=y +CONFIG_MEMCG_KMEM=y +CONFIG_MEMCG_SWAP=y +CONFIG_MEMFD_CREATE=y +CONFIG_MEMORY=y +CONFIG_MEMORY_BALLOON=y +CONFIG_MEMORY_FAILURE=y +CONFIG_MEMORY_HOTPLUG=y +# CONFIG_MEMORY_HOTPLUG_DEFAULT_ONLINE is not set +CONFIG_MEMORY_HOTPLUG_SPARSE=y +CONFIG_MEMORY_HOTREMOVE=y +CONFIG_MEMORY_ISOLATION=y +CONFIG_MEMTEST=y +# CONFIG_MESON_CANVAS is not set +CONFIG_MESON_CLK_MEASURE=y +CONFIG_MESON_EE_PM_DOMAINS=y +CONFIG_MESON_GXBB_WATCHDOG=y +CONFIG_MESON_GXL_PHY=y +CONFIG_MESON_GX_PM_DOMAINS=y +CONFIG_MESON_GX_SOCINFO=y +CONFIG_MESON_IRQ_GPIO=y +CONFIG_MESON_MX_SOCINFO=y +CONFIG_MESON_SARADC=y +CONFIG_MESON_SECURE_PM_DOMAINS=y +CONFIG_MESON_SM=y +# CONFIG_MESON_WATCHDOG is not set +CONFIG_MFD_CORE=y +CONFIG_MFD_SEC_CORE=y +CONFIG_MFD_SYSCON=y +CONFIG_MFD_VEXPRESS_SYSREG=y +CONFIG_MIGRATION=y +CONFIG_MMC=y +CONFIG_MMC_ARMMMCI=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_CQHCI=y +CONFIG_MMC_DW=y +# CONFIG_MMC_DW_BLUEFIELD is not set +# CONFIG_MMC_DW_EXYNOS is not set +# CONFIG_MMC_DW_HI3798CV200 is not set +# CONFIG_MMC_DW_K3 is not set +# CONFIG_MMC_DW_PCI is not set +CONFIG_MMC_DW_PLTFM=y +CONFIG_MMC_MESON_GX=y +# CONFIG_MMC_MESON_MX_SDIO is not set +CONFIG_MMC_MTK=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_IO_ACCESSORS=y +CONFIG_MMC_SDHCI_OF_DWCMSHC=y +# CONFIG_MMC_SDHCI_PCI is not set +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SPI=y +CONFIG_MMU_NOTIFIER=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MRP=y +CONFIG_MULTIPLEXER=y +# CONFIG_MUSB_PIO_ONLY is not set +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_MUX_MMIO=y +CONFIG_MV_XOR_V2=y +CONFIG_NAMESPACES=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NETFILTER=y +CONFIG_NET_CLS_ACT=y +# CONFIG_NET_CLS_CGROUP is not set +CONFIG_NET_FAILOVER=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_NS=y +CONFIG_NLS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=256 +CONFIG_NVMEM=y +CONFIG_NVMEM_SYSFS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_OID_REGISTRY=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OPTEE=y +CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1 +CONFIG_PADATA=y +CONFIG_PAGE_COUNTER=y +CONFIG_PAGE_REPORTING=y +CONFIG_PARAVIRT=y +CONFIG_PARTITION_PERCPU=y +CONFIG_PCI=y +CONFIG_PCIEAER=y +CONFIG_PCIEPORTBUS=y +CONFIG_PCIE_DW=y +CONFIG_PCIE_DW_HOST=y +CONFIG_PCIE_PME=y +CONFIG_PCI_HOST_COMMON=y +CONFIG_PCI_HOST_GENERIC=y +CONFIG_PCI_IOV=y +CONFIG_PCI_PASID=y +CONFIG_PCS_XPCS=y +CONFIG_PGTABLE_LEVELS=4 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_PHY_MESON8B_USB2=y +CONFIG_PHY_MESON_AXG_MIPI_PCIE_ANALOG=y +CONFIG_PHY_MESON_AXG_PCIE=y +CONFIG_PHY_MESON_G12A_USB2=y +CONFIG_PHY_MESON_G12A_USB3_PCIE=y +CONFIG_PHY_MESON_GXL_USB2=y +CONFIG_PHY_SAMSUNG_USB2=y +CONFIG_PHY_XGENE=y +CONFIG_PID_NS=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_MESON=y +CONFIG_PINCTRL_MESON8_PMX=y +CONFIG_PINCTRL_MESON_A1=y +CONFIG_PINCTRL_MESON_AXG=y +CONFIG_PINCTRL_MESON_AXG_PMX=y +CONFIG_PINCTRL_MESON_G12A=y +CONFIG_PINCTRL_MESON_GXBB=y +CONFIG_PINCTRL_MESON_GXL=y +CONFIG_PL330_DMA=y +CONFIG_PLATFORM_MHU=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_DEVFREQ=y +# CONFIG_PM_DEVFREQ_EVENT is not set +CONFIG_PM_GENERIC_DOMAINS=y +CONFIG_PM_GENERIC_DOMAINS_OF=y +CONFIG_PM_GENERIC_DOMAINS_SLEEP=y +CONFIG_PM_OPP=y +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_PM_STD_PARTITION="" +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_SYSCON=y +# CONFIG_POWER_RESET_VEXPRESS is not set +CONFIG_POWER_SUPPLY=y +CONFIG_PREEMPT_NOTIFIERS=y +CONFIG_PRINTK_TIME=y +CONFIG_PRINT_QUOTA_WARNING=y +CONFIG_PROC_PID_CPUSET=y +CONFIG_PROC_VMCORE=y +CONFIG_PROFILING=y +CONFIG_PSTORE=y +CONFIG_PWM=y +CONFIG_PWM_MESON=y +CONFIG_PWM_SYSFS=y +# CONFIG_QFMT_V1 is not set +# CONFIG_QFMT_V2 is not set +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_QUOTA=y +CONFIG_QUOTACTL=y +# CONFIG_QUOTA_NETLINK_INTERFACE is not set +CONFIG_RANDOMIZE_BASE=y +CONFIG_RANDOMIZE_MODULE_REGION_FULL=y +CONFIG_RAS=y +CONFIG_RATIONAL=y +# CONFIG_RAVE_SP_CORE is not set +CONFIG_REALTEK_PHY=y +CONFIG_REBOOT_MODE=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_IRQ=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_FAN53555=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_PWM=y +CONFIG_RELOCATABLE=y +CONFIG_REMOTEPROC=y +# CONFIG_REMOTEPROC_CDEV is not set +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_MESON=y +# CONFIG_RESET_MESON_AUDIO_ARB is not set +CONFIG_RESET_SCMI=y +CONFIG_RFS_ACCEL=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +CONFIG_RPMSG=y +# CONFIG_RPMSG_CHAR is not set +CONFIG_RPS=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_MESON_VRTC=y +# CONFIG_RTC_DRV_S5M is not set +CONFIG_RTC_I2C_AND_SPI=y +# CONFIG_RT_GROUP_SCHED is not set +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_SATA_AHCI=y +CONFIG_SATA_AHCI_PLATFORM=y +CONFIG_SATA_HOST=y +CONFIG_SCHED_AUTOGROUP=y +CONFIG_SCHED_INFO=y +CONFIG_SCHED_MC=y +CONFIG_SCHED_SMT=y +CONFIG_SCSI=y +CONFIG_SCSI_HISI_SAS=y +# CONFIG_SCSI_PROC_FS is not set +CONFIG_SCSI_SAS_ATA=y +CONFIG_SCSI_SAS_ATTRS=y +CONFIG_SCSI_SAS_HOST_SMP=y +CONFIG_SCSI_SAS_LIBSAS=y +CONFIG_SCSI_UFSHCD=y +# CONFIG_SCSI_UFSHCD_PCI is not set +CONFIG_SCSI_UFSHCD_PLATFORM=y +# CONFIG_SCSI_UFS_BSG is not set +# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set +# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set +CONFIG_SECURITY=y +# CONFIG_SECURITY_NETWORK is not set +CONFIG_SERIAL_DEV_BUS=y +CONFIG_SERIAL_DEV_CTRL_TTYPORT=y +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_MESON=y +CONFIG_SERIAL_MESON_CONSOLE=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SG_POOL=y +CONFIG_SMP=y +CONFIG_SOCK_CGROUP_DATA=y +CONFIG_SOC_BRCMSTB=y +CONFIG_SOC_BUS=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_MANUAL=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +CONFIG_SPI_CADENCE_QUADSPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +# CONFIG_SPI_MESON_SPICC is not set +# CONFIG_SPI_MESON_SPIFC is not set +CONFIG_SRAM=y +CONFIG_SRCU=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_PLATFORM=y +# CONFIG_STMMAC_SELFTESTS is not set +CONFIG_SWIOTLB=y +CONFIG_SWPHY=y +CONFIG_SYSCON_REBOOT_MODE=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_TASKSTATS=y +CONFIG_TASK_DELAY_ACCT=y +CONFIG_TASK_IO_ACCOUNTING=y +CONFIG_TASK_XACCT=y +CONFIG_TCG_TIS_I2C_INFINEON=y +CONFIG_TCG_TPM=y +CONFIG_TEE=y +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THERMAL_OF=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TIME_NS=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TRANSPARENT_HUGEPAGE=y +CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y +# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_TUN=y +# CONFIG_UACCE is not set +# CONFIG_UCLAMP_TASK is not set +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_USB=y +CONFIG_USB_BDC_UDC=y +CONFIG_USB_CHIPIDEA=y +CONFIG_USB_CHIPIDEA_HOST=y +CONFIG_USB_CHIPIDEA_UDC=y +CONFIG_USB_COMMON=y +CONFIG_USB_CONN_GPIO=y +CONFIG_USB_DWC2=y +CONFIG_USB_DWC2_DUAL_ROLE=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_DUAL_ROLE=y +# CONFIG_USB_DWC3_GADGET is not set +# CONFIG_USB_DWC3_HOST is not set +CONFIG_USB_DWC3_MESON_G12A=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_GADGET=y +CONFIG_USB_HSIC_USB3503=y +CONFIG_USB_ISP1760=y +CONFIG_USB_ISP1760_DUAL_ROLE=y +# CONFIG_USB_ISP1760_GADGET_ROLE is not set +CONFIG_USB_ISP1760_HCD=y +# CONFIG_USB_ISP1760_HOST_ROLE is not set +CONFIG_USB_ISP1761_UDC=y +CONFIG_USB_MUSB_DUAL_ROLE=y +# CONFIG_USB_MUSB_GADGET is not set +CONFIG_USB_MUSB_HDRC=y +# CONFIG_USB_MUSB_HOST is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_OTG=y +CONFIG_USB_PHY=y +CONFIG_USB_ROLE_SWITCH=y +CONFIG_USB_SNP_CORE=y +CONFIG_USB_SNP_UDC_PLAT=y +CONFIG_USB_STORAGE=y +CONFIG_USB_SUPPORT=y +CONFIG_USB_ULPI=y +CONFIG_USB_ULPI_BUS=y +CONFIG_USB_ULPI_VIEWPORT=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_PLATFORM=y +CONFIG_USER_NS=y +CONFIG_UTS_NS=y +CONFIG_VEXPRESS_CONFIG=y +CONFIG_VFAT_FS=y +CONFIG_VFIO=y +CONFIG_VFIO_IOMMU_TYPE1=y +# CONFIG_VFIO_MDEV is not set +# CONFIG_VFIO_NOIOMMU is not set +CONFIG_VFIO_PCI=y +CONFIG_VFIO_PCI_INTX=y +CONFIG_VFIO_PCI_MMAP=y +# CONFIG_VFIO_PLATFORM is not set +CONFIG_VFIO_VIRQFD=y +CONFIG_VIRTIO=y +CONFIG_VIRTIO_BALLOON=y +CONFIG_VIRTIO_BLK=y +CONFIG_VIRTIO_CONSOLE=y +CONFIG_VIRTIO_MMIO=y +CONFIG_VIRTIO_NET=y +CONFIG_VIRTIO_PCI=y +CONFIG_VIRTIO_PCI_LEGACY=y +CONFIG_VIRTUALIZATION=y +CONFIG_VLAN_8021Q_GVRP=y +CONFIG_VLAN_8021Q_MVRP=y +CONFIG_VMAP_STACK=y +CONFIG_WANT_DEV_COREDUMP=y +CONFIG_WATCHDOG_CORE=y +CONFIG_XARRAY_MULTI=y +CONFIG_XPS=y +CONFIG_XXHASH=y +# CONFIG_ZONE_DEVICE is not set +CONFIG_ZONE_DMA32=y diff --git a/target/linux/amlogic/mesongx/target.mk b/target/linux/amlogic/mesongx/target.mk new file mode 100644 index 000000000..34d1a58c6 --- /dev/null +++ b/target/linux/amlogic/mesongx/target.mk @@ -0,0 +1,12 @@ +ARCH:=aarch64 +CPU_TYPE:=cortex-a53 +BOARDNAME:=Amlogic S905x boards (64 bit) + +KERNEL_PATCHVER:=5.15 + +DEFAULT_PACKAGES+=ethtool parted kmod-fb + +define Target/Description + Build firmware image for Amlogic S905x devices. + This firmware features a 64 bit kernel. +endef diff --git a/target/linux/amlogic/modules.mk b/target/linux/amlogic/modules.mk new file mode 100644 index 000000000..6866241a0 --- /dev/null +++ b/target/linux/amlogic/modules.mk @@ -0,0 +1,15 @@ +define Package/brcmfmac-firmware-43455-sdio-phicomm-n1 + SECTION:=firmware + CATEGORY:=Firmware + TITLE:=Broadcom BCM43455 firmware for Phicomm N1 + VERSION:=1.0.0 + DEPENDS:=+brcmfmac-firmware-43455-sdio +brcmfmac-nvram-43455-sdio +endef + +define Package/brcmfmac-firmware-43455-sdio-phicomm-n1/install + $(INSTALL_DIR) $(1)/lib/firmware/brcm + $(LN) brcmfmac43455-sdio.raspberrypi,4-model-b.txt $(1)/lib/firmware/brcm/brcmfmac43455-sdio.phicomm,n1.txt + $(LN) brcmfmac43455-sdio.bin $(1)/lib/firmware/brcm/brcmfmac43455-sdio.phicomm,n1.bin + $(LN) brcmfmac43455-sdio.clm_blob $(1)/lib/firmware/brcm/brcmfmac43455-sdio.phicomm,n1.clm_blob +endef +$(eval $(call BuildPackage,brcmfmac-firmware-43455-sdio-phicomm-n1)) diff --git a/target/linux/amlogic/patches-5.15/001-dts-s905d-fix-high-load.patch b/target/linux/amlogic/patches-5.15/001-dts-s905d-fix-high-load.patch new file mode 100644 index 000000000..0e2045d00 --- /dev/null +++ b/target/linux/amlogic/patches-5.15/001-dts-s905d-fix-high-load.patch @@ -0,0 +1,16 @@ +--- + arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-p230.dts +@@ -86,8 +86,7 @@ + reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>; + + interrupt-parent = <&gpio_intc>; +- interrupts = <29 IRQ_TYPE_LEVEL_LOW>; +- eee-broken-1000t; ++ interrupts = <25 IRQ_TYPE_LEVEL_LOW>; + }; + }; + diff --git a/target/linux/amlogic/patches-5.15/002-dts-improve-phicomm-n1-support.patch b/target/linux/amlogic/patches-5.15/002-dts-improve-phicomm-n1-support.patch new file mode 100644 index 000000000..c73ebea11 --- /dev/null +++ b/target/linux/amlogic/patches-5.15/002-dts-improve-phicomm-n1-support.patch @@ -0,0 +1,48 @@ +--- a/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-phicomm-n1.dts ++++ b/arch/arm64/boot/dts/amlogic/meson-gxl-s905d-phicomm-n1.dts +@@ -10,6 +10,17 @@ + / { + compatible = "phicomm,n1", "amlogic,s905d", "amlogic,meson-gxl"; + model = "Phicomm N1"; ++ ++ aliases { ++ mmc0 = &sd_emmc_b; ++ mmc1 = &sd_emmc_c; ++ mmc2 = &sd_emmc_a; ++ ++ led-boot = &led_work; ++ led-failsafe = &led_work; ++ led-running = &led_work; ++ led-upgrade = &led_work; ++ }; + + cvbs-connector { + status = "disabled"; +@@ -18,7 +29,7 @@ + leds { + compatible = "gpio-leds"; + +- led { ++ led_work: led { + label = "n1:white:status"; + gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>; + default-state = "on"; +@@ -33,3 +44,18 @@ + &usb { + dr_mode = "host"; + }; ++ ++&sd_emmc_a { ++ max-frequency = <80000000>; ++ sd-uhs-ddr50; ++}; ++ ++&sd_emmc_b { ++ status = "disabled"; ++}; ++ ++ðmac { ++ snps,aal; ++ snps,txpbl = <0x8>; ++ snps,rxpbl = <0x8>; ++}; diff --git a/target/linux/meson/patches-6.1/902-use-system-LED-for-OpenWrt.patch b/target/linux/amlogic/patches-6.1/902-use-system-LED-for-OpenWrt.patch similarity index 100% rename from target/linux/meson/patches-6.1/902-use-system-LED-for-OpenWrt.patch rename to target/linux/amlogic/patches-6.1/902-use-system-LED-for-OpenWrt.patch diff --git a/target/linux/meson/patches-6.1/903-add-dts-and-identify-emmc.patch b/target/linux/amlogic/patches-6.1/903-add-dts-and-identify-emmc.patch similarity index 100% rename from target/linux/meson/patches-6.1/903-add-dts-and-identify-emmc.patch rename to target/linux/amlogic/patches-6.1/903-add-dts-and-identify-emmc.patch diff --git a/target/linux/meson/patches-6.1/905-pwm-meson-modify-and-simplify-calculation-in.patch b/target/linux/amlogic/patches-6.1/905-pwm-meson-modify-and-simplify-calculation-in.patch similarity index 100% rename from target/linux/meson/patches-6.1/905-pwm-meson-modify-and-simplify-calculation-in.patch rename to target/linux/amlogic/patches-6.1/905-pwm-meson-modify-and-simplify-calculation-in.patch diff --git a/target/linux/bcm27xx/patches-6.1/950-0025-drm-panel-Add-and-initialise-an-orientation-field-to.patch b/target/linux/bcm27xx/patches-6.1/950-0025-drm-panel-Add-and-initialise-an-orientation-field-to.patch index 9cdbe6d7c..67c1e1826 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0025-drm-panel-Add-and-initialise-an-orientation-field-to.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0025-drm-panel-Add-and-initialise-an-orientation-field-to.patch @@ -46,7 +46,7 @@ Signed-off-by: Dave Stevenson } EXPORT_SYMBOL(drm_panel_init); -@@ -289,16 +292,18 @@ int of_drm_get_panel_orientation(const s +@@ -294,16 +297,18 @@ int of_drm_get_panel_orientation(const s if (ret < 0) return ret; diff --git a/target/linux/bcm27xx/patches-6.1/950-0035-drm-panel-Add-prepare_upstream_first-flag-to-drm_pan.patch b/target/linux/bcm27xx/patches-6.1/950-0035-drm-panel-Add-prepare_upstream_first-flag-to-drm_pan.patch index 1e54e6130..7bda98e6e 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0035-drm-panel-Add-prepare_upstream_first-flag-to-drm_pan.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0035-drm-panel-Add-prepare_upstream_first-flag-to-drm_pan.patch @@ -19,7 +19,7 @@ Signed-off-by: Maxime Ripard --- a/drivers/gpu/drm/bridge/panel.c +++ b/drivers/gpu/drm/bridge/panel.c -@@ -368,6 +368,8 @@ struct drm_bridge *devm_drm_panel_bridge +@@ -371,6 +371,8 @@ struct drm_bridge *devm_drm_panel_bridge devres_free(ptr); } diff --git a/target/linux/bcm27xx/patches-6.1/950-0038-drm-vc4-Support-zpos-on-all-planes.patch b/target/linux/bcm27xx/patches-6.1/950-0038-drm-vc4-Support-zpos-on-all-planes.patch index 068862766..cc8310bf6 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0038-drm-vc4-Support-zpos-on-all-planes.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0038-drm-vc4-Support-zpos-on-all-planes.patch @@ -88,7 +88,7 @@ Signed-off-by: Dave Stevenson if (ret) --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c -@@ -1600,9 +1600,14 @@ struct drm_plane *vc4_plane_init(struct +@@ -1597,9 +1597,14 @@ struct drm_plane *vc4_plane_init(struct DRM_COLOR_YCBCR_BT709, DRM_COLOR_YCBCR_LIMITED_RANGE); @@ -103,7 +103,7 @@ Signed-off-by: Dave Stevenson int vc4_plane_create_additional_planes(struct drm_device *drm) { struct drm_plane *cursor_plane; -@@ -1618,24 +1623,35 @@ int vc4_plane_create_additional_planes(s +@@ -1615,24 +1620,35 @@ int vc4_plane_create_additional_planes(s * modest number of planes to expose, that should hopefully * still cover any sane usecase. */ diff --git a/target/linux/bcm27xx/patches-6.1/950-0043-vc4-drm-plane-Make-use-of-chroma-siting-parameter.patch b/target/linux/bcm27xx/patches-6.1/950-0043-vc4-drm-plane-Make-use-of-chroma-siting-parameter.patch index b5ebb28bb..fb648b1fc 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0043-vc4-drm-plane-Make-use-of-chroma-siting-parameter.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0043-vc4-drm-plane-Make-use-of-chroma-siting-parameter.patch @@ -49,7 +49,7 @@ Signed-off-by: Dom Cobley vc4_dlist_write(vc4_state, 0xc0c0c0c0); } -@@ -1649,6 +1652,8 @@ struct drm_plane *vc4_plane_init(struct +@@ -1646,6 +1649,8 @@ struct drm_plane *vc4_plane_init(struct DRM_COLOR_YCBCR_BT709, DRM_COLOR_YCBCR_LIMITED_RANGE); diff --git a/target/linux/bcm27xx/patches-6.1/950-0051-drm-vc4-Add-3-3-2-and-4-4-4-4-RGB-RGBX-RGBA-formats.patch b/target/linux/bcm27xx/patches-6.1/950-0051-drm-vc4-Add-3-3-2-and-4-4-4-4-RGB-RGBX-RGBA-formats.patch index c4e005058..2cd79eac1 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0051-drm-vc4-Add-3-3-2-and-4-4-4-4-RGB-RGBX-RGBA-formats.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0051-drm-vc4-Add-3-3-2-and-4-4-4-4-RGB-RGBX-RGBA-formats.patch @@ -85,7 +85,7 @@ Signed-off-by: Dave Stevenson }; static const struct hvs_format *vc4_get_hvs_format(u32 drm_format) -@@ -1575,6 +1635,16 @@ static bool vc4_format_mod_supported(str +@@ -1572,6 +1632,16 @@ static bool vc4_format_mod_supported(str case DRM_FORMAT_BGRX1010102: case DRM_FORMAT_RGBA1010102: case DRM_FORMAT_BGRA1010102: diff --git a/target/linux/bcm27xx/patches-6.1/950-0080-Revert-net-bcmgenet-Request-APD-DLL-disable-and-IDDQ.patch b/target/linux/bcm27xx/patches-6.1/950-0080-Revert-net-bcmgenet-Request-APD-DLL-disable-and-IDDQ.patch index 9a29d6179..57a59c1ae 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0080-Revert-net-bcmgenet-Request-APD-DLL-disable-and-IDDQ.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0080-Revert-net-bcmgenet-Request-APD-DLL-disable-and-IDDQ.patch @@ -16,7 +16,7 @@ Signed-off-by: Phil Elwell --- a/drivers/net/ethernet/broadcom/genet/bcmmii.c +++ b/drivers/net/ethernet/broadcom/genet/bcmmii.c -@@ -290,9 +290,7 @@ int bcmgenet_mii_probe(struct net_device +@@ -303,9 +303,7 @@ int bcmgenet_mii_probe(struct net_device struct device_node *dn = kdev->of_node; phy_interface_t phy_iface = priv->phy_interface; struct phy_device *phydev; diff --git a/target/linux/bcm27xx/patches-6.1/950-0081-smsx95xx-fix-crimes-against-truesize.patch b/target/linux/bcm27xx/patches-6.1/950-0081-smsx95xx-fix-crimes-against-truesize.patch deleted file mode 100644 index 98a6ed86b..000000000 --- a/target/linux/bcm27xx/patches-6.1/950-0081-smsx95xx-fix-crimes-against-truesize.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 648c906a27d3713f589717f4be36583fc64f2ba1 Mon Sep 17 00:00:00 2001 -From: Steve Glendinning -Date: Thu, 19 Feb 2015 18:47:12 +0000 -Subject: [PATCH] smsx95xx: fix crimes against truesize - -smsc95xx is adjusting truesize when it shouldn't, and following a recent patch from Eric this is now triggering warnings. - -This patch stops smsc95xx from changing truesize. - -Signed-off-by: Steve Glendinning ---- - drivers/net/usb/smsc95xx.c | 10 ++++++++-- - 1 file changed, 8 insertions(+), 2 deletions(-) - ---- a/drivers/net/usb/smsc95xx.c -+++ b/drivers/net/usb/smsc95xx.c -@@ -79,6 +79,10 @@ static bool turbo_mode = true; - module_param(turbo_mode, bool, 0644); - MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); - -+static bool truesize_mode = false; -+module_param(truesize_mode, bool, 0644); -+MODULE_PARM_DESC(truesize_mode, "Report larger truesize value"); -+ - static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index, - u32 *data) - { -@@ -1870,7 +1874,8 @@ static int smsc95xx_rx_fixup(struct usbn - if (dev->net->features & NETIF_F_RXCSUM) - smsc95xx_rx_csum_offload(skb); - skb_trim(skb, skb->len - 4); /* remove fcs */ -- skb->truesize = size + sizeof(struct sk_buff); -+ if (truesize_mode) -+ skb->truesize = size + sizeof(struct sk_buff); - - return 1; - } -@@ -1888,7 +1893,8 @@ static int smsc95xx_rx_fixup(struct usbn - if (dev->net->features & NETIF_F_RXCSUM) - smsc95xx_rx_csum_offload(ax_skb); - skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ -- ax_skb->truesize = size + sizeof(struct sk_buff); -+ if (truesize_mode) -+ ax_skb->truesize = size + sizeof(struct sk_buff); - - usbnet_skb_return(dev, ax_skb); - } diff --git a/target/linux/bcm27xx/patches-6.1/950-0082-smsc95xx-Experimental-Enable-turbo_mode-and-packetsi.patch b/target/linux/bcm27xx/patches-6.1/950-0082-smsc95xx-Experimental-Enable-turbo_mode-and-packetsi.patch index c55f194b2..593e5eb45 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0082-smsc95xx-Experimental-Enable-turbo_mode-and-packetsi.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0082-smsc95xx-Experimental-Enable-turbo_mode-and-packetsi.patch @@ -11,9 +11,9 @@ See: http://forum.kodi.tv/showthread.php?tid=285288 --- a/drivers/net/usb/smsc95xx.c +++ b/drivers/net/usb/smsc95xx.c -@@ -83,6 +83,10 @@ static bool truesize_mode = false; - module_param(truesize_mode, bool, 0644); - MODULE_PARM_DESC(truesize_mode, "Report larger truesize value"); +@@ -79,6 +79,10 @@ static bool turbo_mode = true; + module_param(turbo_mode, bool, 0644); + MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); +static int packetsize = 2560; +module_param(packetsize, int, 0644); @@ -22,7 +22,7 @@ See: http://forum.kodi.tv/showthread.php?tid=285288 static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data) { -@@ -936,13 +940,13 @@ static int smsc95xx_reset(struct usbnet +@@ -932,13 +936,13 @@ static int smsc95xx_reset(struct usbnet if (!turbo_mode) { burst_cap = 0; diff --git a/target/linux/bcm27xx/patches-6.1/950-0083-Allow-mac-address-to-be-set-in-smsc95xx.patch b/target/linux/bcm27xx/patches-6.1/950-0083-Allow-mac-address-to-be-set-in-smsc95xx.patch index a47a858e1..d9035fddb 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0083-Allow-mac-address-to-be-set-in-smsc95xx.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0083-Allow-mac-address-to-be-set-in-smsc95xx.patch @@ -22,7 +22,7 @@ Signed-off-by: Phil Elwell --- a/drivers/net/usb/smsc95xx.c +++ b/drivers/net/usb/smsc95xx.c -@@ -87,6 +87,10 @@ static int packetsize = 2560; +@@ -83,6 +83,10 @@ static int packetsize = 2560; module_param(packetsize, int, 0644); MODULE_PARM_DESC(packetsize, "Override the RX URB packet size"); @@ -33,7 +33,7 @@ Signed-off-by: Phil Elwell static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data) { -@@ -809,6 +813,52 @@ static int smsc95xx_ioctl(struct net_dev +@@ -805,6 +809,52 @@ static int smsc95xx_ioctl(struct net_dev return phy_mii_ioctl(netdev->phydev, rq, cmd); } @@ -86,7 +86,7 @@ Signed-off-by: Phil Elwell static void smsc95xx_init_mac_address(struct usbnet *dev) { u8 addr[ETH_ALEN]; -@@ -832,6 +882,10 @@ static void smsc95xx_init_mac_address(st +@@ -828,6 +878,10 @@ static void smsc95xx_init_mac_address(st } } diff --git a/target/linux/bcm27xx/patches-6.1/950-0106-Add-dwc_otg-driver.patch b/target/linux/bcm27xx/patches-6.1/950-0106-Add-dwc_otg-driver.patch index f8ab3b04a..89ed66656 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0106-Add-dwc_otg-driver.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0106-Add-dwc_otg-driver.patch @@ -1185,7 +1185,7 @@ Signed-off-by: Jonathan Bell } --- a/drivers/usb/core/hub.c +++ b/drivers/usb/core/hub.c -@@ -5677,7 +5677,7 @@ static void port_event(struct usb_hub *h +@@ -5698,7 +5698,7 @@ static void port_event(struct usb_hub *h port_dev->over_current_count++; port_over_current_notify(port_dev); diff --git a/target/linux/bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch b/target/linux/bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch index 476a3caf3..c50177898 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0111-MMC-added-alternative-MMC-driver.patch @@ -266,7 +266,7 @@ Signed-off-by: Phil Elwell static inline int mmc_blk_part_switch(struct mmc_card *card, unsigned int part_type); static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, -@@ -3040,6 +3047,8 @@ static int mmc_blk_probe(struct mmc_card +@@ -3042,6 +3049,8 @@ static int mmc_blk_probe(struct mmc_card { struct mmc_blk_data *md; int ret = 0; @@ -275,7 +275,7 @@ Signed-off-by: Phil Elwell /* * Check that the card supports the command class(es) we need. -@@ -3047,7 +3056,16 @@ static int mmc_blk_probe(struct mmc_card +@@ -3049,7 +3058,16 @@ static int mmc_blk_probe(struct mmc_card if (!(card->csd.cmdclass & CCC_BLOCK_READ)) return -ENODEV; @@ -293,7 +293,7 @@ Signed-off-by: Phil Elwell card->complete_wq = alloc_workqueue("mmc_complete", WQ_MEM_RECLAIM | WQ_HIGHPRI, 0); -@@ -3062,6 +3080,17 @@ static int mmc_blk_probe(struct mmc_card +@@ -3064,6 +3082,17 @@ static int mmc_blk_probe(struct mmc_card goto out_free; } diff --git a/target/linux/bcm27xx/patches-6.1/950-0118-firmware-bcm2835-Support-ARCH_BCM270x.patch b/target/linux/bcm27xx/patches-6.1/950-0118-firmware-bcm2835-Support-ARCH_BCM270x.patch index 3b847b561..3b32562b4 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0118-firmware-bcm2835-Support-ARCH_BCM270x.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0118-firmware-bcm2835-Support-ARCH_BCM270x.patch @@ -27,7 +27,7 @@ Signed-off-by: Noralf Trønnes --- a/drivers/firmware/raspberrypi.c +++ b/drivers/firmware/raspberrypi.c -@@ -32,6 +32,8 @@ struct rpi_firmware { +@@ -33,6 +33,8 @@ struct rpi_firmware { struct kref consumers; }; @@ -36,7 +36,7 @@ Signed-off-by: Noralf Trønnes static DEFINE_MUTEX(transaction_lock); static void response_callback(struct mbox_client *cl, void *msg) -@@ -280,6 +282,7 @@ static int rpi_firmware_probe(struct pla +@@ -281,6 +283,7 @@ static int rpi_firmware_probe(struct pla kref_init(&fw->consumers); platform_set_drvdata(pdev, fw); @@ -44,7 +44,7 @@ Signed-off-by: Noralf Trønnes rpi_firmware_print_firmware_revision(fw); rpi_register_hwmon_driver(dev, fw); -@@ -308,6 +311,7 @@ static int rpi_firmware_remove(struct pl +@@ -309,6 +312,7 @@ static int rpi_firmware_remove(struct pl rpi_clk = NULL; rpi_firmware_put(fw); @@ -52,7 +52,7 @@ Signed-off-by: Noralf Trønnes return 0; } -@@ -382,7 +386,18 @@ static struct platform_driver rpi_firmwa +@@ -383,7 +387,18 @@ static struct platform_driver rpi_firmwa .shutdown = rpi_firmware_shutdown, .remove = rpi_firmware_remove, }; diff --git a/target/linux/bcm27xx/patches-6.1/950-0119-leds-Add-the-input-trigger-for-pwr_led.patch b/target/linux/bcm27xx/patches-6.1/950-0119-leds-Add-the-input-trigger-for-pwr_led.patch index e5e5a8a1b..4d30fab65 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0119-leds-Add-the-input-trigger-for-pwr_led.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0119-leds-Add-the-input-trigger-for-pwr_led.patch @@ -156,7 +156,7 @@ See: https://github.com/raspberrypi/linux/issues/1064 +MODULE_LICENSE("GPL"); --- a/include/linux/leds.h +++ b/include/linux/leds.h -@@ -85,6 +85,9 @@ struct led_classdev { +@@ -95,6 +95,9 @@ struct led_classdev { #define LED_BRIGHT_HW_CHANGED BIT(21) #define LED_RETAIN_AT_SHUTDOWN BIT(22) #define LED_INIT_DEFAULT_TRIGGER BIT(23) diff --git a/target/linux/bcm27xx/patches-6.1/950-0124-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch b/target/linux/bcm27xx/patches-6.1/950-0124-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch index 3b5bfaa7e..e384710da 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0124-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0124-Add-support-for-all-the-downstream-rpi-sound-card-dr.patch @@ -17578,7 +17578,7 @@ Signed-off-by: Ashish Vara +#endif /* _TAS5713_H */ --- a/sound/soc/soc-core.c +++ b/sound/soc/soc-core.c -@@ -1220,7 +1220,15 @@ int snd_soc_runtime_set_dai_fmt(struct s +@@ -1223,7 +1223,15 @@ int snd_soc_runtime_set_dai_fmt(struct s return 0; for_each_rtd_codec_dais(rtd, i, codec_dai) { diff --git a/target/linux/bcm27xx/patches-6.1/950-0140-firmware-raspberrypi-Notify-firmware-of-a-reboot.patch b/target/linux/bcm27xx/patches-6.1/950-0140-firmware-raspberrypi-Notify-firmware-of-a-reboot.patch index 90408f491..8a9a2da72 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0140-firmware-raspberrypi-Notify-firmware-of-a-reboot.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0140-firmware-raspberrypi-Notify-firmware-of-a-reboot.patch @@ -13,7 +13,7 @@ Signed-off-by: Phil Elwell --- a/drivers/firmware/raspberrypi.c +++ b/drivers/firmware/raspberrypi.c -@@ -12,6 +12,7 @@ +@@ -13,6 +13,7 @@ #include #include #include @@ -21,7 +21,7 @@ Signed-off-by: Phil Elwell #include #include -@@ -179,6 +180,26 @@ int rpi_firmware_property(struct rpi_fir +@@ -180,6 +181,26 @@ int rpi_firmware_property(struct rpi_fir } EXPORT_SYMBOL_GPL(rpi_firmware_property); @@ -48,7 +48,7 @@ Signed-off-by: Phil Elwell static void rpi_firmware_print_firmware_revision(struct rpi_firmware *fw) { -@@ -387,15 +408,32 @@ static struct platform_driver rpi_firmwa +@@ -388,15 +409,32 @@ static struct platform_driver rpi_firmwa .remove = rpi_firmware_remove, }; diff --git a/target/linux/bcm27xx/patches-6.1/950-0145-firmware-raspberrypi-Add-backward-compatible-get_thr.patch b/target/linux/bcm27xx/patches-6.1/950-0145-firmware-raspberrypi-Add-backward-compatible-get_thr.patch index 1f62f7f54..2b5a9fc3f 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0145-firmware-raspberrypi-Add-backward-compatible-get_thr.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0145-firmware-raspberrypi-Add-backward-compatible-get_thr.patch @@ -16,7 +16,7 @@ Signed-off-by: Stefan Wahren --- a/drivers/firmware/raspberrypi.c +++ b/drivers/firmware/raspberrypi.c -@@ -31,6 +31,7 @@ struct rpi_firmware { +@@ -32,6 +32,7 @@ struct rpi_firmware { u32 enabled; struct kref consumers; @@ -24,7 +24,7 @@ Signed-off-by: Stefan Wahren }; static struct platform_device *g_pdev; -@@ -176,6 +177,12 @@ int rpi_firmware_property(struct rpi_fir +@@ -177,6 +178,12 @@ int rpi_firmware_property(struct rpi_fir kfree(data); @@ -37,7 +37,7 @@ Signed-off-by: Stefan Wahren return ret; } EXPORT_SYMBOL_GPL(rpi_firmware_property); -@@ -200,6 +207,27 @@ static int rpi_firmware_notify_reboot(st +@@ -201,6 +208,27 @@ static int rpi_firmware_notify_reboot(st return 0; } @@ -65,7 +65,7 @@ Signed-off-by: Stefan Wahren static void rpi_firmware_print_firmware_revision(struct rpi_firmware *fw) { -@@ -229,6 +257,11 @@ rpi_register_hwmon_driver(struct device +@@ -230,6 +258,11 @@ rpi_register_hwmon_driver(struct device rpi_hwmon = platform_device_register_data(dev, "raspberrypi-hwmon", -1, NULL, 0); diff --git a/target/linux/bcm27xx/patches-6.1/950-0151-firmware-raspberrypi-Report-the-fw-variant-during-pr.patch b/target/linux/bcm27xx/patches-6.1/950-0151-firmware-raspberrypi-Report-the-fw-variant-during-pr.patch index 7a4b26ebd..742ae4216 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0151-firmware-raspberrypi-Report-the-fw-variant-during-pr.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0151-firmware-raspberrypi-Report-the-fw-variant-during-pr.patch @@ -26,7 +26,7 @@ Signed-off-by: Dave Stevenson --- a/drivers/firmware/raspberrypi.c +++ b/drivers/firmware/raspberrypi.c -@@ -233,6 +233,15 @@ rpi_firmware_print_firmware_revision(str +@@ -234,6 +234,15 @@ rpi_firmware_print_firmware_revision(str { time64_t date_and_time; u32 packet; @@ -42,7 +42,7 @@ Signed-off-by: Dave Stevenson int ret = rpi_firmware_property(fw, RPI_FIRMWARE_GET_FIRMWARE_REVISION, &packet, sizeof(packet)); -@@ -242,7 +251,35 @@ rpi_firmware_print_firmware_revision(str +@@ -243,7 +252,35 @@ rpi_firmware_print_firmware_revision(str /* This is not compatible with y2038 */ date_and_time = packet; @@ -79,7 +79,7 @@ Signed-off-by: Dave Stevenson } static void -@@ -339,6 +376,7 @@ static int rpi_firmware_probe(struct pla +@@ -340,6 +377,7 @@ static int rpi_firmware_probe(struct pla g_pdev = pdev; rpi_firmware_print_firmware_revision(fw); diff --git a/target/linux/bcm27xx/patches-6.1/950-0165-staging-mmal-vchiq-Avoid-use-of-bool-in-structures.patch b/target/linux/bcm27xx/patches-6.1/950-0165-staging-mmal-vchiq-Avoid-use-of-bool-in-structures.patch index ec5a217c7..ba8d2beed 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0165-staging-mmal-vchiq-Avoid-use-of-bool-in-structures.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0165-staging-mmal-vchiq-Avoid-use-of-bool-in-structures.patch @@ -13,7 +13,7 @@ Signed-off-by: Dave Stevenson --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c -@@ -1773,7 +1773,7 @@ int vchiq_mmal_component_enable(struct v +@@ -1774,7 +1774,7 @@ int vchiq_mmal_component_enable(struct v ret = enable_component(instance, component); if (ret == 0) diff --git a/target/linux/bcm27xx/patches-6.1/950-0166-staging-mmal-vchiq-Add-support-for-event-callbacks.patch b/target/linux/bcm27xx/patches-6.1/950-0166-staging-mmal-vchiq-Add-support-for-event-callbacks.patch index 743c757dd..01a4d49fa 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0166-staging-mmal-vchiq-Add-support-for-event-callbacks.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0166-staging-mmal-vchiq-Add-support-for-event-callbacks.patch @@ -234,7 +234,7 @@ Signed-off-by: Dave Stevenson /* deals with receipt of buffer to host message */ static void buffer_to_host_cb(struct vchiq_mmal_instance *instance, struct mmal_msg *msg, u32 msg_len) -@@ -1330,6 +1423,7 @@ static int port_disable(struct vchiq_mma +@@ -1331,6 +1424,7 @@ static int port_disable(struct vchiq_mma mmalbuf->mmal_flags = 0; mmalbuf->dts = MMAL_TIME_UNKNOWN; mmalbuf->pts = MMAL_TIME_UNKNOWN; @@ -242,7 +242,7 @@ Signed-off-by: Dave Stevenson port->buffer_cb(instance, port, 0, mmalbuf); } -@@ -1631,6 +1725,43 @@ int mmal_vchi_buffer_cleanup(struct mmal +@@ -1632,6 +1726,43 @@ int mmal_vchi_buffer_cleanup(struct mmal } EXPORT_SYMBOL_GPL(mmal_vchi_buffer_cleanup); @@ -286,7 +286,7 @@ Signed-off-by: Dave Stevenson /* Initialise a mmal component and its ports * */ -@@ -1680,6 +1811,7 @@ int vchiq_mmal_component_init(struct vch +@@ -1681,6 +1812,7 @@ int vchiq_mmal_component_init(struct vch ret = port_info_get(instance, &component->control); if (ret < 0) goto release_component; @@ -294,7 +294,7 @@ Signed-off-by: Dave Stevenson for (idx = 0; idx < component->inputs; idx++) { component->input[idx].type = MMAL_PORT_TYPE_INPUT; -@@ -1690,6 +1822,7 @@ int vchiq_mmal_component_init(struct vch +@@ -1691,6 +1823,7 @@ int vchiq_mmal_component_init(struct vch ret = port_info_get(instance, &component->input[idx]); if (ret < 0) goto release_component; @@ -302,7 +302,7 @@ Signed-off-by: Dave Stevenson } for (idx = 0; idx < component->outputs; idx++) { -@@ -1701,6 +1834,7 @@ int vchiq_mmal_component_init(struct vch +@@ -1702,6 +1835,7 @@ int vchiq_mmal_component_init(struct vch ret = port_info_get(instance, &component->output[idx]); if (ret < 0) goto release_component; @@ -310,7 +310,7 @@ Signed-off-by: Dave Stevenson } for (idx = 0; idx < component->clocks; idx++) { -@@ -1712,6 +1846,7 @@ int vchiq_mmal_component_init(struct vch +@@ -1713,6 +1847,7 @@ int vchiq_mmal_component_init(struct vch ret = port_info_get(instance, &component->clock[idx]); if (ret < 0) goto release_component; @@ -318,7 +318,7 @@ Signed-off-by: Dave Stevenson } *component_out = component; -@@ -1737,7 +1872,7 @@ EXPORT_SYMBOL_GPL(vchiq_mmal_component_i +@@ -1738,7 +1873,7 @@ EXPORT_SYMBOL_GPL(vchiq_mmal_component_i int vchiq_mmal_component_finalise(struct vchiq_mmal_instance *instance, struct vchiq_mmal_component *component) { @@ -327,7 +327,7 @@ Signed-off-by: Dave Stevenson if (mutex_lock_interruptible(&instance->vchiq_mutex)) return -EINTR; -@@ -1749,6 +1884,13 @@ int vchiq_mmal_component_finalise(struct +@@ -1750,6 +1885,13 @@ int vchiq_mmal_component_finalise(struct component->in_use = 0; diff --git a/target/linux/bcm27xx/patches-6.1/950-0172-staging-mmal-vchiq-Free-the-event-context-for-contro.patch b/target/linux/bcm27xx/patches-6.1/950-0172-staging-mmal-vchiq-Free-the-event-context-for-contro.patch index 02b8ed941..862592856 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0172-staging-mmal-vchiq-Free-the-event-context-for-contro.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0172-staging-mmal-vchiq-Free-the-event-context-for-contro.patch @@ -17,7 +17,7 @@ Signed-off-by: Dave Stevenson --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c -@@ -1899,6 +1899,8 @@ int vchiq_mmal_component_finalise(struct +@@ -1900,6 +1900,8 @@ int vchiq_mmal_component_finalise(struct for (idx = 0; idx < component->clocks; idx++) free_event_context(&component->clock[idx]); diff --git a/target/linux/bcm27xx/patches-6.1/950-0173-staging-mmal-vchiq-Fix-memory-leak-in-error-path.patch b/target/linux/bcm27xx/patches-6.1/950-0173-staging-mmal-vchiq-Fix-memory-leak-in-error-path.patch index 6582bcceb..c14f6c080 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0173-staging-mmal-vchiq-Fix-memory-leak-in-error-path.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0173-staging-mmal-vchiq-Fix-memory-leak-in-error-path.patch @@ -14,7 +14,7 @@ Signed-off-by: Dave Stevenson --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c -@@ -1765,9 +1765,26 @@ static void free_event_context(struct vc +@@ -1766,9 +1766,26 @@ static void free_event_context(struct vc { struct mmal_msg_context *ctx = port->event_context; @@ -41,7 +41,7 @@ Signed-off-by: Dave Stevenson } /* Initialise a mmal component and its ports -@@ -1865,6 +1882,7 @@ int vchiq_mmal_component_init(struct vch +@@ -1866,6 +1883,7 @@ int vchiq_mmal_component_init(struct vch release_component: destroy_component(instance, component); @@ -49,7 +49,7 @@ Signed-off-by: Dave Stevenson unlock: if (component) component->in_use = 0; -@@ -1880,7 +1898,7 @@ EXPORT_SYMBOL_GPL(vchiq_mmal_component_i +@@ -1881,7 +1899,7 @@ EXPORT_SYMBOL_GPL(vchiq_mmal_component_i int vchiq_mmal_component_finalise(struct vchiq_mmal_instance *instance, struct vchiq_mmal_component *component) { @@ -58,7 +58,7 @@ Signed-off-by: Dave Stevenson if (mutex_lock_interruptible(&instance->vchiq_mutex)) return -EINTR; -@@ -1892,14 +1910,7 @@ int vchiq_mmal_component_finalise(struct +@@ -1893,14 +1911,7 @@ int vchiq_mmal_component_finalise(struct component->in_use = 0; diff --git a/target/linux/bcm27xx/patches-6.1/950-0179-bcmgenet-Better-coalescing-parameter-defaults.patch b/target/linux/bcm27xx/patches-6.1/950-0179-bcmgenet-Better-coalescing-parameter-defaults.patch index b805f1df3..41c619900 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0179-bcmgenet-Better-coalescing-parameter-defaults.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0179-bcmgenet-Better-coalescing-parameter-defaults.patch @@ -18,7 +18,7 @@ Signed-off-by: Phil Elwell --- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c +++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c -@@ -2659,7 +2659,7 @@ static void bcmgenet_init_tx_ring(struct +@@ -2665,7 +2665,7 @@ static void bcmgenet_init_tx_ring(struct bcmgenet_tdma_ring_writel(priv, index, 0, TDMA_PROD_INDEX); bcmgenet_tdma_ring_writel(priv, index, 0, TDMA_CONS_INDEX); @@ -27,7 +27,7 @@ Signed-off-by: Phil Elwell /* Disable rate control for now */ bcmgenet_tdma_ring_writel(priv, index, flow_period_val, TDMA_FLOW_PERIOD); -@@ -4140,9 +4140,12 @@ static int bcmgenet_probe(struct platfor +@@ -4160,9 +4160,12 @@ static int bcmgenet_probe(struct platfor netif_set_real_num_rx_queues(priv->dev, priv->hw_params->rx_queues + 1); /* Set default coalescing parameters */ diff --git a/target/linux/bcm27xx/patches-6.1/950-0180-net-genet-enable-link-energy-detect-powerdown-for-ex.patch b/target/linux/bcm27xx/patches-6.1/950-0180-net-genet-enable-link-energy-detect-powerdown-for-ex.patch index cc76ba5db..44d8613b5 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0180-net-genet-enable-link-energy-detect-powerdown-for-ex.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0180-net-genet-enable-link-energy-detect-powerdown-for-ex.patch @@ -20,7 +20,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/net/ethernet/broadcom/genet/bcmmii.c +++ b/drivers/net/ethernet/broadcom/genet/bcmmii.c -@@ -296,6 +296,8 @@ int bcmgenet_mii_probe(struct net_device +@@ -309,6 +309,8 @@ int bcmgenet_mii_probe(struct net_device /* Communicate the integrated PHY revision */ if (priv->internal_phy) phy_flags = priv->gphy_rev; diff --git a/target/linux/bcm27xx/patches-6.1/950-0181-usb-add-plumbing-for-updating-interrupt-endpoint-int.patch b/target/linux/bcm27xx/patches-6.1/950-0181-usb-add-plumbing-for-updating-interrupt-endpoint-int.patch index 34b923fb2..3feabeaf9 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0181-usb-add-plumbing-for-updating-interrupt-endpoint-int.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0181-usb-add-plumbing-for-updating-interrupt-endpoint-int.patch @@ -90,10 +90,10 @@ Signed-off-by: Jonathan Bell + */ + void (*fixup_endpoint)(struct usb_hcd *hcd, struct usb_device *udev, + struct usb_host_endpoint *ep, int interval); - /* Returns the hardware-chosen device address */ - int (*address_device)(struct usb_hcd *, struct usb_device *udev); - /* prepares the hardware to send commands to the device */ -@@ -435,6 +440,8 @@ extern void usb_hcd_unmap_urb_setup_for_ + /* Set the hardware-chosen device address */ + int (*address_device)(struct usb_hcd *, struct usb_device *udev, + unsigned int timeout_ms); +@@ -436,6 +441,8 @@ extern void usb_hcd_unmap_urb_setup_for_ extern void usb_hcd_unmap_urb_for_dma(struct usb_hcd *, struct urb *); extern void usb_hcd_flush_endpoint(struct usb_device *udev, struct usb_host_endpoint *ep); diff --git a/target/linux/bcm27xx/patches-6.1/950-0182-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch b/target/linux/bcm27xx/patches-6.1/950-0182-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch index 480995112..a5e08d4cc 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0182-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0182-xhci-implement-xhci_fixup_endpoint-for-interval-adju.patch @@ -15,7 +15,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c -@@ -1641,6 +1641,109 @@ command_cleanup: +@@ -1643,6 +1643,109 @@ command_cleanup: } /* @@ -125,7 +125,7 @@ Signed-off-by: Jonathan Bell * non-error returns are a promise to giveback() the urb later * we drop ownership so next owner (or urb unlink) can get it */ -@@ -5469,6 +5572,7 @@ static const struct hc_driver xhci_hc_dr +@@ -5480,6 +5583,7 @@ static const struct hc_driver xhci_hc_dr .endpoint_reset = xhci_endpoint_reset, .check_bandwidth = xhci_check_bandwidth, .reset_bandwidth = xhci_reset_bandwidth, diff --git a/target/linux/bcm27xx/patches-6.1/950-0189-net-bcmgenet-Workaround-2-for-Pi4-Ethernet-fail.patch b/target/linux/bcm27xx/patches-6.1/950-0189-net-bcmgenet-Workaround-2-for-Pi4-Ethernet-fail.patch index da60efe07..1507baa65 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0189-net-bcmgenet-Workaround-2-for-Pi4-Ethernet-fail.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0189-net-bcmgenet-Workaround-2-for-Pi4-Ethernet-fail.patch @@ -37,7 +37,7 @@ Signed-off-by: Phil Elwell static inline void bcmgenet_writel(u32 value, void __iomem *offset) { -@@ -2490,6 +2493,11 @@ static void reset_umac(struct bcmgenet_p +@@ -2494,6 +2497,11 @@ static void reset_umac(struct bcmgenet_p bcmgenet_rbuf_ctrl_set(priv, 0); udelay(10); @@ -47,5 +47,5 @@ Signed-off-by: Phil Elwell + } + /* issue soft reset and disable MAC while updating its registers */ + spin_lock_bh(&priv->reg_lock); bcmgenet_umac_writel(priv, CMD_SW_RESET, UMAC_CMD); - udelay(2); diff --git a/target/linux/bcm27xx/patches-6.1/950-0190-xhci-Use-more-event-ring-segment-table-entries.patch b/target/linux/bcm27xx/patches-6.1/950-0190-xhci-Use-more-event-ring-segment-table-entries.patch index 93f7ffde9..93a6707f4 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0190-xhci-Use-more-event-ring-segment-table-entries.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0190-xhci-Use-more-event-ring-segment-table-entries.patch @@ -22,7 +22,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c -@@ -2522,9 +2522,11 @@ int xhci_mem_init(struct xhci_hcd *xhci, +@@ -2524,9 +2524,11 @@ int xhci_mem_init(struct xhci_hcd *xhci, * Event ring setup: Allocate a normal ring, but also setup * the event ring segment table (ERST). Section 4.9.3. */ @@ -36,7 +36,7 @@ Signed-off-by: Jonathan Bell if (!xhci->event_ring) goto fail; if (xhci_check_trb_in_td_math(xhci) < 0) -@@ -2537,7 +2539,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, +@@ -2539,7 +2541,7 @@ int xhci_mem_init(struct xhci_hcd *xhci, /* set ERST count with the number of entries in the segment table */ val = readl(&xhci->ir_set->erst_size); val &= ERST_SIZE_MASK; @@ -47,7 +47,7 @@ Signed-off-by: Jonathan Bell val); --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h -@@ -1672,8 +1672,8 @@ struct urb_priv { +@@ -1678,8 +1678,8 @@ struct urb_priv { * Each segment table entry is 4*32bits long. 1K seems like an ok size: * (1K bytes * 8bytes/bit) / (4*32 bits) = 64 segment entries in the table, * meaning 64 ring segments. diff --git a/target/linux/bcm27xx/patches-6.1/950-0216-Initialise-rpi-firmware-before-clk-bcm2835.patch b/target/linux/bcm27xx/patches-6.1/950-0216-Initialise-rpi-firmware-before-clk-bcm2835.patch index 43781f125..d07fdf05d 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0216-Initialise-rpi-firmware-before-clk-bcm2835.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0216-Initialise-rpi-firmware-before-clk-bcm2835.patch @@ -36,7 +36,7 @@ Co-authored-by: Phil Elwell MODULE_DESCRIPTION("BCM2835 clock driver"); --- a/drivers/firmware/raspberrypi.c +++ b/drivers/firmware/raspberrypi.c -@@ -499,7 +499,7 @@ out2: +@@ -500,7 +500,7 @@ out2: out1: return ret; } diff --git a/target/linux/bcm27xx/patches-6.1/950-0227-spi-Force-CS_HIGH-if-GPIO-descriptors-are-used.patch b/target/linux/bcm27xx/patches-6.1/950-0227-spi-Force-CS_HIGH-if-GPIO-descriptors-are-used.patch index ef96ffe86..19573eda1 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0227-spi-Force-CS_HIGH-if-GPIO-descriptors-are-used.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0227-spi-Force-CS_HIGH-if-GPIO-descriptors-are-used.patch @@ -32,7 +32,7 @@ Signed-off-by: Phil Elwell --- a/drivers/spi/spi.c +++ b/drivers/spi/spi.c -@@ -3679,6 +3679,7 @@ static int spi_set_cs_timing(struct spi_ +@@ -3694,6 +3694,7 @@ static int spi_set_cs_timing(struct spi_ */ int spi_setup(struct spi_device *spi) { @@ -40,7 +40,7 @@ Signed-off-by: Phil Elwell unsigned bad_bits, ugly_bits; int status = 0; -@@ -3699,6 +3700,14 @@ int spi_setup(struct spi_device *spi) +@@ -3714,6 +3715,14 @@ int spi_setup(struct spi_device *spi) (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL | SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL))) return -EINVAL; diff --git a/target/linux/bcm27xx/patches-6.1/950-0270-net-bcmgenet-Reset-RBUF-on-first-open.patch b/target/linux/bcm27xx/patches-6.1/950-0270-net-bcmgenet-Reset-RBUF-on-first-open.patch deleted file mode 100644 index e21de6f79..000000000 --- a/target/linux/bcm27xx/patches-6.1/950-0270-net-bcmgenet-Reset-RBUF-on-first-open.patch +++ /dev/null @@ -1,70 +0,0 @@ -From e857a27d5bca6269cea7a0ca0058aa8fffe90a83 Mon Sep 17 00:00:00 2001 -From: Phil Elwell -Date: Fri, 25 Sep 2020 15:07:23 +0100 -Subject: [PATCH] net: bcmgenet: Reset RBUF on first open - -If the RBUF logic is not reset when the kernel starts then there -may be some data left over from any network boot loader. If the -64-byte packet headers are enabled then this can be fatal. - -Extend bcmgenet_dma_disable to do perform the reset, but not when -called from bcmgenet_resume in order to preserve a wake packet. - -N.B. This different handling of resume is just based on a hunch - -why else wouldn't one reset the RBUF as well as the TBUF? If this -isn't the case then it's easy to change the patch to make the RBUF -reset unconditional. - -See: https://github.com/raspberrypi/linux/issues/3850 - -Signed-off-by: Phil Elwell ---- - drivers/net/ethernet/broadcom/genet/bcmgenet.c | 16 ++++++++++++---- - 1 file changed, 12 insertions(+), 4 deletions(-) - ---- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c -+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c -@@ -3306,7 +3306,7 @@ static void bcmgenet_get_hw_addr(struct - } - - /* Returns a reusable dma control register value */ --static u32 bcmgenet_dma_disable(struct bcmgenet_priv *priv) -+static u32 bcmgenet_dma_disable(struct bcmgenet_priv *priv, bool flush_rx) - { - unsigned int i; - u32 reg; -@@ -3331,6 +3331,14 @@ static u32 bcmgenet_dma_disable(struct b - udelay(10); - bcmgenet_umac_writel(priv, 0, UMAC_TX_FLUSH); - -+ if (flush_rx) { -+ reg = bcmgenet_rbuf_ctrl_get(priv); -+ bcmgenet_rbuf_ctrl_set(priv, reg | BIT(0)); -+ udelay(10); -+ bcmgenet_rbuf_ctrl_set(priv, reg); -+ udelay(10); -+ } -+ - return dma_ctrl; - } - -@@ -3394,8 +3402,8 @@ static int bcmgenet_open(struct net_devi - - bcmgenet_set_hw_addr(priv, dev->dev_addr); - -- /* Disable RX/TX DMA and flush TX queues */ -- dma_ctrl = bcmgenet_dma_disable(priv); -+ /* Disable RX/TX DMA and flush TX and RX queues */ -+ dma_ctrl = bcmgenet_dma_disable(priv, true); - - /* Reinitialize TDMA and RDMA and SW housekeeping */ - ret = bcmgenet_init_dma(priv); -@@ -4269,7 +4277,7 @@ static int bcmgenet_resume(struct device - bcmgenet_hfb_create_rxnfc_filter(priv, rule); - - /* Disable RX/TX DMA and flush TX queues */ -- dma_ctrl = bcmgenet_dma_disable(priv); -+ dma_ctrl = bcmgenet_dma_disable(priv, false); - - /* Reinitialize TDMA and RDMA and SW housekeeping */ - ret = bcmgenet_init_dma(priv); diff --git a/target/linux/bcm27xx/patches-6.1/950-0276-staging-mmal-vchiq-Use-vc-sm-cma-to-support-zero-cop.patch b/target/linux/bcm27xx/patches-6.1/950-0276-staging-mmal-vchiq-Use-vc-sm-cma-to-support-zero-cop.patch index bcb322d55..59ce23263 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0276-staging-mmal-vchiq-Use-vc-sm-cma-to-support-zero-cop.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0276-staging-mmal-vchiq-Use-vc-sm-cma-to-support-zero-cop.patch @@ -91,7 +91,7 @@ Signed-off-by: Dave Stevenson } else if (msg->u.buffer_from_host.buffer_header.length == 0) { /* empty buffer */ if (msg->u.buffer_from_host.buffer_header.flags & -@@ -1528,6 +1551,9 @@ int vchiq_mmal_port_parameter_set(struct +@@ -1529,6 +1552,9 @@ int vchiq_mmal_port_parameter_set(struct mutex_unlock(&instance->vchiq_mutex); @@ -101,7 +101,7 @@ Signed-off-by: Dave Stevenson return ret; } EXPORT_SYMBOL_GPL(vchiq_mmal_port_parameter_set); -@@ -1696,6 +1722,31 @@ int vchiq_mmal_submit_buffer(struct vchi +@@ -1697,6 +1723,31 @@ int vchiq_mmal_submit_buffer(struct vchi unsigned long flags = 0; int ret; @@ -133,7 +133,7 @@ Signed-off-by: Dave Stevenson ret = buffer_from_host(instance, port, buffer); if (ret == -EINVAL) { /* Port is disabled. Queue for when it is enabled. */ -@@ -1729,6 +1780,16 @@ int mmal_vchi_buffer_cleanup(struct mmal +@@ -1730,6 +1781,16 @@ int mmal_vchi_buffer_cleanup(struct mmal release_msg_context(msg_context); buf->msg_context = NULL; diff --git a/target/linux/bcm27xx/patches-6.1/950-0281-gpio-Add-gpio-fsm-driver.patch b/target/linux/bcm27xx/patches-6.1/950-0281-gpio-Add-gpio-fsm-driver.patch index 1e0c3a0d0..7f65a3b66 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0281-gpio-Add-gpio-fsm-driver.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0281-gpio-Add-gpio-fsm-driver.patch @@ -63,7 +63,7 @@ Signed-off-by: Phil Elwell --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig -@@ -1243,6 +1243,15 @@ config HTC_EGPIO +@@ -1244,6 +1244,15 @@ config HTC_EGPIO several HTC phones. It provides basic support for input pins, output pins, and IRQs. diff --git a/target/linux/bcm27xx/patches-6.1/950-0285-firmware-raspberrypi-Add-support-for-tryonce-reboot-.patch b/target/linux/bcm27xx/patches-6.1/950-0285-firmware-raspberrypi-Add-support-for-tryonce-reboot-.patch index 42cb682e0..795e6bd90 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0285-firmware-raspberrypi-Add-support-for-tryonce-reboot-.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0285-firmware-raspberrypi-Add-support-for-tryonce-reboot-.patch @@ -19,7 +19,7 @@ mechanism to be implemented for OS upgrades. --- a/drivers/firmware/raspberrypi.c +++ b/drivers/firmware/raspberrypi.c -@@ -193,6 +193,7 @@ static int rpi_firmware_notify_reboot(st +@@ -194,6 +194,7 @@ static int rpi_firmware_notify_reboot(st { struct rpi_firmware *fw; struct platform_device *pdev = g_pdev; @@ -27,7 +27,7 @@ mechanism to be implemented for OS upgrades. if (!pdev) return 0; -@@ -201,8 +202,28 @@ static int rpi_firmware_notify_reboot(st +@@ -202,8 +203,28 @@ static int rpi_firmware_notify_reboot(st if (!fw) return 0; diff --git a/target/linux/bcm27xx/patches-6.1/950-0327-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch b/target/linux/bcm27xx/patches-6.1/950-0327-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch index db15c6580..ed242cbbe 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0327-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0327-usb-xhci-workaround-for-bogus-SET_DEQ_PENDING-endpoi.patch @@ -26,7 +26,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -674,9 +674,9 @@ deq_found: +@@ -675,9 +675,9 @@ deq_found: } if ((ep->ep_state & SET_DEQ_PENDING)) { diff --git a/target/linux/bcm27xx/patches-6.1/950-0332-drm-panel-simple-Add-a-timing-for-the-Raspberry-Pi-7.patch b/target/linux/bcm27xx/patches-6.1/950-0332-drm-panel-simple-Add-a-timing-for-the-Raspberry-Pi-7.patch index d0eecb7ee..fa6aaa3d1 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0332-drm-panel-simple-Add-a-timing-for-the-Raspberry-Pi-7.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0332-drm-panel-simple-Add-a-timing-for-the-Raspberry-Pi-7.patch @@ -15,7 +15,7 @@ Signed-off-by: Dave Stevenson --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c -@@ -3193,6 +3193,31 @@ static const struct panel_desc qishenglo +@@ -3196,6 +3196,31 @@ static const struct panel_desc qishenglo .connector_type = DRM_MODE_CONNECTOR_DPI, }; @@ -47,7 +47,7 @@ Signed-off-by: Dave Stevenson static const struct display_timing rocktech_rk070er9427_timing = { .pixelclock = { 26400000, 33300000, 46800000 }, .hactive = { 800, 800, 800 }, -@@ -4226,6 +4251,9 @@ static const struct of_device_id platfor +@@ -4229,6 +4254,9 @@ static const struct of_device_id platfor .compatible = "qishenglong,gopher2b-lcd", .data = &qishenglong_gopher2b_lcd, }, { diff --git a/target/linux/bcm27xx/patches-6.1/950-0339-staging-mmal-vchiq-Add-module-parameter-to-enable-lo.patch b/target/linux/bcm27xx/patches-6.1/950-0339-staging-mmal-vchiq-Add-module-parameter-to-enable-lo.patch index 31162b3ce..9fef146bf 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0339-staging-mmal-vchiq-Add-module-parameter-to-enable-lo.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0339-staging-mmal-vchiq-Add-module-parameter-to-enable-lo.patch @@ -172,7 +172,7 @@ Signed-off-by: Dave Stevenson vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle); -@@ -1086,9 +1101,9 @@ static int create_component(struct vchiq +@@ -1087,9 +1102,9 @@ static int create_component(struct vchiq component->outputs = rmsg->u.component_create_reply.output_num; component->clocks = rmsg->u.component_create_reply.clock_num; @@ -185,7 +185,7 @@ Signed-off-by: Dave Stevenson release_msg: vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle); -@@ -1257,10 +1272,9 @@ static int port_action_port(struct vchiq +@@ -1258,10 +1273,9 @@ static int port_action_port(struct vchiq ret = -rmsg->u.port_action_reply.status; @@ -199,7 +199,7 @@ Signed-off-by: Dave Stevenson release_msg: vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle); -@@ -1304,11 +1318,11 @@ static int port_action_handle(struct vch +@@ -1305,11 +1319,11 @@ static int port_action_handle(struct vch ret = -rmsg->u.port_action_reply.status; @@ -216,7 +216,7 @@ Signed-off-by: Dave Stevenson release_msg: vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle); -@@ -1347,9 +1361,9 @@ static int port_parameter_set(struct vch +@@ -1348,9 +1362,9 @@ static int port_parameter_set(struct vch ret = -rmsg->u.port_parameter_set_reply.status; @@ -229,7 +229,7 @@ Signed-off-by: Dave Stevenson release_msg: vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle); -@@ -1407,8 +1421,9 @@ static int port_parameter_get(struct vch +@@ -1408,8 +1422,9 @@ static int port_parameter_get(struct vch /* Always report the size of the returned parameter to the caller */ *value_size = rmsg->u.port_parameter_get_reply.size; @@ -241,7 +241,7 @@ Signed-off-by: Dave Stevenson release_msg: vchiq_release_message(instance->vchiq_instance, instance->service_handle, rmsg_handle); -@@ -1665,7 +1680,7 @@ int vchiq_mmal_port_connect_tunnel(struc +@@ -1666,7 +1681,7 @@ int vchiq_mmal_port_connect_tunnel(struc if (!dst) { /* do not make new connection */ ret = 0; @@ -250,7 +250,7 @@ Signed-off-by: Dave Stevenson goto release_unlock; } -@@ -1683,14 +1698,14 @@ int vchiq_mmal_port_connect_tunnel(struc +@@ -1684,14 +1699,14 @@ int vchiq_mmal_port_connect_tunnel(struc /* set new format */ ret = port_info_set(instance, dst); if (ret) { @@ -267,7 +267,7 @@ Signed-off-by: Dave Stevenson goto release_unlock; } -@@ -1699,9 +1714,9 @@ int vchiq_mmal_port_connect_tunnel(struc +@@ -1700,9 +1715,9 @@ int vchiq_mmal_port_connect_tunnel(struc MMAL_MSG_PORT_ACTION_TYPE_CONNECT, dst->component->handle, dst->handle); if (ret < 0) { @@ -280,7 +280,7 @@ Signed-off-by: Dave Stevenson goto release_unlock; } src->connected = dst; -@@ -1726,7 +1741,8 @@ int vchiq_mmal_submit_buffer(struct vchi +@@ -1727,7 +1742,8 @@ int vchiq_mmal_submit_buffer(struct vchi * videobuf2 won't let us have the dmabuf there. */ if (port->zero_copy && buffer->dma_buf && !buffer->vcsm_handle) { @@ -290,7 +290,7 @@ Signed-off-by: Dave Stevenson ret = vc_sm_cma_import_dmabuf(buffer->dma_buf, &buffer->vcsm_handle); if (ret) { -@@ -1742,8 +1758,8 @@ int vchiq_mmal_submit_buffer(struct vchi +@@ -1743,8 +1759,8 @@ int vchiq_mmal_submit_buffer(struct vchi vc_sm_cma_free(buffer->vcsm_handle); return ret; } @@ -301,7 +301,7 @@ Signed-off-by: Dave Stevenson } ret = buffer_from_host(instance, port, buffer); -@@ -1782,8 +1798,8 @@ int mmal_vchi_buffer_cleanup(struct mmal +@@ -1783,8 +1799,8 @@ int mmal_vchi_buffer_cleanup(struct mmal if (buf->vcsm_handle) { int ret; diff --git a/target/linux/bcm27xx/patches-6.1/950-0340-staging-mmal-vchiq-Reset-buffers_with_vpu-on-port_en.patch b/target/linux/bcm27xx/patches-6.1/950-0340-staging-mmal-vchiq-Reset-buffers_with_vpu-on-port_en.patch index 46414dc74..8b7eb58b7 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0340-staging-mmal-vchiq-Reset-buffers_with_vpu-on-port_en.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0340-staging-mmal-vchiq-Reset-buffers_with_vpu-on-port_en.patch @@ -20,7 +20,7 @@ Signed-off-by: Dave Stevenson --- a/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c +++ b/drivers/staging/vc04_services/vchiq-mmal/mmal-vchiq.c -@@ -1500,6 +1500,8 @@ static int port_enable(struct vchiq_mmal +@@ -1501,6 +1501,8 @@ static int port_enable(struct vchiq_mmal port->enabled = 1; diff --git a/target/linux/bcm27xx/patches-6.1/950-0359-xhci-quirks-add-link-TRB-quirk-for-VL805.patch b/target/linux/bcm27xx/patches-6.1/950-0359-xhci-quirks-add-link-TRB-quirk-for-VL805.patch index 073bb8be7..305480492 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0359-xhci-quirks-add-link-TRB-quirk-for-VL805.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0359-xhci-quirks-add-link-TRB-quirk-for-VL805.patch @@ -22,7 +22,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -293,8 +293,10 @@ static void xhci_pci_quirks(struct devic +@@ -300,8 +300,10 @@ static void xhci_pci_quirks(struct devic pdev->device == 0x3432) xhci->quirks |= XHCI_BROKEN_STREAMS; @@ -36,7 +36,7 @@ Signed-off-by: Jonathan Bell pdev->device == PCI_DEVICE_ID_ASMEDIA_1042_XHCI) { --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -664,6 +664,15 @@ static int xhci_move_dequeue_past_td(str +@@ -665,6 +665,15 @@ static int xhci_move_dequeue_past_td(str } while (!cycle_found || !td_last_trb_found); deq_found: @@ -54,7 +54,7 @@ Signed-off-by: Jonathan Bell addr = xhci_trb_virt_to_dma(new_seg, new_deq); --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h -@@ -1902,6 +1902,7 @@ struct xhci_hcd { +@@ -1908,6 +1908,7 @@ struct xhci_hcd { #define XHCI_RESET_TO_DEFAULT BIT_ULL(44) #define XHCI_ZHAOXIN_TRB_FETCH BIT_ULL(45) #define XHCI_ZHAOXIN_HOST BIT_ULL(46) diff --git a/target/linux/bcm27xx/patches-6.1/950-0361-xhci-refactor-out-TRBS_PER_SEGMENT-define-in-runtime.patch b/target/linux/bcm27xx/patches-6.1/950-0361-xhci-refactor-out-TRBS_PER_SEGMENT-define-in-runtime.patch index ab76ad76c..f8e7a13da 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0361-xhci-refactor-out-TRBS_PER_SEGMENT-define-in-runtime.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0361-xhci-refactor-out-TRBS_PER_SEGMENT-define-in-runtime.patch @@ -144,7 +144,7 @@ Signed-off-by: Jonathan Bell if (ret) return -ENOMEM; -@@ -1811,7 +1815,7 @@ int xhci_alloc_erst(struct xhci_hcd *xhc +@@ -1813,7 +1817,7 @@ int xhci_alloc_erst(struct xhci_hcd *xhc for (val = 0; val < evt_ring->num_segs; val++) { entry = &erst->entries[val]; entry->seg_addr = cpu_to_le64(seg->dma); @@ -204,7 +204,7 @@ Signed-off-by: Jonathan Bell xhci_err(xhci, "Tried to move enqueue past ring segment\n"); return; } -@@ -3150,7 +3153,7 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd +@@ -3182,7 +3185,7 @@ irqreturn_t xhci_irq(struct usb_hcd *hcd * that clears the EHB. */ while (xhci_handle_event(xhci) > 0) { @@ -213,7 +213,7 @@ Signed-off-by: Jonathan Bell continue; xhci_update_erst_dequeue(xhci, event_ring_deq); event_ring_deq = xhci->event_ring->dequeue; -@@ -3292,7 +3295,8 @@ static int prepare_ring(struct xhci_hcd +@@ -3324,7 +3327,8 @@ static int prepare_ring(struct xhci_hcd } } @@ -247,7 +247,7 @@ Signed-off-by: Jonathan Bell * when the cycle bit is set to 1. --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h -@@ -1634,6 +1634,7 @@ struct xhci_ring { +@@ -1640,6 +1640,7 @@ struct xhci_ring { unsigned int num_trbs_free; unsigned int num_trbs_free_temp; unsigned int bounce_buf_len; diff --git a/target/linux/bcm27xx/patches-6.1/950-0362-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch b/target/linux/bcm27xx/patches-6.1/950-0362-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch index 041f98a97..d7b4d2d77 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0362-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0362-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch @@ -53,7 +53,7 @@ Signed-off-by: Jonathan Bell cycle_state, type, max_packet, flags); --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -296,6 +296,7 @@ static void xhci_pci_quirks(struct devic +@@ -303,6 +303,7 @@ static void xhci_pci_quirks(struct devic if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) { xhci->quirks |= XHCI_LPM_SUPPORT; xhci->quirks |= XHCI_AVOID_DQ_ON_LINK; @@ -63,7 +63,7 @@ Signed-off-by: Jonathan Bell if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h -@@ -1904,6 +1904,7 @@ struct xhci_hcd { +@@ -1910,6 +1910,7 @@ struct xhci_hcd { #define XHCI_ZHAOXIN_TRB_FETCH BIT_ULL(45) #define XHCI_ZHAOXIN_HOST BIT_ULL(46) #define XHCI_AVOID_DQ_ON_LINK BIT_ULL(47) diff --git a/target/linux/bcm27xx/patches-6.1/950-0383-drm-panel-simple-add-Geekworm-MZP280-Panel.patch b/target/linux/bcm27xx/patches-6.1/950-0383-drm-panel-simple-add-Geekworm-MZP280-Panel.patch index fa850a4fd..904df714d 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0383-drm-panel-simple-add-Geekworm-MZP280-Panel.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0383-drm-panel-simple-add-Geekworm-MZP280-Panel.patch @@ -46,7 +46,7 @@ Acked-by: Maxime Ripard static const struct drm_display_mode giantplus_gpg482739qs5_mode = { .clock = 9000, .hdisplay = 480, -@@ -4110,6 +4136,9 @@ static const struct of_device_id platfor +@@ -4113,6 +4139,9 @@ static const struct of_device_id platfor .compatible = "friendlyarm,hd702e", .data = &friendlyarm_hd702e, }, { diff --git a/target/linux/bcm27xx/patches-6.1/950-0390-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch b/target/linux/bcm27xx/patches-6.1/950-0390-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch index 0dd7b78b3..ecca778d1 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0390-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0390-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch @@ -26,7 +26,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -297,6 +297,7 @@ static void xhci_pci_quirks(struct devic +@@ -304,6 +304,7 @@ static void xhci_pci_quirks(struct devic xhci->quirks |= XHCI_LPM_SUPPORT; xhci->quirks |= XHCI_AVOID_DQ_ON_LINK; xhci->quirks |= XHCI_VLI_TRB_CACHE_BUG; @@ -36,7 +36,7 @@ Signed-off-by: Jonathan Bell if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -3605,14 +3605,15 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3637,14 +3637,15 @@ int xhci_queue_bulk_tx(struct xhci_hcd * unsigned int num_trbs; unsigned int start_cycle, num_sgs = 0; unsigned int enqd_len, block_len, trb_buff_len, full_len; @@ -54,7 +54,7 @@ Signed-off-by: Jonathan Bell full_len = urb->transfer_buffer_length; /* If we have scatter/gather list, we use it. */ if (urb->num_sgs && !(urb->transfer_flags & URB_DMA_MAP_SINGLE)) { -@@ -3649,6 +3650,17 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3681,6 +3682,17 @@ int xhci_queue_bulk_tx(struct xhci_hcd * start_cycle = ring->cycle_state; send_addr = addr; @@ -72,7 +72,7 @@ Signed-off-by: Jonathan Bell /* Queue the TRBs, even if they are zero-length */ for (enqd_len = 0; first_trb || enqd_len < full_len; enqd_len += trb_buff_len) { -@@ -3661,6 +3673,11 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3693,6 +3705,11 @@ int xhci_queue_bulk_tx(struct xhci_hcd * if (enqd_len + trb_buff_len > full_len) trb_buff_len = full_len - enqd_len; @@ -86,7 +86,7 @@ Signed-off-by: Jonathan Bell first_trb = false; --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h -@@ -1905,6 +1905,7 @@ struct xhci_hcd { +@@ -1911,6 +1911,7 @@ struct xhci_hcd { #define XHCI_ZHAOXIN_HOST BIT_ULL(46) #define XHCI_AVOID_DQ_ON_LINK BIT_ULL(47) #define XHCI_VLI_TRB_CACHE_BUG BIT_ULL(48) diff --git a/target/linux/bcm27xx/patches-6.1/950-0392-usb-xhci-rework-XHCI_VLI_SS_BULK_OUT_BUG-quirk.patch b/target/linux/bcm27xx/patches-6.1/950-0392-usb-xhci-rework-XHCI_VLI_SS_BULK_OUT_BUG-quirk.patch index e3f1848ad..471f420e0 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0392-usb-xhci-rework-XHCI_VLI_SS_BULK_OUT_BUG-quirk.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0392-usb-xhci-rework-XHCI_VLI_SS_BULK_OUT_BUG-quirk.patch @@ -13,7 +13,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -3605,7 +3605,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3637,7 +3637,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd * unsigned int num_trbs; unsigned int start_cycle, num_sgs = 0; unsigned int enqd_len, block_len, trb_buff_len, full_len; @@ -22,7 +22,7 @@ Signed-off-by: Jonathan Bell u32 field, length_field, remainder, maxpacket; u64 addr, send_addr; -@@ -3651,14 +3651,9 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3683,14 +3683,9 @@ int xhci_queue_bulk_tx(struct xhci_hcd * send_addr = addr; if (xhci->quirks & XHCI_VLI_SS_BULK_OUT_BUG && @@ -40,7 +40,7 @@ Signed-off-by: Jonathan Bell } /* Queue the TRBs, even if they are zero-length */ -@@ -3673,7 +3668,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3705,7 +3700,7 @@ int xhci_queue_bulk_tx(struct xhci_hcd * if (enqd_len + trb_buff_len > full_len) trb_buff_len = full_len - enqd_len; diff --git a/target/linux/bcm27xx/patches-6.1/950-0418-mmc-block-Don-t-do-single-sector-reads-during-recove.patch b/target/linux/bcm27xx/patches-6.1/950-0418-mmc-block-Don-t-do-single-sector-reads-during-recove.patch index 8fa58f832..44dfc2ba5 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0418-mmc-block-Don-t-do-single-sector-reads-during-recove.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0418-mmc-block-Don-t-do-single-sector-reads-during-recove.patch @@ -23,7 +23,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c -@@ -1970,7 +1970,7 @@ static void mmc_blk_mq_rw_recovery(struc +@@ -1972,7 +1972,7 @@ static void mmc_blk_mq_rw_recovery(struc return; } diff --git a/target/linux/bcm27xx/patches-6.1/950-0438-usb-xhci-account-for-num_trbs_free-when-invalidating.patch b/target/linux/bcm27xx/patches-6.1/950-0438-usb-xhci-account-for-num_trbs_free-when-invalidating.patch index f604759c2..025524ff3 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0438-usb-xhci-account-for-num_trbs_free-when-invalidating.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0438-usb-xhci-account-for-num_trbs_free-when-invalidating.patch @@ -31,9 +31,9 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -1012,11 +1012,13 @@ static int xhci_invalidate_cancelled_tds - td->urb->stream_id, td->urb, - cached_td->urb->stream_id, cached_td->urb); +@@ -1027,11 +1027,13 @@ static int xhci_invalidate_cancelled_tds + + td->cancel_status = TD_CLEARING_CACHE; cached_td = td; + ring->num_trbs_free += td->num_trbs; break; @@ -45,7 +45,7 @@ Signed-off-by: Jonathan Bell } } -@@ -1264,10 +1266,7 @@ static void update_ring_for_set_deq_comp +@@ -1285,10 +1287,7 @@ static void update_ring_for_set_deq_comp unsigned int ep_index) { union xhci_trb *dequeue_temp; @@ -56,7 +56,7 @@ Signed-off-by: Jonathan Bell dequeue_temp = ep_ring->dequeue; /* If we get two back-to-back stalls, and the first stalled transfer -@@ -1282,8 +1281,6 @@ static void update_ring_for_set_deq_comp +@@ -1303,8 +1302,6 @@ static void update_ring_for_set_deq_comp } while (ep_ring->dequeue != dev->eps[ep_index].queued_deq_ptr) { @@ -65,7 +65,7 @@ Signed-off-by: Jonathan Bell ep_ring->dequeue++; if (trb_is_link(ep_ring->dequeue)) { if (ep_ring->dequeue == -@@ -1293,15 +1290,10 @@ static void update_ring_for_set_deq_comp +@@ -1314,15 +1311,10 @@ static void update_ring_for_set_deq_comp ep_ring->dequeue = ep_ring->deq_seg->trbs; } if (ep_ring->dequeue == dequeue_temp) { diff --git a/target/linux/bcm27xx/patches-6.1/950-0450-firmware-raspberrypi-Introduce-rpi_firmware_find_nod.patch b/target/linux/bcm27xx/patches-6.1/950-0450-firmware-raspberrypi-Introduce-rpi_firmware_find_nod.patch index 9feea59a3..742b9d285 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0450-firmware-raspberrypi-Introduce-rpi_firmware_find_nod.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0450-firmware-raspberrypi-Introduce-rpi_firmware_find_nod.patch @@ -19,7 +19,7 @@ Signed-off-by: Maxime Ripard --- a/drivers/firmware/raspberrypi.c +++ b/drivers/firmware/raspberrypi.c -@@ -429,6 +429,18 @@ static int rpi_firmware_remove(struct pl +@@ -430,6 +430,18 @@ static int rpi_firmware_remove(struct pl return 0; } @@ -38,7 +38,7 @@ Signed-off-by: Maxime Ripard /** * rpi_firmware_get - Get pointer to rpi_firmware structure. * @firmware_node: Pointer to the firmware Device Tree node. -@@ -484,12 +496,6 @@ struct rpi_firmware *devm_rpi_firmware_g +@@ -485,12 +497,6 @@ struct rpi_firmware *devm_rpi_firmware_g } EXPORT_SYMBOL_GPL(devm_rpi_firmware_get); diff --git a/target/linux/bcm27xx/patches-6.1/950-0452-firmware-raspberrypi-Provide-a-helper-to-query-a-clo.patch b/target/linux/bcm27xx/patches-6.1/950-0452-firmware-raspberrypi-Provide-a-helper-to-query-a-clo.patch index da30d5781..d5ac2e941 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0452-firmware-raspberrypi-Provide-a-helper-to-query-a-clo.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0452-firmware-raspberrypi-Provide-a-helper-to-query-a-clo.patch @@ -19,7 +19,7 @@ Signed-off-by: Maxime Ripard --- a/drivers/firmware/raspberrypi.c +++ b/drivers/firmware/raspberrypi.c -@@ -342,6 +342,26 @@ static void rpi_register_clk_driver(stru +@@ -343,6 +343,26 @@ static void rpi_register_clk_driver(stru -1, NULL, 0); } diff --git a/target/linux/bcm27xx/patches-6.1/950-0453-drm-vc4-hdmi-Fix-hdmi_enable_4kp60-detection.patch b/target/linux/bcm27xx/patches-6.1/950-0453-drm-vc4-hdmi-Fix-hdmi_enable_4kp60-detection.patch index 2dac12b8a..be8676e2f 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0453-drm-vc4-hdmi-Fix-hdmi_enable_4kp60-detection.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0453-drm-vc4-hdmi-Fix-hdmi_enable_4kp60-detection.patch @@ -36,7 +36,7 @@ Signed-off-by: Maxime Ripard #include #include #include -@@ -3695,7 +3696,7 @@ static int vc4_hdmi_bind(struct device * +@@ -3697,7 +3698,7 @@ static int vc4_hdmi_bind(struct device * if (variant->max_pixel_clock == 600000000) { struct vc4_dev *vc4 = to_vc4_dev(drm); diff --git a/target/linux/bcm27xx/patches-6.1/950-0454-drm-vc4-hdmi-Rework-hdmi_enable_4kp60-detection-code.patch b/target/linux/bcm27xx/patches-6.1/950-0454-drm-vc4-hdmi-Rework-hdmi_enable_4kp60-detection-code.patch index 4b77fe351..d8522d4ff 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0454-drm-vc4-hdmi-Rework-hdmi_enable_4kp60-detection-code.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0454-drm-vc4-hdmi-Rework-hdmi_enable_4kp60-detection-code.patch @@ -91,7 +91,7 @@ Signed-off-by: Maxime Ripard return MODE_CLOCK_HIGH; if (info->max_tmds_clock && clock > (info->max_tmds_clock * 1000)) -@@ -3694,14 +3695,6 @@ static int vc4_hdmi_bind(struct device * +@@ -3696,14 +3697,6 @@ static int vc4_hdmi_bind(struct device * vc4_hdmi->disable_wifi_frequencies = of_property_read_bool(dev->of_node, "wifi-2.4ghz-coexistence"); diff --git a/target/linux/bcm27xx/patches-6.1/950-0469-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch b/target/linux/bcm27xx/patches-6.1/950-0469-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch index ade55cf33..2d987bc7e 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0469-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0469-usb-xhci-add-XHCI_VLI_HUB_TT_QUIRK.patch @@ -30,7 +30,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -298,6 +298,7 @@ static void xhci_pci_quirks(struct devic +@@ -305,6 +305,7 @@ static void xhci_pci_quirks(struct devic xhci->quirks |= XHCI_AVOID_DQ_ON_LINK; xhci->quirks |= XHCI_VLI_TRB_CACHE_BUG; xhci->quirks |= XHCI_VLI_SS_BULK_OUT_BUG; @@ -40,7 +40,7 @@ Signed-off-by: Jonathan Bell if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA && --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -3582,6 +3582,48 @@ static int xhci_align_td(struct xhci_hcd +@@ -3614,6 +3614,48 @@ static int xhci_align_td(struct xhci_hcd return 1; } @@ -89,7 +89,7 @@ Signed-off-by: Jonathan Bell /* This is very similar to what ehci-q.c qtd_fill() does */ int xhci_queue_bulk_tx(struct xhci_hcd *xhci, gfp_t mem_flags, struct urb *urb, int slot_id, unsigned int ep_index) -@@ -3750,6 +3792,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd * +@@ -3782,6 +3824,8 @@ int xhci_queue_bulk_tx(struct xhci_hcd * } check_trb_math(urb, enqd_len); @@ -98,7 +98,7 @@ Signed-off-by: Jonathan Bell giveback_first_trb(xhci, slot_id, ep_index, urb->stream_id, start_cycle, start_trb); return 0; -@@ -3885,6 +3929,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd * +@@ -3917,6 +3961,8 @@ int xhci_queue_ctrl_tx(struct xhci_hcd * /* Event on completion */ field | TRB_IOC | TRB_TYPE(TRB_STATUS) | ep_ring->cycle_state); @@ -109,7 +109,7 @@ Signed-off-by: Jonathan Bell return 0; --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h -@@ -1906,6 +1906,7 @@ struct xhci_hcd { +@@ -1912,6 +1912,7 @@ struct xhci_hcd { #define XHCI_AVOID_DQ_ON_LINK BIT_ULL(47) #define XHCI_VLI_TRB_CACHE_BUG BIT_ULL(48) #define XHCI_VLI_SS_BULK_OUT_BUG BIT_ULL(49) diff --git a/target/linux/bcm27xx/patches-6.1/950-0513-net-bcmgenet-Add-eee-module-parameter.patch b/target/linux/bcm27xx/patches-6.1/950-0513-net-bcmgenet-Add-eee-module-parameter.patch index cd9820fc9..1d035c105 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0513-net-bcmgenet-Add-eee-module-parameter.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0513-net-bcmgenet-Add-eee-module-parameter.patch @@ -26,7 +26,7 @@ Signed-off-by: Phil Elwell static inline void bcmgenet_writel(u32 value, void __iomem *offset) { -@@ -3440,6 +3443,17 @@ static int bcmgenet_open(struct net_devi +@@ -3448,6 +3451,17 @@ static int bcmgenet_open(struct net_devi bcmgenet_phy_pause_set(dev, priv->rx_pause, priv->tx_pause); diff --git a/target/linux/bcm27xx/patches-6.1/950-0520-xhci-constrain-XHCI_VLI_HUB_TT_QUIRK-to-old-firmware.patch b/target/linux/bcm27xx/patches-6.1/950-0520-xhci-constrain-XHCI_VLI_HUB_TT_QUIRK-to-old-firmware.patch index b35584c78..4f6a811c9 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0520-xhci-constrain-XHCI_VLI_HUB_TT_QUIRK-to-old-firmware.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0520-xhci-constrain-XHCI_VLI_HUB_TT_QUIRK-to-old-firmware.patch @@ -24,7 +24,7 @@ Signed-off-by: Jonathan Bell /* Device for a quirk */ #define PCI_VENDOR_ID_FRESCO_LOGIC 0x1b73 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK 0x1000 -@@ -104,6 +106,16 @@ static int xhci_pci_reinit(struct xhci_h +@@ -105,6 +107,16 @@ static int xhci_pci_reinit(struct xhci_h return 0; } @@ -41,7 +41,7 @@ Signed-off-by: Jonathan Bell static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci) { struct pci_dev *pdev = to_pci_dev(dev); -@@ -298,7 +310,8 @@ static void xhci_pci_quirks(struct devic +@@ -305,7 +317,8 @@ static void xhci_pci_quirks(struct devic xhci->quirks |= XHCI_AVOID_DQ_ON_LINK; xhci->quirks |= XHCI_VLI_TRB_CACHE_BUG; xhci->quirks |= XHCI_VLI_SS_BULK_OUT_BUG; diff --git a/target/linux/bcm27xx/patches-6.1/950-0521-drm-panel-simple-Add-Innolux-AT056tN53V1-5.6-VGA.patch b/target/linux/bcm27xx/patches-6.1/950-0521-drm-panel-simple-Add-Innolux-AT056tN53V1-5.6-VGA.patch index 93da3ce94..9abd05b5e 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0521-drm-panel-simple-Add-Innolux-AT056tN53V1-5.6-VGA.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0521-drm-panel-simple-Add-Innolux-AT056tN53V1-5.6-VGA.patch @@ -165,7 +165,7 @@ Signed-off-by: Phil Elwell static const struct drm_display_mode innolux_at070tn92_mode = { .clock = 33333, .hdisplay = 800, -@@ -4146,6 +4178,9 @@ static const struct of_device_id platfor +@@ -4149,6 +4181,9 @@ static const struct of_device_id platfor .compatible = "innolux,at043tn24", .data = &innolux_at043tn24, }, { diff --git a/target/linux/bcm27xx/patches-6.1/950-0671-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch b/target/linux/bcm27xx/patches-6.1/950-0671-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch index 0146bbd61..b852bad90 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0671-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0671-usb-xhci-drop-and-add-the-endpoint-context-in-xhci_f.patch @@ -19,7 +19,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c -@@ -1730,7 +1730,7 @@ static void xhci_fixup_endpoint(struct u +@@ -1732,7 +1732,7 @@ static void xhci_fixup_endpoint(struct u return; } ctrl_ctx->add_flags = xhci_get_endpoint_flag_from_index(ep_index); diff --git a/target/linux/bcm27xx/patches-6.1/950-0698-serial-8250-Add-NOMSI-bug-for-bcm2835aux.patch b/target/linux/bcm27xx/patches-6.1/950-0698-serial-8250-Add-NOMSI-bug-for-bcm2835aux.patch index 6f62736b0..728e433fb 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0698-serial-8250-Add-NOMSI-bug-for-bcm2835aux.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0698-serial-8250-Add-NOMSI-bug-for-bcm2835aux.patch @@ -71,7 +71,7 @@ Signed-off-by: Phil Elwell * hardware interrupt, we use a timer-based system. The original --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c -@@ -1559,6 +1559,9 @@ static void serial8250_stop_tx(struct ua +@@ -1553,6 +1553,9 @@ static void serial8250_stop_tx(struct ua serial_icr_write(up, UART_ACR, up->acr); } serial8250_rpm_put(up); @@ -81,7 +81,7 @@ Signed-off-by: Phil Elwell } static inline void __start_tx(struct uart_port *port) -@@ -1669,6 +1672,9 @@ static void serial8250_start_tx(struct u +@@ -1663,6 +1666,9 @@ static void serial8250_start_tx(struct u struct uart_8250_port *up = up_to_u8250p(port); struct uart_8250_em485 *em485 = up->em485; @@ -91,7 +91,7 @@ Signed-off-by: Phil Elwell if (!port->x_char && uart_circ_empty(&port->state->xmit)) return; -@@ -1889,6 +1895,9 @@ unsigned int serial8250_modem_status(str +@@ -1883,6 +1889,9 @@ unsigned int serial8250_modem_status(str uart_handle_cts_change(port, status & UART_MSR_CTS); wake_up_interruptible(&port->state->port.delta_msr_wait); diff --git a/target/linux/bcm27xx/patches-6.1/950-0712-drm-vc4-Use-phys-addresses-for-slave-DMA-config.patch b/target/linux/bcm27xx/patches-6.1/950-0712-drm-vc4-Use-phys-addresses-for-slave-DMA-config.patch index 2c83a8083..04967b529 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0712-drm-vc4-Use-phys-addresses-for-slave-DMA-config.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0712-drm-vc4-Use-phys-addresses-for-slave-DMA-config.patch @@ -8,8 +8,8 @@ Slave addresses for DMA are meant to be supplied as physical addresses Signed-off-by: Phil Elwell --- - drivers/gpu/drm/vc4/vc4_hdmi.c | 13 ++++--------- - 1 file changed, 4 insertions(+), 9 deletions(-) + drivers/gpu/drm/vc4/vc4_hdmi.c | 15 ++++----------- + 1 file changed, 4 insertions(+), 11 deletions(-) --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c @@ -22,7 +22,7 @@ Signed-off-by: Phil Elwell int index, len; int ret; -@@ -2755,20 +2755,15 @@ static int vc4_hdmi_audio_init(struct vc +@@ -2755,22 +2755,15 @@ static int vc4_hdmi_audio_init(struct vc } /* @@ -40,6 +40,8 @@ Signed-off-by: Phil Elwell + iomem = platform_get_resource(vc4_hdmi->pdev, IORESOURCE_MEM, index); - addr = of_get_address(dev->of_node, index, NULL, NULL); +- if (!addr) +- return -EINVAL; - - vc4_hdmi->audio.dma_data.addr = be32_to_cpup(addr) + mai_data->offset; + vc4_hdmi->audio.dma_data.addr = iomem->start + mai_data->offset; diff --git a/target/linux/bcm27xx/patches-6.1/950-0791-serial-sc16is7xx-Read-modem-line-state-at-startup.patch b/target/linux/bcm27xx/patches-6.1/950-0791-serial-sc16is7xx-Read-modem-line-state-at-startup.patch index 291302306..ef2847fcd 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0791-serial-sc16is7xx-Read-modem-line-state-at-startup.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0791-serial-sc16is7xx-Read-modem-line-state-at-startup.patch @@ -16,7 +16,7 @@ Signed-off-by: Phil Elwell --- a/drivers/tty/serial/sc16is7xx.c +++ b/drivers/tty/serial/sc16is7xx.c -@@ -1193,6 +1193,9 @@ static int sc16is7xx_startup(struct uart +@@ -1206,6 +1206,9 @@ static int sc16is7xx_startup(struct uart SC16IS7XX_IER_MSI_BIT; sc16is7xx_port_write(port, SC16IS7XX_IER_REG, val); diff --git a/target/linux/bcm27xx/patches-6.1/950-0804-fixup-Allow-mac-address-to-be-set-in-smsc95xx.patch b/target/linux/bcm27xx/patches-6.1/950-0804-fixup-Allow-mac-address-to-be-set-in-smsc95xx.patch index 9265e931f..7dc9ee9af 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0804-fixup-Allow-mac-address-to-be-set-in-smsc95xx.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0804-fixup-Allow-mac-address-to-be-set-in-smsc95xx.patch @@ -43,7 +43,7 @@ Signed-off-by: Lukas Wunner --- a/drivers/net/usb/smsc95xx.c +++ b/drivers/net/usb/smsc95xx.c -@@ -814,49 +814,18 @@ static int smsc95xx_ioctl(struct net_dev +@@ -810,49 +810,18 @@ static int smsc95xx_ioctl(struct net_dev } /* Check the macaddr module parameter for a MAC address */ @@ -103,7 +103,7 @@ Signed-off-by: Lukas Wunner } static void smsc95xx_init_mac_address(struct usbnet *dev) -@@ -883,8 +852,12 @@ static void smsc95xx_init_mac_address(st +@@ -879,8 +848,12 @@ static void smsc95xx_init_mac_address(st } /* Check module parameters */ diff --git a/target/linux/bcm27xx/patches-6.1/950-0842-f2fs-fix-to-avoid-NULL-pointer-dereference-in-f2fs_i.patch b/target/linux/bcm27xx/patches-6.1/950-0842-f2fs-fix-to-avoid-NULL-pointer-dereference-in-f2fs_i.patch index 33150551b..1e2119c88 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0842-f2fs-fix-to-avoid-NULL-pointer-dereference-in-f2fs_i.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0842-f2fs-fix-to-avoid-NULL-pointer-dereference-in-f2fs_i.patch @@ -35,7 +35,7 @@ Signed-off-by: Jaegeuk Kim --- a/fs/f2fs/segment.c +++ b/fs/f2fs/segment.c -@@ -663,9 +663,7 @@ init_thread: +@@ -665,9 +665,7 @@ init_thread: "f2fs_flush-%u:%u", MAJOR(dev), MINOR(dev)); if (IS_ERR(fcc->f2fs_issue_flush)) { err = PTR_ERR(fcc->f2fs_issue_flush); @@ -46,7 +46,7 @@ Signed-off-by: Jaegeuk Kim } return err; -@@ -5062,11 +5060,9 @@ int f2fs_build_segment_manager(struct f2 +@@ -5064,11 +5062,9 @@ int f2fs_build_segment_manager(struct f2 init_f2fs_rwsem(&sm_info->curseg_lock); diff --git a/target/linux/bcm27xx/patches-6.1/950-0860-sdhci-Add-SD-Express-hook.patch b/target/linux/bcm27xx/patches-6.1/950-0860-sdhci-Add-SD-Express-hook.patch index 1aea0b3bc..c7d53f977 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0860-sdhci-Add-SD-Express-hook.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0860-sdhci-Add-SD-Express-hook.patch @@ -50,7 +50,7 @@ sdhci: remove PYA0_INTR_BUG quirk. Add quirks to disable some of the higher SDR }; /*****************************************************************************\ -@@ -4605,6 +4615,15 @@ int sdhci_setup_host(struct sdhci_host * +@@ -4611,6 +4621,15 @@ int sdhci_setup_host(struct sdhci_host * !(host->quirks2 & SDHCI_QUIRK2_BROKEN_DDR50)) mmc->caps |= MMC_CAP_UHS_DDR50; @@ -68,7 +68,7 @@ sdhci: remove PYA0_INTR_BUG quirk. Add quirks to disable some of the higher SDR host->flags |= SDHCI_SDR50_NEEDS_TUNING; --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h -@@ -481,6 +481,11 @@ struct sdhci_host { +@@ -482,6 +482,11 @@ struct sdhci_host { /* Issue CMD and DATA reset together */ #define SDHCI_QUIRK2_ISSUE_CMD_DAT_RESET_TOGETHER (1<<19) @@ -80,7 +80,7 @@ sdhci: remove PYA0_INTR_BUG quirk. Add quirks to disable some of the higher SDR int irq; /* Device IRQ */ void __iomem *ioaddr; /* Mapped address */ phys_addr_t mapbase; /* physical address base */ -@@ -663,6 +668,7 @@ struct sdhci_ops { +@@ -664,6 +669,7 @@ struct sdhci_ops { void (*request_done)(struct sdhci_host *host, struct mmc_request *mrq); void (*dump_vendor_regs)(struct sdhci_host *host); diff --git a/target/linux/bcm27xx/patches-6.1/950-0865-usb-dwc3-Set-DMA-and-coherent-masks-early.patch b/target/linux/bcm27xx/patches-6.1/950-0865-usb-dwc3-Set-DMA-and-coherent-masks-early.patch index e67cb6688..cf92da67a 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0865-usb-dwc3-Set-DMA-and-coherent-masks-early.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0865-usb-dwc3-Set-DMA-and-coherent-masks-early.patch @@ -212,7 +212,7 @@ Signed-off-by: Jonathan Bell }, --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c -@@ -1179,6 +1179,24 @@ static void dwc3_config_threshold(struct +@@ -1180,6 +1180,24 @@ static void dwc3_config_threshold(struct } } @@ -237,7 +237,7 @@ Signed-off-by: Jonathan Bell /** * dwc3_core_init - Low-level initialization of DWC3 Core * @dwc: Pointer to our controller context structure -@@ -1271,6 +1289,8 @@ static int dwc3_core_init(struct dwc3 *d +@@ -1257,6 +1275,8 @@ static int dwc3_core_init(struct dwc3 *d dwc3_set_incr_burst_type(dwc); @@ -246,7 +246,7 @@ Signed-off-by: Jonathan Bell usb_phy_set_suspend(dwc->usb2_phy, 0); usb_phy_set_suspend(dwc->usb3_phy, 0); ret = phy_power_on(dwc->usb2_generic_phy); -@@ -1504,6 +1524,7 @@ static void dwc3_get_properties(struct d +@@ -1490,6 +1510,7 @@ static void dwc3_get_properties(struct d u8 tx_thr_num_pkt_prd = 0; u8 tx_max_burst_prd = 0; u8 tx_fifo_resize_max_num; @@ -254,7 +254,7 @@ Signed-off-by: Jonathan Bell const char *usb_psy_name; int ret; -@@ -1526,6 +1547,9 @@ static void dwc3_get_properties(struct d +@@ -1512,6 +1533,9 @@ static void dwc3_get_properties(struct d */ tx_fifo_resize_max_num = 6; @@ -264,7 +264,7 @@ Signed-off-by: Jonathan Bell dwc->maximum_speed = usb_get_maximum_speed(dev); dwc->max_ssp_rate = usb_get_maximum_ssp_rate(dev); dwc->dr_mode = usb_get_dr_mode(dev); -@@ -1641,6 +1665,9 @@ static void dwc3_get_properties(struct d +@@ -1627,6 +1651,9 @@ static void dwc3_get_properties(struct d dwc->dis_split_quirk = device_property_read_bool(dev, "snps,dis-split-quirk"); @@ -274,7 +274,7 @@ Signed-off-by: Jonathan Bell dwc->lpm_nyet_threshold = lpm_nyet_threshold; dwc->tx_de_emphasis = tx_de_emphasis; -@@ -1658,6 +1685,8 @@ static void dwc3_get_properties(struct d +@@ -1644,6 +1671,8 @@ static void dwc3_get_properties(struct d dwc->tx_thr_num_pkt_prd = tx_thr_num_pkt_prd; dwc->tx_max_burst_prd = tx_max_burst_prd; @@ -283,7 +283,7 @@ Signed-off-by: Jonathan Bell dwc->imod_interval = 0; dwc->tx_fifo_resize_max_num = tx_fifo_resize_max_num; -@@ -1866,6 +1895,12 @@ static int dwc3_probe(struct platform_de +@@ -1852,6 +1881,12 @@ static int dwc3_probe(struct platform_de dwc3_get_properties(dwc); @@ -326,7 +326,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/dwc3/host.c +++ b/drivers/usb/dwc3/host.c -@@ -30,10 +30,10 @@ static void dwc3_host_fill_xhci_irq_res( +@@ -51,10 +51,10 @@ static void dwc3_host_fill_xhci_irq_res( static int dwc3_host_get_irq(struct dwc3 *dwc) { @@ -339,7 +339,7 @@ Signed-off-by: Jonathan Bell if (irq > 0) { dwc3_host_fill_xhci_irq_res(dwc, irq, "host"); goto out; -@@ -42,7 +42,7 @@ static int dwc3_host_get_irq(struct dwc3 +@@ -63,7 +63,7 @@ static int dwc3_host_get_irq(struct dwc3 if (irq == -EPROBE_DEFER) goto out; @@ -348,7 +348,7 @@ Signed-off-by: Jonathan Bell if (irq > 0) { dwc3_host_fill_xhci_irq_res(dwc, irq, "dwc_usb3"); goto out; -@@ -51,7 +51,7 @@ static int dwc3_host_get_irq(struct dwc3 +@@ -72,7 +72,7 @@ static int dwc3_host_get_irq(struct dwc3 if (irq == -EPROBE_DEFER) goto out; @@ -357,7 +357,7 @@ Signed-off-by: Jonathan Bell if (irq > 0) { dwc3_host_fill_xhci_irq_res(dwc, irq, NULL); goto out; -@@ -66,16 +66,23 @@ out: +@@ -87,16 +87,23 @@ out: int dwc3_host_init(struct dwc3 *dwc) { diff --git a/target/linux/bcm27xx/patches-6.1/950-0938-drm-vc4-Introduce-generation-number-enum.patch b/target/linux/bcm27xx/patches-6.1/950-0938-drm-vc4-Introduce-generation-number-enum.patch index 9314c797a..d904c3d78 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0938-drm-vc4-Introduce-generation-number-enum.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0938-drm-vc4-Introduce-generation-number-enum.patch @@ -902,7 +902,7 @@ Signed-off-by: Maxime Ripard /* Control word */ vc4_dlist_write(vc4_state, SCALER_CTL0_VALID | -@@ -1717,7 +1717,7 @@ struct drm_plane *vc4_plane_init(struct +@@ -1714,7 +1714,7 @@ struct drm_plane *vc4_plane_init(struct }; for (i = 0; i < ARRAY_SIZE(hvs_formats); i++) { @@ -911,7 +911,7 @@ Signed-off-by: Maxime Ripard formats[num_formats] = hvs_formats[i].drm; num_formats++; } -@@ -1732,7 +1732,7 @@ struct drm_plane *vc4_plane_init(struct +@@ -1729,7 +1729,7 @@ struct drm_plane *vc4_plane_init(struct return ERR_CAST(vc4_plane); plane = &vc4_plane->base; diff --git a/target/linux/bcm27xx/patches-6.1/950-0963-drm-vc4-hvs-Support-BCM2712-HVS.patch b/target/linux/bcm27xx/patches-6.1/950-0963-drm-vc4-hvs-Support-BCM2712-HVS.patch index 965943229..5cbc30461 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0963-drm-vc4-hvs-Support-BCM2712-HVS.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0963-drm-vc4-hvs-Support-BCM2712-HVS.patch @@ -1924,7 +1924,7 @@ Signed-off-by: Maxime Ripard return 0; } -@@ -1716,7 +2345,7 @@ struct drm_plane *vc4_plane_init(struct +@@ -1713,7 +2342,7 @@ struct drm_plane *vc4_plane_init(struct }; for (i = 0; i < ARRAY_SIZE(hvs_formats); i++) { @@ -1933,7 +1933,7 @@ Signed-off-by: Maxime Ripard formats[num_formats] = hvs_formats[i].drm; num_formats++; } -@@ -1731,7 +2360,7 @@ struct drm_plane *vc4_plane_init(struct +@@ -1728,7 +2357,7 @@ struct drm_plane *vc4_plane_init(struct return ERR_CAST(vc4_plane); plane = &vc4_plane->base; diff --git a/target/linux/bcm27xx/patches-6.1/950-0989-drm-panel-simple-Alter-the-timing-for-the-Pi-7-DSI-d.patch b/target/linux/bcm27xx/patches-6.1/950-0989-drm-panel-simple-Alter-the-timing-for-the-Pi-7-DSI-d.patch index ef70de7ee..42f426668 100644 --- a/target/linux/bcm27xx/patches-6.1/950-0989-drm-panel-simple-Alter-the-timing-for-the-Pi-7-DSI-d.patch +++ b/target/linux/bcm27xx/patches-6.1/950-0989-drm-panel-simple-Alter-the-timing-for-the-Pi-7-DSI-d.patch @@ -15,7 +15,7 @@ Signed-off-by: Dave Stevenson --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c -@@ -3241,11 +3241,11 @@ static const struct panel_desc qishenglo +@@ -3244,11 +3244,11 @@ static const struct panel_desc qishenglo }; static const struct drm_display_mode raspberrypi_7inch_mode = { diff --git a/target/linux/bcm27xx/patches-6.1/950-1075-drivers-mmc-sdhci-add-SPURIOUS_INT_RESP-quirk.patch b/target/linux/bcm27xx/patches-6.1/950-1075-drivers-mmc-sdhci-add-SPURIOUS_INT_RESP-quirk.patch index 2ab224df0..5b3b66c1f 100644 --- a/target/linux/bcm27xx/patches-6.1/950-1075-drivers-mmc-sdhci-add-SPURIOUS_INT_RESP-quirk.patch +++ b/target/linux/bcm27xx/patches-6.1/950-1075-drivers-mmc-sdhci-add-SPURIOUS_INT_RESP-quirk.patch @@ -50,7 +50,7 @@ Signed-off-by: Jonathan Bell if (!mmc_op_tuning(host->cmd->opcode)) --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h -@@ -486,6 +486,9 @@ struct sdhci_host { +@@ -487,6 +487,9 @@ struct sdhci_host { #define SDHCI_QUIRK2_NO_SDR50 (1<<20) #define SDHCI_QUIRK2_NO_SDR104 (1<<21) diff --git a/target/linux/bcm27xx/patches-6.1/950-1182-drm-panel-add-panel-dsi.patch b/target/linux/bcm27xx/patches-6.1/950-1182-drm-panel-add-panel-dsi.patch index 9122d7347..a46d6d3f1 100644 --- a/target/linux/bcm27xx/patches-6.1/950-1182-drm-panel-add-panel-dsi.patch +++ b/target/linux/bcm27xx/patches-6.1/950-1182-drm-panel-add-panel-dsi.patch @@ -23,7 +23,7 @@ Signed-off-by: Timon Skerutsch /** * struct panel_desc - Describes a simple panel. -@@ -4662,6 +4663,9 @@ static const struct panel_desc_dsi osd10 +@@ -4665,6 +4666,9 @@ static const struct panel_desc_dsi osd10 .lanes = 4, }; @@ -33,7 +33,7 @@ Signed-off-by: Timon Skerutsch static const struct of_device_id dsi_of_match[] = { { .compatible = "auo,b080uan01", -@@ -4685,14 +4689,118 @@ static const struct of_device_id dsi_of_ +@@ -4688,14 +4692,118 @@ static const struct of_device_id dsi_of_ .compatible = "osddisplays,osd101t2045-53ts", .data = &osd101t2045_53ts }, { @@ -152,7 +152,7 @@ Signed-off-by: Timon Skerutsch const struct of_device_id *id; int err; -@@ -4700,7 +4808,20 @@ static int panel_simple_dsi_probe(struct +@@ -4703,7 +4811,20 @@ static int panel_simple_dsi_probe(struct if (!id) return -ENODEV; diff --git a/target/linux/bcm27xx/patches-6.1/950-1235-drm-vc4-don-t-check-if-plane-state-fb-state-fb.patch b/target/linux/bcm27xx/patches-6.1/950-1235-drm-vc4-don-t-check-if-plane-state-fb-state-fb.patch deleted file mode 100644 index 7c7c05c5e..000000000 --- a/target/linux/bcm27xx/patches-6.1/950-1235-drm-vc4-don-t-check-if-plane-state-fb-state-fb.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 146bbf9627f6c37816939de29538ec8ee9a7be1a Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Ma=C3=ADra=20Canal?= -Date: Fri, 5 Jan 2024 15:07:34 -0300 -Subject: [PATCH] drm/vc4: don't check if plane->state->fb == state->fb -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -Currently, when using non-blocking commits, we can see the following -kernel warning: - -[ 110.908514] ------------[ cut here ]------------ -[ 110.908529] refcount_t: underflow; use-after-free. -[ 110.908620] WARNING: CPU: 0 PID: 1866 at lib/refcount.c:87 refcount_dec_not_one+0xb8/0xc0 -[ 110.908664] Modules linked in: rfcomm snd_seq_dummy snd_hrtimer snd_seq snd_seq_device cmac algif_hash aes_arm64 aes_generic algif_skcipher af_alg bnep hid_logitech_hidpp vc4 brcmfmac hci_uart btbcm brcmutil bluetooth snd_soc_hdmi_codec cfg80211 cec drm_display_helper drm_dma_helper drm_kms_helper snd_soc_core snd_compress snd_pcm_dmaengine fb_sys_fops sysimgblt syscopyarea sysfillrect raspberrypi_hwmon ecdh_generic ecc rfkill libaes i2c_bcm2835 binfmt_misc joydev snd_bcm2835(C) bcm2835_codec(C) bcm2835_isp(C) v4l2_mem2mem videobuf2_dma_contig snd_pcm bcm2835_v4l2(C) raspberrypi_gpiomem bcm2835_mmal_vchiq(C) videobuf2_v4l2 snd_timer videobuf2_vmalloc videobuf2_memops videobuf2_common snd videodev vc_sm_cma(C) mc hid_logitech_dj uio_pdrv_genirq uio i2c_dev drm fuse dm_mod drm_panel_orientation_quirks backlight ip_tables x_tables ipv6 -[ 110.909086] CPU: 0 PID: 1866 Comm: kodi.bin Tainted: G C 6.1.66-v8+ #32 -[ 110.909104] Hardware name: Raspberry Pi 3 Model B Rev 1.2 (DT) -[ 110.909114] pstate: 60000005 (nZCv daif -PAN -UAO -TCO -DIT -SSBS BTYPE=--) -[ 110.909132] pc : refcount_dec_not_one+0xb8/0xc0 -[ 110.909152] lr : refcount_dec_not_one+0xb4/0xc0 -[ 110.909170] sp : ffffffc00913b9c0 -[ 110.909177] x29: ffffffc00913b9c0 x28: 000000556969bbb0 x27: 000000556990df60 -[ 110.909205] x26: 0000000000000002 x25: 0000000000000004 x24: ffffff8004448480 -[ 110.909230] x23: ffffff800570b500 x22: ffffff802e03a7bc x21: ffffffecfca68c78 -[ 110.909257] x20: ffffff8002b42000 x19: ffffff802e03a600 x18: 0000000000000000 -[ 110.909283] x17: 0000000000000011 x16: ffffffffffffffff x15: 0000000000000004 -[ 110.909308] x14: 0000000000000fff x13: ffffffed577e47e0 x12: 0000000000000003 -[ 110.909333] x11: 0000000000000000 x10: 0000000000000027 x9 : c912d0d083728c00 -[ 110.909359] x8 : c912d0d083728c00 x7 : 65646e75203a745f x6 : 746e756f63666572 -[ 110.909384] x5 : ffffffed579f62ee x4 : ffffffed579eb01e x3 : 0000000000000000 -[ 110.909409] x2 : 0000000000000000 x1 : ffffffc00913b750 x0 : 0000000000000001 -[ 110.909434] Call trace: -[ 110.909441] refcount_dec_not_one+0xb8/0xc0 -[ 110.909461] vc4_bo_dec_usecnt+0x4c/0x1b0 [vc4] -[ 110.909903] vc4_cleanup_fb+0x44/0x50 [vc4] -[ 110.910315] drm_atomic_helper_cleanup_planes+0x88/0xa4 [drm_kms_helper] -[ 110.910669] vc4_atomic_commit_tail+0x390/0x9dc [vc4] -[ 110.911079] commit_tail+0xb0/0x164 [drm_kms_helper] -[ 110.911397] drm_atomic_helper_commit+0x1d0/0x1f0 [drm_kms_helper] -[ 110.911716] drm_atomic_commit+0xb0/0xdc [drm] -[ 110.912569] drm_mode_atomic_ioctl+0x348/0x4b8 [drm] -[ 110.913330] drm_ioctl_kernel+0xec/0x15c [drm] -[ 110.914091] drm_ioctl+0x24c/0x3b0 [drm] -[ 110.914850] __arm64_sys_ioctl+0x9c/0xd4 -[ 110.914873] invoke_syscall+0x4c/0x114 -[ 110.914897] el0_svc_common+0xd0/0x118 -[ 110.914917] do_el0_svc+0x38/0xd0 -[ 110.914936] el0_svc+0x30/0x8c -[ 110.914958] el0t_64_sync_handler+0x84/0xf0 -[ 110.914979] el0t_64_sync+0x18c/0x190 -[ 110.914996] ---[ end trace 0000000000000000 ]--- - -This happens because, although `prepare_fb` and `cleanup_fb` are -perfectly balanced, we cannot guarantee consistency in the check -plane->state->fb == state->fb. This means that sometimes we can increase -the refcount in `prepare_fb` and don't decrease it in `cleanup_fb`. The -opposite can also be true. - -In fact, the struct drm_plane .state shouldn't be accessed directly -but instead, the `drm_atomic_get_new_plane_state()` helper function should -be used. So, we could stick to this check, but using -`drm_atomic_get_new_plane_state()`. But actually, this check is not really -needed. We can increase and decrease the refcount symmetrically without -problems. - -This is going to make the code more simple and consistent. - -Signed-off-by: Maíra Canal ---- - drivers/gpu/drm/vc4/vc4_plane.c | 5 +---- - 1 file changed, 1 insertion(+), 4 deletions(-) - ---- a/drivers/gpu/drm/vc4/vc4_plane.c -+++ b/drivers/gpu/drm/vc4/vc4_plane.c -@@ -2225,9 +2225,6 @@ static int vc4_prepare_fb(struct drm_pla - - drm_gem_plane_helper_prepare_fb(plane, state); - -- if (plane->state->fb == state->fb) -- return 0; -- - return vc4_bo_inc_usecnt(bo); - } - -@@ -2236,7 +2233,7 @@ static void vc4_cleanup_fb(struct drm_pl - { - struct vc4_bo *bo; - -- if (plane->state->fb == state->fb || !state->fb) -+ if (!state->fb) - return; - - bo = to_vc4_bo(&drm_fb_dma_get_gem_obj(state->fb, 0)->base); diff --git a/target/linux/bcm47xx/patches-5.4/209-b44-register-adm-switch.patch b/target/linux/bcm47xx/patches-5.4/209-b44-register-adm-switch.patch index 2b4750145..cc6e8fc03 100644 --- a/target/linux/bcm47xx/patches-5.4/209-b44-register-adm-switch.patch +++ b/target/linux/bcm47xx/patches-5.4/209-b44-register-adm-switch.patch @@ -19,7 +19,7 @@ Subject: [PATCH 210/210] b44: register adm switch #include #include -@@ -2249,6 +2251,69 @@ static void b44_adjust_link(struct net_d +@@ -2251,6 +2253,69 @@ static void b44_adjust_link(struct net_d } } @@ -89,7 +89,7 @@ Subject: [PATCH 210/210] b44: register adm switch static int b44_register_phy_one(struct b44 *bp) { __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; -@@ -2285,6 +2350,9 @@ static int b44_register_phy_one(struct b +@@ -2287,6 +2352,9 @@ static int b44_register_phy_one(struct b if (!mdiobus_is_registered_device(bp->mii_bus, bp->phy_addr) && (sprom->boardflags_lo & (B44_BOARDFLAG_ROBO | B44_BOARDFLAG_ADM))) { @@ -99,7 +99,7 @@ Subject: [PATCH 210/210] b44: register adm switch dev_info(sdev->dev, "could not find PHY at %i, use fixed one\n", bp->phy_addr); -@@ -2481,6 +2549,7 @@ static void b44_remove_one(struct ssb_de +@@ -2483,6 +2551,7 @@ static void b44_remove_one(struct ssb_de unregister_netdev(dev); if (bp->flags & B44_FLAG_EXTERNAL_PHY) b44_unregister_phy_one(bp); diff --git a/target/linux/bcm47xx/patches-5.4/210-b44_phy_fix.patch b/target/linux/bcm47xx/patches-5.4/210-b44_phy_fix.patch index 8c7a73ac0..bff605210 100644 --- a/target/linux/bcm47xx/patches-5.4/210-b44_phy_fix.patch +++ b/target/linux/bcm47xx/patches-5.4/210-b44_phy_fix.patch @@ -43,7 +43,7 @@ if (bp->flags & B44_FLAG_EXTERNAL_PHY) return 0; -@@ -2179,6 +2204,8 @@ static int b44_get_invariants(struct b44 +@@ -2181,6 +2206,8 @@ static int b44_get_invariants(struct b44 * valid PHY address. */ bp->phy_addr &= 0x1F; diff --git a/target/linux/generic/backport-5.10/350-v5.12-NFSv4_2-SSC-helper-should-use-its-own-config.patch b/target/linux/generic/backport-5.10/350-v5.12-NFSv4_2-SSC-helper-should-use-its-own-config.patch deleted file mode 100644 index 8517bd7bb..000000000 --- a/target/linux/generic/backport-5.10/350-v5.12-NFSv4_2-SSC-helper-should-use-its-own-config.patch +++ /dev/null @@ -1,140 +0,0 @@ -From 02591f9febd5f69bb4c266a4abf899c4cf21964f Mon Sep 17 00:00:00 2001 -From: Dai Ngo -Date: Thu, 28 Jan 2021 01:42:26 -0500 -Subject: [PATCH] NFSv4_2: SSC helper should use its own config. - -Currently NFSv4_2 SSC helper, nfs_ssc, incorrectly uses GRACE_PERIOD -as its config. Fix by adding new config NFS_V4_2_SSC_HELPER which -depends on NFS_V4_2 and is automatically selected when NFSD_V4 is -enabled. Also removed the file name from a comment in nfs_ssc.c. - -Signed-off-by: Dai Ngo -Signed-off-by: Chuck Lever ---- - fs/Kconfig | 4 ++++ - fs/nfs/nfs4file.c | 4 ++++ - fs/nfs/super.c | 12 ++++++++++++ - fs/nfs_common/Makefile | 2 +- - fs/nfs_common/nfs_ssc.c | 2 -- - fs/nfsd/Kconfig | 1 + - 6 files changed, 22 insertions(+), 3 deletions(-) - ---- a/fs/Kconfig -+++ b/fs/Kconfig -@@ -333,6 +333,10 @@ config NFS_COMMON - depends on NFSD || NFS_FS || LOCKD - default y - -+config NFS_V4_2_SSC_HELPER -+ tristate -+ default y if NFS_V4=y || NFS_FS=y -+ - source "net/sunrpc/Kconfig" - source "fs/ceph/Kconfig" - source "fs/cifs/Kconfig" ---- a/fs/nfs/nfs4file.c -+++ b/fs/nfs/nfs4file.c -@@ -430,7 +430,9 @@ static const struct nfs4_ssc_client_ops - */ - void nfs42_ssc_register_ops(void) - { -+#ifdef CONFIG_NFSD_V4 - nfs42_ssc_register(&nfs4_ssc_clnt_ops_tbl); -+#endif - } - - /** -@@ -441,7 +443,9 @@ void nfs42_ssc_register_ops(void) - */ - void nfs42_ssc_unregister_ops(void) - { -+#ifdef CONFIG_NFSD_V4 - nfs42_ssc_unregister(&nfs4_ssc_clnt_ops_tbl); -+#endif - } - #endif /* CONFIG_NFS_V4_2 */ - ---- a/fs/nfs/super.c -+++ b/fs/nfs/super.c -@@ -86,9 +86,11 @@ const struct super_operations nfs_sops = - }; - EXPORT_SYMBOL_GPL(nfs_sops); - -+#ifdef CONFIG_NFS_V4_2 - static const struct nfs_ssc_client_ops nfs_ssc_clnt_ops_tbl = { - .sco_sb_deactive = nfs_sb_deactive, - }; -+#endif - - #if IS_ENABLED(CONFIG_NFS_V4) - static int __init register_nfs4_fs(void) -@@ -111,15 +113,21 @@ static void unregister_nfs4_fs(void) - } - #endif - -+#ifdef CONFIG_NFS_V4_2 - static void nfs_ssc_register_ops(void) - { -+#ifdef CONFIG_NFSD_V4 - nfs_ssc_register(&nfs_ssc_clnt_ops_tbl); -+#endif - } - - static void nfs_ssc_unregister_ops(void) - { -+#ifdef CONFIG_NFSD_V4 - nfs_ssc_unregister(&nfs_ssc_clnt_ops_tbl); -+#endif - } -+#endif /* CONFIG_NFS_V4_2 */ - - static struct shrinker acl_shrinker = { - .count_objects = nfs_access_cache_count, -@@ -148,7 +156,9 @@ int __init register_nfs_fs(void) - ret = register_shrinker(&acl_shrinker); - if (ret < 0) - goto error_3; -+#ifdef CONFIG_NFS_V4_2 - nfs_ssc_register_ops(); -+#endif - return 0; - error_3: - nfs_unregister_sysctl(); -@@ -168,7 +178,9 @@ void __exit unregister_nfs_fs(void) - unregister_shrinker(&acl_shrinker); - nfs_unregister_sysctl(); - unregister_nfs4_fs(); -+#ifdef CONFIG_NFS_V4_2 - nfs_ssc_unregister_ops(); -+#endif - unregister_filesystem(&nfs_fs_type); - } - ---- a/fs/nfs_common/Makefile -+++ b/fs/nfs_common/Makefile -@@ -7,4 +7,4 @@ obj-$(CONFIG_NFS_ACL_SUPPORT) += nfs_acl - nfs_acl-objs := nfsacl.o - - obj-$(CONFIG_GRACE_PERIOD) += grace.o --obj-$(CONFIG_GRACE_PERIOD) += nfs_ssc.o -+obj-$(CONFIG_NFS_V4_2_SSC_HELPER) += nfs_ssc.o ---- a/fs/nfs_common/nfs_ssc.c -+++ b/fs/nfs_common/nfs_ssc.c -@@ -1,7 +1,5 @@ - // SPDX-License-Identifier: GPL-2.0-only - /* -- * fs/nfs_common/nfs_ssc_comm.c -- * - * Helper for knfsd's SSC to access ops in NFS client modules - * - * Author: Dai Ngo ---- a/fs/nfsd/Kconfig -+++ b/fs/nfsd/Kconfig -@@ -77,6 +77,7 @@ config NFSD_V4 - select CRYPTO_MD5 - select CRYPTO_SHA256 - select GRACE_PERIOD -+ select NFS_V4_2_SSC_HELPER if NFS_V4_2 - help - This option enables support in your system's NFS server for - version 4 of the NFS protocol (RFC 3530). diff --git a/target/linux/generic/backport-5.10/351-v5.13-NFSv4_2-Remove-ifdef-CONFIG_NFSD-from-client-SSC.patch b/target/linux/generic/backport-5.10/351-v5.13-NFSv4_2-Remove-ifdef-CONFIG_NFSD-from-client-SSC.patch deleted file mode 100644 index 84c68e142..000000000 --- a/target/linux/generic/backport-5.10/351-v5.13-NFSv4_2-Remove-ifdef-CONFIG_NFSD-from-client-SSC.patch +++ /dev/null @@ -1,84 +0,0 @@ -From d9092b4bb2109502eb8972021a3f74febc931a63 Mon Sep 17 00:00:00 2001 -From: Dai Ngo -Date: Thu, 22 Apr 2021 03:37:49 -0400 -Subject: [PATCH] NFSv4.2: Remove ifdef CONFIG_NFSD from NFSv4.2 client SSC - code. - -The client SSC code should not depend on any of the CONFIG_NFSD config. -This patch removes all CONFIG_NFSD from NFSv4.2 client SSC code and -simplifies the config of CONFIG_NFS_V4_2_SSC_HELPER, NFSD_V4_2_INTER_SSC. - -Signed-off-by: Dai Ngo -Signed-off-by: Trond Myklebust ---- - fs/Kconfig | 4 ++-- - fs/nfs/nfs4file.c | 4 ---- - fs/nfs/super.c | 4 ---- - fs/nfsd/Kconfig | 2 +- - 4 files changed, 3 insertions(+), 11 deletions(-) - ---- a/fs/Kconfig -+++ b/fs/Kconfig -@@ -334,8 +334,8 @@ config NFS_COMMON - default y - - config NFS_V4_2_SSC_HELPER -- tristate -- default y if NFS_V4=y || NFS_FS=y -+ bool -+ default y if NFS_V4_2 - - source "net/sunrpc/Kconfig" - source "fs/ceph/Kconfig" ---- a/fs/nfs/nfs4file.c -+++ b/fs/nfs/nfs4file.c -@@ -430,9 +430,7 @@ static const struct nfs4_ssc_client_ops - */ - void nfs42_ssc_register_ops(void) - { --#ifdef CONFIG_NFSD_V4 - nfs42_ssc_register(&nfs4_ssc_clnt_ops_tbl); --#endif - } - - /** -@@ -443,9 +441,7 @@ void nfs42_ssc_register_ops(void) - */ - void nfs42_ssc_unregister_ops(void) - { --#ifdef CONFIG_NFSD_V4 - nfs42_ssc_unregister(&nfs4_ssc_clnt_ops_tbl); --#endif - } - #endif /* CONFIG_NFS_V4_2 */ - ---- a/fs/nfs/super.c -+++ b/fs/nfs/super.c -@@ -116,16 +116,12 @@ static void unregister_nfs4_fs(void) - #ifdef CONFIG_NFS_V4_2 - static void nfs_ssc_register_ops(void) - { --#ifdef CONFIG_NFSD_V4 - nfs_ssc_register(&nfs_ssc_clnt_ops_tbl); --#endif - } - - static void nfs_ssc_unregister_ops(void) - { --#ifdef CONFIG_NFSD_V4 - nfs_ssc_unregister(&nfs_ssc_clnt_ops_tbl); --#endif - } - #endif /* CONFIG_NFS_V4_2 */ - ---- a/fs/nfsd/Kconfig -+++ b/fs/nfsd/Kconfig -@@ -138,7 +138,7 @@ config NFSD_FLEXFILELAYOUT - - config NFSD_V4_2_INTER_SSC - bool "NFSv4.2 inter server to server COPY" -- depends on NFSD_V4 && NFS_V4_1 && NFS_V4_2 -+ depends on NFSD_V4 && NFS_V4_2 - help - This option enables support for NFSv4.2 inter server to - server copy where the destination server calls the NFSv4.2 diff --git a/target/linux/generic/backport-5.10/630-v5.15-page_pool_frag_support.patch b/target/linux/generic/backport-5.10/630-v5.15-page_pool_frag_support.patch index 60075af2c..bc5be29bd 100644 --- a/target/linux/generic/backport-5.10/630-v5.15-page_pool_frag_support.patch +++ b/target/linux/generic/backport-5.10/630-v5.15-page_pool_frag_support.patch @@ -574,7 +574,7 @@ union { --- a/net/core/skbuff.c +++ b/net/core/skbuff.c -@@ -594,13 +594,22 @@ static void skb_clone_fraglist(struct sk +@@ -595,13 +595,22 @@ static void skb_clone_fraglist(struct sk skb_get(list); } @@ -599,7 +599,7 @@ kfree(head); } -@@ -612,16 +621,27 @@ static void skb_release_data(struct sk_b +@@ -613,16 +622,27 @@ static void skb_release_data(struct sk_b if (skb->cloned && atomic_sub_return(skb->nohdr ? (1 << SKB_DATAREF_SHIFT) + 1 : 1, &shinfo->dataref)) @@ -629,7 +629,7 @@ } /* -@@ -1002,6 +1022,7 @@ static struct sk_buff *__skb_clone(struc +@@ -1003,6 +1023,7 @@ static struct sk_buff *__skb_clone(struc n->nohdr = 0; n->peeked = 0; C(pfmemalloc); @@ -637,7 +637,7 @@ n->destructor = NULL; C(tail); C(end); -@@ -3420,7 +3441,7 @@ int skb_shift(struct sk_buff *tgt, struc +@@ -3432,7 +3453,7 @@ int skb_shift(struct sk_buff *tgt, struc fragto = &skb_shinfo(tgt)->frags[merge]; skb_frag_size_add(fragto, skb_frag_size(fragfrom)); @@ -646,7 +646,7 @@ } /* Reposition in the original skb */ -@@ -5204,6 +5225,20 @@ bool skb_try_coalesce(struct sk_buff *to +@@ -5216,6 +5237,20 @@ bool skb_try_coalesce(struct sk_buff *to if (skb_cloned(to)) return false; @@ -687,7 +687,7 @@ #ifdef CONFIG_SKB_EXTENSIONS __u8 active_extensions; #endif -@@ -3030,9 +3032,15 @@ static inline void skb_frag_ref(struct s +@@ -3045,9 +3047,15 @@ static inline void skb_frag_ref(struct s * * Releases a reference on the paged fragment @frag. */ @@ -705,7 +705,7 @@ } /** -@@ -3044,7 +3052,7 @@ static inline void __skb_frag_unref(skb_ +@@ -3059,7 +3067,7 @@ static inline void __skb_frag_unref(skb_ */ static inline void skb_frag_unref(struct sk_buff *skb, int f) { @@ -714,7 +714,7 @@ } /** -@@ -4643,5 +4651,12 @@ static inline u64 skb_get_kcov_handle(st +@@ -4658,5 +4666,12 @@ static inline u64 skb_get_kcov_handle(st #endif } diff --git a/target/linux/generic/backport-5.10/633-v6.3-skbuff-Fix-a-race-between-coalescing-and-releasing-S.patch b/target/linux/generic/backport-5.10/633-v6.3-skbuff-Fix-a-race-between-coalescing-and-releasing-S.patch index a461734b6..57230fcd1 100644 --- a/target/linux/generic/backport-5.10/633-v6.3-skbuff-Fix-a-race-between-coalescing-and-releasing-S.patch +++ b/target/linux/generic/backport-5.10/633-v6.3-skbuff-Fix-a-race-between-coalescing-and-releasing-S.patch @@ -56,7 +56,7 @@ Signed-off-by: Jakub Kicinski --- a/net/core/skbuff.c +++ b/net/core/skbuff.c -@@ -5225,18 +5225,18 @@ bool skb_try_coalesce(struct sk_buff *to +@@ -5237,18 +5237,18 @@ bool skb_try_coalesce(struct sk_buff *to if (skb_cloned(to)) return false; diff --git a/target/linux/generic/backport-5.10/732-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch b/target/linux/generic/backport-5.10/732-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch index c94224cbd..8fd5094e8 100644 --- a/target/linux/generic/backport-5.10/732-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch +++ b/target/linux/generic/backport-5.10/732-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch @@ -1036,7 +1036,7 @@ Signed-off-by: David S. Miller u32 mahr = ravb_read(ndev, MAHR); u32 malr = ravb_read(ndev, MALR); -@@ -2202,7 +2204,7 @@ static int ravb_probe(struct platform_de +@@ -2205,7 +2207,7 @@ static int ravb_probe(struct platform_de priv->msg_enable = RAVB_DEF_MSG_ENABLE; /* Read and set MAC address */ @@ -1913,7 +1913,7 @@ Signed-off-by: David S. Miller eth_hw_addr_inherit(slave_dev, master); --- a/net/ethernet/eth.c +++ b/net/ethernet/eth.c -@@ -506,13 +506,14 @@ unsigned char * __weak arch_get_platform +@@ -496,13 +496,14 @@ unsigned char * __weak arch_get_platform int eth_platform_get_mac_address(struct device *dev, u8 *mac_addr) { diff --git a/target/linux/generic/backport-5.10/797-v5.17-net-usb-ax88179_178a-add-TSO-feature.patch b/target/linux/generic/backport-5.10/797-v5.17-net-usb-ax88179_178a-add-TSO-feature.patch index a2168aaba..5402109e3 100644 --- a/target/linux/generic/backport-5.10/797-v5.17-net-usb-ax88179_178a-add-TSO-feature.patch +++ b/target/linux/generic/backport-5.10/797-v5.17-net-usb-ax88179_178a-add-TSO-feature.patch @@ -35,7 +35,7 @@ Signed-off-by: David S. Miller /* Enable checksum offload */ *tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP | -@@ -1587,17 +1588,19 @@ ax88179_tx_fixup(struct usbnet *dev, str +@@ -1582,17 +1583,19 @@ ax88179_tx_fixup(struct usbnet *dev, str { u32 tx_hdr1, tx_hdr2; int frame_size = dev->maxpacket; @@ -57,7 +57,7 @@ Signed-off-by: David S. Miller if ((skb_header_cloned(skb) || headroom < 0) && pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) { dev_kfree_skb_any(skb); -@@ -1608,6 +1611,8 @@ ax88179_tx_fixup(struct usbnet *dev, str +@@ -1603,6 +1606,8 @@ ax88179_tx_fixup(struct usbnet *dev, str put_unaligned_le32(tx_hdr1, ptr); put_unaligned_le32(tx_hdr2, ptr + 4); diff --git a/target/linux/generic/backport-5.10/821-v5.13-let-pci-host-bridges-declar-their-reliance-on-msi-domains.patch b/target/linux/generic/backport-5.10/821-v5.13-let-pci-host-bridges-declar-their-reliance-on-msi-domains.patch index ee1acf4b9..9c3183c29 100644 --- a/target/linux/generic/backport-5.10/821-v5.13-let-pci-host-bridges-declar-their-reliance-on-msi-domains.patch +++ b/target/linux/generic/backport-5.10/821-v5.13-let-pci-host-bridges-declar-their-reliance-on-msi-domains.patch @@ -23,7 +23,7 @@ Acked-by: Bjorn Helgaas --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c -@@ -925,6 +925,8 @@ static int pci_register_host_bridge(stru +@@ -926,6 +926,8 @@ static int pci_register_host_bridge(stru device_enable_async_suspend(bus->bridge); pci_set_bus_of_node(bus); pci_set_bus_msi_domain(bus); @@ -34,7 +34,7 @@ Acked-by: Bjorn Helgaas set_dev_node(bus->bridge, pcibus_to_node(bus)); --- a/include/linux/pci.h +++ b/include/linux/pci.h -@@ -548,6 +548,7 @@ struct pci_host_bridge { +@@ -554,6 +554,7 @@ struct pci_host_bridge { unsigned int native_dpc:1; /* OS may use PCIe DPC */ unsigned int preserve_config:1; /* Preserve FW resource setup */ unsigned int size_windows:1; /* Enable root bus sizing */ diff --git a/target/linux/generic/backport-5.15/020-v6.1-02-mm-x86-add-CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG.patch b/target/linux/generic/backport-5.15/020-v6.1-02-mm-x86-add-CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG.patch index 2ea2e2497..8e4de36db 100644 --- a/target/linux/generic/backport-5.15/020-v6.1-02-mm-x86-add-CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG.patch +++ b/target/linux/generic/backport-5.15/020-v6.1-02-mm-x86-add-CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG.patch @@ -73,7 +73,7 @@ Signed-off-by: Andrew Morton --- a/arch/Kconfig +++ b/arch/Kconfig -@@ -1299,6 +1299,14 @@ config ARCH_HAS_ELFCORE_COMPAT +@@ -1307,6 +1307,14 @@ config ARCH_HAS_ELFCORE_COMPAT config ARCH_HAS_PARANOID_L1D_FLUSH bool @@ -90,7 +90,7 @@ Signed-off-by: Andrew Morton source "scripts/gcc-plugins/Kconfig" --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig -@@ -85,6 +85,7 @@ config X86 +@@ -86,6 +86,7 @@ config X86 select ARCH_HAS_PMEM_API if X86_64 select ARCH_HAS_PTE_DEVMAP if X86_64 select ARCH_HAS_PTE_SPECIAL diff --git a/target/linux/generic/backport-5.15/020-v6.1-05-mm-multi-gen-LRU-groundwork.patch b/target/linux/generic/backport-5.15/020-v6.1-05-mm-multi-gen-LRU-groundwork.patch index 85710eb79..ff4bb4df3 100644 --- a/target/linux/generic/backport-5.15/020-v6.1-05-mm-multi-gen-LRU-groundwork.patch +++ b/target/linux/generic/backport-5.15/020-v6.1-05-mm-multi-gen-LRU-groundwork.patch @@ -552,7 +552,7 @@ Signed-off-by: Andrew Morton --- a/kernel/bounds.c +++ b/kernel/bounds.c @@ -22,6 +22,11 @@ int main(void) - DEFINE(NR_CPUS_BITS, bits_per(CONFIG_NR_CPUS)); + DEFINE(NR_CPUS_BITS, order_base_2(CONFIG_NR_CPUS)); #endif DEFINE(SPINLOCK_SIZE, sizeof(spinlock_t)); +#ifdef CONFIG_LRU_GEN diff --git a/target/linux/generic/backport-5.15/346-v5.18-02-Revert-usb-host-xhci-mvebu-make-USB-3.0-PHY-optional.patch b/target/linux/generic/backport-5.15/346-v5.18-02-Revert-usb-host-xhci-mvebu-make-USB-3.0-PHY-optional.patch index 8cd86e0fc..0c2822146 100644 --- a/target/linux/generic/backport-5.15/346-v5.18-02-Revert-usb-host-xhci-mvebu-make-USB-3.0-PHY-optional.patch +++ b/target/linux/generic/backport-5.15/346-v5.18-02-Revert-usb-host-xhci-mvebu-make-USB-3.0-PHY-optional.patch @@ -156,7 +156,7 @@ Signed-off-by: Vinod Koul if (priv && (priv->quirks & XHCI_SG_TRB_CACHE_SIZE_QUIRK)) --- a/drivers/usb/host/xhci-plat.h +++ b/drivers/usb/host/xhci-plat.h -@@ -13,7 +13,6 @@ +@@ -15,7 +15,6 @@ struct usb_hcd; struct xhci_plat_priv { const char *firmware_name; unsigned long long quirks; diff --git a/target/linux/generic/backport-5.15/403-v6.1-mtd-allow-getting-MTD-device-associated-with-a-speci.patch b/target/linux/generic/backport-5.15/403-v6.1-mtd-allow-getting-MTD-device-associated-with-a-speci.patch index a67669acf..c4b5c9e59 100644 --- a/target/linux/generic/backport-5.15/403-v6.1-mtd-allow-getting-MTD-device-associated-with-a-speci.patch +++ b/target/linux/generic/backport-5.15/403-v6.1-mtd-allow-getting-MTD-device-associated-with-a-speci.patch @@ -25,7 +25,7 @@ Signed-off-by: Srinivas Kandagatla --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c -@@ -1175,6 +1175,34 @@ int __get_mtd_device(struct mtd_info *mt +@@ -1177,6 +1177,34 @@ int __get_mtd_device(struct mtd_info *mt EXPORT_SYMBOL_GPL(__get_mtd_device); /** diff --git a/target/linux/generic/backport-5.15/700-v5.17-net-dsa-introduce-tagger-owned-storage-for-private.patch b/target/linux/generic/backport-5.15/700-v5.17-net-dsa-introduce-tagger-owned-storage-for-private.patch index f56a96858..8e5c71804 100644 --- a/target/linux/generic/backport-5.15/700-v5.17-net-dsa-introduce-tagger-owned-storage-for-private.patch +++ b/target/linux/generic/backport-5.15/700-v5.17-net-dsa-introduce-tagger-owned-storage-for-private.patch @@ -124,7 +124,7 @@ Signed-off-by: David S. Miller list_del(&dst->list); kfree(dst); } -@@ -805,7 +809,7 @@ static int dsa_switch_setup_tag_protocol +@@ -827,7 +831,7 @@ static int dsa_switch_setup_tag_protocol int port, err; if (tag_ops->proto == dst->default_proto) @@ -133,7 +133,7 @@ Signed-off-by: David S. Miller for (port = 0; port < ds->num_ports; port++) { if (!dsa_is_cpu_port(ds, port)) -@@ -821,6 +825,17 @@ static int dsa_switch_setup_tag_protocol +@@ -843,6 +847,17 @@ static int dsa_switch_setup_tag_protocol } } @@ -151,7 +151,7 @@ Signed-off-by: David S. Miller return 0; } -@@ -1132,6 +1147,46 @@ static void dsa_tree_teardown(struct dsa +@@ -1154,6 +1169,46 @@ static void dsa_tree_teardown(struct dsa dst->setup = false; } @@ -198,7 +198,7 @@ Signed-off-by: David S. Miller /* Since the dsa/tagging sysfs device attribute is per master, the assumption * is that all DSA switches within a tree share the same tagger, otherwise * they would have formed disjoint trees (different "dsa,member" values). -@@ -1164,12 +1219,15 @@ int dsa_tree_change_tag_proto(struct dsa +@@ -1186,12 +1241,15 @@ int dsa_tree_change_tag_proto(struct dsa goto out_unlock; } @@ -216,7 +216,7 @@ Signed-off-by: David S. Miller rtnl_unlock(); -@@ -1257,6 +1315,7 @@ static int dsa_port_parse_cpu(struct dsa +@@ -1279,6 +1337,7 @@ static int dsa_port_parse_cpu(struct dsa struct dsa_switch *ds = dp->ds; struct dsa_switch_tree *dst = ds->dst; enum dsa_tag_protocol default_proto; @@ -224,7 +224,7 @@ Signed-off-by: David S. Miller /* Find out which protocol the switch would prefer. */ default_proto = dsa_get_tag_protocol(dp, master); -@@ -1311,6 +1370,12 @@ static int dsa_port_parse_cpu(struct dsa +@@ -1333,6 +1392,12 @@ static int dsa_port_parse_cpu(struct dsa */ dsa_tag_driver_put(tag_ops); } else { diff --git a/target/linux/generic/backport-5.15/701-v5.17-dsa-make-tagging-protocols-connect-to-individual-switches.patch b/target/linux/generic/backport-5.15/701-v5.17-dsa-make-tagging-protocols-connect-to-individual-switches.patch index 0c50ae6fb..8c81ebc7f 100644 --- a/target/linux/generic/backport-5.15/701-v5.17-dsa-make-tagging-protocols-connect-to-individual-switches.patch +++ b/target/linux/generic/backport-5.15/701-v5.17-dsa-make-tagging-protocols-connect-to-individual-switches.patch @@ -101,7 +101,7 @@ Signed-off-by: David S. Miller list_del(&dst->list); kfree(dst); } -@@ -826,17 +822,29 @@ static int dsa_switch_setup_tag_protocol +@@ -848,17 +844,29 @@ static int dsa_switch_setup_tag_protocol } connect: @@ -132,7 +132,7 @@ Signed-off-by: David S. Miller } static int dsa_switch_setup(struct dsa_switch *ds) -@@ -1156,13 +1164,6 @@ static int dsa_tree_bind_tag_proto(struc +@@ -1178,13 +1186,6 @@ static int dsa_tree_bind_tag_proto(struc dst->tag_ops = tag_ops; @@ -146,7 +146,7 @@ Signed-off-by: David S. Miller /* Notify the switches from this tree about the connection * to the new tagger */ -@@ -1172,16 +1173,14 @@ static int dsa_tree_bind_tag_proto(struc +@@ -1194,16 +1195,14 @@ static int dsa_tree_bind_tag_proto(struc goto out_disconnect; /* Notify the old tagger about the disconnection from this tree */ @@ -167,7 +167,7 @@ Signed-off-by: David S. Miller dst->tag_ops = old_tag_ops; return err; -@@ -1315,7 +1314,6 @@ static int dsa_port_parse_cpu(struct dsa +@@ -1337,7 +1336,6 @@ static int dsa_port_parse_cpu(struct dsa struct dsa_switch *ds = dp->ds; struct dsa_switch_tree *dst = ds->dst; enum dsa_tag_protocol default_proto; @@ -175,7 +175,7 @@ Signed-off-by: David S. Miller /* Find out which protocol the switch would prefer. */ default_proto = dsa_get_tag_protocol(dp, master); -@@ -1370,12 +1368,6 @@ static int dsa_port_parse_cpu(struct dsa +@@ -1392,12 +1390,6 @@ static int dsa_port_parse_cpu(struct dsa */ dsa_tag_driver_put(tag_ops); } else { diff --git a/target/linux/generic/backport-5.15/702-v5.19-01-arm64-dts-mediatek-mt7622-add-support-for-coherent-D.patch b/target/linux/generic/backport-5.15/702-v5.19-01-arm64-dts-mediatek-mt7622-add-support-for-coherent-D.patch deleted file mode 100644 index 9f2512a1d..000000000 --- a/target/linux/generic/backport-5.15/702-v5.19-01-arm64-dts-mediatek-mt7622-add-support-for-coherent-D.patch +++ /dev/null @@ -1,30 +0,0 @@ -From: Felix Fietkau -Date: Mon, 7 Feb 2022 10:27:22 +0100 -Subject: [PATCH] arm64: dts: mediatek: mt7622: add support for coherent - DMA - -It improves performance by eliminating the need for a cache flush on rx and tx - -Signed-off-by: Felix Fietkau ---- - ---- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi -+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi -@@ -357,7 +357,7 @@ - }; - - cci_control2: slave-if@5000 { -- compatible = "arm,cci-400-ctrl-if"; -+ compatible = "arm,cci-400-ctrl-if", "syscon"; - interface-type = "ace"; - reg = <0x5000 0x1000>; - }; -@@ -938,6 +938,8 @@ - power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>; - mediatek,ethsys = <ðsys>; - mediatek,sgmiisys = <&sgmiisys>; -+ mediatek,cci-control = <&cci_control2>; -+ dma-coherent; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; diff --git a/target/linux/generic/backport-5.15/702-v5.19-04-arm64-dts-mediatek-mt7622-introduce-nodes-for-Wirele.patch b/target/linux/generic/backport-5.15/702-v5.19-04-arm64-dts-mediatek-mt7622-introduce-nodes-for-Wirele.patch deleted file mode 100644 index 2c6e3fd3c..000000000 --- a/target/linux/generic/backport-5.15/702-v5.19-04-arm64-dts-mediatek-mt7622-introduce-nodes-for-Wirele.patch +++ /dev/null @@ -1,62 +0,0 @@ -From: Felix Fietkau -Date: Sat, 5 Feb 2022 18:36:36 +0100 -Subject: [PATCH] arm64: dts: mediatek: mt7622: introduce nodes for - Wireless Ethernet Dispatch - -Introduce wed0 and wed1 nodes in order to enable offloading forwarding -between ethernet and wireless devices on the mt7622 chipset. - -Signed-off-by: Felix Fietkau ---- - ---- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi -+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi -@@ -894,6 +894,11 @@ - }; - }; - -+ hifsys: syscon@1af00000 { -+ compatible = "mediatek,mt7622-hifsys", "syscon"; -+ reg = <0 0x1af00000 0 0x70>; -+ }; -+ - ethsys: syscon@1b000000 { - compatible = "mediatek,mt7622-ethsys", - "syscon"; -@@ -912,6 +917,26 @@ - #dma-cells = <1>; - }; - -+ pcie_mirror: pcie-mirror@10000400 { -+ compatible = "mediatek,mt7622-pcie-mirror", -+ "syscon"; -+ reg = <0 0x10000400 0 0x10>; -+ }; -+ -+ wed0: wed@1020a000 { -+ compatible = "mediatek,mt7622-wed", -+ "syscon"; -+ reg = <0 0x1020a000 0 0x1000>; -+ interrupts = ; -+ }; -+ -+ wed1: wed@1020b000 { -+ compatible = "mediatek,mt7622-wed", -+ "syscon"; -+ reg = <0 0x1020b000 0 0x1000>; -+ interrupts = ; -+ }; -+ - eth: ethernet@1b100000 { - compatible = "mediatek,mt7622-eth", - "mediatek,mt2701-eth", -@@ -939,6 +964,9 @@ - mediatek,ethsys = <ðsys>; - mediatek,sgmiisys = <&sgmiisys>; - mediatek,cci-control = <&cci_control2>; -+ mediatek,wed = <&wed0>, <&wed1>; -+ mediatek,pcie-mirror = <&pcie_mirror>; -+ mediatek,hifsys = <&hifsys>; - dma-coherent; - #address-cells = <1>; - #size-cells = <0>; diff --git a/target/linux/generic/backport-5.15/702-v5.19-13-net-ethernet-mtk_eth_soc-use-standard-property-for-c.patch b/target/linux/generic/backport-5.15/702-v5.19-13-net-ethernet-mtk_eth_soc-use-standard-property-for-c.patch index 70d46c16c..22125a454 100644 --- a/target/linux/generic/backport-5.15/702-v5.19-13-net-ethernet-mtk_eth_soc-use-standard-property-for-c.patch +++ b/target/linux/generic/backport-5.15/702-v5.19-13-net-ethernet-mtk_eth_soc-use-standard-property-for-c.patch @@ -13,7 +13,7 @@ Signed-off-by: David S. Miller --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi -@@ -963,7 +963,7 @@ +@@ -957,7 +957,7 @@ power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>; mediatek,ethsys = <ðsys>; mediatek,sgmiisys = <&sgmiisys>; diff --git a/target/linux/generic/backport-5.15/705-01-v5.17-net-dsa-mt7530-iterate-using-dsa_switch_for_each_use.patch b/target/linux/generic/backport-5.15/705-01-v5.17-net-dsa-mt7530-iterate-using-dsa_switch_for_each_use.patch index bdb4a8315..f65b0cafa 100644 --- a/target/linux/generic/backport-5.15/705-01-v5.17-net-dsa-mt7530-iterate-using-dsa_switch_for_each_use.patch +++ b/target/linux/generic/backport-5.15/705-01-v5.17-net-dsa-mt7530-iterate-using-dsa_switch_for_each_use.patch @@ -21,7 +21,7 @@ Signed-off-by: Jakub Kicinski --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -1404,27 +1404,31 @@ static int +@@ -1425,27 +1425,31 @@ static int mt7530_port_bridge_join(struct dsa_switch *ds, int port, struct net_device *bridge) { @@ -65,7 +65,7 @@ Signed-off-by: Jakub Kicinski } /* Add the all other ports to this port matrix. */ -@@ -1529,24 +1533,28 @@ static void +@@ -1550,24 +1554,28 @@ static void mt7530_port_bridge_leave(struct dsa_switch *ds, int port, struct net_device *bridge) { diff --git a/target/linux/generic/backport-5.15/705-02-v5.19-net-dsa-mt7530-populate-supported_interfaces-and-mac.patch b/target/linux/generic/backport-5.15/705-02-v5.19-net-dsa-mt7530-populate-supported_interfaces-and-mac.patch index 3f5b953a2..e04bb11e8 100644 --- a/target/linux/generic/backport-5.15/705-02-v5.19-net-dsa-mt7530-populate-supported_interfaces-and-mac.patch +++ b/target/linux/generic/backport-5.15/705-02-v5.19-net-dsa-mt7530-populate-supported_interfaces-and-mac.patch @@ -23,7 +23,7 @@ Signed-off-by: Paolo Abeni --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2660,6 +2660,32 @@ mt7531_setup(struct dsa_switch *ds) +@@ -2687,6 +2687,32 @@ mt7531_setup(struct dsa_switch *ds) return 0; } @@ -56,7 +56,7 @@ Signed-off-by: Paolo Abeni static bool mt7530_phy_mode_supported(struct dsa_switch *ds, int port, const struct phylink_link_state *state) -@@ -2696,6 +2722,37 @@ static bool mt7531_is_rgmii_port(struct +@@ -2723,6 +2749,37 @@ static bool mt7531_is_rgmii_port(struct return (port == 5) && (priv->p5_intf_sel != P5_INTF_SEL_GMAC5_SGMII); } @@ -94,7 +94,7 @@ Signed-off-by: Paolo Abeni static bool mt7531_phy_mode_supported(struct dsa_switch *ds, int port, const struct phylink_link_state *state) -@@ -3172,6 +3229,18 @@ mt7531_cpu_port_config(struct dsa_switch +@@ -3199,6 +3256,18 @@ mt7531_cpu_port_config(struct dsa_switch return 0; } @@ -113,7 +113,7 @@ Signed-off-by: Paolo Abeni static void mt7530_mac_port_validate(struct dsa_switch *ds, int port, unsigned long *supported) -@@ -3407,6 +3476,7 @@ static const struct dsa_switch_ops mt753 +@@ -3435,6 +3504,7 @@ static const struct dsa_switch_ops mt753 .port_vlan_del = mt7530_port_vlan_del, .port_mirror_add = mt753x_port_mirror_add, .port_mirror_del = mt753x_port_mirror_del, @@ -121,7 +121,7 @@ Signed-off-by: Paolo Abeni .phylink_validate = mt753x_phylink_validate, .phylink_mac_link_state = mt753x_phylink_mac_link_state, .phylink_mac_config = mt753x_phylink_mac_config, -@@ -3424,6 +3494,7 @@ static const struct mt753x_info mt753x_t +@@ -3452,6 +3522,7 @@ static const struct mt753x_info mt753x_t .phy_read = mt7530_phy_read, .phy_write = mt7530_phy_write, .pad_setup = mt7530_pad_clk_setup, @@ -129,7 +129,7 @@ Signed-off-by: Paolo Abeni .phy_mode_supported = mt7530_phy_mode_supported, .mac_port_validate = mt7530_mac_port_validate, .mac_port_get_state = mt7530_phylink_mac_link_state, -@@ -3435,6 +3506,7 @@ static const struct mt753x_info mt753x_t +@@ -3463,6 +3534,7 @@ static const struct mt753x_info mt753x_t .phy_read = mt7530_phy_read, .phy_write = mt7530_phy_write, .pad_setup = mt7530_pad_clk_setup, @@ -137,7 +137,7 @@ Signed-off-by: Paolo Abeni .phy_mode_supported = mt7530_phy_mode_supported, .mac_port_validate = mt7530_mac_port_validate, .mac_port_get_state = mt7530_phylink_mac_link_state, -@@ -3447,6 +3519,7 @@ static const struct mt753x_info mt753x_t +@@ -3475,6 +3547,7 @@ static const struct mt753x_info mt753x_t .phy_write = mt7531_ind_phy_write, .pad_setup = mt7531_pad_setup, .cpu_port_config = mt7531_cpu_port_config, @@ -145,7 +145,7 @@ Signed-off-by: Paolo Abeni .phy_mode_supported = mt7531_phy_mode_supported, .mac_port_validate = mt7531_mac_port_validate, .mac_port_get_state = mt7531_phylink_mac_link_state, -@@ -3509,6 +3582,7 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3537,6 +3610,7 @@ mt7530_probe(struct mdio_device *mdiodev */ if (!priv->info->sw_setup || !priv->info->pad_setup || !priv->info->phy_read || !priv->info->phy_write || @@ -155,7 +155,7 @@ Signed-off-by: Paolo Abeni !priv->info->mac_port_get_state || !priv->info->mac_port_config) --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -801,6 +801,8 @@ struct mt753x_info { +@@ -807,6 +807,8 @@ struct mt753x_info { int (*phy_write)(struct mt7530_priv *priv, int port, int regnum, u16 val); int (*pad_setup)(struct dsa_switch *ds, phy_interface_t interface); int (*cpu_port_config)(struct dsa_switch *ds, int port); diff --git a/target/linux/generic/backport-5.15/705-03-v5.19-net-dsa-mt7530-remove-interface-checks.patch b/target/linux/generic/backport-5.15/705-03-v5.19-net-dsa-mt7530-remove-interface-checks.patch index 60634aa0d..31be0e7be 100644 --- a/target/linux/generic/backport-5.15/705-03-v5.19-net-dsa-mt7530-remove-interface-checks.patch +++ b/target/linux/generic/backport-5.15/705-03-v5.19-net-dsa-mt7530-remove-interface-checks.patch @@ -21,7 +21,7 @@ Signed-off-by: Paolo Abeni --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2686,37 +2686,6 @@ static void mt7530_mac_port_get_caps(str +@@ -2713,37 +2713,6 @@ static void mt7530_mac_port_get_caps(str } } @@ -59,7 +59,7 @@ Signed-off-by: Paolo Abeni static bool mt7531_is_rgmii_port(struct mt7530_priv *priv, u32 port) { return (port == 5) && (priv->p5_intf_sel != P5_INTF_SEL_GMAC5_SGMII); -@@ -2753,44 +2722,6 @@ static void mt7531_mac_port_get_caps(str +@@ -2780,44 +2749,6 @@ static void mt7531_mac_port_get_caps(str } } @@ -104,7 +104,7 @@ Signed-off-by: Paolo Abeni static int mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state) { -@@ -3045,9 +2976,6 @@ mt753x_phylink_mac_config(struct dsa_swi +@@ -3072,9 +3003,6 @@ mt753x_phylink_mac_config(struct dsa_swi struct mt7530_priv *priv = ds->priv; u32 mcr_cur, mcr_new; @@ -114,7 +114,7 @@ Signed-off-by: Paolo Abeni switch (port) { case 0 ... 4: /* Internal phy */ if (state->interface != PHY_INTERFACE_MODE_GMII) -@@ -3263,12 +3191,6 @@ mt753x_phylink_validate(struct dsa_switc +@@ -3290,12 +3218,6 @@ mt753x_phylink_validate(struct dsa_switc __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; struct mt7530_priv *priv = ds->priv; @@ -127,7 +127,7 @@ Signed-off-by: Paolo Abeni phylink_set_port_modes(mask); if (state->interface != PHY_INTERFACE_MODE_TRGMII && -@@ -3495,7 +3417,6 @@ static const struct mt753x_info mt753x_t +@@ -3523,7 +3445,6 @@ static const struct mt753x_info mt753x_t .phy_write = mt7530_phy_write, .pad_setup = mt7530_pad_clk_setup, .mac_port_get_caps = mt7530_mac_port_get_caps, @@ -135,7 +135,7 @@ Signed-off-by: Paolo Abeni .mac_port_validate = mt7530_mac_port_validate, .mac_port_get_state = mt7530_phylink_mac_link_state, .mac_port_config = mt7530_mac_config, -@@ -3507,7 +3428,6 @@ static const struct mt753x_info mt753x_t +@@ -3535,7 +3456,6 @@ static const struct mt753x_info mt753x_t .phy_write = mt7530_phy_write, .pad_setup = mt7530_pad_clk_setup, .mac_port_get_caps = mt7530_mac_port_get_caps, @@ -143,7 +143,7 @@ Signed-off-by: Paolo Abeni .mac_port_validate = mt7530_mac_port_validate, .mac_port_get_state = mt7530_phylink_mac_link_state, .mac_port_config = mt7530_mac_config, -@@ -3520,7 +3440,6 @@ static const struct mt753x_info mt753x_t +@@ -3548,7 +3468,6 @@ static const struct mt753x_info mt753x_t .pad_setup = mt7531_pad_setup, .cpu_port_config = mt7531_cpu_port_config, .mac_port_get_caps = mt7531_mac_port_get_caps, @@ -151,7 +151,7 @@ Signed-off-by: Paolo Abeni .mac_port_validate = mt7531_mac_port_validate, .mac_port_get_state = mt7531_phylink_mac_link_state, .mac_port_config = mt7531_mac_config, -@@ -3583,7 +3502,6 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3611,7 +3530,6 @@ mt7530_probe(struct mdio_device *mdiodev if (!priv->info->sw_setup || !priv->info->pad_setup || !priv->info->phy_read || !priv->info->phy_write || !priv->info->mac_port_get_caps || @@ -161,7 +161,7 @@ Signed-off-by: Paolo Abeni return -EINVAL; --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -803,8 +803,6 @@ struct mt753x_info { +@@ -809,8 +809,6 @@ struct mt753x_info { int (*cpu_port_config)(struct dsa_switch *ds, int port); void (*mac_port_get_caps)(struct dsa_switch *ds, int port, struct phylink_config *config); diff --git a/target/linux/generic/backport-5.15/705-04-v5.19-net-dsa-mt7530-drop-use-of-phylink_helper_basex_spee.patch b/target/linux/generic/backport-5.15/705-04-v5.19-net-dsa-mt7530-drop-use-of-phylink_helper_basex_spee.patch index f98cf4c79..2a5d5ae9d 100644 --- a/target/linux/generic/backport-5.15/705-04-v5.19-net-dsa-mt7530-drop-use-of-phylink_helper_basex_spee.patch +++ b/target/linux/generic/backport-5.15/705-04-v5.19-net-dsa-mt7530-drop-use-of-phylink_helper_basex_spee.patch @@ -20,7 +20,7 @@ Signed-off-by: Paolo Abeni --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3215,11 +3215,6 @@ mt753x_phylink_validate(struct dsa_switc +@@ -3242,11 +3242,6 @@ mt753x_phylink_validate(struct dsa_switc linkmode_and(supported, supported, mask); linkmode_and(state->advertising, state->advertising, mask); diff --git a/target/linux/generic/backport-5.15/705-05-v5.19-net-dsa-mt7530-only-indicate-linkmodes-that-can-be-s.patch b/target/linux/generic/backport-5.15/705-05-v5.19-net-dsa-mt7530-only-indicate-linkmodes-that-can-be-s.patch index a499b8e5b..ad672312e 100644 --- a/target/linux/generic/backport-5.15/705-05-v5.19-net-dsa-mt7530-only-indicate-linkmodes-that-can-be-s.patch +++ b/target/linux/generic/backport-5.15/705-05-v5.19-net-dsa-mt7530-only-indicate-linkmodes-that-can-be-s.patch @@ -23,7 +23,7 @@ Signed-off-by: Paolo Abeni --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2793,12 +2793,13 @@ static int mt7531_rgmii_setup(struct mt7 +@@ -2820,12 +2820,13 @@ static int mt7531_rgmii_setup(struct mt7 } static void mt7531_sgmii_validate(struct mt7530_priv *priv, int port, @@ -38,7 +38,7 @@ Signed-off-by: Paolo Abeni phylink_set(supported, 2500baseX_Full); phylink_set(supported, 2500baseT_Full); } -@@ -3171,16 +3172,18 @@ static void mt753x_phylink_get_caps(stru +@@ -3198,16 +3199,18 @@ static void mt753x_phylink_get_caps(stru static void mt7530_mac_port_validate(struct dsa_switch *ds, int port, @@ -58,7 +58,7 @@ Signed-off-by: Paolo Abeni } static void -@@ -3203,12 +3206,13 @@ mt753x_phylink_validate(struct dsa_switc +@@ -3230,12 +3233,13 @@ mt753x_phylink_validate(struct dsa_switc } /* This switch only supports 1G full-duplex. */ @@ -76,7 +76,7 @@ Signed-off-by: Paolo Abeni phylink_set(mask, Asym_Pause); --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -804,6 +804,7 @@ struct mt753x_info { +@@ -810,6 +810,7 @@ struct mt753x_info { void (*mac_port_get_caps)(struct dsa_switch *ds, int port, struct phylink_config *config); void (*mac_port_validate)(struct dsa_switch *ds, int port, diff --git a/target/linux/generic/backport-5.15/705-06-v5.19-net-dsa-mt7530-switch-to-use-phylink_get_linkmodes.patch b/target/linux/generic/backport-5.15/705-06-v5.19-net-dsa-mt7530-switch-to-use-phylink_get_linkmodes.patch index b7fc06106..8d9802f1e 100644 --- a/target/linux/generic/backport-5.15/705-06-v5.19-net-dsa-mt7530-switch-to-use-phylink_get_linkmodes.patch +++ b/target/linux/generic/backport-5.15/705-06-v5.19-net-dsa-mt7530-switch-to-use-phylink_get_linkmodes.patch @@ -20,7 +20,7 @@ Signed-off-by: Paolo Abeni --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2792,19 +2792,6 @@ static int mt7531_rgmii_setup(struct mt7 +@@ -2819,19 +2819,6 @@ static int mt7531_rgmii_setup(struct mt7 return 0; } @@ -40,7 +40,7 @@ Signed-off-by: Paolo Abeni static void mt7531_sgmii_link_up_force(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface, -@@ -3171,51 +3158,21 @@ static void mt753x_phylink_get_caps(stru +@@ -3198,51 +3185,21 @@ static void mt753x_phylink_get_caps(stru } static void @@ -97,7 +97,7 @@ Signed-off-by: Paolo Abeni linkmode_and(supported, supported, mask); linkmode_and(state->advertising, state->advertising, mask); -@@ -3416,7 +3373,6 @@ static const struct mt753x_info mt753x_t +@@ -3444,7 +3401,6 @@ static const struct mt753x_info mt753x_t .phy_write = mt7530_phy_write, .pad_setup = mt7530_pad_clk_setup, .mac_port_get_caps = mt7530_mac_port_get_caps, @@ -105,7 +105,7 @@ Signed-off-by: Paolo Abeni .mac_port_get_state = mt7530_phylink_mac_link_state, .mac_port_config = mt7530_mac_config, }, -@@ -3427,7 +3383,6 @@ static const struct mt753x_info mt753x_t +@@ -3455,7 +3411,6 @@ static const struct mt753x_info mt753x_t .phy_write = mt7530_phy_write, .pad_setup = mt7530_pad_clk_setup, .mac_port_get_caps = mt7530_mac_port_get_caps, @@ -113,7 +113,7 @@ Signed-off-by: Paolo Abeni .mac_port_get_state = mt7530_phylink_mac_link_state, .mac_port_config = mt7530_mac_config, }, -@@ -3439,7 +3394,6 @@ static const struct mt753x_info mt753x_t +@@ -3467,7 +3422,6 @@ static const struct mt753x_info mt753x_t .pad_setup = mt7531_pad_setup, .cpu_port_config = mt7531_cpu_port_config, .mac_port_get_caps = mt7531_mac_port_get_caps, @@ -121,7 +121,7 @@ Signed-off-by: Paolo Abeni .mac_port_get_state = mt7531_phylink_mac_link_state, .mac_port_config = mt7531_mac_config, .mac_pcs_an_restart = mt7531_sgmii_restart_an, -@@ -3501,7 +3455,6 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3529,7 +3483,6 @@ mt7530_probe(struct mdio_device *mdiodev if (!priv->info->sw_setup || !priv->info->pad_setup || !priv->info->phy_read || !priv->info->phy_write || !priv->info->mac_port_get_caps || diff --git a/target/linux/generic/backport-5.15/705-07-v5.19-net-dsa-mt7530-partially-convert-to-phylink_pcs.patch b/target/linux/generic/backport-5.15/705-07-v5.19-net-dsa-mt7530-partially-convert-to-phylink_pcs.patch index 7afa5be3d..149c12c1f 100644 --- a/target/linux/generic/backport-5.15/705-07-v5.19-net-dsa-mt7530-partially-convert-to-phylink_pcs.patch +++ b/target/linux/generic/backport-5.15/705-07-v5.19-net-dsa-mt7530-partially-convert-to-phylink_pcs.patch @@ -33,7 +33,7 @@ Signed-off-by: Paolo Abeni /* String, offset, and register size in bytes if different from 4 bytes */ static const struct mt7530_mib_desc mt7530_mib[] = { MIB_DESC(1, 0x00, "TxDrop"), -@@ -2792,12 +2797,11 @@ static int mt7531_rgmii_setup(struct mt7 +@@ -2819,12 +2824,11 @@ static int mt7531_rgmii_setup(struct mt7 return 0; } @@ -50,7 +50,7 @@ Signed-off-by: Paolo Abeni unsigned int val; /* For adjusting speed and duplex of SGMII force mode. */ -@@ -2823,6 +2827,9 @@ mt7531_sgmii_link_up_force(struct dsa_sw +@@ -2850,6 +2854,9 @@ mt7531_sgmii_link_up_force(struct dsa_sw /* MT7531 SGMII 1G force mode can only work in full duplex mode, * no matter MT7531_SGMII_FORCE_HALF_DUPLEX is set or not. @@ -60,7 +60,7 @@ Signed-off-by: Paolo Abeni */ if ((speed == SPEED_10 || speed == SPEED_100) && duplex != DUPLEX_FULL) -@@ -2898,9 +2905,10 @@ static int mt7531_sgmii_setup_mode_an(st +@@ -2925,9 +2932,10 @@ static int mt7531_sgmii_setup_mode_an(st return 0; } @@ -73,7 +73,7 @@ Signed-off-by: Paolo Abeni u32 val; /* Only restart AN when AN is enabled */ -@@ -2957,6 +2965,24 @@ mt753x_mac_config(struct dsa_switch *ds, +@@ -2984,6 +2992,24 @@ mt753x_mac_config(struct dsa_switch *ds, return priv->info->mac_port_config(ds, port, mode, state->interface); } @@ -98,7 +98,7 @@ Signed-off-by: Paolo Abeni static void mt753x_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, const struct phylink_link_state *state) -@@ -3018,17 +3044,6 @@ unsupported: +@@ -3045,17 +3071,6 @@ unsupported: mt7530_write(priv, MT7530_PMCR_P(port), mcr_new); } @@ -116,7 +116,7 @@ Signed-off-by: Paolo Abeni static void mt753x_phylink_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) -@@ -3038,16 +3053,13 @@ static void mt753x_phylink_mac_link_down +@@ -3065,16 +3080,13 @@ static void mt753x_phylink_mac_link_down mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK); } @@ -139,7 +139,7 @@ Signed-off-by: Paolo Abeni } static void mt753x_phylink_mac_link_up(struct dsa_switch *ds, int port, -@@ -3060,8 +3072,6 @@ static void mt753x_phylink_mac_link_up(s +@@ -3087,8 +3099,6 @@ static void mt753x_phylink_mac_link_up(s struct mt7530_priv *priv = ds->priv; u32 mcr; @@ -148,7 +148,7 @@ Signed-off-by: Paolo Abeni mcr = PMCR_RX_EN | PMCR_TX_EN | PMCR_FORCE_LNK; /* MT753x MAC works in 1G full duplex mode for all up-clocked -@@ -3139,6 +3149,8 @@ mt7531_cpu_port_config(struct dsa_switch +@@ -3166,6 +3176,8 @@ mt7531_cpu_port_config(struct dsa_switch return ret; mt7530_write(priv, MT7530_PMCR_P(port), PMCR_CPU_PORT_SETTING(priv->id)); @@ -157,7 +157,7 @@ Signed-off-by: Paolo Abeni mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, interface, NULL, speed, DUPLEX_FULL, true, true); -@@ -3178,16 +3190,13 @@ mt753x_phylink_validate(struct dsa_switc +@@ -3205,16 +3217,13 @@ mt753x_phylink_validate(struct dsa_switc linkmode_and(state->advertising, state->advertising, mask); } @@ -178,7 +178,7 @@ Signed-off-by: Paolo Abeni pmsr = mt7530_read(priv, MT7530_PMSR_P(port)); state->link = (pmsr & PMSR_LINK); -@@ -3214,8 +3223,6 @@ mt7530_phylink_mac_link_state(struct dsa +@@ -3241,8 +3250,6 @@ mt7530_phylink_mac_link_state(struct dsa state->pause |= MLO_PAUSE_RX; if (pmsr & PMSR_TX_FC) state->pause |= MLO_PAUSE_TX; @@ -187,7 +187,7 @@ Signed-off-by: Paolo Abeni } static int -@@ -3257,32 +3264,49 @@ mt7531_sgmii_pcs_get_state_an(struct mt7 +@@ -3284,32 +3291,49 @@ mt7531_sgmii_pcs_get_state_an(struct mt7 return 0; } @@ -249,7 +249,7 @@ Signed-off-by: Paolo Abeni if (ret) return ret; -@@ -3295,6 +3319,13 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3322,6 +3346,13 @@ mt753x_setup(struct dsa_switch *ds) if (ret && priv->irq) mt7530_free_irq_common(priv); @@ -263,7 +263,7 @@ Signed-off-by: Paolo Abeni return ret; } -@@ -3356,9 +3387,8 @@ static const struct dsa_switch_ops mt753 +@@ -3384,9 +3415,8 @@ static const struct dsa_switch_ops mt753 .port_mirror_del = mt753x_port_mirror_del, .phylink_get_caps = mt753x_phylink_get_caps, .phylink_validate = mt753x_phylink_validate, @@ -274,7 +274,7 @@ Signed-off-by: Paolo Abeni .phylink_mac_link_down = mt753x_phylink_mac_link_down, .phylink_mac_link_up = mt753x_phylink_mac_link_up, .get_mac_eee = mt753x_get_mac_eee, -@@ -3368,36 +3398,34 @@ static const struct dsa_switch_ops mt753 +@@ -3396,36 +3426,34 @@ static const struct dsa_switch_ops mt753 static const struct mt753x_info mt753x_table[] = { [ID_MT7621] = { .id = ID_MT7621, @@ -314,7 +314,7 @@ Signed-off-by: Paolo Abeni }, }; -@@ -3455,7 +3483,7 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3483,7 +3511,7 @@ mt7530_probe(struct mdio_device *mdiodev if (!priv->info->sw_setup || !priv->info->pad_setup || !priv->info->phy_read || !priv->info->phy_write || !priv->info->mac_port_get_caps || @@ -325,7 +325,7 @@ Signed-off-by: Paolo Abeni priv->id = priv->info->id; --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -773,6 +773,12 @@ static const char *p5_intf_modes(unsigne +@@ -779,6 +779,12 @@ static const char *p5_intf_modes(unsigne struct mt7530_priv; @@ -338,7 +338,7 @@ Signed-off-by: Paolo Abeni /* struct mt753x_info - This is the main data structure for holding the specific * part for each supported device * @sw_setup: Holding the handler to a device initialization -@@ -784,18 +790,14 @@ struct mt7530_priv; +@@ -790,18 +796,14 @@ struct mt7530_priv; * port * @mac_port_validate: Holding the way to set addition validate type for a * certan MAC port @@ -359,7 +359,7 @@ Signed-off-by: Paolo Abeni int (*sw_setup)(struct dsa_switch *ds); int (*phy_read)(struct mt7530_priv *priv, int port, int regnum); int (*phy_write)(struct mt7530_priv *priv, int port, int regnum, u16 val); -@@ -806,15 +808,9 @@ struct mt753x_info { +@@ -812,15 +814,9 @@ struct mt753x_info { void (*mac_port_validate)(struct dsa_switch *ds, int port, phy_interface_t interface, unsigned long *supported); @@ -375,7 +375,7 @@ Signed-off-by: Paolo Abeni }; /* struct mt7530_priv - This is the main data structure for holding the state -@@ -856,6 +852,7 @@ struct mt7530_priv { +@@ -862,6 +858,7 @@ struct mt7530_priv { u8 mirror_tx; struct mt7530_port ports[MT7530_NUM_PORTS]; diff --git a/target/linux/generic/backport-5.15/705-08-v5.19-net-dsa-mt7530-move-autoneg-handling-to-PCS-validati.patch b/target/linux/generic/backport-5.15/705-08-v5.19-net-dsa-mt7530-move-autoneg-handling-to-PCS-validati.patch index 7731c16c9..6e406ace0 100644 --- a/target/linux/generic/backport-5.15/705-08-v5.19-net-dsa-mt7530-move-autoneg-handling-to-PCS-validati.patch +++ b/target/linux/generic/backport-5.15/705-08-v5.19-net-dsa-mt7530-move-autoneg-handling-to-PCS-validati.patch @@ -20,7 +20,7 @@ Signed-off-by: Paolo Abeni --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3169,25 +3169,16 @@ static void mt753x_phylink_get_caps(stru +@@ -3196,25 +3196,16 @@ static void mt753x_phylink_get_caps(stru priv->info->mac_port_get_caps(ds, port, config); } @@ -55,7 +55,7 @@ Signed-off-by: Paolo Abeni } static void mt7530_pcs_get_state(struct phylink_pcs *pcs, -@@ -3289,12 +3280,14 @@ static void mt7530_pcs_an_restart(struct +@@ -3316,12 +3307,14 @@ static void mt7530_pcs_an_restart(struct } static const struct phylink_pcs_ops mt7530_pcs_ops = { @@ -70,7 +70,7 @@ Signed-off-by: Paolo Abeni .pcs_get_state = mt7531_pcs_get_state, .pcs_config = mt753x_pcs_config, .pcs_an_restart = mt7531_pcs_an_restart, -@@ -3386,7 +3379,6 @@ static const struct dsa_switch_ops mt753 +@@ -3414,7 +3407,6 @@ static const struct dsa_switch_ops mt753 .port_mirror_add = mt753x_port_mirror_add, .port_mirror_del = mt753x_port_mirror_del, .phylink_get_caps = mt753x_phylink_get_caps, diff --git a/target/linux/generic/backport-5.15/705-09-v5.19-net-dsa-mt7530-mark-as-non-legacy.patch b/target/linux/generic/backport-5.15/705-09-v5.19-net-dsa-mt7530-mark-as-non-legacy.patch index bd35cb104..afcfcaba3 100644 --- a/target/linux/generic/backport-5.15/705-09-v5.19-net-dsa-mt7530-mark-as-non-legacy.patch +++ b/target/linux/generic/backport-5.15/705-09-v5.19-net-dsa-mt7530-mark-as-non-legacy.patch @@ -19,7 +19,7 @@ Signed-off-by: Paolo Abeni --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3166,6 +3166,12 @@ static void mt753x_phylink_get_caps(stru +@@ -3193,6 +3193,12 @@ static void mt753x_phylink_get_caps(stru config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD; diff --git a/target/linux/generic/backport-5.15/705-10-v5.19-net-dsa-mt753x-fix-pcs-conversion-regression.patch b/target/linux/generic/backport-5.15/705-10-v5.19-net-dsa-mt753x-fix-pcs-conversion-regression.patch index cff22b5ea..bf2938d03 100644 --- a/target/linux/generic/backport-5.15/705-10-v5.19-net-dsa-mt753x-fix-pcs-conversion-regression.patch +++ b/target/linux/generic/backport-5.15/705-10-v5.19-net-dsa-mt753x-fix-pcs-conversion-regression.patch @@ -81,7 +81,7 @@ Signed-off-by: Jakub Kicinski --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3304,9 +3304,16 @@ static int +@@ -3331,9 +3331,16 @@ static int mt753x_setup(struct dsa_switch *ds) { struct mt7530_priv *priv = ds->priv; @@ -100,7 +100,7 @@ Signed-off-by: Jakub Kicinski if (ret) return ret; -@@ -3318,13 +3325,6 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3345,13 +3352,6 @@ mt753x_setup(struct dsa_switch *ds) if (ret && priv->irq) mt7530_free_irq_common(priv); diff --git a/target/linux/generic/backport-5.15/705-11-v6.0-net-dsa-mt7530-rework-mt7530_hw_vlan_-add-del.patch b/target/linux/generic/backport-5.15/705-11-v6.0-net-dsa-mt7530-rework-mt7530_hw_vlan_-add-del.patch index c9f830381..320b5c1ef 100644 --- a/target/linux/generic/backport-5.15/705-11-v6.0-net-dsa-mt7530-rework-mt7530_hw_vlan_-add-del.patch +++ b/target/linux/generic/backport-5.15/705-11-v6.0-net-dsa-mt7530-rework-mt7530_hw_vlan_-add-del.patch @@ -26,7 +26,7 @@ Signed-off-by: Jakub Kicinski --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -1750,11 +1750,11 @@ static void +@@ -1771,11 +1771,11 @@ static void mt7530_hw_vlan_add(struct mt7530_priv *priv, struct mt7530_hw_vlan_entry *entry) { @@ -40,7 +40,7 @@ Signed-off-by: Jakub Kicinski /* Validate the entry with independent learning, create egress tag per * VLAN and joining the port as one of the port members. -@@ -1765,22 +1765,20 @@ mt7530_hw_vlan_add(struct mt7530_priv *p +@@ -1786,22 +1786,20 @@ mt7530_hw_vlan_add(struct mt7530_priv *p /* Decide whether adding tag or not for those outgoing packets from the * port inside the VLAN. @@ -72,7 +72,7 @@ Signed-off-by: Jakub Kicinski } static void -@@ -1799,11 +1797,7 @@ mt7530_hw_vlan_del(struct mt7530_priv *p +@@ -1820,11 +1818,7 @@ mt7530_hw_vlan_del(struct mt7530_priv *p return; } diff --git a/target/linux/generic/backport-5.15/705-13-v6.0-net-dsa-mt7530-get-cpu-port-via-dp-cpu_dp-instead-of.patch b/target/linux/generic/backport-5.15/705-13-v6.0-net-dsa-mt7530-get-cpu-port-via-dp-cpu_dp-instead-of.patch index bb36302f2..eef19b4cb 100644 --- a/target/linux/generic/backport-5.15/705-13-v6.0-net-dsa-mt7530-get-cpu-port-via-dp-cpu_dp-instead-of.patch +++ b/target/linux/generic/backport-5.15/705-13-v6.0-net-dsa-mt7530-get-cpu-port-via-dp-cpu_dp-instead-of.patch @@ -21,7 +21,7 @@ Signed-off-by: Jakub Kicinski --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -1254,6 +1254,7 @@ static int +@@ -1275,6 +1275,7 @@ static int mt7530_port_enable(struct dsa_switch *ds, int port, struct phy_device *phy) { @@ -29,7 +29,7 @@ Signed-off-by: Jakub Kicinski struct mt7530_priv *priv = ds->priv; mutex_lock(&priv->reg_mutex); -@@ -1262,7 +1263,11 @@ mt7530_port_enable(struct dsa_switch *ds +@@ -1283,7 +1284,11 @@ mt7530_port_enable(struct dsa_switch *ds * restore the port matrix if the port is the member of a certain * bridge. */ @@ -42,7 +42,7 @@ Signed-off-by: Jakub Kicinski priv->ports[port].enable = true; mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, priv->ports[port].pm); -@@ -1410,7 +1415,8 @@ mt7530_port_bridge_join(struct dsa_switc +@@ -1431,7 +1436,8 @@ mt7530_port_bridge_join(struct dsa_switc struct net_device *bridge) { struct dsa_port *dp = dsa_to_port(ds, port), *other_dp; @@ -52,7 +52,7 @@ Signed-off-by: Jakub Kicinski struct mt7530_priv *priv = ds->priv; mutex_lock(&priv->reg_mutex); -@@ -1487,9 +1493,12 @@ mt7530_port_set_vlan_unaware(struct dsa_ +@@ -1508,9 +1514,12 @@ mt7530_port_set_vlan_unaware(struct dsa_ * the CPU port get out of VLAN filtering mode. */ if (all_user_ports_removed) { @@ -67,7 +67,7 @@ Signed-off-by: Jakub Kicinski | PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT)); } } -@@ -1539,6 +1548,7 @@ mt7530_port_bridge_leave(struct dsa_swit +@@ -1560,6 +1569,7 @@ mt7530_port_bridge_leave(struct dsa_swit struct net_device *bridge) { struct dsa_port *dp = dsa_to_port(ds, port), *other_dp; @@ -75,7 +75,7 @@ Signed-off-by: Jakub Kicinski struct mt7530_priv *priv = ds->priv; mutex_lock(&priv->reg_mutex); -@@ -1567,8 +1577,8 @@ mt7530_port_bridge_leave(struct dsa_swit +@@ -1588,8 +1598,8 @@ mt7530_port_bridge_leave(struct dsa_swit */ if (priv->ports[port].enable) mt7530_rmw(priv, MT7530_PCR_P(port), PCR_MATRIX_MASK, @@ -86,7 +86,7 @@ Signed-off-by: Jakub Kicinski /* When a port is removed from the bridge, the port would be set up * back to the default as is at initial boot which is a VLAN-unaware -@@ -1731,6 +1741,9 @@ static int +@@ -1752,6 +1762,9 @@ static int mt7530_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering, struct netlink_ext_ack *extack) { @@ -96,7 +96,7 @@ Signed-off-by: Jakub Kicinski if (vlan_filtering) { /* The port is being kept as VLAN-unaware port when bridge is * set up with vlan_filtering not being set, Otherwise, the -@@ -1738,7 +1751,7 @@ mt7530_port_vlan_filtering(struct dsa_sw +@@ -1759,7 +1772,7 @@ mt7530_port_vlan_filtering(struct dsa_sw * for becoming a VLAN-aware port. */ mt7530_port_set_vlan_aware(ds, port); diff --git a/target/linux/generic/backport-5.15/728-v6.1-04-net-ethernet-mtk_eth_soc-fix-resource-leak-in-error-.patch b/target/linux/generic/backport-5.15/728-v6.1-04-net-ethernet-mtk_eth_soc-fix-resource-leak-in-error-.patch new file mode 100644 index 000000000..e2a204644 --- /dev/null +++ b/target/linux/generic/backport-5.15/728-v6.1-04-net-ethernet-mtk_eth_soc-fix-resource-leak-in-error-.patch @@ -0,0 +1,35 @@ +From 8110437e59616293228cd781c486d8495a61e36a Mon Sep 17 00:00:00 2001 +From: Yan Cangang +Date: Sun, 20 Nov 2022 13:52:58 +0800 +Subject: [PATCH] net: ethernet: mtk_eth_soc: fix resource leak in error path + +In mtk_probe(), when mtk_ppe_init() or mtk_eth_offload_init() failed, +mtk_mdio_cleanup() isn't called. Fix it. + +Fixes: ba37b7caf1ed ("net: ethernet: mtk_eth_soc: add support for initializing the PPE") +Fixes: 502e84e2382d ("net: ethernet: mtk_eth_soc: add flow offloading support") +Signed-off-by: Yan Cangang +Reviewed-by: Leon Romanovsky +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -4089,13 +4089,13 @@ static int mtk_probe(struct platform_dev + eth->soc->offload_version, i); + if (!eth->ppe[i]) { + err = -ENOMEM; +- goto err_free_dev; ++ goto err_deinit_mdio; + } + } + + err = mtk_eth_offload_init(eth); + if (err) +- goto err_free_dev; ++ goto err_deinit_mdio; + } + + for (i = 0; i < MTK_MAX_DEVS; i++) { diff --git a/target/linux/generic/backport-5.15/728-v6.1-05-net-ethernet-mtk_eth_soc-fix-memory-leak-in-error-pa.patch b/target/linux/generic/backport-5.15/728-v6.1-05-net-ethernet-mtk_eth_soc-fix-memory-leak-in-error-pa.patch new file mode 100644 index 000000000..13f0ed5a5 --- /dev/null +++ b/target/linux/generic/backport-5.15/728-v6.1-05-net-ethernet-mtk_eth_soc-fix-memory-leak-in-error-pa.patch @@ -0,0 +1,107 @@ +From 603ea5e7ffa73c7fac07d8713d97285990695213 Mon Sep 17 00:00:00 2001 +From: Yan Cangang +Date: Sun, 20 Nov 2022 13:52:59 +0800 +Subject: [PATCH] net: ethernet: mtk_eth_soc: fix memory leak in error path + +In mtk_ppe_init(), when dmam_alloc_coherent() or devm_kzalloc() failed, +the rhashtable ppe->l2_flows isn't destroyed. Fix it. + +In mtk_probe(), when mtk_ppe_init() or mtk_eth_offload_init() or +register_netdev() failed, have the same problem. Fix it. + +Fixes: 33fc42de3327 ("net: ethernet: mtk_eth_soc: support creating mac address based offload entries") +Signed-off-by: Yan Cangang +Reviewed-by: Leon Romanovsky +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 9 +++++---- + drivers/net/ethernet/mediatek/mtk_ppe.c | 19 +++++++++++++++++-- + drivers/net/ethernet/mediatek/mtk_ppe.h | 1 + + 3 files changed, 23 insertions(+), 6 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -4089,13 +4089,13 @@ static int mtk_probe(struct platform_dev + eth->soc->offload_version, i); + if (!eth->ppe[i]) { + err = -ENOMEM; +- goto err_deinit_mdio; ++ goto err_deinit_ppe; + } + } + + err = mtk_eth_offload_init(eth); + if (err) +- goto err_deinit_mdio; ++ goto err_deinit_ppe; + } + + for (i = 0; i < MTK_MAX_DEVS; i++) { +@@ -4105,7 +4105,7 @@ static int mtk_probe(struct platform_dev + err = register_netdev(eth->netdev[i]); + if (err) { + dev_err(eth->dev, "error bringing up device\n"); +- goto err_deinit_mdio; ++ goto err_deinit_ppe; + } else + netif_info(eth, probe, eth->netdev[i], + "mediatek frame engine at 0x%08lx, irq %d\n", +@@ -4125,7 +4125,8 @@ static int mtk_probe(struct platform_dev + + return 0; + +-err_deinit_mdio: ++err_deinit_ppe: ++ mtk_ppe_deinit(eth); + mtk_mdio_cleanup(eth); + err_free_dev: + mtk_free_dev(eth); +--- a/drivers/net/ethernet/mediatek/mtk_ppe.c ++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c +@@ -743,7 +743,7 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_ + MTK_PPE_ENTRIES * soc->foe_entry_size, + &ppe->foe_phys, GFP_KERNEL); + if (!foe) +- return NULL; ++ goto err_free_l2_flows; + + ppe->foe_table = foe; + +@@ -751,11 +751,26 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_ + sizeof(*ppe->foe_flow); + ppe->foe_flow = devm_kzalloc(dev, foe_flow_size, GFP_KERNEL); + if (!ppe->foe_flow) +- return NULL; ++ goto err_free_l2_flows; + + mtk_ppe_debugfs_init(ppe, index); + + return ppe; ++ ++err_free_l2_flows: ++ rhashtable_destroy(&ppe->l2_flows); ++ return NULL; ++} ++ ++void mtk_ppe_deinit(struct mtk_eth *eth) ++{ ++ int i; ++ ++ for (i = 0; i < ARRAY_SIZE(eth->ppe); i++) { ++ if (!eth->ppe[i]) ++ return; ++ rhashtable_destroy(ð->ppe[i]->l2_flows); ++ } + } + + static void mtk_ppe_init_foe_table(struct mtk_ppe *ppe) +--- a/drivers/net/ethernet/mediatek/mtk_ppe.h ++++ b/drivers/net/ethernet/mediatek/mtk_ppe.h +@@ -304,6 +304,7 @@ struct mtk_ppe { + + struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base, + int version, int index); ++void mtk_ppe_deinit(struct mtk_eth *eth); + void mtk_ppe_start(struct mtk_ppe *ppe); + int mtk_ppe_stop(struct mtk_ppe *ppe); + diff --git a/target/linux/generic/backport-5.15/729-20-v6.3-net-ethernet-mtk_eth_soc-align-reset-procedure-to-ve.patch b/target/linux/generic/backport-5.15/729-20-v6.3-net-ethernet-mtk_eth_soc-align-reset-procedure-to-ve.patch index 5ab86bdd6..e75a4cc0d 100644 --- a/target/linux/generic/backport-5.15/729-20-v6.3-net-ethernet-mtk_eth_soc-align-reset-procedure-to-ve.patch +++ b/target/linux/generic/backport-5.15/729-20-v6.3-net-ethernet-mtk_eth_soc-align-reset-procedure-to-ve.patch @@ -237,8 +237,8 @@ Signed-off-by: Paolo Abeni { --- a/drivers/net/ethernet/mediatek/mtk_ppe.h +++ b/drivers/net/ethernet/mediatek/mtk_ppe.h -@@ -306,6 +306,7 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_ - int version, int index); +@@ -307,6 +307,7 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_ + void mtk_ppe_deinit(struct mtk_eth *eth); void mtk_ppe_start(struct mtk_ppe *ppe); int mtk_ppe_stop(struct mtk_ppe *ppe); +int mtk_ppe_prepare_reset(struct mtk_ppe *ppe); diff --git a/target/linux/generic/backport-5.15/730-03-v6.3-net-ethernet-mtk_eth_soc-avoid-port_mg-assignment-on.patch b/target/linux/generic/backport-5.15/730-03-v6.3-net-ethernet-mtk_eth_soc-avoid-port_mg-assignment-on.patch index 51e23f22e..34aa7b14c 100644 --- a/target/linux/generic/backport-5.15/730-03-v6.3-net-ethernet-mtk_eth_soc-avoid-port_mg-assignment-on.patch +++ b/target/linux/generic/backport-5.15/730-03-v6.3-net-ethernet-mtk_eth_soc-avoid-port_mg-assignment-on.patch @@ -12,7 +12,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -4423,7 +4423,7 @@ static const struct mtk_soc_data mt7621_ +@@ -4424,7 +4424,7 @@ static const struct mtk_soc_data mt7621_ .hw_features = MTK_HW_FEATURES, .required_clks = MT7621_CLKS_BITMAP, .required_pctl = false, @@ -21,7 +21,7 @@ Signed-off-by: Felix Fietkau .hash_offset = 2, .foe_entry_size = sizeof(struct mtk_foe_entry) - 16, .txrx = { -@@ -4462,7 +4462,7 @@ static const struct mtk_soc_data mt7623_ +@@ -4463,7 +4463,7 @@ static const struct mtk_soc_data mt7623_ .hw_features = MTK_HW_FEATURES, .required_clks = MT7623_CLKS_BITMAP, .required_pctl = true, diff --git a/target/linux/generic/backport-5.15/730-06-v6.3-net-ethernet-mediatek-ppe-assign-per-port-queues-for.patch b/target/linux/generic/backport-5.15/730-06-v6.3-net-ethernet-mediatek-ppe-assign-per-port-queues-for.patch index 8935eb673..e05042c20 100644 --- a/target/linux/generic/backport-5.15/730-06-v6.3-net-ethernet-mediatek-ppe-assign-per-port-queues-for.patch +++ b/target/linux/generic/backport-5.15/730-06-v6.3-net-ethernet-mediatek-ppe-assign-per-port-queues-for.patch @@ -47,7 +47,7 @@ Signed-off-by: Felix Fietkau #define MTK_FOE_IB2_DEST_PORT_V2 GENMASK(12, 9) #define MTK_FOE_IB2_MULTICAST_V2 BIT(13) #define MTK_FOE_IB2_WDMA_WINFO_V2 BIT(19) -@@ -351,6 +353,8 @@ int mtk_foe_entry_set_pppoe(struct mtk_e +@@ -352,6 +354,8 @@ int mtk_foe_entry_set_pppoe(struct mtk_e int sid); int mtk_foe_entry_set_wdma(struct mtk_eth *eth, struct mtk_foe_entry *entry, int wdma_idx, int txq, int bss, int wcid); diff --git a/target/linux/generic/backport-5.15/730-07-v6.3-net-ethernet-mtk_eth_soc-compile-out-netsys-v2-code-.patch b/target/linux/generic/backport-5.15/730-07-v6.3-net-ethernet-mtk_eth_soc-compile-out-netsys-v2-code-.patch deleted file mode 100644 index 44af9128b..000000000 --- a/target/linux/generic/backport-5.15/730-07-v6.3-net-ethernet-mtk_eth_soc-compile-out-netsys-v2-code-.patch +++ /dev/null @@ -1,28 +0,0 @@ -From: Felix Fietkau -Date: Thu, 27 Oct 2022 23:39:52 +0200 -Subject: [PATCH] net: ethernet: mtk_eth_soc: compile out netsys v2 code - on mt7621 - -Avoid some branches in the hot path on low-end devices with limited CPU power, -and reduce code size - -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -917,7 +917,13 @@ enum mkt_eth_capabilities { - #define MTK_MUX_GMAC12_TO_GEPHY_SGMII \ - (MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII | MTK_MUX) - --#define MTK_HAS_CAPS(caps, _x) (((caps) & (_x)) == (_x)) -+#ifdef CONFIG_SOC_MT7621 -+#define MTK_CAP_MASK MTK_NETSYS_V2 -+#else -+#define MTK_CAP_MASK 0 -+#endif -+ -+#define MTK_HAS_CAPS(caps, _x) (((caps) & (_x) & ~(MTK_CAP_MASK)) == (_x)) - - #define MT7621_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | \ - MTK_GMAC2_RGMII | MTK_SHARED_INT | \ diff --git a/target/linux/generic/backport-5.15/730-09-v6.3-net-ethernet-mtk_eth_soc-fix-VLAN-rx-hardware-accele.patch b/target/linux/generic/backport-5.15/730-09-v6.3-net-ethernet-mtk_eth_soc-fix-VLAN-rx-hardware-accele.patch index e060d1d1a..b64f43436 100644 --- a/target/linux/generic/backport-5.15/730-09-v6.3-net-ethernet-mtk_eth_soc-fix-VLAN-rx-hardware-accele.patch +++ b/target/linux/generic/backport-5.15/730-09-v6.3-net-ethernet-mtk_eth_soc-fix-VLAN-rx-hardware-accele.patch @@ -181,7 +181,7 @@ Signed-off-by: Felix Fietkau /* CDMP Ingress Control Register */ #define MTK_CDMP_IG_CTRL 0x400 #define MTK_CDMP_STAG_EN BIT(0) -@@ -1166,6 +1172,8 @@ struct mtk_eth { +@@ -1160,6 +1166,8 @@ struct mtk_eth { int ip_align; diff --git a/target/linux/generic/backport-5.15/733-v6.2-12-net-mediatek-sgmii-ensure-the-SGMII-PHY-is-powered-d.patch b/target/linux/generic/backport-5.15/733-v6.2-12-net-mediatek-sgmii-ensure-the-SGMII-PHY-is-powered-d.patch index 8d2991f45..598788d99 100644 --- a/target/linux/generic/backport-5.15/733-v6.2-12-net-mediatek-sgmii-ensure-the-SGMII-PHY-is-powered-d.patch +++ b/target/linux/generic/backport-5.15/733-v6.2-12-net-mediatek-sgmii-ensure-the-SGMII-PHY-is-powered-d.patch @@ -34,7 +34,7 @@ Signed-off-by: Jakub Kicinski --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -1070,11 +1070,13 @@ struct mtk_soc_data { +@@ -1064,11 +1064,13 @@ struct mtk_soc_data { * @regmap: The register map pointing at the range used to setup * SGMII modes * @ana_rgc3: The offset refers to register ANA_RGC3 related to regmap diff --git a/target/linux/generic/backport-5.15/733-v6.3-18-net-ethernet-mtk_eth_soc-add-support-for-MT7981.patch b/target/linux/generic/backport-5.15/733-v6.3-18-net-ethernet-mtk_eth_soc-add-support-for-MT7981.patch index fda2d71f4..20a928f09 100644 --- a/target/linux/generic/backport-5.15/733-v6.3-18-net-ethernet-mtk_eth_soc-add-support-for-MT7981.patch +++ b/target/linux/generic/backport-5.15/733-v6.3-18-net-ethernet-mtk_eth_soc-add-support-for-MT7981.patch @@ -34,7 +34,7 @@ mtk_eth_path_name(path), __func__, updated); --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -4750,6 +4750,26 @@ static const struct mtk_soc_data mt7629_ +@@ -4751,6 +4751,26 @@ static const struct mtk_soc_data mt7629_ }, }; @@ -61,7 +61,7 @@ static const struct mtk_soc_data mt7986_data = { .reg_map = &mt7986_reg_map, .ana_rgc3 = 0x128, -@@ -4792,6 +4812,7 @@ const struct of_device_id of_mtk_match[] +@@ -4793,6 +4813,7 @@ const struct of_device_id of_mtk_match[] { .compatible = "mediatek,mt7622-eth", .data = &mt7622_data}, { .compatible = "mediatek,mt7623-eth", .data = &mt7623_data}, { .compatible = "mediatek,mt7629-eth", .data = &mt7629_data}, @@ -128,7 +128,7 @@ #define MTK_ETH_MUX_GDM1_TO_GMAC1_ESW \ BIT(MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT) -@@ -963,6 +987,11 @@ enum mkt_eth_capabilities { +@@ -957,6 +981,11 @@ enum mkt_eth_capabilities { MTK_MUX_U3_GMAC2_TO_QPHY | \ MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA) @@ -140,7 +140,7 @@ #define MT7986_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \ MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ MTK_NETSYS_V2 | MTK_RSTCTRL_PPE1) -@@ -1076,12 +1105,14 @@ struct mtk_soc_data { +@@ -1070,12 +1099,14 @@ struct mtk_soc_data { * @ana_rgc3: The offset refers to register ANA_RGC3 related to regmap * @interface: Currently configured interface mode * @pcs: Phylink PCS structure diff --git a/target/linux/generic/backport-5.15/733-v6.3-20-net-ethernet-mtk_eth_soc-switch-to-external-PCS-driv.patch b/target/linux/generic/backport-5.15/733-v6.3-20-net-ethernet-mtk_eth_soc-switch-to-external-PCS-driv.patch index 8edfb7633..8f7620616 100644 --- a/target/linux/generic/backport-5.15/733-v6.3-20-net-ethernet-mtk_eth_soc-switch-to-external-PCS-driv.patch +++ b/target/linux/generic/backport-5.15/733-v6.3-20-net-ethernet-mtk_eth_soc-switch-to-external-PCS-driv.patch @@ -151,7 +151,7 @@ Signed-off-by: Jakub Kicinski } if (eth->soc->offload_version) { -@@ -4650,6 +4687,8 @@ err_deinit_hw: +@@ -4651,6 +4688,8 @@ err_deinit_hw: mtk_hw_deinit(eth); err_wed_exit: mtk_wed_exit(); @@ -228,7 +228,7 @@ Signed-off-by: Jakub Kicinski /* Infrasys subsystem config registers */ #define INFRA_MISC2 0x70c #define CO_QPHY_SEL BIT(0) -@@ -1105,31 +1046,6 @@ struct mtk_soc_data { +@@ -1099,31 +1040,6 @@ struct mtk_soc_data { /* currently no SoC has more than 2 macs */ #define MTK_MAX_DEVS 2 @@ -260,7 +260,7 @@ Signed-off-by: Jakub Kicinski /* struct mtk_eth - This is the main datasructure for holding the state * of the driver * @dev: The device pointer -@@ -1149,6 +1065,7 @@ struct mtk_sgmii { +@@ -1143,6 +1059,7 @@ struct mtk_sgmii { * MII modes * @infra: The register map pointing at the range used to setup * SGMII and GePHY path @@ -268,7 +268,7 @@ Signed-off-by: Jakub Kicinski * @pctl: The register map pointing at the range used to setup * GMAC port drive/slew values * @dma_refcnt: track how many netdevs are using the DMA engine -@@ -1189,8 +1106,8 @@ struct mtk_eth { +@@ -1183,8 +1100,8 @@ struct mtk_eth { u32 msg_enable; unsigned long sysclk; struct regmap *ethsys; @@ -279,7 +279,7 @@ Signed-off-by: Jakub Kicinski struct regmap *pctl; bool hwlro; refcount_t dma_refcnt; -@@ -1352,10 +1269,6 @@ void mtk_stats_update_mac(struct mtk_mac +@@ -1346,10 +1263,6 @@ void mtk_stats_update_mac(struct mtk_mac void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg); u32 mtk_r32(struct mtk_eth *eth, unsigned reg); diff --git a/target/linux/generic/pending-5.15/736-05-net-ethernet-mtk_eth_soc-add-missing-ppe-cache-flush.patch b/target/linux/generic/backport-5.15/733-v6.3-21-net-ethernet-mtk_eth_soc-add-missing-ppe-cache-flush.patch similarity index 90% rename from target/linux/generic/pending-5.15/736-05-net-ethernet-mtk_eth_soc-add-missing-ppe-cache-flush.patch rename to target/linux/generic/backport-5.15/733-v6.3-21-net-ethernet-mtk_eth_soc-add-missing-ppe-cache-flush.patch index 30839319c..7742b0925 100644 --- a/target/linux/generic/pending-5.15/736-05-net-ethernet-mtk_eth_soc-add-missing-ppe-cache-flush.patch +++ b/target/linux/generic/backport-5.15/733-v6.3-21-net-ethernet-mtk_eth_soc-add-missing-ppe-cache-flush.patch @@ -11,7 +11,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_ppe.c +++ b/drivers/net/ethernet/mediatek/mtk_ppe.c -@@ -523,6 +523,7 @@ __mtk_foe_entry_clear(struct mtk_ppe *pp +@@ -464,6 +464,7 @@ __mtk_foe_entry_clear(struct mtk_ppe *pp hwe->ib1 &= ~MTK_FOE_IB1_STATE; hwe->ib1 |= FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_INVALID); dma_wmb(); diff --git a/target/linux/generic/backport-5.15/733-v6.4-21-net-mtk_eth_soc-use-WO-firmware-for-MT7981.patch b/target/linux/generic/backport-5.15/733-v6.4-22-net-mtk_eth_soc-use-WO-firmware-for-MT7981.patch similarity index 100% rename from target/linux/generic/backport-5.15/733-v6.4-21-net-mtk_eth_soc-use-WO-firmware-for-MT7981.patch rename to target/linux/generic/backport-5.15/733-v6.4-22-net-mtk_eth_soc-use-WO-firmware-for-MT7981.patch diff --git a/target/linux/generic/backport-5.15/733-v6.4-22-net-ethernet-mtk_eth_soc-fix-NULL-pointer-dereferenc.patch b/target/linux/generic/backport-5.15/733-v6.4-23-net-ethernet-mtk_eth_soc-fix-NULL-pointer-dereferenc.patch similarity index 100% rename from target/linux/generic/backport-5.15/733-v6.4-22-net-ethernet-mtk_eth_soc-fix-NULL-pointer-dereferenc.patch rename to target/linux/generic/backport-5.15/733-v6.4-23-net-ethernet-mtk_eth_soc-fix-NULL-pointer-dereferenc.patch diff --git a/target/linux/generic/pending-6.1/731-net-ethernet-mediatek-ppe-add-support-for-flow-accou.patch b/target/linux/generic/backport-5.15/733-v6.4-24-net-ethernet-mtk_eth_soc-ppe-add-support-for-flow-ac.patch similarity index 94% rename from target/linux/generic/pending-6.1/731-net-ethernet-mediatek-ppe-add-support-for-flow-accou.patch rename to target/linux/generic/backport-5.15/733-v6.4-24-net-ethernet-mtk_eth_soc-ppe-add-support-for-flow-ac.patch index c830034c4..e4022ffbd 100644 --- a/target/linux/generic/pending-6.1/731-net-ethernet-mediatek-ppe-add-support-for-flow-accou.patch +++ b/target/linux/generic/backport-5.15/733-v6.4-24-net-ethernet-mtk_eth_soc-ppe-add-support-for-flow-ac.patch @@ -53,7 +53,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -4691,8 +4691,8 @@ static int mtk_probe(struct platform_dev +@@ -4637,8 +4637,8 @@ static int mtk_probe(struct platform_dev for (i = 0; i < num_ppe; i++) { u32 ppe_addr = eth->soc->reg_map->ppe_base + i * 0x400; @@ -64,7 +64,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov if (!eth->ppe[i]) { err = -ENOMEM; goto err_deinit_ppe; -@@ -4818,6 +4818,7 @@ static const struct mtk_soc_data mt7622_ +@@ -4764,6 +4764,7 @@ static const struct mtk_soc_data mt7622_ .required_pctl = false, .offload_version = 2, .hash_offset = 2, @@ -72,7 +72,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov .foe_entry_size = sizeof(struct mtk_foe_entry) - 16, .txrx = { .txd_size = sizeof(struct mtk_tx_dma), -@@ -4855,6 +4856,7 @@ static const struct mtk_soc_data mt7629_ +@@ -4801,6 +4802,7 @@ static const struct mtk_soc_data mt7629_ .hw_features = MTK_HW_FEATURES, .required_clks = MT7629_CLKS_BITMAP, .required_pctl = false, @@ -80,7 +80,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov .txrx = { .txd_size = sizeof(struct mtk_tx_dma), .rxd_size = sizeof(struct mtk_rx_dma), -@@ -4875,6 +4877,7 @@ static const struct mtk_soc_data mt7981_ +@@ -4821,6 +4823,7 @@ static const struct mtk_soc_data mt7981_ .offload_version = 2, .hash_offset = 4, .foe_entry_size = sizeof(struct mtk_foe_entry), @@ -88,7 +88,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov .txrx = { .txd_size = sizeof(struct mtk_tx_dma_v2), .rxd_size = sizeof(struct mtk_rx_dma_v2), -@@ -4895,6 +4898,7 @@ static const struct mtk_soc_data mt7986_ +@@ -4841,6 +4844,7 @@ static const struct mtk_soc_data mt7986_ .offload_version = 2, .hash_offset = 4, .foe_entry_size = sizeof(struct mtk_foe_entry), @@ -98,7 +98,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov .rxd_size = sizeof(struct mtk_rx_dma_v2), --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -1017,6 +1017,8 @@ struct mtk_reg_map { +@@ -1008,6 +1008,8 @@ struct mtk_reg_map { * the extra setup for those pins used by GMAC. * @hash_offset Flow table hash offset. * @foe_entry_size Foe table entry size. @@ -107,7 +107,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov * @txd_size Tx DMA descriptor size. * @rxd_size Rx DMA descriptor size. * @rx_irq_done_mask Rx irq done register mask. -@@ -1034,6 +1036,7 @@ struct mtk_soc_data { +@@ -1025,6 +1027,7 @@ struct mtk_soc_data { u8 hash_offset; u16 foe_entry_size; netdev_features_t hw_features; @@ -166,7 +166,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov static void mtk_ppe_cache_clear(struct mtk_ppe *ppe) { ppe_set(ppe, MTK_PPE_CACHE_CTL, MTK_PPE_CACHE_CTL_CLEAR); -@@ -459,6 +501,13 @@ __mtk_foe_entry_clear(struct mtk_ppe *pp +@@ -465,6 +507,13 @@ __mtk_foe_entry_clear(struct mtk_ppe *pp hwe->ib1 |= FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_INVALID); dma_wmb(); mtk_ppe_cache_clear(ppe); @@ -180,7 +180,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov } entry->hash = 0xffff; -@@ -566,6 +615,9 @@ __mtk_foe_entry_commit(struct mtk_ppe *p +@@ -572,6 +621,9 @@ __mtk_foe_entry_commit(struct mtk_ppe *p wmb(); hwe->ib1 = entry->ib1; @@ -190,7 +190,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov dma_wmb(); mtk_ppe_cache_clear(ppe); -@@ -757,11 +809,39 @@ int mtk_ppe_prepare_reset(struct mtk_ppe +@@ -763,11 +815,39 @@ int mtk_ppe_prepare_reset(struct mtk_ppe return mtk_ppe_wait_busy(ppe); } @@ -232,7 +232,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov struct mtk_ppe *ppe; u32 foe_flow_size; void *foe; -@@ -778,7 +858,8 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_ +@@ -784,7 +864,8 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_ ppe->base = base; ppe->eth = eth; ppe->dev = dev; @@ -242,7 +242,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov foe = dmam_alloc_coherent(ppe->dev, MTK_PPE_ENTRIES * soc->foe_entry_size, -@@ -794,6 +875,23 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_ +@@ -800,6 +881,23 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_ if (!ppe->foe_flow) goto err_free_l2_flows; @@ -266,7 +266,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov mtk_ppe_debugfs_init(ppe, index); return ppe; -@@ -923,6 +1021,16 @@ void mtk_ppe_start(struct mtk_ppe *ppe) +@@ -929,6 +1027,16 @@ void mtk_ppe_start(struct mtk_ppe *ppe) ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT1, 0xcb777); ppe_w32(ppe, MTK_PPE_SBW_CTRL, 0x7f); } diff --git a/target/linux/generic/pending-5.15/736-06-net-ethernet-mediatek-fix-ppe-flow-accounting-for-v1.patch b/target/linux/generic/backport-5.15/733-v6.4-25-net-ethernet-mediatek-fix-ppe-flow-accounting-for-v1.patch similarity index 92% rename from target/linux/generic/pending-5.15/736-06-net-ethernet-mediatek-fix-ppe-flow-accounting-for-v1.patch rename to target/linux/generic/backport-5.15/733-v6.4-25-net-ethernet-mediatek-fix-ppe-flow-accounting-for-v1.patch index 3dfa193e7..3a02c3a71 100644 --- a/target/linux/generic/pending-5.15/736-06-net-ethernet-mediatek-fix-ppe-flow-accounting-for-v1.patch +++ b/target/linux/generic/backport-5.15/733-v6.4-25-net-ethernet-mediatek-fix-ppe-flow-accounting-for-v1.patch @@ -11,7 +11,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_ppe.c +++ b/drivers/net/ethernet/mediatek/mtk_ppe.c -@@ -646,6 +646,7 @@ __mtk_foe_entry_commit(struct mtk_ppe *p +@@ -605,6 +605,7 @@ __mtk_foe_entry_commit(struct mtk_ppe *p struct mtk_eth *eth = ppe->eth; u16 timestamp = mtk_eth_timestamp(eth); struct mtk_foe_entry *hwe; @@ -19,7 +19,7 @@ Signed-off-by: Felix Fietkau if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { entry->ib1 &= ~MTK_FOE_IB1_BIND_TIMESTAMP_V2; -@@ -662,8 +663,13 @@ __mtk_foe_entry_commit(struct mtk_ppe *p +@@ -621,8 +622,13 @@ __mtk_foe_entry_commit(struct mtk_ppe *p wmb(); hwe->ib1 = entry->ib1; diff --git a/target/linux/generic/pending-5.15/732-00-net-ethernet-mtk_eth_soc-drop-generic-vlan-rx-offloa.patch b/target/linux/generic/backport-5.15/733-v6.4-26-net-ethernet-mtk_eth_soc-drop-generic-vlan-rx-offloa.patch similarity index 100% rename from target/linux/generic/pending-5.15/732-00-net-ethernet-mtk_eth_soc-drop-generic-vlan-rx-offloa.patch rename to target/linux/generic/backport-5.15/733-v6.4-26-net-ethernet-mtk_eth_soc-drop-generic-vlan-rx-offloa.patch diff --git a/target/linux/generic/backport-5.15/733-v6.5-27-net-ethernet-mtk_eth_soc-always-mtk_get_ib1_pkt_type.patch b/target/linux/generic/backport-5.15/733-v6.5-27-net-ethernet-mtk_eth_soc-always-mtk_get_ib1_pkt_type.patch new file mode 100644 index 000000000..2704faec1 --- /dev/null +++ b/target/linux/generic/backport-5.15/733-v6.5-27-net-ethernet-mtk_eth_soc-always-mtk_get_ib1_pkt_type.patch @@ -0,0 +1,31 @@ +From b804f765485109f9644cc05d1e8fc79ca6c6e4aa Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Wed, 19 Jul 2023 01:39:36 +0100 +Subject: [PATCH 094/250] net: ethernet: mtk_eth_soc: always + mtk_get_ib1_pkt_type + +entries and bind debugfs files would display wrong data on NETSYS_V2 and +later because instead of using mtk_get_ib1_pkt_type the driver would use +MTK_FOE_IB1_PACKET_TYPE which corresponds to NETSYS_V1(.x) SoCs. +Use mtk_get_ib1_pkt_type so entries and bind records display correctly. + +Fixes: 03a3180e5c09e ("net: ethernet: mtk_eth_soc: introduce flow offloading support for mt7986") +Signed-off-by: Daniel Golle +Acked-by: Lorenzo Bianconi +Link: https://lore.kernel.org/r/c0ae03d0182f4d27b874cbdf0059bc972c317f3c.1689727134.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c ++++ b/drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c +@@ -98,7 +98,7 @@ mtk_ppe_debugfs_foe_show(struct seq_file + + acct = mtk_foe_entry_get_mib(ppe, i, NULL); + +- type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1); ++ type = mtk_get_ib1_pkt_type(ppe->eth, entry->ib1); + seq_printf(m, "%05x %s %7s", i, + mtk_foe_entry_state_str(state), + mtk_foe_pkt_type_str(type)); diff --git a/target/linux/generic/backport-5.15/741-v6.9-01-netfilter-flowtable-validate-pppoe-header.patch b/target/linux/generic/backport-5.15/741-v6.9-01-netfilter-flowtable-validate-pppoe-header.patch deleted file mode 100644 index 02407da8a..000000000 --- a/target/linux/generic/backport-5.15/741-v6.9-01-netfilter-flowtable-validate-pppoe-header.patch +++ /dev/null @@ -1,85 +0,0 @@ -From: Pablo Neira Ayuso -Date: Thu, 11 Apr 2024 13:28:59 +0200 -Subject: [PATCH] netfilter: flowtable: validate pppoe header - -Ensure there is sufficient room to access the protocol field of the -PPPoe header. Validate it once before the flowtable lookup, then use a -helper function to access protocol field. - -Reported-by: syzbot+b6f07e1c07ef40199081@syzkaller.appspotmail.com -Fixes: 72efd585f714 ("netfilter: flowtable: add pppoe support") -Signed-off-by: Pablo Neira Ayuso ---- - ---- a/include/net/netfilter/nf_flow_table.h -+++ b/include/net/netfilter/nf_flow_table.h -@@ -318,7 +318,7 @@ int nf_flow_rule_route_ipv6(struct net * - int nf_flow_table_offload_init(void); - void nf_flow_table_offload_exit(void); - --static inline __be16 nf_flow_pppoe_proto(const struct sk_buff *skb) -+static inline __be16 __nf_flow_pppoe_proto(const struct sk_buff *skb) - { - __be16 proto; - -@@ -334,4 +334,14 @@ static inline __be16 nf_flow_pppoe_proto - return 0; - } - -+static inline bool nf_flow_pppoe_proto(struct sk_buff *skb, __be16 *inner_proto) -+{ -+ if (!pskb_may_pull(skb, PPPOE_SES_HLEN)) -+ return false; -+ -+ *inner_proto = __nf_flow_pppoe_proto(skb); -+ -+ return true; -+} -+ - #endif /* _NF_FLOW_TABLE_H */ ---- a/net/netfilter/nf_flow_table_inet.c -+++ b/net/netfilter/nf_flow_table_inet.c -@@ -21,7 +21,8 @@ nf_flow_offload_inet_hook(void *priv, st - proto = veth->h_vlan_encapsulated_proto; - break; - case htons(ETH_P_PPP_SES): -- proto = nf_flow_pppoe_proto(skb); -+ if (!nf_flow_pppoe_proto(skb, &proto)) -+ return NF_ACCEPT; - break; - default: - proto = skb->protocol; ---- a/net/netfilter/nf_flow_table_ip.c -+++ b/net/netfilter/nf_flow_table_ip.c -@@ -246,10 +246,11 @@ static unsigned int nf_flow_xmit_xfrm(st - return NF_STOLEN; - } - --static bool nf_flow_skb_encap_protocol(const struct sk_buff *skb, __be16 proto, -+static bool nf_flow_skb_encap_protocol(struct sk_buff *skb, __be16 proto, - u32 *offset) - { - struct vlan_ethhdr *veth; -+ __be16 inner_proto; - - switch (skb->protocol) { - case htons(ETH_P_8021Q): -@@ -260,7 +261,8 @@ static bool nf_flow_skb_encap_protocol(c - } - break; - case htons(ETH_P_PPP_SES): -- if (nf_flow_pppoe_proto(skb) == proto) { -+ if (nf_flow_pppoe_proto(skb, &inner_proto) && -+ inner_proto == proto) { - *offset += PPPOE_SES_HLEN; - return true; - } -@@ -289,7 +291,7 @@ static void nf_flow_encap_pop(struct sk_ - skb_reset_network_header(skb); - break; - case htons(ETH_P_PPP_SES): -- skb->protocol = nf_flow_pppoe_proto(skb); -+ skb->protocol = __nf_flow_pppoe_proto(skb); - skb_pull(skb, PPPOE_SES_HLEN); - skb_reset_network_header(skb); - break; diff --git a/target/linux/generic/backport-5.15/741-v6.9-02-netfilter-flowtable-incorrect-pppoe-tuple.patch b/target/linux/generic/backport-5.15/741-v6.9-02-netfilter-flowtable-incorrect-pppoe-tuple.patch deleted file mode 100644 index 3b822b169..000000000 --- a/target/linux/generic/backport-5.15/741-v6.9-02-netfilter-flowtable-incorrect-pppoe-tuple.patch +++ /dev/null @@ -1,24 +0,0 @@ -From: Pablo Neira Ayuso -Date: Thu, 11 Apr 2024 13:29:00 +0200 -Subject: [PATCH] netfilter: flowtable: incorrect pppoe tuple - -pppoe traffic reaching ingress path does not match the flowtable entry -because the pppoe header is expected to be at the network header offset. -This bug causes a mismatch in the flow table lookup, so pppoe packets -enter the classical forwarding path. - -Fixes: 72efd585f714 ("netfilter: flowtable: add pppoe support") -Signed-off-by: Pablo Neira Ayuso ---- - ---- a/net/netfilter/nf_flow_table_ip.c -+++ b/net/netfilter/nf_flow_table_ip.c -@@ -156,7 +156,7 @@ static void nf_flow_tuple_encap(struct s - tuple->encap[i].proto = skb->protocol; - break; - case htons(ETH_P_PPP_SES): -- phdr = (struct pppoe_hdr *)skb_mac_header(skb); -+ phdr = (struct pppoe_hdr *)skb_network_header(skb); - tuple->encap[i].id = ntohs(phdr->sid); - tuple->encap[i].proto = skb->protocol; - break; diff --git a/target/linux/generic/backport-5.15/750-v6.5-01-net-ethernet-mtk_ppe-add-MTK_FOE_ENTRY_V-1-2-_SIZE-m.patch b/target/linux/generic/backport-5.15/750-v6.5-01-net-ethernet-mtk_ppe-add-MTK_FOE_ENTRY_V-1-2-_SIZE-m.patch new file mode 100644 index 000000000..25ac8db91 --- /dev/null +++ b/target/linux/generic/backport-5.15/750-v6.5-01-net-ethernet-mtk_ppe-add-MTK_FOE_ENTRY_V-1-2-_SIZE-m.patch @@ -0,0 +1,78 @@ +From 5ea0e1312bcfebc06b5f91d1bb82b823d6395125 Mon Sep 17 00:00:00 2001 +From: Lorenzo Bianconi +Date: Wed, 19 Jul 2023 12:29:49 +0200 +Subject: [PATCH 095/250] net: ethernet: mtk_ppe: add MTK_FOE_ENTRY_V{1,2}_SIZE + macros + +Introduce MTK_FOE_ENTRY_V{1,2}_SIZE macros in order to make more +explicit foe_entry size for different chipset revisions. + +Signed-off-by: Lorenzo Bianconi +Reviewed-by: Simon Horman +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 10 +++++----- + drivers/net/ethernet/mediatek/mtk_ppe.h | 3 +++ + 2 files changed, 8 insertions(+), 5 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -4713,7 +4713,7 @@ static const struct mtk_soc_data mt7621_ + .required_pctl = false, + .offload_version = 1, + .hash_offset = 2, +- .foe_entry_size = sizeof(struct mtk_foe_entry) - 16, ++ .foe_entry_size = MTK_FOE_ENTRY_V1_SIZE, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma), + .rxd_size = sizeof(struct mtk_rx_dma), +@@ -4734,7 +4734,7 @@ static const struct mtk_soc_data mt7622_ + .offload_version = 2, + .hash_offset = 2, + .has_accounting = true, +- .foe_entry_size = sizeof(struct mtk_foe_entry) - 16, ++ .foe_entry_size = MTK_FOE_ENTRY_V1_SIZE, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma), + .rxd_size = sizeof(struct mtk_rx_dma), +@@ -4753,7 +4753,7 @@ static const struct mtk_soc_data mt7623_ + .required_pctl = true, + .offload_version = 1, + .hash_offset = 2, +- .foe_entry_size = sizeof(struct mtk_foe_entry) - 16, ++ .foe_entry_size = MTK_FOE_ENTRY_V1_SIZE, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma), + .rxd_size = sizeof(struct mtk_rx_dma), +@@ -4791,8 +4791,8 @@ static const struct mtk_soc_data mt7981_ + .required_pctl = false, + .offload_version = 2, + .hash_offset = 4, +- .foe_entry_size = sizeof(struct mtk_foe_entry), + .has_accounting = true, ++ .foe_entry_size = MTK_FOE_ENTRY_V2_SIZE, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma_v2), + .rxd_size = sizeof(struct mtk_rx_dma_v2), +@@ -4812,8 +4812,8 @@ static const struct mtk_soc_data mt7986_ + .required_pctl = false, + .offload_version = 2, + .hash_offset = 4, +- .foe_entry_size = sizeof(struct mtk_foe_entry), + .has_accounting = true, ++ .foe_entry_size = MTK_FOE_ENTRY_V2_SIZE, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma_v2), + .rxd_size = sizeof(struct mtk_rx_dma_v2), +--- a/drivers/net/ethernet/mediatek/mtk_ppe.h ++++ b/drivers/net/ethernet/mediatek/mtk_ppe.h +@@ -216,6 +216,9 @@ struct mtk_foe_ipv6_6rd { + struct mtk_foe_mac_info l2; + }; + ++#define MTK_FOE_ENTRY_V1_SIZE 80 ++#define MTK_FOE_ENTRY_V2_SIZE 96 ++ + struct mtk_foe_entry { + u32 ib1; + diff --git a/target/linux/generic/backport-5.15/750-v6.5-02-net-ethernet-mtk_eth_soc-remove-incorrect-PLL-config.patch b/target/linux/generic/backport-5.15/750-v6.5-02-net-ethernet-mtk_eth_soc-remove-incorrect-PLL-config.patch new file mode 100644 index 000000000..97209958a --- /dev/null +++ b/target/linux/generic/backport-5.15/750-v6.5-02-net-ethernet-mtk_eth_soc-remove-incorrect-PLL-config.patch @@ -0,0 +1,141 @@ +From 8cfa2576d79f9379d167a8994f0fca935c07a8bc Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Sat, 22 Jul 2023 21:32:49 +0100 +Subject: [PATCH 096/250] net: ethernet: mtk_eth_soc: remove incorrect PLL + configuration + +MT7623 GMAC0 attempts to configure the system clocking according to the +required speed in the .mac_config callback for non-SGMII, non-baseX and +non-TRGMII modes. + +state->speed setting has never been reliable in the .mac_config +callback - there are cases where this is not the link speed, +particularly via ethtool paths, so this has always been unreliable (as +detailed in phylink's documentation.) + +There is the additional issue that mtk_gmac0_rgmii_adjust() will only +be called if state->interface changes, which means it only configures +the system clocking on the very first .mac_config call, which will be +made when the network device is first brought up before any link is +established. + +Essentially, this code is incredibly buggy, and probably never worked. + +Moreover, checking the in-kernel DT files, it seems no platform makes +use of this code path. + +Therefore, let's remove it, and disable interface modes for port 0 that +are not SGMII, 1000base-X, 2500base-X or TRGMII on the MT7623. + +Reviewed-by: Daniel Golle +Tested-by: Daniel Golle +Tested-by: Frank Wunderlich +Signed-off-by: Russell King (Oracle) +Signed-off-by: Paolo Abeni +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 54 ++++++--------------- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 + + 2 files changed, 17 insertions(+), 38 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -309,7 +309,7 @@ static int mt7621_gmac0_rgmii_adjust(str + } + + static void mtk_gmac0_rgmii_adjust(struct mtk_eth *eth, +- phy_interface_t interface, int speed) ++ phy_interface_t interface) + { + u32 val; + int ret; +@@ -323,26 +323,7 @@ static void mtk_gmac0_rgmii_adjust(struc + return; + } + +- val = (speed == SPEED_1000) ? +- INTF_MODE_RGMII_1000 : INTF_MODE_RGMII_10_100; +- mtk_w32(eth, val, INTF_MODE); +- +- regmap_update_bits(eth->ethsys, ETHSYS_CLKCFG0, +- ETHSYS_TRGMII_CLK_SEL362_5, +- ETHSYS_TRGMII_CLK_SEL362_5); +- +- val = (speed == SPEED_1000) ? 250000000 : 500000000; +- ret = clk_set_rate(eth->clks[MTK_CLK_TRGPLL], val); +- if (ret) +- dev_err(eth->dev, "Failed to set trgmii pll: %d\n", ret); +- +- val = (speed == SPEED_1000) ? +- RCK_CTRL_RGMII_1000 : RCK_CTRL_RGMII_10_100; +- mtk_w32(eth, val, TRGMII_RCK_CTRL); +- +- val = (speed == SPEED_1000) ? +- TCK_CTRL_RGMII_1000 : TCK_CTRL_RGMII_10_100; +- mtk_w32(eth, val, TRGMII_TCK_CTRL); ++ dev_err(eth->dev, "Missing PLL configuration, ethernet may not work\n"); + } + + static struct phylink_pcs *mtk_mac_select_pcs(struct phylink_config *config, +@@ -428,17 +409,8 @@ static void mtk_mac_config(struct phylin + state->interface)) + goto err_phy; + } else { +- /* FIXME: this is incorrect. Not only does it +- * use state->speed (which is not guaranteed +- * to be correct) but it also makes use of it +- * in a code path that will only be reachable +- * when the PHY interface mode changes, not +- * when the speed changes. Consequently, RGMII +- * is probably broken. +- */ + mtk_gmac0_rgmii_adjust(mac->hw, +- state->interface, +- state->speed); ++ state->interface); + + /* mt7623_pad_clk_setup */ + for (i = 0 ; i < NUM_TRGMII_CTRL; i++) +@@ -4288,13 +4260,19 @@ static int mtk_add_mac(struct mtk_eth *e + mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | + MAC_10 | MAC_100 | MAC_1000 | MAC_2500FD; + +- __set_bit(PHY_INTERFACE_MODE_MII, +- mac->phylink_config.supported_interfaces); +- __set_bit(PHY_INTERFACE_MODE_GMII, +- mac->phylink_config.supported_interfaces); ++ /* MT7623 gmac0 is now missing its speed-specific PLL configuration ++ * in its .mac_config method (since state->speed is not valid there. ++ * Disable support for MII, GMII and RGMII. ++ */ ++ if (!mac->hw->soc->disable_pll_modes || mac->id != 0) { ++ __set_bit(PHY_INTERFACE_MODE_MII, ++ mac->phylink_config.supported_interfaces); ++ __set_bit(PHY_INTERFACE_MODE_GMII, ++ mac->phylink_config.supported_interfaces); + +- if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_RGMII)) +- phy_interface_set_rgmii(mac->phylink_config.supported_interfaces); ++ if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_RGMII)) ++ phy_interface_set_rgmii(mac->phylink_config.supported_interfaces); ++ } + + if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_TRGMII) && !mac->id) + __set_bit(PHY_INTERFACE_MODE_TRGMII, +@@ -4754,6 +4732,7 @@ static const struct mtk_soc_data mt7623_ + .offload_version = 1, + .hash_offset = 2, + .foe_entry_size = MTK_FOE_ENTRY_V1_SIZE, ++ .disable_pll_modes = true, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma), + .rxd_size = sizeof(struct mtk_rx_dma), +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -1027,6 +1027,7 @@ struct mtk_soc_data { + u16 foe_entry_size; + netdev_features_t hw_features; + bool has_accounting; ++ bool disable_pll_modes; + struct { + u32 txd_size; + u32 rxd_size; diff --git a/target/linux/generic/backport-5.15/750-v6.5-03-net-ethernet-mtk_eth_soc-remove-mac_pcs_get_state-an.patch b/target/linux/generic/backport-5.15/750-v6.5-03-net-ethernet-mtk_eth_soc-remove-mac_pcs_get_state-an.patch new file mode 100644 index 000000000..e1b12725b --- /dev/null +++ b/target/linux/generic/backport-5.15/750-v6.5-03-net-ethernet-mtk_eth_soc-remove-mac_pcs_get_state-an.patch @@ -0,0 +1,81 @@ +From a4c2233b1e4359b6c64b6f9ba98c8718a11fffee Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Sat, 22 Jul 2023 21:32:54 +0100 +Subject: [PATCH 097/250] net: ethernet: mtk_eth_soc: remove mac_pcs_get_state + and modernise + +Remove the .mac_pcs_get_state function, since as far as I can tell is +never called - no DT appears to specify an in-band-status management +nor SFP support for this driver. + +Removal of this, along with the previous patch to remove the incorrect +clocking configuration, means that the driver becomes non-legacy, so +we can remove the "legacy_pre_march2020" status from this driver. + +Reviewed-by: Daniel Golle +Tested-by: Daniel Golle +Tested-by: Frank Wunderlich +Signed-off-by: Russell King (Oracle) +Signed-off-by: Paolo Abeni +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 35 --------------------- + 1 file changed, 35 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -511,38 +511,6 @@ static int mtk_mac_finish(struct phylink + return 0; + } + +-static void mtk_mac_pcs_get_state(struct phylink_config *config, +- struct phylink_link_state *state) +-{ +- struct mtk_mac *mac = container_of(config, struct mtk_mac, +- phylink_config); +- u32 pmsr = mtk_r32(mac->hw, MTK_MAC_MSR(mac->id)); +- +- state->link = (pmsr & MAC_MSR_LINK); +- state->duplex = (pmsr & MAC_MSR_DPX) >> 1; +- +- switch (pmsr & (MAC_MSR_SPEED_1000 | MAC_MSR_SPEED_100)) { +- case 0: +- state->speed = SPEED_10; +- break; +- case MAC_MSR_SPEED_100: +- state->speed = SPEED_100; +- break; +- case MAC_MSR_SPEED_1000: +- state->speed = SPEED_1000; +- break; +- default: +- state->speed = SPEED_UNKNOWN; +- break; +- } +- +- state->pause &= (MLO_PAUSE_RX | MLO_PAUSE_TX); +- if (pmsr & MAC_MSR_RX_FC) +- state->pause |= MLO_PAUSE_RX; +- if (pmsr & MAC_MSR_TX_FC) +- state->pause |= MLO_PAUSE_TX; +-} +- + static void mtk_mac_link_down(struct phylink_config *config, unsigned int mode, + phy_interface_t interface) + { +@@ -665,7 +633,6 @@ static void mtk_mac_link_up(struct phyli + static const struct phylink_mac_ops mtk_phylink_ops = { + .validate = phylink_generic_validate, + .mac_select_pcs = mtk_mac_select_pcs, +- .mac_pcs_get_state = mtk_mac_pcs_get_state, + .mac_config = mtk_mac_config, + .mac_finish = mtk_mac_finish, + .mac_link_down = mtk_mac_link_down, +@@ -4255,8 +4222,6 @@ static int mtk_add_mac(struct mtk_eth *e + + mac->phylink_config.dev = ð->netdev[id]->dev; + mac->phylink_config.type = PHYLINK_NETDEV; +- /* This driver makes use of state->speed in mac_config */ +- mac->phylink_config.legacy_pre_march2020 = true; + mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | + MAC_10 | MAC_100 | MAC_1000 | MAC_2500FD; + diff --git a/target/linux/generic/backport-5.15/750-v6.5-05-net-ethernet-mtk_eth_soc-add-version-in-mtk_soc_data.patch b/target/linux/generic/backport-5.15/750-v6.5-05-net-ethernet-mtk_eth_soc-add-version-in-mtk_soc_data.patch new file mode 100644 index 000000000..5875401b4 --- /dev/null +++ b/target/linux/generic/backport-5.15/750-v6.5-05-net-ethernet-mtk_eth_soc-add-version-in-mtk_soc_data.patch @@ -0,0 +1,550 @@ +From 5d8d05fbf804b4485646d39551ac27452e45afd3 Mon Sep 17 00:00:00 2001 +From: Lorenzo Bianconi +Date: Tue, 25 Jul 2023 01:52:02 +0100 +Subject: [PATCH 099/250] net: ethernet: mtk_eth_soc: add version in + mtk_soc_data + +Introduce version field in mtk_soc_data data structure in order to +make mtk_eth driver easier to maintain for chipset configuration +codebase. Get rid of MTK_NETSYS_V2 bit in chip capabilities. +This is a preliminary patch to introduce support for MT7988 SoC. + +Signed-off-by: Lorenzo Bianconi +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/e52fae302ca135436e5cdd26d38d87be2da63055.1690246066.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 55 +++++++++++-------- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 36 +++++++----- + drivers/net/ethernet/mediatek/mtk_ppe.c | 18 +++--- + .../net/ethernet/mediatek/mtk_ppe_offload.c | 2 +- + drivers/net/ethernet/mediatek/mtk_wed.c | 4 +- + 5 files changed, 66 insertions(+), 49 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -536,7 +536,7 @@ static void mtk_set_queue_speed(struct m + FIELD_PREP(MTK_QTX_SCH_MIN_RATE_MAN, 1) | + FIELD_PREP(MTK_QTX_SCH_MIN_RATE_EXP, 4) | + MTK_QTX_SCH_LEAKY_BUCKET_SIZE; +- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v1(eth)) + val |= MTK_QTX_SCH_LEAKY_BUCKET_EN; + + if (IS_ENABLED(CONFIG_SOC_MT7621)) { +@@ -911,7 +911,7 @@ static bool mtk_rx_get_desc(struct mtk_e + rxd->rxd1 = READ_ONCE(dma_rxd->rxd1); + rxd->rxd3 = READ_ONCE(dma_rxd->rxd3); + rxd->rxd4 = READ_ONCE(dma_rxd->rxd4); +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + rxd->rxd5 = READ_ONCE(dma_rxd->rxd5); + rxd->rxd6 = READ_ONCE(dma_rxd->rxd6); + } +@@ -969,7 +969,7 @@ static int mtk_init_fq_dma(struct mtk_et + + txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE); + txd->txd4 = 0; +- if (MTK_HAS_CAPS(soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + txd->txd5 = 0; + txd->txd6 = 0; + txd->txd7 = 0; +@@ -1158,7 +1158,7 @@ static void mtk_tx_set_dma_desc(struct n + struct mtk_mac *mac = netdev_priv(dev); + struct mtk_eth *eth = mac->hw; + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + mtk_tx_set_dma_desc_v2(dev, txd, info); + else + mtk_tx_set_dma_desc_v1(dev, txd, info); +@@ -1465,7 +1465,7 @@ static void mtk_update_rx_cpu_idx(struct + + static bool mtk_page_pool_enabled(struct mtk_eth *eth) + { +- return MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2); ++ return eth->soc->version == 2; + } + + static struct page_pool *mtk_create_page_pool(struct mtk_eth *eth, +@@ -1805,7 +1805,7 @@ static int mtk_poll_rx(struct napi_struc + break; + + /* find out which mac the packet come from. values start at 1 */ +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + mac = RX_DMA_GET_SPORT_V2(trxd.rxd5) - 1; + else if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) && + !(trxd.rxd4 & RX_DMA_SPECIAL_TAG)) +@@ -1901,7 +1901,7 @@ static int mtk_poll_rx(struct napi_struc + skb->dev = netdev; + bytes += skb->len; + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + reason = FIELD_GET(MTK_RXD5_PPE_CPU_REASON, trxd.rxd5); + hash = trxd.rxd5 & MTK_RXD5_FOE_ENTRY; + if (hash != MTK_RXD5_FOE_ENTRY) +@@ -1926,8 +1926,8 @@ static int mtk_poll_rx(struct napi_struc + /* When using VLAN untagging in combination with DSA, the + * hardware treats the MTK special tag as a VLAN and untags it. + */ +- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) && +- (trxd.rxd2 & RX_DMA_VTAG) && netdev_uses_dsa(netdev)) { ++ if (mtk_is_netsys_v1(eth) && (trxd.rxd2 & RX_DMA_VTAG) && ++ netdev_uses_dsa(netdev)) { + unsigned int port = RX_DMA_VPID(trxd.rxd3) & GENMASK(2, 0); + + if (port < ARRAY_SIZE(eth->dsa_meta) && +@@ -2231,7 +2231,7 @@ static int mtk_tx_alloc(struct mtk_eth * + txd->txd2 = next_ptr; + txd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU; + txd->txd4 = 0; +- if (MTK_HAS_CAPS(soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + txd->txd5 = 0; + txd->txd6 = 0; + txd->txd7 = 0; +@@ -2284,14 +2284,14 @@ static int mtk_tx_alloc(struct mtk_eth * + FIELD_PREP(MTK_QTX_SCH_MIN_RATE_MAN, 1) | + FIELD_PREP(MTK_QTX_SCH_MIN_RATE_EXP, 4) | + MTK_QTX_SCH_LEAKY_BUCKET_SIZE; +- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v1(eth)) + val |= MTK_QTX_SCH_LEAKY_BUCKET_EN; + mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); + ofs += MTK_QTX_OFFSET; + } + val = MTK_QDMA_TX_SCH_MAX_WFQ | (MTK_QDMA_TX_SCH_MAX_WFQ << 16); + mtk_w32(eth, val, soc->reg_map->qdma.tx_sch_rate); +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + mtk_w32(eth, val, soc->reg_map->qdma.tx_sch_rate + 4); + } else { + mtk_w32(eth, ring->phys_pdma, MT7628_TX_BASE_PTR0); +@@ -2418,7 +2418,7 @@ static int mtk_rx_alloc(struct mtk_eth * + + rxd->rxd3 = 0; + rxd->rxd4 = 0; +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + rxd->rxd5 = 0; + rxd->rxd6 = 0; + rxd->rxd7 = 0; +@@ -2969,7 +2969,7 @@ static int mtk_start_dma(struct mtk_eth + MTK_TX_BT_32DWORDS | MTK_NDP_CO_PRO | + MTK_RX_2B_OFFSET | MTK_TX_WB_DDONE; + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + val |= MTK_MUTLI_CNT | MTK_RESV_BUF | + MTK_WCOMP_EN | MTK_DMAD_WR_WDONE | + MTK_CHK_DDONE_EN | MTK_LEAKY_BUCKET_EN; +@@ -3113,7 +3113,7 @@ static int mtk_open(struct net_device *d + phylink_start(mac->phylink); + netif_tx_start_all_queues(dev); + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return 0; + + if (mtk_uses_dsa(dev) && !eth->prog) { +@@ -3378,7 +3378,7 @@ static void mtk_hw_reset(struct mtk_eth + { + u32 val; + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, 0); + val = RSTCTRL_PPE0_V2; + } else { +@@ -3390,7 +3390,7 @@ static void mtk_hw_reset(struct mtk_eth + + ethsys_reset(eth, RSTCTRL_ETH | RSTCTRL_FE | val); + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, + 0x3ffffff); + } +@@ -3416,7 +3416,7 @@ static void mtk_hw_warm_reset(struct mtk + return; + } + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0_V2; + else + rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0; +@@ -3586,7 +3586,7 @@ static int mtk_hw_init(struct mtk_eth *e + else + mtk_hw_reset(eth); + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + /* Set FE to PDMAv2 if necessary */ + val = mtk_r32(eth, MTK_FE_GLO_MISC); + mtk_w32(eth, val | BIT(4), MTK_FE_GLO_MISC); +@@ -3623,7 +3623,7 @@ static int mtk_hw_init(struct mtk_eth *e + */ + val = mtk_r32(eth, MTK_CDMQ_IG_CTRL); + mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL); +- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v1(eth)) { + val = mtk_r32(eth, MTK_CDMP_IG_CTRL); + mtk_w32(eth, val | MTK_CDMP_STAG_EN, MTK_CDMP_IG_CTRL); + +@@ -3645,7 +3645,7 @@ static int mtk_hw_init(struct mtk_eth *e + mtk_w32(eth, eth->soc->txrx.rx_irq_done_mask, reg_map->qdma.int_grp + 4); + mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP); + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + /* PSE should not drop port8 and port9 packets from WDMA Tx */ + mtk_w32(eth, 0x00000300, PSE_DROP_CFG); + +@@ -4434,7 +4434,7 @@ static int mtk_probe(struct platform_dev + } + } + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + err = -EINVAL; +@@ -4542,9 +4542,8 @@ static int mtk_probe(struct platform_dev + } + + if (eth->soc->offload_version) { +- u32 num_ppe; ++ u32 num_ppe = mtk_is_netsys_v2_or_greater(eth) ? 2 : 1; + +- num_ppe = MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) ? 2 : 1; + num_ppe = min_t(u32, ARRAY_SIZE(eth->ppe), num_ppe); + for (i = 0; i < num_ppe; i++) { + u32 ppe_addr = eth->soc->reg_map->ppe_base + i * 0x400; +@@ -4638,6 +4637,7 @@ static const struct mtk_soc_data mt2701_ + .hw_features = MTK_HW_FEATURES, + .required_clks = MT7623_CLKS_BITMAP, + .required_pctl = true, ++ .version = 1, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma), + .rxd_size = sizeof(struct mtk_rx_dma), +@@ -4654,6 +4654,7 @@ static const struct mtk_soc_data mt7621_ + .hw_features = MTK_HW_FEATURES, + .required_clks = MT7621_CLKS_BITMAP, + .required_pctl = false, ++ .version = 1, + .offload_version = 1, + .hash_offset = 2, + .foe_entry_size = MTK_FOE_ENTRY_V1_SIZE, +@@ -4674,6 +4675,7 @@ static const struct mtk_soc_data mt7622_ + .hw_features = MTK_HW_FEATURES, + .required_clks = MT7622_CLKS_BITMAP, + .required_pctl = false, ++ .version = 1, + .offload_version = 2, + .hash_offset = 2, + .has_accounting = true, +@@ -4694,6 +4696,7 @@ static const struct mtk_soc_data mt7623_ + .hw_features = MTK_HW_FEATURES, + .required_clks = MT7623_CLKS_BITMAP, + .required_pctl = true, ++ .version = 1, + .offload_version = 1, + .hash_offset = 2, + .foe_entry_size = MTK_FOE_ENTRY_V1_SIZE, +@@ -4716,6 +4719,7 @@ static const struct mtk_soc_data mt7629_ + .required_clks = MT7629_CLKS_BITMAP, + .required_pctl = false, + .has_accounting = true, ++ .version = 1, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma), + .rxd_size = sizeof(struct mtk_rx_dma), +@@ -4733,6 +4737,7 @@ static const struct mtk_soc_data mt7981_ + .hw_features = MTK_HW_FEATURES, + .required_clks = MT7981_CLKS_BITMAP, + .required_pctl = false, ++ .version = 2, + .offload_version = 2, + .hash_offset = 4, + .has_accounting = true, +@@ -4754,6 +4759,7 @@ static const struct mtk_soc_data mt7986_ + .hw_features = MTK_HW_FEATURES, + .required_clks = MT7986_CLKS_BITMAP, + .required_pctl = false, ++ .version = 2, + .offload_version = 2, + .hash_offset = 4, + .has_accounting = true, +@@ -4774,6 +4780,7 @@ static const struct mtk_soc_data rt5350_ + .hw_features = MTK_HW_FEATURES_MT7628, + .required_clks = MT7628_CLKS_BITMAP, + .required_pctl = false, ++ .version = 1, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma), + .rxd_size = sizeof(struct mtk_rx_dma), +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -817,7 +817,6 @@ enum mkt_eth_capabilities { + MTK_SHARED_INT_BIT, + MTK_TRGMII_MT7621_CLK_BIT, + MTK_QDMA_BIT, +- MTK_NETSYS_V2_BIT, + MTK_SOC_MT7628_BIT, + MTK_RSTCTRL_PPE1_BIT, + MTK_U3_COPHY_V2_BIT, +@@ -852,7 +851,6 @@ enum mkt_eth_capabilities { + #define MTK_SHARED_INT BIT(MTK_SHARED_INT_BIT) + #define MTK_TRGMII_MT7621_CLK BIT(MTK_TRGMII_MT7621_CLK_BIT) + #define MTK_QDMA BIT(MTK_QDMA_BIT) +-#define MTK_NETSYS_V2 BIT(MTK_NETSYS_V2_BIT) + #define MTK_SOC_MT7628 BIT(MTK_SOC_MT7628_BIT) + #define MTK_RSTCTRL_PPE1 BIT(MTK_RSTCTRL_PPE1_BIT) + #define MTK_U3_COPHY_V2 BIT(MTK_U3_COPHY_V2_BIT) +@@ -931,11 +929,11 @@ enum mkt_eth_capabilities { + #define MT7981_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | MTK_GMAC2_GEPHY | \ + MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ + MTK_MUX_U3_GMAC2_TO_QPHY | MTK_U3_COPHY_V2 | \ +- MTK_NETSYS_V2 | MTK_RSTCTRL_PPE1) ++ MTK_RSTCTRL_PPE1) + + #define MT7986_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \ + MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ +- MTK_NETSYS_V2 | MTK_RSTCTRL_PPE1) ++ MTK_RSTCTRL_PPE1) + + struct mtk_tx_dma_desc_info { + dma_addr_t addr; +@@ -1006,6 +1004,7 @@ struct mtk_reg_map { + * @required_pctl A bool value to show whether the SoC requires + * the extra setup for those pins used by GMAC. + * @hash_offset Flow table hash offset. ++ * @version SoC version. + * @foe_entry_size Foe table entry size. + * @has_accounting Bool indicating support for accounting of + * offloaded flows. +@@ -1024,6 +1023,7 @@ struct mtk_soc_data { + bool required_pctl; + u8 offload_version; + u8 hash_offset; ++ u8 version; + u16 foe_entry_size; + netdev_features_t hw_features; + bool has_accounting; +@@ -1180,6 +1180,16 @@ struct mtk_mac { + /* the struct describing the SoC. these are declared in the soc_xyz.c files */ + extern const struct of_device_id of_mtk_match[]; + ++static inline bool mtk_is_netsys_v1(struct mtk_eth *eth) ++{ ++ return eth->soc->version == 1; ++} ++ ++static inline bool mtk_is_netsys_v2_or_greater(struct mtk_eth *eth) ++{ ++ return eth->soc->version > 1; ++} ++ + static inline struct mtk_foe_entry * + mtk_foe_get_entry(struct mtk_ppe *ppe, u16 hash) + { +@@ -1190,7 +1200,7 @@ mtk_foe_get_entry(struct mtk_ppe *ppe, u + + static inline u32 mtk_get_ib1_ts_mask(struct mtk_eth *eth) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return MTK_FOE_IB1_BIND_TIMESTAMP_V2; + + return MTK_FOE_IB1_BIND_TIMESTAMP; +@@ -1198,7 +1208,7 @@ static inline u32 mtk_get_ib1_ts_mask(st + + static inline u32 mtk_get_ib1_ppoe_mask(struct mtk_eth *eth) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return MTK_FOE_IB1_BIND_PPPOE_V2; + + return MTK_FOE_IB1_BIND_PPPOE; +@@ -1206,7 +1216,7 @@ static inline u32 mtk_get_ib1_ppoe_mask( + + static inline u32 mtk_get_ib1_vlan_tag_mask(struct mtk_eth *eth) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return MTK_FOE_IB1_BIND_VLAN_TAG_V2; + + return MTK_FOE_IB1_BIND_VLAN_TAG; +@@ -1214,7 +1224,7 @@ static inline u32 mtk_get_ib1_vlan_tag_m + + static inline u32 mtk_get_ib1_vlan_layer_mask(struct mtk_eth *eth) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return MTK_FOE_IB1_BIND_VLAN_LAYER_V2; + + return MTK_FOE_IB1_BIND_VLAN_LAYER; +@@ -1222,7 +1232,7 @@ static inline u32 mtk_get_ib1_vlan_layer + + static inline u32 mtk_prep_ib1_vlan_layer(struct mtk_eth *eth, u32 val) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER_V2, val); + + return FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER, val); +@@ -1230,7 +1240,7 @@ static inline u32 mtk_prep_ib1_vlan_laye + + static inline u32 mtk_get_ib1_vlan_layer(struct mtk_eth *eth, u32 val) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return FIELD_GET(MTK_FOE_IB1_BIND_VLAN_LAYER_V2, val); + + return FIELD_GET(MTK_FOE_IB1_BIND_VLAN_LAYER, val); +@@ -1238,7 +1248,7 @@ static inline u32 mtk_get_ib1_vlan_layer + + static inline u32 mtk_get_ib1_pkt_type_mask(struct mtk_eth *eth) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return MTK_FOE_IB1_PACKET_TYPE_V2; + + return MTK_FOE_IB1_PACKET_TYPE; +@@ -1246,7 +1256,7 @@ static inline u32 mtk_get_ib1_pkt_type_m + + static inline u32 mtk_get_ib1_pkt_type(struct mtk_eth *eth, u32 val) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return FIELD_GET(MTK_FOE_IB1_PACKET_TYPE_V2, val); + + return FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, val); +@@ -1254,7 +1264,7 @@ static inline u32 mtk_get_ib1_pkt_type(s + + static inline u32 mtk_get_ib2_multicast_mask(struct mtk_eth *eth) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return MTK_FOE_IB2_MULTICAST_V2; + + return MTK_FOE_IB2_MULTICAST; +--- a/drivers/net/ethernet/mediatek/mtk_ppe.c ++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c +@@ -207,7 +207,7 @@ int mtk_foe_entry_prepare(struct mtk_eth + + memset(entry, 0, sizeof(*entry)); + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + val = FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_BIND) | + FIELD_PREP(MTK_FOE_IB1_PACKET_TYPE_V2, type) | + FIELD_PREP(MTK_FOE_IB1_UDP, l4proto == IPPROTO_UDP) | +@@ -271,7 +271,7 @@ int mtk_foe_entry_set_pse_port(struct mt + u32 *ib2 = mtk_foe_entry_ib2(eth, entry); + u32 val = *ib2; + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + val &= ~MTK_FOE_IB2_DEST_PORT_V2; + val |= FIELD_PREP(MTK_FOE_IB2_DEST_PORT_V2, port); + } else { +@@ -422,7 +422,7 @@ int mtk_foe_entry_set_wdma(struct mtk_et + struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(eth, entry); + u32 *ib2 = mtk_foe_entry_ib2(eth, entry); + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + *ib2 &= ~MTK_FOE_IB2_PORT_MG_V2; + *ib2 |= FIELD_PREP(MTK_FOE_IB2_RX_IDX, txq) | + MTK_FOE_IB2_WDMA_WINFO_V2; +@@ -452,7 +452,7 @@ int mtk_foe_entry_set_queue(struct mtk_e + { + u32 *ib2 = mtk_foe_entry_ib2(eth, entry); + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + *ib2 &= ~MTK_FOE_IB2_QID_V2; + *ib2 |= FIELD_PREP(MTK_FOE_IB2_QID_V2, queue); + *ib2 |= MTK_FOE_IB2_PSE_QOS_V2; +@@ -607,7 +607,7 @@ __mtk_foe_entry_commit(struct mtk_ppe *p + struct mtk_foe_entry *hwe; + u32 val; + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + entry->ib1 &= ~MTK_FOE_IB1_BIND_TIMESTAMP_V2; + entry->ib1 |= FIELD_PREP(MTK_FOE_IB1_BIND_TIMESTAMP_V2, + timestamp); +@@ -623,7 +623,7 @@ __mtk_foe_entry_commit(struct mtk_ppe *p + hwe->ib1 = entry->ib1; + + if (ppe->accounting) { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + val = MTK_FOE_IB2_MIB_CNT_V2; + else + val = MTK_FOE_IB2_MIB_CNT; +@@ -971,7 +971,7 @@ void mtk_ppe_start(struct mtk_ppe *ppe) + MTK_PPE_SCAN_MODE_CHECK_AGE) | + FIELD_PREP(MTK_PPE_TB_CFG_ENTRY_NUM, + MTK_PPE_ENTRIES_SHIFT); +- if (MTK_HAS_CAPS(ppe->eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(ppe->eth)) + val |= MTK_PPE_TB_CFG_INFO_SEL; + ppe_w32(ppe, MTK_PPE_TB_CFG, val); + +@@ -987,7 +987,7 @@ void mtk_ppe_start(struct mtk_ppe *ppe) + MTK_PPE_FLOW_CFG_IP4_NAPT | + MTK_PPE_FLOW_CFG_IP4_DSLITE | + MTK_PPE_FLOW_CFG_IP4_NAT_FRAG; +- if (MTK_HAS_CAPS(ppe->eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(ppe->eth)) + val |= MTK_PPE_MD_TOAP_BYP_CRSN0 | + MTK_PPE_MD_TOAP_BYP_CRSN1 | + MTK_PPE_MD_TOAP_BYP_CRSN2 | +@@ -1029,7 +1029,7 @@ void mtk_ppe_start(struct mtk_ppe *ppe) + + ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT, 0); + +- if (MTK_HAS_CAPS(ppe->eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(ppe->eth)) { + ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT1, 0xcb777); + ppe_w32(ppe, MTK_PPE_SBW_CTRL, 0x7f); + } +--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c ++++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c +@@ -193,7 +193,7 @@ mtk_flow_set_output_device(struct mtk_et + if (mtk_flow_get_wdma_info(dev, dest_mac, &info) == 0) { + mtk_foe_entry_set_wdma(eth, foe, info.wdma_idx, info.queue, + info.bss, info.wcid); +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + switch (info.wdma_idx) { + case 0: + pse_port = 8; +--- a/drivers/net/ethernet/mediatek/mtk_wed.c ++++ b/drivers/net/ethernet/mediatek/mtk_wed.c +@@ -1091,7 +1091,7 @@ mtk_wed_rx_reset(struct mtk_wed_device * + } else { + struct mtk_eth *eth = dev->hw->eth; + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + wed_set(dev, MTK_WED_RESET_IDX, + MTK_WED_RESET_IDX_RX_V2); + else +@@ -1813,7 +1813,7 @@ void mtk_wed_add_hw(struct device_node * + hw->wdma = wdma; + hw->index = index; + hw->irq = irq; +- hw->version = MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) ? 2 : 1; ++ hw->version = mtk_is_netsys_v1(eth) ? 1 : 2; + + if (hw->version == 1) { + hw->mirror = syscon_regmap_lookup_by_phandle(eth_np, diff --git a/target/linux/generic/backport-5.15/750-v6.5-06-net-ethernet-mtk_eth_soc-increase-MAX_DEVS-to-3.patch b/target/linux/generic/backport-5.15/750-v6.5-06-net-ethernet-mtk_eth_soc-increase-MAX_DEVS-to-3.patch new file mode 100644 index 000000000..5a08b9ddd --- /dev/null +++ b/target/linux/generic/backport-5.15/750-v6.5-06-net-ethernet-mtk_eth_soc-increase-MAX_DEVS-to-3.patch @@ -0,0 +1,29 @@ +From f8fb8dbd158c585be7574faf92db7d614b6722ff Mon Sep 17 00:00:00 2001 +From: Lorenzo Bianconi +Date: Tue, 25 Jul 2023 01:52:27 +0100 +Subject: [PATCH 100/250] net: ethernet: mtk_eth_soc: increase MAX_DEVS to 3 + +This is a preliminary patch to add MT7988 SoC support since it runs 3 +macs instead of 2. + +Signed-off-by: Lorenzo Bianconi +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/3563e5fab367e7d79a7f1296fabaa5c20f202d7a.1690246066.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -1040,8 +1040,8 @@ struct mtk_soc_data { + + #define MTK_DMA_MONITOR_TIMEOUT msecs_to_jiffies(1000) + +-/* currently no SoC has more than 2 macs */ +-#define MTK_MAX_DEVS 2 ++/* currently no SoC has more than 3 macs */ ++#define MTK_MAX_DEVS 3 + + /* struct mtk_eth - This is the main datasructure for holding the state + * of the driver diff --git a/target/linux/generic/pending-6.1/737-03-net-ethernet-mtk_eth_soc-rely-on-num_devs-and-remove.patch b/target/linux/generic/backport-5.15/750-v6.5-07-net-ethernet-mtk_eth_soc-rely-on-MTK_MAX_DEVS-and-re.patch similarity index 50% rename from target/linux/generic/pending-6.1/737-03-net-ethernet-mtk_eth_soc-rely-on-num_devs-and-remove.patch rename to target/linux/generic/backport-5.15/750-v6.5-07-net-ethernet-mtk_eth_soc-rely-on-MTK_MAX_DEVS-and-re.patch index ade8e8936..faa8734c2 100644 --- a/target/linux/generic/pending-6.1/737-03-net-ethernet-mtk_eth_soc-rely-on-num_devs-and-remove.patch +++ b/target/linux/generic/backport-5.15/750-v6.5-07-net-ethernet-mtk_eth_soc-rely-on-MTK_MAX_DEVS-and-re.patch @@ -1,143 +1,176 @@ -From 4e35e80750b33727e606be9e7ce447bde2e0deb7 Mon Sep 17 00:00:00 2001 +From 856be974290f28d7943be2ac5a382c4139486196 Mon Sep 17 00:00:00 2001 From: Lorenzo Bianconi -Date: Tue, 7 Mar 2023 15:55:35 +0000 -Subject: [PATCH 3/7] net: ethernet: mtk_eth_soc: rely on num_devs and remove - MTK_MAC_COUNT +Date: Tue, 25 Jul 2023 01:52:44 +0100 +Subject: [PATCH 101/250] net: ethernet: mtk_eth_soc: rely on MTK_MAX_DEVS and + remove MTK_MAC_COUNT -Get rid of MTK_MAC_COUNT since it is a duplicated of eth->soc->num_devs. +Get rid of MTK_MAC_COUNT since it is a duplicated of MTK_MAX_DEVS. Signed-off-by: Lorenzo Bianconi Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/1856f4266f2fc80677807b1bad867659e7b00c65.1690246066.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski --- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 30 ++++++++++----------- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 49 ++++++++++++--------- drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 - - 2 files changed, 15 insertions(+), 16 deletions(-) + 2 files changed, 27 insertions(+), 23 deletions(-) --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -943,7 +943,7 @@ static void mtk_stats_update(struct mtk_ +@@ -837,7 +837,7 @@ static void mtk_stats_update(struct mtk_ { int i; - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { if (!eth->mac[i] || !eth->mac[i]->hw_stats) continue; if (spin_trylock(ð->mac[i]->hw_stats->stats_lock)) { -@@ -1448,7 +1448,7 @@ static int mtk_queue_stopped(struct mtk_ +@@ -1340,7 +1340,7 @@ static int mtk_queue_stopped(struct mtk_ { int i; - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { if (!eth->netdev[i]) continue; if (netif_queue_stopped(eth->netdev[i])) -@@ -1462,7 +1462,7 @@ static void mtk_wake_queue(struct mtk_et +@@ -1354,7 +1354,7 @@ static void mtk_wake_queue(struct mtk_et { int i; - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { if (!eth->netdev[i]) continue; netif_tx_wake_all_queues(eth->netdev[i]); -@@ -1955,7 +1955,7 @@ static int mtk_poll_rx(struct napi_struc +@@ -1811,7 +1811,7 @@ static int mtk_poll_rx(struct napi_struc !(trxd.rxd4 & RX_DMA_SPECIAL_TAG)) mac = RX_DMA_GET_SPORT(trxd.rxd4) - 1; - if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT || -+ if (unlikely(mac < 0 || mac >= eth->soc->num_devs || ++ if (unlikely(mac < 0 || mac >= MTK_MAX_DEVS || !eth->netdev[mac])) goto release_desc; -@@ -2995,7 +2995,7 @@ static void mtk_dma_free(struct mtk_eth +@@ -2843,7 +2843,7 @@ static void mtk_dma_free(struct mtk_eth const struct mtk_soc_data *soc = eth->soc; int i; - for (i = 0; i < MTK_MAC_COUNT; i++) -+ for (i = 0; i < soc->num_devs; i++) ++ for (i = 0; i < MTK_MAX_DEVS; i++) if (eth->netdev[i]) netdev_reset_queue(eth->netdev[i]); if (eth->scratch_ring) { -@@ -3149,7 +3149,7 @@ static void mtk_gdm_config(struct mtk_et +@@ -2997,8 +2997,13 @@ static void mtk_gdm_config(struct mtk_et if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) return; - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { - u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i)); +- u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i)); ++ for (i = 0; i < MTK_MAX_DEVS; i++) { ++ u32 val; ++ ++ if (!eth->netdev[i]) ++ continue; ++ ++ val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i)); /* default setup the forward port to send frame to PDMA */ -@@ -3760,7 +3760,7 @@ static int mtk_hw_init(struct mtk_eth *e + val &= ~0xffff; +@@ -3008,7 +3013,7 @@ static void mtk_gdm_config(struct mtk_et + + val |= config; + +- if (eth->netdev[i] && netdev_uses_dsa(eth->netdev[i])) ++ if (netdev_uses_dsa(eth->netdev[i])) + val |= MTK_GDMA_SPECIAL_TAG; + + mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i)); +@@ -3607,15 +3612,15 @@ static int mtk_hw_init(struct mtk_eth *e * up with the more appropriate value when mtk_mac_config call is being * invoked. */ - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { struct net_device *dev = eth->netdev[i]; - mtk_w32(eth, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(i)); -@@ -3948,7 +3948,7 @@ static void mtk_pending_work(struct work +- mtk_w32(eth, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(i)); +- if (dev) { +- struct mtk_mac *mac = netdev_priv(dev); ++ if (!dev) ++ continue; + +- mtk_set_mcr_max_rx(mac, dev->mtu + MTK_RX_ETH_HLEN); +- } ++ mtk_w32(eth, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(i)); ++ mtk_set_mcr_max_rx(netdev_priv(dev), ++ dev->mtu + MTK_RX_ETH_HLEN); + } + + /* Indicates CDM to parse the MTK special tag from CPU +@@ -3795,7 +3800,7 @@ static void mtk_pending_work(struct work mtk_prepare_for_reset(eth); /* stop all devices to make sure that dma is properly shut down */ - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { if (!eth->netdev[i] || !netif_running(eth->netdev[i])) continue; -@@ -3964,7 +3964,7 @@ static void mtk_pending_work(struct work +@@ -3811,8 +3816,8 @@ static void mtk_pending_work(struct work mtk_hw_init(eth, true); /* restart DMA and enable IRQs */ - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { - if (!test_bit(i, &restart)) +- if (!test_bit(i, &restart)) ++ for (i = 0; i < MTK_MAX_DEVS; i++) { ++ if (!eth->netdev[i] || !test_bit(i, &restart)) continue; -@@ -3992,7 +3992,7 @@ static int mtk_free_dev(struct mtk_eth * + if (mtk_open(eth->netdev[i])) { +@@ -3839,7 +3844,7 @@ static int mtk_free_dev(struct mtk_eth * { int i; - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { if (!eth->netdev[i]) continue; free_netdev(eth->netdev[i]); -@@ -4011,7 +4011,7 @@ static int mtk_unreg_dev(struct mtk_eth +@@ -3858,7 +3863,7 @@ static int mtk_unreg_dev(struct mtk_eth { int i; - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { struct mtk_mac *mac; if (!eth->netdev[i]) continue; -@@ -4315,7 +4315,7 @@ static int mtk_add_mac(struct mtk_eth *e +@@ -4159,7 +4164,7 @@ static int mtk_add_mac(struct mtk_eth *e } id = be32_to_cpup(_id); - if (id >= MTK_MAC_COUNT) { -+ if (id >= eth->soc->num_devs) { ++ if (id >= MTK_MAX_DEVS) { dev_err(eth->dev, "%d is not a valid mac id\n", id); return -EINVAL; } -@@ -4456,7 +4456,7 @@ void mtk_eth_set_dma_device(struct mtk_e +@@ -4304,7 +4309,7 @@ void mtk_eth_set_dma_device(struct mtk_e rtnl_lock(); - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { dev = eth->netdev[i]; if (!dev || !(dev->flags & IFF_UP)) -@@ -4782,7 +4782,7 @@ static int mtk_remove(struct platform_de +@@ -4612,7 +4617,7 @@ static int mtk_remove(struct platform_de int i; /* stop all devices to make sure that dma is properly shut down */ - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { if (!eth->netdev[i]) continue; mtk_stop(eth->netdev[i]); diff --git a/target/linux/generic/pending-5.15/737-04-net-ethernet-mtk_eth_soc-add-MTK_NETSYS_V3-capabilit.patch b/target/linux/generic/backport-5.15/750-v6.5-08-net-ethernet-mtk_eth_soc-add-NETSYS_V3-version-suppo.patch similarity index 63% rename from target/linux/generic/pending-5.15/737-04-net-ethernet-mtk_eth_soc-add-MTK_NETSYS_V3-capabilit.patch rename to target/linux/generic/backport-5.15/750-v6.5-08-net-ethernet-mtk_eth_soc-add-NETSYS_V3-version-suppo.patch index 89fd441e1..c22b55c6f 100644 --- a/target/linux/generic/pending-5.15/737-04-net-ethernet-mtk_eth_soc-add-MTK_NETSYS_V3-capabilit.patch +++ b/target/linux/generic/backport-5.15/750-v6.5-08-net-ethernet-mtk_eth_soc-add-NETSYS_V3-version-suppo.patch @@ -1,22 +1,24 @@ -From ab817f559d505329d8a413c7d29250f6d87d77a0 Mon Sep 17 00:00:00 2001 +From a41d535855976838d246c079143c948dcf0f7931 Mon Sep 17 00:00:00 2001 From: Lorenzo Bianconi -Date: Tue, 7 Mar 2023 15:55:47 +0000 -Subject: [PATCH 4/7] net: ethernet: mtk_eth_soc: add MTK_NETSYS_V3 capability - bit +Date: Tue, 25 Jul 2023 01:52:59 +0100 +Subject: [PATCH 102/250] net: ethernet: mtk_eth_soc: add NETSYS_V3 version + support -Introduce MTK_NETSYS_V3 bit in the device capabilities. +Introduce NETSYS_V3 chipset version support. This is a preliminary patch to introduce support for MT7988 SoC. Signed-off-by: Lorenzo Bianconi Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/0db2260910755d76fa48e303b9f9bdf4e5a82340.1690246066.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski --- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 115 ++++++++++++++++---- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 44 +++++++- - 2 files changed, 134 insertions(+), 25 deletions(-) + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 105 ++++++++++++++------ + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 48 +++++++-- + 2 files changed, 116 insertions(+), 37 deletions(-) --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -879,17 +879,32 @@ void mtk_stats_update_mac(struct mtk_mac +@@ -817,17 +817,32 @@ void mtk_stats_update_mac(struct mtk_mac mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x20 + offs); hw_stats->rx_flow_control_packets += mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x24 + offs); @@ -32,7 +34,7 @@ Signed-off-by: Daniel Golle - hw_stats->tx_packets += - mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x38 + offs); + -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) { ++ if (mtk_is_netsys_v3_or_greater(eth)) { + hw_stats->tx_skip += + mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x50 + offs); + hw_stats->tx_collisions += @@ -60,7 +62,7 @@ Signed-off-by: Daniel Golle } u64_stats_update_end(&hw_stats->syncp); -@@ -1191,7 +1206,10 @@ static void mtk_tx_set_dma_desc_v2(struc +@@ -1129,7 +1144,10 @@ static void mtk_tx_set_dma_desc_v2(struc data |= TX_DMA_LS0; WRITE_ONCE(desc->txd3, data); @@ -72,57 +74,53 @@ Signed-off-by: Daniel Golle data |= TX_DMA_SWC_V2 | QID_BITS_V2(info->qid); WRITE_ONCE(desc->txd4, data); -@@ -1202,6 +1220,9 @@ static void mtk_tx_set_dma_desc_v2(struc +@@ -1140,6 +1158,8 @@ static void mtk_tx_set_dma_desc_v2(struc /* tx checksum offload */ if (info->csum) data |= TX_DMA_CHKSUM_V2; -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3) && -+ netdev_uses_dsa(dev)) ++ if (mtk_is_netsys_v3_or_greater(eth) && netdev_uses_dsa(dev)) + data |= TX_DMA_SPTAG_V3; } WRITE_ONCE(desc->txd5, data); -@@ -1267,8 +1288,13 @@ static int mtk_tx_map(struct sk_buff *sk +@@ -1205,8 +1225,7 @@ static int mtk_tx_map(struct sk_buff *sk mtk_tx_set_dma_desc(dev, itxd, &txd_info); itx_buf->flags |= MTK_TX_FLAGS_SINGLE0; - itx_buf->flags |= (!mac->id) ? MTK_TX_FLAGS_FPORT0 : - MTK_TX_FLAGS_FPORT1; -+ if (mac->id == MTK_GMAC1_ID) -+ itx_buf->flags |= MTK_TX_FLAGS_FPORT0; -+ else if (mac->id == MTK_GMAC2_ID) -+ itx_buf->flags |= MTK_TX_FLAGS_FPORT1; -+ else -+ itx_buf->flags |= MTK_TX_FLAGS_FPORT2; -+ ++ itx_buf->mac_id = mac->id; setup_tx_buf(eth, itx_buf, itxd_pdma, txd_info.addr, txd_info.size, k++); -@@ -1316,8 +1342,13 @@ static int mtk_tx_map(struct sk_buff *sk +@@ -1254,8 +1273,7 @@ static int mtk_tx_map(struct sk_buff *sk memset(tx_buf, 0, sizeof(*tx_buf)); tx_buf->data = (void *)MTK_DMA_DUMMY_DESC; tx_buf->flags |= MTK_TX_FLAGS_PAGE0; - tx_buf->flags |= (!mac->id) ? MTK_TX_FLAGS_FPORT0 : - MTK_TX_FLAGS_FPORT1; -+ -+ if (mac->id == MTK_GMAC1_ID) -+ tx_buf->flags |= MTK_TX_FLAGS_FPORT0; -+ else if (mac->id == MTK_GMAC2_ID) -+ tx_buf->flags |= MTK_TX_FLAGS_FPORT1; -+ else -+ tx_buf->flags |= MTK_TX_FLAGS_FPORT2; ++ tx_buf->mac_id = mac->id; setup_tx_buf(eth, tx_buf, txd_pdma, txd_info.addr, txd_info.size, k++); -@@ -1901,11 +1932,24 @@ static int mtk_poll_rx(struct napi_struc +@@ -1557,7 +1575,7 @@ static int mtk_xdp_frame_map(struct mtk_ + } + mtk_tx_set_dma_desc(dev, txd, txd_info); + +- tx_buf->flags |= !mac->id ? MTK_TX_FLAGS_FPORT0 : MTK_TX_FLAGS_FPORT1; ++ tx_buf->mac_id = mac->id; + tx_buf->type = dma_map ? MTK_TYPE_XDP_NDO : MTK_TYPE_XDP_TX; + tx_buf->data = (void *)MTK_DMA_DUMMY_DESC; + +@@ -1805,11 +1823,24 @@ static int mtk_poll_rx(struct napi_struc break; /* find out which mac the packet come from. values start at 1 */ -- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) +- if (mtk_is_netsys_v2_or_greater(eth)) - mac = RX_DMA_GET_SPORT_V2(trxd.rxd5) - 1; - else if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) && - !(trxd.rxd4 & RX_DMA_SPECIAL_TAG)) -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + u32 val = RX_DMA_GET_SPORT_V2(trxd.rxd5); + + switch (val) { @@ -137,29 +135,44 @@ Signed-off-by: Daniel Golle + break; + } + } else if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) && -+ !(trxd.rxd4 & RX_DMA_SPECIAL_TAG)) { ++ !(trxd.rxd4 & RX_DMA_SPECIAL_TAG)) { mac = RX_DMA_GET_SPORT(trxd.rxd4) - 1; + } - if (unlikely(mac < 0 || mac >= eth->soc->num_devs || + if (unlikely(mac < 0 || mac >= MTK_MAX_DEVS || !eth->netdev[mac])) -@@ -2134,7 +2178,9 @@ static int mtk_poll_tx_qdma(struct mtk_e +@@ -2029,7 +2060,6 @@ static int mtk_poll_tx_qdma(struct mtk_e + + while ((cpu != dma) && budget) { + u32 next_cpu = desc->txd2; +- int mac = 0; + + desc = mtk_qdma_phys_to_virt(ring, desc->txd2); + if ((desc->txd3 & TX_DMA_OWNER_CPU) == 0) +@@ -2037,15 +2067,13 @@ static int mtk_poll_tx_qdma(struct mtk_e + tx_buf = mtk_desc_to_tx_buf(ring, desc, eth->soc->txrx.txd_size); - if (tx_buf->flags & MTK_TX_FLAGS_FPORT1) +- if (tx_buf->flags & MTK_TX_FLAGS_FPORT1) - mac = 1; -+ mac = MTK_GMAC2_ID; -+ else if (tx_buf->flags & MTK_TX_FLAGS_FPORT2) -+ mac = MTK_GMAC3_ID; - +- if (!tx_buf->data) break; -@@ -3744,7 +3790,26 @@ static int mtk_hw_init(struct mtk_eth *e + + if (tx_buf->data != (void *)MTK_DMA_DUMMY_DESC) { + if (tx_buf->type == MTK_TYPE_SKB) +- mtk_poll_tx_done(eth, state, mac, tx_buf->data); ++ mtk_poll_tx_done(eth, state, tx_buf->mac_id, ++ tx_buf->data); + + budget--; + } +@@ -3650,7 +3678,24 @@ static int mtk_hw_init(struct mtk_eth *e mtk_w32(eth, eth->soc->txrx.rx_irq_done_mask, reg_map->qdma.int_grp + 4); mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP); -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) { +- if (mtk_is_netsys_v2_or_greater(eth)) { ++ if (mtk_is_netsys_v3_or_greater(eth)) { + /* PSE should not drop port1, port8 and port9 packets */ + mtk_w32(eth, 0x00000302, PSE_DROP_CFG); + @@ -168,9 +181,7 @@ Signed-off-by: Daniel Golle + mtk_w32(eth, 0x00000077, MTK_CDMW1_THRES); + + /* Disable GDM1 RX CRC stripping */ -+ val = mtk_r32(eth, MTK_GDMA_FWD_CFG(0)); -+ val &= ~MTK_GDMA_STRP_CRC; -+ mtk_w32(eth, val, MTK_GDMA_FWD_CFG(0)); ++ mtk_m32(eth, MTK_GDMA_STRP_CRC, 0, MTK_GDMA_FWD_CFG(0)); + + /* PSE GDM3 MIB counter has incorrect hw default values, + * so the driver ought to read clear the values beforehand @@ -178,17 +189,17 @@ Signed-off-by: Daniel Golle + */ + for (i = 0; i < 0x80; i += 0x4) + mtk_r32(eth, reg_map->gdm1_cnt + 0x100 + i); -+ } else if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ } else if (!mtk_is_netsys_v1(eth)) { /* PSE should not drop port8 and port9 packets from WDMA Tx */ mtk_w32(eth, 0x00000300, PSE_DROP_CFG); -@@ -4309,7 +4374,11 @@ static int mtk_add_mac(struct mtk_eth *e +@@ -4212,7 +4257,11 @@ static int mtk_add_mac(struct mtk_eth *e } spin_lock_init(&mac->hw_stats->stats_lock); u64_stats_init(&mac->hw_stats->syncp); - mac->hw_stats->reg_offset = id * MTK_STAT_OFFSET; + -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) ++ if (mtk_is_netsys_v3_or_greater(eth)) + mac->hw_stats->reg_offset = id * 0x80; + else + mac->hw_stats->reg_offset = id * 0x40; @@ -197,7 +208,7 @@ Signed-off-by: Daniel Golle err = of_get_phy_mode(np, &phy_mode); --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -121,6 +121,7 @@ +@@ -122,6 +122,7 @@ #define MTK_GDMA_ICS_EN BIT(22) #define MTK_GDMA_TCS_EN BIT(21) #define MTK_GDMA_UCS_EN BIT(20) @@ -205,7 +216,7 @@ Signed-off-by: Daniel Golle #define MTK_GDMA_TO_PDMA 0x0 #define MTK_GDMA_DROP_ALL 0x7777 -@@ -286,8 +287,6 @@ +@@ -287,8 +288,6 @@ /* QDMA Interrupt grouping registers */ #define MTK_RLS_DONE_INT BIT(0) @@ -214,7 +225,7 @@ Signed-off-by: Daniel Golle /* QDMA TX NUM */ #define QID_BITS_V2(x) (((x) & 0x3f) << 16) #define MTK_QDMA_GMAC2_QID 8 -@@ -300,6 +299,8 @@ +@@ -301,6 +300,8 @@ #define TX_DMA_CHKSUM_V2 (0x7 << 28) #define TX_DMA_TSO_V2 BIT(31) @@ -223,15 +234,20 @@ Signed-off-by: Daniel Golle /* QDMA V2 descriptor txd4 */ #define TX_DMA_FPORT_SHIFT_V2 8 #define TX_DMA_FPORT_MASK_V2 0xf -@@ -636,6 +637,7 @@ enum mtk_tx_flags { +@@ -631,12 +632,6 @@ enum mtk_tx_flags { */ - MTK_TX_FLAGS_FPORT0 = 0x04, - MTK_TX_FLAGS_FPORT1 = 0x08, -+ MTK_TX_FLAGS_FPORT2 = 0x10, + MTK_TX_FLAGS_SINGLE0 = 0x01, + MTK_TX_FLAGS_PAGE0 = 0x02, +- +- /* MTK_TX_FLAGS_FPORTx allows tracking which port the transmitted +- * SKB out instead of looking up through hardware TX descriptor. +- */ +- MTK_TX_FLAGS_FPORT0 = 0x04, +- MTK_TX_FLAGS_FPORT1 = 0x08, }; /* This enum allows us to identify how the clock is defined on the array of the -@@ -721,6 +723,42 @@ enum mtk_dev_state { +@@ -722,6 +717,35 @@ enum mtk_dev_state { MTK_RESETTING }; @@ -263,30 +279,29 @@ Signed-off-by: Daniel Golle + MTK_GMAC3_ID, + MTK_GMAC_ID_MAX +}; -+ -+/* GDM Type */ -+enum mtk_gdm_type { -+ MTK_GDM_TYPE = 0, -+ MTK_XGDM_TYPE, -+ MTK_GDM_TYPE_MAX -+}; + enum mtk_tx_buf_type { MTK_TYPE_SKB, MTK_TYPE_XDP_TX, -@@ -817,6 +855,7 @@ enum mkt_eth_capabilities { - MTK_QDMA_BIT, - MTK_NETSYS_V1_BIT, - MTK_NETSYS_V2_BIT, -+ MTK_NETSYS_V3_BIT, - MTK_SOC_MT7628_BIT, - MTK_RSTCTRL_PPE1_BIT, - MTK_U3_COPHY_V2_BIT, -@@ -853,6 +892,7 @@ enum mkt_eth_capabilities { - #define MTK_QDMA BIT(MTK_QDMA_BIT) - #define MTK_NETSYS_V1 BIT(MTK_NETSYS_V1_BIT) - #define MTK_NETSYS_V2 BIT(MTK_NETSYS_V2_BIT) -+#define MTK_NETSYS_V3 BIT(MTK_NETSYS_V3_BIT) - #define MTK_SOC_MT7628 BIT(MTK_SOC_MT7628_BIT) - #define MTK_RSTCTRL_PPE1 BIT(MTK_RSTCTRL_PPE1_BIT) - #define MTK_U3_COPHY_V2 BIT(MTK_U3_COPHY_V2_BIT) +@@ -740,7 +764,8 @@ struct mtk_tx_buf { + enum mtk_tx_buf_type type; + void *data; + +- u32 flags; ++ u16 mac_id; ++ u16 flags; + DEFINE_DMA_UNMAP_ADDR(dma_addr0); + DEFINE_DMA_UNMAP_LEN(dma_len0); + DEFINE_DMA_UNMAP_ADDR(dma_addr1); +@@ -1189,6 +1214,11 @@ static inline bool mtk_is_netsys_v2_or_g + return eth->soc->version > 1; + } + ++static inline bool mtk_is_netsys_v3_or_greater(struct mtk_eth *eth) ++{ ++ return eth->soc->version > 2; ++} ++ + static inline struct mtk_foe_entry * + mtk_foe_get_entry(struct mtk_ppe *ppe, u16 hash) + { diff --git a/target/linux/generic/pending-6.1/737-05-net-ethernet-mtk_eth_soc-convert-caps-in-mtk_soc_dat.patch b/target/linux/generic/backport-5.15/750-v6.5-09-net-ethernet-mtk_eth_soc-convert-caps-in-mtk_soc_dat.patch similarity index 89% rename from target/linux/generic/pending-6.1/737-05-net-ethernet-mtk_eth_soc-convert-caps-in-mtk_soc_dat.patch rename to target/linux/generic/backport-5.15/750-v6.5-09-net-ethernet-mtk_eth_soc-convert-caps-in-mtk_soc_dat.patch index 068201cf7..0a72eec2f 100644 --- a/target/linux/generic/pending-6.1/737-05-net-ethernet-mtk_eth_soc-convert-caps-in-mtk_soc_dat.patch +++ b/target/linux/generic/backport-5.15/750-v6.5-09-net-ethernet-mtk_eth_soc-convert-caps-in-mtk_soc_dat.patch @@ -1,17 +1,19 @@ -From 45b575fd9e6a455090820248bf1b98b1f2c7b6c8 Mon Sep 17 00:00:00 2001 +From db797ae0542220a98658229397da464c383c991c Mon Sep 17 00:00:00 2001 From: Lorenzo Bianconi -Date: Tue, 7 Mar 2023 15:56:00 +0000 -Subject: [PATCH 5/7] net: ethernet: mtk_eth_soc: convert caps in mtk_soc_data - struct to u64 +Date: Tue, 25 Jul 2023 01:53:13 +0100 +Subject: [PATCH 103/250] net: ethernet: mtk_eth_soc: convert caps in + mtk_soc_data struct to u64 This is a preliminary patch to introduce support for MT7988 SoC. Signed-off-by: Lorenzo Bianconi Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/9499ac3670b2fc5b444404b84e8a4a169beabbf2.1690246066.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski --- - drivers/net/ethernet/mediatek/mtk_eth_path.c | 22 +++---- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 62 ++++++++++---------- - 2 files changed, 42 insertions(+), 42 deletions(-) + drivers/net/ethernet/mediatek/mtk_eth_path.c | 22 ++++---- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 56 ++++++++++---------- + 2 files changed, 39 insertions(+), 39 deletions(-) --- a/drivers/net/ethernet/mediatek/mtk_eth_path.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_path.c @@ -111,7 +113,7 @@ Signed-off-by: Daniel Golle MTK_ETH_PATH_GMAC2_RGMII; --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -881,44 +881,44 @@ enum mkt_eth_capabilities { +@@ -863,41 +863,41 @@ enum mkt_eth_capabilities { }; /* Supported hardware group on SoCs */ @@ -127,9 +129,6 @@ Signed-off-by: Daniel Golle -#define MTK_SHARED_INT BIT(MTK_SHARED_INT_BIT) -#define MTK_TRGMII_MT7621_CLK BIT(MTK_TRGMII_MT7621_CLK_BIT) -#define MTK_QDMA BIT(MTK_QDMA_BIT) --#define MTK_NETSYS_V1 BIT(MTK_NETSYS_V1_BIT) --#define MTK_NETSYS_V2 BIT(MTK_NETSYS_V2_BIT) --#define MTK_NETSYS_V3 BIT(MTK_NETSYS_V3_BIT) -#define MTK_SOC_MT7628 BIT(MTK_SOC_MT7628_BIT) -#define MTK_RSTCTRL_PPE1 BIT(MTK_RSTCTRL_PPE1_BIT) -#define MTK_U3_COPHY_V2 BIT(MTK_U3_COPHY_V2_BIT) @@ -145,9 +144,6 @@ Signed-off-by: Daniel Golle +#define MTK_SHARED_INT BIT_ULL(MTK_SHARED_INT_BIT) +#define MTK_TRGMII_MT7621_CLK BIT_ULL(MTK_TRGMII_MT7621_CLK_BIT) +#define MTK_QDMA BIT_ULL(MTK_QDMA_BIT) -+#define MTK_NETSYS_V1 BIT_ULL(MTK_NETSYS_V1_BIT) -+#define MTK_NETSYS_V2 BIT_ULL(MTK_NETSYS_V2_BIT) -+#define MTK_NETSYS_V3 BIT_ULL(MTK_NETSYS_V3_BIT) +#define MTK_SOC_MT7628 BIT_ULL(MTK_SOC_MT7628_BIT) +#define MTK_RSTCTRL_PPE1 BIT_ULL(MTK_RSTCTRL_PPE1_BIT) +#define MTK_U3_COPHY_V2 BIT_ULL(MTK_U3_COPHY_V2_BIT) @@ -186,7 +182,7 @@ Signed-off-by: Daniel Golle #define MTK_GMAC1_RGMII (MTK_ETH_PATH_GMAC1_RGMII | MTK_RGMII) #define MTK_GMAC1_TRGMII (MTK_ETH_PATH_GMAC1_TRGMII | MTK_TRGMII) -@@ -1074,7 +1074,7 @@ struct mtk_reg_map { +@@ -1042,7 +1042,7 @@ struct mtk_reg_map { struct mtk_soc_data { const struct mtk_reg_map *reg_map; u32 ana_rgc3; diff --git a/target/linux/generic/backport-5.15/750-v6.5-10-net-ethernet-mtk_eth_soc-convert-clock-bitmap-to-u64.patch b/target/linux/generic/backport-5.15/750-v6.5-10-net-ethernet-mtk_eth_soc-convert-clock-bitmap-to-u64.patch new file mode 100644 index 000000000..4e5b857d4 --- /dev/null +++ b/target/linux/generic/backport-5.15/750-v6.5-10-net-ethernet-mtk_eth_soc-convert-clock-bitmap-to-u64.patch @@ -0,0 +1,132 @@ +From a1c9f7d1d24e90294f6a6755b137fcf306851e93 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Tue, 25 Jul 2023 01:53:28 +0100 +Subject: [PATCH 104/250] net: ethernet: mtk_eth_soc: convert clock bitmap to + u64 + +The to-be-added MT7988 SoC adds many new clocks which need to be +controlled by the Ethernet driver, which will result in their total +number exceeding 32. +Prepare by converting clock bitmaps into 64-bit types. + +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/6960a39bb0078cf84d7642a9558e6a91c6cc9df3.1690246066.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 96 +++++++++++---------- + 1 file changed, 49 insertions(+), 47 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -663,54 +663,56 @@ enum mtk_clks_map { + MTK_CLK_MAX + }; + +-#define MT7623_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \ +- BIT(MTK_CLK_GP1) | BIT(MTK_CLK_GP2) | \ +- BIT(MTK_CLK_TRGPLL)) +-#define MT7622_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \ +- BIT(MTK_CLK_GP0) | BIT(MTK_CLK_GP1) | \ +- BIT(MTK_CLK_GP2) | \ +- BIT(MTK_CLK_SGMII_TX_250M) | \ +- BIT(MTK_CLK_SGMII_RX_250M) | \ +- BIT(MTK_CLK_SGMII_CDR_REF) | \ +- BIT(MTK_CLK_SGMII_CDR_FB) | \ +- BIT(MTK_CLK_SGMII_CK) | \ +- BIT(MTK_CLK_ETH2PLL)) ++#define MT7623_CLKS_BITMAP (BIT_ULL(MTK_CLK_ETHIF) | BIT_ULL(MTK_CLK_ESW) | \ ++ BIT_ULL(MTK_CLK_GP1) | BIT_ULL(MTK_CLK_GP2) | \ ++ BIT_ULL(MTK_CLK_TRGPLL)) ++#define MT7622_CLKS_BITMAP (BIT_ULL(MTK_CLK_ETHIF) | BIT_ULL(MTK_CLK_ESW) | \ ++ BIT_ULL(MTK_CLK_GP0) | BIT_ULL(MTK_CLK_GP1) | \ ++ BIT_ULL(MTK_CLK_GP2) | \ ++ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \ ++ BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \ ++ BIT_ULL(MTK_CLK_SGMII_CK) | \ ++ BIT_ULL(MTK_CLK_ETH2PLL)) + #define MT7621_CLKS_BITMAP (0) + #define MT7628_CLKS_BITMAP (0) +-#define MT7629_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \ +- BIT(MTK_CLK_GP0) | BIT(MTK_CLK_GP1) | \ +- BIT(MTK_CLK_GP2) | BIT(MTK_CLK_FE) | \ +- BIT(MTK_CLK_SGMII_TX_250M) | \ +- BIT(MTK_CLK_SGMII_RX_250M) | \ +- BIT(MTK_CLK_SGMII_CDR_REF) | \ +- BIT(MTK_CLK_SGMII_CDR_FB) | \ +- BIT(MTK_CLK_SGMII2_TX_250M) | \ +- BIT(MTK_CLK_SGMII2_RX_250M) | \ +- BIT(MTK_CLK_SGMII2_CDR_REF) | \ +- BIT(MTK_CLK_SGMII2_CDR_FB) | \ +- BIT(MTK_CLK_SGMII_CK) | \ +- BIT(MTK_CLK_ETH2PLL) | BIT(MTK_CLK_SGMIITOP)) +-#define MT7981_CLKS_BITMAP (BIT(MTK_CLK_FE) | BIT(MTK_CLK_GP2) | BIT(MTK_CLK_GP1) | \ +- BIT(MTK_CLK_WOCPU0) | \ +- BIT(MTK_CLK_SGMII_TX_250M) | \ +- BIT(MTK_CLK_SGMII_RX_250M) | \ +- BIT(MTK_CLK_SGMII_CDR_REF) | \ +- BIT(MTK_CLK_SGMII_CDR_FB) | \ +- BIT(MTK_CLK_SGMII2_TX_250M) | \ +- BIT(MTK_CLK_SGMII2_RX_250M) | \ +- BIT(MTK_CLK_SGMII2_CDR_REF) | \ +- BIT(MTK_CLK_SGMII2_CDR_FB) | \ +- BIT(MTK_CLK_SGMII_CK)) +-#define MT7986_CLKS_BITMAP (BIT(MTK_CLK_FE) | BIT(MTK_CLK_GP2) | BIT(MTK_CLK_GP1) | \ +- BIT(MTK_CLK_WOCPU1) | BIT(MTK_CLK_WOCPU0) | \ +- BIT(MTK_CLK_SGMII_TX_250M) | \ +- BIT(MTK_CLK_SGMII_RX_250M) | \ +- BIT(MTK_CLK_SGMII_CDR_REF) | \ +- BIT(MTK_CLK_SGMII_CDR_FB) | \ +- BIT(MTK_CLK_SGMII2_TX_250M) | \ +- BIT(MTK_CLK_SGMII2_RX_250M) | \ +- BIT(MTK_CLK_SGMII2_CDR_REF) | \ +- BIT(MTK_CLK_SGMII2_CDR_FB)) ++#define MT7629_CLKS_BITMAP (BIT_ULL(MTK_CLK_ETHIF) | BIT_ULL(MTK_CLK_ESW) | \ ++ BIT_ULL(MTK_CLK_GP0) | BIT_ULL(MTK_CLK_GP1) | \ ++ BIT_ULL(MTK_CLK_GP2) | BIT_ULL(MTK_CLK_FE) | \ ++ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \ ++ BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \ ++ BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \ ++ BIT_ULL(MTK_CLK_SGMII2_CDR_FB) | \ ++ BIT_ULL(MTK_CLK_SGMII_CK) | \ ++ BIT_ULL(MTK_CLK_ETH2PLL) | BIT_ULL(MTK_CLK_SGMIITOP)) ++#define MT7981_CLKS_BITMAP (BIT_ULL(MTK_CLK_FE) | BIT_ULL(MTK_CLK_GP2) | \ ++ BIT_ULL(MTK_CLK_GP1) | \ ++ BIT_ULL(MTK_CLK_WOCPU0) | \ ++ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \ ++ BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \ ++ BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \ ++ BIT_ULL(MTK_CLK_SGMII2_CDR_FB) | \ ++ BIT_ULL(MTK_CLK_SGMII_CK)) ++#define MT7986_CLKS_BITMAP (BIT_ULL(MTK_CLK_FE) | BIT_ULL(MTK_CLK_GP2) | \ ++ BIT_ULL(MTK_CLK_GP1) | \ ++ BIT_ULL(MTK_CLK_WOCPU1) | BIT_ULL(MTK_CLK_WOCPU0) | \ ++ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \ ++ BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \ ++ BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \ ++ BIT_ULL(MTK_CLK_SGMII2_CDR_FB)) + + enum mtk_dev_state { + MTK_HW_INIT, +@@ -1043,7 +1045,7 @@ struct mtk_soc_data { + const struct mtk_reg_map *reg_map; + u32 ana_rgc3; + u64 caps; +- u32 required_clks; ++ u64 required_clks; + bool required_pctl; + u8 offload_version; + u8 hash_offset; diff --git a/target/linux/generic/backport-5.15/750-v6.5-11-net-ethernet-mtk_eth_soc-add-basic-support-for-MT798.patch b/target/linux/generic/backport-5.15/750-v6.5-11-net-ethernet-mtk_eth_soc-add-basic-support-for-MT798.patch new file mode 100644 index 000000000..58b9cec62 --- /dev/null +++ b/target/linux/generic/backport-5.15/750-v6.5-11-net-ethernet-mtk_eth_soc-add-basic-support-for-MT798.patch @@ -0,0 +1,477 @@ +From 94f825a7eadfc8b4c8828efdb7705d9703f9c73e Mon Sep 17 00:00:00 2001 +From: Lorenzo Bianconi +Date: Tue, 25 Jul 2023 01:57:42 +0100 +Subject: [PATCH 105/250] net: ethernet: mtk_eth_soc: add basic support for + MT7988 SoC + +Introduce support for ethernet chip available in MT7988 SoC to +mtk_eth_soc driver. As a first step support only the first GMAC which +is hard-wired to the internal DSA switch having 4 built-in gigabit +Ethernet PHYs. + +Signed-off-by: Lorenzo Bianconi +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/25c8377095b95d186872eeda7aa055da83e8f0ca.1690246605.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_path.c | 14 +- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 201 +++++++++++++++++-- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 86 +++++++- + 3 files changed, 273 insertions(+), 28 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_path.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_path.c +@@ -43,7 +43,7 @@ static const char *mtk_eth_path_name(u64 + static int set_mux_gdm1_to_gmac1_esw(struct mtk_eth *eth, u64 path) + { + bool updated = true; +- u32 val, mask, set; ++ u32 mask, set, reg; + + switch (path) { + case MTK_ETH_PATH_GMAC1_SGMII: +@@ -59,11 +59,13 @@ static int set_mux_gdm1_to_gmac1_esw(str + break; + } + +- if (updated) { +- val = mtk_r32(eth, MTK_MAC_MISC); +- val = (val & mask) | set; +- mtk_w32(eth, val, MTK_MAC_MISC); +- } ++ if (mtk_is_netsys_v3_or_greater(eth)) ++ reg = MTK_MAC_MISC_V3; ++ else ++ reg = MTK_MAC_MISC; ++ ++ if (updated) ++ mtk_m32(eth, mask, set, reg); + + dev_dbg(eth->dev, "path %s in %s updated = %d\n", + mtk_eth_path_name(path), __func__, updated); +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -152,6 +152,54 @@ static const struct mtk_reg_map mt7986_r + .pse_oq_sta = 0x01a0, + }; + ++static const struct mtk_reg_map mt7988_reg_map = { ++ .tx_irq_mask = 0x461c, ++ .tx_irq_status = 0x4618, ++ .pdma = { ++ .rx_ptr = 0x6900, ++ .rx_cnt_cfg = 0x6904, ++ .pcrx_ptr = 0x6908, ++ .glo_cfg = 0x6a04, ++ .rst_idx = 0x6a08, ++ .delay_irq = 0x6a0c, ++ .irq_status = 0x6a20, ++ .irq_mask = 0x6a28, ++ .adma_rx_dbg0 = 0x6a38, ++ .int_grp = 0x6a50, ++ }, ++ .qdma = { ++ .qtx_cfg = 0x4400, ++ .qtx_sch = 0x4404, ++ .rx_ptr = 0x4500, ++ .rx_cnt_cfg = 0x4504, ++ .qcrx_ptr = 0x4508, ++ .glo_cfg = 0x4604, ++ .rst_idx = 0x4608, ++ .delay_irq = 0x460c, ++ .fc_th = 0x4610, ++ .int_grp = 0x4620, ++ .hred = 0x4644, ++ .ctx_ptr = 0x4700, ++ .dtx_ptr = 0x4704, ++ .crx_ptr = 0x4710, ++ .drx_ptr = 0x4714, ++ .fq_head = 0x4720, ++ .fq_tail = 0x4724, ++ .fq_count = 0x4728, ++ .fq_blen = 0x472c, ++ .tx_sch_rate = 0x4798, ++ }, ++ .gdm1_cnt = 0x1c00, ++ .gdma_to_ppe0 = 0x3333, ++ .ppe_base = 0x2000, ++ .wdma_base = { ++ [0] = 0x4800, ++ [1] = 0x4c00, ++ }, ++ .pse_iq_sta = 0x0180, ++ .pse_oq_sta = 0x01a0, ++}; ++ + /* strings used by ethtool */ + static const struct mtk_ethtool_stats { + char str[ETH_GSTRING_LEN]; +@@ -179,10 +227,54 @@ static const struct mtk_ethtool_stats { + }; + + static const char * const mtk_clks_source_name[] = { +- "ethif", "sgmiitop", "esw", "gp0", "gp1", "gp2", "fe", "trgpll", +- "sgmii_tx250m", "sgmii_rx250m", "sgmii_cdr_ref", "sgmii_cdr_fb", +- "sgmii2_tx250m", "sgmii2_rx250m", "sgmii2_cdr_ref", "sgmii2_cdr_fb", +- "sgmii_ck", "eth2pll", "wocpu0", "wocpu1", "netsys0", "netsys1" ++ "ethif", ++ "sgmiitop", ++ "esw", ++ "gp0", ++ "gp1", ++ "gp2", ++ "gp3", ++ "xgp1", ++ "xgp2", ++ "xgp3", ++ "crypto", ++ "fe", ++ "trgpll", ++ "sgmii_tx250m", ++ "sgmii_rx250m", ++ "sgmii_cdr_ref", ++ "sgmii_cdr_fb", ++ "sgmii2_tx250m", ++ "sgmii2_rx250m", ++ "sgmii2_cdr_ref", ++ "sgmii2_cdr_fb", ++ "sgmii_ck", ++ "eth2pll", ++ "wocpu0", ++ "wocpu1", ++ "netsys0", ++ "netsys1", ++ "ethwarp_wocpu2", ++ "ethwarp_wocpu1", ++ "ethwarp_wocpu0", ++ "top_usxgmii0_sel", ++ "top_usxgmii1_sel", ++ "top_sgm0_sel", ++ "top_sgm1_sel", ++ "top_xfi_phy0_xtal_sel", ++ "top_xfi_phy1_xtal_sel", ++ "top_eth_gmii_sel", ++ "top_eth_refck_50m_sel", ++ "top_eth_sys_200m_sel", ++ "top_eth_sys_sel", ++ "top_eth_xgmii_sel", ++ "top_eth_mii_sel", ++ "top_netsys_sel", ++ "top_netsys_500m_sel", ++ "top_netsys_pao_2x_sel", ++ "top_netsys_sync_250m_sel", ++ "top_netsys_ppefb_250m_sel", ++ "top_netsys_warp_sel", + }; + + void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg) +@@ -195,7 +287,7 @@ u32 mtk_r32(struct mtk_eth *eth, unsigne + return __raw_readl(eth->base + reg); + } + +-static u32 mtk_m32(struct mtk_eth *eth, u32 mask, u32 set, unsigned reg) ++u32 mtk_m32(struct mtk_eth *eth, u32 mask, u32 set, unsigned int reg) + { + u32 val; + +@@ -326,6 +418,19 @@ static void mtk_gmac0_rgmii_adjust(struc + dev_err(eth->dev, "Missing PLL configuration, ethernet may not work\n"); + } + ++static void mtk_setup_bridge_switch(struct mtk_eth *eth) ++{ ++ /* Force Port1 XGMAC Link Up */ ++ mtk_m32(eth, 0, MTK_XGMAC_FORCE_LINK(MTK_GMAC1_ID), ++ MTK_XGMAC_STS(MTK_GMAC1_ID)); ++ ++ /* Adjust GSW bridge IPG to 11 */ ++ mtk_m32(eth, GSWTX_IPG_MASK | GSWRX_IPG_MASK, ++ (GSW_IPG_11 << GSWTX_IPG_SHIFT) | ++ (GSW_IPG_11 << GSWRX_IPG_SHIFT), ++ MTK_GSW_CFG); ++} ++ + static struct phylink_pcs *mtk_mac_select_pcs(struct phylink_config *config, + phy_interface_t interface) + { +@@ -395,6 +500,8 @@ static void mtk_mac_config(struct phylin + goto init_err; + } + break; ++ case PHY_INTERFACE_MODE_INTERNAL: ++ break; + default: + goto err_phy; + } +@@ -472,6 +579,15 @@ static void mtk_mac_config(struct phylin + return; + } + ++ /* Setup gmac */ ++ if (mtk_is_netsys_v3_or_greater(eth) && ++ mac->interface == PHY_INTERFACE_MODE_INTERNAL) { ++ mtk_w32(mac->hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac->id)); ++ mtk_w32(mac->hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac->id)); ++ ++ mtk_setup_bridge_switch(eth); ++ } ++ + return; + + err_phy: +@@ -681,11 +797,15 @@ static int mtk_mdio_init(struct mtk_eth + } + divider = min_t(unsigned int, DIV_ROUND_UP(MDC_MAX_FREQ, max_clk), 63); + ++ /* Configure MDC Turbo Mode */ ++ if (mtk_is_netsys_v3_or_greater(eth)) ++ mtk_m32(eth, 0, MISC_MDC_TURBO, MTK_MAC_MISC_V3); ++ + /* Configure MDC Divider */ +- val = mtk_r32(eth, MTK_PPSC); +- val &= ~PPSC_MDC_CFG; +- val |= FIELD_PREP(PPSC_MDC_CFG, divider) | PPSC_MDC_TURBO; +- mtk_w32(eth, val, MTK_PPSC); ++ val = FIELD_PREP(PPSC_MDC_CFG, divider); ++ if (!mtk_is_netsys_v3_or_greater(eth)) ++ val |= PPSC_MDC_TURBO; ++ mtk_m32(eth, PPSC_MDC_CFG, val, MTK_PPSC); + + dev_dbg(eth->dev, "MDC is running on %d Hz\n", MDC_MAX_FREQ / divider); + +@@ -1144,10 +1264,19 @@ static void mtk_tx_set_dma_desc_v2(struc + data |= TX_DMA_LS0; + WRITE_ONCE(desc->txd3, data); + +- if (mac->id == MTK_GMAC3_ID) +- data = PSE_GDM3_PORT; +- else +- data = (mac->id + 1) << TX_DMA_FPORT_SHIFT_V2; /* forward port */ ++ /* set forward port */ ++ switch (mac->id) { ++ case MTK_GMAC1_ID: ++ data = PSE_GDM1_PORT << TX_DMA_FPORT_SHIFT_V2; ++ break; ++ case MTK_GMAC2_ID: ++ data = PSE_GDM2_PORT << TX_DMA_FPORT_SHIFT_V2; ++ break; ++ case MTK_GMAC3_ID: ++ data = PSE_GDM3_PORT << TX_DMA_FPORT_SHIFT_V2; ++ break; ++ } ++ + data |= TX_DMA_SWC_V2 | QID_BITS_V2(info->qid); + WRITE_ONCE(desc->txd4, data); + +@@ -4306,6 +4435,17 @@ static int mtk_add_mac(struct mtk_eth *e + mac->phylink_config.supported_interfaces); + } + ++ if (mtk_is_netsys_v3_or_greater(mac->hw) && ++ MTK_HAS_CAPS(mac->hw->soc->caps, MTK_ESW_BIT) && ++ id == MTK_GMAC1_ID) { ++ mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | ++ MAC_SYM_PAUSE | ++ MAC_10000FD; ++ phy_interface_zero(mac->phylink_config.supported_interfaces); ++ __set_bit(PHY_INTERFACE_MODE_INTERNAL, ++ mac->phylink_config.supported_interfaces); ++ } ++ + phylink = phylink_create(&mac->phylink_config, + of_fwnode_handle(mac->of_node), + phy_mode, &mtk_phylink_ops); +@@ -4828,6 +4968,24 @@ static const struct mtk_soc_data mt7986_ + }, + }; + ++static const struct mtk_soc_data mt7988_data = { ++ .reg_map = &mt7988_reg_map, ++ .ana_rgc3 = 0x128, ++ .caps = MT7988_CAPS, ++ .hw_features = MTK_HW_FEATURES, ++ .required_clks = MT7988_CLKS_BITMAP, ++ .required_pctl = false, ++ .version = 3, ++ .txrx = { ++ .txd_size = sizeof(struct mtk_tx_dma_v2), ++ .rxd_size = sizeof(struct mtk_rx_dma_v2), ++ .rx_irq_done_mask = MTK_RX_DONE_INT_V2, ++ .rx_dma_l4_valid = RX_DMA_L4_VALID_V2, ++ .dma_max_len = MTK_TX_DMA_BUF_LEN_V2, ++ .dma_len_offset = 8, ++ }, ++}; ++ + static const struct mtk_soc_data rt5350_data = { + .reg_map = &mt7628_reg_map, + .caps = MT7628_CAPS, +@@ -4846,14 +5004,15 @@ static const struct mtk_soc_data rt5350_ + }; + + const struct of_device_id of_mtk_match[] = { +- { .compatible = "mediatek,mt2701-eth", .data = &mt2701_data}, +- { .compatible = "mediatek,mt7621-eth", .data = &mt7621_data}, +- { .compatible = "mediatek,mt7622-eth", .data = &mt7622_data}, +- { .compatible = "mediatek,mt7623-eth", .data = &mt7623_data}, +- { .compatible = "mediatek,mt7629-eth", .data = &mt7629_data}, +- { .compatible = "mediatek,mt7981-eth", .data = &mt7981_data}, +- { .compatible = "mediatek,mt7986-eth", .data = &mt7986_data}, +- { .compatible = "ralink,rt5350-eth", .data = &rt5350_data}, ++ { .compatible = "mediatek,mt2701-eth", .data = &mt2701_data }, ++ { .compatible = "mediatek,mt7621-eth", .data = &mt7621_data }, ++ { .compatible = "mediatek,mt7622-eth", .data = &mt7622_data }, ++ { .compatible = "mediatek,mt7623-eth", .data = &mt7623_data }, ++ { .compatible = "mediatek,mt7629-eth", .data = &mt7629_data }, ++ { .compatible = "mediatek,mt7981-eth", .data = &mt7981_data }, ++ { .compatible = "mediatek,mt7986-eth", .data = &mt7986_data }, ++ { .compatible = "mediatek,mt7988-eth", .data = &mt7988_data }, ++ { .compatible = "ralink,rt5350-eth", .data = &rt5350_data }, + {}, + }; + MODULE_DEVICE_TABLE(of, of_mtk_match); +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -117,7 +117,8 @@ + #define MTK_CDMP_EG_CTRL 0x404 + + /* GDM Exgress Control Register */ +-#define MTK_GDMA_FWD_CFG(x) (0x500 + (x * 0x1000)) ++#define MTK_GDMA_FWD_CFG(x) ({ typeof(x) _x = (x); (_x == MTK_GMAC3_ID) ? \ ++ 0x540 : 0x500 + (_x * 0x1000); }) + #define MTK_GDMA_SPECIAL_TAG BIT(24) + #define MTK_GDMA_ICS_EN BIT(22) + #define MTK_GDMA_TCS_EN BIT(21) +@@ -126,6 +127,11 @@ + #define MTK_GDMA_TO_PDMA 0x0 + #define MTK_GDMA_DROP_ALL 0x7777 + ++/* GDM Egress Control Register */ ++#define MTK_GDMA_EG_CTRL(x) ({ typeof(x) _x = (x); (_x == MTK_GMAC3_ID) ? \ ++ 0x544 : 0x504 + (_x * 0x1000); }) ++#define MTK_GDMA_XGDM_SEL BIT(31) ++ + /* Unicast Filter MAC Address Register - Low */ + #define MTK_GDMA_MAC_ADRL(x) (0x508 + (x * 0x1000)) + +@@ -386,7 +392,26 @@ + #define PHY_IAC_TIMEOUT HZ + + #define MTK_MAC_MISC 0x1000c ++#define MTK_MAC_MISC_V3 0x10010 + #define MTK_MUX_TO_ESW BIT(0) ++#define MISC_MDC_TURBO BIT(4) ++ ++/* XMAC status registers */ ++#define MTK_XGMAC_STS(x) (((x) == MTK_GMAC3_ID) ? 0x1001C : 0x1000C) ++#define MTK_XGMAC_FORCE_LINK(x) (((x) == MTK_GMAC2_ID) ? BIT(31) : BIT(15)) ++#define MTK_USXGMII_PCS_LINK BIT(8) ++#define MTK_XGMAC_RX_FC BIT(5) ++#define MTK_XGMAC_TX_FC BIT(4) ++#define MTK_USXGMII_PCS_MODE GENMASK(3, 1) ++#define MTK_XGMAC_LINK_STS BIT(0) ++ ++/* GSW bridge registers */ ++#define MTK_GSW_CFG (0x10080) ++#define GSWTX_IPG_MASK GENMASK(19, 16) ++#define GSWTX_IPG_SHIFT 16 ++#define GSWRX_IPG_MASK GENMASK(3, 0) ++#define GSWRX_IPG_SHIFT 0 ++#define GSW_IPG_11 11 + + /* Mac control registers */ + #define MTK_MAC_MCR(x) (0x10100 + (x * 0x100)) +@@ -644,6 +669,11 @@ enum mtk_clks_map { + MTK_CLK_GP0, + MTK_CLK_GP1, + MTK_CLK_GP2, ++ MTK_CLK_GP3, ++ MTK_CLK_XGP1, ++ MTK_CLK_XGP2, ++ MTK_CLK_XGP3, ++ MTK_CLK_CRYPTO, + MTK_CLK_FE, + MTK_CLK_TRGPLL, + MTK_CLK_SGMII_TX_250M, +@@ -660,6 +690,27 @@ enum mtk_clks_map { + MTK_CLK_WOCPU1, + MTK_CLK_NETSYS0, + MTK_CLK_NETSYS1, ++ MTK_CLK_ETHWARP_WOCPU2, ++ MTK_CLK_ETHWARP_WOCPU1, ++ MTK_CLK_ETHWARP_WOCPU0, ++ MTK_CLK_TOP_USXGMII_SBUS_0_SEL, ++ MTK_CLK_TOP_USXGMII_SBUS_1_SEL, ++ MTK_CLK_TOP_SGM_0_SEL, ++ MTK_CLK_TOP_SGM_1_SEL, ++ MTK_CLK_TOP_XFI_PHY_0_XTAL_SEL, ++ MTK_CLK_TOP_XFI_PHY_1_XTAL_SEL, ++ MTK_CLK_TOP_ETH_GMII_SEL, ++ MTK_CLK_TOP_ETH_REFCK_50M_SEL, ++ MTK_CLK_TOP_ETH_SYS_200M_SEL, ++ MTK_CLK_TOP_ETH_SYS_SEL, ++ MTK_CLK_TOP_ETH_XGMII_SEL, ++ MTK_CLK_TOP_ETH_MII_SEL, ++ MTK_CLK_TOP_NETSYS_SEL, ++ MTK_CLK_TOP_NETSYS_500M_SEL, ++ MTK_CLK_TOP_NETSYS_PAO_2X_SEL, ++ MTK_CLK_TOP_NETSYS_SYNC_250M_SEL, ++ MTK_CLK_TOP_NETSYS_PPEFB_250M_SEL, ++ MTK_CLK_TOP_NETSYS_WARP_SEL, + MTK_CLK_MAX + }; + +@@ -713,6 +764,36 @@ enum mtk_clks_map { + BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ + BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \ + BIT_ULL(MTK_CLK_SGMII2_CDR_FB)) ++#define MT7988_CLKS_BITMAP (BIT_ULL(MTK_CLK_FE) | BIT_ULL(MTK_CLK_ESW) | \ ++ BIT_ULL(MTK_CLK_GP1) | BIT_ULL(MTK_CLK_GP2) | \ ++ BIT_ULL(MTK_CLK_GP3) | BIT_ULL(MTK_CLK_XGP1) | \ ++ BIT_ULL(MTK_CLK_XGP2) | BIT_ULL(MTK_CLK_XGP3) | \ ++ BIT_ULL(MTK_CLK_CRYPTO) | \ ++ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ ++ BIT_ULL(MTK_CLK_ETHWARP_WOCPU2) | \ ++ BIT_ULL(MTK_CLK_ETHWARP_WOCPU1) | \ ++ BIT_ULL(MTK_CLK_ETHWARP_WOCPU0) | \ ++ BIT_ULL(MTK_CLK_TOP_USXGMII_SBUS_0_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_USXGMII_SBUS_1_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_SGM_0_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_SGM_1_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_XFI_PHY_0_XTAL_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_XFI_PHY_1_XTAL_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_ETH_GMII_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_ETH_REFCK_50M_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_ETH_SYS_200M_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_ETH_SYS_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_ETH_XGMII_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_ETH_MII_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_NETSYS_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_NETSYS_500M_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_NETSYS_PAO_2X_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_NETSYS_SYNC_250M_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_NETSYS_PPEFB_250M_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_NETSYS_WARP_SEL)) + + enum mtk_dev_state { + MTK_HW_INIT, +@@ -961,6 +1042,8 @@ enum mkt_eth_capabilities { + MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ + MTK_RSTCTRL_PPE1) + ++#define MT7988_CAPS (MTK_GDM1_ESW | MTK_QDMA | MTK_RSTCTRL_PPE1) ++ + struct mtk_tx_dma_desc_info { + dma_addr_t addr; + u32 size; +@@ -1306,6 +1389,7 @@ void mtk_stats_update_mac(struct mtk_mac + + void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg); + u32 mtk_r32(struct mtk_eth *eth, unsigned reg); ++u32 mtk_m32(struct mtk_eth *eth, u32 mask, u32 set, unsigned int reg); + + int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id); + int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id); diff --git a/target/linux/generic/backport-5.15/750-v6.5-12-net-ethernet-mtk_eth_soc-enable-page_pool-support-fo.patch b/target/linux/generic/backport-5.15/750-v6.5-12-net-ethernet-mtk_eth_soc-enable-page_pool-support-fo.patch new file mode 100644 index 000000000..95bf60da8 --- /dev/null +++ b/target/linux/generic/backport-5.15/750-v6.5-12-net-ethernet-mtk_eth_soc-enable-page_pool-support-fo.patch @@ -0,0 +1,27 @@ +From 38a7eb76220731eff40602cf433f24880be0a6c2 Mon Sep 17 00:00:00 2001 +From: Lorenzo Bianconi +Date: Thu, 27 Jul 2023 09:02:26 +0200 +Subject: [PATCH 106/250] net: ethernet: mtk_eth_soc: enable page_pool support + for MT7988 SoC + +In order to recycle pages, enable page_pool allocator for MT7988 SoC. + +Tested-by: Daniel Golle +Signed-off-by: Lorenzo Bianconi +Link: https://lore.kernel.org/r/fd4e8693980e47385a543e7b002eec0b88bd09df.1690440675.git.lorenzo@kernel.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -1612,7 +1612,7 @@ static void mtk_update_rx_cpu_idx(struct + + static bool mtk_page_pool_enabled(struct mtk_eth *eth) + { +- return eth->soc->version == 2; ++ return mtk_is_netsys_v2_or_greater(eth); + } + + static struct page_pool *mtk_create_page_pool(struct mtk_eth *eth, diff --git a/target/linux/generic/backport-5.15/750-v6.5-13-net-ethernet-mtk_eth_soc-enable-nft-hw-flowtable_off.patch b/target/linux/generic/backport-5.15/750-v6.5-13-net-ethernet-mtk_eth_soc-enable-nft-hw-flowtable_off.patch new file mode 100644 index 000000000..5205914c4 --- /dev/null +++ b/target/linux/generic/backport-5.15/750-v6.5-13-net-ethernet-mtk_eth_soc-enable-nft-hw-flowtable_off.patch @@ -0,0 +1,135 @@ +From 199e7d5a7f03dd377f3a7a458360dbedd71d50ba Mon Sep 17 00:00:00 2001 +From: Lorenzo Bianconi +Date: Thu, 27 Jul 2023 09:07:28 +0200 +Subject: [PATCH 107/250] net: ethernet: mtk_eth_soc: enable nft hw + flowtable_offload for MT7988 SoC + +Enable hw Packet Process Engine (PPE) for MT7988 SoC. + +Tested-by: Daniel Golle +Signed-off-by: Lorenzo Bianconi +Link: https://lore.kernel.org/r/5e86341b0220a49620dadc02d77970de5ded9efc.1690441576.git.lorenzo@kernel.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 3 +++ + drivers/net/ethernet/mediatek/mtk_ppe.c | 19 +++++++++++++++---- + drivers/net/ethernet/mediatek/mtk_ppe.h | 19 ++++++++++++++++++- + 3 files changed, 36 insertions(+), 5 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -4976,6 +4976,9 @@ static const struct mtk_soc_data mt7988_ + .required_clks = MT7988_CLKS_BITMAP, + .required_pctl = false, + .version = 3, ++ .offload_version = 2, ++ .hash_offset = 4, ++ .foe_entry_size = MTK_FOE_ENTRY_V3_SIZE, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma_v2), + .rxd_size = sizeof(struct mtk_rx_dma_v2), +--- a/drivers/net/ethernet/mediatek/mtk_ppe.c ++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c +@@ -422,13 +422,22 @@ int mtk_foe_entry_set_wdma(struct mtk_et + struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(eth, entry); + u32 *ib2 = mtk_foe_entry_ib2(eth, entry); + +- if (mtk_is_netsys_v2_or_greater(eth)) { ++ switch (eth->soc->version) { ++ case 3: ++ *ib2 &= ~MTK_FOE_IB2_PORT_MG_V2; ++ *ib2 |= FIELD_PREP(MTK_FOE_IB2_RX_IDX, txq) | ++ MTK_FOE_IB2_WDMA_WINFO_V2; ++ l2->w3info = FIELD_PREP(MTK_FOE_WINFO_WCID_V3, wcid) | ++ FIELD_PREP(MTK_FOE_WINFO_BSS_V3, bss); ++ break; ++ case 2: + *ib2 &= ~MTK_FOE_IB2_PORT_MG_V2; + *ib2 |= FIELD_PREP(MTK_FOE_IB2_RX_IDX, txq) | + MTK_FOE_IB2_WDMA_WINFO_V2; + l2->winfo = FIELD_PREP(MTK_FOE_WINFO_WCID, wcid) | + FIELD_PREP(MTK_FOE_WINFO_BSS, bss); +- } else { ++ break; ++ default: + *ib2 &= ~MTK_FOE_IB2_PORT_MG; + *ib2 |= MTK_FOE_IB2_WDMA_WINFO; + if (wdma_idx) +@@ -436,6 +445,7 @@ int mtk_foe_entry_set_wdma(struct mtk_et + l2->vlan2 = FIELD_PREP(MTK_FOE_VLAN2_WINFO_BSS, bss) | + FIELD_PREP(MTK_FOE_VLAN2_WINFO_WCID, wcid) | + FIELD_PREP(MTK_FOE_VLAN2_WINFO_RING, txq); ++ break; + } + + return 0; +@@ -956,8 +966,7 @@ void mtk_ppe_start(struct mtk_ppe *ppe) + mtk_ppe_init_foe_table(ppe); + ppe_w32(ppe, MTK_PPE_TB_BASE, ppe->foe_phys); + +- val = MTK_PPE_TB_CFG_ENTRY_80B | +- MTK_PPE_TB_CFG_AGE_NON_L4 | ++ val = MTK_PPE_TB_CFG_AGE_NON_L4 | + MTK_PPE_TB_CFG_AGE_UNBIND | + MTK_PPE_TB_CFG_AGE_TCP | + MTK_PPE_TB_CFG_AGE_UDP | +@@ -973,6 +982,8 @@ void mtk_ppe_start(struct mtk_ppe *ppe) + MTK_PPE_ENTRIES_SHIFT); + if (mtk_is_netsys_v2_or_greater(ppe->eth)) + val |= MTK_PPE_TB_CFG_INFO_SEL; ++ if (!mtk_is_netsys_v3_or_greater(ppe->eth)) ++ val |= MTK_PPE_TB_CFG_ENTRY_80B; + ppe_w32(ppe, MTK_PPE_TB_CFG, val); + + ppe_w32(ppe, MTK_PPE_IP_PROTO_CHK, +--- a/drivers/net/ethernet/mediatek/mtk_ppe.h ++++ b/drivers/net/ethernet/mediatek/mtk_ppe.h +@@ -85,6 +85,17 @@ enum { + #define MTK_FOE_WINFO_BSS GENMASK(5, 0) + #define MTK_FOE_WINFO_WCID GENMASK(15, 6) + ++#define MTK_FOE_WINFO_BSS_V3 GENMASK(23, 16) ++#define MTK_FOE_WINFO_WCID_V3 GENMASK(15, 0) ++ ++#define MTK_FOE_WINFO_PAO_USR_INFO GENMASK(15, 0) ++#define MTK_FOE_WINFO_PAO_TID GENMASK(19, 16) ++#define MTK_FOE_WINFO_PAO_IS_FIXEDRATE BIT(20) ++#define MTK_FOE_WINFO_PAO_IS_PRIOR BIT(21) ++#define MTK_FOE_WINFO_PAO_IS_SP BIT(22) ++#define MTK_FOE_WINFO_PAO_HF BIT(23) ++#define MTK_FOE_WINFO_PAO_AMSDU_EN BIT(24) ++ + enum { + MTK_FOE_STATE_INVALID, + MTK_FOE_STATE_UNBIND, +@@ -106,8 +117,13 @@ struct mtk_foe_mac_info { + u16 pppoe_id; + u16 src_mac_lo; + ++ /* netsys_v2 */ + u16 minfo; + u16 winfo; ++ ++ /* netsys_v3 */ ++ u32 w3info; ++ u32 wpao; + }; + + /* software-only entry type */ +@@ -218,6 +234,7 @@ struct mtk_foe_ipv6_6rd { + + #define MTK_FOE_ENTRY_V1_SIZE 80 + #define MTK_FOE_ENTRY_V2_SIZE 96 ++#define MTK_FOE_ENTRY_V3_SIZE 128 + + struct mtk_foe_entry { + u32 ib1; +@@ -228,7 +245,7 @@ struct mtk_foe_entry { + struct mtk_foe_ipv4_dslite dslite; + struct mtk_foe_ipv6 ipv6; + struct mtk_foe_ipv6_6rd ipv6_6rd; +- u32 data[23]; ++ u32 data[31]; + }; + }; + diff --git a/target/linux/generic/backport-5.15/750-v6.5-14-net-ethernet-mtk_eth_soc-support-per-flow-accounting.patch b/target/linux/generic/backport-5.15/750-v6.5-14-net-ethernet-mtk_eth_soc-support-per-flow-accounting.patch new file mode 100644 index 000000000..8a4897612 --- /dev/null +++ b/target/linux/generic/backport-5.15/750-v6.5-14-net-ethernet-mtk_eth_soc-support-per-flow-accounting.patch @@ -0,0 +1,78 @@ +From 0c024632c1e7ff69914329bfd87bec749b9c0aed Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Wed, 2 Aug 2023 04:31:09 +0100 +Subject: [PATCH 108/250] net: ethernet: mtk_eth_soc: support per-flow + accounting on MT7988 + +NETSYS_V3 uses 64 bits for each counters while older SoCs are using +48/40 bits for each counter. +Support reading per-flow byte and package counters on NETSYS_V3. + +Signed-off-by: Daniel Golle +Reviewed-by: Simon Horman +Link: https://lore.kernel.org/r/37a0928fa8c1253b197884c68ce1f54239421ac5.1690946442.git.daniel@makrotopia.org +Signed-off-by: Paolo Abeni +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 1 + + drivers/net/ethernet/mediatek/mtk_ppe.c | 21 +++++++++++++------- + drivers/net/ethernet/mediatek/mtk_ppe_regs.h | 2 ++ + 3 files changed, 17 insertions(+), 7 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -4978,6 +4978,7 @@ static const struct mtk_soc_data mt7988_ + .version = 3, + .offload_version = 2, + .hash_offset = 4, ++ .has_accounting = true, + .foe_entry_size = MTK_FOE_ENTRY_V3_SIZE, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma_v2), +--- a/drivers/net/ethernet/mediatek/mtk_ppe.c ++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c +@@ -91,7 +91,6 @@ static int mtk_ppe_mib_wait_busy(struct + + static int mtk_mib_entry_read(struct mtk_ppe *ppe, u16 index, u64 *bytes, u64 *packets) + { +- u32 byte_cnt_low, byte_cnt_high, pkt_cnt_low, pkt_cnt_high; + u32 val, cnt_r0, cnt_r1, cnt_r2; + int ret; + +@@ -106,12 +105,20 @@ static int mtk_mib_entry_read(struct mtk + cnt_r1 = readl(ppe->base + MTK_PPE_MIB_SER_R1); + cnt_r2 = readl(ppe->base + MTK_PPE_MIB_SER_R2); + +- byte_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R0_BYTE_CNT_LOW, cnt_r0); +- byte_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R1_BYTE_CNT_HIGH, cnt_r1); +- pkt_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R1_PKT_CNT_LOW, cnt_r1); +- pkt_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R2_PKT_CNT_HIGH, cnt_r2); +- *bytes = ((u64)byte_cnt_high << 32) | byte_cnt_low; +- *packets = (pkt_cnt_high << 16) | pkt_cnt_low; ++ if (mtk_is_netsys_v3_or_greater(ppe->eth)) { ++ /* 64 bit for each counter */ ++ u32 cnt_r3 = readl(ppe->base + MTK_PPE_MIB_SER_R3); ++ *bytes = ((u64)cnt_r1 << 32) | cnt_r0; ++ *packets = ((u64)cnt_r3 << 32) | cnt_r2; ++ } else { ++ /* 48 bit byte counter, 40 bit packet counter */ ++ u32 byte_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R0_BYTE_CNT_LOW, cnt_r0); ++ u32 byte_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R1_BYTE_CNT_HIGH, cnt_r1); ++ u32 pkt_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R1_PKT_CNT_LOW, cnt_r1); ++ u32 pkt_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R2_PKT_CNT_HIGH, cnt_r2); ++ *bytes = ((u64)byte_cnt_high << 32) | byte_cnt_low; ++ *packets = (pkt_cnt_high << 16) | pkt_cnt_low; ++ } + + return 0; + } +--- a/drivers/net/ethernet/mediatek/mtk_ppe_regs.h ++++ b/drivers/net/ethernet/mediatek/mtk_ppe_regs.h +@@ -163,6 +163,8 @@ enum { + #define MTK_PPE_MIB_SER_R2 0x348 + #define MTK_PPE_MIB_SER_R2_PKT_CNT_HIGH GENMASK(23, 0) + ++#define MTK_PPE_MIB_SER_R3 0x34c ++ + #define MTK_PPE_MIB_CACHE_CTL 0x350 + #define MTK_PPE_MIB_CACHE_CTL_EN BIT(0) + #define MTK_PPE_MIB_CACHE_CTL_FLUSH BIT(2) diff --git a/target/linux/generic/backport-5.15/750-v6.5-15-net-ethernet-mtk_eth_soc-fix-NULL-pointer-on-hw-rese.patch b/target/linux/generic/backport-5.15/750-v6.5-15-net-ethernet-mtk_eth_soc-fix-NULL-pointer-on-hw-rese.patch new file mode 100644 index 000000000..6f1639a57 --- /dev/null +++ b/target/linux/generic/backport-5.15/750-v6.5-15-net-ethernet-mtk_eth_soc-fix-NULL-pointer-on-hw-rese.patch @@ -0,0 +1,52 @@ +From 3b12f42772c26869d60398c1710aa27b27cd945c Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Mon, 21 Aug 2023 17:12:44 +0100 +Subject: [PATCH 109/250] net: ethernet: mtk_eth_soc: fix NULL pointer on hw + reset + +When a hardware reset is triggered on devices not initializing WED the +calls to mtk_wed_fe_reset and mtk_wed_fe_reset_complete dereference a +pointer on uninitialized stack memory. +Break out of both functions in case a hw_list entry is 0. + +Fixes: 08a764a7c51b ("net: ethernet: mtk_wed: add reset/reset_complete callbacks") +Signed-off-by: Daniel Golle +Reviewed-by: Simon Horman +Acked-by: Lorenzo Bianconi +Link: https://lore.kernel.org/r/5465c1609b464cc7407ae1530c40821dcdf9d3e6.1692634266.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_wed.c | 12 ++++++++++-- + 1 file changed, 10 insertions(+), 2 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_wed.c ++++ b/drivers/net/ethernet/mediatek/mtk_wed.c +@@ -214,9 +214,13 @@ void mtk_wed_fe_reset(void) + + for (i = 0; i < ARRAY_SIZE(hw_list); i++) { + struct mtk_wed_hw *hw = hw_list[i]; +- struct mtk_wed_device *dev = hw->wed_dev; ++ struct mtk_wed_device *dev; + int err; + ++ if (!hw) ++ break; ++ ++ dev = hw->wed_dev; + if (!dev || !dev->wlan.reset) + continue; + +@@ -237,8 +241,12 @@ void mtk_wed_fe_reset_complete(void) + + for (i = 0; i < ARRAY_SIZE(hw_list); i++) { + struct mtk_wed_hw *hw = hw_list[i]; +- struct mtk_wed_device *dev = hw->wed_dev; ++ struct mtk_wed_device *dev; ++ ++ if (!hw) ++ break; + ++ dev = hw->wed_dev; + if (!dev || !dev->wlan.reset_complete) + continue; + diff --git a/target/linux/generic/backport-5.15/750-v6.5-16-net-ethernet-mtk_eth_soc-fix-register-definitions-fo.patch b/target/linux/generic/backport-5.15/750-v6.5-16-net-ethernet-mtk_eth_soc-fix-register-definitions-fo.patch new file mode 100644 index 000000000..35977946d --- /dev/null +++ b/target/linux/generic/backport-5.15/750-v6.5-16-net-ethernet-mtk_eth_soc-fix-register-definitions-fo.patch @@ -0,0 +1,44 @@ +From 489aea123d74a846ce746bfdb3efe1e7ad512e0d Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Tue, 22 Aug 2023 17:31:24 +0100 +Subject: [PATCH 110/250] net: ethernet: mtk_eth_soc: fix register definitions + for MT7988 + +More register macros need to be adjusted for the 3rd GMAC on MT7988. +Account for added bit in SYSCFG0_SGMII_MASK. + +Fixes: 445eb6448ed3 ("net: ethernet: mtk_eth_soc: add basic support for MT7988 SoC") +Signed-off-by: Daniel Golle +Reviewed-by: Simon Horman +Link: https://lore.kernel.org/r/1c8da012e2ca80939906d85f314138c552139f0f.1692721443.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -133,10 +133,12 @@ + #define MTK_GDMA_XGDM_SEL BIT(31) + + /* Unicast Filter MAC Address Register - Low */ +-#define MTK_GDMA_MAC_ADRL(x) (0x508 + (x * 0x1000)) ++#define MTK_GDMA_MAC_ADRL(x) ({ typeof(x) _x = (x); (_x == MTK_GMAC3_ID) ? \ ++ 0x548 : 0x508 + (_x * 0x1000); }) + + /* Unicast Filter MAC Address Register - High */ +-#define MTK_GDMA_MAC_ADRH(x) (0x50C + (x * 0x1000)) ++#define MTK_GDMA_MAC_ADRH(x) ({ typeof(x) _x = (x); (_x == MTK_GMAC3_ID) ? \ ++ 0x54C : 0x50C + (_x * 0x1000); }) + + /* FE global misc reg*/ + #define MTK_FE_GLO_MISC 0x124 +@@ -500,7 +502,7 @@ + #define ETHSYS_SYSCFG0 0x14 + #define SYSCFG0_GE_MASK 0x3 + #define SYSCFG0_GE_MODE(x, y) (x << (12 + (y * 2))) +-#define SYSCFG0_SGMII_MASK GENMASK(9, 8) ++#define SYSCFG0_SGMII_MASK GENMASK(9, 7) + #define SYSCFG0_SGMII_GMAC1 ((2 << 8) & SYSCFG0_SGMII_MASK) + #define SYSCFG0_SGMII_GMAC2 ((3 << 8) & SYSCFG0_SGMII_MASK) + #define SYSCFG0_SGMII_GMAC1_V2 BIT(9) diff --git a/target/linux/generic/backport-5.15/750-v6.5-17-net-ethernet-mtk_eth_soc-add-reset-bits-for-MT7988.patch b/target/linux/generic/backport-5.15/750-v6.5-17-net-ethernet-mtk_eth_soc-add-reset-bits-for-MT7988.patch new file mode 100644 index 000000000..963807aa4 --- /dev/null +++ b/target/linux/generic/backport-5.15/750-v6.5-17-net-ethernet-mtk_eth_soc-add-reset-bits-for-MT7988.patch @@ -0,0 +1,188 @@ +From 15a84d1c44ae8c1451c265ee60500588a24e8cd6 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Tue, 22 Aug 2023 17:32:03 +0100 +Subject: [PATCH 111/250] net: ethernet: mtk_eth_soc: add reset bits for MT7988 + +Add bits needed to reset the frame engine on MT7988. + +Fixes: 445eb6448ed3 ("net: ethernet: mtk_eth_soc: add basic support for MT7988 SoC") +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/89b6c38380e7a3800c1362aa7575600717bc7543.1692721443.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 76 +++++++++++++++------ + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 16 +++-- + 2 files changed, 68 insertions(+), 24 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -3540,19 +3540,34 @@ static void mtk_hw_reset(struct mtk_eth + { + u32 val; + +- if (mtk_is_netsys_v2_or_greater(eth)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) + regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, 0); ++ ++ if (mtk_is_netsys_v3_or_greater(eth)) { ++ val = RSTCTRL_PPE0_V3; ++ ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) ++ val |= RSTCTRL_PPE1_V3; ++ ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) ++ val |= RSTCTRL_PPE2; ++ ++ val |= RSTCTRL_WDMA0 | RSTCTRL_WDMA1 | RSTCTRL_WDMA2; ++ } else if (mtk_is_netsys_v2_or_greater(eth)) { + val = RSTCTRL_PPE0_V2; ++ ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) ++ val |= RSTCTRL_PPE1; + } else { + val = RSTCTRL_PPE0; + } + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) +- val |= RSTCTRL_PPE1; +- + ethsys_reset(eth, RSTCTRL_ETH | RSTCTRL_FE | val); + +- if (mtk_is_netsys_v2_or_greater(eth)) ++ if (mtk_is_netsys_v3_or_greater(eth)) ++ regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, ++ 0x6f8ff); ++ else if (mtk_is_netsys_v2_or_greater(eth)) + regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, + 0x3ffffff); + } +@@ -3578,13 +3593,21 @@ static void mtk_hw_warm_reset(struct mtk + return; + } + +- if (mtk_is_netsys_v2_or_greater(eth)) ++ if (mtk_is_netsys_v3_or_greater(eth)) { ++ rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0_V3; ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) ++ rst_mask |= RSTCTRL_PPE1_V3; ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) ++ rst_mask |= RSTCTRL_PPE2; ++ ++ rst_mask |= RSTCTRL_WDMA0 | RSTCTRL_WDMA1 | RSTCTRL_WDMA2; ++ } else if (mtk_is_netsys_v2_or_greater(eth)) { + rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0_V2; +- else ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) ++ rst_mask |= RSTCTRL_PPE1; ++ } else { + rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0; +- +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) +- rst_mask |= RSTCTRL_PPE1; ++ } + + regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, rst_mask, rst_mask); + +@@ -3936,11 +3959,17 @@ static void mtk_prepare_for_reset(struct + u32 val; + int i; + +- /* disabe FE P3 and P4 */ +- val = mtk_r32(eth, MTK_FE_GLO_CFG) | MTK_FE_LINK_DOWN_P3; +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) +- val |= MTK_FE_LINK_DOWN_P4; +- mtk_w32(eth, val, MTK_FE_GLO_CFG); ++ /* set FE PPE ports link down */ ++ for (i = MTK_GMAC1_ID; ++ i <= (mtk_is_netsys_v3_or_greater(eth) ? MTK_GMAC3_ID : MTK_GMAC2_ID); ++ i += 2) { ++ val = mtk_r32(eth, MTK_FE_GLO_CFG(i)) | MTK_FE_LINK_DOWN_P(PSE_PPE0_PORT); ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) ++ val |= MTK_FE_LINK_DOWN_P(PSE_PPE1_PORT); ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) ++ val |= MTK_FE_LINK_DOWN_P(PSE_PPE2_PORT); ++ mtk_w32(eth, val, MTK_FE_GLO_CFG(i)); ++ } + + /* adjust PPE configurations to prepare for reset */ + for (i = 0; i < ARRAY_SIZE(eth->ppe); i++) +@@ -4001,11 +4030,18 @@ static void mtk_pending_work(struct work + } + } + +- /* enabe FE P3 and P4 */ +- val = mtk_r32(eth, MTK_FE_GLO_CFG) & ~MTK_FE_LINK_DOWN_P3; +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) +- val &= ~MTK_FE_LINK_DOWN_P4; +- mtk_w32(eth, val, MTK_FE_GLO_CFG); ++ /* set FE PPE ports link up */ ++ for (i = MTK_GMAC1_ID; ++ i <= (mtk_is_netsys_v3_or_greater(eth) ? MTK_GMAC3_ID : MTK_GMAC2_ID); ++ i += 2) { ++ val = mtk_r32(eth, MTK_FE_GLO_CFG(i)) & ~MTK_FE_LINK_DOWN_P(PSE_PPE0_PORT); ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) ++ val &= ~MTK_FE_LINK_DOWN_P(PSE_PPE1_PORT); ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) ++ val &= ~MTK_FE_LINK_DOWN_P(PSE_PPE2_PORT); ++ ++ mtk_w32(eth, val, MTK_FE_GLO_CFG(i)); ++ } + + clear_bit(MTK_RESETTING, ð->state); + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -76,9 +76,8 @@ + #define MTK_HW_LRO_SDL_REMAIN_ROOM 1522 + + /* Frame Engine Global Configuration */ +-#define MTK_FE_GLO_CFG 0x00 +-#define MTK_FE_LINK_DOWN_P3 BIT(11) +-#define MTK_FE_LINK_DOWN_P4 BIT(12) ++#define MTK_FE_GLO_CFG(x) (((x) == MTK_GMAC3_ID) ? 0x24 : 0x00) ++#define MTK_FE_LINK_DOWN_P(x) BIT(((x) + 8) % 16) + + /* Frame Engine Global Reset Register */ + #define MTK_RST_GL 0x04 +@@ -519,9 +518,15 @@ + /* ethernet reset control register */ + #define ETHSYS_RSTCTRL 0x34 + #define RSTCTRL_FE BIT(6) ++#define RSTCTRL_WDMA0 BIT(24) ++#define RSTCTRL_WDMA1 BIT(25) ++#define RSTCTRL_WDMA2 BIT(26) + #define RSTCTRL_PPE0 BIT(31) + #define RSTCTRL_PPE0_V2 BIT(30) + #define RSTCTRL_PPE1 BIT(31) ++#define RSTCTRL_PPE0_V3 BIT(29) ++#define RSTCTRL_PPE1_V3 BIT(30) ++#define RSTCTRL_PPE2 BIT(31) + #define RSTCTRL_ETH BIT(23) + + /* ethernet reset check idle register */ +@@ -928,6 +933,7 @@ enum mkt_eth_capabilities { + MTK_QDMA_BIT, + MTK_SOC_MT7628_BIT, + MTK_RSTCTRL_PPE1_BIT, ++ MTK_RSTCTRL_PPE2_BIT, + MTK_U3_COPHY_V2_BIT, + + /* MUX BITS*/ +@@ -962,6 +968,7 @@ enum mkt_eth_capabilities { + #define MTK_QDMA BIT_ULL(MTK_QDMA_BIT) + #define MTK_SOC_MT7628 BIT_ULL(MTK_SOC_MT7628_BIT) + #define MTK_RSTCTRL_PPE1 BIT_ULL(MTK_RSTCTRL_PPE1_BIT) ++#define MTK_RSTCTRL_PPE2 BIT_ULL(MTK_RSTCTRL_PPE2_BIT) + #define MTK_U3_COPHY_V2 BIT_ULL(MTK_U3_COPHY_V2_BIT) + + #define MTK_ETH_MUX_GDM1_TO_GMAC1_ESW \ +@@ -1044,7 +1051,8 @@ enum mkt_eth_capabilities { + MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ + MTK_RSTCTRL_PPE1) + +-#define MT7988_CAPS (MTK_GDM1_ESW | MTK_QDMA | MTK_RSTCTRL_PPE1) ++#define MT7988_CAPS (MTK_GDM1_ESW | MTK_QDMA | MTK_RSTCTRL_PPE1 | \ ++ MTK_RSTCTRL_PPE2) + + struct mtk_tx_dma_desc_info { + dma_addr_t addr; diff --git a/target/linux/generic/backport-5.15/750-v6.5-18-net-ethernet-mtk_eth_soc-add-support-for-in-SoC-SRAM.patch b/target/linux/generic/backport-5.15/750-v6.5-18-net-ethernet-mtk_eth_soc-add-support-for-in-SoC-SRAM.patch new file mode 100644 index 000000000..e224443e4 --- /dev/null +++ b/target/linux/generic/backport-5.15/750-v6.5-18-net-ethernet-mtk_eth_soc-add-support-for-in-SoC-SRAM.patch @@ -0,0 +1,254 @@ +From 25ce45fe40b574e5d7ffa407f7f2db03e7d5a910 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Tue, 22 Aug 2023 17:32:54 +0100 +Subject: [PATCH 112/250] net: ethernet: mtk_eth_soc: add support for in-SoC + SRAM + +MT7981, MT7986 and MT7988 come with in-SoC SRAM dedicated for Ethernet +DMA rings. Support using the SRAM without breaking existing device tree +bindings, ie. only new SoC starting from MT7988 will have the SRAM +declared as additional resource in device tree. For MT7981 and MT7986 +an offset on top of the main I/O base is used. + +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/e45e0f230c63ad58869e8fe35b95a2fb8925b625.1692721443.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 88 ++++++++++++++++----- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 12 ++- + 2 files changed, 78 insertions(+), 22 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -1074,10 +1074,13 @@ static int mtk_init_fq_dma(struct mtk_et + dma_addr_t dma_addr; + int i; + +- eth->scratch_ring = dma_alloc_coherent(eth->dma_dev, +- cnt * soc->txrx.txd_size, +- ð->phy_scratch_ring, +- GFP_KERNEL); ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM)) ++ eth->scratch_ring = eth->sram_base; ++ else ++ eth->scratch_ring = dma_alloc_coherent(eth->dma_dev, ++ cnt * soc->txrx.txd_size, ++ ð->phy_scratch_ring, ++ GFP_KERNEL); + if (unlikely(!eth->scratch_ring)) + return -ENOMEM; + +@@ -2375,8 +2378,14 @@ static int mtk_tx_alloc(struct mtk_eth * + if (!ring->buf) + goto no_tx_mem; + +- ring->dma = dma_alloc_coherent(eth->dma_dev, ring_size * sz, +- &ring->phys, GFP_KERNEL); ++ if (MTK_HAS_CAPS(soc->caps, MTK_SRAM)) { ++ ring->dma = eth->sram_base + ring_size * sz; ++ ring->phys = eth->phy_scratch_ring + ring_size * (dma_addr_t)sz; ++ } else { ++ ring->dma = dma_alloc_coherent(eth->dma_dev, ring_size * sz, ++ &ring->phys, GFP_KERNEL); ++ } ++ + if (!ring->dma) + goto no_tx_mem; + +@@ -2475,8 +2484,7 @@ static void mtk_tx_clean(struct mtk_eth + kfree(ring->buf); + ring->buf = NULL; + } +- +- if (ring->dma) { ++ if (!MTK_HAS_CAPS(soc->caps, MTK_SRAM) && ring->dma) { + dma_free_coherent(eth->dma_dev, + ring->dma_size * soc->txrx.txd_size, + ring->dma, ring->phys); +@@ -2495,9 +2503,14 @@ static int mtk_rx_alloc(struct mtk_eth * + { + const struct mtk_reg_map *reg_map = eth->soc->reg_map; + struct mtk_rx_ring *ring; +- int rx_data_len, rx_dma_size; ++ int rx_data_len, rx_dma_size, tx_ring_size; + int i; + ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) ++ tx_ring_size = MTK_QDMA_RING_SIZE; ++ else ++ tx_ring_size = MTK_DMA_SIZE; ++ + if (rx_flag == MTK_RX_FLAGS_QDMA) { + if (ring_no) + return -EINVAL; +@@ -2532,9 +2545,20 @@ static int mtk_rx_alloc(struct mtk_eth * + ring->page_pool = pp; + } + +- ring->dma = dma_alloc_coherent(eth->dma_dev, +- rx_dma_size * eth->soc->txrx.rxd_size, +- &ring->phys, GFP_KERNEL); ++ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM) || ++ rx_flag != MTK_RX_FLAGS_NORMAL) { ++ ring->dma = dma_alloc_coherent(eth->dma_dev, ++ rx_dma_size * eth->soc->txrx.rxd_size, ++ &ring->phys, GFP_KERNEL); ++ } else { ++ struct mtk_tx_ring *tx_ring = ð->tx_ring; ++ ++ ring->dma = tx_ring->dma + tx_ring_size * ++ eth->soc->txrx.txd_size * (ring_no + 1); ++ ring->phys = tx_ring->phys + tx_ring_size * ++ eth->soc->txrx.txd_size * (ring_no + 1); ++ } ++ + if (!ring->dma) + return -ENOMEM; + +@@ -2617,7 +2641,7 @@ static int mtk_rx_alloc(struct mtk_eth * + return 0; + } + +-static void mtk_rx_clean(struct mtk_eth *eth, struct mtk_rx_ring *ring) ++static void mtk_rx_clean(struct mtk_eth *eth, struct mtk_rx_ring *ring, bool in_sram) + { + int i; + +@@ -2640,7 +2664,7 @@ static void mtk_rx_clean(struct mtk_eth + ring->data = NULL; + } + +- if (ring->dma) { ++ if (!in_sram && ring->dma) { + dma_free_coherent(eth->dma_dev, + ring->dma_size * eth->soc->txrx.rxd_size, + ring->dma, ring->phys); +@@ -3003,7 +3027,7 @@ static void mtk_dma_free(struct mtk_eth + for (i = 0; i < MTK_MAX_DEVS; i++) + if (eth->netdev[i]) + netdev_reset_queue(eth->netdev[i]); +- if (eth->scratch_ring) { ++ if (!MTK_HAS_CAPS(soc->caps, MTK_SRAM) && eth->scratch_ring) { + dma_free_coherent(eth->dma_dev, + MTK_QDMA_RING_SIZE * soc->txrx.txd_size, + eth->scratch_ring, eth->phy_scratch_ring); +@@ -3011,13 +3035,13 @@ static void mtk_dma_free(struct mtk_eth + eth->phy_scratch_ring = 0; + } + mtk_tx_clean(eth); +- mtk_rx_clean(eth, ð->rx_ring[0]); +- mtk_rx_clean(eth, ð->rx_ring_qdma); ++ mtk_rx_clean(eth, ð->rx_ring[0], MTK_HAS_CAPS(soc->caps, MTK_SRAM)); ++ mtk_rx_clean(eth, ð->rx_ring_qdma, false); + + if (eth->hwlro) { + mtk_hwlro_rx_uninit(eth); + for (i = 1; i < MTK_MAX_RX_RING_NUM; i++) +- mtk_rx_clean(eth, ð->rx_ring[i]); ++ mtk_rx_clean(eth, ð->rx_ring[i], false); + } + + kfree(eth->scratch_head); +@@ -4587,7 +4611,7 @@ static int mtk_sgmii_init(struct mtk_eth + + static int mtk_probe(struct platform_device *pdev) + { +- struct resource *res = NULL; ++ struct resource *res = NULL, *res_sram; + struct device_node *mac_np; + struct mtk_eth *eth; + int err, i; +@@ -4607,6 +4631,20 @@ static int mtk_probe(struct platform_dev + if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) + eth->ip_align = NET_IP_ALIGN; + ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM)) { ++ /* SRAM is actual memory and supports transparent access just like DRAM. ++ * Hence we don't require __iomem being set and don't need to use accessor ++ * functions to read from or write to SRAM. ++ */ ++ if (mtk_is_netsys_v3_or_greater(eth)) { ++ eth->sram_base = (void __force *)devm_platform_ioremap_resource(pdev, 1); ++ if (IS_ERR(eth->sram_base)) ++ return PTR_ERR(eth->sram_base); ++ } else { ++ eth->sram_base = (void __force *)eth->base + MTK_ETH_SRAM_OFFSET; ++ } ++ } ++ + spin_lock_init(ð->page_lock); + spin_lock_init(ð->tx_irq_lock); + spin_lock_init(ð->rx_irq_lock); +@@ -4670,6 +4708,18 @@ static int mtk_probe(struct platform_dev + err = -EINVAL; + goto err_destroy_sgmii; + } ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM)) { ++ if (mtk_is_netsys_v3_or_greater(eth)) { ++ res_sram = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (!res_sram) { ++ err = -EINVAL; ++ goto err_destroy_sgmii; ++ } ++ eth->phy_scratch_ring = res_sram->start; ++ } else { ++ eth->phy_scratch_ring = res->start + MTK_ETH_SRAM_OFFSET; ++ } ++ } + } + + if (eth->soc->offload_version) { +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -139,6 +139,9 @@ + #define MTK_GDMA_MAC_ADRH(x) ({ typeof(x) _x = (x); (_x == MTK_GMAC3_ID) ? \ + 0x54C : 0x50C + (_x * 0x1000); }) + ++/* Internal SRAM offset */ ++#define MTK_ETH_SRAM_OFFSET 0x40000 ++ + /* FE global misc reg*/ + #define MTK_FE_GLO_MISC 0x124 + +@@ -935,6 +938,7 @@ enum mkt_eth_capabilities { + MTK_RSTCTRL_PPE1_BIT, + MTK_RSTCTRL_PPE2_BIT, + MTK_U3_COPHY_V2_BIT, ++ MTK_SRAM_BIT, + + /* MUX BITS*/ + MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT, +@@ -970,6 +974,7 @@ enum mkt_eth_capabilities { + #define MTK_RSTCTRL_PPE1 BIT_ULL(MTK_RSTCTRL_PPE1_BIT) + #define MTK_RSTCTRL_PPE2 BIT_ULL(MTK_RSTCTRL_PPE2_BIT) + #define MTK_U3_COPHY_V2 BIT_ULL(MTK_U3_COPHY_V2_BIT) ++#define MTK_SRAM BIT_ULL(MTK_SRAM_BIT) + + #define MTK_ETH_MUX_GDM1_TO_GMAC1_ESW \ + BIT_ULL(MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT) +@@ -1045,14 +1050,14 @@ enum mkt_eth_capabilities { + #define MT7981_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | MTK_GMAC2_GEPHY | \ + MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ + MTK_MUX_U3_GMAC2_TO_QPHY | MTK_U3_COPHY_V2 | \ +- MTK_RSTCTRL_PPE1) ++ MTK_RSTCTRL_PPE1 | MTK_SRAM) + + #define MT7986_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \ + MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ +- MTK_RSTCTRL_PPE1) ++ MTK_RSTCTRL_PPE1 | MTK_SRAM) + + #define MT7988_CAPS (MTK_GDM1_ESW | MTK_QDMA | MTK_RSTCTRL_PPE1 | \ +- MTK_RSTCTRL_PPE2) ++ MTK_RSTCTRL_PPE2 | MTK_SRAM) + + struct mtk_tx_dma_desc_info { + dma_addr_t addr; +@@ -1212,6 +1217,7 @@ struct mtk_eth { + struct device *dev; + struct device *dma_dev; + void __iomem *base; ++ void *sram_base; + spinlock_t page_lock; + spinlock_t tx_irq_lock; + spinlock_t rx_irq_lock; diff --git a/target/linux/generic/backport-5.15/750-v6.5-19-net-ethernet-mtk_eth_soc-support-36-bit-DMA-addressi.patch b/target/linux/generic/backport-5.15/750-v6.5-19-net-ethernet-mtk_eth_soc-support-36-bit-DMA-addressi.patch new file mode 100644 index 000000000..528f9a3e5 --- /dev/null +++ b/target/linux/generic/backport-5.15/750-v6.5-19-net-ethernet-mtk_eth_soc-support-36-bit-DMA-addressi.patch @@ -0,0 +1,166 @@ +From 0b0d606eb9650fa01dd5621e072aa29a10544399 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Tue, 22 Aug 2023 17:33:12 +0100 +Subject: [PATCH 113/250] net: ethernet: mtk_eth_soc: support 36-bit DMA + addressing on MT7988 + +Systems having 4 GiB of RAM and more require DMA addressing beyond the +current 32-bit limit. Starting from MT7988 the hardware now supports +36-bit DMA addressing, let's use that new capability in the driver to +avoid running into swiotlb on systems with 4 GiB of RAM or more. + +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/95b919c98876c9e49761e44662e7c937479eecb8.1692721443.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 30 +++++++++++++++++++-- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 22 +++++++++++++-- + 2 files changed, 48 insertions(+), 4 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -1265,6 +1265,10 @@ static void mtk_tx_set_dma_desc_v2(struc + data = TX_DMA_PLEN0(info->size); + if (info->last) + data |= TX_DMA_LS0; ++ ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) ++ data |= TX_DMA_PREP_ADDR64(info->addr); ++ + WRITE_ONCE(desc->txd3, data); + + /* set forward port */ +@@ -1932,6 +1936,7 @@ static int mtk_poll_rx(struct napi_struc + bool xdp_flush = false; + int idx; + struct sk_buff *skb; ++ u64 addr64 = 0; + u8 *data, *new_data; + struct mtk_rx_dma_v2 *rxd, trxd; + int done = 0, bytes = 0; +@@ -2047,7 +2052,10 @@ static int mtk_poll_rx(struct napi_struc + goto release_desc; + } + +- dma_unmap_single(eth->dma_dev, trxd.rxd1, ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) ++ addr64 = RX_DMA_GET_ADDR64(trxd.rxd2); ++ ++ dma_unmap_single(eth->dma_dev, ((u64)trxd.rxd1 | addr64), + ring->buf_size, DMA_FROM_DEVICE); + + skb = build_skb(data, ring->frag_size); +@@ -2113,6 +2121,9 @@ release_desc: + else + rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size); + ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) ++ rxd->rxd2 |= RX_DMA_PREP_ADDR64(dma_addr); ++ + ring->calc_idx = idx; + done++; + } +@@ -2597,6 +2608,9 @@ static int mtk_rx_alloc(struct mtk_eth * + else + rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size); + ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) ++ rxd->rxd2 |= RX_DMA_PREP_ADDR64(dma_addr); ++ + rxd->rxd3 = 0; + rxd->rxd4 = 0; + if (mtk_is_netsys_v2_or_greater(eth)) { +@@ -2643,6 +2657,7 @@ static int mtk_rx_alloc(struct mtk_eth * + + static void mtk_rx_clean(struct mtk_eth *eth, struct mtk_rx_ring *ring, bool in_sram) + { ++ u64 addr64 = 0; + int i; + + if (ring->data && ring->dma) { +@@ -2656,7 +2671,10 @@ static void mtk_rx_clean(struct mtk_eth + if (!rxd->rxd1) + continue; + +- dma_unmap_single(eth->dma_dev, rxd->rxd1, ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) ++ addr64 = RX_DMA_GET_ADDR64(rxd->rxd2); ++ ++ dma_unmap_single(eth->dma_dev, ((u64)rxd->rxd1 | addr64), + ring->buf_size, DMA_FROM_DEVICE); + mtk_rx_put_buff(ring, ring->data[i], false); + } +@@ -4645,6 +4663,14 @@ static int mtk_probe(struct platform_dev + } + } + ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) { ++ err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(36)); ++ if (err) { ++ dev_err(&pdev->dev, "Wrong DMA config\n"); ++ return -EINVAL; ++ } ++ } ++ + spin_lock_init(ð->page_lock); + spin_lock_init(ð->tx_irq_lock); + spin_lock_init(ð->rx_irq_lock); +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -331,6 +331,14 @@ + #define TX_DMA_PLEN1(x) ((x) & eth->soc->txrx.dma_max_len) + #define TX_DMA_SWC BIT(14) + #define TX_DMA_PQID GENMASK(3, 0) ++#define TX_DMA_ADDR64_MASK GENMASK(3, 0) ++#if IS_ENABLED(CONFIG_64BIT) ++# define TX_DMA_GET_ADDR64(x) (((u64)FIELD_GET(TX_DMA_ADDR64_MASK, (x))) << 32) ++# define TX_DMA_PREP_ADDR64(x) FIELD_PREP(TX_DMA_ADDR64_MASK, ((x) >> 32)) ++#else ++# define TX_DMA_GET_ADDR64(x) (0) ++# define TX_DMA_PREP_ADDR64(x) (0) ++#endif + + /* PDMA on MT7628 */ + #define TX_DMA_DONE BIT(31) +@@ -343,6 +351,14 @@ + #define RX_DMA_PREP_PLEN0(x) (((x) & eth->soc->txrx.dma_max_len) << eth->soc->txrx.dma_len_offset) + #define RX_DMA_GET_PLEN0(x) (((x) >> eth->soc->txrx.dma_len_offset) & eth->soc->txrx.dma_max_len) + #define RX_DMA_VTAG BIT(15) ++#define RX_DMA_ADDR64_MASK GENMASK(3, 0) ++#if IS_ENABLED(CONFIG_64BIT) ++# define RX_DMA_GET_ADDR64(x) (((u64)FIELD_GET(RX_DMA_ADDR64_MASK, (x))) << 32) ++# define RX_DMA_PREP_ADDR64(x) FIELD_PREP(RX_DMA_ADDR64_MASK, ((x) >> 32)) ++#else ++# define RX_DMA_GET_ADDR64(x) (0) ++# define RX_DMA_PREP_ADDR64(x) (0) ++#endif + + /* QDMA descriptor rxd3 */ + #define RX_DMA_VID(x) ((x) & VLAN_VID_MASK) +@@ -939,6 +955,7 @@ enum mkt_eth_capabilities { + MTK_RSTCTRL_PPE2_BIT, + MTK_U3_COPHY_V2_BIT, + MTK_SRAM_BIT, ++ MTK_36BIT_DMA_BIT, + + /* MUX BITS*/ + MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT, +@@ -975,6 +992,7 @@ enum mkt_eth_capabilities { + #define MTK_RSTCTRL_PPE2 BIT_ULL(MTK_RSTCTRL_PPE2_BIT) + #define MTK_U3_COPHY_V2 BIT_ULL(MTK_U3_COPHY_V2_BIT) + #define MTK_SRAM BIT_ULL(MTK_SRAM_BIT) ++#define MTK_36BIT_DMA BIT_ULL(MTK_36BIT_DMA_BIT) + + #define MTK_ETH_MUX_GDM1_TO_GMAC1_ESW \ + BIT_ULL(MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT) +@@ -1056,8 +1074,8 @@ enum mkt_eth_capabilities { + MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ + MTK_RSTCTRL_PPE1 | MTK_SRAM) + +-#define MT7988_CAPS (MTK_GDM1_ESW | MTK_QDMA | MTK_RSTCTRL_PPE1 | \ +- MTK_RSTCTRL_PPE2 | MTK_SRAM) ++#define MT7988_CAPS (MTK_36BIT_DMA | MTK_GDM1_ESW | MTK_QDMA | \ ++ MTK_RSTCTRL_PPE1 | MTK_RSTCTRL_PPE2 | MTK_SRAM) + + struct mtk_tx_dma_desc_info { + dma_addr_t addr; diff --git a/target/linux/generic/backport-5.15/765-v5.17-04-net-next-net-dsa-hold-rtnl_mutex-when-calling-dsa_master_-set.patch b/target/linux/generic/backport-5.15/765-v5.17-04-net-next-net-dsa-hold-rtnl_mutex-when-calling-dsa_master_-set.patch index e331226fc..dbc28efc9 100644 --- a/target/linux/generic/backport-5.15/765-v5.17-04-net-next-net-dsa-hold-rtnl_mutex-when-calling-dsa_master_-set.patch +++ b/target/linux/generic/backport-5.15/765-v5.17-04-net-next-net-dsa-hold-rtnl_mutex-when-calling-dsa_master_-set.patch @@ -30,7 +30,7 @@ Signed-off-by: David S. Miller --- a/net/dsa/dsa2.c +++ b/net/dsa/dsa2.c -@@ -1034,6 +1034,8 @@ static int dsa_tree_setup_master(struct +@@ -1056,6 +1056,8 @@ static int dsa_tree_setup_master(struct struct dsa_port *dp; int err; @@ -39,7 +39,7 @@ Signed-off-by: David S. Miller list_for_each_entry(dp, &dst->ports, list) { if (dsa_port_is_cpu(dp)) { err = dsa_master_setup(dp->master, dp); -@@ -1042,6 +1044,8 @@ static int dsa_tree_setup_master(struct +@@ -1064,6 +1066,8 @@ static int dsa_tree_setup_master(struct } } @@ -48,7 +48,7 @@ Signed-off-by: David S. Miller return 0; } -@@ -1049,9 +1053,13 @@ static void dsa_tree_teardown_master(str +@@ -1071,9 +1075,13 @@ static void dsa_tree_teardown_master(str { struct dsa_port *dp; diff --git a/target/linux/generic/backport-5.15/765-v5.17-05-net-next-net-dsa-first-set-up-shared-ports-then-non-shared-po.patch b/target/linux/generic/backport-5.15/765-v5.17-05-net-next-net-dsa-first-set-up-shared-ports-then-non-shared-po.patch index e6472c61d..fbb9c94ec 100644 --- a/target/linux/generic/backport-5.15/765-v5.17-05-net-next-net-dsa-first-set-up-shared-ports-then-non-shared-po.patch +++ b/target/linux/generic/backport-5.15/765-v5.17-05-net-next-net-dsa-first-set-up-shared-ports-then-non-shared-po.patch @@ -27,7 +27,7 @@ Signed-off-by: David S. Miller --- a/net/dsa/dsa2.c +++ b/net/dsa/dsa2.c -@@ -999,23 +999,28 @@ static void dsa_tree_teardown_switches(s +@@ -1021,23 +1021,28 @@ static void dsa_tree_teardown_switches(s dsa_switch_teardown(dp->ds); } @@ -66,7 +66,7 @@ Signed-off-by: David S. Miller } } -@@ -1024,7 +1029,21 @@ static int dsa_tree_setup_switches(struc +@@ -1046,7 +1051,21 @@ static int dsa_tree_setup_switches(struc teardown: dsa_tree_teardown_ports(dst); @@ -89,7 +89,7 @@ Signed-off-by: David S. Miller return err; } -@@ -1111,10 +1130,14 @@ static int dsa_tree_setup(struct dsa_swi +@@ -1133,10 +1152,14 @@ static int dsa_tree_setup(struct dsa_swi if (err) goto teardown_cpu_ports; @@ -105,7 +105,7 @@ Signed-off-by: David S. Miller err = dsa_tree_setup_lags(dst); if (err) goto teardown_master; -@@ -1127,8 +1150,9 @@ static int dsa_tree_setup(struct dsa_swi +@@ -1149,8 +1172,9 @@ static int dsa_tree_setup(struct dsa_swi teardown_master: dsa_tree_teardown_master(dst); diff --git a/target/linux/generic/backport-5.15/765-v5.17-06-net-next-net-dsa-setup-master-before-ports.patch b/target/linux/generic/backport-5.15/765-v5.17-06-net-next-net-dsa-setup-master-before-ports.patch index 93cad0c98..a46e06ef8 100644 --- a/target/linux/generic/backport-5.15/765-v5.17-06-net-next-net-dsa-setup-master-before-ports.patch +++ b/target/linux/generic/backport-5.15/765-v5.17-06-net-next-net-dsa-setup-master-before-ports.patch @@ -43,7 +43,7 @@ Signed-off-by: David S. Miller --- a/net/dsa/dsa2.c +++ b/net/dsa/dsa2.c -@@ -545,6 +545,7 @@ static void dsa_port_teardown(struct dsa +@@ -567,6 +567,7 @@ static void dsa_port_teardown(struct dsa struct devlink_port *dlp = &dp->devlink_port; struct dsa_switch *ds = dp->ds; struct dsa_mac_addr *a, *tmp; @@ -51,7 +51,7 @@ Signed-off-by: David S. Miller if (!dp->setup) return; -@@ -566,9 +567,11 @@ static void dsa_port_teardown(struct dsa +@@ -588,9 +589,11 @@ static void dsa_port_teardown(struct dsa dsa_port_link_unregister_of(dp); break; case DSA_PORT_TYPE_USER: @@ -65,7 +65,7 @@ Signed-off-by: David S. Miller } break; } -@@ -1130,17 +1133,17 @@ static int dsa_tree_setup(struct dsa_swi +@@ -1152,17 +1155,17 @@ static int dsa_tree_setup(struct dsa_swi if (err) goto teardown_cpu_ports; @@ -87,7 +87,7 @@ Signed-off-by: David S. Miller dst->setup = true; -@@ -1148,10 +1151,10 @@ static int dsa_tree_setup(struct dsa_swi +@@ -1170,10 +1173,10 @@ static int dsa_tree_setup(struct dsa_swi return 0; @@ -100,7 +100,7 @@ Signed-off-by: David S. Miller teardown_switches: dsa_tree_teardown_switches(dst); teardown_cpu_ports: -@@ -1169,10 +1172,10 @@ static void dsa_tree_teardown(struct dsa +@@ -1191,10 +1194,10 @@ static void dsa_tree_teardown(struct dsa dsa_tree_teardown_lags(dst); diff --git a/target/linux/generic/backport-5.15/766-v5.18-01-net-dsa-provide-switch-operations-for-tracking-the-m.patch b/target/linux/generic/backport-5.15/766-v5.18-01-net-dsa-provide-switch-operations-for-tracking-the-m.patch index bffdcb288..15122950c 100644 --- a/target/linux/generic/backport-5.15/766-v5.18-01-net-dsa-provide-switch-operations-for-tracking-the-m.patch +++ b/target/linux/generic/backport-5.15/766-v5.18-01-net-dsa-provide-switch-operations-for-tracking-the-m.patch @@ -68,7 +68,7 @@ Signed-off-by: David S. Miller static inline bool dsa_is_unused_port(struct dsa_switch *ds, int p) { return dsa_to_port(ds, p)->type == DSA_PORT_TYPE_UNUSED; -@@ -949,6 +959,13 @@ struct dsa_switch_ops { +@@ -957,6 +967,13 @@ struct dsa_switch_ops { int (*tag_8021q_vlan_add)(struct dsa_switch *ds, int port, u16 vid, u16 flags); int (*tag_8021q_vlan_del)(struct dsa_switch *ds, int port, u16 vid); @@ -84,7 +84,7 @@ Signed-off-by: David S. Miller #define DSA_DEVLINK_PARAM_DRIVER(_id, _name, _type, _cmodes) \ --- a/net/dsa/dsa2.c +++ b/net/dsa/dsa2.c -@@ -1275,6 +1275,52 @@ out_unlock: +@@ -1297,6 +1297,52 @@ out_unlock: return err; } diff --git a/target/linux/generic/backport-5.15/766-v5.18-02-net-dsa-replay-master-state-events-in-dsa_tree_-setu.patch b/target/linux/generic/backport-5.15/766-v5.18-02-net-dsa-replay-master-state-events-in-dsa_tree_-setu.patch index 6478d580c..c55c5271d 100644 --- a/target/linux/generic/backport-5.15/766-v5.18-02-net-dsa-replay-master-state-events-in-dsa_tree_-setu.patch +++ b/target/linux/generic/backport-5.15/766-v5.18-02-net-dsa-replay-master-state-events-in-dsa_tree_-setu.patch @@ -44,7 +44,7 @@ Signed-off-by: David S. Miller #include "dsa_priv.h" -@@ -1060,9 +1061,18 @@ static int dsa_tree_setup_master(struct +@@ -1082,9 +1083,18 @@ static int dsa_tree_setup_master(struct list_for_each_entry(dp, &dst->ports, list) { if (dsa_port_is_cpu(dp)) { @@ -64,7 +64,7 @@ Signed-off-by: David S. Miller } } -@@ -1077,9 +1087,19 @@ static void dsa_tree_teardown_master(str +@@ -1099,9 +1109,19 @@ static void dsa_tree_teardown_master(str rtnl_lock(); diff --git a/target/linux/generic/backport-5.15/767-v5.18-net-dsa-qca8k-check-correct-variable-in-qca8k_phy_et.patch b/target/linux/generic/backport-5.15/767-v5.18-net-dsa-qca8k-check-correct-variable-in-qca8k_phy_et.patch new file mode 100644 index 000000000..34607c223 --- /dev/null +++ b/target/linux/generic/backport-5.15/767-v5.18-net-dsa-qca8k-check-correct-variable-in-qca8k_phy_et.patch @@ -0,0 +1,28 @@ +From c3664d913dc115cab4a5fdb5634df4887048000e Mon Sep 17 00:00:00 2001 +From: Dan Carpenter +Date: Fri, 4 Feb 2022 13:03:36 +0300 +Subject: [PATCH 1/1] net: dsa: qca8k: check correct variable in + qca8k_phy_eth_command() + +This is a copy and paste bug. It was supposed to check "clear_skb" +instead of "write_skb". + +Fixes: 2cd548566384 ("net: dsa: qca8k: add support for phy read/write with mgmt Ethernet") +Signed-off-by: Dan Carpenter +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca8k.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/dsa/qca8k.c ++++ b/drivers/net/dsa/qca8k.c +@@ -1018,7 +1018,7 @@ qca8k_phy_eth_command(struct qca8k_priv + + clear_skb = qca8k_alloc_mdio_header(MDIO_WRITE, QCA8K_MDIO_MASTER_CTRL, &clear_val, + QCA8K_ETHERNET_PHY_PRIORITY, sizeof(clear_val)); +- if (!write_skb) { ++ if (!clear_skb) { + ret = -ENOMEM; + goto err_clear_skb; + } diff --git a/target/linux/generic/backport-5.15/768-v5.18-net-dsa-qca8k-fix-noderef.cocci-warnings.patch b/target/linux/generic/backport-5.15/768-v5.18-net-dsa-qca8k-fix-noderef.cocci-warnings.patch new file mode 100644 index 000000000..d8cf26630 --- /dev/null +++ b/target/linux/generic/backport-5.15/768-v5.18-net-dsa-qca8k-fix-noderef.cocci-warnings.patch @@ -0,0 +1,34 @@ +From 4f5e483b8c7a644733db941a1ae00173baa7b463 Mon Sep 17 00:00:00 2001 +From: kernel test robot +Date: Thu, 10 Feb 2022 06:13:04 +0800 +Subject: [PATCH 1/1] net: dsa: qca8k: fix noderef.cocci warnings + +drivers/net/dsa/qca8k.c:422:37-43: ERROR: application of sizeof to pointer + + sizeof when applied to a pointer typed expression gives the size of + the pointer + +Generated by: scripts/coccinelle/misc/noderef.cocci + +Fixes: 90386223f44e ("net: dsa: qca8k: add support for larger read/write size with mgmt Ethernet") +CC: Ansuel Smith +Reported-by: kernel test robot +Signed-off-by: kernel test robot +Reviewed-by: Florian Fainelli +Link: https://lore.kernel.org/r/20220209221304.GA17529@d2214a582157 +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/qca8k.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/dsa/qca8k.c ++++ b/drivers/net/dsa/qca8k.c +@@ -456,7 +456,7 @@ qca8k_regmap_read(void *ctx, uint32_t re + u16 r1, r2, page; + int ret; + +- if (!qca8k_read_eth(priv, reg, val, sizeof(val))) ++ if (!qca8k_read_eth(priv, reg, val, sizeof(*val))) + return 0; + + qca8k_split_addr(reg, &r1, &r2, &page); diff --git a/target/linux/generic/backport-5.15/769-v5.19-01-net-dsa-qca8k-drop-MTU-tracking-from-qca8k_priv.patch b/target/linux/generic/backport-5.15/769-v5.19-01-net-dsa-qca8k-drop-MTU-tracking-from-qca8k_priv.patch new file mode 100644 index 000000000..57df4c126 --- /dev/null +++ b/target/linux/generic/backport-5.15/769-v5.19-01-net-dsa-qca8k-drop-MTU-tracking-from-qca8k_priv.patch @@ -0,0 +1,79 @@ +From 69fd055957a02309ffdc23d887a01988b6e5bab1 Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Sat, 16 Apr 2022 01:30:12 +0200 +Subject: [PATCH 1/6] net: dsa: qca8k: drop MTU tracking from qca8k_priv + +DSA set the CPU port based on the largest MTU of all the slave ports. +Based on this we can drop the MTU array from qca8k_priv and set the +port_change_mtu logic on DSA changing MTU of the CPU port as the switch +have a global MTU settingfor each port. + +Signed-off-by: Ansuel Smith +Reviewed-by: Vladimir Oltean +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca8k.c | 26 +++++++++----------------- + drivers/net/dsa/qca8k.h | 1 - + 2 files changed, 9 insertions(+), 18 deletions(-) + +--- a/drivers/net/dsa/qca8k.c ++++ b/drivers/net/dsa/qca8k.c +@@ -1803,16 +1803,6 @@ qca8k_setup(struct dsa_switch *ds) + QCA8K_PORT_HOL_CTRL1_WRED_EN, + mask); + } +- +- /* Set initial MTU for every port. +- * We have only have a general MTU setting. So track +- * every port and set the max across all port. +- * Set per port MTU to 1500 as the MTU change function +- * will add the overhead and if its set to 1518 then it +- * will apply the overhead again and we will end up with +- * MTU of 1536 instead of 1518 +- */ +- priv->port_mtu[i] = ETH_DATA_LEN; + } + + /* Special GLOBAL_FC_THRESH value are needed for ar8327 switch */ +@@ -2525,13 +2515,16 @@ static int + qca8k_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) + { + struct qca8k_priv *priv = ds->priv; +- int ret, i, mtu = 0; +- +- priv->port_mtu[port] = new_mtu; ++ int ret; + +- for (i = 0; i < QCA8K_NUM_PORTS; i++) +- if (priv->port_mtu[i] > mtu) +- mtu = priv->port_mtu[i]; ++ /* We have only have a general MTU setting. ++ * DSA always set the CPU port's MTU to the largest MTU of the slave ++ * ports. ++ * Setting MTU just for the CPU port is sufficient to correctly set a ++ * value for every port. ++ */ ++ if (!dsa_is_cpu_port(ds, port)) ++ return 0; + + /* To change the MAX_FRAME_SIZE the cpu ports must be off or + * the switch panics. +@@ -2545,7 +2538,7 @@ qca8k_port_change_mtu(struct dsa_switch + qca8k_port_set_status(priv, 6, 0); + + /* Include L2 header / FCS length */ +- ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, mtu + ETH_HLEN + ETH_FCS_LEN); ++ ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, new_mtu + ETH_HLEN + ETH_FCS_LEN); + + if (priv->port_sts[0].enabled) + qca8k_port_set_status(priv, 0, 1); +--- a/drivers/net/dsa/qca8k.h ++++ b/drivers/net/dsa/qca8k.h +@@ -392,7 +392,6 @@ struct qca8k_priv { + struct device *dev; + struct dsa_switch_ops ops; + struct gpio_desc *reset_gpio; +- unsigned int port_mtu[QCA8K_NUM_PORTS]; + struct net_device *mgmt_master; /* Track if mdio/mib Ethernet is available */ + struct qca8k_mgmt_eth_data mgmt_eth_data; + struct qca8k_mib_eth_data mib_eth_data; diff --git a/target/linux/generic/backport-5.15/769-v5.19-02-net-dsa-qca8k-drop-port_sts-from-qca8k_priv.patch b/target/linux/generic/backport-5.15/769-v5.19-02-net-dsa-qca8k-drop-port_sts-from-qca8k_priv.patch new file mode 100644 index 000000000..3cacd7e4f --- /dev/null +++ b/target/linux/generic/backport-5.15/769-v5.19-02-net-dsa-qca8k-drop-port_sts-from-qca8k_priv.patch @@ -0,0 +1,116 @@ +From 2b8fd87af7f156942971789abac8ee2bb60c03bc Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Sat, 16 Apr 2022 01:30:13 +0200 +Subject: [PATCH 2/6] net: dsa: qca8k: drop port_sts from qca8k_priv + +Port_sts is a thing of the past for this driver. It was something +present on the initial implementation of this driver and parts of the +original struct were dropped over time. Using an array of int to store if +a port is enabled or not to handle PM operation seems overkill. Switch +and use a simple u8 to store the port status where each bit correspond +to a port. (bit is set port is enabled, bit is not set, port is disabled) +Also add some comments to better describe why we need to track port +status. + +Signed-off-by: Ansuel Smith +Reviewed-by: Vladimir Oltean +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca8k.c | 15 +++++++++------ + drivers/net/dsa/qca8k.h | 9 ++++----- + 2 files changed, 13 insertions(+), 11 deletions(-) + +--- a/drivers/net/dsa/qca8k.c ++++ b/drivers/net/dsa/qca8k.c +@@ -2494,7 +2494,7 @@ qca8k_port_enable(struct dsa_switch *ds, + struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; + + qca8k_port_set_status(priv, port, 1); +- priv->port_sts[port].enabled = 1; ++ priv->port_enabled_map |= BIT(port); + + if (dsa_is_user_port(ds, port)) + phy_support_asym_pause(phy); +@@ -2508,7 +2508,7 @@ qca8k_port_disable(struct dsa_switch *ds + struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; + + qca8k_port_set_status(priv, port, 0); +- priv->port_sts[port].enabled = 0; ++ priv->port_enabled_map &= ~BIT(port); + } + + static int +@@ -2531,19 +2531,19 @@ qca8k_port_change_mtu(struct dsa_switch + * Turn off both cpu ports before applying the new value to prevent + * this. + */ +- if (priv->port_sts[0].enabled) ++ if (priv->port_enabled_map & BIT(0)) + qca8k_port_set_status(priv, 0, 0); + +- if (priv->port_sts[6].enabled) ++ if (priv->port_enabled_map & BIT(6)) + qca8k_port_set_status(priv, 6, 0); + + /* Include L2 header / FCS length */ + ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, new_mtu + ETH_HLEN + ETH_FCS_LEN); + +- if (priv->port_sts[0].enabled) ++ if (priv->port_enabled_map & BIT(0)) + qca8k_port_set_status(priv, 0, 1); + +- if (priv->port_sts[6].enabled) ++ if (priv->port_enabled_map & BIT(6)) + qca8k_port_set_status(priv, 6, 1); + + return ret; +@@ -3199,13 +3199,16 @@ static void qca8k_sw_shutdown(struct mdi + static void + qca8k_set_pm(struct qca8k_priv *priv, int enable) + { +- int i; ++ int port; + +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { +- if (!priv->port_sts[i].enabled) ++ for (port = 0; port < QCA8K_NUM_PORTS; port++) { ++ /* Do not enable on resume if the port was ++ * disabled before. ++ */ ++ if (!(priv->port_enabled_map & BIT(port))) + continue; + +- qca8k_port_set_status(priv, i, enable); ++ qca8k_port_set_status(priv, port, enable); + } + } + +--- a/drivers/net/dsa/qca8k.h ++++ b/drivers/net/dsa/qca8k.h +@@ -324,10 +324,6 @@ enum qca8k_mid_cmd { + QCA8K_MIB_CAST = 3, + }; + +-struct ar8xxx_port_status { +- int enabled; +-}; +- + struct qca8k_match_data { + u8 id; + bool reduced_package; +@@ -382,11 +378,14 @@ struct qca8k_priv { + u8 mirror_rx; + u8 mirror_tx; + u8 lag_hash_mode; ++ /* Each bit correspond to a port. This switch can support a max of 7 port. ++ * Bit 1: port enabled. Bit 0: port disabled. ++ */ ++ u8 port_enabled_map; + bool legacy_phy_port_mapping; + struct qca8k_ports_config ports_config; + struct regmap *regmap; + struct mii_bus *bus; +- struct ar8xxx_port_status port_sts[QCA8K_NUM_PORTS]; + struct dsa_switch *ds; + struct mutex reg_mutex; + struct device *dev; diff --git a/target/linux/generic/backport-5.15/769-v5.19-03-net-dsa-qca8k-rework-and-simplify-mdiobus-logic.patch b/target/linux/generic/backport-5.15/769-v5.19-03-net-dsa-qca8k-rework-and-simplify-mdiobus-logic.patch new file mode 100644 index 000000000..12c322107 --- /dev/null +++ b/target/linux/generic/backport-5.15/769-v5.19-03-net-dsa-qca8k-rework-and-simplify-mdiobus-logic.patch @@ -0,0 +1,173 @@ +From 8255212e4130bd2dc1463286a3dddb74797bbdc1 Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Sat, 16 Apr 2022 01:30:14 +0200 +Subject: [PATCH 3/6] net: dsa: qca8k: rework and simplify mdiobus logic + +In an attempt to reduce qca8k_priv space, rework and simplify mdiobus +logic. +We now declare a mdiobus instead of relying on DSA phy_read/write even +if a mdio node is not present. This is all to make the qca8k ops static +and not switch specific. With a legacy implementation where port doesn't +have a phy map declared in the dts with a mdio node, we declare a +'qca8k-legacy' mdiobus. The conversion logic is used as legacy read and +write ops are used instead of the internal one. +Also drop the legacy_phy_port_mapping as we now declare mdiobus with ops +that already address the workaround. + +Signed-off-by: Ansuel Smith +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca8k.c | 95 +++++++++++++---------------------------- + drivers/net/dsa/qca8k.h | 1 - + 2 files changed, 29 insertions(+), 67 deletions(-) + +--- a/drivers/net/dsa/qca8k.c ++++ b/drivers/net/dsa/qca8k.c +@@ -1291,83 +1291,63 @@ qca8k_internal_mdio_read(struct mii_bus + } + + static int +-qca8k_phy_write(struct dsa_switch *ds, int port, int regnum, u16 data) ++qca8k_legacy_mdio_write(struct mii_bus *slave_bus, int port, int regnum, u16 data) + { +- struct qca8k_priv *priv = ds->priv; +- int ret; ++ port = qca8k_port_to_phy(port) % PHY_MAX_ADDR; + +- /* Check if the legacy mapping should be used and the +- * port is not correctly mapped to the right PHY in the +- * devicetree +- */ +- if (priv->legacy_phy_port_mapping) +- port = qca8k_port_to_phy(port) % PHY_MAX_ADDR; +- +- /* Use mdio Ethernet when available, fallback to legacy one on error */ +- ret = qca8k_phy_eth_command(priv, false, port, regnum, 0); +- if (!ret) +- return ret; +- +- return qca8k_mdio_write(priv, port, regnum, data); ++ return qca8k_internal_mdio_write(slave_bus, port, regnum, data); + } + + static int +-qca8k_phy_read(struct dsa_switch *ds, int port, int regnum) ++qca8k_legacy_mdio_read(struct mii_bus *slave_bus, int port, int regnum) + { +- struct qca8k_priv *priv = ds->priv; +- int ret; +- +- /* Check if the legacy mapping should be used and the +- * port is not correctly mapped to the right PHY in the +- * devicetree +- */ +- if (priv->legacy_phy_port_mapping) +- port = qca8k_port_to_phy(port) % PHY_MAX_ADDR; +- +- /* Use mdio Ethernet when available, fallback to legacy one on error */ +- ret = qca8k_phy_eth_command(priv, true, port, regnum, 0); +- if (ret >= 0) +- return ret; +- +- ret = qca8k_mdio_read(priv, port, regnum); +- +- if (ret < 0) +- return 0xffff; ++ port = qca8k_port_to_phy(port) % PHY_MAX_ADDR; + +- return ret; ++ return qca8k_internal_mdio_read(slave_bus, port, regnum); + } + + static int +-qca8k_mdio_register(struct qca8k_priv *priv, struct device_node *mdio) ++qca8k_mdio_register(struct qca8k_priv *priv) + { + struct dsa_switch *ds = priv->ds; ++ struct device_node *mdio; + struct mii_bus *bus; + + bus = devm_mdiobus_alloc(ds->dev); +- + if (!bus) + return -ENOMEM; + + bus->priv = (void *)priv; +- bus->name = "qca8k slave mii"; +- bus->read = qca8k_internal_mdio_read; +- bus->write = qca8k_internal_mdio_write; +- snprintf(bus->id, MII_BUS_ID_SIZE, "qca8k-%d", +- ds->index); +- + bus->parent = ds->dev; + bus->phy_mask = ~ds->phys_mii_mask; +- + ds->slave_mii_bus = bus; + +- return devm_of_mdiobus_register(priv->dev, bus, mdio); ++ /* Check if the devicetree declare the port:phy mapping */ ++ mdio = of_get_child_by_name(priv->dev->of_node, "mdio"); ++ if (of_device_is_available(mdio)) { ++ snprintf(bus->id, MII_BUS_ID_SIZE, "qca8k-%d", ds->index); ++ bus->name = "qca8k slave mii"; ++ bus->read = qca8k_internal_mdio_read; ++ bus->write = qca8k_internal_mdio_write; ++ return devm_of_mdiobus_register(priv->dev, bus, mdio); ++ } ++ ++ /* If a mapping can't be found the legacy mapping is used, ++ * using the qca8k_port_to_phy function ++ */ ++ snprintf(bus->id, MII_BUS_ID_SIZE, "qca8k-%d.%d", ++ ds->dst->index, ds->index); ++ bus->name = "qca8k-legacy slave mii"; ++ bus->read = qca8k_legacy_mdio_read; ++ bus->write = qca8k_legacy_mdio_write; ++ return devm_mdiobus_register(priv->dev, bus); + } + + static int + qca8k_setup_mdio_bus(struct qca8k_priv *priv) + { + u32 internal_mdio_mask = 0, external_mdio_mask = 0, reg; +- struct device_node *ports, *port, *mdio; ++ struct device_node *ports, *port; + phy_interface_t mode; + int err; + +@@ -1429,24 +1409,7 @@ qca8k_setup_mdio_bus(struct qca8k_priv * + QCA8K_MDIO_MASTER_EN); + } + +- /* Check if the devicetree declare the port:phy mapping */ +- mdio = of_get_child_by_name(priv->dev->of_node, "mdio"); +- if (of_device_is_available(mdio)) { +- err = qca8k_mdio_register(priv, mdio); +- if (err) +- of_node_put(mdio); +- +- return err; +- } +- +- /* If a mapping can't be found the legacy mapping is used, +- * using the qca8k_port_to_phy function +- */ +- priv->legacy_phy_port_mapping = true; +- priv->ops.phy_read = qca8k_phy_read; +- priv->ops.phy_write = qca8k_phy_write; +- +- return 0; ++ return qca8k_mdio_register(priv); + } + + static int +--- a/drivers/net/dsa/qca8k.h ++++ b/drivers/net/dsa/qca8k.h +@@ -382,7 +382,6 @@ struct qca8k_priv { + * Bit 1: port enabled. Bit 0: port disabled. + */ + u8 port_enabled_map; +- bool legacy_phy_port_mapping; + struct qca8k_ports_config ports_config; + struct regmap *regmap; + struct mii_bus *bus; diff --git a/target/linux/generic/backport-5.15/769-v5.19-04-net-dsa-qca8k-drop-dsa_switch_ops-from-qca8k_priv.patch b/target/linux/generic/backport-5.15/769-v5.19-04-net-dsa-qca8k-drop-dsa_switch_ops-from-qca8k_priv.patch new file mode 100644 index 000000000..8641000ab --- /dev/null +++ b/target/linux/generic/backport-5.15/769-v5.19-04-net-dsa-qca8k-drop-dsa_switch_ops-from-qca8k_priv.patch @@ -0,0 +1,39 @@ +From 2349b83a2486c55b9dd225326f0172a84a43c5e4 Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Sat, 16 Apr 2022 01:30:15 +0200 +Subject: [PATCH 4/6] net: dsa: qca8k: drop dsa_switch_ops from qca8k_priv + +Now that dsa_switch_ops is not switch specific anymore, we can drop it +from qca8k_priv and use the static ops directly for the dsa_switch +pointer. + +Signed-off-by: Ansuel Smith +Reviewed-by: Vladimir Oltean +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca8k.c | 3 +-- + drivers/net/dsa/qca8k.h | 1 - + 2 files changed, 1 insertion(+), 3 deletions(-) + +--- a/drivers/net/dsa/qca8k.c ++++ b/drivers/net/dsa/qca8k.c +@@ -3121,8 +3121,7 @@ qca8k_sw_probe(struct mdio_device *mdiod + priv->ds->dev = &mdiodev->dev; + priv->ds->num_ports = QCA8K_NUM_PORTS; + priv->ds->priv = priv; +- priv->ops = qca8k_switch_ops; +- priv->ds->ops = &priv->ops; ++ priv->ds->ops = &qca8k_switch_ops; + mutex_init(&priv->reg_mutex); + dev_set_drvdata(&mdiodev->dev, priv); + +--- a/drivers/net/dsa/qca8k.h ++++ b/drivers/net/dsa/qca8k.h +@@ -388,7 +388,6 @@ struct qca8k_priv { + struct dsa_switch *ds; + struct mutex reg_mutex; + struct device *dev; +- struct dsa_switch_ops ops; + struct gpio_desc *reset_gpio; + struct net_device *mgmt_master; /* Track if mdio/mib Ethernet is available */ + struct qca8k_mgmt_eth_data mgmt_eth_data; diff --git a/target/linux/generic/backport-5.15/769-v5.19-05-net-dsa-qca8k-correctly-handle-mdio-read-error.patch b/target/linux/generic/backport-5.15/769-v5.19-05-net-dsa-qca8k-correctly-handle-mdio-read-error.patch new file mode 100644 index 000000000..b14b22091 --- /dev/null +++ b/target/linux/generic/backport-5.15/769-v5.19-05-net-dsa-qca8k-correctly-handle-mdio-read-error.patch @@ -0,0 +1,33 @@ +From 6cfc03b602200c5cbbd8d906fd905547814e83df Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Sat, 16 Apr 2022 01:30:16 +0200 +Subject: [PATCH 5/6] net: dsa: qca8k: correctly handle mdio read error + +Restore original way to handle mdio read error by returning 0xffff. +This was wrongly changed when the internal_mdio_read was introduced, +now that both legacy and internal use the same function, make sure that +they behave the same way. + +Fixes: ce062a0adbfe ("net: dsa: qca8k: fix kernel panic with legacy mdio mapping") +Signed-off-by: Ansuel Smith +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca8k.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +--- a/drivers/net/dsa/qca8k.c ++++ b/drivers/net/dsa/qca8k.c +@@ -1287,7 +1287,12 @@ qca8k_internal_mdio_read(struct mii_bus + if (ret >= 0) + return ret; + +- return qca8k_mdio_read(priv, phy, regnum); ++ ret = qca8k_mdio_read(priv, phy, regnum); ++ ++ if (ret < 0) ++ return 0xffff; ++ ++ return ret; + } + + static int diff --git a/target/linux/generic/backport-5.15/769-v5.19-06-net-dsa-qca8k-unify-bus-id-naming-with-legacy-and-OF.patch b/target/linux/generic/backport-5.15/769-v5.19-06-net-dsa-qca8k-unify-bus-id-naming-with-legacy-and-OF.patch new file mode 100644 index 000000000..094686f11 --- /dev/null +++ b/target/linux/generic/backport-5.15/769-v5.19-06-net-dsa-qca8k-unify-bus-id-naming-with-legacy-and-OF.patch @@ -0,0 +1,44 @@ +From 8d1af50842bf2774f4edc57054206e909117469b Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Sat, 16 Apr 2022 01:30:17 +0200 +Subject: [PATCH 6/6] net: dsa: qca8k: unify bus id naming with legacy and OF + mdio bus + +Add support for multiple switch with OF mdio bus declaration. +Unify the bus id naming and use the same logic for both legacy and OF +mdio bus. + +Signed-off-by: Ansuel Smith +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca8k.c | 5 ++--- + 1 file changed, 2 insertions(+), 3 deletions(-) + +--- a/drivers/net/dsa/qca8k.c ++++ b/drivers/net/dsa/qca8k.c +@@ -1323,6 +1323,8 @@ qca8k_mdio_register(struct qca8k_priv *p + return -ENOMEM; + + bus->priv = (void *)priv; ++ snprintf(bus->id, MII_BUS_ID_SIZE, "qca8k-%d.%d", ++ ds->dst->index, ds->index); + bus->parent = ds->dev; + bus->phy_mask = ~ds->phys_mii_mask; + ds->slave_mii_bus = bus; +@@ -1330,7 +1332,6 @@ qca8k_mdio_register(struct qca8k_priv *p + /* Check if the devicetree declare the port:phy mapping */ + mdio = of_get_child_by_name(priv->dev->of_node, "mdio"); + if (of_device_is_available(mdio)) { +- snprintf(bus->id, MII_BUS_ID_SIZE, "qca8k-%d", ds->index); + bus->name = "qca8k slave mii"; + bus->read = qca8k_internal_mdio_read; + bus->write = qca8k_internal_mdio_write; +@@ -1340,8 +1341,6 @@ qca8k_mdio_register(struct qca8k_priv *p + /* If a mapping can't be found the legacy mapping is used, + * using the qca8k_port_to_phy function + */ +- snprintf(bus->id, MII_BUS_ID_SIZE, "qca8k-%d.%d", +- ds->dst->index, ds->index); + bus->name = "qca8k-legacy slave mii"; + bus->read = qca8k_legacy_mdio_read; + bus->write = qca8k_legacy_mdio_write; diff --git a/target/linux/generic/backport-5.15/770-v6.0-net-dsa-qca8k-move-driver-to-qca-dir.patch b/target/linux/generic/backport-5.15/770-v6.0-net-dsa-qca8k-move-driver-to-qca-dir.patch new file mode 100644 index 000000000..1534113f1 --- /dev/null +++ b/target/linux/generic/backport-5.15/770-v6.0-net-dsa-qca8k-move-driver-to-qca-dir.patch @@ -0,0 +1,7389 @@ +From 4bbaf764e1e1786eb937fdb62172f656f512e116 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 13 Jul 2022 22:53:50 +0200 +Subject: [PATCH 1/1] net: dsa: qca8k: move driver to qca dir + +Move qca8k driver to qca dir in preparation for code split and +introduction of ipq4019 switch based on qca8k. + +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/dsa/Kconfig | 8 -------- + drivers/net/dsa/Makefile | 1 - + drivers/net/dsa/qca/Kconfig | 8 ++++++++ + drivers/net/dsa/qca/Makefile | 1 + + drivers/net/dsa/{ => qca}/qca8k.c | 0 + drivers/net/dsa/{ => qca}/qca8k.h | 0 + 6 files changed, 9 insertions(+), 9 deletions(-) + rename drivers/net/dsa/{ => qca}/qca8k.c (100%) + rename drivers/net/dsa/{ => qca}/qca8k.h (100%) + +--- a/drivers/net/dsa/Kconfig ++++ b/drivers/net/dsa/Kconfig +@@ -60,14 +60,6 @@ source "drivers/net/dsa/sja1105/Kconfig" + + source "drivers/net/dsa/xrs700x/Kconfig" + +-config NET_DSA_QCA8K +- tristate "Qualcomm Atheros QCA8K Ethernet switch family support" +- select NET_DSA_TAG_QCA +- select REGMAP +- help +- This enables support for the Qualcomm Atheros QCA8K Ethernet +- switch chips. +- + config NET_DSA_REALTEK_SMI + tristate "Realtek SMI Ethernet switch family support" + select NET_DSA_TAG_RTL4_A +--- a/drivers/net/dsa/Makefile ++++ b/drivers/net/dsa/Makefile +@@ -8,7 +8,6 @@ endif + obj-$(CONFIG_NET_DSA_LANTIQ_GSWIP) += lantiq_gswip.o + obj-$(CONFIG_NET_DSA_MT7530) += mt7530.o + obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o +-obj-$(CONFIG_NET_DSA_QCA8K) += qca8k.o + obj-$(CONFIG_NET_DSA_REALTEK_SMI) += realtek-smi.o + realtek-smi-objs := realtek-smi-core.o rtl8366.o rtl8366rb.o + obj-$(CONFIG_NET_DSA_SMSC_LAN9303) += lan9303-core.o +--- a/drivers/net/dsa/qca/Kconfig ++++ b/drivers/net/dsa/qca/Kconfig +@@ -7,3 +7,11 @@ config NET_DSA_AR9331 + help + This enables support for the Qualcomm Atheros AR9331 built-in Ethernet + switch. ++ ++config NET_DSA_QCA8K ++ tristate "Qualcomm Atheros QCA8K Ethernet switch family support" ++ select NET_DSA_TAG_QCA ++ select REGMAP ++ help ++ This enables support for the Qualcomm Atheros QCA8K Ethernet ++ switch chips. +--- a/drivers/net/dsa/qca/Makefile ++++ b/drivers/net/dsa/qca/Makefile +@@ -1,2 +1,3 @@ + # SPDX-License-Identifier: GPL-2.0-only + obj-$(CONFIG_NET_DSA_AR9331) += ar9331.o ++obj-$(CONFIG_NET_DSA_QCA8K) += qca8k.o +--- /dev/null ++++ b/drivers/net/dsa/qca/qca8k.c +@@ -0,0 +1,3243 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2009 Felix Fietkau ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * Copyright (c) 2015, 2019, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2016 John Crispin ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "qca8k.h" ++ ++#define MIB_DESC(_s, _o, _n) \ ++ { \ ++ .size = (_s), \ ++ .offset = (_o), \ ++ .name = (_n), \ ++ } ++ ++static const struct qca8k_mib_desc ar8327_mib[] = { ++ MIB_DESC(1, 0x00, "RxBroad"), ++ MIB_DESC(1, 0x04, "RxPause"), ++ MIB_DESC(1, 0x08, "RxMulti"), ++ MIB_DESC(1, 0x0c, "RxFcsErr"), ++ MIB_DESC(1, 0x10, "RxAlignErr"), ++ MIB_DESC(1, 0x14, "RxRunt"), ++ MIB_DESC(1, 0x18, "RxFragment"), ++ MIB_DESC(1, 0x1c, "Rx64Byte"), ++ MIB_DESC(1, 0x20, "Rx128Byte"), ++ MIB_DESC(1, 0x24, "Rx256Byte"), ++ MIB_DESC(1, 0x28, "Rx512Byte"), ++ MIB_DESC(1, 0x2c, "Rx1024Byte"), ++ MIB_DESC(1, 0x30, "Rx1518Byte"), ++ MIB_DESC(1, 0x34, "RxMaxByte"), ++ MIB_DESC(1, 0x38, "RxTooLong"), ++ MIB_DESC(2, 0x3c, "RxGoodByte"), ++ MIB_DESC(2, 0x44, "RxBadByte"), ++ MIB_DESC(1, 0x4c, "RxOverFlow"), ++ MIB_DESC(1, 0x50, "Filtered"), ++ MIB_DESC(1, 0x54, "TxBroad"), ++ MIB_DESC(1, 0x58, "TxPause"), ++ MIB_DESC(1, 0x5c, "TxMulti"), ++ MIB_DESC(1, 0x60, "TxUnderRun"), ++ MIB_DESC(1, 0x64, "Tx64Byte"), ++ MIB_DESC(1, 0x68, "Tx128Byte"), ++ MIB_DESC(1, 0x6c, "Tx256Byte"), ++ MIB_DESC(1, 0x70, "Tx512Byte"), ++ MIB_DESC(1, 0x74, "Tx1024Byte"), ++ MIB_DESC(1, 0x78, "Tx1518Byte"), ++ MIB_DESC(1, 0x7c, "TxMaxByte"), ++ MIB_DESC(1, 0x80, "TxOverSize"), ++ MIB_DESC(2, 0x84, "TxByte"), ++ MIB_DESC(1, 0x8c, "TxCollision"), ++ MIB_DESC(1, 0x90, "TxAbortCol"), ++ MIB_DESC(1, 0x94, "TxMultiCol"), ++ MIB_DESC(1, 0x98, "TxSingleCol"), ++ MIB_DESC(1, 0x9c, "TxExcDefer"), ++ MIB_DESC(1, 0xa0, "TxDefer"), ++ MIB_DESC(1, 0xa4, "TxLateCol"), ++ MIB_DESC(1, 0xa8, "RXUnicast"), ++ MIB_DESC(1, 0xac, "TXUnicast"), ++}; ++ ++static void ++qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page) ++{ ++ regaddr >>= 1; ++ *r1 = regaddr & 0x1e; ++ ++ regaddr >>= 5; ++ *r2 = regaddr & 0x7; ++ ++ regaddr >>= 3; ++ *page = regaddr & 0x3ff; ++} ++ ++static int ++qca8k_set_lo(struct qca8k_priv *priv, int phy_id, u32 regnum, u16 lo) ++{ ++ u16 *cached_lo = &priv->mdio_cache.lo; ++ struct mii_bus *bus = priv->bus; ++ int ret; ++ ++ if (lo == *cached_lo) ++ return 0; ++ ++ ret = bus->write(bus, phy_id, regnum, lo); ++ if (ret < 0) ++ dev_err_ratelimited(&bus->dev, ++ "failed to write qca8k 32bit lo register\n"); ++ ++ *cached_lo = lo; ++ return 0; ++} ++ ++static int ++qca8k_set_hi(struct qca8k_priv *priv, int phy_id, u32 regnum, u16 hi) ++{ ++ u16 *cached_hi = &priv->mdio_cache.hi; ++ struct mii_bus *bus = priv->bus; ++ int ret; ++ ++ if (hi == *cached_hi) ++ return 0; ++ ++ ret = bus->write(bus, phy_id, regnum, hi); ++ if (ret < 0) ++ dev_err_ratelimited(&bus->dev, ++ "failed to write qca8k 32bit hi register\n"); ++ ++ *cached_hi = hi; ++ return 0; ++} ++ ++static int ++qca8k_mii_read32(struct mii_bus *bus, int phy_id, u32 regnum, u32 *val) ++{ ++ int ret; ++ ++ ret = bus->read(bus, phy_id, regnum); ++ if (ret >= 0) { ++ *val = ret; ++ ret = bus->read(bus, phy_id, regnum + 1); ++ *val |= ret << 16; ++ } ++ ++ if (ret < 0) { ++ dev_err_ratelimited(&bus->dev, ++ "failed to read qca8k 32bit register\n"); ++ *val = 0; ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static void ++qca8k_mii_write32(struct qca8k_priv *priv, int phy_id, u32 regnum, u32 val) ++{ ++ u16 lo, hi; ++ int ret; ++ ++ lo = val & 0xffff; ++ hi = (u16)(val >> 16); ++ ++ ret = qca8k_set_lo(priv, phy_id, regnum, lo); ++ if (ret >= 0) ++ ret = qca8k_set_hi(priv, phy_id, regnum + 1, hi); ++} ++ ++static int ++qca8k_set_page(struct qca8k_priv *priv, u16 page) ++{ ++ u16 *cached_page = &priv->mdio_cache.page; ++ struct mii_bus *bus = priv->bus; ++ int ret; ++ ++ if (page == *cached_page) ++ return 0; ++ ++ ret = bus->write(bus, 0x18, 0, page); ++ if (ret < 0) { ++ dev_err_ratelimited(&bus->dev, ++ "failed to set qca8k page\n"); ++ return ret; ++ } ++ ++ *cached_page = page; ++ usleep_range(1000, 2000); ++ return 0; ++} ++ ++static int ++qca8k_read(struct qca8k_priv *priv, u32 reg, u32 *val) ++{ ++ return regmap_read(priv->regmap, reg, val); ++} ++ ++static int ++qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val) ++{ ++ return regmap_write(priv->regmap, reg, val); ++} ++ ++static int ++qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val) ++{ ++ return regmap_update_bits(priv->regmap, reg, mask, write_val); ++} ++ ++static void qca8k_rw_reg_ack_handler(struct dsa_switch *ds, struct sk_buff *skb) ++{ ++ struct qca8k_mgmt_eth_data *mgmt_eth_data; ++ struct qca8k_priv *priv = ds->priv; ++ struct qca_mgmt_ethhdr *mgmt_ethhdr; ++ u8 len, cmd; ++ ++ mgmt_ethhdr = (struct qca_mgmt_ethhdr *)skb_mac_header(skb); ++ mgmt_eth_data = &priv->mgmt_eth_data; ++ ++ cmd = FIELD_GET(QCA_HDR_MGMT_CMD, mgmt_ethhdr->command); ++ len = FIELD_GET(QCA_HDR_MGMT_LENGTH, mgmt_ethhdr->command); ++ ++ /* Make sure the seq match the requested packet */ ++ if (mgmt_ethhdr->seq == mgmt_eth_data->seq) ++ mgmt_eth_data->ack = true; ++ ++ if (cmd == MDIO_READ) { ++ mgmt_eth_data->data[0] = mgmt_ethhdr->mdio_data; ++ ++ /* Get the rest of the 12 byte of data. ++ * The read/write function will extract the requested data. ++ */ ++ if (len > QCA_HDR_MGMT_DATA1_LEN) ++ memcpy(mgmt_eth_data->data + 1, skb->data, ++ QCA_HDR_MGMT_DATA2_LEN); ++ } ++ ++ complete(&mgmt_eth_data->rw_done); ++} ++ ++static struct sk_buff *qca8k_alloc_mdio_header(enum mdio_cmd cmd, u32 reg, u32 *val, ++ int priority, unsigned int len) ++{ ++ struct qca_mgmt_ethhdr *mgmt_ethhdr; ++ unsigned int real_len; ++ struct sk_buff *skb; ++ u32 *data2; ++ u16 hdr; ++ ++ skb = dev_alloc_skb(QCA_HDR_MGMT_PKT_LEN); ++ if (!skb) ++ return NULL; ++ ++ /* Max value for len reg is 15 (0xf) but the switch actually return 16 byte ++ * Actually for some reason the steps are: ++ * 0: nothing ++ * 1-4: first 4 byte ++ * 5-6: first 12 byte ++ * 7-15: all 16 byte ++ */ ++ if (len == 16) ++ real_len = 15; ++ else ++ real_len = len; ++ ++ skb_reset_mac_header(skb); ++ skb_set_network_header(skb, skb->len); ++ ++ mgmt_ethhdr = skb_push(skb, QCA_HDR_MGMT_HEADER_LEN + QCA_HDR_LEN); ++ ++ hdr = FIELD_PREP(QCA_HDR_XMIT_VERSION, QCA_HDR_VERSION); ++ hdr |= FIELD_PREP(QCA_HDR_XMIT_PRIORITY, priority); ++ hdr |= QCA_HDR_XMIT_FROM_CPU; ++ hdr |= FIELD_PREP(QCA_HDR_XMIT_DP_BIT, BIT(0)); ++ hdr |= FIELD_PREP(QCA_HDR_XMIT_CONTROL, QCA_HDR_XMIT_TYPE_RW_REG); ++ ++ mgmt_ethhdr->command = FIELD_PREP(QCA_HDR_MGMT_ADDR, reg); ++ mgmt_ethhdr->command |= FIELD_PREP(QCA_HDR_MGMT_LENGTH, real_len); ++ mgmt_ethhdr->command |= FIELD_PREP(QCA_HDR_MGMT_CMD, cmd); ++ mgmt_ethhdr->command |= FIELD_PREP(QCA_HDR_MGMT_CHECK_CODE, ++ QCA_HDR_MGMT_CHECK_CODE_VAL); ++ ++ if (cmd == MDIO_WRITE) ++ mgmt_ethhdr->mdio_data = *val; ++ ++ mgmt_ethhdr->hdr = htons(hdr); ++ ++ data2 = skb_put_zero(skb, QCA_HDR_MGMT_DATA2_LEN + QCA_HDR_MGMT_PADDING_LEN); ++ if (cmd == MDIO_WRITE && len > QCA_HDR_MGMT_DATA1_LEN) ++ memcpy(data2, val + 1, len - QCA_HDR_MGMT_DATA1_LEN); ++ ++ return skb; ++} ++ ++static void qca8k_mdio_header_fill_seq_num(struct sk_buff *skb, u32 seq_num) ++{ ++ struct qca_mgmt_ethhdr *mgmt_ethhdr; ++ ++ mgmt_ethhdr = (struct qca_mgmt_ethhdr *)skb->data; ++ mgmt_ethhdr->seq = FIELD_PREP(QCA_HDR_MGMT_SEQ_NUM, seq_num); ++} ++ ++static int qca8k_read_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) ++{ ++ struct qca8k_mgmt_eth_data *mgmt_eth_data = &priv->mgmt_eth_data; ++ struct sk_buff *skb; ++ bool ack; ++ int ret; ++ ++ skb = qca8k_alloc_mdio_header(MDIO_READ, reg, NULL, ++ QCA8K_ETHERNET_MDIO_PRIORITY, len); ++ if (!skb) ++ return -ENOMEM; ++ ++ mutex_lock(&mgmt_eth_data->mutex); ++ ++ /* Check mgmt_master if is operational */ ++ if (!priv->mgmt_master) { ++ kfree_skb(skb); ++ mutex_unlock(&mgmt_eth_data->mutex); ++ return -EINVAL; ++ } ++ ++ skb->dev = priv->mgmt_master; ++ ++ reinit_completion(&mgmt_eth_data->rw_done); ++ ++ /* Increment seq_num and set it in the mdio pkt */ ++ mgmt_eth_data->seq++; ++ qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); ++ mgmt_eth_data->ack = false; ++ ++ dev_queue_xmit(skb); ++ ++ ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, ++ msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT)); ++ ++ *val = mgmt_eth_data->data[0]; ++ if (len > QCA_HDR_MGMT_DATA1_LEN) ++ memcpy(val + 1, mgmt_eth_data->data + 1, len - QCA_HDR_MGMT_DATA1_LEN); ++ ++ ack = mgmt_eth_data->ack; ++ ++ mutex_unlock(&mgmt_eth_data->mutex); ++ ++ if (ret <= 0) ++ return -ETIMEDOUT; ++ ++ if (!ack) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++static int qca8k_write_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) ++{ ++ struct qca8k_mgmt_eth_data *mgmt_eth_data = &priv->mgmt_eth_data; ++ struct sk_buff *skb; ++ bool ack; ++ int ret; ++ ++ skb = qca8k_alloc_mdio_header(MDIO_WRITE, reg, val, ++ QCA8K_ETHERNET_MDIO_PRIORITY, len); ++ if (!skb) ++ return -ENOMEM; ++ ++ mutex_lock(&mgmt_eth_data->mutex); ++ ++ /* Check mgmt_master if is operational */ ++ if (!priv->mgmt_master) { ++ kfree_skb(skb); ++ mutex_unlock(&mgmt_eth_data->mutex); ++ return -EINVAL; ++ } ++ ++ skb->dev = priv->mgmt_master; ++ ++ reinit_completion(&mgmt_eth_data->rw_done); ++ ++ /* Increment seq_num and set it in the mdio pkt */ ++ mgmt_eth_data->seq++; ++ qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); ++ mgmt_eth_data->ack = false; ++ ++ dev_queue_xmit(skb); ++ ++ ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, ++ msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT)); ++ ++ ack = mgmt_eth_data->ack; ++ ++ mutex_unlock(&mgmt_eth_data->mutex); ++ ++ if (ret <= 0) ++ return -ETIMEDOUT; ++ ++ if (!ack) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++static int ++qca8k_regmap_update_bits_eth(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val) ++{ ++ u32 val = 0; ++ int ret; ++ ++ ret = qca8k_read_eth(priv, reg, &val, sizeof(val)); ++ if (ret) ++ return ret; ++ ++ val &= ~mask; ++ val |= write_val; ++ ++ return qca8k_write_eth(priv, reg, &val, sizeof(val)); ++} ++ ++static int ++qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len) ++{ ++ int i, count = len / sizeof(u32), ret; ++ ++ if (priv->mgmt_master && !qca8k_read_eth(priv, reg, val, len)) ++ return 0; ++ ++ for (i = 0; i < count; i++) { ++ ret = regmap_read(priv->regmap, reg + (i * 4), val + i); ++ if (ret < 0) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int ++qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len) ++{ ++ int i, count = len / sizeof(u32), ret; ++ u32 tmp; ++ ++ if (priv->mgmt_master && !qca8k_write_eth(priv, reg, val, len)) ++ return 0; ++ ++ for (i = 0; i < count; i++) { ++ tmp = val[i]; ++ ++ ret = regmap_write(priv->regmap, reg + (i * 4), tmp); ++ if (ret < 0) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int ++qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ctx; ++ struct mii_bus *bus = priv->bus; ++ u16 r1, r2, page; ++ int ret; ++ ++ if (!qca8k_read_eth(priv, reg, val, sizeof(*val))) ++ return 0; ++ ++ qca8k_split_addr(reg, &r1, &r2, &page); ++ ++ mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); ++ ++ ret = qca8k_set_page(priv, page); ++ if (ret < 0) ++ goto exit; ++ ++ ret = qca8k_mii_read32(bus, 0x10 | r2, r1, val); ++ ++exit: ++ mutex_unlock(&bus->mdio_lock); ++ return ret; ++} ++ ++static int ++qca8k_regmap_write(void *ctx, uint32_t reg, uint32_t val) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ctx; ++ struct mii_bus *bus = priv->bus; ++ u16 r1, r2, page; ++ int ret; ++ ++ if (!qca8k_write_eth(priv, reg, &val, sizeof(val))) ++ return 0; ++ ++ qca8k_split_addr(reg, &r1, &r2, &page); ++ ++ mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); ++ ++ ret = qca8k_set_page(priv, page); ++ if (ret < 0) ++ goto exit; ++ ++ qca8k_mii_write32(priv, 0x10 | r2, r1, val); ++ ++exit: ++ mutex_unlock(&bus->mdio_lock); ++ return ret; ++} ++ ++static int ++qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask, uint32_t write_val) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ctx; ++ struct mii_bus *bus = priv->bus; ++ u16 r1, r2, page; ++ u32 val; ++ int ret; ++ ++ if (!qca8k_regmap_update_bits_eth(priv, reg, mask, write_val)) ++ return 0; ++ ++ qca8k_split_addr(reg, &r1, &r2, &page); ++ ++ mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); ++ ++ ret = qca8k_set_page(priv, page); ++ if (ret < 0) ++ goto exit; ++ ++ ret = qca8k_mii_read32(bus, 0x10 | r2, r1, &val); ++ if (ret < 0) ++ goto exit; ++ ++ val &= ~mask; ++ val |= write_val; ++ qca8k_mii_write32(priv, 0x10 | r2, r1, val); ++ ++exit: ++ mutex_unlock(&bus->mdio_lock); ++ ++ return ret; ++} ++ ++static const struct regmap_range qca8k_readable_ranges[] = { ++ regmap_reg_range(0x0000, 0x00e4), /* Global control */ ++ regmap_reg_range(0x0100, 0x0168), /* EEE control */ ++ regmap_reg_range(0x0200, 0x0270), /* Parser control */ ++ regmap_reg_range(0x0400, 0x0454), /* ACL */ ++ regmap_reg_range(0x0600, 0x0718), /* Lookup */ ++ regmap_reg_range(0x0800, 0x0b70), /* QM */ ++ regmap_reg_range(0x0c00, 0x0c80), /* PKT */ ++ regmap_reg_range(0x0e00, 0x0e98), /* L3 */ ++ regmap_reg_range(0x1000, 0x10ac), /* MIB - Port0 */ ++ regmap_reg_range(0x1100, 0x11ac), /* MIB - Port1 */ ++ regmap_reg_range(0x1200, 0x12ac), /* MIB - Port2 */ ++ regmap_reg_range(0x1300, 0x13ac), /* MIB - Port3 */ ++ regmap_reg_range(0x1400, 0x14ac), /* MIB - Port4 */ ++ regmap_reg_range(0x1500, 0x15ac), /* MIB - Port5 */ ++ regmap_reg_range(0x1600, 0x16ac), /* MIB - Port6 */ ++ ++}; ++ ++static const struct regmap_access_table qca8k_readable_table = { ++ .yes_ranges = qca8k_readable_ranges, ++ .n_yes_ranges = ARRAY_SIZE(qca8k_readable_ranges), ++}; ++ ++static struct regmap_config qca8k_regmap_config = { ++ .reg_bits = 16, ++ .val_bits = 32, ++ .reg_stride = 4, ++ .max_register = 0x16ac, /* end MIB - Port6 range */ ++ .reg_read = qca8k_regmap_read, ++ .reg_write = qca8k_regmap_write, ++ .reg_update_bits = qca8k_regmap_update_bits, ++ .rd_table = &qca8k_readable_table, ++ .disable_locking = true, /* Locking is handled by qca8k read/write */ ++ .cache_type = REGCACHE_NONE, /* Explicitly disable CACHE */ ++}; ++ ++static int ++qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask) ++{ ++ u32 val; ++ ++ return regmap_read_poll_timeout(priv->regmap, reg, val, !(val & mask), 0, ++ QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC); ++} ++ ++static int ++qca8k_fdb_read(struct qca8k_priv *priv, struct qca8k_fdb *fdb) ++{ ++ u32 reg[3]; ++ int ret; ++ ++ /* load the ARL table into an array */ ++ ret = qca8k_bulk_read(priv, QCA8K_REG_ATU_DATA0, reg, sizeof(reg)); ++ if (ret) ++ return ret; ++ ++ /* vid - 83:72 */ ++ fdb->vid = FIELD_GET(QCA8K_ATU_VID_MASK, reg[2]); ++ /* aging - 67:64 */ ++ fdb->aging = FIELD_GET(QCA8K_ATU_STATUS_MASK, reg[2]); ++ /* portmask - 54:48 */ ++ fdb->port_mask = FIELD_GET(QCA8K_ATU_PORT_MASK, reg[1]); ++ /* mac - 47:0 */ ++ fdb->mac[0] = FIELD_GET(QCA8K_ATU_ADDR0_MASK, reg[1]); ++ fdb->mac[1] = FIELD_GET(QCA8K_ATU_ADDR1_MASK, reg[1]); ++ fdb->mac[2] = FIELD_GET(QCA8K_ATU_ADDR2_MASK, reg[0]); ++ fdb->mac[3] = FIELD_GET(QCA8K_ATU_ADDR3_MASK, reg[0]); ++ fdb->mac[4] = FIELD_GET(QCA8K_ATU_ADDR4_MASK, reg[0]); ++ fdb->mac[5] = FIELD_GET(QCA8K_ATU_ADDR5_MASK, reg[0]); ++ ++ return 0; ++} ++ ++static void ++qca8k_fdb_write(struct qca8k_priv *priv, u16 vid, u8 port_mask, const u8 *mac, ++ u8 aging) ++{ ++ u32 reg[3] = { 0 }; ++ ++ /* vid - 83:72 */ ++ reg[2] = FIELD_PREP(QCA8K_ATU_VID_MASK, vid); ++ /* aging - 67:64 */ ++ reg[2] |= FIELD_PREP(QCA8K_ATU_STATUS_MASK, aging); ++ /* portmask - 54:48 */ ++ reg[1] = FIELD_PREP(QCA8K_ATU_PORT_MASK, port_mask); ++ /* mac - 47:0 */ ++ reg[1] |= FIELD_PREP(QCA8K_ATU_ADDR0_MASK, mac[0]); ++ reg[1] |= FIELD_PREP(QCA8K_ATU_ADDR1_MASK, mac[1]); ++ reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR2_MASK, mac[2]); ++ reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR3_MASK, mac[3]); ++ reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR4_MASK, mac[4]); ++ reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR5_MASK, mac[5]); ++ ++ /* load the array into the ARL table */ ++ qca8k_bulk_write(priv, QCA8K_REG_ATU_DATA0, reg, sizeof(reg)); ++} ++ ++static int ++qca8k_fdb_access(struct qca8k_priv *priv, enum qca8k_fdb_cmd cmd, int port) ++{ ++ u32 reg; ++ int ret; ++ ++ /* Set the command and FDB index */ ++ reg = QCA8K_ATU_FUNC_BUSY; ++ reg |= cmd; ++ if (port >= 0) { ++ reg |= QCA8K_ATU_FUNC_PORT_EN; ++ reg |= FIELD_PREP(QCA8K_ATU_FUNC_PORT_MASK, port); ++ } ++ ++ /* Write the function register triggering the table access */ ++ ret = qca8k_write(priv, QCA8K_REG_ATU_FUNC, reg); ++ if (ret) ++ return ret; ++ ++ /* wait for completion */ ++ ret = qca8k_busy_wait(priv, QCA8K_REG_ATU_FUNC, QCA8K_ATU_FUNC_BUSY); ++ if (ret) ++ return ret; ++ ++ /* Check for table full violation when adding an entry */ ++ if (cmd == QCA8K_FDB_LOAD) { ++ ret = qca8k_read(priv, QCA8K_REG_ATU_FUNC, ®); ++ if (ret < 0) ++ return ret; ++ if (reg & QCA8K_ATU_FUNC_FULL) ++ return -1; ++ } ++ ++ return 0; ++} ++ ++static int ++qca8k_fdb_next(struct qca8k_priv *priv, struct qca8k_fdb *fdb, int port) ++{ ++ int ret; ++ ++ qca8k_fdb_write(priv, fdb->vid, fdb->port_mask, fdb->mac, fdb->aging); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_NEXT, port); ++ if (ret < 0) ++ return ret; ++ ++ return qca8k_fdb_read(priv, fdb); ++} ++ ++static int ++qca8k_fdb_add(struct qca8k_priv *priv, const u8 *mac, u16 port_mask, ++ u16 vid, u8 aging) ++{ ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ qca8k_fdb_write(priv, vid, port_mask, mac, aging); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); ++ mutex_unlock(&priv->reg_mutex); ++ ++ return ret; ++} ++ ++static int ++qca8k_fdb_del(struct qca8k_priv *priv, const u8 *mac, u16 port_mask, u16 vid) ++{ ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ qca8k_fdb_write(priv, vid, port_mask, mac, 0); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); ++ mutex_unlock(&priv->reg_mutex); ++ ++ return ret; ++} ++ ++static void ++qca8k_fdb_flush(struct qca8k_priv *priv) ++{ ++ mutex_lock(&priv->reg_mutex); ++ qca8k_fdb_access(priv, QCA8K_FDB_FLUSH, -1); ++ mutex_unlock(&priv->reg_mutex); ++} ++ ++static int ++qca8k_fdb_search_and_insert(struct qca8k_priv *priv, u8 port_mask, ++ const u8 *mac, u16 vid) ++{ ++ struct qca8k_fdb fdb = { 0 }; ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ ++ qca8k_fdb_write(priv, vid, 0, mac, 0); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_SEARCH, -1); ++ if (ret < 0) ++ goto exit; ++ ++ ret = qca8k_fdb_read(priv, &fdb); ++ if (ret < 0) ++ goto exit; ++ ++ /* Rule exist. Delete first */ ++ if (!fdb.aging) { ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); ++ if (ret) ++ goto exit; ++ } ++ ++ /* Add port to fdb portmask */ ++ fdb.port_mask |= port_mask; ++ ++ qca8k_fdb_write(priv, vid, fdb.port_mask, mac, fdb.aging); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); ++ ++exit: ++ mutex_unlock(&priv->reg_mutex); ++ return ret; ++} ++ ++static int ++qca8k_fdb_search_and_del(struct qca8k_priv *priv, u8 port_mask, ++ const u8 *mac, u16 vid) ++{ ++ struct qca8k_fdb fdb = { 0 }; ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ ++ qca8k_fdb_write(priv, vid, 0, mac, 0); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_SEARCH, -1); ++ if (ret < 0) ++ goto exit; ++ ++ /* Rule doesn't exist. Why delete? */ ++ if (!fdb.aging) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); ++ if (ret) ++ goto exit; ++ ++ /* Only port in the rule is this port. Don't re insert */ ++ if (fdb.port_mask == port_mask) ++ goto exit; ++ ++ /* Remove port from port mask */ ++ fdb.port_mask &= ~port_mask; ++ ++ qca8k_fdb_write(priv, vid, fdb.port_mask, mac, fdb.aging); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); ++ ++exit: ++ mutex_unlock(&priv->reg_mutex); ++ return ret; ++} ++ ++static int ++qca8k_vlan_access(struct qca8k_priv *priv, enum qca8k_vlan_cmd cmd, u16 vid) ++{ ++ u32 reg; ++ int ret; ++ ++ /* Set the command and VLAN index */ ++ reg = QCA8K_VTU_FUNC1_BUSY; ++ reg |= cmd; ++ reg |= FIELD_PREP(QCA8K_VTU_FUNC1_VID_MASK, vid); ++ ++ /* Write the function register triggering the table access */ ++ ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC1, reg); ++ if (ret) ++ return ret; ++ ++ /* wait for completion */ ++ ret = qca8k_busy_wait(priv, QCA8K_REG_VTU_FUNC1, QCA8K_VTU_FUNC1_BUSY); ++ if (ret) ++ return ret; ++ ++ /* Check for table full violation when adding an entry */ ++ if (cmd == QCA8K_VLAN_LOAD) { ++ ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC1, ®); ++ if (ret < 0) ++ return ret; ++ if (reg & QCA8K_VTU_FUNC1_FULL) ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++static int ++qca8k_vlan_add(struct qca8k_priv *priv, u8 port, u16 vid, bool untagged) ++{ ++ u32 reg; ++ int ret; ++ ++ /* ++ We do the right thing with VLAN 0 and treat it as untagged while ++ preserving the tag on egress. ++ */ ++ if (vid == 0) ++ return 0; ++ ++ mutex_lock(&priv->reg_mutex); ++ ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid); ++ if (ret < 0) ++ goto out; ++ ++ ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, ®); ++ if (ret < 0) ++ goto out; ++ reg |= QCA8K_VTU_FUNC0_VALID | QCA8K_VTU_FUNC0_IVL_EN; ++ reg &= ~QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(port); ++ if (untagged) ++ reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_UNTAG(port); ++ else ++ reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_TAG(port); ++ ++ ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg); ++ if (ret) ++ goto out; ++ ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid); ++ ++out: ++ mutex_unlock(&priv->reg_mutex); ++ ++ return ret; ++} ++ ++static int ++qca8k_vlan_del(struct qca8k_priv *priv, u8 port, u16 vid) ++{ ++ u32 reg, mask; ++ int ret, i; ++ bool del; ++ ++ mutex_lock(&priv->reg_mutex); ++ ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid); ++ if (ret < 0) ++ goto out; ++ ++ ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, ®); ++ if (ret < 0) ++ goto out; ++ reg &= ~QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(port); ++ reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(port); ++ ++ /* Check if we're the last member to be removed */ ++ del = true; ++ for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ mask = QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(i); ++ ++ if ((reg & mask) != mask) { ++ del = false; ++ break; ++ } ++ } ++ ++ if (del) { ++ ret = qca8k_vlan_access(priv, QCA8K_VLAN_PURGE, vid); ++ } else { ++ ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg); ++ if (ret) ++ goto out; ++ ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid); ++ } ++ ++out: ++ mutex_unlock(&priv->reg_mutex); ++ ++ return ret; ++} ++ ++static int ++qca8k_mib_init(struct qca8k_priv *priv) ++{ ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ ret = regmap_update_bits(priv->regmap, QCA8K_REG_MIB, ++ QCA8K_MIB_FUNC | QCA8K_MIB_BUSY, ++ FIELD_PREP(QCA8K_MIB_FUNC, QCA8K_MIB_FLUSH) | ++ QCA8K_MIB_BUSY); ++ if (ret) ++ goto exit; ++ ++ ret = qca8k_busy_wait(priv, QCA8K_REG_MIB, QCA8K_MIB_BUSY); ++ if (ret) ++ goto exit; ++ ++ ret = regmap_set_bits(priv->regmap, QCA8K_REG_MIB, QCA8K_MIB_CPU_KEEP); ++ if (ret) ++ goto exit; ++ ++ ret = qca8k_write(priv, QCA8K_REG_MODULE_EN, QCA8K_MODULE_EN_MIB); ++ ++exit: ++ mutex_unlock(&priv->reg_mutex); ++ return ret; ++} ++ ++static void ++qca8k_port_set_status(struct qca8k_priv *priv, int port, int enable) ++{ ++ u32 mask = QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC; ++ ++ /* Port 0 and 6 have no internal PHY */ ++ if (port > 0 && port < 6) ++ mask |= QCA8K_PORT_STATUS_LINK_AUTO; ++ ++ if (enable) ++ regmap_set_bits(priv->regmap, QCA8K_REG_PORT_STATUS(port), mask); ++ else ++ regmap_clear_bits(priv->regmap, QCA8K_REG_PORT_STATUS(port), mask); ++} ++ ++static int ++qca8k_phy_eth_busy_wait(struct qca8k_mgmt_eth_data *mgmt_eth_data, ++ struct sk_buff *read_skb, u32 *val) ++{ ++ struct sk_buff *skb = skb_copy(read_skb, GFP_KERNEL); ++ bool ack; ++ int ret; ++ ++ reinit_completion(&mgmt_eth_data->rw_done); ++ ++ /* Increment seq_num and set it in the copy pkt */ ++ mgmt_eth_data->seq++; ++ qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); ++ mgmt_eth_data->ack = false; ++ ++ dev_queue_xmit(skb); ++ ++ ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, ++ QCA8K_ETHERNET_TIMEOUT); ++ ++ ack = mgmt_eth_data->ack; ++ ++ if (ret <= 0) ++ return -ETIMEDOUT; ++ ++ if (!ack) ++ return -EINVAL; ++ ++ *val = mgmt_eth_data->data[0]; ++ ++ return 0; ++} ++ ++static int ++qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy, ++ int regnum, u16 data) ++{ ++ struct sk_buff *write_skb, *clear_skb, *read_skb; ++ struct qca8k_mgmt_eth_data *mgmt_eth_data; ++ u32 write_val, clear_val = 0, val; ++ struct net_device *mgmt_master; ++ int ret, ret1; ++ bool ack; ++ ++ if (regnum >= QCA8K_MDIO_MASTER_MAX_REG) ++ return -EINVAL; ++ ++ mgmt_eth_data = &priv->mgmt_eth_data; ++ ++ write_val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN | ++ QCA8K_MDIO_MASTER_PHY_ADDR(phy) | ++ QCA8K_MDIO_MASTER_REG_ADDR(regnum); ++ ++ if (read) { ++ write_val |= QCA8K_MDIO_MASTER_READ; ++ } else { ++ write_val |= QCA8K_MDIO_MASTER_WRITE; ++ write_val |= QCA8K_MDIO_MASTER_DATA(data); ++ } ++ ++ /* Prealloc all the needed skb before the lock */ ++ write_skb = qca8k_alloc_mdio_header(MDIO_WRITE, QCA8K_MDIO_MASTER_CTRL, &write_val, ++ QCA8K_ETHERNET_PHY_PRIORITY, sizeof(write_val)); ++ if (!write_skb) ++ return -ENOMEM; ++ ++ clear_skb = qca8k_alloc_mdio_header(MDIO_WRITE, QCA8K_MDIO_MASTER_CTRL, &clear_val, ++ QCA8K_ETHERNET_PHY_PRIORITY, sizeof(clear_val)); ++ if (!clear_skb) { ++ ret = -ENOMEM; ++ goto err_clear_skb; ++ } ++ ++ read_skb = qca8k_alloc_mdio_header(MDIO_READ, QCA8K_MDIO_MASTER_CTRL, &clear_val, ++ QCA8K_ETHERNET_PHY_PRIORITY, sizeof(clear_val)); ++ if (!read_skb) { ++ ret = -ENOMEM; ++ goto err_read_skb; ++ } ++ ++ /* Actually start the request: ++ * 1. Send mdio master packet ++ * 2. Busy Wait for mdio master command ++ * 3. Get the data if we are reading ++ * 4. Reset the mdio master (even with error) ++ */ ++ mutex_lock(&mgmt_eth_data->mutex); ++ ++ /* Check if mgmt_master is operational */ ++ mgmt_master = priv->mgmt_master; ++ if (!mgmt_master) { ++ mutex_unlock(&mgmt_eth_data->mutex); ++ ret = -EINVAL; ++ goto err_mgmt_master; ++ } ++ ++ read_skb->dev = mgmt_master; ++ clear_skb->dev = mgmt_master; ++ write_skb->dev = mgmt_master; ++ ++ reinit_completion(&mgmt_eth_data->rw_done); ++ ++ /* Increment seq_num and set it in the write pkt */ ++ mgmt_eth_data->seq++; ++ qca8k_mdio_header_fill_seq_num(write_skb, mgmt_eth_data->seq); ++ mgmt_eth_data->ack = false; ++ ++ dev_queue_xmit(write_skb); ++ ++ ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, ++ QCA8K_ETHERNET_TIMEOUT); ++ ++ ack = mgmt_eth_data->ack; ++ ++ if (ret <= 0) { ++ ret = -ETIMEDOUT; ++ kfree_skb(read_skb); ++ goto exit; ++ } ++ ++ if (!ack) { ++ ret = -EINVAL; ++ kfree_skb(read_skb); ++ goto exit; ++ } ++ ++ ret = read_poll_timeout(qca8k_phy_eth_busy_wait, ret1, ++ !(val & QCA8K_MDIO_MASTER_BUSY), 0, ++ QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC, false, ++ mgmt_eth_data, read_skb, &val); ++ ++ if (ret < 0 && ret1 < 0) { ++ ret = ret1; ++ goto exit; ++ } ++ ++ if (read) { ++ reinit_completion(&mgmt_eth_data->rw_done); ++ ++ /* Increment seq_num and set it in the read pkt */ ++ mgmt_eth_data->seq++; ++ qca8k_mdio_header_fill_seq_num(read_skb, mgmt_eth_data->seq); ++ mgmt_eth_data->ack = false; ++ ++ dev_queue_xmit(read_skb); ++ ++ ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, ++ QCA8K_ETHERNET_TIMEOUT); ++ ++ ack = mgmt_eth_data->ack; ++ ++ if (ret <= 0) { ++ ret = -ETIMEDOUT; ++ goto exit; ++ } ++ ++ if (!ack) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ ret = mgmt_eth_data->data[0] & QCA8K_MDIO_MASTER_DATA_MASK; ++ } else { ++ kfree_skb(read_skb); ++ } ++exit: ++ reinit_completion(&mgmt_eth_data->rw_done); ++ ++ /* Increment seq_num and set it in the clear pkt */ ++ mgmt_eth_data->seq++; ++ qca8k_mdio_header_fill_seq_num(clear_skb, mgmt_eth_data->seq); ++ mgmt_eth_data->ack = false; ++ ++ dev_queue_xmit(clear_skb); ++ ++ wait_for_completion_timeout(&mgmt_eth_data->rw_done, ++ QCA8K_ETHERNET_TIMEOUT); ++ ++ mutex_unlock(&mgmt_eth_data->mutex); ++ ++ return ret; ++ ++ /* Error handling before lock */ ++err_mgmt_master: ++ kfree_skb(read_skb); ++err_read_skb: ++ kfree_skb(clear_skb); ++err_clear_skb: ++ kfree_skb(write_skb); ++ ++ return ret; ++} ++ ++static u32 ++qca8k_port_to_phy(int port) ++{ ++ /* From Andrew Lunn: ++ * Port 0 has no internal phy. ++ * Port 1 has an internal PHY at MDIO address 0. ++ * Port 2 has an internal PHY at MDIO address 1. ++ * ... ++ * Port 5 has an internal PHY at MDIO address 4. ++ * Port 6 has no internal PHY. ++ */ ++ ++ return port - 1; ++} ++ ++static int ++qca8k_mdio_busy_wait(struct mii_bus *bus, u32 reg, u32 mask) ++{ ++ u16 r1, r2, page; ++ u32 val; ++ int ret, ret1; ++ ++ qca8k_split_addr(reg, &r1, &r2, &page); ++ ++ ret = read_poll_timeout(qca8k_mii_read32, ret1, !(val & mask), 0, ++ QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC, false, ++ bus, 0x10 | r2, r1, &val); ++ ++ /* Check if qca8k_read has failed for a different reason ++ * before returnting -ETIMEDOUT ++ */ ++ if (ret < 0 && ret1 < 0) ++ return ret1; ++ ++ return ret; ++} ++ ++static int ++qca8k_mdio_write(struct qca8k_priv *priv, int phy, int regnum, u16 data) ++{ ++ struct mii_bus *bus = priv->bus; ++ u16 r1, r2, page; ++ u32 val; ++ int ret; ++ ++ if (regnum >= QCA8K_MDIO_MASTER_MAX_REG) ++ return -EINVAL; ++ ++ val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN | ++ QCA8K_MDIO_MASTER_WRITE | QCA8K_MDIO_MASTER_PHY_ADDR(phy) | ++ QCA8K_MDIO_MASTER_REG_ADDR(regnum) | ++ QCA8K_MDIO_MASTER_DATA(data); ++ ++ qca8k_split_addr(QCA8K_MDIO_MASTER_CTRL, &r1, &r2, &page); ++ ++ mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); ++ ++ ret = qca8k_set_page(priv, page); ++ if (ret) ++ goto exit; ++ ++ qca8k_mii_write32(priv, 0x10 | r2, r1, val); ++ ++ ret = qca8k_mdio_busy_wait(bus, QCA8K_MDIO_MASTER_CTRL, ++ QCA8K_MDIO_MASTER_BUSY); ++ ++exit: ++ /* even if the busy_wait timeouts try to clear the MASTER_EN */ ++ qca8k_mii_write32(priv, 0x10 | r2, r1, 0); ++ ++ mutex_unlock(&bus->mdio_lock); ++ ++ return ret; ++} ++ ++static int ++qca8k_mdio_read(struct qca8k_priv *priv, int phy, int regnum) ++{ ++ struct mii_bus *bus = priv->bus; ++ u16 r1, r2, page; ++ u32 val; ++ int ret; ++ ++ if (regnum >= QCA8K_MDIO_MASTER_MAX_REG) ++ return -EINVAL; ++ ++ val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN | ++ QCA8K_MDIO_MASTER_READ | QCA8K_MDIO_MASTER_PHY_ADDR(phy) | ++ QCA8K_MDIO_MASTER_REG_ADDR(regnum); ++ ++ qca8k_split_addr(QCA8K_MDIO_MASTER_CTRL, &r1, &r2, &page); ++ ++ mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); ++ ++ ret = qca8k_set_page(priv, page); ++ if (ret) ++ goto exit; ++ ++ qca8k_mii_write32(priv, 0x10 | r2, r1, val); ++ ++ ret = qca8k_mdio_busy_wait(bus, QCA8K_MDIO_MASTER_CTRL, ++ QCA8K_MDIO_MASTER_BUSY); ++ if (ret) ++ goto exit; ++ ++ ret = qca8k_mii_read32(bus, 0x10 | r2, r1, &val); ++ ++exit: ++ /* even if the busy_wait timeouts try to clear the MASTER_EN */ ++ qca8k_mii_write32(priv, 0x10 | r2, r1, 0); ++ ++ mutex_unlock(&bus->mdio_lock); ++ ++ if (ret >= 0) ++ ret = val & QCA8K_MDIO_MASTER_DATA_MASK; ++ ++ return ret; ++} ++ ++static int ++qca8k_internal_mdio_write(struct mii_bus *slave_bus, int phy, int regnum, u16 data) ++{ ++ struct qca8k_priv *priv = slave_bus->priv; ++ int ret; ++ ++ /* Use mdio Ethernet when available, fallback to legacy one on error */ ++ ret = qca8k_phy_eth_command(priv, false, phy, regnum, data); ++ if (!ret) ++ return 0; ++ ++ return qca8k_mdio_write(priv, phy, regnum, data); ++} ++ ++static int ++qca8k_internal_mdio_read(struct mii_bus *slave_bus, int phy, int regnum) ++{ ++ struct qca8k_priv *priv = slave_bus->priv; ++ int ret; ++ ++ /* Use mdio Ethernet when available, fallback to legacy one on error */ ++ ret = qca8k_phy_eth_command(priv, true, phy, regnum, 0); ++ if (ret >= 0) ++ return ret; ++ ++ ret = qca8k_mdio_read(priv, phy, regnum); ++ ++ if (ret < 0) ++ return 0xffff; ++ ++ return ret; ++} ++ ++static int ++qca8k_legacy_mdio_write(struct mii_bus *slave_bus, int port, int regnum, u16 data) ++{ ++ port = qca8k_port_to_phy(port) % PHY_MAX_ADDR; ++ ++ return qca8k_internal_mdio_write(slave_bus, port, regnum, data); ++} ++ ++static int ++qca8k_legacy_mdio_read(struct mii_bus *slave_bus, int port, int regnum) ++{ ++ port = qca8k_port_to_phy(port) % PHY_MAX_ADDR; ++ ++ return qca8k_internal_mdio_read(slave_bus, port, regnum); ++} ++ ++static int ++qca8k_mdio_register(struct qca8k_priv *priv) ++{ ++ struct dsa_switch *ds = priv->ds; ++ struct device_node *mdio; ++ struct mii_bus *bus; ++ ++ bus = devm_mdiobus_alloc(ds->dev); ++ if (!bus) ++ return -ENOMEM; ++ ++ bus->priv = (void *)priv; ++ snprintf(bus->id, MII_BUS_ID_SIZE, "qca8k-%d.%d", ++ ds->dst->index, ds->index); ++ bus->parent = ds->dev; ++ bus->phy_mask = ~ds->phys_mii_mask; ++ ds->slave_mii_bus = bus; ++ ++ /* Check if the devicetree declare the port:phy mapping */ ++ mdio = of_get_child_by_name(priv->dev->of_node, "mdio"); ++ if (of_device_is_available(mdio)) { ++ bus->name = "qca8k slave mii"; ++ bus->read = qca8k_internal_mdio_read; ++ bus->write = qca8k_internal_mdio_write; ++ return devm_of_mdiobus_register(priv->dev, bus, mdio); ++ } ++ ++ /* If a mapping can't be found the legacy mapping is used, ++ * using the qca8k_port_to_phy function ++ */ ++ bus->name = "qca8k-legacy slave mii"; ++ bus->read = qca8k_legacy_mdio_read; ++ bus->write = qca8k_legacy_mdio_write; ++ return devm_mdiobus_register(priv->dev, bus); ++} ++ ++static int ++qca8k_setup_mdio_bus(struct qca8k_priv *priv) ++{ ++ u32 internal_mdio_mask = 0, external_mdio_mask = 0, reg; ++ struct device_node *ports, *port; ++ phy_interface_t mode; ++ int err; ++ ++ ports = of_get_child_by_name(priv->dev->of_node, "ports"); ++ if (!ports) ++ ports = of_get_child_by_name(priv->dev->of_node, "ethernet-ports"); ++ ++ if (!ports) ++ return -EINVAL; ++ ++ for_each_available_child_of_node(ports, port) { ++ err = of_property_read_u32(port, "reg", ®); ++ if (err) { ++ of_node_put(port); ++ of_node_put(ports); ++ return err; ++ } ++ ++ if (!dsa_is_user_port(priv->ds, reg)) ++ continue; ++ ++ of_get_phy_mode(port, &mode); ++ ++ if (of_property_read_bool(port, "phy-handle") && ++ mode != PHY_INTERFACE_MODE_INTERNAL) ++ external_mdio_mask |= BIT(reg); ++ else ++ internal_mdio_mask |= BIT(reg); ++ } ++ ++ of_node_put(ports); ++ if (!external_mdio_mask && !internal_mdio_mask) { ++ dev_err(priv->dev, "no PHYs are defined.\n"); ++ return -EINVAL; ++ } ++ ++ /* The QCA8K_MDIO_MASTER_EN Bit, which grants access to PHYs through ++ * the MDIO_MASTER register also _disconnects_ the external MDC ++ * passthrough to the internal PHYs. It's not possible to use both ++ * configurations at the same time! ++ * ++ * Because this came up during the review process: ++ * If the external mdio-bus driver is capable magically disabling ++ * the QCA8K_MDIO_MASTER_EN and mutex/spin-locking out the qca8k's ++ * accessors for the time being, it would be possible to pull this ++ * off. ++ */ ++ if (!!external_mdio_mask && !!internal_mdio_mask) { ++ dev_err(priv->dev, "either internal or external mdio bus configuration is supported.\n"); ++ return -EINVAL; ++ } ++ ++ if (external_mdio_mask) { ++ /* Make sure to disable the internal mdio bus in cases ++ * a dt-overlay and driver reload changed the configuration ++ */ ++ ++ return regmap_clear_bits(priv->regmap, QCA8K_MDIO_MASTER_CTRL, ++ QCA8K_MDIO_MASTER_EN); ++ } ++ ++ return qca8k_mdio_register(priv); ++} ++ ++static int ++qca8k_setup_mac_pwr_sel(struct qca8k_priv *priv) ++{ ++ u32 mask = 0; ++ int ret = 0; ++ ++ /* SoC specific settings for ipq8064. ++ * If more device require this consider adding ++ * a dedicated binding. ++ */ ++ if (of_machine_is_compatible("qcom,ipq8064")) ++ mask |= QCA8K_MAC_PWR_RGMII0_1_8V; ++ ++ /* SoC specific settings for ipq8065 */ ++ if (of_machine_is_compatible("qcom,ipq8065")) ++ mask |= QCA8K_MAC_PWR_RGMII1_1_8V; ++ ++ if (mask) { ++ ret = qca8k_rmw(priv, QCA8K_REG_MAC_PWR_SEL, ++ QCA8K_MAC_PWR_RGMII0_1_8V | ++ QCA8K_MAC_PWR_RGMII1_1_8V, ++ mask); ++ } ++ ++ return ret; ++} ++ ++static int qca8k_find_cpu_port(struct dsa_switch *ds) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ ++ /* Find the connected cpu port. Valid port are 0 or 6 */ ++ if (dsa_is_cpu_port(ds, 0)) ++ return 0; ++ ++ dev_dbg(priv->dev, "port 0 is not the CPU port. Checking port 6"); ++ ++ if (dsa_is_cpu_port(ds, 6)) ++ return 6; ++ ++ return -EINVAL; ++} ++ ++static int ++qca8k_setup_of_pws_reg(struct qca8k_priv *priv) ++{ ++ struct device_node *node = priv->dev->of_node; ++ const struct qca8k_match_data *data; ++ u32 val = 0; ++ int ret; ++ ++ /* QCA8327 require to set to the correct mode. ++ * His bigger brother QCA8328 have the 172 pin layout. ++ * Should be applied by default but we set this just to make sure. ++ */ ++ if (priv->switch_id == QCA8K_ID_QCA8327) { ++ data = of_device_get_match_data(priv->dev); ++ ++ /* Set the correct package of 148 pin for QCA8327 */ ++ if (data->reduced_package) ++ val |= QCA8327_PWS_PACKAGE148_EN; ++ ++ ret = qca8k_rmw(priv, QCA8K_REG_PWS, QCA8327_PWS_PACKAGE148_EN, ++ val); ++ if (ret) ++ return ret; ++ } ++ ++ if (of_property_read_bool(node, "qca,ignore-power-on-sel")) ++ val |= QCA8K_PWS_POWER_ON_SEL; ++ ++ if (of_property_read_bool(node, "qca,led-open-drain")) { ++ if (!(val & QCA8K_PWS_POWER_ON_SEL)) { ++ dev_err(priv->dev, "qca,led-open-drain require qca,ignore-power-on-sel to be set."); ++ return -EINVAL; ++ } ++ ++ val |= QCA8K_PWS_LED_OPEN_EN_CSR; ++ } ++ ++ return qca8k_rmw(priv, QCA8K_REG_PWS, ++ QCA8K_PWS_LED_OPEN_EN_CSR | QCA8K_PWS_POWER_ON_SEL, ++ val); ++} ++ ++static int ++qca8k_parse_port_config(struct qca8k_priv *priv) ++{ ++ int port, cpu_port_index = -1, ret; ++ struct device_node *port_dn; ++ phy_interface_t mode; ++ struct dsa_port *dp; ++ u32 delay; ++ ++ /* We have 2 CPU port. Check them */ ++ for (port = 0; port < QCA8K_NUM_PORTS; port++) { ++ /* Skip every other port */ ++ if (port != 0 && port != 6) ++ continue; ++ ++ dp = dsa_to_port(priv->ds, port); ++ port_dn = dp->dn; ++ cpu_port_index++; ++ ++ if (!of_device_is_available(port_dn)) ++ continue; ++ ++ ret = of_get_phy_mode(port_dn, &mode); ++ if (ret) ++ continue; ++ ++ switch (mode) { ++ case PHY_INTERFACE_MODE_RGMII: ++ case PHY_INTERFACE_MODE_RGMII_ID: ++ case PHY_INTERFACE_MODE_RGMII_TXID: ++ case PHY_INTERFACE_MODE_RGMII_RXID: ++ case PHY_INTERFACE_MODE_SGMII: ++ delay = 0; ++ ++ if (!of_property_read_u32(port_dn, "tx-internal-delay-ps", &delay)) ++ /* Switch regs accept value in ns, convert ps to ns */ ++ delay = delay / 1000; ++ else if (mode == PHY_INTERFACE_MODE_RGMII_ID || ++ mode == PHY_INTERFACE_MODE_RGMII_TXID) ++ delay = 1; ++ ++ if (!FIELD_FIT(QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK, delay)) { ++ dev_err(priv->dev, "rgmii tx delay is limited to a max value of 3ns, setting to the max value"); ++ delay = 3; ++ } ++ ++ priv->ports_config.rgmii_tx_delay[cpu_port_index] = delay; ++ ++ delay = 0; ++ ++ if (!of_property_read_u32(port_dn, "rx-internal-delay-ps", &delay)) ++ /* Switch regs accept value in ns, convert ps to ns */ ++ delay = delay / 1000; ++ else if (mode == PHY_INTERFACE_MODE_RGMII_ID || ++ mode == PHY_INTERFACE_MODE_RGMII_RXID) ++ delay = 2; ++ ++ if (!FIELD_FIT(QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK, delay)) { ++ dev_err(priv->dev, "rgmii rx delay is limited to a max value of 3ns, setting to the max value"); ++ delay = 3; ++ } ++ ++ priv->ports_config.rgmii_rx_delay[cpu_port_index] = delay; ++ ++ /* Skip sgmii parsing for rgmii* mode */ ++ if (mode == PHY_INTERFACE_MODE_RGMII || ++ mode == PHY_INTERFACE_MODE_RGMII_ID || ++ mode == PHY_INTERFACE_MODE_RGMII_TXID || ++ mode == PHY_INTERFACE_MODE_RGMII_RXID) ++ break; ++ ++ if (of_property_read_bool(port_dn, "qca,sgmii-txclk-falling-edge")) ++ priv->ports_config.sgmii_tx_clk_falling_edge = true; ++ ++ if (of_property_read_bool(port_dn, "qca,sgmii-rxclk-falling-edge")) ++ priv->ports_config.sgmii_rx_clk_falling_edge = true; ++ ++ if (of_property_read_bool(port_dn, "qca,sgmii-enable-pll")) { ++ priv->ports_config.sgmii_enable_pll = true; ++ ++ if (priv->switch_id == QCA8K_ID_QCA8327) { ++ dev_err(priv->dev, "SGMII PLL should NOT be enabled for qca8327. Aborting enabling"); ++ priv->ports_config.sgmii_enable_pll = false; ++ } ++ ++ if (priv->switch_revision < 2) ++ dev_warn(priv->dev, "SGMII PLL should NOT be enabled for qca8337 with revision 2 or more."); ++ } ++ ++ break; ++ default: ++ continue; ++ } ++ } ++ ++ return 0; ++} ++ ++static int ++qca8k_setup(struct dsa_switch *ds) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ int cpu_port, ret, i; ++ u32 mask; ++ ++ cpu_port = qca8k_find_cpu_port(ds); ++ if (cpu_port < 0) { ++ dev_err(priv->dev, "No cpu port configured in both cpu port0 and port6"); ++ return cpu_port; ++ } ++ ++ /* Parse CPU port config to be later used in phy_link mac_config */ ++ ret = qca8k_parse_port_config(priv); ++ if (ret) ++ return ret; ++ ++ ret = qca8k_setup_mdio_bus(priv); ++ if (ret) ++ return ret; ++ ++ ret = qca8k_setup_of_pws_reg(priv); ++ if (ret) ++ return ret; ++ ++ ret = qca8k_setup_mac_pwr_sel(priv); ++ if (ret) ++ return ret; ++ ++ /* Make sure MAC06 is disabled */ ++ ret = regmap_clear_bits(priv->regmap, QCA8K_REG_PORT0_PAD_CTRL, ++ QCA8K_PORT0_PAD_MAC06_EXCHANGE_EN); ++ if (ret) { ++ dev_err(priv->dev, "failed disabling MAC06 exchange"); ++ return ret; ++ } ++ ++ /* Enable CPU Port */ ++ ret = regmap_set_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, ++ QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN); ++ if (ret) { ++ dev_err(priv->dev, "failed enabling CPU port"); ++ return ret; ++ } ++ ++ /* Enable MIB counters */ ++ ret = qca8k_mib_init(priv); ++ if (ret) ++ dev_warn(priv->dev, "mib init failed"); ++ ++ /* Initial setup of all ports */ ++ for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ /* Disable forwarding by default on all ports */ ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), ++ QCA8K_PORT_LOOKUP_MEMBER, 0); ++ if (ret) ++ return ret; ++ ++ /* Enable QCA header mode on all cpu ports */ ++ if (dsa_is_cpu_port(ds, i)) { ++ ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(i), ++ FIELD_PREP(QCA8K_PORT_HDR_CTRL_TX_MASK, QCA8K_PORT_HDR_CTRL_ALL) | ++ FIELD_PREP(QCA8K_PORT_HDR_CTRL_RX_MASK, QCA8K_PORT_HDR_CTRL_ALL)); ++ if (ret) { ++ dev_err(priv->dev, "failed enabling QCA header mode"); ++ return ret; ++ } ++ } ++ ++ /* Disable MAC by default on all user ports */ ++ if (dsa_is_user_port(ds, i)) ++ qca8k_port_set_status(priv, i, 0); ++ } ++ ++ /* Forward all unknown frames to CPU port for Linux processing ++ * Notice that in multi-cpu config only one port should be set ++ * for igmp, unknown, multicast and broadcast packet ++ */ ++ ret = qca8k_write(priv, QCA8K_REG_GLOBAL_FW_CTRL1, ++ FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_MASK, BIT(cpu_port)) | ++ FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_BC_DP_MASK, BIT(cpu_port)) | ++ FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_MC_DP_MASK, BIT(cpu_port)) | ++ FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_UC_DP_MASK, BIT(cpu_port))); ++ if (ret) ++ return ret; ++ ++ /* Setup connection between CPU port & user ports ++ * Configure specific switch configuration for ports ++ */ ++ for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ /* CPU port gets connected to all user ports of the switch */ ++ if (dsa_is_cpu_port(ds, i)) { ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), ++ QCA8K_PORT_LOOKUP_MEMBER, dsa_user_ports(ds)); ++ if (ret) ++ return ret; ++ } ++ ++ /* Individual user ports get connected to CPU port only */ ++ if (dsa_is_user_port(ds, i)) { ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), ++ QCA8K_PORT_LOOKUP_MEMBER, ++ BIT(cpu_port)); ++ if (ret) ++ return ret; ++ ++ /* Enable ARP Auto-learning by default */ ++ ret = regmap_set_bits(priv->regmap, QCA8K_PORT_LOOKUP_CTRL(i), ++ QCA8K_PORT_LOOKUP_LEARN); ++ if (ret) ++ return ret; ++ ++ /* For port based vlans to work we need to set the ++ * default egress vid ++ */ ++ ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(i), ++ QCA8K_EGREES_VLAN_PORT_MASK(i), ++ QCA8K_EGREES_VLAN_PORT(i, QCA8K_PORT_VID_DEF)); ++ if (ret) ++ return ret; ++ ++ ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(i), ++ QCA8K_PORT_VLAN_CVID(QCA8K_PORT_VID_DEF) | ++ QCA8K_PORT_VLAN_SVID(QCA8K_PORT_VID_DEF)); ++ if (ret) ++ return ret; ++ } ++ ++ /* The port 5 of the qca8337 have some problem in flood condition. The ++ * original legacy driver had some specific buffer and priority settings ++ * for the different port suggested by the QCA switch team. Add this ++ * missing settings to improve switch stability under load condition. ++ * This problem is limited to qca8337 and other qca8k switch are not affected. ++ */ ++ if (priv->switch_id == QCA8K_ID_QCA8337) { ++ switch (i) { ++ /* The 2 CPU port and port 5 requires some different ++ * priority than any other ports. ++ */ ++ case 0: ++ case 5: ++ case 6: ++ mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x4) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x4) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI4(0x6) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI5(0x8) | ++ QCA8K_PORT_HOL_CTRL0_EG_PORT(0x1e); ++ break; ++ default: ++ mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x6) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x8) | ++ QCA8K_PORT_HOL_CTRL0_EG_PORT(0x19); ++ } ++ qca8k_write(priv, QCA8K_REG_PORT_HOL_CTRL0(i), mask); ++ ++ mask = QCA8K_PORT_HOL_CTRL1_ING(0x6) | ++ QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN | ++ QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN | ++ QCA8K_PORT_HOL_CTRL1_WRED_EN; ++ qca8k_rmw(priv, QCA8K_REG_PORT_HOL_CTRL1(i), ++ QCA8K_PORT_HOL_CTRL1_ING_BUF_MASK | ++ QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN | ++ QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN | ++ QCA8K_PORT_HOL_CTRL1_WRED_EN, ++ mask); ++ } ++ } ++ ++ /* Special GLOBAL_FC_THRESH value are needed for ar8327 switch */ ++ if (priv->switch_id == QCA8K_ID_QCA8327) { ++ mask = QCA8K_GLOBAL_FC_GOL_XON_THRES(288) | ++ QCA8K_GLOBAL_FC_GOL_XOFF_THRES(496); ++ qca8k_rmw(priv, QCA8K_REG_GLOBAL_FC_THRESH, ++ QCA8K_GLOBAL_FC_GOL_XON_THRES_MASK | ++ QCA8K_GLOBAL_FC_GOL_XOFF_THRES_MASK, ++ mask); ++ } ++ ++ /* Setup our port MTUs to match power on defaults */ ++ ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, ETH_FRAME_LEN + ETH_FCS_LEN); ++ if (ret) ++ dev_warn(priv->dev, "failed setting MTU settings"); ++ ++ /* Flush the FDB table */ ++ qca8k_fdb_flush(priv); ++ ++ /* We don't have interrupts for link changes, so we need to poll */ ++ ds->pcs_poll = true; ++ ++ /* Set min a max ageing value supported */ ++ ds->ageing_time_min = 7000; ++ ds->ageing_time_max = 458745000; ++ ++ /* Set max number of LAGs supported */ ++ ds->num_lag_ids = QCA8K_NUM_LAGS; ++ ++ return 0; ++} ++ ++static void ++qca8k_mac_config_setup_internal_delay(struct qca8k_priv *priv, int cpu_port_index, ++ u32 reg) ++{ ++ u32 delay, val = 0; ++ int ret; ++ ++ /* Delay can be declared in 3 different way. ++ * Mode to rgmii and internal-delay standard binding defined ++ * rgmii-id or rgmii-tx/rx phy mode set. ++ * The parse logic set a delay different than 0 only when one ++ * of the 3 different way is used. In all other case delay is ++ * not enabled. With ID or TX/RXID delay is enabled and set ++ * to the default and recommended value. ++ */ ++ if (priv->ports_config.rgmii_tx_delay[cpu_port_index]) { ++ delay = priv->ports_config.rgmii_tx_delay[cpu_port_index]; ++ ++ val |= QCA8K_PORT_PAD_RGMII_TX_DELAY(delay) | ++ QCA8K_PORT_PAD_RGMII_TX_DELAY_EN; ++ } ++ ++ if (priv->ports_config.rgmii_rx_delay[cpu_port_index]) { ++ delay = priv->ports_config.rgmii_rx_delay[cpu_port_index]; ++ ++ val |= QCA8K_PORT_PAD_RGMII_RX_DELAY(delay) | ++ QCA8K_PORT_PAD_RGMII_RX_DELAY_EN; ++ } ++ ++ /* Set RGMII delay based on the selected values */ ++ ret = qca8k_rmw(priv, reg, ++ QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK | ++ QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK | ++ QCA8K_PORT_PAD_RGMII_TX_DELAY_EN | ++ QCA8K_PORT_PAD_RGMII_RX_DELAY_EN, ++ val); ++ if (ret) ++ dev_err(priv->dev, "Failed to set internal delay for CPU port%d", ++ cpu_port_index == QCA8K_CPU_PORT0 ? 0 : 6); ++} ++ ++static void ++qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, ++ const struct phylink_link_state *state) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int cpu_port_index, ret; ++ u32 reg, val; ++ ++ switch (port) { ++ case 0: /* 1st CPU port */ ++ if (state->interface != PHY_INTERFACE_MODE_RGMII && ++ state->interface != PHY_INTERFACE_MODE_RGMII_ID && ++ state->interface != PHY_INTERFACE_MODE_RGMII_TXID && ++ state->interface != PHY_INTERFACE_MODE_RGMII_RXID && ++ state->interface != PHY_INTERFACE_MODE_SGMII) ++ return; ++ ++ reg = QCA8K_REG_PORT0_PAD_CTRL; ++ cpu_port_index = QCA8K_CPU_PORT0; ++ break; ++ case 1: ++ case 2: ++ case 3: ++ case 4: ++ case 5: ++ /* Internal PHY, nothing to do */ ++ return; ++ case 6: /* 2nd CPU port / external PHY */ ++ if (state->interface != PHY_INTERFACE_MODE_RGMII && ++ state->interface != PHY_INTERFACE_MODE_RGMII_ID && ++ state->interface != PHY_INTERFACE_MODE_RGMII_TXID && ++ state->interface != PHY_INTERFACE_MODE_RGMII_RXID && ++ state->interface != PHY_INTERFACE_MODE_SGMII && ++ state->interface != PHY_INTERFACE_MODE_1000BASEX) ++ return; ++ ++ reg = QCA8K_REG_PORT6_PAD_CTRL; ++ cpu_port_index = QCA8K_CPU_PORT6; ++ break; ++ default: ++ dev_err(ds->dev, "%s: unsupported port: %i\n", __func__, port); ++ return; ++ } ++ ++ if (port != 6 && phylink_autoneg_inband(mode)) { ++ dev_err(ds->dev, "%s: in-band negotiation unsupported\n", ++ __func__); ++ return; ++ } ++ ++ switch (state->interface) { ++ case PHY_INTERFACE_MODE_RGMII: ++ case PHY_INTERFACE_MODE_RGMII_ID: ++ case PHY_INTERFACE_MODE_RGMII_TXID: ++ case PHY_INTERFACE_MODE_RGMII_RXID: ++ qca8k_write(priv, reg, QCA8K_PORT_PAD_RGMII_EN); ++ ++ /* Configure rgmii delay */ ++ qca8k_mac_config_setup_internal_delay(priv, cpu_port_index, reg); ++ ++ /* QCA8337 requires to set rgmii rx delay for all ports. ++ * This is enabled through PORT5_PAD_CTRL for all ports, ++ * rather than individual port registers. ++ */ ++ if (priv->switch_id == QCA8K_ID_QCA8337) ++ qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL, ++ QCA8K_PORT_PAD_RGMII_RX_DELAY_EN); ++ break; ++ case PHY_INTERFACE_MODE_SGMII: ++ case PHY_INTERFACE_MODE_1000BASEX: ++ /* Enable SGMII on the port */ ++ qca8k_write(priv, reg, QCA8K_PORT_PAD_SGMII_EN); ++ ++ /* Enable/disable SerDes auto-negotiation as necessary */ ++ ret = qca8k_read(priv, QCA8K_REG_PWS, &val); ++ if (ret) ++ return; ++ if (phylink_autoneg_inband(mode)) ++ val &= ~QCA8K_PWS_SERDES_AEN_DIS; ++ else ++ val |= QCA8K_PWS_SERDES_AEN_DIS; ++ qca8k_write(priv, QCA8K_REG_PWS, val); ++ ++ /* Configure the SGMII parameters */ ++ ret = qca8k_read(priv, QCA8K_REG_SGMII_CTRL, &val); ++ if (ret) ++ return; ++ ++ val |= QCA8K_SGMII_EN_SD; ++ ++ if (priv->ports_config.sgmii_enable_pll) ++ val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX | ++ QCA8K_SGMII_EN_TX; ++ ++ if (dsa_is_cpu_port(ds, port)) { ++ /* CPU port, we're talking to the CPU MAC, be a PHY */ ++ val &= ~QCA8K_SGMII_MODE_CTRL_MASK; ++ val |= QCA8K_SGMII_MODE_CTRL_PHY; ++ } else if (state->interface == PHY_INTERFACE_MODE_SGMII) { ++ val &= ~QCA8K_SGMII_MODE_CTRL_MASK; ++ val |= QCA8K_SGMII_MODE_CTRL_MAC; ++ } else if (state->interface == PHY_INTERFACE_MODE_1000BASEX) { ++ val &= ~QCA8K_SGMII_MODE_CTRL_MASK; ++ val |= QCA8K_SGMII_MODE_CTRL_BASEX; ++ } ++ ++ qca8k_write(priv, QCA8K_REG_SGMII_CTRL, val); ++ ++ /* From original code is reported port instability as SGMII also ++ * require delay set. Apply advised values here or take them from DT. ++ */ ++ if (state->interface == PHY_INTERFACE_MODE_SGMII) ++ qca8k_mac_config_setup_internal_delay(priv, cpu_port_index, reg); ++ ++ /* For qca8327/qca8328/qca8334/qca8338 sgmii is unique and ++ * falling edge is set writing in the PORT0 PAD reg ++ */ ++ if (priv->switch_id == QCA8K_ID_QCA8327 || ++ priv->switch_id == QCA8K_ID_QCA8337) ++ reg = QCA8K_REG_PORT0_PAD_CTRL; ++ ++ val = 0; ++ ++ /* SGMII Clock phase configuration */ ++ if (priv->ports_config.sgmii_rx_clk_falling_edge) ++ val |= QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE; ++ ++ if (priv->ports_config.sgmii_tx_clk_falling_edge) ++ val |= QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE; ++ ++ if (val) ++ ret = qca8k_rmw(priv, reg, ++ QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE | ++ QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE, ++ val); ++ ++ break; ++ default: ++ dev_err(ds->dev, "xMII mode %s not supported for port %d\n", ++ phy_modes(state->interface), port); ++ return; ++ } ++} ++ ++static void ++qca8k_phylink_validate(struct dsa_switch *ds, int port, ++ unsigned long *supported, ++ struct phylink_link_state *state) ++{ ++ __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; ++ ++ switch (port) { ++ case 0: /* 1st CPU port */ ++ if (state->interface != PHY_INTERFACE_MODE_NA && ++ state->interface != PHY_INTERFACE_MODE_RGMII && ++ state->interface != PHY_INTERFACE_MODE_RGMII_ID && ++ state->interface != PHY_INTERFACE_MODE_RGMII_TXID && ++ state->interface != PHY_INTERFACE_MODE_RGMII_RXID && ++ state->interface != PHY_INTERFACE_MODE_SGMII) ++ goto unsupported; ++ break; ++ case 1: ++ case 2: ++ case 3: ++ case 4: ++ case 5: ++ /* Internal PHY */ ++ if (state->interface != PHY_INTERFACE_MODE_NA && ++ state->interface != PHY_INTERFACE_MODE_GMII && ++ state->interface != PHY_INTERFACE_MODE_INTERNAL) ++ goto unsupported; ++ break; ++ case 6: /* 2nd CPU port / external PHY */ ++ if (state->interface != PHY_INTERFACE_MODE_NA && ++ state->interface != PHY_INTERFACE_MODE_RGMII && ++ state->interface != PHY_INTERFACE_MODE_RGMII_ID && ++ state->interface != PHY_INTERFACE_MODE_RGMII_TXID && ++ state->interface != PHY_INTERFACE_MODE_RGMII_RXID && ++ state->interface != PHY_INTERFACE_MODE_SGMII && ++ state->interface != PHY_INTERFACE_MODE_1000BASEX) ++ goto unsupported; ++ break; ++ default: ++unsupported: ++ linkmode_zero(supported); ++ return; ++ } ++ ++ phylink_set_port_modes(mask); ++ phylink_set(mask, Autoneg); ++ ++ phylink_set(mask, 1000baseT_Full); ++ phylink_set(mask, 10baseT_Half); ++ phylink_set(mask, 10baseT_Full); ++ phylink_set(mask, 100baseT_Half); ++ phylink_set(mask, 100baseT_Full); ++ ++ if (state->interface == PHY_INTERFACE_MODE_1000BASEX) ++ phylink_set(mask, 1000baseX_Full); ++ ++ phylink_set(mask, Pause); ++ phylink_set(mask, Asym_Pause); ++ ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); ++} ++ ++static int ++qca8k_phylink_mac_link_state(struct dsa_switch *ds, int port, ++ struct phylink_link_state *state) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ u32 reg; ++ int ret; ++ ++ ret = qca8k_read(priv, QCA8K_REG_PORT_STATUS(port), ®); ++ if (ret < 0) ++ return ret; ++ ++ state->link = !!(reg & QCA8K_PORT_STATUS_LINK_UP); ++ state->an_complete = state->link; ++ state->an_enabled = !!(reg & QCA8K_PORT_STATUS_LINK_AUTO); ++ state->duplex = (reg & QCA8K_PORT_STATUS_DUPLEX) ? DUPLEX_FULL : ++ DUPLEX_HALF; ++ ++ switch (reg & QCA8K_PORT_STATUS_SPEED) { ++ case QCA8K_PORT_STATUS_SPEED_10: ++ state->speed = SPEED_10; ++ break; ++ case QCA8K_PORT_STATUS_SPEED_100: ++ state->speed = SPEED_100; ++ break; ++ case QCA8K_PORT_STATUS_SPEED_1000: ++ state->speed = SPEED_1000; ++ break; ++ default: ++ state->speed = SPEED_UNKNOWN; ++ break; ++ } ++ ++ state->pause = MLO_PAUSE_NONE; ++ if (reg & QCA8K_PORT_STATUS_RXFLOW) ++ state->pause |= MLO_PAUSE_RX; ++ if (reg & QCA8K_PORT_STATUS_TXFLOW) ++ state->pause |= MLO_PAUSE_TX; ++ ++ return 1; ++} ++ ++static void ++qca8k_phylink_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode, ++ phy_interface_t interface) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ ++ qca8k_port_set_status(priv, port, 0); ++} ++ ++static void ++qca8k_phylink_mac_link_up(struct dsa_switch *ds, int port, unsigned int mode, ++ phy_interface_t interface, struct phy_device *phydev, ++ int speed, int duplex, bool tx_pause, bool rx_pause) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ u32 reg; ++ ++ if (phylink_autoneg_inband(mode)) { ++ reg = QCA8K_PORT_STATUS_LINK_AUTO; ++ } else { ++ switch (speed) { ++ case SPEED_10: ++ reg = QCA8K_PORT_STATUS_SPEED_10; ++ break; ++ case SPEED_100: ++ reg = QCA8K_PORT_STATUS_SPEED_100; ++ break; ++ case SPEED_1000: ++ reg = QCA8K_PORT_STATUS_SPEED_1000; ++ break; ++ default: ++ reg = QCA8K_PORT_STATUS_LINK_AUTO; ++ break; ++ } ++ ++ if (duplex == DUPLEX_FULL) ++ reg |= QCA8K_PORT_STATUS_DUPLEX; ++ ++ if (rx_pause || dsa_is_cpu_port(ds, port)) ++ reg |= QCA8K_PORT_STATUS_RXFLOW; ++ ++ if (tx_pause || dsa_is_cpu_port(ds, port)) ++ reg |= QCA8K_PORT_STATUS_TXFLOW; ++ } ++ ++ reg |= QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC; ++ ++ qca8k_write(priv, QCA8K_REG_PORT_STATUS(port), reg); ++} ++ ++static void ++qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data) ++{ ++ const struct qca8k_match_data *match_data; ++ struct qca8k_priv *priv = ds->priv; ++ int i; ++ ++ if (stringset != ETH_SS_STATS) ++ return; ++ ++ match_data = of_device_get_match_data(priv->dev); ++ ++ for (i = 0; i < match_data->mib_count; i++) ++ strncpy(data + i * ETH_GSTRING_LEN, ar8327_mib[i].name, ++ ETH_GSTRING_LEN); ++} ++ ++static void qca8k_mib_autocast_handler(struct dsa_switch *ds, struct sk_buff *skb) ++{ ++ const struct qca8k_match_data *match_data; ++ struct qca8k_mib_eth_data *mib_eth_data; ++ struct qca8k_priv *priv = ds->priv; ++ const struct qca8k_mib_desc *mib; ++ struct mib_ethhdr *mib_ethhdr; ++ int i, mib_len, offset = 0; ++ u64 *data; ++ u8 port; ++ ++ mib_ethhdr = (struct mib_ethhdr *)skb_mac_header(skb); ++ mib_eth_data = &priv->mib_eth_data; ++ ++ /* The switch autocast every port. Ignore other packet and ++ * parse only the requested one. ++ */ ++ port = FIELD_GET(QCA_HDR_RECV_SOURCE_PORT, ntohs(mib_ethhdr->hdr)); ++ if (port != mib_eth_data->req_port) ++ goto exit; ++ ++ match_data = device_get_match_data(priv->dev); ++ data = mib_eth_data->data; ++ ++ for (i = 0; i < match_data->mib_count; i++) { ++ mib = &ar8327_mib[i]; ++ ++ /* First 3 mib are present in the skb head */ ++ if (i < 3) { ++ data[i] = mib_ethhdr->data[i]; ++ continue; ++ } ++ ++ mib_len = sizeof(uint32_t); ++ ++ /* Some mib are 64 bit wide */ ++ if (mib->size == 2) ++ mib_len = sizeof(uint64_t); ++ ++ /* Copy the mib value from packet to the */ ++ memcpy(data + i, skb->data + offset, mib_len); ++ ++ /* Set the offset for the next mib */ ++ offset += mib_len; ++ } ++ ++exit: ++ /* Complete on receiving all the mib packet */ ++ if (refcount_dec_and_test(&mib_eth_data->port_parsed)) ++ complete(&mib_eth_data->rw_done); ++} ++ ++static int ++qca8k_get_ethtool_stats_eth(struct dsa_switch *ds, int port, u64 *data) ++{ ++ struct dsa_port *dp = dsa_to_port(ds, port); ++ struct qca8k_mib_eth_data *mib_eth_data; ++ struct qca8k_priv *priv = ds->priv; ++ int ret; ++ ++ mib_eth_data = &priv->mib_eth_data; ++ ++ mutex_lock(&mib_eth_data->mutex); ++ ++ reinit_completion(&mib_eth_data->rw_done); ++ ++ mib_eth_data->req_port = dp->index; ++ mib_eth_data->data = data; ++ refcount_set(&mib_eth_data->port_parsed, QCA8K_NUM_PORTS); ++ ++ mutex_lock(&priv->reg_mutex); ++ ++ /* Send mib autocast request */ ++ ret = regmap_update_bits(priv->regmap, QCA8K_REG_MIB, ++ QCA8K_MIB_FUNC | QCA8K_MIB_BUSY, ++ FIELD_PREP(QCA8K_MIB_FUNC, QCA8K_MIB_CAST) | ++ QCA8K_MIB_BUSY); ++ ++ mutex_unlock(&priv->reg_mutex); ++ ++ if (ret) ++ goto exit; ++ ++ ret = wait_for_completion_timeout(&mib_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); ++ ++exit: ++ mutex_unlock(&mib_eth_data->mutex); ++ ++ return ret; ++} ++ ++static void ++qca8k_get_ethtool_stats(struct dsa_switch *ds, int port, ++ uint64_t *data) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ const struct qca8k_match_data *match_data; ++ const struct qca8k_mib_desc *mib; ++ u32 reg, i, val; ++ u32 hi = 0; ++ int ret; ++ ++ if (priv->mgmt_master && ++ qca8k_get_ethtool_stats_eth(ds, port, data) > 0) ++ return; ++ ++ match_data = of_device_get_match_data(priv->dev); ++ ++ for (i = 0; i < match_data->mib_count; i++) { ++ mib = &ar8327_mib[i]; ++ reg = QCA8K_PORT_MIB_COUNTER(port) + mib->offset; ++ ++ ret = qca8k_read(priv, reg, &val); ++ if (ret < 0) ++ continue; ++ ++ if (mib->size == 2) { ++ ret = qca8k_read(priv, reg + 4, &hi); ++ if (ret < 0) ++ continue; ++ } ++ ++ data[i] = val; ++ if (mib->size == 2) ++ data[i] |= (u64)hi << 32; ++ } ++} ++ ++static int ++qca8k_get_sset_count(struct dsa_switch *ds, int port, int sset) ++{ ++ const struct qca8k_match_data *match_data; ++ struct qca8k_priv *priv = ds->priv; ++ ++ if (sset != ETH_SS_STATS) ++ return 0; ++ ++ match_data = of_device_get_match_data(priv->dev); ++ ++ return match_data->mib_count; ++} ++ ++static int ++qca8k_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *eee) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ u32 lpi_en = QCA8K_REG_EEE_CTRL_LPI_EN(port); ++ u32 reg; ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ ret = qca8k_read(priv, QCA8K_REG_EEE_CTRL, ®); ++ if (ret < 0) ++ goto exit; ++ ++ if (eee->eee_enabled) ++ reg |= lpi_en; ++ else ++ reg &= ~lpi_en; ++ ret = qca8k_write(priv, QCA8K_REG_EEE_CTRL, reg); ++ ++exit: ++ mutex_unlock(&priv->reg_mutex); ++ return ret; ++} ++ ++static int ++qca8k_get_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e) ++{ ++ /* Nothing to do on the port's MAC */ ++ return 0; ++} ++ ++static void ++qca8k_port_stp_state_set(struct dsa_switch *ds, int port, u8 state) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ u32 stp_state; ++ ++ switch (state) { ++ case BR_STATE_DISABLED: ++ stp_state = QCA8K_PORT_LOOKUP_STATE_DISABLED; ++ break; ++ case BR_STATE_BLOCKING: ++ stp_state = QCA8K_PORT_LOOKUP_STATE_BLOCKING; ++ break; ++ case BR_STATE_LISTENING: ++ stp_state = QCA8K_PORT_LOOKUP_STATE_LISTENING; ++ break; ++ case BR_STATE_LEARNING: ++ stp_state = QCA8K_PORT_LOOKUP_STATE_LEARNING; ++ break; ++ case BR_STATE_FORWARDING: ++ default: ++ stp_state = QCA8K_PORT_LOOKUP_STATE_FORWARD; ++ break; ++ } ++ ++ qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_STATE_MASK, stp_state); ++} ++ ++static int ++qca8k_port_bridge_join(struct dsa_switch *ds, int port, struct net_device *br) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ int port_mask, cpu_port; ++ int i, ret; ++ ++ cpu_port = dsa_to_port(ds, port)->cpu_dp->index; ++ port_mask = BIT(cpu_port); ++ ++ for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ if (dsa_is_cpu_port(ds, i)) ++ continue; ++ if (dsa_to_port(ds, i)->bridge_dev != br) ++ continue; ++ /* Add this port to the portvlan mask of the other ports ++ * in the bridge ++ */ ++ ret = regmap_set_bits(priv->regmap, ++ QCA8K_PORT_LOOKUP_CTRL(i), ++ BIT(port)); ++ if (ret) ++ return ret; ++ if (i != port) ++ port_mask |= BIT(i); ++ } ++ ++ /* Add all other ports to this ports portvlan mask */ ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_MEMBER, port_mask); ++ ++ return ret; ++} ++ ++static void ++qca8k_port_bridge_leave(struct dsa_switch *ds, int port, struct net_device *br) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ int cpu_port, i; ++ ++ cpu_port = dsa_to_port(ds, port)->cpu_dp->index; ++ ++ for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ if (dsa_is_cpu_port(ds, i)) ++ continue; ++ if (dsa_to_port(ds, i)->bridge_dev != br) ++ continue; ++ /* Remove this port to the portvlan mask of the other ports ++ * in the bridge ++ */ ++ regmap_clear_bits(priv->regmap, ++ QCA8K_PORT_LOOKUP_CTRL(i), ++ BIT(port)); ++ } ++ ++ /* Set the cpu port to be the only one in the portvlan mask of ++ * this port ++ */ ++ qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_MEMBER, BIT(cpu_port)); ++} ++ ++static void ++qca8k_port_fast_age(struct dsa_switch *ds, int port) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ ++ mutex_lock(&priv->reg_mutex); ++ qca8k_fdb_access(priv, QCA8K_FDB_FLUSH_PORT, port); ++ mutex_unlock(&priv->reg_mutex); ++} ++ ++static int ++qca8k_set_ageing_time(struct dsa_switch *ds, unsigned int msecs) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ unsigned int secs = msecs / 1000; ++ u32 val; ++ ++ /* AGE_TIME reg is set in 7s step */ ++ val = secs / 7; ++ ++ /* Handle case with 0 as val to NOT disable ++ * learning ++ */ ++ if (!val) ++ val = 1; ++ ++ return regmap_update_bits(priv->regmap, QCA8K_REG_ATU_CTRL, QCA8K_ATU_AGE_TIME_MASK, ++ QCA8K_ATU_AGE_TIME(val)); ++} ++ ++static int ++qca8k_port_enable(struct dsa_switch *ds, int port, ++ struct phy_device *phy) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ ++ qca8k_port_set_status(priv, port, 1); ++ priv->port_enabled_map |= BIT(port); ++ ++ if (dsa_is_user_port(ds, port)) ++ phy_support_asym_pause(phy); ++ ++ return 0; ++} ++ ++static void ++qca8k_port_disable(struct dsa_switch *ds, int port) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ ++ qca8k_port_set_status(priv, port, 0); ++ priv->port_enabled_map &= ~BIT(port); ++} ++ ++static int ++qca8k_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int ret; ++ ++ /* We have only have a general MTU setting. ++ * DSA always set the CPU port's MTU to the largest MTU of the slave ++ * ports. ++ * Setting MTU just for the CPU port is sufficient to correctly set a ++ * value for every port. ++ */ ++ if (!dsa_is_cpu_port(ds, port)) ++ return 0; ++ ++ /* To change the MAX_FRAME_SIZE the cpu ports must be off or ++ * the switch panics. ++ * Turn off both cpu ports before applying the new value to prevent ++ * this. ++ */ ++ if (priv->port_enabled_map & BIT(0)) ++ qca8k_port_set_status(priv, 0, 0); ++ ++ if (priv->port_enabled_map & BIT(6)) ++ qca8k_port_set_status(priv, 6, 0); ++ ++ /* Include L2 header / FCS length */ ++ ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, new_mtu + ETH_HLEN + ETH_FCS_LEN); ++ ++ if (priv->port_enabled_map & BIT(0)) ++ qca8k_port_set_status(priv, 0, 1); ++ ++ if (priv->port_enabled_map & BIT(6)) ++ qca8k_port_set_status(priv, 6, 1); ++ ++ return ret; ++} ++ ++static int ++qca8k_port_max_mtu(struct dsa_switch *ds, int port) ++{ ++ return QCA8K_MAX_MTU; ++} ++ ++static int ++qca8k_port_fdb_insert(struct qca8k_priv *priv, const u8 *addr, ++ u16 port_mask, u16 vid) ++{ ++ /* Set the vid to the port vlan id if no vid is set */ ++ if (!vid) ++ vid = QCA8K_PORT_VID_DEF; ++ ++ return qca8k_fdb_add(priv, addr, port_mask, vid, ++ QCA8K_ATU_STATUS_STATIC); ++} ++ ++static int ++qca8k_port_fdb_add(struct dsa_switch *ds, int port, ++ const unsigned char *addr, u16 vid) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ u16 port_mask = BIT(port); ++ ++ return qca8k_port_fdb_insert(priv, addr, port_mask, vid); ++} ++ ++static int ++qca8k_port_fdb_del(struct dsa_switch *ds, int port, ++ const unsigned char *addr, u16 vid) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ u16 port_mask = BIT(port); ++ ++ if (!vid) ++ vid = QCA8K_PORT_VID_DEF; ++ ++ return qca8k_fdb_del(priv, addr, port_mask, vid); ++} ++ ++static int ++qca8k_port_fdb_dump(struct dsa_switch *ds, int port, ++ dsa_fdb_dump_cb_t *cb, void *data) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ struct qca8k_fdb _fdb = { 0 }; ++ int cnt = QCA8K_NUM_FDB_RECORDS; ++ bool is_static; ++ int ret = 0; ++ ++ mutex_lock(&priv->reg_mutex); ++ while (cnt-- && !qca8k_fdb_next(priv, &_fdb, port)) { ++ if (!_fdb.aging) ++ break; ++ is_static = (_fdb.aging == QCA8K_ATU_STATUS_STATIC); ++ ret = cb(_fdb.mac, _fdb.vid, is_static, data); ++ if (ret) ++ break; ++ } ++ mutex_unlock(&priv->reg_mutex); ++ ++ return 0; ++} ++ ++static int ++qca8k_port_mdb_add(struct dsa_switch *ds, int port, ++ const struct switchdev_obj_port_mdb *mdb) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ const u8 *addr = mdb->addr; ++ u16 vid = mdb->vid; ++ ++ return qca8k_fdb_search_and_insert(priv, BIT(port), addr, vid); ++} ++ ++static int ++qca8k_port_mdb_del(struct dsa_switch *ds, int port, ++ const struct switchdev_obj_port_mdb *mdb) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ const u8 *addr = mdb->addr; ++ u16 vid = mdb->vid; ++ ++ return qca8k_fdb_search_and_del(priv, BIT(port), addr, vid); ++} ++ ++static int ++qca8k_port_mirror_add(struct dsa_switch *ds, int port, ++ struct dsa_mall_mirror_tc_entry *mirror, ++ bool ingress) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int monitor_port, ret; ++ u32 reg, val; ++ ++ /* Check for existent entry */ ++ if ((ingress ? priv->mirror_rx : priv->mirror_tx) & BIT(port)) ++ return -EEXIST; ++ ++ ret = regmap_read(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, &val); ++ if (ret) ++ return ret; ++ ++ /* QCA83xx can have only one port set to mirror mode. ++ * Check that the correct port is requested and return error otherwise. ++ * When no mirror port is set, the values is set to 0xF ++ */ ++ monitor_port = FIELD_GET(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); ++ if (monitor_port != 0xF && monitor_port != mirror->to_local_port) ++ return -EEXIST; ++ ++ /* Set the monitor port */ ++ val = FIELD_PREP(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, ++ mirror->to_local_port); ++ ret = regmap_update_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, ++ QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); ++ if (ret) ++ return ret; ++ ++ if (ingress) { ++ reg = QCA8K_PORT_LOOKUP_CTRL(port); ++ val = QCA8K_PORT_LOOKUP_ING_MIRROR_EN; ++ } else { ++ reg = QCA8K_REG_PORT_HOL_CTRL1(port); ++ val = QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN; ++ } ++ ++ ret = regmap_update_bits(priv->regmap, reg, val, val); ++ if (ret) ++ return ret; ++ ++ /* Track mirror port for tx and rx to decide when the ++ * mirror port has to be disabled. ++ */ ++ if (ingress) ++ priv->mirror_rx |= BIT(port); ++ else ++ priv->mirror_tx |= BIT(port); ++ ++ return 0; ++} ++ ++static void ++qca8k_port_mirror_del(struct dsa_switch *ds, int port, ++ struct dsa_mall_mirror_tc_entry *mirror) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ u32 reg, val; ++ int ret; ++ ++ if (mirror->ingress) { ++ reg = QCA8K_PORT_LOOKUP_CTRL(port); ++ val = QCA8K_PORT_LOOKUP_ING_MIRROR_EN; ++ } else { ++ reg = QCA8K_REG_PORT_HOL_CTRL1(port); ++ val = QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN; ++ } ++ ++ ret = regmap_clear_bits(priv->regmap, reg, val); ++ if (ret) ++ goto err; ++ ++ if (mirror->ingress) ++ priv->mirror_rx &= ~BIT(port); ++ else ++ priv->mirror_tx &= ~BIT(port); ++ ++ /* No port set to send packet to mirror port. Disable mirror port */ ++ if (!priv->mirror_rx && !priv->mirror_tx) { ++ val = FIELD_PREP(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, 0xF); ++ ret = regmap_update_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, ++ QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); ++ if (ret) ++ goto err; ++ } ++err: ++ dev_err(priv->dev, "Failed to del mirror port from %d", port); ++} ++ ++static int ++qca8k_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering, ++ struct netlink_ext_ack *extack) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int ret; ++ ++ if (vlan_filtering) { ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_VLAN_MODE_MASK, ++ QCA8K_PORT_LOOKUP_VLAN_MODE_SECURE); ++ } else { ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_VLAN_MODE_MASK, ++ QCA8K_PORT_LOOKUP_VLAN_MODE_NONE); ++ } ++ ++ return ret; ++} ++ ++static int ++qca8k_port_vlan_add(struct dsa_switch *ds, int port, ++ const struct switchdev_obj_port_vlan *vlan, ++ struct netlink_ext_ack *extack) ++{ ++ bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; ++ bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID; ++ struct qca8k_priv *priv = ds->priv; ++ int ret; ++ ++ ret = qca8k_vlan_add(priv, port, vlan->vid, untagged); ++ if (ret) { ++ dev_err(priv->dev, "Failed to add VLAN to port %d (%d)", port, ret); ++ return ret; ++ } ++ ++ if (pvid) { ++ ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(port), ++ QCA8K_EGREES_VLAN_PORT_MASK(port), ++ QCA8K_EGREES_VLAN_PORT(port, vlan->vid)); ++ if (ret) ++ return ret; ++ ++ ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(port), ++ QCA8K_PORT_VLAN_CVID(vlan->vid) | ++ QCA8K_PORT_VLAN_SVID(vlan->vid)); ++ } ++ ++ return ret; ++} ++ ++static int ++qca8k_port_vlan_del(struct dsa_switch *ds, int port, ++ const struct switchdev_obj_port_vlan *vlan) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int ret; ++ ++ ret = qca8k_vlan_del(priv, port, vlan->vid); ++ if (ret) ++ dev_err(priv->dev, "Failed to delete VLAN from port %d (%d)", port, ret); ++ ++ return ret; ++} ++ ++static u32 qca8k_get_phy_flags(struct dsa_switch *ds, int port) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ ++ /* Communicate to the phy internal driver the switch revision. ++ * Based on the switch revision different values needs to be ++ * set to the dbg and mmd reg on the phy. ++ * The first 2 bit are used to communicate the switch revision ++ * to the phy driver. ++ */ ++ if (port > 0 && port < 6) ++ return priv->switch_revision; ++ ++ return 0; ++} ++ ++static enum dsa_tag_protocol ++qca8k_get_tag_protocol(struct dsa_switch *ds, int port, ++ enum dsa_tag_protocol mp) ++{ ++ return DSA_TAG_PROTO_QCA; ++} ++ ++static bool ++qca8k_lag_can_offload(struct dsa_switch *ds, ++ struct net_device *lag, ++ struct netdev_lag_upper_info *info) ++{ ++ struct dsa_port *dp; ++ int id, members = 0; ++ ++ id = dsa_lag_id(ds->dst, lag); ++ if (id < 0 || id >= ds->num_lag_ids) ++ return false; ++ ++ dsa_lag_foreach_port(dp, ds->dst, lag) ++ /* Includes the port joining the LAG */ ++ members++; ++ ++ if (members > QCA8K_NUM_PORTS_FOR_LAG) ++ return false; ++ ++ if (info->tx_type != NETDEV_LAG_TX_TYPE_HASH) ++ return false; ++ ++ if (info->hash_type != NETDEV_LAG_HASH_L2 && ++ info->hash_type != NETDEV_LAG_HASH_L23) ++ return false; ++ ++ return true; ++} ++ ++static int ++qca8k_lag_setup_hash(struct dsa_switch *ds, ++ struct net_device *lag, ++ struct netdev_lag_upper_info *info) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ bool unique_lag = true; ++ u32 hash = 0; ++ int i, id; ++ ++ id = dsa_lag_id(ds->dst, lag); ++ ++ switch (info->hash_type) { ++ case NETDEV_LAG_HASH_L23: ++ hash |= QCA8K_TRUNK_HASH_SIP_EN; ++ hash |= QCA8K_TRUNK_HASH_DIP_EN; ++ fallthrough; ++ case NETDEV_LAG_HASH_L2: ++ hash |= QCA8K_TRUNK_HASH_SA_EN; ++ hash |= QCA8K_TRUNK_HASH_DA_EN; ++ break; ++ default: /* We should NEVER reach this */ ++ return -EOPNOTSUPP; ++ } ++ ++ /* Check if we are the unique configured LAG */ ++ dsa_lags_foreach_id(i, ds->dst) ++ if (i != id && dsa_lag_dev(ds->dst, i)) { ++ unique_lag = false; ++ break; ++ } ++ ++ /* Hash Mode is global. Make sure the same Hash Mode ++ * is set to all the 4 possible lag. ++ * If we are the unique LAG we can set whatever hash ++ * mode we want. ++ * To change hash mode it's needed to remove all LAG ++ * and change the mode with the latest. ++ */ ++ if (unique_lag) { ++ priv->lag_hash_mode = hash; ++ } else if (priv->lag_hash_mode != hash) { ++ netdev_err(lag, "Error: Mismateched Hash Mode across different lag is not supported\n"); ++ return -EOPNOTSUPP; ++ } ++ ++ return regmap_update_bits(priv->regmap, QCA8K_TRUNK_HASH_EN_CTRL, ++ QCA8K_TRUNK_HASH_MASK, hash); ++} ++ ++static int ++qca8k_lag_refresh_portmap(struct dsa_switch *ds, int port, ++ struct net_device *lag, bool delete) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int ret, id, i; ++ u32 val; ++ ++ id = dsa_lag_id(ds->dst, lag); ++ ++ /* Read current port member */ ++ ret = regmap_read(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL0, &val); ++ if (ret) ++ return ret; ++ ++ /* Shift val to the correct trunk */ ++ val >>= QCA8K_REG_GOL_TRUNK_SHIFT(id); ++ val &= QCA8K_REG_GOL_TRUNK_MEMBER_MASK; ++ if (delete) ++ val &= ~BIT(port); ++ else ++ val |= BIT(port); ++ ++ /* Update port member. With empty portmap disable trunk */ ++ ret = regmap_update_bits(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL0, ++ QCA8K_REG_GOL_TRUNK_MEMBER(id) | ++ QCA8K_REG_GOL_TRUNK_EN(id), ++ !val << QCA8K_REG_GOL_TRUNK_SHIFT(id) | ++ val << QCA8K_REG_GOL_TRUNK_SHIFT(id)); ++ ++ /* Search empty member if adding or port on deleting */ ++ for (i = 0; i < QCA8K_NUM_PORTS_FOR_LAG; i++) { ++ ret = regmap_read(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL(id), &val); ++ if (ret) ++ return ret; ++ ++ val >>= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i); ++ val &= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_MASK; ++ ++ if (delete) { ++ /* If port flagged to be disabled assume this member is ++ * empty ++ */ ++ if (val != QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK) ++ continue; ++ ++ val &= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT_MASK; ++ if (val != port) ++ continue; ++ } else { ++ /* If port flagged to be enabled assume this member is ++ * already set ++ */ ++ if (val == QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK) ++ continue; ++ } ++ ++ /* We have found the member to add/remove */ ++ break; ++ } ++ ++ /* Set port in the correct port mask or disable port if in delete mode */ ++ return regmap_update_bits(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL(id), ++ QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN(id, i) | ++ QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT(id, i), ++ !delete << QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i) | ++ port << QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i)); ++} ++ ++static int ++qca8k_port_lag_join(struct dsa_switch *ds, int port, ++ struct net_device *lag, ++ struct netdev_lag_upper_info *info) ++{ ++ int ret; ++ ++ if (!qca8k_lag_can_offload(ds, lag, info)) ++ return -EOPNOTSUPP; ++ ++ ret = qca8k_lag_setup_hash(ds, lag, info); ++ if (ret) ++ return ret; ++ ++ return qca8k_lag_refresh_portmap(ds, port, lag, false); ++} ++ ++static int ++qca8k_port_lag_leave(struct dsa_switch *ds, int port, ++ struct net_device *lag) ++{ ++ return qca8k_lag_refresh_portmap(ds, port, lag, true); ++} ++ ++static void ++qca8k_master_change(struct dsa_switch *ds, const struct net_device *master, ++ bool operational) ++{ ++ struct dsa_port *dp = master->dsa_ptr; ++ struct qca8k_priv *priv = ds->priv; ++ ++ /* Ethernet MIB/MDIO is only supported for CPU port 0 */ ++ if (dp->index != 0) ++ return; ++ ++ mutex_lock(&priv->mgmt_eth_data.mutex); ++ mutex_lock(&priv->mib_eth_data.mutex); ++ ++ priv->mgmt_master = operational ? (struct net_device *)master : NULL; ++ ++ mutex_unlock(&priv->mib_eth_data.mutex); ++ mutex_unlock(&priv->mgmt_eth_data.mutex); ++} ++ ++static int qca8k_connect_tag_protocol(struct dsa_switch *ds, ++ enum dsa_tag_protocol proto) ++{ ++ struct qca_tagger_data *tagger_data; ++ ++ switch (proto) { ++ case DSA_TAG_PROTO_QCA: ++ tagger_data = ds->tagger_data; ++ ++ tagger_data->rw_reg_ack_handler = qca8k_rw_reg_ack_handler; ++ tagger_data->mib_autocast_handler = qca8k_mib_autocast_handler; ++ ++ break; ++ default: ++ return -EOPNOTSUPP; ++ } ++ ++ return 0; ++} ++ ++static const struct dsa_switch_ops qca8k_switch_ops = { ++ .get_tag_protocol = qca8k_get_tag_protocol, ++ .setup = qca8k_setup, ++ .get_strings = qca8k_get_strings, ++ .get_ethtool_stats = qca8k_get_ethtool_stats, ++ .get_sset_count = qca8k_get_sset_count, ++ .set_ageing_time = qca8k_set_ageing_time, ++ .get_mac_eee = qca8k_get_mac_eee, ++ .set_mac_eee = qca8k_set_mac_eee, ++ .port_enable = qca8k_port_enable, ++ .port_disable = qca8k_port_disable, ++ .port_change_mtu = qca8k_port_change_mtu, ++ .port_max_mtu = qca8k_port_max_mtu, ++ .port_stp_state_set = qca8k_port_stp_state_set, ++ .port_bridge_join = qca8k_port_bridge_join, ++ .port_bridge_leave = qca8k_port_bridge_leave, ++ .port_fast_age = qca8k_port_fast_age, ++ .port_fdb_add = qca8k_port_fdb_add, ++ .port_fdb_del = qca8k_port_fdb_del, ++ .port_fdb_dump = qca8k_port_fdb_dump, ++ .port_mdb_add = qca8k_port_mdb_add, ++ .port_mdb_del = qca8k_port_mdb_del, ++ .port_mirror_add = qca8k_port_mirror_add, ++ .port_mirror_del = qca8k_port_mirror_del, ++ .port_vlan_filtering = qca8k_port_vlan_filtering, ++ .port_vlan_add = qca8k_port_vlan_add, ++ .port_vlan_del = qca8k_port_vlan_del, ++ .phylink_validate = qca8k_phylink_validate, ++ .phylink_mac_link_state = qca8k_phylink_mac_link_state, ++ .phylink_mac_config = qca8k_phylink_mac_config, ++ .phylink_mac_link_down = qca8k_phylink_mac_link_down, ++ .phylink_mac_link_up = qca8k_phylink_mac_link_up, ++ .get_phy_flags = qca8k_get_phy_flags, ++ .port_lag_join = qca8k_port_lag_join, ++ .port_lag_leave = qca8k_port_lag_leave, ++ .master_state_change = qca8k_master_change, ++ .connect_tag_protocol = qca8k_connect_tag_protocol, ++}; ++ ++static int qca8k_read_switch_id(struct qca8k_priv *priv) ++{ ++ const struct qca8k_match_data *data; ++ u32 val; ++ u8 id; ++ int ret; ++ ++ /* get the switches ID from the compatible */ ++ data = of_device_get_match_data(priv->dev); ++ if (!data) ++ return -ENODEV; ++ ++ ret = qca8k_read(priv, QCA8K_REG_MASK_CTRL, &val); ++ if (ret < 0) ++ return -ENODEV; ++ ++ id = QCA8K_MASK_CTRL_DEVICE_ID(val); ++ if (id != data->id) { ++ dev_err(priv->dev, "Switch id detected %x but expected %x", id, data->id); ++ return -ENODEV; ++ } ++ ++ priv->switch_id = id; ++ ++ /* Save revision to communicate to the internal PHY driver */ ++ priv->switch_revision = QCA8K_MASK_CTRL_REV_ID(val); ++ ++ return 0; ++} ++ ++static int ++qca8k_sw_probe(struct mdio_device *mdiodev) ++{ ++ struct qca8k_priv *priv; ++ int ret; ++ ++ /* allocate the private data struct so that we can probe the switches ++ * ID register ++ */ ++ priv = devm_kzalloc(&mdiodev->dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ priv->bus = mdiodev->bus; ++ priv->dev = &mdiodev->dev; ++ ++ priv->reset_gpio = devm_gpiod_get_optional(priv->dev, "reset", ++ GPIOD_ASIS); ++ if (IS_ERR(priv->reset_gpio)) ++ return PTR_ERR(priv->reset_gpio); ++ ++ if (priv->reset_gpio) { ++ gpiod_set_value_cansleep(priv->reset_gpio, 1); ++ /* The active low duration must be greater than 10 ms ++ * and checkpatch.pl wants 20 ms. ++ */ ++ msleep(20); ++ gpiod_set_value_cansleep(priv->reset_gpio, 0); ++ } ++ ++ /* Start by setting up the register mapping */ ++ priv->regmap = devm_regmap_init(&mdiodev->dev, NULL, priv, ++ &qca8k_regmap_config); ++ if (IS_ERR(priv->regmap)) { ++ dev_err(priv->dev, "regmap initialization failed"); ++ return PTR_ERR(priv->regmap); ++ } ++ ++ priv->mdio_cache.page = 0xffff; ++ priv->mdio_cache.lo = 0xffff; ++ priv->mdio_cache.hi = 0xffff; ++ ++ /* Check the detected switch id */ ++ ret = qca8k_read_switch_id(priv); ++ if (ret) ++ return ret; ++ ++ priv->ds = devm_kzalloc(&mdiodev->dev, sizeof(*priv->ds), GFP_KERNEL); ++ if (!priv->ds) ++ return -ENOMEM; ++ ++ mutex_init(&priv->mgmt_eth_data.mutex); ++ init_completion(&priv->mgmt_eth_data.rw_done); ++ ++ mutex_init(&priv->mib_eth_data.mutex); ++ init_completion(&priv->mib_eth_data.rw_done); ++ ++ priv->ds->dev = &mdiodev->dev; ++ priv->ds->num_ports = QCA8K_NUM_PORTS; ++ priv->ds->priv = priv; ++ priv->ds->ops = &qca8k_switch_ops; ++ mutex_init(&priv->reg_mutex); ++ dev_set_drvdata(&mdiodev->dev, priv); ++ ++ return dsa_register_switch(priv->ds); ++} ++ ++static void ++qca8k_sw_remove(struct mdio_device *mdiodev) ++{ ++ struct qca8k_priv *priv = dev_get_drvdata(&mdiodev->dev); ++ int i; ++ ++ if (!priv) ++ return; ++ ++ for (i = 0; i < QCA8K_NUM_PORTS; i++) ++ qca8k_port_set_status(priv, i, 0); ++ ++ dsa_unregister_switch(priv->ds); ++ ++ dev_set_drvdata(&mdiodev->dev, NULL); ++} ++ ++static void qca8k_sw_shutdown(struct mdio_device *mdiodev) ++{ ++ struct qca8k_priv *priv = dev_get_drvdata(&mdiodev->dev); ++ ++ if (!priv) ++ return; ++ ++ dsa_switch_shutdown(priv->ds); ++ ++ dev_set_drvdata(&mdiodev->dev, NULL); ++} ++ ++#ifdef CONFIG_PM_SLEEP ++static void ++qca8k_set_pm(struct qca8k_priv *priv, int enable) ++{ ++ int port; ++ ++ for (port = 0; port < QCA8K_NUM_PORTS; port++) { ++ /* Do not enable on resume if the port was ++ * disabled before. ++ */ ++ if (!(priv->port_enabled_map & BIT(port))) ++ continue; ++ ++ qca8k_port_set_status(priv, port, enable); ++ } ++} ++ ++static int qca8k_suspend(struct device *dev) ++{ ++ struct qca8k_priv *priv = dev_get_drvdata(dev); ++ ++ qca8k_set_pm(priv, 0); ++ ++ return dsa_switch_suspend(priv->ds); ++} ++ ++static int qca8k_resume(struct device *dev) ++{ ++ struct qca8k_priv *priv = dev_get_drvdata(dev); ++ ++ qca8k_set_pm(priv, 1); ++ ++ return dsa_switch_resume(priv->ds); ++} ++#endif /* CONFIG_PM_SLEEP */ ++ ++static SIMPLE_DEV_PM_OPS(qca8k_pm_ops, ++ qca8k_suspend, qca8k_resume); ++ ++static const struct qca8k_match_data qca8327 = { ++ .id = QCA8K_ID_QCA8327, ++ .reduced_package = true, ++ .mib_count = QCA8K_QCA832X_MIB_COUNT, ++}; ++ ++static const struct qca8k_match_data qca8328 = { ++ .id = QCA8K_ID_QCA8327, ++ .mib_count = QCA8K_QCA832X_MIB_COUNT, ++}; ++ ++static const struct qca8k_match_data qca833x = { ++ .id = QCA8K_ID_QCA8337, ++ .mib_count = QCA8K_QCA833X_MIB_COUNT, ++}; ++ ++static const struct of_device_id qca8k_of_match[] = { ++ { .compatible = "qca,qca8327", .data = &qca8327 }, ++ { .compatible = "qca,qca8328", .data = &qca8328 }, ++ { .compatible = "qca,qca8334", .data = &qca833x }, ++ { .compatible = "qca,qca8337", .data = &qca833x }, ++ { /* sentinel */ }, ++}; ++ ++static struct mdio_driver qca8kmdio_driver = { ++ .probe = qca8k_sw_probe, ++ .remove = qca8k_sw_remove, ++ .shutdown = qca8k_sw_shutdown, ++ .mdiodrv.driver = { ++ .name = "qca8k", ++ .of_match_table = qca8k_of_match, ++ .pm = &qca8k_pm_ops, ++ }, ++}; ++ ++mdio_module_driver(qca8kmdio_driver); ++ ++MODULE_AUTHOR("Mathieu Olivari, John Crispin "); ++MODULE_DESCRIPTION("Driver for QCA8K ethernet switch family"); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:qca8k"); +--- /dev/null ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -0,0 +1,411 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++/* ++ * Copyright (C) 2009 Felix Fietkau ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * Copyright (c) 2015, The Linux Foundation. All rights reserved. ++ */ ++ ++#ifndef __QCA8K_H ++#define __QCA8K_H ++ ++#include ++#include ++#include ++#include ++ ++#define QCA8K_ETHERNET_MDIO_PRIORITY 7 ++#define QCA8K_ETHERNET_PHY_PRIORITY 6 ++#define QCA8K_ETHERNET_TIMEOUT 100 ++ ++#define QCA8K_NUM_PORTS 7 ++#define QCA8K_NUM_CPU_PORTS 2 ++#define QCA8K_MAX_MTU 9000 ++#define QCA8K_NUM_LAGS 4 ++#define QCA8K_NUM_PORTS_FOR_LAG 4 ++ ++#define PHY_ID_QCA8327 0x004dd034 ++#define QCA8K_ID_QCA8327 0x12 ++#define PHY_ID_QCA8337 0x004dd036 ++#define QCA8K_ID_QCA8337 0x13 ++ ++#define QCA8K_QCA832X_MIB_COUNT 39 ++#define QCA8K_QCA833X_MIB_COUNT 41 ++ ++#define QCA8K_BUSY_WAIT_TIMEOUT 2000 ++ ++#define QCA8K_NUM_FDB_RECORDS 2048 ++ ++#define QCA8K_PORT_VID_DEF 1 ++ ++/* Global control registers */ ++#define QCA8K_REG_MASK_CTRL 0x000 ++#define QCA8K_MASK_CTRL_REV_ID_MASK GENMASK(7, 0) ++#define QCA8K_MASK_CTRL_REV_ID(x) FIELD_GET(QCA8K_MASK_CTRL_REV_ID_MASK, x) ++#define QCA8K_MASK_CTRL_DEVICE_ID_MASK GENMASK(15, 8) ++#define QCA8K_MASK_CTRL_DEVICE_ID(x) FIELD_GET(QCA8K_MASK_CTRL_DEVICE_ID_MASK, x) ++#define QCA8K_REG_PORT0_PAD_CTRL 0x004 ++#define QCA8K_PORT0_PAD_MAC06_EXCHANGE_EN BIT(31) ++#define QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE BIT(19) ++#define QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE BIT(18) ++#define QCA8K_REG_PORT5_PAD_CTRL 0x008 ++#define QCA8K_REG_PORT6_PAD_CTRL 0x00c ++#define QCA8K_PORT_PAD_RGMII_EN BIT(26) ++#define QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK GENMASK(23, 22) ++#define QCA8K_PORT_PAD_RGMII_TX_DELAY(x) FIELD_PREP(QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK, x) ++#define QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK GENMASK(21, 20) ++#define QCA8K_PORT_PAD_RGMII_RX_DELAY(x) FIELD_PREP(QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK, x) ++#define QCA8K_PORT_PAD_RGMII_TX_DELAY_EN BIT(25) ++#define QCA8K_PORT_PAD_RGMII_RX_DELAY_EN BIT(24) ++#define QCA8K_PORT_PAD_SGMII_EN BIT(7) ++#define QCA8K_REG_PWS 0x010 ++#define QCA8K_PWS_POWER_ON_SEL BIT(31) ++/* This reg is only valid for QCA832x and toggle the package ++ * type from 176 pin (by default) to 148 pin used on QCA8327 ++ */ ++#define QCA8327_PWS_PACKAGE148_EN BIT(30) ++#define QCA8K_PWS_LED_OPEN_EN_CSR BIT(24) ++#define QCA8K_PWS_SERDES_AEN_DIS BIT(7) ++#define QCA8K_REG_MODULE_EN 0x030 ++#define QCA8K_MODULE_EN_MIB BIT(0) ++#define QCA8K_REG_MIB 0x034 ++#define QCA8K_MIB_FUNC GENMASK(26, 24) ++#define QCA8K_MIB_CPU_KEEP BIT(20) ++#define QCA8K_MIB_BUSY BIT(17) ++#define QCA8K_MDIO_MASTER_CTRL 0x3c ++#define QCA8K_MDIO_MASTER_BUSY BIT(31) ++#define QCA8K_MDIO_MASTER_EN BIT(30) ++#define QCA8K_MDIO_MASTER_READ BIT(27) ++#define QCA8K_MDIO_MASTER_WRITE 0 ++#define QCA8K_MDIO_MASTER_SUP_PRE BIT(26) ++#define QCA8K_MDIO_MASTER_PHY_ADDR_MASK GENMASK(25, 21) ++#define QCA8K_MDIO_MASTER_PHY_ADDR(x) FIELD_PREP(QCA8K_MDIO_MASTER_PHY_ADDR_MASK, x) ++#define QCA8K_MDIO_MASTER_REG_ADDR_MASK GENMASK(20, 16) ++#define QCA8K_MDIO_MASTER_REG_ADDR(x) FIELD_PREP(QCA8K_MDIO_MASTER_REG_ADDR_MASK, x) ++#define QCA8K_MDIO_MASTER_DATA_MASK GENMASK(15, 0) ++#define QCA8K_MDIO_MASTER_DATA(x) FIELD_PREP(QCA8K_MDIO_MASTER_DATA_MASK, x) ++#define QCA8K_MDIO_MASTER_MAX_PORTS 5 ++#define QCA8K_MDIO_MASTER_MAX_REG 32 ++#define QCA8K_GOL_MAC_ADDR0 0x60 ++#define QCA8K_GOL_MAC_ADDR1 0x64 ++#define QCA8K_MAX_FRAME_SIZE 0x78 ++#define QCA8K_REG_PORT_STATUS(_i) (0x07c + (_i) * 4) ++#define QCA8K_PORT_STATUS_SPEED GENMASK(1, 0) ++#define QCA8K_PORT_STATUS_SPEED_10 0 ++#define QCA8K_PORT_STATUS_SPEED_100 0x1 ++#define QCA8K_PORT_STATUS_SPEED_1000 0x2 ++#define QCA8K_PORT_STATUS_TXMAC BIT(2) ++#define QCA8K_PORT_STATUS_RXMAC BIT(3) ++#define QCA8K_PORT_STATUS_TXFLOW BIT(4) ++#define QCA8K_PORT_STATUS_RXFLOW BIT(5) ++#define QCA8K_PORT_STATUS_DUPLEX BIT(6) ++#define QCA8K_PORT_STATUS_LINK_UP BIT(8) ++#define QCA8K_PORT_STATUS_LINK_AUTO BIT(9) ++#define QCA8K_PORT_STATUS_LINK_PAUSE BIT(10) ++#define QCA8K_PORT_STATUS_FLOW_AUTO BIT(12) ++#define QCA8K_REG_PORT_HDR_CTRL(_i) (0x9c + (_i * 4)) ++#define QCA8K_PORT_HDR_CTRL_RX_MASK GENMASK(3, 2) ++#define QCA8K_PORT_HDR_CTRL_TX_MASK GENMASK(1, 0) ++#define QCA8K_PORT_HDR_CTRL_ALL 2 ++#define QCA8K_PORT_HDR_CTRL_MGMT 1 ++#define QCA8K_PORT_HDR_CTRL_NONE 0 ++#define QCA8K_REG_SGMII_CTRL 0x0e0 ++#define QCA8K_SGMII_EN_PLL BIT(1) ++#define QCA8K_SGMII_EN_RX BIT(2) ++#define QCA8K_SGMII_EN_TX BIT(3) ++#define QCA8K_SGMII_EN_SD BIT(4) ++#define QCA8K_SGMII_CLK125M_DELAY BIT(7) ++#define QCA8K_SGMII_MODE_CTRL_MASK GENMASK(23, 22) ++#define QCA8K_SGMII_MODE_CTRL(x) FIELD_PREP(QCA8K_SGMII_MODE_CTRL_MASK, x) ++#define QCA8K_SGMII_MODE_CTRL_BASEX QCA8K_SGMII_MODE_CTRL(0x0) ++#define QCA8K_SGMII_MODE_CTRL_PHY QCA8K_SGMII_MODE_CTRL(0x1) ++#define QCA8K_SGMII_MODE_CTRL_MAC QCA8K_SGMII_MODE_CTRL(0x2) ++ ++/* MAC_PWR_SEL registers */ ++#define QCA8K_REG_MAC_PWR_SEL 0x0e4 ++#define QCA8K_MAC_PWR_RGMII1_1_8V BIT(18) ++#define QCA8K_MAC_PWR_RGMII0_1_8V BIT(19) ++ ++/* EEE control registers */ ++#define QCA8K_REG_EEE_CTRL 0x100 ++#define QCA8K_REG_EEE_CTRL_LPI_EN(_i) ((_i + 1) * 2) ++ ++/* TRUNK_HASH_EN registers */ ++#define QCA8K_TRUNK_HASH_EN_CTRL 0x270 ++#define QCA8K_TRUNK_HASH_SIP_EN BIT(3) ++#define QCA8K_TRUNK_HASH_DIP_EN BIT(2) ++#define QCA8K_TRUNK_HASH_SA_EN BIT(1) ++#define QCA8K_TRUNK_HASH_DA_EN BIT(0) ++#define QCA8K_TRUNK_HASH_MASK GENMASK(3, 0) ++ ++/* ACL registers */ ++#define QCA8K_REG_PORT_VLAN_CTRL0(_i) (0x420 + (_i * 8)) ++#define QCA8K_PORT_VLAN_CVID_MASK GENMASK(27, 16) ++#define QCA8K_PORT_VLAN_CVID(x) FIELD_PREP(QCA8K_PORT_VLAN_CVID_MASK, x) ++#define QCA8K_PORT_VLAN_SVID_MASK GENMASK(11, 0) ++#define QCA8K_PORT_VLAN_SVID(x) FIELD_PREP(QCA8K_PORT_VLAN_SVID_MASK, x) ++#define QCA8K_REG_PORT_VLAN_CTRL1(_i) (0x424 + (_i * 8)) ++#define QCA8K_REG_IPV4_PRI_BASE_ADDR 0x470 ++#define QCA8K_REG_IPV4_PRI_ADDR_MASK 0x474 ++ ++/* Lookup registers */ ++#define QCA8K_REG_ATU_DATA0 0x600 ++#define QCA8K_ATU_ADDR2_MASK GENMASK(31, 24) ++#define QCA8K_ATU_ADDR3_MASK GENMASK(23, 16) ++#define QCA8K_ATU_ADDR4_MASK GENMASK(15, 8) ++#define QCA8K_ATU_ADDR5_MASK GENMASK(7, 0) ++#define QCA8K_REG_ATU_DATA1 0x604 ++#define QCA8K_ATU_PORT_MASK GENMASK(22, 16) ++#define QCA8K_ATU_ADDR0_MASK GENMASK(15, 8) ++#define QCA8K_ATU_ADDR1_MASK GENMASK(7, 0) ++#define QCA8K_REG_ATU_DATA2 0x608 ++#define QCA8K_ATU_VID_MASK GENMASK(19, 8) ++#define QCA8K_ATU_STATUS_MASK GENMASK(3, 0) ++#define QCA8K_ATU_STATUS_STATIC 0xf ++#define QCA8K_REG_ATU_FUNC 0x60c ++#define QCA8K_ATU_FUNC_BUSY BIT(31) ++#define QCA8K_ATU_FUNC_PORT_EN BIT(14) ++#define QCA8K_ATU_FUNC_MULTI_EN BIT(13) ++#define QCA8K_ATU_FUNC_FULL BIT(12) ++#define QCA8K_ATU_FUNC_PORT_MASK GENMASK(11, 8) ++#define QCA8K_REG_VTU_FUNC0 0x610 ++#define QCA8K_VTU_FUNC0_VALID BIT(20) ++#define QCA8K_VTU_FUNC0_IVL_EN BIT(19) ++/* QCA8K_VTU_FUNC0_EG_MODE_MASK GENMASK(17, 4) ++ * It does contain VLAN_MODE for each port [5:4] for port0, ++ * [7:6] for port1 ... [17:16] for port6. Use virtual port ++ * define to handle this. ++ */ ++#define QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i) (4 + (_i) * 2) ++#define QCA8K_VTU_FUNC0_EG_MODE_MASK GENMASK(1, 0) ++#define QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(_i) (GENMASK(1, 0) << QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i)) ++#define QCA8K_VTU_FUNC0_EG_MODE_UNMOD FIELD_PREP(QCA8K_VTU_FUNC0_EG_MODE_MASK, 0x0) ++#define QCA8K_VTU_FUNC0_EG_MODE_PORT_UNMOD(_i) (QCA8K_VTU_FUNC0_EG_MODE_UNMOD << QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i)) ++#define QCA8K_VTU_FUNC0_EG_MODE_UNTAG FIELD_PREP(QCA8K_VTU_FUNC0_EG_MODE_MASK, 0x1) ++#define QCA8K_VTU_FUNC0_EG_MODE_PORT_UNTAG(_i) (QCA8K_VTU_FUNC0_EG_MODE_UNTAG << QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i)) ++#define QCA8K_VTU_FUNC0_EG_MODE_TAG FIELD_PREP(QCA8K_VTU_FUNC0_EG_MODE_MASK, 0x2) ++#define QCA8K_VTU_FUNC0_EG_MODE_PORT_TAG(_i) (QCA8K_VTU_FUNC0_EG_MODE_TAG << QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i)) ++#define QCA8K_VTU_FUNC0_EG_MODE_NOT FIELD_PREP(QCA8K_VTU_FUNC0_EG_MODE_MASK, 0x3) ++#define QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(_i) (QCA8K_VTU_FUNC0_EG_MODE_NOT << QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i)) ++#define QCA8K_REG_VTU_FUNC1 0x614 ++#define QCA8K_VTU_FUNC1_BUSY BIT(31) ++#define QCA8K_VTU_FUNC1_VID_MASK GENMASK(27, 16) ++#define QCA8K_VTU_FUNC1_FULL BIT(4) ++#define QCA8K_REG_ATU_CTRL 0x618 ++#define QCA8K_ATU_AGE_TIME_MASK GENMASK(15, 0) ++#define QCA8K_ATU_AGE_TIME(x) FIELD_PREP(QCA8K_ATU_AGE_TIME_MASK, (x)) ++#define QCA8K_REG_GLOBAL_FW_CTRL0 0x620 ++#define QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN BIT(10) ++#define QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM GENMASK(7, 4) ++#define QCA8K_REG_GLOBAL_FW_CTRL1 0x624 ++#define QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_MASK GENMASK(30, 24) ++#define QCA8K_GLOBAL_FW_CTRL1_BC_DP_MASK GENMASK(22, 16) ++#define QCA8K_GLOBAL_FW_CTRL1_MC_DP_MASK GENMASK(14, 8) ++#define QCA8K_GLOBAL_FW_CTRL1_UC_DP_MASK GENMASK(6, 0) ++#define QCA8K_PORT_LOOKUP_CTRL(_i) (0x660 + (_i) * 0xc) ++#define QCA8K_PORT_LOOKUP_MEMBER GENMASK(6, 0) ++#define QCA8K_PORT_LOOKUP_VLAN_MODE_MASK GENMASK(9, 8) ++#define QCA8K_PORT_LOOKUP_VLAN_MODE(x) FIELD_PREP(QCA8K_PORT_LOOKUP_VLAN_MODE_MASK, x) ++#define QCA8K_PORT_LOOKUP_VLAN_MODE_NONE QCA8K_PORT_LOOKUP_VLAN_MODE(0x0) ++#define QCA8K_PORT_LOOKUP_VLAN_MODE_FALLBACK QCA8K_PORT_LOOKUP_VLAN_MODE(0x1) ++#define QCA8K_PORT_LOOKUP_VLAN_MODE_CHECK QCA8K_PORT_LOOKUP_VLAN_MODE(0x2) ++#define QCA8K_PORT_LOOKUP_VLAN_MODE_SECURE QCA8K_PORT_LOOKUP_VLAN_MODE(0x3) ++#define QCA8K_PORT_LOOKUP_STATE_MASK GENMASK(18, 16) ++#define QCA8K_PORT_LOOKUP_STATE(x) FIELD_PREP(QCA8K_PORT_LOOKUP_STATE_MASK, x) ++#define QCA8K_PORT_LOOKUP_STATE_DISABLED QCA8K_PORT_LOOKUP_STATE(0x0) ++#define QCA8K_PORT_LOOKUP_STATE_BLOCKING QCA8K_PORT_LOOKUP_STATE(0x1) ++#define QCA8K_PORT_LOOKUP_STATE_LISTENING QCA8K_PORT_LOOKUP_STATE(0x2) ++#define QCA8K_PORT_LOOKUP_STATE_LEARNING QCA8K_PORT_LOOKUP_STATE(0x3) ++#define QCA8K_PORT_LOOKUP_STATE_FORWARD QCA8K_PORT_LOOKUP_STATE(0x4) ++#define QCA8K_PORT_LOOKUP_LEARN BIT(20) ++#define QCA8K_PORT_LOOKUP_ING_MIRROR_EN BIT(25) ++ ++#define QCA8K_REG_GOL_TRUNK_CTRL0 0x700 ++/* 4 max trunk first ++ * first 6 bit for member bitmap ++ * 7th bit is to enable trunk port ++ */ ++#define QCA8K_REG_GOL_TRUNK_SHIFT(_i) ((_i) * 8) ++#define QCA8K_REG_GOL_TRUNK_EN_MASK BIT(7) ++#define QCA8K_REG_GOL_TRUNK_EN(_i) (QCA8K_REG_GOL_TRUNK_EN_MASK << QCA8K_REG_GOL_TRUNK_SHIFT(_i)) ++#define QCA8K_REG_GOL_TRUNK_MEMBER_MASK GENMASK(6, 0) ++#define QCA8K_REG_GOL_TRUNK_MEMBER(_i) (QCA8K_REG_GOL_TRUNK_MEMBER_MASK << QCA8K_REG_GOL_TRUNK_SHIFT(_i)) ++/* 0x704 for TRUNK 0-1 --- 0x708 for TRUNK 2-3 */ ++#define QCA8K_REG_GOL_TRUNK_CTRL(_i) (0x704 + (((_i) / 2) * 4)) ++#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_MASK GENMASK(3, 0) ++#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK BIT(3) ++#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT_MASK GENMASK(2, 0) ++#define QCA8K_REG_GOL_TRUNK_ID_SHIFT(_i) (((_i) / 2) * 16) ++#define QCA8K_REG_GOL_MEM_ID_SHIFT(_i) ((_i) * 4) ++/* Complex shift: FIRST shift for port THEN shift for trunk */ ++#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(_i, _j) (QCA8K_REG_GOL_MEM_ID_SHIFT(_j) + QCA8K_REG_GOL_TRUNK_ID_SHIFT(_i)) ++#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN(_i, _j) (QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK << QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(_i, _j)) ++#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT(_i, _j) (QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT_MASK << QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(_i, _j)) ++ ++#define QCA8K_REG_GLOBAL_FC_THRESH 0x800 ++#define QCA8K_GLOBAL_FC_GOL_XON_THRES_MASK GENMASK(24, 16) ++#define QCA8K_GLOBAL_FC_GOL_XON_THRES(x) FIELD_PREP(QCA8K_GLOBAL_FC_GOL_XON_THRES_MASK, x) ++#define QCA8K_GLOBAL_FC_GOL_XOFF_THRES_MASK GENMASK(8, 0) ++#define QCA8K_GLOBAL_FC_GOL_XOFF_THRES(x) FIELD_PREP(QCA8K_GLOBAL_FC_GOL_XOFF_THRES_MASK, x) ++ ++#define QCA8K_REG_PORT_HOL_CTRL0(_i) (0x970 + (_i) * 0x8) ++#define QCA8K_PORT_HOL_CTRL0_EG_PRI0_BUF_MASK GENMASK(3, 0) ++#define QCA8K_PORT_HOL_CTRL0_EG_PRI0(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI0_BUF_MASK, x) ++#define QCA8K_PORT_HOL_CTRL0_EG_PRI1_BUF_MASK GENMASK(7, 4) ++#define QCA8K_PORT_HOL_CTRL0_EG_PRI1(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI1_BUF_MASK, x) ++#define QCA8K_PORT_HOL_CTRL0_EG_PRI2_BUF_MASK GENMASK(11, 8) ++#define QCA8K_PORT_HOL_CTRL0_EG_PRI2(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI2_BUF_MASK, x) ++#define QCA8K_PORT_HOL_CTRL0_EG_PRI3_BUF_MASK GENMASK(15, 12) ++#define QCA8K_PORT_HOL_CTRL0_EG_PRI3(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI3_BUF_MASK, x) ++#define QCA8K_PORT_HOL_CTRL0_EG_PRI4_BUF_MASK GENMASK(19, 16) ++#define QCA8K_PORT_HOL_CTRL0_EG_PRI4(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI4_BUF_MASK, x) ++#define QCA8K_PORT_HOL_CTRL0_EG_PRI5_BUF_MASK GENMASK(23, 20) ++#define QCA8K_PORT_HOL_CTRL0_EG_PRI5(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI5_BUF_MASK, x) ++#define QCA8K_PORT_HOL_CTRL0_EG_PORT_BUF_MASK GENMASK(29, 24) ++#define QCA8K_PORT_HOL_CTRL0_EG_PORT(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PORT_BUF_MASK, x) ++ ++#define QCA8K_REG_PORT_HOL_CTRL1(_i) (0x974 + (_i) * 0x8) ++#define QCA8K_PORT_HOL_CTRL1_ING_BUF_MASK GENMASK(3, 0) ++#define QCA8K_PORT_HOL_CTRL1_ING(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL1_ING_BUF_MASK, x) ++#define QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN BIT(6) ++#define QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN BIT(7) ++#define QCA8K_PORT_HOL_CTRL1_WRED_EN BIT(8) ++#define QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN BIT(16) ++ ++/* Pkt edit registers */ ++#define QCA8K_EGREES_VLAN_PORT_SHIFT(_i) (16 * ((_i) % 2)) ++#define QCA8K_EGREES_VLAN_PORT_MASK(_i) (GENMASK(11, 0) << QCA8K_EGREES_VLAN_PORT_SHIFT(_i)) ++#define QCA8K_EGREES_VLAN_PORT(_i, x) ((x) << QCA8K_EGREES_VLAN_PORT_SHIFT(_i)) ++#define QCA8K_EGRESS_VLAN(x) (0x0c70 + (4 * (x / 2))) ++ ++/* L3 registers */ ++#define QCA8K_HROUTER_CONTROL 0xe00 ++#define QCA8K_HROUTER_CONTROL_GLB_LOCKTIME_M GENMASK(17, 16) ++#define QCA8K_HROUTER_CONTROL_GLB_LOCKTIME_S 16 ++#define QCA8K_HROUTER_CONTROL_ARP_AGE_MODE 1 ++#define QCA8K_HROUTER_PBASED_CONTROL1 0xe08 ++#define QCA8K_HROUTER_PBASED_CONTROL2 0xe0c ++#define QCA8K_HNAT_CONTROL 0xe38 ++ ++/* MIB registers */ ++#define QCA8K_PORT_MIB_COUNTER(_i) (0x1000 + (_i) * 0x100) ++ ++/* QCA specific MII registers */ ++#define MII_ATH_MMD_ADDR 0x0d ++#define MII_ATH_MMD_DATA 0x0e ++ ++enum { ++ QCA8K_PORT_SPEED_10M = 0, ++ QCA8K_PORT_SPEED_100M = 1, ++ QCA8K_PORT_SPEED_1000M = 2, ++ QCA8K_PORT_SPEED_ERR = 3, ++}; ++ ++enum qca8k_fdb_cmd { ++ QCA8K_FDB_FLUSH = 1, ++ QCA8K_FDB_LOAD = 2, ++ QCA8K_FDB_PURGE = 3, ++ QCA8K_FDB_FLUSH_PORT = 5, ++ QCA8K_FDB_NEXT = 6, ++ QCA8K_FDB_SEARCH = 7, ++}; ++ ++enum qca8k_vlan_cmd { ++ QCA8K_VLAN_FLUSH = 1, ++ QCA8K_VLAN_LOAD = 2, ++ QCA8K_VLAN_PURGE = 3, ++ QCA8K_VLAN_REMOVE_PORT = 4, ++ QCA8K_VLAN_NEXT = 5, ++ QCA8K_VLAN_READ = 6, ++}; ++ ++enum qca8k_mid_cmd { ++ QCA8K_MIB_FLUSH = 1, ++ QCA8K_MIB_FLUSH_PORT = 2, ++ QCA8K_MIB_CAST = 3, ++}; ++ ++struct qca8k_match_data { ++ u8 id; ++ bool reduced_package; ++ u8 mib_count; ++}; ++ ++enum { ++ QCA8K_CPU_PORT0, ++ QCA8K_CPU_PORT6, ++}; ++ ++struct qca8k_mgmt_eth_data { ++ struct completion rw_done; ++ struct mutex mutex; /* Enforce one mdio read/write at time */ ++ bool ack; ++ u32 seq; ++ u32 data[4]; ++}; ++ ++struct qca8k_mib_eth_data { ++ struct completion rw_done; ++ struct mutex mutex; /* Process one command at time */ ++ refcount_t port_parsed; /* Counter to track parsed port */ ++ u8 req_port; ++ u64 *data; /* pointer to ethtool data */ ++}; ++ ++struct qca8k_ports_config { ++ bool sgmii_rx_clk_falling_edge; ++ bool sgmii_tx_clk_falling_edge; ++ bool sgmii_enable_pll; ++ u8 rgmii_rx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */ ++ u8 rgmii_tx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */ ++}; ++ ++struct qca8k_mdio_cache { ++/* The 32bit switch registers are accessed indirectly. To achieve this we need ++ * to set the page of the register. Track the last page that was set to reduce ++ * mdio writes ++ */ ++ u16 page; ++/* lo and hi can also be cached and from Documentation we can skip one ++ * extra mdio write if lo or hi is didn't change. ++ */ ++ u16 lo; ++ u16 hi; ++}; ++ ++struct qca8k_priv { ++ u8 switch_id; ++ u8 switch_revision; ++ u8 mirror_rx; ++ u8 mirror_tx; ++ u8 lag_hash_mode; ++ /* Each bit correspond to a port. This switch can support a max of 7 port. ++ * Bit 1: port enabled. Bit 0: port disabled. ++ */ ++ u8 port_enabled_map; ++ struct qca8k_ports_config ports_config; ++ struct regmap *regmap; ++ struct mii_bus *bus; ++ struct dsa_switch *ds; ++ struct mutex reg_mutex; ++ struct device *dev; ++ struct gpio_desc *reset_gpio; ++ struct net_device *mgmt_master; /* Track if mdio/mib Ethernet is available */ ++ struct qca8k_mgmt_eth_data mgmt_eth_data; ++ struct qca8k_mib_eth_data mib_eth_data; ++ struct qca8k_mdio_cache mdio_cache; ++}; ++ ++struct qca8k_mib_desc { ++ unsigned int size; ++ unsigned int offset; ++ const char *name; ++}; ++ ++struct qca8k_fdb { ++ u16 vid; ++ u8 port_mask; ++ u8 aging; ++ u8 mac[6]; ++}; ++ ++#endif /* __QCA8K_H */ +--- a/drivers/net/dsa/qca8k.c ++++ /dev/null +@@ -1,3243 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-/* +- * Copyright (C) 2009 Felix Fietkau +- * Copyright (C) 2011-2012 Gabor Juhos +- * Copyright (c) 2015, 2019, The Linux Foundation. All rights reserved. +- * Copyright (c) 2016 John Crispin +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- +-#include "qca8k.h" +- +-#define MIB_DESC(_s, _o, _n) \ +- { \ +- .size = (_s), \ +- .offset = (_o), \ +- .name = (_n), \ +- } +- +-static const struct qca8k_mib_desc ar8327_mib[] = { +- MIB_DESC(1, 0x00, "RxBroad"), +- MIB_DESC(1, 0x04, "RxPause"), +- MIB_DESC(1, 0x08, "RxMulti"), +- MIB_DESC(1, 0x0c, "RxFcsErr"), +- MIB_DESC(1, 0x10, "RxAlignErr"), +- MIB_DESC(1, 0x14, "RxRunt"), +- MIB_DESC(1, 0x18, "RxFragment"), +- MIB_DESC(1, 0x1c, "Rx64Byte"), +- MIB_DESC(1, 0x20, "Rx128Byte"), +- MIB_DESC(1, 0x24, "Rx256Byte"), +- MIB_DESC(1, 0x28, "Rx512Byte"), +- MIB_DESC(1, 0x2c, "Rx1024Byte"), +- MIB_DESC(1, 0x30, "Rx1518Byte"), +- MIB_DESC(1, 0x34, "RxMaxByte"), +- MIB_DESC(1, 0x38, "RxTooLong"), +- MIB_DESC(2, 0x3c, "RxGoodByte"), +- MIB_DESC(2, 0x44, "RxBadByte"), +- MIB_DESC(1, 0x4c, "RxOverFlow"), +- MIB_DESC(1, 0x50, "Filtered"), +- MIB_DESC(1, 0x54, "TxBroad"), +- MIB_DESC(1, 0x58, "TxPause"), +- MIB_DESC(1, 0x5c, "TxMulti"), +- MIB_DESC(1, 0x60, "TxUnderRun"), +- MIB_DESC(1, 0x64, "Tx64Byte"), +- MIB_DESC(1, 0x68, "Tx128Byte"), +- MIB_DESC(1, 0x6c, "Tx256Byte"), +- MIB_DESC(1, 0x70, "Tx512Byte"), +- MIB_DESC(1, 0x74, "Tx1024Byte"), +- MIB_DESC(1, 0x78, "Tx1518Byte"), +- MIB_DESC(1, 0x7c, "TxMaxByte"), +- MIB_DESC(1, 0x80, "TxOverSize"), +- MIB_DESC(2, 0x84, "TxByte"), +- MIB_DESC(1, 0x8c, "TxCollision"), +- MIB_DESC(1, 0x90, "TxAbortCol"), +- MIB_DESC(1, 0x94, "TxMultiCol"), +- MIB_DESC(1, 0x98, "TxSingleCol"), +- MIB_DESC(1, 0x9c, "TxExcDefer"), +- MIB_DESC(1, 0xa0, "TxDefer"), +- MIB_DESC(1, 0xa4, "TxLateCol"), +- MIB_DESC(1, 0xa8, "RXUnicast"), +- MIB_DESC(1, 0xac, "TXUnicast"), +-}; +- +-static void +-qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page) +-{ +- regaddr >>= 1; +- *r1 = regaddr & 0x1e; +- +- regaddr >>= 5; +- *r2 = regaddr & 0x7; +- +- regaddr >>= 3; +- *page = regaddr & 0x3ff; +-} +- +-static int +-qca8k_set_lo(struct qca8k_priv *priv, int phy_id, u32 regnum, u16 lo) +-{ +- u16 *cached_lo = &priv->mdio_cache.lo; +- struct mii_bus *bus = priv->bus; +- int ret; +- +- if (lo == *cached_lo) +- return 0; +- +- ret = bus->write(bus, phy_id, regnum, lo); +- if (ret < 0) +- dev_err_ratelimited(&bus->dev, +- "failed to write qca8k 32bit lo register\n"); +- +- *cached_lo = lo; +- return 0; +-} +- +-static int +-qca8k_set_hi(struct qca8k_priv *priv, int phy_id, u32 regnum, u16 hi) +-{ +- u16 *cached_hi = &priv->mdio_cache.hi; +- struct mii_bus *bus = priv->bus; +- int ret; +- +- if (hi == *cached_hi) +- return 0; +- +- ret = bus->write(bus, phy_id, regnum, hi); +- if (ret < 0) +- dev_err_ratelimited(&bus->dev, +- "failed to write qca8k 32bit hi register\n"); +- +- *cached_hi = hi; +- return 0; +-} +- +-static int +-qca8k_mii_read32(struct mii_bus *bus, int phy_id, u32 regnum, u32 *val) +-{ +- int ret; +- +- ret = bus->read(bus, phy_id, regnum); +- if (ret >= 0) { +- *val = ret; +- ret = bus->read(bus, phy_id, regnum + 1); +- *val |= ret << 16; +- } +- +- if (ret < 0) { +- dev_err_ratelimited(&bus->dev, +- "failed to read qca8k 32bit register\n"); +- *val = 0; +- return ret; +- } +- +- return 0; +-} +- +-static void +-qca8k_mii_write32(struct qca8k_priv *priv, int phy_id, u32 regnum, u32 val) +-{ +- u16 lo, hi; +- int ret; +- +- lo = val & 0xffff; +- hi = (u16)(val >> 16); +- +- ret = qca8k_set_lo(priv, phy_id, regnum, lo); +- if (ret >= 0) +- ret = qca8k_set_hi(priv, phy_id, regnum + 1, hi); +-} +- +-static int +-qca8k_set_page(struct qca8k_priv *priv, u16 page) +-{ +- u16 *cached_page = &priv->mdio_cache.page; +- struct mii_bus *bus = priv->bus; +- int ret; +- +- if (page == *cached_page) +- return 0; +- +- ret = bus->write(bus, 0x18, 0, page); +- if (ret < 0) { +- dev_err_ratelimited(&bus->dev, +- "failed to set qca8k page\n"); +- return ret; +- } +- +- *cached_page = page; +- usleep_range(1000, 2000); +- return 0; +-} +- +-static int +-qca8k_read(struct qca8k_priv *priv, u32 reg, u32 *val) +-{ +- return regmap_read(priv->regmap, reg, val); +-} +- +-static int +-qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val) +-{ +- return regmap_write(priv->regmap, reg, val); +-} +- +-static int +-qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val) +-{ +- return regmap_update_bits(priv->regmap, reg, mask, write_val); +-} +- +-static void qca8k_rw_reg_ack_handler(struct dsa_switch *ds, struct sk_buff *skb) +-{ +- struct qca8k_mgmt_eth_data *mgmt_eth_data; +- struct qca8k_priv *priv = ds->priv; +- struct qca_mgmt_ethhdr *mgmt_ethhdr; +- u8 len, cmd; +- +- mgmt_ethhdr = (struct qca_mgmt_ethhdr *)skb_mac_header(skb); +- mgmt_eth_data = &priv->mgmt_eth_data; +- +- cmd = FIELD_GET(QCA_HDR_MGMT_CMD, mgmt_ethhdr->command); +- len = FIELD_GET(QCA_HDR_MGMT_LENGTH, mgmt_ethhdr->command); +- +- /* Make sure the seq match the requested packet */ +- if (mgmt_ethhdr->seq == mgmt_eth_data->seq) +- mgmt_eth_data->ack = true; +- +- if (cmd == MDIO_READ) { +- mgmt_eth_data->data[0] = mgmt_ethhdr->mdio_data; +- +- /* Get the rest of the 12 byte of data. +- * The read/write function will extract the requested data. +- */ +- if (len > QCA_HDR_MGMT_DATA1_LEN) +- memcpy(mgmt_eth_data->data + 1, skb->data, +- QCA_HDR_MGMT_DATA2_LEN); +- } +- +- complete(&mgmt_eth_data->rw_done); +-} +- +-static struct sk_buff *qca8k_alloc_mdio_header(enum mdio_cmd cmd, u32 reg, u32 *val, +- int priority, unsigned int len) +-{ +- struct qca_mgmt_ethhdr *mgmt_ethhdr; +- unsigned int real_len; +- struct sk_buff *skb; +- u32 *data2; +- u16 hdr; +- +- skb = dev_alloc_skb(QCA_HDR_MGMT_PKT_LEN); +- if (!skb) +- return NULL; +- +- /* Max value for len reg is 15 (0xf) but the switch actually return 16 byte +- * Actually for some reason the steps are: +- * 0: nothing +- * 1-4: first 4 byte +- * 5-6: first 12 byte +- * 7-15: all 16 byte +- */ +- if (len == 16) +- real_len = 15; +- else +- real_len = len; +- +- skb_reset_mac_header(skb); +- skb_set_network_header(skb, skb->len); +- +- mgmt_ethhdr = skb_push(skb, QCA_HDR_MGMT_HEADER_LEN + QCA_HDR_LEN); +- +- hdr = FIELD_PREP(QCA_HDR_XMIT_VERSION, QCA_HDR_VERSION); +- hdr |= FIELD_PREP(QCA_HDR_XMIT_PRIORITY, priority); +- hdr |= QCA_HDR_XMIT_FROM_CPU; +- hdr |= FIELD_PREP(QCA_HDR_XMIT_DP_BIT, BIT(0)); +- hdr |= FIELD_PREP(QCA_HDR_XMIT_CONTROL, QCA_HDR_XMIT_TYPE_RW_REG); +- +- mgmt_ethhdr->command = FIELD_PREP(QCA_HDR_MGMT_ADDR, reg); +- mgmt_ethhdr->command |= FIELD_PREP(QCA_HDR_MGMT_LENGTH, real_len); +- mgmt_ethhdr->command |= FIELD_PREP(QCA_HDR_MGMT_CMD, cmd); +- mgmt_ethhdr->command |= FIELD_PREP(QCA_HDR_MGMT_CHECK_CODE, +- QCA_HDR_MGMT_CHECK_CODE_VAL); +- +- if (cmd == MDIO_WRITE) +- mgmt_ethhdr->mdio_data = *val; +- +- mgmt_ethhdr->hdr = htons(hdr); +- +- data2 = skb_put_zero(skb, QCA_HDR_MGMT_DATA2_LEN + QCA_HDR_MGMT_PADDING_LEN); +- if (cmd == MDIO_WRITE && len > QCA_HDR_MGMT_DATA1_LEN) +- memcpy(data2, val + 1, len - QCA_HDR_MGMT_DATA1_LEN); +- +- return skb; +-} +- +-static void qca8k_mdio_header_fill_seq_num(struct sk_buff *skb, u32 seq_num) +-{ +- struct qca_mgmt_ethhdr *mgmt_ethhdr; +- +- mgmt_ethhdr = (struct qca_mgmt_ethhdr *)skb->data; +- mgmt_ethhdr->seq = FIELD_PREP(QCA_HDR_MGMT_SEQ_NUM, seq_num); +-} +- +-static int qca8k_read_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) +-{ +- struct qca8k_mgmt_eth_data *mgmt_eth_data = &priv->mgmt_eth_data; +- struct sk_buff *skb; +- bool ack; +- int ret; +- +- skb = qca8k_alloc_mdio_header(MDIO_READ, reg, NULL, +- QCA8K_ETHERNET_MDIO_PRIORITY, len); +- if (!skb) +- return -ENOMEM; +- +- mutex_lock(&mgmt_eth_data->mutex); +- +- /* Check mgmt_master if is operational */ +- if (!priv->mgmt_master) { +- kfree_skb(skb); +- mutex_unlock(&mgmt_eth_data->mutex); +- return -EINVAL; +- } +- +- skb->dev = priv->mgmt_master; +- +- reinit_completion(&mgmt_eth_data->rw_done); +- +- /* Increment seq_num and set it in the mdio pkt */ +- mgmt_eth_data->seq++; +- qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); +- mgmt_eth_data->ack = false; +- +- dev_queue_xmit(skb); +- +- ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, +- msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT)); +- +- *val = mgmt_eth_data->data[0]; +- if (len > QCA_HDR_MGMT_DATA1_LEN) +- memcpy(val + 1, mgmt_eth_data->data + 1, len - QCA_HDR_MGMT_DATA1_LEN); +- +- ack = mgmt_eth_data->ack; +- +- mutex_unlock(&mgmt_eth_data->mutex); +- +- if (ret <= 0) +- return -ETIMEDOUT; +- +- if (!ack) +- return -EINVAL; +- +- return 0; +-} +- +-static int qca8k_write_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) +-{ +- struct qca8k_mgmt_eth_data *mgmt_eth_data = &priv->mgmt_eth_data; +- struct sk_buff *skb; +- bool ack; +- int ret; +- +- skb = qca8k_alloc_mdio_header(MDIO_WRITE, reg, val, +- QCA8K_ETHERNET_MDIO_PRIORITY, len); +- if (!skb) +- return -ENOMEM; +- +- mutex_lock(&mgmt_eth_data->mutex); +- +- /* Check mgmt_master if is operational */ +- if (!priv->mgmt_master) { +- kfree_skb(skb); +- mutex_unlock(&mgmt_eth_data->mutex); +- return -EINVAL; +- } +- +- skb->dev = priv->mgmt_master; +- +- reinit_completion(&mgmt_eth_data->rw_done); +- +- /* Increment seq_num and set it in the mdio pkt */ +- mgmt_eth_data->seq++; +- qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); +- mgmt_eth_data->ack = false; +- +- dev_queue_xmit(skb); +- +- ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, +- msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT)); +- +- ack = mgmt_eth_data->ack; +- +- mutex_unlock(&mgmt_eth_data->mutex); +- +- if (ret <= 0) +- return -ETIMEDOUT; +- +- if (!ack) +- return -EINVAL; +- +- return 0; +-} +- +-static int +-qca8k_regmap_update_bits_eth(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val) +-{ +- u32 val = 0; +- int ret; +- +- ret = qca8k_read_eth(priv, reg, &val, sizeof(val)); +- if (ret) +- return ret; +- +- val &= ~mask; +- val |= write_val; +- +- return qca8k_write_eth(priv, reg, &val, sizeof(val)); +-} +- +-static int +-qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len) +-{ +- int i, count = len / sizeof(u32), ret; +- +- if (priv->mgmt_master && !qca8k_read_eth(priv, reg, val, len)) +- return 0; +- +- for (i = 0; i < count; i++) { +- ret = regmap_read(priv->regmap, reg + (i * 4), val + i); +- if (ret < 0) +- return ret; +- } +- +- return 0; +-} +- +-static int +-qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len) +-{ +- int i, count = len / sizeof(u32), ret; +- u32 tmp; +- +- if (priv->mgmt_master && !qca8k_write_eth(priv, reg, val, len)) +- return 0; +- +- for (i = 0; i < count; i++) { +- tmp = val[i]; +- +- ret = regmap_write(priv->regmap, reg + (i * 4), tmp); +- if (ret < 0) +- return ret; +- } +- +- return 0; +-} +- +-static int +-qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ctx; +- struct mii_bus *bus = priv->bus; +- u16 r1, r2, page; +- int ret; +- +- if (!qca8k_read_eth(priv, reg, val, sizeof(*val))) +- return 0; +- +- qca8k_split_addr(reg, &r1, &r2, &page); +- +- mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); +- +- ret = qca8k_set_page(priv, page); +- if (ret < 0) +- goto exit; +- +- ret = qca8k_mii_read32(bus, 0x10 | r2, r1, val); +- +-exit: +- mutex_unlock(&bus->mdio_lock); +- return ret; +-} +- +-static int +-qca8k_regmap_write(void *ctx, uint32_t reg, uint32_t val) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ctx; +- struct mii_bus *bus = priv->bus; +- u16 r1, r2, page; +- int ret; +- +- if (!qca8k_write_eth(priv, reg, &val, sizeof(val))) +- return 0; +- +- qca8k_split_addr(reg, &r1, &r2, &page); +- +- mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); +- +- ret = qca8k_set_page(priv, page); +- if (ret < 0) +- goto exit; +- +- qca8k_mii_write32(priv, 0x10 | r2, r1, val); +- +-exit: +- mutex_unlock(&bus->mdio_lock); +- return ret; +-} +- +-static int +-qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask, uint32_t write_val) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ctx; +- struct mii_bus *bus = priv->bus; +- u16 r1, r2, page; +- u32 val; +- int ret; +- +- if (!qca8k_regmap_update_bits_eth(priv, reg, mask, write_val)) +- return 0; +- +- qca8k_split_addr(reg, &r1, &r2, &page); +- +- mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); +- +- ret = qca8k_set_page(priv, page); +- if (ret < 0) +- goto exit; +- +- ret = qca8k_mii_read32(bus, 0x10 | r2, r1, &val); +- if (ret < 0) +- goto exit; +- +- val &= ~mask; +- val |= write_val; +- qca8k_mii_write32(priv, 0x10 | r2, r1, val); +- +-exit: +- mutex_unlock(&bus->mdio_lock); +- +- return ret; +-} +- +-static const struct regmap_range qca8k_readable_ranges[] = { +- regmap_reg_range(0x0000, 0x00e4), /* Global control */ +- regmap_reg_range(0x0100, 0x0168), /* EEE control */ +- regmap_reg_range(0x0200, 0x0270), /* Parser control */ +- regmap_reg_range(0x0400, 0x0454), /* ACL */ +- regmap_reg_range(0x0600, 0x0718), /* Lookup */ +- regmap_reg_range(0x0800, 0x0b70), /* QM */ +- regmap_reg_range(0x0c00, 0x0c80), /* PKT */ +- regmap_reg_range(0x0e00, 0x0e98), /* L3 */ +- regmap_reg_range(0x1000, 0x10ac), /* MIB - Port0 */ +- regmap_reg_range(0x1100, 0x11ac), /* MIB - Port1 */ +- regmap_reg_range(0x1200, 0x12ac), /* MIB - Port2 */ +- regmap_reg_range(0x1300, 0x13ac), /* MIB - Port3 */ +- regmap_reg_range(0x1400, 0x14ac), /* MIB - Port4 */ +- regmap_reg_range(0x1500, 0x15ac), /* MIB - Port5 */ +- regmap_reg_range(0x1600, 0x16ac), /* MIB - Port6 */ +- +-}; +- +-static const struct regmap_access_table qca8k_readable_table = { +- .yes_ranges = qca8k_readable_ranges, +- .n_yes_ranges = ARRAY_SIZE(qca8k_readable_ranges), +-}; +- +-static struct regmap_config qca8k_regmap_config = { +- .reg_bits = 16, +- .val_bits = 32, +- .reg_stride = 4, +- .max_register = 0x16ac, /* end MIB - Port6 range */ +- .reg_read = qca8k_regmap_read, +- .reg_write = qca8k_regmap_write, +- .reg_update_bits = qca8k_regmap_update_bits, +- .rd_table = &qca8k_readable_table, +- .disable_locking = true, /* Locking is handled by qca8k read/write */ +- .cache_type = REGCACHE_NONE, /* Explicitly disable CACHE */ +-}; +- +-static int +-qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask) +-{ +- u32 val; +- +- return regmap_read_poll_timeout(priv->regmap, reg, val, !(val & mask), 0, +- QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC); +-} +- +-static int +-qca8k_fdb_read(struct qca8k_priv *priv, struct qca8k_fdb *fdb) +-{ +- u32 reg[3]; +- int ret; +- +- /* load the ARL table into an array */ +- ret = qca8k_bulk_read(priv, QCA8K_REG_ATU_DATA0, reg, sizeof(reg)); +- if (ret) +- return ret; +- +- /* vid - 83:72 */ +- fdb->vid = FIELD_GET(QCA8K_ATU_VID_MASK, reg[2]); +- /* aging - 67:64 */ +- fdb->aging = FIELD_GET(QCA8K_ATU_STATUS_MASK, reg[2]); +- /* portmask - 54:48 */ +- fdb->port_mask = FIELD_GET(QCA8K_ATU_PORT_MASK, reg[1]); +- /* mac - 47:0 */ +- fdb->mac[0] = FIELD_GET(QCA8K_ATU_ADDR0_MASK, reg[1]); +- fdb->mac[1] = FIELD_GET(QCA8K_ATU_ADDR1_MASK, reg[1]); +- fdb->mac[2] = FIELD_GET(QCA8K_ATU_ADDR2_MASK, reg[0]); +- fdb->mac[3] = FIELD_GET(QCA8K_ATU_ADDR3_MASK, reg[0]); +- fdb->mac[4] = FIELD_GET(QCA8K_ATU_ADDR4_MASK, reg[0]); +- fdb->mac[5] = FIELD_GET(QCA8K_ATU_ADDR5_MASK, reg[0]); +- +- return 0; +-} +- +-static void +-qca8k_fdb_write(struct qca8k_priv *priv, u16 vid, u8 port_mask, const u8 *mac, +- u8 aging) +-{ +- u32 reg[3] = { 0 }; +- +- /* vid - 83:72 */ +- reg[2] = FIELD_PREP(QCA8K_ATU_VID_MASK, vid); +- /* aging - 67:64 */ +- reg[2] |= FIELD_PREP(QCA8K_ATU_STATUS_MASK, aging); +- /* portmask - 54:48 */ +- reg[1] = FIELD_PREP(QCA8K_ATU_PORT_MASK, port_mask); +- /* mac - 47:0 */ +- reg[1] |= FIELD_PREP(QCA8K_ATU_ADDR0_MASK, mac[0]); +- reg[1] |= FIELD_PREP(QCA8K_ATU_ADDR1_MASK, mac[1]); +- reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR2_MASK, mac[2]); +- reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR3_MASK, mac[3]); +- reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR4_MASK, mac[4]); +- reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR5_MASK, mac[5]); +- +- /* load the array into the ARL table */ +- qca8k_bulk_write(priv, QCA8K_REG_ATU_DATA0, reg, sizeof(reg)); +-} +- +-static int +-qca8k_fdb_access(struct qca8k_priv *priv, enum qca8k_fdb_cmd cmd, int port) +-{ +- u32 reg; +- int ret; +- +- /* Set the command and FDB index */ +- reg = QCA8K_ATU_FUNC_BUSY; +- reg |= cmd; +- if (port >= 0) { +- reg |= QCA8K_ATU_FUNC_PORT_EN; +- reg |= FIELD_PREP(QCA8K_ATU_FUNC_PORT_MASK, port); +- } +- +- /* Write the function register triggering the table access */ +- ret = qca8k_write(priv, QCA8K_REG_ATU_FUNC, reg); +- if (ret) +- return ret; +- +- /* wait for completion */ +- ret = qca8k_busy_wait(priv, QCA8K_REG_ATU_FUNC, QCA8K_ATU_FUNC_BUSY); +- if (ret) +- return ret; +- +- /* Check for table full violation when adding an entry */ +- if (cmd == QCA8K_FDB_LOAD) { +- ret = qca8k_read(priv, QCA8K_REG_ATU_FUNC, ®); +- if (ret < 0) +- return ret; +- if (reg & QCA8K_ATU_FUNC_FULL) +- return -1; +- } +- +- return 0; +-} +- +-static int +-qca8k_fdb_next(struct qca8k_priv *priv, struct qca8k_fdb *fdb, int port) +-{ +- int ret; +- +- qca8k_fdb_write(priv, fdb->vid, fdb->port_mask, fdb->mac, fdb->aging); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_NEXT, port); +- if (ret < 0) +- return ret; +- +- return qca8k_fdb_read(priv, fdb); +-} +- +-static int +-qca8k_fdb_add(struct qca8k_priv *priv, const u8 *mac, u16 port_mask, +- u16 vid, u8 aging) +-{ +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- qca8k_fdb_write(priv, vid, port_mask, mac, aging); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); +- mutex_unlock(&priv->reg_mutex); +- +- return ret; +-} +- +-static int +-qca8k_fdb_del(struct qca8k_priv *priv, const u8 *mac, u16 port_mask, u16 vid) +-{ +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- qca8k_fdb_write(priv, vid, port_mask, mac, 0); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); +- mutex_unlock(&priv->reg_mutex); +- +- return ret; +-} +- +-static void +-qca8k_fdb_flush(struct qca8k_priv *priv) +-{ +- mutex_lock(&priv->reg_mutex); +- qca8k_fdb_access(priv, QCA8K_FDB_FLUSH, -1); +- mutex_unlock(&priv->reg_mutex); +-} +- +-static int +-qca8k_fdb_search_and_insert(struct qca8k_priv *priv, u8 port_mask, +- const u8 *mac, u16 vid) +-{ +- struct qca8k_fdb fdb = { 0 }; +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- +- qca8k_fdb_write(priv, vid, 0, mac, 0); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_SEARCH, -1); +- if (ret < 0) +- goto exit; +- +- ret = qca8k_fdb_read(priv, &fdb); +- if (ret < 0) +- goto exit; +- +- /* Rule exist. Delete first */ +- if (!fdb.aging) { +- ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); +- if (ret) +- goto exit; +- } +- +- /* Add port to fdb portmask */ +- fdb.port_mask |= port_mask; +- +- qca8k_fdb_write(priv, vid, fdb.port_mask, mac, fdb.aging); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); +- +-exit: +- mutex_unlock(&priv->reg_mutex); +- return ret; +-} +- +-static int +-qca8k_fdb_search_and_del(struct qca8k_priv *priv, u8 port_mask, +- const u8 *mac, u16 vid) +-{ +- struct qca8k_fdb fdb = { 0 }; +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- +- qca8k_fdb_write(priv, vid, 0, mac, 0); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_SEARCH, -1); +- if (ret < 0) +- goto exit; +- +- /* Rule doesn't exist. Why delete? */ +- if (!fdb.aging) { +- ret = -EINVAL; +- goto exit; +- } +- +- ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); +- if (ret) +- goto exit; +- +- /* Only port in the rule is this port. Don't re insert */ +- if (fdb.port_mask == port_mask) +- goto exit; +- +- /* Remove port from port mask */ +- fdb.port_mask &= ~port_mask; +- +- qca8k_fdb_write(priv, vid, fdb.port_mask, mac, fdb.aging); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); +- +-exit: +- mutex_unlock(&priv->reg_mutex); +- return ret; +-} +- +-static int +-qca8k_vlan_access(struct qca8k_priv *priv, enum qca8k_vlan_cmd cmd, u16 vid) +-{ +- u32 reg; +- int ret; +- +- /* Set the command and VLAN index */ +- reg = QCA8K_VTU_FUNC1_BUSY; +- reg |= cmd; +- reg |= FIELD_PREP(QCA8K_VTU_FUNC1_VID_MASK, vid); +- +- /* Write the function register triggering the table access */ +- ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC1, reg); +- if (ret) +- return ret; +- +- /* wait for completion */ +- ret = qca8k_busy_wait(priv, QCA8K_REG_VTU_FUNC1, QCA8K_VTU_FUNC1_BUSY); +- if (ret) +- return ret; +- +- /* Check for table full violation when adding an entry */ +- if (cmd == QCA8K_VLAN_LOAD) { +- ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC1, ®); +- if (ret < 0) +- return ret; +- if (reg & QCA8K_VTU_FUNC1_FULL) +- return -ENOMEM; +- } +- +- return 0; +-} +- +-static int +-qca8k_vlan_add(struct qca8k_priv *priv, u8 port, u16 vid, bool untagged) +-{ +- u32 reg; +- int ret; +- +- /* +- We do the right thing with VLAN 0 and treat it as untagged while +- preserving the tag on egress. +- */ +- if (vid == 0) +- return 0; +- +- mutex_lock(&priv->reg_mutex); +- ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid); +- if (ret < 0) +- goto out; +- +- ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, ®); +- if (ret < 0) +- goto out; +- reg |= QCA8K_VTU_FUNC0_VALID | QCA8K_VTU_FUNC0_IVL_EN; +- reg &= ~QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(port); +- if (untagged) +- reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_UNTAG(port); +- else +- reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_TAG(port); +- +- ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg); +- if (ret) +- goto out; +- ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid); +- +-out: +- mutex_unlock(&priv->reg_mutex); +- +- return ret; +-} +- +-static int +-qca8k_vlan_del(struct qca8k_priv *priv, u8 port, u16 vid) +-{ +- u32 reg, mask; +- int ret, i; +- bool del; +- +- mutex_lock(&priv->reg_mutex); +- ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid); +- if (ret < 0) +- goto out; +- +- ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, ®); +- if (ret < 0) +- goto out; +- reg &= ~QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(port); +- reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(port); +- +- /* Check if we're the last member to be removed */ +- del = true; +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { +- mask = QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(i); +- +- if ((reg & mask) != mask) { +- del = false; +- break; +- } +- } +- +- if (del) { +- ret = qca8k_vlan_access(priv, QCA8K_VLAN_PURGE, vid); +- } else { +- ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg); +- if (ret) +- goto out; +- ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid); +- } +- +-out: +- mutex_unlock(&priv->reg_mutex); +- +- return ret; +-} +- +-static int +-qca8k_mib_init(struct qca8k_priv *priv) +-{ +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- ret = regmap_update_bits(priv->regmap, QCA8K_REG_MIB, +- QCA8K_MIB_FUNC | QCA8K_MIB_BUSY, +- FIELD_PREP(QCA8K_MIB_FUNC, QCA8K_MIB_FLUSH) | +- QCA8K_MIB_BUSY); +- if (ret) +- goto exit; +- +- ret = qca8k_busy_wait(priv, QCA8K_REG_MIB, QCA8K_MIB_BUSY); +- if (ret) +- goto exit; +- +- ret = regmap_set_bits(priv->regmap, QCA8K_REG_MIB, QCA8K_MIB_CPU_KEEP); +- if (ret) +- goto exit; +- +- ret = qca8k_write(priv, QCA8K_REG_MODULE_EN, QCA8K_MODULE_EN_MIB); +- +-exit: +- mutex_unlock(&priv->reg_mutex); +- return ret; +-} +- +-static void +-qca8k_port_set_status(struct qca8k_priv *priv, int port, int enable) +-{ +- u32 mask = QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC; +- +- /* Port 0 and 6 have no internal PHY */ +- if (port > 0 && port < 6) +- mask |= QCA8K_PORT_STATUS_LINK_AUTO; +- +- if (enable) +- regmap_set_bits(priv->regmap, QCA8K_REG_PORT_STATUS(port), mask); +- else +- regmap_clear_bits(priv->regmap, QCA8K_REG_PORT_STATUS(port), mask); +-} +- +-static int +-qca8k_phy_eth_busy_wait(struct qca8k_mgmt_eth_data *mgmt_eth_data, +- struct sk_buff *read_skb, u32 *val) +-{ +- struct sk_buff *skb = skb_copy(read_skb, GFP_KERNEL); +- bool ack; +- int ret; +- +- reinit_completion(&mgmt_eth_data->rw_done); +- +- /* Increment seq_num and set it in the copy pkt */ +- mgmt_eth_data->seq++; +- qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); +- mgmt_eth_data->ack = false; +- +- dev_queue_xmit(skb); +- +- ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, +- QCA8K_ETHERNET_TIMEOUT); +- +- ack = mgmt_eth_data->ack; +- +- if (ret <= 0) +- return -ETIMEDOUT; +- +- if (!ack) +- return -EINVAL; +- +- *val = mgmt_eth_data->data[0]; +- +- return 0; +-} +- +-static int +-qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy, +- int regnum, u16 data) +-{ +- struct sk_buff *write_skb, *clear_skb, *read_skb; +- struct qca8k_mgmt_eth_data *mgmt_eth_data; +- u32 write_val, clear_val = 0, val; +- struct net_device *mgmt_master; +- int ret, ret1; +- bool ack; +- +- if (regnum >= QCA8K_MDIO_MASTER_MAX_REG) +- return -EINVAL; +- +- mgmt_eth_data = &priv->mgmt_eth_data; +- +- write_val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN | +- QCA8K_MDIO_MASTER_PHY_ADDR(phy) | +- QCA8K_MDIO_MASTER_REG_ADDR(regnum); +- +- if (read) { +- write_val |= QCA8K_MDIO_MASTER_READ; +- } else { +- write_val |= QCA8K_MDIO_MASTER_WRITE; +- write_val |= QCA8K_MDIO_MASTER_DATA(data); +- } +- +- /* Prealloc all the needed skb before the lock */ +- write_skb = qca8k_alloc_mdio_header(MDIO_WRITE, QCA8K_MDIO_MASTER_CTRL, &write_val, +- QCA8K_ETHERNET_PHY_PRIORITY, sizeof(write_val)); +- if (!write_skb) +- return -ENOMEM; +- +- clear_skb = qca8k_alloc_mdio_header(MDIO_WRITE, QCA8K_MDIO_MASTER_CTRL, &clear_val, +- QCA8K_ETHERNET_PHY_PRIORITY, sizeof(clear_val)); +- if (!clear_skb) { +- ret = -ENOMEM; +- goto err_clear_skb; +- } +- +- read_skb = qca8k_alloc_mdio_header(MDIO_READ, QCA8K_MDIO_MASTER_CTRL, &clear_val, +- QCA8K_ETHERNET_PHY_PRIORITY, sizeof(clear_val)); +- if (!read_skb) { +- ret = -ENOMEM; +- goto err_read_skb; +- } +- +- /* Actually start the request: +- * 1. Send mdio master packet +- * 2. Busy Wait for mdio master command +- * 3. Get the data if we are reading +- * 4. Reset the mdio master (even with error) +- */ +- mutex_lock(&mgmt_eth_data->mutex); +- +- /* Check if mgmt_master is operational */ +- mgmt_master = priv->mgmt_master; +- if (!mgmt_master) { +- mutex_unlock(&mgmt_eth_data->mutex); +- ret = -EINVAL; +- goto err_mgmt_master; +- } +- +- read_skb->dev = mgmt_master; +- clear_skb->dev = mgmt_master; +- write_skb->dev = mgmt_master; +- +- reinit_completion(&mgmt_eth_data->rw_done); +- +- /* Increment seq_num and set it in the write pkt */ +- mgmt_eth_data->seq++; +- qca8k_mdio_header_fill_seq_num(write_skb, mgmt_eth_data->seq); +- mgmt_eth_data->ack = false; +- +- dev_queue_xmit(write_skb); +- +- ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, +- QCA8K_ETHERNET_TIMEOUT); +- +- ack = mgmt_eth_data->ack; +- +- if (ret <= 0) { +- ret = -ETIMEDOUT; +- kfree_skb(read_skb); +- goto exit; +- } +- +- if (!ack) { +- ret = -EINVAL; +- kfree_skb(read_skb); +- goto exit; +- } +- +- ret = read_poll_timeout(qca8k_phy_eth_busy_wait, ret1, +- !(val & QCA8K_MDIO_MASTER_BUSY), 0, +- QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC, false, +- mgmt_eth_data, read_skb, &val); +- +- if (ret < 0 && ret1 < 0) { +- ret = ret1; +- goto exit; +- } +- +- if (read) { +- reinit_completion(&mgmt_eth_data->rw_done); +- +- /* Increment seq_num and set it in the read pkt */ +- mgmt_eth_data->seq++; +- qca8k_mdio_header_fill_seq_num(read_skb, mgmt_eth_data->seq); +- mgmt_eth_data->ack = false; +- +- dev_queue_xmit(read_skb); +- +- ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, +- QCA8K_ETHERNET_TIMEOUT); +- +- ack = mgmt_eth_data->ack; +- +- if (ret <= 0) { +- ret = -ETIMEDOUT; +- goto exit; +- } +- +- if (!ack) { +- ret = -EINVAL; +- goto exit; +- } +- +- ret = mgmt_eth_data->data[0] & QCA8K_MDIO_MASTER_DATA_MASK; +- } else { +- kfree_skb(read_skb); +- } +-exit: +- reinit_completion(&mgmt_eth_data->rw_done); +- +- /* Increment seq_num and set it in the clear pkt */ +- mgmt_eth_data->seq++; +- qca8k_mdio_header_fill_seq_num(clear_skb, mgmt_eth_data->seq); +- mgmt_eth_data->ack = false; +- +- dev_queue_xmit(clear_skb); +- +- wait_for_completion_timeout(&mgmt_eth_data->rw_done, +- QCA8K_ETHERNET_TIMEOUT); +- +- mutex_unlock(&mgmt_eth_data->mutex); +- +- return ret; +- +- /* Error handling before lock */ +-err_mgmt_master: +- kfree_skb(read_skb); +-err_read_skb: +- kfree_skb(clear_skb); +-err_clear_skb: +- kfree_skb(write_skb); +- +- return ret; +-} +- +-static u32 +-qca8k_port_to_phy(int port) +-{ +- /* From Andrew Lunn: +- * Port 0 has no internal phy. +- * Port 1 has an internal PHY at MDIO address 0. +- * Port 2 has an internal PHY at MDIO address 1. +- * ... +- * Port 5 has an internal PHY at MDIO address 4. +- * Port 6 has no internal PHY. +- */ +- +- return port - 1; +-} +- +-static int +-qca8k_mdio_busy_wait(struct mii_bus *bus, u32 reg, u32 mask) +-{ +- u16 r1, r2, page; +- u32 val; +- int ret, ret1; +- +- qca8k_split_addr(reg, &r1, &r2, &page); +- +- ret = read_poll_timeout(qca8k_mii_read32, ret1, !(val & mask), 0, +- QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC, false, +- bus, 0x10 | r2, r1, &val); +- +- /* Check if qca8k_read has failed for a different reason +- * before returnting -ETIMEDOUT +- */ +- if (ret < 0 && ret1 < 0) +- return ret1; +- +- return ret; +-} +- +-static int +-qca8k_mdio_write(struct qca8k_priv *priv, int phy, int regnum, u16 data) +-{ +- struct mii_bus *bus = priv->bus; +- u16 r1, r2, page; +- u32 val; +- int ret; +- +- if (regnum >= QCA8K_MDIO_MASTER_MAX_REG) +- return -EINVAL; +- +- val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN | +- QCA8K_MDIO_MASTER_WRITE | QCA8K_MDIO_MASTER_PHY_ADDR(phy) | +- QCA8K_MDIO_MASTER_REG_ADDR(regnum) | +- QCA8K_MDIO_MASTER_DATA(data); +- +- qca8k_split_addr(QCA8K_MDIO_MASTER_CTRL, &r1, &r2, &page); +- +- mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); +- +- ret = qca8k_set_page(priv, page); +- if (ret) +- goto exit; +- +- qca8k_mii_write32(priv, 0x10 | r2, r1, val); +- +- ret = qca8k_mdio_busy_wait(bus, QCA8K_MDIO_MASTER_CTRL, +- QCA8K_MDIO_MASTER_BUSY); +- +-exit: +- /* even if the busy_wait timeouts try to clear the MASTER_EN */ +- qca8k_mii_write32(priv, 0x10 | r2, r1, 0); +- +- mutex_unlock(&bus->mdio_lock); +- +- return ret; +-} +- +-static int +-qca8k_mdio_read(struct qca8k_priv *priv, int phy, int regnum) +-{ +- struct mii_bus *bus = priv->bus; +- u16 r1, r2, page; +- u32 val; +- int ret; +- +- if (regnum >= QCA8K_MDIO_MASTER_MAX_REG) +- return -EINVAL; +- +- val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN | +- QCA8K_MDIO_MASTER_READ | QCA8K_MDIO_MASTER_PHY_ADDR(phy) | +- QCA8K_MDIO_MASTER_REG_ADDR(regnum); +- +- qca8k_split_addr(QCA8K_MDIO_MASTER_CTRL, &r1, &r2, &page); +- +- mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); +- +- ret = qca8k_set_page(priv, page); +- if (ret) +- goto exit; +- +- qca8k_mii_write32(priv, 0x10 | r2, r1, val); +- +- ret = qca8k_mdio_busy_wait(bus, QCA8K_MDIO_MASTER_CTRL, +- QCA8K_MDIO_MASTER_BUSY); +- if (ret) +- goto exit; +- +- ret = qca8k_mii_read32(bus, 0x10 | r2, r1, &val); +- +-exit: +- /* even if the busy_wait timeouts try to clear the MASTER_EN */ +- qca8k_mii_write32(priv, 0x10 | r2, r1, 0); +- +- mutex_unlock(&bus->mdio_lock); +- +- if (ret >= 0) +- ret = val & QCA8K_MDIO_MASTER_DATA_MASK; +- +- return ret; +-} +- +-static int +-qca8k_internal_mdio_write(struct mii_bus *slave_bus, int phy, int regnum, u16 data) +-{ +- struct qca8k_priv *priv = slave_bus->priv; +- int ret; +- +- /* Use mdio Ethernet when available, fallback to legacy one on error */ +- ret = qca8k_phy_eth_command(priv, false, phy, regnum, data); +- if (!ret) +- return 0; +- +- return qca8k_mdio_write(priv, phy, regnum, data); +-} +- +-static int +-qca8k_internal_mdio_read(struct mii_bus *slave_bus, int phy, int regnum) +-{ +- struct qca8k_priv *priv = slave_bus->priv; +- int ret; +- +- /* Use mdio Ethernet when available, fallback to legacy one on error */ +- ret = qca8k_phy_eth_command(priv, true, phy, regnum, 0); +- if (ret >= 0) +- return ret; +- +- ret = qca8k_mdio_read(priv, phy, regnum); +- +- if (ret < 0) +- return 0xffff; +- +- return ret; +-} +- +-static int +-qca8k_legacy_mdio_write(struct mii_bus *slave_bus, int port, int regnum, u16 data) +-{ +- port = qca8k_port_to_phy(port) % PHY_MAX_ADDR; +- +- return qca8k_internal_mdio_write(slave_bus, port, regnum, data); +-} +- +-static int +-qca8k_legacy_mdio_read(struct mii_bus *slave_bus, int port, int regnum) +-{ +- port = qca8k_port_to_phy(port) % PHY_MAX_ADDR; +- +- return qca8k_internal_mdio_read(slave_bus, port, regnum); +-} +- +-static int +-qca8k_mdio_register(struct qca8k_priv *priv) +-{ +- struct dsa_switch *ds = priv->ds; +- struct device_node *mdio; +- struct mii_bus *bus; +- +- bus = devm_mdiobus_alloc(ds->dev); +- if (!bus) +- return -ENOMEM; +- +- bus->priv = (void *)priv; +- snprintf(bus->id, MII_BUS_ID_SIZE, "qca8k-%d.%d", +- ds->dst->index, ds->index); +- bus->parent = ds->dev; +- bus->phy_mask = ~ds->phys_mii_mask; +- ds->slave_mii_bus = bus; +- +- /* Check if the devicetree declare the port:phy mapping */ +- mdio = of_get_child_by_name(priv->dev->of_node, "mdio"); +- if (of_device_is_available(mdio)) { +- bus->name = "qca8k slave mii"; +- bus->read = qca8k_internal_mdio_read; +- bus->write = qca8k_internal_mdio_write; +- return devm_of_mdiobus_register(priv->dev, bus, mdio); +- } +- +- /* If a mapping can't be found the legacy mapping is used, +- * using the qca8k_port_to_phy function +- */ +- bus->name = "qca8k-legacy slave mii"; +- bus->read = qca8k_legacy_mdio_read; +- bus->write = qca8k_legacy_mdio_write; +- return devm_mdiobus_register(priv->dev, bus); +-} +- +-static int +-qca8k_setup_mdio_bus(struct qca8k_priv *priv) +-{ +- u32 internal_mdio_mask = 0, external_mdio_mask = 0, reg; +- struct device_node *ports, *port; +- phy_interface_t mode; +- int err; +- +- ports = of_get_child_by_name(priv->dev->of_node, "ports"); +- if (!ports) +- ports = of_get_child_by_name(priv->dev->of_node, "ethernet-ports"); +- +- if (!ports) +- return -EINVAL; +- +- for_each_available_child_of_node(ports, port) { +- err = of_property_read_u32(port, "reg", ®); +- if (err) { +- of_node_put(port); +- of_node_put(ports); +- return err; +- } +- +- if (!dsa_is_user_port(priv->ds, reg)) +- continue; +- +- of_get_phy_mode(port, &mode); +- +- if (of_property_read_bool(port, "phy-handle") && +- mode != PHY_INTERFACE_MODE_INTERNAL) +- external_mdio_mask |= BIT(reg); +- else +- internal_mdio_mask |= BIT(reg); +- } +- +- of_node_put(ports); +- if (!external_mdio_mask && !internal_mdio_mask) { +- dev_err(priv->dev, "no PHYs are defined.\n"); +- return -EINVAL; +- } +- +- /* The QCA8K_MDIO_MASTER_EN Bit, which grants access to PHYs through +- * the MDIO_MASTER register also _disconnects_ the external MDC +- * passthrough to the internal PHYs. It's not possible to use both +- * configurations at the same time! +- * +- * Because this came up during the review process: +- * If the external mdio-bus driver is capable magically disabling +- * the QCA8K_MDIO_MASTER_EN and mutex/spin-locking out the qca8k's +- * accessors for the time being, it would be possible to pull this +- * off. +- */ +- if (!!external_mdio_mask && !!internal_mdio_mask) { +- dev_err(priv->dev, "either internal or external mdio bus configuration is supported.\n"); +- return -EINVAL; +- } +- +- if (external_mdio_mask) { +- /* Make sure to disable the internal mdio bus in cases +- * a dt-overlay and driver reload changed the configuration +- */ +- +- return regmap_clear_bits(priv->regmap, QCA8K_MDIO_MASTER_CTRL, +- QCA8K_MDIO_MASTER_EN); +- } +- +- return qca8k_mdio_register(priv); +-} +- +-static int +-qca8k_setup_mac_pwr_sel(struct qca8k_priv *priv) +-{ +- u32 mask = 0; +- int ret = 0; +- +- /* SoC specific settings for ipq8064. +- * If more device require this consider adding +- * a dedicated binding. +- */ +- if (of_machine_is_compatible("qcom,ipq8064")) +- mask |= QCA8K_MAC_PWR_RGMII0_1_8V; +- +- /* SoC specific settings for ipq8065 */ +- if (of_machine_is_compatible("qcom,ipq8065")) +- mask |= QCA8K_MAC_PWR_RGMII1_1_8V; +- +- if (mask) { +- ret = qca8k_rmw(priv, QCA8K_REG_MAC_PWR_SEL, +- QCA8K_MAC_PWR_RGMII0_1_8V | +- QCA8K_MAC_PWR_RGMII1_1_8V, +- mask); +- } +- +- return ret; +-} +- +-static int qca8k_find_cpu_port(struct dsa_switch *ds) +-{ +- struct qca8k_priv *priv = ds->priv; +- +- /* Find the connected cpu port. Valid port are 0 or 6 */ +- if (dsa_is_cpu_port(ds, 0)) +- return 0; +- +- dev_dbg(priv->dev, "port 0 is not the CPU port. Checking port 6"); +- +- if (dsa_is_cpu_port(ds, 6)) +- return 6; +- +- return -EINVAL; +-} +- +-static int +-qca8k_setup_of_pws_reg(struct qca8k_priv *priv) +-{ +- struct device_node *node = priv->dev->of_node; +- const struct qca8k_match_data *data; +- u32 val = 0; +- int ret; +- +- /* QCA8327 require to set to the correct mode. +- * His bigger brother QCA8328 have the 172 pin layout. +- * Should be applied by default but we set this just to make sure. +- */ +- if (priv->switch_id == QCA8K_ID_QCA8327) { +- data = of_device_get_match_data(priv->dev); +- +- /* Set the correct package of 148 pin for QCA8327 */ +- if (data->reduced_package) +- val |= QCA8327_PWS_PACKAGE148_EN; +- +- ret = qca8k_rmw(priv, QCA8K_REG_PWS, QCA8327_PWS_PACKAGE148_EN, +- val); +- if (ret) +- return ret; +- } +- +- if (of_property_read_bool(node, "qca,ignore-power-on-sel")) +- val |= QCA8K_PWS_POWER_ON_SEL; +- +- if (of_property_read_bool(node, "qca,led-open-drain")) { +- if (!(val & QCA8K_PWS_POWER_ON_SEL)) { +- dev_err(priv->dev, "qca,led-open-drain require qca,ignore-power-on-sel to be set."); +- return -EINVAL; +- } +- +- val |= QCA8K_PWS_LED_OPEN_EN_CSR; +- } +- +- return qca8k_rmw(priv, QCA8K_REG_PWS, +- QCA8K_PWS_LED_OPEN_EN_CSR | QCA8K_PWS_POWER_ON_SEL, +- val); +-} +- +-static int +-qca8k_parse_port_config(struct qca8k_priv *priv) +-{ +- int port, cpu_port_index = -1, ret; +- struct device_node *port_dn; +- phy_interface_t mode; +- struct dsa_port *dp; +- u32 delay; +- +- /* We have 2 CPU port. Check them */ +- for (port = 0; port < QCA8K_NUM_PORTS; port++) { +- /* Skip every other port */ +- if (port != 0 && port != 6) +- continue; +- +- dp = dsa_to_port(priv->ds, port); +- port_dn = dp->dn; +- cpu_port_index++; +- +- if (!of_device_is_available(port_dn)) +- continue; +- +- ret = of_get_phy_mode(port_dn, &mode); +- if (ret) +- continue; +- +- switch (mode) { +- case PHY_INTERFACE_MODE_RGMII: +- case PHY_INTERFACE_MODE_RGMII_ID: +- case PHY_INTERFACE_MODE_RGMII_TXID: +- case PHY_INTERFACE_MODE_RGMII_RXID: +- case PHY_INTERFACE_MODE_SGMII: +- delay = 0; +- +- if (!of_property_read_u32(port_dn, "tx-internal-delay-ps", &delay)) +- /* Switch regs accept value in ns, convert ps to ns */ +- delay = delay / 1000; +- else if (mode == PHY_INTERFACE_MODE_RGMII_ID || +- mode == PHY_INTERFACE_MODE_RGMII_TXID) +- delay = 1; +- +- if (!FIELD_FIT(QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK, delay)) { +- dev_err(priv->dev, "rgmii tx delay is limited to a max value of 3ns, setting to the max value"); +- delay = 3; +- } +- +- priv->ports_config.rgmii_tx_delay[cpu_port_index] = delay; +- +- delay = 0; +- +- if (!of_property_read_u32(port_dn, "rx-internal-delay-ps", &delay)) +- /* Switch regs accept value in ns, convert ps to ns */ +- delay = delay / 1000; +- else if (mode == PHY_INTERFACE_MODE_RGMII_ID || +- mode == PHY_INTERFACE_MODE_RGMII_RXID) +- delay = 2; +- +- if (!FIELD_FIT(QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK, delay)) { +- dev_err(priv->dev, "rgmii rx delay is limited to a max value of 3ns, setting to the max value"); +- delay = 3; +- } +- +- priv->ports_config.rgmii_rx_delay[cpu_port_index] = delay; +- +- /* Skip sgmii parsing for rgmii* mode */ +- if (mode == PHY_INTERFACE_MODE_RGMII || +- mode == PHY_INTERFACE_MODE_RGMII_ID || +- mode == PHY_INTERFACE_MODE_RGMII_TXID || +- mode == PHY_INTERFACE_MODE_RGMII_RXID) +- break; +- +- if (of_property_read_bool(port_dn, "qca,sgmii-txclk-falling-edge")) +- priv->ports_config.sgmii_tx_clk_falling_edge = true; +- +- if (of_property_read_bool(port_dn, "qca,sgmii-rxclk-falling-edge")) +- priv->ports_config.sgmii_rx_clk_falling_edge = true; +- +- if (of_property_read_bool(port_dn, "qca,sgmii-enable-pll")) { +- priv->ports_config.sgmii_enable_pll = true; +- +- if (priv->switch_id == QCA8K_ID_QCA8327) { +- dev_err(priv->dev, "SGMII PLL should NOT be enabled for qca8327. Aborting enabling"); +- priv->ports_config.sgmii_enable_pll = false; +- } +- +- if (priv->switch_revision < 2) +- dev_warn(priv->dev, "SGMII PLL should NOT be enabled for qca8337 with revision 2 or more."); +- } +- +- break; +- default: +- continue; +- } +- } +- +- return 0; +-} +- +-static int +-qca8k_setup(struct dsa_switch *ds) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- int cpu_port, ret, i; +- u32 mask; +- +- cpu_port = qca8k_find_cpu_port(ds); +- if (cpu_port < 0) { +- dev_err(priv->dev, "No cpu port configured in both cpu port0 and port6"); +- return cpu_port; +- } +- +- /* Parse CPU port config to be later used in phy_link mac_config */ +- ret = qca8k_parse_port_config(priv); +- if (ret) +- return ret; +- +- ret = qca8k_setup_mdio_bus(priv); +- if (ret) +- return ret; +- +- ret = qca8k_setup_of_pws_reg(priv); +- if (ret) +- return ret; +- +- ret = qca8k_setup_mac_pwr_sel(priv); +- if (ret) +- return ret; +- +- /* Make sure MAC06 is disabled */ +- ret = regmap_clear_bits(priv->regmap, QCA8K_REG_PORT0_PAD_CTRL, +- QCA8K_PORT0_PAD_MAC06_EXCHANGE_EN); +- if (ret) { +- dev_err(priv->dev, "failed disabling MAC06 exchange"); +- return ret; +- } +- +- /* Enable CPU Port */ +- ret = regmap_set_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, +- QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN); +- if (ret) { +- dev_err(priv->dev, "failed enabling CPU port"); +- return ret; +- } +- +- /* Enable MIB counters */ +- ret = qca8k_mib_init(priv); +- if (ret) +- dev_warn(priv->dev, "mib init failed"); +- +- /* Initial setup of all ports */ +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { +- /* Disable forwarding by default on all ports */ +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), +- QCA8K_PORT_LOOKUP_MEMBER, 0); +- if (ret) +- return ret; +- +- /* Enable QCA header mode on all cpu ports */ +- if (dsa_is_cpu_port(ds, i)) { +- ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(i), +- FIELD_PREP(QCA8K_PORT_HDR_CTRL_TX_MASK, QCA8K_PORT_HDR_CTRL_ALL) | +- FIELD_PREP(QCA8K_PORT_HDR_CTRL_RX_MASK, QCA8K_PORT_HDR_CTRL_ALL)); +- if (ret) { +- dev_err(priv->dev, "failed enabling QCA header mode"); +- return ret; +- } +- } +- +- /* Disable MAC by default on all user ports */ +- if (dsa_is_user_port(ds, i)) +- qca8k_port_set_status(priv, i, 0); +- } +- +- /* Forward all unknown frames to CPU port for Linux processing +- * Notice that in multi-cpu config only one port should be set +- * for igmp, unknown, multicast and broadcast packet +- */ +- ret = qca8k_write(priv, QCA8K_REG_GLOBAL_FW_CTRL1, +- FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_MASK, BIT(cpu_port)) | +- FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_BC_DP_MASK, BIT(cpu_port)) | +- FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_MC_DP_MASK, BIT(cpu_port)) | +- FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_UC_DP_MASK, BIT(cpu_port))); +- if (ret) +- return ret; +- +- /* Setup connection between CPU port & user ports +- * Configure specific switch configuration for ports +- */ +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { +- /* CPU port gets connected to all user ports of the switch */ +- if (dsa_is_cpu_port(ds, i)) { +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), +- QCA8K_PORT_LOOKUP_MEMBER, dsa_user_ports(ds)); +- if (ret) +- return ret; +- } +- +- /* Individual user ports get connected to CPU port only */ +- if (dsa_is_user_port(ds, i)) { +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), +- QCA8K_PORT_LOOKUP_MEMBER, +- BIT(cpu_port)); +- if (ret) +- return ret; +- +- /* Enable ARP Auto-learning by default */ +- ret = regmap_set_bits(priv->regmap, QCA8K_PORT_LOOKUP_CTRL(i), +- QCA8K_PORT_LOOKUP_LEARN); +- if (ret) +- return ret; +- +- /* For port based vlans to work we need to set the +- * default egress vid +- */ +- ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(i), +- QCA8K_EGREES_VLAN_PORT_MASK(i), +- QCA8K_EGREES_VLAN_PORT(i, QCA8K_PORT_VID_DEF)); +- if (ret) +- return ret; +- +- ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(i), +- QCA8K_PORT_VLAN_CVID(QCA8K_PORT_VID_DEF) | +- QCA8K_PORT_VLAN_SVID(QCA8K_PORT_VID_DEF)); +- if (ret) +- return ret; +- } +- +- /* The port 5 of the qca8337 have some problem in flood condition. The +- * original legacy driver had some specific buffer and priority settings +- * for the different port suggested by the QCA switch team. Add this +- * missing settings to improve switch stability under load condition. +- * This problem is limited to qca8337 and other qca8k switch are not affected. +- */ +- if (priv->switch_id == QCA8K_ID_QCA8337) { +- switch (i) { +- /* The 2 CPU port and port 5 requires some different +- * priority than any other ports. +- */ +- case 0: +- case 5: +- case 6: +- mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x4) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x4) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI4(0x6) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI5(0x8) | +- QCA8K_PORT_HOL_CTRL0_EG_PORT(0x1e); +- break; +- default: +- mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x6) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x8) | +- QCA8K_PORT_HOL_CTRL0_EG_PORT(0x19); +- } +- qca8k_write(priv, QCA8K_REG_PORT_HOL_CTRL0(i), mask); +- +- mask = QCA8K_PORT_HOL_CTRL1_ING(0x6) | +- QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN | +- QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN | +- QCA8K_PORT_HOL_CTRL1_WRED_EN; +- qca8k_rmw(priv, QCA8K_REG_PORT_HOL_CTRL1(i), +- QCA8K_PORT_HOL_CTRL1_ING_BUF_MASK | +- QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN | +- QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN | +- QCA8K_PORT_HOL_CTRL1_WRED_EN, +- mask); +- } +- } +- +- /* Special GLOBAL_FC_THRESH value are needed for ar8327 switch */ +- if (priv->switch_id == QCA8K_ID_QCA8327) { +- mask = QCA8K_GLOBAL_FC_GOL_XON_THRES(288) | +- QCA8K_GLOBAL_FC_GOL_XOFF_THRES(496); +- qca8k_rmw(priv, QCA8K_REG_GLOBAL_FC_THRESH, +- QCA8K_GLOBAL_FC_GOL_XON_THRES_MASK | +- QCA8K_GLOBAL_FC_GOL_XOFF_THRES_MASK, +- mask); +- } +- +- /* Setup our port MTUs to match power on defaults */ +- ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, ETH_FRAME_LEN + ETH_FCS_LEN); +- if (ret) +- dev_warn(priv->dev, "failed setting MTU settings"); +- +- /* Flush the FDB table */ +- qca8k_fdb_flush(priv); +- +- /* We don't have interrupts for link changes, so we need to poll */ +- ds->pcs_poll = true; +- +- /* Set min a max ageing value supported */ +- ds->ageing_time_min = 7000; +- ds->ageing_time_max = 458745000; +- +- /* Set max number of LAGs supported */ +- ds->num_lag_ids = QCA8K_NUM_LAGS; +- +- return 0; +-} +- +-static void +-qca8k_mac_config_setup_internal_delay(struct qca8k_priv *priv, int cpu_port_index, +- u32 reg) +-{ +- u32 delay, val = 0; +- int ret; +- +- /* Delay can be declared in 3 different way. +- * Mode to rgmii and internal-delay standard binding defined +- * rgmii-id or rgmii-tx/rx phy mode set. +- * The parse logic set a delay different than 0 only when one +- * of the 3 different way is used. In all other case delay is +- * not enabled. With ID or TX/RXID delay is enabled and set +- * to the default and recommended value. +- */ +- if (priv->ports_config.rgmii_tx_delay[cpu_port_index]) { +- delay = priv->ports_config.rgmii_tx_delay[cpu_port_index]; +- +- val |= QCA8K_PORT_PAD_RGMII_TX_DELAY(delay) | +- QCA8K_PORT_PAD_RGMII_TX_DELAY_EN; +- } +- +- if (priv->ports_config.rgmii_rx_delay[cpu_port_index]) { +- delay = priv->ports_config.rgmii_rx_delay[cpu_port_index]; +- +- val |= QCA8K_PORT_PAD_RGMII_RX_DELAY(delay) | +- QCA8K_PORT_PAD_RGMII_RX_DELAY_EN; +- } +- +- /* Set RGMII delay based on the selected values */ +- ret = qca8k_rmw(priv, reg, +- QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK | +- QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK | +- QCA8K_PORT_PAD_RGMII_TX_DELAY_EN | +- QCA8K_PORT_PAD_RGMII_RX_DELAY_EN, +- val); +- if (ret) +- dev_err(priv->dev, "Failed to set internal delay for CPU port%d", +- cpu_port_index == QCA8K_CPU_PORT0 ? 0 : 6); +-} +- +-static void +-qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, +- const struct phylink_link_state *state) +-{ +- struct qca8k_priv *priv = ds->priv; +- int cpu_port_index, ret; +- u32 reg, val; +- +- switch (port) { +- case 0: /* 1st CPU port */ +- if (state->interface != PHY_INTERFACE_MODE_RGMII && +- state->interface != PHY_INTERFACE_MODE_RGMII_ID && +- state->interface != PHY_INTERFACE_MODE_RGMII_TXID && +- state->interface != PHY_INTERFACE_MODE_RGMII_RXID && +- state->interface != PHY_INTERFACE_MODE_SGMII) +- return; +- +- reg = QCA8K_REG_PORT0_PAD_CTRL; +- cpu_port_index = QCA8K_CPU_PORT0; +- break; +- case 1: +- case 2: +- case 3: +- case 4: +- case 5: +- /* Internal PHY, nothing to do */ +- return; +- case 6: /* 2nd CPU port / external PHY */ +- if (state->interface != PHY_INTERFACE_MODE_RGMII && +- state->interface != PHY_INTERFACE_MODE_RGMII_ID && +- state->interface != PHY_INTERFACE_MODE_RGMII_TXID && +- state->interface != PHY_INTERFACE_MODE_RGMII_RXID && +- state->interface != PHY_INTERFACE_MODE_SGMII && +- state->interface != PHY_INTERFACE_MODE_1000BASEX) +- return; +- +- reg = QCA8K_REG_PORT6_PAD_CTRL; +- cpu_port_index = QCA8K_CPU_PORT6; +- break; +- default: +- dev_err(ds->dev, "%s: unsupported port: %i\n", __func__, port); +- return; +- } +- +- if (port != 6 && phylink_autoneg_inband(mode)) { +- dev_err(ds->dev, "%s: in-band negotiation unsupported\n", +- __func__); +- return; +- } +- +- switch (state->interface) { +- case PHY_INTERFACE_MODE_RGMII: +- case PHY_INTERFACE_MODE_RGMII_ID: +- case PHY_INTERFACE_MODE_RGMII_TXID: +- case PHY_INTERFACE_MODE_RGMII_RXID: +- qca8k_write(priv, reg, QCA8K_PORT_PAD_RGMII_EN); +- +- /* Configure rgmii delay */ +- qca8k_mac_config_setup_internal_delay(priv, cpu_port_index, reg); +- +- /* QCA8337 requires to set rgmii rx delay for all ports. +- * This is enabled through PORT5_PAD_CTRL for all ports, +- * rather than individual port registers. +- */ +- if (priv->switch_id == QCA8K_ID_QCA8337) +- qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL, +- QCA8K_PORT_PAD_RGMII_RX_DELAY_EN); +- break; +- case PHY_INTERFACE_MODE_SGMII: +- case PHY_INTERFACE_MODE_1000BASEX: +- /* Enable SGMII on the port */ +- qca8k_write(priv, reg, QCA8K_PORT_PAD_SGMII_EN); +- +- /* Enable/disable SerDes auto-negotiation as necessary */ +- ret = qca8k_read(priv, QCA8K_REG_PWS, &val); +- if (ret) +- return; +- if (phylink_autoneg_inband(mode)) +- val &= ~QCA8K_PWS_SERDES_AEN_DIS; +- else +- val |= QCA8K_PWS_SERDES_AEN_DIS; +- qca8k_write(priv, QCA8K_REG_PWS, val); +- +- /* Configure the SGMII parameters */ +- ret = qca8k_read(priv, QCA8K_REG_SGMII_CTRL, &val); +- if (ret) +- return; +- +- val |= QCA8K_SGMII_EN_SD; +- +- if (priv->ports_config.sgmii_enable_pll) +- val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX | +- QCA8K_SGMII_EN_TX; +- +- if (dsa_is_cpu_port(ds, port)) { +- /* CPU port, we're talking to the CPU MAC, be a PHY */ +- val &= ~QCA8K_SGMII_MODE_CTRL_MASK; +- val |= QCA8K_SGMII_MODE_CTRL_PHY; +- } else if (state->interface == PHY_INTERFACE_MODE_SGMII) { +- val &= ~QCA8K_SGMII_MODE_CTRL_MASK; +- val |= QCA8K_SGMII_MODE_CTRL_MAC; +- } else if (state->interface == PHY_INTERFACE_MODE_1000BASEX) { +- val &= ~QCA8K_SGMII_MODE_CTRL_MASK; +- val |= QCA8K_SGMII_MODE_CTRL_BASEX; +- } +- +- qca8k_write(priv, QCA8K_REG_SGMII_CTRL, val); +- +- /* From original code is reported port instability as SGMII also +- * require delay set. Apply advised values here or take them from DT. +- */ +- if (state->interface == PHY_INTERFACE_MODE_SGMII) +- qca8k_mac_config_setup_internal_delay(priv, cpu_port_index, reg); +- +- /* For qca8327/qca8328/qca8334/qca8338 sgmii is unique and +- * falling edge is set writing in the PORT0 PAD reg +- */ +- if (priv->switch_id == QCA8K_ID_QCA8327 || +- priv->switch_id == QCA8K_ID_QCA8337) +- reg = QCA8K_REG_PORT0_PAD_CTRL; +- +- val = 0; +- +- /* SGMII Clock phase configuration */ +- if (priv->ports_config.sgmii_rx_clk_falling_edge) +- val |= QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE; +- +- if (priv->ports_config.sgmii_tx_clk_falling_edge) +- val |= QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE; +- +- if (val) +- ret = qca8k_rmw(priv, reg, +- QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE | +- QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE, +- val); +- +- break; +- default: +- dev_err(ds->dev, "xMII mode %s not supported for port %d\n", +- phy_modes(state->interface), port); +- return; +- } +-} +- +-static void +-qca8k_phylink_validate(struct dsa_switch *ds, int port, +- unsigned long *supported, +- struct phylink_link_state *state) +-{ +- __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; +- +- switch (port) { +- case 0: /* 1st CPU port */ +- if (state->interface != PHY_INTERFACE_MODE_NA && +- state->interface != PHY_INTERFACE_MODE_RGMII && +- state->interface != PHY_INTERFACE_MODE_RGMII_ID && +- state->interface != PHY_INTERFACE_MODE_RGMII_TXID && +- state->interface != PHY_INTERFACE_MODE_RGMII_RXID && +- state->interface != PHY_INTERFACE_MODE_SGMII) +- goto unsupported; +- break; +- case 1: +- case 2: +- case 3: +- case 4: +- case 5: +- /* Internal PHY */ +- if (state->interface != PHY_INTERFACE_MODE_NA && +- state->interface != PHY_INTERFACE_MODE_GMII && +- state->interface != PHY_INTERFACE_MODE_INTERNAL) +- goto unsupported; +- break; +- case 6: /* 2nd CPU port / external PHY */ +- if (state->interface != PHY_INTERFACE_MODE_NA && +- state->interface != PHY_INTERFACE_MODE_RGMII && +- state->interface != PHY_INTERFACE_MODE_RGMII_ID && +- state->interface != PHY_INTERFACE_MODE_RGMII_TXID && +- state->interface != PHY_INTERFACE_MODE_RGMII_RXID && +- state->interface != PHY_INTERFACE_MODE_SGMII && +- state->interface != PHY_INTERFACE_MODE_1000BASEX) +- goto unsupported; +- break; +- default: +-unsupported: +- linkmode_zero(supported); +- return; +- } +- +- phylink_set_port_modes(mask); +- phylink_set(mask, Autoneg); +- +- phylink_set(mask, 1000baseT_Full); +- phylink_set(mask, 10baseT_Half); +- phylink_set(mask, 10baseT_Full); +- phylink_set(mask, 100baseT_Half); +- phylink_set(mask, 100baseT_Full); +- +- if (state->interface == PHY_INTERFACE_MODE_1000BASEX) +- phylink_set(mask, 1000baseX_Full); +- +- phylink_set(mask, Pause); +- phylink_set(mask, Asym_Pause); +- +- linkmode_and(supported, supported, mask); +- linkmode_and(state->advertising, state->advertising, mask); +-} +- +-static int +-qca8k_phylink_mac_link_state(struct dsa_switch *ds, int port, +- struct phylink_link_state *state) +-{ +- struct qca8k_priv *priv = ds->priv; +- u32 reg; +- int ret; +- +- ret = qca8k_read(priv, QCA8K_REG_PORT_STATUS(port), ®); +- if (ret < 0) +- return ret; +- +- state->link = !!(reg & QCA8K_PORT_STATUS_LINK_UP); +- state->an_complete = state->link; +- state->an_enabled = !!(reg & QCA8K_PORT_STATUS_LINK_AUTO); +- state->duplex = (reg & QCA8K_PORT_STATUS_DUPLEX) ? DUPLEX_FULL : +- DUPLEX_HALF; +- +- switch (reg & QCA8K_PORT_STATUS_SPEED) { +- case QCA8K_PORT_STATUS_SPEED_10: +- state->speed = SPEED_10; +- break; +- case QCA8K_PORT_STATUS_SPEED_100: +- state->speed = SPEED_100; +- break; +- case QCA8K_PORT_STATUS_SPEED_1000: +- state->speed = SPEED_1000; +- break; +- default: +- state->speed = SPEED_UNKNOWN; +- break; +- } +- +- state->pause = MLO_PAUSE_NONE; +- if (reg & QCA8K_PORT_STATUS_RXFLOW) +- state->pause |= MLO_PAUSE_RX; +- if (reg & QCA8K_PORT_STATUS_TXFLOW) +- state->pause |= MLO_PAUSE_TX; +- +- return 1; +-} +- +-static void +-qca8k_phylink_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode, +- phy_interface_t interface) +-{ +- struct qca8k_priv *priv = ds->priv; +- +- qca8k_port_set_status(priv, port, 0); +-} +- +-static void +-qca8k_phylink_mac_link_up(struct dsa_switch *ds, int port, unsigned int mode, +- phy_interface_t interface, struct phy_device *phydev, +- int speed, int duplex, bool tx_pause, bool rx_pause) +-{ +- struct qca8k_priv *priv = ds->priv; +- u32 reg; +- +- if (phylink_autoneg_inband(mode)) { +- reg = QCA8K_PORT_STATUS_LINK_AUTO; +- } else { +- switch (speed) { +- case SPEED_10: +- reg = QCA8K_PORT_STATUS_SPEED_10; +- break; +- case SPEED_100: +- reg = QCA8K_PORT_STATUS_SPEED_100; +- break; +- case SPEED_1000: +- reg = QCA8K_PORT_STATUS_SPEED_1000; +- break; +- default: +- reg = QCA8K_PORT_STATUS_LINK_AUTO; +- break; +- } +- +- if (duplex == DUPLEX_FULL) +- reg |= QCA8K_PORT_STATUS_DUPLEX; +- +- if (rx_pause || dsa_is_cpu_port(ds, port)) +- reg |= QCA8K_PORT_STATUS_RXFLOW; +- +- if (tx_pause || dsa_is_cpu_port(ds, port)) +- reg |= QCA8K_PORT_STATUS_TXFLOW; +- } +- +- reg |= QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC; +- +- qca8k_write(priv, QCA8K_REG_PORT_STATUS(port), reg); +-} +- +-static void +-qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data) +-{ +- const struct qca8k_match_data *match_data; +- struct qca8k_priv *priv = ds->priv; +- int i; +- +- if (stringset != ETH_SS_STATS) +- return; +- +- match_data = of_device_get_match_data(priv->dev); +- +- for (i = 0; i < match_data->mib_count; i++) +- strncpy(data + i * ETH_GSTRING_LEN, ar8327_mib[i].name, +- ETH_GSTRING_LEN); +-} +- +-static void qca8k_mib_autocast_handler(struct dsa_switch *ds, struct sk_buff *skb) +-{ +- const struct qca8k_match_data *match_data; +- struct qca8k_mib_eth_data *mib_eth_data; +- struct qca8k_priv *priv = ds->priv; +- const struct qca8k_mib_desc *mib; +- struct mib_ethhdr *mib_ethhdr; +- int i, mib_len, offset = 0; +- u64 *data; +- u8 port; +- +- mib_ethhdr = (struct mib_ethhdr *)skb_mac_header(skb); +- mib_eth_data = &priv->mib_eth_data; +- +- /* The switch autocast every port. Ignore other packet and +- * parse only the requested one. +- */ +- port = FIELD_GET(QCA_HDR_RECV_SOURCE_PORT, ntohs(mib_ethhdr->hdr)); +- if (port != mib_eth_data->req_port) +- goto exit; +- +- match_data = device_get_match_data(priv->dev); +- data = mib_eth_data->data; +- +- for (i = 0; i < match_data->mib_count; i++) { +- mib = &ar8327_mib[i]; +- +- /* First 3 mib are present in the skb head */ +- if (i < 3) { +- data[i] = mib_ethhdr->data[i]; +- continue; +- } +- +- mib_len = sizeof(uint32_t); +- +- /* Some mib are 64 bit wide */ +- if (mib->size == 2) +- mib_len = sizeof(uint64_t); +- +- /* Copy the mib value from packet to the */ +- memcpy(data + i, skb->data + offset, mib_len); +- +- /* Set the offset for the next mib */ +- offset += mib_len; +- } +- +-exit: +- /* Complete on receiving all the mib packet */ +- if (refcount_dec_and_test(&mib_eth_data->port_parsed)) +- complete(&mib_eth_data->rw_done); +-} +- +-static int +-qca8k_get_ethtool_stats_eth(struct dsa_switch *ds, int port, u64 *data) +-{ +- struct dsa_port *dp = dsa_to_port(ds, port); +- struct qca8k_mib_eth_data *mib_eth_data; +- struct qca8k_priv *priv = ds->priv; +- int ret; +- +- mib_eth_data = &priv->mib_eth_data; +- +- mutex_lock(&mib_eth_data->mutex); +- +- reinit_completion(&mib_eth_data->rw_done); +- +- mib_eth_data->req_port = dp->index; +- mib_eth_data->data = data; +- refcount_set(&mib_eth_data->port_parsed, QCA8K_NUM_PORTS); +- +- mutex_lock(&priv->reg_mutex); +- +- /* Send mib autocast request */ +- ret = regmap_update_bits(priv->regmap, QCA8K_REG_MIB, +- QCA8K_MIB_FUNC | QCA8K_MIB_BUSY, +- FIELD_PREP(QCA8K_MIB_FUNC, QCA8K_MIB_CAST) | +- QCA8K_MIB_BUSY); +- +- mutex_unlock(&priv->reg_mutex); +- +- if (ret) +- goto exit; +- +- ret = wait_for_completion_timeout(&mib_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); +- +-exit: +- mutex_unlock(&mib_eth_data->mutex); +- +- return ret; +-} +- +-static void +-qca8k_get_ethtool_stats(struct dsa_switch *ds, int port, +- uint64_t *data) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- const struct qca8k_match_data *match_data; +- const struct qca8k_mib_desc *mib; +- u32 reg, i, val; +- u32 hi = 0; +- int ret; +- +- if (priv->mgmt_master && +- qca8k_get_ethtool_stats_eth(ds, port, data) > 0) +- return; +- +- match_data = of_device_get_match_data(priv->dev); +- +- for (i = 0; i < match_data->mib_count; i++) { +- mib = &ar8327_mib[i]; +- reg = QCA8K_PORT_MIB_COUNTER(port) + mib->offset; +- +- ret = qca8k_read(priv, reg, &val); +- if (ret < 0) +- continue; +- +- if (mib->size == 2) { +- ret = qca8k_read(priv, reg + 4, &hi); +- if (ret < 0) +- continue; +- } +- +- data[i] = val; +- if (mib->size == 2) +- data[i] |= (u64)hi << 32; +- } +-} +- +-static int +-qca8k_get_sset_count(struct dsa_switch *ds, int port, int sset) +-{ +- const struct qca8k_match_data *match_data; +- struct qca8k_priv *priv = ds->priv; +- +- if (sset != ETH_SS_STATS) +- return 0; +- +- match_data = of_device_get_match_data(priv->dev); +- +- return match_data->mib_count; +-} +- +-static int +-qca8k_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *eee) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- u32 lpi_en = QCA8K_REG_EEE_CTRL_LPI_EN(port); +- u32 reg; +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- ret = qca8k_read(priv, QCA8K_REG_EEE_CTRL, ®); +- if (ret < 0) +- goto exit; +- +- if (eee->eee_enabled) +- reg |= lpi_en; +- else +- reg &= ~lpi_en; +- ret = qca8k_write(priv, QCA8K_REG_EEE_CTRL, reg); +- +-exit: +- mutex_unlock(&priv->reg_mutex); +- return ret; +-} +- +-static int +-qca8k_get_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e) +-{ +- /* Nothing to do on the port's MAC */ +- return 0; +-} +- +-static void +-qca8k_port_stp_state_set(struct dsa_switch *ds, int port, u8 state) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- u32 stp_state; +- +- switch (state) { +- case BR_STATE_DISABLED: +- stp_state = QCA8K_PORT_LOOKUP_STATE_DISABLED; +- break; +- case BR_STATE_BLOCKING: +- stp_state = QCA8K_PORT_LOOKUP_STATE_BLOCKING; +- break; +- case BR_STATE_LISTENING: +- stp_state = QCA8K_PORT_LOOKUP_STATE_LISTENING; +- break; +- case BR_STATE_LEARNING: +- stp_state = QCA8K_PORT_LOOKUP_STATE_LEARNING; +- break; +- case BR_STATE_FORWARDING: +- default: +- stp_state = QCA8K_PORT_LOOKUP_STATE_FORWARD; +- break; +- } +- +- qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), +- QCA8K_PORT_LOOKUP_STATE_MASK, stp_state); +-} +- +-static int +-qca8k_port_bridge_join(struct dsa_switch *ds, int port, struct net_device *br) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- int port_mask, cpu_port; +- int i, ret; +- +- cpu_port = dsa_to_port(ds, port)->cpu_dp->index; +- port_mask = BIT(cpu_port); +- +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { +- if (dsa_is_cpu_port(ds, i)) +- continue; +- if (dsa_to_port(ds, i)->bridge_dev != br) +- continue; +- /* Add this port to the portvlan mask of the other ports +- * in the bridge +- */ +- ret = regmap_set_bits(priv->regmap, +- QCA8K_PORT_LOOKUP_CTRL(i), +- BIT(port)); +- if (ret) +- return ret; +- if (i != port) +- port_mask |= BIT(i); +- } +- +- /* Add all other ports to this ports portvlan mask */ +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), +- QCA8K_PORT_LOOKUP_MEMBER, port_mask); +- +- return ret; +-} +- +-static void +-qca8k_port_bridge_leave(struct dsa_switch *ds, int port, struct net_device *br) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- int cpu_port, i; +- +- cpu_port = dsa_to_port(ds, port)->cpu_dp->index; +- +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { +- if (dsa_is_cpu_port(ds, i)) +- continue; +- if (dsa_to_port(ds, i)->bridge_dev != br) +- continue; +- /* Remove this port to the portvlan mask of the other ports +- * in the bridge +- */ +- regmap_clear_bits(priv->regmap, +- QCA8K_PORT_LOOKUP_CTRL(i), +- BIT(port)); +- } +- +- /* Set the cpu port to be the only one in the portvlan mask of +- * this port +- */ +- qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), +- QCA8K_PORT_LOOKUP_MEMBER, BIT(cpu_port)); +-} +- +-static void +-qca8k_port_fast_age(struct dsa_switch *ds, int port) +-{ +- struct qca8k_priv *priv = ds->priv; +- +- mutex_lock(&priv->reg_mutex); +- qca8k_fdb_access(priv, QCA8K_FDB_FLUSH_PORT, port); +- mutex_unlock(&priv->reg_mutex); +-} +- +-static int +-qca8k_set_ageing_time(struct dsa_switch *ds, unsigned int msecs) +-{ +- struct qca8k_priv *priv = ds->priv; +- unsigned int secs = msecs / 1000; +- u32 val; +- +- /* AGE_TIME reg is set in 7s step */ +- val = secs / 7; +- +- /* Handle case with 0 as val to NOT disable +- * learning +- */ +- if (!val) +- val = 1; +- +- return regmap_update_bits(priv->regmap, QCA8K_REG_ATU_CTRL, QCA8K_ATU_AGE_TIME_MASK, +- QCA8K_ATU_AGE_TIME(val)); +-} +- +-static int +-qca8k_port_enable(struct dsa_switch *ds, int port, +- struct phy_device *phy) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- +- qca8k_port_set_status(priv, port, 1); +- priv->port_enabled_map |= BIT(port); +- +- if (dsa_is_user_port(ds, port)) +- phy_support_asym_pause(phy); +- +- return 0; +-} +- +-static void +-qca8k_port_disable(struct dsa_switch *ds, int port) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- +- qca8k_port_set_status(priv, port, 0); +- priv->port_enabled_map &= ~BIT(port); +-} +- +-static int +-qca8k_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) +-{ +- struct qca8k_priv *priv = ds->priv; +- int ret; +- +- /* We have only have a general MTU setting. +- * DSA always set the CPU port's MTU to the largest MTU of the slave +- * ports. +- * Setting MTU just for the CPU port is sufficient to correctly set a +- * value for every port. +- */ +- if (!dsa_is_cpu_port(ds, port)) +- return 0; +- +- /* To change the MAX_FRAME_SIZE the cpu ports must be off or +- * the switch panics. +- * Turn off both cpu ports before applying the new value to prevent +- * this. +- */ +- if (priv->port_enabled_map & BIT(0)) +- qca8k_port_set_status(priv, 0, 0); +- +- if (priv->port_enabled_map & BIT(6)) +- qca8k_port_set_status(priv, 6, 0); +- +- /* Include L2 header / FCS length */ +- ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, new_mtu + ETH_HLEN + ETH_FCS_LEN); +- +- if (priv->port_enabled_map & BIT(0)) +- qca8k_port_set_status(priv, 0, 1); +- +- if (priv->port_enabled_map & BIT(6)) +- qca8k_port_set_status(priv, 6, 1); +- +- return ret; +-} +- +-static int +-qca8k_port_max_mtu(struct dsa_switch *ds, int port) +-{ +- return QCA8K_MAX_MTU; +-} +- +-static int +-qca8k_port_fdb_insert(struct qca8k_priv *priv, const u8 *addr, +- u16 port_mask, u16 vid) +-{ +- /* Set the vid to the port vlan id if no vid is set */ +- if (!vid) +- vid = QCA8K_PORT_VID_DEF; +- +- return qca8k_fdb_add(priv, addr, port_mask, vid, +- QCA8K_ATU_STATUS_STATIC); +-} +- +-static int +-qca8k_port_fdb_add(struct dsa_switch *ds, int port, +- const unsigned char *addr, u16 vid) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- u16 port_mask = BIT(port); +- +- return qca8k_port_fdb_insert(priv, addr, port_mask, vid); +-} +- +-static int +-qca8k_port_fdb_del(struct dsa_switch *ds, int port, +- const unsigned char *addr, u16 vid) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- u16 port_mask = BIT(port); +- +- if (!vid) +- vid = QCA8K_PORT_VID_DEF; +- +- return qca8k_fdb_del(priv, addr, port_mask, vid); +-} +- +-static int +-qca8k_port_fdb_dump(struct dsa_switch *ds, int port, +- dsa_fdb_dump_cb_t *cb, void *data) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- struct qca8k_fdb _fdb = { 0 }; +- int cnt = QCA8K_NUM_FDB_RECORDS; +- bool is_static; +- int ret = 0; +- +- mutex_lock(&priv->reg_mutex); +- while (cnt-- && !qca8k_fdb_next(priv, &_fdb, port)) { +- if (!_fdb.aging) +- break; +- is_static = (_fdb.aging == QCA8K_ATU_STATUS_STATIC); +- ret = cb(_fdb.mac, _fdb.vid, is_static, data); +- if (ret) +- break; +- } +- mutex_unlock(&priv->reg_mutex); +- +- return 0; +-} +- +-static int +-qca8k_port_mdb_add(struct dsa_switch *ds, int port, +- const struct switchdev_obj_port_mdb *mdb) +-{ +- struct qca8k_priv *priv = ds->priv; +- const u8 *addr = mdb->addr; +- u16 vid = mdb->vid; +- +- return qca8k_fdb_search_and_insert(priv, BIT(port), addr, vid); +-} +- +-static int +-qca8k_port_mdb_del(struct dsa_switch *ds, int port, +- const struct switchdev_obj_port_mdb *mdb) +-{ +- struct qca8k_priv *priv = ds->priv; +- const u8 *addr = mdb->addr; +- u16 vid = mdb->vid; +- +- return qca8k_fdb_search_and_del(priv, BIT(port), addr, vid); +-} +- +-static int +-qca8k_port_mirror_add(struct dsa_switch *ds, int port, +- struct dsa_mall_mirror_tc_entry *mirror, +- bool ingress) +-{ +- struct qca8k_priv *priv = ds->priv; +- int monitor_port, ret; +- u32 reg, val; +- +- /* Check for existent entry */ +- if ((ingress ? priv->mirror_rx : priv->mirror_tx) & BIT(port)) +- return -EEXIST; +- +- ret = regmap_read(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, &val); +- if (ret) +- return ret; +- +- /* QCA83xx can have only one port set to mirror mode. +- * Check that the correct port is requested and return error otherwise. +- * When no mirror port is set, the values is set to 0xF +- */ +- monitor_port = FIELD_GET(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); +- if (monitor_port != 0xF && monitor_port != mirror->to_local_port) +- return -EEXIST; +- +- /* Set the monitor port */ +- val = FIELD_PREP(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, +- mirror->to_local_port); +- ret = regmap_update_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, +- QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); +- if (ret) +- return ret; +- +- if (ingress) { +- reg = QCA8K_PORT_LOOKUP_CTRL(port); +- val = QCA8K_PORT_LOOKUP_ING_MIRROR_EN; +- } else { +- reg = QCA8K_REG_PORT_HOL_CTRL1(port); +- val = QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN; +- } +- +- ret = regmap_update_bits(priv->regmap, reg, val, val); +- if (ret) +- return ret; +- +- /* Track mirror port for tx and rx to decide when the +- * mirror port has to be disabled. +- */ +- if (ingress) +- priv->mirror_rx |= BIT(port); +- else +- priv->mirror_tx |= BIT(port); +- +- return 0; +-} +- +-static void +-qca8k_port_mirror_del(struct dsa_switch *ds, int port, +- struct dsa_mall_mirror_tc_entry *mirror) +-{ +- struct qca8k_priv *priv = ds->priv; +- u32 reg, val; +- int ret; +- +- if (mirror->ingress) { +- reg = QCA8K_PORT_LOOKUP_CTRL(port); +- val = QCA8K_PORT_LOOKUP_ING_MIRROR_EN; +- } else { +- reg = QCA8K_REG_PORT_HOL_CTRL1(port); +- val = QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN; +- } +- +- ret = regmap_clear_bits(priv->regmap, reg, val); +- if (ret) +- goto err; +- +- if (mirror->ingress) +- priv->mirror_rx &= ~BIT(port); +- else +- priv->mirror_tx &= ~BIT(port); +- +- /* No port set to send packet to mirror port. Disable mirror port */ +- if (!priv->mirror_rx && !priv->mirror_tx) { +- val = FIELD_PREP(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, 0xF); +- ret = regmap_update_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, +- QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); +- if (ret) +- goto err; +- } +-err: +- dev_err(priv->dev, "Failed to del mirror port from %d", port); +-} +- +-static int +-qca8k_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering, +- struct netlink_ext_ack *extack) +-{ +- struct qca8k_priv *priv = ds->priv; +- int ret; +- +- if (vlan_filtering) { +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), +- QCA8K_PORT_LOOKUP_VLAN_MODE_MASK, +- QCA8K_PORT_LOOKUP_VLAN_MODE_SECURE); +- } else { +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), +- QCA8K_PORT_LOOKUP_VLAN_MODE_MASK, +- QCA8K_PORT_LOOKUP_VLAN_MODE_NONE); +- } +- +- return ret; +-} +- +-static int +-qca8k_port_vlan_add(struct dsa_switch *ds, int port, +- const struct switchdev_obj_port_vlan *vlan, +- struct netlink_ext_ack *extack) +-{ +- bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; +- bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID; +- struct qca8k_priv *priv = ds->priv; +- int ret; +- +- ret = qca8k_vlan_add(priv, port, vlan->vid, untagged); +- if (ret) { +- dev_err(priv->dev, "Failed to add VLAN to port %d (%d)", port, ret); +- return ret; +- } +- +- if (pvid) { +- ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(port), +- QCA8K_EGREES_VLAN_PORT_MASK(port), +- QCA8K_EGREES_VLAN_PORT(port, vlan->vid)); +- if (ret) +- return ret; +- +- ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(port), +- QCA8K_PORT_VLAN_CVID(vlan->vid) | +- QCA8K_PORT_VLAN_SVID(vlan->vid)); +- } +- +- return ret; +-} +- +-static int +-qca8k_port_vlan_del(struct dsa_switch *ds, int port, +- const struct switchdev_obj_port_vlan *vlan) +-{ +- struct qca8k_priv *priv = ds->priv; +- int ret; +- +- ret = qca8k_vlan_del(priv, port, vlan->vid); +- if (ret) +- dev_err(priv->dev, "Failed to delete VLAN from port %d (%d)", port, ret); +- +- return ret; +-} +- +-static u32 qca8k_get_phy_flags(struct dsa_switch *ds, int port) +-{ +- struct qca8k_priv *priv = ds->priv; +- +- /* Communicate to the phy internal driver the switch revision. +- * Based on the switch revision different values needs to be +- * set to the dbg and mmd reg on the phy. +- * The first 2 bit are used to communicate the switch revision +- * to the phy driver. +- */ +- if (port > 0 && port < 6) +- return priv->switch_revision; +- +- return 0; +-} +- +-static enum dsa_tag_protocol +-qca8k_get_tag_protocol(struct dsa_switch *ds, int port, +- enum dsa_tag_protocol mp) +-{ +- return DSA_TAG_PROTO_QCA; +-} +- +-static bool +-qca8k_lag_can_offload(struct dsa_switch *ds, +- struct net_device *lag, +- struct netdev_lag_upper_info *info) +-{ +- struct dsa_port *dp; +- int id, members = 0; +- +- id = dsa_lag_id(ds->dst, lag); +- if (id < 0 || id >= ds->num_lag_ids) +- return false; +- +- dsa_lag_foreach_port(dp, ds->dst, lag) +- /* Includes the port joining the LAG */ +- members++; +- +- if (members > QCA8K_NUM_PORTS_FOR_LAG) +- return false; +- +- if (info->tx_type != NETDEV_LAG_TX_TYPE_HASH) +- return false; +- +- if (info->hash_type != NETDEV_LAG_HASH_L2 && +- info->hash_type != NETDEV_LAG_HASH_L23) +- return false; +- +- return true; +-} +- +-static int +-qca8k_lag_setup_hash(struct dsa_switch *ds, +- struct net_device *lag, +- struct netdev_lag_upper_info *info) +-{ +- struct qca8k_priv *priv = ds->priv; +- bool unique_lag = true; +- u32 hash = 0; +- int i, id; +- +- id = dsa_lag_id(ds->dst, lag); +- +- switch (info->hash_type) { +- case NETDEV_LAG_HASH_L23: +- hash |= QCA8K_TRUNK_HASH_SIP_EN; +- hash |= QCA8K_TRUNK_HASH_DIP_EN; +- fallthrough; +- case NETDEV_LAG_HASH_L2: +- hash |= QCA8K_TRUNK_HASH_SA_EN; +- hash |= QCA8K_TRUNK_HASH_DA_EN; +- break; +- default: /* We should NEVER reach this */ +- return -EOPNOTSUPP; +- } +- +- /* Check if we are the unique configured LAG */ +- dsa_lags_foreach_id(i, ds->dst) +- if (i != id && dsa_lag_dev(ds->dst, i)) { +- unique_lag = false; +- break; +- } +- +- /* Hash Mode is global. Make sure the same Hash Mode +- * is set to all the 4 possible lag. +- * If we are the unique LAG we can set whatever hash +- * mode we want. +- * To change hash mode it's needed to remove all LAG +- * and change the mode with the latest. +- */ +- if (unique_lag) { +- priv->lag_hash_mode = hash; +- } else if (priv->lag_hash_mode != hash) { +- netdev_err(lag, "Error: Mismateched Hash Mode across different lag is not supported\n"); +- return -EOPNOTSUPP; +- } +- +- return regmap_update_bits(priv->regmap, QCA8K_TRUNK_HASH_EN_CTRL, +- QCA8K_TRUNK_HASH_MASK, hash); +-} +- +-static int +-qca8k_lag_refresh_portmap(struct dsa_switch *ds, int port, +- struct net_device *lag, bool delete) +-{ +- struct qca8k_priv *priv = ds->priv; +- int ret, id, i; +- u32 val; +- +- id = dsa_lag_id(ds->dst, lag); +- +- /* Read current port member */ +- ret = regmap_read(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL0, &val); +- if (ret) +- return ret; +- +- /* Shift val to the correct trunk */ +- val >>= QCA8K_REG_GOL_TRUNK_SHIFT(id); +- val &= QCA8K_REG_GOL_TRUNK_MEMBER_MASK; +- if (delete) +- val &= ~BIT(port); +- else +- val |= BIT(port); +- +- /* Update port member. With empty portmap disable trunk */ +- ret = regmap_update_bits(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL0, +- QCA8K_REG_GOL_TRUNK_MEMBER(id) | +- QCA8K_REG_GOL_TRUNK_EN(id), +- !val << QCA8K_REG_GOL_TRUNK_SHIFT(id) | +- val << QCA8K_REG_GOL_TRUNK_SHIFT(id)); +- +- /* Search empty member if adding or port on deleting */ +- for (i = 0; i < QCA8K_NUM_PORTS_FOR_LAG; i++) { +- ret = regmap_read(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL(id), &val); +- if (ret) +- return ret; +- +- val >>= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i); +- val &= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_MASK; +- +- if (delete) { +- /* If port flagged to be disabled assume this member is +- * empty +- */ +- if (val != QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK) +- continue; +- +- val &= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT_MASK; +- if (val != port) +- continue; +- } else { +- /* If port flagged to be enabled assume this member is +- * already set +- */ +- if (val == QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK) +- continue; +- } +- +- /* We have found the member to add/remove */ +- break; +- } +- +- /* Set port in the correct port mask or disable port if in delete mode */ +- return regmap_update_bits(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL(id), +- QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN(id, i) | +- QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT(id, i), +- !delete << QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i) | +- port << QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i)); +-} +- +-static int +-qca8k_port_lag_join(struct dsa_switch *ds, int port, +- struct net_device *lag, +- struct netdev_lag_upper_info *info) +-{ +- int ret; +- +- if (!qca8k_lag_can_offload(ds, lag, info)) +- return -EOPNOTSUPP; +- +- ret = qca8k_lag_setup_hash(ds, lag, info); +- if (ret) +- return ret; +- +- return qca8k_lag_refresh_portmap(ds, port, lag, false); +-} +- +-static int +-qca8k_port_lag_leave(struct dsa_switch *ds, int port, +- struct net_device *lag) +-{ +- return qca8k_lag_refresh_portmap(ds, port, lag, true); +-} +- +-static void +-qca8k_master_change(struct dsa_switch *ds, const struct net_device *master, +- bool operational) +-{ +- struct dsa_port *dp = master->dsa_ptr; +- struct qca8k_priv *priv = ds->priv; +- +- /* Ethernet MIB/MDIO is only supported for CPU port 0 */ +- if (dp->index != 0) +- return; +- +- mutex_lock(&priv->mgmt_eth_data.mutex); +- mutex_lock(&priv->mib_eth_data.mutex); +- +- priv->mgmt_master = operational ? (struct net_device *)master : NULL; +- +- mutex_unlock(&priv->mib_eth_data.mutex); +- mutex_unlock(&priv->mgmt_eth_data.mutex); +-} +- +-static int qca8k_connect_tag_protocol(struct dsa_switch *ds, +- enum dsa_tag_protocol proto) +-{ +- struct qca_tagger_data *tagger_data; +- +- switch (proto) { +- case DSA_TAG_PROTO_QCA: +- tagger_data = ds->tagger_data; +- +- tagger_data->rw_reg_ack_handler = qca8k_rw_reg_ack_handler; +- tagger_data->mib_autocast_handler = qca8k_mib_autocast_handler; +- +- break; +- default: +- return -EOPNOTSUPP; +- } +- +- return 0; +-} +- +-static const struct dsa_switch_ops qca8k_switch_ops = { +- .get_tag_protocol = qca8k_get_tag_protocol, +- .setup = qca8k_setup, +- .get_strings = qca8k_get_strings, +- .get_ethtool_stats = qca8k_get_ethtool_stats, +- .get_sset_count = qca8k_get_sset_count, +- .set_ageing_time = qca8k_set_ageing_time, +- .get_mac_eee = qca8k_get_mac_eee, +- .set_mac_eee = qca8k_set_mac_eee, +- .port_enable = qca8k_port_enable, +- .port_disable = qca8k_port_disable, +- .port_change_mtu = qca8k_port_change_mtu, +- .port_max_mtu = qca8k_port_max_mtu, +- .port_stp_state_set = qca8k_port_stp_state_set, +- .port_bridge_join = qca8k_port_bridge_join, +- .port_bridge_leave = qca8k_port_bridge_leave, +- .port_fast_age = qca8k_port_fast_age, +- .port_fdb_add = qca8k_port_fdb_add, +- .port_fdb_del = qca8k_port_fdb_del, +- .port_fdb_dump = qca8k_port_fdb_dump, +- .port_mdb_add = qca8k_port_mdb_add, +- .port_mdb_del = qca8k_port_mdb_del, +- .port_mirror_add = qca8k_port_mirror_add, +- .port_mirror_del = qca8k_port_mirror_del, +- .port_vlan_filtering = qca8k_port_vlan_filtering, +- .port_vlan_add = qca8k_port_vlan_add, +- .port_vlan_del = qca8k_port_vlan_del, +- .phylink_validate = qca8k_phylink_validate, +- .phylink_mac_link_state = qca8k_phylink_mac_link_state, +- .phylink_mac_config = qca8k_phylink_mac_config, +- .phylink_mac_link_down = qca8k_phylink_mac_link_down, +- .phylink_mac_link_up = qca8k_phylink_mac_link_up, +- .get_phy_flags = qca8k_get_phy_flags, +- .port_lag_join = qca8k_port_lag_join, +- .port_lag_leave = qca8k_port_lag_leave, +- .master_state_change = qca8k_master_change, +- .connect_tag_protocol = qca8k_connect_tag_protocol, +-}; +- +-static int qca8k_read_switch_id(struct qca8k_priv *priv) +-{ +- const struct qca8k_match_data *data; +- u32 val; +- u8 id; +- int ret; +- +- /* get the switches ID from the compatible */ +- data = of_device_get_match_data(priv->dev); +- if (!data) +- return -ENODEV; +- +- ret = qca8k_read(priv, QCA8K_REG_MASK_CTRL, &val); +- if (ret < 0) +- return -ENODEV; +- +- id = QCA8K_MASK_CTRL_DEVICE_ID(val); +- if (id != data->id) { +- dev_err(priv->dev, "Switch id detected %x but expected %x", id, data->id); +- return -ENODEV; +- } +- +- priv->switch_id = id; +- +- /* Save revision to communicate to the internal PHY driver */ +- priv->switch_revision = QCA8K_MASK_CTRL_REV_ID(val); +- +- return 0; +-} +- +-static int +-qca8k_sw_probe(struct mdio_device *mdiodev) +-{ +- struct qca8k_priv *priv; +- int ret; +- +- /* allocate the private data struct so that we can probe the switches +- * ID register +- */ +- priv = devm_kzalloc(&mdiodev->dev, sizeof(*priv), GFP_KERNEL); +- if (!priv) +- return -ENOMEM; +- +- priv->bus = mdiodev->bus; +- priv->dev = &mdiodev->dev; +- +- priv->reset_gpio = devm_gpiod_get_optional(priv->dev, "reset", +- GPIOD_ASIS); +- if (IS_ERR(priv->reset_gpio)) +- return PTR_ERR(priv->reset_gpio); +- +- if (priv->reset_gpio) { +- gpiod_set_value_cansleep(priv->reset_gpio, 1); +- /* The active low duration must be greater than 10 ms +- * and checkpatch.pl wants 20 ms. +- */ +- msleep(20); +- gpiod_set_value_cansleep(priv->reset_gpio, 0); +- } +- +- /* Start by setting up the register mapping */ +- priv->regmap = devm_regmap_init(&mdiodev->dev, NULL, priv, +- &qca8k_regmap_config); +- if (IS_ERR(priv->regmap)) { +- dev_err(priv->dev, "regmap initialization failed"); +- return PTR_ERR(priv->regmap); +- } +- +- priv->mdio_cache.page = 0xffff; +- priv->mdio_cache.lo = 0xffff; +- priv->mdio_cache.hi = 0xffff; +- +- /* Check the detected switch id */ +- ret = qca8k_read_switch_id(priv); +- if (ret) +- return ret; +- +- priv->ds = devm_kzalloc(&mdiodev->dev, sizeof(*priv->ds), GFP_KERNEL); +- if (!priv->ds) +- return -ENOMEM; +- +- mutex_init(&priv->mgmt_eth_data.mutex); +- init_completion(&priv->mgmt_eth_data.rw_done); +- +- mutex_init(&priv->mib_eth_data.mutex); +- init_completion(&priv->mib_eth_data.rw_done); +- +- priv->ds->dev = &mdiodev->dev; +- priv->ds->num_ports = QCA8K_NUM_PORTS; +- priv->ds->priv = priv; +- priv->ds->ops = &qca8k_switch_ops; +- mutex_init(&priv->reg_mutex); +- dev_set_drvdata(&mdiodev->dev, priv); +- +- return dsa_register_switch(priv->ds); +-} +- +-static void +-qca8k_sw_remove(struct mdio_device *mdiodev) +-{ +- struct qca8k_priv *priv = dev_get_drvdata(&mdiodev->dev); +- int i; +- +- if (!priv) +- return; +- +- for (i = 0; i < QCA8K_NUM_PORTS; i++) +- qca8k_port_set_status(priv, i, 0); +- +- dsa_unregister_switch(priv->ds); +- +- dev_set_drvdata(&mdiodev->dev, NULL); +-} +- +-static void qca8k_sw_shutdown(struct mdio_device *mdiodev) +-{ +- struct qca8k_priv *priv = dev_get_drvdata(&mdiodev->dev); +- +- if (!priv) +- return; +- +- dsa_switch_shutdown(priv->ds); +- +- dev_set_drvdata(&mdiodev->dev, NULL); +-} +- +-#ifdef CONFIG_PM_SLEEP +-static void +-qca8k_set_pm(struct qca8k_priv *priv, int enable) +-{ +- int port; +- +- for (port = 0; port < QCA8K_NUM_PORTS; port++) { +- /* Do not enable on resume if the port was +- * disabled before. +- */ +- if (!(priv->port_enabled_map & BIT(port))) +- continue; +- +- qca8k_port_set_status(priv, port, enable); +- } +-} +- +-static int qca8k_suspend(struct device *dev) +-{ +- struct qca8k_priv *priv = dev_get_drvdata(dev); +- +- qca8k_set_pm(priv, 0); +- +- return dsa_switch_suspend(priv->ds); +-} +- +-static int qca8k_resume(struct device *dev) +-{ +- struct qca8k_priv *priv = dev_get_drvdata(dev); +- +- qca8k_set_pm(priv, 1); +- +- return dsa_switch_resume(priv->ds); +-} +-#endif /* CONFIG_PM_SLEEP */ +- +-static SIMPLE_DEV_PM_OPS(qca8k_pm_ops, +- qca8k_suspend, qca8k_resume); +- +-static const struct qca8k_match_data qca8327 = { +- .id = QCA8K_ID_QCA8327, +- .reduced_package = true, +- .mib_count = QCA8K_QCA832X_MIB_COUNT, +-}; +- +-static const struct qca8k_match_data qca8328 = { +- .id = QCA8K_ID_QCA8327, +- .mib_count = QCA8K_QCA832X_MIB_COUNT, +-}; +- +-static const struct qca8k_match_data qca833x = { +- .id = QCA8K_ID_QCA8337, +- .mib_count = QCA8K_QCA833X_MIB_COUNT, +-}; +- +-static const struct of_device_id qca8k_of_match[] = { +- { .compatible = "qca,qca8327", .data = &qca8327 }, +- { .compatible = "qca,qca8328", .data = &qca8328 }, +- { .compatible = "qca,qca8334", .data = &qca833x }, +- { .compatible = "qca,qca8337", .data = &qca833x }, +- { /* sentinel */ }, +-}; +- +-static struct mdio_driver qca8kmdio_driver = { +- .probe = qca8k_sw_probe, +- .remove = qca8k_sw_remove, +- .shutdown = qca8k_sw_shutdown, +- .mdiodrv.driver = { +- .name = "qca8k", +- .of_match_table = qca8k_of_match, +- .pm = &qca8k_pm_ops, +- }, +-}; +- +-mdio_module_driver(qca8kmdio_driver); +- +-MODULE_AUTHOR("Mathieu Olivari, John Crispin "); +-MODULE_DESCRIPTION("Driver for QCA8K ethernet switch family"); +-MODULE_LICENSE("GPL v2"); +-MODULE_ALIAS("platform:qca8k"); +--- a/drivers/net/dsa/qca8k.h ++++ /dev/null +@@ -1,411 +0,0 @@ +-/* SPDX-License-Identifier: GPL-2.0-only */ +-/* +- * Copyright (C) 2009 Felix Fietkau +- * Copyright (C) 2011-2012 Gabor Juhos +- * Copyright (c) 2015, The Linux Foundation. All rights reserved. +- */ +- +-#ifndef __QCA8K_H +-#define __QCA8K_H +- +-#include +-#include +-#include +-#include +- +-#define QCA8K_ETHERNET_MDIO_PRIORITY 7 +-#define QCA8K_ETHERNET_PHY_PRIORITY 6 +-#define QCA8K_ETHERNET_TIMEOUT 100 +- +-#define QCA8K_NUM_PORTS 7 +-#define QCA8K_NUM_CPU_PORTS 2 +-#define QCA8K_MAX_MTU 9000 +-#define QCA8K_NUM_LAGS 4 +-#define QCA8K_NUM_PORTS_FOR_LAG 4 +- +-#define PHY_ID_QCA8327 0x004dd034 +-#define QCA8K_ID_QCA8327 0x12 +-#define PHY_ID_QCA8337 0x004dd036 +-#define QCA8K_ID_QCA8337 0x13 +- +-#define QCA8K_QCA832X_MIB_COUNT 39 +-#define QCA8K_QCA833X_MIB_COUNT 41 +- +-#define QCA8K_BUSY_WAIT_TIMEOUT 2000 +- +-#define QCA8K_NUM_FDB_RECORDS 2048 +- +-#define QCA8K_PORT_VID_DEF 1 +- +-/* Global control registers */ +-#define QCA8K_REG_MASK_CTRL 0x000 +-#define QCA8K_MASK_CTRL_REV_ID_MASK GENMASK(7, 0) +-#define QCA8K_MASK_CTRL_REV_ID(x) FIELD_GET(QCA8K_MASK_CTRL_REV_ID_MASK, x) +-#define QCA8K_MASK_CTRL_DEVICE_ID_MASK GENMASK(15, 8) +-#define QCA8K_MASK_CTRL_DEVICE_ID(x) FIELD_GET(QCA8K_MASK_CTRL_DEVICE_ID_MASK, x) +-#define QCA8K_REG_PORT0_PAD_CTRL 0x004 +-#define QCA8K_PORT0_PAD_MAC06_EXCHANGE_EN BIT(31) +-#define QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE BIT(19) +-#define QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE BIT(18) +-#define QCA8K_REG_PORT5_PAD_CTRL 0x008 +-#define QCA8K_REG_PORT6_PAD_CTRL 0x00c +-#define QCA8K_PORT_PAD_RGMII_EN BIT(26) +-#define QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK GENMASK(23, 22) +-#define QCA8K_PORT_PAD_RGMII_TX_DELAY(x) FIELD_PREP(QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK, x) +-#define QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK GENMASK(21, 20) +-#define QCA8K_PORT_PAD_RGMII_RX_DELAY(x) FIELD_PREP(QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK, x) +-#define QCA8K_PORT_PAD_RGMII_TX_DELAY_EN BIT(25) +-#define QCA8K_PORT_PAD_RGMII_RX_DELAY_EN BIT(24) +-#define QCA8K_PORT_PAD_SGMII_EN BIT(7) +-#define QCA8K_REG_PWS 0x010 +-#define QCA8K_PWS_POWER_ON_SEL BIT(31) +-/* This reg is only valid for QCA832x and toggle the package +- * type from 176 pin (by default) to 148 pin used on QCA8327 +- */ +-#define QCA8327_PWS_PACKAGE148_EN BIT(30) +-#define QCA8K_PWS_LED_OPEN_EN_CSR BIT(24) +-#define QCA8K_PWS_SERDES_AEN_DIS BIT(7) +-#define QCA8K_REG_MODULE_EN 0x030 +-#define QCA8K_MODULE_EN_MIB BIT(0) +-#define QCA8K_REG_MIB 0x034 +-#define QCA8K_MIB_FUNC GENMASK(26, 24) +-#define QCA8K_MIB_CPU_KEEP BIT(20) +-#define QCA8K_MIB_BUSY BIT(17) +-#define QCA8K_MDIO_MASTER_CTRL 0x3c +-#define QCA8K_MDIO_MASTER_BUSY BIT(31) +-#define QCA8K_MDIO_MASTER_EN BIT(30) +-#define QCA8K_MDIO_MASTER_READ BIT(27) +-#define QCA8K_MDIO_MASTER_WRITE 0 +-#define QCA8K_MDIO_MASTER_SUP_PRE BIT(26) +-#define QCA8K_MDIO_MASTER_PHY_ADDR_MASK GENMASK(25, 21) +-#define QCA8K_MDIO_MASTER_PHY_ADDR(x) FIELD_PREP(QCA8K_MDIO_MASTER_PHY_ADDR_MASK, x) +-#define QCA8K_MDIO_MASTER_REG_ADDR_MASK GENMASK(20, 16) +-#define QCA8K_MDIO_MASTER_REG_ADDR(x) FIELD_PREP(QCA8K_MDIO_MASTER_REG_ADDR_MASK, x) +-#define QCA8K_MDIO_MASTER_DATA_MASK GENMASK(15, 0) +-#define QCA8K_MDIO_MASTER_DATA(x) FIELD_PREP(QCA8K_MDIO_MASTER_DATA_MASK, x) +-#define QCA8K_MDIO_MASTER_MAX_PORTS 5 +-#define QCA8K_MDIO_MASTER_MAX_REG 32 +-#define QCA8K_GOL_MAC_ADDR0 0x60 +-#define QCA8K_GOL_MAC_ADDR1 0x64 +-#define QCA8K_MAX_FRAME_SIZE 0x78 +-#define QCA8K_REG_PORT_STATUS(_i) (0x07c + (_i) * 4) +-#define QCA8K_PORT_STATUS_SPEED GENMASK(1, 0) +-#define QCA8K_PORT_STATUS_SPEED_10 0 +-#define QCA8K_PORT_STATUS_SPEED_100 0x1 +-#define QCA8K_PORT_STATUS_SPEED_1000 0x2 +-#define QCA8K_PORT_STATUS_TXMAC BIT(2) +-#define QCA8K_PORT_STATUS_RXMAC BIT(3) +-#define QCA8K_PORT_STATUS_TXFLOW BIT(4) +-#define QCA8K_PORT_STATUS_RXFLOW BIT(5) +-#define QCA8K_PORT_STATUS_DUPLEX BIT(6) +-#define QCA8K_PORT_STATUS_LINK_UP BIT(8) +-#define QCA8K_PORT_STATUS_LINK_AUTO BIT(9) +-#define QCA8K_PORT_STATUS_LINK_PAUSE BIT(10) +-#define QCA8K_PORT_STATUS_FLOW_AUTO BIT(12) +-#define QCA8K_REG_PORT_HDR_CTRL(_i) (0x9c + (_i * 4)) +-#define QCA8K_PORT_HDR_CTRL_RX_MASK GENMASK(3, 2) +-#define QCA8K_PORT_HDR_CTRL_TX_MASK GENMASK(1, 0) +-#define QCA8K_PORT_HDR_CTRL_ALL 2 +-#define QCA8K_PORT_HDR_CTRL_MGMT 1 +-#define QCA8K_PORT_HDR_CTRL_NONE 0 +-#define QCA8K_REG_SGMII_CTRL 0x0e0 +-#define QCA8K_SGMII_EN_PLL BIT(1) +-#define QCA8K_SGMII_EN_RX BIT(2) +-#define QCA8K_SGMII_EN_TX BIT(3) +-#define QCA8K_SGMII_EN_SD BIT(4) +-#define QCA8K_SGMII_CLK125M_DELAY BIT(7) +-#define QCA8K_SGMII_MODE_CTRL_MASK GENMASK(23, 22) +-#define QCA8K_SGMII_MODE_CTRL(x) FIELD_PREP(QCA8K_SGMII_MODE_CTRL_MASK, x) +-#define QCA8K_SGMII_MODE_CTRL_BASEX QCA8K_SGMII_MODE_CTRL(0x0) +-#define QCA8K_SGMII_MODE_CTRL_PHY QCA8K_SGMII_MODE_CTRL(0x1) +-#define QCA8K_SGMII_MODE_CTRL_MAC QCA8K_SGMII_MODE_CTRL(0x2) +- +-/* MAC_PWR_SEL registers */ +-#define QCA8K_REG_MAC_PWR_SEL 0x0e4 +-#define QCA8K_MAC_PWR_RGMII1_1_8V BIT(18) +-#define QCA8K_MAC_PWR_RGMII0_1_8V BIT(19) +- +-/* EEE control registers */ +-#define QCA8K_REG_EEE_CTRL 0x100 +-#define QCA8K_REG_EEE_CTRL_LPI_EN(_i) ((_i + 1) * 2) +- +-/* TRUNK_HASH_EN registers */ +-#define QCA8K_TRUNK_HASH_EN_CTRL 0x270 +-#define QCA8K_TRUNK_HASH_SIP_EN BIT(3) +-#define QCA8K_TRUNK_HASH_DIP_EN BIT(2) +-#define QCA8K_TRUNK_HASH_SA_EN BIT(1) +-#define QCA8K_TRUNK_HASH_DA_EN BIT(0) +-#define QCA8K_TRUNK_HASH_MASK GENMASK(3, 0) +- +-/* ACL registers */ +-#define QCA8K_REG_PORT_VLAN_CTRL0(_i) (0x420 + (_i * 8)) +-#define QCA8K_PORT_VLAN_CVID_MASK GENMASK(27, 16) +-#define QCA8K_PORT_VLAN_CVID(x) FIELD_PREP(QCA8K_PORT_VLAN_CVID_MASK, x) +-#define QCA8K_PORT_VLAN_SVID_MASK GENMASK(11, 0) +-#define QCA8K_PORT_VLAN_SVID(x) FIELD_PREP(QCA8K_PORT_VLAN_SVID_MASK, x) +-#define QCA8K_REG_PORT_VLAN_CTRL1(_i) (0x424 + (_i * 8)) +-#define QCA8K_REG_IPV4_PRI_BASE_ADDR 0x470 +-#define QCA8K_REG_IPV4_PRI_ADDR_MASK 0x474 +- +-/* Lookup registers */ +-#define QCA8K_REG_ATU_DATA0 0x600 +-#define QCA8K_ATU_ADDR2_MASK GENMASK(31, 24) +-#define QCA8K_ATU_ADDR3_MASK GENMASK(23, 16) +-#define QCA8K_ATU_ADDR4_MASK GENMASK(15, 8) +-#define QCA8K_ATU_ADDR5_MASK GENMASK(7, 0) +-#define QCA8K_REG_ATU_DATA1 0x604 +-#define QCA8K_ATU_PORT_MASK GENMASK(22, 16) +-#define QCA8K_ATU_ADDR0_MASK GENMASK(15, 8) +-#define QCA8K_ATU_ADDR1_MASK GENMASK(7, 0) +-#define QCA8K_REG_ATU_DATA2 0x608 +-#define QCA8K_ATU_VID_MASK GENMASK(19, 8) +-#define QCA8K_ATU_STATUS_MASK GENMASK(3, 0) +-#define QCA8K_ATU_STATUS_STATIC 0xf +-#define QCA8K_REG_ATU_FUNC 0x60c +-#define QCA8K_ATU_FUNC_BUSY BIT(31) +-#define QCA8K_ATU_FUNC_PORT_EN BIT(14) +-#define QCA8K_ATU_FUNC_MULTI_EN BIT(13) +-#define QCA8K_ATU_FUNC_FULL BIT(12) +-#define QCA8K_ATU_FUNC_PORT_MASK GENMASK(11, 8) +-#define QCA8K_REG_VTU_FUNC0 0x610 +-#define QCA8K_VTU_FUNC0_VALID BIT(20) +-#define QCA8K_VTU_FUNC0_IVL_EN BIT(19) +-/* QCA8K_VTU_FUNC0_EG_MODE_MASK GENMASK(17, 4) +- * It does contain VLAN_MODE for each port [5:4] for port0, +- * [7:6] for port1 ... [17:16] for port6. Use virtual port +- * define to handle this. +- */ +-#define QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i) (4 + (_i) * 2) +-#define QCA8K_VTU_FUNC0_EG_MODE_MASK GENMASK(1, 0) +-#define QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(_i) (GENMASK(1, 0) << QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i)) +-#define QCA8K_VTU_FUNC0_EG_MODE_UNMOD FIELD_PREP(QCA8K_VTU_FUNC0_EG_MODE_MASK, 0x0) +-#define QCA8K_VTU_FUNC0_EG_MODE_PORT_UNMOD(_i) (QCA8K_VTU_FUNC0_EG_MODE_UNMOD << QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i)) +-#define QCA8K_VTU_FUNC0_EG_MODE_UNTAG FIELD_PREP(QCA8K_VTU_FUNC0_EG_MODE_MASK, 0x1) +-#define QCA8K_VTU_FUNC0_EG_MODE_PORT_UNTAG(_i) (QCA8K_VTU_FUNC0_EG_MODE_UNTAG << QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i)) +-#define QCA8K_VTU_FUNC0_EG_MODE_TAG FIELD_PREP(QCA8K_VTU_FUNC0_EG_MODE_MASK, 0x2) +-#define QCA8K_VTU_FUNC0_EG_MODE_PORT_TAG(_i) (QCA8K_VTU_FUNC0_EG_MODE_TAG << QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i)) +-#define QCA8K_VTU_FUNC0_EG_MODE_NOT FIELD_PREP(QCA8K_VTU_FUNC0_EG_MODE_MASK, 0x3) +-#define QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(_i) (QCA8K_VTU_FUNC0_EG_MODE_NOT << QCA8K_VTU_FUNC0_EG_MODE_PORT_SHIFT(_i)) +-#define QCA8K_REG_VTU_FUNC1 0x614 +-#define QCA8K_VTU_FUNC1_BUSY BIT(31) +-#define QCA8K_VTU_FUNC1_VID_MASK GENMASK(27, 16) +-#define QCA8K_VTU_FUNC1_FULL BIT(4) +-#define QCA8K_REG_ATU_CTRL 0x618 +-#define QCA8K_ATU_AGE_TIME_MASK GENMASK(15, 0) +-#define QCA8K_ATU_AGE_TIME(x) FIELD_PREP(QCA8K_ATU_AGE_TIME_MASK, (x)) +-#define QCA8K_REG_GLOBAL_FW_CTRL0 0x620 +-#define QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN BIT(10) +-#define QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM GENMASK(7, 4) +-#define QCA8K_REG_GLOBAL_FW_CTRL1 0x624 +-#define QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_MASK GENMASK(30, 24) +-#define QCA8K_GLOBAL_FW_CTRL1_BC_DP_MASK GENMASK(22, 16) +-#define QCA8K_GLOBAL_FW_CTRL1_MC_DP_MASK GENMASK(14, 8) +-#define QCA8K_GLOBAL_FW_CTRL1_UC_DP_MASK GENMASK(6, 0) +-#define QCA8K_PORT_LOOKUP_CTRL(_i) (0x660 + (_i) * 0xc) +-#define QCA8K_PORT_LOOKUP_MEMBER GENMASK(6, 0) +-#define QCA8K_PORT_LOOKUP_VLAN_MODE_MASK GENMASK(9, 8) +-#define QCA8K_PORT_LOOKUP_VLAN_MODE(x) FIELD_PREP(QCA8K_PORT_LOOKUP_VLAN_MODE_MASK, x) +-#define QCA8K_PORT_LOOKUP_VLAN_MODE_NONE QCA8K_PORT_LOOKUP_VLAN_MODE(0x0) +-#define QCA8K_PORT_LOOKUP_VLAN_MODE_FALLBACK QCA8K_PORT_LOOKUP_VLAN_MODE(0x1) +-#define QCA8K_PORT_LOOKUP_VLAN_MODE_CHECK QCA8K_PORT_LOOKUP_VLAN_MODE(0x2) +-#define QCA8K_PORT_LOOKUP_VLAN_MODE_SECURE QCA8K_PORT_LOOKUP_VLAN_MODE(0x3) +-#define QCA8K_PORT_LOOKUP_STATE_MASK GENMASK(18, 16) +-#define QCA8K_PORT_LOOKUP_STATE(x) FIELD_PREP(QCA8K_PORT_LOOKUP_STATE_MASK, x) +-#define QCA8K_PORT_LOOKUP_STATE_DISABLED QCA8K_PORT_LOOKUP_STATE(0x0) +-#define QCA8K_PORT_LOOKUP_STATE_BLOCKING QCA8K_PORT_LOOKUP_STATE(0x1) +-#define QCA8K_PORT_LOOKUP_STATE_LISTENING QCA8K_PORT_LOOKUP_STATE(0x2) +-#define QCA8K_PORT_LOOKUP_STATE_LEARNING QCA8K_PORT_LOOKUP_STATE(0x3) +-#define QCA8K_PORT_LOOKUP_STATE_FORWARD QCA8K_PORT_LOOKUP_STATE(0x4) +-#define QCA8K_PORT_LOOKUP_LEARN BIT(20) +-#define QCA8K_PORT_LOOKUP_ING_MIRROR_EN BIT(25) +- +-#define QCA8K_REG_GOL_TRUNK_CTRL0 0x700 +-/* 4 max trunk first +- * first 6 bit for member bitmap +- * 7th bit is to enable trunk port +- */ +-#define QCA8K_REG_GOL_TRUNK_SHIFT(_i) ((_i) * 8) +-#define QCA8K_REG_GOL_TRUNK_EN_MASK BIT(7) +-#define QCA8K_REG_GOL_TRUNK_EN(_i) (QCA8K_REG_GOL_TRUNK_EN_MASK << QCA8K_REG_GOL_TRUNK_SHIFT(_i)) +-#define QCA8K_REG_GOL_TRUNK_MEMBER_MASK GENMASK(6, 0) +-#define QCA8K_REG_GOL_TRUNK_MEMBER(_i) (QCA8K_REG_GOL_TRUNK_MEMBER_MASK << QCA8K_REG_GOL_TRUNK_SHIFT(_i)) +-/* 0x704 for TRUNK 0-1 --- 0x708 for TRUNK 2-3 */ +-#define QCA8K_REG_GOL_TRUNK_CTRL(_i) (0x704 + (((_i) / 2) * 4)) +-#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_MASK GENMASK(3, 0) +-#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK BIT(3) +-#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT_MASK GENMASK(2, 0) +-#define QCA8K_REG_GOL_TRUNK_ID_SHIFT(_i) (((_i) / 2) * 16) +-#define QCA8K_REG_GOL_MEM_ID_SHIFT(_i) ((_i) * 4) +-/* Complex shift: FIRST shift for port THEN shift for trunk */ +-#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(_i, _j) (QCA8K_REG_GOL_MEM_ID_SHIFT(_j) + QCA8K_REG_GOL_TRUNK_ID_SHIFT(_i)) +-#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN(_i, _j) (QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK << QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(_i, _j)) +-#define QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT(_i, _j) (QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT_MASK << QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(_i, _j)) +- +-#define QCA8K_REG_GLOBAL_FC_THRESH 0x800 +-#define QCA8K_GLOBAL_FC_GOL_XON_THRES_MASK GENMASK(24, 16) +-#define QCA8K_GLOBAL_FC_GOL_XON_THRES(x) FIELD_PREP(QCA8K_GLOBAL_FC_GOL_XON_THRES_MASK, x) +-#define QCA8K_GLOBAL_FC_GOL_XOFF_THRES_MASK GENMASK(8, 0) +-#define QCA8K_GLOBAL_FC_GOL_XOFF_THRES(x) FIELD_PREP(QCA8K_GLOBAL_FC_GOL_XOFF_THRES_MASK, x) +- +-#define QCA8K_REG_PORT_HOL_CTRL0(_i) (0x970 + (_i) * 0x8) +-#define QCA8K_PORT_HOL_CTRL0_EG_PRI0_BUF_MASK GENMASK(3, 0) +-#define QCA8K_PORT_HOL_CTRL0_EG_PRI0(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI0_BUF_MASK, x) +-#define QCA8K_PORT_HOL_CTRL0_EG_PRI1_BUF_MASK GENMASK(7, 4) +-#define QCA8K_PORT_HOL_CTRL0_EG_PRI1(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI1_BUF_MASK, x) +-#define QCA8K_PORT_HOL_CTRL0_EG_PRI2_BUF_MASK GENMASK(11, 8) +-#define QCA8K_PORT_HOL_CTRL0_EG_PRI2(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI2_BUF_MASK, x) +-#define QCA8K_PORT_HOL_CTRL0_EG_PRI3_BUF_MASK GENMASK(15, 12) +-#define QCA8K_PORT_HOL_CTRL0_EG_PRI3(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI3_BUF_MASK, x) +-#define QCA8K_PORT_HOL_CTRL0_EG_PRI4_BUF_MASK GENMASK(19, 16) +-#define QCA8K_PORT_HOL_CTRL0_EG_PRI4(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI4_BUF_MASK, x) +-#define QCA8K_PORT_HOL_CTRL0_EG_PRI5_BUF_MASK GENMASK(23, 20) +-#define QCA8K_PORT_HOL_CTRL0_EG_PRI5(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PRI5_BUF_MASK, x) +-#define QCA8K_PORT_HOL_CTRL0_EG_PORT_BUF_MASK GENMASK(29, 24) +-#define QCA8K_PORT_HOL_CTRL0_EG_PORT(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL0_EG_PORT_BUF_MASK, x) +- +-#define QCA8K_REG_PORT_HOL_CTRL1(_i) (0x974 + (_i) * 0x8) +-#define QCA8K_PORT_HOL_CTRL1_ING_BUF_MASK GENMASK(3, 0) +-#define QCA8K_PORT_HOL_CTRL1_ING(x) FIELD_PREP(QCA8K_PORT_HOL_CTRL1_ING_BUF_MASK, x) +-#define QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN BIT(6) +-#define QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN BIT(7) +-#define QCA8K_PORT_HOL_CTRL1_WRED_EN BIT(8) +-#define QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN BIT(16) +- +-/* Pkt edit registers */ +-#define QCA8K_EGREES_VLAN_PORT_SHIFT(_i) (16 * ((_i) % 2)) +-#define QCA8K_EGREES_VLAN_PORT_MASK(_i) (GENMASK(11, 0) << QCA8K_EGREES_VLAN_PORT_SHIFT(_i)) +-#define QCA8K_EGREES_VLAN_PORT(_i, x) ((x) << QCA8K_EGREES_VLAN_PORT_SHIFT(_i)) +-#define QCA8K_EGRESS_VLAN(x) (0x0c70 + (4 * (x / 2))) +- +-/* L3 registers */ +-#define QCA8K_HROUTER_CONTROL 0xe00 +-#define QCA8K_HROUTER_CONTROL_GLB_LOCKTIME_M GENMASK(17, 16) +-#define QCA8K_HROUTER_CONTROL_GLB_LOCKTIME_S 16 +-#define QCA8K_HROUTER_CONTROL_ARP_AGE_MODE 1 +-#define QCA8K_HROUTER_PBASED_CONTROL1 0xe08 +-#define QCA8K_HROUTER_PBASED_CONTROL2 0xe0c +-#define QCA8K_HNAT_CONTROL 0xe38 +- +-/* MIB registers */ +-#define QCA8K_PORT_MIB_COUNTER(_i) (0x1000 + (_i) * 0x100) +- +-/* QCA specific MII registers */ +-#define MII_ATH_MMD_ADDR 0x0d +-#define MII_ATH_MMD_DATA 0x0e +- +-enum { +- QCA8K_PORT_SPEED_10M = 0, +- QCA8K_PORT_SPEED_100M = 1, +- QCA8K_PORT_SPEED_1000M = 2, +- QCA8K_PORT_SPEED_ERR = 3, +-}; +- +-enum qca8k_fdb_cmd { +- QCA8K_FDB_FLUSH = 1, +- QCA8K_FDB_LOAD = 2, +- QCA8K_FDB_PURGE = 3, +- QCA8K_FDB_FLUSH_PORT = 5, +- QCA8K_FDB_NEXT = 6, +- QCA8K_FDB_SEARCH = 7, +-}; +- +-enum qca8k_vlan_cmd { +- QCA8K_VLAN_FLUSH = 1, +- QCA8K_VLAN_LOAD = 2, +- QCA8K_VLAN_PURGE = 3, +- QCA8K_VLAN_REMOVE_PORT = 4, +- QCA8K_VLAN_NEXT = 5, +- QCA8K_VLAN_READ = 6, +-}; +- +-enum qca8k_mid_cmd { +- QCA8K_MIB_FLUSH = 1, +- QCA8K_MIB_FLUSH_PORT = 2, +- QCA8K_MIB_CAST = 3, +-}; +- +-struct qca8k_match_data { +- u8 id; +- bool reduced_package; +- u8 mib_count; +-}; +- +-enum { +- QCA8K_CPU_PORT0, +- QCA8K_CPU_PORT6, +-}; +- +-struct qca8k_mgmt_eth_data { +- struct completion rw_done; +- struct mutex mutex; /* Enforce one mdio read/write at time */ +- bool ack; +- u32 seq; +- u32 data[4]; +-}; +- +-struct qca8k_mib_eth_data { +- struct completion rw_done; +- struct mutex mutex; /* Process one command at time */ +- refcount_t port_parsed; /* Counter to track parsed port */ +- u8 req_port; +- u64 *data; /* pointer to ethtool data */ +-}; +- +-struct qca8k_ports_config { +- bool sgmii_rx_clk_falling_edge; +- bool sgmii_tx_clk_falling_edge; +- bool sgmii_enable_pll; +- u8 rgmii_rx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */ +- u8 rgmii_tx_delay[QCA8K_NUM_CPU_PORTS]; /* 0: CPU port0, 1: CPU port6 */ +-}; +- +-struct qca8k_mdio_cache { +-/* The 32bit switch registers are accessed indirectly. To achieve this we need +- * to set the page of the register. Track the last page that was set to reduce +- * mdio writes +- */ +- u16 page; +-/* lo and hi can also be cached and from Documentation we can skip one +- * extra mdio write if lo or hi is didn't change. +- */ +- u16 lo; +- u16 hi; +-}; +- +-struct qca8k_priv { +- u8 switch_id; +- u8 switch_revision; +- u8 mirror_rx; +- u8 mirror_tx; +- u8 lag_hash_mode; +- /* Each bit correspond to a port. This switch can support a max of 7 port. +- * Bit 1: port enabled. Bit 0: port disabled. +- */ +- u8 port_enabled_map; +- struct qca8k_ports_config ports_config; +- struct regmap *regmap; +- struct mii_bus *bus; +- struct dsa_switch *ds; +- struct mutex reg_mutex; +- struct device *dev; +- struct gpio_desc *reset_gpio; +- struct net_device *mgmt_master; /* Track if mdio/mib Ethernet is available */ +- struct qca8k_mgmt_eth_data mgmt_eth_data; +- struct qca8k_mib_eth_data mib_eth_data; +- struct qca8k_mdio_cache mdio_cache; +-}; +- +-struct qca8k_mib_desc { +- unsigned int size; +- unsigned int offset; +- const char *name; +-}; +- +-struct qca8k_fdb { +- u16 vid; +- u8 port_mask; +- u8 aging; +- u8 mac[6]; +-}; +- +-#endif /* __QCA8K_H */ diff --git a/target/linux/generic/backport-5.15/771-v6.0-01-net-dsa-qca8k-cache-match-data-to-speed-up-access.patch b/target/linux/generic/backport-5.15/771-v6.0-01-net-dsa-qca8k-cache-match-data-to-speed-up-access.patch new file mode 100644 index 000000000..77fe64632 --- /dev/null +++ b/target/linux/generic/backport-5.15/771-v6.0-01-net-dsa-qca8k-cache-match-data-to-speed-up-access.patch @@ -0,0 +1,157 @@ +From 3bb0844e7bcd0fb0bcfab6202b5edd349ef5250a Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 27 Jul 2022 13:35:10 +0200 +Subject: [PATCH 01/14] net: dsa: qca8k: cache match data to speed up access + +Using of_device_get_match_data is expensive. Cache match data to speed +up access and rework user of match data to use the new cached value. + +Signed-off-by: Christian Marangi +Reviewed-by: Vladimir Oltean +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/qca/qca8k.c | 35 +++++++++++------------------------ + drivers/net/dsa/qca/qca8k.h | 1 + + 2 files changed, 12 insertions(+), 24 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k.c ++++ b/drivers/net/dsa/qca/qca8k.c +@@ -1462,8 +1462,8 @@ static int qca8k_find_cpu_port(struct ds + static int + qca8k_setup_of_pws_reg(struct qca8k_priv *priv) + { ++ const struct qca8k_match_data *data = priv->info; + struct device_node *node = priv->dev->of_node; +- const struct qca8k_match_data *data; + u32 val = 0; + int ret; + +@@ -1472,8 +1472,6 @@ qca8k_setup_of_pws_reg(struct qca8k_priv + * Should be applied by default but we set this just to make sure. + */ + if (priv->switch_id == QCA8K_ID_QCA8327) { +- data = of_device_get_match_data(priv->dev); +- + /* Set the correct package of 148 pin for QCA8327 */ + if (data->reduced_package) + val |= QCA8327_PWS_PACKAGE148_EN; +@@ -2146,23 +2144,19 @@ qca8k_phylink_mac_link_up(struct dsa_swi + static void + qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data) + { +- const struct qca8k_match_data *match_data; + struct qca8k_priv *priv = ds->priv; + int i; + + if (stringset != ETH_SS_STATS) + return; + +- match_data = of_device_get_match_data(priv->dev); +- +- for (i = 0; i < match_data->mib_count; i++) ++ for (i = 0; i < priv->info->mib_count; i++) + strncpy(data + i * ETH_GSTRING_LEN, ar8327_mib[i].name, + ETH_GSTRING_LEN); + } + + static void qca8k_mib_autocast_handler(struct dsa_switch *ds, struct sk_buff *skb) + { +- const struct qca8k_match_data *match_data; + struct qca8k_mib_eth_data *mib_eth_data; + struct qca8k_priv *priv = ds->priv; + const struct qca8k_mib_desc *mib; +@@ -2181,10 +2175,9 @@ static void qca8k_mib_autocast_handler(s + if (port != mib_eth_data->req_port) + goto exit; + +- match_data = device_get_match_data(priv->dev); + data = mib_eth_data->data; + +- for (i = 0; i < match_data->mib_count; i++) { ++ for (i = 0; i < priv->info->mib_count; i++) { + mib = &ar8327_mib[i]; + + /* First 3 mib are present in the skb head */ +@@ -2256,7 +2249,6 @@ qca8k_get_ethtool_stats(struct dsa_switc + uint64_t *data) + { + struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- const struct qca8k_match_data *match_data; + const struct qca8k_mib_desc *mib; + u32 reg, i, val; + u32 hi = 0; +@@ -2266,9 +2258,7 @@ qca8k_get_ethtool_stats(struct dsa_switc + qca8k_get_ethtool_stats_eth(ds, port, data) > 0) + return; + +- match_data = of_device_get_match_data(priv->dev); +- +- for (i = 0; i < match_data->mib_count; i++) { ++ for (i = 0; i < priv->info->mib_count; i++) { + mib = &ar8327_mib[i]; + reg = QCA8K_PORT_MIB_COUNTER(port) + mib->offset; + +@@ -2291,15 +2281,12 @@ qca8k_get_ethtool_stats(struct dsa_switc + static int + qca8k_get_sset_count(struct dsa_switch *ds, int port, int sset) + { +- const struct qca8k_match_data *match_data; + struct qca8k_priv *priv = ds->priv; + + if (sset != ETH_SS_STATS) + return 0; + +- match_data = of_device_get_match_data(priv->dev); +- +- return match_data->mib_count; ++ return priv->info->mib_count; + } + + static int +@@ -3037,14 +3024,11 @@ static const struct dsa_switch_ops qca8k + + static int qca8k_read_switch_id(struct qca8k_priv *priv) + { +- const struct qca8k_match_data *data; + u32 val; + u8 id; + int ret; + +- /* get the switches ID from the compatible */ +- data = of_device_get_match_data(priv->dev); +- if (!data) ++ if (!priv->info) + return -ENODEV; + + ret = qca8k_read(priv, QCA8K_REG_MASK_CTRL, &val); +@@ -3052,8 +3036,10 @@ static int qca8k_read_switch_id(struct q + return -ENODEV; + + id = QCA8K_MASK_CTRL_DEVICE_ID(val); +- if (id != data->id) { +- dev_err(priv->dev, "Switch id detected %x but expected %x", id, data->id); ++ if (id != priv->info->id) { ++ dev_err(priv->dev, ++ "Switch id detected %x but expected %x", ++ id, priv->info->id); + return -ENODEV; + } + +@@ -3078,6 +3064,7 @@ qca8k_sw_probe(struct mdio_device *mdiod + if (!priv) + return -ENOMEM; + ++ priv->info = of_device_get_match_data(priv->dev); + priv->bus = mdiodev->bus; + priv->dev = &mdiodev->dev; + +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -393,6 +393,7 @@ struct qca8k_priv { + struct qca8k_mgmt_eth_data mgmt_eth_data; + struct qca8k_mib_eth_data mib_eth_data; + struct qca8k_mdio_cache mdio_cache; ++ const struct qca8k_match_data *info; + }; + + struct qca8k_mib_desc { diff --git a/target/linux/generic/backport-5.15/771-v6.0-02-net-dsa-qca8k-make-mib-autocast-feature-optional.patch b/target/linux/generic/backport-5.15/771-v6.0-02-net-dsa-qca8k-make-mib-autocast-feature-optional.patch new file mode 100644 index 000000000..5b2dce4c5 --- /dev/null +++ b/target/linux/generic/backport-5.15/771-v6.0-02-net-dsa-qca8k-make-mib-autocast-feature-optional.patch @@ -0,0 +1,77 @@ +From 533c64bca62a8654f00698bc893f639013e38c7b Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 27 Jul 2022 13:35:11 +0200 +Subject: [PATCH 02/14] net: dsa: qca8k: make mib autocast feature optional + +Some switch may not support mib autocast feature and require the legacy +way of reading the regs directly. +Make the mib autocast feature optional and permit to declare support for +it using match_data struct in a dedicated qca8k_info_ops struct. + +Signed-off-by: Christian Marangi +Reviewed-by: Vladimir Oltean +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/qca/qca8k.c | 11 +++++++++-- + drivers/net/dsa/qca/qca8k.h | 5 +++++ + 2 files changed, 14 insertions(+), 2 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k.c ++++ b/drivers/net/dsa/qca/qca8k.c +@@ -2254,8 +2254,8 @@ qca8k_get_ethtool_stats(struct dsa_switc + u32 hi = 0; + int ret; + +- if (priv->mgmt_master && +- qca8k_get_ethtool_stats_eth(ds, port, data) > 0) ++ if (priv->mgmt_master && priv->info->ops->autocast_mib && ++ priv->info->ops->autocast_mib(ds, port, data) > 0) + return; + + for (i = 0; i < priv->info->mib_count; i++) { +@@ -3187,20 +3187,27 @@ static int qca8k_resume(struct device *d + static SIMPLE_DEV_PM_OPS(qca8k_pm_ops, + qca8k_suspend, qca8k_resume); + ++static const struct qca8k_info_ops qca8xxx_ops = { ++ .autocast_mib = qca8k_get_ethtool_stats_eth, ++}; ++ + static const struct qca8k_match_data qca8327 = { + .id = QCA8K_ID_QCA8327, + .reduced_package = true, + .mib_count = QCA8K_QCA832X_MIB_COUNT, ++ .ops = &qca8xxx_ops, + }; + + static const struct qca8k_match_data qca8328 = { + .id = QCA8K_ID_QCA8327, + .mib_count = QCA8K_QCA832X_MIB_COUNT, ++ .ops = &qca8xxx_ops, + }; + + static const struct qca8k_match_data qca833x = { + .id = QCA8K_ID_QCA8337, + .mib_count = QCA8K_QCA833X_MIB_COUNT, ++ .ops = &qca8xxx_ops, + }; + + static const struct of_device_id qca8k_of_match[] = { +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -324,10 +324,15 @@ enum qca8k_mid_cmd { + QCA8K_MIB_CAST = 3, + }; + ++struct qca8k_info_ops { ++ int (*autocast_mib)(struct dsa_switch *ds, int port, u64 *data); ++}; ++ + struct qca8k_match_data { + u8 id; + bool reduced_package; + u8 mib_count; ++ const struct qca8k_info_ops *ops; + }; + + enum { diff --git a/target/linux/generic/backport-5.15/771-v6.0-03-net-dsa-qca8k-move-mib-struct-to-common-code.patch b/target/linux/generic/backport-5.15/771-v6.0-03-net-dsa-qca8k-move-mib-struct-to-common-code.patch new file mode 100644 index 000000000..afa466693 --- /dev/null +++ b/target/linux/generic/backport-5.15/771-v6.0-03-net-dsa-qca8k-move-mib-struct-to-common-code.patch @@ -0,0 +1,6532 @@ +From 027152b830434e3632ad5dd678cc5d4740358dbb Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 27 Jul 2022 13:35:12 +0200 +Subject: [PATCH 03/14] net: dsa: qca8k: move mib struct to common code + +The same MIB struct is used by drivers based on qca8k family switch. Move +it to common code to make it accessible also by other drivers. + +Signed-off-by: Christian Marangi +Reviewed-by: Vladimir Oltean +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/qca/Makefile | 1 + + drivers/net/dsa/qca/{qca8k.c => qca8k-8xxx.c} | 51 --------------- + drivers/net/dsa/qca/qca8k-common.c | 63 +++++++++++++++++++ + drivers/net/dsa/qca/qca8k.h | 3 + + 4 files changed, 67 insertions(+), 51 deletions(-) + rename drivers/net/dsa/qca/{qca8k.c => qca8k-8xxx.c} (98%) + create mode 100644 drivers/net/dsa/qca/qca8k-common.c + +--- a/drivers/net/dsa/qca/Makefile ++++ b/drivers/net/dsa/qca/Makefile +@@ -1,3 +1,4 @@ + # SPDX-License-Identifier: GPL-2.0-only + obj-$(CONFIG_NET_DSA_AR9331) += ar9331.o + obj-$(CONFIG_NET_DSA_QCA8K) += qca8k.o ++qca8k-y += qca8k-common.o qca8k-8xxx.o +--- a/drivers/net/dsa/qca/qca8k.c ++++ /dev/null +@@ -1,3237 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-/* +- * Copyright (C) 2009 Felix Fietkau +- * Copyright (C) 2011-2012 Gabor Juhos +- * Copyright (c) 2015, 2019, The Linux Foundation. All rights reserved. +- * Copyright (c) 2016 John Crispin +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- +-#include "qca8k.h" +- +-#define MIB_DESC(_s, _o, _n) \ +- { \ +- .size = (_s), \ +- .offset = (_o), \ +- .name = (_n), \ +- } +- +-static const struct qca8k_mib_desc ar8327_mib[] = { +- MIB_DESC(1, 0x00, "RxBroad"), +- MIB_DESC(1, 0x04, "RxPause"), +- MIB_DESC(1, 0x08, "RxMulti"), +- MIB_DESC(1, 0x0c, "RxFcsErr"), +- MIB_DESC(1, 0x10, "RxAlignErr"), +- MIB_DESC(1, 0x14, "RxRunt"), +- MIB_DESC(1, 0x18, "RxFragment"), +- MIB_DESC(1, 0x1c, "Rx64Byte"), +- MIB_DESC(1, 0x20, "Rx128Byte"), +- MIB_DESC(1, 0x24, "Rx256Byte"), +- MIB_DESC(1, 0x28, "Rx512Byte"), +- MIB_DESC(1, 0x2c, "Rx1024Byte"), +- MIB_DESC(1, 0x30, "Rx1518Byte"), +- MIB_DESC(1, 0x34, "RxMaxByte"), +- MIB_DESC(1, 0x38, "RxTooLong"), +- MIB_DESC(2, 0x3c, "RxGoodByte"), +- MIB_DESC(2, 0x44, "RxBadByte"), +- MIB_DESC(1, 0x4c, "RxOverFlow"), +- MIB_DESC(1, 0x50, "Filtered"), +- MIB_DESC(1, 0x54, "TxBroad"), +- MIB_DESC(1, 0x58, "TxPause"), +- MIB_DESC(1, 0x5c, "TxMulti"), +- MIB_DESC(1, 0x60, "TxUnderRun"), +- MIB_DESC(1, 0x64, "Tx64Byte"), +- MIB_DESC(1, 0x68, "Tx128Byte"), +- MIB_DESC(1, 0x6c, "Tx256Byte"), +- MIB_DESC(1, 0x70, "Tx512Byte"), +- MIB_DESC(1, 0x74, "Tx1024Byte"), +- MIB_DESC(1, 0x78, "Tx1518Byte"), +- MIB_DESC(1, 0x7c, "TxMaxByte"), +- MIB_DESC(1, 0x80, "TxOverSize"), +- MIB_DESC(2, 0x84, "TxByte"), +- MIB_DESC(1, 0x8c, "TxCollision"), +- MIB_DESC(1, 0x90, "TxAbortCol"), +- MIB_DESC(1, 0x94, "TxMultiCol"), +- MIB_DESC(1, 0x98, "TxSingleCol"), +- MIB_DESC(1, 0x9c, "TxExcDefer"), +- MIB_DESC(1, 0xa0, "TxDefer"), +- MIB_DESC(1, 0xa4, "TxLateCol"), +- MIB_DESC(1, 0xa8, "RXUnicast"), +- MIB_DESC(1, 0xac, "TXUnicast"), +-}; +- +-static void +-qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page) +-{ +- regaddr >>= 1; +- *r1 = regaddr & 0x1e; +- +- regaddr >>= 5; +- *r2 = regaddr & 0x7; +- +- regaddr >>= 3; +- *page = regaddr & 0x3ff; +-} +- +-static int +-qca8k_set_lo(struct qca8k_priv *priv, int phy_id, u32 regnum, u16 lo) +-{ +- u16 *cached_lo = &priv->mdio_cache.lo; +- struct mii_bus *bus = priv->bus; +- int ret; +- +- if (lo == *cached_lo) +- return 0; +- +- ret = bus->write(bus, phy_id, regnum, lo); +- if (ret < 0) +- dev_err_ratelimited(&bus->dev, +- "failed to write qca8k 32bit lo register\n"); +- +- *cached_lo = lo; +- return 0; +-} +- +-static int +-qca8k_set_hi(struct qca8k_priv *priv, int phy_id, u32 regnum, u16 hi) +-{ +- u16 *cached_hi = &priv->mdio_cache.hi; +- struct mii_bus *bus = priv->bus; +- int ret; +- +- if (hi == *cached_hi) +- return 0; +- +- ret = bus->write(bus, phy_id, regnum, hi); +- if (ret < 0) +- dev_err_ratelimited(&bus->dev, +- "failed to write qca8k 32bit hi register\n"); +- +- *cached_hi = hi; +- return 0; +-} +- +-static int +-qca8k_mii_read32(struct mii_bus *bus, int phy_id, u32 regnum, u32 *val) +-{ +- int ret; +- +- ret = bus->read(bus, phy_id, regnum); +- if (ret >= 0) { +- *val = ret; +- ret = bus->read(bus, phy_id, regnum + 1); +- *val |= ret << 16; +- } +- +- if (ret < 0) { +- dev_err_ratelimited(&bus->dev, +- "failed to read qca8k 32bit register\n"); +- *val = 0; +- return ret; +- } +- +- return 0; +-} +- +-static void +-qca8k_mii_write32(struct qca8k_priv *priv, int phy_id, u32 regnum, u32 val) +-{ +- u16 lo, hi; +- int ret; +- +- lo = val & 0xffff; +- hi = (u16)(val >> 16); +- +- ret = qca8k_set_lo(priv, phy_id, regnum, lo); +- if (ret >= 0) +- ret = qca8k_set_hi(priv, phy_id, regnum + 1, hi); +-} +- +-static int +-qca8k_set_page(struct qca8k_priv *priv, u16 page) +-{ +- u16 *cached_page = &priv->mdio_cache.page; +- struct mii_bus *bus = priv->bus; +- int ret; +- +- if (page == *cached_page) +- return 0; +- +- ret = bus->write(bus, 0x18, 0, page); +- if (ret < 0) { +- dev_err_ratelimited(&bus->dev, +- "failed to set qca8k page\n"); +- return ret; +- } +- +- *cached_page = page; +- usleep_range(1000, 2000); +- return 0; +-} +- +-static int +-qca8k_read(struct qca8k_priv *priv, u32 reg, u32 *val) +-{ +- return regmap_read(priv->regmap, reg, val); +-} +- +-static int +-qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val) +-{ +- return regmap_write(priv->regmap, reg, val); +-} +- +-static int +-qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val) +-{ +- return regmap_update_bits(priv->regmap, reg, mask, write_val); +-} +- +-static void qca8k_rw_reg_ack_handler(struct dsa_switch *ds, struct sk_buff *skb) +-{ +- struct qca8k_mgmt_eth_data *mgmt_eth_data; +- struct qca8k_priv *priv = ds->priv; +- struct qca_mgmt_ethhdr *mgmt_ethhdr; +- u8 len, cmd; +- +- mgmt_ethhdr = (struct qca_mgmt_ethhdr *)skb_mac_header(skb); +- mgmt_eth_data = &priv->mgmt_eth_data; +- +- cmd = FIELD_GET(QCA_HDR_MGMT_CMD, mgmt_ethhdr->command); +- len = FIELD_GET(QCA_HDR_MGMT_LENGTH, mgmt_ethhdr->command); +- +- /* Make sure the seq match the requested packet */ +- if (mgmt_ethhdr->seq == mgmt_eth_data->seq) +- mgmt_eth_data->ack = true; +- +- if (cmd == MDIO_READ) { +- mgmt_eth_data->data[0] = mgmt_ethhdr->mdio_data; +- +- /* Get the rest of the 12 byte of data. +- * The read/write function will extract the requested data. +- */ +- if (len > QCA_HDR_MGMT_DATA1_LEN) +- memcpy(mgmt_eth_data->data + 1, skb->data, +- QCA_HDR_MGMT_DATA2_LEN); +- } +- +- complete(&mgmt_eth_data->rw_done); +-} +- +-static struct sk_buff *qca8k_alloc_mdio_header(enum mdio_cmd cmd, u32 reg, u32 *val, +- int priority, unsigned int len) +-{ +- struct qca_mgmt_ethhdr *mgmt_ethhdr; +- unsigned int real_len; +- struct sk_buff *skb; +- u32 *data2; +- u16 hdr; +- +- skb = dev_alloc_skb(QCA_HDR_MGMT_PKT_LEN); +- if (!skb) +- return NULL; +- +- /* Max value for len reg is 15 (0xf) but the switch actually return 16 byte +- * Actually for some reason the steps are: +- * 0: nothing +- * 1-4: first 4 byte +- * 5-6: first 12 byte +- * 7-15: all 16 byte +- */ +- if (len == 16) +- real_len = 15; +- else +- real_len = len; +- +- skb_reset_mac_header(skb); +- skb_set_network_header(skb, skb->len); +- +- mgmt_ethhdr = skb_push(skb, QCA_HDR_MGMT_HEADER_LEN + QCA_HDR_LEN); +- +- hdr = FIELD_PREP(QCA_HDR_XMIT_VERSION, QCA_HDR_VERSION); +- hdr |= FIELD_PREP(QCA_HDR_XMIT_PRIORITY, priority); +- hdr |= QCA_HDR_XMIT_FROM_CPU; +- hdr |= FIELD_PREP(QCA_HDR_XMIT_DP_BIT, BIT(0)); +- hdr |= FIELD_PREP(QCA_HDR_XMIT_CONTROL, QCA_HDR_XMIT_TYPE_RW_REG); +- +- mgmt_ethhdr->command = FIELD_PREP(QCA_HDR_MGMT_ADDR, reg); +- mgmt_ethhdr->command |= FIELD_PREP(QCA_HDR_MGMT_LENGTH, real_len); +- mgmt_ethhdr->command |= FIELD_PREP(QCA_HDR_MGMT_CMD, cmd); +- mgmt_ethhdr->command |= FIELD_PREP(QCA_HDR_MGMT_CHECK_CODE, +- QCA_HDR_MGMT_CHECK_CODE_VAL); +- +- if (cmd == MDIO_WRITE) +- mgmt_ethhdr->mdio_data = *val; +- +- mgmt_ethhdr->hdr = htons(hdr); +- +- data2 = skb_put_zero(skb, QCA_HDR_MGMT_DATA2_LEN + QCA_HDR_MGMT_PADDING_LEN); +- if (cmd == MDIO_WRITE && len > QCA_HDR_MGMT_DATA1_LEN) +- memcpy(data2, val + 1, len - QCA_HDR_MGMT_DATA1_LEN); +- +- return skb; +-} +- +-static void qca8k_mdio_header_fill_seq_num(struct sk_buff *skb, u32 seq_num) +-{ +- struct qca_mgmt_ethhdr *mgmt_ethhdr; +- +- mgmt_ethhdr = (struct qca_mgmt_ethhdr *)skb->data; +- mgmt_ethhdr->seq = FIELD_PREP(QCA_HDR_MGMT_SEQ_NUM, seq_num); +-} +- +-static int qca8k_read_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) +-{ +- struct qca8k_mgmt_eth_data *mgmt_eth_data = &priv->mgmt_eth_data; +- struct sk_buff *skb; +- bool ack; +- int ret; +- +- skb = qca8k_alloc_mdio_header(MDIO_READ, reg, NULL, +- QCA8K_ETHERNET_MDIO_PRIORITY, len); +- if (!skb) +- return -ENOMEM; +- +- mutex_lock(&mgmt_eth_data->mutex); +- +- /* Check mgmt_master if is operational */ +- if (!priv->mgmt_master) { +- kfree_skb(skb); +- mutex_unlock(&mgmt_eth_data->mutex); +- return -EINVAL; +- } +- +- skb->dev = priv->mgmt_master; +- +- reinit_completion(&mgmt_eth_data->rw_done); +- +- /* Increment seq_num and set it in the mdio pkt */ +- mgmt_eth_data->seq++; +- qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); +- mgmt_eth_data->ack = false; +- +- dev_queue_xmit(skb); +- +- ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, +- msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT)); +- +- *val = mgmt_eth_data->data[0]; +- if (len > QCA_HDR_MGMT_DATA1_LEN) +- memcpy(val + 1, mgmt_eth_data->data + 1, len - QCA_HDR_MGMT_DATA1_LEN); +- +- ack = mgmt_eth_data->ack; +- +- mutex_unlock(&mgmt_eth_data->mutex); +- +- if (ret <= 0) +- return -ETIMEDOUT; +- +- if (!ack) +- return -EINVAL; +- +- return 0; +-} +- +-static int qca8k_write_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) +-{ +- struct qca8k_mgmt_eth_data *mgmt_eth_data = &priv->mgmt_eth_data; +- struct sk_buff *skb; +- bool ack; +- int ret; +- +- skb = qca8k_alloc_mdio_header(MDIO_WRITE, reg, val, +- QCA8K_ETHERNET_MDIO_PRIORITY, len); +- if (!skb) +- return -ENOMEM; +- +- mutex_lock(&mgmt_eth_data->mutex); +- +- /* Check mgmt_master if is operational */ +- if (!priv->mgmt_master) { +- kfree_skb(skb); +- mutex_unlock(&mgmt_eth_data->mutex); +- return -EINVAL; +- } +- +- skb->dev = priv->mgmt_master; +- +- reinit_completion(&mgmt_eth_data->rw_done); +- +- /* Increment seq_num and set it in the mdio pkt */ +- mgmt_eth_data->seq++; +- qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); +- mgmt_eth_data->ack = false; +- +- dev_queue_xmit(skb); +- +- ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, +- msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT)); +- +- ack = mgmt_eth_data->ack; +- +- mutex_unlock(&mgmt_eth_data->mutex); +- +- if (ret <= 0) +- return -ETIMEDOUT; +- +- if (!ack) +- return -EINVAL; +- +- return 0; +-} +- +-static int +-qca8k_regmap_update_bits_eth(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val) +-{ +- u32 val = 0; +- int ret; +- +- ret = qca8k_read_eth(priv, reg, &val, sizeof(val)); +- if (ret) +- return ret; +- +- val &= ~mask; +- val |= write_val; +- +- return qca8k_write_eth(priv, reg, &val, sizeof(val)); +-} +- +-static int +-qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len) +-{ +- int i, count = len / sizeof(u32), ret; +- +- if (priv->mgmt_master && !qca8k_read_eth(priv, reg, val, len)) +- return 0; +- +- for (i = 0; i < count; i++) { +- ret = regmap_read(priv->regmap, reg + (i * 4), val + i); +- if (ret < 0) +- return ret; +- } +- +- return 0; +-} +- +-static int +-qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len) +-{ +- int i, count = len / sizeof(u32), ret; +- u32 tmp; +- +- if (priv->mgmt_master && !qca8k_write_eth(priv, reg, val, len)) +- return 0; +- +- for (i = 0; i < count; i++) { +- tmp = val[i]; +- +- ret = regmap_write(priv->regmap, reg + (i * 4), tmp); +- if (ret < 0) +- return ret; +- } +- +- return 0; +-} +- +-static int +-qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ctx; +- struct mii_bus *bus = priv->bus; +- u16 r1, r2, page; +- int ret; +- +- if (!qca8k_read_eth(priv, reg, val, sizeof(*val))) +- return 0; +- +- qca8k_split_addr(reg, &r1, &r2, &page); +- +- mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); +- +- ret = qca8k_set_page(priv, page); +- if (ret < 0) +- goto exit; +- +- ret = qca8k_mii_read32(bus, 0x10 | r2, r1, val); +- +-exit: +- mutex_unlock(&bus->mdio_lock); +- return ret; +-} +- +-static int +-qca8k_regmap_write(void *ctx, uint32_t reg, uint32_t val) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ctx; +- struct mii_bus *bus = priv->bus; +- u16 r1, r2, page; +- int ret; +- +- if (!qca8k_write_eth(priv, reg, &val, sizeof(val))) +- return 0; +- +- qca8k_split_addr(reg, &r1, &r2, &page); +- +- mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); +- +- ret = qca8k_set_page(priv, page); +- if (ret < 0) +- goto exit; +- +- qca8k_mii_write32(priv, 0x10 | r2, r1, val); +- +-exit: +- mutex_unlock(&bus->mdio_lock); +- return ret; +-} +- +-static int +-qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask, uint32_t write_val) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ctx; +- struct mii_bus *bus = priv->bus; +- u16 r1, r2, page; +- u32 val; +- int ret; +- +- if (!qca8k_regmap_update_bits_eth(priv, reg, mask, write_val)) +- return 0; +- +- qca8k_split_addr(reg, &r1, &r2, &page); +- +- mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); +- +- ret = qca8k_set_page(priv, page); +- if (ret < 0) +- goto exit; +- +- ret = qca8k_mii_read32(bus, 0x10 | r2, r1, &val); +- if (ret < 0) +- goto exit; +- +- val &= ~mask; +- val |= write_val; +- qca8k_mii_write32(priv, 0x10 | r2, r1, val); +- +-exit: +- mutex_unlock(&bus->mdio_lock); +- +- return ret; +-} +- +-static const struct regmap_range qca8k_readable_ranges[] = { +- regmap_reg_range(0x0000, 0x00e4), /* Global control */ +- regmap_reg_range(0x0100, 0x0168), /* EEE control */ +- regmap_reg_range(0x0200, 0x0270), /* Parser control */ +- regmap_reg_range(0x0400, 0x0454), /* ACL */ +- regmap_reg_range(0x0600, 0x0718), /* Lookup */ +- regmap_reg_range(0x0800, 0x0b70), /* QM */ +- regmap_reg_range(0x0c00, 0x0c80), /* PKT */ +- regmap_reg_range(0x0e00, 0x0e98), /* L3 */ +- regmap_reg_range(0x1000, 0x10ac), /* MIB - Port0 */ +- regmap_reg_range(0x1100, 0x11ac), /* MIB - Port1 */ +- regmap_reg_range(0x1200, 0x12ac), /* MIB - Port2 */ +- regmap_reg_range(0x1300, 0x13ac), /* MIB - Port3 */ +- regmap_reg_range(0x1400, 0x14ac), /* MIB - Port4 */ +- regmap_reg_range(0x1500, 0x15ac), /* MIB - Port5 */ +- regmap_reg_range(0x1600, 0x16ac), /* MIB - Port6 */ +- +-}; +- +-static const struct regmap_access_table qca8k_readable_table = { +- .yes_ranges = qca8k_readable_ranges, +- .n_yes_ranges = ARRAY_SIZE(qca8k_readable_ranges), +-}; +- +-static struct regmap_config qca8k_regmap_config = { +- .reg_bits = 16, +- .val_bits = 32, +- .reg_stride = 4, +- .max_register = 0x16ac, /* end MIB - Port6 range */ +- .reg_read = qca8k_regmap_read, +- .reg_write = qca8k_regmap_write, +- .reg_update_bits = qca8k_regmap_update_bits, +- .rd_table = &qca8k_readable_table, +- .disable_locking = true, /* Locking is handled by qca8k read/write */ +- .cache_type = REGCACHE_NONE, /* Explicitly disable CACHE */ +-}; +- +-static int +-qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask) +-{ +- u32 val; +- +- return regmap_read_poll_timeout(priv->regmap, reg, val, !(val & mask), 0, +- QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC); +-} +- +-static int +-qca8k_fdb_read(struct qca8k_priv *priv, struct qca8k_fdb *fdb) +-{ +- u32 reg[3]; +- int ret; +- +- /* load the ARL table into an array */ +- ret = qca8k_bulk_read(priv, QCA8K_REG_ATU_DATA0, reg, sizeof(reg)); +- if (ret) +- return ret; +- +- /* vid - 83:72 */ +- fdb->vid = FIELD_GET(QCA8K_ATU_VID_MASK, reg[2]); +- /* aging - 67:64 */ +- fdb->aging = FIELD_GET(QCA8K_ATU_STATUS_MASK, reg[2]); +- /* portmask - 54:48 */ +- fdb->port_mask = FIELD_GET(QCA8K_ATU_PORT_MASK, reg[1]); +- /* mac - 47:0 */ +- fdb->mac[0] = FIELD_GET(QCA8K_ATU_ADDR0_MASK, reg[1]); +- fdb->mac[1] = FIELD_GET(QCA8K_ATU_ADDR1_MASK, reg[1]); +- fdb->mac[2] = FIELD_GET(QCA8K_ATU_ADDR2_MASK, reg[0]); +- fdb->mac[3] = FIELD_GET(QCA8K_ATU_ADDR3_MASK, reg[0]); +- fdb->mac[4] = FIELD_GET(QCA8K_ATU_ADDR4_MASK, reg[0]); +- fdb->mac[5] = FIELD_GET(QCA8K_ATU_ADDR5_MASK, reg[0]); +- +- return 0; +-} +- +-static void +-qca8k_fdb_write(struct qca8k_priv *priv, u16 vid, u8 port_mask, const u8 *mac, +- u8 aging) +-{ +- u32 reg[3] = { 0 }; +- +- /* vid - 83:72 */ +- reg[2] = FIELD_PREP(QCA8K_ATU_VID_MASK, vid); +- /* aging - 67:64 */ +- reg[2] |= FIELD_PREP(QCA8K_ATU_STATUS_MASK, aging); +- /* portmask - 54:48 */ +- reg[1] = FIELD_PREP(QCA8K_ATU_PORT_MASK, port_mask); +- /* mac - 47:0 */ +- reg[1] |= FIELD_PREP(QCA8K_ATU_ADDR0_MASK, mac[0]); +- reg[1] |= FIELD_PREP(QCA8K_ATU_ADDR1_MASK, mac[1]); +- reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR2_MASK, mac[2]); +- reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR3_MASK, mac[3]); +- reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR4_MASK, mac[4]); +- reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR5_MASK, mac[5]); +- +- /* load the array into the ARL table */ +- qca8k_bulk_write(priv, QCA8K_REG_ATU_DATA0, reg, sizeof(reg)); +-} +- +-static int +-qca8k_fdb_access(struct qca8k_priv *priv, enum qca8k_fdb_cmd cmd, int port) +-{ +- u32 reg; +- int ret; +- +- /* Set the command and FDB index */ +- reg = QCA8K_ATU_FUNC_BUSY; +- reg |= cmd; +- if (port >= 0) { +- reg |= QCA8K_ATU_FUNC_PORT_EN; +- reg |= FIELD_PREP(QCA8K_ATU_FUNC_PORT_MASK, port); +- } +- +- /* Write the function register triggering the table access */ +- ret = qca8k_write(priv, QCA8K_REG_ATU_FUNC, reg); +- if (ret) +- return ret; +- +- /* wait for completion */ +- ret = qca8k_busy_wait(priv, QCA8K_REG_ATU_FUNC, QCA8K_ATU_FUNC_BUSY); +- if (ret) +- return ret; +- +- /* Check for table full violation when adding an entry */ +- if (cmd == QCA8K_FDB_LOAD) { +- ret = qca8k_read(priv, QCA8K_REG_ATU_FUNC, ®); +- if (ret < 0) +- return ret; +- if (reg & QCA8K_ATU_FUNC_FULL) +- return -1; +- } +- +- return 0; +-} +- +-static int +-qca8k_fdb_next(struct qca8k_priv *priv, struct qca8k_fdb *fdb, int port) +-{ +- int ret; +- +- qca8k_fdb_write(priv, fdb->vid, fdb->port_mask, fdb->mac, fdb->aging); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_NEXT, port); +- if (ret < 0) +- return ret; +- +- return qca8k_fdb_read(priv, fdb); +-} +- +-static int +-qca8k_fdb_add(struct qca8k_priv *priv, const u8 *mac, u16 port_mask, +- u16 vid, u8 aging) +-{ +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- qca8k_fdb_write(priv, vid, port_mask, mac, aging); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); +- mutex_unlock(&priv->reg_mutex); +- +- return ret; +-} +- +-static int +-qca8k_fdb_del(struct qca8k_priv *priv, const u8 *mac, u16 port_mask, u16 vid) +-{ +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- qca8k_fdb_write(priv, vid, port_mask, mac, 0); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); +- mutex_unlock(&priv->reg_mutex); +- +- return ret; +-} +- +-static void +-qca8k_fdb_flush(struct qca8k_priv *priv) +-{ +- mutex_lock(&priv->reg_mutex); +- qca8k_fdb_access(priv, QCA8K_FDB_FLUSH, -1); +- mutex_unlock(&priv->reg_mutex); +-} +- +-static int +-qca8k_fdb_search_and_insert(struct qca8k_priv *priv, u8 port_mask, +- const u8 *mac, u16 vid) +-{ +- struct qca8k_fdb fdb = { 0 }; +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- +- qca8k_fdb_write(priv, vid, 0, mac, 0); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_SEARCH, -1); +- if (ret < 0) +- goto exit; +- +- ret = qca8k_fdb_read(priv, &fdb); +- if (ret < 0) +- goto exit; +- +- /* Rule exist. Delete first */ +- if (!fdb.aging) { +- ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); +- if (ret) +- goto exit; +- } +- +- /* Add port to fdb portmask */ +- fdb.port_mask |= port_mask; +- +- qca8k_fdb_write(priv, vid, fdb.port_mask, mac, fdb.aging); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); +- +-exit: +- mutex_unlock(&priv->reg_mutex); +- return ret; +-} +- +-static int +-qca8k_fdb_search_and_del(struct qca8k_priv *priv, u8 port_mask, +- const u8 *mac, u16 vid) +-{ +- struct qca8k_fdb fdb = { 0 }; +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- +- qca8k_fdb_write(priv, vid, 0, mac, 0); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_SEARCH, -1); +- if (ret < 0) +- goto exit; +- +- /* Rule doesn't exist. Why delete? */ +- if (!fdb.aging) { +- ret = -EINVAL; +- goto exit; +- } +- +- ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); +- if (ret) +- goto exit; +- +- /* Only port in the rule is this port. Don't re insert */ +- if (fdb.port_mask == port_mask) +- goto exit; +- +- /* Remove port from port mask */ +- fdb.port_mask &= ~port_mask; +- +- qca8k_fdb_write(priv, vid, fdb.port_mask, mac, fdb.aging); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); +- +-exit: +- mutex_unlock(&priv->reg_mutex); +- return ret; +-} +- +-static int +-qca8k_vlan_access(struct qca8k_priv *priv, enum qca8k_vlan_cmd cmd, u16 vid) +-{ +- u32 reg; +- int ret; +- +- /* Set the command and VLAN index */ +- reg = QCA8K_VTU_FUNC1_BUSY; +- reg |= cmd; +- reg |= FIELD_PREP(QCA8K_VTU_FUNC1_VID_MASK, vid); +- +- /* Write the function register triggering the table access */ +- ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC1, reg); +- if (ret) +- return ret; +- +- /* wait for completion */ +- ret = qca8k_busy_wait(priv, QCA8K_REG_VTU_FUNC1, QCA8K_VTU_FUNC1_BUSY); +- if (ret) +- return ret; +- +- /* Check for table full violation when adding an entry */ +- if (cmd == QCA8K_VLAN_LOAD) { +- ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC1, ®); +- if (ret < 0) +- return ret; +- if (reg & QCA8K_VTU_FUNC1_FULL) +- return -ENOMEM; +- } +- +- return 0; +-} +- +-static int +-qca8k_vlan_add(struct qca8k_priv *priv, u8 port, u16 vid, bool untagged) +-{ +- u32 reg; +- int ret; +- +- /* +- We do the right thing with VLAN 0 and treat it as untagged while +- preserving the tag on egress. +- */ +- if (vid == 0) +- return 0; +- +- mutex_lock(&priv->reg_mutex); +- ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid); +- if (ret < 0) +- goto out; +- +- ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, ®); +- if (ret < 0) +- goto out; +- reg |= QCA8K_VTU_FUNC0_VALID | QCA8K_VTU_FUNC0_IVL_EN; +- reg &= ~QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(port); +- if (untagged) +- reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_UNTAG(port); +- else +- reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_TAG(port); +- +- ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg); +- if (ret) +- goto out; +- ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid); +- +-out: +- mutex_unlock(&priv->reg_mutex); +- +- return ret; +-} +- +-static int +-qca8k_vlan_del(struct qca8k_priv *priv, u8 port, u16 vid) +-{ +- u32 reg, mask; +- int ret, i; +- bool del; +- +- mutex_lock(&priv->reg_mutex); +- ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid); +- if (ret < 0) +- goto out; +- +- ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, ®); +- if (ret < 0) +- goto out; +- reg &= ~QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(port); +- reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(port); +- +- /* Check if we're the last member to be removed */ +- del = true; +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { +- mask = QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(i); +- +- if ((reg & mask) != mask) { +- del = false; +- break; +- } +- } +- +- if (del) { +- ret = qca8k_vlan_access(priv, QCA8K_VLAN_PURGE, vid); +- } else { +- ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg); +- if (ret) +- goto out; +- ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid); +- } +- +-out: +- mutex_unlock(&priv->reg_mutex); +- +- return ret; +-} +- +-static int +-qca8k_mib_init(struct qca8k_priv *priv) +-{ +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- ret = regmap_update_bits(priv->regmap, QCA8K_REG_MIB, +- QCA8K_MIB_FUNC | QCA8K_MIB_BUSY, +- FIELD_PREP(QCA8K_MIB_FUNC, QCA8K_MIB_FLUSH) | +- QCA8K_MIB_BUSY); +- if (ret) +- goto exit; +- +- ret = qca8k_busy_wait(priv, QCA8K_REG_MIB, QCA8K_MIB_BUSY); +- if (ret) +- goto exit; +- +- ret = regmap_set_bits(priv->regmap, QCA8K_REG_MIB, QCA8K_MIB_CPU_KEEP); +- if (ret) +- goto exit; +- +- ret = qca8k_write(priv, QCA8K_REG_MODULE_EN, QCA8K_MODULE_EN_MIB); +- +-exit: +- mutex_unlock(&priv->reg_mutex); +- return ret; +-} +- +-static void +-qca8k_port_set_status(struct qca8k_priv *priv, int port, int enable) +-{ +- u32 mask = QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC; +- +- /* Port 0 and 6 have no internal PHY */ +- if (port > 0 && port < 6) +- mask |= QCA8K_PORT_STATUS_LINK_AUTO; +- +- if (enable) +- regmap_set_bits(priv->regmap, QCA8K_REG_PORT_STATUS(port), mask); +- else +- regmap_clear_bits(priv->regmap, QCA8K_REG_PORT_STATUS(port), mask); +-} +- +-static int +-qca8k_phy_eth_busy_wait(struct qca8k_mgmt_eth_data *mgmt_eth_data, +- struct sk_buff *read_skb, u32 *val) +-{ +- struct sk_buff *skb = skb_copy(read_skb, GFP_KERNEL); +- bool ack; +- int ret; +- +- reinit_completion(&mgmt_eth_data->rw_done); +- +- /* Increment seq_num and set it in the copy pkt */ +- mgmt_eth_data->seq++; +- qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); +- mgmt_eth_data->ack = false; +- +- dev_queue_xmit(skb); +- +- ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, +- QCA8K_ETHERNET_TIMEOUT); +- +- ack = mgmt_eth_data->ack; +- +- if (ret <= 0) +- return -ETIMEDOUT; +- +- if (!ack) +- return -EINVAL; +- +- *val = mgmt_eth_data->data[0]; +- +- return 0; +-} +- +-static int +-qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy, +- int regnum, u16 data) +-{ +- struct sk_buff *write_skb, *clear_skb, *read_skb; +- struct qca8k_mgmt_eth_data *mgmt_eth_data; +- u32 write_val, clear_val = 0, val; +- struct net_device *mgmt_master; +- int ret, ret1; +- bool ack; +- +- if (regnum >= QCA8K_MDIO_MASTER_MAX_REG) +- return -EINVAL; +- +- mgmt_eth_data = &priv->mgmt_eth_data; +- +- write_val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN | +- QCA8K_MDIO_MASTER_PHY_ADDR(phy) | +- QCA8K_MDIO_MASTER_REG_ADDR(regnum); +- +- if (read) { +- write_val |= QCA8K_MDIO_MASTER_READ; +- } else { +- write_val |= QCA8K_MDIO_MASTER_WRITE; +- write_val |= QCA8K_MDIO_MASTER_DATA(data); +- } +- +- /* Prealloc all the needed skb before the lock */ +- write_skb = qca8k_alloc_mdio_header(MDIO_WRITE, QCA8K_MDIO_MASTER_CTRL, &write_val, +- QCA8K_ETHERNET_PHY_PRIORITY, sizeof(write_val)); +- if (!write_skb) +- return -ENOMEM; +- +- clear_skb = qca8k_alloc_mdio_header(MDIO_WRITE, QCA8K_MDIO_MASTER_CTRL, &clear_val, +- QCA8K_ETHERNET_PHY_PRIORITY, sizeof(clear_val)); +- if (!clear_skb) { +- ret = -ENOMEM; +- goto err_clear_skb; +- } +- +- read_skb = qca8k_alloc_mdio_header(MDIO_READ, QCA8K_MDIO_MASTER_CTRL, &clear_val, +- QCA8K_ETHERNET_PHY_PRIORITY, sizeof(clear_val)); +- if (!read_skb) { +- ret = -ENOMEM; +- goto err_read_skb; +- } +- +- /* Actually start the request: +- * 1. Send mdio master packet +- * 2. Busy Wait for mdio master command +- * 3. Get the data if we are reading +- * 4. Reset the mdio master (even with error) +- */ +- mutex_lock(&mgmt_eth_data->mutex); +- +- /* Check if mgmt_master is operational */ +- mgmt_master = priv->mgmt_master; +- if (!mgmt_master) { +- mutex_unlock(&mgmt_eth_data->mutex); +- ret = -EINVAL; +- goto err_mgmt_master; +- } +- +- read_skb->dev = mgmt_master; +- clear_skb->dev = mgmt_master; +- write_skb->dev = mgmt_master; +- +- reinit_completion(&mgmt_eth_data->rw_done); +- +- /* Increment seq_num and set it in the write pkt */ +- mgmt_eth_data->seq++; +- qca8k_mdio_header_fill_seq_num(write_skb, mgmt_eth_data->seq); +- mgmt_eth_data->ack = false; +- +- dev_queue_xmit(write_skb); +- +- ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, +- QCA8K_ETHERNET_TIMEOUT); +- +- ack = mgmt_eth_data->ack; +- +- if (ret <= 0) { +- ret = -ETIMEDOUT; +- kfree_skb(read_skb); +- goto exit; +- } +- +- if (!ack) { +- ret = -EINVAL; +- kfree_skb(read_skb); +- goto exit; +- } +- +- ret = read_poll_timeout(qca8k_phy_eth_busy_wait, ret1, +- !(val & QCA8K_MDIO_MASTER_BUSY), 0, +- QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC, false, +- mgmt_eth_data, read_skb, &val); +- +- if (ret < 0 && ret1 < 0) { +- ret = ret1; +- goto exit; +- } +- +- if (read) { +- reinit_completion(&mgmt_eth_data->rw_done); +- +- /* Increment seq_num and set it in the read pkt */ +- mgmt_eth_data->seq++; +- qca8k_mdio_header_fill_seq_num(read_skb, mgmt_eth_data->seq); +- mgmt_eth_data->ack = false; +- +- dev_queue_xmit(read_skb); +- +- ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, +- QCA8K_ETHERNET_TIMEOUT); +- +- ack = mgmt_eth_data->ack; +- +- if (ret <= 0) { +- ret = -ETIMEDOUT; +- goto exit; +- } +- +- if (!ack) { +- ret = -EINVAL; +- goto exit; +- } +- +- ret = mgmt_eth_data->data[0] & QCA8K_MDIO_MASTER_DATA_MASK; +- } else { +- kfree_skb(read_skb); +- } +-exit: +- reinit_completion(&mgmt_eth_data->rw_done); +- +- /* Increment seq_num and set it in the clear pkt */ +- mgmt_eth_data->seq++; +- qca8k_mdio_header_fill_seq_num(clear_skb, mgmt_eth_data->seq); +- mgmt_eth_data->ack = false; +- +- dev_queue_xmit(clear_skb); +- +- wait_for_completion_timeout(&mgmt_eth_data->rw_done, +- QCA8K_ETHERNET_TIMEOUT); +- +- mutex_unlock(&mgmt_eth_data->mutex); +- +- return ret; +- +- /* Error handling before lock */ +-err_mgmt_master: +- kfree_skb(read_skb); +-err_read_skb: +- kfree_skb(clear_skb); +-err_clear_skb: +- kfree_skb(write_skb); +- +- return ret; +-} +- +-static u32 +-qca8k_port_to_phy(int port) +-{ +- /* From Andrew Lunn: +- * Port 0 has no internal phy. +- * Port 1 has an internal PHY at MDIO address 0. +- * Port 2 has an internal PHY at MDIO address 1. +- * ... +- * Port 5 has an internal PHY at MDIO address 4. +- * Port 6 has no internal PHY. +- */ +- +- return port - 1; +-} +- +-static int +-qca8k_mdio_busy_wait(struct mii_bus *bus, u32 reg, u32 mask) +-{ +- u16 r1, r2, page; +- u32 val; +- int ret, ret1; +- +- qca8k_split_addr(reg, &r1, &r2, &page); +- +- ret = read_poll_timeout(qca8k_mii_read32, ret1, !(val & mask), 0, +- QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC, false, +- bus, 0x10 | r2, r1, &val); +- +- /* Check if qca8k_read has failed for a different reason +- * before returnting -ETIMEDOUT +- */ +- if (ret < 0 && ret1 < 0) +- return ret1; +- +- return ret; +-} +- +-static int +-qca8k_mdio_write(struct qca8k_priv *priv, int phy, int regnum, u16 data) +-{ +- struct mii_bus *bus = priv->bus; +- u16 r1, r2, page; +- u32 val; +- int ret; +- +- if (regnum >= QCA8K_MDIO_MASTER_MAX_REG) +- return -EINVAL; +- +- val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN | +- QCA8K_MDIO_MASTER_WRITE | QCA8K_MDIO_MASTER_PHY_ADDR(phy) | +- QCA8K_MDIO_MASTER_REG_ADDR(regnum) | +- QCA8K_MDIO_MASTER_DATA(data); +- +- qca8k_split_addr(QCA8K_MDIO_MASTER_CTRL, &r1, &r2, &page); +- +- mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); +- +- ret = qca8k_set_page(priv, page); +- if (ret) +- goto exit; +- +- qca8k_mii_write32(priv, 0x10 | r2, r1, val); +- +- ret = qca8k_mdio_busy_wait(bus, QCA8K_MDIO_MASTER_CTRL, +- QCA8K_MDIO_MASTER_BUSY); +- +-exit: +- /* even if the busy_wait timeouts try to clear the MASTER_EN */ +- qca8k_mii_write32(priv, 0x10 | r2, r1, 0); +- +- mutex_unlock(&bus->mdio_lock); +- +- return ret; +-} +- +-static int +-qca8k_mdio_read(struct qca8k_priv *priv, int phy, int regnum) +-{ +- struct mii_bus *bus = priv->bus; +- u16 r1, r2, page; +- u32 val; +- int ret; +- +- if (regnum >= QCA8K_MDIO_MASTER_MAX_REG) +- return -EINVAL; +- +- val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN | +- QCA8K_MDIO_MASTER_READ | QCA8K_MDIO_MASTER_PHY_ADDR(phy) | +- QCA8K_MDIO_MASTER_REG_ADDR(regnum); +- +- qca8k_split_addr(QCA8K_MDIO_MASTER_CTRL, &r1, &r2, &page); +- +- mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); +- +- ret = qca8k_set_page(priv, page); +- if (ret) +- goto exit; +- +- qca8k_mii_write32(priv, 0x10 | r2, r1, val); +- +- ret = qca8k_mdio_busy_wait(bus, QCA8K_MDIO_MASTER_CTRL, +- QCA8K_MDIO_MASTER_BUSY); +- if (ret) +- goto exit; +- +- ret = qca8k_mii_read32(bus, 0x10 | r2, r1, &val); +- +-exit: +- /* even if the busy_wait timeouts try to clear the MASTER_EN */ +- qca8k_mii_write32(priv, 0x10 | r2, r1, 0); +- +- mutex_unlock(&bus->mdio_lock); +- +- if (ret >= 0) +- ret = val & QCA8K_MDIO_MASTER_DATA_MASK; +- +- return ret; +-} +- +-static int +-qca8k_internal_mdio_write(struct mii_bus *slave_bus, int phy, int regnum, u16 data) +-{ +- struct qca8k_priv *priv = slave_bus->priv; +- int ret; +- +- /* Use mdio Ethernet when available, fallback to legacy one on error */ +- ret = qca8k_phy_eth_command(priv, false, phy, regnum, data); +- if (!ret) +- return 0; +- +- return qca8k_mdio_write(priv, phy, regnum, data); +-} +- +-static int +-qca8k_internal_mdio_read(struct mii_bus *slave_bus, int phy, int regnum) +-{ +- struct qca8k_priv *priv = slave_bus->priv; +- int ret; +- +- /* Use mdio Ethernet when available, fallback to legacy one on error */ +- ret = qca8k_phy_eth_command(priv, true, phy, regnum, 0); +- if (ret >= 0) +- return ret; +- +- ret = qca8k_mdio_read(priv, phy, regnum); +- +- if (ret < 0) +- return 0xffff; +- +- return ret; +-} +- +-static int +-qca8k_legacy_mdio_write(struct mii_bus *slave_bus, int port, int regnum, u16 data) +-{ +- port = qca8k_port_to_phy(port) % PHY_MAX_ADDR; +- +- return qca8k_internal_mdio_write(slave_bus, port, regnum, data); +-} +- +-static int +-qca8k_legacy_mdio_read(struct mii_bus *slave_bus, int port, int regnum) +-{ +- port = qca8k_port_to_phy(port) % PHY_MAX_ADDR; +- +- return qca8k_internal_mdio_read(slave_bus, port, regnum); +-} +- +-static int +-qca8k_mdio_register(struct qca8k_priv *priv) +-{ +- struct dsa_switch *ds = priv->ds; +- struct device_node *mdio; +- struct mii_bus *bus; +- +- bus = devm_mdiobus_alloc(ds->dev); +- if (!bus) +- return -ENOMEM; +- +- bus->priv = (void *)priv; +- snprintf(bus->id, MII_BUS_ID_SIZE, "qca8k-%d.%d", +- ds->dst->index, ds->index); +- bus->parent = ds->dev; +- bus->phy_mask = ~ds->phys_mii_mask; +- ds->slave_mii_bus = bus; +- +- /* Check if the devicetree declare the port:phy mapping */ +- mdio = of_get_child_by_name(priv->dev->of_node, "mdio"); +- if (of_device_is_available(mdio)) { +- bus->name = "qca8k slave mii"; +- bus->read = qca8k_internal_mdio_read; +- bus->write = qca8k_internal_mdio_write; +- return devm_of_mdiobus_register(priv->dev, bus, mdio); +- } +- +- /* If a mapping can't be found the legacy mapping is used, +- * using the qca8k_port_to_phy function +- */ +- bus->name = "qca8k-legacy slave mii"; +- bus->read = qca8k_legacy_mdio_read; +- bus->write = qca8k_legacy_mdio_write; +- return devm_mdiobus_register(priv->dev, bus); +-} +- +-static int +-qca8k_setup_mdio_bus(struct qca8k_priv *priv) +-{ +- u32 internal_mdio_mask = 0, external_mdio_mask = 0, reg; +- struct device_node *ports, *port; +- phy_interface_t mode; +- int err; +- +- ports = of_get_child_by_name(priv->dev->of_node, "ports"); +- if (!ports) +- ports = of_get_child_by_name(priv->dev->of_node, "ethernet-ports"); +- +- if (!ports) +- return -EINVAL; +- +- for_each_available_child_of_node(ports, port) { +- err = of_property_read_u32(port, "reg", ®); +- if (err) { +- of_node_put(port); +- of_node_put(ports); +- return err; +- } +- +- if (!dsa_is_user_port(priv->ds, reg)) +- continue; +- +- of_get_phy_mode(port, &mode); +- +- if (of_property_read_bool(port, "phy-handle") && +- mode != PHY_INTERFACE_MODE_INTERNAL) +- external_mdio_mask |= BIT(reg); +- else +- internal_mdio_mask |= BIT(reg); +- } +- +- of_node_put(ports); +- if (!external_mdio_mask && !internal_mdio_mask) { +- dev_err(priv->dev, "no PHYs are defined.\n"); +- return -EINVAL; +- } +- +- /* The QCA8K_MDIO_MASTER_EN Bit, which grants access to PHYs through +- * the MDIO_MASTER register also _disconnects_ the external MDC +- * passthrough to the internal PHYs. It's not possible to use both +- * configurations at the same time! +- * +- * Because this came up during the review process: +- * If the external mdio-bus driver is capable magically disabling +- * the QCA8K_MDIO_MASTER_EN and mutex/spin-locking out the qca8k's +- * accessors for the time being, it would be possible to pull this +- * off. +- */ +- if (!!external_mdio_mask && !!internal_mdio_mask) { +- dev_err(priv->dev, "either internal or external mdio bus configuration is supported.\n"); +- return -EINVAL; +- } +- +- if (external_mdio_mask) { +- /* Make sure to disable the internal mdio bus in cases +- * a dt-overlay and driver reload changed the configuration +- */ +- +- return regmap_clear_bits(priv->regmap, QCA8K_MDIO_MASTER_CTRL, +- QCA8K_MDIO_MASTER_EN); +- } +- +- return qca8k_mdio_register(priv); +-} +- +-static int +-qca8k_setup_mac_pwr_sel(struct qca8k_priv *priv) +-{ +- u32 mask = 0; +- int ret = 0; +- +- /* SoC specific settings for ipq8064. +- * If more device require this consider adding +- * a dedicated binding. +- */ +- if (of_machine_is_compatible("qcom,ipq8064")) +- mask |= QCA8K_MAC_PWR_RGMII0_1_8V; +- +- /* SoC specific settings for ipq8065 */ +- if (of_machine_is_compatible("qcom,ipq8065")) +- mask |= QCA8K_MAC_PWR_RGMII1_1_8V; +- +- if (mask) { +- ret = qca8k_rmw(priv, QCA8K_REG_MAC_PWR_SEL, +- QCA8K_MAC_PWR_RGMII0_1_8V | +- QCA8K_MAC_PWR_RGMII1_1_8V, +- mask); +- } +- +- return ret; +-} +- +-static int qca8k_find_cpu_port(struct dsa_switch *ds) +-{ +- struct qca8k_priv *priv = ds->priv; +- +- /* Find the connected cpu port. Valid port are 0 or 6 */ +- if (dsa_is_cpu_port(ds, 0)) +- return 0; +- +- dev_dbg(priv->dev, "port 0 is not the CPU port. Checking port 6"); +- +- if (dsa_is_cpu_port(ds, 6)) +- return 6; +- +- return -EINVAL; +-} +- +-static int +-qca8k_setup_of_pws_reg(struct qca8k_priv *priv) +-{ +- const struct qca8k_match_data *data = priv->info; +- struct device_node *node = priv->dev->of_node; +- u32 val = 0; +- int ret; +- +- /* QCA8327 require to set to the correct mode. +- * His bigger brother QCA8328 have the 172 pin layout. +- * Should be applied by default but we set this just to make sure. +- */ +- if (priv->switch_id == QCA8K_ID_QCA8327) { +- /* Set the correct package of 148 pin for QCA8327 */ +- if (data->reduced_package) +- val |= QCA8327_PWS_PACKAGE148_EN; +- +- ret = qca8k_rmw(priv, QCA8K_REG_PWS, QCA8327_PWS_PACKAGE148_EN, +- val); +- if (ret) +- return ret; +- } +- +- if (of_property_read_bool(node, "qca,ignore-power-on-sel")) +- val |= QCA8K_PWS_POWER_ON_SEL; +- +- if (of_property_read_bool(node, "qca,led-open-drain")) { +- if (!(val & QCA8K_PWS_POWER_ON_SEL)) { +- dev_err(priv->dev, "qca,led-open-drain require qca,ignore-power-on-sel to be set."); +- return -EINVAL; +- } +- +- val |= QCA8K_PWS_LED_OPEN_EN_CSR; +- } +- +- return qca8k_rmw(priv, QCA8K_REG_PWS, +- QCA8K_PWS_LED_OPEN_EN_CSR | QCA8K_PWS_POWER_ON_SEL, +- val); +-} +- +-static int +-qca8k_parse_port_config(struct qca8k_priv *priv) +-{ +- int port, cpu_port_index = -1, ret; +- struct device_node *port_dn; +- phy_interface_t mode; +- struct dsa_port *dp; +- u32 delay; +- +- /* We have 2 CPU port. Check them */ +- for (port = 0; port < QCA8K_NUM_PORTS; port++) { +- /* Skip every other port */ +- if (port != 0 && port != 6) +- continue; +- +- dp = dsa_to_port(priv->ds, port); +- port_dn = dp->dn; +- cpu_port_index++; +- +- if (!of_device_is_available(port_dn)) +- continue; +- +- ret = of_get_phy_mode(port_dn, &mode); +- if (ret) +- continue; +- +- switch (mode) { +- case PHY_INTERFACE_MODE_RGMII: +- case PHY_INTERFACE_MODE_RGMII_ID: +- case PHY_INTERFACE_MODE_RGMII_TXID: +- case PHY_INTERFACE_MODE_RGMII_RXID: +- case PHY_INTERFACE_MODE_SGMII: +- delay = 0; +- +- if (!of_property_read_u32(port_dn, "tx-internal-delay-ps", &delay)) +- /* Switch regs accept value in ns, convert ps to ns */ +- delay = delay / 1000; +- else if (mode == PHY_INTERFACE_MODE_RGMII_ID || +- mode == PHY_INTERFACE_MODE_RGMII_TXID) +- delay = 1; +- +- if (!FIELD_FIT(QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK, delay)) { +- dev_err(priv->dev, "rgmii tx delay is limited to a max value of 3ns, setting to the max value"); +- delay = 3; +- } +- +- priv->ports_config.rgmii_tx_delay[cpu_port_index] = delay; +- +- delay = 0; +- +- if (!of_property_read_u32(port_dn, "rx-internal-delay-ps", &delay)) +- /* Switch regs accept value in ns, convert ps to ns */ +- delay = delay / 1000; +- else if (mode == PHY_INTERFACE_MODE_RGMII_ID || +- mode == PHY_INTERFACE_MODE_RGMII_RXID) +- delay = 2; +- +- if (!FIELD_FIT(QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK, delay)) { +- dev_err(priv->dev, "rgmii rx delay is limited to a max value of 3ns, setting to the max value"); +- delay = 3; +- } +- +- priv->ports_config.rgmii_rx_delay[cpu_port_index] = delay; +- +- /* Skip sgmii parsing for rgmii* mode */ +- if (mode == PHY_INTERFACE_MODE_RGMII || +- mode == PHY_INTERFACE_MODE_RGMII_ID || +- mode == PHY_INTERFACE_MODE_RGMII_TXID || +- mode == PHY_INTERFACE_MODE_RGMII_RXID) +- break; +- +- if (of_property_read_bool(port_dn, "qca,sgmii-txclk-falling-edge")) +- priv->ports_config.sgmii_tx_clk_falling_edge = true; +- +- if (of_property_read_bool(port_dn, "qca,sgmii-rxclk-falling-edge")) +- priv->ports_config.sgmii_rx_clk_falling_edge = true; +- +- if (of_property_read_bool(port_dn, "qca,sgmii-enable-pll")) { +- priv->ports_config.sgmii_enable_pll = true; +- +- if (priv->switch_id == QCA8K_ID_QCA8327) { +- dev_err(priv->dev, "SGMII PLL should NOT be enabled for qca8327. Aborting enabling"); +- priv->ports_config.sgmii_enable_pll = false; +- } +- +- if (priv->switch_revision < 2) +- dev_warn(priv->dev, "SGMII PLL should NOT be enabled for qca8337 with revision 2 or more."); +- } +- +- break; +- default: +- continue; +- } +- } +- +- return 0; +-} +- +-static int +-qca8k_setup(struct dsa_switch *ds) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- int cpu_port, ret, i; +- u32 mask; +- +- cpu_port = qca8k_find_cpu_port(ds); +- if (cpu_port < 0) { +- dev_err(priv->dev, "No cpu port configured in both cpu port0 and port6"); +- return cpu_port; +- } +- +- /* Parse CPU port config to be later used in phy_link mac_config */ +- ret = qca8k_parse_port_config(priv); +- if (ret) +- return ret; +- +- ret = qca8k_setup_mdio_bus(priv); +- if (ret) +- return ret; +- +- ret = qca8k_setup_of_pws_reg(priv); +- if (ret) +- return ret; +- +- ret = qca8k_setup_mac_pwr_sel(priv); +- if (ret) +- return ret; +- +- /* Make sure MAC06 is disabled */ +- ret = regmap_clear_bits(priv->regmap, QCA8K_REG_PORT0_PAD_CTRL, +- QCA8K_PORT0_PAD_MAC06_EXCHANGE_EN); +- if (ret) { +- dev_err(priv->dev, "failed disabling MAC06 exchange"); +- return ret; +- } +- +- /* Enable CPU Port */ +- ret = regmap_set_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, +- QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN); +- if (ret) { +- dev_err(priv->dev, "failed enabling CPU port"); +- return ret; +- } +- +- /* Enable MIB counters */ +- ret = qca8k_mib_init(priv); +- if (ret) +- dev_warn(priv->dev, "mib init failed"); +- +- /* Initial setup of all ports */ +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { +- /* Disable forwarding by default on all ports */ +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), +- QCA8K_PORT_LOOKUP_MEMBER, 0); +- if (ret) +- return ret; +- +- /* Enable QCA header mode on all cpu ports */ +- if (dsa_is_cpu_port(ds, i)) { +- ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(i), +- FIELD_PREP(QCA8K_PORT_HDR_CTRL_TX_MASK, QCA8K_PORT_HDR_CTRL_ALL) | +- FIELD_PREP(QCA8K_PORT_HDR_CTRL_RX_MASK, QCA8K_PORT_HDR_CTRL_ALL)); +- if (ret) { +- dev_err(priv->dev, "failed enabling QCA header mode"); +- return ret; +- } +- } +- +- /* Disable MAC by default on all user ports */ +- if (dsa_is_user_port(ds, i)) +- qca8k_port_set_status(priv, i, 0); +- } +- +- /* Forward all unknown frames to CPU port for Linux processing +- * Notice that in multi-cpu config only one port should be set +- * for igmp, unknown, multicast and broadcast packet +- */ +- ret = qca8k_write(priv, QCA8K_REG_GLOBAL_FW_CTRL1, +- FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_MASK, BIT(cpu_port)) | +- FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_BC_DP_MASK, BIT(cpu_port)) | +- FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_MC_DP_MASK, BIT(cpu_port)) | +- FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_UC_DP_MASK, BIT(cpu_port))); +- if (ret) +- return ret; +- +- /* Setup connection between CPU port & user ports +- * Configure specific switch configuration for ports +- */ +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { +- /* CPU port gets connected to all user ports of the switch */ +- if (dsa_is_cpu_port(ds, i)) { +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), +- QCA8K_PORT_LOOKUP_MEMBER, dsa_user_ports(ds)); +- if (ret) +- return ret; +- } +- +- /* Individual user ports get connected to CPU port only */ +- if (dsa_is_user_port(ds, i)) { +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), +- QCA8K_PORT_LOOKUP_MEMBER, +- BIT(cpu_port)); +- if (ret) +- return ret; +- +- /* Enable ARP Auto-learning by default */ +- ret = regmap_set_bits(priv->regmap, QCA8K_PORT_LOOKUP_CTRL(i), +- QCA8K_PORT_LOOKUP_LEARN); +- if (ret) +- return ret; +- +- /* For port based vlans to work we need to set the +- * default egress vid +- */ +- ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(i), +- QCA8K_EGREES_VLAN_PORT_MASK(i), +- QCA8K_EGREES_VLAN_PORT(i, QCA8K_PORT_VID_DEF)); +- if (ret) +- return ret; +- +- ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(i), +- QCA8K_PORT_VLAN_CVID(QCA8K_PORT_VID_DEF) | +- QCA8K_PORT_VLAN_SVID(QCA8K_PORT_VID_DEF)); +- if (ret) +- return ret; +- } +- +- /* The port 5 of the qca8337 have some problem in flood condition. The +- * original legacy driver had some specific buffer and priority settings +- * for the different port suggested by the QCA switch team. Add this +- * missing settings to improve switch stability under load condition. +- * This problem is limited to qca8337 and other qca8k switch are not affected. +- */ +- if (priv->switch_id == QCA8K_ID_QCA8337) { +- switch (i) { +- /* The 2 CPU port and port 5 requires some different +- * priority than any other ports. +- */ +- case 0: +- case 5: +- case 6: +- mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x4) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x4) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI4(0x6) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI5(0x8) | +- QCA8K_PORT_HOL_CTRL0_EG_PORT(0x1e); +- break; +- default: +- mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x6) | +- QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x8) | +- QCA8K_PORT_HOL_CTRL0_EG_PORT(0x19); +- } +- qca8k_write(priv, QCA8K_REG_PORT_HOL_CTRL0(i), mask); +- +- mask = QCA8K_PORT_HOL_CTRL1_ING(0x6) | +- QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN | +- QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN | +- QCA8K_PORT_HOL_CTRL1_WRED_EN; +- qca8k_rmw(priv, QCA8K_REG_PORT_HOL_CTRL1(i), +- QCA8K_PORT_HOL_CTRL1_ING_BUF_MASK | +- QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN | +- QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN | +- QCA8K_PORT_HOL_CTRL1_WRED_EN, +- mask); +- } +- } +- +- /* Special GLOBAL_FC_THRESH value are needed for ar8327 switch */ +- if (priv->switch_id == QCA8K_ID_QCA8327) { +- mask = QCA8K_GLOBAL_FC_GOL_XON_THRES(288) | +- QCA8K_GLOBAL_FC_GOL_XOFF_THRES(496); +- qca8k_rmw(priv, QCA8K_REG_GLOBAL_FC_THRESH, +- QCA8K_GLOBAL_FC_GOL_XON_THRES_MASK | +- QCA8K_GLOBAL_FC_GOL_XOFF_THRES_MASK, +- mask); +- } +- +- /* Setup our port MTUs to match power on defaults */ +- ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, ETH_FRAME_LEN + ETH_FCS_LEN); +- if (ret) +- dev_warn(priv->dev, "failed setting MTU settings"); +- +- /* Flush the FDB table */ +- qca8k_fdb_flush(priv); +- +- /* We don't have interrupts for link changes, so we need to poll */ +- ds->pcs_poll = true; +- +- /* Set min a max ageing value supported */ +- ds->ageing_time_min = 7000; +- ds->ageing_time_max = 458745000; +- +- /* Set max number of LAGs supported */ +- ds->num_lag_ids = QCA8K_NUM_LAGS; +- +- return 0; +-} +- +-static void +-qca8k_mac_config_setup_internal_delay(struct qca8k_priv *priv, int cpu_port_index, +- u32 reg) +-{ +- u32 delay, val = 0; +- int ret; +- +- /* Delay can be declared in 3 different way. +- * Mode to rgmii and internal-delay standard binding defined +- * rgmii-id or rgmii-tx/rx phy mode set. +- * The parse logic set a delay different than 0 only when one +- * of the 3 different way is used. In all other case delay is +- * not enabled. With ID or TX/RXID delay is enabled and set +- * to the default and recommended value. +- */ +- if (priv->ports_config.rgmii_tx_delay[cpu_port_index]) { +- delay = priv->ports_config.rgmii_tx_delay[cpu_port_index]; +- +- val |= QCA8K_PORT_PAD_RGMII_TX_DELAY(delay) | +- QCA8K_PORT_PAD_RGMII_TX_DELAY_EN; +- } +- +- if (priv->ports_config.rgmii_rx_delay[cpu_port_index]) { +- delay = priv->ports_config.rgmii_rx_delay[cpu_port_index]; +- +- val |= QCA8K_PORT_PAD_RGMII_RX_DELAY(delay) | +- QCA8K_PORT_PAD_RGMII_RX_DELAY_EN; +- } +- +- /* Set RGMII delay based on the selected values */ +- ret = qca8k_rmw(priv, reg, +- QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK | +- QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK | +- QCA8K_PORT_PAD_RGMII_TX_DELAY_EN | +- QCA8K_PORT_PAD_RGMII_RX_DELAY_EN, +- val); +- if (ret) +- dev_err(priv->dev, "Failed to set internal delay for CPU port%d", +- cpu_port_index == QCA8K_CPU_PORT0 ? 0 : 6); +-} +- +-static void +-qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, +- const struct phylink_link_state *state) +-{ +- struct qca8k_priv *priv = ds->priv; +- int cpu_port_index, ret; +- u32 reg, val; +- +- switch (port) { +- case 0: /* 1st CPU port */ +- if (state->interface != PHY_INTERFACE_MODE_RGMII && +- state->interface != PHY_INTERFACE_MODE_RGMII_ID && +- state->interface != PHY_INTERFACE_MODE_RGMII_TXID && +- state->interface != PHY_INTERFACE_MODE_RGMII_RXID && +- state->interface != PHY_INTERFACE_MODE_SGMII) +- return; +- +- reg = QCA8K_REG_PORT0_PAD_CTRL; +- cpu_port_index = QCA8K_CPU_PORT0; +- break; +- case 1: +- case 2: +- case 3: +- case 4: +- case 5: +- /* Internal PHY, nothing to do */ +- return; +- case 6: /* 2nd CPU port / external PHY */ +- if (state->interface != PHY_INTERFACE_MODE_RGMII && +- state->interface != PHY_INTERFACE_MODE_RGMII_ID && +- state->interface != PHY_INTERFACE_MODE_RGMII_TXID && +- state->interface != PHY_INTERFACE_MODE_RGMII_RXID && +- state->interface != PHY_INTERFACE_MODE_SGMII && +- state->interface != PHY_INTERFACE_MODE_1000BASEX) +- return; +- +- reg = QCA8K_REG_PORT6_PAD_CTRL; +- cpu_port_index = QCA8K_CPU_PORT6; +- break; +- default: +- dev_err(ds->dev, "%s: unsupported port: %i\n", __func__, port); +- return; +- } +- +- if (port != 6 && phylink_autoneg_inband(mode)) { +- dev_err(ds->dev, "%s: in-band negotiation unsupported\n", +- __func__); +- return; +- } +- +- switch (state->interface) { +- case PHY_INTERFACE_MODE_RGMII: +- case PHY_INTERFACE_MODE_RGMII_ID: +- case PHY_INTERFACE_MODE_RGMII_TXID: +- case PHY_INTERFACE_MODE_RGMII_RXID: +- qca8k_write(priv, reg, QCA8K_PORT_PAD_RGMII_EN); +- +- /* Configure rgmii delay */ +- qca8k_mac_config_setup_internal_delay(priv, cpu_port_index, reg); +- +- /* QCA8337 requires to set rgmii rx delay for all ports. +- * This is enabled through PORT5_PAD_CTRL for all ports, +- * rather than individual port registers. +- */ +- if (priv->switch_id == QCA8K_ID_QCA8337) +- qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL, +- QCA8K_PORT_PAD_RGMII_RX_DELAY_EN); +- break; +- case PHY_INTERFACE_MODE_SGMII: +- case PHY_INTERFACE_MODE_1000BASEX: +- /* Enable SGMII on the port */ +- qca8k_write(priv, reg, QCA8K_PORT_PAD_SGMII_EN); +- +- /* Enable/disable SerDes auto-negotiation as necessary */ +- ret = qca8k_read(priv, QCA8K_REG_PWS, &val); +- if (ret) +- return; +- if (phylink_autoneg_inband(mode)) +- val &= ~QCA8K_PWS_SERDES_AEN_DIS; +- else +- val |= QCA8K_PWS_SERDES_AEN_DIS; +- qca8k_write(priv, QCA8K_REG_PWS, val); +- +- /* Configure the SGMII parameters */ +- ret = qca8k_read(priv, QCA8K_REG_SGMII_CTRL, &val); +- if (ret) +- return; +- +- val |= QCA8K_SGMII_EN_SD; +- +- if (priv->ports_config.sgmii_enable_pll) +- val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX | +- QCA8K_SGMII_EN_TX; +- +- if (dsa_is_cpu_port(ds, port)) { +- /* CPU port, we're talking to the CPU MAC, be a PHY */ +- val &= ~QCA8K_SGMII_MODE_CTRL_MASK; +- val |= QCA8K_SGMII_MODE_CTRL_PHY; +- } else if (state->interface == PHY_INTERFACE_MODE_SGMII) { +- val &= ~QCA8K_SGMII_MODE_CTRL_MASK; +- val |= QCA8K_SGMII_MODE_CTRL_MAC; +- } else if (state->interface == PHY_INTERFACE_MODE_1000BASEX) { +- val &= ~QCA8K_SGMII_MODE_CTRL_MASK; +- val |= QCA8K_SGMII_MODE_CTRL_BASEX; +- } +- +- qca8k_write(priv, QCA8K_REG_SGMII_CTRL, val); +- +- /* From original code is reported port instability as SGMII also +- * require delay set. Apply advised values here or take them from DT. +- */ +- if (state->interface == PHY_INTERFACE_MODE_SGMII) +- qca8k_mac_config_setup_internal_delay(priv, cpu_port_index, reg); +- +- /* For qca8327/qca8328/qca8334/qca8338 sgmii is unique and +- * falling edge is set writing in the PORT0 PAD reg +- */ +- if (priv->switch_id == QCA8K_ID_QCA8327 || +- priv->switch_id == QCA8K_ID_QCA8337) +- reg = QCA8K_REG_PORT0_PAD_CTRL; +- +- val = 0; +- +- /* SGMII Clock phase configuration */ +- if (priv->ports_config.sgmii_rx_clk_falling_edge) +- val |= QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE; +- +- if (priv->ports_config.sgmii_tx_clk_falling_edge) +- val |= QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE; +- +- if (val) +- ret = qca8k_rmw(priv, reg, +- QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE | +- QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE, +- val); +- +- break; +- default: +- dev_err(ds->dev, "xMII mode %s not supported for port %d\n", +- phy_modes(state->interface), port); +- return; +- } +-} +- +-static void +-qca8k_phylink_validate(struct dsa_switch *ds, int port, +- unsigned long *supported, +- struct phylink_link_state *state) +-{ +- __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; +- +- switch (port) { +- case 0: /* 1st CPU port */ +- if (state->interface != PHY_INTERFACE_MODE_NA && +- state->interface != PHY_INTERFACE_MODE_RGMII && +- state->interface != PHY_INTERFACE_MODE_RGMII_ID && +- state->interface != PHY_INTERFACE_MODE_RGMII_TXID && +- state->interface != PHY_INTERFACE_MODE_RGMII_RXID && +- state->interface != PHY_INTERFACE_MODE_SGMII) +- goto unsupported; +- break; +- case 1: +- case 2: +- case 3: +- case 4: +- case 5: +- /* Internal PHY */ +- if (state->interface != PHY_INTERFACE_MODE_NA && +- state->interface != PHY_INTERFACE_MODE_GMII && +- state->interface != PHY_INTERFACE_MODE_INTERNAL) +- goto unsupported; +- break; +- case 6: /* 2nd CPU port / external PHY */ +- if (state->interface != PHY_INTERFACE_MODE_NA && +- state->interface != PHY_INTERFACE_MODE_RGMII && +- state->interface != PHY_INTERFACE_MODE_RGMII_ID && +- state->interface != PHY_INTERFACE_MODE_RGMII_TXID && +- state->interface != PHY_INTERFACE_MODE_RGMII_RXID && +- state->interface != PHY_INTERFACE_MODE_SGMII && +- state->interface != PHY_INTERFACE_MODE_1000BASEX) +- goto unsupported; +- break; +- default: +-unsupported: +- linkmode_zero(supported); +- return; +- } +- +- phylink_set_port_modes(mask); +- phylink_set(mask, Autoneg); +- +- phylink_set(mask, 1000baseT_Full); +- phylink_set(mask, 10baseT_Half); +- phylink_set(mask, 10baseT_Full); +- phylink_set(mask, 100baseT_Half); +- phylink_set(mask, 100baseT_Full); +- +- if (state->interface == PHY_INTERFACE_MODE_1000BASEX) +- phylink_set(mask, 1000baseX_Full); +- +- phylink_set(mask, Pause); +- phylink_set(mask, Asym_Pause); +- +- linkmode_and(supported, supported, mask); +- linkmode_and(state->advertising, state->advertising, mask); +-} +- +-static int +-qca8k_phylink_mac_link_state(struct dsa_switch *ds, int port, +- struct phylink_link_state *state) +-{ +- struct qca8k_priv *priv = ds->priv; +- u32 reg; +- int ret; +- +- ret = qca8k_read(priv, QCA8K_REG_PORT_STATUS(port), ®); +- if (ret < 0) +- return ret; +- +- state->link = !!(reg & QCA8K_PORT_STATUS_LINK_UP); +- state->an_complete = state->link; +- state->an_enabled = !!(reg & QCA8K_PORT_STATUS_LINK_AUTO); +- state->duplex = (reg & QCA8K_PORT_STATUS_DUPLEX) ? DUPLEX_FULL : +- DUPLEX_HALF; +- +- switch (reg & QCA8K_PORT_STATUS_SPEED) { +- case QCA8K_PORT_STATUS_SPEED_10: +- state->speed = SPEED_10; +- break; +- case QCA8K_PORT_STATUS_SPEED_100: +- state->speed = SPEED_100; +- break; +- case QCA8K_PORT_STATUS_SPEED_1000: +- state->speed = SPEED_1000; +- break; +- default: +- state->speed = SPEED_UNKNOWN; +- break; +- } +- +- state->pause = MLO_PAUSE_NONE; +- if (reg & QCA8K_PORT_STATUS_RXFLOW) +- state->pause |= MLO_PAUSE_RX; +- if (reg & QCA8K_PORT_STATUS_TXFLOW) +- state->pause |= MLO_PAUSE_TX; +- +- return 1; +-} +- +-static void +-qca8k_phylink_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode, +- phy_interface_t interface) +-{ +- struct qca8k_priv *priv = ds->priv; +- +- qca8k_port_set_status(priv, port, 0); +-} +- +-static void +-qca8k_phylink_mac_link_up(struct dsa_switch *ds, int port, unsigned int mode, +- phy_interface_t interface, struct phy_device *phydev, +- int speed, int duplex, bool tx_pause, bool rx_pause) +-{ +- struct qca8k_priv *priv = ds->priv; +- u32 reg; +- +- if (phylink_autoneg_inband(mode)) { +- reg = QCA8K_PORT_STATUS_LINK_AUTO; +- } else { +- switch (speed) { +- case SPEED_10: +- reg = QCA8K_PORT_STATUS_SPEED_10; +- break; +- case SPEED_100: +- reg = QCA8K_PORT_STATUS_SPEED_100; +- break; +- case SPEED_1000: +- reg = QCA8K_PORT_STATUS_SPEED_1000; +- break; +- default: +- reg = QCA8K_PORT_STATUS_LINK_AUTO; +- break; +- } +- +- if (duplex == DUPLEX_FULL) +- reg |= QCA8K_PORT_STATUS_DUPLEX; +- +- if (rx_pause || dsa_is_cpu_port(ds, port)) +- reg |= QCA8K_PORT_STATUS_RXFLOW; +- +- if (tx_pause || dsa_is_cpu_port(ds, port)) +- reg |= QCA8K_PORT_STATUS_TXFLOW; +- } +- +- reg |= QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC; +- +- qca8k_write(priv, QCA8K_REG_PORT_STATUS(port), reg); +-} +- +-static void +-qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data) +-{ +- struct qca8k_priv *priv = ds->priv; +- int i; +- +- if (stringset != ETH_SS_STATS) +- return; +- +- for (i = 0; i < priv->info->mib_count; i++) +- strncpy(data + i * ETH_GSTRING_LEN, ar8327_mib[i].name, +- ETH_GSTRING_LEN); +-} +- +-static void qca8k_mib_autocast_handler(struct dsa_switch *ds, struct sk_buff *skb) +-{ +- struct qca8k_mib_eth_data *mib_eth_data; +- struct qca8k_priv *priv = ds->priv; +- const struct qca8k_mib_desc *mib; +- struct mib_ethhdr *mib_ethhdr; +- int i, mib_len, offset = 0; +- u64 *data; +- u8 port; +- +- mib_ethhdr = (struct mib_ethhdr *)skb_mac_header(skb); +- mib_eth_data = &priv->mib_eth_data; +- +- /* The switch autocast every port. Ignore other packet and +- * parse only the requested one. +- */ +- port = FIELD_GET(QCA_HDR_RECV_SOURCE_PORT, ntohs(mib_ethhdr->hdr)); +- if (port != mib_eth_data->req_port) +- goto exit; +- +- data = mib_eth_data->data; +- +- for (i = 0; i < priv->info->mib_count; i++) { +- mib = &ar8327_mib[i]; +- +- /* First 3 mib are present in the skb head */ +- if (i < 3) { +- data[i] = mib_ethhdr->data[i]; +- continue; +- } +- +- mib_len = sizeof(uint32_t); +- +- /* Some mib are 64 bit wide */ +- if (mib->size == 2) +- mib_len = sizeof(uint64_t); +- +- /* Copy the mib value from packet to the */ +- memcpy(data + i, skb->data + offset, mib_len); +- +- /* Set the offset for the next mib */ +- offset += mib_len; +- } +- +-exit: +- /* Complete on receiving all the mib packet */ +- if (refcount_dec_and_test(&mib_eth_data->port_parsed)) +- complete(&mib_eth_data->rw_done); +-} +- +-static int +-qca8k_get_ethtool_stats_eth(struct dsa_switch *ds, int port, u64 *data) +-{ +- struct dsa_port *dp = dsa_to_port(ds, port); +- struct qca8k_mib_eth_data *mib_eth_data; +- struct qca8k_priv *priv = ds->priv; +- int ret; +- +- mib_eth_data = &priv->mib_eth_data; +- +- mutex_lock(&mib_eth_data->mutex); +- +- reinit_completion(&mib_eth_data->rw_done); +- +- mib_eth_data->req_port = dp->index; +- mib_eth_data->data = data; +- refcount_set(&mib_eth_data->port_parsed, QCA8K_NUM_PORTS); +- +- mutex_lock(&priv->reg_mutex); +- +- /* Send mib autocast request */ +- ret = regmap_update_bits(priv->regmap, QCA8K_REG_MIB, +- QCA8K_MIB_FUNC | QCA8K_MIB_BUSY, +- FIELD_PREP(QCA8K_MIB_FUNC, QCA8K_MIB_CAST) | +- QCA8K_MIB_BUSY); +- +- mutex_unlock(&priv->reg_mutex); +- +- if (ret) +- goto exit; +- +- ret = wait_for_completion_timeout(&mib_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); +- +-exit: +- mutex_unlock(&mib_eth_data->mutex); +- +- return ret; +-} +- +-static void +-qca8k_get_ethtool_stats(struct dsa_switch *ds, int port, +- uint64_t *data) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- const struct qca8k_mib_desc *mib; +- u32 reg, i, val; +- u32 hi = 0; +- int ret; +- +- if (priv->mgmt_master && priv->info->ops->autocast_mib && +- priv->info->ops->autocast_mib(ds, port, data) > 0) +- return; +- +- for (i = 0; i < priv->info->mib_count; i++) { +- mib = &ar8327_mib[i]; +- reg = QCA8K_PORT_MIB_COUNTER(port) + mib->offset; +- +- ret = qca8k_read(priv, reg, &val); +- if (ret < 0) +- continue; +- +- if (mib->size == 2) { +- ret = qca8k_read(priv, reg + 4, &hi); +- if (ret < 0) +- continue; +- } +- +- data[i] = val; +- if (mib->size == 2) +- data[i] |= (u64)hi << 32; +- } +-} +- +-static int +-qca8k_get_sset_count(struct dsa_switch *ds, int port, int sset) +-{ +- struct qca8k_priv *priv = ds->priv; +- +- if (sset != ETH_SS_STATS) +- return 0; +- +- return priv->info->mib_count; +-} +- +-static int +-qca8k_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *eee) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- u32 lpi_en = QCA8K_REG_EEE_CTRL_LPI_EN(port); +- u32 reg; +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- ret = qca8k_read(priv, QCA8K_REG_EEE_CTRL, ®); +- if (ret < 0) +- goto exit; +- +- if (eee->eee_enabled) +- reg |= lpi_en; +- else +- reg &= ~lpi_en; +- ret = qca8k_write(priv, QCA8K_REG_EEE_CTRL, reg); +- +-exit: +- mutex_unlock(&priv->reg_mutex); +- return ret; +-} +- +-static int +-qca8k_get_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e) +-{ +- /* Nothing to do on the port's MAC */ +- return 0; +-} +- +-static void +-qca8k_port_stp_state_set(struct dsa_switch *ds, int port, u8 state) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- u32 stp_state; +- +- switch (state) { +- case BR_STATE_DISABLED: +- stp_state = QCA8K_PORT_LOOKUP_STATE_DISABLED; +- break; +- case BR_STATE_BLOCKING: +- stp_state = QCA8K_PORT_LOOKUP_STATE_BLOCKING; +- break; +- case BR_STATE_LISTENING: +- stp_state = QCA8K_PORT_LOOKUP_STATE_LISTENING; +- break; +- case BR_STATE_LEARNING: +- stp_state = QCA8K_PORT_LOOKUP_STATE_LEARNING; +- break; +- case BR_STATE_FORWARDING: +- default: +- stp_state = QCA8K_PORT_LOOKUP_STATE_FORWARD; +- break; +- } +- +- qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), +- QCA8K_PORT_LOOKUP_STATE_MASK, stp_state); +-} +- +-static int +-qca8k_port_bridge_join(struct dsa_switch *ds, int port, struct net_device *br) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- int port_mask, cpu_port; +- int i, ret; +- +- cpu_port = dsa_to_port(ds, port)->cpu_dp->index; +- port_mask = BIT(cpu_port); +- +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { +- if (dsa_is_cpu_port(ds, i)) +- continue; +- if (dsa_to_port(ds, i)->bridge_dev != br) +- continue; +- /* Add this port to the portvlan mask of the other ports +- * in the bridge +- */ +- ret = regmap_set_bits(priv->regmap, +- QCA8K_PORT_LOOKUP_CTRL(i), +- BIT(port)); +- if (ret) +- return ret; +- if (i != port) +- port_mask |= BIT(i); +- } +- +- /* Add all other ports to this ports portvlan mask */ +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), +- QCA8K_PORT_LOOKUP_MEMBER, port_mask); +- +- return ret; +-} +- +-static void +-qca8k_port_bridge_leave(struct dsa_switch *ds, int port, struct net_device *br) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- int cpu_port, i; +- +- cpu_port = dsa_to_port(ds, port)->cpu_dp->index; +- +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { +- if (dsa_is_cpu_port(ds, i)) +- continue; +- if (dsa_to_port(ds, i)->bridge_dev != br) +- continue; +- /* Remove this port to the portvlan mask of the other ports +- * in the bridge +- */ +- regmap_clear_bits(priv->regmap, +- QCA8K_PORT_LOOKUP_CTRL(i), +- BIT(port)); +- } +- +- /* Set the cpu port to be the only one in the portvlan mask of +- * this port +- */ +- qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), +- QCA8K_PORT_LOOKUP_MEMBER, BIT(cpu_port)); +-} +- +-static void +-qca8k_port_fast_age(struct dsa_switch *ds, int port) +-{ +- struct qca8k_priv *priv = ds->priv; +- +- mutex_lock(&priv->reg_mutex); +- qca8k_fdb_access(priv, QCA8K_FDB_FLUSH_PORT, port); +- mutex_unlock(&priv->reg_mutex); +-} +- +-static int +-qca8k_set_ageing_time(struct dsa_switch *ds, unsigned int msecs) +-{ +- struct qca8k_priv *priv = ds->priv; +- unsigned int secs = msecs / 1000; +- u32 val; +- +- /* AGE_TIME reg is set in 7s step */ +- val = secs / 7; +- +- /* Handle case with 0 as val to NOT disable +- * learning +- */ +- if (!val) +- val = 1; +- +- return regmap_update_bits(priv->regmap, QCA8K_REG_ATU_CTRL, QCA8K_ATU_AGE_TIME_MASK, +- QCA8K_ATU_AGE_TIME(val)); +-} +- +-static int +-qca8k_port_enable(struct dsa_switch *ds, int port, +- struct phy_device *phy) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- +- qca8k_port_set_status(priv, port, 1); +- priv->port_enabled_map |= BIT(port); +- +- if (dsa_is_user_port(ds, port)) +- phy_support_asym_pause(phy); +- +- return 0; +-} +- +-static void +-qca8k_port_disable(struct dsa_switch *ds, int port) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- +- qca8k_port_set_status(priv, port, 0); +- priv->port_enabled_map &= ~BIT(port); +-} +- +-static int +-qca8k_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) +-{ +- struct qca8k_priv *priv = ds->priv; +- int ret; +- +- /* We have only have a general MTU setting. +- * DSA always set the CPU port's MTU to the largest MTU of the slave +- * ports. +- * Setting MTU just for the CPU port is sufficient to correctly set a +- * value for every port. +- */ +- if (!dsa_is_cpu_port(ds, port)) +- return 0; +- +- /* To change the MAX_FRAME_SIZE the cpu ports must be off or +- * the switch panics. +- * Turn off both cpu ports before applying the new value to prevent +- * this. +- */ +- if (priv->port_enabled_map & BIT(0)) +- qca8k_port_set_status(priv, 0, 0); +- +- if (priv->port_enabled_map & BIT(6)) +- qca8k_port_set_status(priv, 6, 0); +- +- /* Include L2 header / FCS length */ +- ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, new_mtu + ETH_HLEN + ETH_FCS_LEN); +- +- if (priv->port_enabled_map & BIT(0)) +- qca8k_port_set_status(priv, 0, 1); +- +- if (priv->port_enabled_map & BIT(6)) +- qca8k_port_set_status(priv, 6, 1); +- +- return ret; +-} +- +-static int +-qca8k_port_max_mtu(struct dsa_switch *ds, int port) +-{ +- return QCA8K_MAX_MTU; +-} +- +-static int +-qca8k_port_fdb_insert(struct qca8k_priv *priv, const u8 *addr, +- u16 port_mask, u16 vid) +-{ +- /* Set the vid to the port vlan id if no vid is set */ +- if (!vid) +- vid = QCA8K_PORT_VID_DEF; +- +- return qca8k_fdb_add(priv, addr, port_mask, vid, +- QCA8K_ATU_STATUS_STATIC); +-} +- +-static int +-qca8k_port_fdb_add(struct dsa_switch *ds, int port, +- const unsigned char *addr, u16 vid) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- u16 port_mask = BIT(port); +- +- return qca8k_port_fdb_insert(priv, addr, port_mask, vid); +-} +- +-static int +-qca8k_port_fdb_del(struct dsa_switch *ds, int port, +- const unsigned char *addr, u16 vid) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- u16 port_mask = BIT(port); +- +- if (!vid) +- vid = QCA8K_PORT_VID_DEF; +- +- return qca8k_fdb_del(priv, addr, port_mask, vid); +-} +- +-static int +-qca8k_port_fdb_dump(struct dsa_switch *ds, int port, +- dsa_fdb_dump_cb_t *cb, void *data) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- struct qca8k_fdb _fdb = { 0 }; +- int cnt = QCA8K_NUM_FDB_RECORDS; +- bool is_static; +- int ret = 0; +- +- mutex_lock(&priv->reg_mutex); +- while (cnt-- && !qca8k_fdb_next(priv, &_fdb, port)) { +- if (!_fdb.aging) +- break; +- is_static = (_fdb.aging == QCA8K_ATU_STATUS_STATIC); +- ret = cb(_fdb.mac, _fdb.vid, is_static, data); +- if (ret) +- break; +- } +- mutex_unlock(&priv->reg_mutex); +- +- return 0; +-} +- +-static int +-qca8k_port_mdb_add(struct dsa_switch *ds, int port, +- const struct switchdev_obj_port_mdb *mdb) +-{ +- struct qca8k_priv *priv = ds->priv; +- const u8 *addr = mdb->addr; +- u16 vid = mdb->vid; +- +- return qca8k_fdb_search_and_insert(priv, BIT(port), addr, vid); +-} +- +-static int +-qca8k_port_mdb_del(struct dsa_switch *ds, int port, +- const struct switchdev_obj_port_mdb *mdb) +-{ +- struct qca8k_priv *priv = ds->priv; +- const u8 *addr = mdb->addr; +- u16 vid = mdb->vid; +- +- return qca8k_fdb_search_and_del(priv, BIT(port), addr, vid); +-} +- +-static int +-qca8k_port_mirror_add(struct dsa_switch *ds, int port, +- struct dsa_mall_mirror_tc_entry *mirror, +- bool ingress) +-{ +- struct qca8k_priv *priv = ds->priv; +- int monitor_port, ret; +- u32 reg, val; +- +- /* Check for existent entry */ +- if ((ingress ? priv->mirror_rx : priv->mirror_tx) & BIT(port)) +- return -EEXIST; +- +- ret = regmap_read(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, &val); +- if (ret) +- return ret; +- +- /* QCA83xx can have only one port set to mirror mode. +- * Check that the correct port is requested and return error otherwise. +- * When no mirror port is set, the values is set to 0xF +- */ +- monitor_port = FIELD_GET(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); +- if (monitor_port != 0xF && monitor_port != mirror->to_local_port) +- return -EEXIST; +- +- /* Set the monitor port */ +- val = FIELD_PREP(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, +- mirror->to_local_port); +- ret = regmap_update_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, +- QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); +- if (ret) +- return ret; +- +- if (ingress) { +- reg = QCA8K_PORT_LOOKUP_CTRL(port); +- val = QCA8K_PORT_LOOKUP_ING_MIRROR_EN; +- } else { +- reg = QCA8K_REG_PORT_HOL_CTRL1(port); +- val = QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN; +- } +- +- ret = regmap_update_bits(priv->regmap, reg, val, val); +- if (ret) +- return ret; +- +- /* Track mirror port for tx and rx to decide when the +- * mirror port has to be disabled. +- */ +- if (ingress) +- priv->mirror_rx |= BIT(port); +- else +- priv->mirror_tx |= BIT(port); +- +- return 0; +-} +- +-static void +-qca8k_port_mirror_del(struct dsa_switch *ds, int port, +- struct dsa_mall_mirror_tc_entry *mirror) +-{ +- struct qca8k_priv *priv = ds->priv; +- u32 reg, val; +- int ret; +- +- if (mirror->ingress) { +- reg = QCA8K_PORT_LOOKUP_CTRL(port); +- val = QCA8K_PORT_LOOKUP_ING_MIRROR_EN; +- } else { +- reg = QCA8K_REG_PORT_HOL_CTRL1(port); +- val = QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN; +- } +- +- ret = regmap_clear_bits(priv->regmap, reg, val); +- if (ret) +- goto err; +- +- if (mirror->ingress) +- priv->mirror_rx &= ~BIT(port); +- else +- priv->mirror_tx &= ~BIT(port); +- +- /* No port set to send packet to mirror port. Disable mirror port */ +- if (!priv->mirror_rx && !priv->mirror_tx) { +- val = FIELD_PREP(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, 0xF); +- ret = regmap_update_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, +- QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); +- if (ret) +- goto err; +- } +-err: +- dev_err(priv->dev, "Failed to del mirror port from %d", port); +-} +- +-static int +-qca8k_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering, +- struct netlink_ext_ack *extack) +-{ +- struct qca8k_priv *priv = ds->priv; +- int ret; +- +- if (vlan_filtering) { +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), +- QCA8K_PORT_LOOKUP_VLAN_MODE_MASK, +- QCA8K_PORT_LOOKUP_VLAN_MODE_SECURE); +- } else { +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), +- QCA8K_PORT_LOOKUP_VLAN_MODE_MASK, +- QCA8K_PORT_LOOKUP_VLAN_MODE_NONE); +- } +- +- return ret; +-} +- +-static int +-qca8k_port_vlan_add(struct dsa_switch *ds, int port, +- const struct switchdev_obj_port_vlan *vlan, +- struct netlink_ext_ack *extack) +-{ +- bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; +- bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID; +- struct qca8k_priv *priv = ds->priv; +- int ret; +- +- ret = qca8k_vlan_add(priv, port, vlan->vid, untagged); +- if (ret) { +- dev_err(priv->dev, "Failed to add VLAN to port %d (%d)", port, ret); +- return ret; +- } +- +- if (pvid) { +- ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(port), +- QCA8K_EGREES_VLAN_PORT_MASK(port), +- QCA8K_EGREES_VLAN_PORT(port, vlan->vid)); +- if (ret) +- return ret; +- +- ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(port), +- QCA8K_PORT_VLAN_CVID(vlan->vid) | +- QCA8K_PORT_VLAN_SVID(vlan->vid)); +- } +- +- return ret; +-} +- +-static int +-qca8k_port_vlan_del(struct dsa_switch *ds, int port, +- const struct switchdev_obj_port_vlan *vlan) +-{ +- struct qca8k_priv *priv = ds->priv; +- int ret; +- +- ret = qca8k_vlan_del(priv, port, vlan->vid); +- if (ret) +- dev_err(priv->dev, "Failed to delete VLAN from port %d (%d)", port, ret); +- +- return ret; +-} +- +-static u32 qca8k_get_phy_flags(struct dsa_switch *ds, int port) +-{ +- struct qca8k_priv *priv = ds->priv; +- +- /* Communicate to the phy internal driver the switch revision. +- * Based on the switch revision different values needs to be +- * set to the dbg and mmd reg on the phy. +- * The first 2 bit are used to communicate the switch revision +- * to the phy driver. +- */ +- if (port > 0 && port < 6) +- return priv->switch_revision; +- +- return 0; +-} +- +-static enum dsa_tag_protocol +-qca8k_get_tag_protocol(struct dsa_switch *ds, int port, +- enum dsa_tag_protocol mp) +-{ +- return DSA_TAG_PROTO_QCA; +-} +- +-static bool +-qca8k_lag_can_offload(struct dsa_switch *ds, +- struct net_device *lag, +- struct netdev_lag_upper_info *info) +-{ +- struct dsa_port *dp; +- int id, members = 0; +- +- id = dsa_lag_id(ds->dst, lag); +- if (id < 0 || id >= ds->num_lag_ids) +- return false; +- +- dsa_lag_foreach_port(dp, ds->dst, lag) +- /* Includes the port joining the LAG */ +- members++; +- +- if (members > QCA8K_NUM_PORTS_FOR_LAG) +- return false; +- +- if (info->tx_type != NETDEV_LAG_TX_TYPE_HASH) +- return false; +- +- if (info->hash_type != NETDEV_LAG_HASH_L2 && +- info->hash_type != NETDEV_LAG_HASH_L23) +- return false; +- +- return true; +-} +- +-static int +-qca8k_lag_setup_hash(struct dsa_switch *ds, +- struct net_device *lag, +- struct netdev_lag_upper_info *info) +-{ +- struct qca8k_priv *priv = ds->priv; +- bool unique_lag = true; +- u32 hash = 0; +- int i, id; +- +- id = dsa_lag_id(ds->dst, lag); +- +- switch (info->hash_type) { +- case NETDEV_LAG_HASH_L23: +- hash |= QCA8K_TRUNK_HASH_SIP_EN; +- hash |= QCA8K_TRUNK_HASH_DIP_EN; +- fallthrough; +- case NETDEV_LAG_HASH_L2: +- hash |= QCA8K_TRUNK_HASH_SA_EN; +- hash |= QCA8K_TRUNK_HASH_DA_EN; +- break; +- default: /* We should NEVER reach this */ +- return -EOPNOTSUPP; +- } +- +- /* Check if we are the unique configured LAG */ +- dsa_lags_foreach_id(i, ds->dst) +- if (i != id && dsa_lag_dev(ds->dst, i)) { +- unique_lag = false; +- break; +- } +- +- /* Hash Mode is global. Make sure the same Hash Mode +- * is set to all the 4 possible lag. +- * If we are the unique LAG we can set whatever hash +- * mode we want. +- * To change hash mode it's needed to remove all LAG +- * and change the mode with the latest. +- */ +- if (unique_lag) { +- priv->lag_hash_mode = hash; +- } else if (priv->lag_hash_mode != hash) { +- netdev_err(lag, "Error: Mismateched Hash Mode across different lag is not supported\n"); +- return -EOPNOTSUPP; +- } +- +- return regmap_update_bits(priv->regmap, QCA8K_TRUNK_HASH_EN_CTRL, +- QCA8K_TRUNK_HASH_MASK, hash); +-} +- +-static int +-qca8k_lag_refresh_portmap(struct dsa_switch *ds, int port, +- struct net_device *lag, bool delete) +-{ +- struct qca8k_priv *priv = ds->priv; +- int ret, id, i; +- u32 val; +- +- id = dsa_lag_id(ds->dst, lag); +- +- /* Read current port member */ +- ret = regmap_read(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL0, &val); +- if (ret) +- return ret; +- +- /* Shift val to the correct trunk */ +- val >>= QCA8K_REG_GOL_TRUNK_SHIFT(id); +- val &= QCA8K_REG_GOL_TRUNK_MEMBER_MASK; +- if (delete) +- val &= ~BIT(port); +- else +- val |= BIT(port); +- +- /* Update port member. With empty portmap disable trunk */ +- ret = regmap_update_bits(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL0, +- QCA8K_REG_GOL_TRUNK_MEMBER(id) | +- QCA8K_REG_GOL_TRUNK_EN(id), +- !val << QCA8K_REG_GOL_TRUNK_SHIFT(id) | +- val << QCA8K_REG_GOL_TRUNK_SHIFT(id)); +- +- /* Search empty member if adding or port on deleting */ +- for (i = 0; i < QCA8K_NUM_PORTS_FOR_LAG; i++) { +- ret = regmap_read(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL(id), &val); +- if (ret) +- return ret; +- +- val >>= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i); +- val &= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_MASK; +- +- if (delete) { +- /* If port flagged to be disabled assume this member is +- * empty +- */ +- if (val != QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK) +- continue; +- +- val &= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT_MASK; +- if (val != port) +- continue; +- } else { +- /* If port flagged to be enabled assume this member is +- * already set +- */ +- if (val == QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK) +- continue; +- } +- +- /* We have found the member to add/remove */ +- break; +- } +- +- /* Set port in the correct port mask or disable port if in delete mode */ +- return regmap_update_bits(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL(id), +- QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN(id, i) | +- QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT(id, i), +- !delete << QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i) | +- port << QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i)); +-} +- +-static int +-qca8k_port_lag_join(struct dsa_switch *ds, int port, +- struct net_device *lag, +- struct netdev_lag_upper_info *info) +-{ +- int ret; +- +- if (!qca8k_lag_can_offload(ds, lag, info)) +- return -EOPNOTSUPP; +- +- ret = qca8k_lag_setup_hash(ds, lag, info); +- if (ret) +- return ret; +- +- return qca8k_lag_refresh_portmap(ds, port, lag, false); +-} +- +-static int +-qca8k_port_lag_leave(struct dsa_switch *ds, int port, +- struct net_device *lag) +-{ +- return qca8k_lag_refresh_portmap(ds, port, lag, true); +-} +- +-static void +-qca8k_master_change(struct dsa_switch *ds, const struct net_device *master, +- bool operational) +-{ +- struct dsa_port *dp = master->dsa_ptr; +- struct qca8k_priv *priv = ds->priv; +- +- /* Ethernet MIB/MDIO is only supported for CPU port 0 */ +- if (dp->index != 0) +- return; +- +- mutex_lock(&priv->mgmt_eth_data.mutex); +- mutex_lock(&priv->mib_eth_data.mutex); +- +- priv->mgmt_master = operational ? (struct net_device *)master : NULL; +- +- mutex_unlock(&priv->mib_eth_data.mutex); +- mutex_unlock(&priv->mgmt_eth_data.mutex); +-} +- +-static int qca8k_connect_tag_protocol(struct dsa_switch *ds, +- enum dsa_tag_protocol proto) +-{ +- struct qca_tagger_data *tagger_data; +- +- switch (proto) { +- case DSA_TAG_PROTO_QCA: +- tagger_data = ds->tagger_data; +- +- tagger_data->rw_reg_ack_handler = qca8k_rw_reg_ack_handler; +- tagger_data->mib_autocast_handler = qca8k_mib_autocast_handler; +- +- break; +- default: +- return -EOPNOTSUPP; +- } +- +- return 0; +-} +- +-static const struct dsa_switch_ops qca8k_switch_ops = { +- .get_tag_protocol = qca8k_get_tag_protocol, +- .setup = qca8k_setup, +- .get_strings = qca8k_get_strings, +- .get_ethtool_stats = qca8k_get_ethtool_stats, +- .get_sset_count = qca8k_get_sset_count, +- .set_ageing_time = qca8k_set_ageing_time, +- .get_mac_eee = qca8k_get_mac_eee, +- .set_mac_eee = qca8k_set_mac_eee, +- .port_enable = qca8k_port_enable, +- .port_disable = qca8k_port_disable, +- .port_change_mtu = qca8k_port_change_mtu, +- .port_max_mtu = qca8k_port_max_mtu, +- .port_stp_state_set = qca8k_port_stp_state_set, +- .port_bridge_join = qca8k_port_bridge_join, +- .port_bridge_leave = qca8k_port_bridge_leave, +- .port_fast_age = qca8k_port_fast_age, +- .port_fdb_add = qca8k_port_fdb_add, +- .port_fdb_del = qca8k_port_fdb_del, +- .port_fdb_dump = qca8k_port_fdb_dump, +- .port_mdb_add = qca8k_port_mdb_add, +- .port_mdb_del = qca8k_port_mdb_del, +- .port_mirror_add = qca8k_port_mirror_add, +- .port_mirror_del = qca8k_port_mirror_del, +- .port_vlan_filtering = qca8k_port_vlan_filtering, +- .port_vlan_add = qca8k_port_vlan_add, +- .port_vlan_del = qca8k_port_vlan_del, +- .phylink_validate = qca8k_phylink_validate, +- .phylink_mac_link_state = qca8k_phylink_mac_link_state, +- .phylink_mac_config = qca8k_phylink_mac_config, +- .phylink_mac_link_down = qca8k_phylink_mac_link_down, +- .phylink_mac_link_up = qca8k_phylink_mac_link_up, +- .get_phy_flags = qca8k_get_phy_flags, +- .port_lag_join = qca8k_port_lag_join, +- .port_lag_leave = qca8k_port_lag_leave, +- .master_state_change = qca8k_master_change, +- .connect_tag_protocol = qca8k_connect_tag_protocol, +-}; +- +-static int qca8k_read_switch_id(struct qca8k_priv *priv) +-{ +- u32 val; +- u8 id; +- int ret; +- +- if (!priv->info) +- return -ENODEV; +- +- ret = qca8k_read(priv, QCA8K_REG_MASK_CTRL, &val); +- if (ret < 0) +- return -ENODEV; +- +- id = QCA8K_MASK_CTRL_DEVICE_ID(val); +- if (id != priv->info->id) { +- dev_err(priv->dev, +- "Switch id detected %x but expected %x", +- id, priv->info->id); +- return -ENODEV; +- } +- +- priv->switch_id = id; +- +- /* Save revision to communicate to the internal PHY driver */ +- priv->switch_revision = QCA8K_MASK_CTRL_REV_ID(val); +- +- return 0; +-} +- +-static int +-qca8k_sw_probe(struct mdio_device *mdiodev) +-{ +- struct qca8k_priv *priv; +- int ret; +- +- /* allocate the private data struct so that we can probe the switches +- * ID register +- */ +- priv = devm_kzalloc(&mdiodev->dev, sizeof(*priv), GFP_KERNEL); +- if (!priv) +- return -ENOMEM; +- +- priv->info = of_device_get_match_data(priv->dev); +- priv->bus = mdiodev->bus; +- priv->dev = &mdiodev->dev; +- +- priv->reset_gpio = devm_gpiod_get_optional(priv->dev, "reset", +- GPIOD_ASIS); +- if (IS_ERR(priv->reset_gpio)) +- return PTR_ERR(priv->reset_gpio); +- +- if (priv->reset_gpio) { +- gpiod_set_value_cansleep(priv->reset_gpio, 1); +- /* The active low duration must be greater than 10 ms +- * and checkpatch.pl wants 20 ms. +- */ +- msleep(20); +- gpiod_set_value_cansleep(priv->reset_gpio, 0); +- } +- +- /* Start by setting up the register mapping */ +- priv->regmap = devm_regmap_init(&mdiodev->dev, NULL, priv, +- &qca8k_regmap_config); +- if (IS_ERR(priv->regmap)) { +- dev_err(priv->dev, "regmap initialization failed"); +- return PTR_ERR(priv->regmap); +- } +- +- priv->mdio_cache.page = 0xffff; +- priv->mdio_cache.lo = 0xffff; +- priv->mdio_cache.hi = 0xffff; +- +- /* Check the detected switch id */ +- ret = qca8k_read_switch_id(priv); +- if (ret) +- return ret; +- +- priv->ds = devm_kzalloc(&mdiodev->dev, sizeof(*priv->ds), GFP_KERNEL); +- if (!priv->ds) +- return -ENOMEM; +- +- mutex_init(&priv->mgmt_eth_data.mutex); +- init_completion(&priv->mgmt_eth_data.rw_done); +- +- mutex_init(&priv->mib_eth_data.mutex); +- init_completion(&priv->mib_eth_data.rw_done); +- +- priv->ds->dev = &mdiodev->dev; +- priv->ds->num_ports = QCA8K_NUM_PORTS; +- priv->ds->priv = priv; +- priv->ds->ops = &qca8k_switch_ops; +- mutex_init(&priv->reg_mutex); +- dev_set_drvdata(&mdiodev->dev, priv); +- +- return dsa_register_switch(priv->ds); +-} +- +-static void +-qca8k_sw_remove(struct mdio_device *mdiodev) +-{ +- struct qca8k_priv *priv = dev_get_drvdata(&mdiodev->dev); +- int i; +- +- if (!priv) +- return; +- +- for (i = 0; i < QCA8K_NUM_PORTS; i++) +- qca8k_port_set_status(priv, i, 0); +- +- dsa_unregister_switch(priv->ds); +- +- dev_set_drvdata(&mdiodev->dev, NULL); +-} +- +-static void qca8k_sw_shutdown(struct mdio_device *mdiodev) +-{ +- struct qca8k_priv *priv = dev_get_drvdata(&mdiodev->dev); +- +- if (!priv) +- return; +- +- dsa_switch_shutdown(priv->ds); +- +- dev_set_drvdata(&mdiodev->dev, NULL); +-} +- +-#ifdef CONFIG_PM_SLEEP +-static void +-qca8k_set_pm(struct qca8k_priv *priv, int enable) +-{ +- int port; +- +- for (port = 0; port < QCA8K_NUM_PORTS; port++) { +- /* Do not enable on resume if the port was +- * disabled before. +- */ +- if (!(priv->port_enabled_map & BIT(port))) +- continue; +- +- qca8k_port_set_status(priv, port, enable); +- } +-} +- +-static int qca8k_suspend(struct device *dev) +-{ +- struct qca8k_priv *priv = dev_get_drvdata(dev); +- +- qca8k_set_pm(priv, 0); +- +- return dsa_switch_suspend(priv->ds); +-} +- +-static int qca8k_resume(struct device *dev) +-{ +- struct qca8k_priv *priv = dev_get_drvdata(dev); +- +- qca8k_set_pm(priv, 1); +- +- return dsa_switch_resume(priv->ds); +-} +-#endif /* CONFIG_PM_SLEEP */ +- +-static SIMPLE_DEV_PM_OPS(qca8k_pm_ops, +- qca8k_suspend, qca8k_resume); +- +-static const struct qca8k_info_ops qca8xxx_ops = { +- .autocast_mib = qca8k_get_ethtool_stats_eth, +-}; +- +-static const struct qca8k_match_data qca8327 = { +- .id = QCA8K_ID_QCA8327, +- .reduced_package = true, +- .mib_count = QCA8K_QCA832X_MIB_COUNT, +- .ops = &qca8xxx_ops, +-}; +- +-static const struct qca8k_match_data qca8328 = { +- .id = QCA8K_ID_QCA8327, +- .mib_count = QCA8K_QCA832X_MIB_COUNT, +- .ops = &qca8xxx_ops, +-}; +- +-static const struct qca8k_match_data qca833x = { +- .id = QCA8K_ID_QCA8337, +- .mib_count = QCA8K_QCA833X_MIB_COUNT, +- .ops = &qca8xxx_ops, +-}; +- +-static const struct of_device_id qca8k_of_match[] = { +- { .compatible = "qca,qca8327", .data = &qca8327 }, +- { .compatible = "qca,qca8328", .data = &qca8328 }, +- { .compatible = "qca,qca8334", .data = &qca833x }, +- { .compatible = "qca,qca8337", .data = &qca833x }, +- { /* sentinel */ }, +-}; +- +-static struct mdio_driver qca8kmdio_driver = { +- .probe = qca8k_sw_probe, +- .remove = qca8k_sw_remove, +- .shutdown = qca8k_sw_shutdown, +- .mdiodrv.driver = { +- .name = "qca8k", +- .of_match_table = qca8k_of_match, +- .pm = &qca8k_pm_ops, +- }, +-}; +- +-mdio_module_driver(qca8kmdio_driver); +- +-MODULE_AUTHOR("Mathieu Olivari, John Crispin "); +-MODULE_DESCRIPTION("Driver for QCA8K ethernet switch family"); +-MODULE_LICENSE("GPL v2"); +-MODULE_ALIAS("platform:qca8k"); +--- /dev/null ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -0,0 +1,3186 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2009 Felix Fietkau ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * Copyright (c) 2015, 2019, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2016 John Crispin ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "qca8k.h" ++ ++static void ++qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page) ++{ ++ regaddr >>= 1; ++ *r1 = regaddr & 0x1e; ++ ++ regaddr >>= 5; ++ *r2 = regaddr & 0x7; ++ ++ regaddr >>= 3; ++ *page = regaddr & 0x3ff; ++} ++ ++static int ++qca8k_set_lo(struct qca8k_priv *priv, int phy_id, u32 regnum, u16 lo) ++{ ++ u16 *cached_lo = &priv->mdio_cache.lo; ++ struct mii_bus *bus = priv->bus; ++ int ret; ++ ++ if (lo == *cached_lo) ++ return 0; ++ ++ ret = bus->write(bus, phy_id, regnum, lo); ++ if (ret < 0) ++ dev_err_ratelimited(&bus->dev, ++ "failed to write qca8k 32bit lo register\n"); ++ ++ *cached_lo = lo; ++ return 0; ++} ++ ++static int ++qca8k_set_hi(struct qca8k_priv *priv, int phy_id, u32 regnum, u16 hi) ++{ ++ u16 *cached_hi = &priv->mdio_cache.hi; ++ struct mii_bus *bus = priv->bus; ++ int ret; ++ ++ if (hi == *cached_hi) ++ return 0; ++ ++ ret = bus->write(bus, phy_id, regnum, hi); ++ if (ret < 0) ++ dev_err_ratelimited(&bus->dev, ++ "failed to write qca8k 32bit hi register\n"); ++ ++ *cached_hi = hi; ++ return 0; ++} ++ ++static int ++qca8k_mii_read32(struct mii_bus *bus, int phy_id, u32 regnum, u32 *val) ++{ ++ int ret; ++ ++ ret = bus->read(bus, phy_id, regnum); ++ if (ret >= 0) { ++ *val = ret; ++ ret = bus->read(bus, phy_id, regnum + 1); ++ *val |= ret << 16; ++ } ++ ++ if (ret < 0) { ++ dev_err_ratelimited(&bus->dev, ++ "failed to read qca8k 32bit register\n"); ++ *val = 0; ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static void ++qca8k_mii_write32(struct qca8k_priv *priv, int phy_id, u32 regnum, u32 val) ++{ ++ u16 lo, hi; ++ int ret; ++ ++ lo = val & 0xffff; ++ hi = (u16)(val >> 16); ++ ++ ret = qca8k_set_lo(priv, phy_id, regnum, lo); ++ if (ret >= 0) ++ ret = qca8k_set_hi(priv, phy_id, regnum + 1, hi); ++} ++ ++static int ++qca8k_set_page(struct qca8k_priv *priv, u16 page) ++{ ++ u16 *cached_page = &priv->mdio_cache.page; ++ struct mii_bus *bus = priv->bus; ++ int ret; ++ ++ if (page == *cached_page) ++ return 0; ++ ++ ret = bus->write(bus, 0x18, 0, page); ++ if (ret < 0) { ++ dev_err_ratelimited(&bus->dev, ++ "failed to set qca8k page\n"); ++ return ret; ++ } ++ ++ *cached_page = page; ++ usleep_range(1000, 2000); ++ return 0; ++} ++ ++static int ++qca8k_read(struct qca8k_priv *priv, u32 reg, u32 *val) ++{ ++ return regmap_read(priv->regmap, reg, val); ++} ++ ++static int ++qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val) ++{ ++ return regmap_write(priv->regmap, reg, val); ++} ++ ++static int ++qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val) ++{ ++ return regmap_update_bits(priv->regmap, reg, mask, write_val); ++} ++ ++static void qca8k_rw_reg_ack_handler(struct dsa_switch *ds, struct sk_buff *skb) ++{ ++ struct qca8k_mgmt_eth_data *mgmt_eth_data; ++ struct qca8k_priv *priv = ds->priv; ++ struct qca_mgmt_ethhdr *mgmt_ethhdr; ++ u8 len, cmd; ++ ++ mgmt_ethhdr = (struct qca_mgmt_ethhdr *)skb_mac_header(skb); ++ mgmt_eth_data = &priv->mgmt_eth_data; ++ ++ cmd = FIELD_GET(QCA_HDR_MGMT_CMD, mgmt_ethhdr->command); ++ len = FIELD_GET(QCA_HDR_MGMT_LENGTH, mgmt_ethhdr->command); ++ ++ /* Make sure the seq match the requested packet */ ++ if (mgmt_ethhdr->seq == mgmt_eth_data->seq) ++ mgmt_eth_data->ack = true; ++ ++ if (cmd == MDIO_READ) { ++ mgmt_eth_data->data[0] = mgmt_ethhdr->mdio_data; ++ ++ /* Get the rest of the 12 byte of data. ++ * The read/write function will extract the requested data. ++ */ ++ if (len > QCA_HDR_MGMT_DATA1_LEN) ++ memcpy(mgmt_eth_data->data + 1, skb->data, ++ QCA_HDR_MGMT_DATA2_LEN); ++ } ++ ++ complete(&mgmt_eth_data->rw_done); ++} ++ ++static struct sk_buff *qca8k_alloc_mdio_header(enum mdio_cmd cmd, u32 reg, u32 *val, ++ int priority, unsigned int len) ++{ ++ struct qca_mgmt_ethhdr *mgmt_ethhdr; ++ unsigned int real_len; ++ struct sk_buff *skb; ++ u32 *data2; ++ u16 hdr; ++ ++ skb = dev_alloc_skb(QCA_HDR_MGMT_PKT_LEN); ++ if (!skb) ++ return NULL; ++ ++ /* Max value for len reg is 15 (0xf) but the switch actually return 16 byte ++ * Actually for some reason the steps are: ++ * 0: nothing ++ * 1-4: first 4 byte ++ * 5-6: first 12 byte ++ * 7-15: all 16 byte ++ */ ++ if (len == 16) ++ real_len = 15; ++ else ++ real_len = len; ++ ++ skb_reset_mac_header(skb); ++ skb_set_network_header(skb, skb->len); ++ ++ mgmt_ethhdr = skb_push(skb, QCA_HDR_MGMT_HEADER_LEN + QCA_HDR_LEN); ++ ++ hdr = FIELD_PREP(QCA_HDR_XMIT_VERSION, QCA_HDR_VERSION); ++ hdr |= FIELD_PREP(QCA_HDR_XMIT_PRIORITY, priority); ++ hdr |= QCA_HDR_XMIT_FROM_CPU; ++ hdr |= FIELD_PREP(QCA_HDR_XMIT_DP_BIT, BIT(0)); ++ hdr |= FIELD_PREP(QCA_HDR_XMIT_CONTROL, QCA_HDR_XMIT_TYPE_RW_REG); ++ ++ mgmt_ethhdr->command = FIELD_PREP(QCA_HDR_MGMT_ADDR, reg); ++ mgmt_ethhdr->command |= FIELD_PREP(QCA_HDR_MGMT_LENGTH, real_len); ++ mgmt_ethhdr->command |= FIELD_PREP(QCA_HDR_MGMT_CMD, cmd); ++ mgmt_ethhdr->command |= FIELD_PREP(QCA_HDR_MGMT_CHECK_CODE, ++ QCA_HDR_MGMT_CHECK_CODE_VAL); ++ ++ if (cmd == MDIO_WRITE) ++ mgmt_ethhdr->mdio_data = *val; ++ ++ mgmt_ethhdr->hdr = htons(hdr); ++ ++ data2 = skb_put_zero(skb, QCA_HDR_MGMT_DATA2_LEN + QCA_HDR_MGMT_PADDING_LEN); ++ if (cmd == MDIO_WRITE && len > QCA_HDR_MGMT_DATA1_LEN) ++ memcpy(data2, val + 1, len - QCA_HDR_MGMT_DATA1_LEN); ++ ++ return skb; ++} ++ ++static void qca8k_mdio_header_fill_seq_num(struct sk_buff *skb, u32 seq_num) ++{ ++ struct qca_mgmt_ethhdr *mgmt_ethhdr; ++ ++ mgmt_ethhdr = (struct qca_mgmt_ethhdr *)skb->data; ++ mgmt_ethhdr->seq = FIELD_PREP(QCA_HDR_MGMT_SEQ_NUM, seq_num); ++} ++ ++static int qca8k_read_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) ++{ ++ struct qca8k_mgmt_eth_data *mgmt_eth_data = &priv->mgmt_eth_data; ++ struct sk_buff *skb; ++ bool ack; ++ int ret; ++ ++ skb = qca8k_alloc_mdio_header(MDIO_READ, reg, NULL, ++ QCA8K_ETHERNET_MDIO_PRIORITY, len); ++ if (!skb) ++ return -ENOMEM; ++ ++ mutex_lock(&mgmt_eth_data->mutex); ++ ++ /* Check mgmt_master if is operational */ ++ if (!priv->mgmt_master) { ++ kfree_skb(skb); ++ mutex_unlock(&mgmt_eth_data->mutex); ++ return -EINVAL; ++ } ++ ++ skb->dev = priv->mgmt_master; ++ ++ reinit_completion(&mgmt_eth_data->rw_done); ++ ++ /* Increment seq_num and set it in the mdio pkt */ ++ mgmt_eth_data->seq++; ++ qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); ++ mgmt_eth_data->ack = false; ++ ++ dev_queue_xmit(skb); ++ ++ ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, ++ msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT)); ++ ++ *val = mgmt_eth_data->data[0]; ++ if (len > QCA_HDR_MGMT_DATA1_LEN) ++ memcpy(val + 1, mgmt_eth_data->data + 1, len - QCA_HDR_MGMT_DATA1_LEN); ++ ++ ack = mgmt_eth_data->ack; ++ ++ mutex_unlock(&mgmt_eth_data->mutex); ++ ++ if (ret <= 0) ++ return -ETIMEDOUT; ++ ++ if (!ack) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++static int qca8k_write_eth(struct qca8k_priv *priv, u32 reg, u32 *val, int len) ++{ ++ struct qca8k_mgmt_eth_data *mgmt_eth_data = &priv->mgmt_eth_data; ++ struct sk_buff *skb; ++ bool ack; ++ int ret; ++ ++ skb = qca8k_alloc_mdio_header(MDIO_WRITE, reg, val, ++ QCA8K_ETHERNET_MDIO_PRIORITY, len); ++ if (!skb) ++ return -ENOMEM; ++ ++ mutex_lock(&mgmt_eth_data->mutex); ++ ++ /* Check mgmt_master if is operational */ ++ if (!priv->mgmt_master) { ++ kfree_skb(skb); ++ mutex_unlock(&mgmt_eth_data->mutex); ++ return -EINVAL; ++ } ++ ++ skb->dev = priv->mgmt_master; ++ ++ reinit_completion(&mgmt_eth_data->rw_done); ++ ++ /* Increment seq_num and set it in the mdio pkt */ ++ mgmt_eth_data->seq++; ++ qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); ++ mgmt_eth_data->ack = false; ++ ++ dev_queue_xmit(skb); ++ ++ ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, ++ msecs_to_jiffies(QCA8K_ETHERNET_TIMEOUT)); ++ ++ ack = mgmt_eth_data->ack; ++ ++ mutex_unlock(&mgmt_eth_data->mutex); ++ ++ if (ret <= 0) ++ return -ETIMEDOUT; ++ ++ if (!ack) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++static int ++qca8k_regmap_update_bits_eth(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val) ++{ ++ u32 val = 0; ++ int ret; ++ ++ ret = qca8k_read_eth(priv, reg, &val, sizeof(val)); ++ if (ret) ++ return ret; ++ ++ val &= ~mask; ++ val |= write_val; ++ ++ return qca8k_write_eth(priv, reg, &val, sizeof(val)); ++} ++ ++static int ++qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len) ++{ ++ int i, count = len / sizeof(u32), ret; ++ ++ if (priv->mgmt_master && !qca8k_read_eth(priv, reg, val, len)) ++ return 0; ++ ++ for (i = 0; i < count; i++) { ++ ret = regmap_read(priv->regmap, reg + (i * 4), val + i); ++ if (ret < 0) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int ++qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len) ++{ ++ int i, count = len / sizeof(u32), ret; ++ u32 tmp; ++ ++ if (priv->mgmt_master && !qca8k_write_eth(priv, reg, val, len)) ++ return 0; ++ ++ for (i = 0; i < count; i++) { ++ tmp = val[i]; ++ ++ ret = regmap_write(priv->regmap, reg + (i * 4), tmp); ++ if (ret < 0) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int ++qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ctx; ++ struct mii_bus *bus = priv->bus; ++ u16 r1, r2, page; ++ int ret; ++ ++ if (!qca8k_read_eth(priv, reg, val, sizeof(*val))) ++ return 0; ++ ++ qca8k_split_addr(reg, &r1, &r2, &page); ++ ++ mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); ++ ++ ret = qca8k_set_page(priv, page); ++ if (ret < 0) ++ goto exit; ++ ++ ret = qca8k_mii_read32(bus, 0x10 | r2, r1, val); ++ ++exit: ++ mutex_unlock(&bus->mdio_lock); ++ return ret; ++} ++ ++static int ++qca8k_regmap_write(void *ctx, uint32_t reg, uint32_t val) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ctx; ++ struct mii_bus *bus = priv->bus; ++ u16 r1, r2, page; ++ int ret; ++ ++ if (!qca8k_write_eth(priv, reg, &val, sizeof(val))) ++ return 0; ++ ++ qca8k_split_addr(reg, &r1, &r2, &page); ++ ++ mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); ++ ++ ret = qca8k_set_page(priv, page); ++ if (ret < 0) ++ goto exit; ++ ++ qca8k_mii_write32(priv, 0x10 | r2, r1, val); ++ ++exit: ++ mutex_unlock(&bus->mdio_lock); ++ return ret; ++} ++ ++static int ++qca8k_regmap_update_bits(void *ctx, uint32_t reg, uint32_t mask, uint32_t write_val) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ctx; ++ struct mii_bus *bus = priv->bus; ++ u16 r1, r2, page; ++ u32 val; ++ int ret; ++ ++ if (!qca8k_regmap_update_bits_eth(priv, reg, mask, write_val)) ++ return 0; ++ ++ qca8k_split_addr(reg, &r1, &r2, &page); ++ ++ mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); ++ ++ ret = qca8k_set_page(priv, page); ++ if (ret < 0) ++ goto exit; ++ ++ ret = qca8k_mii_read32(bus, 0x10 | r2, r1, &val); ++ if (ret < 0) ++ goto exit; ++ ++ val &= ~mask; ++ val |= write_val; ++ qca8k_mii_write32(priv, 0x10 | r2, r1, val); ++ ++exit: ++ mutex_unlock(&bus->mdio_lock); ++ ++ return ret; ++} ++ ++static const struct regmap_range qca8k_readable_ranges[] = { ++ regmap_reg_range(0x0000, 0x00e4), /* Global control */ ++ regmap_reg_range(0x0100, 0x0168), /* EEE control */ ++ regmap_reg_range(0x0200, 0x0270), /* Parser control */ ++ regmap_reg_range(0x0400, 0x0454), /* ACL */ ++ regmap_reg_range(0x0600, 0x0718), /* Lookup */ ++ regmap_reg_range(0x0800, 0x0b70), /* QM */ ++ regmap_reg_range(0x0c00, 0x0c80), /* PKT */ ++ regmap_reg_range(0x0e00, 0x0e98), /* L3 */ ++ regmap_reg_range(0x1000, 0x10ac), /* MIB - Port0 */ ++ regmap_reg_range(0x1100, 0x11ac), /* MIB - Port1 */ ++ regmap_reg_range(0x1200, 0x12ac), /* MIB - Port2 */ ++ regmap_reg_range(0x1300, 0x13ac), /* MIB - Port3 */ ++ regmap_reg_range(0x1400, 0x14ac), /* MIB - Port4 */ ++ regmap_reg_range(0x1500, 0x15ac), /* MIB - Port5 */ ++ regmap_reg_range(0x1600, 0x16ac), /* MIB - Port6 */ ++ ++}; ++ ++static const struct regmap_access_table qca8k_readable_table = { ++ .yes_ranges = qca8k_readable_ranges, ++ .n_yes_ranges = ARRAY_SIZE(qca8k_readable_ranges), ++}; ++ ++static struct regmap_config qca8k_regmap_config = { ++ .reg_bits = 16, ++ .val_bits = 32, ++ .reg_stride = 4, ++ .max_register = 0x16ac, /* end MIB - Port6 range */ ++ .reg_read = qca8k_regmap_read, ++ .reg_write = qca8k_regmap_write, ++ .reg_update_bits = qca8k_regmap_update_bits, ++ .rd_table = &qca8k_readable_table, ++ .disable_locking = true, /* Locking is handled by qca8k read/write */ ++ .cache_type = REGCACHE_NONE, /* Explicitly disable CACHE */ ++}; ++ ++static int ++qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask) ++{ ++ u32 val; ++ ++ return regmap_read_poll_timeout(priv->regmap, reg, val, !(val & mask), 0, ++ QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC); ++} ++ ++static int ++qca8k_fdb_read(struct qca8k_priv *priv, struct qca8k_fdb *fdb) ++{ ++ u32 reg[3]; ++ int ret; ++ ++ /* load the ARL table into an array */ ++ ret = qca8k_bulk_read(priv, QCA8K_REG_ATU_DATA0, reg, sizeof(reg)); ++ if (ret) ++ return ret; ++ ++ /* vid - 83:72 */ ++ fdb->vid = FIELD_GET(QCA8K_ATU_VID_MASK, reg[2]); ++ /* aging - 67:64 */ ++ fdb->aging = FIELD_GET(QCA8K_ATU_STATUS_MASK, reg[2]); ++ /* portmask - 54:48 */ ++ fdb->port_mask = FIELD_GET(QCA8K_ATU_PORT_MASK, reg[1]); ++ /* mac - 47:0 */ ++ fdb->mac[0] = FIELD_GET(QCA8K_ATU_ADDR0_MASK, reg[1]); ++ fdb->mac[1] = FIELD_GET(QCA8K_ATU_ADDR1_MASK, reg[1]); ++ fdb->mac[2] = FIELD_GET(QCA8K_ATU_ADDR2_MASK, reg[0]); ++ fdb->mac[3] = FIELD_GET(QCA8K_ATU_ADDR3_MASK, reg[0]); ++ fdb->mac[4] = FIELD_GET(QCA8K_ATU_ADDR4_MASK, reg[0]); ++ fdb->mac[5] = FIELD_GET(QCA8K_ATU_ADDR5_MASK, reg[0]); ++ ++ return 0; ++} ++ ++static void ++qca8k_fdb_write(struct qca8k_priv *priv, u16 vid, u8 port_mask, const u8 *mac, ++ u8 aging) ++{ ++ u32 reg[3] = { 0 }; ++ ++ /* vid - 83:72 */ ++ reg[2] = FIELD_PREP(QCA8K_ATU_VID_MASK, vid); ++ /* aging - 67:64 */ ++ reg[2] |= FIELD_PREP(QCA8K_ATU_STATUS_MASK, aging); ++ /* portmask - 54:48 */ ++ reg[1] = FIELD_PREP(QCA8K_ATU_PORT_MASK, port_mask); ++ /* mac - 47:0 */ ++ reg[1] |= FIELD_PREP(QCA8K_ATU_ADDR0_MASK, mac[0]); ++ reg[1] |= FIELD_PREP(QCA8K_ATU_ADDR1_MASK, mac[1]); ++ reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR2_MASK, mac[2]); ++ reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR3_MASK, mac[3]); ++ reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR4_MASK, mac[4]); ++ reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR5_MASK, mac[5]); ++ ++ /* load the array into the ARL table */ ++ qca8k_bulk_write(priv, QCA8K_REG_ATU_DATA0, reg, sizeof(reg)); ++} ++ ++static int ++qca8k_fdb_access(struct qca8k_priv *priv, enum qca8k_fdb_cmd cmd, int port) ++{ ++ u32 reg; ++ int ret; ++ ++ /* Set the command and FDB index */ ++ reg = QCA8K_ATU_FUNC_BUSY; ++ reg |= cmd; ++ if (port >= 0) { ++ reg |= QCA8K_ATU_FUNC_PORT_EN; ++ reg |= FIELD_PREP(QCA8K_ATU_FUNC_PORT_MASK, port); ++ } ++ ++ /* Write the function register triggering the table access */ ++ ret = qca8k_write(priv, QCA8K_REG_ATU_FUNC, reg); ++ if (ret) ++ return ret; ++ ++ /* wait for completion */ ++ ret = qca8k_busy_wait(priv, QCA8K_REG_ATU_FUNC, QCA8K_ATU_FUNC_BUSY); ++ if (ret) ++ return ret; ++ ++ /* Check for table full violation when adding an entry */ ++ if (cmd == QCA8K_FDB_LOAD) { ++ ret = qca8k_read(priv, QCA8K_REG_ATU_FUNC, ®); ++ if (ret < 0) ++ return ret; ++ if (reg & QCA8K_ATU_FUNC_FULL) ++ return -1; ++ } ++ ++ return 0; ++} ++ ++static int ++qca8k_fdb_next(struct qca8k_priv *priv, struct qca8k_fdb *fdb, int port) ++{ ++ int ret; ++ ++ qca8k_fdb_write(priv, fdb->vid, fdb->port_mask, fdb->mac, fdb->aging); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_NEXT, port); ++ if (ret < 0) ++ return ret; ++ ++ return qca8k_fdb_read(priv, fdb); ++} ++ ++static int ++qca8k_fdb_add(struct qca8k_priv *priv, const u8 *mac, u16 port_mask, ++ u16 vid, u8 aging) ++{ ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ qca8k_fdb_write(priv, vid, port_mask, mac, aging); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); ++ mutex_unlock(&priv->reg_mutex); ++ ++ return ret; ++} ++ ++static int ++qca8k_fdb_del(struct qca8k_priv *priv, const u8 *mac, u16 port_mask, u16 vid) ++{ ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ qca8k_fdb_write(priv, vid, port_mask, mac, 0); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); ++ mutex_unlock(&priv->reg_mutex); ++ ++ return ret; ++} ++ ++static void ++qca8k_fdb_flush(struct qca8k_priv *priv) ++{ ++ mutex_lock(&priv->reg_mutex); ++ qca8k_fdb_access(priv, QCA8K_FDB_FLUSH, -1); ++ mutex_unlock(&priv->reg_mutex); ++} ++ ++static int ++qca8k_fdb_search_and_insert(struct qca8k_priv *priv, u8 port_mask, ++ const u8 *mac, u16 vid) ++{ ++ struct qca8k_fdb fdb = { 0 }; ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ ++ qca8k_fdb_write(priv, vid, 0, mac, 0); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_SEARCH, -1); ++ if (ret < 0) ++ goto exit; ++ ++ ret = qca8k_fdb_read(priv, &fdb); ++ if (ret < 0) ++ goto exit; ++ ++ /* Rule exist. Delete first */ ++ if (!fdb.aging) { ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); ++ if (ret) ++ goto exit; ++ } ++ ++ /* Add port to fdb portmask */ ++ fdb.port_mask |= port_mask; ++ ++ qca8k_fdb_write(priv, vid, fdb.port_mask, mac, fdb.aging); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); ++ ++exit: ++ mutex_unlock(&priv->reg_mutex); ++ return ret; ++} ++ ++static int ++qca8k_fdb_search_and_del(struct qca8k_priv *priv, u8 port_mask, ++ const u8 *mac, u16 vid) ++{ ++ struct qca8k_fdb fdb = { 0 }; ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ ++ qca8k_fdb_write(priv, vid, 0, mac, 0); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_SEARCH, -1); ++ if (ret < 0) ++ goto exit; ++ ++ /* Rule doesn't exist. Why delete? */ ++ if (!fdb.aging) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); ++ if (ret) ++ goto exit; ++ ++ /* Only port in the rule is this port. Don't re insert */ ++ if (fdb.port_mask == port_mask) ++ goto exit; ++ ++ /* Remove port from port mask */ ++ fdb.port_mask &= ~port_mask; ++ ++ qca8k_fdb_write(priv, vid, fdb.port_mask, mac, fdb.aging); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); ++ ++exit: ++ mutex_unlock(&priv->reg_mutex); ++ return ret; ++} ++ ++static int ++qca8k_vlan_access(struct qca8k_priv *priv, enum qca8k_vlan_cmd cmd, u16 vid) ++{ ++ u32 reg; ++ int ret; ++ ++ /* Set the command and VLAN index */ ++ reg = QCA8K_VTU_FUNC1_BUSY; ++ reg |= cmd; ++ reg |= FIELD_PREP(QCA8K_VTU_FUNC1_VID_MASK, vid); ++ ++ /* Write the function register triggering the table access */ ++ ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC1, reg); ++ if (ret) ++ return ret; ++ ++ /* wait for completion */ ++ ret = qca8k_busy_wait(priv, QCA8K_REG_VTU_FUNC1, QCA8K_VTU_FUNC1_BUSY); ++ if (ret) ++ return ret; ++ ++ /* Check for table full violation when adding an entry */ ++ if (cmd == QCA8K_VLAN_LOAD) { ++ ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC1, ®); ++ if (ret < 0) ++ return ret; ++ if (reg & QCA8K_VTU_FUNC1_FULL) ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++static int ++qca8k_vlan_add(struct qca8k_priv *priv, u8 port, u16 vid, bool untagged) ++{ ++ u32 reg; ++ int ret; ++ ++ /* ++ We do the right thing with VLAN 0 and treat it as untagged while ++ preserving the tag on egress. ++ */ ++ if (vid == 0) ++ return 0; ++ ++ mutex_lock(&priv->reg_mutex); ++ ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid); ++ if (ret < 0) ++ goto out; ++ ++ ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, ®); ++ if (ret < 0) ++ goto out; ++ reg |= QCA8K_VTU_FUNC0_VALID | QCA8K_VTU_FUNC0_IVL_EN; ++ reg &= ~QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(port); ++ if (untagged) ++ reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_UNTAG(port); ++ else ++ reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_TAG(port); ++ ++ ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg); ++ if (ret) ++ goto out; ++ ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid); ++ ++out: ++ mutex_unlock(&priv->reg_mutex); ++ ++ return ret; ++} ++ ++static int ++qca8k_vlan_del(struct qca8k_priv *priv, u8 port, u16 vid) ++{ ++ u32 reg, mask; ++ int ret, i; ++ bool del; ++ ++ mutex_lock(&priv->reg_mutex); ++ ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid); ++ if (ret < 0) ++ goto out; ++ ++ ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, ®); ++ if (ret < 0) ++ goto out; ++ reg &= ~QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(port); ++ reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(port); ++ ++ /* Check if we're the last member to be removed */ ++ del = true; ++ for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ mask = QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(i); ++ ++ if ((reg & mask) != mask) { ++ del = false; ++ break; ++ } ++ } ++ ++ if (del) { ++ ret = qca8k_vlan_access(priv, QCA8K_VLAN_PURGE, vid); ++ } else { ++ ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg); ++ if (ret) ++ goto out; ++ ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid); ++ } ++ ++out: ++ mutex_unlock(&priv->reg_mutex); ++ ++ return ret; ++} ++ ++static int ++qca8k_mib_init(struct qca8k_priv *priv) ++{ ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ ret = regmap_update_bits(priv->regmap, QCA8K_REG_MIB, ++ QCA8K_MIB_FUNC | QCA8K_MIB_BUSY, ++ FIELD_PREP(QCA8K_MIB_FUNC, QCA8K_MIB_FLUSH) | ++ QCA8K_MIB_BUSY); ++ if (ret) ++ goto exit; ++ ++ ret = qca8k_busy_wait(priv, QCA8K_REG_MIB, QCA8K_MIB_BUSY); ++ if (ret) ++ goto exit; ++ ++ ret = regmap_set_bits(priv->regmap, QCA8K_REG_MIB, QCA8K_MIB_CPU_KEEP); ++ if (ret) ++ goto exit; ++ ++ ret = qca8k_write(priv, QCA8K_REG_MODULE_EN, QCA8K_MODULE_EN_MIB); ++ ++exit: ++ mutex_unlock(&priv->reg_mutex); ++ return ret; ++} ++ ++static void ++qca8k_port_set_status(struct qca8k_priv *priv, int port, int enable) ++{ ++ u32 mask = QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC; ++ ++ /* Port 0 and 6 have no internal PHY */ ++ if (port > 0 && port < 6) ++ mask |= QCA8K_PORT_STATUS_LINK_AUTO; ++ ++ if (enable) ++ regmap_set_bits(priv->regmap, QCA8K_REG_PORT_STATUS(port), mask); ++ else ++ regmap_clear_bits(priv->regmap, QCA8K_REG_PORT_STATUS(port), mask); ++} ++ ++static int ++qca8k_phy_eth_busy_wait(struct qca8k_mgmt_eth_data *mgmt_eth_data, ++ struct sk_buff *read_skb, u32 *val) ++{ ++ struct sk_buff *skb = skb_copy(read_skb, GFP_KERNEL); ++ bool ack; ++ int ret; ++ ++ reinit_completion(&mgmt_eth_data->rw_done); ++ ++ /* Increment seq_num and set it in the copy pkt */ ++ mgmt_eth_data->seq++; ++ qca8k_mdio_header_fill_seq_num(skb, mgmt_eth_data->seq); ++ mgmt_eth_data->ack = false; ++ ++ dev_queue_xmit(skb); ++ ++ ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, ++ QCA8K_ETHERNET_TIMEOUT); ++ ++ ack = mgmt_eth_data->ack; ++ ++ if (ret <= 0) ++ return -ETIMEDOUT; ++ ++ if (!ack) ++ return -EINVAL; ++ ++ *val = mgmt_eth_data->data[0]; ++ ++ return 0; ++} ++ ++static int ++qca8k_phy_eth_command(struct qca8k_priv *priv, bool read, int phy, ++ int regnum, u16 data) ++{ ++ struct sk_buff *write_skb, *clear_skb, *read_skb; ++ struct qca8k_mgmt_eth_data *mgmt_eth_data; ++ u32 write_val, clear_val = 0, val; ++ struct net_device *mgmt_master; ++ int ret, ret1; ++ bool ack; ++ ++ if (regnum >= QCA8K_MDIO_MASTER_MAX_REG) ++ return -EINVAL; ++ ++ mgmt_eth_data = &priv->mgmt_eth_data; ++ ++ write_val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN | ++ QCA8K_MDIO_MASTER_PHY_ADDR(phy) | ++ QCA8K_MDIO_MASTER_REG_ADDR(regnum); ++ ++ if (read) { ++ write_val |= QCA8K_MDIO_MASTER_READ; ++ } else { ++ write_val |= QCA8K_MDIO_MASTER_WRITE; ++ write_val |= QCA8K_MDIO_MASTER_DATA(data); ++ } ++ ++ /* Prealloc all the needed skb before the lock */ ++ write_skb = qca8k_alloc_mdio_header(MDIO_WRITE, QCA8K_MDIO_MASTER_CTRL, &write_val, ++ QCA8K_ETHERNET_PHY_PRIORITY, sizeof(write_val)); ++ if (!write_skb) ++ return -ENOMEM; ++ ++ clear_skb = qca8k_alloc_mdio_header(MDIO_WRITE, QCA8K_MDIO_MASTER_CTRL, &clear_val, ++ QCA8K_ETHERNET_PHY_PRIORITY, sizeof(clear_val)); ++ if (!clear_skb) { ++ ret = -ENOMEM; ++ goto err_clear_skb; ++ } ++ ++ read_skb = qca8k_alloc_mdio_header(MDIO_READ, QCA8K_MDIO_MASTER_CTRL, &clear_val, ++ QCA8K_ETHERNET_PHY_PRIORITY, sizeof(clear_val)); ++ if (!read_skb) { ++ ret = -ENOMEM; ++ goto err_read_skb; ++ } ++ ++ /* Actually start the request: ++ * 1. Send mdio master packet ++ * 2. Busy Wait for mdio master command ++ * 3. Get the data if we are reading ++ * 4. Reset the mdio master (even with error) ++ */ ++ mutex_lock(&mgmt_eth_data->mutex); ++ ++ /* Check if mgmt_master is operational */ ++ mgmt_master = priv->mgmt_master; ++ if (!mgmt_master) { ++ mutex_unlock(&mgmt_eth_data->mutex); ++ ret = -EINVAL; ++ goto err_mgmt_master; ++ } ++ ++ read_skb->dev = mgmt_master; ++ clear_skb->dev = mgmt_master; ++ write_skb->dev = mgmt_master; ++ ++ reinit_completion(&mgmt_eth_data->rw_done); ++ ++ /* Increment seq_num and set it in the write pkt */ ++ mgmt_eth_data->seq++; ++ qca8k_mdio_header_fill_seq_num(write_skb, mgmt_eth_data->seq); ++ mgmt_eth_data->ack = false; ++ ++ dev_queue_xmit(write_skb); ++ ++ ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, ++ QCA8K_ETHERNET_TIMEOUT); ++ ++ ack = mgmt_eth_data->ack; ++ ++ if (ret <= 0) { ++ ret = -ETIMEDOUT; ++ kfree_skb(read_skb); ++ goto exit; ++ } ++ ++ if (!ack) { ++ ret = -EINVAL; ++ kfree_skb(read_skb); ++ goto exit; ++ } ++ ++ ret = read_poll_timeout(qca8k_phy_eth_busy_wait, ret1, ++ !(val & QCA8K_MDIO_MASTER_BUSY), 0, ++ QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC, false, ++ mgmt_eth_data, read_skb, &val); ++ ++ if (ret < 0 && ret1 < 0) { ++ ret = ret1; ++ goto exit; ++ } ++ ++ if (read) { ++ reinit_completion(&mgmt_eth_data->rw_done); ++ ++ /* Increment seq_num and set it in the read pkt */ ++ mgmt_eth_data->seq++; ++ qca8k_mdio_header_fill_seq_num(read_skb, mgmt_eth_data->seq); ++ mgmt_eth_data->ack = false; ++ ++ dev_queue_xmit(read_skb); ++ ++ ret = wait_for_completion_timeout(&mgmt_eth_data->rw_done, ++ QCA8K_ETHERNET_TIMEOUT); ++ ++ ack = mgmt_eth_data->ack; ++ ++ if (ret <= 0) { ++ ret = -ETIMEDOUT; ++ goto exit; ++ } ++ ++ if (!ack) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ ret = mgmt_eth_data->data[0] & QCA8K_MDIO_MASTER_DATA_MASK; ++ } else { ++ kfree_skb(read_skb); ++ } ++exit: ++ reinit_completion(&mgmt_eth_data->rw_done); ++ ++ /* Increment seq_num and set it in the clear pkt */ ++ mgmt_eth_data->seq++; ++ qca8k_mdio_header_fill_seq_num(clear_skb, mgmt_eth_data->seq); ++ mgmt_eth_data->ack = false; ++ ++ dev_queue_xmit(clear_skb); ++ ++ wait_for_completion_timeout(&mgmt_eth_data->rw_done, ++ QCA8K_ETHERNET_TIMEOUT); ++ ++ mutex_unlock(&mgmt_eth_data->mutex); ++ ++ return ret; ++ ++ /* Error handling before lock */ ++err_mgmt_master: ++ kfree_skb(read_skb); ++err_read_skb: ++ kfree_skb(clear_skb); ++err_clear_skb: ++ kfree_skb(write_skb); ++ ++ return ret; ++} ++ ++static u32 ++qca8k_port_to_phy(int port) ++{ ++ /* From Andrew Lunn: ++ * Port 0 has no internal phy. ++ * Port 1 has an internal PHY at MDIO address 0. ++ * Port 2 has an internal PHY at MDIO address 1. ++ * ... ++ * Port 5 has an internal PHY at MDIO address 4. ++ * Port 6 has no internal PHY. ++ */ ++ ++ return port - 1; ++} ++ ++static int ++qca8k_mdio_busy_wait(struct mii_bus *bus, u32 reg, u32 mask) ++{ ++ u16 r1, r2, page; ++ u32 val; ++ int ret, ret1; ++ ++ qca8k_split_addr(reg, &r1, &r2, &page); ++ ++ ret = read_poll_timeout(qca8k_mii_read32, ret1, !(val & mask), 0, ++ QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC, false, ++ bus, 0x10 | r2, r1, &val); ++ ++ /* Check if qca8k_read has failed for a different reason ++ * before returnting -ETIMEDOUT ++ */ ++ if (ret < 0 && ret1 < 0) ++ return ret1; ++ ++ return ret; ++} ++ ++static int ++qca8k_mdio_write(struct qca8k_priv *priv, int phy, int regnum, u16 data) ++{ ++ struct mii_bus *bus = priv->bus; ++ u16 r1, r2, page; ++ u32 val; ++ int ret; ++ ++ if (regnum >= QCA8K_MDIO_MASTER_MAX_REG) ++ return -EINVAL; ++ ++ val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN | ++ QCA8K_MDIO_MASTER_WRITE | QCA8K_MDIO_MASTER_PHY_ADDR(phy) | ++ QCA8K_MDIO_MASTER_REG_ADDR(regnum) | ++ QCA8K_MDIO_MASTER_DATA(data); ++ ++ qca8k_split_addr(QCA8K_MDIO_MASTER_CTRL, &r1, &r2, &page); ++ ++ mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); ++ ++ ret = qca8k_set_page(priv, page); ++ if (ret) ++ goto exit; ++ ++ qca8k_mii_write32(priv, 0x10 | r2, r1, val); ++ ++ ret = qca8k_mdio_busy_wait(bus, QCA8K_MDIO_MASTER_CTRL, ++ QCA8K_MDIO_MASTER_BUSY); ++ ++exit: ++ /* even if the busy_wait timeouts try to clear the MASTER_EN */ ++ qca8k_mii_write32(priv, 0x10 | r2, r1, 0); ++ ++ mutex_unlock(&bus->mdio_lock); ++ ++ return ret; ++} ++ ++static int ++qca8k_mdio_read(struct qca8k_priv *priv, int phy, int regnum) ++{ ++ struct mii_bus *bus = priv->bus; ++ u16 r1, r2, page; ++ u32 val; ++ int ret; ++ ++ if (regnum >= QCA8K_MDIO_MASTER_MAX_REG) ++ return -EINVAL; ++ ++ val = QCA8K_MDIO_MASTER_BUSY | QCA8K_MDIO_MASTER_EN | ++ QCA8K_MDIO_MASTER_READ | QCA8K_MDIO_MASTER_PHY_ADDR(phy) | ++ QCA8K_MDIO_MASTER_REG_ADDR(regnum); ++ ++ qca8k_split_addr(QCA8K_MDIO_MASTER_CTRL, &r1, &r2, &page); ++ ++ mutex_lock_nested(&bus->mdio_lock, MDIO_MUTEX_NESTED); ++ ++ ret = qca8k_set_page(priv, page); ++ if (ret) ++ goto exit; ++ ++ qca8k_mii_write32(priv, 0x10 | r2, r1, val); ++ ++ ret = qca8k_mdio_busy_wait(bus, QCA8K_MDIO_MASTER_CTRL, ++ QCA8K_MDIO_MASTER_BUSY); ++ if (ret) ++ goto exit; ++ ++ ret = qca8k_mii_read32(bus, 0x10 | r2, r1, &val); ++ ++exit: ++ /* even if the busy_wait timeouts try to clear the MASTER_EN */ ++ qca8k_mii_write32(priv, 0x10 | r2, r1, 0); ++ ++ mutex_unlock(&bus->mdio_lock); ++ ++ if (ret >= 0) ++ ret = val & QCA8K_MDIO_MASTER_DATA_MASK; ++ ++ return ret; ++} ++ ++static int ++qca8k_internal_mdio_write(struct mii_bus *slave_bus, int phy, int regnum, u16 data) ++{ ++ struct qca8k_priv *priv = slave_bus->priv; ++ int ret; ++ ++ /* Use mdio Ethernet when available, fallback to legacy one on error */ ++ ret = qca8k_phy_eth_command(priv, false, phy, regnum, data); ++ if (!ret) ++ return 0; ++ ++ return qca8k_mdio_write(priv, phy, regnum, data); ++} ++ ++static int ++qca8k_internal_mdio_read(struct mii_bus *slave_bus, int phy, int regnum) ++{ ++ struct qca8k_priv *priv = slave_bus->priv; ++ int ret; ++ ++ /* Use mdio Ethernet when available, fallback to legacy one on error */ ++ ret = qca8k_phy_eth_command(priv, true, phy, regnum, 0); ++ if (ret >= 0) ++ return ret; ++ ++ ret = qca8k_mdio_read(priv, phy, regnum); ++ ++ if (ret < 0) ++ return 0xffff; ++ ++ return ret; ++} ++ ++static int ++qca8k_legacy_mdio_write(struct mii_bus *slave_bus, int port, int regnum, u16 data) ++{ ++ port = qca8k_port_to_phy(port) % PHY_MAX_ADDR; ++ ++ return qca8k_internal_mdio_write(slave_bus, port, regnum, data); ++} ++ ++static int ++qca8k_legacy_mdio_read(struct mii_bus *slave_bus, int port, int regnum) ++{ ++ port = qca8k_port_to_phy(port) % PHY_MAX_ADDR; ++ ++ return qca8k_internal_mdio_read(slave_bus, port, regnum); ++} ++ ++static int ++qca8k_mdio_register(struct qca8k_priv *priv) ++{ ++ struct dsa_switch *ds = priv->ds; ++ struct device_node *mdio; ++ struct mii_bus *bus; ++ ++ bus = devm_mdiobus_alloc(ds->dev); ++ if (!bus) ++ return -ENOMEM; ++ ++ bus->priv = (void *)priv; ++ snprintf(bus->id, MII_BUS_ID_SIZE, "qca8k-%d.%d", ++ ds->dst->index, ds->index); ++ bus->parent = ds->dev; ++ bus->phy_mask = ~ds->phys_mii_mask; ++ ds->slave_mii_bus = bus; ++ ++ /* Check if the devicetree declare the port:phy mapping */ ++ mdio = of_get_child_by_name(priv->dev->of_node, "mdio"); ++ if (of_device_is_available(mdio)) { ++ bus->name = "qca8k slave mii"; ++ bus->read = qca8k_internal_mdio_read; ++ bus->write = qca8k_internal_mdio_write; ++ return devm_of_mdiobus_register(priv->dev, bus, mdio); ++ } ++ ++ /* If a mapping can't be found the legacy mapping is used, ++ * using the qca8k_port_to_phy function ++ */ ++ bus->name = "qca8k-legacy slave mii"; ++ bus->read = qca8k_legacy_mdio_read; ++ bus->write = qca8k_legacy_mdio_write; ++ return devm_mdiobus_register(priv->dev, bus); ++} ++ ++static int ++qca8k_setup_mdio_bus(struct qca8k_priv *priv) ++{ ++ u32 internal_mdio_mask = 0, external_mdio_mask = 0, reg; ++ struct device_node *ports, *port; ++ phy_interface_t mode; ++ int err; ++ ++ ports = of_get_child_by_name(priv->dev->of_node, "ports"); ++ if (!ports) ++ ports = of_get_child_by_name(priv->dev->of_node, "ethernet-ports"); ++ ++ if (!ports) ++ return -EINVAL; ++ ++ for_each_available_child_of_node(ports, port) { ++ err = of_property_read_u32(port, "reg", ®); ++ if (err) { ++ of_node_put(port); ++ of_node_put(ports); ++ return err; ++ } ++ ++ if (!dsa_is_user_port(priv->ds, reg)) ++ continue; ++ ++ of_get_phy_mode(port, &mode); ++ ++ if (of_property_read_bool(port, "phy-handle") && ++ mode != PHY_INTERFACE_MODE_INTERNAL) ++ external_mdio_mask |= BIT(reg); ++ else ++ internal_mdio_mask |= BIT(reg); ++ } ++ ++ of_node_put(ports); ++ if (!external_mdio_mask && !internal_mdio_mask) { ++ dev_err(priv->dev, "no PHYs are defined.\n"); ++ return -EINVAL; ++ } ++ ++ /* The QCA8K_MDIO_MASTER_EN Bit, which grants access to PHYs through ++ * the MDIO_MASTER register also _disconnects_ the external MDC ++ * passthrough to the internal PHYs. It's not possible to use both ++ * configurations at the same time! ++ * ++ * Because this came up during the review process: ++ * If the external mdio-bus driver is capable magically disabling ++ * the QCA8K_MDIO_MASTER_EN and mutex/spin-locking out the qca8k's ++ * accessors for the time being, it would be possible to pull this ++ * off. ++ */ ++ if (!!external_mdio_mask && !!internal_mdio_mask) { ++ dev_err(priv->dev, "either internal or external mdio bus configuration is supported.\n"); ++ return -EINVAL; ++ } ++ ++ if (external_mdio_mask) { ++ /* Make sure to disable the internal mdio bus in cases ++ * a dt-overlay and driver reload changed the configuration ++ */ ++ ++ return regmap_clear_bits(priv->regmap, QCA8K_MDIO_MASTER_CTRL, ++ QCA8K_MDIO_MASTER_EN); ++ } ++ ++ return qca8k_mdio_register(priv); ++} ++ ++static int ++qca8k_setup_mac_pwr_sel(struct qca8k_priv *priv) ++{ ++ u32 mask = 0; ++ int ret = 0; ++ ++ /* SoC specific settings for ipq8064. ++ * If more device require this consider adding ++ * a dedicated binding. ++ */ ++ if (of_machine_is_compatible("qcom,ipq8064")) ++ mask |= QCA8K_MAC_PWR_RGMII0_1_8V; ++ ++ /* SoC specific settings for ipq8065 */ ++ if (of_machine_is_compatible("qcom,ipq8065")) ++ mask |= QCA8K_MAC_PWR_RGMII1_1_8V; ++ ++ if (mask) { ++ ret = qca8k_rmw(priv, QCA8K_REG_MAC_PWR_SEL, ++ QCA8K_MAC_PWR_RGMII0_1_8V | ++ QCA8K_MAC_PWR_RGMII1_1_8V, ++ mask); ++ } ++ ++ return ret; ++} ++ ++static int qca8k_find_cpu_port(struct dsa_switch *ds) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ ++ /* Find the connected cpu port. Valid port are 0 or 6 */ ++ if (dsa_is_cpu_port(ds, 0)) ++ return 0; ++ ++ dev_dbg(priv->dev, "port 0 is not the CPU port. Checking port 6"); ++ ++ if (dsa_is_cpu_port(ds, 6)) ++ return 6; ++ ++ return -EINVAL; ++} ++ ++static int ++qca8k_setup_of_pws_reg(struct qca8k_priv *priv) ++{ ++ const struct qca8k_match_data *data = priv->info; ++ struct device_node *node = priv->dev->of_node; ++ u32 val = 0; ++ int ret; ++ ++ /* QCA8327 require to set to the correct mode. ++ * His bigger brother QCA8328 have the 172 pin layout. ++ * Should be applied by default but we set this just to make sure. ++ */ ++ if (priv->switch_id == QCA8K_ID_QCA8327) { ++ /* Set the correct package of 148 pin for QCA8327 */ ++ if (data->reduced_package) ++ val |= QCA8327_PWS_PACKAGE148_EN; ++ ++ ret = qca8k_rmw(priv, QCA8K_REG_PWS, QCA8327_PWS_PACKAGE148_EN, ++ val); ++ if (ret) ++ return ret; ++ } ++ ++ if (of_property_read_bool(node, "qca,ignore-power-on-sel")) ++ val |= QCA8K_PWS_POWER_ON_SEL; ++ ++ if (of_property_read_bool(node, "qca,led-open-drain")) { ++ if (!(val & QCA8K_PWS_POWER_ON_SEL)) { ++ dev_err(priv->dev, "qca,led-open-drain require qca,ignore-power-on-sel to be set."); ++ return -EINVAL; ++ } ++ ++ val |= QCA8K_PWS_LED_OPEN_EN_CSR; ++ } ++ ++ return qca8k_rmw(priv, QCA8K_REG_PWS, ++ QCA8K_PWS_LED_OPEN_EN_CSR | QCA8K_PWS_POWER_ON_SEL, ++ val); ++} ++ ++static int ++qca8k_parse_port_config(struct qca8k_priv *priv) ++{ ++ int port, cpu_port_index = -1, ret; ++ struct device_node *port_dn; ++ phy_interface_t mode; ++ struct dsa_port *dp; ++ u32 delay; ++ ++ /* We have 2 CPU port. Check them */ ++ for (port = 0; port < QCA8K_NUM_PORTS; port++) { ++ /* Skip every other port */ ++ if (port != 0 && port != 6) ++ continue; ++ ++ dp = dsa_to_port(priv->ds, port); ++ port_dn = dp->dn; ++ cpu_port_index++; ++ ++ if (!of_device_is_available(port_dn)) ++ continue; ++ ++ ret = of_get_phy_mode(port_dn, &mode); ++ if (ret) ++ continue; ++ ++ switch (mode) { ++ case PHY_INTERFACE_MODE_RGMII: ++ case PHY_INTERFACE_MODE_RGMII_ID: ++ case PHY_INTERFACE_MODE_RGMII_TXID: ++ case PHY_INTERFACE_MODE_RGMII_RXID: ++ case PHY_INTERFACE_MODE_SGMII: ++ delay = 0; ++ ++ if (!of_property_read_u32(port_dn, "tx-internal-delay-ps", &delay)) ++ /* Switch regs accept value in ns, convert ps to ns */ ++ delay = delay / 1000; ++ else if (mode == PHY_INTERFACE_MODE_RGMII_ID || ++ mode == PHY_INTERFACE_MODE_RGMII_TXID) ++ delay = 1; ++ ++ if (!FIELD_FIT(QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK, delay)) { ++ dev_err(priv->dev, "rgmii tx delay is limited to a max value of 3ns, setting to the max value"); ++ delay = 3; ++ } ++ ++ priv->ports_config.rgmii_tx_delay[cpu_port_index] = delay; ++ ++ delay = 0; ++ ++ if (!of_property_read_u32(port_dn, "rx-internal-delay-ps", &delay)) ++ /* Switch regs accept value in ns, convert ps to ns */ ++ delay = delay / 1000; ++ else if (mode == PHY_INTERFACE_MODE_RGMII_ID || ++ mode == PHY_INTERFACE_MODE_RGMII_RXID) ++ delay = 2; ++ ++ if (!FIELD_FIT(QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK, delay)) { ++ dev_err(priv->dev, "rgmii rx delay is limited to a max value of 3ns, setting to the max value"); ++ delay = 3; ++ } ++ ++ priv->ports_config.rgmii_rx_delay[cpu_port_index] = delay; ++ ++ /* Skip sgmii parsing for rgmii* mode */ ++ if (mode == PHY_INTERFACE_MODE_RGMII || ++ mode == PHY_INTERFACE_MODE_RGMII_ID || ++ mode == PHY_INTERFACE_MODE_RGMII_TXID || ++ mode == PHY_INTERFACE_MODE_RGMII_RXID) ++ break; ++ ++ if (of_property_read_bool(port_dn, "qca,sgmii-txclk-falling-edge")) ++ priv->ports_config.sgmii_tx_clk_falling_edge = true; ++ ++ if (of_property_read_bool(port_dn, "qca,sgmii-rxclk-falling-edge")) ++ priv->ports_config.sgmii_rx_clk_falling_edge = true; ++ ++ if (of_property_read_bool(port_dn, "qca,sgmii-enable-pll")) { ++ priv->ports_config.sgmii_enable_pll = true; ++ ++ if (priv->switch_id == QCA8K_ID_QCA8327) { ++ dev_err(priv->dev, "SGMII PLL should NOT be enabled for qca8327. Aborting enabling"); ++ priv->ports_config.sgmii_enable_pll = false; ++ } ++ ++ if (priv->switch_revision < 2) ++ dev_warn(priv->dev, "SGMII PLL should NOT be enabled for qca8337 with revision 2 or more."); ++ } ++ ++ break; ++ default: ++ continue; ++ } ++ } ++ ++ return 0; ++} ++ ++static int ++qca8k_setup(struct dsa_switch *ds) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ int cpu_port, ret, i; ++ u32 mask; ++ ++ cpu_port = qca8k_find_cpu_port(ds); ++ if (cpu_port < 0) { ++ dev_err(priv->dev, "No cpu port configured in both cpu port0 and port6"); ++ return cpu_port; ++ } ++ ++ /* Parse CPU port config to be later used in phy_link mac_config */ ++ ret = qca8k_parse_port_config(priv); ++ if (ret) ++ return ret; ++ ++ ret = qca8k_setup_mdio_bus(priv); ++ if (ret) ++ return ret; ++ ++ ret = qca8k_setup_of_pws_reg(priv); ++ if (ret) ++ return ret; ++ ++ ret = qca8k_setup_mac_pwr_sel(priv); ++ if (ret) ++ return ret; ++ ++ /* Make sure MAC06 is disabled */ ++ ret = regmap_clear_bits(priv->regmap, QCA8K_REG_PORT0_PAD_CTRL, ++ QCA8K_PORT0_PAD_MAC06_EXCHANGE_EN); ++ if (ret) { ++ dev_err(priv->dev, "failed disabling MAC06 exchange"); ++ return ret; ++ } ++ ++ /* Enable CPU Port */ ++ ret = regmap_set_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, ++ QCA8K_GLOBAL_FW_CTRL0_CPU_PORT_EN); ++ if (ret) { ++ dev_err(priv->dev, "failed enabling CPU port"); ++ return ret; ++ } ++ ++ /* Enable MIB counters */ ++ ret = qca8k_mib_init(priv); ++ if (ret) ++ dev_warn(priv->dev, "mib init failed"); ++ ++ /* Initial setup of all ports */ ++ for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ /* Disable forwarding by default on all ports */ ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), ++ QCA8K_PORT_LOOKUP_MEMBER, 0); ++ if (ret) ++ return ret; ++ ++ /* Enable QCA header mode on all cpu ports */ ++ if (dsa_is_cpu_port(ds, i)) { ++ ret = qca8k_write(priv, QCA8K_REG_PORT_HDR_CTRL(i), ++ FIELD_PREP(QCA8K_PORT_HDR_CTRL_TX_MASK, QCA8K_PORT_HDR_CTRL_ALL) | ++ FIELD_PREP(QCA8K_PORT_HDR_CTRL_RX_MASK, QCA8K_PORT_HDR_CTRL_ALL)); ++ if (ret) { ++ dev_err(priv->dev, "failed enabling QCA header mode"); ++ return ret; ++ } ++ } ++ ++ /* Disable MAC by default on all user ports */ ++ if (dsa_is_user_port(ds, i)) ++ qca8k_port_set_status(priv, i, 0); ++ } ++ ++ /* Forward all unknown frames to CPU port for Linux processing ++ * Notice that in multi-cpu config only one port should be set ++ * for igmp, unknown, multicast and broadcast packet ++ */ ++ ret = qca8k_write(priv, QCA8K_REG_GLOBAL_FW_CTRL1, ++ FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_IGMP_DP_MASK, BIT(cpu_port)) | ++ FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_BC_DP_MASK, BIT(cpu_port)) | ++ FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_MC_DP_MASK, BIT(cpu_port)) | ++ FIELD_PREP(QCA8K_GLOBAL_FW_CTRL1_UC_DP_MASK, BIT(cpu_port))); ++ if (ret) ++ return ret; ++ ++ /* Setup connection between CPU port & user ports ++ * Configure specific switch configuration for ports ++ */ ++ for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ /* CPU port gets connected to all user ports of the switch */ ++ if (dsa_is_cpu_port(ds, i)) { ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), ++ QCA8K_PORT_LOOKUP_MEMBER, dsa_user_ports(ds)); ++ if (ret) ++ return ret; ++ } ++ ++ /* Individual user ports get connected to CPU port only */ ++ if (dsa_is_user_port(ds, i)) { ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(i), ++ QCA8K_PORT_LOOKUP_MEMBER, ++ BIT(cpu_port)); ++ if (ret) ++ return ret; ++ ++ /* Enable ARP Auto-learning by default */ ++ ret = regmap_set_bits(priv->regmap, QCA8K_PORT_LOOKUP_CTRL(i), ++ QCA8K_PORT_LOOKUP_LEARN); ++ if (ret) ++ return ret; ++ ++ /* For port based vlans to work we need to set the ++ * default egress vid ++ */ ++ ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(i), ++ QCA8K_EGREES_VLAN_PORT_MASK(i), ++ QCA8K_EGREES_VLAN_PORT(i, QCA8K_PORT_VID_DEF)); ++ if (ret) ++ return ret; ++ ++ ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(i), ++ QCA8K_PORT_VLAN_CVID(QCA8K_PORT_VID_DEF) | ++ QCA8K_PORT_VLAN_SVID(QCA8K_PORT_VID_DEF)); ++ if (ret) ++ return ret; ++ } ++ ++ /* The port 5 of the qca8337 have some problem in flood condition. The ++ * original legacy driver had some specific buffer and priority settings ++ * for the different port suggested by the QCA switch team. Add this ++ * missing settings to improve switch stability under load condition. ++ * This problem is limited to qca8337 and other qca8k switch are not affected. ++ */ ++ if (priv->switch_id == QCA8K_ID_QCA8337) { ++ switch (i) { ++ /* The 2 CPU port and port 5 requires some different ++ * priority than any other ports. ++ */ ++ case 0: ++ case 5: ++ case 6: ++ mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x4) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x4) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI4(0x6) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI5(0x8) | ++ QCA8K_PORT_HOL_CTRL0_EG_PORT(0x1e); ++ break; ++ default: ++ mask = QCA8K_PORT_HOL_CTRL0_EG_PRI0(0x3) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI1(0x4) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI2(0x6) | ++ QCA8K_PORT_HOL_CTRL0_EG_PRI3(0x8) | ++ QCA8K_PORT_HOL_CTRL0_EG_PORT(0x19); ++ } ++ qca8k_write(priv, QCA8K_REG_PORT_HOL_CTRL0(i), mask); ++ ++ mask = QCA8K_PORT_HOL_CTRL1_ING(0x6) | ++ QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN | ++ QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN | ++ QCA8K_PORT_HOL_CTRL1_WRED_EN; ++ qca8k_rmw(priv, QCA8K_REG_PORT_HOL_CTRL1(i), ++ QCA8K_PORT_HOL_CTRL1_ING_BUF_MASK | ++ QCA8K_PORT_HOL_CTRL1_EG_PRI_BUF_EN | ++ QCA8K_PORT_HOL_CTRL1_EG_PORT_BUF_EN | ++ QCA8K_PORT_HOL_CTRL1_WRED_EN, ++ mask); ++ } ++ } ++ ++ /* Special GLOBAL_FC_THRESH value are needed for ar8327 switch */ ++ if (priv->switch_id == QCA8K_ID_QCA8327) { ++ mask = QCA8K_GLOBAL_FC_GOL_XON_THRES(288) | ++ QCA8K_GLOBAL_FC_GOL_XOFF_THRES(496); ++ qca8k_rmw(priv, QCA8K_REG_GLOBAL_FC_THRESH, ++ QCA8K_GLOBAL_FC_GOL_XON_THRES_MASK | ++ QCA8K_GLOBAL_FC_GOL_XOFF_THRES_MASK, ++ mask); ++ } ++ ++ /* Setup our port MTUs to match power on defaults */ ++ ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, ETH_FRAME_LEN + ETH_FCS_LEN); ++ if (ret) ++ dev_warn(priv->dev, "failed setting MTU settings"); ++ ++ /* Flush the FDB table */ ++ qca8k_fdb_flush(priv); ++ ++ /* We don't have interrupts for link changes, so we need to poll */ ++ ds->pcs_poll = true; ++ ++ /* Set min a max ageing value supported */ ++ ds->ageing_time_min = 7000; ++ ds->ageing_time_max = 458745000; ++ ++ /* Set max number of LAGs supported */ ++ ds->num_lag_ids = QCA8K_NUM_LAGS; ++ ++ return 0; ++} ++ ++static void ++qca8k_mac_config_setup_internal_delay(struct qca8k_priv *priv, int cpu_port_index, ++ u32 reg) ++{ ++ u32 delay, val = 0; ++ int ret; ++ ++ /* Delay can be declared in 3 different way. ++ * Mode to rgmii and internal-delay standard binding defined ++ * rgmii-id or rgmii-tx/rx phy mode set. ++ * The parse logic set a delay different than 0 only when one ++ * of the 3 different way is used. In all other case delay is ++ * not enabled. With ID or TX/RXID delay is enabled and set ++ * to the default and recommended value. ++ */ ++ if (priv->ports_config.rgmii_tx_delay[cpu_port_index]) { ++ delay = priv->ports_config.rgmii_tx_delay[cpu_port_index]; ++ ++ val |= QCA8K_PORT_PAD_RGMII_TX_DELAY(delay) | ++ QCA8K_PORT_PAD_RGMII_TX_DELAY_EN; ++ } ++ ++ if (priv->ports_config.rgmii_rx_delay[cpu_port_index]) { ++ delay = priv->ports_config.rgmii_rx_delay[cpu_port_index]; ++ ++ val |= QCA8K_PORT_PAD_RGMII_RX_DELAY(delay) | ++ QCA8K_PORT_PAD_RGMII_RX_DELAY_EN; ++ } ++ ++ /* Set RGMII delay based on the selected values */ ++ ret = qca8k_rmw(priv, reg, ++ QCA8K_PORT_PAD_RGMII_TX_DELAY_MASK | ++ QCA8K_PORT_PAD_RGMII_RX_DELAY_MASK | ++ QCA8K_PORT_PAD_RGMII_TX_DELAY_EN | ++ QCA8K_PORT_PAD_RGMII_RX_DELAY_EN, ++ val); ++ if (ret) ++ dev_err(priv->dev, "Failed to set internal delay for CPU port%d", ++ cpu_port_index == QCA8K_CPU_PORT0 ? 0 : 6); ++} ++ ++static void ++qca8k_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode, ++ const struct phylink_link_state *state) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int cpu_port_index, ret; ++ u32 reg, val; ++ ++ switch (port) { ++ case 0: /* 1st CPU port */ ++ if (state->interface != PHY_INTERFACE_MODE_RGMII && ++ state->interface != PHY_INTERFACE_MODE_RGMII_ID && ++ state->interface != PHY_INTERFACE_MODE_RGMII_TXID && ++ state->interface != PHY_INTERFACE_MODE_RGMII_RXID && ++ state->interface != PHY_INTERFACE_MODE_SGMII) ++ return; ++ ++ reg = QCA8K_REG_PORT0_PAD_CTRL; ++ cpu_port_index = QCA8K_CPU_PORT0; ++ break; ++ case 1: ++ case 2: ++ case 3: ++ case 4: ++ case 5: ++ /* Internal PHY, nothing to do */ ++ return; ++ case 6: /* 2nd CPU port / external PHY */ ++ if (state->interface != PHY_INTERFACE_MODE_RGMII && ++ state->interface != PHY_INTERFACE_MODE_RGMII_ID && ++ state->interface != PHY_INTERFACE_MODE_RGMII_TXID && ++ state->interface != PHY_INTERFACE_MODE_RGMII_RXID && ++ state->interface != PHY_INTERFACE_MODE_SGMII && ++ state->interface != PHY_INTERFACE_MODE_1000BASEX) ++ return; ++ ++ reg = QCA8K_REG_PORT6_PAD_CTRL; ++ cpu_port_index = QCA8K_CPU_PORT6; ++ break; ++ default: ++ dev_err(ds->dev, "%s: unsupported port: %i\n", __func__, port); ++ return; ++ } ++ ++ if (port != 6 && phylink_autoneg_inband(mode)) { ++ dev_err(ds->dev, "%s: in-band negotiation unsupported\n", ++ __func__); ++ return; ++ } ++ ++ switch (state->interface) { ++ case PHY_INTERFACE_MODE_RGMII: ++ case PHY_INTERFACE_MODE_RGMII_ID: ++ case PHY_INTERFACE_MODE_RGMII_TXID: ++ case PHY_INTERFACE_MODE_RGMII_RXID: ++ qca8k_write(priv, reg, QCA8K_PORT_PAD_RGMII_EN); ++ ++ /* Configure rgmii delay */ ++ qca8k_mac_config_setup_internal_delay(priv, cpu_port_index, reg); ++ ++ /* QCA8337 requires to set rgmii rx delay for all ports. ++ * This is enabled through PORT5_PAD_CTRL for all ports, ++ * rather than individual port registers. ++ */ ++ if (priv->switch_id == QCA8K_ID_QCA8337) ++ qca8k_write(priv, QCA8K_REG_PORT5_PAD_CTRL, ++ QCA8K_PORT_PAD_RGMII_RX_DELAY_EN); ++ break; ++ case PHY_INTERFACE_MODE_SGMII: ++ case PHY_INTERFACE_MODE_1000BASEX: ++ /* Enable SGMII on the port */ ++ qca8k_write(priv, reg, QCA8K_PORT_PAD_SGMII_EN); ++ ++ /* Enable/disable SerDes auto-negotiation as necessary */ ++ ret = qca8k_read(priv, QCA8K_REG_PWS, &val); ++ if (ret) ++ return; ++ if (phylink_autoneg_inband(mode)) ++ val &= ~QCA8K_PWS_SERDES_AEN_DIS; ++ else ++ val |= QCA8K_PWS_SERDES_AEN_DIS; ++ qca8k_write(priv, QCA8K_REG_PWS, val); ++ ++ /* Configure the SGMII parameters */ ++ ret = qca8k_read(priv, QCA8K_REG_SGMII_CTRL, &val); ++ if (ret) ++ return; ++ ++ val |= QCA8K_SGMII_EN_SD; ++ ++ if (priv->ports_config.sgmii_enable_pll) ++ val |= QCA8K_SGMII_EN_PLL | QCA8K_SGMII_EN_RX | ++ QCA8K_SGMII_EN_TX; ++ ++ if (dsa_is_cpu_port(ds, port)) { ++ /* CPU port, we're talking to the CPU MAC, be a PHY */ ++ val &= ~QCA8K_SGMII_MODE_CTRL_MASK; ++ val |= QCA8K_SGMII_MODE_CTRL_PHY; ++ } else if (state->interface == PHY_INTERFACE_MODE_SGMII) { ++ val &= ~QCA8K_SGMII_MODE_CTRL_MASK; ++ val |= QCA8K_SGMII_MODE_CTRL_MAC; ++ } else if (state->interface == PHY_INTERFACE_MODE_1000BASEX) { ++ val &= ~QCA8K_SGMII_MODE_CTRL_MASK; ++ val |= QCA8K_SGMII_MODE_CTRL_BASEX; ++ } ++ ++ qca8k_write(priv, QCA8K_REG_SGMII_CTRL, val); ++ ++ /* From original code is reported port instability as SGMII also ++ * require delay set. Apply advised values here or take them from DT. ++ */ ++ if (state->interface == PHY_INTERFACE_MODE_SGMII) ++ qca8k_mac_config_setup_internal_delay(priv, cpu_port_index, reg); ++ ++ /* For qca8327/qca8328/qca8334/qca8338 sgmii is unique and ++ * falling edge is set writing in the PORT0 PAD reg ++ */ ++ if (priv->switch_id == QCA8K_ID_QCA8327 || ++ priv->switch_id == QCA8K_ID_QCA8337) ++ reg = QCA8K_REG_PORT0_PAD_CTRL; ++ ++ val = 0; ++ ++ /* SGMII Clock phase configuration */ ++ if (priv->ports_config.sgmii_rx_clk_falling_edge) ++ val |= QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE; ++ ++ if (priv->ports_config.sgmii_tx_clk_falling_edge) ++ val |= QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE; ++ ++ if (val) ++ ret = qca8k_rmw(priv, reg, ++ QCA8K_PORT0_PAD_SGMII_RXCLK_FALLING_EDGE | ++ QCA8K_PORT0_PAD_SGMII_TXCLK_FALLING_EDGE, ++ val); ++ ++ break; ++ default: ++ dev_err(ds->dev, "xMII mode %s not supported for port %d\n", ++ phy_modes(state->interface), port); ++ return; ++ } ++} ++ ++static void ++qca8k_phylink_validate(struct dsa_switch *ds, int port, ++ unsigned long *supported, ++ struct phylink_link_state *state) ++{ ++ __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; ++ ++ switch (port) { ++ case 0: /* 1st CPU port */ ++ if (state->interface != PHY_INTERFACE_MODE_NA && ++ state->interface != PHY_INTERFACE_MODE_RGMII && ++ state->interface != PHY_INTERFACE_MODE_RGMII_ID && ++ state->interface != PHY_INTERFACE_MODE_RGMII_TXID && ++ state->interface != PHY_INTERFACE_MODE_RGMII_RXID && ++ state->interface != PHY_INTERFACE_MODE_SGMII) ++ goto unsupported; ++ break; ++ case 1: ++ case 2: ++ case 3: ++ case 4: ++ case 5: ++ /* Internal PHY */ ++ if (state->interface != PHY_INTERFACE_MODE_NA && ++ state->interface != PHY_INTERFACE_MODE_GMII && ++ state->interface != PHY_INTERFACE_MODE_INTERNAL) ++ goto unsupported; ++ break; ++ case 6: /* 2nd CPU port / external PHY */ ++ if (state->interface != PHY_INTERFACE_MODE_NA && ++ state->interface != PHY_INTERFACE_MODE_RGMII && ++ state->interface != PHY_INTERFACE_MODE_RGMII_ID && ++ state->interface != PHY_INTERFACE_MODE_RGMII_TXID && ++ state->interface != PHY_INTERFACE_MODE_RGMII_RXID && ++ state->interface != PHY_INTERFACE_MODE_SGMII && ++ state->interface != PHY_INTERFACE_MODE_1000BASEX) ++ goto unsupported; ++ break; ++ default: ++unsupported: ++ linkmode_zero(supported); ++ return; ++ } ++ ++ phylink_set_port_modes(mask); ++ phylink_set(mask, Autoneg); ++ ++ phylink_set(mask, 1000baseT_Full); ++ phylink_set(mask, 10baseT_Half); ++ phylink_set(mask, 10baseT_Full); ++ phylink_set(mask, 100baseT_Half); ++ phylink_set(mask, 100baseT_Full); ++ ++ if (state->interface == PHY_INTERFACE_MODE_1000BASEX) ++ phylink_set(mask, 1000baseX_Full); ++ ++ phylink_set(mask, Pause); ++ phylink_set(mask, Asym_Pause); ++ ++ linkmode_and(supported, supported, mask); ++ linkmode_and(state->advertising, state->advertising, mask); ++} ++ ++static int ++qca8k_phylink_mac_link_state(struct dsa_switch *ds, int port, ++ struct phylink_link_state *state) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ u32 reg; ++ int ret; ++ ++ ret = qca8k_read(priv, QCA8K_REG_PORT_STATUS(port), ®); ++ if (ret < 0) ++ return ret; ++ ++ state->link = !!(reg & QCA8K_PORT_STATUS_LINK_UP); ++ state->an_complete = state->link; ++ state->an_enabled = !!(reg & QCA8K_PORT_STATUS_LINK_AUTO); ++ state->duplex = (reg & QCA8K_PORT_STATUS_DUPLEX) ? DUPLEX_FULL : ++ DUPLEX_HALF; ++ ++ switch (reg & QCA8K_PORT_STATUS_SPEED) { ++ case QCA8K_PORT_STATUS_SPEED_10: ++ state->speed = SPEED_10; ++ break; ++ case QCA8K_PORT_STATUS_SPEED_100: ++ state->speed = SPEED_100; ++ break; ++ case QCA8K_PORT_STATUS_SPEED_1000: ++ state->speed = SPEED_1000; ++ break; ++ default: ++ state->speed = SPEED_UNKNOWN; ++ break; ++ } ++ ++ state->pause = MLO_PAUSE_NONE; ++ if (reg & QCA8K_PORT_STATUS_RXFLOW) ++ state->pause |= MLO_PAUSE_RX; ++ if (reg & QCA8K_PORT_STATUS_TXFLOW) ++ state->pause |= MLO_PAUSE_TX; ++ ++ return 1; ++} ++ ++static void ++qca8k_phylink_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode, ++ phy_interface_t interface) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ ++ qca8k_port_set_status(priv, port, 0); ++} ++ ++static void ++qca8k_phylink_mac_link_up(struct dsa_switch *ds, int port, unsigned int mode, ++ phy_interface_t interface, struct phy_device *phydev, ++ int speed, int duplex, bool tx_pause, bool rx_pause) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ u32 reg; ++ ++ if (phylink_autoneg_inband(mode)) { ++ reg = QCA8K_PORT_STATUS_LINK_AUTO; ++ } else { ++ switch (speed) { ++ case SPEED_10: ++ reg = QCA8K_PORT_STATUS_SPEED_10; ++ break; ++ case SPEED_100: ++ reg = QCA8K_PORT_STATUS_SPEED_100; ++ break; ++ case SPEED_1000: ++ reg = QCA8K_PORT_STATUS_SPEED_1000; ++ break; ++ default: ++ reg = QCA8K_PORT_STATUS_LINK_AUTO; ++ break; ++ } ++ ++ if (duplex == DUPLEX_FULL) ++ reg |= QCA8K_PORT_STATUS_DUPLEX; ++ ++ if (rx_pause || dsa_is_cpu_port(ds, port)) ++ reg |= QCA8K_PORT_STATUS_RXFLOW; ++ ++ if (tx_pause || dsa_is_cpu_port(ds, port)) ++ reg |= QCA8K_PORT_STATUS_TXFLOW; ++ } ++ ++ reg |= QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC; ++ ++ qca8k_write(priv, QCA8K_REG_PORT_STATUS(port), reg); ++} ++ ++static void ++qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int i; ++ ++ if (stringset != ETH_SS_STATS) ++ return; ++ ++ for (i = 0; i < priv->info->mib_count; i++) ++ strncpy(data + i * ETH_GSTRING_LEN, ar8327_mib[i].name, ++ ETH_GSTRING_LEN); ++} ++ ++static void qca8k_mib_autocast_handler(struct dsa_switch *ds, struct sk_buff *skb) ++{ ++ struct qca8k_mib_eth_data *mib_eth_data; ++ struct qca8k_priv *priv = ds->priv; ++ const struct qca8k_mib_desc *mib; ++ struct mib_ethhdr *mib_ethhdr; ++ int i, mib_len, offset = 0; ++ u64 *data; ++ u8 port; ++ ++ mib_ethhdr = (struct mib_ethhdr *)skb_mac_header(skb); ++ mib_eth_data = &priv->mib_eth_data; ++ ++ /* The switch autocast every port. Ignore other packet and ++ * parse only the requested one. ++ */ ++ port = FIELD_GET(QCA_HDR_RECV_SOURCE_PORT, ntohs(mib_ethhdr->hdr)); ++ if (port != mib_eth_data->req_port) ++ goto exit; ++ ++ data = mib_eth_data->data; ++ ++ for (i = 0; i < priv->info->mib_count; i++) { ++ mib = &ar8327_mib[i]; ++ ++ /* First 3 mib are present in the skb head */ ++ if (i < 3) { ++ data[i] = mib_ethhdr->data[i]; ++ continue; ++ } ++ ++ mib_len = sizeof(uint32_t); ++ ++ /* Some mib are 64 bit wide */ ++ if (mib->size == 2) ++ mib_len = sizeof(uint64_t); ++ ++ /* Copy the mib value from packet to the */ ++ memcpy(data + i, skb->data + offset, mib_len); ++ ++ /* Set the offset for the next mib */ ++ offset += mib_len; ++ } ++ ++exit: ++ /* Complete on receiving all the mib packet */ ++ if (refcount_dec_and_test(&mib_eth_data->port_parsed)) ++ complete(&mib_eth_data->rw_done); ++} ++ ++static int ++qca8k_get_ethtool_stats_eth(struct dsa_switch *ds, int port, u64 *data) ++{ ++ struct dsa_port *dp = dsa_to_port(ds, port); ++ struct qca8k_mib_eth_data *mib_eth_data; ++ struct qca8k_priv *priv = ds->priv; ++ int ret; ++ ++ mib_eth_data = &priv->mib_eth_data; ++ ++ mutex_lock(&mib_eth_data->mutex); ++ ++ reinit_completion(&mib_eth_data->rw_done); ++ ++ mib_eth_data->req_port = dp->index; ++ mib_eth_data->data = data; ++ refcount_set(&mib_eth_data->port_parsed, QCA8K_NUM_PORTS); ++ ++ mutex_lock(&priv->reg_mutex); ++ ++ /* Send mib autocast request */ ++ ret = regmap_update_bits(priv->regmap, QCA8K_REG_MIB, ++ QCA8K_MIB_FUNC | QCA8K_MIB_BUSY, ++ FIELD_PREP(QCA8K_MIB_FUNC, QCA8K_MIB_CAST) | ++ QCA8K_MIB_BUSY); ++ ++ mutex_unlock(&priv->reg_mutex); ++ ++ if (ret) ++ goto exit; ++ ++ ret = wait_for_completion_timeout(&mib_eth_data->rw_done, QCA8K_ETHERNET_TIMEOUT); ++ ++exit: ++ mutex_unlock(&mib_eth_data->mutex); ++ ++ return ret; ++} ++ ++static void ++qca8k_get_ethtool_stats(struct dsa_switch *ds, int port, ++ uint64_t *data) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ const struct qca8k_mib_desc *mib; ++ u32 reg, i, val; ++ u32 hi = 0; ++ int ret; ++ ++ if (priv->mgmt_master && priv->info->ops->autocast_mib && ++ priv->info->ops->autocast_mib(ds, port, data) > 0) ++ return; ++ ++ for (i = 0; i < priv->info->mib_count; i++) { ++ mib = &ar8327_mib[i]; ++ reg = QCA8K_PORT_MIB_COUNTER(port) + mib->offset; ++ ++ ret = qca8k_read(priv, reg, &val); ++ if (ret < 0) ++ continue; ++ ++ if (mib->size == 2) { ++ ret = qca8k_read(priv, reg + 4, &hi); ++ if (ret < 0) ++ continue; ++ } ++ ++ data[i] = val; ++ if (mib->size == 2) ++ data[i] |= (u64)hi << 32; ++ } ++} ++ ++static int ++qca8k_get_sset_count(struct dsa_switch *ds, int port, int sset) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ ++ if (sset != ETH_SS_STATS) ++ return 0; ++ ++ return priv->info->mib_count; ++} ++ ++static int ++qca8k_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *eee) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ u32 lpi_en = QCA8K_REG_EEE_CTRL_LPI_EN(port); ++ u32 reg; ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ ret = qca8k_read(priv, QCA8K_REG_EEE_CTRL, ®); ++ if (ret < 0) ++ goto exit; ++ ++ if (eee->eee_enabled) ++ reg |= lpi_en; ++ else ++ reg &= ~lpi_en; ++ ret = qca8k_write(priv, QCA8K_REG_EEE_CTRL, reg); ++ ++exit: ++ mutex_unlock(&priv->reg_mutex); ++ return ret; ++} ++ ++static int ++qca8k_get_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e) ++{ ++ /* Nothing to do on the port's MAC */ ++ return 0; ++} ++ ++static void ++qca8k_port_stp_state_set(struct dsa_switch *ds, int port, u8 state) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ u32 stp_state; ++ ++ switch (state) { ++ case BR_STATE_DISABLED: ++ stp_state = QCA8K_PORT_LOOKUP_STATE_DISABLED; ++ break; ++ case BR_STATE_BLOCKING: ++ stp_state = QCA8K_PORT_LOOKUP_STATE_BLOCKING; ++ break; ++ case BR_STATE_LISTENING: ++ stp_state = QCA8K_PORT_LOOKUP_STATE_LISTENING; ++ break; ++ case BR_STATE_LEARNING: ++ stp_state = QCA8K_PORT_LOOKUP_STATE_LEARNING; ++ break; ++ case BR_STATE_FORWARDING: ++ default: ++ stp_state = QCA8K_PORT_LOOKUP_STATE_FORWARD; ++ break; ++ } ++ ++ qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_STATE_MASK, stp_state); ++} ++ ++static int ++qca8k_port_bridge_join(struct dsa_switch *ds, int port, struct net_device *br) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ int port_mask, cpu_port; ++ int i, ret; ++ ++ cpu_port = dsa_to_port(ds, port)->cpu_dp->index; ++ port_mask = BIT(cpu_port); ++ ++ for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ if (dsa_is_cpu_port(ds, i)) ++ continue; ++ if (dsa_to_port(ds, i)->bridge_dev != br) ++ continue; ++ /* Add this port to the portvlan mask of the other ports ++ * in the bridge ++ */ ++ ret = regmap_set_bits(priv->regmap, ++ QCA8K_PORT_LOOKUP_CTRL(i), ++ BIT(port)); ++ if (ret) ++ return ret; ++ if (i != port) ++ port_mask |= BIT(i); ++ } ++ ++ /* Add all other ports to this ports portvlan mask */ ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_MEMBER, port_mask); ++ ++ return ret; ++} ++ ++static void ++qca8k_port_bridge_leave(struct dsa_switch *ds, int port, struct net_device *br) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ int cpu_port, i; ++ ++ cpu_port = dsa_to_port(ds, port)->cpu_dp->index; ++ ++ for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ if (dsa_is_cpu_port(ds, i)) ++ continue; ++ if (dsa_to_port(ds, i)->bridge_dev != br) ++ continue; ++ /* Remove this port to the portvlan mask of the other ports ++ * in the bridge ++ */ ++ regmap_clear_bits(priv->regmap, ++ QCA8K_PORT_LOOKUP_CTRL(i), ++ BIT(port)); ++ } ++ ++ /* Set the cpu port to be the only one in the portvlan mask of ++ * this port ++ */ ++ qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_MEMBER, BIT(cpu_port)); ++} ++ ++static void ++qca8k_port_fast_age(struct dsa_switch *ds, int port) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ ++ mutex_lock(&priv->reg_mutex); ++ qca8k_fdb_access(priv, QCA8K_FDB_FLUSH_PORT, port); ++ mutex_unlock(&priv->reg_mutex); ++} ++ ++static int ++qca8k_set_ageing_time(struct dsa_switch *ds, unsigned int msecs) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ unsigned int secs = msecs / 1000; ++ u32 val; ++ ++ /* AGE_TIME reg is set in 7s step */ ++ val = secs / 7; ++ ++ /* Handle case with 0 as val to NOT disable ++ * learning ++ */ ++ if (!val) ++ val = 1; ++ ++ return regmap_update_bits(priv->regmap, QCA8K_REG_ATU_CTRL, QCA8K_ATU_AGE_TIME_MASK, ++ QCA8K_ATU_AGE_TIME(val)); ++} ++ ++static int ++qca8k_port_enable(struct dsa_switch *ds, int port, ++ struct phy_device *phy) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ ++ qca8k_port_set_status(priv, port, 1); ++ priv->port_enabled_map |= BIT(port); ++ ++ if (dsa_is_user_port(ds, port)) ++ phy_support_asym_pause(phy); ++ ++ return 0; ++} ++ ++static void ++qca8k_port_disable(struct dsa_switch *ds, int port) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ ++ qca8k_port_set_status(priv, port, 0); ++ priv->port_enabled_map &= ~BIT(port); ++} ++ ++static int ++qca8k_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int ret; ++ ++ /* We have only have a general MTU setting. ++ * DSA always set the CPU port's MTU to the largest MTU of the slave ++ * ports. ++ * Setting MTU just for the CPU port is sufficient to correctly set a ++ * value for every port. ++ */ ++ if (!dsa_is_cpu_port(ds, port)) ++ return 0; ++ ++ /* To change the MAX_FRAME_SIZE the cpu ports must be off or ++ * the switch panics. ++ * Turn off both cpu ports before applying the new value to prevent ++ * this. ++ */ ++ if (priv->port_enabled_map & BIT(0)) ++ qca8k_port_set_status(priv, 0, 0); ++ ++ if (priv->port_enabled_map & BIT(6)) ++ qca8k_port_set_status(priv, 6, 0); ++ ++ /* Include L2 header / FCS length */ ++ ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, new_mtu + ETH_HLEN + ETH_FCS_LEN); ++ ++ if (priv->port_enabled_map & BIT(0)) ++ qca8k_port_set_status(priv, 0, 1); ++ ++ if (priv->port_enabled_map & BIT(6)) ++ qca8k_port_set_status(priv, 6, 1); ++ ++ return ret; ++} ++ ++static int ++qca8k_port_max_mtu(struct dsa_switch *ds, int port) ++{ ++ return QCA8K_MAX_MTU; ++} ++ ++static int ++qca8k_port_fdb_insert(struct qca8k_priv *priv, const u8 *addr, ++ u16 port_mask, u16 vid) ++{ ++ /* Set the vid to the port vlan id if no vid is set */ ++ if (!vid) ++ vid = QCA8K_PORT_VID_DEF; ++ ++ return qca8k_fdb_add(priv, addr, port_mask, vid, ++ QCA8K_ATU_STATUS_STATIC); ++} ++ ++static int ++qca8k_port_fdb_add(struct dsa_switch *ds, int port, ++ const unsigned char *addr, u16 vid) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ u16 port_mask = BIT(port); ++ ++ return qca8k_port_fdb_insert(priv, addr, port_mask, vid); ++} ++ ++static int ++qca8k_port_fdb_del(struct dsa_switch *ds, int port, ++ const unsigned char *addr, u16 vid) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ u16 port_mask = BIT(port); ++ ++ if (!vid) ++ vid = QCA8K_PORT_VID_DEF; ++ ++ return qca8k_fdb_del(priv, addr, port_mask, vid); ++} ++ ++static int ++qca8k_port_fdb_dump(struct dsa_switch *ds, int port, ++ dsa_fdb_dump_cb_t *cb, void *data) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ struct qca8k_fdb _fdb = { 0 }; ++ int cnt = QCA8K_NUM_FDB_RECORDS; ++ bool is_static; ++ int ret = 0; ++ ++ mutex_lock(&priv->reg_mutex); ++ while (cnt-- && !qca8k_fdb_next(priv, &_fdb, port)) { ++ if (!_fdb.aging) ++ break; ++ is_static = (_fdb.aging == QCA8K_ATU_STATUS_STATIC); ++ ret = cb(_fdb.mac, _fdb.vid, is_static, data); ++ if (ret) ++ break; ++ } ++ mutex_unlock(&priv->reg_mutex); ++ ++ return 0; ++} ++ ++static int ++qca8k_port_mdb_add(struct dsa_switch *ds, int port, ++ const struct switchdev_obj_port_mdb *mdb) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ const u8 *addr = mdb->addr; ++ u16 vid = mdb->vid; ++ ++ return qca8k_fdb_search_and_insert(priv, BIT(port), addr, vid); ++} ++ ++static int ++qca8k_port_mdb_del(struct dsa_switch *ds, int port, ++ const struct switchdev_obj_port_mdb *mdb) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ const u8 *addr = mdb->addr; ++ u16 vid = mdb->vid; ++ ++ return qca8k_fdb_search_and_del(priv, BIT(port), addr, vid); ++} ++ ++static int ++qca8k_port_mirror_add(struct dsa_switch *ds, int port, ++ struct dsa_mall_mirror_tc_entry *mirror, ++ bool ingress) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int monitor_port, ret; ++ u32 reg, val; ++ ++ /* Check for existent entry */ ++ if ((ingress ? priv->mirror_rx : priv->mirror_tx) & BIT(port)) ++ return -EEXIST; ++ ++ ret = regmap_read(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, &val); ++ if (ret) ++ return ret; ++ ++ /* QCA83xx can have only one port set to mirror mode. ++ * Check that the correct port is requested and return error otherwise. ++ * When no mirror port is set, the values is set to 0xF ++ */ ++ monitor_port = FIELD_GET(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); ++ if (monitor_port != 0xF && monitor_port != mirror->to_local_port) ++ return -EEXIST; ++ ++ /* Set the monitor port */ ++ val = FIELD_PREP(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, ++ mirror->to_local_port); ++ ret = regmap_update_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, ++ QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); ++ if (ret) ++ return ret; ++ ++ if (ingress) { ++ reg = QCA8K_PORT_LOOKUP_CTRL(port); ++ val = QCA8K_PORT_LOOKUP_ING_MIRROR_EN; ++ } else { ++ reg = QCA8K_REG_PORT_HOL_CTRL1(port); ++ val = QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN; ++ } ++ ++ ret = regmap_update_bits(priv->regmap, reg, val, val); ++ if (ret) ++ return ret; ++ ++ /* Track mirror port for tx and rx to decide when the ++ * mirror port has to be disabled. ++ */ ++ if (ingress) ++ priv->mirror_rx |= BIT(port); ++ else ++ priv->mirror_tx |= BIT(port); ++ ++ return 0; ++} ++ ++static void ++qca8k_port_mirror_del(struct dsa_switch *ds, int port, ++ struct dsa_mall_mirror_tc_entry *mirror) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ u32 reg, val; ++ int ret; ++ ++ if (mirror->ingress) { ++ reg = QCA8K_PORT_LOOKUP_CTRL(port); ++ val = QCA8K_PORT_LOOKUP_ING_MIRROR_EN; ++ } else { ++ reg = QCA8K_REG_PORT_HOL_CTRL1(port); ++ val = QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN; ++ } ++ ++ ret = regmap_clear_bits(priv->regmap, reg, val); ++ if (ret) ++ goto err; ++ ++ if (mirror->ingress) ++ priv->mirror_rx &= ~BIT(port); ++ else ++ priv->mirror_tx &= ~BIT(port); ++ ++ /* No port set to send packet to mirror port. Disable mirror port */ ++ if (!priv->mirror_rx && !priv->mirror_tx) { ++ val = FIELD_PREP(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, 0xF); ++ ret = regmap_update_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, ++ QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); ++ if (ret) ++ goto err; ++ } ++err: ++ dev_err(priv->dev, "Failed to del mirror port from %d", port); ++} ++ ++static int ++qca8k_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering, ++ struct netlink_ext_ack *extack) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int ret; ++ ++ if (vlan_filtering) { ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_VLAN_MODE_MASK, ++ QCA8K_PORT_LOOKUP_VLAN_MODE_SECURE); ++ } else { ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_VLAN_MODE_MASK, ++ QCA8K_PORT_LOOKUP_VLAN_MODE_NONE); ++ } ++ ++ return ret; ++} ++ ++static int ++qca8k_port_vlan_add(struct dsa_switch *ds, int port, ++ const struct switchdev_obj_port_vlan *vlan, ++ struct netlink_ext_ack *extack) ++{ ++ bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; ++ bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID; ++ struct qca8k_priv *priv = ds->priv; ++ int ret; ++ ++ ret = qca8k_vlan_add(priv, port, vlan->vid, untagged); ++ if (ret) { ++ dev_err(priv->dev, "Failed to add VLAN to port %d (%d)", port, ret); ++ return ret; ++ } ++ ++ if (pvid) { ++ ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(port), ++ QCA8K_EGREES_VLAN_PORT_MASK(port), ++ QCA8K_EGREES_VLAN_PORT(port, vlan->vid)); ++ if (ret) ++ return ret; ++ ++ ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(port), ++ QCA8K_PORT_VLAN_CVID(vlan->vid) | ++ QCA8K_PORT_VLAN_SVID(vlan->vid)); ++ } ++ ++ return ret; ++} ++ ++static int ++qca8k_port_vlan_del(struct dsa_switch *ds, int port, ++ const struct switchdev_obj_port_vlan *vlan) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int ret; ++ ++ ret = qca8k_vlan_del(priv, port, vlan->vid); ++ if (ret) ++ dev_err(priv->dev, "Failed to delete VLAN from port %d (%d)", port, ret); ++ ++ return ret; ++} ++ ++static u32 qca8k_get_phy_flags(struct dsa_switch *ds, int port) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ ++ /* Communicate to the phy internal driver the switch revision. ++ * Based on the switch revision different values needs to be ++ * set to the dbg and mmd reg on the phy. ++ * The first 2 bit are used to communicate the switch revision ++ * to the phy driver. ++ */ ++ if (port > 0 && port < 6) ++ return priv->switch_revision; ++ ++ return 0; ++} ++ ++static enum dsa_tag_protocol ++qca8k_get_tag_protocol(struct dsa_switch *ds, int port, ++ enum dsa_tag_protocol mp) ++{ ++ return DSA_TAG_PROTO_QCA; ++} ++ ++static bool ++qca8k_lag_can_offload(struct dsa_switch *ds, ++ struct net_device *lag, ++ struct netdev_lag_upper_info *info) ++{ ++ struct dsa_port *dp; ++ int id, members = 0; ++ ++ id = dsa_lag_id(ds->dst, lag); ++ if (id < 0 || id >= ds->num_lag_ids) ++ return false; ++ ++ dsa_lag_foreach_port(dp, ds->dst, lag) ++ /* Includes the port joining the LAG */ ++ members++; ++ ++ if (members > QCA8K_NUM_PORTS_FOR_LAG) ++ return false; ++ ++ if (info->tx_type != NETDEV_LAG_TX_TYPE_HASH) ++ return false; ++ ++ if (info->hash_type != NETDEV_LAG_HASH_L2 && ++ info->hash_type != NETDEV_LAG_HASH_L23) ++ return false; ++ ++ return true; ++} ++ ++static int ++qca8k_lag_setup_hash(struct dsa_switch *ds, ++ struct net_device *lag, ++ struct netdev_lag_upper_info *info) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ bool unique_lag = true; ++ u32 hash = 0; ++ int i, id; ++ ++ id = dsa_lag_id(ds->dst, lag); ++ ++ switch (info->hash_type) { ++ case NETDEV_LAG_HASH_L23: ++ hash |= QCA8K_TRUNK_HASH_SIP_EN; ++ hash |= QCA8K_TRUNK_HASH_DIP_EN; ++ fallthrough; ++ case NETDEV_LAG_HASH_L2: ++ hash |= QCA8K_TRUNK_HASH_SA_EN; ++ hash |= QCA8K_TRUNK_HASH_DA_EN; ++ break; ++ default: /* We should NEVER reach this */ ++ return -EOPNOTSUPP; ++ } ++ ++ /* Check if we are the unique configured LAG */ ++ dsa_lags_foreach_id(i, ds->dst) ++ if (i != id && dsa_lag_dev(ds->dst, i)) { ++ unique_lag = false; ++ break; ++ } ++ ++ /* Hash Mode is global. Make sure the same Hash Mode ++ * is set to all the 4 possible lag. ++ * If we are the unique LAG we can set whatever hash ++ * mode we want. ++ * To change hash mode it's needed to remove all LAG ++ * and change the mode with the latest. ++ */ ++ if (unique_lag) { ++ priv->lag_hash_mode = hash; ++ } else if (priv->lag_hash_mode != hash) { ++ netdev_err(lag, "Error: Mismateched Hash Mode across different lag is not supported\n"); ++ return -EOPNOTSUPP; ++ } ++ ++ return regmap_update_bits(priv->regmap, QCA8K_TRUNK_HASH_EN_CTRL, ++ QCA8K_TRUNK_HASH_MASK, hash); ++} ++ ++static int ++qca8k_lag_refresh_portmap(struct dsa_switch *ds, int port, ++ struct net_device *lag, bool delete) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int ret, id, i; ++ u32 val; ++ ++ id = dsa_lag_id(ds->dst, lag); ++ ++ /* Read current port member */ ++ ret = regmap_read(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL0, &val); ++ if (ret) ++ return ret; ++ ++ /* Shift val to the correct trunk */ ++ val >>= QCA8K_REG_GOL_TRUNK_SHIFT(id); ++ val &= QCA8K_REG_GOL_TRUNK_MEMBER_MASK; ++ if (delete) ++ val &= ~BIT(port); ++ else ++ val |= BIT(port); ++ ++ /* Update port member. With empty portmap disable trunk */ ++ ret = regmap_update_bits(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL0, ++ QCA8K_REG_GOL_TRUNK_MEMBER(id) | ++ QCA8K_REG_GOL_TRUNK_EN(id), ++ !val << QCA8K_REG_GOL_TRUNK_SHIFT(id) | ++ val << QCA8K_REG_GOL_TRUNK_SHIFT(id)); ++ ++ /* Search empty member if adding or port on deleting */ ++ for (i = 0; i < QCA8K_NUM_PORTS_FOR_LAG; i++) { ++ ret = regmap_read(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL(id), &val); ++ if (ret) ++ return ret; ++ ++ val >>= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i); ++ val &= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_MASK; ++ ++ if (delete) { ++ /* If port flagged to be disabled assume this member is ++ * empty ++ */ ++ if (val != QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK) ++ continue; ++ ++ val &= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT_MASK; ++ if (val != port) ++ continue; ++ } else { ++ /* If port flagged to be enabled assume this member is ++ * already set ++ */ ++ if (val == QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK) ++ continue; ++ } ++ ++ /* We have found the member to add/remove */ ++ break; ++ } ++ ++ /* Set port in the correct port mask or disable port if in delete mode */ ++ return regmap_update_bits(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL(id), ++ QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN(id, i) | ++ QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT(id, i), ++ !delete << QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i) | ++ port << QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i)); ++} ++ ++static int ++qca8k_port_lag_join(struct dsa_switch *ds, int port, ++ struct net_device *lag, ++ struct netdev_lag_upper_info *info) ++{ ++ int ret; ++ ++ if (!qca8k_lag_can_offload(ds, lag, info)) ++ return -EOPNOTSUPP; ++ ++ ret = qca8k_lag_setup_hash(ds, lag, info); ++ if (ret) ++ return ret; ++ ++ return qca8k_lag_refresh_portmap(ds, port, lag, false); ++} ++ ++static int ++qca8k_port_lag_leave(struct dsa_switch *ds, int port, ++ struct net_device *lag) ++{ ++ return qca8k_lag_refresh_portmap(ds, port, lag, true); ++} ++ ++static void ++qca8k_master_change(struct dsa_switch *ds, const struct net_device *master, ++ bool operational) ++{ ++ struct dsa_port *dp = master->dsa_ptr; ++ struct qca8k_priv *priv = ds->priv; ++ ++ /* Ethernet MIB/MDIO is only supported for CPU port 0 */ ++ if (dp->index != 0) ++ return; ++ ++ mutex_lock(&priv->mgmt_eth_data.mutex); ++ mutex_lock(&priv->mib_eth_data.mutex); ++ ++ priv->mgmt_master = operational ? (struct net_device *)master : NULL; ++ ++ mutex_unlock(&priv->mib_eth_data.mutex); ++ mutex_unlock(&priv->mgmt_eth_data.mutex); ++} ++ ++static int qca8k_connect_tag_protocol(struct dsa_switch *ds, ++ enum dsa_tag_protocol proto) ++{ ++ struct qca_tagger_data *tagger_data; ++ ++ switch (proto) { ++ case DSA_TAG_PROTO_QCA: ++ tagger_data = ds->tagger_data; ++ ++ tagger_data->rw_reg_ack_handler = qca8k_rw_reg_ack_handler; ++ tagger_data->mib_autocast_handler = qca8k_mib_autocast_handler; ++ ++ break; ++ default: ++ return -EOPNOTSUPP; ++ } ++ ++ return 0; ++} ++ ++static const struct dsa_switch_ops qca8k_switch_ops = { ++ .get_tag_protocol = qca8k_get_tag_protocol, ++ .setup = qca8k_setup, ++ .get_strings = qca8k_get_strings, ++ .get_ethtool_stats = qca8k_get_ethtool_stats, ++ .get_sset_count = qca8k_get_sset_count, ++ .set_ageing_time = qca8k_set_ageing_time, ++ .get_mac_eee = qca8k_get_mac_eee, ++ .set_mac_eee = qca8k_set_mac_eee, ++ .port_enable = qca8k_port_enable, ++ .port_disable = qca8k_port_disable, ++ .port_change_mtu = qca8k_port_change_mtu, ++ .port_max_mtu = qca8k_port_max_mtu, ++ .port_stp_state_set = qca8k_port_stp_state_set, ++ .port_bridge_join = qca8k_port_bridge_join, ++ .port_bridge_leave = qca8k_port_bridge_leave, ++ .port_fast_age = qca8k_port_fast_age, ++ .port_fdb_add = qca8k_port_fdb_add, ++ .port_fdb_del = qca8k_port_fdb_del, ++ .port_fdb_dump = qca8k_port_fdb_dump, ++ .port_mdb_add = qca8k_port_mdb_add, ++ .port_mdb_del = qca8k_port_mdb_del, ++ .port_mirror_add = qca8k_port_mirror_add, ++ .port_mirror_del = qca8k_port_mirror_del, ++ .port_vlan_filtering = qca8k_port_vlan_filtering, ++ .port_vlan_add = qca8k_port_vlan_add, ++ .port_vlan_del = qca8k_port_vlan_del, ++ .phylink_validate = qca8k_phylink_validate, ++ .phylink_mac_link_state = qca8k_phylink_mac_link_state, ++ .phylink_mac_config = qca8k_phylink_mac_config, ++ .phylink_mac_link_down = qca8k_phylink_mac_link_down, ++ .phylink_mac_link_up = qca8k_phylink_mac_link_up, ++ .get_phy_flags = qca8k_get_phy_flags, ++ .port_lag_join = qca8k_port_lag_join, ++ .port_lag_leave = qca8k_port_lag_leave, ++ .master_state_change = qca8k_master_change, ++ .connect_tag_protocol = qca8k_connect_tag_protocol, ++}; ++ ++static int qca8k_read_switch_id(struct qca8k_priv *priv) ++{ ++ u32 val; ++ u8 id; ++ int ret; ++ ++ if (!priv->info) ++ return -ENODEV; ++ ++ ret = qca8k_read(priv, QCA8K_REG_MASK_CTRL, &val); ++ if (ret < 0) ++ return -ENODEV; ++ ++ id = QCA8K_MASK_CTRL_DEVICE_ID(val); ++ if (id != priv->info->id) { ++ dev_err(priv->dev, ++ "Switch id detected %x but expected %x", ++ id, priv->info->id); ++ return -ENODEV; ++ } ++ ++ priv->switch_id = id; ++ ++ /* Save revision to communicate to the internal PHY driver */ ++ priv->switch_revision = QCA8K_MASK_CTRL_REV_ID(val); ++ ++ return 0; ++} ++ ++static int ++qca8k_sw_probe(struct mdio_device *mdiodev) ++{ ++ struct qca8k_priv *priv; ++ int ret; ++ ++ /* allocate the private data struct so that we can probe the switches ++ * ID register ++ */ ++ priv = devm_kzalloc(&mdiodev->dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ priv->info = of_device_get_match_data(priv->dev); ++ priv->bus = mdiodev->bus; ++ priv->dev = &mdiodev->dev; ++ ++ priv->reset_gpio = devm_gpiod_get_optional(priv->dev, "reset", ++ GPIOD_ASIS); ++ if (IS_ERR(priv->reset_gpio)) ++ return PTR_ERR(priv->reset_gpio); ++ ++ if (priv->reset_gpio) { ++ gpiod_set_value_cansleep(priv->reset_gpio, 1); ++ /* The active low duration must be greater than 10 ms ++ * and checkpatch.pl wants 20 ms. ++ */ ++ msleep(20); ++ gpiod_set_value_cansleep(priv->reset_gpio, 0); ++ } ++ ++ /* Start by setting up the register mapping */ ++ priv->regmap = devm_regmap_init(&mdiodev->dev, NULL, priv, ++ &qca8k_regmap_config); ++ if (IS_ERR(priv->regmap)) { ++ dev_err(priv->dev, "regmap initialization failed"); ++ return PTR_ERR(priv->regmap); ++ } ++ ++ priv->mdio_cache.page = 0xffff; ++ priv->mdio_cache.lo = 0xffff; ++ priv->mdio_cache.hi = 0xffff; ++ ++ /* Check the detected switch id */ ++ ret = qca8k_read_switch_id(priv); ++ if (ret) ++ return ret; ++ ++ priv->ds = devm_kzalloc(&mdiodev->dev, sizeof(*priv->ds), GFP_KERNEL); ++ if (!priv->ds) ++ return -ENOMEM; ++ ++ mutex_init(&priv->mgmt_eth_data.mutex); ++ init_completion(&priv->mgmt_eth_data.rw_done); ++ ++ mutex_init(&priv->mib_eth_data.mutex); ++ init_completion(&priv->mib_eth_data.rw_done); ++ ++ priv->ds->dev = &mdiodev->dev; ++ priv->ds->num_ports = QCA8K_NUM_PORTS; ++ priv->ds->priv = priv; ++ priv->ds->ops = &qca8k_switch_ops; ++ mutex_init(&priv->reg_mutex); ++ dev_set_drvdata(&mdiodev->dev, priv); ++ ++ return dsa_register_switch(priv->ds); ++} ++ ++static void ++qca8k_sw_remove(struct mdio_device *mdiodev) ++{ ++ struct qca8k_priv *priv = dev_get_drvdata(&mdiodev->dev); ++ int i; ++ ++ if (!priv) ++ return; ++ ++ for (i = 0; i < QCA8K_NUM_PORTS; i++) ++ qca8k_port_set_status(priv, i, 0); ++ ++ dsa_unregister_switch(priv->ds); ++ ++ dev_set_drvdata(&mdiodev->dev, NULL); ++} ++ ++static void qca8k_sw_shutdown(struct mdio_device *mdiodev) ++{ ++ struct qca8k_priv *priv = dev_get_drvdata(&mdiodev->dev); ++ ++ if (!priv) ++ return; ++ ++ dsa_switch_shutdown(priv->ds); ++ ++ dev_set_drvdata(&mdiodev->dev, NULL); ++} ++ ++#ifdef CONFIG_PM_SLEEP ++static void ++qca8k_set_pm(struct qca8k_priv *priv, int enable) ++{ ++ int port; ++ ++ for (port = 0; port < QCA8K_NUM_PORTS; port++) { ++ /* Do not enable on resume if the port was ++ * disabled before. ++ */ ++ if (!(priv->port_enabled_map & BIT(port))) ++ continue; ++ ++ qca8k_port_set_status(priv, port, enable); ++ } ++} ++ ++static int qca8k_suspend(struct device *dev) ++{ ++ struct qca8k_priv *priv = dev_get_drvdata(dev); ++ ++ qca8k_set_pm(priv, 0); ++ ++ return dsa_switch_suspend(priv->ds); ++} ++ ++static int qca8k_resume(struct device *dev) ++{ ++ struct qca8k_priv *priv = dev_get_drvdata(dev); ++ ++ qca8k_set_pm(priv, 1); ++ ++ return dsa_switch_resume(priv->ds); ++} ++#endif /* CONFIG_PM_SLEEP */ ++ ++static SIMPLE_DEV_PM_OPS(qca8k_pm_ops, ++ qca8k_suspend, qca8k_resume); ++ ++static const struct qca8k_info_ops qca8xxx_ops = { ++ .autocast_mib = qca8k_get_ethtool_stats_eth, ++}; ++ ++static const struct qca8k_match_data qca8327 = { ++ .id = QCA8K_ID_QCA8327, ++ .reduced_package = true, ++ .mib_count = QCA8K_QCA832X_MIB_COUNT, ++ .ops = &qca8xxx_ops, ++}; ++ ++static const struct qca8k_match_data qca8328 = { ++ .id = QCA8K_ID_QCA8327, ++ .mib_count = QCA8K_QCA832X_MIB_COUNT, ++ .ops = &qca8xxx_ops, ++}; ++ ++static const struct qca8k_match_data qca833x = { ++ .id = QCA8K_ID_QCA8337, ++ .mib_count = QCA8K_QCA833X_MIB_COUNT, ++ .ops = &qca8xxx_ops, ++}; ++ ++static const struct of_device_id qca8k_of_match[] = { ++ { .compatible = "qca,qca8327", .data = &qca8327 }, ++ { .compatible = "qca,qca8328", .data = &qca8328 }, ++ { .compatible = "qca,qca8334", .data = &qca833x }, ++ { .compatible = "qca,qca8337", .data = &qca833x }, ++ { /* sentinel */ }, ++}; ++ ++static struct mdio_driver qca8kmdio_driver = { ++ .probe = qca8k_sw_probe, ++ .remove = qca8k_sw_remove, ++ .shutdown = qca8k_sw_shutdown, ++ .mdiodrv.driver = { ++ .name = "qca8k", ++ .of_match_table = qca8k_of_match, ++ .pm = &qca8k_pm_ops, ++ }, ++}; ++ ++mdio_module_driver(qca8kmdio_driver); ++ ++MODULE_AUTHOR("Mathieu Olivari, John Crispin "); ++MODULE_DESCRIPTION("Driver for QCA8K ethernet switch family"); ++MODULE_LICENSE("GPL v2"); ++MODULE_ALIAS("platform:qca8k"); +--- /dev/null ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -0,0 +1,63 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2009 Felix Fietkau ++ * Copyright (C) 2011-2012 Gabor Juhos ++ * Copyright (c) 2015, 2019, The Linux Foundation. All rights reserved. ++ * Copyright (c) 2016 John Crispin ++ */ ++ ++#include ++#include ++ ++#include "qca8k.h" ++ ++#define MIB_DESC(_s, _o, _n) \ ++ { \ ++ .size = (_s), \ ++ .offset = (_o), \ ++ .name = (_n), \ ++ } ++ ++const struct qca8k_mib_desc ar8327_mib[] = { ++ MIB_DESC(1, 0x00, "RxBroad"), ++ MIB_DESC(1, 0x04, "RxPause"), ++ MIB_DESC(1, 0x08, "RxMulti"), ++ MIB_DESC(1, 0x0c, "RxFcsErr"), ++ MIB_DESC(1, 0x10, "RxAlignErr"), ++ MIB_DESC(1, 0x14, "RxRunt"), ++ MIB_DESC(1, 0x18, "RxFragment"), ++ MIB_DESC(1, 0x1c, "Rx64Byte"), ++ MIB_DESC(1, 0x20, "Rx128Byte"), ++ MIB_DESC(1, 0x24, "Rx256Byte"), ++ MIB_DESC(1, 0x28, "Rx512Byte"), ++ MIB_DESC(1, 0x2c, "Rx1024Byte"), ++ MIB_DESC(1, 0x30, "Rx1518Byte"), ++ MIB_DESC(1, 0x34, "RxMaxByte"), ++ MIB_DESC(1, 0x38, "RxTooLong"), ++ MIB_DESC(2, 0x3c, "RxGoodByte"), ++ MIB_DESC(2, 0x44, "RxBadByte"), ++ MIB_DESC(1, 0x4c, "RxOverFlow"), ++ MIB_DESC(1, 0x50, "Filtered"), ++ MIB_DESC(1, 0x54, "TxBroad"), ++ MIB_DESC(1, 0x58, "TxPause"), ++ MIB_DESC(1, 0x5c, "TxMulti"), ++ MIB_DESC(1, 0x60, "TxUnderRun"), ++ MIB_DESC(1, 0x64, "Tx64Byte"), ++ MIB_DESC(1, 0x68, "Tx128Byte"), ++ MIB_DESC(1, 0x6c, "Tx256Byte"), ++ MIB_DESC(1, 0x70, "Tx512Byte"), ++ MIB_DESC(1, 0x74, "Tx1024Byte"), ++ MIB_DESC(1, 0x78, "Tx1518Byte"), ++ MIB_DESC(1, 0x7c, "TxMaxByte"), ++ MIB_DESC(1, 0x80, "TxOverSize"), ++ MIB_DESC(2, 0x84, "TxByte"), ++ MIB_DESC(1, 0x8c, "TxCollision"), ++ MIB_DESC(1, 0x90, "TxAbortCol"), ++ MIB_DESC(1, 0x94, "TxMultiCol"), ++ MIB_DESC(1, 0x98, "TxSingleCol"), ++ MIB_DESC(1, 0x9c, "TxExcDefer"), ++ MIB_DESC(1, 0xa0, "TxDefer"), ++ MIB_DESC(1, 0xa4, "TxLateCol"), ++ MIB_DESC(1, 0xa8, "RXUnicast"), ++ MIB_DESC(1, 0xac, "TXUnicast"), ++}; +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -414,4 +414,7 @@ struct qca8k_fdb { + u8 mac[6]; + }; + ++/* Common setup function */ ++extern const struct qca8k_mib_desc ar8327_mib[]; ++ + #endif /* __QCA8K_H */ diff --git a/target/linux/generic/backport-5.15/771-v6.0-04-net-dsa-qca8k-move-qca8k-read-write-rmw-and-reg-tabl.patch b/target/linux/generic/backport-5.15/771-v6.0-04-net-dsa-qca8k-move-qca8k-read-write-rmw-and-reg-tabl.patch new file mode 100644 index 000000000..012ab8547 --- /dev/null +++ b/target/linux/generic/backport-5.15/771-v6.0-04-net-dsa-qca8k-move-qca8k-read-write-rmw-and-reg-tabl.patch @@ -0,0 +1,135 @@ +From d5f901eab2e9dfed1095995dfc98f231f4fd2971 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 27 Jul 2022 13:35:13 +0200 +Subject: [PATCH 04/14] net: dsa: qca8k: move qca8k read/write/rmw and reg + table to common code + +The same reg table and read/write/rmw function are used by drivers +based on qca8k family switch. +Move them to common code to make it accessible also by other drivers. + +Signed-off-by: Christian Marangi +Reviewed-by: Vladimir Oltean +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 42 ------------------------------ + drivers/net/dsa/qca/qca8k-common.c | 38 +++++++++++++++++++++++++++ + drivers/net/dsa/qca/qca8k.h | 6 +++++ + 3 files changed, 44 insertions(+), 42 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -133,24 +133,6 @@ qca8k_set_page(struct qca8k_priv *priv, + return 0; + } + +-static int +-qca8k_read(struct qca8k_priv *priv, u32 reg, u32 *val) +-{ +- return regmap_read(priv->regmap, reg, val); +-} +- +-static int +-qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val) +-{ +- return regmap_write(priv->regmap, reg, val); +-} +- +-static int +-qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val) +-{ +- return regmap_update_bits(priv->regmap, reg, mask, write_val); +-} +- + static void qca8k_rw_reg_ack_handler(struct dsa_switch *ds, struct sk_buff *skb) + { + struct qca8k_mgmt_eth_data *mgmt_eth_data; +@@ -483,30 +465,6 @@ exit: + return ret; + } + +-static const struct regmap_range qca8k_readable_ranges[] = { +- regmap_reg_range(0x0000, 0x00e4), /* Global control */ +- regmap_reg_range(0x0100, 0x0168), /* EEE control */ +- regmap_reg_range(0x0200, 0x0270), /* Parser control */ +- regmap_reg_range(0x0400, 0x0454), /* ACL */ +- regmap_reg_range(0x0600, 0x0718), /* Lookup */ +- regmap_reg_range(0x0800, 0x0b70), /* QM */ +- regmap_reg_range(0x0c00, 0x0c80), /* PKT */ +- regmap_reg_range(0x0e00, 0x0e98), /* L3 */ +- regmap_reg_range(0x1000, 0x10ac), /* MIB - Port0 */ +- regmap_reg_range(0x1100, 0x11ac), /* MIB - Port1 */ +- regmap_reg_range(0x1200, 0x12ac), /* MIB - Port2 */ +- regmap_reg_range(0x1300, 0x13ac), /* MIB - Port3 */ +- regmap_reg_range(0x1400, 0x14ac), /* MIB - Port4 */ +- regmap_reg_range(0x1500, 0x15ac), /* MIB - Port5 */ +- regmap_reg_range(0x1600, 0x16ac), /* MIB - Port6 */ +- +-}; +- +-static const struct regmap_access_table qca8k_readable_table = { +- .yes_ranges = qca8k_readable_ranges, +- .n_yes_ranges = ARRAY_SIZE(qca8k_readable_ranges), +-}; +- + static struct regmap_config qca8k_regmap_config = { + .reg_bits = 16, + .val_bits = 32, +--- a/drivers/net/dsa/qca/qca8k-common.c ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -61,3 +61,41 @@ const struct qca8k_mib_desc ar8327_mib[] + MIB_DESC(1, 0xa8, "RXUnicast"), + MIB_DESC(1, 0xac, "TXUnicast"), + }; ++ ++int qca8k_read(struct qca8k_priv *priv, u32 reg, u32 *val) ++{ ++ return regmap_read(priv->regmap, reg, val); ++} ++ ++int qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val) ++{ ++ return regmap_write(priv->regmap, reg, val); ++} ++ ++int qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val) ++{ ++ return regmap_update_bits(priv->regmap, reg, mask, write_val); ++} ++ ++static const struct regmap_range qca8k_readable_ranges[] = { ++ regmap_reg_range(0x0000, 0x00e4), /* Global control */ ++ regmap_reg_range(0x0100, 0x0168), /* EEE control */ ++ regmap_reg_range(0x0200, 0x0270), /* Parser control */ ++ regmap_reg_range(0x0400, 0x0454), /* ACL */ ++ regmap_reg_range(0x0600, 0x0718), /* Lookup */ ++ regmap_reg_range(0x0800, 0x0b70), /* QM */ ++ regmap_reg_range(0x0c00, 0x0c80), /* PKT */ ++ regmap_reg_range(0x0e00, 0x0e98), /* L3 */ ++ regmap_reg_range(0x1000, 0x10ac), /* MIB - Port0 */ ++ regmap_reg_range(0x1100, 0x11ac), /* MIB - Port1 */ ++ regmap_reg_range(0x1200, 0x12ac), /* MIB - Port2 */ ++ regmap_reg_range(0x1300, 0x13ac), /* MIB - Port3 */ ++ regmap_reg_range(0x1400, 0x14ac), /* MIB - Port4 */ ++ regmap_reg_range(0x1500, 0x15ac), /* MIB - Port5 */ ++ regmap_reg_range(0x1600, 0x16ac), /* MIB - Port6 */ ++}; ++ ++const struct regmap_access_table qca8k_readable_table = { ++ .yes_ranges = qca8k_readable_ranges, ++ .n_yes_ranges = ARRAY_SIZE(qca8k_readable_ranges), ++}; +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -416,5 +416,11 @@ struct qca8k_fdb { + + /* Common setup function */ + extern const struct qca8k_mib_desc ar8327_mib[]; ++extern const struct regmap_access_table qca8k_readable_table; ++ ++/* Common read/write/rmw function */ ++int qca8k_read(struct qca8k_priv *priv, u32 reg, u32 *val); ++int qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val); ++int qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val); + + #endif /* __QCA8K_H */ diff --git a/target/linux/generic/backport-5.15/771-v6.0-05-net-dsa-qca8k-move-qca8k-bulk-read-write-helper-to-c.patch b/target/linux/generic/backport-5.15/771-v6.0-05-net-dsa-qca8k-move-qca8k-bulk-read-write-helper-to-c.patch new file mode 100644 index 000000000..0ed7ed41f --- /dev/null +++ b/target/linux/generic/backport-5.15/771-v6.0-05-net-dsa-qca8k-move-qca8k-bulk-read-write-helper-to-c.patch @@ -0,0 +1,145 @@ +From 910746444313dc463396cd63024cdf54ef04ef39 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 27 Jul 2022 13:35:14 +0200 +Subject: [PATCH 05/14] net: dsa: qca8k: move qca8k bulk read/write helper to + common code + +The same ATU function are used by drivers based on qca8k family switch. +Move the bulk read/write helper to common code to declare these shared +ATU functions in common code. +These helper will be dropped when regmap correctly support bulk +read/write. + +Signed-off-by: Christian Marangi +Reviewed-by: Vladimir Oltean +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 39 ++---------------------------- + drivers/net/dsa/qca/qca8k-common.c | 39 ++++++++++++++++++++++++++++++ + drivers/net/dsa/qca/qca8k.h | 8 ++++++ + 3 files changed, 49 insertions(+), 37 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -343,43 +343,6 @@ qca8k_regmap_update_bits_eth(struct qca8 + } + + static int +-qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len) +-{ +- int i, count = len / sizeof(u32), ret; +- +- if (priv->mgmt_master && !qca8k_read_eth(priv, reg, val, len)) +- return 0; +- +- for (i = 0; i < count; i++) { +- ret = regmap_read(priv->regmap, reg + (i * 4), val + i); +- if (ret < 0) +- return ret; +- } +- +- return 0; +-} +- +-static int +-qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len) +-{ +- int i, count = len / sizeof(u32), ret; +- u32 tmp; +- +- if (priv->mgmt_master && !qca8k_write_eth(priv, reg, val, len)) +- return 0; +- +- for (i = 0; i < count; i++) { +- tmp = val[i]; +- +- ret = regmap_write(priv->regmap, reg + (i * 4), tmp); +- if (ret < 0) +- return ret; +- } +- +- return 0; +-} +- +-static int + qca8k_regmap_read(void *ctx, uint32_t reg, uint32_t *val) + { + struct qca8k_priv *priv = (struct qca8k_priv *)ctx; +@@ -3096,6 +3059,8 @@ static SIMPLE_DEV_PM_OPS(qca8k_pm_ops, + + static const struct qca8k_info_ops qca8xxx_ops = { + .autocast_mib = qca8k_get_ethtool_stats_eth, ++ .read_eth = qca8k_read_eth, ++ .write_eth = qca8k_write_eth, + }; + + static const struct qca8k_match_data qca8327 = { +--- a/drivers/net/dsa/qca/qca8k-common.c ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -99,3 +99,42 @@ const struct regmap_access_table qca8k_r + .yes_ranges = qca8k_readable_ranges, + .n_yes_ranges = ARRAY_SIZE(qca8k_readable_ranges), + }; ++ ++/* TODO: remove these extra ops when we can support regmap bulk read/write */ ++int qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len) ++{ ++ int i, count = len / sizeof(u32), ret; ++ ++ if (priv->mgmt_master && priv->info->ops->read_eth && ++ !priv->info->ops->read_eth(priv, reg, val, len)) ++ return 0; ++ ++ for (i = 0; i < count; i++) { ++ ret = regmap_read(priv->regmap, reg + (i * 4), val + i); ++ if (ret < 0) ++ return ret; ++ } ++ ++ return 0; ++} ++ ++/* TODO: remove these extra ops when we can support regmap bulk read/write */ ++int qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len) ++{ ++ int i, count = len / sizeof(u32), ret; ++ u32 tmp; ++ ++ if (priv->mgmt_master && priv->info->ops->write_eth && ++ !priv->info->ops->write_eth(priv, reg, val, len)) ++ return 0; ++ ++ for (i = 0; i < count; i++) { ++ tmp = val[i]; ++ ++ ret = regmap_write(priv->regmap, reg + (i * 4), tmp); ++ if (ret < 0) ++ return ret; ++ } ++ ++ return 0; ++} +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -324,8 +324,13 @@ enum qca8k_mid_cmd { + QCA8K_MIB_CAST = 3, + }; + ++struct qca8k_priv; ++ + struct qca8k_info_ops { + int (*autocast_mib)(struct dsa_switch *ds, int port, u64 *data); ++ /* TODO: remove these extra ops when we can support regmap bulk read/write */ ++ int (*read_eth)(struct qca8k_priv *priv, u32 reg, u32 *val, int len); ++ int (*write_eth)(struct qca8k_priv *priv, u32 reg, u32 *val, int len); + }; + + struct qca8k_match_data { +@@ -423,4 +428,7 @@ int qca8k_read(struct qca8k_priv *priv, + int qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val); + int qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val); + ++int qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len); ++int qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len); ++ + #endif /* __QCA8K_H */ diff --git a/target/linux/generic/backport-5.15/771-v6.0-06-net-dsa-qca8k-move-mib-init-function-to-common-code.patch b/target/linux/generic/backport-5.15/771-v6.0-06-net-dsa-qca8k-move-mib-init-function-to-common-code.patch new file mode 100644 index 000000000..a39a55b89 --- /dev/null +++ b/target/linux/generic/backport-5.15/771-v6.0-06-net-dsa-qca8k-move-mib-init-function-to-common-code.patch @@ -0,0 +1,137 @@ +From fce1ec0c4e2d03d9c62ffc615a42bdba78eb4c14 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 27 Jul 2022 13:35:15 +0200 +Subject: [PATCH 06/14] net: dsa: qca8k: move mib init function to common code + +The same mib function is used by drivers based on qca8k family switch. +Move it to common code to make it accessible also by other drivers. + +Signed-off-by: Christian Marangi +Reviewed-by: Vladimir Oltean +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 37 ------------------------------ + drivers/net/dsa/qca/qca8k-common.c | 35 ++++++++++++++++++++++++++++ + drivers/net/dsa/qca/qca8k.h | 4 ++++ + 3 files changed, 39 insertions(+), 37 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -442,15 +442,6 @@ static struct regmap_config qca8k_regmap + }; + + static int +-qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask) +-{ +- u32 val; +- +- return regmap_read_poll_timeout(priv->regmap, reg, val, !(val & mask), 0, +- QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC); +-} +- +-static int + qca8k_fdb_read(struct qca8k_priv *priv, struct qca8k_fdb *fdb) + { + u32 reg[3]; +@@ -777,34 +768,6 @@ out: + return ret; + } + +-static int +-qca8k_mib_init(struct qca8k_priv *priv) +-{ +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- ret = regmap_update_bits(priv->regmap, QCA8K_REG_MIB, +- QCA8K_MIB_FUNC | QCA8K_MIB_BUSY, +- FIELD_PREP(QCA8K_MIB_FUNC, QCA8K_MIB_FLUSH) | +- QCA8K_MIB_BUSY); +- if (ret) +- goto exit; +- +- ret = qca8k_busy_wait(priv, QCA8K_REG_MIB, QCA8K_MIB_BUSY); +- if (ret) +- goto exit; +- +- ret = regmap_set_bits(priv->regmap, QCA8K_REG_MIB, QCA8K_MIB_CPU_KEEP); +- if (ret) +- goto exit; +- +- ret = qca8k_write(priv, QCA8K_REG_MODULE_EN, QCA8K_MODULE_EN_MIB); +- +-exit: +- mutex_unlock(&priv->reg_mutex); +- return ret; +-} +- + static void + qca8k_port_set_status(struct qca8k_priv *priv, int port, int enable) + { +--- a/drivers/net/dsa/qca/qca8k-common.c ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -7,6 +7,7 @@ + */ + + #include ++#include + #include + + #include "qca8k.h" +@@ -138,3 +139,38 @@ int qca8k_bulk_write(struct qca8k_priv * + + return 0; + } ++ ++int qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask) ++{ ++ u32 val; ++ ++ return regmap_read_poll_timeout(priv->regmap, reg, val, !(val & mask), 0, ++ QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC); ++} ++ ++int qca8k_mib_init(struct qca8k_priv *priv) ++{ ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ ret = regmap_update_bits(priv->regmap, QCA8K_REG_MIB, ++ QCA8K_MIB_FUNC | QCA8K_MIB_BUSY, ++ FIELD_PREP(QCA8K_MIB_FUNC, QCA8K_MIB_FLUSH) | ++ QCA8K_MIB_BUSY); ++ if (ret) ++ goto exit; ++ ++ ret = qca8k_busy_wait(priv, QCA8K_REG_MIB, QCA8K_MIB_BUSY); ++ if (ret) ++ goto exit; ++ ++ ret = regmap_set_bits(priv->regmap, QCA8K_REG_MIB, QCA8K_MIB_CPU_KEEP); ++ if (ret) ++ goto exit; ++ ++ ret = qca8k_write(priv, QCA8K_REG_MODULE_EN, QCA8K_MODULE_EN_MIB); ++ ++exit: ++ mutex_unlock(&priv->reg_mutex); ++ return ret; ++} +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -422,6 +422,7 @@ struct qca8k_fdb { + /* Common setup function */ + extern const struct qca8k_mib_desc ar8327_mib[]; + extern const struct regmap_access_table qca8k_readable_table; ++int qca8k_mib_init(struct qca8k_priv *priv); + + /* Common read/write/rmw function */ + int qca8k_read(struct qca8k_priv *priv, u32 reg, u32 *val); +@@ -431,4 +432,7 @@ int qca8k_rmw(struct qca8k_priv *priv, u + int qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len); + int qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len); + ++/* Common ops function */ ++int qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask); ++ + #endif /* __QCA8K_H */ diff --git a/target/linux/generic/backport-5.15/771-v6.0-07-net-dsa-qca8k-move-port-set-status-eee-ethtool-stats.patch b/target/linux/generic/backport-5.15/771-v6.0-07-net-dsa-qca8k-move-port-set-status-eee-ethtool-stats.patch new file mode 100644 index 000000000..6fd1c66b0 --- /dev/null +++ b/target/linux/generic/backport-5.15/771-v6.0-07-net-dsa-qca8k-move-port-set-status-eee-ethtool-stats.patch @@ -0,0 +1,281 @@ +From 472fcea160f27a5d9b7526093d9d8d89ba0b6137 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 27 Jul 2022 13:35:16 +0200 +Subject: [PATCH 07/14] net: dsa: qca8k: move port set status/eee/ethtool stats + function to common code + +The same logic to disable/enable port, set eee and get ethtool stats is +used by drivers based on qca8k family switch. +Move it to common code to make it accessible also by other drivers. +While at it also drop unnecessary qca8k_priv cast for void pointers. + +Signed-off-by: Christian Marangi +Reviewed-by: Vladimir Oltean +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 105 ----------------------------- + drivers/net/dsa/qca/qca8k-common.c | 102 ++++++++++++++++++++++++++++ + drivers/net/dsa/qca/qca8k.h | 11 +++ + 3 files changed, 113 insertions(+), 105 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -768,21 +768,6 @@ out: + return ret; + } + +-static void +-qca8k_port_set_status(struct qca8k_priv *priv, int port, int enable) +-{ +- u32 mask = QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC; +- +- /* Port 0 and 6 have no internal PHY */ +- if (port > 0 && port < 6) +- mask |= QCA8K_PORT_STATUS_LINK_AUTO; +- +- if (enable) +- regmap_set_bits(priv->regmap, QCA8K_REG_PORT_STATUS(port), mask); +- else +- regmap_clear_bits(priv->regmap, QCA8K_REG_PORT_STATUS(port), mask); +-} +- + static int + qca8k_phy_eth_busy_wait(struct qca8k_mgmt_eth_data *mgmt_eth_data, + struct sk_buff *read_skb, u32 *val) +@@ -1974,20 +1959,6 @@ qca8k_phylink_mac_link_up(struct dsa_swi + qca8k_write(priv, QCA8K_REG_PORT_STATUS(port), reg); + } + +-static void +-qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data) +-{ +- struct qca8k_priv *priv = ds->priv; +- int i; +- +- if (stringset != ETH_SS_STATS) +- return; +- +- for (i = 0; i < priv->info->mib_count; i++) +- strncpy(data + i * ETH_GSTRING_LEN, ar8327_mib[i].name, +- ETH_GSTRING_LEN); +-} +- + static void qca8k_mib_autocast_handler(struct dsa_switch *ds, struct sk_buff *skb) + { + struct qca8k_mib_eth_data *mib_eth_data; +@@ -2078,82 +2049,6 @@ exit: + } + + static void +-qca8k_get_ethtool_stats(struct dsa_switch *ds, int port, +- uint64_t *data) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- const struct qca8k_mib_desc *mib; +- u32 reg, i, val; +- u32 hi = 0; +- int ret; +- +- if (priv->mgmt_master && priv->info->ops->autocast_mib && +- priv->info->ops->autocast_mib(ds, port, data) > 0) +- return; +- +- for (i = 0; i < priv->info->mib_count; i++) { +- mib = &ar8327_mib[i]; +- reg = QCA8K_PORT_MIB_COUNTER(port) + mib->offset; +- +- ret = qca8k_read(priv, reg, &val); +- if (ret < 0) +- continue; +- +- if (mib->size == 2) { +- ret = qca8k_read(priv, reg + 4, &hi); +- if (ret < 0) +- continue; +- } +- +- data[i] = val; +- if (mib->size == 2) +- data[i] |= (u64)hi << 32; +- } +-} +- +-static int +-qca8k_get_sset_count(struct dsa_switch *ds, int port, int sset) +-{ +- struct qca8k_priv *priv = ds->priv; +- +- if (sset != ETH_SS_STATS) +- return 0; +- +- return priv->info->mib_count; +-} +- +-static int +-qca8k_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *eee) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- u32 lpi_en = QCA8K_REG_EEE_CTRL_LPI_EN(port); +- u32 reg; +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- ret = qca8k_read(priv, QCA8K_REG_EEE_CTRL, ®); +- if (ret < 0) +- goto exit; +- +- if (eee->eee_enabled) +- reg |= lpi_en; +- else +- reg &= ~lpi_en; +- ret = qca8k_write(priv, QCA8K_REG_EEE_CTRL, reg); +- +-exit: +- mutex_unlock(&priv->reg_mutex); +- return ret; +-} +- +-static int +-qca8k_get_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e) +-{ +- /* Nothing to do on the port's MAC */ +- return 0; +-} +- +-static void + qca8k_port_stp_state_set(struct dsa_switch *ds, int port, u8 state) + { + struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +--- a/drivers/net/dsa/qca/qca8k-common.c ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -174,3 +174,105 @@ exit: + mutex_unlock(&priv->reg_mutex); + return ret; + } ++ ++void qca8k_port_set_status(struct qca8k_priv *priv, int port, int enable) ++{ ++ u32 mask = QCA8K_PORT_STATUS_TXMAC | QCA8K_PORT_STATUS_RXMAC; ++ ++ /* Port 0 and 6 have no internal PHY */ ++ if (port > 0 && port < 6) ++ mask |= QCA8K_PORT_STATUS_LINK_AUTO; ++ ++ if (enable) ++ regmap_set_bits(priv->regmap, QCA8K_REG_PORT_STATUS(port), mask); ++ else ++ regmap_clear_bits(priv->regmap, QCA8K_REG_PORT_STATUS(port), mask); ++} ++ ++void qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, ++ uint8_t *data) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int i; ++ ++ if (stringset != ETH_SS_STATS) ++ return; ++ ++ for (i = 0; i < priv->info->mib_count; i++) ++ strncpy(data + i * ETH_GSTRING_LEN, ar8327_mib[i].name, ++ ETH_GSTRING_LEN); ++} ++ ++void qca8k_get_ethtool_stats(struct dsa_switch *ds, int port, ++ uint64_t *data) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ const struct qca8k_mib_desc *mib; ++ u32 reg, i, val; ++ u32 hi = 0; ++ int ret; ++ ++ if (priv->mgmt_master && priv->info->ops->autocast_mib && ++ priv->info->ops->autocast_mib(ds, port, data) > 0) ++ return; ++ ++ for (i = 0; i < priv->info->mib_count; i++) { ++ mib = &ar8327_mib[i]; ++ reg = QCA8K_PORT_MIB_COUNTER(port) + mib->offset; ++ ++ ret = qca8k_read(priv, reg, &val); ++ if (ret < 0) ++ continue; ++ ++ if (mib->size == 2) { ++ ret = qca8k_read(priv, reg + 4, &hi); ++ if (ret < 0) ++ continue; ++ } ++ ++ data[i] = val; ++ if (mib->size == 2) ++ data[i] |= (u64)hi << 32; ++ } ++} ++ ++int qca8k_get_sset_count(struct dsa_switch *ds, int port, int sset) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ ++ if (sset != ETH_SS_STATS) ++ return 0; ++ ++ return priv->info->mib_count; ++} ++ ++int qca8k_set_mac_eee(struct dsa_switch *ds, int port, ++ struct ethtool_eee *eee) ++{ ++ u32 lpi_en = QCA8K_REG_EEE_CTRL_LPI_EN(port); ++ struct qca8k_priv *priv = ds->priv; ++ u32 reg; ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ ret = qca8k_read(priv, QCA8K_REG_EEE_CTRL, ®); ++ if (ret < 0) ++ goto exit; ++ ++ if (eee->eee_enabled) ++ reg |= lpi_en; ++ else ++ reg &= ~lpi_en; ++ ret = qca8k_write(priv, QCA8K_REG_EEE_CTRL, reg); ++ ++exit: ++ mutex_unlock(&priv->reg_mutex); ++ return ret; ++} ++ ++int qca8k_get_mac_eee(struct dsa_switch *ds, int port, ++ struct ethtool_eee *e) ++{ ++ /* Nothing to do on the port's MAC */ ++ return 0; ++} +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -423,6 +423,7 @@ struct qca8k_fdb { + extern const struct qca8k_mib_desc ar8327_mib[]; + extern const struct regmap_access_table qca8k_readable_table; + int qca8k_mib_init(struct qca8k_priv *priv); ++void qca8k_port_set_status(struct qca8k_priv *priv, int port, int enable); + + /* Common read/write/rmw function */ + int qca8k_read(struct qca8k_priv *priv, u32 reg, u32 *val); +@@ -435,4 +436,14 @@ int qca8k_bulk_write(struct qca8k_priv * + /* Common ops function */ + int qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask); + ++/* Common ethtool stats function */ ++void qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data); ++void qca8k_get_ethtool_stats(struct dsa_switch *ds, int port, ++ uint64_t *data); ++int qca8k_get_sset_count(struct dsa_switch *ds, int port, int sset); ++ ++/* Common eee function */ ++int qca8k_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *eee); ++int qca8k_get_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e); ++ + #endif /* __QCA8K_H */ diff --git a/target/linux/generic/backport-5.15/771-v6.0-08-net-dsa-qca8k-move-bridge-functions-to-common-code.patch b/target/linux/generic/backport-5.15/771-v6.0-08-net-dsa-qca8k-move-bridge-functions-to-common-code.patch new file mode 100644 index 000000000..3ca682d72 --- /dev/null +++ b/target/linux/generic/backport-5.15/771-v6.0-08-net-dsa-qca8k-move-bridge-functions-to-common-code.patch @@ -0,0 +1,237 @@ +From fd3cae2f3ac190d06e48f43739237e02f9dc51ff Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 27 Jul 2022 13:35:17 +0200 +Subject: [PATCH 08/14] net: dsa: qca8k: move bridge functions to common code + +The same bridge functions are used by drivers based on qca8k family +switch. Move them to common code to make them accessible also by other +drivers. +While at it also drop unnecessary qca8k_priv cast for void pointers. + +Signed-off-by: Christian Marangi +Reviewed-by: Vladimir Oltean +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 93 ------------------------------ + drivers/net/dsa/qca/qca8k-common.c | 93 ++++++++++++++++++++++++++++++ + drivers/net/dsa/qca/qca8k.h | 9 +++ + 3 files changed, 102 insertions(+), 93 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -2049,97 +2049,6 @@ exit: + } + + static void +-qca8k_port_stp_state_set(struct dsa_switch *ds, int port, u8 state) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- u32 stp_state; +- +- switch (state) { +- case BR_STATE_DISABLED: +- stp_state = QCA8K_PORT_LOOKUP_STATE_DISABLED; +- break; +- case BR_STATE_BLOCKING: +- stp_state = QCA8K_PORT_LOOKUP_STATE_BLOCKING; +- break; +- case BR_STATE_LISTENING: +- stp_state = QCA8K_PORT_LOOKUP_STATE_LISTENING; +- break; +- case BR_STATE_LEARNING: +- stp_state = QCA8K_PORT_LOOKUP_STATE_LEARNING; +- break; +- case BR_STATE_FORWARDING: +- default: +- stp_state = QCA8K_PORT_LOOKUP_STATE_FORWARD; +- break; +- } +- +- qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), +- QCA8K_PORT_LOOKUP_STATE_MASK, stp_state); +-} +- +-static int +-qca8k_port_bridge_join(struct dsa_switch *ds, int port, struct net_device *br) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- int port_mask, cpu_port; +- int i, ret; +- +- cpu_port = dsa_to_port(ds, port)->cpu_dp->index; +- port_mask = BIT(cpu_port); +- +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { +- if (dsa_is_cpu_port(ds, i)) +- continue; +- if (dsa_to_port(ds, i)->bridge_dev != br) +- continue; +- /* Add this port to the portvlan mask of the other ports +- * in the bridge +- */ +- ret = regmap_set_bits(priv->regmap, +- QCA8K_PORT_LOOKUP_CTRL(i), +- BIT(port)); +- if (ret) +- return ret; +- if (i != port) +- port_mask |= BIT(i); +- } +- +- /* Add all other ports to this ports portvlan mask */ +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), +- QCA8K_PORT_LOOKUP_MEMBER, port_mask); +- +- return ret; +-} +- +-static void +-qca8k_port_bridge_leave(struct dsa_switch *ds, int port, struct net_device *br) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- int cpu_port, i; +- +- cpu_port = dsa_to_port(ds, port)->cpu_dp->index; +- +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { +- if (dsa_is_cpu_port(ds, i)) +- continue; +- if (dsa_to_port(ds, i)->bridge_dev != br) +- continue; +- /* Remove this port to the portvlan mask of the other ports +- * in the bridge +- */ +- regmap_clear_bits(priv->regmap, +- QCA8K_PORT_LOOKUP_CTRL(i), +- BIT(port)); +- } +- +- /* Set the cpu port to be the only one in the portvlan mask of +- * this port +- */ +- qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), +- QCA8K_PORT_LOOKUP_MEMBER, BIT(cpu_port)); +-} +- +-static void + qca8k_port_fast_age(struct dsa_switch *ds, int port) + { + struct qca8k_priv *priv = ds->priv; +--- a/drivers/net/dsa/qca/qca8k-common.c ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -9,6 +9,7 @@ + #include + #include + #include ++#include + + #include "qca8k.h" + +@@ -276,3 +277,93 @@ int qca8k_get_mac_eee(struct dsa_switch + /* Nothing to do on the port's MAC */ + return 0; + } ++ ++void qca8k_port_stp_state_set(struct dsa_switch *ds, int port, u8 state) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ u32 stp_state; ++ ++ switch (state) { ++ case BR_STATE_DISABLED: ++ stp_state = QCA8K_PORT_LOOKUP_STATE_DISABLED; ++ break; ++ case BR_STATE_BLOCKING: ++ stp_state = QCA8K_PORT_LOOKUP_STATE_BLOCKING; ++ break; ++ case BR_STATE_LISTENING: ++ stp_state = QCA8K_PORT_LOOKUP_STATE_LISTENING; ++ break; ++ case BR_STATE_LEARNING: ++ stp_state = QCA8K_PORT_LOOKUP_STATE_LEARNING; ++ break; ++ case BR_STATE_FORWARDING: ++ default: ++ stp_state = QCA8K_PORT_LOOKUP_STATE_FORWARD; ++ break; ++ } ++ ++ qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_STATE_MASK, stp_state); ++} ++ ++int qca8k_port_bridge_join(struct dsa_switch *ds, int port, ++ struct net_device *br) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int port_mask, cpu_port; ++ int i, ret; ++ ++ cpu_port = dsa_to_port(ds, port)->cpu_dp->index; ++ port_mask = BIT(cpu_port); ++ ++ for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ if (dsa_is_cpu_port(ds, i)) ++ continue; ++ if (dsa_to_port(ds, i)->bridge_dev != br) ++ continue; ++ /* Add this port to the portvlan mask of the other ports ++ * in the bridge ++ */ ++ ret = regmap_set_bits(priv->regmap, ++ QCA8K_PORT_LOOKUP_CTRL(i), ++ BIT(port)); ++ if (ret) ++ return ret; ++ if (i != port) ++ port_mask |= BIT(i); ++ } ++ ++ /* Add all other ports to this ports portvlan mask */ ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_MEMBER, port_mask); ++ ++ return ret; ++} ++ ++void qca8k_port_bridge_leave(struct dsa_switch *ds, int port, ++ struct net_device *br) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int cpu_port, i; ++ ++ cpu_port = dsa_to_port(ds, port)->cpu_dp->index; ++ ++ for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ if (dsa_is_cpu_port(ds, i)) ++ continue; ++ if (dsa_to_port(ds, i)->bridge_dev != br) ++ continue; ++ /* Remove this port to the portvlan mask of the other ports ++ * in the bridge ++ */ ++ regmap_clear_bits(priv->regmap, ++ QCA8K_PORT_LOOKUP_CTRL(i), ++ BIT(port)); ++ } ++ ++ /* Set the cpu port to be the only one in the portvlan mask of ++ * this port ++ */ ++ qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_MEMBER, BIT(cpu_port)); ++} +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -446,4 +446,11 @@ int qca8k_get_sset_count(struct dsa_swit + int qca8k_set_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *eee); + int qca8k_get_mac_eee(struct dsa_switch *ds, int port, struct ethtool_eee *e); + ++/* Common bridge function */ ++void qca8k_port_stp_state_set(struct dsa_switch *ds, int port, u8 state); ++int qca8k_port_bridge_join(struct dsa_switch *ds, int port, ++ struct net_device *br); ++void qca8k_port_bridge_leave(struct dsa_switch *ds, int port, ++ struct net_device *br); ++ + #endif /* __QCA8K_H */ diff --git a/target/linux/generic/backport-5.15/771-v6.0-09-net-dsa-qca8k-move-set-age-MTU-port-enable-disable-f.patch b/target/linux/generic/backport-5.15/771-v6.0-09-net-dsa-qca8k-move-set-age-MTU-port-enable-disable-f.patch new file mode 100644 index 000000000..e3414408d --- /dev/null +++ b/target/linux/generic/backport-5.15/771-v6.0-09-net-dsa-qca8k-move-set-age-MTU-port-enable-disable-f.patch @@ -0,0 +1,227 @@ +From b3a302b171f73425b41de8d3357fae3fa7057322 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 27 Jul 2022 13:35:18 +0200 +Subject: [PATCH 09/14] net: dsa: qca8k: move set age/MTU/port enable/disable + functions to common code + +The same set age, MTU and port enable/disable function are used by +driver based on qca8k family switch. +Move them to common code to make them accessible also by other drivers. +While at it also drop unnecessary qca8k_priv cast for void pointers. + +Signed-off-by: Christian Marangi +Reviewed-by: Vladimir Oltean +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 88 ------------------------------ + drivers/net/dsa/qca/qca8k-common.c | 85 +++++++++++++++++++++++++++++ + drivers/net/dsa/qca/qca8k.h | 12 ++++ + 3 files changed, 97 insertions(+), 88 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -2059,94 +2059,6 @@ qca8k_port_fast_age(struct dsa_switch *d + } + + static int +-qca8k_set_ageing_time(struct dsa_switch *ds, unsigned int msecs) +-{ +- struct qca8k_priv *priv = ds->priv; +- unsigned int secs = msecs / 1000; +- u32 val; +- +- /* AGE_TIME reg is set in 7s step */ +- val = secs / 7; +- +- /* Handle case with 0 as val to NOT disable +- * learning +- */ +- if (!val) +- val = 1; +- +- return regmap_update_bits(priv->regmap, QCA8K_REG_ATU_CTRL, QCA8K_ATU_AGE_TIME_MASK, +- QCA8K_ATU_AGE_TIME(val)); +-} +- +-static int +-qca8k_port_enable(struct dsa_switch *ds, int port, +- struct phy_device *phy) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- +- qca8k_port_set_status(priv, port, 1); +- priv->port_enabled_map |= BIT(port); +- +- if (dsa_is_user_port(ds, port)) +- phy_support_asym_pause(phy); +- +- return 0; +-} +- +-static void +-qca8k_port_disable(struct dsa_switch *ds, int port) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- +- qca8k_port_set_status(priv, port, 0); +- priv->port_enabled_map &= ~BIT(port); +-} +- +-static int +-qca8k_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) +-{ +- struct qca8k_priv *priv = ds->priv; +- int ret; +- +- /* We have only have a general MTU setting. +- * DSA always set the CPU port's MTU to the largest MTU of the slave +- * ports. +- * Setting MTU just for the CPU port is sufficient to correctly set a +- * value for every port. +- */ +- if (!dsa_is_cpu_port(ds, port)) +- return 0; +- +- /* To change the MAX_FRAME_SIZE the cpu ports must be off or +- * the switch panics. +- * Turn off both cpu ports before applying the new value to prevent +- * this. +- */ +- if (priv->port_enabled_map & BIT(0)) +- qca8k_port_set_status(priv, 0, 0); +- +- if (priv->port_enabled_map & BIT(6)) +- qca8k_port_set_status(priv, 6, 0); +- +- /* Include L2 header / FCS length */ +- ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, new_mtu + ETH_HLEN + ETH_FCS_LEN); +- +- if (priv->port_enabled_map & BIT(0)) +- qca8k_port_set_status(priv, 0, 1); +- +- if (priv->port_enabled_map & BIT(6)) +- qca8k_port_set_status(priv, 6, 1); +- +- return ret; +-} +- +-static int +-qca8k_port_max_mtu(struct dsa_switch *ds, int port) +-{ +- return QCA8K_MAX_MTU; +-} +- +-static int + qca8k_port_fdb_insert(struct qca8k_priv *priv, const u8 *addr, + u16 port_mask, u16 vid) + { +--- a/drivers/net/dsa/qca/qca8k-common.c ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -367,3 +367,88 @@ void qca8k_port_bridge_leave(struct dsa_ + qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), + QCA8K_PORT_LOOKUP_MEMBER, BIT(cpu_port)); + } ++ ++int qca8k_set_ageing_time(struct dsa_switch *ds, unsigned int msecs) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ unsigned int secs = msecs / 1000; ++ u32 val; ++ ++ /* AGE_TIME reg is set in 7s step */ ++ val = secs / 7; ++ ++ /* Handle case with 0 as val to NOT disable ++ * learning ++ */ ++ if (!val) ++ val = 1; ++ ++ return regmap_update_bits(priv->regmap, QCA8K_REG_ATU_CTRL, ++ QCA8K_ATU_AGE_TIME_MASK, ++ QCA8K_ATU_AGE_TIME(val)); ++} ++ ++int qca8k_port_enable(struct dsa_switch *ds, int port, ++ struct phy_device *phy) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ ++ qca8k_port_set_status(priv, port, 1); ++ priv->port_enabled_map |= BIT(port); ++ ++ if (dsa_is_user_port(ds, port)) ++ phy_support_asym_pause(phy); ++ ++ return 0; ++} ++ ++void qca8k_port_disable(struct dsa_switch *ds, int port) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ ++ qca8k_port_set_status(priv, port, 0); ++ priv->port_enabled_map &= ~BIT(port); ++} ++ ++int qca8k_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int ret; ++ ++ /* We have only have a general MTU setting. ++ * DSA always set the CPU port's MTU to the largest MTU of the slave ++ * ports. ++ * Setting MTU just for the CPU port is sufficient to correctly set a ++ * value for every port. ++ */ ++ if (!dsa_is_cpu_port(ds, port)) ++ return 0; ++ ++ /* To change the MAX_FRAME_SIZE the cpu ports must be off or ++ * the switch panics. ++ * Turn off both cpu ports before applying the new value to prevent ++ * this. ++ */ ++ if (priv->port_enabled_map & BIT(0)) ++ qca8k_port_set_status(priv, 0, 0); ++ ++ if (priv->port_enabled_map & BIT(6)) ++ qca8k_port_set_status(priv, 6, 0); ++ ++ /* Include L2 header / FCS length */ ++ ret = qca8k_write(priv, QCA8K_MAX_FRAME_SIZE, new_mtu + ++ ETH_HLEN + ETH_FCS_LEN); ++ ++ if (priv->port_enabled_map & BIT(0)) ++ qca8k_port_set_status(priv, 0, 1); ++ ++ if (priv->port_enabled_map & BIT(6)) ++ qca8k_port_set_status(priv, 6, 1); ++ ++ return ret; ++} ++ ++int qca8k_port_max_mtu(struct dsa_switch *ds, int port) ++{ ++ return QCA8K_MAX_MTU; ++} +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -453,4 +453,16 @@ int qca8k_port_bridge_join(struct dsa_sw + void qca8k_port_bridge_leave(struct dsa_switch *ds, int port, + struct net_device *br); + ++/* Common port enable/disable function */ ++int qca8k_port_enable(struct dsa_switch *ds, int port, ++ struct phy_device *phy); ++void qca8k_port_disable(struct dsa_switch *ds, int port); ++ ++/* Common MTU function */ ++int qca8k_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu); ++int qca8k_port_max_mtu(struct dsa_switch *ds, int port); ++ ++/* Common fast age function */ ++int qca8k_set_ageing_time(struct dsa_switch *ds, unsigned int msecs); ++ + #endif /* __QCA8K_H */ diff --git a/target/linux/generic/backport-5.15/771-v6.0-10-net-dsa-qca8k-move-port-FDB-MDB-function-to-common-c.patch b/target/linux/generic/backport-5.15/771-v6.0-10-net-dsa-qca8k-move-port-FDB-MDB-function-to-common-c.patch new file mode 100644 index 000000000..96468ae74 --- /dev/null +++ b/target/linux/generic/backport-5.15/771-v6.0-10-net-dsa-qca8k-move-port-FDB-MDB-function-to-common-c.patch @@ -0,0 +1,704 @@ +From 2e5bd96eea86a246b4de3bf756f7a11b43e6187d Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 27 Jul 2022 13:35:19 +0200 +Subject: [PATCH 10/14] net: dsa: qca8k: move port FDB/MDB function to common + code + +The same port FDB/MDB function are used by drivers based on qca8k family +switch. Move them to common code to make them accessible also by other +drivers. +Also drop bulk read/write functions and make them static + +Signed-off-by: Christian Marangi +Reviewed-by: Vladimir Oltean +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 306 ----------------------------- + drivers/net/dsa/qca/qca8k-common.c | 297 +++++++++++++++++++++++++++- + drivers/net/dsa/qca/qca8k.h | 25 ++- + 3 files changed, 317 insertions(+), 311 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -442,217 +442,6 @@ static struct regmap_config qca8k_regmap + }; + + static int +-qca8k_fdb_read(struct qca8k_priv *priv, struct qca8k_fdb *fdb) +-{ +- u32 reg[3]; +- int ret; +- +- /* load the ARL table into an array */ +- ret = qca8k_bulk_read(priv, QCA8K_REG_ATU_DATA0, reg, sizeof(reg)); +- if (ret) +- return ret; +- +- /* vid - 83:72 */ +- fdb->vid = FIELD_GET(QCA8K_ATU_VID_MASK, reg[2]); +- /* aging - 67:64 */ +- fdb->aging = FIELD_GET(QCA8K_ATU_STATUS_MASK, reg[2]); +- /* portmask - 54:48 */ +- fdb->port_mask = FIELD_GET(QCA8K_ATU_PORT_MASK, reg[1]); +- /* mac - 47:0 */ +- fdb->mac[0] = FIELD_GET(QCA8K_ATU_ADDR0_MASK, reg[1]); +- fdb->mac[1] = FIELD_GET(QCA8K_ATU_ADDR1_MASK, reg[1]); +- fdb->mac[2] = FIELD_GET(QCA8K_ATU_ADDR2_MASK, reg[0]); +- fdb->mac[3] = FIELD_GET(QCA8K_ATU_ADDR3_MASK, reg[0]); +- fdb->mac[4] = FIELD_GET(QCA8K_ATU_ADDR4_MASK, reg[0]); +- fdb->mac[5] = FIELD_GET(QCA8K_ATU_ADDR5_MASK, reg[0]); +- +- return 0; +-} +- +-static void +-qca8k_fdb_write(struct qca8k_priv *priv, u16 vid, u8 port_mask, const u8 *mac, +- u8 aging) +-{ +- u32 reg[3] = { 0 }; +- +- /* vid - 83:72 */ +- reg[2] = FIELD_PREP(QCA8K_ATU_VID_MASK, vid); +- /* aging - 67:64 */ +- reg[2] |= FIELD_PREP(QCA8K_ATU_STATUS_MASK, aging); +- /* portmask - 54:48 */ +- reg[1] = FIELD_PREP(QCA8K_ATU_PORT_MASK, port_mask); +- /* mac - 47:0 */ +- reg[1] |= FIELD_PREP(QCA8K_ATU_ADDR0_MASK, mac[0]); +- reg[1] |= FIELD_PREP(QCA8K_ATU_ADDR1_MASK, mac[1]); +- reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR2_MASK, mac[2]); +- reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR3_MASK, mac[3]); +- reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR4_MASK, mac[4]); +- reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR5_MASK, mac[5]); +- +- /* load the array into the ARL table */ +- qca8k_bulk_write(priv, QCA8K_REG_ATU_DATA0, reg, sizeof(reg)); +-} +- +-static int +-qca8k_fdb_access(struct qca8k_priv *priv, enum qca8k_fdb_cmd cmd, int port) +-{ +- u32 reg; +- int ret; +- +- /* Set the command and FDB index */ +- reg = QCA8K_ATU_FUNC_BUSY; +- reg |= cmd; +- if (port >= 0) { +- reg |= QCA8K_ATU_FUNC_PORT_EN; +- reg |= FIELD_PREP(QCA8K_ATU_FUNC_PORT_MASK, port); +- } +- +- /* Write the function register triggering the table access */ +- ret = qca8k_write(priv, QCA8K_REG_ATU_FUNC, reg); +- if (ret) +- return ret; +- +- /* wait for completion */ +- ret = qca8k_busy_wait(priv, QCA8K_REG_ATU_FUNC, QCA8K_ATU_FUNC_BUSY); +- if (ret) +- return ret; +- +- /* Check for table full violation when adding an entry */ +- if (cmd == QCA8K_FDB_LOAD) { +- ret = qca8k_read(priv, QCA8K_REG_ATU_FUNC, ®); +- if (ret < 0) +- return ret; +- if (reg & QCA8K_ATU_FUNC_FULL) +- return -1; +- } +- +- return 0; +-} +- +-static int +-qca8k_fdb_next(struct qca8k_priv *priv, struct qca8k_fdb *fdb, int port) +-{ +- int ret; +- +- qca8k_fdb_write(priv, fdb->vid, fdb->port_mask, fdb->mac, fdb->aging); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_NEXT, port); +- if (ret < 0) +- return ret; +- +- return qca8k_fdb_read(priv, fdb); +-} +- +-static int +-qca8k_fdb_add(struct qca8k_priv *priv, const u8 *mac, u16 port_mask, +- u16 vid, u8 aging) +-{ +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- qca8k_fdb_write(priv, vid, port_mask, mac, aging); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); +- mutex_unlock(&priv->reg_mutex); +- +- return ret; +-} +- +-static int +-qca8k_fdb_del(struct qca8k_priv *priv, const u8 *mac, u16 port_mask, u16 vid) +-{ +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- qca8k_fdb_write(priv, vid, port_mask, mac, 0); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); +- mutex_unlock(&priv->reg_mutex); +- +- return ret; +-} +- +-static void +-qca8k_fdb_flush(struct qca8k_priv *priv) +-{ +- mutex_lock(&priv->reg_mutex); +- qca8k_fdb_access(priv, QCA8K_FDB_FLUSH, -1); +- mutex_unlock(&priv->reg_mutex); +-} +- +-static int +-qca8k_fdb_search_and_insert(struct qca8k_priv *priv, u8 port_mask, +- const u8 *mac, u16 vid) +-{ +- struct qca8k_fdb fdb = { 0 }; +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- +- qca8k_fdb_write(priv, vid, 0, mac, 0); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_SEARCH, -1); +- if (ret < 0) +- goto exit; +- +- ret = qca8k_fdb_read(priv, &fdb); +- if (ret < 0) +- goto exit; +- +- /* Rule exist. Delete first */ +- if (!fdb.aging) { +- ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); +- if (ret) +- goto exit; +- } +- +- /* Add port to fdb portmask */ +- fdb.port_mask |= port_mask; +- +- qca8k_fdb_write(priv, vid, fdb.port_mask, mac, fdb.aging); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); +- +-exit: +- mutex_unlock(&priv->reg_mutex); +- return ret; +-} +- +-static int +-qca8k_fdb_search_and_del(struct qca8k_priv *priv, u8 port_mask, +- const u8 *mac, u16 vid) +-{ +- struct qca8k_fdb fdb = { 0 }; +- int ret; +- +- mutex_lock(&priv->reg_mutex); +- +- qca8k_fdb_write(priv, vid, 0, mac, 0); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_SEARCH, -1); +- if (ret < 0) +- goto exit; +- +- /* Rule doesn't exist. Why delete? */ +- if (!fdb.aging) { +- ret = -EINVAL; +- goto exit; +- } +- +- ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); +- if (ret) +- goto exit; +- +- /* Only port in the rule is this port. Don't re insert */ +- if (fdb.port_mask == port_mask) +- goto exit; +- +- /* Remove port from port mask */ +- fdb.port_mask &= ~port_mask; +- +- qca8k_fdb_write(priv, vid, fdb.port_mask, mac, fdb.aging); +- ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); +- +-exit: +- mutex_unlock(&priv->reg_mutex); +- return ret; +-} +- +-static int + qca8k_vlan_access(struct qca8k_priv *priv, enum qca8k_vlan_cmd cmd, u16 vid) + { + u32 reg; +@@ -2048,97 +1837,6 @@ exit: + return ret; + } + +-static void +-qca8k_port_fast_age(struct dsa_switch *ds, int port) +-{ +- struct qca8k_priv *priv = ds->priv; +- +- mutex_lock(&priv->reg_mutex); +- qca8k_fdb_access(priv, QCA8K_FDB_FLUSH_PORT, port); +- mutex_unlock(&priv->reg_mutex); +-} +- +-static int +-qca8k_port_fdb_insert(struct qca8k_priv *priv, const u8 *addr, +- u16 port_mask, u16 vid) +-{ +- /* Set the vid to the port vlan id if no vid is set */ +- if (!vid) +- vid = QCA8K_PORT_VID_DEF; +- +- return qca8k_fdb_add(priv, addr, port_mask, vid, +- QCA8K_ATU_STATUS_STATIC); +-} +- +-static int +-qca8k_port_fdb_add(struct dsa_switch *ds, int port, +- const unsigned char *addr, u16 vid) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- u16 port_mask = BIT(port); +- +- return qca8k_port_fdb_insert(priv, addr, port_mask, vid); +-} +- +-static int +-qca8k_port_fdb_del(struct dsa_switch *ds, int port, +- const unsigned char *addr, u16 vid) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- u16 port_mask = BIT(port); +- +- if (!vid) +- vid = QCA8K_PORT_VID_DEF; +- +- return qca8k_fdb_del(priv, addr, port_mask, vid); +-} +- +-static int +-qca8k_port_fdb_dump(struct dsa_switch *ds, int port, +- dsa_fdb_dump_cb_t *cb, void *data) +-{ +- struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; +- struct qca8k_fdb _fdb = { 0 }; +- int cnt = QCA8K_NUM_FDB_RECORDS; +- bool is_static; +- int ret = 0; +- +- mutex_lock(&priv->reg_mutex); +- while (cnt-- && !qca8k_fdb_next(priv, &_fdb, port)) { +- if (!_fdb.aging) +- break; +- is_static = (_fdb.aging == QCA8K_ATU_STATUS_STATIC); +- ret = cb(_fdb.mac, _fdb.vid, is_static, data); +- if (ret) +- break; +- } +- mutex_unlock(&priv->reg_mutex); +- +- return 0; +-} +- +-static int +-qca8k_port_mdb_add(struct dsa_switch *ds, int port, +- const struct switchdev_obj_port_mdb *mdb) +-{ +- struct qca8k_priv *priv = ds->priv; +- const u8 *addr = mdb->addr; +- u16 vid = mdb->vid; +- +- return qca8k_fdb_search_and_insert(priv, BIT(port), addr, vid); +-} +- +-static int +-qca8k_port_mdb_del(struct dsa_switch *ds, int port, +- const struct switchdev_obj_port_mdb *mdb) +-{ +- struct qca8k_priv *priv = ds->priv; +- const u8 *addr = mdb->addr; +- u16 vid = mdb->vid; +- +- return qca8k_fdb_search_and_del(priv, BIT(port), addr, vid); +-} +- + static int + qca8k_port_mirror_add(struct dsa_switch *ds, int port, + struct dsa_mall_mirror_tc_entry *mirror, +--- a/drivers/net/dsa/qca/qca8k-common.c ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -103,7 +103,7 @@ const struct regmap_access_table qca8k_r + }; + + /* TODO: remove these extra ops when we can support regmap bulk read/write */ +-int qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len) ++static int qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len) + { + int i, count = len / sizeof(u32), ret; + +@@ -121,7 +121,7 @@ int qca8k_bulk_read(struct qca8k_priv *p + } + + /* TODO: remove these extra ops when we can support regmap bulk read/write */ +-int qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len) ++static int qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len) + { + int i, count = len / sizeof(u32), ret; + u32 tmp; +@@ -149,6 +149,211 @@ int qca8k_busy_wait(struct qca8k_priv *p + QCA8K_BUSY_WAIT_TIMEOUT * USEC_PER_MSEC); + } + ++static int qca8k_fdb_read(struct qca8k_priv *priv, struct qca8k_fdb *fdb) ++{ ++ u32 reg[3]; ++ int ret; ++ ++ /* load the ARL table into an array */ ++ ret = qca8k_bulk_read(priv, QCA8K_REG_ATU_DATA0, reg, sizeof(reg)); ++ if (ret) ++ return ret; ++ ++ /* vid - 83:72 */ ++ fdb->vid = FIELD_GET(QCA8K_ATU_VID_MASK, reg[2]); ++ /* aging - 67:64 */ ++ fdb->aging = FIELD_GET(QCA8K_ATU_STATUS_MASK, reg[2]); ++ /* portmask - 54:48 */ ++ fdb->port_mask = FIELD_GET(QCA8K_ATU_PORT_MASK, reg[1]); ++ /* mac - 47:0 */ ++ fdb->mac[0] = FIELD_GET(QCA8K_ATU_ADDR0_MASK, reg[1]); ++ fdb->mac[1] = FIELD_GET(QCA8K_ATU_ADDR1_MASK, reg[1]); ++ fdb->mac[2] = FIELD_GET(QCA8K_ATU_ADDR2_MASK, reg[0]); ++ fdb->mac[3] = FIELD_GET(QCA8K_ATU_ADDR3_MASK, reg[0]); ++ fdb->mac[4] = FIELD_GET(QCA8K_ATU_ADDR4_MASK, reg[0]); ++ fdb->mac[5] = FIELD_GET(QCA8K_ATU_ADDR5_MASK, reg[0]); ++ ++ return 0; ++} ++ ++static void qca8k_fdb_write(struct qca8k_priv *priv, u16 vid, u8 port_mask, ++ const u8 *mac, u8 aging) ++{ ++ u32 reg[3] = { 0 }; ++ ++ /* vid - 83:72 */ ++ reg[2] = FIELD_PREP(QCA8K_ATU_VID_MASK, vid); ++ /* aging - 67:64 */ ++ reg[2] |= FIELD_PREP(QCA8K_ATU_STATUS_MASK, aging); ++ /* portmask - 54:48 */ ++ reg[1] = FIELD_PREP(QCA8K_ATU_PORT_MASK, port_mask); ++ /* mac - 47:0 */ ++ reg[1] |= FIELD_PREP(QCA8K_ATU_ADDR0_MASK, mac[0]); ++ reg[1] |= FIELD_PREP(QCA8K_ATU_ADDR1_MASK, mac[1]); ++ reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR2_MASK, mac[2]); ++ reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR3_MASK, mac[3]); ++ reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR4_MASK, mac[4]); ++ reg[0] |= FIELD_PREP(QCA8K_ATU_ADDR5_MASK, mac[5]); ++ ++ /* load the array into the ARL table */ ++ qca8k_bulk_write(priv, QCA8K_REG_ATU_DATA0, reg, sizeof(reg)); ++} ++ ++static int qca8k_fdb_access(struct qca8k_priv *priv, enum qca8k_fdb_cmd cmd, ++ int port) ++{ ++ u32 reg; ++ int ret; ++ ++ /* Set the command and FDB index */ ++ reg = QCA8K_ATU_FUNC_BUSY; ++ reg |= cmd; ++ if (port >= 0) { ++ reg |= QCA8K_ATU_FUNC_PORT_EN; ++ reg |= FIELD_PREP(QCA8K_ATU_FUNC_PORT_MASK, port); ++ } ++ ++ /* Write the function register triggering the table access */ ++ ret = qca8k_write(priv, QCA8K_REG_ATU_FUNC, reg); ++ if (ret) ++ return ret; ++ ++ /* wait for completion */ ++ ret = qca8k_busy_wait(priv, QCA8K_REG_ATU_FUNC, QCA8K_ATU_FUNC_BUSY); ++ if (ret) ++ return ret; ++ ++ /* Check for table full violation when adding an entry */ ++ if (cmd == QCA8K_FDB_LOAD) { ++ ret = qca8k_read(priv, QCA8K_REG_ATU_FUNC, ®); ++ if (ret < 0) ++ return ret; ++ if (reg & QCA8K_ATU_FUNC_FULL) ++ return -1; ++ } ++ ++ return 0; ++} ++ ++static int qca8k_fdb_next(struct qca8k_priv *priv, struct qca8k_fdb *fdb, ++ int port) ++{ ++ int ret; ++ ++ qca8k_fdb_write(priv, fdb->vid, fdb->port_mask, fdb->mac, fdb->aging); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_NEXT, port); ++ if (ret < 0) ++ return ret; ++ ++ return qca8k_fdb_read(priv, fdb); ++} ++ ++static int qca8k_fdb_add(struct qca8k_priv *priv, const u8 *mac, ++ u16 port_mask, u16 vid, u8 aging) ++{ ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ qca8k_fdb_write(priv, vid, port_mask, mac, aging); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); ++ mutex_unlock(&priv->reg_mutex); ++ ++ return ret; ++} ++ ++static int qca8k_fdb_del(struct qca8k_priv *priv, const u8 *mac, ++ u16 port_mask, u16 vid) ++{ ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ qca8k_fdb_write(priv, vid, port_mask, mac, 0); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); ++ mutex_unlock(&priv->reg_mutex); ++ ++ return ret; ++} ++ ++void qca8k_fdb_flush(struct qca8k_priv *priv) ++{ ++ mutex_lock(&priv->reg_mutex); ++ qca8k_fdb_access(priv, QCA8K_FDB_FLUSH, -1); ++ mutex_unlock(&priv->reg_mutex); ++} ++ ++static int qca8k_fdb_search_and_insert(struct qca8k_priv *priv, u8 port_mask, ++ const u8 *mac, u16 vid) ++{ ++ struct qca8k_fdb fdb = { 0 }; ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ ++ qca8k_fdb_write(priv, vid, 0, mac, 0); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_SEARCH, -1); ++ if (ret < 0) ++ goto exit; ++ ++ ret = qca8k_fdb_read(priv, &fdb); ++ if (ret < 0) ++ goto exit; ++ ++ /* Rule exist. Delete first */ ++ if (!fdb.aging) { ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); ++ if (ret) ++ goto exit; ++ } ++ ++ /* Add port to fdb portmask */ ++ fdb.port_mask |= port_mask; ++ ++ qca8k_fdb_write(priv, vid, fdb.port_mask, mac, fdb.aging); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); ++ ++exit: ++ mutex_unlock(&priv->reg_mutex); ++ return ret; ++} ++ ++static int qca8k_fdb_search_and_del(struct qca8k_priv *priv, u8 port_mask, ++ const u8 *mac, u16 vid) ++{ ++ struct qca8k_fdb fdb = { 0 }; ++ int ret; ++ ++ mutex_lock(&priv->reg_mutex); ++ ++ qca8k_fdb_write(priv, vid, 0, mac, 0); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_SEARCH, -1); ++ if (ret < 0) ++ goto exit; ++ ++ /* Rule doesn't exist. Why delete? */ ++ if (!fdb.aging) { ++ ret = -EINVAL; ++ goto exit; ++ } ++ ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_PURGE, -1); ++ if (ret) ++ goto exit; ++ ++ /* Only port in the rule is this port. Don't re insert */ ++ if (fdb.port_mask == port_mask) ++ goto exit; ++ ++ /* Remove port from port mask */ ++ fdb.port_mask &= ~port_mask; ++ ++ qca8k_fdb_write(priv, vid, fdb.port_mask, mac, fdb.aging); ++ ret = qca8k_fdb_access(priv, QCA8K_FDB_LOAD, -1); ++ ++exit: ++ mutex_unlock(&priv->reg_mutex); ++ return ret; ++} ++ + int qca8k_mib_init(struct qca8k_priv *priv) + { + int ret; +@@ -368,6 +573,15 @@ void qca8k_port_bridge_leave(struct dsa_ + QCA8K_PORT_LOOKUP_MEMBER, BIT(cpu_port)); + } + ++void qca8k_port_fast_age(struct dsa_switch *ds, int port) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ ++ mutex_lock(&priv->reg_mutex); ++ qca8k_fdb_access(priv, QCA8K_FDB_FLUSH_PORT, port); ++ mutex_unlock(&priv->reg_mutex); ++} ++ + int qca8k_set_ageing_time(struct dsa_switch *ds, unsigned int msecs) + { + struct qca8k_priv *priv = ds->priv; +@@ -452,3 +666,78 @@ int qca8k_port_max_mtu(struct dsa_switch + { + return QCA8K_MAX_MTU; + } ++ ++int qca8k_port_fdb_insert(struct qca8k_priv *priv, const u8 *addr, ++ u16 port_mask, u16 vid) ++{ ++ /* Set the vid to the port vlan id if no vid is set */ ++ if (!vid) ++ vid = QCA8K_PORT_VID_DEF; ++ ++ return qca8k_fdb_add(priv, addr, port_mask, vid, ++ QCA8K_ATU_STATUS_STATIC); ++} ++ ++int qca8k_port_fdb_add(struct dsa_switch *ds, int port, ++ const unsigned char *addr, u16 vid) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ u16 port_mask = BIT(port); ++ ++ return qca8k_port_fdb_insert(priv, addr, port_mask, vid); ++} ++ ++int qca8k_port_fdb_del(struct dsa_switch *ds, int port, ++ const unsigned char *addr, u16 vid) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ u16 port_mask = BIT(port); ++ ++ if (!vid) ++ vid = QCA8K_PORT_VID_DEF; ++ ++ return qca8k_fdb_del(priv, addr, port_mask, vid); ++} ++ ++int qca8k_port_fdb_dump(struct dsa_switch *ds, int port, ++ dsa_fdb_dump_cb_t *cb, void *data) ++{ ++ struct qca8k_priv *priv = (struct qca8k_priv *)ds->priv; ++ struct qca8k_fdb _fdb = { 0 }; ++ int cnt = QCA8K_NUM_FDB_RECORDS; ++ bool is_static; ++ int ret = 0; ++ ++ mutex_lock(&priv->reg_mutex); ++ while (cnt-- && !qca8k_fdb_next(priv, &_fdb, port)) { ++ if (!_fdb.aging) ++ break; ++ is_static = (_fdb.aging == QCA8K_ATU_STATUS_STATIC); ++ ret = cb(_fdb.mac, _fdb.vid, is_static, data); ++ if (ret) ++ break; ++ } ++ mutex_unlock(&priv->reg_mutex); ++ ++ return 0; ++} ++ ++int qca8k_port_mdb_add(struct dsa_switch *ds, int port, ++ const struct switchdev_obj_port_mdb *mdb) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ const u8 *addr = mdb->addr; ++ u16 vid = mdb->vid; ++ ++ return qca8k_fdb_search_and_insert(priv, BIT(port), addr, vid); ++} ++ ++int qca8k_port_mdb_del(struct dsa_switch *ds, int port, ++ const struct switchdev_obj_port_mdb *mdb) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ const u8 *addr = mdb->addr; ++ u16 vid = mdb->vid; ++ ++ return qca8k_fdb_search_and_del(priv, BIT(port), addr, vid); ++} +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -430,11 +430,9 @@ int qca8k_read(struct qca8k_priv *priv, + int qca8k_write(struct qca8k_priv *priv, u32 reg, u32 val); + int qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val); + +-int qca8k_bulk_read(struct qca8k_priv *priv, u32 reg, u32 *val, int len); +-int qca8k_bulk_write(struct qca8k_priv *priv, u32 reg, u32 *val, int len); +- + /* Common ops function */ + int qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask); ++void qca8k_fdb_flush(struct qca8k_priv *priv); + + /* Common ethtool stats function */ + void qca8k_get_strings(struct dsa_switch *ds, int port, u32 stringset, uint8_t *data); +@@ -463,6 +461,23 @@ int qca8k_port_change_mtu(struct dsa_swi + int qca8k_port_max_mtu(struct dsa_switch *ds, int port); + + /* Common fast age function */ ++void qca8k_port_fast_age(struct dsa_switch *ds, int port); + int qca8k_set_ageing_time(struct dsa_switch *ds, unsigned int msecs); + ++/* Common FDB function */ ++int qca8k_port_fdb_insert(struct qca8k_priv *priv, const u8 *addr, ++ u16 port_mask, u16 vid); ++int qca8k_port_fdb_add(struct dsa_switch *ds, int port, ++ const unsigned char *addr, u16 vid); ++int qca8k_port_fdb_del(struct dsa_switch *ds, int port, ++ const unsigned char *addr, u16 vid); ++int qca8k_port_fdb_dump(struct dsa_switch *ds, int port, ++ dsa_fdb_dump_cb_t *cb, void *data); ++ ++/* Common MDB function */ ++int qca8k_port_mdb_add(struct dsa_switch *ds, int port, ++ const struct switchdev_obj_port_mdb *mdb); ++int qca8k_port_mdb_del(struct dsa_switch *ds, int port, ++ const struct switchdev_obj_port_mdb *mdb); ++ + #endif /* __QCA8K_H */ diff --git a/target/linux/generic/backport-5.15/771-v6.0-11-net-dsa-qca8k-move-port-mirror-functions-to-common-c.patch b/target/linux/generic/backport-5.15/771-v6.0-11-net-dsa-qca8k-move-port-mirror-functions-to-common-c.patch new file mode 100644 index 000000000..c1336d4a9 --- /dev/null +++ b/target/linux/generic/backport-5.15/771-v6.0-11-net-dsa-qca8k-move-port-mirror-functions-to-common-c.patch @@ -0,0 +1,232 @@ +From 742d37a84d3f7bb60d9b2d9ada9ad4e599f65ebf Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 27 Jul 2022 13:35:20 +0200 +Subject: [PATCH 11/14] net: dsa: qca8k: move port mirror functions to common + code + +The same port mirror functions are used by drivers based on qca8k family +switch. Move them to common code to make them accessible also by other +drivers. + +Signed-off-by: Christian Marangi +Reviewed-by: Vladimir Oltean +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 93 ------------------------------ + drivers/net/dsa/qca/qca8k-common.c | 91 +++++++++++++++++++++++++++++ + drivers/net/dsa/qca/qca8k.h | 7 +++ + 3 files changed, 98 insertions(+), 93 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -1838,99 +1838,6 @@ exit: + } + + static int +-qca8k_port_mirror_add(struct dsa_switch *ds, int port, +- struct dsa_mall_mirror_tc_entry *mirror, +- bool ingress) +-{ +- struct qca8k_priv *priv = ds->priv; +- int monitor_port, ret; +- u32 reg, val; +- +- /* Check for existent entry */ +- if ((ingress ? priv->mirror_rx : priv->mirror_tx) & BIT(port)) +- return -EEXIST; +- +- ret = regmap_read(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, &val); +- if (ret) +- return ret; +- +- /* QCA83xx can have only one port set to mirror mode. +- * Check that the correct port is requested and return error otherwise. +- * When no mirror port is set, the values is set to 0xF +- */ +- monitor_port = FIELD_GET(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); +- if (monitor_port != 0xF && monitor_port != mirror->to_local_port) +- return -EEXIST; +- +- /* Set the monitor port */ +- val = FIELD_PREP(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, +- mirror->to_local_port); +- ret = regmap_update_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, +- QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); +- if (ret) +- return ret; +- +- if (ingress) { +- reg = QCA8K_PORT_LOOKUP_CTRL(port); +- val = QCA8K_PORT_LOOKUP_ING_MIRROR_EN; +- } else { +- reg = QCA8K_REG_PORT_HOL_CTRL1(port); +- val = QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN; +- } +- +- ret = regmap_update_bits(priv->regmap, reg, val, val); +- if (ret) +- return ret; +- +- /* Track mirror port for tx and rx to decide when the +- * mirror port has to be disabled. +- */ +- if (ingress) +- priv->mirror_rx |= BIT(port); +- else +- priv->mirror_tx |= BIT(port); +- +- return 0; +-} +- +-static void +-qca8k_port_mirror_del(struct dsa_switch *ds, int port, +- struct dsa_mall_mirror_tc_entry *mirror) +-{ +- struct qca8k_priv *priv = ds->priv; +- u32 reg, val; +- int ret; +- +- if (mirror->ingress) { +- reg = QCA8K_PORT_LOOKUP_CTRL(port); +- val = QCA8K_PORT_LOOKUP_ING_MIRROR_EN; +- } else { +- reg = QCA8K_REG_PORT_HOL_CTRL1(port); +- val = QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN; +- } +- +- ret = regmap_clear_bits(priv->regmap, reg, val); +- if (ret) +- goto err; +- +- if (mirror->ingress) +- priv->mirror_rx &= ~BIT(port); +- else +- priv->mirror_tx &= ~BIT(port); +- +- /* No port set to send packet to mirror port. Disable mirror port */ +- if (!priv->mirror_rx && !priv->mirror_tx) { +- val = FIELD_PREP(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, 0xF); +- ret = regmap_update_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, +- QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); +- if (ret) +- goto err; +- } +-err: +- dev_err(priv->dev, "Failed to del mirror port from %d", port); +-} +- +-static int + qca8k_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering, + struct netlink_ext_ack *extack) + { +--- a/drivers/net/dsa/qca/qca8k-common.c ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -741,3 +741,94 @@ int qca8k_port_mdb_del(struct dsa_switch + + return qca8k_fdb_search_and_del(priv, BIT(port), addr, vid); + } ++ ++int qca8k_port_mirror_add(struct dsa_switch *ds, int port, ++ struct dsa_mall_mirror_tc_entry *mirror, ++ bool ingress) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int monitor_port, ret; ++ u32 reg, val; ++ ++ /* Check for existent entry */ ++ if ((ingress ? priv->mirror_rx : priv->mirror_tx) & BIT(port)) ++ return -EEXIST; ++ ++ ret = regmap_read(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, &val); ++ if (ret) ++ return ret; ++ ++ /* QCA83xx can have only one port set to mirror mode. ++ * Check that the correct port is requested and return error otherwise. ++ * When no mirror port is set, the values is set to 0xF ++ */ ++ monitor_port = FIELD_GET(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); ++ if (monitor_port != 0xF && monitor_port != mirror->to_local_port) ++ return -EEXIST; ++ ++ /* Set the monitor port */ ++ val = FIELD_PREP(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, ++ mirror->to_local_port); ++ ret = regmap_update_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, ++ QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); ++ if (ret) ++ return ret; ++ ++ if (ingress) { ++ reg = QCA8K_PORT_LOOKUP_CTRL(port); ++ val = QCA8K_PORT_LOOKUP_ING_MIRROR_EN; ++ } else { ++ reg = QCA8K_REG_PORT_HOL_CTRL1(port); ++ val = QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN; ++ } ++ ++ ret = regmap_update_bits(priv->regmap, reg, val, val); ++ if (ret) ++ return ret; ++ ++ /* Track mirror port for tx and rx to decide when the ++ * mirror port has to be disabled. ++ */ ++ if (ingress) ++ priv->mirror_rx |= BIT(port); ++ else ++ priv->mirror_tx |= BIT(port); ++ ++ return 0; ++} ++ ++void qca8k_port_mirror_del(struct dsa_switch *ds, int port, ++ struct dsa_mall_mirror_tc_entry *mirror) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ u32 reg, val; ++ int ret; ++ ++ if (mirror->ingress) { ++ reg = QCA8K_PORT_LOOKUP_CTRL(port); ++ val = QCA8K_PORT_LOOKUP_ING_MIRROR_EN; ++ } else { ++ reg = QCA8K_REG_PORT_HOL_CTRL1(port); ++ val = QCA8K_PORT_HOL_CTRL1_EG_MIRROR_EN; ++ } ++ ++ ret = regmap_clear_bits(priv->regmap, reg, val); ++ if (ret) ++ goto err; ++ ++ if (mirror->ingress) ++ priv->mirror_rx &= ~BIT(port); ++ else ++ priv->mirror_tx &= ~BIT(port); ++ ++ /* No port set to send packet to mirror port. Disable mirror port */ ++ if (!priv->mirror_rx && !priv->mirror_tx) { ++ val = FIELD_PREP(QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, 0xF); ++ ret = regmap_update_bits(priv->regmap, QCA8K_REG_GLOBAL_FW_CTRL0, ++ QCA8K_GLOBAL_FW_CTRL0_MIRROR_PORT_NUM, val); ++ if (ret) ++ goto err; ++ } ++err: ++ dev_err(priv->dev, "Failed to del mirror port from %d", port); ++} +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -480,4 +480,11 @@ int qca8k_port_mdb_add(struct dsa_switch + int qca8k_port_mdb_del(struct dsa_switch *ds, int port, + const struct switchdev_obj_port_mdb *mdb); + ++/* Common port mirror function */ ++int qca8k_port_mirror_add(struct dsa_switch *ds, int port, ++ struct dsa_mall_mirror_tc_entry *mirror, ++ bool ingress); ++void qca8k_port_mirror_del(struct dsa_switch *ds, int port, ++ struct dsa_mall_mirror_tc_entry *mirror); ++ + #endif /* __QCA8K_H */ diff --git a/target/linux/generic/backport-5.15/771-v6.0-12-net-dsa-qca8k-move-port-VLAN-functions-to-common-cod.patch b/target/linux/generic/backport-5.15/771-v6.0-12-net-dsa-qca8k-move-port-VLAN-functions-to-common-cod.patch new file mode 100644 index 000000000..898010f95 --- /dev/null +++ b/target/linux/generic/backport-5.15/771-v6.0-12-net-dsa-qca8k-move-port-VLAN-functions-to-common-cod.patch @@ -0,0 +1,448 @@ +From c5290f636624b98e76a82bd63ffec0a8a9daa620 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 27 Jul 2022 13:35:21 +0200 +Subject: [PATCH 12/14] net: dsa: qca8k: move port VLAN functions to common + code + +The same port VLAN functions are used by drivers based on qca8k family +switch. Move them to common code to make them accessible also by other +drivers. +Also drop exposing busy_wait and make it static. + +Signed-off-by: Christian Marangi +Reviewed-by: Vladimir Oltean +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 182 ----------------------------- + drivers/net/dsa/qca/qca8k-common.c | 179 +++++++++++++++++++++++++++- + drivers/net/dsa/qca/qca8k.h | 10 +- + 3 files changed, 187 insertions(+), 184 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -15,7 +15,6 @@ + #include + #include + #include +-#include + #include + #include + #include +@@ -442,122 +441,6 @@ static struct regmap_config qca8k_regmap + }; + + static int +-qca8k_vlan_access(struct qca8k_priv *priv, enum qca8k_vlan_cmd cmd, u16 vid) +-{ +- u32 reg; +- int ret; +- +- /* Set the command and VLAN index */ +- reg = QCA8K_VTU_FUNC1_BUSY; +- reg |= cmd; +- reg |= FIELD_PREP(QCA8K_VTU_FUNC1_VID_MASK, vid); +- +- /* Write the function register triggering the table access */ +- ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC1, reg); +- if (ret) +- return ret; +- +- /* wait for completion */ +- ret = qca8k_busy_wait(priv, QCA8K_REG_VTU_FUNC1, QCA8K_VTU_FUNC1_BUSY); +- if (ret) +- return ret; +- +- /* Check for table full violation when adding an entry */ +- if (cmd == QCA8K_VLAN_LOAD) { +- ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC1, ®); +- if (ret < 0) +- return ret; +- if (reg & QCA8K_VTU_FUNC1_FULL) +- return -ENOMEM; +- } +- +- return 0; +-} +- +-static int +-qca8k_vlan_add(struct qca8k_priv *priv, u8 port, u16 vid, bool untagged) +-{ +- u32 reg; +- int ret; +- +- /* +- We do the right thing with VLAN 0 and treat it as untagged while +- preserving the tag on egress. +- */ +- if (vid == 0) +- return 0; +- +- mutex_lock(&priv->reg_mutex); +- ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid); +- if (ret < 0) +- goto out; +- +- ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, ®); +- if (ret < 0) +- goto out; +- reg |= QCA8K_VTU_FUNC0_VALID | QCA8K_VTU_FUNC0_IVL_EN; +- reg &= ~QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(port); +- if (untagged) +- reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_UNTAG(port); +- else +- reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_TAG(port); +- +- ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg); +- if (ret) +- goto out; +- ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid); +- +-out: +- mutex_unlock(&priv->reg_mutex); +- +- return ret; +-} +- +-static int +-qca8k_vlan_del(struct qca8k_priv *priv, u8 port, u16 vid) +-{ +- u32 reg, mask; +- int ret, i; +- bool del; +- +- mutex_lock(&priv->reg_mutex); +- ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid); +- if (ret < 0) +- goto out; +- +- ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, ®); +- if (ret < 0) +- goto out; +- reg &= ~QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(port); +- reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(port); +- +- /* Check if we're the last member to be removed */ +- del = true; +- for (i = 0; i < QCA8K_NUM_PORTS; i++) { +- mask = QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(i); +- +- if ((reg & mask) != mask) { +- del = false; +- break; +- } +- } +- +- if (del) { +- ret = qca8k_vlan_access(priv, QCA8K_VLAN_PURGE, vid); +- } else { +- ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg); +- if (ret) +- goto out; +- ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid); +- } +- +-out: +- mutex_unlock(&priv->reg_mutex); +- +- return ret; +-} +- +-static int + qca8k_phy_eth_busy_wait(struct qca8k_mgmt_eth_data *mgmt_eth_data, + struct sk_buff *read_skb, u32 *val) + { +@@ -1836,71 +1719,6 @@ exit: + + return ret; + } +- +-static int +-qca8k_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering, +- struct netlink_ext_ack *extack) +-{ +- struct qca8k_priv *priv = ds->priv; +- int ret; +- +- if (vlan_filtering) { +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), +- QCA8K_PORT_LOOKUP_VLAN_MODE_MASK, +- QCA8K_PORT_LOOKUP_VLAN_MODE_SECURE); +- } else { +- ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), +- QCA8K_PORT_LOOKUP_VLAN_MODE_MASK, +- QCA8K_PORT_LOOKUP_VLAN_MODE_NONE); +- } +- +- return ret; +-} +- +-static int +-qca8k_port_vlan_add(struct dsa_switch *ds, int port, +- const struct switchdev_obj_port_vlan *vlan, +- struct netlink_ext_ack *extack) +-{ +- bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; +- bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID; +- struct qca8k_priv *priv = ds->priv; +- int ret; +- +- ret = qca8k_vlan_add(priv, port, vlan->vid, untagged); +- if (ret) { +- dev_err(priv->dev, "Failed to add VLAN to port %d (%d)", port, ret); +- return ret; +- } +- +- if (pvid) { +- ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(port), +- QCA8K_EGREES_VLAN_PORT_MASK(port), +- QCA8K_EGREES_VLAN_PORT(port, vlan->vid)); +- if (ret) +- return ret; +- +- ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(port), +- QCA8K_PORT_VLAN_CVID(vlan->vid) | +- QCA8K_PORT_VLAN_SVID(vlan->vid)); +- } +- +- return ret; +-} +- +-static int +-qca8k_port_vlan_del(struct dsa_switch *ds, int port, +- const struct switchdev_obj_port_vlan *vlan) +-{ +- struct qca8k_priv *priv = ds->priv; +- int ret; +- +- ret = qca8k_vlan_del(priv, port, vlan->vid); +- if (ret) +- dev_err(priv->dev, "Failed to delete VLAN from port %d (%d)", port, ret); +- +- return ret; +-} + + static u32 qca8k_get_phy_flags(struct dsa_switch *ds, int port) + { +--- a/drivers/net/dsa/qca/qca8k-common.c ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -141,7 +141,7 @@ static int qca8k_bulk_write(struct qca8k + return 0; + } + +-int qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask) ++static int qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask) + { + u32 val; + +@@ -354,6 +354,120 @@ exit: + return ret; + } + ++static int qca8k_vlan_access(struct qca8k_priv *priv, ++ enum qca8k_vlan_cmd cmd, u16 vid) ++{ ++ u32 reg; ++ int ret; ++ ++ /* Set the command and VLAN index */ ++ reg = QCA8K_VTU_FUNC1_BUSY; ++ reg |= cmd; ++ reg |= FIELD_PREP(QCA8K_VTU_FUNC1_VID_MASK, vid); ++ ++ /* Write the function register triggering the table access */ ++ ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC1, reg); ++ if (ret) ++ return ret; ++ ++ /* wait for completion */ ++ ret = qca8k_busy_wait(priv, QCA8K_REG_VTU_FUNC1, QCA8K_VTU_FUNC1_BUSY); ++ if (ret) ++ return ret; ++ ++ /* Check for table full violation when adding an entry */ ++ if (cmd == QCA8K_VLAN_LOAD) { ++ ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC1, ®); ++ if (ret < 0) ++ return ret; ++ if (reg & QCA8K_VTU_FUNC1_FULL) ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++static int qca8k_vlan_add(struct qca8k_priv *priv, u8 port, u16 vid, ++ bool untagged) ++{ ++ u32 reg; ++ int ret; ++ ++ /* We do the right thing with VLAN 0 and treat it as untagged while ++ * preserving the tag on egress. ++ */ ++ if (vid == 0) ++ return 0; ++ ++ mutex_lock(&priv->reg_mutex); ++ ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid); ++ if (ret < 0) ++ goto out; ++ ++ ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, ®); ++ if (ret < 0) ++ goto out; ++ reg |= QCA8K_VTU_FUNC0_VALID | QCA8K_VTU_FUNC0_IVL_EN; ++ reg &= ~QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(port); ++ if (untagged) ++ reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_UNTAG(port); ++ else ++ reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_TAG(port); ++ ++ ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg); ++ if (ret) ++ goto out; ++ ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid); ++ ++out: ++ mutex_unlock(&priv->reg_mutex); ++ ++ return ret; ++} ++ ++static int qca8k_vlan_del(struct qca8k_priv *priv, u8 port, u16 vid) ++{ ++ u32 reg, mask; ++ int ret, i; ++ bool del; ++ ++ mutex_lock(&priv->reg_mutex); ++ ret = qca8k_vlan_access(priv, QCA8K_VLAN_READ, vid); ++ if (ret < 0) ++ goto out; ++ ++ ret = qca8k_read(priv, QCA8K_REG_VTU_FUNC0, ®); ++ if (ret < 0) ++ goto out; ++ reg &= ~QCA8K_VTU_FUNC0_EG_MODE_PORT_MASK(port); ++ reg |= QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(port); ++ ++ /* Check if we're the last member to be removed */ ++ del = true; ++ for (i = 0; i < QCA8K_NUM_PORTS; i++) { ++ mask = QCA8K_VTU_FUNC0_EG_MODE_PORT_NOT(i); ++ ++ if ((reg & mask) != mask) { ++ del = false; ++ break; ++ } ++ } ++ ++ if (del) { ++ ret = qca8k_vlan_access(priv, QCA8K_VLAN_PURGE, vid); ++ } else { ++ ret = qca8k_write(priv, QCA8K_REG_VTU_FUNC0, reg); ++ if (ret) ++ goto out; ++ ret = qca8k_vlan_access(priv, QCA8K_VLAN_LOAD, vid); ++ } ++ ++out: ++ mutex_unlock(&priv->reg_mutex); ++ ++ return ret; ++} ++ + int qca8k_mib_init(struct qca8k_priv *priv) + { + int ret; +@@ -832,3 +946,66 @@ void qca8k_port_mirror_del(struct dsa_sw + err: + dev_err(priv->dev, "Failed to del mirror port from %d", port); + } ++ ++int qca8k_port_vlan_filtering(struct dsa_switch *ds, int port, ++ bool vlan_filtering, ++ struct netlink_ext_ack *extack) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int ret; ++ ++ if (vlan_filtering) { ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_VLAN_MODE_MASK, ++ QCA8K_PORT_LOOKUP_VLAN_MODE_SECURE); ++ } else { ++ ret = qca8k_rmw(priv, QCA8K_PORT_LOOKUP_CTRL(port), ++ QCA8K_PORT_LOOKUP_VLAN_MODE_MASK, ++ QCA8K_PORT_LOOKUP_VLAN_MODE_NONE); ++ } ++ ++ return ret; ++} ++ ++int qca8k_port_vlan_add(struct dsa_switch *ds, int port, ++ const struct switchdev_obj_port_vlan *vlan, ++ struct netlink_ext_ack *extack) ++{ ++ bool untagged = vlan->flags & BRIDGE_VLAN_INFO_UNTAGGED; ++ bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID; ++ struct qca8k_priv *priv = ds->priv; ++ int ret; ++ ++ ret = qca8k_vlan_add(priv, port, vlan->vid, untagged); ++ if (ret) { ++ dev_err(priv->dev, "Failed to add VLAN to port %d (%d)", port, ret); ++ return ret; ++ } ++ ++ if (pvid) { ++ ret = qca8k_rmw(priv, QCA8K_EGRESS_VLAN(port), ++ QCA8K_EGREES_VLAN_PORT_MASK(port), ++ QCA8K_EGREES_VLAN_PORT(port, vlan->vid)); ++ if (ret) ++ return ret; ++ ++ ret = qca8k_write(priv, QCA8K_REG_PORT_VLAN_CTRL0(port), ++ QCA8K_PORT_VLAN_CVID(vlan->vid) | ++ QCA8K_PORT_VLAN_SVID(vlan->vid)); ++ } ++ ++ return ret; ++} ++ ++int qca8k_port_vlan_del(struct dsa_switch *ds, int port, ++ const struct switchdev_obj_port_vlan *vlan) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int ret; ++ ++ ret = qca8k_vlan_del(priv, port, vlan->vid); ++ if (ret) ++ dev_err(priv->dev, "Failed to delete VLAN from port %d (%d)", port, ret); ++ ++ return ret; ++} +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -431,7 +431,6 @@ int qca8k_write(struct qca8k_priv *priv, + int qca8k_rmw(struct qca8k_priv *priv, u32 reg, u32 mask, u32 write_val); + + /* Common ops function */ +-int qca8k_busy_wait(struct qca8k_priv *priv, u32 reg, u32 mask); + void qca8k_fdb_flush(struct qca8k_priv *priv); + + /* Common ethtool stats function */ +@@ -487,4 +486,13 @@ int qca8k_port_mirror_add(struct dsa_swi + void qca8k_port_mirror_del(struct dsa_switch *ds, int port, + struct dsa_mall_mirror_tc_entry *mirror); + ++/* Common port VLAN function */ ++int qca8k_port_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering, ++ struct netlink_ext_ack *extack); ++int qca8k_port_vlan_add(struct dsa_switch *ds, int port, ++ const struct switchdev_obj_port_vlan *vlan, ++ struct netlink_ext_ack *extack); ++int qca8k_port_vlan_del(struct dsa_switch *ds, int port, ++ const struct switchdev_obj_port_vlan *vlan); ++ + #endif /* __QCA8K_H */ diff --git a/target/linux/generic/backport-5.15/771-v6.0-13-net-dsa-qca8k-move-port-LAG-functions-to-common-code.patch b/target/linux/generic/backport-5.15/771-v6.0-13-net-dsa-qca8k-move-port-LAG-functions-to-common-code.patch new file mode 100644 index 000000000..1802b17ea --- /dev/null +++ b/target/linux/generic/backport-5.15/771-v6.0-13-net-dsa-qca8k-move-port-LAG-functions-to-common-code.patch @@ -0,0 +1,384 @@ +From e9bbf019af44b204b71ef8edf224002550aab641 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 27 Jul 2022 13:35:22 +0200 +Subject: [PATCH 13/14] net: dsa: qca8k: move port LAG functions to common code + +The same port LAG functions are used by drivers based on qca8k family +switch. Move them to common code to make them accessible also by other +drivers. + +Signed-off-by: Christian Marangi +Reviewed-by: Vladimir Oltean +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 168 ----------------------------- + drivers/net/dsa/qca/qca8k-common.c | 165 ++++++++++++++++++++++++++++ + drivers/net/dsa/qca/qca8k.h | 6 ++ + 3 files changed, 171 insertions(+), 168 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -1743,178 +1743,6 @@ qca8k_get_tag_protocol(struct dsa_switch + return DSA_TAG_PROTO_QCA; + } + +-static bool +-qca8k_lag_can_offload(struct dsa_switch *ds, +- struct net_device *lag, +- struct netdev_lag_upper_info *info) +-{ +- struct dsa_port *dp; +- int id, members = 0; +- +- id = dsa_lag_id(ds->dst, lag); +- if (id < 0 || id >= ds->num_lag_ids) +- return false; +- +- dsa_lag_foreach_port(dp, ds->dst, lag) +- /* Includes the port joining the LAG */ +- members++; +- +- if (members > QCA8K_NUM_PORTS_FOR_LAG) +- return false; +- +- if (info->tx_type != NETDEV_LAG_TX_TYPE_HASH) +- return false; +- +- if (info->hash_type != NETDEV_LAG_HASH_L2 && +- info->hash_type != NETDEV_LAG_HASH_L23) +- return false; +- +- return true; +-} +- +-static int +-qca8k_lag_setup_hash(struct dsa_switch *ds, +- struct net_device *lag, +- struct netdev_lag_upper_info *info) +-{ +- struct qca8k_priv *priv = ds->priv; +- bool unique_lag = true; +- u32 hash = 0; +- int i, id; +- +- id = dsa_lag_id(ds->dst, lag); +- +- switch (info->hash_type) { +- case NETDEV_LAG_HASH_L23: +- hash |= QCA8K_TRUNK_HASH_SIP_EN; +- hash |= QCA8K_TRUNK_HASH_DIP_EN; +- fallthrough; +- case NETDEV_LAG_HASH_L2: +- hash |= QCA8K_TRUNK_HASH_SA_EN; +- hash |= QCA8K_TRUNK_HASH_DA_EN; +- break; +- default: /* We should NEVER reach this */ +- return -EOPNOTSUPP; +- } +- +- /* Check if we are the unique configured LAG */ +- dsa_lags_foreach_id(i, ds->dst) +- if (i != id && dsa_lag_dev(ds->dst, i)) { +- unique_lag = false; +- break; +- } +- +- /* Hash Mode is global. Make sure the same Hash Mode +- * is set to all the 4 possible lag. +- * If we are the unique LAG we can set whatever hash +- * mode we want. +- * To change hash mode it's needed to remove all LAG +- * and change the mode with the latest. +- */ +- if (unique_lag) { +- priv->lag_hash_mode = hash; +- } else if (priv->lag_hash_mode != hash) { +- netdev_err(lag, "Error: Mismateched Hash Mode across different lag is not supported\n"); +- return -EOPNOTSUPP; +- } +- +- return regmap_update_bits(priv->regmap, QCA8K_TRUNK_HASH_EN_CTRL, +- QCA8K_TRUNK_HASH_MASK, hash); +-} +- +-static int +-qca8k_lag_refresh_portmap(struct dsa_switch *ds, int port, +- struct net_device *lag, bool delete) +-{ +- struct qca8k_priv *priv = ds->priv; +- int ret, id, i; +- u32 val; +- +- id = dsa_lag_id(ds->dst, lag); +- +- /* Read current port member */ +- ret = regmap_read(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL0, &val); +- if (ret) +- return ret; +- +- /* Shift val to the correct trunk */ +- val >>= QCA8K_REG_GOL_TRUNK_SHIFT(id); +- val &= QCA8K_REG_GOL_TRUNK_MEMBER_MASK; +- if (delete) +- val &= ~BIT(port); +- else +- val |= BIT(port); +- +- /* Update port member. With empty portmap disable trunk */ +- ret = regmap_update_bits(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL0, +- QCA8K_REG_GOL_TRUNK_MEMBER(id) | +- QCA8K_REG_GOL_TRUNK_EN(id), +- !val << QCA8K_REG_GOL_TRUNK_SHIFT(id) | +- val << QCA8K_REG_GOL_TRUNK_SHIFT(id)); +- +- /* Search empty member if adding or port on deleting */ +- for (i = 0; i < QCA8K_NUM_PORTS_FOR_LAG; i++) { +- ret = regmap_read(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL(id), &val); +- if (ret) +- return ret; +- +- val >>= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i); +- val &= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_MASK; +- +- if (delete) { +- /* If port flagged to be disabled assume this member is +- * empty +- */ +- if (val != QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK) +- continue; +- +- val &= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT_MASK; +- if (val != port) +- continue; +- } else { +- /* If port flagged to be enabled assume this member is +- * already set +- */ +- if (val == QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK) +- continue; +- } +- +- /* We have found the member to add/remove */ +- break; +- } +- +- /* Set port in the correct port mask or disable port if in delete mode */ +- return regmap_update_bits(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL(id), +- QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN(id, i) | +- QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT(id, i), +- !delete << QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i) | +- port << QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i)); +-} +- +-static int +-qca8k_port_lag_join(struct dsa_switch *ds, int port, +- struct net_device *lag, +- struct netdev_lag_upper_info *info) +-{ +- int ret; +- +- if (!qca8k_lag_can_offload(ds, lag, info)) +- return -EOPNOTSUPP; +- +- ret = qca8k_lag_setup_hash(ds, lag, info); +- if (ret) +- return ret; +- +- return qca8k_lag_refresh_portmap(ds, port, lag, false); +-} +- +-static int +-qca8k_port_lag_leave(struct dsa_switch *ds, int port, +- struct net_device *lag) +-{ +- return qca8k_lag_refresh_portmap(ds, port, lag, true); +-} +- + static void + qca8k_master_change(struct dsa_switch *ds, const struct net_device *master, + bool operational) +--- a/drivers/net/dsa/qca/qca8k-common.c ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -1009,3 +1009,169 @@ int qca8k_port_vlan_del(struct dsa_switc + + return ret; + } ++ ++static bool qca8k_lag_can_offload(struct dsa_switch *ds, ++ struct net_device *lag, ++ struct netdev_lag_upper_info *info) ++{ ++ struct dsa_port *dp; ++ int id, members = 0; ++ ++ id = dsa_lag_id(ds->dst, lag); ++ if (id < 0 || id >= ds->num_lag_ids) ++ return false; ++ ++ dsa_lag_foreach_port(dp, ds->dst, lag) ++ /* Includes the port joining the LAG */ ++ members++; ++ ++ if (members > QCA8K_NUM_PORTS_FOR_LAG) ++ return false; ++ ++ if (info->tx_type != NETDEV_LAG_TX_TYPE_HASH) ++ return false; ++ ++ if (info->hash_type != NETDEV_LAG_HASH_L2 && ++ info->hash_type != NETDEV_LAG_HASH_L23) ++ return false; ++ ++ return true; ++} ++ ++static int qca8k_lag_setup_hash(struct dsa_switch *ds, ++ struct net_device *lag, ++ struct netdev_lag_upper_info *info) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ bool unique_lag = true; ++ u32 hash = 0; ++ int i, id; ++ ++ id = dsa_lag_id(ds->dst, lag); ++ ++ switch (info->hash_type) { ++ case NETDEV_LAG_HASH_L23: ++ hash |= QCA8K_TRUNK_HASH_SIP_EN; ++ hash |= QCA8K_TRUNK_HASH_DIP_EN; ++ fallthrough; ++ case NETDEV_LAG_HASH_L2: ++ hash |= QCA8K_TRUNK_HASH_SA_EN; ++ hash |= QCA8K_TRUNK_HASH_DA_EN; ++ break; ++ default: /* We should NEVER reach this */ ++ return -EOPNOTSUPP; ++ } ++ ++ /* Check if we are the unique configured LAG */ ++ dsa_lags_foreach_id(i, ds->dst) ++ if (i != id && dsa_lag_dev(ds->dst, i)) { ++ unique_lag = false; ++ break; ++ } ++ ++ /* Hash Mode is global. Make sure the same Hash Mode ++ * is set to all the 4 possible lag. ++ * If we are the unique LAG we can set whatever hash ++ * mode we want. ++ * To change hash mode it's needed to remove all LAG ++ * and change the mode with the latest. ++ */ ++ if (unique_lag) { ++ priv->lag_hash_mode = hash; ++ } else if (priv->lag_hash_mode != hash) { ++ netdev_err(lag, "Error: Mismatched Hash Mode across different lag is not supported\n"); ++ return -EOPNOTSUPP; ++ } ++ ++ return regmap_update_bits(priv->regmap, QCA8K_TRUNK_HASH_EN_CTRL, ++ QCA8K_TRUNK_HASH_MASK, hash); ++} ++ ++static int qca8k_lag_refresh_portmap(struct dsa_switch *ds, int port, ++ struct net_device *lag, bool delete) ++{ ++ struct qca8k_priv *priv = ds->priv; ++ int ret, id, i; ++ u32 val; ++ ++ id = dsa_lag_id(ds->dst, lag); ++ ++ /* Read current port member */ ++ ret = regmap_read(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL0, &val); ++ if (ret) ++ return ret; ++ ++ /* Shift val to the correct trunk */ ++ val >>= QCA8K_REG_GOL_TRUNK_SHIFT(id); ++ val &= QCA8K_REG_GOL_TRUNK_MEMBER_MASK; ++ if (delete) ++ val &= ~BIT(port); ++ else ++ val |= BIT(port); ++ ++ /* Update port member. With empty portmap disable trunk */ ++ ret = regmap_update_bits(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL0, ++ QCA8K_REG_GOL_TRUNK_MEMBER(id) | ++ QCA8K_REG_GOL_TRUNK_EN(id), ++ !val << QCA8K_REG_GOL_TRUNK_SHIFT(id) | ++ val << QCA8K_REG_GOL_TRUNK_SHIFT(id)); ++ ++ /* Search empty member if adding or port on deleting */ ++ for (i = 0; i < QCA8K_NUM_PORTS_FOR_LAG; i++) { ++ ret = regmap_read(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL(id), &val); ++ if (ret) ++ return ret; ++ ++ val >>= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i); ++ val &= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_MASK; ++ ++ if (delete) { ++ /* If port flagged to be disabled assume this member is ++ * empty ++ */ ++ if (val != QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK) ++ continue; ++ ++ val &= QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT_MASK; ++ if (val != port) ++ continue; ++ } else { ++ /* If port flagged to be enabled assume this member is ++ * already set ++ */ ++ if (val == QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN_MASK) ++ continue; ++ } ++ ++ /* We have found the member to add/remove */ ++ break; ++ } ++ ++ /* Set port in the correct port mask or disable port if in delete mode */ ++ return regmap_update_bits(priv->regmap, QCA8K_REG_GOL_TRUNK_CTRL(id), ++ QCA8K_REG_GOL_TRUNK_ID_MEM_ID_EN(id, i) | ++ QCA8K_REG_GOL_TRUNK_ID_MEM_ID_PORT(id, i), ++ !delete << QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i) | ++ port << QCA8K_REG_GOL_TRUNK_ID_MEM_ID_SHIFT(id, i)); ++} ++ ++int qca8k_port_lag_join(struct dsa_switch *ds, int port, struct net_device *lag, ++ struct netdev_lag_upper_info *info) ++{ ++ int ret; ++ ++ if (!qca8k_lag_can_offload(ds, lag, info)) ++ return -EOPNOTSUPP; ++ ++ ret = qca8k_lag_setup_hash(ds, lag, info); ++ if (ret) ++ return ret; ++ ++ return qca8k_lag_refresh_portmap(ds, port, lag, false); ++} ++ ++int qca8k_port_lag_leave(struct dsa_switch *ds, int port, ++ struct net_device *lag) ++{ ++ return qca8k_lag_refresh_portmap(ds, port, lag, true); ++} +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -495,4 +495,10 @@ int qca8k_port_vlan_add(struct dsa_switc + int qca8k_port_vlan_del(struct dsa_switch *ds, int port, + const struct switchdev_obj_port_vlan *vlan); + ++/* Common port LAG function */ ++int qca8k_port_lag_join(struct dsa_switch *ds, int port, struct net_device *lag, ++ struct netdev_lag_upper_info *info); ++int qca8k_port_lag_leave(struct dsa_switch *ds, int port, ++ struct net_device *lag); ++ + #endif /* __QCA8K_H */ diff --git a/target/linux/generic/backport-5.15/771-v6.0-14-net-dsa-qca8k-move-read_switch_id-function-to-common.patch b/target/linux/generic/backport-5.15/771-v6.0-14-net-dsa-qca8k-move-read_switch_id-function-to-common.patch new file mode 100644 index 000000000..d6ec8b77e --- /dev/null +++ b/target/linux/generic/backport-5.15/771-v6.0-14-net-dsa-qca8k-move-read_switch_id-function-to-common.patch @@ -0,0 +1,102 @@ +From 9d1bcb1f293f1391302a109c9819c3705c804700 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 27 Jul 2022 13:35:23 +0200 +Subject: [PATCH 14/14] net: dsa: qca8k: move read_switch_id function to common + code + +The same function to read the switch id is used by drivers based on +qca8k family switch. Move them to common code to make them accessible +also by other drivers. + +Signed-off-by: Christian Marangi +Reviewed-by: Vladimir Oltean +Signed-off-by: Jakub Kicinski +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 29 ----------------------------- + drivers/net/dsa/qca/qca8k-common.c | 29 +++++++++++++++++++++++++++++ + drivers/net/dsa/qca/qca8k.h | 1 + + 3 files changed, 30 insertions(+), 29 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -1822,35 +1822,6 @@ static const struct dsa_switch_ops qca8k + .connect_tag_protocol = qca8k_connect_tag_protocol, + }; + +-static int qca8k_read_switch_id(struct qca8k_priv *priv) +-{ +- u32 val; +- u8 id; +- int ret; +- +- if (!priv->info) +- return -ENODEV; +- +- ret = qca8k_read(priv, QCA8K_REG_MASK_CTRL, &val); +- if (ret < 0) +- return -ENODEV; +- +- id = QCA8K_MASK_CTRL_DEVICE_ID(val); +- if (id != priv->info->id) { +- dev_err(priv->dev, +- "Switch id detected %x but expected %x", +- id, priv->info->id); +- return -ENODEV; +- } +- +- priv->switch_id = id; +- +- /* Save revision to communicate to the internal PHY driver */ +- priv->switch_revision = QCA8K_MASK_CTRL_REV_ID(val); +- +- return 0; +-} +- + static int + qca8k_sw_probe(struct mdio_device *mdiodev) + { +--- a/drivers/net/dsa/qca/qca8k-common.c ++++ b/drivers/net/dsa/qca/qca8k-common.c +@@ -1175,3 +1175,32 @@ int qca8k_port_lag_leave(struct dsa_swit + { + return qca8k_lag_refresh_portmap(ds, port, lag, true); + } ++ ++int qca8k_read_switch_id(struct qca8k_priv *priv) ++{ ++ u32 val; ++ u8 id; ++ int ret; ++ ++ if (!priv->info) ++ return -ENODEV; ++ ++ ret = qca8k_read(priv, QCA8K_REG_MASK_CTRL, &val); ++ if (ret < 0) ++ return -ENODEV; ++ ++ id = QCA8K_MASK_CTRL_DEVICE_ID(val); ++ if (id != priv->info->id) { ++ dev_err(priv->dev, ++ "Switch id detected %x but expected %x", ++ id, priv->info->id); ++ return -ENODEV; ++ } ++ ++ priv->switch_id = id; ++ ++ /* Save revision to communicate to the internal PHY driver */ ++ priv->switch_revision = QCA8K_MASK_CTRL_REV_ID(val); ++ ++ return 0; ++} +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -424,6 +424,7 @@ extern const struct qca8k_mib_desc ar832 + extern const struct regmap_access_table qca8k_readable_table; + int qca8k_mib_init(struct qca8k_priv *priv); + void qca8k_port_set_status(struct qca8k_priv *priv, int port, int enable); ++int qca8k_read_switch_id(struct qca8k_priv *priv); + + /* Common read/write/rmw function */ + int qca8k_read(struct qca8k_priv *priv, u32 reg, u32 *val); diff --git a/target/linux/generic/backport-5.15/772-v6.0-net-dsa-qca8k-fix-NULL-pointer-dereference-for-of_de.patch b/target/linux/generic/backport-5.15/772-v6.0-net-dsa-qca8k-fix-NULL-pointer-dereference-for-of_de.patch new file mode 100644 index 000000000..0cca2788f --- /dev/null +++ b/target/linux/generic/backport-5.15/772-v6.0-net-dsa-qca8k-fix-NULL-pointer-dereference-for-of_de.patch @@ -0,0 +1,29 @@ +From 057bcf15db8e625276ddf02b2b7c668a3cb43f81 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sun, 4 Sep 2022 23:46:24 +0200 +Subject: [net PATCH] net: dsa: qca8k: fix NULL pointer dereference for + of_device_get_match_data + +of_device_get_match_data is called on priv->dev before priv->dev is +actually set. Move of_device_get_match_data after priv->dev is correctly +set to fix this kernel panic. + +Fixes: 3bb0844e7bcd ("net: dsa: qca8k: cache match data to speed up access") +Signed-off-by: Christian Marangi +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -1835,9 +1835,9 @@ qca8k_sw_probe(struct mdio_device *mdiod + if (!priv) + return -ENOMEM; + +- priv->info = of_device_get_match_data(priv->dev); + priv->bus = mdiodev->bus; + priv->dev = &mdiodev->dev; ++ priv->info = of_device_get_match_data(priv->dev); + + priv->reset_gpio = devm_gpiod_get_optional(priv->dev, "reset", + GPIOD_ASIS); diff --git a/target/linux/generic/backport-5.15/782-v6.1-net-dsa-mt7530-add-support-for-in-band-link-status.patch b/target/linux/generic/backport-5.15/782-v6.1-net-dsa-mt7530-add-support-for-in-band-link-status.patch index acb67ab16..7f16b936c 100644 --- a/target/linux/generic/backport-5.15/782-v6.1-net-dsa-mt7530-add-support-for-in-band-link-status.patch +++ b/target/linux/generic/backport-5.15/782-v6.1-net-dsa-mt7530-add-support-for-in-band-link-status.patch @@ -19,7 +19,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2952,9 +2952,6 @@ mt7531_mac_config(struct dsa_switch *ds, +@@ -2979,9 +2979,6 @@ mt7531_mac_config(struct dsa_switch *ds, case PHY_INTERFACE_MODE_NA: case PHY_INTERFACE_MODE_1000BASEX: case PHY_INTERFACE_MODE_2500BASEX: @@ -29,7 +29,7 @@ Signed-off-by: David S. Miller return mt7531_sgmii_setup_mode_force(priv, port, interface); default: return -EINVAL; -@@ -3030,13 +3027,6 @@ unsupported: +@@ -3057,13 +3054,6 @@ unsupported: return; } @@ -43,7 +43,7 @@ Signed-off-by: David S. Miller mcr_cur = mt7530_read(priv, MT7530_PMCR_P(port)); mcr_new = mcr_cur; mcr_new &= ~PMCR_LINK_SETTINGS_MASK; -@@ -3173,6 +3163,9 @@ static void mt753x_phylink_get_caps(stru +@@ -3200,6 +3190,9 @@ static void mt753x_phylink_get_caps(stru config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | MAC_10 | MAC_100 | MAC_1000FD; @@ -53,7 +53,7 @@ Signed-off-by: David S. Miller /* This driver does not make use of the speed, duplex, pause or the * advertisement in its mac_config, so it is safe to mark this driver * as non-legacy. -@@ -3238,6 +3231,7 @@ mt7531_sgmii_pcs_get_state_an(struct mt7 +@@ -3265,6 +3258,7 @@ mt7531_sgmii_pcs_get_state_an(struct mt7 status = mt7530_read(priv, MT7531_PCS_CONTROL_1(port)); state->link = !!(status & MT7531_SGMII_LINK_STATUS); @@ -61,7 +61,7 @@ Signed-off-by: David S. Miller if (state->interface == PHY_INTERFACE_MODE_SGMII && (status & MT7531_SGMII_AN_ENABLE)) { val = mt7530_read(priv, MT7531_PCS_SPEED_ABILITY(port)); -@@ -3268,16 +3262,44 @@ mt7531_sgmii_pcs_get_state_an(struct mt7 +@@ -3295,16 +3289,44 @@ mt7531_sgmii_pcs_get_state_an(struct mt7 return 0; } @@ -109,7 +109,7 @@ Signed-off-by: David S. Miller } static int mt753x_pcs_config(struct phylink_pcs *pcs, unsigned int mode, -@@ -3318,6 +3340,8 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3345,6 +3367,8 @@ mt753x_setup(struct dsa_switch *ds) priv->pcs[i].pcs.ops = priv->info->pcs_ops; priv->pcs[i].priv = priv; priv->pcs[i].port = i; @@ -120,7 +120,7 @@ Signed-off-by: David S. Miller ret = priv->info->sw_setup(ds); --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -405,6 +405,7 @@ enum mt7530_vlan_port_acc_frm { +@@ -410,6 +410,7 @@ enum mt7530_vlan_port_acc_frm { #define MT7531_SGMII_LINK_STATUS BIT(18) #define MT7531_SGMII_AN_ENABLE BIT(12) #define MT7531_SGMII_AN_RESTART BIT(9) diff --git a/target/linux/generic/backport-5.15/788-v6.3-net-dsa-mt7530-use-external-PCS-driver.patch b/target/linux/generic/backport-5.15/788-v6.3-net-dsa-mt7530-use-external-PCS-driver.patch index d8386fc3c..8060ad5af 100644 --- a/target/linux/generic/backport-5.15/788-v6.3-net-dsa-mt7530-use-external-PCS-driver.patch +++ b/target/linux/generic/backport-5.15/788-v6.3-net-dsa-mt7530-use-external-PCS-driver.patch @@ -81,7 +81,7 @@ Tested-by: Frank Wunderlich #include #include #include -@@ -2804,128 +2805,11 @@ static int mt7531_rgmii_setup(struct mt7 +@@ -2831,128 +2832,11 @@ static int mt7531_rgmii_setup(struct mt7 return 0; } @@ -210,7 +210,7 @@ Tested-by: Frank Wunderlich static int mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) -@@ -2948,11 +2832,11 @@ mt7531_mac_config(struct dsa_switch *ds, +@@ -2975,11 +2859,11 @@ mt7531_mac_config(struct dsa_switch *ds, phydev = dp->slave->phydev; return mt7531_rgmii_setup(priv, port, interface, phydev); case PHY_INTERFACE_MODE_SGMII: @@ -224,7 +224,7 @@ Tested-by: Frank Wunderlich default: return -EINVAL; } -@@ -2977,11 +2861,11 @@ mt753x_phylink_mac_select_pcs(struct dsa +@@ -3004,11 +2888,11 @@ mt753x_phylink_mac_select_pcs(struct dsa switch (interface) { case PHY_INTERFACE_MODE_TRGMII: @@ -238,7 +238,7 @@ Tested-by: Frank Wunderlich default: return NULL; } -@@ -3222,86 +3106,6 @@ static void mt7530_pcs_get_state(struct +@@ -3249,86 +3133,6 @@ static void mt7530_pcs_get_state(struct state->pause |= MLO_PAUSE_TX; } @@ -325,7 +325,7 @@ Tested-by: Frank Wunderlich static int mt753x_pcs_config(struct phylink_pcs *pcs, unsigned int mode, phy_interface_t interface, const unsigned long *advertising, -@@ -3321,18 +3125,57 @@ static const struct phylink_pcs_ops mt75 +@@ -3348,18 +3152,57 @@ static const struct phylink_pcs_ops mt75 .pcs_an_restart = mt7530_pcs_an_restart, }; @@ -389,7 +389,7 @@ Tested-by: Frank Wunderlich int i, ret; /* Initialise the PCS devices */ -@@ -3340,8 +3183,6 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3367,8 +3210,6 @@ mt753x_setup(struct dsa_switch *ds) priv->pcs[i].pcs.ops = priv->info->pcs_ops; priv->pcs[i].priv = priv; priv->pcs[i].port = i; @@ -398,7 +398,7 @@ Tested-by: Frank Wunderlich } ret = priv->info->sw_setup(ds); -@@ -3356,6 +3197,16 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3383,6 +3224,16 @@ mt753x_setup(struct dsa_switch *ds) if (ret && priv->irq) mt7530_free_irq_common(priv); @@ -415,7 +415,7 @@ Tested-by: Frank Wunderlich return ret; } -@@ -3447,7 +3298,7 @@ static const struct mt753x_info mt753x_t +@@ -3475,7 +3326,7 @@ static const struct mt753x_info mt753x_t }, [ID_MT7531] = { .id = ID_MT7531, @@ -424,7 +424,7 @@ Tested-by: Frank Wunderlich .sw_setup = mt7531_setup, .phy_read = mt7531_ind_phy_read, .phy_write = mt7531_ind_phy_write, -@@ -3555,7 +3406,7 @@ static void +@@ -3583,7 +3434,7 @@ static void mt7530_remove(struct mdio_device *mdiodev) { struct mt7530_priv *priv = dev_get_drvdata(&mdiodev->dev); @@ -433,7 +433,7 @@ Tested-by: Frank Wunderlich if (!priv) return; -@@ -3574,6 +3425,10 @@ mt7530_remove(struct mdio_device *mdiode +@@ -3602,6 +3453,10 @@ mt7530_remove(struct mdio_device *mdiode mt7530_free_irq(priv); dsa_unregister_switch(priv->ds); @@ -446,7 +446,7 @@ Tested-by: Frank Wunderlich dev_set_drvdata(&mdiodev->dev, NULL); --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -396,47 +396,8 @@ enum mt7530_vlan_port_acc_frm { +@@ -401,47 +401,8 @@ enum mt7530_vlan_port_acc_frm { CCR_TX_OCT_CNT_BAD) /* MT7531 SGMII register group */ @@ -496,7 +496,7 @@ Tested-by: Frank Wunderlich /* Register for system reset */ #define MT7530_SYS_CTRL 0x7000 -@@ -735,13 +696,13 @@ struct mt7530_fdb { +@@ -741,13 +702,13 @@ struct mt7530_fdb { * @pm: The matrix used to show all connections with the port. * @pvid: The VLAN specified is to be considered a PVID at ingress. Any * untagged frames will be assigned to the related VLAN. diff --git a/target/linux/generic/backport-5.15/790-v6.4-0002-net-dsa-mt7530-refactor-SGMII-PCS-creation.patch b/target/linux/generic/backport-5.15/790-v6.4-0002-net-dsa-mt7530-refactor-SGMII-PCS-creation.patch index 8311aaa0b..62d9c78cc 100644 --- a/target/linux/generic/backport-5.15/790-v6.4-0002-net-dsa-mt7530-refactor-SGMII-PCS-creation.patch +++ b/target/linux/generic/backport-5.15/790-v6.4-0002-net-dsa-mt7530-refactor-SGMII-PCS-creation.patch @@ -18,7 +18,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3157,26 +3157,56 @@ static const struct regmap_bus mt7531_re +@@ -3184,26 +3184,56 @@ static const struct regmap_bus mt7531_re .reg_update_bits = mt7530_regmap_update_bits, }; @@ -88,7 +88,7 @@ Signed-off-by: David S. Miller int i, ret; /* Initialise the PCS devices */ -@@ -3198,15 +3228,11 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3225,15 +3255,11 @@ mt753x_setup(struct dsa_switch *ds) if (ret && priv->irq) mt7530_free_irq_common(priv); diff --git a/target/linux/generic/backport-5.15/790-v6.4-0003-net-dsa-mt7530-use-unlocked-regmap-accessors.patch b/target/linux/generic/backport-5.15/790-v6.4-0003-net-dsa-mt7530-use-unlocked-regmap-accessors.patch index 7271f1023..e9f69a877 100644 --- a/target/linux/generic/backport-5.15/790-v6.4-0003-net-dsa-mt7530-use-unlocked-regmap-accessors.patch +++ b/target/linux/generic/backport-5.15/790-v6.4-0003-net-dsa-mt7530-use-unlocked-regmap-accessors.patch @@ -19,7 +19,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3130,7 +3130,7 @@ static int mt7530_regmap_read(void *cont +@@ -3157,7 +3157,7 @@ static int mt7530_regmap_read(void *cont { struct mt7530_priv *priv = context; @@ -28,7 +28,7 @@ Signed-off-by: David S. Miller return 0; }; -@@ -3138,23 +3138,25 @@ static int mt7530_regmap_write(void *con +@@ -3165,23 +3165,25 @@ static int mt7530_regmap_write(void *con { struct mt7530_priv *priv = context; @@ -62,7 +62,7 @@ Signed-off-by: David S. Miller }; static int -@@ -3180,6 +3182,9 @@ mt7531_create_sgmii(struct mt7530_priv * +@@ -3207,6 +3209,9 @@ mt7531_create_sgmii(struct mt7530_priv * mt7531_pcs_config[i]->reg_stride = 4; mt7531_pcs_config[i]->reg_base = MT7531_SGMII_REG_BASE(5 + i); mt7531_pcs_config[i]->max_register = 0x17c; diff --git a/target/linux/generic/backport-5.15/790-v6.4-0004-net-dsa-mt7530-use-regmap-to-access-switch-register-.patch b/target/linux/generic/backport-5.15/790-v6.4-0004-net-dsa-mt7530-use-regmap-to-access-switch-register-.patch index 2f761c2fa..a2dcc08b0 100644 --- a/target/linux/generic/backport-5.15/790-v6.4-0004-net-dsa-mt7530-use-regmap-to-access-switch-register-.patch +++ b/target/linux/generic/backport-5.15/790-v6.4-0004-net-dsa-mt7530-use-regmap-to-access-switch-register-.patch @@ -133,7 +133,7 @@ Signed-off-by: David S. Miller } static void -@@ -3126,22 +3147,6 @@ static const struct phylink_pcs_ops mt75 +@@ -3153,22 +3174,6 @@ static const struct phylink_pcs_ops mt75 .pcs_an_restart = mt7530_pcs_an_restart, }; @@ -156,7 +156,7 @@ Signed-off-by: David S. Miller static void mt7530_mdio_regmap_lock(void *mdio_lock) { -@@ -3154,7 +3159,7 @@ mt7530_mdio_regmap_unlock(void *mdio_loc +@@ -3181,7 +3186,7 @@ mt7530_mdio_regmap_unlock(void *mdio_loc mutex_unlock(mdio_lock); } @@ -165,7 +165,7 @@ Signed-off-by: David S. Miller .reg_write = mt7530_regmap_write, .reg_read = mt7530_regmap_read, }; -@@ -3187,7 +3192,7 @@ mt7531_create_sgmii(struct mt7530_priv * +@@ -3214,7 +3219,7 @@ mt7531_create_sgmii(struct mt7530_priv * mt7531_pcs_config[i]->lock_arg = &priv->bus->mdio_lock; regmap = devm_regmap_init(priv->dev, @@ -174,7 +174,7 @@ Signed-off-by: David S. Miller mt7531_pcs_config[i]); if (IS_ERR(regmap)) { ret = PTR_ERR(regmap); -@@ -3352,6 +3357,7 @@ MODULE_DEVICE_TABLE(of, mt7530_of_match) +@@ -3380,6 +3385,7 @@ MODULE_DEVICE_TABLE(of, mt7530_of_match) static int mt7530_probe(struct mdio_device *mdiodev) { @@ -182,7 +182,7 @@ Signed-off-by: David S. Miller struct mt7530_priv *priv; struct device_node *dn; -@@ -3431,6 +3437,21 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3459,6 +3465,21 @@ mt7530_probe(struct mdio_device *mdiodev mutex_init(&priv->reg_mutex); dev_set_drvdata(&mdiodev->dev, priv); @@ -206,7 +206,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -779,6 +779,7 @@ struct mt753x_info { +@@ -785,6 +785,7 @@ struct mt753x_info { * @dev: The device pointer * @ds: The pointer to the dsa core structure * @bus: The bus used for the device and built-in PHY @@ -214,7 +214,7 @@ Signed-off-by: David S. Miller * @rstc: The pointer to reset control used by MCM * @core_pwr: The power supplied into the core * @io_pwr: The power supplied into the I/O -@@ -799,6 +800,7 @@ struct mt7530_priv { +@@ -805,6 +806,7 @@ struct mt7530_priv { struct device *dev; struct dsa_switch *ds; struct mii_bus *bus; diff --git a/target/linux/generic/backport-5.15/790-v6.4-0005-net-dsa-mt7530-move-SGMII-PCS-creation-to-mt7530_pro.patch b/target/linux/generic/backport-5.15/790-v6.4-0005-net-dsa-mt7530-move-SGMII-PCS-creation-to-mt7530_pro.patch index 16feba1da..abbecd5e4 100644 --- a/target/linux/generic/backport-5.15/790-v6.4-0005-net-dsa-mt7530-move-SGMII-PCS-creation-to-mt7530_pro.patch +++ b/target/linux/generic/backport-5.15/790-v6.4-0005-net-dsa-mt7530-move-SGMII-PCS-creation-to-mt7530_pro.patch @@ -18,7 +18,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3238,12 +3238,6 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3265,12 +3265,6 @@ mt753x_setup(struct dsa_switch *ds) if (ret && priv->irq) mt7530_free_irq_common(priv); @@ -31,7 +31,7 @@ Signed-off-by: David S. Miller return ret; } -@@ -3360,6 +3354,7 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3388,6 +3382,7 @@ mt7530_probe(struct mdio_device *mdiodev static struct regmap_config *regmap_config; struct mt7530_priv *priv; struct device_node *dn; @@ -39,7 +39,7 @@ Signed-off-by: David S. Miller dn = mdiodev->dev.of_node; -@@ -3452,6 +3447,12 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3480,6 +3475,12 @@ mt7530_probe(struct mdio_device *mdiodev if (IS_ERR(priv->regmap)) return PTR_ERR(priv->regmap); diff --git a/target/linux/generic/backport-5.15/790-v6.4-0006-net-dsa-mt7530-introduce-mutex-helpers.patch b/target/linux/generic/backport-5.15/790-v6.4-0006-net-dsa-mt7530-introduce-mutex-helpers.patch index dc4b40b82..ef02d4693 100644 --- a/target/linux/generic/backport-5.15/790-v6.4-0006-net-dsa-mt7530-introduce-mutex-helpers.patch +++ b/target/linux/generic/backport-5.15/790-v6.4-0006-net-dsa-mt7530-introduce-mutex-helpers.patch @@ -114,7 +114,7 @@ Signed-off-by: David S. Miller } static void -@@ -646,14 +650,13 @@ static int +@@ -660,14 +664,13 @@ static int mt7531_ind_c45_phy_read(struct mt7530_priv *priv, int port, int devad, int regnum) { @@ -130,7 +130,7 @@ Signed-off-by: David S. Miller ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val, !(val & MT7531_PHY_ACS_ST), 20, 100000); -@@ -686,7 +689,7 @@ mt7531_ind_c45_phy_read(struct mt7530_pr +@@ -700,7 +703,7 @@ mt7531_ind_c45_phy_read(struct mt7530_pr ret = val & MT7531_MDIO_RW_DATA_MASK; out: @@ -139,7 +139,7 @@ Signed-off-by: David S. Miller return ret; } -@@ -695,14 +698,13 @@ static int +@@ -709,14 +712,13 @@ static int mt7531_ind_c45_phy_write(struct mt7530_priv *priv, int port, int devad, int regnum, u32 data) { @@ -155,7 +155,7 @@ Signed-off-by: David S. Miller ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val, !(val & MT7531_PHY_ACS_ST), 20, 100000); -@@ -734,7 +736,7 @@ mt7531_ind_c45_phy_write(struct mt7530_p +@@ -748,7 +750,7 @@ mt7531_ind_c45_phy_write(struct mt7530_p } out: @@ -164,7 +164,7 @@ Signed-off-by: David S. Miller return ret; } -@@ -742,14 +744,13 @@ out: +@@ -756,14 +758,13 @@ out: static int mt7531_ind_c22_phy_read(struct mt7530_priv *priv, int port, int regnum) { @@ -180,7 +180,7 @@ Signed-off-by: David S. Miller ret = readx_poll_timeout(_mt7530_unlocked_read, &p, val, !(val & MT7531_PHY_ACS_ST), 20, 100000); -@@ -772,7 +773,7 @@ mt7531_ind_c22_phy_read(struct mt7530_pr +@@ -786,7 +787,7 @@ mt7531_ind_c22_phy_read(struct mt7530_pr ret = val & MT7531_MDIO_RW_DATA_MASK; out: @@ -189,7 +189,7 @@ Signed-off-by: David S. Miller return ret; } -@@ -781,14 +782,13 @@ static int +@@ -795,14 +796,13 @@ static int mt7531_ind_c22_phy_write(struct mt7530_priv *priv, int port, int regnum, u16 data) { @@ -205,7 +205,7 @@ Signed-off-by: David S. Miller ret = readx_poll_timeout(_mt7530_unlocked_read, &p, reg, !(reg & MT7531_PHY_ACS_ST), 20, 100000); -@@ -810,7 +810,7 @@ mt7531_ind_c22_phy_write(struct mt7530_p +@@ -824,7 +824,7 @@ mt7531_ind_c22_phy_write(struct mt7530_p } out: @@ -214,7 +214,7 @@ Signed-off-by: David S. Miller return ret; } -@@ -1323,7 +1323,6 @@ static int +@@ -1344,7 +1344,6 @@ static int mt7530_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) { struct mt7530_priv *priv = ds->priv; @@ -222,7 +222,7 @@ Signed-off-by: David S. Miller int length; u32 val; -@@ -1334,7 +1333,7 @@ mt7530_port_change_mtu(struct dsa_switch +@@ -1355,7 +1354,7 @@ mt7530_port_change_mtu(struct dsa_switch if (!dsa_is_cpu_port(ds, port)) return 0; @@ -231,7 +231,7 @@ Signed-off-by: David S. Miller val = mt7530_mii_read(priv, MT7530_GMACCR); val &= ~MAX_RX_PKT_LEN_MASK; -@@ -1355,7 +1354,7 @@ mt7530_port_change_mtu(struct dsa_switch +@@ -1376,7 +1375,7 @@ mt7530_port_change_mtu(struct dsa_switch mt7530_mii_write(priv, MT7530_GMACCR, val); @@ -240,7 +240,7 @@ Signed-off-by: David S. Miller return 0; } -@@ -2151,10 +2150,10 @@ mt7530_irq_thread_fn(int irq, void *dev_ +@@ -2172,10 +2171,10 @@ mt7530_irq_thread_fn(int irq, void *dev_ u32 val; int p; @@ -253,7 +253,7 @@ Signed-off-by: David S. Miller for (p = 0; p < MT7530_NUM_PHYS; p++) { if (BIT(p) & val) { -@@ -2190,7 +2189,7 @@ mt7530_irq_bus_lock(struct irq_data *d) +@@ -2211,7 +2210,7 @@ mt7530_irq_bus_lock(struct irq_data *d) { struct mt7530_priv *priv = irq_data_get_irq_chip_data(d); @@ -262,7 +262,7 @@ Signed-off-by: David S. Miller } static void -@@ -2199,7 +2198,7 @@ mt7530_irq_bus_sync_unlock(struct irq_da +@@ -2220,7 +2219,7 @@ mt7530_irq_bus_sync_unlock(struct irq_da struct mt7530_priv *priv = irq_data_get_irq_chip_data(d); mt7530_mii_write(priv, MT7530_SYS_INT_EN, priv->irq_enable); diff --git a/target/linux/generic/backport-5.15/790-v6.4-0007-net-dsa-mt7530-move-p5_intf_modes-function-to-mt7530.patch b/target/linux/generic/backport-5.15/790-v6.4-0007-net-dsa-mt7530-move-p5_intf_modes-function-to-mt7530.patch index 265cf1fda..2e1ed2e65 100644 --- a/target/linux/generic/backport-5.15/790-v6.4-0007-net-dsa-mt7530-move-p5_intf_modes-function-to-mt7530.patch +++ b/target/linux/generic/backport-5.15/790-v6.4-0007-net-dsa-mt7530-move-p5_intf_modes-function-to-mt7530.patch @@ -21,7 +21,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -951,6 +951,24 @@ mt7530_set_ageing_time(struct dsa_switch +@@ -965,6 +965,24 @@ mt7530_set_ageing_time(struct dsa_switch return 0; } @@ -48,7 +48,7 @@ Signed-off-by: David S. Miller struct mt7530_priv *priv = ds->priv; --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -714,24 +714,6 @@ enum p5_interface_select { +@@ -720,24 +720,6 @@ enum p5_interface_select { P5_INTF_SEL_GMAC5_SGMII, }; diff --git a/target/linux/generic/backport-5.15/790-v6.4-0008-net-dsa-mt7530-introduce-mt7530_probe_common-helper-.patch b/target/linux/generic/backport-5.15/790-v6.4-0008-net-dsa-mt7530-introduce-mt7530_probe_common-helper-.patch index 10e2c6a18..c9ff26ff2 100644 --- a/target/linux/generic/backport-5.15/790-v6.4-0008-net-dsa-mt7530-introduce-mt7530_probe_common-helper-.patch +++ b/target/linux/generic/backport-5.15/790-v6.4-0008-net-dsa-mt7530-introduce-mt7530_probe_common-helper-.patch @@ -17,7 +17,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3366,44 +3366,21 @@ static const struct of_device_id mt7530_ +@@ -3394,44 +3394,21 @@ static const struct of_device_id mt7530_ MODULE_DEVICE_TABLE(of, mt7530_of_match); static int @@ -67,7 +67,7 @@ Signed-off-by: David S. Miller if (!priv->info) return -EINVAL; -@@ -3417,23 +3394,53 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3445,23 +3422,53 @@ mt7530_probe(struct mdio_device *mdiodev return -EINVAL; priv->id = priv->info->id; @@ -131,7 +131,7 @@ Signed-off-by: David S. Miller priv->reset = devm_gpiod_get_optional(&mdiodev->dev, "reset", GPIOD_OUT_LOW); if (IS_ERR(priv->reset)) { -@@ -3442,12 +3449,15 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3470,12 +3477,15 @@ mt7530_probe(struct mdio_device *mdiodev } } diff --git a/target/linux/generic/backport-5.15/790-v6.4-0009-net-dsa-mt7530-introduce-mt7530_remove_common-helper.patch b/target/linux/generic/backport-5.15/790-v6.4-0009-net-dsa-mt7530-introduce-mt7530_remove_common-helper.patch index 4e754b100..7c1c80e7b 100644 --- a/target/linux/generic/backport-5.15/790-v6.4-0009-net-dsa-mt7530-introduce-mt7530_remove_common-helper.patch +++ b/target/linux/generic/backport-5.15/790-v6.4-0009-net-dsa-mt7530-introduce-mt7530_remove_common-helper.patch @@ -17,7 +17,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3484,6 +3484,17 @@ mt7530_probe(struct mdio_device *mdiodev +@@ -3512,6 +3512,17 @@ mt7530_probe(struct mdio_device *mdiodev } static void @@ -35,7 +35,7 @@ Signed-off-by: David S. Miller mt7530_remove(struct mdio_device *mdiodev) { struct mt7530_priv *priv = dev_get_drvdata(&mdiodev->dev); -@@ -3502,16 +3513,11 @@ mt7530_remove(struct mdio_device *mdiode +@@ -3530,16 +3541,11 @@ mt7530_remove(struct mdio_device *mdiode dev_err(priv->dev, "Failed to disable io pwr: %d\n", ret); diff --git a/target/linux/generic/backport-5.15/790-v6.4-0011-net-dsa-mt7530-introduce-separate-MDIO-driver.patch b/target/linux/generic/backport-5.15/790-v6.4-0011-net-dsa-mt7530-introduce-separate-MDIO-driver.patch index 15e1f1c98..84883147a 100644 --- a/target/linux/generic/backport-5.15/790-v6.4-0011-net-dsa-mt7530-introduce-separate-MDIO-driver.patch +++ b/target/linux/generic/backport-5.15/790-v6.4-0011-net-dsa-mt7530-introduce-separate-MDIO-driver.patch @@ -68,8 +68,8 @@ Signed-off-by: David S. Miller obj-$(CONFIG_NET_DSA_MT7530) += mt7530.o +obj-$(CONFIG_NET_DSA_MT7530_MDIO) += mt7530-mdio.o obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o - obj-$(CONFIG_NET_DSA_QCA8K) += qca8k.o obj-$(CONFIG_NET_DSA_REALTEK_SMI) += realtek-smi.o + realtek-smi-objs := realtek-smi-core.o rtl8366.o rtl8366rb.o --- /dev/null +++ b/drivers/net/dsa/mt7530-mdio.c @@ -0,0 +1,271 @@ @@ -416,7 +416,7 @@ Signed-off-by: David S. Miller static u32 mt7530_mii_read(struct mt7530_priv *priv, u32 reg) { -@@ -3164,72 +3115,6 @@ static const struct phylink_pcs_ops mt75 +@@ -3191,72 +3142,6 @@ static const struct phylink_pcs_ops mt75 .pcs_an_restart = mt7530_pcs_an_restart, }; @@ -489,7 +489,7 @@ Signed-off-by: David S. Miller static int mt753x_setup(struct dsa_switch *ds) { -@@ -3288,7 +3173,7 @@ static int mt753x_set_mac_eee(struct dsa +@@ -3315,7 +3200,7 @@ static int mt753x_set_mac_eee(struct dsa return 0; } @@ -497,8 +497,8 @@ Signed-off-by: David S. Miller +const struct dsa_switch_ops mt7530_switch_ops = { .get_tag_protocol = mtk_get_tag_protocol, .setup = mt753x_setup, - .get_strings = mt7530_get_strings, -@@ -3322,8 +3207,9 @@ static const struct dsa_switch_ops mt753 + .preferred_default_local_cpu_port = mt753x_preferred_default_local_cpu_port, +@@ -3350,8 +3235,9 @@ static const struct dsa_switch_ops mt753 .get_mac_eee = mt753x_get_mac_eee, .set_mac_eee = mt753x_set_mac_eee, }; @@ -509,7 +509,7 @@ Signed-off-by: David S. Miller [ID_MT7621] = { .id = ID_MT7621, .pcs_ops = &mt7530_pcs_ops, -@@ -3356,16 +3242,9 @@ static const struct mt753x_info mt753x_t +@@ -3384,16 +3270,9 @@ static const struct mt753x_info mt753x_t .mac_port_config = mt7531_mac_config, }, }; @@ -528,7 +528,7 @@ Signed-off-by: David S. Miller mt7530_probe_common(struct mt7530_priv *priv) { struct device *dev = priv->dev; -@@ -3402,88 +3281,9 @@ mt7530_probe_common(struct mt7530_priv * +@@ -3430,88 +3309,9 @@ mt7530_probe_common(struct mt7530_priv * return 0; } @@ -619,7 +619,7 @@ Signed-off-by: David S. Miller mt7530_remove_common(struct mt7530_priv *priv) { if (priv->irq) -@@ -3494,57 +3294,6 @@ mt7530_remove_common(struct mt7530_priv +@@ -3522,57 +3322,6 @@ mt7530_remove_common(struct mt7530_priv mutex_destroy(&priv->reg_mutex); } @@ -679,7 +679,7 @@ Signed-off-by: David S. Miller MODULE_LICENSE("GPL"); --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -839,4 +839,10 @@ static inline void INIT_MT7530_DUMMY_POL +@@ -845,4 +845,10 @@ static inline void INIT_MT7530_DUMMY_POL p->reg = reg; } diff --git a/target/linux/generic/backport-5.15/790-v6.4-0013-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch b/target/linux/generic/backport-5.15/790-v6.4-0013-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch index f5758f7a6..c8417091f 100644 --- a/target/linux/generic/backport-5.15/790-v6.4-0013-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch +++ b/target/linux/generic/backport-5.15/790-v6.4-0013-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch @@ -76,8 +76,8 @@ Signed-off-by: David S. Miller obj-$(CONFIG_NET_DSA_MT7530_MDIO) += mt7530-mdio.o +obj-$(CONFIG_NET_DSA_MT7530_MMIO) += mt7530-mmio.o obj-$(CONFIG_NET_DSA_MV88E6060) += mv88e6060.o - obj-$(CONFIG_NET_DSA_QCA8K) += qca8k.o obj-$(CONFIG_NET_DSA_REALTEK_SMI) += realtek-smi.o + realtek-smi-objs := realtek-smi-core.o rtl8366.o rtl8366rb.o --- /dev/null +++ b/drivers/net/dsa/mt7530-mmio.c @@ -0,0 +1,101 @@ @@ -184,7 +184,7 @@ Signed-off-by: David S. Miller +MODULE_LICENSE("GPL"); --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2198,6 +2198,47 @@ static const struct irq_domain_ops mt753 +@@ -2219,6 +2219,47 @@ static const struct irq_domain_ops mt753 }; static void @@ -232,7 +232,7 @@ Signed-off-by: David S. Miller mt7530_setup_mdio_irq(struct mt7530_priv *priv) { struct dsa_switch *ds = priv->ds; -@@ -2231,8 +2272,15 @@ mt7530_setup_irq(struct mt7530_priv *pri +@@ -2252,8 +2293,15 @@ mt7530_setup_irq(struct mt7530_priv *pri return priv->irq ? : -EINVAL; } @@ -250,7 +250,7 @@ Signed-off-by: David S. Miller if (!priv->irq_domain) { dev_err(dev, "failed to create IRQ domain\n"); return -ENOMEM; -@@ -2727,6 +2775,25 @@ static void mt7531_mac_port_get_caps(str +@@ -2754,6 +2802,25 @@ static void mt7531_mac_port_get_caps(str } } @@ -276,7 +276,7 @@ Signed-off-by: David S. Miller static int mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state) { -@@ -2803,6 +2870,17 @@ static bool mt753x_is_mac_port(u32 port) +@@ -2830,6 +2897,17 @@ static bool mt753x_is_mac_port(u32 port) } static int @@ -294,7 +294,7 @@ Signed-off-by: David S. Miller mt7531_mac_config(struct dsa_switch *ds, int port, unsigned int mode, phy_interface_t interface) { -@@ -2872,7 +2950,8 @@ mt753x_phylink_mac_config(struct dsa_swi +@@ -2899,7 +2977,8 @@ mt753x_phylink_mac_config(struct dsa_swi switch (port) { case 0 ... 4: /* Internal phy */ @@ -304,7 +304,7 @@ Signed-off-by: David S. Miller goto unsupported; break; case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */ -@@ -2950,7 +3029,8 @@ static void mt753x_phylink_mac_link_up(s +@@ -2977,7 +3056,8 @@ static void mt753x_phylink_mac_link_up(s /* MT753x MAC works in 1G full duplex mode for all up-clocked * variants. */ @@ -314,7 +314,7 @@ Signed-off-by: David S. Miller (phy_interface_mode_is_8023z(interface))) { speed = SPEED_1000; duplex = DUPLEX_FULL; -@@ -3030,6 +3110,21 @@ mt7531_cpu_port_config(struct dsa_switch +@@ -3057,6 +3137,21 @@ mt7531_cpu_port_config(struct dsa_switch return 0; } @@ -336,7 +336,7 @@ Signed-off-by: David S. Miller static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port, struct phylink_config *config) { -@@ -3175,6 +3270,27 @@ static int mt753x_set_mac_eee(struct dsa +@@ -3202,6 +3297,27 @@ static int mt753x_set_mac_eee(struct dsa return 0; } @@ -364,7 +364,7 @@ Signed-off-by: David S. Miller const struct dsa_switch_ops mt7530_switch_ops = { .get_tag_protocol = mtk_get_tag_protocol, .setup = mt753x_setup, -@@ -3243,6 +3359,17 @@ const struct mt753x_info mt753x_table[] +@@ -3271,6 +3387,17 @@ const struct mt753x_info mt753x_table[] .mac_port_get_caps = mt7531_mac_port_get_caps, .mac_port_config = mt7531_mac_config, }, @@ -392,9 +392,9 @@ Signed-off-by: David S. Miller }; #define NUM_TRGMII_CTRL 5 -@@ -54,11 +55,11 @@ enum mt753x_id { - #define MT7531_MIRROR_PORT_SET(x) (((x) & MIRROR_MASK) << 16) +@@ -59,11 +60,11 @@ enum mt753x_id { #define MT7531_CPU_PMAP_MASK GENMASK(7, 0) + #define MT7531_CPU_PMAP(x) FIELD_PREP(MT7531_CPU_PMAP_MASK, x) -#define MT753X_MIRROR_REG(id) (((id) == ID_MT7531) ? \ +#define MT753X_MIRROR_REG(id) ((((id) == ID_MT7531) || ((id) == ID_MT7988)) ? \ @@ -407,7 +407,7 @@ Signed-off-by: David S. Miller MT7531_MIRROR_MASK : MIRROR_MASK) /* Registers for BPDU and PAE frame control*/ -@@ -327,9 +328,8 @@ enum mt7530_vlan_port_acc_frm { +@@ -332,9 +333,8 @@ enum mt7530_vlan_port_acc_frm { MT7531_FORCE_DPX | \ MT7531_FORCE_RX_FC | \ MT7531_FORCE_TX_FC) diff --git a/target/linux/generic/backport-5.15/790-v6.4-0014-net-dsa-mt7530-fix-support-for-MT7531BE.patch b/target/linux/generic/backport-5.15/790-v6.4-0014-net-dsa-mt7530-fix-support-for-MT7531BE.patch index 49ac8d978..268964731 100644 --- a/target/linux/generic/backport-5.15/790-v6.4-0014-net-dsa-mt7530-fix-support-for-MT7531BE.patch +++ b/target/linux/generic/backport-5.15/790-v6.4-0014-net-dsa-mt7530-fix-support-for-MT7531BE.patch @@ -73,7 +73,7 @@ Signed-off-by: Jakub Kicinski } --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -3237,6 +3237,12 @@ mt753x_setup(struct dsa_switch *ds) +@@ -3264,6 +3264,12 @@ mt753x_setup(struct dsa_switch *ds) if (ret && priv->irq) mt7530_free_irq_common(priv); @@ -88,7 +88,7 @@ Signed-off-by: Jakub Kicinski --- a/drivers/net/dsa/mt7530.h +++ b/drivers/net/dsa/mt7530.h -@@ -773,10 +773,10 @@ struct mt753x_info { +@@ -779,10 +779,10 @@ struct mt753x_info { * registers * @p6_interface Holding the current port 6 interface * @p5_intf_sel: Holding the current port 5 interface select @@ -100,7 +100,7 @@ Signed-off-by: Jakub Kicinski */ struct mt7530_priv { struct device *dev; -@@ -795,7 +795,6 @@ struct mt7530_priv { +@@ -801,7 +801,6 @@ struct mt7530_priv { unsigned int p5_intf_sel; u8 mirror_rx; u8 mirror_tx; @@ -108,7 +108,7 @@ Signed-off-by: Jakub Kicinski struct mt7530_port ports[MT7530_NUM_PORTS]; struct mt753x_pcs pcs[MT7530_NUM_PORTS]; /* protect among processes for registers access*/ -@@ -803,6 +802,7 @@ struct mt7530_priv { +@@ -809,6 +808,7 @@ struct mt7530_priv { int irq; struct irq_domain *irq_domain; u32 irq_enable; diff --git a/target/linux/generic/backport-5.15/792-01-v6.0-net-phylink-disable-PCS-polling-over-major-configura.patch b/target/linux/generic/backport-5.15/792-01-v6.0-net-phylink-disable-PCS-polling-over-major-configura.patch new file mode 100644 index 000000000..f6ecf4b97 --- /dev/null +++ b/target/linux/generic/backport-5.15/792-01-v6.0-net-phylink-disable-PCS-polling-over-major-configura.patch @@ -0,0 +1,81 @@ +From bfac8c490d605bea03b1f1927582b6f396462164 Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Mon, 27 Jun 2022 12:44:43 +0100 +Subject: [PATCH] net: phylink: disable PCS polling over major configuration + +While we are performing a major configuration, there is no point having +the PCS polling timer running. Stop it before we begin preparing for +the configuration change, and restart it only once we've successfully +completed the change. + +Reviewed-by: Andrew Lunn +Signed-off-by: Russell King (Oracle) +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/phylink.c | 30 ++++++++++++++++++++---------- + 1 file changed, 20 insertions(+), 10 deletions(-) + +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -767,6 +767,18 @@ static void phylink_resolve_flow(struct + } + } + ++static void phylink_pcs_poll_stop(struct phylink *pl) ++{ ++ if (pl->cfg_link_an_mode == MLO_AN_INBAND) ++ del_timer(&pl->link_poll); ++} ++ ++static void phylink_pcs_poll_start(struct phylink *pl) ++{ ++ if (pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) ++ mod_timer(&pl->link_poll, jiffies + HZ); ++} ++ + static void phylink_mac_config(struct phylink *pl, + const struct phylink_link_state *state) + { +@@ -798,6 +810,7 @@ static void phylink_major_config(struct + const struct phylink_link_state *state) + { + struct phylink_pcs *pcs = NULL; ++ bool pcs_changed = false; + int err; + + phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); +@@ -810,8 +823,12 @@ static void phylink_major_config(struct + pcs); + return; + } ++ ++ pcs_changed = pcs && pl->pcs != pcs; + } + ++ phylink_pcs_poll_stop(pl); ++ + if (pl->mac_ops->mac_prepare) { + err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, + state->interface); +@@ -825,8 +842,10 @@ static void phylink_major_config(struct + /* If we have a new PCS, switch to the new PCS after preparing the MAC + * for the change. + */ +- if (pcs) +- phylink_set_pcs(pl, pcs); ++ if (pcs_changed) { ++ pl->pcs = pcs; ++ pl->pcs_ops = pcs->ops; ++ } + + phylink_mac_config(pl, state); + +@@ -852,6 +871,8 @@ static void phylink_major_config(struct + phylink_err(pl, "mac_finish failed: %pe\n", + ERR_PTR(err)); + } ++ ++ phylink_pcs_poll_start(pl); + } + + /* diff --git a/target/linux/generic/backport-5.15/792-02-v6.0-net-phylink-fix-NULL-pl-pcs-dereference-during-phyli.patch b/target/linux/generic/backport-5.15/792-02-v6.0-net-phylink-fix-NULL-pl-pcs-dereference-during-phyli.patch new file mode 100644 index 000000000..e5f282c5c --- /dev/null +++ b/target/linux/generic/backport-5.15/792-02-v6.0-net-phylink-fix-NULL-pl-pcs-dereference-during-phyli.patch @@ -0,0 +1,38 @@ +From b7d78b46d5e8dc77c656c13885d31e931923b915 Mon Sep 17 00:00:00 2001 +From: Vladimir Oltean +Date: Wed, 29 Jun 2022 22:33:58 +0300 +Subject: [PATCH] net: phylink: fix NULL pl->pcs dereference during + phylink_pcs_poll_start + +The current link mode of the phylink instance may not require an +attached PCS. However, phylink_major_config() unconditionally +dereferences this potentially NULL pointer when restarting the link poll +timer, which will panic the kernel. + +Fix the problem by checking whether a PCS exists in phylink_pcs_poll_start(), +otherwise do nothing. The code prior to the blamed patch also only +looked at pcs->poll within an "if (pcs)" block. + +Fixes: bfac8c490d60 ("net: phylink: disable PCS polling over major configuration") +Signed-off-by: Vladimir Oltean +Reviewed-by: Russell King (Oracle) +Tested-by: Gerhard Engleder +Tested-by: Michael Walle # on kontron-kbox-a-230-ls +Tested-by: Nicolas Ferre # on sam9x60ek +Link: https://lore.kernel.org/r/20220629193358.4007923-1-vladimir.oltean@nxp.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/phylink.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -775,7 +775,7 @@ static void phylink_pcs_poll_stop(struct + + static void phylink_pcs_poll_start(struct phylink *pl) + { +- if (pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) ++ if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) + mod_timer(&pl->link_poll, jiffies + HZ); + } + diff --git a/target/linux/generic/backport-5.15/792-03-v6.6-net-phylink-add-pcs_enable-pcs_disable-methods.patch b/target/linux/generic/backport-5.15/792-03-v6.6-net-phylink-add-pcs_enable-pcs_disable-methods.patch new file mode 100644 index 000000000..1c936767d --- /dev/null +++ b/target/linux/generic/backport-5.15/792-03-v6.6-net-phylink-add-pcs_enable-pcs_disable-methods.patch @@ -0,0 +1,172 @@ +From 90ef0a7b0622c62758b2638604927867775479ea Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Thu, 13 Jul 2023 09:42:07 +0100 +Subject: [PATCH] net: phylink: add pcs_enable()/pcs_disable() methods + +Add phylink PCS enable/disable callbacks that will allow us to place +IEEE 802.3 register compliant PCS in power-down mode while not being +used. + +Signed-off-by: Russell King (Oracle) +Signed-off-by: David S. Miller +--- + drivers/net/phy/phylink.c | 48 +++++++++++++++++++++++++++++++-------- + include/linux/phylink.h | 16 +++++++++++++ + 2 files changed, 55 insertions(+), 9 deletions(-) + +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -34,6 +34,10 @@ enum { + PHYLINK_DISABLE_STOPPED, + PHYLINK_DISABLE_LINK, + PHYLINK_DISABLE_MAC_WOL, ++ ++ PCS_STATE_DOWN = 0, ++ PCS_STATE_STARTING, ++ PCS_STATE_STARTED, + }; + + /** +@@ -72,6 +76,7 @@ struct phylink { + struct mutex state_mutex; + struct phylink_link_state phy_state; + struct work_struct resolve; ++ unsigned int pcs_state; + + bool mac_link_dropped; + bool using_mac_select_pcs; +@@ -806,6 +811,22 @@ static void phylink_mac_pcs_an_restart(s + } + } + ++static void phylink_pcs_disable(struct phylink_pcs *pcs) ++{ ++ if (pcs && pcs->ops->pcs_disable) ++ pcs->ops->pcs_disable(pcs); ++} ++ ++static int phylink_pcs_enable(struct phylink_pcs *pcs) ++{ ++ int err = 0; ++ ++ if (pcs && pcs->ops->pcs_enable) ++ err = pcs->ops->pcs_enable(pcs); ++ ++ return err; ++} ++ + static void phylink_major_config(struct phylink *pl, bool restart, + const struct phylink_link_state *state) + { +@@ -843,12 +864,16 @@ static void phylink_major_config(struct + * for the change. + */ + if (pcs_changed) { ++ phylink_pcs_disable(pl->pcs); + pl->pcs = pcs; + pl->pcs_ops = pcs->ops; + } + + phylink_mac_config(pl, state); + ++ if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) ++ phylink_pcs_enable(pl->pcs); ++ + if (pl->pcs_ops) { + err = pl->pcs_ops->pcs_config(pl->pcs, pl->cur_link_an_mode, + state->interface, +@@ -1272,6 +1297,7 @@ struct phylink *phylink_create(struct ph + pl->link_config.speed = SPEED_UNKNOWN; + pl->link_config.duplex = DUPLEX_UNKNOWN; + pl->link_config.an_enabled = true; ++ pl->pcs_state = PCS_STATE_DOWN; + pl->mac_ops = mac_ops; + __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); + timer_setup(&pl->link_poll, phylink_fixed_poll, 0); +@@ -1663,6 +1689,8 @@ void phylink_start(struct phylink *pl) + if (pl->netdev) + netif_carrier_off(pl->netdev); + ++ pl->pcs_state = PCS_STATE_STARTING; ++ + /* Apply the link configuration to the MAC when starting. This allows + * a fixed-link to start with the correct parameters, and also + * ensures that we set the appropriate advertisement for Serdes links. +@@ -1673,6 +1701,8 @@ void phylink_start(struct phylink *pl) + */ + phylink_mac_initial_config(pl, true); + ++ pl->pcs_state = PCS_STATE_STARTED; ++ + clear_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); + phylink_run_resolve(pl); + +@@ -1692,16 +1722,9 @@ void phylink_start(struct phylink *pl) + poll = true; + } + +- switch (pl->cfg_link_an_mode) { +- case MLO_AN_FIXED: ++ if (pl->cfg_link_an_mode == MLO_AN_FIXED) + poll |= pl->config->poll_fixed_state; +- break; +- case MLO_AN_INBAND: +- poll |= pl->config->pcs_poll; +- if (pl->pcs) +- poll |= pl->pcs->poll; +- break; +- } ++ + if (poll) + mod_timer(&pl->link_poll, jiffies + HZ); + if (pl->phydev) +@@ -1738,6 +1761,10 @@ void phylink_stop(struct phylink *pl) + } + + phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); ++ ++ pl->pcs_state = PCS_STATE_DOWN; ++ ++ phylink_pcs_disable(pl->pcs); + } + EXPORT_SYMBOL_GPL(phylink_stop); + +--- a/include/linux/phylink.h ++++ b/include/linux/phylink.h +@@ -419,6 +419,8 @@ struct phylink_pcs { + /** + * struct phylink_pcs_ops - MAC PCS operations structure. + * @pcs_validate: validate the link configuration. ++ * @pcs_enable: enable the PCS. ++ * @pcs_disable: disable the PCS. + * @pcs_get_state: read the current MAC PCS link state from the hardware. + * @pcs_config: configure the MAC PCS for the selected mode and state. + * @pcs_an_restart: restart 802.3z BaseX autonegotiation. +@@ -428,6 +430,8 @@ struct phylink_pcs { + struct phylink_pcs_ops { + int (*pcs_validate)(struct phylink_pcs *pcs, unsigned long *supported, + const struct phylink_link_state *state); ++ int (*pcs_enable)(struct phylink_pcs *pcs); ++ void (*pcs_disable)(struct phylink_pcs *pcs); + void (*pcs_get_state)(struct phylink_pcs *pcs, + struct phylink_link_state *state); + int (*pcs_config)(struct phylink_pcs *pcs, unsigned int mode, +@@ -458,6 +462,18 @@ int pcs_validate(struct phylink_pcs *pcs + const struct phylink_link_state *state); + + /** ++ * pcs_enable() - enable the PCS. ++ * @pcs: a pointer to a &struct phylink_pcs. ++ */ ++int pcs_enable(struct phylink_pcs *pcs); ++ ++/** ++ * pcs_disable() - disable the PCS. ++ * @pcs: a pointer to a &struct phylink_pcs. ++ */ ++void pcs_disable(struct phylink_pcs *pcs); ++ ++/** + * pcs_get_state() - Read the current inband link state from the hardware + * @pcs: a pointer to a &struct phylink_pcs. + * @state: a pointer to a &struct phylink_link_state. diff --git a/target/linux/generic/backport-5.15/793-v6.6-net-pcs-lynxi-implement-pcs_disable-op.patch b/target/linux/generic/backport-5.15/793-v6.6-net-pcs-lynxi-implement-pcs_disable-op.patch new file mode 100644 index 000000000..eb9b4b7c0 --- /dev/null +++ b/target/linux/generic/backport-5.15/793-v6.6-net-pcs-lynxi-implement-pcs_disable-op.patch @@ -0,0 +1,44 @@ +From e4ccdfb78a47132f2d215658aab8902fc457c4b4 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Fri, 18 Aug 2023 04:07:46 +0100 +Subject: [PATCH 082/125] net: pcs: lynxi: implement pcs_disable op + +When switching from 10GBase-R/5GBase-R/USXGMII to one of the interface +modes provided by mtk-pcs-lynxi we need to make sure to always perform +a full configuration of the PHYA. + +Implement pcs_disable op which resets the stored interface mode to +PHY_INTERFACE_MODE_NA to trigger a full reconfiguration once the LynxI +PCS driver had previously been deselected in favor of another PCS +driver such as the to-be-added driver for the USXGMII PCS found in +MT7988. + +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/f23d1a60d2c9d2fb72e32dcb0eaa5f7e867a3d68.1692327891.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/pcs/pcs-mtk-lynxi.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/net/pcs/pcs-mtk-lynxi.c ++++ b/drivers/net/pcs/pcs-mtk-lynxi.c +@@ -241,11 +241,19 @@ static void mtk_pcs_lynxi_link_up(struct + } + } + ++static void mtk_pcs_lynxi_disable(struct phylink_pcs *pcs) ++{ ++ struct mtk_pcs_lynxi *mpcs = pcs_to_mtk_pcs_lynxi(pcs); ++ ++ mpcs->interface = PHY_INTERFACE_MODE_NA; ++} ++ + static const struct phylink_pcs_ops mtk_pcs_lynxi_ops = { + .pcs_get_state = mtk_pcs_lynxi_get_state, + .pcs_config = mtk_pcs_lynxi_config, + .pcs_an_restart = mtk_pcs_lynxi_restart_an, + .pcs_link_up = mtk_pcs_lynxi_link_up, ++ .pcs_disable = mtk_pcs_lynxi_disable, + }; + + struct phylink_pcs *mtk_pcs_lynxi_create(struct device *dev, diff --git a/target/linux/generic/backport-5.15/797-v5.17-net-usb-ax88179_178a-add-TSO-feature.patch b/target/linux/generic/backport-5.15/797-v5.17-net-usb-ax88179_178a-add-TSO-feature.patch index 698e524c3..b2af169b9 100644 --- a/target/linux/generic/backport-5.15/797-v5.17-net-usb-ax88179_178a-add-TSO-feature.patch +++ b/target/linux/generic/backport-5.15/797-v5.17-net-usb-ax88179_178a-add-TSO-feature.patch @@ -35,7 +35,7 @@ Signed-off-by: David S. Miller ax88179_reset(dev); -@@ -1507,17 +1508,19 @@ ax88179_tx_fixup(struct usbnet *dev, str +@@ -1502,17 +1503,19 @@ ax88179_tx_fixup(struct usbnet *dev, str { u32 tx_hdr1, tx_hdr2; int frame_size = dev->maxpacket; @@ -57,7 +57,7 @@ Signed-off-by: David S. Miller if ((skb_header_cloned(skb) || headroom < 0) && pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) { dev_kfree_skb_any(skb); -@@ -1528,6 +1531,8 @@ ax88179_tx_fixup(struct usbnet *dev, str +@@ -1523,6 +1526,8 @@ ax88179_tx_fixup(struct usbnet *dev, str put_unaligned_le32(tx_hdr1, ptr); put_unaligned_le32(tx_hdr2, ptr + 4); diff --git a/target/linux/generic/backport-5.15/814-v6.3-leds-Move-led_init_default_state_get-to-the-global-h.patch b/target/linux/generic/backport-5.15/814-v6.3-leds-Move-led_init_default_state_get-to-the-global-h.patch new file mode 100644 index 000000000..592111fb9 --- /dev/null +++ b/target/linux/generic/backport-5.15/814-v6.3-leds-Move-led_init_default_state_get-to-the-global-h.patch @@ -0,0 +1,39 @@ +From 156a5bb89ca6f3edd2be0bfd0de15e575442927e Mon Sep 17 00:00:00 2001 +From: Andy Shevchenko +Date: Tue, 3 Jan 2023 15:12:47 +0200 +Subject: [PATCH] leds: Move led_init_default_state_get() to the global header + +There are users inside and outside LED framework that have implemented +a local copy of led_init_default_state_get(). In order to deduplicate +that, as the first step move the declaration from LED header to the +global one. + +Signed-off-by: Andy Shevchenko +Signed-off-by: Lee Jones +Link: https://lore.kernel.org/r/20230103131256.33894-3-andriy.shevchenko@linux.intel.com +--- + drivers/leds/leds.h | 1 - + include/linux/leds.h | 2 ++ + 2 files changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/leds/leds.h ++++ b/drivers/leds/leds.h +@@ -27,7 +27,6 @@ ssize_t led_trigger_read(struct file *fi + ssize_t led_trigger_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, char *buf, + loff_t pos, size_t count); +-enum led_default_state led_init_default_state_get(struct fwnode_handle *fwnode); + + extern struct rw_semaphore leds_list_lock; + extern struct list_head leds_list; +--- a/include/linux/leds.h ++++ b/include/linux/leds.h +@@ -63,6 +63,8 @@ struct led_init_data { + bool devname_mandatory; + }; + ++enum led_default_state led_init_default_state_get(struct fwnode_handle *fwnode); ++ + struct led_hw_trigger_type { + int dummy; + }; diff --git a/target/linux/generic/backport-5.15/815-v6.4-01-net-dsa-qca8k-move-qca8k_port_to_phy-to-header.patch b/target/linux/generic/backport-5.15/815-v6.4-01-net-dsa-qca8k-move-qca8k_port_to_phy-to-header.patch new file mode 100644 index 000000000..9fadade05 --- /dev/null +++ b/target/linux/generic/backport-5.15/815-v6.4-01-net-dsa-qca8k-move-qca8k_port_to_phy-to-header.patch @@ -0,0 +1,67 @@ +From 3e8b4d6277fd19d98c817576954dd6a4ff3caa2b Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 17 Apr 2023 17:17:23 +0200 +Subject: [PATCH 1/9] net: dsa: qca8k: move qca8k_port_to_phy() to header + +Move qca8k_port_to_phy() to qca8k header as it's useful for future +reference in Switch LEDs module since the same logic is applied to get +the right index of the switch port. +Make it inline as it's simple function that just decrease the port. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Reviewed-by: Michal Kubiak +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 15 --------------- + drivers/net/dsa/qca/qca8k.h | 14 ++++++++++++++ + 2 files changed, 14 insertions(+), 15 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -633,21 +633,6 @@ err_clear_skb: + return ret; + } + +-static u32 +-qca8k_port_to_phy(int port) +-{ +- /* From Andrew Lunn: +- * Port 0 has no internal phy. +- * Port 1 has an internal PHY at MDIO address 0. +- * Port 2 has an internal PHY at MDIO address 1. +- * ... +- * Port 5 has an internal PHY at MDIO address 4. +- * Port 6 has no internal PHY. +- */ +- +- return port - 1; +-} +- + static int + qca8k_mdio_busy_wait(struct mii_bus *bus, u32 reg, u32 mask) + { +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -419,6 +419,20 @@ struct qca8k_fdb { + u8 mac[6]; + }; + ++static inline u32 qca8k_port_to_phy(int port) ++{ ++ /* From Andrew Lunn: ++ * Port 0 has no internal phy. ++ * Port 1 has an internal PHY at MDIO address 0. ++ * Port 2 has an internal PHY at MDIO address 1. ++ * ... ++ * Port 5 has an internal PHY at MDIO address 4. ++ * Port 6 has no internal PHY. ++ */ ++ ++ return port - 1; ++} ++ + /* Common setup function */ + extern const struct qca8k_mib_desc ar8327_mib[]; + extern const struct regmap_access_table qca8k_readable_table; diff --git a/target/linux/generic/backport-5.15/815-v6.4-02-net-dsa-qca8k-add-LEDs-basic-support.patch b/target/linux/generic/backport-5.15/815-v6.4-02-net-dsa-qca8k-add-LEDs-basic-support.patch new file mode 100644 index 000000000..cf57ad016 --- /dev/null +++ b/target/linux/generic/backport-5.15/815-v6.4-02-net-dsa-qca8k-add-LEDs-basic-support.patch @@ -0,0 +1,435 @@ +From 1e264f9d2918b5737023c44a23ae04def1095210 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 17 Apr 2023 17:17:24 +0200 +Subject: [PATCH 2/9] net: dsa: qca8k: add LEDs basic support + +Add LEDs basic support for qca8k Switch Family by adding basic +brightness_set() support. + +Since these LEDs refelect port status, the default label is set to +":port". DT binding should describe the color and function of the +LEDs using standard LEDs api. +Each LED always have the device name as prefix. The device name is +composed from the mii bus id and the PHY addr resulting in example +names like: +- qca8k-0.0:00:amber:lan +- qca8k-0.0:00:white:lan +- qca8k-0.0:01:amber:lan +- qca8k-0.0:01:white:lan + +These LEDs supports only blocking variant of the brightness_set() +function since they can sleep during access of the switch leds to set +the brightness. + +While at it add to the qca8k header file each mode defined by the Switch +Documentation for future use. + +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca/Kconfig | 8 ++ + drivers/net/dsa/qca/Makefile | 3 + + drivers/net/dsa/qca/qca8k-8xxx.c | 5 + + drivers/net/dsa/qca/qca8k-leds.c | 239 +++++++++++++++++++++++++++++++ + drivers/net/dsa/qca/qca8k.h | 60 ++++++++ + drivers/net/dsa/qca/qca8k_leds.h | 16 +++ + 6 files changed, 331 insertions(+) + create mode 100644 drivers/net/dsa/qca/qca8k-leds.c + create mode 100644 drivers/net/dsa/qca/qca8k_leds.h + +--- a/drivers/net/dsa/qca/Kconfig ++++ b/drivers/net/dsa/qca/Kconfig +@@ -15,3 +15,11 @@ config NET_DSA_QCA8K + help + This enables support for the Qualcomm Atheros QCA8K Ethernet + switch chips. ++ ++config NET_DSA_QCA8K_LEDS_SUPPORT ++ bool "Qualcomm Atheros QCA8K Ethernet switch family LEDs support" ++ depends on NET_DSA_QCA8K ++ depends on LEDS_CLASS ++ help ++ This enabled support for LEDs present on the Qualcomm Atheros ++ QCA8K Ethernet switch chips. +--- a/drivers/net/dsa/qca/Makefile ++++ b/drivers/net/dsa/qca/Makefile +@@ -2,3 +2,6 @@ + obj-$(CONFIG_NET_DSA_AR9331) += ar9331.o + obj-$(CONFIG_NET_DSA_QCA8K) += qca8k.o + qca8k-y += qca8k-common.o qca8k-8xxx.o ++ifdef CONFIG_NET_DSA_QCA8K_LEDS_SUPPORT ++qca8k-y += qca8k-leds.o ++endif +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -22,6 +22,7 @@ + #include + + #include "qca8k.h" ++#include "qca8k_leds.h" + + static void + qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page) +@@ -1102,6 +1103,10 @@ qca8k_setup(struct dsa_switch *ds) + if (ret) + return ret; + ++ ret = qca8k_setup_led_ctrl(priv); ++ if (ret) ++ return ret; ++ + /* Make sure MAC06 is disabled */ + ret = regmap_clear_bits(priv->regmap, QCA8K_REG_PORT0_PAD_CTRL, + QCA8K_PORT0_PAD_MAC06_EXCHANGE_EN); +--- /dev/null ++++ b/drivers/net/dsa/qca/qca8k-leds.c +@@ -0,0 +1,239 @@ ++// SPDX-License-Identifier: GPL-2.0 ++#include ++#include ++ ++#include "qca8k.h" ++#include "qca8k_leds.h" ++ ++static int ++qca8k_get_enable_led_reg(int port_num, int led_num, struct qca8k_led_pattern_en *reg_info) ++{ ++ switch (port_num) { ++ case 0: ++ reg_info->reg = QCA8K_LED_CTRL_REG(led_num); ++ reg_info->shift = QCA8K_LED_PHY0123_CONTROL_RULE_SHIFT; ++ break; ++ case 1: ++ case 2: ++ case 3: ++ /* Port 123 are controlled on a different reg */ ++ reg_info->reg = QCA8K_LED_CTRL3_REG; ++ reg_info->shift = QCA8K_LED_PHY123_PATTERN_EN_SHIFT(port_num, led_num); ++ break; ++ case 4: ++ reg_info->reg = QCA8K_LED_CTRL_REG(led_num); ++ reg_info->shift = QCA8K_LED_PHY4_CONTROL_RULE_SHIFT; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int ++qca8k_led_brightness_set(struct qca8k_led *led, ++ enum led_brightness brightness) ++{ ++ struct qca8k_led_pattern_en reg_info; ++ struct qca8k_priv *priv = led->priv; ++ u32 mask, val; ++ ++ qca8k_get_enable_led_reg(led->port_num, led->led_num, ®_info); ++ ++ val = QCA8K_LED_ALWAYS_OFF; ++ if (brightness) ++ val = QCA8K_LED_ALWAYS_ON; ++ ++ /* HW regs to control brightness is special and port 1-2-3 ++ * are placed in a different reg. ++ * ++ * To control port 0 brightness: ++ * - the 2 bit (15, 14) of: ++ * - QCA8K_LED_CTRL0_REG for led1 ++ * - QCA8K_LED_CTRL1_REG for led2 ++ * - QCA8K_LED_CTRL2_REG for led3 ++ * ++ * To control port 4: ++ * - the 2 bit (31, 30) of: ++ * - QCA8K_LED_CTRL0_REG for led1 ++ * - QCA8K_LED_CTRL1_REG for led2 ++ * - QCA8K_LED_CTRL2_REG for led3 ++ * ++ * To control port 1: ++ * - the 2 bit at (9, 8) of QCA8K_LED_CTRL3_REG are used for led1 ++ * - the 2 bit at (11, 10) of QCA8K_LED_CTRL3_REG are used for led2 ++ * - the 2 bit at (13, 12) of QCA8K_LED_CTRL3_REG are used for led3 ++ * ++ * To control port 2: ++ * - the 2 bit at (15, 14) of QCA8K_LED_CTRL3_REG are used for led1 ++ * - the 2 bit at (17, 16) of QCA8K_LED_CTRL3_REG are used for led2 ++ * - the 2 bit at (19, 18) of QCA8K_LED_CTRL3_REG are used for led3 ++ * ++ * To control port 3: ++ * - the 2 bit at (21, 20) of QCA8K_LED_CTRL3_REG are used for led1 ++ * - the 2 bit at (23, 22) of QCA8K_LED_CTRL3_REG are used for led2 ++ * - the 2 bit at (25, 24) of QCA8K_LED_CTRL3_REG are used for led3 ++ * ++ * To abstract this and have less code, we use the port and led numm ++ * to calculate the shift and the correct reg due to this problem of ++ * not having a 1:1 map of LED with the regs. ++ */ ++ if (led->port_num == 0 || led->port_num == 4) { ++ mask = QCA8K_LED_PATTERN_EN_MASK; ++ val <<= QCA8K_LED_PATTERN_EN_SHIFT; ++ } else { ++ mask = QCA8K_LED_PHY123_PATTERN_EN_MASK; ++ } ++ ++ return regmap_update_bits(priv->regmap, reg_info.reg, ++ mask << reg_info.shift, ++ val << reg_info.shift); ++} ++ ++static int ++qca8k_cled_brightness_set_blocking(struct led_classdev *ldev, ++ enum led_brightness brightness) ++{ ++ struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev); ++ ++ return qca8k_led_brightness_set(led, brightness); ++} ++ ++static enum led_brightness ++qca8k_led_brightness_get(struct qca8k_led *led) ++{ ++ struct qca8k_led_pattern_en reg_info; ++ struct qca8k_priv *priv = led->priv; ++ u32 val; ++ int ret; ++ ++ qca8k_get_enable_led_reg(led->port_num, led->led_num, ®_info); ++ ++ ret = regmap_read(priv->regmap, reg_info.reg, &val); ++ if (ret) ++ return 0; ++ ++ val >>= reg_info.shift; ++ ++ if (led->port_num == 0 || led->port_num == 4) { ++ val &= QCA8K_LED_PATTERN_EN_MASK; ++ val >>= QCA8K_LED_PATTERN_EN_SHIFT; ++ } else { ++ val &= QCA8K_LED_PHY123_PATTERN_EN_MASK; ++ } ++ ++ /* Assume brightness ON only when the LED is set to always ON */ ++ return val == QCA8K_LED_ALWAYS_ON; ++} ++ ++static int ++qca8k_parse_port_leds(struct qca8k_priv *priv, struct fwnode_handle *port, int port_num) ++{ ++ struct fwnode_handle *led = NULL, *leds = NULL; ++ struct led_init_data init_data = { }; ++ struct dsa_switch *ds = priv->ds; ++ enum led_default_state state; ++ struct qca8k_led *port_led; ++ int led_num, led_index; ++ int ret; ++ ++ leds = fwnode_get_named_child_node(port, "leds"); ++ if (!leds) { ++ dev_dbg(priv->dev, "No Leds node specified in device tree for port %d!\n", ++ port_num); ++ return 0; ++ } ++ ++ fwnode_for_each_child_node(leds, led) { ++ /* Reg represent the led number of the port. ++ * Each port can have at most 3 leds attached ++ * Commonly: ++ * 1. is gigabit led ++ * 2. is mbit led ++ * 3. additional status led ++ */ ++ if (fwnode_property_read_u32(led, "reg", &led_num)) ++ continue; ++ ++ if (led_num >= QCA8K_LED_PORT_COUNT) { ++ dev_warn(priv->dev, "Invalid LED reg %d defined for port %d", ++ led_num, port_num); ++ continue; ++ } ++ ++ led_index = QCA8K_LED_PORT_INDEX(port_num, led_num); ++ ++ port_led = &priv->ports_led[led_index]; ++ port_led->port_num = port_num; ++ port_led->led_num = led_num; ++ port_led->priv = priv; ++ ++ state = led_init_default_state_get(led); ++ switch (state) { ++ case LEDS_DEFSTATE_ON: ++ port_led->cdev.brightness = 1; ++ qca8k_led_brightness_set(port_led, 1); ++ break; ++ case LEDS_DEFSTATE_KEEP: ++ port_led->cdev.brightness = ++ qca8k_led_brightness_get(port_led); ++ break; ++ default: ++ port_led->cdev.brightness = 0; ++ qca8k_led_brightness_set(port_led, 0); ++ } ++ ++ port_led->cdev.max_brightness = 1; ++ port_led->cdev.brightness_set_blocking = qca8k_cled_brightness_set_blocking; ++ init_data.default_label = ":port"; ++ init_data.fwnode = led; ++ init_data.devname_mandatory = true; ++ init_data.devicename = kasprintf(GFP_KERNEL, "%s:0%d", ds->slave_mii_bus->id, ++ port_num); ++ if (!init_data.devicename) ++ return -ENOMEM; ++ ++ ret = devm_led_classdev_register_ext(priv->dev, &port_led->cdev, &init_data); ++ if (ret) ++ dev_warn(priv->dev, "Failed to init LED %d for port %d", led_num, port_num); ++ ++ kfree(init_data.devicename); ++ } ++ ++ return 0; ++} ++ ++int ++qca8k_setup_led_ctrl(struct qca8k_priv *priv) ++{ ++ struct fwnode_handle *ports, *port; ++ int port_num; ++ int ret; ++ ++ ports = device_get_named_child_node(priv->dev, "ports"); ++ if (!ports) { ++ dev_info(priv->dev, "No ports node specified in device tree!"); ++ return 0; ++ } ++ ++ fwnode_for_each_child_node(ports, port) { ++ if (fwnode_property_read_u32(port, "reg", &port_num)) ++ continue; ++ ++ /* Skip checking for CPU port 0 and CPU port 6 as not supported */ ++ if (port_num == 0 || port_num == 6) ++ continue; ++ ++ /* Each port can have at most 3 different leds attached. ++ * Switch port starts from 0 to 6, but port 0 and 6 are CPU ++ * port. The port index needs to be decreased by one to identify ++ * the correct port for LED setup. ++ */ ++ ret = qca8k_parse_port_leds(priv, port, qca8k_port_to_phy(port_num)); ++ if (ret) ++ return ret; ++ } ++ ++ return 0; ++} +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + + #define QCA8K_ETHERNET_MDIO_PRIORITY 7 +@@ -85,6 +86,51 @@ + #define QCA8K_MDIO_MASTER_DATA(x) FIELD_PREP(QCA8K_MDIO_MASTER_DATA_MASK, x) + #define QCA8K_MDIO_MASTER_MAX_PORTS 5 + #define QCA8K_MDIO_MASTER_MAX_REG 32 ++ ++/* LED control register */ ++#define QCA8K_LED_PORT_COUNT 3 ++#define QCA8K_LED_COUNT ((QCA8K_NUM_PORTS - QCA8K_NUM_CPU_PORTS) * QCA8K_LED_PORT_COUNT) ++#define QCA8K_LED_RULE_COUNT 6 ++#define QCA8K_LED_RULE_MAX 11 ++#define QCA8K_LED_PORT_INDEX(_phy, _led) (((_phy) * QCA8K_LED_PORT_COUNT) + (_led)) ++ ++#define QCA8K_LED_PHY123_PATTERN_EN_SHIFT(_phy, _led) ((((_phy) - 1) * 6) + 8 + (2 * (_led))) ++#define QCA8K_LED_PHY123_PATTERN_EN_MASK GENMASK(1, 0) ++ ++#define QCA8K_LED_PHY0123_CONTROL_RULE_SHIFT 0 ++#define QCA8K_LED_PHY4_CONTROL_RULE_SHIFT 16 ++ ++#define QCA8K_LED_CTRL_REG(_i) (0x050 + (_i) * 4) ++#define QCA8K_LED_CTRL0_REG 0x50 ++#define QCA8K_LED_CTRL1_REG 0x54 ++#define QCA8K_LED_CTRL2_REG 0x58 ++#define QCA8K_LED_CTRL3_REG 0x5C ++#define QCA8K_LED_CTRL_SHIFT(_i) (((_i) % 2) * 16) ++#define QCA8K_LED_CTRL_MASK GENMASK(15, 0) ++#define QCA8K_LED_RULE_MASK GENMASK(13, 0) ++#define QCA8K_LED_BLINK_FREQ_MASK GENMASK(1, 0) ++#define QCA8K_LED_BLINK_FREQ_SHITF 0 ++#define QCA8K_LED_BLINK_2HZ 0 ++#define QCA8K_LED_BLINK_4HZ 1 ++#define QCA8K_LED_BLINK_8HZ 2 ++#define QCA8K_LED_BLINK_AUTO 3 ++#define QCA8K_LED_LINKUP_OVER_MASK BIT(2) ++#define QCA8K_LED_TX_BLINK_MASK BIT(4) ++#define QCA8K_LED_RX_BLINK_MASK BIT(5) ++#define QCA8K_LED_COL_BLINK_MASK BIT(7) ++#define QCA8K_LED_LINK_10M_EN_MASK BIT(8) ++#define QCA8K_LED_LINK_100M_EN_MASK BIT(9) ++#define QCA8K_LED_LINK_1000M_EN_MASK BIT(10) ++#define QCA8K_LED_POWER_ON_LIGHT_MASK BIT(11) ++#define QCA8K_LED_HALF_DUPLEX_MASK BIT(12) ++#define QCA8K_LED_FULL_DUPLEX_MASK BIT(13) ++#define QCA8K_LED_PATTERN_EN_MASK GENMASK(15, 14) ++#define QCA8K_LED_PATTERN_EN_SHIFT 14 ++#define QCA8K_LED_ALWAYS_OFF 0 ++#define QCA8K_LED_ALWAYS_BLINK_4HZ 1 ++#define QCA8K_LED_ALWAYS_ON 2 ++#define QCA8K_LED_RULE_CONTROLLED 3 ++ + #define QCA8K_GOL_MAC_ADDR0 0x60 + #define QCA8K_GOL_MAC_ADDR1 0x64 + #define QCA8K_MAX_FRAME_SIZE 0x78 +@@ -382,6 +428,19 @@ struct qca8k_mdio_cache { + u16 hi; + }; + ++struct qca8k_led_pattern_en { ++ u32 reg; ++ u8 shift; ++}; ++ ++struct qca8k_led { ++ u8 port_num; ++ u8 led_num; ++ u16 old_rule; ++ struct qca8k_priv *priv; ++ struct led_classdev cdev; ++}; ++ + struct qca8k_priv { + u8 switch_id; + u8 switch_revision; +@@ -404,6 +463,7 @@ struct qca8k_priv { + struct qca8k_mib_eth_data mib_eth_data; + struct qca8k_mdio_cache mdio_cache; + const struct qca8k_match_data *info; ++ struct qca8k_led ports_led[QCA8K_LED_COUNT]; + }; + + struct qca8k_mib_desc { +--- /dev/null ++++ b/drivers/net/dsa/qca/qca8k_leds.h +@@ -0,0 +1,16 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#ifndef __QCA8K_LEDS_H ++#define __QCA8K_LEDS_H ++ ++/* Leds Support function */ ++#ifdef CONFIG_NET_DSA_QCA8K_LEDS_SUPPORT ++int qca8k_setup_led_ctrl(struct qca8k_priv *priv); ++#else ++static inline int qca8k_setup_led_ctrl(struct qca8k_priv *priv) ++{ ++ return 0; ++} ++#endif ++ ++#endif /* __QCA8K_LEDS_H */ diff --git a/target/linux/generic/backport-5.15/815-v6.4-03-net-dsa-qca8k-add-LEDs-blink_set-support.patch b/target/linux/generic/backport-5.15/815-v6.4-03-net-dsa-qca8k-add-LEDs-blink_set-support.patch new file mode 100644 index 000000000..231c4156d --- /dev/null +++ b/target/linux/generic/backport-5.15/815-v6.4-03-net-dsa-qca8k-add-LEDs-blink_set-support.patch @@ -0,0 +1,74 @@ +From 91acadcc6e599dfc62717abcdad58a459cfb1684 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 17 Apr 2023 17:17:25 +0200 +Subject: [PATCH 3/9] net: dsa: qca8k: add LEDs blink_set() support + +Add LEDs blink_set() support to qca8k Switch Family. +These LEDs support hw accellerated blinking at a fixed rate +of 4Hz. + +Reject any other value since not supported by the LEDs switch. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Acked-by: Pavel Machek +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca/qca8k-leds.c | 38 ++++++++++++++++++++++++++++++++ + 1 file changed, 38 insertions(+) + +--- a/drivers/net/dsa/qca/qca8k-leds.c ++++ b/drivers/net/dsa/qca/qca8k-leds.c +@@ -128,6 +128,43 @@ qca8k_led_brightness_get(struct qca8k_le + } + + static int ++qca8k_cled_blink_set(struct led_classdev *ldev, ++ unsigned long *delay_on, ++ unsigned long *delay_off) ++{ ++ struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev); ++ u32 mask, val = QCA8K_LED_ALWAYS_BLINK_4HZ; ++ struct qca8k_led_pattern_en reg_info; ++ struct qca8k_priv *priv = led->priv; ++ ++ if (*delay_on == 0 && *delay_off == 0) { ++ *delay_on = 125; ++ *delay_off = 125; ++ } ++ ++ if (*delay_on != 125 || *delay_off != 125) { ++ /* The hardware only supports blinking at 4Hz. Fall back ++ * to software implementation in other cases. ++ */ ++ return -EINVAL; ++ } ++ ++ qca8k_get_enable_led_reg(led->port_num, led->led_num, ®_info); ++ ++ if (led->port_num == 0 || led->port_num == 4) { ++ mask = QCA8K_LED_PATTERN_EN_MASK; ++ val <<= QCA8K_LED_PATTERN_EN_SHIFT; ++ } else { ++ mask = QCA8K_LED_PHY123_PATTERN_EN_MASK; ++ } ++ ++ regmap_update_bits(priv->regmap, reg_info.reg, mask << reg_info.shift, ++ val << reg_info.shift); ++ ++ return 0; ++} ++ ++static int + qca8k_parse_port_leds(struct qca8k_priv *priv, struct fwnode_handle *port, int port_num) + { + struct fwnode_handle *led = NULL, *leds = NULL; +@@ -186,6 +223,7 @@ qca8k_parse_port_leds(struct qca8k_priv + + port_led->cdev.max_brightness = 1; + port_led->cdev.brightness_set_blocking = qca8k_cled_brightness_set_blocking; ++ port_led->cdev.blink_set = qca8k_cled_blink_set; + init_data.default_label = ":port"; + init_data.fwnode = led; + init_data.devname_mandatory = true; diff --git a/target/linux/generic/backport-5.15/815-v6.4-04-leds-Provide-stubs-for-when-CLASS_LED-NEW_LEDS-are-d.patch b/target/linux/generic/backport-5.15/815-v6.4-04-leds-Provide-stubs-for-when-CLASS_LED-NEW_LEDS-are-d.patch new file mode 100644 index 000000000..bc905b446 --- /dev/null +++ b/target/linux/generic/backport-5.15/815-v6.4-04-leds-Provide-stubs-for-when-CLASS_LED-NEW_LEDS-are-d.patch @@ -0,0 +1,59 @@ +From e5029edd53937a29801ef507cee12e657ff31ea9 Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 17 Apr 2023 17:17:26 +0200 +Subject: [PATCH 4/9] leds: Provide stubs for when CLASS_LED & NEW_LEDS are + disabled + +Provide stubs for devm_led_classdev_register_ext() and +led_init_default_state_get() so that LED drivers embedded within other +drivers such as PHYs and Ethernet switches still build when LEDS_CLASS +or NEW_LEDS are disabled. This also helps with Kconfig dependencies, +which are somewhat hairy for phylib and mdio and only get worse when +adding a dependency on LED_CLASS. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + include/linux/leds.h | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +--- a/include/linux/leds.h ++++ b/include/linux/leds.h +@@ -63,7 +63,15 @@ struct led_init_data { + bool devname_mandatory; + }; + ++#if IS_ENABLED(CONFIG_NEW_LEDS) + enum led_default_state led_init_default_state_get(struct fwnode_handle *fwnode); ++#else ++static inline enum led_default_state ++led_init_default_state_get(struct fwnode_handle *fwnode) ++{ ++ return LEDS_DEFSTATE_OFF; ++} ++#endif + + struct led_hw_trigger_type { + int dummy; +@@ -198,9 +206,19 @@ static inline int led_classdev_register( + return led_classdev_register_ext(parent, led_cdev, NULL); + } + ++#if IS_ENABLED(CONFIG_LEDS_CLASS) + int devm_led_classdev_register_ext(struct device *parent, + struct led_classdev *led_cdev, + struct led_init_data *init_data); ++#else ++static inline int ++devm_led_classdev_register_ext(struct device *parent, ++ struct led_classdev *led_cdev, ++ struct led_init_data *init_data) ++{ ++ return 0; ++} ++#endif + + static inline int devm_led_classdev_register(struct device *parent, + struct led_classdev *led_cdev) diff --git a/target/linux/generic/backport-5.15/815-v6.4-05-net-phy-Add-a-binding-for-PHY-LEDs.patch b/target/linux/generic/backport-5.15/815-v6.4-05-net-phy-Add-a-binding-for-PHY-LEDs.patch new file mode 100644 index 000000000..3e60f91a2 --- /dev/null +++ b/target/linux/generic/backport-5.15/815-v6.4-05-net-phy-Add-a-binding-for-PHY-LEDs.patch @@ -0,0 +1,191 @@ +From 01e5b728e9e43ae444e0369695a5f72209906464 Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 17 Apr 2023 17:17:27 +0200 +Subject: [PATCH 5/9] net: phy: Add a binding for PHY LEDs + +Define common binding parsing for all PHY drivers with LEDs using +phylib. Parse the DT as part of the phy_probe and add LEDs to the +linux LED class infrastructure. For the moment, provide a dummy +brightness function, which will later be replaced with a call into the +PHY driver. This allows testing since the LED core might otherwise +reject an LED whose brightness cannot be set. + +Add a dependency on LED_CLASS. It either needs to be built in, or not +enabled, since a modular build can result in linker errors. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/phy/Kconfig | 1 + + drivers/net/phy/phy_device.c | 76 ++++++++++++++++++++++++++++++++++++ + include/linux/phy.h | 16 ++++++++ + 3 files changed, 93 insertions(+) + +--- a/drivers/net/phy/Kconfig ++++ b/drivers/net/phy/Kconfig +@@ -18,6 +18,7 @@ menuconfig PHYLIB + depends on NETDEVICES + select MDIO_DEVICE + select MDIO_DEVRES ++ depends on LEDS_CLASS || LEDS_CLASS=n + help + Ethernet controllers are usually attached to PHY + devices. This option provides infrastructure for +--- a/drivers/net/phy/phy_device.c ++++ b/drivers/net/phy/phy_device.c +@@ -19,10 +19,12 @@ + #include + #include + #include ++#include + #include + #include + #include + #include ++#include + #include + #include + #include +@@ -641,6 +643,7 @@ struct phy_device *phy_device_create(str + device_initialize(&mdiodev->dev); + + dev->state = PHY_DOWN; ++ INIT_LIST_HEAD(&dev->leds); + + mutex_init(&dev->lock); + INIT_DELAYED_WORK(&dev->state_queue, phy_state_machine); +@@ -2942,6 +2945,74 @@ static bool phy_drv_supports_irq(struct + return phydrv->config_intr && phydrv->handle_interrupt; + } + ++/* Dummy implementation until calls into PHY driver are added */ ++static int phy_led_set_brightness(struct led_classdev *led_cdev, ++ enum led_brightness value) ++{ ++ return 0; ++} ++ ++static int of_phy_led(struct phy_device *phydev, ++ struct device_node *led) ++{ ++ struct device *dev = &phydev->mdio.dev; ++ struct led_init_data init_data = {}; ++ struct led_classdev *cdev; ++ struct phy_led *phyled; ++ int err; ++ ++ phyled = devm_kzalloc(dev, sizeof(*phyled), GFP_KERNEL); ++ if (!phyled) ++ return -ENOMEM; ++ ++ cdev = &phyled->led_cdev; ++ ++ err = of_property_read_u8(led, "reg", &phyled->index); ++ if (err) ++ return err; ++ ++ cdev->brightness_set_blocking = phy_led_set_brightness; ++ cdev->max_brightness = 1; ++ init_data.devicename = dev_name(&phydev->mdio.dev); ++ init_data.fwnode = of_fwnode_handle(led); ++ init_data.devname_mandatory = true; ++ ++ err = devm_led_classdev_register_ext(dev, cdev, &init_data); ++ if (err) ++ return err; ++ ++ list_add(&phyled->list, &phydev->leds); ++ ++ return 0; ++} ++ ++static int of_phy_leds(struct phy_device *phydev) ++{ ++ struct device_node *node = phydev->mdio.dev.of_node; ++ struct device_node *leds, *led; ++ int err; ++ ++ if (!IS_ENABLED(CONFIG_OF_MDIO)) ++ return 0; ++ ++ if (!node) ++ return 0; ++ ++ leds = of_get_child_by_name(node, "leds"); ++ if (!leds) ++ return 0; ++ ++ for_each_available_child_of_node(leds, led) { ++ err = of_phy_led(phydev, led); ++ if (err) { ++ of_node_put(led); ++ return err; ++ } ++ } ++ ++ return 0; ++} ++ + /** + * fwnode_mdio_find_device - Given a fwnode, find the mdio_device + * @fwnode: pointer to the mdio_device's fwnode +@@ -3120,6 +3191,11 @@ static int phy_probe(struct device *dev) + /* Set the state to READY by default */ + phydev->state = PHY_READY; + ++ /* Get the LEDs from the device tree, and instantiate standard ++ * LEDs for them. ++ */ ++ err = of_phy_leds(phydev); ++ + out: + /* Re-assert the reset signal on error */ + if (err) +--- a/include/linux/phy.h ++++ b/include/linux/phy.h +@@ -14,6 +14,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -582,6 +583,7 @@ struct macsec_ops; + * @phy_num_led_triggers: Number of triggers in @phy_led_triggers + * @led_link_trigger: LED trigger for link up/down + * @last_triggered: last LED trigger for link speed ++ * @leds: list of PHY LED structures + * @master_slave_set: User requested master/slave configuration + * @master_slave_get: Current master/slave advertisement + * @master_slave_state: Current master/slave configuration +@@ -668,6 +670,7 @@ struct phy_device { + + struct phy_led_trigger *led_link_trigger; + #endif ++ struct list_head leds; + + /* + * Interrupt number for this PHY +@@ -739,6 +742,19 @@ struct phy_tdr_config { + #define PHY_PAIR_ALL -1 + + /** ++ * struct phy_led: An LED driven by the PHY ++ * ++ * @list: List of LEDs ++ * @led_cdev: Standard LED class structure ++ * @index: Number of the LED ++ */ ++struct phy_led { ++ struct list_head list; ++ struct led_classdev led_cdev; ++ u8 index; ++}; ++ ++/** + * struct phy_driver - Driver structure for a particular PHY type + * + * @mdiodrv: Data common to all MDIO devices diff --git a/target/linux/generic/backport-5.15/815-v6.4-06-net-phy-phy_device-Call-into-the-PHY-driver-to-set-L.patch b/target/linux/generic/backport-5.15/815-v6.4-06-net-phy-phy_device-Call-into-the-PHY-driver-to-set-L.patch new file mode 100644 index 000000000..f990557cc --- /dev/null +++ b/target/linux/generic/backport-5.15/815-v6.4-06-net-phy-phy_device-Call-into-the-PHY-driver-to-set-L.patch @@ -0,0 +1,97 @@ +From 684818189b04b095b34964ed4a3ea5249a840eab Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 17 Apr 2023 17:17:28 +0200 +Subject: [PATCH 6/9] net: phy: phy_device: Call into the PHY driver to set LED + brightness + +Linux LEDs can be software controlled via the brightness file in /sys. +LED drivers need to implement a brightness_set function which the core +will call. Implement an intermediary in phy_device, which will call +into the phy driver if it implements the necessary function. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/phy/phy_device.c | 15 ++++++++++++--- + include/linux/phy.h | 13 +++++++++++++ + 2 files changed, 25 insertions(+), 3 deletions(-) + +--- a/drivers/net/phy/phy_device.c ++++ b/drivers/net/phy/phy_device.c +@@ -2945,11 +2945,18 @@ static bool phy_drv_supports_irq(struct + return phydrv->config_intr && phydrv->handle_interrupt; + } + +-/* Dummy implementation until calls into PHY driver are added */ + static int phy_led_set_brightness(struct led_classdev *led_cdev, + enum led_brightness value) + { +- return 0; ++ struct phy_led *phyled = to_phy_led(led_cdev); ++ struct phy_device *phydev = phyled->phydev; ++ int err; ++ ++ mutex_lock(&phydev->lock); ++ err = phydev->drv->led_brightness_set(phydev, phyled->index, value); ++ mutex_unlock(&phydev->lock); ++ ++ return err; + } + + static int of_phy_led(struct phy_device *phydev, +@@ -2966,12 +2973,14 @@ static int of_phy_led(struct phy_device + return -ENOMEM; + + cdev = &phyled->led_cdev; ++ phyled->phydev = phydev; + + err = of_property_read_u8(led, "reg", &phyled->index); + if (err) + return err; + +- cdev->brightness_set_blocking = phy_led_set_brightness; ++ if (phydev->drv->led_brightness_set) ++ cdev->brightness_set_blocking = phy_led_set_brightness; + cdev->max_brightness = 1; + init_data.devicename = dev_name(&phydev->mdio.dev); + init_data.fwnode = of_fwnode_handle(led); +--- a/include/linux/phy.h ++++ b/include/linux/phy.h +@@ -745,15 +745,19 @@ struct phy_tdr_config { + * struct phy_led: An LED driven by the PHY + * + * @list: List of LEDs ++ * @phydev: PHY this LED is attached to + * @led_cdev: Standard LED class structure + * @index: Number of the LED + */ + struct phy_led { + struct list_head list; ++ struct phy_device *phydev; + struct led_classdev led_cdev; + u8 index; + }; + ++#define to_phy_led(d) container_of(d, struct phy_led, led_cdev) ++ + /** + * struct phy_driver - Driver structure for a particular PHY type + * +@@ -953,6 +957,15 @@ struct phy_driver { + int (*get_sqi)(struct phy_device *dev); + /** @get_sqi_max: Get the maximum signal quality indication */ + int (*get_sqi_max)(struct phy_device *dev); ++ ++ /** ++ * @led_brightness_set: Set a PHY LED brightness. Index ++ * indicates which of the PHYs led should be set. Value ++ * follows the standard LED class meaning, e.g. LED_OFF, ++ * LED_HALF, LED_FULL. ++ */ ++ int (*led_brightness_set)(struct phy_device *dev, ++ u8 index, enum led_brightness value); + }; + #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ + struct phy_driver, mdiodrv) diff --git a/target/linux/generic/backport-5.15/815-v6.4-07-net-phy-marvell-Add-software-control-of-the-LEDs.patch b/target/linux/generic/backport-5.15/815-v6.4-07-net-phy-marvell-Add-software-control-of-the-LEDs.patch new file mode 100644 index 000000000..053288cec --- /dev/null +++ b/target/linux/generic/backport-5.15/815-v6.4-07-net-phy-marvell-Add-software-control-of-the-LEDs.patch @@ -0,0 +1,112 @@ +From 2d3960e58ef7c83fe1dbf952f056b9e906cb6df8 Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 17 Apr 2023 17:17:29 +0200 +Subject: [PATCH 7/9] net: phy: marvell: Add software control of the LEDs + +Add a brightness function, so the LEDs can be controlled from +software using the standard Linux LED infrastructure. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/phy/marvell.c | 45 ++++++++++++++++++++++++++++++++++----- + 1 file changed, 40 insertions(+), 5 deletions(-) + +--- a/drivers/net/phy/marvell.c ++++ b/drivers/net/phy/marvell.c +@@ -144,11 +144,13 @@ + /* WOL Event Interrupt Enable */ + #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) + +-/* LED Timer Control Register */ +-#define MII_88E1318S_PHY_LED_TCR 0x12 +-#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) +-#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) +-#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) ++#define MII_88E1318S_PHY_LED_FUNC 0x10 ++#define MII_88E1318S_PHY_LED_FUNC_OFF (0x8) ++#define MII_88E1318S_PHY_LED_FUNC_ON (0x9) ++#define MII_88E1318S_PHY_LED_TCR 0x12 ++#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) ++#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) ++#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) + + /* Magic Packet MAC address registers */ + #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 +@@ -2793,6 +2795,34 @@ static int marvell_hwmon_probe(struct ph + } + #endif + ++static int m88e1318_led_brightness_set(struct phy_device *phydev, ++ u8 index, enum led_brightness value) ++{ ++ int reg; ++ ++ reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE, ++ MII_88E1318S_PHY_LED_FUNC); ++ if (reg < 0) ++ return reg; ++ ++ switch (index) { ++ case 0: ++ case 1: ++ case 2: ++ reg &= ~(0xf << (4 * index)); ++ if (value == LED_OFF) ++ reg |= MII_88E1318S_PHY_LED_FUNC_OFF << (4 * index); ++ else ++ reg |= MII_88E1318S_PHY_LED_FUNC_ON << (4 * index); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return phy_write_paged(phydev, MII_MARVELL_LED_PAGE, ++ MII_88E1318S_PHY_LED_FUNC, reg); ++} ++ + static int marvell_probe(struct phy_device *phydev) + { + struct marvell_priv *priv; +@@ -3041,6 +3071,7 @@ static struct phy_driver marvell_drivers + .get_sset_count = marvell_get_sset_count, + .get_strings = marvell_get_strings, + .get_stats = marvell_get_stats, ++ .led_brightness_set = m88e1318_led_brightness_set, + }, + { + .phy_id = MARVELL_PHY_ID_88E1145, +@@ -3147,6 +3178,7 @@ static struct phy_driver marvell_drivers + .cable_test_start = marvell_vct7_cable_test_start, + .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, + .cable_test_get_status = marvell_vct7_cable_test_get_status, ++ .led_brightness_set = m88e1318_led_brightness_set, + }, + { + .phy_id = MARVELL_PHY_ID_88E1540, +@@ -3173,6 +3205,7 @@ static struct phy_driver marvell_drivers + .cable_test_start = marvell_vct7_cable_test_start, + .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, + .cable_test_get_status = marvell_vct7_cable_test_get_status, ++ .led_brightness_set = m88e1318_led_brightness_set, + }, + { + .phy_id = MARVELL_PHY_ID_88E1545, +@@ -3199,6 +3232,7 @@ static struct phy_driver marvell_drivers + .cable_test_start = marvell_vct7_cable_test_start, + .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, + .cable_test_get_status = marvell_vct7_cable_test_get_status, ++ .led_brightness_set = m88e1318_led_brightness_set, + }, + { + .phy_id = MARVELL_PHY_ID_88E3016, +@@ -3340,6 +3374,7 @@ static struct phy_driver marvell_drivers + .get_stats = marvell_get_stats, + .get_tunable = m88e1540_get_tunable, + .set_tunable = m88e1540_set_tunable, ++ .led_brightness_set = m88e1318_led_brightness_set, + }, + }; + diff --git a/target/linux/generic/backport-5.15/815-v6.4-08-net-phy-phy_device-Call-into-the-PHY-driver-to-set-L.patch b/target/linux/generic/backport-5.15/815-v6.4-08-net-phy-phy_device-Call-into-the-PHY-driver-to-set-L.patch new file mode 100644 index 000000000..4814688de --- /dev/null +++ b/target/linux/generic/backport-5.15/815-v6.4-08-net-phy-phy_device-Call-into-the-PHY-driver-to-set-L.patch @@ -0,0 +1,73 @@ +From 4e901018432e38eab35d2a352661ce4727795be1 Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 17 Apr 2023 17:17:30 +0200 +Subject: [PATCH 8/9] net: phy: phy_device: Call into the PHY driver to set LED + blinking + +Linux LEDs can be requested to perform hardware accelerated +blinking. Pass this to the PHY driver, if it implements the op. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/phy/phy_device.c | 18 ++++++++++++++++++ + include/linux/phy.h | 12 ++++++++++++ + 2 files changed, 30 insertions(+) + +--- a/drivers/net/phy/phy_device.c ++++ b/drivers/net/phy/phy_device.c +@@ -2959,6 +2959,22 @@ static int phy_led_set_brightness(struct + return err; + } + ++static int phy_led_blink_set(struct led_classdev *led_cdev, ++ unsigned long *delay_on, ++ unsigned long *delay_off) ++{ ++ struct phy_led *phyled = to_phy_led(led_cdev); ++ struct phy_device *phydev = phyled->phydev; ++ int err; ++ ++ mutex_lock(&phydev->lock); ++ err = phydev->drv->led_blink_set(phydev, phyled->index, ++ delay_on, delay_off); ++ mutex_unlock(&phydev->lock); ++ ++ return err; ++} ++ + static int of_phy_led(struct phy_device *phydev, + struct device_node *led) + { +@@ -2981,6 +2997,8 @@ static int of_phy_led(struct phy_device + + if (phydev->drv->led_brightness_set) + cdev->brightness_set_blocking = phy_led_set_brightness; ++ if (phydev->drv->led_blink_set) ++ cdev->blink_set = phy_led_blink_set; + cdev->max_brightness = 1; + init_data.devicename = dev_name(&phydev->mdio.dev); + init_data.fwnode = of_fwnode_handle(led); +--- a/include/linux/phy.h ++++ b/include/linux/phy.h +@@ -966,6 +966,18 @@ struct phy_driver { + */ + int (*led_brightness_set)(struct phy_device *dev, + u8 index, enum led_brightness value); ++ ++ /** ++ * @led_blink_set: Set a PHY LED brightness. Index indicates ++ * which of the PHYs led should be configured to blink. Delays ++ * are in milliseconds and if both are zero then a sensible ++ * default should be chosen. The call should adjust the ++ * timings in that case and if it can't match the values ++ * specified exactly. ++ */ ++ int (*led_blink_set)(struct phy_device *dev, u8 index, ++ unsigned long *delay_on, ++ unsigned long *delay_off); + }; + #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ + struct phy_driver, mdiodrv) diff --git a/target/linux/generic/backport-5.15/815-v6.4-09-net-phy-marvell-Implement-led_blink_set.patch b/target/linux/generic/backport-5.15/815-v6.4-09-net-phy-marvell-Implement-led_blink_set.patch new file mode 100644 index 000000000..0f258c6b9 --- /dev/null +++ b/target/linux/generic/backport-5.15/815-v6.4-09-net-phy-marvell-Implement-led_blink_set.patch @@ -0,0 +1,104 @@ +From ea9e86485decb2ac1750005bd96c166c9b780406 Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 17 Apr 2023 17:17:31 +0200 +Subject: [PATCH 9/9] net: phy: marvell: Implement led_blink_set() + +The Marvell PHY can blink the LEDs, simple on/off. All LEDs blink at +the same rate, and the reset default is 84ms per blink, which is +around 12Hz. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/phy/marvell.c | 36 ++++++++++++++++++++++++++++++++++++ + 1 file changed, 36 insertions(+) + +--- a/drivers/net/phy/marvell.c ++++ b/drivers/net/phy/marvell.c +@@ -147,6 +147,8 @@ + #define MII_88E1318S_PHY_LED_FUNC 0x10 + #define MII_88E1318S_PHY_LED_FUNC_OFF (0x8) + #define MII_88E1318S_PHY_LED_FUNC_ON (0x9) ++#define MII_88E1318S_PHY_LED_FUNC_HI_Z (0xa) ++#define MII_88E1318S_PHY_LED_FUNC_BLINK (0xb) + #define MII_88E1318S_PHY_LED_TCR 0x12 + #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) + #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) +@@ -2823,6 +2825,35 @@ static int m88e1318_led_brightness_set(s + MII_88E1318S_PHY_LED_FUNC, reg); + } + ++static int m88e1318_led_blink_set(struct phy_device *phydev, u8 index, ++ unsigned long *delay_on, ++ unsigned long *delay_off) ++{ ++ int reg; ++ ++ reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE, ++ MII_88E1318S_PHY_LED_FUNC); ++ if (reg < 0) ++ return reg; ++ ++ switch (index) { ++ case 0: ++ case 1: ++ case 2: ++ reg &= ~(0xf << (4 * index)); ++ reg |= MII_88E1318S_PHY_LED_FUNC_BLINK << (4 * index); ++ /* Reset default is 84ms */ ++ *delay_on = 84 / 2; ++ *delay_off = 84 / 2; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return phy_write_paged(phydev, MII_MARVELL_LED_PAGE, ++ MII_88E1318S_PHY_LED_FUNC, reg); ++} ++ + static int marvell_probe(struct phy_device *phydev) + { + struct marvell_priv *priv; +@@ -3072,6 +3103,7 @@ static struct phy_driver marvell_drivers + .get_strings = marvell_get_strings, + .get_stats = marvell_get_stats, + .led_brightness_set = m88e1318_led_brightness_set, ++ .led_blink_set = m88e1318_led_blink_set, + }, + { + .phy_id = MARVELL_PHY_ID_88E1145, +@@ -3179,6 +3211,7 @@ static struct phy_driver marvell_drivers + .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, + .cable_test_get_status = marvell_vct7_cable_test_get_status, + .led_brightness_set = m88e1318_led_brightness_set, ++ .led_blink_set = m88e1318_led_blink_set, + }, + { + .phy_id = MARVELL_PHY_ID_88E1540, +@@ -3206,6 +3239,7 @@ static struct phy_driver marvell_drivers + .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, + .cable_test_get_status = marvell_vct7_cable_test_get_status, + .led_brightness_set = m88e1318_led_brightness_set, ++ .led_blink_set = m88e1318_led_blink_set, + }, + { + .phy_id = MARVELL_PHY_ID_88E1545, +@@ -3233,6 +3267,7 @@ static struct phy_driver marvell_drivers + .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, + .cable_test_get_status = marvell_vct7_cable_test_get_status, + .led_brightness_set = m88e1318_led_brightness_set, ++ .led_blink_set = m88e1318_led_blink_set, + }, + { + .phy_id = MARVELL_PHY_ID_88E3016, +@@ -3375,6 +3410,7 @@ static struct phy_driver marvell_drivers + .get_tunable = m88e1540_get_tunable, + .set_tunable = m88e1540_set_tunable, + .led_brightness_set = m88e1318_led_brightness_set, ++ .led_blink_set = m88e1318_led_blink_set, + }, + }; + diff --git a/target/linux/generic/backport-5.15/816-v6.4-net-phy-marvell-Fix-inconsistent-indenting-in-led_bl.patch b/target/linux/generic/backport-5.15/816-v6.4-net-phy-marvell-Fix-inconsistent-indenting-in-led_bl.patch new file mode 100644 index 000000000..c5b611a12 --- /dev/null +++ b/target/linux/generic/backport-5.15/816-v6.4-net-phy-marvell-Fix-inconsistent-indenting-in-led_bl.patch @@ -0,0 +1,38 @@ +From 4774ad841bef97cc51df90195338c5b2573dd4cb Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sun, 23 Apr 2023 19:28:00 +0200 +Subject: [PATCH] net: phy: marvell: Fix inconsistent indenting in + led_blink_set + +Fix inconsistent indeinting in m88e1318_led_blink_set reported by kernel +test robot, probably done by the presence of an if condition dropped in +later revision of the same code. + +Reported-by: kernel test robot +Link: https://lore.kernel.org/oe-kbuild-all/202304240007.0VEX8QYG-lkp@intel.com/ +Fixes: ea9e86485dec ("net: phy: marvell: Implement led_blink_set()") +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/20230423172800.3470-1-ansuelsmth@gmail.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/marvell.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/net/phy/marvell.c ++++ b/drivers/net/phy/marvell.c +@@ -2841,10 +2841,10 @@ static int m88e1318_led_blink_set(struct + case 1: + case 2: + reg &= ~(0xf << (4 * index)); +- reg |= MII_88E1318S_PHY_LED_FUNC_BLINK << (4 * index); +- /* Reset default is 84ms */ +- *delay_on = 84 / 2; +- *delay_off = 84 / 2; ++ reg |= MII_88E1318S_PHY_LED_FUNC_BLINK << (4 * index); ++ /* Reset default is 84ms */ ++ *delay_on = 84 / 2; ++ *delay_off = 84 / 2; + break; + default: + return -EINVAL; diff --git a/target/linux/generic/backport-5.15/817-v6.5-02-leds-trigger-netdev-Drop-NETDEV_LED_MODE_LINKUP-from.patch b/target/linux/generic/backport-5.15/817-v6.5-02-leds-trigger-netdev-Drop-NETDEV_LED_MODE_LINKUP-from.patch new file mode 100644 index 000000000..3170c2605 --- /dev/null +++ b/target/linux/generic/backport-5.15/817-v6.5-02-leds-trigger-netdev-Drop-NETDEV_LED_MODE_LINKUP-from.patch @@ -0,0 +1,87 @@ +From e2f24cb1b5daf9a4f6f3ba574c1fa74aab9807a4 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 19 Apr 2023 23:07:40 +0200 +Subject: [PATCH 2/5] leds: trigger: netdev: Drop NETDEV_LED_MODE_LINKUP from + mode + +Putting NETDEV_LED_MODE_LINKUP in the same list of the netdev trigger +modes is wrong as it's used to set the link state of the device and not +to set a blink mode as it's done by NETDEV_LED_LINK, NETDEV_LED_TX and +NETDEV_LED_RX. It's also wrong to put this state in the same bitmap of the +netdev trigger mode and should be external to it. + +Drop NETDEV_LED_MODE_LINKUP from mode list and convert to a simple bool +that will be true or false based on the carrier link. No functional +change intended. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: Lee Jones +Link: https://lore.kernel.org/r/20230419210743.3594-3-ansuelsmth@gmail.com +--- + drivers/leds/trigger/ledtrig-netdev.c | 19 ++++++++----------- + 1 file changed, 8 insertions(+), 11 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -50,10 +50,10 @@ struct led_netdev_data { + unsigned int last_activity; + + unsigned long mode; ++ bool carrier_link_up; + #define NETDEV_LED_LINK 0 + #define NETDEV_LED_TX 1 + #define NETDEV_LED_RX 2 +-#define NETDEV_LED_MODE_LINKUP 3 + }; + + enum netdev_led_attr { +@@ -73,9 +73,9 @@ static void set_baseline_state(struct le + if (!led_cdev->blink_brightness) + led_cdev->blink_brightness = led_cdev->max_brightness; + +- if (!test_bit(NETDEV_LED_MODE_LINKUP, &trigger_data->mode)) ++ if (!trigger_data->carrier_link_up) { + led_set_brightness(led_cdev, LED_OFF); +- else { ++ } else { + if (test_bit(NETDEV_LED_LINK, &trigger_data->mode)) + led_set_brightness(led_cdev, + led_cdev->blink_brightness); +@@ -131,10 +131,9 @@ static ssize_t device_name_store(struct + trigger_data->net_dev = + dev_get_by_name(&init_net, trigger_data->device_name); + +- clear_bit(NETDEV_LED_MODE_LINKUP, &trigger_data->mode); ++ trigger_data->carrier_link_up = false; + if (trigger_data->net_dev != NULL) +- if (netif_carrier_ok(trigger_data->net_dev)) +- set_bit(NETDEV_LED_MODE_LINKUP, &trigger_data->mode); ++ trigger_data->carrier_link_up = netif_carrier_ok(trigger_data->net_dev); + + trigger_data->last_activity = 0; + +@@ -315,11 +314,10 @@ static int netdev_trig_notify(struct not + + spin_lock_bh(&trigger_data->lock); + +- clear_bit(NETDEV_LED_MODE_LINKUP, &trigger_data->mode); ++ trigger_data->carrier_link_up = false; + switch (evt) { + case NETDEV_CHANGENAME: +- if (netif_carrier_ok(dev)) +- set_bit(NETDEV_LED_MODE_LINKUP, &trigger_data->mode); ++ trigger_data->carrier_link_up = netif_carrier_ok(dev); + fallthrough; + case NETDEV_REGISTER: + if (trigger_data->net_dev) +@@ -333,8 +331,7 @@ static int netdev_trig_notify(struct not + break; + case NETDEV_UP: + case NETDEV_CHANGE: +- if (netif_carrier_ok(dev)) +- set_bit(NETDEV_LED_MODE_LINKUP, &trigger_data->mode); ++ trigger_data->carrier_link_up = netif_carrier_ok(dev); + break; + } + diff --git a/target/linux/generic/backport-5.15/817-v6.5-03-leds-trigger-netdev-Rename-add-namespace-to-netdev-t.patch b/target/linux/generic/backport-5.15/817-v6.5-03-leds-trigger-netdev-Rename-add-namespace-to-netdev-t.patch new file mode 100644 index 000000000..19cc1d7c9 --- /dev/null +++ b/target/linux/generic/backport-5.15/817-v6.5-03-leds-trigger-netdev-Rename-add-namespace-to-netdev-t.patch @@ -0,0 +1,149 @@ +From bdec9cb83936e0ac4cb87fed5b49fad0175f7dec Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 19 Apr 2023 23:07:41 +0200 +Subject: [PATCH 3/5] leds: trigger: netdev: Rename add namespace to netdev + trigger enum modes + +Rename NETDEV trigger enum modes to a more symbolic name and add a +namespace to them. + +Also add __TRIGGER_NETDEV_MAX to identify the max modes of the netdev +trigger. + +This is a cleanup to drop the define and no behaviour change are +intended. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: Lee Jones +Link: https://lore.kernel.org/r/20230419210743.3594-4-ansuelsmth@gmail.com +--- + drivers/leds/trigger/ledtrig-netdev.c | 58 ++++++++++++--------------- + 1 file changed, 25 insertions(+), 33 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -51,15 +51,15 @@ struct led_netdev_data { + + unsigned long mode; + bool carrier_link_up; +-#define NETDEV_LED_LINK 0 +-#define NETDEV_LED_TX 1 +-#define NETDEV_LED_RX 2 + }; + +-enum netdev_led_attr { +- NETDEV_ATTR_LINK, +- NETDEV_ATTR_TX, +- NETDEV_ATTR_RX ++enum led_trigger_netdev_modes { ++ TRIGGER_NETDEV_LINK = 0, ++ TRIGGER_NETDEV_TX, ++ TRIGGER_NETDEV_RX, ++ ++ /* Keep last */ ++ __TRIGGER_NETDEV_MAX, + }; + + static void set_baseline_state(struct led_netdev_data *trigger_data) +@@ -76,7 +76,7 @@ static void set_baseline_state(struct le + if (!trigger_data->carrier_link_up) { + led_set_brightness(led_cdev, LED_OFF); + } else { +- if (test_bit(NETDEV_LED_LINK, &trigger_data->mode)) ++ if (test_bit(TRIGGER_NETDEV_LINK, &trigger_data->mode)) + led_set_brightness(led_cdev, + led_cdev->blink_brightness); + else +@@ -85,8 +85,8 @@ static void set_baseline_state(struct le + /* If we are looking for RX/TX start periodically + * checking stats + */ +- if (test_bit(NETDEV_LED_TX, &trigger_data->mode) || +- test_bit(NETDEV_LED_RX, &trigger_data->mode)) ++ if (test_bit(TRIGGER_NETDEV_TX, &trigger_data->mode) || ++ test_bit(TRIGGER_NETDEV_RX, &trigger_data->mode)) + schedule_delayed_work(&trigger_data->work, 0); + } + } +@@ -146,20 +146,16 @@ static ssize_t device_name_store(struct + static DEVICE_ATTR_RW(device_name); + + static ssize_t netdev_led_attr_show(struct device *dev, char *buf, +- enum netdev_led_attr attr) ++ enum led_trigger_netdev_modes attr) + { + struct led_netdev_data *trigger_data = led_trigger_get_drvdata(dev); + int bit; + + switch (attr) { +- case NETDEV_ATTR_LINK: +- bit = NETDEV_LED_LINK; +- break; +- case NETDEV_ATTR_TX: +- bit = NETDEV_LED_TX; +- break; +- case NETDEV_ATTR_RX: +- bit = NETDEV_LED_RX; ++ case TRIGGER_NETDEV_LINK: ++ case TRIGGER_NETDEV_TX: ++ case TRIGGER_NETDEV_RX: ++ bit = attr; + break; + default: + return -EINVAL; +@@ -169,7 +165,7 @@ static ssize_t netdev_led_attr_show(stru + } + + static ssize_t netdev_led_attr_store(struct device *dev, const char *buf, +- size_t size, enum netdev_led_attr attr) ++ size_t size, enum led_trigger_netdev_modes attr) + { + struct led_netdev_data *trigger_data = led_trigger_get_drvdata(dev); + unsigned long state; +@@ -181,14 +177,10 @@ static ssize_t netdev_led_attr_store(str + return ret; + + switch (attr) { +- case NETDEV_ATTR_LINK: +- bit = NETDEV_LED_LINK; +- break; +- case NETDEV_ATTR_TX: +- bit = NETDEV_LED_TX; +- break; +- case NETDEV_ATTR_RX: +- bit = NETDEV_LED_RX; ++ case TRIGGER_NETDEV_LINK: ++ case TRIGGER_NETDEV_TX: ++ case TRIGGER_NETDEV_RX: ++ bit = attr; + break; + default: + return -EINVAL; +@@ -360,21 +352,21 @@ static void netdev_trig_work(struct work + } + + /* If we are not looking for RX/TX then return */ +- if (!test_bit(NETDEV_LED_TX, &trigger_data->mode) && +- !test_bit(NETDEV_LED_RX, &trigger_data->mode)) ++ if (!test_bit(TRIGGER_NETDEV_TX, &trigger_data->mode) && ++ !test_bit(TRIGGER_NETDEV_RX, &trigger_data->mode)) + return; + + dev_stats = dev_get_stats(trigger_data->net_dev, &temp); + new_activity = +- (test_bit(NETDEV_LED_TX, &trigger_data->mode) ? ++ (test_bit(TRIGGER_NETDEV_TX, &trigger_data->mode) ? + dev_stats->tx_packets : 0) + +- (test_bit(NETDEV_LED_RX, &trigger_data->mode) ? ++ (test_bit(TRIGGER_NETDEV_RX, &trigger_data->mode) ? + dev_stats->rx_packets : 0); + + if (trigger_data->last_activity != new_activity) { + led_stop_software_blink(trigger_data->led_cdev); + +- invert = test_bit(NETDEV_LED_LINK, &trigger_data->mode); ++ invert = test_bit(TRIGGER_NETDEV_LINK, &trigger_data->mode); + interval = jiffies_to_msecs( + atomic_read(&trigger_data->interval)); + /* base state is ON (link present) */ diff --git a/target/linux/generic/backport-5.15/817-v6.5-04-leds-trigger-netdev-Convert-device-attr-to-macro.patch b/target/linux/generic/backport-5.15/817-v6.5-04-leds-trigger-netdev-Convert-device-attr-to-macro.patch new file mode 100644 index 000000000..3b45951f5 --- /dev/null +++ b/target/linux/generic/backport-5.15/817-v6.5-04-leds-trigger-netdev-Convert-device-attr-to-macro.patch @@ -0,0 +1,82 @@ +From 164b67d53476a9d114be85c885bd31f783835be4 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 19 Apr 2023 23:07:42 +0200 +Subject: [PATCH 4/5] leds: trigger: netdev: Convert device attr to macro + +Convert link tx and rx device attr to a common macro to reduce common +code and in preparation for additional attr. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: Lee Jones +Link: https://lore.kernel.org/r/20230419210743.3594-5-ansuelsmth@gmail.com +--- + drivers/leds/trigger/ledtrig-netdev.c | 57 ++++++++------------------- + 1 file changed, 16 insertions(+), 41 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -198,47 +198,22 @@ static ssize_t netdev_led_attr_store(str + return size; + } + +-static ssize_t link_show(struct device *dev, +- struct device_attribute *attr, char *buf) +-{ +- return netdev_led_attr_show(dev, buf, NETDEV_ATTR_LINK); +-} +- +-static ssize_t link_store(struct device *dev, +- struct device_attribute *attr, const char *buf, size_t size) +-{ +- return netdev_led_attr_store(dev, buf, size, NETDEV_ATTR_LINK); +-} +- +-static DEVICE_ATTR_RW(link); +- +-static ssize_t tx_show(struct device *dev, +- struct device_attribute *attr, char *buf) +-{ +- return netdev_led_attr_show(dev, buf, NETDEV_ATTR_TX); +-} +- +-static ssize_t tx_store(struct device *dev, +- struct device_attribute *attr, const char *buf, size_t size) +-{ +- return netdev_led_attr_store(dev, buf, size, NETDEV_ATTR_TX); +-} +- +-static DEVICE_ATTR_RW(tx); +- +-static ssize_t rx_show(struct device *dev, +- struct device_attribute *attr, char *buf) +-{ +- return netdev_led_attr_show(dev, buf, NETDEV_ATTR_RX); +-} +- +-static ssize_t rx_store(struct device *dev, +- struct device_attribute *attr, const char *buf, size_t size) +-{ +- return netdev_led_attr_store(dev, buf, size, NETDEV_ATTR_RX); +-} +- +-static DEVICE_ATTR_RW(rx); ++#define DEFINE_NETDEV_TRIGGER(trigger_name, trigger) \ ++ static ssize_t trigger_name##_show(struct device *dev, \ ++ struct device_attribute *attr, char *buf) \ ++ { \ ++ return netdev_led_attr_show(dev, buf, trigger); \ ++ } \ ++ static ssize_t trigger_name##_store(struct device *dev, \ ++ struct device_attribute *attr, const char *buf, size_t size) \ ++ { \ ++ return netdev_led_attr_store(dev, buf, size, trigger); \ ++ } \ ++ static DEVICE_ATTR_RW(trigger_name) ++ ++DEFINE_NETDEV_TRIGGER(link, TRIGGER_NETDEV_LINK); ++DEFINE_NETDEV_TRIGGER(tx, TRIGGER_NETDEV_TX); ++DEFINE_NETDEV_TRIGGER(rx, TRIGGER_NETDEV_RX); + + static ssize_t interval_show(struct device *dev, + struct device_attribute *attr, char *buf) diff --git a/target/linux/generic/backport-5.15/817-v6.5-05-leds-trigger-netdev-Use-mutex-instead-of-spinlocks.patch b/target/linux/generic/backport-5.15/817-v6.5-05-leds-trigger-netdev-Use-mutex-instead-of-spinlocks.patch new file mode 100644 index 000000000..180bee961 --- /dev/null +++ b/target/linux/generic/backport-5.15/817-v6.5-05-leds-trigger-netdev-Use-mutex-instead-of-spinlocks.patch @@ -0,0 +1,106 @@ +From d1b9e1391ab2dc80e9db87fe8b2de015c651e4c9 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 19 Apr 2023 23:07:43 +0200 +Subject: [PATCH 5/5] leds: trigger: netdev: Use mutex instead of spinlocks + +Some LEDs may require to sleep while doing some operation like setting +brightness and other cleanup. + +For this reason, using a spinlock will cause a sleep under spinlock +warning. + +It should be safe to convert this to a sleepable lock since: +- sysfs read/write can sleep +- netdev_trig_work is a work queue and can sleep +- netdev _trig_notify can sleep + +The spinlock was used when brightness didn't support sleeping, but this +changed and now it supported with brightness_set_blocking(). + +Convert to mutex lock to permit sleeping using brightness_set_blocking(). + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: Lee Jones +Link: https://lore.kernel.org/r/20230419210743.3594-6-ansuelsmth@gmail.com +--- + drivers/leds/trigger/ledtrig-netdev.c | 18 +++++++++--------- + 1 file changed, 9 insertions(+), 9 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -20,7 +20,7 @@ + #include + #include + #include +-#include ++#include + #include + #include "../leds.h" + +@@ -37,7 +37,7 @@ + */ + + struct led_netdev_data { +- spinlock_t lock; ++ struct mutex lock; + + struct delayed_work work; + struct notifier_block notifier; +@@ -97,9 +97,9 @@ static ssize_t device_name_show(struct d + struct led_netdev_data *trigger_data = led_trigger_get_drvdata(dev); + ssize_t len; + +- spin_lock_bh(&trigger_data->lock); ++ mutex_lock(&trigger_data->lock); + len = sprintf(buf, "%s\n", trigger_data->device_name); +- spin_unlock_bh(&trigger_data->lock); ++ mutex_unlock(&trigger_data->lock); + + return len; + } +@@ -115,7 +115,7 @@ static ssize_t device_name_store(struct + + cancel_delayed_work_sync(&trigger_data->work); + +- spin_lock_bh(&trigger_data->lock); ++ mutex_lock(&trigger_data->lock); + + if (trigger_data->net_dev) { + dev_put(trigger_data->net_dev); +@@ -138,7 +138,7 @@ static ssize_t device_name_store(struct + trigger_data->last_activity = 0; + + set_baseline_state(trigger_data); +- spin_unlock_bh(&trigger_data->lock); ++ mutex_unlock(&trigger_data->lock); + + return size; + } +@@ -279,7 +279,7 @@ static int netdev_trig_notify(struct not + + cancel_delayed_work_sync(&trigger_data->work); + +- spin_lock_bh(&trigger_data->lock); ++ mutex_lock(&trigger_data->lock); + + trigger_data->carrier_link_up = false; + switch (evt) { +@@ -304,7 +304,7 @@ static int netdev_trig_notify(struct not + + set_baseline_state(trigger_data); + +- spin_unlock_bh(&trigger_data->lock); ++ mutex_unlock(&trigger_data->lock); + + return NOTIFY_DONE; + } +@@ -365,7 +365,7 @@ static int netdev_trig_activate(struct l + if (!trigger_data) + return -ENOMEM; + +- spin_lock_init(&trigger_data->lock); ++ mutex_init(&trigger_data->lock); + + trigger_data->notifier.notifier_call = netdev_trig_notify; + trigger_data->notifier.priority = 10; diff --git a/target/linux/generic/backport-5.15/818-v6.5-01-leds-add-APIs-for-LEDs-hw-control.patch b/target/linux/generic/backport-5.15/818-v6.5-01-leds-add-APIs-for-LEDs-hw-control.patch new file mode 100644 index 000000000..ac1861173 --- /dev/null +++ b/target/linux/generic/backport-5.15/818-v6.5-01-leds-add-APIs-for-LEDs-hw-control.patch @@ -0,0 +1,74 @@ +From ed554d3f945179c5b159bddfad7be34b403fe11a Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:31 +0200 +Subject: [PATCH 01/13] leds: add APIs for LEDs hw control + +Add an option to permit LED driver to declare support for a specific +trigger to use hw control and setup the LED to blink based on specific +provided modes. + +Add APIs for LEDs hw control. These functions will be used to activate +hardware control where a LED will use the provided flags, from an +unique defined supported trigger, to setup the LED to be driven by +hardware. + +Add hw_control_is_supported() to ask the LED driver if the requested +mode by the trigger are supported and the LED can be setup to follow +the requested modes. + +Deactivate hardware blink control by setting brightness to LED_OFF via +the brightness_set() callback. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + include/linux/leds.h | 37 +++++++++++++++++++++++++++++++++++++ + 1 file changed, 37 insertions(+) + +--- a/include/linux/leds.h ++++ b/include/linux/leds.h +@@ -164,6 +164,43 @@ struct led_classdev { + + /* LEDs that have private triggers have this set */ + struct led_hw_trigger_type *trigger_type; ++ ++ /* Unique trigger name supported by LED set in hw control mode */ ++ const char *hw_control_trigger; ++ /* ++ * Check if the LED driver supports the requested mode provided by the ++ * defined supported trigger to setup the LED to hw control mode. ++ * ++ * Return 0 on success. Return -EOPNOTSUPP when the passed flags are not ++ * supported and software fallback needs to be used. ++ * Return a negative error number on any other case for check fail due ++ * to various reason like device not ready or timeouts. ++ */ ++ int (*hw_control_is_supported)(struct led_classdev *led_cdev, ++ unsigned long flags); ++ /* ++ * Activate hardware control, LED driver will use the provided flags ++ * from the supported trigger and setup the LED to be driven by hardware ++ * following the requested mode from the trigger flags. ++ * Deactivate hardware blink control by setting brightness to LED_OFF via ++ * the brightness_set() callback. ++ * ++ * Return 0 on success, a negative error number on flags apply fail. ++ */ ++ int (*hw_control_set)(struct led_classdev *led_cdev, ++ unsigned long flags); ++ /* ++ * Get from the LED driver the current mode that the LED is set in hw ++ * control mode and put them in flags. ++ * Trigger can use this to get the initial state of a LED already set in ++ * hardware blink control. ++ * ++ * Return 0 on success, a negative error number on failing parsing the ++ * initial mode. Error from this function is NOT FATAL as the device ++ * may be in a not supported initial state by the attached LED trigger. ++ */ ++ int (*hw_control_get)(struct led_classdev *led_cdev, ++ unsigned long *flags); + #endif + + #ifdef CONFIG_LEDS_BRIGHTNESS_HW_CHANGED diff --git a/target/linux/generic/backport-5.15/818-v6.5-02-leds-add-API-to-get-attached-device-for-LED-hw-contr.patch b/target/linux/generic/backport-5.15/818-v6.5-02-leds-add-API-to-get-attached-device-for-LED-hw-contr.patch new file mode 100644 index 000000000..1a221727a --- /dev/null +++ b/target/linux/generic/backport-5.15/818-v6.5-02-leds-add-API-to-get-attached-device-for-LED-hw-contr.patch @@ -0,0 +1,37 @@ +From 052c38eb17e866c5b4cd43924e7a5e20167b55c0 Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 29 May 2023 18:32:32 +0200 +Subject: [PATCH 02/13] leds: add API to get attached device for LED hw control + +Some specific LED triggers blink the LED based on events from a device +or subsystem. +For example, an LED could be blinked to indicate a network device is +receiving packets, or a disk is reading blocks. To correctly enable and +request the hw control of the LED, the trigger has to check if the +network interface or block device configured via a /sys/class/led file +match the one the LED driver provide for hw control for. + +Provide an API call to get the device which the LED blinks for. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Signed-off-by: David S. Miller +--- + include/linux/leds.h | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/include/linux/leds.h ++++ b/include/linux/leds.h +@@ -201,6 +201,12 @@ struct led_classdev { + */ + int (*hw_control_get)(struct led_classdev *led_cdev, + unsigned long *flags); ++ /* ++ * Get the device this LED blinks in response to. ++ * e.g. for a PHY LED, it is the network device. If the LED is ++ * not yet associated to a device, return NULL. ++ */ ++ struct device *(*hw_control_get_device)(struct led_classdev *led_cdev); + #endif + + #ifdef CONFIG_LEDS_BRIGHTNESS_HW_CHANGED diff --git a/target/linux/generic/backport-5.15/818-v6.5-03-Documentation-leds-leds-class-Document-new-Hardware-.patch b/target/linux/generic/backport-5.15/818-v6.5-03-Documentation-leds-leds-class-Document-new-Hardware-.patch new file mode 100644 index 000000000..af9fb7fdc --- /dev/null +++ b/target/linux/generic/backport-5.15/818-v6.5-03-Documentation-leds-leds-class-Document-new-Hardware-.patch @@ -0,0 +1,113 @@ +From 8aa2fd7b66980ecd2e45e95af61cf7eafede1211 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:33 +0200 +Subject: [PATCH 03/13] Documentation: leds: leds-class: Document new Hardware + driven LEDs APIs + +Document new Hardware driven LEDs APIs. + +Some LEDs can be programmed to be driven by hardware. This is not +limited to blink but also to turn off or on autonomously. +To support this feature, a LED needs to implement various additional +ops and needs to declare specific support for the supported triggers. + +Add documentation for each required value and API to make hw control +possible and implementable by both LEDs and triggers. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + Documentation/leds/leds-class.rst | 81 +++++++++++++++++++++++++++++++ + 1 file changed, 81 insertions(+) + +--- a/Documentation/leds/leds-class.rst ++++ b/Documentation/leds/leds-class.rst +@@ -169,6 +169,87 @@ Setting the brightness to zero with brig + should completely turn off the LED and cancel the previously programmed + hardware blinking function, if any. + ++Hardware driven LEDs ++==================== ++ ++Some LEDs can be programmed to be driven by hardware. This is not ++limited to blink but also to turn off or on autonomously. ++To support this feature, a LED needs to implement various additional ++ops and needs to declare specific support for the supported triggers. ++ ++With hw control we refer to the LED driven by hardware. ++ ++LED driver must define the following value to support hw control: ++ ++ - hw_control_trigger: ++ unique trigger name supported by the LED in hw control ++ mode. ++ ++LED driver must implement the following API to support hw control: ++ - hw_control_is_supported: ++ check if the flags passed by the supported trigger can ++ be parsed and activate hw control on the LED. ++ ++ Return 0 if the passed flags mask is supported and ++ can be set with hw_control_set(). ++ ++ If the passed flags mask is not supported -EOPNOTSUPP ++ must be returned, the LED trigger will use software ++ fallback in this case. ++ ++ Return a negative error in case of any other error like ++ device not ready or timeouts. ++ ++ - hw_control_set: ++ activate hw control. LED driver will use the provided ++ flags passed from the supported trigger, parse them to ++ a set of mode and setup the LED to be driven by hardware ++ following the requested modes. ++ ++ Set LED_OFF via the brightness_set to deactivate hw control. ++ ++ Return 0 on success, a negative error number on failing to ++ apply flags. ++ ++ - hw_control_get: ++ get active modes from a LED already in hw control, parse ++ them and set in flags the current active flags for the ++ supported trigger. ++ ++ Return 0 on success, a negative error number on failing ++ parsing the initial mode. ++ Error from this function is NOT FATAL as the device may ++ be in a not supported initial state by the attached LED ++ trigger. ++ ++ - hw_control_get_device: ++ return the device associated with the LED driver in ++ hw control. A trigger might use this to match the ++ returned device from this function with a configured ++ device for the trigger as the source for blinking ++ events and correctly enable hw control. ++ (example a netdev trigger configured to blink for a ++ particular dev match the returned dev from get_device ++ to set hw control) ++ ++ Returns a pointer to a struct device or NULL if nothing ++ is currently attached. ++ ++LED driver can activate additional modes by default to workaround the ++impossibility of supporting each different mode on the supported trigger. ++Examples are hardcoding the blink speed to a set interval, enable special ++feature like bypassing blink if some requirements are not met. ++ ++A trigger should first check if the hw control API are supported by the LED ++driver and check if the trigger is supported to verify if hw control is possible, ++use hw_control_is_supported to check if the flags are supported and only at ++the end use hw_control_set to activate hw control. ++ ++A trigger can use hw_control_get to check if a LED is already in hw control ++and init their flags. ++ ++When the LED is in hw control, no software blink is possible and doing so ++will effectively disable hw control. + + Known Issues + ============ diff --git a/target/linux/generic/backport-5.15/818-v6.5-04-leds-trigger-netdev-refactor-code-setting-device-nam.patch b/target/linux/generic/backport-5.15/818-v6.5-04-leds-trigger-netdev-refactor-code-setting-device-nam.patch new file mode 100644 index 000000000..3c804c0b4 --- /dev/null +++ b/target/linux/generic/backport-5.15/818-v6.5-04-leds-trigger-netdev-refactor-code-setting-device-nam.patch @@ -0,0 +1,69 @@ +From 28a6a2ef18ad840a390d519840c303b03040961c Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 29 May 2023 18:32:34 +0200 +Subject: [PATCH 04/13] leds: trigger: netdev: refactor code setting device + name + +Move the code into a helper, ready for it to be called at +other times. No intended behaviour change. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 29 ++++++++++++++++++--------- + 1 file changed, 20 insertions(+), 9 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -104,15 +104,9 @@ static ssize_t device_name_show(struct d + return len; + } + +-static ssize_t device_name_store(struct device *dev, +- struct device_attribute *attr, const char *buf, +- size_t size) ++static int set_device_name(struct led_netdev_data *trigger_data, ++ const char *name, size_t size) + { +- struct led_netdev_data *trigger_data = led_trigger_get_drvdata(dev); +- +- if (size >= IFNAMSIZ) +- return -EINVAL; +- + cancel_delayed_work_sync(&trigger_data->work); + + mutex_lock(&trigger_data->lock); +@@ -122,7 +116,7 @@ static ssize_t device_name_store(struct + trigger_data->net_dev = NULL; + } + +- memcpy(trigger_data->device_name, buf, size); ++ memcpy(trigger_data->device_name, name, size); + trigger_data->device_name[size] = 0; + if (size > 0 && trigger_data->device_name[size - 1] == '\n') + trigger_data->device_name[size - 1] = 0; +@@ -140,6 +134,23 @@ static ssize_t device_name_store(struct + set_baseline_state(trigger_data); + mutex_unlock(&trigger_data->lock); + ++ return 0; ++} ++ ++static ssize_t device_name_store(struct device *dev, ++ struct device_attribute *attr, const char *buf, ++ size_t size) ++{ ++ struct led_netdev_data *trigger_data = led_trigger_get_drvdata(dev); ++ int ret; ++ ++ if (size >= IFNAMSIZ) ++ return -EINVAL; ++ ++ ret = set_device_name(trigger_data, buf, size); ++ ++ if (ret < 0) ++ return ret; + return size; + } + diff --git a/target/linux/generic/backport-5.15/818-v6.5-05-leds-trigger-netdev-introduce-check-for-possible-hw-.patch b/target/linux/generic/backport-5.15/818-v6.5-05-leds-trigger-netdev-introduce-check-for-possible-hw-.patch new file mode 100644 index 000000000..284b51948 --- /dev/null +++ b/target/linux/generic/backport-5.15/818-v6.5-05-leds-trigger-netdev-introduce-check-for-possible-hw-.patch @@ -0,0 +1,54 @@ +From 4fd1b6d47a7a38e81fdc6f8be2ccd4216b3f93db Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:35 +0200 +Subject: [PATCH 05/13] leds: trigger: netdev: introduce check for possible hw + control + +Introduce function to check if the requested mode can use hw control in +preparation for hw control support. Currently everything is handled in +software so can_hw_control will always return false. + +Add knob with the new value hw_control in trigger_data struct to +set hw control possible. Useful for future implementation to implement +in set_baseline_state() the required function to set the requested mode +using LEDs hw control ops and in other function to reject set if hw +control is currently active. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -51,6 +51,7 @@ struct led_netdev_data { + + unsigned long mode; + bool carrier_link_up; ++ bool hw_control; + }; + + enum led_trigger_netdev_modes { +@@ -91,6 +92,11 @@ static void set_baseline_state(struct le + } + } + ++static bool can_hw_control(struct led_netdev_data *trigger_data) ++{ ++ return false; ++} ++ + static ssize_t device_name_show(struct device *dev, + struct device_attribute *attr, char *buf) + { +@@ -204,6 +210,8 @@ static ssize_t netdev_led_attr_store(str + else + clear_bit(bit, &trigger_data->mode); + ++ trigger_data->hw_control = can_hw_control(trigger_data); ++ + set_baseline_state(trigger_data); + + return size; diff --git a/target/linux/generic/backport-5.15/818-v6.5-06-leds-trigger-netdev-add-basic-check-for-hw-control-s.patch b/target/linux/generic/backport-5.15/818-v6.5-06-leds-trigger-netdev-add-basic-check-for-hw-control-s.patch new file mode 100644 index 000000000..09759bc62 --- /dev/null +++ b/target/linux/generic/backport-5.15/818-v6.5-06-leds-trigger-netdev-add-basic-check-for-hw-control-s.patch @@ -0,0 +1,42 @@ +From 6352f25f9fadba59d5df2ba7139495759ccc81d5 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:36 +0200 +Subject: [PATCH 06/13] leds: trigger: netdev: add basic check for hw control + support + +Add basic check for hw control support. Check if the required API are +defined and check if the defined trigger supported in hw control for the +LED driver match netdev. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -92,8 +92,22 @@ static void set_baseline_state(struct le + } + } + ++static bool supports_hw_control(struct led_classdev *led_cdev) ++{ ++ if (!led_cdev->hw_control_get || !led_cdev->hw_control_set || ++ !led_cdev->hw_control_is_supported) ++ return false; ++ ++ return !strcmp(led_cdev->hw_control_trigger, led_cdev->trigger->name); ++} ++ + static bool can_hw_control(struct led_netdev_data *trigger_data) + { ++ struct led_classdev *led_cdev = trigger_data->led_cdev; ++ ++ if (!supports_hw_control(led_cdev)) ++ return false; ++ + return false; + } + diff --git a/target/linux/generic/backport-5.15/818-v6.5-07-leds-trigger-netdev-reject-interval-store-for-hw_con.patch b/target/linux/generic/backport-5.15/818-v6.5-07-leds-trigger-netdev-reject-interval-store-for-hw_con.patch new file mode 100644 index 000000000..663490680 --- /dev/null +++ b/target/linux/generic/backport-5.15/818-v6.5-07-leds-trigger-netdev-reject-interval-store-for-hw_con.patch @@ -0,0 +1,28 @@ +From c84c80c7388f887b10dafd70fc55bc6c5fe9fa5a Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:37 +0200 +Subject: [PATCH 07/13] leds: trigger: netdev: reject interval store for + hw_control + +Reject interval store with hw_control enabled. It's are currently not +supported and MUST be set to the default value with hw control enabled. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -265,6 +265,9 @@ static ssize_t interval_store(struct dev + unsigned long value; + int ret; + ++ if (trigger_data->hw_control) ++ return -EINVAL; ++ + ret = kstrtoul(buf, 0, &value); + if (ret) + return ret; diff --git a/target/linux/generic/backport-5.15/818-v6.5-08-leds-trigger-netdev-add-support-for-LED-hw-control.patch b/target/linux/generic/backport-5.15/818-v6.5-08-leds-trigger-netdev-add-support-for-LED-hw-control.patch new file mode 100644 index 000000000..52faa4809 --- /dev/null +++ b/target/linux/generic/backport-5.15/818-v6.5-08-leds-trigger-netdev-add-support-for-LED-hw-control.patch @@ -0,0 +1,107 @@ +From 7c145a34ba6e380616af93262fcab9fc7261d851 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:38 +0200 +Subject: [PATCH 08/13] leds: trigger: netdev: add support for LED hw control + +Add support for LED hw control for the netdev trigger. + +The trigger on calling set_baseline_state to configure a new mode, will +do various check to verify if hw control can be used for the requested +mode in can_hw_control() function. + +It will first check if the LED driver supports hw control for the netdev +trigger, then will use hw_control_is_supported() and finally will call +hw_control_set() to apply the requested mode. + +To use such mode, interval MUST be set to the default value and net_dev +MUST be set. If one of these 2 value are not valid, hw control will +never be used and normal software fallback is used. + +The default interval value is moved to a define to make sure they are +always synced. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 43 +++++++++++++++++++++++++-- + 1 file changed, 41 insertions(+), 2 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -24,6 +24,8 @@ + #include + #include "../leds.h" + ++#define NETDEV_LED_DEFAULT_INTERVAL 50 ++ + /* + * Configurable sysfs attributes: + * +@@ -68,6 +70,13 @@ static void set_baseline_state(struct le + int current_brightness; + struct led_classdev *led_cdev = trigger_data->led_cdev; + ++ /* Already validated, hw control is possible with the requested mode */ ++ if (trigger_data->hw_control) { ++ led_cdev->hw_control_set(led_cdev, trigger_data->mode); ++ ++ return; ++ } ++ + current_brightness = led_cdev->brightness; + if (current_brightness) + led_cdev->blink_brightness = current_brightness; +@@ -103,12 +112,42 @@ static bool supports_hw_control(struct l + + static bool can_hw_control(struct led_netdev_data *trigger_data) + { ++ unsigned long default_interval = msecs_to_jiffies(NETDEV_LED_DEFAULT_INTERVAL); ++ unsigned int interval = atomic_read(&trigger_data->interval); + struct led_classdev *led_cdev = trigger_data->led_cdev; ++ int ret; + + if (!supports_hw_control(led_cdev)) + return false; + +- return false; ++ /* ++ * Interval must be set to the default ++ * value. Any different value is rejected if in hw ++ * control. ++ */ ++ if (interval != default_interval) ++ return false; ++ ++ /* ++ * net_dev must be set with hw control, otherwise no ++ * blinking can be happening and there is nothing to ++ * offloaded. ++ */ ++ if (!trigger_data->net_dev) ++ return false; ++ ++ /* Check if the requested mode is supported */ ++ ret = led_cdev->hw_control_is_supported(led_cdev, trigger_data->mode); ++ /* Fall back to software blinking if not supported */ ++ if (ret == -EOPNOTSUPP) ++ return false; ++ if (ret) { ++ dev_warn(led_cdev->dev, ++ "Current mode check failed with error %d\n", ret); ++ return false; ++ } ++ ++ return true; + } + + static ssize_t device_name_show(struct device *dev, +@@ -413,7 +452,7 @@ static int netdev_trig_activate(struct l + trigger_data->device_name[0] = 0; + + trigger_data->mode = 0; +- atomic_set(&trigger_data->interval, msecs_to_jiffies(50)); ++ atomic_set(&trigger_data->interval, msecs_to_jiffies(NETDEV_LED_DEFAULT_INTERVAL)); + trigger_data->last_activity = 0; + + led_set_trigger_data(led_cdev, trigger_data); diff --git a/target/linux/generic/backport-5.15/818-v6.5-09-leds-trigger-netdev-validate-configured-netdev.patch b/target/linux/generic/backport-5.15/818-v6.5-09-leds-trigger-netdev-validate-configured-netdev.patch new file mode 100644 index 000000000..c129ffa4f --- /dev/null +++ b/target/linux/generic/backport-5.15/818-v6.5-09-leds-trigger-netdev-validate-configured-netdev.patch @@ -0,0 +1,58 @@ +From 33ec0b53befff2c0a7f3aa19ff08556d60585d6b Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 29 May 2023 18:32:39 +0200 +Subject: [PATCH 09/13] leds: trigger: netdev: validate configured netdev + +The netdev which the LED should blink for is configurable in +/sys/class/led/foo/device_name. Ensure when offloading that the +configured netdev is the same as the netdev the LED is associated +with. If it is not, only perform software blinking. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 24 ++++++++++++++++++++++-- + 1 file changed, 22 insertions(+), 2 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -110,6 +110,24 @@ static bool supports_hw_control(struct l + return !strcmp(led_cdev->hw_control_trigger, led_cdev->trigger->name); + } + ++/* ++ * Validate the configured netdev is the same as the one associated with ++ * the LED driver in hw control. ++ */ ++static bool validate_net_dev(struct led_classdev *led_cdev, ++ struct net_device *net_dev) ++{ ++ struct device *dev = led_cdev->hw_control_get_device(led_cdev); ++ struct net_device *ndev; ++ ++ if (!dev) ++ return false; ++ ++ ndev = to_net_dev(dev); ++ ++ return ndev == net_dev; ++} ++ + static bool can_hw_control(struct led_netdev_data *trigger_data) + { + unsigned long default_interval = msecs_to_jiffies(NETDEV_LED_DEFAULT_INTERVAL); +@@ -131,9 +149,11 @@ static bool can_hw_control(struct led_ne + /* + * net_dev must be set with hw control, otherwise no + * blinking can be happening and there is nothing to +- * offloaded. ++ * offloaded. Additionally, for hw control to be ++ * valid, the configured netdev must be the same as ++ * netdev associated to the LED. + */ +- if (!trigger_data->net_dev) ++ if (!validate_net_dev(led_cdev, trigger_data->net_dev)) + return false; + + /* Check if the requested mode is supported */ diff --git a/target/linux/generic/backport-5.15/818-v6.5-10-leds-trigger-netdev-init-mode-if-hw-control-already-.patch b/target/linux/generic/backport-5.15/818-v6.5-10-leds-trigger-netdev-init-mode-if-hw-control-already-.patch new file mode 100644 index 000000000..e20594c99 --- /dev/null +++ b/target/linux/generic/backport-5.15/818-v6.5-10-leds-trigger-netdev-init-mode-if-hw-control-already-.patch @@ -0,0 +1,53 @@ +From 0316cc5629d15880dd3f097d221c55ca648bcd61 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:40 +0200 +Subject: [PATCH 10/13] leds: trigger: netdev: init mode if hw control already + active + +On netdev trigger activation, hw control may be already active by +default. If this is the case and a device is actually provided by +hw_control_get_device(), init the already active mode and set the +bool to hw_control bool to true to reflect the already set mode in the +trigger_data. + +Co-developed-by: Andrew Lunn +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -454,6 +454,8 @@ static void netdev_trig_work(struct work + static int netdev_trig_activate(struct led_classdev *led_cdev) + { + struct led_netdev_data *trigger_data; ++ unsigned long mode; ++ struct device *dev; + int rc; + + trigger_data = kzalloc(sizeof(struct led_netdev_data), GFP_KERNEL); +@@ -475,6 +477,21 @@ static int netdev_trig_activate(struct l + atomic_set(&trigger_data->interval, msecs_to_jiffies(NETDEV_LED_DEFAULT_INTERVAL)); + trigger_data->last_activity = 0; + ++ /* Check if hw control is active by default on the LED. ++ * Init already enabled mode in hw control. ++ */ ++ if (supports_hw_control(led_cdev) && ++ !led_cdev->hw_control_get(led_cdev, &mode)) { ++ dev = led_cdev->hw_control_get_device(led_cdev); ++ if (dev) { ++ const char *name = dev_name(dev); ++ ++ set_device_name(trigger_data, name, strlen(name)); ++ trigger_data->hw_control = true; ++ trigger_data->mode = mode; ++ } ++ } ++ + led_set_trigger_data(led_cdev, trigger_data); + + rc = register_netdevice_notifier(&trigger_data->notifier); diff --git a/target/linux/generic/backport-5.15/818-v6.5-11-leds-trigger-netdev-expose-netdev-trigger-modes-in-l.patch b/target/linux/generic/backport-5.15/818-v6.5-11-leds-trigger-netdev-expose-netdev-trigger-modes-in-l.patch new file mode 100644 index 000000000..70aed850d --- /dev/null +++ b/target/linux/generic/backport-5.15/818-v6.5-11-leds-trigger-netdev-expose-netdev-trigger-modes-in-l.patch @@ -0,0 +1,54 @@ +From 947acacab5ea151291b861cdfbde16ff5cf1b08c Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:41 +0200 +Subject: [PATCH 11/13] leds: trigger: netdev: expose netdev trigger modes in + linux include + +Expose netdev trigger modes to make them accessible by LED driver that +will support netdev trigger for hw control. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 9 --------- + include/linux/leds.h | 10 ++++++++++ + 2 files changed, 10 insertions(+), 9 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -56,15 +56,6 @@ struct led_netdev_data { + bool hw_control; + }; + +-enum led_trigger_netdev_modes { +- TRIGGER_NETDEV_LINK = 0, +- TRIGGER_NETDEV_TX, +- TRIGGER_NETDEV_RX, +- +- /* Keep last */ +- __TRIGGER_NETDEV_MAX, +-}; +- + static void set_baseline_state(struct led_netdev_data *trigger_data) + { + int current_brightness; +--- a/include/linux/leds.h ++++ b/include/linux/leds.h +@@ -527,6 +527,16 @@ static inline void *led_get_trigger_data + + #endif /* CONFIG_LEDS_TRIGGERS */ + ++/* Trigger specific enum */ ++enum led_trigger_netdev_modes { ++ TRIGGER_NETDEV_LINK = 0, ++ TRIGGER_NETDEV_TX, ++ TRIGGER_NETDEV_RX, ++ ++ /* Keep last */ ++ __TRIGGER_NETDEV_MAX, ++}; ++ + /* Trigger specific functions */ + #ifdef CONFIG_LEDS_TRIGGER_DISK + void ledtrig_disk_activity(bool write); diff --git a/target/linux/generic/backport-5.15/818-v6.5-12-net-dsa-qca8k-implement-hw_control-ops.patch b/target/linux/generic/backport-5.15/818-v6.5-12-net-dsa-qca8k-implement-hw_control-ops.patch new file mode 100644 index 000000000..ad76d89b7 --- /dev/null +++ b/target/linux/generic/backport-5.15/818-v6.5-12-net-dsa-qca8k-implement-hw_control-ops.patch @@ -0,0 +1,200 @@ +From e0256648c831af13cbfe4a1787327fcec01c2807 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:42 +0200 +Subject: [PATCH 12/13] net: dsa: qca8k: implement hw_control ops + +Implement hw_control ops to drive Switch LEDs based on hardware events. + +Netdev trigger is the declared supported trigger for hw control +operation and supports the following mode: +- tx +- rx + +When hw_control_set is called, LEDs are set to follow the requested +mode. +Each LEDs will blink at 4Hz by default. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca/qca8k-leds.c | 154 +++++++++++++++++++++++++++++++ + 1 file changed, 154 insertions(+) + +--- a/drivers/net/dsa/qca/qca8k-leds.c ++++ b/drivers/net/dsa/qca/qca8k-leds.c +@@ -32,6 +32,43 @@ qca8k_get_enable_led_reg(int port_num, i + } + + static int ++qca8k_get_control_led_reg(int port_num, int led_num, struct qca8k_led_pattern_en *reg_info) ++{ ++ reg_info->reg = QCA8K_LED_CTRL_REG(led_num); ++ ++ /* 6 total control rule: ++ * 3 control rules for phy0-3 that applies to all their leds ++ * 3 control rules for phy4 ++ */ ++ if (port_num == 4) ++ reg_info->shift = QCA8K_LED_PHY4_CONTROL_RULE_SHIFT; ++ else ++ reg_info->shift = QCA8K_LED_PHY0123_CONTROL_RULE_SHIFT; ++ ++ return 0; ++} ++ ++static int ++qca8k_parse_netdev(unsigned long rules, u32 *offload_trigger) ++{ ++ /* Parsing specific to netdev trigger */ ++ if (test_bit(TRIGGER_NETDEV_TX, &rules)) ++ *offload_trigger |= QCA8K_LED_TX_BLINK_MASK; ++ if (test_bit(TRIGGER_NETDEV_RX, &rules)) ++ *offload_trigger |= QCA8K_LED_RX_BLINK_MASK; ++ ++ if (rules && !*offload_trigger) ++ return -EOPNOTSUPP; ++ ++ /* Enable some default rule by default to the requested mode: ++ * - Blink at 4Hz by default ++ */ ++ *offload_trigger |= QCA8K_LED_BLINK_4HZ; ++ ++ return 0; ++} ++ ++static int + qca8k_led_brightness_set(struct qca8k_led *led, + enum led_brightness brightness) + { +@@ -165,6 +202,119 @@ qca8k_cled_blink_set(struct led_classdev + } + + static int ++qca8k_cled_trigger_offload(struct led_classdev *ldev, bool enable) ++{ ++ struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev); ++ ++ struct qca8k_led_pattern_en reg_info; ++ struct qca8k_priv *priv = led->priv; ++ u32 mask, val = QCA8K_LED_ALWAYS_OFF; ++ ++ qca8k_get_enable_led_reg(led->port_num, led->led_num, ®_info); ++ ++ if (enable) ++ val = QCA8K_LED_RULE_CONTROLLED; ++ ++ if (led->port_num == 0 || led->port_num == 4) { ++ mask = QCA8K_LED_PATTERN_EN_MASK; ++ val <<= QCA8K_LED_PATTERN_EN_SHIFT; ++ } else { ++ mask = QCA8K_LED_PHY123_PATTERN_EN_MASK; ++ } ++ ++ return regmap_update_bits(priv->regmap, reg_info.reg, mask << reg_info.shift, ++ val << reg_info.shift); ++} ++ ++static bool ++qca8k_cled_hw_control_status(struct led_classdev *ldev) ++{ ++ struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev); ++ ++ struct qca8k_led_pattern_en reg_info; ++ struct qca8k_priv *priv = led->priv; ++ u32 val; ++ ++ qca8k_get_enable_led_reg(led->port_num, led->led_num, ®_info); ++ ++ regmap_read(priv->regmap, reg_info.reg, &val); ++ ++ val >>= reg_info.shift; ++ ++ if (led->port_num == 0 || led->port_num == 4) { ++ val &= QCA8K_LED_PATTERN_EN_MASK; ++ val >>= QCA8K_LED_PATTERN_EN_SHIFT; ++ } else { ++ val &= QCA8K_LED_PHY123_PATTERN_EN_MASK; ++ } ++ ++ return val == QCA8K_LED_RULE_CONTROLLED; ++} ++ ++static int ++qca8k_cled_hw_control_is_supported(struct led_classdev *ldev, unsigned long rules) ++{ ++ u32 offload_trigger = 0; ++ ++ return qca8k_parse_netdev(rules, &offload_trigger); ++} ++ ++static int ++qca8k_cled_hw_control_set(struct led_classdev *ldev, unsigned long rules) ++{ ++ struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev); ++ struct qca8k_led_pattern_en reg_info; ++ struct qca8k_priv *priv = led->priv; ++ u32 offload_trigger = 0; ++ int ret; ++ ++ ret = qca8k_parse_netdev(rules, &offload_trigger); ++ if (ret) ++ return ret; ++ ++ ret = qca8k_cled_trigger_offload(ldev, true); ++ if (ret) ++ return ret; ++ ++ qca8k_get_control_led_reg(led->port_num, led->led_num, ®_info); ++ ++ return regmap_update_bits(priv->regmap, reg_info.reg, ++ QCA8K_LED_RULE_MASK << reg_info.shift, ++ offload_trigger << reg_info.shift); ++} ++ ++static int ++qca8k_cled_hw_control_get(struct led_classdev *ldev, unsigned long *rules) ++{ ++ struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev); ++ struct qca8k_led_pattern_en reg_info; ++ struct qca8k_priv *priv = led->priv; ++ u32 val; ++ int ret; ++ ++ /* With hw control not active return err */ ++ if (!qca8k_cled_hw_control_status(ldev)) ++ return -EINVAL; ++ ++ qca8k_get_control_led_reg(led->port_num, led->led_num, ®_info); ++ ++ ret = regmap_read(priv->regmap, reg_info.reg, &val); ++ if (ret) ++ return ret; ++ ++ val >>= reg_info.shift; ++ val &= QCA8K_LED_RULE_MASK; ++ ++ /* Parsing specific to netdev trigger */ ++ if (val & QCA8K_LED_TX_BLINK_MASK) ++ set_bit(TRIGGER_NETDEV_TX, rules); ++ if (val & QCA8K_LED_RX_BLINK_MASK) ++ set_bit(TRIGGER_NETDEV_RX, rules); ++ ++ return 0; ++} ++ ++static int + qca8k_parse_port_leds(struct qca8k_priv *priv, struct fwnode_handle *port, int port_num) + { + struct fwnode_handle *led = NULL, *leds = NULL; +@@ -224,6 +374,10 @@ qca8k_parse_port_leds(struct qca8k_priv + port_led->cdev.max_brightness = 1; + port_led->cdev.brightness_set_blocking = qca8k_cled_brightness_set_blocking; + port_led->cdev.blink_set = qca8k_cled_blink_set; ++ port_led->cdev.hw_control_is_supported = qca8k_cled_hw_control_is_supported; ++ port_led->cdev.hw_control_set = qca8k_cled_hw_control_set; ++ port_led->cdev.hw_control_get = qca8k_cled_hw_control_get; ++ port_led->cdev.hw_control_trigger = "netdev"; + init_data.default_label = ":port"; + init_data.fwnode = led; + init_data.devname_mandatory = true; diff --git a/target/linux/generic/backport-5.15/818-v6.5-13-net-dsa-qca8k-add-op-to-get-ports-netdev.patch b/target/linux/generic/backport-5.15/818-v6.5-13-net-dsa-qca8k-add-op-to-get-ports-netdev.patch new file mode 100644 index 000000000..feb6b9e1e --- /dev/null +++ b/target/linux/generic/backport-5.15/818-v6.5-13-net-dsa-qca8k-add-op-to-get-ports-netdev.patch @@ -0,0 +1,70 @@ +From 4f53c27f772e27e4cf4e5507d6f4d5980002cb6a Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 29 May 2023 18:32:43 +0200 +Subject: [PATCH 13/13] net: dsa: qca8k: add op to get ports netdev + +In order that the LED trigger can blink the switch MAC ports LED, it +needs to know the netdev associated to the port. Add the callback to +return the struct device of the netdev. + +Add an helper function qca8k_phy_to_port() to convert the phy back to +dsa_port index, as we reference LED port based on the internal PHY +index and needs to be converted back. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca/qca8k-leds.c | 27 +++++++++++++++++++++++++++ + 1 file changed, 27 insertions(+) + +--- a/drivers/net/dsa/qca/qca8k-leds.c ++++ b/drivers/net/dsa/qca/qca8k-leds.c +@@ -5,6 +5,18 @@ + #include "qca8k.h" + #include "qca8k_leds.h" + ++static u32 qca8k_phy_to_port(int phy) ++{ ++ /* Internal PHY 0 has port at index 1. ++ * Internal PHY 1 has port at index 2. ++ * Internal PHY 2 has port at index 3. ++ * Internal PHY 3 has port at index 4. ++ * Internal PHY 4 has port at index 5. ++ */ ++ ++ return phy + 1; ++} ++ + static int + qca8k_get_enable_led_reg(int port_num, int led_num, struct qca8k_led_pattern_en *reg_info) + { +@@ -314,6 +326,20 @@ qca8k_cled_hw_control_get(struct led_cla + return 0; + } + ++static struct device *qca8k_cled_hw_control_get_device(struct led_classdev *ldev) ++{ ++ struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev); ++ struct qca8k_priv *priv = led->priv; ++ struct dsa_port *dp; ++ ++ dp = dsa_to_port(priv->ds, qca8k_phy_to_port(led->port_num)); ++ if (!dp) ++ return NULL; ++ if (dp->slave) ++ return &dp->slave->dev; ++ return NULL; ++} ++ + static int + qca8k_parse_port_leds(struct qca8k_priv *priv, struct fwnode_handle *port, int port_num) + { +@@ -377,6 +403,7 @@ qca8k_parse_port_leds(struct qca8k_priv + port_led->cdev.hw_control_is_supported = qca8k_cled_hw_control_is_supported; + port_led->cdev.hw_control_set = qca8k_cled_hw_control_set; + port_led->cdev.hw_control_get = qca8k_cled_hw_control_get; ++ port_led->cdev.hw_control_get_device = qca8k_cled_hw_control_get_device; + port_led->cdev.hw_control_trigger = "netdev"; + init_data.default_label = ":port"; + init_data.fwnode = led; diff --git a/target/linux/generic/backport-5.15/821-v5.16-Bluetooth-btusb-Support-public-address-configuration.patch b/target/linux/generic/backport-5.15/821-v5.16-Bluetooth-btusb-Support-public-address-configuration.patch index 725af4b52..4a63b89f5 100644 --- a/target/linux/generic/backport-5.15/821-v5.16-Bluetooth-btusb-Support-public-address-configuration.patch +++ b/target/linux/generic/backport-5.15/821-v5.16-Bluetooth-btusb-Support-public-address-configuration.patch @@ -17,7 +17,7 @@ Signed-off-by: Marcel Holtmann --- a/drivers/bluetooth/btusb.c +++ b/drivers/bluetooth/btusb.c -@@ -2287,6 +2287,23 @@ struct btmtk_section_map { +@@ -2289,6 +2289,23 @@ struct btmtk_section_map { }; } __packed; @@ -41,7 +41,7 @@ Signed-off-by: Marcel Holtmann static void btusb_mtk_wmt_recv(struct urb *urb) { struct hci_dev *hdev = urb->context; -@@ -3941,6 +3958,7 @@ static int btusb_probe(struct usb_interf +@@ -3943,6 +3960,7 @@ static int btusb_probe(struct usb_interf hdev->shutdown = btusb_mtk_shutdown; hdev->manufacturer = 70; hdev->cmd_timeout = btusb_mtk_cmd_timeout; diff --git a/target/linux/generic/backport-5.15/822-v5.17-Bluetooth-btusb-Fix-application-of-sizeof-to-pointer.patch b/target/linux/generic/backport-5.15/822-v5.17-Bluetooth-btusb-Fix-application-of-sizeof-to-pointer.patch index d72866eab..d21adada9 100644 --- a/target/linux/generic/backport-5.15/822-v5.17-Bluetooth-btusb-Fix-application-of-sizeof-to-pointer.patch +++ b/target/linux/generic/backport-5.15/822-v5.17-Bluetooth-btusb-Fix-application-of-sizeof-to-pointer.patch @@ -18,7 +18,7 @@ Signed-off-by: Marcel Holtmann --- a/drivers/bluetooth/btusb.c +++ b/drivers/bluetooth/btusb.c -@@ -2292,7 +2292,7 @@ static int btusb_set_bdaddr_mtk(struct h +@@ -2294,7 +2294,7 @@ static int btusb_set_bdaddr_mtk(struct h struct sk_buff *skb; long ret; diff --git a/target/linux/generic/backport-5.15/823-v5.18-Bluetooth-btusb-Add-a-new-PID-VID-13d3-3567-for-MT79.patch b/target/linux/generic/backport-5.15/823-v5.18-Bluetooth-btusb-Add-a-new-PID-VID-13d3-3567-for-MT79.patch index ebb6cc471..30492ac48 100644 --- a/target/linux/generic/backport-5.15/823-v5.18-Bluetooth-btusb-Add-a-new-PID-VID-13d3-3567-for-MT79.patch +++ b/target/linux/generic/backport-5.15/823-v5.18-Bluetooth-btusb-Add-a-new-PID-VID-13d3-3567-for-MT79.patch @@ -58,7 +58,7 @@ Signed-off-by: Marcel Holtmann --- a/drivers/bluetooth/btusb.c +++ b/drivers/bluetooth/btusb.c -@@ -476,6 +476,9 @@ static const struct usb_device_id blackl +@@ -478,6 +478,9 @@ static const struct usb_device_id blackl { USB_DEVICE(0x13d3, 0x3564), .driver_info = BTUSB_MEDIATEK | BTUSB_WIDEBAND_SPEECH | BTUSB_VALID_LE_STATES }, diff --git a/target/linux/generic/backport-5.15/824-v5.19-Bluetooth-btusb-Add-a-new-PID-VID-0489-e0c8-for-MT79.patch b/target/linux/generic/backport-5.15/824-v5.19-Bluetooth-btusb-Add-a-new-PID-VID-0489-e0c8-for-MT79.patch index a8c7ca003..6bcd81c3b 100644 --- a/target/linux/generic/backport-5.15/824-v5.19-Bluetooth-btusb-Add-a-new-PID-VID-0489-e0c8-for-MT79.patch +++ b/target/linux/generic/backport-5.15/824-v5.19-Bluetooth-btusb-Add-a-new-PID-VID-0489-e0c8-for-MT79.patch @@ -56,7 +56,7 @@ Signed-off-by: Marcel Holtmann --- a/drivers/bluetooth/btusb.c +++ b/drivers/bluetooth/btusb.c -@@ -467,6 +467,9 @@ static const struct usb_device_id blackl +@@ -469,6 +469,9 @@ static const struct usb_device_id blackl BTUSB_VALID_LE_STATES }, /* Additional MediaTek MT7921 Bluetooth devices */ diff --git a/target/linux/generic/backport-5.15/825-v6.1-Bluetooth-btusb-Add-a-new-VID-PID-0e8d-0608-for-MT79.patch b/target/linux/generic/backport-5.15/825-v6.1-Bluetooth-btusb-Add-a-new-VID-PID-0e8d-0608-for-MT79.patch index b46e6926d..b6b76f64f 100644 --- a/target/linux/generic/backport-5.15/825-v6.1-Bluetooth-btusb-Add-a-new-VID-PID-0e8d-0608-for-MT79.patch +++ b/target/linux/generic/backport-5.15/825-v6.1-Bluetooth-btusb-Add-a-new-VID-PID-0e8d-0608-for-MT79.patch @@ -54,7 +54,7 @@ Signed-off-by: Luiz Augusto von Dentz --- a/drivers/bluetooth/btusb.c +++ b/drivers/bluetooth/btusb.c -@@ -485,6 +485,9 @@ static const struct usb_device_id blackl +@@ -487,6 +487,9 @@ static const struct usb_device_id blackl { USB_DEVICE(0x0489, 0xe0cd), .driver_info = BTUSB_MEDIATEK | BTUSB_WIDEBAND_SPEECH | BTUSB_VALID_LE_STATES }, diff --git a/target/linux/generic/backport-5.15/890-v6.1-mtd-spinand-winbond-fix-flash-detection.patch b/target/linux/generic/backport-5.15/890-v6.2-mtd-spinand-winbond-fix-flash-detection.patch similarity index 100% rename from target/linux/generic/backport-5.15/890-v6.1-mtd-spinand-winbond-fix-flash-detection.patch rename to target/linux/generic/backport-5.15/890-v6.2-mtd-spinand-winbond-fix-flash-detection.patch diff --git a/target/linux/generic/backport-5.15/891-v6.1-mtd-spinand-winbond-add-W25N02KV.patch b/target/linux/generic/backport-5.15/891-v6.2-mtd-spinand-winbond-add-W25N02KV.patch similarity index 100% rename from target/linux/generic/backport-5.15/891-v6.1-mtd-spinand-winbond-add-W25N02KV.patch rename to target/linux/generic/backport-5.15/891-v6.2-mtd-spinand-winbond-add-W25N02KV.patch diff --git a/target/linux/generic/backport-5.4/746-v5.5-net-dsa-mv88e6xxx-Split-monitor-port-configuration.patch b/target/linux/generic/backport-5.4/746-v5.5-net-dsa-mv88e6xxx-Split-monitor-port-configuration.patch index 86885c2b2..b5c0ac505 100644 --- a/target/linux/generic/backport-5.4/746-v5.5-net-dsa-mv88e6xxx-Split-monitor-port-configuration.patch +++ b/target/linux/generic/backport-5.4/746-v5.5-net-dsa-mv88e6xxx-Split-monitor-port-configuration.patch @@ -49,7 +49,7 @@ Signed-off-by: David S. Miller enum mv88e6xxx_frame_mode { MV88E6XXX_FRAME_MODE_NORMAL, MV88E6XXX_FRAME_MODE_DSA, -@@ -464,7 +469,9 @@ struct mv88e6xxx_ops { +@@ -465,7 +470,9 @@ struct mv88e6xxx_ops { int (*stats_get_stats)(struct mv88e6xxx_chip *chip, int port, uint64_t *data); int (*set_cpu_port)(struct mv88e6xxx_chip *chip, int port); diff --git a/target/linux/generic/backport-5.4/747-v5.5-net-dsa-mv88e6xxx-Add-support-for-port-mirroring.patch b/target/linux/generic/backport-5.4/747-v5.5-net-dsa-mv88e6xxx-Add-support-for-port-mirroring.patch index 0e69fb292..3ac7a4f0f 100644 --- a/target/linux/generic/backport-5.4/747-v5.5-net-dsa-mv88e6xxx-Add-support-for-port-mirroring.patch +++ b/target/linux/generic/backport-5.4/747-v5.5-net-dsa-mv88e6xxx-Add-support-for-port-mirroring.patch @@ -25,7 +25,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c -@@ -4944,6 +4944,80 @@ static int mv88e6xxx_port_mdb_del(struct +@@ -4969,6 +4969,80 @@ static int mv88e6xxx_port_mdb_del(struct return err; } @@ -106,7 +106,7 @@ Signed-off-by: David S. Miller static int mv88e6xxx_port_egress_floods(struct dsa_switch *ds, int port, bool unicast, bool multicast) { -@@ -4998,6 +5072,8 @@ static const struct dsa_switch_ops mv88e +@@ -5023,6 +5097,8 @@ static const struct dsa_switch_ops mv88e .port_mdb_prepare = mv88e6xxx_port_mdb_prepare, .port_mdb_add = mv88e6xxx_port_mdb_add, .port_mdb_del = mv88e6xxx_port_mdb_del, @@ -117,7 +117,7 @@ Signed-off-by: David S. Miller .port_hwtstamp_set = mv88e6xxx_port_hwtstamp_set, --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h -@@ -232,6 +232,8 @@ struct mv88e6xxx_port { +@@ -233,6 +233,8 @@ struct mv88e6xxx_port { u64 vtu_member_violation; u64 vtu_miss_violation; u8 cmode; @@ -126,7 +126,7 @@ Signed-off-by: David S. Miller unsigned int serdes_irq; }; -@@ -315,6 +317,10 @@ struct mv88e6xxx_chip { +@@ -316,6 +318,10 @@ struct mv88e6xxx_chip { u16 evcap_config; u16 enable_count; diff --git a/target/linux/generic/backport-5.4/748-v5.5-net-dsa-mv88e6xxx-fix-broken-if-statement-because-of.patch b/target/linux/generic/backport-5.4/748-v5.5-net-dsa-mv88e6xxx-fix-broken-if-statement-because-of.patch index 017a68958..5d68ba579 100644 --- a/target/linux/generic/backport-5.4/748-v5.5-net-dsa-mv88e6xxx-fix-broken-if-statement-because-of.patch +++ b/target/linux/generic/backport-5.4/748-v5.5-net-dsa-mv88e6xxx-fix-broken-if-statement-because-of.patch @@ -19,7 +19,7 @@ Signed-off-by: David S. Miller --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c -@@ -5011,7 +5011,7 @@ static void mv88e6xxx_port_mirror_del(st +@@ -5036,7 +5036,7 @@ static void mv88e6xxx_port_mirror_del(st if (chip->info->ops->set_egress_port(chip, direction, dsa_upstream_port(ds, diff --git a/target/linux/generic/backport-5.4/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch b/target/linux/generic/backport-5.4/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch index 0cb3696b2..4aa71d6a3 100644 --- a/target/linux/generic/backport-5.4/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch +++ b/target/linux/generic/backport-5.4/782-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch @@ -1000,7 +1000,7 @@ Signed-off-by: David S. Miller u32 mahr = ravb_read(ndev, MAHR); u32 malr = ravb_read(ndev, MALR); -@@ -2165,7 +2167,7 @@ static int ravb_probe(struct platform_de +@@ -2168,7 +2170,7 @@ static int ravb_probe(struct platform_de priv->msg_enable = RAVB_DEF_MSG_ENABLE; /* Read and set MAC address */ @@ -1775,7 +1775,7 @@ Signed-off-by: David S. Miller eth_hw_addr_inherit(slave_dev, master); --- a/net/ethernet/eth.c +++ b/net/ethernet/eth.c -@@ -550,13 +550,14 @@ unsigned char * __weak arch_get_platform +@@ -540,13 +540,14 @@ unsigned char * __weak arch_get_platform int eth_platform_get_mac_address(struct device *dev, u8 *mac_addr) { @@ -1815,7 +1815,7 @@ Signed-off-by: David S. Miller } --- a/drivers/net/usb/smsc95xx.c +++ b/drivers/net/usb/smsc95xx.c -@@ -901,11 +901,12 @@ static int smsc95xx_ioctl(struct net_dev +@@ -903,11 +903,12 @@ static int smsc95xx_ioctl(struct net_dev static void smsc95xx_init_mac_address(struct usbnet *dev) { @@ -1833,7 +1833,7 @@ Signed-off-by: David S. Miller } --- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c +++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c -@@ -3459,10 +3459,11 @@ static int bcmgenet_probe(struct platfor +@@ -3478,10 +3478,11 @@ static int bcmgenet_probe(struct platfor const struct of_device_id *of_id = NULL; struct bcmgenet_priv *priv; struct net_device *dev; @@ -1846,7 +1846,7 @@ Signed-off-by: David S. Miller /* Up to GENET_MAX_MQ_CNT + 1 TX queues and RX queues */ dev = alloc_etherdev_mqs(sizeof(*priv), GENET_MAX_MQ_CNT + 1, -@@ -3489,14 +3490,15 @@ static int bcmgenet_probe(struct platfor +@@ -3508,14 +3509,15 @@ static int bcmgenet_probe(struct platfor } if (dn) { @@ -1865,7 +1865,7 @@ Signed-off-by: David S. Miller } priv->base = devm_platform_ioremap_resource(pdev, 0); -@@ -3509,7 +3511,6 @@ static int bcmgenet_probe(struct platfor +@@ -3529,7 +3531,6 @@ static int bcmgenet_probe(struct platfor SET_NETDEV_DEV(dev, &pdev->dev); dev_set_drvdata(&pdev->dev, dev); diff --git a/target/linux/generic/backport-6.1/730-07-v6.3-net-ethernet-mtk_eth_soc-compile-out-netsys-v2-code-.patch b/target/linux/generic/backport-6.1/730-07-v6.3-net-ethernet-mtk_eth_soc-compile-out-netsys-v2-code-.patch deleted file mode 100644 index 31a8ca3ea..000000000 --- a/target/linux/generic/backport-6.1/730-07-v6.3-net-ethernet-mtk_eth_soc-compile-out-netsys-v2-code-.patch +++ /dev/null @@ -1,28 +0,0 @@ -From: Felix Fietkau -Date: Thu, 27 Oct 2022 23:39:52 +0200 -Subject: [PATCH] net: ethernet: mtk_eth_soc: compile out netsys v2 code - on mt7621 - -Avoid some branches in the hot path on low-end devices with limited CPU power, -and reduce code size - -Signed-off-by: Felix Fietkau ---- - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -921,7 +921,13 @@ enum mkt_eth_capabilities { - #define MTK_MUX_GMAC12_TO_GEPHY_SGMII \ - (MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII | MTK_MUX) - --#define MTK_HAS_CAPS(caps, _x) (((caps) & (_x)) == (_x)) -+#ifdef CONFIG_SOC_MT7621 -+#define MTK_CAP_MASK MTK_NETSYS_V2 -+#else -+#define MTK_CAP_MASK 0 -+#endif -+ -+#define MTK_HAS_CAPS(caps, _x) (((caps) & (_x) & ~(MTK_CAP_MASK)) == (_x)) - - #define MT7621_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | \ - MTK_GMAC2_RGMII | MTK_SHARED_INT | \ diff --git a/target/linux/generic/backport-6.1/730-09-v6.3-net-ethernet-mtk_eth_soc-fix-VLAN-rx-hardware-accele.patch b/target/linux/generic/backport-6.1/730-09-v6.3-net-ethernet-mtk_eth_soc-fix-VLAN-rx-hardware-accele.patch index 293c95031..b8e3452f3 100644 --- a/target/linux/generic/backport-6.1/730-09-v6.3-net-ethernet-mtk_eth_soc-fix-VLAN-rx-hardware-accele.patch +++ b/target/linux/generic/backport-6.1/730-09-v6.3-net-ethernet-mtk_eth_soc-fix-VLAN-rx-hardware-accele.patch @@ -181,7 +181,7 @@ Signed-off-by: Felix Fietkau /* CDMP Ingress Control Register */ #define MTK_CDMP_IG_CTRL 0x400 #define MTK_CDMP_STAG_EN BIT(0) -@@ -1170,6 +1176,8 @@ struct mtk_eth { +@@ -1164,6 +1170,8 @@ struct mtk_eth { int ip_align; diff --git a/target/linux/generic/backport-6.1/733-v6.2-12-net-mediatek-sgmii-ensure-the-SGMII-PHY-is-powered-d.patch b/target/linux/generic/backport-6.1/733-v6.2-12-net-mediatek-sgmii-ensure-the-SGMII-PHY-is-powered-d.patch index 7db59ad87..a02c583de 100644 --- a/target/linux/generic/backport-6.1/733-v6.2-12-net-mediatek-sgmii-ensure-the-SGMII-PHY-is-powered-d.patch +++ b/target/linux/generic/backport-6.1/733-v6.2-12-net-mediatek-sgmii-ensure-the-SGMII-PHY-is-powered-d.patch @@ -34,7 +34,7 @@ Signed-off-by: Jakub Kicinski --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -1073,11 +1073,13 @@ struct mtk_soc_data { +@@ -1067,11 +1067,13 @@ struct mtk_soc_data { * @regmap: The register map pointing at the range used to setup * SGMII modes * @ana_rgc3: The offset refers to register ANA_RGC3 related to regmap diff --git a/target/linux/generic/backport-6.1/733-v6.3-18-net-ethernet-mtk_eth_soc-add-support-for-MT7981.patch b/target/linux/generic/backport-6.1/733-v6.3-18-net-ethernet-mtk_eth_soc-add-support-for-MT7981.patch index e67eec3f2..a1247218b 100644 --- a/target/linux/generic/backport-6.1/733-v6.3-18-net-ethernet-mtk_eth_soc-add-support-for-MT7981.patch +++ b/target/linux/generic/backport-6.1/733-v6.3-18-net-ethernet-mtk_eth_soc-add-support-for-MT7981.patch @@ -14,6 +14,12 @@ new device-tree attribute 'mediatek,pn_swap' to support them. Signed-off-by: Daniel Golle Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_path.c | 14 +++++++-- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 21 +++++++++++++ + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 31 ++++++++++++++++++++ + drivers/net/ethernet/mediatek/mtk_sgmii.c | 10 +++++++ + 4 files changed, 73 insertions(+), 3 deletions(-) --- a/drivers/net/ethernet/mediatek/mtk_eth_path.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_path.c @@ -145,7 +151,7 @@ Signed-off-by: Jakub Kicinski #define MTK_ETH_MUX_GDM1_TO_GMAC1_ESW \ BIT(MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT) -@@ -966,6 +990,11 @@ enum mkt_eth_capabilities { +@@ -960,6 +984,11 @@ enum mkt_eth_capabilities { MTK_MUX_U3_GMAC2_TO_QPHY | \ MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA) @@ -157,7 +163,7 @@ Signed-off-by: Jakub Kicinski #define MT7986_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \ MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ MTK_NETSYS_V2 | MTK_RSTCTRL_PPE1) -@@ -1079,12 +1108,14 @@ struct mtk_soc_data { +@@ -1073,12 +1102,14 @@ struct mtk_soc_data { * @ana_rgc3: The offset refers to register ANA_RGC3 related to regmap * @interface: Currently configured interface mode * @pcs: Phylink PCS structure diff --git a/target/linux/generic/backport-6.1/733-v6.3-20-net-ethernet-mtk_eth_soc-switch-to-external-PCS-driv.patch b/target/linux/generic/backport-6.1/733-v6.3-20-net-ethernet-mtk_eth_soc-switch-to-external-PCS-driv.patch index c415a1a29..110944658 100644 --- a/target/linux/generic/backport-6.1/733-v6.3-20-net-ethernet-mtk_eth_soc-switch-to-external-PCS-driv.patch +++ b/target/linux/generic/backport-6.1/733-v6.3-20-net-ethernet-mtk_eth_soc-switch-to-external-PCS-driv.patch @@ -228,7 +228,7 @@ Signed-off-by: Jakub Kicinski /* Infrasys subsystem config registers */ #define INFRA_MISC2 0x70c #define CO_QPHY_SEL BIT(0) -@@ -1108,31 +1049,6 @@ struct mtk_soc_data { +@@ -1102,31 +1043,6 @@ struct mtk_soc_data { /* currently no SoC has more than 2 macs */ #define MTK_MAX_DEVS 2 @@ -260,7 +260,7 @@ Signed-off-by: Jakub Kicinski /* struct mtk_eth - This is the main datasructure for holding the state * of the driver * @dev: The device pointer -@@ -1152,6 +1068,7 @@ struct mtk_sgmii { +@@ -1146,6 +1062,7 @@ struct mtk_sgmii { * MII modes * @infra: The register map pointing at the range used to setup * SGMII and GePHY path @@ -268,7 +268,7 @@ Signed-off-by: Jakub Kicinski * @pctl: The register map pointing at the range used to setup * GMAC port drive/slew values * @dma_refcnt: track how many netdevs are using the DMA engine -@@ -1192,8 +1109,8 @@ struct mtk_eth { +@@ -1186,8 +1103,8 @@ struct mtk_eth { u32 msg_enable; unsigned long sysclk; struct regmap *ethsys; @@ -279,7 +279,7 @@ Signed-off-by: Jakub Kicinski struct regmap *pctl; bool hwlro; refcount_t dma_refcnt; -@@ -1355,10 +1272,6 @@ void mtk_stats_update_mac(struct mtk_mac +@@ -1349,10 +1266,6 @@ void mtk_stats_update_mac(struct mtk_mac void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg); u32 mtk_r32(struct mtk_eth *eth, unsigned reg); diff --git a/target/linux/generic/pending-5.15/731-net-ethernet-mediatek-ppe-add-support-for-flow-accou.patch b/target/linux/generic/backport-6.1/733-v6.4-23-net-ethernet-mtk_eth_soc-ppe-add-support-for-flow-ac.patch similarity index 78% rename from target/linux/generic/pending-5.15/731-net-ethernet-mediatek-ppe-add-support-for-flow-accou.patch rename to target/linux/generic/backport-6.1/733-v6.4-23-net-ethernet-mtk_eth_soc-ppe-add-support-for-flow-ac.patch index 7eae25188..93eaffa19 100644 --- a/target/linux/generic/pending-5.15/731-net-ethernet-mediatek-ppe-add-support-for-flow-accou.patch +++ b/target/linux/generic/backport-6.1/733-v6.4-23-net-ethernet-mtk_eth_soc-ppe-add-support-for-flow-ac.patch @@ -1,59 +1,33 @@ -From patchwork Wed Nov 2 00:58:01 2022 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Daniel Golle -X-Patchwork-Id: 13027653 -X-Patchwork-Delegate: kuba@kernel.org -Return-Path: -Date: Wed, 2 Nov 2022 00:58:01 +0000 +From f601293f37c4be618c5efaef85d2ee21f97e82e0 Mon Sep 17 00:00:00 2001 From: Daniel Golle -To: Felix Fietkau , John Crispin , - Sean Wang , - Mark Lee , - "David S. Miller" , - Eric Dumazet , - Jakub Kicinski , - Paolo Abeni , - Matthias Brugger , - netdev@vger.kernel.org, linux-arm-kernel@lists.infradead.org, - linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org -Subject: [PATCH v4] net: ethernet: mediatek: ppe: add support for flow +Date: Sun, 19 Mar 2023 12:57:35 +0000 +Subject: [PATCH 092/250] net: ethernet: mtk_eth_soc: ppe: add support for flow accounting -Message-ID: MIME-Version: 1.0 -Content-Disposition: inline -Precedence: bulk -List-ID: -X-Mailing-List: netdev@vger.kernel.org -X-Patchwork-Delegate: kuba@kernel.org +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit The PPE units found in MT7622 and newer support packet and byte -accounting of hw-offloaded flows. Add support for reading those -counters as found in MediaTek's SDK[1]. +accounting of hw-offloaded flows. Add support for reading those counters +as found in MediaTek's SDK[1]. [1]: https://git01.mediatek.com/plugins/gitiles/openwrt/feeds/mtk-openwrt-feeds/+/bc6a6a375c800dc2b80e1a325a2c732d1737df92 +Tested-by: Bjørn Mork Signed-off-by: Daniel Golle +Signed-off-by: Jakub Kicinski --- -v4: declare function mtk_mib_entry_read as static -v3: don't bother to set 'false' values in any zero-initialized struct - use mtk_foe_entry_ib2 - both changes were requested by Felix Fietkau - -v2: fix wrong variable name in return value check spotted by Denis Kirjanov - - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 7 +- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 + - drivers/net/ethernet/mediatek/mtk_ppe.c | 110 +++++++++++++++++- - drivers/net/ethernet/mediatek/mtk_ppe.h | 23 +++- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 8 +- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 3 + + drivers/net/ethernet/mediatek/mtk_ppe.c | 114 +++++++++++++++++- + drivers/net/ethernet/mediatek/mtk_ppe.h | 25 +++- .../net/ethernet/mediatek/mtk_ppe_debugfs.c | 9 +- - .../net/ethernet/mediatek/mtk_ppe_offload.c | 7 ++ + .../net/ethernet/mediatek/mtk_ppe_offload.c | 8 ++ drivers/net/ethernet/mediatek/mtk_ppe_regs.h | 14 +++ - 7 files changed, 166 insertions(+), 5 deletions(-) + 7 files changed, 172 insertions(+), 9 deletions(-) --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -4637,8 +4637,8 @@ static int mtk_probe(struct platform_dev +@@ -4691,8 +4691,8 @@ static int mtk_probe(struct platform_dev for (i = 0; i < num_ppe; i++) { u32 ppe_addr = eth->soc->reg_map->ppe_base + i * 0x400; @@ -63,8 +37,8 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov + if (!eth->ppe[i]) { err = -ENOMEM; - goto err_free_dev; -@@ -4765,6 +4765,7 @@ static const struct mtk_soc_data mt7622_ + goto err_deinit_ppe; +@@ -4816,6 +4816,7 @@ static const struct mtk_soc_data mt7622_ .required_pctl = false, .offload_version = 2, .hash_offset = 2, @@ -72,7 +46,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov .foe_entry_size = sizeof(struct mtk_foe_entry) - 16, .txrx = { .txd_size = sizeof(struct mtk_tx_dma), -@@ -4802,6 +4803,7 @@ static const struct mtk_soc_data mt7629_ +@@ -4853,6 +4854,7 @@ static const struct mtk_soc_data mt7629_ .hw_features = MTK_HW_FEATURES, .required_clks = MT7629_CLKS_BITMAP, .required_pctl = false, @@ -80,7 +54,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov .txrx = { .txd_size = sizeof(struct mtk_tx_dma), .rxd_size = sizeof(struct mtk_rx_dma), -@@ -4822,6 +4824,7 @@ static const struct mtk_soc_data mt7981_ +@@ -4873,6 +4875,7 @@ static const struct mtk_soc_data mt7981_ .offload_version = 2, .hash_offset = 4, .foe_entry_size = sizeof(struct mtk_foe_entry), @@ -88,7 +62,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov .txrx = { .txd_size = sizeof(struct mtk_tx_dma_v2), .rxd_size = sizeof(struct mtk_rx_dma_v2), -@@ -4842,6 +4845,7 @@ static const struct mtk_soc_data mt7986_ +@@ -4893,6 +4896,7 @@ static const struct mtk_soc_data mt7986_ .offload_version = 2, .hash_offset = 4, .foe_entry_size = sizeof(struct mtk_foe_entry), @@ -98,7 +72,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov .rxd_size = sizeof(struct mtk_rx_dma_v2), --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -1014,6 +1014,8 @@ struct mtk_reg_map { +@@ -1011,6 +1011,8 @@ struct mtk_reg_map { * the extra setup for those pins used by GMAC. * @hash_offset Flow table hash offset. * @foe_entry_size Foe table entry size. @@ -107,7 +81,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov * @txd_size Tx DMA descriptor size. * @rxd_size Rx DMA descriptor size. * @rx_irq_done_mask Rx irq done register mask. -@@ -1031,6 +1033,7 @@ struct mtk_soc_data { +@@ -1028,6 +1030,7 @@ struct mtk_soc_data { u8 hash_offset; u16 foe_entry_size; netdev_features_t hw_features; @@ -166,10 +140,10 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov static void mtk_ppe_cache_clear(struct mtk_ppe *ppe) { ppe_set(ppe, MTK_PPE_CACHE_CTL, MTK_PPE_CACHE_CTL_CLEAR); -@@ -464,6 +506,13 @@ __mtk_foe_entry_clear(struct mtk_ppe *pp - hwe->ib1 &= ~MTK_FOE_IB1_STATE; +@@ -459,6 +501,13 @@ __mtk_foe_entry_clear(struct mtk_ppe *pp hwe->ib1 |= FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_INVALID); dma_wmb(); + mtk_ppe_cache_clear(ppe); + if (ppe->accounting) { + struct mtk_foe_accounting *acct; + @@ -180,7 +154,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov } entry->hash = 0xffff; -@@ -571,6 +620,9 @@ __mtk_foe_entry_commit(struct mtk_ppe *p +@@ -566,6 +615,9 @@ __mtk_foe_entry_commit(struct mtk_ppe *p wmb(); hwe->ib1 = entry->ib1; @@ -190,7 +164,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov dma_wmb(); mtk_ppe_cache_clear(ppe); -@@ -762,11 +814,39 @@ int mtk_ppe_prepare_reset(struct mtk_ppe +@@ -757,11 +809,39 @@ int mtk_ppe_prepare_reset(struct mtk_ppe return mtk_ppe_wait_busy(ppe); } @@ -232,7 +206,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov struct mtk_ppe *ppe; u32 foe_flow_size; void *foe; -@@ -783,7 +863,8 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_ +@@ -778,7 +858,8 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_ ppe->base = base; ppe->eth = eth; ppe->dev = dev; @@ -242,9 +216,9 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov foe = dmam_alloc_coherent(ppe->dev, MTK_PPE_ENTRIES * soc->foe_entry_size, -@@ -799,6 +880,23 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_ +@@ -794,6 +875,23 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_ if (!ppe->foe_flow) - return NULL; + goto err_free_l2_flows; + if (accounting) { + mib = dmam_alloc_coherent(ppe->dev, MTK_PPE_ENTRIES * sizeof(*mib), @@ -266,7 +240,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov mtk_ppe_debugfs_init(ppe, index); return ppe; -@@ -913,6 +1011,16 @@ void mtk_ppe_start(struct mtk_ppe *ppe) +@@ -923,6 +1021,16 @@ void mtk_ppe_start(struct mtk_ppe *ppe) ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT1, 0xcb777); ppe_w32(ppe, MTK_PPE_SBW_CTRL, 0x7f); } @@ -328,17 +302,18 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov u16 foe_check_time[MTK_PPE_ENTRIES]; struct hlist_head *foe_flow; -@@ -303,8 +322,7 @@ struct mtk_ppe { +@@ -303,8 +322,8 @@ struct mtk_ppe { void *acct_table; }; -struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base, - int version, int index); +struct mtk_ppe *mtk_ppe_init(struct mtk_eth *eth, void __iomem *base, int index); ++ + void mtk_ppe_deinit(struct mtk_eth *eth); void mtk_ppe_start(struct mtk_ppe *ppe); int mtk_ppe_stop(struct mtk_ppe *ppe); - int mtk_ppe_prepare_reset(struct mtk_ppe *ppe); -@@ -358,5 +376,7 @@ int mtk_foe_entry_commit(struct mtk_ppe +@@ -359,5 +378,7 @@ int mtk_foe_entry_commit(struct mtk_ppe void mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry); int mtk_foe_entry_idle_time(struct mtk_ppe *ppe, struct mtk_flow_entry *entry); int mtk_ppe_debugfs_init(struct mtk_ppe *ppe, int index); @@ -381,7 +356,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov return 0; --- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c +++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c -@@ -500,6 +500,7 @@ static int +@@ -497,6 +497,7 @@ static int mtk_flow_offload_stats(struct mtk_eth *eth, struct flow_cls_offload *f) { struct mtk_flow_entry *entry; @@ -389,7 +364,7 @@ v2: fix wrong variable name in return value check spotted by Denis Kirjanov u32 idle; entry = rhashtable_lookup(ð->flow_table, &f->cookie, -@@ -510,6 +511,13 @@ mtk_flow_offload_stats(struct mtk_eth *e +@@ -507,6 +508,13 @@ mtk_flow_offload_stats(struct mtk_eth *e idle = mtk_foe_entry_idle_time(eth->ppe[entry->ppe_index], entry); f->stats.lastused = jiffies - idle * HZ; diff --git a/target/linux/generic/pending-6.1/736-06-net-ethernet-mediatek-fix-ppe-flow-accounting-for-v1.patch b/target/linux/generic/backport-6.1/733-v6.4-24-net-ethernet-mediatek-fix-ppe-flow-accounting-for-v1.patch similarity index 63% rename from target/linux/generic/pending-6.1/736-06-net-ethernet-mediatek-fix-ppe-flow-accounting-for-v1.patch rename to target/linux/generic/backport-6.1/733-v6.4-24-net-ethernet-mediatek-fix-ppe-flow-accounting-for-v1.patch index 33c983832..64352426a 100644 --- a/target/linux/generic/pending-6.1/736-06-net-ethernet-mediatek-fix-ppe-flow-accounting-for-v1.patch +++ b/target/linux/generic/backport-6.1/733-v6.4-24-net-ethernet-mediatek-fix-ppe-flow-accounting-for-v1.patch @@ -1,17 +1,24 @@ +From 88a0fd5927b7c2c7aecd6dc747d898eb38043d2b Mon Sep 17 00:00:00 2001 From: Felix Fietkau -Date: Thu, 23 Mar 2023 21:45:43 +0100 -Subject: [PATCH] net: ethernet: mediatek: fix ppe flow accounting for v1 - hardware +Date: Thu, 20 Apr 2023 22:06:42 +0100 +Subject: [PATCH 093/250] net: mtk_eth_soc: mediatek: fix ppe flow accounting + for v1 hardware Older chips (like MT7622) use a different bit in ib2 to enable hardware -counter support. +counter support. Add macros for both and select the appropriate bit. +Fixes: 3fbe4d8c0e53 ("net: ethernet: mtk_eth_soc: ppe: add support for flow accounting") Signed-off-by: Felix Fietkau +Signed-off-by: Daniel Golle +Signed-off-by: David S. Miller --- + drivers/net/ethernet/mediatek/mtk_ppe.c | 10 ++++++++-- + drivers/net/ethernet/mediatek/mtk_ppe.h | 3 ++- + 2 files changed, 10 insertions(+), 3 deletions(-) --- a/drivers/net/ethernet/mediatek/mtk_ppe.c +++ b/drivers/net/ethernet/mediatek/mtk_ppe.c -@@ -640,6 +640,7 @@ __mtk_foe_entry_commit(struct mtk_ppe *p +@@ -599,6 +599,7 @@ __mtk_foe_entry_commit(struct mtk_ppe *p struct mtk_eth *eth = ppe->eth; u16 timestamp = mtk_eth_timestamp(eth); struct mtk_foe_entry *hwe; @@ -19,7 +26,7 @@ Signed-off-by: Felix Fietkau if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { entry->ib1 &= ~MTK_FOE_IB1_BIND_TIMESTAMP_V2; -@@ -656,8 +657,13 @@ __mtk_foe_entry_commit(struct mtk_ppe *p +@@ -615,8 +616,13 @@ __mtk_foe_entry_commit(struct mtk_ppe *p wmb(); hwe->ib1 = entry->ib1; diff --git a/target/linux/generic/pending-6.1/732-00-net-ethernet-mtk_eth_soc-drop-generic-vlan-rx-offloa.patch b/target/linux/generic/backport-6.1/733-v6.4-25-net-ethernet-mtk_eth_soc-drop-generic-vlan-rx-offloa.patch similarity index 100% rename from target/linux/generic/pending-6.1/732-00-net-ethernet-mtk_eth_soc-drop-generic-vlan-rx-offloa.patch rename to target/linux/generic/backport-6.1/733-v6.4-25-net-ethernet-mtk_eth_soc-drop-generic-vlan-rx-offloa.patch diff --git a/target/linux/generic/backport-6.1/733-v6.5-26-net-ethernet-mtk_eth_soc-always-mtk_get_ib1_pkt_type.patch b/target/linux/generic/backport-6.1/733-v6.5-26-net-ethernet-mtk_eth_soc-always-mtk_get_ib1_pkt_type.patch new file mode 100644 index 000000000..2704faec1 --- /dev/null +++ b/target/linux/generic/backport-6.1/733-v6.5-26-net-ethernet-mtk_eth_soc-always-mtk_get_ib1_pkt_type.patch @@ -0,0 +1,31 @@ +From b804f765485109f9644cc05d1e8fc79ca6c6e4aa Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Wed, 19 Jul 2023 01:39:36 +0100 +Subject: [PATCH 094/250] net: ethernet: mtk_eth_soc: always + mtk_get_ib1_pkt_type + +entries and bind debugfs files would display wrong data on NETSYS_V2 and +later because instead of using mtk_get_ib1_pkt_type the driver would use +MTK_FOE_IB1_PACKET_TYPE which corresponds to NETSYS_V1(.x) SoCs. +Use mtk_get_ib1_pkt_type so entries and bind records display correctly. + +Fixes: 03a3180e5c09e ("net: ethernet: mtk_eth_soc: introduce flow offloading support for mt7986") +Signed-off-by: Daniel Golle +Acked-by: Lorenzo Bianconi +Link: https://lore.kernel.org/r/c0ae03d0182f4d27b874cbdf0059bc972c317f3c.1689727134.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c ++++ b/drivers/net/ethernet/mediatek/mtk_ppe_debugfs.c +@@ -98,7 +98,7 @@ mtk_ppe_debugfs_foe_show(struct seq_file + + acct = mtk_foe_entry_get_mib(ppe, i, NULL); + +- type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1); ++ type = mtk_get_ib1_pkt_type(ppe->eth, entry->ib1); + seq_printf(m, "%05x %s %7s", i, + mtk_foe_entry_state_str(state), + mtk_foe_pkt_type_str(type)); diff --git a/target/linux/generic/backport-6.1/750-v6.5-01-net-ethernet-mtk_ppe-add-MTK_FOE_ENTRY_V-1-2-_SIZE-m.patch b/target/linux/generic/backport-6.1/750-v6.5-01-net-ethernet-mtk_ppe-add-MTK_FOE_ENTRY_V-1-2-_SIZE-m.patch new file mode 100644 index 000000000..d7d1c08fc --- /dev/null +++ b/target/linux/generic/backport-6.1/750-v6.5-01-net-ethernet-mtk_ppe-add-MTK_FOE_ENTRY_V-1-2-_SIZE-m.patch @@ -0,0 +1,78 @@ +From 5ea0e1312bcfebc06b5f91d1bb82b823d6395125 Mon Sep 17 00:00:00 2001 +From: Lorenzo Bianconi +Date: Wed, 19 Jul 2023 12:29:49 +0200 +Subject: [PATCH 095/250] net: ethernet: mtk_ppe: add MTK_FOE_ENTRY_V{1,2}_SIZE + macros + +Introduce MTK_FOE_ENTRY_V{1,2}_SIZE macros in order to make more +explicit foe_entry size for different chipset revisions. + +Signed-off-by: Lorenzo Bianconi +Reviewed-by: Simon Horman +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 10 +++++----- + drivers/net/ethernet/mediatek/mtk_ppe.h | 3 +++ + 2 files changed, 8 insertions(+), 5 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -4765,7 +4765,7 @@ static const struct mtk_soc_data mt7621_ + .required_pctl = false, + .offload_version = 1, + .hash_offset = 2, +- .foe_entry_size = sizeof(struct mtk_foe_entry) - 16, ++ .foe_entry_size = MTK_FOE_ENTRY_V1_SIZE, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma), + .rxd_size = sizeof(struct mtk_rx_dma), +@@ -4786,7 +4786,7 @@ static const struct mtk_soc_data mt7622_ + .offload_version = 2, + .hash_offset = 2, + .has_accounting = true, +- .foe_entry_size = sizeof(struct mtk_foe_entry) - 16, ++ .foe_entry_size = MTK_FOE_ENTRY_V1_SIZE, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma), + .rxd_size = sizeof(struct mtk_rx_dma), +@@ -4805,7 +4805,7 @@ static const struct mtk_soc_data mt7623_ + .required_pctl = true, + .offload_version = 1, + .hash_offset = 2, +- .foe_entry_size = sizeof(struct mtk_foe_entry) - 16, ++ .foe_entry_size = MTK_FOE_ENTRY_V1_SIZE, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma), + .rxd_size = sizeof(struct mtk_rx_dma), +@@ -4843,8 +4843,8 @@ static const struct mtk_soc_data mt7981_ + .required_pctl = false, + .offload_version = 2, + .hash_offset = 4, +- .foe_entry_size = sizeof(struct mtk_foe_entry), + .has_accounting = true, ++ .foe_entry_size = MTK_FOE_ENTRY_V2_SIZE, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma_v2), + .rxd_size = sizeof(struct mtk_rx_dma_v2), +@@ -4864,8 +4864,8 @@ static const struct mtk_soc_data mt7986_ + .required_pctl = false, + .offload_version = 2, + .hash_offset = 4, +- .foe_entry_size = sizeof(struct mtk_foe_entry), + .has_accounting = true, ++ .foe_entry_size = MTK_FOE_ENTRY_V2_SIZE, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma_v2), + .rxd_size = sizeof(struct mtk_rx_dma_v2), +--- a/drivers/net/ethernet/mediatek/mtk_ppe.h ++++ b/drivers/net/ethernet/mediatek/mtk_ppe.h +@@ -216,6 +216,9 @@ struct mtk_foe_ipv6_6rd { + struct mtk_foe_mac_info l2; + }; + ++#define MTK_FOE_ENTRY_V1_SIZE 80 ++#define MTK_FOE_ENTRY_V2_SIZE 96 ++ + struct mtk_foe_entry { + u32 ib1; + diff --git a/target/linux/generic/backport-6.1/750-v6.5-02-net-ethernet-mtk_eth_soc-remove-incorrect-PLL-config.patch b/target/linux/generic/backport-6.1/750-v6.5-02-net-ethernet-mtk_eth_soc-remove-incorrect-PLL-config.patch new file mode 100644 index 000000000..fb54f404b --- /dev/null +++ b/target/linux/generic/backport-6.1/750-v6.5-02-net-ethernet-mtk_eth_soc-remove-incorrect-PLL-config.patch @@ -0,0 +1,141 @@ +From 8cfa2576d79f9379d167a8994f0fca935c07a8bc Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Sat, 22 Jul 2023 21:32:49 +0100 +Subject: [PATCH 096/250] net: ethernet: mtk_eth_soc: remove incorrect PLL + configuration + +MT7623 GMAC0 attempts to configure the system clocking according to the +required speed in the .mac_config callback for non-SGMII, non-baseX and +non-TRGMII modes. + +state->speed setting has never been reliable in the .mac_config +callback - there are cases where this is not the link speed, +particularly via ethtool paths, so this has always been unreliable (as +detailed in phylink's documentation.) + +There is the additional issue that mtk_gmac0_rgmii_adjust() will only +be called if state->interface changes, which means it only configures +the system clocking on the very first .mac_config call, which will be +made when the network device is first brought up before any link is +established. + +Essentially, this code is incredibly buggy, and probably never worked. + +Moreover, checking the in-kernel DT files, it seems no platform makes +use of this code path. + +Therefore, let's remove it, and disable interface modes for port 0 that +are not SGMII, 1000base-X, 2500base-X or TRGMII on the MT7623. + +Reviewed-by: Daniel Golle +Tested-by: Daniel Golle +Tested-by: Frank Wunderlich +Signed-off-by: Russell King (Oracle) +Signed-off-by: Paolo Abeni +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 54 ++++++--------------- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 + + 2 files changed, 17 insertions(+), 38 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -352,7 +352,7 @@ static int mt7621_gmac0_rgmii_adjust(str + } + + static void mtk_gmac0_rgmii_adjust(struct mtk_eth *eth, +- phy_interface_t interface, int speed) ++ phy_interface_t interface) + { + u32 val; + int ret; +@@ -366,26 +366,7 @@ static void mtk_gmac0_rgmii_adjust(struc + return; + } + +- val = (speed == SPEED_1000) ? +- INTF_MODE_RGMII_1000 : INTF_MODE_RGMII_10_100; +- mtk_w32(eth, val, INTF_MODE); +- +- regmap_update_bits(eth->ethsys, ETHSYS_CLKCFG0, +- ETHSYS_TRGMII_CLK_SEL362_5, +- ETHSYS_TRGMII_CLK_SEL362_5); +- +- val = (speed == SPEED_1000) ? 250000000 : 500000000; +- ret = clk_set_rate(eth->clks[MTK_CLK_TRGPLL], val); +- if (ret) +- dev_err(eth->dev, "Failed to set trgmii pll: %d\n", ret); +- +- val = (speed == SPEED_1000) ? +- RCK_CTRL_RGMII_1000 : RCK_CTRL_RGMII_10_100; +- mtk_w32(eth, val, TRGMII_RCK_CTRL); +- +- val = (speed == SPEED_1000) ? +- TCK_CTRL_RGMII_1000 : TCK_CTRL_RGMII_10_100; +- mtk_w32(eth, val, TRGMII_TCK_CTRL); ++ dev_err(eth->dev, "Missing PLL configuration, ethernet may not work\n"); + } + + static struct phylink_pcs *mtk_mac_select_pcs(struct phylink_config *config, +@@ -471,17 +452,8 @@ static void mtk_mac_config(struct phylin + state->interface)) + goto err_phy; + } else { +- /* FIXME: this is incorrect. Not only does it +- * use state->speed (which is not guaranteed +- * to be correct) but it also makes use of it +- * in a code path that will only be reachable +- * when the PHY interface mode changes, not +- * when the speed changes. Consequently, RGMII +- * is probably broken. +- */ + mtk_gmac0_rgmii_adjust(mac->hw, +- state->interface, +- state->speed); ++ state->interface); + + /* mt7623_pad_clk_setup */ + for (i = 0 ; i < NUM_TRGMII_CTRL; i++) +@@ -4342,13 +4314,19 @@ static int mtk_add_mac(struct mtk_eth *e + mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | + MAC_10 | MAC_100 | MAC_1000 | MAC_2500FD; + +- __set_bit(PHY_INTERFACE_MODE_MII, +- mac->phylink_config.supported_interfaces); +- __set_bit(PHY_INTERFACE_MODE_GMII, +- mac->phylink_config.supported_interfaces); ++ /* MT7623 gmac0 is now missing its speed-specific PLL configuration ++ * in its .mac_config method (since state->speed is not valid there. ++ * Disable support for MII, GMII and RGMII. ++ */ ++ if (!mac->hw->soc->disable_pll_modes || mac->id != 0) { ++ __set_bit(PHY_INTERFACE_MODE_MII, ++ mac->phylink_config.supported_interfaces); ++ __set_bit(PHY_INTERFACE_MODE_GMII, ++ mac->phylink_config.supported_interfaces); + +- if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_RGMII)) +- phy_interface_set_rgmii(mac->phylink_config.supported_interfaces); ++ if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_RGMII)) ++ phy_interface_set_rgmii(mac->phylink_config.supported_interfaces); ++ } + + if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_TRGMII) && !mac->id) + __set_bit(PHY_INTERFACE_MODE_TRGMII, +@@ -4806,6 +4784,7 @@ static const struct mtk_soc_data mt7623_ + .offload_version = 1, + .hash_offset = 2, + .foe_entry_size = MTK_FOE_ENTRY_V1_SIZE, ++ .disable_pll_modes = true, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma), + .rxd_size = sizeof(struct mtk_rx_dma), +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -1030,6 +1030,7 @@ struct mtk_soc_data { + u16 foe_entry_size; + netdev_features_t hw_features; + bool has_accounting; ++ bool disable_pll_modes; + struct { + u32 txd_size; + u32 rxd_size; diff --git a/target/linux/generic/backport-6.1/750-v6.5-03-net-ethernet-mtk_eth_soc-remove-mac_pcs_get_state-an.patch b/target/linux/generic/backport-6.1/750-v6.5-03-net-ethernet-mtk_eth_soc-remove-mac_pcs_get_state-an.patch new file mode 100644 index 000000000..500fad3b8 --- /dev/null +++ b/target/linux/generic/backport-6.1/750-v6.5-03-net-ethernet-mtk_eth_soc-remove-mac_pcs_get_state-an.patch @@ -0,0 +1,81 @@ +From a4c2233b1e4359b6c64b6f9ba98c8718a11fffee Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Sat, 22 Jul 2023 21:32:54 +0100 +Subject: [PATCH 097/250] net: ethernet: mtk_eth_soc: remove mac_pcs_get_state + and modernise + +Remove the .mac_pcs_get_state function, since as far as I can tell is +never called - no DT appears to specify an in-band-status management +nor SFP support for this driver. + +Removal of this, along with the previous patch to remove the incorrect +clocking configuration, means that the driver becomes non-legacy, so +we can remove the "legacy_pre_march2020" status from this driver. + +Reviewed-by: Daniel Golle +Tested-by: Daniel Golle +Tested-by: Frank Wunderlich +Signed-off-by: Russell King (Oracle) +Signed-off-by: Paolo Abeni +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 35 --------------------- + 1 file changed, 35 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -554,38 +554,6 @@ static int mtk_mac_finish(struct phylink + return 0; + } + +-static void mtk_mac_pcs_get_state(struct phylink_config *config, +- struct phylink_link_state *state) +-{ +- struct mtk_mac *mac = container_of(config, struct mtk_mac, +- phylink_config); +- u32 pmsr = mtk_r32(mac->hw, MTK_MAC_MSR(mac->id)); +- +- state->link = (pmsr & MAC_MSR_LINK); +- state->duplex = (pmsr & MAC_MSR_DPX) >> 1; +- +- switch (pmsr & (MAC_MSR_SPEED_1000 | MAC_MSR_SPEED_100)) { +- case 0: +- state->speed = SPEED_10; +- break; +- case MAC_MSR_SPEED_100: +- state->speed = SPEED_100; +- break; +- case MAC_MSR_SPEED_1000: +- state->speed = SPEED_1000; +- break; +- default: +- state->speed = SPEED_UNKNOWN; +- break; +- } +- +- state->pause &= (MLO_PAUSE_RX | MLO_PAUSE_TX); +- if (pmsr & MAC_MSR_RX_FC) +- state->pause |= MLO_PAUSE_RX; +- if (pmsr & MAC_MSR_TX_FC) +- state->pause |= MLO_PAUSE_TX; +-} +- + static void mtk_mac_link_down(struct phylink_config *config, unsigned int mode, + phy_interface_t interface) + { +@@ -708,7 +676,6 @@ static void mtk_mac_link_up(struct phyli + static const struct phylink_mac_ops mtk_phylink_ops = { + .validate = phylink_generic_validate, + .mac_select_pcs = mtk_mac_select_pcs, +- .mac_pcs_get_state = mtk_mac_pcs_get_state, + .mac_config = mtk_mac_config, + .mac_finish = mtk_mac_finish, + .mac_link_down = mtk_mac_link_down, +@@ -4309,8 +4276,6 @@ static int mtk_add_mac(struct mtk_eth *e + + mac->phylink_config.dev = ð->netdev[id]->dev; + mac->phylink_config.type = PHYLINK_NETDEV; +- /* This driver makes use of state->speed in mac_config */ +- mac->phylink_config.legacy_pre_march2020 = true; + mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | + MAC_10 | MAC_100 | MAC_1000 | MAC_2500FD; + diff --git a/target/linux/generic/backport-6.1/750-v6.5-05-net-ethernet-mtk_eth_soc-add-version-in-mtk_soc_data.patch b/target/linux/generic/backport-6.1/750-v6.5-05-net-ethernet-mtk_eth_soc-add-version-in-mtk_soc_data.patch new file mode 100644 index 000000000..3b1225e94 --- /dev/null +++ b/target/linux/generic/backport-6.1/750-v6.5-05-net-ethernet-mtk_eth_soc-add-version-in-mtk_soc_data.patch @@ -0,0 +1,550 @@ +From 5d8d05fbf804b4485646d39551ac27452e45afd3 Mon Sep 17 00:00:00 2001 +From: Lorenzo Bianconi +Date: Tue, 25 Jul 2023 01:52:02 +0100 +Subject: [PATCH 099/250] net: ethernet: mtk_eth_soc: add version in + mtk_soc_data + +Introduce version field in mtk_soc_data data structure in order to +make mtk_eth driver easier to maintain for chipset configuration +codebase. Get rid of MTK_NETSYS_V2 bit in chip capabilities. +This is a preliminary patch to introduce support for MT7988 SoC. + +Signed-off-by: Lorenzo Bianconi +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/e52fae302ca135436e5cdd26d38d87be2da63055.1690246066.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 55 +++++++++++-------- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 36 +++++++----- + drivers/net/ethernet/mediatek/mtk_ppe.c | 18 +++--- + .../net/ethernet/mediatek/mtk_ppe_offload.c | 2 +- + drivers/net/ethernet/mediatek/mtk_wed.c | 4 +- + 5 files changed, 66 insertions(+), 49 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -579,7 +579,7 @@ static void mtk_set_queue_speed(struct m + FIELD_PREP(MTK_QTX_SCH_MIN_RATE_MAN, 1) | + FIELD_PREP(MTK_QTX_SCH_MIN_RATE_EXP, 4) | + MTK_QTX_SCH_LEAKY_BUCKET_SIZE; +- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v1(eth)) + val |= MTK_QTX_SCH_LEAKY_BUCKET_EN; + + if (IS_ENABLED(CONFIG_SOC_MT7621)) { +@@ -955,7 +955,7 @@ static bool mtk_rx_get_desc(struct mtk_e + rxd->rxd1 = READ_ONCE(dma_rxd->rxd1); + rxd->rxd3 = READ_ONCE(dma_rxd->rxd3); + rxd->rxd4 = READ_ONCE(dma_rxd->rxd4); +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + rxd->rxd5 = READ_ONCE(dma_rxd->rxd5); + rxd->rxd6 = READ_ONCE(dma_rxd->rxd6); + } +@@ -1013,7 +1013,7 @@ static int mtk_init_fq_dma(struct mtk_et + + txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE); + txd->txd4 = 0; +- if (MTK_HAS_CAPS(soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + txd->txd5 = 0; + txd->txd6 = 0; + txd->txd7 = 0; +@@ -1204,7 +1204,7 @@ static void mtk_tx_set_dma_desc(struct n + struct mtk_mac *mac = netdev_priv(dev); + struct mtk_eth *eth = mac->hw; + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + mtk_tx_set_dma_desc_v2(dev, txd, info); + else + mtk_tx_set_dma_desc_v1(dev, txd, info); +@@ -1511,7 +1511,7 @@ static void mtk_update_rx_cpu_idx(struct + + static bool mtk_page_pool_enabled(struct mtk_eth *eth) + { +- return MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2); ++ return eth->soc->version == 2; + } + + static struct page_pool *mtk_create_page_pool(struct mtk_eth *eth, +@@ -1853,7 +1853,7 @@ static int mtk_poll_rx(struct napi_struc + break; + + /* find out which mac the packet come from. values start at 1 */ +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + mac = RX_DMA_GET_SPORT_V2(trxd.rxd5) - 1; + else if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) && + !(trxd.rxd4 & RX_DMA_SPECIAL_TAG)) +@@ -1949,7 +1949,7 @@ static int mtk_poll_rx(struct napi_struc + skb->dev = netdev; + bytes += skb->len; + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + reason = FIELD_GET(MTK_RXD5_PPE_CPU_REASON, trxd.rxd5); + hash = trxd.rxd5 & MTK_RXD5_FOE_ENTRY; + if (hash != MTK_RXD5_FOE_ENTRY) +@@ -1974,8 +1974,8 @@ static int mtk_poll_rx(struct napi_struc + /* When using VLAN untagging in combination with DSA, the + * hardware treats the MTK special tag as a VLAN and untags it. + */ +- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) && +- (trxd.rxd2 & RX_DMA_VTAG) && netdev_uses_dsa(netdev)) { ++ if (mtk_is_netsys_v1(eth) && (trxd.rxd2 & RX_DMA_VTAG) && ++ netdev_uses_dsa(netdev)) { + unsigned int port = RX_DMA_VPID(trxd.rxd3) & GENMASK(2, 0); + + if (port < ARRAY_SIZE(eth->dsa_meta) && +@@ -2285,7 +2285,7 @@ static int mtk_tx_alloc(struct mtk_eth * + txd->txd2 = next_ptr; + txd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU; + txd->txd4 = 0; +- if (MTK_HAS_CAPS(soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + txd->txd5 = 0; + txd->txd6 = 0; + txd->txd7 = 0; +@@ -2338,14 +2338,14 @@ static int mtk_tx_alloc(struct mtk_eth * + FIELD_PREP(MTK_QTX_SCH_MIN_RATE_MAN, 1) | + FIELD_PREP(MTK_QTX_SCH_MIN_RATE_EXP, 4) | + MTK_QTX_SCH_LEAKY_BUCKET_SIZE; +- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v1(eth)) + val |= MTK_QTX_SCH_LEAKY_BUCKET_EN; + mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); + ofs += MTK_QTX_OFFSET; + } + val = MTK_QDMA_TX_SCH_MAX_WFQ | (MTK_QDMA_TX_SCH_MAX_WFQ << 16); + mtk_w32(eth, val, soc->reg_map->qdma.tx_sch_rate); +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + mtk_w32(eth, val, soc->reg_map->qdma.tx_sch_rate + 4); + } else { + mtk_w32(eth, ring->phys_pdma, MT7628_TX_BASE_PTR0); +@@ -2474,7 +2474,7 @@ static int mtk_rx_alloc(struct mtk_eth * + + rxd->rxd3 = 0; + rxd->rxd4 = 0; +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + rxd->rxd5 = 0; + rxd->rxd6 = 0; + rxd->rxd7 = 0; +@@ -3025,7 +3025,7 @@ static int mtk_start_dma(struct mtk_eth + MTK_TX_BT_32DWORDS | MTK_NDP_CO_PRO | + MTK_RX_2B_OFFSET | MTK_TX_WB_DDONE; + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + val |= MTK_MUTLI_CNT | MTK_RESV_BUF | + MTK_WCOMP_EN | MTK_DMAD_WR_WDONE | + MTK_CHK_DDONE_EN | MTK_LEAKY_BUCKET_EN; +@@ -3167,7 +3167,7 @@ static int mtk_open(struct net_device *d + phylink_start(mac->phylink); + netif_tx_start_all_queues(dev); + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return 0; + + if (mtk_uses_dsa(dev) && !eth->prog) { +@@ -3432,7 +3432,7 @@ static void mtk_hw_reset(struct mtk_eth + { + u32 val; + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, 0); + val = RSTCTRL_PPE0_V2; + } else { +@@ -3444,7 +3444,7 @@ static void mtk_hw_reset(struct mtk_eth + + ethsys_reset(eth, RSTCTRL_ETH | RSTCTRL_FE | val); + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, + 0x3ffffff); + } +@@ -3470,7 +3470,7 @@ static void mtk_hw_warm_reset(struct mtk + return; + } + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0_V2; + else + rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0; +@@ -3640,7 +3640,7 @@ static int mtk_hw_init(struct mtk_eth *e + else + mtk_hw_reset(eth); + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + /* Set FE to PDMAv2 if necessary */ + val = mtk_r32(eth, MTK_FE_GLO_MISC); + mtk_w32(eth, val | BIT(4), MTK_FE_GLO_MISC); +@@ -3677,7 +3677,7 @@ static int mtk_hw_init(struct mtk_eth *e + */ + val = mtk_r32(eth, MTK_CDMQ_IG_CTRL); + mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL); +- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v1(eth)) { + val = mtk_r32(eth, MTK_CDMP_IG_CTRL); + mtk_w32(eth, val | MTK_CDMP_STAG_EN, MTK_CDMP_IG_CTRL); + +@@ -3699,7 +3699,7 @@ static int mtk_hw_init(struct mtk_eth *e + mtk_w32(eth, eth->soc->txrx.rx_irq_done_mask, reg_map->qdma.int_grp + 4); + mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP); + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + /* PSE should not drop port8 and port9 packets from WDMA Tx */ + mtk_w32(eth, 0x00000300, PSE_DROP_CFG); + +@@ -4488,7 +4488,7 @@ static int mtk_probe(struct platform_dev + } + } + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) { + err = -EINVAL; +@@ -4596,9 +4596,8 @@ static int mtk_probe(struct platform_dev + } + + if (eth->soc->offload_version) { +- u32 num_ppe; ++ u32 num_ppe = mtk_is_netsys_v2_or_greater(eth) ? 2 : 1; + +- num_ppe = MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) ? 2 : 1; + num_ppe = min_t(u32, ARRAY_SIZE(eth->ppe), num_ppe); + for (i = 0; i < num_ppe; i++) { + u32 ppe_addr = eth->soc->reg_map->ppe_base + i * 0x400; +@@ -4690,6 +4689,7 @@ static const struct mtk_soc_data mt2701_ + .hw_features = MTK_HW_FEATURES, + .required_clks = MT7623_CLKS_BITMAP, + .required_pctl = true, ++ .version = 1, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma), + .rxd_size = sizeof(struct mtk_rx_dma), +@@ -4706,6 +4706,7 @@ static const struct mtk_soc_data mt7621_ + .hw_features = MTK_HW_FEATURES, + .required_clks = MT7621_CLKS_BITMAP, + .required_pctl = false, ++ .version = 1, + .offload_version = 1, + .hash_offset = 2, + .foe_entry_size = MTK_FOE_ENTRY_V1_SIZE, +@@ -4726,6 +4727,7 @@ static const struct mtk_soc_data mt7622_ + .hw_features = MTK_HW_FEATURES, + .required_clks = MT7622_CLKS_BITMAP, + .required_pctl = false, ++ .version = 1, + .offload_version = 2, + .hash_offset = 2, + .has_accounting = true, +@@ -4746,6 +4748,7 @@ static const struct mtk_soc_data mt7623_ + .hw_features = MTK_HW_FEATURES, + .required_clks = MT7623_CLKS_BITMAP, + .required_pctl = true, ++ .version = 1, + .offload_version = 1, + .hash_offset = 2, + .foe_entry_size = MTK_FOE_ENTRY_V1_SIZE, +@@ -4768,6 +4771,7 @@ static const struct mtk_soc_data mt7629_ + .required_clks = MT7629_CLKS_BITMAP, + .required_pctl = false, + .has_accounting = true, ++ .version = 1, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma), + .rxd_size = sizeof(struct mtk_rx_dma), +@@ -4785,6 +4789,7 @@ static const struct mtk_soc_data mt7981_ + .hw_features = MTK_HW_FEATURES, + .required_clks = MT7981_CLKS_BITMAP, + .required_pctl = false, ++ .version = 2, + .offload_version = 2, + .hash_offset = 4, + .has_accounting = true, +@@ -4806,6 +4811,7 @@ static const struct mtk_soc_data mt7986_ + .hw_features = MTK_HW_FEATURES, + .required_clks = MT7986_CLKS_BITMAP, + .required_pctl = false, ++ .version = 2, + .offload_version = 2, + .hash_offset = 4, + .has_accounting = true, +@@ -4826,6 +4832,7 @@ static const struct mtk_soc_data rt5350_ + .hw_features = MTK_HW_FEATURES_MT7628, + .required_clks = MT7628_CLKS_BITMAP, + .required_pctl = false, ++ .version = 1, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma), + .rxd_size = sizeof(struct mtk_rx_dma), +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -820,7 +820,6 @@ enum mkt_eth_capabilities { + MTK_SHARED_INT_BIT, + MTK_TRGMII_MT7621_CLK_BIT, + MTK_QDMA_BIT, +- MTK_NETSYS_V2_BIT, + MTK_SOC_MT7628_BIT, + MTK_RSTCTRL_PPE1_BIT, + MTK_U3_COPHY_V2_BIT, +@@ -855,7 +854,6 @@ enum mkt_eth_capabilities { + #define MTK_SHARED_INT BIT(MTK_SHARED_INT_BIT) + #define MTK_TRGMII_MT7621_CLK BIT(MTK_TRGMII_MT7621_CLK_BIT) + #define MTK_QDMA BIT(MTK_QDMA_BIT) +-#define MTK_NETSYS_V2 BIT(MTK_NETSYS_V2_BIT) + #define MTK_SOC_MT7628 BIT(MTK_SOC_MT7628_BIT) + #define MTK_RSTCTRL_PPE1 BIT(MTK_RSTCTRL_PPE1_BIT) + #define MTK_U3_COPHY_V2 BIT(MTK_U3_COPHY_V2_BIT) +@@ -934,11 +932,11 @@ enum mkt_eth_capabilities { + #define MT7981_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | MTK_GMAC2_GEPHY | \ + MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ + MTK_MUX_U3_GMAC2_TO_QPHY | MTK_U3_COPHY_V2 | \ +- MTK_NETSYS_V2 | MTK_RSTCTRL_PPE1) ++ MTK_RSTCTRL_PPE1) + + #define MT7986_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \ + MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ +- MTK_NETSYS_V2 | MTK_RSTCTRL_PPE1) ++ MTK_RSTCTRL_PPE1) + + struct mtk_tx_dma_desc_info { + dma_addr_t addr; +@@ -1009,6 +1007,7 @@ struct mtk_reg_map { + * @required_pctl A bool value to show whether the SoC requires + * the extra setup for those pins used by GMAC. + * @hash_offset Flow table hash offset. ++ * @version SoC version. + * @foe_entry_size Foe table entry size. + * @has_accounting Bool indicating support for accounting of + * offloaded flows. +@@ -1027,6 +1026,7 @@ struct mtk_soc_data { + bool required_pctl; + u8 offload_version; + u8 hash_offset; ++ u8 version; + u16 foe_entry_size; + netdev_features_t hw_features; + bool has_accounting; +@@ -1183,6 +1183,16 @@ struct mtk_mac { + /* the struct describing the SoC. these are declared in the soc_xyz.c files */ + extern const struct of_device_id of_mtk_match[]; + ++static inline bool mtk_is_netsys_v1(struct mtk_eth *eth) ++{ ++ return eth->soc->version == 1; ++} ++ ++static inline bool mtk_is_netsys_v2_or_greater(struct mtk_eth *eth) ++{ ++ return eth->soc->version > 1; ++} ++ + static inline struct mtk_foe_entry * + mtk_foe_get_entry(struct mtk_ppe *ppe, u16 hash) + { +@@ -1193,7 +1203,7 @@ mtk_foe_get_entry(struct mtk_ppe *ppe, u + + static inline u32 mtk_get_ib1_ts_mask(struct mtk_eth *eth) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return MTK_FOE_IB1_BIND_TIMESTAMP_V2; + + return MTK_FOE_IB1_BIND_TIMESTAMP; +@@ -1201,7 +1211,7 @@ static inline u32 mtk_get_ib1_ts_mask(st + + static inline u32 mtk_get_ib1_ppoe_mask(struct mtk_eth *eth) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return MTK_FOE_IB1_BIND_PPPOE_V2; + + return MTK_FOE_IB1_BIND_PPPOE; +@@ -1209,7 +1219,7 @@ static inline u32 mtk_get_ib1_ppoe_mask( + + static inline u32 mtk_get_ib1_vlan_tag_mask(struct mtk_eth *eth) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return MTK_FOE_IB1_BIND_VLAN_TAG_V2; + + return MTK_FOE_IB1_BIND_VLAN_TAG; +@@ -1217,7 +1227,7 @@ static inline u32 mtk_get_ib1_vlan_tag_m + + static inline u32 mtk_get_ib1_vlan_layer_mask(struct mtk_eth *eth) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return MTK_FOE_IB1_BIND_VLAN_LAYER_V2; + + return MTK_FOE_IB1_BIND_VLAN_LAYER; +@@ -1225,7 +1235,7 @@ static inline u32 mtk_get_ib1_vlan_layer + + static inline u32 mtk_prep_ib1_vlan_layer(struct mtk_eth *eth, u32 val) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER_V2, val); + + return FIELD_PREP(MTK_FOE_IB1_BIND_VLAN_LAYER, val); +@@ -1233,7 +1243,7 @@ static inline u32 mtk_prep_ib1_vlan_laye + + static inline u32 mtk_get_ib1_vlan_layer(struct mtk_eth *eth, u32 val) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return FIELD_GET(MTK_FOE_IB1_BIND_VLAN_LAYER_V2, val); + + return FIELD_GET(MTK_FOE_IB1_BIND_VLAN_LAYER, val); +@@ -1241,7 +1251,7 @@ static inline u32 mtk_get_ib1_vlan_layer + + static inline u32 mtk_get_ib1_pkt_type_mask(struct mtk_eth *eth) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return MTK_FOE_IB1_PACKET_TYPE_V2; + + return MTK_FOE_IB1_PACKET_TYPE; +@@ -1249,7 +1259,7 @@ static inline u32 mtk_get_ib1_pkt_type_m + + static inline u32 mtk_get_ib1_pkt_type(struct mtk_eth *eth, u32 val) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return FIELD_GET(MTK_FOE_IB1_PACKET_TYPE_V2, val); + + return FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, val); +@@ -1257,7 +1267,7 @@ static inline u32 mtk_get_ib1_pkt_type(s + + static inline u32 mtk_get_ib2_multicast_mask(struct mtk_eth *eth) + { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + return MTK_FOE_IB2_MULTICAST_V2; + + return MTK_FOE_IB2_MULTICAST; +--- a/drivers/net/ethernet/mediatek/mtk_ppe.c ++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c +@@ -207,7 +207,7 @@ int mtk_foe_entry_prepare(struct mtk_eth + + memset(entry, 0, sizeof(*entry)); + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + val = FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_BIND) | + FIELD_PREP(MTK_FOE_IB1_PACKET_TYPE_V2, type) | + FIELD_PREP(MTK_FOE_IB1_UDP, l4proto == IPPROTO_UDP) | +@@ -271,7 +271,7 @@ int mtk_foe_entry_set_pse_port(struct mt + u32 *ib2 = mtk_foe_entry_ib2(eth, entry); + u32 val = *ib2; + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + val &= ~MTK_FOE_IB2_DEST_PORT_V2; + val |= FIELD_PREP(MTK_FOE_IB2_DEST_PORT_V2, port); + } else { +@@ -422,7 +422,7 @@ int mtk_foe_entry_set_wdma(struct mtk_et + struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(eth, entry); + u32 *ib2 = mtk_foe_entry_ib2(eth, entry); + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + *ib2 &= ~MTK_FOE_IB2_PORT_MG_V2; + *ib2 |= FIELD_PREP(MTK_FOE_IB2_RX_IDX, txq) | + MTK_FOE_IB2_WDMA_WINFO_V2; +@@ -446,7 +446,7 @@ int mtk_foe_entry_set_queue(struct mtk_e + { + u32 *ib2 = mtk_foe_entry_ib2(eth, entry); + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + *ib2 &= ~MTK_FOE_IB2_QID_V2; + *ib2 |= FIELD_PREP(MTK_FOE_IB2_QID_V2, queue); + *ib2 |= MTK_FOE_IB2_PSE_QOS_V2; +@@ -601,7 +601,7 @@ __mtk_foe_entry_commit(struct mtk_ppe *p + struct mtk_foe_entry *hwe; + u32 val; + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + entry->ib1 &= ~MTK_FOE_IB1_BIND_TIMESTAMP_V2; + entry->ib1 |= FIELD_PREP(MTK_FOE_IB1_BIND_TIMESTAMP_V2, + timestamp); +@@ -617,7 +617,7 @@ __mtk_foe_entry_commit(struct mtk_ppe *p + hwe->ib1 = entry->ib1; + + if (ppe->accounting) { +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + val = MTK_FOE_IB2_MIB_CNT_V2; + else + val = MTK_FOE_IB2_MIB_CNT; +@@ -965,7 +965,7 @@ void mtk_ppe_start(struct mtk_ppe *ppe) + MTK_PPE_SCAN_MODE_CHECK_AGE) | + FIELD_PREP(MTK_PPE_TB_CFG_ENTRY_NUM, + MTK_PPE_ENTRIES_SHIFT); +- if (MTK_HAS_CAPS(ppe->eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(ppe->eth)) + val |= MTK_PPE_TB_CFG_INFO_SEL; + ppe_w32(ppe, MTK_PPE_TB_CFG, val); + +@@ -981,7 +981,7 @@ void mtk_ppe_start(struct mtk_ppe *ppe) + MTK_PPE_FLOW_CFG_IP4_NAPT | + MTK_PPE_FLOW_CFG_IP4_DSLITE | + MTK_PPE_FLOW_CFG_IP4_NAT_FRAG; +- if (MTK_HAS_CAPS(ppe->eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(ppe->eth)) + val |= MTK_PPE_MD_TOAP_BYP_CRSN0 | + MTK_PPE_MD_TOAP_BYP_CRSN1 | + MTK_PPE_MD_TOAP_BYP_CRSN2 | +@@ -1023,7 +1023,7 @@ void mtk_ppe_start(struct mtk_ppe *ppe) + + ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT, 0); + +- if (MTK_HAS_CAPS(ppe->eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(ppe->eth)) { + ppe_w32(ppe, MTK_PPE_DEFAULT_CPU_PORT1, 0xcb777); + ppe_w32(ppe, MTK_PPE_SBW_CTRL, 0x7f); + } +--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c ++++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c +@@ -193,7 +193,7 @@ mtk_flow_set_output_device(struct mtk_et + if (mtk_flow_get_wdma_info(dev, dest_mac, &info) == 0) { + mtk_foe_entry_set_wdma(eth, foe, info.wdma_idx, info.queue, + info.bss, info.wcid); +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + switch (info.wdma_idx) { + case 0: + pse_port = 8; +--- a/drivers/net/ethernet/mediatek/mtk_wed.c ++++ b/drivers/net/ethernet/mediatek/mtk_wed.c +@@ -1084,7 +1084,7 @@ mtk_wed_rx_reset(struct mtk_wed_device * + } else { + struct mtk_eth *eth = dev->hw->eth; + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) ++ if (mtk_is_netsys_v2_or_greater(eth)) + wed_set(dev, MTK_WED_RESET_IDX, + MTK_WED_RESET_IDX_RX_V2); + else +@@ -1806,7 +1806,7 @@ void mtk_wed_add_hw(struct device_node * + hw->wdma = wdma; + hw->index = index; + hw->irq = irq; +- hw->version = MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) ? 2 : 1; ++ hw->version = mtk_is_netsys_v1(eth) ? 1 : 2; + + if (hw->version == 1) { + hw->mirror = syscon_regmap_lookup_by_phandle(eth_np, diff --git a/target/linux/generic/backport-6.1/750-v6.5-06-net-ethernet-mtk_eth_soc-increase-MAX_DEVS-to-3.patch b/target/linux/generic/backport-6.1/750-v6.5-06-net-ethernet-mtk_eth_soc-increase-MAX_DEVS-to-3.patch new file mode 100644 index 000000000..7b945bb86 --- /dev/null +++ b/target/linux/generic/backport-6.1/750-v6.5-06-net-ethernet-mtk_eth_soc-increase-MAX_DEVS-to-3.patch @@ -0,0 +1,29 @@ +From f8fb8dbd158c585be7574faf92db7d614b6722ff Mon Sep 17 00:00:00 2001 +From: Lorenzo Bianconi +Date: Tue, 25 Jul 2023 01:52:27 +0100 +Subject: [PATCH 100/250] net: ethernet: mtk_eth_soc: increase MAX_DEVS to 3 + +This is a preliminary patch to add MT7988 SoC support since it runs 3 +macs instead of 2. + +Signed-off-by: Lorenzo Bianconi +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/3563e5fab367e7d79a7f1296fabaa5c20f202d7a.1690246066.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -1043,8 +1043,8 @@ struct mtk_soc_data { + + #define MTK_DMA_MONITOR_TIMEOUT msecs_to_jiffies(1000) + +-/* currently no SoC has more than 2 macs */ +-#define MTK_MAX_DEVS 2 ++/* currently no SoC has more than 3 macs */ ++#define MTK_MAX_DEVS 3 + + /* struct mtk_eth - This is the main datasructure for holding the state + * of the driver diff --git a/target/linux/generic/pending-5.15/737-03-net-ethernet-mtk_eth_soc-rely-on-num_devs-and-remove.patch b/target/linux/generic/backport-6.1/750-v6.5-07-net-ethernet-mtk_eth_soc-rely-on-MTK_MAX_DEVS-and-re.patch similarity index 50% rename from target/linux/generic/pending-5.15/737-03-net-ethernet-mtk_eth_soc-rely-on-num_devs-and-remove.patch rename to target/linux/generic/backport-6.1/750-v6.5-07-net-ethernet-mtk_eth_soc-rely-on-MTK_MAX_DEVS-and-re.patch index 5033887f0..807165831 100644 --- a/target/linux/generic/pending-5.15/737-03-net-ethernet-mtk_eth_soc-rely-on-num_devs-and-remove.patch +++ b/target/linux/generic/backport-6.1/750-v6.5-07-net-ethernet-mtk_eth_soc-rely-on-MTK_MAX_DEVS-and-re.patch @@ -1,143 +1,176 @@ -From 4e35e80750b33727e606be9e7ce447bde2e0deb7 Mon Sep 17 00:00:00 2001 +From 856be974290f28d7943be2ac5a382c4139486196 Mon Sep 17 00:00:00 2001 From: Lorenzo Bianconi -Date: Tue, 7 Mar 2023 15:55:35 +0000 -Subject: [PATCH 3/7] net: ethernet: mtk_eth_soc: rely on num_devs and remove - MTK_MAC_COUNT +Date: Tue, 25 Jul 2023 01:52:44 +0100 +Subject: [PATCH 101/250] net: ethernet: mtk_eth_soc: rely on MTK_MAX_DEVS and + remove MTK_MAC_COUNT -Get rid of MTK_MAC_COUNT since it is a duplicated of eth->soc->num_devs. +Get rid of MTK_MAC_COUNT since it is a duplicated of MTK_MAX_DEVS. Signed-off-by: Lorenzo Bianconi Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/1856f4266f2fc80677807b1bad867659e7b00c65.1690246066.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski --- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 30 ++++++++++----------- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 49 ++++++++++++--------- drivers/net/ethernet/mediatek/mtk_eth_soc.h | 1 - - 2 files changed, 15 insertions(+), 16 deletions(-) + 2 files changed, 27 insertions(+), 23 deletions(-) --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -899,7 +899,7 @@ static void mtk_stats_update(struct mtk_ +@@ -881,7 +881,7 @@ static void mtk_stats_update(struct mtk_ { int i; - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { if (!eth->mac[i] || !eth->mac[i]->hw_stats) continue; if (spin_trylock(ð->mac[i]->hw_stats->stats_lock)) { -@@ -1402,7 +1402,7 @@ static int mtk_queue_stopped(struct mtk_ +@@ -1386,7 +1386,7 @@ static int mtk_queue_stopped(struct mtk_ { int i; - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { if (!eth->netdev[i]) continue; if (netif_queue_stopped(eth->netdev[i])) -@@ -1416,7 +1416,7 @@ static void mtk_wake_queue(struct mtk_et +@@ -1400,7 +1400,7 @@ static void mtk_wake_queue(struct mtk_et { int i; - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { if (!eth->netdev[i]) continue; netif_tx_wake_all_queues(eth->netdev[i]); -@@ -1907,7 +1907,7 @@ static int mtk_poll_rx(struct napi_struc +@@ -1859,7 +1859,7 @@ static int mtk_poll_rx(struct napi_struc !(trxd.rxd4 & RX_DMA_SPECIAL_TAG)) mac = RX_DMA_GET_SPORT(trxd.rxd4) - 1; - if (unlikely(mac < 0 || mac >= MTK_MAC_COUNT || -+ if (unlikely(mac < 0 || mac >= eth->soc->num_devs || ++ if (unlikely(mac < 0 || mac >= MTK_MAX_DEVS || !eth->netdev[mac])) goto release_desc; -@@ -2939,7 +2939,7 @@ static void mtk_dma_free(struct mtk_eth +@@ -2899,7 +2899,7 @@ static void mtk_dma_free(struct mtk_eth const struct mtk_soc_data *soc = eth->soc; int i; - for (i = 0; i < MTK_MAC_COUNT; i++) -+ for (i = 0; i < soc->num_devs; i++) ++ for (i = 0; i < MTK_MAX_DEVS; i++) if (eth->netdev[i]) netdev_reset_queue(eth->netdev[i]); if (eth->scratch_ring) { -@@ -3093,7 +3093,7 @@ static void mtk_gdm_config(struct mtk_et +@@ -3053,8 +3053,13 @@ static void mtk_gdm_config(struct mtk_et if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) return; - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { - u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i)); +- u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i)); ++ for (i = 0; i < MTK_MAX_DEVS; i++) { ++ u32 val; ++ ++ if (!eth->netdev[i]) ++ continue; ++ ++ val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i)); /* default setup the forward port to send frame to PDMA */ -@@ -3706,7 +3706,7 @@ static int mtk_hw_init(struct mtk_eth *e + val &= ~0xffff; +@@ -3064,7 +3069,7 @@ static void mtk_gdm_config(struct mtk_et + + val |= config; + +- if (eth->netdev[i] && netdev_uses_dsa(eth->netdev[i])) ++ if (netdev_uses_dsa(eth->netdev[i])) + val |= MTK_GDMA_SPECIAL_TAG; + + mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i)); +@@ -3661,15 +3666,15 @@ static int mtk_hw_init(struct mtk_eth *e * up with the more appropriate value when mtk_mac_config call is being * invoked. */ - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { struct net_device *dev = eth->netdev[i]; - mtk_w32(eth, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(i)); -@@ -3894,7 +3894,7 @@ static void mtk_pending_work(struct work +- mtk_w32(eth, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(i)); +- if (dev) { +- struct mtk_mac *mac = netdev_priv(dev); ++ if (!dev) ++ continue; + +- mtk_set_mcr_max_rx(mac, dev->mtu + MTK_RX_ETH_HLEN); +- } ++ mtk_w32(eth, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(i)); ++ mtk_set_mcr_max_rx(netdev_priv(dev), ++ dev->mtu + MTK_RX_ETH_HLEN); + } + + /* Indicates CDM to parse the MTK special tag from CPU +@@ -3849,7 +3854,7 @@ static void mtk_pending_work(struct work mtk_prepare_for_reset(eth); /* stop all devices to make sure that dma is properly shut down */ - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { if (!eth->netdev[i] || !netif_running(eth->netdev[i])) continue; -@@ -3910,7 +3910,7 @@ static void mtk_pending_work(struct work +@@ -3865,8 +3870,8 @@ static void mtk_pending_work(struct work mtk_hw_init(eth, true); /* restart DMA and enable IRQs */ - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { - if (!test_bit(i, &restart)) +- if (!test_bit(i, &restart)) ++ for (i = 0; i < MTK_MAX_DEVS; i++) { ++ if (!eth->netdev[i] || !test_bit(i, &restart)) continue; -@@ -3938,7 +3938,7 @@ static int mtk_free_dev(struct mtk_eth * + if (mtk_open(eth->netdev[i])) { +@@ -3893,7 +3898,7 @@ static int mtk_free_dev(struct mtk_eth * { int i; - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { if (!eth->netdev[i]) continue; free_netdev(eth->netdev[i]); -@@ -3957,7 +3957,7 @@ static int mtk_unreg_dev(struct mtk_eth +@@ -3912,7 +3917,7 @@ static int mtk_unreg_dev(struct mtk_eth { int i; - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { struct mtk_mac *mac; if (!eth->netdev[i]) continue; -@@ -4261,7 +4261,7 @@ static int mtk_add_mac(struct mtk_eth *e +@@ -4213,7 +4218,7 @@ static int mtk_add_mac(struct mtk_eth *e } id = be32_to_cpup(_id); - if (id >= MTK_MAC_COUNT) { -+ if (id >= eth->soc->num_devs) { ++ if (id >= MTK_MAX_DEVS) { dev_err(eth->dev, "%d is not a valid mac id\n", id); return -EINVAL; } -@@ -4402,7 +4402,7 @@ void mtk_eth_set_dma_device(struct mtk_e +@@ -4358,7 +4363,7 @@ void mtk_eth_set_dma_device(struct mtk_e rtnl_lock(); - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { dev = eth->netdev[i]; if (!dev || !(dev->flags & IFF_UP)) -@@ -4729,7 +4729,7 @@ static int mtk_remove(struct platform_de +@@ -4664,7 +4669,7 @@ static int mtk_remove(struct platform_de int i; /* stop all devices to make sure that dma is properly shut down */ - for (i = 0; i < MTK_MAC_COUNT; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { ++ for (i = 0; i < MTK_MAX_DEVS; i++) { if (!eth->netdev[i]) continue; mtk_stop(eth->netdev[i]); diff --git a/target/linux/generic/pending-6.1/737-04-net-ethernet-mtk_eth_soc-add-MTK_NETSYS_V3-capabilit.patch b/target/linux/generic/backport-6.1/750-v6.5-08-net-ethernet-mtk_eth_soc-add-NETSYS_V3-version-suppo.patch similarity index 63% rename from target/linux/generic/pending-6.1/737-04-net-ethernet-mtk_eth_soc-add-MTK_NETSYS_V3-capabilit.patch rename to target/linux/generic/backport-6.1/750-v6.5-08-net-ethernet-mtk_eth_soc-add-NETSYS_V3-version-suppo.patch index ccf9e0d65..1a9b31f52 100644 --- a/target/linux/generic/pending-6.1/737-04-net-ethernet-mtk_eth_soc-add-MTK_NETSYS_V3-capabilit.patch +++ b/target/linux/generic/backport-6.1/750-v6.5-08-net-ethernet-mtk_eth_soc-add-NETSYS_V3-version-suppo.patch @@ -1,22 +1,24 @@ -From ab817f559d505329d8a413c7d29250f6d87d77a0 Mon Sep 17 00:00:00 2001 +From a41d535855976838d246c079143c948dcf0f7931 Mon Sep 17 00:00:00 2001 From: Lorenzo Bianconi -Date: Tue, 7 Mar 2023 15:55:47 +0000 -Subject: [PATCH 4/7] net: ethernet: mtk_eth_soc: add MTK_NETSYS_V3 capability - bit +Date: Tue, 25 Jul 2023 01:52:59 +0100 +Subject: [PATCH 102/250] net: ethernet: mtk_eth_soc: add NETSYS_V3 version + support -Introduce MTK_NETSYS_V3 bit in the device capabilities. +Introduce NETSYS_V3 chipset version support. This is a preliminary patch to introduce support for MT7988 SoC. Signed-off-by: Lorenzo Bianconi Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/0db2260910755d76fa48e303b9f9bdf4e5a82340.1690246066.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski --- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 115 ++++++++++++++++---- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 44 +++++++- - 2 files changed, 134 insertions(+), 25 deletions(-) + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 105 ++++++++++++++------ + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 48 +++++++-- + 2 files changed, 116 insertions(+), 37 deletions(-) --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -923,17 +923,32 @@ void mtk_stats_update_mac(struct mtk_mac +@@ -861,17 +861,32 @@ void mtk_stats_update_mac(struct mtk_mac mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x20 + offs); hw_stats->rx_flow_control_packets += mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x24 + offs); @@ -32,7 +34,7 @@ Signed-off-by: Daniel Golle - hw_stats->tx_packets += - mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x38 + offs); + -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) { ++ if (mtk_is_netsys_v3_or_greater(eth)) { + hw_stats->tx_skip += + mtk_r32(mac->hw, reg_map->gdm1_cnt + 0x50 + offs); + hw_stats->tx_collisions += @@ -60,7 +62,7 @@ Signed-off-by: Daniel Golle } u64_stats_update_end(&hw_stats->syncp); -@@ -1237,7 +1252,10 @@ static void mtk_tx_set_dma_desc_v2(struc +@@ -1175,7 +1190,10 @@ static void mtk_tx_set_dma_desc_v2(struc data |= TX_DMA_LS0; WRITE_ONCE(desc->txd3, data); @@ -72,57 +74,53 @@ Signed-off-by: Daniel Golle data |= TX_DMA_SWC_V2 | QID_BITS_V2(info->qid); WRITE_ONCE(desc->txd4, data); -@@ -1248,6 +1266,9 @@ static void mtk_tx_set_dma_desc_v2(struc +@@ -1186,6 +1204,8 @@ static void mtk_tx_set_dma_desc_v2(struc /* tx checksum offload */ if (info->csum) data |= TX_DMA_CHKSUM_V2; -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3) && -+ netdev_uses_dsa(dev)) ++ if (mtk_is_netsys_v3_or_greater(eth) && netdev_uses_dsa(dev)) + data |= TX_DMA_SPTAG_V3; } WRITE_ONCE(desc->txd5, data); -@@ -1313,8 +1334,13 @@ static int mtk_tx_map(struct sk_buff *sk +@@ -1251,8 +1271,7 @@ static int mtk_tx_map(struct sk_buff *sk mtk_tx_set_dma_desc(dev, itxd, &txd_info); itx_buf->flags |= MTK_TX_FLAGS_SINGLE0; - itx_buf->flags |= (!mac->id) ? MTK_TX_FLAGS_FPORT0 : - MTK_TX_FLAGS_FPORT1; -+ if (mac->id == MTK_GMAC1_ID) -+ itx_buf->flags |= MTK_TX_FLAGS_FPORT0; -+ else if (mac->id == MTK_GMAC2_ID) -+ itx_buf->flags |= MTK_TX_FLAGS_FPORT1; -+ else -+ itx_buf->flags |= MTK_TX_FLAGS_FPORT2; -+ ++ itx_buf->mac_id = mac->id; setup_tx_buf(eth, itx_buf, itxd_pdma, txd_info.addr, txd_info.size, k++); -@@ -1362,8 +1388,13 @@ static int mtk_tx_map(struct sk_buff *sk +@@ -1300,8 +1319,7 @@ static int mtk_tx_map(struct sk_buff *sk memset(tx_buf, 0, sizeof(*tx_buf)); tx_buf->data = (void *)MTK_DMA_DUMMY_DESC; tx_buf->flags |= MTK_TX_FLAGS_PAGE0; - tx_buf->flags |= (!mac->id) ? MTK_TX_FLAGS_FPORT0 : - MTK_TX_FLAGS_FPORT1; -+ -+ if (mac->id == MTK_GMAC1_ID) -+ tx_buf->flags |= MTK_TX_FLAGS_FPORT0; -+ else if (mac->id == MTK_GMAC2_ID) -+ tx_buf->flags |= MTK_TX_FLAGS_FPORT1; -+ else -+ tx_buf->flags |= MTK_TX_FLAGS_FPORT2; ++ tx_buf->mac_id = mac->id; setup_tx_buf(eth, tx_buf, txd_pdma, txd_info.addr, txd_info.size, k++); -@@ -1949,11 +1980,24 @@ static int mtk_poll_rx(struct napi_struc +@@ -1603,7 +1621,7 @@ static int mtk_xdp_frame_map(struct mtk_ + } + mtk_tx_set_dma_desc(dev, txd, txd_info); + +- tx_buf->flags |= !mac->id ? MTK_TX_FLAGS_FPORT0 : MTK_TX_FLAGS_FPORT1; ++ tx_buf->mac_id = mac->id; + tx_buf->type = dma_map ? MTK_TYPE_XDP_NDO : MTK_TYPE_XDP_TX; + tx_buf->data = (void *)MTK_DMA_DUMMY_DESC; + +@@ -1853,11 +1871,24 @@ static int mtk_poll_rx(struct napi_struc break; /* find out which mac the packet come from. values start at 1 */ -- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) +- if (mtk_is_netsys_v2_or_greater(eth)) - mac = RX_DMA_GET_SPORT_V2(trxd.rxd5) - 1; - else if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) && - !(trxd.rxd4 & RX_DMA_SPECIAL_TAG)) -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) { + u32 val = RX_DMA_GET_SPORT_V2(trxd.rxd5); + + switch (val) { @@ -137,29 +135,44 @@ Signed-off-by: Daniel Golle + break; + } + } else if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) && -+ !(trxd.rxd4 & RX_DMA_SPECIAL_TAG)) { ++ !(trxd.rxd4 & RX_DMA_SPECIAL_TAG)) { mac = RX_DMA_GET_SPORT(trxd.rxd4) - 1; + } - if (unlikely(mac < 0 || mac >= eth->soc->num_devs || + if (unlikely(mac < 0 || mac >= MTK_MAX_DEVS || !eth->netdev[mac])) -@@ -2184,7 +2228,9 @@ static int mtk_poll_tx_qdma(struct mtk_e +@@ -2079,7 +2110,6 @@ static int mtk_poll_tx_qdma(struct mtk_e + + while ((cpu != dma) && budget) { + u32 next_cpu = desc->txd2; +- int mac = 0; + + desc = mtk_qdma_phys_to_virt(ring, desc->txd2); + if ((desc->txd3 & TX_DMA_OWNER_CPU) == 0) +@@ -2087,15 +2117,13 @@ static int mtk_poll_tx_qdma(struct mtk_e + tx_buf = mtk_desc_to_tx_buf(ring, desc, eth->soc->txrx.txd_size); - if (tx_buf->flags & MTK_TX_FLAGS_FPORT1) +- if (tx_buf->flags & MTK_TX_FLAGS_FPORT1) - mac = 1; -+ mac = MTK_GMAC2_ID; -+ else if (tx_buf->flags & MTK_TX_FLAGS_FPORT2) -+ mac = MTK_GMAC3_ID; - +- if (!tx_buf->data) break; -@@ -3798,7 +3844,26 @@ static int mtk_hw_init(struct mtk_eth *e + + if (tx_buf->data != (void *)MTK_DMA_DUMMY_DESC) { + if (tx_buf->type == MTK_TYPE_SKB) +- mtk_poll_tx_done(eth, state, mac, tx_buf->data); ++ mtk_poll_tx_done(eth, state, tx_buf->mac_id, ++ tx_buf->data); + + budget--; + } +@@ -3704,7 +3732,24 @@ static int mtk_hw_init(struct mtk_eth *e mtk_w32(eth, eth->soc->txrx.rx_irq_done_mask, reg_map->qdma.int_grp + 4); mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP); -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) { +- if (mtk_is_netsys_v2_or_greater(eth)) { ++ if (mtk_is_netsys_v3_or_greater(eth)) { + /* PSE should not drop port1, port8 and port9 packets */ + mtk_w32(eth, 0x00000302, PSE_DROP_CFG); + @@ -168,9 +181,7 @@ Signed-off-by: Daniel Golle + mtk_w32(eth, 0x00000077, MTK_CDMW1_THRES); + + /* Disable GDM1 RX CRC stripping */ -+ val = mtk_r32(eth, MTK_GDMA_FWD_CFG(0)); -+ val &= ~MTK_GDMA_STRP_CRC; -+ mtk_w32(eth, val, MTK_GDMA_FWD_CFG(0)); ++ mtk_m32(eth, MTK_GDMA_STRP_CRC, 0, MTK_GDMA_FWD_CFG(0)); + + /* PSE GDM3 MIB counter has incorrect hw default values, + * so the driver ought to read clear the values beforehand @@ -178,17 +189,17 @@ Signed-off-by: Daniel Golle + */ + for (i = 0; i < 0x80; i += 0x4) + mtk_r32(eth, reg_map->gdm1_cnt + 0x100 + i); -+ } else if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { ++ } else if (!mtk_is_netsys_v1(eth)) { /* PSE should not drop port8 and port9 packets from WDMA Tx */ mtk_w32(eth, 0x00000300, PSE_DROP_CFG); -@@ -4363,7 +4428,11 @@ static int mtk_add_mac(struct mtk_eth *e +@@ -4266,7 +4311,11 @@ static int mtk_add_mac(struct mtk_eth *e } spin_lock_init(&mac->hw_stats->stats_lock); u64_stats_init(&mac->hw_stats->syncp); - mac->hw_stats->reg_offset = id * MTK_STAT_OFFSET; + -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) ++ if (mtk_is_netsys_v3_or_greater(eth)) + mac->hw_stats->reg_offset = id * 0x80; + else + mac->hw_stats->reg_offset = id * 0x40; @@ -197,7 +208,7 @@ Signed-off-by: Daniel Golle err = of_get_phy_mode(np, &phy_mode); --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -121,6 +121,7 @@ +@@ -122,6 +122,7 @@ #define MTK_GDMA_ICS_EN BIT(22) #define MTK_GDMA_TCS_EN BIT(21) #define MTK_GDMA_UCS_EN BIT(20) @@ -205,7 +216,7 @@ Signed-off-by: Daniel Golle #define MTK_GDMA_TO_PDMA 0x0 #define MTK_GDMA_DROP_ALL 0x7777 -@@ -286,8 +287,6 @@ +@@ -287,8 +288,6 @@ /* QDMA Interrupt grouping registers */ #define MTK_RLS_DONE_INT BIT(0) @@ -214,7 +225,7 @@ Signed-off-by: Daniel Golle /* QDMA TX NUM */ #define QID_BITS_V2(x) (((x) & 0x3f) << 16) #define MTK_QDMA_GMAC2_QID 8 -@@ -300,6 +299,8 @@ +@@ -301,6 +300,8 @@ #define TX_DMA_CHKSUM_V2 (0x7 << 28) #define TX_DMA_TSO_V2 BIT(31) @@ -223,15 +234,20 @@ Signed-off-by: Daniel Golle /* QDMA V2 descriptor txd4 */ #define TX_DMA_FPORT_SHIFT_V2 8 #define TX_DMA_FPORT_MASK_V2 0xf -@@ -639,6 +640,7 @@ enum mtk_tx_flags { +@@ -634,12 +635,6 @@ enum mtk_tx_flags { */ - MTK_TX_FLAGS_FPORT0 = 0x04, - MTK_TX_FLAGS_FPORT1 = 0x08, -+ MTK_TX_FLAGS_FPORT2 = 0x10, + MTK_TX_FLAGS_SINGLE0 = 0x01, + MTK_TX_FLAGS_PAGE0 = 0x02, +- +- /* MTK_TX_FLAGS_FPORTx allows tracking which port the transmitted +- * SKB out instead of looking up through hardware TX descriptor. +- */ +- MTK_TX_FLAGS_FPORT0 = 0x04, +- MTK_TX_FLAGS_FPORT1 = 0x08, }; /* This enum allows us to identify how the clock is defined on the array of the -@@ -724,6 +726,42 @@ enum mtk_dev_state { +@@ -725,6 +720,35 @@ enum mtk_dev_state { MTK_RESETTING }; @@ -263,30 +279,29 @@ Signed-off-by: Daniel Golle + MTK_GMAC3_ID, + MTK_GMAC_ID_MAX +}; -+ -+/* GDM Type */ -+enum mtk_gdm_type { -+ MTK_GDM_TYPE = 0, -+ MTK_XGDM_TYPE, -+ MTK_GDM_TYPE_MAX -+}; + enum mtk_tx_buf_type { MTK_TYPE_SKB, MTK_TYPE_XDP_TX, -@@ -820,6 +858,7 @@ enum mkt_eth_capabilities { - MTK_QDMA_BIT, - MTK_NETSYS_V1_BIT, - MTK_NETSYS_V2_BIT, -+ MTK_NETSYS_V3_BIT, - MTK_SOC_MT7628_BIT, - MTK_RSTCTRL_PPE1_BIT, - MTK_U3_COPHY_V2_BIT, -@@ -856,6 +895,7 @@ enum mkt_eth_capabilities { - #define MTK_QDMA BIT(MTK_QDMA_BIT) - #define MTK_NETSYS_V1 BIT(MTK_NETSYS_V1_BIT) - #define MTK_NETSYS_V2 BIT(MTK_NETSYS_V2_BIT) -+#define MTK_NETSYS_V3 BIT(MTK_NETSYS_V3_BIT) - #define MTK_SOC_MT7628 BIT(MTK_SOC_MT7628_BIT) - #define MTK_RSTCTRL_PPE1 BIT(MTK_RSTCTRL_PPE1_BIT) - #define MTK_U3_COPHY_V2 BIT(MTK_U3_COPHY_V2_BIT) +@@ -743,7 +767,8 @@ struct mtk_tx_buf { + enum mtk_tx_buf_type type; + void *data; + +- u32 flags; ++ u16 mac_id; ++ u16 flags; + DEFINE_DMA_UNMAP_ADDR(dma_addr0); + DEFINE_DMA_UNMAP_LEN(dma_len0); + DEFINE_DMA_UNMAP_ADDR(dma_addr1); +@@ -1192,6 +1217,11 @@ static inline bool mtk_is_netsys_v2_or_g + return eth->soc->version > 1; + } + ++static inline bool mtk_is_netsys_v3_or_greater(struct mtk_eth *eth) ++{ ++ return eth->soc->version > 2; ++} ++ + static inline struct mtk_foe_entry * + mtk_foe_get_entry(struct mtk_ppe *ppe, u16 hash) + { diff --git a/target/linux/generic/pending-5.15/737-05-net-ethernet-mtk_eth_soc-convert-caps-in-mtk_soc_dat.patch b/target/linux/generic/backport-6.1/750-v6.5-09-net-ethernet-mtk_eth_soc-convert-caps-in-mtk_soc_dat.patch similarity index 89% rename from target/linux/generic/pending-5.15/737-05-net-ethernet-mtk_eth_soc-convert-caps-in-mtk_soc_dat.patch rename to target/linux/generic/backport-6.1/750-v6.5-09-net-ethernet-mtk_eth_soc-convert-caps-in-mtk_soc_dat.patch index bd26cca30..7a0b285f2 100644 --- a/target/linux/generic/pending-5.15/737-05-net-ethernet-mtk_eth_soc-convert-caps-in-mtk_soc_dat.patch +++ b/target/linux/generic/backport-6.1/750-v6.5-09-net-ethernet-mtk_eth_soc-convert-caps-in-mtk_soc_dat.patch @@ -1,17 +1,19 @@ -From 45b575fd9e6a455090820248bf1b98b1f2c7b6c8 Mon Sep 17 00:00:00 2001 +From db797ae0542220a98658229397da464c383c991c Mon Sep 17 00:00:00 2001 From: Lorenzo Bianconi -Date: Tue, 7 Mar 2023 15:56:00 +0000 -Subject: [PATCH 5/7] net: ethernet: mtk_eth_soc: convert caps in mtk_soc_data - struct to u64 +Date: Tue, 25 Jul 2023 01:53:13 +0100 +Subject: [PATCH 103/250] net: ethernet: mtk_eth_soc: convert caps in + mtk_soc_data struct to u64 This is a preliminary patch to introduce support for MT7988 SoC. Signed-off-by: Lorenzo Bianconi Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/9499ac3670b2fc5b444404b84e8a4a169beabbf2.1690246066.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski --- - drivers/net/ethernet/mediatek/mtk_eth_path.c | 22 +++---- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 62 ++++++++++---------- - 2 files changed, 42 insertions(+), 42 deletions(-) + drivers/net/ethernet/mediatek/mtk_eth_path.c | 22 ++++---- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 56 ++++++++++---------- + 2 files changed, 39 insertions(+), 39 deletions(-) --- a/drivers/net/ethernet/mediatek/mtk_eth_path.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_path.c @@ -111,7 +113,7 @@ Signed-off-by: Daniel Golle MTK_ETH_PATH_GMAC2_RGMII; --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -878,44 +878,44 @@ enum mkt_eth_capabilities { +@@ -866,41 +866,41 @@ enum mkt_eth_capabilities { }; /* Supported hardware group on SoCs */ @@ -127,9 +129,6 @@ Signed-off-by: Daniel Golle -#define MTK_SHARED_INT BIT(MTK_SHARED_INT_BIT) -#define MTK_TRGMII_MT7621_CLK BIT(MTK_TRGMII_MT7621_CLK_BIT) -#define MTK_QDMA BIT(MTK_QDMA_BIT) --#define MTK_NETSYS_V1 BIT(MTK_NETSYS_V1_BIT) --#define MTK_NETSYS_V2 BIT(MTK_NETSYS_V2_BIT) --#define MTK_NETSYS_V3 BIT(MTK_NETSYS_V3_BIT) -#define MTK_SOC_MT7628 BIT(MTK_SOC_MT7628_BIT) -#define MTK_RSTCTRL_PPE1 BIT(MTK_RSTCTRL_PPE1_BIT) -#define MTK_U3_COPHY_V2 BIT(MTK_U3_COPHY_V2_BIT) @@ -145,9 +144,6 @@ Signed-off-by: Daniel Golle +#define MTK_SHARED_INT BIT_ULL(MTK_SHARED_INT_BIT) +#define MTK_TRGMII_MT7621_CLK BIT_ULL(MTK_TRGMII_MT7621_CLK_BIT) +#define MTK_QDMA BIT_ULL(MTK_QDMA_BIT) -+#define MTK_NETSYS_V1 BIT_ULL(MTK_NETSYS_V1_BIT) -+#define MTK_NETSYS_V2 BIT_ULL(MTK_NETSYS_V2_BIT) -+#define MTK_NETSYS_V3 BIT_ULL(MTK_NETSYS_V3_BIT) +#define MTK_SOC_MT7628 BIT_ULL(MTK_SOC_MT7628_BIT) +#define MTK_RSTCTRL_PPE1 BIT_ULL(MTK_RSTCTRL_PPE1_BIT) +#define MTK_U3_COPHY_V2 BIT_ULL(MTK_U3_COPHY_V2_BIT) @@ -186,7 +182,7 @@ Signed-off-by: Daniel Golle #define MTK_GMAC1_RGMII (MTK_ETH_PATH_GMAC1_RGMII | MTK_RGMII) #define MTK_GMAC1_TRGMII (MTK_ETH_PATH_GMAC1_TRGMII | MTK_TRGMII) -@@ -1071,7 +1071,7 @@ struct mtk_reg_map { +@@ -1045,7 +1045,7 @@ struct mtk_reg_map { struct mtk_soc_data { const struct mtk_reg_map *reg_map; u32 ana_rgc3; diff --git a/target/linux/generic/backport-6.1/750-v6.5-10-net-ethernet-mtk_eth_soc-convert-clock-bitmap-to-u64.patch b/target/linux/generic/backport-6.1/750-v6.5-10-net-ethernet-mtk_eth_soc-convert-clock-bitmap-to-u64.patch new file mode 100644 index 000000000..5947d385f --- /dev/null +++ b/target/linux/generic/backport-6.1/750-v6.5-10-net-ethernet-mtk_eth_soc-convert-clock-bitmap-to-u64.patch @@ -0,0 +1,132 @@ +From a1c9f7d1d24e90294f6a6755b137fcf306851e93 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Tue, 25 Jul 2023 01:53:28 +0100 +Subject: [PATCH 104/250] net: ethernet: mtk_eth_soc: convert clock bitmap to + u64 + +The to-be-added MT7988 SoC adds many new clocks which need to be +controlled by the Ethernet driver, which will result in their total +number exceeding 32. +Prepare by converting clock bitmaps into 64-bit types. + +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/6960a39bb0078cf84d7642a9558e6a91c6cc9df3.1690246066.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 96 +++++++++++---------- + 1 file changed, 49 insertions(+), 47 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -666,54 +666,56 @@ enum mtk_clks_map { + MTK_CLK_MAX + }; + +-#define MT7623_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \ +- BIT(MTK_CLK_GP1) | BIT(MTK_CLK_GP2) | \ +- BIT(MTK_CLK_TRGPLL)) +-#define MT7622_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \ +- BIT(MTK_CLK_GP0) | BIT(MTK_CLK_GP1) | \ +- BIT(MTK_CLK_GP2) | \ +- BIT(MTK_CLK_SGMII_TX_250M) | \ +- BIT(MTK_CLK_SGMII_RX_250M) | \ +- BIT(MTK_CLK_SGMII_CDR_REF) | \ +- BIT(MTK_CLK_SGMII_CDR_FB) | \ +- BIT(MTK_CLK_SGMII_CK) | \ +- BIT(MTK_CLK_ETH2PLL)) ++#define MT7623_CLKS_BITMAP (BIT_ULL(MTK_CLK_ETHIF) | BIT_ULL(MTK_CLK_ESW) | \ ++ BIT_ULL(MTK_CLK_GP1) | BIT_ULL(MTK_CLK_GP2) | \ ++ BIT_ULL(MTK_CLK_TRGPLL)) ++#define MT7622_CLKS_BITMAP (BIT_ULL(MTK_CLK_ETHIF) | BIT_ULL(MTK_CLK_ESW) | \ ++ BIT_ULL(MTK_CLK_GP0) | BIT_ULL(MTK_CLK_GP1) | \ ++ BIT_ULL(MTK_CLK_GP2) | \ ++ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \ ++ BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \ ++ BIT_ULL(MTK_CLK_SGMII_CK) | \ ++ BIT_ULL(MTK_CLK_ETH2PLL)) + #define MT7621_CLKS_BITMAP (0) + #define MT7628_CLKS_BITMAP (0) +-#define MT7629_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \ +- BIT(MTK_CLK_GP0) | BIT(MTK_CLK_GP1) | \ +- BIT(MTK_CLK_GP2) | BIT(MTK_CLK_FE) | \ +- BIT(MTK_CLK_SGMII_TX_250M) | \ +- BIT(MTK_CLK_SGMII_RX_250M) | \ +- BIT(MTK_CLK_SGMII_CDR_REF) | \ +- BIT(MTK_CLK_SGMII_CDR_FB) | \ +- BIT(MTK_CLK_SGMII2_TX_250M) | \ +- BIT(MTK_CLK_SGMII2_RX_250M) | \ +- BIT(MTK_CLK_SGMII2_CDR_REF) | \ +- BIT(MTK_CLK_SGMII2_CDR_FB) | \ +- BIT(MTK_CLK_SGMII_CK) | \ +- BIT(MTK_CLK_ETH2PLL) | BIT(MTK_CLK_SGMIITOP)) +-#define MT7981_CLKS_BITMAP (BIT(MTK_CLK_FE) | BIT(MTK_CLK_GP2) | BIT(MTK_CLK_GP1) | \ +- BIT(MTK_CLK_WOCPU0) | \ +- BIT(MTK_CLK_SGMII_TX_250M) | \ +- BIT(MTK_CLK_SGMII_RX_250M) | \ +- BIT(MTK_CLK_SGMII_CDR_REF) | \ +- BIT(MTK_CLK_SGMII_CDR_FB) | \ +- BIT(MTK_CLK_SGMII2_TX_250M) | \ +- BIT(MTK_CLK_SGMII2_RX_250M) | \ +- BIT(MTK_CLK_SGMII2_CDR_REF) | \ +- BIT(MTK_CLK_SGMII2_CDR_FB) | \ +- BIT(MTK_CLK_SGMII_CK)) +-#define MT7986_CLKS_BITMAP (BIT(MTK_CLK_FE) | BIT(MTK_CLK_GP2) | BIT(MTK_CLK_GP1) | \ +- BIT(MTK_CLK_WOCPU1) | BIT(MTK_CLK_WOCPU0) | \ +- BIT(MTK_CLK_SGMII_TX_250M) | \ +- BIT(MTK_CLK_SGMII_RX_250M) | \ +- BIT(MTK_CLK_SGMII_CDR_REF) | \ +- BIT(MTK_CLK_SGMII_CDR_FB) | \ +- BIT(MTK_CLK_SGMII2_TX_250M) | \ +- BIT(MTK_CLK_SGMII2_RX_250M) | \ +- BIT(MTK_CLK_SGMII2_CDR_REF) | \ +- BIT(MTK_CLK_SGMII2_CDR_FB)) ++#define MT7629_CLKS_BITMAP (BIT_ULL(MTK_CLK_ETHIF) | BIT_ULL(MTK_CLK_ESW) | \ ++ BIT_ULL(MTK_CLK_GP0) | BIT_ULL(MTK_CLK_GP1) | \ ++ BIT_ULL(MTK_CLK_GP2) | BIT_ULL(MTK_CLK_FE) | \ ++ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \ ++ BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \ ++ BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \ ++ BIT_ULL(MTK_CLK_SGMII2_CDR_FB) | \ ++ BIT_ULL(MTK_CLK_SGMII_CK) | \ ++ BIT_ULL(MTK_CLK_ETH2PLL) | BIT_ULL(MTK_CLK_SGMIITOP)) ++#define MT7981_CLKS_BITMAP (BIT_ULL(MTK_CLK_FE) | BIT_ULL(MTK_CLK_GP2) | \ ++ BIT_ULL(MTK_CLK_GP1) | \ ++ BIT_ULL(MTK_CLK_WOCPU0) | \ ++ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \ ++ BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \ ++ BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \ ++ BIT_ULL(MTK_CLK_SGMII2_CDR_FB) | \ ++ BIT_ULL(MTK_CLK_SGMII_CK)) ++#define MT7986_CLKS_BITMAP (BIT_ULL(MTK_CLK_FE) | BIT_ULL(MTK_CLK_GP2) | \ ++ BIT_ULL(MTK_CLK_GP1) | \ ++ BIT_ULL(MTK_CLK_WOCPU1) | BIT_ULL(MTK_CLK_WOCPU0) | \ ++ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \ ++ BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \ ++ BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \ ++ BIT_ULL(MTK_CLK_SGMII2_CDR_FB)) + + enum mtk_dev_state { + MTK_HW_INIT, +@@ -1046,7 +1048,7 @@ struct mtk_soc_data { + const struct mtk_reg_map *reg_map; + u32 ana_rgc3; + u64 caps; +- u32 required_clks; ++ u64 required_clks; + bool required_pctl; + u8 offload_version; + u8 hash_offset; diff --git a/target/linux/generic/backport-6.1/750-v6.5-11-net-ethernet-mtk_eth_soc-add-basic-support-for-MT798.patch b/target/linux/generic/backport-6.1/750-v6.5-11-net-ethernet-mtk_eth_soc-add-basic-support-for-MT798.patch new file mode 100644 index 000000000..8c24321dd --- /dev/null +++ b/target/linux/generic/backport-6.1/750-v6.5-11-net-ethernet-mtk_eth_soc-add-basic-support-for-MT798.patch @@ -0,0 +1,477 @@ +From 94f825a7eadfc8b4c8828efdb7705d9703f9c73e Mon Sep 17 00:00:00 2001 +From: Lorenzo Bianconi +Date: Tue, 25 Jul 2023 01:57:42 +0100 +Subject: [PATCH 105/250] net: ethernet: mtk_eth_soc: add basic support for + MT7988 SoC + +Introduce support for ethernet chip available in MT7988 SoC to +mtk_eth_soc driver. As a first step support only the first GMAC which +is hard-wired to the internal DSA switch having 4 built-in gigabit +Ethernet PHYs. + +Signed-off-by: Lorenzo Bianconi +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/25c8377095b95d186872eeda7aa055da83e8f0ca.1690246605.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_path.c | 14 +- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 201 +++++++++++++++++-- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 86 +++++++- + 3 files changed, 273 insertions(+), 28 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_path.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_path.c +@@ -43,7 +43,7 @@ static const char *mtk_eth_path_name(u64 + static int set_mux_gdm1_to_gmac1_esw(struct mtk_eth *eth, u64 path) + { + bool updated = true; +- u32 val, mask, set; ++ u32 mask, set, reg; + + switch (path) { + case MTK_ETH_PATH_GMAC1_SGMII: +@@ -59,11 +59,13 @@ static int set_mux_gdm1_to_gmac1_esw(str + break; + } + +- if (updated) { +- val = mtk_r32(eth, MTK_MAC_MISC); +- val = (val & mask) | set; +- mtk_w32(eth, val, MTK_MAC_MISC); +- } ++ if (mtk_is_netsys_v3_or_greater(eth)) ++ reg = MTK_MAC_MISC_V3; ++ else ++ reg = MTK_MAC_MISC; ++ ++ if (updated) ++ mtk_m32(eth, mask, set, reg); + + dev_dbg(eth->dev, "path %s in %s updated = %d\n", + mtk_eth_path_name(path), __func__, updated); +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -152,6 +152,54 @@ static const struct mtk_reg_map mt7986_r + .pse_oq_sta = 0x01a0, + }; + ++static const struct mtk_reg_map mt7988_reg_map = { ++ .tx_irq_mask = 0x461c, ++ .tx_irq_status = 0x4618, ++ .pdma = { ++ .rx_ptr = 0x6900, ++ .rx_cnt_cfg = 0x6904, ++ .pcrx_ptr = 0x6908, ++ .glo_cfg = 0x6a04, ++ .rst_idx = 0x6a08, ++ .delay_irq = 0x6a0c, ++ .irq_status = 0x6a20, ++ .irq_mask = 0x6a28, ++ .adma_rx_dbg0 = 0x6a38, ++ .int_grp = 0x6a50, ++ }, ++ .qdma = { ++ .qtx_cfg = 0x4400, ++ .qtx_sch = 0x4404, ++ .rx_ptr = 0x4500, ++ .rx_cnt_cfg = 0x4504, ++ .qcrx_ptr = 0x4508, ++ .glo_cfg = 0x4604, ++ .rst_idx = 0x4608, ++ .delay_irq = 0x460c, ++ .fc_th = 0x4610, ++ .int_grp = 0x4620, ++ .hred = 0x4644, ++ .ctx_ptr = 0x4700, ++ .dtx_ptr = 0x4704, ++ .crx_ptr = 0x4710, ++ .drx_ptr = 0x4714, ++ .fq_head = 0x4720, ++ .fq_tail = 0x4724, ++ .fq_count = 0x4728, ++ .fq_blen = 0x472c, ++ .tx_sch_rate = 0x4798, ++ }, ++ .gdm1_cnt = 0x1c00, ++ .gdma_to_ppe = 0x3333, ++ .ppe_base = 0x2000, ++ .wdma_base = { ++ [0] = 0x4800, ++ [1] = 0x4c00, ++ }, ++ .pse_iq_sta = 0x0180, ++ .pse_oq_sta = 0x01a0, ++}; ++ + /* strings used by ethtool */ + static const struct mtk_ethtool_stats { + char str[ETH_GSTRING_LEN]; +@@ -179,10 +227,54 @@ static const struct mtk_ethtool_stats { + }; + + static const char * const mtk_clks_source_name[] = { +- "ethif", "sgmiitop", "esw", "gp0", "gp1", "gp2", "fe", "trgpll", +- "sgmii_tx250m", "sgmii_rx250m", "sgmii_cdr_ref", "sgmii_cdr_fb", +- "sgmii2_tx250m", "sgmii2_rx250m", "sgmii2_cdr_ref", "sgmii2_cdr_fb", +- "sgmii_ck", "eth2pll", "wocpu0", "wocpu1", "netsys0", "netsys1" ++ "ethif", ++ "sgmiitop", ++ "esw", ++ "gp0", ++ "gp1", ++ "gp2", ++ "gp3", ++ "xgp1", ++ "xgp2", ++ "xgp3", ++ "crypto", ++ "fe", ++ "trgpll", ++ "sgmii_tx250m", ++ "sgmii_rx250m", ++ "sgmii_cdr_ref", ++ "sgmii_cdr_fb", ++ "sgmii2_tx250m", ++ "sgmii2_rx250m", ++ "sgmii2_cdr_ref", ++ "sgmii2_cdr_fb", ++ "sgmii_ck", ++ "eth2pll", ++ "wocpu0", ++ "wocpu1", ++ "netsys0", ++ "netsys1", ++ "ethwarp_wocpu2", ++ "ethwarp_wocpu1", ++ "ethwarp_wocpu0", ++ "top_usxgmii0_sel", ++ "top_usxgmii1_sel", ++ "top_sgm0_sel", ++ "top_sgm1_sel", ++ "top_xfi_phy0_xtal_sel", ++ "top_xfi_phy1_xtal_sel", ++ "top_eth_gmii_sel", ++ "top_eth_refck_50m_sel", ++ "top_eth_sys_200m_sel", ++ "top_eth_sys_sel", ++ "top_eth_xgmii_sel", ++ "top_eth_mii_sel", ++ "top_netsys_sel", ++ "top_netsys_500m_sel", ++ "top_netsys_pao_2x_sel", ++ "top_netsys_sync_250m_sel", ++ "top_netsys_ppefb_250m_sel", ++ "top_netsys_warp_sel", + }; + + void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg) +@@ -195,7 +287,7 @@ u32 mtk_r32(struct mtk_eth *eth, unsigne + return __raw_readl(eth->base + reg); + } + +-static u32 mtk_m32(struct mtk_eth *eth, u32 mask, u32 set, unsigned reg) ++u32 mtk_m32(struct mtk_eth *eth, u32 mask, u32 set, unsigned int reg) + { + u32 val; + +@@ -369,6 +461,19 @@ static void mtk_gmac0_rgmii_adjust(struc + dev_err(eth->dev, "Missing PLL configuration, ethernet may not work\n"); + } + ++static void mtk_setup_bridge_switch(struct mtk_eth *eth) ++{ ++ /* Force Port1 XGMAC Link Up */ ++ mtk_m32(eth, 0, MTK_XGMAC_FORCE_LINK(MTK_GMAC1_ID), ++ MTK_XGMAC_STS(MTK_GMAC1_ID)); ++ ++ /* Adjust GSW bridge IPG to 11 */ ++ mtk_m32(eth, GSWTX_IPG_MASK | GSWRX_IPG_MASK, ++ (GSW_IPG_11 << GSWTX_IPG_SHIFT) | ++ (GSW_IPG_11 << GSWRX_IPG_SHIFT), ++ MTK_GSW_CFG); ++} ++ + static struct phylink_pcs *mtk_mac_select_pcs(struct phylink_config *config, + phy_interface_t interface) + { +@@ -438,6 +543,8 @@ static void mtk_mac_config(struct phylin + goto init_err; + } + break; ++ case PHY_INTERFACE_MODE_INTERNAL: ++ break; + default: + goto err_phy; + } +@@ -515,6 +622,15 @@ static void mtk_mac_config(struct phylin + return; + } + ++ /* Setup gmac */ ++ if (mtk_is_netsys_v3_or_greater(eth) && ++ mac->interface == PHY_INTERFACE_MODE_INTERNAL) { ++ mtk_w32(mac->hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac->id)); ++ mtk_w32(mac->hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac->id)); ++ ++ mtk_setup_bridge_switch(eth); ++ } ++ + return; + + err_phy: +@@ -725,11 +841,15 @@ static int mtk_mdio_init(struct mtk_eth + } + divider = min_t(unsigned int, DIV_ROUND_UP(MDC_MAX_FREQ, max_clk), 63); + ++ /* Configure MDC Turbo Mode */ ++ if (mtk_is_netsys_v3_or_greater(eth)) ++ mtk_m32(eth, 0, MISC_MDC_TURBO, MTK_MAC_MISC_V3); ++ + /* Configure MDC Divider */ +- val = mtk_r32(eth, MTK_PPSC); +- val &= ~PPSC_MDC_CFG; +- val |= FIELD_PREP(PPSC_MDC_CFG, divider) | PPSC_MDC_TURBO; +- mtk_w32(eth, val, MTK_PPSC); ++ val = FIELD_PREP(PPSC_MDC_CFG, divider); ++ if (!mtk_is_netsys_v3_or_greater(eth)) ++ val |= PPSC_MDC_TURBO; ++ mtk_m32(eth, PPSC_MDC_CFG, val, MTK_PPSC); + + dev_dbg(eth->dev, "MDC is running on %d Hz\n", MDC_MAX_FREQ / divider); + +@@ -1190,10 +1310,19 @@ static void mtk_tx_set_dma_desc_v2(struc + data |= TX_DMA_LS0; + WRITE_ONCE(desc->txd3, data); + +- if (mac->id == MTK_GMAC3_ID) +- data = PSE_GDM3_PORT; +- else +- data = (mac->id + 1) << TX_DMA_FPORT_SHIFT_V2; /* forward port */ ++ /* set forward port */ ++ switch (mac->id) { ++ case MTK_GMAC1_ID: ++ data = PSE_GDM1_PORT << TX_DMA_FPORT_SHIFT_V2; ++ break; ++ case MTK_GMAC2_ID: ++ data = PSE_GDM2_PORT << TX_DMA_FPORT_SHIFT_V2; ++ break; ++ case MTK_GMAC3_ID: ++ data = PSE_GDM3_PORT << TX_DMA_FPORT_SHIFT_V2; ++ break; ++ } ++ + data |= TX_DMA_SWC_V2 | QID_BITS_V2(info->qid); + WRITE_ONCE(desc->txd4, data); + +@@ -4360,6 +4489,17 @@ static int mtk_add_mac(struct mtk_eth *e + mac->phylink_config.supported_interfaces); + } + ++ if (mtk_is_netsys_v3_or_greater(mac->hw) && ++ MTK_HAS_CAPS(mac->hw->soc->caps, MTK_ESW_BIT) && ++ id == MTK_GMAC1_ID) { ++ mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | ++ MAC_SYM_PAUSE | ++ MAC_10000FD; ++ phy_interface_zero(mac->phylink_config.supported_interfaces); ++ __set_bit(PHY_INTERFACE_MODE_INTERNAL, ++ mac->phylink_config.supported_interfaces); ++ } ++ + phylink = phylink_create(&mac->phylink_config, + of_fwnode_handle(mac->of_node), + phy_mode, &mtk_phylink_ops); +@@ -4880,6 +5020,24 @@ static const struct mtk_soc_data mt7986_ + }, + }; + ++static const struct mtk_soc_data mt7988_data = { ++ .reg_map = &mt7988_reg_map, ++ .ana_rgc3 = 0x128, ++ .caps = MT7988_CAPS, ++ .hw_features = MTK_HW_FEATURES, ++ .required_clks = MT7988_CLKS_BITMAP, ++ .required_pctl = false, ++ .version = 3, ++ .txrx = { ++ .txd_size = sizeof(struct mtk_tx_dma_v2), ++ .rxd_size = sizeof(struct mtk_rx_dma_v2), ++ .rx_irq_done_mask = MTK_RX_DONE_INT_V2, ++ .rx_dma_l4_valid = RX_DMA_L4_VALID_V2, ++ .dma_max_len = MTK_TX_DMA_BUF_LEN_V2, ++ .dma_len_offset = 8, ++ }, ++}; ++ + static const struct mtk_soc_data rt5350_data = { + .reg_map = &mt7628_reg_map, + .caps = MT7628_CAPS, +@@ -4898,14 +5056,15 @@ static const struct mtk_soc_data rt5350_ + }; + + const struct of_device_id of_mtk_match[] = { +- { .compatible = "mediatek,mt2701-eth", .data = &mt2701_data}, +- { .compatible = "mediatek,mt7621-eth", .data = &mt7621_data}, +- { .compatible = "mediatek,mt7622-eth", .data = &mt7622_data}, +- { .compatible = "mediatek,mt7623-eth", .data = &mt7623_data}, +- { .compatible = "mediatek,mt7629-eth", .data = &mt7629_data}, +- { .compatible = "mediatek,mt7981-eth", .data = &mt7981_data}, +- { .compatible = "mediatek,mt7986-eth", .data = &mt7986_data}, +- { .compatible = "ralink,rt5350-eth", .data = &rt5350_data}, ++ { .compatible = "mediatek,mt2701-eth", .data = &mt2701_data }, ++ { .compatible = "mediatek,mt7621-eth", .data = &mt7621_data }, ++ { .compatible = "mediatek,mt7622-eth", .data = &mt7622_data }, ++ { .compatible = "mediatek,mt7623-eth", .data = &mt7623_data }, ++ { .compatible = "mediatek,mt7629-eth", .data = &mt7629_data }, ++ { .compatible = "mediatek,mt7981-eth", .data = &mt7981_data }, ++ { .compatible = "mediatek,mt7986-eth", .data = &mt7986_data }, ++ { .compatible = "mediatek,mt7988-eth", .data = &mt7988_data }, ++ { .compatible = "ralink,rt5350-eth", .data = &rt5350_data }, + {}, + }; + MODULE_DEVICE_TABLE(of, of_mtk_match); +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -117,7 +117,8 @@ + #define MTK_CDMP_EG_CTRL 0x404 + + /* GDM Exgress Control Register */ +-#define MTK_GDMA_FWD_CFG(x) (0x500 + (x * 0x1000)) ++#define MTK_GDMA_FWD_CFG(x) ({ typeof(x) _x = (x); (_x == MTK_GMAC3_ID) ? \ ++ 0x540 : 0x500 + (_x * 0x1000); }) + #define MTK_GDMA_SPECIAL_TAG BIT(24) + #define MTK_GDMA_ICS_EN BIT(22) + #define MTK_GDMA_TCS_EN BIT(21) +@@ -126,6 +127,11 @@ + #define MTK_GDMA_TO_PDMA 0x0 + #define MTK_GDMA_DROP_ALL 0x7777 + ++/* GDM Egress Control Register */ ++#define MTK_GDMA_EG_CTRL(x) ({ typeof(x) _x = (x); (_x == MTK_GMAC3_ID) ? \ ++ 0x544 : 0x504 + (_x * 0x1000); }) ++#define MTK_GDMA_XGDM_SEL BIT(31) ++ + /* Unicast Filter MAC Address Register - Low */ + #define MTK_GDMA_MAC_ADRL(x) (0x508 + (x * 0x1000)) + +@@ -389,7 +395,26 @@ + #define PHY_IAC_TIMEOUT HZ + + #define MTK_MAC_MISC 0x1000c ++#define MTK_MAC_MISC_V3 0x10010 + #define MTK_MUX_TO_ESW BIT(0) ++#define MISC_MDC_TURBO BIT(4) ++ ++/* XMAC status registers */ ++#define MTK_XGMAC_STS(x) (((x) == MTK_GMAC3_ID) ? 0x1001C : 0x1000C) ++#define MTK_XGMAC_FORCE_LINK(x) (((x) == MTK_GMAC2_ID) ? BIT(31) : BIT(15)) ++#define MTK_USXGMII_PCS_LINK BIT(8) ++#define MTK_XGMAC_RX_FC BIT(5) ++#define MTK_XGMAC_TX_FC BIT(4) ++#define MTK_USXGMII_PCS_MODE GENMASK(3, 1) ++#define MTK_XGMAC_LINK_STS BIT(0) ++ ++/* GSW bridge registers */ ++#define MTK_GSW_CFG (0x10080) ++#define GSWTX_IPG_MASK GENMASK(19, 16) ++#define GSWTX_IPG_SHIFT 16 ++#define GSWRX_IPG_MASK GENMASK(3, 0) ++#define GSWRX_IPG_SHIFT 0 ++#define GSW_IPG_11 11 + + /* Mac control registers */ + #define MTK_MAC_MCR(x) (0x10100 + (x * 0x100)) +@@ -647,6 +672,11 @@ enum mtk_clks_map { + MTK_CLK_GP0, + MTK_CLK_GP1, + MTK_CLK_GP2, ++ MTK_CLK_GP3, ++ MTK_CLK_XGP1, ++ MTK_CLK_XGP2, ++ MTK_CLK_XGP3, ++ MTK_CLK_CRYPTO, + MTK_CLK_FE, + MTK_CLK_TRGPLL, + MTK_CLK_SGMII_TX_250M, +@@ -663,6 +693,27 @@ enum mtk_clks_map { + MTK_CLK_WOCPU1, + MTK_CLK_NETSYS0, + MTK_CLK_NETSYS1, ++ MTK_CLK_ETHWARP_WOCPU2, ++ MTK_CLK_ETHWARP_WOCPU1, ++ MTK_CLK_ETHWARP_WOCPU0, ++ MTK_CLK_TOP_USXGMII_SBUS_0_SEL, ++ MTK_CLK_TOP_USXGMII_SBUS_1_SEL, ++ MTK_CLK_TOP_SGM_0_SEL, ++ MTK_CLK_TOP_SGM_1_SEL, ++ MTK_CLK_TOP_XFI_PHY_0_XTAL_SEL, ++ MTK_CLK_TOP_XFI_PHY_1_XTAL_SEL, ++ MTK_CLK_TOP_ETH_GMII_SEL, ++ MTK_CLK_TOP_ETH_REFCK_50M_SEL, ++ MTK_CLK_TOP_ETH_SYS_200M_SEL, ++ MTK_CLK_TOP_ETH_SYS_SEL, ++ MTK_CLK_TOP_ETH_XGMII_SEL, ++ MTK_CLK_TOP_ETH_MII_SEL, ++ MTK_CLK_TOP_NETSYS_SEL, ++ MTK_CLK_TOP_NETSYS_500M_SEL, ++ MTK_CLK_TOP_NETSYS_PAO_2X_SEL, ++ MTK_CLK_TOP_NETSYS_SYNC_250M_SEL, ++ MTK_CLK_TOP_NETSYS_PPEFB_250M_SEL, ++ MTK_CLK_TOP_NETSYS_WARP_SEL, + MTK_CLK_MAX + }; + +@@ -716,6 +767,36 @@ enum mtk_clks_map { + BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ + BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \ + BIT_ULL(MTK_CLK_SGMII2_CDR_FB)) ++#define MT7988_CLKS_BITMAP (BIT_ULL(MTK_CLK_FE) | BIT_ULL(MTK_CLK_ESW) | \ ++ BIT_ULL(MTK_CLK_GP1) | BIT_ULL(MTK_CLK_GP2) | \ ++ BIT_ULL(MTK_CLK_GP3) | BIT_ULL(MTK_CLK_XGP1) | \ ++ BIT_ULL(MTK_CLK_XGP2) | BIT_ULL(MTK_CLK_XGP3) | \ ++ BIT_ULL(MTK_CLK_CRYPTO) | \ ++ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \ ++ BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ ++ BIT_ULL(MTK_CLK_ETHWARP_WOCPU2) | \ ++ BIT_ULL(MTK_CLK_ETHWARP_WOCPU1) | \ ++ BIT_ULL(MTK_CLK_ETHWARP_WOCPU0) | \ ++ BIT_ULL(MTK_CLK_TOP_USXGMII_SBUS_0_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_USXGMII_SBUS_1_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_SGM_0_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_SGM_1_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_XFI_PHY_0_XTAL_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_XFI_PHY_1_XTAL_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_ETH_GMII_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_ETH_REFCK_50M_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_ETH_SYS_200M_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_ETH_SYS_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_ETH_XGMII_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_ETH_MII_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_NETSYS_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_NETSYS_500M_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_NETSYS_PAO_2X_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_NETSYS_SYNC_250M_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_NETSYS_PPEFB_250M_SEL) | \ ++ BIT_ULL(MTK_CLK_TOP_NETSYS_WARP_SEL)) + + enum mtk_dev_state { + MTK_HW_INIT, +@@ -964,6 +1045,8 @@ enum mkt_eth_capabilities { + MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ + MTK_RSTCTRL_PPE1) + ++#define MT7988_CAPS (MTK_GDM1_ESW | MTK_QDMA | MTK_RSTCTRL_PPE1) ++ + struct mtk_tx_dma_desc_info { + dma_addr_t addr; + u32 size; +@@ -1309,6 +1392,7 @@ void mtk_stats_update_mac(struct mtk_mac + + void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg); + u32 mtk_r32(struct mtk_eth *eth, unsigned reg); ++u32 mtk_m32(struct mtk_eth *eth, u32 mask, u32 set, unsigned int reg); + + int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id); + int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id); diff --git a/target/linux/generic/backport-6.1/750-v6.5-12-net-ethernet-mtk_eth_soc-enable-page_pool-support-fo.patch b/target/linux/generic/backport-6.1/750-v6.5-12-net-ethernet-mtk_eth_soc-enable-page_pool-support-fo.patch new file mode 100644 index 000000000..3dc4662d1 --- /dev/null +++ b/target/linux/generic/backport-6.1/750-v6.5-12-net-ethernet-mtk_eth_soc-enable-page_pool-support-fo.patch @@ -0,0 +1,27 @@ +From 38a7eb76220731eff40602cf433f24880be0a6c2 Mon Sep 17 00:00:00 2001 +From: Lorenzo Bianconi +Date: Thu, 27 Jul 2023 09:02:26 +0200 +Subject: [PATCH 106/250] net: ethernet: mtk_eth_soc: enable page_pool support + for MT7988 SoC + +In order to recycle pages, enable page_pool allocator for MT7988 SoC. + +Tested-by: Daniel Golle +Signed-off-by: Lorenzo Bianconi +Link: https://lore.kernel.org/r/fd4e8693980e47385a543e7b002eec0b88bd09df.1690440675.git.lorenzo@kernel.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -1658,7 +1658,7 @@ static void mtk_update_rx_cpu_idx(struct + + static bool mtk_page_pool_enabled(struct mtk_eth *eth) + { +- return eth->soc->version == 2; ++ return mtk_is_netsys_v2_or_greater(eth); + } + + static struct page_pool *mtk_create_page_pool(struct mtk_eth *eth, diff --git a/target/linux/generic/backport-6.1/750-v6.5-13-net-ethernet-mtk_eth_soc-enable-nft-hw-flowtable_off.patch b/target/linux/generic/backport-6.1/750-v6.5-13-net-ethernet-mtk_eth_soc-enable-nft-hw-flowtable_off.patch new file mode 100644 index 000000000..32f26d7d2 --- /dev/null +++ b/target/linux/generic/backport-6.1/750-v6.5-13-net-ethernet-mtk_eth_soc-enable-nft-hw-flowtable_off.patch @@ -0,0 +1,135 @@ +From 199e7d5a7f03dd377f3a7a458360dbedd71d50ba Mon Sep 17 00:00:00 2001 +From: Lorenzo Bianconi +Date: Thu, 27 Jul 2023 09:07:28 +0200 +Subject: [PATCH 107/250] net: ethernet: mtk_eth_soc: enable nft hw + flowtable_offload for MT7988 SoC + +Enable hw Packet Process Engine (PPE) for MT7988 SoC. + +Tested-by: Daniel Golle +Signed-off-by: Lorenzo Bianconi +Link: https://lore.kernel.org/r/5e86341b0220a49620dadc02d77970de5ded9efc.1690441576.git.lorenzo@kernel.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 3 +++ + drivers/net/ethernet/mediatek/mtk_ppe.c | 19 +++++++++++++++---- + drivers/net/ethernet/mediatek/mtk_ppe.h | 19 ++++++++++++++++++- + 3 files changed, 36 insertions(+), 5 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -5028,6 +5028,9 @@ static const struct mtk_soc_data mt7988_ + .required_clks = MT7988_CLKS_BITMAP, + .required_pctl = false, + .version = 3, ++ .offload_version = 2, ++ .hash_offset = 4, ++ .foe_entry_size = MTK_FOE_ENTRY_V3_SIZE, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma_v2), + .rxd_size = sizeof(struct mtk_rx_dma_v2), +--- a/drivers/net/ethernet/mediatek/mtk_ppe.c ++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c +@@ -422,13 +422,22 @@ int mtk_foe_entry_set_wdma(struct mtk_et + struct mtk_foe_mac_info *l2 = mtk_foe_entry_l2(eth, entry); + u32 *ib2 = mtk_foe_entry_ib2(eth, entry); + +- if (mtk_is_netsys_v2_or_greater(eth)) { ++ switch (eth->soc->version) { ++ case 3: ++ *ib2 &= ~MTK_FOE_IB2_PORT_MG_V2; ++ *ib2 |= FIELD_PREP(MTK_FOE_IB2_RX_IDX, txq) | ++ MTK_FOE_IB2_WDMA_WINFO_V2; ++ l2->w3info = FIELD_PREP(MTK_FOE_WINFO_WCID_V3, wcid) | ++ FIELD_PREP(MTK_FOE_WINFO_BSS_V3, bss); ++ break; ++ case 2: + *ib2 &= ~MTK_FOE_IB2_PORT_MG_V2; + *ib2 |= FIELD_PREP(MTK_FOE_IB2_RX_IDX, txq) | + MTK_FOE_IB2_WDMA_WINFO_V2; + l2->winfo = FIELD_PREP(MTK_FOE_WINFO_WCID, wcid) | + FIELD_PREP(MTK_FOE_WINFO_BSS, bss); +- } else { ++ break; ++ default: + *ib2 &= ~MTK_FOE_IB2_PORT_MG; + *ib2 |= MTK_FOE_IB2_WDMA_WINFO; + if (wdma_idx) +@@ -436,6 +445,7 @@ int mtk_foe_entry_set_wdma(struct mtk_et + l2->vlan2 = FIELD_PREP(MTK_FOE_VLAN2_WINFO_BSS, bss) | + FIELD_PREP(MTK_FOE_VLAN2_WINFO_WCID, wcid) | + FIELD_PREP(MTK_FOE_VLAN2_WINFO_RING, txq); ++ break; + } + + return 0; +@@ -950,8 +960,7 @@ void mtk_ppe_start(struct mtk_ppe *ppe) + mtk_ppe_init_foe_table(ppe); + ppe_w32(ppe, MTK_PPE_TB_BASE, ppe->foe_phys); + +- val = MTK_PPE_TB_CFG_ENTRY_80B | +- MTK_PPE_TB_CFG_AGE_NON_L4 | ++ val = MTK_PPE_TB_CFG_AGE_NON_L4 | + MTK_PPE_TB_CFG_AGE_UNBIND | + MTK_PPE_TB_CFG_AGE_TCP | + MTK_PPE_TB_CFG_AGE_UDP | +@@ -967,6 +976,8 @@ void mtk_ppe_start(struct mtk_ppe *ppe) + MTK_PPE_ENTRIES_SHIFT); + if (mtk_is_netsys_v2_or_greater(ppe->eth)) + val |= MTK_PPE_TB_CFG_INFO_SEL; ++ if (!mtk_is_netsys_v3_or_greater(ppe->eth)) ++ val |= MTK_PPE_TB_CFG_ENTRY_80B; + ppe_w32(ppe, MTK_PPE_TB_CFG, val); + + ppe_w32(ppe, MTK_PPE_IP_PROTO_CHK, +--- a/drivers/net/ethernet/mediatek/mtk_ppe.h ++++ b/drivers/net/ethernet/mediatek/mtk_ppe.h +@@ -85,6 +85,17 @@ enum { + #define MTK_FOE_WINFO_BSS GENMASK(5, 0) + #define MTK_FOE_WINFO_WCID GENMASK(15, 6) + ++#define MTK_FOE_WINFO_BSS_V3 GENMASK(23, 16) ++#define MTK_FOE_WINFO_WCID_V3 GENMASK(15, 0) ++ ++#define MTK_FOE_WINFO_PAO_USR_INFO GENMASK(15, 0) ++#define MTK_FOE_WINFO_PAO_TID GENMASK(19, 16) ++#define MTK_FOE_WINFO_PAO_IS_FIXEDRATE BIT(20) ++#define MTK_FOE_WINFO_PAO_IS_PRIOR BIT(21) ++#define MTK_FOE_WINFO_PAO_IS_SP BIT(22) ++#define MTK_FOE_WINFO_PAO_HF BIT(23) ++#define MTK_FOE_WINFO_PAO_AMSDU_EN BIT(24) ++ + enum { + MTK_FOE_STATE_INVALID, + MTK_FOE_STATE_UNBIND, +@@ -106,8 +117,13 @@ struct mtk_foe_mac_info { + u16 pppoe_id; + u16 src_mac_lo; + ++ /* netsys_v2 */ + u16 minfo; + u16 winfo; ++ ++ /* netsys_v3 */ ++ u32 w3info; ++ u32 wpao; + }; + + /* software-only entry type */ +@@ -218,6 +234,7 @@ struct mtk_foe_ipv6_6rd { + + #define MTK_FOE_ENTRY_V1_SIZE 80 + #define MTK_FOE_ENTRY_V2_SIZE 96 ++#define MTK_FOE_ENTRY_V3_SIZE 128 + + struct mtk_foe_entry { + u32 ib1; +@@ -228,7 +245,7 @@ struct mtk_foe_entry { + struct mtk_foe_ipv4_dslite dslite; + struct mtk_foe_ipv6 ipv6; + struct mtk_foe_ipv6_6rd ipv6_6rd; +- u32 data[23]; ++ u32 data[31]; + }; + }; + diff --git a/target/linux/generic/backport-6.1/750-v6.5-14-net-ethernet-mtk_eth_soc-support-per-flow-accounting.patch b/target/linux/generic/backport-6.1/750-v6.5-14-net-ethernet-mtk_eth_soc-support-per-flow-accounting.patch new file mode 100644 index 000000000..876bdd5dd --- /dev/null +++ b/target/linux/generic/backport-6.1/750-v6.5-14-net-ethernet-mtk_eth_soc-support-per-flow-accounting.patch @@ -0,0 +1,78 @@ +From 0c024632c1e7ff69914329bfd87bec749b9c0aed Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Wed, 2 Aug 2023 04:31:09 +0100 +Subject: [PATCH 108/250] net: ethernet: mtk_eth_soc: support per-flow + accounting on MT7988 + +NETSYS_V3 uses 64 bits for each counters while older SoCs are using +48/40 bits for each counter. +Support reading per-flow byte and package counters on NETSYS_V3. + +Signed-off-by: Daniel Golle +Reviewed-by: Simon Horman +Link: https://lore.kernel.org/r/37a0928fa8c1253b197884c68ce1f54239421ac5.1690946442.git.daniel@makrotopia.org +Signed-off-by: Paolo Abeni +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 1 + + drivers/net/ethernet/mediatek/mtk_ppe.c | 21 +++++++++++++------- + drivers/net/ethernet/mediatek/mtk_ppe_regs.h | 2 ++ + 3 files changed, 17 insertions(+), 7 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -5030,6 +5030,7 @@ static const struct mtk_soc_data mt7988_ + .version = 3, + .offload_version = 2, + .hash_offset = 4, ++ .has_accounting = true, + .foe_entry_size = MTK_FOE_ENTRY_V3_SIZE, + .txrx = { + .txd_size = sizeof(struct mtk_tx_dma_v2), +--- a/drivers/net/ethernet/mediatek/mtk_ppe.c ++++ b/drivers/net/ethernet/mediatek/mtk_ppe.c +@@ -91,7 +91,6 @@ static int mtk_ppe_mib_wait_busy(struct + + static int mtk_mib_entry_read(struct mtk_ppe *ppe, u16 index, u64 *bytes, u64 *packets) + { +- u32 byte_cnt_low, byte_cnt_high, pkt_cnt_low, pkt_cnt_high; + u32 val, cnt_r0, cnt_r1, cnt_r2; + int ret; + +@@ -106,12 +105,20 @@ static int mtk_mib_entry_read(struct mtk + cnt_r1 = readl(ppe->base + MTK_PPE_MIB_SER_R1); + cnt_r2 = readl(ppe->base + MTK_PPE_MIB_SER_R2); + +- byte_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R0_BYTE_CNT_LOW, cnt_r0); +- byte_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R1_BYTE_CNT_HIGH, cnt_r1); +- pkt_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R1_PKT_CNT_LOW, cnt_r1); +- pkt_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R2_PKT_CNT_HIGH, cnt_r2); +- *bytes = ((u64)byte_cnt_high << 32) | byte_cnt_low; +- *packets = (pkt_cnt_high << 16) | pkt_cnt_low; ++ if (mtk_is_netsys_v3_or_greater(ppe->eth)) { ++ /* 64 bit for each counter */ ++ u32 cnt_r3 = readl(ppe->base + MTK_PPE_MIB_SER_R3); ++ *bytes = ((u64)cnt_r1 << 32) | cnt_r0; ++ *packets = ((u64)cnt_r3 << 32) | cnt_r2; ++ } else { ++ /* 48 bit byte counter, 40 bit packet counter */ ++ u32 byte_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R0_BYTE_CNT_LOW, cnt_r0); ++ u32 byte_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R1_BYTE_CNT_HIGH, cnt_r1); ++ u32 pkt_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R1_PKT_CNT_LOW, cnt_r1); ++ u32 pkt_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R2_PKT_CNT_HIGH, cnt_r2); ++ *bytes = ((u64)byte_cnt_high << 32) | byte_cnt_low; ++ *packets = (pkt_cnt_high << 16) | pkt_cnt_low; ++ } + + return 0; + } +--- a/drivers/net/ethernet/mediatek/mtk_ppe_regs.h ++++ b/drivers/net/ethernet/mediatek/mtk_ppe_regs.h +@@ -163,6 +163,8 @@ enum { + #define MTK_PPE_MIB_SER_R2 0x348 + #define MTK_PPE_MIB_SER_R2_PKT_CNT_HIGH GENMASK(23, 0) + ++#define MTK_PPE_MIB_SER_R3 0x34c ++ + #define MTK_PPE_MIB_CACHE_CTL 0x350 + #define MTK_PPE_MIB_CACHE_CTL_EN BIT(0) + #define MTK_PPE_MIB_CACHE_CTL_FLUSH BIT(2) diff --git a/target/linux/generic/backport-6.1/750-v6.5-15-net-ethernet-mtk_eth_soc-fix-NULL-pointer-on-hw-rese.patch b/target/linux/generic/backport-6.1/750-v6.5-15-net-ethernet-mtk_eth_soc-fix-NULL-pointer-on-hw-rese.patch new file mode 100644 index 000000000..6f1639a57 --- /dev/null +++ b/target/linux/generic/backport-6.1/750-v6.5-15-net-ethernet-mtk_eth_soc-fix-NULL-pointer-on-hw-rese.patch @@ -0,0 +1,52 @@ +From 3b12f42772c26869d60398c1710aa27b27cd945c Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Mon, 21 Aug 2023 17:12:44 +0100 +Subject: [PATCH 109/250] net: ethernet: mtk_eth_soc: fix NULL pointer on hw + reset + +When a hardware reset is triggered on devices not initializing WED the +calls to mtk_wed_fe_reset and mtk_wed_fe_reset_complete dereference a +pointer on uninitialized stack memory. +Break out of both functions in case a hw_list entry is 0. + +Fixes: 08a764a7c51b ("net: ethernet: mtk_wed: add reset/reset_complete callbacks") +Signed-off-by: Daniel Golle +Reviewed-by: Simon Horman +Acked-by: Lorenzo Bianconi +Link: https://lore.kernel.org/r/5465c1609b464cc7407ae1530c40821dcdf9d3e6.1692634266.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_wed.c | 12 ++++++++++-- + 1 file changed, 10 insertions(+), 2 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_wed.c ++++ b/drivers/net/ethernet/mediatek/mtk_wed.c +@@ -214,9 +214,13 @@ void mtk_wed_fe_reset(void) + + for (i = 0; i < ARRAY_SIZE(hw_list); i++) { + struct mtk_wed_hw *hw = hw_list[i]; +- struct mtk_wed_device *dev = hw->wed_dev; ++ struct mtk_wed_device *dev; + int err; + ++ if (!hw) ++ break; ++ ++ dev = hw->wed_dev; + if (!dev || !dev->wlan.reset) + continue; + +@@ -237,8 +241,12 @@ void mtk_wed_fe_reset_complete(void) + + for (i = 0; i < ARRAY_SIZE(hw_list); i++) { + struct mtk_wed_hw *hw = hw_list[i]; +- struct mtk_wed_device *dev = hw->wed_dev; ++ struct mtk_wed_device *dev; ++ ++ if (!hw) ++ break; + ++ dev = hw->wed_dev; + if (!dev || !dev->wlan.reset_complete) + continue; + diff --git a/target/linux/generic/backport-6.1/750-v6.5-16-net-ethernet-mtk_eth_soc-fix-register-definitions-fo.patch b/target/linux/generic/backport-6.1/750-v6.5-16-net-ethernet-mtk_eth_soc-fix-register-definitions-fo.patch new file mode 100644 index 000000000..2190761fd --- /dev/null +++ b/target/linux/generic/backport-6.1/750-v6.5-16-net-ethernet-mtk_eth_soc-fix-register-definitions-fo.patch @@ -0,0 +1,44 @@ +From 489aea123d74a846ce746bfdb3efe1e7ad512e0d Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Tue, 22 Aug 2023 17:31:24 +0100 +Subject: [PATCH 110/250] net: ethernet: mtk_eth_soc: fix register definitions + for MT7988 + +More register macros need to be adjusted for the 3rd GMAC on MT7988. +Account for added bit in SYSCFG0_SGMII_MASK. + +Fixes: 445eb6448ed3 ("net: ethernet: mtk_eth_soc: add basic support for MT7988 SoC") +Signed-off-by: Daniel Golle +Reviewed-by: Simon Horman +Link: https://lore.kernel.org/r/1c8da012e2ca80939906d85f314138c552139f0f.1692721443.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -133,10 +133,12 @@ + #define MTK_GDMA_XGDM_SEL BIT(31) + + /* Unicast Filter MAC Address Register - Low */ +-#define MTK_GDMA_MAC_ADRL(x) (0x508 + (x * 0x1000)) ++#define MTK_GDMA_MAC_ADRL(x) ({ typeof(x) _x = (x); (_x == MTK_GMAC3_ID) ? \ ++ 0x548 : 0x508 + (_x * 0x1000); }) + + /* Unicast Filter MAC Address Register - High */ +-#define MTK_GDMA_MAC_ADRH(x) (0x50C + (x * 0x1000)) ++#define MTK_GDMA_MAC_ADRH(x) ({ typeof(x) _x = (x); (_x == MTK_GMAC3_ID) ? \ ++ 0x54C : 0x50C + (_x * 0x1000); }) + + /* FE global misc reg*/ + #define MTK_FE_GLO_MISC 0x124 +@@ -503,7 +505,7 @@ + #define ETHSYS_SYSCFG0 0x14 + #define SYSCFG0_GE_MASK 0x3 + #define SYSCFG0_GE_MODE(x, y) (x << (12 + (y * 2))) +-#define SYSCFG0_SGMII_MASK GENMASK(9, 8) ++#define SYSCFG0_SGMII_MASK GENMASK(9, 7) + #define SYSCFG0_SGMII_GMAC1 ((2 << 8) & SYSCFG0_SGMII_MASK) + #define SYSCFG0_SGMII_GMAC2 ((3 << 8) & SYSCFG0_SGMII_MASK) + #define SYSCFG0_SGMII_GMAC1_V2 BIT(9) diff --git a/target/linux/generic/backport-6.1/750-v6.5-17-net-ethernet-mtk_eth_soc-add-reset-bits-for-MT7988.patch b/target/linux/generic/backport-6.1/750-v6.5-17-net-ethernet-mtk_eth_soc-add-reset-bits-for-MT7988.patch new file mode 100644 index 000000000..05a18364d --- /dev/null +++ b/target/linux/generic/backport-6.1/750-v6.5-17-net-ethernet-mtk_eth_soc-add-reset-bits-for-MT7988.patch @@ -0,0 +1,188 @@ +From 15a84d1c44ae8c1451c265ee60500588a24e8cd6 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Tue, 22 Aug 2023 17:32:03 +0100 +Subject: [PATCH 111/250] net: ethernet: mtk_eth_soc: add reset bits for MT7988 + +Add bits needed to reset the frame engine on MT7988. + +Fixes: 445eb6448ed3 ("net: ethernet: mtk_eth_soc: add basic support for MT7988 SoC") +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/89b6c38380e7a3800c1362aa7575600717bc7543.1692721443.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 76 +++++++++++++++------ + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 16 +++-- + 2 files changed, 68 insertions(+), 24 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -3594,19 +3594,34 @@ static void mtk_hw_reset(struct mtk_eth + { + u32 val; + +- if (mtk_is_netsys_v2_or_greater(eth)) { ++ if (mtk_is_netsys_v2_or_greater(eth)) + regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, 0); ++ ++ if (mtk_is_netsys_v3_or_greater(eth)) { ++ val = RSTCTRL_PPE0_V3; ++ ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) ++ val |= RSTCTRL_PPE1_V3; ++ ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) ++ val |= RSTCTRL_PPE2; ++ ++ val |= RSTCTRL_WDMA0 | RSTCTRL_WDMA1 | RSTCTRL_WDMA2; ++ } else if (mtk_is_netsys_v2_or_greater(eth)) { + val = RSTCTRL_PPE0_V2; ++ ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) ++ val |= RSTCTRL_PPE1; + } else { + val = RSTCTRL_PPE0; + } + +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) +- val |= RSTCTRL_PPE1; +- + ethsys_reset(eth, RSTCTRL_ETH | RSTCTRL_FE | val); + +- if (mtk_is_netsys_v2_or_greater(eth)) ++ if (mtk_is_netsys_v3_or_greater(eth)) ++ regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, ++ 0x6f8ff); ++ else if (mtk_is_netsys_v2_or_greater(eth)) + regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, + 0x3ffffff); + } +@@ -3632,13 +3647,21 @@ static void mtk_hw_warm_reset(struct mtk + return; + } + +- if (mtk_is_netsys_v2_or_greater(eth)) ++ if (mtk_is_netsys_v3_or_greater(eth)) { ++ rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0_V3; ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) ++ rst_mask |= RSTCTRL_PPE1_V3; ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) ++ rst_mask |= RSTCTRL_PPE2; ++ ++ rst_mask |= RSTCTRL_WDMA0 | RSTCTRL_WDMA1 | RSTCTRL_WDMA2; ++ } else if (mtk_is_netsys_v2_or_greater(eth)) { + rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0_V2; +- else ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) ++ rst_mask |= RSTCTRL_PPE1; ++ } else { + rst_mask = RSTCTRL_ETH | RSTCTRL_PPE0; +- +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) +- rst_mask |= RSTCTRL_PPE1; ++ } + + regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, rst_mask, rst_mask); + +@@ -3990,11 +4013,17 @@ static void mtk_prepare_for_reset(struct + u32 val; + int i; + +- /* disabe FE P3 and P4 */ +- val = mtk_r32(eth, MTK_FE_GLO_CFG) | MTK_FE_LINK_DOWN_P3; +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) +- val |= MTK_FE_LINK_DOWN_P4; +- mtk_w32(eth, val, MTK_FE_GLO_CFG); ++ /* set FE PPE ports link down */ ++ for (i = MTK_GMAC1_ID; ++ i <= (mtk_is_netsys_v3_or_greater(eth) ? MTK_GMAC3_ID : MTK_GMAC2_ID); ++ i += 2) { ++ val = mtk_r32(eth, MTK_FE_GLO_CFG(i)) | MTK_FE_LINK_DOWN_P(PSE_PPE0_PORT); ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) ++ val |= MTK_FE_LINK_DOWN_P(PSE_PPE1_PORT); ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) ++ val |= MTK_FE_LINK_DOWN_P(PSE_PPE2_PORT); ++ mtk_w32(eth, val, MTK_FE_GLO_CFG(i)); ++ } + + /* adjust PPE configurations to prepare for reset */ + for (i = 0; i < ARRAY_SIZE(eth->ppe); i++) +@@ -4055,11 +4084,18 @@ static void mtk_pending_work(struct work + } + } + +- /* enabe FE P3 and P4 */ +- val = mtk_r32(eth, MTK_FE_GLO_CFG) & ~MTK_FE_LINK_DOWN_P3; +- if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) +- val &= ~MTK_FE_LINK_DOWN_P4; +- mtk_w32(eth, val, MTK_FE_GLO_CFG); ++ /* set FE PPE ports link up */ ++ for (i = MTK_GMAC1_ID; ++ i <= (mtk_is_netsys_v3_or_greater(eth) ? MTK_GMAC3_ID : MTK_GMAC2_ID); ++ i += 2) { ++ val = mtk_r32(eth, MTK_FE_GLO_CFG(i)) & ~MTK_FE_LINK_DOWN_P(PSE_PPE0_PORT); ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE1)) ++ val &= ~MTK_FE_LINK_DOWN_P(PSE_PPE1_PORT); ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_RSTCTRL_PPE2)) ++ val &= ~MTK_FE_LINK_DOWN_P(PSE_PPE2_PORT); ++ ++ mtk_w32(eth, val, MTK_FE_GLO_CFG(i)); ++ } + + clear_bit(MTK_RESETTING, ð->state); + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -76,9 +76,8 @@ + #define MTK_HW_LRO_SDL_REMAIN_ROOM 1522 + + /* Frame Engine Global Configuration */ +-#define MTK_FE_GLO_CFG 0x00 +-#define MTK_FE_LINK_DOWN_P3 BIT(11) +-#define MTK_FE_LINK_DOWN_P4 BIT(12) ++#define MTK_FE_GLO_CFG(x) (((x) == MTK_GMAC3_ID) ? 0x24 : 0x00) ++#define MTK_FE_LINK_DOWN_P(x) BIT(((x) + 8) % 16) + + /* Frame Engine Global Reset Register */ + #define MTK_RST_GL 0x04 +@@ -522,9 +521,15 @@ + /* ethernet reset control register */ + #define ETHSYS_RSTCTRL 0x34 + #define RSTCTRL_FE BIT(6) ++#define RSTCTRL_WDMA0 BIT(24) ++#define RSTCTRL_WDMA1 BIT(25) ++#define RSTCTRL_WDMA2 BIT(26) + #define RSTCTRL_PPE0 BIT(31) + #define RSTCTRL_PPE0_V2 BIT(30) + #define RSTCTRL_PPE1 BIT(31) ++#define RSTCTRL_PPE0_V3 BIT(29) ++#define RSTCTRL_PPE1_V3 BIT(30) ++#define RSTCTRL_PPE2 BIT(31) + #define RSTCTRL_ETH BIT(23) + + /* ethernet reset check idle register */ +@@ -931,6 +936,7 @@ enum mkt_eth_capabilities { + MTK_QDMA_BIT, + MTK_SOC_MT7628_BIT, + MTK_RSTCTRL_PPE1_BIT, ++ MTK_RSTCTRL_PPE2_BIT, + MTK_U3_COPHY_V2_BIT, + + /* MUX BITS*/ +@@ -965,6 +971,7 @@ enum mkt_eth_capabilities { + #define MTK_QDMA BIT_ULL(MTK_QDMA_BIT) + #define MTK_SOC_MT7628 BIT_ULL(MTK_SOC_MT7628_BIT) + #define MTK_RSTCTRL_PPE1 BIT_ULL(MTK_RSTCTRL_PPE1_BIT) ++#define MTK_RSTCTRL_PPE2 BIT_ULL(MTK_RSTCTRL_PPE2_BIT) + #define MTK_U3_COPHY_V2 BIT_ULL(MTK_U3_COPHY_V2_BIT) + + #define MTK_ETH_MUX_GDM1_TO_GMAC1_ESW \ +@@ -1047,7 +1054,8 @@ enum mkt_eth_capabilities { + MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ + MTK_RSTCTRL_PPE1) + +-#define MT7988_CAPS (MTK_GDM1_ESW | MTK_QDMA | MTK_RSTCTRL_PPE1) ++#define MT7988_CAPS (MTK_GDM1_ESW | MTK_QDMA | MTK_RSTCTRL_PPE1 | \ ++ MTK_RSTCTRL_PPE2) + + struct mtk_tx_dma_desc_info { + dma_addr_t addr; diff --git a/target/linux/generic/backport-6.1/750-v6.5-18-net-ethernet-mtk_eth_soc-add-support-for-in-SoC-SRAM.patch b/target/linux/generic/backport-6.1/750-v6.5-18-net-ethernet-mtk_eth_soc-add-support-for-in-SoC-SRAM.patch new file mode 100644 index 000000000..74ac8dc89 --- /dev/null +++ b/target/linux/generic/backport-6.1/750-v6.5-18-net-ethernet-mtk_eth_soc-add-support-for-in-SoC-SRAM.patch @@ -0,0 +1,254 @@ +From 25ce45fe40b574e5d7ffa407f7f2db03e7d5a910 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Tue, 22 Aug 2023 17:32:54 +0100 +Subject: [PATCH 112/250] net: ethernet: mtk_eth_soc: add support for in-SoC + SRAM + +MT7981, MT7986 and MT7988 come with in-SoC SRAM dedicated for Ethernet +DMA rings. Support using the SRAM without breaking existing device tree +bindings, ie. only new SoC starting from MT7988 will have the SRAM +declared as additional resource in device tree. For MT7981 and MT7986 +an offset on top of the main I/O base is used. + +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/e45e0f230c63ad58869e8fe35b95a2fb8925b625.1692721443.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 88 ++++++++++++++++----- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 12 ++- + 2 files changed, 78 insertions(+), 22 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -1118,10 +1118,13 @@ static int mtk_init_fq_dma(struct mtk_et + dma_addr_t dma_addr; + int i; + +- eth->scratch_ring = dma_alloc_coherent(eth->dma_dev, +- cnt * soc->txrx.txd_size, +- ð->phy_scratch_ring, +- GFP_KERNEL); ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM)) ++ eth->scratch_ring = eth->sram_base; ++ else ++ eth->scratch_ring = dma_alloc_coherent(eth->dma_dev, ++ cnt * soc->txrx.txd_size, ++ ð->phy_scratch_ring, ++ GFP_KERNEL); + if (unlikely(!eth->scratch_ring)) + return -ENOMEM; + +@@ -2429,8 +2432,14 @@ static int mtk_tx_alloc(struct mtk_eth * + if (!ring->buf) + goto no_tx_mem; + +- ring->dma = dma_alloc_coherent(eth->dma_dev, ring_size * sz, +- &ring->phys, GFP_KERNEL); ++ if (MTK_HAS_CAPS(soc->caps, MTK_SRAM)) { ++ ring->dma = eth->sram_base + ring_size * sz; ++ ring->phys = eth->phy_scratch_ring + ring_size * (dma_addr_t)sz; ++ } else { ++ ring->dma = dma_alloc_coherent(eth->dma_dev, ring_size * sz, ++ &ring->phys, GFP_KERNEL); ++ } ++ + if (!ring->dma) + goto no_tx_mem; + +@@ -2529,8 +2538,7 @@ static void mtk_tx_clean(struct mtk_eth + kfree(ring->buf); + ring->buf = NULL; + } +- +- if (ring->dma) { ++ if (!MTK_HAS_CAPS(soc->caps, MTK_SRAM) && ring->dma) { + dma_free_coherent(eth->dma_dev, + ring->dma_size * soc->txrx.txd_size, + ring->dma, ring->phys); +@@ -2549,9 +2557,14 @@ static int mtk_rx_alloc(struct mtk_eth * + { + const struct mtk_reg_map *reg_map = eth->soc->reg_map; + struct mtk_rx_ring *ring; +- int rx_data_len, rx_dma_size; ++ int rx_data_len, rx_dma_size, tx_ring_size; + int i; + ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_QDMA)) ++ tx_ring_size = MTK_QDMA_RING_SIZE; ++ else ++ tx_ring_size = MTK_DMA_SIZE; ++ + if (rx_flag == MTK_RX_FLAGS_QDMA) { + if (ring_no) + return -EINVAL; +@@ -2586,9 +2599,20 @@ static int mtk_rx_alloc(struct mtk_eth * + ring->page_pool = pp; + } + +- ring->dma = dma_alloc_coherent(eth->dma_dev, +- rx_dma_size * eth->soc->txrx.rxd_size, +- &ring->phys, GFP_KERNEL); ++ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM) || ++ rx_flag != MTK_RX_FLAGS_NORMAL) { ++ ring->dma = dma_alloc_coherent(eth->dma_dev, ++ rx_dma_size * eth->soc->txrx.rxd_size, ++ &ring->phys, GFP_KERNEL); ++ } else { ++ struct mtk_tx_ring *tx_ring = ð->tx_ring; ++ ++ ring->dma = tx_ring->dma + tx_ring_size * ++ eth->soc->txrx.txd_size * (ring_no + 1); ++ ring->phys = tx_ring->phys + tx_ring_size * ++ eth->soc->txrx.txd_size * (ring_no + 1); ++ } ++ + if (!ring->dma) + return -ENOMEM; + +@@ -2673,7 +2697,7 @@ static int mtk_rx_alloc(struct mtk_eth * + return 0; + } + +-static void mtk_rx_clean(struct mtk_eth *eth, struct mtk_rx_ring *ring) ++static void mtk_rx_clean(struct mtk_eth *eth, struct mtk_rx_ring *ring, bool in_sram) + { + int i; + +@@ -2696,7 +2720,7 @@ static void mtk_rx_clean(struct mtk_eth + ring->data = NULL; + } + +- if (ring->dma) { ++ if (!in_sram && ring->dma) { + dma_free_coherent(eth->dma_dev, + ring->dma_size * eth->soc->txrx.rxd_size, + ring->dma, ring->phys); +@@ -3059,7 +3083,7 @@ static void mtk_dma_free(struct mtk_eth + for (i = 0; i < MTK_MAX_DEVS; i++) + if (eth->netdev[i]) + netdev_reset_queue(eth->netdev[i]); +- if (eth->scratch_ring) { ++ if (!MTK_HAS_CAPS(soc->caps, MTK_SRAM) && eth->scratch_ring) { + dma_free_coherent(eth->dma_dev, + MTK_QDMA_RING_SIZE * soc->txrx.txd_size, + eth->scratch_ring, eth->phy_scratch_ring); +@@ -3067,13 +3091,13 @@ static void mtk_dma_free(struct mtk_eth + eth->phy_scratch_ring = 0; + } + mtk_tx_clean(eth); +- mtk_rx_clean(eth, ð->rx_ring[0]); +- mtk_rx_clean(eth, ð->rx_ring_qdma); ++ mtk_rx_clean(eth, ð->rx_ring[0], MTK_HAS_CAPS(soc->caps, MTK_SRAM)); ++ mtk_rx_clean(eth, ð->rx_ring_qdma, false); + + if (eth->hwlro) { + mtk_hwlro_rx_uninit(eth); + for (i = 1; i < MTK_MAX_RX_RING_NUM; i++) +- mtk_rx_clean(eth, ð->rx_ring[i]); ++ mtk_rx_clean(eth, ð->rx_ring[i], false); + } + + kfree(eth->scratch_head); +@@ -4641,7 +4665,7 @@ static int mtk_sgmii_init(struct mtk_eth + + static int mtk_probe(struct platform_device *pdev) + { +- struct resource *res = NULL; ++ struct resource *res = NULL, *res_sram; + struct device_node *mac_np; + struct mtk_eth *eth; + int err, i; +@@ -4661,6 +4685,20 @@ static int mtk_probe(struct platform_dev + if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) + eth->ip_align = NET_IP_ALIGN; + ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM)) { ++ /* SRAM is actual memory and supports transparent access just like DRAM. ++ * Hence we don't require __iomem being set and don't need to use accessor ++ * functions to read from or write to SRAM. ++ */ ++ if (mtk_is_netsys_v3_or_greater(eth)) { ++ eth->sram_base = (void __force *)devm_platform_ioremap_resource(pdev, 1); ++ if (IS_ERR(eth->sram_base)) ++ return PTR_ERR(eth->sram_base); ++ } else { ++ eth->sram_base = (void __force *)eth->base + MTK_ETH_SRAM_OFFSET; ++ } ++ } ++ + spin_lock_init(ð->page_lock); + spin_lock_init(ð->tx_irq_lock); + spin_lock_init(ð->rx_irq_lock); +@@ -4724,6 +4762,18 @@ static int mtk_probe(struct platform_dev + err = -EINVAL; + goto err_destroy_sgmii; + } ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_SRAM)) { ++ if (mtk_is_netsys_v3_or_greater(eth)) { ++ res_sram = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ if (!res_sram) { ++ err = -EINVAL; ++ goto err_destroy_sgmii; ++ } ++ eth->phy_scratch_ring = res_sram->start; ++ } else { ++ eth->phy_scratch_ring = res->start + MTK_ETH_SRAM_OFFSET; ++ } ++ } + } + + if (eth->soc->offload_version) { +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -139,6 +139,9 @@ + #define MTK_GDMA_MAC_ADRH(x) ({ typeof(x) _x = (x); (_x == MTK_GMAC3_ID) ? \ + 0x54C : 0x50C + (_x * 0x1000); }) + ++/* Internal SRAM offset */ ++#define MTK_ETH_SRAM_OFFSET 0x40000 ++ + /* FE global misc reg*/ + #define MTK_FE_GLO_MISC 0x124 + +@@ -938,6 +941,7 @@ enum mkt_eth_capabilities { + MTK_RSTCTRL_PPE1_BIT, + MTK_RSTCTRL_PPE2_BIT, + MTK_U3_COPHY_V2_BIT, ++ MTK_SRAM_BIT, + + /* MUX BITS*/ + MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT, +@@ -973,6 +977,7 @@ enum mkt_eth_capabilities { + #define MTK_RSTCTRL_PPE1 BIT_ULL(MTK_RSTCTRL_PPE1_BIT) + #define MTK_RSTCTRL_PPE2 BIT_ULL(MTK_RSTCTRL_PPE2_BIT) + #define MTK_U3_COPHY_V2 BIT_ULL(MTK_U3_COPHY_V2_BIT) ++#define MTK_SRAM BIT_ULL(MTK_SRAM_BIT) + + #define MTK_ETH_MUX_GDM1_TO_GMAC1_ESW \ + BIT_ULL(MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT) +@@ -1048,14 +1053,14 @@ enum mkt_eth_capabilities { + #define MT7981_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | MTK_GMAC2_GEPHY | \ + MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ + MTK_MUX_U3_GMAC2_TO_QPHY | MTK_U3_COPHY_V2 | \ +- MTK_RSTCTRL_PPE1) ++ MTK_RSTCTRL_PPE1 | MTK_SRAM) + + #define MT7986_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \ + MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ +- MTK_RSTCTRL_PPE1) ++ MTK_RSTCTRL_PPE1 | MTK_SRAM) + + #define MT7988_CAPS (MTK_GDM1_ESW | MTK_QDMA | MTK_RSTCTRL_PPE1 | \ +- MTK_RSTCTRL_PPE2) ++ MTK_RSTCTRL_PPE2 | MTK_SRAM) + + struct mtk_tx_dma_desc_info { + dma_addr_t addr; +@@ -1215,6 +1220,7 @@ struct mtk_eth { + struct device *dev; + struct device *dma_dev; + void __iomem *base; ++ void *sram_base; + spinlock_t page_lock; + spinlock_t tx_irq_lock; + spinlock_t rx_irq_lock; diff --git a/target/linux/generic/backport-6.1/750-v6.5-19-net-ethernet-mtk_eth_soc-support-36-bit-DMA-addressi.patch b/target/linux/generic/backport-6.1/750-v6.5-19-net-ethernet-mtk_eth_soc-support-36-bit-DMA-addressi.patch new file mode 100644 index 000000000..1584dfd07 --- /dev/null +++ b/target/linux/generic/backport-6.1/750-v6.5-19-net-ethernet-mtk_eth_soc-support-36-bit-DMA-addressi.patch @@ -0,0 +1,166 @@ +From 0b0d606eb9650fa01dd5621e072aa29a10544399 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Tue, 22 Aug 2023 17:33:12 +0100 +Subject: [PATCH 113/250] net: ethernet: mtk_eth_soc: support 36-bit DMA + addressing on MT7988 + +Systems having 4 GiB of RAM and more require DMA addressing beyond the +current 32-bit limit. Starting from MT7988 the hardware now supports +36-bit DMA addressing, let's use that new capability in the driver to +avoid running into swiotlb on systems with 4 GiB of RAM or more. + +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/95b919c98876c9e49761e44662e7c937479eecb8.1692721443.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 30 +++++++++++++++++++-- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 22 +++++++++++++-- + 2 files changed, 48 insertions(+), 4 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -1311,6 +1311,10 @@ static void mtk_tx_set_dma_desc_v2(struc + data = TX_DMA_PLEN0(info->size); + if (info->last) + data |= TX_DMA_LS0; ++ ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) ++ data |= TX_DMA_PREP_ADDR64(info->addr); ++ + WRITE_ONCE(desc->txd3, data); + + /* set forward port */ +@@ -1980,6 +1984,7 @@ static int mtk_poll_rx(struct napi_struc + bool xdp_flush = false; + int idx; + struct sk_buff *skb; ++ u64 addr64 = 0; + u8 *data, *new_data; + struct mtk_rx_dma_v2 *rxd, trxd; + int done = 0, bytes = 0; +@@ -2095,7 +2100,10 @@ static int mtk_poll_rx(struct napi_struc + goto release_desc; + } + +- dma_unmap_single(eth->dma_dev, trxd.rxd1, ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) ++ addr64 = RX_DMA_GET_ADDR64(trxd.rxd2); ++ ++ dma_unmap_single(eth->dma_dev, ((u64)trxd.rxd1 | addr64), + ring->buf_size, DMA_FROM_DEVICE); + + skb = build_skb(data, ring->frag_size); +@@ -2161,6 +2169,9 @@ release_desc: + else + rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size); + ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) ++ rxd->rxd2 |= RX_DMA_PREP_ADDR64(dma_addr); ++ + ring->calc_idx = idx; + done++; + } +@@ -2653,6 +2664,9 @@ static int mtk_rx_alloc(struct mtk_eth * + else + rxd->rxd2 = RX_DMA_PREP_PLEN0(ring->buf_size); + ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) ++ rxd->rxd2 |= RX_DMA_PREP_ADDR64(dma_addr); ++ + rxd->rxd3 = 0; + rxd->rxd4 = 0; + if (mtk_is_netsys_v2_or_greater(eth)) { +@@ -2699,6 +2713,7 @@ static int mtk_rx_alloc(struct mtk_eth * + + static void mtk_rx_clean(struct mtk_eth *eth, struct mtk_rx_ring *ring, bool in_sram) + { ++ u64 addr64 = 0; + int i; + + if (ring->data && ring->dma) { +@@ -2712,7 +2727,10 @@ static void mtk_rx_clean(struct mtk_eth + if (!rxd->rxd1) + continue; + +- dma_unmap_single(eth->dma_dev, rxd->rxd1, ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) ++ addr64 = RX_DMA_GET_ADDR64(rxd->rxd2); ++ ++ dma_unmap_single(eth->dma_dev, ((u64)rxd->rxd1 | addr64), + ring->buf_size, DMA_FROM_DEVICE); + mtk_rx_put_buff(ring, ring->data[i], false); + } +@@ -4699,6 +4717,14 @@ static int mtk_probe(struct platform_dev + } + } + ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_36BIT_DMA)) { ++ err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(36)); ++ if (err) { ++ dev_err(&pdev->dev, "Wrong DMA config\n"); ++ return -EINVAL; ++ } ++ } ++ + spin_lock_init(ð->page_lock); + spin_lock_init(ð->tx_irq_lock); + spin_lock_init(ð->rx_irq_lock); +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -331,6 +331,14 @@ + #define TX_DMA_PLEN1(x) ((x) & eth->soc->txrx.dma_max_len) + #define TX_DMA_SWC BIT(14) + #define TX_DMA_PQID GENMASK(3, 0) ++#define TX_DMA_ADDR64_MASK GENMASK(3, 0) ++#if IS_ENABLED(CONFIG_64BIT) ++# define TX_DMA_GET_ADDR64(x) (((u64)FIELD_GET(TX_DMA_ADDR64_MASK, (x))) << 32) ++# define TX_DMA_PREP_ADDR64(x) FIELD_PREP(TX_DMA_ADDR64_MASK, ((x) >> 32)) ++#else ++# define TX_DMA_GET_ADDR64(x) (0) ++# define TX_DMA_PREP_ADDR64(x) (0) ++#endif + + /* PDMA on MT7628 */ + #define TX_DMA_DONE BIT(31) +@@ -343,6 +351,14 @@ + #define RX_DMA_PREP_PLEN0(x) (((x) & eth->soc->txrx.dma_max_len) << eth->soc->txrx.dma_len_offset) + #define RX_DMA_GET_PLEN0(x) (((x) >> eth->soc->txrx.dma_len_offset) & eth->soc->txrx.dma_max_len) + #define RX_DMA_VTAG BIT(15) ++#define RX_DMA_ADDR64_MASK GENMASK(3, 0) ++#if IS_ENABLED(CONFIG_64BIT) ++# define RX_DMA_GET_ADDR64(x) (((u64)FIELD_GET(RX_DMA_ADDR64_MASK, (x))) << 32) ++# define RX_DMA_PREP_ADDR64(x) FIELD_PREP(RX_DMA_ADDR64_MASK, ((x) >> 32)) ++#else ++# define RX_DMA_GET_ADDR64(x) (0) ++# define RX_DMA_PREP_ADDR64(x) (0) ++#endif + + /* QDMA descriptor rxd3 */ + #define RX_DMA_VID(x) ((x) & VLAN_VID_MASK) +@@ -942,6 +958,7 @@ enum mkt_eth_capabilities { + MTK_RSTCTRL_PPE2_BIT, + MTK_U3_COPHY_V2_BIT, + MTK_SRAM_BIT, ++ MTK_36BIT_DMA_BIT, + + /* MUX BITS*/ + MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT, +@@ -978,6 +995,7 @@ enum mkt_eth_capabilities { + #define MTK_RSTCTRL_PPE2 BIT_ULL(MTK_RSTCTRL_PPE2_BIT) + #define MTK_U3_COPHY_V2 BIT_ULL(MTK_U3_COPHY_V2_BIT) + #define MTK_SRAM BIT_ULL(MTK_SRAM_BIT) ++#define MTK_36BIT_DMA BIT_ULL(MTK_36BIT_DMA_BIT) + + #define MTK_ETH_MUX_GDM1_TO_GMAC1_ESW \ + BIT_ULL(MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT) +@@ -1059,8 +1077,8 @@ enum mkt_eth_capabilities { + MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ + MTK_RSTCTRL_PPE1 | MTK_SRAM) + +-#define MT7988_CAPS (MTK_GDM1_ESW | MTK_QDMA | MTK_RSTCTRL_PPE1 | \ +- MTK_RSTCTRL_PPE2 | MTK_SRAM) ++#define MT7988_CAPS (MTK_36BIT_DMA | MTK_GDM1_ESW | MTK_QDMA | \ ++ MTK_RSTCTRL_PPE1 | MTK_RSTCTRL_PPE2 | MTK_SRAM) + + struct mtk_tx_dma_desc_info { + dma_addr_t addr; diff --git a/target/linux/generic/backport-6.1/790-v6.4-0012-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch b/target/linux/generic/backport-6.1/790-v6.4-0012-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch index 1819b78ae..b158a8946 100644 --- a/target/linux/generic/backport-6.1/790-v6.4-0012-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch +++ b/target/linux/generic/backport-6.1/790-v6.4-0012-net-dsa-mt7530-introduce-driver-for-MT7988-built-in-.patch @@ -21,9 +21,9 @@ Signed-off-by: David S. Miller drivers/net/dsa/Kconfig | 12 +++ drivers/net/dsa/Makefile | 1 + drivers/net/dsa/mt7530-mmio.c | 101 +++++++++++++++++++++++++ - drivers/net/dsa/mt7530.c | 137 +++++++++++++++++++++++++++++++++- + drivers/net/dsa/mt7530.c | 135 +++++++++++++++++++++++++++++++++- drivers/net/dsa/mt7530.h | 12 +-- - 6 files changed, 255 insertions(+), 10 deletions(-) + 6 files changed, 253 insertions(+), 10 deletions(-) create mode 100644 drivers/net/dsa/mt7530-mmio.c --- a/MAINTAINERS diff --git a/target/linux/generic/backport-6.1/792-v6.6-net-phylink-add-pcs_enable-pcs_disable-methods.patch b/target/linux/generic/backport-6.1/792-v6.6-net-phylink-add-pcs_enable-pcs_disable-methods.patch new file mode 100644 index 000000000..eac8966a4 --- /dev/null +++ b/target/linux/generic/backport-6.1/792-v6.6-net-phylink-add-pcs_enable-pcs_disable-methods.patch @@ -0,0 +1,172 @@ +From 90ef0a7b0622c62758b2638604927867775479ea Mon Sep 17 00:00:00 2001 +From: "Russell King (Oracle)" +Date: Thu, 13 Jul 2023 09:42:07 +0100 +Subject: [PATCH] net: phylink: add pcs_enable()/pcs_disable() methods + +Add phylink PCS enable/disable callbacks that will allow us to place +IEEE 802.3 register compliant PCS in power-down mode while not being +used. + +Signed-off-by: Russell King (Oracle) +Signed-off-by: David S. Miller +--- + drivers/net/phy/phylink.c | 48 +++++++++++++++++++++++++++++++-------- + include/linux/phylink.h | 16 +++++++++++++ + 2 files changed, 55 insertions(+), 9 deletions(-) + +--- a/drivers/net/phy/phylink.c ++++ b/drivers/net/phy/phylink.c +@@ -34,6 +34,10 @@ enum { + PHYLINK_DISABLE_STOPPED, + PHYLINK_DISABLE_LINK, + PHYLINK_DISABLE_MAC_WOL, ++ ++ PCS_STATE_DOWN = 0, ++ PCS_STATE_STARTING, ++ PCS_STATE_STARTED, + }; + + /** +@@ -71,6 +75,7 @@ struct phylink { + struct mutex state_mutex; + struct phylink_link_state phy_state; + struct work_struct resolve; ++ unsigned int pcs_state; + + bool mac_link_dropped; + bool using_mac_select_pcs; +@@ -987,6 +992,22 @@ static void phylink_mac_pcs_an_restart(s + } + } + ++static void phylink_pcs_disable(struct phylink_pcs *pcs) ++{ ++ if (pcs && pcs->ops->pcs_disable) ++ pcs->ops->pcs_disable(pcs); ++} ++ ++static int phylink_pcs_enable(struct phylink_pcs *pcs) ++{ ++ int err = 0; ++ ++ if (pcs && pcs->ops->pcs_enable) ++ err = pcs->ops->pcs_enable(pcs); ++ ++ return err; ++} ++ + static void phylink_major_config(struct phylink *pl, bool restart, + const struct phylink_link_state *state) + { +@@ -1023,11 +1044,16 @@ static void phylink_major_config(struct + /* If we have a new PCS, switch to the new PCS after preparing the MAC + * for the change. + */ +- if (pcs_changed) ++ if (pcs_changed) { ++ phylink_pcs_disable(pl->pcs); + pl->pcs = pcs; ++ } + + phylink_mac_config(pl, state); + ++ if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) ++ phylink_pcs_enable(pl->pcs); ++ + if (pl->pcs) { + err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, + state->interface, +@@ -1499,6 +1525,7 @@ struct phylink *phylink_create(struct ph + pl->link_config.speed = SPEED_UNKNOWN; + pl->link_config.duplex = DUPLEX_UNKNOWN; + pl->link_config.an_enabled = true; ++ pl->pcs_state = PCS_STATE_DOWN; + pl->mac_ops = mac_ops; + __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); + timer_setup(&pl->link_poll, phylink_fixed_poll, 0); +@@ -1900,6 +1927,8 @@ void phylink_start(struct phylink *pl) + if (pl->netdev) + netif_carrier_off(pl->netdev); + ++ pl->pcs_state = PCS_STATE_STARTING; ++ + /* Apply the link configuration to the MAC when starting. This allows + * a fixed-link to start with the correct parameters, and also + * ensures that we set the appropriate advertisement for Serdes links. +@@ -1910,6 +1939,8 @@ void phylink_start(struct phylink *pl) + */ + phylink_mac_initial_config(pl, true); + ++ pl->pcs_state = PCS_STATE_STARTED; ++ + phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); + + if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { +@@ -1928,15 +1959,9 @@ void phylink_start(struct phylink *pl) + poll = true; + } + +- switch (pl->cfg_link_an_mode) { +- case MLO_AN_FIXED: ++ if (pl->cfg_link_an_mode == MLO_AN_FIXED) + poll |= pl->config->poll_fixed_state; +- break; +- case MLO_AN_INBAND: +- if (pl->pcs) +- poll |= pl->pcs->poll; +- break; +- } ++ + if (poll) + mod_timer(&pl->link_poll, jiffies + HZ); + if (pl->phydev) +@@ -1973,6 +1998,10 @@ void phylink_stop(struct phylink *pl) + } + + phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); ++ ++ pl->pcs_state = PCS_STATE_DOWN; ++ ++ phylink_pcs_disable(pl->pcs); + } + EXPORT_SYMBOL_GPL(phylink_stop); + +--- a/include/linux/phylink.h ++++ b/include/linux/phylink.h +@@ -446,6 +446,8 @@ struct phylink_pcs { + /** + * struct phylink_pcs_ops - MAC PCS operations structure. + * @pcs_validate: validate the link configuration. ++ * @pcs_enable: enable the PCS. ++ * @pcs_disable: disable the PCS. + * @pcs_get_state: read the current MAC PCS link state from the hardware. + * @pcs_config: configure the MAC PCS for the selected mode and state. + * @pcs_an_restart: restart 802.3z BaseX autonegotiation. +@@ -455,6 +457,8 @@ struct phylink_pcs { + struct phylink_pcs_ops { + int (*pcs_validate)(struct phylink_pcs *pcs, unsigned long *supported, + const struct phylink_link_state *state); ++ int (*pcs_enable)(struct phylink_pcs *pcs); ++ void (*pcs_disable)(struct phylink_pcs *pcs); + void (*pcs_get_state)(struct phylink_pcs *pcs, + struct phylink_link_state *state); + int (*pcs_config)(struct phylink_pcs *pcs, unsigned int mode, +@@ -485,6 +489,18 @@ int pcs_validate(struct phylink_pcs *pcs + const struct phylink_link_state *state); + + /** ++ * pcs_enable() - enable the PCS. ++ * @pcs: a pointer to a &struct phylink_pcs. ++ */ ++int pcs_enable(struct phylink_pcs *pcs); ++ ++/** ++ * pcs_disable() - disable the PCS. ++ * @pcs: a pointer to a &struct phylink_pcs. ++ */ ++void pcs_disable(struct phylink_pcs *pcs); ++ ++/** + * pcs_get_state() - Read the current inband link state from the hardware + * @pcs: a pointer to a &struct phylink_pcs. + * @state: a pointer to a &struct phylink_link_state. diff --git a/target/linux/generic/backport-6.1/793-v6.6-net-pcs-lynxi-implement-pcs_disable-op.patch b/target/linux/generic/backport-6.1/793-v6.6-net-pcs-lynxi-implement-pcs_disable-op.patch new file mode 100644 index 000000000..eb9b4b7c0 --- /dev/null +++ b/target/linux/generic/backport-6.1/793-v6.6-net-pcs-lynxi-implement-pcs_disable-op.patch @@ -0,0 +1,44 @@ +From e4ccdfb78a47132f2d215658aab8902fc457c4b4 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Fri, 18 Aug 2023 04:07:46 +0100 +Subject: [PATCH 082/125] net: pcs: lynxi: implement pcs_disable op + +When switching from 10GBase-R/5GBase-R/USXGMII to one of the interface +modes provided by mtk-pcs-lynxi we need to make sure to always perform +a full configuration of the PHYA. + +Implement pcs_disable op which resets the stored interface mode to +PHY_INTERFACE_MODE_NA to trigger a full reconfiguration once the LynxI +PCS driver had previously been deselected in favor of another PCS +driver such as the to-be-added driver for the USXGMII PCS found in +MT7988. + +Signed-off-by: Daniel Golle +Link: https://lore.kernel.org/r/f23d1a60d2c9d2fb72e32dcb0eaa5f7e867a3d68.1692327891.git.daniel@makrotopia.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/pcs/pcs-mtk-lynxi.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/net/pcs/pcs-mtk-lynxi.c ++++ b/drivers/net/pcs/pcs-mtk-lynxi.c +@@ -241,11 +241,19 @@ static void mtk_pcs_lynxi_link_up(struct + } + } + ++static void mtk_pcs_lynxi_disable(struct phylink_pcs *pcs) ++{ ++ struct mtk_pcs_lynxi *mpcs = pcs_to_mtk_pcs_lynxi(pcs); ++ ++ mpcs->interface = PHY_INTERFACE_MODE_NA; ++} ++ + static const struct phylink_pcs_ops mtk_pcs_lynxi_ops = { + .pcs_get_state = mtk_pcs_lynxi_get_state, + .pcs_config = mtk_pcs_lynxi_config, + .pcs_an_restart = mtk_pcs_lynxi_restart_an, + .pcs_link_up = mtk_pcs_lynxi_link_up, ++ .pcs_disable = mtk_pcs_lynxi_disable, + }; + + struct phylink_pcs *mtk_pcs_lynxi_create(struct device *dev, diff --git a/target/linux/generic/backport-6.1/800-v6.3-leds-Move-led_init_default_state_get-to-the-global-h.patch b/target/linux/generic/backport-6.1/800-v6.3-leds-Move-led_init_default_state_get-to-the-global-h.patch new file mode 100644 index 000000000..592111fb9 --- /dev/null +++ b/target/linux/generic/backport-6.1/800-v6.3-leds-Move-led_init_default_state_get-to-the-global-h.patch @@ -0,0 +1,39 @@ +From 156a5bb89ca6f3edd2be0bfd0de15e575442927e Mon Sep 17 00:00:00 2001 +From: Andy Shevchenko +Date: Tue, 3 Jan 2023 15:12:47 +0200 +Subject: [PATCH] leds: Move led_init_default_state_get() to the global header + +There are users inside and outside LED framework that have implemented +a local copy of led_init_default_state_get(). In order to deduplicate +that, as the first step move the declaration from LED header to the +global one. + +Signed-off-by: Andy Shevchenko +Signed-off-by: Lee Jones +Link: https://lore.kernel.org/r/20230103131256.33894-3-andriy.shevchenko@linux.intel.com +--- + drivers/leds/leds.h | 1 - + include/linux/leds.h | 2 ++ + 2 files changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/leds/leds.h ++++ b/drivers/leds/leds.h +@@ -27,7 +27,6 @@ ssize_t led_trigger_read(struct file *fi + ssize_t led_trigger_write(struct file *filp, struct kobject *kobj, + struct bin_attribute *bin_attr, char *buf, + loff_t pos, size_t count); +-enum led_default_state led_init_default_state_get(struct fwnode_handle *fwnode); + + extern struct rw_semaphore leds_list_lock; + extern struct list_head leds_list; +--- a/include/linux/leds.h ++++ b/include/linux/leds.h +@@ -63,6 +63,8 @@ struct led_init_data { + bool devname_mandatory; + }; + ++enum led_default_state led_init_default_state_get(struct fwnode_handle *fwnode); ++ + struct led_hw_trigger_type { + int dummy; + }; diff --git a/target/linux/generic/backport-6.1/801-v6.4-01-net-dsa-qca8k-move-qca8k_port_to_phy-to-header.patch b/target/linux/generic/backport-6.1/801-v6.4-01-net-dsa-qca8k-move-qca8k_port_to_phy-to-header.patch new file mode 100644 index 000000000..07becafbe --- /dev/null +++ b/target/linux/generic/backport-6.1/801-v6.4-01-net-dsa-qca8k-move-qca8k_port_to_phy-to-header.patch @@ -0,0 +1,67 @@ +From 3e8b4d6277fd19d98c817576954dd6a4ff3caa2b Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 17 Apr 2023 17:17:23 +0200 +Subject: [PATCH 1/9] net: dsa: qca8k: move qca8k_port_to_phy() to header + +Move qca8k_port_to_phy() to qca8k header as it's useful for future +reference in Switch LEDs module since the same logic is applied to get +the right index of the switch port. +Make it inline as it's simple function that just decrease the port. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Reviewed-by: Michal Kubiak +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca/qca8k-8xxx.c | 15 --------------- + drivers/net/dsa/qca/qca8k.h | 14 ++++++++++++++ + 2 files changed, 14 insertions(+), 15 deletions(-) + +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -730,21 +730,6 @@ err_clear_skb: + return ret; + } + +-static u32 +-qca8k_port_to_phy(int port) +-{ +- /* From Andrew Lunn: +- * Port 0 has no internal phy. +- * Port 1 has an internal PHY at MDIO address 0. +- * Port 2 has an internal PHY at MDIO address 1. +- * ... +- * Port 5 has an internal PHY at MDIO address 4. +- * Port 6 has no internal PHY. +- */ +- +- return port - 1; +-} +- + static int + qca8k_mdio_busy_wait(struct mii_bus *bus, u32 reg, u32 mask) + { +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -422,6 +422,20 @@ struct qca8k_fdb { + u8 mac[6]; + }; + ++static inline u32 qca8k_port_to_phy(int port) ++{ ++ /* From Andrew Lunn: ++ * Port 0 has no internal phy. ++ * Port 1 has an internal PHY at MDIO address 0. ++ * Port 2 has an internal PHY at MDIO address 1. ++ * ... ++ * Port 5 has an internal PHY at MDIO address 4. ++ * Port 6 has no internal PHY. ++ */ ++ ++ return port - 1; ++} ++ + /* Common setup function */ + extern const struct qca8k_mib_desc ar8327_mib[]; + extern const struct regmap_access_table qca8k_readable_table; diff --git a/target/linux/generic/backport-6.1/801-v6.4-02-net-dsa-qca8k-add-LEDs-basic-support.patch b/target/linux/generic/backport-6.1/801-v6.4-02-net-dsa-qca8k-add-LEDs-basic-support.patch new file mode 100644 index 000000000..414ba97e9 --- /dev/null +++ b/target/linux/generic/backport-6.1/801-v6.4-02-net-dsa-qca8k-add-LEDs-basic-support.patch @@ -0,0 +1,435 @@ +From 1e264f9d2918b5737023c44a23ae04def1095210 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 17 Apr 2023 17:17:24 +0200 +Subject: [PATCH 2/9] net: dsa: qca8k: add LEDs basic support + +Add LEDs basic support for qca8k Switch Family by adding basic +brightness_set() support. + +Since these LEDs refelect port status, the default label is set to +":port". DT binding should describe the color and function of the +LEDs using standard LEDs api. +Each LED always have the device name as prefix. The device name is +composed from the mii bus id and the PHY addr resulting in example +names like: +- qca8k-0.0:00:amber:lan +- qca8k-0.0:00:white:lan +- qca8k-0.0:01:amber:lan +- qca8k-0.0:01:white:lan + +These LEDs supports only blocking variant of the brightness_set() +function since they can sleep during access of the switch leds to set +the brightness. + +While at it add to the qca8k header file each mode defined by the Switch +Documentation for future use. + +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca/Kconfig | 8 ++ + drivers/net/dsa/qca/Makefile | 3 + + drivers/net/dsa/qca/qca8k-8xxx.c | 5 + + drivers/net/dsa/qca/qca8k-leds.c | 239 +++++++++++++++++++++++++++++++ + drivers/net/dsa/qca/qca8k.h | 60 ++++++++ + drivers/net/dsa/qca/qca8k_leds.h | 16 +++ + 6 files changed, 331 insertions(+) + create mode 100644 drivers/net/dsa/qca/qca8k-leds.c + create mode 100644 drivers/net/dsa/qca/qca8k_leds.h + +--- a/drivers/net/dsa/qca/Kconfig ++++ b/drivers/net/dsa/qca/Kconfig +@@ -15,3 +15,11 @@ config NET_DSA_QCA8K + help + This enables support for the Qualcomm Atheros QCA8K Ethernet + switch chips. ++ ++config NET_DSA_QCA8K_LEDS_SUPPORT ++ bool "Qualcomm Atheros QCA8K Ethernet switch family LEDs support" ++ depends on NET_DSA_QCA8K ++ depends on LEDS_CLASS ++ help ++ This enabled support for LEDs present on the Qualcomm Atheros ++ QCA8K Ethernet switch chips. +--- a/drivers/net/dsa/qca/Makefile ++++ b/drivers/net/dsa/qca/Makefile +@@ -2,3 +2,6 @@ + obj-$(CONFIG_NET_DSA_AR9331) += ar9331.o + obj-$(CONFIG_NET_DSA_QCA8K) += qca8k.o + qca8k-y += qca8k-common.o qca8k-8xxx.o ++ifdef CONFIG_NET_DSA_QCA8K_LEDS_SUPPORT ++qca8k-y += qca8k-leds.o ++endif +--- a/drivers/net/dsa/qca/qca8k-8xxx.c ++++ b/drivers/net/dsa/qca/qca8k-8xxx.c +@@ -22,6 +22,7 @@ + #include + + #include "qca8k.h" ++#include "qca8k_leds.h" + + static void + qca8k_split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page) +@@ -1751,6 +1752,10 @@ qca8k_setup(struct dsa_switch *ds) + if (ret) + return ret; + ++ ret = qca8k_setup_led_ctrl(priv); ++ if (ret) ++ return ret; ++ + qca8k_setup_pcs(priv, &priv->pcs_port_0, 0); + qca8k_setup_pcs(priv, &priv->pcs_port_6, 6); + +--- /dev/null ++++ b/drivers/net/dsa/qca/qca8k-leds.c +@@ -0,0 +1,239 @@ ++// SPDX-License-Identifier: GPL-2.0 ++#include ++#include ++ ++#include "qca8k.h" ++#include "qca8k_leds.h" ++ ++static int ++qca8k_get_enable_led_reg(int port_num, int led_num, struct qca8k_led_pattern_en *reg_info) ++{ ++ switch (port_num) { ++ case 0: ++ reg_info->reg = QCA8K_LED_CTRL_REG(led_num); ++ reg_info->shift = QCA8K_LED_PHY0123_CONTROL_RULE_SHIFT; ++ break; ++ case 1: ++ case 2: ++ case 3: ++ /* Port 123 are controlled on a different reg */ ++ reg_info->reg = QCA8K_LED_CTRL3_REG; ++ reg_info->shift = QCA8K_LED_PHY123_PATTERN_EN_SHIFT(port_num, led_num); ++ break; ++ case 4: ++ reg_info->reg = QCA8K_LED_CTRL_REG(led_num); ++ reg_info->shift = QCA8K_LED_PHY4_CONTROL_RULE_SHIFT; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ ++static int ++qca8k_led_brightness_set(struct qca8k_led *led, ++ enum led_brightness brightness) ++{ ++ struct qca8k_led_pattern_en reg_info; ++ struct qca8k_priv *priv = led->priv; ++ u32 mask, val; ++ ++ qca8k_get_enable_led_reg(led->port_num, led->led_num, ®_info); ++ ++ val = QCA8K_LED_ALWAYS_OFF; ++ if (brightness) ++ val = QCA8K_LED_ALWAYS_ON; ++ ++ /* HW regs to control brightness is special and port 1-2-3 ++ * are placed in a different reg. ++ * ++ * To control port 0 brightness: ++ * - the 2 bit (15, 14) of: ++ * - QCA8K_LED_CTRL0_REG for led1 ++ * - QCA8K_LED_CTRL1_REG for led2 ++ * - QCA8K_LED_CTRL2_REG for led3 ++ * ++ * To control port 4: ++ * - the 2 bit (31, 30) of: ++ * - QCA8K_LED_CTRL0_REG for led1 ++ * - QCA8K_LED_CTRL1_REG for led2 ++ * - QCA8K_LED_CTRL2_REG for led3 ++ * ++ * To control port 1: ++ * - the 2 bit at (9, 8) of QCA8K_LED_CTRL3_REG are used for led1 ++ * - the 2 bit at (11, 10) of QCA8K_LED_CTRL3_REG are used for led2 ++ * - the 2 bit at (13, 12) of QCA8K_LED_CTRL3_REG are used for led3 ++ * ++ * To control port 2: ++ * - the 2 bit at (15, 14) of QCA8K_LED_CTRL3_REG are used for led1 ++ * - the 2 bit at (17, 16) of QCA8K_LED_CTRL3_REG are used for led2 ++ * - the 2 bit at (19, 18) of QCA8K_LED_CTRL3_REG are used for led3 ++ * ++ * To control port 3: ++ * - the 2 bit at (21, 20) of QCA8K_LED_CTRL3_REG are used for led1 ++ * - the 2 bit at (23, 22) of QCA8K_LED_CTRL3_REG are used for led2 ++ * - the 2 bit at (25, 24) of QCA8K_LED_CTRL3_REG are used for led3 ++ * ++ * To abstract this and have less code, we use the port and led numm ++ * to calculate the shift and the correct reg due to this problem of ++ * not having a 1:1 map of LED with the regs. ++ */ ++ if (led->port_num == 0 || led->port_num == 4) { ++ mask = QCA8K_LED_PATTERN_EN_MASK; ++ val <<= QCA8K_LED_PATTERN_EN_SHIFT; ++ } else { ++ mask = QCA8K_LED_PHY123_PATTERN_EN_MASK; ++ } ++ ++ return regmap_update_bits(priv->regmap, reg_info.reg, ++ mask << reg_info.shift, ++ val << reg_info.shift); ++} ++ ++static int ++qca8k_cled_brightness_set_blocking(struct led_classdev *ldev, ++ enum led_brightness brightness) ++{ ++ struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev); ++ ++ return qca8k_led_brightness_set(led, brightness); ++} ++ ++static enum led_brightness ++qca8k_led_brightness_get(struct qca8k_led *led) ++{ ++ struct qca8k_led_pattern_en reg_info; ++ struct qca8k_priv *priv = led->priv; ++ u32 val; ++ int ret; ++ ++ qca8k_get_enable_led_reg(led->port_num, led->led_num, ®_info); ++ ++ ret = regmap_read(priv->regmap, reg_info.reg, &val); ++ if (ret) ++ return 0; ++ ++ val >>= reg_info.shift; ++ ++ if (led->port_num == 0 || led->port_num == 4) { ++ val &= QCA8K_LED_PATTERN_EN_MASK; ++ val >>= QCA8K_LED_PATTERN_EN_SHIFT; ++ } else { ++ val &= QCA8K_LED_PHY123_PATTERN_EN_MASK; ++ } ++ ++ /* Assume brightness ON only when the LED is set to always ON */ ++ return val == QCA8K_LED_ALWAYS_ON; ++} ++ ++static int ++qca8k_parse_port_leds(struct qca8k_priv *priv, struct fwnode_handle *port, int port_num) ++{ ++ struct fwnode_handle *led = NULL, *leds = NULL; ++ struct led_init_data init_data = { }; ++ struct dsa_switch *ds = priv->ds; ++ enum led_default_state state; ++ struct qca8k_led *port_led; ++ int led_num, led_index; ++ int ret; ++ ++ leds = fwnode_get_named_child_node(port, "leds"); ++ if (!leds) { ++ dev_dbg(priv->dev, "No Leds node specified in device tree for port %d!\n", ++ port_num); ++ return 0; ++ } ++ ++ fwnode_for_each_child_node(leds, led) { ++ /* Reg represent the led number of the port. ++ * Each port can have at most 3 leds attached ++ * Commonly: ++ * 1. is gigabit led ++ * 2. is mbit led ++ * 3. additional status led ++ */ ++ if (fwnode_property_read_u32(led, "reg", &led_num)) ++ continue; ++ ++ if (led_num >= QCA8K_LED_PORT_COUNT) { ++ dev_warn(priv->dev, "Invalid LED reg %d defined for port %d", ++ led_num, port_num); ++ continue; ++ } ++ ++ led_index = QCA8K_LED_PORT_INDEX(port_num, led_num); ++ ++ port_led = &priv->ports_led[led_index]; ++ port_led->port_num = port_num; ++ port_led->led_num = led_num; ++ port_led->priv = priv; ++ ++ state = led_init_default_state_get(led); ++ switch (state) { ++ case LEDS_DEFSTATE_ON: ++ port_led->cdev.brightness = 1; ++ qca8k_led_brightness_set(port_led, 1); ++ break; ++ case LEDS_DEFSTATE_KEEP: ++ port_led->cdev.brightness = ++ qca8k_led_brightness_get(port_led); ++ break; ++ default: ++ port_led->cdev.brightness = 0; ++ qca8k_led_brightness_set(port_led, 0); ++ } ++ ++ port_led->cdev.max_brightness = 1; ++ port_led->cdev.brightness_set_blocking = qca8k_cled_brightness_set_blocking; ++ init_data.default_label = ":port"; ++ init_data.fwnode = led; ++ init_data.devname_mandatory = true; ++ init_data.devicename = kasprintf(GFP_KERNEL, "%s:0%d", ds->slave_mii_bus->id, ++ port_num); ++ if (!init_data.devicename) ++ return -ENOMEM; ++ ++ ret = devm_led_classdev_register_ext(priv->dev, &port_led->cdev, &init_data); ++ if (ret) ++ dev_warn(priv->dev, "Failed to init LED %d for port %d", led_num, port_num); ++ ++ kfree(init_data.devicename); ++ } ++ ++ return 0; ++} ++ ++int ++qca8k_setup_led_ctrl(struct qca8k_priv *priv) ++{ ++ struct fwnode_handle *ports, *port; ++ int port_num; ++ int ret; ++ ++ ports = device_get_named_child_node(priv->dev, "ports"); ++ if (!ports) { ++ dev_info(priv->dev, "No ports node specified in device tree!"); ++ return 0; ++ } ++ ++ fwnode_for_each_child_node(ports, port) { ++ if (fwnode_property_read_u32(port, "reg", &port_num)) ++ continue; ++ ++ /* Skip checking for CPU port 0 and CPU port 6 as not supported */ ++ if (port_num == 0 || port_num == 6) ++ continue; ++ ++ /* Each port can have at most 3 different leds attached. ++ * Switch port starts from 0 to 6, but port 0 and 6 are CPU ++ * port. The port index needs to be decreased by one to identify ++ * the correct port for LED setup. ++ */ ++ ret = qca8k_parse_port_leds(priv, port, qca8k_port_to_phy(port_num)); ++ if (ret) ++ return ret; ++ } ++ ++ return 0; ++} +--- a/drivers/net/dsa/qca/qca8k.h ++++ b/drivers/net/dsa/qca/qca8k.h +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + + #define QCA8K_ETHERNET_MDIO_PRIORITY 7 +@@ -85,6 +86,51 @@ + #define QCA8K_MDIO_MASTER_DATA(x) FIELD_PREP(QCA8K_MDIO_MASTER_DATA_MASK, x) + #define QCA8K_MDIO_MASTER_MAX_PORTS 5 + #define QCA8K_MDIO_MASTER_MAX_REG 32 ++ ++/* LED control register */ ++#define QCA8K_LED_PORT_COUNT 3 ++#define QCA8K_LED_COUNT ((QCA8K_NUM_PORTS - QCA8K_NUM_CPU_PORTS) * QCA8K_LED_PORT_COUNT) ++#define QCA8K_LED_RULE_COUNT 6 ++#define QCA8K_LED_RULE_MAX 11 ++#define QCA8K_LED_PORT_INDEX(_phy, _led) (((_phy) * QCA8K_LED_PORT_COUNT) + (_led)) ++ ++#define QCA8K_LED_PHY123_PATTERN_EN_SHIFT(_phy, _led) ((((_phy) - 1) * 6) + 8 + (2 * (_led))) ++#define QCA8K_LED_PHY123_PATTERN_EN_MASK GENMASK(1, 0) ++ ++#define QCA8K_LED_PHY0123_CONTROL_RULE_SHIFT 0 ++#define QCA8K_LED_PHY4_CONTROL_RULE_SHIFT 16 ++ ++#define QCA8K_LED_CTRL_REG(_i) (0x050 + (_i) * 4) ++#define QCA8K_LED_CTRL0_REG 0x50 ++#define QCA8K_LED_CTRL1_REG 0x54 ++#define QCA8K_LED_CTRL2_REG 0x58 ++#define QCA8K_LED_CTRL3_REG 0x5C ++#define QCA8K_LED_CTRL_SHIFT(_i) (((_i) % 2) * 16) ++#define QCA8K_LED_CTRL_MASK GENMASK(15, 0) ++#define QCA8K_LED_RULE_MASK GENMASK(13, 0) ++#define QCA8K_LED_BLINK_FREQ_MASK GENMASK(1, 0) ++#define QCA8K_LED_BLINK_FREQ_SHITF 0 ++#define QCA8K_LED_BLINK_2HZ 0 ++#define QCA8K_LED_BLINK_4HZ 1 ++#define QCA8K_LED_BLINK_8HZ 2 ++#define QCA8K_LED_BLINK_AUTO 3 ++#define QCA8K_LED_LINKUP_OVER_MASK BIT(2) ++#define QCA8K_LED_TX_BLINK_MASK BIT(4) ++#define QCA8K_LED_RX_BLINK_MASK BIT(5) ++#define QCA8K_LED_COL_BLINK_MASK BIT(7) ++#define QCA8K_LED_LINK_10M_EN_MASK BIT(8) ++#define QCA8K_LED_LINK_100M_EN_MASK BIT(9) ++#define QCA8K_LED_LINK_1000M_EN_MASK BIT(10) ++#define QCA8K_LED_POWER_ON_LIGHT_MASK BIT(11) ++#define QCA8K_LED_HALF_DUPLEX_MASK BIT(12) ++#define QCA8K_LED_FULL_DUPLEX_MASK BIT(13) ++#define QCA8K_LED_PATTERN_EN_MASK GENMASK(15, 14) ++#define QCA8K_LED_PATTERN_EN_SHIFT 14 ++#define QCA8K_LED_ALWAYS_OFF 0 ++#define QCA8K_LED_ALWAYS_BLINK_4HZ 1 ++#define QCA8K_LED_ALWAYS_ON 2 ++#define QCA8K_LED_RULE_CONTROLLED 3 ++ + #define QCA8K_GOL_MAC_ADDR0 0x60 + #define QCA8K_GOL_MAC_ADDR1 0x64 + #define QCA8K_MAX_FRAME_SIZE 0x78 +@@ -383,6 +429,19 @@ struct qca8k_pcs { + int port; + }; + ++struct qca8k_led_pattern_en { ++ u32 reg; ++ u8 shift; ++}; ++ ++struct qca8k_led { ++ u8 port_num; ++ u8 led_num; ++ u16 old_rule; ++ struct qca8k_priv *priv; ++ struct led_classdev cdev; ++}; ++ + struct qca8k_priv { + u8 switch_id; + u8 switch_revision; +@@ -407,6 +466,7 @@ struct qca8k_priv { + struct qca8k_pcs pcs_port_0; + struct qca8k_pcs pcs_port_6; + const struct qca8k_match_data *info; ++ struct qca8k_led ports_led[QCA8K_LED_COUNT]; + }; + + struct qca8k_mib_desc { +--- /dev/null ++++ b/drivers/net/dsa/qca/qca8k_leds.h +@@ -0,0 +1,16 @@ ++/* SPDX-License-Identifier: GPL-2.0-only */ ++ ++#ifndef __QCA8K_LEDS_H ++#define __QCA8K_LEDS_H ++ ++/* Leds Support function */ ++#ifdef CONFIG_NET_DSA_QCA8K_LEDS_SUPPORT ++int qca8k_setup_led_ctrl(struct qca8k_priv *priv); ++#else ++static inline int qca8k_setup_led_ctrl(struct qca8k_priv *priv) ++{ ++ return 0; ++} ++#endif ++ ++#endif /* __QCA8K_LEDS_H */ diff --git a/target/linux/generic/backport-6.1/801-v6.4-03-net-dsa-qca8k-add-LEDs-blink_set-support.patch b/target/linux/generic/backport-6.1/801-v6.4-03-net-dsa-qca8k-add-LEDs-blink_set-support.patch new file mode 100644 index 000000000..231c4156d --- /dev/null +++ b/target/linux/generic/backport-6.1/801-v6.4-03-net-dsa-qca8k-add-LEDs-blink_set-support.patch @@ -0,0 +1,74 @@ +From 91acadcc6e599dfc62717abcdad58a459cfb1684 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 17 Apr 2023 17:17:25 +0200 +Subject: [PATCH 3/9] net: dsa: qca8k: add LEDs blink_set() support + +Add LEDs blink_set() support to qca8k Switch Family. +These LEDs support hw accellerated blinking at a fixed rate +of 4Hz. + +Reject any other value since not supported by the LEDs switch. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Acked-by: Pavel Machek +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca/qca8k-leds.c | 38 ++++++++++++++++++++++++++++++++ + 1 file changed, 38 insertions(+) + +--- a/drivers/net/dsa/qca/qca8k-leds.c ++++ b/drivers/net/dsa/qca/qca8k-leds.c +@@ -128,6 +128,43 @@ qca8k_led_brightness_get(struct qca8k_le + } + + static int ++qca8k_cled_blink_set(struct led_classdev *ldev, ++ unsigned long *delay_on, ++ unsigned long *delay_off) ++{ ++ struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev); ++ u32 mask, val = QCA8K_LED_ALWAYS_BLINK_4HZ; ++ struct qca8k_led_pattern_en reg_info; ++ struct qca8k_priv *priv = led->priv; ++ ++ if (*delay_on == 0 && *delay_off == 0) { ++ *delay_on = 125; ++ *delay_off = 125; ++ } ++ ++ if (*delay_on != 125 || *delay_off != 125) { ++ /* The hardware only supports blinking at 4Hz. Fall back ++ * to software implementation in other cases. ++ */ ++ return -EINVAL; ++ } ++ ++ qca8k_get_enable_led_reg(led->port_num, led->led_num, ®_info); ++ ++ if (led->port_num == 0 || led->port_num == 4) { ++ mask = QCA8K_LED_PATTERN_EN_MASK; ++ val <<= QCA8K_LED_PATTERN_EN_SHIFT; ++ } else { ++ mask = QCA8K_LED_PHY123_PATTERN_EN_MASK; ++ } ++ ++ regmap_update_bits(priv->regmap, reg_info.reg, mask << reg_info.shift, ++ val << reg_info.shift); ++ ++ return 0; ++} ++ ++static int + qca8k_parse_port_leds(struct qca8k_priv *priv, struct fwnode_handle *port, int port_num) + { + struct fwnode_handle *led = NULL, *leds = NULL; +@@ -186,6 +223,7 @@ qca8k_parse_port_leds(struct qca8k_priv + + port_led->cdev.max_brightness = 1; + port_led->cdev.brightness_set_blocking = qca8k_cled_brightness_set_blocking; ++ port_led->cdev.blink_set = qca8k_cled_blink_set; + init_data.default_label = ":port"; + init_data.fwnode = led; + init_data.devname_mandatory = true; diff --git a/target/linux/generic/backport-6.1/801-v6.4-04-leds-Provide-stubs-for-when-CLASS_LED-NEW_LEDS-are-d.patch b/target/linux/generic/backport-6.1/801-v6.4-04-leds-Provide-stubs-for-when-CLASS_LED-NEW_LEDS-are-d.patch new file mode 100644 index 000000000..bc905b446 --- /dev/null +++ b/target/linux/generic/backport-6.1/801-v6.4-04-leds-Provide-stubs-for-when-CLASS_LED-NEW_LEDS-are-d.patch @@ -0,0 +1,59 @@ +From e5029edd53937a29801ef507cee12e657ff31ea9 Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 17 Apr 2023 17:17:26 +0200 +Subject: [PATCH 4/9] leds: Provide stubs for when CLASS_LED & NEW_LEDS are + disabled + +Provide stubs for devm_led_classdev_register_ext() and +led_init_default_state_get() so that LED drivers embedded within other +drivers such as PHYs and Ethernet switches still build when LEDS_CLASS +or NEW_LEDS are disabled. This also helps with Kconfig dependencies, +which are somewhat hairy for phylib and mdio and only get worse when +adding a dependency on LED_CLASS. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + include/linux/leds.h | 18 ++++++++++++++++++ + 1 file changed, 18 insertions(+) + +--- a/include/linux/leds.h ++++ b/include/linux/leds.h +@@ -63,7 +63,15 @@ struct led_init_data { + bool devname_mandatory; + }; + ++#if IS_ENABLED(CONFIG_NEW_LEDS) + enum led_default_state led_init_default_state_get(struct fwnode_handle *fwnode); ++#else ++static inline enum led_default_state ++led_init_default_state_get(struct fwnode_handle *fwnode) ++{ ++ return LEDS_DEFSTATE_OFF; ++} ++#endif + + struct led_hw_trigger_type { + int dummy; +@@ -198,9 +206,19 @@ static inline int led_classdev_register( + return led_classdev_register_ext(parent, led_cdev, NULL); + } + ++#if IS_ENABLED(CONFIG_LEDS_CLASS) + int devm_led_classdev_register_ext(struct device *parent, + struct led_classdev *led_cdev, + struct led_init_data *init_data); ++#else ++static inline int ++devm_led_classdev_register_ext(struct device *parent, ++ struct led_classdev *led_cdev, ++ struct led_init_data *init_data) ++{ ++ return 0; ++} ++#endif + + static inline int devm_led_classdev_register(struct device *parent, + struct led_classdev *led_cdev) diff --git a/target/linux/generic/backport-6.1/801-v6.4-05-net-phy-Add-a-binding-for-PHY-LEDs.patch b/target/linux/generic/backport-6.1/801-v6.4-05-net-phy-Add-a-binding-for-PHY-LEDs.patch new file mode 100644 index 000000000..a3184513e --- /dev/null +++ b/target/linux/generic/backport-6.1/801-v6.4-05-net-phy-Add-a-binding-for-PHY-LEDs.patch @@ -0,0 +1,191 @@ +From 01e5b728e9e43ae444e0369695a5f72209906464 Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 17 Apr 2023 17:17:27 +0200 +Subject: [PATCH 5/9] net: phy: Add a binding for PHY LEDs + +Define common binding parsing for all PHY drivers with LEDs using +phylib. Parse the DT as part of the phy_probe and add LEDs to the +linux LED class infrastructure. For the moment, provide a dummy +brightness function, which will later be replaced with a call into the +PHY driver. This allows testing since the LED core might otherwise +reject an LED whose brightness cannot be set. + +Add a dependency on LED_CLASS. It either needs to be built in, or not +enabled, since a modular build can result in linker errors. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/phy/Kconfig | 1 + + drivers/net/phy/phy_device.c | 76 ++++++++++++++++++++++++++++++++++++ + include/linux/phy.h | 16 ++++++++ + 3 files changed, 93 insertions(+) + +--- a/drivers/net/phy/Kconfig ++++ b/drivers/net/phy/Kconfig +@@ -18,6 +18,7 @@ menuconfig PHYLIB + depends on NETDEVICES + select MDIO_DEVICE + select MDIO_DEVRES ++ depends on LEDS_CLASS || LEDS_CLASS=n + help + Ethernet controllers are usually attached to PHY + devices. This option provides infrastructure for +--- a/drivers/net/phy/phy_device.c ++++ b/drivers/net/phy/phy_device.c +@@ -19,10 +19,12 @@ + #include + #include + #include ++#include + #include + #include + #include + #include ++#include + #include + #include + #include +@@ -644,6 +646,7 @@ struct phy_device *phy_device_create(str + device_initialize(&mdiodev->dev); + + dev->state = PHY_DOWN; ++ INIT_LIST_HEAD(&dev->leds); + + mutex_init(&dev->lock); + INIT_DELAYED_WORK(&dev->state_queue, phy_state_machine); +@@ -2931,6 +2934,74 @@ static bool phy_drv_supports_irq(struct + return phydrv->config_intr && phydrv->handle_interrupt; + } + ++/* Dummy implementation until calls into PHY driver are added */ ++static int phy_led_set_brightness(struct led_classdev *led_cdev, ++ enum led_brightness value) ++{ ++ return 0; ++} ++ ++static int of_phy_led(struct phy_device *phydev, ++ struct device_node *led) ++{ ++ struct device *dev = &phydev->mdio.dev; ++ struct led_init_data init_data = {}; ++ struct led_classdev *cdev; ++ struct phy_led *phyled; ++ int err; ++ ++ phyled = devm_kzalloc(dev, sizeof(*phyled), GFP_KERNEL); ++ if (!phyled) ++ return -ENOMEM; ++ ++ cdev = &phyled->led_cdev; ++ ++ err = of_property_read_u8(led, "reg", &phyled->index); ++ if (err) ++ return err; ++ ++ cdev->brightness_set_blocking = phy_led_set_brightness; ++ cdev->max_brightness = 1; ++ init_data.devicename = dev_name(&phydev->mdio.dev); ++ init_data.fwnode = of_fwnode_handle(led); ++ init_data.devname_mandatory = true; ++ ++ err = devm_led_classdev_register_ext(dev, cdev, &init_data); ++ if (err) ++ return err; ++ ++ list_add(&phyled->list, &phydev->leds); ++ ++ return 0; ++} ++ ++static int of_phy_leds(struct phy_device *phydev) ++{ ++ struct device_node *node = phydev->mdio.dev.of_node; ++ struct device_node *leds, *led; ++ int err; ++ ++ if (!IS_ENABLED(CONFIG_OF_MDIO)) ++ return 0; ++ ++ if (!node) ++ return 0; ++ ++ leds = of_get_child_by_name(node, "leds"); ++ if (!leds) ++ return 0; ++ ++ for_each_available_child_of_node(leds, led) { ++ err = of_phy_led(phydev, led); ++ if (err) { ++ of_node_put(led); ++ return err; ++ } ++ } ++ ++ return 0; ++} ++ + /** + * fwnode_mdio_find_device - Given a fwnode, find the mdio_device + * @fwnode: pointer to the mdio_device's fwnode +@@ -3109,6 +3180,11 @@ static int phy_probe(struct device *dev) + /* Set the state to READY by default */ + phydev->state = PHY_READY; + ++ /* Get the LEDs from the device tree, and instantiate standard ++ * LEDs for them. ++ */ ++ err = of_phy_leds(phydev); ++ + out: + /* Re-assert the reset signal on error */ + if (err) +--- a/include/linux/phy.h ++++ b/include/linux/phy.h +@@ -14,6 +14,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -593,6 +594,7 @@ struct macsec_ops; + * @phy_num_led_triggers: Number of triggers in @phy_led_triggers + * @led_link_trigger: LED trigger for link up/down + * @last_triggered: last LED trigger for link speed ++ * @leds: list of PHY LED structures + * @master_slave_set: User requested master/slave configuration + * @master_slave_get: Current master/slave advertisement + * @master_slave_state: Current master/slave configuration +@@ -685,6 +687,7 @@ struct phy_device { + + struct phy_led_trigger *led_link_trigger; + #endif ++ struct list_head leds; + + /* + * Interrupt number for this PHY +@@ -759,6 +762,19 @@ struct phy_tdr_config { + #define PHY_PAIR_ALL -1 + + /** ++ * struct phy_led: An LED driven by the PHY ++ * ++ * @list: List of LEDs ++ * @led_cdev: Standard LED class structure ++ * @index: Number of the LED ++ */ ++struct phy_led { ++ struct list_head list; ++ struct led_classdev led_cdev; ++ u8 index; ++}; ++ ++/** + * struct phy_driver - Driver structure for a particular PHY type + * + * @mdiodrv: Data common to all MDIO devices diff --git a/target/linux/generic/backport-6.1/801-v6.4-06-net-phy-phy_device-Call-into-the-PHY-driver-to-set-L.patch b/target/linux/generic/backport-6.1/801-v6.4-06-net-phy-phy_device-Call-into-the-PHY-driver-to-set-L.patch new file mode 100644 index 000000000..57db12ed4 --- /dev/null +++ b/target/linux/generic/backport-6.1/801-v6.4-06-net-phy-phy_device-Call-into-the-PHY-driver-to-set-L.patch @@ -0,0 +1,97 @@ +From 684818189b04b095b34964ed4a3ea5249a840eab Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 17 Apr 2023 17:17:28 +0200 +Subject: [PATCH 6/9] net: phy: phy_device: Call into the PHY driver to set LED + brightness + +Linux LEDs can be software controlled via the brightness file in /sys. +LED drivers need to implement a brightness_set function which the core +will call. Implement an intermediary in phy_device, which will call +into the phy driver if it implements the necessary function. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/phy/phy_device.c | 15 ++++++++++++--- + include/linux/phy.h | 13 +++++++++++++ + 2 files changed, 25 insertions(+), 3 deletions(-) + +--- a/drivers/net/phy/phy_device.c ++++ b/drivers/net/phy/phy_device.c +@@ -2934,11 +2934,18 @@ static bool phy_drv_supports_irq(struct + return phydrv->config_intr && phydrv->handle_interrupt; + } + +-/* Dummy implementation until calls into PHY driver are added */ + static int phy_led_set_brightness(struct led_classdev *led_cdev, + enum led_brightness value) + { +- return 0; ++ struct phy_led *phyled = to_phy_led(led_cdev); ++ struct phy_device *phydev = phyled->phydev; ++ int err; ++ ++ mutex_lock(&phydev->lock); ++ err = phydev->drv->led_brightness_set(phydev, phyled->index, value); ++ mutex_unlock(&phydev->lock); ++ ++ return err; + } + + static int of_phy_led(struct phy_device *phydev, +@@ -2955,12 +2962,14 @@ static int of_phy_led(struct phy_device + return -ENOMEM; + + cdev = &phyled->led_cdev; ++ phyled->phydev = phydev; + + err = of_property_read_u8(led, "reg", &phyled->index); + if (err) + return err; + +- cdev->brightness_set_blocking = phy_led_set_brightness; ++ if (phydev->drv->led_brightness_set) ++ cdev->brightness_set_blocking = phy_led_set_brightness; + cdev->max_brightness = 1; + init_data.devicename = dev_name(&phydev->mdio.dev); + init_data.fwnode = of_fwnode_handle(led); +--- a/include/linux/phy.h ++++ b/include/linux/phy.h +@@ -765,15 +765,19 @@ struct phy_tdr_config { + * struct phy_led: An LED driven by the PHY + * + * @list: List of LEDs ++ * @phydev: PHY this LED is attached to + * @led_cdev: Standard LED class structure + * @index: Number of the LED + */ + struct phy_led { + struct list_head list; ++ struct phy_device *phydev; + struct led_classdev led_cdev; + u8 index; + }; + ++#define to_phy_led(d) container_of(d, struct phy_led, led_cdev) ++ + /** + * struct phy_driver - Driver structure for a particular PHY type + * +@@ -988,6 +992,15 @@ struct phy_driver { + int (*get_sqi)(struct phy_device *dev); + /** @get_sqi_max: Get the maximum signal quality indication */ + int (*get_sqi_max)(struct phy_device *dev); ++ ++ /** ++ * @led_brightness_set: Set a PHY LED brightness. Index ++ * indicates which of the PHYs led should be set. Value ++ * follows the standard LED class meaning, e.g. LED_OFF, ++ * LED_HALF, LED_FULL. ++ */ ++ int (*led_brightness_set)(struct phy_device *dev, ++ u8 index, enum led_brightness value); + }; + #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ + struct phy_driver, mdiodrv) diff --git a/target/linux/generic/backport-6.1/801-v6.4-07-net-phy-marvell-Add-software-control-of-the-LEDs.patch b/target/linux/generic/backport-6.1/801-v6.4-07-net-phy-marvell-Add-software-control-of-the-LEDs.patch new file mode 100644 index 000000000..5114c0e6d --- /dev/null +++ b/target/linux/generic/backport-6.1/801-v6.4-07-net-phy-marvell-Add-software-control-of-the-LEDs.patch @@ -0,0 +1,112 @@ +From 2d3960e58ef7c83fe1dbf952f056b9e906cb6df8 Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 17 Apr 2023 17:17:29 +0200 +Subject: [PATCH 7/9] net: phy: marvell: Add software control of the LEDs + +Add a brightness function, so the LEDs can be controlled from +software using the standard Linux LED infrastructure. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/phy/marvell.c | 45 ++++++++++++++++++++++++++++++++++----- + 1 file changed, 40 insertions(+), 5 deletions(-) + +--- a/drivers/net/phy/marvell.c ++++ b/drivers/net/phy/marvell.c +@@ -144,11 +144,13 @@ + /* WOL Event Interrupt Enable */ + #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7) + +-/* LED Timer Control Register */ +-#define MII_88E1318S_PHY_LED_TCR 0x12 +-#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) +-#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) +-#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) ++#define MII_88E1318S_PHY_LED_FUNC 0x10 ++#define MII_88E1318S_PHY_LED_FUNC_OFF (0x8) ++#define MII_88E1318S_PHY_LED_FUNC_ON (0x9) ++#define MII_88E1318S_PHY_LED_TCR 0x12 ++#define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) ++#define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) ++#define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11) + + /* Magic Packet MAC address registers */ + #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17 +@@ -2832,6 +2834,34 @@ static int marvell_hwmon_probe(struct ph + } + #endif + ++static int m88e1318_led_brightness_set(struct phy_device *phydev, ++ u8 index, enum led_brightness value) ++{ ++ int reg; ++ ++ reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE, ++ MII_88E1318S_PHY_LED_FUNC); ++ if (reg < 0) ++ return reg; ++ ++ switch (index) { ++ case 0: ++ case 1: ++ case 2: ++ reg &= ~(0xf << (4 * index)); ++ if (value == LED_OFF) ++ reg |= MII_88E1318S_PHY_LED_FUNC_OFF << (4 * index); ++ else ++ reg |= MII_88E1318S_PHY_LED_FUNC_ON << (4 * index); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return phy_write_paged(phydev, MII_MARVELL_LED_PAGE, ++ MII_88E1318S_PHY_LED_FUNC, reg); ++} ++ + static int marvell_probe(struct phy_device *phydev) + { + struct marvell_priv *priv; +@@ -3081,6 +3111,7 @@ static struct phy_driver marvell_drivers + .get_sset_count = marvell_get_sset_count, + .get_strings = marvell_get_strings, + .get_stats = marvell_get_stats, ++ .led_brightness_set = m88e1318_led_brightness_set, + }, + { + .phy_id = MARVELL_PHY_ID_88E1145, +@@ -3187,6 +3218,7 @@ static struct phy_driver marvell_drivers + .cable_test_start = marvell_vct7_cable_test_start, + .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, + .cable_test_get_status = marvell_vct7_cable_test_get_status, ++ .led_brightness_set = m88e1318_led_brightness_set, + }, + { + .phy_id = MARVELL_PHY_ID_88E1540, +@@ -3213,6 +3245,7 @@ static struct phy_driver marvell_drivers + .cable_test_start = marvell_vct7_cable_test_start, + .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, + .cable_test_get_status = marvell_vct7_cable_test_get_status, ++ .led_brightness_set = m88e1318_led_brightness_set, + }, + { + .phy_id = MARVELL_PHY_ID_88E1545, +@@ -3239,6 +3272,7 @@ static struct phy_driver marvell_drivers + .cable_test_start = marvell_vct7_cable_test_start, + .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, + .cable_test_get_status = marvell_vct7_cable_test_get_status, ++ .led_brightness_set = m88e1318_led_brightness_set, + }, + { + .phy_id = MARVELL_PHY_ID_88E3016, +@@ -3380,6 +3414,7 @@ static struct phy_driver marvell_drivers + .get_stats = marvell_get_stats, + .get_tunable = m88e1540_get_tunable, + .set_tunable = m88e1540_set_tunable, ++ .led_brightness_set = m88e1318_led_brightness_set, + }, + }; + diff --git a/target/linux/generic/backport-6.1/801-v6.4-08-net-phy-phy_device-Call-into-the-PHY-driver-to-set-L.patch b/target/linux/generic/backport-6.1/801-v6.4-08-net-phy-phy_device-Call-into-the-PHY-driver-to-set-L.patch new file mode 100644 index 000000000..e868722af --- /dev/null +++ b/target/linux/generic/backport-6.1/801-v6.4-08-net-phy-phy_device-Call-into-the-PHY-driver-to-set-L.patch @@ -0,0 +1,73 @@ +From 4e901018432e38eab35d2a352661ce4727795be1 Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 17 Apr 2023 17:17:30 +0200 +Subject: [PATCH 8/9] net: phy: phy_device: Call into the PHY driver to set LED + blinking + +Linux LEDs can be requested to perform hardware accelerated +blinking. Pass this to the PHY driver, if it implements the op. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/phy/phy_device.c | 18 ++++++++++++++++++ + include/linux/phy.h | 12 ++++++++++++ + 2 files changed, 30 insertions(+) + +--- a/drivers/net/phy/phy_device.c ++++ b/drivers/net/phy/phy_device.c +@@ -2948,6 +2948,22 @@ static int phy_led_set_brightness(struct + return err; + } + ++static int phy_led_blink_set(struct led_classdev *led_cdev, ++ unsigned long *delay_on, ++ unsigned long *delay_off) ++{ ++ struct phy_led *phyled = to_phy_led(led_cdev); ++ struct phy_device *phydev = phyled->phydev; ++ int err; ++ ++ mutex_lock(&phydev->lock); ++ err = phydev->drv->led_blink_set(phydev, phyled->index, ++ delay_on, delay_off); ++ mutex_unlock(&phydev->lock); ++ ++ return err; ++} ++ + static int of_phy_led(struct phy_device *phydev, + struct device_node *led) + { +@@ -2970,6 +2986,8 @@ static int of_phy_led(struct phy_device + + if (phydev->drv->led_brightness_set) + cdev->brightness_set_blocking = phy_led_set_brightness; ++ if (phydev->drv->led_blink_set) ++ cdev->blink_set = phy_led_blink_set; + cdev->max_brightness = 1; + init_data.devicename = dev_name(&phydev->mdio.dev); + init_data.fwnode = of_fwnode_handle(led); +--- a/include/linux/phy.h ++++ b/include/linux/phy.h +@@ -1001,6 +1001,18 @@ struct phy_driver { + */ + int (*led_brightness_set)(struct phy_device *dev, + u8 index, enum led_brightness value); ++ ++ /** ++ * @led_blink_set: Set a PHY LED brightness. Index indicates ++ * which of the PHYs led should be configured to blink. Delays ++ * are in milliseconds and if both are zero then a sensible ++ * default should be chosen. The call should adjust the ++ * timings in that case and if it can't match the values ++ * specified exactly. ++ */ ++ int (*led_blink_set)(struct phy_device *dev, u8 index, ++ unsigned long *delay_on, ++ unsigned long *delay_off); + }; + #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ + struct phy_driver, mdiodrv) diff --git a/target/linux/generic/backport-6.1/801-v6.4-09-net-phy-marvell-Implement-led_blink_set.patch b/target/linux/generic/backport-6.1/801-v6.4-09-net-phy-marvell-Implement-led_blink_set.patch new file mode 100644 index 000000000..8d5081a43 --- /dev/null +++ b/target/linux/generic/backport-6.1/801-v6.4-09-net-phy-marvell-Implement-led_blink_set.patch @@ -0,0 +1,104 @@ +From ea9e86485decb2ac1750005bd96c166c9b780406 Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 17 Apr 2023 17:17:31 +0200 +Subject: [PATCH 9/9] net: phy: marvell: Implement led_blink_set() + +The Marvell PHY can blink the LEDs, simple on/off. All LEDs blink at +the same rate, and the reset default is 84ms per blink, which is +around 12Hz. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Reviewed-by: Florian Fainelli +Signed-off-by: David S. Miller +--- + drivers/net/phy/marvell.c | 36 ++++++++++++++++++++++++++++++++++++ + 1 file changed, 36 insertions(+) + +--- a/drivers/net/phy/marvell.c ++++ b/drivers/net/phy/marvell.c +@@ -147,6 +147,8 @@ + #define MII_88E1318S_PHY_LED_FUNC 0x10 + #define MII_88E1318S_PHY_LED_FUNC_OFF (0x8) + #define MII_88E1318S_PHY_LED_FUNC_ON (0x9) ++#define MII_88E1318S_PHY_LED_FUNC_HI_Z (0xa) ++#define MII_88E1318S_PHY_LED_FUNC_BLINK (0xb) + #define MII_88E1318S_PHY_LED_TCR 0x12 + #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15) + #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7) +@@ -2862,6 +2864,35 @@ static int m88e1318_led_brightness_set(s + MII_88E1318S_PHY_LED_FUNC, reg); + } + ++static int m88e1318_led_blink_set(struct phy_device *phydev, u8 index, ++ unsigned long *delay_on, ++ unsigned long *delay_off) ++{ ++ int reg; ++ ++ reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE, ++ MII_88E1318S_PHY_LED_FUNC); ++ if (reg < 0) ++ return reg; ++ ++ switch (index) { ++ case 0: ++ case 1: ++ case 2: ++ reg &= ~(0xf << (4 * index)); ++ reg |= MII_88E1318S_PHY_LED_FUNC_BLINK << (4 * index); ++ /* Reset default is 84ms */ ++ *delay_on = 84 / 2; ++ *delay_off = 84 / 2; ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ return phy_write_paged(phydev, MII_MARVELL_LED_PAGE, ++ MII_88E1318S_PHY_LED_FUNC, reg); ++} ++ + static int marvell_probe(struct phy_device *phydev) + { + struct marvell_priv *priv; +@@ -3112,6 +3143,7 @@ static struct phy_driver marvell_drivers + .get_strings = marvell_get_strings, + .get_stats = marvell_get_stats, + .led_brightness_set = m88e1318_led_brightness_set, ++ .led_blink_set = m88e1318_led_blink_set, + }, + { + .phy_id = MARVELL_PHY_ID_88E1145, +@@ -3219,6 +3251,7 @@ static struct phy_driver marvell_drivers + .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, + .cable_test_get_status = marvell_vct7_cable_test_get_status, + .led_brightness_set = m88e1318_led_brightness_set, ++ .led_blink_set = m88e1318_led_blink_set, + }, + { + .phy_id = MARVELL_PHY_ID_88E1540, +@@ -3246,6 +3279,7 @@ static struct phy_driver marvell_drivers + .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, + .cable_test_get_status = marvell_vct7_cable_test_get_status, + .led_brightness_set = m88e1318_led_brightness_set, ++ .led_blink_set = m88e1318_led_blink_set, + }, + { + .phy_id = MARVELL_PHY_ID_88E1545, +@@ -3273,6 +3307,7 @@ static struct phy_driver marvell_drivers + .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start, + .cable_test_get_status = marvell_vct7_cable_test_get_status, + .led_brightness_set = m88e1318_led_brightness_set, ++ .led_blink_set = m88e1318_led_blink_set, + }, + { + .phy_id = MARVELL_PHY_ID_88E3016, +@@ -3415,6 +3450,7 @@ static struct phy_driver marvell_drivers + .get_tunable = m88e1540_get_tunable, + .set_tunable = m88e1540_set_tunable, + .led_brightness_set = m88e1318_led_brightness_set, ++ .led_blink_set = m88e1318_led_blink_set, + }, + }; + diff --git a/target/linux/generic/backport-6.1/802-v6.4-net-phy-marvell-Fix-inconsistent-indenting-in-led_bl.patch b/target/linux/generic/backport-6.1/802-v6.4-net-phy-marvell-Fix-inconsistent-indenting-in-led_bl.patch new file mode 100644 index 000000000..56df3f095 --- /dev/null +++ b/target/linux/generic/backport-6.1/802-v6.4-net-phy-marvell-Fix-inconsistent-indenting-in-led_bl.patch @@ -0,0 +1,38 @@ +From 4774ad841bef97cc51df90195338c5b2573dd4cb Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Sun, 23 Apr 2023 19:28:00 +0200 +Subject: [PATCH] net: phy: marvell: Fix inconsistent indenting in + led_blink_set + +Fix inconsistent indeinting in m88e1318_led_blink_set reported by kernel +test robot, probably done by the presence of an if condition dropped in +later revision of the same code. + +Reported-by: kernel test robot +Link: https://lore.kernel.org/oe-kbuild-all/202304240007.0VEX8QYG-lkp@intel.com/ +Fixes: ea9e86485dec ("net: phy: marvell: Implement led_blink_set()") +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/20230423172800.3470-1-ansuelsmth@gmail.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/marvell.c | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +--- a/drivers/net/phy/marvell.c ++++ b/drivers/net/phy/marvell.c +@@ -2880,10 +2880,10 @@ static int m88e1318_led_blink_set(struct + case 1: + case 2: + reg &= ~(0xf << (4 * index)); +- reg |= MII_88E1318S_PHY_LED_FUNC_BLINK << (4 * index); +- /* Reset default is 84ms */ +- *delay_on = 84 / 2; +- *delay_off = 84 / 2; ++ reg |= MII_88E1318S_PHY_LED_FUNC_BLINK << (4 * index); ++ /* Reset default is 84ms */ ++ *delay_on = 84 / 2; ++ *delay_off = 84 / 2; + break; + default: + return -EINVAL; diff --git a/target/linux/generic/backport-6.1/803-v6.5-02-leds-trigger-netdev-Drop-NETDEV_LED_MODE_LINKUP-from.patch b/target/linux/generic/backport-6.1/803-v6.5-02-leds-trigger-netdev-Drop-NETDEV_LED_MODE_LINKUP-from.patch new file mode 100644 index 000000000..3170c2605 --- /dev/null +++ b/target/linux/generic/backport-6.1/803-v6.5-02-leds-trigger-netdev-Drop-NETDEV_LED_MODE_LINKUP-from.patch @@ -0,0 +1,87 @@ +From e2f24cb1b5daf9a4f6f3ba574c1fa74aab9807a4 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 19 Apr 2023 23:07:40 +0200 +Subject: [PATCH 2/5] leds: trigger: netdev: Drop NETDEV_LED_MODE_LINKUP from + mode + +Putting NETDEV_LED_MODE_LINKUP in the same list of the netdev trigger +modes is wrong as it's used to set the link state of the device and not +to set a blink mode as it's done by NETDEV_LED_LINK, NETDEV_LED_TX and +NETDEV_LED_RX. It's also wrong to put this state in the same bitmap of the +netdev trigger mode and should be external to it. + +Drop NETDEV_LED_MODE_LINKUP from mode list and convert to a simple bool +that will be true or false based on the carrier link. No functional +change intended. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: Lee Jones +Link: https://lore.kernel.org/r/20230419210743.3594-3-ansuelsmth@gmail.com +--- + drivers/leds/trigger/ledtrig-netdev.c | 19 ++++++++----------- + 1 file changed, 8 insertions(+), 11 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -50,10 +50,10 @@ struct led_netdev_data { + unsigned int last_activity; + + unsigned long mode; ++ bool carrier_link_up; + #define NETDEV_LED_LINK 0 + #define NETDEV_LED_TX 1 + #define NETDEV_LED_RX 2 +-#define NETDEV_LED_MODE_LINKUP 3 + }; + + enum netdev_led_attr { +@@ -73,9 +73,9 @@ static void set_baseline_state(struct le + if (!led_cdev->blink_brightness) + led_cdev->blink_brightness = led_cdev->max_brightness; + +- if (!test_bit(NETDEV_LED_MODE_LINKUP, &trigger_data->mode)) ++ if (!trigger_data->carrier_link_up) { + led_set_brightness(led_cdev, LED_OFF); +- else { ++ } else { + if (test_bit(NETDEV_LED_LINK, &trigger_data->mode)) + led_set_brightness(led_cdev, + led_cdev->blink_brightness); +@@ -131,10 +131,9 @@ static ssize_t device_name_store(struct + trigger_data->net_dev = + dev_get_by_name(&init_net, trigger_data->device_name); + +- clear_bit(NETDEV_LED_MODE_LINKUP, &trigger_data->mode); ++ trigger_data->carrier_link_up = false; + if (trigger_data->net_dev != NULL) +- if (netif_carrier_ok(trigger_data->net_dev)) +- set_bit(NETDEV_LED_MODE_LINKUP, &trigger_data->mode); ++ trigger_data->carrier_link_up = netif_carrier_ok(trigger_data->net_dev); + + trigger_data->last_activity = 0; + +@@ -315,11 +314,10 @@ static int netdev_trig_notify(struct not + + spin_lock_bh(&trigger_data->lock); + +- clear_bit(NETDEV_LED_MODE_LINKUP, &trigger_data->mode); ++ trigger_data->carrier_link_up = false; + switch (evt) { + case NETDEV_CHANGENAME: +- if (netif_carrier_ok(dev)) +- set_bit(NETDEV_LED_MODE_LINKUP, &trigger_data->mode); ++ trigger_data->carrier_link_up = netif_carrier_ok(dev); + fallthrough; + case NETDEV_REGISTER: + if (trigger_data->net_dev) +@@ -333,8 +331,7 @@ static int netdev_trig_notify(struct not + break; + case NETDEV_UP: + case NETDEV_CHANGE: +- if (netif_carrier_ok(dev)) +- set_bit(NETDEV_LED_MODE_LINKUP, &trigger_data->mode); ++ trigger_data->carrier_link_up = netif_carrier_ok(dev); + break; + } + diff --git a/target/linux/generic/backport-6.1/803-v6.5-03-leds-trigger-netdev-Rename-add-namespace-to-netdev-t.patch b/target/linux/generic/backport-6.1/803-v6.5-03-leds-trigger-netdev-Rename-add-namespace-to-netdev-t.patch new file mode 100644 index 000000000..19cc1d7c9 --- /dev/null +++ b/target/linux/generic/backport-6.1/803-v6.5-03-leds-trigger-netdev-Rename-add-namespace-to-netdev-t.patch @@ -0,0 +1,149 @@ +From bdec9cb83936e0ac4cb87fed5b49fad0175f7dec Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 19 Apr 2023 23:07:41 +0200 +Subject: [PATCH 3/5] leds: trigger: netdev: Rename add namespace to netdev + trigger enum modes + +Rename NETDEV trigger enum modes to a more symbolic name and add a +namespace to them. + +Also add __TRIGGER_NETDEV_MAX to identify the max modes of the netdev +trigger. + +This is a cleanup to drop the define and no behaviour change are +intended. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: Lee Jones +Link: https://lore.kernel.org/r/20230419210743.3594-4-ansuelsmth@gmail.com +--- + drivers/leds/trigger/ledtrig-netdev.c | 58 ++++++++++++--------------- + 1 file changed, 25 insertions(+), 33 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -51,15 +51,15 @@ struct led_netdev_data { + + unsigned long mode; + bool carrier_link_up; +-#define NETDEV_LED_LINK 0 +-#define NETDEV_LED_TX 1 +-#define NETDEV_LED_RX 2 + }; + +-enum netdev_led_attr { +- NETDEV_ATTR_LINK, +- NETDEV_ATTR_TX, +- NETDEV_ATTR_RX ++enum led_trigger_netdev_modes { ++ TRIGGER_NETDEV_LINK = 0, ++ TRIGGER_NETDEV_TX, ++ TRIGGER_NETDEV_RX, ++ ++ /* Keep last */ ++ __TRIGGER_NETDEV_MAX, + }; + + static void set_baseline_state(struct led_netdev_data *trigger_data) +@@ -76,7 +76,7 @@ static void set_baseline_state(struct le + if (!trigger_data->carrier_link_up) { + led_set_brightness(led_cdev, LED_OFF); + } else { +- if (test_bit(NETDEV_LED_LINK, &trigger_data->mode)) ++ if (test_bit(TRIGGER_NETDEV_LINK, &trigger_data->mode)) + led_set_brightness(led_cdev, + led_cdev->blink_brightness); + else +@@ -85,8 +85,8 @@ static void set_baseline_state(struct le + /* If we are looking for RX/TX start periodically + * checking stats + */ +- if (test_bit(NETDEV_LED_TX, &trigger_data->mode) || +- test_bit(NETDEV_LED_RX, &trigger_data->mode)) ++ if (test_bit(TRIGGER_NETDEV_TX, &trigger_data->mode) || ++ test_bit(TRIGGER_NETDEV_RX, &trigger_data->mode)) + schedule_delayed_work(&trigger_data->work, 0); + } + } +@@ -146,20 +146,16 @@ static ssize_t device_name_store(struct + static DEVICE_ATTR_RW(device_name); + + static ssize_t netdev_led_attr_show(struct device *dev, char *buf, +- enum netdev_led_attr attr) ++ enum led_trigger_netdev_modes attr) + { + struct led_netdev_data *trigger_data = led_trigger_get_drvdata(dev); + int bit; + + switch (attr) { +- case NETDEV_ATTR_LINK: +- bit = NETDEV_LED_LINK; +- break; +- case NETDEV_ATTR_TX: +- bit = NETDEV_LED_TX; +- break; +- case NETDEV_ATTR_RX: +- bit = NETDEV_LED_RX; ++ case TRIGGER_NETDEV_LINK: ++ case TRIGGER_NETDEV_TX: ++ case TRIGGER_NETDEV_RX: ++ bit = attr; + break; + default: + return -EINVAL; +@@ -169,7 +165,7 @@ static ssize_t netdev_led_attr_show(stru + } + + static ssize_t netdev_led_attr_store(struct device *dev, const char *buf, +- size_t size, enum netdev_led_attr attr) ++ size_t size, enum led_trigger_netdev_modes attr) + { + struct led_netdev_data *trigger_data = led_trigger_get_drvdata(dev); + unsigned long state; +@@ -181,14 +177,10 @@ static ssize_t netdev_led_attr_store(str + return ret; + + switch (attr) { +- case NETDEV_ATTR_LINK: +- bit = NETDEV_LED_LINK; +- break; +- case NETDEV_ATTR_TX: +- bit = NETDEV_LED_TX; +- break; +- case NETDEV_ATTR_RX: +- bit = NETDEV_LED_RX; ++ case TRIGGER_NETDEV_LINK: ++ case TRIGGER_NETDEV_TX: ++ case TRIGGER_NETDEV_RX: ++ bit = attr; + break; + default: + return -EINVAL; +@@ -360,21 +352,21 @@ static void netdev_trig_work(struct work + } + + /* If we are not looking for RX/TX then return */ +- if (!test_bit(NETDEV_LED_TX, &trigger_data->mode) && +- !test_bit(NETDEV_LED_RX, &trigger_data->mode)) ++ if (!test_bit(TRIGGER_NETDEV_TX, &trigger_data->mode) && ++ !test_bit(TRIGGER_NETDEV_RX, &trigger_data->mode)) + return; + + dev_stats = dev_get_stats(trigger_data->net_dev, &temp); + new_activity = +- (test_bit(NETDEV_LED_TX, &trigger_data->mode) ? ++ (test_bit(TRIGGER_NETDEV_TX, &trigger_data->mode) ? + dev_stats->tx_packets : 0) + +- (test_bit(NETDEV_LED_RX, &trigger_data->mode) ? ++ (test_bit(TRIGGER_NETDEV_RX, &trigger_data->mode) ? + dev_stats->rx_packets : 0); + + if (trigger_data->last_activity != new_activity) { + led_stop_software_blink(trigger_data->led_cdev); + +- invert = test_bit(NETDEV_LED_LINK, &trigger_data->mode); ++ invert = test_bit(TRIGGER_NETDEV_LINK, &trigger_data->mode); + interval = jiffies_to_msecs( + atomic_read(&trigger_data->interval)); + /* base state is ON (link present) */ diff --git a/target/linux/generic/backport-6.1/803-v6.5-04-leds-trigger-netdev-Convert-device-attr-to-macro.patch b/target/linux/generic/backport-6.1/803-v6.5-04-leds-trigger-netdev-Convert-device-attr-to-macro.patch new file mode 100644 index 000000000..3b45951f5 --- /dev/null +++ b/target/linux/generic/backport-6.1/803-v6.5-04-leds-trigger-netdev-Convert-device-attr-to-macro.patch @@ -0,0 +1,82 @@ +From 164b67d53476a9d114be85c885bd31f783835be4 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 19 Apr 2023 23:07:42 +0200 +Subject: [PATCH 4/5] leds: trigger: netdev: Convert device attr to macro + +Convert link tx and rx device attr to a common macro to reduce common +code and in preparation for additional attr. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: Lee Jones +Link: https://lore.kernel.org/r/20230419210743.3594-5-ansuelsmth@gmail.com +--- + drivers/leds/trigger/ledtrig-netdev.c | 57 ++++++++------------------- + 1 file changed, 16 insertions(+), 41 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -198,47 +198,22 @@ static ssize_t netdev_led_attr_store(str + return size; + } + +-static ssize_t link_show(struct device *dev, +- struct device_attribute *attr, char *buf) +-{ +- return netdev_led_attr_show(dev, buf, NETDEV_ATTR_LINK); +-} +- +-static ssize_t link_store(struct device *dev, +- struct device_attribute *attr, const char *buf, size_t size) +-{ +- return netdev_led_attr_store(dev, buf, size, NETDEV_ATTR_LINK); +-} +- +-static DEVICE_ATTR_RW(link); +- +-static ssize_t tx_show(struct device *dev, +- struct device_attribute *attr, char *buf) +-{ +- return netdev_led_attr_show(dev, buf, NETDEV_ATTR_TX); +-} +- +-static ssize_t tx_store(struct device *dev, +- struct device_attribute *attr, const char *buf, size_t size) +-{ +- return netdev_led_attr_store(dev, buf, size, NETDEV_ATTR_TX); +-} +- +-static DEVICE_ATTR_RW(tx); +- +-static ssize_t rx_show(struct device *dev, +- struct device_attribute *attr, char *buf) +-{ +- return netdev_led_attr_show(dev, buf, NETDEV_ATTR_RX); +-} +- +-static ssize_t rx_store(struct device *dev, +- struct device_attribute *attr, const char *buf, size_t size) +-{ +- return netdev_led_attr_store(dev, buf, size, NETDEV_ATTR_RX); +-} +- +-static DEVICE_ATTR_RW(rx); ++#define DEFINE_NETDEV_TRIGGER(trigger_name, trigger) \ ++ static ssize_t trigger_name##_show(struct device *dev, \ ++ struct device_attribute *attr, char *buf) \ ++ { \ ++ return netdev_led_attr_show(dev, buf, trigger); \ ++ } \ ++ static ssize_t trigger_name##_store(struct device *dev, \ ++ struct device_attribute *attr, const char *buf, size_t size) \ ++ { \ ++ return netdev_led_attr_store(dev, buf, size, trigger); \ ++ } \ ++ static DEVICE_ATTR_RW(trigger_name) ++ ++DEFINE_NETDEV_TRIGGER(link, TRIGGER_NETDEV_LINK); ++DEFINE_NETDEV_TRIGGER(tx, TRIGGER_NETDEV_TX); ++DEFINE_NETDEV_TRIGGER(rx, TRIGGER_NETDEV_RX); + + static ssize_t interval_show(struct device *dev, + struct device_attribute *attr, char *buf) diff --git a/target/linux/generic/backport-6.1/803-v6.5-05-leds-trigger-netdev-Use-mutex-instead-of-spinlocks.patch b/target/linux/generic/backport-6.1/803-v6.5-05-leds-trigger-netdev-Use-mutex-instead-of-spinlocks.patch new file mode 100644 index 000000000..180bee961 --- /dev/null +++ b/target/linux/generic/backport-6.1/803-v6.5-05-leds-trigger-netdev-Use-mutex-instead-of-spinlocks.patch @@ -0,0 +1,106 @@ +From d1b9e1391ab2dc80e9db87fe8b2de015c651e4c9 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Wed, 19 Apr 2023 23:07:43 +0200 +Subject: [PATCH 5/5] leds: trigger: netdev: Use mutex instead of spinlocks + +Some LEDs may require to sleep while doing some operation like setting +brightness and other cleanup. + +For this reason, using a spinlock will cause a sleep under spinlock +warning. + +It should be safe to convert this to a sleepable lock since: +- sysfs read/write can sleep +- netdev_trig_work is a work queue and can sleep +- netdev _trig_notify can sleep + +The spinlock was used when brightness didn't support sleeping, but this +changed and now it supported with brightness_set_blocking(). + +Convert to mutex lock to permit sleeping using brightness_set_blocking(). + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: Lee Jones +Link: https://lore.kernel.org/r/20230419210743.3594-6-ansuelsmth@gmail.com +--- + drivers/leds/trigger/ledtrig-netdev.c | 18 +++++++++--------- + 1 file changed, 9 insertions(+), 9 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -20,7 +20,7 @@ + #include + #include + #include +-#include ++#include + #include + #include "../leds.h" + +@@ -37,7 +37,7 @@ + */ + + struct led_netdev_data { +- spinlock_t lock; ++ struct mutex lock; + + struct delayed_work work; + struct notifier_block notifier; +@@ -97,9 +97,9 @@ static ssize_t device_name_show(struct d + struct led_netdev_data *trigger_data = led_trigger_get_drvdata(dev); + ssize_t len; + +- spin_lock_bh(&trigger_data->lock); ++ mutex_lock(&trigger_data->lock); + len = sprintf(buf, "%s\n", trigger_data->device_name); +- spin_unlock_bh(&trigger_data->lock); ++ mutex_unlock(&trigger_data->lock); + + return len; + } +@@ -115,7 +115,7 @@ static ssize_t device_name_store(struct + + cancel_delayed_work_sync(&trigger_data->work); + +- spin_lock_bh(&trigger_data->lock); ++ mutex_lock(&trigger_data->lock); + + if (trigger_data->net_dev) { + dev_put(trigger_data->net_dev); +@@ -138,7 +138,7 @@ static ssize_t device_name_store(struct + trigger_data->last_activity = 0; + + set_baseline_state(trigger_data); +- spin_unlock_bh(&trigger_data->lock); ++ mutex_unlock(&trigger_data->lock); + + return size; + } +@@ -279,7 +279,7 @@ static int netdev_trig_notify(struct not + + cancel_delayed_work_sync(&trigger_data->work); + +- spin_lock_bh(&trigger_data->lock); ++ mutex_lock(&trigger_data->lock); + + trigger_data->carrier_link_up = false; + switch (evt) { +@@ -304,7 +304,7 @@ static int netdev_trig_notify(struct not + + set_baseline_state(trigger_data); + +- spin_unlock_bh(&trigger_data->lock); ++ mutex_unlock(&trigger_data->lock); + + return NOTIFY_DONE; + } +@@ -365,7 +365,7 @@ static int netdev_trig_activate(struct l + if (!trigger_data) + return -ENOMEM; + +- spin_lock_init(&trigger_data->lock); ++ mutex_init(&trigger_data->lock); + + trigger_data->notifier.notifier_call = netdev_trig_notify; + trigger_data->notifier.priority = 10; diff --git a/target/linux/generic/backport-6.1/804-v6.5-01-leds-add-APIs-for-LEDs-hw-control.patch b/target/linux/generic/backport-6.1/804-v6.5-01-leds-add-APIs-for-LEDs-hw-control.patch new file mode 100644 index 000000000..ac1861173 --- /dev/null +++ b/target/linux/generic/backport-6.1/804-v6.5-01-leds-add-APIs-for-LEDs-hw-control.patch @@ -0,0 +1,74 @@ +From ed554d3f945179c5b159bddfad7be34b403fe11a Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:31 +0200 +Subject: [PATCH 01/13] leds: add APIs for LEDs hw control + +Add an option to permit LED driver to declare support for a specific +trigger to use hw control and setup the LED to blink based on specific +provided modes. + +Add APIs for LEDs hw control. These functions will be used to activate +hardware control where a LED will use the provided flags, from an +unique defined supported trigger, to setup the LED to be driven by +hardware. + +Add hw_control_is_supported() to ask the LED driver if the requested +mode by the trigger are supported and the LED can be setup to follow +the requested modes. + +Deactivate hardware blink control by setting brightness to LED_OFF via +the brightness_set() callback. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + include/linux/leds.h | 37 +++++++++++++++++++++++++++++++++++++ + 1 file changed, 37 insertions(+) + +--- a/include/linux/leds.h ++++ b/include/linux/leds.h +@@ -164,6 +164,43 @@ struct led_classdev { + + /* LEDs that have private triggers have this set */ + struct led_hw_trigger_type *trigger_type; ++ ++ /* Unique trigger name supported by LED set in hw control mode */ ++ const char *hw_control_trigger; ++ /* ++ * Check if the LED driver supports the requested mode provided by the ++ * defined supported trigger to setup the LED to hw control mode. ++ * ++ * Return 0 on success. Return -EOPNOTSUPP when the passed flags are not ++ * supported and software fallback needs to be used. ++ * Return a negative error number on any other case for check fail due ++ * to various reason like device not ready or timeouts. ++ */ ++ int (*hw_control_is_supported)(struct led_classdev *led_cdev, ++ unsigned long flags); ++ /* ++ * Activate hardware control, LED driver will use the provided flags ++ * from the supported trigger and setup the LED to be driven by hardware ++ * following the requested mode from the trigger flags. ++ * Deactivate hardware blink control by setting brightness to LED_OFF via ++ * the brightness_set() callback. ++ * ++ * Return 0 on success, a negative error number on flags apply fail. ++ */ ++ int (*hw_control_set)(struct led_classdev *led_cdev, ++ unsigned long flags); ++ /* ++ * Get from the LED driver the current mode that the LED is set in hw ++ * control mode and put them in flags. ++ * Trigger can use this to get the initial state of a LED already set in ++ * hardware blink control. ++ * ++ * Return 0 on success, a negative error number on failing parsing the ++ * initial mode. Error from this function is NOT FATAL as the device ++ * may be in a not supported initial state by the attached LED trigger. ++ */ ++ int (*hw_control_get)(struct led_classdev *led_cdev, ++ unsigned long *flags); + #endif + + #ifdef CONFIG_LEDS_BRIGHTNESS_HW_CHANGED diff --git a/target/linux/generic/backport-6.1/804-v6.5-02-leds-add-API-to-get-attached-device-for-LED-hw-contr.patch b/target/linux/generic/backport-6.1/804-v6.5-02-leds-add-API-to-get-attached-device-for-LED-hw-contr.patch new file mode 100644 index 000000000..1a221727a --- /dev/null +++ b/target/linux/generic/backport-6.1/804-v6.5-02-leds-add-API-to-get-attached-device-for-LED-hw-contr.patch @@ -0,0 +1,37 @@ +From 052c38eb17e866c5b4cd43924e7a5e20167b55c0 Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 29 May 2023 18:32:32 +0200 +Subject: [PATCH 02/13] leds: add API to get attached device for LED hw control + +Some specific LED triggers blink the LED based on events from a device +or subsystem. +For example, an LED could be blinked to indicate a network device is +receiving packets, or a disk is reading blocks. To correctly enable and +request the hw control of the LED, the trigger has to check if the +network interface or block device configured via a /sys/class/led file +match the one the LED driver provide for hw control for. + +Provide an API call to get the device which the LED blinks for. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Signed-off-by: David S. Miller +--- + include/linux/leds.h | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/include/linux/leds.h ++++ b/include/linux/leds.h +@@ -201,6 +201,12 @@ struct led_classdev { + */ + int (*hw_control_get)(struct led_classdev *led_cdev, + unsigned long *flags); ++ /* ++ * Get the device this LED blinks in response to. ++ * e.g. for a PHY LED, it is the network device. If the LED is ++ * not yet associated to a device, return NULL. ++ */ ++ struct device *(*hw_control_get_device)(struct led_classdev *led_cdev); + #endif + + #ifdef CONFIG_LEDS_BRIGHTNESS_HW_CHANGED diff --git a/target/linux/generic/backport-6.1/804-v6.5-03-Documentation-leds-leds-class-Document-new-Hardware-.patch b/target/linux/generic/backport-6.1/804-v6.5-03-Documentation-leds-leds-class-Document-new-Hardware-.patch new file mode 100644 index 000000000..af9fb7fdc --- /dev/null +++ b/target/linux/generic/backport-6.1/804-v6.5-03-Documentation-leds-leds-class-Document-new-Hardware-.patch @@ -0,0 +1,113 @@ +From 8aa2fd7b66980ecd2e45e95af61cf7eafede1211 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:33 +0200 +Subject: [PATCH 03/13] Documentation: leds: leds-class: Document new Hardware + driven LEDs APIs + +Document new Hardware driven LEDs APIs. + +Some LEDs can be programmed to be driven by hardware. This is not +limited to blink but also to turn off or on autonomously. +To support this feature, a LED needs to implement various additional +ops and needs to declare specific support for the supported triggers. + +Add documentation for each required value and API to make hw control +possible and implementable by both LEDs and triggers. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + Documentation/leds/leds-class.rst | 81 +++++++++++++++++++++++++++++++ + 1 file changed, 81 insertions(+) + +--- a/Documentation/leds/leds-class.rst ++++ b/Documentation/leds/leds-class.rst +@@ -169,6 +169,87 @@ Setting the brightness to zero with brig + should completely turn off the LED and cancel the previously programmed + hardware blinking function, if any. + ++Hardware driven LEDs ++==================== ++ ++Some LEDs can be programmed to be driven by hardware. This is not ++limited to blink but also to turn off or on autonomously. ++To support this feature, a LED needs to implement various additional ++ops and needs to declare specific support for the supported triggers. ++ ++With hw control we refer to the LED driven by hardware. ++ ++LED driver must define the following value to support hw control: ++ ++ - hw_control_trigger: ++ unique trigger name supported by the LED in hw control ++ mode. ++ ++LED driver must implement the following API to support hw control: ++ - hw_control_is_supported: ++ check if the flags passed by the supported trigger can ++ be parsed and activate hw control on the LED. ++ ++ Return 0 if the passed flags mask is supported and ++ can be set with hw_control_set(). ++ ++ If the passed flags mask is not supported -EOPNOTSUPP ++ must be returned, the LED trigger will use software ++ fallback in this case. ++ ++ Return a negative error in case of any other error like ++ device not ready or timeouts. ++ ++ - hw_control_set: ++ activate hw control. LED driver will use the provided ++ flags passed from the supported trigger, parse them to ++ a set of mode and setup the LED to be driven by hardware ++ following the requested modes. ++ ++ Set LED_OFF via the brightness_set to deactivate hw control. ++ ++ Return 0 on success, a negative error number on failing to ++ apply flags. ++ ++ - hw_control_get: ++ get active modes from a LED already in hw control, parse ++ them and set in flags the current active flags for the ++ supported trigger. ++ ++ Return 0 on success, a negative error number on failing ++ parsing the initial mode. ++ Error from this function is NOT FATAL as the device may ++ be in a not supported initial state by the attached LED ++ trigger. ++ ++ - hw_control_get_device: ++ return the device associated with the LED driver in ++ hw control. A trigger might use this to match the ++ returned device from this function with a configured ++ device for the trigger as the source for blinking ++ events and correctly enable hw control. ++ (example a netdev trigger configured to blink for a ++ particular dev match the returned dev from get_device ++ to set hw control) ++ ++ Returns a pointer to a struct device or NULL if nothing ++ is currently attached. ++ ++LED driver can activate additional modes by default to workaround the ++impossibility of supporting each different mode on the supported trigger. ++Examples are hardcoding the blink speed to a set interval, enable special ++feature like bypassing blink if some requirements are not met. ++ ++A trigger should first check if the hw control API are supported by the LED ++driver and check if the trigger is supported to verify if hw control is possible, ++use hw_control_is_supported to check if the flags are supported and only at ++the end use hw_control_set to activate hw control. ++ ++A trigger can use hw_control_get to check if a LED is already in hw control ++and init their flags. ++ ++When the LED is in hw control, no software blink is possible and doing so ++will effectively disable hw control. + + Known Issues + ============ diff --git a/target/linux/generic/backport-6.1/804-v6.5-04-leds-trigger-netdev-refactor-code-setting-device-nam.patch b/target/linux/generic/backport-6.1/804-v6.5-04-leds-trigger-netdev-refactor-code-setting-device-nam.patch new file mode 100644 index 000000000..3c804c0b4 --- /dev/null +++ b/target/linux/generic/backport-6.1/804-v6.5-04-leds-trigger-netdev-refactor-code-setting-device-nam.patch @@ -0,0 +1,69 @@ +From 28a6a2ef18ad840a390d519840c303b03040961c Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 29 May 2023 18:32:34 +0200 +Subject: [PATCH 04/13] leds: trigger: netdev: refactor code setting device + name + +Move the code into a helper, ready for it to be called at +other times. No intended behaviour change. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 29 ++++++++++++++++++--------- + 1 file changed, 20 insertions(+), 9 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -104,15 +104,9 @@ static ssize_t device_name_show(struct d + return len; + } + +-static ssize_t device_name_store(struct device *dev, +- struct device_attribute *attr, const char *buf, +- size_t size) ++static int set_device_name(struct led_netdev_data *trigger_data, ++ const char *name, size_t size) + { +- struct led_netdev_data *trigger_data = led_trigger_get_drvdata(dev); +- +- if (size >= IFNAMSIZ) +- return -EINVAL; +- + cancel_delayed_work_sync(&trigger_data->work); + + mutex_lock(&trigger_data->lock); +@@ -122,7 +116,7 @@ static ssize_t device_name_store(struct + trigger_data->net_dev = NULL; + } + +- memcpy(trigger_data->device_name, buf, size); ++ memcpy(trigger_data->device_name, name, size); + trigger_data->device_name[size] = 0; + if (size > 0 && trigger_data->device_name[size - 1] == '\n') + trigger_data->device_name[size - 1] = 0; +@@ -140,6 +134,23 @@ static ssize_t device_name_store(struct + set_baseline_state(trigger_data); + mutex_unlock(&trigger_data->lock); + ++ return 0; ++} ++ ++static ssize_t device_name_store(struct device *dev, ++ struct device_attribute *attr, const char *buf, ++ size_t size) ++{ ++ struct led_netdev_data *trigger_data = led_trigger_get_drvdata(dev); ++ int ret; ++ ++ if (size >= IFNAMSIZ) ++ return -EINVAL; ++ ++ ret = set_device_name(trigger_data, buf, size); ++ ++ if (ret < 0) ++ return ret; + return size; + } + diff --git a/target/linux/generic/backport-6.1/804-v6.5-05-leds-trigger-netdev-introduce-check-for-possible-hw-.patch b/target/linux/generic/backport-6.1/804-v6.5-05-leds-trigger-netdev-introduce-check-for-possible-hw-.patch new file mode 100644 index 000000000..284b51948 --- /dev/null +++ b/target/linux/generic/backport-6.1/804-v6.5-05-leds-trigger-netdev-introduce-check-for-possible-hw-.patch @@ -0,0 +1,54 @@ +From 4fd1b6d47a7a38e81fdc6f8be2ccd4216b3f93db Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:35 +0200 +Subject: [PATCH 05/13] leds: trigger: netdev: introduce check for possible hw + control + +Introduce function to check if the requested mode can use hw control in +preparation for hw control support. Currently everything is handled in +software so can_hw_control will always return false. + +Add knob with the new value hw_control in trigger_data struct to +set hw control possible. Useful for future implementation to implement +in set_baseline_state() the required function to set the requested mode +using LEDs hw control ops and in other function to reject set if hw +control is currently active. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -51,6 +51,7 @@ struct led_netdev_data { + + unsigned long mode; + bool carrier_link_up; ++ bool hw_control; + }; + + enum led_trigger_netdev_modes { +@@ -91,6 +92,11 @@ static void set_baseline_state(struct le + } + } + ++static bool can_hw_control(struct led_netdev_data *trigger_data) ++{ ++ return false; ++} ++ + static ssize_t device_name_show(struct device *dev, + struct device_attribute *attr, char *buf) + { +@@ -204,6 +210,8 @@ static ssize_t netdev_led_attr_store(str + else + clear_bit(bit, &trigger_data->mode); + ++ trigger_data->hw_control = can_hw_control(trigger_data); ++ + set_baseline_state(trigger_data); + + return size; diff --git a/target/linux/generic/backport-6.1/804-v6.5-06-leds-trigger-netdev-add-basic-check-for-hw-control-s.patch b/target/linux/generic/backport-6.1/804-v6.5-06-leds-trigger-netdev-add-basic-check-for-hw-control-s.patch new file mode 100644 index 000000000..09759bc62 --- /dev/null +++ b/target/linux/generic/backport-6.1/804-v6.5-06-leds-trigger-netdev-add-basic-check-for-hw-control-s.patch @@ -0,0 +1,42 @@ +From 6352f25f9fadba59d5df2ba7139495759ccc81d5 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:36 +0200 +Subject: [PATCH 06/13] leds: trigger: netdev: add basic check for hw control + support + +Add basic check for hw control support. Check if the required API are +defined and check if the defined trigger supported in hw control for the +LED driver match netdev. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 14 ++++++++++++++ + 1 file changed, 14 insertions(+) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -92,8 +92,22 @@ static void set_baseline_state(struct le + } + } + ++static bool supports_hw_control(struct led_classdev *led_cdev) ++{ ++ if (!led_cdev->hw_control_get || !led_cdev->hw_control_set || ++ !led_cdev->hw_control_is_supported) ++ return false; ++ ++ return !strcmp(led_cdev->hw_control_trigger, led_cdev->trigger->name); ++} ++ + static bool can_hw_control(struct led_netdev_data *trigger_data) + { ++ struct led_classdev *led_cdev = trigger_data->led_cdev; ++ ++ if (!supports_hw_control(led_cdev)) ++ return false; ++ + return false; + } + diff --git a/target/linux/generic/backport-6.1/804-v6.5-07-leds-trigger-netdev-reject-interval-store-for-hw_con.patch b/target/linux/generic/backport-6.1/804-v6.5-07-leds-trigger-netdev-reject-interval-store-for-hw_con.patch new file mode 100644 index 000000000..663490680 --- /dev/null +++ b/target/linux/generic/backport-6.1/804-v6.5-07-leds-trigger-netdev-reject-interval-store-for-hw_con.patch @@ -0,0 +1,28 @@ +From c84c80c7388f887b10dafd70fc55bc6c5fe9fa5a Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:37 +0200 +Subject: [PATCH 07/13] leds: trigger: netdev: reject interval store for + hw_control + +Reject interval store with hw_control enabled. It's are currently not +supported and MUST be set to the default value with hw control enabled. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -265,6 +265,9 @@ static ssize_t interval_store(struct dev + unsigned long value; + int ret; + ++ if (trigger_data->hw_control) ++ return -EINVAL; ++ + ret = kstrtoul(buf, 0, &value); + if (ret) + return ret; diff --git a/target/linux/generic/backport-6.1/804-v6.5-08-leds-trigger-netdev-add-support-for-LED-hw-control.patch b/target/linux/generic/backport-6.1/804-v6.5-08-leds-trigger-netdev-add-support-for-LED-hw-control.patch new file mode 100644 index 000000000..52faa4809 --- /dev/null +++ b/target/linux/generic/backport-6.1/804-v6.5-08-leds-trigger-netdev-add-support-for-LED-hw-control.patch @@ -0,0 +1,107 @@ +From 7c145a34ba6e380616af93262fcab9fc7261d851 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:38 +0200 +Subject: [PATCH 08/13] leds: trigger: netdev: add support for LED hw control + +Add support for LED hw control for the netdev trigger. + +The trigger on calling set_baseline_state to configure a new mode, will +do various check to verify if hw control can be used for the requested +mode in can_hw_control() function. + +It will first check if the LED driver supports hw control for the netdev +trigger, then will use hw_control_is_supported() and finally will call +hw_control_set() to apply the requested mode. + +To use such mode, interval MUST be set to the default value and net_dev +MUST be set. If one of these 2 value are not valid, hw control will +never be used and normal software fallback is used. + +The default interval value is moved to a define to make sure they are +always synced. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 43 +++++++++++++++++++++++++-- + 1 file changed, 41 insertions(+), 2 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -24,6 +24,8 @@ + #include + #include "../leds.h" + ++#define NETDEV_LED_DEFAULT_INTERVAL 50 ++ + /* + * Configurable sysfs attributes: + * +@@ -68,6 +70,13 @@ static void set_baseline_state(struct le + int current_brightness; + struct led_classdev *led_cdev = trigger_data->led_cdev; + ++ /* Already validated, hw control is possible with the requested mode */ ++ if (trigger_data->hw_control) { ++ led_cdev->hw_control_set(led_cdev, trigger_data->mode); ++ ++ return; ++ } ++ + current_brightness = led_cdev->brightness; + if (current_brightness) + led_cdev->blink_brightness = current_brightness; +@@ -103,12 +112,42 @@ static bool supports_hw_control(struct l + + static bool can_hw_control(struct led_netdev_data *trigger_data) + { ++ unsigned long default_interval = msecs_to_jiffies(NETDEV_LED_DEFAULT_INTERVAL); ++ unsigned int interval = atomic_read(&trigger_data->interval); + struct led_classdev *led_cdev = trigger_data->led_cdev; ++ int ret; + + if (!supports_hw_control(led_cdev)) + return false; + +- return false; ++ /* ++ * Interval must be set to the default ++ * value. Any different value is rejected if in hw ++ * control. ++ */ ++ if (interval != default_interval) ++ return false; ++ ++ /* ++ * net_dev must be set with hw control, otherwise no ++ * blinking can be happening and there is nothing to ++ * offloaded. ++ */ ++ if (!trigger_data->net_dev) ++ return false; ++ ++ /* Check if the requested mode is supported */ ++ ret = led_cdev->hw_control_is_supported(led_cdev, trigger_data->mode); ++ /* Fall back to software blinking if not supported */ ++ if (ret == -EOPNOTSUPP) ++ return false; ++ if (ret) { ++ dev_warn(led_cdev->dev, ++ "Current mode check failed with error %d\n", ret); ++ return false; ++ } ++ ++ return true; + } + + static ssize_t device_name_show(struct device *dev, +@@ -413,7 +452,7 @@ static int netdev_trig_activate(struct l + trigger_data->device_name[0] = 0; + + trigger_data->mode = 0; +- atomic_set(&trigger_data->interval, msecs_to_jiffies(50)); ++ atomic_set(&trigger_data->interval, msecs_to_jiffies(NETDEV_LED_DEFAULT_INTERVAL)); + trigger_data->last_activity = 0; + + led_set_trigger_data(led_cdev, trigger_data); diff --git a/target/linux/generic/backport-6.1/804-v6.5-09-leds-trigger-netdev-validate-configured-netdev.patch b/target/linux/generic/backport-6.1/804-v6.5-09-leds-trigger-netdev-validate-configured-netdev.patch new file mode 100644 index 000000000..c129ffa4f --- /dev/null +++ b/target/linux/generic/backport-6.1/804-v6.5-09-leds-trigger-netdev-validate-configured-netdev.patch @@ -0,0 +1,58 @@ +From 33ec0b53befff2c0a7f3aa19ff08556d60585d6b Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 29 May 2023 18:32:39 +0200 +Subject: [PATCH 09/13] leds: trigger: netdev: validate configured netdev + +The netdev which the LED should blink for is configurable in +/sys/class/led/foo/device_name. Ensure when offloading that the +configured netdev is the same as the netdev the LED is associated +with. If it is not, only perform software blinking. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 24 ++++++++++++++++++++++-- + 1 file changed, 22 insertions(+), 2 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -110,6 +110,24 @@ static bool supports_hw_control(struct l + return !strcmp(led_cdev->hw_control_trigger, led_cdev->trigger->name); + } + ++/* ++ * Validate the configured netdev is the same as the one associated with ++ * the LED driver in hw control. ++ */ ++static bool validate_net_dev(struct led_classdev *led_cdev, ++ struct net_device *net_dev) ++{ ++ struct device *dev = led_cdev->hw_control_get_device(led_cdev); ++ struct net_device *ndev; ++ ++ if (!dev) ++ return false; ++ ++ ndev = to_net_dev(dev); ++ ++ return ndev == net_dev; ++} ++ + static bool can_hw_control(struct led_netdev_data *trigger_data) + { + unsigned long default_interval = msecs_to_jiffies(NETDEV_LED_DEFAULT_INTERVAL); +@@ -131,9 +149,11 @@ static bool can_hw_control(struct led_ne + /* + * net_dev must be set with hw control, otherwise no + * blinking can be happening and there is nothing to +- * offloaded. ++ * offloaded. Additionally, for hw control to be ++ * valid, the configured netdev must be the same as ++ * netdev associated to the LED. + */ +- if (!trigger_data->net_dev) ++ if (!validate_net_dev(led_cdev, trigger_data->net_dev)) + return false; + + /* Check if the requested mode is supported */ diff --git a/target/linux/generic/backport-6.1/804-v6.5-10-leds-trigger-netdev-init-mode-if-hw-control-already-.patch b/target/linux/generic/backport-6.1/804-v6.5-10-leds-trigger-netdev-init-mode-if-hw-control-already-.patch new file mode 100644 index 000000000..e20594c99 --- /dev/null +++ b/target/linux/generic/backport-6.1/804-v6.5-10-leds-trigger-netdev-init-mode-if-hw-control-already-.patch @@ -0,0 +1,53 @@ +From 0316cc5629d15880dd3f097d221c55ca648bcd61 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:40 +0200 +Subject: [PATCH 10/13] leds: trigger: netdev: init mode if hw control already + active + +On netdev trigger activation, hw control may be already active by +default. If this is the case and a device is actually provided by +hw_control_get_device(), init the already active mode and set the +bool to hw_control bool to true to reflect the already set mode in the +trigger_data. + +Co-developed-by: Andrew Lunn +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 17 +++++++++++++++++ + 1 file changed, 17 insertions(+) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -454,6 +454,8 @@ static void netdev_trig_work(struct work + static int netdev_trig_activate(struct led_classdev *led_cdev) + { + struct led_netdev_data *trigger_data; ++ unsigned long mode; ++ struct device *dev; + int rc; + + trigger_data = kzalloc(sizeof(struct led_netdev_data), GFP_KERNEL); +@@ -475,6 +477,21 @@ static int netdev_trig_activate(struct l + atomic_set(&trigger_data->interval, msecs_to_jiffies(NETDEV_LED_DEFAULT_INTERVAL)); + trigger_data->last_activity = 0; + ++ /* Check if hw control is active by default on the LED. ++ * Init already enabled mode in hw control. ++ */ ++ if (supports_hw_control(led_cdev) && ++ !led_cdev->hw_control_get(led_cdev, &mode)) { ++ dev = led_cdev->hw_control_get_device(led_cdev); ++ if (dev) { ++ const char *name = dev_name(dev); ++ ++ set_device_name(trigger_data, name, strlen(name)); ++ trigger_data->hw_control = true; ++ trigger_data->mode = mode; ++ } ++ } ++ + led_set_trigger_data(led_cdev, trigger_data); + + rc = register_netdevice_notifier(&trigger_data->notifier); diff --git a/target/linux/generic/backport-6.1/804-v6.5-11-leds-trigger-netdev-expose-netdev-trigger-modes-in-l.patch b/target/linux/generic/backport-6.1/804-v6.5-11-leds-trigger-netdev-expose-netdev-trigger-modes-in-l.patch new file mode 100644 index 000000000..70aed850d --- /dev/null +++ b/target/linux/generic/backport-6.1/804-v6.5-11-leds-trigger-netdev-expose-netdev-trigger-modes-in-l.patch @@ -0,0 +1,54 @@ +From 947acacab5ea151291b861cdfbde16ff5cf1b08c Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:41 +0200 +Subject: [PATCH 11/13] leds: trigger: netdev: expose netdev trigger modes in + linux include + +Expose netdev trigger modes to make them accessible by LED driver that +will support netdev trigger for hw control. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 9 --------- + include/linux/leds.h | 10 ++++++++++ + 2 files changed, 10 insertions(+), 9 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -56,15 +56,6 @@ struct led_netdev_data { + bool hw_control; + }; + +-enum led_trigger_netdev_modes { +- TRIGGER_NETDEV_LINK = 0, +- TRIGGER_NETDEV_TX, +- TRIGGER_NETDEV_RX, +- +- /* Keep last */ +- __TRIGGER_NETDEV_MAX, +-}; +- + static void set_baseline_state(struct led_netdev_data *trigger_data) + { + int current_brightness; +--- a/include/linux/leds.h ++++ b/include/linux/leds.h +@@ -527,6 +527,16 @@ static inline void *led_get_trigger_data + + #endif /* CONFIG_LEDS_TRIGGERS */ + ++/* Trigger specific enum */ ++enum led_trigger_netdev_modes { ++ TRIGGER_NETDEV_LINK = 0, ++ TRIGGER_NETDEV_TX, ++ TRIGGER_NETDEV_RX, ++ ++ /* Keep last */ ++ __TRIGGER_NETDEV_MAX, ++}; ++ + /* Trigger specific functions */ + #ifdef CONFIG_LEDS_TRIGGER_DISK + void ledtrig_disk_activity(bool write); diff --git a/target/linux/generic/backport-6.1/804-v6.5-12-net-dsa-qca8k-implement-hw_control-ops.patch b/target/linux/generic/backport-6.1/804-v6.5-12-net-dsa-qca8k-implement-hw_control-ops.patch new file mode 100644 index 000000000..ad76d89b7 --- /dev/null +++ b/target/linux/generic/backport-6.1/804-v6.5-12-net-dsa-qca8k-implement-hw_control-ops.patch @@ -0,0 +1,200 @@ +From e0256648c831af13cbfe4a1787327fcec01c2807 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 29 May 2023 18:32:42 +0200 +Subject: [PATCH 12/13] net: dsa: qca8k: implement hw_control ops + +Implement hw_control ops to drive Switch LEDs based on hardware events. + +Netdev trigger is the declared supported trigger for hw control +operation and supports the following mode: +- tx +- rx + +When hw_control_set is called, LEDs are set to follow the requested +mode. +Each LEDs will blink at 4Hz by default. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca/qca8k-leds.c | 154 +++++++++++++++++++++++++++++++ + 1 file changed, 154 insertions(+) + +--- a/drivers/net/dsa/qca/qca8k-leds.c ++++ b/drivers/net/dsa/qca/qca8k-leds.c +@@ -32,6 +32,43 @@ qca8k_get_enable_led_reg(int port_num, i + } + + static int ++qca8k_get_control_led_reg(int port_num, int led_num, struct qca8k_led_pattern_en *reg_info) ++{ ++ reg_info->reg = QCA8K_LED_CTRL_REG(led_num); ++ ++ /* 6 total control rule: ++ * 3 control rules for phy0-3 that applies to all their leds ++ * 3 control rules for phy4 ++ */ ++ if (port_num == 4) ++ reg_info->shift = QCA8K_LED_PHY4_CONTROL_RULE_SHIFT; ++ else ++ reg_info->shift = QCA8K_LED_PHY0123_CONTROL_RULE_SHIFT; ++ ++ return 0; ++} ++ ++static int ++qca8k_parse_netdev(unsigned long rules, u32 *offload_trigger) ++{ ++ /* Parsing specific to netdev trigger */ ++ if (test_bit(TRIGGER_NETDEV_TX, &rules)) ++ *offload_trigger |= QCA8K_LED_TX_BLINK_MASK; ++ if (test_bit(TRIGGER_NETDEV_RX, &rules)) ++ *offload_trigger |= QCA8K_LED_RX_BLINK_MASK; ++ ++ if (rules && !*offload_trigger) ++ return -EOPNOTSUPP; ++ ++ /* Enable some default rule by default to the requested mode: ++ * - Blink at 4Hz by default ++ */ ++ *offload_trigger |= QCA8K_LED_BLINK_4HZ; ++ ++ return 0; ++} ++ ++static int + qca8k_led_brightness_set(struct qca8k_led *led, + enum led_brightness brightness) + { +@@ -165,6 +202,119 @@ qca8k_cled_blink_set(struct led_classdev + } + + static int ++qca8k_cled_trigger_offload(struct led_classdev *ldev, bool enable) ++{ ++ struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev); ++ ++ struct qca8k_led_pattern_en reg_info; ++ struct qca8k_priv *priv = led->priv; ++ u32 mask, val = QCA8K_LED_ALWAYS_OFF; ++ ++ qca8k_get_enable_led_reg(led->port_num, led->led_num, ®_info); ++ ++ if (enable) ++ val = QCA8K_LED_RULE_CONTROLLED; ++ ++ if (led->port_num == 0 || led->port_num == 4) { ++ mask = QCA8K_LED_PATTERN_EN_MASK; ++ val <<= QCA8K_LED_PATTERN_EN_SHIFT; ++ } else { ++ mask = QCA8K_LED_PHY123_PATTERN_EN_MASK; ++ } ++ ++ return regmap_update_bits(priv->regmap, reg_info.reg, mask << reg_info.shift, ++ val << reg_info.shift); ++} ++ ++static bool ++qca8k_cled_hw_control_status(struct led_classdev *ldev) ++{ ++ struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev); ++ ++ struct qca8k_led_pattern_en reg_info; ++ struct qca8k_priv *priv = led->priv; ++ u32 val; ++ ++ qca8k_get_enable_led_reg(led->port_num, led->led_num, ®_info); ++ ++ regmap_read(priv->regmap, reg_info.reg, &val); ++ ++ val >>= reg_info.shift; ++ ++ if (led->port_num == 0 || led->port_num == 4) { ++ val &= QCA8K_LED_PATTERN_EN_MASK; ++ val >>= QCA8K_LED_PATTERN_EN_SHIFT; ++ } else { ++ val &= QCA8K_LED_PHY123_PATTERN_EN_MASK; ++ } ++ ++ return val == QCA8K_LED_RULE_CONTROLLED; ++} ++ ++static int ++qca8k_cled_hw_control_is_supported(struct led_classdev *ldev, unsigned long rules) ++{ ++ u32 offload_trigger = 0; ++ ++ return qca8k_parse_netdev(rules, &offload_trigger); ++} ++ ++static int ++qca8k_cled_hw_control_set(struct led_classdev *ldev, unsigned long rules) ++{ ++ struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev); ++ struct qca8k_led_pattern_en reg_info; ++ struct qca8k_priv *priv = led->priv; ++ u32 offload_trigger = 0; ++ int ret; ++ ++ ret = qca8k_parse_netdev(rules, &offload_trigger); ++ if (ret) ++ return ret; ++ ++ ret = qca8k_cled_trigger_offload(ldev, true); ++ if (ret) ++ return ret; ++ ++ qca8k_get_control_led_reg(led->port_num, led->led_num, ®_info); ++ ++ return regmap_update_bits(priv->regmap, reg_info.reg, ++ QCA8K_LED_RULE_MASK << reg_info.shift, ++ offload_trigger << reg_info.shift); ++} ++ ++static int ++qca8k_cled_hw_control_get(struct led_classdev *ldev, unsigned long *rules) ++{ ++ struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev); ++ struct qca8k_led_pattern_en reg_info; ++ struct qca8k_priv *priv = led->priv; ++ u32 val; ++ int ret; ++ ++ /* With hw control not active return err */ ++ if (!qca8k_cled_hw_control_status(ldev)) ++ return -EINVAL; ++ ++ qca8k_get_control_led_reg(led->port_num, led->led_num, ®_info); ++ ++ ret = regmap_read(priv->regmap, reg_info.reg, &val); ++ if (ret) ++ return ret; ++ ++ val >>= reg_info.shift; ++ val &= QCA8K_LED_RULE_MASK; ++ ++ /* Parsing specific to netdev trigger */ ++ if (val & QCA8K_LED_TX_BLINK_MASK) ++ set_bit(TRIGGER_NETDEV_TX, rules); ++ if (val & QCA8K_LED_RX_BLINK_MASK) ++ set_bit(TRIGGER_NETDEV_RX, rules); ++ ++ return 0; ++} ++ ++static int + qca8k_parse_port_leds(struct qca8k_priv *priv, struct fwnode_handle *port, int port_num) + { + struct fwnode_handle *led = NULL, *leds = NULL; +@@ -224,6 +374,10 @@ qca8k_parse_port_leds(struct qca8k_priv + port_led->cdev.max_brightness = 1; + port_led->cdev.brightness_set_blocking = qca8k_cled_brightness_set_blocking; + port_led->cdev.blink_set = qca8k_cled_blink_set; ++ port_led->cdev.hw_control_is_supported = qca8k_cled_hw_control_is_supported; ++ port_led->cdev.hw_control_set = qca8k_cled_hw_control_set; ++ port_led->cdev.hw_control_get = qca8k_cled_hw_control_get; ++ port_led->cdev.hw_control_trigger = "netdev"; + init_data.default_label = ":port"; + init_data.fwnode = led; + init_data.devname_mandatory = true; diff --git a/target/linux/generic/backport-6.1/804-v6.5-13-net-dsa-qca8k-add-op-to-get-ports-netdev.patch b/target/linux/generic/backport-6.1/804-v6.5-13-net-dsa-qca8k-add-op-to-get-ports-netdev.patch new file mode 100644 index 000000000..feb6b9e1e --- /dev/null +++ b/target/linux/generic/backport-6.1/804-v6.5-13-net-dsa-qca8k-add-op-to-get-ports-netdev.patch @@ -0,0 +1,70 @@ +From 4f53c27f772e27e4cf4e5507d6f4d5980002cb6a Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Mon, 29 May 2023 18:32:43 +0200 +Subject: [PATCH 13/13] net: dsa: qca8k: add op to get ports netdev + +In order that the LED trigger can blink the switch MAC ports LED, it +needs to know the netdev associated to the port. Add the callback to +return the struct device of the netdev. + +Add an helper function qca8k_phy_to_port() to convert the phy back to +dsa_port index, as we reference LED port based on the internal PHY +index and needs to be converted back. + +Signed-off-by: Andrew Lunn +Signed-off-by: Christian Marangi +Signed-off-by: David S. Miller +--- + drivers/net/dsa/qca/qca8k-leds.c | 27 +++++++++++++++++++++++++++ + 1 file changed, 27 insertions(+) + +--- a/drivers/net/dsa/qca/qca8k-leds.c ++++ b/drivers/net/dsa/qca/qca8k-leds.c +@@ -5,6 +5,18 @@ + #include "qca8k.h" + #include "qca8k_leds.h" + ++static u32 qca8k_phy_to_port(int phy) ++{ ++ /* Internal PHY 0 has port at index 1. ++ * Internal PHY 1 has port at index 2. ++ * Internal PHY 2 has port at index 3. ++ * Internal PHY 3 has port at index 4. ++ * Internal PHY 4 has port at index 5. ++ */ ++ ++ return phy + 1; ++} ++ + static int + qca8k_get_enable_led_reg(int port_num, int led_num, struct qca8k_led_pattern_en *reg_info) + { +@@ -314,6 +326,20 @@ qca8k_cled_hw_control_get(struct led_cla + return 0; + } + ++static struct device *qca8k_cled_hw_control_get_device(struct led_classdev *ldev) ++{ ++ struct qca8k_led *led = container_of(ldev, struct qca8k_led, cdev); ++ struct qca8k_priv *priv = led->priv; ++ struct dsa_port *dp; ++ ++ dp = dsa_to_port(priv->ds, qca8k_phy_to_port(led->port_num)); ++ if (!dp) ++ return NULL; ++ if (dp->slave) ++ return &dp->slave->dev; ++ return NULL; ++} ++ + static int + qca8k_parse_port_leds(struct qca8k_priv *priv, struct fwnode_handle *port, int port_num) + { +@@ -377,6 +403,7 @@ qca8k_parse_port_leds(struct qca8k_priv + port_led->cdev.hw_control_is_supported = qca8k_cled_hw_control_is_supported; + port_led->cdev.hw_control_set = qca8k_cled_hw_control_set; + port_led->cdev.hw_control_get = qca8k_cled_hw_control_get; ++ port_led->cdev.hw_control_get_device = qca8k_cled_hw_control_get_device; + port_led->cdev.hw_control_trigger = "netdev"; + init_data.default_label = ":port"; + init_data.fwnode = led; diff --git a/target/linux/generic/backport-6.1/805-v6.5-01-leds-trigger-netdev-add-additional-specific-link-spe.patch b/target/linux/generic/backport-6.1/805-v6.5-01-leds-trigger-netdev-add-additional-specific-link-spe.patch new file mode 100644 index 000000000..1c564b389 --- /dev/null +++ b/target/linux/generic/backport-6.1/805-v6.5-01-leds-trigger-netdev-add-additional-specific-link-spe.patch @@ -0,0 +1,242 @@ +From d5e01266e7f5fa12400d4c8aa4e86fe89dcc61e9 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 19 Jun 2023 22:46:58 +0200 +Subject: [PATCH 1/3] leds: trigger: netdev: add additional specific link speed + mode + +Add additional modes for specific link speed. Use ethtool APIs to get the +current link speed and enable the LED accordingly. Under netdev event +handler the rtnl lock is already held and is not needed to be set to +access ethtool APIs. + +This is especially useful for PHY and Switch that supports LEDs hw +control for specific link speed. (example scenario a PHY that have 2 LED +connected one green and one orange where the green is turned on with +1000mbps speed and orange is turned on with 10mpbs speed) + +On mode set from sysfs we check if we have enabled split link speed mode +and reject enabling generic link mode to prevent wrong and redundant +configuration. + +Rework logic on the set baseline state to support these new modes to +select if we need to turn on or off the LED. + +Add additional modes: +- link_10: Turn on LED when link speed is 10mbps +- link_100: Turn on LED when link speed is 100mbps +- link_1000: Turn on LED when link speed is 1000mbps + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Acked-by: Lee Jones +Signed-off-by: Jakub Kicinski +--- + drivers/leds/trigger/ledtrig-netdev.c | 80 +++++++++++++++++++++++---- + include/linux/leds.h | 3 + + 2 files changed, 73 insertions(+), 10 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -13,6 +13,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -21,6 +22,7 @@ + #include + #include + #include ++#include + #include + #include "../leds.h" + +@@ -52,6 +54,8 @@ struct led_netdev_data { + unsigned int last_activity; + + unsigned long mode; ++ int link_speed; ++ + bool carrier_link_up; + bool hw_control; + }; +@@ -77,7 +81,24 @@ static void set_baseline_state(struct le + if (!trigger_data->carrier_link_up) { + led_set_brightness(led_cdev, LED_OFF); + } else { ++ bool blink_on = false; ++ + if (test_bit(TRIGGER_NETDEV_LINK, &trigger_data->mode)) ++ blink_on = true; ++ ++ if (test_bit(TRIGGER_NETDEV_LINK_10, &trigger_data->mode) && ++ trigger_data->link_speed == SPEED_10) ++ blink_on = true; ++ ++ if (test_bit(TRIGGER_NETDEV_LINK_100, &trigger_data->mode) && ++ trigger_data->link_speed == SPEED_100) ++ blink_on = true; ++ ++ if (test_bit(TRIGGER_NETDEV_LINK_1000, &trigger_data->mode) && ++ trigger_data->link_speed == SPEED_1000) ++ blink_on = true; ++ ++ if (blink_on) + led_set_brightness(led_cdev, + led_cdev->blink_brightness); + else +@@ -161,6 +182,18 @@ static bool can_hw_control(struct led_ne + return true; + } + ++static void get_device_state(struct led_netdev_data *trigger_data) ++{ ++ struct ethtool_link_ksettings cmd; ++ ++ trigger_data->carrier_link_up = netif_carrier_ok(trigger_data->net_dev); ++ if (!trigger_data->carrier_link_up) ++ return; ++ ++ if (!__ethtool_get_link_ksettings(trigger_data->net_dev, &cmd)) ++ trigger_data->link_speed = cmd.base.speed; ++} ++ + static ssize_t device_name_show(struct device *dev, + struct device_attribute *attr, char *buf) + { +@@ -196,8 +229,12 @@ static int set_device_name(struct led_ne + dev_get_by_name(&init_net, trigger_data->device_name); + + trigger_data->carrier_link_up = false; +- if (trigger_data->net_dev != NULL) +- trigger_data->carrier_link_up = netif_carrier_ok(trigger_data->net_dev); ++ trigger_data->link_speed = SPEED_UNKNOWN; ++ if (trigger_data->net_dev != NULL) { ++ rtnl_lock(); ++ get_device_state(trigger_data); ++ rtnl_unlock(); ++ } + + trigger_data->last_activity = 0; + +@@ -234,6 +271,9 @@ static ssize_t netdev_led_attr_show(stru + + switch (attr) { + case TRIGGER_NETDEV_LINK: ++ case TRIGGER_NETDEV_LINK_10: ++ case TRIGGER_NETDEV_LINK_100: ++ case TRIGGER_NETDEV_LINK_1000: + case TRIGGER_NETDEV_TX: + case TRIGGER_NETDEV_RX: + bit = attr; +@@ -249,7 +289,7 @@ static ssize_t netdev_led_attr_store(str + size_t size, enum led_trigger_netdev_modes attr) + { + struct led_netdev_data *trigger_data = led_trigger_get_drvdata(dev); +- unsigned long state; ++ unsigned long state, mode = trigger_data->mode; + int ret; + int bit; + +@@ -259,6 +299,9 @@ static ssize_t netdev_led_attr_store(str + + switch (attr) { + case TRIGGER_NETDEV_LINK: ++ case TRIGGER_NETDEV_LINK_10: ++ case TRIGGER_NETDEV_LINK_100: ++ case TRIGGER_NETDEV_LINK_1000: + case TRIGGER_NETDEV_TX: + case TRIGGER_NETDEV_RX: + bit = attr; +@@ -267,13 +310,20 @@ static ssize_t netdev_led_attr_store(str + return -EINVAL; + } + +- cancel_delayed_work_sync(&trigger_data->work); +- + if (state) +- set_bit(bit, &trigger_data->mode); ++ set_bit(bit, &mode); + else +- clear_bit(bit, &trigger_data->mode); ++ clear_bit(bit, &mode); ++ ++ if (test_bit(TRIGGER_NETDEV_LINK, &mode) && ++ (test_bit(TRIGGER_NETDEV_LINK_10, &mode) || ++ test_bit(TRIGGER_NETDEV_LINK_100, &mode) || ++ test_bit(TRIGGER_NETDEV_LINK_1000, &mode))) ++ return -EINVAL; ++ ++ cancel_delayed_work_sync(&trigger_data->work); + ++ trigger_data->mode = mode; + trigger_data->hw_control = can_hw_control(trigger_data); + + set_baseline_state(trigger_data); +@@ -295,6 +345,9 @@ static ssize_t netdev_led_attr_store(str + static DEVICE_ATTR_RW(trigger_name) + + DEFINE_NETDEV_TRIGGER(link, TRIGGER_NETDEV_LINK); ++DEFINE_NETDEV_TRIGGER(link_10, TRIGGER_NETDEV_LINK_10); ++DEFINE_NETDEV_TRIGGER(link_100, TRIGGER_NETDEV_LINK_100); ++DEFINE_NETDEV_TRIGGER(link_1000, TRIGGER_NETDEV_LINK_1000); + DEFINE_NETDEV_TRIGGER(tx, TRIGGER_NETDEV_TX); + DEFINE_NETDEV_TRIGGER(rx, TRIGGER_NETDEV_RX); + +@@ -338,6 +391,9 @@ static DEVICE_ATTR_RW(interval); + static struct attribute *netdev_trig_attrs[] = { + &dev_attr_device_name.attr, + &dev_attr_link.attr, ++ &dev_attr_link_10.attr, ++ &dev_attr_link_100.attr, ++ &dev_attr_link_1000.attr, + &dev_attr_rx.attr, + &dev_attr_tx.attr, + &dev_attr_interval.attr, +@@ -368,9 +424,10 @@ static int netdev_trig_notify(struct not + mutex_lock(&trigger_data->lock); + + trigger_data->carrier_link_up = false; ++ trigger_data->link_speed = SPEED_UNKNOWN; + switch (evt) { + case NETDEV_CHANGENAME: +- trigger_data->carrier_link_up = netif_carrier_ok(dev); ++ get_device_state(trigger_data); + fallthrough; + case NETDEV_REGISTER: + if (trigger_data->net_dev) +@@ -384,7 +441,7 @@ static int netdev_trig_notify(struct not + break; + case NETDEV_UP: + case NETDEV_CHANGE: +- trigger_data->carrier_link_up = netif_carrier_ok(dev); ++ get_device_state(trigger_data); + break; + } + +@@ -427,7 +484,10 @@ static void netdev_trig_work(struct work + if (trigger_data->last_activity != new_activity) { + led_stop_software_blink(trigger_data->led_cdev); + +- invert = test_bit(TRIGGER_NETDEV_LINK, &trigger_data->mode); ++ invert = test_bit(TRIGGER_NETDEV_LINK, &trigger_data->mode) || ++ test_bit(TRIGGER_NETDEV_LINK_10, &trigger_data->mode) || ++ test_bit(TRIGGER_NETDEV_LINK_100, &trigger_data->mode) || ++ test_bit(TRIGGER_NETDEV_LINK_1000, &trigger_data->mode); + interval = jiffies_to_msecs( + atomic_read(&trigger_data->interval)); + /* base state is ON (link present) */ +--- a/include/linux/leds.h ++++ b/include/linux/leds.h +@@ -530,6 +530,9 @@ static inline void *led_get_trigger_data + /* Trigger specific enum */ + enum led_trigger_netdev_modes { + TRIGGER_NETDEV_LINK = 0, ++ TRIGGER_NETDEV_LINK_10, ++ TRIGGER_NETDEV_LINK_100, ++ TRIGGER_NETDEV_LINK_1000, + TRIGGER_NETDEV_TX, + TRIGGER_NETDEV_RX, + diff --git a/target/linux/generic/backport-6.1/805-v6.5-02-leds-trigger-netdev-add-additional-specific-link-dup.patch b/target/linux/generic/backport-6.1/805-v6.5-02-leds-trigger-netdev-add-additional-specific-link-dup.patch new file mode 100644 index 000000000..a5ab46182 --- /dev/null +++ b/target/linux/generic/backport-6.1/805-v6.5-02-leds-trigger-netdev-add-additional-specific-link-dup.patch @@ -0,0 +1,138 @@ +From f22f95b9ff1551c9bab13104131929f33d51f23f Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 19 Jun 2023 22:46:59 +0200 +Subject: [PATCH 2/3] leds: trigger: netdev: add additional specific link + duplex mode + +Add additional modes for specific link duplex. Use ethtool APIs to get the +current link duplex and enable the LED accordingly. Under netdev event +handler the rtnl lock is already held and is not needed to be set to +access ethtool APIs. + +This is especially useful for PHY and Switch that supports LEDs hw +control for specific link duplex. + +Add additional modes: +- half_duplex: Turn on LED when link is half duplex +- full_duplex: Turn on LED when link is full duplex + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Acked-by: Lee Jones +Signed-off-by: Jakub Kicinski +--- + drivers/leds/trigger/ledtrig-netdev.c | 27 +++++++++++++++++++++++++-- + include/linux/leds.h | 2 ++ + 2 files changed, 27 insertions(+), 2 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -55,6 +55,7 @@ struct led_netdev_data { + + unsigned long mode; + int link_speed; ++ u8 duplex; + + bool carrier_link_up; + bool hw_control; +@@ -98,6 +99,14 @@ static void set_baseline_state(struct le + trigger_data->link_speed == SPEED_1000) + blink_on = true; + ++ if (test_bit(TRIGGER_NETDEV_HALF_DUPLEX, &trigger_data->mode) && ++ trigger_data->duplex == DUPLEX_HALF) ++ blink_on = true; ++ ++ if (test_bit(TRIGGER_NETDEV_FULL_DUPLEX, &trigger_data->mode) && ++ trigger_data->duplex == DUPLEX_FULL) ++ blink_on = true; ++ + if (blink_on) + led_set_brightness(led_cdev, + led_cdev->blink_brightness); +@@ -190,8 +199,10 @@ static void get_device_state(struct led_ + if (!trigger_data->carrier_link_up) + return; + +- if (!__ethtool_get_link_ksettings(trigger_data->net_dev, &cmd)) ++ if (!__ethtool_get_link_ksettings(trigger_data->net_dev, &cmd)) { + trigger_data->link_speed = cmd.base.speed; ++ trigger_data->duplex = cmd.base.duplex; ++ } + } + + static ssize_t device_name_show(struct device *dev, +@@ -230,6 +241,7 @@ static int set_device_name(struct led_ne + + trigger_data->carrier_link_up = false; + trigger_data->link_speed = SPEED_UNKNOWN; ++ trigger_data->duplex = DUPLEX_UNKNOWN; + if (trigger_data->net_dev != NULL) { + rtnl_lock(); + get_device_state(trigger_data); +@@ -274,6 +286,8 @@ static ssize_t netdev_led_attr_show(stru + case TRIGGER_NETDEV_LINK_10: + case TRIGGER_NETDEV_LINK_100: + case TRIGGER_NETDEV_LINK_1000: ++ case TRIGGER_NETDEV_HALF_DUPLEX: ++ case TRIGGER_NETDEV_FULL_DUPLEX: + case TRIGGER_NETDEV_TX: + case TRIGGER_NETDEV_RX: + bit = attr; +@@ -302,6 +316,8 @@ static ssize_t netdev_led_attr_store(str + case TRIGGER_NETDEV_LINK_10: + case TRIGGER_NETDEV_LINK_100: + case TRIGGER_NETDEV_LINK_1000: ++ case TRIGGER_NETDEV_HALF_DUPLEX: ++ case TRIGGER_NETDEV_FULL_DUPLEX: + case TRIGGER_NETDEV_TX: + case TRIGGER_NETDEV_RX: + bit = attr; +@@ -348,6 +364,8 @@ DEFINE_NETDEV_TRIGGER(link, TRIGGER_NETD + DEFINE_NETDEV_TRIGGER(link_10, TRIGGER_NETDEV_LINK_10); + DEFINE_NETDEV_TRIGGER(link_100, TRIGGER_NETDEV_LINK_100); + DEFINE_NETDEV_TRIGGER(link_1000, TRIGGER_NETDEV_LINK_1000); ++DEFINE_NETDEV_TRIGGER(half_duplex, TRIGGER_NETDEV_HALF_DUPLEX); ++DEFINE_NETDEV_TRIGGER(full_duplex, TRIGGER_NETDEV_FULL_DUPLEX); + DEFINE_NETDEV_TRIGGER(tx, TRIGGER_NETDEV_TX); + DEFINE_NETDEV_TRIGGER(rx, TRIGGER_NETDEV_RX); + +@@ -394,6 +412,8 @@ static struct attribute *netdev_trig_att + &dev_attr_link_10.attr, + &dev_attr_link_100.attr, + &dev_attr_link_1000.attr, ++ &dev_attr_full_duplex.attr, ++ &dev_attr_half_duplex.attr, + &dev_attr_rx.attr, + &dev_attr_tx.attr, + &dev_attr_interval.attr, +@@ -425,6 +445,7 @@ static int netdev_trig_notify(struct not + + trigger_data->carrier_link_up = false; + trigger_data->link_speed = SPEED_UNKNOWN; ++ trigger_data->duplex = DUPLEX_UNKNOWN; + switch (evt) { + case NETDEV_CHANGENAME: + get_device_state(trigger_data); +@@ -487,7 +508,9 @@ static void netdev_trig_work(struct work + invert = test_bit(TRIGGER_NETDEV_LINK, &trigger_data->mode) || + test_bit(TRIGGER_NETDEV_LINK_10, &trigger_data->mode) || + test_bit(TRIGGER_NETDEV_LINK_100, &trigger_data->mode) || +- test_bit(TRIGGER_NETDEV_LINK_1000, &trigger_data->mode); ++ test_bit(TRIGGER_NETDEV_LINK_1000, &trigger_data->mode) || ++ test_bit(TRIGGER_NETDEV_HALF_DUPLEX, &trigger_data->mode) || ++ test_bit(TRIGGER_NETDEV_FULL_DUPLEX, &trigger_data->mode); + interval = jiffies_to_msecs( + atomic_read(&trigger_data->interval)); + /* base state is ON (link present) */ +--- a/include/linux/leds.h ++++ b/include/linux/leds.h +@@ -533,6 +533,8 @@ enum led_trigger_netdev_modes { + TRIGGER_NETDEV_LINK_10, + TRIGGER_NETDEV_LINK_100, + TRIGGER_NETDEV_LINK_1000, ++ TRIGGER_NETDEV_HALF_DUPLEX, ++ TRIGGER_NETDEV_FULL_DUPLEX, + TRIGGER_NETDEV_TX, + TRIGGER_NETDEV_RX, + diff --git a/target/linux/generic/backport-6.1/805-v6.5-03-leds-trigger-netdev-expose-hw_control-status-via-sys.patch b/target/linux/generic/backport-6.1/805-v6.5-03-leds-trigger-netdev-expose-hw_control-status-via-sys.patch new file mode 100644 index 000000000..67528cafe --- /dev/null +++ b/target/linux/generic/backport-6.1/805-v6.5-03-leds-trigger-netdev-expose-hw_control-status-via-sys.patch @@ -0,0 +1,45 @@ +From b655892ffd6d89b0c7407e099c40dbde82ee3f03 Mon Sep 17 00:00:00 2001 +From: Christian Marangi +Date: Mon, 19 Jun 2023 22:47:00 +0200 +Subject: [PATCH 3/3] leds: trigger: netdev: expose hw_control status via sysfs + +Expose hw_control status via sysfs for the netdev trigger to give +userspace better understanding of the current state of the trigger and +the LED. + +Signed-off-by: Christian Marangi +Reviewed-by: Andrew Lunn +Reviewed-by: Kalesh AP +Acked-by: Lee Jones +Signed-off-by: Jakub Kicinski +--- + drivers/leds/trigger/ledtrig-netdev.c | 11 +++++++++++ + 1 file changed, 11 insertions(+) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -406,6 +406,16 @@ static ssize_t interval_store(struct dev + + static DEVICE_ATTR_RW(interval); + ++static ssize_t hw_control_show(struct device *dev, ++ struct device_attribute *attr, char *buf) ++{ ++ struct led_netdev_data *trigger_data = led_trigger_get_drvdata(dev); ++ ++ return sprintf(buf, "%d\n", trigger_data->hw_control); ++} ++ ++static DEVICE_ATTR_RO(hw_control); ++ + static struct attribute *netdev_trig_attrs[] = { + &dev_attr_device_name.attr, + &dev_attr_link.attr, +@@ -417,6 +427,7 @@ static struct attribute *netdev_trig_att + &dev_attr_rx.attr, + &dev_attr_tx.attr, + &dev_attr_interval.attr, ++ &dev_attr_hw_control.attr, + NULL + }; + ATTRIBUTE_GROUPS(netdev_trig); diff --git a/target/linux/generic/backport-6.1/820-v6.4-net-phy-fix-circular-LEDS_CLASS-dependencies.patch b/target/linux/generic/backport-6.1/820-v6.4-net-phy-fix-circular-LEDS_CLASS-dependencies.patch new file mode 100644 index 000000000..1de086417 --- /dev/null +++ b/target/linux/generic/backport-6.1/820-v6.4-net-phy-fix-circular-LEDS_CLASS-dependencies.patch @@ -0,0 +1,65 @@ +From 4bb7aac70b5d8a4bddf4ee0791b834f9f56883d2 Mon Sep 17 00:00:00 2001 +From: Arnd Bergmann +Date: Thu, 20 Apr 2023 10:45:51 +0200 +Subject: [PATCH] net: phy: fix circular LEDS_CLASS dependencies + +The CONFIG_PHYLIB symbol is selected by a number of device drivers that +need PHY support, but it now has a dependency on CONFIG_LEDS_CLASS, +which may not be enabled, causing build failures. + +Avoid the risk of missing and circular dependencies by guarding the +phylib LED support itself in another Kconfig symbol that can only be +enabled if the dependency is met. + +This could be made a hidden symbol and always enabled when both CONFIG_OF +and CONFIG_LEDS_CLASS are reachable from the phylib, but there may be an +advantage in having users see this option when they have a misconfigured +kernel without built-in LED support. + +Fixes: 01e5b728e9e4 ("net: phy: Add a binding for PHY LEDs") +Signed-off-by: Arnd Bergmann +Reviewed-by: Andrew Lunn +Link: https://lore.kernel.org/r/20230420084624.3005701-1-arnd@kernel.org +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/Kconfig | 9 ++++++++- + drivers/net/phy/phy_device.c | 3 ++- + 2 files changed, 10 insertions(+), 2 deletions(-) + +--- a/drivers/net/phy/Kconfig ++++ b/drivers/net/phy/Kconfig +@@ -18,7 +18,6 @@ menuconfig PHYLIB + depends on NETDEVICES + select MDIO_DEVICE + select MDIO_DEVRES +- depends on LEDS_CLASS || LEDS_CLASS=n + help + Ethernet controllers are usually attached to PHY + devices. This option provides infrastructure for +@@ -45,6 +44,14 @@ config LED_TRIGGER_PHY + Mbps OR Gbps OR link + for any speed known to the PHY. + ++config PHYLIB_LEDS ++ bool "Support probing LEDs from device tree" ++ depends on LEDS_CLASS=y || LEDS_CLASS=PHYLIB ++ depends on OF ++ default y ++ help ++ When LED class support is enabled, phylib can automatically ++ probe LED setting from device tree. + + config FIXED_PHY + tristate "MDIO Bus/PHY emulation with fixed speed/link PHYs" +--- a/drivers/net/phy/phy_device.c ++++ b/drivers/net/phy/phy_device.c +@@ -3210,7 +3210,8 @@ static int phy_probe(struct device *dev) + /* Get the LEDs from the device tree, and instantiate standard + * LEDs for them. + */ +- err = of_phy_leds(phydev); ++ if (IS_ENABLED(CONFIG_PHYLIB_LEDS)) ++ err = of_phy_leds(phydev); + + out: + /* Re-assert the reset signal on error */ diff --git a/target/linux/generic/backport-6.1/821-v6.4-net-phy-Fix-reading-LED-reg-property.patch b/target/linux/generic/backport-6.1/821-v6.4-net-phy-Fix-reading-LED-reg-property.patch new file mode 100644 index 000000000..d6081d0e6 --- /dev/null +++ b/target/linux/generic/backport-6.1/821-v6.4-net-phy-Fix-reading-LED-reg-property.patch @@ -0,0 +1,43 @@ +From aed8fdad2152d946add50bec00a6b07c457bdcdf Mon Sep 17 00:00:00 2001 +From: Alexander Stein +Date: Mon, 24 Apr 2023 16:16:48 +0200 +Subject: [PATCH] net: phy: Fix reading LED reg property + +'reg' is always encoded in 32 bits, thus it has to be read using the +function with the corresponding bit width. + +Fixes: 01e5b728e9e4 ("net: phy: Add a binding for PHY LEDs") +Signed-off-by: Alexander Stein +Reviewed-by: Andrew Lunn +Reviewed-by: Florian Fainelli +Link: https://lore.kernel.org/r/20230424141648.317944-1-alexander.stein@ew.tq-group.com +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/phy_device.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/drivers/net/phy/phy_device.c ++++ b/drivers/net/phy/phy_device.c +@@ -2971,6 +2971,7 @@ static int of_phy_led(struct phy_device + struct led_init_data init_data = {}; + struct led_classdev *cdev; + struct phy_led *phyled; ++ u32 index; + int err; + + phyled = devm_kzalloc(dev, sizeof(*phyled), GFP_KERNEL); +@@ -2980,10 +2981,13 @@ static int of_phy_led(struct phy_device + cdev = &phyled->led_cdev; + phyled->phydev = phydev; + +- err = of_property_read_u8(led, "reg", &phyled->index); ++ err = of_property_read_u32(led, "reg", &index); + if (err) + return err; ++ if (index > U8_MAX) ++ return -EINVAL; + ++ phyled->index = index; + if (phydev->drv->led_brightness_set) + cdev->brightness_set_blocking = phy_led_set_brightness; + if (phydev->drv->led_blink_set) diff --git a/target/linux/generic/backport-6.1/822-v6.4-net-phy-Manual-remove-LEDs-to-ensure-correct-orderin.patch b/target/linux/generic/backport-6.1/822-v6.4-net-phy-Manual-remove-LEDs-to-ensure-correct-orderin.patch new file mode 100644 index 000000000..8f076be64 --- /dev/null +++ b/target/linux/generic/backport-6.1/822-v6.4-net-phy-Manual-remove-LEDs-to-ensure-correct-orderin.patch @@ -0,0 +1,67 @@ +From c938ab4da0eb1620ae3243b0b24c572ddfc318fc Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Sat, 17 Jun 2023 17:55:00 +0200 +Subject: [PATCH] net: phy: Manual remove LEDs to ensure correct ordering + +If the core is left to remove the LEDs via devm_, it is performed too +late, after the PHY driver is removed from the PHY. This results in +dereferencing a NULL pointer when the LED core tries to turn the LED +off before destroying the LED. + +Manually unregister the LEDs at a safe point in phy_remove. + +Cc: stable@vger.kernel.org +Reported-by: Florian Fainelli +Suggested-by: Florian Fainelli +Fixes: 01e5b728e9e4 ("net: phy: Add a binding for PHY LEDs") +Signed-off-by: Andrew Lunn +Signed-off-by: David S. Miller +--- + drivers/net/phy/phy_device.c | 15 ++++++++++++++- + 1 file changed, 14 insertions(+), 1 deletion(-) + +--- a/drivers/net/phy/phy_device.c ++++ b/drivers/net/phy/phy_device.c +@@ -2964,6 +2964,15 @@ static int phy_led_blink_set(struct led_ + return err; + } + ++static void phy_leds_unregister(struct phy_device *phydev) ++{ ++ struct phy_led *phyled; ++ ++ list_for_each_entry(phyled, &phydev->leds, list) { ++ led_classdev_unregister(&phyled->led_cdev); ++ } ++} ++ + static int of_phy_led(struct phy_device *phydev, + struct device_node *led) + { +@@ -2997,7 +3006,7 @@ static int of_phy_led(struct phy_device + init_data.fwnode = of_fwnode_handle(led); + init_data.devname_mandatory = true; + +- err = devm_led_classdev_register_ext(dev, cdev, &init_data); ++ err = led_classdev_register_ext(dev, cdev, &init_data); + if (err) + return err; + +@@ -3026,6 +3035,7 @@ static int of_phy_leds(struct phy_device + err = of_phy_led(phydev, led); + if (err) { + of_node_put(led); ++ phy_leds_unregister(phydev); + return err; + } + } +@@ -3231,6 +3241,9 @@ static int phy_remove(struct device *dev + + cancel_delayed_work_sync(&phydev->state_queue); + ++ if (IS_ENABLED(CONFIG_PHYLIB_LEDS)) ++ phy_leds_unregister(phydev); ++ + phydev->state = PHY_DOWN; + + sfp_bus_del_upstream(phydev->sfp_bus); diff --git a/target/linux/generic/backport-6.1/824-v6.5-leds-trigger-netdev-Remove-NULL-check-before-dev_-pu.patch b/target/linux/generic/backport-6.1/824-v6.5-leds-trigger-netdev-Remove-NULL-check-before-dev_-pu.patch new file mode 100644 index 000000000..609115b04 --- /dev/null +++ b/target/linux/generic/backport-6.1/824-v6.5-leds-trigger-netdev-Remove-NULL-check-before-dev_-pu.patch @@ -0,0 +1,44 @@ +From af7320ecae0ce646fd2c4a88341a3fbc243553da Mon Sep 17 00:00:00 2001 +From: Yang Li +Date: Thu, 11 May 2023 15:08:20 +0800 +Subject: [PATCH] leds: trigger: netdev: Remove NULL check before dev_{put, + hold} + +The call netdev_{put, hold} of dev_{put, hold} will check NULL, +so there is no need to check before using dev_{put, hold}, +remove it to silence the warnings: + +./drivers/leds/trigger/ledtrig-netdev.c:291:3-10: WARNING: NULL check before dev_{put, hold} functions is not needed. +./drivers/leds/trigger/ledtrig-netdev.c:401:2-9: WARNING: NULL check before dev_{put, hold} functions is not needed. + +Reported-by: Abaci Robot +Closes: https://bugzilla.openanolis.cn/show_bug.cgi?id=4929 +Signed-off-by: Yang Li +Link: https://lore.kernel.org/r/20230511070820.52731-1-yang.lee@linux.alibaba.com +Signed-off-by: Lee Jones +--- + drivers/leds/trigger/ledtrig-netdev.c | 6 ++---- + 1 file changed, 2 insertions(+), 4 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -462,8 +462,7 @@ static int netdev_trig_notify(struct not + get_device_state(trigger_data); + fallthrough; + case NETDEV_REGISTER: +- if (trigger_data->net_dev) +- dev_put(trigger_data->net_dev); ++ dev_put(trigger_data->net_dev); + dev_hold(dev); + trigger_data->net_dev = dev; + break; +@@ -594,8 +593,7 @@ static void netdev_trig_deactivate(struc + + cancel_delayed_work_sync(&trigger_data->work); + +- if (trigger_data->net_dev) +- dev_put(trigger_data->net_dev); ++ dev_put(trigger_data->net_dev); + + kfree(trigger_data); + } diff --git a/target/linux/generic/backport-6.1/825-v6.5-leds-trigger-netdev-uninitialized-variable-in-netdev.patch b/target/linux/generic/backport-6.1/825-v6.5-leds-trigger-netdev-uninitialized-variable-in-netdev.patch new file mode 100644 index 000000000..2f7a6ced9 --- /dev/null +++ b/target/linux/generic/backport-6.1/825-v6.5-leds-trigger-netdev-uninitialized-variable-in-netdev.patch @@ -0,0 +1,31 @@ +From 97c5209b3d374a25ebdb4c2ea9e9c1b121768da0 Mon Sep 17 00:00:00 2001 +From: Dan Carpenter +Date: Wed, 14 Jun 2023 10:03:59 +0300 +Subject: [PATCH] leds: trigger: netdev: uninitialized variable in + netdev_trig_activate() + +The qca8k_cled_hw_control_get() function which implements ->hw_control_get +sets the appropriate bits but does not clear them. This leads to an +uninitialized variable bug. Fix this by setting mode to zero at the +start. + +Fixes: e0256648c831 ("net: dsa: qca8k: implement hw_control ops") +Signed-off-by: Dan Carpenter +Reviewed-by: Andrew Lunn +Acked-by: Lee Jones +Signed-off-by: David S. Miller +--- + drivers/leds/trigger/ledtrig-netdev.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -538,7 +538,7 @@ static void netdev_trig_work(struct work + static int netdev_trig_activate(struct led_classdev *led_cdev) + { + struct led_netdev_data *trigger_data; +- unsigned long mode; ++ unsigned long mode = 0; + struct device *dev; + int rc; + diff --git a/target/linux/generic/backport-6.1/826-v6.6-01-led-trig-netdev-Fix-requesting-offload-device.patch b/target/linux/generic/backport-6.1/826-v6.6-01-led-trig-netdev-Fix-requesting-offload-device.patch new file mode 100644 index 000000000..dedf84c64 --- /dev/null +++ b/target/linux/generic/backport-6.1/826-v6.6-01-led-trig-netdev-Fix-requesting-offload-device.patch @@ -0,0 +1,57 @@ +From 7df1f14c04cbb1950e79c19793420f87227c3e80 Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Tue, 8 Aug 2023 23:04:33 +0200 +Subject: [PATCH 1/4] led: trig: netdev: Fix requesting offload device + +When the netdev trigger is activates, it tries to determine what +device the LED blinks for, and what the current blink mode is. + +The documentation for hw_control_get() says: + + * Return 0 on success, a negative error number on failing parsing the + * initial mode. Error from this function is NOT FATAL as the device + * may be in a not supported initial state by the attached LED trigger. + */ + +For the Marvell PHY and the Armada 370-rd board, the initial LED blink +mode is not supported by the trigger, so it returns an error. This +resulted in not getting the device the LED is blinking for. As a +result, the device is unknown and offloaded is never performed. + +Change to condition to always get the device if offloading is +supported, and reduce the scope of testing for an error from +hw_control_get() to skip setting trigger internal state if there is an +error. + +Reviewed-by: Simon Horman +Signed-off-by: Andrew Lunn +Tested-by: Daniel Golle +Link: https://lore.kernel.org/r/20230808210436.838995-2-andrew@lunn.ch +Signed-off-by: Jakub Kicinski +--- + drivers/leds/trigger/ledtrig-netdev.c | 8 +++++--- + 1 file changed, 5 insertions(+), 3 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -564,15 +564,17 @@ static int netdev_trig_activate(struct l + /* Check if hw control is active by default on the LED. + * Init already enabled mode in hw control. + */ +- if (supports_hw_control(led_cdev) && +- !led_cdev->hw_control_get(led_cdev, &mode)) { ++ if (supports_hw_control(led_cdev)) { + dev = led_cdev->hw_control_get_device(led_cdev); + if (dev) { + const char *name = dev_name(dev); + + set_device_name(trigger_data, name, strlen(name)); + trigger_data->hw_control = true; +- trigger_data->mode = mode; ++ ++ rc = led_cdev->hw_control_get(led_cdev, &mode); ++ if (!rc) ++ trigger_data->mode = mode; + } + } + diff --git a/target/linux/generic/backport-6.1/826-v6.6-02-net-phy-phy_device-Call-into-the-PHY-driver-to-set-L.patch b/target/linux/generic/backport-6.1/826-v6.6-02-net-phy-phy_device-Call-into-the-PHY-driver-to-set-L.patch new file mode 100644 index 000000000..6cd798fc5 --- /dev/null +++ b/target/linux/generic/backport-6.1/826-v6.6-02-net-phy-phy_device-Call-into-the-PHY-driver-to-set-L.patch @@ -0,0 +1,149 @@ +From 1dcc03c9a7a824a31eaaecdfaa03542fb25feb6c Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Tue, 8 Aug 2023 23:04:34 +0200 +Subject: [PATCH 2/4] net: phy: phy_device: Call into the PHY driver to set LED + offload + +Linux LEDs can be requested to perform hardware accelerated blinking +to indicate link, RX, TX etc. Pass the rules for blinking to the PHY +driver, if it implements the ops needed to determine if a given +pattern can be offloaded, to offload it, and what the current offload +is. Additionally implement the op needed to get what device the LED is +for. + +Reviewed-by: Simon Horman +Signed-off-by: Andrew Lunn +Tested-by: Daniel Golle +Link: https://lore.kernel.org/r/20230808210436.838995-3-andrew@lunn.ch +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/phy_device.c | 68 ++++++++++++++++++++++++++++++++++++ + include/linux/phy.h | 33 +++++++++++++++++ + 2 files changed, 101 insertions(+) + +--- a/drivers/net/phy/phy_device.c ++++ b/drivers/net/phy/phy_device.c +@@ -2964,6 +2964,61 @@ static int phy_led_blink_set(struct led_ + return err; + } + ++static __maybe_unused struct device * ++phy_led_hw_control_get_device(struct led_classdev *led_cdev) ++{ ++ struct phy_led *phyled = to_phy_led(led_cdev); ++ struct phy_device *phydev = phyled->phydev; ++ ++ if (phydev->attached_dev) ++ return &phydev->attached_dev->dev; ++ return NULL; ++} ++ ++static int __maybe_unused ++phy_led_hw_control_get(struct led_classdev *led_cdev, ++ unsigned long *rules) ++{ ++ struct phy_led *phyled = to_phy_led(led_cdev); ++ struct phy_device *phydev = phyled->phydev; ++ int err; ++ ++ mutex_lock(&phydev->lock); ++ err = phydev->drv->led_hw_control_get(phydev, phyled->index, rules); ++ mutex_unlock(&phydev->lock); ++ ++ return err; ++} ++ ++static int __maybe_unused ++phy_led_hw_control_set(struct led_classdev *led_cdev, ++ unsigned long rules) ++{ ++ struct phy_led *phyled = to_phy_led(led_cdev); ++ struct phy_device *phydev = phyled->phydev; ++ int err; ++ ++ mutex_lock(&phydev->lock); ++ err = phydev->drv->led_hw_control_set(phydev, phyled->index, rules); ++ mutex_unlock(&phydev->lock); ++ ++ return err; ++} ++ ++static __maybe_unused int phy_led_hw_is_supported(struct led_classdev *led_cdev, ++ unsigned long rules) ++{ ++ struct phy_led *phyled = to_phy_led(led_cdev); ++ struct phy_device *phydev = phyled->phydev; ++ int err; ++ ++ mutex_lock(&phydev->lock); ++ err = phydev->drv->led_hw_is_supported(phydev, phyled->index, rules); ++ mutex_unlock(&phydev->lock); ++ ++ return err; ++} ++ + static void phy_leds_unregister(struct phy_device *phydev) + { + struct phy_led *phyled; +@@ -3001,6 +3056,19 @@ static int of_phy_led(struct phy_device + cdev->brightness_set_blocking = phy_led_set_brightness; + if (phydev->drv->led_blink_set) + cdev->blink_set = phy_led_blink_set; ++ ++#ifdef CONFIG_LEDS_TRIGGERS ++ if (phydev->drv->led_hw_is_supported && ++ phydev->drv->led_hw_control_set && ++ phydev->drv->led_hw_control_get) { ++ cdev->hw_control_is_supported = phy_led_hw_is_supported; ++ cdev->hw_control_set = phy_led_hw_control_set; ++ cdev->hw_control_get = phy_led_hw_control_get; ++ cdev->hw_control_trigger = "netdev"; ++ } ++ ++ cdev->hw_control_get_device = phy_led_hw_control_get_device; ++#endif + cdev->max_brightness = 1; + init_data.devicename = dev_name(&phydev->mdio.dev); + init_data.fwnode = of_fwnode_handle(led); +--- a/include/linux/phy.h ++++ b/include/linux/phy.h +@@ -1013,6 +1013,39 @@ struct phy_driver { + int (*led_blink_set)(struct phy_device *dev, u8 index, + unsigned long *delay_on, + unsigned long *delay_off); ++ /** ++ * @led_hw_is_supported: Can the HW support the given rules. ++ * @dev: PHY device which has the LED ++ * @index: Which LED of the PHY device ++ * @rules The core is interested in these rules ++ * ++ * Return 0 if yes, -EOPNOTSUPP if not, or an error code. ++ */ ++ int (*led_hw_is_supported)(struct phy_device *dev, u8 index, ++ unsigned long rules); ++ /** ++ * @led_hw_control_set: Set the HW to control the LED ++ * @dev: PHY device which has the LED ++ * @index: Which LED of the PHY device ++ * @rules The rules used to control the LED ++ * ++ * Returns 0, or a an error code. ++ */ ++ int (*led_hw_control_set)(struct phy_device *dev, u8 index, ++ unsigned long rules); ++ /** ++ * @led_hw_control_get: Get how the HW is controlling the LED ++ * @dev: PHY device which has the LED ++ * @index: Which LED of the PHY device ++ * @rules Pointer to the rules used to control the LED ++ * ++ * Set *@rules to how the HW is currently blinking. Returns 0 ++ * on success, or a error code if the current blinking cannot ++ * be represented in rules, or some other error happens. ++ */ ++ int (*led_hw_control_get)(struct phy_device *dev, u8 index, ++ unsigned long *rules); ++ + }; + #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \ + struct phy_driver, mdiodrv) diff --git a/target/linux/generic/backport-6.1/826-v6.6-03-net-phy-marvell-Add-support-for-offloading-LED-blink.patch b/target/linux/generic/backport-6.1/826-v6.6-03-net-phy-marvell-Add-support-for-offloading-LED-blink.patch new file mode 100644 index 000000000..1300583b6 --- /dev/null +++ b/target/linux/generic/backport-6.1/826-v6.6-03-net-phy-marvell-Add-support-for-offloading-LED-blink.patch @@ -0,0 +1,344 @@ +From 460b0b648fab24f576c481424e0de5479ffb9786 Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Tue, 8 Aug 2023 23:04:35 +0200 +Subject: [PATCH 3/4] net: phy: marvell: Add support for offloading LED + blinking + +Add the code needed to indicate if a given blinking pattern can be +offloaded, to offload a pattern and to try to return the current +pattern. + +Reviewed-by: Simon Horman +Signed-off-by: Andrew Lunn +Tested-by: Daniel Golle +Link: https://lore.kernel.org/r/20230808210436.838995-4-andrew@lunn.ch +Signed-off-by: Jakub Kicinski +--- + drivers/net/phy/marvell.c | 281 ++++++++++++++++++++++++++++++++++++++ + 1 file changed, 281 insertions(+) + +--- a/drivers/net/phy/marvell.c ++++ b/drivers/net/phy/marvell.c +@@ -2893,6 +2893,272 @@ static int m88e1318_led_blink_set(struct + MII_88E1318S_PHY_LED_FUNC, reg); + } + ++struct marvell_led_rules { ++ int mode; ++ unsigned long rules; ++}; ++ ++static const struct marvell_led_rules marvell_led0[] = { ++ { ++ .mode = 0, ++ .rules = BIT(TRIGGER_NETDEV_LINK), ++ }, ++ { ++ .mode = 1, ++ .rules = (BIT(TRIGGER_NETDEV_LINK) | ++ BIT(TRIGGER_NETDEV_RX) | ++ BIT(TRIGGER_NETDEV_TX)), ++ }, ++ { ++ .mode = 3, ++ .rules = (BIT(TRIGGER_NETDEV_RX) | ++ BIT(TRIGGER_NETDEV_TX)), ++ }, ++ { ++ .mode = 4, ++ .rules = (BIT(TRIGGER_NETDEV_RX) | ++ BIT(TRIGGER_NETDEV_TX)), ++ }, ++ { ++ .mode = 5, ++ .rules = BIT(TRIGGER_NETDEV_TX), ++ }, ++ { ++ .mode = 6, ++ .rules = BIT(TRIGGER_NETDEV_LINK), ++ }, ++ { ++ .mode = 7, ++ .rules = BIT(TRIGGER_NETDEV_LINK_1000), ++ }, ++ { ++ .mode = 8, ++ .rules = 0, ++ }, ++}; ++ ++static const struct marvell_led_rules marvell_led1[] = { ++ { ++ .mode = 1, ++ .rules = (BIT(TRIGGER_NETDEV_LINK) | ++ BIT(TRIGGER_NETDEV_RX) | ++ BIT(TRIGGER_NETDEV_TX)), ++ }, ++ { ++ .mode = 2, ++ .rules = (BIT(TRIGGER_NETDEV_LINK) | ++ BIT(TRIGGER_NETDEV_RX)), ++ }, ++ { ++ .mode = 3, ++ .rules = (BIT(TRIGGER_NETDEV_RX) | ++ BIT(TRIGGER_NETDEV_TX)), ++ }, ++ { ++ .mode = 4, ++ .rules = (BIT(TRIGGER_NETDEV_RX) | ++ BIT(TRIGGER_NETDEV_TX)), ++ }, ++ { ++ .mode = 6, ++ .rules = (BIT(TRIGGER_NETDEV_LINK_100) | ++ BIT(TRIGGER_NETDEV_LINK_1000)), ++ }, ++ { ++ .mode = 7, ++ .rules = BIT(TRIGGER_NETDEV_LINK_100), ++ }, ++ { ++ .mode = 8, ++ .rules = 0, ++ }, ++}; ++ ++static const struct marvell_led_rules marvell_led2[] = { ++ { ++ .mode = 0, ++ .rules = BIT(TRIGGER_NETDEV_LINK), ++ }, ++ { ++ .mode = 1, ++ .rules = (BIT(TRIGGER_NETDEV_LINK) | ++ BIT(TRIGGER_NETDEV_RX) | ++ BIT(TRIGGER_NETDEV_TX)), ++ }, ++ { ++ .mode = 3, ++ .rules = (BIT(TRIGGER_NETDEV_RX) | ++ BIT(TRIGGER_NETDEV_TX)), ++ }, ++ { ++ .mode = 4, ++ .rules = (BIT(TRIGGER_NETDEV_RX) | ++ BIT(TRIGGER_NETDEV_TX)), ++ }, ++ { ++ .mode = 5, ++ .rules = BIT(TRIGGER_NETDEV_TX), ++ }, ++ { ++ .mode = 6, ++ .rules = (BIT(TRIGGER_NETDEV_LINK_10) | ++ BIT(TRIGGER_NETDEV_LINK_1000)), ++ }, ++ { ++ .mode = 7, ++ .rules = BIT(TRIGGER_NETDEV_LINK_10), ++ }, ++ { ++ .mode = 8, ++ .rules = 0, ++ }, ++}; ++ ++static int marvell_find_led_mode(unsigned long rules, ++ const struct marvell_led_rules *marvell_rules, ++ int count, ++ int *mode) ++{ ++ int i; ++ ++ for (i = 0; i < count; i++) { ++ if (marvell_rules[i].rules == rules) { ++ *mode = marvell_rules[i].mode; ++ return 0; ++ } ++ } ++ return -EOPNOTSUPP; ++} ++ ++static int marvell_get_led_mode(u8 index, unsigned long rules, int *mode) ++{ ++ int ret; ++ ++ switch (index) { ++ case 0: ++ ret = marvell_find_led_mode(rules, marvell_led0, ++ ARRAY_SIZE(marvell_led0), mode); ++ break; ++ case 1: ++ ret = marvell_find_led_mode(rules, marvell_led1, ++ ARRAY_SIZE(marvell_led1), mode); ++ break; ++ case 2: ++ ret = marvell_find_led_mode(rules, marvell_led2, ++ ARRAY_SIZE(marvell_led2), mode); ++ break; ++ default: ++ ret = -EINVAL; ++ } ++ ++ return ret; ++} ++ ++static int marvell_find_led_rules(unsigned long *rules, ++ const struct marvell_led_rules *marvell_rules, ++ int count, ++ int mode) ++{ ++ int i; ++ ++ for (i = 0; i < count; i++) { ++ if (marvell_rules[i].mode == mode) { ++ *rules = marvell_rules[i].rules; ++ return 0; ++ } ++ } ++ return -EOPNOTSUPP; ++} ++ ++static int marvell_get_led_rules(u8 index, unsigned long *rules, int mode) ++{ ++ int ret; ++ ++ switch (index) { ++ case 0: ++ ret = marvell_find_led_rules(rules, marvell_led0, ++ ARRAY_SIZE(marvell_led0), mode); ++ break; ++ case 1: ++ ret = marvell_find_led_rules(rules, marvell_led1, ++ ARRAY_SIZE(marvell_led1), mode); ++ break; ++ case 2: ++ ret = marvell_find_led_rules(rules, marvell_led2, ++ ARRAY_SIZE(marvell_led2), mode); ++ break; ++ default: ++ ret = -EOPNOTSUPP; ++ } ++ ++ return ret; ++} ++ ++static int m88e1318_led_hw_is_supported(struct phy_device *phydev, u8 index, ++ unsigned long rules) ++{ ++ int mode, ret; ++ ++ switch (index) { ++ case 0: ++ case 1: ++ case 2: ++ ret = marvell_get_led_mode(index, rules, &mode); ++ break; ++ default: ++ ret = -EINVAL; ++ } ++ ++ return ret; ++} ++ ++static int m88e1318_led_hw_control_set(struct phy_device *phydev, u8 index, ++ unsigned long rules) ++{ ++ int mode, ret, reg; ++ ++ switch (index) { ++ case 0: ++ case 1: ++ case 2: ++ ret = marvell_get_led_mode(index, rules, &mode); ++ break; ++ default: ++ ret = -EINVAL; ++ } ++ ++ if (ret < 0) ++ return ret; ++ ++ reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE, ++ MII_88E1318S_PHY_LED_FUNC); ++ if (reg < 0) ++ return reg; ++ ++ reg &= ~(0xf << (4 * index)); ++ reg |= mode << (4 * index); ++ return phy_write_paged(phydev, MII_MARVELL_LED_PAGE, ++ MII_88E1318S_PHY_LED_FUNC, reg); ++} ++ ++static int m88e1318_led_hw_control_get(struct phy_device *phydev, u8 index, ++ unsigned long *rules) ++{ ++ int mode, reg; ++ ++ if (index > 2) ++ return -EINVAL; ++ ++ reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE, ++ MII_88E1318S_PHY_LED_FUNC); ++ if (reg < 0) ++ return reg; ++ ++ mode = (reg >> (4 * index)) & 0xf; ++ ++ return marvell_get_led_rules(index, rules, mode); ++} ++ + static int marvell_probe(struct phy_device *phydev) + { + struct marvell_priv *priv; +@@ -3144,6 +3410,9 @@ static struct phy_driver marvell_drivers + .get_stats = marvell_get_stats, + .led_brightness_set = m88e1318_led_brightness_set, + .led_blink_set = m88e1318_led_blink_set, ++ .led_hw_is_supported = m88e1318_led_hw_is_supported, ++ .led_hw_control_set = m88e1318_led_hw_control_set, ++ .led_hw_control_get = m88e1318_led_hw_control_get, + }, + { + .phy_id = MARVELL_PHY_ID_88E1145, +@@ -3252,6 +3521,9 @@ static struct phy_driver marvell_drivers + .cable_test_get_status = marvell_vct7_cable_test_get_status, + .led_brightness_set = m88e1318_led_brightness_set, + .led_blink_set = m88e1318_led_blink_set, ++ .led_hw_is_supported = m88e1318_led_hw_is_supported, ++ .led_hw_control_set = m88e1318_led_hw_control_set, ++ .led_hw_control_get = m88e1318_led_hw_control_get, + }, + { + .phy_id = MARVELL_PHY_ID_88E1540, +@@ -3280,6 +3552,9 @@ static struct phy_driver marvell_drivers + .cable_test_get_status = marvell_vct7_cable_test_get_status, + .led_brightness_set = m88e1318_led_brightness_set, + .led_blink_set = m88e1318_led_blink_set, ++ .led_hw_is_supported = m88e1318_led_hw_is_supported, ++ .led_hw_control_set = m88e1318_led_hw_control_set, ++ .led_hw_control_get = m88e1318_led_hw_control_get, + }, + { + .phy_id = MARVELL_PHY_ID_88E1545, +@@ -3308,6 +3583,9 @@ static struct phy_driver marvell_drivers + .cable_test_get_status = marvell_vct7_cable_test_get_status, + .led_brightness_set = m88e1318_led_brightness_set, + .led_blink_set = m88e1318_led_blink_set, ++ .led_hw_is_supported = m88e1318_led_hw_is_supported, ++ .led_hw_control_set = m88e1318_led_hw_control_set, ++ .led_hw_control_get = m88e1318_led_hw_control_get, + }, + { + .phy_id = MARVELL_PHY_ID_88E3016, +@@ -3451,6 +3729,9 @@ static struct phy_driver marvell_drivers + .set_tunable = m88e1540_set_tunable, + .led_brightness_set = m88e1318_led_brightness_set, + .led_blink_set = m88e1318_led_blink_set, ++ .led_hw_is_supported = m88e1318_led_hw_is_supported, ++ .led_hw_control_set = m88e1318_led_hw_control_set, ++ .led_hw_control_get = m88e1318_led_hw_control_get, + }, + }; + diff --git a/target/linux/generic/backport-6.1/826-v6.6-04-leds-trig-netdev-Disable-offload-on-deactivation-of-.patch b/target/linux/generic/backport-6.1/826-v6.6-04-leds-trig-netdev-Disable-offload-on-deactivation-of-.patch new file mode 100644 index 000000000..d6a69aa9c --- /dev/null +++ b/target/linux/generic/backport-6.1/826-v6.6-04-leds-trig-netdev-Disable-offload-on-deactivation-of-.patch @@ -0,0 +1,31 @@ +From e8fbcc47a8e935f36f044d85f21a99acecbd7bfb Mon Sep 17 00:00:00 2001 +From: Andrew Lunn +Date: Tue, 8 Aug 2023 23:04:36 +0200 +Subject: [PATCH 4/4] leds: trig-netdev: Disable offload on deactivation of + trigger + +Ensure that the offloading of blinking is stopped when the trigger is +deactivated. Calling led_set_brightness() is documented as stopping +offload and setting the LED to a constant brightness. + +Suggested-by: Daniel Golle +Signed-off-by: Andrew Lunn +Reviewed-by: Simon Horman +Tested-by: Daniel Golle +Link: https://lore.kernel.org/r/20230808210436.838995-5-andrew@lunn.ch +Signed-off-by: Jakub Kicinski +--- + drivers/leds/trigger/ledtrig-netdev.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -595,6 +595,8 @@ static void netdev_trig_deactivate(struc + + cancel_delayed_work_sync(&trigger_data->work); + ++ led_set_brightness(led_cdev, LED_OFF); ++ + dev_put(trigger_data->net_dev); + + kfree(trigger_data); diff --git a/target/linux/generic/config-5.10 b/target/linux/generic/config-5.10 index 4ae77b8c7..726d40a5f 100644 --- a/target/linux/generic/config-5.10 +++ b/target/linux/generic/config-5.10 @@ -2120,6 +2120,7 @@ CONFIG_GPIO_SYSFS=y CONFIG_HARDENED_USERCOPY=y # CONFIG_HARDENED_USERCOPY_FALLBACK is not set # CONFIG_HARDENED_USERCOPY_PAGESPAN is not set +CONFIG_HARDEN_BRANCH_HISTORY=y CONFIG_HARDEN_EL2_VECTORS=y # CONFIG_HARDLOCKUP_DETECTOR is not set # CONFIG_HAVE_ARM_ARCH_TIMER is not set @@ -3340,8 +3341,6 @@ CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4 # CONFIG_MICROCHIP_T1_PHY is not set # CONFIG_MICROSEMI_PHY is not set # CONFIG_MIGRATION is not set -CONFIG_HARDEN_BRANCH_HISTORY=y -CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y CONFIG_MII=y # CONFIG_MIKROTIK is not set # CONFIG_MIKROTIK_RB532 is not set @@ -3372,6 +3371,7 @@ CONFIG_MISC_FILESYSTEMS=y # CONFIG_MISDN_NETJET is not set # CONFIG_MISDN_SPEEDFAX is not set # CONFIG_MISDN_W6692 is not set +CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y # CONFIG_MKISS is not set # CONFIG_MLX4_CORE is not set # CONFIG_MLX4_EN is not set diff --git a/target/linux/generic/config-5.15 b/target/linux/generic/config-5.15 index 8e9d9469a..7daac70a4 100644 --- a/target/linux/generic/config-5.15 +++ b/target/linux/generic/config-5.15 @@ -4018,6 +4018,7 @@ CONFIG_NET_CORE=y # CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set # CONFIG_NET_DSA_MV88E6XXX_PTP is not set # CONFIG_NET_DSA_QCA8K is not set +# CONFIG_NET_DSA_QCA8K_LEDS_SUPPORT is not set # CONFIG_NET_DSA_REALTEK_SMI is not set # CONFIG_NET_DSA_SJA1105 is not set # CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set diff --git a/target/linux/generic/config-5.4 b/target/linux/generic/config-5.4 index eb83bd117..fa19816db 100644 --- a/target/linux/generic/config-5.4 +++ b/target/linux/generic/config-5.4 @@ -959,14 +959,14 @@ CONFIG_CRYPTO=y CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_AES_586 is not set # CONFIG_CRYPTO_AES_ARM is not set -# CONFIG_CRYPTO_AES_ARM_BS is not set -# CONFIG_CRYPTO_AES_ARM64_BS is not set -# CONFIG_CRYPTO_AES_ARM_CE is not set # CONFIG_CRYPTO_AES_ARM64 is not set +# CONFIG_CRYPTO_AES_ARM64_BS is not set # CONFIG_CRYPTO_AES_ARM64_CE is not set # CONFIG_CRYPTO_AES_ARM64_CE_BLK is not set # CONFIG_CRYPTO_AES_ARM64_CE_CCM is not set # CONFIG_CRYPTO_AES_ARM64_NEON_BLK is not set +# CONFIG_CRYPTO_AES_ARM_BS is not set +# CONFIG_CRYPTO_AES_ARM_CE is not set # CONFIG_CRYPTO_AES_NI_INTEL is not set # CONFIG_CRYPTO_AES_TI is not set CONFIG_CRYPTO_ALGAPI=y @@ -996,8 +996,8 @@ CONFIG_CRYPTO_BLKCIPHER2=y # CONFIG_CRYPTO_CRC32C_INTEL is not set # CONFIG_CRYPTO_CRC32_ARM_CE is not set # CONFIG_CRYPTO_CRCT10DIF is not set -# CONFIG_CRYPTO_CRCT10DIF_ARM_CE is not set # CONFIG_CRYPTO_CRCT10DIF_ARM64_CE is not set +# CONFIG_CRYPTO_CRCT10DIF_ARM_CE is not set # CONFIG_CRYPTO_CRYPTD is not set # CONFIG_CRYPTO_CTR is not set # CONFIG_CRYPTO_CTS is not set @@ -1054,8 +1054,8 @@ CONFIG_CRYPTO_BLKCIPHER2=y # CONFIG_CRYPTO_GCM is not set # CONFIG_CRYPTO_GF128MUL is not set # CONFIG_CRYPTO_GHASH is not set -# CONFIG_CRYPTO_GHASH_ARM_CE is not set # CONFIG_CRYPTO_GHASH_ARM64_CE is not set +# CONFIG_CRYPTO_GHASH_ARM_CE is not set # CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL is not set # CONFIG_CRYPTO_HASH is not set # CONFIG_CRYPTO_HMAC is not set @@ -1116,8 +1116,8 @@ CONFIG_CRYPTO_PCRYPT=y # CONFIG_CRYPTO_SHA256 is not set # CONFIG_CRYPTO_SHA256_ARM is not set # CONFIG_CRYPTO_SHA256_ARM64 is not set -# CONFIG_CRYPTO_SHA2_ARM_CE is not set # CONFIG_CRYPTO_SHA2_ARM64_CE is not set +# CONFIG_CRYPTO_SHA2_ARM_CE is not set # CONFIG_CRYPTO_SHA3 is not set # CONFIG_CRYPTO_SHA3_ARM64 is not set # CONFIG_CRYPTO_SHA512 is not set @@ -2241,7 +2241,6 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_INA2XX_ADC is not set # CONFIG_INDIRECT_PIO is not set CONFIG_INET=y -CONFIG_INET_TABLE_PERTURB_ORDER=16 # CONFIG_INET6_AH is not set # CONFIG_INET6_ESP is not set # CONFIG_INET6_IPCOMP is not set @@ -2256,6 +2255,7 @@ CONFIG_INET_TABLE_PERTURB_ORDER=16 # CONFIG_INET_ESP is not set # CONFIG_INET_IPCOMP is not set # CONFIG_INET_LRO is not set +CONFIG_INET_TABLE_PERTURB_ORDER=16 # CONFIG_INET_TCP_DIAG is not set # CONFIG_INET_TUNNEL is not set # CONFIG_INET_UDP_DIAG is not set diff --git a/target/linux/generic/hack-5.10/204-module_strip.patch b/target/linux/generic/hack-5.10/204-module_strip.patch index 17e34524c..1db015f68 100644 --- a/target/linux/generic/hack-5.10/204-module_strip.patch +++ b/target/linux/generic/hack-5.10/204-module_strip.patch @@ -104,7 +104,7 @@ Signed-off-by: Felix Fietkau config MODULES_TREE_LOOKUP --- a/kernel/module.c +++ b/kernel/module.c -@@ -3262,9 +3262,11 @@ static int setup_load_info(struct load_i +@@ -3254,9 +3254,11 @@ static int setup_load_info(struct load_i static int check_modinfo(struct module *mod, struct load_info *info, int flags) { @@ -117,7 +117,7 @@ Signed-off-by: Felix Fietkau if (flags & MODULE_INIT_IGNORE_VERMAGIC) modmagic = NULL; -@@ -3285,6 +3287,7 @@ static int check_modinfo(struct module * +@@ -3277,6 +3279,7 @@ static int check_modinfo(struct module * mod->name); add_taint_module(mod, TAINT_OOT_MODULE, LOCKDEP_STILL_OK); } diff --git a/target/linux/generic/hack-5.10/721-net-add-packet-mangeling.patch b/target/linux/generic/hack-5.10/721-net-add-packet-mangeling.patch index 8f6702e43..cea9bb000 100644 --- a/target/linux/generic/hack-5.10/721-net-add-packet-mangeling.patch +++ b/target/linux/generic/hack-5.10/721-net-add-packet-mangeling.patch @@ -60,7 +60,7 @@ Signed-off-by: Felix Fietkau */ --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h -@@ -2728,6 +2728,10 @@ static inline int pskb_trim(struct sk_bu +@@ -2743,6 +2743,10 @@ static inline int pskb_trim(struct sk_bu return (len < skb->len) ? __pskb_trim(skb, len) : 0; } @@ -71,7 +71,7 @@ Signed-off-by: Felix Fietkau /** * pskb_trim_unique - remove end from a paged unique (not cloned) buffer * @skb: buffer to alter -@@ -2859,16 +2863,6 @@ static inline struct sk_buff *dev_alloc_ +@@ -2874,16 +2878,6 @@ static inline struct sk_buff *dev_alloc_ } @@ -119,15 +119,15 @@ Signed-off-by: Felix Fietkau trace_net_dev_start_xmit(skb, dev); --- a/net/core/skbuff.c +++ b/net/core/skbuff.c -@@ -60,6 +60,7 @@ - #include +@@ -61,6 +61,7 @@ #include #include + #include +#include #include #include -@@ -553,6 +554,22 @@ skb_fail: +@@ -554,6 +555,22 @@ skb_fail: } EXPORT_SYMBOL(__napi_alloc_skb); diff --git a/target/linux/generic/hack-5.10/902-debloat_proc.patch b/target/linux/generic/hack-5.10/902-debloat_proc.patch index 6dc608f2f..8bb572e42 100644 --- a/target/linux/generic/hack-5.10/902-debloat_proc.patch +++ b/target/linux/generic/hack-5.10/902-debloat_proc.patch @@ -29,7 +29,7 @@ Signed-off-by: Felix Fietkau --- a/fs/locks.c +++ b/fs/locks.c -@@ -3016,6 +3016,8 @@ static const struct seq_operations locks +@@ -3076,6 +3076,8 @@ static const struct seq_operations locks static int __init proc_locks_init(void) { @@ -396,7 +396,7 @@ Signed-off-by: Felix Fietkau } --- a/net/ipv4/route.c +++ b/net/ipv4/route.c -@@ -410,6 +410,9 @@ static struct pernet_operations ip_rt_pr +@@ -411,6 +411,9 @@ static struct pernet_operations ip_rt_pr static int __init ip_rt_proc_init(void) { diff --git a/target/linux/generic/hack-5.10/953-net-patch-linux-kernel-to-support-shortcut-fe.patch b/target/linux/generic/hack-5.10/953-net-patch-linux-kernel-to-support-shortcut-fe.patch index 11a15a6fe..2a76af106 100644 --- a/target/linux/generic/hack-5.10/953-net-patch-linux-kernel-to-support-shortcut-fe.patch +++ b/target/linux/generic/hack-5.10/953-net-patch-linux-kernel-to-support-shortcut-fe.patch @@ -12,9 +12,9 @@ struct list_head *br_ip_list); --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h -@@ -866,6 +866,10 @@ struct sk_buff { +@@ -865,6 +865,10 @@ struct sk_buff { + #endif __u8 scm_io_uring:1; - __u8 gro_skip:1; +#ifdef CONFIG_SHORTCUT_FE + __u8 fast_forwarded:1; diff --git a/target/linux/generic/hack-5.15/250-netfilter_depends.patch b/target/linux/generic/hack-5.15/250-netfilter_depends.patch index d9a2b81d7..1f8af6dbe 100644 --- a/target/linux/generic/hack-5.15/250-netfilter_depends.patch +++ b/target/linux/generic/hack-5.15/250-netfilter_depends.patch @@ -17,7 +17,7 @@ Signed-off-by: Felix Fietkau depends on NETFILTER_ADVANCED help H.323 is a VoIP signalling protocol from ITU-T. As one of the most -@@ -1105,7 +1104,6 @@ config NETFILTER_XT_TARGET_SECMARK +@@ -1114,7 +1113,6 @@ config NETFILTER_XT_TARGET_SECMARK config NETFILTER_XT_TARGET_TCPMSS tristate '"TCPMSS" target support' diff --git a/target/linux/generic/hack-5.15/402-mtd-blktrans-call-add-disks-after-mtd-device.patch b/target/linux/generic/hack-5.15/402-mtd-blktrans-call-add-disks-after-mtd-device.patch index 8225ae14f..9d569f0f4 100644 --- a/target/linux/generic/hack-5.15/402-mtd-blktrans-call-add-disks-after-mtd-device.patch +++ b/target/linux/generic/hack-5.15/402-mtd-blktrans-call-add-disks-after-mtd-device.patch @@ -77,7 +77,7 @@ Signed-off-by: Daniel Golle #include "mtdcore.h" -@@ -1006,6 +1007,8 @@ int mtd_device_parse_register(struct mtd +@@ -1008,6 +1009,8 @@ int mtd_device_parse_register(struct mtd register_reboot_notifier(&mtd->reboot_notifier); } diff --git a/target/linux/generic/hack-5.15/600-bridge_offload.patch b/target/linux/generic/hack-5.15/600-bridge_offload.patch index de02c5de2..61a8efdac 100644 --- a/target/linux/generic/hack-5.15/600-bridge_offload.patch +++ b/target/linux/generic/hack-5.15/600-bridge_offload.patch @@ -154,7 +154,7 @@ static int br_netif_receive_skb(struct net *net, struct sock *sk, struct sk_buff *skb) -@@ -171,6 +172,7 @@ int br_handle_frame_finish(struct net *n +@@ -176,6 +177,7 @@ int br_handle_frame_finish(struct net *n dst->used = now; br_forward(dst->dst, skb, local_rcv, false); } else { @@ -162,7 +162,7 @@ if (!mcast_hit) br_flood(br, skb, pkt_type, local_rcv, false); else -@@ -304,6 +306,9 @@ static rx_handler_result_t br_handle_fra +@@ -309,6 +311,9 @@ static rx_handler_result_t br_handle_fra memset(skb->cb, 0, sizeof(struct br_input_skb_cb)); p = br_port_get_rcu(skb->dev); @@ -661,7 +661,7 @@ #ifdef CONFIG_NET_SWITCHDEV /* Counter used to make sure that hardware domains get unique * identifiers in case a bridge spans multiple switchdev instances. -@@ -553,6 +569,10 @@ struct br_input_skb_cb { +@@ -554,6 +570,10 @@ struct br_input_skb_cb { #ifdef CONFIG_NETFILTER_FAMILY_BRIDGE u8 br_netfilter_broute:1; #endif diff --git a/target/linux/generic/hack-5.15/601-of_net-add-mac-address-ascii-support.patch b/target/linux/generic/hack-5.15/601-of_net-add-mac-address-ascii-support.patch index 4ab05b4ea..6f61cde0d 100644 --- a/target/linux/generic/hack-5.15/601-of_net-add-mac-address-ascii-support.patch +++ b/target/linux/generic/hack-5.15/601-of_net-add-mac-address-ascii-support.patch @@ -11,7 +11,7 @@ Submitted-by: Yousong Zhou --- a/net/ethernet/eth.c +++ b/net/ethernet/eth.c -@@ -538,6 +538,63 @@ int eth_platform_get_mac_address(struct +@@ -527,6 +527,63 @@ int eth_platform_get_mac_address(struct } EXPORT_SYMBOL(eth_platform_get_mac_address); @@ -75,7 +75,7 @@ Submitted-by: Yousong Zhou /** * nvmem_get_mac_address - Obtain the MAC address from an nvmem cell named * 'mac-address' associated with given device. -@@ -551,19 +608,23 @@ int nvmem_get_mac_address(struct device +@@ -540,19 +597,23 @@ int nvmem_get_mac_address(struct device { struct nvmem_cell *cell; const void *mac; diff --git a/target/linux/generic/hack-5.15/640-bridge-only-accept-EAP-locally.patch b/target/linux/generic/hack-5.15/640-bridge-only-accept-EAP-locally.patch index 7ae96b43d..875657883 100644 --- a/target/linux/generic/hack-5.15/640-bridge-only-accept-EAP-locally.patch +++ b/target/linux/generic/hack-5.15/640-bridge-only-accept-EAP-locally.patch @@ -12,14 +12,14 @@ Signed-off-by: Etienne Champetier --- a/net/bridge/br_input.c +++ b/net/bridge/br_input.c -@@ -116,10 +116,14 @@ int br_handle_frame_finish(struct net *n +@@ -121,10 +121,14 @@ int br_handle_frame_finish(struct net *n } } + BR_INPUT_SKB_CB(skb)->brdev = br->dev; + + if (skb->protocol == htons(ETH_P_PAE) && !br->disable_eap_hack) -+ return br_pass_frame_up(skb); ++ return br_pass_frame_up(skb,false); + if (state == BR_STATE_LEARNING) goto drop; diff --git a/target/linux/generic/hack-5.15/650-netfilter-add-xt_FLOWOFFLOAD-target.patch b/target/linux/generic/hack-5.15/650-netfilter-add-xt_FLOWOFFLOAD-target.patch index 49f339bdd..d22b9f909 100644 --- a/target/linux/generic/hack-5.15/650-netfilter-add-xt_FLOWOFFLOAD-target.patch +++ b/target/linux/generic/hack-5.15/650-netfilter-add-xt_FLOWOFFLOAD-target.patch @@ -70,7 +70,7 @@ Signed-off-by: Felix Fietkau help This option adds the flow table core infrastructure. -@@ -1010,6 +1009,15 @@ config NETFILTER_XT_TARGET_NOTRACK +@@ -1019,6 +1018,15 @@ config NETFILTER_XT_TARGET_NOTRACK depends on NETFILTER_ADVANCED select NETFILTER_XT_TARGET_CT @@ -88,7 +88,7 @@ Signed-off-by: Felix Fietkau depends on NETFILTER_ADVANCED --- a/net/netfilter/Makefile +++ b/net/netfilter/Makefile -@@ -143,6 +143,7 @@ obj-$(CONFIG_NETFILTER_XT_TARGET_CLASSIF +@@ -144,6 +144,7 @@ obj-$(CONFIG_NETFILTER_XT_TARGET_CLASSIF obj-$(CONFIG_NETFILTER_XT_TARGET_CONNSECMARK) += xt_CONNSECMARK.o obj-$(CONFIG_NETFILTER_XT_TARGET_CT) += xt_CT.o obj-$(CONFIG_NETFILTER_XT_TARGET_DSCP) += xt_DSCP.o diff --git a/target/linux/generic/hack-5.15/700-swconfig_switch_drivers.patch b/target/linux/generic/hack-5.15/700-swconfig_switch_drivers.patch index 48be44002..9d77efaca 100644 --- a/target/linux/generic/hack-5.15/700-swconfig_switch_drivers.patch +++ b/target/linux/generic/hack-5.15/700-swconfig_switch_drivers.patch @@ -12,7 +12,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig -@@ -61,6 +61,80 @@ config SFP +@@ -62,6 +62,80 @@ config SFP depends on HWMON || HWMON=n select MDIO_I2C diff --git a/target/linux/generic/hack-5.15/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch b/target/linux/generic/hack-5.15/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch index 328814c6a..ee26704f1 100644 --- a/target/linux/generic/hack-5.15/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch +++ b/target/linux/generic/hack-5.15/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch @@ -1,6 +1,6 @@ --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c -@@ -2997,6 +2997,9 @@ static int mv88e6xxx_setup_port(struct m +@@ -3007,6 +3007,9 @@ static int mv88e6xxx_setup_port(struct m else reg = 1 << port; diff --git a/target/linux/generic/hack-5.15/721-net-add-packet-mangeling.patch b/target/linux/generic/hack-5.15/721-net-add-packet-mangeling.patch index 3f971d654..550e45b42 100644 --- a/target/linux/generic/hack-5.15/721-net-add-packet-mangeling.patch +++ b/target/linux/generic/hack-5.15/721-net-add-packet-mangeling.patch @@ -71,7 +71,7 @@ Signed-off-by: Felix Fietkau */ --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h -@@ -2855,6 +2855,10 @@ static inline int pskb_trim(struct sk_bu +@@ -2870,6 +2870,10 @@ static inline int pskb_trim(struct sk_bu return (len < skb->len) ? __pskb_trim(skb, len) : 0; } @@ -82,7 +82,7 @@ Signed-off-by: Felix Fietkau /** * pskb_trim_unique - remove end from a paged unique (not cloned) buffer * @skb: buffer to alter -@@ -3005,16 +3009,6 @@ static inline struct sk_buff *dev_alloc_ +@@ -3020,16 +3024,6 @@ static inline struct sk_buff *dev_alloc_ } diff --git a/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch b/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch index 75c2e41fb..b4ed6c991 100644 --- a/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch +++ b/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch @@ -43,7 +43,7 @@ Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support #define QUECTEL_VENDOR_ID 0x2c7c /* These Quectel products use Quectel's vendor ID */ -@@ -1152,6 +1157,11 @@ static const struct usb_device_id option +@@ -1156,6 +1161,11 @@ static const struct usb_device_id option { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x0023)}, /* ONYX 3G device */ { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x9000), /* SIMCom SIM5218 */ .driver_info = NCTRL(0) | NCTRL(1) | NCTRL(2) | NCTRL(3) | RSVD(4) }, @@ -55,7 +55,7 @@ Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support /* Quectel products using Qualcomm vendor ID */ { USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC15)}, { USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC20), -@@ -1193,6 +1203,11 @@ static const struct usb_device_id option +@@ -1197,6 +1207,11 @@ static const struct usb_device_id option .driver_info = ZLP }, { USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96), .driver_info = RSVD(4) }, diff --git a/target/linux/generic/hack-5.15/795-backport-phylink_pcs-helpers.patch b/target/linux/generic/hack-5.15/795-backport-phylink_pcs-helpers.patch index 3e05241cd..2d1992edb 100644 --- a/target/linux/generic/hack-5.15/795-backport-phylink_pcs-helpers.patch +++ b/target/linux/generic/hack-5.15/795-backport-phylink_pcs-helpers.patch @@ -1,6 +1,6 @@ --- a/include/linux/phylink.h +++ b/include/linux/phylink.h -@@ -585,10 +585,37 @@ int phylink_speed_up(struct phylink *pl) +@@ -601,10 +601,37 @@ int phylink_speed_up(struct phylink *pl) void phylink_set_port_modes(unsigned long *bits); void phylink_set_10g_modes(unsigned long *mask); @@ -40,7 +40,7 @@ const unsigned long *advertising); --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c -@@ -896,7 +896,6 @@ static int phylink_change_inband_advert( +@@ -942,7 +942,6 @@ static int phylink_change_inband_advert( return 0; } @@ -48,7 +48,7 @@ static void phylink_mac_pcs_get_state(struct phylink *pl, struct phylink_link_state *state) { -@@ -2978,6 +2977,52 @@ void phylink_mii_c22_pcs_get_state(struc +@@ -3026,6 +3025,52 @@ void phylink_mii_c22_pcs_get_state(struc EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); /** @@ -101,7 +101,7 @@ * phylink_mii_c22_pcs_set_advertisement() - configure the clause 37 PCS * advertisement * @pcs: a pointer to a &struct mdio_device. -@@ -3049,6 +3094,46 @@ int phylink_mii_c22_pcs_set_advertisemen +@@ -3097,6 +3142,46 @@ int phylink_mii_c22_pcs_set_advertisemen EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_set_advertisement); /** diff --git a/target/linux/generic/hack-5.15/902-debloat_proc.patch b/target/linux/generic/hack-5.15/902-debloat_proc.patch index c7e40dfc6..4404d3456 100644 --- a/target/linux/generic/hack-5.15/902-debloat_proc.patch +++ b/target/linux/generic/hack-5.15/902-debloat_proc.patch @@ -396,7 +396,7 @@ Signed-off-by: Felix Fietkau } --- a/net/ipv4/route.c +++ b/net/ipv4/route.c -@@ -387,6 +387,9 @@ static struct pernet_operations ip_rt_pr +@@ -388,6 +388,9 @@ static struct pernet_operations ip_rt_pr static int __init ip_rt_proc_init(void) { diff --git a/target/linux/generic/hack-5.15/953-net-patch-linux-kernel-to-support-shortcut-fe.patch b/target/linux/generic/hack-5.15/953-net-patch-linux-kernel-to-support-shortcut-fe.patch index a185f603f..99567b52a 100644 --- a/target/linux/generic/hack-5.15/953-net-patch-linux-kernel-to-support-shortcut-fe.patch +++ b/target/linux/generic/hack-5.15/953-net-patch-linux-kernel-to-support-shortcut-fe.patch @@ -12,7 +12,7 @@ struct list_head *br_ip_list); --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h -@@ -916,6 +916,10 @@ struct sk_buff { +@@ -915,6 +915,10 @@ struct sk_buff { __u8 slow_gro:1; __u8 scm_io_uring:1; diff --git a/target/linux/generic/hack-5.4/550-loop-Report-EOPNOTSUPP-properly.patch b/target/linux/generic/hack-5.4/550-loop-Report-EOPNOTSUPP-properly.patch index 29a8d84e4..16a7bcd68 100644 --- a/target/linux/generic/hack-5.4/550-loop-Report-EOPNOTSUPP-properly.patch +++ b/target/linux/generic/hack-5.4/550-loop-Report-EOPNOTSUPP-properly.patch @@ -18,7 +18,7 @@ Reviewed-by: Bart Van Assche --- a/drivers/block/loop.c +++ b/drivers/block/loop.c -@@ -462,7 +462,7 @@ static void lo_complete_rq(struct reques +@@ -468,7 +468,7 @@ static void lo_complete_rq(struct reques if (!cmd->use_aio || cmd->ret < 0 || cmd->ret == blk_rq_bytes(rq) || req_op(rq) != REQ_OP_READ) { if (cmd->ret < 0) @@ -27,7 +27,7 @@ Reviewed-by: Bart Van Assche goto end_io; } -@@ -1978,7 +1978,10 @@ static void loop_handle_cmd(struct loop_ +@@ -2001,7 +2001,10 @@ static void loop_handle_cmd(struct loop_ failed: /* complete non-aio request */ if (!cmd->use_aio || ret) { diff --git a/target/linux/generic/hack-5.4/721-phy_packets.patch b/target/linux/generic/hack-5.4/721-phy_packets.patch index 89d5b965a..2336bcdee 100644 --- a/target/linux/generic/hack-5.4/721-phy_packets.patch +++ b/target/linux/generic/hack-5.4/721-phy_packets.patch @@ -56,7 +56,7 @@ Signed-off-by: Felix Fietkau */ --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h -@@ -2695,6 +2695,10 @@ static inline int pskb_trim(struct sk_bu +@@ -2710,6 +2710,10 @@ static inline int pskb_trim(struct sk_bu return (len < skb->len) ? __pskb_trim(skb, len) : 0; } @@ -67,7 +67,7 @@ Signed-off-by: Felix Fietkau /** * pskb_trim_unique - remove end from a paged unique (not cloned) buffer * @skb: buffer to alter -@@ -2826,16 +2830,6 @@ static inline struct sk_buff *dev_alloc_ +@@ -2841,16 +2845,6 @@ static inline struct sk_buff *dev_alloc_ } diff --git a/target/linux/generic/hack-5.4/902-debloat_proc.patch b/target/linux/generic/hack-5.4/902-debloat_proc.patch index c980dfe41..8cbedc629 100644 --- a/target/linux/generic/hack-5.4/902-debloat_proc.patch +++ b/target/linux/generic/hack-5.4/902-debloat_proc.patch @@ -396,7 +396,7 @@ Signed-off-by: Felix Fietkau } --- a/net/ipv4/route.c +++ b/net/ipv4/route.c -@@ -410,6 +410,9 @@ static struct pernet_operations ip_rt_pr +@@ -411,6 +411,9 @@ static struct pernet_operations ip_rt_pr static int __init ip_rt_proc_init(void) { diff --git a/target/linux/generic/hack-5.4/995-usb-serial-option-add-ec200a.patch b/target/linux/generic/hack-5.4/995-usb-serial-option-add-ec200a.patch index 684e85e21..71b05f073 100644 --- a/target/linux/generic/hack-5.4/995-usb-serial-option-add-ec200a.patch +++ b/target/linux/generic/hack-5.4/995-usb-serial-option-add-ec200a.patch @@ -1,6 +1,6 @@ --- a/drivers/usb/serial/option.c +++ b/drivers/usb/serial/option.c -@@ -278,6 +278,7 @@ static void option_instat_callback(struc +@@ -282,6 +282,7 @@ static void option_instat_callback(struc #define QUECTEL_PRODUCT_EM061K_LWW 0x6008 #define QUECTEL_PRODUCT_EM061K_LCN 0x6009 #define QUECTEL_PRODUCT_EC200T 0x6026 @@ -8,7 +8,7 @@ #define QUECTEL_PRODUCT_RM500K 0x7001 #define CMOTECH_VENDOR_ID 0x16d8 -@@ -1246,6 +1247,7 @@ static const struct usb_device_id option +@@ -1267,6 +1268,7 @@ static const struct usb_device_id option { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EC200U, 0xff, 0, 0) }, { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EC200S_CN, 0xff, 0, 0) }, { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EC200T, 0xff, 0, 0) }, diff --git a/target/linux/generic/hack-6.1/700-swconfig_switch_drivers.patch b/target/linux/generic/hack-6.1/700-swconfig_switch_drivers.patch index 48be44002..5f49678a3 100644 --- a/target/linux/generic/hack-6.1/700-swconfig_switch_drivers.patch +++ b/target/linux/generic/hack-6.1/700-swconfig_switch_drivers.patch @@ -12,7 +12,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig -@@ -61,6 +61,80 @@ config SFP +@@ -69,6 +69,80 @@ config SFP depends on HWMON || HWMON=n select MDIO_I2C diff --git a/target/linux/generic/pending-5.10/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch b/target/linux/generic/pending-5.10/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch index 94b7d7f75..6a46b4c9a 100644 --- a/target/linux/generic/pending-5.10/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch +++ b/target/linux/generic/pending-5.10/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch @@ -71,7 +71,7 @@ Signed-off-by: Tobias Wolf --- a/mm/page_alloc.c +++ b/mm/page_alloc.c -@@ -7123,7 +7123,7 @@ static void __ref alloc_node_mem_map(str +@@ -7125,7 +7125,7 @@ static void __ref alloc_node_mem_map(str if (pgdat == NODE_DATA(0)) { mem_map = NODE_DATA(0)->node_mem_map; if (page_to_pfn(mem_map) != pgdat->node_start_pfn) diff --git a/target/linux/generic/pending-5.10/610-netfilter_match_bypass_default_checks.patch b/target/linux/generic/pending-5.10/610-netfilter_match_bypass_default_checks.patch index c1e050e93..8b1e70bd0 100644 --- a/target/linux/generic/pending-5.10/610-netfilter_match_bypass_default_checks.patch +++ b/target/linux/generic/pending-5.10/610-netfilter_match_bypass_default_checks.patch @@ -91,7 +91,7 @@ Signed-off-by: Felix Fietkau for (i = sizeof(struct ipt_entry); i < e->target_offset; i += m->u.match_size) { -@@ -1222,12 +1259,15 @@ compat_copy_entry_to_user(struct ipt_ent +@@ -1226,12 +1263,15 @@ compat_copy_entry_to_user(struct ipt_ent compat_uint_t origsize; const struct xt_entry_match *ematch; int ret = 0; diff --git a/target/linux/generic/pending-5.10/630-packet_socket_type.patch b/target/linux/generic/pending-5.10/630-packet_socket_type.patch index 1f21ced0a..3f5f461e7 100644 --- a/target/linux/generic/pending-5.10/630-packet_socket_type.patch +++ b/target/linux/generic/pending-5.10/630-packet_socket_type.patch @@ -87,7 +87,7 @@ Signed-off-by: Felix Fietkau if (!net_eq(dev_net(dev), sock_net(sk))) goto drop; -@@ -3346,6 +3348,7 @@ static int packet_create(struct net *net +@@ -3345,6 +3347,7 @@ static int packet_create(struct net *net mutex_init(&po->pg_vec_lock); po->rollover = NULL; po->prot_hook.func = packet_rcv; @@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau if (sock->type == SOCK_PACKET) po->prot_hook.func = packet_rcv_spkt; -@@ -3986,6 +3989,16 @@ packet_setsockopt(struct socket *sock, i +@@ -3985,6 +3988,16 @@ packet_setsockopt(struct socket *sock, i WRITE_ONCE(po->xmit, val ? packet_direct_xmit : dev_queue_xmit); return 0; } @@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau default: return -ENOPROTOOPT; } -@@ -4042,6 +4055,13 @@ static int packet_getsockopt(struct sock +@@ -4041,6 +4054,13 @@ static int packet_getsockopt(struct sock case PACKET_VNET_HDR: val = po->has_vnet_hdr; break; diff --git a/target/linux/generic/pending-5.10/655-increase_skb_pad.patch b/target/linux/generic/pending-5.10/655-increase_skb_pad.patch index dafafad58..c94563a6a 100644 --- a/target/linux/generic/pending-5.10/655-increase_skb_pad.patch +++ b/target/linux/generic/pending-5.10/655-increase_skb_pad.patch @@ -9,7 +9,7 @@ Signed-off-by: Felix Fietkau --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h -@@ -2694,7 +2694,7 @@ static inline int pskb_network_may_pull( +@@ -2709,7 +2709,7 @@ static inline int pskb_network_may_pull( * NET_IP_ALIGN(2) + ethernet_header(14) + IP_header(20/40) + ports(8) */ #ifndef NET_SKB_PAD diff --git a/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch index 7beabef9a..ef22be2b6 100644 --- a/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch +++ b/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch @@ -110,7 +110,7 @@ Signed-off-by: Jonas Gorski return -EINVAL; --- a/net/ipv6/route.c +++ b/net/ipv6/route.c -@@ -95,6 +95,8 @@ static int ip6_pkt_discard(struct sk_bu +@@ -96,6 +96,8 @@ static int ip6_pkt_discard(struct sk_bu static int ip6_pkt_discard_out(struct net *net, struct sock *sk, struct sk_buff *skb); static int ip6_pkt_prohibit(struct sk_buff *skb); static int ip6_pkt_prohibit_out(struct net *net, struct sock *sk, struct sk_buff *skb); @@ -119,7 +119,7 @@ Signed-off-by: Jonas Gorski static void ip6_link_failure(struct sk_buff *skb); static void ip6_rt_update_pmtu(struct dst_entry *dst, struct sock *sk, struct sk_buff *skb, u32 mtu, -@@ -310,6 +312,18 @@ static const struct rt6_info ip6_prohibi +@@ -311,6 +313,18 @@ static const struct rt6_info ip6_prohibi .rt6i_flags = (RTF_REJECT | RTF_NONEXTHOP), }; @@ -138,7 +138,7 @@ Signed-off-by: Jonas Gorski static const struct rt6_info ip6_blk_hole_entry_template = { .dst = { .__refcnt = ATOMIC_INIT(1), -@@ -1031,6 +1045,7 @@ static const int fib6_prop[RTN_MAX + 1] +@@ -1032,6 +1046,7 @@ static const int fib6_prop[RTN_MAX + 1] [RTN_BLACKHOLE] = -EINVAL, [RTN_UNREACHABLE] = -EHOSTUNREACH, [RTN_PROHIBIT] = -EACCES, @@ -146,7 +146,7 @@ Signed-off-by: Jonas Gorski [RTN_THROW] = -EAGAIN, [RTN_NAT] = -EINVAL, [RTN_XRESOLVE] = -EINVAL, -@@ -1066,6 +1081,10 @@ static void ip6_rt_init_dst_reject(struc +@@ -1067,6 +1082,10 @@ static void ip6_rt_init_dst_reject(struc rt->dst.output = ip6_pkt_prohibit_out; rt->dst.input = ip6_pkt_prohibit; break; @@ -157,7 +157,7 @@ Signed-off-by: Jonas Gorski case RTN_THROW: case RTN_UNREACHABLE: default: -@@ -4446,6 +4465,17 @@ static int ip6_pkt_prohibit_out(struct n +@@ -4450,6 +4469,17 @@ static int ip6_pkt_prohibit_out(struct n return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES); } @@ -175,7 +175,7 @@ Signed-off-by: Jonas Gorski /* * Allocate a dst for local (unicast / anycast) address. */ -@@ -4933,7 +4963,8 @@ static int rtm_to_fib6_config(struct sk_ +@@ -4937,7 +4967,8 @@ static int rtm_to_fib6_config(struct sk_ if (rtm->rtm_type == RTN_UNREACHABLE || rtm->rtm_type == RTN_BLACKHOLE || rtm->rtm_type == RTN_PROHIBIT || @@ -185,7 +185,7 @@ Signed-off-by: Jonas Gorski cfg->fc_flags |= RTF_REJECT; if (rtm->rtm_type == RTN_LOCAL) -@@ -6126,6 +6157,8 @@ static int ip6_route_dev_notify(struct n +@@ -6130,6 +6161,8 @@ static int ip6_route_dev_notify(struct n #ifdef CONFIG_IPV6_MULTIPLE_TABLES net->ipv6.ip6_prohibit_entry->dst.dev = dev; net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev); @@ -194,7 +194,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_blk_hole_entry->dst.dev = dev; net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev); #endif -@@ -6137,6 +6170,7 @@ static int ip6_route_dev_notify(struct n +@@ -6141,6 +6174,7 @@ static int ip6_route_dev_notify(struct n in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev); #ifdef CONFIG_IPV6_MULTIPLE_TABLES in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev); @@ -202,7 +202,7 @@ Signed-off-by: Jonas Gorski in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev); #endif } -@@ -6328,6 +6362,8 @@ static int __net_init ip6_route_net_init +@@ -6332,6 +6366,8 @@ static int __net_init ip6_route_net_init #ifdef CONFIG_IPV6_MULTIPLE_TABLES net->ipv6.fib6_has_custom_rules = false; @@ -211,7 +211,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template, sizeof(*net->ipv6.ip6_prohibit_entry), GFP_KERNEL); -@@ -6338,11 +6374,21 @@ static int __net_init ip6_route_net_init +@@ -6342,11 +6378,21 @@ static int __net_init ip6_route_net_init ip6_template_metrics, true); INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached); @@ -234,7 +234,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops; dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst, ip6_template_metrics, true); -@@ -6369,6 +6415,8 @@ out: +@@ -6373,6 +6419,8 @@ out: return ret; #ifdef CONFIG_IPV6_MULTIPLE_TABLES @@ -243,7 +243,7 @@ Signed-off-by: Jonas Gorski out_ip6_prohibit_entry: kfree(net->ipv6.ip6_prohibit_entry); out_ip6_null_entry: -@@ -6388,6 +6436,7 @@ static void __net_exit ip6_route_net_exi +@@ -6392,6 +6440,7 @@ static void __net_exit ip6_route_net_exi kfree(net->ipv6.ip6_null_entry); #ifdef CONFIG_IPV6_MULTIPLE_TABLES kfree(net->ipv6.ip6_prohibit_entry); @@ -251,7 +251,7 @@ Signed-off-by: Jonas Gorski kfree(net->ipv6.ip6_blk_hole_entry); #endif dst_entries_destroy(&net->ipv6.ip6_dst_ops); -@@ -6471,6 +6520,9 @@ void __init ip6_route_init_special_entri +@@ -6475,6 +6524,9 @@ void __init ip6_route_init_special_entri init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev; init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); diff --git a/target/linux/generic/pending-5.10/680-NET-skip-GRO-for-foreign-MAC-addresses.patch b/target/linux/generic/pending-5.10/680-NET-skip-GRO-for-foreign-MAC-addresses.patch index ceaf1e99f..8b06c2ca2 100644 --- a/target/linux/generic/pending-5.10/680-NET-skip-GRO-for-foreign-MAC-addresses.patch +++ b/target/linux/generic/pending-5.10/680-NET-skip-GRO-for-foreign-MAC-addresses.patch @@ -22,14 +22,14 @@ Signed-off-by: Felix Fietkau #endif --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h -@@ -864,6 +864,7 @@ struct sk_buff { - __u8 decrypted:1; - #endif - __u8 scm_io_uring:1; -+ __u8 gro_skip:1; - +@@ -868,6 +868,7 @@ struct sk_buff { #ifdef CONFIG_NET_SCHED __u16 tc_index; /* traffic control index */ + #endif ++ __u8 gro_skip:1; + + union { + __wsum csum; --- a/net/core/dev.c +++ b/net/core/dev.c @@ -6081,6 +6081,9 @@ static enum gro_result dev_gro_receive(s @@ -136,14 +136,13 @@ Signed-off-by: Felix Fietkau /** * eth_type_trans - determine the packet's protocol ID. * @skb: received socket data -@@ -174,6 +186,10 @@ __be16 eth_type_trans(struct sk_buff *sk - } else { - skb->pkt_type = PACKET_OTHERHOST; - } -+ -+ if (eth_check_local_mask(eth->h_dest, dev->dev_addr, -+ dev->local_addr_mask)) -+ skb->gro_skip = 1; - } +@@ -166,6 +178,9 @@ __be16 eth_type_trans(struct sk_buff *sk + eth_skb_pkt_type(skb, dev); + ++ if (eth_check_local_mask(eth->h_dest, dev->dev_addr, ++ dev->local_addr_mask)) ++ skb->gro_skip = 1; /* + * Some variants of DSA tagging don't have an ethertype field + * at all, so we check here whether one of those tagging diff --git a/target/linux/generic/pending-5.10/701-01-arm64-dts-mediatek-mt7622-add-support-for-coherent-D.patch b/target/linux/generic/pending-5.10/701-01-arm64-dts-mediatek-mt7622-add-support-for-coherent-D.patch deleted file mode 100644 index d9015d480..000000000 --- a/target/linux/generic/pending-5.10/701-01-arm64-dts-mediatek-mt7622-add-support-for-coherent-D.patch +++ /dev/null @@ -1,30 +0,0 @@ -From: Felix Fietkau -Date: Mon, 7 Feb 2022 10:27:22 +0100 -Subject: [PATCH] arm64: dts: mediatek: mt7622: add support for coherent - DMA - -It improves performance by eliminating the need for a cache flush on rx and tx - -Signed-off-by: Felix Fietkau ---- - ---- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi -+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi -@@ -357,7 +357,7 @@ - }; - - cci_control2: slave-if@5000 { -- compatible = "arm,cci-400-ctrl-if"; -+ compatible = "arm,cci-400-ctrl-if", "syscon"; - interface-type = "ace"; - reg = <0x5000 0x1000>; - }; -@@ -937,6 +937,8 @@ - power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>; - mediatek,ethsys = <ðsys>; - mediatek,sgmiisys = <&sgmiisys>; -+ mediatek,cci-control = <&cci_control2>; -+ dma-coherent; - #address-cells = <1>; - #size-cells = <0>; - status = "disabled"; diff --git a/target/linux/generic/pending-5.10/701-04-arm64-dts-mediatek-mt7622-introduce-nodes-for-Wirele.patch b/target/linux/generic/pending-5.10/701-04-arm64-dts-mediatek-mt7622-introduce-nodes-for-Wirele.patch deleted file mode 100644 index f59a364a7..000000000 --- a/target/linux/generic/pending-5.10/701-04-arm64-dts-mediatek-mt7622-introduce-nodes-for-Wirele.patch +++ /dev/null @@ -1,62 +0,0 @@ -From: Felix Fietkau -Date: Sat, 5 Feb 2022 18:36:36 +0100 -Subject: [PATCH] arm64: dts: mediatek: mt7622: introduce nodes for - Wireless Ethernet Dispatch - -Introduce wed0 and wed1 nodes in order to enable offloading forwarding -between ethernet and wireless devices on the mt7622 chipset. - -Signed-off-by: Felix Fietkau ---- - ---- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi -+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi -@@ -893,6 +893,11 @@ - }; - }; - -+ hifsys: syscon@1af00000 { -+ compatible = "mediatek,mt7622-hifsys", "syscon"; -+ reg = <0 0x1af00000 0 0x70>; -+ }; -+ - ethsys: syscon@1b000000 { - compatible = "mediatek,mt7622-ethsys", - "syscon"; -@@ -911,6 +916,26 @@ - #dma-cells = <1>; - }; - -+ pcie_mirror: pcie-mirror@10000400 { -+ compatible = "mediatek,mt7622-pcie-mirror", -+ "syscon"; -+ reg = <0 0x10000400 0 0x10>; -+ }; -+ -+ wed0: wed@1020a000 { -+ compatible = "mediatek,mt7622-wed", -+ "syscon"; -+ reg = <0 0x1020a000 0 0x1000>; -+ interrupts = ; -+ }; -+ -+ wed1: wed@1020b000 { -+ compatible = "mediatek,mt7622-wed", -+ "syscon"; -+ reg = <0 0x1020b000 0 0x1000>; -+ interrupts = ; -+ }; -+ - eth: ethernet@1b100000 { - compatible = "mediatek,mt7622-eth", - "mediatek,mt2701-eth", -@@ -938,6 +963,9 @@ - mediatek,ethsys = <ðsys>; - mediatek,sgmiisys = <&sgmiisys>; - mediatek,cci-control = <&cci_control2>; -+ mediatek,wed = <&wed0>, <&wed1>; -+ mediatek,pcie-mirror = <&pcie_mirror>; -+ mediatek,hifsys = <&hifsys>; - dma-coherent; - #address-cells = <1>; - #size-cells = <0>; diff --git a/target/linux/generic/pending-5.10/750-skb-Do-mix-page-pool-and-page-referenced-frags-in-GR.patch b/target/linux/generic/pending-5.10/750-skb-Do-mix-page-pool-and-page-referenced-frags-in-GR.patch index 278a0b7e8..d64e334af 100644 --- a/target/linux/generic/pending-5.10/750-skb-Do-mix-page-pool-and-page-referenced-frags-in-GR.patch +++ b/target/linux/generic/pending-5.10/750-skb-Do-mix-page-pool-and-page-referenced-frags-in-GR.patch @@ -17,7 +17,7 @@ Signed-off-by: Alexander Duyck --- a/net/core/skbuff.c +++ b/net/core/skbuff.c -@@ -4176,6 +4176,15 @@ int skb_gro_receive(struct sk_buff *p, s +@@ -4188,6 +4188,15 @@ int skb_gro_receive(struct sk_buff *p, s if (unlikely(p->len + len >= 65536 || NAPI_GRO_CB(skb)->flush)) return -E2BIG; diff --git a/target/linux/generic/pending-5.10/810-pci_disable_common_quirks.patch b/target/linux/generic/pending-5.10/810-pci_disable_common_quirks.patch index 2a70e4cba..195968eee 100644 --- a/target/linux/generic/pending-5.10/810-pci_disable_common_quirks.patch +++ b/target/linux/generic/pending-5.10/810-pci_disable_common_quirks.patch @@ -25,7 +25,7 @@ Signed-off-by: Gabor Juhos --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c -@@ -206,6 +206,7 @@ static void quirk_mmio_always_on(struct +@@ -207,6 +207,7 @@ static void quirk_mmio_always_on(struct DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on); @@ -33,7 +33,7 @@ Signed-off-by: Gabor Juhos /* * The Mellanox Tavor device gives false positive parity errors. Mark this * device with a broken_parity_status to allow PCI scanning code to "skip" -@@ -3340,6 +3341,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I +@@ -3341,6 +3342,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata); @@ -42,7 +42,7 @@ Signed-off-by: Gabor Juhos /* * Ivytown NTB BAR sizes are misreported by the hardware due to an erratum. * To work around this, query the size it should be configured to by the -@@ -3365,6 +3368,8 @@ static void quirk_intel_ntb(struct pci_d +@@ -3366,6 +3369,8 @@ static void quirk_intel_ntb(struct pci_d DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb); @@ -51,7 +51,7 @@ Signed-off-by: Gabor Juhos /* * Some BIOS implementations leave the Intel GPU interrupts enabled, even * though no one is handling them (e.g., if the i915 driver is never -@@ -3403,6 +3408,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN +@@ -3404,6 +3409,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq); diff --git a/target/linux/generic/pending-5.10/920-mangle_bootargs.patch b/target/linux/generic/pending-5.10/920-mangle_bootargs.patch index 72a5ca4d2..79db26c27 100644 --- a/target/linux/generic/pending-5.10/920-mangle_bootargs.patch +++ b/target/linux/generic/pending-5.10/920-mangle_bootargs.patch @@ -61,7 +61,7 @@ Signed-off-by: Imre Kaloz /* * We need to store the untouched command line for future reference. * We also need to store the touched command line since the parameter -@@ -866,6 +889,7 @@ asmlinkage __visible void __init __no_sa +@@ -868,6 +891,7 @@ asmlinkage __visible void __init __no_sa pr_notice("%s", linux_banner); early_security_init(); setup_arch(&command_line); diff --git a/target/linux/generic/pending-5.15/150-bridge_allow_receiption_on_disabled_port.patch b/target/linux/generic/pending-5.15/150-bridge_allow_receiption_on_disabled_port.patch index 9968a7969..a64d3021d 100644 --- a/target/linux/generic/pending-5.15/150-bridge_allow_receiption_on_disabled_port.patch +++ b/target/linux/generic/pending-5.15/150-bridge_allow_receiption_on_disabled_port.patch @@ -15,7 +15,7 @@ Signed-off-by: Felix Fietkau --- a/net/bridge/br_input.c +++ b/net/bridge/br_input.c -@@ -204,6 +204,9 @@ static void __br_handle_local_finish(str +@@ -209,6 +209,9 @@ static void __br_handle_local_finish(str /* note: already called with rcu_read_lock */ static int br_handle_local_finish(struct net *net, struct sock *sk, struct sk_buff *skb) { @@ -25,7 +25,7 @@ Signed-off-by: Felix Fietkau __br_handle_local_finish(skb); /* return 1 to signal the okfn() was called so it's ok to use the skb */ -@@ -369,6 +372,17 @@ static rx_handler_result_t br_handle_fra +@@ -376,6 +379,17 @@ static rx_handler_result_t br_handle_fra forward: switch (p->state) { diff --git a/target/linux/generic/pending-5.15/495-mtd-core-add-get_mtd_device_by_node.patch b/target/linux/generic/pending-5.15/495-mtd-core-add-get_mtd_device_by_node.patch index 4c9bdccb1..ec35f4716 100644 --- a/target/linux/generic/pending-5.15/495-mtd-core-add-get_mtd_device_by_node.patch +++ b/target/linux/generic/pending-5.15/495-mtd-core-add-get_mtd_device_by_node.patch @@ -17,7 +17,7 @@ Reviewed-by: Miquel Raynal --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c -@@ -1240,6 +1240,44 @@ out_unlock: +@@ -1242,6 +1242,44 @@ out_unlock: } EXPORT_SYMBOL_GPL(get_mtd_device_nm); diff --git a/target/linux/generic/pending-5.15/630-packet_socket_type.patch b/target/linux/generic/pending-5.15/630-packet_socket_type.patch index c36e9e9fb..486ba9dee 100644 --- a/target/linux/generic/pending-5.15/630-packet_socket_type.patch +++ b/target/linux/generic/pending-5.15/630-packet_socket_type.patch @@ -87,7 +87,7 @@ Signed-off-by: Felix Fietkau if (!net_eq(dev_net(dev), sock_net(sk))) goto drop; -@@ -3346,6 +3348,7 @@ static int packet_create(struct net *net +@@ -3345,6 +3347,7 @@ static int packet_create(struct net *net mutex_init(&po->pg_vec_lock); po->rollover = NULL; po->prot_hook.func = packet_rcv; @@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau if (sock->type == SOCK_PACKET) po->prot_hook.func = packet_rcv_spkt; -@@ -3983,6 +3986,16 @@ packet_setsockopt(struct socket *sock, i +@@ -3982,6 +3985,16 @@ packet_setsockopt(struct socket *sock, i WRITE_ONCE(po->xmit, val ? packet_direct_xmit : dev_queue_xmit); return 0; } @@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau default: return -ENOPROTOOPT; } -@@ -4039,6 +4052,13 @@ static int packet_getsockopt(struct sock +@@ -4038,6 +4051,13 @@ static int packet_getsockopt(struct sock case PACKET_VNET_HDR: val = po->has_vnet_hdr; break; diff --git a/target/linux/generic/pending-5.15/655-increase_skb_pad.patch b/target/linux/generic/pending-5.15/655-increase_skb_pad.patch index 5d100270a..e9075f43c 100644 --- a/target/linux/generic/pending-5.15/655-increase_skb_pad.patch +++ b/target/linux/generic/pending-5.15/655-increase_skb_pad.patch @@ -9,7 +9,7 @@ Signed-off-by: Felix Fietkau --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h -@@ -2821,7 +2821,7 @@ static inline int pskb_network_may_pull( +@@ -2836,7 +2836,7 @@ static inline int pskb_network_may_pull( * NET_IP_ALIGN(2) + ethernet_header(14) + IP_header(20/40) + ports(8) */ #ifndef NET_SKB_PAD diff --git a/target/linux/generic/pending-5.15/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-5.15/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch index 4c97d8b9e..d4e274e9a 100644 --- a/target/linux/generic/pending-5.15/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch +++ b/target/linux/generic/pending-5.15/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch @@ -110,7 +110,7 @@ Signed-off-by: Jonas Gorski return -EINVAL; --- a/net/ipv6/route.c +++ b/net/ipv6/route.c -@@ -97,6 +97,8 @@ static int ip6_pkt_discard(struct sk_bu +@@ -98,6 +98,8 @@ static int ip6_pkt_discard(struct sk_bu static int ip6_pkt_discard_out(struct net *net, struct sock *sk, struct sk_buff *skb); static int ip6_pkt_prohibit(struct sk_buff *skb); static int ip6_pkt_prohibit_out(struct net *net, struct sock *sk, struct sk_buff *skb); @@ -119,7 +119,7 @@ Signed-off-by: Jonas Gorski static void ip6_link_failure(struct sk_buff *skb); static void ip6_rt_update_pmtu(struct dst_entry *dst, struct sock *sk, struct sk_buff *skb, u32 mtu, -@@ -312,6 +314,18 @@ static const struct rt6_info ip6_prohibi +@@ -313,6 +315,18 @@ static const struct rt6_info ip6_prohibi .rt6i_flags = (RTF_REJECT | RTF_NONEXTHOP), }; @@ -138,7 +138,7 @@ Signed-off-by: Jonas Gorski static const struct rt6_info ip6_blk_hole_entry_template = { .dst = { .__refcnt = ATOMIC_INIT(1), -@@ -1033,6 +1047,7 @@ static const int fib6_prop[RTN_MAX + 1] +@@ -1034,6 +1048,7 @@ static const int fib6_prop[RTN_MAX + 1] [RTN_BLACKHOLE] = -EINVAL, [RTN_UNREACHABLE] = -EHOSTUNREACH, [RTN_PROHIBIT] = -EACCES, @@ -146,7 +146,7 @@ Signed-off-by: Jonas Gorski [RTN_THROW] = -EAGAIN, [RTN_NAT] = -EINVAL, [RTN_XRESOLVE] = -EINVAL, -@@ -1068,6 +1083,10 @@ static void ip6_rt_init_dst_reject(struc +@@ -1069,6 +1084,10 @@ static void ip6_rt_init_dst_reject(struc rt->dst.output = ip6_pkt_prohibit_out; rt->dst.input = ip6_pkt_prohibit; break; @@ -157,7 +157,7 @@ Signed-off-by: Jonas Gorski case RTN_THROW: case RTN_UNREACHABLE: default: -@@ -4557,6 +4576,17 @@ static int ip6_pkt_prohibit_out(struct n +@@ -4561,6 +4580,17 @@ static int ip6_pkt_prohibit_out(struct n return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES); } @@ -175,7 +175,7 @@ Signed-off-by: Jonas Gorski /* * Allocate a dst for local (unicast / anycast) address. */ -@@ -5044,7 +5074,8 @@ static int rtm_to_fib6_config(struct sk_ +@@ -5048,7 +5078,8 @@ static int rtm_to_fib6_config(struct sk_ if (rtm->rtm_type == RTN_UNREACHABLE || rtm->rtm_type == RTN_BLACKHOLE || rtm->rtm_type == RTN_PROHIBIT || @@ -185,7 +185,7 @@ Signed-off-by: Jonas Gorski cfg->fc_flags |= RTF_REJECT; if (rtm->rtm_type == RTN_LOCAL) -@@ -6291,6 +6322,8 @@ static int ip6_route_dev_notify(struct n +@@ -6295,6 +6326,8 @@ static int ip6_route_dev_notify(struct n #ifdef CONFIG_IPV6_MULTIPLE_TABLES net->ipv6.ip6_prohibit_entry->dst.dev = dev; net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev); @@ -194,7 +194,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_blk_hole_entry->dst.dev = dev; net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev); #endif -@@ -6302,6 +6335,7 @@ static int ip6_route_dev_notify(struct n +@@ -6306,6 +6339,7 @@ static int ip6_route_dev_notify(struct n in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev); #ifdef CONFIG_IPV6_MULTIPLE_TABLES in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev); @@ -202,7 +202,7 @@ Signed-off-by: Jonas Gorski in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev); #endif } -@@ -6493,6 +6527,8 @@ static int __net_init ip6_route_net_init +@@ -6497,6 +6531,8 @@ static int __net_init ip6_route_net_init #ifdef CONFIG_IPV6_MULTIPLE_TABLES net->ipv6.fib6_has_custom_rules = false; @@ -211,7 +211,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template, sizeof(*net->ipv6.ip6_prohibit_entry), GFP_KERNEL); -@@ -6503,11 +6539,21 @@ static int __net_init ip6_route_net_init +@@ -6507,11 +6543,21 @@ static int __net_init ip6_route_net_init ip6_template_metrics, true); INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached); @@ -234,7 +234,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops; dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst, ip6_template_metrics, true); -@@ -6534,6 +6580,8 @@ out: +@@ -6538,6 +6584,8 @@ out: return ret; #ifdef CONFIG_IPV6_MULTIPLE_TABLES @@ -243,7 +243,7 @@ Signed-off-by: Jonas Gorski out_ip6_prohibit_entry: kfree(net->ipv6.ip6_prohibit_entry); out_ip6_null_entry: -@@ -6553,6 +6601,7 @@ static void __net_exit ip6_route_net_exi +@@ -6557,6 +6605,7 @@ static void __net_exit ip6_route_net_exi kfree(net->ipv6.ip6_null_entry); #ifdef CONFIG_IPV6_MULTIPLE_TABLES kfree(net->ipv6.ip6_prohibit_entry); @@ -251,7 +251,7 @@ Signed-off-by: Jonas Gorski kfree(net->ipv6.ip6_blk_hole_entry); #endif dst_entries_destroy(&net->ipv6.ip6_dst_ops); -@@ -6636,6 +6685,9 @@ void __init ip6_route_init_special_entri +@@ -6640,6 +6689,9 @@ void __init ip6_route_init_special_entri init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev; init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); diff --git a/target/linux/generic/pending-5.15/680-NET-skip-GRO-for-foreign-MAC-addresses.patch b/target/linux/generic/pending-5.15/680-NET-skip-GRO-for-foreign-MAC-addresses.patch index 8cb8eeb3c..d2f0168a1 100644 --- a/target/linux/generic/pending-5.15/680-NET-skip-GRO-for-foreign-MAC-addresses.patch +++ b/target/linux/generic/pending-5.15/680-NET-skip-GRO-for-foreign-MAC-addresses.patch @@ -22,14 +22,14 @@ Signed-off-by: Felix Fietkau #endif --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h -@@ -893,6 +893,7 @@ struct sk_buff { - #ifdef CONFIG_IPV6_NDISC_NODETYPE - __u8 ndisc_nodetype:2; +@@ -918,6 +918,7 @@ struct sk_buff { + #ifdef CONFIG_NET_SCHED + __u16 tc_index; /* traffic control index */ #endif + __u8 gro_skip:1; - __u8 ipvs_property:1; - __u8 inner_protocol_type:1; + union { + __wsum csum; --- a/net/core/dev.c +++ b/net/core/dev.c @@ -6092,6 +6092,9 @@ static enum gro_result dev_gro_receive(s @@ -136,14 +136,13 @@ Signed-off-by: Felix Fietkau /** * eth_type_trans - determine the packet's protocol ID. * @skb: received socket data -@@ -173,6 +185,10 @@ __be16 eth_type_trans(struct sk_buff *sk - } else { - skb->pkt_type = PACKET_OTHERHOST; - } -+ -+ if (eth_check_local_mask(eth->h_dest, dev->dev_addr, -+ dev->local_addr_mask)) -+ skb->gro_skip = 1; - } +@@ -165,6 +177,9 @@ __be16 eth_type_trans(struct sk_buff *sk + eth_skb_pkt_type(skb, dev); + ++ if (eth_check_local_mask(eth->h_dest, dev->dev_addr, ++ dev->local_addr_mask)) ++ skb->gro_skip = 1; /* + * Some variants of DSA tagging don't have an ethertype field + * at all, so we check here whether one of those tagging diff --git a/target/linux/generic/pending-5.15/700-netfilter-nft_flow_offload-handle-netdevice-events-f.patch b/target/linux/generic/pending-5.15/700-netfilter-nft_flow_offload-handle-netdevice-events-f.patch index 8c7555403..ba75e4a0f 100644 --- a/target/linux/generic/pending-5.15/700-netfilter-nft_flow_offload-handle-netdevice-events-f.patch +++ b/target/linux/generic/pending-5.15/700-netfilter-nft_flow_offload-handle-netdevice-events-f.patch @@ -10,9 +10,9 @@ Signed-off-by: Pablo Neira Ayuso --- a/net/netfilter/nf_flow_table_core.c +++ b/net/netfilter/nf_flow_table_core.c -@@ -606,13 +606,41 @@ void nf_flow_table_free(struct nf_flowta - } - EXPORT_SYMBOL_GPL(nf_flow_table_free); +@@ -651,6 +651,23 @@ static struct pernet_operations nf_flow_ + .exit_batch = nf_flow_table_pernet_exit, + }; +static int nf_flow_table_netdev_event(struct notifier_block *this, + unsigned long event, void *ptr) @@ -33,26 +33,30 @@ Signed-off-by: Pablo Neira Ayuso + static int __init nf_flow_table_module_init(void) { -- return nf_flow_table_offload_init(); -+ int ret; -+ -+ ret = nf_flow_table_offload_init(); -+ if (ret) -+ return ret; -+ + int ret; +@@ -663,8 +680,14 @@ static int __init nf_flow_table_module_i + if (ret) + goto out_offload; + + ret = register_netdevice_notifier(&flow_offload_netdev_notifier); + if (ret) -+ nf_flow_table_offload_exit(); ++ goto out_offload_init; + -+ return ret; - } + return 0; + ++out_offload_init: ++ nf_flow_table_offload_exit(); + out_offload: + unregister_pernet_subsys(&nf_flow_table_net_ops); + return ret; +@@ -672,6 +695,7 @@ out_offload: static void __exit nf_flow_table_module_exit(void) { + unregister_netdevice_notifier(&flow_offload_netdev_notifier); nf_flow_table_offload_exit(); + unregister_pernet_subsys(&nf_flow_table_net_ops); } - --- a/net/netfilter/nft_flow_offload.c +++ b/net/netfilter/nft_flow_offload.c @@ -455,47 +455,14 @@ static struct nft_expr_type nft_flow_off diff --git a/target/linux/generic/pending-5.15/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch b/target/linux/generic/pending-5.15/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch index fefe5fedc..9b5d9798a 100644 --- a/target/linux/generic/pending-5.15/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch +++ b/target/linux/generic/pending-5.15/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch @@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -2994,8 +2994,8 @@ static irqreturn_t mtk_handle_irq_rx(int +@@ -3097,8 +3097,8 @@ static irqreturn_t mtk_handle_irq_rx(int eth->rx_events++; if (likely(napi_schedule_prep(ð->rx_napi))) { @@ -20,7 +20,7 @@ Signed-off-by: Felix Fietkau } return IRQ_HANDLED; -@@ -3007,8 +3007,8 @@ static irqreturn_t mtk_handle_irq_tx(int +@@ -3110,8 +3110,8 @@ static irqreturn_t mtk_handle_irq_tx(int eth->tx_events++; if (likely(napi_schedule_prep(ð->tx_napi))) { @@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau } return IRQ_HANDLED; -@@ -4668,6 +4668,8 @@ static int mtk_probe(struct platform_dev +@@ -4885,6 +4885,8 @@ static int mtk_probe(struct platform_dev * for NAPI to work */ init_dummy_netdev(ð->dummy_dev); diff --git a/target/linux/generic/pending-5.15/703-phy-add-detach-callback-to-struct-phy_driver.patch b/target/linux/generic/pending-5.15/703-phy-add-detach-callback-to-struct-phy_driver.patch index 5baccf73c..83587b5c9 100644 --- a/target/linux/generic/pending-5.15/703-phy-add-detach-callback-to-struct-phy_driver.patch +++ b/target/linux/generic/pending-5.15/703-phy-add-detach-callback-to-struct-phy_driver.patch @@ -11,7 +11,7 @@ Signed-off-by: Gabor Juhos --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c -@@ -1748,6 +1748,9 @@ void phy_detach(struct phy_device *phyde +@@ -1751,6 +1751,9 @@ void phy_detach(struct phy_device *phyde struct module *ndev_owner = NULL; struct mii_bus *bus; @@ -23,7 +23,7 @@ Signed-off-by: Gabor Juhos sysfs_remove_link(&dev->dev.kobj, "phydev"); --- a/include/linux/phy.h +++ b/include/linux/phy.h -@@ -823,6 +823,12 @@ struct phy_driver { +@@ -843,6 +843,12 @@ struct phy_driver { /** @handle_interrupt: Override default interrupt handling */ irqreturn_t (*handle_interrupt)(struct phy_device *phydev); diff --git a/target/linux/generic/pending-5.15/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch b/target/linux/generic/pending-5.15/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch index bbbebefdd..fd1b79cdf 100644 --- a/target/linux/generic/pending-5.15/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch +++ b/target/linux/generic/pending-5.15/710-bridge-add-knob-for-filtering-rx-tx-BPDU-pack.patch @@ -45,7 +45,7 @@ Signed-off-by: Felix Fietkau if (!(p->flags & BR_BCAST_FLOOD) && skb->dev != br->dev) --- a/net/bridge/br_input.c +++ b/net/bridge/br_input.c -@@ -326,6 +326,8 @@ static rx_handler_result_t br_handle_fra +@@ -331,6 +331,8 @@ static rx_handler_result_t br_handle_fra fwd_mask |= p->group_fwd_mask; switch (dest[5]) { case 0x00: /* Bridge Group Address */ diff --git a/target/linux/generic/pending-5.15/723-net-mt7531-ensure-all-MACs-are-powered-down-before-r.patch b/target/linux/generic/pending-5.15/723-net-mt7531-ensure-all-MACs-are-powered-down-before-r.patch index 9ae65b871..792135b0d 100644 --- a/target/linux/generic/pending-5.15/723-net-mt7531-ensure-all-MACs-are-powered-down-before-r.patch +++ b/target/linux/generic/pending-5.15/723-net-mt7531-ensure-all-MACs-are-powered-down-before-r.patch @@ -15,16 +15,7 @@ Signed-off-by: Alexander Couzens --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2628,7 +2628,7 @@ mt7531_setup(struct dsa_switch *ds) - struct mt7530_priv *priv = ds->priv; - struct mt7530_dummy_poll p; - u32 val, id; -- int ret; -+ int ret, i; - - /* Reset whole chip through gpio pin or memory-mapped registers for - * different type of hardware -@@ -2660,6 +2660,10 @@ mt7531_setup(struct dsa_switch *ds) +@@ -2680,6 +2680,10 @@ mt7531_setup(struct dsa_switch *ds) return -ENODEV; } diff --git a/target/linux/generic/pending-5.15/732-00-net-ethernet-mtk_eth_soc-compile-out-netsys-v2-code-.patch b/target/linux/generic/pending-5.15/732-00-net-ethernet-mtk_eth_soc-compile-out-netsys-v2-code-.patch new file mode 100644 index 000000000..1d84ea9ce --- /dev/null +++ b/target/linux/generic/pending-5.15/732-00-net-ethernet-mtk_eth_soc-compile-out-netsys-v2-code-.patch @@ -0,0 +1,44 @@ +From: Felix Fietkau +Date: Thu, 27 Oct 2022 23:39:52 +0200 +Subject: [PATCH] net: ethernet: mtk_eth_soc: compile out netsys v2 code + on mt7621 + +Avoid some branches in the hot path on low-end devices with limited CPU power, +and reduce code size + +Signed-off-by: Felix Fietkau +--- + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -1323,6 +1323,22 @@ struct mtk_mac { + /* the struct describing the SoC. these are declared in the soc_xyz.c files */ + extern const struct of_device_id of_mtk_match[]; + ++#ifdef CONFIG_SOC_MT7621 ++static inline bool mtk_is_netsys_v1(struct mtk_eth *eth) ++{ ++ return true; ++} ++ ++static inline bool mtk_is_netsys_v2_or_greater(struct mtk_eth *eth) ++{ ++ return false; ++} ++ ++static inline bool mtk_is_netsys_v3_or_greater(struct mtk_eth *eth) ++{ ++ return false; ++} ++#else + static inline bool mtk_is_netsys_v1(struct mtk_eth *eth) + { + return eth->soc->version == 1; +@@ -1337,6 +1353,7 @@ static inline bool mtk_is_netsys_v3_or_g + { + return eth->soc->version > 2; + } ++#endif + + static inline struct mtk_foe_entry * + mtk_foe_get_entry(struct mtk_ppe *ppe, u16 hash) diff --git a/target/linux/generic/pending-5.15/732-01-net-ethernet-mtk_eth_soc-work-around-issue-with-send.patch b/target/linux/generic/pending-5.15/732-01-net-ethernet-mtk_eth_soc-work-around-issue-with-send.patch index 57162ffe0..9df011fbe 100644 --- a/target/linux/generic/pending-5.15/732-01-net-ethernet-mtk_eth_soc-work-around-issue-with-send.patch +++ b/target/linux/generic/pending-5.15/732-01-net-ethernet-mtk_eth_soc-work-around-issue-with-send.patch @@ -16,7 +16,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -1422,12 +1422,28 @@ static void mtk_wake_queue(struct mtk_et +@@ -1515,12 +1515,28 @@ static void mtk_wake_queue(struct mtk_et } } @@ -45,11 +45,11 @@ Signed-off-by: Felix Fietkau bool gso = false; int tx_num; -@@ -1449,6 +1465,18 @@ static netdev_tx_t mtk_start_xmit(struct +@@ -1542,6 +1558,18 @@ static netdev_tx_t mtk_start_xmit(struct return NETDEV_TX_BUSY; } -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) && ++ if (mtk_is_netsys_v1(eth) && + skb_is_gso(skb) && mtk_skb_has_small_frag(skb)) { + segs = skb_gso_segment(skb, dev->features & ~NETIF_F_ALL_TSO); + if (IS_ERR(segs)) @@ -64,14 +64,14 @@ Signed-off-by: Felix Fietkau /* TSO: fill MSS info in tcp checksum field */ if (skb_is_gso(skb)) { if (skb_cow_head(skb, 0)) { -@@ -1464,8 +1492,14 @@ static netdev_tx_t mtk_start_xmit(struct +@@ -1557,8 +1585,14 @@ static netdev_tx_t mtk_start_xmit(struct } } - if (mtk_tx_map(skb, dev, tx_num, ring, gso) < 0) - goto drop; + skb_list_walk_safe(skb, skb, next) { -+ if ((!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) && ++ if ((mtk_is_netsys_v1(eth) && + mtk_skb_has_small_frag(skb) && skb_linearize(skb)) || + mtk_tx_map(skb, dev, tx_num, ring, gso) < 0) { + stats->tx_dropped++; @@ -83,7 +83,7 @@ Signed-off-by: Felix Fietkau netif_tx_stop_all_queues(dev); --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -258,7 +258,7 @@ +@@ -268,7 +268,7 @@ #define MTK_CHK_DDONE_EN BIT(28) #define MTK_DMAD_WR_WDONE BIT(26) #define MTK_WCOMP_EN BIT(24) diff --git a/target/linux/generic/pending-5.15/732-02-net-ethernet-mtk_eth_soc-set-NETIF_F_ALL_TSO.patch b/target/linux/generic/pending-5.15/732-02-net-ethernet-mtk_eth_soc-set-NETIF_F_ALL_TSO.patch index 3c6359ee4..11a81dd0b 100644 --- a/target/linux/generic/pending-5.15/732-02-net-ethernet-mtk_eth_soc-set-NETIF_F_ALL_TSO.patch +++ b/target/linux/generic/pending-5.15/732-02-net-ethernet-mtk_eth_soc-set-NETIF_F_ALL_TSO.patch @@ -9,7 +9,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -48,8 +48,7 @@ +@@ -47,8 +47,7 @@ #define MTK_HW_FEATURES (NETIF_F_IP_CSUM | \ NETIF_F_RXCSUM | \ NETIF_F_HW_VLAN_CTAG_TX | \ diff --git a/target/linux/generic/pending-5.15/732-03-net-ethernet-mtk_eth_soc-fix-remaining-throughput-re.patch b/target/linux/generic/pending-5.15/732-03-net-ethernet-mtk_eth_soc-fix-remaining-throughput-re.patch index 07ed67ce6..243e2f9d0 100644 --- a/target/linux/generic/pending-5.15/732-03-net-ethernet-mtk_eth_soc-fix-remaining-throughput-re.patch +++ b/target/linux/generic/pending-5.15/732-03-net-ethernet-mtk_eth_soc-fix-remaining-throughput-re.patch @@ -22,7 +22,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -666,6 +666,7 @@ static void mtk_mac_link_up(struct phyli +@@ -722,6 +722,7 @@ static void mtk_mac_link_up(struct phyli MAC_MCR_FORCE_RX_FC); /* Configure speed */ @@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau switch (speed) { case SPEED_2500: case SPEED_1000: -@@ -3147,6 +3148,9 @@ found: +@@ -3290,6 +3291,9 @@ found: if (dp->index >= MTK_QDMA_NUM_QUEUES) return NOTIFY_DONE; diff --git a/target/linux/generic/pending-5.15/734-net-ethernet-mtk_eth_soc-ppe-fix-L2-offloading-with-.patch b/target/linux/generic/pending-5.15/734-net-ethernet-mtk_eth_soc-ppe-fix-L2-offloading-with-.patch index 9ef65ec16..104ce00b7 100644 --- a/target/linux/generic/pending-5.15/734-net-ethernet-mtk_eth_soc-ppe-fix-L2-offloading-with-.patch +++ b/target/linux/generic/pending-5.15/734-net-ethernet-mtk_eth_soc-ppe-fix-L2-offloading-with-.patch @@ -20,7 +20,7 @@ Signed-off-by: Felix Fietkau #include #include "mtk_eth_soc.h" #include "mtk_ppe.h" -@@ -757,7 +758,9 @@ void __mtk_ppe_check_skb(struct mtk_ppe +@@ -781,7 +782,9 @@ void __mtk_ppe_check_skb(struct mtk_ppe skb->dev->dsa_ptr->tag_ops->proto != DSA_TAG_PROTO_MTK) goto out; diff --git a/target/linux/generic/pending-5.15/736-01-net-ethernet-mtk_eth_soc-add-code-for-offloading-flo.patch b/target/linux/generic/pending-5.15/736-01-net-ethernet-mtk_eth_soc-add-code-for-offloading-flo.patch index 1340d64ce..ba2db7c72 100644 --- a/target/linux/generic/pending-5.15/736-01-net-ethernet-mtk_eth_soc-add-code-for-offloading-flo.patch +++ b/target/linux/generic/pending-5.15/736-01-net-ethernet-mtk_eth_soc-add-code-for-offloading-flo.patch @@ -14,7 +14,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -1277,6 +1277,9 @@ int mtk_gmac_rgmii_path_setup(struct mtk +@@ -1448,6 +1448,9 @@ int mtk_gmac_rgmii_path_setup(struct mtk int mtk_eth_offload_init(struct mtk_eth *eth); int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type, void *type_data); @@ -120,7 +120,7 @@ Signed-off-by: Felix Fietkau static void wed_m32(struct mtk_wed_device *dev, u32 reg, u32 mask, u32 val) { -@@ -1752,6 +1759,99 @@ out: +@@ -1760,6 +1767,99 @@ out: mutex_unlock(&hw_lock); } @@ -220,7 +220,7 @@ Signed-off-by: Felix Fietkau void mtk_wed_add_hw(struct device_node *np, struct mtk_eth *eth, void __iomem *wdma, phys_addr_t wdma_phy, int index) -@@ -1771,6 +1871,7 @@ void mtk_wed_add_hw(struct device_node * +@@ -1779,6 +1879,7 @@ void mtk_wed_add_hw(struct device_node * .irq_set_mask = mtk_wed_irq_set_mask, .detach = mtk_wed_detach, .ppe_check = mtk_wed_ppe_check, diff --git a/target/linux/generic/pending-5.15/736-02-net-ethernet-mediatek-mtk_ppe-prefer-newly-added-l2-.patch b/target/linux/generic/pending-5.15/736-02-net-ethernet-mediatek-mtk_ppe-prefer-newly-added-l2-.patch index 6e17e4dc5..e89d4cd97 100644 --- a/target/linux/generic/pending-5.15/736-02-net-ethernet-mediatek-mtk_ppe-prefer-newly-added-l2-.patch +++ b/target/linux/generic/pending-5.15/736-02-net-ethernet-mediatek-mtk_ppe-prefer-newly-added-l2-.patch @@ -12,7 +12,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_ppe.c +++ b/drivers/net/ethernet/mediatek/mtk_ppe.c -@@ -639,10 +639,20 @@ void mtk_foe_entry_clear(struct mtk_ppe +@@ -663,10 +663,20 @@ void mtk_foe_entry_clear(struct mtk_ppe static int mtk_foe_entry_commit_l2(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) { diff --git a/target/linux/generic/pending-5.15/736-03-net-ethernet-mtk_eth_soc-improve-keeping-track-of-of.patch b/target/linux/generic/pending-5.15/736-03-net-ethernet-mtk_eth_soc-improve-keeping-track-of-of.patch index 29d6e0b09..c8be7a9e2 100644 --- a/target/linux/generic/pending-5.15/736-03-net-ethernet-mtk_eth_soc-improve-keeping-track-of-of.patch +++ b/target/linux/generic/pending-5.15/736-03-net-ethernet-mtk_eth_soc-improve-keeping-track-of-of.patch @@ -12,7 +12,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_ppe.c +++ b/drivers/net/ethernet/mediatek/mtk_ppe.c -@@ -466,42 +466,43 @@ int mtk_foe_entry_set_queue(struct mtk_e +@@ -483,42 +483,43 @@ int mtk_foe_entry_set_queue(struct mtk_e return 0; } @@ -72,7 +72,7 @@ Signed-off-by: Felix Fietkau struct mtk_foe_entry *hwe = mtk_foe_get_entry(ppe, entry->hash); hwe->ib1 &= ~MTK_FOE_IB1_STATE; -@@ -520,7 +521,8 @@ __mtk_foe_entry_clear(struct mtk_ppe *pp +@@ -538,7 +539,8 @@ __mtk_foe_entry_clear(struct mtk_ppe *pp if (entry->type != MTK_FLOW_TYPE_L2_SUBFLOW) return; @@ -82,7 +82,7 @@ Signed-off-by: Felix Fietkau kfree(entry); } -@@ -536,66 +538,55 @@ static int __mtk_foe_entry_idle_time(str +@@ -554,66 +556,55 @@ static int __mtk_foe_entry_idle_time(str return now - timestamp; } @@ -178,7 +178,7 @@ Signed-off-by: Felix Fietkau } static void -@@ -632,7 +623,8 @@ __mtk_foe_entry_commit(struct mtk_ppe *p +@@ -656,7 +647,8 @@ __mtk_foe_entry_commit(struct mtk_ppe *p void mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) { spin_lock_bh(&ppe_lock); @@ -188,7 +188,7 @@ Signed-off-by: Felix Fietkau spin_unlock_bh(&ppe_lock); } -@@ -679,8 +671,8 @@ mtk_foe_entry_commit_subflow(struct mtk_ +@@ -703,8 +695,8 @@ mtk_foe_entry_commit_subflow(struct mtk_ { const struct mtk_soc_data *soc = ppe->eth->soc; struct mtk_flow_entry *flow_info; @@ -198,7 +198,7 @@ Signed-off-by: Felix Fietkau u32 ib1_mask = mtk_get_ib1_pkt_type_mask(ppe->eth) | MTK_FOE_IB1_UDP; int type; -@@ -688,30 +680,30 @@ mtk_foe_entry_commit_subflow(struct mtk_ +@@ -712,30 +704,30 @@ mtk_foe_entry_commit_subflow(struct mtk_ if (!flow_info) return; @@ -239,7 +239,7 @@ Signed-off-by: Felix Fietkau } void __mtk_ppe_check_skb(struct mtk_ppe *ppe, struct sk_buff *skb, u16 hash) -@@ -721,9 +713,11 @@ void __mtk_ppe_check_skb(struct mtk_ppe +@@ -745,9 +737,11 @@ void __mtk_ppe_check_skb(struct mtk_ppe struct mtk_foe_entry *hwe = mtk_foe_get_entry(ppe, hash); struct mtk_flow_entry *entry; struct mtk_foe_bridge key = {}; @@ -251,7 +251,7 @@ Signed-off-by: Felix Fietkau u8 *tag; spin_lock_bh(&ppe_lock); -@@ -731,20 +725,14 @@ void __mtk_ppe_check_skb(struct mtk_ppe +@@ -755,20 +749,14 @@ void __mtk_ppe_check_skb(struct mtk_ppe if (FIELD_GET(MTK_FOE_IB1_STATE, hwe->ib1) == MTK_FOE_STATE_BIND) goto out; @@ -278,7 +278,7 @@ Signed-off-by: Felix Fietkau continue; } -@@ -795,9 +783,17 @@ out: +@@ -819,9 +807,17 @@ out: int mtk_foe_entry_idle_time(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) { @@ -300,7 +300,7 @@ Signed-off-by: Felix Fietkau int mtk_ppe_prepare_reset(struct mtk_ppe *ppe) --- a/drivers/net/ethernet/mediatek/mtk_ppe.h +++ b/drivers/net/ethernet/mediatek/mtk_ppe.h -@@ -265,7 +265,12 @@ enum { +@@ -286,7 +286,12 @@ enum { struct mtk_flow_entry { union { @@ -314,7 +314,7 @@ Signed-off-by: Felix Fietkau struct { struct rhash_head l2_node; struct hlist_head l2_flows; -@@ -275,13 +280,7 @@ struct mtk_flow_entry { +@@ -296,13 +301,7 @@ struct mtk_flow_entry { s8 wed_index; u8 ppe_index; u16 hash; diff --git a/target/linux/generic/pending-5.15/736-04-net-ethernet-mediatek-fix-ppe-flow-accounting-for-L2.patch b/target/linux/generic/pending-5.15/736-04-net-ethernet-mediatek-fix-ppe-flow-accounting-for-L2.patch index dcc39ae42..bf543464c 100644 --- a/target/linux/generic/pending-5.15/736-04-net-ethernet-mediatek-fix-ppe-flow-accounting-for-L2.patch +++ b/target/linux/generic/pending-5.15/736-04-net-ethernet-mediatek-fix-ppe-flow-accounting-for-L2.patch @@ -27,7 +27,7 @@ Signed-off-by: Felix Fietkau if (ret) dev_err(ppe->dev, "MIB table busy"); -@@ -90,18 +90,32 @@ static int mtk_ppe_mib_wait_busy(struct +@@ -90,17 +90,31 @@ static int mtk_ppe_mib_wait_busy(struct return ret; } @@ -43,7 +43,6 @@ Signed-off-by: Felix Fietkau + +struct mtk_foe_accounting *mtk_ppe_mib_entry_read(struct mtk_ppe *ppe, u16 index) { - u32 byte_cnt_low, byte_cnt_high, pkt_cnt_low, pkt_cnt_high; u32 val, cnt_r0, cnt_r1, cnt_r2; + struct mtk_foe_accounting *acct; int ret; @@ -62,25 +61,35 @@ Signed-off-by: Felix Fietkau cnt_r0 = readl(ppe->base + MTK_PPE_MIB_SER_R0); cnt_r1 = readl(ppe->base + MTK_PPE_MIB_SER_R1); -@@ -111,10 +125,11 @@ static int mtk_mib_entry_read(struct mtk - byte_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R1_BYTE_CNT_HIGH, cnt_r1); - pkt_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R1_PKT_CNT_LOW, cnt_r1); - pkt_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R2_PKT_CNT_HIGH, cnt_r2); -- *bytes = ((u64)byte_cnt_high << 32) | byte_cnt_low; -- *packets = (pkt_cnt_high << 16) | pkt_cnt_low; +@@ -109,19 +123,19 @@ static int mtk_mib_entry_read(struct mtk + if (mtk_is_netsys_v3_or_greater(ppe->eth)) { + /* 64 bit for each counter */ + u32 cnt_r3 = readl(ppe->base + MTK_PPE_MIB_SER_R3); +- *bytes = ((u64)cnt_r1 << 32) | cnt_r0; +- *packets = ((u64)cnt_r3 << 32) | cnt_r2; ++ acct->bytes += ((u64)cnt_r1 << 32) | cnt_r0; ++ acct->packets += ((u64)cnt_r3 << 32) | cnt_r2; + } else { + /* 48 bit byte counter, 40 bit packet counter */ + u32 byte_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R0_BYTE_CNT_LOW, cnt_r0); + u32 byte_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R1_BYTE_CNT_HIGH, cnt_r1); + u32 pkt_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R1_PKT_CNT_LOW, cnt_r1); + u32 pkt_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R2_PKT_CNT_HIGH, cnt_r2); +- *bytes = ((u64)byte_cnt_high << 32) | byte_cnt_low; +- *packets = (pkt_cnt_high << 16) | pkt_cnt_low; ++ acct->bytes += ((u64)byte_cnt_high << 32) | byte_cnt_low; ++ acct->packets += (pkt_cnt_high << 16) | pkt_cnt_low; + } - return 0; -+ acct->bytes += ((u64)byte_cnt_high << 32) | byte_cnt_low; -+ acct->packets += (pkt_cnt_high << 16) | pkt_cnt_low; -+ + return acct; } static void mtk_ppe_cache_clear(struct mtk_ppe *ppe) -@@ -508,13 +523,6 @@ __mtk_foe_entry_clear(struct mtk_ppe *pp - hwe->ib1 &= ~MTK_FOE_IB1_STATE; +@@ -526,13 +540,6 @@ __mtk_foe_entry_clear(struct mtk_ppe *pp hwe->ib1 |= FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_INVALID); dma_wmb(); + mtk_ppe_cache_clear(ppe); - if (ppe->accounting) { - struct mtk_foe_accounting *acct; - @@ -91,7 +100,7 @@ Signed-off-by: Felix Fietkau } entry->hash = 0xffff; -@@ -539,11 +547,14 @@ static int __mtk_foe_entry_idle_time(str +@@ -557,11 +564,14 @@ static int __mtk_foe_entry_idle_time(str } static bool @@ -107,7 +116,7 @@ Signed-off-by: Felix Fietkau int len; if (hash == 0xffff) -@@ -554,18 +565,35 @@ mtk_flow_entry_update(struct mtk_ppe *pp +@@ -572,18 +582,35 @@ mtk_flow_entry_update(struct mtk_ppe *pp memcpy(&foe, hwe, len); if (!mtk_flow_entry_match(ppe->eth, entry, &foe, len) || @@ -146,7 +155,7 @@ Signed-off-by: Felix Fietkau struct mtk_flow_entry *cur; struct hlist_node *tmp; int idle; -@@ -574,7 +602,9 @@ mtk_flow_entry_update_l2(struct mtk_ppe +@@ -592,7 +619,9 @@ mtk_flow_entry_update_l2(struct mtk_ppe hlist_for_each_entry_safe(cur, tmp, &entry->l2_flows, l2_list) { int cur_idle; @@ -157,7 +166,7 @@ Signed-off-by: Felix Fietkau __mtk_foe_entry_clear(ppe, entry, false); continue; } -@@ -589,10 +619,29 @@ mtk_flow_entry_update_l2(struct mtk_ppe +@@ -607,10 +636,29 @@ mtk_flow_entry_update_l2(struct mtk_ppe } } @@ -187,7 +196,7 @@ Signed-off-by: Felix Fietkau struct mtk_eth *eth = ppe->eth; u16 timestamp = mtk_eth_timestamp(eth); struct mtk_foe_entry *hwe; -@@ -617,6 +666,12 @@ __mtk_foe_entry_commit(struct mtk_ppe *p +@@ -641,6 +689,12 @@ __mtk_foe_entry_commit(struct mtk_ppe *p dma_wmb(); @@ -200,7 +209,7 @@ Signed-off-by: Felix Fietkau mtk_ppe_cache_clear(ppe); } -@@ -781,21 +836,6 @@ out: +@@ -805,21 +859,6 @@ out: spin_unlock_bh(&ppe_lock); } @@ -222,7 +231,7 @@ Signed-off-by: Felix Fietkau int mtk_ppe_prepare_reset(struct mtk_ppe *ppe) { if (!ppe) -@@ -823,32 +863,6 @@ int mtk_ppe_prepare_reset(struct mtk_ppe +@@ -847,32 +886,6 @@ int mtk_ppe_prepare_reset(struct mtk_ppe return mtk_ppe_wait_busy(ppe); } @@ -257,7 +266,7 @@ Signed-off-by: Felix Fietkau bool accounting = eth->soc->has_accounting; --- a/drivers/net/ethernet/mediatek/mtk_ppe.h +++ b/drivers/net/ethernet/mediatek/mtk_ppe.h -@@ -283,6 +283,8 @@ struct mtk_flow_entry { +@@ -304,6 +304,8 @@ struct mtk_flow_entry { struct mtk_foe_entry data; struct rhash_head node; unsigned long cookie; @@ -266,7 +275,7 @@ Signed-off-by: Felix Fietkau }; struct mtk_mib_entry { -@@ -325,6 +327,7 @@ struct mtk_ppe *mtk_ppe_init(struct mtk_ +@@ -347,6 +349,7 @@ void mtk_ppe_deinit(struct mtk_eth *eth) void mtk_ppe_start(struct mtk_ppe *ppe); int mtk_ppe_stop(struct mtk_ppe *ppe); int mtk_ppe_prepare_reset(struct mtk_ppe *ppe); @@ -274,7 +283,7 @@ Signed-off-by: Felix Fietkau void __mtk_ppe_check_skb(struct mtk_ppe *ppe, struct sk_buff *skb, u16 hash); -@@ -373,9 +376,8 @@ int mtk_foe_entry_set_queue(struct mtk_e +@@ -395,9 +398,8 @@ int mtk_foe_entry_set_queue(struct mtk_e unsigned int queue); int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_flow_entry *entry); void mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry); @@ -295,7 +304,7 @@ Signed-off-by: Felix Fietkau - acct = mtk_foe_entry_get_mib(ppe, i, NULL); + acct = mtk_ppe_mib_entry_read(ppe, i); - type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1); + type = mtk_get_ib1_pkt_type(ppe->eth, entry->ib1); seq_printf(m, "%05x %s %7s", i, --- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c +++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c diff --git a/target/linux/generic/pending-5.15/737-01-net-ethernet-mtk_eth_soc-add-MTK_NETSYS_V1-capabilit.patch b/target/linux/generic/pending-5.15/737-01-net-ethernet-mtk_eth_soc-add-MTK_NETSYS_V1-capabilit.patch deleted file mode 100644 index 6e77ea7e0..000000000 --- a/target/linux/generic/pending-5.15/737-01-net-ethernet-mtk_eth_soc-add-MTK_NETSYS_V1-capabilit.patch +++ /dev/null @@ -1,223 +0,0 @@ -From 663fa1b7e0cb2c929008482014a70c6625caad75 Mon Sep 17 00:00:00 2001 -From: Lorenzo Bianconi -Date: Tue, 7 Mar 2023 15:55:13 +0000 -Subject: [PATCH 1/7] net: ethernet: mtk_eth_soc: add MTK_NETSYS_V1 capability - bit - -Introduce MTK_NETSYS_V1 bit in the device capabilities for -MT7621/MT7622/MT7623/MT7628/MT7629 SoCs. -Use !MTK_NETSYS_V1 instead of MTK_NETSYS_V2 in the driver codebase. -This is a preliminary patch to introduce support for MT7988 SoC. - -Signed-off-by: Lorenzo Bianconi -Signed-off-by: Daniel Golle ---- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 30 +++++++------- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 45 ++++++++++++--------- - 2 files changed, 41 insertions(+), 34 deletions(-) - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -596,7 +596,7 @@ static void mtk_set_queue_speed(struct m - FIELD_PREP(MTK_QTX_SCH_MIN_RATE_MAN, 1) | - FIELD_PREP(MTK_QTX_SCH_MIN_RATE_EXP, 4) | - MTK_QTX_SCH_LEAKY_BUCKET_SIZE; -- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) - val |= MTK_QTX_SCH_LEAKY_BUCKET_EN; - - if (IS_ENABLED(CONFIG_SOC_MT7621)) { -@@ -973,7 +973,7 @@ static bool mtk_rx_get_desc(struct mtk_e - rxd->rxd1 = READ_ONCE(dma_rxd->rxd1); - rxd->rxd3 = READ_ONCE(dma_rxd->rxd3); - rxd->rxd4 = READ_ONCE(dma_rxd->rxd4); -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) { - rxd->rxd5 = READ_ONCE(dma_rxd->rxd5); - rxd->rxd6 = READ_ONCE(dma_rxd->rxd6); - } -@@ -1031,7 +1031,7 @@ static int mtk_init_fq_dma(struct mtk_et - - txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE); - txd->txd4 = 0; -- if (MTK_HAS_CAPS(soc->caps, MTK_NETSYS_V2)) { -+ if (!MTK_HAS_CAPS(soc->caps, MTK_NETSYS_V1)) { - txd->txd5 = 0; - txd->txd6 = 0; - txd->txd7 = 0; -@@ -1220,7 +1220,7 @@ static void mtk_tx_set_dma_desc(struct n - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) - mtk_tx_set_dma_desc_v2(dev, txd, info); - else - mtk_tx_set_dma_desc_v1(dev, txd, info); -@@ -1901,7 +1901,7 @@ static int mtk_poll_rx(struct napi_struc - break; - - /* find out which mac the packet come from. values start at 1 */ -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) - mac = RX_DMA_GET_SPORT_V2(trxd.rxd5) - 1; - else if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) && - !(trxd.rxd4 & RX_DMA_SPECIAL_TAG)) -@@ -1997,7 +1997,7 @@ static int mtk_poll_rx(struct napi_struc - skb->dev = netdev; - bytes += skb->len; - -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) { - reason = FIELD_GET(MTK_RXD5_PPE_CPU_REASON, trxd.rxd5); - hash = trxd.rxd5 & MTK_RXD5_FOE_ENTRY; - if (hash != MTK_RXD5_FOE_ENTRY) -@@ -2022,7 +2022,7 @@ static int mtk_poll_rx(struct napi_struc - /* When using VLAN untagging in combination with DSA, the - * hardware treats the MTK special tag as a VLAN and untags it. - */ -- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) && -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1) && - (trxd.rxd2 & RX_DMA_VTAG) && netdev_uses_dsa(netdev)) { - unsigned int port = RX_DMA_VPID(trxd.rxd3) & GENMASK(2, 0); - -@@ -2327,7 +2327,7 @@ static int mtk_tx_alloc(struct mtk_eth * - txd->txd2 = next_ptr; - txd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU; - txd->txd4 = 0; -- if (MTK_HAS_CAPS(soc->caps, MTK_NETSYS_V2)) { -+ if (!MTK_HAS_CAPS(soc->caps, MTK_NETSYS_V1)) { - txd->txd5 = 0; - txd->txd6 = 0; - txd->txd7 = 0; -@@ -2380,7 +2380,7 @@ static int mtk_tx_alloc(struct mtk_eth * - FIELD_PREP(MTK_QTX_SCH_MIN_RATE_MAN, 1) | - FIELD_PREP(MTK_QTX_SCH_MIN_RATE_EXP, 4) | - MTK_QTX_SCH_LEAKY_BUCKET_SIZE; -- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) - val |= MTK_QTX_SCH_LEAKY_BUCKET_EN; - mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); - ofs += MTK_QTX_OFFSET; -@@ -2514,7 +2514,7 @@ static int mtk_rx_alloc(struct mtk_eth * - - rxd->rxd3 = 0; - rxd->rxd4 = 0; -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) { - rxd->rxd5 = 0; - rxd->rxd6 = 0; - rxd->rxd7 = 0; -@@ -3065,7 +3065,7 @@ static int mtk_start_dma(struct mtk_eth - MTK_TX_BT_32DWORDS | MTK_NDP_CO_PRO | - MTK_RX_2B_OFFSET | MTK_TX_WB_DDONE; - -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) - val |= MTK_MUTLI_CNT | MTK_RESV_BUF | - MTK_WCOMP_EN | MTK_DMAD_WR_WDONE | - MTK_CHK_DDONE_EN | MTK_LEAKY_BUCKET_EN; -@@ -3477,7 +3477,7 @@ static void mtk_hw_reset(struct mtk_eth - { - u32 val; - -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) { - regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, 0); - val = RSTCTRL_PPE0_V2; - } else { -@@ -3489,7 +3489,7 @@ static void mtk_hw_reset(struct mtk_eth - - ethsys_reset(eth, RSTCTRL_ETH | RSTCTRL_FE | val); - -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) - regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, - 0x3ffffff); - } -@@ -3685,7 +3685,7 @@ static int mtk_hw_init(struct mtk_eth *e - else - mtk_hw_reset(eth); - -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) { - /* Set FE to PDMAv2 if necessary */ - val = mtk_r32(eth, MTK_FE_GLO_MISC); - mtk_w32(eth, val | BIT(4), MTK_FE_GLO_MISC); -@@ -3722,7 +3722,7 @@ static int mtk_hw_init(struct mtk_eth *e - */ - val = mtk_r32(eth, MTK_CDMQ_IG_CTRL); - mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL); -- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) { - val = mtk_r32(eth, MTK_CDMP_IG_CTRL); - mtk_w32(eth, val | MTK_CDMP_STAG_EN, MTK_CDMP_IG_CTRL); - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -816,6 +816,7 @@ enum mkt_eth_capabilities { - MTK_SHARED_INT_BIT, - MTK_TRGMII_MT7621_CLK_BIT, - MTK_QDMA_BIT, -+ MTK_NETSYS_V1_BIT, - MTK_NETSYS_V2_BIT, - MTK_SOC_MT7628_BIT, - MTK_RSTCTRL_PPE1_BIT, -@@ -851,6 +852,7 @@ enum mkt_eth_capabilities { - #define MTK_SHARED_INT BIT(MTK_SHARED_INT_BIT) - #define MTK_TRGMII_MT7621_CLK BIT(MTK_TRGMII_MT7621_CLK_BIT) - #define MTK_QDMA BIT(MTK_QDMA_BIT) -+#define MTK_NETSYS_V1 BIT(MTK_NETSYS_V1_BIT) - #define MTK_NETSYS_V2 BIT(MTK_NETSYS_V2_BIT) - #define MTK_SOC_MT7628 BIT(MTK_SOC_MT7628_BIT) - #define MTK_RSTCTRL_PPE1 BIT(MTK_RSTCTRL_PPE1_BIT) -@@ -913,25 +915,30 @@ enum mkt_eth_capabilities { - - #define MTK_HAS_CAPS(caps, _x) (((caps) & (_x) & ~(MTK_CAP_MASK)) == (_x)) - --#define MT7621_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | \ -- MTK_GMAC2_RGMII | MTK_SHARED_INT | \ -- MTK_TRGMII_MT7621_CLK | MTK_QDMA) -- --#define MT7622_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_SGMII | MTK_GMAC2_RGMII | \ -- MTK_GMAC2_SGMII | MTK_GDM1_ESW | \ -- MTK_MUX_GDM1_TO_GMAC1_ESW | \ -- MTK_MUX_GMAC1_GMAC2_TO_SGMII_RGMII | MTK_QDMA) -- --#define MT7623_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | MTK_GMAC2_RGMII | \ -- MTK_QDMA) -- --#define MT7628_CAPS (MTK_SHARED_INT | MTK_SOC_MT7628) -- --#define MT7629_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | MTK_GMAC2_GEPHY | \ -- MTK_GDM1_ESW | MTK_MUX_GDM1_TO_GMAC1_ESW | \ -- MTK_MUX_GMAC2_GMAC0_TO_GEPHY | \ -- MTK_MUX_U3_GMAC2_TO_QPHY | \ -- MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA) -+#define MT7621_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | \ -+ MTK_GMAC2_RGMII | MTK_SHARED_INT | \ -+ MTK_TRGMII_MT7621_CLK | MTK_QDMA | \ -+ MTK_NETSYS_V1) -+ -+#define MT7622_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_SGMII | \ -+ MTK_GMAC2_RGMII | MTK_GMAC2_SGMII | \ -+ MTK_GDM1_ESW | MTK_MUX_GDM1_TO_GMAC1_ESW |\ -+ MTK_MUX_GMAC1_GMAC2_TO_SGMII_RGMII | \ -+ MTK_QDMA | MTK_NETSYS_V1) -+ -+#define MT7623_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | \ -+ MTK_GMAC2_RGMII | MTK_QDMA | \ -+ MTK_NETSYS_V1) -+ -+#define MT7628_CAPS (MTK_SHARED_INT | MTK_SOC_MT7628 | \ -+ MTK_NETSYS_V1) -+ -+#define MT7629_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \ -+ MTK_GMAC2_GEPHY | MTK_GDM1_ESW | \ -+ MTK_MUX_GMAC2_GMAC0_TO_GEPHY | MTK_QDMA | \ -+ MTK_MUX_U3_GMAC2_TO_QPHY | MTK_NETSYS_V1 |\ -+ MTK_MUX_GDM1_TO_GMAC1_ESW | \ -+ MTK_MUX_GMAC12_TO_GEPHY_SGMII) - - #define MT7981_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | MTK_GMAC2_GEPHY | \ - MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ diff --git a/target/linux/generic/pending-5.15/737-02-net-ethernet-mtk_eth_soc-move-MAX_DEVS-in-mtk_soc_da.patch b/target/linux/generic/pending-5.15/737-02-net-ethernet-mtk_eth_soc-move-MAX_DEVS-in-mtk_soc_da.patch deleted file mode 100644 index 53d957dff..000000000 --- a/target/linux/generic/pending-5.15/737-02-net-ethernet-mtk_eth_soc-move-MAX_DEVS-in-mtk_soc_da.patch +++ /dev/null @@ -1,181 +0,0 @@ -From 5af2b2dc4d6ba0ff7696e79f18e5b2bf862194eb Mon Sep 17 00:00:00 2001 -From: Lorenzo Bianconi -Date: Tue, 7 Mar 2023 15:55:24 +0000 -Subject: [PATCH 2/7] net: ethernet: mtk_eth_soc: move MAX_DEVS in mtk_soc_data - -This is a preliminary patch to add MT7988 SoC support since it runs 3 -macs instead of 2. - -Signed-off-by: Lorenzo Bianconi -Signed-off-by: Daniel Golle ---- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 34 +++++++++++++++++++-- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 11 +++---- - 2 files changed, 36 insertions(+), 9 deletions(-) - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -3974,7 +3974,10 @@ static void mtk_sgmii_destroy(struct mtk - { - int i; - -- for (i = 0; i < MTK_MAX_DEVS; i++) -+ if (!eth->sgmii_pcs) -+ return; -+ -+ for (i = 0; i < eth->soc->num_devs; i++) - mtk_pcs_lynxi_destroy(eth->sgmii_pcs[i]); - } - -@@ -4427,7 +4430,12 @@ static int mtk_sgmii_init(struct mtk_eth - u32 flags; - int i; - -- for (i = 0; i < MTK_MAX_DEVS; i++) { -+ eth->sgmii_pcs = devm_kzalloc(eth->dev, -+ sizeof(*eth->sgmii_pcs) * -+ eth->soc->num_devs, -+ GFP_KERNEL); -+ -+ for (i = 0; i < eth->soc->num_devs; i++) { - np = of_parse_phandle(eth->dev->of_node, "mediatek,sgmiisys", i); - if (!np) - break; -@@ -4472,6 +4480,18 @@ static int mtk_probe(struct platform_dev - if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) - eth->ip_align = NET_IP_ALIGN; - -+ eth->netdev = devm_kzalloc(eth->dev, -+ sizeof(*eth->netdev) * eth->soc->num_devs, -+ GFP_KERNEL); -+ if (!eth->netdev) -+ return -ENOMEM; -+ -+ eth->mac = devm_kzalloc(eth->dev, -+ sizeof(*eth->mac) * eth->soc->num_devs, -+ GFP_KERNEL); -+ if (!eth->mac) -+ return -ENOMEM; -+ - spin_lock_init(ð->page_lock); - spin_lock_init(ð->tx_irq_lock); - spin_lock_init(ð->rx_irq_lock); -@@ -4657,7 +4677,7 @@ static int mtk_probe(struct platform_dev - goto err_free_dev; - } - -- for (i = 0; i < MTK_MAX_DEVS; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { - if (!eth->netdev[i]) - continue; - -@@ -4734,6 +4754,7 @@ static const struct mtk_soc_data mt2701_ - .hw_features = MTK_HW_FEATURES, - .required_clks = MT7623_CLKS_BITMAP, - .required_pctl = true, -+ .num_devs = 2, - .txrx = { - .txd_size = sizeof(struct mtk_tx_dma), - .rxd_size = sizeof(struct mtk_rx_dma), -@@ -4752,6 +4773,7 @@ static const struct mtk_soc_data mt7621_ - .required_pctl = false, - .offload_version = 1, - .hash_offset = 2, -+ .num_devs = 2, - .foe_entry_size = sizeof(struct mtk_foe_entry) - 16, - .txrx = { - .txd_size = sizeof(struct mtk_tx_dma), -@@ -4773,6 +4795,7 @@ static const struct mtk_soc_data mt7622_ - .offload_version = 2, - .hash_offset = 2, - .has_accounting = true, -+ .num_devs = 2, - .foe_entry_size = sizeof(struct mtk_foe_entry) - 16, - .txrx = { - .txd_size = sizeof(struct mtk_tx_dma), -@@ -4792,6 +4815,7 @@ static const struct mtk_soc_data mt7623_ - .required_pctl = true, - .offload_version = 1, - .hash_offset = 2, -+ .num_devs = 2, - .foe_entry_size = sizeof(struct mtk_foe_entry) - 16, - .txrx = { - .txd_size = sizeof(struct mtk_tx_dma), -@@ -4811,6 +4835,7 @@ static const struct mtk_soc_data mt7629_ - .required_clks = MT7629_CLKS_BITMAP, - .required_pctl = false, - .has_accounting = true, -+ .num_devs = 2, - .txrx = { - .txd_size = sizeof(struct mtk_tx_dma), - .rxd_size = sizeof(struct mtk_rx_dma), -@@ -4832,6 +4857,7 @@ static const struct mtk_soc_data mt7981_ - .hash_offset = 4, - .foe_entry_size = sizeof(struct mtk_foe_entry), - .has_accounting = true, -+ .num_devs = 2, - .txrx = { - .txd_size = sizeof(struct mtk_tx_dma_v2), - .rxd_size = sizeof(struct mtk_rx_dma_v2), -@@ -4851,6 +4877,7 @@ static const struct mtk_soc_data mt7986_ - .required_pctl = false, - .offload_version = 2, - .hash_offset = 4, -+ .num_devs = 2, - .foe_entry_size = sizeof(struct mtk_foe_entry), - .has_accounting = true, - .txrx = { -@@ -4869,6 +4896,7 @@ static const struct mtk_soc_data rt5350_ - .hw_features = MTK_HW_FEATURES_MT7628, - .required_clks = MT7628_CLKS_BITMAP, - .required_pctl = false, -+ .num_devs = 2, - .txrx = { - .txd_size = sizeof(struct mtk_tx_dma), - .rxd_size = sizeof(struct mtk_rx_dma), ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -1018,6 +1018,7 @@ struct mtk_reg_map { - * @required_pctl A bool value to show whether the SoC requires - * the extra setup for those pins used by GMAC. - * @hash_offset Flow table hash offset. -+ * @num_devs SoC number of macs. - * @foe_entry_size Foe table entry size. - * @has_accounting Bool indicating support for accounting of - * offloaded flows. -@@ -1036,6 +1037,7 @@ struct mtk_soc_data { - bool required_pctl; - u8 offload_version; - u8 hash_offset; -+ u8 num_devs; - u16 foe_entry_size; - netdev_features_t hw_features; - bool has_accounting; -@@ -1051,9 +1053,6 @@ struct mtk_soc_data { - - #define MTK_DMA_MONITOR_TIMEOUT msecs_to_jiffies(1000) - --/* currently no SoC has more than 2 macs */ --#define MTK_MAX_DEVS 2 -- - /* struct mtk_eth - This is the main datasructure for holding the state - * of the driver - * @dev: The device pointer -@@ -1108,14 +1107,14 @@ struct mtk_eth { - spinlock_t tx_irq_lock; - spinlock_t rx_irq_lock; - struct net_device dummy_dev; -- struct net_device *netdev[MTK_MAX_DEVS]; -- struct mtk_mac *mac[MTK_MAX_DEVS]; -+ struct net_device **netdev; -+ struct mtk_mac **mac; - int irq[3]; - u32 msg_enable; - unsigned long sysclk; - struct regmap *ethsys; - struct regmap *infra; -- struct phylink_pcs *sgmii_pcs[MTK_MAX_DEVS]; -+ struct phylink_pcs **sgmii_pcs; - struct regmap *pctl; - bool hwlro; - refcount_t dma_refcnt; diff --git a/target/linux/generic/pending-5.15/737-06-net-ethernet-mtk_eth_soc-add-support-for-MT7988-SoC.patch b/target/linux/generic/pending-5.15/737-06-net-ethernet-mtk_eth_soc-add-support-for-MT7988-SoC.patch deleted file mode 100644 index 2e547cbe9..000000000 --- a/target/linux/generic/pending-5.15/737-06-net-ethernet-mtk_eth_soc-add-support-for-MT7988-SoC.patch +++ /dev/null @@ -1,495 +0,0 @@ -From 661bacf4363ca68939c15e20056b5f72fbd034e7 Mon Sep 17 00:00:00 2001 -From: Lorenzo Bianconi -Date: Sat, 25 Feb 2023 00:08:24 +0100 -Subject: [PATCH 6/7] net: ethernet: mtk_eth_soc: add support for MT7988 SoC - -Introduce support for ethernet chip available in MT7988 SoC to -mtk_eth_soc driver. ---- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 153 ++++++++++++++-- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 193 ++++++++++++++------ - 2 files changed, 279 insertions(+), 67 deletions(-) - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -152,6 +152,54 @@ static const struct mtk_reg_map mt7986_r - .pse_oq_sta = 0x01a0, - }; - -+static const struct mtk_reg_map mt7988_reg_map = { -+ .tx_irq_mask = 0x461c, -+ .tx_irq_status = 0x4618, -+ .pdma = { -+ .rx_ptr = 0x6900, -+ .rx_cnt_cfg = 0x6904, -+ .pcrx_ptr = 0x6908, -+ .glo_cfg = 0x6a04, -+ .rst_idx = 0x6a08, -+ .delay_irq = 0x6a0c, -+ .irq_status = 0x6a20, -+ .irq_mask = 0x6a28, -+ .adma_rx_dbg0 = 0x6a38, -+ .int_grp = 0x6a50, -+ }, -+ .qdma = { -+ .qtx_cfg = 0x4400, -+ .qtx_sch = 0x4404, -+ .rx_ptr = 0x4500, -+ .rx_cnt_cfg = 0x4504, -+ .qcrx_ptr = 0x4508, -+ .glo_cfg = 0x4604, -+ .rst_idx = 0x4608, -+ .delay_irq = 0x460c, -+ .fc_th = 0x4610, -+ .int_grp = 0x4620, -+ .hred = 0x4644, -+ .ctx_ptr = 0x4700, -+ .dtx_ptr = 0x4704, -+ .crx_ptr = 0x4710, -+ .drx_ptr = 0x4714, -+ .fq_head = 0x4720, -+ .fq_tail = 0x4724, -+ .fq_count = 0x4728, -+ .fq_blen = 0x472c, -+ .tx_sch_rate = 0x4798, -+ }, -+ .gdm1_cnt = 0x1c00, -+ .gdma_to_ppe0 = 0x3333, -+ .ppe_base = 0x2200, -+ .wdma_base = { -+ [0] = 0x4800, -+ [1] = 0x4c00, -+ }, -+ .pse_iq_sta = 0x0180, -+ .pse_oq_sta = 0x01a0, -+}; -+ - /* strings used by ethtool */ - static const struct mtk_ethtool_stats { - char str[ETH_GSTRING_LEN]; -@@ -179,10 +227,54 @@ static const struct mtk_ethtool_stats { - }; - - static const char * const mtk_clks_source_name[] = { -- "ethif", "sgmiitop", "esw", "gp0", "gp1", "gp2", "fe", "trgpll", -- "sgmii_tx250m", "sgmii_rx250m", "sgmii_cdr_ref", "sgmii_cdr_fb", -- "sgmii2_tx250m", "sgmii2_rx250m", "sgmii2_cdr_ref", "sgmii2_cdr_fb", -- "sgmii_ck", "eth2pll", "wocpu0", "wocpu1", "netsys0", "netsys1" -+ "ethif", -+ "sgmiitop", -+ "esw", -+ "gp0", -+ "gp1", -+ "gp2", -+ "gp3", -+ "xgp1", -+ "xgp2", -+ "xgp3", -+ "crypto", -+ "fe", -+ "trgpll", -+ "sgmii_tx250m", -+ "sgmii_rx250m", -+ "sgmii_cdr_ref", -+ "sgmii_cdr_fb", -+ "sgmii2_tx250m", -+ "sgmii2_rx250m", -+ "sgmii2_cdr_ref", -+ "sgmii2_cdr_fb", -+ "sgmii_ck", -+ "eth2pll", -+ "wocpu0", -+ "wocpu1", -+ "netsys0", -+ "netsys1", -+ "ethwarp_wocpu2", -+ "ethwarp_wocpu1", -+ "ethwarp_wocpu0", -+ "top_usxgmii0_sel", -+ "top_usxgmii1_sel", -+ "top_sgm0_sel", -+ "top_sgm1_sel", -+ "top_xfi_phy0_xtal_sel", -+ "top_xfi_phy1_xtal_sel", -+ "top_eth_gmii_sel", -+ "top_eth_refck_50m_sel", -+ "top_eth_sys_200m_sel", -+ "top_eth_sys_sel", -+ "top_eth_xgmii_sel", -+ "top_eth_mii_sel", -+ "top_netsys_sel", -+ "top_netsys_500m_sel", -+ "top_netsys_pao_2x_sel", -+ "top_netsys_sync_250m_sel", -+ "top_netsys_ppefb_250m_sel", -+ "top_netsys_warp_sel", - }; - - void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg) -@@ -1206,10 +1298,19 @@ static void mtk_tx_set_dma_desc_v2(struc - data |= TX_DMA_LS0; - WRITE_ONCE(desc->txd3, data); - -- if (mac->id == MTK_GMAC3_ID) -- data = PSE_GDM3_PORT; -- else -- data = (mac->id + 1) << TX_DMA_FPORT_SHIFT_V2; /* forward port */ -+ /* set forward port */ -+ switch (mac->id) { -+ case MTK_GMAC1_ID: -+ data = PSE_GDM1_PORT << TX_DMA_FPORT_SHIFT_V2; -+ break; -+ case MTK_GMAC2_ID: -+ data = PSE_GDM2_PORT << TX_DMA_FPORT_SHIFT_V2; -+ break; -+ case MTK_GMAC3_ID: -+ data = PSE_GDM3_PORT << TX_DMA_FPORT_SHIFT_V2; -+ break; -+ } -+ - data |= TX_DMA_SWC_V2 | QID_BITS_V2(info->qid); - WRITE_ONCE(desc->txd4, data); - -@@ -4959,6 +5060,25 @@ static const struct mtk_soc_data mt7986_ - }, - }; - -+static const struct mtk_soc_data mt7988_data = { -+ .reg_map = &mt7988_reg_map, -+ .ana_rgc3 = 0x128, -+ .caps = MT7988_CAPS, -+ .hw_features = MTK_HW_FEATURES, -+ .required_clks = MT7988_CLKS_BITMAP, -+ .required_pctl = false, -+ .num_devs = 3, -+ .txrx = { -+ .txd_size = sizeof(struct mtk_tx_dma_v2), -+ .rxd_size = sizeof(struct mtk_rx_dma_v2), -+ .rx_irq_done_mask = MTK_RX_DONE_INT_V2, -+ .rx_dma_l4_valid = RX_DMA_L4_VALID_V2, -+ .dma_max_len = MTK_TX_DMA_BUF_LEN_V2, -+ .dma_len_offset = 8, -+ }, -+}; -+ -+ - static const struct mtk_soc_data rt5350_data = { - .reg_map = &mt7628_reg_map, - .caps = MT7628_CAPS, -@@ -4977,14 +5097,15 @@ static const struct mtk_soc_data rt5350_ - }; - - const struct of_device_id of_mtk_match[] = { -- { .compatible = "mediatek,mt2701-eth", .data = &mt2701_data}, -- { .compatible = "mediatek,mt7621-eth", .data = &mt7621_data}, -- { .compatible = "mediatek,mt7622-eth", .data = &mt7622_data}, -- { .compatible = "mediatek,mt7623-eth", .data = &mt7623_data}, -- { .compatible = "mediatek,mt7629-eth", .data = &mt7629_data}, -- { .compatible = "mediatek,mt7981-eth", .data = &mt7981_data}, -- { .compatible = "mediatek,mt7986-eth", .data = &mt7986_data}, -- { .compatible = "ralink,rt5350-eth", .data = &rt5350_data}, -+ { .compatible = "mediatek,mt2701-eth", .data = &mt2701_data }, -+ { .compatible = "mediatek,mt7621-eth", .data = &mt7621_data }, -+ { .compatible = "mediatek,mt7622-eth", .data = &mt7622_data }, -+ { .compatible = "mediatek,mt7623-eth", .data = &mt7623_data }, -+ { .compatible = "mediatek,mt7629-eth", .data = &mt7629_data }, -+ { .compatible = "mediatek,mt7981-eth", .data = &mt7981_data }, -+ { .compatible = "mediatek,mt7986-eth", .data = &mt7986_data }, -+ { .compatible = "mediatek,mt7988-eth", .data = &mt7988_data }, -+ { .compatible = "ralink,rt5350-eth", .data = &rt5350_data }, - {}, - }; - MODULE_DEVICE_TABLE(of, of_mtk_match); ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -116,7 +116,8 @@ - #define MTK_CDMP_EG_CTRL 0x404 - - /* GDM Exgress Control Register */ --#define MTK_GDMA_FWD_CFG(x) (0x500 + (x * 0x1000)) -+#define MTK_GDMA_FWD_CFG(x) ((x == MTK_GMAC3_ID) ? \ -+ 0x540 : 0x500 + (x * 0x1000)) - #define MTK_GDMA_SPECIAL_TAG BIT(24) - #define MTK_GDMA_ICS_EN BIT(22) - #define MTK_GDMA_TCS_EN BIT(21) -@@ -650,6 +651,11 @@ enum mtk_clks_map { - MTK_CLK_GP0, - MTK_CLK_GP1, - MTK_CLK_GP2, -+ MTK_CLK_GP3, -+ MTK_CLK_XGP1, -+ MTK_CLK_XGP2, -+ MTK_CLK_XGP3, -+ MTK_CLK_CRYPTO, - MTK_CLK_FE, - MTK_CLK_TRGPLL, - MTK_CLK_SGMII_TX_250M, -@@ -666,57 +672,108 @@ enum mtk_clks_map { - MTK_CLK_WOCPU1, - MTK_CLK_NETSYS0, - MTK_CLK_NETSYS1, -+ MTK_CLK_ETHWARP_WOCPU2, -+ MTK_CLK_ETHWARP_WOCPU1, -+ MTK_CLK_ETHWARP_WOCPU0, -+ MTK_CLK_TOP_USXGMII_SBUS_0_SEL, -+ MTK_CLK_TOP_USXGMII_SBUS_1_SEL, -+ MTK_CLK_TOP_SGM_0_SEL, -+ MTK_CLK_TOP_SGM_1_SEL, -+ MTK_CLK_TOP_XFI_PHY_0_XTAL_SEL, -+ MTK_CLK_TOP_XFI_PHY_1_XTAL_SEL, -+ MTK_CLK_TOP_ETH_GMII_SEL, -+ MTK_CLK_TOP_ETH_REFCK_50M_SEL, -+ MTK_CLK_TOP_ETH_SYS_200M_SEL, -+ MTK_CLK_TOP_ETH_SYS_SEL, -+ MTK_CLK_TOP_ETH_XGMII_SEL, -+ MTK_CLK_TOP_ETH_MII_SEL, -+ MTK_CLK_TOP_NETSYS_SEL, -+ MTK_CLK_TOP_NETSYS_500M_SEL, -+ MTK_CLK_TOP_NETSYS_PAO_2X_SEL, -+ MTK_CLK_TOP_NETSYS_SYNC_250M_SEL, -+ MTK_CLK_TOP_NETSYS_PPEFB_250M_SEL, -+ MTK_CLK_TOP_NETSYS_WARP_SEL, - MTK_CLK_MAX - }; - --#define MT7623_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \ -- BIT(MTK_CLK_GP1) | BIT(MTK_CLK_GP2) | \ -- BIT(MTK_CLK_TRGPLL)) --#define MT7622_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \ -- BIT(MTK_CLK_GP0) | BIT(MTK_CLK_GP1) | \ -- BIT(MTK_CLK_GP2) | \ -- BIT(MTK_CLK_SGMII_TX_250M) | \ -- BIT(MTK_CLK_SGMII_RX_250M) | \ -- BIT(MTK_CLK_SGMII_CDR_REF) | \ -- BIT(MTK_CLK_SGMII_CDR_FB) | \ -- BIT(MTK_CLK_SGMII_CK) | \ -- BIT(MTK_CLK_ETH2PLL)) -+#define MT7623_CLKS_BITMAP (BIT_ULL(MTK_CLK_ETHIF) | BIT_ULL(MTK_CLK_ESW) | \ -+ BIT_ULL(MTK_CLK_GP1) | BIT_ULL(MTK_CLK_GP2) | \ -+ BIT_ULL(MTK_CLK_TRGPLL)) -+#define MT7622_CLKS_BITMAP (BIT_ULL(MTK_CLK_ETHIF) | BIT_ULL(MTK_CLK_ESW) | \ -+ BIT_ULL(MTK_CLK_GP0) | BIT_ULL(MTK_CLK_GP1) | \ -+ BIT_ULL(MTK_CLK_GP2) | \ -+ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \ -+ BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \ -+ BIT_ULL(MTK_CLK_SGMII_CK) | \ -+ BIT_ULL(MTK_CLK_ETH2PLL)) - #define MT7621_CLKS_BITMAP (0) - #define MT7628_CLKS_BITMAP (0) --#define MT7629_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \ -- BIT(MTK_CLK_GP0) | BIT(MTK_CLK_GP1) | \ -- BIT(MTK_CLK_GP2) | BIT(MTK_CLK_FE) | \ -- BIT(MTK_CLK_SGMII_TX_250M) | \ -- BIT(MTK_CLK_SGMII_RX_250M) | \ -- BIT(MTK_CLK_SGMII_CDR_REF) | \ -- BIT(MTK_CLK_SGMII_CDR_FB) | \ -- BIT(MTK_CLK_SGMII2_TX_250M) | \ -- BIT(MTK_CLK_SGMII2_RX_250M) | \ -- BIT(MTK_CLK_SGMII2_CDR_REF) | \ -- BIT(MTK_CLK_SGMII2_CDR_FB) | \ -- BIT(MTK_CLK_SGMII_CK) | \ -- BIT(MTK_CLK_ETH2PLL) | BIT(MTK_CLK_SGMIITOP)) --#define MT7981_CLKS_BITMAP (BIT(MTK_CLK_FE) | BIT(MTK_CLK_GP2) | BIT(MTK_CLK_GP1) | \ -- BIT(MTK_CLK_WOCPU0) | \ -- BIT(MTK_CLK_SGMII_TX_250M) | \ -- BIT(MTK_CLK_SGMII_RX_250M) | \ -- BIT(MTK_CLK_SGMII_CDR_REF) | \ -- BIT(MTK_CLK_SGMII_CDR_FB) | \ -- BIT(MTK_CLK_SGMII2_TX_250M) | \ -- BIT(MTK_CLK_SGMII2_RX_250M) | \ -- BIT(MTK_CLK_SGMII2_CDR_REF) | \ -- BIT(MTK_CLK_SGMII2_CDR_FB) | \ -- BIT(MTK_CLK_SGMII_CK)) --#define MT7986_CLKS_BITMAP (BIT(MTK_CLK_FE) | BIT(MTK_CLK_GP2) | BIT(MTK_CLK_GP1) | \ -- BIT(MTK_CLK_WOCPU1) | BIT(MTK_CLK_WOCPU0) | \ -- BIT(MTK_CLK_SGMII_TX_250M) | \ -- BIT(MTK_CLK_SGMII_RX_250M) | \ -- BIT(MTK_CLK_SGMII_CDR_REF) | \ -- BIT(MTK_CLK_SGMII_CDR_FB) | \ -- BIT(MTK_CLK_SGMII2_TX_250M) | \ -- BIT(MTK_CLK_SGMII2_RX_250M) | \ -- BIT(MTK_CLK_SGMII2_CDR_REF) | \ -- BIT(MTK_CLK_SGMII2_CDR_FB)) -+#define MT7629_CLKS_BITMAP (BIT_ULL(MTK_CLK_ETHIF) | BIT_ULL(MTK_CLK_ESW) | \ -+ BIT_ULL(MTK_CLK_GP0) | BIT_ULL(MTK_CLK_GP1) | \ -+ BIT_ULL(MTK_CLK_GP2) | BIT_ULL(MTK_CLK_FE) | \ -+ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \ -+ BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \ -+ BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \ -+ BIT_ULL(MTK_CLK_SGMII2_CDR_FB) | \ -+ BIT_ULL(MTK_CLK_SGMII_CK) | \ -+ BIT_ULL(MTK_CLK_ETH2PLL) | BIT_ULL(MTK_CLK_SGMIITOP)) -+#define MT7981_CLKS_BITMAP (BIT_ULL(MTK_CLK_FE) | BIT_ULL(MTK_CLK_GP2) | BIT_ULL(MTK_CLK_GP1) | \ -+ BIT_ULL(MTK_CLK_WOCPU0) | \ -+ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \ -+ BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \ -+ BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \ -+ BIT_ULL(MTK_CLK_SGMII2_CDR_FB) | \ -+ BIT_ULL(MTK_CLK_SGMII_CK)) -+#define MT7986_CLKS_BITMAP (BIT_ULL(MTK_CLK_FE) | BIT_ULL(MTK_CLK_GP2) | BIT_ULL(MTK_CLK_GP1) | \ -+ BIT_ULL(MTK_CLK_WOCPU1) | BIT_ULL(MTK_CLK_WOCPU0) | \ -+ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \ -+ BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \ -+ BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \ -+ BIT_ULL(MTK_CLK_SGMII2_CDR_FB)) -+#define MT7988_CLKS_BITMAP (BIT_ULL(MTK_CLK_FE) | BIT_ULL(MTK_CLK_ESW) | \ -+ BIT_ULL(MTK_CLK_GP1) | BIT_ULL(MTK_CLK_GP2) | \ -+ BIT_ULL(MTK_CLK_GP3) | BIT_ULL(MTK_CLK_XGP1) | \ -+ BIT_ULL(MTK_CLK_XGP2) | BIT_ULL(MTK_CLK_XGP3) | \ -+ BIT_ULL(MTK_CLK_CRYPTO) | \ -+ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ -+ BIT_ULL(MTK_CLK_ETHWARP_WOCPU2) | \ -+ BIT_ULL(MTK_CLK_ETHWARP_WOCPU1) | \ -+ BIT_ULL(MTK_CLK_ETHWARP_WOCPU0) | \ -+ BIT_ULL(MTK_CLK_TOP_USXGMII_SBUS_0_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_USXGMII_SBUS_1_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_SGM_0_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_SGM_1_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_XFI_PHY_0_XTAL_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_XFI_PHY_1_XTAL_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_ETH_GMII_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_ETH_REFCK_50M_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_ETH_SYS_200M_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_ETH_SYS_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_ETH_XGMII_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_ETH_MII_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_NETSYS_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_NETSYS_500M_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_NETSYS_PAO_2X_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_NETSYS_SYNC_250M_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_NETSYS_PPEFB_250M_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_NETSYS_WARP_SEL)) - - enum mtk_dev_state { - MTK_HW_INIT, -@@ -844,6 +901,7 @@ enum mkt_eth_capabilities { - MTK_RGMII_BIT = 0, - MTK_TRGMII_BIT, - MTK_SGMII_BIT, -+ MTK_USXGMII_BIT, - MTK_ESW_BIT, - MTK_GEPHY_BIT, - MTK_MUX_BIT, -@@ -866,6 +924,8 @@ enum mkt_eth_capabilities { - MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT, - MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT, - MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT, -+ MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII_BIT, -+ MTK_ETH_MUX_GMAC123_TO_USXGMII_BIT, - - /* PATH BITS */ - MTK_ETH_PATH_GMAC1_RGMII_BIT, -@@ -874,13 +934,18 @@ enum mkt_eth_capabilities { - MTK_ETH_PATH_GMAC2_RGMII_BIT, - MTK_ETH_PATH_GMAC2_SGMII_BIT, - MTK_ETH_PATH_GMAC2_GEPHY_BIT, -+ MTK_ETH_PATH_GMAC3_SGMII_BIT, - MTK_ETH_PATH_GDM1_ESW_BIT, -+ MTK_ETH_PATH_GMAC1_USXGMII_BIT, -+ MTK_ETH_PATH_GMAC2_USXGMII_BIT, -+ MTK_ETH_PATH_GMAC3_USXGMII_BIT, - }; - - /* Supported hardware group on SoCs */ - #define MTK_RGMII BIT_ULL(MTK_RGMII_BIT) - #define MTK_TRGMII BIT_ULL(MTK_TRGMII_BIT) - #define MTK_SGMII BIT_ULL(MTK_SGMII_BIT) -+#define MTK_USXGMII BIT_ULL(MTK_USXGMII_BIT) - #define MTK_ESW BIT_ULL(MTK_ESW_BIT) - #define MTK_GEPHY BIT_ULL(MTK_GEPHY_BIT) - #define MTK_MUX BIT_ULL(MTK_MUX_BIT) -@@ -907,6 +972,10 @@ enum mkt_eth_capabilities { - BIT_ULL(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT) - #define MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII \ - BIT_ULL(MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT) -+#define MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII \ -+ BIT_ULL(MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII_BIT) -+#define MTK_ETH_MUX_GMAC123_TO_USXGMII \ -+ BIT_ULL(MTK_ETH_MUX_GMAC123_TO_USXGMII_BIT) - - /* Supported path present on SoCs */ - #define MTK_ETH_PATH_GMAC1_RGMII BIT_ULL(MTK_ETH_PATH_GMAC1_RGMII_BIT) -@@ -915,7 +984,11 @@ enum mkt_eth_capabilities { - #define MTK_ETH_PATH_GMAC2_RGMII BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT) - #define MTK_ETH_PATH_GMAC2_SGMII BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT) - #define MTK_ETH_PATH_GMAC2_GEPHY BIT_ULL(MTK_ETH_PATH_GMAC2_GEPHY_BIT) -+#define MTK_ETH_PATH_GMAC3_SGMII BIT_ULL(MTK_ETH_PATH_GMAC3_SGMII_BIT) - #define MTK_ETH_PATH_GDM1_ESW BIT_ULL(MTK_ETH_PATH_GDM1_ESW_BIT) -+#define MTK_ETH_PATH_GMAC1_USXGMII BIT_ULL(MTK_ETH_PATH_GMAC1_USXGMII_BIT) -+#define MTK_ETH_PATH_GMAC2_USXGMII BIT_ULL(MTK_ETH_PATH_GMAC2_USXGMII_BIT) -+#define MTK_ETH_PATH_GMAC3_USXGMII BIT_ULL(MTK_ETH_PATH_GMAC3_USXGMII_BIT) - - #define MTK_GMAC1_RGMII (MTK_ETH_PATH_GMAC1_RGMII | MTK_RGMII) - #define MTK_GMAC1_TRGMII (MTK_ETH_PATH_GMAC1_TRGMII | MTK_TRGMII) -@@ -923,7 +996,11 @@ enum mkt_eth_capabilities { - #define MTK_GMAC2_RGMII (MTK_ETH_PATH_GMAC2_RGMII | MTK_RGMII) - #define MTK_GMAC2_SGMII (MTK_ETH_PATH_GMAC2_SGMII | MTK_SGMII) - #define MTK_GMAC2_GEPHY (MTK_ETH_PATH_GMAC2_GEPHY | MTK_GEPHY) -+#define MTK_GMAC3_SGMII (MTK_ETH_PATH_GMAC3_SGMII | MTK_SGMII) - #define MTK_GDM1_ESW (MTK_ETH_PATH_GDM1_ESW | MTK_ESW) -+#define MTK_GMAC1_USXGMII (MTK_ETH_PATH_GMAC1_USXGMII | MTK_USXGMII) -+#define MTK_GMAC2_USXGMII (MTK_ETH_PATH_GMAC2_USXGMII | MTK_USXGMII) -+#define MTK_GMAC3_USXGMII (MTK_ETH_PATH_GMAC3_USXGMII | MTK_USXGMII) - - /* MUXes present on SoCs */ - /* 0: GDM1 -> GMAC1, 1: GDM1 -> ESW */ -@@ -946,6 +1023,12 @@ enum mkt_eth_capabilities { - #define MTK_MUX_GMAC12_TO_GEPHY_SGMII \ - (MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII | MTK_MUX) - -+#define MTK_MUX_GMAC123_TO_GEPHY_SGMII \ -+ (MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII | MTK_MUX) -+ -+#define MTK_MUX_GMAC123_TO_USXGMII \ -+ (MTK_ETH_MUX_GMAC123_TO_USXGMII | MTK_MUX | MTK_INFRA) -+ - #ifdef CONFIG_SOC_MT7621 - #define MTK_CAP_MASK MTK_NETSYS_V2 - #else -@@ -984,9 +1067,17 @@ enum mkt_eth_capabilities { - MTK_MUX_U3_GMAC2_TO_QPHY | MTK_U3_COPHY_V2 | \ - MTK_NETSYS_V2 | MTK_RSTCTRL_PPE1) - --#define MT7986_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \ -- MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ -- MTK_NETSYS_V2 | MTK_RSTCTRL_PPE1) -+#define MT7986_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \ -+ MTK_MUX_GMAC12_TO_GEPHY_SGMII | \ -+ MTK_QDMA | MTK_NETSYS_V2 | \ -+ MTK_RSTCTRL_PPE1) -+ -+#define MT7988_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \ -+ MTK_GMAC3_SGMII | MTK_QDMA | \ -+ MTK_MUX_GMAC123_TO_GEPHY_SGMII | \ -+ MTK_NETSYS_V3 | MTK_RSTCTRL_PPE1 | \ -+ MTK_GMAC1_USXGMII | MTK_GMAC2_USXGMII | \ -+ MTK_GMAC3_USXGMII | MTK_MUX_GMAC123_TO_USXGMII) - - struct mtk_tx_dma_desc_info { - dma_addr_t addr; -@@ -1072,7 +1163,7 @@ struct mtk_soc_data { - const struct mtk_reg_map *reg_map; - u32 ana_rgc3; - u64 caps; -- u32 required_clks; -+ u64 required_clks; - bool required_pctl; - u8 offload_version; - u8 hash_offset; diff --git a/target/linux/generic/pending-5.15/737-07-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch b/target/linux/generic/pending-5.15/737-07-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch deleted file mode 100644 index fa8260aa7..000000000 --- a/target/linux/generic/pending-5.15/737-07-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch +++ /dev/null @@ -1,1867 +0,0 @@ -From 3d833ad2cfc1ab503d9aae2967b7f10811bb3c9c Mon Sep 17 00:00:00 2001 -From: Daniel Golle -Date: Wed, 1 Mar 2023 11:56:04 +0000 -Subject: [PATCH 7/7] net: ethernet: mtk_eth_soc: add paths and SerDes modes - for MT7988 - -MT7988 comes with a built-in 2.5G PHY as well as -USXGMII/10GBase-KR/5GBase-KR compatible SerDes lanes for external PHYs. -Add support for configuring the MAC and SerDes parts for the new paths. - -Signed-off-by: Daniel Golle ---- - drivers/net/ethernet/mediatek/Kconfig | 7 + - drivers/net/ethernet/mediatek/Makefile | 1 + - drivers/net/ethernet/mediatek/mtk_eth_path.c | 154 +++- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 270 +++++- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 194 ++++- - drivers/net/ethernet/mediatek/mtk_usxgmii.c | 835 +++++++++++++++++++ - 6 files changed, 1428 insertions(+), 33 deletions(-) - create mode 100644 drivers/net/ethernet/mediatek/mtk_usxgmii.c - ---- a/drivers/net/ethernet/mediatek/Kconfig -+++ b/drivers/net/ethernet/mediatek/Kconfig -@@ -24,6 +24,13 @@ config NET_MEDIATEK_SOC - This driver supports the gigabit ethernet MACs in the - MediaTek SoC family. - -+config NET_MEDIATEK_SOC_USXGMII -+ bool "Support USXGMII SerDes on MT7988" -+ depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST -+ def_bool NET_MEDIATEK_SOC != n -+ help -+ Include support for 10G SerDes which can be found on MT7988. -+ - config NET_MEDIATEK_STAR_EMAC - tristate "MediaTek STAR Ethernet MAC support" - select PHYLIB ---- a/drivers/net/ethernet/mediatek/Makefile -+++ b/drivers/net/ethernet/mediatek/Makefile -@@ -5,6 +5,7 @@ - - obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth.o - mtk_eth-y := mtk_eth_soc.o mtk_eth_path.o mtk_ppe.o mtk_ppe_debugfs.o mtk_ppe_offload.o -+mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_USXGMII) += mtk_usxgmii.o - mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed.o mtk_wed_mcu.o mtk_wed_wo.o - ifdef CONFIG_DEBUG_FS - mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_debugfs.o ---- a/drivers/net/ethernet/mediatek/mtk_eth_path.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_path.c -@@ -31,10 +31,20 @@ static const char *mtk_eth_path_name(u64 - return "gmac2_rgmii"; - case MTK_ETH_PATH_GMAC2_SGMII: - return "gmac2_sgmii"; -+ case MTK_ETH_PATH_GMAC2_2P5GPHY: -+ return "gmac2_2p5gphy"; - case MTK_ETH_PATH_GMAC2_GEPHY: - return "gmac2_gephy"; -+ case MTK_ETH_PATH_GMAC3_SGMII: -+ return "gmac3_sgmii"; - case MTK_ETH_PATH_GDM1_ESW: - return "gdm1_esw"; -+ case MTK_ETH_PATH_GMAC1_USXGMII: -+ return "gmac1_usxgmii"; -+ case MTK_ETH_PATH_GMAC2_USXGMII: -+ return "gmac2_usxgmii"; -+ case MTK_ETH_PATH_GMAC3_USXGMII: -+ return "gmac3_usxgmii"; - default: - return "unknown path"; - } -@@ -42,8 +52,8 @@ static const char *mtk_eth_path_name(u64 - - static int set_mux_gdm1_to_gmac1_esw(struct mtk_eth *eth, u64 path) - { -+ u32 val, mask, set, reg; - bool updated = true; -- u32 val, mask, set; - - switch (path) { - case MTK_ETH_PATH_GMAC1_SGMII: -@@ -59,10 +69,15 @@ static int set_mux_gdm1_to_gmac1_esw(str - break; - } - -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) -+ reg = MTK_MAC_MISC_V3; -+ else -+ reg = MTK_MAC_MISC; -+ - if (updated) { -- val = mtk_r32(eth, MTK_MAC_MISC); -+ val = mtk_r32(eth, reg); - val = (val & mask) | set; -- mtk_w32(eth, val, MTK_MAC_MISC); -+ mtk_w32(eth, val, reg); - } - - dev_dbg(eth->dev, "path %s in %s updated = %d\n", -@@ -125,6 +140,31 @@ static int set_mux_u3_gmac2_to_qphy(stru - return 0; - } - -+static int set_mux_gmac2_to_2p5gphy(struct mtk_eth *eth, u64 path) -+{ -+ unsigned int val = 0; -+ bool updated = true; -+ int mac_id = 0; -+ -+ regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); -+ -+ switch (path) { -+ case MTK_ETH_PATH_GMAC2_2P5GPHY: -+ val &= ~(u32)SYSCFG0_SGMII_GMAC2_V2; -+ mac_id = MTK_GMAC2_ID; -+ break; -+ default: -+ updated = false; -+ break; -+ }; -+ -+ if (updated) -+ regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, -+ SYSCFG0_SGMII_MASK, val); -+ -+ return 0; -+} -+ - static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, u64 path) - { - unsigned int val = 0; -@@ -163,7 +203,61 @@ static int set_mux_gmac1_gmac2_to_sgmii_ - return 0; - } - --static int set_mux_gmac12_to_gephy_sgmii(struct mtk_eth *eth, u64 path) -+static int set_mux_gmac123_to_usxgmii(struct mtk_eth *eth, u64 path) -+{ -+ unsigned int val = 0; -+ bool updated = true; -+ int mac_id = 0; -+ -+ dev_dbg(eth->dev, "path %s in %s updated = %d\n", -+ mtk_eth_path_name(path), __func__, updated); -+ -+ /* Disable SYSCFG1 SGMII */ -+ regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); -+ -+ switch (path) { -+ case MTK_ETH_PATH_GMAC1_USXGMII: -+ val &= ~(u32)SYSCFG0_SGMII_GMAC1_V2; -+ mac_id = MTK_GMAC1_ID; -+ break; -+ case MTK_ETH_PATH_GMAC2_USXGMII: -+ val &= ~(u32)SYSCFG0_SGMII_GMAC2_V2; -+ mac_id = MTK_GMAC2_ID; -+ break; -+ case MTK_ETH_PATH_GMAC3_USXGMII: -+ val &= ~(u32)SYSCFG0_SGMII_GMAC3_V2; -+ mac_id = MTK_GMAC3_ID; -+ break; -+ default: -+ updated = false; -+ }; -+ -+ if (updated) { -+ regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, -+ SYSCFG0_SGMII_MASK, val); -+ -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3) && -+ mac_id == MTK_GMAC2_ID) { -+ regmap_update_bits(eth->infra, -+ TOP_MISC_NETSYS_PCS_MUX, -+ NETSYS_PCS_MUX_MASK, -+ MUX_G2_USXGMII_SEL); -+ } -+ } -+ -+ /* Enable XGDM Path */ -+ val = mtk_r32(eth, MTK_GDMA_EG_CTRL(mac_id)); -+ val |= MTK_GDMA_XGDM_SEL; -+ mtk_w32(eth, val, MTK_GDMA_EG_CTRL(mac_id)); -+ -+ dev_dbg(eth->dev, "path %s in %s updated = %d\n", -+ mtk_eth_path_name(path), __func__, updated); -+ -+ -+ return 0; -+} -+ -+static int set_mux_gmac123_to_gephy_sgmii(struct mtk_eth *eth, u64 path) - { - unsigned int val = 0; - bool updated = true; -@@ -180,6 +274,9 @@ static int set_mux_gmac12_to_gephy_sgmii - case MTK_ETH_PATH_GMAC2_SGMII: - val |= SYSCFG0_SGMII_GMAC2_V2; - break; -+ case MTK_ETH_PATH_GMAC3_SGMII: -+ val |= SYSCFG0_SGMII_GMAC3_V2; -+ break; - default: - updated = false; - } -@@ -208,13 +305,25 @@ static const struct mtk_eth_muxc mtk_eth - .cap_bit = MTK_ETH_MUX_U3_GMAC2_TO_QPHY, - .set_path = set_mux_u3_gmac2_to_qphy, - }, { -+ .name = "mux_gmac2_to_2p5gphy", -+ .cap_bit = MTK_ETH_MUX_GMAC2_TO_2P5GPHY, -+ .set_path = set_mux_gmac2_to_2p5gphy, -+ }, { - .name = "mux_gmac1_gmac2_to_sgmii_rgmii", - .cap_bit = MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII, - .set_path = set_mux_gmac1_gmac2_to_sgmii_rgmii, - }, { - .name = "mux_gmac12_to_gephy_sgmii", - .cap_bit = MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII, -- .set_path = set_mux_gmac12_to_gephy_sgmii, -+ .set_path = set_mux_gmac123_to_gephy_sgmii, -+ }, { -+ .name = "mux_gmac123_to_gephy_sgmii", -+ .cap_bit = MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII, -+ .set_path = set_mux_gmac123_to_gephy_sgmii, -+ }, { -+ .name = "mux_gmac123_to_usxgmii", -+ .cap_bit = MTK_ETH_MUX_GMAC123_TO_USXGMII, -+ .set_path = set_mux_gmac123_to_usxgmii, - }, - }; - -@@ -243,16 +352,46 @@ static int mtk_eth_mux_setup(struct mtk_ - } - } - -+ dev_dbg(eth->dev, "leaving mux_setup %s\n", -+ mtk_eth_path_name(path)); -+ - out: - return err; - } - -+int mtk_gmac_usxgmii_path_setup(struct mtk_eth *eth, int mac_id) -+{ -+ u64 path; -+ -+ path = (mac_id == MTK_GMAC1_ID) ? MTK_ETH_PATH_GMAC1_USXGMII : -+ (mac_id == MTK_GMAC2_ID) ? MTK_ETH_PATH_GMAC2_USXGMII : -+ MTK_ETH_PATH_GMAC3_USXGMII; -+ -+ /* Setup proper MUXes along the path */ -+ return mtk_eth_mux_setup(eth, path); -+} -+ - int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id) - { - u64 path; - -- path = (mac_id == 0) ? MTK_ETH_PATH_GMAC1_SGMII : -- MTK_ETH_PATH_GMAC2_SGMII; -+ path = (mac_id == MTK_GMAC1_ID) ? MTK_ETH_PATH_GMAC1_SGMII : -+ (mac_id == MTK_GMAC2_ID) ? MTK_ETH_PATH_GMAC2_SGMII : -+ MTK_ETH_PATH_GMAC3_SGMII; -+ -+ /* Setup proper MUXes along the path */ -+ return mtk_eth_mux_setup(eth, path); -+} -+ -+int mtk_gmac_2p5gphy_path_setup(struct mtk_eth *eth, int mac_id) -+{ -+ u64 path = 0; -+ -+ if (mac_id == MTK_GMAC2_ID) -+ path = MTK_ETH_PATH_GMAC2_2P5GPHY; -+ -+ if (!path) -+ return -EINVAL; - - /* Setup proper MUXes along the path */ - return mtk_eth_mux_setup(eth, path); -@@ -282,4 +421,3 @@ int mtk_gmac_rgmii_path_setup(struct mtk - /* Setup proper MUXes along the path */ - return mtk_eth_mux_setup(eth, path); - } -- ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -437,6 +437,23 @@ static void mtk_gmac0_rgmii_adjust(struc - mtk_w32(eth, val, TRGMII_TCK_CTRL); - } - -+static void mtk_setup_bridge_switch(struct mtk_eth *eth) -+{ -+ int val; -+ -+ /* Force Port1 XGMAC Link Up */ -+ val = mtk_r32(eth, MTK_XGMAC_STS(MTK_GMAC1_ID)); -+ mtk_w32(eth, val | MTK_XGMAC_FORCE_LINK(MTK_GMAC1_ID), -+ MTK_XGMAC_STS(MTK_GMAC1_ID)); -+ -+ /* Adjust GSW bridge IPG to 11*/ -+ val = mtk_r32(eth, MTK_GSW_CFG); -+ val &= ~(GSWTX_IPG_MASK | GSWRX_IPG_MASK); -+ val |= (GSW_IPG_11 << GSWTX_IPG_SHIFT) | -+ (GSW_IPG_11 << GSWRX_IPG_SHIFT); -+ mtk_w32(eth, val, MTK_GSW_CFG); -+} -+ - static struct phylink_pcs *mtk_mac_select_pcs(struct phylink_config *config, - phy_interface_t interface) - { -@@ -451,6 +468,12 @@ static struct phylink_pcs *mtk_mac_selec - 0 : mac->id; - - return eth->sgmii_pcs[sid]; -+ } else if ((interface == PHY_INTERFACE_MODE_USXGMII || -+ interface == PHY_INTERFACE_MODE_10GKR || -+ interface == PHY_INTERFACE_MODE_5GBASER) && -+ MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3) && -+ mac->id != MTK_GMAC1_ID) { -+ return mtk_usxgmii_select_pcs(eth, mac->id); - } - - return NULL; -@@ -462,7 +485,7 @@ static void mtk_mac_config(struct phylin - struct mtk_mac *mac = container_of(config, struct mtk_mac, - phylink_config); - struct mtk_eth *eth = mac->hw; -- int val, ge_mode, err = 0; -+ int val, ge_mode, force_link, err = 0; - u32 i; - - /* MT76x8 has no hardware settings between for the MAC */ -@@ -506,6 +529,23 @@ static void mtk_mac_config(struct phylin - goto init_err; - } - break; -+ case PHY_INTERFACE_MODE_USXGMII: -+ case PHY_INTERFACE_MODE_10GKR: -+ case PHY_INTERFACE_MODE_5GBASER: -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII)) { -+ err = mtk_gmac_usxgmii_path_setup(eth, mac->id); -+ if (err) -+ goto init_err; -+ } -+ break; -+ case PHY_INTERFACE_MODE_INTERNAL: -+ if (mac->id == MTK_GMAC2_ID && -+ MTK_HAS_CAPS(eth->soc->caps, MTK_2P5GPHY)) { -+ err = mtk_gmac_2p5gphy_path_setup(eth, mac->id); -+ if (err) -+ goto init_err; -+ } -+ break; - default: - goto err_phy; - } -@@ -584,14 +624,78 @@ static void mtk_mac_config(struct phylin - SYSCFG0_SGMII_MASK, - ~(u32)SYSCFG0_SGMII_MASK); - -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) { -+ mtk_xfi_pll_enable(eth); -+ mtk_sgmii_reset(eth, mac->id); -+ if (phylink_autoneg_inband(mode)) -+ mtk_sgmii_setup_phya_gen1(eth, mac->id); -+ else -+ mtk_sgmii_setup_phya_gen2(eth, mac->id); -+ } - /* Save the syscfg0 value for mac_finish */ - mac->syscfg0 = val; -- } else if (phylink_autoneg_inband(mode)) { -+ } else if (state->interface != PHY_INTERFACE_MODE_USXGMII && -+ state->interface != PHY_INTERFACE_MODE_10GKR && -+ state->interface != PHY_INTERFACE_MODE_5GBASER && -+ phylink_autoneg_inband(mode)) { - dev_err(eth->dev, -- "In-band mode not supported in non SGMII mode!\n"); -+ "In-band mode not supported in non-SerDes modes!\n"); - return; - } - -+ /* Setup gmac */ -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3) && -+ (mtk_interface_mode_is_xgmii(state->interface) || -+ mac->interface == PHY_INTERFACE_MODE_INTERNAL)) { -+ mtk_w32(mac->hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac->id)); -+ mtk_w32(mac->hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac->id)); -+ -+ switch (mac->id) { -+ case MTK_GMAC1_ID: -+ mtk_setup_bridge_switch(eth); -+ break; -+ case MTK_GMAC2_ID: -+ force_link = (mac->interface == -+ PHY_INTERFACE_MODE_INTERNAL) ? -+ MTK_XGMAC_FORCE_LINK(mac->id) : 0; -+ val = mtk_r32(eth, MTK_XGMAC_STS(mac->id)); -+ mtk_w32(eth, val | force_link, -+ MTK_XGMAC_STS(mac->id)); -+ break; -+ case MTK_GMAC3_ID: -+ val = mtk_r32(eth, MTK_XGMAC_STS(mac->id)); -+ mtk_w32(eth, val | MTK_XGMAC_FORCE_LINK(mac->id), -+ MTK_XGMAC_STS(mac->id)); -+ break; -+ } -+ } else { -+ val = mtk_r32(eth, MTK_GDMA_EG_CTRL(mac->id)); -+ mtk_w32(eth, val & ~MTK_GDMA_XGDM_SEL, -+ MTK_GDMA_EG_CTRL(mac->id)); -+ -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) { -+ switch (mac->id) { -+ case MTK_GMAC2_ID: -+ case MTK_GMAC3_ID: -+ val = mtk_r32(eth, MTK_XGMAC_STS(mac->id)); -+ mtk_w32(eth, -+ val & ~MTK_XGMAC_FORCE_LINK(mac->id), -+ MTK_XGMAC_STS(mac->id)); -+ break; -+ } -+ } -+ -+/* -+ if (mac->type != mac_type) { -+ if (atomic_read(&reset_pending) == 0) { -+ atomic_inc(&force); -+ schedule_work(ð->pending_work); -+ atomic_inc(&reset_pending); -+ } else -+ atomic_dec(&reset_pending); -+ } -+*/ -+ } - return; - - err_phy: -@@ -631,11 +735,40 @@ static int mtk_mac_finish(struct phylink - return 0; - } - --static void mtk_mac_pcs_get_state(struct phylink_config *config, -+static void mtk_xgdm_pcs_get_state(struct mtk_mac *mac, -+ struct phylink_link_state *state) -+{ -+ u32 sts = mtk_r32(mac->hw, MTK_XGMAC_STS(mac->id)); -+ -+ if (mac->id == MTK_GMAC2_ID) -+ sts = sts >> 16; -+ -+ state->link = FIELD_GET(MTK_USXGMII_PCS_LINK, sts); -+ if (!state->link) -+ return; -+ -+ state->duplex = DUPLEX_FULL; -+ state->interface = mac->interface; -+ -+ switch (FIELD_GET(MTK_USXGMII_PCS_MODE, sts)) { -+ case 0: -+ state->speed = SPEED_10000; -+ break; -+ case 1: -+ state->speed = SPEED_5000; -+ break; -+ case 2: -+ state->speed = SPEED_2500; -+ break; -+ case 3: -+ state->speed = SPEED_1000; -+ break; -+ } -+} -+ -+static void mtk_gdm_pcs_get_state(struct mtk_mac *mac, - struct phylink_link_state *state) - { -- struct mtk_mac *mac = container_of(config, struct mtk_mac, -- phylink_config); - u32 pmsr = mtk_r32(mac->hw, MTK_MAC_MSR(mac->id)); - - state->link = (pmsr & MAC_MSR_LINK); -@@ -663,15 +796,35 @@ static void mtk_mac_pcs_get_state(struct - state->pause |= MLO_PAUSE_TX; - } - -+static void mtk_mac_pcs_get_state(struct phylink_config *config, -+ struct phylink_link_state *state) -+{ -+ struct mtk_mac *mac = container_of(config, struct mtk_mac, -+ phylink_config); -+ -+ if (mtk_interface_mode_is_xgmii(state->interface)) -+ mtk_xgdm_pcs_get_state(mac, state); -+ else -+ mtk_gdm_pcs_get_state(mac, state); -+} -+ - static void mtk_mac_link_down(struct phylink_config *config, unsigned int mode, - phy_interface_t interface) - { - struct mtk_mac *mac = container_of(config, struct mtk_mac, - phylink_config); -- u32 mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); -+ u32 mcr; - -- mcr &= ~(MAC_MCR_TX_EN | MAC_MCR_RX_EN | MAC_MCR_FORCE_LINK); -- mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); -+ if (!mtk_interface_mode_is_xgmii(interface)) { -+ mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); -+ mcr &= ~(MAC_MCR_TX_EN | MAC_MCR_RX_EN); -+ mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); -+ } else if (mac->id != MTK_GMAC1_ID) { -+ mcr = mtk_r32(mac->hw, MTK_XMAC_MCR(mac->id)); -+ mcr &= 0xfffffff0; -+ mcr |= XMAC_MCR_TRX_DISABLE; -+ mtk_w32(mac->hw, mcr, MTK_XMAC_MCR(mac->id)); -+ } - } - - static void mtk_set_queue_speed(struct mtk_eth *eth, unsigned int idx, -@@ -743,13 +896,11 @@ static void mtk_set_queue_speed(struct m - mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); - } - --static void mtk_mac_link_up(struct phylink_config *config, -- struct phy_device *phy, -- unsigned int mode, phy_interface_t interface, -- int speed, int duplex, bool tx_pause, bool rx_pause) -+static void mtk_gdm_mac_link_up(struct mtk_mac *mac, -+ struct phy_device *phy, -+ unsigned int mode, phy_interface_t interface, -+ int speed, int duplex, bool tx_pause, bool rx_pause) - { -- struct mtk_mac *mac = container_of(config, struct mtk_mac, -- phylink_config); - u32 mcr; - - mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); -@@ -783,6 +934,47 @@ static void mtk_mac_link_up(struct phyli - mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); - } - -+static void mtk_xgdm_mac_link_up(struct mtk_mac *mac, -+ struct phy_device *phy, -+ unsigned int mode, phy_interface_t interface, -+ int speed, int duplex, bool tx_pause, bool rx_pause) -+{ -+ u32 mcr; -+ -+ if (mac->id == MTK_GMAC1_ID) -+ return; -+ -+ mcr = mtk_r32(mac->hw, MTK_XMAC_MCR(mac->id)); -+ -+ mcr &= ~(XMAC_MCR_FORCE_TX_FC | XMAC_MCR_FORCE_RX_FC); -+ /* Configure pause modes - -+ * phylink will avoid these for half duplex -+ */ -+ if (tx_pause) -+ mcr |= XMAC_MCR_FORCE_TX_FC; -+ if (rx_pause) -+ mcr |= XMAC_MCR_FORCE_RX_FC; -+ -+ mcr &= ~(XMAC_MCR_TRX_DISABLE); -+ mtk_w32(mac->hw, mcr, MTK_XMAC_MCR(mac->id)); -+} -+ -+static void mtk_mac_link_up(struct phylink_config *config, -+ struct phy_device *phy, -+ unsigned int mode, phy_interface_t interface, -+ int speed, int duplex, bool tx_pause, bool rx_pause) -+{ -+ struct mtk_mac *mac = container_of(config, struct mtk_mac, -+ phylink_config); -+ -+ if (mtk_interface_mode_is_xgmii(interface)) -+ mtk_xgdm_mac_link_up(mac, phy, mode, interface, speed, duplex, -+ tx_pause, rx_pause); -+ else -+ mtk_gdm_mac_link_up(mac, phy, mode, interface, speed, duplex, -+ tx_pause, rx_pause); -+} -+ - static const struct phylink_mac_ops mtk_phylink_ops = { - .validate = phylink_generic_validate, - .mac_select_pcs = mtk_mac_select_pcs, -@@ -835,10 +1027,21 @@ static int mtk_mdio_init(struct mtk_eth - } - divider = min_t(unsigned int, DIV_ROUND_UP(MDC_MAX_FREQ, max_clk), 63); - -+ /* Configure MDC Turbo Mode */ -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) { -+ val = mtk_r32(eth, MTK_MAC_MISC_V3); -+ val |= MISC_MDC_TURBO; -+ mtk_w32(eth, val, MTK_MAC_MISC_V3); -+ } else { -+ val = mtk_r32(eth, MTK_PPSC); -+ val |= PPSC_MDC_TURBO; -+ mtk_w32(eth, val, MTK_PPSC); -+ } -+ - /* Configure MDC Divider */ - val = mtk_r32(eth, MTK_PPSC); - val &= ~PPSC_MDC_CFG; -- val |= FIELD_PREP(PPSC_MDC_CFG, divider) | PPSC_MDC_TURBO; -+ val |= FIELD_PREP(PPSC_MDC_CFG, divider); - mtk_w32(eth, val, MTK_PPSC); - - dev_dbg(eth->dev, "MDC is running on %d Hz\n", MDC_MAX_FREQ / divider); -@@ -4417,8 +4620,8 @@ static int mtk_add_mac(struct mtk_eth *e - const __be32 *_id = of_get_property(np, "reg", NULL); - phy_interface_t phy_mode; - struct phylink *phylink; -- struct mtk_mac *mac; - int id, err; -+ struct mtk_mac *mac; - int txqs = 1; - - if (!_id) { -@@ -4520,6 +4723,32 @@ static int mtk_add_mac(struct mtk_eth *e - mac->phylink_config.supported_interfaces); - } - -+ if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_USXGMII)) { -+ if (id == MTK_GMAC1_ID) { -+ mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | -+ MAC_SYM_PAUSE | -+ MAC_10000FD; -+ phy_interface_zero( -+ mac->phylink_config.supported_interfaces); -+ __set_bit(PHY_INTERFACE_MODE_INTERNAL, -+ mac->phylink_config.supported_interfaces); -+ } else { -+ mac->phylink_config.mac_capabilities |= MAC_5000FD | MAC_10000FD; -+ __set_bit(PHY_INTERFACE_MODE_5GBASER, -+ mac->phylink_config.supported_interfaces); -+ __set_bit(PHY_INTERFACE_MODE_10GKR, -+ mac->phylink_config.supported_interfaces); -+ __set_bit(PHY_INTERFACE_MODE_USXGMII, -+ mac->phylink_config.supported_interfaces); -+ } -+ } -+ -+ if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_2P5GPHY)) { -+ if (id == MTK_GMAC2_ID) -+ __set_bit(PHY_INTERFACE_MODE_INTERNAL, -+ mac->phylink_config.supported_interfaces); -+ } -+ - phylink = phylink_create(&mac->phylink_config, - of_fwnode_handle(mac->of_node), - phy_mode, &mtk_phylink_ops); -@@ -4707,6 +4936,13 @@ static int mtk_probe(struct platform_dev - - if (err) - return err; -+ } -+ -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII)) { -+ err = mtk_usxgmii_init(eth); -+ -+ if (err) -+ return err; - } - - if (eth->soc->required_pctl) { ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -126,6 +126,11 @@ - #define MTK_GDMA_TO_PDMA 0x0 - #define MTK_GDMA_DROP_ALL 0x7777 - -+/* GDM Egress Control Register */ -+#define MTK_GDMA_EG_CTRL(x) ((x == MTK_GMAC3_ID) ? \ -+ 0x544 : 0x504 + (x * 0x1000)) -+#define MTK_GDMA_XGDM_SEL BIT(31) -+ - /* Unicast Filter MAC Address Register - Low */ - #define MTK_GDMA_MAC_ADRL(x) (0x508 + (x * 0x1000)) - -@@ -386,7 +391,26 @@ - #define PHY_IAC_TIMEOUT HZ - - #define MTK_MAC_MISC 0x1000c -+#define MTK_MAC_MISC_V3 0x10010 - #define MTK_MUX_TO_ESW BIT(0) -+#define MISC_MDC_TURBO BIT(4) -+ -+/* XMAC status registers */ -+#define MTK_XGMAC_STS(x) ((x == MTK_GMAC3_ID) ? 0x1001C : 0x1000C) -+#define MTK_XGMAC_FORCE_LINK(x) ((x == MTK_GMAC2_ID) ? BIT(31) : BIT(15)) -+#define MTK_USXGMII_PCS_LINK BIT(8) -+#define MTK_XGMAC_RX_FC BIT(5) -+#define MTK_XGMAC_TX_FC BIT(4) -+#define MTK_USXGMII_PCS_MODE GENMASK(3, 1) -+#define MTK_XGMAC_LINK_STS BIT(0) -+ -+/* GSW bridge registers */ -+#define MTK_GSW_CFG (0x10080) -+#define GSWTX_IPG_MASK GENMASK(19, 16) -+#define GSWTX_IPG_SHIFT 16 -+#define GSWRX_IPG_MASK GENMASK(3, 0) -+#define GSWRX_IPG_SHIFT 0 -+#define GSW_IPG_11 11 - - /* Mac control registers */ - #define MTK_MAC_MCR(x) (0x10100 + (x * 0x100)) -@@ -411,6 +435,17 @@ - #define MAC_MCR_FORCE_LINK BIT(0) - #define MAC_MCR_FORCE_LINK_DOWN (MAC_MCR_FORCE_MODE) - -+/* Mac EEE control registers */ -+#define MTK_MAC_EEE(x) (0x10104 + (x * 0x100)) -+#define MAC_EEE_WAKEUP_TIME_1000 GENMASK(31, 24) -+#define MAC_EEE_WAKEUP_TIME_100 GENMASK(23, 16) -+#define MAC_EEE_LPI_TXIDLE_THD GENMASK(15, 8) -+#define MAC_EEE_RESV0 GENMASK(7, 4) -+#define MAC_EEE_CKG_TXILDE BIT(3) -+#define MAC_EEE_CKG_RXLPI BIT(2) -+#define MAC_EEE_TX_DOWN_REQ BIT(1) -+#define MAC_EEE_LPI_MODE BIT(0) -+ - /* Mac status registers */ - #define MTK_MAC_MSR(x) (0x10108 + (x * 0x100)) - #define MAC_MSR_EEE1G BIT(7) -@@ -455,6 +490,12 @@ - #define INTF_MODE_RGMII_1000 (TRGMII_MODE | TRGMII_CENTRAL_ALIGNED) - #define INTF_MODE_RGMII_10_100 0 - -+/* XFI Mac control registers */ -+#define MTK_XMAC_MCR(x) (0x12000 + ((x - 1) * 0x1000)) -+#define XMAC_MCR_TRX_DISABLE 0xf -+#define XMAC_MCR_FORCE_TX_FC BIT(5) -+#define XMAC_MCR_FORCE_RX_FC BIT(4) -+ - /* GPIO port control registers for GMAC 2*/ - #define GPIO_OD33_CTRL8 0x4c0 - #define GPIO_BIAS_CTRL 0xed0 -@@ -480,6 +521,7 @@ - #define SYSCFG0_SGMII_GMAC2 ((3 << 8) & SYSCFG0_SGMII_MASK) - #define SYSCFG0_SGMII_GMAC1_V2 BIT(9) - #define SYSCFG0_SGMII_GMAC2_V2 BIT(8) -+#define SYSCFG0_SGMII_GMAC3_V2 BIT(7) - - - /* ethernet subsystem clock register */ -@@ -506,16 +548,91 @@ - #define ETHSYS_DMA_AG_MAP_QDMA BIT(1) - #define ETHSYS_DMA_AG_MAP_PPE BIT(2) - -+/* USXGMII subsystem config registers */ -+/* Register to control speed */ -+#define RG_PHY_TOP_SPEED_CTRL1 0x80C -+#define USXGMII_RATE_UPDATE_MODE BIT(31) -+#define USXGMII_MAC_CK_GATED BIT(29) -+#define USXGMII_IF_FORCE_EN BIT(28) -+#define USXGMII_RATE_ADAPT_MODE GENMASK(10, 8) -+#define USXGMII_RATE_ADAPT_MODE_X1 0 -+#define USXGMII_RATE_ADAPT_MODE_X2 1 -+#define USXGMII_RATE_ADAPT_MODE_X4 2 -+#define USXGMII_RATE_ADAPT_MODE_X10 3 -+#define USXGMII_RATE_ADAPT_MODE_X100 4 -+#define USXGMII_RATE_ADAPT_MODE_X5 5 -+#define USXGMII_RATE_ADAPT_MODE_X50 6 -+#define USXGMII_XFI_RX_MODE GENMASK(6, 4) -+#define USXGMII_XFI_RX_MODE_10G 0 -+#define USXGMII_XFI_RX_MODE_5G 1 -+#define USXGMII_XFI_TX_MODE GENMASK(2, 0) -+#define USXGMII_XFI_TX_MODE_10G 0 -+#define USXGMII_XFI_TX_MODE_5G 1 -+ -+/* Register to control PCS AN */ -+#define RG_PCS_AN_CTRL0 0x810 -+#define USXGMII_AN_RESTART BIT(31) -+#define USXGMII_AN_SYNC_CNT GENMASK(30, 11) -+#define USXGMII_AN_ENABLE BIT(0) -+ -+#define RG_PCS_AN_CTRL2 0x818 -+#define USXGMII_LINK_TIMER_IDLE_DETECT GENMASK(29, 20) -+#define USXGMII_LINK_TIMER_COMP_ACK_DETECT GENMASK(19, 10) -+#define USXGMII_LINK_TIMER_AN_RESTART GENMASK(9, 0) -+ -+/* Register to read PCS AN status */ -+#define RG_PCS_AN_STS0 0x81c -+#define USXGMII_LPA_SPEED_MASK GENMASK(11, 9) -+#define USXGMII_LPA_SPEED_10 0 -+#define USXGMII_LPA_SPEED_100 1 -+#define USXGMII_LPA_SPEED_1000 2 -+#define USXGMII_LPA_SPEED_10000 3 -+#define USXGMII_LPA_SPEED_2500 4 -+#define USXGMII_LPA_SPEED_5000 5 -+#define USXGMII_LPA_DUPLEX BIT(12) -+#define USXGMII_LPA_LINK BIT(15) -+#define USXGMII_LPA_LATCH BIT(31) -+ -+/* Register to control USXGMII XFI PLL digital */ -+#define XFI_PLL_DIG_GLB8 0x08 -+#define RG_XFI_PLL_EN BIT(31) -+ -+/* Register to control USXGMII XFI PLL analog */ -+#define XFI_PLL_ANA_GLB8 0x108 -+#define RG_XFI_PLL_ANA_SWWA 0x02283248 -+ - /* Infrasys subsystem config registers */ - #define INFRA_MISC2 0x70c - #define CO_QPHY_SEL BIT(0) - #define GEPHY_MAC_SEL BIT(1) - -+/* Toprgu subsystem config registers */ -+#define TOPRGU_SWSYSRST 0x18 -+#define SWSYSRST_UNLOCK_KEY GENMASK(31, 24) -+#define SWSYSRST_XFI_PLL_GRST BIT(16) -+#define SWSYSRST_XFI_PEXPT1_GRST BIT(15) -+#define SWSYSRST_XFI_PEXPT0_GRST BIT(14) -+#define SWSYSRST_XFI1_GRST BIT(13) -+#define SWSYSRST_XFI0_GRST BIT(12) -+#define SWSYSRST_SGMII1_GRST BIT(2) -+#define SWSYSRST_SGMII0_GRST BIT(1) -+#define TOPRGU_SWSYSRST_EN 0xFC -+ - /* Top misc registers */ -+#define TOP_MISC_NETSYS_PCS_MUX 0x84 -+#define NETSYS_PCS_MUX_MASK GENMASK(1, 0) -+#define MUX_G2_USXGMII_SEL BIT(1) -+#define MUX_HSGMII1_G1_SEL BIT(0) -+ - #define USB_PHY_SWITCH_REG 0x218 - #define QPHY_SEL_MASK GENMASK(1, 0) - #define SGMII_QPHY_SEL 0x2 - -+/* MDIO control */ -+#define MII_MMD_ACC_CTL_REG 0x0d -+#define MII_MMD_ADDR_DATA_REG 0x0e -+#define MMD_OP_MODE_DATA BIT(14) -+ - /* MT7628/88 specific stuff */ - #define MT7628_PDMA_OFFSET 0x0800 - #define MT7628_SDM_OFFSET 0x0c00 -@@ -809,13 +926,6 @@ enum mtk_gmac_id { - MTK_GMAC_ID_MAX - }; - --/* GDM Type */ --enum mtk_gdm_type { -- MTK_GDM_TYPE = 0, -- MTK_XGDM_TYPE, -- MTK_GDM_TYPE_MAX --}; -- - enum mtk_tx_buf_type { - MTK_TYPE_SKB, - MTK_TYPE_XDP_TX, -@@ -902,6 +1012,7 @@ enum mkt_eth_capabilities { - MTK_TRGMII_BIT, - MTK_SGMII_BIT, - MTK_USXGMII_BIT, -+ MTK_2P5GPHY_BIT, - MTK_ESW_BIT, - MTK_GEPHY_BIT, - MTK_MUX_BIT, -@@ -922,6 +1033,7 @@ enum mkt_eth_capabilities { - MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT, - MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT, - MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT, -+ MTK_ETH_MUX_GMAC2_TO_2P5GPHY_BIT, - MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT, - MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT, - MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII_BIT, -@@ -933,6 +1045,7 @@ enum mkt_eth_capabilities { - MTK_ETH_PATH_GMAC1_SGMII_BIT, - MTK_ETH_PATH_GMAC2_RGMII_BIT, - MTK_ETH_PATH_GMAC2_SGMII_BIT, -+ MTK_ETH_PATH_GMAC2_2P5GPHY_BIT, - MTK_ETH_PATH_GMAC2_GEPHY_BIT, - MTK_ETH_PATH_GMAC3_SGMII_BIT, - MTK_ETH_PATH_GDM1_ESW_BIT, -@@ -946,6 +1059,7 @@ enum mkt_eth_capabilities { - #define MTK_TRGMII BIT_ULL(MTK_TRGMII_BIT) - #define MTK_SGMII BIT_ULL(MTK_SGMII_BIT) - #define MTK_USXGMII BIT_ULL(MTK_USXGMII_BIT) -+#define MTK_2P5GPHY BIT_ULL(MTK_2P5GPHY_BIT) - #define MTK_ESW BIT_ULL(MTK_ESW_BIT) - #define MTK_GEPHY BIT_ULL(MTK_GEPHY_BIT) - #define MTK_MUX BIT_ULL(MTK_MUX_BIT) -@@ -968,6 +1082,8 @@ enum mkt_eth_capabilities { - BIT_ULL(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT) - #define MTK_ETH_MUX_U3_GMAC2_TO_QPHY \ - BIT_ULL(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT) -+#define MTK_ETH_MUX_GMAC2_TO_2P5GPHY \ -+ BIT_ULL(MTK_ETH_MUX_GMAC2_TO_2P5GPHY_BIT) - #define MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII \ - BIT_ULL(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT) - #define MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII \ -@@ -983,6 +1099,7 @@ enum mkt_eth_capabilities { - #define MTK_ETH_PATH_GMAC1_SGMII BIT_ULL(MTK_ETH_PATH_GMAC1_SGMII_BIT) - #define MTK_ETH_PATH_GMAC2_RGMII BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT) - #define MTK_ETH_PATH_GMAC2_SGMII BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT) -+#define MTK_ETH_PATH_GMAC2_2P5GPHY BIT_ULL(MTK_ETH_PATH_GMAC2_2P5GPHY_BIT) - #define MTK_ETH_PATH_GMAC2_GEPHY BIT_ULL(MTK_ETH_PATH_GMAC2_GEPHY_BIT) - #define MTK_ETH_PATH_GMAC3_SGMII BIT_ULL(MTK_ETH_PATH_GMAC3_SGMII_BIT) - #define MTK_ETH_PATH_GDM1_ESW BIT_ULL(MTK_ETH_PATH_GDM1_ESW_BIT) -@@ -996,6 +1113,7 @@ enum mkt_eth_capabilities { - #define MTK_GMAC2_RGMII (MTK_ETH_PATH_GMAC2_RGMII | MTK_RGMII) - #define MTK_GMAC2_SGMII (MTK_ETH_PATH_GMAC2_SGMII | MTK_SGMII) - #define MTK_GMAC2_GEPHY (MTK_ETH_PATH_GMAC2_GEPHY | MTK_GEPHY) -+#define MTK_GMAC2_2P5GPHY (MTK_ETH_PATH_GMAC2_2P5GPHY | MTK_2P5GPHY) - #define MTK_GMAC3_SGMII (MTK_ETH_PATH_GMAC3_SGMII | MTK_SGMII) - #define MTK_GDM1_ESW (MTK_ETH_PATH_GDM1_ESW | MTK_ESW) - #define MTK_GMAC1_USXGMII (MTK_ETH_PATH_GMAC1_USXGMII | MTK_USXGMII) -@@ -1019,6 +1137,10 @@ enum mkt_eth_capabilities { - (MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII | MTK_MUX | \ - MTK_SHARED_SGMII) - -+/* 2: GMAC2 -> XGMII */ -+#define MTK_MUX_GMAC2_TO_2P5GPHY \ -+ (MTK_ETH_MUX_GMAC2_TO_2P5GPHY | MTK_MUX | MTK_INFRA) -+ - /* 0: GMACx -> GEPHY, 1: GMACx -> SGMII where x is 1 or 2 */ - #define MTK_MUX_GMAC12_TO_GEPHY_SGMII \ - (MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII | MTK_MUX) -@@ -1077,7 +1199,8 @@ enum mkt_eth_capabilities { - MTK_MUX_GMAC123_TO_GEPHY_SGMII | \ - MTK_NETSYS_V3 | MTK_RSTCTRL_PPE1 | \ - MTK_GMAC1_USXGMII | MTK_GMAC2_USXGMII | \ -- MTK_GMAC3_USXGMII | MTK_MUX_GMAC123_TO_USXGMII) -+ MTK_GMAC3_USXGMII | MTK_MUX_GMAC123_TO_USXGMII | \ -+ MTK_GMAC2_2P5GPHY | MTK_MUX_GMAC2_TO_2P5GPHY) - - struct mtk_tx_dma_desc_info { - dma_addr_t addr; -@@ -1183,6 +1306,22 @@ struct mtk_soc_data { - - #define MTK_DMA_MONITOR_TIMEOUT msecs_to_jiffies(1000) - -+/* struct mtk_usxgmii_pcs - This structure holds each usxgmii regmap and -+ * associated data -+ * @regmap: The register map pointing at the range used to setup -+ * USXGMII modes -+ * @interface: Currently selected interface mode -+ * @id: The element is used to record the index of PCS -+ * @pcs: Phylink PCS structure -+ */ -+struct mtk_usxgmii_pcs { -+ struct mtk_eth *eth; -+ struct regmap *regmap; -+ phy_interface_t interface; -+ u8 id; -+ struct phylink_pcs pcs; -+}; -+ - /* struct mtk_eth - This is the main datasructure for holding the state - * of the driver - * @dev: The device pointer -@@ -1203,6 +1342,11 @@ struct mtk_soc_data { - * @infra: The register map pointing at the range used to setup - * SGMII and GePHY path - * @sgmii_pcs: Pointers to mtk-pcs-lynxi phylink_pcs instances -+ * @usxgmii_pll: The register map pointing at the range used to control -+ * the USXGMII SerDes PLL -+ * @regmap_pextp: The register map pointing at the range used to setup -+ * PHYA -+ * @usxgmii_pcs: Pointer to array of pointers to struct for USXGMII PCS - * @pctl: The register map pointing at the range used to setup - * GMAC port drive/slew values - * @dma_refcnt: track how many netdevs are using the DMA engine -@@ -1244,7 +1388,11 @@ struct mtk_eth { - unsigned long sysclk; - struct regmap *ethsys; - struct regmap *infra; -+ struct regmap *toprgu; - struct phylink_pcs **sgmii_pcs; -+ struct regmap *usxgmii_pll; -+ struct regmap **regmap_pextp; -+ struct mtk_usxgmii_pcs **usxgmii_pcs; - struct regmap *pctl; - bool hwlro; - refcount_t dma_refcnt; -@@ -1400,6 +1548,19 @@ static inline u32 mtk_get_ib2_multicast_ - return MTK_FOE_IB2_MULTICAST; - } - -+static inline bool mtk_interface_mode_is_xgmii(phy_interface_t interface) -+{ -+ switch (interface) { -+ case PHY_INTERFACE_MODE_USXGMII: -+ case PHY_INTERFACE_MODE_10GKR: -+ case PHY_INTERFACE_MODE_5GBASER: -+ return true; -+ break; -+ default: -+ return false; -+ } -+} -+ - /* read the hardware status register */ - void mtk_stats_update_mac(struct mtk_mac *mac); - -@@ -1407,8 +1568,10 @@ void mtk_w32(struct mtk_eth *eth, u32 va - u32 mtk_r32(struct mtk_eth *eth, unsigned reg); - - int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id); -+int mtk_gmac_2p5gphy_path_setup(struct mtk_eth *eth, int mac_id); - int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id); - int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id); -+int mtk_gmac_usxgmii_path_setup(struct mtk_eth *eth, int mac_id); - - int mtk_eth_offload_init(struct mtk_eth *eth); - int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type, -@@ -1418,5 +1581,20 @@ int mtk_flow_offload_cmd(struct mtk_eth - void mtk_flow_offload_cleanup(struct mtk_eth *eth, struct list_head *list); - void mtk_eth_set_dma_device(struct mtk_eth *eth, struct device *dma_dev); - -+#ifdef CONFIG_NET_MEDIATEK_SOC_USXGMII -+struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int id); -+int mtk_usxgmii_init(struct mtk_eth *eth); -+int mtk_xfi_pll_enable(struct mtk_eth *eth); -+void mtk_sgmii_setup_phya_gen1(struct mtk_eth *eth, int mac_id); -+void mtk_sgmii_setup_phya_gen2(struct mtk_eth *eth, int mac_id); -+void mtk_sgmii_reset(struct mtk_eth *eth, int mac_id); -+#else -+static inline struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int id) { return NULL; } -+static inline int mtk_usxgmii_init(struct mtk_eth *eth) { return 0; } -+static inline int mtk_xfi_pll_enable(struct mtk_eth *eth) { return 0; } -+static inline void mtk_sgmii_setup_phya_gen1(struct mtk_eth *eth, int mac_id) { } -+static inline void mtk_sgmii_setup_phya_gen2(struct mtk_eth *eth, int mac_id) { } -+static inline void mtk_sgmii_reset(struct mtk_eth *eth, int mac_id) { } -+#endif /* NET_MEDIATEK_SOC_USXGMII */ - - #endif /* MTK_ETH_H */ ---- /dev/null -+++ b/drivers/net/ethernet/mediatek/mtk_usxgmii.c -@@ -0,0 +1,835 @@ -+/* SPDX-License-Identifier: GPL-2.0 -+ * -+ * Copyright (c) 2022 MediaTek Inc. -+ * Author: Henry Yen -+ * Daniel Golle -+ */ -+ -+#include -+#include -+#include -+#include "mtk_eth_soc.h" -+ -+static struct mtk_usxgmii_pcs *pcs_to_mtk_usxgmii_pcs(struct phylink_pcs *pcs) -+{ -+ return container_of(pcs, struct mtk_usxgmii_pcs, pcs); -+} -+ -+static int mtk_xfi_pextp_init(struct mtk_eth *eth) -+{ -+ struct device *dev = eth->dev; -+ struct device_node *r = dev->of_node; -+ struct device_node *np; -+ int i; -+ -+ eth->regmap_pextp = devm_kcalloc(dev, eth->soc->num_devs, sizeof(eth->regmap_pextp), GFP_KERNEL); -+ if (!eth->regmap_pextp) -+ return -ENOMEM; -+ -+ for (i = 0; i < eth->soc->num_devs; i++) { -+ np = of_parse_phandle(r, "mediatek,xfi_pextp", i); -+ if (!np) -+ break; -+ -+ eth->regmap_pextp[i] = syscon_node_to_regmap(np); -+ if (IS_ERR(eth->regmap_pextp[i])) -+ return PTR_ERR(eth->regmap_pextp[i]); -+ } -+ -+ return 0; -+} -+ -+static int mtk_xfi_pll_init(struct mtk_eth *eth) -+{ -+ struct device_node *r = eth->dev->of_node; -+ struct device_node *np; -+ -+ np = of_parse_phandle(r, "mediatek,xfi_pll", 0); -+ if (!np) -+ return -1; -+ -+ eth->usxgmii_pll = syscon_node_to_regmap(np); -+ if (IS_ERR(eth->usxgmii_pll)) -+ return PTR_ERR(eth->usxgmii_pll); -+ -+ return 0; -+} -+ -+static int mtk_toprgu_init(struct mtk_eth *eth) -+{ -+ struct device_node *r = eth->dev->of_node; -+ struct device_node *np; -+ -+ np = of_parse_phandle(r, "mediatek,toprgu", 0); -+ if (!np) -+ return -1; -+ -+ eth->toprgu = syscon_node_to_regmap(np); -+ if (IS_ERR(eth->toprgu)) -+ return PTR_ERR(eth->toprgu); -+ -+ return 0; -+} -+ -+int mtk_xfi_pll_enable(struct mtk_eth *eth) -+{ -+ u32 val = 0; -+ -+ if (!eth->usxgmii_pll) -+ return -EINVAL; -+ -+ /* Add software workaround for USXGMII PLL TCL issue */ -+ regmap_write(eth->usxgmii_pll, XFI_PLL_ANA_GLB8, RG_XFI_PLL_ANA_SWWA); -+ -+ regmap_read(eth->usxgmii_pll, XFI_PLL_DIG_GLB8, &val); -+ val |= RG_XFI_PLL_EN; -+ regmap_write(eth->usxgmii_pll, XFI_PLL_DIG_GLB8, val); -+ -+ return 0; -+} -+ -+static int mtk_mac2xgmii_id(struct mtk_eth *eth, int mac_id) -+{ -+ int xgmii_id = mac_id; -+ -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) { -+ switch (mac_id) { -+ case MTK_GMAC1_ID: -+ case MTK_GMAC2_ID: -+ xgmii_id = 1; -+ break; -+ case MTK_GMAC3_ID: -+ xgmii_id = 0; -+ break; -+ default: -+ xgmii_id = -1; -+ } -+ } -+ -+ return xgmii_id; -+} -+ -+static int mtk_xgmii2mac_id(struct mtk_eth *eth, int xgmii_id) -+{ -+ int mac_id = xgmii_id; -+ -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) { -+ switch (xgmii_id) { -+ case 0: -+ mac_id = 2; -+ break; -+ case 1: -+ mac_id = 1; -+ break; -+ default: -+ mac_id = -1; -+ } -+ } -+ -+ return mac_id; -+} -+ -+ -+static void mtk_usxgmii_setup_phya_usxgmii(struct mtk_usxgmii_pcs *mpcs) -+{ -+ struct regmap *pextp; -+ -+ if (!mpcs->eth) -+ return; -+ -+ pextp = mpcs->eth->regmap_pextp[mpcs->id]; -+ if (!pextp) -+ return; -+ -+ /* Setup operation mode */ -+ regmap_write(pextp, 0x9024, 0x00C9071C); -+ regmap_write(pextp, 0x2020, 0xAA8585AA); -+ regmap_write(pextp, 0x2030, 0x0C020707); -+ regmap_write(pextp, 0x2034, 0x0E050F0F); -+ regmap_write(pextp, 0x2040, 0x00140032); -+ regmap_write(pextp, 0x50F0, 0x00C014AA); -+ regmap_write(pextp, 0x50E0, 0x3777C12B); -+ regmap_write(pextp, 0x506C, 0x005F9CFF); -+ regmap_write(pextp, 0x5070, 0x9D9DFAFA); -+ regmap_write(pextp, 0x5074, 0x27273F3F); -+ regmap_write(pextp, 0x5078, 0xA7883C68); -+ regmap_write(pextp, 0x507C, 0x11661166); -+ regmap_write(pextp, 0x5080, 0x0E000AAF); -+ regmap_write(pextp, 0x5084, 0x08080D0D); -+ regmap_write(pextp, 0x5088, 0x02030909); -+ regmap_write(pextp, 0x50E4, 0x0C0C0000); -+ regmap_write(pextp, 0x50E8, 0x04040000); -+ regmap_write(pextp, 0x50EC, 0x0F0F0C06); -+ regmap_write(pextp, 0x50A8, 0x506E8C8C); -+ regmap_write(pextp, 0x6004, 0x18190000); -+ regmap_write(pextp, 0x00F8, 0x01423342); -+ /* Force SGDT_OUT off and select PCS */ -+ regmap_write(pextp, 0x00F4, 0x80201F20); -+ /* Force GLB_CKDET_OUT */ -+ regmap_write(pextp, 0x0030, 0x00050C00); -+ /* Force AEQ on */ -+ regmap_write(pextp, 0x0070, 0x02002800); -+ ndelay(1020); -+ /* Setup DA default value */ -+ regmap_write(pextp, 0x30B0, 0x00000020); -+ regmap_write(pextp, 0x3028, 0x00008A01); -+ regmap_write(pextp, 0x302C, 0x0000A884); -+ regmap_write(pextp, 0x3024, 0x00083002); -+ regmap_write(pextp, 0x3010, 0x00022220); -+ regmap_write(pextp, 0x5064, 0x0F020A01); -+ regmap_write(pextp, 0x50B4, 0x06100600); -+ regmap_write(pextp, 0x3048, 0x40704000); -+ regmap_write(pextp, 0x3050, 0xA8000000); -+ regmap_write(pextp, 0x3054, 0x000000AA); -+ regmap_write(pextp, 0x306C, 0x00000F00); -+ regmap_write(pextp, 0xA060, 0x00040000); -+ regmap_write(pextp, 0x90D0, 0x00000001); -+ /* Release reset */ -+ regmap_write(pextp, 0x0070, 0x0200E800); -+ udelay(150); -+ /* Switch to P0 */ -+ regmap_write(pextp, 0x0070, 0x0200C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0200C101); -+ udelay(15); -+ /* Switch to Gen3 */ -+ regmap_write(pextp, 0x0070, 0x0202C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0202C101); -+ udelay(100); -+ regmap_write(pextp, 0x30B0, 0x00000030); -+ regmap_write(pextp, 0x00F4, 0x80201F00); -+ regmap_write(pextp, 0x3040, 0x30000000); -+ udelay(400); -+} -+ -+static void mtk_usxgmii_setup_phya_5gbaser(struct mtk_usxgmii_pcs *mpcs) -+{ -+ struct regmap *pextp; -+ -+ if (!mpcs->eth) -+ return; -+ -+ pextp = mpcs->eth->regmap_pextp[mpcs->id]; -+ if (!pextp) -+ return; -+ -+ /* Setup operation mode */ -+ regmap_write(pextp, 0x9024, 0x00D9071C); -+ regmap_write(pextp, 0x2020, 0xAAA5A5AA); -+ regmap_write(pextp, 0x2030, 0x0C020707); -+ regmap_write(pextp, 0x2034, 0x0E050F0F); -+ regmap_write(pextp, 0x2040, 0x00140032); -+ regmap_write(pextp, 0x50F0, 0x00C018AA); -+ regmap_write(pextp, 0x50E0, 0x3777812B); -+ regmap_write(pextp, 0x506C, 0x005C9CFF); -+ regmap_write(pextp, 0x5070, 0x9DFAFAFA); -+ regmap_write(pextp, 0x5074, 0x273F3F3F); -+ regmap_write(pextp, 0x5078, 0xA8883868); -+ regmap_write(pextp, 0x507C, 0x14661466); -+ regmap_write(pextp, 0x5080, 0x0E001ABF); -+ regmap_write(pextp, 0x5084, 0x080B0D0D); -+ regmap_write(pextp, 0x5088, 0x02050909); -+ regmap_write(pextp, 0x50E4, 0x0C000000); -+ regmap_write(pextp, 0x50E8, 0x04000000); -+ regmap_write(pextp, 0x50EC, 0x0F0F0C06); -+ regmap_write(pextp, 0x50A8, 0x50808C8C); -+ regmap_write(pextp, 0x6004, 0x18000000); -+ regmap_write(pextp, 0x00F8, 0x00A132A1); -+ /* Force SGDT_OUT off and select PCS */ -+ regmap_write(pextp, 0x00F4, 0x80201F20); -+ /* Force GLB_CKDET_OUT */ -+ regmap_write(pextp, 0x0030, 0x00050C00); -+ /* Force AEQ on */ -+ regmap_write(pextp, 0x0070, 0x02002800); -+ ndelay(1020); -+ /* Setup DA default value */ -+ regmap_write(pextp, 0x30B0, 0x00000020); -+ regmap_write(pextp, 0x3028, 0x00008A01); -+ regmap_write(pextp, 0x302C, 0x0000A884); -+ regmap_write(pextp, 0x3024, 0x00083002); -+ regmap_write(pextp, 0x3010, 0x00022220); -+ regmap_write(pextp, 0x5064, 0x0F020A01); -+ regmap_write(pextp, 0x50B4, 0x06100600); -+ regmap_write(pextp, 0x3048, 0x40704000); -+ regmap_write(pextp, 0x3050, 0xA8000000); -+ regmap_write(pextp, 0x3054, 0x000000AA); -+ regmap_write(pextp, 0x306C, 0x00000F00); -+ regmap_write(pextp, 0xA060, 0x00040000); -+ regmap_write(pextp, 0x90D0, 0x00000003); -+ /* Release reset */ -+ regmap_write(pextp, 0x0070, 0x0200E800); -+ udelay(150); -+ /* Switch to P0 */ -+ regmap_write(pextp, 0x0070, 0x0200C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0200C101); -+ udelay(15); -+ /* Switch to Gen3 */ -+ regmap_write(pextp, 0x0070, 0x0202C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0202C101); -+ udelay(100); -+ regmap_write(pextp, 0x30B0, 0x00000030); -+ regmap_write(pextp, 0x00F4, 0x80201F00); -+ regmap_write(pextp, 0x3040, 0x30000000); -+ udelay(400); -+} -+ -+static void mtk_usxgmii_setup_phya_10gbaser(struct mtk_usxgmii_pcs *mpcs) -+{ -+ struct regmap *pextp; -+ -+ if (!mpcs->eth) -+ return; -+ -+ pextp = mpcs->eth->regmap_pextp[mpcs->id]; -+ if (!pextp) -+ return; -+ -+ /* Setup operation mode */ -+ regmap_write(pextp, 0x9024, 0x00C9071C); -+ regmap_write(pextp, 0x2020, 0xAA8585AA); -+ regmap_write(pextp, 0x2030, 0x0C020707); -+ regmap_write(pextp, 0x2034, 0x0E050F0F); -+ regmap_write(pextp, 0x2040, 0x00140032); -+ regmap_write(pextp, 0x50F0, 0x00C014AA); -+ regmap_write(pextp, 0x50E0, 0x3777C12B); -+ regmap_write(pextp, 0x506C, 0x005F9CFF); -+ regmap_write(pextp, 0x5070, 0x9D9DFAFA); -+ regmap_write(pextp, 0x5074, 0x27273F3F); -+ regmap_write(pextp, 0x5078, 0xA7883C68); -+ regmap_write(pextp, 0x507C, 0x11661166); -+ regmap_write(pextp, 0x5080, 0x0E000AAF); -+ regmap_write(pextp, 0x5084, 0x08080D0D); -+ regmap_write(pextp, 0x5088, 0x02030909); -+ regmap_write(pextp, 0x50E4, 0x0C0C0000); -+ regmap_write(pextp, 0x50E8, 0x04040000); -+ regmap_write(pextp, 0x50EC, 0x0F0F0C06); -+ regmap_write(pextp, 0x50A8, 0x506E8C8C); -+ regmap_write(pextp, 0x6004, 0x18190000); -+ regmap_write(pextp, 0x00F8, 0x01423342); -+ /* Force SGDT_OUT off and select PCS */ -+ regmap_write(pextp, 0x00F4, 0x80201F20); -+ /* Force GLB_CKDET_OUT */ -+ regmap_write(pextp, 0x0030, 0x00050C00); -+ /* Force AEQ on */ -+ regmap_write(pextp, 0x0070, 0x02002800); -+ ndelay(1020); -+ /* Setup DA default value */ -+ regmap_write(pextp, 0x30B0, 0x00000020); -+ regmap_write(pextp, 0x3028, 0x00008A01); -+ regmap_write(pextp, 0x302C, 0x0000A884); -+ regmap_write(pextp, 0x3024, 0x00083002); -+ regmap_write(pextp, 0x3010, 0x00022220); -+ regmap_write(pextp, 0x5064, 0x0F020A01); -+ regmap_write(pextp, 0x50B4, 0x06100600); -+ regmap_write(pextp, 0x3048, 0x47684100); -+ regmap_write(pextp, 0x3050, 0x00000000); -+ regmap_write(pextp, 0x3054, 0x00000000); -+ regmap_write(pextp, 0x306C, 0x00000F00); -+ if (mpcs->id == 0) -+ regmap_write(pextp, 0xA008, 0x0007B400); -+ -+ regmap_write(pextp, 0xA060, 0x00040000); -+ regmap_write(pextp, 0x90D0, 0x00000001); -+ /* Release reset */ -+ regmap_write(pextp, 0x0070, 0x0200E800); -+ udelay(150); -+ /* Switch to P0 */ -+ regmap_write(pextp, 0x0070, 0x0200C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0200C101); -+ udelay(15); -+ /* Switch to Gen3 */ -+ regmap_write(pextp, 0x0070, 0x0202C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0202C101); -+ udelay(100); -+ regmap_write(pextp, 0x30B0, 0x00000030); -+ regmap_write(pextp, 0x00F4, 0x80201F00); -+ regmap_write(pextp, 0x3040, 0x30000000); -+ udelay(400); -+} -+ -+void mtk_sgmii_setup_phya_gen1(struct mtk_eth *eth, int mac_id) -+{ -+ u32 id = mtk_mac2xgmii_id(eth, mac_id); -+ struct regmap *pextp; -+ -+ if (id >= eth->soc->num_devs) -+ return; -+ -+ pextp = eth->regmap_pextp[id]; -+ if (!pextp) -+ return; -+ -+ /* Setup operation mode */ -+ regmap_write(pextp, 0x9024, 0x00D9071C); -+ regmap_write(pextp, 0x2020, 0xAA8585AA); -+ regmap_write(pextp, 0x2030, 0x0C020207); -+ regmap_write(pextp, 0x2034, 0x0E05050F); -+ regmap_write(pextp, 0x2040, 0x00200032); -+ regmap_write(pextp, 0x50F0, 0x00C014BA); -+ regmap_write(pextp, 0x50E0, 0x3777C12B); -+ regmap_write(pextp, 0x506C, 0x005F9CFF); -+ regmap_write(pextp, 0x5070, 0x9D9DFAFA); -+ regmap_write(pextp, 0x5074, 0x27273F3F); -+ regmap_write(pextp, 0x5078, 0xA7883C68); -+ regmap_write(pextp, 0x507C, 0x11661166); -+ regmap_write(pextp, 0x5080, 0x0E000EAF); -+ regmap_write(pextp, 0x5084, 0x08080E0D); -+ regmap_write(pextp, 0x5088, 0x02030B09); -+ regmap_write(pextp, 0x50E4, 0x0C0C0000); -+ regmap_write(pextp, 0x50E8, 0x04040000); -+ regmap_write(pextp, 0x50EC, 0x0F0F0606); -+ regmap_write(pextp, 0x50A8, 0x506E8C8C); -+ regmap_write(pextp, 0x6004, 0x18190000); -+ regmap_write(pextp, 0x00F8, 0x00FA32FA); -+ /* Force SGDT_OUT off and select PCS */ -+ regmap_write(pextp, 0x00F4, 0x80201F21); -+ /* Force GLB_CKDET_OUT */ -+ regmap_write(pextp, 0x0030, 0x00050C00); -+ /* Force AEQ on */ -+ regmap_write(pextp, 0x0070, 0x02002800); -+ ndelay(1020); -+ /* Setup DA default value */ -+ regmap_write(pextp, 0x30B0, 0x00000020); -+ regmap_write(pextp, 0x3028, 0x00008A01); -+ regmap_write(pextp, 0x302C, 0x0000A884); -+ regmap_write(pextp, 0x3024, 0x00083002); -+ regmap_write(pextp, 0x3010, 0x00011110); -+ regmap_write(pextp, 0x3048, 0x40704000); -+ regmap_write(pextp, 0x3064, 0x0000C000); -+ regmap_write(pextp, 0x3050, 0xA8000000); -+ regmap_write(pextp, 0x3054, 0x000000AA); -+ regmap_write(pextp, 0x306C, 0x20200F00); -+ regmap_write(pextp, 0xA060, 0x00050000); -+ regmap_write(pextp, 0x90D0, 0x00000007); -+ /* Release reset */ -+ regmap_write(pextp, 0x0070, 0x0200E800); -+ udelay(150); -+ /* Switch to P0 */ -+ regmap_write(pextp, 0x0070, 0x0200C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0200C101); -+ udelay(15); -+ /* Switch to Gen2 */ -+ regmap_write(pextp, 0x0070, 0x0201C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0201C101); -+ udelay(100); -+ regmap_write(pextp, 0x30B0, 0x00000030); -+ regmap_write(pextp, 0x00F4, 0x80201F01); -+ regmap_write(pextp, 0x3040, 0x30000000); -+ udelay(400); -+} -+ -+void mtk_sgmii_setup_phya_gen2(struct mtk_eth *eth, int mac_id) -+{ -+ u32 id = mtk_mac2xgmii_id(eth, mac_id); -+ struct regmap *pextp; -+ -+ if (id >= eth->soc->num_devs) -+ return; -+ -+ pextp = eth->regmap_pextp[id]; -+ if (!pextp) -+ return; -+ -+ /* Setup operation mode */ -+ regmap_write(pextp, 0x9024, 0x00D9071C); -+ regmap_write(pextp, 0x2020, 0xAA8585AA); -+ regmap_write(pextp, 0x2030, 0x0C020707); -+ regmap_write(pextp, 0x2034, 0x0E050F0F); -+ regmap_write(pextp, 0x2040, 0x00140032); -+ regmap_write(pextp, 0x50F0, 0x00C014AA); -+ regmap_write(pextp, 0x50E0, 0x3777C12B); -+ regmap_write(pextp, 0x506C, 0x005F9CFF); -+ regmap_write(pextp, 0x5070, 0x9D9DFAFA); -+ regmap_write(pextp, 0x5074, 0x27273F3F); -+ regmap_write(pextp, 0x5078, 0xA7883C68); -+ regmap_write(pextp, 0x507C, 0x11661166); -+ regmap_write(pextp, 0x5080, 0x0E000AAF); -+ regmap_write(pextp, 0x5084, 0x08080D0D); -+ regmap_write(pextp, 0x5088, 0x02030909); -+ regmap_write(pextp, 0x50E4, 0x0C0C0000); -+ regmap_write(pextp, 0x50E8, 0x04040000); -+ regmap_write(pextp, 0x50EC, 0x0F0F0C06); -+ regmap_write(pextp, 0x50A8, 0x506E8C8C); -+ regmap_write(pextp, 0x6004, 0x18190000); -+ regmap_write(pextp, 0x00F8, 0x009C329C); -+ /* Force SGDT_OUT off and select PCS */ -+ regmap_write(pextp, 0x00F4, 0x80201F21); -+ /* Force GLB_CKDET_OUT */ -+ regmap_write(pextp, 0x0030, 0x00050C00); -+ /* Force AEQ on */ -+ regmap_write(pextp, 0x0070, 0x02002800); -+ ndelay(1020); -+ /* Setup DA default value */ -+ regmap_write(pextp, 0x30B0, 0x00000020); -+ regmap_write(pextp, 0x3028, 0x00008A01); -+ regmap_write(pextp, 0x302C, 0x0000A884); -+ regmap_write(pextp, 0x3024, 0x00083002); -+ regmap_write(pextp, 0x3010, 0x00011110); -+ regmap_write(pextp, 0x3048, 0x40704000); -+ regmap_write(pextp, 0x3050, 0xA8000000); -+ regmap_write(pextp, 0x3054, 0x000000AA); -+ regmap_write(pextp, 0x306C, 0x22000F00); -+ regmap_write(pextp, 0xA060, 0x00050000); -+ regmap_write(pextp, 0x90D0, 0x00000005); -+ /* Release reset */ -+ regmap_write(pextp, 0x0070, 0x0200E800); -+ udelay(150); -+ /* Switch to P0 */ -+ regmap_write(pextp, 0x0070, 0x0200C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0200C101); -+ udelay(15); -+ /* Switch to Gen2 */ -+ regmap_write(pextp, 0x0070, 0x0201C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0201C101); -+ udelay(100); -+ regmap_write(pextp, 0x30B0, 0x00000030); -+ regmap_write(pextp, 0x00F4, 0x80201F01); -+ regmap_write(pextp, 0x3040, 0x30000000); -+ udelay(400); -+} -+ -+static void mtk_usxgmii_reset(struct mtk_eth *eth, int id) -+{ -+ u32 val = 0; -+ -+ if (id >= eth->soc->num_devs || !eth->toprgu) -+ return; -+ -+ switch (id) { -+ case 0: -+ /* Enable software reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST_EN, &val); -+ val |= SWSYSRST_XFI_PEXPT0_GRST | -+ SWSYSRST_XFI0_GRST; -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST_EN, val); -+ -+ /* Assert USXGMII reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); -+ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88) | -+ SWSYSRST_XFI_PEXPT0_GRST | -+ SWSYSRST_XFI0_GRST; -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); -+ -+ udelay(100); -+ -+ /* De-assert USXGMII reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); -+ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88); -+ val &= ~(SWSYSRST_XFI_PEXPT0_GRST | -+ SWSYSRST_XFI0_GRST); -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); -+ -+ /* Disable software reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST_EN, &val); -+ val &= ~(SWSYSRST_XFI_PEXPT0_GRST | -+ SWSYSRST_XFI0_GRST); -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST_EN, val); -+ break; -+ case 1: -+ /* Enable software reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST_EN, &val); -+ val |= SWSYSRST_XFI_PEXPT1_GRST | -+ SWSYSRST_XFI1_GRST; -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST_EN, val); -+ -+ /* Assert USXGMII reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); -+ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88) | -+ SWSYSRST_XFI_PEXPT1_GRST | -+ SWSYSRST_XFI1_GRST; -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); -+ -+ udelay(100); -+ -+ /* De-assert USXGMII reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); -+ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88); -+ val &= ~(SWSYSRST_XFI_PEXPT1_GRST | -+ SWSYSRST_XFI1_GRST); -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); -+ -+ /* Disable software reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST_EN, &val); -+ val &= ~(SWSYSRST_XFI_PEXPT1_GRST | -+ SWSYSRST_XFI1_GRST); -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST_EN, val); -+ break; -+ } -+ -+ mdelay(10); -+} -+ -+void mtk_sgmii_reset(struct mtk_eth *eth, int mac_id) -+{ -+ u32 xgmii_id = mtk_mac2xgmii_id(eth, mac_id); -+ -+ mtk_usxgmii_reset(eth, xgmii_id); -+} -+ -+ -+static int mtk_usxgmii_pcs_config(struct phylink_pcs *pcs, unsigned int mode, -+ phy_interface_t interface, -+ const unsigned long *advertising, -+ bool permit_pause_to_mac) -+{ -+ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs); -+ struct mtk_eth *eth = mpcs->eth; -+ unsigned int an_ctrl = 0, link_timer = 0, xfi_mode = 0, adapt_mode = 0; -+ bool mode_changed = false; -+ -+ if (interface == PHY_INTERFACE_MODE_USXGMII) { -+ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0x1FF) | -+ USXGMII_AN_ENABLE; -+ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x7B) | -+ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x7B) | -+ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x7B); -+ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_10G) | -+ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_10G); -+ } else if (interface == PHY_INTERFACE_MODE_10GKR) { -+ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0x1FF); -+ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x7B) | -+ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x7B) | -+ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x7B); -+ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_10G) | -+ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_10G); -+ adapt_mode = USXGMII_RATE_UPDATE_MODE; -+ } else if (interface == PHY_INTERFACE_MODE_5GBASER) { -+ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0xFF); -+ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x3D) | -+ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x3D) | -+ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x3D); -+ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_5G) | -+ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_5G); -+ adapt_mode = USXGMII_RATE_UPDATE_MODE; -+ } else -+ return -EINVAL; -+ -+ adapt_mode |= FIELD_PREP(USXGMII_RATE_ADAPT_MODE, USXGMII_RATE_ADAPT_MODE_X1); -+ -+ if (mpcs->interface != interface) { -+ mpcs->interface = interface; -+ mode_changed = true; -+ } -+ -+ mtk_xfi_pll_enable(eth); -+ mtk_usxgmii_reset(eth, mpcs->id); -+ -+ /* Setup USXGMII AN ctrl */ -+ regmap_update_bits(mpcs->regmap, RG_PCS_AN_CTRL0, -+ USXGMII_AN_SYNC_CNT | USXGMII_AN_ENABLE, -+ an_ctrl); -+ -+ regmap_update_bits(mpcs->regmap, RG_PCS_AN_CTRL2, -+ USXGMII_LINK_TIMER_IDLE_DETECT | -+ USXGMII_LINK_TIMER_COMP_ACK_DETECT | -+ USXGMII_LINK_TIMER_AN_RESTART, -+ link_timer); -+ -+ /* Gated MAC CK */ -+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, -+ USXGMII_MAC_CK_GATED, USXGMII_MAC_CK_GATED); -+ -+ /* Enable interface force mode */ -+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, -+ USXGMII_IF_FORCE_EN, USXGMII_IF_FORCE_EN); -+ -+ /* Setup USXGMII adapt mode */ -+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, -+ USXGMII_RATE_UPDATE_MODE | USXGMII_RATE_ADAPT_MODE, -+ adapt_mode); -+ -+ /* Setup USXGMII speed */ -+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, -+ USXGMII_XFI_RX_MODE | USXGMII_XFI_TX_MODE, -+ xfi_mode); -+ -+ udelay(1); -+ -+ /* Un-gated MAC CK */ -+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, -+ USXGMII_MAC_CK_GATED, 0); -+ -+ udelay(1); -+ -+ /* Disable interface force mode for the AN mode */ -+ if (an_ctrl & USXGMII_AN_ENABLE) -+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, -+ USXGMII_IF_FORCE_EN, 0); -+ -+ /* Setup USXGMIISYS with the determined property */ -+ if (interface == PHY_INTERFACE_MODE_USXGMII) -+ mtk_usxgmii_setup_phya_usxgmii(mpcs); -+ else if (interface == PHY_INTERFACE_MODE_10GKR) -+ mtk_usxgmii_setup_phya_10gbaser(mpcs); -+ else if (interface == PHY_INTERFACE_MODE_5GBASER) -+ mtk_usxgmii_setup_phya_5gbaser(mpcs); -+ -+ return mode_changed; -+} -+ -+static void mtk_usxgmii_pcs_get_state(struct phylink_pcs *pcs, -+ struct phylink_link_state *state) -+{ -+ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs); -+ struct mtk_eth *eth = mpcs->eth; -+ struct mtk_mac *mac = eth->mac[mtk_xgmii2mac_id(eth, mpcs->id)]; -+ u32 val = 0; -+ -+ regmap_read(mpcs->regmap, RG_PCS_AN_CTRL0, &val); -+ if (FIELD_GET(USXGMII_AN_ENABLE, val)) { -+ /* Refresh LPA by inverting LPA_LATCH */ -+ regmap_read(mpcs->regmap, RG_PCS_AN_STS0, &val); -+ regmap_update_bits(mpcs->regmap, RG_PCS_AN_STS0, -+ USXGMII_LPA_LATCH, -+ !(val & USXGMII_LPA_LATCH)); -+ -+ regmap_read(mpcs->regmap, RG_PCS_AN_STS0, &val); -+ -+ state->interface = mpcs->interface; -+ state->link = FIELD_GET(USXGMII_LPA_LINK, val); -+ state->duplex = FIELD_GET(USXGMII_LPA_DUPLEX, val); -+ -+ switch (FIELD_GET(USXGMII_LPA_SPEED_MASK, val)) { -+ case USXGMII_LPA_SPEED_10: -+ state->speed = SPEED_10; -+ break; -+ case USXGMII_LPA_SPEED_100: -+ state->speed = SPEED_100; -+ break; -+ case USXGMII_LPA_SPEED_1000: -+ state->speed = SPEED_1000; -+ break; -+ case USXGMII_LPA_SPEED_2500: -+ state->speed = SPEED_2500; -+ break; -+ case USXGMII_LPA_SPEED_5000: -+ state->speed = SPEED_5000; -+ break; -+ case USXGMII_LPA_SPEED_10000: -+ state->speed = SPEED_10000; -+ break; -+ } -+ } else { -+ val = mtk_r32(mac->hw, MTK_XGMAC_STS(mac->id)); -+ -+ if (mac->id == MTK_GMAC2_ID) -+ val = val >> 16; -+ -+ switch (FIELD_GET(MTK_USXGMII_PCS_MODE, val)) { -+ case 0: -+ state->speed = SPEED_10000; -+ break; -+ case 1: -+ state->speed = SPEED_5000; -+ break; -+ case 2: -+ state->speed = SPEED_2500; -+ break; -+ case 3: -+ state->speed = SPEED_1000; -+ break; -+ } -+ -+ state->interface = mpcs->interface; -+ state->link = FIELD_GET(MTK_USXGMII_PCS_LINK, val); -+ state->duplex = DUPLEX_FULL; -+ } -+ -+ if (state->link == 0) -+ mtk_usxgmii_pcs_config(pcs, MLO_AN_INBAND, -+ state->interface, NULL, false); -+} -+ -+static void mtk_usxgmii_pcs_restart_an(struct phylink_pcs *pcs) -+{ -+ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs); -+ unsigned int val = 0; -+ -+ if (!mpcs->regmap) -+ return; -+ -+ regmap_read(mpcs->regmap, RG_PCS_AN_CTRL0, &val); -+ val |= USXGMII_AN_RESTART; -+ regmap_write(mpcs->regmap, RG_PCS_AN_CTRL0, val); -+} -+ -+static void mtk_usxgmii_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode, -+ phy_interface_t interface, -+ int speed, int duplex) -+{ -+ /* Reconfiguring USXGMII to ensure the quality of the RX signal -+ * after the line side link up. -+ */ -+ mtk_usxgmii_pcs_config(pcs, mode, -+ interface, NULL, false); -+} -+ -+static const struct phylink_pcs_ops mtk_usxgmii_pcs_ops = { -+ .pcs_config = mtk_usxgmii_pcs_config, -+ .pcs_get_state = mtk_usxgmii_pcs_get_state, -+ .pcs_an_restart = mtk_usxgmii_pcs_restart_an, -+ .pcs_link_up = mtk_usxgmii_pcs_link_up, -+}; -+ -+int mtk_usxgmii_init(struct mtk_eth *eth) -+{ -+ struct device_node *r = eth->dev->of_node; -+ struct device *dev = eth->dev; -+ struct device_node *np; -+ int i, ret; -+ -+ eth->usxgmii_pcs = devm_kcalloc(dev, eth->soc->num_devs, sizeof(eth->usxgmii_pcs), GFP_KERNEL); -+ if (!eth->usxgmii_pcs) -+ return -ENOMEM; -+ -+ for (i = 0; i < eth->soc->num_devs; i++) { -+ np = of_parse_phandle(r, "mediatek,usxgmiisys", i); -+ if (!np) -+ break; -+ -+ eth->usxgmii_pcs[i] = devm_kzalloc(dev, sizeof(*eth->usxgmii_pcs), GFP_KERNEL); -+ if (!eth->usxgmii_pcs[i]) -+ return -ENOMEM; -+ -+ eth->usxgmii_pcs[i]->id = i; -+ eth->usxgmii_pcs[i]->eth = eth; -+ eth->usxgmii_pcs[i]->regmap = syscon_node_to_regmap(np); -+ if (IS_ERR(eth->usxgmii_pcs[i]->regmap)) -+ return PTR_ERR(eth->usxgmii_pcs[i]->regmap); -+ -+ eth->usxgmii_pcs[i]->pcs.ops = &mtk_usxgmii_pcs_ops; -+ eth->usxgmii_pcs[i]->pcs.poll = true; -+ eth->usxgmii_pcs[i]->interface = PHY_INTERFACE_MODE_NA; -+ -+ of_node_put(np); -+ } -+ -+ ret = mtk_xfi_pextp_init(eth); -+ if (ret) -+ return ret; -+ -+ ret = mtk_xfi_pll_init(eth); -+ if (ret) -+ return ret; -+ -+ return mtk_toprgu_init(eth); -+} -+ -+struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int mac_id) -+{ -+ u32 xgmii_id = mtk_mac2xgmii_id(eth, mac_id); -+ -+ if (!eth->usxgmii_pcs[xgmii_id]->regmap) -+ return NULL; -+ -+ return ð->usxgmii_pcs[xgmii_id]->pcs; -+} diff --git a/target/linux/generic/pending-5.15/737-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch b/target/linux/generic/pending-5.15/737-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch new file mode 100644 index 000000000..78263feeb --- /dev/null +++ b/target/linux/generic/pending-5.15/737-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch @@ -0,0 +1,1604 @@ +From 1e25ca1147579bda8b941be1b9851f5911d44eb0 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Tue, 22 Aug 2023 19:04:42 +0100 +Subject: [PATCH 098/125] net: ethernet: mtk_eth_soc: add paths and SerDes + modes for MT7988 + +MT7988 comes with a built-in 2.5G PHY as well as SerDes lanes to +connect external PHYs or transceivers in USXGMII, 10GBase-R, 5GBase-R, +2500Base-X, 1000Base-X and Cisco SGMII interface modes. + +Implement support for configuring for the new paths to SerDes interfaces +and the internal 2.5G PHY. + +Add USXGMII PCS driver for 10GBase-R, 5GBase-R and USXGMII mode, and +setup the new PHYA on MT7988 to access the also still existing old +LynxI PCS for 1000Base-X, 2500Base-X and Cisco SGMII PCS interface +modes. + +Signed-off-by: Daniel Golle +--- + drivers/net/ethernet/mediatek/Kconfig | 16 + + drivers/net/ethernet/mediatek/Makefile | 1 + + drivers/net/ethernet/mediatek/mtk_eth_path.c | 123 +++- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 182 ++++- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 232 ++++++- + drivers/net/ethernet/mediatek/mtk_usxgmii.c | 692 +++++++++++++++++++ + 6 files changed, 1215 insertions(+), 31 deletions(-) + create mode 100644 drivers/net/ethernet/mediatek/mtk_usxgmii.c + +--- a/drivers/net/ethernet/mediatek/Kconfig ++++ b/drivers/net/ethernet/mediatek/Kconfig +@@ -24,6 +24,22 @@ config NET_MEDIATEK_SOC + This driver supports the gigabit ethernet MACs in the + MediaTek SoC family. + ++config NET_MEDIATEK_SOC_USXGMII ++ bool "Support USXGMII SerDes on MT7988" ++ depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST ++ def_bool NET_MEDIATEK_SOC != n ++ help ++ Include support for 10GE SerDes which can be found on MT7988. ++ If this kernel should run on SoCs with 10 GBit/s Ethernet you ++ will need to select this option to use GMAC2 and GMAC3 with ++ external PHYs, SFP(+) cages in 10GBase-R, 5GBase-R or USXGMII ++ interface modes. ++ ++ Note that as the 2500Base-X/1000Base-X/Cisco SGMII SerDes PCS ++ unit (MediaTek LynxI) in MT7988 is connected via the new 10GE ++ SerDes, you will also need to select this option in case you ++ want to use any of those SerDes modes. ++ + config NET_MEDIATEK_STAR_EMAC + tristate "MediaTek STAR Ethernet MAC support" + select PHYLIB +--- a/drivers/net/ethernet/mediatek/Makefile ++++ b/drivers/net/ethernet/mediatek/Makefile +@@ -5,6 +5,7 @@ + + obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth.o + mtk_eth-y := mtk_eth_soc.o mtk_eth_path.o mtk_ppe.o mtk_ppe_debugfs.o mtk_ppe_offload.o ++mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_USXGMII) += mtk_usxgmii.o + mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed.o mtk_wed_mcu.o mtk_wed_wo.o + ifdef CONFIG_DEBUG_FS + mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_debugfs.o +--- a/drivers/net/ethernet/mediatek/mtk_eth_path.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_path.c +@@ -31,10 +31,20 @@ static const char *mtk_eth_path_name(u64 + return "gmac2_rgmii"; + case MTK_ETH_PATH_GMAC2_SGMII: + return "gmac2_sgmii"; ++ case MTK_ETH_PATH_GMAC2_2P5GPHY: ++ return "gmac2_2p5gphy"; + case MTK_ETH_PATH_GMAC2_GEPHY: + return "gmac2_gephy"; ++ case MTK_ETH_PATH_GMAC3_SGMII: ++ return "gmac3_sgmii"; + case MTK_ETH_PATH_GDM1_ESW: + return "gdm1_esw"; ++ case MTK_ETH_PATH_GMAC1_USXGMII: ++ return "gmac1_usxgmii"; ++ case MTK_ETH_PATH_GMAC2_USXGMII: ++ return "gmac2_usxgmii"; ++ case MTK_ETH_PATH_GMAC3_USXGMII: ++ return "gmac3_usxgmii"; + default: + return "unknown path"; + } +@@ -127,6 +137,27 @@ static int set_mux_u3_gmac2_to_qphy(stru + return 0; + } + ++static int set_mux_gmac2_to_2p5gphy(struct mtk_eth *eth, u64 path) ++{ ++ int ret; ++ ++ if (path == MTK_ETH_PATH_GMAC2_2P5GPHY) { ++ ret = regmap_clear_bits(eth->ethsys, ETHSYS_SYSCFG0, SYSCFG0_SGMII_GMAC2_V2); ++ if (ret) ++ return ret; ++ ++ /* Setup mux to 2p5g PHY */ ++ ret = regmap_clear_bits(eth->infra, TOP_MISC_NETSYS_PCS_MUX, MUX_G2_USXGMII_SEL); ++ if (ret) ++ return ret; ++ ++ dev_dbg(eth->dev, "path %s in %s updated\n", ++ mtk_eth_path_name(path), __func__); ++ } ++ ++ return 0; ++} ++ + static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, u64 path) + { + unsigned int val = 0; +@@ -165,7 +196,48 @@ static int set_mux_gmac1_gmac2_to_sgmii_ + return 0; + } + +-static int set_mux_gmac12_to_gephy_sgmii(struct mtk_eth *eth, u64 path) ++static int set_mux_gmac123_to_usxgmii(struct mtk_eth *eth, u64 path) ++{ ++ unsigned int val = 0; ++ bool updated = true; ++ int mac_id = 0; ++ ++ /* Disable SYSCFG1 SGMII */ ++ regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); ++ ++ switch (path) { ++ case MTK_ETH_PATH_GMAC1_USXGMII: ++ val &= ~(u32)SYSCFG0_SGMII_GMAC1_V2; ++ mac_id = MTK_GMAC1_ID; ++ break; ++ case MTK_ETH_PATH_GMAC2_USXGMII: ++ val &= ~(u32)SYSCFG0_SGMII_GMAC2_V2; ++ mac_id = MTK_GMAC2_ID; ++ break; ++ case MTK_ETH_PATH_GMAC3_USXGMII: ++ val &= ~(u32)SYSCFG0_SGMII_GMAC3_V2; ++ mac_id = MTK_GMAC3_ID; ++ break; ++ default: ++ updated = false; ++ }; ++ ++ if (updated) { ++ regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, ++ SYSCFG0_SGMII_MASK, val); ++ ++ if (mac_id == MTK_GMAC2_ID) ++ regmap_set_bits(eth->infra, TOP_MISC_NETSYS_PCS_MUX, ++ MUX_G2_USXGMII_SEL); ++ } ++ ++ dev_dbg(eth->dev, "path %s in %s updated = %d\n", ++ mtk_eth_path_name(path), __func__, updated); ++ ++ return 0; ++} ++ ++static int set_mux_gmac123_to_gephy_sgmii(struct mtk_eth *eth, u64 path) + { + unsigned int val = 0; + bool updated = true; +@@ -182,6 +254,9 @@ static int set_mux_gmac12_to_gephy_sgmii + case MTK_ETH_PATH_GMAC2_SGMII: + val |= SYSCFG0_SGMII_GMAC2_V2; + break; ++ case MTK_ETH_PATH_GMAC3_SGMII: ++ val |= SYSCFG0_SGMII_GMAC3_V2; ++ break; + default: + updated = false; + } +@@ -210,13 +285,25 @@ static const struct mtk_eth_muxc mtk_eth + .cap_bit = MTK_ETH_MUX_U3_GMAC2_TO_QPHY, + .set_path = set_mux_u3_gmac2_to_qphy, + }, { ++ .name = "mux_gmac2_to_2p5gphy", ++ .cap_bit = MTK_ETH_MUX_GMAC2_TO_2P5GPHY, ++ .set_path = set_mux_gmac2_to_2p5gphy, ++ }, { + .name = "mux_gmac1_gmac2_to_sgmii_rgmii", + .cap_bit = MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII, + .set_path = set_mux_gmac1_gmac2_to_sgmii_rgmii, + }, { + .name = "mux_gmac12_to_gephy_sgmii", + .cap_bit = MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII, +- .set_path = set_mux_gmac12_to_gephy_sgmii, ++ .set_path = set_mux_gmac123_to_gephy_sgmii, ++ }, { ++ .name = "mux_gmac123_to_gephy_sgmii", ++ .cap_bit = MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII, ++ .set_path = set_mux_gmac123_to_gephy_sgmii, ++ }, { ++ .name = "mux_gmac123_to_usxgmii", ++ .cap_bit = MTK_ETH_MUX_GMAC123_TO_USXGMII, ++ .set_path = set_mux_gmac123_to_usxgmii, + }, + }; + +@@ -249,12 +336,39 @@ out: + return err; + } + ++int mtk_gmac_usxgmii_path_setup(struct mtk_eth *eth, int mac_id) ++{ ++ u64 path; ++ ++ path = (mac_id == MTK_GMAC1_ID) ? MTK_ETH_PATH_GMAC1_USXGMII : ++ (mac_id == MTK_GMAC2_ID) ? MTK_ETH_PATH_GMAC2_USXGMII : ++ MTK_ETH_PATH_GMAC3_USXGMII; ++ ++ /* Setup proper MUXes along the path */ ++ return mtk_eth_mux_setup(eth, path); ++} ++ + int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id) + { + u64 path; + +- path = (mac_id == 0) ? MTK_ETH_PATH_GMAC1_SGMII : +- MTK_ETH_PATH_GMAC2_SGMII; ++ path = (mac_id == MTK_GMAC1_ID) ? MTK_ETH_PATH_GMAC1_SGMII : ++ (mac_id == MTK_GMAC2_ID) ? MTK_ETH_PATH_GMAC2_SGMII : ++ MTK_ETH_PATH_GMAC3_SGMII; ++ ++ /* Setup proper MUXes along the path */ ++ return mtk_eth_mux_setup(eth, path); ++} ++ ++int mtk_gmac_2p5gphy_path_setup(struct mtk_eth *eth, int mac_id) ++{ ++ u64 path = 0; ++ ++ if (mac_id == MTK_GMAC2_ID) ++ path = MTK_ETH_PATH_GMAC2_2P5GPHY; ++ ++ if (!path) ++ return -EINVAL; + + /* Setup proper MUXes along the path */ + return mtk_eth_mux_setup(eth, path); +@@ -284,4 +398,3 @@ int mtk_gmac_rgmii_path_setup(struct mtk + /* Setup proper MUXes along the path */ + return mtk_eth_mux_setup(eth, path); + } +- +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -431,6 +431,30 @@ static void mtk_setup_bridge_switch(stru + MTK_GSW_CFG); + } + ++static bool mtk_check_gmac23_idle(struct mtk_mac *mac) ++{ ++ u32 mac_fsm, gdm_fsm; ++ ++ mac_fsm = mtk_r32(mac->hw, MTK_MAC_FSM(mac->id)); ++ ++ switch (mac->id) { ++ case MTK_GMAC2_ID: ++ gdm_fsm = mtk_r32(mac->hw, MTK_FE_GDM2_FSM); ++ break; ++ case MTK_GMAC3_ID: ++ gdm_fsm = mtk_r32(mac->hw, MTK_FE_GDM3_FSM); ++ break; ++ default: ++ return true; ++ }; ++ ++ if ((mac_fsm & 0xFFFF0000) == 0x01010000 && ++ (gdm_fsm & 0xFFFF0000) == 0x00000000) ++ return true; ++ ++ return false; ++} ++ + static struct phylink_pcs *mtk_mac_select_pcs(struct phylink_config *config, + phy_interface_t interface) + { +@@ -439,12 +463,20 @@ static struct phylink_pcs *mtk_mac_selec + struct mtk_eth *eth = mac->hw; + unsigned int sid; + +- if (interface == PHY_INTERFACE_MODE_SGMII || +- phy_interface_mode_is_8023z(interface)) { +- sid = (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_SGMII)) ? +- 0 : mac->id; +- +- return eth->sgmii_pcs[sid]; ++ if ((interface == PHY_INTERFACE_MODE_SGMII || ++ phy_interface_mode_is_8023z(interface)) && ++ MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) { ++ sid = mtk_mac2xgmii_id(eth, mac->id); ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII)) ++ return mtk_sgmii_wrapper_select_pcs(eth, mac->id); ++ else ++ return eth->sgmii_pcs[sid]; ++ } else if ((interface == PHY_INTERFACE_MODE_USXGMII || ++ interface == PHY_INTERFACE_MODE_10GBASER || ++ interface == PHY_INTERFACE_MODE_5GBASER) && ++ MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII) && ++ mac->id != MTK_GMAC1_ID) { ++ return mtk_usxgmii_select_pcs(eth, mac->id); + } + + return NULL; +@@ -500,7 +532,22 @@ static void mtk_mac_config(struct phylin + goto init_err; + } + break; ++ case PHY_INTERFACE_MODE_USXGMII: ++ case PHY_INTERFACE_MODE_10GBASER: ++ case PHY_INTERFACE_MODE_5GBASER: ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII)) { ++ err = mtk_gmac_usxgmii_path_setup(eth, mac->id); ++ if (err) ++ goto init_err; ++ } ++ break; + case PHY_INTERFACE_MODE_INTERNAL: ++ if (mac->id == MTK_GMAC2_ID && ++ MTK_HAS_CAPS(eth->soc->caps, MTK_2P5GPHY)) { ++ err = mtk_gmac_2p5gphy_path_setup(eth, mac->id); ++ if (err) ++ goto init_err; ++ } + break; + default: + goto err_phy; +@@ -555,8 +602,6 @@ static void mtk_mac_config(struct phylin + val &= ~SYSCFG0_GE_MODE(SYSCFG0_GE_MASK, mac->id); + val |= SYSCFG0_GE_MODE(ge_mode, mac->id); + regmap_write(eth->ethsys, ETHSYS_SYSCFG0, val); +- +- mac->interface = state->interface; + } + + /* SGMII */ +@@ -573,21 +618,40 @@ static void mtk_mac_config(struct phylin + + /* Save the syscfg0 value for mac_finish */ + mac->syscfg0 = val; +- } else if (phylink_autoneg_inband(mode)) { ++ } else if (state->interface != PHY_INTERFACE_MODE_USXGMII && ++ state->interface != PHY_INTERFACE_MODE_10GBASER && ++ state->interface != PHY_INTERFACE_MODE_5GBASER && ++ phylink_autoneg_inband(mode)) { + dev_err(eth->dev, +- "In-band mode not supported in non SGMII mode!\n"); ++ "In-band mode not supported in non-SerDes modes!\n"); + return; + } + + /* Setup gmac */ +- if (mtk_is_netsys_v3_or_greater(eth) && +- mac->interface == PHY_INTERFACE_MODE_INTERNAL) { +- mtk_w32(mac->hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac->id)); +- mtk_w32(mac->hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac->id)); ++ if (mtk_is_netsys_v3_or_greater(eth)) { ++ if (mtk_interface_mode_is_xgmii(state->interface)) { ++ mtk_w32(mac->hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac->id)); ++ mtk_w32(mac->hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac->id)); ++ ++ if (mac->id == MTK_GMAC1_ID) ++ mtk_setup_bridge_switch(eth); ++ } else { ++ mtk_w32(eth, 0, MTK_GDMA_EG_CTRL(mac->id)); + +- mtk_setup_bridge_switch(eth); ++ /* FIXME: In current hardware design, we have to reset FE ++ * when swtiching XGDM to GDM. Therefore, here trigger an SER ++ * to let GDM go back to the initial state. ++ */ ++ if ((mtk_interface_mode_is_xgmii(mac->interface) || ++ mac->interface == PHY_INTERFACE_MODE_NA) && ++ !mtk_check_gmac23_idle(mac) && ++ !test_bit(MTK_RESETTING, ð->state)) ++ schedule_work(ð->pending_work); ++ } + } + ++ mac->interface = state->interface; ++ + return; + + err_phy: +@@ -632,10 +696,13 @@ static void mtk_mac_link_down(struct phy + { + struct mtk_mac *mac = container_of(config, struct mtk_mac, + phylink_config); +- u32 mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); + +- mcr &= ~(MAC_MCR_TX_EN | MAC_MCR_RX_EN | MAC_MCR_FORCE_LINK); +- mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); ++ if (!mtk_interface_mode_is_xgmii(interface)) { ++ mtk_m32(mac->hw, MAC_MCR_TX_EN | MAC_MCR_RX_EN, 0, MTK_MAC_MCR(mac->id)); ++ mtk_m32(mac->hw, MTK_XGMAC_FORCE_LINK(mac->id), 0, MTK_XGMAC_STS(mac->id)); ++ } else if (mac->id != MTK_GMAC1_ID) { ++ mtk_m32(mac->hw, XMAC_MCR_TRX_DISABLE, XMAC_MCR_TRX_DISABLE, MTK_XMAC_MCR(mac->id)); ++ } + } + + static void mtk_set_queue_speed(struct mtk_eth *eth, unsigned int idx, +@@ -707,13 +774,11 @@ static void mtk_set_queue_speed(struct m + mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); + } + +-static void mtk_mac_link_up(struct phylink_config *config, +- struct phy_device *phy, +- unsigned int mode, phy_interface_t interface, +- int speed, int duplex, bool tx_pause, bool rx_pause) ++static void mtk_gdm_mac_link_up(struct mtk_mac *mac, ++ struct phy_device *phy, ++ unsigned int mode, phy_interface_t interface, ++ int speed, int duplex, bool tx_pause, bool rx_pause) + { +- struct mtk_mac *mac = container_of(config, struct mtk_mac, +- phylink_config); + u32 mcr; + + mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); +@@ -747,6 +812,55 @@ static void mtk_mac_link_up(struct phyli + mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); + } + ++static void mtk_xgdm_mac_link_up(struct mtk_mac *mac, ++ struct phy_device *phy, ++ unsigned int mode, phy_interface_t interface, ++ int speed, int duplex, bool tx_pause, bool rx_pause) ++{ ++ u32 mcr, force_link = 0; ++ ++ if (mac->id == MTK_GMAC1_ID) ++ return; ++ ++ /* Eliminate the interference(before link-up) caused by PHY noise */ ++ mtk_m32(mac->hw, XMAC_LOGIC_RST, 0, MTK_XMAC_LOGIC_RST(mac->id)); ++ mdelay(20); ++ mtk_m32(mac->hw, XMAC_GLB_CNTCLR, XMAC_GLB_CNTCLR, MTK_XMAC_CNT_CTRL(mac->id)); ++ ++ if (mac->interface == PHY_INTERFACE_MODE_INTERNAL || mac->id == MTK_GMAC3_ID) ++ force_link = MTK_XGMAC_FORCE_LINK(mac->id); ++ ++ mtk_m32(mac->hw, MTK_XGMAC_FORCE_LINK(mac->id), force_link, MTK_XGMAC_STS(mac->id)); ++ ++ mcr = mtk_r32(mac->hw, MTK_XMAC_MCR(mac->id)); ++ mcr &= ~(XMAC_MCR_FORCE_TX_FC | XMAC_MCR_FORCE_RX_FC | XMAC_MCR_TRX_DISABLE); ++ /* Configure pause modes - ++ * phylink will avoid these for half duplex ++ */ ++ if (tx_pause) ++ mcr |= XMAC_MCR_FORCE_TX_FC; ++ if (rx_pause) ++ mcr |= XMAC_MCR_FORCE_RX_FC; ++ ++ mtk_w32(mac->hw, mcr, MTK_XMAC_MCR(mac->id)); ++} ++ ++static void mtk_mac_link_up(struct phylink_config *config, ++ struct phy_device *phy, ++ unsigned int mode, phy_interface_t interface, ++ int speed, int duplex, bool tx_pause, bool rx_pause) ++{ ++ struct mtk_mac *mac = container_of(config, struct mtk_mac, ++ phylink_config); ++ ++ if (mtk_interface_mode_is_xgmii(interface)) ++ mtk_xgdm_mac_link_up(mac, phy, mode, interface, speed, duplex, ++ tx_pause, rx_pause); ++ else ++ mtk_gdm_mac_link_up(mac, phy, mode, interface, speed, duplex, ++ tx_pause, rx_pause); ++} ++ + static const struct phylink_mac_ops mtk_phylink_ops = { + .validate = phylink_generic_validate, + .mac_select_pcs = mtk_mac_select_pcs, +@@ -4560,8 +4674,21 @@ static int mtk_add_mac(struct mtk_eth *e + phy_interface_zero(mac->phylink_config.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_INTERNAL, + mac->phylink_config.supported_interfaces); ++ } else if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_USXGMII)) { ++ mac->phylink_config.mac_capabilities |= MAC_5000FD | MAC_10000FD; ++ __set_bit(PHY_INTERFACE_MODE_5GBASER, ++ mac->phylink_config.supported_interfaces); ++ __set_bit(PHY_INTERFACE_MODE_10GBASER, ++ mac->phylink_config.supported_interfaces); ++ __set_bit(PHY_INTERFACE_MODE_USXGMII, ++ mac->phylink_config.supported_interfaces); + } + ++ if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_2P5GPHY) && ++ id == MTK_GMAC2_ID) ++ __set_bit(PHY_INTERFACE_MODE_INTERNAL, ++ mac->phylink_config.supported_interfaces); ++ + phylink = phylink_create(&mac->phylink_config, + of_fwnode_handle(mac->of_node), + phy_mode, &mtk_phylink_ops); +@@ -4754,6 +4881,13 @@ static int mtk_probe(struct platform_dev + + if (err) + return err; ++ } ++ ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII)) { ++ err = mtk_usxgmii_init(eth); ++ ++ if (err) ++ return err; + } + + if (eth->soc->required_pctl) { +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -499,6 +499,21 @@ + #define INTF_MODE_RGMII_1000 (TRGMII_MODE | TRGMII_CENTRAL_ALIGNED) + #define INTF_MODE_RGMII_10_100 0 + ++/* XFI Mac control registers */ ++#define MTK_XMAC_BASE(x) (0x12000 + (((x) - 1) * 0x1000)) ++#define MTK_XMAC_MCR(x) (MTK_XMAC_BASE(x)) ++#define XMAC_MCR_TRX_DISABLE 0xf ++#define XMAC_MCR_FORCE_TX_FC BIT(5) ++#define XMAC_MCR_FORCE_RX_FC BIT(4) ++ ++/* XFI Mac logic reset registers */ ++#define MTK_XMAC_LOGIC_RST(x) (MTK_XMAC_BASE(x) + 0x10) ++#define XMAC_LOGIC_RST BIT(0) ++ ++/* XFI Mac count global control */ ++#define MTK_XMAC_CNT_CTRL(x) (MTK_XMAC_BASE(x) + 0x100) ++#define XMAC_GLB_CNTCLR BIT(0) ++ + /* GPIO port control registers for GMAC 2*/ + #define GPIO_OD33_CTRL8 0x4c0 + #define GPIO_BIAS_CTRL 0xed0 +@@ -524,6 +539,7 @@ + #define SYSCFG0_SGMII_GMAC2 ((3 << 8) & SYSCFG0_SGMII_MASK) + #define SYSCFG0_SGMII_GMAC1_V2 BIT(9) + #define SYSCFG0_SGMII_GMAC2_V2 BIT(8) ++#define SYSCFG0_SGMII_GMAC3_V2 BIT(7) + + + /* ethernet subsystem clock register */ +@@ -556,12 +572,74 @@ + #define ETHSYS_DMA_AG_MAP_QDMA BIT(1) + #define ETHSYS_DMA_AG_MAP_PPE BIT(2) + ++/* USXGMII subsystem config registers */ ++/* Register to control speed */ ++#define RG_PHY_TOP_SPEED_CTRL1 0x80C ++#define USXGMII_RATE_UPDATE_MODE BIT(31) ++#define USXGMII_MAC_CK_GATED BIT(29) ++#define USXGMII_IF_FORCE_EN BIT(28) ++#define USXGMII_RATE_ADAPT_MODE GENMASK(10, 8) ++#define USXGMII_RATE_ADAPT_MODE_X1 0 ++#define USXGMII_RATE_ADAPT_MODE_X2 1 ++#define USXGMII_RATE_ADAPT_MODE_X4 2 ++#define USXGMII_RATE_ADAPT_MODE_X10 3 ++#define USXGMII_RATE_ADAPT_MODE_X100 4 ++#define USXGMII_RATE_ADAPT_MODE_X5 5 ++#define USXGMII_RATE_ADAPT_MODE_X50 6 ++#define USXGMII_XFI_RX_MODE GENMASK(6, 4) ++#define USXGMII_XFI_RX_MODE_10G 0 ++#define USXGMII_XFI_RX_MODE_5G 1 ++#define USXGMII_XFI_TX_MODE GENMASK(2, 0) ++#define USXGMII_XFI_TX_MODE_10G 0 ++#define USXGMII_XFI_TX_MODE_5G 1 ++ ++/* Register to control PCS AN */ ++#define RG_PCS_AN_CTRL0 0x810 ++#define USXGMII_AN_RESTART BIT(31) ++#define USXGMII_AN_SYNC_CNT GENMASK(30, 11) ++#define USXGMII_AN_ENABLE BIT(0) ++ ++#define RG_PCS_AN_CTRL2 0x818 ++#define USXGMII_LINK_TIMER_IDLE_DETECT GENMASK(29, 20) ++#define USXGMII_LINK_TIMER_COMP_ACK_DETECT GENMASK(19, 10) ++#define USXGMII_LINK_TIMER_AN_RESTART GENMASK(9, 0) ++ ++/* Register to read PCS AN status */ ++#define RG_PCS_AN_STS0 0x81c ++#define USXGMII_PCS_AN_WORD GENMASK(15, 0) ++#define USXGMII_LPA_LATCH BIT(31) ++ ++/* Register to control USXGMII XFI PLL digital */ ++#define XFI_PLL_DIG_GLB8 0x08 ++#define RG_XFI_PLL_EN BIT(31) ++ ++/* Register to control USXGMII XFI PLL analog */ ++#define XFI_PLL_ANA_GLB8 0x108 ++#define RG_XFI_PLL_ANA_SWWA 0x02283248 ++ + /* Infrasys subsystem config registers */ + #define INFRA_MISC2 0x70c + #define CO_QPHY_SEL BIT(0) + #define GEPHY_MAC_SEL BIT(1) + ++/* Toprgu subsystem config registers */ ++#define TOPRGU_SWSYSRST 0x18 ++#define SWSYSRST_UNLOCK_KEY GENMASK(31, 24) ++#define SWSYSRST_XFI_PLL_GRST BIT(16) ++#define SWSYSRST_XFI_PEXPT1_GRST BIT(15) ++#define SWSYSRST_XFI_PEXPT0_GRST BIT(14) ++#define SWSYSRST_XFI1_GRST BIT(13) ++#define SWSYSRST_XFI0_GRST BIT(12) ++#define SWSYSRST_SGMII1_GRST BIT(2) ++#define SWSYSRST_SGMII0_GRST BIT(1) ++#define TOPRGU_SWSYSRST_EN 0xFC ++ + /* Top misc registers */ ++#define TOP_MISC_NETSYS_PCS_MUX 0x84 ++#define NETSYS_PCS_MUX_MASK GENMASK(1, 0) ++#define MUX_G2_USXGMII_SEL BIT(1) ++#define MUX_HSGMII1_G1_SEL BIT(0) ++ + #define USB_PHY_SWITCH_REG 0x218 + #define QPHY_SEL_MASK GENMASK(1, 0) + #define SGMII_QPHY_SEL 0x2 +@@ -586,6 +664,8 @@ + #define MT7628_SDM_RBCNT (MT7628_SDM_OFFSET + 0x10c) + #define MT7628_SDM_CS_ERR (MT7628_SDM_OFFSET + 0x110) + ++/* Debug Purpose Register */ ++#define MTK_PSE_FQFC_CFG 0x100 + #define MTK_FE_CDM1_FSM 0x220 + #define MTK_FE_CDM2_FSM 0x224 + #define MTK_FE_CDM3_FSM 0x238 +@@ -594,6 +674,11 @@ + #define MTK_FE_CDM6_FSM 0x328 + #define MTK_FE_GDM1_FSM 0x228 + #define MTK_FE_GDM2_FSM 0x22C ++#define MTK_FE_GDM3_FSM 0x23C ++#define MTK_FE_PSE_FREE 0x240 ++#define MTK_FE_DROP_FQ 0x244 ++#define MTK_FE_DROP_FC 0x248 ++#define MTK_FE_DROP_PPE 0x24C + + #define MTK_MAC_FSM(x) (0x1010C + ((x) * 0x100)) + +@@ -940,6 +1025,8 @@ enum mkt_eth_capabilities { + MTK_RGMII_BIT = 0, + MTK_TRGMII_BIT, + MTK_SGMII_BIT, ++ MTK_USXGMII_BIT, ++ MTK_2P5GPHY_BIT, + MTK_ESW_BIT, + MTK_GEPHY_BIT, + MTK_MUX_BIT, +@@ -960,8 +1047,11 @@ enum mkt_eth_capabilities { + MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT, + MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT, + MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT, ++ MTK_ETH_MUX_GMAC2_TO_2P5GPHY_BIT, + MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT, + MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT, ++ MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII_BIT, ++ MTK_ETH_MUX_GMAC123_TO_USXGMII_BIT, + + /* PATH BITS */ + MTK_ETH_PATH_GMAC1_RGMII_BIT, +@@ -969,14 +1059,21 @@ enum mkt_eth_capabilities { + MTK_ETH_PATH_GMAC1_SGMII_BIT, + MTK_ETH_PATH_GMAC2_RGMII_BIT, + MTK_ETH_PATH_GMAC2_SGMII_BIT, ++ MTK_ETH_PATH_GMAC2_2P5GPHY_BIT, + MTK_ETH_PATH_GMAC2_GEPHY_BIT, ++ MTK_ETH_PATH_GMAC3_SGMII_BIT, + MTK_ETH_PATH_GDM1_ESW_BIT, ++ MTK_ETH_PATH_GMAC1_USXGMII_BIT, ++ MTK_ETH_PATH_GMAC2_USXGMII_BIT, ++ MTK_ETH_PATH_GMAC3_USXGMII_BIT, + }; + + /* Supported hardware group on SoCs */ + #define MTK_RGMII BIT_ULL(MTK_RGMII_BIT) + #define MTK_TRGMII BIT_ULL(MTK_TRGMII_BIT) + #define MTK_SGMII BIT_ULL(MTK_SGMII_BIT) ++#define MTK_USXGMII BIT_ULL(MTK_USXGMII_BIT) ++#define MTK_2P5GPHY BIT_ULL(MTK_2P5GPHY_BIT) + #define MTK_ESW BIT_ULL(MTK_ESW_BIT) + #define MTK_GEPHY BIT_ULL(MTK_GEPHY_BIT) + #define MTK_MUX BIT_ULL(MTK_MUX_BIT) +@@ -999,10 +1096,16 @@ enum mkt_eth_capabilities { + BIT_ULL(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT) + #define MTK_ETH_MUX_U3_GMAC2_TO_QPHY \ + BIT_ULL(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT) ++#define MTK_ETH_MUX_GMAC2_TO_2P5GPHY \ ++ BIT_ULL(MTK_ETH_MUX_GMAC2_TO_2P5GPHY_BIT) + #define MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII \ + BIT_ULL(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT) + #define MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII \ + BIT_ULL(MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT) ++#define MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII \ ++ BIT_ULL(MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII_BIT) ++#define MTK_ETH_MUX_GMAC123_TO_USXGMII \ ++ BIT_ULL(MTK_ETH_MUX_GMAC123_TO_USXGMII_BIT) + + /* Supported path present on SoCs */ + #define MTK_ETH_PATH_GMAC1_RGMII BIT_ULL(MTK_ETH_PATH_GMAC1_RGMII_BIT) +@@ -1010,8 +1113,13 @@ enum mkt_eth_capabilities { + #define MTK_ETH_PATH_GMAC1_SGMII BIT_ULL(MTK_ETH_PATH_GMAC1_SGMII_BIT) + #define MTK_ETH_PATH_GMAC2_RGMII BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT) + #define MTK_ETH_PATH_GMAC2_SGMII BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT) ++#define MTK_ETH_PATH_GMAC2_2P5GPHY BIT_ULL(MTK_ETH_PATH_GMAC2_2P5GPHY_BIT) + #define MTK_ETH_PATH_GMAC2_GEPHY BIT_ULL(MTK_ETH_PATH_GMAC2_GEPHY_BIT) ++#define MTK_ETH_PATH_GMAC3_SGMII BIT_ULL(MTK_ETH_PATH_GMAC3_SGMII_BIT) + #define MTK_ETH_PATH_GDM1_ESW BIT_ULL(MTK_ETH_PATH_GDM1_ESW_BIT) ++#define MTK_ETH_PATH_GMAC1_USXGMII BIT_ULL(MTK_ETH_PATH_GMAC1_USXGMII_BIT) ++#define MTK_ETH_PATH_GMAC2_USXGMII BIT_ULL(MTK_ETH_PATH_GMAC2_USXGMII_BIT) ++#define MTK_ETH_PATH_GMAC3_USXGMII BIT_ULL(MTK_ETH_PATH_GMAC3_USXGMII_BIT) + + #define MTK_GMAC1_RGMII (MTK_ETH_PATH_GMAC1_RGMII | MTK_RGMII) + #define MTK_GMAC1_TRGMII (MTK_ETH_PATH_GMAC1_TRGMII | MTK_TRGMII) +@@ -1019,7 +1127,12 @@ enum mkt_eth_capabilities { + #define MTK_GMAC2_RGMII (MTK_ETH_PATH_GMAC2_RGMII | MTK_RGMII) + #define MTK_GMAC2_SGMII (MTK_ETH_PATH_GMAC2_SGMII | MTK_SGMII) + #define MTK_GMAC2_GEPHY (MTK_ETH_PATH_GMAC2_GEPHY | MTK_GEPHY) ++#define MTK_GMAC2_2P5GPHY (MTK_ETH_PATH_GMAC2_2P5GPHY | MTK_2P5GPHY) ++#define MTK_GMAC3_SGMII (MTK_ETH_PATH_GMAC3_SGMII | MTK_SGMII) + #define MTK_GDM1_ESW (MTK_ETH_PATH_GDM1_ESW | MTK_ESW) ++#define MTK_GMAC1_USXGMII (MTK_ETH_PATH_GMAC1_USXGMII | MTK_USXGMII) ++#define MTK_GMAC2_USXGMII (MTK_ETH_PATH_GMAC2_USXGMII | MTK_USXGMII) ++#define MTK_GMAC3_USXGMII (MTK_ETH_PATH_GMAC3_USXGMII | MTK_USXGMII) + + /* MUXes present on SoCs */ + /* 0: GDM1 -> GMAC1, 1: GDM1 -> ESW */ +@@ -1038,10 +1151,20 @@ enum mkt_eth_capabilities { + (MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII | MTK_MUX | \ + MTK_SHARED_SGMII) + ++/* 2: GMAC2 -> XGMII */ ++#define MTK_MUX_GMAC2_TO_2P5GPHY \ ++ (MTK_ETH_MUX_GMAC2_TO_2P5GPHY | MTK_MUX | MTK_INFRA) ++ + /* 0: GMACx -> GEPHY, 1: GMACx -> SGMII where x is 1 or 2 */ + #define MTK_MUX_GMAC12_TO_GEPHY_SGMII \ + (MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII | MTK_MUX) + ++#define MTK_MUX_GMAC123_TO_GEPHY_SGMII \ ++ (MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII | MTK_MUX) ++ ++#define MTK_MUX_GMAC123_TO_USXGMII \ ++ (MTK_ETH_MUX_GMAC123_TO_USXGMII | MTK_MUX | MTK_INFRA) ++ + #define MTK_HAS_CAPS(caps, _x) (((caps) & (_x)) == (_x)) + + #define MT7621_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | \ +@@ -1073,8 +1196,12 @@ enum mkt_eth_capabilities { + MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ + MTK_RSTCTRL_PPE1 | MTK_SRAM) + +-#define MT7988_CAPS (MTK_36BIT_DMA | MTK_GDM1_ESW | MTK_QDMA | \ +- MTK_RSTCTRL_PPE1 | MTK_RSTCTRL_PPE2 | MTK_SRAM) ++#define MT7988_CAPS (MTK_36BIT_DMA | MTK_GDM1_ESW | MTK_GMAC1_SGMII | \ ++ MTK_GMAC2_2P5GPHY | MTK_GMAC2_SGMII | MTK_GMAC2_USXGMII | \ ++ MTK_GMAC3_SGMII | MTK_GMAC3_USXGMII | \ ++ MTK_MUX_GMAC123_TO_GEPHY_SGMII | \ ++ MTK_MUX_GMAC123_TO_USXGMII | MTK_MUX_GMAC2_TO_2P5GPHY | \ ++ MTK_QDMA | MTK_RSTCTRL_PPE1 | MTK_RSTCTRL_PPE2 | MTK_SRAM) + + struct mtk_tx_dma_desc_info { + dma_addr_t addr; +@@ -1184,6 +1311,24 @@ struct mtk_soc_data { + /* currently no SoC has more than 3 macs */ + #define MTK_MAX_DEVS 3 + ++/* struct mtk_usxgmii_pcs - This structure holds each usxgmii regmap and ++ * associated data ++ * @regmap: The register map pointing at the range used to setup ++ * USXGMII modes ++ * @interface: Currently selected interface mode ++ * @id: The element is used to record the index of PCS ++ * @pcs: Phylink PCS structure ++ */ ++struct mtk_usxgmii_pcs { ++ struct mtk_eth *eth; ++ struct regmap *regmap; ++ struct phylink_pcs *wrapped_sgmii_pcs; ++ phy_interface_t interface; ++ u8 id; ++ unsigned int mode; ++ struct phylink_pcs pcs; ++}; ++ + /* struct mtk_eth - This is the main datasructure for holding the state + * of the driver + * @dev: The device pointer +@@ -1204,6 +1349,12 @@ struct mtk_soc_data { + * @infra: The register map pointing at the range used to setup + * SGMII and GePHY path + * @sgmii_pcs: Pointers to mtk-pcs-lynxi phylink_pcs instances ++ * @sgmii_wrapped_pcs: Pointers to NETSYSv3 wrapper PCS instances ++ * @usxgmii_pll: The register map pointing at the range used to control ++ * the USXGMII SerDes PLL ++ * @regmap_pextp: The register map pointing at the range used to setup ++ * PHYA ++ * @usxgmii_pcs: Pointer to array of pointers to struct for USXGMII PCS + * @pctl: The register map pointing at the range used to setup + * GMAC port drive/slew values + * @dma_refcnt: track how many netdevs are using the DMA engine +@@ -1247,6 +1398,10 @@ struct mtk_eth { + struct regmap *ethsys; + struct regmap *infra; + struct phylink_pcs *sgmii_pcs[MTK_MAX_DEVS]; ++ struct regmap *toprgu; ++ struct regmap *usxgmii_pll; ++ struct regmap *regmap_pextp[MTK_MAX_DEVS]; ++ struct mtk_usxgmii_pcs *usxgmii_pcs[MTK_MAX_DEVS]; + struct regmap *pctl; + bool hwlro; + refcount_t dma_refcnt; +@@ -1434,6 +1589,19 @@ static inline u32 mtk_get_ib2_multicast_ + return MTK_FOE_IB2_MULTICAST; + } + ++static inline bool mtk_interface_mode_is_xgmii(phy_interface_t interface) ++{ ++ switch (interface) { ++ case PHY_INTERFACE_MODE_INTERNAL: ++ case PHY_INTERFACE_MODE_USXGMII: ++ case PHY_INTERFACE_MODE_10GBASER: ++ case PHY_INTERFACE_MODE_5GBASER: ++ return true; ++ default: ++ return false; ++ } ++} ++ + /* read the hardware status register */ + void mtk_stats_update_mac(struct mtk_mac *mac); + +@@ -1442,8 +1610,10 @@ u32 mtk_r32(struct mtk_eth *eth, unsigne + u32 mtk_m32(struct mtk_eth *eth, u32 mask, u32 set, unsigned int reg); + + int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id); ++int mtk_gmac_2p5gphy_path_setup(struct mtk_eth *eth, int mac_id); + int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id); + int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id); ++int mtk_gmac_usxgmii_path_setup(struct mtk_eth *eth, int mac_id); + + int mtk_eth_offload_init(struct mtk_eth *eth); + int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type, +@@ -1453,5 +1623,63 @@ int mtk_flow_offload_cmd(struct mtk_eth + void mtk_flow_offload_cleanup(struct mtk_eth *eth, struct list_head *list); + void mtk_eth_set_dma_device(struct mtk_eth *eth, struct device *dma_dev); + ++static inline int mtk_mac2xgmii_id(struct mtk_eth *eth, int mac_id) ++{ ++ int xgmii_id = mac_id; ++ ++ if (mtk_is_netsys_v3_or_greater(eth)) { ++ switch (mac_id) { ++ case MTK_GMAC1_ID: ++ case MTK_GMAC2_ID: ++ xgmii_id = 1; ++ break; ++ case MTK_GMAC3_ID: ++ xgmii_id = 0; ++ break; ++ default: ++ xgmii_id = -1; ++ } ++ } ++ ++ return MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_SGMII) ? 0 : xgmii_id; ++} ++ ++static inline int mtk_xgmii2mac_id(struct mtk_eth *eth, int xgmii_id) ++{ ++ int mac_id = xgmii_id; ++ ++ if (mtk_is_netsys_v3_or_greater(eth)) { ++ switch (xgmii_id) { ++ case 0: ++ mac_id = 2; ++ break; ++ case 1: ++ mac_id = 1; ++ break; ++ default: ++ mac_id = -1; ++ } ++ } ++ ++ return mac_id; ++} ++ ++#ifdef CONFIG_NET_MEDIATEK_SOC_USXGMII ++struct phylink_pcs *mtk_sgmii_wrapper_select_pcs(struct mtk_eth *eth, int id); ++struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int id); ++int mtk_usxgmii_init(struct mtk_eth *eth); ++#else ++static inline struct phylink_pcs *mtk_sgmii_wrapper_select_pcs(struct mtk_eth *eth, int id) ++{ ++ return NULL; ++} ++ ++static inline struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int id) ++{ ++ return NULL; ++} ++ ++static inline int mtk_usxgmii_init(struct mtk_eth *eth) { return 0; } ++#endif /* NET_MEDIATEK_SOC_USXGMII */ + + #endif /* MTK_ETH_H */ +--- /dev/null ++++ b/drivers/net/ethernet/mediatek/mtk_usxgmii.c +@@ -0,0 +1,690 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2023 MediaTek Inc. ++ * Author: Henry Yen ++ * Daniel Golle ++ */ ++ ++#include ++#include ++#include ++#include "mtk_eth_soc.h" ++ ++static struct mtk_usxgmii_pcs *pcs_to_mtk_usxgmii_pcs(struct phylink_pcs *pcs) ++{ ++ return container_of(pcs, struct mtk_usxgmii_pcs, pcs); ++} ++ ++static int mtk_xfi_pextp_init(struct mtk_eth *eth) ++{ ++ struct device *dev = eth->dev; ++ struct device_node *r = dev->of_node; ++ struct device_node *np; ++ int i; ++ ++ for (i = 0; i < MTK_MAX_DEVS; i++) { ++ np = of_parse_phandle(r, "mediatek,xfi-pextp", i); ++ if (!np) ++ break; ++ ++ eth->regmap_pextp[i] = syscon_node_to_regmap(np); ++ if (IS_ERR(eth->regmap_pextp[i])) ++ return PTR_ERR(eth->regmap_pextp[i]); ++ } ++ ++ return 0; ++} ++ ++static int mtk_xfi_pll_init(struct mtk_eth *eth) ++{ ++ struct device_node *r = eth->dev->of_node; ++ struct device_node *np; ++ ++ np = of_parse_phandle(r, "mediatek,xfi-pll", 0); ++ if (!np) ++ return -1; ++ ++ eth->usxgmii_pll = syscon_node_to_regmap(np); ++ if (IS_ERR(eth->usxgmii_pll)) ++ return PTR_ERR(eth->usxgmii_pll); ++ ++ return 0; ++} ++ ++static int mtk_toprgu_init(struct mtk_eth *eth) ++{ ++ struct device_node *r = eth->dev->of_node; ++ struct device_node *np; ++ ++ np = of_parse_phandle(r, "mediatek,toprgu", 0); ++ if (!np) ++ return -1; ++ ++ eth->toprgu = syscon_node_to_regmap(np); ++ if (IS_ERR(eth->toprgu)) ++ return PTR_ERR(eth->toprgu); ++ ++ return 0; ++} ++ ++static int mtk_xfi_pll_enable(struct mtk_eth *eth) ++{ ++ u32 val = 0; ++ ++ if (!eth->usxgmii_pll) ++ return -EINVAL; ++ ++ /* Add software workaround for USXGMII PLL TCL issue */ ++ regmap_write(eth->usxgmii_pll, XFI_PLL_ANA_GLB8, RG_XFI_PLL_ANA_SWWA); ++ ++ regmap_read(eth->usxgmii_pll, XFI_PLL_DIG_GLB8, &val); ++ val |= RG_XFI_PLL_EN; ++ regmap_write(eth->usxgmii_pll, XFI_PLL_DIG_GLB8, val); ++ ++ return 0; ++} ++ ++static void mtk_usxgmii_setup_phya(struct regmap *pextp, phy_interface_t interface, int id) ++{ ++ bool is_10g = (interface == PHY_INTERFACE_MODE_10GBASER || ++ interface == PHY_INTERFACE_MODE_USXGMII); ++ bool is_2p5g = (interface == PHY_INTERFACE_MODE_2500BASEX); ++ bool is_5g = (interface == PHY_INTERFACE_MODE_5GBASER); ++ ++ /* Setup operation mode */ ++ if (is_10g) ++ regmap_write(pextp, 0x9024, 0x00C9071C); ++ else ++ regmap_write(pextp, 0x9024, 0x00D9071C); ++ ++ if (is_5g) ++ regmap_write(pextp, 0x2020, 0xAAA5A5AA); ++ else ++ regmap_write(pextp, 0x2020, 0xAA8585AA); ++ ++ if (is_2p5g || is_5g || is_10g) { ++ regmap_write(pextp, 0x2030, 0x0C020707); ++ regmap_write(pextp, 0x2034, 0x0E050F0F); ++ regmap_write(pextp, 0x2040, 0x00140032); ++ } else { ++ regmap_write(pextp, 0x2030, 0x0C020207); ++ regmap_write(pextp, 0x2034, 0x0E05050F); ++ regmap_write(pextp, 0x2040, 0x00200032); ++ } ++ ++ if (is_2p5g || is_10g) ++ regmap_write(pextp, 0x50F0, 0x00C014AA); ++ else if (is_5g) ++ regmap_write(pextp, 0x50F0, 0x00C018AA); ++ else ++ regmap_write(pextp, 0x50F0, 0x00C014BA); ++ ++ if (is_5g) { ++ regmap_write(pextp, 0x50E0, 0x3777812B); ++ regmap_write(pextp, 0x506C, 0x005C9CFF); ++ regmap_write(pextp, 0x5070, 0x9DFAFAFA); ++ regmap_write(pextp, 0x5074, 0x273F3F3F); ++ regmap_write(pextp, 0x5078, 0xA8883868); ++ regmap_write(pextp, 0x507C, 0x14661466); ++ } else { ++ regmap_write(pextp, 0x50E0, 0x3777C12B); ++ regmap_write(pextp, 0x506C, 0x005F9CFF); ++ regmap_write(pextp, 0x5070, 0x9D9DFAFA); ++ regmap_write(pextp, 0x5074, 0x27273F3F); ++ regmap_write(pextp, 0x5078, 0xA7883C68); ++ regmap_write(pextp, 0x507C, 0x11661166); ++ } ++ ++ if (is_2p5g || is_10g) { ++ regmap_write(pextp, 0x5080, 0x0E000AAF); ++ regmap_write(pextp, 0x5084, 0x08080D0D); ++ regmap_write(pextp, 0x5088, 0x02030909); ++ } else if (is_5g) { ++ regmap_write(pextp, 0x5080, 0x0E001ABF); ++ regmap_write(pextp, 0x5084, 0x080B0D0D); ++ regmap_write(pextp, 0x5088, 0x02050909); ++ } else { ++ regmap_write(pextp, 0x5080, 0x0E000EAF); ++ regmap_write(pextp, 0x5084, 0x08080E0D); ++ regmap_write(pextp, 0x5088, 0x02030B09); ++ } ++ ++ if (is_5g) { ++ regmap_write(pextp, 0x50E4, 0x0C000000); ++ regmap_write(pextp, 0x50E8, 0x04000000); ++ } else { ++ regmap_write(pextp, 0x50E4, 0x0C0C0000); ++ regmap_write(pextp, 0x50E8, 0x04040000); ++ } ++ ++ if (is_2p5g || mtk_interface_mode_is_xgmii(interface)) ++ regmap_write(pextp, 0x50EC, 0x0F0F0C06); ++ else ++ regmap_write(pextp, 0x50EC, 0x0F0F0606); ++ ++ if (is_5g) { ++ regmap_write(pextp, 0x50A8, 0x50808C8C); ++ regmap_write(pextp, 0x6004, 0x18000000); ++ } else { ++ regmap_write(pextp, 0x50A8, 0x506E8C8C); ++ regmap_write(pextp, 0x6004, 0x18190000); ++ } ++ ++ if (is_10g) ++ regmap_write(pextp, 0x00F8, 0x01423342); ++ else if (is_5g) ++ regmap_write(pextp, 0x00F8, 0x00A132A1); ++ else if (is_2p5g) ++ regmap_write(pextp, 0x00F8, 0x009C329C); ++ else ++ regmap_write(pextp, 0x00F8, 0x00FA32FA); ++ ++ /* Force SGDT_OUT off and select PCS */ ++ if (mtk_interface_mode_is_xgmii(interface)) ++ regmap_write(pextp, 0x00F4, 0x80201F20); ++ else ++ regmap_write(pextp, 0x00F4, 0x80201F21); ++ ++ /* Force GLB_CKDET_OUT */ ++ regmap_write(pextp, 0x0030, 0x00050C00); ++ ++ /* Force AEQ on */ ++ regmap_write(pextp, 0x0070, 0x02002800); ++ ndelay(1020); ++ ++ /* Setup DA default value */ ++ regmap_write(pextp, 0x30B0, 0x00000020); ++ regmap_write(pextp, 0x3028, 0x00008A01); ++ regmap_write(pextp, 0x302C, 0x0000A884); ++ regmap_write(pextp, 0x3024, 0x00083002); ++ if (mtk_interface_mode_is_xgmii(interface)) { ++ regmap_write(pextp, 0x3010, 0x00022220); ++ regmap_write(pextp, 0x5064, 0x0F020A01); ++ regmap_write(pextp, 0x50B4, 0x06100600); ++ if (interface == PHY_INTERFACE_MODE_USXGMII) ++ regmap_write(pextp, 0x3048, 0x40704000); ++ else ++ regmap_write(pextp, 0x3048, 0x47684100); ++ } else { ++ regmap_write(pextp, 0x3010, 0x00011110); ++ regmap_write(pextp, 0x3048, 0x40704000); ++ } ++ ++ if (!mtk_interface_mode_is_xgmii(interface) && !is_2p5g) ++ regmap_write(pextp, 0x3064, 0x0000C000); ++ ++ if (interface == PHY_INTERFACE_MODE_USXGMII) { ++ regmap_write(pextp, 0x3050, 0xA8000000); ++ regmap_write(pextp, 0x3054, 0x000000AA); ++ } else if (mtk_interface_mode_is_xgmii(interface)) { ++ regmap_write(pextp, 0x3050, 0x00000000); ++ regmap_write(pextp, 0x3054, 0x00000000); ++ } else { ++ regmap_write(pextp, 0x3050, 0xA8000000); ++ regmap_write(pextp, 0x3054, 0x000000AA); ++ } ++ ++ if (mtk_interface_mode_is_xgmii(interface)) ++ regmap_write(pextp, 0x306C, 0x00000F00); ++ else if (is_2p5g) ++ regmap_write(pextp, 0x306C, 0x22000F00); ++ else ++ regmap_write(pextp, 0x306C, 0x20200F00); ++ ++ if (interface == PHY_INTERFACE_MODE_10GBASER && id == 0) ++ regmap_write(pextp, 0xA008, 0x0007B400); ++ ++ if (mtk_interface_mode_is_xgmii(interface)) ++ regmap_write(pextp, 0xA060, 0x00040000); ++ else ++ regmap_write(pextp, 0xA060, 0x00050000); ++ ++ if (is_10g) ++ regmap_write(pextp, 0x90D0, 0x00000001); ++ else if (is_5g) ++ regmap_write(pextp, 0x90D0, 0x00000003); ++ else if (is_2p5g) ++ regmap_write(pextp, 0x90D0, 0x00000005); ++ else ++ regmap_write(pextp, 0x90D0, 0x00000007); ++ ++ /* Release reset */ ++ regmap_write(pextp, 0x0070, 0x0200E800); ++ usleep_range(150, 500); ++ ++ /* Switch to P0 */ ++ regmap_write(pextp, 0x0070, 0x0200C111); ++ ndelay(1020); ++ regmap_write(pextp, 0x0070, 0x0200C101); ++ usleep_range(15, 50); ++ ++ if (mtk_interface_mode_is_xgmii(interface)) { ++ /* Switch to Gen3 */ ++ regmap_write(pextp, 0x0070, 0x0202C111); ++ } else { ++ /* Switch to Gen2 */ ++ regmap_write(pextp, 0x0070, 0x0201C111); ++ } ++ ndelay(1020); ++ if (mtk_interface_mode_is_xgmii(interface)) ++ regmap_write(pextp, 0x0070, 0x0202C101); ++ else ++ regmap_write(pextp, 0x0070, 0x0201C101); ++ usleep_range(100, 500); ++ regmap_write(pextp, 0x30B0, 0x00000030); ++ if (mtk_interface_mode_is_xgmii(interface)) ++ regmap_write(pextp, 0x00F4, 0x80201F00); ++ else ++ regmap_write(pextp, 0x00F4, 0x80201F01); ++ ++ regmap_write(pextp, 0x3040, 0x30000000); ++ usleep_range(400, 1000); ++} ++ ++static void mtk_usxgmii_reset(struct mtk_eth *eth, int id) ++{ ++ u32 toggle, val; ++ ++ if (id >= MTK_MAX_DEVS || !eth->toprgu) ++ return; ++ ++ switch (id) { ++ case 0: ++ toggle = SWSYSRST_XFI_PEXPT0_GRST | SWSYSRST_XFI0_GRST | ++ SWSYSRST_SGMII0_GRST; ++ break; ++ case 1: ++ toggle = SWSYSRST_XFI_PEXPT1_GRST | SWSYSRST_XFI1_GRST | ++ SWSYSRST_SGMII1_GRST; ++ break; ++ default: ++ return; ++ } ++ ++ /* Enable software reset */ ++ regmap_set_bits(eth->toprgu, TOPRGU_SWSYSRST_EN, toggle); ++ ++ /* Assert USXGMII reset */ ++ regmap_set_bits(eth->toprgu, TOPRGU_SWSYSRST, ++ FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88) | toggle); ++ ++ usleep_range(100, 500); ++ ++ /* De-assert USXGMII reset */ ++ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); ++ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88); ++ val &= ~toggle; ++ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); ++ ++ /* Disable software reset */ ++ regmap_clear_bits(eth->toprgu, TOPRGU_SWSYSRST_EN, toggle); ++ ++ mdelay(10); ++} ++ ++/* As the USXGMII PHYA is shared with the 1000Base-X/2500Base-X/Cisco SGMII unit ++ * the psc-mtk-lynxi instance needs to be wrapped, so that calls to .pcs_config ++ * also trigger an initial reset and subsequent configuration of the PHYA. ++ */ ++struct mtk_sgmii_wrapper_pcs { ++ struct mtk_eth *eth; ++ struct phylink_pcs *wrapped_pcs; ++ u8 id; ++ struct phylink_pcs pcs; ++}; ++ ++static int mtk_sgmii_wrapped_pcs_config(struct phylink_pcs *pcs, ++ unsigned int mode, ++ phy_interface_t interface, ++ const unsigned long *advertising, ++ bool permit_pause_to_mac) ++{ ++ struct mtk_sgmii_wrapper_pcs *wp = container_of(pcs, struct mtk_sgmii_wrapper_pcs, pcs); ++ bool full_reconf; ++ int ret; ++ ++ full_reconf = interface != wp->eth->usxgmii_pcs[wp->id]->interface; ++ if (full_reconf) { ++ mtk_xfi_pll_enable(wp->eth); ++ mtk_usxgmii_reset(wp->eth, wp->id); ++ } ++ ++ ret = wp->wrapped_pcs->ops->pcs_config(wp->wrapped_pcs, mode, interface, ++ advertising, permit_pause_to_mac); ++ ++ if (full_reconf) ++ mtk_usxgmii_setup_phya(wp->eth->regmap_pextp[wp->id], interface, wp->id); ++ ++ wp->eth->usxgmii_pcs[wp->id]->interface = interface; ++ ++ return ret; ++} ++ ++static void mtk_sgmii_wrapped_pcs_get_state(struct phylink_pcs *pcs, ++ struct phylink_link_state *state) ++{ ++ struct mtk_sgmii_wrapper_pcs *wp = container_of(pcs, struct mtk_sgmii_wrapper_pcs, pcs); ++ ++ return wp->wrapped_pcs->ops->pcs_get_state(wp->wrapped_pcs, state); ++} ++ ++static void mtk_sgmii_wrapped_pcs_an_restart(struct phylink_pcs *pcs) ++{ ++ struct mtk_sgmii_wrapper_pcs *wp = container_of(pcs, struct mtk_sgmii_wrapper_pcs, pcs); ++ ++ wp->wrapped_pcs->ops->pcs_an_restart(wp->wrapped_pcs); ++} ++ ++static void mtk_sgmii_wrapped_pcs_link_up(struct phylink_pcs *pcs, ++ unsigned int mode, ++ phy_interface_t interface, int speed, ++ int duplex) ++{ ++ struct mtk_sgmii_wrapper_pcs *wp = container_of(pcs, struct mtk_sgmii_wrapper_pcs, pcs); ++ ++ wp->wrapped_pcs->ops->pcs_link_up(wp->wrapped_pcs, mode, interface, speed, duplex); ++} ++ ++static void mtk_sgmii_wrapped_pcs_disable(struct phylink_pcs *pcs) ++{ ++ struct mtk_sgmii_wrapper_pcs *wp = container_of(pcs, struct mtk_sgmii_wrapper_pcs, pcs); ++ ++ wp->wrapped_pcs->ops->pcs_disable(wp->wrapped_pcs); ++ ++ wp->eth->usxgmii_pcs[wp->id]->interface = PHY_INTERFACE_MODE_NA; ++} ++ ++static const struct phylink_pcs_ops mtk_sgmii_wrapped_pcs_ops = { ++ .pcs_get_state = mtk_sgmii_wrapped_pcs_get_state, ++ .pcs_config = mtk_sgmii_wrapped_pcs_config, ++ .pcs_an_restart = mtk_sgmii_wrapped_pcs_an_restart, ++ .pcs_link_up = mtk_sgmii_wrapped_pcs_link_up, ++ .pcs_disable = mtk_sgmii_wrapped_pcs_disable, ++}; ++ ++static int mtk_sgmii_wrapper_init(struct mtk_eth *eth) ++{ ++ struct mtk_sgmii_wrapper_pcs *wp; ++ int i; ++ ++ for (i = 0; i < MTK_MAX_DEVS; i++) { ++ if (!eth->sgmii_pcs[i]) ++ continue; ++ ++ if (!eth->usxgmii_pcs[i]) ++ continue; ++ ++ /* Make sure all PCS ops are supported by wrapped PCS */ ++ if (!eth->sgmii_pcs[i]->ops->pcs_get_state || ++ !eth->sgmii_pcs[i]->ops->pcs_config || ++ !eth->sgmii_pcs[i]->ops->pcs_an_restart || ++ !eth->sgmii_pcs[i]->ops->pcs_link_up || ++ !eth->sgmii_pcs[i]->ops->pcs_disable) ++ return -EOPNOTSUPP; ++ ++ wp = devm_kzalloc(eth->dev, sizeof(*wp), GFP_KERNEL); ++ if (!wp) ++ return -ENOMEM; ++ ++ wp->wrapped_pcs = eth->sgmii_pcs[i]; ++ wp->id = i; ++ wp->pcs.poll = true; ++ wp->pcs.ops = &mtk_sgmii_wrapped_pcs_ops; ++ wp->eth = eth; ++ ++ eth->usxgmii_pcs[i]->wrapped_sgmii_pcs = &wp->pcs; ++ } ++ ++ return 0; ++} ++ ++struct phylink_pcs *mtk_sgmii_wrapper_select_pcs(struct mtk_eth *eth, int mac_id) ++{ ++ u32 xgmii_id = mtk_mac2xgmii_id(eth, mac_id); ++ ++ if (!eth->usxgmii_pcs[xgmii_id]) ++ return NULL; ++ ++ return eth->usxgmii_pcs[xgmii_id]->wrapped_sgmii_pcs; ++} ++ ++static int mtk_usxgmii_pcs_config(struct phylink_pcs *pcs, unsigned int mode, ++ phy_interface_t interface, ++ const unsigned long *advertising, ++ bool permit_pause_to_mac) ++{ ++ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs); ++ struct mtk_eth *eth = mpcs->eth; ++ struct regmap *pextp = eth->regmap_pextp[mpcs->id]; ++ unsigned int an_ctrl = 0, link_timer = 0, xfi_mode = 0, adapt_mode = 0; ++ bool mode_changed = false; ++ ++ if (!pextp) ++ return -ENODEV; ++ ++ if (interface == PHY_INTERFACE_MODE_USXGMII) { ++ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0x1FF) | USXGMII_AN_ENABLE; ++ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x7B) | ++ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x7B) | ++ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x7B); ++ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_10G) | ++ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_10G); ++ } else if (interface == PHY_INTERFACE_MODE_10GBASER) { ++ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0x1FF); ++ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x7B) | ++ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x7B) | ++ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x7B); ++ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_10G) | ++ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_10G); ++ adapt_mode = USXGMII_RATE_UPDATE_MODE; ++ } else if (interface == PHY_INTERFACE_MODE_5GBASER) { ++ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0xFF); ++ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x3D) | ++ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x3D) | ++ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x3D); ++ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_5G) | ++ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_5G); ++ adapt_mode = USXGMII_RATE_UPDATE_MODE; ++ } else { ++ return -EINVAL; ++ } ++ ++ adapt_mode |= FIELD_PREP(USXGMII_RATE_ADAPT_MODE, USXGMII_RATE_ADAPT_MODE_X1); ++ ++ if (mpcs->interface != interface) { ++ mpcs->interface = interface; ++ mode_changed = true; ++ } ++ ++ mtk_xfi_pll_enable(eth); ++ mtk_usxgmii_reset(eth, mpcs->id); ++ ++ /* Setup USXGMII AN ctrl */ ++ regmap_update_bits(mpcs->regmap, RG_PCS_AN_CTRL0, ++ USXGMII_AN_SYNC_CNT | USXGMII_AN_ENABLE, ++ an_ctrl); ++ ++ regmap_update_bits(mpcs->regmap, RG_PCS_AN_CTRL2, ++ USXGMII_LINK_TIMER_IDLE_DETECT | ++ USXGMII_LINK_TIMER_COMP_ACK_DETECT | ++ USXGMII_LINK_TIMER_AN_RESTART, ++ link_timer); ++ ++ mpcs->mode = mode; ++ ++ /* Gated MAC CK */ ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_MAC_CK_GATED, USXGMII_MAC_CK_GATED); ++ ++ /* Enable interface force mode */ ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_IF_FORCE_EN, USXGMII_IF_FORCE_EN); ++ ++ /* Setup USXGMII adapt mode */ ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_RATE_UPDATE_MODE | USXGMII_RATE_ADAPT_MODE, ++ adapt_mode); ++ ++ /* Setup USXGMII speed */ ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_XFI_RX_MODE | USXGMII_XFI_TX_MODE, ++ xfi_mode); ++ ++ usleep_range(1, 10); ++ ++ /* Un-gated MAC CK */ ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_MAC_CK_GATED, 0); ++ ++ usleep_range(1, 10); ++ ++ /* Disable interface force mode for the AN mode */ ++ if (an_ctrl & USXGMII_AN_ENABLE) ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_IF_FORCE_EN, 0); ++ ++ /* Setup USXGMIISYS with the determined property */ ++ mtk_usxgmii_setup_phya(pextp, interface, mpcs->id); ++ ++ return mode_changed; ++} ++ ++static void mtk_usxgmii_pcs_get_state(struct phylink_pcs *pcs, ++ struct phylink_link_state *state) ++{ ++ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs); ++ struct mtk_eth *eth = mpcs->eth; ++ struct mtk_mac *mac = eth->mac[mtk_xgmii2mac_id(eth, mpcs->id)]; ++ u32 val = 0; ++ ++ regmap_read(mpcs->regmap, RG_PCS_AN_CTRL0, &val); ++ if (FIELD_GET(USXGMII_AN_ENABLE, val)) { ++ /* Refresh LPA by inverting LPA_LATCH */ ++ regmap_read(mpcs->regmap, RG_PCS_AN_STS0, &val); ++ regmap_update_bits(mpcs->regmap, RG_PCS_AN_STS0, ++ USXGMII_LPA_LATCH, ++ !(val & USXGMII_LPA_LATCH)); ++ ++ regmap_read(mpcs->regmap, RG_PCS_AN_STS0, &val); ++ ++ phylink_decode_usxgmii_word(state, FIELD_GET(USXGMII_PCS_AN_WORD, ++ val)); ++ ++ state->interface = mpcs->interface; ++ } else { ++ val = mtk_r32(mac->hw, MTK_XGMAC_STS(mac->id)); ++ ++ if (mac->id == MTK_GMAC2_ID) ++ val >>= 16; ++ ++ switch (FIELD_GET(MTK_USXGMII_PCS_MODE, val)) { ++ case 0: ++ state->speed = SPEED_10000; ++ break; ++ case 1: ++ state->speed = SPEED_5000; ++ break; ++ case 2: ++ state->speed = SPEED_2500; ++ break; ++ case 3: ++ state->speed = SPEED_1000; ++ break; ++ } ++ ++ state->interface = mpcs->interface; ++ state->link = FIELD_GET(MTK_USXGMII_PCS_LINK, val); ++ state->duplex = DUPLEX_FULL; ++ } ++ ++ /* Continuously repeat re-configuration sequence until link comes up */ ++ if (state->link == 0) ++ mtk_usxgmii_pcs_config(pcs, mpcs->mode, ++ state->interface, NULL, false); ++} ++ ++static void mtk_usxgmii_pcs_restart_an(struct phylink_pcs *pcs) ++{ ++ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs); ++ unsigned int val = 0; ++ ++ if (!mpcs->regmap) ++ return; ++ ++ regmap_read(mpcs->regmap, RG_PCS_AN_CTRL0, &val); ++ val |= USXGMII_AN_RESTART; ++ regmap_write(mpcs->regmap, RG_PCS_AN_CTRL0, val); ++} ++ ++static void mtk_usxgmii_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode, ++ phy_interface_t interface, ++ int speed, int duplex) ++{ ++ /* Reconfiguring USXGMII to ensure the quality of the RX signal ++ * after the line side link up. ++ */ ++ mtk_usxgmii_pcs_config(pcs, mode, ++ interface, NULL, false); ++} ++ ++static const struct phylink_pcs_ops mtk_usxgmii_pcs_ops = { ++ .pcs_config = mtk_usxgmii_pcs_config, ++ .pcs_get_state = mtk_usxgmii_pcs_get_state, ++ .pcs_an_restart = mtk_usxgmii_pcs_restart_an, ++ .pcs_link_up = mtk_usxgmii_pcs_link_up, ++}; ++ ++int mtk_usxgmii_init(struct mtk_eth *eth) ++{ ++ struct device_node *r = eth->dev->of_node; ++ struct device *dev = eth->dev; ++ struct device_node *np; ++ int i, ret; ++ ++ for (i = 0; i < MTK_MAX_DEVS; i++) { ++ np = of_parse_phandle(r, "mediatek,usxgmiisys", i); ++ if (!np) ++ break; ++ ++ eth->usxgmii_pcs[i] = devm_kzalloc(dev, sizeof(*eth->usxgmii_pcs[i]), GFP_KERNEL); ++ if (!eth->usxgmii_pcs[i]) ++ return -ENOMEM; ++ ++ eth->usxgmii_pcs[i]->id = i; ++ eth->usxgmii_pcs[i]->eth = eth; ++ eth->usxgmii_pcs[i]->regmap = syscon_node_to_regmap(np); ++ if (IS_ERR(eth->usxgmii_pcs[i]->regmap)) ++ return PTR_ERR(eth->usxgmii_pcs[i]->regmap); ++ ++ eth->usxgmii_pcs[i]->pcs.ops = &mtk_usxgmii_pcs_ops; ++ eth->usxgmii_pcs[i]->pcs.poll = true; ++ eth->usxgmii_pcs[i]->interface = PHY_INTERFACE_MODE_NA; ++ eth->usxgmii_pcs[i]->mode = -1; ++ ++ of_node_put(np); ++ } ++ ++ ret = mtk_xfi_pextp_init(eth); ++ if (ret) ++ return ret; ++ ++ ret = mtk_xfi_pll_init(eth); ++ if (ret) ++ return ret; ++ ++ ret = mtk_toprgu_init(eth); ++ if (ret) ++ return ret; ++ ++ return mtk_sgmii_wrapper_init(eth); ++} ++ ++struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int mac_id) ++{ ++ u32 xgmii_id = mtk_mac2xgmii_id(eth, mac_id); ++ ++ if (!eth->usxgmii_pcs[xgmii_id]->regmap) ++ return NULL; ++ ++ return ð->usxgmii_pcs[xgmii_id]->pcs; ++} diff --git a/target/linux/generic/pending-5.15/750-skb-Do-mix-page-pool-and-page-referenced-frags-in-GR.patch b/target/linux/generic/pending-5.15/750-skb-Do-mix-page-pool-and-page-referenced-frags-in-GR.patch index 54c07f002..ec3e57031 100644 --- a/target/linux/generic/pending-5.15/750-skb-Do-mix-page-pool-and-page-referenced-frags-in-GR.patch +++ b/target/linux/generic/pending-5.15/750-skb-Do-mix-page-pool-and-page-referenced-frags-in-GR.patch @@ -17,7 +17,7 @@ Signed-off-by: Alexander Duyck --- a/net/core/skbuff.c +++ b/net/core/skbuff.c -@@ -4360,6 +4360,15 @@ int skb_gro_receive(struct sk_buff *p, s +@@ -4371,6 +4371,15 @@ int skb_gro_receive(struct sk_buff *p, s if (unlikely(p->len + len >= 65536 || NAPI_GRO_CB(skb)->flush)) return -E2BIG; diff --git a/target/linux/generic/pending-5.15/760-net-core-add-optional-threading-for-backlog-processi.patch b/target/linux/generic/pending-5.15/760-net-core-add-optional-threading-for-backlog-processi.patch index 1fde953e4..2e9f81263 100644 --- a/target/linux/generic/pending-5.15/760-net-core-add-optional-threading-for-backlog-processi.patch +++ b/target/linux/generic/pending-5.15/760-net-core-add-optional-threading-for-backlog-processi.patch @@ -162,7 +162,7 @@ Signed-off-by: Felix Fietkau void netif_napi_add(struct net_device *dev, struct napi_struct *napi, int (*poll)(struct napi_struct *, int), int weight) { -@@ -11399,6 +11474,9 @@ static int dev_cpu_dead(unsigned int old +@@ -11400,6 +11475,9 @@ static int dev_cpu_dead(unsigned int old raise_softirq_irqoff(NET_TX_SOFTIRQ); local_irq_enable(); @@ -172,7 +172,7 @@ Signed-off-by: Felix Fietkau #ifdef CONFIG_RPS remsd = oldsd->rps_ipi_list; oldsd->rps_ipi_list = NULL; -@@ -11738,6 +11816,7 @@ static int __init net_dev_init(void) +@@ -11739,6 +11817,7 @@ static int __init net_dev_init(void) sd->cpu = i; #endif diff --git a/target/linux/generic/pending-5.15/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch b/target/linux/generic/pending-5.15/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch index 9e97a75ec..66db25022 100644 --- a/target/linux/generic/pending-5.15/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch +++ b/target/linux/generic/pending-5.15/760-net-dsa-mv88e6xxx-fix-vlan-setup.patch @@ -17,7 +17,7 @@ Signed-off-by: DENG Qingfang --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c -@@ -3215,6 +3215,7 @@ static int mv88e6xxx_setup(struct dsa_sw +@@ -3225,6 +3225,7 @@ static int mv88e6xxx_setup(struct dsa_sw chip->ds = ds; ds->slave_mii_bus = mv88e6xxx_default_mdio_bus(chip); diff --git a/target/linux/generic/pending-5.15/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch b/target/linux/generic/pending-5.15/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch index c9494db90..c73f894ad 100644 --- a/target/linux/generic/pending-5.15/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch +++ b/target/linux/generic/pending-5.15/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch @@ -17,7 +17,7 @@ Signed-off-by: Tobias Waldekranz --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c -@@ -6344,6 +6344,7 @@ static int mv88e6xxx_register_switch(str +@@ -6386,6 +6386,7 @@ static int mv88e6xxx_register_switch(str ds->ops = &mv88e6xxx_switch_ops; ds->ageing_time_min = chip->info->age_time_coeff; ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX; diff --git a/target/linux/generic/pending-5.15/795-mt7530-register-OF-node-for-internal-MDIO-bus.patch b/target/linux/generic/pending-5.15/795-mt7530-register-OF-node-for-internal-MDIO-bus.patch index 06546b79e..609e03d96 100644 --- a/target/linux/generic/pending-5.15/795-mt7530-register-OF-node-for-internal-MDIO-bus.patch +++ b/target/linux/generic/pending-5.15/795-mt7530-register-OF-node-for-internal-MDIO-bus.patch @@ -16,7 +16,7 @@ Signed-off-by: David Bauer --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c -@@ -2335,10 +2335,13 @@ mt7530_setup_mdio(struct mt7530_priv *pr +@@ -2356,10 +2356,13 @@ mt7530_setup_mdio(struct mt7530_priv *pr { struct dsa_switch *ds = priv->ds; struct device *dev = priv->dev; @@ -30,7 +30,7 @@ Signed-off-by: David Bauer bus = devm_mdiobus_alloc(dev); if (!bus) return -ENOMEM; -@@ -2355,7 +2358,9 @@ mt7530_setup_mdio(struct mt7530_priv *pr +@@ -2376,7 +2379,9 @@ mt7530_setup_mdio(struct mt7530_priv *pr if (priv->irq) mt7530_setup_mdio_irq(priv); diff --git a/target/linux/generic/pending-5.15/860-serial-8250_mtk-track-busclk-state-to-avoid-bus-error.patch b/target/linux/generic/pending-5.15/860-serial-8250_mtk-track-busclk-state-to-avoid-bus-error.patch new file mode 100644 index 000000000..c5db5d949 --- /dev/null +++ b/target/linux/generic/pending-5.15/860-serial-8250_mtk-track-busclk-state-to-avoid-bus-error.patch @@ -0,0 +1,61 @@ +From 629c701fc39f1ada9416e0766a86729e83bde86c Mon Sep 17 00:00:00 2001 +Message-ID: <629c701fc39f1ada9416e0766a86729e83bde86c.1694465766.git.daniel@makrotopia.org> +From: Daniel Golle +Date: Mon, 11 Sep 2023 21:27:44 +0100 +Subject: [PATCH] serial: 8250_mtk: track busclk state to avoid bus error +To: Greg Kroah-Hartman , + Jiri Slaby , + Matthias Brugger , + AngeloGioacchino Del Regno , + Daniel Golle , + John Ogness , + Chen-Yu Tsai , + Changqi Hu , + linux-kernel@vger.kernel.org, + linux-serial@vger.kernel.org, + linux-arm-kernel@lists.infradead.org, + linux-mediatek@lists.infradead.org + +Commit e32a83c70cf9 ("serial: 8250-mtk: modify mtk uart power and +clock management") introduced polling a debug register to make sure +the UART is idle before disabling the bus clock. However, at least on +some MediaTek SoCs access to that very debug register requires the bus +clock being enabled. Hence calling the suspend function while already +in suspended state results in that register access triggering a bus +error. In order to avoid that, track the state of the bus clock and +only poll the debug register if not already in suspended state. + +Fixes: e32a83c70cf9 ("serial: 8250-mtk: modify mtk uart power and clock management") +Signed-off-by: Daniel Golle +--- + drivers/tty/serial/8250/8250_mtk.c | 11 ++++++++++- + 1 file changed, 10 insertions(+), 1 deletion(-) + +--- a/drivers/tty/serial/8250/8250_mtk.c ++++ b/drivers/tty/serial/8250/8250_mtk.c +@@ -32,7 +32,7 @@ + #define MTK_UART_RXTRI_AD 0x14 /* RX Trigger address */ + #define MTK_UART_FRACDIV_L 0x15 /* Fractional divider LSB address */ + #define MTK_UART_FRACDIV_M 0x16 /* Fractional divider MSB address */ +-#define MTK_UART_DEBUG0 0x18 ++#define MTK_UART_DEBUG0 0x18 + #define MTK_UART_IER_XOFFI 0x20 /* Enable XOFF character interrupt */ + #define MTK_UART_IER_RTSI 0x40 /* Enable RTS Modem status interrupt */ + #define MTK_UART_IER_CTSI 0x80 /* Enable CTS Modem status interrupt */ +@@ -418,13 +418,12 @@ static int __maybe_unused mtk8250_runtim + struct mtk8250_data *data = dev_get_drvdata(dev); + struct uart_8250_port *up = serial8250_get_port(data->line); + +- /* wait until UART in idle status */ +- while +- (serial_in(up, MTK_UART_DEBUG0)); +- + if (data->clk_count == 0U) { + dev_dbg(dev, "%s clock count is 0\n", __func__); + } else { ++ /* wait until UART in idle status */ ++ while ++ (serial_in(up, MTK_UART_DEBUG0)); + clk_disable_unprepare(data->bus_clk); + data->clk_count--; + } diff --git a/target/linux/generic/pending-5.15/901-usb-add-more-modem-support.patch b/target/linux/generic/pending-5.15/901-usb-add-more-modem-support.patch index 53d3feeaf..91f621126 100644 --- a/target/linux/generic/pending-5.15/901-usb-add-more-modem-support.patch +++ b/target/linux/generic/pending-5.15/901-usb-add-more-modem-support.patch @@ -1,9 +1,9 @@ --- a/drivers/net/usb/qmi_wwan.c +++ b/drivers/net/usb/qmi_wwan.c -@@ -1420,6 +1420,9 @@ static const struct usb_device_id produc - {QMI_FIXED_INTF(0x0489, 0xe0b5, 0)}, /* Foxconn T77W968 LTE with eSIM support*/ +@@ -1424,6 +1424,9 @@ static const struct usb_device_id produc {QMI_FIXED_INTF(0x2692, 0x9025, 4)}, /* Cellient MPL200 (rebranded Qualcomm 05c6:9025) */ {QMI_QUIRK_SET_DTR(0x1546, 0x1342, 4)}, /* u-blox LARA-L6 */ + {QMI_QUIRK_SET_DTR(0x33f8, 0x0104, 4)}, /* Rolling RW101 RMNET */ + {QMI_FIXED_INTF(0x2077, 0x2002, 4)}, /* T&W TW04C */ + {QMI_FIXED_INTF(0x2077, 0x2003, 4)}, /* T&W TW12G */ + {QMI_FIXED_INTF(0x2077, 0x2004, 4)}, /* T&W TW510M */ @@ -12,16 +12,17 @@ {QMI_GOBI1K_DEVICE(0x05c6, 0x9212)}, /* Acer Gobi Modem Device */ --- a/drivers/usb/serial/option.c +++ b/drivers/usb/serial/option.c -@@ -2277,6 +2277,12 @@ static const struct usb_device_id option - { USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x01a3, 0xff) }, /* Fibocom FM101-GL (laptop MBIM) */ - { USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x01a4, 0xff), /* Fibocom FM101-GL (laptop MBIM) */ - .driver_info = RSVD(4) }, -+ { USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x0a04, 0xff), /* Fibocom FM650 ECM */ -+ .driver_info = RSVD(5) }, -+ { USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x0a05, 0xff), /* Fibocom FM650 NCM */ -+ .driver_info = RSVD(6) }, -+ { USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x0a06, 0xff), /* Fibocom FM650 RNDIS */ -+ .driver_info = RSVD(6) }, +@@ -2310,9 +2310,13 @@ static const struct usb_device_id option + { USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x0a06, 0xff) }, /* Fibocom FM650-CN (RNDIS mode) */ + { USB_DEVICE_INTERFACE_CLASS(0x2cb7, 0x0a07, 0xff) }, /* Fibocom FM650-CN (MBIM mode) */ { USB_DEVICE_INTERFACE_CLASS(0x2df3, 0x9d03, 0xff) }, /* LongSung M5710 */ ++ { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1402, 0xff) }, /* GosunCn GM800 (Download mode) */ ++ { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1403, 0xff) }, /* GosunCn GM800 (rmnet, old) */ { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1404, 0xff) }, /* GosunCn GM500 RNDIS */ { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1405, 0xff) }, /* GosunCn GM500 MBIM */ + { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1406, 0xff) }, /* GosunCn GM500 ECM/NCM */ ++ { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1421, 0xff) }, /* GosunCn GM800 (rmnet) */ ++ { USB_DEVICE_INTERFACE_CLASS(0x305a, 0x1422, 0xff) }, /* GosunCn GM800 (EAP) */ + { USB_DEVICE(0x33f8, 0x0104), /* Rolling RW101-GL (laptop RMNET) */ + .driver_info = RSVD(4) | RSVD(5) }, + { USB_DEVICE_INTERFACE_CLASS(0x33f8, 0x01a2, 0xff) }, /* Rolling RW101-GL (laptop MBIM) */ diff --git a/target/linux/generic/pending-5.15/920-mangle_bootargs.patch b/target/linux/generic/pending-5.15/920-mangle_bootargs.patch index a8c084b98..b127d76e0 100644 --- a/target/linux/generic/pending-5.15/920-mangle_bootargs.patch +++ b/target/linux/generic/pending-5.15/920-mangle_bootargs.patch @@ -61,7 +61,7 @@ Signed-off-by: Imre Kaloz /* * We need to store the untouched command line for future reference. * We also need to store the touched command line since the parameter -@@ -958,6 +981,7 @@ asmlinkage __visible void __init __no_sa +@@ -960,6 +983,7 @@ asmlinkage __visible void __init __no_sa pr_notice("%s", linux_banner); early_security_init(); setup_arch(&command_line); diff --git a/target/linux/generic/pending-5.4/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch b/target/linux/generic/pending-5.4/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch index fcf3aa035..0e26ccb39 100644 --- a/target/linux/generic/pending-5.4/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch +++ b/target/linux/generic/pending-5.4/120-Fix-alloc_node_mem_map-with-ARCH_PFN_OFFSET-calcu.patch @@ -71,7 +71,7 @@ Signed-off-by: Tobias Wolf --- a/mm/page_alloc.c +++ b/mm/page_alloc.c -@@ -6947,7 +6947,7 @@ static void __ref alloc_node_mem_map(str +@@ -6949,7 +6949,7 @@ static void __ref alloc_node_mem_map(str mem_map = NODE_DATA(0)->node_mem_map; #if defined(CONFIG_HAVE_MEMBLOCK_NODE_MAP) || defined(CONFIG_FLATMEM) if (page_to_pfn(mem_map) != pgdat->node_start_pfn) diff --git a/target/linux/generic/pending-5.4/630-packet_socket_type.patch b/target/linux/generic/pending-5.4/630-packet_socket_type.patch index 7370f5eda..9b218614e 100644 --- a/target/linux/generic/pending-5.4/630-packet_socket_type.patch +++ b/target/linux/generic/pending-5.4/630-packet_socket_type.patch @@ -87,7 +87,7 @@ Signed-off-by: Felix Fietkau if (!net_eq(dev_net(dev), sock_net(sk))) goto drop; -@@ -3317,6 +3319,7 @@ static int packet_create(struct net *net +@@ -3316,6 +3318,7 @@ static int packet_create(struct net *net mutex_init(&po->pg_vec_lock); po->rollover = NULL; po->prot_hook.func = packet_rcv; @@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau if (sock->type == SOCK_PACKET) po->prot_hook.func = packet_rcv_spkt; -@@ -3956,6 +3959,16 @@ packet_setsockopt(struct socket *sock, i +@@ -3955,6 +3958,16 @@ packet_setsockopt(struct socket *sock, i WRITE_ONCE(po->xmit, val ? packet_direct_xmit : dev_queue_xmit); return 0; } @@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau default: return -ENOPROTOOPT; } -@@ -4012,6 +4025,13 @@ static int packet_getsockopt(struct sock +@@ -4011,6 +4024,13 @@ static int packet_getsockopt(struct sock case PACKET_VNET_HDR: val = po->has_vnet_hdr; break; diff --git a/target/linux/generic/pending-5.4/640-netfilter-nf_flow_table-add-hardware-offload-support.patch b/target/linux/generic/pending-5.4/640-netfilter-nf_flow_table-add-hardware-offload-support.patch index 2d71dddf3..386a81945 100644 --- a/target/linux/generic/pending-5.4/640-netfilter-nf_flow_table-add-hardware-offload-support.patch +++ b/target/linux/generic/pending-5.4/640-netfilter-nf_flow_table-add-hardware-offload-support.patch @@ -506,7 +506,7 @@ Signed-off-by: Pablo Neira Ayuso +MODULE_ALIAS("nf-flow-table-hw"); --- a/net/netfilter/nf_tables_api.c +++ b/net/netfilter/nf_tables_api.c -@@ -6006,6 +6006,13 @@ static int nf_tables_flowtable_parse_hoo +@@ -6045,6 +6045,13 @@ static int nf_tables_flowtable_parse_hoo if (err < 0) return err; @@ -520,7 +520,7 @@ Signed-off-by: Pablo Neira Ayuso ops = kcalloc(n, sizeof(struct nf_hook_ops), GFP_KERNEL); if (!ops) return -ENOMEM; -@@ -6150,10 +6157,19 @@ static int nf_tables_newflowtable(struct +@@ -6194,10 +6201,19 @@ static int nf_tables_newflowtable(struct } flowtable->data.type = type; @@ -540,7 +540,7 @@ Signed-off-by: Pablo Neira Ayuso err = nf_tables_flowtable_parse_hook(&ctx, nla[NFTA_FLOWTABLE_HOOK], flowtable); if (err < 0) -@@ -6279,7 +6295,8 @@ static int nf_tables_fill_flowtable_info +@@ -6323,7 +6339,8 @@ static int nf_tables_fill_flowtable_info nla_put_string(skb, NFTA_FLOWTABLE_NAME, flowtable->name) || nla_put_be32(skb, NFTA_FLOWTABLE_USE, htonl(flowtable->use)) || nla_put_be64(skb, NFTA_FLOWTABLE_HANDLE, cpu_to_be64(flowtable->handle), diff --git a/target/linux/generic/pending-5.4/655-increase_skb_pad.patch b/target/linux/generic/pending-5.4/655-increase_skb_pad.patch index 3ca190f0a..ff39ddb8b 100644 --- a/target/linux/generic/pending-5.4/655-increase_skb_pad.patch +++ b/target/linux/generic/pending-5.4/655-increase_skb_pad.patch @@ -9,7 +9,7 @@ Signed-off-by: Felix Fietkau --- a/include/linux/skbuff.h +++ b/include/linux/skbuff.h -@@ -2661,7 +2661,7 @@ static inline int pskb_network_may_pull( +@@ -2676,7 +2676,7 @@ static inline int pskb_network_may_pull( * NET_IP_ALIGN(2) + ethernet_header(14) + IP_header(20/40) + ports(8) */ #ifndef NET_SKB_PAD diff --git a/target/linux/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch index abb27cb33..e848e0072 100644 --- a/target/linux/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch +++ b/target/linux/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch @@ -110,7 +110,7 @@ Signed-off-by: Jonas Gorski return -EINVAL; --- a/net/ipv6/route.c +++ b/net/ipv6/route.c -@@ -94,6 +94,8 @@ static int ip6_pkt_discard(struct sk_bu +@@ -95,6 +95,8 @@ static int ip6_pkt_discard(struct sk_bu static int ip6_pkt_discard_out(struct net *net, struct sock *sk, struct sk_buff *skb); static int ip6_pkt_prohibit(struct sk_buff *skb); static int ip6_pkt_prohibit_out(struct net *net, struct sock *sk, struct sk_buff *skb); @@ -119,7 +119,7 @@ Signed-off-by: Jonas Gorski static void ip6_link_failure(struct sk_buff *skb); static void ip6_rt_update_pmtu(struct dst_entry *dst, struct sock *sk, struct sk_buff *skb, u32 mtu, -@@ -327,6 +329,18 @@ static const struct rt6_info ip6_prohibi +@@ -328,6 +330,18 @@ static const struct rt6_info ip6_prohibi .rt6i_flags = (RTF_REJECT | RTF_NONEXTHOP), }; @@ -138,7 +138,7 @@ Signed-off-by: Jonas Gorski static const struct rt6_info ip6_blk_hole_entry_template = { .dst = { .__refcnt = ATOMIC_INIT(1), -@@ -1048,6 +1062,7 @@ static const int fib6_prop[RTN_MAX + 1] +@@ -1049,6 +1063,7 @@ static const int fib6_prop[RTN_MAX + 1] [RTN_BLACKHOLE] = -EINVAL, [RTN_UNREACHABLE] = -EHOSTUNREACH, [RTN_PROHIBIT] = -EACCES, @@ -146,7 +146,7 @@ Signed-off-by: Jonas Gorski [RTN_THROW] = -EAGAIN, [RTN_NAT] = -EINVAL, [RTN_XRESOLVE] = -EINVAL, -@@ -1085,6 +1100,10 @@ static void ip6_rt_init_dst_reject(struc +@@ -1086,6 +1101,10 @@ static void ip6_rt_init_dst_reject(struc rt->dst.output = ip6_pkt_prohibit_out; rt->dst.input = ip6_pkt_prohibit; break; @@ -157,7 +157,7 @@ Signed-off-by: Jonas Gorski case RTN_THROW: case RTN_UNREACHABLE: default: -@@ -4454,6 +4473,17 @@ static int ip6_pkt_prohibit_out(struct n +@@ -4458,6 +4477,17 @@ static int ip6_pkt_prohibit_out(struct n return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES); } @@ -175,7 +175,7 @@ Signed-off-by: Jonas Gorski /* * Allocate a dst for local (unicast / anycast) address. */ -@@ -4941,7 +4971,8 @@ static int rtm_to_fib6_config(struct sk_ +@@ -4945,7 +4975,8 @@ static int rtm_to_fib6_config(struct sk_ if (rtm->rtm_type == RTN_UNREACHABLE || rtm->rtm_type == RTN_BLACKHOLE || rtm->rtm_type == RTN_PROHIBIT || @@ -185,7 +185,7 @@ Signed-off-by: Jonas Gorski cfg->fc_flags |= RTF_REJECT; if (rtm->rtm_type == RTN_LOCAL) -@@ -6086,6 +6117,8 @@ static int ip6_route_dev_notify(struct n +@@ -6090,6 +6121,8 @@ static int ip6_route_dev_notify(struct n #ifdef CONFIG_IPV6_MULTIPLE_TABLES net->ipv6.ip6_prohibit_entry->dst.dev = dev; net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev); @@ -194,7 +194,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_blk_hole_entry->dst.dev = dev; net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev); #endif -@@ -6097,6 +6130,7 @@ static int ip6_route_dev_notify(struct n +@@ -6101,6 +6134,7 @@ static int ip6_route_dev_notify(struct n in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev); #ifdef CONFIG_IPV6_MULTIPLE_TABLES in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev); @@ -202,7 +202,7 @@ Signed-off-by: Jonas Gorski in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev); #endif } -@@ -6289,6 +6323,8 @@ static int __net_init ip6_route_net_init +@@ -6293,6 +6327,8 @@ static int __net_init ip6_route_net_init #ifdef CONFIG_IPV6_MULTIPLE_TABLES net->ipv6.fib6_has_custom_rules = false; @@ -211,7 +211,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template, sizeof(*net->ipv6.ip6_prohibit_entry), GFP_KERNEL); -@@ -6299,11 +6335,21 @@ static int __net_init ip6_route_net_init +@@ -6303,11 +6339,21 @@ static int __net_init ip6_route_net_init ip6_template_metrics, true); INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached); @@ -234,7 +234,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops; dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst, ip6_template_metrics, true); -@@ -6327,6 +6373,8 @@ out: +@@ -6331,6 +6377,8 @@ out: return ret; #ifdef CONFIG_IPV6_MULTIPLE_TABLES @@ -243,7 +243,7 @@ Signed-off-by: Jonas Gorski out_ip6_prohibit_entry: kfree(net->ipv6.ip6_prohibit_entry); out_ip6_null_entry: -@@ -6346,6 +6394,7 @@ static void __net_exit ip6_route_net_exi +@@ -6350,6 +6398,7 @@ static void __net_exit ip6_route_net_exi kfree(net->ipv6.ip6_null_entry); #ifdef CONFIG_IPV6_MULTIPLE_TABLES kfree(net->ipv6.ip6_prohibit_entry); @@ -251,7 +251,7 @@ Signed-off-by: Jonas Gorski kfree(net->ipv6.ip6_blk_hole_entry); #endif dst_entries_destroy(&net->ipv6.ip6_dst_ops); -@@ -6429,6 +6478,9 @@ void __init ip6_route_init_special_entri +@@ -6433,6 +6482,9 @@ void __init ip6_route_init_special_entri init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev; init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); diff --git a/target/linux/generic/pending-5.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch b/target/linux/generic/pending-5.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch index 6f7edc161..6fe3df256 100644 --- a/target/linux/generic/pending-5.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch +++ b/target/linux/generic/pending-5.4/680-NET-skip-GRO-for-foreign-MAC-addresses.patch @@ -136,14 +136,13 @@ Signed-off-by: Felix Fietkau /** * eth_type_trans - determine the packet's protocol ID. * @skb: received socket data -@@ -174,6 +186,10 @@ __be16 eth_type_trans(struct sk_buff *sk - } else { - skb->pkt_type = PACKET_OTHERHOST; - } -+ -+ if (eth_check_local_mask(eth->h_dest, dev->dev_addr, -+ dev->local_addr_mask)) -+ skb->gro_skip = 1; - } +@@ -166,6 +178,9 @@ __be16 eth_type_trans(struct sk_buff *sk + eth_skb_pkt_type(skb, dev); + ++ if (eth_check_local_mask(eth->h_dest, dev->dev_addr, ++ dev->local_addr_mask)) ++ skb->gro_skip = 1; /* + * Some variants of DSA tagging don't have an ethertype field + * at all, so we check here whether one of those tagging diff --git a/target/linux/generic/pending-5.4/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch b/target/linux/generic/pending-5.4/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch index 4d6e0f99d..93c414b63 100644 --- a/target/linux/generic/pending-5.4/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch +++ b/target/linux/generic/pending-5.4/768-net-dsa-mv88e6xxx-Request-assisted-learning-on-CPU-port.patch @@ -17,7 +17,7 @@ Signed-off-by: Tobias Waldekranz --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c -@@ -5098,6 +5098,7 @@ static int mv88e6xxx_register_switch(str +@@ -5123,6 +5123,7 @@ static int mv88e6xxx_register_switch(str ds->ops = &mv88e6xxx_switch_ops; ds->ageing_time_min = chip->info->age_time_coeff; ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX; diff --git a/target/linux/generic/pending-6.1/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch b/target/linux/generic/pending-6.1/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch index 0ebfa4bbd..77a94dae8 100644 --- a/target/linux/generic/pending-6.1/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch +++ b/target/linux/generic/pending-6.1/702-net-ethernet-mtk_eth_soc-enable-threaded-NAPI.patch @@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -4722,6 +4722,8 @@ static int mtk_probe(struct platform_dev +@@ -4939,6 +4939,8 @@ static int mtk_probe(struct platform_dev * for NAPI to work */ init_dummy_netdev(ð->dummy_dev); diff --git a/target/linux/generic/pending-6.1/703-phy-add-detach-callback-to-struct-phy_driver.patch b/target/linux/generic/pending-6.1/703-phy-add-detach-callback-to-struct-phy_driver.patch index 48b1afe3f..8d2803158 100644 --- a/target/linux/generic/pending-6.1/703-phy-add-detach-callback-to-struct-phy_driver.patch +++ b/target/linux/generic/pending-6.1/703-phy-add-detach-callback-to-struct-phy_driver.patch @@ -11,7 +11,7 @@ Signed-off-by: Gabor Juhos --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c -@@ -1750,6 +1750,9 @@ void phy_detach(struct phy_device *phyde +@@ -1753,6 +1753,9 @@ void phy_detach(struct phy_device *phyde struct module *ndev_owner = NULL; struct mii_bus *bus; @@ -23,7 +23,7 @@ Signed-off-by: Gabor Juhos sysfs_remove_link(&dev->dev.kobj, "phydev"); --- a/include/linux/phy.h +++ b/include/linux/phy.h -@@ -858,6 +858,12 @@ struct phy_driver { +@@ -878,6 +878,12 @@ struct phy_driver { /** @handle_interrupt: Override default interrupt handling */ irqreturn_t (*handle_interrupt)(struct phy_device *phydev); diff --git a/target/linux/generic/pending-6.1/732-00-net-ethernet-mtk_eth_soc-compile-out-netsys-v2-code-.patch b/target/linux/generic/pending-6.1/732-00-net-ethernet-mtk_eth_soc-compile-out-netsys-v2-code-.patch new file mode 100644 index 000000000..decf647bc --- /dev/null +++ b/target/linux/generic/pending-6.1/732-00-net-ethernet-mtk_eth_soc-compile-out-netsys-v2-code-.patch @@ -0,0 +1,44 @@ +From: Felix Fietkau +Date: Thu, 27 Oct 2022 23:39:52 +0200 +Subject: [PATCH] net: ethernet: mtk_eth_soc: compile out netsys v2 code + on mt7621 + +Avoid some branches in the hot path on low-end devices with limited CPU power, +and reduce code size + +Signed-off-by: Felix Fietkau +--- + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -1326,6 +1326,22 @@ struct mtk_mac { + /* the struct describing the SoC. these are declared in the soc_xyz.c files */ + extern const struct of_device_id of_mtk_match[]; + ++#ifdef CONFIG_SOC_MT7621 ++static inline bool mtk_is_netsys_v1(struct mtk_eth *eth) ++{ ++ return true; ++} ++ ++static inline bool mtk_is_netsys_v2_or_greater(struct mtk_eth *eth) ++{ ++ return false; ++} ++ ++static inline bool mtk_is_netsys_v3_or_greater(struct mtk_eth *eth) ++{ ++ return false; ++} ++#else + static inline bool mtk_is_netsys_v1(struct mtk_eth *eth) + { + return eth->soc->version == 1; +@@ -1340,6 +1356,7 @@ static inline bool mtk_is_netsys_v3_or_g + { + return eth->soc->version > 2; + } ++#endif + + static inline struct mtk_foe_entry * + mtk_foe_get_entry(struct mtk_ppe *ppe, u16 hash) diff --git a/target/linux/generic/pending-6.1/732-01-net-ethernet-mtk_eth_soc-work-around-issue-with-send.patch b/target/linux/generic/pending-6.1/732-01-net-ethernet-mtk_eth_soc-work-around-issue-with-send.patch index 9c162aab5..600109a95 100644 --- a/target/linux/generic/pending-6.1/732-01-net-ethernet-mtk_eth_soc-work-around-issue-with-send.patch +++ b/target/linux/generic/pending-6.1/732-01-net-ethernet-mtk_eth_soc-work-around-issue-with-send.patch @@ -16,7 +16,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -1468,12 +1468,28 @@ static void mtk_wake_queue(struct mtk_et +@@ -1561,12 +1561,28 @@ static void mtk_wake_queue(struct mtk_et } } @@ -45,11 +45,11 @@ Signed-off-by: Felix Fietkau bool gso = false; int tx_num; -@@ -1495,6 +1511,18 @@ static netdev_tx_t mtk_start_xmit(struct +@@ -1588,6 +1604,18 @@ static netdev_tx_t mtk_start_xmit(struct return NETDEV_TX_BUSY; } -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) && ++ if (mtk_is_netsys_v1(eth) && + skb_is_gso(skb) && mtk_skb_has_small_frag(skb)) { + segs = skb_gso_segment(skb, dev->features & ~NETIF_F_ALL_TSO); + if (IS_ERR(segs)) @@ -64,14 +64,14 @@ Signed-off-by: Felix Fietkau /* TSO: fill MSS info in tcp checksum field */ if (skb_is_gso(skb)) { if (skb_cow_head(skb, 0)) { -@@ -1510,8 +1538,14 @@ static netdev_tx_t mtk_start_xmit(struct +@@ -1603,8 +1631,14 @@ static netdev_tx_t mtk_start_xmit(struct } } - if (mtk_tx_map(skb, dev, tx_num, ring, gso) < 0) - goto drop; + skb_list_walk_safe(skb, skb, next) { -+ if ((!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) && ++ if ((mtk_is_netsys_v1(eth) && + mtk_skb_has_small_frag(skb) && skb_linearize(skb)) || + mtk_tx_map(skb, dev, tx_num, ring, gso) < 0) { + stats->tx_dropped++; @@ -83,7 +83,7 @@ Signed-off-by: Felix Fietkau netif_tx_stop_all_queues(dev); --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -258,7 +258,7 @@ +@@ -268,7 +268,7 @@ #define MTK_CHK_DDONE_EN BIT(28) #define MTK_DMAD_WR_WDONE BIT(26) #define MTK_WCOMP_EN BIT(24) diff --git a/target/linux/generic/pending-6.1/732-02-net-ethernet-mtk_eth_soc-set-NETIF_F_ALL_TSO.patch b/target/linux/generic/pending-6.1/732-02-net-ethernet-mtk_eth_soc-set-NETIF_F_ALL_TSO.patch index 3c6359ee4..11a81dd0b 100644 --- a/target/linux/generic/pending-6.1/732-02-net-ethernet-mtk_eth_soc-set-NETIF_F_ALL_TSO.patch +++ b/target/linux/generic/pending-6.1/732-02-net-ethernet-mtk_eth_soc-set-NETIF_F_ALL_TSO.patch @@ -9,7 +9,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -48,8 +48,7 @@ +@@ -47,8 +47,7 @@ #define MTK_HW_FEATURES (NETIF_F_IP_CSUM | \ NETIF_F_RXCSUM | \ NETIF_F_HW_VLAN_CTAG_TX | \ diff --git a/target/linux/generic/pending-6.1/732-03-net-ethernet-mtk_eth_soc-fix-remaining-throughput-re.patch b/target/linux/generic/pending-6.1/732-03-net-ethernet-mtk_eth_soc-fix-remaining-throughput-re.patch index 3d11da2be..1a3f56e94 100644 --- a/target/linux/generic/pending-6.1/732-03-net-ethernet-mtk_eth_soc-fix-remaining-throughput-re.patch +++ b/target/linux/generic/pending-6.1/732-03-net-ethernet-mtk_eth_soc-fix-remaining-throughput-re.patch @@ -22,7 +22,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -709,6 +709,7 @@ static void mtk_mac_link_up(struct phyli +@@ -765,6 +765,7 @@ static void mtk_mac_link_up(struct phyli MAC_MCR_FORCE_RX_FC); /* Configure speed */ @@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau switch (speed) { case SPEED_2500: case SPEED_1000: -@@ -3203,6 +3204,9 @@ found: +@@ -3346,6 +3347,9 @@ found: if (dp->index >= MTK_QDMA_NUM_QUEUES) return NOTIFY_DONE; diff --git a/target/linux/generic/pending-6.1/734-net-ethernet-mtk_eth_soc-ppe-fix-L2-offloading-with-.patch b/target/linux/generic/pending-6.1/734-net-ethernet-mtk_eth_soc-ppe-fix-L2-offloading-with-.patch index dc2163959..72d574340 100644 --- a/target/linux/generic/pending-6.1/734-net-ethernet-mtk_eth_soc-ppe-fix-L2-offloading-with-.patch +++ b/target/linux/generic/pending-6.1/734-net-ethernet-mtk_eth_soc-ppe-fix-L2-offloading-with-.patch @@ -20,7 +20,7 @@ Signed-off-by: Felix Fietkau #include #include "mtk_eth_soc.h" #include "mtk_ppe.h" -@@ -752,7 +753,9 @@ void __mtk_ppe_check_skb(struct mtk_ppe +@@ -775,7 +776,9 @@ void __mtk_ppe_check_skb(struct mtk_ppe skb->dev->dsa_ptr->tag_ops->proto != DSA_TAG_PROTO_MTK) goto out; diff --git a/target/linux/generic/pending-6.1/736-01-net-ethernet-mtk_eth_soc-add-code-for-offloading-flo.patch b/target/linux/generic/pending-6.1/736-01-net-ethernet-mtk_eth_soc-add-code-for-offloading-flo.patch index c5654a606..c29c63bb1 100644 --- a/target/linux/generic/pending-6.1/736-01-net-ethernet-mtk_eth_soc-add-code-for-offloading-flo.patch +++ b/target/linux/generic/pending-6.1/736-01-net-ethernet-mtk_eth_soc-add-code-for-offloading-flo.patch @@ -11,10 +11,15 @@ PPE device. Signed-off-by: Felix Fietkau --- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 3 + + .../net/ethernet/mediatek/mtk_ppe_offload.c | 37 ++++--- + drivers/net/ethernet/mediatek/mtk_wed.c | 101 ++++++++++++++++++ + include/linux/soc/mediatek/mtk_wed.h | 6 ++ + 4 files changed, 133 insertions(+), 14 deletions(-) --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -1280,6 +1280,9 @@ int mtk_gmac_rgmii_path_setup(struct mtk +@@ -1451,6 +1451,9 @@ int mtk_gmac_rgmii_path_setup(struct mtk int mtk_eth_offload_init(struct mtk_eth *eth); int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type, void *type_data); @@ -120,7 +125,7 @@ Signed-off-by: Felix Fietkau static void wed_m32(struct mtk_wed_device *dev, u32 reg, u32 mask, u32 val) { -@@ -1745,6 +1752,99 @@ out: +@@ -1753,6 +1760,99 @@ out: mutex_unlock(&hw_lock); } @@ -220,7 +225,7 @@ Signed-off-by: Felix Fietkau void mtk_wed_add_hw(struct device_node *np, struct mtk_eth *eth, void __iomem *wdma, phys_addr_t wdma_phy, int index) -@@ -1764,6 +1864,7 @@ void mtk_wed_add_hw(struct device_node * +@@ -1772,6 +1872,7 @@ void mtk_wed_add_hw(struct device_node * .irq_set_mask = mtk_wed_irq_set_mask, .detach = mtk_wed_detach, .ppe_check = mtk_wed_ppe_check, diff --git a/target/linux/generic/pending-6.1/736-02-net-ethernet-mediatek-mtk_ppe-prefer-newly-added-l2-.patch b/target/linux/generic/pending-6.1/736-02-net-ethernet-mediatek-mtk_ppe-prefer-newly-added-l2-.patch index 08036e0b1..74cb562a5 100644 --- a/target/linux/generic/pending-6.1/736-02-net-ethernet-mediatek-mtk_ppe-prefer-newly-added-l2-.patch +++ b/target/linux/generic/pending-6.1/736-02-net-ethernet-mediatek-mtk_ppe-prefer-newly-added-l2-.patch @@ -12,7 +12,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/ethernet/mediatek/mtk_ppe.c +++ b/drivers/net/ethernet/mediatek/mtk_ppe.c -@@ -634,10 +634,20 @@ void mtk_foe_entry_clear(struct mtk_ppe +@@ -657,10 +657,20 @@ void mtk_foe_entry_clear(struct mtk_ppe static int mtk_foe_entry_commit_l2(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) { diff --git a/target/linux/generic/pending-6.1/736-03-net-ethernet-mtk_eth_soc-improve-keeping-track-of-of.patch b/target/linux/generic/pending-6.1/736-03-net-ethernet-mtk_eth_soc-improve-keeping-track-of-of.patch index ec04fb354..ecdb345d6 100644 --- a/target/linux/generic/pending-6.1/736-03-net-ethernet-mtk_eth_soc-improve-keeping-track-of-of.patch +++ b/target/linux/generic/pending-6.1/736-03-net-ethernet-mtk_eth_soc-improve-keeping-track-of-of.patch @@ -9,10 +9,13 @@ flow accounting support. Signed-off-by: Felix Fietkau --- + drivers/net/ethernet/mediatek/mtk_ppe.c | 162 ++++++++++++------------ + drivers/net/ethernet/mediatek/mtk_ppe.h | 15 +-- + 2 files changed, 86 insertions(+), 91 deletions(-) --- a/drivers/net/ethernet/mediatek/mtk_ppe.c +++ b/drivers/net/ethernet/mediatek/mtk_ppe.c -@@ -460,42 +460,43 @@ int mtk_foe_entry_set_queue(struct mtk_e +@@ -477,42 +477,43 @@ int mtk_foe_entry_set_queue(struct mtk_e return 0; } @@ -72,7 +75,7 @@ Signed-off-by: Felix Fietkau struct mtk_foe_entry *hwe = mtk_foe_get_entry(ppe, entry->hash); hwe->ib1 &= ~MTK_FOE_IB1_STATE; -@@ -515,7 +516,8 @@ __mtk_foe_entry_clear(struct mtk_ppe *pp +@@ -532,7 +533,8 @@ __mtk_foe_entry_clear(struct mtk_ppe *pp if (entry->type != MTK_FLOW_TYPE_L2_SUBFLOW) return; @@ -82,7 +85,7 @@ Signed-off-by: Felix Fietkau kfree(entry); } -@@ -531,66 +533,55 @@ static int __mtk_foe_entry_idle_time(str +@@ -548,66 +550,55 @@ static int __mtk_foe_entry_idle_time(str return now - timestamp; } @@ -178,7 +181,7 @@ Signed-off-by: Felix Fietkau } static void -@@ -627,7 +618,8 @@ __mtk_foe_entry_commit(struct mtk_ppe *p +@@ -650,7 +641,8 @@ __mtk_foe_entry_commit(struct mtk_ppe *p void mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) { spin_lock_bh(&ppe_lock); @@ -188,7 +191,7 @@ Signed-off-by: Felix Fietkau spin_unlock_bh(&ppe_lock); } -@@ -674,8 +666,8 @@ mtk_foe_entry_commit_subflow(struct mtk_ +@@ -697,8 +689,8 @@ mtk_foe_entry_commit_subflow(struct mtk_ { const struct mtk_soc_data *soc = ppe->eth->soc; struct mtk_flow_entry *flow_info; @@ -198,7 +201,7 @@ Signed-off-by: Felix Fietkau u32 ib1_mask = mtk_get_ib1_pkt_type_mask(ppe->eth) | MTK_FOE_IB1_UDP; int type; -@@ -683,30 +675,30 @@ mtk_foe_entry_commit_subflow(struct mtk_ +@@ -706,30 +698,30 @@ mtk_foe_entry_commit_subflow(struct mtk_ if (!flow_info) return; @@ -239,7 +242,7 @@ Signed-off-by: Felix Fietkau } void __mtk_ppe_check_skb(struct mtk_ppe *ppe, struct sk_buff *skb, u16 hash) -@@ -716,9 +708,11 @@ void __mtk_ppe_check_skb(struct mtk_ppe +@@ -739,9 +731,11 @@ void __mtk_ppe_check_skb(struct mtk_ppe struct mtk_foe_entry *hwe = mtk_foe_get_entry(ppe, hash); struct mtk_flow_entry *entry; struct mtk_foe_bridge key = {}; @@ -251,7 +254,7 @@ Signed-off-by: Felix Fietkau u8 *tag; spin_lock_bh(&ppe_lock); -@@ -726,20 +720,14 @@ void __mtk_ppe_check_skb(struct mtk_ppe +@@ -749,20 +743,14 @@ void __mtk_ppe_check_skb(struct mtk_ppe if (FIELD_GET(MTK_FOE_IB1_STATE, hwe->ib1) == MTK_FOE_STATE_BIND) goto out; @@ -278,7 +281,7 @@ Signed-off-by: Felix Fietkau continue; } -@@ -790,9 +778,17 @@ out: +@@ -813,9 +801,17 @@ out: int mtk_foe_entry_idle_time(struct mtk_ppe *ppe, struct mtk_flow_entry *entry) { @@ -300,7 +303,7 @@ Signed-off-by: Felix Fietkau int mtk_ppe_prepare_reset(struct mtk_ppe *ppe) --- a/drivers/net/ethernet/mediatek/mtk_ppe.h +++ b/drivers/net/ethernet/mediatek/mtk_ppe.h -@@ -265,7 +265,12 @@ enum { +@@ -286,7 +286,12 @@ enum { struct mtk_flow_entry { union { @@ -314,7 +317,7 @@ Signed-off-by: Felix Fietkau struct { struct rhash_head l2_node; struct hlist_head l2_flows; -@@ -275,13 +280,7 @@ struct mtk_flow_entry { +@@ -296,13 +301,7 @@ struct mtk_flow_entry { s8 wed_index; u8 ppe_index; u16 hash; diff --git a/target/linux/generic/pending-6.1/736-04-net-ethernet-mediatek-fix-ppe-flow-accounting-for-L2.patch b/target/linux/generic/pending-6.1/736-04-net-ethernet-mediatek-fix-ppe-flow-accounting-for-L2.patch index 79386d6cf..e323baeb1 100644 --- a/target/linux/generic/pending-6.1/736-04-net-ethernet-mediatek-fix-ppe-flow-accounting-for-L2.patch +++ b/target/linux/generic/pending-6.1/736-04-net-ethernet-mediatek-fix-ppe-flow-accounting-for-L2.patch @@ -27,7 +27,7 @@ Signed-off-by: Felix Fietkau if (ret) dev_err(ppe->dev, "MIB table busy"); -@@ -90,18 +90,32 @@ static int mtk_ppe_mib_wait_busy(struct +@@ -90,17 +90,31 @@ static int mtk_ppe_mib_wait_busy(struct return ret; } @@ -43,7 +43,6 @@ Signed-off-by: Felix Fietkau + +struct mtk_foe_accounting *mtk_ppe_mib_entry_read(struct mtk_ppe *ppe, u16 index) { - u32 byte_cnt_low, byte_cnt_high, pkt_cnt_low, pkt_cnt_high; u32 val, cnt_r0, cnt_r1, cnt_r2; + struct mtk_foe_accounting *acct; int ret; @@ -62,22 +61,32 @@ Signed-off-by: Felix Fietkau cnt_r0 = readl(ppe->base + MTK_PPE_MIB_SER_R0); cnt_r1 = readl(ppe->base + MTK_PPE_MIB_SER_R1); -@@ -111,10 +125,11 @@ static int mtk_mib_entry_read(struct mtk - byte_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R1_BYTE_CNT_HIGH, cnt_r1); - pkt_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R1_PKT_CNT_LOW, cnt_r1); - pkt_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R2_PKT_CNT_HIGH, cnt_r2); -- *bytes = ((u64)byte_cnt_high << 32) | byte_cnt_low; -- *packets = (pkt_cnt_high << 16) | pkt_cnt_low; +@@ -109,19 +123,19 @@ static int mtk_mib_entry_read(struct mtk + if (mtk_is_netsys_v3_or_greater(ppe->eth)) { + /* 64 bit for each counter */ + u32 cnt_r3 = readl(ppe->base + MTK_PPE_MIB_SER_R3); +- *bytes = ((u64)cnt_r1 << 32) | cnt_r0; +- *packets = ((u64)cnt_r3 << 32) | cnt_r2; ++ acct->bytes += ((u64)cnt_r1 << 32) | cnt_r0; ++ acct->packets += ((u64)cnt_r3 << 32) | cnt_r2; + } else { + /* 48 bit byte counter, 40 bit packet counter */ + u32 byte_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R0_BYTE_CNT_LOW, cnt_r0); + u32 byte_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R1_BYTE_CNT_HIGH, cnt_r1); + u32 pkt_cnt_low = FIELD_GET(MTK_PPE_MIB_SER_R1_PKT_CNT_LOW, cnt_r1); + u32 pkt_cnt_high = FIELD_GET(MTK_PPE_MIB_SER_R2_PKT_CNT_HIGH, cnt_r2); +- *bytes = ((u64)byte_cnt_high << 32) | byte_cnt_low; +- *packets = (pkt_cnt_high << 16) | pkt_cnt_low; ++ acct->bytes += ((u64)byte_cnt_high << 32) | byte_cnt_low; ++ acct->packets += (pkt_cnt_high << 16) | pkt_cnt_low; + } - return 0; -+ acct->bytes += ((u64)byte_cnt_high << 32) | byte_cnt_low; -+ acct->packets += (pkt_cnt_high << 16) | pkt_cnt_low; -+ + return acct; } static void mtk_ppe_cache_clear(struct mtk_ppe *ppe) -@@ -503,13 +518,6 @@ __mtk_foe_entry_clear(struct mtk_ppe *pp +@@ -520,13 +534,6 @@ __mtk_foe_entry_clear(struct mtk_ppe *pp hwe->ib1 |= FIELD_PREP(MTK_FOE_IB1_STATE, MTK_FOE_STATE_INVALID); dma_wmb(); mtk_ppe_cache_clear(ppe); @@ -91,7 +100,7 @@ Signed-off-by: Felix Fietkau } entry->hash = 0xffff; -@@ -534,11 +542,14 @@ static int __mtk_foe_entry_idle_time(str +@@ -551,11 +558,14 @@ static int __mtk_foe_entry_idle_time(str } static bool @@ -107,7 +116,7 @@ Signed-off-by: Felix Fietkau int len; if (hash == 0xffff) -@@ -549,18 +560,35 @@ mtk_flow_entry_update(struct mtk_ppe *pp +@@ -566,18 +576,35 @@ mtk_flow_entry_update(struct mtk_ppe *pp memcpy(&foe, hwe, len); if (!mtk_flow_entry_match(ppe->eth, entry, &foe, len) || @@ -146,7 +155,7 @@ Signed-off-by: Felix Fietkau struct mtk_flow_entry *cur; struct hlist_node *tmp; int idle; -@@ -569,7 +597,9 @@ mtk_flow_entry_update_l2(struct mtk_ppe +@@ -586,7 +613,9 @@ mtk_flow_entry_update_l2(struct mtk_ppe hlist_for_each_entry_safe(cur, tmp, &entry->l2_flows, l2_list) { int cur_idle; @@ -157,7 +166,7 @@ Signed-off-by: Felix Fietkau __mtk_foe_entry_clear(ppe, entry, false); continue; } -@@ -584,10 +614,29 @@ mtk_flow_entry_update_l2(struct mtk_ppe +@@ -601,10 +630,29 @@ mtk_flow_entry_update_l2(struct mtk_ppe } } @@ -187,7 +196,7 @@ Signed-off-by: Felix Fietkau struct mtk_eth *eth = ppe->eth; u16 timestamp = mtk_eth_timestamp(eth); struct mtk_foe_entry *hwe; -@@ -612,6 +661,12 @@ __mtk_foe_entry_commit(struct mtk_ppe *p +@@ -635,6 +683,12 @@ __mtk_foe_entry_commit(struct mtk_ppe *p dma_wmb(); @@ -200,7 +209,7 @@ Signed-off-by: Felix Fietkau mtk_ppe_cache_clear(ppe); } -@@ -776,21 +831,6 @@ out: +@@ -799,21 +853,6 @@ out: spin_unlock_bh(&ppe_lock); } @@ -222,7 +231,7 @@ Signed-off-by: Felix Fietkau int mtk_ppe_prepare_reset(struct mtk_ppe *ppe) { if (!ppe) -@@ -818,32 +858,6 @@ int mtk_ppe_prepare_reset(struct mtk_ppe +@@ -841,32 +880,6 @@ int mtk_ppe_prepare_reset(struct mtk_ppe return mtk_ppe_wait_busy(ppe); } @@ -257,7 +266,7 @@ Signed-off-by: Felix Fietkau bool accounting = eth->soc->has_accounting; --- a/drivers/net/ethernet/mediatek/mtk_ppe.h +++ b/drivers/net/ethernet/mediatek/mtk_ppe.h -@@ -283,6 +283,8 @@ struct mtk_flow_entry { +@@ -304,6 +304,8 @@ struct mtk_flow_entry { struct mtk_foe_entry data; struct rhash_head node; unsigned long cookie; @@ -266,7 +275,7 @@ Signed-off-by: Felix Fietkau }; struct mtk_mib_entry { -@@ -326,6 +328,7 @@ void mtk_ppe_deinit(struct mtk_eth *eth) +@@ -348,6 +350,7 @@ void mtk_ppe_deinit(struct mtk_eth *eth) void mtk_ppe_start(struct mtk_ppe *ppe); int mtk_ppe_stop(struct mtk_ppe *ppe); int mtk_ppe_prepare_reset(struct mtk_ppe *ppe); @@ -274,7 +283,7 @@ Signed-off-by: Felix Fietkau void __mtk_ppe_check_skb(struct mtk_ppe *ppe, struct sk_buff *skb, u16 hash); -@@ -374,9 +377,8 @@ int mtk_foe_entry_set_queue(struct mtk_e +@@ -396,9 +399,8 @@ int mtk_foe_entry_set_queue(struct mtk_e unsigned int queue); int mtk_foe_entry_commit(struct mtk_ppe *ppe, struct mtk_flow_entry *entry); void mtk_foe_entry_clear(struct mtk_ppe *ppe, struct mtk_flow_entry *entry); @@ -295,7 +304,7 @@ Signed-off-by: Felix Fietkau - acct = mtk_foe_entry_get_mib(ppe, i, NULL); + acct = mtk_ppe_mib_entry_read(ppe, i); - type = FIELD_GET(MTK_FOE_IB1_PACKET_TYPE, entry->ib1); + type = mtk_get_ib1_pkt_type(ppe->eth, entry->ib1); seq_printf(m, "%05x %s %7s", i, --- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c +++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c diff --git a/target/linux/generic/pending-6.1/737-01-net-ethernet-mtk_eth_soc-add-MTK_NETSYS_V1-capabilit.patch b/target/linux/generic/pending-6.1/737-01-net-ethernet-mtk_eth_soc-add-MTK_NETSYS_V1-capabilit.patch deleted file mode 100644 index 4eee1b367..000000000 --- a/target/linux/generic/pending-6.1/737-01-net-ethernet-mtk_eth_soc-add-MTK_NETSYS_V1-capabilit.patch +++ /dev/null @@ -1,223 +0,0 @@ -From 663fa1b7e0cb2c929008482014a70c6625caad75 Mon Sep 17 00:00:00 2001 -From: Lorenzo Bianconi -Date: Tue, 7 Mar 2023 15:55:13 +0000 -Subject: [PATCH 1/7] net: ethernet: mtk_eth_soc: add MTK_NETSYS_V1 capability - bit - -Introduce MTK_NETSYS_V1 bit in the device capabilities for -MT7621/MT7622/MT7623/MT7628/MT7629 SoCs. -Use !MTK_NETSYS_V1 instead of MTK_NETSYS_V2 in the driver codebase. -This is a preliminary patch to introduce support for MT7988 SoC. - -Signed-off-by: Lorenzo Bianconi -Signed-off-by: Daniel Golle ---- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 30 +++++++------- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 45 ++++++++++++--------- - 2 files changed, 41 insertions(+), 34 deletions(-) - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -639,7 +639,7 @@ static void mtk_set_queue_speed(struct m - FIELD_PREP(MTK_QTX_SCH_MIN_RATE_MAN, 1) | - FIELD_PREP(MTK_QTX_SCH_MIN_RATE_EXP, 4) | - MTK_QTX_SCH_LEAKY_BUCKET_SIZE; -- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) - val |= MTK_QTX_SCH_LEAKY_BUCKET_EN; - - if (IS_ENABLED(CONFIG_SOC_MT7621)) { -@@ -1017,7 +1017,7 @@ static bool mtk_rx_get_desc(struct mtk_e - rxd->rxd1 = READ_ONCE(dma_rxd->rxd1); - rxd->rxd3 = READ_ONCE(dma_rxd->rxd3); - rxd->rxd4 = READ_ONCE(dma_rxd->rxd4); -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) { - rxd->rxd5 = READ_ONCE(dma_rxd->rxd5); - rxd->rxd6 = READ_ONCE(dma_rxd->rxd6); - } -@@ -1075,7 +1075,7 @@ static int mtk_init_fq_dma(struct mtk_et - - txd->txd3 = TX_DMA_PLEN0(MTK_QDMA_PAGE_SIZE); - txd->txd4 = 0; -- if (MTK_HAS_CAPS(soc->caps, MTK_NETSYS_V2)) { -+ if (!MTK_HAS_CAPS(soc->caps, MTK_NETSYS_V1)) { - txd->txd5 = 0; - txd->txd6 = 0; - txd->txd7 = 0; -@@ -1266,7 +1266,7 @@ static void mtk_tx_set_dma_desc(struct n - struct mtk_mac *mac = netdev_priv(dev); - struct mtk_eth *eth = mac->hw; - -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) - mtk_tx_set_dma_desc_v2(dev, txd, info); - else - mtk_tx_set_dma_desc_v1(dev, txd, info); -@@ -1949,7 +1949,7 @@ static int mtk_poll_rx(struct napi_struc - break; - - /* find out which mac the packet come from. values start at 1 */ -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) - mac = RX_DMA_GET_SPORT_V2(trxd.rxd5) - 1; - else if (!MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628) && - !(trxd.rxd4 & RX_DMA_SPECIAL_TAG)) -@@ -2045,7 +2045,7 @@ static int mtk_poll_rx(struct napi_struc - skb->dev = netdev; - bytes += skb->len; - -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) { - reason = FIELD_GET(MTK_RXD5_PPE_CPU_REASON, trxd.rxd5); - hash = trxd.rxd5 & MTK_RXD5_FOE_ENTRY; - if (hash != MTK_RXD5_FOE_ENTRY) -@@ -2070,7 +2070,7 @@ static int mtk_poll_rx(struct napi_struc - /* When using VLAN untagging in combination with DSA, the - * hardware treats the MTK special tag as a VLAN and untags it. - */ -- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2) && -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1) && - (trxd.rxd2 & RX_DMA_VTAG) && netdev_uses_dsa(netdev)) { - unsigned int port = RX_DMA_VPID(trxd.rxd3) & GENMASK(2, 0); - -@@ -2381,7 +2381,7 @@ static int mtk_tx_alloc(struct mtk_eth * - txd->txd2 = next_ptr; - txd->txd3 = TX_DMA_LS0 | TX_DMA_OWNER_CPU; - txd->txd4 = 0; -- if (MTK_HAS_CAPS(soc->caps, MTK_NETSYS_V2)) { -+ if (!MTK_HAS_CAPS(soc->caps, MTK_NETSYS_V1)) { - txd->txd5 = 0; - txd->txd6 = 0; - txd->txd7 = 0; -@@ -2434,7 +2434,7 @@ static int mtk_tx_alloc(struct mtk_eth * - FIELD_PREP(MTK_QTX_SCH_MIN_RATE_MAN, 1) | - FIELD_PREP(MTK_QTX_SCH_MIN_RATE_EXP, 4) | - MTK_QTX_SCH_LEAKY_BUCKET_SIZE; -- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) - val |= MTK_QTX_SCH_LEAKY_BUCKET_EN; - mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); - ofs += MTK_QTX_OFFSET; -@@ -2570,7 +2570,7 @@ static int mtk_rx_alloc(struct mtk_eth * - - rxd->rxd3 = 0; - rxd->rxd4 = 0; -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) { - rxd->rxd5 = 0; - rxd->rxd6 = 0; - rxd->rxd7 = 0; -@@ -3121,7 +3121,7 @@ static int mtk_start_dma(struct mtk_eth - MTK_TX_BT_32DWORDS | MTK_NDP_CO_PRO | - MTK_RX_2B_OFFSET | MTK_TX_WB_DDONE; - -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) - val |= MTK_MUTLI_CNT | MTK_RESV_BUF | - MTK_WCOMP_EN | MTK_DMAD_WR_WDONE | - MTK_CHK_DDONE_EN | MTK_LEAKY_BUCKET_EN; -@@ -3531,7 +3531,7 @@ static void mtk_hw_reset(struct mtk_eth - { - u32 val; - -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) { - regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, 0); - val = RSTCTRL_PPE0_V2; - } else { -@@ -3543,7 +3543,7 @@ static void mtk_hw_reset(struct mtk_eth - - ethsys_reset(eth, RSTCTRL_ETH | RSTCTRL_FE | val); - -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) - regmap_write(eth->ethsys, ETHSYS_FE_RST_CHK_IDLE_EN, - 0x3ffffff); - } -@@ -3739,7 +3739,7 @@ static int mtk_hw_init(struct mtk_eth *e - else - mtk_hw_reset(eth); - -- if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { -+ if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) { - /* Set FE to PDMAv2 if necessary */ - val = mtk_r32(eth, MTK_FE_GLO_MISC); - mtk_w32(eth, val | BIT(4), MTK_FE_GLO_MISC); -@@ -3776,7 +3776,7 @@ static int mtk_hw_init(struct mtk_eth *e - */ - val = mtk_r32(eth, MTK_CDMQ_IG_CTRL); - mtk_w32(eth, val | MTK_CDMQ_STAG_EN, MTK_CDMQ_IG_CTRL); -- if (!MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V2)) { -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V1)) { - val = mtk_r32(eth, MTK_CDMP_IG_CTRL); - mtk_w32(eth, val | MTK_CDMP_STAG_EN, MTK_CDMP_IG_CTRL); - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -819,6 +819,7 @@ enum mkt_eth_capabilities { - MTK_SHARED_INT_BIT, - MTK_TRGMII_MT7621_CLK_BIT, - MTK_QDMA_BIT, -+ MTK_NETSYS_V1_BIT, - MTK_NETSYS_V2_BIT, - MTK_SOC_MT7628_BIT, - MTK_RSTCTRL_PPE1_BIT, -@@ -854,6 +855,7 @@ enum mkt_eth_capabilities { - #define MTK_SHARED_INT BIT(MTK_SHARED_INT_BIT) - #define MTK_TRGMII_MT7621_CLK BIT(MTK_TRGMII_MT7621_CLK_BIT) - #define MTK_QDMA BIT(MTK_QDMA_BIT) -+#define MTK_NETSYS_V1 BIT(MTK_NETSYS_V1_BIT) - #define MTK_NETSYS_V2 BIT(MTK_NETSYS_V2_BIT) - #define MTK_SOC_MT7628 BIT(MTK_SOC_MT7628_BIT) - #define MTK_RSTCTRL_PPE1 BIT(MTK_RSTCTRL_PPE1_BIT) -@@ -916,25 +918,30 @@ enum mkt_eth_capabilities { - - #define MTK_HAS_CAPS(caps, _x) (((caps) & (_x) & ~(MTK_CAP_MASK)) == (_x)) - --#define MT7621_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | \ -- MTK_GMAC2_RGMII | MTK_SHARED_INT | \ -- MTK_TRGMII_MT7621_CLK | MTK_QDMA) -- --#define MT7622_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_SGMII | MTK_GMAC2_RGMII | \ -- MTK_GMAC2_SGMII | MTK_GDM1_ESW | \ -- MTK_MUX_GDM1_TO_GMAC1_ESW | \ -- MTK_MUX_GMAC1_GMAC2_TO_SGMII_RGMII | MTK_QDMA) -- --#define MT7623_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | MTK_GMAC2_RGMII | \ -- MTK_QDMA) -- --#define MT7628_CAPS (MTK_SHARED_INT | MTK_SOC_MT7628) -- --#define MT7629_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | MTK_GMAC2_GEPHY | \ -- MTK_GDM1_ESW | MTK_MUX_GDM1_TO_GMAC1_ESW | \ -- MTK_MUX_GMAC2_GMAC0_TO_GEPHY | \ -- MTK_MUX_U3_GMAC2_TO_QPHY | \ -- MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA) -+#define MT7621_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | \ -+ MTK_GMAC2_RGMII | MTK_SHARED_INT | \ -+ MTK_TRGMII_MT7621_CLK | MTK_QDMA | \ -+ MTK_NETSYS_V1) -+ -+#define MT7622_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_SGMII | \ -+ MTK_GMAC2_RGMII | MTK_GMAC2_SGMII | \ -+ MTK_GDM1_ESW | MTK_MUX_GDM1_TO_GMAC1_ESW |\ -+ MTK_MUX_GMAC1_GMAC2_TO_SGMII_RGMII | \ -+ MTK_QDMA | MTK_NETSYS_V1) -+ -+#define MT7623_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | \ -+ MTK_GMAC2_RGMII | MTK_QDMA | \ -+ MTK_NETSYS_V1) -+ -+#define MT7628_CAPS (MTK_SHARED_INT | MTK_SOC_MT7628 | \ -+ MTK_NETSYS_V1) -+ -+#define MT7629_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \ -+ MTK_GMAC2_GEPHY | MTK_GDM1_ESW | \ -+ MTK_MUX_GMAC2_GMAC0_TO_GEPHY | MTK_QDMA | \ -+ MTK_MUX_U3_GMAC2_TO_QPHY | MTK_NETSYS_V1 |\ -+ MTK_MUX_GDM1_TO_GMAC1_ESW | \ -+ MTK_MUX_GMAC12_TO_GEPHY_SGMII) - - #define MT7981_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | MTK_GMAC2_GEPHY | \ - MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ diff --git a/target/linux/generic/pending-6.1/737-02-net-ethernet-mtk_eth_soc-move-MAX_DEVS-in-mtk_soc_da.patch b/target/linux/generic/pending-6.1/737-02-net-ethernet-mtk_eth_soc-move-MAX_DEVS-in-mtk_soc_da.patch deleted file mode 100644 index 9d30e7b5e..000000000 --- a/target/linux/generic/pending-6.1/737-02-net-ethernet-mtk_eth_soc-move-MAX_DEVS-in-mtk_soc_da.patch +++ /dev/null @@ -1,181 +0,0 @@ -From 5af2b2dc4d6ba0ff7696e79f18e5b2bf862194eb Mon Sep 17 00:00:00 2001 -From: Lorenzo Bianconi -Date: Tue, 7 Mar 2023 15:55:24 +0000 -Subject: [PATCH 2/7] net: ethernet: mtk_eth_soc: move MAX_DEVS in mtk_soc_data - -This is a preliminary patch to add MT7988 SoC support since it runs 3 -macs instead of 2. - -Signed-off-by: Lorenzo Bianconi -Signed-off-by: Daniel Golle ---- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 34 +++++++++++++++++++-- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 11 +++---- - 2 files changed, 36 insertions(+), 9 deletions(-) - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -4028,7 +4028,10 @@ static void mtk_sgmii_destroy(struct mtk - { - int i; - -- for (i = 0; i < MTK_MAX_DEVS; i++) -+ if (!eth->sgmii_pcs) -+ return; -+ -+ for (i = 0; i < eth->soc->num_devs; i++) - mtk_pcs_lynxi_destroy(eth->sgmii_pcs[i]); - } - -@@ -4481,7 +4484,12 @@ static int mtk_sgmii_init(struct mtk_eth - u32 flags; - int i; - -- for (i = 0; i < MTK_MAX_DEVS; i++) { -+ eth->sgmii_pcs = devm_kzalloc(eth->dev, -+ sizeof(*eth->sgmii_pcs) * -+ eth->soc->num_devs, -+ GFP_KERNEL); -+ -+ for (i = 0; i < eth->soc->num_devs; i++) { - np = of_parse_phandle(eth->dev->of_node, "mediatek,sgmiisys", i); - if (!np) - break; -@@ -4526,6 +4534,18 @@ static int mtk_probe(struct platform_dev - if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628)) - eth->ip_align = NET_IP_ALIGN; - -+ eth->netdev = devm_kzalloc(eth->dev, -+ sizeof(*eth->netdev) * eth->soc->num_devs, -+ GFP_KERNEL); -+ if (!eth->netdev) -+ return -ENOMEM; -+ -+ eth->mac = devm_kzalloc(eth->dev, -+ sizeof(*eth->mac) * eth->soc->num_devs, -+ GFP_KERNEL); -+ if (!eth->mac) -+ return -ENOMEM; -+ - spin_lock_init(ð->page_lock); - spin_lock_init(ð->tx_irq_lock); - spin_lock_init(ð->rx_irq_lock); -@@ -4711,7 +4731,7 @@ static int mtk_probe(struct platform_dev - goto err_deinit_ppe; - } - -- for (i = 0; i < MTK_MAX_DEVS; i++) { -+ for (i = 0; i < eth->soc->num_devs; i++) { - if (!eth->netdev[i]) - continue; - -@@ -4787,6 +4807,7 @@ static const struct mtk_soc_data mt2701_ - .hw_features = MTK_HW_FEATURES, - .required_clks = MT7623_CLKS_BITMAP, - .required_pctl = true, -+ .num_devs = 2, - .txrx = { - .txd_size = sizeof(struct mtk_tx_dma), - .rxd_size = sizeof(struct mtk_rx_dma), -@@ -4805,6 +4826,7 @@ static const struct mtk_soc_data mt7621_ - .required_pctl = false, - .offload_version = 1, - .hash_offset = 2, -+ .num_devs = 2, - .foe_entry_size = sizeof(struct mtk_foe_entry) - 16, - .txrx = { - .txd_size = sizeof(struct mtk_tx_dma), -@@ -4826,6 +4848,7 @@ static const struct mtk_soc_data mt7622_ - .offload_version = 2, - .hash_offset = 2, - .has_accounting = true, -+ .num_devs = 2, - .foe_entry_size = sizeof(struct mtk_foe_entry) - 16, - .txrx = { - .txd_size = sizeof(struct mtk_tx_dma), -@@ -4845,6 +4868,7 @@ static const struct mtk_soc_data mt7623_ - .required_pctl = true, - .offload_version = 1, - .hash_offset = 2, -+ .num_devs = 2, - .foe_entry_size = sizeof(struct mtk_foe_entry) - 16, - .txrx = { - .txd_size = sizeof(struct mtk_tx_dma), -@@ -4864,6 +4888,7 @@ static const struct mtk_soc_data mt7629_ - .required_clks = MT7629_CLKS_BITMAP, - .required_pctl = false, - .has_accounting = true, -+ .num_devs = 2, - .txrx = { - .txd_size = sizeof(struct mtk_tx_dma), - .rxd_size = sizeof(struct mtk_rx_dma), -@@ -4885,6 +4910,7 @@ static const struct mtk_soc_data mt7981_ - .hash_offset = 4, - .foe_entry_size = sizeof(struct mtk_foe_entry), - .has_accounting = true, -+ .num_devs = 2, - .txrx = { - .txd_size = sizeof(struct mtk_tx_dma_v2), - .rxd_size = sizeof(struct mtk_rx_dma_v2), -@@ -4904,6 +4930,7 @@ static const struct mtk_soc_data mt7986_ - .required_pctl = false, - .offload_version = 2, - .hash_offset = 4, -+ .num_devs = 2, - .foe_entry_size = sizeof(struct mtk_foe_entry), - .has_accounting = true, - .txrx = { -@@ -4922,6 +4949,7 @@ static const struct mtk_soc_data rt5350_ - .hw_features = MTK_HW_FEATURES_MT7628, - .required_clks = MT7628_CLKS_BITMAP, - .required_pctl = false, -+ .num_devs = 2, - .txrx = { - .txd_size = sizeof(struct mtk_tx_dma), - .rxd_size = sizeof(struct mtk_rx_dma), ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -1021,6 +1021,7 @@ struct mtk_reg_map { - * @required_pctl A bool value to show whether the SoC requires - * the extra setup for those pins used by GMAC. - * @hash_offset Flow table hash offset. -+ * @num_devs SoC number of macs. - * @foe_entry_size Foe table entry size. - * @has_accounting Bool indicating support for accounting of - * offloaded flows. -@@ -1039,6 +1040,7 @@ struct mtk_soc_data { - bool required_pctl; - u8 offload_version; - u8 hash_offset; -+ u8 num_devs; - u16 foe_entry_size; - netdev_features_t hw_features; - bool has_accounting; -@@ -1054,9 +1056,6 @@ struct mtk_soc_data { - - #define MTK_DMA_MONITOR_TIMEOUT msecs_to_jiffies(1000) - --/* currently no SoC has more than 2 macs */ --#define MTK_MAX_DEVS 2 -- - /* struct mtk_eth - This is the main datasructure for holding the state - * of the driver - * @dev: The device pointer -@@ -1111,14 +1110,14 @@ struct mtk_eth { - spinlock_t tx_irq_lock; - spinlock_t rx_irq_lock; - struct net_device dummy_dev; -- struct net_device *netdev[MTK_MAX_DEVS]; -- struct mtk_mac *mac[MTK_MAX_DEVS]; -+ struct net_device **netdev; -+ struct mtk_mac **mac; - int irq[3]; - u32 msg_enable; - unsigned long sysclk; - struct regmap *ethsys; - struct regmap *infra; -- struct phylink_pcs *sgmii_pcs[MTK_MAX_DEVS]; -+ struct phylink_pcs **sgmii_pcs; - struct regmap *pctl; - bool hwlro; - refcount_t dma_refcnt; diff --git a/target/linux/generic/pending-6.1/737-06-net-ethernet-mtk_eth_soc-add-support-for-MT7988-SoC.patch b/target/linux/generic/pending-6.1/737-06-net-ethernet-mtk_eth_soc-add-support-for-MT7988-SoC.patch deleted file mode 100644 index 06e281aec..000000000 --- a/target/linux/generic/pending-6.1/737-06-net-ethernet-mtk_eth_soc-add-support-for-MT7988-SoC.patch +++ /dev/null @@ -1,495 +0,0 @@ -From 661bacf4363ca68939c15e20056b5f72fbd034e7 Mon Sep 17 00:00:00 2001 -From: Lorenzo Bianconi -Date: Sat, 25 Feb 2023 00:08:24 +0100 -Subject: [PATCH 6/7] net: ethernet: mtk_eth_soc: add support for MT7988 SoC - -Introduce support for ethernet chip available in MT7988 SoC to -mtk_eth_soc driver. ---- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 153 ++++++++++++++-- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 193 ++++++++++++++------ - 2 files changed, 279 insertions(+), 67 deletions(-) - ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -152,6 +152,54 @@ static const struct mtk_reg_map mt7986_r - .pse_oq_sta = 0x01a0, - }; - -+static const struct mtk_reg_map mt7988_reg_map = { -+ .tx_irq_mask = 0x461c, -+ .tx_irq_status = 0x4618, -+ .pdma = { -+ .rx_ptr = 0x6900, -+ .rx_cnt_cfg = 0x6904, -+ .pcrx_ptr = 0x6908, -+ .glo_cfg = 0x6a04, -+ .rst_idx = 0x6a08, -+ .delay_irq = 0x6a0c, -+ .irq_status = 0x6a20, -+ .irq_mask = 0x6a28, -+ .adma_rx_dbg0 = 0x6a38, -+ .int_grp = 0x6a50, -+ }, -+ .qdma = { -+ .qtx_cfg = 0x4400, -+ .qtx_sch = 0x4404, -+ .rx_ptr = 0x4500, -+ .rx_cnt_cfg = 0x4504, -+ .qcrx_ptr = 0x4508, -+ .glo_cfg = 0x4604, -+ .rst_idx = 0x4608, -+ .delay_irq = 0x460c, -+ .fc_th = 0x4610, -+ .int_grp = 0x4620, -+ .hred = 0x4644, -+ .ctx_ptr = 0x4700, -+ .dtx_ptr = 0x4704, -+ .crx_ptr = 0x4710, -+ .drx_ptr = 0x4714, -+ .fq_head = 0x4720, -+ .fq_tail = 0x4724, -+ .fq_count = 0x4728, -+ .fq_blen = 0x472c, -+ .tx_sch_rate = 0x4798, -+ }, -+ .gdm1_cnt = 0x1c00, -+ .gdma_to_ppe = 0x3333, -+ .ppe_base = 0x2200, -+ .wdma_base = { -+ [0] = 0x4800, -+ [1] = 0x4c00, -+ }, -+ .pse_iq_sta = 0x0180, -+ .pse_oq_sta = 0x01a0, -+}; -+ - /* strings used by ethtool */ - static const struct mtk_ethtool_stats { - char str[ETH_GSTRING_LEN]; -@@ -179,10 +227,54 @@ static const struct mtk_ethtool_stats { - }; - - static const char * const mtk_clks_source_name[] = { -- "ethif", "sgmiitop", "esw", "gp0", "gp1", "gp2", "fe", "trgpll", -- "sgmii_tx250m", "sgmii_rx250m", "sgmii_cdr_ref", "sgmii_cdr_fb", -- "sgmii2_tx250m", "sgmii2_rx250m", "sgmii2_cdr_ref", "sgmii2_cdr_fb", -- "sgmii_ck", "eth2pll", "wocpu0", "wocpu1", "netsys0", "netsys1" -+ "ethif", -+ "sgmiitop", -+ "esw", -+ "gp0", -+ "gp1", -+ "gp2", -+ "gp3", -+ "xgp1", -+ "xgp2", -+ "xgp3", -+ "crypto", -+ "fe", -+ "trgpll", -+ "sgmii_tx250m", -+ "sgmii_rx250m", -+ "sgmii_cdr_ref", -+ "sgmii_cdr_fb", -+ "sgmii2_tx250m", -+ "sgmii2_rx250m", -+ "sgmii2_cdr_ref", -+ "sgmii2_cdr_fb", -+ "sgmii_ck", -+ "eth2pll", -+ "wocpu0", -+ "wocpu1", -+ "netsys0", -+ "netsys1", -+ "ethwarp_wocpu2", -+ "ethwarp_wocpu1", -+ "ethwarp_wocpu0", -+ "top_usxgmii0_sel", -+ "top_usxgmii1_sel", -+ "top_sgm0_sel", -+ "top_sgm1_sel", -+ "top_xfi_phy0_xtal_sel", -+ "top_xfi_phy1_xtal_sel", -+ "top_eth_gmii_sel", -+ "top_eth_refck_50m_sel", -+ "top_eth_sys_200m_sel", -+ "top_eth_sys_sel", -+ "top_eth_xgmii_sel", -+ "top_eth_mii_sel", -+ "top_netsys_sel", -+ "top_netsys_500m_sel", -+ "top_netsys_pao_2x_sel", -+ "top_netsys_sync_250m_sel", -+ "top_netsys_ppefb_250m_sel", -+ "top_netsys_warp_sel", - }; - - void mtk_w32(struct mtk_eth *eth, u32 val, unsigned reg) -@@ -1252,10 +1344,19 @@ static void mtk_tx_set_dma_desc_v2(struc - data |= TX_DMA_LS0; - WRITE_ONCE(desc->txd3, data); - -- if (mac->id == MTK_GMAC3_ID) -- data = PSE_GDM3_PORT; -- else -- data = (mac->id + 1) << TX_DMA_FPORT_SHIFT_V2; /* forward port */ -+ /* set forward port */ -+ switch (mac->id) { -+ case MTK_GMAC1_ID: -+ data = PSE_GDM1_PORT << TX_DMA_FPORT_SHIFT_V2; -+ break; -+ case MTK_GMAC2_ID: -+ data = PSE_GDM2_PORT << TX_DMA_FPORT_SHIFT_V2; -+ break; -+ case MTK_GMAC3_ID: -+ data = PSE_GDM3_PORT << TX_DMA_FPORT_SHIFT_V2; -+ break; -+ } -+ - data |= TX_DMA_SWC_V2 | QID_BITS_V2(info->qid); - WRITE_ONCE(desc->txd4, data); - -@@ -5012,6 +5113,25 @@ static const struct mtk_soc_data mt7986_ - }, - }; - -+static const struct mtk_soc_data mt7988_data = { -+ .reg_map = &mt7988_reg_map, -+ .ana_rgc3 = 0x128, -+ .caps = MT7988_CAPS, -+ .hw_features = MTK_HW_FEATURES, -+ .required_clks = MT7988_CLKS_BITMAP, -+ .required_pctl = false, -+ .num_devs = 3, -+ .txrx = { -+ .txd_size = sizeof(struct mtk_tx_dma_v2), -+ .rxd_size = sizeof(struct mtk_rx_dma_v2), -+ .rx_irq_done_mask = MTK_RX_DONE_INT_V2, -+ .rx_dma_l4_valid = RX_DMA_L4_VALID_V2, -+ .dma_max_len = MTK_TX_DMA_BUF_LEN_V2, -+ .dma_len_offset = 8, -+ }, -+}; -+ -+ - static const struct mtk_soc_data rt5350_data = { - .reg_map = &mt7628_reg_map, - .caps = MT7628_CAPS, -@@ -5030,14 +5150,15 @@ static const struct mtk_soc_data rt5350_ - }; - - const struct of_device_id of_mtk_match[] = { -- { .compatible = "mediatek,mt2701-eth", .data = &mt2701_data}, -- { .compatible = "mediatek,mt7621-eth", .data = &mt7621_data}, -- { .compatible = "mediatek,mt7622-eth", .data = &mt7622_data}, -- { .compatible = "mediatek,mt7623-eth", .data = &mt7623_data}, -- { .compatible = "mediatek,mt7629-eth", .data = &mt7629_data}, -- { .compatible = "mediatek,mt7981-eth", .data = &mt7981_data}, -- { .compatible = "mediatek,mt7986-eth", .data = &mt7986_data}, -- { .compatible = "ralink,rt5350-eth", .data = &rt5350_data}, -+ { .compatible = "mediatek,mt2701-eth", .data = &mt2701_data }, -+ { .compatible = "mediatek,mt7621-eth", .data = &mt7621_data }, -+ { .compatible = "mediatek,mt7622-eth", .data = &mt7622_data }, -+ { .compatible = "mediatek,mt7623-eth", .data = &mt7623_data }, -+ { .compatible = "mediatek,mt7629-eth", .data = &mt7629_data }, -+ { .compatible = "mediatek,mt7981-eth", .data = &mt7981_data }, -+ { .compatible = "mediatek,mt7986-eth", .data = &mt7986_data }, -+ { .compatible = "mediatek,mt7988-eth", .data = &mt7988_data }, -+ { .compatible = "ralink,rt5350-eth", .data = &rt5350_data }, - {}, - }; - MODULE_DEVICE_TABLE(of, of_mtk_match); ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -116,7 +116,8 @@ - #define MTK_CDMP_EG_CTRL 0x404 - - /* GDM Exgress Control Register */ --#define MTK_GDMA_FWD_CFG(x) (0x500 + (x * 0x1000)) -+#define MTK_GDMA_FWD_CFG(x) ((x == MTK_GMAC3_ID) ? \ -+ 0x540 : 0x500 + (x * 0x1000)) - #define MTK_GDMA_SPECIAL_TAG BIT(24) - #define MTK_GDMA_ICS_EN BIT(22) - #define MTK_GDMA_TCS_EN BIT(21) -@@ -653,6 +654,11 @@ enum mtk_clks_map { - MTK_CLK_GP0, - MTK_CLK_GP1, - MTK_CLK_GP2, -+ MTK_CLK_GP3, -+ MTK_CLK_XGP1, -+ MTK_CLK_XGP2, -+ MTK_CLK_XGP3, -+ MTK_CLK_CRYPTO, - MTK_CLK_FE, - MTK_CLK_TRGPLL, - MTK_CLK_SGMII_TX_250M, -@@ -669,57 +675,108 @@ enum mtk_clks_map { - MTK_CLK_WOCPU1, - MTK_CLK_NETSYS0, - MTK_CLK_NETSYS1, -+ MTK_CLK_ETHWARP_WOCPU2, -+ MTK_CLK_ETHWARP_WOCPU1, -+ MTK_CLK_ETHWARP_WOCPU0, -+ MTK_CLK_TOP_USXGMII_SBUS_0_SEL, -+ MTK_CLK_TOP_USXGMII_SBUS_1_SEL, -+ MTK_CLK_TOP_SGM_0_SEL, -+ MTK_CLK_TOP_SGM_1_SEL, -+ MTK_CLK_TOP_XFI_PHY_0_XTAL_SEL, -+ MTK_CLK_TOP_XFI_PHY_1_XTAL_SEL, -+ MTK_CLK_TOP_ETH_GMII_SEL, -+ MTK_CLK_TOP_ETH_REFCK_50M_SEL, -+ MTK_CLK_TOP_ETH_SYS_200M_SEL, -+ MTK_CLK_TOP_ETH_SYS_SEL, -+ MTK_CLK_TOP_ETH_XGMII_SEL, -+ MTK_CLK_TOP_ETH_MII_SEL, -+ MTK_CLK_TOP_NETSYS_SEL, -+ MTK_CLK_TOP_NETSYS_500M_SEL, -+ MTK_CLK_TOP_NETSYS_PAO_2X_SEL, -+ MTK_CLK_TOP_NETSYS_SYNC_250M_SEL, -+ MTK_CLK_TOP_NETSYS_PPEFB_250M_SEL, -+ MTK_CLK_TOP_NETSYS_WARP_SEL, - MTK_CLK_MAX - }; - --#define MT7623_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \ -- BIT(MTK_CLK_GP1) | BIT(MTK_CLK_GP2) | \ -- BIT(MTK_CLK_TRGPLL)) --#define MT7622_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \ -- BIT(MTK_CLK_GP0) | BIT(MTK_CLK_GP1) | \ -- BIT(MTK_CLK_GP2) | \ -- BIT(MTK_CLK_SGMII_TX_250M) | \ -- BIT(MTK_CLK_SGMII_RX_250M) | \ -- BIT(MTK_CLK_SGMII_CDR_REF) | \ -- BIT(MTK_CLK_SGMII_CDR_FB) | \ -- BIT(MTK_CLK_SGMII_CK) | \ -- BIT(MTK_CLK_ETH2PLL)) -+#define MT7623_CLKS_BITMAP (BIT_ULL(MTK_CLK_ETHIF) | BIT_ULL(MTK_CLK_ESW) | \ -+ BIT_ULL(MTK_CLK_GP1) | BIT_ULL(MTK_CLK_GP2) | \ -+ BIT_ULL(MTK_CLK_TRGPLL)) -+#define MT7622_CLKS_BITMAP (BIT_ULL(MTK_CLK_ETHIF) | BIT_ULL(MTK_CLK_ESW) | \ -+ BIT_ULL(MTK_CLK_GP0) | BIT_ULL(MTK_CLK_GP1) | \ -+ BIT_ULL(MTK_CLK_GP2) | \ -+ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \ -+ BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \ -+ BIT_ULL(MTK_CLK_SGMII_CK) | \ -+ BIT_ULL(MTK_CLK_ETH2PLL)) - #define MT7621_CLKS_BITMAP (0) - #define MT7628_CLKS_BITMAP (0) --#define MT7629_CLKS_BITMAP (BIT(MTK_CLK_ETHIF) | BIT(MTK_CLK_ESW) | \ -- BIT(MTK_CLK_GP0) | BIT(MTK_CLK_GP1) | \ -- BIT(MTK_CLK_GP2) | BIT(MTK_CLK_FE) | \ -- BIT(MTK_CLK_SGMII_TX_250M) | \ -- BIT(MTK_CLK_SGMII_RX_250M) | \ -- BIT(MTK_CLK_SGMII_CDR_REF) | \ -- BIT(MTK_CLK_SGMII_CDR_FB) | \ -- BIT(MTK_CLK_SGMII2_TX_250M) | \ -- BIT(MTK_CLK_SGMII2_RX_250M) | \ -- BIT(MTK_CLK_SGMII2_CDR_REF) | \ -- BIT(MTK_CLK_SGMII2_CDR_FB) | \ -- BIT(MTK_CLK_SGMII_CK) | \ -- BIT(MTK_CLK_ETH2PLL) | BIT(MTK_CLK_SGMIITOP)) --#define MT7981_CLKS_BITMAP (BIT(MTK_CLK_FE) | BIT(MTK_CLK_GP2) | BIT(MTK_CLK_GP1) | \ -- BIT(MTK_CLK_WOCPU0) | \ -- BIT(MTK_CLK_SGMII_TX_250M) | \ -- BIT(MTK_CLK_SGMII_RX_250M) | \ -- BIT(MTK_CLK_SGMII_CDR_REF) | \ -- BIT(MTK_CLK_SGMII_CDR_FB) | \ -- BIT(MTK_CLK_SGMII2_TX_250M) | \ -- BIT(MTK_CLK_SGMII2_RX_250M) | \ -- BIT(MTK_CLK_SGMII2_CDR_REF) | \ -- BIT(MTK_CLK_SGMII2_CDR_FB) | \ -- BIT(MTK_CLK_SGMII_CK)) --#define MT7986_CLKS_BITMAP (BIT(MTK_CLK_FE) | BIT(MTK_CLK_GP2) | BIT(MTK_CLK_GP1) | \ -- BIT(MTK_CLK_WOCPU1) | BIT(MTK_CLK_WOCPU0) | \ -- BIT(MTK_CLK_SGMII_TX_250M) | \ -- BIT(MTK_CLK_SGMII_RX_250M) | \ -- BIT(MTK_CLK_SGMII_CDR_REF) | \ -- BIT(MTK_CLK_SGMII_CDR_FB) | \ -- BIT(MTK_CLK_SGMII2_TX_250M) | \ -- BIT(MTK_CLK_SGMII2_RX_250M) | \ -- BIT(MTK_CLK_SGMII2_CDR_REF) | \ -- BIT(MTK_CLK_SGMII2_CDR_FB)) -+#define MT7629_CLKS_BITMAP (BIT_ULL(MTK_CLK_ETHIF) | BIT_ULL(MTK_CLK_ESW) | \ -+ BIT_ULL(MTK_CLK_GP0) | BIT_ULL(MTK_CLK_GP1) | \ -+ BIT_ULL(MTK_CLK_GP2) | BIT_ULL(MTK_CLK_FE) | \ -+ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \ -+ BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \ -+ BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \ -+ BIT_ULL(MTK_CLK_SGMII2_CDR_FB) | \ -+ BIT_ULL(MTK_CLK_SGMII_CK) | \ -+ BIT_ULL(MTK_CLK_ETH2PLL) | BIT_ULL(MTK_CLK_SGMIITOP)) -+#define MT7981_CLKS_BITMAP (BIT_ULL(MTK_CLK_FE) | BIT_ULL(MTK_CLK_GP2) | BIT_ULL(MTK_CLK_GP1) | \ -+ BIT_ULL(MTK_CLK_WOCPU0) | \ -+ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \ -+ BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \ -+ BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \ -+ BIT_ULL(MTK_CLK_SGMII2_CDR_FB) | \ -+ BIT_ULL(MTK_CLK_SGMII_CK)) -+#define MT7986_CLKS_BITMAP (BIT_ULL(MTK_CLK_FE) | BIT_ULL(MTK_CLK_GP2) | BIT_ULL(MTK_CLK_GP1) | \ -+ BIT_ULL(MTK_CLK_WOCPU1) | BIT_ULL(MTK_CLK_WOCPU0) | \ -+ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_CDR_REF) | \ -+ BIT_ULL(MTK_CLK_SGMII_CDR_FB) | \ -+ BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII2_CDR_REF) | \ -+ BIT_ULL(MTK_CLK_SGMII2_CDR_FB)) -+#define MT7988_CLKS_BITMAP (BIT_ULL(MTK_CLK_FE) | BIT_ULL(MTK_CLK_ESW) | \ -+ BIT_ULL(MTK_CLK_GP1) | BIT_ULL(MTK_CLK_GP2) | \ -+ BIT_ULL(MTK_CLK_GP3) | BIT_ULL(MTK_CLK_XGP1) | \ -+ BIT_ULL(MTK_CLK_XGP2) | BIT_ULL(MTK_CLK_XGP3) | \ -+ BIT_ULL(MTK_CLK_CRYPTO) | \ -+ BIT_ULL(MTK_CLK_SGMII_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII_RX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII2_TX_250M) | \ -+ BIT_ULL(MTK_CLK_SGMII2_RX_250M) | \ -+ BIT_ULL(MTK_CLK_ETHWARP_WOCPU2) | \ -+ BIT_ULL(MTK_CLK_ETHWARP_WOCPU1) | \ -+ BIT_ULL(MTK_CLK_ETHWARP_WOCPU0) | \ -+ BIT_ULL(MTK_CLK_TOP_USXGMII_SBUS_0_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_USXGMII_SBUS_1_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_SGM_0_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_SGM_1_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_XFI_PHY_0_XTAL_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_XFI_PHY_1_XTAL_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_ETH_GMII_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_ETH_REFCK_50M_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_ETH_SYS_200M_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_ETH_SYS_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_ETH_XGMII_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_ETH_MII_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_NETSYS_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_NETSYS_500M_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_NETSYS_PAO_2X_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_NETSYS_SYNC_250M_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_NETSYS_PPEFB_250M_SEL) | \ -+ BIT_ULL(MTK_CLK_TOP_NETSYS_WARP_SEL)) - - enum mtk_dev_state { - MTK_HW_INIT, -@@ -847,6 +904,7 @@ enum mkt_eth_capabilities { - MTK_RGMII_BIT = 0, - MTK_TRGMII_BIT, - MTK_SGMII_BIT, -+ MTK_USXGMII_BIT, - MTK_ESW_BIT, - MTK_GEPHY_BIT, - MTK_MUX_BIT, -@@ -869,6 +927,8 @@ enum mkt_eth_capabilities { - MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT, - MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT, - MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT, -+ MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII_BIT, -+ MTK_ETH_MUX_GMAC123_TO_USXGMII_BIT, - - /* PATH BITS */ - MTK_ETH_PATH_GMAC1_RGMII_BIT, -@@ -877,13 +937,18 @@ enum mkt_eth_capabilities { - MTK_ETH_PATH_GMAC2_RGMII_BIT, - MTK_ETH_PATH_GMAC2_SGMII_BIT, - MTK_ETH_PATH_GMAC2_GEPHY_BIT, -+ MTK_ETH_PATH_GMAC3_SGMII_BIT, - MTK_ETH_PATH_GDM1_ESW_BIT, -+ MTK_ETH_PATH_GMAC1_USXGMII_BIT, -+ MTK_ETH_PATH_GMAC2_USXGMII_BIT, -+ MTK_ETH_PATH_GMAC3_USXGMII_BIT, - }; - - /* Supported hardware group on SoCs */ - #define MTK_RGMII BIT_ULL(MTK_RGMII_BIT) - #define MTK_TRGMII BIT_ULL(MTK_TRGMII_BIT) - #define MTK_SGMII BIT_ULL(MTK_SGMII_BIT) -+#define MTK_USXGMII BIT_ULL(MTK_USXGMII_BIT) - #define MTK_ESW BIT_ULL(MTK_ESW_BIT) - #define MTK_GEPHY BIT_ULL(MTK_GEPHY_BIT) - #define MTK_MUX BIT_ULL(MTK_MUX_BIT) -@@ -910,6 +975,10 @@ enum mkt_eth_capabilities { - BIT_ULL(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT) - #define MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII \ - BIT_ULL(MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT) -+#define MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII \ -+ BIT_ULL(MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII_BIT) -+#define MTK_ETH_MUX_GMAC123_TO_USXGMII \ -+ BIT_ULL(MTK_ETH_MUX_GMAC123_TO_USXGMII_BIT) - - /* Supported path present on SoCs */ - #define MTK_ETH_PATH_GMAC1_RGMII BIT_ULL(MTK_ETH_PATH_GMAC1_RGMII_BIT) -@@ -918,7 +987,11 @@ enum mkt_eth_capabilities { - #define MTK_ETH_PATH_GMAC2_RGMII BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT) - #define MTK_ETH_PATH_GMAC2_SGMII BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT) - #define MTK_ETH_PATH_GMAC2_GEPHY BIT_ULL(MTK_ETH_PATH_GMAC2_GEPHY_BIT) -+#define MTK_ETH_PATH_GMAC3_SGMII BIT_ULL(MTK_ETH_PATH_GMAC3_SGMII_BIT) - #define MTK_ETH_PATH_GDM1_ESW BIT_ULL(MTK_ETH_PATH_GDM1_ESW_BIT) -+#define MTK_ETH_PATH_GMAC1_USXGMII BIT_ULL(MTK_ETH_PATH_GMAC1_USXGMII_BIT) -+#define MTK_ETH_PATH_GMAC2_USXGMII BIT_ULL(MTK_ETH_PATH_GMAC2_USXGMII_BIT) -+#define MTK_ETH_PATH_GMAC3_USXGMII BIT_ULL(MTK_ETH_PATH_GMAC3_USXGMII_BIT) - - #define MTK_GMAC1_RGMII (MTK_ETH_PATH_GMAC1_RGMII | MTK_RGMII) - #define MTK_GMAC1_TRGMII (MTK_ETH_PATH_GMAC1_TRGMII | MTK_TRGMII) -@@ -926,7 +999,11 @@ enum mkt_eth_capabilities { - #define MTK_GMAC2_RGMII (MTK_ETH_PATH_GMAC2_RGMII | MTK_RGMII) - #define MTK_GMAC2_SGMII (MTK_ETH_PATH_GMAC2_SGMII | MTK_SGMII) - #define MTK_GMAC2_GEPHY (MTK_ETH_PATH_GMAC2_GEPHY | MTK_GEPHY) -+#define MTK_GMAC3_SGMII (MTK_ETH_PATH_GMAC3_SGMII | MTK_SGMII) - #define MTK_GDM1_ESW (MTK_ETH_PATH_GDM1_ESW | MTK_ESW) -+#define MTK_GMAC1_USXGMII (MTK_ETH_PATH_GMAC1_USXGMII | MTK_USXGMII) -+#define MTK_GMAC2_USXGMII (MTK_ETH_PATH_GMAC2_USXGMII | MTK_USXGMII) -+#define MTK_GMAC3_USXGMII (MTK_ETH_PATH_GMAC3_USXGMII | MTK_USXGMII) - - /* MUXes present on SoCs */ - /* 0: GDM1 -> GMAC1, 1: GDM1 -> ESW */ -@@ -949,6 +1026,12 @@ enum mkt_eth_capabilities { - #define MTK_MUX_GMAC12_TO_GEPHY_SGMII \ - (MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII | MTK_MUX) - -+#define MTK_MUX_GMAC123_TO_GEPHY_SGMII \ -+ (MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII | MTK_MUX) -+ -+#define MTK_MUX_GMAC123_TO_USXGMII \ -+ (MTK_ETH_MUX_GMAC123_TO_USXGMII | MTK_MUX | MTK_INFRA) -+ - #ifdef CONFIG_SOC_MT7621 - #define MTK_CAP_MASK MTK_NETSYS_V2 - #else -@@ -987,9 +1070,17 @@ enum mkt_eth_capabilities { - MTK_MUX_U3_GMAC2_TO_QPHY | MTK_U3_COPHY_V2 | \ - MTK_NETSYS_V2 | MTK_RSTCTRL_PPE1) - --#define MT7986_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \ -- MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ -- MTK_NETSYS_V2 | MTK_RSTCTRL_PPE1) -+#define MT7986_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \ -+ MTK_MUX_GMAC12_TO_GEPHY_SGMII | \ -+ MTK_QDMA | MTK_NETSYS_V2 | \ -+ MTK_RSTCTRL_PPE1) -+ -+#define MT7988_CAPS (MTK_GMAC1_SGMII | MTK_GMAC2_SGMII | \ -+ MTK_GMAC3_SGMII | MTK_QDMA | \ -+ MTK_MUX_GMAC123_TO_GEPHY_SGMII | \ -+ MTK_NETSYS_V3 | MTK_RSTCTRL_PPE1 | \ -+ MTK_GMAC1_USXGMII | MTK_GMAC2_USXGMII | \ -+ MTK_GMAC3_USXGMII | MTK_MUX_GMAC123_TO_USXGMII) - - struct mtk_tx_dma_desc_info { - dma_addr_t addr; -@@ -1075,7 +1166,7 @@ struct mtk_soc_data { - const struct mtk_reg_map *reg_map; - u32 ana_rgc3; - u64 caps; -- u32 required_clks; -+ u64 required_clks; - bool required_pctl; - u8 offload_version; - u8 hash_offset; diff --git a/target/linux/generic/pending-6.1/737-07-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch b/target/linux/generic/pending-6.1/737-07-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch deleted file mode 100644 index f1a8dc685..000000000 --- a/target/linux/generic/pending-6.1/737-07-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch +++ /dev/null @@ -1,1867 +0,0 @@ -From 3d833ad2cfc1ab503d9aae2967b7f10811bb3c9c Mon Sep 17 00:00:00 2001 -From: Daniel Golle -Date: Wed, 1 Mar 2023 11:56:04 +0000 -Subject: [PATCH 7/7] net: ethernet: mtk_eth_soc: add paths and SerDes modes - for MT7988 - -MT7988 comes with a built-in 2.5G PHY as well as -USXGMII/10GBase-KR/5GBase-KR compatible SerDes lanes for external PHYs. -Add support for configuring the MAC and SerDes parts for the new paths. - -Signed-off-by: Daniel Golle ---- - drivers/net/ethernet/mediatek/Kconfig | 7 + - drivers/net/ethernet/mediatek/Makefile | 1 + - drivers/net/ethernet/mediatek/mtk_eth_path.c | 154 +++- - drivers/net/ethernet/mediatek/mtk_eth_soc.c | 270 +++++- - drivers/net/ethernet/mediatek/mtk_eth_soc.h | 194 ++++- - drivers/net/ethernet/mediatek/mtk_usxgmii.c | 835 +++++++++++++++++++ - 6 files changed, 1428 insertions(+), 33 deletions(-) - create mode 100644 drivers/net/ethernet/mediatek/mtk_usxgmii.c - ---- a/drivers/net/ethernet/mediatek/Kconfig -+++ b/drivers/net/ethernet/mediatek/Kconfig -@@ -25,6 +25,13 @@ config NET_MEDIATEK_SOC - This driver supports the gigabit ethernet MACs in the - MediaTek SoC family. - -+config NET_MEDIATEK_SOC_USXGMII -+ bool "Support USXGMII SerDes on MT7988" -+ depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST -+ def_bool NET_MEDIATEK_SOC != n -+ help -+ Include support for 10G SerDes which can be found on MT7988. -+ - config NET_MEDIATEK_STAR_EMAC - tristate "MediaTek STAR Ethernet MAC support" - select PHYLIB ---- a/drivers/net/ethernet/mediatek/Makefile -+++ b/drivers/net/ethernet/mediatek/Makefile -@@ -5,6 +5,7 @@ - - obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth.o - mtk_eth-y := mtk_eth_soc.o mtk_eth_path.o mtk_ppe.o mtk_ppe_debugfs.o mtk_ppe_offload.o -+mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_USXGMII) += mtk_usxgmii.o - mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed.o mtk_wed_mcu.o mtk_wed_wo.o - ifdef CONFIG_DEBUG_FS - mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_debugfs.o ---- a/drivers/net/ethernet/mediatek/mtk_eth_path.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_path.c -@@ -31,10 +31,20 @@ static const char *mtk_eth_path_name(u64 - return "gmac2_rgmii"; - case MTK_ETH_PATH_GMAC2_SGMII: - return "gmac2_sgmii"; -+ case MTK_ETH_PATH_GMAC2_2P5GPHY: -+ return "gmac2_2p5gphy"; - case MTK_ETH_PATH_GMAC2_GEPHY: - return "gmac2_gephy"; -+ case MTK_ETH_PATH_GMAC3_SGMII: -+ return "gmac3_sgmii"; - case MTK_ETH_PATH_GDM1_ESW: - return "gdm1_esw"; -+ case MTK_ETH_PATH_GMAC1_USXGMII: -+ return "gmac1_usxgmii"; -+ case MTK_ETH_PATH_GMAC2_USXGMII: -+ return "gmac2_usxgmii"; -+ case MTK_ETH_PATH_GMAC3_USXGMII: -+ return "gmac3_usxgmii"; - default: - return "unknown path"; - } -@@ -42,8 +52,8 @@ static const char *mtk_eth_path_name(u64 - - static int set_mux_gdm1_to_gmac1_esw(struct mtk_eth *eth, u64 path) - { -+ u32 val, mask, set, reg; - bool updated = true; -- u32 val, mask, set; - - switch (path) { - case MTK_ETH_PATH_GMAC1_SGMII: -@@ -59,10 +69,15 @@ static int set_mux_gdm1_to_gmac1_esw(str - break; - } - -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) -+ reg = MTK_MAC_MISC_V3; -+ else -+ reg = MTK_MAC_MISC; -+ - if (updated) { -- val = mtk_r32(eth, MTK_MAC_MISC); -+ val = mtk_r32(eth, reg); - val = (val & mask) | set; -- mtk_w32(eth, val, MTK_MAC_MISC); -+ mtk_w32(eth, val, reg); - } - - dev_dbg(eth->dev, "path %s in %s updated = %d\n", -@@ -125,6 +140,31 @@ static int set_mux_u3_gmac2_to_qphy(stru - return 0; - } - -+static int set_mux_gmac2_to_2p5gphy(struct mtk_eth *eth, u64 path) -+{ -+ unsigned int val = 0; -+ bool updated = true; -+ int mac_id = 0; -+ -+ regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); -+ -+ switch (path) { -+ case MTK_ETH_PATH_GMAC2_2P5GPHY: -+ val &= ~(u32)SYSCFG0_SGMII_GMAC2_V2; -+ mac_id = MTK_GMAC2_ID; -+ break; -+ default: -+ updated = false; -+ break; -+ }; -+ -+ if (updated) -+ regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, -+ SYSCFG0_SGMII_MASK, val); -+ -+ return 0; -+} -+ - static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, u64 path) - { - unsigned int val = 0; -@@ -163,7 +203,61 @@ static int set_mux_gmac1_gmac2_to_sgmii_ - return 0; - } - --static int set_mux_gmac12_to_gephy_sgmii(struct mtk_eth *eth, u64 path) -+static int set_mux_gmac123_to_usxgmii(struct mtk_eth *eth, u64 path) -+{ -+ unsigned int val = 0; -+ bool updated = true; -+ int mac_id = 0; -+ -+ dev_dbg(eth->dev, "path %s in %s updated = %d\n", -+ mtk_eth_path_name(path), __func__, updated); -+ -+ /* Disable SYSCFG1 SGMII */ -+ regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); -+ -+ switch (path) { -+ case MTK_ETH_PATH_GMAC1_USXGMII: -+ val &= ~(u32)SYSCFG0_SGMII_GMAC1_V2; -+ mac_id = MTK_GMAC1_ID; -+ break; -+ case MTK_ETH_PATH_GMAC2_USXGMII: -+ val &= ~(u32)SYSCFG0_SGMII_GMAC2_V2; -+ mac_id = MTK_GMAC2_ID; -+ break; -+ case MTK_ETH_PATH_GMAC3_USXGMII: -+ val &= ~(u32)SYSCFG0_SGMII_GMAC3_V2; -+ mac_id = MTK_GMAC3_ID; -+ break; -+ default: -+ updated = false; -+ }; -+ -+ if (updated) { -+ regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, -+ SYSCFG0_SGMII_MASK, val); -+ -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3) && -+ mac_id == MTK_GMAC2_ID) { -+ regmap_update_bits(eth->infra, -+ TOP_MISC_NETSYS_PCS_MUX, -+ NETSYS_PCS_MUX_MASK, -+ MUX_G2_USXGMII_SEL); -+ } -+ } -+ -+ /* Enable XGDM Path */ -+ val = mtk_r32(eth, MTK_GDMA_EG_CTRL(mac_id)); -+ val |= MTK_GDMA_XGDM_SEL; -+ mtk_w32(eth, val, MTK_GDMA_EG_CTRL(mac_id)); -+ -+ dev_dbg(eth->dev, "path %s in %s updated = %d\n", -+ mtk_eth_path_name(path), __func__, updated); -+ -+ -+ return 0; -+} -+ -+static int set_mux_gmac123_to_gephy_sgmii(struct mtk_eth *eth, u64 path) - { - unsigned int val = 0; - bool updated = true; -@@ -180,6 +274,9 @@ static int set_mux_gmac12_to_gephy_sgmii - case MTK_ETH_PATH_GMAC2_SGMII: - val |= SYSCFG0_SGMII_GMAC2_V2; - break; -+ case MTK_ETH_PATH_GMAC3_SGMII: -+ val |= SYSCFG0_SGMII_GMAC3_V2; -+ break; - default: - updated = false; - } -@@ -208,13 +305,25 @@ static const struct mtk_eth_muxc mtk_eth - .cap_bit = MTK_ETH_MUX_U3_GMAC2_TO_QPHY, - .set_path = set_mux_u3_gmac2_to_qphy, - }, { -+ .name = "mux_gmac2_to_2p5gphy", -+ .cap_bit = MTK_ETH_MUX_GMAC2_TO_2P5GPHY, -+ .set_path = set_mux_gmac2_to_2p5gphy, -+ }, { - .name = "mux_gmac1_gmac2_to_sgmii_rgmii", - .cap_bit = MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII, - .set_path = set_mux_gmac1_gmac2_to_sgmii_rgmii, - }, { - .name = "mux_gmac12_to_gephy_sgmii", - .cap_bit = MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII, -- .set_path = set_mux_gmac12_to_gephy_sgmii, -+ .set_path = set_mux_gmac123_to_gephy_sgmii, -+ }, { -+ .name = "mux_gmac123_to_gephy_sgmii", -+ .cap_bit = MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII, -+ .set_path = set_mux_gmac123_to_gephy_sgmii, -+ }, { -+ .name = "mux_gmac123_to_usxgmii", -+ .cap_bit = MTK_ETH_MUX_GMAC123_TO_USXGMII, -+ .set_path = set_mux_gmac123_to_usxgmii, - }, - }; - -@@ -243,16 +352,46 @@ static int mtk_eth_mux_setup(struct mtk_ - } - } - -+ dev_dbg(eth->dev, "leaving mux_setup %s\n", -+ mtk_eth_path_name(path)); -+ - out: - return err; - } - -+int mtk_gmac_usxgmii_path_setup(struct mtk_eth *eth, int mac_id) -+{ -+ u64 path; -+ -+ path = (mac_id == MTK_GMAC1_ID) ? MTK_ETH_PATH_GMAC1_USXGMII : -+ (mac_id == MTK_GMAC2_ID) ? MTK_ETH_PATH_GMAC2_USXGMII : -+ MTK_ETH_PATH_GMAC3_USXGMII; -+ -+ /* Setup proper MUXes along the path */ -+ return mtk_eth_mux_setup(eth, path); -+} -+ - int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id) - { - u64 path; - -- path = (mac_id == 0) ? MTK_ETH_PATH_GMAC1_SGMII : -- MTK_ETH_PATH_GMAC2_SGMII; -+ path = (mac_id == MTK_GMAC1_ID) ? MTK_ETH_PATH_GMAC1_SGMII : -+ (mac_id == MTK_GMAC2_ID) ? MTK_ETH_PATH_GMAC2_SGMII : -+ MTK_ETH_PATH_GMAC3_SGMII; -+ -+ /* Setup proper MUXes along the path */ -+ return mtk_eth_mux_setup(eth, path); -+} -+ -+int mtk_gmac_2p5gphy_path_setup(struct mtk_eth *eth, int mac_id) -+{ -+ u64 path = 0; -+ -+ if (mac_id == MTK_GMAC2_ID) -+ path = MTK_ETH_PATH_GMAC2_2P5GPHY; -+ -+ if (!path) -+ return -EINVAL; - - /* Setup proper MUXes along the path */ - return mtk_eth_mux_setup(eth, path); -@@ -282,4 +421,3 @@ int mtk_gmac_rgmii_path_setup(struct mtk - /* Setup proper MUXes along the path */ - return mtk_eth_mux_setup(eth, path); - } -- ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -480,6 +480,23 @@ static void mtk_gmac0_rgmii_adjust(struc - mtk_w32(eth, val, TRGMII_TCK_CTRL); - } - -+static void mtk_setup_bridge_switch(struct mtk_eth *eth) -+{ -+ int val; -+ -+ /* Force Port1 XGMAC Link Up */ -+ val = mtk_r32(eth, MTK_XGMAC_STS(MTK_GMAC1_ID)); -+ mtk_w32(eth, val | MTK_XGMAC_FORCE_LINK(MTK_GMAC1_ID), -+ MTK_XGMAC_STS(MTK_GMAC1_ID)); -+ -+ /* Adjust GSW bridge IPG to 11*/ -+ val = mtk_r32(eth, MTK_GSW_CFG); -+ val &= ~(GSWTX_IPG_MASK | GSWRX_IPG_MASK); -+ val |= (GSW_IPG_11 << GSWTX_IPG_SHIFT) | -+ (GSW_IPG_11 << GSWRX_IPG_SHIFT); -+ mtk_w32(eth, val, MTK_GSW_CFG); -+} -+ - static struct phylink_pcs *mtk_mac_select_pcs(struct phylink_config *config, - phy_interface_t interface) - { -@@ -494,6 +511,12 @@ static struct phylink_pcs *mtk_mac_selec - 0 : mac->id; - - return eth->sgmii_pcs[sid]; -+ } else if ((interface == PHY_INTERFACE_MODE_USXGMII || -+ interface == PHY_INTERFACE_MODE_10GKR || -+ interface == PHY_INTERFACE_MODE_5GBASER) && -+ MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3) && -+ mac->id != MTK_GMAC1_ID) { -+ return mtk_usxgmii_select_pcs(eth, mac->id); - } - - return NULL; -@@ -505,7 +528,7 @@ static void mtk_mac_config(struct phylin - struct mtk_mac *mac = container_of(config, struct mtk_mac, - phylink_config); - struct mtk_eth *eth = mac->hw; -- int val, ge_mode, err = 0; -+ int val, ge_mode, force_link, err = 0; - u32 i; - - /* MT76x8 has no hardware settings between for the MAC */ -@@ -549,6 +572,23 @@ static void mtk_mac_config(struct phylin - goto init_err; - } - break; -+ case PHY_INTERFACE_MODE_USXGMII: -+ case PHY_INTERFACE_MODE_10GKR: -+ case PHY_INTERFACE_MODE_5GBASER: -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII)) { -+ err = mtk_gmac_usxgmii_path_setup(eth, mac->id); -+ if (err) -+ goto init_err; -+ } -+ break; -+ case PHY_INTERFACE_MODE_INTERNAL: -+ if (mac->id == MTK_GMAC2_ID && -+ MTK_HAS_CAPS(eth->soc->caps, MTK_2P5GPHY)) { -+ err = mtk_gmac_2p5gphy_path_setup(eth, mac->id); -+ if (err) -+ goto init_err; -+ } -+ break; - default: - goto err_phy; - } -@@ -627,14 +667,78 @@ static void mtk_mac_config(struct phylin - SYSCFG0_SGMII_MASK, - ~(u32)SYSCFG0_SGMII_MASK); - -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) { -+ mtk_xfi_pll_enable(eth); -+ mtk_sgmii_reset(eth, mac->id); -+ if (phylink_autoneg_inband(mode)) -+ mtk_sgmii_setup_phya_gen1(eth, mac->id); -+ else -+ mtk_sgmii_setup_phya_gen2(eth, mac->id); -+ } - /* Save the syscfg0 value for mac_finish */ - mac->syscfg0 = val; -- } else if (phylink_autoneg_inband(mode)) { -+ } else if (state->interface != PHY_INTERFACE_MODE_USXGMII && -+ state->interface != PHY_INTERFACE_MODE_10GKR && -+ state->interface != PHY_INTERFACE_MODE_5GBASER && -+ phylink_autoneg_inband(mode)) { - dev_err(eth->dev, -- "In-band mode not supported in non SGMII mode!\n"); -+ "In-band mode not supported in non-SerDes modes!\n"); - return; - } - -+ /* Setup gmac */ -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3) && -+ (mtk_interface_mode_is_xgmii(state->interface) || -+ mac->interface == PHY_INTERFACE_MODE_INTERNAL)) { -+ mtk_w32(mac->hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac->id)); -+ mtk_w32(mac->hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac->id)); -+ -+ switch (mac->id) { -+ case MTK_GMAC1_ID: -+ mtk_setup_bridge_switch(eth); -+ break; -+ case MTK_GMAC2_ID: -+ force_link = (mac->interface == -+ PHY_INTERFACE_MODE_INTERNAL) ? -+ MTK_XGMAC_FORCE_LINK(mac->id) : 0; -+ val = mtk_r32(eth, MTK_XGMAC_STS(mac->id)); -+ mtk_w32(eth, val | force_link, -+ MTK_XGMAC_STS(mac->id)); -+ break; -+ case MTK_GMAC3_ID: -+ val = mtk_r32(eth, MTK_XGMAC_STS(mac->id)); -+ mtk_w32(eth, val | MTK_XGMAC_FORCE_LINK(mac->id), -+ MTK_XGMAC_STS(mac->id)); -+ break; -+ } -+ } else { -+ val = mtk_r32(eth, MTK_GDMA_EG_CTRL(mac->id)); -+ mtk_w32(eth, val & ~MTK_GDMA_XGDM_SEL, -+ MTK_GDMA_EG_CTRL(mac->id)); -+ -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) { -+ switch (mac->id) { -+ case MTK_GMAC2_ID: -+ case MTK_GMAC3_ID: -+ val = mtk_r32(eth, MTK_XGMAC_STS(mac->id)); -+ mtk_w32(eth, -+ val & ~MTK_XGMAC_FORCE_LINK(mac->id), -+ MTK_XGMAC_STS(mac->id)); -+ break; -+ } -+ } -+ -+/* -+ if (mac->type != mac_type) { -+ if (atomic_read(&reset_pending) == 0) { -+ atomic_inc(&force); -+ schedule_work(ð->pending_work); -+ atomic_inc(&reset_pending); -+ } else -+ atomic_dec(&reset_pending); -+ } -+*/ -+ } - return; - - err_phy: -@@ -674,11 +778,40 @@ static int mtk_mac_finish(struct phylink - return 0; - } - --static void mtk_mac_pcs_get_state(struct phylink_config *config, -+static void mtk_xgdm_pcs_get_state(struct mtk_mac *mac, -+ struct phylink_link_state *state) -+{ -+ u32 sts = mtk_r32(mac->hw, MTK_XGMAC_STS(mac->id)); -+ -+ if (mac->id == MTK_GMAC2_ID) -+ sts = sts >> 16; -+ -+ state->link = FIELD_GET(MTK_USXGMII_PCS_LINK, sts); -+ if (!state->link) -+ return; -+ -+ state->duplex = DUPLEX_FULL; -+ state->interface = mac->interface; -+ -+ switch (FIELD_GET(MTK_USXGMII_PCS_MODE, sts)) { -+ case 0: -+ state->speed = SPEED_10000; -+ break; -+ case 1: -+ state->speed = SPEED_5000; -+ break; -+ case 2: -+ state->speed = SPEED_2500; -+ break; -+ case 3: -+ state->speed = SPEED_1000; -+ break; -+ } -+} -+ -+static void mtk_gdm_pcs_get_state(struct mtk_mac *mac, - struct phylink_link_state *state) - { -- struct mtk_mac *mac = container_of(config, struct mtk_mac, -- phylink_config); - u32 pmsr = mtk_r32(mac->hw, MTK_MAC_MSR(mac->id)); - - state->link = (pmsr & MAC_MSR_LINK); -@@ -706,15 +839,35 @@ static void mtk_mac_pcs_get_state(struct - state->pause |= MLO_PAUSE_TX; - } - -+static void mtk_mac_pcs_get_state(struct phylink_config *config, -+ struct phylink_link_state *state) -+{ -+ struct mtk_mac *mac = container_of(config, struct mtk_mac, -+ phylink_config); -+ -+ if (mtk_interface_mode_is_xgmii(state->interface)) -+ mtk_xgdm_pcs_get_state(mac, state); -+ else -+ mtk_gdm_pcs_get_state(mac, state); -+} -+ - static void mtk_mac_link_down(struct phylink_config *config, unsigned int mode, - phy_interface_t interface) - { - struct mtk_mac *mac = container_of(config, struct mtk_mac, - phylink_config); -- u32 mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); -+ u32 mcr; - -- mcr &= ~(MAC_MCR_TX_EN | MAC_MCR_RX_EN | MAC_MCR_FORCE_LINK); -- mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); -+ if (!mtk_interface_mode_is_xgmii(interface)) { -+ mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); -+ mcr &= ~(MAC_MCR_TX_EN | MAC_MCR_RX_EN); -+ mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); -+ } else if (mac->id != MTK_GMAC1_ID) { -+ mcr = mtk_r32(mac->hw, MTK_XMAC_MCR(mac->id)); -+ mcr &= 0xfffffff0; -+ mcr |= XMAC_MCR_TRX_DISABLE; -+ mtk_w32(mac->hw, mcr, MTK_XMAC_MCR(mac->id)); -+ } - } - - static void mtk_set_queue_speed(struct mtk_eth *eth, unsigned int idx, -@@ -786,13 +939,11 @@ static void mtk_set_queue_speed(struct m - mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); - } - --static void mtk_mac_link_up(struct phylink_config *config, -- struct phy_device *phy, -- unsigned int mode, phy_interface_t interface, -- int speed, int duplex, bool tx_pause, bool rx_pause) -+static void mtk_gdm_mac_link_up(struct mtk_mac *mac, -+ struct phy_device *phy, -+ unsigned int mode, phy_interface_t interface, -+ int speed, int duplex, bool tx_pause, bool rx_pause) - { -- struct mtk_mac *mac = container_of(config, struct mtk_mac, -- phylink_config); - u32 mcr; - - mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); -@@ -826,6 +977,47 @@ static void mtk_mac_link_up(struct phyli - mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); - } - -+static void mtk_xgdm_mac_link_up(struct mtk_mac *mac, -+ struct phy_device *phy, -+ unsigned int mode, phy_interface_t interface, -+ int speed, int duplex, bool tx_pause, bool rx_pause) -+{ -+ u32 mcr; -+ -+ if (mac->id == MTK_GMAC1_ID) -+ return; -+ -+ mcr = mtk_r32(mac->hw, MTK_XMAC_MCR(mac->id)); -+ -+ mcr &= ~(XMAC_MCR_FORCE_TX_FC | XMAC_MCR_FORCE_RX_FC); -+ /* Configure pause modes - -+ * phylink will avoid these for half duplex -+ */ -+ if (tx_pause) -+ mcr |= XMAC_MCR_FORCE_TX_FC; -+ if (rx_pause) -+ mcr |= XMAC_MCR_FORCE_RX_FC; -+ -+ mcr &= ~(XMAC_MCR_TRX_DISABLE); -+ mtk_w32(mac->hw, mcr, MTK_XMAC_MCR(mac->id)); -+} -+ -+static void mtk_mac_link_up(struct phylink_config *config, -+ struct phy_device *phy, -+ unsigned int mode, phy_interface_t interface, -+ int speed, int duplex, bool tx_pause, bool rx_pause) -+{ -+ struct mtk_mac *mac = container_of(config, struct mtk_mac, -+ phylink_config); -+ -+ if (mtk_interface_mode_is_xgmii(interface)) -+ mtk_xgdm_mac_link_up(mac, phy, mode, interface, speed, duplex, -+ tx_pause, rx_pause); -+ else -+ mtk_gdm_mac_link_up(mac, phy, mode, interface, speed, duplex, -+ tx_pause, rx_pause); -+} -+ - static const struct phylink_mac_ops mtk_phylink_ops = { - .validate = phylink_generic_validate, - .mac_select_pcs = mtk_mac_select_pcs, -@@ -879,10 +1071,21 @@ static int mtk_mdio_init(struct mtk_eth - } - divider = min_t(unsigned int, DIV_ROUND_UP(MDC_MAX_FREQ, max_clk), 63); - -+ /* Configure MDC Turbo Mode */ -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) { -+ val = mtk_r32(eth, MTK_MAC_MISC_V3); -+ val |= MISC_MDC_TURBO; -+ mtk_w32(eth, val, MTK_MAC_MISC_V3); -+ } else { -+ val = mtk_r32(eth, MTK_PPSC); -+ val |= PPSC_MDC_TURBO; -+ mtk_w32(eth, val, MTK_PPSC); -+ } -+ - /* Configure MDC Divider */ - val = mtk_r32(eth, MTK_PPSC); - val &= ~PPSC_MDC_CFG; -- val |= FIELD_PREP(PPSC_MDC_CFG, divider) | PPSC_MDC_TURBO; -+ val |= FIELD_PREP(PPSC_MDC_CFG, divider); - mtk_w32(eth, val, MTK_PPSC); - - dev_dbg(eth->dev, "MDC is running on %d Hz\n", MDC_MAX_FREQ / divider); -@@ -4471,8 +4674,8 @@ static int mtk_add_mac(struct mtk_eth *e - const __be32 *_id = of_get_property(np, "reg", NULL); - phy_interface_t phy_mode; - struct phylink *phylink; -- struct mtk_mac *mac; - int id, err; -+ struct mtk_mac *mac; - int txqs = 1; - - if (!_id) { -@@ -4574,6 +4777,32 @@ static int mtk_add_mac(struct mtk_eth *e - mac->phylink_config.supported_interfaces); - } - -+ if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_USXGMII)) { -+ if (id == MTK_GMAC1_ID) { -+ mac->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | -+ MAC_SYM_PAUSE | -+ MAC_10000FD; -+ phy_interface_zero( -+ mac->phylink_config.supported_interfaces); -+ __set_bit(PHY_INTERFACE_MODE_INTERNAL, -+ mac->phylink_config.supported_interfaces); -+ } else { -+ mac->phylink_config.mac_capabilities |= MAC_5000FD | MAC_10000FD; -+ __set_bit(PHY_INTERFACE_MODE_5GBASER, -+ mac->phylink_config.supported_interfaces); -+ __set_bit(PHY_INTERFACE_MODE_10GKR, -+ mac->phylink_config.supported_interfaces); -+ __set_bit(PHY_INTERFACE_MODE_USXGMII, -+ mac->phylink_config.supported_interfaces); -+ } -+ } -+ -+ if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_2P5GPHY)) { -+ if (id == MTK_GMAC2_ID) -+ __set_bit(PHY_INTERFACE_MODE_INTERNAL, -+ mac->phylink_config.supported_interfaces); -+ } -+ - phylink = phylink_create(&mac->phylink_config, - of_fwnode_handle(mac->of_node), - phy_mode, &mtk_phylink_ops); -@@ -4761,6 +4990,13 @@ static int mtk_probe(struct platform_dev - - if (err) - return err; -+ } -+ -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII)) { -+ err = mtk_usxgmii_init(eth); -+ -+ if (err) -+ return err; - } - - if (eth->soc->required_pctl) { ---- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h -+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h -@@ -126,6 +126,11 @@ - #define MTK_GDMA_TO_PDMA 0x0 - #define MTK_GDMA_DROP_ALL 0x7777 - -+/* GDM Egress Control Register */ -+#define MTK_GDMA_EG_CTRL(x) ((x == MTK_GMAC3_ID) ? \ -+ 0x544 : 0x504 + (x * 0x1000)) -+#define MTK_GDMA_XGDM_SEL BIT(31) -+ - /* Unicast Filter MAC Address Register - Low */ - #define MTK_GDMA_MAC_ADRL(x) (0x508 + (x * 0x1000)) - -@@ -389,7 +394,26 @@ - #define PHY_IAC_TIMEOUT HZ - - #define MTK_MAC_MISC 0x1000c -+#define MTK_MAC_MISC_V3 0x10010 - #define MTK_MUX_TO_ESW BIT(0) -+#define MISC_MDC_TURBO BIT(4) -+ -+/* XMAC status registers */ -+#define MTK_XGMAC_STS(x) ((x == MTK_GMAC3_ID) ? 0x1001C : 0x1000C) -+#define MTK_XGMAC_FORCE_LINK(x) ((x == MTK_GMAC2_ID) ? BIT(31) : BIT(15)) -+#define MTK_USXGMII_PCS_LINK BIT(8) -+#define MTK_XGMAC_RX_FC BIT(5) -+#define MTK_XGMAC_TX_FC BIT(4) -+#define MTK_USXGMII_PCS_MODE GENMASK(3, 1) -+#define MTK_XGMAC_LINK_STS BIT(0) -+ -+/* GSW bridge registers */ -+#define MTK_GSW_CFG (0x10080) -+#define GSWTX_IPG_MASK GENMASK(19, 16) -+#define GSWTX_IPG_SHIFT 16 -+#define GSWRX_IPG_MASK GENMASK(3, 0) -+#define GSWRX_IPG_SHIFT 0 -+#define GSW_IPG_11 11 - - /* Mac control registers */ - #define MTK_MAC_MCR(x) (0x10100 + (x * 0x100)) -@@ -414,6 +438,17 @@ - #define MAC_MCR_FORCE_LINK BIT(0) - #define MAC_MCR_FORCE_LINK_DOWN (MAC_MCR_FORCE_MODE) - -+/* Mac EEE control registers */ -+#define MTK_MAC_EEE(x) (0x10104 + (x * 0x100)) -+#define MAC_EEE_WAKEUP_TIME_1000 GENMASK(31, 24) -+#define MAC_EEE_WAKEUP_TIME_100 GENMASK(23, 16) -+#define MAC_EEE_LPI_TXIDLE_THD GENMASK(15, 8) -+#define MAC_EEE_RESV0 GENMASK(7, 4) -+#define MAC_EEE_CKG_TXILDE BIT(3) -+#define MAC_EEE_CKG_RXLPI BIT(2) -+#define MAC_EEE_TX_DOWN_REQ BIT(1) -+#define MAC_EEE_LPI_MODE BIT(0) -+ - /* Mac status registers */ - #define MTK_MAC_MSR(x) (0x10108 + (x * 0x100)) - #define MAC_MSR_EEE1G BIT(7) -@@ -458,6 +493,12 @@ - #define INTF_MODE_RGMII_1000 (TRGMII_MODE | TRGMII_CENTRAL_ALIGNED) - #define INTF_MODE_RGMII_10_100 0 - -+/* XFI Mac control registers */ -+#define MTK_XMAC_MCR(x) (0x12000 + ((x - 1) * 0x1000)) -+#define XMAC_MCR_TRX_DISABLE 0xf -+#define XMAC_MCR_FORCE_TX_FC BIT(5) -+#define XMAC_MCR_FORCE_RX_FC BIT(4) -+ - /* GPIO port control registers for GMAC 2*/ - #define GPIO_OD33_CTRL8 0x4c0 - #define GPIO_BIAS_CTRL 0xed0 -@@ -483,6 +524,7 @@ - #define SYSCFG0_SGMII_GMAC2 ((3 << 8) & SYSCFG0_SGMII_MASK) - #define SYSCFG0_SGMII_GMAC1_V2 BIT(9) - #define SYSCFG0_SGMII_GMAC2_V2 BIT(8) -+#define SYSCFG0_SGMII_GMAC3_V2 BIT(7) - - - /* ethernet subsystem clock register */ -@@ -509,16 +551,91 @@ - #define ETHSYS_DMA_AG_MAP_QDMA BIT(1) - #define ETHSYS_DMA_AG_MAP_PPE BIT(2) - -+/* USXGMII subsystem config registers */ -+/* Register to control speed */ -+#define RG_PHY_TOP_SPEED_CTRL1 0x80C -+#define USXGMII_RATE_UPDATE_MODE BIT(31) -+#define USXGMII_MAC_CK_GATED BIT(29) -+#define USXGMII_IF_FORCE_EN BIT(28) -+#define USXGMII_RATE_ADAPT_MODE GENMASK(10, 8) -+#define USXGMII_RATE_ADAPT_MODE_X1 0 -+#define USXGMII_RATE_ADAPT_MODE_X2 1 -+#define USXGMII_RATE_ADAPT_MODE_X4 2 -+#define USXGMII_RATE_ADAPT_MODE_X10 3 -+#define USXGMII_RATE_ADAPT_MODE_X100 4 -+#define USXGMII_RATE_ADAPT_MODE_X5 5 -+#define USXGMII_RATE_ADAPT_MODE_X50 6 -+#define USXGMII_XFI_RX_MODE GENMASK(6, 4) -+#define USXGMII_XFI_RX_MODE_10G 0 -+#define USXGMII_XFI_RX_MODE_5G 1 -+#define USXGMII_XFI_TX_MODE GENMASK(2, 0) -+#define USXGMII_XFI_TX_MODE_10G 0 -+#define USXGMII_XFI_TX_MODE_5G 1 -+ -+/* Register to control PCS AN */ -+#define RG_PCS_AN_CTRL0 0x810 -+#define USXGMII_AN_RESTART BIT(31) -+#define USXGMII_AN_SYNC_CNT GENMASK(30, 11) -+#define USXGMII_AN_ENABLE BIT(0) -+ -+#define RG_PCS_AN_CTRL2 0x818 -+#define USXGMII_LINK_TIMER_IDLE_DETECT GENMASK(29, 20) -+#define USXGMII_LINK_TIMER_COMP_ACK_DETECT GENMASK(19, 10) -+#define USXGMII_LINK_TIMER_AN_RESTART GENMASK(9, 0) -+ -+/* Register to read PCS AN status */ -+#define RG_PCS_AN_STS0 0x81c -+#define USXGMII_LPA_SPEED_MASK GENMASK(11, 9) -+#define USXGMII_LPA_SPEED_10 0 -+#define USXGMII_LPA_SPEED_100 1 -+#define USXGMII_LPA_SPEED_1000 2 -+#define USXGMII_LPA_SPEED_10000 3 -+#define USXGMII_LPA_SPEED_2500 4 -+#define USXGMII_LPA_SPEED_5000 5 -+#define USXGMII_LPA_DUPLEX BIT(12) -+#define USXGMII_LPA_LINK BIT(15) -+#define USXGMII_LPA_LATCH BIT(31) -+ -+/* Register to control USXGMII XFI PLL digital */ -+#define XFI_PLL_DIG_GLB8 0x08 -+#define RG_XFI_PLL_EN BIT(31) -+ -+/* Register to control USXGMII XFI PLL analog */ -+#define XFI_PLL_ANA_GLB8 0x108 -+#define RG_XFI_PLL_ANA_SWWA 0x02283248 -+ - /* Infrasys subsystem config registers */ - #define INFRA_MISC2 0x70c - #define CO_QPHY_SEL BIT(0) - #define GEPHY_MAC_SEL BIT(1) - -+/* Toprgu subsystem config registers */ -+#define TOPRGU_SWSYSRST 0x18 -+#define SWSYSRST_UNLOCK_KEY GENMASK(31, 24) -+#define SWSYSRST_XFI_PLL_GRST BIT(16) -+#define SWSYSRST_XFI_PEXPT1_GRST BIT(15) -+#define SWSYSRST_XFI_PEXPT0_GRST BIT(14) -+#define SWSYSRST_XFI1_GRST BIT(13) -+#define SWSYSRST_XFI0_GRST BIT(12) -+#define SWSYSRST_SGMII1_GRST BIT(2) -+#define SWSYSRST_SGMII0_GRST BIT(1) -+#define TOPRGU_SWSYSRST_EN 0xFC -+ - /* Top misc registers */ -+#define TOP_MISC_NETSYS_PCS_MUX 0x84 -+#define NETSYS_PCS_MUX_MASK GENMASK(1, 0) -+#define MUX_G2_USXGMII_SEL BIT(1) -+#define MUX_HSGMII1_G1_SEL BIT(0) -+ - #define USB_PHY_SWITCH_REG 0x218 - #define QPHY_SEL_MASK GENMASK(1, 0) - #define SGMII_QPHY_SEL 0x2 - -+/* MDIO control */ -+#define MII_MMD_ACC_CTL_REG 0x0d -+#define MII_MMD_ADDR_DATA_REG 0x0e -+#define MMD_OP_MODE_DATA BIT(14) -+ - /* MT7628/88 specific stuff */ - #define MT7628_PDMA_OFFSET 0x0800 - #define MT7628_SDM_OFFSET 0x0c00 -@@ -812,13 +929,6 @@ enum mtk_gmac_id { - MTK_GMAC_ID_MAX - }; - --/* GDM Type */ --enum mtk_gdm_type { -- MTK_GDM_TYPE = 0, -- MTK_XGDM_TYPE, -- MTK_GDM_TYPE_MAX --}; -- - enum mtk_tx_buf_type { - MTK_TYPE_SKB, - MTK_TYPE_XDP_TX, -@@ -905,6 +1015,7 @@ enum mkt_eth_capabilities { - MTK_TRGMII_BIT, - MTK_SGMII_BIT, - MTK_USXGMII_BIT, -+ MTK_2P5GPHY_BIT, - MTK_ESW_BIT, - MTK_GEPHY_BIT, - MTK_MUX_BIT, -@@ -925,6 +1036,7 @@ enum mkt_eth_capabilities { - MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT, - MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT, - MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT, -+ MTK_ETH_MUX_GMAC2_TO_2P5GPHY_BIT, - MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT, - MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT, - MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII_BIT, -@@ -936,6 +1048,7 @@ enum mkt_eth_capabilities { - MTK_ETH_PATH_GMAC1_SGMII_BIT, - MTK_ETH_PATH_GMAC2_RGMII_BIT, - MTK_ETH_PATH_GMAC2_SGMII_BIT, -+ MTK_ETH_PATH_GMAC2_2P5GPHY_BIT, - MTK_ETH_PATH_GMAC2_GEPHY_BIT, - MTK_ETH_PATH_GMAC3_SGMII_BIT, - MTK_ETH_PATH_GDM1_ESW_BIT, -@@ -949,6 +1062,7 @@ enum mkt_eth_capabilities { - #define MTK_TRGMII BIT_ULL(MTK_TRGMII_BIT) - #define MTK_SGMII BIT_ULL(MTK_SGMII_BIT) - #define MTK_USXGMII BIT_ULL(MTK_USXGMII_BIT) -+#define MTK_2P5GPHY BIT_ULL(MTK_2P5GPHY_BIT) - #define MTK_ESW BIT_ULL(MTK_ESW_BIT) - #define MTK_GEPHY BIT_ULL(MTK_GEPHY_BIT) - #define MTK_MUX BIT_ULL(MTK_MUX_BIT) -@@ -971,6 +1085,8 @@ enum mkt_eth_capabilities { - BIT_ULL(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT) - #define MTK_ETH_MUX_U3_GMAC2_TO_QPHY \ - BIT_ULL(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT) -+#define MTK_ETH_MUX_GMAC2_TO_2P5GPHY \ -+ BIT_ULL(MTK_ETH_MUX_GMAC2_TO_2P5GPHY_BIT) - #define MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII \ - BIT_ULL(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT) - #define MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII \ -@@ -986,6 +1102,7 @@ enum mkt_eth_capabilities { - #define MTK_ETH_PATH_GMAC1_SGMII BIT_ULL(MTK_ETH_PATH_GMAC1_SGMII_BIT) - #define MTK_ETH_PATH_GMAC2_RGMII BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT) - #define MTK_ETH_PATH_GMAC2_SGMII BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT) -+#define MTK_ETH_PATH_GMAC2_2P5GPHY BIT_ULL(MTK_ETH_PATH_GMAC2_2P5GPHY_BIT) - #define MTK_ETH_PATH_GMAC2_GEPHY BIT_ULL(MTK_ETH_PATH_GMAC2_GEPHY_BIT) - #define MTK_ETH_PATH_GMAC3_SGMII BIT_ULL(MTK_ETH_PATH_GMAC3_SGMII_BIT) - #define MTK_ETH_PATH_GDM1_ESW BIT_ULL(MTK_ETH_PATH_GDM1_ESW_BIT) -@@ -999,6 +1116,7 @@ enum mkt_eth_capabilities { - #define MTK_GMAC2_RGMII (MTK_ETH_PATH_GMAC2_RGMII | MTK_RGMII) - #define MTK_GMAC2_SGMII (MTK_ETH_PATH_GMAC2_SGMII | MTK_SGMII) - #define MTK_GMAC2_GEPHY (MTK_ETH_PATH_GMAC2_GEPHY | MTK_GEPHY) -+#define MTK_GMAC2_2P5GPHY (MTK_ETH_PATH_GMAC2_2P5GPHY | MTK_2P5GPHY) - #define MTK_GMAC3_SGMII (MTK_ETH_PATH_GMAC3_SGMII | MTK_SGMII) - #define MTK_GDM1_ESW (MTK_ETH_PATH_GDM1_ESW | MTK_ESW) - #define MTK_GMAC1_USXGMII (MTK_ETH_PATH_GMAC1_USXGMII | MTK_USXGMII) -@@ -1022,6 +1140,10 @@ enum mkt_eth_capabilities { - (MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII | MTK_MUX | \ - MTK_SHARED_SGMII) - -+/* 2: GMAC2 -> XGMII */ -+#define MTK_MUX_GMAC2_TO_2P5GPHY \ -+ (MTK_ETH_MUX_GMAC2_TO_2P5GPHY | MTK_MUX | MTK_INFRA) -+ - /* 0: GMACx -> GEPHY, 1: GMACx -> SGMII where x is 1 or 2 */ - #define MTK_MUX_GMAC12_TO_GEPHY_SGMII \ - (MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII | MTK_MUX) -@@ -1080,7 +1202,8 @@ enum mkt_eth_capabilities { - MTK_MUX_GMAC123_TO_GEPHY_SGMII | \ - MTK_NETSYS_V3 | MTK_RSTCTRL_PPE1 | \ - MTK_GMAC1_USXGMII | MTK_GMAC2_USXGMII | \ -- MTK_GMAC3_USXGMII | MTK_MUX_GMAC123_TO_USXGMII) -+ MTK_GMAC3_USXGMII | MTK_MUX_GMAC123_TO_USXGMII | \ -+ MTK_GMAC2_2P5GPHY | MTK_MUX_GMAC2_TO_2P5GPHY) - - struct mtk_tx_dma_desc_info { - dma_addr_t addr; -@@ -1186,6 +1309,22 @@ struct mtk_soc_data { - - #define MTK_DMA_MONITOR_TIMEOUT msecs_to_jiffies(1000) - -+/* struct mtk_usxgmii_pcs - This structure holds each usxgmii regmap and -+ * associated data -+ * @regmap: The register map pointing at the range used to setup -+ * USXGMII modes -+ * @interface: Currently selected interface mode -+ * @id: The element is used to record the index of PCS -+ * @pcs: Phylink PCS structure -+ */ -+struct mtk_usxgmii_pcs { -+ struct mtk_eth *eth; -+ struct regmap *regmap; -+ phy_interface_t interface; -+ u8 id; -+ struct phylink_pcs pcs; -+}; -+ - /* struct mtk_eth - This is the main datasructure for holding the state - * of the driver - * @dev: The device pointer -@@ -1206,6 +1345,11 @@ struct mtk_soc_data { - * @infra: The register map pointing at the range used to setup - * SGMII and GePHY path - * @sgmii_pcs: Pointers to mtk-pcs-lynxi phylink_pcs instances -+ * @usxgmii_pll: The register map pointing at the range used to control -+ * the USXGMII SerDes PLL -+ * @regmap_pextp: The register map pointing at the range used to setup -+ * PHYA -+ * @usxgmii_pcs: Pointer to array of pointers to struct for USXGMII PCS - * @pctl: The register map pointing at the range used to setup - * GMAC port drive/slew values - * @dma_refcnt: track how many netdevs are using the DMA engine -@@ -1247,7 +1391,11 @@ struct mtk_eth { - unsigned long sysclk; - struct regmap *ethsys; - struct regmap *infra; -+ struct regmap *toprgu; - struct phylink_pcs **sgmii_pcs; -+ struct regmap *usxgmii_pll; -+ struct regmap **regmap_pextp; -+ struct mtk_usxgmii_pcs **usxgmii_pcs; - struct regmap *pctl; - bool hwlro; - refcount_t dma_refcnt; -@@ -1403,6 +1551,19 @@ static inline u32 mtk_get_ib2_multicast_ - return MTK_FOE_IB2_MULTICAST; - } - -+static inline bool mtk_interface_mode_is_xgmii(phy_interface_t interface) -+{ -+ switch (interface) { -+ case PHY_INTERFACE_MODE_USXGMII: -+ case PHY_INTERFACE_MODE_10GKR: -+ case PHY_INTERFACE_MODE_5GBASER: -+ return true; -+ break; -+ default: -+ return false; -+ } -+} -+ - /* read the hardware status register */ - void mtk_stats_update_mac(struct mtk_mac *mac); - -@@ -1410,8 +1571,10 @@ void mtk_w32(struct mtk_eth *eth, u32 va - u32 mtk_r32(struct mtk_eth *eth, unsigned reg); - - int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id); -+int mtk_gmac_2p5gphy_path_setup(struct mtk_eth *eth, int mac_id); - int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id); - int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id); -+int mtk_gmac_usxgmii_path_setup(struct mtk_eth *eth, int mac_id); - - int mtk_eth_offload_init(struct mtk_eth *eth); - int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type, -@@ -1421,5 +1584,20 @@ int mtk_flow_offload_cmd(struct mtk_eth - void mtk_flow_offload_cleanup(struct mtk_eth *eth, struct list_head *list); - void mtk_eth_set_dma_device(struct mtk_eth *eth, struct device *dma_dev); - -+#ifdef CONFIG_NET_MEDIATEK_SOC_USXGMII -+struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int id); -+int mtk_usxgmii_init(struct mtk_eth *eth); -+int mtk_xfi_pll_enable(struct mtk_eth *eth); -+void mtk_sgmii_setup_phya_gen1(struct mtk_eth *eth, int mac_id); -+void mtk_sgmii_setup_phya_gen2(struct mtk_eth *eth, int mac_id); -+void mtk_sgmii_reset(struct mtk_eth *eth, int mac_id); -+#else -+static inline struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int id) { return NULL; } -+static inline int mtk_usxgmii_init(struct mtk_eth *eth) { return 0; } -+static inline int mtk_xfi_pll_enable(struct mtk_eth *eth) { return 0; } -+static inline void mtk_sgmii_setup_phya_gen1(struct mtk_eth *eth, int mac_id) { } -+static inline void mtk_sgmii_setup_phya_gen2(struct mtk_eth *eth, int mac_id) { } -+static inline void mtk_sgmii_reset(struct mtk_eth *eth, int mac_id) { } -+#endif /* NET_MEDIATEK_SOC_USXGMII */ - - #endif /* MTK_ETH_H */ ---- /dev/null -+++ b/drivers/net/ethernet/mediatek/mtk_usxgmii.c -@@ -0,0 +1,835 @@ -+/* SPDX-License-Identifier: GPL-2.0 -+ * -+ * Copyright (c) 2022 MediaTek Inc. -+ * Author: Henry Yen -+ * Daniel Golle -+ */ -+ -+#include -+#include -+#include -+#include "mtk_eth_soc.h" -+ -+static struct mtk_usxgmii_pcs *pcs_to_mtk_usxgmii_pcs(struct phylink_pcs *pcs) -+{ -+ return container_of(pcs, struct mtk_usxgmii_pcs, pcs); -+} -+ -+static int mtk_xfi_pextp_init(struct mtk_eth *eth) -+{ -+ struct device *dev = eth->dev; -+ struct device_node *r = dev->of_node; -+ struct device_node *np; -+ int i; -+ -+ eth->regmap_pextp = devm_kcalloc(dev, eth->soc->num_devs, sizeof(eth->regmap_pextp), GFP_KERNEL); -+ if (!eth->regmap_pextp) -+ return -ENOMEM; -+ -+ for (i = 0; i < eth->soc->num_devs; i++) { -+ np = of_parse_phandle(r, "mediatek,xfi_pextp", i); -+ if (!np) -+ break; -+ -+ eth->regmap_pextp[i] = syscon_node_to_regmap(np); -+ if (IS_ERR(eth->regmap_pextp[i])) -+ return PTR_ERR(eth->regmap_pextp[i]); -+ } -+ -+ return 0; -+} -+ -+static int mtk_xfi_pll_init(struct mtk_eth *eth) -+{ -+ struct device_node *r = eth->dev->of_node; -+ struct device_node *np; -+ -+ np = of_parse_phandle(r, "mediatek,xfi_pll", 0); -+ if (!np) -+ return -1; -+ -+ eth->usxgmii_pll = syscon_node_to_regmap(np); -+ if (IS_ERR(eth->usxgmii_pll)) -+ return PTR_ERR(eth->usxgmii_pll); -+ -+ return 0; -+} -+ -+static int mtk_toprgu_init(struct mtk_eth *eth) -+{ -+ struct device_node *r = eth->dev->of_node; -+ struct device_node *np; -+ -+ np = of_parse_phandle(r, "mediatek,toprgu", 0); -+ if (!np) -+ return -1; -+ -+ eth->toprgu = syscon_node_to_regmap(np); -+ if (IS_ERR(eth->toprgu)) -+ return PTR_ERR(eth->toprgu); -+ -+ return 0; -+} -+ -+int mtk_xfi_pll_enable(struct mtk_eth *eth) -+{ -+ u32 val = 0; -+ -+ if (!eth->usxgmii_pll) -+ return -EINVAL; -+ -+ /* Add software workaround for USXGMII PLL TCL issue */ -+ regmap_write(eth->usxgmii_pll, XFI_PLL_ANA_GLB8, RG_XFI_PLL_ANA_SWWA); -+ -+ regmap_read(eth->usxgmii_pll, XFI_PLL_DIG_GLB8, &val); -+ val |= RG_XFI_PLL_EN; -+ regmap_write(eth->usxgmii_pll, XFI_PLL_DIG_GLB8, val); -+ -+ return 0; -+} -+ -+static int mtk_mac2xgmii_id(struct mtk_eth *eth, int mac_id) -+{ -+ int xgmii_id = mac_id; -+ -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) { -+ switch (mac_id) { -+ case MTK_GMAC1_ID: -+ case MTK_GMAC2_ID: -+ xgmii_id = 1; -+ break; -+ case MTK_GMAC3_ID: -+ xgmii_id = 0; -+ break; -+ default: -+ xgmii_id = -1; -+ } -+ } -+ -+ return xgmii_id; -+} -+ -+static int mtk_xgmii2mac_id(struct mtk_eth *eth, int xgmii_id) -+{ -+ int mac_id = xgmii_id; -+ -+ if (MTK_HAS_CAPS(eth->soc->caps, MTK_NETSYS_V3)) { -+ switch (xgmii_id) { -+ case 0: -+ mac_id = 2; -+ break; -+ case 1: -+ mac_id = 1; -+ break; -+ default: -+ mac_id = -1; -+ } -+ } -+ -+ return mac_id; -+} -+ -+ -+static void mtk_usxgmii_setup_phya_usxgmii(struct mtk_usxgmii_pcs *mpcs) -+{ -+ struct regmap *pextp; -+ -+ if (!mpcs->eth) -+ return; -+ -+ pextp = mpcs->eth->regmap_pextp[mpcs->id]; -+ if (!pextp) -+ return; -+ -+ /* Setup operation mode */ -+ regmap_write(pextp, 0x9024, 0x00C9071C); -+ regmap_write(pextp, 0x2020, 0xAA8585AA); -+ regmap_write(pextp, 0x2030, 0x0C020707); -+ regmap_write(pextp, 0x2034, 0x0E050F0F); -+ regmap_write(pextp, 0x2040, 0x00140032); -+ regmap_write(pextp, 0x50F0, 0x00C014AA); -+ regmap_write(pextp, 0x50E0, 0x3777C12B); -+ regmap_write(pextp, 0x506C, 0x005F9CFF); -+ regmap_write(pextp, 0x5070, 0x9D9DFAFA); -+ regmap_write(pextp, 0x5074, 0x27273F3F); -+ regmap_write(pextp, 0x5078, 0xA7883C68); -+ regmap_write(pextp, 0x507C, 0x11661166); -+ regmap_write(pextp, 0x5080, 0x0E000AAF); -+ regmap_write(pextp, 0x5084, 0x08080D0D); -+ regmap_write(pextp, 0x5088, 0x02030909); -+ regmap_write(pextp, 0x50E4, 0x0C0C0000); -+ regmap_write(pextp, 0x50E8, 0x04040000); -+ regmap_write(pextp, 0x50EC, 0x0F0F0C06); -+ regmap_write(pextp, 0x50A8, 0x506E8C8C); -+ regmap_write(pextp, 0x6004, 0x18190000); -+ regmap_write(pextp, 0x00F8, 0x01423342); -+ /* Force SGDT_OUT off and select PCS */ -+ regmap_write(pextp, 0x00F4, 0x80201F20); -+ /* Force GLB_CKDET_OUT */ -+ regmap_write(pextp, 0x0030, 0x00050C00); -+ /* Force AEQ on */ -+ regmap_write(pextp, 0x0070, 0x02002800); -+ ndelay(1020); -+ /* Setup DA default value */ -+ regmap_write(pextp, 0x30B0, 0x00000020); -+ regmap_write(pextp, 0x3028, 0x00008A01); -+ regmap_write(pextp, 0x302C, 0x0000A884); -+ regmap_write(pextp, 0x3024, 0x00083002); -+ regmap_write(pextp, 0x3010, 0x00022220); -+ regmap_write(pextp, 0x5064, 0x0F020A01); -+ regmap_write(pextp, 0x50B4, 0x06100600); -+ regmap_write(pextp, 0x3048, 0x40704000); -+ regmap_write(pextp, 0x3050, 0xA8000000); -+ regmap_write(pextp, 0x3054, 0x000000AA); -+ regmap_write(pextp, 0x306C, 0x00000F00); -+ regmap_write(pextp, 0xA060, 0x00040000); -+ regmap_write(pextp, 0x90D0, 0x00000001); -+ /* Release reset */ -+ regmap_write(pextp, 0x0070, 0x0200E800); -+ udelay(150); -+ /* Switch to P0 */ -+ regmap_write(pextp, 0x0070, 0x0200C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0200C101); -+ udelay(15); -+ /* Switch to Gen3 */ -+ regmap_write(pextp, 0x0070, 0x0202C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0202C101); -+ udelay(100); -+ regmap_write(pextp, 0x30B0, 0x00000030); -+ regmap_write(pextp, 0x00F4, 0x80201F00); -+ regmap_write(pextp, 0x3040, 0x30000000); -+ udelay(400); -+} -+ -+static void mtk_usxgmii_setup_phya_5gbaser(struct mtk_usxgmii_pcs *mpcs) -+{ -+ struct regmap *pextp; -+ -+ if (!mpcs->eth) -+ return; -+ -+ pextp = mpcs->eth->regmap_pextp[mpcs->id]; -+ if (!pextp) -+ return; -+ -+ /* Setup operation mode */ -+ regmap_write(pextp, 0x9024, 0x00D9071C); -+ regmap_write(pextp, 0x2020, 0xAAA5A5AA); -+ regmap_write(pextp, 0x2030, 0x0C020707); -+ regmap_write(pextp, 0x2034, 0x0E050F0F); -+ regmap_write(pextp, 0x2040, 0x00140032); -+ regmap_write(pextp, 0x50F0, 0x00C018AA); -+ regmap_write(pextp, 0x50E0, 0x3777812B); -+ regmap_write(pextp, 0x506C, 0x005C9CFF); -+ regmap_write(pextp, 0x5070, 0x9DFAFAFA); -+ regmap_write(pextp, 0x5074, 0x273F3F3F); -+ regmap_write(pextp, 0x5078, 0xA8883868); -+ regmap_write(pextp, 0x507C, 0x14661466); -+ regmap_write(pextp, 0x5080, 0x0E001ABF); -+ regmap_write(pextp, 0x5084, 0x080B0D0D); -+ regmap_write(pextp, 0x5088, 0x02050909); -+ regmap_write(pextp, 0x50E4, 0x0C000000); -+ regmap_write(pextp, 0x50E8, 0x04000000); -+ regmap_write(pextp, 0x50EC, 0x0F0F0C06); -+ regmap_write(pextp, 0x50A8, 0x50808C8C); -+ regmap_write(pextp, 0x6004, 0x18000000); -+ regmap_write(pextp, 0x00F8, 0x00A132A1); -+ /* Force SGDT_OUT off and select PCS */ -+ regmap_write(pextp, 0x00F4, 0x80201F20); -+ /* Force GLB_CKDET_OUT */ -+ regmap_write(pextp, 0x0030, 0x00050C00); -+ /* Force AEQ on */ -+ regmap_write(pextp, 0x0070, 0x02002800); -+ ndelay(1020); -+ /* Setup DA default value */ -+ regmap_write(pextp, 0x30B0, 0x00000020); -+ regmap_write(pextp, 0x3028, 0x00008A01); -+ regmap_write(pextp, 0x302C, 0x0000A884); -+ regmap_write(pextp, 0x3024, 0x00083002); -+ regmap_write(pextp, 0x3010, 0x00022220); -+ regmap_write(pextp, 0x5064, 0x0F020A01); -+ regmap_write(pextp, 0x50B4, 0x06100600); -+ regmap_write(pextp, 0x3048, 0x40704000); -+ regmap_write(pextp, 0x3050, 0xA8000000); -+ regmap_write(pextp, 0x3054, 0x000000AA); -+ regmap_write(pextp, 0x306C, 0x00000F00); -+ regmap_write(pextp, 0xA060, 0x00040000); -+ regmap_write(pextp, 0x90D0, 0x00000003); -+ /* Release reset */ -+ regmap_write(pextp, 0x0070, 0x0200E800); -+ udelay(150); -+ /* Switch to P0 */ -+ regmap_write(pextp, 0x0070, 0x0200C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0200C101); -+ udelay(15); -+ /* Switch to Gen3 */ -+ regmap_write(pextp, 0x0070, 0x0202C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0202C101); -+ udelay(100); -+ regmap_write(pextp, 0x30B0, 0x00000030); -+ regmap_write(pextp, 0x00F4, 0x80201F00); -+ regmap_write(pextp, 0x3040, 0x30000000); -+ udelay(400); -+} -+ -+static void mtk_usxgmii_setup_phya_10gbaser(struct mtk_usxgmii_pcs *mpcs) -+{ -+ struct regmap *pextp; -+ -+ if (!mpcs->eth) -+ return; -+ -+ pextp = mpcs->eth->regmap_pextp[mpcs->id]; -+ if (!pextp) -+ return; -+ -+ /* Setup operation mode */ -+ regmap_write(pextp, 0x9024, 0x00C9071C); -+ regmap_write(pextp, 0x2020, 0xAA8585AA); -+ regmap_write(pextp, 0x2030, 0x0C020707); -+ regmap_write(pextp, 0x2034, 0x0E050F0F); -+ regmap_write(pextp, 0x2040, 0x00140032); -+ regmap_write(pextp, 0x50F0, 0x00C014AA); -+ regmap_write(pextp, 0x50E0, 0x3777C12B); -+ regmap_write(pextp, 0x506C, 0x005F9CFF); -+ regmap_write(pextp, 0x5070, 0x9D9DFAFA); -+ regmap_write(pextp, 0x5074, 0x27273F3F); -+ regmap_write(pextp, 0x5078, 0xA7883C68); -+ regmap_write(pextp, 0x507C, 0x11661166); -+ regmap_write(pextp, 0x5080, 0x0E000AAF); -+ regmap_write(pextp, 0x5084, 0x08080D0D); -+ regmap_write(pextp, 0x5088, 0x02030909); -+ regmap_write(pextp, 0x50E4, 0x0C0C0000); -+ regmap_write(pextp, 0x50E8, 0x04040000); -+ regmap_write(pextp, 0x50EC, 0x0F0F0C06); -+ regmap_write(pextp, 0x50A8, 0x506E8C8C); -+ regmap_write(pextp, 0x6004, 0x18190000); -+ regmap_write(pextp, 0x00F8, 0x01423342); -+ /* Force SGDT_OUT off and select PCS */ -+ regmap_write(pextp, 0x00F4, 0x80201F20); -+ /* Force GLB_CKDET_OUT */ -+ regmap_write(pextp, 0x0030, 0x00050C00); -+ /* Force AEQ on */ -+ regmap_write(pextp, 0x0070, 0x02002800); -+ ndelay(1020); -+ /* Setup DA default value */ -+ regmap_write(pextp, 0x30B0, 0x00000020); -+ regmap_write(pextp, 0x3028, 0x00008A01); -+ regmap_write(pextp, 0x302C, 0x0000A884); -+ regmap_write(pextp, 0x3024, 0x00083002); -+ regmap_write(pextp, 0x3010, 0x00022220); -+ regmap_write(pextp, 0x5064, 0x0F020A01); -+ regmap_write(pextp, 0x50B4, 0x06100600); -+ regmap_write(pextp, 0x3048, 0x47684100); -+ regmap_write(pextp, 0x3050, 0x00000000); -+ regmap_write(pextp, 0x3054, 0x00000000); -+ regmap_write(pextp, 0x306C, 0x00000F00); -+ if (mpcs->id == 0) -+ regmap_write(pextp, 0xA008, 0x0007B400); -+ -+ regmap_write(pextp, 0xA060, 0x00040000); -+ regmap_write(pextp, 0x90D0, 0x00000001); -+ /* Release reset */ -+ regmap_write(pextp, 0x0070, 0x0200E800); -+ udelay(150); -+ /* Switch to P0 */ -+ regmap_write(pextp, 0x0070, 0x0200C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0200C101); -+ udelay(15); -+ /* Switch to Gen3 */ -+ regmap_write(pextp, 0x0070, 0x0202C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0202C101); -+ udelay(100); -+ regmap_write(pextp, 0x30B0, 0x00000030); -+ regmap_write(pextp, 0x00F4, 0x80201F00); -+ regmap_write(pextp, 0x3040, 0x30000000); -+ udelay(400); -+} -+ -+void mtk_sgmii_setup_phya_gen1(struct mtk_eth *eth, int mac_id) -+{ -+ u32 id = mtk_mac2xgmii_id(eth, mac_id); -+ struct regmap *pextp; -+ -+ if (id >= eth->soc->num_devs) -+ return; -+ -+ pextp = eth->regmap_pextp[id]; -+ if (!pextp) -+ return; -+ -+ /* Setup operation mode */ -+ regmap_write(pextp, 0x9024, 0x00D9071C); -+ regmap_write(pextp, 0x2020, 0xAA8585AA); -+ regmap_write(pextp, 0x2030, 0x0C020207); -+ regmap_write(pextp, 0x2034, 0x0E05050F); -+ regmap_write(pextp, 0x2040, 0x00200032); -+ regmap_write(pextp, 0x50F0, 0x00C014BA); -+ regmap_write(pextp, 0x50E0, 0x3777C12B); -+ regmap_write(pextp, 0x506C, 0x005F9CFF); -+ regmap_write(pextp, 0x5070, 0x9D9DFAFA); -+ regmap_write(pextp, 0x5074, 0x27273F3F); -+ regmap_write(pextp, 0x5078, 0xA7883C68); -+ regmap_write(pextp, 0x507C, 0x11661166); -+ regmap_write(pextp, 0x5080, 0x0E000EAF); -+ regmap_write(pextp, 0x5084, 0x08080E0D); -+ regmap_write(pextp, 0x5088, 0x02030B09); -+ regmap_write(pextp, 0x50E4, 0x0C0C0000); -+ regmap_write(pextp, 0x50E8, 0x04040000); -+ regmap_write(pextp, 0x50EC, 0x0F0F0606); -+ regmap_write(pextp, 0x50A8, 0x506E8C8C); -+ regmap_write(pextp, 0x6004, 0x18190000); -+ regmap_write(pextp, 0x00F8, 0x00FA32FA); -+ /* Force SGDT_OUT off and select PCS */ -+ regmap_write(pextp, 0x00F4, 0x80201F21); -+ /* Force GLB_CKDET_OUT */ -+ regmap_write(pextp, 0x0030, 0x00050C00); -+ /* Force AEQ on */ -+ regmap_write(pextp, 0x0070, 0x02002800); -+ ndelay(1020); -+ /* Setup DA default value */ -+ regmap_write(pextp, 0x30B0, 0x00000020); -+ regmap_write(pextp, 0x3028, 0x00008A01); -+ regmap_write(pextp, 0x302C, 0x0000A884); -+ regmap_write(pextp, 0x3024, 0x00083002); -+ regmap_write(pextp, 0x3010, 0x00011110); -+ regmap_write(pextp, 0x3048, 0x40704000); -+ regmap_write(pextp, 0x3064, 0x0000C000); -+ regmap_write(pextp, 0x3050, 0xA8000000); -+ regmap_write(pextp, 0x3054, 0x000000AA); -+ regmap_write(pextp, 0x306C, 0x20200F00); -+ regmap_write(pextp, 0xA060, 0x00050000); -+ regmap_write(pextp, 0x90D0, 0x00000007); -+ /* Release reset */ -+ regmap_write(pextp, 0x0070, 0x0200E800); -+ udelay(150); -+ /* Switch to P0 */ -+ regmap_write(pextp, 0x0070, 0x0200C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0200C101); -+ udelay(15); -+ /* Switch to Gen2 */ -+ regmap_write(pextp, 0x0070, 0x0201C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0201C101); -+ udelay(100); -+ regmap_write(pextp, 0x30B0, 0x00000030); -+ regmap_write(pextp, 0x00F4, 0x80201F01); -+ regmap_write(pextp, 0x3040, 0x30000000); -+ udelay(400); -+} -+ -+void mtk_sgmii_setup_phya_gen2(struct mtk_eth *eth, int mac_id) -+{ -+ u32 id = mtk_mac2xgmii_id(eth, mac_id); -+ struct regmap *pextp; -+ -+ if (id >= eth->soc->num_devs) -+ return; -+ -+ pextp = eth->regmap_pextp[id]; -+ if (!pextp) -+ return; -+ -+ /* Setup operation mode */ -+ regmap_write(pextp, 0x9024, 0x00D9071C); -+ regmap_write(pextp, 0x2020, 0xAA8585AA); -+ regmap_write(pextp, 0x2030, 0x0C020707); -+ regmap_write(pextp, 0x2034, 0x0E050F0F); -+ regmap_write(pextp, 0x2040, 0x00140032); -+ regmap_write(pextp, 0x50F0, 0x00C014AA); -+ regmap_write(pextp, 0x50E0, 0x3777C12B); -+ regmap_write(pextp, 0x506C, 0x005F9CFF); -+ regmap_write(pextp, 0x5070, 0x9D9DFAFA); -+ regmap_write(pextp, 0x5074, 0x27273F3F); -+ regmap_write(pextp, 0x5078, 0xA7883C68); -+ regmap_write(pextp, 0x507C, 0x11661166); -+ regmap_write(pextp, 0x5080, 0x0E000AAF); -+ regmap_write(pextp, 0x5084, 0x08080D0D); -+ regmap_write(pextp, 0x5088, 0x02030909); -+ regmap_write(pextp, 0x50E4, 0x0C0C0000); -+ regmap_write(pextp, 0x50E8, 0x04040000); -+ regmap_write(pextp, 0x50EC, 0x0F0F0C06); -+ regmap_write(pextp, 0x50A8, 0x506E8C8C); -+ regmap_write(pextp, 0x6004, 0x18190000); -+ regmap_write(pextp, 0x00F8, 0x009C329C); -+ /* Force SGDT_OUT off and select PCS */ -+ regmap_write(pextp, 0x00F4, 0x80201F21); -+ /* Force GLB_CKDET_OUT */ -+ regmap_write(pextp, 0x0030, 0x00050C00); -+ /* Force AEQ on */ -+ regmap_write(pextp, 0x0070, 0x02002800); -+ ndelay(1020); -+ /* Setup DA default value */ -+ regmap_write(pextp, 0x30B0, 0x00000020); -+ regmap_write(pextp, 0x3028, 0x00008A01); -+ regmap_write(pextp, 0x302C, 0x0000A884); -+ regmap_write(pextp, 0x3024, 0x00083002); -+ regmap_write(pextp, 0x3010, 0x00011110); -+ regmap_write(pextp, 0x3048, 0x40704000); -+ regmap_write(pextp, 0x3050, 0xA8000000); -+ regmap_write(pextp, 0x3054, 0x000000AA); -+ regmap_write(pextp, 0x306C, 0x22000F00); -+ regmap_write(pextp, 0xA060, 0x00050000); -+ regmap_write(pextp, 0x90D0, 0x00000005); -+ /* Release reset */ -+ regmap_write(pextp, 0x0070, 0x0200E800); -+ udelay(150); -+ /* Switch to P0 */ -+ regmap_write(pextp, 0x0070, 0x0200C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0200C101); -+ udelay(15); -+ /* Switch to Gen2 */ -+ regmap_write(pextp, 0x0070, 0x0201C111); -+ ndelay(1020); -+ regmap_write(pextp, 0x0070, 0x0201C101); -+ udelay(100); -+ regmap_write(pextp, 0x30B0, 0x00000030); -+ regmap_write(pextp, 0x00F4, 0x80201F01); -+ regmap_write(pextp, 0x3040, 0x30000000); -+ udelay(400); -+} -+ -+static void mtk_usxgmii_reset(struct mtk_eth *eth, int id) -+{ -+ u32 val = 0; -+ -+ if (id >= eth->soc->num_devs || !eth->toprgu) -+ return; -+ -+ switch (id) { -+ case 0: -+ /* Enable software reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST_EN, &val); -+ val |= SWSYSRST_XFI_PEXPT0_GRST | -+ SWSYSRST_XFI0_GRST; -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST_EN, val); -+ -+ /* Assert USXGMII reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); -+ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88) | -+ SWSYSRST_XFI_PEXPT0_GRST | -+ SWSYSRST_XFI0_GRST; -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); -+ -+ udelay(100); -+ -+ /* De-assert USXGMII reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); -+ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88); -+ val &= ~(SWSYSRST_XFI_PEXPT0_GRST | -+ SWSYSRST_XFI0_GRST); -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); -+ -+ /* Disable software reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST_EN, &val); -+ val &= ~(SWSYSRST_XFI_PEXPT0_GRST | -+ SWSYSRST_XFI0_GRST); -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST_EN, val); -+ break; -+ case 1: -+ /* Enable software reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST_EN, &val); -+ val |= SWSYSRST_XFI_PEXPT1_GRST | -+ SWSYSRST_XFI1_GRST; -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST_EN, val); -+ -+ /* Assert USXGMII reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); -+ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88) | -+ SWSYSRST_XFI_PEXPT1_GRST | -+ SWSYSRST_XFI1_GRST; -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); -+ -+ udelay(100); -+ -+ /* De-assert USXGMII reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); -+ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88); -+ val &= ~(SWSYSRST_XFI_PEXPT1_GRST | -+ SWSYSRST_XFI1_GRST); -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); -+ -+ /* Disable software reset */ -+ regmap_read(eth->toprgu, TOPRGU_SWSYSRST_EN, &val); -+ val &= ~(SWSYSRST_XFI_PEXPT1_GRST | -+ SWSYSRST_XFI1_GRST); -+ regmap_write(eth->toprgu, TOPRGU_SWSYSRST_EN, val); -+ break; -+ } -+ -+ mdelay(10); -+} -+ -+void mtk_sgmii_reset(struct mtk_eth *eth, int mac_id) -+{ -+ u32 xgmii_id = mtk_mac2xgmii_id(eth, mac_id); -+ -+ mtk_usxgmii_reset(eth, xgmii_id); -+} -+ -+ -+static int mtk_usxgmii_pcs_config(struct phylink_pcs *pcs, unsigned int mode, -+ phy_interface_t interface, -+ const unsigned long *advertising, -+ bool permit_pause_to_mac) -+{ -+ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs); -+ struct mtk_eth *eth = mpcs->eth; -+ unsigned int an_ctrl = 0, link_timer = 0, xfi_mode = 0, adapt_mode = 0; -+ bool mode_changed = false; -+ -+ if (interface == PHY_INTERFACE_MODE_USXGMII) { -+ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0x1FF) | -+ USXGMII_AN_ENABLE; -+ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x7B) | -+ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x7B) | -+ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x7B); -+ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_10G) | -+ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_10G); -+ } else if (interface == PHY_INTERFACE_MODE_10GKR) { -+ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0x1FF); -+ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x7B) | -+ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x7B) | -+ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x7B); -+ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_10G) | -+ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_10G); -+ adapt_mode = USXGMII_RATE_UPDATE_MODE; -+ } else if (interface == PHY_INTERFACE_MODE_5GBASER) { -+ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0xFF); -+ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x3D) | -+ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x3D) | -+ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x3D); -+ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_5G) | -+ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_5G); -+ adapt_mode = USXGMII_RATE_UPDATE_MODE; -+ } else -+ return -EINVAL; -+ -+ adapt_mode |= FIELD_PREP(USXGMII_RATE_ADAPT_MODE, USXGMII_RATE_ADAPT_MODE_X1); -+ -+ if (mpcs->interface != interface) { -+ mpcs->interface = interface; -+ mode_changed = true; -+ } -+ -+ mtk_xfi_pll_enable(eth); -+ mtk_usxgmii_reset(eth, mpcs->id); -+ -+ /* Setup USXGMII AN ctrl */ -+ regmap_update_bits(mpcs->regmap, RG_PCS_AN_CTRL0, -+ USXGMII_AN_SYNC_CNT | USXGMII_AN_ENABLE, -+ an_ctrl); -+ -+ regmap_update_bits(mpcs->regmap, RG_PCS_AN_CTRL2, -+ USXGMII_LINK_TIMER_IDLE_DETECT | -+ USXGMII_LINK_TIMER_COMP_ACK_DETECT | -+ USXGMII_LINK_TIMER_AN_RESTART, -+ link_timer); -+ -+ /* Gated MAC CK */ -+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, -+ USXGMII_MAC_CK_GATED, USXGMII_MAC_CK_GATED); -+ -+ /* Enable interface force mode */ -+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, -+ USXGMII_IF_FORCE_EN, USXGMII_IF_FORCE_EN); -+ -+ /* Setup USXGMII adapt mode */ -+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, -+ USXGMII_RATE_UPDATE_MODE | USXGMII_RATE_ADAPT_MODE, -+ adapt_mode); -+ -+ /* Setup USXGMII speed */ -+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, -+ USXGMII_XFI_RX_MODE | USXGMII_XFI_TX_MODE, -+ xfi_mode); -+ -+ udelay(1); -+ -+ /* Un-gated MAC CK */ -+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, -+ USXGMII_MAC_CK_GATED, 0); -+ -+ udelay(1); -+ -+ /* Disable interface force mode for the AN mode */ -+ if (an_ctrl & USXGMII_AN_ENABLE) -+ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, -+ USXGMII_IF_FORCE_EN, 0); -+ -+ /* Setup USXGMIISYS with the determined property */ -+ if (interface == PHY_INTERFACE_MODE_USXGMII) -+ mtk_usxgmii_setup_phya_usxgmii(mpcs); -+ else if (interface == PHY_INTERFACE_MODE_10GKR) -+ mtk_usxgmii_setup_phya_10gbaser(mpcs); -+ else if (interface == PHY_INTERFACE_MODE_5GBASER) -+ mtk_usxgmii_setup_phya_5gbaser(mpcs); -+ -+ return mode_changed; -+} -+ -+static void mtk_usxgmii_pcs_get_state(struct phylink_pcs *pcs, -+ struct phylink_link_state *state) -+{ -+ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs); -+ struct mtk_eth *eth = mpcs->eth; -+ struct mtk_mac *mac = eth->mac[mtk_xgmii2mac_id(eth, mpcs->id)]; -+ u32 val = 0; -+ -+ regmap_read(mpcs->regmap, RG_PCS_AN_CTRL0, &val); -+ if (FIELD_GET(USXGMII_AN_ENABLE, val)) { -+ /* Refresh LPA by inverting LPA_LATCH */ -+ regmap_read(mpcs->regmap, RG_PCS_AN_STS0, &val); -+ regmap_update_bits(mpcs->regmap, RG_PCS_AN_STS0, -+ USXGMII_LPA_LATCH, -+ !(val & USXGMII_LPA_LATCH)); -+ -+ regmap_read(mpcs->regmap, RG_PCS_AN_STS0, &val); -+ -+ state->interface = mpcs->interface; -+ state->link = FIELD_GET(USXGMII_LPA_LINK, val); -+ state->duplex = FIELD_GET(USXGMII_LPA_DUPLEX, val); -+ -+ switch (FIELD_GET(USXGMII_LPA_SPEED_MASK, val)) { -+ case USXGMII_LPA_SPEED_10: -+ state->speed = SPEED_10; -+ break; -+ case USXGMII_LPA_SPEED_100: -+ state->speed = SPEED_100; -+ break; -+ case USXGMII_LPA_SPEED_1000: -+ state->speed = SPEED_1000; -+ break; -+ case USXGMII_LPA_SPEED_2500: -+ state->speed = SPEED_2500; -+ break; -+ case USXGMII_LPA_SPEED_5000: -+ state->speed = SPEED_5000; -+ break; -+ case USXGMII_LPA_SPEED_10000: -+ state->speed = SPEED_10000; -+ break; -+ } -+ } else { -+ val = mtk_r32(mac->hw, MTK_XGMAC_STS(mac->id)); -+ -+ if (mac->id == MTK_GMAC2_ID) -+ val = val >> 16; -+ -+ switch (FIELD_GET(MTK_USXGMII_PCS_MODE, val)) { -+ case 0: -+ state->speed = SPEED_10000; -+ break; -+ case 1: -+ state->speed = SPEED_5000; -+ break; -+ case 2: -+ state->speed = SPEED_2500; -+ break; -+ case 3: -+ state->speed = SPEED_1000; -+ break; -+ } -+ -+ state->interface = mpcs->interface; -+ state->link = FIELD_GET(MTK_USXGMII_PCS_LINK, val); -+ state->duplex = DUPLEX_FULL; -+ } -+ -+ if (state->link == 0) -+ mtk_usxgmii_pcs_config(pcs, MLO_AN_INBAND, -+ state->interface, NULL, false); -+} -+ -+static void mtk_usxgmii_pcs_restart_an(struct phylink_pcs *pcs) -+{ -+ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs); -+ unsigned int val = 0; -+ -+ if (!mpcs->regmap) -+ return; -+ -+ regmap_read(mpcs->regmap, RG_PCS_AN_CTRL0, &val); -+ val |= USXGMII_AN_RESTART; -+ regmap_write(mpcs->regmap, RG_PCS_AN_CTRL0, val); -+} -+ -+static void mtk_usxgmii_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode, -+ phy_interface_t interface, -+ int speed, int duplex) -+{ -+ /* Reconfiguring USXGMII to ensure the quality of the RX signal -+ * after the line side link up. -+ */ -+ mtk_usxgmii_pcs_config(pcs, mode, -+ interface, NULL, false); -+} -+ -+static const struct phylink_pcs_ops mtk_usxgmii_pcs_ops = { -+ .pcs_config = mtk_usxgmii_pcs_config, -+ .pcs_get_state = mtk_usxgmii_pcs_get_state, -+ .pcs_an_restart = mtk_usxgmii_pcs_restart_an, -+ .pcs_link_up = mtk_usxgmii_pcs_link_up, -+}; -+ -+int mtk_usxgmii_init(struct mtk_eth *eth) -+{ -+ struct device_node *r = eth->dev->of_node; -+ struct device *dev = eth->dev; -+ struct device_node *np; -+ int i, ret; -+ -+ eth->usxgmii_pcs = devm_kcalloc(dev, eth->soc->num_devs, sizeof(eth->usxgmii_pcs), GFP_KERNEL); -+ if (!eth->usxgmii_pcs) -+ return -ENOMEM; -+ -+ for (i = 0; i < eth->soc->num_devs; i++) { -+ np = of_parse_phandle(r, "mediatek,usxgmiisys", i); -+ if (!np) -+ break; -+ -+ eth->usxgmii_pcs[i] = devm_kzalloc(dev, sizeof(*eth->usxgmii_pcs), GFP_KERNEL); -+ if (!eth->usxgmii_pcs[i]) -+ return -ENOMEM; -+ -+ eth->usxgmii_pcs[i]->id = i; -+ eth->usxgmii_pcs[i]->eth = eth; -+ eth->usxgmii_pcs[i]->regmap = syscon_node_to_regmap(np); -+ if (IS_ERR(eth->usxgmii_pcs[i]->regmap)) -+ return PTR_ERR(eth->usxgmii_pcs[i]->regmap); -+ -+ eth->usxgmii_pcs[i]->pcs.ops = &mtk_usxgmii_pcs_ops; -+ eth->usxgmii_pcs[i]->pcs.poll = true; -+ eth->usxgmii_pcs[i]->interface = PHY_INTERFACE_MODE_NA; -+ -+ of_node_put(np); -+ } -+ -+ ret = mtk_xfi_pextp_init(eth); -+ if (ret) -+ return ret; -+ -+ ret = mtk_xfi_pll_init(eth); -+ if (ret) -+ return ret; -+ -+ return mtk_toprgu_init(eth); -+} -+ -+struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int mac_id) -+{ -+ u32 xgmii_id = mtk_mac2xgmii_id(eth, mac_id); -+ -+ if (!eth->usxgmii_pcs[xgmii_id]->regmap) -+ return NULL; -+ -+ return ð->usxgmii_pcs[xgmii_id]->pcs; -+} diff --git a/target/linux/generic/pending-6.1/737-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch b/target/linux/generic/pending-6.1/737-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch new file mode 100644 index 000000000..519ece669 --- /dev/null +++ b/target/linux/generic/pending-6.1/737-net-ethernet-mtk_eth_soc-add-paths-and-SerDes-modes-.patch @@ -0,0 +1,1604 @@ +From 1e25ca1147579bda8b941be1b9851f5911d44eb0 Mon Sep 17 00:00:00 2001 +From: Daniel Golle +Date: Tue, 22 Aug 2023 19:04:42 +0100 +Subject: [PATCH 098/125] net: ethernet: mtk_eth_soc: add paths and SerDes + modes for MT7988 + +MT7988 comes with a built-in 2.5G PHY as well as SerDes lanes to +connect external PHYs or transceivers in USXGMII, 10GBase-R, 5GBase-R, +2500Base-X, 1000Base-X and Cisco SGMII interface modes. + +Implement support for configuring for the new paths to SerDes interfaces +and the internal 2.5G PHY. + +Add USXGMII PCS driver for 10GBase-R, 5GBase-R and USXGMII mode, and +setup the new PHYA on MT7988 to access the also still existing old +LynxI PCS for 1000Base-X, 2500Base-X and Cisco SGMII PCS interface +modes. + +Signed-off-by: Daniel Golle +--- + drivers/net/ethernet/mediatek/Kconfig | 16 + + drivers/net/ethernet/mediatek/Makefile | 1 + + drivers/net/ethernet/mediatek/mtk_eth_path.c | 123 +++- + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 182 ++++- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 232 ++++++- + drivers/net/ethernet/mediatek/mtk_usxgmii.c | 692 +++++++++++++++++++ + 6 files changed, 1215 insertions(+), 31 deletions(-) + create mode 100644 drivers/net/ethernet/mediatek/mtk_usxgmii.c + +--- a/drivers/net/ethernet/mediatek/Kconfig ++++ b/drivers/net/ethernet/mediatek/Kconfig +@@ -25,6 +25,22 @@ config NET_MEDIATEK_SOC + This driver supports the gigabit ethernet MACs in the + MediaTek SoC family. + ++config NET_MEDIATEK_SOC_USXGMII ++ bool "Support USXGMII SerDes on MT7988" ++ depends on (ARCH_MEDIATEK && ARM64) || COMPILE_TEST ++ def_bool NET_MEDIATEK_SOC != n ++ help ++ Include support for 10GE SerDes which can be found on MT7988. ++ If this kernel should run on SoCs with 10 GBit/s Ethernet you ++ will need to select this option to use GMAC2 and GMAC3 with ++ external PHYs, SFP(+) cages in 10GBase-R, 5GBase-R or USXGMII ++ interface modes. ++ ++ Note that as the 2500Base-X/1000Base-X/Cisco SGMII SerDes PCS ++ unit (MediaTek LynxI) in MT7988 is connected via the new 10GE ++ SerDes, you will also need to select this option in case you ++ want to use any of those SerDes modes. ++ + config NET_MEDIATEK_STAR_EMAC + tristate "MediaTek STAR Ethernet MAC support" + select PHYLIB +--- a/drivers/net/ethernet/mediatek/Makefile ++++ b/drivers/net/ethernet/mediatek/Makefile +@@ -5,6 +5,7 @@ + + obj-$(CONFIG_NET_MEDIATEK_SOC) += mtk_eth.o + mtk_eth-y := mtk_eth_soc.o mtk_eth_path.o mtk_ppe.o mtk_ppe_debugfs.o mtk_ppe_offload.o ++mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_USXGMII) += mtk_usxgmii.o + mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed.o mtk_wed_mcu.o mtk_wed_wo.o + ifdef CONFIG_DEBUG_FS + mtk_eth-$(CONFIG_NET_MEDIATEK_SOC_WED) += mtk_wed_debugfs.o +--- a/drivers/net/ethernet/mediatek/mtk_eth_path.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_path.c +@@ -31,10 +31,20 @@ static const char *mtk_eth_path_name(u64 + return "gmac2_rgmii"; + case MTK_ETH_PATH_GMAC2_SGMII: + return "gmac2_sgmii"; ++ case MTK_ETH_PATH_GMAC2_2P5GPHY: ++ return "gmac2_2p5gphy"; + case MTK_ETH_PATH_GMAC2_GEPHY: + return "gmac2_gephy"; ++ case MTK_ETH_PATH_GMAC3_SGMII: ++ return "gmac3_sgmii"; + case MTK_ETH_PATH_GDM1_ESW: + return "gdm1_esw"; ++ case MTK_ETH_PATH_GMAC1_USXGMII: ++ return "gmac1_usxgmii"; ++ case MTK_ETH_PATH_GMAC2_USXGMII: ++ return "gmac2_usxgmii"; ++ case MTK_ETH_PATH_GMAC3_USXGMII: ++ return "gmac3_usxgmii"; + default: + return "unknown path"; + } +@@ -127,6 +137,27 @@ static int set_mux_u3_gmac2_to_qphy(stru + return 0; + } + ++static int set_mux_gmac2_to_2p5gphy(struct mtk_eth *eth, u64 path) ++{ ++ int ret; ++ ++ if (path == MTK_ETH_PATH_GMAC2_2P5GPHY) { ++ ret = regmap_clear_bits(eth->ethsys, ETHSYS_SYSCFG0, SYSCFG0_SGMII_GMAC2_V2); ++ if (ret) ++ return ret; ++ ++ /* Setup mux to 2p5g PHY */ ++ ret = regmap_clear_bits(eth->infra, TOP_MISC_NETSYS_PCS_MUX, MUX_G2_USXGMII_SEL); ++ if (ret) ++ return ret; ++ ++ dev_dbg(eth->dev, "path %s in %s updated\n", ++ mtk_eth_path_name(path), __func__); ++ } ++ ++ return 0; ++} ++ + static int set_mux_gmac1_gmac2_to_sgmii_rgmii(struct mtk_eth *eth, u64 path) + { + unsigned int val = 0; +@@ -165,7 +196,48 @@ static int set_mux_gmac1_gmac2_to_sgmii_ + return 0; + } + +-static int set_mux_gmac12_to_gephy_sgmii(struct mtk_eth *eth, u64 path) ++static int set_mux_gmac123_to_usxgmii(struct mtk_eth *eth, u64 path) ++{ ++ unsigned int val = 0; ++ bool updated = true; ++ int mac_id = 0; ++ ++ /* Disable SYSCFG1 SGMII */ ++ regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); ++ ++ switch (path) { ++ case MTK_ETH_PATH_GMAC1_USXGMII: ++ val &= ~(u32)SYSCFG0_SGMII_GMAC1_V2; ++ mac_id = MTK_GMAC1_ID; ++ break; ++ case MTK_ETH_PATH_GMAC2_USXGMII: ++ val &= ~(u32)SYSCFG0_SGMII_GMAC2_V2; ++ mac_id = MTK_GMAC2_ID; ++ break; ++ case MTK_ETH_PATH_GMAC3_USXGMII: ++ val &= ~(u32)SYSCFG0_SGMII_GMAC3_V2; ++ mac_id = MTK_GMAC3_ID; ++ break; ++ default: ++ updated = false; ++ }; ++ ++ if (updated) { ++ regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, ++ SYSCFG0_SGMII_MASK, val); ++ ++ if (mac_id == MTK_GMAC2_ID) ++ regmap_set_bits(eth->infra, TOP_MISC_NETSYS_PCS_MUX, ++ MUX_G2_USXGMII_SEL); ++ } ++ ++ dev_dbg(eth->dev, "path %s in %s updated = %d\n", ++ mtk_eth_path_name(path), __func__, updated); ++ ++ return 0; ++} ++ ++static int set_mux_gmac123_to_gephy_sgmii(struct mtk_eth *eth, u64 path) + { + unsigned int val = 0; + bool updated = true; +@@ -182,6 +254,9 @@ static int set_mux_gmac12_to_gephy_sgmii + case MTK_ETH_PATH_GMAC2_SGMII: + val |= SYSCFG0_SGMII_GMAC2_V2; + break; ++ case MTK_ETH_PATH_GMAC3_SGMII: ++ val |= SYSCFG0_SGMII_GMAC3_V2; ++ break; + default: + updated = false; + } +@@ -210,13 +285,25 @@ static const struct mtk_eth_muxc mtk_eth + .cap_bit = MTK_ETH_MUX_U3_GMAC2_TO_QPHY, + .set_path = set_mux_u3_gmac2_to_qphy, + }, { ++ .name = "mux_gmac2_to_2p5gphy", ++ .cap_bit = MTK_ETH_MUX_GMAC2_TO_2P5GPHY, ++ .set_path = set_mux_gmac2_to_2p5gphy, ++ }, { + .name = "mux_gmac1_gmac2_to_sgmii_rgmii", + .cap_bit = MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII, + .set_path = set_mux_gmac1_gmac2_to_sgmii_rgmii, + }, { + .name = "mux_gmac12_to_gephy_sgmii", + .cap_bit = MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII, +- .set_path = set_mux_gmac12_to_gephy_sgmii, ++ .set_path = set_mux_gmac123_to_gephy_sgmii, ++ }, { ++ .name = "mux_gmac123_to_gephy_sgmii", ++ .cap_bit = MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII, ++ .set_path = set_mux_gmac123_to_gephy_sgmii, ++ }, { ++ .name = "mux_gmac123_to_usxgmii", ++ .cap_bit = MTK_ETH_MUX_GMAC123_TO_USXGMII, ++ .set_path = set_mux_gmac123_to_usxgmii, + }, + }; + +@@ -249,12 +336,39 @@ out: + return err; + } + ++int mtk_gmac_usxgmii_path_setup(struct mtk_eth *eth, int mac_id) ++{ ++ u64 path; ++ ++ path = (mac_id == MTK_GMAC1_ID) ? MTK_ETH_PATH_GMAC1_USXGMII : ++ (mac_id == MTK_GMAC2_ID) ? MTK_ETH_PATH_GMAC2_USXGMII : ++ MTK_ETH_PATH_GMAC3_USXGMII; ++ ++ /* Setup proper MUXes along the path */ ++ return mtk_eth_mux_setup(eth, path); ++} ++ + int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id) + { + u64 path; + +- path = (mac_id == 0) ? MTK_ETH_PATH_GMAC1_SGMII : +- MTK_ETH_PATH_GMAC2_SGMII; ++ path = (mac_id == MTK_GMAC1_ID) ? MTK_ETH_PATH_GMAC1_SGMII : ++ (mac_id == MTK_GMAC2_ID) ? MTK_ETH_PATH_GMAC2_SGMII : ++ MTK_ETH_PATH_GMAC3_SGMII; ++ ++ /* Setup proper MUXes along the path */ ++ return mtk_eth_mux_setup(eth, path); ++} ++ ++int mtk_gmac_2p5gphy_path_setup(struct mtk_eth *eth, int mac_id) ++{ ++ u64 path = 0; ++ ++ if (mac_id == MTK_GMAC2_ID) ++ path = MTK_ETH_PATH_GMAC2_2P5GPHY; ++ ++ if (!path) ++ return -EINVAL; + + /* Setup proper MUXes along the path */ + return mtk_eth_mux_setup(eth, path); +@@ -284,4 +398,3 @@ int mtk_gmac_rgmii_path_setup(struct mtk + /* Setup proper MUXes along the path */ + return mtk_eth_mux_setup(eth, path); + } +- +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -474,6 +474,30 @@ static void mtk_setup_bridge_switch(stru + MTK_GSW_CFG); + } + ++static bool mtk_check_gmac23_idle(struct mtk_mac *mac) ++{ ++ u32 mac_fsm, gdm_fsm; ++ ++ mac_fsm = mtk_r32(mac->hw, MTK_MAC_FSM(mac->id)); ++ ++ switch (mac->id) { ++ case MTK_GMAC2_ID: ++ gdm_fsm = mtk_r32(mac->hw, MTK_FE_GDM2_FSM); ++ break; ++ case MTK_GMAC3_ID: ++ gdm_fsm = mtk_r32(mac->hw, MTK_FE_GDM3_FSM); ++ break; ++ default: ++ return true; ++ }; ++ ++ if ((mac_fsm & 0xFFFF0000) == 0x01010000 && ++ (gdm_fsm & 0xFFFF0000) == 0x00000000) ++ return true; ++ ++ return false; ++} ++ + static struct phylink_pcs *mtk_mac_select_pcs(struct phylink_config *config, + phy_interface_t interface) + { +@@ -482,12 +506,20 @@ static struct phylink_pcs *mtk_mac_selec + struct mtk_eth *eth = mac->hw; + unsigned int sid; + +- if (interface == PHY_INTERFACE_MODE_SGMII || +- phy_interface_mode_is_8023z(interface)) { +- sid = (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_SGMII)) ? +- 0 : mac->id; +- +- return eth->sgmii_pcs[sid]; ++ if ((interface == PHY_INTERFACE_MODE_SGMII || ++ phy_interface_mode_is_8023z(interface)) && ++ MTK_HAS_CAPS(eth->soc->caps, MTK_SGMII)) { ++ sid = mtk_mac2xgmii_id(eth, mac->id); ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII)) ++ return mtk_sgmii_wrapper_select_pcs(eth, mac->id); ++ else ++ return eth->sgmii_pcs[sid]; ++ } else if ((interface == PHY_INTERFACE_MODE_USXGMII || ++ interface == PHY_INTERFACE_MODE_10GBASER || ++ interface == PHY_INTERFACE_MODE_5GBASER) && ++ MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII) && ++ mac->id != MTK_GMAC1_ID) { ++ return mtk_usxgmii_select_pcs(eth, mac->id); + } + + return NULL; +@@ -543,7 +575,22 @@ static void mtk_mac_config(struct phylin + goto init_err; + } + break; ++ case PHY_INTERFACE_MODE_USXGMII: ++ case PHY_INTERFACE_MODE_10GBASER: ++ case PHY_INTERFACE_MODE_5GBASER: ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII)) { ++ err = mtk_gmac_usxgmii_path_setup(eth, mac->id); ++ if (err) ++ goto init_err; ++ } ++ break; + case PHY_INTERFACE_MODE_INTERNAL: ++ if (mac->id == MTK_GMAC2_ID && ++ MTK_HAS_CAPS(eth->soc->caps, MTK_2P5GPHY)) { ++ err = mtk_gmac_2p5gphy_path_setup(eth, mac->id); ++ if (err) ++ goto init_err; ++ } + break; + default: + goto err_phy; +@@ -598,8 +645,6 @@ static void mtk_mac_config(struct phylin + val &= ~SYSCFG0_GE_MODE(SYSCFG0_GE_MASK, mac->id); + val |= SYSCFG0_GE_MODE(ge_mode, mac->id); + regmap_write(eth->ethsys, ETHSYS_SYSCFG0, val); +- +- mac->interface = state->interface; + } + + /* SGMII */ +@@ -616,21 +661,40 @@ static void mtk_mac_config(struct phylin + + /* Save the syscfg0 value for mac_finish */ + mac->syscfg0 = val; +- } else if (phylink_autoneg_inband(mode)) { ++ } else if (state->interface != PHY_INTERFACE_MODE_USXGMII && ++ state->interface != PHY_INTERFACE_MODE_10GBASER && ++ state->interface != PHY_INTERFACE_MODE_5GBASER && ++ phylink_autoneg_inband(mode)) { + dev_err(eth->dev, +- "In-band mode not supported in non SGMII mode!\n"); ++ "In-band mode not supported in non-SerDes modes!\n"); + return; + } + + /* Setup gmac */ +- if (mtk_is_netsys_v3_or_greater(eth) && +- mac->interface == PHY_INTERFACE_MODE_INTERNAL) { +- mtk_w32(mac->hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac->id)); +- mtk_w32(mac->hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac->id)); ++ if (mtk_is_netsys_v3_or_greater(eth)) { ++ if (mtk_interface_mode_is_xgmii(state->interface)) { ++ mtk_w32(mac->hw, MTK_GDMA_XGDM_SEL, MTK_GDMA_EG_CTRL(mac->id)); ++ mtk_w32(mac->hw, MAC_MCR_FORCE_LINK_DOWN, MTK_MAC_MCR(mac->id)); ++ ++ if (mac->id == MTK_GMAC1_ID) ++ mtk_setup_bridge_switch(eth); ++ } else { ++ mtk_w32(eth, 0, MTK_GDMA_EG_CTRL(mac->id)); + +- mtk_setup_bridge_switch(eth); ++ /* FIXME: In current hardware design, we have to reset FE ++ * when swtiching XGDM to GDM. Therefore, here trigger an SER ++ * to let GDM go back to the initial state. ++ */ ++ if ((mtk_interface_mode_is_xgmii(mac->interface) || ++ mac->interface == PHY_INTERFACE_MODE_NA) && ++ !mtk_check_gmac23_idle(mac) && ++ !test_bit(MTK_RESETTING, ð->state)) ++ schedule_work(ð->pending_work); ++ } + } + ++ mac->interface = state->interface; ++ + return; + + err_phy: +@@ -675,10 +739,13 @@ static void mtk_mac_link_down(struct phy + { + struct mtk_mac *mac = container_of(config, struct mtk_mac, + phylink_config); +- u32 mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); + +- mcr &= ~(MAC_MCR_TX_EN | MAC_MCR_RX_EN | MAC_MCR_FORCE_LINK); +- mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); ++ if (!mtk_interface_mode_is_xgmii(interface)) { ++ mtk_m32(mac->hw, MAC_MCR_TX_EN | MAC_MCR_RX_EN, 0, MTK_MAC_MCR(mac->id)); ++ mtk_m32(mac->hw, MTK_XGMAC_FORCE_LINK(mac->id), 0, MTK_XGMAC_STS(mac->id)); ++ } else if (mac->id != MTK_GMAC1_ID) { ++ mtk_m32(mac->hw, XMAC_MCR_TRX_DISABLE, XMAC_MCR_TRX_DISABLE, MTK_XMAC_MCR(mac->id)); ++ } + } + + static void mtk_set_queue_speed(struct mtk_eth *eth, unsigned int idx, +@@ -750,13 +817,11 @@ static void mtk_set_queue_speed(struct m + mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs); + } + +-static void mtk_mac_link_up(struct phylink_config *config, +- struct phy_device *phy, +- unsigned int mode, phy_interface_t interface, +- int speed, int duplex, bool tx_pause, bool rx_pause) ++static void mtk_gdm_mac_link_up(struct mtk_mac *mac, ++ struct phy_device *phy, ++ unsigned int mode, phy_interface_t interface, ++ int speed, int duplex, bool tx_pause, bool rx_pause) + { +- struct mtk_mac *mac = container_of(config, struct mtk_mac, +- phylink_config); + u32 mcr; + + mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id)); +@@ -790,6 +855,55 @@ static void mtk_mac_link_up(struct phyli + mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id)); + } + ++static void mtk_xgdm_mac_link_up(struct mtk_mac *mac, ++ struct phy_device *phy, ++ unsigned int mode, phy_interface_t interface, ++ int speed, int duplex, bool tx_pause, bool rx_pause) ++{ ++ u32 mcr, force_link = 0; ++ ++ if (mac->id == MTK_GMAC1_ID) ++ return; ++ ++ /* Eliminate the interference(before link-up) caused by PHY noise */ ++ mtk_m32(mac->hw, XMAC_LOGIC_RST, 0, MTK_XMAC_LOGIC_RST(mac->id)); ++ mdelay(20); ++ mtk_m32(mac->hw, XMAC_GLB_CNTCLR, XMAC_GLB_CNTCLR, MTK_XMAC_CNT_CTRL(mac->id)); ++ ++ if (mac->interface == PHY_INTERFACE_MODE_INTERNAL || mac->id == MTK_GMAC3_ID) ++ force_link = MTK_XGMAC_FORCE_LINK(mac->id); ++ ++ mtk_m32(mac->hw, MTK_XGMAC_FORCE_LINK(mac->id), force_link, MTK_XGMAC_STS(mac->id)); ++ ++ mcr = mtk_r32(mac->hw, MTK_XMAC_MCR(mac->id)); ++ mcr &= ~(XMAC_MCR_FORCE_TX_FC | XMAC_MCR_FORCE_RX_FC | XMAC_MCR_TRX_DISABLE); ++ /* Configure pause modes - ++ * phylink will avoid these for half duplex ++ */ ++ if (tx_pause) ++ mcr |= XMAC_MCR_FORCE_TX_FC; ++ if (rx_pause) ++ mcr |= XMAC_MCR_FORCE_RX_FC; ++ ++ mtk_w32(mac->hw, mcr, MTK_XMAC_MCR(mac->id)); ++} ++ ++static void mtk_mac_link_up(struct phylink_config *config, ++ struct phy_device *phy, ++ unsigned int mode, phy_interface_t interface, ++ int speed, int duplex, bool tx_pause, bool rx_pause) ++{ ++ struct mtk_mac *mac = container_of(config, struct mtk_mac, ++ phylink_config); ++ ++ if (mtk_interface_mode_is_xgmii(interface)) ++ mtk_xgdm_mac_link_up(mac, phy, mode, interface, speed, duplex, ++ tx_pause, rx_pause); ++ else ++ mtk_gdm_mac_link_up(mac, phy, mode, interface, speed, duplex, ++ tx_pause, rx_pause); ++} ++ + static const struct phylink_mac_ops mtk_phylink_ops = { + .validate = phylink_generic_validate, + .mac_select_pcs = mtk_mac_select_pcs, +@@ -4614,8 +4728,21 @@ static int mtk_add_mac(struct mtk_eth *e + phy_interface_zero(mac->phylink_config.supported_interfaces); + __set_bit(PHY_INTERFACE_MODE_INTERNAL, + mac->phylink_config.supported_interfaces); ++ } else if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_USXGMII)) { ++ mac->phylink_config.mac_capabilities |= MAC_5000FD | MAC_10000FD; ++ __set_bit(PHY_INTERFACE_MODE_5GBASER, ++ mac->phylink_config.supported_interfaces); ++ __set_bit(PHY_INTERFACE_MODE_10GBASER, ++ mac->phylink_config.supported_interfaces); ++ __set_bit(PHY_INTERFACE_MODE_USXGMII, ++ mac->phylink_config.supported_interfaces); + } + ++ if (MTK_HAS_CAPS(mac->hw->soc->caps, MTK_2P5GPHY) && ++ id == MTK_GMAC2_ID) ++ __set_bit(PHY_INTERFACE_MODE_INTERNAL, ++ mac->phylink_config.supported_interfaces); ++ + phylink = phylink_create(&mac->phylink_config, + of_fwnode_handle(mac->of_node), + phy_mode, &mtk_phylink_ops); +@@ -4808,6 +4935,13 @@ static int mtk_probe(struct platform_dev + + if (err) + return err; ++ } ++ ++ if (MTK_HAS_CAPS(eth->soc->caps, MTK_USXGMII)) { ++ err = mtk_usxgmii_init(eth); ++ ++ if (err) ++ return err; + } + + if (eth->soc->required_pctl) { +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -502,6 +502,21 @@ + #define INTF_MODE_RGMII_1000 (TRGMII_MODE | TRGMII_CENTRAL_ALIGNED) + #define INTF_MODE_RGMII_10_100 0 + ++/* XFI Mac control registers */ ++#define MTK_XMAC_BASE(x) (0x12000 + (((x) - 1) * 0x1000)) ++#define MTK_XMAC_MCR(x) (MTK_XMAC_BASE(x)) ++#define XMAC_MCR_TRX_DISABLE 0xf ++#define XMAC_MCR_FORCE_TX_FC BIT(5) ++#define XMAC_MCR_FORCE_RX_FC BIT(4) ++ ++/* XFI Mac logic reset registers */ ++#define MTK_XMAC_LOGIC_RST(x) (MTK_XMAC_BASE(x) + 0x10) ++#define XMAC_LOGIC_RST BIT(0) ++ ++/* XFI Mac count global control */ ++#define MTK_XMAC_CNT_CTRL(x) (MTK_XMAC_BASE(x) + 0x100) ++#define XMAC_GLB_CNTCLR BIT(0) ++ + /* GPIO port control registers for GMAC 2*/ + #define GPIO_OD33_CTRL8 0x4c0 + #define GPIO_BIAS_CTRL 0xed0 +@@ -527,6 +542,7 @@ + #define SYSCFG0_SGMII_GMAC2 ((3 << 8) & SYSCFG0_SGMII_MASK) + #define SYSCFG0_SGMII_GMAC1_V2 BIT(9) + #define SYSCFG0_SGMII_GMAC2_V2 BIT(8) ++#define SYSCFG0_SGMII_GMAC3_V2 BIT(7) + + + /* ethernet subsystem clock register */ +@@ -559,12 +575,74 @@ + #define ETHSYS_DMA_AG_MAP_QDMA BIT(1) + #define ETHSYS_DMA_AG_MAP_PPE BIT(2) + ++/* USXGMII subsystem config registers */ ++/* Register to control speed */ ++#define RG_PHY_TOP_SPEED_CTRL1 0x80C ++#define USXGMII_RATE_UPDATE_MODE BIT(31) ++#define USXGMII_MAC_CK_GATED BIT(29) ++#define USXGMII_IF_FORCE_EN BIT(28) ++#define USXGMII_RATE_ADAPT_MODE GENMASK(10, 8) ++#define USXGMII_RATE_ADAPT_MODE_X1 0 ++#define USXGMII_RATE_ADAPT_MODE_X2 1 ++#define USXGMII_RATE_ADAPT_MODE_X4 2 ++#define USXGMII_RATE_ADAPT_MODE_X10 3 ++#define USXGMII_RATE_ADAPT_MODE_X100 4 ++#define USXGMII_RATE_ADAPT_MODE_X5 5 ++#define USXGMII_RATE_ADAPT_MODE_X50 6 ++#define USXGMII_XFI_RX_MODE GENMASK(6, 4) ++#define USXGMII_XFI_RX_MODE_10G 0 ++#define USXGMII_XFI_RX_MODE_5G 1 ++#define USXGMII_XFI_TX_MODE GENMASK(2, 0) ++#define USXGMII_XFI_TX_MODE_10G 0 ++#define USXGMII_XFI_TX_MODE_5G 1 ++ ++/* Register to control PCS AN */ ++#define RG_PCS_AN_CTRL0 0x810 ++#define USXGMII_AN_RESTART BIT(31) ++#define USXGMII_AN_SYNC_CNT GENMASK(30, 11) ++#define USXGMII_AN_ENABLE BIT(0) ++ ++#define RG_PCS_AN_CTRL2 0x818 ++#define USXGMII_LINK_TIMER_IDLE_DETECT GENMASK(29, 20) ++#define USXGMII_LINK_TIMER_COMP_ACK_DETECT GENMASK(19, 10) ++#define USXGMII_LINK_TIMER_AN_RESTART GENMASK(9, 0) ++ ++/* Register to read PCS AN status */ ++#define RG_PCS_AN_STS0 0x81c ++#define USXGMII_PCS_AN_WORD GENMASK(15, 0) ++#define USXGMII_LPA_LATCH BIT(31) ++ ++/* Register to control USXGMII XFI PLL digital */ ++#define XFI_PLL_DIG_GLB8 0x08 ++#define RG_XFI_PLL_EN BIT(31) ++ ++/* Register to control USXGMII XFI PLL analog */ ++#define XFI_PLL_ANA_GLB8 0x108 ++#define RG_XFI_PLL_ANA_SWWA 0x02283248 ++ + /* Infrasys subsystem config registers */ + #define INFRA_MISC2 0x70c + #define CO_QPHY_SEL BIT(0) + #define GEPHY_MAC_SEL BIT(1) + ++/* Toprgu subsystem config registers */ ++#define TOPRGU_SWSYSRST 0x18 ++#define SWSYSRST_UNLOCK_KEY GENMASK(31, 24) ++#define SWSYSRST_XFI_PLL_GRST BIT(16) ++#define SWSYSRST_XFI_PEXPT1_GRST BIT(15) ++#define SWSYSRST_XFI_PEXPT0_GRST BIT(14) ++#define SWSYSRST_XFI1_GRST BIT(13) ++#define SWSYSRST_XFI0_GRST BIT(12) ++#define SWSYSRST_SGMII1_GRST BIT(2) ++#define SWSYSRST_SGMII0_GRST BIT(1) ++#define TOPRGU_SWSYSRST_EN 0xFC ++ + /* Top misc registers */ ++#define TOP_MISC_NETSYS_PCS_MUX 0x84 ++#define NETSYS_PCS_MUX_MASK GENMASK(1, 0) ++#define MUX_G2_USXGMII_SEL BIT(1) ++#define MUX_HSGMII1_G1_SEL BIT(0) ++ + #define USB_PHY_SWITCH_REG 0x218 + #define QPHY_SEL_MASK GENMASK(1, 0) + #define SGMII_QPHY_SEL 0x2 +@@ -589,6 +667,8 @@ + #define MT7628_SDM_RBCNT (MT7628_SDM_OFFSET + 0x10c) + #define MT7628_SDM_CS_ERR (MT7628_SDM_OFFSET + 0x110) + ++/* Debug Purpose Register */ ++#define MTK_PSE_FQFC_CFG 0x100 + #define MTK_FE_CDM1_FSM 0x220 + #define MTK_FE_CDM2_FSM 0x224 + #define MTK_FE_CDM3_FSM 0x238 +@@ -597,6 +677,11 @@ + #define MTK_FE_CDM6_FSM 0x328 + #define MTK_FE_GDM1_FSM 0x228 + #define MTK_FE_GDM2_FSM 0x22C ++#define MTK_FE_GDM3_FSM 0x23C ++#define MTK_FE_PSE_FREE 0x240 ++#define MTK_FE_DROP_FQ 0x244 ++#define MTK_FE_DROP_FC 0x248 ++#define MTK_FE_DROP_PPE 0x24C + + #define MTK_MAC_FSM(x) (0x1010C + ((x) * 0x100)) + +@@ -943,6 +1028,8 @@ enum mkt_eth_capabilities { + MTK_RGMII_BIT = 0, + MTK_TRGMII_BIT, + MTK_SGMII_BIT, ++ MTK_USXGMII_BIT, ++ MTK_2P5GPHY_BIT, + MTK_ESW_BIT, + MTK_GEPHY_BIT, + MTK_MUX_BIT, +@@ -963,8 +1050,11 @@ enum mkt_eth_capabilities { + MTK_ETH_MUX_GDM1_TO_GMAC1_ESW_BIT, + MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT, + MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT, ++ MTK_ETH_MUX_GMAC2_TO_2P5GPHY_BIT, + MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT, + MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT, ++ MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII_BIT, ++ MTK_ETH_MUX_GMAC123_TO_USXGMII_BIT, + + /* PATH BITS */ + MTK_ETH_PATH_GMAC1_RGMII_BIT, +@@ -972,14 +1062,21 @@ enum mkt_eth_capabilities { + MTK_ETH_PATH_GMAC1_SGMII_BIT, + MTK_ETH_PATH_GMAC2_RGMII_BIT, + MTK_ETH_PATH_GMAC2_SGMII_BIT, ++ MTK_ETH_PATH_GMAC2_2P5GPHY_BIT, + MTK_ETH_PATH_GMAC2_GEPHY_BIT, ++ MTK_ETH_PATH_GMAC3_SGMII_BIT, + MTK_ETH_PATH_GDM1_ESW_BIT, ++ MTK_ETH_PATH_GMAC1_USXGMII_BIT, ++ MTK_ETH_PATH_GMAC2_USXGMII_BIT, ++ MTK_ETH_PATH_GMAC3_USXGMII_BIT, + }; + + /* Supported hardware group on SoCs */ + #define MTK_RGMII BIT_ULL(MTK_RGMII_BIT) + #define MTK_TRGMII BIT_ULL(MTK_TRGMII_BIT) + #define MTK_SGMII BIT_ULL(MTK_SGMII_BIT) ++#define MTK_USXGMII BIT_ULL(MTK_USXGMII_BIT) ++#define MTK_2P5GPHY BIT_ULL(MTK_2P5GPHY_BIT) + #define MTK_ESW BIT_ULL(MTK_ESW_BIT) + #define MTK_GEPHY BIT_ULL(MTK_GEPHY_BIT) + #define MTK_MUX BIT_ULL(MTK_MUX_BIT) +@@ -1002,10 +1099,16 @@ enum mkt_eth_capabilities { + BIT_ULL(MTK_ETH_MUX_GMAC2_GMAC0_TO_GEPHY_BIT) + #define MTK_ETH_MUX_U3_GMAC2_TO_QPHY \ + BIT_ULL(MTK_ETH_MUX_U3_GMAC2_TO_QPHY_BIT) ++#define MTK_ETH_MUX_GMAC2_TO_2P5GPHY \ ++ BIT_ULL(MTK_ETH_MUX_GMAC2_TO_2P5GPHY_BIT) + #define MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII \ + BIT_ULL(MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII_BIT) + #define MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII \ + BIT_ULL(MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII_BIT) ++#define MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII \ ++ BIT_ULL(MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII_BIT) ++#define MTK_ETH_MUX_GMAC123_TO_USXGMII \ ++ BIT_ULL(MTK_ETH_MUX_GMAC123_TO_USXGMII_BIT) + + /* Supported path present on SoCs */ + #define MTK_ETH_PATH_GMAC1_RGMII BIT_ULL(MTK_ETH_PATH_GMAC1_RGMII_BIT) +@@ -1013,8 +1116,13 @@ enum mkt_eth_capabilities { + #define MTK_ETH_PATH_GMAC1_SGMII BIT_ULL(MTK_ETH_PATH_GMAC1_SGMII_BIT) + #define MTK_ETH_PATH_GMAC2_RGMII BIT_ULL(MTK_ETH_PATH_GMAC2_RGMII_BIT) + #define MTK_ETH_PATH_GMAC2_SGMII BIT_ULL(MTK_ETH_PATH_GMAC2_SGMII_BIT) ++#define MTK_ETH_PATH_GMAC2_2P5GPHY BIT_ULL(MTK_ETH_PATH_GMAC2_2P5GPHY_BIT) + #define MTK_ETH_PATH_GMAC2_GEPHY BIT_ULL(MTK_ETH_PATH_GMAC2_GEPHY_BIT) ++#define MTK_ETH_PATH_GMAC3_SGMII BIT_ULL(MTK_ETH_PATH_GMAC3_SGMII_BIT) + #define MTK_ETH_PATH_GDM1_ESW BIT_ULL(MTK_ETH_PATH_GDM1_ESW_BIT) ++#define MTK_ETH_PATH_GMAC1_USXGMII BIT_ULL(MTK_ETH_PATH_GMAC1_USXGMII_BIT) ++#define MTK_ETH_PATH_GMAC2_USXGMII BIT_ULL(MTK_ETH_PATH_GMAC2_USXGMII_BIT) ++#define MTK_ETH_PATH_GMAC3_USXGMII BIT_ULL(MTK_ETH_PATH_GMAC3_USXGMII_BIT) + + #define MTK_GMAC1_RGMII (MTK_ETH_PATH_GMAC1_RGMII | MTK_RGMII) + #define MTK_GMAC1_TRGMII (MTK_ETH_PATH_GMAC1_TRGMII | MTK_TRGMII) +@@ -1022,7 +1130,12 @@ enum mkt_eth_capabilities { + #define MTK_GMAC2_RGMII (MTK_ETH_PATH_GMAC2_RGMII | MTK_RGMII) + #define MTK_GMAC2_SGMII (MTK_ETH_PATH_GMAC2_SGMII | MTK_SGMII) + #define MTK_GMAC2_GEPHY (MTK_ETH_PATH_GMAC2_GEPHY | MTK_GEPHY) ++#define MTK_GMAC2_2P5GPHY (MTK_ETH_PATH_GMAC2_2P5GPHY | MTK_2P5GPHY) ++#define MTK_GMAC3_SGMII (MTK_ETH_PATH_GMAC3_SGMII | MTK_SGMII) + #define MTK_GDM1_ESW (MTK_ETH_PATH_GDM1_ESW | MTK_ESW) ++#define MTK_GMAC1_USXGMII (MTK_ETH_PATH_GMAC1_USXGMII | MTK_USXGMII) ++#define MTK_GMAC2_USXGMII (MTK_ETH_PATH_GMAC2_USXGMII | MTK_USXGMII) ++#define MTK_GMAC3_USXGMII (MTK_ETH_PATH_GMAC3_USXGMII | MTK_USXGMII) + + /* MUXes present on SoCs */ + /* 0: GDM1 -> GMAC1, 1: GDM1 -> ESW */ +@@ -1041,10 +1154,20 @@ enum mkt_eth_capabilities { + (MTK_ETH_MUX_GMAC1_GMAC2_TO_SGMII_RGMII | MTK_MUX | \ + MTK_SHARED_SGMII) + ++/* 2: GMAC2 -> XGMII */ ++#define MTK_MUX_GMAC2_TO_2P5GPHY \ ++ (MTK_ETH_MUX_GMAC2_TO_2P5GPHY | MTK_MUX | MTK_INFRA) ++ + /* 0: GMACx -> GEPHY, 1: GMACx -> SGMII where x is 1 or 2 */ + #define MTK_MUX_GMAC12_TO_GEPHY_SGMII \ + (MTK_ETH_MUX_GMAC12_TO_GEPHY_SGMII | MTK_MUX) + ++#define MTK_MUX_GMAC123_TO_GEPHY_SGMII \ ++ (MTK_ETH_MUX_GMAC123_TO_GEPHY_SGMII | MTK_MUX) ++ ++#define MTK_MUX_GMAC123_TO_USXGMII \ ++ (MTK_ETH_MUX_GMAC123_TO_USXGMII | MTK_MUX | MTK_INFRA) ++ + #define MTK_HAS_CAPS(caps, _x) (((caps) & (_x)) == (_x)) + + #define MT7621_CAPS (MTK_GMAC1_RGMII | MTK_GMAC1_TRGMII | \ +@@ -1076,8 +1199,12 @@ enum mkt_eth_capabilities { + MTK_MUX_GMAC12_TO_GEPHY_SGMII | MTK_QDMA | \ + MTK_RSTCTRL_PPE1 | MTK_SRAM) + +-#define MT7988_CAPS (MTK_36BIT_DMA | MTK_GDM1_ESW | MTK_QDMA | \ +- MTK_RSTCTRL_PPE1 | MTK_RSTCTRL_PPE2 | MTK_SRAM) ++#define MT7988_CAPS (MTK_36BIT_DMA | MTK_GDM1_ESW | MTK_GMAC1_SGMII | \ ++ MTK_GMAC2_2P5GPHY | MTK_GMAC2_SGMII | MTK_GMAC2_USXGMII | \ ++ MTK_GMAC3_SGMII | MTK_GMAC3_USXGMII | \ ++ MTK_MUX_GMAC123_TO_GEPHY_SGMII | \ ++ MTK_MUX_GMAC123_TO_USXGMII | MTK_MUX_GMAC2_TO_2P5GPHY | \ ++ MTK_QDMA | MTK_RSTCTRL_PPE1 | MTK_RSTCTRL_PPE2 | MTK_SRAM) + + struct mtk_tx_dma_desc_info { + dma_addr_t addr; +@@ -1187,6 +1314,24 @@ struct mtk_soc_data { + /* currently no SoC has more than 3 macs */ + #define MTK_MAX_DEVS 3 + ++/* struct mtk_usxgmii_pcs - This structure holds each usxgmii regmap and ++ * associated data ++ * @regmap: The register map pointing at the range used to setup ++ * USXGMII modes ++ * @interface: Currently selected interface mode ++ * @id: The element is used to record the index of PCS ++ * @pcs: Phylink PCS structure ++ */ ++struct mtk_usxgmii_pcs { ++ struct mtk_eth *eth; ++ struct regmap *regmap; ++ struct phylink_pcs *wrapped_sgmii_pcs; ++ phy_interface_t interface; ++ u8 id; ++ unsigned int mode; ++ struct phylink_pcs pcs; ++}; ++ + /* struct mtk_eth - This is the main datasructure for holding the state + * of the driver + * @dev: The device pointer +@@ -1207,6 +1352,12 @@ struct mtk_soc_data { + * @infra: The register map pointing at the range used to setup + * SGMII and GePHY path + * @sgmii_pcs: Pointers to mtk-pcs-lynxi phylink_pcs instances ++ * @sgmii_wrapped_pcs: Pointers to NETSYSv3 wrapper PCS instances ++ * @usxgmii_pll: The register map pointing at the range used to control ++ * the USXGMII SerDes PLL ++ * @regmap_pextp: The register map pointing at the range used to setup ++ * PHYA ++ * @usxgmii_pcs: Pointer to array of pointers to struct for USXGMII PCS + * @pctl: The register map pointing at the range used to setup + * GMAC port drive/slew values + * @dma_refcnt: track how many netdevs are using the DMA engine +@@ -1250,6 +1401,10 @@ struct mtk_eth { + struct regmap *ethsys; + struct regmap *infra; + struct phylink_pcs *sgmii_pcs[MTK_MAX_DEVS]; ++ struct regmap *toprgu; ++ struct regmap *usxgmii_pll; ++ struct regmap *regmap_pextp[MTK_MAX_DEVS]; ++ struct mtk_usxgmii_pcs *usxgmii_pcs[MTK_MAX_DEVS]; + struct regmap *pctl; + bool hwlro; + refcount_t dma_refcnt; +@@ -1437,6 +1592,19 @@ static inline u32 mtk_get_ib2_multicast_ + return MTK_FOE_IB2_MULTICAST; + } + ++static inline bool mtk_interface_mode_is_xgmii(phy_interface_t interface) ++{ ++ switch (interface) { ++ case PHY_INTERFACE_MODE_INTERNAL: ++ case PHY_INTERFACE_MODE_USXGMII: ++ case PHY_INTERFACE_MODE_10GBASER: ++ case PHY_INTERFACE_MODE_5GBASER: ++ return true; ++ default: ++ return false; ++ } ++} ++ + /* read the hardware status register */ + void mtk_stats_update_mac(struct mtk_mac *mac); + +@@ -1445,8 +1613,10 @@ u32 mtk_r32(struct mtk_eth *eth, unsigne + u32 mtk_m32(struct mtk_eth *eth, u32 mask, u32 set, unsigned int reg); + + int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id); ++int mtk_gmac_2p5gphy_path_setup(struct mtk_eth *eth, int mac_id); + int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id); + int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id); ++int mtk_gmac_usxgmii_path_setup(struct mtk_eth *eth, int mac_id); + + int mtk_eth_offload_init(struct mtk_eth *eth); + int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type, +@@ -1456,5 +1626,63 @@ int mtk_flow_offload_cmd(struct mtk_eth + void mtk_flow_offload_cleanup(struct mtk_eth *eth, struct list_head *list); + void mtk_eth_set_dma_device(struct mtk_eth *eth, struct device *dma_dev); + ++static inline int mtk_mac2xgmii_id(struct mtk_eth *eth, int mac_id) ++{ ++ int xgmii_id = mac_id; ++ ++ if (mtk_is_netsys_v3_or_greater(eth)) { ++ switch (mac_id) { ++ case MTK_GMAC1_ID: ++ case MTK_GMAC2_ID: ++ xgmii_id = 1; ++ break; ++ case MTK_GMAC3_ID: ++ xgmii_id = 0; ++ break; ++ default: ++ xgmii_id = -1; ++ } ++ } ++ ++ return MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_SGMII) ? 0 : xgmii_id; ++} ++ ++static inline int mtk_xgmii2mac_id(struct mtk_eth *eth, int xgmii_id) ++{ ++ int mac_id = xgmii_id; ++ ++ if (mtk_is_netsys_v3_or_greater(eth)) { ++ switch (xgmii_id) { ++ case 0: ++ mac_id = 2; ++ break; ++ case 1: ++ mac_id = 1; ++ break; ++ default: ++ mac_id = -1; ++ } ++ } ++ ++ return mac_id; ++} ++ ++#ifdef CONFIG_NET_MEDIATEK_SOC_USXGMII ++struct phylink_pcs *mtk_sgmii_wrapper_select_pcs(struct mtk_eth *eth, int id); ++struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int id); ++int mtk_usxgmii_init(struct mtk_eth *eth); ++#else ++static inline struct phylink_pcs *mtk_sgmii_wrapper_select_pcs(struct mtk_eth *eth, int id) ++{ ++ return NULL; ++} ++ ++static inline struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int id) ++{ ++ return NULL; ++} ++ ++static inline int mtk_usxgmii_init(struct mtk_eth *eth) { return 0; } ++#endif /* NET_MEDIATEK_SOC_USXGMII */ + + #endif /* MTK_ETH_H */ +--- /dev/null ++++ b/drivers/net/ethernet/mediatek/mtk_usxgmii.c +@@ -0,0 +1,690 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2023 MediaTek Inc. ++ * Author: Henry Yen ++ * Daniel Golle ++ */ ++ ++#include ++#include ++#include ++#include "mtk_eth_soc.h" ++ ++static struct mtk_usxgmii_pcs *pcs_to_mtk_usxgmii_pcs(struct phylink_pcs *pcs) ++{ ++ return container_of(pcs, struct mtk_usxgmii_pcs, pcs); ++} ++ ++static int mtk_xfi_pextp_init(struct mtk_eth *eth) ++{ ++ struct device *dev = eth->dev; ++ struct device_node *r = dev->of_node; ++ struct device_node *np; ++ int i; ++ ++ for (i = 0; i < MTK_MAX_DEVS; i++) { ++ np = of_parse_phandle(r, "mediatek,xfi-pextp", i); ++ if (!np) ++ break; ++ ++ eth->regmap_pextp[i] = syscon_node_to_regmap(np); ++ if (IS_ERR(eth->regmap_pextp[i])) ++ return PTR_ERR(eth->regmap_pextp[i]); ++ } ++ ++ return 0; ++} ++ ++static int mtk_xfi_pll_init(struct mtk_eth *eth) ++{ ++ struct device_node *r = eth->dev->of_node; ++ struct device_node *np; ++ ++ np = of_parse_phandle(r, "mediatek,xfi-pll", 0); ++ if (!np) ++ return -1; ++ ++ eth->usxgmii_pll = syscon_node_to_regmap(np); ++ if (IS_ERR(eth->usxgmii_pll)) ++ return PTR_ERR(eth->usxgmii_pll); ++ ++ return 0; ++} ++ ++static int mtk_toprgu_init(struct mtk_eth *eth) ++{ ++ struct device_node *r = eth->dev->of_node; ++ struct device_node *np; ++ ++ np = of_parse_phandle(r, "mediatek,toprgu", 0); ++ if (!np) ++ return -1; ++ ++ eth->toprgu = syscon_node_to_regmap(np); ++ if (IS_ERR(eth->toprgu)) ++ return PTR_ERR(eth->toprgu); ++ ++ return 0; ++} ++ ++static int mtk_xfi_pll_enable(struct mtk_eth *eth) ++{ ++ u32 val = 0; ++ ++ if (!eth->usxgmii_pll) ++ return -EINVAL; ++ ++ /* Add software workaround for USXGMII PLL TCL issue */ ++ regmap_write(eth->usxgmii_pll, XFI_PLL_ANA_GLB8, RG_XFI_PLL_ANA_SWWA); ++ ++ regmap_read(eth->usxgmii_pll, XFI_PLL_DIG_GLB8, &val); ++ val |= RG_XFI_PLL_EN; ++ regmap_write(eth->usxgmii_pll, XFI_PLL_DIG_GLB8, val); ++ ++ return 0; ++} ++ ++static void mtk_usxgmii_setup_phya(struct regmap *pextp, phy_interface_t interface, int id) ++{ ++ bool is_10g = (interface == PHY_INTERFACE_MODE_10GBASER || ++ interface == PHY_INTERFACE_MODE_USXGMII); ++ bool is_2p5g = (interface == PHY_INTERFACE_MODE_2500BASEX); ++ bool is_5g = (interface == PHY_INTERFACE_MODE_5GBASER); ++ ++ /* Setup operation mode */ ++ if (is_10g) ++ regmap_write(pextp, 0x9024, 0x00C9071C); ++ else ++ regmap_write(pextp, 0x9024, 0x00D9071C); ++ ++ if (is_5g) ++ regmap_write(pextp, 0x2020, 0xAAA5A5AA); ++ else ++ regmap_write(pextp, 0x2020, 0xAA8585AA); ++ ++ if (is_2p5g || is_5g || is_10g) { ++ regmap_write(pextp, 0x2030, 0x0C020707); ++ regmap_write(pextp, 0x2034, 0x0E050F0F); ++ regmap_write(pextp, 0x2040, 0x00140032); ++ } else { ++ regmap_write(pextp, 0x2030, 0x0C020207); ++ regmap_write(pextp, 0x2034, 0x0E05050F); ++ regmap_write(pextp, 0x2040, 0x00200032); ++ } ++ ++ if (is_2p5g || is_10g) ++ regmap_write(pextp, 0x50F0, 0x00C014AA); ++ else if (is_5g) ++ regmap_write(pextp, 0x50F0, 0x00C018AA); ++ else ++ regmap_write(pextp, 0x50F0, 0x00C014BA); ++ ++ if (is_5g) { ++ regmap_write(pextp, 0x50E0, 0x3777812B); ++ regmap_write(pextp, 0x506C, 0x005C9CFF); ++ regmap_write(pextp, 0x5070, 0x9DFAFAFA); ++ regmap_write(pextp, 0x5074, 0x273F3F3F); ++ regmap_write(pextp, 0x5078, 0xA8883868); ++ regmap_write(pextp, 0x507C, 0x14661466); ++ } else { ++ regmap_write(pextp, 0x50E0, 0x3777C12B); ++ regmap_write(pextp, 0x506C, 0x005F9CFF); ++ regmap_write(pextp, 0x5070, 0x9D9DFAFA); ++ regmap_write(pextp, 0x5074, 0x27273F3F); ++ regmap_write(pextp, 0x5078, 0xA7883C68); ++ regmap_write(pextp, 0x507C, 0x11661166); ++ } ++ ++ if (is_2p5g || is_10g) { ++ regmap_write(pextp, 0x5080, 0x0E000AAF); ++ regmap_write(pextp, 0x5084, 0x08080D0D); ++ regmap_write(pextp, 0x5088, 0x02030909); ++ } else if (is_5g) { ++ regmap_write(pextp, 0x5080, 0x0E001ABF); ++ regmap_write(pextp, 0x5084, 0x080B0D0D); ++ regmap_write(pextp, 0x5088, 0x02050909); ++ } else { ++ regmap_write(pextp, 0x5080, 0x0E000EAF); ++ regmap_write(pextp, 0x5084, 0x08080E0D); ++ regmap_write(pextp, 0x5088, 0x02030B09); ++ } ++ ++ if (is_5g) { ++ regmap_write(pextp, 0x50E4, 0x0C000000); ++ regmap_write(pextp, 0x50E8, 0x04000000); ++ } else { ++ regmap_write(pextp, 0x50E4, 0x0C0C0000); ++ regmap_write(pextp, 0x50E8, 0x04040000); ++ } ++ ++ if (is_2p5g || mtk_interface_mode_is_xgmii(interface)) ++ regmap_write(pextp, 0x50EC, 0x0F0F0C06); ++ else ++ regmap_write(pextp, 0x50EC, 0x0F0F0606); ++ ++ if (is_5g) { ++ regmap_write(pextp, 0x50A8, 0x50808C8C); ++ regmap_write(pextp, 0x6004, 0x18000000); ++ } else { ++ regmap_write(pextp, 0x50A8, 0x506E8C8C); ++ regmap_write(pextp, 0x6004, 0x18190000); ++ } ++ ++ if (is_10g) ++ regmap_write(pextp, 0x00F8, 0x01423342); ++ else if (is_5g) ++ regmap_write(pextp, 0x00F8, 0x00A132A1); ++ else if (is_2p5g) ++ regmap_write(pextp, 0x00F8, 0x009C329C); ++ else ++ regmap_write(pextp, 0x00F8, 0x00FA32FA); ++ ++ /* Force SGDT_OUT off and select PCS */ ++ if (mtk_interface_mode_is_xgmii(interface)) ++ regmap_write(pextp, 0x00F4, 0x80201F20); ++ else ++ regmap_write(pextp, 0x00F4, 0x80201F21); ++ ++ /* Force GLB_CKDET_OUT */ ++ regmap_write(pextp, 0x0030, 0x00050C00); ++ ++ /* Force AEQ on */ ++ regmap_write(pextp, 0x0070, 0x02002800); ++ ndelay(1020); ++ ++ /* Setup DA default value */ ++ regmap_write(pextp, 0x30B0, 0x00000020); ++ regmap_write(pextp, 0x3028, 0x00008A01); ++ regmap_write(pextp, 0x302C, 0x0000A884); ++ regmap_write(pextp, 0x3024, 0x00083002); ++ if (mtk_interface_mode_is_xgmii(interface)) { ++ regmap_write(pextp, 0x3010, 0x00022220); ++ regmap_write(pextp, 0x5064, 0x0F020A01); ++ regmap_write(pextp, 0x50B4, 0x06100600); ++ if (interface == PHY_INTERFACE_MODE_USXGMII) ++ regmap_write(pextp, 0x3048, 0x40704000); ++ else ++ regmap_write(pextp, 0x3048, 0x47684100); ++ } else { ++ regmap_write(pextp, 0x3010, 0x00011110); ++ regmap_write(pextp, 0x3048, 0x40704000); ++ } ++ ++ if (!mtk_interface_mode_is_xgmii(interface) && !is_2p5g) ++ regmap_write(pextp, 0x3064, 0x0000C000); ++ ++ if (interface == PHY_INTERFACE_MODE_USXGMII) { ++ regmap_write(pextp, 0x3050, 0xA8000000); ++ regmap_write(pextp, 0x3054, 0x000000AA); ++ } else if (mtk_interface_mode_is_xgmii(interface)) { ++ regmap_write(pextp, 0x3050, 0x00000000); ++ regmap_write(pextp, 0x3054, 0x00000000); ++ } else { ++ regmap_write(pextp, 0x3050, 0xA8000000); ++ regmap_write(pextp, 0x3054, 0x000000AA); ++ } ++ ++ if (mtk_interface_mode_is_xgmii(interface)) ++ regmap_write(pextp, 0x306C, 0x00000F00); ++ else if (is_2p5g) ++ regmap_write(pextp, 0x306C, 0x22000F00); ++ else ++ regmap_write(pextp, 0x306C, 0x20200F00); ++ ++ if (interface == PHY_INTERFACE_MODE_10GBASER && id == 0) ++ regmap_write(pextp, 0xA008, 0x0007B400); ++ ++ if (mtk_interface_mode_is_xgmii(interface)) ++ regmap_write(pextp, 0xA060, 0x00040000); ++ else ++ regmap_write(pextp, 0xA060, 0x00050000); ++ ++ if (is_10g) ++ regmap_write(pextp, 0x90D0, 0x00000001); ++ else if (is_5g) ++ regmap_write(pextp, 0x90D0, 0x00000003); ++ else if (is_2p5g) ++ regmap_write(pextp, 0x90D0, 0x00000005); ++ else ++ regmap_write(pextp, 0x90D0, 0x00000007); ++ ++ /* Release reset */ ++ regmap_write(pextp, 0x0070, 0x0200E800); ++ usleep_range(150, 500); ++ ++ /* Switch to P0 */ ++ regmap_write(pextp, 0x0070, 0x0200C111); ++ ndelay(1020); ++ regmap_write(pextp, 0x0070, 0x0200C101); ++ usleep_range(15, 50); ++ ++ if (mtk_interface_mode_is_xgmii(interface)) { ++ /* Switch to Gen3 */ ++ regmap_write(pextp, 0x0070, 0x0202C111); ++ } else { ++ /* Switch to Gen2 */ ++ regmap_write(pextp, 0x0070, 0x0201C111); ++ } ++ ndelay(1020); ++ if (mtk_interface_mode_is_xgmii(interface)) ++ regmap_write(pextp, 0x0070, 0x0202C101); ++ else ++ regmap_write(pextp, 0x0070, 0x0201C101); ++ usleep_range(100, 500); ++ regmap_write(pextp, 0x30B0, 0x00000030); ++ if (mtk_interface_mode_is_xgmii(interface)) ++ regmap_write(pextp, 0x00F4, 0x80201F00); ++ else ++ regmap_write(pextp, 0x00F4, 0x80201F01); ++ ++ regmap_write(pextp, 0x3040, 0x30000000); ++ usleep_range(400, 1000); ++} ++ ++static void mtk_usxgmii_reset(struct mtk_eth *eth, int id) ++{ ++ u32 toggle, val; ++ ++ if (id >= MTK_MAX_DEVS || !eth->toprgu) ++ return; ++ ++ switch (id) { ++ case 0: ++ toggle = SWSYSRST_XFI_PEXPT0_GRST | SWSYSRST_XFI0_GRST | ++ SWSYSRST_SGMII0_GRST; ++ break; ++ case 1: ++ toggle = SWSYSRST_XFI_PEXPT1_GRST | SWSYSRST_XFI1_GRST | ++ SWSYSRST_SGMII1_GRST; ++ break; ++ default: ++ return; ++ } ++ ++ /* Enable software reset */ ++ regmap_set_bits(eth->toprgu, TOPRGU_SWSYSRST_EN, toggle); ++ ++ /* Assert USXGMII reset */ ++ regmap_set_bits(eth->toprgu, TOPRGU_SWSYSRST, ++ FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88) | toggle); ++ ++ usleep_range(100, 500); ++ ++ /* De-assert USXGMII reset */ ++ regmap_read(eth->toprgu, TOPRGU_SWSYSRST, &val); ++ val |= FIELD_PREP(SWSYSRST_UNLOCK_KEY, 0x88); ++ val &= ~toggle; ++ regmap_write(eth->toprgu, TOPRGU_SWSYSRST, val); ++ ++ /* Disable software reset */ ++ regmap_clear_bits(eth->toprgu, TOPRGU_SWSYSRST_EN, toggle); ++ ++ mdelay(10); ++} ++ ++/* As the USXGMII PHYA is shared with the 1000Base-X/2500Base-X/Cisco SGMII unit ++ * the psc-mtk-lynxi instance needs to be wrapped, so that calls to .pcs_config ++ * also trigger an initial reset and subsequent configuration of the PHYA. ++ */ ++struct mtk_sgmii_wrapper_pcs { ++ struct mtk_eth *eth; ++ struct phylink_pcs *wrapped_pcs; ++ u8 id; ++ struct phylink_pcs pcs; ++}; ++ ++static int mtk_sgmii_wrapped_pcs_config(struct phylink_pcs *pcs, ++ unsigned int mode, ++ phy_interface_t interface, ++ const unsigned long *advertising, ++ bool permit_pause_to_mac) ++{ ++ struct mtk_sgmii_wrapper_pcs *wp = container_of(pcs, struct mtk_sgmii_wrapper_pcs, pcs); ++ bool full_reconf; ++ int ret; ++ ++ full_reconf = interface != wp->eth->usxgmii_pcs[wp->id]->interface; ++ if (full_reconf) { ++ mtk_xfi_pll_enable(wp->eth); ++ mtk_usxgmii_reset(wp->eth, wp->id); ++ } ++ ++ ret = wp->wrapped_pcs->ops->pcs_config(wp->wrapped_pcs, mode, interface, ++ advertising, permit_pause_to_mac); ++ ++ if (full_reconf) ++ mtk_usxgmii_setup_phya(wp->eth->regmap_pextp[wp->id], interface, wp->id); ++ ++ wp->eth->usxgmii_pcs[wp->id]->interface = interface; ++ ++ return ret; ++} ++ ++static void mtk_sgmii_wrapped_pcs_get_state(struct phylink_pcs *pcs, ++ struct phylink_link_state *state) ++{ ++ struct mtk_sgmii_wrapper_pcs *wp = container_of(pcs, struct mtk_sgmii_wrapper_pcs, pcs); ++ ++ return wp->wrapped_pcs->ops->pcs_get_state(wp->wrapped_pcs, state); ++} ++ ++static void mtk_sgmii_wrapped_pcs_an_restart(struct phylink_pcs *pcs) ++{ ++ struct mtk_sgmii_wrapper_pcs *wp = container_of(pcs, struct mtk_sgmii_wrapper_pcs, pcs); ++ ++ wp->wrapped_pcs->ops->pcs_an_restart(wp->wrapped_pcs); ++} ++ ++static void mtk_sgmii_wrapped_pcs_link_up(struct phylink_pcs *pcs, ++ unsigned int mode, ++ phy_interface_t interface, int speed, ++ int duplex) ++{ ++ struct mtk_sgmii_wrapper_pcs *wp = container_of(pcs, struct mtk_sgmii_wrapper_pcs, pcs); ++ ++ wp->wrapped_pcs->ops->pcs_link_up(wp->wrapped_pcs, mode, interface, speed, duplex); ++} ++ ++static void mtk_sgmii_wrapped_pcs_disable(struct phylink_pcs *pcs) ++{ ++ struct mtk_sgmii_wrapper_pcs *wp = container_of(pcs, struct mtk_sgmii_wrapper_pcs, pcs); ++ ++ wp->wrapped_pcs->ops->pcs_disable(wp->wrapped_pcs); ++ ++ wp->eth->usxgmii_pcs[wp->id]->interface = PHY_INTERFACE_MODE_NA; ++} ++ ++static const struct phylink_pcs_ops mtk_sgmii_wrapped_pcs_ops = { ++ .pcs_get_state = mtk_sgmii_wrapped_pcs_get_state, ++ .pcs_config = mtk_sgmii_wrapped_pcs_config, ++ .pcs_an_restart = mtk_sgmii_wrapped_pcs_an_restart, ++ .pcs_link_up = mtk_sgmii_wrapped_pcs_link_up, ++ .pcs_disable = mtk_sgmii_wrapped_pcs_disable, ++}; ++ ++static int mtk_sgmii_wrapper_init(struct mtk_eth *eth) ++{ ++ struct mtk_sgmii_wrapper_pcs *wp; ++ int i; ++ ++ for (i = 0; i < MTK_MAX_DEVS; i++) { ++ if (!eth->sgmii_pcs[i]) ++ continue; ++ ++ if (!eth->usxgmii_pcs[i]) ++ continue; ++ ++ /* Make sure all PCS ops are supported by wrapped PCS */ ++ if (!eth->sgmii_pcs[i]->ops->pcs_get_state || ++ !eth->sgmii_pcs[i]->ops->pcs_config || ++ !eth->sgmii_pcs[i]->ops->pcs_an_restart || ++ !eth->sgmii_pcs[i]->ops->pcs_link_up || ++ !eth->sgmii_pcs[i]->ops->pcs_disable) ++ return -EOPNOTSUPP; ++ ++ wp = devm_kzalloc(eth->dev, sizeof(*wp), GFP_KERNEL); ++ if (!wp) ++ return -ENOMEM; ++ ++ wp->wrapped_pcs = eth->sgmii_pcs[i]; ++ wp->id = i; ++ wp->pcs.poll = true; ++ wp->pcs.ops = &mtk_sgmii_wrapped_pcs_ops; ++ wp->eth = eth; ++ ++ eth->usxgmii_pcs[i]->wrapped_sgmii_pcs = &wp->pcs; ++ } ++ ++ return 0; ++} ++ ++struct phylink_pcs *mtk_sgmii_wrapper_select_pcs(struct mtk_eth *eth, int mac_id) ++{ ++ u32 xgmii_id = mtk_mac2xgmii_id(eth, mac_id); ++ ++ if (!eth->usxgmii_pcs[xgmii_id]) ++ return NULL; ++ ++ return eth->usxgmii_pcs[xgmii_id]->wrapped_sgmii_pcs; ++} ++ ++static int mtk_usxgmii_pcs_config(struct phylink_pcs *pcs, unsigned int mode, ++ phy_interface_t interface, ++ const unsigned long *advertising, ++ bool permit_pause_to_mac) ++{ ++ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs); ++ struct mtk_eth *eth = mpcs->eth; ++ struct regmap *pextp = eth->regmap_pextp[mpcs->id]; ++ unsigned int an_ctrl = 0, link_timer = 0, xfi_mode = 0, adapt_mode = 0; ++ bool mode_changed = false; ++ ++ if (!pextp) ++ return -ENODEV; ++ ++ if (interface == PHY_INTERFACE_MODE_USXGMII) { ++ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0x1FF) | USXGMII_AN_ENABLE; ++ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x7B) | ++ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x7B) | ++ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x7B); ++ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_10G) | ++ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_10G); ++ } else if (interface == PHY_INTERFACE_MODE_10GBASER) { ++ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0x1FF); ++ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x7B) | ++ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x7B) | ++ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x7B); ++ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_10G) | ++ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_10G); ++ adapt_mode = USXGMII_RATE_UPDATE_MODE; ++ } else if (interface == PHY_INTERFACE_MODE_5GBASER) { ++ an_ctrl = FIELD_PREP(USXGMII_AN_SYNC_CNT, 0xFF); ++ link_timer = FIELD_PREP(USXGMII_LINK_TIMER_IDLE_DETECT, 0x3D) | ++ FIELD_PREP(USXGMII_LINK_TIMER_COMP_ACK_DETECT, 0x3D) | ++ FIELD_PREP(USXGMII_LINK_TIMER_AN_RESTART, 0x3D); ++ xfi_mode = FIELD_PREP(USXGMII_XFI_RX_MODE, USXGMII_XFI_RX_MODE_5G) | ++ FIELD_PREP(USXGMII_XFI_TX_MODE, USXGMII_XFI_TX_MODE_5G); ++ adapt_mode = USXGMII_RATE_UPDATE_MODE; ++ } else { ++ return -EINVAL; ++ } ++ ++ adapt_mode |= FIELD_PREP(USXGMII_RATE_ADAPT_MODE, USXGMII_RATE_ADAPT_MODE_X1); ++ ++ if (mpcs->interface != interface) { ++ mpcs->interface = interface; ++ mode_changed = true; ++ } ++ ++ mtk_xfi_pll_enable(eth); ++ mtk_usxgmii_reset(eth, mpcs->id); ++ ++ /* Setup USXGMII AN ctrl */ ++ regmap_update_bits(mpcs->regmap, RG_PCS_AN_CTRL0, ++ USXGMII_AN_SYNC_CNT | USXGMII_AN_ENABLE, ++ an_ctrl); ++ ++ regmap_update_bits(mpcs->regmap, RG_PCS_AN_CTRL2, ++ USXGMII_LINK_TIMER_IDLE_DETECT | ++ USXGMII_LINK_TIMER_COMP_ACK_DETECT | ++ USXGMII_LINK_TIMER_AN_RESTART, ++ link_timer); ++ ++ mpcs->mode = mode; ++ ++ /* Gated MAC CK */ ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_MAC_CK_GATED, USXGMII_MAC_CK_GATED); ++ ++ /* Enable interface force mode */ ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_IF_FORCE_EN, USXGMII_IF_FORCE_EN); ++ ++ /* Setup USXGMII adapt mode */ ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_RATE_UPDATE_MODE | USXGMII_RATE_ADAPT_MODE, ++ adapt_mode); ++ ++ /* Setup USXGMII speed */ ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_XFI_RX_MODE | USXGMII_XFI_TX_MODE, ++ xfi_mode); ++ ++ usleep_range(1, 10); ++ ++ /* Un-gated MAC CK */ ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_MAC_CK_GATED, 0); ++ ++ usleep_range(1, 10); ++ ++ /* Disable interface force mode for the AN mode */ ++ if (an_ctrl & USXGMII_AN_ENABLE) ++ regmap_update_bits(mpcs->regmap, RG_PHY_TOP_SPEED_CTRL1, ++ USXGMII_IF_FORCE_EN, 0); ++ ++ /* Setup USXGMIISYS with the determined property */ ++ mtk_usxgmii_setup_phya(pextp, interface, mpcs->id); ++ ++ return mode_changed; ++} ++ ++static void mtk_usxgmii_pcs_get_state(struct phylink_pcs *pcs, ++ struct phylink_link_state *state) ++{ ++ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs); ++ struct mtk_eth *eth = mpcs->eth; ++ struct mtk_mac *mac = eth->mac[mtk_xgmii2mac_id(eth, mpcs->id)]; ++ u32 val = 0; ++ ++ regmap_read(mpcs->regmap, RG_PCS_AN_CTRL0, &val); ++ if (FIELD_GET(USXGMII_AN_ENABLE, val)) { ++ /* Refresh LPA by inverting LPA_LATCH */ ++ regmap_read(mpcs->regmap, RG_PCS_AN_STS0, &val); ++ regmap_update_bits(mpcs->regmap, RG_PCS_AN_STS0, ++ USXGMII_LPA_LATCH, ++ !(val & USXGMII_LPA_LATCH)); ++ ++ regmap_read(mpcs->regmap, RG_PCS_AN_STS0, &val); ++ ++ phylink_decode_usxgmii_word(state, FIELD_GET(USXGMII_PCS_AN_WORD, ++ val)); ++ ++ state->interface = mpcs->interface; ++ } else { ++ val = mtk_r32(mac->hw, MTK_XGMAC_STS(mac->id)); ++ ++ if (mac->id == MTK_GMAC2_ID) ++ val >>= 16; ++ ++ switch (FIELD_GET(MTK_USXGMII_PCS_MODE, val)) { ++ case 0: ++ state->speed = SPEED_10000; ++ break; ++ case 1: ++ state->speed = SPEED_5000; ++ break; ++ case 2: ++ state->speed = SPEED_2500; ++ break; ++ case 3: ++ state->speed = SPEED_1000; ++ break; ++ } ++ ++ state->interface = mpcs->interface; ++ state->link = FIELD_GET(MTK_USXGMII_PCS_LINK, val); ++ state->duplex = DUPLEX_FULL; ++ } ++ ++ /* Continuously repeat re-configuration sequence until link comes up */ ++ if (state->link == 0) ++ mtk_usxgmii_pcs_config(pcs, mpcs->mode, ++ state->interface, NULL, false); ++} ++ ++static void mtk_usxgmii_pcs_restart_an(struct phylink_pcs *pcs) ++{ ++ struct mtk_usxgmii_pcs *mpcs = pcs_to_mtk_usxgmii_pcs(pcs); ++ unsigned int val = 0; ++ ++ if (!mpcs->regmap) ++ return; ++ ++ regmap_read(mpcs->regmap, RG_PCS_AN_CTRL0, &val); ++ val |= USXGMII_AN_RESTART; ++ regmap_write(mpcs->regmap, RG_PCS_AN_CTRL0, val); ++} ++ ++static void mtk_usxgmii_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode, ++ phy_interface_t interface, ++ int speed, int duplex) ++{ ++ /* Reconfiguring USXGMII to ensure the quality of the RX signal ++ * after the line side link up. ++ */ ++ mtk_usxgmii_pcs_config(pcs, mode, ++ interface, NULL, false); ++} ++ ++static const struct phylink_pcs_ops mtk_usxgmii_pcs_ops = { ++ .pcs_config = mtk_usxgmii_pcs_config, ++ .pcs_get_state = mtk_usxgmii_pcs_get_state, ++ .pcs_an_restart = mtk_usxgmii_pcs_restart_an, ++ .pcs_link_up = mtk_usxgmii_pcs_link_up, ++}; ++ ++int mtk_usxgmii_init(struct mtk_eth *eth) ++{ ++ struct device_node *r = eth->dev->of_node; ++ struct device *dev = eth->dev; ++ struct device_node *np; ++ int i, ret; ++ ++ for (i = 0; i < MTK_MAX_DEVS; i++) { ++ np = of_parse_phandle(r, "mediatek,usxgmiisys", i); ++ if (!np) ++ break; ++ ++ eth->usxgmii_pcs[i] = devm_kzalloc(dev, sizeof(*eth->usxgmii_pcs[i]), GFP_KERNEL); ++ if (!eth->usxgmii_pcs[i]) ++ return -ENOMEM; ++ ++ eth->usxgmii_pcs[i]->id = i; ++ eth->usxgmii_pcs[i]->eth = eth; ++ eth->usxgmii_pcs[i]->regmap = syscon_node_to_regmap(np); ++ if (IS_ERR(eth->usxgmii_pcs[i]->regmap)) ++ return PTR_ERR(eth->usxgmii_pcs[i]->regmap); ++ ++ eth->usxgmii_pcs[i]->pcs.ops = &mtk_usxgmii_pcs_ops; ++ eth->usxgmii_pcs[i]->pcs.poll = true; ++ eth->usxgmii_pcs[i]->interface = PHY_INTERFACE_MODE_NA; ++ eth->usxgmii_pcs[i]->mode = -1; ++ ++ of_node_put(np); ++ } ++ ++ ret = mtk_xfi_pextp_init(eth); ++ if (ret) ++ return ret; ++ ++ ret = mtk_xfi_pll_init(eth); ++ if (ret) ++ return ret; ++ ++ ret = mtk_toprgu_init(eth); ++ if (ret) ++ return ret; ++ ++ return mtk_sgmii_wrapper_init(eth); ++} ++ ++struct phylink_pcs *mtk_usxgmii_select_pcs(struct mtk_eth *eth, int mac_id) ++{ ++ u32 xgmii_id = mtk_mac2xgmii_id(eth, mac_id); ++ ++ if (!eth->usxgmii_pcs[xgmii_id]->regmap) ++ return NULL; ++ ++ return ð->usxgmii_pcs[xgmii_id]->pcs; ++} diff --git a/target/linux/generic/pending-6.1/860-serial-8250_mtk-track-busclk-state-to-avoid-bus-error.patch b/target/linux/generic/pending-6.1/860-serial-8250_mtk-track-busclk-state-to-avoid-bus-error.patch new file mode 100644 index 000000000..013261cb8 --- /dev/null +++ b/target/linux/generic/pending-6.1/860-serial-8250_mtk-track-busclk-state-to-avoid-bus-error.patch @@ -0,0 +1,61 @@ +From 629c701fc39f1ada9416e0766a86729e83bde86c Mon Sep 17 00:00:00 2001 +Message-ID: <629c701fc39f1ada9416e0766a86729e83bde86c.1694465766.git.daniel@makrotopia.org> +From: Daniel Golle +Date: Mon, 11 Sep 2023 21:27:44 +0100 +Subject: [PATCH] serial: 8250_mtk: track busclk state to avoid bus error +To: Greg Kroah-Hartman , + Jiri Slaby , + Matthias Brugger , + AngeloGioacchino Del Regno , + Daniel Golle , + John Ogness , + Chen-Yu Tsai , + Changqi Hu , + linux-kernel@vger.kernel.org, + linux-serial@vger.kernel.org, + linux-arm-kernel@lists.infradead.org, + linux-mediatek@lists.infradead.org + +Commit e32a83c70cf9 ("serial: 8250-mtk: modify mtk uart power and +clock management") introduced polling a debug register to make sure +the UART is idle before disabling the bus clock. However, at least on +some MediaTek SoCs access to that very debug register requires the bus +clock being enabled. Hence calling the suspend function while already +in suspended state results in that register access triggering a bus +error. In order to avoid that, track the state of the bus clock and +only poll the debug register if not already in suspended state. + +Fixes: e32a83c70cf9 ("serial: 8250-mtk: modify mtk uart power and clock management") +Signed-off-by: Daniel Golle +--- + drivers/tty/serial/8250/8250_mtk.c | 11 ++++++++++- + 1 file changed, 10 insertions(+), 1 deletion(-) + +--- a/drivers/tty/serial/8250/8250_mtk.c ++++ b/drivers/tty/serial/8250/8250_mtk.c +@@ -32,7 +32,7 @@ + #define MTK_UART_RXTRI_AD 0x14 /* RX Trigger address */ + #define MTK_UART_FRACDIV_L 0x15 /* Fractional divider LSB address */ + #define MTK_UART_FRACDIV_M 0x16 /* Fractional divider MSB address */ +-#define MTK_UART_DEBUG0 0x18 ++#define MTK_UART_DEBUG0 0x18 + #define MTK_UART_IER_XOFFI 0x20 /* Enable XOFF character interrupt */ + #define MTK_UART_IER_RTSI 0x40 /* Enable RTS Modem status interrupt */ + #define MTK_UART_IER_CTSI 0x80 /* Enable CTS Modem status interrupt */ +@@ -422,13 +422,12 @@ static int __maybe_unused mtk8250_runtim + struct mtk8250_data *data = dev_get_drvdata(dev); + struct uart_8250_port *up = serial8250_get_port(data->line); + +- /* wait until UART in idle status */ +- while +- (serial_in(up, MTK_UART_DEBUG0)); +- + if (data->clk_count == 0U) { + dev_dbg(dev, "%s clock count is 0\n", __func__); + } else { ++ /* wait until UART in idle status */ ++ while ++ (serial_in(up, MTK_UART_DEBUG0)); + clk_disable_unprepare(data->bus_clk); + data->clk_count--; + } diff --git a/target/linux/ipq806x/patches-5.10/0067-generic-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/ipq806x/patches-5.10/0067-generic-Mangle-bootloader-s-kernel-arguments.patch index 5bfc3edde..4aa8c5659 100644 --- a/target/linux/ipq806x/patches-5.10/0067-generic-Mangle-bootloader-s-kernel-arguments.patch +++ b/target/linux/ipq806x/patches-5.10/0067-generic-Mangle-bootloader-s-kernel-arguments.patch @@ -189,7 +189,7 @@ Signed-off-by: Adrian Panella static int kernel_init(void *); extern void init_IRQ(void); -@@ -903,6 +907,18 @@ asmlinkage __visible void __init __no_sa +@@ -905,6 +909,18 @@ asmlinkage __visible void __init __no_sa pr_notice("Kernel command line: %s\n", saved_command_line); /* parameters may set static keys */ jump_label_init(); diff --git a/target/linux/ipq95xx/patches-6.1/0037-cpufreq-qcom-nvmem-Introduce-cpufreq-for-ipq95xx.patch b/target/linux/ipq95xx/patches-6.1/0037-cpufreq-qcom-nvmem-Introduce-cpufreq-for-ipq95xx.patch index e07815592..e1785ae47 100644 --- a/target/linux/ipq95xx/patches-6.1/0037-cpufreq-qcom-nvmem-Introduce-cpufreq-for-ipq95xx.patch +++ b/target/linux/ipq95xx/patches-6.1/0037-cpufreq-qcom-nvmem-Introduce-cpufreq-for-ipq95xx.patch @@ -36,7 +36,7 @@ Signed-off-by: Viresh Kumar { .compatible = "qcom,msm8960", }, --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c -@@ -149,6 +149,11 @@ static int qcom_cpufreq_kryo_name_versio +@@ -148,6 +148,11 @@ static int qcom_cpufreq_kryo_name_versio switch (msm_id) { case QCOM_ID_MSM8996: case QCOM_ID_APQ8096: diff --git a/target/linux/lantiq/patches-5.10/0001-MIPS-lantiq-add-pcie-driver.patch b/target/linux/lantiq/patches-5.10/0001-MIPS-lantiq-add-pcie-driver.patch index ba07ddb16..f453023f1 100644 --- a/target/linux/lantiq/patches-5.10/0001-MIPS-lantiq-add-pcie-driver.patch +++ b/target/linux/lantiq/patches-5.10/0001-MIPS-lantiq-add-pcie-driver.patch @@ -5481,7 +5481,7 @@ Signed-off-by: John Crispin (transaction layer end-to-end CRC checking). --- a/include/linux/pci.h +++ b/include/linux/pci.h -@@ -1421,6 +1421,8 @@ void pci_walk_bus(struct pci_bus *top, i +@@ -1427,6 +1427,8 @@ void pci_walk_bus(struct pci_bus *top, i void *userdata); int pci_cfg_space_size(struct pci_dev *dev); unsigned char pci_bus_max_busnr(struct pci_bus *bus); diff --git a/target/linux/layerscape/patches-5.15/702-phy-Add-2.5G-SGMII-interface-mode.patch b/target/linux/layerscape/patches-5.15/702-phy-Add-2.5G-SGMII-interface-mode.patch index 35c11d3ef..4bbb545d8 100644 --- a/target/linux/layerscape/patches-5.15/702-phy-Add-2.5G-SGMII-interface-mode.patch +++ b/target/linux/layerscape/patches-5.15/702-phy-Add-2.5G-SGMII-interface-mode.patch @@ -13,7 +13,7 @@ Signed-off-by: Bhaskar Upadhaya --- a/include/linux/phy.h +++ b/include/linux/phy.h -@@ -152,6 +152,7 @@ typedef enum { +@@ -153,6 +153,7 @@ typedef enum { PHY_INTERFACE_MODE_USXGMII, /* 10GBASE-KR - with Clause 73 AN */ PHY_INTERFACE_MODE_10GKR, @@ -21,7 +21,7 @@ Signed-off-by: Bhaskar Upadhaya PHY_INTERFACE_MODE_MAX, } phy_interface_t; -@@ -267,6 +268,8 @@ static inline const char *phy_modes(phy_ +@@ -268,6 +269,8 @@ static inline const char *phy_modes(phy_ return "10gbase-kr"; case PHY_INTERFACE_MODE_100BASEX: return "100base-x"; diff --git a/target/linux/meson/image/Makefile b/target/linux/meson/image/Makefile deleted file mode 100644 index 2aac6a2fa..000000000 --- a/target/linux/meson/image/Makefile +++ /dev/null @@ -1,57 +0,0 @@ -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/image.mk - -FAT32_BLOCK_SIZE=1024 -FAT32_BLOCKS=$(shell echo $$(($(CONFIG_TARGET_KERNEL_PARTSIZE)*1024*1024/$(FAT32_BLOCK_SIZE)))) - -define Build/boot-script - # Make an U-boot image and copy it to the boot partition - mkimage -A arm -O linux -T script -C none -a 0 -e 0 -n "boot.scr" -d boot.txt $(KDIR)/boot.scr -endef - -define Build/emmc-common - $(RM) -f $@.boot - mkfs.fat -C $@.boot $(FAT32_BLOCKS) - - mkdir -p $(KDIR)/boot.fat - - $(CP) $(KDIR)/boot.scr $(KDIR)/boot.fat/boot.scr - mcopy -i $@.boot $(KDIR)/boot.scr :: - $(CP) $(IMAGE_KERNEL) $(KDIR)/boot.fat/uImage - mcopy -i $@.boot $(KDIR)/boot.fat/uImage :: - - $(foreach dts,$(shell echo $(DEVICE_DTS)),$(CP) $(DTS_DIR)/$(dts).dtb $(KDIR)/boot.fat/dtb;) - mcopy -i $@.boot $(KDIR)/boot.fat/dtb :: - - $(RM) -rf $(KDIR)/boot.fat - - ./gen_aml_emmc_img.sh $@ $@.boot $(IMAGE_ROOTFS) \ - $(CONFIG_TARGET_KERNEL_PARTSIZE) $(CONFIG_TARGET_ROOTFS_PARTSIZE) -endef - -### Devices ### -define Device/Default - FILESYSTEMS := ext4 - IMAGES := emmc.img - KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts) - KERNEL_LOADADDR := 0x01080000 - KERNEL_NAME := Image - KERNEL := kernel-bin | uImage none - PROFILES = Default $$(DEVICE_NAME) -endef - -define Device/thunder-onecloud - DEVICE_DTS := meson8b-onecloud - DEVICE_TITLE := Thunder OneCloud - KERNEL_LOADADDR := 0x00208000 - IMAGE/emmc.img := boot-script onecloud | emmc-common $$(DEVICE_NAME) -endef -ifeq ($(SUBTARGET),meson8b) - TARGET_DEVICES += thunder-onecloud -endif - -$(eval $(call BuildImage)) diff --git a/target/linux/mvebu/cortexa72/base-files/etc/board.d/01_leds b/target/linux/mvebu/cortexa72/base-files/etc/board.d/01_leds index 809a64a60..d8cca08ca 100644 --- a/target/linux/mvebu/cortexa72/base-files/etc/board.d/01_leds +++ b/target/linux/mvebu/cortexa72/base-files/etc/board.d/01_leds @@ -7,9 +7,11 @@ board_config_update board=$(board_name) case "$board" in +qnap,qhora-321|\ iei,puzzle-m901) ucidef_set_led_netdev "wan" "WAN" "white:network" "eth0" "link" ;; +qnap,qhora-322|\ iei,puzzle-m902) ucidef_set_led_netdev "wan" "WAN" "white:network" "eth2" "link" ;; diff --git a/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network b/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network index 6a5861084..c5704c5a3 100644 --- a/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network +++ b/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network @@ -13,9 +13,11 @@ case "$board" in globalscale,mochabin) ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" "eth0 eth2" ;; +qnap,qhora-321|\ iei,puzzle-m901) ucidef_set_interfaces_lan_wan "eth1 eth2 eth3 eth4 eth5" "eth0" ;; +qnap,qhora-322|\ iei,puzzle-m902) ucidef_set_interfaces_lan_wan "eth0 eth1 eth3 eth4 eth5 eth6 eth7 eth8" "eth2" ;; diff --git a/target/linux/mvebu/cortexa72/base-files/lib/upgrade/emmc-puzzle.sh b/target/linux/mvebu/cortexa72/base-files/lib/upgrade/emmc-puzzle.sh index 5e5c356ed..5c184e529 100755 --- a/target/linux/mvebu/cortexa72/base-files/lib/upgrade/emmc-puzzle.sh +++ b/target/linux/mvebu/cortexa72/base-files/lib/upgrade/emmc-puzzle.sh @@ -31,6 +31,8 @@ platform_do_upgrade_emmc() { v "Writing new UUID to /dev/$diskdev..." get_image_dd "$1" of="/dev/$diskdev" bs=1 skip=440 count=4 seek=440 conv=fsync + + mkfs.ext4 -F -L rootfs_data $(find_mmc_part rootfs_data) sleep 1 } diff --git a/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh b/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh index dc964a311..527584f69 100755 --- a/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh +++ b/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh @@ -10,6 +10,8 @@ REQUIRE_IMAGE_METADATA=1 platform_check_image() { case "$(board_name)" in globalscale,mochabin|\ + qnap,qhora-321|\ + qnap,qhora-322|\ iei,puzzle-m901|\ iei,puzzle-m902|\ marvell,armada8040-mcbin-doubleshot|\ @@ -25,6 +27,8 @@ platform_check_image() { platform_do_upgrade() { case "$(board_name)" in + qnap,qhora-321|\ + qnap,qhora-322|\ iei,puzzle-m901|\ iei,puzzle-m902) platform_do_upgrade_emmc "$1" @@ -43,6 +47,8 @@ platform_do_upgrade() { platform_copy_config() { case "$(board_name)" in globalscale,mochabin|\ + qnap,qhora-321|\ + qnap,qhora-322|\ iei,puzzle-m901|\ iei,puzzle-m902|\ marvell,armada8040-mcbin-doubleshot|\ diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9131-db-A.dts b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9131-db-A.dts new file mode 100644 index 000000000..4f84d036f --- /dev/null +++ b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9131-db-A.dts @@ -0,0 +1,404 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (C) 2019 Marvell International Ltd. + * + * Device tree for the CN9131-DB board. + */ + +#include "cn9130.dtsi" + +#include +#include + +/ { + model = "QNAP QHora-321"; + compatible = "qnap,qhora-321", + "marvell,armada-ap807-quad", "marvell,armada-ap807"; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs-append = " root=/dev/mmcblk0p3"; + }; + + aliases { + i2c0 = &cp1_i2c0; + i2c1 = &cp0_i2c0; + ethernet0 = &cp0_eth0; + ethernet1 = &cp0_eth1; + ethernet2 = &cp0_eth2; + ethernet3 = &cp1_eth0; + ethernet4 = &cp1_eth1; + ethernet5 = &cp1_eth2; + gpio1 = &cp0_gpio1; + gpio2 = &cp0_gpio2; + gpio3 = &cp1_gpio1; + gpio4 = &cp1_gpio2; + led-boot = &led_power; + led-failsafe = &led_info; + led-running = &led_power; + led-upgrade = &led_info; + }; + + memory@00000000 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + gpio_keys { + compatible = "gpio-keys"; + + reset { + label = "Reset"; + linux,code = ; + gpios = <&cp0_gpio2 4 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&uart0 { + status = "okay"; +}; + +&cp0_uart0 { + status = "okay"; + + puzzle-mcu { + compatible = "iei,wt61p803-puzzle"; + #address-cells = <1>; + #size-cells = <1>; + current-speed = <115200>; + enable-beep; + status = "okay"; + + leds { + compatible = "iei,wt61p803-puzzle-leds"; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + led@0 { + reg = <0>; + label = "white:network"; + active-low; + }; + + led@1 { + reg = <1>; + label = "green:cloud"; + active-low; + }; + + led_info: led@2 { + reg = <2>; + label = "orange:info"; + active-low; + }; + + led_power: led@3 { + reg = <3>; + label = "yellow:power"; + active-low; + default-state = "on"; + }; + }; + + hwmon { + compatible = "iei,wt61p803-puzzle-hwmon"; + #address-cells = <1>; + #size-cells = <0>; + + chassis_fan_group0: fan-group@0 { + #cooling-cells = <2>; + reg = <0x00>; + cooling-levels = <64 102 170 230 250>; + }; + }; + }; +}; + +&ap_thermal_cpu1 { + trips { + cpu_active: cpu-active { + temperature = <44000>; + hysteresis = <2000>; + type = "active"; + }; + }; + cooling-maps { + fan-map { + trip = <&cpu_active>; + cooling-device = <&chassis_fan_group0 64 THERMAL_NO_LIMIT>; + }; + }; +}; + +/* on-board eMMC - U9 */ +&ap_sdhci0 { + pinctrl-names = "default"; + bus-width = <8>; + status = "okay"; + mmc-ddr-1_8v; + mmc-hs400-1_8v; +}; + +&cp0_crypto { + status = "okay"; +}; + +&cp0_xmdio { + status = "okay"; + cp0_nbaset_phy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <2>; + }; + cp0_nbaset_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + }; + cp0_nbaset_phy2: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <8>; + }; +}; + +&cp0_ethernet { + status = "okay"; +}; + +/* SLM-1521-V2, CON9 */ +&cp0_eth0 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp0_comphy2 0>; + phy = <&cp0_nbaset_phy0>; +}; + +&cp0_eth1 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp0_comphy4 1>; + phy = <&cp0_nbaset_phy1>; +}; + +&cp0_eth2 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp0_comphy5 2>; + phy = <&cp0_nbaset_phy2>; +}; + +&cp0_gpio1 { + status = "okay"; +}; + +&cp0_gpio2 { + status = "okay"; +}; + +&cp0_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&cp0_i2c0_pins>; + status = "okay"; + clock-frequency = <100000>; + rtc@32 { + compatible = "epson,rx8130"; + reg = <0x32>; + wakeup-source; + }; +}; + +/* SLM-1521-V2, CON6 */ +&cp0_pcie0 { + status = "okay"; + num-lanes = <2>; + num-viewport = <8>; + phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>; +}; + +/* U55 */ +&cp0_spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&cp0_spi0_pins>; + reg = <0x700680 0x50>, /* control */ + <0x2000000 0x1000000>; /* CS0 */ + status = "okay"; + spi-flash@0 { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <40000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "U-Boot"; + reg = <0x0 0x1f0000>; + }; + partition@1f0000 { + label = "U-Boot ENV Factory"; + reg = <0x1f0000 0x10000>; + }; + partition@200000 { + label = "Reserved"; + reg = <0x200000 0x1f0000>; + }; + partition@3f0000 { + label = "U-Boot ENV"; + reg = <0x3f0000 0x10000>; + }; + }; + }; +}; + +&cp0_syscon0 { + cp0_pinctrl: pinctrl { + compatible = "marvell,cp115-standalone-pinctrl"; + cp0_i2c0_pins: cp0-i2c-pins-0 { + marvell,pins = "mpp37", "mpp38"; + marvell,function = "i2c0"; + }; + cp0_i2c1_pins: cp0-i2c-pins-1 { + marvell,pins = "mpp35", "mpp36"; + marvell,function = "i2c1"; + }; + cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 { + marvell,pins = "mpp0", "mpp1", "mpp2", + "mpp3", "mpp4", "mpp5", + "mpp6", "mpp7", "mpp8", + "mpp9", "mpp10", "mpp11"; + marvell,function = "ge0"; + }; + cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 { + marvell,pins = "mpp44", "mpp45", "mpp46", + "mpp47", "mpp48", "mpp49", + "mpp50", "mpp51", "mpp52", + "mpp53", "mpp54", "mpp55"; + marvell,function = "ge1"; + }; + cp0_spi0_pins: cp0-spi-pins-0 { + marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16"; + marvell,function = "spi1"; + }; + }; +}; + +/* + * Instantiate the first connected CP115 + */ + +#define CP11X_NAME cp1 +#define CP11X_BASE f6000000 +#define CP11X_PCIEx_MEM_BASE(iface) (0xe2000000 + (iface * 0x1000000)) +#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000 +#define CP11X_PCIE0_BASE f6600000 +#define CP11X_PCIE1_BASE f6620000 +#define CP11X_PCIE2_BASE f6640000 + +#include "armada-cp115.dtsi" + +#undef CP11X_NAME +#undef CP11X_BASE +#undef CP11X_PCIEx_MEM_BASE +#undef CP11X_PCIEx_MEM_SIZE +#undef CP11X_PCIE0_BASE +#undef CP11X_PCIE1_BASE +#undef CP11X_PCIE2_BASE + +&cp1_crypto { + status = "okay"; +}; + +&cp1_xmdio { + status = "okay"; + cp1_nbaset_phy0: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <2>; + }; + cp1_nbaset_phy1: ethernet-phy@4 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + }; + cp1_nbaset_phy2: ethernet-phy@5 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <8>; + }; +}; + +&cp1_ethernet { + status = "okay"; +}; + +/* CON50 */ +&cp1_eth0 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp1_comphy2 0>; + phy = <&cp1_nbaset_phy0>; +}; + +&cp1_eth1 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp1_comphy4 1>; + phy = <&cp1_nbaset_phy1>; +}; + +&cp1_eth2 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp1_comphy5 2>; + phy = <&cp1_nbaset_phy2>; +}; + +&cp1_sata0 { + status = "okay"; + sata-port@1 { + status = "okay"; + phys = <&cp1_comphy0 1>; + }; +}; + +&cp1_gpio1 { + status = "okay"; +}; + +&cp1_gpio2 { + status = "okay"; +}; + +&cp1_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cp1_i2c0_pins>; + clock-frequency = <100000>; +}; + +&cp1_syscon0 { + cp1_pinctrl: pinctrl { + compatible = "marvell,cp115-standalone-pinctrl"; + cp1_i2c0_pins: cp1-i2c-pins-0 { + marvell,pins = "mpp37", "mpp38"; + marvell,function = "i2c0"; + }; + cp1_spi0_pins: cp1-spi-pins-0 { + marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16"; + marvell,function = "spi1"; + }; + cp1_xhci0_vbus_pins: cp1-xhci0-vbus-pins { + marvell,pins = "mpp3"; + marvell,function = "gpio"; + }; + cp1_sfp_pins: sfp-pins { + marvell,pins = "mpp8", "mpp9", "mpp10", "mpp11"; + marvell,function = "gpio"; + }; + }; +}; + +&cp1_usb3_1 { + status = "okay"; + phys = <&cp1_comphy3 1>; + phy-names = "usb"; +}; diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9131-puzzle-m901.dts b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9131-puzzle-m901.dts index 80d876b4a..4c1ca8c10 100644 --- a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9131-puzzle-m901.dts +++ b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9131-puzzle-m901.dts @@ -17,6 +17,7 @@ chosen { stdout-path = "serial0:115200n8"; + bootargs-append = " root=/dev/mmcblk0p3"; }; aliases { diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9132-db-A.dts b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9132-db-A.dts new file mode 100644 index 000000000..cd844552d --- /dev/null +++ b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9132-db-A.dts @@ -0,0 +1,565 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright (C) 2019 Marvell International Ltd. + * + * Device tree for the CN9132-DB board. + */ + +#include "cn9130.dtsi" + +#include +#include + +/ { + model = "QNAP QHora-322"; + compatible = "qnap,qhora-322", + "marvell,armada-ap807-quad", "marvell,armada-ap807"; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs-append = " root=/dev/mmcblk0p3"; + }; + + aliases { + i2c0 = &cp1_i2c0; + i2c1 = &cp0_i2c0; + gpio1 = &cp0_gpio1; + gpio2 = &cp0_gpio2; + gpio3 = &cp1_gpio1; + gpio4 = &cp1_gpio2; + gpio5 = &cp2_gpio1; + gpio6 = &cp2_gpio2; + ethernet0 = &cp0_eth0; + ethernet1 = &cp0_eth1; + ethernet2 = &cp0_eth2; + ethernet3 = &cp1_eth0; + ethernet4 = &cp1_eth1; + ethernet5 = &cp1_eth2; + ethernet6 = &cp2_eth0; + ethernet7 = &cp2_eth1; + ethernet8 = &cp2_eth2; + spi1 = &cp0_spi0; + spi2 = &cp0_spi1; + led-boot = &led_power; + led-failsafe = &led_info; + led-running = &led_power; + led-upgrade = &led_info; + }; + + memory@00000000 { + device_type = "memory"; + reg = <0x0 0x0 0x0 0x80000000>; + }; + + gpio_keys { + compatible = "gpio-keys"; + + reset { + label = "Reset"; + linux,code = ; + gpios = <&cp0_gpio2 4 GPIO_ACTIVE_LOW>; + }; + }; + + cp2_reg_usb3_vbus0: cp2_usb3_vbus@0 { + compatible = "regulator-fixed"; + regulator-name = "cp2-xhci0-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&cp2_gpio1 2 GPIO_ACTIVE_HIGH>; + }; + + cp2_usb3_0_phy0: cp2_usb3_phy0 { + compatible = "usb-nop-xceiv"; + vcc-supply = <&cp2_reg_usb3_vbus0>; + }; + + cp2_reg_usb3_vbus1: cp2_usb3_vbus@1 { + compatible = "regulator-fixed"; + regulator-name = "cp2-xhci1-vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&cp2_gpio1 3 GPIO_ACTIVE_HIGH>; + }; + + cp2_usb3_0_phy1: cp2_usb3_phy1 { + compatible = "usb-nop-xceiv"; + vcc-supply = <&cp2_reg_usb3_vbus1>; + }; + + cp2_sfp_eth0: sfp-eth0 { + compatible = "sff,sfp"; + i2c-bus = <&cp2_sfpp0_i2c>; + los-gpio = <&cp2_module_expander1 11 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&cp2_module_expander1 10 GPIO_ACTIVE_LOW>; + tx-disable-gpio = <&cp2_module_expander1 9 GPIO_ACTIVE_HIGH>; + tx-fault-gpio = <&cp2_module_expander1 8 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; +}; + +&uart0 { + status = "okay"; +}; + +&cp0_uart0 { + status = "okay"; + + puzzle-mcu { + compatible = "iei,wt61p803-puzzle"; + #address-cells = <1>; + #size-cells = <1>; + current-speed = <115200>; + enable-beep; + status = "okay"; + + leds { + compatible = "iei,wt61p803-puzzle-leds"; + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + led@0 { + reg = <0>; + label = "white:network"; + active-low; + }; + + led@1 { + reg = <1>; + label = "green:cloud"; + active-low; + }; + + led_info: led@2 { + reg = <2>; + label = "orange:info"; + active-low; + }; + + led_power: led@3 { + reg = <3>; + label = "yellow:power"; + active-low; + default-state = "on"; + }; + }; + + hwmon { + compatible = "iei,wt61p803-puzzle-hwmon"; + #address-cells = <1>; + #size-cells = <0>; + + chassis_fan_group0: fan-group@0 { + #cooling-cells = <2>; + reg = <0x00>; + cooling-levels = <64 102 170 230 250>; + }; + }; + }; +}; + +&ap_thermal_cpu1 { + trips { + cpu_active: cpu-active { + temperature = <44000>; + hysteresis = <2000>; + type = "active"; + }; + }; + cooling-maps { + fan-map { + trip = <&cpu_active>; + cooling-device = <&chassis_fan_group0 64 THERMAL_NO_LIMIT>; + }; + }; +}; + +/* on-board eMMC - U9 */ +&ap_sdhci0 { + pinctrl-names = "default"; + bus-width = <8>; + status = "okay"; + mmc-ddr-1_8v; + mmc-hs400-1_8v; +}; + +&cp0_crypto { + status = "okay"; +}; + +&cp0_xmdio { + status = "okay"; + cp0_nbaset_phy0: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <2>; + }; + cp0_nbaset_phy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + }; + cp0_nbaset_phy2: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <8>; + }; +}; + +&cp0_ethernet { + status = "okay"; +}; + +/* SLM-1521-V2, CON9 */ +&cp0_eth0 { + status = "okay"; + phy-mode = "10gbase-kr"; + phys = <&cp0_comphy2 0>; + phy = <&cp0_nbaset_phy0>; +}; + +&cp0_eth1 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp0_comphy4 1>; + phy = <&cp0_nbaset_phy1>; +}; + +&cp0_eth2 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp0_comphy1 2>; + phy = <&cp0_nbaset_phy2>; +}; + +&cp0_gpio1 { + status = "okay"; +}; + +&cp0_gpio2 { + status = "okay"; +}; + +&cp0_i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&cp0_i2c0_pins>; + status = "okay"; + clock-frequency = <100000>; + rtc@32 { + compatible = "epson,rx8130"; + reg = <0x32>; + wakeup-source; + }; +}; + +&cp0_i2c1 { + clock-frequency = <100000>; +}; + +/* SLM-1521-V2, CON6 */ +&cp0_sata0 { + status = "okay"; + sata-port@1 { + status = "okay"; + phys = <&cp0_comphy0 1>; + }; +}; + +&cp0_pcie2 { + status = "okay"; + num-lanes = <1>; + num-viewport = <8>; + phys = <&cp0_comphy5 2>; +}; + +/* U55 */ +&cp0_spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&cp0_spi0_pins>; + reg = <0x700680 0x50>, /* control */ + <0x2000000 0x1000000>; /* CS0 */ + status = "okay"; + spi-flash@0 { + #address-cells = <0x1>; + #size-cells = <0x1>; + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <40000000>; + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + partition@0 { + label = "U-Boot"; + reg = <0x0 0x1f0000>; + }; + partition@1f0000 { + label = "U-Boot ENV Factory"; + reg = <0x1f0000 0x10000>; + }; + partition@200000 { + label = "Reserved"; + reg = <0x200000 0x1f0000>; + }; + partition@3f0000 { + label = "U-Boot ENV"; + reg = <0x3f0000 0x10000>; + }; + }; + }; +}; + +&cp0_syscon0 { + cp0_pinctrl: pinctrl { + compatible = "marvell,cp115-standalone-pinctrl"; + cp0_i2c0_pins: cp0-i2c-pins-0 { + marvell,pins = "mpp37", "mpp38"; + marvell,function = "i2c0"; + }; + cp0_i2c1_pins: cp0-i2c-pins-1 { + marvell,pins = "mpp35", "mpp36"; + marvell,function = "i2c1"; + }; + cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 { + marvell,pins = "mpp0", "mpp1", "mpp2", + "mpp3", "mpp4", "mpp5", + "mpp6", "mpp7", "mpp8", + "mpp9", "mpp10", "mpp11"; + marvell,function = "ge0"; + }; + cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 { + marvell,pins = "mpp44", "mpp45", "mpp46", + "mpp47", "mpp48", "mpp49", + "mpp50", "mpp51", "mpp52", + "mpp53", "mpp54", "mpp55"; + marvell,function = "ge1"; + }; + cp0_spi0_pins: cp0-spi-pins-0 { + marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16"; + marvell,function = "spi1"; + }; + }; +}; + +&cp0_usb3_1 { + status = "okay"; + phys = <&cp0_comphy3 1>; + phy-names = "usb"; +}; + +/* + * Instantiate the first connected CP115 + */ + +#define CP11X_NAME cp1 +#define CP11X_BASE f4000000 +#define CP11X_PCIEx_MEM_BASE(iface) (0xe2000000 + (iface * 0x1000000)) +#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000 +#define CP11X_PCIE0_BASE f4600000 +#define CP11X_PCIE1_BASE f4620000 +#define CP11X_PCIE2_BASE f4640000 + +#include "armada-cp115.dtsi" + +#undef CP11X_NAME +#undef CP11X_BASE +#undef CP11X_PCIEx_MEM_BASE +#undef CP11X_PCIEx_MEM_SIZE +#undef CP11X_PCIE0_BASE +#undef CP11X_PCIE1_BASE +#undef CP11X_PCIE2_BASE + +&cp1_crypto { + status = "okay"; +}; + +&cp1_xmdio { + status = "okay"; + cp1_nbaset_phy0: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <2>; + }; + cp1_nbaset_phy1: ethernet-phy@4 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + }; + cp1_nbaset_phy2: ethernet-phy@5 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <8>; + }; +}; + +&cp1_ethernet { + status = "okay"; +}; + +/* CON50 */ +&cp1_eth0 { + status = "okay"; + phy-mode = "10gbase-kr"; + phys = <&cp1_comphy2 0>; + phy = <&cp1_nbaset_phy0>; +}; + +&cp1_eth1 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp1_comphy4 1>; + phy = <&cp1_nbaset_phy1>; +}; + +&cp1_eth2 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp1_comphy1 2>; + phy = <&cp1_nbaset_phy2>; +}; + +&cp1_gpio1 { + status = "okay"; +}; + +&cp1_gpio2 { + status = "okay"; +}; + +&cp1_i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&cp1_i2c0_pins>; + clock-frequency = <100000>; +}; + +&cp1_syscon0 { + cp1_pinctrl: pinctrl { + compatible = "marvell,cp115-standalone-pinctrl"; + cp1_i2c0_pins: cp1-i2c-pins-0 { + marvell,pins = "mpp37", "mpp38"; + marvell,function = "i2c0"; + }; + cp1_spi0_pins: cp1-spi-pins-0 { + marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16"; + marvell,function = "spi1"; + }; + cp1_xhci0_vbus_pins: cp1-xhci0-vbus-pins { + marvell,pins = "mpp3"; + marvell,function = "gpio"; + }; + }; +}; + +/* + * Instantiate the second connected CP115 + */ + +#define CP11X_NAME cp2 +#define CP11X_BASE f6000000 +#define CP11X_PCIEx_MEM_BASE(iface) (0xe5000000 + (iface * 0x1000000)) +#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000 +#define CP11X_PCIE0_BASE f6600000 +#define CP11X_PCIE1_BASE f6620000 +#define CP11X_PCIE2_BASE f6640000 + +#include "armada-cp115.dtsi" + +#undef CP11X_NAME +#undef CP11X_BASE +#undef CP11X_PCIEx_MEM_BASE +#undef CP11X_PCIEx_MEM_SIZE +#undef CP11X_PCIE0_BASE +#undef CP11X_PCIE1_BASE +#undef CP11X_PCIE2_BASE + +&cp2_crypto { + status = "okay"; +}; + +&cp2_ethernet { + status = "okay"; +}; + +&cp2_xmdio { + status = "okay"; + cp2_nbaset_phy0: ethernet-phy@6 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <2>; + }; + cp2_nbaset_phy1: ethernet-phy@7 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <0>; + }; + cp2_nbaset_phy2: ethernet-phy@8 { + compatible = "ethernet-phy-ieee802.3-c45"; + reg = <8>; + }; +}; + +/* SLM-1521-V2, CON9 */ +&cp2_eth0 { + status = "okay"; + phy-mode = "10gbase-kr"; + phys = <&cp2_comphy2 0>; + phy = <&cp2_nbaset_phy0>; +}; + +&cp2_eth1 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp2_comphy4 1>; + phy = <&cp2_nbaset_phy1>; +}; + +&cp2_eth2 { + status = "okay"; + phy-mode = "2500base-x"; + phys = <&cp2_comphy1 2>; + phy = <&cp2_nbaset_phy2>; +}; + +&cp2_gpio1 { + status = "okay"; +}; + +&cp2_gpio2 { + status = "okay"; +}; + +&cp2_i2c0 { + clock-frequency = <100000>; + /* SLM-1521-V2 - U3 */ + i2c-mux@72 { + compatible = "nxp,pca9544"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x72>; + cp2_sfpp0_i2c: i2c@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + }; + + i2c@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + /* U12 */ + cp2_module_expander1: pca9555@21 { + compatible = "nxp,pca9555"; + pinctrl-names = "default"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x21>; + }; + }; + }; +}; + +&cp2_syscon0 { + cp2_pinctrl: pinctrl { + compatible = "marvell,cp115-standalone-pinctrl"; + cp2_i2c0_pins: cp2-i2c-pins-0 { + marvell,pins = "mpp37", "mpp38"; + marvell,function = "i2c0"; + }; + }; +}; diff --git a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9132-puzzle-m902.dts b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9132-puzzle-m902.dts index fd99eb2d1..c54fb960e 100644 --- a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9132-puzzle-m902.dts +++ b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9132-puzzle-m902.dts @@ -17,6 +17,7 @@ chosen { stdout-path = "serial0:115200n8"; + bootargs-append = " root=/dev/mmcblk0p3"; }; aliases { diff --git a/target/linux/mvebu/image/Makefile b/target/linux/mvebu/image/Makefile index b0498d34c..09f8d9635 100644 --- a/target/linux/mvebu/image/Makefile +++ b/target/linux/mvebu/image/Makefile @@ -39,6 +39,16 @@ define Build/boot-img-ext4 $@.bootimg $@.boot endef +define Build/boot-qnap-img-ext4 + rm -fR $@.boot + mkdir -p $@.boot + $(foreach dts,$(DEVICE_DTS), $(CP) $(KDIR)/image-$(dts).dtb $@.boot/$(dts).dtb;) + $(CP) $(KDIR)/vmlinux $@.boot/Image + make_ext4fs -J -L kernel -l $(CONFIG_TARGET_KERNEL_PARTSIZE)M \ + $(if $(SOURCE_DATE_EPOCH),-T $(SOURCE_DATE_EPOCH)) \ + $@.bootimg $@.boot +endef + define Build/buffalo-kernel-jffs2 rm -rf $(KDIR)/kernel_jffs2 $@.fakerd mkdir -p $(KDIR)/kernel_jffs2 diff --git a/target/linux/mvebu/image/cortexa72.mk b/target/linux/mvebu/image/cortexa72.mk index 47d958b2f..4ef5a4705 100644 --- a/target/linux/mvebu/image/cortexa72.mk +++ b/target/linux/mvebu/image/cortexa72.mk @@ -78,3 +78,15 @@ define Device/iei_puzzle-m902 SOC := cn9132 endef TARGET_DEVICES += iei_puzzle-m902 + +define Device/qnap_qhora-32x + $(call Device/Default-arm64) + SOC := cn9132 + DEVICE_VENDOR := QNAP + DEVICE_MODEL := QHora-321/322 + DEVICE_PACKAGES += kmod-rtc-ds1307 + DEVICE_DTS := cn9131-db-A cn9131-puzzle-m901 cn9132-db-A cn9132-puzzle-m902 + SUPPORTED_DEVICES := qnap,qhora-321 qnap,qhora-322 iei,puzzle-m901 iei,puzzle-m902 + IMAGE/sdcard.img.gz := boot-scr | boot-qnap-img-ext4 | sdcard-img-ext4 | gzip | append-metadata +endef +TARGET_DEVICES += qnap_qhora-32x diff --git a/target/linux/mvebu/patches-5.10/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/mvebu/patches-5.10/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch index c220e906c..ba9c5685a 100644 --- a/target/linux/mvebu/patches-5.10/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch +++ b/target/linux/mvebu/patches-5.10/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch @@ -187,7 +187,7 @@ Signed-off-by: Michael Gray static int kernel_init(void *); extern void init_IRQ(void); -@@ -901,6 +905,18 @@ asmlinkage __visible void __init __no_sa +@@ -903,6 +907,18 @@ asmlinkage __visible void __init __no_sa page_alloc_init(); pr_notice("Kernel command line: %s\n", saved_command_line); diff --git a/target/linux/mvebu/patches-5.15/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/mvebu/patches-5.15/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch index 72041e000..5d42762e7 100644 --- a/target/linux/mvebu/patches-5.15/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch +++ b/target/linux/mvebu/patches-5.15/300-mvebu-Mangle-bootloader-s-kernel-arguments.patch @@ -176,7 +176,7 @@ Signed-off-by: Michael Gray } --- a/init/main.c +++ b/init/main.c -@@ -112,6 +112,10 @@ +@@ -113,6 +113,10 @@ #include @@ -187,7 +187,7 @@ Signed-off-by: Michael Gray static int kernel_init(void *); extern void init_IRQ(void); -@@ -992,6 +996,18 @@ asmlinkage __visible void __init __no_sa +@@ -995,6 +999,18 @@ asmlinkage __visible void __init __no_sa page_alloc_init(); pr_notice("Kernel command line: %s\n", saved_command_line); diff --git a/target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch b/target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch index 8a0283e39..16d321d2b 100644 --- a/target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch +++ b/target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch @@ -22,7 +22,7 @@ Signed-off-by: Tim Harvey #include #include #include -@@ -5863,3 +5864,34 @@ static void nvidia_ion_ahci_fixup(struct +@@ -5864,3 +5865,34 @@ static void nvidia_ion_ahci_fixup(struct pdev->dev_flags |= PCI_DEV_FLAGS_HAS_MSI_MASKING; } DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x0ab8, nvidia_ion_ahci_fixup); diff --git a/target/linux/oxnas/patches-5.10/996-generic-Mangle-bootloader-s-kernel-arguments.patch b/target/linux/oxnas/patches-5.10/996-generic-Mangle-bootloader-s-kernel-arguments.patch index de2868ce9..9cc33f5a4 100644 --- a/target/linux/oxnas/patches-5.10/996-generic-Mangle-bootloader-s-kernel-arguments.patch +++ b/target/linux/oxnas/patches-5.10/996-generic-Mangle-bootloader-s-kernel-arguments.patch @@ -168,7 +168,7 @@ Signed-off-by: Adrian Panella static int kernel_init(void *); extern void init_IRQ(void); -@@ -901,6 +905,18 @@ asmlinkage __visible void __init __no_sa +@@ -903,6 +907,18 @@ asmlinkage __visible void __init __no_sa page_alloc_init(); pr_notice("Kernel command line: %s\n", saved_command_line); diff --git a/target/linux/phytium/patches-5.10/001-add-phytium-support.patch b/target/linux/phytium/patches-5.10/001-add-phytium-support.patch index 2884de2ba..4de812ae3 100644 --- a/target/linux/phytium/patches-5.10/001-add-phytium-support.patch +++ b/target/linux/phytium/patches-5.10/001-add-phytium-support.patch @@ -1,6 +1,6 @@ --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt -@@ -3898,6 +3898,10 @@ +@@ -3919,6 +3919,10 @@ force Enable ASPM even on devices that claim not to support it. WARNING: Forcing ASPM on may cause system lockups. @@ -1849,7 +1849,7 @@ +obj-$(CONFIG_PHYTIUM_IXIC) += irq-phytium-ixic.o --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c -@@ -4792,6 +4792,7 @@ static void its_restore_enable(void) +@@ -4787,6 +4787,7 @@ static void its_restore_enable(void) { struct its_node *its; int ret; @@ -1857,7 +1857,7 @@ raw_spin_lock(&its_lock); list_for_each_entry(its, &its_nodes, entry) { -@@ -4845,6 +4846,23 @@ static void its_restore_enable(void) +@@ -4840,6 +4841,23 @@ static void its_restore_enable(void) GITS_TYPER_HCC(gic_read_typer(base + GITS_TYPER))) its_cpu_init_collection(its); } @@ -4404,7 +4404,7 @@ return 0; --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c -@@ -30,6 +30,7 @@ +@@ -31,6 +31,7 @@ #include #include #include /* isa_dma_bridge_buggy */ @@ -4412,7 +4412,7 @@ #include "pci.h" static ktime_t fixup_debug_start(struct pci_dev *dev, -@@ -3901,12 +3902,12 @@ static int nvme_disable_and_flr(struct p +@@ -3902,12 +3903,12 @@ static int nvme_disable_and_flr(struct p void __iomem *bar; u16 cmd; u32 cfg; @@ -4427,7 +4427,7 @@ return 0; bar = pci_iomap(dev, 0, NVME_REG_CC + sizeof(cfg)); -@@ -3960,7 +3961,7 @@ static int nvme_disable_and_flr(struct p +@@ -3961,7 +3962,7 @@ static int nvme_disable_and_flr(struct p pci_iounmap(dev, bar); pcie_flr(dev); @@ -4436,7 +4436,7 @@ return 0; } -@@ -4056,6 +4057,7 @@ static const struct pci_dev_reset_method +@@ -4057,6 +4058,7 @@ static const struct pci_dev_reset_method { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IVB_M2_VGA, reset_ivb_igd }, { PCI_VENDOR_ID_SAMSUNG, 0xa804, nvme_disable_and_flr }, @@ -4444,7 +4444,7 @@ { PCI_VENDOR_ID_INTEL, 0x0953, delay_250ms_after_flr }, { PCI_VENDOR_ID_CHELSIO, PCI_ANY_ID, reset_chelsio_generic_dev }, -@@ -4995,6 +4997,10 @@ static const struct pci_dev_acs_enabled +@@ -4996,6 +4998,10 @@ static const struct pci_dev_acs_enabled { PCI_VENDOR_ID_ZHAOXIN, PCI_ANY_ID, pci_quirk_zhaoxin_pcie_ports_acs }, /* Wangxun nics */ { PCI_VENDOR_ID_WANGXUN, PCI_ANY_ID, pci_quirk_wangxun_nic_acs }, @@ -4455,7 +4455,7 @@ { 0 } }; -@@ -5378,6 +5384,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SE +@@ -5380,6 +5386,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SE DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0144, quirk_no_ext_tags); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0420, quirk_no_ext_tags); DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, 0x0422, quirk_no_ext_tags); diff --git a/target/linux/qualcommax/Makefile b/target/linux/qualcommax/Makefile index 87f919085..e35f55a46 100644 --- a/target/linux/qualcommax/Makefile +++ b/target/linux/qualcommax/Makefile @@ -14,8 +14,10 @@ include $(INCLUDE_DIR)/target.mk DEFAULT_PACKAGES += \ kmod-usb3 kmod-usb-dwc3 kmod-usb-dwc3-qcom \ kmod-leds-gpio kmod-gpio-button-hotplug \ - kmod-qca-nss-dp kmod-ath11k-ahb \ - wpad-openssl uboot-envtools \ - e2fsprogs kmod-fs-ext4 losetup + kmod-qca-nss-dp kmod-qca-nss-drv kmod-qca-ssdk \ + kmod-qca-nss-ecm kmod-qca-nss-drv-bridge-mgr \ + kmod-qca-nss-drv-vlan kmod-qca-nss-drv-pppoe \ + kmod-ath11k-ahb wpad-openssl uboot-envtools \ + e2fsprogs kmod-fs-ext4 losetup autocore-arm $(eval $(call BuildTarget)) diff --git a/target/linux/qualcommax/ipq807x/base-files/lib/upgrade/mmc.sh b/target/linux/qualcommax/base-files/lib/upgrade/mmc.sh similarity index 100% rename from target/linux/qualcommax/ipq807x/base-files/lib/upgrade/mmc.sh rename to target/linux/qualcommax/base-files/lib/upgrade/mmc.sh diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-360v6.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-360v6.dts index 74d54f094..e8872c86f 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-360v6.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-360v6.dts @@ -4,7 +4,8 @@ #include "ipq6018-512m.dtsi" #include "ipq6018-ess.dtsi" -#include "ipq6018-opp.dtsi" +#include "ipq6018-mp5496.dtsi" +#include "ipq6018-nss.dtsi" #include #include @@ -86,6 +87,10 @@ status = "okay"; }; +&qpic_bam { + status = "okay"; +}; + &qpic_nand { status = "okay"; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-ax18.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-ax18.dts index 91ccf1cff..e887ff87a 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-ax18.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-ax18.dts @@ -4,7 +4,7 @@ #include "ipq6018-256m.dtsi" #include "ipq6018-ess.dtsi" -#include "ipq6000-opp.dtsi" +#include "ipq6018-nss.dtsi" #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-gl-ax1800.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-gl-ax1800.dts index a9e42dca8..70b4b80a0 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-gl-ax1800.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-gl-ax1800.dts @@ -49,3 +49,7 @@ phy-handle = <&qca8075_4>; label = "lan4"; }; + +&wifi { + qcom,ath11k-calibration-variant = "GL-iNet-GL-AX1800"; +}; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-gl-axt1800.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-gl-axt1800.dts index 6afdfa31d..5e93c862d 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-gl-axt1800.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-gl-axt1800.dts @@ -115,3 +115,7 @@ phy-handle = <&qca8075_2>; label = "lan1"; }; + +&wifi { + qcom,ath11k-calibration-variant = "GL-iNet-GL-AXT1800"; +}; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-glinet.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-glinet.dtsi index 4538f75c1..6c2a8e7f5 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-glinet.dtsi +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-glinet.dtsi @@ -2,7 +2,7 @@ #include "ipq6018-512m.dtsi" #include "ipq6018-ess.dtsi" -#include "ipq6000-opp.dtsi" +#include "ipq6018-nss.dtsi" #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-mr7350.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-mr7350.dts index 6767d775a..284f9356a 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-mr7350.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-mr7350.dts @@ -4,7 +4,8 @@ #include "ipq6018-512m.dtsi" #include "ipq6018-ess.dtsi" -#include "ipq6018-opp.dtsi" +#include "ipq6018-mp5496.dtsi" +#include "ipq6018-nss.dtsi" #include #include @@ -294,5 +295,6 @@ &wifi { status = "okay"; + qcom,ath11k-calibration-variant = "Linksys-MR7350"; qcom,ath11k-fw-memory-mode = <1>; }; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-re-ss-01.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-re-ss-01.dts new file mode 100644 index 000000000..3a4ec3caa --- /dev/null +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-re-ss-01.dts @@ -0,0 +1,217 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; + +#include "ipq6018-512m.dtsi" +#include "ipq6018-ess.dtsi" +#include "ipq6018-nss.dtsi" + +#include +#include + +/ { + model = "JDCloud RE-SS-01"; + compatible = "jdcloud,re-ss-01", "qcom,ipq6018"; + + aliases { + serial0 = &blsp1_uart3; + led-boot = &led_status_green; + led-failsafe = &led_status_red; + led-running = &led_status_blue; + led-upgrade = &led_status_red; + + ethernet1 = "/soc/dp2"; + ethernet2 = "/soc/dp3"; + ethernet3 = "/soc/dp4"; + ethernet4 = "/soc/dp5"; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + wps { + label = "wps"; + linux,code = ; + gpios = <&tlmm 8 GPIO_ACTIVE_LOW>; + }; + + reset { + label = "reset"; + linux,code = ; + gpios = <&tlmm 9 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status_red: red { + label = "red:status"; + gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>; + }; + + led_status_blue: blue { + label = "blue:status"; + gpios = <&tlmm 35 GPIO_ACTIVE_HIGH>; + }; + + led_status_green: green { + label = "green:status"; + gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&tlmm { + gpio-reserved-ranges = <20 1>; + + button_pins: button_pins { + mux { + pins = "gpio8", "gpio9"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + }; + + mdio_pins: mdio-pins { + mdc { + pins = "gpio64"; + function = "mdc"; + drive-strength = <8>; + bias-pull-up; + }; + + mdio { + pins = "gpio65"; + function = "mdio"; + drive-strength = <8>; + bias-pull-up; + }; + }; +}; + +&blsp1_uart3 { + pinctrl-0 = <&serial_3_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&qusb_phy_0 { + status = "okay"; +}; + +&rpm { + status = "disabled"; +}; + +&sdhc { + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + non-removable; + status = "okay"; +}; + +&ssphy_0 { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&mdio { + status = "okay"; + + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>; + + qca8075_1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; + + qca8075_2: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <2>; + }; + + qca8075_3: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <3>; + }; + + qca8075_4: ethernet-phy@4 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <4>; + }; +}; + +&switch { + status = "okay"; + + switch_cpu_bmp = <0x1>; /* cpu port bitmap */ + switch_lan_bmp = <0x1e>; /* lan port bitmap */ + switch_wan_bmp = <0x20>; /* wan port bitmap */ + switch_inner_bmp = <0xc0>; /*inner port bitmap*/ + switch_mac_mode = <0x0>; /* mac mode for uniphy 0*/ + switch_mac_mode1 = <0xff>; /* mac mode for uniphy 1*/ + switch_mac_mode2 = <0xff>; /* mac mode for uniphy 2*/ + + qcom,port_phyinfo { + port@2 { + port_id = <2>; + phy_address = <1>; + }; + port@3 { + port_id = <3>; + phy_address = <2>; + }; + port@4 { + port_id = <4>; + phy_address = <3>; + }; + port@5 { + port_id = <5>; + phy_address = <4>; + }; + }; +}; + +&edma { + status = "okay"; +}; + +&dp2 { + status = "okay"; + phy-handle = <&qca8075_1>; + label = "lan1"; +}; + +&dp3 { + status = "okay"; + phy-handle = <&qca8075_2>; + label = "lan2"; +}; + +&dp4 { + status = "okay"; + phy-handle = <&qca8075_3>; + label = "lan3"; +}; + +&dp5 { + status = "okay"; + phy-handle = <&qca8075_4>; + label = "wan"; +}; + +&wifi { + status = "okay"; + qcom,ath11k-calibration-variant = "JDC-AX1800-Pro"; + qcom,ath11k-fw-memory-mode = <1>; +}; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-xiaomi.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-xiaomi.dtsi index f8d6e47fb..884f19858 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-xiaomi.dtsi +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6000-xiaomi.dtsi @@ -4,7 +4,8 @@ #include "ipq6018-512m.dtsi" #include "ipq6018-ess.dtsi" -#include "ipq6018-opp.dtsi" +#include "ipq6018-mp5496.dtsi" +#include "ipq6018-nss.dtsi" #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6010-re-cs-02.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6010-re-cs-02.dts new file mode 100644 index 000000000..a7ec1be5f --- /dev/null +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6010-re-cs-02.dts @@ -0,0 +1,276 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +/dts-v1/; + +#include "ipq6018.dtsi" +#include "ipq6018-ess.dtsi" +#include "ipq6018-nss.dtsi" + +#include +#include + +/ { + model = "JDCloud RE-CS-02"; + compatible = "jdcloud,re-cs-02", "qcom,ipq6018"; + + aliases { + serial0 = &blsp1_uart3; + serial1 = &blsp1_uart6; + led-boot = &led_status_green; + led-failsafe = &led_status_red; + led-running = &led_status_blue; + led-upgrade = &led_status_red; + + ethernet0 = "/soc/dp1"; + ethernet1 = "/soc/dp2"; + ethernet2 = "/soc/dp3"; + ethernet3 = "/soc/dp4"; + ethernet4 = "/soc/dp5"; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&button_pins>; + pinctrl-names = "default"; + + wps { + label = "wps"; + linux,code = ; + gpios = <&tlmm 72 GPIO_ACTIVE_LOW>; + }; + + reset { + label = "reset"; + linux,code = ; + gpios = <&tlmm 56 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status_red: red { + label = "red:status"; + gpios = <&tlmm 57 GPIO_ACTIVE_HIGH>; + }; + + led_status_blue: blue { + label = "blue:status"; + gpios = <&tlmm 79 GPIO_ACTIVE_HIGH>; + }; + + led_status_green: green { + label = "green:status"; + gpios = <&tlmm 58 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&tlmm { + gpio-reserved-ranges = <20 1>; + + button_pins: button_pins { + mux { + pins = "gpio56", "gpio72"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + }; + + btuart_pins: btuart_pins { + mux { + pins = "gpio48", "gpio49"; + function = "blsp5_uart"; + drive-strength = <8>; + bias-pull-up; + }; + }; + + mdio_pins: mdio-pins { + mdc { + pins = "gpio64"; + function = "mdc"; + drive-strength = <8>; + bias-pull-up; + }; + + mdio { + pins = "gpio65"; + function = "mdio"; + drive-strength = <8>; + bias-pull-up; + }; + }; +}; + +&blsp1_uart3 { + pinctrl-0 = <&serial_3_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&blsp1_uart6 { + pinctrl-0 = <&btuart_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&pcie_phy { + status = "okay"; +}; + +&pcie0 { + perst-gpio = <&tlmm 53 GPIO_ACTIVE_LOW>; + status = "okay"; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi@1,0 { + compatible = "pci17cb,1104"; + reg = <0x00010000 0 0 0 0>; + }; + }; +}; + +&qusb_phy_0 { + status = "okay"; +}; + +&rpm { + status = "disabled"; +}; + +&sdhc { + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + non-removable; + status = "okay"; +}; + +&ssphy_0 { + status = "okay"; +}; + +&usb3 { + status = "okay"; +}; + +&mdio { + status = "okay"; + + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + reset-gpios = <&tlmm 75 GPIO_ACTIVE_LOW>; + + qca8075_0: ethernet-phy@24 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <24>; + }; + + qca8075_1: ethernet-phy@25 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <25>; + }; + + qca8075_2: ethernet-phy@26 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <26>; + }; + + qca8075_3: ethernet-phy@27 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <27>; + }; + + qca8081: ethernet-phy@12 { + compatible = "ethernet-phy-id004d.d101"; + reg = <12>; + reset-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>; + }; +}; + +&switch { + status = "okay"; + + switch_cpu_bmp = <0x1>; /* cpu port bitmap */ + switch_lan_bmp = <0x1e>; /* lan port bitmap */ + switch_wan_bmp = <0x20>; /* wan port bitmap */ + switch_inner_bmp = <0xc0>; /*inner port bitmap*/ + switch_mac_mode = <0x0>; /* mac mode for uniphy 0*/ + switch_mac_mode1 = <0xf>; /* mac mode for uniphy 1*/ + switch_mac_mode2 = <0xff>; /* mac mode for uniphy 2*/ + + qcom,port_phyinfo { + port@1 { + port_id = <1>; + phy_address = <24>; + }; + port@2 { + port_id = <2>; + phy_address = <25>; + }; + port@3 { + port_id = <3>; + phy_address = <26>; + }; + port@4 { + port_id = <4>; + phy_address = <27>; + }; + port@5 { + port_id = <5>; + phy_address = <12>; + port_mac_sel = "QGMAC_PORT"; + }; + }; +}; + +&edma { + status = "okay"; +}; + +&dp1 { + status = "okay"; + phy-handle = <&qca8075_0>; + label = "lan1"; +}; + +&dp2 { + status = "okay"; + phy-handle = <&qca8075_1>; + label = "lan2"; +}; + +&dp3 { + status = "okay"; + phy-handle = <&qca8075_2>; + label = "lan3"; +}; + +&dp4 { + status = "okay"; + phy-handle = <&qca8075_3>; + label = "lan4"; +}; + +&dp5 { + status = "okay"; + phy-handle = <&qca8081>; + label = "wan"; +}; + +&wifi { + status = "okay"; + qcom,ath11k-calibration-variant = "JDC-AX1800-Pro"; + qcom,ath11k-fw-memory-mode = <1>; +}; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-nss.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-nss.dtsi new file mode 100644 index 000000000..2d04ac140 --- /dev/null +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq6018-nss.dtsi @@ -0,0 +1,192 @@ +// SPDX-License-Identifier: GPL-2.0-only + +/ { + nss_dummy_reg: nss-regulator { + compatible = "regulator-fixed"; + regulator-name = "nss-reg"; + regulator-min-microvolt = <848000>; + regulator-max-microvolt = <848000>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&soc { + nss-common { + compatible = "qcom,nss-common"; + reg = <0x0 0x01868010 0x0 0x1000>, <0x0 0x40000000 0x0 0x1000>; + reg-names = "nss-misc-reset", "nss-misc-reset-flag"; + memory-region = <&nss_region>; + }; + + nss0: nss@40000000 { + compatible = "qcom,nss"; + interrupts = <0 402 0x1>, <0 401 0x1>, <0 400 0x1>, + <0 399 0x1>, <0 398 0x1>, <0 397 0x1>, + <0 396 0x1>, <0 395 0x1>, <0 394 0x1>, + <0 393 0x1>; + reg = <0x0 0x39000000 0x0 0x1000>, <0x0 0x0b111000 0x0 0x1000>; + reg-names = "nphys", "qgic-phys"; + clocks = <&gcc GCC_NSS_NOC_CLK>, + <&gcc GCC_NSS_PTP_REF_CLK>, + <&gcc GCC_NSS_CSR_CLK>, <&gcc GCC_NSS_CFG_CLK>, + <&gcc GCC_NSSNOC_QOSGEN_REF_CLK>, + <&gcc GCC_NSSNOC_SNOC_CLK>, + <&gcc GCC_NSSNOC_TIMEOUT_REF_CLK>, + <&gcc GCC_MEM_NOC_UBI32_CLK>, + <&gcc GCC_NSS_CE_AXI_CLK>, + <&gcc GCC_NSS_CE_APB_CLK>, + <&gcc GCC_NSSNOC_CE_AXI_CLK>, + <&gcc GCC_NSSNOC_CE_APB_CLK>, + <&gcc GCC_NSSNOC_UBI0_AHB_CLK>, + <&gcc GCC_UBI0_CORE_CLK>, + <&gcc GCC_UBI0_AHB_CLK>, + <&gcc GCC_UBI0_AXI_CLK>, + <&gcc GCC_UBI0_NC_AXI_CLK>, + <&gcc GCC_UBI0_UTCM_CLK>, + <&gcc GCC_SNOC_NSSNOC_CLK>; + clock-names = "nss-noc-clk", "nss-ptp-ref-clk", + "nss-csr-clk", "nss-cfg-clk", + "nss-nssnoc-qosgen-ref-clk", + "nss-nssnoc-snoc-clk", + "nss-nssnoc-timeout-ref-clk", + "nss-mem-noc-ubi32-clk", + "nss-ce-axi-clk", "nss-ce-apb-clk", + "nss-nssnoc-ce-axi-clk", + "nss-nssnoc-ce-apb-clk", + "nss-nssnoc-ahb-clk", + "nss-core-clk", "nss-ahb-clk", + "nss-axi-clk", "nss-nc-axi-clk", + "nss-utcm-clk", "nss-snoc-nssnoc-clk"; + qcom,id = <0>; + qcom,num-queue = <4>; + qcom,num-irq = <10>; + qcom,num-pri = <4>; + qcom,load-addr = <0x40000000>; + qcom,low-frequency = <187200000>; + qcom,mid-frequency = <748800000>; + qcom,max-frequency = <1497600000>; + qcom,bridge-enabled; + qcom,ipv4-enabled; + qcom,ipv4-reasm-enabled; + qcom,ipv6-enabled; + qcom,ipv6-reasm-enabled; + qcom,wlanredirect-enabled; + qcom,tun6rd-enabled; + qcom,l2tpv2-enabled; + qcom,gre-enabled; + qcom,gre-redir-enabled; + qcom,gre-redir-mark-enabled; + qcom,map-t-enabled; + qcom,portid-enabled; + qcom,ppe-enabled; + qcom,pppoe-enabled; + qcom,pptp-enabled; + qcom,tunipip6-enabled; + qcom,shaping-enabled; + qcom,wlan-dataplane-offload-enabled; + qcom,vlan-enabled; + qcom,capwap-enabled; + qcom,dtls-enabled; + qcom,tls-enabled; + qcom,crypto-enabled; + qcom,ipsec-enabled; + qcom,qvpn-enabled; + qcom,pvxlan-enabled; + qcom,clmap-enabled; + qcom,vxlan-enabled; + qcom,match-enabled; + qcom,mirror-enabled; + mx-supply = <&nss_dummy_reg>; + npu-supply = <&nss_dummy_reg>; + }; + + nss_crypto: qcom,nss_crypto { + compatible = "qcom,nss-crypto"; + #address-cells = <1>; + #size-cells = <1>; + qcom,max-contexts = <64>; + qcom,max-context-size = <32>; + ranges; + + eip197_node { + compatible = "qcom,eip197"; + reg-names = "crypto_pbase"; + reg = <0x39800000 0x7ffff>; + clocks = <&gcc GCC_NSS_CRYPTO_CLK>, + <&gcc GCC_NSSNOC_CRYPTO_CLK>, + <&gcc GCC_CRYPTO_PPE_CLK>; + clock-names = "crypto_clk", "crypto_nocclk", + "crypto_ppeclk"; + clock-frequency = /bits/ 64 <300000000 300000000 300000000>; + qcom,dma-mask = <0xff>; + qcom,transform-enabled; + qcom,aes128-cbc; + qcom,aes192-cbc; + qcom,aes256-cbc; + qcom,aes128-ctr; + qcom,aes192-ctr; + qcom,aes256-ctr; + qcom,aes128-ecb; + qcom,aes192-ecb; + qcom,aes256-ecb; + qcom,3des-cbc; + qcom,md5-hash; + qcom,sha160-hash; + qcom,sha224-hash; + qcom,sha256-hash; + qcom,sha384-hash; + qcom,sha512-hash; + qcom,md5-hmac; + qcom,sha160-hmac; + qcom,sha224-hmac; + qcom,sha256-hmac; + qcom,sha384-hmac; + qcom,sha512-hmac; + qcom,aes128-gcm-gmac; + qcom,aes192-gcm-gmac; + qcom,aes256-gcm-gmac; + qcom,aes128-cbc-md5-hmac; + qcom,aes128-cbc-sha160-hmac; + qcom,aes192-cbc-md5-hmac; + qcom,aes192-cbc-sha160-hmac; + qcom,aes256-cbc-md5-hmac; + qcom,aes256-cbc-sha160-hmac; + qcom,aes128-ctr-sha160-hmac; + qcom,aes192-ctr-sha160-hmac; + qcom,aes256-ctr-sha160-hmac; + qcom,aes128-ctr-md5-hmac; + qcom,aes192-ctr-md5-hmac; + qcom,aes256-ctr-md5-hmac; + qcom,3des-cbc-md5-hmac; + qcom,3des-cbc-sha160-hmac; + qcom,aes128-cbc-sha256-hmac; + qcom,aes192-cbc-sha256-hmac; + qcom,aes256-cbc-sha256-hmac; + qcom,aes128-ctr-sha256-hmac; + qcom,aes192-ctr-sha256-hmac; + qcom,aes256-ctr-sha256-hmac; + qcom,3des-cbc-sha256-hmac; + qcom,aes128-cbc-sha384-hmac; + qcom,aes192-cbc-sha384-hmac; + qcom,aes256-cbc-sha384-hmac; + qcom,aes128-ctr-sha384-hmac; + qcom,aes192-ctr-sha384-hmac; + qcom,aes256-ctr-sha384-hmac; + qcom,aes128-cbc-sha512-hmac; + qcom,aes192-cbc-sha512-hmac; + qcom,aes256-cbc-sha512-hmac; + qcom,aes128-ctr-sha512-hmac; + qcom,aes192-ctr-sha512-hmac; + qcom,aes256-ctr-sha512-hmac; + + engine0 { + reg_offset = <0x80000>; + qcom,ifpp-enabled; + qcom,ipue-enabled; + qcom,ofpp-enabled; + qcom,opue-enabled; + }; + }; + }; +}; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8070-cax1800.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8070-cax1800.dts index 3415426a9..092781e87 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8070-cax1800.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8070-cax1800.dts @@ -6,6 +6,7 @@ #include "ipq8074-512m.dtsi" #include "ipq8074-ac-cpu.dtsi" #include "ipq8074-ess.dtsi" +#include "ipq8074-nss.dtsi" #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8070-rm2-6.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8070-rm2-6.dts index ee9d23e09..5e94ad3fe 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8070-rm2-6.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8070-rm2-6.dts @@ -5,6 +5,7 @@ #include "ipq8074-512m.dtsi" #include "ipq8074-ac-cpu.dtsi" #include "ipq8074-ess.dtsi" +#include "ipq8074-nss.dtsi" #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi index f4ebfc8f4..2a8368cbe 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dtsi @@ -4,6 +4,7 @@ #include "ipq8074-512m.dtsi" #include "ipq8074-ac-cpu.dtsi" #include "ipq8074-ess.dtsi" +#include "ipq8074-nss.dtsi" #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-eap102.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-eap102.dts index 357b6368d..17e94dc22 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-eap102.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-eap102.dts @@ -6,6 +6,7 @@ #include "ipq8074.dtsi" #include "ipq8074-ac-cpu.dtsi" #include "ipq8074-ess.dtsi" +#include "ipq8074-nss.dtsi" #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-mf269.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-mf269.dts index 628f1c627..c34957bd9 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-mf269.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8071-mf269.dts @@ -5,6 +5,7 @@ #include "ipq8074-512m.dtsi" #include "ipq8074-ac-cpu.dtsi" #include "ipq8074-ess.dtsi" +#include "ipq8074-nss.dtsi" #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-301w.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-301w.dts index d15b9f5b0..8124e2d1a 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-301w.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-301w.dts @@ -6,6 +6,7 @@ #include "ipq8074.dtsi" #include "ipq8074-hk-cpu.dtsi" #include "ipq8074-ess.dtsi" +#include "ipq8074-nss.dtsi" #include #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-aw1000.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-aw1000.dts index 715398518..c57002982 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-aw1000.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-aw1000.dts @@ -5,6 +5,7 @@ #include "ipq8074.dtsi" #include "ipq8074-hk-cpu.dtsi" #include "ipq8074-ess.dtsi" +#include "ipq8074-nss.dtsi" #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts index fd1f32ada..a3119490e 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-ax9000.dts @@ -6,6 +6,7 @@ #include "ipq8074.dtsi" #include "ipq8074-hk-cpu.dtsi" #include "ipq8074-ess.dtsi" +#include "ipq8074-nss.dtsi" #include #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts index 5468e9e1f..44845bfee 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-dl-wrx36.dts @@ -6,6 +6,7 @@ #include "ipq8074.dtsi" #include "ipq8074-hk-cpu.dtsi" #include "ipq8074-ess.dtsi" +#include "ipq8074-nss.dtsi" #include #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-haze.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-haze.dts index 3aa2e8878..bc4841da6 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-haze.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-haze.dts @@ -5,6 +5,7 @@ #include "ipq8074.dtsi" #include "ipq8074-hk-cpu.dtsi" #include "ipq8074-ess.dtsi" +#include "ipq8074-nss.dtsi" #include #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wax218.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wax218.dts index 5bfcdcc8c..e2e5d764a 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wax218.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wax218.dts @@ -3,7 +3,7 @@ #include "ipq8074.dtsi" #include "ipq8074-hk-cpu.dtsi" #include "ipq8074-ess.dtsi" - +#include "ipq8074-nss.dtsi" #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wax620.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wax620.dts index 0cd20cc1e..8257877b8 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wax620.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wax620.dts @@ -5,6 +5,7 @@ #include "ipq8074.dtsi" #include "ipq8074-hk-cpu.dtsi" #include "ipq8074-ess.dtsi" +#include "ipq8074-nss.dtsi" #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wpq873.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wpq873.dts index 2de34af8e..e625581b1 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wpq873.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8072-wpq873.dts @@ -6,6 +6,7 @@ #include "ipq8074.dtsi" #include "ipq8074-hk-cpu.dtsi" #include "ipq8074-ess.dtsi" +#include "ipq8074-nss.dtsi" #include #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-nbg7815.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-nbg7815.dts index 2924ac3a9..1f9c3d398 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-nbg7815.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-nbg7815.dts @@ -9,6 +9,7 @@ #include "ipq8074.dtsi" #include "ipq8074-hk-cpu.dtsi" #include "ipq8074-ess.dtsi" +#include "ipq8074-nss.dtsi" #include #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-nss.dtsi b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-nss.dtsi new file mode 100644 index 000000000..d85a37230 --- /dev/null +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-nss.dtsi @@ -0,0 +1,271 @@ +// SPDX-License-Identifier: GPL-2.0-only + +/ { + nss_dummy_reg: nss-regulator { + compatible = "regulator-fixed"; + regulator-name = "nss-reg"; + regulator-min-microvolt = <848000>; + regulator-max-microvolt = <848000>; + regulator-always-on; + regulator-boot-on; + }; +}; + +&soc { + nss-common { + compatible = "qcom,nss-common"; + reg = <0x01868010 0x1000>; + reg-names = "nss-misc-reset"; + memory-region = <&nss_region>; + }; + + nss0: nss@40000000 { + compatible = "qcom,nss"; + interrupts = , + , + , + , + , + , + , + , + , + ; + reg = <0x39000000 0x1000>, + <0x38000000 0x30000>, + <0x0b111000 0x1000>; + reg-names = "nphys", "vphys", "qgic-phys"; + clocks = <&gcc GCC_NSS_NOC_CLK>, + <&gcc GCC_NSS_PTP_REF_CLK>, + <&gcc GCC_NSS_CSR_CLK>, + <&gcc GCC_NSS_CFG_CLK>, + <&gcc GCC_NSS_IMEM_CLK>, + <&gcc GCC_NSSNOC_QOSGEN_REF_CLK>, + <&gcc GCC_MEM_NOC_NSS_AXI_CLK>, + <&gcc GCC_NSSNOC_SNOC_CLK>, + <&gcc GCC_NSSNOC_TIMEOUT_REF_CLK>, + <&gcc GCC_NSS_CE_AXI_CLK>, + <&gcc GCC_NSS_CE_APB_CLK>, + <&gcc GCC_NSSNOC_CE_AXI_CLK>, + <&gcc GCC_NSSNOC_CE_APB_CLK>, + <&gcc GCC_NSSNOC_UBI0_AHB_CLK>, + <&gcc GCC_UBI0_CORE_CLK>, + <&gcc GCC_UBI0_AHB_CLK>, + <&gcc GCC_UBI0_AXI_CLK>, + <&gcc GCC_UBI0_MPT_CLK>, + <&gcc GCC_UBI0_NC_AXI_CLK>; + clock-names = "nss-noc-clk", + "nss-ptp-ref-clk", + "nss-csr-clk", + "nss-cfg-clk", + "nss-imem-clk", + "nss-nssnoc-qosgen-ref-clk", + "nss-mem-noc-nss-axi-clk", + "nss-nssnoc-snoc-clk", + "nss-nssnoc-timeout-ref-clk", + "nss-ce-axi-clk", + "nss-ce-apb-clk", + "nss-nssnoc-ce-axi-clk", + "nss-nssnoc-ce-apb-clk", + "nss-nssnoc-ahb-clk", + "nss-core-clk", + "nss-ahb-clk", + "nss-axi-clk", + "nss-mpt-clk", + "nss-nc-axi-clk"; + qcom,id = <0>; + qcom,num-queue = <4>; + qcom,num-irq = <10>; + qcom,num-pri = <4>; + qcom,load-addr = <0x40000000>; + qcom,low-frequency = <187200000>; + qcom,mid-frequency = <748800000>; + qcom,max-frequency = <1689600000>; + qcom,bridge-enabled; + qcom,ipv4-enabled; + qcom,ipv4-reasm-enabled; + qcom,ipv6-enabled; + qcom,ipv6-reasm-enabled; + qcom,wlanredirect-enabled; + qcom,tun6rd-enabled; + qcom,l2tpv2-enabled; + qcom,gre-enabled; + qcom,gre-redir-enabled; + qcom,gre-redir-mark-enabled; + qcom,map-t-enabled; + qcom,portid-enabled; + qcom,ppe-enabled; + qcom,pppoe-enabled; + qcom,pptp-enabled; + qcom,tunipip6-enabled; + qcom,shaping-enabled; + qcom,wlan-dataplane-offload-enabled; + qcom,vlan-enabled; + qcom,igs-enabled; + qcom,vxlan-enabled; + qcom,match-enabled; + qcom,mirror-enabled; + qcom,udp-st-enabled; + mx-supply = <&nss_dummy_reg>; + npu-supply = <&nss_dummy_reg>; + }; + + nss1: nss@40800000 { + compatible = "qcom,nss"; + interrupts = , + , + , + , + , + , + , + , + ; + reg = <0x39400000 0x1000>, + <0x38030000 0x30000>, + <0x0b111000 0x1000>; + reg-names = "nphys", "vphys", "qgic-phys"; + clocks = <&gcc GCC_NSS_NOC_CLK>, + <&gcc GCC_NSS_PTP_REF_CLK>, + <&gcc GCC_NSS_CSR_CLK>, + <&gcc GCC_NSS_CFG_CLK>, + <&gcc GCC_NSS_IMEM_CLK>, + <&gcc GCC_NSSNOC_QOSGEN_REF_CLK>, + <&gcc GCC_MEM_NOC_NSS_AXI_CLK>, + <&gcc GCC_NSSNOC_SNOC_CLK>, + <&gcc GCC_NSSNOC_TIMEOUT_REF_CLK>, + <&gcc GCC_NSS_CE_AXI_CLK>, + <&gcc GCC_NSS_CE_APB_CLK>, + <&gcc GCC_NSSNOC_CE_AXI_CLK>, + <&gcc GCC_NSSNOC_CE_APB_CLK>, + <&gcc GCC_NSSNOC_UBI1_AHB_CLK>, + <&gcc GCC_UBI1_CORE_CLK>, + <&gcc GCC_UBI1_AHB_CLK>, + <&gcc GCC_UBI1_AXI_CLK>, + <&gcc GCC_UBI1_MPT_CLK>, + <&gcc GCC_UBI1_NC_AXI_CLK>; + clock-names = "nss-noc-clk", + "nss-ptp-ref-clk", + "nss-csr-clk", + "nss-cfg-clk", + "nss-imem-clk", + "nss-nssnoc-qosgen-ref-clk", + "nss-mem-noc-nss-axi-clk", + "nss-nssnoc-snoc-clk", + "nss-nssnoc-timeout-ref-clk", + "nss-ce-axi-clk", + "nss-ce-apb-clk", + "nss-nssnoc-ce-axi-clk", + "nss-nssnoc-ce-apb-clk", + "nss-nssnoc-ahb-clk", + "nss-core-clk", + "nss-ahb-clk", + "nss-axi-clk", + "nss-mpt-clk", + "nss-nc-axi-clk"; + qcom,id = <1>; + qcom,num-queue = <4>; + qcom,num-irq = <9>; + qcom,num-pri = <4>; + qcom,load-addr = <0x40800000>; + qcom,capwap-enabled; + qcom,dtls-enabled; + qcom,tls-enabled; + qcom,crypto-enabled; + qcom,ipsec-enabled; + qcom,qvpn-enabled; + qcom,pvxlan-enabled; + qcom,clmap-enabled; + qcom,rmnet_rx-enabled; + }; + + nss_crypto: qcom,nss_crypto { + compatible = "qcom,nss-crypto"; + #address-cells = <1>; + #size-cells = <1>; + qcom,max-contexts = <64>; + qcom,max-context-size = <32>; + ranges; + + eip197_node { + compatible = "qcom,eip197"; + reg-names = "crypto_pbase"; + reg = <0x39800000 0x7ffff>; + clocks = <&gcc GCC_NSS_CRYPTO_CLK>, + <&gcc GCC_NSSNOC_CRYPTO_CLK>, + <&gcc GCC_CRYPTO_PPE_CLK>; + clock-names = "crypto_clk", + "crypto_nocclk", + "crypto_ppeclk"; + clock-frequency = /bits/ 64 <600000000 600000000 300000000>; + qcom,dma-mask = <0xff>; + qcom,transform-enabled; + qcom,aes128-cbc; + qcom,aes192-cbc; + qcom,aes256-cbc; + qcom,aes128-ctr; + qcom,aes192-ctr; + qcom,aes256-ctr; + qcom,aes128-ecb; + qcom,aes192-ecb; + qcom,aes256-ecb; + qcom,3des-cbc; + qcom,md5-hash; + qcom,sha160-hash; + qcom,sha224-hash; + qcom,sha384-hash; + qcom,sha512-hash; + qcom,sha256-hash; + qcom,md5-hmac; + qcom,sha160-hmac; + qcom,sha224-hmac; + qcom,sha256-hmac; + qcom,sha384-hmac; + qcom,sha512-hmac; + qcom,aes128-gcm-gmac; + qcom,aes192-gcm-gmac; + qcom,aes256-gcm-gmac; + qcom,aes128-cbc-md5-hmac; + qcom,aes128-cbc-sha160-hmac; + qcom,aes192-cbc-md5-hmac; + qcom,aes192-cbc-sha160-hmac; + qcom,aes256-cbc-md5-hmac; + qcom,aes256-cbc-sha160-hmac; + qcom,aes128-ctr-sha160-hmac; + qcom,aes192-ctr-sha160-hmac; + qcom,aes256-ctr-sha160-hmac; + qcom,aes128-ctr-md5-hmac; + qcom,aes192-ctr-md5-hmac; + qcom,aes256-ctr-md5-hmac; + qcom,3des-cbc-md5-hmac; + qcom,3des-cbc-sha160-hmac; + qcom,aes128-cbc-sha256-hmac; + qcom,aes192-cbc-sha256-hmac; + qcom,aes256-cbc-sha256-hmac; + qcom,aes128-ctr-sha256-hmac; + qcom,aes192-ctr-sha256-hmac; + qcom,aes256-ctr-sha256-hmac; + qcom,3des-cbc-sha256-hmac; + qcom,aes128-cbc-sha384-hmac; + qcom,aes192-cbc-sha384-hmac; + qcom,aes256-cbc-sha384-hmac; + qcom,aes128-ctr-sha384-hmac; + qcom,aes192-ctr-sha384-hmac; + qcom,aes256-ctr-sha384-hmac; + qcom,aes128-cbc-sha512-hmac; + qcom,aes192-cbc-sha512-hmac; + qcom,aes256-cbc-sha512-hmac; + qcom,aes128-ctr-sha512-hmac; + qcom,aes192-ctr-sha512-hmac; + qcom,aes256-ctr-sha512-hmac; + + engine0 { + reg_offset = <0x80000>; + qcom,ifpp-enabled; + qcom,ipue-enabled; + qcom,ofpp-enabled; + qcom,opue-enabled; + }; + }; + }; +}; diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts index 4034c326f..730424197 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-rax120v2.dts @@ -5,6 +5,7 @@ #include "ipq8074.dtsi" #include "ipq8074-ess.dtsi" #include "ipq8074-hk-cpu.dtsi" +#include "ipq8074-nss.dtsi" #include #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-wax630.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-wax630.dts index 5e7b32801..b1f2447d8 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-wax630.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-wax630.dts @@ -5,6 +5,7 @@ #include "ipq8074.dtsi" #include "ipq8074-hk-cpu.dtsi" #include "ipq8074-ess.dtsi" +#include "ipq8074-nss.dtsi" #include #include #include diff --git a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-wxr-5950ax12.dts b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-wxr-5950ax12.dts index 32386dc93..6173f22cc 100644 --- a/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-wxr-5950ax12.dts +++ b/target/linux/qualcommax/files/arch/arm64/boot/dts/qcom/ipq8074-wxr-5950ax12.dts @@ -5,6 +5,7 @@ #include "ipq8074.dtsi" #include "ipq8074-hk-cpu.dtsi" #include "ipq8074-ess.dtsi" +#include "ipq8074-nss.dtsi" #include #include #include diff --git a/target/linux/qualcommax/files/include/net/netfilter/nf_conntrack_dscpremark_ext.h b/target/linux/qualcommax/files/include/net/netfilter/nf_conntrack_dscpremark_ext.h new file mode 100644 index 000000000..dc6a5004e --- /dev/null +++ b/target/linux/qualcommax/files/include/net/netfilter/nf_conntrack_dscpremark_ext.h @@ -0,0 +1,95 @@ +/* + ************************************************************************** + * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. + * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved. + * Permission to use, copy, modify, and/or distribute this software for + * any purpose with or without fee is hereby granted, provided that the + * above copyright notice and this permission notice appear in all copies. + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT + * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + ************************************************************************** + */ + +/* DSCP remark conntrack extension APIs. */ + +#ifndef _NF_CONNTRACK_DSCPREMARK_H +#define _NF_CONNTRACK_DSCPREMARK_H + +#include +#include + +/* Rule flags */ +#define NF_CT_DSCPREMARK_EXT_DSCP_RULE_VALID 0x1 + +/* Rule validity */ +#define NF_CT_DSCPREMARK_EXT_RULE_VALID 0x1 +#define NF_CT_DSCPREMARK_EXT_RULE_NOT_VALID 0x0 + +/* Which QoS features are set flags */ +#define NF_CT_DSCPREMARK_EXT_PRIO 0x1 +#define NF_CT_DSCPREMARK_EXT_DSCP 0x2 +#define NF_CT_DSCPREMARK_EXT_IGS_QOS 0x4 +#define NF_CT_DSCPREMARK_EXT_MARK 0x8 + +/* + * DSCP remark conntrack extension structure. + */ +struct nf_ct_dscpremark_ext { + __u32 flow_priority; /* Original direction packet priority */ + __u32 reply_priority; /* Reply direction packet priority */ + __u32 flow_mark; /* Original direction packet mark */ + __u32 reply_mark; /* Reply direction packet mark */ + __u16 igs_flow_qos_tag; /* Original direction ingress packet priority */ + __u16 igs_reply_qos_tag; /* Reply direction ingress packet priority */ + __u8 flow_dscp; /* IP DSCP value for original direction */ + __u8 reply_dscp; /* IP DSCP value for reply direction */ + __u16 rule_flags; /* Rule Validity flags */ + __u16 flow_set_flags; /* Original direction set flags */ + __u16 return_set_flags; /* Reply direction set flags */ +}; + +/* + * nf_ct_dscpremark_ext_find() + * Finds the extension data of the conntrack entry if it exists. + */ +static inline struct nf_ct_dscpremark_ext * +nf_ct_dscpremark_ext_find(const struct nf_conn *ct) +{ +#ifdef CONFIG_NF_CONNTRACK_DSCPREMARK_EXT + return nf_ct_ext_find(ct, NF_CT_EXT_DSCPREMARK); +#else + return NULL; +#endif +} + +/* + * nf_ct_dscpremark_ext_add() + * Adds the extension data to the conntrack entry. + */ +static inline +struct nf_ct_dscpremark_ext *nf_ct_dscpremark_ext_add(struct nf_conn *ct, + gfp_t gfp) +{ +#ifdef CONFIG_NF_CONNTRACK_DSCPREMARK_EXT + struct nf_ct_dscpremark_ext *ncde; + + ncde = nf_ct_ext_add(ct, NF_CT_EXT_DSCPREMARK, gfp); + if (!ncde) + return NULL; + + return ncde; +#else + return NULL; +#endif +}; + +#ifdef CONFIG_NF_CONNTRACK_DSCPREMARK_EXT +extern int nf_conntrack_dscpremark_ext_set_dscp_rule_valid(struct nf_conn *ct); +extern int nf_conntrack_dscpremark_ext_get_dscp_rule_validity(struct nf_conn *ct); +#endif /* CONFIG_NF_CONNTRACK_DSCPREMARK_EXT */ +#endif /* _NF_CONNTRACK_DSCPREMARK_H */ diff --git a/target/linux/qualcommax/files/include/uapi/linux/tc_act/tc_nss_mirred.h b/target/linux/qualcommax/files/include/uapi/linux/tc_act/tc_nss_mirred.h new file mode 100644 index 000000000..3a368fcc8 --- /dev/null +++ b/target/linux/qualcommax/files/include/uapi/linux/tc_act/tc_nss_mirred.h @@ -0,0 +1,36 @@ +#ifndef __LINUX_TC_NSS_MIRRED_H +#define __LINUX_TC_NSS_MIRRED_H + +#include + +/* + * Type of nss mirred action. + */ +#define TCA_ACT_MIRRED_NSS 17 + +/* + * Types of parameters for nss mirred action. + */ +enum { + TC_NSS_MIRRED_UNSPEC, + TC_NSS_MIRRED_TM, + TC_NSS_MIRRED_PARMS, + __TC_NSS_MIRRED_MAX +}; +#define TC_NSS_MIRRED_MAX (__TC_NSS_MIRRED_MAX - 1) + +/* + * tc_nss_mirred + * tc command structure for nss mirred action. + */ +struct tc_nss_mirred { + tc_gen; /* General tc structure. */ + __u32 from_ifindex; /* ifindex of the port from which traffic + * will be redirected. + */ + __u32 to_ifindex; /* ifindex of the port to which traffic + * will be redirected. + */ +}; + +#endif /* __LINUX_TC_NSS_MIRRED_H */ diff --git a/target/linux/qualcommax/files/net/netfilter/nf_conntrack_dscpremark_ext.c b/target/linux/qualcommax/files/net/netfilter/nf_conntrack_dscpremark_ext.c new file mode 100644 index 000000000..678d27ac9 --- /dev/null +++ b/target/linux/qualcommax/files/net/netfilter/nf_conntrack_dscpremark_ext.c @@ -0,0 +1,61 @@ +/* + ************************************************************************** + * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved. + * Permission to use, copy, modify, and/or distribute this software for + * any purpose with or without fee is hereby granted, provided that the + * above copyright notice and this permission notice appear in all copies. + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT + * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + ************************************************************************** + */ + +/* DSCP remark handling conntrack extension registration. */ + +#include +#include +#include +#include +#include + +#include +#include +#include + +/* nf_conntrack_dscpremark_ext_set_dscp_rule_valid() + * Set DSCP rule validity flag in the extension + */ +int nf_conntrack_dscpremark_ext_set_dscp_rule_valid(struct nf_conn *ct) +{ + struct nf_ct_dscpremark_ext *ncde; + + ncde = nf_ct_dscpremark_ext_find(ct); + if (!ncde) + return -1; + + ncde->rule_flags = NF_CT_DSCPREMARK_EXT_DSCP_RULE_VALID; + return 0; +} +EXPORT_SYMBOL(nf_conntrack_dscpremark_ext_set_dscp_rule_valid); + +/* nf_conntrack_dscpremark_ext_get_dscp_rule_validity() + * Check if the DSCP rule flag is valid from the extension + */ +int nf_conntrack_dscpremark_ext_get_dscp_rule_validity(struct nf_conn *ct) +{ + struct nf_ct_dscpremark_ext *ncde; + + ncde = nf_ct_dscpremark_ext_find(ct); + if (!ncde) + return NF_CT_DSCPREMARK_EXT_RULE_NOT_VALID; + + if (ncde->rule_flags & NF_CT_DSCPREMARK_EXT_DSCP_RULE_VALID) + return NF_CT_DSCPREMARK_EXT_RULE_VALID; + + return NF_CT_DSCPREMARK_EXT_RULE_NOT_VALID; +} +EXPORT_SYMBOL(nf_conntrack_dscpremark_ext_get_dscp_rule_validity); diff --git a/target/linux/qualcommax/image/ipq60xx.mk b/target/linux/qualcommax/image/ipq60xx.mk index 6ef006faf..ef05a150b 100644 --- a/target/linux/qualcommax/image/ipq60xx.mk +++ b/target/linux/qualcommax/image/ipq60xx.mk @@ -18,9 +18,9 @@ define Device/UbiFit endef define Device/EmmcImage - IMAGES += factory.bin sysupgrade.bin - IMAGE/factory.bin := append-rootfs | pad-rootfs | pad-to 64k - IMAGE/sysupgrade.bin/squashfs := append-rootfs | pad-to 64k | sysupgrade-tar rootfs=$$$$@ | append-metadata + IMAGES := factory.bin recovery.bin sysupgrade.bin + IMAGE/factory.bin := append-kernel | pad-to 12288k | append-rootfs | append-metadata + IMAGE/recovery.bin := append-kernel | pad-to 6144k | append-rootfs | append-metadata endef define Device/cmiot_ax18 @@ -61,6 +61,32 @@ define Device/glinet_gl-axt1800 endef TARGET_DEVICES += glinet_gl-axt1800 +define Device/jdcloud_re-cs-02 + $(call Device/FitImage) + $(call Device/EmmcImage) + DEVICE_VENDOR := JDCloud + DEVICE_MODEL := AX6600 + SOC := ipq6010 + BLOCKSIZE := 64k + KERNEL_SIZE := 6144k + DEVICE_DTS_CONFIG := config@cp03-c3 + DEVICE_PACKAGES := ipq-wifi-jdcloud_ax6600 kmod-ath11k-pci ath11k-firmware-qcn9074 +endef +TARGET_DEVICES += jdcloud_re-cs-02 + +define Device/jdcloud_re-ss-01 + $(call Device/FitImage) + $(call Device/EmmcImage) + DEVICE_VENDOR := JDCloud + DEVICE_MODEL := AX1800 Pro + SOC := ipq6000 + BLOCKSIZE := 64k + KERNEL_SIZE := 6144k + DEVICE_DTS_CONFIG := config@cp03-c2 + DEVICE_PACKAGES := ipq-wifi-jdcloud_ax1800pro +endef +TARGET_DEVICES += jdcloud_re-ss-01 + define Device/linksys_mr7350 $(call Device/FitImage) DEVICE_VENDOR := Linksys diff --git a/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/02_network b/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/02_network index ead1fb8f0..fc123c9a1 100644 --- a/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/02_network +++ b/target/linux/qualcommax/ipq60xx/base-files/etc/board.d/02_network @@ -12,12 +12,14 @@ ipq60xx_setup_interfaces() case "$board" in cmiot,ax18|\ + jdcloud,re-ss-01|\ qihoo,360v6|\ redmi,ax5-*|\ xiaomi,rm1800) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan" ;; glinet,gl-ax1800|\ + jdcloud,re-cs-02|\ linksys,mr7350) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan" ;; diff --git a/target/linux/qualcommax/ipq60xx/base-files/etc/hotplug.d/firmware/11-ath11k-caldata b/target/linux/qualcommax/ipq60xx/base-files/etc/hotplug.d/firmware/11-ath11k-caldata index f148438b3..b82946cdc 100644 --- a/target/linux/qualcommax/ipq60xx/base-files/etc/hotplug.d/firmware/11-ath11k-caldata +++ b/target/linux/qualcommax/ipq60xx/base-files/etc/hotplug.d/firmware/11-ath11k-caldata @@ -12,14 +12,24 @@ case "$FIRMWARE" in glinet,gl-ax1800|\ glinet,gl-axt1800|\ linksys,mr7350|\ - qihoo,360v6) + qihoo,360v6|\ + xiaomi,rm1800) caldata_extract "0:art" 0x1000 0x10000 ;; + jdcloud,re-cs-02|\ + jdcloud,re-ss-01|\ redmi,ax5-jdcloud) caldata_extract_mmc "0:ART" 0x1000 0x10000 ;; esac ;; +"ath11k/QCN9074/hw1.0/cal-pci-0000:01:00.0.bin") + case "$board" in + jdcloud,re-cs-02) + caldata_extract_mmc "0:ART" 0x26800 0x20000 + ;; + esac + ;; *) exit 1 ;; diff --git a/target/linux/qualcommax/ipq60xx/base-files/lib/preinit/81_fix_eeprom b/target/linux/qualcommax/ipq60xx/base-files/lib/preinit/81_fix_eeprom new file mode 100644 index 000000000..34b91f4df --- /dev/null +++ b/target/linux/qualcommax/ipq60xx/base-files/lib/preinit/81_fix_eeprom @@ -0,0 +1,19 @@ +. /lib/functions/caldata.sh + +preinit_fix_eeprom() { + case $(board_name) in + jdcloud,re-cs-02|\ + jdcloud,re-ss-01|\ + redmi,ax5-jdcloud) + mmc_part=$(find_mmc_part 0:ART) + FIRMWARE=""ath11k/IPQ6018/hw1.0/cal-ahb-c000000.wifi.bin"" + [ ! -e /lib/firmware/"$FIRMWARE" ] && \ + export FIRMWARE="$FIRMWARE" && \ + caldata_extract_mmc "0:ART" 0x1000 0x10000 + ;; + *) + ;; + esac +} + +boot_hook_add preinit_main preinit_fix_eeprom diff --git a/target/linux/qualcommax/ipq60xx/base-files/lib/upgrade/platform.sh b/target/linux/qualcommax/ipq60xx/base-files/lib/upgrade/platform.sh index b04d230c4..e199c33c1 100644 --- a/target/linux/qualcommax/ipq60xx/base-files/lib/upgrade/platform.sh +++ b/target/linux/qualcommax/ipq60xx/base-files/lib/upgrade/platform.sh @@ -17,6 +17,13 @@ platform_do_upgrade() { xiaomi,rm1800) nand_do_upgrade "$1" ;; + jdcloud,re-cs-02|\ + jdcloud,re-ss-01|\ + redmi,ax5-jdcloud) + kernelname="0:HLOS" + rootfsname="rootfs" + mmc_do_upgrade "$1" + ;; linksys,mr7350) boot_part="$(fw_printenv -n boot_part)" if [ "$boot_part" -eq "1" ]; then @@ -31,11 +38,6 @@ platform_do_upgrade() { fw_setenv auto_recovery yes nand_do_upgrade "$1" ;; - redmi,ax5-jdcloud) - kernelname="0:HLOS" - rootfsname="rootfs" - mmc_do_upgrade "$1" - ;; *) default_do_upgrade "$1" ;; diff --git a/target/linux/qualcommax/ipq60xx/target.mk b/target/linux/qualcommax/ipq60xx/target.mk index 06a85ab5e..7f20467f8 100644 --- a/target/linux/qualcommax/ipq60xx/target.mk +++ b/target/linux/qualcommax/ipq60xx/target.mk @@ -1,6 +1,6 @@ SUBTARGET:=ipq60xx BOARDNAME:=Qualcomm Atheros IPQ60xx -DEFAULT_PACKAGES += ath11k-firmware-ipq6018 +DEFAULT_PACKAGES += ath11k-firmware-ipq6018 nss-firmware-ipq6018 define Target/Description Build firmware images for Qualcomm Atheros IPQ60xx based boards. diff --git a/target/linux/qualcommax/ipq807x/target.mk b/target/linux/qualcommax/ipq807x/target.mk index d5aff23ef..a2111ce59 100644 --- a/target/linux/qualcommax/ipq807x/target.mk +++ b/target/linux/qualcommax/ipq807x/target.mk @@ -1,6 +1,6 @@ SUBTARGET:=ipq807x BOARDNAME:=Qualcomm Atheros IPQ807x -DEFAULT_PACKAGES += ath11k-firmware-ipq8074 +DEFAULT_PACKAGES += ath11k-firmware-ipq8074 nss-firmware-ipq8074 define Target/Description Build firmware images for Qualcomm Atheros IPQ807x based boards. diff --git a/target/linux/qualcommax/patches-6.1/0007-v6.2-clk-qcom-ipq8074-convert-to-parent-data.patch b/target/linux/qualcommax/patches-6.1/0007-v6.2-clk-qcom-ipq8074-convert-to-parent-data.patch index c209adbc0..20245698b 100644 --- a/target/linux/qualcommax/patches-6.1/0007-v6.2-clk-qcom-ipq8074-convert-to-parent-data.patch +++ b/target/linux/qualcommax/patches-6.1/0007-v6.2-clk-qcom-ipq8074-convert-to-parent-data.patch @@ -808,8 +808,8 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -975,6 +647,18 @@ static const struct freq_tbl ftbl_pcie_a - F(19200000, P_XO, 1, 0, 0), +@@ -976,6 +648,18 @@ static const struct freq_tbl ftbl_pcie_a + { } }; +static const struct clk_parent_data gcc_xo_gpll0_sleep_clk[] = { @@ -827,7 +827,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 pcie0_aux_clk_src = { .cmd_rcgr = 0x75024, .freq_tbl = ftbl_pcie_aux_clk_src, -@@ -983,12 +667,22 @@ static struct clk_rcg2 pcie0_aux_clk_src +@@ -984,12 +668,22 @@ static struct clk_rcg2 pcie0_aux_clk_src .parent_map = gcc_xo_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "pcie0_aux_clk_src", @@ -852,7 +852,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_regmap_mux pcie0_pipe_clk_src = { .reg = 0x7501c, .shift = 8, -@@ -997,8 +691,8 @@ static struct clk_regmap_mux pcie0_pipe_ +@@ -998,8 +692,8 @@ static struct clk_regmap_mux pcie0_pipe_ .clkr = { .hw.init = &(struct clk_init_data){ .name = "pcie0_pipe_clk_src", @@ -863,7 +863,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_regmap_mux_closest_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1013,7 +707,7 @@ static struct clk_rcg2 pcie1_axi_clk_src +@@ -1014,7 +708,7 @@ static struct clk_rcg2 pcie1_axi_clk_src .clkr.hw.init = &(struct clk_init_data){ .name = "pcie1_axi_clk_src", .parent_data = gcc_xo_gpll0, @@ -872,7 +872,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1026,12 +720,22 @@ static struct clk_rcg2 pcie1_aux_clk_src +@@ -1027,12 +721,22 @@ static struct clk_rcg2 pcie1_aux_clk_src .parent_map = gcc_xo_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "pcie1_aux_clk_src", @@ -897,7 +897,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_regmap_mux pcie1_pipe_clk_src = { .reg = 0x7601c, .shift = 8, -@@ -1040,8 +744,8 @@ static struct clk_regmap_mux pcie1_pipe_ +@@ -1041,8 +745,8 @@ static struct clk_regmap_mux pcie1_pipe_ .clkr = { .hw.init = &(struct clk_init_data){ .name = "pcie1_pipe_clk_src", @@ -908,7 +908,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_regmap_mux_closest_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1060,6 +764,20 @@ static const struct freq_tbl ftbl_sdcc_a +@@ -1061,6 +765,20 @@ static const struct freq_tbl ftbl_sdcc_a { } }; @@ -929,7 +929,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 sdcc1_apps_clk_src = { .cmd_rcgr = 0x42004, .freq_tbl = ftbl_sdcc_apps_clk_src, -@@ -1068,8 +786,8 @@ static struct clk_rcg2 sdcc1_apps_clk_sr +@@ -1069,8 +787,8 @@ static struct clk_rcg2 sdcc1_apps_clk_sr .parent_map = gcc_xo_gpll0_gpll2_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "sdcc1_apps_clk_src", @@ -940,8 +940,8 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_floor_ops, }, }; -@@ -1080,6 +798,20 @@ static const struct freq_tbl ftbl_sdcc_i - F(308570000, P_GPLL6, 3.5, 0, 0), +@@ -1082,6 +800,20 @@ static const struct freq_tbl ftbl_sdcc_i + { } }; +static const struct clk_parent_data gcc_xo_gpll0_gpll6_gpll0_div2[] = { @@ -961,7 +961,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 sdcc1_ice_core_clk_src = { .cmd_rcgr = 0x5d000, .freq_tbl = ftbl_sdcc_ice_core_clk_src, -@@ -1088,8 +820,8 @@ static struct clk_rcg2 sdcc1_ice_core_cl +@@ -1090,8 +822,8 @@ static struct clk_rcg2 sdcc1_ice_core_cl .parent_map = gcc_xo_gpll0_gpll6_gpll0_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "sdcc1_ice_core_clk_src", @@ -972,7 +972,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1102,8 +834,8 @@ static struct clk_rcg2 sdcc2_apps_clk_sr +@@ -1104,8 +836,8 @@ static struct clk_rcg2 sdcc2_apps_clk_sr .parent_map = gcc_xo_gpll0_gpll2_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "sdcc2_apps_clk_src", @@ -983,7 +983,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_floor_ops, }, }; -@@ -1115,6 +847,18 @@ static const struct freq_tbl ftbl_usb_ma +@@ -1117,6 +849,18 @@ static const struct freq_tbl ftbl_usb_ma { } }; @@ -1002,7 +1002,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 usb0_master_clk_src = { .cmd_rcgr = 0x3e00c, .freq_tbl = ftbl_usb_master_clk_src, -@@ -1123,8 +867,8 @@ static struct clk_rcg2 usb0_master_clk_s +@@ -1125,8 +869,8 @@ static struct clk_rcg2 usb0_master_clk_s .parent_map = gcc_xo_gpll0_out_main_div2_gpll0_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb0_master_clk_src", @@ -1013,7 +1013,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1142,8 +886,8 @@ static struct clk_rcg2 usb0_aux_clk_src +@@ -1144,8 +888,8 @@ static struct clk_rcg2 usb0_aux_clk_src .parent_map = gcc_xo_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb0_aux_clk_src", @@ -1024,7 +1024,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1155,6 +899,20 @@ static const struct freq_tbl ftbl_usb_mo +@@ -1157,6 +901,20 @@ static const struct freq_tbl ftbl_usb_mo { } }; @@ -1045,7 +1045,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 usb0_mock_utmi_clk_src = { .cmd_rcgr = 0x3e020, .freq_tbl = ftbl_usb_mock_utmi_clk_src, -@@ -1163,12 +921,22 @@ static struct clk_rcg2 usb0_mock_utmi_cl +@@ -1165,12 +923,22 @@ static struct clk_rcg2 usb0_mock_utmi_cl .parent_map = gcc_xo_gpll6_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb0_mock_utmi_clk_src", @@ -1070,7 +1070,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_regmap_mux usb0_pipe_clk_src = { .reg = 0x3e048, .shift = 8, -@@ -1177,8 +945,8 @@ static struct clk_regmap_mux usb0_pipe_c +@@ -1179,8 +947,8 @@ static struct clk_regmap_mux usb0_pipe_c .clkr = { .hw.init = &(struct clk_init_data){ .name = "usb0_pipe_clk_src", @@ -1081,7 +1081,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_regmap_mux_closest_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1193,8 +961,8 @@ static struct clk_rcg2 usb1_master_clk_s +@@ -1195,8 +963,8 @@ static struct clk_rcg2 usb1_master_clk_s .parent_map = gcc_xo_gpll0_out_main_div2_gpll0_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb1_master_clk_src", @@ -1092,7 +1092,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1207,8 +975,8 @@ static struct clk_rcg2 usb1_aux_clk_src +@@ -1209,8 +977,8 @@ static struct clk_rcg2 usb1_aux_clk_src .parent_map = gcc_xo_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb1_aux_clk_src", @@ -1103,7 +1103,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1221,12 +989,22 @@ static struct clk_rcg2 usb1_mock_utmi_cl +@@ -1223,12 +991,22 @@ static struct clk_rcg2 usb1_mock_utmi_cl .parent_map = gcc_xo_gpll6_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "usb1_mock_utmi_clk_src", @@ -1128,7 +1128,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_regmap_mux usb1_pipe_clk_src = { .reg = 0x3f048, .shift = 8, -@@ -1235,8 +1013,8 @@ static struct clk_regmap_mux usb1_pipe_c +@@ -1237,8 +1015,8 @@ static struct clk_regmap_mux usb1_pipe_c .clkr = { .hw.init = &(struct clk_init_data){ .name = "usb1_pipe_clk_src", @@ -1139,7 +1139,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_regmap_mux_closest_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1250,8 +1028,9 @@ static struct clk_branch gcc_xo_clk_src +@@ -1252,8 +1030,9 @@ static struct clk_branch gcc_xo_clk_src .enable_mask = BIT(1), .hw.init = &(struct clk_init_data){ .name = "gcc_xo_clk_src", @@ -1151,7 +1151,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com }, .num_parents = 1, .flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, -@@ -1265,9 +1044,8 @@ static struct clk_fixed_factor gcc_xo_di +@@ -1267,9 +1046,8 @@ static struct clk_fixed_factor gcc_xo_di .div = 4, .hw.init = &(struct clk_init_data){ .name = "gcc_xo_div4_clk_src", @@ -1163,7 +1163,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_fixed_factor_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1285,6 +1063,20 @@ static const struct freq_tbl ftbl_system +@@ -1287,6 +1065,20 @@ static const struct freq_tbl ftbl_system { } }; @@ -1184,7 +1184,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 system_noc_bfdcd_clk_src = { .cmd_rcgr = 0x26004, .freq_tbl = ftbl_system_noc_bfdcd_clk_src, -@@ -1292,8 +1084,8 @@ static struct clk_rcg2 system_noc_bfdcd_ +@@ -1294,8 +1086,8 @@ static struct clk_rcg2 system_noc_bfdcd_ .parent_map = gcc_xo_gpll0_gpll6_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "system_noc_bfdcd_clk_src", @@ -1195,7 +1195,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, .flags = CLK_IS_CRITICAL, }, -@@ -1304,9 +1096,8 @@ static struct clk_fixed_factor system_no +@@ -1306,9 +1098,8 @@ static struct clk_fixed_factor system_no .div = 1, .hw.init = &(struct clk_init_data){ .name = "system_noc_clk_src", @@ -1207,7 +1207,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_fixed_factor_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1327,7 +1118,7 @@ static struct clk_rcg2 nss_ce_clk_src = +@@ -1329,7 +1120,7 @@ static struct clk_rcg2 nss_ce_clk_src = .clkr.hw.init = &(struct clk_init_data){ .name = "nss_ce_clk_src", .parent_data = gcc_xo_gpll0, @@ -1216,7 +1216,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1338,6 +1129,20 @@ static const struct freq_tbl ftbl_nss_no +@@ -1340,6 +1131,20 @@ static const struct freq_tbl ftbl_nss_no { } }; @@ -1237,7 +1237,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_noc_bfdcd_clk_src = { .cmd_rcgr = 0x68088, .freq_tbl = ftbl_nss_noc_bfdcd_clk_src, -@@ -1345,8 +1150,8 @@ static struct clk_rcg2 nss_noc_bfdcd_clk +@@ -1347,8 +1152,8 @@ static struct clk_rcg2 nss_noc_bfdcd_clk .parent_map = gcc_xo_bias_pll_nss_noc_clk_gpll0_gpll2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_noc_bfdcd_clk_src", @@ -1248,7 +1248,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1356,9 +1161,8 @@ static struct clk_fixed_factor nss_noc_c +@@ -1358,9 +1163,8 @@ static struct clk_fixed_factor nss_noc_c .div = 1, .hw.init = &(struct clk_init_data){ .name = "nss_noc_clk_src", @@ -1260,7 +1260,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_fixed_factor_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1371,6 +1175,18 @@ static const struct freq_tbl ftbl_nss_cr +@@ -1373,6 +1177,18 @@ static const struct freq_tbl ftbl_nss_cr { } }; @@ -1279,7 +1279,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_crypto_clk_src = { .cmd_rcgr = 0x68144, .freq_tbl = ftbl_nss_crypto_clk_src, -@@ -1379,8 +1195,8 @@ static struct clk_rcg2 nss_crypto_clk_sr +@@ -1381,8 +1197,8 @@ static struct clk_rcg2 nss_crypto_clk_sr .parent_map = gcc_xo_nss_crypto_pll_gpll0_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_crypto_clk_src", @@ -1290,7 +1290,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1394,6 +1210,24 @@ static const struct freq_tbl ftbl_nss_ub +@@ -1396,6 +1212,24 @@ static const struct freq_tbl ftbl_nss_ub { } }; @@ -1315,7 +1315,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_ubi0_clk_src = { .cmd_rcgr = 0x68104, .freq_tbl = ftbl_nss_ubi_clk_src, -@@ -1401,8 +1235,8 @@ static struct clk_rcg2 nss_ubi0_clk_src +@@ -1403,8 +1237,8 @@ static struct clk_rcg2 nss_ubi0_clk_src .parent_map = gcc_xo_ubi32_gpll0_gpll2_gpll4_gpll6_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_ubi0_clk_src", @@ -1326,7 +1326,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1415,9 +1249,8 @@ static struct clk_regmap_div nss_ubi0_di +@@ -1417,9 +1251,8 @@ static struct clk_regmap_div nss_ubi0_di .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_ubi0_div_clk_src", @@ -1338,7 +1338,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ro_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1432,8 +1265,8 @@ static struct clk_rcg2 nss_ubi1_clk_src +@@ -1434,8 +1267,8 @@ static struct clk_rcg2 nss_ubi1_clk_src .parent_map = gcc_xo_ubi32_gpll0_gpll2_gpll4_gpll6_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_ubi1_clk_src", @@ -1349,7 +1349,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, .flags = CLK_SET_RATE_PARENT, }, -@@ -1446,9 +1279,8 @@ static struct clk_regmap_div nss_ubi1_di +@@ -1448,9 +1281,8 @@ static struct clk_regmap_div nss_ubi1_di .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_ubi1_div_clk_src", @@ -1361,7 +1361,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ro_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1462,6 +1294,16 @@ static const struct freq_tbl ftbl_ubi_mp +@@ -1464,6 +1296,16 @@ static const struct freq_tbl ftbl_ubi_mp { } }; @@ -1378,7 +1378,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 ubi_mpt_clk_src = { .cmd_rcgr = 0x68090, .freq_tbl = ftbl_ubi_mpt_clk_src, -@@ -1469,8 +1311,8 @@ static struct clk_rcg2 ubi_mpt_clk_src = +@@ -1471,8 +1313,8 @@ static struct clk_rcg2 ubi_mpt_clk_src = .parent_map = gcc_xo_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "ubi_mpt_clk_src", @@ -1389,7 +1389,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1481,6 +1323,18 @@ static const struct freq_tbl ftbl_nss_im +@@ -1483,6 +1325,18 @@ static const struct freq_tbl ftbl_nss_im { } }; @@ -1408,7 +1408,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_imem_clk_src = { .cmd_rcgr = 0x68158, .freq_tbl = ftbl_nss_imem_clk_src, -@@ -1488,8 +1342,8 @@ static struct clk_rcg2 nss_imem_clk_src +@@ -1490,8 +1344,8 @@ static struct clk_rcg2 nss_imem_clk_src .parent_map = gcc_xo_gpll0_gpll4_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_imem_clk_src", @@ -1419,7 +1419,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1500,6 +1354,24 @@ static const struct freq_tbl ftbl_nss_pp +@@ -1502,6 +1356,24 @@ static const struct freq_tbl ftbl_nss_pp { } }; @@ -1444,7 +1444,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_ppe_clk_src = { .cmd_rcgr = 0x68080, .freq_tbl = ftbl_nss_ppe_clk_src, -@@ -1507,8 +1379,8 @@ static struct clk_rcg2 nss_ppe_clk_src = +@@ -1509,8 +1381,8 @@ static struct clk_rcg2 nss_ppe_clk_src = .parent_map = gcc_xo_bias_gpll0_gpll4_nss_ubi32_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_ppe_clk_src", @@ -1455,7 +1455,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1518,9 +1390,8 @@ static struct clk_fixed_factor nss_ppe_c +@@ -1520,9 +1392,8 @@ static struct clk_fixed_factor nss_ppe_c .div = 4, .hw.init = &(struct clk_init_data){ .name = "nss_ppe_cdiv_clk_src", @@ -1467,7 +1467,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_fixed_factor_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1534,6 +1405,22 @@ static const struct freq_tbl ftbl_nss_po +@@ -1536,6 +1407,22 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1490,7 +1490,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port1_rx_clk_src = { .cmd_rcgr = 0x68020, .freq_tbl = ftbl_nss_port1_rx_clk_src, -@@ -1541,8 +1428,8 @@ static struct clk_rcg2 nss_port1_rx_clk_ +@@ -1543,8 +1430,8 @@ static struct clk_rcg2 nss_port1_rx_clk_ .parent_map = gcc_xo_uniphy0_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port1_rx_clk_src", @@ -1501,7 +1501,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1554,9 +1441,8 @@ static struct clk_regmap_div nss_port1_r +@@ -1556,9 +1443,8 @@ static struct clk_regmap_div nss_port1_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port1_rx_div_clk_src", @@ -1513,7 +1513,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1571,6 +1457,22 @@ static const struct freq_tbl ftbl_nss_po +@@ -1573,6 +1459,22 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1536,7 +1536,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port1_tx_clk_src = { .cmd_rcgr = 0x68028, .freq_tbl = ftbl_nss_port1_tx_clk_src, -@@ -1578,8 +1480,8 @@ static struct clk_rcg2 nss_port1_tx_clk_ +@@ -1580,8 +1482,8 @@ static struct clk_rcg2 nss_port1_tx_clk_ .parent_map = gcc_xo_uniphy0_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port1_tx_clk_src", @@ -1547,7 +1547,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1591,9 +1493,8 @@ static struct clk_regmap_div nss_port1_t +@@ -1593,9 +1495,8 @@ static struct clk_regmap_div nss_port1_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port1_tx_div_clk_src", @@ -1559,7 +1559,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1608,8 +1509,8 @@ static struct clk_rcg2 nss_port2_rx_clk_ +@@ -1610,8 +1511,8 @@ static struct clk_rcg2 nss_port2_rx_clk_ .parent_map = gcc_xo_uniphy0_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port2_rx_clk_src", @@ -1570,7 +1570,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1621,9 +1522,8 @@ static struct clk_regmap_div nss_port2_r +@@ -1623,9 +1524,8 @@ static struct clk_regmap_div nss_port2_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port2_rx_div_clk_src", @@ -1582,7 +1582,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1638,8 +1538,8 @@ static struct clk_rcg2 nss_port2_tx_clk_ +@@ -1640,8 +1540,8 @@ static struct clk_rcg2 nss_port2_tx_clk_ .parent_map = gcc_xo_uniphy0_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port2_tx_clk_src", @@ -1593,7 +1593,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1651,9 +1551,8 @@ static struct clk_regmap_div nss_port2_t +@@ -1653,9 +1553,8 @@ static struct clk_regmap_div nss_port2_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port2_tx_div_clk_src", @@ -1605,7 +1605,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1668,8 +1567,8 @@ static struct clk_rcg2 nss_port3_rx_clk_ +@@ -1670,8 +1569,8 @@ static struct clk_rcg2 nss_port3_rx_clk_ .parent_map = gcc_xo_uniphy0_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port3_rx_clk_src", @@ -1616,7 +1616,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1681,9 +1580,8 @@ static struct clk_regmap_div nss_port3_r +@@ -1683,9 +1582,8 @@ static struct clk_regmap_div nss_port3_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port3_rx_div_clk_src", @@ -1628,7 +1628,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1698,8 +1596,8 @@ static struct clk_rcg2 nss_port3_tx_clk_ +@@ -1700,8 +1598,8 @@ static struct clk_rcg2 nss_port3_tx_clk_ .parent_map = gcc_xo_uniphy0_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port3_tx_clk_src", @@ -1639,7 +1639,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1711,9 +1609,8 @@ static struct clk_regmap_div nss_port3_t +@@ -1713,9 +1611,8 @@ static struct clk_regmap_div nss_port3_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port3_tx_div_clk_src", @@ -1651,7 +1651,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1728,8 +1625,8 @@ static struct clk_rcg2 nss_port4_rx_clk_ +@@ -1730,8 +1627,8 @@ static struct clk_rcg2 nss_port4_rx_clk_ .parent_map = gcc_xo_uniphy0_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port4_rx_clk_src", @@ -1662,7 +1662,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1741,9 +1638,8 @@ static struct clk_regmap_div nss_port4_r +@@ -1743,9 +1640,8 @@ static struct clk_regmap_div nss_port4_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port4_rx_div_clk_src", @@ -1674,7 +1674,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1758,8 +1654,8 @@ static struct clk_rcg2 nss_port4_tx_clk_ +@@ -1760,8 +1656,8 @@ static struct clk_rcg2 nss_port4_tx_clk_ .parent_map = gcc_xo_uniphy0_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port4_tx_clk_src", @@ -1685,7 +1685,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1771,9 +1667,8 @@ static struct clk_regmap_div nss_port4_t +@@ -1773,9 +1669,8 @@ static struct clk_regmap_div nss_port4_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port4_tx_div_clk_src", @@ -1697,7 +1697,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1793,6 +1688,27 @@ static const struct freq_tbl ftbl_nss_po +@@ -1795,6 +1690,27 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1725,7 +1725,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port5_rx_clk_src = { .cmd_rcgr = 0x68060, .freq_tbl = ftbl_nss_port5_rx_clk_src, -@@ -1800,8 +1716,8 @@ static struct clk_rcg2 nss_port5_rx_clk_ +@@ -1802,8 +1718,8 @@ static struct clk_rcg2 nss_port5_rx_clk_ .parent_map = gcc_xo_uniphy0_rx_tx_uniphy1_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port5_rx_clk_src", @@ -1736,7 +1736,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1813,9 +1729,8 @@ static struct clk_regmap_div nss_port5_r +@@ -1815,9 +1731,8 @@ static struct clk_regmap_div nss_port5_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port5_rx_div_clk_src", @@ -1748,7 +1748,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1835,6 +1750,27 @@ static const struct freq_tbl ftbl_nss_po +@@ -1837,6 +1752,27 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1776,7 +1776,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port5_tx_clk_src = { .cmd_rcgr = 0x68068, .freq_tbl = ftbl_nss_port5_tx_clk_src, -@@ -1842,8 +1778,8 @@ static struct clk_rcg2 nss_port5_tx_clk_ +@@ -1844,8 +1780,8 @@ static struct clk_rcg2 nss_port5_tx_clk_ .parent_map = gcc_xo_uniphy0_tx_rx_uniphy1_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port5_tx_clk_src", @@ -1787,7 +1787,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1855,9 +1791,8 @@ static struct clk_regmap_div nss_port5_t +@@ -1857,9 +1793,8 @@ static struct clk_regmap_div nss_port5_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port5_tx_div_clk_src", @@ -1799,7 +1799,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1877,6 +1812,22 @@ static const struct freq_tbl ftbl_nss_po +@@ -1879,6 +1814,22 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1822,7 +1822,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port6_rx_clk_src = { .cmd_rcgr = 0x68070, .freq_tbl = ftbl_nss_port6_rx_clk_src, -@@ -1884,8 +1835,8 @@ static struct clk_rcg2 nss_port6_rx_clk_ +@@ -1886,8 +1837,8 @@ static struct clk_rcg2 nss_port6_rx_clk_ .parent_map = gcc_xo_uniphy2_rx_tx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port6_rx_clk_src", @@ -1833,7 +1833,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1897,9 +1848,8 @@ static struct clk_regmap_div nss_port6_r +@@ -1899,9 +1850,8 @@ static struct clk_regmap_div nss_port6_r .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port6_rx_div_clk_src", @@ -1845,7 +1845,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1919,6 +1869,22 @@ static const struct freq_tbl ftbl_nss_po +@@ -1921,6 +1871,22 @@ static const struct freq_tbl ftbl_nss_po { } }; @@ -1868,7 +1868,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 nss_port6_tx_clk_src = { .cmd_rcgr = 0x68078, .freq_tbl = ftbl_nss_port6_tx_clk_src, -@@ -1926,8 +1892,8 @@ static struct clk_rcg2 nss_port6_tx_clk_ +@@ -1928,8 +1894,8 @@ static struct clk_rcg2 nss_port6_tx_clk_ .parent_map = gcc_xo_uniphy2_tx_rx_ubi32_bias_map, .clkr.hw.init = &(struct clk_init_data){ .name = "nss_port6_tx_clk_src", @@ -1879,7 +1879,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1939,9 +1905,8 @@ static struct clk_regmap_div nss_port6_t +@@ -1941,9 +1907,8 @@ static struct clk_regmap_div nss_port6_t .clkr = { .hw.init = &(struct clk_init_data){ .name = "nss_port6_tx_div_clk_src", @@ -1891,7 +1891,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .ops = &clk_regmap_div_ops, .flags = CLK_SET_RATE_PARENT, -@@ -1964,8 +1929,8 @@ static struct clk_rcg2 crypto_clk_src = +@@ -1966,8 +1931,8 @@ static struct clk_rcg2 crypto_clk_src = .parent_map = gcc_xo_gpll0_gpll0_out_main_div2_map, .clkr.hw.init = &(struct clk_init_data){ .name = "crypto_clk_src", @@ -1902,7 +1902,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1975,6 +1940,22 @@ static struct freq_tbl ftbl_gp_clk_src[] +@@ -1977,6 +1942,22 @@ static struct freq_tbl ftbl_gp_clk_src[] { } }; @@ -1925,7 +1925,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com static struct clk_rcg2 gp1_clk_src = { .cmd_rcgr = 0x08004, .freq_tbl = ftbl_gp_clk_src, -@@ -1983,8 +1964,8 @@ static struct clk_rcg2 gp1_clk_src = { +@@ -1985,8 +1966,8 @@ static struct clk_rcg2 gp1_clk_src = { .parent_map = gcc_xo_gpll0_gpll6_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "gp1_clk_src", @@ -1936,7 +1936,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -1997,8 +1978,8 @@ static struct clk_rcg2 gp2_clk_src = { +@@ -1999,8 +1980,8 @@ static struct clk_rcg2 gp2_clk_src = { .parent_map = gcc_xo_gpll0_gpll6_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "gp2_clk_src", @@ -1947,7 +1947,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -2011,8 +1992,8 @@ static struct clk_rcg2 gp3_clk_src = { +@@ -2013,8 +1994,8 @@ static struct clk_rcg2 gp3_clk_src = { .parent_map = gcc_xo_gpll0_gpll6_gpll0_sleep_clk_map, .clkr.hw.init = &(struct clk_init_data){ .name = "gp3_clk_src", @@ -1958,7 +1958,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .ops = &clk_rcg2_ops, }, }; -@@ -2024,9 +2005,8 @@ static struct clk_branch gcc_blsp1_ahb_c +@@ -2026,9 +2007,8 @@ static struct clk_branch gcc_blsp1_ahb_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_ahb_clk", @@ -1970,7 +1970,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2041,9 +2021,8 @@ static struct clk_branch gcc_blsp1_qup1_ +@@ -2043,9 +2023,8 @@ static struct clk_branch gcc_blsp1_qup1_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup1_i2c_apps_clk", @@ -1982,7 +1982,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2058,9 +2037,8 @@ static struct clk_branch gcc_blsp1_qup1_ +@@ -2060,9 +2039,8 @@ static struct clk_branch gcc_blsp1_qup1_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup1_spi_apps_clk", @@ -1994,7 +1994,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2075,9 +2053,8 @@ static struct clk_branch gcc_blsp1_qup2_ +@@ -2077,9 +2055,8 @@ static struct clk_branch gcc_blsp1_qup2_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup2_i2c_apps_clk", @@ -2006,7 +2006,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2092,9 +2069,8 @@ static struct clk_branch gcc_blsp1_qup2_ +@@ -2094,9 +2071,8 @@ static struct clk_branch gcc_blsp1_qup2_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup2_spi_apps_clk", @@ -2018,7 +2018,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2109,9 +2085,8 @@ static struct clk_branch gcc_blsp1_qup3_ +@@ -2111,9 +2087,8 @@ static struct clk_branch gcc_blsp1_qup3_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup3_i2c_apps_clk", @@ -2030,7 +2030,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2126,9 +2101,8 @@ static struct clk_branch gcc_blsp1_qup3_ +@@ -2128,9 +2103,8 @@ static struct clk_branch gcc_blsp1_qup3_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup3_spi_apps_clk", @@ -2042,7 +2042,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2143,9 +2117,8 @@ static struct clk_branch gcc_blsp1_qup4_ +@@ -2145,9 +2119,8 @@ static struct clk_branch gcc_blsp1_qup4_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup4_i2c_apps_clk", @@ -2054,7 +2054,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2160,9 +2133,8 @@ static struct clk_branch gcc_blsp1_qup4_ +@@ -2162,9 +2135,8 @@ static struct clk_branch gcc_blsp1_qup4_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup4_spi_apps_clk", @@ -2066,7 +2066,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2177,9 +2149,8 @@ static struct clk_branch gcc_blsp1_qup5_ +@@ -2179,9 +2151,8 @@ static struct clk_branch gcc_blsp1_qup5_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup5_i2c_apps_clk", @@ -2078,7 +2078,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2194,9 +2165,8 @@ static struct clk_branch gcc_blsp1_qup5_ +@@ -2196,9 +2167,8 @@ static struct clk_branch gcc_blsp1_qup5_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup5_spi_apps_clk", @@ -2090,7 +2090,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2211,9 +2181,8 @@ static struct clk_branch gcc_blsp1_qup6_ +@@ -2213,9 +2183,8 @@ static struct clk_branch gcc_blsp1_qup6_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup6_i2c_apps_clk", @@ -2102,7 +2102,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2228,9 +2197,8 @@ static struct clk_branch gcc_blsp1_qup6_ +@@ -2230,9 +2199,8 @@ static struct clk_branch gcc_blsp1_qup6_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_qup6_spi_apps_clk", @@ -2114,7 +2114,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2245,9 +2213,8 @@ static struct clk_branch gcc_blsp1_uart1 +@@ -2247,9 +2215,8 @@ static struct clk_branch gcc_blsp1_uart1 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart1_apps_clk", @@ -2126,7 +2126,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2262,9 +2229,8 @@ static struct clk_branch gcc_blsp1_uart2 +@@ -2264,9 +2231,8 @@ static struct clk_branch gcc_blsp1_uart2 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart2_apps_clk", @@ -2138,7 +2138,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2279,9 +2245,8 @@ static struct clk_branch gcc_blsp1_uart3 +@@ -2281,9 +2247,8 @@ static struct clk_branch gcc_blsp1_uart3 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart3_apps_clk", @@ -2150,7 +2150,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2296,9 +2261,8 @@ static struct clk_branch gcc_blsp1_uart4 +@@ -2298,9 +2263,8 @@ static struct clk_branch gcc_blsp1_uart4 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart4_apps_clk", @@ -2162,7 +2162,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2313,9 +2277,8 @@ static struct clk_branch gcc_blsp1_uart5 +@@ -2315,9 +2279,8 @@ static struct clk_branch gcc_blsp1_uart5 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart5_apps_clk", @@ -2174,7 +2174,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2330,9 +2293,8 @@ static struct clk_branch gcc_blsp1_uart6 +@@ -2332,9 +2295,8 @@ static struct clk_branch gcc_blsp1_uart6 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_blsp1_uart6_apps_clk", @@ -2186,7 +2186,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2348,9 +2310,8 @@ static struct clk_branch gcc_prng_ahb_cl +@@ -2350,9 +2312,8 @@ static struct clk_branch gcc_prng_ahb_cl .enable_mask = BIT(8), .hw.init = &(struct clk_init_data){ .name = "gcc_prng_ahb_clk", @@ -2198,7 +2198,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2365,9 +2326,8 @@ static struct clk_branch gcc_qpic_ahb_cl +@@ -2367,9 +2328,8 @@ static struct clk_branch gcc_qpic_ahb_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_qpic_ahb_clk", @@ -2210,7 +2210,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2382,9 +2342,8 @@ static struct clk_branch gcc_qpic_clk = +@@ -2384,9 +2344,8 @@ static struct clk_branch gcc_qpic_clk = .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_qpic_clk", @@ -2222,7 +2222,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2399,9 +2358,8 @@ static struct clk_branch gcc_pcie0_ahb_c +@@ -2401,9 +2360,8 @@ static struct clk_branch gcc_pcie0_ahb_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie0_ahb_clk", @@ -2234,7 +2234,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2416,9 +2374,8 @@ static struct clk_branch gcc_pcie0_aux_c +@@ -2418,9 +2376,8 @@ static struct clk_branch gcc_pcie0_aux_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie0_aux_clk", @@ -2246,7 +2246,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2433,9 +2390,8 @@ static struct clk_branch gcc_pcie0_axi_m +@@ -2435,9 +2392,8 @@ static struct clk_branch gcc_pcie0_axi_m .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie0_axi_m_clk", @@ -2258,7 +2258,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2450,9 +2406,8 @@ static struct clk_branch gcc_pcie0_axi_s +@@ -2452,9 +2408,8 @@ static struct clk_branch gcc_pcie0_axi_s .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie0_axi_s_clk", @@ -2270,7 +2270,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2468,9 +2423,8 @@ static struct clk_branch gcc_pcie0_pipe_ +@@ -2470,9 +2425,8 @@ static struct clk_branch gcc_pcie0_pipe_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie0_pipe_clk", @@ -2282,7 +2282,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2485,9 +2439,8 @@ static struct clk_branch gcc_sys_noc_pci +@@ -2487,9 +2441,8 @@ static struct clk_branch gcc_sys_noc_pci .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sys_noc_pcie0_axi_clk", @@ -2294,7 +2294,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2502,9 +2455,8 @@ static struct clk_branch gcc_pcie1_ahb_c +@@ -2504,9 +2457,8 @@ static struct clk_branch gcc_pcie1_ahb_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie1_ahb_clk", @@ -2306,7 +2306,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2519,9 +2471,8 @@ static struct clk_branch gcc_pcie1_aux_c +@@ -2521,9 +2473,8 @@ static struct clk_branch gcc_pcie1_aux_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie1_aux_clk", @@ -2318,7 +2318,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2536,9 +2487,8 @@ static struct clk_branch gcc_pcie1_axi_m +@@ -2538,9 +2489,8 @@ static struct clk_branch gcc_pcie1_axi_m .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie1_axi_m_clk", @@ -2330,7 +2330,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2553,9 +2503,8 @@ static struct clk_branch gcc_pcie1_axi_s +@@ -2555,9 +2505,8 @@ static struct clk_branch gcc_pcie1_axi_s .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie1_axi_s_clk", @@ -2342,7 +2342,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2571,9 +2520,8 @@ static struct clk_branch gcc_pcie1_pipe_ +@@ -2573,9 +2522,8 @@ static struct clk_branch gcc_pcie1_pipe_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_pcie1_pipe_clk", @@ -2354,7 +2354,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2588,9 +2536,8 @@ static struct clk_branch gcc_sys_noc_pci +@@ -2590,9 +2538,8 @@ static struct clk_branch gcc_sys_noc_pci .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sys_noc_pcie1_axi_clk", @@ -2366,7 +2366,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2605,9 +2552,8 @@ static struct clk_branch gcc_usb0_aux_cl +@@ -2607,9 +2554,8 @@ static struct clk_branch gcc_usb0_aux_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_aux_clk", @@ -2378,7 +2378,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2622,9 +2568,8 @@ static struct clk_branch gcc_sys_noc_usb +@@ -2624,9 +2570,8 @@ static struct clk_branch gcc_sys_noc_usb .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sys_noc_usb0_axi_clk", @@ -2390,7 +2390,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2639,9 +2584,8 @@ static struct clk_branch gcc_usb0_master +@@ -2641,9 +2586,8 @@ static struct clk_branch gcc_usb0_master .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_master_clk", @@ -2402,7 +2402,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2656,9 +2600,8 @@ static struct clk_branch gcc_usb0_mock_u +@@ -2658,9 +2602,8 @@ static struct clk_branch gcc_usb0_mock_u .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_mock_utmi_clk", @@ -2414,7 +2414,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2673,9 +2616,8 @@ static struct clk_branch gcc_usb0_phy_cf +@@ -2675,9 +2618,8 @@ static struct clk_branch gcc_usb0_phy_cf .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_phy_cfg_ahb_clk", @@ -2426,7 +2426,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2691,9 +2633,8 @@ static struct clk_branch gcc_usb0_pipe_c +@@ -2693,9 +2635,8 @@ static struct clk_branch gcc_usb0_pipe_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_pipe_clk", @@ -2438,7 +2438,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2708,9 +2649,8 @@ static struct clk_branch gcc_usb0_sleep_ +@@ -2710,9 +2651,8 @@ static struct clk_branch gcc_usb0_sleep_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb0_sleep_clk", @@ -2450,7 +2450,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2725,9 +2665,8 @@ static struct clk_branch gcc_usb1_aux_cl +@@ -2727,9 +2667,8 @@ static struct clk_branch gcc_usb1_aux_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_aux_clk", @@ -2462,7 +2462,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2742,9 +2681,8 @@ static struct clk_branch gcc_sys_noc_usb +@@ -2744,9 +2683,8 @@ static struct clk_branch gcc_sys_noc_usb .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sys_noc_usb1_axi_clk", @@ -2474,7 +2474,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2759,9 +2697,8 @@ static struct clk_branch gcc_usb1_master +@@ -2761,9 +2699,8 @@ static struct clk_branch gcc_usb1_master .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_master_clk", @@ -2486,7 +2486,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2776,9 +2713,8 @@ static struct clk_branch gcc_usb1_mock_u +@@ -2778,9 +2715,8 @@ static struct clk_branch gcc_usb1_mock_u .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_mock_utmi_clk", @@ -2498,7 +2498,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2793,9 +2729,8 @@ static struct clk_branch gcc_usb1_phy_cf +@@ -2795,9 +2731,8 @@ static struct clk_branch gcc_usb1_phy_cf .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_phy_cfg_ahb_clk", @@ -2510,7 +2510,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2811,9 +2746,8 @@ static struct clk_branch gcc_usb1_pipe_c +@@ -2813,9 +2748,8 @@ static struct clk_branch gcc_usb1_pipe_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_pipe_clk", @@ -2522,7 +2522,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2828,9 +2762,8 @@ static struct clk_branch gcc_usb1_sleep_ +@@ -2830,9 +2764,8 @@ static struct clk_branch gcc_usb1_sleep_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_usb1_sleep_clk", @@ -2534,7 +2534,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2845,9 +2778,8 @@ static struct clk_branch gcc_sdcc1_ahb_c +@@ -2847,9 +2780,8 @@ static struct clk_branch gcc_sdcc1_ahb_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sdcc1_ahb_clk", @@ -2546,7 +2546,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2862,9 +2794,8 @@ static struct clk_branch gcc_sdcc1_apps_ +@@ -2864,9 +2796,8 @@ static struct clk_branch gcc_sdcc1_apps_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sdcc1_apps_clk", @@ -2558,7 +2558,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2879,9 +2810,8 @@ static struct clk_branch gcc_sdcc1_ice_c +@@ -2881,9 +2812,8 @@ static struct clk_branch gcc_sdcc1_ice_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sdcc1_ice_core_clk", @@ -2570,7 +2570,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2896,9 +2826,8 @@ static struct clk_branch gcc_sdcc2_ahb_c +@@ -2898,9 +2828,8 @@ static struct clk_branch gcc_sdcc2_ahb_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sdcc2_ahb_clk", @@ -2582,7 +2582,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2913,9 +2842,8 @@ static struct clk_branch gcc_sdcc2_apps_ +@@ -2915,9 +2844,8 @@ static struct clk_branch gcc_sdcc2_apps_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_sdcc2_apps_clk", @@ -2594,7 +2594,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2930,9 +2858,8 @@ static struct clk_branch gcc_mem_noc_nss +@@ -2932,9 +2860,8 @@ static struct clk_branch gcc_mem_noc_nss .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_mem_noc_nss_axi_clk", @@ -2606,7 +2606,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2947,9 +2874,8 @@ static struct clk_branch gcc_nss_ce_apb_ +@@ -2949,9 +2876,8 @@ static struct clk_branch gcc_nss_ce_apb_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ce_apb_clk", @@ -2618,7 +2618,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2964,9 +2890,8 @@ static struct clk_branch gcc_nss_ce_axi_ +@@ -2966,9 +2892,8 @@ static struct clk_branch gcc_nss_ce_axi_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ce_axi_clk", @@ -2630,7 +2630,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2981,9 +2906,8 @@ static struct clk_branch gcc_nss_cfg_clk +@@ -2983,9 +2908,8 @@ static struct clk_branch gcc_nss_cfg_clk .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_cfg_clk", @@ -2642,7 +2642,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -2998,9 +2922,8 @@ static struct clk_branch gcc_nss_crypto_ +@@ -3000,9 +2924,8 @@ static struct clk_branch gcc_nss_crypto_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_crypto_clk", @@ -2654,7 +2654,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3015,9 +2938,8 @@ static struct clk_branch gcc_nss_csr_clk +@@ -3017,9 +2940,8 @@ static struct clk_branch gcc_nss_csr_clk .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_csr_clk", @@ -2666,7 +2666,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3032,9 +2954,8 @@ static struct clk_branch gcc_nss_edma_cf +@@ -3034,9 +2956,8 @@ static struct clk_branch gcc_nss_edma_cf .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_edma_cfg_clk", @@ -2678,7 +2678,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3049,9 +2970,8 @@ static struct clk_branch gcc_nss_edma_cl +@@ -3051,9 +2972,8 @@ static struct clk_branch gcc_nss_edma_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_edma_clk", @@ -2690,7 +2690,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3066,9 +2986,8 @@ static struct clk_branch gcc_nss_imem_cl +@@ -3068,9 +2988,8 @@ static struct clk_branch gcc_nss_imem_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_imem_clk", @@ -2702,7 +2702,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3083,9 +3002,8 @@ static struct clk_branch gcc_nss_noc_clk +@@ -3085,9 +3004,8 @@ static struct clk_branch gcc_nss_noc_clk .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_noc_clk", @@ -2714,7 +2714,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3100,9 +3018,8 @@ static struct clk_branch gcc_nss_ppe_btq +@@ -3102,9 +3020,8 @@ static struct clk_branch gcc_nss_ppe_btq .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ppe_btq_clk", @@ -2726,7 +2726,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3117,9 +3034,8 @@ static struct clk_branch gcc_nss_ppe_cfg +@@ -3119,9 +3036,8 @@ static struct clk_branch gcc_nss_ppe_cfg .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ppe_cfg_clk", @@ -2738,7 +2738,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3134,9 +3050,8 @@ static struct clk_branch gcc_nss_ppe_clk +@@ -3136,9 +3052,8 @@ static struct clk_branch gcc_nss_ppe_clk .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ppe_clk", @@ -2750,7 +2750,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3151,9 +3066,8 @@ static struct clk_branch gcc_nss_ppe_ipe +@@ -3153,9 +3068,8 @@ static struct clk_branch gcc_nss_ppe_ipe .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ppe_ipe_clk", @@ -2762,7 +2762,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3168,9 +3082,8 @@ static struct clk_branch gcc_nss_ptp_ref +@@ -3170,9 +3084,8 @@ static struct clk_branch gcc_nss_ptp_ref .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_ptp_ref_clk", @@ -2774,7 +2774,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3186,9 +3099,8 @@ static struct clk_branch gcc_crypto_ppe_ +@@ -3188,9 +3101,8 @@ static struct clk_branch gcc_crypto_ppe_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_crypto_ppe_clk", @@ -2786,7 +2786,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3203,9 +3115,8 @@ static struct clk_branch gcc_nssnoc_ce_a +@@ -3205,9 +3117,8 @@ static struct clk_branch gcc_nssnoc_ce_a .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ce_apb_clk", @@ -2798,7 +2798,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3220,9 +3131,8 @@ static struct clk_branch gcc_nssnoc_ce_a +@@ -3222,9 +3133,8 @@ static struct clk_branch gcc_nssnoc_ce_a .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ce_axi_clk", @@ -2810,7 +2810,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3237,9 +3147,8 @@ static struct clk_branch gcc_nssnoc_cryp +@@ -3239,9 +3149,8 @@ static struct clk_branch gcc_nssnoc_cryp .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_crypto_clk", @@ -2822,7 +2822,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3254,9 +3163,8 @@ static struct clk_branch gcc_nssnoc_ppe_ +@@ -3256,9 +3165,8 @@ static struct clk_branch gcc_nssnoc_ppe_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ppe_cfg_clk", @@ -2834,7 +2834,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3271,9 +3179,8 @@ static struct clk_branch gcc_nssnoc_ppe_ +@@ -3273,9 +3181,8 @@ static struct clk_branch gcc_nssnoc_ppe_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ppe_clk", @@ -2846,7 +2846,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3288,9 +3195,8 @@ static struct clk_branch gcc_nssnoc_qosg +@@ -3290,9 +3197,8 @@ static struct clk_branch gcc_nssnoc_qosg .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_qosgen_ref_clk", @@ -2858,7 +2858,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3305,9 +3211,8 @@ static struct clk_branch gcc_nssnoc_snoc +@@ -3307,9 +3213,8 @@ static struct clk_branch gcc_nssnoc_snoc .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_snoc_clk", @@ -2870,7 +2870,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3322,9 +3227,8 @@ static struct clk_branch gcc_nssnoc_time +@@ -3324,9 +3229,8 @@ static struct clk_branch gcc_nssnoc_time .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_timeout_ref_clk", @@ -2882,7 +2882,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3339,9 +3243,8 @@ static struct clk_branch gcc_nssnoc_ubi0 +@@ -3341,9 +3245,8 @@ static struct clk_branch gcc_nssnoc_ubi0 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ubi0_ahb_clk", @@ -2894,7 +2894,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3356,9 +3259,8 @@ static struct clk_branch gcc_nssnoc_ubi1 +@@ -3358,9 +3261,8 @@ static struct clk_branch gcc_nssnoc_ubi1 .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nssnoc_ubi1_ahb_clk", @@ -2906,7 +2906,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3374,9 +3276,8 @@ static struct clk_branch gcc_ubi0_ahb_cl +@@ -3376,9 +3278,8 @@ static struct clk_branch gcc_ubi0_ahb_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi0_ahb_clk", @@ -2918,7 +2918,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3392,9 +3293,8 @@ static struct clk_branch gcc_ubi0_axi_cl +@@ -3394,9 +3295,8 @@ static struct clk_branch gcc_ubi0_axi_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi0_axi_clk", @@ -2930,7 +2930,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3410,9 +3310,8 @@ static struct clk_branch gcc_ubi0_nc_axi +@@ -3412,9 +3312,8 @@ static struct clk_branch gcc_ubi0_nc_axi .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi0_nc_axi_clk", @@ -2942,7 +2942,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3428,9 +3327,8 @@ static struct clk_branch gcc_ubi0_core_c +@@ -3430,9 +3329,8 @@ static struct clk_branch gcc_ubi0_core_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi0_core_clk", @@ -2954,7 +2954,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3446,9 +3344,8 @@ static struct clk_branch gcc_ubi0_mpt_cl +@@ -3448,9 +3346,8 @@ static struct clk_branch gcc_ubi0_mpt_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi0_mpt_clk", @@ -2966,7 +2966,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3464,9 +3361,8 @@ static struct clk_branch gcc_ubi1_ahb_cl +@@ -3466,9 +3363,8 @@ static struct clk_branch gcc_ubi1_ahb_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi1_ahb_clk", @@ -2978,7 +2978,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3482,9 +3378,8 @@ static struct clk_branch gcc_ubi1_axi_cl +@@ -3484,9 +3380,8 @@ static struct clk_branch gcc_ubi1_axi_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi1_axi_clk", @@ -2990,7 +2990,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3500,9 +3395,8 @@ static struct clk_branch gcc_ubi1_nc_axi +@@ -3502,9 +3397,8 @@ static struct clk_branch gcc_ubi1_nc_axi .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi1_nc_axi_clk", @@ -3002,7 +3002,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3518,9 +3412,8 @@ static struct clk_branch gcc_ubi1_core_c +@@ -3520,9 +3414,8 @@ static struct clk_branch gcc_ubi1_core_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi1_core_clk", @@ -3014,7 +3014,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3536,9 +3429,8 @@ static struct clk_branch gcc_ubi1_mpt_cl +@@ -3538,9 +3431,8 @@ static struct clk_branch gcc_ubi1_mpt_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_ubi1_mpt_clk", @@ -3026,7 +3026,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3553,9 +3445,8 @@ static struct clk_branch gcc_cmn_12gpll_ +@@ -3555,9 +3447,8 @@ static struct clk_branch gcc_cmn_12gpll_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_cmn_12gpll_ahb_clk", @@ -3038,7 +3038,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3570,9 +3461,8 @@ static struct clk_branch gcc_cmn_12gpll_ +@@ -3572,9 +3463,8 @@ static struct clk_branch gcc_cmn_12gpll_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_cmn_12gpll_sys_clk", @@ -3050,7 +3050,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3587,9 +3477,8 @@ static struct clk_branch gcc_mdio_ahb_cl +@@ -3589,9 +3479,8 @@ static struct clk_branch gcc_mdio_ahb_cl .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_mdio_ahb_clk", @@ -3062,7 +3062,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3604,9 +3493,8 @@ static struct clk_branch gcc_uniphy0_ahb +@@ -3606,9 +3495,8 @@ static struct clk_branch gcc_uniphy0_ahb .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_ahb_clk", @@ -3074,7 +3074,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3621,9 +3509,8 @@ static struct clk_branch gcc_uniphy0_sys +@@ -3623,9 +3511,8 @@ static struct clk_branch gcc_uniphy0_sys .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_sys_clk", @@ -3086,7 +3086,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3638,9 +3525,8 @@ static struct clk_branch gcc_uniphy1_ahb +@@ -3640,9 +3527,8 @@ static struct clk_branch gcc_uniphy1_ahb .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy1_ahb_clk", @@ -3098,7 +3098,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3655,9 +3541,8 @@ static struct clk_branch gcc_uniphy1_sys +@@ -3657,9 +3543,8 @@ static struct clk_branch gcc_uniphy1_sys .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy1_sys_clk", @@ -3110,7 +3110,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3672,9 +3557,8 @@ static struct clk_branch gcc_uniphy2_ahb +@@ -3674,9 +3559,8 @@ static struct clk_branch gcc_uniphy2_ahb .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy2_ahb_clk", @@ -3122,7 +3122,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3689,9 +3573,8 @@ static struct clk_branch gcc_uniphy2_sys +@@ -3691,9 +3575,8 @@ static struct clk_branch gcc_uniphy2_sys .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy2_sys_clk", @@ -3134,7 +3134,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3706,9 +3589,8 @@ static struct clk_branch gcc_nss_port1_r +@@ -3708,9 +3591,8 @@ static struct clk_branch gcc_nss_port1_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port1_rx_clk", @@ -3146,7 +3146,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3723,9 +3605,8 @@ static struct clk_branch gcc_nss_port1_t +@@ -3725,9 +3607,8 @@ static struct clk_branch gcc_nss_port1_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port1_tx_clk", @@ -3158,7 +3158,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3740,9 +3621,8 @@ static struct clk_branch gcc_nss_port2_r +@@ -3742,9 +3623,8 @@ static struct clk_branch gcc_nss_port2_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port2_rx_clk", @@ -3170,7 +3170,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3757,9 +3637,8 @@ static struct clk_branch gcc_nss_port2_t +@@ -3759,9 +3639,8 @@ static struct clk_branch gcc_nss_port2_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port2_tx_clk", @@ -3182,7 +3182,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3774,9 +3653,8 @@ static struct clk_branch gcc_nss_port3_r +@@ -3776,9 +3655,8 @@ static struct clk_branch gcc_nss_port3_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port3_rx_clk", @@ -3194,7 +3194,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3791,9 +3669,8 @@ static struct clk_branch gcc_nss_port3_t +@@ -3793,9 +3671,8 @@ static struct clk_branch gcc_nss_port3_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port3_tx_clk", @@ -3206,7 +3206,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3808,9 +3685,8 @@ static struct clk_branch gcc_nss_port4_r +@@ -3810,9 +3687,8 @@ static struct clk_branch gcc_nss_port4_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port4_rx_clk", @@ -3218,7 +3218,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3825,9 +3701,8 @@ static struct clk_branch gcc_nss_port4_t +@@ -3827,9 +3703,8 @@ static struct clk_branch gcc_nss_port4_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port4_tx_clk", @@ -3230,7 +3230,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3842,9 +3717,8 @@ static struct clk_branch gcc_nss_port5_r +@@ -3844,9 +3719,8 @@ static struct clk_branch gcc_nss_port5_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port5_rx_clk", @@ -3242,7 +3242,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3859,9 +3733,8 @@ static struct clk_branch gcc_nss_port5_t +@@ -3861,9 +3735,8 @@ static struct clk_branch gcc_nss_port5_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port5_tx_clk", @@ -3254,7 +3254,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3876,9 +3749,8 @@ static struct clk_branch gcc_nss_port6_r +@@ -3878,9 +3751,8 @@ static struct clk_branch gcc_nss_port6_r .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port6_rx_clk", @@ -3266,7 +3266,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3893,9 +3765,8 @@ static struct clk_branch gcc_nss_port6_t +@@ -3895,9 +3767,8 @@ static struct clk_branch gcc_nss_port6_t .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_nss_port6_tx_clk", @@ -3278,7 +3278,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3910,9 +3781,8 @@ static struct clk_branch gcc_port1_mac_c +@@ -3912,9 +3783,8 @@ static struct clk_branch gcc_port1_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port1_mac_clk", @@ -3290,7 +3290,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3927,9 +3797,8 @@ static struct clk_branch gcc_port2_mac_c +@@ -3929,9 +3799,8 @@ static struct clk_branch gcc_port2_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port2_mac_clk", @@ -3302,7 +3302,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3944,9 +3813,8 @@ static struct clk_branch gcc_port3_mac_c +@@ -3946,9 +3815,8 @@ static struct clk_branch gcc_port3_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port3_mac_clk", @@ -3314,7 +3314,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3961,9 +3829,8 @@ static struct clk_branch gcc_port4_mac_c +@@ -3963,9 +3831,8 @@ static struct clk_branch gcc_port4_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port4_mac_clk", @@ -3326,7 +3326,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3978,9 +3845,8 @@ static struct clk_branch gcc_port5_mac_c +@@ -3980,9 +3847,8 @@ static struct clk_branch gcc_port5_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port5_mac_clk", @@ -3338,7 +3338,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -3995,9 +3861,8 @@ static struct clk_branch gcc_port6_mac_c +@@ -3997,9 +3863,8 @@ static struct clk_branch gcc_port6_mac_c .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_port6_mac_clk", @@ -3350,7 +3350,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4012,9 +3877,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4014,9 +3879,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port1_rx_clk", @@ -3362,7 +3362,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4029,9 +3893,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4031,9 +3895,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port1_tx_clk", @@ -3374,7 +3374,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4046,9 +3909,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4048,9 +3911,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port2_rx_clk", @@ -3386,7 +3386,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4063,9 +3925,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4065,9 +3927,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port2_tx_clk", @@ -3398,7 +3398,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4080,9 +3941,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4082,9 +3943,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port3_rx_clk", @@ -3410,7 +3410,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4097,9 +3957,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4099,9 +3959,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port3_tx_clk", @@ -3422,7 +3422,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4114,9 +3973,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4116,9 +3975,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port4_rx_clk", @@ -3434,7 +3434,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4131,9 +3989,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4133,9 +3991,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port4_tx_clk", @@ -3446,7 +3446,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4148,9 +4005,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4150,9 +4007,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port5_rx_clk", @@ -3458,7 +3458,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4165,9 +4021,8 @@ static struct clk_branch gcc_uniphy0_por +@@ -4167,9 +4023,8 @@ static struct clk_branch gcc_uniphy0_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy0_port5_tx_clk", @@ -3470,7 +3470,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4182,9 +4037,8 @@ static struct clk_branch gcc_uniphy1_por +@@ -4184,9 +4039,8 @@ static struct clk_branch gcc_uniphy1_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy1_port5_rx_clk", @@ -3482,7 +3482,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4199,9 +4053,8 @@ static struct clk_branch gcc_uniphy1_por +@@ -4201,9 +4055,8 @@ static struct clk_branch gcc_uniphy1_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy1_port5_tx_clk", @@ -3494,7 +3494,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4216,9 +4069,8 @@ static struct clk_branch gcc_uniphy2_por +@@ -4218,9 +4071,8 @@ static struct clk_branch gcc_uniphy2_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy2_port6_rx_clk", @@ -3506,7 +3506,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4233,9 +4085,8 @@ static struct clk_branch gcc_uniphy2_por +@@ -4235,9 +4087,8 @@ static struct clk_branch gcc_uniphy2_por .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_uniphy2_port6_tx_clk", @@ -3518,7 +3518,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4251,9 +4102,8 @@ static struct clk_branch gcc_crypto_ahb_ +@@ -4253,9 +4104,8 @@ static struct clk_branch gcc_crypto_ahb_ .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_crypto_ahb_clk", @@ -3530,7 +3530,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4269,9 +4119,8 @@ static struct clk_branch gcc_crypto_axi_ +@@ -4271,9 +4121,8 @@ static struct clk_branch gcc_crypto_axi_ .enable_mask = BIT(1), .hw.init = &(struct clk_init_data){ .name = "gcc_crypto_axi_clk", @@ -3542,7 +3542,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4287,9 +4136,8 @@ static struct clk_branch gcc_crypto_clk +@@ -4289,9 +4138,8 @@ static struct clk_branch gcc_crypto_clk .enable_mask = BIT(2), .hw.init = &(struct clk_init_data){ .name = "gcc_crypto_clk", @@ -3554,7 +3554,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4304,9 +4152,8 @@ static struct clk_branch gcc_gp1_clk = { +@@ -4306,9 +4154,8 @@ static struct clk_branch gcc_gp1_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_gp1_clk", @@ -3566,7 +3566,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4321,9 +4168,8 @@ static struct clk_branch gcc_gp2_clk = { +@@ -4323,9 +4170,8 @@ static struct clk_branch gcc_gp2_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_gp2_clk", @@ -3578,7 +3578,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4338,9 +4184,8 @@ static struct clk_branch gcc_gp3_clk = { +@@ -4340,9 +4186,8 @@ static struct clk_branch gcc_gp3_clk = { .enable_mask = BIT(0), .hw.init = &(struct clk_init_data){ .name = "gcc_gp3_clk", @@ -3590,7 +3590,7 @@ Link: https://lore.kernel.org/r/20221030175703.1103224-1-robimarko@gmail.com .num_parents = 1, .flags = CLK_SET_RATE_PARENT, .ops = &clk_branch2_ops, -@@ -4362,7 +4207,7 @@ static struct clk_rcg2 pcie0_rchng_clk_s +@@ -4364,7 +4209,7 @@ static struct clk_rcg2 pcie0_rchng_clk_s .clkr.hw.init = &(struct clk_init_data){ .name = "pcie0_rchng_clk_src", .parent_data = gcc_xo_gpll0, diff --git a/target/linux/qualcommax/patches-6.1/0010-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch b/target/linux/qualcommax/patches-6.1/0010-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch index 81014ab24..182fbe7f0 100644 --- a/target/linux/qualcommax/patches-6.1/0010-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch +++ b/target/linux/qualcommax/patches-6.1/0010-v6.2-clk-qcom-ipq8074-add-missing-networking-resets.patch @@ -18,7 +18,7 @@ Link: https://lore.kernel.org/r/20221107132901.489240-3-robimarko@gmail.com --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c -@@ -4665,6 +4665,20 @@ static const struct qcom_reset_map gcc_i +@@ -4667,6 +4667,20 @@ static const struct qcom_reset_map gcc_i [GCC_PCIE1_AXI_SLAVE_ARES] = { 0x76040, 4 }, [GCC_PCIE1_AHB_ARES] = { 0x76040, 5 }, [GCC_PCIE1_AXI_MASTER_STICKY_ARES] = { 0x76040, 6 }, diff --git a/target/linux/qualcommax/patches-6.1/0011-v6.2-clk-qcom-ipq8074-populate-fw_name-for-all-parents.patch b/target/linux/qualcommax/patches-6.1/0011-v6.2-clk-qcom-ipq8074-populate-fw_name-for-all-parents.patch index 35a0a07c7..a55df15c6 100644 --- a/target/linux/qualcommax/patches-6.1/0011-v6.2-clk-qcom-ipq8074-populate-fw_name-for-all-parents.patch +++ b/target/linux/qualcommax/patches-6.1/0011-v6.2-clk-qcom-ipq8074-populate-fw_name-for-all-parents.patch @@ -22,7 +22,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c -@@ -674,7 +674,7 @@ static struct clk_rcg2 pcie0_aux_clk_src +@@ -675,7 +675,7 @@ static struct clk_rcg2 pcie0_aux_clk_src }; static const struct clk_parent_data gcc_pcie20_phy0_pipe_clk_xo[] = { @@ -31,7 +31,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com { .fw_name = "xo", .name = "xo" }, }; -@@ -727,7 +727,7 @@ static struct clk_rcg2 pcie1_aux_clk_src +@@ -728,7 +728,7 @@ static struct clk_rcg2 pcie1_aux_clk_src }; static const struct clk_parent_data gcc_pcie20_phy1_pipe_clk_xo[] = { @@ -40,7 +40,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com { .fw_name = "xo", .name = "xo" }, }; -@@ -1131,7 +1131,7 @@ static const struct freq_tbl ftbl_nss_no +@@ -1133,7 +1133,7 @@ static const struct freq_tbl ftbl_nss_no static const struct clk_parent_data gcc_xo_bias_pll_nss_noc_clk_gpll0_gpll2[] = { { .fw_name = "xo", .name = "xo" }, @@ -49,7 +49,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com { .hw = &gpll0.clkr.hw }, { .hw = &gpll2.clkr.hw }, }; -@@ -1356,7 +1356,7 @@ static const struct freq_tbl ftbl_nss_pp +@@ -1358,7 +1358,7 @@ static const struct freq_tbl ftbl_nss_pp static const struct clk_parent_data gcc_xo_bias_gpll0_gpll4_nss_ubi32[] = { { .fw_name = "xo", .name = "xo" }, @@ -58,7 +58,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com { .hw = &gpll0.clkr.hw }, { .hw = &gpll4.clkr.hw }, { .hw = &nss_crypto_pll.clkr.hw }, -@@ -1407,10 +1407,10 @@ static const struct freq_tbl ftbl_nss_po +@@ -1409,10 +1409,10 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy0_rx_tx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, @@ -72,7 +72,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com }; static const struct parent_map gcc_xo_uniphy0_rx_tx_ubi32_bias_map[] = { -@@ -1459,10 +1459,10 @@ static const struct freq_tbl ftbl_nss_po +@@ -1461,10 +1461,10 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy0_tx_rx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, @@ -86,7 +86,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com }; static const struct parent_map gcc_xo_uniphy0_tx_rx_ubi32_bias_map[] = { -@@ -1690,12 +1690,12 @@ static const struct freq_tbl ftbl_nss_po +@@ -1692,12 +1692,12 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy0_rx_tx_uniphy1_rx_tx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, @@ -104,7 +104,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com }; static const struct parent_map -@@ -1752,12 +1752,12 @@ static const struct freq_tbl ftbl_nss_po +@@ -1754,12 +1754,12 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy0_tx_rx_uniphy1_tx_rx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, @@ -122,7 +122,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com }; static const struct parent_map -@@ -1814,10 +1814,10 @@ static const struct freq_tbl ftbl_nss_po +@@ -1816,10 +1816,10 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy2_rx_tx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, @@ -136,7 +136,7 @@ Link: https://lore.kernel.org/r/20221116214655.1116467-1-robimarko@gmail.com }; static const struct parent_map gcc_xo_uniphy2_rx_tx_ubi32_bias_map[] = { -@@ -1871,10 +1871,10 @@ static const struct freq_tbl ftbl_nss_po +@@ -1873,10 +1873,10 @@ static const struct freq_tbl ftbl_nss_po static const struct clk_parent_data gcc_xo_uniphy2_tx_rx_ubi32_bias[] = { { .fw_name = "xo", .name = "xo" }, diff --git a/target/linux/qualcommax/patches-6.1/0020-v6.3-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch b/target/linux/qualcommax/patches-6.1/0020-v6.3-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch index 3d5c2182e..61e56a7db 100644 --- a/target/linux/qualcommax/patches-6.1/0020-v6.3-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch +++ b/target/linux/qualcommax/patches-6.1/0020-v6.3-PCI-qcom-Add-support-for-IPQ8074-Gen3-port.patch @@ -16,7 +16,7 @@ Signed-off-by: Bjorn Helgaas --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c -@@ -1762,6 +1762,7 @@ static const struct of_device_id qcom_pc +@@ -1771,6 +1771,7 @@ static const struct of_device_id qcom_pc { .compatible = "qcom,pcie-ipq8064", .data = &cfg_2_1_0 }, { .compatible = "qcom,pcie-ipq8064-v2", .data = &cfg_2_1_0 }, { .compatible = "qcom,pcie-ipq8074", .data = &cfg_2_3_3 }, diff --git a/target/linux/qualcommax/patches-6.1/0021-v6.3-clk-qcom-ipq8074-populate-fw_name-for-usb3phy-s.patch b/target/linux/qualcommax/patches-6.1/0021-v6.3-clk-qcom-ipq8074-populate-fw_name-for-usb3phy-s.patch index e0e8125ba..2fe6a1a42 100644 --- a/target/linux/qualcommax/patches-6.1/0021-v6.3-clk-qcom-ipq8074-populate-fw_name-for-usb3phy-s.patch +++ b/target/linux/qualcommax/patches-6.1/0021-v6.3-clk-qcom-ipq8074-populate-fw_name-for-usb3phy-s.patch @@ -18,7 +18,7 @@ Signed-off-by: Robert Marko --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c -@@ -928,7 +928,7 @@ static struct clk_rcg2 usb0_mock_utmi_cl +@@ -930,7 +930,7 @@ static struct clk_rcg2 usb0_mock_utmi_cl }; static const struct clk_parent_data gcc_usb3phy_0_cc_pipe_clk_xo[] = { @@ -27,7 +27,7 @@ Signed-off-by: Robert Marko { .fw_name = "xo", .name = "xo" }, }; -@@ -996,7 +996,7 @@ static struct clk_rcg2 usb1_mock_utmi_cl +@@ -998,7 +998,7 @@ static struct clk_rcg2 usb1_mock_utmi_cl }; static const struct clk_parent_data gcc_usb3phy_1_cc_pipe_clk_xo[] = { diff --git a/target/linux/qualcommax/patches-6.1/0025-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch b/target/linux/qualcommax/patches-6.1/0025-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch index 63e2f22db..8f3e28ac2 100644 --- a/target/linux/qualcommax/patches-6.1/0025-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch +++ b/target/linux/qualcommax/patches-6.1/0025-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ6018.patch @@ -35,7 +35,7 @@ Signed-off-by: Viresh Kumar { .compatible = "qcom,msm8974", }, --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c -@@ -31,6 +31,8 @@ +@@ -30,6 +30,8 @@ #include @@ -44,7 +44,7 @@ Signed-off-by: Viresh Kumar struct qcom_cpufreq_drv; struct qcom_cpufreq_match_data { -@@ -204,6 +206,57 @@ len_error: +@@ -203,6 +205,57 @@ len_error: return ret; } @@ -102,7 +102,7 @@ Signed-off-by: Viresh Kumar static const struct qcom_cpufreq_match_data match_data_kryo = { .get_version = qcom_cpufreq_kryo_name_version, }; -@@ -218,6 +271,10 @@ static const struct qcom_cpufreq_match_d +@@ -217,6 +270,10 @@ static const struct qcom_cpufreq_match_d .genpd_names = qcs404_genpd_names, }; @@ -113,7 +113,7 @@ Signed-off-by: Viresh Kumar static int qcom_cpufreq_probe(struct platform_device *pdev) { struct qcom_cpufreq_drv *drv; -@@ -362,6 +419,7 @@ static const struct of_device_id qcom_cp +@@ -361,6 +418,7 @@ static const struct of_device_id qcom_cp { .compatible = "qcom,apq8096", .data = &match_data_kryo }, { .compatible = "qcom,msm8996", .data = &match_data_kryo }, { .compatible = "qcom,qcs404", .data = &match_data_qcs404 }, diff --git a/target/linux/qualcommax/patches-6.1/0026-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch b/target/linux/qualcommax/patches-6.1/0026-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch index cbd7b770f..245c5c4d5 100644 --- a/target/linux/qualcommax/patches-6.1/0026-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch +++ b/target/linux/qualcommax/patches-6.1/0026-v6.7-cpufreq-qcom-nvmem-add-support-for-IPQ8074.patch @@ -35,7 +35,7 @@ Signed-off-by: Viresh Kumar { .compatible = "qcom,msm8960", }, --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c -@@ -33,6 +33,11 @@ +@@ -32,6 +32,11 @@ #define IPQ6000_VERSION BIT(2) @@ -47,7 +47,7 @@ Signed-off-by: Viresh Kumar struct qcom_cpufreq_drv; struct qcom_cpufreq_match_data { -@@ -257,6 +262,44 @@ static int qcom_cpufreq_ipq6018_name_ver +@@ -256,6 +261,44 @@ static int qcom_cpufreq_ipq6018_name_ver return 0; } @@ -92,7 +92,7 @@ Signed-off-by: Viresh Kumar static const struct qcom_cpufreq_match_data match_data_kryo = { .get_version = qcom_cpufreq_kryo_name_version, }; -@@ -275,6 +318,10 @@ static const struct qcom_cpufreq_match_d +@@ -274,6 +317,10 @@ static const struct qcom_cpufreq_match_d .get_version = qcom_cpufreq_ipq6018_name_version, }; @@ -103,7 +103,7 @@ Signed-off-by: Viresh Kumar static int qcom_cpufreq_probe(struct platform_device *pdev) { struct qcom_cpufreq_drv *drv; -@@ -421,6 +468,7 @@ static const struct of_device_id qcom_cp +@@ -420,6 +467,7 @@ static const struct of_device_id qcom_cp { .compatible = "qcom,qcs404", .data = &match_data_qcs404 }, { .compatible = "qcom,ipq6018", .data = &match_data_ipq6018 }, { .compatible = "qcom,ipq8064", .data = &match_data_krait }, diff --git a/target/linux/qualcommax/patches-6.1/0046-v6.6-clk-qcom-gcc-ipq6018-Use-floor-ops-for-sdcc-clocks.patch b/target/linux/qualcommax/patches-6.1/0046-v6.6-clk-qcom-gcc-ipq6018-Use-floor-ops-for-sdcc-clocks.patch index 9ae72730d..8cd52b818 100644 --- a/target/linux/qualcommax/patches-6.1/0046-v6.6-clk-qcom-gcc-ipq6018-Use-floor-ops-for-sdcc-clocks.patch +++ b/target/linux/qualcommax/patches-6.1/0046-v6.6-clk-qcom-gcc-ipq6018-Use-floor-ops-for-sdcc-clocks.patch @@ -16,7 +16,7 @@ Link: https://lore.kernel.org/r/1682413909-24927-1-git-send-email-mantas@8device --- a/drivers/clk/qcom/gcc-ipq6018.c +++ b/drivers/clk/qcom/gcc-ipq6018.c -@@ -1702,7 +1702,7 @@ static struct clk_rcg2 usb0_mock_utmi_cl +@@ -1703,7 +1703,7 @@ static struct clk_rcg2 usb0_mock_utmi_cl .name = "usb0_mock_utmi_clk_src", .parent_data = gcc_xo_gpll6_gpll0_gpll0_out_main_div2, .num_parents = 4, diff --git a/target/linux/qualcommax/patches-6.1/0048-v6.6-clk-qcom-gcc-ipq6018-update-UBI32-PLL.patch b/target/linux/qualcommax/patches-6.1/0048-v6.6-clk-qcom-gcc-ipq6018-update-UBI32-PLL.patch index e38b40278..f7326069b 100644 --- a/target/linux/qualcommax/patches-6.1/0048-v6.6-clk-qcom-gcc-ipq6018-update-UBI32-PLL.patch +++ b/target/linux/qualcommax/patches-6.1/0048-v6.6-clk-qcom-gcc-ipq6018-update-UBI32-PLL.patch @@ -15,7 +15,7 @@ Link: https://lore.kernel.org/r/20230526190855.2941291-1-robimarko@gmail.com --- a/drivers/clk/qcom/gcc-ipq6018.c +++ b/drivers/clk/qcom/gcc-ipq6018.c -@@ -4143,15 +4143,20 @@ static struct clk_branch gcc_dcc_clk = { +@@ -4145,15 +4145,20 @@ static struct clk_branch gcc_dcc_clk = { static const struct alpha_pll_config ubi32_pll_config = { .l = 0x3e, diff --git a/target/linux/qualcommax/patches-6.1/0049-v6.6-clk-qcom-gcc-ipq6018-remove-duplicate-initializers.patch b/target/linux/qualcommax/patches-6.1/0049-v6.6-clk-qcom-gcc-ipq6018-remove-duplicate-initializers.patch index e4faac1b6..396558b4a 100644 --- a/target/linux/qualcommax/patches-6.1/0049-v6.6-clk-qcom-gcc-ipq6018-remove-duplicate-initializers.patch +++ b/target/linux/qualcommax/patches-6.1/0049-v6.6-clk-qcom-gcc-ipq6018-remove-duplicate-initializers.patch @@ -27,7 +27,7 @@ Link: https://lore.kernel.org/r/20230601213416.3373599-1-arnd@kernel.org --- a/drivers/clk/qcom/gcc-ipq6018.c +++ b/drivers/clk/qcom/gcc-ipq6018.c -@@ -4144,8 +4144,6 @@ static struct clk_branch gcc_dcc_clk = { +@@ -4146,8 +4146,6 @@ static struct clk_branch gcc_dcc_clk = { static const struct alpha_pll_config ubi32_pll_config = { .l = 0x3e, .alpha = 0x6667, diff --git a/target/linux/qualcommax/patches-6.1/0053-v6.7-clk-qcom-gcc-ipq6018-add-QUP6-I2C-clock.patch b/target/linux/qualcommax/patches-6.1/0053-v6.7-clk-qcom-gcc-ipq6018-add-QUP6-I2C-clock.patch index 085852893..0c1576c4f 100644 --- a/target/linux/qualcommax/patches-6.1/0053-v6.7-clk-qcom-gcc-ipq6018-add-QUP6-I2C-clock.patch +++ b/target/linux/qualcommax/patches-6.1/0053-v6.7-clk-qcom-gcc-ipq6018-add-QUP6-I2C-clock.patch @@ -20,7 +20,7 @@ Signed-off-by: Bjorn Andersson --- a/drivers/clk/qcom/gcc-ipq6018.c +++ b/drivers/clk/qcom/gcc-ipq6018.c -@@ -2120,6 +2120,26 @@ static struct clk_branch gcc_blsp1_qup5_ +@@ -2122,6 +2122,26 @@ static struct clk_branch gcc_blsp1_qup5_ }, }; @@ -47,7 +47,7 @@ Signed-off-by: Bjorn Andersson static struct clk_branch gcc_blsp1_qup6_spi_apps_clk = { .halt_reg = 0x0700c, .clkr = { -@@ -4276,6 +4296,7 @@ static struct clk_regmap *gcc_ipq6018_cl +@@ -4278,6 +4298,7 @@ static struct clk_regmap *gcc_ipq6018_cl [GCC_BLSP1_QUP4_SPI_APPS_CLK] = &gcc_blsp1_qup4_spi_apps_clk.clkr, [GCC_BLSP1_QUP5_I2C_APPS_CLK] = &gcc_blsp1_qup5_i2c_apps_clk.clkr, [GCC_BLSP1_QUP5_SPI_APPS_CLK] = &gcc_blsp1_qup5_spi_apps_clk.clkr, diff --git a/target/linux/qualcommax/patches-6.1/0101-clk-qcom-gcc-ipq8074-rework-nss_port5-6-clock-to-mul.patch b/target/linux/qualcommax/patches-6.1/0101-clk-qcom-gcc-ipq8074-rework-nss_port5-6-clock-to-mul.patch index 62a30bbb2..1cd614761 100644 --- a/target/linux/qualcommax/patches-6.1/0101-clk-qcom-gcc-ipq8074-rework-nss_port5-6-clock-to-mul.patch +++ b/target/linux/qualcommax/patches-6.1/0101-clk-qcom-gcc-ipq8074-rework-nss_port5-6-clock-to-mul.patch @@ -23,7 +23,7 @@ Signed-off-by: Christian Marangi --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c -@@ -1676,13 +1676,21 @@ static struct clk_regmap_div nss_port4_t +@@ -1678,13 +1678,21 @@ static struct clk_regmap_div nss_port4_t }, }; @@ -49,7 +49,7 @@ Signed-off-by: Christian Marangi F(156250000, P_UNIPHY1_RX, 2, 0, 0), F(312500000, P_UNIPHY1_RX, 1, 0, 0), { } -@@ -1738,13 +1746,21 @@ static struct clk_regmap_div nss_port5_r +@@ -1740,13 +1748,21 @@ static struct clk_regmap_div nss_port5_r }, }; @@ -75,7 +75,7 @@ Signed-off-by: Christian Marangi F(156250000, P_UNIPHY1_TX, 2, 0, 0), F(312500000, P_UNIPHY1_TX, 1, 0, 0), { } -@@ -1800,13 +1816,21 @@ static struct clk_regmap_div nss_port5_t +@@ -1802,13 +1818,21 @@ static struct clk_regmap_div nss_port5_t }, }; @@ -101,7 +101,7 @@ Signed-off-by: Christian Marangi F(156250000, P_UNIPHY2_RX, 2, 0, 0), F(312500000, P_UNIPHY2_RX, 1, 0, 0), { } -@@ -1857,13 +1881,21 @@ static struct clk_regmap_div nss_port6_r +@@ -1859,13 +1883,21 @@ static struct clk_regmap_div nss_port6_r }, }; diff --git a/target/linux/qualcommax/patches-6.1/0102-arm64-dts-ipq8074-add-reserved-memory-nodes.patch b/target/linux/qualcommax/patches-6.1/0102-arm64-dts-ipq8074-add-reserved-memory-nodes.patch index 3996d15d9..8fe58e798 100644 --- a/target/linux/qualcommax/patches-6.1/0102-arm64-dts-ipq8074-add-reserved-memory-nodes.patch +++ b/target/linux/qualcommax/patches-6.1/0102-arm64-dts-ipq8074-add-reserved-memory-nodes.patch @@ -23,7 +23,7 @@ Signed-off-by: Robert Marko #size-cells = <2>; ranges; -+ nss@40000000 { ++ nss_region: nss@40000000 { + no-map; + reg = <0x0 0x40000000 0x0 0x01000000>; + }; diff --git a/target/linux/qualcommax/patches-6.1/0118-clk-qcom-Add-WCSSAON-reset.patch b/target/linux/qualcommax/patches-6.1/0118-clk-qcom-Add-WCSSAON-reset.patch index be0524338..ec366fd42 100644 --- a/target/linux/qualcommax/patches-6.1/0118-clk-qcom-Add-WCSSAON-reset.patch +++ b/target/linux/qualcommax/patches-6.1/0118-clk-qcom-Add-WCSSAON-reset.patch @@ -15,7 +15,7 @@ Acked-by: Stephen Boyd --- a/drivers/clk/qcom/gcc-ipq8074.c +++ b/drivers/clk/qcom/gcc-ipq8074.c -@@ -4711,6 +4711,7 @@ static const struct qcom_reset_map gcc_i +@@ -4713,6 +4713,7 @@ static const struct qcom_reset_map gcc_i [GCC_NSSPORT4_RESET] = { .reg = 0x68014, .bitmask = BIT(27) | GENMASK(9, 8) }, [GCC_NSSPORT5_RESET] = { .reg = 0x68014, .bitmask = BIT(28) | GENMASK(11, 10) }, [GCC_NSSPORT6_RESET] = { .reg = 0x68014, .bitmask = BIT(29) | GENMASK(13, 12) }, diff --git a/target/linux/qualcommax/patches-6.1/0133-arm64-dts-ipq6018-add-reserved-memory-nodes.patch b/target/linux/qualcommax/patches-6.1/0133-arm64-dts-ipq6018-add-reserved-memory-nodes.patch index 5ec7ec9ce..b6790f02e 100644 --- a/target/linux/qualcommax/patches-6.1/0133-arm64-dts-ipq6018-add-reserved-memory-nodes.patch +++ b/target/linux/qualcommax/patches-6.1/0133-arm64-dts-ipq6018-add-reserved-memory-nodes.patch @@ -1,10 +1,15 @@ --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -212,6 +212,16 @@ +@@ -212,6 +212,21 @@ reg = <0x0 0x4ab00000 0x0 0x5500000>; no-map; }; + ++ nss_region: nss@40000000 { ++ no-map; ++ reg = <0x0 0x40000000 0x0 0x01000000>; ++ }; ++ + q6_etr_region: q6_etr_dump@50000000 { + reg = <0x0 0x50000000 0x0 0x100000>; + no-map; diff --git a/target/linux/qualcommax/patches-6.1/0134-arm64-dts-qcom-ipq6018-add-LDOA2-regulator.patch b/target/linux/qualcommax/patches-6.1/0134-arm64-dts-qcom-ipq6018-add-LDOA2-regulator.patch deleted file mode 100644 index dfcce21e8..000000000 --- a/target/linux/qualcommax/patches-6.1/0134-arm64-dts-qcom-ipq6018-add-LDOA2-regulator.patch +++ /dev/null @@ -1,15 +0,0 @@ ---- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi -+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -173,6 +173,12 @@ - regulator-max-microvolt = <1062500>; - regulator-always-on; - }; -+ -+ ipq6018_l2: l2 { -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-always-on; -+ }; - }; - }; - }; diff --git a/target/linux/qualcommax/patches-6.1/0135-arm64-dts-qcom-ipq6018-enable-sdhci-node.patch b/target/linux/qualcommax/patches-6.1/0135-arm64-dts-qcom-ipq6018-enable-sdhci-node.patch index c9b6e9e13..8a2ed48d0 100644 --- a/target/linux/qualcommax/patches-6.1/0135-arm64-dts-qcom-ipq6018-enable-sdhci-node.patch +++ b/target/linux/qualcommax/patches-6.1/0135-arm64-dts-qcom-ipq6018-enable-sdhci-node.patch @@ -1,6 +1,6 @@ --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -477,6 +477,26 @@ +@@ -476,6 +476,26 @@ }; }; diff --git a/target/linux/qualcommax/patches-6.1/0136-arm64-dts-qcom-ipq6018-add-thermal-nodes.patch b/target/linux/qualcommax/patches-6.1/0136-arm64-dts-qcom-ipq6018-add-thermal-nodes.patch index b5b994559..14d0c3044 100644 --- a/target/linux/qualcommax/patches-6.1/0136-arm64-dts-qcom-ipq6018-add-thermal-nodes.patch +++ b/target/linux/qualcommax/patches-6.1/0136-arm64-dts-qcom-ipq6018-add-thermal-nodes.patch @@ -13,7 +13,7 @@ Signed-off-by: Robert Marko --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -358,6 +358,16 @@ +@@ -357,6 +357,16 @@ clock-names = "core"; }; @@ -30,7 +30,7 @@ Signed-off-by: Robert Marko cryptobam: dma-controller@704000 { compatible = "qcom,bam-v1.7.0"; reg = <0x0 0x00704000 0x0 0x20000>; -@@ -1043,6 +1053,113 @@ +@@ -1042,6 +1052,113 @@ }; }; diff --git a/target/linux/qualcommax/patches-6.1/0137-arm64-dts-qcom-ipq6018-rework-cpufreq.patch b/target/linux/qualcommax/patches-6.1/0137-arm64-dts-qcom-ipq6018-rework-cpufreq.patch index 540dbb3ce..667fdce2c 100644 --- a/target/linux/qualcommax/patches-6.1/0137-arm64-dts-qcom-ipq6018-rework-cpufreq.patch +++ b/target/linux/qualcommax/patches-6.1/0137-arm64-dts-qcom-ipq6018-rework-cpufreq.patch @@ -1,184 +1,55 @@ --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi -@@ -41,8 +41,6 @@ - next-level-cache = <&L2_0>; +@@ -42,7 +42,6 @@ clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; clock-names = "cpu"; -- operating-points-v2 = <&cpu_opp_table>; + operating-points-v2 = <&cpu_opp_table>; - cpu-supply = <&ipq6018_s2>; }; CPU1: cpu@1 { -@@ -53,8 +51,6 @@ - next-level-cache = <&L2_0>; +@@ -54,7 +53,6 @@ clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; clock-names = "cpu"; -- operating-points-v2 = <&cpu_opp_table>; + operating-points-v2 = <&cpu_opp_table>; - cpu-supply = <&ipq6018_s2>; }; CPU2: cpu@2 { -@@ -65,8 +61,6 @@ - next-level-cache = <&L2_0>; +@@ -66,7 +64,6 @@ clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; clock-names = "cpu"; -- operating-points-v2 = <&cpu_opp_table>; + operating-points-v2 = <&cpu_opp_table>; - cpu-supply = <&ipq6018_s2>; }; CPU3: cpu@3 { -@@ -77,8 +71,6 @@ - next-level-cache = <&L2_0>; +@@ -78,7 +75,6 @@ clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>; clock-names = "cpu"; -- operating-points-v2 = <&cpu_opp_table>; + operating-points-v2 = <&cpu_opp_table>; - cpu-supply = <&ipq6018_s2>; }; L2_0: l2-cache { -@@ -94,54 +86,6 @@ +@@ -113,6 +109,13 @@ + clock-latency-ns = <200000>; }; - }; -- cpu_opp_table: opp-table-cpu { -- compatible = "operating-points-v2-kryo-cpu"; -- nvmem-cells = <&cpu_speed_bin>; -- opp-shared; -- -- opp-864000000 { -- opp-hz = /bits/ 64 <864000000>; -- opp-microvolt = <725000>; -- opp-supported-hw = <0xf>; -- clock-latency-ns = <200000>; -- }; -- -- opp-1056000000 { -- opp-hz = /bits/ 64 <1056000000>; -- opp-microvolt = <787500>; -- opp-supported-hw = <0xf>; -- clock-latency-ns = <200000>; -- }; -- -- opp-1320000000 { -- opp-hz = /bits/ 64 <1320000000>; -- opp-microvolt = <862500>; -- opp-supported-hw = <0x3>; -- clock-latency-ns = <200000>; -- }; -- -- opp-1440000000 { -- opp-hz = /bits/ 64 <1440000000>; -- opp-microvolt = <925000>; -- opp-supported-hw = <0x3>; -- clock-latency-ns = <200000>; -- }; -- -- opp-1608000000 { -- opp-hz = /bits/ 64 <1608000000>; -- opp-microvolt = <987500>; -- opp-supported-hw = <0x1>; -- clock-latency-ns = <200000>; -- }; -- -- opp-1800000000 { -- opp-hz = /bits/ 64 <1800000000>; -- opp-microvolt = <1062500>; -- opp-supported-hw = <0x1>; -- clock-latency-ns = <200000>; -- }; -- }; -- - pmuv8: pmu { - compatible = "arm,cortex-a53-pmu"; - interrupts = ; ---- /dev/null -+++ b/arch/arm64/boot/dts/qcom/ipq6000-opp.dtsi -@@ -0,0 +1,46 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+ -+/ { -+ cpu_opp_table: opp-table-cpu { -+ compatible = "operating-points-v2-kryo-cpu"; -+ nvmem-cells = <&cpu_speed_bin>; -+ opp-shared; -+ -+ opp-864000000 { -+ opp-hz = /bits/ 64 <864000000>; -+ opp-microvolt = <725000>; -+ opp-supported-hw = <0xf>; -+ clock-latency-ns = <200000>; -+ }; -+ -+ opp-1056000000 { -+ opp-hz = /bits/ 64 <1056000000>; -+ opp-microvolt = <787500>; -+ opp-supported-hw = <0xf>; -+ clock-latency-ns = <200000>; -+ }; -+ + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <850000>; + opp-supported-hw = <0x4>; + clock-latency-ns = <200000>; + }; -+ }; -+}; -+ -+&CPU0 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&CPU1 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&CPU2 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; -+ -+&CPU3 { -+ operating-points-v2 = <&cpu_opp_table>; -+}; ---- /dev/null -+++ b/arch/arm64/boot/dts/qcom/ipq6018-opp.dtsi -@@ -0,0 +1,78 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+ -+/ { -+ cpu_opp_table: opp-table-cpu { -+ compatible = "operating-points-v2-kryo-cpu"; -+ nvmem-cells = <&cpu_speed_bin>; -+ opp-shared; -+ -+ opp-864000000 { -+ opp-hz = /bits/ 64 <864000000>; -+ opp-microvolt = <725000>; -+ opp-supported-hw = <0xf>; -+ clock-latency-ns = <200000>; -+ }; -+ -+ opp-1056000000 { -+ opp-hz = /bits/ 64 <1056000000>; -+ opp-microvolt = <787500>; -+ opp-supported-hw = <0xf>; -+ clock-latency-ns = <200000>; -+ }; -+ -+ opp-1320000000 { -+ opp-hz = /bits/ 64 <1320000000>; -+ opp-microvolt = <862500>; -+ opp-supported-hw = <0x3>; -+ clock-latency-ns = <200000>; -+ }; -+ -+ opp-1440000000 { -+ opp-hz = /bits/ 64 <1440000000>; -+ opp-microvolt = <925000>; -+ opp-supported-hw = <0x3>; -+ clock-latency-ns = <200000>; -+ }; + + opp-1320000000 { + opp-hz = /bits/ 64 <1320000000>; + opp-microvolt = <862500>; +@@ -127,6 +130,13 @@ + clock-latency-ns = <200000>; + }; + + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-microvolt = <937500>; @@ -186,38 +57,65 @@ + clock-latency-ns = <200000>; + }; + -+ opp-1608000000 { -+ opp-hz = /bits/ 64 <1608000000>; -+ opp-microvolt = <987500>; -+ opp-supported-hw = <0x1>; -+ clock-latency-ns = <200000>; + opp-1608000000 { + opp-hz = /bits/ 64 <1608000000>; + opp-microvolt = <987500>; +@@ -164,16 +174,6 @@ + rpm_requests: rpm-requests { + compatible = "qcom,rpm-ipq6018"; + qcom,glink-channels = "rpm_requests"; +- +- regulators { +- compatible = "qcom,rpm-mp5496-regulators"; +- +- ipq6018_s2: s2 { +- regulator-min-microvolt = <725000>; +- regulator-max-microvolt = <1062500>; +- regulator-always-on; +- }; +- }; + }; + }; + }; +--- /dev/null ++++ b/arch/arm64/boot/dts/qcom/ipq6018-mp5496.dtsi +@@ -0,0 +1,39 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++ ++&rpm_requests { ++ regulators { ++ compatible = "qcom,rpm-mp5496-regulators"; ++ ++ ipq6018_s2: s2 { ++ regulator-min-microvolt = <725000>; ++ regulator-max-microvolt = <1062500>; ++ regulator-always-on; + }; + -+ opp-1800000000 { -+ opp-hz = /bits/ 64 <1800000000>; -+ opp-microvolt = <1062500>; -+ opp-supported-hw = <0x1>; -+ clock-latency-ns = <200000>; ++ ipq6018_l2: l2 { ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; + }; + }; +}; + ++&sdhc { ++ vqmmc-supply = <&ipq6018_l2>; ++}; ++ +&CPU0 { -+ operating-points-v2 = <&cpu_opp_table>; + cpu-supply = <&ipq6018_s2>; +}; + +&CPU1 { -+ operating-points-v2 = <&cpu_opp_table>; + cpu-supply = <&ipq6018_s2>; +}; + +&CPU2 { -+ operating-points-v2 = <&cpu_opp_table>; + cpu-supply = <&ipq6018_s2>; +}; + +&CPU3 { -+ operating-points-v2 = <&cpu_opp_table>; + cpu-supply = <&ipq6018_s2>; +}; diff --git a/target/linux/qualcommax/patches-6.1/0139-clk-ipq6018-Add-missing-clocks.patch b/target/linux/qualcommax/patches-6.1/0139-clk-ipq6018-Add-missing-clocks.patch index 1d092e7ca..bac6be098 100644 --- a/target/linux/qualcommax/patches-6.1/0139-clk-ipq6018-Add-missing-clocks.patch +++ b/target/linux/qualcommax/patches-6.1/0139-clk-ipq6018-Add-missing-clocks.patch @@ -51,7 +51,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 static const struct freq_tbl ftbl_apss_ahb_clk_src[] = { F(24000000, P_XO, 1, 0, 0), F(25000000, P_GPLL0_DIV2, 16, 0, 0), -@@ -1891,6 +1917,19 @@ static struct clk_rcg2 system_noc_bfdcd_ +@@ -1893,6 +1919,19 @@ static struct clk_rcg2 system_noc_bfdcd_ }, }; @@ -71,7 +71,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 static const struct freq_tbl ftbl_ubi32_mem_noc_bfdcd_clk_src[] = { F(24000000, P_XO, 1, 0, 0), F(307670000, P_BIAS_PLL_NSS_NOC, 1.5, 0, 0), -@@ -1926,6 +1965,19 @@ static struct clk_rcg2 ubi32_mem_noc_bfd +@@ -1928,6 +1967,19 @@ static struct clk_rcg2 ubi32_mem_noc_bfd }, }; @@ -91,7 +91,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 static struct clk_branch gcc_apss_axi_clk = { .halt_reg = 0x46020, .halt_check = BRANCH_HALT_VOTED, -@@ -2683,6 +2735,454 @@ static struct clk_rcg2 lpass_q6_axim_clk +@@ -2685,6 +2737,454 @@ static struct clk_rcg2 lpass_q6_axim_clk }, }; @@ -546,7 +546,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 static struct freq_tbl ftbl_rbcpr_wcss_clk_src[] = { F(24000000, P_XO, 1, 0, 0), F(50000000, P_GPLL0, 16, 0, 0), -@@ -2702,6 +3202,22 @@ static struct clk_rcg2 rbcpr_wcss_clk_sr +@@ -2704,6 +3204,22 @@ static struct clk_rcg2 rbcpr_wcss_clk_sr }, }; @@ -569,7 +569,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 static struct clk_branch gcc_lpass_core_axim_clk = { .halt_reg = 0x1F028, .clkr = { -@@ -3523,6 +4039,22 @@ static struct clk_branch gcc_prng_ahb_cl +@@ -3525,6 +4041,22 @@ static struct clk_branch gcc_prng_ahb_cl }, }; @@ -592,7 +592,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 static struct clk_branch gcc_qdss_dap_clk = { .halt_reg = 0x29084, .clkr = { -@@ -3533,7 +4065,7 @@ static struct clk_branch gcc_qdss_dap_cl +@@ -3535,7 +4067,7 @@ static struct clk_branch gcc_qdss_dap_cl .parent_hws = (const struct clk_hw *[]){ &qdss_dap_sync_clk_src.hw }, .num_parents = 1, @@ -601,7 +601,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 .ops = &clk_branch2_ops, }, }, -@@ -4199,6 +4731,9 @@ static struct clk_hw *gcc_ipq6018_hws[] +@@ -4201,6 +4733,9 @@ static struct clk_hw *gcc_ipq6018_hws[] &gpll6_out_main_div2.hw, &qdss_dap_sync_clk_src.hw, &qdss_tsctr_div2_clk_src.hw, @@ -611,7 +611,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 }; static struct clk_regmap *gcc_ipq6018_clks[] = { -@@ -4362,6 +4897,7 @@ static struct clk_regmap *gcc_ipq6018_cl +@@ -4364,6 +4899,7 @@ static struct clk_regmap *gcc_ipq6018_cl [GCC_SYS_NOC_PCIE0_AXI_CLK] = &gcc_sys_noc_pcie0_axi_clk.clkr, [GCC_PCIE0_PIPE_CLK] = &gcc_pcie0_pipe_clk.clkr, [GCC_PRNG_AHB_CLK] = &gcc_prng_ahb_clk.clkr, @@ -619,7 +619,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 [GCC_QDSS_DAP_CLK] = &gcc_qdss_dap_clk.clkr, [GCC_QPIC_AHB_CLK] = &gcc_qpic_ahb_clk.clkr, [GCC_QPIC_CLK] = &gcc_qpic_clk.clkr, -@@ -4403,9 +4939,35 @@ static struct clk_regmap *gcc_ipq6018_cl +@@ -4405,9 +4941,35 @@ static struct clk_regmap *gcc_ipq6018_cl [PCIE0_RCHNG_CLK_SRC] = &pcie0_rchng_clk_src.clkr, [GCC_PCIE0_AXI_S_BRIDGE_CLK] = &gcc_pcie0_axi_s_bridge_clk.clkr, [PCIE0_RCHNG_CLK] = &gcc_pcie0_rchng_clk.clkr, @@ -655,7 +655,7 @@ Change-Id: I85bb1c127a4794ae9347d5babbbfd6490f6abcc7 [GCC_LPASS_CORE_AXIM_CLK] = &gcc_lpass_core_axim_clk.clkr, [LPASS_CORE_AXIM_CLK_SRC] = &lpass_core_axim_clk_src.clkr, [GCC_LPASS_SNOC_CFG_CLK] = &gcc_lpass_snoc_cfg_clk.clkr, -@@ -4421,6 +4983,9 @@ static struct clk_regmap *gcc_ipq6018_cl +@@ -4423,6 +4985,9 @@ static struct clk_regmap *gcc_ipq6018_cl [GCC_MEM_NOC_UBI32_CLK] = &gcc_mem_noc_ubi32_clk.clkr, [GCC_MEM_NOC_LPASS_CLK] = &gcc_mem_noc_lpass_clk.clkr, [GCC_SNOC_LPASS_CFG_CLK] = &gcc_snoc_lpass_cfg_clk.clkr, diff --git a/target/linux/qualcommax/patches-6.1/0600-1-qca-nss-ecm-support-CORE.patch b/target/linux/qualcommax/patches-6.1/0600-1-qca-nss-ecm-support-CORE.patch new file mode 100644 index 000000000..b2b3575b7 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0600-1-qca-nss-ecm-support-CORE.patch @@ -0,0 +1,781 @@ +--- a/include/linux/if_bridge.h ++++ b/include/linux/if_bridge.h +@@ -70,6 +70,9 @@ void brioctl_set(int (*hook)(struct net + void __user *uarg)); + int br_ioctl_call(struct net *net, struct net_bridge *br, unsigned int cmd, + struct ifreq *ifr, void __user *uarg); ++/* extern void br_dev_update_stats(struct net_device *dev, ++ struct rtnl_link_stats64 *nlstats); */ ++extern bool br_is_hairpin_enabled(struct net_device *dev); + + extern void br_dev_update_stats(struct net_device *dev, + struct rtnl_link_stats64 *nlstats); +@@ -215,4 +218,42 @@ static inline clock_t br_get_ageing_time + } + #endif + ++/* QCA NSS ECM support - Start */ ++extern struct net_device *br_port_dev_get(struct net_device *dev, ++ unsigned char *addr, ++ struct sk_buff *skb, ++ unsigned int cookie); ++extern void br_refresh_fdb_entry(struct net_device *dev, const char *addr); ++extern void br_fdb_entry_refresh(struct net_device *dev, const char *addr, __u16 vid); ++extern struct net_bridge_fdb_entry *br_fdb_has_entry(struct net_device *dev, ++ const char *addr, ++ __u16 vid); ++extern void br_fdb_update_register_notify(struct notifier_block *nb); ++extern void br_fdb_update_unregister_notify(struct notifier_block *nb); ++ ++typedef struct net_bridge_port *br_port_dev_get_hook_t(struct net_device *dev, ++ struct sk_buff *skb, ++ unsigned char *addr, ++ unsigned int cookie); ++extern br_port_dev_get_hook_t __rcu *br_port_dev_get_hook; ++ ++#define BR_FDB_EVENT_ADD 0x01 ++#define BR_FDB_EVENT_DEL 0x02 ++ ++struct br_fdb_event { ++ struct net_device *dev; ++ unsigned char addr[6]; ++ unsigned char is_local; ++ struct net_bridge *br; ++ struct net_device *orig_dev; ++}; ++extern void br_fdb_register_notify(struct notifier_block *nb); ++extern void br_fdb_unregister_notify(struct notifier_block *nb); ++ ++typedef struct net_bridge_port *br_get_dst_hook_t( ++ const struct net_bridge_port *src, ++ struct sk_buff **skb); ++extern br_get_dst_hook_t __rcu *br_get_dst_hook; ++/* QCA NSS ECM support - End */ ++ + #endif +--- a/include/linux/if_vlan.h ++++ b/include/linux/if_vlan.h +@@ -235,7 +235,28 @@ extern void vlan_vids_del_by_dev(struct + + extern bool vlan_uses_dev(const struct net_device *dev); + ++/* QCA NSS ECM support - Start */ ++extern void __vlan_dev_update_accel_stats(struct net_device *dev, ++ struct rtnl_link_stats64 *stats); ++extern u16 vlan_dev_get_egress_prio(struct net_device *dev, u32 skb_prio); ++extern struct net_device *vlan_dev_next_dev(const struct net_device *dev); ++/* QCA NSS ECM support - End */ ++ + #else ++/* QCA NSS ECM support - Start */ ++static inline void __vlan_dev_update_accel_stats(struct net_device *dev, ++ struct rtnl_link_stats64 *stats) ++{ ++ ++} ++ ++static inline u16 vlan_dev_get_egress_prio(struct net_device *dev, ++ u32 skb_prio) ++{ ++ return 0; ++} ++/* QCA NSS ECM support - End */ ++ + static inline struct net_device * + __vlan_find_dev_deep_rcu(struct net_device *real_dev, + __be16 vlan_proto, u16 vlan_id) +--- a/include/linux/netdevice.h ++++ b/include/linux/netdevice.h +@@ -2831,6 +2831,10 @@ enum netdev_cmd { + NETDEV_OFFLOAD_XSTATS_DISABLE, + NETDEV_OFFLOAD_XSTATS_REPORT_USED, + NETDEV_OFFLOAD_XSTATS_REPORT_DELTA, ++ /* QCA NSS ECM Support - Start */ ++ NETDEV_BR_JOIN, ++ NETDEV_BR_LEAVE, ++ /* QCA NSS ECM Support - End */ + }; + const char *netdev_cmd_to_name(enum netdev_cmd cmd); + +--- a/include/net/addrconf.h ++++ b/include/net/addrconf.h +@@ -518,4 +518,9 @@ int if6_proc_init(void); + void if6_proc_exit(void); + #endif + ++/* QCA NSS ECM support - Start */ ++struct net_device *ipv6_dev_find_and_hold(struct net *net, struct in6_addr *addr, ++ int strict); ++/* QCA NSS ECM support - End */ ++ + #endif +--- a/include/net/ip6_route.h ++++ b/include/net/ip6_route.h +@@ -211,6 +211,11 @@ void rt6_multipath_rebalance(struct fib6 + void rt6_uncached_list_add(struct rt6_info *rt); + void rt6_uncached_list_del(struct rt6_info *rt); + ++/* QCA NSS ECM support - Start */ ++int rt6_register_notifier(struct notifier_block *nb); ++int rt6_unregister_notifier(struct notifier_block *nb); ++/* QCA NSS ECM support - End */ ++ + static inline const struct rt6_info *skb_rt6_info(const struct sk_buff *skb) + { + const struct dst_entry *dst = skb_dst(skb); +--- a/include/net/neighbour.h ++++ b/include/net/neighbour.h +@@ -602,4 +602,15 @@ static inline void neigh_update_is_route + *notify = 1; + } + } ++ ++/* QCA NSS ECM support - Start */ ++struct neigh_mac_update { ++ unsigned char old_mac[ALIGN(MAX_ADDR_LEN, sizeof(unsigned long))]; ++ unsigned char update_mac[ALIGN(MAX_ADDR_LEN, sizeof(unsigned long))]; ++}; ++ ++extern void neigh_mac_update_register_notify(struct notifier_block *nb); ++extern void neigh_mac_update_unregister_notify(struct notifier_block *nb); ++/* QCA NSS ECM support - End */ ++ + #endif +--- a/include/net/route.h ++++ b/include/net/route.h +@@ -240,6 +240,11 @@ struct rtable *rt_dst_alloc(struct net_d + unsigned int flags, u16 type, bool noxfrm); + struct rtable *rt_dst_clone(struct net_device *dev, struct rtable *rt); + ++/* QCA NSS ECM support - Start */ ++int ip_rt_register_notifier(struct notifier_block *nb); ++int ip_rt_unregister_notifier(struct notifier_block *nb); ++/* QCA NSS ECM support - End */ ++ + struct in_ifaddr; + void fib_add_ifaddr(struct in_ifaddr *); + void fib_del_ifaddr(struct in_ifaddr *, struct in_ifaddr *); +--- a/net/bridge/br_private.h ++++ b/net/bridge/br_private.h +@@ -2193,4 +2193,9 @@ void br_do_proxy_suppress_arp(struct sk_ + void br_do_suppress_nd(struct sk_buff *skb, struct net_bridge *br, + u16 vid, struct net_bridge_port *p, struct nd_msg *msg); + struct nd_msg *br_is_nd_neigh_msg(struct sk_buff *skb, struct nd_msg *m); ++ ++/* QCA NSS ECM support - Start */ ++#define __br_get(__hook, __default, __args ...) \ ++ (__hook ? (__hook(__args)) : (__default)) ++/* QCA NSS ECM support - End */ + #endif +--- a/net/8021q/vlan_core.c ++++ b/net/8021q/vlan_core.c +@@ -555,4 +555,52 @@ static int __init vlan_offload_init(void + return 0; + } + ++/* QCA NSS ECM support - Start */ ++/* Update the VLAN device with statistics from network offload engines */ ++void __vlan_dev_update_accel_stats(struct net_device *dev, ++ struct rtnl_link_stats64 *nlstats) ++{ ++ struct vlan_pcpu_stats *stats; ++ ++ if (!is_vlan_dev(dev)) ++ return; ++ ++ stats = per_cpu_ptr(vlan_dev_priv(dev)->vlan_pcpu_stats, 0); ++ ++ u64_stats_update_begin(&stats->syncp); ++ u64_stats_add(&stats->rx_packets, nlstats->rx_packets); ++ u64_stats_add(&stats->rx_bytes, nlstats->rx_bytes); ++ u64_stats_add(&stats->tx_packets, nlstats->tx_packets); ++ u64_stats_add(&stats->tx_bytes, nlstats->tx_bytes); ++ u64_stats_update_end(&stats->syncp); ++} ++EXPORT_SYMBOL(__vlan_dev_update_accel_stats); ++ ++/* Lookup the 802.1p egress_map table and return the 802.1p value */ ++u16 vlan_dev_get_egress_prio(struct net_device *dev, u32 skb_prio) ++{ ++ struct vlan_priority_tci_mapping *mp; ++ ++ mp = vlan_dev_priv(dev)->egress_priority_map[(skb_prio & 0xf)]; ++ while (mp) { ++ if (mp->priority == skb_prio) { ++ /* This should already be shifted ++ * to mask correctly with the ++ * VLAN's TCI ++ */ ++ return mp->vlan_qos; ++ } ++ mp = mp->next; ++ } ++ return 0; ++} ++EXPORT_SYMBOL(vlan_dev_get_egress_prio); ++ ++struct net_device *vlan_dev_next_dev(const struct net_device *dev) ++{ ++ return vlan_dev_priv(dev)->real_dev; ++} ++EXPORT_SYMBOL(vlan_dev_next_dev); ++/* QCA NSS ECM support - End */ ++ + fs_initcall(vlan_offload_init); +--- a/net/bridge/br_fdb.c ++++ b/net/bridge/br_fdb.c +@@ -34,6 +34,35 @@ static const struct rhashtable_params br + + static struct kmem_cache *br_fdb_cache __read_mostly; + ++/* QCA NSS ECM support - Start */ ++ATOMIC_NOTIFIER_HEAD(br_fdb_notifier_list); ++ATOMIC_NOTIFIER_HEAD(br_fdb_update_notifier_list); ++ ++void br_fdb_register_notify(struct notifier_block *nb) ++{ ++ atomic_notifier_chain_register(&br_fdb_notifier_list, nb); ++} ++EXPORT_SYMBOL_GPL(br_fdb_register_notify); ++ ++void br_fdb_unregister_notify(struct notifier_block *nb) ++{ ++ atomic_notifier_chain_unregister(&br_fdb_notifier_list, nb); ++} ++EXPORT_SYMBOL_GPL(br_fdb_unregister_notify); ++ ++void br_fdb_update_register_notify(struct notifier_block *nb) ++{ ++ atomic_notifier_chain_register(&br_fdb_update_notifier_list, nb); ++} ++EXPORT_SYMBOL_GPL(br_fdb_update_register_notify); ++ ++void br_fdb_update_unregister_notify(struct notifier_block *nb) ++{ ++ atomic_notifier_chain_unregister(&br_fdb_update_notifier_list, nb); ++} ++EXPORT_SYMBOL_GPL(br_fdb_update_unregister_notify); ++/* QCA NSS ECM support - End */ ++ + int __init br_fdb_init(void) + { + br_fdb_cache = kmem_cache_create("bridge_fdb_cache", +@@ -188,7 +217,26 @@ static void fdb_notify(struct net_bridge + + br_offload_fdb_update(fdb); + +- if (swdev_notify) ++ /* QCA NSS ECM support - Start */ ++ if (fdb->dst) { ++ int event; ++ struct br_fdb_event fdb_event; ++ ++ if (type == RTM_NEWNEIGH) ++ event = BR_FDB_EVENT_ADD; ++ else ++ event = BR_FDB_EVENT_DEL; ++ ++ fdb_event.dev = fdb->dst->dev; ++ ether_addr_copy(fdb_event.addr, fdb->key.addr.addr); ++ fdb_event.is_local = test_bit(BR_FDB_LOCAL, &fdb->flags); ++ atomic_notifier_call_chain(&br_fdb_notifier_list, ++ event, ++ (void *)&fdb_event); ++ } ++ /* QCA NSS ECM support - End */ ++ ++ if (swdev_notify) + br_switchdev_fdb_notify(br, fdb, type); + + skb = nlmsg_new(fdb_nlmsg_size(), GFP_ATOMIC); +@@ -525,6 +573,7 @@ void br_fdb_cleanup(struct work_struct * + unsigned long delay = hold_time(br); + unsigned long work_delay = delay; + unsigned long now = jiffies; ++ u8 mac_addr[6]; /* QCA NSS ECM support */ + + /* this part is tricky, in order to avoid blocking learning and + * consequently forwarding, we rely on rcu to delete objects with +@@ -551,8 +600,15 @@ void br_fdb_cleanup(struct work_struct * + work_delay = min(work_delay, this_timer - now); + } else { + spin_lock_bh(&br->hash_lock); +- if (!hlist_unhashed(&f->fdb_node)) ++ if (!hlist_unhashed(&f->fdb_node)) { ++ ether_addr_copy(mac_addr, f->key.addr.addr); + fdb_delete(br, f, true); ++ /* QCA NSS ECM support - Start */ ++ atomic_notifier_call_chain( ++ &br_fdb_update_notifier_list, 0, ++ (void *)mac_addr); ++ /* QCA NSS ECM support - End */ ++ } + spin_unlock_bh(&br->hash_lock); + } + } +@@ -884,6 +940,12 @@ void br_fdb_update(struct net_bridge *br + &fdb->flags))) + clear_bit(BR_FDB_ADDED_BY_EXT_LEARN, + &fdb->flags); ++ ++ /* QCA NSS ECM support - Start */ ++ atomic_notifier_call_chain( ++ &br_fdb_update_notifier_list, ++ 0, (void *)addr); ++ /* QCA NSS ECM support - End */ + } + + if (unlikely(test_bit(BR_FDB_ADDED_BY_USER, &flags))) +@@ -1471,3 +1533,62 @@ void br_fdb_clear_offload(const struct n + spin_unlock_bh(&p->br->hash_lock); + } + EXPORT_SYMBOL_GPL(br_fdb_clear_offload); ++ ++/* QCA NSS ECM support - Start */ ++/* Refresh FDB entries for bridge packets being forwarded by offload engines */ ++void br_refresh_fdb_entry(struct net_device *dev, const char *addr) ++{ ++ struct net_bridge_port *p = br_port_get_rcu(dev); ++ ++ if (!p || p->state == BR_STATE_DISABLED) ++ return; ++ ++ if (!is_valid_ether_addr(addr)) { ++ pr_info("bridge: Attempt to refresh with invalid ether address %pM\n", ++ addr); ++ return; ++ } ++ ++ rcu_read_lock(); ++ br_fdb_update(p->br, p, addr, 0, true); ++ rcu_read_unlock(); ++} ++EXPORT_SYMBOL_GPL(br_refresh_fdb_entry); ++ ++/* Update timestamp of FDB entries for bridge packets being forwarded by offload engines */ ++void br_fdb_entry_refresh(struct net_device *dev, const char *addr, __u16 vid) ++{ ++ struct net_bridge_fdb_entry *fdb; ++ struct net_bridge_port *p = br_port_get_rcu(dev); ++ ++ if (!p || p->state == BR_STATE_DISABLED) ++ return; ++ ++ rcu_read_lock(); ++ fdb = fdb_find_rcu(&p->br->fdb_hash_tbl, addr, vid); ++ if (likely(fdb)) { ++ fdb->updated = jiffies; ++ } ++ rcu_read_unlock(); ++} ++EXPORT_SYMBOL_GPL(br_fdb_entry_refresh); ++ ++/* Look up the MAC address in the device's bridge fdb table */ ++struct net_bridge_fdb_entry *br_fdb_has_entry(struct net_device *dev, ++ const char *addr, __u16 vid) ++{ ++ struct net_bridge_port *p = br_port_get_rcu(dev); ++ struct net_bridge_fdb_entry *fdb; ++ ++ if (!p || p->state == BR_STATE_DISABLED) ++ return NULL; ++ ++ rcu_read_lock(); ++ fdb = fdb_find_rcu(&p->br->fdb_hash_tbl, addr, vid); ++ rcu_read_unlock(); ++ ++ return fdb; ++} ++EXPORT_SYMBOL_GPL(br_fdb_has_entry); ++/* QCA NSS ECM support - End */ ++ +--- a/net/bridge/br_if.c ++++ b/net/bridge/br_if.c +@@ -27,6 +27,12 @@ + #include "br_private.h" + #include "br_private_offload.h" + ++/* QCA NSS ECM support - Start */ ++/* Hook for external forwarding logic */ ++br_port_dev_get_hook_t __rcu *br_port_dev_get_hook __read_mostly; ++EXPORT_SYMBOL_GPL(br_port_dev_get_hook); ++/* QCA NSS ECM support - End */ ++ + /* + * Determine initial path cost based on speed. + * using recommendations from 802.1d standard +@@ -698,6 +704,8 @@ int br_add_if(struct net_bridge *br, str + + kobject_uevent(&p->kobj, KOBJ_ADD); + ++ call_netdevice_notifiers(NETDEV_BR_JOIN, dev); /* QCA NSS ECM support */ ++ + return 0; + + err6: +@@ -733,6 +741,8 @@ int br_del_if(struct net_bridge *br, str + if (!p || p->br != br) + return -EINVAL; + ++ call_netdevice_notifiers(NETDEV_BR_LEAVE, dev); /* QCA NSS ECM support */ ++ + /* Since more than one interface can be attached to a bridge, + * there still maybe an alternate path for netconsole to use; + * therefore there is no reason for a NETDEV_RELEASE event. +@@ -801,3 +811,96 @@ bool br_port_flag_is_set(const struct ne + return p->flags & flag; + } + EXPORT_SYMBOL_GPL(br_port_flag_is_set); ++ ++/* QCA NSS ECM support - Start */ ++/* API to know if hairpin feature is enabled/disabled on this bridge port */ ++bool br_is_hairpin_enabled(struct net_device *dev) ++{ ++ struct net_bridge_port *port = br_port_get_check_rcu(dev); ++ ++ if (likely(port)) ++ return port->flags & BR_HAIRPIN_MODE; ++ return false; ++} ++EXPORT_SYMBOL_GPL(br_is_hairpin_enabled); ++ ++/* br_port_dev_get() ++ * If a skb is provided, and the br_port_dev_get_hook_t hook exists, ++ * use that to try and determine the egress port for that skb. ++ * If not, or no egress port could be determined, use the given addr ++ * to identify the port to which it is reachable, ++ * returing a reference to the net device associated with that port. ++ * ++ * NOTE: Return NULL if given dev is not a bridge or the mac has no ++ * associated port. ++ */ ++struct net_device *br_port_dev_get(struct net_device *dev, unsigned char *addr, ++ struct sk_buff *skb, ++ unsigned int cookie) ++{ ++ struct net_bridge_fdb_entry *fdbe; ++ struct net_bridge *br; ++ struct net_device *netdev = NULL; ++ ++ /* Is this a bridge? */ ++ if (!(dev->priv_flags & IFF_EBRIDGE)) ++ return NULL; ++ ++ rcu_read_lock(); ++ ++ /* If the hook exists and the skb isn't NULL, try and get the port */ ++ if (skb) { ++ br_port_dev_get_hook_t *port_dev_get_hook; ++ ++ port_dev_get_hook = rcu_dereference(br_port_dev_get_hook); ++ if (port_dev_get_hook) { ++ struct net_bridge_port *pdst = ++ __br_get(port_dev_get_hook, NULL, dev, skb, ++ addr, cookie); ++ if (pdst) { ++ dev_hold(pdst->dev); ++ netdev = pdst->dev; ++ goto out; ++ } ++ } ++ } ++ ++ /* Either there is no hook, or can't ++ * determine the port to use - fall back to using FDB ++ */ ++ ++ br = netdev_priv(dev); ++ ++ /* Lookup the fdb entry and get reference to the port dev */ ++ fdbe = br_fdb_find_rcu(br, addr, 0); ++ if (fdbe && fdbe->dst) { ++ netdev = fdbe->dst->dev; /* port device */ ++ dev_hold(netdev); ++ } ++out: ++ rcu_read_unlock(); ++ return netdev; ++} ++EXPORT_SYMBOL_GPL(br_port_dev_get); ++ ++/* Update bridge statistics for bridge packets processed by offload engines */ ++/* void br_dev_update_stats(struct net_device *dev, ++ struct rtnl_link_stats64 *nlstats) ++{ ++ struct pcpu_sw_netstats *tstats; ++ ++ // Is this a bridge? ++ if (!(dev->priv_flags & IFF_EBRIDGE)) ++ return; ++ ++ tstats = this_cpu_ptr(dev->tstats); ++ ++ u64_stats_update_begin(&tstats->syncp); ++ u64_stats_add(&tstats->rx_packets, nlstats->rx_packets); ++ u64_stats_add(&tstats->rx_bytes, nlstats->rx_bytes); ++ u64_stats_add(&tstats->tx_packets, nlstats->tx_packets); ++ u64_stats_add(&tstats->tx_bytes, nlstats->tx_bytes); ++ u64_stats_update_end(&tstats->syncp); ++} ++EXPORT_SYMBOL_GPL(br_dev_update_stats); */ ++/* QCA NSS ECM support - End */ +--- a/net/core/neighbour.c ++++ b/net/core/neighbour.c +@@ -1275,6 +1275,22 @@ static void neigh_update_hhs(struct neig + } + } + ++/* QCA NSS ECM support - Start */ ++ATOMIC_NOTIFIER_HEAD(neigh_mac_update_notifier_list); ++ ++void neigh_mac_update_register_notify(struct notifier_block *nb) ++{ ++ atomic_notifier_chain_register(&neigh_mac_update_notifier_list, nb); ++} ++EXPORT_SYMBOL_GPL(neigh_mac_update_register_notify); ++ ++void neigh_mac_update_unregister_notify(struct notifier_block *nb) ++{ ++ atomic_notifier_chain_unregister(&neigh_mac_update_notifier_list, nb); ++} ++EXPORT_SYMBOL_GPL(neigh_mac_update_unregister_notify); ++/* QCA NSS ECM support - End */ ++ + /* Generic update routine. + -- lladdr is new lladdr or NULL, if it is not supplied. + -- new is new state. +@@ -1303,6 +1319,7 @@ static int __neigh_update(struct neighbo + struct net_device *dev; + int err, notify = 0; + u8 old; ++ struct neigh_mac_update nmu; /* QCA NSS ECM support */ + + trace_neigh_update(neigh, lladdr, new, flags, nlmsg_pid); + +@@ -1317,6 +1334,9 @@ static int __neigh_update(struct neighbo + new = old; + goto out; + } ++ ++ memset(&nmu, 0, sizeof(struct neigh_mac_update)); /* QCA NSS ECM support */ ++ + if (!(flags & NEIGH_UPDATE_F_ADMIN) && + (old & (NUD_NOARP | NUD_PERMANENT))) + goto out; +@@ -1354,6 +1374,11 @@ static int __neigh_update(struct neighbo + - compare new & old + - if they are different, check override flag + */ ++ /* QCA NSS ECM update - Start */ ++ memcpy(nmu.old_mac, neigh->ha, dev->addr_len); ++ memcpy(nmu.update_mac, lladdr, dev->addr_len); ++ /* QCA NSS ECM update - End */ ++ + if ((old & NUD_VALID) && + !memcmp(lladdr, neigh->ha, dev->addr_len)) + lladdr = neigh->ha; +@@ -1476,8 +1501,11 @@ out: + neigh_update_gc_list(neigh); + if (managed_update) + neigh_update_managed_list(neigh); +- if (notify) ++ if (notify) { + neigh_update_notify(neigh, nlmsg_pid); ++ atomic_notifier_call_chain(&neigh_mac_update_notifier_list, 0, ++ (struct neigh_mac_update *)&nmu); /* QCA NSS ECM support */ ++ } + trace_neigh_update_done(neigh, err); + return err; + } +--- a/net/ipv4/fib_trie.c ++++ b/net/ipv4/fib_trie.c +@@ -1211,6 +1211,9 @@ static bool fib_valid_key_len(u32 key, u + static void fib_remove_alias(struct trie *t, struct key_vector *tp, + struct key_vector *l, struct fib_alias *old); + ++/* Define route change notification chain. */ ++static BLOCKING_NOTIFIER_HEAD(iproute_chain); /* QCA NSS ECM support */ ++ + /* Caller must hold RTNL. */ + int fib_table_insert(struct net *net, struct fib_table *tb, + struct fib_config *cfg, struct netlink_ext_ack *extack) +@@ -1404,6 +1407,9 @@ int fib_table_insert(struct net *net, st + rtmsg_fib(RTM_NEWROUTE, htonl(key), new_fa, plen, new_fa->tb_id, + &cfg->fc_nlinfo, nlflags); + succeeded: ++ blocking_notifier_call_chain(&iproute_chain, ++ RTM_NEWROUTE, fi); ++ + return 0; + + out_remove_new_fa: +@@ -1775,6 +1781,9 @@ int fib_table_delete(struct net *net, st + if (fa_to_delete->fa_state & FA_S_ACCESSED) + rt_cache_flush(cfg->fc_nlinfo.nl_net); + ++ blocking_notifier_call_chain(&iproute_chain, ++ RTM_DELROUTE, fa_to_delete->fa_info); ++ + fib_release_info(fa_to_delete->fa_info); + alias_free_mem_rcu(fa_to_delete); + return 0; +@@ -2407,6 +2416,20 @@ void __init fib_trie_init(void) + 0, SLAB_PANIC | SLAB_ACCOUNT, NULL); + } + ++/* QCA NSS ECM support - Start */ ++int ip_rt_register_notifier(struct notifier_block *nb) ++{ ++ return blocking_notifier_chain_register(&iproute_chain, nb); ++} ++EXPORT_SYMBOL(ip_rt_register_notifier); ++ ++int ip_rt_unregister_notifier(struct notifier_block *nb) ++{ ++ return blocking_notifier_chain_unregister(&iproute_chain, nb); ++} ++EXPORT_SYMBOL(ip_rt_unregister_notifier); ++/* QCA NSS ECM support - End */ ++ + struct fib_table *fib_trie_table(u32 id, struct fib_table *alias) + { + struct fib_table *tb; +--- a/net/ipv6/ndisc.c ++++ b/net/ipv6/ndisc.c +@@ -666,6 +666,7 @@ void ndisc_send_ns(struct net_device *de + if (skb) + ndisc_send_skb(skb, daddr, saddr); + } ++EXPORT_SYMBOL(ndisc_send_ns); + + void ndisc_send_rs(struct net_device *dev, const struct in6_addr *saddr, + const struct in6_addr *daddr) +--- a/net/ipv6/route.c ++++ b/net/ipv6/route.c +@@ -3856,6 +3856,9 @@ out_free: + return ERR_PTR(err); + } + ++/* Define route change notification chain. */ ++ATOMIC_NOTIFIER_HEAD(ip6route_chain); /* QCA NSS ECM support */ ++ + int ip6_route_add(struct fib6_config *cfg, gfp_t gfp_flags, + struct netlink_ext_ack *extack) + { +@@ -3867,6 +3870,10 @@ int ip6_route_add(struct fib6_config *cf + return PTR_ERR(rt); + + err = __ip6_ins_rt(rt, &cfg->fc_nlinfo, extack); ++ if (!err) ++ atomic_notifier_call_chain(&ip6route_chain, ++ RTM_NEWROUTE, rt); ++ + fib6_info_release(rt); + + return err; +@@ -3888,6 +3895,9 @@ static int __ip6_del_rt(struct fib6_info + err = fib6_del(rt, info); + spin_unlock_bh(&table->tb6_lock); + ++ if (!err) ++ atomic_notifier_call_chain(&ip6route_chain, ++ RTM_DELROUTE, rt); + out: + fib6_info_release(rt); + return err; +@@ -6337,6 +6347,20 @@ static int ip6_route_dev_notify(struct n + return NOTIFY_OK; + } + ++/* QCA NSS ECM support - Start */ ++int rt6_register_notifier(struct notifier_block *nb) ++{ ++ return atomic_notifier_chain_register(&ip6route_chain, nb); ++} ++EXPORT_SYMBOL(rt6_register_notifier); ++ ++int rt6_unregister_notifier(struct notifier_block *nb) ++{ ++ return atomic_notifier_chain_unregister(&ip6route_chain, nb); ++} ++EXPORT_SYMBOL(rt6_unregister_notifier); ++/* QCA NSS ECM support - End */ ++ + /* + * /proc + */ +--- a/net/core/dev.c ++++ b/net/core/dev.c +@@ -1654,6 +1654,7 @@ const char *netdev_cmd_to_name(enum netd + N(SVLAN_FILTER_PUSH_INFO) N(SVLAN_FILTER_DROP_INFO) + N(PRE_CHANGEADDR) N(OFFLOAD_XSTATS_ENABLE) N(OFFLOAD_XSTATS_DISABLE) + N(OFFLOAD_XSTATS_REPORT_USED) N(OFFLOAD_XSTATS_REPORT_DELTA) ++ N(BR_JOIN) N(BR_LEAVE) + } + #undef N + return "UNKNOWN_NETDEV_EVENT"; +--- a/net/ipv6/addrconf.c ++++ b/net/ipv6/addrconf.c +@@ -1002,6 +1002,7 @@ void inet6_ifa_finish_destroy(struct ine + + kfree_rcu(ifp, rcu); + } ++EXPORT_SYMBOL(inet6_ifa_finish_destroy); + + static void + ipv6_link_dev_addr(struct inet6_dev *idev, struct inet6_ifaddr *ifp) +@@ -2061,6 +2062,36 @@ struct inet6_ifaddr *ipv6_get_ifaddr(str + + return result; + } ++EXPORT_SYMBOL(ipv6_get_ifaddr); ++ ++/* ipv6_dev_find_and_hold() ++ * Find (and hold) net device that has the given address. ++ * Or NULL on failure. ++ */ ++struct net_device *ipv6_dev_find_and_hold(struct net *net, struct in6_addr *addr, ++ int strict) ++{ ++ struct inet6_ifaddr *ifp; ++ struct net_device *dev; ++ ++ ifp = ipv6_get_ifaddr(net, addr, NULL, strict); ++ if (!ifp) ++ return NULL; ++ ++ if (!ifp->idev) { ++ in6_ifa_put(ifp); ++ return NULL; ++ } ++ ++ dev = ifp->idev->dev; ++ if (dev) ++ dev_hold(dev); ++ ++ in6_ifa_put(ifp); ++ ++ return dev; ++} ++EXPORT_SYMBOL(ipv6_dev_find_and_hold); + + /* Gets referenced address, destroys ifaddr */ + +--- a/include/net/vxlan.h ++++ b/include/net/vxlan.h +@@ -432,6 +432,15 @@ static inline __be32 vxlan_compute_rco(u + return vni_field; + } + ++/* ++ * vxlan_get_vni() ++ * Returns the vni corresponding to tunnel ++ */ ++static inline u32 vxlan_get_vni(struct vxlan_dev *vxlan_tun) ++{ ++ return be32_to_cpu(vxlan_tun->cfg.vni); ++} ++ + static inline unsigned short vxlan_get_sk_family(struct vxlan_sock *vs) + { + return vs->sock->sk->sk_family; diff --git a/target/linux/qualcommax/patches-6.1/0600-2-qca-nss-ecm-support-PPPOE-offload.patch b/target/linux/qualcommax/patches-6.1/0600-2-qca-nss-ecm-support-PPPOE-offload.patch new file mode 100644 index 000000000..505b71382 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0600-2-qca-nss-ecm-support-PPPOE-offload.patch @@ -0,0 +1,588 @@ +--- a/drivers/net/ppp/ppp_generic.c ++++ b/drivers/net/ppp/ppp_generic.c +@@ -48,6 +48,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -254,6 +255,25 @@ struct ppp_net { + #define seq_before(a, b) ((s32)((a) - (b)) < 0) + #define seq_after(a, b) ((s32)((a) - (b)) > 0) + ++ ++/* ++ * Registration/Unregistration methods ++ * for PPP channel connect and disconnect event notifications. ++ */ ++RAW_NOTIFIER_HEAD(ppp_channel_connection_notifier_list); ++ ++void ppp_channel_connection_register_notify(struct notifier_block *nb) ++{ ++ raw_notifier_chain_register(&ppp_channel_connection_notifier_list, nb); ++} ++EXPORT_SYMBOL_GPL(ppp_channel_connection_register_notify); ++ ++void ppp_channel_connection_unregister_notify(struct notifier_block *nb) ++{ ++ raw_notifier_chain_unregister(&ppp_channel_connection_notifier_list, nb); ++} ++EXPORT_SYMBOL_GPL(ppp_channel_connection_unregister_notify); ++ + /* Prototypes. */ + static int ppp_unattached_ioctl(struct net *net, struct ppp_file *pf, + struct file *file, unsigned int cmd, unsigned long arg); +@@ -3453,7 +3473,10 @@ ppp_connect_channel(struct channel *pch, + struct ppp_net *pn; + int ret = -ENXIO; + int hdrlen; ++ int ppp_proto; ++ int version; + ++ int notify = 0; + pn = ppp_pernet(pch->chan_net); + + mutex_lock(&pn->all_ppp_mutex); +@@ -3485,13 +3508,40 @@ ppp_connect_channel(struct channel *pch, + ++ppp->n_channels; + pch->ppp = ppp; + refcount_inc(&ppp->file.refcnt); ++ ++ /* Set the netdev priv flag if the prototype ++ * is L2TP or PPTP. Return success in all cases ++ */ ++ if (!pch->chan) ++ goto out2; ++ ++ ppp_proto = ppp_channel_get_protocol(pch->chan); ++ if (ppp_proto == PX_PROTO_PPTP) { ++ ppp->dev->priv_flags_ext |= IFF_EXT_PPP_PPTP; ++ } else if (ppp_proto == PX_PROTO_OL2TP) { ++ version = ppp_channel_get_proto_version(pch->chan); ++ if (version == 2) ++ ppp->dev->priv_flags_ext |= IFF_EXT_PPP_L2TPV2; ++ else if (version == 3) ++ ppp->dev->priv_flags_ext |= IFF_EXT_PPP_L2TPV3; ++ } ++ notify = 1; ++ ++ out2: + ppp_unlock(ppp); + ret = 0; +- + outl: + write_unlock_bh(&pch->upl); + out: + mutex_unlock(&pn->all_ppp_mutex); ++ ++ if (notify && ppp && ppp->dev) { ++ dev_hold(ppp->dev); ++ raw_notifier_call_chain(&ppp_channel_connection_notifier_list, ++ PPP_CHANNEL_CONNECT, ppp->dev); ++ dev_put(ppp->dev); ++ } ++ + return ret; + } + +@@ -3509,6 +3559,13 @@ ppp_disconnect_channel(struct channel *p + pch->ppp = NULL; + write_unlock_bh(&pch->upl); + if (ppp) { ++ if (ppp->dev) { ++ dev_hold(ppp->dev); ++ raw_notifier_call_chain(&ppp_channel_connection_notifier_list, ++ PPP_CHANNEL_DISCONNECT, ppp->dev); ++ dev_put(ppp->dev); ++ } ++ + /* remove it from the ppp unit's list */ + ppp_lock(ppp); + list_del(&pch->clist); +@@ -3588,6 +3645,222 @@ static void *unit_find(struct idr *p, in + return idr_find(p, n); + } + ++/* Updates the PPP interface statistics. */ ++void ppp_update_stats(struct net_device *dev, unsigned long rx_packets, ++ unsigned long rx_bytes, unsigned long tx_packets, ++ unsigned long tx_bytes, unsigned long rx_errors, ++ unsigned long tx_errors, unsigned long rx_dropped, ++ unsigned long tx_dropped) ++{ ++ struct ppp *ppp; ++ ++ if (!dev) ++ return; ++ ++ if (dev->type != ARPHRD_PPP) ++ return; ++ ++ ppp = netdev_priv(dev); ++ ++ ppp_xmit_lock(ppp); ++ ppp->stats64.tx_packets += tx_packets; ++ ppp->stats64.tx_bytes += tx_bytes; ++ ppp->dev->stats.tx_errors += tx_errors; ++ ppp->dev->stats.tx_dropped += tx_dropped; ++ if (tx_packets) ++ ppp->last_xmit = jiffies; ++ ppp_xmit_unlock(ppp); ++ ++ ppp_recv_lock(ppp); ++ ppp->stats64.rx_packets += rx_packets; ++ ppp->stats64.rx_bytes += rx_bytes; ++ ppp->dev->stats.rx_errors += rx_errors; ++ ppp->dev->stats.rx_dropped += rx_dropped; ++ if (rx_packets) ++ ppp->last_recv = jiffies; ++ ppp_recv_unlock(ppp); ++} ++ ++/* Returns >0 if the device is a multilink PPP netdevice, 0 if not or < 0 if ++ * the device is not PPP. ++ */ ++int ppp_is_multilink(struct net_device *dev) ++{ ++ struct ppp *ppp; ++ unsigned int flags; ++ ++ if (!dev) ++ return -1; ++ ++ if (dev->type != ARPHRD_PPP) ++ return -1; ++ ++ ppp = netdev_priv(dev); ++ ppp_lock(ppp); ++ flags = ppp->flags; ++ ppp_unlock(ppp); ++ ++ if (flags & SC_MULTILINK) ++ return 1; ++ ++ return 0; ++} ++EXPORT_SYMBOL(ppp_is_multilink); ++ ++/* ppp_channel_get_protocol() ++ * Call this to obtain the underlying protocol of the PPP channel, ++ * e.g. PX_PROTO_OE ++ * ++ * NOTE: Some channels do not use PX sockets so the protocol value may be very ++ * different for them. ++ * NOTE: -1 indicates failure. ++ * NOTE: Once you know the channel protocol you may then either cast 'chan' to ++ * its sub-class or use the channel protocol specific API's as provided by that ++ * channel sub type. ++ */ ++int ppp_channel_get_protocol(struct ppp_channel *chan) ++{ ++ if (!chan->ops->get_channel_protocol) ++ return -1; ++ ++ return chan->ops->get_channel_protocol(chan); ++} ++EXPORT_SYMBOL(ppp_channel_get_protocol); ++ ++/* ppp_channel_get_proto_version() ++ * Call this to get channel protocol version ++ */ ++int ppp_channel_get_proto_version(struct ppp_channel *chan) ++{ ++ if (!chan->ops->get_channel_protocol_ver) ++ return -1; ++ ++ return chan->ops->get_channel_protocol_ver(chan); ++} ++EXPORT_SYMBOL(ppp_channel_get_proto_version); ++ ++/* ppp_channel_hold() ++ * Call this to hold a channel. ++ * ++ * Returns true on success or false if the hold could not happen. ++ * ++ * NOTE: chan must be protected against destruction during this call - ++ * either by correct locking etc. or because you already have an implicit ++ * or explicit hold to the channel already and this is an additional hold. ++ */ ++bool ppp_channel_hold(struct ppp_channel *chan) ++{ ++ if (!chan->ops->hold) ++ return false; ++ ++ chan->ops->hold(chan); ++ return true; ++} ++EXPORT_SYMBOL(ppp_channel_hold); ++ ++/* ppp_channel_release() ++ * Call this to release a hold you have upon a channel ++ */ ++void ppp_channel_release(struct ppp_channel *chan) ++{ ++ chan->ops->release(chan); ++} ++EXPORT_SYMBOL(ppp_channel_release); ++ ++/* Check if ppp xmit lock is on hold */ ++bool ppp_is_xmit_locked(struct net_device *dev) ++{ ++ struct ppp *ppp; ++ ++ if (!dev) ++ return false; ++ ++ if (dev->type != ARPHRD_PPP) ++ return false; ++ ++ ppp = netdev_priv(dev); ++ if (!ppp) ++ return false; ++ ++ if (spin_is_locked(&(ppp)->wlock)) ++ return true; ++ ++ return false; ++} ++EXPORT_SYMBOL(ppp_is_xmit_locked); ++ ++/* ppp_hold_channels() ++ * Returns the PPP channels of the PPP device, storing each one into ++ * channels[]. ++ * ++ * channels[] has chan_sz elements. ++ * This function returns the number of channels stored, up to chan_sz. ++ * It will return < 0 if the device is not PPP. ++ * ++ * You MUST release the channels using ppp_release_channels(). ++ */ ++int ppp_hold_channels(struct net_device *dev, struct ppp_channel *channels[], ++ unsigned int chan_sz) ++{ ++ struct ppp *ppp; ++ int c; ++ struct channel *pch; ++ ++ if (!dev) ++ return -1; ++ ++ if (dev->type != ARPHRD_PPP) ++ return -1; ++ ++ ppp = netdev_priv(dev); ++ ++ c = 0; ++ ppp_lock(ppp); ++ list_for_each_entry(pch, &ppp->channels, clist) { ++ struct ppp_channel *chan; ++ ++ if (!pch->chan) { ++ /* Channel is going / gone away */ ++ continue; ++ } ++ ++ if (c == chan_sz) { ++ /* No space to record channel */ ++ ppp_unlock(ppp); ++ return c; ++ } ++ ++ /* Hold the channel, if supported */ ++ chan = pch->chan; ++ if (!chan->ops->hold) ++ continue; ++ ++ chan->ops->hold(chan); ++ ++ /* Record the channel */ ++ channels[c++] = chan; ++ } ++ ppp_unlock(ppp); ++ return c; ++} ++EXPORT_SYMBOL(ppp_hold_channels); ++ ++/* ppp_release_channels() ++ * Releases channels ++ */ ++void ppp_release_channels(struct ppp_channel *channels[], unsigned int chan_sz) ++{ ++ unsigned int c; ++ ++ for (c = 0; c < chan_sz; ++c) { ++ struct ppp_channel *chan; ++ ++ chan = channels[c]; ++ chan->ops->release(chan); ++ } ++} ++EXPORT_SYMBOL(ppp_release_channels); ++ + /* Module/initialization stuff */ + + module_init(ppp_init); +@@ -3604,6 +3877,7 @@ EXPORT_SYMBOL(ppp_input_error); + EXPORT_SYMBOL(ppp_output_wakeup); + EXPORT_SYMBOL(ppp_register_compressor); + EXPORT_SYMBOL(ppp_unregister_compressor); ++EXPORT_SYMBOL(ppp_update_stats); + MODULE_LICENSE("GPL"); + MODULE_ALIAS_CHARDEV(PPP_MAJOR, 0); + MODULE_ALIAS_RTNL_LINK("ppp"); +--- a/drivers/net/ppp/pppoe.c ++++ b/drivers/net/ppp/pppoe.c +@@ -62,6 +62,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -87,7 +88,7 @@ + static int __pppoe_xmit(struct sock *sk, struct sk_buff *skb); + + static const struct proto_ops pppoe_ops; +-static const struct ppp_channel_ops pppoe_chan_ops; ++static const struct pppoe_channel_ops pppoe_chan_ops; + + /* per-net private data for this module */ + static unsigned int pppoe_net_id __read_mostly; +@@ -692,7 +693,7 @@ static int pppoe_connect(struct socket * + + po->chan.mtu = dev->mtu - sizeof(struct pppoe_hdr) - 2; + po->chan.private = sk; +- po->chan.ops = &pppoe_chan_ops; ++ po->chan.ops = (struct ppp_channel_ops *)&pppoe_chan_ops; + + error = ppp_register_net_channel(dev_net(dev), &po->chan); + if (error) { +@@ -995,9 +996,80 @@ static int pppoe_fill_forward_path(struc + return 0; + } + +-static const struct ppp_channel_ops pppoe_chan_ops = { +- .start_xmit = pppoe_xmit, +- .fill_forward_path = pppoe_fill_forward_path, ++/************************************************************************ ++ * ++ * function called by generic PPP driver to hold channel ++ * ++ ***********************************************************************/ ++static void pppoe_hold_chan(struct ppp_channel *chan) ++{ ++ struct sock *sk = (struct sock *)chan->private; ++ ++ sock_hold(sk); ++} ++ ++/************************************************************************ ++ * ++ * function called by generic PPP driver to release channel ++ * ++ ***********************************************************************/ ++static void pppoe_release_chan(struct ppp_channel *chan) ++{ ++ struct sock *sk = (struct sock *)chan->private; ++ ++ sock_put(sk); ++} ++ ++/************************************************************************ ++ * ++ * function called to get the channel protocol type ++ * ++ ***********************************************************************/ ++static int pppoe_get_channel_protocol(struct ppp_channel *chan) ++{ ++ return PX_PROTO_OE; ++} ++ ++/************************************************************************ ++ * ++ * function called to get the PPPoE channel addressing ++ * NOTE: This function returns a HOLD to the netdevice ++ * ++ ***********************************************************************/ ++static int pppoe_get_addressing(struct ppp_channel *chan, ++ struct pppoe_opt *addressing) ++{ ++ struct sock *sk = (struct sock *)chan->private; ++ struct pppox_sock *po = pppox_sk(sk); ++ int err = 0; ++ ++ *addressing = po->proto.pppoe; ++ if (!addressing->dev) ++ return -ENODEV; ++ ++ dev_hold(addressing->dev); ++ return err; ++} ++ ++/* pppoe_channel_addressing_get() ++ * Return PPPoE channel specific addressing information. ++ */ ++int pppoe_channel_addressing_get(struct ppp_channel *chan, ++ struct pppoe_opt *addressing) ++{ ++ return pppoe_get_addressing(chan, addressing); ++} ++EXPORT_SYMBOL(pppoe_channel_addressing_get); ++ ++static const struct pppoe_channel_ops pppoe_chan_ops = { ++ /* PPPoE specific channel ops */ ++ .get_addressing = pppoe_get_addressing, ++ /* General ppp channel ops */ ++ .ops.start_xmit = pppoe_xmit, ++ .ops.get_channel_protocol = pppoe_get_channel_protocol, ++ .ops.hold = pppoe_hold_chan, ++ .ops.release = pppoe_release_chan, ++ .ops.fill_forward_path = pppoe_fill_forward_path, + }; + + static int pppoe_recvmsg(struct socket *sock, struct msghdr *m, +--- a/include/linux/if_pppox.h ++++ b/include/linux/if_pppox.h +@@ -91,4 +91,17 @@ enum { + PPPOX_DEAD = 16 /* dead, useless, please clean me up!*/ + }; + ++/* ++ * PPPoE Channel specific operations ++ */ ++struct pppoe_channel_ops { ++ /* Must be first - general to all PPP channels */ ++ struct ppp_channel_ops ops; ++ int (*get_addressing)(struct ppp_channel *, struct pppoe_opt *); ++}; ++ ++/* Return PPPoE channel specific addressing information */ ++extern int pppoe_channel_addressing_get(struct ppp_channel *chan, ++ struct pppoe_opt *addressing); ++ + #endif /* !(__LINUX_IF_PPPOX_H) */ +--- a/include/linux/netdevice.h ++++ b/include/linux/netdevice.h +@@ -1710,6 +1710,24 @@ enum netdev_priv_flags { + IFF_NO_IP_ALIGN = BIT_ULL(33), + }; + ++ ++/** ++ * enum netdev_priv_flags_ext - &struct net_device priv_flags_ext ++ * ++ * These flags are used to check for device type and can be ++ * set and used by the drivers ++ * ++ */ ++enum netdev_priv_flags_ext { ++ IFF_EXT_TUN_TAP = 1<<0, ++ IFF_EXT_PPP_L2TPV2 = 1<<1, ++ IFF_EXT_PPP_L2TPV3 = 1<<2, ++ IFF_EXT_PPP_PPTP = 1<<3, ++ IFF_EXT_GRE_V4_TAP = 1<<4, ++ IFF_EXT_GRE_V6_TAP = 1<<5, ++ IFF_EXT_IFB = 1<<6, ++}; ++ + #define IFF_802_1Q_VLAN IFF_802_1Q_VLAN + #define IFF_EBRIDGE IFF_EBRIDGE + #define IFF_BONDING IFF_BONDING +@@ -2053,6 +2071,7 @@ struct net_device { + /* Read-mostly cache-line for fast-path access */ + unsigned int flags; + unsigned long long priv_flags; ++ unsigned int priv_flags_ext; + const struct net_device_ops *netdev_ops; + int ifindex; + unsigned short gflags; +--- a/include/linux/ppp_channel.h ++++ b/include/linux/ppp_channel.h +@@ -19,6 +19,10 @@ + #include + #include + #include ++#include ++ ++#define PPP_CHANNEL_DISCONNECT 0 ++#define PPP_CHANNEL_CONNECT 1 + + struct net_device_path; + struct net_device_path_ctx; +@@ -30,9 +34,19 @@ struct ppp_channel_ops { + int (*start_xmit)(struct ppp_channel *, struct sk_buff *); + /* Handle an ioctl call that has come in via /dev/ppp. */ + int (*ioctl)(struct ppp_channel *, unsigned int, unsigned long); ++ /* Get channel protocol type, one of PX_PROTO_XYZ or specific to ++ * the channel subtype ++ */ ++ int (*get_channel_protocol)(struct ppp_channel *); ++ /* Get channel protocol version */ ++ int (*get_channel_protocol_ver)(struct ppp_channel *); ++ /* Hold the channel from being destroyed */ ++ void (*hold)(struct ppp_channel *); ++ /* Release hold on the channel */ ++ void (*release)(struct ppp_channel *); + int (*fill_forward_path)(struct net_device_path_ctx *, +- struct net_device_path *, +- const struct ppp_channel *); ++ struct net_device_path *, ++ const struct ppp_channel *); + }; + + struct ppp_channel { +@@ -76,6 +90,51 @@ extern int ppp_unit_number(struct ppp_ch + /* Get the device name associated with a channel, or NULL if none */ + extern char *ppp_dev_name(struct ppp_channel *); + ++/* Call this to obtain the underlying protocol of the PPP channel, ++ * e.g. PX_PROTO_OE ++ */ ++extern int ppp_channel_get_protocol(struct ppp_channel *); ++ ++/* Call this get protocol version */ ++extern int ppp_channel_get_proto_version(struct ppp_channel *); ++ ++/* Call this to hold a channel */ ++extern bool ppp_channel_hold(struct ppp_channel *); ++ ++/* Call this to release a hold you have upon a channel */ ++extern void ppp_channel_release(struct ppp_channel *); ++ ++/* Release hold on PPP channels */ ++extern void ppp_release_channels(struct ppp_channel *channels[], ++ unsigned int chan_sz); ++ ++/* Hold PPP channels for the PPP device */ ++extern int ppp_hold_channels(struct net_device *dev, ++ struct ppp_channel *channels[], ++ unsigned int chan_sz); ++ ++/* Test if ppp xmit lock is locked */ ++extern bool ppp_is_xmit_locked(struct net_device *dev); ++ ++/* Test if the ppp device is a multi-link ppp device */ ++extern int ppp_is_multilink(struct net_device *dev); ++ ++/* Register the PPP channel connect notifier */ ++extern void ppp_channel_connection_register_notify(struct notifier_block *nb); ++ ++/* Unregister the PPP channel connect notifier */ ++extern void ppp_channel_connection_unregister_notify(struct notifier_block *nb); ++ ++/* Update statistics of the PPP net_device by incrementing related ++ * statistics field value with corresponding parameter ++ */ ++extern void ppp_update_stats(struct net_device *dev, unsigned long rx_packets, ++ unsigned long rx_bytes, unsigned long tx_packets, ++ unsigned long tx_bytes, unsigned long rx_errors, ++ unsigned long tx_errors, unsigned long rx_dropped, ++ unsigned long tx_dropped); ++ ++ + /* + * SMP locking notes: + * The channel code must ensure that when it calls ppp_unregister_channel, diff --git a/target/linux/qualcommax/patches-6.1/0600-3-qca-nss-ecm-support-net-bonding.patch b/target/linux/qualcommax/patches-6.1/0600-3-qca-nss-ecm-support-net-bonding.patch new file mode 100644 index 000000000..982ac9d4f --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0600-3-qca-nss-ecm-support-net-bonding.patch @@ -0,0 +1,81 @@ +--- a/drivers/net/bonding/bond_main.c ++++ b/drivers/net/bonding/bond_main.c +@@ -252,6 +252,8 @@ static const struct flow_dissector_key f + }, + }; + ++static unsigned long bond_id_mask = 0xFFFFFFF0; /* QCA NSS ECM bonding support */ ++ + static struct flow_dissector flow_keys_bonding __read_mostly; + + /*-------------------------- Forward declarations ---------------------------*/ +@@ -4383,6 +4385,24 @@ static int bond_get_lowest_level_rcu(str + } + #endif + ++/* QCA NSS ECM bonding support */ ++int bond_get_id(struct net_device *bond_dev) ++{ ++ struct bonding *bond; ++ int bond_id = 0; ++ ++ if (!((bond_dev->priv_flags & IFF_BONDING) && ++ (bond_dev->flags & IFF_MASTER))) ++ return -EINVAL; ++ ++ bond = netdev_priv(bond_dev); ++ bond_id = bond->id; ++ ++ return bond_id; ++} ++EXPORT_SYMBOL(bond_get_id); ++/* QCA NSS ECM bonding support */ ++ + static void bond_get_stats(struct net_device *bond_dev, + struct rtnl_link_stats64 *stats) + { +@@ -5795,6 +5815,11 @@ static void bond_destructor(struct net_d + + if (bond->rr_tx_counter) + free_percpu(bond->rr_tx_counter); ++ ++ /* QCA NSS ECM bonding support */ ++ if (bond->id != (~0U)) ++ clear_bit(bond->id, &bond_id_mask); ++ /* QCA NSS ECM bonding support */ + } + + void bond_setup(struct net_device *bond_dev) +@@ -6358,6 +6383,14 @@ int bond_create(struct net *net, const c + + bond_work_init_all(bond); + ++ /* QCA NSS ECM bonding support - Start */ ++ bond->id = ~0U; ++ if (bond_id_mask != (~0UL)) { ++ bond->id = (u32)ffz(bond_id_mask); ++ set_bit(bond->id, &bond_id_mask); ++ } ++ /* QCA NSS ECM bonding support - End */ ++ + out: + rtnl_unlock(); + return res; +--- a/include/net/bonding.h ++++ b/include/net/bonding.h +@@ -265,6 +265,7 @@ struct bonding { + spinlock_t ipsec_lock; + #endif /* CONFIG_XFRM_OFFLOAD */ + struct bpf_prog *xdp_prog; ++ u32 id; /* QCA NSS ECM bonding support */ + }; + + #define bond_slave_get_rcu(dev) \ +@@ -658,6 +659,7 @@ struct bond_net { + + int bond_rcv_validate(const struct sk_buff *skb, struct bonding *bond, struct slave *slave); + netdev_tx_t bond_dev_queue_xmit(struct bonding *bond, struct sk_buff *skb, struct net_device *slave_dev); ++int bond_get_id(struct net_device *bond_dev); /* QCA NSS ECM bonding support */ + int bond_create(struct net *net, const char *name); + int bond_create_sysfs(struct bond_net *net); + void bond_destroy_sysfs(struct bond_net *net); diff --git a/target/linux/qualcommax/patches-6.1/0600-4-qca-nss-ecm-support-net-bonding-over-LAG.patch b/target/linux/qualcommax/patches-6.1/0600-4-qca-nss-ecm-support-net-bonding-over-LAG.patch new file mode 100644 index 000000000..6c289599d --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0600-4-qca-nss-ecm-support-net-bonding-over-LAG.patch @@ -0,0 +1,668 @@ +--- a/drivers/net/bonding/bond_3ad.c ++++ b/drivers/net/bonding/bond_3ad.c +@@ -114,7 +114,40 @@ static void ad_marker_info_received(stru + static void ad_marker_response_received(struct bond_marker *marker, + struct port *port); + static void ad_update_actor_keys(struct port *port, bool reset); ++/* QCA NSS ECM bonding support - Start */ ++struct bond_cb __rcu *bond_cb; + ++int bond_register_cb(struct bond_cb *cb) ++{ ++ struct bond_cb *lag_cb; ++ ++ lag_cb = kzalloc(sizeof(*lag_cb), GFP_ATOMIC | __GFP_NOWARN); ++ if (!lag_cb) { ++ return -1; ++ } ++ ++ memcpy((void *)lag_cb, (void *)cb, sizeof(*cb)); ++ ++ rcu_read_lock(); ++ rcu_assign_pointer(bond_cb, lag_cb); ++ rcu_read_unlock(); ++ return 0; ++} ++EXPORT_SYMBOL(bond_register_cb); ++ ++void bond_unregister_cb(void) ++{ ++ struct bond_cb *lag_cb_main; ++ ++ rcu_read_lock(); ++ lag_cb_main = rcu_dereference(bond_cb); ++ rcu_assign_pointer(bond_cb, NULL); ++ rcu_read_unlock(); ++ ++ kfree(lag_cb_main); ++} ++EXPORT_SYMBOL(bond_unregister_cb); ++/* QCA NSS ECM bonding support - End */ + + /* ================= api to bonding and kernel code ================== */ + +@@ -424,7 +457,6 @@ static u16 __ad_timer_to_ticks(u16 timer + return retval; + } + +- + /* ================= ad_rx_machine helper functions ================== */ + + /** +@@ -1064,7 +1096,30 @@ static void ad_mux_machine(struct port * + ad_disable_collecting_distributing(port, + update_slave_arr); + port->ntt = true; +- break; ++ ++ /* QCA NSS ECM bonding support - Start */ ++ /* Send a notificaton about change in state of this ++ * port. We only want to handle case where port moves ++ * from AD_MUX_COLLECTING_DISTRIBUTING -> ++ * AD_MUX_ATTACHED. ++ */ ++ if (bond_slave_is_up(port->slave) && ++ (last_state == AD_MUX_COLLECTING_DISTRIBUTING)) { ++ struct bond_cb *lag_cb_main; ++ ++ rcu_read_lock(); ++ lag_cb_main = rcu_dereference(bond_cb); ++ if (lag_cb_main && ++ lag_cb_main->bond_cb_link_down) { ++ struct net_device *dev; ++ ++ dev = port->slave->dev; ++ lag_cb_main->bond_cb_link_down(dev); ++ } ++ rcu_read_unlock(); ++ } ++ ++ break; /* QCA NSS ECM bonding support - End */ + case AD_MUX_COLLECTING_DISTRIBUTING: + port->actor_oper_port_state |= LACP_STATE_COLLECTING; + port->actor_oper_port_state |= LACP_STATE_DISTRIBUTING; +@@ -1908,6 +1963,7 @@ static void ad_enable_collecting_distrib + bool *update_slave_arr) + { + if (port->aggregator->is_active) { ++ struct bond_cb *lag_cb_main; /* QCA NSS ECM bonding support */ + slave_dbg(port->slave->bond->dev, port->slave->dev, + "Enabling port %d (LAG %d)\n", + port->actor_port_number, +@@ -1915,6 +1971,16 @@ static void ad_enable_collecting_distrib + __enable_port(port); + /* Slave array needs update */ + *update_slave_arr = true; ++ ++ /* QCA NSS ECM bonding support - Start */ ++ rcu_read_lock(); ++ lag_cb_main = rcu_dereference(bond_cb); ++ ++ if (lag_cb_main && lag_cb_main->bond_cb_link_up) ++ lag_cb_main->bond_cb_link_up(port->slave->dev); ++ ++ rcu_read_unlock(); ++ /* QCA NSS ECM bonding support - End */ + } + } + +@@ -2674,6 +2740,104 @@ int bond_3ad_get_active_agg_info(struct + return ret; + } + ++/* QCA NSS ECM bonding support - Start */ ++/* bond_3ad_get_tx_dev - Calculate egress interface for a given packet, ++ * for a LAG that is configured in 802.3AD mode ++ * @skb: pointer to skb to be egressed ++ * @src_mac: pointer to source L2 address ++ * @dst_mac: pointer to destination L2 address ++ * @src: pointer to source L3 address ++ * @dst: pointer to destination L3 address ++ * @protocol: L3 protocol id from L2 header ++ * @bond_dev: pointer to bond master device ++ * ++ * If @skb is NULL, bond_xmit_hash is used to calculate hash using L2/L3 ++ * addresses. ++ * ++ * Returns: Either valid slave device, or NULL otherwise ++ */ ++struct net_device *bond_3ad_get_tx_dev(struct sk_buff *skb, u8 *src_mac, ++ u8 *dst_mac, void *src, ++ void *dst, u16 protocol, ++ struct net_device *bond_dev, ++ __be16 *layer4hdr) ++{ ++ struct bonding *bond = netdev_priv(bond_dev); ++ struct aggregator *agg; ++ struct ad_info ad_info; ++ struct list_head *iter; ++ struct slave *slave; ++ struct slave *first_ok_slave = NULL; ++ u32 hash = 0; ++ int slaves_in_agg; ++ int slave_agg_no = 0; ++ int agg_id; ++ ++ if (__bond_3ad_get_active_agg_info(bond, &ad_info)) { ++ pr_debug("%s: Error: __bond_3ad_get_active_agg_info failed\n", ++ bond_dev->name); ++ return NULL; ++ } ++ ++ slaves_in_agg = ad_info.ports; ++ agg_id = ad_info.aggregator_id; ++ ++ if (slaves_in_agg == 0) { ++ pr_debug("%s: Error: active aggregator is empty\n", ++ bond_dev->name); ++ return NULL; ++ } ++ ++ if (skb) { ++ hash = bond_xmit_hash(bond, skb); ++ slave_agg_no = hash % slaves_in_agg; ++ } else { ++ if (bond->params.xmit_policy != BOND_XMIT_POLICY_LAYER23 && ++ bond->params.xmit_policy != BOND_XMIT_POLICY_LAYER2 && ++ bond->params.xmit_policy != BOND_XMIT_POLICY_LAYER34) { ++ pr_debug("%s: Error: Unsupported hash policy for 802.3AD fast path\n", ++ bond_dev->name); ++ return NULL; ++ } ++ ++ hash = bond_xmit_hash_without_skb(src_mac, dst_mac, ++ src, dst, protocol, ++ bond_dev, layer4hdr); ++ slave_agg_no = hash % slaves_in_agg; ++ } ++ ++ bond_for_each_slave_rcu(bond, slave, iter) { ++ agg = SLAVE_AD_INFO(slave)->port.aggregator; ++ if (!agg || agg->aggregator_identifier != agg_id) ++ continue; ++ ++ if (slave_agg_no >= 0) { ++ if (!first_ok_slave && bond_slave_can_tx(slave)) ++ first_ok_slave = slave; ++ slave_agg_no--; ++ continue; ++ } ++ ++ if (bond_slave_can_tx(slave)) ++ return slave->dev; ++ } ++ ++ if (slave_agg_no >= 0) { ++ pr_err("%s: Error: Couldn't find a slave to tx on for aggregator ID %d\n", ++ bond_dev->name, agg_id); ++ return NULL; ++ } ++ ++ /* we couldn't find any suitable slave after the agg_no, so use the ++ * first suitable found, if found. ++ */ ++ if (first_ok_slave) ++ return first_ok_slave->dev; ++ ++ return NULL; ++} ++/* QCA NSS ECM bonding support - End */ ++ + int bond_3ad_lacpdu_recv(const struct sk_buff *skb, struct bonding *bond, + struct slave *slave) + { +--- a/drivers/net/bonding/bond_main.c ++++ b/drivers/net/bonding/bond_main.c +@@ -1186,6 +1186,23 @@ void bond_change_active_slave(struct bon + if (BOND_MODE(bond) == BOND_MODE_8023AD) + bond_3ad_handle_link_change(new_active, BOND_LINK_UP); + ++ /* QCA NSS ECM bonding support - Start */ ++ if (bond->params.mode == BOND_MODE_XOR) { ++ struct bond_cb *lag_cb_main; ++ ++ rcu_read_lock(); ++ lag_cb_main = rcu_dereference(bond_cb); ++ if (lag_cb_main && ++ lag_cb_main->bond_cb_link_up) { ++ struct net_device *dev; ++ ++ dev = new_active->dev; ++ lag_cb_main->bond_cb_link_up(dev); ++ } ++ rcu_read_unlock(); ++ } ++ /* QCA NSS ECM bonding support - End */ ++ + if (bond_is_lb(bond)) + bond_alb_handle_link_change(bond, new_active, BOND_LINK_UP); + } else { +@@ -1809,6 +1826,7 @@ int bond_enslave(struct net_device *bond + const struct net_device_ops *slave_ops = slave_dev->netdev_ops; + struct slave *new_slave = NULL, *prev_slave; + struct sockaddr_storage ss; ++ struct bond_cb *lag_cb_main; /* QCA NSS ECM bonding support */ + int link_reporting; + int res = 0, i; + +@@ -2252,6 +2270,15 @@ int bond_enslave(struct net_device *bond + bond_is_active_slave(new_slave) ? "an active" : "a backup", + new_slave->link != BOND_LINK_DOWN ? "an up" : "a down"); + ++ /* QCA NSS ECM bonding support - Start */ ++ rcu_read_lock(); ++ lag_cb_main = rcu_dereference(bond_cb); ++ if (lag_cb_main && lag_cb_main->bond_cb_enslave) ++ lag_cb_main->bond_cb_enslave(slave_dev); ++ ++ rcu_read_unlock(); ++ /* QCA NSS ECM bonding support - End */ ++ + /* enslave is successful */ + bond_queue_slave_event(new_slave); + return 0; +@@ -2317,6 +2344,15 @@ err_undo_flags: + } + } + ++ /* QCA NSS ECM bonding support - Start */ ++ rcu_read_lock(); ++ lag_cb_main = rcu_dereference(bond_cb); ++ if (lag_cb_main && lag_cb_main->bond_cb_enslave) ++ lag_cb_main->bond_cb_enslave(slave_dev); ++ ++ rcu_read_unlock(); ++ /* QCA NSS ECM bonding support - End */ ++ + return res; + } + +@@ -2339,6 +2375,7 @@ static int __bond_release_one(struct net + struct slave *slave, *oldcurrent; + struct sockaddr_storage ss; + int old_flags = bond_dev->flags; ++ struct bond_cb *lag_cb_main; /* QCA NSS ECM bonding support */ + netdev_features_t old_features = bond_dev->features; + + /* slave is not a slave or master is not master of this slave */ +@@ -2360,6 +2397,15 @@ static int __bond_release_one(struct net + + bond_set_slave_inactive_flags(slave, BOND_SLAVE_NOTIFY_NOW); + ++ /* QCA NSS ECM bonding support - Start */ ++ rcu_read_lock(); ++ lag_cb_main = rcu_dereference(bond_cb); ++ if (lag_cb_main && lag_cb_main->bond_cb_release) ++ lag_cb_main->bond_cb_release(slave_dev); ++ ++ rcu_read_unlock(); ++ /* QCA NSS ECM bonding support - End */ ++ + bond_sysfs_slave_del(slave); + + /* recompute stats just before removing the slave */ +@@ -2679,6 +2725,8 @@ static void bond_miimon_commit(struct bo + struct slave *slave, *primary, *active; + bool do_failover = false; + struct list_head *iter; ++ struct net_device *slave_dev = NULL; /* QCA NSS ECM bonding support */ ++ struct bond_cb *lag_cb_main; /* QCA NSS ECM bonding support */ + + ASSERT_RTNL(); + +@@ -2718,6 +2766,12 @@ static void bond_miimon_commit(struct bo + bond_set_active_slave(slave); + } + ++ /* QCA NSS ECM bonding support - Start */ ++ if ((bond->params.mode == BOND_MODE_XOR) && ++ (!slave_dev)) ++ slave_dev = slave->dev; ++ /* QCA NSS ECM bonding support - End */ ++ + slave_info(bond->dev, slave->dev, "link status definitely up, %u Mbps %s duplex\n", + slave->speed == SPEED_UNKNOWN ? 0 : slave->speed, + slave->duplex ? "full" : "half"); +@@ -2766,6 +2820,16 @@ static void bond_miimon_commit(struct bo + unblock_netpoll_tx(); + } + ++ /* QCA NSS ECM bonding support - Start */ ++ rcu_read_lock(); ++ lag_cb_main = rcu_dereference(bond_cb); ++ ++ if (slave_dev && lag_cb_main && lag_cb_main->bond_cb_link_up) ++ lag_cb_main->bond_cb_link_up(slave_dev); ++ ++ rcu_read_unlock(); ++ /* QCA NSS ECM bonding support - End */ ++ + bond_set_carrier(bond); + } + +@@ -4013,9 +4077,220 @@ static inline u32 bond_eth_hash(struct s + return 0; + + ep = (struct ethhdr *)(data + mhoff); +- return ep->h_dest[5] ^ ep->h_source[5] ^ be16_to_cpu(ep->h_proto); ++ return ep->h_dest[5] ^ ep->h_source[5]; /* QCA NSS ECM bonding support */ + } + ++/* QCA NSS ECM bonding support - Start */ ++/* Extract the appropriate headers based on bond's xmit policy */ ++static bool bond_flow_dissect_without_skb(struct bonding *bond, ++ u8 *src_mac, u8 *dst_mac, ++ void *psrc, void *pdst, ++ u16 protocol, __be16 *layer4hdr, ++ struct flow_keys *fk) ++{ ++ u32 *src = NULL; ++ u32 *dst = NULL; ++ ++ fk->ports.ports = 0; ++ src = (uint32_t *)psrc; ++ dst = (uint32_t *)pdst; ++ ++ if (protocol == htons(ETH_P_IP)) { ++ /* V4 addresses and address type*/ ++ fk->addrs.v4addrs.src = src[0]; ++ fk->addrs.v4addrs.dst = dst[0]; ++ fk->control.addr_type = FLOW_DISSECTOR_KEY_IPV4_ADDRS; ++ } else if (protocol == htons(ETH_P_IPV6)) { ++ /* V6 addresses and address type*/ ++ memcpy(&fk->addrs.v6addrs.src, src, sizeof(struct in6_addr)); ++ memcpy(&fk->addrs.v6addrs.dst, dst, sizeof(struct in6_addr)); ++ fk->control.addr_type = FLOW_DISSECTOR_KEY_IPV6_ADDRS; ++ } else { ++ return false; ++ } ++ if ((bond->params.xmit_policy == BOND_XMIT_POLICY_LAYER34) && ++ (layer4hdr)) ++ fk->ports.ports = *layer4hdr; ++ ++ return true; ++} ++ ++/* bond_xmit_hash_without_skb - Applies load balancing algorithm for a packet, ++ * to calculate hash for a given set of L2/L3 addresses. Does not ++ * calculate egress interface. ++ */ ++uint32_t bond_xmit_hash_without_skb(u8 *src_mac, u8 *dst_mac, ++ void *psrc, void *pdst, u16 protocol, ++ struct net_device *bond_dev, ++ __be16 *layer4hdr) ++{ ++ struct bonding *bond = netdev_priv(bond_dev); ++ struct flow_keys flow; ++ u32 hash = 0; ++ ++ if (bond->params.xmit_policy == BOND_XMIT_POLICY_LAYER2 || ++ !bond_flow_dissect_without_skb(bond, src_mac, dst_mac, psrc, ++ pdst, protocol, layer4hdr, &flow)) ++ return (dst_mac[5] ^ src_mac[5]); ++ ++ if (bond->params.xmit_policy == BOND_XMIT_POLICY_LAYER23) ++ hash = dst_mac[5] ^ src_mac[5]; ++ else if (layer4hdr) ++ hash = (__force u32)flow.ports.ports; ++ ++ hash ^= (__force u32)flow_get_u32_dst(&flow) ^ ++ (__force u32)flow_get_u32_src(&flow); ++ hash ^= (hash >> 16); ++ hash ^= (hash >> 8); ++ ++ return hash; ++} ++ ++/* bond_xor_get_tx_dev - Calculate egress interface for a given packet for a LAG ++ * that is configured in balance-xor mode ++ * @skb: pointer to skb to be egressed ++ * @src_mac: pointer to source L2 address ++ * @dst_mac: pointer to destination L2 address ++ * @src: pointer to source L3 address in network order ++ * @dst: pointer to destination L3 address in network order ++ * @protocol: L3 protocol ++ * @bond_dev: pointer to bond master device ++ * ++ * If @skb is NULL, bond_xmit_hash_without_skb is used to calculate hash using ++ * L2/L3 addresses. ++ * ++ * Returns: Either valid slave device, or NULL otherwise ++ */ ++static struct net_device *bond_xor_get_tx_dev(struct sk_buff *skb, ++ u8 *src_mac, u8 *dst_mac, ++ void *src, void *dst, ++ u16 protocol, ++ struct net_device *bond_dev, ++ __be16 *layer4hdr) ++{ ++ struct bonding *bond = netdev_priv(bond_dev); ++ int slave_cnt = READ_ONCE(bond->slave_cnt); ++ int slave_id = 0, i = 0; ++ u32 hash; ++ struct list_head *iter; ++ struct slave *slave; ++ ++ if (slave_cnt == 0) { ++ pr_debug("%s: Error: No slave is attached to the interface\n", ++ bond_dev->name); ++ return NULL; ++ } ++ ++ if (skb) { ++ hash = bond_xmit_hash(bond, skb); ++ slave_id = hash % slave_cnt; ++ } else { ++ if (bond->params.xmit_policy != BOND_XMIT_POLICY_LAYER23 && ++ bond->params.xmit_policy != BOND_XMIT_POLICY_LAYER2 && ++ bond->params.xmit_policy != BOND_XMIT_POLICY_LAYER34) { ++ pr_debug("%s: Error: Unsupported hash policy for balance-XOR fast path\n", ++ bond_dev->name); ++ return NULL; ++ } ++ ++ hash = bond_xmit_hash_without_skb(src_mac, dst_mac, src, ++ dst, protocol, bond_dev, ++ layer4hdr); ++ slave_id = hash % slave_cnt; ++ } ++ ++ i = slave_id; ++ ++ /* Here we start from the slave with slave_id */ ++ bond_for_each_slave_rcu(bond, slave, iter) { ++ if (--i < 0) { ++ if (bond_slave_can_tx(slave)) ++ return slave->dev; ++ } ++ } ++ ++ /* Here we start from the first slave up to slave_id */ ++ i = slave_id; ++ bond_for_each_slave_rcu(bond, slave, iter) { ++ if (--i < 0) ++ break; ++ if (bond_slave_can_tx(slave)) ++ return slave->dev; ++ } ++ ++ return NULL; ++} ++ ++/* bond_get_tx_dev - Calculate egress interface for a given packet. ++ * ++ * Supports 802.3AD and balance-xor modes ++ * ++ * @skb: pointer to skb to be egressed, if valid ++ * @src_mac: pointer to source L2 address ++ * @dst_mac: pointer to destination L2 address ++ * @src: pointer to source L3 address in network order ++ * @dst: pointer to destination L3 address in network order ++ * @protocol: L3 protocol id from L2 header ++ * @bond_dev: pointer to bond master device ++ * ++ * Returns: Either valid slave device, or NULL for un-supported LAG modes ++ */ ++struct net_device *bond_get_tx_dev(struct sk_buff *skb, uint8_t *src_mac, ++ u8 *dst_mac, void *src, ++ void *dst, u16 protocol, ++ struct net_device *bond_dev, ++ __be16 *layer4hdr) ++{ ++ struct bonding *bond; ++ ++ if (!bond_dev) ++ return NULL; ++ ++ if (!((bond_dev->priv_flags & IFF_BONDING) && ++ (bond_dev->flags & IFF_MASTER))) ++ return NULL; ++ ++ bond = netdev_priv(bond_dev); ++ ++ switch (bond->params.mode) { ++ case BOND_MODE_XOR: ++ return bond_xor_get_tx_dev(skb, src_mac, dst_mac, ++ src, dst, protocol, ++ bond_dev, layer4hdr); ++ case BOND_MODE_8023AD: ++ return bond_3ad_get_tx_dev(skb, src_mac, dst_mac, ++ src, dst, protocol, ++ bond_dev, layer4hdr); ++ default: ++ return NULL; ++ } ++} ++EXPORT_SYMBOL(bond_get_tx_dev); ++ ++/* In bond_xmit_xor() , we determine the output device by using a pre- ++ * determined xmit_hash_policy(), If the selected device is not enabled, ++ * find the next active slave. ++ */ ++static int bond_xmit_xor(struct sk_buff *skb, struct net_device *dev) ++{ ++ struct bonding *bond = netdev_priv(dev); ++ struct net_device *outdev; ++ ++ outdev = bond_xor_get_tx_dev(skb, NULL, NULL, NULL, ++ NULL, 0, dev, NULL); ++ if (!outdev) ++ goto out; ++ ++ bond_dev_queue_xmit(bond, skb, outdev); ++ goto final; ++out: ++ /* no suitable interface, frame not sent */ ++ dev_kfree_skb(skb); ++final: ++ return NETDEV_TX_OK; ++} ++/* QCA NSS ECM bonding support - End */ ++ + static bool bond_flow_ip(struct sk_buff *skb, struct flow_keys *fk, const void *data, + int hlen, __be16 l2_proto, int *nhoff, int *ip_proto, bool l34) + { +@@ -5211,15 +5486,23 @@ static netdev_tx_t bond_3ad_xor_xmit(str + struct net_device *dev) + { + struct bonding *bond = netdev_priv(dev); +- struct bond_up_slave *slaves; +- struct slave *slave; ++ /* QCA NSS ECM bonding support - Start */ ++ struct net_device *outdev = NULL; ++ outdev = bond_3ad_get_tx_dev(skb, NULL, NULL, NULL, ++ NULL, 0, dev, NULL); + +- slaves = rcu_dereference(bond->usable_slaves); +- slave = bond_xmit_3ad_xor_slave_get(bond, skb, slaves); +- if (likely(slave)) +- return bond_dev_queue_xmit(bond, skb, slave->dev); ++ if (!outdev) ++ goto out; + +- return bond_tx_drop(dev, skb); ++ bond_dev_queue_xmit(bond, skb, outdev); ++ goto final; ++ ++out: ++ dev_kfree_skb(skb); ++ ++final: ++ return NETDEV_TX_OK; ++/* QCA NSS ECM bonding support - End */ + } + + /* in broadcast mode, we send everything to all usable interfaces. */ +@@ -5469,8 +5752,9 @@ static netdev_tx_t __bond_start_xmit(str + return bond_xmit_roundrobin(skb, dev); + case BOND_MODE_ACTIVEBACKUP: + return bond_xmit_activebackup(skb, dev); +- case BOND_MODE_8023AD: + case BOND_MODE_XOR: ++ return bond_xmit_xor(skb, dev); /* QCA NSS ECM bonding support */ ++ case BOND_MODE_8023AD: + return bond_3ad_xor_xmit(skb, dev); + case BOND_MODE_BROADCAST: + return bond_xmit_broadcast(skb, dev); +--- a/include/net/bond_3ad.h ++++ b/include/net/bond_3ad.h +@@ -303,8 +303,15 @@ int bond_3ad_lacpdu_recv(const struct sk + int bond_3ad_set_carrier(struct bonding *bond); + void bond_3ad_update_lacp_active(struct bonding *bond); + void bond_3ad_update_lacp_rate(struct bonding *bond); ++/* QCA NSS ECM bonding support */ ++struct net_device *bond_3ad_get_tx_dev(struct sk_buff *skb, uint8_t *src_mac, ++ uint8_t *dst_mac, void *src, ++ void *dst, uint16_t protocol, ++ struct net_device *bond_dev, ++ __be16 *layer4hdr); ++/* QCA NSS ECM bonding support */ ++ + void bond_3ad_update_ad_actor_settings(struct bonding *bond); + int bond_3ad_stats_fill(struct sk_buff *skb, struct bond_3ad_stats *stats); + size_t bond_3ad_stats_size(void); + #endif /* _NET_BOND_3AD_H */ +- +--- a/include/net/bonding.h ++++ b/include/net/bonding.h +@@ -85,6 +85,8 @@ + #define bond_for_each_slave(bond, pos, iter) \ + netdev_for_each_lower_private((bond)->dev, pos, iter) + ++extern struct bond_cb __rcu *bond_cb; /* QCA NSS ECM bonding support */ ++ + /* Caller must have rcu_read_lock */ + #define bond_for_each_slave_rcu(bond, pos, iter) \ + netdev_for_each_lower_private_rcu((bond)->dev, pos, iter) +@@ -690,6 +692,12 @@ struct bond_vlan_tag *bond_verify_device + int level); + int bond_update_slave_arr(struct bonding *bond, struct slave *skipslave); + void bond_slave_arr_work_rearm(struct bonding *bond, unsigned long delay); ++/* QCA NSS ECM bonding support - Start */ ++uint32_t bond_xmit_hash_without_skb(uint8_t *src_mac, uint8_t *dst_mac, ++ void *psrc, void *pdst, uint16_t protocol, ++ struct net_device *bond_dev, ++ __be16 *layer4hdr); ++/* QCA NSS ECM bonding support - End */ + void bond_work_init_all(struct bonding *bond); + + #ifdef CONFIG_PROC_FS +@@ -794,4 +802,18 @@ static inline netdev_tx_t bond_tx_drop(s + return NET_XMIT_DROP; + } + ++/* QCA NSS ECM bonding support - Start */ ++struct bond_cb { ++ void (*bond_cb_link_up)(struct net_device *slave); ++ void (*bond_cb_link_down)(struct net_device *slave); ++ void (*bond_cb_enslave)(struct net_device *slave); ++ void (*bond_cb_release)(struct net_device *slave); ++ void (*bond_cb_delete_by_slave)(struct net_device *slave); ++ void (*bond_cb_delete_by_mac)(uint8_t *mac_addr); ++}; ++ ++extern int bond_register_cb(struct bond_cb *cb); ++extern void bond_unregister_cb(void); ++/* QCA NSS ECM bonding support - End */ ++ + #endif /* _NET_BONDING_H */ diff --git a/target/linux/qualcommax/patches-6.1/0600-5-qca-nss-ecm-support-macvlan.patch b/target/linux/qualcommax/patches-6.1/0600-5-qca-nss-ecm-support-macvlan.patch new file mode 100644 index 000000000..5f18c6be7 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0600-5-qca-nss-ecm-support-macvlan.patch @@ -0,0 +1,96 @@ +--- a/include/linux/if_macvlan.h ++++ b/include/linux/if_macvlan.h +@@ -15,6 +15,13 @@ struct macvlan_port; + #define MACVLAN_MC_FILTER_BITS 8 + #define MACVLAN_MC_FILTER_SZ (1 << MACVLAN_MC_FILTER_BITS) + ++/* QCA NSS ECM Support - Start */ ++/* ++ * Callback for updating interface statistics for macvlan flows offloaded from host CPU. ++ */ ++typedef void (*macvlan_offload_stats_update_cb_t)(struct net_device *dev, struct rtnl_link_stats64 *stats, bool update_mcast_rx_stats); ++/* QCA NSS ECM Support - End */ ++ + struct macvlan_dev { + struct net_device *dev; + struct list_head list; +@@ -35,6 +42,7 @@ struct macvlan_dev { + #ifdef CONFIG_NET_POLL_CONTROLLER + struct netpoll *netpoll; + #endif ++ macvlan_offload_stats_update_cb_t offload_stats_update; /* QCA NSS ECM support */ + }; + + static inline void macvlan_count_rx(const struct macvlan_dev *vlan, +@@ -107,4 +115,26 @@ static inline int macvlan_release_l2fw_o + macvlan->accel_priv = NULL; + return dev_uc_add(macvlan->lowerdev, dev->dev_addr); + } ++ ++/* QCA NSS ECM Support - Start */ ++#if IS_ENABLED(CONFIG_MACVLAN) ++static inline void ++macvlan_offload_stats_update(struct net_device *dev, ++ struct rtnl_link_stats64 *stats, ++ bool update_mcast_rx_stats) ++{ ++ struct macvlan_dev *macvlan = netdev_priv(dev); ++ ++ macvlan->offload_stats_update(dev, stats, update_mcast_rx_stats); ++} ++ ++static inline enum ++macvlan_mode macvlan_get_mode(struct net_device *dev) ++{ ++ struct macvlan_dev *macvlan = netdev_priv(dev); ++ ++ return macvlan->mode; ++} ++#endif ++/* QCA NSS ECM Support - End */ + #endif /* _LINUX_IF_MACVLAN_H */ +--- a/drivers/net/macvlan.c ++++ b/drivers/net/macvlan.c +@@ -933,6 +933,34 @@ static void macvlan_uninit(struct net_de + macvlan_port_destroy(port->dev); + } + ++/* QCA NSS ECM Support - Start */ ++/* Update macvlan statistics processed by offload engines */ ++static void macvlan_dev_update_stats(struct net_device *dev, ++ struct rtnl_link_stats64 *offl_stats, ++ bool update_mcast_rx_stats) ++{ ++ struct vlan_pcpu_stats *stats; ++ struct macvlan_dev *macvlan; ++ ++ /* Is this a macvlan? */ ++ if (!netif_is_macvlan(dev)) ++ return; ++ ++ macvlan = netdev_priv(dev); ++ stats = this_cpu_ptr(macvlan->pcpu_stats); ++ u64_stats_update_begin(&stats->syncp); ++ u64_stats_add(&stats->rx_packets, offl_stats->rx_packets); ++ u64_stats_add(&stats->rx_bytes, offl_stats->rx_bytes); ++ u64_stats_add(&stats->tx_packets, offl_stats->tx_packets); ++ u64_stats_add(&stats->tx_bytes, offl_stats->tx_bytes); ++ /* Update multicast statistics */ ++ if (unlikely(update_mcast_rx_stats)) { ++ u64_stats_add(&stats->rx_multicast, offl_stats->rx_packets); ++ } ++ u64_stats_update_end(&stats->syncp); ++} ++/* QCA NSS ECM Support - End */ ++ + static void macvlan_dev_get_stats64(struct net_device *dev, + struct rtnl_link_stats64 *stats) + { +@@ -1477,6 +1505,7 @@ int macvlan_common_newlink(struct net *s + vlan->dev = dev; + vlan->port = port; + vlan->set_features = MACVLAN_FEATURES; ++ vlan->offload_stats_update = macvlan_dev_update_stats; /* QCA NSS ECM Support */ + + vlan->mode = MACVLAN_MODE_VEPA; + if (data && data[IFLA_MACVLAN_MODE]) diff --git a/target/linux/qualcommax/patches-6.1/0600-6-qca-nss-ecm-support-netfilter-DSCPREMARK.patch b/target/linux/qualcommax/patches-6.1/0600-6-qca-nss-ecm-support-netfilter-DSCPREMARK.patch new file mode 100644 index 000000000..6f030d52c --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0600-6-qca-nss-ecm-support-netfilter-DSCPREMARK.patch @@ -0,0 +1,69 @@ +--- a/net/netfilter/Kconfig ++++ b/net/netfilter/Kconfig +@@ -179,6 +179,13 @@ config NF_CONNTRACK_TIMEOUT + + If unsure, say `N'. + ++config NF_CONNTRACK_DSCPREMARK_EXT ++ bool 'Connection tracking extension for dscp remark target' ++ depends on NETFILTER_ADVANCED ++ help ++ This option enables support for connection tracking extension ++ for dscp remark. ++ + config NF_CONNTRACK_TIMESTAMP + bool 'Connection tracking timestamping' + depends on NETFILTER_ADVANCED +--- a/include/net/netfilter/nf_conntrack_extend.h ++++ b/include/net/netfilter/nf_conntrack_extend.h +@@ -31,6 +31,10 @@ enum nf_ct_ext_id { + #if IS_ENABLED(CONFIG_NET_ACT_CT) + NF_CT_EXT_ACT_CT, + #endif ++#ifdef CONFIG_NF_CONNTRACK_DSCPREMARK_EXT ++ NF_CT_EXT_DSCPREMARK, /* QCA NSS ECM support */ ++#endif ++ + NF_CT_EXT_NUM, + }; + +--- a/net/netfilter/nf_conntrack_extend.c ++++ b/net/netfilter/nf_conntrack_extend.c +@@ -23,6 +23,7 @@ + #include + #include + #include ++#include + #include + + #define NF_CT_EXT_PREALLOC 128u /* conntrack events are on by default */ +@@ -54,6 +55,9 @@ static const u8 nf_ct_ext_type_len[NF_CT + #if IS_ENABLED(CONFIG_NET_ACT_CT) + [NF_CT_EXT_ACT_CT] = sizeof(struct nf_conn_act_ct_ext), + #endif ++#ifdef CONFIG_NF_CONNTRACK_DSCPREMARK_EXT ++ [NF_CT_EXT_DSCPREMARK] = sizeof(struct nf_ct_dscpremark_ext), ++#endif + }; + + static __always_inline unsigned int total_extension_size(void) +@@ -86,6 +90,9 @@ static __always_inline unsigned int tota + #if IS_ENABLED(CONFIG_NET_ACT_CT) + + sizeof(struct nf_conn_act_ct_ext) + #endif ++#ifdef CONFIG_NF_CONNTRACK_DSCPREMARK_EXT ++ + sizeof(struct nf_ct_dscpremark_ext) ++#endif + ; + } + +--- a/net/netfilter/Makefile ++++ b/net/netfilter/Makefile +@@ -14,6 +14,7 @@ nf_conntrack-$(CONFIG_NF_CONNTRACK_LABEL + nf_conntrack-$(CONFIG_NF_CT_PROTO_DCCP) += nf_conntrack_proto_dccp.o + nf_conntrack-$(CONFIG_NF_CT_PROTO_SCTP) += nf_conntrack_proto_sctp.o + nf_conntrack-$(CONFIG_NF_CT_PROTO_GRE) += nf_conntrack_proto_gre.o ++nf_conntrack-$(CONFIG_NF_CONNTRACK_DSCPREMARK_EXT) += nf_conntrack_dscpremark_ext.o + ifeq ($(CONFIG_NF_CONNTRACK),m) + nf_conntrack-$(CONFIG_DEBUG_INFO_BTF_MODULES) += nf_conntrack_bpf.o + else ifeq ($(CONFIG_NF_CONNTRACK),y) diff --git a/target/linux/qualcommax/patches-6.1/0600-7-qca-nss-ecm-add-missing-net-defines.patch b/target/linux/qualcommax/patches-6.1/0600-7-qca-nss-ecm-add-missing-net-defines.patch new file mode 100644 index 000000000..2c63b46c3 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0600-7-qca-nss-ecm-add-missing-net-defines.patch @@ -0,0 +1,35 @@ +--- a/include/linux/netdevice.h ++++ b/include/linux/netdevice.h +@@ -1725,7 +1725,9 @@ enum netdev_priv_flags_ext { + IFF_EXT_PPP_PPTP = 1<<3, + IFF_EXT_GRE_V4_TAP = 1<<4, + IFF_EXT_GRE_V6_TAP = 1<<5, +- IFF_EXT_IFB = 1<<6, ++ IFF_EXT_IFB = 1<<6, ++ IFF_EXT_MAPT = 1<<7, ++ IFF_EXT_HW_NO_OFFLOAD = 1<<8, + }; + + #define IFF_802_1Q_VLAN IFF_802_1Q_VLAN +--- a/include/uapi/linux/in.h ++++ b/include/uapi/linux/in.h +@@ -63,6 +63,8 @@ enum { + #define IPPROTO_MTP IPPROTO_MTP + IPPROTO_BEETPH = 94, /* IP option pseudo header for BEET */ + #define IPPROTO_BEETPH IPPROTO_BEETPH ++ IPPROTO_ETHERIP = 97, /* ETHERIP protocol number */ ++#define IPPROTO_ETHERIP IPPROTO_ETHERIP + IPPROTO_ENCAP = 98, /* Encapsulation Header */ + #define IPPROTO_ENCAP IPPROTO_ENCAP + IPPROTO_PIM = 103, /* Protocol Independent Multicast */ +--- a/tools/include/uapi/linux/in.h ++++ b/tools/include/uapi/linux/in.h +@@ -63,6 +63,8 @@ enum { + #define IPPROTO_MTP IPPROTO_MTP + IPPROTO_BEETPH = 94, /* IP option pseudo header for BEET */ + #define IPPROTO_BEETPH IPPROTO_BEETPH ++ IPPROTO_ETHERIP = 97, /* ETHERIP protocol number */ ++#define IPPROTO_ETHERIP IPPROTO_ETHERIP + IPPROTO_ENCAP = 98, /* Encapsulation Header */ + #define IPPROTO_ENCAP IPPROTO_ENCAP + IPPROTO_PIM = 103, /* Protocol Independent Multicast */ diff --git a/target/linux/qualcommax/patches-6.1/0600-8-qca-nss-ecm-support-MLO-bonding.patch b/target/linux/qualcommax/patches-6.1/0600-8-qca-nss-ecm-support-MLO-bonding.patch new file mode 100644 index 000000000..ad9e20553 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0600-8-qca-nss-ecm-support-MLO-bonding.patch @@ -0,0 +1,536 @@ +From 0403eceee14bb6eb4e417102cae830b7509b1554 Mon Sep 17 00:00:00 2001 +From: Shivani Soni +Date: Thu, 17 Nov 2022 00:16:38 +0530 +Subject: [PATCH] arm/arm64: Add support for MLO bonding + +1. Introduced BOND_MODE_MLO to support MLO bonding +2. Transmit handling according to new mode + +Change-Id: Ib272e77cce56ee50b0a13305fac8fae76743c206 +Signed-off-by: Shivani Soni +--- + drivers/net/bonding/bond_main.c | 212 ++++++++++++++++++++++++----- + drivers/net/bonding/bond_options.c | 1 + + include/net/bonding.h | 30 +++- + include/uapi/linux/if_bonding.h | 1 + + 4 files changed, 210 insertions(+), 34 deletions(-) + +--- a/drivers/net/bonding/bond_main.c ++++ b/drivers/net/bonding/bond_main.c +@@ -1439,6 +1439,10 @@ static netdev_features_t bond_fix_featur + return features; + } + ++#define BOND_MLO_VLAN_FEATURES (NETIF_F_SG | \ ++ NETIF_F_FRAGLIST | \ ++ NETIF_F_HIGHDMA | NETIF_F_LRO) ++ + #define BOND_VLAN_FEATURES (NETIF_F_HW_CSUM | NETIF_F_SG | \ + NETIF_F_FRAGLIST | NETIF_F_GSO_SOFTWARE | \ + NETIF_F_HIGHDMA | NETIF_F_LRO) +@@ -1469,13 +1473,25 @@ static void bond_compute_features(struct + + if (!bond_has_slaves(bond)) + goto done; ++ ++ /* ++ * Use features specific to bond MLO ++ */ ++ if (BOND_MODE(bond) == BOND_MODE_MLO) { ++ vlan_features = BOND_MLO_VLAN_FEATURES; ++ } ++ + vlan_features &= NETIF_F_ALL_FOR_ALL; + mpls_features &= NETIF_F_ALL_FOR_ALL; + + bond_for_each_slave(bond, slave, iter) { +- vlan_features = netdev_increment_features(vlan_features, +- slave->dev->vlan_features, BOND_VLAN_FEATURES); +- ++ if (BOND_MODE(bond) == BOND_MODE_MLO) { ++ vlan_features = netdev_increment_features(vlan_features, ++ slave->dev->vlan_features, BOND_MLO_VLAN_FEATURES); ++ } else { ++ vlan_features = netdev_increment_features(vlan_features, ++ slave->dev->vlan_features, BOND_VLAN_FEATURES); ++ } + enc_features = netdev_increment_features(enc_features, + slave->dev->hw_enc_features, + BOND_ENC_FEATURES); +@@ -1620,6 +1636,16 @@ static rx_handler_result_t bond_handle_f + bond->dev->addr_len); + } + ++ /* ++ * Set the PACKET_HOST for MLO mode as ++ * MLO bond netdevice needs to support routing ++ */ ++ if (BOND_MODE(bond) == BOND_MODE_MLO) { ++ if (ether_addr_equal(bond->dev->dev_addr, eth_hdr(skb)->h_dest)) { ++ skb->pkt_type = PACKET_HOST; ++ } ++ } ++ + return ret; + } + +@@ -1837,6 +1863,8 @@ int bond_enslave(struct net_device *bond + return -EPERM; + } + ++ ASSERT_RTNL(); ++ + if (!bond->params.use_carrier && + slave_dev->ethtool_ops->get_link == NULL && + slave_ops->ndo_eth_ioctl == NULL) { +@@ -1950,13 +1978,17 @@ int bond_enslave(struct net_device *bond + call_netdevice_notifiers(NETDEV_JOIN, slave_dev); + + /* If this is the first slave, then we need to set the master's hardware +- * address to be the same as the slave's. ++ * address to be the same as the slave's except for BOND_MODE_MLO. ++ * For BOND_MODE_MLO, master's mac address is MLD address which should ++ * not be same as slave's address. + */ +- if (!bond_has_slaves(bond) && +- bond->dev->addr_assign_type == NET_ADDR_RANDOM) { +- res = bond_set_dev_addr(bond->dev, slave_dev); +- if (res) +- goto err_undo_flags; ++ if (BOND_MODE(bond) != BOND_MODE_MLO) { ++ if (!bond_has_slaves(bond) && ++ bond->dev->addr_assign_type == NET_ADDR_RANDOM) { ++ res = bond_set_dev_addr(bond->dev, slave_dev); ++ if (res) ++ goto err_undo_flags; ++ } + } + + new_slave = bond_alloc_slave(bond, slave_dev); +@@ -1985,18 +2017,21 @@ int bond_enslave(struct net_device *bond + bond_hw_addr_copy(new_slave->perm_hwaddr, slave_dev->dev_addr, + slave_dev->addr_len); + +- if (!bond->params.fail_over_mac || +- BOND_MODE(bond) != BOND_MODE_ACTIVEBACKUP) { +- /* Set slave to master's mac address. The application already +- * set the master's mac address to that of the first slave +- */ +- memcpy(ss.__data, bond_dev->dev_addr, bond_dev->addr_len); +- ss.ss_family = slave_dev->type; +- res = dev_set_mac_address(slave_dev, (struct sockaddr *)&ss, +- extack); +- if (res) { +- slave_err(bond_dev, slave_dev, "Error %d calling set_mac_address\n", res); +- goto err_restore_mtu; ++ /* Set slave to master's mac address except for BOND_MODE_MLO ++ * as for MLO mode master's mac address is not same as slave's mac address. ++ * The application already set the master's mac address to that of the first slave ++ */ ++ if (BOND_MODE(bond) != BOND_MODE_MLO) { ++ if (!bond->params.fail_over_mac || ++ BOND_MODE(bond) != BOND_MODE_ACTIVEBACKUP) { ++ memcpy(ss.__data, bond_dev->dev_addr, bond_dev->addr_len); ++ ss.ss_family = slave_dev->type; ++ res = dev_set_mac_address(slave_dev, (struct sockaddr *)&ss, ++ extack); ++ if (res) { ++ slave_err(bond_dev, slave_dev, "Error %d calling set_mac_address\n", res); ++ goto err_restore_mtu; ++ } + } + } + +@@ -2355,6 +2390,7 @@ err_undo_flags: + + return res; + } ++EXPORT_SYMBOL(bond_enslave); + + /* Try to release the slave device from the bond device + * It is legal to access curr_active_slave without a lock because all the function +@@ -2476,13 +2512,23 @@ static int __bond_release_one(struct net + } + + bond_set_carrier(bond); +- if (!bond_has_slaves(bond)) +- eth_hw_addr_random(bond_dev); ++ ++ /* ++ * Avoid changing the mac address of bond netdevice for MLO case, ++ * This will only be supported from wifi driver. ++ */ ++ if (BOND_MODE(bond) != BOND_MODE_MLO) { ++ if (!bond_has_slaves(bond)) ++ eth_hw_addr_random(bond_dev); ++ } + + unblock_netpoll_tx(); + synchronize_rcu(); + bond->slave_cnt--; + ++ /* ++ * TODO: Avoid MAC address change notification for BOND_MODE_MLO ++ */ + if (!bond_has_slaves(bond)) { + call_netdevice_notifiers(NETDEV_CHANGEADDR, bond->dev); + call_netdevice_notifiers(NETDEV_RELEASE, bond->dev); +@@ -2549,6 +2595,7 @@ int bond_release(struct net_device *bond + { + return __bond_release_one(bond_dev, slave_dev, false, false); + } ++EXPORT_SYMBOL(bond_release); + + /* First release a slave and then destroy the bond if no more slaves are left. + * Must be under rtnl_lock when this function is called. +@@ -2570,6 +2617,29 @@ static int bond_release_and_destroy(stru + return ret; + } + ++/* Destroy the bond for BOND_MODE_MLO if no more slaves are left. ++ * Must be under rtnl_lock when this function is called. ++ */ ++bool bond_destroy_mlo(struct net_device *bond_dev) ++{ ++ struct bonding *bond = netdev_priv(bond_dev); ++ ++ ASSERT_RTNL(); ++ ++ if (!bond_has_slaves(bond)) { ++ bond_dev->priv_flags |= IFF_DISABLE_NETPOLL; ++ netdev_info(bond_dev, "Destroying bond as no slaves are present\n"); ++ bond_remove_proc_entry(bond); ++ unregister_netdevice(bond_dev); ++ return true; ++ } ++ ++ pr_err("%p: Not able to destroy bond netdevice: %s as slaves are present\n", bond_dev, bond_dev->name); ++ ++ return false; ++} ++EXPORT_SYMBOL(bond_destroy_mlo); ++ + static void bond_info_query(struct net_device *bond_dev, struct ifbond *info) + { + struct bonding *bond = netdev_priv(bond_dev); +@@ -4221,6 +4291,24 @@ static struct net_device *bond_xor_get_t + return NULL; + } + ++/* Transmit function for BOND_MODE_MLO. ++ * Get transmit link interface from registered callback. ++ */ ++struct net_device *bond_mlo_get_tx_dev(struct net_device *bond_dev, u8 *dst_mac) ++{ ++ struct net_device *slave_dev = NULL; ++ struct mlo_bond_info *mlo_info = NULL; ++ void *bond_mlo_ctx; ++ ++ mlo_info = bond_get_mlo_priv(bond_dev); ++ if (mlo_info->bond_get_mlo_tx_netdev) { ++ bond_mlo_ctx = bond_get_mlo_ctx(bond_dev); ++ slave_dev = mlo_info->bond_get_mlo_tx_netdev(bond_mlo_ctx, dst_mac); ++ } ++ ++ return slave_dev; ++} ++ + /* bond_get_tx_dev - Calculate egress interface for a given packet. + * + * Supports 802.3AD and balance-xor modes +@@ -4261,6 +4349,9 @@ struct net_device *bond_get_tx_dev(struc + return bond_3ad_get_tx_dev(skb, src_mac, dst_mac, + src, dst, protocol, + bond_dev, layer4hdr); ++ case BOND_MODE_MLO: ++ return bond_mlo_get_tx_dev(bond_dev, dst_mac); ++ + default: + return NULL; + } +@@ -5057,20 +5148,26 @@ static int bond_set_mac_address(struct n + if (!is_valid_ether_addr(ss->__data)) + return -EADDRNOTAVAIL; + +- bond_for_each_slave(bond, slave, iter) { +- slave_dbg(bond_dev, slave->dev, "%s: slave=%p\n", +- __func__, slave); +- res = dev_set_mac_address(slave->dev, addr, NULL); +- if (res) { +- /* TODO: consider downing the slave +- * and retry ? +- * User should expect communications +- * breakage anyway until ARP finish +- * updating, so... +- */ +- slave_dbg(bond_dev, slave->dev, "%s: err %d\n", +- __func__, res); +- goto unwind; ++ /* ++ * Do not allow mac address change for slave netdevice for BOND_MODE_MLO ++ * as master's mac address is not same as slave's mac address. ++ */ ++ if (BOND_MODE(bond) != BOND_MODE_MLO) { ++ bond_for_each_slave(bond, slave, iter) { ++ slave_dbg(bond_dev, slave->dev, "%s: slave=%p\n", ++ __func__, slave); ++ res = dev_set_mac_address(slave->dev, addr, NULL); ++ if (res) { ++ /* TODO: consider downing the slave ++ * and retry ? ++ * User should expect communications ++ * breakage anyway until ARP finish ++ * updating, so... ++ */ ++ slave_dbg(bond_dev, slave->dev, "%s: err %d\n", ++ __func__, res); ++ goto unwind; ++ } + } + } + +@@ -5734,6 +5831,27 @@ static netdev_tx_t bond_tls_device_xmit( + } + #endif + ++/* In bond_xmit_mlo(), we send the packet and bond netdevice ++ * to registered callback for final xmit. ++ */ ++static netdev_tx_t bond_xmit_mlo(struct sk_buff *skb, struct net_device *bond_dev) ++{ ++ struct bonding *bond = netdev_priv(bond_dev); ++ int slave_cnt, ret; ++ struct mlo_bond_info *mlo_info = bond_get_mlo_priv(bond_dev); ++ ++ slave_cnt = READ_ONCE(bond->slave_cnt); ++ if (unlikely(slave_cnt == 0) || unlikely(!mlo_info->bond_mlo_xmit_netdev)) { ++ bond_tx_drop(bond_dev, skb); ++ } else { ++ ret = mlo_info->bond_mlo_xmit_netdev(skb, bond_dev); ++ if (ret != NET_XMIT_SUCCESS) ++ netdev_err(bond_dev, "Xmit failed with mode %d %p\n", BOND_MODE(bond), skb); ++ } ++ ++ return NETDEV_TX_OK; ++} ++ + static netdev_tx_t __bond_start_xmit(struct sk_buff *skb, struct net_device *dev) + { + struct bonding *bond = netdev_priv(dev); +@@ -5762,6 +5880,8 @@ static netdev_tx_t __bond_start_xmit(str + return bond_alb_xmit(skb, dev); + case BOND_MODE_TLB: + return bond_tlb_xmit(skb, dev); ++ case BOND_MODE_MLO: ++ return bond_xmit_mlo(skb, dev); + default: + /* Should never happen, mode already checked */ + netdev_err(dev, "Unknown bonding mode %d\n", BOND_MODE(bond)); +@@ -6104,6 +6224,15 @@ static void bond_destructor(struct net_d + if (bond->id != (~0U)) + clear_bit(bond->id, &bond_id_mask); + /* QCA NSS ECM bonding support */ ++ ++ /* ++ * Wifi driver registered callback to destroy wiphy for MLO bond netdevice ++ */ ++ if (bond_is_mlo_device(bond_dev)) { ++ if (bond->mlo_info.bond_mlo_netdev_priv_destructor) { ++ bond->mlo_info.bond_mlo_netdev_priv_destructor(bond_dev); ++ } ++ } + } + + void bond_setup(struct net_device *bond_dev) +@@ -6680,6 +6809,76 @@ out: + return res; + } + ++/* bond_create_mlo() ++ * Create bond netdevice for BOND_MODE_MLO with MLO specific callback and context. ++ */ ++struct net_device *bond_create_mlo(struct net *net, const char *name, struct mlo_bond_info *mlo_info) ++{ ++ struct net_device *bond_dev; ++ struct bonding *bond; ++ int res; ++ ++ ASSERT_RTNL(); ++ ++ bond_dev = alloc_netdev_mq(sizeof(struct bonding), ++ name ? name : "bond%d", NET_NAME_UNKNOWN, ++ bond_setup, tx_queues); ++ if (!bond_dev) { ++ pr_err("%s: eek! can't alloc netdev!\n", name); ++ return NULL; ++ } ++ ++ bond = netdev_priv(bond_dev); ++ ++ dev_net_set(bond_dev, net); ++ bond_dev->rtnl_link_ops = &bond_link_ops; ++ ++ /* ++ * MLO specific initialization. ++ */ ++ bond_dev->ieee80211_ptr = mlo_info->wdev; ++ bond->params.mode = BOND_MODE_MLO; ++ mlo_info->wdev->netdev = bond_dev; ++ ++ memcpy((void *)&bond->mlo_info, (void *)mlo_info, sizeof(*mlo_info)); ++ eth_hw_addr_random(bond_dev); ++ ++ /* ++ * Disable HW CSUM as wlan driver doesn't support ++ */ ++ bond_dev->hw_features &= ~(NETIF_F_HW_CSUM); ++ bond_dev->features &= ~(NETIF_F_HW_CSUM); ++ ++ res = register_netdevice(bond_dev); ++ if (res < 0) { ++ free_netdev(bond_dev); ++ return NULL; ++ } ++ ++ netif_carrier_off(bond_dev); ++ bond_work_init_all(bond); ++ ++ bond->id = ~0U; ++ if (bond_id_mask != (~0UL)) { ++ bond->id = (u32)ffz(bond_id_mask); ++ set_bit(bond->id, &bond_id_mask); ++ } ++ ++ return bond_dev; ++} ++EXPORT_SYMBOL(bond_create_mlo); ++ ++/* bond_get_mlo_ctx ++ * Returns MLO context stored in netdev priv of bond netdevice ++ */ ++void *bond_get_mlo_ctx(struct net_device *bond_dev) ++{ ++ struct mlo_bond_info *mlo_info = bond_get_mlo_priv(bond_dev); ++ ++ return mlo_info->bond_mlo_ctx; ++} ++EXPORT_SYMBOL(bond_get_mlo_ctx); ++ + static int __net_init bond_net_init(struct net *net) + { + struct bond_net *bn = net_generic(net, bond_net_id); +--- a/drivers/net/bonding/bond_options.c ++++ b/drivers/net/bonding/bond_options.c +@@ -94,6 +94,7 @@ static const struct bond_opt_value bond_ + { "802.3ad", BOND_MODE_8023AD, 0}, + { "balance-tlb", BOND_MODE_TLB, 0}, + { "balance-alb", BOND_MODE_ALB, 0}, ++ { "mode mlo", BOND_MODE_MLO, 0}, + { NULL, -1, 0}, + }; + +--- a/include/net/bonding.h ++++ b/include/net/bonding.h +@@ -25,6 +25,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -203,6 +204,22 @@ struct bond_up_slave { + struct slave *arr[]; + }; + ++/** ++ * mlo_bond_info - mlo_bond_info structure maintains members corresponding to wifi 7 ++ * @bond_mlo_xmit_netdev: Callback function to provide skb to wifi driver for xmit ++ * @bond_get_mlo_tx_netdev: Callback function to get link interface from wifi driver for transmit ++ * @bond_mlo_ctx: Private member for wifi driver ++ * @wdev: ieee80211_ptr for wifi VAP ++ * @bond_mlo_netdev_priv_destructor: Callback function to remove wiphy instance from wifi driver ++ */ ++struct mlo_bond_info { ++ int (*bond_mlo_xmit_netdev)(struct sk_buff *skb, struct net_device *bond_dev); ++ struct net_device *(*bond_get_mlo_tx_netdev)(void *bond_mlo_ctx, void *dst); ++ void *bond_mlo_ctx; ++ struct wireless_dev *wdev; ++ void (*bond_mlo_netdev_priv_destructor)(struct net_device *bond_dev); ++}; ++ + /* + * Link pseudo-state only used internally by monitors + */ +@@ -268,6 +285,8 @@ struct bonding { + #endif /* CONFIG_XFRM_OFFLOAD */ + struct bpf_prog *xdp_prog; + u32 id; /* QCA NSS ECM bonding support */ ++ /* MLO mode info */ ++ struct mlo_bond_info mlo_info; + }; + + #define bond_slave_get_rcu(dev) \ +@@ -287,6 +306,19 @@ struct bond_vlan_tag { + bool bond_sk_check(struct bonding *bond); + + /** ++ * Returns False if the net_device is not MLO bond netdvice ++ * ++ */ ++static inline bool bond_is_mlo_device(struct net_device *bond_dev) ++{ ++ struct bonding *bond = netdev_priv(bond_dev); ++ if (BOND_MODE(bond) == BOND_MODE_MLO) ++ return true; ++ ++ return false; ++} ++ ++/** + * Returns NULL if the net_device does not belong to any of the bond's slaves + * + * Caller must hold bond lock for read +@@ -650,6 +682,12 @@ static inline __be32 bond_confirm_addr(s + return addr; + } + ++static inline struct mlo_bond_info *bond_get_mlo_priv(struct net_device *bond_dev) ++{ ++ struct bonding *bond = netdev_priv(bond_dev); ++ return &bond->mlo_info; ++} ++ + struct bond_net { + struct net *net; /* Associated network namespace */ + struct list_head dev_list; +@@ -663,14 +701,17 @@ int bond_rcv_validate(const struct sk_bu + netdev_tx_t bond_dev_queue_xmit(struct bonding *bond, struct sk_buff *skb, struct net_device *slave_dev); + int bond_get_id(struct net_device *bond_dev); /* QCA NSS ECM bonding support */ + int bond_create(struct net *net, const char *name); ++extern struct net_device *bond_create_mlo(struct net *net, const char *name, struct mlo_bond_info *mlo_info); ++extern void *bond_get_mlo_ctx(struct net_device *bond_dev); ++extern bool bond_destroy_mlo(struct net_device *bond_dev); + int bond_create_sysfs(struct bond_net *net); + void bond_destroy_sysfs(struct bond_net *net); + void bond_prepare_sysfs_group(struct bonding *bond); + int bond_sysfs_slave_add(struct slave *slave); + void bond_sysfs_slave_del(struct slave *slave); +-int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev, ++extern int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev, + struct netlink_ext_ack *extack); +-int bond_release(struct net_device *bond_dev, struct net_device *slave_dev); ++extern int bond_release(struct net_device *bond_dev, struct net_device *slave_dev); + u32 bond_xmit_hash(struct bonding *bond, struct sk_buff *skb); + int bond_set_carrier(struct bonding *bond); + void bond_select_active_slave(struct bonding *bond); +--- a/include/uapi/linux/if_bonding.h ++++ b/include/uapi/linux/if_bonding.h +@@ -71,6 +71,7 @@ + #define BOND_MODE_8023AD 4 + #define BOND_MODE_TLB 5 + #define BOND_MODE_ALB 6 /* TLB + RLB (receive load balancing) */ ++#define BOND_MODE_MLO 7 /* MLO (Multi link) mode for Wi-Fi 7 AP links */ + + /* each slave's link has 4 states */ + #define BOND_LINK_UP 0 /* link is up and running */ diff --git a/target/linux/qualcommax/patches-6.1/0601-qca-add-nss-bridge-mgr-support.patch b/target/linux/qualcommax/patches-6.1/0601-qca-add-nss-bridge-mgr-support.patch new file mode 100644 index 000000000..08c0d4a0f --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0601-qca-add-nss-bridge-mgr-support.patch @@ -0,0 +1,94 @@ +From 3c17a0e1112be70071e98d5208da5b55dcec20a6 Mon Sep 17 00:00:00 2001 +From: Simon Casey +Date: Wed, 2 Feb 2022 19:37:29 +0100 +Subject: [PATCH] Update 607-qca-add-add-nss-bridge-mgr-support.patch for kernel 5.15 + +--- + include/linux/if_bridge.h | 4 ++++ + net/bridge/br_fdb.c | 25 +++++++++++++++++++++---- + 2 files changed, 25 insertions(+), 4 deletions(-) + +--- a/include/linux/if_bridge.h ++++ b/include/linux/if_bridge.h +@@ -256,4 +256,8 @@ typedef struct net_bridge_port *br_get_d + extern br_get_dst_hook_t __rcu *br_get_dst_hook; + /* QCA NSS ECM support - End */ + ++/* QCA NSS bridge-mgr support - Start */ ++extern struct net_device *br_fdb_bridge_dev_get_and_hold(struct net_bridge *br); ++/* QCA NSS bridge-mgr support - End */ ++ + #endif +--- a/net/bridge/br_fdb.c ++++ b/net/bridge/br_fdb.c +@@ -63,6 +63,15 @@ void br_fdb_update_unregister_notify(str + EXPORT_SYMBOL_GPL(br_fdb_update_unregister_notify); + /* QCA NSS ECM support - End */ + ++/* QCA NSS bridge-mgr support - Start */ ++struct net_device *br_fdb_bridge_dev_get_and_hold(struct net_bridge *br) ++{ ++ dev_hold(br->dev); ++ return br->dev; ++} ++EXPORT_SYMBOL_GPL(br_fdb_bridge_dev_get_and_hold); ++/* QCA NSS bridge-mgr support - End */ ++ + int __init br_fdb_init(void) + { + br_fdb_cache = kmem_cache_create("bridge_fdb_cache", +@@ -573,7 +582,7 @@ void br_fdb_cleanup(struct work_struct * + unsigned long delay = hold_time(br); + unsigned long work_delay = delay; + unsigned long now = jiffies; +- u8 mac_addr[6]; /* QCA NSS ECM support */ ++ struct br_fdb_event fdb_event; /* QCA NSS bridge-mgr support */ + + /* this part is tricky, in order to avoid blocking learning and + * consequently forwarding, we rely on rcu to delete objects with +@@ -601,12 +610,13 @@ void br_fdb_cleanup(struct work_struct * + } else { + spin_lock_bh(&br->hash_lock); + if (!hlist_unhashed(&f->fdb_node)) { +- ether_addr_copy(mac_addr, f->key.addr.addr); ++ memset(&fdb_event, 0, sizeof(fdb_event)); ++ ether_addr_copy(fdb_event.addr, f->key.addr.addr); + fdb_delete(br, f, true); + /* QCA NSS ECM support - Start */ + atomic_notifier_call_chain( + &br_fdb_update_notifier_list, 0, +- (void *)mac_addr); ++ (void *)&fdb_event); + /* QCA NSS ECM support - End */ + } + spin_unlock_bh(&br->hash_lock); +@@ -908,6 +918,7 @@ void br_fdb_update(struct net_bridge *br + const unsigned char *addr, u16 vid, unsigned long flags) + { + struct net_bridge_fdb_entry *fdb; ++ struct br_fdb_event fdb_event; /* QCA NSS bridge-mgr support */ + + /* some users want to always flood. */ + if (hold_time(br) == 0) +@@ -933,6 +944,12 @@ void br_fdb_update(struct net_bridge *br + if (unlikely(source != READ_ONCE(fdb->dst) && + !test_bit(BR_FDB_STICKY, &fdb->flags))) { + br_switchdev_fdb_notify(br, fdb, RTM_DELNEIGH); ++ /* QCA NSS bridge-mgr support - Start */ ++ ether_addr_copy(fdb_event.addr, addr); ++ fdb_event.br = br; ++ fdb_event.orig_dev = READ_ONCE(fdb->dst->dev); ++ fdb_event.dev = source->dev; ++ /* QCA NSS bridge-mgr support - End */ + WRITE_ONCE(fdb->dst, source); + fdb_modified = true; + /* Take over HW learned entry */ +@@ -944,7 +961,7 @@ void br_fdb_update(struct net_bridge *br + /* QCA NSS ECM support - Start */ + atomic_notifier_call_chain( + &br_fdb_update_notifier_list, +- 0, (void *)addr); ++ 0, (void *)&fdb_event); + /* QCA NSS ECM support - End */ + } + diff --git a/target/linux/qualcommax/patches-6.1/0602-qca-nss-drv-add-qdisc-support.patch b/target/linux/qualcommax/patches-6.1/0602-qca-nss-drv-add-qdisc-support.patch new file mode 100644 index 000000000..662edd190 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0602-qca-nss-drv-add-qdisc-support.patch @@ -0,0 +1,44 @@ +--- a/include/linux/skbuff.h ++++ b/include/linux/skbuff.h +@@ -771,6 +771,7 @@ typedef unsigned char *sk_buff_data_t; + * @offload_fwd_mark: Packet was L2-forwarded in hardware + * @offload_l3_fwd_mark: Packet was L3-forwarded in hardware + * @tc_skip_classify: do not classify packet. set by IFB device ++ * @tc_skip_classify_offload: do not classify packet set by offload IFB device + * @tc_at_ingress: used within tc_classify to distinguish in/egress + * @redirected: packet was redirected by packet classifier + * @from_ingress: packet was redirected from the ingress path +@@ -963,6 +964,8 @@ struct sk_buff { + #ifdef CONFIG_NET_CLS_ACT + __u8 tc_skip_classify:1; + __u8 tc_at_ingress:1; /* See TC_AT_INGRESS_MASK */ ++ __u8 tc_skip_classify_offload:1; ++ __u16 tc_verd_qca_nss; /* QCA NSS Qdisc Support */ + #endif + #ifdef CONFIG_IPV6_NDISC_NODETYPE + __u8 ndisc_nodetype:2; +--- a/include/uapi/linux/pkt_cls.h ++++ b/include/uapi/linux/pkt_cls.h +@@ -139,6 +139,7 @@ enum tca_id { + TCA_ID_MPLS, + TCA_ID_CT, + TCA_ID_GATE, ++ TCA_ID_MIRRED_NSS, /* QCA NSS Qdisc IGS Support */ + /* other actions go here */ + __TCA_ID_MAX = 255 + }; +@@ -801,4 +802,14 @@ enum { + TCF_EM_OPND_LT + }; + ++/* QCA NSS Qdisc Support - Start */ ++#define _TC_MAKE32(x) ((x)) ++#define _TC_MAKEMASK1(n) (_TC_MAKE32(1) << _TC_MAKE32(n)) ++ ++#define TC_NCLS _TC_MAKEMASK1(8) ++#define TC_NCLS_NSS _TC_MAKEMASK1(12) ++#define SET_TC_NCLS_NSS(v) ( TC_NCLS_NSS | ((v) & ~TC_NCLS_NSS)) ++#define CLR_TC_NCLS_NSS(v) ( (v) & ~TC_NCLS_NSS) ++/* QCA NSS Qdisc Support - End */ ++ + #endif diff --git a/target/linux/qualcommax/patches-6.1/0603-1-qca-nss-clients-add-qdisc-support.patch b/target/linux/qualcommax/patches-6.1/0603-1-qca-nss-clients-add-qdisc-support.patch new file mode 100644 index 000000000..4d74750f2 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0603-1-qca-nss-clients-add-qdisc-support.patch @@ -0,0 +1,444 @@ +--- a/include/linux/timer.h ++++ b/include/linux/timer.h +@@ -17,10 +17,7 @@ struct timer_list { + unsigned long expires; + void (*function)(struct timer_list *); + u32 flags; +- +-#ifdef CONFIG_SHORTCUT_FE + unsigned long cust_data; +-#endif + + #ifdef CONFIG_LOCKDEP + struct lockdep_map lockdep_map; +--- a/drivers/net/ifb.c ++++ b/drivers/net/ifb.c +@@ -151,6 +151,31 @@ resched: + + } + ++void ifb_update_offload_stats(struct net_device *dev, struct pcpu_sw_netstats *offload_stats) ++{ ++ struct ifb_dev_private *dp; ++ struct ifb_q_private *txp; ++ ++ if (!dev || !offload_stats) { ++ return; ++ } ++ ++ if (!(dev->priv_flags_ext & IFF_EXT_IFB)) { ++ return; ++ } ++ ++ dp = netdev_priv(dev); ++ txp = dp->tx_private; ++ ++ u64_stats_update_begin(&txp->rx_stats.sync); ++ txp->rx_stats.packets += u64_stats_read(&offload_stats->rx_packets); ++ txp->rx_stats.bytes += u64_stats_read(&offload_stats->rx_bytes); ++ txp->tx_stats.packets += u64_stats_read(&offload_stats->tx_packets); ++ txp->tx_stats.bytes += u64_stats_read(&offload_stats->tx_bytes); ++ u64_stats_update_end(&txp->rx_stats.sync); ++} ++EXPORT_SYMBOL(ifb_update_offload_stats); ++ + static void ifb_stats64(struct net_device *dev, + struct rtnl_link_stats64 *stats) + { +@@ -326,6 +351,7 @@ static void ifb_setup(struct net_device + dev->flags |= IFF_NOARP; + dev->flags &= ~IFF_MULTICAST; + dev->priv_flags &= ~IFF_TX_SKB_SHARING; ++ dev->priv_flags_ext |= IFF_EXT_IFB; /* Mark the device as an IFB device. */ + netif_keep_dst(dev); + eth_hw_addr_random(dev); + dev->needs_free_netdev = true; +--- a/include/linux/netdevice.h ++++ b/include/linux/netdevice.h +@@ -4590,6 +4590,15 @@ void dev_uc_flush(struct net_device *dev + void dev_uc_init(struct net_device *dev); + + /** ++ * ifb_update_offload_stats - Update the IFB interface stats ++ * @dev: IFB device to update the stats ++ * @offload_stats: per CPU stats structure ++ * ++ * Allows update of IFB stats when flows are offloaded to an accelerator. ++ **/ ++void ifb_update_offload_stats(struct net_device *dev, struct pcpu_sw_netstats *offload_stats); ++ ++/** + * __dev_uc_sync - Synchonize device's unicast list + * @dev: device to sync + * @sync: function to call if address should be added +@@ -5135,6 +5144,11 @@ static inline bool netif_is_failover_sla + return dev->priv_flags & IFF_FAILOVER_SLAVE; + } + ++static inline bool netif_is_ifb_dev(const struct net_device *dev) ++{ ++ return dev->priv_flags_ext & IFF_EXT_IFB; ++} ++ + /* This device needs to keep skb dst for qdisc enqueue or ndo_start_xmit() */ + static inline void netif_keep_dst(struct net_device *dev) + { +--- a/include/uapi/linux/pkt_sched.h ++++ b/include/uapi/linux/pkt_sched.h +@@ -1278,4 +1278,248 @@ enum { + + #define TCA_ETS_MAX (__TCA_ETS_MAX - 1) + ++/* QCA NSS Clients Support - Start */ ++enum { ++ TCA_NSS_ACCEL_MODE_NSS_FW, ++ TCA_NSS_ACCEL_MODE_PPE, ++ TCA_NSS_ACCEL_MODE_MAX ++}; ++ ++/* NSSFIFO section */ ++ ++enum { ++ TCA_NSSFIFO_UNSPEC, ++ TCA_NSSFIFO_PARMS, ++ __TCA_NSSFIFO_MAX ++}; ++ ++#define TCA_NSSFIFO_MAX (__TCA_NSSFIFO_MAX - 1) ++ ++struct tc_nssfifo_qopt { ++ __u32 limit; /* Queue length: bytes for bfifo, packets for pfifo */ ++ __u8 set_default; /* Sets qdisc to be the default qdisc for enqueue */ ++ __u8 accel_mode; /* Dictates which data plane offloads the qdisc */ ++}; ++ ++/* NSSWRED section */ ++ ++enum { ++ TCA_NSSWRED_UNSPEC, ++ TCA_NSSWRED_PARMS, ++ __TCA_NSSWRED_MAX ++}; ++ ++#define TCA_NSSWRED_MAX (__TCA_NSSWRED_MAX - 1) ++#define NSSWRED_CLASS_MAX 6 ++struct tc_red_alg_parameter { ++ __u32 min; /* qlen_avg < min: pkts are all enqueued */ ++ __u32 max; /* qlen_avg > max: pkts are all dropped */ ++ __u32 probability;/* Drop probability at qlen_avg = max */ ++ __u32 exp_weight_factor;/* exp_weight_factor for calculate qlen_avg */ ++}; ++ ++struct tc_nsswred_traffic_class { ++ __u32 limit; /* Queue length */ ++ __u32 weight_mode_value; /* Weight mode value */ ++ struct tc_red_alg_parameter rap;/* Parameters for RED alg */ ++}; ++ ++/* ++ * Weight modes for WRED ++ */ ++enum tc_nsswred_weight_modes { ++ TC_NSSWRED_WEIGHT_MODE_DSCP = 0,/* Weight mode is DSCP */ ++ TC_NSSWRED_WEIGHT_MODES, /* Must be last */ ++}; ++ ++struct tc_nsswred_qopt { ++ __u32 limit; /* Queue length */ ++ enum tc_nsswred_weight_modes weight_mode; ++ /* Weight mode */ ++ __u32 traffic_classes; /* How many traffic classes: DPs */ ++ __u32 def_traffic_class; /* Default traffic if no match: def_DP */ ++ __u32 traffic_id; /* The traffic id to be configured: DP */ ++ __u32 weight_mode_value; /* Weight mode value */ ++ struct tc_red_alg_parameter rap;/* RED algorithm parameters */ ++ struct tc_nsswred_traffic_class tntc[NSSWRED_CLASS_MAX]; ++ /* Traffic settings for dumpping */ ++ __u8 ecn; /* Setting ECN bit or dropping */ ++ __u8 set_default; /* Sets qdisc to be the default for enqueue */ ++ __u8 accel_mode; /* Dictates which data plane offloads the qdisc */ ++}; ++ ++/* NSSCODEL section */ ++ ++enum { ++ TCA_NSSCODEL_UNSPEC, ++ TCA_NSSCODEL_PARMS, ++ __TCA_NSSCODEL_MAX ++}; ++ ++#define TCA_NSSCODEL_MAX (__TCA_NSSCODEL_MAX - 1) ++ ++struct tc_nsscodel_qopt { ++ __u32 target; /* Acceptable queueing delay */ ++ __u32 limit; /* Max number of packets that can be held in the queue */ ++ __u32 interval; /* Monitoring interval */ ++ __u32 flows; /* Number of flow buckets */ ++ __u32 quantum; /* Weight (in bytes) used for DRR of flow buckets */ ++ __u8 ecn; /* 0 - disable ECN, 1 - enable ECN */ ++ __u8 set_default; /* Sets qdisc to be the default qdisc for enqueue */ ++ __u8 accel_mode; /* Dictates which data plane offloads the qdisc */ ++}; ++ ++struct tc_nsscodel_xstats { ++ __u32 peak_queue_delay; /* Peak delay experienced by a dequeued packet */ ++ __u32 peak_drop_delay; /* Peak delay experienced by a dropped packet */ ++}; ++ ++/* NSSFQ_CODEL section */ ++ ++struct tc_nssfq_codel_xstats { ++ __u32 new_flow_count; /* Total number of new flows seen */ ++ __u32 new_flows_len; /* Current number of new flows */ ++ __u32 old_flows_len; /* Current number of old flows */ ++ __u32 ecn_mark; /* Number of packets marked with ECN */ ++ __u32 drop_overlimit; /* Number of packets dropped due to overlimit */ ++ __u32 maxpacket; /* The largest packet seen so far in the queue */ ++}; ++ ++/* NSSTBL section */ ++ ++enum { ++ TCA_NSSTBL_UNSPEC, ++ TCA_NSSTBL_PARMS, ++ __TCA_NSSTBL_MAX ++}; ++ ++#define TCA_NSSTBL_MAX (__TCA_NSSTBL_MAX - 1) ++ ++struct tc_nsstbl_qopt { ++ __u32 burst; /* Maximum burst size */ ++ __u32 rate; /* Limiting rate of TBF */ ++ __u32 peakrate; /* Maximum rate at which TBF is allowed to send */ ++ __u32 mtu; /* Max size of packet, or minumim burst size */ ++ __u8 accel_mode; /* Dictates which data plane offloads the qdisc */ ++}; ++ ++/* NSSPRIO section */ ++ ++#define TCA_NSSPRIO_MAX_BANDS 256 ++ ++enum { ++ TCA_NSSPRIO_UNSPEC, ++ TCA_NSSPRIO_PARMS, ++ __TCA_NSSPRIO_MAX ++}; ++ ++#define TCA_NSSPRIO_MAX (__TCA_NSSPRIO_MAX - 1) ++ ++struct tc_nssprio_qopt { ++ __u32 bands; /* Number of bands */ ++ __u8 accel_mode; /* Dictates which data plane offloads the qdisc */ ++}; ++ ++/* NSSBF section */ ++ ++enum { ++ TCA_NSSBF_UNSPEC, ++ TCA_NSSBF_CLASS_PARMS, ++ TCA_NSSBF_QDISC_PARMS, ++ __TCA_NSSBF_MAX ++}; ++ ++#define TCA_NSSBF_MAX (__TCA_NSSBF_MAX - 1) ++ ++struct tc_nssbf_class_qopt { ++ __u32 burst; /* Maximum burst size */ ++ __u32 rate; /* Allowed bandwidth for this class */ ++ __u32 mtu; /* MTU of the associated interface */ ++ __u32 quantum; /* Quantum allocation for DRR */ ++}; ++ ++struct tc_nssbf_qopt { ++ __u16 defcls; /* Default class value */ ++ __u8 accel_mode; /* Dictates which data plane offloads the qdisc */ ++}; ++ ++/* NSSWRR section */ ++ ++enum { ++ TCA_NSSWRR_UNSPEC, ++ TCA_NSSWRR_CLASS_PARMS, ++ TCA_NSSWRR_QDISC_PARMS, ++ __TCA_NSSWRR_MAX ++}; ++ ++#define TCA_NSSWRR_MAX (__TCA_NSSWRR_MAX - 1) ++ ++struct tc_nsswrr_class_qopt { ++ __u32 quantum; /* Weight associated to this class */ ++}; ++ ++struct tc_nsswrr_qopt { ++ __u8 accel_mode; /* Dictates which data plane offloads the qdisc */ ++}; ++ ++/* NSSWFQ section */ ++ ++enum { ++ TCA_NSSWFQ_UNSPEC, ++ TCA_NSSWFQ_CLASS_PARMS, ++ TCA_NSSWFQ_QDISC_PARMS, ++ __TCA_NSSWFQ_MAX ++}; ++ ++#define TCA_NSSWFQ_MAX (__TCA_NSSWFQ_MAX - 1) ++ ++struct tc_nsswfq_class_qopt { ++ __u32 quantum; /* Weight associated to this class */ ++}; ++ ++struct tc_nsswfq_qopt { ++ __u8 accel_mode; /* Dictates which data plane offloads the qdisc */ ++}; ++ ++/* NSSHTB section */ ++ ++enum { ++ TCA_NSSHTB_UNSPEC, ++ TCA_NSSHTB_CLASS_PARMS, ++ TCA_NSSHTB_QDISC_PARMS, ++ __TCA_NSSHTB_MAX ++}; ++ ++#define TCA_NSSHTB_MAX (__TCA_NSSHTB_MAX - 1) ++ ++struct tc_nsshtb_class_qopt { ++ __u32 burst; /* Allowed burst size */ ++ __u32 rate; /* Allowed bandwidth for this class */ ++ __u32 cburst; /* Maximum burst size */ ++ __u32 crate; /* Maximum bandwidth for this class */ ++ __u32 quantum; /* Quantum allocation for DRR */ ++ __u32 priority; /* Priority value associated with this class */ ++ __u32 overhead; /* Overhead in bytes per packet */ ++}; ++ ++struct tc_nsshtb_qopt { ++ __u32 r2q; /* Rate to quantum ratio */ ++ __u8 accel_mode; /* Dictates which data plane offloads the qdisc */ ++}; ++ ++/* NSSBLACKHOLE section */ ++ ++enum { ++ TCA_NSSBLACKHOLE_UNSPEC, ++ TCA_NSSBLACKHOLE_PARMS, ++ __TCA_NSSBLACKHOLE_MAX ++}; ++ ++#define TCA_NSSBLACKHOLE_MAX (__TCA_NSSBLACKHOLE_MAX - 1) ++ ++struct tc_nssblackhole_qopt { ++ __u8 set_default; /* Sets qdisc to be the default qdisc for enqueue */ ++ __u8 accel_mode; /* Dictates which data plane offloads the qdisc */ ++}; ++/* QCA NSS Clients Support - End */ + #endif +--- a/net/sched/sch_api.c ++++ b/net/sched/sch_api.c +@@ -313,6 +313,7 @@ struct Qdisc *qdisc_lookup(struct net_de + out: + return q; + } ++EXPORT_SYMBOL(qdisc_lookup); + + struct Qdisc *qdisc_lookup_rcu(struct net_device *dev, u32 handle) + { +@@ -2386,4 +2387,26 @@ static int __init pktsched_init(void) + return 0; + } + ++/* QCA NSS Qdisc Support - Start */ ++bool tcf_destroy(struct tcf_proto *tp, bool force) ++{ ++ tp->ops->destroy(tp, force, NULL); ++ module_put(tp->ops->owner); ++ kfree_rcu(tp, rcu); ++ ++ return true; ++} ++ ++void tcf_destroy_chain(struct tcf_proto __rcu **fl) ++{ ++ struct tcf_proto *tp; ++ ++ while ((tp = rtnl_dereference(*fl)) != NULL) { ++ RCU_INIT_POINTER(*fl, tp->next); ++ tcf_destroy(tp, true); ++ } ++} ++EXPORT_SYMBOL(tcf_destroy_chain); ++/* QCA NSS Qdisc Support - End */ ++ + subsys_initcall(pktsched_init); +--- a/net/sched/sch_generic.c ++++ b/net/sched/sch_generic.c +@@ -1069,6 +1069,7 @@ static void __qdisc_destroy(struct Qdisc + + call_rcu(&qdisc->rcu, qdisc_free_cb); + } ++EXPORT_SYMBOL(qdisc_destroy); + + void qdisc_destroy(struct Qdisc *qdisc) + { +--- a/include/net/sch_generic.h ++++ b/include/net/sch_generic.h +@@ -94,6 +94,7 @@ struct Qdisc { + #define TCQ_F_INVISIBLE 0x80 /* invisible by default in dump */ + #define TCQ_F_NOLOCK 0x100 /* qdisc does not require locking */ + #define TCQ_F_OFFLOADED 0x200 /* qdisc is offloaded to HW */ ++#define TCQ_F_NSS 0x1000 /* NSS qdisc flag. */ + u32 limit; + const struct Qdisc_ops *ops; + struct qdisc_size_table __rcu *stab; +@@ -719,6 +720,40 @@ static inline bool skb_skip_tc_classify( + return false; + } + ++/* ++ * Set skb classify bit field. ++ */ ++static inline void skb_set_tc_classify_offload(struct sk_buff *skb) ++{ ++#ifdef CONFIG_NET_CLS_ACT ++ skb->tc_skip_classify_offload = 1; ++#endif ++} ++ ++/* ++ * Clear skb classify bit field. ++ */ ++static inline void skb_clear_tc_classify_offload(struct sk_buff *skb) ++{ ++#ifdef CONFIG_NET_CLS_ACT ++ skb->tc_skip_classify_offload = 0; ++#endif ++} ++ ++/* ++ * Skip skb processing if sent from ifb dev. ++ */ ++static inline bool skb_skip_tc_classify_offload(struct sk_buff *skb) ++{ ++#ifdef CONFIG_NET_CLS_ACT ++ if (skb->tc_skip_classify_offload) { ++ skb_clear_tc_classify_offload(skb); ++ return true; ++ } ++#endif ++ return false; ++} ++ + /* Reset all TX qdiscs greater than index of a device. */ + static inline void qdisc_reset_all_tx_gt(struct net_device *dev, unsigned int i) + { +@@ -1305,4 +1340,9 @@ static inline void qdisc_synchronize(con + msleep(1); + } + ++/* QCA NSS Qdisc Support - Start */ ++void qdisc_destroy(struct Qdisc *qdisc); ++void tcf_destroy_chain(struct tcf_proto __rcu **fl); ++/* QCA NSS Qdisc Support - End */ ++ + #endif diff --git a/target/linux/qualcommax/patches-6.1/0603-2-qca-nss-clients-add-l2tp-support.patch b/target/linux/qualcommax/patches-6.1/0603-2-qca-nss-clients-add-l2tp-support.patch new file mode 100644 index 000000000..7fa9184df --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0603-2-qca-nss-clients-add-l2tp-support.patch @@ -0,0 +1,46 @@ +--- a/net/l2tp/l2tp_core.c ++++ b/net/l2tp/l2tp_core.c +@@ -398,6 +398,31 @@ err_tlock: + } + EXPORT_SYMBOL_GPL(l2tp_session_register); + ++void l2tp_stats_update(struct l2tp_tunnel *tunnel, ++ struct l2tp_session *session, ++ struct l2tp_stats *stats) ++{ ++ atomic_long_add(atomic_long_read(&stats->rx_packets), ++ &tunnel->stats.rx_packets); ++ atomic_long_add(atomic_long_read(&stats->rx_bytes), ++ &tunnel->stats.rx_bytes); ++ atomic_long_add(atomic_long_read(&stats->tx_packets), ++ &tunnel->stats.tx_packets); ++ atomic_long_add(atomic_long_read(&stats->tx_bytes), ++ &tunnel->stats.tx_bytes); ++ ++ atomic_long_add(atomic_long_read(&stats->rx_packets), ++ &session->stats.rx_packets); ++ atomic_long_add(atomic_long_read(&stats->rx_bytes), ++ &session->stats.rx_bytes); ++ atomic_long_add(atomic_long_read(&stats->tx_packets), ++ &session->stats.tx_packets); ++ atomic_long_add(atomic_long_read(&stats->tx_bytes), ++ &session->stats.tx_bytes); ++} ++EXPORT_SYMBOL_GPL(l2tp_stats_update); ++ ++ + /***************************************************************************** + * Receive data handling + *****************************************************************************/ +--- a/net/l2tp/l2tp_core.h ++++ b/net/l2tp/l2tp_core.h +@@ -232,6 +232,9 @@ struct l2tp_session *l2tp_session_get_nt + struct l2tp_session *l2tp_session_get_by_ifname(const struct net *net, + const char *ifname); + ++void l2tp_stats_update(struct l2tp_tunnel *tunnel, struct l2tp_session *session, ++ struct l2tp_stats *stats); ++ + /* Tunnel and session lifetime management. + * Creation of a new instance is a two-step process: create, then register. + * Destruction is triggered using the *_delete functions, and completes asynchronously. diff --git a/target/linux/qualcommax/patches-6.1/0603-3-qca-nss-clients-add-PPTP-support.patch b/target/linux/qualcommax/patches-6.1/0603-3-qca-nss-clients-add-PPTP-support.patch new file mode 100644 index 000000000..5fb9917bc --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0603-3-qca-nss-clients-add-PPTP-support.patch @@ -0,0 +1,478 @@ +--- a/include/linux/if_pppox.h ++++ b/include/linux/if_pppox.h +@@ -36,6 +36,7 @@ struct pptp_opt { + u32 ack_sent, ack_recv; + u32 seq_sent, seq_recv; + int ppp_flags; ++ bool pptp_offload_mode; + }; + #include + +@@ -100,8 +101,40 @@ struct pppoe_channel_ops { + int (*get_addressing)(struct ppp_channel *, struct pppoe_opt *); + }; + ++/* PPTP client callback */ ++typedef int (*pptp_gre_seq_offload_callback_t)(struct sk_buff *skb, ++ struct net_device *pptp_dev); ++ + /* Return PPPoE channel specific addressing information */ + extern int pppoe_channel_addressing_get(struct ppp_channel *chan, + struct pppoe_opt *addressing); + ++/* Lookup PPTP session info and return PPTP session using sip, dip and local call id */ ++extern int pptp_session_find_by_src_callid(struct pptp_opt *opt, __be16 src_call_id, ++ __be32 daddr, __be32 saddr); ++ ++/* Lookup PPTP session info and return PPTP session using dip and peer call id */ ++extern int pptp_session_find(struct pptp_opt *opt, __be16 peer_call_id, ++ __be32 peer_ip_addr); ++ ++/* Return PPTP session information given the channel */ ++extern void pptp_channel_addressing_get(struct pptp_opt *opt, ++ struct ppp_channel *chan); ++ ++/* Enable the PPTP session offload flag */ ++extern int pptp_session_enable_offload_mode(__be16 peer_call_id, ++ __be32 peer_ip_addr); ++ ++/* Disable the PPTP session offload flag */ ++extern int pptp_session_disable_offload_mode(__be16 peer_call_id, ++ __be32 peer_ip_addr); ++ ++/* Register the PPTP GRE packets sequence number offload callback */ ++extern int ++pptp_register_gre_seq_offload_callback(pptp_gre_seq_offload_callback_t ++ pptp_client_cb); ++ ++/* Unregister the PPTP GRE packets sequence number offload callback */ ++extern void pptp_unregister_gre_seq_offload_callback(void); ++ + #endif /* !(__LINUX_IF_PPPOX_H) */ +--- a/drivers/net/ppp/ppp_generic.c ++++ b/drivers/net/ppp/ppp_generic.c +@@ -2973,6 +2973,20 @@ char *ppp_dev_name(struct ppp_channel *c + return name; + } + ++/* Return the PPP net device index */ ++int ppp_dev_index(struct ppp_channel *chan) ++{ ++ struct channel *pch = chan->ppp; ++ int ifindex = 0; ++ ++ if (pch) { ++ read_lock_bh(&pch->upl); ++ if (pch->ppp && pch->ppp->dev) ++ ifindex = pch->ppp->dev->ifindex; ++ read_unlock_bh(&pch->upl); ++ } ++ return ifindex; ++} + + /* + * Disconnect a channel from the generic layer. +@@ -3681,6 +3695,28 @@ void ppp_update_stats(struct net_device + ppp_recv_unlock(ppp); + } + ++/* Returns true if Compression is enabled on PPP device ++ */ ++bool ppp_is_cp_enabled(struct net_device *dev) ++{ ++ struct ppp *ppp; ++ bool flag = false; ++ ++ if (!dev) ++ return false; ++ ++ if (dev->type != ARPHRD_PPP) ++ return false; ++ ++ ppp = netdev_priv(dev); ++ ppp_lock(ppp); ++ flag = !!(ppp->xstate & SC_COMP_RUN) || !!(ppp->rstate & SC_DECOMP_RUN); ++ ppp_unlock(ppp); ++ ++ return flag; ++} ++EXPORT_SYMBOL(ppp_is_cp_enabled); ++ + /* Returns >0 if the device is a multilink PPP netdevice, 0 if not or < 0 if + * the device is not PPP. + */ +@@ -3872,6 +3908,7 @@ EXPORT_SYMBOL(ppp_unregister_channel); + EXPORT_SYMBOL(ppp_channel_index); + EXPORT_SYMBOL(ppp_unit_number); + EXPORT_SYMBOL(ppp_dev_name); ++EXPORT_SYMBOL(ppp_dev_index); + EXPORT_SYMBOL(ppp_input); + EXPORT_SYMBOL(ppp_input_error); + EXPORT_SYMBOL(ppp_output_wakeup); +--- a/include/linux/ppp_channel.h ++++ b/include/linux/ppp_channel.h +@@ -84,6 +84,9 @@ extern void ppp_unregister_channel(struc + /* Get the channel number for a channel */ + extern int ppp_channel_index(struct ppp_channel *); + ++/* Get the device index associated with a channel, or 0, if none */ ++extern int ppp_dev_index(struct ppp_channel *); ++ + /* Get the unit number associated with a channel, or -1 if none */ + extern int ppp_unit_number(struct ppp_channel *); + +@@ -116,6 +119,7 @@ extern int ppp_hold_channels(struct net_ + /* Test if ppp xmit lock is locked */ + extern bool ppp_is_xmit_locked(struct net_device *dev); + ++bool ppp_is_cp_enabled(struct net_device *dev); + /* Test if the ppp device is a multi-link ppp device */ + extern int ppp_is_multilink(struct net_device *dev); + +--- a/drivers/net/ppp/pptp.c ++++ b/drivers/net/ppp/pptp.c +@@ -50,6 +50,8 @@ static struct proto pptp_sk_proto __read + static const struct ppp_channel_ops pptp_chan_ops; + static const struct proto_ops pptp_ops; + ++static pptp_gre_seq_offload_callback_t __rcu pptp_gre_offload_xmit_cb; ++ + static struct pppox_sock *lookup_chan(u16 call_id, __be32 s_addr) + { + struct pppox_sock *sock; +@@ -91,6 +93,79 @@ static int lookup_chan_dst(u16 call_id, + return i < MAX_CALLID; + } + ++/* Search a pptp session based on local call id, local and remote ip address */ ++static int lookup_session_src(struct pptp_opt *opt, u16 call_id, __be32 daddr, __be32 saddr) ++{ ++ struct pppox_sock *sock; ++ int i = 1; ++ ++ rcu_read_lock(); ++ for_each_set_bit_from(i, callid_bitmap, MAX_CALLID) { ++ sock = rcu_dereference(callid_sock[i]); ++ if (!sock) ++ continue; ++ ++ if (sock->proto.pptp.src_addr.call_id == call_id && ++ sock->proto.pptp.dst_addr.sin_addr.s_addr == daddr && ++ sock->proto.pptp.src_addr.sin_addr.s_addr == saddr) { ++ sock_hold(sk_pppox(sock)); ++ memcpy(opt, &sock->proto.pptp, sizeof(struct pptp_opt)); ++ sock_put(sk_pppox(sock)); ++ rcu_read_unlock(); ++ return 0; ++ } ++ } ++ rcu_read_unlock(); ++ return -EINVAL; ++} ++ ++/* Search a pptp session based on peer call id and peer ip address */ ++static int lookup_session_dst(struct pptp_opt *opt, u16 call_id, __be32 d_addr) ++{ ++ struct pppox_sock *sock; ++ int i = 1; ++ ++ rcu_read_lock(); ++ for_each_set_bit_from(i, callid_bitmap, MAX_CALLID) { ++ sock = rcu_dereference(callid_sock[i]); ++ if (!sock) ++ continue; ++ ++ if (sock->proto.pptp.dst_addr.call_id == call_id && ++ sock->proto.pptp.dst_addr.sin_addr.s_addr == d_addr) { ++ sock_hold(sk_pppox(sock)); ++ memcpy(opt, &sock->proto.pptp, sizeof(struct pptp_opt)); ++ sock_put(sk_pppox(sock)); ++ rcu_read_unlock(); ++ return 0; ++ } ++ } ++ rcu_read_unlock(); ++ return -EINVAL; ++} ++ ++/* If offload mode set then this function sends all packets to ++ * offload module instead of network stack ++ */ ++static int pptp_client_skb_xmit(struct sk_buff *skb, ++ struct net_device *pptp_dev) ++{ ++ pptp_gre_seq_offload_callback_t pptp_gre_offload_cb_f; ++ int ret; ++ ++ rcu_read_lock(); ++ pptp_gre_offload_cb_f = rcu_dereference(pptp_gre_offload_xmit_cb); ++ ++ if (!pptp_gre_offload_cb_f) { ++ rcu_read_unlock(); ++ return -1; ++ } ++ ++ ret = pptp_gre_offload_cb_f(skb, pptp_dev); ++ rcu_read_unlock(); ++ return ret; ++} ++ + static int add_chan(struct pppox_sock *sock, + struct pptp_addr *sa) + { +@@ -136,7 +211,7 @@ static struct rtable *pptp_route_output( + struct net *net; + + net = sock_net(sk); +- flowi4_init_output(fl4, sk->sk_bound_dev_if, sk->sk_mark, 0, ++ flowi4_init_output(fl4, 0, sk->sk_mark, 0, + RT_SCOPE_UNIVERSE, IPPROTO_GRE, 0, + po->proto.pptp.dst_addr.sin_addr.s_addr, + po->proto.pptp.src_addr.sin_addr.s_addr, +@@ -163,8 +238,11 @@ static int pptp_xmit(struct ppp_channel + + struct rtable *rt; + struct net_device *tdev; ++ struct net_device *pptp_dev; + struct iphdr *iph; + int max_headroom; ++ int pptp_ifindex; ++ int ret; + + if (sk_pppox(po)->sk_state & PPPOX_DEAD) + goto tx_error; +@@ -258,7 +336,32 @@ static int pptp_xmit(struct ppp_channel + ip_select_ident(net, skb, NULL); + ip_send_check(iph); + +- ip_local_out(net, skb->sk, skb); ++ pptp_ifindex = ppp_dev_index(chan); ++ ++ /* set incoming interface as the ppp interface */ ++ if (skb->skb_iif) ++ skb->skb_iif = pptp_ifindex; ++ ++ /* If the PPTP GRE seq number offload module is not enabled yet ++ * then sends all PPTP GRE packets through linux network stack ++ */ ++ if (!opt->pptp_offload_mode) { ++ ip_local_out(net, skb->sk, skb); ++ return 1; ++ } ++ ++ pptp_dev = dev_get_by_index(&init_net, pptp_ifindex); ++ if (!pptp_dev) ++ goto tx_error; ++ ++ /* If PPTP offload module is enabled then forward all PPTP GRE ++ * packets to PPTP GRE offload module ++ */ ++ ret = pptp_client_skb_xmit(skb, pptp_dev); ++ dev_put(pptp_dev); ++ if (ret < 0) ++ goto tx_error; ++ + return 1; + + tx_error: +@@ -314,6 +417,13 @@ static int pptp_rcv_core(struct sock *sk + goto drop; + + payload = skb->data + headersize; ++ ++ /* If offload is enabled, we expect the offload module ++ * to handle PPTP GRE sequence number checks ++ */ ++ if (opt->pptp_offload_mode) ++ goto allow_packet; ++ + /* check for expected sequence number */ + if (seq < opt->seq_recv + 1 || WRAPPED(opt->seq_recv, seq)) { + if ((payload[0] == PPP_ALLSTATIONS) && (payload[1] == PPP_UI) && +@@ -371,6 +481,7 @@ static int pptp_rcv(struct sk_buff *skb) + if (po) { + skb_dst_drop(skb); + nf_reset_ct(skb); ++ skb->skb_iif = ppp_dev_index(&po->chan); + return sk_receive_skb(sk_pppox(po), skb, 0); + } + drop: +@@ -473,7 +584,7 @@ static int pptp_connect(struct socket *s + + opt->dst_addr = sp->sa_addr.pptp; + sk->sk_state |= PPPOX_CONNECTED; +- ++ opt->pptp_offload_mode = false; + end: + release_sock(sk); + return error; +@@ -603,9 +714,169 @@ static int pptp_ppp_ioctl(struct ppp_cha + return err; + } + ++/* pptp_channel_addressing_get() ++ * Return PPTP channel specific addressing information. ++ */ ++void pptp_channel_addressing_get(struct pptp_opt *opt, struct ppp_channel *chan) ++{ ++ struct sock *sk; ++ struct pppox_sock *po; ++ ++ if (!opt) ++ return; ++ ++ sk = (struct sock *)chan->private; ++ if (!sk) ++ return; ++ ++ sock_hold(sk); ++ ++ /* This is very unlikely, but check the socket is connected state */ ++ if (unlikely(sock_flag(sk, SOCK_DEAD) || ++ !(sk->sk_state & PPPOX_CONNECTED))) { ++ sock_put(sk); ++ return; ++ } ++ ++ po = pppox_sk(sk); ++ memcpy(opt, &po->proto.pptp, sizeof(struct pptp_opt)); ++ sock_put(sk); ++} ++EXPORT_SYMBOL(pptp_channel_addressing_get); ++ ++/* pptp_session_find() ++ * Search and return a PPTP session info based on peer callid and IP ++ * address. The function accepts the parameters in network byte order. ++ */ ++int pptp_session_find(struct pptp_opt *opt, __be16 peer_call_id, ++ __be32 peer_ip_addr) ++{ ++ if (!opt) ++ return -EINVAL; ++ ++ return lookup_session_dst(opt, ntohs(peer_call_id), peer_ip_addr); ++} ++EXPORT_SYMBOL(pptp_session_find); ++ ++/* pptp_session_find_by_src_callid() ++ * Search and return a PPTP session info based on src callid and IP ++ * address. The function accepts the parameters in network byte order. ++ */ ++int pptp_session_find_by_src_callid(struct pptp_opt *opt, __be16 src_call_id, ++ __be32 daddr, __be32 saddr) ++{ ++ if (!opt) ++ return -EINVAL; ++ ++ return lookup_session_src(opt, ntohs(src_call_id), daddr, saddr); ++} ++EXPORT_SYMBOL(pptp_session_find_by_src_callid); ++ ++ /* Function to change the offload mode true/false for a PPTP session */ ++static int pptp_set_offload_mode(bool accel_mode, ++ __be16 peer_call_id, __be32 peer_ip_addr) ++{ ++ struct pppox_sock *sock; ++ int i = 1; ++ ++ rcu_read_lock(); ++ for_each_set_bit_from(i, callid_bitmap, MAX_CALLID) { ++ sock = rcu_dereference(callid_sock[i]); ++ if (!sock) ++ continue; ++ ++ if (sock->proto.pptp.dst_addr.call_id == peer_call_id && ++ sock->proto.pptp.dst_addr.sin_addr.s_addr == peer_ip_addr) { ++ sock_hold(sk_pppox(sock)); ++ sock->proto.pptp.pptp_offload_mode = accel_mode; ++ sock_put(sk_pppox(sock)); ++ rcu_read_unlock(); ++ return 0; ++ } ++ } ++ rcu_read_unlock(); ++ return -EINVAL; ++} ++ ++/* Enable the PPTP session offload flag */ ++int pptp_session_enable_offload_mode(__be16 peer_call_id, __be32 peer_ip_addr) ++{ ++ return pptp_set_offload_mode(true, peer_call_id, peer_ip_addr); ++} ++EXPORT_SYMBOL(pptp_session_enable_offload_mode); ++ ++/* Disable the PPTP session offload flag */ ++int pptp_session_disable_offload_mode(__be16 peer_call_id, __be32 peer_ip_addr) ++{ ++ return pptp_set_offload_mode(false, peer_call_id, peer_ip_addr); ++} ++EXPORT_SYMBOL(pptp_session_disable_offload_mode); ++ ++/* Register the offload callback function on behalf of the module which ++ * will own the sequence and acknowledgment number updates for all ++ * PPTP GRE packets. All PPTP GRE packets are then transmitted to this ++ * module after encapsulation in order to ensure the correct seq/ack ++ * fields are set in the packets before transmission. This is required ++ * when PPTP flows are offloaded to acceleration engines, in-order to ++ * ensure consistency in sequence and ack numbers between PPTP control ++ * (PPP LCP) and data packets ++ */ ++int pptp_register_gre_seq_offload_callback(pptp_gre_seq_offload_callback_t ++ pptp_gre_offload_cb) ++{ ++ pptp_gre_seq_offload_callback_t pptp_gre_offload_cb_f; ++ ++ rcu_read_lock(); ++ pptp_gre_offload_cb_f = rcu_dereference(pptp_gre_offload_xmit_cb); ++ ++ if (pptp_gre_offload_cb_f) { ++ rcu_read_unlock(); ++ return -1; ++ } ++ ++ rcu_assign_pointer(pptp_gre_offload_xmit_cb, pptp_gre_offload_cb); ++ rcu_read_unlock(); ++ return 0; ++} ++EXPORT_SYMBOL(pptp_register_gre_seq_offload_callback); ++ ++/* Unregister the PPTP GRE packets sequence number offload callback */ ++void pptp_unregister_gre_seq_offload_callback(void) ++{ ++ rcu_assign_pointer(pptp_gre_offload_xmit_cb, NULL); ++} ++EXPORT_SYMBOL(pptp_unregister_gre_seq_offload_callback); ++ ++/* pptp_hold_chan() */ ++static void pptp_hold_chan(struct ppp_channel *chan) ++{ ++ struct sock *sk = (struct sock *)chan->private; ++ ++ sock_hold(sk); ++} ++ ++/* pptp_release_chan() */ ++static void pptp_release_chan(struct ppp_channel *chan) ++{ ++ struct sock *sk = (struct sock *)chan->private; ++ ++ sock_put(sk); ++} ++ ++/* pptp_get_channel_protocol() ++ * Return the protocol type of the PPTP over PPP protocol ++ */ ++static int pptp_get_channel_protocol(struct ppp_channel *chan) ++{ ++ return PX_PROTO_PPTP; ++} ++ + static const struct ppp_channel_ops pptp_chan_ops = { + .start_xmit = pptp_xmit, + .ioctl = pptp_ppp_ioctl, ++ .get_channel_protocol = pptp_get_channel_protocol, ++ .hold = pptp_hold_chan, ++ .release = pptp_release_chan, + }; + + static struct proto pptp_sk_proto __read_mostly = { diff --git a/target/linux/qualcommax/patches-6.1/0603-4-qca-nss-clients-add-iptunnel-support.patch b/target/linux/qualcommax/patches-6.1/0603-4-qca-nss-clients-add-iptunnel-support.patch new file mode 100644 index 000000000..df57fbd6c --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0603-4-qca-nss-clients-add-iptunnel-support.patch @@ -0,0 +1,77 @@ +--- a/include/net/ip6_tunnel.h ++++ b/include/net/ip6_tunnel.h +@@ -36,6 +36,7 @@ struct __ip6_tnl_parm { + __u8 proto; /* tunnel protocol */ + __u8 encap_limit; /* encapsulation limit for tunnel */ + __u8 hop_limit; /* hop limit for tunnel */ ++ __u8 draft03; /* FMR using draft03 of map-e - QCA NSS Clients Support */ + bool collect_md; + __be32 flowinfo; /* traffic class and flowlabel for tunnel */ + __u32 flags; /* tunnel flags */ +--- a/include/net/ip_tunnels.h ++++ b/include/net/ip_tunnels.h +@@ -587,4 +587,9 @@ static inline void ip_tunnel_info_opts_s + + #endif /* CONFIG_INET */ + ++/* QCA NSS Clients Support - Start */ ++void ipip6_update_offload_stats(struct net_device *dev, void *ptr); ++void ip6_update_offload_stats(struct net_device *dev, void *ptr); ++/* QCA NSS Clients Support - End */ ++ + #endif /* __NET_IP_TUNNELS_H */ +--- a/net/ipv6/ip6_tunnel.c ++++ b/net/ipv6/ip6_tunnel.c +@@ -2413,6 +2413,26 @@ nla_put_failure: + return -EMSGSIZE; + } + ++/* QCA NSS Client Support - Start */ ++/* ++ * Update offload stats ++ */ ++void ip6_update_offload_stats(struct net_device *dev, void *ptr) ++{ ++ struct pcpu_sw_netstats *tstats = per_cpu_ptr(dev->tstats, 0); ++ const struct pcpu_sw_netstats *offload_stats = ++ (struct pcpu_sw_netstats *)ptr; ++ ++ u64_stats_update_begin(&tstats->syncp); ++ u64_stats_add(&tstats->tx_packets, u64_stats_read(&offload_stats->tx_packets)); ++ u64_stats_add(&tstats->tx_bytes, u64_stats_read(&offload_stats->tx_bytes)); ++ u64_stats_add(&tstats->rx_packets, u64_stats_read(&offload_stats->rx_packets)); ++ u64_stats_add(&tstats->rx_bytes, u64_stats_read(&offload_stats->rx_bytes)); ++ u64_stats_update_end(&tstats->syncp); ++} ++EXPORT_SYMBOL(ip6_update_offload_stats); ++/* QCA NSS Client Support - End */ ++ + struct net *ip6_tnl_get_link_net(const struct net_device *dev) + { + struct ip6_tnl *tunnel = netdev_priv(dev); +--- a/net/ipv6/sit.c ++++ b/net/ipv6/sit.c +@@ -1733,6 +1733,23 @@ nla_put_failure: + return -EMSGSIZE; + } + ++/* QCA NSS Clients Support - Start */ ++void ipip6_update_offload_stats(struct net_device *dev, void *ptr) ++{ ++ struct pcpu_sw_netstats *tstats = per_cpu_ptr(dev->tstats, 0); ++ const struct pcpu_sw_netstats *offload_stats = ++ (struct pcpu_sw_netstats *)ptr; ++ ++ u64_stats_update_begin(&tstats->syncp); ++ u64_stats_add(&tstats->tx_packets, u64_stats_read(&offload_stats->tx_packets)); ++ u64_stats_add(&tstats->tx_bytes, u64_stats_read(&offload_stats->tx_bytes)); ++ u64_stats_add(&tstats->rx_packets, u64_stats_read(&offload_stats->rx_packets)); ++ u64_stats_add(&tstats->rx_bytes, u64_stats_read(&offload_stats->rx_bytes)); ++ u64_stats_update_end(&tstats->syncp); ++} ++EXPORT_SYMBOL(ipip6_update_offload_stats); ++/* QCA NSS Clients Support - End */ ++ + static const struct nla_policy ipip6_policy[IFLA_IPTUN_MAX + 1] = { + [IFLA_IPTUN_LINK] = { .type = NLA_U32 }, + [IFLA_IPTUN_LOCAL] = { .type = NLA_U32 }, diff --git a/target/linux/qualcommax/patches-6.1/0603-5-qca-nss-clients-add-vxlan-support.patch b/target/linux/qualcommax/patches-6.1/0603-5-qca-nss-clients-add-vxlan-support.patch new file mode 100644 index 000000000..94b6201c7 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0603-5-qca-nss-clients-add-vxlan-support.patch @@ -0,0 +1,103 @@ +--- a/drivers/net/vxlan/vxlan_core.c ++++ b/drivers/net/vxlan/vxlan_core.c +@@ -71,6 +71,20 @@ static inline bool vxlan_collect_metadat + ip_tunnel_collect_metadata(); + } + ++ATOMIC_NOTIFIER_HEAD(vxlan_fdb_notifier_list); ++ ++void vxlan_fdb_register_notify(struct notifier_block *nb) ++{ ++ atomic_notifier_chain_register(&vxlan_fdb_notifier_list, nb); ++} ++EXPORT_SYMBOL(vxlan_fdb_register_notify); ++ ++void vxlan_fdb_unregister_notify(struct notifier_block *nb) ++{ ++ atomic_notifier_chain_unregister(&vxlan_fdb_notifier_list, nb); ++} ++EXPORT_SYMBOL(vxlan_fdb_unregister_notify); ++ + #if IS_ENABLED(CONFIG_IPV6) + static int vxlan_nla_get_addr(union vxlan_addr *ip, struct nlattr *nla) + { +@@ -307,6 +321,7 @@ static void __vxlan_fdb_notify(struct vx + { + struct net *net = dev_net(vxlan->dev); + struct sk_buff *skb; ++ struct vxlan_fdb_event vfe; + int err = -ENOBUFS; + + skb = nlmsg_new(vxlan_nlmsg_size(), GFP_ATOMIC); +@@ -322,6 +337,10 @@ static void __vxlan_fdb_notify(struct vx + } + + rtnl_notify(skb, net, 0, RTNLGRP_NEIGH, NULL, GFP_ATOMIC); ++ vfe.dev = vxlan->dev; ++ vfe.rdst = rd; ++ ether_addr_copy(vfe.eth_addr, fdb->eth_addr); ++ atomic_notifier_call_chain(&vxlan_fdb_notifier_list, type, (void *)&vfe); + return; + errout: + if (err < 0) +@@ -488,6 +507,18 @@ static struct vxlan_fdb *vxlan_find_mac( + return f; + } + ++/* Find and update age of fdb entry corresponding to MAC. */ ++void vxlan_fdb_update_mac(struct vxlan_dev *vxlan, const u8 *mac, uint32_t vni) ++{ ++ u32 hash_index; ++ ++ hash_index = fdb_head_index(vxlan, mac, vni); ++ spin_lock_bh(&vxlan->hash_lock[hash_index]); ++ vxlan_find_mac(vxlan, mac, vni); ++ spin_unlock_bh(&vxlan->hash_lock[hash_index]); ++} ++EXPORT_SYMBOL(vxlan_fdb_update_mac); ++ + /* caller should hold vxlan->hash_lock */ + static struct vxlan_rdst *vxlan_fdb_find_rdst(struct vxlan_fdb *f, + union vxlan_addr *ip, __be16 port, +@@ -2675,6 +2706,9 @@ static void vxlan_xmit_one(struct sk_buf + goto out_unlock; + } + ++ /* Reset the skb_iif to Tunnels interface index */ ++ skb->skb_iif = dev->ifindex; ++ + tos = ip_tunnel_ecn_encap(tos, old_iph, skb); + ttl = ttl ? : ip4_dst_hoplimit(&rt->dst); + err = vxlan_build_skb(skb, ndst, sizeof(struct iphdr), +@@ -2746,6 +2780,9 @@ static void vxlan_xmit_one(struct sk_buf + if (err < 0) + goto tx_error; + ++ /* Reset the skb_iif to Tunnels interface index */ ++ skb->skb_iif = dev->ifindex; ++ + udp_tunnel6_xmit_skb(ndst, sock6->sock->sk, skb, dev, + &local_ip.sin6.sin6_addr, + &dst->sin6.sin6_addr, tos, ttl, +--- a/include/net/vxlan.h ++++ b/include/net/vxlan.h +@@ -344,6 +344,19 @@ struct vxlan_dev { + VXLAN_F_COLLECT_METADATA | \ + VXLAN_F_VNIFILTER) + ++/* ++ * Application data for fdb notifier event ++ */ ++struct vxlan_fdb_event { ++ struct net_device *dev; ++ struct vxlan_rdst *rdst; ++ u8 eth_addr[ETH_ALEN]; ++}; ++ ++extern void vxlan_fdb_register_notify(struct notifier_block *nb); ++extern void vxlan_fdb_unregister_notify(struct notifier_block *nb); ++extern void vxlan_fdb_update_mac(struct vxlan_dev *vxlan, const u8 *mac, uint32_t vni); ++ + struct net_device *vxlan_dev_create(struct net *net, const char *name, + u8 name_assign_type, struct vxlan_config *conf); + diff --git a/target/linux/qualcommax/patches-6.1/0603-6-qca-nss-clients-add-l2tp-offloading-support.patch b/target/linux/qualcommax/patches-6.1/0603-6-qca-nss-clients-add-l2tp-offloading-support.patch new file mode 100644 index 000000000..4032eb3c2 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0603-6-qca-nss-clients-add-l2tp-offloading-support.patch @@ -0,0 +1,368 @@ +--- a/include/linux/ppp_channel.h ++++ b/include/linux/ppp_channel.h +@@ -61,6 +61,51 @@ struct ppp_channel { + }; + + #ifdef __KERNEL__ ++/* Call this to obtain the underlying protocol of the PPP channel, ++ * e.g. PX_PROTO_OE ++ */ ++extern int ppp_channel_get_protocol(struct ppp_channel *); ++ ++/* Call this to hold a channel */ ++extern bool ppp_channel_hold(struct ppp_channel *); ++ ++/* Call this to release a hold you have upon a channel */ ++extern void ppp_channel_release(struct ppp_channel *); ++ ++/* Release hold on PPP channels */ ++extern void ppp_release_channels(struct ppp_channel *channels[], ++ unsigned int chan_sz); ++ ++/* Test if ppp xmit lock is locked */ ++extern bool ppp_is_xmit_locked(struct net_device *dev); ++ ++/* Call this get protocol version */ ++extern int ppp_channel_get_proto_version(struct ppp_channel *); ++ ++/* Get the device index associated with a channel, or 0, if none */ ++extern int ppp_dev_index(struct ppp_channel *); ++ ++/* Hold PPP channels for the PPP device */ ++extern int ppp_hold_channels(struct net_device *dev, ++ struct ppp_channel *channels[], ++ unsigned int chan_sz); ++extern int __ppp_hold_channels(struct net_device *dev, ++ struct ppp_channel *channels[], ++ unsigned int chan_sz); ++ ++/* Test if the ppp device is a multi-link ppp device */ ++extern int ppp_is_multilink(struct net_device *dev); ++extern int __ppp_is_multilink(struct net_device *dev); ++ ++/* Update statistics of the PPP net_device by incrementing related ++ * statistics field value with corresponding parameter ++ */ ++extern void ppp_update_stats(struct net_device *dev, unsigned long rx_packets, ++ unsigned long rx_bytes, unsigned long tx_packets, ++ unsigned long tx_bytes, unsigned long rx_errors, ++ unsigned long tx_errors, unsigned long rx_dropped, ++ unsigned long tx_dropped); ++ + /* Called by the channel when it can send some more data. */ + extern void ppp_output_wakeup(struct ppp_channel *); + +@@ -148,5 +193,17 @@ extern void ppp_update_stats(struct net_ + * that ppp_unregister_channel returns. + */ + ++/* QCA NSS Clients Support - Start */ ++/* PPP channel connection event types */ ++#define PPP_CHANNEL_DISCONNECT 0 ++#define PPP_CHANNEL_CONNECT 1 ++ ++/* Register the PPP channel connect notifier */ ++extern void ppp_channel_connection_register_notify(struct notifier_block *nb); ++ ++/* Unregister the PPP channel connect notifier */ ++extern void ppp_channel_connection_unregister_notify(struct notifier_block *nb); ++/* QCA NSS Clients Support - End */ ++ + #endif /* __KERNEL__ */ + #endif +--- a/include/linux/if_pppol2tp.h ++++ b/include/linux/if_pppol2tp.h +@@ -12,4 +12,30 @@ + #include + #include + ++/* QCA NSS ECM support - Start */ ++/* ++ * Holds L2TP channel info ++ */ ++struct pppol2tp_common_addr { ++ int tunnel_version; /* v2 or v3 */ ++ __u32 local_tunnel_id, remote_tunnel_id; /* tunnel id */ ++ __u32 local_session_id, remote_session_id; /* session id */ ++ struct sockaddr_in local_addr, remote_addr; /* ip address and port */ ++}; ++ ++/* ++ * L2TP channel operations ++ */ ++struct pppol2tp_channel_ops { ++ struct ppp_channel_ops ops; /* ppp channel ops */ ++}; ++ ++/* ++ * exported function which calls pppol2tp channel's get addressing ++ * function ++ */ ++extern int pppol2tp_channel_addressing_get(struct ppp_channel *, ++ struct pppol2tp_common_addr *); ++/* QCA NSS ECM support - End */ ++ + #endif +--- a/net/l2tp/l2tp_ppp.c ++++ b/net/l2tp/l2tp_ppp.c +@@ -123,9 +123,17 @@ struct pppol2tp_session { + }; + + static int pppol2tp_xmit(struct ppp_channel *chan, struct sk_buff *skb); +- +-static const struct ppp_channel_ops pppol2tp_chan_ops = { +- .start_xmit = pppol2tp_xmit, ++static int pppol2tp_get_channel_protocol(struct ppp_channel *); ++static int pppol2tp_get_channel_protocol_ver(struct ppp_channel *); ++static void pppol2tp_hold_chan(struct ppp_channel *); ++static void pppol2tp_release_chan(struct ppp_channel *); ++ ++static const struct pppol2tp_channel_ops pppol2tp_chan_ops = { ++ .ops.start_xmit = pppol2tp_xmit, ++ .ops.get_channel_protocol = pppol2tp_get_channel_protocol, ++ .ops.get_channel_protocol_ver = pppol2tp_get_channel_protocol_ver, ++ .ops.hold = pppol2tp_hold_chan, ++ .ops.release = pppol2tp_release_chan, + }; + + static const struct proto_ops pppol2tp_ops; +@@ -373,6 +381,13 @@ static int pppol2tp_xmit(struct ppp_chan + skb->data[0] = PPP_ALLSTATIONS; + skb->data[1] = PPP_UI; + ++ /* QCA NSS ECM support - start */ ++ /* set incoming interface as the ppp interface */ ++ if ((skb->protocol == htons(ETH_P_IP)) || ++ (skb->protocol == htons(ETH_P_IPV6))) ++ skb->skb_iif = ppp_dev_index(chan); ++ /* QCA NSS ECM support - End */ ++ + local_bh_disable(); + l2tp_xmit_skb(session, skb); + local_bh_enable(); +@@ -818,7 +833,7 @@ static int pppol2tp_connect(struct socke + po->chan.hdrlen = PPPOL2TP_L2TP_HDR_SIZE_NOSEQ; + + po->chan.private = sk; +- po->chan.ops = &pppol2tp_chan_ops; ++ po->chan.ops = (struct ppp_channel_ops *)&pppol2tp_chan_ops.ops; + po->chan.mtu = pppol2tp_tunnel_mtu(tunnel); + + error = ppp_register_net_channel(sock_net(sk), &po->chan); +@@ -1732,6 +1747,109 @@ static void __exit pppol2tp_exit(void) + unregister_pernet_device(&pppol2tp_net_ops); + } + ++/* QCA NSS ECM support - Start */ ++/* pppol2tp_hold_chan() */ ++static void pppol2tp_hold_chan(struct ppp_channel *chan) ++{ ++ struct sock *sk = (struct sock *)chan->private; ++ ++ sock_hold(sk); ++} ++ ++/* pppol2tp_release_chan() */ ++static void pppol2tp_release_chan(struct ppp_channel *chan) ++{ ++ struct sock *sk = (struct sock *)chan->private; ++ ++ sock_put(sk); ++} ++ ++/* pppol2tp_get_channel_protocol() ++ * Return the protocol type of the L2TP over PPP protocol ++ */ ++static int pppol2tp_get_channel_protocol(struct ppp_channel *chan) ++{ ++ return PX_PROTO_OL2TP; ++} ++ ++/* pppol2tp_get_channel_protocol_ver() ++ * Return the protocol version of the L2TP over PPP protocol ++ */ ++static int pppol2tp_get_channel_protocol_ver(struct ppp_channel *chan) ++{ ++ struct sock *sk; ++ struct l2tp_session *session; ++ struct l2tp_tunnel *tunnel; ++ int version = 0; ++ ++ if (chan && chan->private) ++ sk = (struct sock *)chan->private; ++ else ++ return -1; ++ ++ /* Get session and tunnel contexts from the socket */ ++ session = pppol2tp_sock_to_session(sk); ++ if (!session) ++ return -1; ++ ++ tunnel = session->tunnel; ++ if (!tunnel) { ++ sock_put(sk); ++ return -1; ++ } ++ ++ version = tunnel->version; ++ ++ sock_put(sk); ++ ++ return version; ++} ++ ++/* pppol2tp_get_addressing() */ ++static int pppol2tp_get_addressing(struct ppp_channel *chan, ++ struct pppol2tp_common_addr *addr) ++{ ++ struct sock *sk = (struct sock *)chan->private; ++ struct l2tp_session *session; ++ struct l2tp_tunnel *tunnel; ++ struct inet_sock *isk = NULL; ++ int err = -ENXIO; ++ ++ /* Get session and tunnel contexts from the socket */ ++ session = pppol2tp_sock_to_session(sk); ++ if (!session) ++ return err; ++ ++ tunnel = session->tunnel; ++ if (!tunnel) { ++ sock_put(sk); ++ return err; ++ } ++ isk = inet_sk(tunnel->sock); ++ ++ addr->local_tunnel_id = tunnel->tunnel_id; ++ addr->remote_tunnel_id = tunnel->peer_tunnel_id; ++ addr->local_session_id = session->session_id; ++ addr->remote_session_id = session->peer_session_id; ++ ++ addr->local_addr.sin_port = isk->inet_sport; ++ addr->remote_addr.sin_port = isk->inet_dport; ++ addr->local_addr.sin_addr.s_addr = isk->inet_saddr; ++ addr->remote_addr.sin_addr.s_addr = isk->inet_daddr; ++ ++ sock_put(sk); ++ return 0; ++} ++ ++/* pppol2tp_channel_addressing_get() */ ++int pppol2tp_channel_addressing_get(struct ppp_channel *chan, ++ struct pppol2tp_common_addr *addr) ++{ ++ return pppol2tp_get_addressing(chan, addr); ++} ++EXPORT_SYMBOL(pppol2tp_channel_addressing_get); ++/* QCA NSS ECM support - End */ ++ + module_init(pppol2tp_init); + module_exit(pppol2tp_exit); + +--- a/drivers/net/ppp/ppp_generic.c ++++ b/drivers/net/ppp/ppp_generic.c +@@ -3743,6 +3743,32 @@ int ppp_is_multilink(struct net_device * + } + EXPORT_SYMBOL(ppp_is_multilink); + ++/* __ppp_is_multilink() ++ * Returns >0 if the device is a multilink PPP netdevice, 0 if not or < 0 ++ * if the device is not PPP. Caller should acquire ppp_lock before calling ++ * this function ++ */ ++int __ppp_is_multilink(struct net_device *dev) ++{ ++ struct ppp *ppp; ++ unsigned int flags; ++ ++ if (!dev) ++ return -1; ++ ++ if (dev->type != ARPHRD_PPP) ++ return -1; ++ ++ ppp = netdev_priv(dev); ++ flags = ppp->flags; ++ ++ if (flags & SC_MULTILINK) ++ return 1; ++ ++ return 0; ++} ++EXPORT_SYMBOL(__ppp_is_multilink); ++ + /* ppp_channel_get_protocol() + * Call this to obtain the underlying protocol of the PPP channel, + * e.g. PX_PROTO_OE +@@ -3881,6 +3907,59 @@ int ppp_hold_channels(struct net_device + } + EXPORT_SYMBOL(ppp_hold_channels); + ++/* __ppp_hold_channels() ++ * Returns the PPP channels of the PPP device, storing each one into ++ * channels[]. ++ * ++ * channels[] has chan_sz elements. ++ * This function returns the number of channels stored, up to chan_sz. ++ * It will return < 0 if the device is not PPP. ++ * ++ * You MUST release the channels using ppp_release_channels(). ++ */ ++int __ppp_hold_channels(struct net_device *dev, struct ppp_channel *channels[], ++ unsigned int chan_sz) ++{ ++ struct ppp *ppp; ++ int c; ++ struct channel *pch; ++ ++ if (!dev) ++ return -1; ++ ++ if (dev->type != ARPHRD_PPP) ++ return -1; ++ ++ ppp = netdev_priv(dev); ++ ++ c = 0; ++ list_for_each_entry(pch, &ppp->channels, clist) { ++ struct ppp_channel *chan; ++ ++ if (!pch->chan) { ++ /* Channel is going / gone away */ ++ continue; ++ } ++ ++ if (c == chan_sz) { ++ /* No space to record channel */ ++ return c; ++ } ++ ++ /* Hold the channel, if supported */ ++ chan = pch->chan; ++ if (!chan->ops->hold) ++ continue; ++ ++ chan->ops->hold(chan); ++ ++ /* Record the channel */ ++ channels[c++] = chan; ++ } ++ return c; ++} ++EXPORT_SYMBOL(__ppp_hold_channels); ++ + /* ppp_release_channels() + * Releases channels + */ +--- a/net/l2tp/l2tp_core.h ++++ b/net/l2tp/l2tp_core.h +@@ -235,6 +235,9 @@ struct l2tp_session *l2tp_session_get_by + void l2tp_stats_update(struct l2tp_tunnel *tunnel, struct l2tp_session *session, + struct l2tp_stats *stats); + ++void l2tp_stats_update(struct l2tp_tunnel *tunnel, struct l2tp_session *session, ++ struct l2tp_stats *stats); ++ + /* Tunnel and session lifetime management. + * Creation of a new instance is a two-step process: create, then register. + * Destruction is triggered using the *_delete functions, and completes asynchronously. diff --git a/target/linux/qualcommax/patches-6.1/0603-7-qca-nss-clients-iptunnel-lock-this-cpu.patch b/target/linux/qualcommax/patches-6.1/0603-7-qca-nss-clients-iptunnel-lock-this-cpu.patch new file mode 100644 index 000000000..17c0fe3c9 --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0603-7-qca-nss-clients-iptunnel-lock-this-cpu.patch @@ -0,0 +1,22 @@ +--- a/net/ipv6/ip6_tunnel.c ++++ b/net/ipv6/ip6_tunnel.c +@@ -2419,7 +2419,7 @@ nla_put_failure: + */ + void ip6_update_offload_stats(struct net_device *dev, void *ptr) + { +- struct pcpu_sw_netstats *tstats = per_cpu_ptr(dev->tstats, 0); ++ struct pcpu_sw_netstats *tstats = this_cpu_ptr(dev->tstats); + const struct pcpu_sw_netstats *offload_stats = + (struct pcpu_sw_netstats *)ptr; + +--- a/net/ipv6/sit.c ++++ b/net/ipv6/sit.c +@@ -1736,7 +1736,7 @@ nla_put_failure: + /* QCA NSS Clients Support - Start */ + void ipip6_update_offload_stats(struct net_device *dev, void *ptr) + { +- struct pcpu_sw_netstats *tstats = per_cpu_ptr(dev->tstats, 0); ++ struct pcpu_sw_netstats *tstats = this_cpu_ptr(dev->tstats); + const struct pcpu_sw_netstats *offload_stats = + (struct pcpu_sw_netstats *)ptr; + diff --git a/target/linux/qualcommax/patches-6.1/0603-8-qca-nss-clients-add-tls-mgr-support.patch b/target/linux/qualcommax/patches-6.1/0603-8-qca-nss-clients-add-tls-mgr-support.patch new file mode 100644 index 000000000..0499e237f --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0603-8-qca-nss-clients-add-tls-mgr-support.patch @@ -0,0 +1,24 @@ +--- /dev/null ++++ b/include/uapi/linux/tlshdr.h +@@ -0,0 +1,21 @@ ++#ifndef _UAPI_LINUX_TLSHDR_H ++#define _UAPI_LINUX_TLSHDR_H ++ ++#include ++ ++struct tlshdr { ++ __u8 type; ++ __be16 version; ++ __be16 len; ++} __attribute__((packed)); ++ ++#define TLSHDR_REC_TYPE_CCS 20 /* TLS packet is change cipher specification */ ++#define TLSHDR_REC_TYPE_ALERT 21 /* TLS packet is Alert */ ++#define TLSHDR_REC_TYPE_HANDSHAKE 22 /* TLS packet is Handshake */ ++#define TLSHDR_REC_TYPE_DATA 23 /* TLS packet is Application data */ ++ ++#define TLSHDR_VERSION_1_1 0x0302 /* TLS Header Version(tls 1.1) */ ++#define TLSHDR_VERSION_1_2 0x0303 /* TLS Header Version(tls 1.2) */ ++#define TLSHDR_VERSION_1_3 0x0304 /* TLS Header Version(tls 1.3) */ ++ ++#endif /* _UAPI_LINUX_TLSHDR_H */ diff --git a/target/linux/qualcommax/patches-6.1/0605-qca-nss-cfi-support.patch b/target/linux/qualcommax/patches-6.1/0605-qca-nss-cfi-support.patch new file mode 100644 index 000000000..67e85a18f --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0605-qca-nss-cfi-support.patch @@ -0,0 +1,111 @@ +--- a/crypto/authenc.c ++++ b/crypto/authenc.c +@@ -417,6 +417,8 @@ static int crypto_authenc_create(struct + enc->base.cra_driver_name) >= CRYPTO_MAX_ALG_NAME) + goto err_free_inst; + ++ inst->alg.base.cra_flags |= (auth_base->cra_flags | ++ enc->base.cra_flags) & CRYPTO_ALG_NOSUPP_SG; + inst->alg.base.cra_priority = enc->base.cra_priority * 10 + + auth_base->cra_priority; + inst->alg.base.cra_blocksize = enc->base.cra_blocksize; +--- a/include/linux/crypto.h ++++ b/include/linux/crypto.h +@@ -101,6 +101,11 @@ + #define CRYPTO_NOLOAD 0x00008000 + + /* ++ * Set this flag if algorithm does not support SG list transforms ++ */ ++#define CRYPTO_ALG_NOSUPP_SG 0x0000c000 ++ ++/* + * The algorithm may allocate memory during request processing, i.e. during + * encryption, decryption, or hashing. Users can request an algorithm with this + * flag unset if they can't handle memory allocation failures. +--- a/net/ipv4/esp4.c ++++ b/net/ipv4/esp4.c +@@ -658,6 +658,7 @@ static int esp_output(struct xfrm_state + struct ip_esp_hdr *esph; + struct crypto_aead *aead; + struct esp_info esp; ++ bool nosupp_sg; + + esp.inplace = true; + +@@ -669,6 +670,11 @@ static int esp_output(struct xfrm_state + aead = x->data; + alen = crypto_aead_authsize(aead); + ++ nosupp_sg = crypto_tfm_alg_type(&aead->base) & CRYPTO_ALG_NOSUPP_SG; ++ if (nosupp_sg && skb_linearize(skb)) { ++ return -ENOMEM; ++ } ++ + esp.tfclen = 0; + if (x->tfcpad) { + struct xfrm_dst *dst = (struct xfrm_dst *)skb_dst(skb); +@@ -890,6 +896,7 @@ static int esp_input(struct xfrm_state * + u8 *iv; + struct scatterlist *sg; + int err = -EINVAL; ++ bool nosupp_sg; + + if (!pskb_may_pull(skb, sizeof(struct ip_esp_hdr) + ivlen)) + goto out; +@@ -897,6 +904,12 @@ static int esp_input(struct xfrm_state * + if (elen <= 0) + goto out; + ++ nosupp_sg = crypto_tfm_alg_type(&aead->base) & CRYPTO_ALG_NOSUPP_SG; ++ if (nosupp_sg && skb_linearize(skb)) { ++ err = -ENOMEM; ++ goto out; ++ } ++ + assoclen = sizeof(struct ip_esp_hdr); + seqhilen = 0; + +--- a/net/ipv6/esp6.c ++++ b/net/ipv6/esp6.c +@@ -696,6 +696,7 @@ static int esp6_output(struct xfrm_state + struct ip_esp_hdr *esph; + struct crypto_aead *aead; + struct esp_info esp; ++ bool nosupp_sg; + + esp.inplace = true; + +@@ -707,6 +708,11 @@ static int esp6_output(struct xfrm_state + aead = x->data; + alen = crypto_aead_authsize(aead); + ++ nosupp_sg = crypto_tfm_alg_type(&aead->base) & CRYPTO_ALG_NOSUPP_SG; ++ if (nosupp_sg && skb_linearize(skb)) { ++ return -ENOMEM; ++ } ++ + esp.tfclen = 0; + if (x->tfcpad) { + struct xfrm_dst *dst = (struct xfrm_dst *)skb_dst(skb); +@@ -934,6 +940,7 @@ static int esp6_input(struct xfrm_state + __be32 *seqhi; + u8 *iv; + struct scatterlist *sg; ++ bool nosupp_sg; + + if (!pskb_may_pull(skb, sizeof(struct ip_esp_hdr) + ivlen)) { + ret = -EINVAL; +@@ -945,6 +952,12 @@ static int esp6_input(struct xfrm_state + goto out; + } + ++ nosupp_sg = crypto_tfm_alg_type(&aead->base) & CRYPTO_ALG_NOSUPP_SG; ++ if (nosupp_sg && skb_linearize(skb)) { ++ ret = -ENOMEM; ++ goto out; ++ } ++ + assoclen = sizeof(struct ip_esp_hdr); + seqhilen = 0; + diff --git a/target/linux/qualcommax/patches-6.1/0611-ipv6-Fix-null-pointer-dereference-in-ipv6-output.patch b/target/linux/qualcommax/patches-6.1/0611-ipv6-Fix-null-pointer-dereference-in-ipv6-output.patch new file mode 100644 index 000000000..25f99fc4a --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0611-ipv6-Fix-null-pointer-dereference-in-ipv6-output.patch @@ -0,0 +1,80 @@ +From eee3a7956b943dd3e23a74fbb5bfe89405eb0782 Mon Sep 17 00:00:00 2001 +From: Andrea Righi +Date: Mon, 6 Dec 2021 17:34:47 +0100 +Subject: UBUNTU: SAUCE: ipv6: fix NULL pointer dereference in ip6_output() + +It is possible to trigger a NULL pointer dereference by running the srv6 +net kselftest (tools/testing/selftests/net/srv6_end_dt46_l3vpn_test.sh): + +[ 249.051216] BUG: kernel NULL pointer dereference, address: 0000000000000378 +[ 249.052331] #PF: supervisor read access in kernel mode +[ 249.053137] #PF: error_code(0x0000) - not-present page +[ 249.053960] PGD 0 P4D 0 +[ 249.054376] Oops: 0000 [#1] PREEMPT SMP NOPTI +[ 249.055083] CPU: 1 PID: 21 Comm: ksoftirqd/1 Tainted: G E 5.16.0-rc4 #2 +[ 249.056328] Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS 1.14.0-2 04/01/2014 +[ 249.057632] RIP: 0010:ip6_forward+0x53c/0xab0 +[ 249.058354] Code: 49 c7 44 24 20 00 00 00 00 48 83 e0 fe 48 8b 40 30 48 3d 70 b2 b5 81 0f 85 b5 04 00 00 e8 7c f2 ff ff 41 89 c5 e9 17 01 00 00 <44> 8b 93 78 03 00 00 45 85 d2 0f 85 92 fb ff ff 49 8b 54 24 10 48 +[ 249.061274] RSP: 0018:ffffc900000cbb30 EFLAGS: 00010246 +[ 249.062042] RAX: 0000000000000000 RBX: 0000000000000000 RCX: ffff8881051d3400 +[ 249.063141] RDX: ffff888104bda000 RSI: 00000000000002c0 RDI: 0000000000000000 +[ 249.064264] RBP: ffffc900000cbbc8 R08: 0000000000000000 R09: 0000000000000000 +[ 249.065376] R10: 0000000000000040 R11: 0000000000000000 R12: ffff888103409800 +[ 249.066498] R13: ffff8881051d3410 R14: ffff888102725280 R15: ffff888103525000 +[ 249.067619] FS: 0000000000000000(0000) GS:ffff88813bc80000(0000) knlGS:0000000000000000 +[ 249.068881] CS: 0010 DS: 0000 ES: 0000 CR0: 0000000080050033 +[ 249.069777] CR2: 0000000000000378 CR3: 0000000104980000 CR4: 0000000000750ee0 +[ 249.070907] PKRU: 55555554 +[ 249.071337] Call Trace: +[ 249.071730] +[ 249.072070] ? debug_smp_processor_id+0x17/0x20 +[ 249.072807] seg6_input_core+0x2bb/0x2d0 +[ 249.073436] ? _raw_spin_unlock_irqrestore+0x29/0x40 +[ 249.074225] seg6_input+0x3b/0x130 +[ 249.074768] lwtunnel_input+0x5e/0xa0 +[ 249.075357] ip_rcv+0x17b/0x190 +[ 249.075867] ? update_load_avg+0x82/0x600 +[ 249.076514] __netif_receive_skb_one_core+0x86/0xa0 +[ 249.077231] __netif_receive_skb+0x15/0x60 +[ 249.077843] process_backlog+0x97/0x160 +[ 249.078389] __napi_poll+0x31/0x170 +[ 249.078912] net_rx_action+0x229/0x270 +[ 249.079506] __do_softirq+0xef/0x2ed +[ 249.080085] run_ksoftirqd+0x37/0x50 +[ 249.080663] smpboot_thread_fn+0x193/0x230 +[ 249.081312] kthread+0x17a/0x1a0 +[ 249.081847] ? smpboot_register_percpu_thread+0xe0/0xe0 +[ 249.082677] ? set_kthread_struct+0x50/0x50 +[ 249.083340] ret_from_fork+0x22/0x30 +[ 249.083926] +[ 249.090295] ---[ end trace 1998d7ba5965a365 ]--- + +It looks like commit 0857d6f8c759 ("ipv6: When forwarding count rx stats +on the orig netdev") tries to determine the right netdev to account the +rx stats, but in this particular case it's failing and the netdev is +NULL. + +Fallback to the previous method of determining the netdev interface (via +skb->dev) to account the rx stats when the orig netdev can't be +determined. + +Fixes: 0857d6f8c759 ("ipv6: When forwarding count rx stats on the orig netdev") +Signed-off-by: Andrea Righi +(cherry picked from https://lore.kernel.org/lkml/20211206163447.991402-1-andrea.righi@canonical.com/T/#u) +Signed-off-by: Andrea Righi +--- + net/ipv6/ip6_output.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/net/ipv6/ip6_output.c ++++ b/net/ipv6/ip6_output.c +@@ -498,6 +498,9 @@ int ip6_forward(struct sk_buff *skb) + u32 mtu; + + idev = __in6_dev_get_safely(dev_get_by_index_rcu(net, IP6CB(skb)->iif)); ++ if (unlikely(!idev)) ++ idev = __in6_dev_get_safely(skb->dev); ++ + if (net->ipv6.devconf_all->forwarding == 0) + goto error; + diff --git a/target/linux/ramips/dts/mt7621_glinet_gl-mt1300.dts b/target/linux/ramips/dts/mt7621_glinet_gl-mt1300.dts index 20f63902a..a9659a6e8 100644 --- a/target/linux/ramips/dts/mt7621_glinet_gl-mt1300.dts +++ b/target/linux/ramips/dts/mt7621_glinet_gl-mt1300.dts @@ -67,8 +67,8 @@ flash@0 { compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <80000000>; - m25p,fast-read; + spi-max-frequency = <50000000>; + broken-flash-reset; partitions { compatible = "fixed-partitions"; diff --git a/target/linux/ramips/dts/mt7621_h3c_tx1800-plus.dts b/target/linux/ramips/dts/mt7621_h3c_tx1800-plus.dts new file mode 100644 index 000000000..f763dd14d --- /dev/null +++ b/target/linux/ramips/dts/mt7621_h3c_tx1800-plus.dts @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621_h3c_tx180x.dtsi" + +/ { + compatible = "h3c,tx1800-plus", "mediatek,mt7621-soc"; + model = "H3C TX1800 Plus"; +}; diff --git a/target/linux/ramips/dts/mt7621_h3c_tx1801-plus.dts b/target/linux/ramips/dts/mt7621_h3c_tx1801-plus.dts new file mode 100644 index 000000000..4588b142c --- /dev/null +++ b/target/linux/ramips/dts/mt7621_h3c_tx1801-plus.dts @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621_h3c_tx180x.dtsi" + +/ { + compatible = "h3c,tx1801-plus", "mediatek,mt7621-soc"; + model = "H3C TX1801 Plus"; +}; diff --git a/target/linux/ramips/dts/mt7621_h3c_tx1806.dts b/target/linux/ramips/dts/mt7621_h3c_tx1806.dts new file mode 100644 index 000000000..1e9b6456e --- /dev/null +++ b/target/linux/ramips/dts/mt7621_h3c_tx1806.dts @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621_h3c_tx180x.dtsi" + +/ { + compatible = "h3c,tx1806", "mediatek,mt7621-soc"; + model = "H3C TX1806"; +}; diff --git a/target/linux/ramips/dts/mt7621_h3c_tx180x.dtsi b/target/linux/ramips/dts/mt7621_h3c_tx180x.dtsi new file mode 100644 index 000000000..25773b971 --- /dev/null +++ b/target/linux/ramips/dts/mt7621_h3c_tx180x.dtsi @@ -0,0 +1,170 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621.dtsi" + +#include +#include +#include + +/ { + aliases { + led-boot = &led_status_amber; + led-failsafe = &led_status_green; + led-running = &led_status_green; + led-upgrade = &led_status_amber; + }; + + chosen { + bootargs = "console=ttyS0,115200"; + bootargs-override = "console=ttyS0,115200"; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status_amber: led-0 { + label = "amber:status"; + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + + led_status_green: led-1 { + label = "green:status"; + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&gmac1 { + status = "okay"; +}; + +&nand { + status = "okay"; + + mediatek,nmbm; + mediatek,bmt-max-ratio = <1>; + mediatek,bmt-max-reserved-blocks = <64>; + mediatek,bmt-remap-range = <0x0000000 0x0a00000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0000000 0x0080000>; + read-only; + }; + + partition@80000 { + label = "u-boot-env"; + reg = <0x0080000 0x0080000>; + }; + + partition@100000 { + label = "exp"; + reg = <0x0100000 0x0080000>; + read-only; + }; + + factory: partition@180000 { + label = "factory"; + reg = <0x0180000 0x0080000>; + read-only; + }; + + partition@200000 { + label = "firmware"; + reg = <0x0200000 0x7600000>; + + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "kernel"; + reg = <0x0000000 0x0800000>; + }; + + partition@800000 { + label = "ubi"; + reg = <0x0800000 0x6e00000>; + }; + }; + + /* last 8 MiB is reserved for NMBM bad block table */ + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie1 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x0>; + mediatek,disable-radar-background; + }; +}; + +&pcie2 { + status = "disabled"; +}; + +&state_default { + gpio { + groups = "jtag"; + function = "gpio"; + }; +}; + +&switch0 { + ports { + port@1 { + status = "okay"; + label = "lan1"; + }; + + port@2 { + status = "okay"; + label = "lan2"; + }; + + port@3 { + status = "okay"; + label = "lan3"; + }; + + port@4 { + status = "okay"; + label = "wan"; + }; + }; +}; + +&xhci { + status = "disabled"; +}; diff --git a/target/linux/ramips/dts/mt7621_jdcloud_re-cp-02.dts b/target/linux/ramips/dts/mt7621_jdcloud_re-cp-02.dts new file mode 100644 index 000000000..09330fc1a --- /dev/null +++ b/target/linux/ramips/dts/mt7621_jdcloud_re-cp-02.dts @@ -0,0 +1,160 @@ +// SPDX-License-Identifier: GPL-2.0-or-later + +#include "mt7621.dtsi" + +#include +#include + +/ { + compatible = "jdcloud,re-cp-02", "mediatek,mt7621-soc"; + model = "JDCloud RE-CP-02"; + + aliases { + label-mac-device = &gmac0; + led-boot = &led_status_blue; + led-failsafe = &led_status_red; + led-running = &led_status_green; + led-upgrade = &led_status_blue; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + led_status_red: red { + label = "red:status"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + + led_status_blue: blue { + label = "blue:status"; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + }; + + led_status_green: green { + label = "green:status"; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + wps { + label = "wps"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + reset { + label = "reset"; + gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "U-Boot"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + compatible = "u-boot,env"; + label = "Config"; + reg = <0x40000 0x10000>; + }; + + factory: partition@50000 { + label = "Factory"; + reg = <0x50000 0x40000>; + read-only; + }; + + partition@90000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x90000 0xf70000>; + }; + }; + }; +}; + +&state_default { + gpio { + groups = "uart3", "jtag", "wdt"; + function = "gpio"; + }; +}; + +&sdhci { + status = "okay"; +}; + +&pcie { + status = "okay"; +}; + +&pcie1 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x0>; + mediatek,disable-radar-background; + }; +}; + +&gmac0 { + mtd-mac-address = <&factory 0x3fff4>; +}; + +&gmac1 { + mtd-mac-address = <&factory 0x3fffa>; + status = "okay"; +}; + +&switch0 { + ports { + port@1 { + status = "okay"; + label = "lan1"; + }; + + port@2 { + status = "okay"; + label = "lan2"; + }; + + port@3 { + status = "okay"; + label = "lan3"; + }; + + port@4 { + status = "okay"; + label = "wan"; + mtd-mac-address = <&factory 0x3fffa>; + }; + }; +}; + +&xhci { + status = "disabled"; +}; diff --git a/target/linux/ramips/dts/mt7621_leigod_a7000.dts b/target/linux/ramips/dts/mt7621_leigod_a7000.dts index 292d22f71..a7b08d527 100644 --- a/target/linux/ramips/dts/mt7621_leigod_a7000.dts +++ b/target/linux/ramips/dts/mt7621_leigod_a7000.dts @@ -88,10 +88,10 @@ reg = <0x50000 0x1e00000>; }; - partition@1f00000 { - label = "sysinfo"; - reg = <0x1f00000 0x10000>; - }; + partition@1f00000 { + label = "sysinfo"; + reg = <0x1f00000 0x10000>; + }; }; }; }; @@ -137,7 +137,7 @@ &state_default { gpio { - groups = "jtag", "wdt"; + groups = "jtag", "uart3", "wdt"; function = "gpio"; }; }; diff --git a/target/linux/ramips/dts/mt7621_mediatek_ap-mt7621a-v60.dts b/target/linux/ramips/dts/mt7621_mediatek_ap-mt7621a-v60.dts index 811b02fe0..ce1931d9d 100644 --- a/target/linux/ramips/dts/mt7621_mediatek_ap-mt7621a-v60.dts +++ b/target/linux/ramips/dts/mt7621_mediatek_ap-mt7621a-v60.dts @@ -3,6 +3,18 @@ / { compatible = "mediatek,ap-mt7621a-v60", "mediatek,mt7621-soc"; model = "Mediatek AP-MT7621A-V60 EVB"; + + chosen { + bootargs = "console=ttyS0,57600"; + }; + + watchdog: watchdog { + compatible = "linux,wdt-gpio"; + gpios = <&gpio 27 0>; + hw_algo = "toggle"; + hw_margin_ms = <3000>; + always-running; + }; sound { compatible = "simple-audio-card"; @@ -38,6 +50,12 @@ }; &pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "rgmii2", "jtag"; + ralink,function = "gpio"; + }; + }; i2s_pins: i2s { i2s { groups = "uart3"; @@ -72,9 +90,10 @@ status = "okay"; flash@0 { - compatible = "mx25l6405d","jedec,spi-nor"; + compatible = "jedec,spi-nor"; reg = <0>; - spi-max-frequency = <10000000>; + spi-max-frequency = <45000000>; + broken-flash-reset; partitions { compatible = "fixed-partitions"; @@ -102,7 +121,7 @@ partition@50000 { compatible = "denx,uimage"; label = "firmware"; - reg = <0x50000 0x7b0000>; + reg = <0x50000 0x1fb0000>; }; }; }; diff --git a/target/linux/ramips/dts/mt7621_openfi_5pro.dts b/target/linux/ramips/dts/mt7621_openfi_5pro.dts new file mode 100644 index 000000000..1ef292a78 --- /dev/null +++ b/target/linux/ramips/dts/mt7621_openfi_5pro.dts @@ -0,0 +1,153 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621.dtsi" + +#include +#include +#include + +/ { + compatible = "openfi,5pro", "mediatek,mt7621-soc"; + model = "OpenFi 5Pro"; + + aliases { + led-boot = &led_system_blue; + led-failsafe = &led_system_blue; + led-running = &led_system_blue; + led-upgrade = &led_system_blue; + }; + + chosen { + bootargs = "console=ttyS0,115200"; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_system_blue: led-0 { + label = "blue:system"; + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + + led_internet_blue: led-1 { + label = "blue:internet"; + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + }; + + led_wifi_blue: led-2 { + label = "blue:wifi"; + color = ; + linux,default-trigger = "phy0tpt"; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <45000000>; + broken-flash-reset; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "bootloader"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "config"; + reg = <0x30000 0x10000>; + read-only; + }; + + factory: partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x50000 0x3f00000>; + }; + }; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + mt76@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x0>; + ieee80211-freq-limit = <2400000 2500000>; + }; +}; + +&pcie1 { + mt76@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x8000>; + ieee80211-freq-limit = <5000000 6000000>; + }; +}; + +&gmac0 { + mtd-mac-address = <&factory 0xe000>; +}; + +&switch0 { + ports { + port@0 { + status = "okay"; + label = "wan"; + mtd-mac-address = <&factory 0xe006>; + }; + + port@1 { + status = "okay"; + label = "lan"; + }; + }; +}; + +&state_default { + gpio { + groups = "wdt", "jtag"; + function = "gpio"; + }; +}; diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk index f759d4857..cb3382f7f 100644 --- a/target/linux/ramips/image/mt7621.mk +++ b/target/linux/ramips/image/mt7621.mk @@ -40,6 +40,12 @@ define Build/hatlab-gateboard-combined 256 endef +define Build/h3c-blank-header + dd if=/dev/zero of=$@.blank bs=160 count=1 + cat $@ >> $@.blank + mv $@.blank $@ +endef + define Build/hatlab-gateboard-kernel rm -fR $@.initrd rm -fR $@.initrd.cpio @@ -733,7 +739,7 @@ define Device/glinet_gl-mt1300 DEVICE_MODEL := GL-MT1300 DEVICE_PACKAGES := kmod-mt7615-firmware kmod-usb3 -uboot-envtools endef -#TARGET_DEVICES += glinet_gl-mt1300 +TARGET_DEVICES += glinet_gl-mt1300 define Device/gnubee_gb-pc1 $(Device/dsa-migration) @@ -755,6 +761,40 @@ define Device/gnubee_gb-pc2 endef TARGET_DEVICES += gnubee_gb-pc2 +define Device/h3c_tx180x + $(Device/dsa-migration) + BLOCKSIZE := 128k + PAGESIZE := 2048 + KERNEL_SIZE := 8192k + IMAGE_SIZE := 120832k + UBINIZE_OPTS := -E 5 + KERNEL_LOADADDR := 0x82000000 + KERNEL_INITRAMFS := kernel-bin | relocate-kernel 0x80001000 | lzma | \ + fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb + KERNEL := $$(KERNEL_INITRAMFS) | h3c-blank-header + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata + DEVICE_VENDOR := H3C + DEVICE_PACKAGES := kmod-mt7915e uboot-envtools +endef + +define Device/h3c_tx1800-plus + $(Device/h3c_tx180x) + DEVICE_MODEL := TX1800 Plus +endef +TARGET_DEVICES += h3c_tx1800-plus + +define Device/h3c_tx1801-plus + $(Device/h3c_tx180x) + DEVICE_MODEL := TX1801 Plus +endef +TARGET_DEVICES += h3c_tx1801-plus + +define Device/h3c_tx1806 + $(Device/h3c_tx180x) + DEVICE_MODEL := TX1806 +endef +TARGET_DEVICES += h3c_tx1806 + define Device/hatlab_gateboard-one $(Device/dsa-migration) DEVICE_VENDOR := HATLab @@ -990,6 +1030,15 @@ define Device/jcg_y2 endef TARGET_DEVICES += jcg_y2 +define Device/jdcloud_re-cp-02 + $(Device/dsa-migration) + IMAGE_SIZE := 16000k + DEVICE_VENDOR := JD-Cloud + DEVICE_MODEL := RE-CP-02 + DEVICE_PACKAGES := kmod-mt7915-firmware kmod-sdhci-mt7620 +endef +TARGET_DEVICES += jdcloud_re-cp-02 + define Device/jdcloud_re-sp-01b $(Device/dsa-migration) IMAGE_SIZE := 27328k @@ -1102,10 +1151,11 @@ TARGET_DEVICES += linksys_re6500 define Device/mediatek_ap-mt7621a-v60 $(Device/dsa-migration) - IMAGE_SIZE := 7872k + $(Device/uimage-lzma-loader) + IMAGE_SIZE := 32448k DEVICE_VENDOR := Mediatek DEVICE_MODEL := AP-MT7621A-V60 EVB - DEVICE_PACKAGES := kmod-usb3 kmod-sdhci-mt7620 kmod-sound-mt7620 -wpad-openssl + DEVICE_PACKAGES := kmod-usb3 kmod-i2c-gpio kmod-rtc-pcf8563 kmod-sdhci-mt7620 kmod-sound-mt7620 kmod-mt76x2 endef TARGET_DEVICES += mediatek_ap-mt7621a-v60 @@ -1360,6 +1410,15 @@ define Device/netis_wf2881 endef TARGET_DEVICES += netis_wf2881 +define Device/openfi_5pro + $(Device/dsa-migration) + IMAGE_SIZE := 63448k + DEVICE_VENDOR := OpenFi + DEVICE_MODEL := 5Pro + DEVICE_PACKAGES := kmod-mt7603 kmod-mt7615e kmod-mt7663-firmware-ap kmod-usb3 +endef +TARGET_DEVICES += openfi_5pro + define Device/oraybox_x3a $(Device/dsa-migration) $(Device/uimage-lzma-loader) @@ -1376,7 +1435,7 @@ define Device/phicomm_k2p DEVICE_MODEL := K2P SUPPORTED_DEVICES += k2p DEVICE_COMPAT_VERSION := 1.1 - DEVICE_PACKAGES := -luci-newapi -wpad-openssl kmod-mt7615d_dbdc wireless-tools + DEVICE_PACKAGES := -wpad-openssl kmod-mt7615d_dbdc wireless-tools luci-oldapi endef TARGET_DEVICES += phicomm_k2p diff --git a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network index a8461319a..6d5d8265d 100644 --- a/target/linux/ramips/mt7621/base-files/etc/board.d/02_network +++ b/target/linux/ramips/mt7621/base-files/etc/board.d/02_network @@ -22,11 +22,16 @@ ramips_setup_interfaces() ucidef_set_interface_lan "lan" ;; ampedwireless,ally-r1900k|\ + h3c,tx1800-plus|\ + h3c,tx1801-plus|\ + h3c,tx1806|\ hiwifi,hc5962|\ + jdcloud,re-cp-02|\ xiaomi,mi-router-3-pro) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" "wan" ;; asiarf,ap7621-001|\ + openfi,5pro|\ winstars,ws-wn583a6) ucidef_set_interfaces_lan_wan "lan" "wan" ;; @@ -180,6 +185,13 @@ ramips_setup_macs() wan_mac=$(mtd_get_mac_ascii u-boot-env wanaddr) label_mac=$wan_mac ;; + h3c,tx1800-plus|\ + h3c,tx1801-plus|\ + h3c,tx1806) + label_mac=$(mtd_get_mac_ascii u-boot-env ethaddr) + lan_mac=$(macaddr_add "$label_mac" 1) + wan_mac=$label_mac + ;; hiwifi,hc5962) lan_mac=$(mtd_get_mac_ascii bdinfo "Vfac_mac ") label_mac=$lan_mac diff --git a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac index 052081209..979950370 100644 --- a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac +++ b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac @@ -31,6 +31,13 @@ case "$board" in [ "$PHYNBR" = "1" ] && \ macaddr_add "$(mtd_get_mac_binary factory 0x4)" 1 > /sys${DEVPATH}/macaddress ;; + h3c,tx1800-plus|\ + h3c,tx1801-plus|\ + h3c,tx1806) + addr=$(macaddr_setbit $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) 2) 7) + [ "$PHYNBR" = "0" ] && echo -n ${addr:0:9}'1'${addr:10:7} > /sys${DEVPATH}/macaddress + [ "$PHYNBR" = "1" ] && echo -n ${addr:0:9}'7'${addr:10:7} > /sys${DEVPATH}/macaddress + ;; jcg,q20) [ "$PHYNBR" = "1" ] && \ macaddr_setbit_la "$(mtd_get_mac_binary Factory 0x4)" > /sys${DEVPATH}/macaddress diff --git a/target/linux/ramips/mt7621/base-files/etc/init.d/bootcount b/target/linux/ramips/mt7621/base-files/etc/init.d/bootcount index 276d8bccc..1db873387 100755 --- a/target/linux/ramips/mt7621/base-files/etc/init.d/bootcount +++ b/target/linux/ramips/mt7621/base-files/etc/init.d/bootcount @@ -13,6 +13,9 @@ boot() { $((0xFF)) ]] || printf '\xff' | dd of=/dev/mtdblock3 count=1 \ bs=1 seek=$((0x20001)) ;; + jdcloud,re-cp-02) + echo -e "bootcount 0\nbootlimit 5\nupgrade_available 1" | /usr/sbin/fw_setenv -s - + ;; linksys,e5600|\ linksys,ea7300-v1|\ linksys,ea7300-v2|\ diff --git a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh index 427c39c06..0df5e8cde 100755 --- a/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh +++ b/target/linux/ramips/mt7621/base-files/lib/upgrade/platform.sh @@ -82,6 +82,9 @@ platform_do_upgrade() { dlink,dir-2640-a1|\ dlink,dir-2660-a1|\ dlink,dir-853-a3|\ + h3c,tx1800-plus|\ + h3c,tx1801-plus|\ + h3c,tx1806|\ hiwifi,hc5962|\ jcg,q20|\ linksys,e5600|\ @@ -106,7 +109,8 @@ platform_do_upgrade() { xiaomi,mi-router-4|\ xiaomi,mi-router-ac2100|\ xiaomi,mi-router-cr660x|\ - xiaomi,redmi-router-ac2100) + xiaomi,redmi-router-ac2100|\ + zte,e8820s) nand_do_upgrade "$1" ;; hatlab,gateboard-one) diff --git a/target/linux/ramips/patches-5.10/902-mtkhnat-fix-pskb-expand-head-limitation.patch b/target/linux/ramips/patches-5.10/902-mtkhnat-fix-pskb-expand-head-limitation.patch index 9bd7432de..53b3b1b5b 100644 --- a/target/linux/ramips/patches-5.10/902-mtkhnat-fix-pskb-expand-head-limitation.patch +++ b/target/linux/ramips/patches-5.10/902-mtkhnat-fix-pskb-expand-head-limitation.patch @@ -1,6 +1,6 @@ --- a/net/core/skbuff.c +++ b/net/core/skbuff.c -@@ -70,6 +70,7 @@ +@@ -71,6 +71,7 @@ #include #include #include @@ -8,7 +8,7 @@ #include #include -@@ -1686,6 +1687,9 @@ int pskb_expand_head(struct sk_buff *skb +@@ -1693,6 +1694,9 @@ int pskb_expand_head(struct sk_buff *skb skb_shinfo(skb), offsetof(struct skb_shared_info, frags[skb_shinfo(skb)->nr_frags])); diff --git a/target/linux/ramips/patches-5.15/700-net-ethernet-mediatek-support-net-labels.patch b/target/linux/ramips/patches-5.15/700-net-ethernet-mediatek-support-net-labels.patch index cd3c3e262..fa1906c22 100644 --- a/target/linux/ramips/patches-5.15/700-net-ethernet-mediatek-support-net-labels.patch +++ b/target/linux/ramips/patches-5.15/700-net-ethernet-mediatek-support-net-labels.patch @@ -14,7 +14,7 @@ Signed-off-by: René van Dorst --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c -@@ -4618,6 +4618,7 @@ static const struct net_device_ops mtk_n +@@ -4555,6 +4555,7 @@ static const struct net_device_ops mtk_n static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np) { @@ -22,7 +22,7 @@ Signed-off-by: René van Dorst const __be32 *_id = of_get_property(np, "reg", NULL); phy_interface_t phy_mode; struct phylink *phylink; -@@ -4787,6 +4788,9 @@ static int mtk_add_mac(struct mtk_eth *e +@@ -4726,6 +4727,9 @@ static int mtk_add_mac(struct mtk_eth *e register_netdevice_notifier(&mac->device_notifier); } diff --git a/target/linux/ramips/patches-5.15/720-Revert-net-phy-simplify-phy_link_change-arguments.patch b/target/linux/ramips/patches-5.15/720-Revert-net-phy-simplify-phy_link_change-arguments.patch index f04a264a0..25737eb8a 100644 --- a/target/linux/ramips/patches-5.15/720-Revert-net-phy-simplify-phy_link_change-arguments.patch +++ b/target/linux/ramips/patches-5.15/720-Revert-net-phy-simplify-phy_link_change-arguments.patch @@ -71,7 +71,7 @@ still required by target/linux/ramips/files/drivers/net/ethernet/ralink/mdio.c break; --- a/drivers/net/phy/phy_device.c +++ b/drivers/net/phy/phy_device.c -@@ -1032,14 +1032,16 @@ struct phy_device *phy_find_first(struct +@@ -1035,14 +1035,16 @@ struct phy_device *phy_find_first(struct } EXPORT_SYMBOL(phy_find_first); @@ -95,7 +95,7 @@ still required by target/linux/ramips/files/drivers/net/ethernet/ralink/mdio.c phydev->mii_ts->link_state(phydev->mii_ts, phydev); --- a/drivers/net/phy/phylink.c +++ b/drivers/net/phy/phylink.c -@@ -1334,7 +1334,8 @@ void phylink_destroy(struct phylink *pl) +@@ -1381,7 +1381,8 @@ void phylink_destroy(struct phylink *pl) } EXPORT_SYMBOL_GPL(phylink_destroy); @@ -107,7 +107,7 @@ still required by target/linux/ramips/files/drivers/net/ethernet/ralink/mdio.c bool tx_pause, rx_pause; --- a/include/linux/phy.h +++ b/include/linux/phy.h -@@ -703,7 +703,7 @@ struct phy_device { +@@ -706,7 +706,7 @@ struct phy_device { u8 mdix; u8 mdix_ctrl; diff --git a/target/linux/ramips/patches-5.15/721-NET-no-auto-carrier-off-support.patch b/target/linux/ramips/patches-5.15/721-NET-no-auto-carrier-off-support.patch index d80877b41..5205a8f93 100644 --- a/target/linux/ramips/patches-5.15/721-NET-no-auto-carrier-off-support.patch +++ b/target/linux/ramips/patches-5.15/721-NET-no-auto-carrier-off-support.patch @@ -37,7 +37,7 @@ Signed-off-by: John Crispin break; --- a/include/linux/phy.h +++ b/include/linux/phy.h -@@ -620,6 +620,7 @@ struct phy_device { +@@ -622,6 +622,7 @@ struct phy_device { unsigned downshifted_rate:1; unsigned is_on_sfp_module:1; unsigned mac_managed_pm:1; diff --git a/target/linux/ramips/patches-5.4/993-spi-nor-w25q512jv.patch b/target/linux/ramips/patches-5.4/993-spi-nor-w25q512jv.patch new file mode 100644 index 000000000..c02f4e533 --- /dev/null +++ b/target/linux/ramips/patches-5.4/993-spi-nor-w25q512jv.patch @@ -0,0 +1,25 @@ +From: David Bauer +Date: Thu, 11 Feb 2021 19:57:26 +0100 +Subject: [PATCH] mtd: spi-nor: add support for Winbond W25Q512 + +The Winbond W25Q512 is a 512mb SPI-NOR chip. It supports 4K sectors as +well as block protection and Dual-/Quad-read. + +Tested on: Ubiquiti UniFi 6 LR + +Signed-off-by: David Bauer + +Ref: https://patchwork.ozlabs.org/project/linux-mtd/patch/20210213151047.11700-1-mail@david-bauer.net/ + +--- a/drivers/mtd/spi-nor/spi-nor.c ++++ b/drivers/mtd/spi-nor/spi-nor.c +@@ -2567,6 +2567,9 @@ static const struct flash_info spi_nor_i + .fixups = &w25q256_fixups }, + { "w25q256jvm", INFO(0xef7019, 0, 64 * 1024, 512, + SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, ++ { "w25q512jv", INFO(0xef4020, 0, 64 * 1024, 1024, ++ SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ | ++ SPI_NOR_HAS_TB | SPI_NOR_HAS_LOCK) }, + { "w25m512jv", INFO(0xef7119, 0, 64 * 1024, 1024, + SECT_4K | SPI_NOR_QUAD_READ | SPI_NOR_DUAL_READ) }, + diff --git a/target/linux/sifiveu/patches-5.15/0002-riscv-sifive-unmatched-update-regulators-values.patch b/target/linux/sifiveu/patches-5.15/0002-riscv-sifive-unmatched-update-regulators-values.patch index ac316e9d9..13df2e613 100644 --- a/target/linux/sifiveu/patches-5.15/0002-riscv-sifive-unmatched-update-regulators-values.patch +++ b/target/linux/sifiveu/patches-5.15/0002-riscv-sifive-unmatched-update-regulators-values.patch @@ -20,7 +20,7 @@ Signed-off-by: David Abdurachmanov --- a/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts +++ b/arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts -@@ -73,16 +73,16 @@ +@@ -74,16 +74,16 @@ regulators { vdd_bcore1: bcore1 { @@ -41,7 +41,7 @@ Signed-off-by: David Abdurachmanov regulator-min-microamp = <5000000>; regulator-max-microamp = <5000000>; regulator-always-on; -@@ -137,48 +137,48 @@ +@@ -138,48 +138,48 @@ }; vdd_ldo3: ldo3 { diff --git a/target/linux/sunxi/Makefile b/target/linux/sunxi/Makefile index 74caebd7b..5a0f80029 100644 --- a/target/linux/sunxi/Makefile +++ b/target/linux/sunxi/Makefile @@ -7,10 +7,11 @@ include $(TOPDIR)/rules.mk ARCH:=arm BOARD:=sunxi BOARDNAME:=Allwinner ARM SoCs -FEATURES:=fpu usb ext4 display rootfs-part rtc squashfs -SUBTARGETS:=cortexa8 cortexa7 cortexa53 +FEATURES:=usb ext4 display rootfs-part rtc squashfs +SUBTARGETS:=cortexa8 cortexa7 cortexa53 arm926ejs KERNEL_PATCHVER:=6.1 +KERNEL_TESTING_PATCHVER:=6.6 KERNELNAME:=zImage dtbs diff --git a/target/linux/sunxi/arm926ejs/config-6.1 b/target/linux/sunxi/arm926ejs/config-6.1 new file mode 100644 index 000000000..b1320ee2e --- /dev/null +++ b/target/linux/sunxi/arm926ejs/config-6.1 @@ -0,0 +1,54 @@ +# CONFIG_ARCH_MULTI_V4 is not set +# CONFIG_ARCH_MULTI_V4T is not set +CONFIG_ARCH_MULTI_V4_V5=y +CONFIG_ARCH_MULTI_V5=y +CONFIG_ARCH_MULTIPLATFORM=y +CONFIG_ARCH_MULTI_CPU_AUTO=y +CONFIG_ARCH_NR_GPIO=416 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SUNXI=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HAS_BINFMT_FLAT=y +CONFIG_ARCH_HAS_TEARDOWN_DMA_OPS=y +CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y +CONFIG_COMPAT_32BIT_TIME=y +# CONFIG_CPU_DCACHE_WRITETHROUGH is not set +# CONFIG_CPU_CACHE_ROUND_ROBIN is not set +CONFIG_MACH_SUNIV=y +# CONFIG_MACH_SUN4I is not set +# CONFIG_MACH_SUN5I is not set +# CONFIG_MACH_SUN6I is not set +# CONFIG_MACH_SUN7I is not set +# CONFIG_MACH_SUN8I is not set +# CONFIG_MACH_SUN9I is not set +CONFIG_MDIO_BUS_MUX=y +CONFIG_MUSB_PIO_ONLY=y +# CONFIG_PHY_SUN9I_USB is not set +# CONFIG_PINCTRL_SUN4I_A10 is not set +# CONFIG_PINCTRL_SUN50I_A64 is not set +# CONFIG_PINCTRL_SUN50I_A64_R is not set +# CONFIG_PINCTRL_SUN50I_H5 is not set +# CONFIG_PINCTRL_SUN50I_H6 is not set +# CONFIG_PINCTRL_SUN50I_H6_R is not set +# CONFIG_PINCTRL_SUN5I is not set +# CONFIG_PINCTRL_SUN6I_A31 is not set +# CONFIG_PINCTRL_SUN6I_A31_R is not set +# CONFIG_PINCTRL_SUN8I_A23 is not set +# CONFIG_PINCTRL_SUN8I_A23_R is not set +# CONFIG_PINCTRL_SUN8I_A33 is not set +# CONFIG_PINCTRL_SUN8I_A83T is not set +# CONFIG_PINCTRL_SUN8I_A83T_R is not set +# CONFIG_PINCTRL_SUN8I_H3 is not set +# CONFIG_PINCTRL_SUN8I_H3_R is not set +# CONFIG_PINCTRL_SUN8I_V3S is not set +# CONFIG_PINCTRL_SUN9I_A80 is not set +# CONFIG_PINCTRL_SUN9I_A80_R is not set +CONFIG_PINCTRL_SUNIV_F1C100S=y +CONFIG_PINCTRL_SUNXI=y +CONFIG_SUNIV_F1C100S_CCU=y +CONFIG_UNWINDER_ARM=y +CONFIG_USB_MUSB_HDRC=y +CONFIG_USB_MUSB_DUAL_ROLE=y +CONFIG_USB_MUSB_SUNXI=y diff --git a/target/linux/sunxi/arm926ejs/target.mk b/target/linux/sunxi/arm926ejs/target.mk new file mode 100644 index 000000000..f37aa30d7 --- /dev/null +++ b/target/linux/sunxi/arm926ejs/target.mk @@ -0,0 +1,11 @@ +# +# Copyright (C) 2024 Zoltan HERPAI +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk + +BOARDNAME:=Allwinner F1C100/200s +CPU_TYPE:=arm926ej-s diff --git a/target/linux/sunxi/base-files/etc/board.d/02_network b/target/linux/sunxi/base-files/etc/board.d/02_network index b295dc7da..073565d4e 100644 --- a/target/linux/sunxi/base-files/etc/board.d/02_network +++ b/target/linux/sunxi/base-files/etc/board.d/02_network @@ -17,7 +17,7 @@ sunxi_setup_interfaces() lamobo,lamobo-r1) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" wan ;; - olimex,a20-olinuxino-micro) + olimex,a13-olinuxino-micro) ucidef_set_interface_lan "wlan0" ;; xunlong,orangepi-r1) diff --git a/target/linux/sunxi/config-6.1 b/target/linux/sunxi/config-6.1 index a76834c13..661c511ee 100644 --- a/target/linux/sunxi/config-6.1 +++ b/target/linux/sunxi/config-6.1 @@ -7,8 +7,6 @@ CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y CONFIG_ARCH_MULTIPLATFORM=y -CONFIG_ARCH_MULTI_V6_V7=y -CONFIG_ARCH_MULTI_V7=y CONFIG_ARCH_NR_GPIO=416 CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y diff --git a/target/linux/sunxi/config-6.6 b/target/linux/sunxi/config-6.6 new file mode 100644 index 000000000..3e73f44c9 --- /dev/null +++ b/target/linux/sunxi/config-6.6 @@ -0,0 +1,526 @@ +# CONFIG_AHCI_SUNXI is not set +CONFIG_ALIGNMENT_TRAP=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_FORCE_MAX_ORDER=11 +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_KEEP_MEMBLOCK=y +CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y +CONFIG_ARCH_MULTIPLATFORM=y +CONFIG_ARCH_MULTI_V6_V7=y +CONFIG_ARCH_MULTI_V7=y +CONFIG_ARCH_NR_GPIO=416 +CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y +CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y +CONFIG_ARCH_SELECT_MEMORY_MODEL=y +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SUNXI=y +CONFIG_ARCH_SUNXI_MC_SMP=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARM=y +CONFIG_ARM_ALLWINNER_SUN50I_CPUFREQ_NVMEM=y +CONFIG_ARM_APPENDED_DTB=y +CONFIG_ARM_ARCH_TIMER=y +CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y +CONFIG_ARM_ATAG_DTB_COMPAT=y +CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y +CONFIG_ARM_CCI=y +CONFIG_ARM_CCI400_COMMON=y +CONFIG_ARM_CCI400_PORT_CTRL=y +CONFIG_ARM_CPU_SUSPEND=y +CONFIG_ARM_CRYPTO=y +CONFIG_ARM_ERRATA_643719=y +CONFIG_ARM_GIC=y +CONFIG_ARM_HAS_SG_CHAIN=y +CONFIG_ARM_HEAVY_MB=y +CONFIG_ARM_L1_CACHE_SHIFT=6 +CONFIG_ARM_L1_CACHE_SHIFT_6=y +CONFIG_ARM_LPAE=y +CONFIG_ARM_PATCH_IDIV=y +CONFIG_ARM_PATCH_PHYS_VIRT=y +CONFIG_ARM_PSCI=y +CONFIG_ARM_PSCI_FW=y +CONFIG_ARM_THUMB=y +CONFIG_ARM_UNWIND=y +CONFIG_ARM_VIRT_EXT=y +CONFIG_ATA=y +CONFIG_ATAGS=y +CONFIG_AUTO_ZRELADDR=y +CONFIG_AXP20X_POWER=y +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_PWM=y +CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_PM=y +CONFIG_BOUNCE=y +CONFIG_CACHE_L2X0=y +CONFIG_CAN=y +CONFIG_CLKSRC_MMIO=y +CONFIG_CLK_SUNXI=y +CONFIG_CLK_SUNXI_CLOCKS=y +CONFIG_CLK_SUNXI_PRCM_SUN6I=y +CONFIG_CLK_SUNXI_PRCM_SUN8I=y +CONFIG_CLK_SUNXI_PRCM_SUN9I=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMMON_CLK=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CONFIGFS_FS=y +CONFIG_CONNECTOR=y +CONFIG_CONSOLE_TRANSLATIONS=y +CONFIG_COREDUMP=y +CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y +CONFIG_CPUFREQ_DT=y +CONFIG_CPUFREQ_DT_PLATDEV=y +CONFIG_CPU_32v6K=y +CONFIG_CPU_32v7=y +CONFIG_CPU_ABRT_EV7=y +CONFIG_CPU_CACHE_V7=y +CONFIG_CPU_CACHE_VIPT=y +CONFIG_CPU_COPY_V6=y +CONFIG_CPU_CP15=y +CONFIG_CPU_CP15_MMU=y +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_ATTR_SET=y +CONFIG_CPU_FREQ_GOV_COMMON=y +CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y +CONFIG_CPU_FREQ_GOV_POWERSAVE=y +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_HAS_ASID=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CPU_PABRT_V7=y +CONFIG_CPU_PM=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SPECTRE=y +CONFIG_CPU_THERMAL=y +CONFIG_CPU_THUMB_CAPABLE=y +CONFIG_CPU_TLB_V7=y +CONFIG_CPU_V7=y +CONFIG_CRC16=y +CONFIG_CRC_T10DIF=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_CRCT10DIF_ARM_CE=y +CONFIG_CRYPTO_DES=y +CONFIG_CRYPTO_DEV_ALLWINNER=y +CONFIG_CRYPTO_DEV_SUN4I_SS=y +# CONFIG_CRYPTO_DEV_SUN4I_SS_DEBUG is not set +CONFIG_CRYPTO_DEV_SUN4I_SS_PRNG=y +# CONFIG_CRYPTO_DEV_SUN8I_CE is not set +# CONFIG_CRYPTO_DEV_SUN8I_SS is not set +CONFIG_CRYPTO_HW=y +CONFIG_CRYPTO_LIB_DES=y +CONFIG_CRYPTO_MD5=y +CONFIG_CRYPTO_RNG=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_SHA1=y +CONFIG_DCACHE_WORD_ACCESS=y +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S" +CONFIG_DEBUG_MEMORY_INIT=y +CONFIG_DMADEVICES=y +CONFIG_DMA_ENGINE=y +CONFIG_DMA_OF=y +CONFIG_DMA_OPS=y +CONFIG_DMA_REMAP=y +CONFIG_DMA_SUN4I=y +CONFIG_DMA_SUN6I=y +CONFIG_DMA_VIRTUAL_CHANNELS=y +CONFIG_DNOTIFY=y +CONFIG_DTC=y +CONFIG_DUMMY_CONSOLE=y +CONFIG_DVB_CORE=y +CONFIG_DWMAC_GENERIC=y +# CONFIG_DWMAC_SUN8I is not set +CONFIG_DWMAC_SUNXI=y +CONFIG_DYNAMIC_DEBUG=y +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +CONFIG_ELF_CORE=y +CONFIG_EXT4_FS=y +CONFIG_EXTCON=y +CONFIG_F2FS_FS=y +CONFIG_FAT_FS=y +CONFIG_FB=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_CMDLINE=y +CONFIG_FB_FOREIGN_ENDIAN=y +CONFIG_FB_LITTLE_ENDIAN=y +CONFIG_FB_MODE_HELPERS=y +CONFIG_FB_SIMPLE=y +CONFIG_FB_TILEBLITTING=y +CONFIG_FIXED_PHY=y +CONFIG_FIX_EARLYCON_MEM=y +CONFIG_FONT_8x16=y +CONFIG_FONT_8x8=y +CONFIG_FONT_SUPPORT=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +CONFIG_FRAME_WARN=2048 +CONFIG_FREEZER=y +CONFIG_FS_IOMAP=y +CONFIG_FS_MBCACHE=y +CONFIG_FS_POSIX_ACL=y +CONFIG_FWNODE_MDIO=y +CONFIG_FW_CACHE=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ALLOCATOR=y +CONFIG_GENERIC_ARCH_TOPOLOGY=y +CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_CPU_VULNERABILITIES=y +CONFIG_GENERIC_EARLY_IOREMAP=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IDLE_POLL_SETUP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_MIGRATION=y +CONFIG_GENERIC_IRQ_MULTI_HANDLER=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_IRQ_SHOW_LEVEL=y +CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_STRNCPY_FROM_USER=y +CONFIG_GENERIC_STRNLEN_USER=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GENERIC_VDSO_32=y +CONFIG_GLOB=y +CONFIG_GPIO_CDEV=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDEN_BRANCH_PREDICTOR=y +CONFIG_HARDIRQS_SW_RESEND=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAVE_SMP=y +CONFIG_HIGHMEM=y +CONFIG_HIGHPTE=y +CONFIG_HOTPLUG_CPU=y +CONFIG_HWMON=y +CONFIG_HW_CONSOLE=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_TIMERIOMEM=y +CONFIG_HZ_FIXED=0 +CONFIG_I2C=y +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=y +CONFIG_I2C_COMPAT=y +CONFIG_I2C_HELPER_AUTO=y +CONFIG_I2C_MV64XXX=y +CONFIG_I2C_SUN6I_P2WI=y +CONFIG_IIO=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_INPUT=y +CONFIG_INPUT_AXP20X_PEK=y +CONFIG_INPUT_KEYBOARD=y +CONFIG_INPUT_MOUSEDEV=y +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_DOMAIN_HIERARCHY=y +CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +CONFIG_JBD2=y +CONFIG_KALLSYMS=y +CONFIG_KEYBOARD_SUN4I_LRADC=y +CONFIG_KMAP_LOCAL=y +CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y +CONFIG_KSM=y +CONFIG_LCD_CLASS_DEVICE=y +CONFIG_LCD_PLATFORM=y +CONFIG_LEDS_GPIO=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_LOCK_SPIN_ON_OWNER=y +CONFIG_LOGO=y +CONFIG_LOGO_LINUX_CLUT224=y +CONFIG_LOGO_LINUX_MONO=y +CONFIG_LOGO_LINUX_VGA16=y +CONFIG_MACH_SUN4I=y +CONFIG_MACH_SUN5I=y +CONFIG_MACH_SUN6I=y +CONFIG_MACH_SUN7I=y +CONFIG_MACH_SUN8I=y +CONFIG_MACH_SUN9I=y +CONFIG_MAGIC_SYSRQ=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MDIO_SUN4I=y +CONFIG_MEDIA_ANALOG_TV_SUPPORT=y +CONFIG_MEDIA_ATTACH=y +CONFIG_MEDIA_CAMERA_SUPPORT=y +CONFIG_MEDIA_DIGITAL_TV_SUPPORT=y +CONFIG_MEDIA_PLATFORM_SUPPORT=y +CONFIG_MEDIA_RADIO_SUPPORT=y +CONFIG_MEDIA_SDR_SUPPORT=y +CONFIG_MEDIA_SUPPORT=y +CONFIG_MEDIA_TEST_SUPPORT=y +CONFIG_MEDIA_TUNER=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_AXP20X=y +CONFIG_MFD_AXP20X_I2C=y +CONFIG_MFD_AXP20X_RSB=y +CONFIG_MFD_CORE=y +CONFIG_MFD_SUN6I_PRCM=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGHT_HAVE_CACHE_L2X0=y +CONFIG_MIGRATION=y +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_SUNXI=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MTD_JEDECPROBE=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_FIT_FW=y +CONFIG_MUTEX_SPIN_ON_OWNER=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEON=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NET_PTP_CLASSIFY=y +CONFIG_NET_SELFTESTS=y +CONFIG_NET_VENDOR_ALLWINNER=y +CONFIG_NLS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NO_HZ=y +CONFIG_NO_HZ_COMMON=y +CONFIG_NO_HZ_IDLE=y +CONFIG_NR_CPUS=8 +CONFIG_NVMEM=y +CONFIG_NVMEM_SUNXI_SID=y +CONFIG_NVMEM_SYSFS=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OLD_SIGACTION=y +CONFIG_OLD_SIGSUSPEND3=y +CONFIG_OUTER_CACHE=y +CONFIG_OUTER_CACHE_SYNC=y +CONFIG_PADATA=y +CONFIG_PAGE_OFFSET=0xC0000000 +CONFIG_PAGE_POOL=y +CONFIG_PCS_XPCS=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_PHYLIB=y +CONFIG_PHYLINK=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_PHY_SUN4I_USB=y +# CONFIG_PHY_SUN50I_USB3 is not set +# CONFIG_PHY_SUN6I_MIPI_DPHY is not set +CONFIG_PHY_SUN9I_USB=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_AXP209=y +# CONFIG_PINCTRL_SUN20I_D1 is not set +CONFIG_PINCTRL_SUN4I_A10=y +# CONFIG_PINCTRL_SUN50I_A100 is not set +# CONFIG_PINCTRL_SUN50I_A100_R is not set +# CONFIG_PINCTRL_SUN50I_A64 is not set +# CONFIG_PINCTRL_SUN50I_A64_R is not set +# CONFIG_PINCTRL_SUN50I_H5 is not set +# CONFIG_PINCTRL_SUN50I_H6 is not set +# CONFIG_PINCTRL_SUN50I_H616 is not set +# CONFIG_PINCTRL_SUN50I_H616_R is not set +# CONFIG_PINCTRL_SUN50I_H6_R is not set +CONFIG_PINCTRL_SUN5I=y +CONFIG_PINCTRL_SUN6I_A31=y +CONFIG_PINCTRL_SUN6I_A31_R=y +CONFIG_PINCTRL_SUN8I_A23=y +CONFIG_PINCTRL_SUN8I_A23_R=y +CONFIG_PINCTRL_SUN8I_A33=y +CONFIG_PINCTRL_SUN8I_A83T=y +CONFIG_PINCTRL_SUN8I_A83T_R=y +CONFIG_PINCTRL_SUN8I_H3=y +CONFIG_PINCTRL_SUN8I_H3_R=y +CONFIG_PINCTRL_SUN8I_V3S=y +CONFIG_PINCTRL_SUN9I_A80=y +CONFIG_PINCTRL_SUN9I_A80_R=y +CONFIG_PINCTRL_SUNXI=y +CONFIG_PM=y +CONFIG_PM_CLK=y +CONFIG_PM_OPP=y +CONFIG_PM_SLEEP=y +CONFIG_PM_SLEEP_SMP=y +CONFIG_POWER_RESET=y +CONFIG_POWER_SUPPLY=y +CONFIG_PPS=y +CONFIG_PRINTK_TIME=y +CONFIG_PROC_EVENTS=y +CONFIG_PROC_PAGE_MONITOR=y +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y +CONFIG_PWM=y +CONFIG_PWM_SUN4I=y +CONFIG_PWM_SYSFS=y +CONFIG_RATIONAL=y +CONFIG_REALTEK_PHY=y +CONFIG_REGMAP=y +CONFIG_REGMAP_I2C=y +CONFIG_REGMAP_IRQ=y +CONFIG_REGMAP_MMIO=y +CONFIG_REGMAP_SPI=y +CONFIG_REGULATOR=y +CONFIG_REGULATOR_AXP20X=y +CONFIG_REGULATOR_FIXED_VOLTAGE=y +CONFIG_REGULATOR_GPIO=y +CONFIG_REGULATOR_SY8106A=y +CONFIG_RELAY=y +CONFIG_RESET_CONTROLLER=y +CONFIG_RESET_SIMPLE=y +CONFIG_RESET_SUNXI=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_RWSEM_SPIN_ON_OWNER=y +CONFIG_SATA_HOST=y +CONFIG_SATA_PMP=y +CONFIG_SCSI=y +CONFIG_SCSI_COMMON=y +CONFIG_SDIO_UART=y +CONFIG_SECURITYFS=y +CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SERIAL_8250_DWLIB=y +CONFIG_SERIAL_8250_FSL=y +CONFIG_SERIAL_8250_NR_UARTS=8 +CONFIG_SERIAL_8250_RUNTIME_UARTS=8 +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SERIO=y +CONFIG_SERIO_SERPORT=y +CONFIG_SG_POOL=y +CONFIG_SMP=y +CONFIG_SMP_ON_UP=y +CONFIG_SND=y +CONFIG_SND_COMPRESS_OFFLOAD=y +CONFIG_SND_JACK=y +CONFIG_SND_JACK_INPUT_DEV=y +CONFIG_SND_PCM=y +CONFIG_SND_SIMPLE_CARD=y +CONFIG_SND_SIMPLE_CARD_UTILS=y +CONFIG_SND_SOC=y +CONFIG_SND_SOC_I2C_AND_SPI=y +# CONFIG_SND_SUN4I_I2S is not set +# CONFIG_SND_SUN4I_SPDIF is not set +# CONFIG_SND_SUN50I_DMIC is not set +# CONFIG_SND_SUN8I_CODEC is not set +# CONFIG_SND_SUN8I_CODEC_ANALOG is not set +CONFIG_SOCK_RX_QUEUE_MAPPING=y +CONFIG_SOUND=y +CONFIG_SOUND_OSS_CORE=y +CONFIG_SPARSE_IRQ=y +CONFIG_SPI=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +CONFIG_SPI_SUN4I=y +CONFIG_SPI_SUN6I=y +CONFIG_SRCU=y +CONFIG_STMMAC_ETH=y +CONFIG_STMMAC_PLATFORM=y +# CONFIG_SUN20I_GPADC is not set +# CONFIG_SUN20I_PPU is not set +CONFIG_SUN4I_A10_CCU=y +# CONFIG_SUN4I_EMAC is not set +CONFIG_SUN4I_TIMER=y +CONFIG_SUN5I_CCU=y +CONFIG_SUN5I_HSTIMER=y +CONFIG_SUN6I_A31_CCU=y +# CONFIG_SUN6I_RTC_CCU is not set +CONFIG_SUN8I_A23_CCU=y +CONFIG_SUN8I_A33_CCU=y +CONFIG_SUN8I_A83T_CCU=y +CONFIG_SUN8I_DE2_CCU=y +CONFIG_SUN8I_H3_CCU=y +CONFIG_SUN8I_R40_CCU=y +CONFIG_SUN8I_R_CCU=y +CONFIG_SUN8I_THERMAL=y +CONFIG_SUN8I_V3S_CCU=y +CONFIG_SUN9I_A80_CCU=y +CONFIG_SUNXI_CCU=y +CONFIG_SUNXI_MBUS=y +CONFIG_SUNXI_RSB=y +CONFIG_SUNXI_SRAM=y +CONFIG_SUNXI_WATCHDOG=y +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_SWIOTLB=y +CONFIG_SWPHY=y +CONFIG_SWP_EMULATE=y +CONFIG_SYSFS_SYSCALL=y +CONFIG_SYS_SUPPORTS_APM_EMULATION=y +CONFIG_THERMAL=y +CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y +CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 +CONFIG_THERMAL_GOV_STEP_WISE=y +CONFIG_THERMAL_HWMON=y +CONFIG_THERMAL_OF=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TIMER_OF=y +CONFIG_TIMER_PROBE=y +CONFIG_TMPFS_POSIX_ACL=y +CONFIG_TOUCHSCREEN_SUN4I=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h" +CONFIG_UNWINDER_ARM=y +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_COMMON=y +CONFIG_USB_DWC2=y +CONFIG_USB_DWC2_HOST=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +CONFIG_USB_GADGET=y +CONFIG_USB_NET_DRIVERS=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_ROLE_SWITCH=y +CONFIG_USB_STORAGE=y +CONFIG_USB_SUPPORT=y +CONFIG_USERIO=y +CONFIG_USE_OF=y +CONFIG_VFAT_FS=y +CONFIG_VFP=y +CONFIG_VFPv3=y +CONFIG_VHOST=y +CONFIG_VHOST_IOTLB=y +CONFIG_VHOST_NET=y +# CONFIG_VIDEO_SUN4I_CSI is not set +# CONFIG_VIDEO_SUN6I_CSI is not set +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_VT=y +CONFIG_VT_CONSOLE=y +CONFIG_VT_CONSOLE_SLEEP=y +CONFIG_VT_HW_CONSOLE_BINDING=y +CONFIG_WATCHDOG_CORE=y +CONFIG_XPS=y +CONFIG_XXHASH=y +CONFIG_XZ_DEC_ARM=y +CONFIG_XZ_DEC_BCJ=y +CONFIG_ZBOOT_ROM_BSS=0 +CONFIG_ZBOOT_ROM_TEXT=0 diff --git a/target/linux/sunxi/cortexa53/config-6.1 b/target/linux/sunxi/cortexa53/config-6.1 index f57c66454..cac7fff4d 100644 --- a/target/linux/sunxi/cortexa53/config-6.1 +++ b/target/linux/sunxi/cortexa53/config-6.1 @@ -53,6 +53,7 @@ CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 CONFIG_MDIO_BUS_MUX=y CONFIG_MICREL_PHY=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MOTORCOMM_PHY=y CONFIG_MUSB_PIO_ONLY=y CONFIG_NEED_SG_DMA_LENGTH=y CONFIG_NOP_USB_XCEIV=y diff --git a/target/linux/sunxi/cortexa53/config-6.6 b/target/linux/sunxi/cortexa53/config-6.6 new file mode 100644 index 000000000..cac7fff4d --- /dev/null +++ b/target/linux/sunxi/cortexa53/config-6.6 @@ -0,0 +1,108 @@ +CONFIG_64BIT=y +CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y +CONFIG_ARCH_MMAP_RND_BITS=18 +CONFIG_ARCH_MMAP_RND_BITS_MAX=24 +CONFIG_ARCH_MMAP_RND_BITS_MIN=18 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 +CONFIG_ARCH_PROC_KCORE_TEXT=y +CONFIG_ARCH_STACKWALK=y +CONFIG_ARCH_WANTS_NO_INSTR=y +CONFIG_ARM64=y +CONFIG_ARM64_4K_PAGES=y +CONFIG_ARM64_CRYPTO=y +CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y +CONFIG_ARM64_ERRATUM_2051678=y +CONFIG_ARM64_ERRATUM_2077057=y +CONFIG_ARM64_ERRATUM_2658417=y +CONFIG_ARM64_ERRATUM_2054223=y +CONFIG_ARM64_ERRATUM_2067961=y +CONFIG_ARM64_PAGE_SHIFT=12 +CONFIG_ARM64_PA_BITS=48 +CONFIG_ARM64_PA_BITS_48=y +CONFIG_ARM64_TAGGED_ADDR_ABI=y +CONFIG_ARM64_VA_BITS=39 +CONFIG_ARM64_VA_BITS_39=y +CONFIG_ARM_AMBA=y +CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y +CONFIG_ARM_GIC_V3=y +CONFIG_ARM_GIC_V3_ITS=y +CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y +CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y +CONFIG_CPU_LITTLE_ENDIAN=y +CONFIG_CRYPTO_AES_ARM64=y +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_BLAKE2S=y +CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y +CONFIG_CRYPTO_CRYPTD=y +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SIMD=y +CONFIG_DMA_DIRECT_REMAP=y +CONFIG_DWMAC_SUN8I=y +CONFIG_EEPROM_AT24=y +CONFIG_FRAME_POINTER=y +CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y +CONFIG_GENERIC_CSUM=y +CONFIG_GENERIC_FIND_FIRST_BIT=y +CONFIG_GENERIC_MSI_IRQ=y +CONFIG_GENERIC_MSI_IRQ_DOMAIN=y +CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_MDIO_BUS_MUX=y +CONFIG_MICREL_PHY=y +CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_MOTORCOMM_PHY=y +CONFIG_MUSB_PIO_ONLY=y +CONFIG_NEED_SG_DMA_LENGTH=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_NO_IOPORT_MAP=y +CONFIG_PARTITION_PERCPU=y +CONFIG_PHY_SUN50I_USB3=y +CONFIG_PINCTRL_SUN50I_A100=y +CONFIG_PINCTRL_SUN50I_A100_R=y +CONFIG_PINCTRL_SUN50I_A64=y +CONFIG_PINCTRL_SUN50I_A64_R=y +CONFIG_PINCTRL_SUN50I_H5=y +CONFIG_PINCTRL_SUN50I_H6=y +CONFIG_PINCTRL_SUN50I_H6_R=y +CONFIG_PINCTRL_SUN50I_H616=y +CONFIG_PINCTRL_SUN50I_H616_R=y +# CONFIG_PREEMPT_DYNAMIC is not set +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RODATA_FULL_DEFAULT_ENABLED=y +# CONFIG_SCHED_CLUSTER is not set +# CONFIG_SHADOW_CALL_STACK is not set +# CONFIG_SND_SUN50I_CODEC_ANALOG is not set +CONFIG_SOUND_OSS_CORE_PRECLAIM=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_EXTREME=y +CONFIG_SPARSEMEM_VMEMMAP=y +CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y +CONFIG_SUN50I_A100_CCU=y +CONFIG_SUN50I_A100_R_CCU=y +CONFIG_SUN50I_A64_CCU=y +CONFIG_SUN50I_DE2_BUS=y +CONFIG_SUN50I_ERRATUM_UNKNOWN1=y +CONFIG_SUN50I_H616_CCU=y +CONFIG_SUN50I_H6_CCU=y +CONFIG_SUN50I_H6_R_CCU=y +# CONFIG_SUN6I_RTC_CCU is not set +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_UNMAP_KERNEL_AT_EL0=y +CONFIG_USB_MUSB_DUAL_ROLE=y +CONFIG_USB_MUSB_HDRC=y +CONFIG_USB_MUSB_SUNXI=y +CONFIG_USB_PHY=y +CONFIG_VMAP_STACK=y +CONFIG_ZONE_DMA32=y +CONFIG_SURFACE_PLATFORMS=y +# CONFIG_CRYPTO_POLYVAL_ARM64_CE is not set +# CONFIG_CRYPTO_SM4_ARM64_CE_BLK is not set +# CONFIG_CRYPTO_SM4_ARM64_NEON_BLK is not set +# CONFIG_PAGE_TABLE_CHECK is not set +CONFIG_RANDOMIZE_KSTACK_OFFSET=y +# CONFIG_ARCH_NXP is not set diff --git a/target/linux/sunxi/cortexa53/target.mk b/target/linux/sunxi/cortexa53/target.mk index 771e07d29..02b31702b 100644 --- a/target/linux/sunxi/cortexa53/target.mk +++ b/target/linux/sunxi/cortexa53/target.mk @@ -8,3 +8,4 @@ ARCH:=aarch64 BOARDNAME:=Allwinner A64/H5/H6/H616 CPU_TYPE:=cortex-a53 KERNELNAME:=Image dtbs +FEATURES+=fpu \ No newline at end of file diff --git a/target/linux/sunxi/cortexa7/config-6.1 b/target/linux/sunxi/cortexa7/config-6.1 index e911da4c3..76fdc0dff 100644 --- a/target/linux/sunxi/cortexa7/config-6.1 +++ b/target/linux/sunxi/cortexa7/config-6.1 @@ -1,3 +1,5 @@ +CONFIG_ARCH_MULTI_V6_V7=y +CONFIG_ARCH_MULTI_V7=y CONFIG_B53=y CONFIG_B53_MDIO_DRIVER=y CONFIG_CRYPTO_BLAKE2S_ARM=y diff --git a/target/linux/sunxi/cortexa7/config-6.6 b/target/linux/sunxi/cortexa7/config-6.6 new file mode 100644 index 000000000..105c09089 --- /dev/null +++ b/target/linux/sunxi/cortexa7/config-6.6 @@ -0,0 +1,28 @@ +CONFIG_B53=y +CONFIG_B53_MDIO_DRIVER=y +CONFIG_CRYPTO_BLAKE2S_ARM=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +CONFIG_DWMAC_SUN8I=y +CONFIG_GRO_CELLS=y +# CONFIG_HARDEN_BRANCH_HISTORY is not set +# CONFIG_HARDEN_BRANCH_PREDICTOR is not set +# CONFIG_MACH_SUN4I is not set +# CONFIG_MACH_SUN5I is not set +CONFIG_MDIO_BUS_MUX=y +CONFIG_MICREL_PHY=y +CONFIG_MUSB_PIO_ONLY=y +CONFIG_NET_DEVLINK=y +CONFIG_NET_DSA=y +CONFIG_NET_DSA_TAG_BRCM=y +CONFIG_NET_DSA_TAG_BRCM_COMMON=y +CONFIG_NET_DSA_TAG_BRCM_LEGACY=y +CONFIG_NET_DSA_TAG_BRCM_PREPEND=y +CONFIG_NET_SWITCHDEV=y +CONFIG_NOP_USB_XCEIV=y +CONFIG_RTC_DRV_SUN6I=y +CONFIG_SUN20I_D1_CCU=y +CONFIG_SUN20I_D1_R_CCU=y +CONFIG_USB_MUSB_DUAL_ROLE=y +CONFIG_USB_MUSB_HDRC=y +CONFIG_USB_MUSB_SUNXI=y +CONFIG_USB_PHY=y diff --git a/target/linux/sunxi/cortexa7/target.mk b/target/linux/sunxi/cortexa7/target.mk index 95315fd4a..52a89e910 100644 --- a/target/linux/sunxi/cortexa7/target.mk +++ b/target/linux/sunxi/cortexa7/target.mk @@ -7,3 +7,4 @@ include $(TOPDIR)/rules.mk BOARDNAME:=Allwinner A20/A3x/H3/R40 CPU_TYPE:=cortex-a7 CPU_SUBTYPE:=neon-vfpv4 +FEATURES+=fpu diff --git a/target/linux/sunxi/cortexa8/config-6.1 b/target/linux/sunxi/cortexa8/config-6.1 index b893b3142..274778dd0 100644 --- a/target/linux/sunxi/cortexa8/config-6.1 +++ b/target/linux/sunxi/cortexa8/config-6.1 @@ -1,3 +1,5 @@ +CONFIG_ARCH_MULTI_V6_V7=y +CONFIG_ARCH_MULTI_V7=y # CONFIG_ARM_LPAE is not set CONFIG_CRYPTO_BLAKE2S_ARM=y CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y diff --git a/target/linux/sunxi/cortexa8/config-6.6 b/target/linux/sunxi/cortexa8/config-6.6 new file mode 100644 index 000000000..b893b3142 --- /dev/null +++ b/target/linux/sunxi/cortexa8/config-6.6 @@ -0,0 +1,12 @@ +# CONFIG_ARM_LPAE is not set +CONFIG_CRYPTO_BLAKE2S_ARM=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y +# CONFIG_MACH_SUN6I is not set +# CONFIG_MACH_SUN7I is not set +# CONFIG_MACH_SUN8I is not set +# CONFIG_MACH_SUN9I is not set +CONFIG_PGTABLE_LEVELS=2 +# CONFIG_PHY_SUN9I_USB is not set +# CONFIG_SPI_SUN6I is not set +# CONFIG_SUN8I_A83T_CCU is not set +# CONFIG_SUN8I_THERMAL is not set diff --git a/target/linux/sunxi/cortexa8/target.mk b/target/linux/sunxi/cortexa8/target.mk index cf30ca787..7f34cc8ea 100644 --- a/target/linux/sunxi/cortexa8/target.mk +++ b/target/linux/sunxi/cortexa8/target.mk @@ -7,3 +7,4 @@ include $(TOPDIR)/rules.mk BOARDNAME:=Allwinner A1x CPU_TYPE:=cortex-a8 CPU_SUBTYPE:=vfpv3 +FEATURES+=fpu diff --git a/target/linux/sunxi/image/Makefile b/target/linux/sunxi/image/Makefile index 738585acc..fc1359d17 100644 --- a/target/linux/sunxi/image/Makefile +++ b/target/linux/sunxi/image/Makefile @@ -10,7 +10,6 @@ FAT32_BLOCK_SIZE=1024 FAT32_BLOCKS=$(shell echo $$(($(CONFIG_SUNXI_SD_BOOT_PARTSIZE)*1024*1024/$(FAT32_BLOCK_SIZE)))) DEVICE_VARS := SUNXI_DTS SUNXI_DTS_DIR -KERNEL_LOADADDR:=0x40008000 define Build/sunxi-sdcard rm -f $@.boot @@ -35,7 +34,9 @@ define Device/Default KERNEL := kernel-bin | uImage none IMAGES := sdcard.img.gz IMAGE/sdcard.img.gz := sunxi-sdcard | append-metadata | gzip - SUNXI_DTS_DIR := +ifdef CONFIG_LINUX_6_6 + SUNXI_DTS_DIR :=allwinner/ +endif SUNXI_DTS = $$(SUNXI_DTS_DIR)$$(SOC)-$(lastword $(subst _, ,$(1))) endef diff --git a/target/linux/sunxi/image/arm926ejs.mk b/target/linux/sunxi/image/arm926ejs.mk new file mode 100644 index 000000000..1ce230feb --- /dev/null +++ b/target/linux/sunxi/image/arm926ejs.mk @@ -0,0 +1,24 @@ +# +# Copyright (C) 2013-2024 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +KERNEL_LOADADDR=0x81000000 + +define Device/licheepi-nano + DEVICE_VENDOR := LicheePi + DEVICE_MODEL := Nano + DEVICE_PACKAGES := kmod-rtc-sunxi + SOC := suniv-f1c100s +endef +TARGET_DEVICES += licheepi-nano + +define Device/popstick-v1.1 + DEVICE_VENDOR := PopStick + DEVICE_MODEL := v1.1 + DEVICE_PACKAGES := kmod-rtc-sunxi + SOC := suniv-f1c200s +endef +TARGET_DEVICES += popstick-v1.1 diff --git a/target/linux/sunxi/image/cortexa53.mk b/target/linux/sunxi/image/cortexa53.mk index 80718b34b..06b409deb 100644 --- a/target/linux/sunxi/image/cortexa53.mk +++ b/target/linux/sunxi/image/cortexa53.mk @@ -3,6 +3,8 @@ # Copyright (C) 2013-2016 OpenWrt.org # Copyright (C) 2016 Yousong Zhou +KERNEL_LOADADDR:=0x40008000 + define Device/sun50i SUNXI_DTS_DIR := allwinner/ KERNEL_NAME := Image @@ -29,6 +31,11 @@ define Device/sun50i-h616 $(Device/sun50i) endef +define Device/sun50i-h618 + SOC := sun50i-h618 + $(Device/sun50i) +endef + define Device/friendlyarm_nanopi-neo-plus2 DEVICE_VENDOR := FriendlyARM DEVICE_MODEL := NanoPi NEO Plus2 @@ -120,6 +127,13 @@ define Device/xunlong_orangepi-zero2 endef TARGET_DEVICES += xunlong_orangepi-zero2 +define Device/xunlong_orangepi-zero3 + DEVICE_VENDOR := Xunlong + DEVICE_MODEL := Orange Pi Zero 3 + $(Device/sun50i-h618) +endef +TARGET_DEVICES += xunlong_orangepi-zero3 + define Device/xunlong_orangepi-zero-plus DEVICE_VENDOR := Xunlong DEVICE_MODEL := Orange Pi Zero Plus diff --git a/target/linux/sunxi/image/cortexa7.mk b/target/linux/sunxi/image/cortexa7.mk index 3191cec4f..a85b20531 100644 --- a/target/linux/sunxi/image/cortexa7.mk +++ b/target/linux/sunxi/image/cortexa7.mk @@ -3,6 +3,8 @@ # Copyright (C) 2013-2019 OpenWrt.org # Copyright (C) 2016 Yousong Zhou +KERNEL_LOADADDR:=0x40008000 + define Device/cubietech_cubieboard2 DEVICE_VENDOR := Cubietech DEVICE_MODEL := Cubieboard2 diff --git a/target/linux/sunxi/image/cortexa8.mk b/target/linux/sunxi/image/cortexa8.mk index eafc2187e..e27db1ee1 100644 --- a/target/linux/sunxi/image/cortexa8.mk +++ b/target/linux/sunxi/image/cortexa8.mk @@ -3,6 +3,8 @@ # Copyright (C) 2013-2016 OpenWrt.org # Copyright (C) 2016 Yousong Zhou +KERNEL_LOADADDR:=0x40008000 + define Device/cubietech_a10-cubieboard DEVICE_VENDOR := Cubietech DEVICE_MODEL := Cubieboard @@ -43,7 +45,7 @@ define Device/olimex_a13-olimex-som DEVICE_PACKAGES:=kmod-rtl8192cu SUPPORTED_DEVICES:=olimex,a13-olinuxino SOC := sun5i-a13 - SUNXI_DTS := sun5i-a13-olinuxino + SUNXI_DTS := $$(SUNXI_DTS_DIR)sun5i-a13-olinuxino endef TARGET_DEVICES += olimex_a13-olimex-som diff --git a/target/linux/sunxi/patches-6.1/005-v6.6-arm64-dts-allwinner-h616-Split-Orange-Pi-Zero-2-DT.patch b/target/linux/sunxi/patches-6.1/005-v6.6-arm64-dts-allwinner-h616-Split-Orange-Pi-Zero-2-DT.patch new file mode 100644 index 000000000..0747e6a8e --- /dev/null +++ b/target/linux/sunxi/patches-6.1/005-v6.6-arm64-dts-allwinner-h616-Split-Orange-Pi-Zero-2-DT.patch @@ -0,0 +1,305 @@ +From 322bf103204b8f786547acbeed85569254e7088f Mon Sep 17 00:00:00 2001 +From: Andre Przywara +Date: Fri, 4 Aug 2023 18:08:54 +0100 +Subject: [PATCH] arm64: dts: allwinner: h616: Split Orange Pi Zero 2 DT + +The Orange Pi Zero 2 got a successor (Zero 3), which shares quite some +DT nodes with the Zero 2, but comes with a different PMIC. + +Move the common parts (except the PMIC) into a new shared file, and +include that from the existing board .dts file. + +No functional change, the generated DTB is the same, except for some +phandle numbering differences. + +Signed-off-by: Andre Przywara +Acked-by: Jernej Skrabec +Link: https://lore.kernel.org/r/20230804170856.1237202-2-andre.przywara@arm.com +Signed-off-by: Jernej Skrabec +--- + .../allwinner/sun50i-h616-orangepi-zero.dtsi | 134 ++++++++++++++++++ + .../allwinner/sun50i-h616-orangepi-zero2.dts | 119 +--------------- + 2 files changed, 135 insertions(+), 118 deletions(-) + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi + +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi +@@ -0,0 +1,134 @@ ++// SPDX-License-Identifier: (GPL-2.0+ or MIT) ++/* ++ * Copyright (C) 2020 Arm Ltd. ++ * ++ * DT nodes common between Orange Pi Zero 2 and Orange Pi Zero 3. ++ * Excludes PMIC nodes and properties, since they are different between the two. ++ */ ++ ++#include "sun50i-h616.dtsi" ++ ++#include ++#include ++#include ++ ++/ { ++ aliases { ++ ethernet0 = &emac0; ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led-0 { ++ function = LED_FUNCTION_POWER; ++ color = ; ++ gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */ ++ default-state = "on"; ++ }; ++ ++ led-1 { ++ function = LED_FUNCTION_STATUS; ++ color = ; ++ gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */ ++ }; ++ }; ++ ++ reg_vcc5v: vcc5v { ++ /* board wide 5V supply directly from the USB-C socket */ ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc-5v"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ reg_usb1_vbus: regulator-usb1-vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb1-vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <®_vcc5v>; ++ enable-active-high; ++ gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */ ++ }; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++/* USB 2 & 3 are on headers only. */ ++ ++&emac0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ext_rgmii_pins>; ++ phy-mode = "rgmii"; ++ phy-handle = <&ext_rgmii_phy>; ++ allwinner,rx-delay-ps = <3100>; ++ allwinner,tx-delay-ps = <700>; ++ status = "okay"; ++}; ++ ++&mdio0 { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ ++&mmc0 { ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ ++ bus-width = <4>; ++ status = "okay"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&spi0 { ++ status = "okay"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; ++ ++ flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ reg = <0>; ++ spi-max-frequency = <40000000>; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_ph_pins>; ++ status = "okay"; ++}; ++ ++&usbotg { ++ /* ++ * PHY0 pins are connected to a USB-C socket, but a role switch ++ * is not implemented: both CC pins are pulled to GND. ++ * The VBUS pins power the device, so a fixed peripheral mode ++ * is the best choice. ++ * The board can be powered via GPIOs, in this case port0 *can* ++ * act as a host (with a cable/adapter ignoring CC), as VBUS is ++ * then provided by the GPIOs. Any user of this setup would ++ * need to adjust the DT accordingly: dr_mode set to "host", ++ * enabling OHCI0 and EHCI0. ++ */ ++ dr_mode = "peripheral"; ++ status = "okay"; ++}; ++ ++&usbphy { ++ usb1_vbus-supply = <®_usb1_vbus>; ++ status = "okay"; ++}; +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts +@@ -5,95 +5,19 @@ + + /dts-v1/; + +-#include "sun50i-h616.dtsi" +- +-#include +-#include +-#include ++#include "sun50i-h616-orangepi-zero.dtsi" + + / { + model = "OrangePi Zero2"; + compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616"; +- +- aliases { +- ethernet0 = &emac0; +- serial0 = &uart0; +- }; +- +- chosen { +- stdout-path = "serial0:115200n8"; +- }; +- +- leds { +- compatible = "gpio-leds"; +- +- led-0 { +- function = LED_FUNCTION_POWER; +- color = ; +- gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */ +- default-state = "on"; +- }; +- +- led-1 { +- function = LED_FUNCTION_STATUS; +- color = ; +- gpios = <&pio 2 13 GPIO_ACTIVE_HIGH>; /* PC13 */ +- }; +- }; +- +- reg_vcc5v: vcc5v { +- /* board wide 5V supply directly from the USB-C socket */ +- compatible = "regulator-fixed"; +- regulator-name = "vcc-5v"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- regulator-always-on; +- }; +- +- reg_usb1_vbus: regulator-usb1-vbus { +- compatible = "regulator-fixed"; +- regulator-name = "usb1-vbus"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; +- vin-supply = <®_vcc5v>; +- enable-active-high; +- gpio = <&pio 2 16 GPIO_ACTIVE_HIGH>; /* PC16 */ +- }; +-}; +- +-&ehci1 { +- status = "okay"; + }; + +-/* USB 2 & 3 are on headers only. */ +- + &emac0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&ext_rgmii_pins>; +- phy-mode = "rgmii"; +- phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_dcdce>; +- allwinner,rx-delay-ps = <3100>; +- allwinner,tx-delay-ps = <700>; +- status = "okay"; +-}; +- +-&mdio0 { +- ext_rgmii_phy: ethernet-phy@1 { +- compatible = "ethernet-phy-ieee802.3-c22"; +- reg = <1>; +- }; + }; + + &mmc0 { + vmmc-supply = <®_dcdce>; +- cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ +- bus-width = <4>; +- status = "okay"; +-}; +- +-&ohci1 { +- status = "okay"; + }; + + &r_rsb { +@@ -211,44 +135,3 @@ + vcc-ph-supply = <®_aldo1>; + vcc-pi-supply = <®_aldo1>; + }; +- +-&spi0 { +- status = "okay"; +- pinctrl-names = "default"; +- pinctrl-0 = <&spi0_pins>, <&spi0_cs0_pin>; +- +- flash@0 { +- #address-cells = <1>; +- #size-cells = <1>; +- compatible = "jedec,spi-nor"; +- reg = <0>; +- spi-max-frequency = <40000000>; +- }; +-}; +- +-&uart0 { +- pinctrl-names = "default"; +- pinctrl-0 = <&uart0_ph_pins>; +- status = "okay"; +-}; +- +-&usbotg { +- /* +- * PHY0 pins are connected to a USB-C socket, but a role switch +- * is not implemented: both CC pins are pulled to GND. +- * The VBUS pins power the device, so a fixed peripheral mode +- * is the best choice. +- * The board can be powered via GPIOs, in this case port0 *can* +- * act as a host (with a cable/adapter ignoring CC), as VBUS is +- * then provided by the GPIOs. Any user of this setup would +- * need to adjust the DT accordingly: dr_mode set to "host", +- * enabling OHCI0 and EHCI0. +- */ +- dr_mode = "peripheral"; +- status = "okay"; +-}; +- +-&usbphy { +- usb1_vbus-supply = <®_usb1_vbus>; +- status = "okay"; +-}; diff --git a/target/linux/sunxi/patches-6.1/006-v6.6-arm64-dts-allwinner-h616-Add-OrangePi-Zero-3-board.patch b/target/linux/sunxi/patches-6.1/006-v6.6-arm64-dts-allwinner-h616-Add-OrangePi-Zero-3-board.patch new file mode 100644 index 000000000..4081a82d5 --- /dev/null +++ b/target/linux/sunxi/patches-6.1/006-v6.6-arm64-dts-allwinner-h616-Add-OrangePi-Zero-3-board.patch @@ -0,0 +1,140 @@ +From f1b3ddb3ecc2eec1f912383e01156c226daacfab Mon Sep 17 00:00:00 2001 +From: Andre Przywara +Date: Fri, 4 Aug 2023 18:08:56 +0100 +Subject: [PATCH] arm64: dts: allwinner: h616: Add OrangePi Zero 3 board + support + +The OrangePi Zero 3 is a development board based on the Allwinner H618 SoC, +which seems to be just an H616 with more L2 cache. The board itself is a +slightly updated version of the Orange Pi Zero 2. It features: +- Four ARM Cortex-A53 cores, Mali-G31 MP2 GPU +- 1/1.5/2/4 GiB LPDDR4 DRAM SKUs (only up to 1GB on the Zero2) +- AXP313a PMIC (more capable AXP305 on the Zero2) +- Raspberry-Pi-1 compatible GPIO header +- extra 13 pin expansion header, exposing pins for 2x USB 2.0 ports +- 1 USB 2.0 host port +- 1 USB 2.0 type C port (power supply + OTG) +- MicroSD slot +- on-board 16MiB bootable SPI NOR flash (only 2MB on the Zero2) +- 1Gbps Ethernet port (via Motorcomm YT8531 PHY) (RTL8211 on the Zero2) +- micro-HDMI port +- (yet) unsupported Allwinner WiFi/BT chip + +Add the devicetree file describing the currently supported features, +namely LEDs, SD card, PMIC, SPI flash, USB. Ethernet seems unstable at +the moment, though the basic functionality works. + +Signed-off-by: Andre Przywara +Reviewed-by: Jernej Skrabec +Link: https://lore.kernel.org/r/20230804170856.1237202-4-andre.przywara@arm.com +Signed-off-by: Jernej Skrabec +--- + arch/arm64/boot/dts/allwinner/Makefile | 1 + + .../allwinner/sun50i-h618-orangepi-zero3.dts | 94 +++++++++++++++++++ + 2 files changed, 95 insertions(+) + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts + +--- a/arch/arm64/boot/dts/allwinner/Makefile ++++ b/arch/arm64/boot/dts/allwinner/Makefile +@@ -40,3 +40,4 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-ta + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb ++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts +@@ -0,0 +1,94 @@ ++// SPDX-License-Identifier: (GPL-2.0+ or MIT) ++/* ++ * Copyright (C) 2023 Arm Ltd. ++ */ ++ ++/dts-v1/; ++ ++#include "sun50i-h616-orangepi-zero.dtsi" ++ ++/ { ++ model = "OrangePi Zero3"; ++ compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618"; ++}; ++ ++&emac0 { ++ phy-supply = <®_dldo1>; ++}; ++ ++&ext_rgmii_phy { ++ motorcomm,clk-out-frequency-hz = <125000000>; ++}; ++ ++&mmc0 { ++ /* ++ * The schematic shows the card detect pin wired up to PF6, via an ++ * inverter, but it just doesn't work. ++ */ ++ broken-cd; ++ vmmc-supply = <®_dldo1>; ++}; ++ ++&r_i2c { ++ status = "okay"; ++ ++ axp313: pmic@36 { ++ compatible = "x-powers,axp313a"; ++ reg = <0x36>; ++ #interrupt-cells = <1>; ++ interrupt-controller; ++ interrupt-parent = <&pio>; ++ interrupts = <2 9 IRQ_TYPE_LEVEL_LOW>; /* PC9 */ ++ ++ vin1-supply = <®_vcc5v>; ++ vin2-supply = <®_vcc5v>; ++ vin3-supply = <®_vcc5v>; ++ ++ regulators { ++ /* Supplies VCC-PLL, so needs to be always on. */ ++ reg_aldo1: aldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-name = "vcc1v8"; ++ }; ++ ++ /* Supplies VCC-IO, so needs to be always on. */ ++ reg_dldo1: dldo1 { ++ regulator-always-on; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-name = "vcc3v3"; ++ }; ++ ++ reg_dcdc1: dcdc1 { ++ regulator-always-on; ++ regulator-min-microvolt = <810000>; ++ regulator-max-microvolt = <990000>; ++ regulator-name = "vdd-gpu-sys"; ++ }; ++ ++ reg_dcdc2: dcdc2 { ++ regulator-always-on; ++ regulator-min-microvolt = <810000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-cpu"; ++ }; ++ ++ reg_dcdc3: dcdc3 { ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-name = "vdd-dram"; ++ }; ++ }; ++ }; ++}; ++ ++&pio { ++ vcc-pc-supply = <®_dldo1>; ++ vcc-pf-supply = <®_dldo1>; ++ vcc-pg-supply = <®_aldo1>; ++ vcc-ph-supply = <®_dldo1>; ++ vcc-pi-supply = <®_dldo1>; ++}; diff --git a/target/linux/sunxi/patches-6.1/007-v6.7-arm64-dts-allwinner-h616-update-emac-for-Orange-Pi.patch b/target/linux/sunxi/patches-6.1/007-v6.7-arm64-dts-allwinner-h616-update-emac-for-Orange-Pi.patch new file mode 100644 index 000000000..fe32cfc3e --- /dev/null +++ b/target/linux/sunxi/patches-6.1/007-v6.7-arm64-dts-allwinner-h616-update-emac-for-Orange-Pi.patch @@ -0,0 +1,36 @@ +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero.dtsi +@@ -68,10 +68,7 @@ + &emac0 { + pinctrl-names = "default"; + pinctrl-0 = <&ext_rgmii_pins>; +- phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; +- allwinner,rx-delay-ps = <3100>; +- allwinner,tx-delay-ps = <700>; + status = "okay"; + }; + +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts +@@ -13,6 +13,9 @@ + }; + + &emac0 { ++ allwinner,rx-delay-ps = <3100>; ++ allwinner,tx-delay-ps = <700>; ++ phy-mode = "rgmii"; + phy-supply = <®_dcdce>; + }; + +--- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts +@@ -13,6 +13,8 @@ + }; + + &emac0 { ++ allwinner,tx-delay-ps = <700>; ++ phy-mode = "rgmii-rxid"; + phy-supply = <®_dldo1>; + }; + diff --git a/target/linux/sunxi/patches-6.1/008-v6.7-arm64-dts-allwinner-h616-Add-SID-controller-node.patch b/target/linux/sunxi/patches-6.1/008-v6.7-arm64-dts-allwinner-h616-Add-SID-controller-node.patch new file mode 100644 index 000000000..ce8add18a --- /dev/null +++ b/target/linux/sunxi/patches-6.1/008-v6.7-arm64-dts-allwinner-h616-Add-SID-controller-node.patch @@ -0,0 +1,31 @@ +From 951992797378a2177946400438f4d23c9fceae5b Mon Sep 17 00:00:00 2001 +From: Martin Botka +Date: Tue, 12 Sep 2023 14:25:13 +0200 +Subject: [PATCH] arm64: dts: allwinner: h616: Add SID controller node + +Add node for the H616 SID controller + +Signed-off-by: Martin Botka +Acked-by: Jernej Skrabec +Link: https://lore.kernel.org/r/20230912-sid-h616-v3-2-ee18e1c5bbb5@somainline.org +Signed-off-by: Jernej Skrabec +--- + arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +@@ -133,6 +133,13 @@ + #reset-cells = <1>; + }; + ++ sid: efuse@3006000 { ++ compatible = "allwinner,sun50i-h616-sid", "allwinner,sun50i-a64-sid"; ++ reg = <0x03006000 0x1000>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ }; ++ + watchdog: watchdog@30090a0 { + compatible = "allwinner,sun50i-h616-wdt", + "allwinner,sun6i-a31-wdt"; diff --git a/target/linux/sunxi/patches-6.1/009-v6.9-soc-sunxi-sram-export-register-0-for-THS-on-H616.patch b/target/linux/sunxi/patches-6.1/009-v6.9-soc-sunxi-sram-export-register-0-for-THS-on-H616.patch new file mode 100644 index 000000000..3453e2aa5 --- /dev/null +++ b/target/linux/sunxi/patches-6.1/009-v6.9-soc-sunxi-sram-export-register-0-for-THS-on-H616.patch @@ -0,0 +1,98 @@ +From 898d96c5464b69af44f6407c5de81ebc349d574b Mon Sep 17 00:00:00 2001 +From: Andre Przywara +Date: Mon, 19 Feb 2024 15:36:33 +0000 +Subject: [PATCH] soc: sunxi: sram: export register 0 for THS on H616 + +The Allwinner H616 SoC contains a mysterious bit at register offset 0x0 +in the SRAM control block. If bit 16 is set (the reset value), the +temperature readings of the THS are way off, leading to reports about +200C, at normal ambient temperatures. Clearing this bits brings the +reported values down to the expected values. +The BSP code clears this bit in firmware (U-Boot), and has an explicit +comment about this, but offers no real explanation. + +Experiments in U-Boot show that register 0x0 has no effect on the SRAM C +visibility: all tested bit settings still allow full read and write +access by the CPU to the whole of SRAM C. Only bit 24 of the register at +offset 0x4 makes all of SRAM C inaccessible by the CPU. So modelling +the THS switch functionality as an SRAM region would not reflect reality. + +Since we should not rely on firmware settings, allow other code (the THS +driver) to access this register, by exporting it through the already +existing regmap. This mimics what we already do for the LDO control and +the EMAC register. + +To avoid concurrent accesses to the same register at the same time, by +the SRAM switch code and the regmap code, use the same lock to protect +the access. The regmap subsystem allows to use an existing lock, so we +just need to hook in there. + +Signed-off-by: Andre Przywara +Reviewed-by: Jernej Skrabec +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20240219153639.179814-2-andre.przywara@arm.com +--- + drivers/soc/sunxi/sunxi_sram.c | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) + +--- a/drivers/soc/sunxi/sunxi_sram.c ++++ b/drivers/soc/sunxi/sunxi_sram.c +@@ -284,6 +284,7 @@ EXPORT_SYMBOL(sunxi_sram_release); + struct sunxi_sramc_variant { + int num_emac_clocks; + bool has_ldo_ctrl; ++ bool has_ths_offset; + }; + + static const struct sunxi_sramc_variant sun4i_a10_sramc_variant = { +@@ -305,8 +306,10 @@ static const struct sunxi_sramc_variant + + static const struct sunxi_sramc_variant sun50i_h616_sramc_variant = { + .num_emac_clocks = 2, ++ .has_ths_offset = true, + }; + ++#define SUNXI_SRAM_THS_OFFSET_REG 0x0 + #define SUNXI_SRAM_EMAC_CLOCK_REG 0x30 + #define SUNXI_SYS_LDO_CTRL_REG 0x150 + +@@ -315,6 +318,8 @@ static bool sunxi_sram_regmap_accessible + { + const struct sunxi_sramc_variant *variant = dev_get_drvdata(dev); + ++ if (reg == SUNXI_SRAM_THS_OFFSET_REG && variant->has_ths_offset) ++ return true; + if (reg >= SUNXI_SRAM_EMAC_CLOCK_REG && + reg < SUNXI_SRAM_EMAC_CLOCK_REG + variant->num_emac_clocks * 4) + return true; +@@ -324,6 +329,20 @@ static bool sunxi_sram_regmap_accessible + return false; + } + ++static void sunxi_sram_lock(void *_lock) ++{ ++ spinlock_t *lock = _lock; ++ ++ spin_lock(lock); ++} ++ ++static void sunxi_sram_unlock(void *_lock) ++{ ++ spinlock_t *lock = _lock; ++ ++ spin_unlock(lock); ++} ++ + static struct regmap_config sunxi_sram_regmap_config = { + .reg_bits = 32, + .val_bits = 32, +@@ -333,6 +352,9 @@ static struct regmap_config sunxi_sram_r + /* other devices have no business accessing other registers */ + .readable_reg = sunxi_sram_regmap_accessible_reg, + .writeable_reg = sunxi_sram_regmap_accessible_reg, ++ .lock = sunxi_sram_lock, ++ .unlock = sunxi_sram_unlock, ++ .lock_arg = &sram_lock, + }; + + static int __init sunxi_sram_probe(struct platform_device *pdev) diff --git a/target/linux/sunxi/patches-6.1/010-v6.8-thermal-drivers-sun8i-Add-D1-T113s-THS-controller-support.patch b/target/linux/sunxi/patches-6.1/010-v6.8-thermal-drivers-sun8i-Add-D1-T113s-THS-controller-support.patch new file mode 100644 index 000000000..8b1998911 --- /dev/null +++ b/target/linux/sunxi/patches-6.1/010-v6.8-thermal-drivers-sun8i-Add-D1-T113s-THS-controller-support.patch @@ -0,0 +1,47 @@ +From ebbf19e36d021f253425344b4d4b987f3b7d9be5 Mon Sep 17 00:00:00 2001 +From: Maxim Kiselev +Date: Mon, 18 Dec 2023 00:06:23 +0300 +Subject: [PATCH] thermal/drivers/sun8i: Add D1/T113s THS controller support + +This patch adds a thermal sensor controller support for the D1/T113s, +which is similar to the one on H6, but with only one sensor and +different scale and offset values. + +Signed-off-by: Maxim Kiselev +Acked-by: Jernej Skrabec +Reviewed-by: Andre Przywara +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20231217210629.131486-3-bigunclemax@gmail.com +--- + drivers/thermal/sun8i_thermal.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/drivers/thermal/sun8i_thermal.c ++++ b/drivers/thermal/sun8i_thermal.c +@@ -610,6 +610,18 @@ static const struct ths_thermal_chip sun + .calc_temp = sun8i_ths_calc_temp, + }; + ++static const struct ths_thermal_chip sun20i_d1_ths = { ++ .sensor_num = 1, ++ .has_bus_clk_reset = true, ++ .offset = 188552, ++ .scale = 673, ++ .temp_data_base = SUN50I_H6_THS_TEMP_DATA, ++ .calibrate = sun50i_h6_ths_calibrate, ++ .init = sun50i_h6_thermal_init, ++ .irq_ack = sun50i_h6_irq_ack, ++ .calc_temp = sun8i_ths_calc_temp, ++}; ++ + static const struct of_device_id of_ths_match[] = { + { .compatible = "allwinner,sun8i-a83t-ths", .data = &sun8i_a83t_ths }, + { .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths }, +@@ -618,6 +630,7 @@ static const struct of_device_id of_ths_ + { .compatible = "allwinner,sun50i-a100-ths", .data = &sun50i_a100_ths }, + { .compatible = "allwinner,sun50i-h5-ths", .data = &sun50i_h5_ths }, + { .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths }, ++ { .compatible = "allwinner,sun20i-d1-ths", .data = &sun20i_d1_ths }, + { /* sentinel */ }, + }; + MODULE_DEVICE_TABLE(of, of_ths_match); diff --git a/target/linux/sunxi/patches-6.1/011-v6.9-thermal-drivers-sun8i-Explain-unknown-H6-register-value.patch b/target/linux/sunxi/patches-6.1/011-v6.9-thermal-drivers-sun8i-Explain-unknown-H6-register-value.patch new file mode 100644 index 000000000..b8138a387 --- /dev/null +++ b/target/linux/sunxi/patches-6.1/011-v6.9-thermal-drivers-sun8i-Explain-unknown-H6-register-value.patch @@ -0,0 +1,79 @@ +From 14f118aa50fe7c7c7330f56d007ecacca487cea8 Mon Sep 17 00:00:00 2001 +From: Andre Przywara +Date: Mon, 19 Feb 2024 15:36:35 +0000 +Subject: [PATCH] thermal/drivers/sun8i: Explain unknown H6 register value + +So far we were ORing in some "unknown" value into the THS control +register on the Allwinner H6. This part of the register is not explained +in the H6 manual, but the H616 manual details those bits, and on closer +inspection the THS IP blocks in both SoCs seem very close: +- The BSP code for both SoCs writes the same values into THS_CTRL. +- The reset values of at least the first three registers are the same. + +Replace the "unknown" value with its proper meaning: "acquire time", +most probably the sample part of the sample & hold circuit of the ADC, +according to its explanation in the H616 manual. + +No functional change, just a macro rename and adjustment. + +Signed-off-by: Andre Przywara +Reviewed-by: Jernej Skrabec +Acked-by: Vasily Khoruzhick +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20240219153639.179814-4-andre.przywara@arm.com +--- + drivers/thermal/sun8i_thermal.c | 29 ++++++++++++++++------------- + 1 file changed, 16 insertions(+), 13 deletions(-) + +--- a/drivers/thermal/sun8i_thermal.c ++++ b/drivers/thermal/sun8i_thermal.c +@@ -50,7 +50,8 @@ + #define SUN8I_THS_CTRL2_T_ACQ1(x) ((GENMASK(15, 0) & (x)) << 16) + #define SUN8I_THS_DATA_IRQ_STS(x) BIT(x + 8) + +-#define SUN50I_THS_CTRL0_T_ACQ(x) ((GENMASK(15, 0) & (x)) << 16) ++#define SUN50I_THS_CTRL0_T_ACQ(x) (GENMASK(15, 0) & ((x) - 1)) ++#define SUN50I_THS_CTRL0_T_SAMPLE_PER(x) ((GENMASK(15, 0) & ((x) - 1)) << 16) + #define SUN50I_THS_FILTER_EN BIT(2) + #define SUN50I_THS_FILTER_TYPE(x) (GENMASK(1, 0) & (x)) + #define SUN50I_H6_THS_PC_TEMP_PERIOD(x) ((GENMASK(19, 0) & (x)) << 12) +@@ -410,25 +411,27 @@ static int sun8i_h3_thermal_init(struct + return 0; + } + +-/* +- * Without this undocumented value, the returned temperatures would +- * be higher than real ones by about 20C. +- */ +-#define SUN50I_H6_CTRL0_UNK 0x0000002f +- + static int sun50i_h6_thermal_init(struct ths_device *tmdev) + { + int val; + + /* +- * T_acq = 20us +- * clkin = 24MHz +- * +- * x = T_acq * clkin - 1 +- * = 479 ++ * The manual recommends an overall sample frequency of 50 KHz (20us, ++ * 480 cycles at 24 MHz), which provides plenty of time for both the ++ * acquisition time (>24 cycles) and the actual conversion time ++ * (>14 cycles). ++ * The lower half of the CTRL register holds the "acquire time", in ++ * clock cycles, which the manual recommends to be 2us: ++ * 24MHz * 2us = 48 cycles. ++ * The high half of THS_CTRL encodes the sample frequency, in clock ++ * cycles: 24MHz * 20us = 480 cycles. ++ * This is explained in the H616 manual, but apparently wrongly ++ * described in the H6 manual, although the BSP code does the same ++ * for both SoCs. + */ + regmap_write(tmdev->regmap, SUN50I_THS_CTRL0, +- SUN50I_H6_CTRL0_UNK | SUN50I_THS_CTRL0_T_ACQ(479)); ++ SUN50I_THS_CTRL0_T_ACQ(48) | ++ SUN50I_THS_CTRL0_T_SAMPLE_PER(480)); + /* average over 4 samples */ + regmap_write(tmdev->regmap, SUN50I_H6_THS_MFC, + SUN50I_THS_FILTER_EN | diff --git a/target/linux/sunxi/patches-6.1/012-v6.9-thermal-drivers-sun8i-Extend-H6-calibration-to-support-4.patch b/target/linux/sunxi/patches-6.1/012-v6.9-thermal-drivers-sun8i-Extend-H6-calibration-to-support-4.patch new file mode 100644 index 000000000..3d01a507f --- /dev/null +++ b/target/linux/sunxi/patches-6.1/012-v6.9-thermal-drivers-sun8i-Extend-H6-calibration-to-support-4.patch @@ -0,0 +1,74 @@ +From 6c04a419a4c5fb18edefc44dd676fb95c7f6c55d Mon Sep 17 00:00:00 2001 +From: Maksim Kiselev +Date: Mon, 19 Feb 2024 15:36:36 +0000 +Subject: [PATCH] thermal/drivers/sun8i: Extend H6 calibration to support 4 + sensors + +The H616 SoC resembles the H6 thermal sensor controller, with a few +changes like four sensors. + +Extend sun50i_h6_ths_calibrate() function to support calibration of +these sensors. + +Co-developed-by: Martin Botka +Signed-off-by: Martin Botka +Signed-off-by: Maksim Kiselev +Reviewed-by: Andre Przywara +Signed-off-by: Andre Przywara +Reviewed-by: Jernej Skrabec +Acked-by: Vasily Khoruzhick +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20240219153639.179814-5-andre.przywara@arm.com +--- + drivers/thermal/sun8i_thermal.c | 28 ++++++++++++++++++++-------- + 1 file changed, 20 insertions(+), 8 deletions(-) + +--- a/drivers/thermal/sun8i_thermal.c ++++ b/drivers/thermal/sun8i_thermal.c +@@ -224,16 +224,21 @@ static int sun50i_h6_ths_calibrate(struc + struct device *dev = tmdev->dev; + int i, ft_temp; + +- if (!caldata[0] || callen < 2 + 2 * tmdev->chip->sensor_num) ++ if (!caldata[0]) + return -EINVAL; + + /* + * efuse layout: + * +- * 0 11 16 32 +- * +-------+-------+-------+ +- * |temp| |sensor0|sensor1| +- * +-------+-------+-------+ ++ * 0 11 16 27 32 43 48 57 ++ * +----------+-----------+-----------+-----------+ ++ * | temp | |sensor0| |sensor1| |sensor2| | ++ * +----------+-----------+-----------+-----------+ ++ * ^ ^ ^ ++ * | | | ++ * | | sensor3[11:8] ++ * | sensor3[7:4] ++ * sensor3[3:0] + * + * The calibration data on the H6 is the ambient temperature and + * sensor values that are filled during the factory test stage. +@@ -246,9 +251,16 @@ static int sun50i_h6_ths_calibrate(struc + ft_temp = (caldata[0] & FT_TEMP_MASK) * 100; + + for (i = 0; i < tmdev->chip->sensor_num; i++) { +- int sensor_reg = caldata[i + 1] & TEMP_CALIB_MASK; +- int cdata, offset; +- int sensor_temp = tmdev->chip->calc_temp(tmdev, i, sensor_reg); ++ int sensor_reg, sensor_temp, cdata, offset; ++ ++ if (i == 3) ++ sensor_reg = (caldata[1] >> 12) ++ | ((caldata[2] >> 12) << 4) ++ | ((caldata[3] >> 12) << 8); ++ else ++ sensor_reg = caldata[i + 1] & TEMP_CALIB_MASK; ++ ++ sensor_temp = tmdev->chip->calc_temp(tmdev, i, sensor_reg); + + /* + * Calibration data is CALIBRATE_DEFAULT - (calculated diff --git a/target/linux/sunxi/patches-6.1/013-v6.9-thermal-drivers-sun8i-Add-SRAM-register-access-code.patch b/target/linux/sunxi/patches-6.1/013-v6.9-thermal-drivers-sun8i-Add-SRAM-register-access-code.patch new file mode 100644 index 000000000..6db1e32cf --- /dev/null +++ b/target/linux/sunxi/patches-6.1/013-v6.9-thermal-drivers-sun8i-Add-SRAM-register-access-code.patch @@ -0,0 +1,126 @@ +From f8b54d1120b81ed57bed96cc8e814ba08886d1e5 Mon Sep 17 00:00:00 2001 +From: Andre Przywara +Date: Mon, 19 Feb 2024 15:36:37 +0000 +Subject: [PATCH] thermal/drivers/sun8i: Add SRAM register access code + +The Allwinner H616 SoC needs to clear a bit in one register in the SRAM +controller, to report reasonable temperature values. On reset, bit 16 in +register 0x3000000 is set, which leads to the driver reporting +temperatures around 200C. Clearing this bit brings the values down to the +expected range. The BSP code does a one-time write in U-Boot, with a +comment just mentioning the effect on the THS, but offering no further +explanation. + +To not rely on firmware to set things up for us, add code that queries +the SRAM controller device via a DT phandle link, then clear just this +single bit. + +Signed-off-by: Andre Przywara +Acked-by: Vasily Khoruzhick +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20240219153639.179814-6-andre.przywara@arm.com +--- + drivers/thermal/sun8i_thermal.c | 51 +++++++++++++++++++++++++++++++++ + 1 file changed, 51 insertions(+) + +--- a/drivers/thermal/sun8i_thermal.c ++++ b/drivers/thermal/sun8i_thermal.c +@@ -15,6 +15,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -68,6 +69,7 @@ struct tsensor { + struct ths_thermal_chip { + bool has_mod_clk; + bool has_bus_clk_reset; ++ bool needs_sram; + int sensor_num; + int offset; + int scale; +@@ -85,12 +87,16 @@ struct ths_device { + const struct ths_thermal_chip *chip; + struct device *dev; + struct regmap *regmap; ++ struct regmap_field *sram_regmap_field; + struct reset_control *reset; + struct clk *bus_clk; + struct clk *mod_clk; + struct tsensor sensor[MAX_SENSOR_NUM]; + }; + ++/* The H616 needs to have a bit 16 in the SRAM control register cleared. */ ++static const struct reg_field sun8i_ths_sram_reg_field = REG_FIELD(0x0, 16, 16); ++ + /* Temp Unit: millidegree Celsius */ + static int sun8i_ths_calc_temp(struct ths_device *tmdev, + int id, int reg) +@@ -337,6 +343,34 @@ static void sun8i_ths_reset_control_asse + reset_control_assert(data); + } + ++static struct regmap *sun8i_ths_get_sram_regmap(struct device_node *node) ++{ ++ struct device_node *sram_node; ++ struct platform_device *sram_pdev; ++ struct regmap *regmap = NULL; ++ ++ sram_node = of_parse_phandle(node, "allwinner,sram", 0); ++ if (!sram_node) ++ return ERR_PTR(-ENODEV); ++ ++ sram_pdev = of_find_device_by_node(sram_node); ++ if (!sram_pdev) { ++ /* platform device might not be probed yet */ ++ regmap = ERR_PTR(-EPROBE_DEFER); ++ goto out_put_node; ++ } ++ ++ /* If no regmap is found then the other device driver is at fault */ ++ regmap = dev_get_regmap(&sram_pdev->dev, NULL); ++ if (!regmap) ++ regmap = ERR_PTR(-EINVAL); ++ ++ platform_device_put(sram_pdev); ++out_put_node: ++ of_node_put(sram_node); ++ return regmap; ++} ++ + static int sun8i_ths_resource_init(struct ths_device *tmdev) + { + struct device *dev = tmdev->dev; +@@ -381,6 +415,19 @@ static int sun8i_ths_resource_init(struc + if (ret) + return ret; + ++ if (tmdev->chip->needs_sram) { ++ struct regmap *regmap; ++ ++ regmap = sun8i_ths_get_sram_regmap(dev->of_node); ++ if (IS_ERR(regmap)) ++ return PTR_ERR(regmap); ++ tmdev->sram_regmap_field = devm_regmap_field_alloc(dev, ++ regmap, ++ sun8i_ths_sram_reg_field); ++ if (IS_ERR(tmdev->sram_regmap_field)) ++ return PTR_ERR(tmdev->sram_regmap_field); ++ } ++ + ret = sun8i_ths_calibrate(tmdev); + if (ret) + return ret; +@@ -427,6 +474,10 @@ static int sun50i_h6_thermal_init(struct + { + int val; + ++ /* The H616 needs to have a bit in the SRAM control register cleared. */ ++ if (tmdev->sram_regmap_field) ++ regmap_field_write(tmdev->sram_regmap_field, 0); ++ + /* + * The manual recommends an overall sample frequency of 50 KHz (20us, + * 480 cycles at 24 MHz), which provides plenty of time for both the diff --git a/target/linux/sunxi/patches-6.1/014-v6.9-thermal-drivers-sun8i-Add-support-for-H616-THS-controller.patch b/target/linux/sunxi/patches-6.1/014-v6.9-thermal-drivers-sun8i-Add-support-for-H616-THS-controller.patch new file mode 100644 index 000000000..e743d344c --- /dev/null +++ b/target/linux/sunxi/patches-6.1/014-v6.9-thermal-drivers-sun8i-Add-support-for-H616-THS-controller.patch @@ -0,0 +1,50 @@ +From e7dbfa19572a1440a2e67ef70f94ff204849a0a8 Mon Sep 17 00:00:00 2001 +From: Martin Botka +Date: Mon, 19 Feb 2024 15:36:38 +0000 +Subject: [PATCH] thermal/drivers/sun8i: Add support for H616 THS controller + +Add support for the thermal sensor found in H616 SoCs, is the same as +the H6 thermal sensor controller, but with four sensors. +Also the registers readings are wrong, unless a bit in the first SYS_CFG +register cleared, so set exercise the SRAM regmap to take care of that. + +Signed-off-by: Martin Botka +Signed-off-by: Andre Przywara +Acked-by: Vasily Khoruzhick +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20240219153639.179814-7-andre.przywara@arm.com +--- + drivers/thermal/sun8i_thermal.c | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +--- a/drivers/thermal/sun8i_thermal.c ++++ b/drivers/thermal/sun8i_thermal.c +@@ -688,6 +688,20 @@ static const struct ths_thermal_chip sun + .calc_temp = sun8i_ths_calc_temp, + }; + ++static const struct ths_thermal_chip sun50i_h616_ths = { ++ .sensor_num = 4, ++ .has_bus_clk_reset = true, ++ .needs_sram = true, ++ .ft_deviation = 8000, ++ .offset = 263655, ++ .scale = 810, ++ .temp_data_base = SUN50I_H6_THS_TEMP_DATA, ++ .calibrate = sun50i_h6_ths_calibrate, ++ .init = sun50i_h6_thermal_init, ++ .irq_ack = sun50i_h6_irq_ack, ++ .calc_temp = sun8i_ths_calc_temp, ++}; ++ + static const struct of_device_id of_ths_match[] = { + { .compatible = "allwinner,sun8i-a83t-ths", .data = &sun8i_a83t_ths }, + { .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths }, +@@ -697,6 +711,7 @@ static const struct of_device_id of_ths_ + { .compatible = "allwinner,sun50i-h5-ths", .data = &sun50i_h5_ths }, + { .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths }, + { .compatible = "allwinner,sun20i-d1-ths", .data = &sun20i_d1_ths }, ++ { .compatible = "allwinner,sun50i-h616-ths", .data = &sun50i_h616_ths }, + { /* sentinel */ }, + }; + MODULE_DEVICE_TABLE(of, of_ths_match); diff --git a/target/linux/sunxi/patches-6.1/015-v6.9-thermal-drivers-sun8i-Dont-fail-probe-due-to-zone-registra.patch b/target/linux/sunxi/patches-6.1/015-v6.9-thermal-drivers-sun8i-Dont-fail-probe-due-to-zone-registra.patch new file mode 100644 index 000000000..384bf5508 --- /dev/null +++ b/target/linux/sunxi/patches-6.1/015-v6.9-thermal-drivers-sun8i-Dont-fail-probe-due-to-zone-registra.patch @@ -0,0 +1,68 @@ +From 9ac53d5532cc4bb595bbee86ccba2172ccc336c3 Mon Sep 17 00:00:00 2001 +From: Mark Brown +Date: Tue, 23 Jan 2024 23:33:07 +0000 +Subject: [PATCH] thermal/drivers/sun8i: Don't fail probe due to zone + registration failure + +Currently the sun8i thermal driver will fail to probe if any of the +thermal zones it is registering fails to register with the thermal core. +Since we currently do not define any trip points for the GPU thermal +zones on at least A64 or H5 this means that we have no thermal support +on these platforms: + +[ 1.698703] thermal_sys: Failed to find 'trips' node +[ 1.698707] thermal_sys: Failed to find trip points for thermal-sensor id=1 + +even though the main CPU thermal zone on both SoCs is fully configured. +This does not seem ideal, while we may not be able to use all the zones +it seems better to have those zones which are usable be operational. +Instead just carry on registering zones if we get any non-deferral +error, allowing use of those zones which are usable. + +This means that we also need to update the interrupt handler to not +attempt to notify the core for events on zones which we have not +registered, I didn't see an ability to mask individual interrupts and +I would expect that interrupts would still be indicated in the ISR even +if they were masked. + +Reviewed-by: Vasily Khoruzhick +Acked-by: Jernej Skrabec +Signed-off-by: Mark Brown +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20240123-thermal-sun8i-registration-v3-1-3e5771b1bbdd@kernel.org +--- + drivers/thermal/sun8i_thermal.c | 16 ++++++++++++++-- + 1 file changed, 14 insertions(+), 2 deletions(-) + +--- a/drivers/thermal/sun8i_thermal.c ++++ b/drivers/thermal/sun8i_thermal.c +@@ -197,6 +197,9 @@ static irqreturn_t sun8i_irq_thread(int + int i; + + for_each_set_bit(i, &irq_bitmap, tmdev->chip->sensor_num) { ++ /* We allow some zones to not register. */ ++ if (IS_ERR(tmdev->sensor[i].tzd)) ++ continue; + thermal_zone_device_update(tmdev->sensor[i].tzd, + THERMAL_EVENT_UNSPECIFIED); + } +@@ -531,8 +534,17 @@ static int sun8i_ths_register(struct ths + i, + &tmdev->sensor[i], + &ths_ops); +- if (IS_ERR(tmdev->sensor[i].tzd)) +- return PTR_ERR(tmdev->sensor[i].tzd); ++ ++ /* ++ * If an individual zone fails to register for reasons ++ * other than probe deferral (eg, a bad DT) then carry ++ * on, other zones might register successfully. ++ */ ++ if (IS_ERR(tmdev->sensor[i].tzd)) { ++ if (PTR_ERR(tmdev->sensor[i].tzd) == -EPROBE_DEFER) ++ return PTR_ERR(tmdev->sensor[i].tzd); ++ continue; ++ } + + if (devm_thermal_add_hwmon_sysfs(tmdev->sensor[i].tzd)) + dev_warn(tmdev->dev, diff --git a/target/linux/sunxi/patches-6.1/016-v6.9-arm64-dts-allwinner-h616-Add-thermal-sensor-and-zones.patch b/target/linux/sunxi/patches-6.1/016-v6.9-arm64-dts-allwinner-h616-Add-thermal-sensor-and-zones.patch new file mode 100644 index 000000000..cd6542bf1 --- /dev/null +++ b/target/linux/sunxi/patches-6.1/016-v6.9-arm64-dts-allwinner-h616-Add-thermal-sensor-and-zones.patch @@ -0,0 +1,138 @@ +From f4318af40544b8e7ff5a6b667ede60e6cf808262 Mon Sep 17 00:00:00 2001 +From: Martin Botka +Date: Mon, 19 Feb 2024 15:36:39 +0000 +Subject: [PATCH] arm64: dts: allwinner: h616: Add thermal sensor and zones + +There are four thermal sensors: +- CPU +- GPU +- VE +- DRAM + +Add the thermal sensor configuration and the thermal zones. + +Signed-off-by: Martin Botka +Signed-off-by: Andre Przywara +Reviewed-by: Jernej Skrabec +Link: https://lore.kernel.org/r/20240219153639.179814-8-andre.przywara@arm.com +Signed-off-by: Jernej Skrabec +--- + .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 88 +++++++++++++++++++ + 1 file changed, 88 insertions(+) + +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +@@ -9,6 +9,7 @@ + #include + #include + #include ++#include + + / { + interrupt-parent = <&gic>; +@@ -138,6 +139,10 @@ + reg = <0x03006000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; ++ ++ ths_calibration: thermal-sensor-calibration@14 { ++ reg = <0x14 0x8>; ++ }; + }; + + watchdog: watchdog@30090a0 { +@@ -511,6 +516,19 @@ + }; + }; + ++ ths: thermal-sensor@5070400 { ++ compatible = "allwinner,sun50i-h616-ths"; ++ reg = <0x05070400 0x400>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_THS>; ++ clock-names = "bus"; ++ resets = <&ccu RST_BUS_THS>; ++ nvmem-cells = <&ths_calibration>; ++ nvmem-cell-names = "calibration"; ++ allwinner,sram = <&syscon>; ++ #thermal-sensor-cells = <1>; ++ }; ++ + usbotg: usb@5100000 { + compatible = "allwinner,sun50i-h616-musb", + "allwinner,sun8i-h3-musb"; +@@ -755,4 +773,74 @@ + #size-cells = <0>; + }; + }; ++ ++ thermal-zones { ++ cpu-thermal { ++ polling-delay-passive = <500>; ++ polling-delay = <1000>; ++ thermal-sensors = <&ths 2>; ++ sustainable-power = <1000>; ++ ++ trips { ++ cpu_threshold: cpu-trip-0 { ++ temperature = <60000>; ++ type = "passive"; ++ hysteresis = <0>; ++ }; ++ cpu_target: cpu-trip-1 { ++ temperature = <70000>; ++ type = "passive"; ++ hysteresis = <0>; ++ }; ++ cpu_critical: cpu-trip-2 { ++ temperature = <110000>; ++ type = "critical"; ++ hysteresis = <0>; ++ }; ++ }; ++ }; ++ ++ gpu-thermal { ++ polling-delay-passive = <500>; ++ polling-delay = <1000>; ++ thermal-sensors = <&ths 0>; ++ sustainable-power = <1100>; ++ ++ trips { ++ gpu_temp_critical: gpu-trip-0 { ++ temperature = <110000>; ++ type = "critical"; ++ hysteresis = <0>; ++ }; ++ }; ++ }; ++ ++ ve-thermal { ++ polling-delay-passive = <0>; ++ polling-delay = <0>; ++ thermal-sensors = <&ths 1>; ++ ++ trips { ++ ve_temp_critical: ve-trip-0 { ++ temperature = <110000>; ++ type = "critical"; ++ hysteresis = <0>; ++ }; ++ }; ++ }; ++ ++ ddr-thermal { ++ polling-delay-passive = <0>; ++ polling-delay = <0>; ++ thermal-sensors = <&ths 3>; ++ ++ trips { ++ ddr_temp_critical: ddr-trip-0 { ++ temperature = <110000>; ++ type = "critical"; ++ hysteresis = <0>; ++ }; ++ }; ++ }; ++ }; + }; diff --git a/target/linux/sunxi/patches-6.1/101-sunxi-add-get_soc_chipid-and-sunxi_get_serial.patch b/target/linux/sunxi/patches-6.1/101-sunxi-add-get_soc_chipid-and-sunxi_get_serial.patch new file mode 100644 index 000000000..a3abf98e2 --- /dev/null +++ b/target/linux/sunxi/patches-6.1/101-sunxi-add-get_soc_chipid-and-sunxi_get_serial.patch @@ -0,0 +1,53 @@ +From caaa7def76801cbe9937602603f6b471f776e6f6 Mon Sep 17 00:00:00 2001 +From: The-going <48602507+The-going@users.noreply.github.com> +Date: Sat, 16 Apr 2022 11:19:05 +0300 +Subject: [PATCH] nvmem: sunxi_sid: add sunxi_get_soc_chipid, sunxi_get_serial + +--- + drivers/nvmem/sunxi_sid.c | 28 ++++++++++++++++++++++++++++ + 1 file changed, 28 insertions(+) + +--- a/drivers/nvmem/sunxi_sid.c ++++ b/drivers/nvmem/sunxi_sid.c +@@ -37,6 +37,25 @@ struct sunxi_sid { + u32 value_offset; + }; + ++static unsigned int sunxi_soc_chipid[4]; ++static unsigned int sunxi_serial[4]; ++ ++int sunxi_get_soc_chipid(unsigned char *chipid) ++{ ++ memcpy(chipid, sunxi_soc_chipid, 16); ++ ++ return 0; ++} ++EXPORT_SYMBOL(sunxi_get_soc_chipid); ++ ++int sunxi_get_serial(unsigned char *serial) ++{ ++ memcpy(serial, sunxi_serial, 16); ++ ++ return 0; ++} ++EXPORT_SYMBOL(sunxi_get_serial); ++ + static int sunxi_sid_read(void *context, unsigned int offset, + void *val, size_t bytes) + { +@@ -180,6 +199,15 @@ static int sunxi_sid_probe(struct platfo + + platform_set_drvdata(pdev, nvmem); + ++ nvmem_cfg->reg_read(sid, 0, &sunxi_soc_chipid[0], sizeof(int)); ++ nvmem_cfg->reg_read(sid, 4, &sunxi_soc_chipid[1], sizeof(int)); ++ nvmem_cfg->reg_read(sid, 8, &sunxi_soc_chipid[2], sizeof(int)); ++ nvmem_cfg->reg_read(sid, 12, &sunxi_soc_chipid[3], sizeof(int)); ++ ++ sunxi_serial[0] = sunxi_soc_chipid[3]; ++ sunxi_serial[1] = sunxi_soc_chipid[2]; ++ sunxi_serial[2] = (sunxi_soc_chipid[1] >> 16) & 0x0ffff; ++ + return 0; + } + diff --git a/target/linux/sunxi/patches-6.1/460-ARM-dts-suniv-add-USB-related-device-nodes.patch b/target/linux/sunxi/patches-6.1/460-ARM-dts-suniv-add-USB-related-device-nodes.patch new file mode 100644 index 000000000..86bc2e25f --- /dev/null +++ b/target/linux/sunxi/patches-6.1/460-ARM-dts-suniv-add-USB-related-device-nodes.patch @@ -0,0 +1,35 @@ +--- a/arch/arm/boot/dts/suniv-f1c100s.dtsi ++++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi +@@ -133,6 +133,32 @@ + #size-cells = <0>; + }; + ++ usb_otg: usb@1c13000 { ++ compatible = "allwinner,suniv-f1c100s-musb"; ++ reg = <0x01c13000 0x0400>; ++ clocks = <&ccu CLK_BUS_OTG>; ++ resets = <&ccu RST_BUS_OTG>; ++ interrupts = <26>; ++ interrupt-names = "mc"; ++ phys = <&usbphy 0>; ++ phy-names = "usb"; ++ extcon = <&usbphy 0>; ++ allwinner,sram = <&otg_sram 1>; ++ status = "disabled"; ++ }; ++ ++ usbphy: phy@1c13400 { ++ compatible = "allwinner,suniv-f1c100s-usb-phy"; ++ reg = <0x01c13400 0x10>; ++ reg-names = "phy_ctrl"; ++ clocks = <&ccu CLK_USB_PHY0>; ++ clock-names = "usb0_phy"; ++ resets = <&ccu RST_USB_PHY0>; ++ reset-names = "usb0_reset"; ++ #phy-cells = <1>; ++ status = "disabled"; ++ }; ++ + ccu: clock@1c20000 { + compatible = "allwinner,suniv-f1c100s-ccu"; + reg = <0x01c20000 0x400>; diff --git a/target/linux/sunxi/patches-6.1/461-ARM-dts-suniv-add-device-tree-for-PopStick-v1_1.patch b/target/linux/sunxi/patches-6.1/461-ARM-dts-suniv-add-device-tree-for-PopStick-v1_1.patch new file mode 100644 index 000000000..1030494ce --- /dev/null +++ b/target/linux/sunxi/patches-6.1/461-ARM-dts-suniv-add-device-tree-for-PopStick-v1_1.patch @@ -0,0 +1,123 @@ +From 7452d4799c5b352d6987cff3db8b1e415466586e Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Sun, 19 Mar 2023 21:29:35 +0000 +Subject: ARM: dts: suniv: add device tree for PopStick v1.1 + +PopStick is a minimal Allwinner F1C200s dongle, with its USB controller +wired to a USB Type-A plug, a SD slot and a SPI NAND flash on board, and +an on-board CH340 USB-UART converted connected to F1C200s's UART0. + +Add a device tree for it. As F1C200s is just F1C100s with a different +DRAM chip co-packaged, directly use F1C100s DTSI here. + +This commit covers the v1.1 version of this board, which is now shipped. +v1.0 is some internal sample that have not been shipped at all. + +Signed-off-by: Icenowy Zheng +Signed-off-by: Andre Przywara +Acked-by: Jernej Skrabec +Link: https://lore.kernel.org/r/20230319212936.26649-6-andre.przywara@arm.com +Signed-off-by: Jernej Skrabec +--- + arch/arm/boot/dts/suniv-f1c200s-popstick-v1.1.dts | 81 +++++++++++++++++++++++ + 1 file changed, 81 insertions(+) + create mode 100644 arch/arm/boot/dts/suniv-f1c200s-popstick-v1.1.dts + +(limited to 'arch/arm/boot/dts/suniv-f1c200s-popstick-v1.1.dts') + +--- /dev/null ++++ b/arch/arm/boot/dts/suniv-f1c200s-popstick-v1.1.dts +@@ -0,0 +1,81 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright 2022 Icenowy Zheng ++ */ ++ ++/dts-v1/; ++#include "suniv-f1c100s.dtsi" ++ ++#include ++#include ++ ++/ { ++ model = "Popcorn Computer PopStick v1.1"; ++ compatible = "sourceparts,popstick-v1.1", "sourceparts,popstick", ++ "allwinner,suniv-f1c200s", "allwinner,suniv-f1c100s"; ++ ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led { ++ function = LED_FUNCTION_STATUS; ++ color = ; ++ gpios = <&pio 4 6 GPIO_ACTIVE_HIGH>; /* PE6 */ ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++ ++ reg_vcc3v3: regulator-3v3 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ }; ++}; ++ ++&mmc0 { ++ cd-gpios = <&pio 4 3 GPIO_ACTIVE_LOW>; /* PE3 */ ++ bus-width = <4>; ++ disable-wp; ++ vmmc-supply = <®_vcc3v3>; ++ status = "okay"; ++}; ++ ++&otg_sram { ++ status = "okay"; ++}; ++ ++&spi0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi0_pc_pins>; ++ status = "okay"; ++ ++ flash@0 { ++ compatible = "spi-nand"; ++ reg = <0>; ++ spi-max-frequency = <40000000>; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pe_pins>; ++ status = "okay"; ++}; ++ ++&usb_otg { ++ dr_mode = "peripheral"; ++ status = "okay"; ++}; ++ ++&usbphy { ++ status = "okay"; ++}; +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -1396,7 +1396,8 @@ dtb-$(CONFIG_MACH_SUN9I) += \ + sun9i-a80-optimus.dtb \ + sun9i-a80-cubieboard4.dtb + dtb-$(CONFIG_MACH_SUNIV) += \ +- suniv-f1c100s-licheepi-nano.dtb ++ suniv-f1c100s-licheepi-nano.dtb \ ++ suniv-f1c200s-popstick-v1.1.dtb + dtb-$(CONFIG_ARCH_TEGRA_2x_SOC) += \ + tegra20-acer-a500-picasso.dtb \ + tegra20-asus-tf101.dtb \ diff --git a/target/linux/sunxi/patches-6.1/462-ARM-dts-suniv-licheepi-nano-enable-USB.patch b/target/linux/sunxi/patches-6.1/462-ARM-dts-suniv-licheepi-nano-enable-USB.patch new file mode 100644 index 000000000..f925d6de3 --- /dev/null +++ b/target/linux/sunxi/patches-6.1/462-ARM-dts-suniv-licheepi-nano-enable-USB.patch @@ -0,0 +1,55 @@ +From bedc7c5490fce4e57b55e025b4adfbd31f25623d Mon Sep 17 00:00:00 2001 +From: Icenowy Zheng +Date: Sun, 19 Mar 2023 21:29:32 +0000 +Subject: ARM: dts: suniv: licheepi-nano: enable USB + +Lichee Pi Nano has a Micro-USB connector, with its D+, D- pins connected +to the USB pins of the SoC and ID pin connected to PE2 GPIO. + +Enable the USB functionality. + +Signed-off-by: Icenowy Zheng +Acked-by: Jernej Skrabec +Signed-off-by: Andre Przywara +Link: https://lore.kernel.org/r/20230319212936.26649-3-andre.przywara@arm.com +Signed-off-by: Jernej Skrabec +--- + arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts | 16 ++++++++++++++++ + 1 file changed, 16 insertions(+) + +(limited to 'arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts') + +--- a/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts ++++ b/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts +@@ -6,6 +6,8 @@ + /dts-v1/; + #include "suniv-f1c100s.dtsi" + ++#include ++ + / { + model = "Lichee Pi Nano"; + compatible = "licheepi,licheepi-nano", "allwinner,suniv-f1c100s"; +@@ -50,8 +52,22 @@ + }; + }; + ++&otg_sram { ++ status = "okay"; ++}; ++ + &uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pe_pins>; + status = "okay"; + }; ++ ++&usb_otg { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&usbphy { ++ usb0_id_det-gpios = <&pio 4 2 GPIO_ACTIVE_HIGH>; /* PE2 */ ++ status = "okay"; ++}; diff --git a/target/linux/sunxi/patches-6.1/463-f1c100s-sram-driver.patch b/target/linux/sunxi/patches-6.1/463-f1c100s-sram-driver.patch new file mode 100644 index 000000000..5a6750cd0 --- /dev/null +++ b/target/linux/sunxi/patches-6.1/463-f1c100s-sram-driver.patch @@ -0,0 +1,33 @@ +Allwinner ARMv5 F1C100s has similar sram controller to sun4i A10 +Add compatible strings for it. + +Signed-off-by: Mesih Kilinc +Acked-by: Maxime Ripard +--- + drivers/soc/sunxi/sunxi_sram.c | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/drivers/soc/sunxi/sunxi_sram.c ++++ b/drivers/soc/sunxi/sunxi_sram.c +@@ -99,6 +99,10 @@ static const struct of_device_id sunxi_s + .compatible = "allwinner,sun50i-a64-sram-c", + .data = &sun50i_a64_sram_c.data, + }, ++ { ++ .compatible = "allwinner,suniv-f1c100s-sram-d", ++ .data = &sun4i_a10_sram_d.data, ++ }, + {} + }; + +@@ -429,6 +433,10 @@ static const struct of_device_id sunxi_s + .compatible = "allwinner,sun50i-h616-system-control", + .data = &sun50i_h616_sramc_variant, + }, ++ { ++ .compatible = "allwinner,suniv-f1c100s-system-control", ++ .data = &sun4i_a10_sramc_variant, ++ }, + { }, + }; + MODULE_DEVICE_TABLE(of, sunxi_sram_dt_match); diff --git a/target/linux/sunxi/patches-6.1/464-f1c100s-watchdog-compat.patch b/target/linux/sunxi/patches-6.1/464-f1c100s-watchdog-compat.patch new file mode 100644 index 000000000..0bd090636 --- /dev/null +++ b/target/linux/sunxi/patches-6.1/464-f1c100s-watchdog-compat.patch @@ -0,0 +1,18 @@ +Allwinner ARMv5 F1C100s has similar watchdog timer to sun6i A31. +Add compatible string for it. + +Signed-off-by: Mesih Kilinc +--- + drivers/watchdog/sunxi_wdt.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/watchdog/sunxi_wdt.c ++++ b/drivers/watchdog/sunxi_wdt.c +@@ -241,6 +241,7 @@ static const struct of_device_id sunxi_w + { .compatible = "allwinner,sun4i-a10-wdt", .data = &sun4i_wdt_reg }, + { .compatible = "allwinner,sun6i-a31-wdt", .data = &sun6i_wdt_reg }, + { .compatible = "allwinner,sun20i-d1-wdt", .data = &sun20i_wdt_reg }, ++ { .compatible = "allwinner,suniv-f1c100s-wdt", .data = &sun6i_wdt_reg }, + { /* sentinel */ } + }; + MODULE_DEVICE_TABLE(of, sunxi_wdt_dt_ids); diff --git a/target/linux/sunxi/patches-6.1/501-h616-Add-cpu-frequency-scaling-support.patch b/target/linux/sunxi/patches-6.1/501-h616-Add-cpu-frequency-scaling-support.patch new file mode 100644 index 000000000..71e8b7eae --- /dev/null +++ b/target/linux/sunxi/patches-6.1/501-h616-Add-cpu-frequency-scaling-support.patch @@ -0,0 +1,270 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: AGM1968 +Date: Tue, 23 May 2023 16:43:00 +0000 +Subject: arm64-dts-allwinner-h616-Add-efuse_xlate-cpu-frequency-scaling + +Signed-off-by: AGM1968 +--- + arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi | 75 ++++++++ + drivers/cpufreq/cpufreq-dt-platdev.c | 1 + + drivers/cpufreq/sun50i-cpufreq-nvmem.c | 91 +++++++--- + 3 files changed, 143 insertions(+), 24 deletions(-) + +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi +@@ -0,0 +1,75 @@ ++//SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++//Testing Version 1 from: AGM1968 ++//Noted: PLL_CPUX = 24 MHz*N/P (WIP) ++ ++/ { ++ cpu_opp_table: opp-table-cpu { ++ compatible = "allwinner,sun50i-h616-operating-points"; ++ nvmem-cells = <&cpu_speed_grade>; ++ opp-shared; ++ ++ opp-480000000 { ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ opp-hz = /bits/ 64 <480000000>; ++ opp-microvolt-speed0 = <820000 820000 1100000>; ++ opp-microvolt-speed1 = <880000 880000 1100000>; ++ opp-microvolt-speed2 = <880000 880000 1100000>; ++ }; ++ ++ opp-600000000 { ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ opp-hz = /bits/ 64 <600000000>; ++ opp-microvolt-speed0 = <820000 820000 1100000>; ++ opp-microvolt-speed1 = <880000 880000 1100000>; ++ opp-microvolt-speed2 = <880000 880000 1100000>; ++ }; ++ ++ opp-792000000 { ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ opp-hz = /bits/ 64 <792000000>; ++ opp-microvolt-speed0 = <860000 860000 1100000>; ++ opp-microvolt-speed1 = <940000 940000 1100000>; ++ opp-microvolt-speed2 = <940000 940000 1100000>; ++ }; ++ ++ opp-1008000000 { ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ opp-hz = /bits/ 64 <1008000000>; ++ opp-microvolt-speed0 = <900000 900000 1100000>; ++ opp-microvolt-speed1 = <1020000 1020000 1100000>; ++ opp-microvolt-speed2 = <1020000 1020000 1100000>; ++ }; ++ ++ opp-1200000000 { ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ opp-hz = /bits/ 64 <1200000000>; ++ opp-microvolt-speed0 = <960000 960000 1100000>; ++ opp-microvolt-speed1 = <1100000 1100000 1100000>; ++ opp-microvolt-speed2 = <1100000 1100000 1100000>; ++ }; ++ ++ opp-1512000000 { ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ opp-hz = /bits/ 64 <1512000000>; ++ opp-microvolt-speed0 = <1100000 1100000 1100000>; ++ opp-microvolt-speed1 = <1100000 1100000 1100000>; ++ opp-microvolt-speed2 = <1100000 1100000 1100000>; ++ }; ++ }; ++}; ++ ++&cpu0 { ++ operating-points-v2 = <&cpu_opp_table>; ++}; ++ ++&cpu1 { ++ operating-points-v2 = <&cpu_opp_table>; ++}; ++ ++&cpu2 { ++ operating-points-v2 = <&cpu_opp_table>; ++}; ++ ++&cpu3 { ++ operating-points-v2 = <&cpu_opp_table>; ++}; +--- a/drivers/cpufreq/cpufreq-dt-platdev.c ++++ b/drivers/cpufreq/cpufreq-dt-platdev.c +@@ -102,6 +102,8 @@ static const struct of_device_id allowli + */ + static const struct of_device_id blocklist[] __initconst = { + { .compatible = "allwinner,sun50i-h6", }, ++ { .compatible = "allwinner,sun50i-h616", }, ++ { .compatible = "allwinner,sun50i-h618", }, + + { .compatible = "arm,vexpress", }, + +--- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c ++++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c +@@ -6,6 +6,9 @@ + * provide the OPP framework with required information. + * + * Copyright (C) 2019 Yangtao Li ++ * ++ * ADD efuse_xlate to extract SoC version so that h6 and h616 can coexist. ++ * Version 1 AGM1968 + */ + + #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +@@ -19,25 +22,62 @@ + + #define MAX_NAME_LEN 7 + +-#define NVMEM_MASK 0x7 +-#define NVMEM_SHIFT 5 ++#define SUN50I_H616_NVMEM_MASK 0x22 ++#define SUN50I_H616_NVMEM_SHIFT 5 ++#define SUN50I_H6_NVMEM_MASK 0x7 ++#define SUN50I_H6_NVMEM_SHIFT 5 ++ ++struct sunxi_cpufreq_soc_data { ++ u32 (*efuse_xlate) (void *efuse); ++}; + + static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev; + ++static u32 sun50i_h616_efuse_xlate(void *efuse) ++{ ++ u32 efuse_value = (*(u32 *)efuse >> SUN50I_H616_NVMEM_SHIFT) & ++ SUN50I_H616_NVMEM_MASK; ++ ++ /* Tested as V1 h616 soc. Expected efuse values are 1 - 3, ++ slowest to fastest */ ++ if (efuse_value >=1 && efuse_value <= 3) ++ return efuse_value - 1; ++ else ++ return 0; ++}; ++ ++static u32 sun50i_h6_efuse_xlate(void *efuse) ++{ ++ u32 efuse_value = (*(u32 *)efuse >> SUN50I_H6_NVMEM_SHIFT) & ++ SUN50I_H6_NVMEM_MASK; ++ ++ /* ++ * We treat unexpected efuse values as if the SoC was from ++ * the slowest bin. Expected efuse values are 1 - 3, slowest ++ * to fastest. ++ */ ++ if (efuse_value >= 1 && efuse_value <= 3) ++ return efuse_value - 1; ++ else ++ return 0; ++}; ++ ++ + /** + * sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value ++ * @soc_data: pointer to sunxi_cpufreq_soc_data context + * @versions: Set to the value parsed from efuse + * + * Returns 0 if success. + */ +-static int sun50i_cpufreq_get_efuse(u32 *versions) ++static int sun50i_cpufreq_get_efuse(const struct sunxi_cpufreq_soc_data *soc_data, ++ u32 *versions) + { + struct nvmem_cell *speedbin_nvmem; + struct device_node *np; + struct device *cpu_dev; +- u32 *speedbin, efuse_value; ++ u32 *speedbin; + size_t len; +- int ret; + + cpu_dev = get_cpu_device(0); + if (!cpu_dev) +@@ -46,10 +86,9 @@ static int sun50i_cpufreq_get_efuse(u32 + np = dev_pm_opp_of_get_opp_desc_node(cpu_dev); + if (!np) + return -ENOENT; +- +- ret = of_device_is_compatible(np, +- "allwinner,sun50i-h6-operating-points"); +- if (!ret) { ++ if (of_device_is_compatible(np, "allwinner,sun50i-h6-operating-points")) {} ++ else if (of_device_is_compatible(np, "allwinner,sun50i-h616-operating-points")) {} ++ else { + of_node_put(np); + return -ENOENT; + } +@@ -65,17 +104,7 @@ static int sun50i_cpufreq_get_efuse(u32 + if (IS_ERR(speedbin)) + return PTR_ERR(speedbin); + +- efuse_value = (*speedbin >> NVMEM_SHIFT) & NVMEM_MASK; +- +- /* +- * We treat unexpected efuse values as if the SoC was from +- * the slowest bin. Expected efuse values are 1-3, slowest +- * to fastest. +- */ +- if (efuse_value >= 1 && efuse_value <= 3) +- *versions = efuse_value - 1; +- else +- *versions = 0; ++ *versions = soc_data->efuse_xlate(speedbin); + + kfree(speedbin); + return 0; +@@ -83,18 +112,23 @@ static int sun50i_cpufreq_get_efuse(u32 + + static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev) + { ++ const struct of_device_id *match; + int *opp_tokens; + char name[MAX_NAME_LEN]; + unsigned int cpu; + u32 speed = 0; + int ret; + ++ match = dev_get_platdata(&pdev->dev); ++ if (!match) ++ return -EINVAL; ++ + opp_tokens = kcalloc(num_possible_cpus(), sizeof(*opp_tokens), + GFP_KERNEL); + if (!opp_tokens) + return -ENOMEM; + +- ret = sun50i_cpufreq_get_efuse(&speed); ++ ret = sun50i_cpufreq_get_efuse(match-> data, &speed); + if (ret) { + kfree(opp_tokens); + return ret; +@@ -159,8 +193,18 @@ static struct platform_driver sun50i_cpu + }, + }; + ++static const struct sunxi_cpufreq_soc_data sun50i_h616_data = { ++ .efuse_xlate = sun50i_h616_efuse_xlate, ++}; ++ ++static const struct sunxi_cpufreq_soc_data sun50i_h6_data = { ++ .efuse_xlate = sun50i_h6_efuse_xlate, ++}; ++ + static const struct of_device_id sun50i_cpufreq_match_list[] = { +- { .compatible = "allwinner,sun50i-h6" }, ++ { .compatible = "allwinner,sun50i-h6", .data = &sun50i_h6_data }, ++ { .compatible = "allwinner,sun50i-h616", .data = &sun50i_h616_data }, ++ { .compatible = "allwinner,sun50i-h618", .data = &sun50i_h616_data }, + {} + }; + MODULE_DEVICE_TABLE(of, sun50i_cpufreq_match_list); +@@ -196,8 +240,8 @@ static int __init sun50i_cpufreq_init(vo + return ret; + + sun50i_cpufreq_pdev = +- platform_device_register_simple("sun50i-cpufreq-nvmem", +- -1, NULL, 0); ++ platform_device_register_data(NULL, ++ "sun50i-cpufreq-nvmem", -1, match, sizeof(*match)); + ret = PTR_ERR_OR_ZERO(sun50i_cpufreq_pdev); + if (ret == 0) + return 0; diff --git a/target/linux/sunxi/patches-6.1/502-arm64-dts-allwinner-h616-Add-cpufreq.patch b/target/linux/sunxi/patches-6.1/502-arm64-dts-allwinner-h616-Add-cpufreq.patch new file mode 100644 index 000000000..d7554e106 --- /dev/null +++ b/target/linux/sunxi/patches-6.1/502-arm64-dts-allwinner-h616-Add-cpufreq.patch @@ -0,0 +1,53 @@ +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +@@ -143,6 +143,10 @@ + ths_calibration: thermal-sensor-calibration@14 { + reg = <0x14 0x8>; + }; ++ ++ cpu_speed_grade: cpu_speed_grade@0 { ++ reg = <0x0 0x2>; ++ }; + }; + + watchdog: watchdog@30090a0 { +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts +@@ -6,12 +6,17 @@ + /dts-v1/; + + #include "sun50i-h616-orangepi-zero.dtsi" ++#include "sun50i-h616-cpu-opp.dtsi" + + / { + model = "OrangePi Zero2"; + compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616"; + }; + ++&cpu0 { ++ cpu-supply = <®_dcdca>; ++}; ++ + &emac0 { + allwinner,rx-delay-ps = <3100>; + allwinner,tx-delay-ps = <700>; +--- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts +@@ -6,12 +6,17 @@ + /dts-v1/; + + #include "sun50i-h616-orangepi-zero.dtsi" ++#include "sun50i-h616-cpu-opp.dtsi" + + / { + model = "OrangePi Zero3"; + compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618"; + }; + ++&cpu0 { ++ cpu-supply = <®_dcdc2>; ++}; ++ + &emac0 { + allwinner,tx-delay-ps = <700>; + phy-mode = "rgmii-rxid"; diff --git a/target/linux/sunxi/patches-6.6/008-v6.7-arm64-dts-allwinner-h616-Add-SID-controller-node.patch b/target/linux/sunxi/patches-6.6/008-v6.7-arm64-dts-allwinner-h616-Add-SID-controller-node.patch new file mode 100644 index 000000000..ce8add18a --- /dev/null +++ b/target/linux/sunxi/patches-6.6/008-v6.7-arm64-dts-allwinner-h616-Add-SID-controller-node.patch @@ -0,0 +1,31 @@ +From 951992797378a2177946400438f4d23c9fceae5b Mon Sep 17 00:00:00 2001 +From: Martin Botka +Date: Tue, 12 Sep 2023 14:25:13 +0200 +Subject: [PATCH] arm64: dts: allwinner: h616: Add SID controller node + +Add node for the H616 SID controller + +Signed-off-by: Martin Botka +Acked-by: Jernej Skrabec +Link: https://lore.kernel.org/r/20230912-sid-h616-v3-2-ee18e1c5bbb5@somainline.org +Signed-off-by: Jernej Skrabec +--- + arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi | 7 +++++++ + 1 file changed, 7 insertions(+) + +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +@@ -133,6 +133,13 @@ + #reset-cells = <1>; + }; + ++ sid: efuse@3006000 { ++ compatible = "allwinner,sun50i-h616-sid", "allwinner,sun50i-a64-sid"; ++ reg = <0x03006000 0x1000>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ }; ++ + watchdog: watchdog@30090a0 { + compatible = "allwinner,sun50i-h616-wdt", + "allwinner,sun6i-a31-wdt"; diff --git a/target/linux/sunxi/patches-6.6/009-v6.9-soc-sunxi-sram-export-register-0-for-THS-on-H616.patch b/target/linux/sunxi/patches-6.6/009-v6.9-soc-sunxi-sram-export-register-0-for-THS-on-H616.patch new file mode 100644 index 000000000..5f9cb0273 --- /dev/null +++ b/target/linux/sunxi/patches-6.6/009-v6.9-soc-sunxi-sram-export-register-0-for-THS-on-H616.patch @@ -0,0 +1,98 @@ +From 898d96c5464b69af44f6407c5de81ebc349d574b Mon Sep 17 00:00:00 2001 +From: Andre Przywara +Date: Mon, 19 Feb 2024 15:36:33 +0000 +Subject: [PATCH] soc: sunxi: sram: export register 0 for THS on H616 + +The Allwinner H616 SoC contains a mysterious bit at register offset 0x0 +in the SRAM control block. If bit 16 is set (the reset value), the +temperature readings of the THS are way off, leading to reports about +200C, at normal ambient temperatures. Clearing this bits brings the +reported values down to the expected values. +The BSP code clears this bit in firmware (U-Boot), and has an explicit +comment about this, but offers no real explanation. + +Experiments in U-Boot show that register 0x0 has no effect on the SRAM C +visibility: all tested bit settings still allow full read and write +access by the CPU to the whole of SRAM C. Only bit 24 of the register at +offset 0x4 makes all of SRAM C inaccessible by the CPU. So modelling +the THS switch functionality as an SRAM region would not reflect reality. + +Since we should not rely on firmware settings, allow other code (the THS +driver) to access this register, by exporting it through the already +existing regmap. This mimics what we already do for the LDO control and +the EMAC register. + +To avoid concurrent accesses to the same register at the same time, by +the SRAM switch code and the regmap code, use the same lock to protect +the access. The regmap subsystem allows to use an existing lock, so we +just need to hook in there. + +Signed-off-by: Andre Przywara +Reviewed-by: Jernej Skrabec +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20240219153639.179814-2-andre.przywara@arm.com +--- + drivers/soc/sunxi/sunxi_sram.c | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) + +--- a/drivers/soc/sunxi/sunxi_sram.c ++++ b/drivers/soc/sunxi/sunxi_sram.c +@@ -287,6 +287,7 @@ EXPORT_SYMBOL(sunxi_sram_release); + struct sunxi_sramc_variant { + int num_emac_clocks; + bool has_ldo_ctrl; ++ bool has_ths_offset; + }; + + static const struct sunxi_sramc_variant sun4i_a10_sramc_variant = { +@@ -308,8 +309,10 @@ static const struct sunxi_sramc_variant + + static const struct sunxi_sramc_variant sun50i_h616_sramc_variant = { + .num_emac_clocks = 2, ++ .has_ths_offset = true, + }; + ++#define SUNXI_SRAM_THS_OFFSET_REG 0x0 + #define SUNXI_SRAM_EMAC_CLOCK_REG 0x30 + #define SUNXI_SYS_LDO_CTRL_REG 0x150 + +@@ -318,6 +321,8 @@ static bool sunxi_sram_regmap_accessible + { + const struct sunxi_sramc_variant *variant = dev_get_drvdata(dev); + ++ if (reg == SUNXI_SRAM_THS_OFFSET_REG && variant->has_ths_offset) ++ return true; + if (reg >= SUNXI_SRAM_EMAC_CLOCK_REG && + reg < SUNXI_SRAM_EMAC_CLOCK_REG + variant->num_emac_clocks * 4) + return true; +@@ -327,6 +332,20 @@ static bool sunxi_sram_regmap_accessible + return false; + } + ++static void sunxi_sram_lock(void *_lock) ++{ ++ spinlock_t *lock = _lock; ++ ++ spin_lock(lock); ++} ++ ++static void sunxi_sram_unlock(void *_lock) ++{ ++ spinlock_t *lock = _lock; ++ ++ spin_unlock(lock); ++} ++ + static struct regmap_config sunxi_sram_regmap_config = { + .reg_bits = 32, + .val_bits = 32, +@@ -336,6 +355,9 @@ static struct regmap_config sunxi_sram_r + /* other devices have no business accessing other registers */ + .readable_reg = sunxi_sram_regmap_accessible_reg, + .writeable_reg = sunxi_sram_regmap_accessible_reg, ++ .lock = sunxi_sram_lock, ++ .unlock = sunxi_sram_unlock, ++ .lock_arg = &sram_lock, + }; + + static int __init sunxi_sram_probe(struct platform_device *pdev) diff --git a/target/linux/sunxi/patches-6.6/010-v6.8-thermal-drivers-sun8i-Add-D1-T113s-THS-controller-support.patch b/target/linux/sunxi/patches-6.6/010-v6.8-thermal-drivers-sun8i-Add-D1-T113s-THS-controller-support.patch new file mode 100644 index 000000000..66f576eb3 --- /dev/null +++ b/target/linux/sunxi/patches-6.6/010-v6.8-thermal-drivers-sun8i-Add-D1-T113s-THS-controller-support.patch @@ -0,0 +1,47 @@ +From ebbf19e36d021f253425344b4d4b987f3b7d9be5 Mon Sep 17 00:00:00 2001 +From: Maxim Kiselev +Date: Mon, 18 Dec 2023 00:06:23 +0300 +Subject: [PATCH] thermal/drivers/sun8i: Add D1/T113s THS controller support + +This patch adds a thermal sensor controller support for the D1/T113s, +which is similar to the one on H6, but with only one sensor and +different scale and offset values. + +Signed-off-by: Maxim Kiselev +Acked-by: Jernej Skrabec +Reviewed-by: Andre Przywara +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20231217210629.131486-3-bigunclemax@gmail.com +--- + drivers/thermal/sun8i_thermal.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/drivers/thermal/sun8i_thermal.c ++++ b/drivers/thermal/sun8i_thermal.c +@@ -606,6 +606,18 @@ static const struct ths_thermal_chip sun + .calc_temp = sun8i_ths_calc_temp, + }; + ++static const struct ths_thermal_chip sun20i_d1_ths = { ++ .sensor_num = 1, ++ .has_bus_clk_reset = true, ++ .offset = 188552, ++ .scale = 673, ++ .temp_data_base = SUN50I_H6_THS_TEMP_DATA, ++ .calibrate = sun50i_h6_ths_calibrate, ++ .init = sun50i_h6_thermal_init, ++ .irq_ack = sun50i_h6_irq_ack, ++ .calc_temp = sun8i_ths_calc_temp, ++}; ++ + static const struct of_device_id of_ths_match[] = { + { .compatible = "allwinner,sun8i-a83t-ths", .data = &sun8i_a83t_ths }, + { .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths }, +@@ -614,6 +626,7 @@ static const struct of_device_id of_ths_ + { .compatible = "allwinner,sun50i-a100-ths", .data = &sun50i_a100_ths }, + { .compatible = "allwinner,sun50i-h5-ths", .data = &sun50i_h5_ths }, + { .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths }, ++ { .compatible = "allwinner,sun20i-d1-ths", .data = &sun20i_d1_ths }, + { /* sentinel */ }, + }; + MODULE_DEVICE_TABLE(of, of_ths_match); diff --git a/target/linux/sunxi/patches-6.6/011-v6.9-thermal-drivers-sun8i-Explain-unknown-H6-register-value.patch b/target/linux/sunxi/patches-6.6/011-v6.9-thermal-drivers-sun8i-Explain-unknown-H6-register-value.patch new file mode 100644 index 000000000..b8138a387 --- /dev/null +++ b/target/linux/sunxi/patches-6.6/011-v6.9-thermal-drivers-sun8i-Explain-unknown-H6-register-value.patch @@ -0,0 +1,79 @@ +From 14f118aa50fe7c7c7330f56d007ecacca487cea8 Mon Sep 17 00:00:00 2001 +From: Andre Przywara +Date: Mon, 19 Feb 2024 15:36:35 +0000 +Subject: [PATCH] thermal/drivers/sun8i: Explain unknown H6 register value + +So far we were ORing in some "unknown" value into the THS control +register on the Allwinner H6. This part of the register is not explained +in the H6 manual, but the H616 manual details those bits, and on closer +inspection the THS IP blocks in both SoCs seem very close: +- The BSP code for both SoCs writes the same values into THS_CTRL. +- The reset values of at least the first three registers are the same. + +Replace the "unknown" value with its proper meaning: "acquire time", +most probably the sample part of the sample & hold circuit of the ADC, +according to its explanation in the H616 manual. + +No functional change, just a macro rename and adjustment. + +Signed-off-by: Andre Przywara +Reviewed-by: Jernej Skrabec +Acked-by: Vasily Khoruzhick +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20240219153639.179814-4-andre.przywara@arm.com +--- + drivers/thermal/sun8i_thermal.c | 29 ++++++++++++++++------------- + 1 file changed, 16 insertions(+), 13 deletions(-) + +--- a/drivers/thermal/sun8i_thermal.c ++++ b/drivers/thermal/sun8i_thermal.c +@@ -50,7 +50,8 @@ + #define SUN8I_THS_CTRL2_T_ACQ1(x) ((GENMASK(15, 0) & (x)) << 16) + #define SUN8I_THS_DATA_IRQ_STS(x) BIT(x + 8) + +-#define SUN50I_THS_CTRL0_T_ACQ(x) ((GENMASK(15, 0) & (x)) << 16) ++#define SUN50I_THS_CTRL0_T_ACQ(x) (GENMASK(15, 0) & ((x) - 1)) ++#define SUN50I_THS_CTRL0_T_SAMPLE_PER(x) ((GENMASK(15, 0) & ((x) - 1)) << 16) + #define SUN50I_THS_FILTER_EN BIT(2) + #define SUN50I_THS_FILTER_TYPE(x) (GENMASK(1, 0) & (x)) + #define SUN50I_H6_THS_PC_TEMP_PERIOD(x) ((GENMASK(19, 0) & (x)) << 12) +@@ -410,25 +411,27 @@ static int sun8i_h3_thermal_init(struct + return 0; + } + +-/* +- * Without this undocumented value, the returned temperatures would +- * be higher than real ones by about 20C. +- */ +-#define SUN50I_H6_CTRL0_UNK 0x0000002f +- + static int sun50i_h6_thermal_init(struct ths_device *tmdev) + { + int val; + + /* +- * T_acq = 20us +- * clkin = 24MHz +- * +- * x = T_acq * clkin - 1 +- * = 479 ++ * The manual recommends an overall sample frequency of 50 KHz (20us, ++ * 480 cycles at 24 MHz), which provides plenty of time for both the ++ * acquisition time (>24 cycles) and the actual conversion time ++ * (>14 cycles). ++ * The lower half of the CTRL register holds the "acquire time", in ++ * clock cycles, which the manual recommends to be 2us: ++ * 24MHz * 2us = 48 cycles. ++ * The high half of THS_CTRL encodes the sample frequency, in clock ++ * cycles: 24MHz * 20us = 480 cycles. ++ * This is explained in the H616 manual, but apparently wrongly ++ * described in the H6 manual, although the BSP code does the same ++ * for both SoCs. + */ + regmap_write(tmdev->regmap, SUN50I_THS_CTRL0, +- SUN50I_H6_CTRL0_UNK | SUN50I_THS_CTRL0_T_ACQ(479)); ++ SUN50I_THS_CTRL0_T_ACQ(48) | ++ SUN50I_THS_CTRL0_T_SAMPLE_PER(480)); + /* average over 4 samples */ + regmap_write(tmdev->regmap, SUN50I_H6_THS_MFC, + SUN50I_THS_FILTER_EN | diff --git a/target/linux/sunxi/patches-6.6/012-v6.9-thermal-drivers-sun8i-Extend-H6-calibration-to-support-4.patch b/target/linux/sunxi/patches-6.6/012-v6.9-thermal-drivers-sun8i-Extend-H6-calibration-to-support-4.patch new file mode 100644 index 000000000..a0dbad48c --- /dev/null +++ b/target/linux/sunxi/patches-6.6/012-v6.9-thermal-drivers-sun8i-Extend-H6-calibration-to-support-4.patch @@ -0,0 +1,74 @@ +From 6c04a419a4c5fb18edefc44dd676fb95c7f6c55d Mon Sep 17 00:00:00 2001 +From: Maksim Kiselev +Date: Mon, 19 Feb 2024 15:36:36 +0000 +Subject: [PATCH] thermal/drivers/sun8i: Extend H6 calibration to support 4 + sensors + +The H616 SoC resembles the H6 thermal sensor controller, with a few +changes like four sensors. + +Extend sun50i_h6_ths_calibrate() function to support calibration of +these sensors. + +Co-developed-by: Martin Botka +Signed-off-by: Martin Botka +Signed-off-by: Maksim Kiselev +Reviewed-by: Andre Przywara +Signed-off-by: Andre Przywara +Reviewed-by: Jernej Skrabec +Acked-by: Vasily Khoruzhick +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20240219153639.179814-5-andre.przywara@arm.com +--- + drivers/thermal/sun8i_thermal.c | 28 ++++++++++++++++++++-------- + 1 file changed, 20 insertions(+), 8 deletions(-) + +--- a/drivers/thermal/sun8i_thermal.c ++++ b/drivers/thermal/sun8i_thermal.c +@@ -222,16 +222,21 @@ static int sun50i_h6_ths_calibrate(struc + struct device *dev = tmdev->dev; + int i, ft_temp; + +- if (!caldata[0] || callen < 2 + 2 * tmdev->chip->sensor_num) ++ if (!caldata[0]) + return -EINVAL; + + /* + * efuse layout: + * +- * 0 11 16 32 +- * +-------+-------+-------+ +- * |temp| |sensor0|sensor1| +- * +-------+-------+-------+ ++ * 0 11 16 27 32 43 48 57 ++ * +----------+-----------+-----------+-----------+ ++ * | temp | |sensor0| |sensor1| |sensor2| | ++ * +----------+-----------+-----------+-----------+ ++ * ^ ^ ^ ++ * | | | ++ * | | sensor3[11:8] ++ * | sensor3[7:4] ++ * sensor3[3:0] + * + * The calibration data on the H6 is the ambient temperature and + * sensor values that are filled during the factory test stage. +@@ -244,9 +249,16 @@ static int sun50i_h6_ths_calibrate(struc + ft_temp = (caldata[0] & FT_TEMP_MASK) * 100; + + for (i = 0; i < tmdev->chip->sensor_num; i++) { +- int sensor_reg = caldata[i + 1] & TEMP_CALIB_MASK; +- int cdata, offset; +- int sensor_temp = tmdev->chip->calc_temp(tmdev, i, sensor_reg); ++ int sensor_reg, sensor_temp, cdata, offset; ++ ++ if (i == 3) ++ sensor_reg = (caldata[1] >> 12) ++ | ((caldata[2] >> 12) << 4) ++ | ((caldata[3] >> 12) << 8); ++ else ++ sensor_reg = caldata[i + 1] & TEMP_CALIB_MASK; ++ ++ sensor_temp = tmdev->chip->calc_temp(tmdev, i, sensor_reg); + + /* + * Calibration data is CALIBRATE_DEFAULT - (calculated diff --git a/target/linux/sunxi/patches-6.6/013-v6.9-thermal-drivers-sun8i-Add-SRAM-register-access-code.patch b/target/linux/sunxi/patches-6.6/013-v6.9-thermal-drivers-sun8i-Add-SRAM-register-access-code.patch new file mode 100644 index 000000000..9b5e9d374 --- /dev/null +++ b/target/linux/sunxi/patches-6.6/013-v6.9-thermal-drivers-sun8i-Add-SRAM-register-access-code.patch @@ -0,0 +1,126 @@ +From f8b54d1120b81ed57bed96cc8e814ba08886d1e5 Mon Sep 17 00:00:00 2001 +From: Andre Przywara +Date: Mon, 19 Feb 2024 15:36:37 +0000 +Subject: [PATCH] thermal/drivers/sun8i: Add SRAM register access code + +The Allwinner H616 SoC needs to clear a bit in one register in the SRAM +controller, to report reasonable temperature values. On reset, bit 16 in +register 0x3000000 is set, which leads to the driver reporting +temperatures around 200C. Clearing this bit brings the values down to the +expected range. The BSP code does a one-time write in U-Boot, with a +comment just mentioning the effect on the THS, but offering no further +explanation. + +To not rely on firmware to set things up for us, add code that queries +the SRAM controller device via a DT phandle link, then clear just this +single bit. + +Signed-off-by: Andre Przywara +Acked-by: Vasily Khoruzhick +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20240219153639.179814-6-andre.przywara@arm.com +--- + drivers/thermal/sun8i_thermal.c | 51 +++++++++++++++++++++++++++++++++ + 1 file changed, 51 insertions(+) + +--- a/drivers/thermal/sun8i_thermal.c ++++ b/drivers/thermal/sun8i_thermal.c +@@ -15,6 +15,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -66,6 +67,7 @@ struct tsensor { + struct ths_thermal_chip { + bool has_mod_clk; + bool has_bus_clk_reset; ++ bool needs_sram; + int sensor_num; + int offset; + int scale; +@@ -83,12 +85,16 @@ struct ths_device { + const struct ths_thermal_chip *chip; + struct device *dev; + struct regmap *regmap; ++ struct regmap_field *sram_regmap_field; + struct reset_control *reset; + struct clk *bus_clk; + struct clk *mod_clk; + struct tsensor sensor[MAX_SENSOR_NUM]; + }; + ++/* The H616 needs to have a bit 16 in the SRAM control register cleared. */ ++static const struct reg_field sun8i_ths_sram_reg_field = REG_FIELD(0x0, 16, 16); ++ + /* Temp Unit: millidegree Celsius */ + static int sun8i_ths_calc_temp(struct ths_device *tmdev, + int id, int reg) +@@ -337,6 +343,34 @@ static void sun8i_ths_reset_control_asse + reset_control_assert(data); + } + ++static struct regmap *sun8i_ths_get_sram_regmap(struct device_node *node) ++{ ++ struct device_node *sram_node; ++ struct platform_device *sram_pdev; ++ struct regmap *regmap = NULL; ++ ++ sram_node = of_parse_phandle(node, "allwinner,sram", 0); ++ if (!sram_node) ++ return ERR_PTR(-ENODEV); ++ ++ sram_pdev = of_find_device_by_node(sram_node); ++ if (!sram_pdev) { ++ /* platform device might not be probed yet */ ++ regmap = ERR_PTR(-EPROBE_DEFER); ++ goto out_put_node; ++ } ++ ++ /* If no regmap is found then the other device driver is at fault */ ++ regmap = dev_get_regmap(&sram_pdev->dev, NULL); ++ if (!regmap) ++ regmap = ERR_PTR(-EINVAL); ++ ++ platform_device_put(sram_pdev); ++out_put_node: ++ of_node_put(sram_node); ++ return regmap; ++} ++ + static int sun8i_ths_resource_init(struct ths_device *tmdev) + { + struct device *dev = tmdev->dev; +@@ -381,6 +415,19 @@ static int sun8i_ths_resource_init(struc + if (ret) + return ret; + ++ if (tmdev->chip->needs_sram) { ++ struct regmap *regmap; ++ ++ regmap = sun8i_ths_get_sram_regmap(dev->of_node); ++ if (IS_ERR(regmap)) ++ return PTR_ERR(regmap); ++ tmdev->sram_regmap_field = devm_regmap_field_alloc(dev, ++ regmap, ++ sun8i_ths_sram_reg_field); ++ if (IS_ERR(tmdev->sram_regmap_field)) ++ return PTR_ERR(tmdev->sram_regmap_field); ++ } ++ + ret = sun8i_ths_calibrate(tmdev); + if (ret) + return ret; +@@ -427,6 +474,10 @@ static int sun50i_h6_thermal_init(struct + { + int val; + ++ /* The H616 needs to have a bit in the SRAM control register cleared. */ ++ if (tmdev->sram_regmap_field) ++ regmap_field_write(tmdev->sram_regmap_field, 0); ++ + /* + * The manual recommends an overall sample frequency of 50 KHz (20us, + * 480 cycles at 24 MHz), which provides plenty of time for both the diff --git a/target/linux/sunxi/patches-6.6/014-v6.9-thermal-drivers-sun8i-Add-support-for-H616-THS-controller.patch b/target/linux/sunxi/patches-6.6/014-v6.9-thermal-drivers-sun8i-Add-support-for-H616-THS-controller.patch new file mode 100644 index 000000000..187bc0dd7 --- /dev/null +++ b/target/linux/sunxi/patches-6.6/014-v6.9-thermal-drivers-sun8i-Add-support-for-H616-THS-controller.patch @@ -0,0 +1,50 @@ +From e7dbfa19572a1440a2e67ef70f94ff204849a0a8 Mon Sep 17 00:00:00 2001 +From: Martin Botka +Date: Mon, 19 Feb 2024 15:36:38 +0000 +Subject: [PATCH] thermal/drivers/sun8i: Add support for H616 THS controller + +Add support for the thermal sensor found in H616 SoCs, is the same as +the H6 thermal sensor controller, but with four sensors. +Also the registers readings are wrong, unless a bit in the first SYS_CFG +register cleared, so set exercise the SRAM regmap to take care of that. + +Signed-off-by: Martin Botka +Signed-off-by: Andre Przywara +Acked-by: Vasily Khoruzhick +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20240219153639.179814-7-andre.przywara@arm.com +--- + drivers/thermal/sun8i_thermal.c | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +--- a/drivers/thermal/sun8i_thermal.c ++++ b/drivers/thermal/sun8i_thermal.c +@@ -684,6 +684,20 @@ static const struct ths_thermal_chip sun + .calc_temp = sun8i_ths_calc_temp, + }; + ++static const struct ths_thermal_chip sun50i_h616_ths = { ++ .sensor_num = 4, ++ .has_bus_clk_reset = true, ++ .needs_sram = true, ++ .ft_deviation = 8000, ++ .offset = 263655, ++ .scale = 810, ++ .temp_data_base = SUN50I_H6_THS_TEMP_DATA, ++ .calibrate = sun50i_h6_ths_calibrate, ++ .init = sun50i_h6_thermal_init, ++ .irq_ack = sun50i_h6_irq_ack, ++ .calc_temp = sun8i_ths_calc_temp, ++}; ++ + static const struct of_device_id of_ths_match[] = { + { .compatible = "allwinner,sun8i-a83t-ths", .data = &sun8i_a83t_ths }, + { .compatible = "allwinner,sun8i-h3-ths", .data = &sun8i_h3_ths }, +@@ -693,6 +707,7 @@ static const struct of_device_id of_ths_ + { .compatible = "allwinner,sun50i-h5-ths", .data = &sun50i_h5_ths }, + { .compatible = "allwinner,sun50i-h6-ths", .data = &sun50i_h6_ths }, + { .compatible = "allwinner,sun20i-d1-ths", .data = &sun20i_d1_ths }, ++ { .compatible = "allwinner,sun50i-h616-ths", .data = &sun50i_h616_ths }, + { /* sentinel */ }, + }; + MODULE_DEVICE_TABLE(of, of_ths_match); diff --git a/target/linux/sunxi/patches-6.6/015-v6.9-thermal-drivers-sun8i-Dont-fail-probe-due-to-zone-registra.patch b/target/linux/sunxi/patches-6.6/015-v6.9-thermal-drivers-sun8i-Dont-fail-probe-due-to-zone-registra.patch new file mode 100644 index 000000000..dd18cd953 --- /dev/null +++ b/target/linux/sunxi/patches-6.6/015-v6.9-thermal-drivers-sun8i-Dont-fail-probe-due-to-zone-registra.patch @@ -0,0 +1,68 @@ +From 9ac53d5532cc4bb595bbee86ccba2172ccc336c3 Mon Sep 17 00:00:00 2001 +From: Mark Brown +Date: Tue, 23 Jan 2024 23:33:07 +0000 +Subject: [PATCH] thermal/drivers/sun8i: Don't fail probe due to zone + registration failure + +Currently the sun8i thermal driver will fail to probe if any of the +thermal zones it is registering fails to register with the thermal core. +Since we currently do not define any trip points for the GPU thermal +zones on at least A64 or H5 this means that we have no thermal support +on these platforms: + +[ 1.698703] thermal_sys: Failed to find 'trips' node +[ 1.698707] thermal_sys: Failed to find trip points for thermal-sensor id=1 + +even though the main CPU thermal zone on both SoCs is fully configured. +This does not seem ideal, while we may not be able to use all the zones +it seems better to have those zones which are usable be operational. +Instead just carry on registering zones if we get any non-deferral +error, allowing use of those zones which are usable. + +This means that we also need to update the interrupt handler to not +attempt to notify the core for events on zones which we have not +registered, I didn't see an ability to mask individual interrupts and +I would expect that interrupts would still be indicated in the ISR even +if they were masked. + +Reviewed-by: Vasily Khoruzhick +Acked-by: Jernej Skrabec +Signed-off-by: Mark Brown +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20240123-thermal-sun8i-registration-v3-1-3e5771b1bbdd@kernel.org +--- + drivers/thermal/sun8i_thermal.c | 16 ++++++++++++++-- + 1 file changed, 14 insertions(+), 2 deletions(-) + +--- a/drivers/thermal/sun8i_thermal.c ++++ b/drivers/thermal/sun8i_thermal.c +@@ -195,6 +195,9 @@ static irqreturn_t sun8i_irq_thread(int + int i; + + for_each_set_bit(i, &irq_bitmap, tmdev->chip->sensor_num) { ++ /* We allow some zones to not register. */ ++ if (IS_ERR(tmdev->sensor[i].tzd)) ++ continue; + thermal_zone_device_update(tmdev->sensor[i].tzd, + THERMAL_EVENT_UNSPECIFIED); + } +@@ -531,8 +534,17 @@ static int sun8i_ths_register(struct ths + i, + &tmdev->sensor[i], + &ths_ops); +- if (IS_ERR(tmdev->sensor[i].tzd)) +- return PTR_ERR(tmdev->sensor[i].tzd); ++ ++ /* ++ * If an individual zone fails to register for reasons ++ * other than probe deferral (eg, a bad DT) then carry ++ * on, other zones might register successfully. ++ */ ++ if (IS_ERR(tmdev->sensor[i].tzd)) { ++ if (PTR_ERR(tmdev->sensor[i].tzd) == -EPROBE_DEFER) ++ return PTR_ERR(tmdev->sensor[i].tzd); ++ continue; ++ } + + devm_thermal_add_hwmon_sysfs(tmdev->dev, tmdev->sensor[i].tzd); + } diff --git a/target/linux/sunxi/patches-6.6/016-v6.9-arm64-dts-allwinner-h616-Add-thermal-sensor-and-zones.patch b/target/linux/sunxi/patches-6.6/016-v6.9-arm64-dts-allwinner-h616-Add-thermal-sensor-and-zones.patch new file mode 100644 index 000000000..cd6542bf1 --- /dev/null +++ b/target/linux/sunxi/patches-6.6/016-v6.9-arm64-dts-allwinner-h616-Add-thermal-sensor-and-zones.patch @@ -0,0 +1,138 @@ +From f4318af40544b8e7ff5a6b667ede60e6cf808262 Mon Sep 17 00:00:00 2001 +From: Martin Botka +Date: Mon, 19 Feb 2024 15:36:39 +0000 +Subject: [PATCH] arm64: dts: allwinner: h616: Add thermal sensor and zones + +There are four thermal sensors: +- CPU +- GPU +- VE +- DRAM + +Add the thermal sensor configuration and the thermal zones. + +Signed-off-by: Martin Botka +Signed-off-by: Andre Przywara +Reviewed-by: Jernej Skrabec +Link: https://lore.kernel.org/r/20240219153639.179814-8-andre.przywara@arm.com +Signed-off-by: Jernej Skrabec +--- + .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 88 +++++++++++++++++++ + 1 file changed, 88 insertions(+) + +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +@@ -9,6 +9,7 @@ + #include + #include + #include ++#include + + / { + interrupt-parent = <&gic>; +@@ -138,6 +139,10 @@ + reg = <0x03006000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; ++ ++ ths_calibration: thermal-sensor-calibration@14 { ++ reg = <0x14 0x8>; ++ }; + }; + + watchdog: watchdog@30090a0 { +@@ -511,6 +516,19 @@ + }; + }; + ++ ths: thermal-sensor@5070400 { ++ compatible = "allwinner,sun50i-h616-ths"; ++ reg = <0x05070400 0x400>; ++ interrupts = ; ++ clocks = <&ccu CLK_BUS_THS>; ++ clock-names = "bus"; ++ resets = <&ccu RST_BUS_THS>; ++ nvmem-cells = <&ths_calibration>; ++ nvmem-cell-names = "calibration"; ++ allwinner,sram = <&syscon>; ++ #thermal-sensor-cells = <1>; ++ }; ++ + usbotg: usb@5100000 { + compatible = "allwinner,sun50i-h616-musb", + "allwinner,sun8i-h3-musb"; +@@ -755,4 +773,74 @@ + #size-cells = <0>; + }; + }; ++ ++ thermal-zones { ++ cpu-thermal { ++ polling-delay-passive = <500>; ++ polling-delay = <1000>; ++ thermal-sensors = <&ths 2>; ++ sustainable-power = <1000>; ++ ++ trips { ++ cpu_threshold: cpu-trip-0 { ++ temperature = <60000>; ++ type = "passive"; ++ hysteresis = <0>; ++ }; ++ cpu_target: cpu-trip-1 { ++ temperature = <70000>; ++ type = "passive"; ++ hysteresis = <0>; ++ }; ++ cpu_critical: cpu-trip-2 { ++ temperature = <110000>; ++ type = "critical"; ++ hysteresis = <0>; ++ }; ++ }; ++ }; ++ ++ gpu-thermal { ++ polling-delay-passive = <500>; ++ polling-delay = <1000>; ++ thermal-sensors = <&ths 0>; ++ sustainable-power = <1100>; ++ ++ trips { ++ gpu_temp_critical: gpu-trip-0 { ++ temperature = <110000>; ++ type = "critical"; ++ hysteresis = <0>; ++ }; ++ }; ++ }; ++ ++ ve-thermal { ++ polling-delay-passive = <0>; ++ polling-delay = <0>; ++ thermal-sensors = <&ths 1>; ++ ++ trips { ++ ve_temp_critical: ve-trip-0 { ++ temperature = <110000>; ++ type = "critical"; ++ hysteresis = <0>; ++ }; ++ }; ++ }; ++ ++ ddr-thermal { ++ polling-delay-passive = <0>; ++ polling-delay = <0>; ++ thermal-sensors = <&ths 3>; ++ ++ trips { ++ ddr_temp_critical: ddr-trip-0 { ++ temperature = <110000>; ++ type = "critical"; ++ hysteresis = <0>; ++ }; ++ }; ++ }; ++ }; + }; diff --git a/target/linux/sunxi/patches-6.6/102-sunxi-add-OF-node-for-USB-eth-on-NanoPi-R1S-H5.patch b/target/linux/sunxi/patches-6.6/102-sunxi-add-OF-node-for-USB-eth-on-NanoPi-R1S-H5.patch new file mode 100644 index 000000000..df4ef1d43 --- /dev/null +++ b/target/linux/sunxi/patches-6.6/102-sunxi-add-OF-node-for-USB-eth-on-NanoPi-R1S-H5.patch @@ -0,0 +1,16 @@ +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-r1s-h5.dts +@@ -116,6 +116,13 @@ + + &ehci1 { + status = "okay"; ++ ++ usb-eth@1 { ++ compatible = "realtek,rtl8153"; ++ reg = <1>; ++ ++ realtek,led-data = <0x78>; ++ }; + }; + + &ehci2 { diff --git a/target/linux/sunxi/patches-6.6/301-orangepi_pc2_usb_otg_to_host_key_power.patch b/target/linux/sunxi/patches-6.6/301-orangepi_pc2_usb_otg_to_host_key_power.patch new file mode 100644 index 000000000..eea47737f --- /dev/null +++ b/target/linux/sunxi/patches-6.6/301-orangepi_pc2_usb_otg_to_host_key_power.patch @@ -0,0 +1,20 @@ +--- a/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts +@@ -60,7 +60,7 @@ + + key-sw4 { + label = "sw4"; +- linux,code = ; ++ linux,code = ; + gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; + wakeup-source; + }; +@@ -221,7 +221,7 @@ + }; + + &usb_otg { +- dr_mode = "otg"; ++ dr_mode = "host"; + status = "okay"; + }; + diff --git a/target/linux/sunxi/patches-6.6/400-arm64-allwinner-a64-sopine-Add-Sopine-flash-partitio.patch b/target/linux/sunxi/patches-6.6/400-arm64-allwinner-a64-sopine-Add-Sopine-flash-partitio.patch new file mode 100644 index 000000000..a8dfcd9db --- /dev/null +++ b/target/linux/sunxi/patches-6.6/400-arm64-allwinner-a64-sopine-Add-Sopine-flash-partitio.patch @@ -0,0 +1,46 @@ +From 7d87d3dafc4b1ea5659eb71ee6c5fd5308490d1f Mon Sep 17 00:00:00 2001 +From: Oskari Lemmela +Date: Mon, 31 Dec 2018 07:44:49 +0200 +Subject: [PATCH] arm64: allwinner: a64-sopine: Add Sopine flash partitions. + +First 896kB to u-boot. Enough space for SPL, u-boot and ATF. +Next 128kB to u-boot environment and rest to firmware. + +Firmware partition is compatible FIT image dynamic splitting. + +Signed-off-by: Oskari Lemmela +--- + .../boot/dts/allwinner/sun50i-a64-sopine.dtsi | 22 +++++++++++++++++++ + 1 file changed, 22 insertions(+) + +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine.dtsi +@@ -58,6 +58,28 @@ + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ partition@0 { ++ label = "u-boot"; ++ reg = <0x000000 0x0E0000>; ++ }; ++ ++ partition@e0000 { ++ label = "u-boot-env"; ++ reg = <0x0E0000 0x020000>; ++ }; ++ ++ partition@100000 { ++ compatible = "denx,fit"; ++ label = "firmware"; ++ reg = <0x100000 0xF00000>; ++ }; ++ }; + }; + }; + diff --git a/target/linux/sunxi/patches-6.6/410-sunxi-add-bananapi-p2-zero.patch b/target/linux/sunxi/patches-6.6/410-sunxi-add-bananapi-p2-zero.patch new file mode 100644 index 000000000..01044fef4 --- /dev/null +++ b/target/linux/sunxi/patches-6.6/410-sunxi-add-bananapi-p2-zero.patch @@ -0,0 +1,292 @@ +--- a/arch/arm/boot/dts/allwinner/Makefile ++++ b/arch/arm/boot/dts/allwinner/Makefile +@@ -280,6 +280,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ + sun8i-a83t-cubietruck-plus.dtb \ + sun8i-a83t-tbs-a711.dtb \ + sun8i-h2-plus-bananapi-m2-zero.dtb \ ++ sun8i-h2-plus-bananapi-p2-zero.dtb \ + sun8i-h2-plus-libretech-all-h3-cc.dtb \ + sun8i-h2-plus-orangepi-r1.dtb \ + sun8i-h2-plus-orangepi-zero.dtb \ +--- /dev/null ++++ b/arch/arm/boot/dts/allwinner/sun8i-h2-plus-bananapi-p2-zero.dts +@@ -0,0 +1,279 @@ ++// SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++/* ++ * Copyright (C) 2023 Zoltan HERPAI ++ * ++ * Based on sun8i-h2-plus-bananapi-m2-zero.dts, which is: ++ * Copyright (C) 2017 Icenowy Zheng ++ */ ++ ++/dts-v1/; ++#include "sun8i-h3.dtsi" ++#include "sunxi-common-regulators.dtsi" ++ ++#include ++#include ++ ++/ { ++ model = "Banana Pi BPI-P2-Zero"; ++ compatible = "sinovoip,bpi-p2-zero", "allwinner,sun8i-h2-plus"; ++ ++ aliases { ++ serial0 = &uart0; ++ serial1 = &uart1; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ connector { ++ compatible = "hdmi-connector"; ++ type = "c"; ++ ++ port { ++ hdmi_con_in: endpoint { ++ remote-endpoint = <&hdmi_out_con>; ++ }; ++ }; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ pwr_led { ++ label = "bananapi-p2-zero:red:pwr"; ++ gpios = <&r_pio 0 10 GPIO_ACTIVE_LOW>; /* PL10 */ ++ default-state = "on"; ++ }; ++ }; ++ ++ gpio_keys { ++ compatible = "gpio-keys"; ++ ++ sw4 { ++ label = "power"; ++ linux,code = ; ++ gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++ ++ reg_vdd_cpux: vdd-cpux-regulator { ++ compatible = "regulator-gpio"; ++ regulator-name = "vdd-cpux"; ++ regulator-type = "voltage"; ++ regulator-boot-on; ++ regulator-always-on; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1300000>; ++ regulator-ramp-delay = <50>; /* 4ms */ ++ ++ gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */ ++ enable-active-high; ++ gpios-states = <0x1>; ++ states = <1100000 0>, <1300000 1>; ++ }; ++ ++ reg_vcc_dram: vcc-dram { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc-dram"; ++ regulator-min-microvolt = <1500000>; ++ regulator-max-microvolt = <1500000>; ++ regulator-always-on; ++ regulator-boot-on; ++ enable-active-high; ++ gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */ ++ vin-supply = <®_vcc5v0>; ++ }; ++ ++ reg_vcc1v2: vcc1v2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc1v2"; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-always-on; ++ regulator-boot-on; ++ enable-active-high; ++ gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */ ++ vin-supply = <®_vcc5v0>; ++ }; ++ ++ poweroff { ++ compatible = "regulator-poweroff"; ++ cpu-supply = <®_vcc1v2>; ++ }; ++ ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */ ++ clocks = <&rtc 1>; ++ clock-names = "ext_clock"; ++ }; ++}; ++ ++&cpu0 { ++ cpu-supply = <®_vdd_cpux>; ++}; ++ ++&de { ++ status = "okay"; ++}; ++ ++&ehci0 { ++ status = "okay"; ++}; ++ ++&emac { ++ phy-handle = <&int_mii_phy>; ++ phy-mode = "mii"; ++ allwinner,leds-active-low; ++ status = "okay"; ++}; ++ ++&hdmi { ++ status = "okay"; ++}; ++ ++&hdmi_out { ++ hdmi_out_con: endpoint { ++ remote-endpoint = <&hdmi_con_in>; ++ }; ++}; ++ ++&mmc0 { ++ vmmc-supply = <®_vcc3v3>; ++ bus-width = <4>; ++ /* ++ * On the production batch of this board the card detect GPIO is ++ * high active (card inserted), although on the early samples it's ++ * low active. ++ */ ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */ ++ status = "okay"; ++}; ++ ++&mmc1 { ++ vmmc-supply = <®_vcc3v3>; ++ vqmmc-supply = <®_vcc3v3>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++ ++ brcmf: wifi@1 { ++ reg = <1>; ++ compatible = "brcm,bcm4329-fmac"; ++ interrupt-parent = <&pio>; ++ interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */ ++ interrupt-names = "host-wake"; ++ }; ++}; ++ ++&ohci0 { ++ status = "okay"; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_pa_pins>; ++ status = "okay"; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; ++ uart-has-rtscts; ++ status = "okay"; ++ ++ bluetooth { ++ compatible = "brcm,bcm43438-bt"; ++ max-speed = <1500000>; ++ clocks = <&rtc 1>; ++ clock-names = "lpo"; ++ vbat-supply = <®_vcc3v3>; ++ vddio-supply = <®_vcc3v3>; ++ device-wakeup-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */ ++ host-wakeup-gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */ ++ shutdown-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */ ++ }; ++ ++}; ++ ++&pio { ++ gpio-line-names = ++ /* PA */ ++ "CON2-P13", "CON2-P11", "CON2-P22", "CON2-P15", ++ "CON3-P03", "CON3-P02", "CON2-P07", "CON2-P29", ++ "CON2-P31", "CON2-P33", "CON2-P35", "CON2-P05", ++ "CON2-P03", "CON2-P08", "CON2-P10", "CON2-P16", ++ "CON2-P12", "CON2-P37", "CON2-P28", "CON2-P27", ++ "CON2-P40", "CON2-P38", "", "", ++ "", "", "", "", "", "", "", "", ++ ++ /* PB */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ ++ /* PC */ ++ "CON2-P19", "CON2-P21", "CON2-P23", "CON2-P24", ++ "CON2-P18", "", "", "CON2-P26", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ ++ /* PD */ ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "CSI-PWR-EN", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ ++ /* PE */ ++ "CN3-P17", "CN3-P13", "CN3-P09", "CN3-P07", ++ "CN3-P19", "CN3-P21", "CN3-P22", "CN3-P20", ++ "CN3-P18", "CN3-P16", "CN3-P14", "CN3-P12", ++ "CN3-P05", "CN3-P03", "CN3-P06", "CN3-P08", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ ++ /* PF */ ++ "SDC0-D1", "SDC0-D0", "SDC0-CLK", "SDC0-CMD", "SDC0-D3", ++ "SDC0-D2", "SDC0-DET", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ ++ /* PG */ ++ "WL-SDIO-CLK", "WL-SDIO-CMD", "WL-SDIO-D0", "WL-SDIO-D1", ++ "WL-SDIO-D2", "WL-SDIO-D3", "BT-UART-TX", "BT-UART-RX", ++ "BT-UART-RTS", "BT-UART-CTS", "WL-WAKE-AP", "BT-WAKE-AP", ++ "BT-RST-N", "AP-WAKE-BT", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", ""; ++}; ++ ++&r_pio { ++ gpio-line-names = ++ /* PL */ ++ "", "CPUX-SET", "CON2-P32", "POWER-KEY", "CON2-P36", ++ "VCC-IO-EN", "USB0-ID", "WL-PWR-EN", ++ "PWR-STB", "PWR-DRAM", "PWR-LED", "IR-RX", "", "", "", "", ++ "", "", "", "", "", "", "", "", ++ "", "", "", "", "", "", "", ""; ++}; ++ ++&usb_otg { ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++&usbphy { ++ usb0_id_det-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ ++ /* ++ * There're two micro-USB connectors, one is power-only and another is ++ * OTG. The Vbus of these two connectors are connected together, so ++ * the external USB device will be powered just by the power input ++ * from the power-only USB port. ++ */ ++ status = "okay"; ++}; diff --git a/target/linux/sunxi/patches-6.6/430-arm64-dts-allwinner-a64-olinuxino-add-status-LED-ali.patch b/target/linux/sunxi/patches-6.6/430-arm64-dts-allwinner-a64-olinuxino-add-status-LED-ali.patch new file mode 100644 index 000000000..68ec333e3 --- /dev/null +++ b/target/linux/sunxi/patches-6.6/430-arm64-dts-allwinner-a64-olinuxino-add-status-LED-ali.patch @@ -0,0 +1,32 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Petr=20=C5=A0tetiar?= +Date: Thu, 26 Mar 2020 10:09:19 +0100 +Subject: [PATCH] arm64: dts: allwinner: a64: olinuxino: add status LED aliases +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Signed-off-by: Petr Štetiar + +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino.dts +@@ -15,6 +15,10 @@ + aliases { + ethernet0 = &emac; + serial0 = &uart0; ++ led-boot = &led_user; ++ led-failsafe = &led_user; ++ led-running = &led_user; ++ led-upgrade = &led_user; + }; + + chosen { +@@ -35,7 +39,7 @@ + leds { + compatible = "gpio-leds"; + +- led-0 { ++ led_user: led-0 { + label = "a64-olinuxino:red:user"; + gpios = <&pio 4 17 GPIO_ACTIVE_HIGH>; /* PE17 */ + }; diff --git a/target/linux/sunxi/patches-6.6/442-arm64-dts-orangepi-one-plus-enable-PWM.patch b/target/linux/sunxi/patches-6.6/442-arm64-dts-orangepi-one-plus-enable-PWM.patch new file mode 100644 index 000000000..76a73ee1f --- /dev/null +++ b/target/linux/sunxi/patches-6.6/442-arm64-dts-orangepi-one-plus-enable-PWM.patch @@ -0,0 +1,10 @@ +--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-one-plus.dts +@@ -41,3 +41,7 @@ + reg = <1>; + }; + }; ++ ++&pwm { ++ status = "okay"; ++}; diff --git a/target/linux/sunxi/patches-6.6/450-arm64-dts-enable-wifi-on-pine64-boards.patch b/target/linux/sunxi/patches-6.6/450-arm64-dts-enable-wifi-on-pine64-boards.patch new file mode 100644 index 000000000..3876852c2 --- /dev/null +++ b/target/linux/sunxi/patches-6.6/450-arm64-dts-enable-wifi-on-pine64-boards.patch @@ -0,0 +1,72 @@ +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts +@@ -42,6 +42,11 @@ + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; ++ ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ ++ }; + }; + + &ac_power_supply { +@@ -102,6 +107,21 @@ + reg = <1>; + }; + }; ++ ++&mmc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins>; ++ vmmc-supply = <®_dldo4>; ++ vqmmc-supply = <®_eldo1>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++ ++ rtl8723cs: wifi@1 { ++ reg = <1>; ++ }; ++}; + + &mmc2 { + pinctrl-names = "default"; +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts +@@ -35,6 +35,11 @@ + }; + }; + }; ++ ++ wifi_pwrseq: wifi_pwrseq { ++ compatible = "mmc-pwrseq-simple"; ++ reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ ++ }; + }; + + &codec { +@@ -124,6 +129,21 @@ + status = "okay"; + }; + ++&mmc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&mmc1_pins>; ++ vmmc-supply = <®_dldo4>; ++ vqmmc-supply = <®_eldo1>; ++ mmc-pwrseq = <&wifi_pwrseq>; ++ bus-width = <4>; ++ non-removable; ++ status = "okay"; ++ ++ rtl8723cs: wifi@1 { ++ reg = <1>; ++ }; ++}; ++ + &ohci0 { + status = "okay"; + }; diff --git a/target/linux/sunxi/patches-6.6/501-h616-Add-cpu-frequency-scaling-support.patch b/target/linux/sunxi/patches-6.6/501-h616-Add-cpu-frequency-scaling-support.patch new file mode 100644 index 000000000..62e88a091 --- /dev/null +++ b/target/linux/sunxi/patches-6.6/501-h616-Add-cpu-frequency-scaling-support.patch @@ -0,0 +1,270 @@ +From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 +From: AGM1968 +Date: Tue, 23 May 2023 16:43:00 +0000 +Subject: arm64-dts-allwinner-h616-Add-efuse_xlate-cpu-frequency-scaling + +Signed-off-by: AGM1968 +--- + arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi | 75 ++++++++ + drivers/cpufreq/cpufreq-dt-platdev.c | 1 + + drivers/cpufreq/sun50i-cpufreq-nvmem.c | 91 +++++++--- + 3 files changed, 143 insertions(+), 24 deletions(-) + +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-cpu-opp.dtsi +@@ -0,0 +1,75 @@ ++//SPDX-License-Identifier: (GPL-2.0+ OR MIT) ++//Testing Version 1 from: AGM1968 ++//Noted: PLL_CPUX = 24 MHz*N/P (WIP) ++ ++/ { ++ cpu_opp_table: opp-table-cpu { ++ compatible = "allwinner,sun50i-h616-operating-points"; ++ nvmem-cells = <&cpu_speed_grade>; ++ opp-shared; ++ ++ opp-480000000 { ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ opp-hz = /bits/ 64 <480000000>; ++ opp-microvolt-speed0 = <820000 820000 1100000>; ++ opp-microvolt-speed1 = <880000 880000 1100000>; ++ opp-microvolt-speed2 = <880000 880000 1100000>; ++ }; ++ ++ opp-600000000 { ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ opp-hz = /bits/ 64 <600000000>; ++ opp-microvolt-speed0 = <820000 820000 1100000>; ++ opp-microvolt-speed1 = <880000 880000 1100000>; ++ opp-microvolt-speed2 = <880000 880000 1100000>; ++ }; ++ ++ opp-792000000 { ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ opp-hz = /bits/ 64 <792000000>; ++ opp-microvolt-speed0 = <860000 860000 1100000>; ++ opp-microvolt-speed1 = <940000 940000 1100000>; ++ opp-microvolt-speed2 = <940000 940000 1100000>; ++ }; ++ ++ opp-1008000000 { ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ opp-hz = /bits/ 64 <1008000000>; ++ opp-microvolt-speed0 = <900000 900000 1100000>; ++ opp-microvolt-speed1 = <1020000 1020000 1100000>; ++ opp-microvolt-speed2 = <1020000 1020000 1100000>; ++ }; ++ ++ opp-1200000000 { ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ opp-hz = /bits/ 64 <1200000000>; ++ opp-microvolt-speed0 = <960000 960000 1100000>; ++ opp-microvolt-speed1 = <1100000 1100000 1100000>; ++ opp-microvolt-speed2 = <1100000 1100000 1100000>; ++ }; ++ ++ opp-1512000000 { ++ clock-latency-ns = <244144>; /* 8 32k periods */ ++ opp-hz = /bits/ 64 <1512000000>; ++ opp-microvolt-speed0 = <1100000 1100000 1100000>; ++ opp-microvolt-speed1 = <1100000 1100000 1100000>; ++ opp-microvolt-speed2 = <1100000 1100000 1100000>; ++ }; ++ }; ++}; ++ ++&cpu0 { ++ operating-points-v2 = <&cpu_opp_table>; ++}; ++ ++&cpu1 { ++ operating-points-v2 = <&cpu_opp_table>; ++}; ++ ++&cpu2 { ++ operating-points-v2 = <&cpu_opp_table>; ++}; ++ ++&cpu3 { ++ operating-points-v2 = <&cpu_opp_table>; ++}; +--- a/drivers/cpufreq/cpufreq-dt-platdev.c ++++ b/drivers/cpufreq/cpufreq-dt-platdev.c +@@ -104,6 +104,8 @@ static const struct of_device_id allowli + */ + static const struct of_device_id blocklist[] __initconst = { + { .compatible = "allwinner,sun50i-h6", }, ++ { .compatible = "allwinner,sun50i-h616", }, ++ { .compatible = "allwinner,sun50i-h618", }, + + { .compatible = "apple,arm-platform", }, + +--- a/drivers/cpufreq/sun50i-cpufreq-nvmem.c ++++ b/drivers/cpufreq/sun50i-cpufreq-nvmem.c +@@ -6,6 +6,9 @@ + * provide the OPP framework with required information. + * + * Copyright (C) 2019 Yangtao Li ++ * ++ * ADD efuse_xlate to extract SoC version so that h6 and h616 can coexist. ++ * Version 1 AGM1968 + */ + + #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt +@@ -20,25 +23,62 @@ + + #define MAX_NAME_LEN 7 + +-#define NVMEM_MASK 0x7 +-#define NVMEM_SHIFT 5 ++#define SUN50I_H616_NVMEM_MASK 0x22 ++#define SUN50I_H616_NVMEM_SHIFT 5 ++#define SUN50I_H6_NVMEM_MASK 0x7 ++#define SUN50I_H6_NVMEM_SHIFT 5 ++ ++struct sunxi_cpufreq_soc_data { ++ u32 (*efuse_xlate) (void *efuse); ++}; + + static struct platform_device *cpufreq_dt_pdev, *sun50i_cpufreq_pdev; + ++static u32 sun50i_h616_efuse_xlate(void *efuse) ++{ ++ u32 efuse_value = (*(u32 *)efuse >> SUN50I_H616_NVMEM_SHIFT) & ++ SUN50I_H616_NVMEM_MASK; ++ ++ /* Tested as V1 h616 soc. Expected efuse values are 1 - 3, ++ slowest to fastest */ ++ if (efuse_value >=1 && efuse_value <= 3) ++ return efuse_value - 1; ++ else ++ return 0; ++}; ++ ++static u32 sun50i_h6_efuse_xlate(void *efuse) ++{ ++ u32 efuse_value = (*(u32 *)efuse >> SUN50I_H6_NVMEM_SHIFT) & ++ SUN50I_H6_NVMEM_MASK; ++ ++ /* ++ * We treat unexpected efuse values as if the SoC was from ++ * the slowest bin. Expected efuse values are 1 - 3, slowest ++ * to fastest. ++ */ ++ if (efuse_value >= 1 && efuse_value <= 3) ++ return efuse_value - 1; ++ else ++ return 0; ++}; ++ ++ + /** + * sun50i_cpufreq_get_efuse() - Determine speed grade from efuse value ++ * @soc_data: pointer to sunxi_cpufreq_soc_data context + * @versions: Set to the value parsed from efuse + * + * Returns 0 if success. + */ +-static int sun50i_cpufreq_get_efuse(u32 *versions) ++static int sun50i_cpufreq_get_efuse(const struct sunxi_cpufreq_soc_data *soc_data, ++ u32 *versions) + { + struct nvmem_cell *speedbin_nvmem; + struct device_node *np; + struct device *cpu_dev; +- u32 *speedbin, efuse_value; ++ u32 *speedbin; + size_t len; +- int ret; + + cpu_dev = get_cpu_device(0); + if (!cpu_dev) +@@ -47,10 +87,9 @@ static int sun50i_cpufreq_get_efuse(u32 + np = dev_pm_opp_of_get_opp_desc_node(cpu_dev); + if (!np) + return -ENOENT; +- +- ret = of_device_is_compatible(np, +- "allwinner,sun50i-h6-operating-points"); +- if (!ret) { ++ if (of_device_is_compatible(np, "allwinner,sun50i-h6-operating-points")) {} ++ else if (of_device_is_compatible(np, "allwinner,sun50i-h616-operating-points")) {} ++ else { + of_node_put(np); + return -ENOENT; + } +@@ -66,17 +105,7 @@ static int sun50i_cpufreq_get_efuse(u32 + if (IS_ERR(speedbin)) + return PTR_ERR(speedbin); + +- efuse_value = (*speedbin >> NVMEM_SHIFT) & NVMEM_MASK; +- +- /* +- * We treat unexpected efuse values as if the SoC was from +- * the slowest bin. Expected efuse values are 1-3, slowest +- * to fastest. +- */ +- if (efuse_value >= 1 && efuse_value <= 3) +- *versions = efuse_value - 1; +- else +- *versions = 0; ++ *versions = soc_data->efuse_xlate(speedbin); + + kfree(speedbin); + return 0; +@@ -84,18 +113,23 @@ static int sun50i_cpufreq_get_efuse(u32 + + static int sun50i_cpufreq_nvmem_probe(struct platform_device *pdev) + { ++ const struct of_device_id *match; + int *opp_tokens; + char name[MAX_NAME_LEN]; + unsigned int cpu; + u32 speed = 0; + int ret; + ++ match = dev_get_platdata(&pdev->dev); ++ if (!match) ++ return -EINVAL; ++ + opp_tokens = kcalloc(num_possible_cpus(), sizeof(*opp_tokens), + GFP_KERNEL); + if (!opp_tokens) + return -ENOMEM; + +- ret = sun50i_cpufreq_get_efuse(&speed); ++ ret = sun50i_cpufreq_get_efuse(match-> data, &speed); + if (ret) { + kfree(opp_tokens); + return ret; +@@ -158,8 +192,18 @@ static struct platform_driver sun50i_cpu + }, + }; + ++static const struct sunxi_cpufreq_soc_data sun50i_h616_data = { ++ .efuse_xlate = sun50i_h616_efuse_xlate, ++}; ++ ++static const struct sunxi_cpufreq_soc_data sun50i_h6_data = { ++ .efuse_xlate = sun50i_h6_efuse_xlate, ++}; ++ + static const struct of_device_id sun50i_cpufreq_match_list[] = { +- { .compatible = "allwinner,sun50i-h6" }, ++ { .compatible = "allwinner,sun50i-h6", .data = &sun50i_h6_data }, ++ { .compatible = "allwinner,sun50i-h616", .data = &sun50i_h616_data }, ++ { .compatible = "allwinner,sun50i-h618", .data = &sun50i_h616_data }, + {} + }; + MODULE_DEVICE_TABLE(of, sun50i_cpufreq_match_list); +@@ -195,8 +239,8 @@ static int __init sun50i_cpufreq_init(vo + return ret; + + sun50i_cpufreq_pdev = +- platform_device_register_simple("sun50i-cpufreq-nvmem", +- -1, NULL, 0); ++ platform_device_register_data(NULL, ++ "sun50i-cpufreq-nvmem", -1, match, sizeof(*match)); + ret = PTR_ERR_OR_ZERO(sun50i_cpufreq_pdev); + if (ret == 0) + return 0; diff --git a/target/linux/sunxi/patches-6.6/502-arm64-dts-allwinner-h616-Add-cpufreq.patch b/target/linux/sunxi/patches-6.6/502-arm64-dts-allwinner-h616-Add-cpufreq.patch new file mode 100644 index 000000000..d7554e106 --- /dev/null +++ b/target/linux/sunxi/patches-6.6/502-arm64-dts-allwinner-h616-Add-cpufreq.patch @@ -0,0 +1,53 @@ +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi +@@ -143,6 +143,10 @@ + ths_calibration: thermal-sensor-calibration@14 { + reg = <0x14 0x8>; + }; ++ ++ cpu_speed_grade: cpu_speed_grade@0 { ++ reg = <0x0 0x2>; ++ }; + }; + + watchdog: watchdog@30090a0 { +--- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts +@@ -6,12 +6,17 @@ + /dts-v1/; + + #include "sun50i-h616-orangepi-zero.dtsi" ++#include "sun50i-h616-cpu-opp.dtsi" + + / { + model = "OrangePi Zero2"; + compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616"; + }; + ++&cpu0 { ++ cpu-supply = <®_dcdca>; ++}; ++ + &emac0 { + allwinner,rx-delay-ps = <3100>; + allwinner,tx-delay-ps = <700>; +--- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts +@@ -6,12 +6,17 @@ + /dts-v1/; + + #include "sun50i-h616-orangepi-zero.dtsi" ++#include "sun50i-h616-cpu-opp.dtsi" + + / { + model = "OrangePi Zero3"; + compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618"; + }; + ++&cpu0 { ++ cpu-supply = <®_dcdc2>; ++}; ++ + &emac0 { + allwinner,tx-delay-ps = <700>; + phy-mode = "rgmii-rxid"; diff --git a/target/linux/x86/64/config-6.6 b/target/linux/x86/64/config-6.6 index 5de48cc8a..a04a3649b 100644 --- a/target/linux/x86/64/config-6.6 +++ b/target/linux/x86/64/config-6.6 @@ -175,6 +175,7 @@ CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_IMAGEBLIT=y CONFIG_FB_CMDLINE=y CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_DEVICE=y CONFIG_FB_EFI=y CONFIG_FB_HYPERV=y # CONFIG_FB_INTEL is not set diff --git a/target/linux/x86/Makefile b/target/linux/x86/Makefile index 59a868b63..2c8592915 100644 --- a/target/linux/x86/Makefile +++ b/target/linux/x86/Makefile @@ -21,7 +21,7 @@ DEFAULT_PACKAGES += partx-utils mkf2fs e2fsprogs kmod-button-hotplug kmod-usb-hi kmod-alx kmod-e1000e kmod-igb kmod-igc kmod-igbvf kmod-iavf kmod-bnx2x kmod-pcnet32 kmod-tulip kmod-via-velocity kmod-vmxnet3 kmod-i40e kmod-i40evf \ kmod-sound-hda-core kmod-sound-hda-codec-realtek kmod-sound-hda-codec-via kmod-sound-via82xx kmod-sound-hda-intel kmod-sound-hda-codec-hdmi kmod-sound-i8x0 \ kmod-usb-net kmod-usb-net-asix-ax88179 kmod-usb-net-rtl8150 kmod-usb-net-aqc111 kmod-mlx4-core kmod-mlx5-core kmod-drm-i915 kmod-drm-amdgpu kmod-usb-audio \ -kmod-usb-net-rtl8152-vendor kmod-r8125 kmod-r8168 kmod-8139cp kmod-8139too kmod-tg3 htop lm-sensors autocore-x86 automount autosamba ca-bundle +kmod-usb-net-rtl8152-vendor kmod-r8125 kmod-r8126 kmod-r8168 kmod-8139cp kmod-8139too kmod-tg3 htop lm-sensors autocore-x86 automount autosamba ca-bundle $(eval $(call BuildTarget)) diff --git a/target/linux/x86/config-5.10 b/target/linux/x86/config-5.10 index c77903aa1..6aec019ad 100644 --- a/target/linux/x86/config-5.10 +++ b/target/linux/x86/config-5.10 @@ -83,7 +83,6 @@ CONFIG_CPU_FREQ_GOV_PERFORMANCE=y CONFIG_CPU_FREQ_STAT=y CONFIG_CPU_IBPB_ENTRY=y CONFIG_CPU_IBRS_ENTRY=y -# CONFIG_SLS is not set CONFIG_CPU_IDLE=y CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_RMAP=y @@ -101,8 +100,8 @@ CONFIG_CRC16=y CONFIG_CRYPTO_CRC32=y CONFIG_CRYPTO_CRC32C=y # CONFIG_CRYPTO_CRC32_PCLMUL is not set -CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_GF128MUL=y +CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1 CONFIG_CRYPTO_NULL2=y CONFIG_CRYPTO_RNG2=y @@ -435,6 +434,7 @@ CONFIG_SERIO_I8042=y CONFIG_SERIO_LIBPS2=y CONFIG_SERIO_SERPORT=y CONFIG_SG_POOL=y +# CONFIG_SLS is not set CONFIG_SMP=y # CONFIG_SMSC37B787_WDT is not set # CONFIG_SMSC_SCH311X_WDT is not set diff --git a/target/linux/x86/config-5.15 b/target/linux/x86/config-5.15 index fd864b0ee..102da2f64 100644 --- a/target/linux/x86/config-5.15 +++ b/target/linux/x86/config-5.15 @@ -364,8 +364,8 @@ CONFIG_POWER_SUPPLY=y CONFIG_PROC_PAGE_MONITOR=y CONFIG_PROC_PID_ARCH_STATUS=y # CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set -CONFIG_PTP_1588_CLOCK_OPTIONAL=y CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y # CONFIG_PUNIT_ATOM_DEBUG is not set # CONFIG_QCOM_QMI_HELPERS is not set CONFIG_RATIONAL=y diff --git a/target/linux/x86/config-5.4 b/target/linux/x86/config-5.4 index 01367cc53..e0fef1002 100644 --- a/target/linux/x86/config-5.4 +++ b/target/linux/x86/config-5.4 @@ -80,8 +80,8 @@ CONFIG_CPU_FREQ_GOV_PERFORMANCE=y # CONFIG_CPU_FREQ_GOV_USERSPACE is not set CONFIG_CPU_FREQ_STAT=y CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_LADDER=y # CONFIG_CPU_IDLE_GOV_HALTPOLL is not set +CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_SUP_AMD=y CONFIG_CPU_SUP_CENTAUR=y CONFIG_CPU_SUP_CYRIX_32=y @@ -179,8 +179,8 @@ CONFIG_GENERIC_VDSO_32=y # CONFIG_GEOS is not set CONFIG_GLOB=y # CONFIG_HABANA_AI is not set -# CONFIG_HANGCHECK_TIMER is not set # CONFIG_HALTPOLL_CPUIDLE is not set +# CONFIG_HANGCHECK_TIMER is not set CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT_MAP=y diff --git a/target/linux/x86/config-6.1 b/target/linux/x86/config-6.1 index 89852a8d4..9cfbb38e2 100644 --- a/target/linux/x86/config-6.1 +++ b/target/linux/x86/config-6.1 @@ -203,8 +203,6 @@ CONFIG_HWMON=y CONFIG_HW_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIA=y -# CONFIG_HYPERVISOR_GUEST is not set -CONFIG_HZ_PERIODIC=y CONFIG_HYPERV=y CONFIG_HYPERVISOR_GUEST=y CONFIG_HYPERV_BALLOON=y @@ -214,9 +212,8 @@ CONFIG_HYPERV_STORAGE=y # CONFIG_HYPERV_TESTING is not set CONFIG_HYPERV_TIMER=y CONFIG_HYPERV_UTILS=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_PTP_1588_CLOCK=y # CONFIG_HYPERV_VSOCKETS is not set +CONFIG_HZ_PERIODIC=y CONFIG_I2C=y CONFIG_I2C_ALGOBIT=y # CONFIG_I2C_AMD_MP2 is not set @@ -403,6 +400,8 @@ CONFIG_PREEMPT_RCU=y CONFIG_PROC_PAGE_MONITOR=y CONFIG_PROC_PID_ARCH_STATUS=y # CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y # CONFIG_PUNIT_ATOM_DEBUG is not set CONFIG_RANDOMIZE_KSTACK_OFFSET=y CONFIG_RANDSTRUCT_NONE=y diff --git a/target/linux/x86/config-6.6 b/target/linux/x86/config-6.6 index 89852a8d4..6b8876e8b 100644 --- a/target/linux/x86/config-6.6 +++ b/target/linux/x86/config-6.6 @@ -203,8 +203,6 @@ CONFIG_HWMON=y CONFIG_HW_CONSOLE=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_VIA=y -# CONFIG_HYPERVISOR_GUEST is not set -CONFIG_HZ_PERIODIC=y CONFIG_HYPERV=y CONFIG_HYPERVISOR_GUEST=y CONFIG_HYPERV_BALLOON=y @@ -214,9 +212,8 @@ CONFIG_HYPERV_STORAGE=y # CONFIG_HYPERV_TESTING is not set CONFIG_HYPERV_TIMER=y CONFIG_HYPERV_UTILS=y -CONFIG_PTP_1588_CLOCK_OPTIONAL=y -CONFIG_PTP_1588_CLOCK=y # CONFIG_HYPERV_VSOCKETS is not set +CONFIG_HZ_PERIODIC=y CONFIG_I2C=y CONFIG_I2C_ALGOBIT=y # CONFIG_I2C_AMD_MP2 is not set @@ -320,9 +317,12 @@ CONFIG_NEED_PER_CPU_KM=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_NEED_SG_DMA_LENGTH=y # CONFIG_NET5501 is not set +CONFIG_NET_EGRESS=y +CONFIG_NET_INGRESS=y # CONFIG_NET_NS is not set CONFIG_NET_VENDOR_DAVICOM=y CONFIG_NET_VENDOR_FUNGIBLE=y +CONFIG_NET_XGRESS=y CONFIG_NLS=y # CONFIG_NOHIGHMEM is not set CONFIG_NR_CPUS=1 @@ -340,6 +340,7 @@ CONFIG_PAGE_OFFSET=0xC0000000 CONFIG_PAGE_POOL=y CONFIG_PAGE_SIZE_LESS_THAN_256KB=y CONFIG_PAGE_SIZE_LESS_THAN_64KB=y +CONFIG_PAHOLE_HAS_LANG_EXCLUDE=y CONFIG_PAHOLE_VERSION=0 CONFIG_PC104=y # CONFIG_PC8736x_GPIO is not set @@ -403,6 +404,8 @@ CONFIG_PREEMPT_RCU=y CONFIG_PROC_PAGE_MONITOR=y CONFIG_PROC_PID_ARCH_STATUS=y # CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set +CONFIG_PTP_1588_CLOCK=y +CONFIG_PTP_1588_CLOCK_OPTIONAL=y # CONFIG_PUNIT_ATOM_DEBUG is not set CONFIG_RANDOMIZE_KSTACK_OFFSET=y CONFIG_RANDSTRUCT_NONE=y @@ -444,6 +447,9 @@ CONFIG_SG_POOL=y # CONFIG_SMSC_SCH311X_WDT is not set CONFIG_SPARSEMEM_STATIC=y CONFIG_SPARSE_IRQ=y +# CONFIG_SPECTRE_BHI_AUTO is not set +# CONFIG_SPECTRE_BHI_OFF is not set +CONFIG_SPECTRE_BHI_ON=y CONFIG_SPECULATION_MITIGATIONS=y CONFIG_SRCU=y # CONFIG_STATIC_CALL_SELFTEST is not set diff --git a/target/linux/x86/generic/config-6.6 b/target/linux/x86/generic/config-6.6 index e46fc01ee..5b2ca91dd 100644 --- a/target/linux/x86/generic/config-6.6 +++ b/target/linux/x86/generic/config-6.6 @@ -136,6 +136,7 @@ CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_IMAGEBLIT=y CONFIG_FB_CMDLINE=y CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_DEVICE=y CONFIG_FB_EFI=y CONFIG_FB_HYPERV=y # CONFIG_FB_I810 is not set diff --git a/target/linux/x86/legacy/config-6.6 b/target/linux/x86/legacy/config-6.6 index f159d79c4..cd324aaf4 100644 --- a/target/linux/x86/legacy/config-6.6 +++ b/target/linux/x86/legacy/config-6.6 @@ -98,6 +98,7 @@ CONFIG_FB_CFB_FILLRECT=y CONFIG_FB_CFB_IMAGEBLIT=y CONFIG_FB_CMDLINE=y CONFIG_FB_DEFERRED_IO=y +CONFIG_FB_DEVICE=y # CONFIG_FB_I810 is not set CONFIG_FB_SYS_COPYAREA=y CONFIG_FB_SYS_FILLRECT=y diff --git a/target/linux/x86/patches-5.15/998-add-a-sysctl-to-enable-disable-tcp_collapse-logic.patch b/target/linux/x86/patches-5.15/998-add-a-sysctl-to-enable-disable-tcp_collapse-logic.patch index 5ca127c49..d46e27b47 100644 --- a/target/linux/x86/patches-5.15/998-add-a-sysctl-to-enable-disable-tcp_collapse-logic.patch +++ b/target/linux/x86/patches-5.15/998-add-a-sysctl-to-enable-disable-tcp_collapse-logic.patch @@ -140,7 +140,7 @@ and performance for all other cases. * and hopefully then we'll have sufficient space. --- a/net/ipv4/tcp_ipv4.c +++ b/net/ipv4/tcp_ipv4.c -@@ -3211,6 +3211,8 @@ static int __net_init tcp_sk_init(struct +@@ -3226,6 +3226,8 @@ static int __net_init tcp_sk_init(struct else net->ipv4.tcp_congestion_control = &tcp_reno; diff --git a/target/linux/x86/patches-6.1/998-add-a-sysctl-to-enable-disable-tcp_collapse-logic.patch b/target/linux/x86/patches-6.1/998-add-a-sysctl-to-enable-disable-tcp_collapse-logic.patch index 562a61b45..df453d5ef 100644 --- a/target/linux/x86/patches-6.1/998-add-a-sysctl-to-enable-disable-tcp_collapse-logic.patch +++ b/target/linux/x86/patches-6.1/998-add-a-sysctl-to-enable-disable-tcp_collapse-logic.patch @@ -140,7 +140,7 @@ and performance for all other cases. * and hopefully then we'll have sufficient space. --- a/net/ipv4/tcp_ipv4.c +++ b/net/ipv4/tcp_ipv4.c -@@ -3225,6 +3225,8 @@ static int __net_init tcp_sk_init(struct +@@ -3240,6 +3240,8 @@ static int __net_init tcp_sk_init(struct net->ipv4.sysctl_tcp_shrink_window = 0; diff --git a/toolchain/gcc/Config.version b/toolchain/gcc/Config.version index 8670f49b4..9ffe34066 100644 --- a/toolchain/gcc/Config.version +++ b/toolchain/gcc/Config.version @@ -16,5 +16,5 @@ config GCC_VERSION string default "8.4.0" if GCC_VERSION_8 default "12.2.0" if GCC_VERSION_12 - default "13.2.0" if GCC_VERSION_13 + default "13.3.0" if GCC_VERSION_13 default "11.3.0" diff --git a/toolchain/gcc/common.mk b/toolchain/gcc/common.mk index a87cf8cca..55be62280 100644 --- a/toolchain/gcc/common.mk +++ b/toolchain/gcc/common.mk @@ -41,8 +41,8 @@ ifeq ($(PKG_VERSION),12.2.0) PKG_HASH:=e549cf9cf3594a00e27b6589d4322d70e0720cdd213f39beb4181e06926230ff endif -ifeq ($(PKG_VERSION),13.2.0) - PKG_HASH:=e275e76442a6067341a27f04c5c6b83d8613144004c0413528863dc6b5c743da +ifeq ($(PKG_VERSION),13.3.0) + PKG_HASH:=0845e9621c9543a13f484e94584a49ffc0129970e9914624235fc1d061a0c083 endif PATCH_DIR=../patches-$(GCC_MAJOR_VERSION).x diff --git a/toolchain/gcc/patches-13.x/300-mips_Os_cpu_rtx_cost_model.patch b/toolchain/gcc/patches-13.x/300-mips_Os_cpu_rtx_cost_model.patch index ce21e0433..2ca42ad77 100644 --- a/toolchain/gcc/patches-13.x/300-mips_Os_cpu_rtx_cost_model.patch +++ b/toolchain/gcc/patches-13.x/300-mips_Os_cpu_rtx_cost_model.patch @@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau --- a/gcc/config/mips/mips.cc +++ b/gcc/config/mips/mips.cc -@@ -20213,7 +20213,7 @@ mips_option_override (void) +@@ -20219,7 +20219,7 @@ mips_option_override (void) flag_pcc_struct_return = 0; /* Decide which rtx_costs structure to use. */ diff --git a/toolchain/gcc/patches-13.x/970-macos_arm64-building-fix.patch b/toolchain/gcc/patches-13.x/970-macos_arm64-building-fix.patch index 7844268e7..a0470b139 100644 --- a/toolchain/gcc/patches-13.x/970-macos_arm64-building-fix.patch +++ b/toolchain/gcc/patches-13.x/970-macos_arm64-building-fix.patch @@ -17,7 +17,7 @@ Date: Mon Aug 16 13:16:21 2021 +0100 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h -@@ -1185,7 +1185,7 @@ extern enum aarch64_code_model aarch64_c +@@ -1195,7 +1195,7 @@ extern enum aarch64_code_model aarch64_c /* Extra specs when building a native AArch64-hosted compiler. Option rewriting rules based on host system. */ diff --git a/toolchain/musl/patches/610-add-renameat2-linux-syscall-wrapper.patch b/toolchain/musl/patches/610-add-renameat2-linux-syscall-wrapper.patch new file mode 100644 index 000000000..167769360 --- /dev/null +++ b/toolchain/musl/patches/610-add-renameat2-linux-syscall-wrapper.patch @@ -0,0 +1,61 @@ +From dc651fe2e6b16087c519c0bd0bf943cb7c53c807 Mon Sep 17 00:00:00 2001 +In-Reply-To: <20240423234355.2414567-1-Tony.Ambardar@gmail.com> +References: <20240423234355.2414567-1-Tony.Ambardar@gmail.com> +From: Tony Ambardar +Date: Sat, 20 Apr 2024 21:30:13 -0700 +Subject: [PATCH v3] add renameat2 linux syscall wrapper +To: musl@lists.openwall.com +Cc: Rich Felker + +This syscall is available since Linux 3.15 and also implemented in glibc +from version 2.28. It is commonly used in filesystem or security contexts. + +Constants RENAME_NOREPLACE, RENAME_EXCHANGE, RENAME_WHITEOUT are guarded by +_GNU_SOURCE as with glibc. + +Signed-off-by: Tony Ambardar +--- +v2 -> v3: + * call SYS_renameat first if applicable + * drop unneeded error code handling + +v1 -> v2: + * align related constants + * drop 'int' from 'unsigned int' + * add fallback to SYS_renameat where applicable +--- + include/stdio.h | 7 +++++++ + src/linux/renameat2.c | 11 +++++++++++ + 2 files changed, 18 insertions(+) + create mode 100644 src/linux/renameat2.c + +--- a/include/stdio.h ++++ b/include/stdio.h +@@ -158,6 +158,13 @@ char *ctermid(char *); + #define L_ctermid 20 + #endif + ++#if defined(_GNU_SOURCE) ++#define RENAME_NOREPLACE (1 << 0) ++#define RENAME_EXCHANGE (1 << 1) ++#define RENAME_WHITEOUT (1 << 2) ++ ++int renameat2(int, const char *, int, const char *, unsigned); ++#endif + + #if defined(_XOPEN_SOURCE) || defined(_GNU_SOURCE) \ + || defined(_BSD_SOURCE) +--- /dev/null ++++ b/src/linux/renameat2.c +@@ -0,0 +1,11 @@ ++#define _GNU_SOURCE ++#include ++#include "syscall.h" ++ ++int renameat2(int oldfd, const char *old, int newfd, const char *new, unsigned flags) ++{ ++#ifdef SYS_renameat ++ if (!flags) return syscall(SYS_renameat, oldfd, old, newfd, new); ++#endif ++ return syscall(SYS_renameat2, oldfd, old, newfd, new, flags); ++} diff --git a/tools/autoconf-archive/patches/001-fix_ax_c_float_words_bigendian.patch b/tools/autoconf-archive/patches/001-fix_ax_c_float_words_bigendian.patch new file mode 100644 index 000000000..521cb9786 --- /dev/null +++ b/tools/autoconf-archive/patches/001-fix_ax_c_float_words_bigendian.patch @@ -0,0 +1,90 @@ +--- a/m4/ax_c_float_words_bigendian.m4 ++++ b/m4/ax_c_float_words_bigendian.m4 +@@ -27,32 +27,81 @@ + # If neither value is found, the user is instructed to specify the + # ordering. + # ++# Early versions of this macro (i.e., before serial 12) would not work ++# when interprocedural optimization (via link-time optimization) was ++# enabled. This would happen when, say, the GCC/clang "-flto" flag, or the ++# ICC "-ipo" flag was used, for example. The problem was that under these ++# conditions, the compiler did not allocate for and write the special ++# float value in the data segment of the object file, since doing so might ++# not prove optimal once more context was available. Thus, the special ++# value (in platform-dependent binary form) could not be found in the ++# object file, and the macro would fail. ++# ++# The solution to the above problem was to: ++# ++# 1) Compile and link a whole test program rather than just compile an ++# object file. This ensures that we reach the point where even an ++# interprocedural optimizing compiler writes values to the data segment. ++# ++# 2) Add code that requires the compiler to write the special value to ++# the data segment, as opposed to "optimizing away" the variable's ++# allocation. This could be done via compiler keywords or options, but ++# it's tricky to make this work for all versions of all compilers with ++# all optimization settings. The chosen solution was to make the exit ++# code of the test program depend on the storing of the special value ++# in memory (in the data segment). Because the exit code can be ++# verified, any compiler that aspires to be correct will produce a ++# program binary that contains the value, which the macro can then find. ++# ++# How does the exit code depend on the special value residing in memory? ++# Memory, unlike variables and registers, can be addressed indirectly at ++# run time. The exit code of this test program is a result of indirectly ++# reading and writing to the memory region where the special value is ++# supposed to reside. The actual memory addresses used and the values to ++# be written are derived from the the program input ("argv") and are ++# therefore not known at compile or link time. The compiler has no choice ++# but to defer the computation to run time, and to prepare by allocating ++# and populating the data segment with the special value. For further ++# details, refer to the source code of the test program. ++# ++# Note that the test program is never meant to be run. It only exists to ++# host a double float value in a given platform's binary format. Thus, ++# error handling is not included. ++# + # LICENSE + # +-# Copyright (c) 2008 Daniel Amelang ++# Copyright (c) 2008, 2023 Daniel Amelang + # + # Copying and distribution of this file, with or without modification, are + # permitted in any medium without royalty provided the copyright notice + # and this notice are preserved. This file is offered as-is, without any + # warranty. + +-#serial 11 ++#serial 13 + + AC_DEFUN([AX_C_FLOAT_WORDS_BIGENDIAN], + [AC_CACHE_CHECK(whether float word ordering is bigendian, + ax_cv_c_float_words_bigendian, [ + + ax_cv_c_float_words_bigendian=unknown +-AC_COMPILE_IFELSE([AC_LANG_SOURCE([[ ++AC_LINK_IFELSE([AC_LANG_SOURCE([[ ++ ++#include ++ ++static double m[] = {9.090423496703681e+223, 0.0}; + +-double d = 90904234967036810337470478905505011476211692735615632014797120844053488865816695273723469097858056257517020191247487429516932130503560650002327564517570778480236724525140520121371739201496540132640109977779420565776568942592.0; ++int main (int argc, char *argv[]) ++{ ++ m[atoi (argv[1])] += atof (argv[2]); ++ return m[atoi (argv[3])] > 0.0; ++} + + ]])], [ + +-if grep noonsees conftest.$ac_objext >/dev/null ; then ++if grep noonsees conftest$EXEEXT >/dev/null ; then + ax_cv_c_float_words_bigendian=yes + fi +-if grep seesnoon conftest.$ac_objext >/dev/null ; then ++if grep seesnoon conftest$EXEEXT >/dev/null ; then + if test "$ax_cv_c_float_words_bigendian" = unknown; then + ax_cv_c_float_words_bigendian=no + else diff --git a/tools/automake/Makefile b/tools/automake/Makefile index 85ccc0ded..7f129c1d8 100644 --- a/tools/automake/Makefile +++ b/tools/automake/Makefile @@ -8,16 +8,16 @@ include $(TOPDIR)/rules.mk PKG_NAME:=automake PKG_CPE_ID:=cpe:/a:gnu:automake -PKG_VERSION:=1.15.1 +PKG_VERSION:=1.16.5 +PKG_API_VERSION:=$(word 2,$(subst ., ,$(PKG_VERSION))) -PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz +PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=@GNU/automake -PKG_HASH:=af6ba39142220687c500f79b4aa2f181d9b24e4f8d8ec497cea4ba26c64bedaf +PKG_HASH:=07bd24ad08a64bc17250ce09ec56e921d6343903943e99ccf63bbf0705e34605 include $(INCLUDE_DIR)/host-build.mk HOST_CONFIGURE_ARGS += \ - --datarootdir=$(STAGING_DIR_HOST)/share \ --disable-silent-rules HOST_CONFIGURE_VARS += \ @@ -31,20 +31,23 @@ endef define Host/Install # remove old automake resources to avoid version conflicts - rm -rf $(STAGING_DIR_HOST)/share/aclocal-[0-9]* - rm -rf $(STAGING_DIR_HOST)/share/automake-[0-9]* - $(MAKE) -C $(HOST_BUILD_DIR) install + $(call Host/Uninstall) + $(call Host/Compile/Default,install) mv $(STAGING_DIR_HOST)/bin/aclocal $(STAGING_DIR_HOST)/bin/aclocal.real $(INSTALL_BIN) ./files/aclocal $(STAGING_DIR_HOST)/bin - ln -sf aclocal $(STAGING_DIR_HOST)/bin/aclocal-1.9 - ln -sf aclocal $(STAGING_DIR_HOST)/bin/aclocal-1.10 - ln -sf aclocal $(STAGING_DIR_HOST)/bin/aclocal-1.11 - ln -sf aclocal $(STAGING_DIR_HOST)/bin/aclocal-1.11.6 - ln -sf aclocal $(STAGING_DIR_HOST)/bin/aclocal-1.15 + ( \ + api=$(PKG_API_VERSION); \ + while [ "$$$$api" -ge 11 ]; do \ + ln -sf aclocal "$(STAGING_DIR_HOST)/bin/aclocal-1.$$$$api"; \ + api=$$$$(($$$$api - 1)); \ + done; \ + ) endef define Host/Uninstall -$(call Host/Compile/Default,uninstall) + rm -rf $(STAGING_DIR_HOST)/share/aclocal-[0-9]* + rm -rf $(STAGING_DIR_HOST)/share/automake-[0-9]* endef $(eval $(call HostBuild)) diff --git a/tools/automake/patches/000-relocatable.patch b/tools/automake/patches/000-relocatable.patch index 02382ba8c..0b61eaeb4 100644 --- a/tools/automake/patches/000-relocatable.patch +++ b/tools/automake/patches/000-relocatable.patch @@ -1,44 +1,34 @@ --- a/lib/Automake/Config.in +++ b/lib/Automake/Config.in -@@ -32,7 +32,7 @@ our $PACKAGE = '@PACKAGE@'; +@@ -34,7 +34,7 @@ our $PACKAGE = '@PACKAGE@'; our $PACKAGE_BUGREPORT = '@PACKAGE_BUGREPORT@'; our $VERSION = '@VERSION@'; our $RELEASE_YEAR = '@RELEASE_YEAR@'; --our $libdir = '@datadir@/@PACKAGE@-@APIVERSION@'; +-our $libdir = $ENV{"AUTOMAKE_LIBDIR"} || '@datadir@/@PACKAGE@-@APIVERSION@'; +our $libdir = $ENV{'STAGING_DIR_HOST'} ? $ENV{'STAGING_DIR_HOST'} . '/share/@PACKAGE@-@APIVERSION@' : '@datadir@/@PACKAGE@-@APIVERSION@'; our $perl_threads = 0; # We need at least this version for CLONE support. --- a/bin/aclocal.in +++ b/bin/aclocal.in -@@ -1,10 +1,12 @@ --#!@PERL@ -w -+#!@PERL@ - # -*- perl -*- - # @configure_input@ - - eval 'case $# in 0) exec @PERL@ -S "$0";; *) exec @PERL@ -S "$0" "$@";; esac' - if 0; +@@ -23,9 +23,11 @@ use 5.006; + use strict; + use warnings FATAL => 'all'; +$^W = 1; + - # aclocal - create aclocal.m4 by scanning configure.ac - - # Copyright (C) 1996-2017 Free Software Foundation, Inc. -@@ -27,7 +29,7 @@ eval 'case $# in 0) exec @PERL@ -S "$0"; - BEGIN { -- @Aclocal::perl_libdirs = ('@datadir@/@PACKAGE@-@APIVERSION@') -+ @Aclocal::perl_libdirs = ($ENV{'STAGING_DIR_HOST'} ? $ENV{'STAGING_DIR_HOST'} . '/share/@PACKAGE@-@APIVERSION@' : '@datadir@/@PACKAGE@-@APIVERSION@') - unless @Aclocal::perl_libdirs; - unshift @INC, @Aclocal::perl_libdirs; +- unshift (@INC, '@datadir@/@PACKAGE@-@APIVERSION@') ++ unshift (@INC, ($ENV{'STAGING_DIR_HOST'} ? $ENV{'STAGING_DIR_HOST'} . '/share/@PACKAGE@-@APIVERSION@' : '@datadir@/@PACKAGE@-@APIVERSION@')) + unless $ENV{AUTOMAKE_UNINSTALLED}; } -@@ -69,8 +71,8 @@ $perl_threads = 0; + +@@ -65,8 +67,8 @@ $perl_threads = 0; # ACLOCAL_PATH environment variable, and reset with the '--system-acdir' # option. my @user_includes = (); --my @automake_includes = ("@datadir@/aclocal-$APIVERSION"); +-my @automake_includes = ('@datadir@/aclocal-' . $APIVERSION); -my @system_includes = ('@datadir@/aclocal'); +my @automake_includes = ($ENV{'STAGING_DIR_HOST'} ? $ENV{'STAGING_DIR_HOST'} . "/share/aclocal-$APIVERSION" : "@datadir@/aclocal-$APIVERSION"); +my @system_includes = ($ENV{'STAGING_DIR_HOST'} ? $ENV{'STAGING_DIR_HOST'} . '/share/aclocal' : '@datadir@/aclocal'); @@ -47,50 +37,16 @@ my $install = 0; --- a/bin/automake.in +++ b/bin/automake.in -@@ -1,10 +1,12 @@ --#!@PERL@ -w -+#!@PERL@ - # -*- perl -*- - # @configure_input@ - - eval 'case $# in 0) exec @PERL@ -S "$0";; *) exec @PERL@ -S "$0" "$@";; esac' - if 0; +@@ -26,9 +26,11 @@ use 5.006; + use strict; + use warnings FATAL => 'all'; +$^W = 1; + - # automake - create Makefile.in from Makefile.am - # Copyright (C) 1994-2017 Free Software Foundation, Inc. - -@@ -31,7 +33,7 @@ use strict; - BEGIN { -- @Automake::perl_libdirs = ('@datadir@/@PACKAGE@-@APIVERSION@') -+ @Automake::perl_libdirs = ($ENV{'STAGING_DIR_HOST'} ? $ENV{'STAGING_DIR_HOST'} . '/share/@PACKAGE@-@APIVERSION@' : '@datadir@/@PACKAGE@-@APIVERSION@') - unless @Automake::perl_libdirs; - unshift @INC, @Automake::perl_libdirs; +- unshift (@INC, '@datadir@/@PACKAGE@-@APIVERSION@') ++ unshift (@INC, ($ENV{'STAGING_DIR_HOST'} ? $ENV{'STAGING_DIR_HOST'} . '/share/@PACKAGE@-@APIVERSION@' : '@datadir@/@PACKAGE@-@APIVERSION@')) + unless $ENV{AUTOMAKE_UNINSTALLED}; ---- a/t/wrap/aclocal.in -+++ b/t/wrap/aclocal.in -@@ -1,6 +1,8 @@ --#!@PERL@ -w -+#!@PERL@ - # @configure_input@ - -+$^W = 1; -+ - # Copyright (C) 2012-2017 Free Software Foundation, Inc. - - # This program is free software; you can redistribute it and/or modify ---- a/t/wrap/automake.in -+++ b/t/wrap/automake.in -@@ -1,6 +1,8 @@ --#!@PERL@ -w -+#!@PERL@ - # @configure_input@ - -+$^W = 1; -+ - # Copyright (C) 2012-2017 Free Software Foundation, Inc. - - # This program is free software; you can redistribute it and/or modify + # Override SHELL. This is required on DJGPP so that system() uses diff --git a/tools/automake/patches/100-aclocal-skip-not-existing-directories.patch b/tools/automake/patches/100-aclocal-skip-not-existing-directories.patch index ad019ddd1..a0d04e21e 100644 --- a/tools/automake/patches/100-aclocal-skip-not-existing-directories.patch +++ b/tools/automake/patches/100-aclocal-skip-not-existing-directories.patch @@ -1,6 +1,6 @@ --- a/bin/aclocal.in +++ b/bin/aclocal.in -@@ -356,6 +356,12 @@ sub scan_m4_dirs ($$@) +@@ -371,6 +371,12 @@ sub scan_m4_dirs ($$@) foreach my $m4dir (@dirlist) { diff --git a/tools/automake/patches/101-do-not-require-files.patch b/tools/automake/patches/101-do-not-require-files.patch new file mode 100644 index 000000000..3a8c9fcb4 --- /dev/null +++ b/tools/automake/patches/101-do-not-require-files.patch @@ -0,0 +1,29 @@ +--- a/bin/automake.in ++++ b/bin/automake.in +@@ -4513,7 +4513,7 @@ sub handle_gettext () + && grep ($_ eq 'intl', @subdirs)); + } + +- require_file ($ac_gettext_location, GNU, 'ABOUT-NLS'); ++ require_file ($ac_gettext_location, GNITS, 'ABOUT-NLS'); + } + + # Emit makefile footer. +@@ -5641,7 +5641,7 @@ sub check_gnu_standards () + # otherwise require non-.md. + my $required + = (! -f $file && -f "$file.md") ? "$file.md" : $file; +- require_file ("$am_file.am", GNU, $required); ++ require_file ("$am_file.am", GNITS, $required); + } + + # Accept one of these three licenses; default to COPYING. +@@ -5655,7 +5655,7 @@ sub check_gnu_standards () + last; + } + } +- require_file ("$am_file.am", GNU, 'COPYING') ++ require_file ("$am_file.am", GNITS, 'COPYING') + unless $license; + } + diff --git a/tools/automake/patches/200-other-V-values-for-verbosity.patch b/tools/automake/patches/200-other-V-values-for-verbosity.patch new file mode 100644 index 000000000..1ea9d38b0 --- /dev/null +++ b/tools/automake/patches/200-other-V-values-for-verbosity.patch @@ -0,0 +1,59 @@ +From: Bogdan Drozdowski +Date: Sat, 31 Dec 2022 20:17:35 +0100 +Subject: [PATCH] Allow other V values for verbosity + +--- + m4/silent.m4 | 2 +- + t/silent-gen.sh | 24 ++++++++++++++++++++++++ + 2 files changed, 25 insertions(+), 1 deletion(-) + +--- a/m4/silent.m4 ++++ b/m4/silent.m4 +@@ -43,7 +43,7 @@ else + fi]) + if test $am_cv_make_support_nested_variables = yes; then + dnl Using '$V' instead of '$(V)' breaks IRIX make. +- AM_V='$(V)' ++ AM_V='$(shell if ( test "x$(V)" = "x0" ); then echo 0; elif ( test "x$(V)" = "x" ); then echo $(AM_DEFAULT_VERBOSITY); else echo 1; fi)' + AM_DEFAULT_V='$(AM_DEFAULT_VERBOSITY)' + else + AM_V=$AM_DEFAULT_VERBOSITY +--- a/t/silent-gen.sh ++++ b/t/silent-gen.sh +@@ -54,6 +54,18 @@ grep 'cp ' stdout + grep 'echo ' stdout + + $MAKE clean ++run_make -O V=99 ++grep 'GEN ' stdout && exit 1 ++grep 'cp ' stdout ++grep 'echo ' stdout ++ ++$MAKE clean ++run_make -O V=vvv ++grep 'GEN ' stdout && exit 1 ++grep 'cp ' stdout ++grep 'echo ' stdout ++ ++$MAKE clean + run_make -O V=0 + grep 'GEN .*foo' stdout + grep 'cp ' stdout && exit 1 +@@ -78,5 +90,17 @@ run_make -O V=1 + grep 'GEN ' stdout && exit 1 + grep 'cp ' stdout + grep 'echo ' stdout ++ ++$MAKE clean ++run_make -O V=99 ++grep 'GEN ' stdout && exit 1 ++grep 'cp ' stdout ++grep 'echo ' stdout ++ ++$MAKE clean ++run_make -O V=v ++grep 'GEN ' stdout && exit 1 ++grep 'cp ' stdout ++grep 'echo ' stdout + + : diff --git a/tools/b43-tools/Makefile b/tools/b43-tools/Makefile index bae498c78..19918efde 100644 --- a/tools/b43-tools/Makefile +++ b/tools/b43-tools/Makefile @@ -23,7 +23,7 @@ define Host/Compile $(HOST_MAKE_FLAGS) \ $(1) QUIET_SPARSE=: +$(MAKE) $(HOST_JOBS) -C $(HOST_BUILD_DIR)/assembler \ - CFLAGS="$(HOST_CFLAGS) -include endian.h" \ + CFLAGS="$(HOST_CFLAGS) -include endian.h -Wno-error=int-conversion" \ $(HOST_MAKE_FLAGS) \ LDFLAGS= \ $(1) QUIET_SPARSE=: diff --git a/tools/coreutils/Makefile b/tools/coreutils/Makefile index c64210c5a..f799e83c5 100644 --- a/tools/coreutils/Makefile +++ b/tools/coreutils/Makefile @@ -8,11 +8,11 @@ include $(TOPDIR)/rules.mk PKG_NAME:=coreutils PKG_CPE_ID:=cpe:/a:gnu:coreutils -PKG_VERSION:=8.32 +PKG_VERSION:=9.3 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=@GNU/coreutils -PKG_HASH:=4458d8de7849df44ccab15e16b1548b285224dbba5f08fac070c1c0e0bcc4cfa +PKG_HASH:=adbcfcfe899235b71e8768dcf07cd532520b7f54f9a8064843f8d199a904bbaa HOST_BUILD_PARALLEL := 1 diff --git a/tools/cpio/Makefile b/tools/cpio/Makefile index 82b5aa836..bd6e25898 100644 --- a/tools/cpio/Makefile +++ b/tools/cpio/Makefile @@ -3,11 +3,11 @@ include $(TOPDIR)/rules.mk PKG_NAME:=cpio PKG_CPE_ID:=cpe:/a:gnu:cpio -PKG_VERSION:=2.13 +PKG_VERSION:=2.15 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 PKG_SOURCE_URL:=@GNU/cpio -PKG_HASH:=eab5bdc5ae1df285c59f2a4f140a98fc33678a0bf61bdba67d9436ae26b46f6d +PKG_HASH:=937610b97c329a1ec9268553fb780037bcfff0dcffe9725ebc4fd9c1aa9075db include $(INCLUDE_DIR)/host-build.mk diff --git a/tools/cpio/patches/001-duplicate-program-name.patch b/tools/cpio/patches/001-duplicate-program-name.patch deleted file mode 100644 index a7c3fbc8a..000000000 --- a/tools/cpio/patches/001-duplicate-program-name.patch +++ /dev/null @@ -1,18 +0,0 @@ -author Sergey Poznyakoff - -https://git.savannah.gnu.org/cgit/cpio.git/commit/?id=641d3f489cf6238bb916368d4ba0d9325a235afb - -* src/global.c: Remove superfluous declaration of program_name - ---- a/src/global.c -+++ b/src/global.c -@@ -184,9 +184,6 @@ unsigned int warn_option = 0; - /* Extract to standard output? */ - bool to_stdout_option = false; - --/* The name this program was run with. */ --char *program_name; -- - /* A pointer to either lstat or stat, depending on whether - dereferencing of symlinks is done for input files. */ - int (*xstat) (); diff --git a/tools/cpio/patches/010-clang.patch b/tools/cpio/patches/010-clang.patch deleted file mode 100644 index 89c7a8149..000000000 --- a/tools/cpio/patches/010-clang.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/gnu/xalloc-oversized.h -+++ b/gnu/xalloc-oversized.h -@@ -52,7 +52,7 @@ typedef size_t __xalloc_count_type; - #elif ((5 <= __GNUC__ \ - || (__has_builtin (__builtin_mul_overflow) \ - && __has_builtin (__builtin_constant_p))) \ -- && !__STRICT_ANSI__) -+ && !__STRICT_ANSI__) && !defined(__clang__) - # define xalloc_oversized(n, s) \ - (__builtin_constant_p (n) && __builtin_constant_p (s) \ - ? __xalloc_oversized (n, s) \ diff --git a/tools/xz/Makefile b/tools/xz/Makefile index a90cec86b..9084cb08f 100644 --- a/tools/xz/Makefile +++ b/tools/xz/Makefile @@ -7,12 +7,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=xz -PKG_VERSION:=5.4.6 +PKG_VERSION:=5.4.1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 PKG_SOURCE_URL:=@SF/lzmautils \ http://tukaani.org/xz -PKG_HASH:=913851b274e8e1d31781ec949f1c23e8dbcf0ecf6e73a2436dc21769dd3e6f49 +PKG_HASH:=dd172acb53867a68012f94c17389401b2f274a1aa5ae8f84cbfb8b7e383ea8d3 PKG_CPE_ID:=cpe:/a:tukaani:xz HOST_BUILD_PARALLEL:=1

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