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Revert "ramips: mt7621 default overclock to 1000Mhz" (#6190)

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This reverts commit 5be81314bb08934fbe03c2e26191b80f021b0d2b. Many users
reported that this commit broken their router. The mips platform does not
support changing the operating frequency of cpu while system is running.
Obviously it is more appropriate to use breed to overclock.
This commit is contained in:
AmadeusGhost 2021-01-13 13:59:42 +08:00 committed by GitHub
parent d75c037bd9
commit f58a163622
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GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 1 additions and 10 deletions
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11
target/linux/ramips/patches-5.4/102-mt7621-fix-cpu-clk-add-clkdev.patch
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@ -65,7 +65,7 @@
#define MT7621_GPIO_MODE_UART1 1 #define MT7621_GPIO_MODE_UART1 1
#define MT7621_GPIO_MODE_I2C 2 #define MT7621_GPIO_MODE_I2C 2
#define MT7621_GPIO_MODE_UART3_MASK 0x3 #define MT7621_GPIO_MODE_UART3_MASK 0x3
@@ -111,49 +111,98 @@ static struct rt2880_pmx_group mt7621_pi @@ -111,49 +111,89 @@ static struct rt2880_pmx_group mt7621_pi
{ 0 } { 0 }
}; };
@ -154,15 +154,6 @@
- cpu_clk = 20 * fbdiv * 1000 * 1000; - cpu_clk = 20 * fbdiv * 1000 * 1000;
- } - }
+ pll = rt_memc_r32(MEMC_REG_CPU_PLL); + pll = rt_memc_r32(MEMC_REG_CPU_PLL);
+ if ((pll & 0x7f0) == 0x2b0) {
+ volatile u32 i;
+
+ pr_info("CPU Clock: 880MHz, start overclocking\n");
+ pll &= ~0x7ff;
+ pll |= 0x312;
+ rt_memc_w32(pll, MEMC_REG_CPU_PLL);
+ for (i = 0; i < 1000; i++);
+ }
+ fbdiv = (pll >> CPU_PLL_FBDIV_SHIFT) & CPU_PLL_FBDIV_MASK; + fbdiv = (pll >> CPU_PLL_FBDIV_SHIFT) & CPU_PLL_FBDIV_MASK;
+ prediv = (pll >> CPU_PLL_PREDIV_SHIFT) & CPU_PLL_PREDIV_MASK; + prediv = (pll >> CPU_PLL_PREDIV_SHIFT) & CPU_PLL_PREDIV_MASK;
+ cpu_clk = ((fbdiv + 1) * xtal_clk) >> prediv_tbl[prediv]; + cpu_clk = ((fbdiv + 1) * xtal_clk) >> prediv_tbl[prediv];