1457fa8e97
This commit add support for the TP-LINK TL-WDR8500 v1 SOC: Qualcomm QCA9563 775MHz RAM: 128MB M14D1G1664A-2.5B DDR2 FLASH: 8MB Winbond 25Q64FVSIG WLAN1: QCA9563 2.4GHz 802.11b/g/n 3x3 WLAN2: QCA9984 5GHz 802.11 n/ac 4x4 Ethernet: 5 x 1000Mbps (1wan, 4lan) Installation via breed: Flash into breed-qca956x-uart_rx18_tx22-reset1.bin, and then edit the environment variables: Field: autoboot.command Value: boot mem 0x9f020200 From https://www.right.com.cn/forum/thread-328619-1-1.html Signed-off-by: AmadeusGhost <42570690+AmadeusGhost@users.noreply.github.com>
149 lines
3.8 KiB
C
149 lines
3.8 KiB
C
/*
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* TP-LINK TL-WDR8500_V1 board support
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*
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* Copyright (C) 2018 mht
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*/
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/proc_fs.h>
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#include <linux/spi/spi_gpio.h>
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#include <linux/spi/74x164.h>
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#include <linux/ath9k_platform.h>
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#include <linux/ar8216_platform.h>
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#include <asm/mach-ath79/ath79.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include <asm/mach-ath79/irq.h>
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#include "common.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-m25p80.h"
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#include "dev-spi.h"
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#include "dev-wmac.h"
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#include "machtypes.h"
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#include "pci.h"
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#define TL_WDR8500_V1_GPIO_BTN_RESET 1
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#define TL_WDR8500_V1_GPIO_BTN_TURBO 2
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// tx = 18 / rx = 22
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#define TL_WDR8500_V1_GPIO_LED_TURBO 5
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#define TL_WDR8500_V1_GPIO_LED_SYS 21
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#define TL_WDR8500_V1_KEYS_POLL_INTERVAL 20 /* msecs */
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#define TL_WDR8500_V1_KEYS_DEBOUNCE_INTERVAL (3 * TL_WDR8500_V1_KEYS_POLL_INTERVAL)
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#define TL_WDR8500_V1_WMAC_CALDATA_OFFSET 0x1000
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#define TL_WDR8500_V1_GPIO_MDC 3
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#define TL_WDR8500_V1_GPIO_MDIO 4
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// u-boot 128K
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static const char *tl_wdr8500_v1_part_probes[] = {
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"tp-link",
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NULL,
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};
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static struct flash_platform_data tl_wdr8500_v1_flash_data = {
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.part_probes = tl_wdr8500_v1_part_probes,
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};
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static struct gpio_led tl_wdr8500_v1_leds_gpio[] __initdata = {
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{
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.name = "tp-link:blue:system",
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.gpio = TL_WDR8500_V1_GPIO_LED_SYS,
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.active_low = 1,
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}, {
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.name = "tp-link:green:turbo",
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.gpio = TL_WDR8500_V1_GPIO_LED_TURBO,
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.active_low = 1,
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},
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};
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static struct gpio_keys_button tl_wdr8500_v1_gpio_keys[] __initdata = {
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{
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.desc = "RFKill button",
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.type = EV_KEY,
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.code = KEY_RFKILL,
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.debounce_interval = TL_WDR8500_V1_KEYS_DEBOUNCE_INTERVAL,
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.gpio = TL_WDR8500_V1_GPIO_BTN_TURBO,
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.active_low = 1,
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},
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{
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.desc = "Reset button",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = TL_WDR8500_V1_KEYS_DEBOUNCE_INTERVAL,
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.gpio = TL_WDR8500_V1_GPIO_BTN_RESET,
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.active_low = 1,
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},
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};
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static struct ar8327_pad_cfg TL_WDR8500_v1_ar8337_pad0_cfg = {
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.mode = AR8327_PAD_MAC_SGMII,
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.sgmii_delay_en = true,
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};
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static struct ar8327_platform_data TL_WDR8500_v1_ar8337_data = {
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.pad0_cfg = &TL_WDR8500_v1_ar8337_pad0_cfg,
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.port0_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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};
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static struct mdio_board_info TL_WDR8500_v1_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 0,
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.platform_data = &TL_WDR8500_v1_ar8337_data,
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},
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};
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static void __init TL_WDR8500_v1_setup(void)
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{
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u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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ath79_register_m25p80(&tl_wdr8500_v1_flash_data);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(tl_wdr8500_v1_leds_gpio),
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tl_wdr8500_v1_leds_gpio);
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ath79_register_gpio_keys_polled(-1, TL_WDR8500_V1_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(tl_wdr8500_v1_gpio_keys),
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tl_wdr8500_v1_gpio_keys);
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platform_device_register(&ath79_mdio0_device);
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ath79_register_mdio(1, 0x0);
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mdiobus_register_board_info(TL_WDR8500_v1_mdio0_info,
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ARRAY_SIZE(TL_WDR8500_v1_mdio0_info));
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ath79_register_wmac(art + TL_WDR8500_V1_WMAC_CALDATA_OFFSET, mac);
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ath79_register_pci();
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/* GMAC0 is connected to an AR8337 switch */
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ath79_init_mac(ath79_eth0_data.mac_addr, mac, -1);
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
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ath79_eth0_data.speed = SPEED_1000;
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ath79_eth0_data.duplex = DUPLEX_FULL;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_register_eth(0);
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}
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MIPS_MACHINE(ATH79_MACH_TL_WDR8500_V1, "TL-WDR8500-v1", "TP-LINK TL-WDR8500 v1",
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TL_WDR8500_v1_setup);
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