54 lines
1.9 KiB
Diff
54 lines
1.9 KiB
Diff
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
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index 1905ce9..a4a3ef2 100644
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--- a/arch/x86/kernel/cpu/intel.c
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+++ b/arch/x86/kernel/cpu/intel.c
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@@ -164,6 +164,7 @@
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static void early_init_intel(struct cpuinfo_x86 *c)
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{
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u64 misc_enable;
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+ bool allow_fast_string = true;
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/* Unmask CPUID levels if masked: */
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if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) {
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@@ -259,17 +260,35 @@
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*
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* Enable PAT WC only on P4, Core 2 or later CPUs.
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*/
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- if (c->x86 == 6 && c->x86_model < 15)
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+ if (c->x86 == 6 && c->x86_model < 15) {
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+ allow_fast_string = false;
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clear_cpu_cap(c, X86_FEATURE_PAT);
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-
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+ }
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/*
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- * If fast string is not enabled in IA32_MISC_ENABLE for any reason,
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- * clear the fast string and enhanced fast string CPU capabilities.
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+ * If BIOS didn't enable fast string operation, try to enable
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+ * it ourselves. If that fails, then clear the fast string
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+ * and enhanced fast string CPU capabilities.
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*/
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if (c->x86 > 6 || (c->x86 == 6 && c->x86_model >= 0xd)) {
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rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
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+
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+ if (allow_fast_string &&
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+ !(misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING)) {
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+ misc_enable |= MSR_IA32_MISC_ENABLE_FAST_STRING;
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+ wrmsrl_safe(MSR_IA32_MISC_ENABLE, misc_enable);
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+
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+ /* Re-read to make sure it stuck. */
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+ rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable);
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+
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+ if (misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING)
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+ printk_once(KERN_INFO "BIOS disabled fast string operation, re-enabled sucessfully.\n");
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+ }
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+
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if (!(misc_enable & MSR_IA32_MISC_ENABLE_FAST_STRING)) {
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- pr_info("Disabled fast string operations\n");
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+ if (allow_fast_string)
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+ printk_once(KERN_INFO FW_WARN "BIOS disabled fast string operation, re-enable failed.\n");
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+ else
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+ printk_once(KERN_INFO "Disabled fast string operations\n");
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setup_clear_cpu_cap(X86_FEATURE_REP_GOOD);
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setup_clear_cpu_cap(X86_FEATURE_ERMS);
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}
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