86bc29e4a8
[mac80211] ca5ee6e mac80211: Fix potential endless loop 2c14710 mac80211: add more AQL fixes/improvements 91fb3ce mac80211: remove an obsolete patch that is no longer doing anything useful acf1733 mac80211: add preliminary support for enabling 802.11ax in config d717343 mac80211: update encap offload patches to the latest version 673062f mac80211: allow bigger A-MSDU sizes in VHT, even if HT is limited caf7277 mac80211: do not allow bigger VHT MPDUs than the hardware supports cd36c0d mac80211: select the first available channel for 5GHz interfaces 1c6d456 mac80211: fix regression in station connection monitor optimization 4bd7689 mac80211: update sta connection monitor regression fix [target] Sync: at91, ath25, ath79, lantiq, mediatek, mvebu.
68 lines
2.3 KiB
Diff
68 lines
2.3 KiB
Diff
From: Felix Fietkau <nbd@nbd.name>
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Date: Thu, 27 Aug 2020 06:32:03 +0200
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Subject: [PATCH] net: ethernet: mtk_eth_soc: cache hardware pointer of last
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freed tx descriptor
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The value is only updated by the CPU, so it is cheaper to access from the ring
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data structure than from a hardware register
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Signed-off-by: Felix Fietkau <nbd@nbd.name>
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---
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
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@@ -1358,7 +1358,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
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struct mtk_tx_buf *tx_buf;
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u32 cpu, dma;
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- cpu = mtk_r32(eth, MTK_QTX_CRX_PTR);
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+ cpu = ring->last_free_ptr;
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dma = mtk_r32(eth, MTK_QTX_DRX_PTR);
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desc = mtk_qdma_phys_to_virt(ring, cpu);
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@@ -1392,6 +1392,7 @@ static int mtk_poll_tx_qdma(struct mtk_e
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cpu = next_cpu;
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}
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+ ring->last_free_ptr = cpu;
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mtk_w32(eth, cpu, MTK_QTX_CRX_PTR);
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return budget;
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@@ -1592,6 +1593,7 @@ static int mtk_tx_alloc(struct mtk_eth *
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atomic_set(&ring->free_count, MTK_DMA_SIZE - 2);
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ring->next_free = &ring->dma[0];
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ring->last_free = &ring->dma[MTK_DMA_SIZE - 1];
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+ ring->last_free_ptr = (u32)(ring->phys + ((MTK_DMA_SIZE - 1) * sz));
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ring->thresh = MAX_SKB_FRAGS;
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/* make sure that all changes to the dma ring are flushed before we
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@@ -1605,9 +1607,7 @@ static int mtk_tx_alloc(struct mtk_eth *
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mtk_w32(eth,
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ring->phys + ((MTK_DMA_SIZE - 1) * sz),
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MTK_QTX_CRX_PTR);
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- mtk_w32(eth,
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- ring->phys + ((MTK_DMA_SIZE - 1) * sz),
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- MTK_QTX_DRX_PTR);
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+ mtk_w32(eth, ring->last_free_ptr, MTK_QTX_DRX_PTR);
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mtk_w32(eth, (QDMA_RES_THRES << 8) | QDMA_RES_THRES,
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MTK_QTX_CFG(0));
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} else {
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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@@ -624,6 +624,7 @@ struct mtk_tx_buf {
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* @phys: The physical addr of tx_buf
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* @next_free: Pointer to the next free descriptor
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* @last_free: Pointer to the last free descriptor
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+ * @last_free_ptr: Hardware pointer value of the last free descriptor
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* @thresh: The threshold of minimum amount of free descriptors
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* @free_count: QDMA uses a linked list. Track how many free descriptors
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* are present
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@@ -634,6 +635,7 @@ struct mtk_tx_ring {
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dma_addr_t phys;
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struct mtk_tx_dma *next_free;
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struct mtk_tx_dma *last_free;
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+ u32 last_free_ptr;
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u16 thresh;
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atomic_t free_count;
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int dma_size;
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