eb73efcd3f
Deleted (upstreamed): bcm27xx/patches-5.10/950-0669-drm-vc4-hdmi-Make-sure-the-device-is-powered-with-CE.patch [1] bcm27xx/patches-5.10/950-0672-drm-vc4-hdmi-Move-initial-register-read-after-pm_run.patch [1] gemini/patches-5.10/0003-ARM-dts-gemini-NAS4220-B-fis-index-block-with-128-Ki.patch [2] Manually rebased: bcm27xx/patches-5.10/950-0675-drm-vc4-hdmi-Drop-devm-interrupt-handler-for-CEC-int.patch [1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.94&id=55b10b88ac8654fc2f31518aa349a2e643b37f18 [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.94&id=958a8819d41420d7a74ed922a09cacc0ba3a4218 Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com> Co-authored-by: Rui Salvaterra <rsalvaterra@gmail.com>
31 lines
1.1 KiB
Diff
31 lines
1.1 KiB
Diff
From 4950d441d18161b2432965ba3fc99382beafdf02 Mon Sep 17 00:00:00 2001
|
|
From: Maxime Ripard <maxime@cerno.tech>
|
|
Date: Thu, 8 Oct 2020 16:08:06 +0200
|
|
Subject: [PATCH] drm/vc4: hdmi: Raise the maximum clock rate
|
|
|
|
Now that we have the infrastructure in place, we can raise the maximum
|
|
pixel rate we can reach for HDMI0 on the BCM2711.
|
|
|
|
HDMI1 is left untouched since its pixelvalve has a smaller FIFO and
|
|
would need a clock faster than what we can provide to support the same
|
|
modes.
|
|
|
|
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
|
|
Reviewed-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
|
|
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
|
|
---
|
|
drivers/gpu/drm/vc4/vc4_hdmi.c | 2 +-
|
|
1 file changed, 1 insertion(+), 1 deletion(-)
|
|
|
|
--- a/drivers/gpu/drm/vc4/vc4_hdmi.c
|
|
+++ b/drivers/gpu/drm/vc4/vc4_hdmi.c
|
|
@@ -2440,7 +2440,7 @@ static const struct vc4_hdmi_variant bcm
|
|
.encoder_type = VC4_ENCODER_TYPE_HDMI0,
|
|
.debugfs_name = "hdmi0_regs",
|
|
.card_name = "vc4-hdmi-0",
|
|
- .max_pixel_clock = 297000000,
|
|
+ .max_pixel_clock = 600000000,
|
|
.registers = vc5_hdmi_hdmi0_fields,
|
|
.num_registers = ARRAY_SIZE(vc5_hdmi_hdmi0_fields),
|
|
.phy_lane_mapping = {
|