diff --git a/target/linux/generic/backport-5.4/494-mtd-spinand-add-support-foresee.patch b/target/linux/generic/backport-5.4/494-mtd-spinand-add-support-foresee.patch new file mode 100644 index 0000000000..fb23ae9995 --- /dev/null +++ b/target/linux/generic/backport-5.4/494-mtd-spinand-add-support-foresee.patch @@ -0,0 +1,183 @@ +Index: linux-5.4.255/drivers/mtd/nand/spi/Makefile +=================================================================== +--- linux-5.4.255.orig/drivers/mtd/nand/spi/Makefile ++++ linux-5.4.255/drivers/mtd/nand/spi/Makefile +@@ -1,3 +1,3 @@ + # SPDX-License-Identifier: GPL-2.0 +-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o etron.o esmt.o ++spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o foresee.o etron.o esmt.o + obj-$(CONFIG_MTD_SPI_NAND) += spinand.o +Index: linux-5.4.255/drivers/mtd/nand/spi/core.c +=================================================================== +--- linux-5.4.255.orig/drivers/mtd/nand/spi/core.c ++++ linux-5.4.255/drivers/mtd/nand/spi/core.c +@@ -761,6 +761,7 @@ static const struct spinand_manufacturer + ¶gon_spinand_manufacturer, + &toshiba_spinand_manufacturer, + &winbond_spinand_manufacturer, ++ &foresee_spinand_manufacturer, + &esmt_c8_spinand_manufacturer, + }; + +Index: linux-5.4.255/drivers/mtd/nand/spi/foresee.c +=================================================================== +--- /dev/null ++++ linux-5.4.255/drivers/mtd/nand/spi/foresee.c +@@ -0,0 +1,145 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2020 Grandstream Networks, Inc ++ * ++ * Authors: ++ * Carl ++ */ ++ ++#include ++#include ++#include ++ ++#define SPINAND_MFR_FORESEE 0xCD ++ ++static SPINAND_OP_VARIANTS(read_cache_variants, ++ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(write_cache_variants, ++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), ++ SPINAND_PROG_LOAD(true, 0, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(update_cache_variants, ++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), ++ SPINAND_PROG_LOAD(true, 0, NULL, 0)); ++ ++static int fsxxndxxg_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ return -ERANGE; ++} ++ ++static int fsxxndxxg_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 2; ++ region->length = mtd->oobsize - 2; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops fsxxndxxg_ooblayout = { ++ .ecc = fsxxndxxg_ooblayout_ecc, ++ .free = fsxxndxxg_ooblayout_free, ++}; ++ ++static const struct spinand_info foresee_spinand_table[] = { ++ SPINAND_INFO("FS35ND01G-S1Y2", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEA), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)), ++ SPINAND_INFO("FS35ND02G-S3Y2", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEB), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)), ++ SPINAND_INFO("FS35ND04G-S2Y2", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEC), ++ NAND_MEMORG(1, 2048, 64, 64, 4096, 80, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)), ++ SPINAND_INFO("F35SQA001G", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x71), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)), ++ SPINAND_INFO("F35SQA002G", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x72), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)), ++ SPINAND_INFO("F35SQA512M", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x70), ++ NAND_MEMORG(1, 2048, 64, 64, 512, 20, 1, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)), ++ SPINAND_INFO("F35UQA512M", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x60), ++ NAND_MEMORG(1, 2048, 64, 64, 512, 20, 1, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)), ++ SPINAND_INFO("F35UQA002G-WWT", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x62), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)), ++ SPINAND_INFO("F35UQA001G-WWT", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x61), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&fsxxndxxg_ooblayout, NULL)), ++}; ++ ++static const struct spinand_manufacturer_ops foresee_spinand_manuf_ops = { ++}; ++ ++const struct spinand_manufacturer foresee_spinand_manufacturer = { ++ .id = SPINAND_MFR_FORESEE, ++ .name = "foresee", ++ .chips = foresee_spinand_table, ++ .nchips = ARRAY_SIZE(foresee_spinand_table), ++ .ops = &foresee_spinand_manuf_ops, ++}; +Index: linux-5.4.255/include/linux/mtd/spinand.h +=================================================================== +--- linux-5.4.255.orig/include/linux/mtd/spinand.h ++++ linux-5.4.255/include/linux/mtd/spinand.h +@@ -245,6 +245,7 @@ extern const struct spinand_manufacturer + extern const struct spinand_manufacturer paragon_spinand_manufacturer; + extern const struct spinand_manufacturer toshiba_spinand_manufacturer; + extern const struct spinand_manufacturer winbond_spinand_manufacturer; ++extern const struct spinand_manufacturer foresee_spinand_manufacturer; + extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer; + + /** diff --git a/target/linux/generic/backport-5.4/495-mtd-spinand-Add-support-fmsh.patch b/target/linux/generic/backport-5.4/495-mtd-spinand-Add-support-fmsh.patch new file mode 100644 index 0000000000..934015c68b --- /dev/null +++ b/target/linux/generic/backport-5.4/495-mtd-spinand-Add-support-fmsh.patch @@ -0,0 +1,199 @@ +Index: a/drivers/mtd/nand/spi/Makefile +=================================================================== +--- a/drivers/mtd/nand/spi/Makefile ++++ b/drivers/mtd/nand/spi/Makefile +@@ -1,3 +1,3 @@ + # SPDX-License-Identifier: GPL-2.0 +-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o foresee.o etron.o esmt.o ++spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o foresee.o etron.o esmt.o fmsh.o + obj-$(CONFIG_MTD_SPI_NAND) += spinand.o +Index: a/drivers/mtd/nand/spi/core.c +=================================================================== +--- a/drivers/mtd/nand/spi/core.c ++++ b/drivers/mtd/nand/spi/core.c +@@ -763,6 +763,7 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = { + &winbond_spinand_manufacturer, + &foresee_spinand_manufacturer, + &esmt_c8_spinand_manufacturer, ++ &fmsh_spinand_manufacturer, + }; + + static int spinand_manufacturer_match(struct spinand_device *spinand, +--- /dev/null ++++ b/drivers/mtd/nand/spi/fmsh.c +@@ -0,0 +1,166 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2020-2021 Rockchip Electronics Co., Ltd ++ * ++ * Authors: ++ * Dingqiang Lin ++ */ ++ ++#include ++#include ++#include ++ ++#define SPINAND_MFR_FMSH 0xA1 ++ ++static SPINAND_OP_VARIANTS(read_cache_variants, ++ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(write_cache_variants, ++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), ++ SPINAND_PROG_LOAD(true, 0, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(update_cache_variants, ++ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), ++ SPINAND_PROG_LOAD(false, 0, NULL, 0)); ++ ++static int fm25s01a_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ return -ERANGE; ++} ++ ++static int fm25s01a_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 2; ++ region->length = 62; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops fm25s01a_ooblayout = { ++ .ecc = fm25s01a_ooblayout_ecc, ++ .free = fm25s01a_ooblayout_free, ++}; ++ ++static int fm25s01_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 64; ++ region->length = 64; ++ ++ return 0; ++} ++ ++static int fm25s01_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 2; ++ region->length = 62; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops fm25s01_ooblayout = { ++ .ecc = fm25s01_ooblayout_ecc, ++ .free = fm25s01_ooblayout_free, ++}; ++ ++/* ++ * ecc bits: 0xC0[4,6] ++ * [0b000], No bit errors were detected; ++ * [0b001] and [0b011], 1~6 Bit errors were detected and corrected. Not ++ * reach Flipping Bits; ++ * [0b101], Bit error count equals the bit flip ++ * detection threshold ++ * [0b010], Multiple bit errors were detected and ++ * not corrected. ++ * others, Reserved. ++ */ ++static int fm25s01bi3_ecc_ecc_get_status(struct spinand_device *spinand, ++ u8 status) ++{ ++ struct nand_device *nand = spinand_to_nand(spinand); ++ u8 eccsr = (status & GENMASK(6, 4)) >> 4; ++ ++ if (eccsr <= 1 || eccsr == 3) ++ return eccsr; ++ else if (eccsr == 5) ++ return nand->eccreq.strength; ++ else ++ return -EBADMSG; ++} ++ ++static const struct spinand_info fmsh_spinand_table[] = { ++ SPINAND_INFO("FM25S01A", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)), ++ SPINAND_INFO("FM25S02A", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE5), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&fm25s01a_ooblayout, NULL)), ++ SPINAND_INFO("FM25S01", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)), ++ SPINAND_INFO("FM25LS01", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA5), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(1, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&fm25s01_ooblayout, NULL)), ++ SPINAND_INFO("FM25S01BI3", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&fm25s01_ooblayout, fm25s01bi3_ecc_ecc_get_status)), ++}; ++ ++static const struct spinand_manufacturer_ops fmsh_spinand_manuf_ops = { ++}; ++ ++const struct spinand_manufacturer fmsh_spinand_manufacturer = { ++ .id = SPINAND_MFR_FMSH, ++ .name = "FMSH", ++ .chips = fmsh_spinand_table, ++ .nchips = ARRAY_SIZE(fmsh_spinand_table), ++ .ops = &fmsh_spinand_manuf_ops, ++}; ++ +Index: a/include/linux/mtd/spinand.h +=================================================================== +--- a/include/linux/mtd/spinand.h ++++ b/include/linux/mtd/spinand.h +@@ -247,6 +247,7 @@ extern const struct spinand_manufacturer toshiba_spinand_manufacturer; + extern const struct spinand_manufacturer winbond_spinand_manufacturer; + extern const struct spinand_manufacturer foresee_spinand_manufacturer; + extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer; ++extern const struct spinand_manufacturer fmsh_spinand_manufacturer; diff --git a/target/linux/generic/backport-5.4/496-mtd-spinand-Add-support-dosilicon.patch b/target/linux/generic/backport-5.4/496-mtd-spinand-Add-support-dosilicon.patch new file mode 100644 index 0000000000..239c15c0df --- /dev/null +++ b/target/linux/generic/backport-5.4/496-mtd-spinand-Add-support-dosilicon.patch @@ -0,0 +1,273 @@ +Index: a/drivers/mtd/nand/spi/Makefile +=================================================================== +--- a/drivers/mtd/nand/spi/Makefile ++++ b/drivers/mtd/nand/spi/Makefile +@@ -1,3 +1,3 @@ + # SPDX-License-Identifier: GPL-2.0 +-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o foresee.o etron.o esmt.o fmsh.o ++spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o foresee.o etron.o esmt.o fmsh.o dosilicon.o + obj-$(CONFIG_MTD_SPI_NAND) += spinand.o +Index: a/drivers/mtd/nand/spi/core.c +=================================================================== +--- a/drivers/mtd/nand/spi/core.c ++++ b/drivers/mtd/nand/spi/core.c +@@ -764,6 +764,7 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = { + &foresee_spinand_manufacturer, + &esmt_c8_spinand_manufacturer, + &fmsh_spinand_manufacturer, ++ &dosilicon_spinand_manufacturer, + }; + + static int spinand_manufacturer_match(struct spinand_device *spinand, +--- /dev/null ++++ b/drivers/mtd/nand/spi/dosilicon.c +@@ -0,0 +1,240 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2020 Rockchip Electronics Co., Ltd ++ * ++ * Authors: ++ * Dingqiang Lin ++ */ ++ ++#include ++#include ++#include ++ ++#define SPINAND_MFR_DOSILICON 0xE5 ++ ++#define DOSICON_STATUS_ECC_MASK GENMASK(6, 4) ++#define DOSICON_STATUS_ECC_NO_BITFLIPS (0 << 4) ++#define DOSICON_STATUS_ECC_1TO3_BITFLIPS (1 << 4) ++#define DOSICON_STATUS_ECC_4TO6_BITFLIPS (3 << 4) ++#define DOSICON_STATUS_ECC_7TO8_BITFLIPS (5 << 4) ++ ++static SPINAND_OP_VARIANTS(read_cache_variants, ++ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(write_cache_variants, ++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), ++ SPINAND_PROG_LOAD(true, 0, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(update_cache_variants, ++ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), ++ SPINAND_PROG_LOAD(false, 0, NULL, 0)); ++ ++static int ds35xxga_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section > 3) ++ return -ERANGE; ++ ++ region->offset = (16 * section) + 8; ++ region->length = 8; ++ ++ return 0; ++} ++ ++static int ds35xxga_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section > 3) ++ return -ERANGE; ++ ++ region->offset = (16 * section) + 2; ++ region->length = 6; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops ds35xxga_ooblayout = { ++ .ecc = ds35xxga_ooblayout_ecc, ++ .free = ds35xxga_ooblayout_free, ++}; ++ ++static int ds35xxgb_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 64; ++ region->length = 64; ++ ++ return 0; ++} ++ ++static int ds35xxgb_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ /* Reserve 1 bytes for the BBM. */ ++ region->offset = 1; ++ region->length = 63; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops ds35xxgb_ooblayout = { ++ .ecc = ds35xxgb_ooblayout_ecc, ++ .free = ds35xxgb_ooblayout_free, ++}; ++ ++static int ds35xxgb_ecc_get_status(struct spinand_device *spinand, ++ u8 status) ++{ ++ switch (status & DOSICON_STATUS_ECC_MASK) { ++ case STATUS_ECC_NO_BITFLIPS: ++ return 0; ++ ++ case STATUS_ECC_UNCOR_ERROR: ++ return -EBADMSG; ++ ++ case DOSICON_STATUS_ECC_1TO3_BITFLIPS: ++ return 3; ++ ++ case DOSICON_STATUS_ECC_4TO6_BITFLIPS: ++ return 6; ++ ++ case DOSICON_STATUS_ECC_7TO8_BITFLIPS: ++ return 8; ++ ++ default: ++ break; ++ } ++ ++ return -EINVAL; ++} ++ ++static const struct spinand_info dosilicon_spinand_table[] = { ++ SPINAND_INFO("DS35X1GA", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x71), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)), ++ SPINAND_INFO("DS35Q2GA", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x72), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)), ++ SPINAND_INFO("DS35M1GA", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x21), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)), ++ SPINAND_INFO("DS35M2GA", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x22), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)), ++ SPINAND_INFO("DS35Q2GB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF2), ++ NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35M1GB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q1GB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF1), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q4GM", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF4), ++ NAND_MEMORG(1, 2048, 128, 64, 4096, 80, 2, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q12B", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF5), ++ NAND_MEMORG(1, 2048, 128, 64, 512, 10, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35M12B", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA5), ++ NAND_MEMORG(1, 2048, 128, 64, 512, 10, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ++ ds35xxgb_ecc_get_status)), ++ SPINAND_INFO("DS35Q1GD-IB", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x51), ++ NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), ++ NAND_ECCREQ(8, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ SPINAND_HAS_QE_BIT, ++ SPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)), ++}; ++ ++static const struct spinand_manufacturer_ops dosilicon_spinand_manuf_ops = { ++}; ++ ++const struct spinand_manufacturer dosilicon_spinand_manufacturer = { ++ .id = SPINAND_MFR_DOSILICON, ++ .name = "dosilicon", ++ .chips = dosilicon_spinand_table, ++ .nchips = ARRAY_SIZE(dosilicon_spinand_table), ++ .ops = &dosilicon_spinand_manuf_ops, ++}; ++ +Index: a/include/linux/mtd/spinand.h +=================================================================== +--- a/include/linux/mtd/spinand.h ++++ b/include/linux/mtd/spinand.h +@@ -248,6 +248,7 @@ extern const struct spinand_manufacturer winbond_spinand_manufacturer; + extern const struct spinand_manufacturer foresee_spinand_manufacturer; + extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer; + extern const struct spinand_manufacturer fmsh_spinand_manufacturer; ++extern const struct spinand_manufacturer dosilicon_spinand_manufacturer; diff --git a/target/linux/generic/backport-5.4/497-mtd-spinand-Add-support-gsto.patch b/target/linux/generic/backport-5.4/497-mtd-spinand-Add-support-gsto.patch new file mode 100644 index 0000000000..5d2e63d7d9 --- /dev/null +++ b/target/linux/generic/backport-5.4/497-mtd-spinand-Add-support-gsto.patch @@ -0,0 +1,124 @@ +Index: a/drivers/mtd/nand/spi/Makefile +=================================================================== +--- a/drivers/mtd/nand/spi/Makefile ++++ b/drivers/mtd/nand/spi/Makefile +@@ -1,3 +1,3 @@ + # SPDX-License-Identifier: GPL-2.0 +-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o foresee.o etron.o esmt.o fmsh.o dosilicon.o ++spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o foresee.o etron.o esmt.o fmsh.o dosilicon.o gsto.o + obj-$(CONFIG_MTD_SPI_NAND) += spinand.o +Index: a/drivers/mtd/nand/spi/core.c +=================================================================== +--- a/drivers/mtd/nand/spi/core.c ++++ b/drivers/mtd/nand/spi/core.c +@@ -765,6 +765,7 @@ static const struct spinand_manufacturer *spinand_manufacturers[] = { + &esmt_c8_spinand_manufacturer, + &fmsh_spinand_manufacturer, + &dosilicon_spinand_manufacturer, ++ &gsto_spinand_manufacturer, + }; + + static int spinand_manufacturer_match(struct spinand_device *spinand, +--- /dev/null ++++ b/drivers/mtd/nand/spi/gsto.c +@@ -0,0 +1,91 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (c) 2023 Rockchip Electronics Co., Ltd ++ * ++ * Authors: ++ * Dingqiang Lin ++ */ ++ ++#include ++#include ++#include ++ ++#define SPINAND_MFR_GSTO 0x52 ++ ++static SPINAND_OP_VARIANTS(read_cache_variants, ++ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), ++ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(write_cache_variants, ++ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), ++ SPINAND_PROG_LOAD(true, 0, NULL, 0)); ++ ++static SPINAND_OP_VARIANTS(update_cache_variants, ++ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0), ++ SPINAND_PROG_LOAD(false, 0, NULL, 0)); ++ ++static int gss0xgsak1_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 32; ++ region->length = 32; ++ ++ return 0; ++} ++ ++static int gss0xgsak1_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *region) ++{ ++ if (section) ++ return -ERANGE; ++ ++ region->offset = 2; ++ region->length = 30; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops gss0xgsak1_ooblayout = { ++ .ecc = gss0xgsak1_ooblayout_ecc, ++ .free = gss0xgsak1_ooblayout_free, ++}; ++ ++static const struct spinand_info gsto_spinand_table[] = { ++ SPINAND_INFO("GSS01GSAK1", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBA, 0x13), ++ NAND_MEMORG(1, 2048, 64, 64, 1024, 10, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&gss0xgsak1_ooblayout, NULL)), ++ SPINAND_INFO("GSS02GSAK1", ++ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBA, 0x23), ++ NAND_MEMORG(1, 2048, 64, 64, 2048, 20, 1, 1, 1), ++ NAND_ECCREQ(4, 512), ++ SPINAND_INFO_OP_VARIANTS(&read_cache_variants, ++ &write_cache_variants, ++ &update_cache_variants), ++ 0, ++ SPINAND_ECCINFO(&gss0xgsak1_ooblayout, NULL)), ++}; ++ ++static const struct spinand_manufacturer_ops gsto_spinand_manuf_ops = { ++}; ++ ++const struct spinand_manufacturer gsto_spinand_manufacturer = { ++ .id = SPINAND_MFR_GSTO, ++ .name = "GSTO", ++ .chips = gsto_spinand_table, ++ .nchips = ARRAY_SIZE(gsto_spinand_table), ++ .ops = &gsto_spinand_manuf_ops, ++}; ++ +Index: a/include/linux/mtd/spinand.h +=================================================================== +--- a/include/linux/mtd/spinand.h ++++ b/include/linux/mtd/spinand.h +@@ -249,6 +249,7 @@ extern const struct spinand_manufacturer foresee_spinand_manufacturer; + extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer; + extern const struct spinand_manufacturer fmsh_spinand_manufacturer; + extern const struct spinand_manufacturer dosilicon_spinand_manufacturer; ++extern const struct spinand_manufacturer gsto_spinand_manufacturer; diff --git a/target/linux/generic/backport-5.4/498-mtd-spinor-Add-support-BY25Q256FS.patch b/target/linux/generic/backport-5.4/498-mtd-spinor-Add-support-BY25Q256FS.patch new file mode 100644 index 0000000000..a40b75370c --- /dev/null +++ b/target/linux/generic/backport-5.4/498-mtd-spinor-Add-support-BY25Q256FS.patch @@ -0,0 +1,12 @@ +--- a/drivers/mtd/spi-nor/spi-nor.c ++++ b/drivers/mtd/spi-nor/spi-nor.c +@@ -2403,6 +2403,9 @@ static const struct flash_info spi_nor_i + SECT_4K | USE_FSR | SPI_NOR_OCTAL_READ | + SPI_NOR_4B_OPCODES) }, + ++ /* BOYA*/ ++ { "BY25Q256FS", INFO(0x684919, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | SPI_NOR_4B_OPCODES) }, ++ + /* PMC */ + { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) }, + { "pm25lv010", INFO(0, 0, 32 * 1024, 4, SECT_4K_PMC) },