Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@gmail.com>
This commit is contained in:
Tianling Shen 2024-03-09 13:53:56 +08:00
commit 01bf2bdda1
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
111 changed files with 1369 additions and 5153 deletions

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@ -144,7 +144,7 @@ config KERNEL_UBSAN_TRAP
config KERNEL_KASAN
bool "Compile the kernel with KASan: runtime memory debugger"
select KERNEL_SLUB_DEBUG
depends on (x86_64 || aarch64)
depends on (x86_64 || aarch64 || arm || powerpc || riscv64)
help
Enables kernel address sanitizer - runtime memory debugger,
designed to find out-of-bounds accesses and use-after-free bugs.

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@ -1,2 +1,2 @@
LINUX_VERSION-5.15 = .148
LINUX_KERNEL_HASH-5.15.148 = c48575c97fd9f4767cbe50a13b1b2b40ee42830aba3182fabd35a03259a6e5d8
LINUX_VERSION-5.15 = .150
LINUX_KERNEL_HASH-5.15.150 = ee05592b458e7fcdc515b43605883a10cc2f65f2e2b58d60af8a72b93467e4d4

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@ -55,7 +55,7 @@ QCN9074_BOARD_REV:=8e140c65f36137714b6d8934e09dcd73cb05c2f6
QCN9074_BOARD_FILE:=board-2.bin.$(QCN9074_BOARD_REV)
define Download/qcn9074-board
URL:=https://github.com/kvalo/ath11k-firmware/raw/master/QCN9074/hw1.0/
URL:=https://git.codelinaro.org/clo/ath-firmware/ath11k-firmware/-/raw/main/QCN9074/hw1.0/
URL_FILE:=board-2.bin
FILE:=$(QCN9074_BOARD_FILE)
HASH:=dbf0ca14aa1229eccd48f26f1026901b9718b143bd30b51b8ea67c84ba6207f1
@ -63,7 +63,7 @@ endef
$(eval $(call Download,qcn9074-board))
define Download/ath11k-firmware-old
URL:=https://github.com/kvalo/ath11k-firmware.git
URL:=https://git.codelinaro.org/clo/ath-firmware/ath11k-firmware.git
VERSION:=540105aa5c0903b5f773d4e80b8501e8da5217e7
PROTO:=git
FILE:=ath11k-firmware-old.tar.xz

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@ -8,12 +8,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=linux-firmware
PKG_VERSION:=20231211
PKG_RELEASE:=2
PKG_VERSION:=20240220
PKG_RELEASE:=1
PKG_SOURCE_URL:=@KERNEL/linux/kernel/firmware
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_HASH:=96af7e4b5eabd37869cdb3dcbb7ab36911106d39b76e799fa1caab16a9dbe8bb
PKG_HASH:=bf0f239dc0801e9d6bf5d5fb3e2f549575632cf4688f4348184199cb02c2bcd7
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>

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@ -935,8 +935,13 @@ endef
KernelPackage/crypto-sha1/imx=$(KernelPackage/crypto-sha1/arm-neon)
KernelPackage/crypto-sha1/ipq40xx=$(KernelPackage/crypto-sha1/arm-neon)
KernelPackage/crypto-sha1/mediatek/filogic=$(KernelPackage/crypto-sha1/aarch64-ce)
KernelPackage/crypto-sha1/mediatek/mt7622=$(KernelPackage/crypto-sha1/aarch64-ce)
KernelPackage/crypto-sha1/mvebu/cortexa9=$(KernelPackage/crypto-sha1/arm-neon)
KernelPackage/crypto-sha1/mvebu/cortexa53=$(KernelPackage/crypto-sha1/aarch64-ce)
KernelPackage/crypto-sha1/mvebu/cortexa72=$(KernelPackage/crypto-sha1/aarch64-ce)
KernelPackage/crypto-sha1/qualcommax=$(KernelPackage/crypto-sha1/aarch64-ce)
KernelPackage/crypto-sha1/rockchip/armv8=$(KernelPackage/crypto-sha1/aarch64-ce)
define KernelPackage/crypto-sha1/octeon
FILES+=$(LINUX_DIR)/arch/mips/cavium-octeon/crypto/octeon-sha1.ko
@ -1022,7 +1027,12 @@ define KernelPackage/crypto-sha256/x86_64
endef
endif
KernelPackage/crypto-sha256/mediatek/filogic=$(KernelPackage/crypto-sha256/aarch64-ce)
KernelPackage/crypto-sha256/mediatek/mt7622=$(KernelPackage/crypto-sha256/aarch64-ce)
KernelPackage/crypto-sha256/mvebu/cortexa53=$(KernelPackage/crypto-sha256/aarch64-ce)
KernelPackage/crypto-sha256/mvebu/cortexa72=$(KernelPackage/crypto-sha256/aarch64-ce)
KernelPackage/crypto-sha256/qualcommax=$(KernelPackage/crypto-sha256/aarch64-ce)
KernelPackage/crypto-sha256/rockchip/armv8=$(KernelPackage/crypto-sha256/aarch64-ce)
ifdef KernelPackage/crypto-sha256/$(ARCH)
KernelPackage/crypto-sha256/$(CRYPTO_TARGET)=\

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@ -65,12 +65,7 @@ config-$(call config_package,ath11k) += ATH11K
config-$(call config_package,ath11k-ahb) += ATH11K_AHB
config-$(call config_package,ath11k-pci) += ATH11K_PCI
config-$(call config_package,ath5k) += ATH5K
ifdef CONFIG_TARGET_ath25
config-y += ATH5K_AHB
else
config-y += ATH5K_PCI
endif
config-$(call config_package,ath5k) += ATH5K ATH5K_PCI
config-$(call config_package,ath6kl) += ATH6KL
config-$(call config_package,ath6kl-sdio) += ATH6KL_SDIO
@ -134,7 +129,7 @@ endef
define KernelPackage/ath
$(call KernelPackage/mac80211/Default)
TITLE:=Atheros common driver part
DEPENDS+= @PCI_SUPPORT||USB_SUPPORT||TARGET_ath79||TARGET_ath25 +kmod-mac80211
DEPENDS+= @PCI_SUPPORT||USB_SUPPORT||TARGET_ath79 +kmod-mac80211
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath.ko
MENU:=1
endef
@ -147,7 +142,7 @@ define KernelPackage/ath5k
$(call KernelPackage/mac80211/Default)
TITLE:=Atheros 5xxx wireless cards support
URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath5k
DEPENDS+= @(PCI_SUPPORT||TARGET_ath25) +kmod-ath
DEPENDS+= @PCI_SUPPORT +kmod-ath
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath5k/ath5k.ko
AUTOLOAD:=$(call AutoProbe,ath5k)
endef

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@ -95,12 +95,13 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
spin_lock_init(&local->active_txq_lock[i]);
--- a/net/mac80211/sta_info.c
+++ b/net/mac80211/sta_info.c
@@ -2341,28 +2341,27 @@ void ieee80211_sta_update_pending_airtim
@@ -2341,29 +2341,33 @@ void ieee80211_sta_update_pending_airtim
struct sta_info *sta, u8 ac,
u16 tx_airtime, bool tx_completed)
{
- int tx_pending;
+ int tx_pending = 0;
+ atomic_t *counter;
int tx_pending;
if (!wiphy_ext_feature_isset(local->hw.wiphy, NL80211_EXT_FEATURE_AQL))
return;
@ -113,9 +114,18 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+ counter = &sta->airtime[ac].aql_tx_pending;
+ else
+ counter = &local->aql_bc_pending_airtime;
+
+ if (!tx_completed)
+ atomic_add(tx_airtime, counter);
+ else
+ tx_pending = atomic_sub_return(tx_airtime, counter);
+ if (tx_pending < 0)
+ atomic_cmpxchg(counter, tx_pending, 0);
+
+ if (!sta)
+ return;
+ if (!tx_completed) {
+ atomic_add(tx_airtime, counter);
atomic_add(tx_airtime, &local->aql_total_pending_airtime);
atomic_add(tx_airtime, &local->aql_ac_pending_airtime[ac]);
return;
@ -128,12 +138,10 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
- atomic_cmpxchg(&sta->airtime[ac].aql_tx_pending,
- tx_pending, 0);
- }
+ tx_pending = atomic_sub_return(tx_airtime, counter);
+ if (tx_pending < 0)
+ atomic_cmpxchg(counter, tx_pending, 0);
-
atomic_sub(tx_airtime, &local->aql_total_pending_airtime);
tx_pending = atomic_sub_return(tx_airtime,
&local->aql_ac_pending_airtime[ac]);
--- a/net/mac80211/tx.c
+++ b/net/mac80211/tx.c
@@ -3958,9 +3958,8 @@ begin:

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@ -182,6 +182,13 @@ config MBEDTLS_SSL_TRUNCATED_HMAC
bool "MBEDTLS_SSL_TRUNCATED_HMAC"
default n
config MBEDTLS_THREADING_C
bool "MBEDTLS_THREADING_C"
default y
config MBEDTLS_THREADING_PTHREAD
def_bool MBEDTLS_THREADING_C
config MBEDTLS_VERSION_C
bool "MBEDTLS_VERSION_C"
default n

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@ -72,6 +72,8 @@ MBEDTLS_BUILD_OPTS= \
CONFIG_MBEDTLS_SELF_TEST \
CONFIG_MBEDTLS_SSL_RENEGOTIATION \
CONFIG_MBEDTLS_SSL_TRUNCATED_HMAC \
CONFIG_MBEDTLS_THREADING_C \
CONFIG_MBEDTLS_THREADING_PTHREAD \
CONFIG_MBEDTLS_VERSION_C \
CONFIG_MBEDTLS_VERSION_FEATURES
@ -96,7 +98,7 @@ $(call Package/mbedtls/Default)
CATEGORY:=Libraries
SUBMENU:=SSL
TITLE+= (library)
ABI_VERSION:=12
ABI_VERSION:=13
MENU:=1
endef

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@ -11,9 +11,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/iwinfo.git
PKG_SOURCE_DATE:=2023-11-19
PKG_SOURCE_VERSION:=a34977c0760c93480491c8eb94da656b57d7f4cc
PKG_MIRROR_HASH:=cb01671a2a9155f8ba55751ab1fe28488c5821212dd97ba5b79653640abb787e
PKG_SOURCE_DATE:=2024-03-08
PKG_SOURCE_VERSION:=8ffb8bfd1115ae95265aa52590aa948aba7672e4
PKG_MIRROR_HASH:=77bb6018b5001268c0f442dbfd8159893db620c575c9810221b1a42a30be4b5f
PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
PKG_LICENSE:=GPL-2.0

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@ -1,7 +1,7 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=ubox
PKG_RELEASE:=1
PKG_RELEASE:=2
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/ubox.git
@ -47,6 +47,7 @@ define Package/logd
DEPENDS:=+libubox +libubus +libblobmsg-json +libudebug
TITLE:=OpenWrt system log implementation
USERID:=logd=514:logd=514
ALTERNATIVES:=200:/sbin/logread:/usr/libexec/logread-ubox
endef
define Package/getrandom/install
@ -63,9 +64,10 @@ define Package/ubox/install
endef
define Package/logd/install
$(INSTALL_DIR) $(1)/sbin $(1)/etc/init.d/ $(1)/usr/share/acl.d
$(INSTALL_DIR) $(1)/sbin $(1)/usr/libexec/ $(1)/etc/init.d/ $(1)/usr/share/acl.d
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/{logd,logread} $(1)/sbin/
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/logd $(1)/sbin/
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/logread $(1)/usr/libexec/logread-ubox
$(INSTALL_BIN) ./files/log.init $(1)/etc/init.d/log
$(INSTALL_DATA) ./files/logd.json $(1)/usr/share/acl.d
endef

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@ -18,7 +18,7 @@ Signed-off-by: Stephen Boyd <sboyd@kernel.org>
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -3131,7 +3131,10 @@ static int clk_rate_get(void *data, u64
@@ -3142,7 +3142,10 @@ static int clk_rate_get(void *data, u64
{
struct clk_core *core = data;

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@ -1,23 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only
#
# Copyright (C) 2006-2013 OpenWrt.org
include $(TOPDIR)/rules.mk
ARCH:=mips
BOARD:=ath25
BOARDNAME:=Atheros AR231x/AR5312
FEATURES:=squashfs low_mem small_flash source-only
SUBTARGETS:=generic
KERNEL_PATCHVER:=5.15
define Target/Description
Build firmware images for Atheros SoC boards
endef
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += wpad-basic-openssl kmod-ath5k swconfig kmod-gpio-button-hotplug
$(eval $(call BuildTarget))

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@ -1,12 +0,0 @@
# Copyright 2012-2015 OpenWrt.org
#
. /lib/functions/uci-defaults.sh
board_config_update
ucidef_set_led_netdev "wlan" "wlan" "wlan" "wlan0"
board_config_flush
exit 0

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@ -1,27 +0,0 @@
. /lib/functions/uci-defaults.sh
board_config_update
if [ -e "/sys/bus/mdio_bus/drivers/IC+ IP175C/0:00" -o \
-e "/sys/bus/mdio_bus/drivers/IC+ IP17xx/0:00" ] && \
[ -x /sbin/swconfig ];
then
ucidef_add_switch "eth0" \
"0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "5@eth0"
elif [ -e "/sys/bus/mdio_bus/drivers/Infineon ADM6996/0:00" -o \
-e "/sys/bus/mdio_bus/drivers/Marvell 88E6060/0:10" ];
then
ucidef_set_interfaces_lan_wan "eth0.1" "eth0.2"
elif [ -d /sys/class/net/eth1 ]; then
ucidef_set_interfaces_lan_wan "eth0" "eth1"
else
ucidef_set_interface_lan "eth0"
fi
board_config_flush
exit 0

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@ -1,29 +0,0 @@
preinit_ip() {
if [ -z "$pi_ifname" ]; then
grep -q 'Atheros AR231[567]' /proc/cpuinfo && {
if [ -e "/sys/bus/mdio_bus/drivers/Infineon ADM6996/0:00" -o \
-e "/sys/bus/mdio_bus/drivers/Marvell 88E6060/0:10" ]; then
ip link set eth0 up
ip link add link eth0 name eth0.1 type vlan id 1
ifname=eth0.1
else
ifname=eth0
fi
pi_ifname=$ifname
}
fi
[ -n "$pi_ifname" ] && grep -q "$pi_ifname" /proc/net/dev && {
ip addr add $pi_ip/$pi_netmask broadcast $pi_broadcast dev $pi_ifname
ip link set $pi_ifname up
}
}
preinit_ip_deconfig() {
if [ -e "/sys/bus/mdio_bus/drivers/Infineon ADM6996/0:00" -o \
-e "/sys/bus/mdio_bus/drivers/Marvell 88E6060/0:10" ]; then
ip link del eth0.1 2>/dev/null
ip link set $pi_ifname down
elif [ -n "$pi_ifname" ]; then
ip -4 addr flush dev $pi_ifname
fi
}

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@ -1,76 +0,0 @@
CI_BLKSZ=65536
CI_LDADR=0x80041000
platform_find_partitions() {
local first dev size erasesize name
while read dev size erasesize name; do
name=${name#'"'}; name=${name%'"'}
case "$name" in
vmlinux.bin.l7|kernel|linux|rootfs)
if [ -z "$first" ]; then
first="$name"
else
echo "$erasesize:$first:$name"
break
fi
;;
esac
done < /proc/mtd
}
platform_find_kernelpart() {
local part
for part in "${1%:*}" "${1#*:}"; do
case "$part" in
vmlinux.bin.l7|kernel|linux)
echo "$part"
break
;;
esac
done
}
platform_check_image() {
[ "$#" -gt 1 ] && return 1
case "$(get_magic_word "$1")" in
# Combined Image
4349)
local md5_img=$(dd if="$1" bs=2 skip=9 count=16 2>/dev/null)
local md5_chk=$(dd if="$1" bs=$CI_BLKSZ skip=1 2>/dev/null | md5sum -); md5_chk="${md5_chk%% *}"
if [ -n "$md5_img" -a -n "$md5_chk" ] && [ "$md5_img" = "$md5_chk" ]; then
return 0
else
echo "Invalid image. Contents do not match checksum (image:$md5_img calculated:$md5_chk)"
return 1
fi
;;
*)
echo "Invalid image. Use combined .img files on this platform"
return 1
;;
esac
}
platform_do_upgrade() {
local partitions=$(platform_find_partitions)
local kernelpart=$(platform_find_kernelpart "${partitions#*:}")
local erase_size=$((0x${partitions%%:*})); partitions="${partitions#*:}"
local kern_length=0x$(dd if="$1" bs=2 skip=1 count=4 2>/dev/null)
local kern_blocks=$(($kern_length / $CI_BLKSZ))
local root_blocks=$((0x$(dd if="$1" bs=2 skip=5 count=4 2>/dev/null) / $CI_BLKSZ))
if [ -n "$partitions" ] && [ -n "$kernelpart" ] && \
[ ${kern_blocks:-0} -gt 0 ] && \
[ ${root_blocks:-0} -gt ${kern_blocks:-0} ] && \
[ ${erase_size:-0} -gt 0 ];
then
local append=""
[ -f "$UPGRADE_BACKUP" ] && append="-j $UPGRADE_BACKUP"
( dd if="$1" bs=$CI_BLKSZ skip=1 count=$kern_blocks 2>/dev/null; \
dd if="$1" bs=$CI_BLKSZ skip=$((1+$kern_blocks)) count=$root_blocks 2>/dev/null ) | \
mtd -r $append -F$kernelpart:$kern_length:$CI_LDADR,rootfs write - $partitions
fi
}

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@ -1,132 +0,0 @@
CONFIG_ADM6996_PHY=y
CONFIG_AR2315_WDT=y
CONFIG_AR8216_PHY=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ATH25=y
CONFIG_BLK_MQ_PCI=y
CONFIG_CEVT_R4K=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="console=ttyS0,9600 rootfstype=squashfs,jffs2"
CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
# CONFIG_COMMON_CLK is not set
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
CONFIG_CPU_MIPSR1=y
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
CONFIG_CRYPTO_RNG2=y
CONFIG_CSRC_R4K=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_ETHERNET_PACKET_MANGLE=y
CONFIG_FORCE_PCI=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_FIND_FIRST_BIT=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_LIB_ASHLDI3=y
CONFIG_GENERIC_LIB_ASHRDI3=y
CONFIG_GENERIC_LIB_CMPDI2=y
CONFIG_GENERIC_LIB_LSHRDI3=y
CONFIG_GENERIC_LIB_UCMPDI2=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIO_AR2315=y
CONFIG_GPIO_AR5312=y
CONFIG_GPIO_CDEV=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HW_RANDOM=y
CONFIG_HZ_PERIODIC=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IP17XX_PHY=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
CONFIG_LEDS_GPIO=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEMFD_CREATE=y
CONFIG_MIGRATION=y
CONFIG_MIPS=y
CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
CONFIG_MIPS_CLOCK_VSYSCALL=y
# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y
CONFIG_MIPS_EBPF_JIT=y
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_LD_CAN_LINK_VDSO=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_AR2315=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
# CONFIG_MTD_CFI_GEOMETRY is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_MYLOADER_PARTS=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-3
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MVSWITCH_PHY=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_AR231X=y
CONFIG_NET_SELFTESTS=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
# CONFIG_OF is not set
CONFIG_PCI=y
CONFIG_PCI_AR2315=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DRIVERS_LEGACY=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SOC_AR2315=y
CONFIG_SOC_AR5312=y
CONFIG_SRCU=y
# CONFIG_SWAP is not set
CONFIG_SWCONFIG=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_TARGET_ISA_REV=1
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TINY_SRCU=y
CONFIG_USB_SUPPORT=y

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@ -1,454 +0,0 @@
/*
* Marvell 88E6060 switch driver
* Copyright (c) 2008 Felix Fietkau <nbd@nbd.name>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License v2 as published by the
* Free Software Foundation
*/
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/unistd.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/spinlock.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/phy.h>
#include <linux/if_vlan.h>
#include <linux/version.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/uaccess.h>
#include "mvswitch.h"
/* Undefine this to use trailer mode instead.
* I don't know if header mode works with all chips */
#define HEADER_MODE 1
MODULE_DESCRIPTION("Marvell 88E6060 Switch driver");
MODULE_AUTHOR("Felix Fietkau");
MODULE_LICENSE("GPL");
#define MVSWITCH_MAGIC 0x88E6060
struct mvswitch_priv {
netdev_features_t orig_features;
u8 vlans[16];
};
#define to_mvsw(_phy) ((struct mvswitch_priv *) (_phy)->priv)
static inline u16
r16(struct phy_device *phydev, int addr, int reg)
{
struct mii_bus *bus = phydev->mdio.bus;
return bus->read(bus, addr, reg);
}
static inline void
w16(struct phy_device *phydev, int addr, int reg, u16 val)
{
struct mii_bus *bus = phydev->mdio.bus;
bus->write(bus, addr, reg, val);
}
static struct sk_buff *
mvswitch_mangle_tx(struct net_device *dev, struct sk_buff *skb)
{
struct mvswitch_priv *priv;
char *buf = NULL;
u16 vid;
priv = dev->phy_ptr;
if (unlikely(!priv))
goto error;
if (unlikely(skb->len < 16))
goto error;
#ifdef HEADER_MODE
if (__vlan_hwaccel_get_tag(skb, &vid))
goto error;
if (skb_cloned(skb) || (skb->len <= 62) || (skb_headroom(skb) < MV_HEADER_SIZE)) {
if (pskb_expand_head(skb, MV_HEADER_SIZE, (skb->len < 62 ? 62 - skb->len : 0), GFP_ATOMIC))
goto error_expand;
if (skb->len < 62)
skb->len = 62;
}
buf = skb_push(skb, MV_HEADER_SIZE);
#else
if (__vlan_get_tag(skb, &vid))
goto error;
if (unlikely((vid > 15 || !priv->vlans[vid])))
goto error;
if (skb->len <= 64) {
if (pskb_expand_head(skb, 0, 64 + MV_TRAILER_SIZE - skb->len, GFP_ATOMIC))
goto error_expand;
buf = skb->data + 64;
skb->len = 64 + MV_TRAILER_SIZE;
} else {
if (skb_cloned(skb) || unlikely(skb_tailroom(skb) < 4)) {
if (pskb_expand_head(skb, 0, 4, GFP_ATOMIC))
goto error_expand;
}
buf = skb_put(skb, 4);
}
/* move the ethernet header 4 bytes forward, overwriting the vlan tag */
memmove(skb->data + 4, skb->data, 12);
skb->data += 4;
skb->len -= 4;
skb->mac_header += 4;
#endif
if (!buf)
goto error;
#ifdef HEADER_MODE
/* prepend the tag */
*((__be16 *) buf) = cpu_to_be16(
((vid << MV_HEADER_VLAN_S) & MV_HEADER_VLAN_M) |
((priv->vlans[vid] << MV_HEADER_PORTS_S) & MV_HEADER_PORTS_M)
);
#else
/* append the tag */
*((__be32 *) buf) = cpu_to_be32((
(MV_TRAILER_OVERRIDE << MV_TRAILER_FLAGS_S) |
((priv->vlans[vid] & MV_TRAILER_PORTS_M) << MV_TRAILER_PORTS_S)
));
#endif
return skb;
error_expand:
if (net_ratelimit())
printk("%s: failed to expand/update skb for the switch\n", dev->name);
error:
/* any errors? drop the packet! */
dev_kfree_skb_any(skb);
return NULL;
}
static void
mvswitch_mangle_rx(struct net_device *dev, struct sk_buff *skb)
{
struct mvswitch_priv *priv;
unsigned char *buf;
int vlan = -1;
int i;
priv = dev->phy_ptr;
if (WARN_ON_ONCE(!priv))
return;
#ifdef HEADER_MODE
buf = skb->data;
skb_pull(skb, MV_HEADER_SIZE);
#else
buf = skb->data + skb->len - MV_TRAILER_SIZE;
if (buf[0] != 0x80)
return;
#endif
/* look for the vlan matching the incoming port */
for (i = 0; i < ARRAY_SIZE(priv->vlans); i++) {
if ((1 << buf[1]) & priv->vlans[i])
vlan = i;
}
if (vlan == -1)
return;
__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
}
static int
mvswitch_wait_mask(struct phy_device *pdev, int addr, int reg, u16 mask, u16 val)
{
int i = 100;
u16 r;
do {
r = r16(pdev, addr, reg) & mask;
if (r == val)
return 0;
} while(--i > 0);
return -ETIMEDOUT;
}
static int
mvswitch_config_init(struct phy_device *pdev)
{
struct mvswitch_priv *priv = to_mvsw(pdev);
struct net_device *dev = pdev->attached_dev;
u8 vlmap = 0;
int i;
if (!dev)
return -EINVAL;
printk("%s: Marvell 88E6060 PHY driver attached.\n", dev->name);
linkmode_zero(pdev->supported);
linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, pdev->supported);
linkmode_copy(pdev->advertising, pdev->supported);
dev->phy_ptr = priv;
pdev->irq = PHY_POLL;
#ifdef HEADER_MODE
dev->flags |= IFF_PROMISC;
#endif
/* initialize default vlans */
for (i = 0; i < MV_PORTS; i++)
priv->vlans[(i == MV_WANPORT ? 2 : 1)] |= (1 << i);
/* before entering reset, disable all ports */
for (i = 0; i < MV_PORTS; i++)
w16(pdev, MV_PORTREG(CONTROL, i), 0x00);
msleep(2); /* wait for the status change to settle in */
/* put the ATU in reset */
w16(pdev, MV_SWITCHREG(ATU_CTRL), MV_ATUCTL_RESET);
i = mvswitch_wait_mask(pdev, MV_SWITCHREG(ATU_CTRL), MV_ATUCTL_RESET, 0);
if (i < 0) {
printk("%s: Timeout waiting for the switch to reset.\n", dev->name);
return i;
}
/* set the ATU flags */
w16(pdev, MV_SWITCHREG(ATU_CTRL),
MV_ATUCTL_NO_LEARN |
MV_ATUCTL_ATU_1K |
MV_ATUCTL_AGETIME(MV_ATUCTL_AGETIME_MIN) /* minimum without disabling ageing */
);
/* initialize the cpu port */
w16(pdev, MV_PORTREG(CONTROL, MV_CPUPORT),
#ifdef HEADER_MODE
MV_PORTCTRL_HEADER |
#else
MV_PORTCTRL_RXTR |
MV_PORTCTRL_TXTR |
#endif
MV_PORTCTRL_ENABLED
);
/* wait for the phy change to settle in */
msleep(2);
for (i = 0; i < MV_PORTS; i++) {
u8 pvid = 0;
int j;
vlmap = 0;
/* look for the matching vlan */
for (j = 0; j < ARRAY_SIZE(priv->vlans); j++) {
if (priv->vlans[j] & (1 << i)) {
vlmap = priv->vlans[j];
pvid = j;
}
}
/* leave port unconfigured if it's not part of a vlan */
if (!vlmap)
continue;
/* add the cpu port to the allowed destinations list */
vlmap |= (1 << MV_CPUPORT);
/* take port out of its own vlan destination map */
vlmap &= ~(1 << i);
/* apply vlan settings */
w16(pdev, MV_PORTREG(VLANMAP, i),
MV_PORTVLAN_PORTS(vlmap) |
MV_PORTVLAN_ID(i)
);
/* re-enable port */
w16(pdev, MV_PORTREG(CONTROL, i),
MV_PORTCTRL_ENABLED
);
}
w16(pdev, MV_PORTREG(VLANMAP, MV_CPUPORT),
MV_PORTVLAN_ID(MV_CPUPORT)
);
/* set the port association vector */
for (i = 0; i <= MV_PORTS; i++) {
w16(pdev, MV_PORTREG(ASSOC, i),
MV_PORTASSOC_PORTS(1 << i)
);
}
/* init switch control */
w16(pdev, MV_SWITCHREG(CTRL),
MV_SWITCHCTL_MSIZE |
MV_SWITCHCTL_DROP
);
dev->eth_mangle_rx = mvswitch_mangle_rx;
dev->eth_mangle_tx = mvswitch_mangle_tx;
priv->orig_features = dev->features;
#ifdef HEADER_MODE
#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,1,0)
dev->priv_flags |= IFF_NO_IP_ALIGN;
#else
dev->extra_priv_flags |= IFF_NO_IP_ALIGN;
#endif
dev->features |= NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
#else
dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
#endif
return 0;
}
static int
mvswitch_read_status(struct phy_device *pdev)
{
pdev->speed = SPEED_100;
pdev->duplex = DUPLEX_FULL;
pdev->link = 1;
/* XXX ugly workaround: we can't force the switch
* to gracefully handle hosts moving from one port to another,
* so we have to regularly clear the ATU database */
/* wait for the ATU to become available */
mvswitch_wait_mask(pdev, MV_SWITCHREG(ATU_OP), MV_ATUOP_INPROGRESS, 0);
/* flush the ATU */
w16(pdev, MV_SWITCHREG(ATU_OP),
MV_ATUOP_INPROGRESS |
MV_ATUOP_FLUSH_ALL
);
/* wait for operation to complete */
mvswitch_wait_mask(pdev, MV_SWITCHREG(ATU_OP), MV_ATUOP_INPROGRESS, 0);
return 0;
}
static int
mvswitch_aneg_done(struct phy_device *phydev)
{
return 1; /* Return any positive value */
}
static int
mvswitch_config_aneg(struct phy_device *phydev)
{
return 0;
}
static void
mvswitch_detach(struct phy_device *pdev)
{
struct mvswitch_priv *priv = to_mvsw(pdev);
struct net_device *dev = pdev->attached_dev;
if (!dev)
return;
dev->phy_ptr = NULL;
dev->eth_mangle_rx = NULL;
dev->eth_mangle_tx = NULL;
dev->features = priv->orig_features;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,1,0)
dev->priv_flags &= ~IFF_NO_IP_ALIGN;
#else
dev->extra_priv_flags &= ~IFF_NO_IP_ALIGN;
#endif
}
static void
mvswitch_remove(struct phy_device *pdev)
{
struct mvswitch_priv *priv = to_mvsw(pdev);
kfree(priv);
}
static int
mvswitch_probe(struct phy_device *pdev)
{
struct mvswitch_priv *priv;
priv = kzalloc(sizeof(struct mvswitch_priv), GFP_KERNEL);
if (priv == NULL)
return -ENOMEM;
pdev->priv = priv;
return 0;
}
static int
mvswitch_fixup(struct phy_device *dev)
{
struct mii_bus *bus = dev->mdio.bus;
u16 reg;
if (dev->mdio.addr != 0x10)
return 0;
reg = bus->read(bus, MV_PORTREG(IDENT, 0)) & MV_IDENT_MASK;
if (reg != MV_IDENT_VALUE)
return 0;
dev->phy_id = MVSWITCH_MAGIC;
return 0;
}
static struct phy_driver mvswitch_driver = {
.name = "Marvell 88E6060",
.phy_id = MVSWITCH_MAGIC,
.phy_id_mask = 0xffffffff,
.features = PHY_BASIC_FEATURES,
.probe = &mvswitch_probe,
.remove = &mvswitch_remove,
.detach = &mvswitch_detach,
.config_init = &mvswitch_config_init,
.config_aneg = &mvswitch_config_aneg,
.aneg_done = &mvswitch_aneg_done,
.read_status = &mvswitch_read_status,
};
static int __init
mvswitch_init(void)
{
phy_register_fixup_for_id(PHY_ANY_ID, mvswitch_fixup);
return phy_driver_register(&mvswitch_driver, THIS_MODULE);
}
static void __exit
mvswitch_exit(void)
{
phy_driver_unregister(&mvswitch_driver);
}
module_init(mvswitch_init);
module_exit(mvswitch_exit);

View File

@ -1,145 +0,0 @@
/*
* Marvell 88E6060 switch driver
* Copyright (c) 2008 Felix Fietkau <nbd@nbd.name>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License v2 as published by the
* Free Software Foundation
*/
#ifndef __MVSWITCH_H
#define __MVSWITCH_H
#define MV_HEADER_SIZE 2
#define MV_HEADER_PORTS_M 0x001f
#define MV_HEADER_PORTS_S 0
#define MV_HEADER_VLAN_M 0xf000
#define MV_HEADER_VLAN_S 12
#define MV_TRAILER_SIZE 4
#define MV_TRAILER_PORTS_M 0x1f
#define MV_TRAILER_PORTS_S 16
#define MV_TRAILER_FLAGS_S 24
#define MV_TRAILER_OVERRIDE 0x80
#define MV_PORTS 5
#define MV_WANPORT 4
#define MV_CPUPORT 5
#define MV_BASE 0x10
#define MV_PHYPORT_BASE (MV_BASE + 0x0)
#define MV_PHYPORT(_n) (MV_PHYPORT_BASE + (_n))
#define MV_SWITCHPORT_BASE (MV_BASE + 0x8)
#define MV_SWITCHPORT(_n) (MV_SWITCHPORT_BASE + (_n))
#define MV_SWITCHREGS (MV_BASE + 0xf)
enum {
MV_PHY_CONTROL = 0x00,
MV_PHY_STATUS = 0x01,
MV_PHY_IDENT0 = 0x02,
MV_PHY_IDENT1 = 0x03,
MV_PHY_ANEG = 0x04,
MV_PHY_LINK_ABILITY = 0x05,
MV_PHY_ANEG_EXPAND = 0x06,
MV_PHY_XMIT_NEXTP = 0x07,
MV_PHY_LINK_NEXTP = 0x08,
MV_PHY_CONTROL1 = 0x10,
MV_PHY_STATUS1 = 0x11,
MV_PHY_INTR_EN = 0x12,
MV_PHY_INTR_STATUS = 0x13,
MV_PHY_INTR_PORT = 0x14,
MV_PHY_RECV_COUNTER = 0x16,
MV_PHY_LED_PARALLEL = 0x16,
MV_PHY_LED_STREAM = 0x17,
MV_PHY_LED_CTRL = 0x18,
MV_PHY_LED_OVERRIDE = 0x19,
MV_PHY_VCT_CTRL = 0x1a,
MV_PHY_VCT_STATUS = 0x1b,
MV_PHY_CONTROL2 = 0x1e
};
#define MV_PHYREG(_type, _port) MV_PHYPORT(_port), MV_PHY_##_type
enum {
MV_PORT_STATUS = 0x00,
MV_PORT_IDENT = 0x03,
MV_PORT_CONTROL = 0x04,
MV_PORT_VLANMAP = 0x06,
MV_PORT_ASSOC = 0x0b,
MV_PORT_RXCOUNT = 0x10,
MV_PORT_TXCOUNT = 0x11,
};
#define MV_PORTREG(_type, _port) MV_SWITCHPORT(_port), MV_PORT_##_type
enum {
MV_PORTCTRL_BLOCK = (1 << 0),
MV_PORTCTRL_LEARN = (2 << 0),
MV_PORTCTRL_ENABLED = (3 << 0),
MV_PORTCTRL_VLANTUN = (1 << 7), /* Enforce VLANs on packets */
MV_PORTCTRL_RXTR = (1 << 8), /* Enable Marvell packet trailer for ingress */
MV_PORTCTRL_HEADER = (1 << 11), /* Enable Marvell packet header mode for port */
MV_PORTCTRL_TXTR = (1 << 14), /* Enable Marvell packet trailer for egress */
MV_PORTCTRL_FORCEFL = (1 << 15), /* force flow control */
};
#define MV_PORTVLAN_ID(_n) (((_n) & 0xf) << 12)
#define MV_PORTVLAN_PORTS(_n) ((_n) & 0x3f)
#define MV_PORTASSOC_PORTS(_n) ((_n) & 0x1f)
#define MV_PORTASSOC_MONITOR (1 << 15)
enum {
MV_SWITCH_MAC0 = 0x01,
MV_SWITCH_MAC1 = 0x02,
MV_SWITCH_MAC2 = 0x03,
MV_SWITCH_CTRL = 0x04,
MV_SWITCH_ATU_CTRL = 0x0a,
MV_SWITCH_ATU_OP = 0x0b,
MV_SWITCH_ATU_DATA = 0x0c,
MV_SWITCH_ATU_MAC0 = 0x0d,
MV_SWITCH_ATU_MAC1 = 0x0e,
MV_SWITCH_ATU_MAC2 = 0x0f,
};
#define MV_SWITCHREG(_type) MV_SWITCHREGS, MV_SWITCH_##_type
enum {
MV_SWITCHCTL_EEIE = (1 << 0), /* EEPROM interrupt enable */
MV_SWITCHCTL_PHYIE = (1 << 1), /* PHY interrupt enable */
MV_SWITCHCTL_ATUDONE= (1 << 2), /* ATU done interrupt enable */
MV_SWITCHCTL_ATUIE = (1 << 3), /* ATU interrupt enable */
MV_SWITCHCTL_CTRMODE= (1 << 8), /* statistics for rx and tx errors */
MV_SWITCHCTL_RELOAD = (1 << 9), /* reload registers from eeprom */
MV_SWITCHCTL_MSIZE = (1 << 10), /* increase maximum frame size */
MV_SWITCHCTL_DROP = (1 << 13), /* discard frames with excessive collisions */
};
enum {
#define MV_ATUCTL_AGETIME_MIN 16
#define MV_ATUCTL_AGETIME_MAX 4080
#define MV_ATUCTL_AGETIME(_n) ((((_n) / 16) & 0xff) << 4)
MV_ATUCTL_ATU_256 = (0 << 12),
MV_ATUCTL_ATU_512 = (1 << 12),
MV_ATUCTL_ATU_1K = (2 << 12),
MV_ATUCTL_ATUMASK = (3 << 12),
MV_ATUCTL_NO_LEARN = (1 << 14),
MV_ATUCTL_RESET = (1 << 15),
};
enum {
#define MV_ATUOP_DBNUM(_n) ((_n) & 0x0f)
MV_ATUOP_NOOP = (0 << 12),
MV_ATUOP_FLUSH_ALL = (1 << 12),
MV_ATUOP_FLUSH_U = (2 << 12),
MV_ATUOP_LOAD_DB = (3 << 12),
MV_ATUOP_GET_NEXT = (4 << 12),
MV_ATUOP_FLUSH_DB = (5 << 12),
MV_ATUOP_FLUSH_DB_UU= (6 << 12),
MV_ATUOP_INPROGRESS = (1 << 15),
};
#define MV_IDENT_MASK 0xfff0
#define MV_IDENT_VALUE 0x0600
#endif

View File

@ -1 +0,0 @@
BOARDNAME:=Generic

View File

@ -1,118 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only
#
# Copyright (C) 2006-2010 OpenWrt.org
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/image.mk
define Build/mkfwimage
$(STAGING_DIR_HOST)/bin/mkfwimage \
-B $(1).$(VERSION_DIST).$(REVISION) \
-k $(IMAGE_KERNEL) \
-r $(IMAGE_ROOTFS) \
-o $@.new && \
mv $@.new $@
endef
define Build/combined-image
-sh $(TOPDIR)/scripts/combined-image.sh \
"$(IMAGE_KERNEL)" \
"$(IMAGE_ROOTFS)" \
"$@.new" && \
mv $@.new $@
endef
define Build/mkmylofw
$(STAGING_DIR_HOST)/bin/mkmylofw -B $(1) \
-p0x020000:0x130000:ah:0x80041000:linux:$(IMAGE_KERNEL) \
-p0x150000:0x2a0000:::rootfs:$(IMAGE_ROOTFS) \
$@.new && \
mv $@.new $@
endef
define Build/gzip-kernel
gzip -9n -c $@ > $@.gz
dd if=$@.gz of=$@ bs=65536 conv=sync
endef
define Build/lzma-kernel
$(STAGING_DIR_HOST)/bin/lzma e $@ $@.l7
dd if=$@.l7 of=$@ bs=65536 conv=sync
endef
define Build/copy-kernel
rm -f $@ $@.elf
cp $< $@
cp $<.elf $@.elf
endef
define Build/elf-kernel
cp $(IMAGE_KERNEL).elf $@
endef
define Device/Default
PROFILES = Default $$(DEVICE_NAME)
KERNEL := copy-kernel | lzma-kernel
KERNEL_INITRAMFS = kernel-bin
KERNEL_INITRAMFS_NAME := vmlinux-initramfs.elf
KERNEL_INITRAMFS_SUFFIX := -kernel.elf
IMAGES := sysupgrade.bin
FILESYSTEMS := squashfs
endef
define Device/generic
DEVICE_VENDOR := Atheros
DEVICE_MODEL := Generic AR2xxx board
IMAGES := kernel.lzma kernel.elf kernel.gz rootfs.bin sysupgrade.bin
IMAGE/kernel.gz := elf-kernel | gzip-kernel
IMAGE/kernel.elf := elf-kernel
IMAGE/kernel.lzma := elf-kernel | lzma-kernel
IMAGE/rootfs.bin := append-rootfs | pad-rootfs | pad-to 128k
IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | pad-to 128k | combined-image
DEVICE_IMG_NAME = $$(DEVICE_IMG_PREFIX)-$$(if $$(findstring kernel,$$(2)),,$$(1)-)$$(2)
endef
TARGET_DEVICES += generic
define Device/ubnt_picostation-2
DEVICE_VENDOR := Ubiquiti
DEVICE_MODEL := Picostation 2 (XS2-8)
IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | pad-to 128k | mkfwimage XS2-8 -v XS2.ar2316
endef
TARGET_DEVICES += ubnt_picostation-2
define Device/ubnt_nanostation-2
DEVICE_VENDOR := Ubiquiti
DEVICE_MODEL := Nanostation 2 (XS2)
IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | pad-to 128k | mkfwimage XS2 -v XS2.ar2316
DEFAULT := n
endef
TARGET_DEVICES += ubnt_nanostation-2
define Device/ubnt_nanostation-5
DEVICE_VENDOR := Ubiquiti
DEVICE_MODEL := Nanostation 5 (XS5)
IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | pad-to 128k | mkfwimage XS5 -v XS5.ar2313
DEFAULT := n
endef
TARGET_DEVICES += ubnt_nanostation-5
define Device/compex_np25g
DEVICE_VENDOR := Compex
DEVICE_MODEL := NP25G
KERNEL := kernel-bin | gzip-kernel
IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | pad-to 128k | mkmylofw np25g
BROKEN := y
endef
TARGET_DEVICES += compex_np25g
define Device/compex_wpe53g
DEVICE_VENDOR := Compex
DEVICE_MODEL := WPE53G
KERNEL := kernel-bin | gzip-kernel
IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | pad-to 128k | mkmylofw wpe53g
BROKEN := y
endef
TARGET_DEVICES += compex_wpe53g
$(eval $(call BuildImage))

View File

@ -1,212 +0,0 @@
--- a/arch/mips/ath25/Kconfig
+++ b/arch/mips/ath25/Kconfig
@@ -2,6 +2,7 @@
config SOC_AR5312
bool "Atheros AR5312/AR2312+ SoC support"
depends on ATH25
+ select GPIO_AR5312
default y
config SOC_AR2315
--- a/arch/mips/ath25/ar5312.c
+++ b/arch/mips/ath25/ar5312.c
@@ -23,6 +23,7 @@
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/reboot.h>
+#include <linux/gpio.h>
#include <asm/bootinfo.h>
#include <asm/reboot.h>
#include <asm/time.h>
@@ -177,6 +178,22 @@ static struct platform_device ar5312_phy
.num_resources = 1,
};
+static struct resource ar5312_gpio_res[] = {
+ {
+ .name = "ar5312-gpio",
+ .flags = IORESOURCE_MEM,
+ .start = AR5312_GPIO_BASE,
+ .end = AR5312_GPIO_BASE + AR5312_GPIO_SIZE - 1,
+ },
+};
+
+static struct platform_device ar5312_gpio = {
+ .name = "ar5312-gpio",
+ .id = -1,
+ .resource = ar5312_gpio_res,
+ .num_resources = ARRAY_SIZE(ar5312_gpio_res),
+};
+
static void __init ar5312_flash_init(void)
{
void __iomem *flashctl_base;
@@ -244,6 +261,8 @@ void __init ar5312_init_devices(void)
platform_device_register(&ar5312_physmap_flash);
+ platform_device_register(&ar5312_gpio);
+
switch (ath25_soc) {
case ATH25_SOC_AR5312:
if (!ath25_board.radio)
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -143,6 +143,13 @@ config GPIO_AMDPT
driver for GPIO functionality on Promontory IOHub
Require ACPI ASL code to enumerate as a platform device.
+config GPIO_AR5312
+ bool "AR5312 SoC GPIO support"
+ default y if SOC_AR5312
+ depends on SOC_AR5312
+ help
+ Say yes here to enable GPIO support for Atheros AR5312/AR2312+ SoCs.
+
config GPIO_ASPEED
tristate "Aspeed GPIO support"
depends on (ARCH_ASPEED || COMPILE_TEST) && OF_GPIO
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_GPIO_ALTERA) += gpio-alt
obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o
obj-$(CONFIG_GPIO_AMD_FCH) += gpio-amd-fch.o
obj-$(CONFIG_GPIO_AMDPT) += gpio-amdpt.o
+obj-$(CONFIG_GPIO_AR5312) += gpio-ar5312.o
obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o
obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o
obj-$(CONFIG_GPIO_ASPEED_SGPIO) += gpio-aspeed-sgpio.o
--- /dev/null
+++ b/drivers/gpio/gpio-ar5312.c
@@ -0,0 +1,121 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved.
+ * Copyright (C) 2006 FON Technology, SL.
+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@nbd.name>
+ * Copyright (C) 2012 Alexandros C. Couloumbis <alex@ozo.com>
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+
+#define DRIVER_NAME "ar5312-gpio"
+
+#define AR5312_GPIO_DO 0x00 /* output register */
+#define AR5312_GPIO_DI 0x04 /* intput register */
+#define AR5312_GPIO_CR 0x08 /* control register */
+
+#define AR5312_GPIO_CR_M(x) (1 << (x)) /* mask for i/o */
+#define AR5312_GPIO_CR_O(x) (0 << (x)) /* mask for output */
+#define AR5312_GPIO_CR_I(x) (1 << (x)) /* mask for input */
+#define AR5312_GPIO_CR_INT(x) (1 << ((x)+8)) /* mask for interrupt */
+#define AR5312_GPIO_CR_UART(x) (1 << ((x)+16)) /* uart multiplex */
+
+#define AR5312_GPIO_NUM 8
+
+static void __iomem *ar5312_mem;
+
+static inline u32 ar5312_gpio_reg_read(unsigned reg)
+{
+ return __raw_readl(ar5312_mem + reg);
+}
+
+static inline void ar5312_gpio_reg_write(unsigned reg, u32 val)
+{
+ __raw_writel(val, ar5312_mem + reg);
+}
+
+static inline void ar5312_gpio_reg_mask(unsigned reg, u32 mask, u32 val)
+{
+ ar5312_gpio_reg_write(reg, (ar5312_gpio_reg_read(reg) & ~mask) | val);
+}
+
+static int ar5312_gpio_get_val(struct gpio_chip *chip, unsigned gpio)
+{
+ return (ar5312_gpio_reg_read(AR5312_GPIO_DI) >> gpio) & 1;
+}
+
+static void ar5312_gpio_set_val(struct gpio_chip *chip, unsigned gpio, int val)
+{
+ u32 reg = ar5312_gpio_reg_read(AR5312_GPIO_DO);
+
+ reg = val ? reg | (1 << gpio) : reg & ~(1 << gpio);
+ ar5312_gpio_reg_write(AR5312_GPIO_DO, reg);
+}
+
+static int ar5312_gpio_dir_in(struct gpio_chip *chip, unsigned gpio)
+{
+ ar5312_gpio_reg_mask(AR5312_GPIO_CR, 0, 1 << gpio);
+ return 0;
+}
+
+static int ar5312_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, int val)
+{
+ ar5312_gpio_reg_mask(AR5312_GPIO_CR, 1 << gpio, 0);
+ ar5312_gpio_set_val(chip, gpio, val);
+ return 0;
+}
+
+static struct gpio_chip ar5312_gpio_chip = {
+ .label = DRIVER_NAME,
+ .direction_input = ar5312_gpio_dir_in,
+ .direction_output = ar5312_gpio_dir_out,
+ .set = ar5312_gpio_set_val,
+ .get = ar5312_gpio_get_val,
+ .base = 0,
+ .ngpio = AR5312_GPIO_NUM,
+};
+
+static int ar5312_gpio_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+ int ret;
+
+ if (ar5312_mem)
+ return -EBUSY;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ ar5312_mem = devm_ioremap_resource(dev, res);
+ if (IS_ERR(ar5312_mem))
+ return PTR_ERR(ar5312_mem);
+
+ ar5312_gpio_chip.parent = dev;
+ ret = gpiochip_add(&ar5312_gpio_chip);
+ if (ret) {
+ dev_err(dev, "failed to add gpiochip\n");
+ return ret;
+ }
+
+ return 0;
+}
+
+static struct platform_driver ar5312_gpio_driver = {
+ .probe = ar5312_gpio_probe,
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ }
+};
+
+static int __init ar5312_gpio_init(void)
+{
+ return platform_driver_register(&ar5312_gpio_driver);
+}
+subsys_initcall(ar5312_gpio_init);
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -232,6 +232,7 @@ config ATH25
select CEVT_R4K
select CSRC_R4K
select DMA_NONCOHERENT
+ select GPIOLIB
select IRQ_MIPS_CPU
select IRQ_DOMAIN
select SYS_HAS_CPU_MIPS32_R1

View File

@ -1,363 +0,0 @@
--- a/arch/mips/ath25/Kconfig
+++ b/arch/mips/ath25/Kconfig
@@ -8,6 +8,7 @@ config SOC_AR5312
config SOC_AR2315
bool "Atheros AR2315+ SoC support"
depends on ATH25
+ select GPIO_AR2315
default y
config PCI_AR2315
--- a/arch/mips/ath25/ar2315.c
+++ b/arch/mips/ath25/ar2315.c
@@ -22,6 +22,8 @@
#include <linux/memblock.h>
#include <linux/platform_device.h>
#include <linux/reboot.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
#include <asm/bootinfo.h>
#include <asm/reboot.h>
#include <asm/time.h>
@@ -165,11 +167,42 @@ void __init ar2315_arch_init_irq(void)
ar2315_misc_irq_domain = domain;
}
+static struct resource ar2315_gpio_res[] = {
+ {
+ .name = "ar2315-gpio",
+ .flags = IORESOURCE_MEM,
+ .start = AR2315_RST_BASE + AR2315_GPIO,
+ .end = AR2315_RST_BASE + AR2315_GPIO + 0x10 - 1,
+ },
+ {
+ .name = "ar2315-gpio",
+ .flags = IORESOURCE_IRQ,
+ },
+ {
+ .name = "ar2315-gpio-irq-base",
+ .flags = IORESOURCE_IRQ,
+ .start = AR231X_GPIO_IRQ_BASE,
+ .end = AR231X_GPIO_IRQ_BASE,
+ }
+};
+
+static struct platform_device ar2315_gpio = {
+ .id = -1,
+ .name = "ar2315-gpio",
+ .resource = ar2315_gpio_res,
+ .num_resources = ARRAY_SIZE(ar2315_gpio_res)
+};
+
void __init ar2315_init_devices(void)
{
/* Find board configuration */
ath25_find_config(AR2315_SPI_READ_BASE, AR2315_SPI_READ_SIZE);
+ ar2315_gpio_res[1].start = irq_create_mapping(ar2315_misc_irq_domain,
+ AR2315_MISC_IRQ_GPIO);
+ ar2315_gpio_res[1].end = ar2315_gpio_res[1].start;
+ platform_device_register(&ar2315_gpio);
+
ath25_add_wmac(0, AR2315_WLAN0_BASE, AR2315_IRQ_WLAN0);
}
@@ -185,8 +218,8 @@ static void ar2315_restart(char *command
/* Cold reset does not work on the AR2315/6, use the GPIO reset bits
* a workaround. Give it some time to attempt a gpio based hardware
* reset (atheros reference design workaround) */
-
- /* TODO: implement the GPIO reset workaround */
+ gpio_request_one(AR2315_RESET_GPIO, GPIOF_OUT_INIT_LOW, "Reset");
+ mdelay(100);
/* Some boards (e.g. Senao EOC-2610) don't implement the reset logic
* workaround. Attempt to jump to the mips reset location -
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -143,6 +143,13 @@ config GPIO_AMDPT
driver for GPIO functionality on Promontory IOHub
Require ACPI ASL code to enumerate as a platform device.
+config GPIO_AR2315
+ bool "AR2315 SoC GPIO support"
+ default y if SOC_AR2315
+ depends on SOC_AR2315
+ help
+ Say yes here to enable GPIO support for Atheros AR2315+ SoCs.
+
config GPIO_AR5312
bool "AR5312 SoC GPIO support"
default y if SOC_AR5312
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_GPIO_ALTERA) += gpio-alt
obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o
obj-$(CONFIG_GPIO_AMD_FCH) += gpio-amd-fch.o
obj-$(CONFIG_GPIO_AMDPT) += gpio-amdpt.o
+obj-$(CONFIG_GPIO_AR2315) += gpio-ar2315.o
obj-$(CONFIG_GPIO_AR5312) += gpio-ar5312.o
obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o
obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o
--- /dev/null
+++ b/drivers/gpio/gpio-ar2315.c
@@ -0,0 +1,233 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved.
+ * Copyright (C) 2006 FON Technology, SL.
+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
+ * Copyright (C) 2006 Felix Fietkau <nbd@nbd.name>
+ * Copyright (C) 2012 Alexandros C. Couloumbis <alex@ozo.com>
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/gpio.h>
+#include <linux/irq.h>
+
+#define DRIVER_NAME "ar2315-gpio"
+
+#define AR2315_GPIO_DI 0x0000
+#define AR2315_GPIO_DO 0x0008
+#define AR2315_GPIO_DIR 0x0010
+#define AR2315_GPIO_INT 0x0018
+
+#define AR2315_GPIO_DIR_M(x) (1 << (x)) /* mask for i/o */
+#define AR2315_GPIO_DIR_O(x) (1 << (x)) /* output */
+#define AR2315_GPIO_DIR_I(x) (0) /* input */
+
+#define AR2315_GPIO_INT_NUM_M 0x3F /* mask for GPIO num */
+#define AR2315_GPIO_INT_TRIG(x) ((x) << 6) /* interrupt trigger */
+#define AR2315_GPIO_INT_TRIG_M (0x3 << 6) /* mask for int trig */
+
+#define AR2315_GPIO_INT_TRIG_OFF 0 /* Triggerring off */
+#define AR2315_GPIO_INT_TRIG_LOW 1 /* Low Level Triggered */
+#define AR2315_GPIO_INT_TRIG_HIGH 2 /* High Level Triggered */
+#define AR2315_GPIO_INT_TRIG_EDGE 3 /* Edge Triggered */
+
+#define AR2315_GPIO_NUM 22
+
+static u32 ar2315_gpio_intmask;
+static u32 ar2315_gpio_intval;
+static unsigned ar2315_gpio_irq_base;
+static void __iomem *ar2315_mem;
+
+static inline u32 ar2315_gpio_reg_read(unsigned reg)
+{
+ return __raw_readl(ar2315_mem + reg);
+}
+
+static inline void ar2315_gpio_reg_write(unsigned reg, u32 val)
+{
+ __raw_writel(val, ar2315_mem + reg);
+}
+
+static inline void ar2315_gpio_reg_mask(unsigned reg, u32 mask, u32 val)
+{
+ ar2315_gpio_reg_write(reg, (ar2315_gpio_reg_read(reg) & ~mask) | val);
+}
+
+static void ar2315_gpio_irq_handler(struct irq_desc *desc)
+{
+ u32 pend;
+ int bit = -1;
+
+ /* only do one gpio interrupt at a time */
+ pend = ar2315_gpio_reg_read(AR2315_GPIO_DI);
+ pend ^= ar2315_gpio_intval;
+ pend &= ar2315_gpio_intmask;
+
+ if (pend) {
+ bit = fls(pend) - 1;
+ pend &= ~(1 << bit);
+ ar2315_gpio_intval ^= (1 << bit);
+ }
+
+ /* Enable interrupt with edge detection */
+ if ((ar2315_gpio_reg_read(AR2315_GPIO_DIR) & AR2315_GPIO_DIR_M(bit)) !=
+ AR2315_GPIO_DIR_I(bit))
+ return;
+
+ if (bit >= 0)
+ generic_handle_irq(ar2315_gpio_irq_base + bit);
+}
+
+static void ar2315_gpio_int_setup(unsigned gpio, int trig)
+{
+ u32 reg = ar2315_gpio_reg_read(AR2315_GPIO_INT);
+
+ reg &= ~(AR2315_GPIO_INT_NUM_M | AR2315_GPIO_INT_TRIG_M);
+ reg |= gpio | AR2315_GPIO_INT_TRIG(trig);
+ ar2315_gpio_reg_write(AR2315_GPIO_INT, reg);
+}
+
+static void ar2315_gpio_irq_unmask(struct irq_data *d)
+{
+ unsigned gpio = d->irq - ar2315_gpio_irq_base;
+ u32 dir = ar2315_gpio_reg_read(AR2315_GPIO_DIR);
+
+ /* Enable interrupt with edge detection */
+ if ((dir & AR2315_GPIO_DIR_M(gpio)) != AR2315_GPIO_DIR_I(gpio))
+ return;
+
+ ar2315_gpio_intmask |= (1 << gpio);
+ ar2315_gpio_int_setup(gpio, AR2315_GPIO_INT_TRIG_EDGE);
+}
+
+static void ar2315_gpio_irq_mask(struct irq_data *d)
+{
+ unsigned gpio = d->irq - ar2315_gpio_irq_base;
+
+ /* Disable interrupt */
+ ar2315_gpio_intmask &= ~(1 << gpio);
+ ar2315_gpio_int_setup(gpio, AR2315_GPIO_INT_TRIG_OFF);
+}
+
+static struct irq_chip ar2315_gpio_irq_chip = {
+ .name = DRIVER_NAME,
+ .irq_unmask = ar2315_gpio_irq_unmask,
+ .irq_mask = ar2315_gpio_irq_mask,
+};
+
+static void ar2315_gpio_irq_init(unsigned irq)
+{
+ unsigned i;
+
+ ar2315_gpio_intval = ar2315_gpio_reg_read(AR2315_GPIO_DI);
+ for (i = 0; i < AR2315_GPIO_NUM; i++) {
+ unsigned _irq = ar2315_gpio_irq_base + i;
+
+ irq_set_chip_and_handler(_irq, &ar2315_gpio_irq_chip,
+ handle_level_irq);
+ }
+ irq_set_chained_handler(irq, ar2315_gpio_irq_handler);
+}
+
+static int ar2315_gpio_get_val(struct gpio_chip *chip, unsigned gpio)
+{
+ return (ar2315_gpio_reg_read(AR2315_GPIO_DI) >> gpio) & 1;
+}
+
+static void ar2315_gpio_set_val(struct gpio_chip *chip, unsigned gpio, int val)
+{
+ u32 reg = ar2315_gpio_reg_read(AR2315_GPIO_DO);
+
+ reg = val ? reg | (1 << gpio) : reg & ~(1 << gpio);
+ ar2315_gpio_reg_write(AR2315_GPIO_DO, reg);
+}
+
+static int ar2315_gpio_dir_in(struct gpio_chip *chip, unsigned gpio)
+{
+ ar2315_gpio_reg_mask(AR2315_GPIO_DIR, 1 << gpio, 0);
+ return 0;
+}
+
+static int ar2315_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, int val)
+{
+ ar2315_gpio_reg_mask(AR2315_GPIO_DIR, 0, 1 << gpio);
+ ar2315_gpio_set_val(chip, gpio, val);
+ return 0;
+}
+
+static int ar2315_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
+{
+ return ar2315_gpio_irq_base + gpio;
+}
+
+static struct gpio_chip ar2315_gpio_chip = {
+ .label = DRIVER_NAME,
+ .direction_input = ar2315_gpio_dir_in,
+ .direction_output = ar2315_gpio_dir_out,
+ .set = ar2315_gpio_set_val,
+ .get = ar2315_gpio_get_val,
+ .to_irq = ar2315_gpio_to_irq,
+ .base = 0,
+ .ngpio = AR2315_GPIO_NUM,
+};
+
+static int ar2315_gpio_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct resource *res;
+ unsigned irq;
+ int ret;
+
+ if (ar2315_mem)
+ return -EBUSY;
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
+ "ar2315-gpio-irq-base");
+ if (!res) {
+ dev_err(dev, "not found GPIO IRQ base\n");
+ return -ENXIO;
+ }
+ ar2315_gpio_irq_base = res->start;
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, DRIVER_NAME);
+ if (!res) {
+ dev_err(dev, "not found IRQ number\n");
+ return -ENXIO;
+ }
+ irq = res->start;
+
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, DRIVER_NAME);
+ ar2315_mem = devm_ioremap_resource(dev, res);
+ if (IS_ERR(ar2315_mem))
+ return PTR_ERR(ar2315_mem);
+
+ ar2315_gpio_chip.parent = dev;
+ ret = gpiochip_add(&ar2315_gpio_chip);
+ if (ret) {
+ dev_err(dev, "failed to add gpiochip\n");
+ return ret;
+ }
+
+ ar2315_gpio_irq_init(irq);
+
+ return 0;
+}
+
+static struct platform_driver ar2315_gpio_driver = {
+ .probe = ar2315_gpio_probe,
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ }
+};
+
+static int __init ar2315_gpio_init(void)
+{
+ return platform_driver_register(&ar2315_gpio_driver);
+}
+subsys_initcall(ar2315_gpio_init);
--- a/arch/mips/ath25/devices.h
+++ b/arch/mips/ath25/devices.h
@@ -4,6 +4,11 @@
#include <linux/cpu.h>
+#define AR231X_GPIO_IRQ_BASE 0x30
+
+/* GPIO number for AR2315/16 reset issue workaround */
+#define AR2315_RESET_GPIO 5
+
#define ATH25_REG_MS(_val, _field) (((_val) & _field##_M) >> _field##_S)
#define ATH25_IRQ_CPU_CLOCK (MIPS_CPU_IRQ_BASE + 7) /* C0_CAUSE: 0x8000 */
--- a/arch/mips/ath25/ar2315_regs.h
+++ b/arch/mips/ath25/ar2315_regs.h
@@ -315,6 +315,9 @@
#define AR2315_MEM_CFG_BANKADDR_BITS_M 0x00000018
#define AR2315_MEM_CFG_BANKADDR_BITS_S 3
+/* GPIO MMR base address */
+#define AR2315_GPIO 0x0088
+
/*
* Local Bus Interface Registers
*/

File diff suppressed because it is too large Load Diff

View File

@ -1,631 +0,0 @@
--- a/drivers/mtd/devices/Kconfig
+++ b/drivers/mtd/devices/Kconfig
@@ -120,6 +120,10 @@ config MTD_BCM47XXSFLASH
registered by bcma as platform devices. This enables driver for
serial flash memories.
+config MTD_AR2315
+ tristate "Atheros AR2315+ SPI Flash support"
+ depends on SOC_AR2315
+
config MTD_SLRAM
tristate "Uncached system RAM"
help
--- a/drivers/mtd/devices/Makefile
+++ b/drivers/mtd/devices/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_MTD_MCHP23K256) += mchp23k2
obj-$(CONFIG_MTD_MCHP48L640) += mchp48l640.o
obj-$(CONFIG_MTD_SPEAR_SMI) += spear_smi.o
obj-$(CONFIG_MTD_SST25L) += sst25l.o
+obj-$(CONFIG_MTD_AR2315) += ar2315.o
obj-$(CONFIG_MTD_BCM47XXSFLASH) += bcm47xxsflash.o
obj-$(CONFIG_MTD_ST_SPI_FSM) += st_spi_fsm.o
obj-$(CONFIG_MTD_POWERNV_FLASH) += powernv_flash.o
--- /dev/null
+++ b/drivers/mtd/devices/ar2315.c
@@ -0,0 +1,456 @@
+
+/*
+ * MTD driver for the SPI Flash Memory support on Atheros AR2315
+ *
+ * Copyright (c) 2005-2006 Atheros Communications Inc.
+ * Copyright (C) 2006-2007 FON Technology, SL.
+ * Copyright (C) 2006-2007 Imre Kaloz <kaloz@openwrt.org>
+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@nbd.name>
+ * Copyright (C) 2012 Alexandros C. Couloumbis <alex@ozo.com>
+ *
+ * This code is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/slab.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/platform_device.h>
+#include <linux/sched.h>
+#include <linux/delay.h>
+#include <linux/io.h>
+#include <linux/mutex.h>
+
+#include "ar2315_spiflash.h"
+
+#define DRIVER_NAME "ar2315-spiflash"
+
+#define busy_wait(_priv, _condition, _wait) do { \
+ while (_condition) { \
+ if (_wait > 1) \
+ msleep(_wait); \
+ else if ((_wait == 1) && need_resched()) \
+ schedule(); \
+ else \
+ udelay(1); \
+ } \
+} while (0)
+
+enum {
+ FLASH_NONE,
+ FLASH_1MB,
+ FLASH_2MB,
+ FLASH_4MB,
+ FLASH_8MB,
+ FLASH_16MB,
+};
+
+/* Flash configuration table */
+struct flashconfig {
+ u32 byte_cnt;
+ u32 sector_cnt;
+ u32 sector_size;
+};
+
+static const struct flashconfig flashconfig_tbl[] = {
+ [FLASH_NONE] = { 0, 0, 0},
+ [FLASH_1MB] = { STM_1MB_BYTE_COUNT, STM_1MB_SECTOR_COUNT,
+ STM_1MB_SECTOR_SIZE},
+ [FLASH_2MB] = { STM_2MB_BYTE_COUNT, STM_2MB_SECTOR_COUNT,
+ STM_2MB_SECTOR_SIZE},
+ [FLASH_4MB] = { STM_4MB_BYTE_COUNT, STM_4MB_SECTOR_COUNT,
+ STM_4MB_SECTOR_SIZE},
+ [FLASH_8MB] = { STM_8MB_BYTE_COUNT, STM_8MB_SECTOR_COUNT,
+ STM_8MB_SECTOR_SIZE},
+ [FLASH_16MB] = { STM_16MB_BYTE_COUNT, STM_16MB_SECTOR_COUNT,
+ STM_16MB_SECTOR_SIZE}
+};
+
+/* Mapping of generic opcodes to STM serial flash opcodes */
+enum {
+ SPI_WRITE_ENABLE,
+ SPI_WRITE_DISABLE,
+ SPI_RD_STATUS,
+ SPI_WR_STATUS,
+ SPI_RD_DATA,
+ SPI_FAST_RD_DATA,
+ SPI_PAGE_PROGRAM,
+ SPI_SECTOR_ERASE,
+ SPI_BULK_ERASE,
+ SPI_DEEP_PWRDOWN,
+ SPI_RD_SIG,
+};
+
+struct opcodes {
+ __u16 code;
+ __s8 tx_cnt;
+ __s8 rx_cnt;
+};
+
+static const struct opcodes stm_opcodes[] = {
+ [SPI_WRITE_ENABLE] = {STM_OP_WR_ENABLE, 1, 0},
+ [SPI_WRITE_DISABLE] = {STM_OP_WR_DISABLE, 1, 0},
+ [SPI_RD_STATUS] = {STM_OP_RD_STATUS, 1, 1},
+ [SPI_WR_STATUS] = {STM_OP_WR_STATUS, 1, 0},
+ [SPI_RD_DATA] = {STM_OP_RD_DATA, 4, 4},
+ [SPI_FAST_RD_DATA] = {STM_OP_FAST_RD_DATA, 5, 0},
+ [SPI_PAGE_PROGRAM] = {STM_OP_PAGE_PGRM, 8, 0},
+ [SPI_SECTOR_ERASE] = {STM_OP_SECTOR_ERASE, 4, 0},
+ [SPI_BULK_ERASE] = {STM_OP_BULK_ERASE, 1, 0},
+ [SPI_DEEP_PWRDOWN] = {STM_OP_DEEP_PWRDOWN, 1, 0},
+ [SPI_RD_SIG] = {STM_OP_RD_SIG, 4, 1},
+};
+
+/* Driver private data structure */
+struct spiflash_priv {
+ struct mtd_info mtd;
+ void __iomem *readaddr; /* memory mapped data for read */
+ void __iomem *mmraddr; /* memory mapped register space */
+ struct mutex lock; /* serialize registers access */
+};
+
+#define to_spiflash(_mtd) container_of(_mtd, struct spiflash_priv, mtd)
+
+enum {
+ FL_READY,
+ FL_READING,
+ FL_ERASING,
+ FL_WRITING
+};
+
+/*****************************************************************************/
+
+static u32
+spiflash_read_reg(struct spiflash_priv *priv, int reg)
+{
+ return ioread32(priv->mmraddr + reg);
+}
+
+static void
+spiflash_write_reg(struct spiflash_priv *priv, int reg, u32 data)
+{
+ iowrite32(data, priv->mmraddr + reg);
+}
+
+static u32
+spiflash_wait_busy(struct spiflash_priv *priv)
+{
+ u32 reg;
+
+ busy_wait(priv, (reg = spiflash_read_reg(priv, SPI_FLASH_CTL)) &
+ SPI_CTL_BUSY, 0);
+ return reg;
+}
+
+static u32
+spiflash_sendcmd(struct spiflash_priv *priv, int opcode, u32 addr)
+{
+ const struct opcodes *op;
+ u32 reg, mask;
+
+ op = &stm_opcodes[opcode];
+ reg = spiflash_wait_busy(priv);
+ spiflash_write_reg(priv, SPI_FLASH_OPCODE,
+ ((u32)op->code) | (addr << 8));
+
+ reg &= ~SPI_CTL_TX_RX_CNT_MASK;
+ reg |= SPI_CTL_START | op->tx_cnt | (op->rx_cnt << 4);
+
+ spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
+ spiflash_wait_busy(priv);
+
+ if (!op->rx_cnt)
+ return 0;
+
+ reg = spiflash_read_reg(priv, SPI_FLASH_DATA);
+
+ switch (op->rx_cnt) {
+ case 1:
+ mask = 0x000000ff;
+ break;
+ case 2:
+ mask = 0x0000ffff;
+ break;
+ case 3:
+ mask = 0x00ffffff;
+ break;
+ default:
+ mask = 0xffffffff;
+ break;
+ }
+ reg &= mask;
+
+ return reg;
+}
+
+/*
+ * Probe SPI flash device
+ * Function returns 0 for failure.
+ * and flashconfig_tbl array index for success.
+ */
+static int
+spiflash_probe_chip(struct platform_device *pdev, struct spiflash_priv *priv)
+{
+ u32 sig = spiflash_sendcmd(priv, SPI_RD_SIG, 0);
+ int flash_size;
+
+ switch (sig) {
+ case STM_8MBIT_SIGNATURE:
+ flash_size = FLASH_1MB;
+ break;
+ case STM_16MBIT_SIGNATURE:
+ flash_size = FLASH_2MB;
+ break;
+ case STM_32MBIT_SIGNATURE:
+ flash_size = FLASH_4MB;
+ break;
+ case STM_64MBIT_SIGNATURE:
+ flash_size = FLASH_8MB;
+ break;
+ case STM_128MBIT_SIGNATURE:
+ flash_size = FLASH_16MB;
+ break;
+ default:
+ dev_warn(&pdev->dev, "read of flash device signature failed!\n");
+ return 0;
+ }
+
+ return flash_size;
+}
+
+static void
+spiflash_wait_complete(struct spiflash_priv *priv, unsigned int timeout)
+{
+ busy_wait(priv, spiflash_sendcmd(priv, SPI_RD_STATUS, 0) &
+ SPI_STATUS_WIP, timeout);
+}
+
+static int
+spiflash_erase(struct mtd_info *mtd, struct erase_info *instr)
+{
+ struct spiflash_priv *priv = to_spiflash(mtd);
+ const struct opcodes *op;
+ u32 temp, reg;
+
+ if (instr->addr + instr->len > mtd->size)
+ return -EINVAL;
+
+ mutex_lock(&priv->lock);
+
+ spiflash_sendcmd(priv, SPI_WRITE_ENABLE, 0);
+ reg = spiflash_wait_busy(priv);
+
+ op = &stm_opcodes[SPI_SECTOR_ERASE];
+ temp = ((u32)instr->addr << 8) | (u32)(op->code);
+ spiflash_write_reg(priv, SPI_FLASH_OPCODE, temp);
+
+ reg &= ~SPI_CTL_TX_RX_CNT_MASK;
+ reg |= op->tx_cnt | SPI_CTL_START;
+ spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
+
+ spiflash_wait_complete(priv, 20);
+
+ mutex_unlock(&priv->lock);
+
+ return 0;
+}
+
+static int
+spiflash_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen,
+ u_char *buf)
+{
+ struct spiflash_priv *priv = to_spiflash(mtd);
+
+ if (!len)
+ return 0;
+
+ if (from + len > mtd->size)
+ return -EINVAL;
+
+ *retlen = len;
+
+ mutex_lock(&priv->lock);
+
+ memcpy_fromio(buf, priv->readaddr + from, len);
+
+ mutex_unlock(&priv->lock);
+
+ return 0;
+}
+
+static int
+spiflash_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen,
+ const u8 *buf)
+{
+ struct spiflash_priv *priv = to_spiflash(mtd);
+ u32 opcode, bytes_left;
+
+ *retlen = 0;
+
+ if (!len)
+ return 0;
+
+ if (to + len > mtd->size)
+ return -EINVAL;
+
+ bytes_left = len;
+
+ do {
+ u32 read_len, reg, page_offset, spi_data = 0;
+
+ read_len = min(bytes_left, sizeof(u32));
+
+ /* 32-bit writes cannot span across a page boundary
+ * (256 bytes). This types of writes require two page
+ * program operations to handle it correctly. The STM part
+ * will write the overflow data to the beginning of the
+ * current page as opposed to the subsequent page.
+ */
+ page_offset = (to & (STM_PAGE_SIZE - 1)) + read_len;
+
+ if (page_offset > STM_PAGE_SIZE)
+ read_len -= (page_offset - STM_PAGE_SIZE);
+
+ mutex_lock(&priv->lock);
+
+ spiflash_sendcmd(priv, SPI_WRITE_ENABLE, 0);
+ spi_data = 0;
+ switch (read_len) {
+ case 4:
+ spi_data |= buf[3] << 24;
+ fallthrough;
+ case 3:
+ spi_data |= buf[2] << 16;
+ fallthrough;
+ case 2:
+ spi_data |= buf[1] << 8;
+ fallthrough;
+ case 1:
+ spi_data |= buf[0] & 0xff;
+ break;
+ default:
+ break;
+ }
+
+ spiflash_write_reg(priv, SPI_FLASH_DATA, spi_data);
+ opcode = stm_opcodes[SPI_PAGE_PROGRAM].code |
+ (to & 0x00ffffff) << 8;
+ spiflash_write_reg(priv, SPI_FLASH_OPCODE, opcode);
+
+ reg = spiflash_read_reg(priv, SPI_FLASH_CTL);
+ reg &= ~SPI_CTL_TX_RX_CNT_MASK;
+ reg |= (read_len + 4) | SPI_CTL_START;
+ spiflash_write_reg(priv, SPI_FLASH_CTL, reg);
+
+ spiflash_wait_complete(priv, 1);
+
+ mutex_unlock(&priv->lock);
+
+ bytes_left -= read_len;
+ to += read_len;
+ buf += read_len;
+
+ *retlen += read_len;
+ } while (bytes_left != 0);
+
+ return 0;
+}
+
+#if defined CONFIG_MTD_REDBOOT_PARTS || CONFIG_MTD_MYLOADER_PARTS
+static const char * const part_probe_types[] = {
+ "cmdlinepart", "RedBoot", "MyLoader", NULL
+};
+#endif
+
+static int
+spiflash_probe(struct platform_device *pdev)
+{
+ struct spiflash_priv *priv;
+ struct mtd_info *mtd;
+ struct resource *res;
+ int index;
+ int result = 0;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ mutex_init(&priv->lock);
+ mtd = &priv->mtd;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ priv->mmraddr = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(priv->mmraddr)) {
+ dev_warn(&pdev->dev, "failed to map flash MMR\n");
+ return PTR_ERR(priv->mmraddr);
+ }
+
+ index = spiflash_probe_chip(pdev, priv);
+ if (!index) {
+ dev_warn(&pdev->dev, "found no flash device\n");
+ return -ENODEV;
+ }
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ priv->readaddr = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(priv->readaddr)) {
+ dev_warn(&pdev->dev, "failed to map flash read mem\n");
+ return PTR_ERR(priv->readaddr);
+ }
+
+ platform_set_drvdata(pdev, priv);
+ mtd->name = "spiflash";
+ mtd->type = MTD_NORFLASH;
+ mtd->flags = (MTD_CAP_NORFLASH|MTD_WRITEABLE);
+ mtd->size = flashconfig_tbl[index].byte_cnt;
+ mtd->erasesize = flashconfig_tbl[index].sector_size;
+ mtd->writesize = 1;
+ mtd->numeraseregions = 0;
+ mtd->eraseregions = NULL;
+ mtd->_erase = spiflash_erase;
+ mtd->_read = spiflash_read;
+ mtd->_write = spiflash_write;
+ mtd->owner = THIS_MODULE;
+
+ dev_info(&pdev->dev, "%lld Kbytes flash detected\n", mtd->size >> 10);
+
+#if defined CONFIG_MTD_REDBOOT_PARTS || CONFIG_MTD_MYLOADER_PARTS
+ /* parse redboot partitions */
+
+ result = mtd_device_parse_register(mtd, part_probe_types,
+ NULL, NULL, 0);
+#endif
+
+ return result;
+}
+
+static int
+spiflash_remove(struct platform_device *pdev)
+{
+ struct spiflash_priv *priv = platform_get_drvdata(pdev);
+
+ mtd_device_unregister(&priv->mtd);
+
+ return 0;
+}
+
+static struct platform_driver spiflash_driver = {
+ .driver.name = DRIVER_NAME,
+ .probe = spiflash_probe,
+ .remove = spiflash_remove,
+};
+
+module_platform_driver(spiflash_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("OpenWrt.org");
+MODULE_AUTHOR("Atheros Communications Inc");
+MODULE_DESCRIPTION("MTD driver for SPI Flash on Atheros AR2315+ SOC");
+MODULE_ALIAS("platform:" DRIVER_NAME);
+
--- /dev/null
+++ b/drivers/mtd/devices/ar2315_spiflash.h
@@ -0,0 +1,106 @@
+/*
+ * Atheros AR2315 SPI Flash Memory support header file.
+ *
+ * Copyright (c) 2005, Atheros Communications Inc.
+ * Copyright (C) 2006 FON Technology, SL.
+ * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
+ * Copyright (C) 2006-2009 Felix Fietkau <nbd@nbd.name>
+ *
+ * This code is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#ifndef __AR2315_SPIFLASH_H
+#define __AR2315_SPIFLASH_H
+
+#define STM_PAGE_SIZE 256
+
+#define SFI_WRITE_BUFFER_SIZE 4
+#define SFI_FLASH_ADDR_MASK 0x00ffffff
+
+#define STM_8MBIT_SIGNATURE 0x13
+#define STM_M25P80_BYTE_COUNT 1048576
+#define STM_M25P80_SECTOR_COUNT 16
+#define STM_M25P80_SECTOR_SIZE 0x10000
+
+#define STM_16MBIT_SIGNATURE 0x14
+#define STM_M25P16_BYTE_COUNT 2097152
+#define STM_M25P16_SECTOR_COUNT 32
+#define STM_M25P16_SECTOR_SIZE 0x10000
+
+#define STM_32MBIT_SIGNATURE 0x15
+#define STM_M25P32_BYTE_COUNT 4194304
+#define STM_M25P32_SECTOR_COUNT 64
+#define STM_M25P32_SECTOR_SIZE 0x10000
+
+#define STM_64MBIT_SIGNATURE 0x16
+#define STM_M25P64_BYTE_COUNT 8388608
+#define STM_M25P64_SECTOR_COUNT 128
+#define STM_M25P64_SECTOR_SIZE 0x10000
+
+#define STM_128MBIT_SIGNATURE 0x17
+#define STM_M25P128_BYTE_COUNT 16777216
+#define STM_M25P128_SECTOR_COUNT 256
+#define STM_M25P128_SECTOR_SIZE 0x10000
+
+#define STM_1MB_BYTE_COUNT STM_M25P80_BYTE_COUNT
+#define STM_1MB_SECTOR_COUNT STM_M25P80_SECTOR_COUNT
+#define STM_1MB_SECTOR_SIZE STM_M25P80_SECTOR_SIZE
+#define STM_2MB_BYTE_COUNT STM_M25P16_BYTE_COUNT
+#define STM_2MB_SECTOR_COUNT STM_M25P16_SECTOR_COUNT
+#define STM_2MB_SECTOR_SIZE STM_M25P16_SECTOR_SIZE
+#define STM_4MB_BYTE_COUNT STM_M25P32_BYTE_COUNT
+#define STM_4MB_SECTOR_COUNT STM_M25P32_SECTOR_COUNT
+#define STM_4MB_SECTOR_SIZE STM_M25P32_SECTOR_SIZE
+#define STM_8MB_BYTE_COUNT STM_M25P64_BYTE_COUNT
+#define STM_8MB_SECTOR_COUNT STM_M25P64_SECTOR_COUNT
+#define STM_8MB_SECTOR_SIZE STM_M25P64_SECTOR_SIZE
+#define STM_16MB_BYTE_COUNT STM_M25P128_BYTE_COUNT
+#define STM_16MB_SECTOR_COUNT STM_M25P128_SECTOR_COUNT
+#define STM_16MB_SECTOR_SIZE STM_M25P128_SECTOR_SIZE
+
+/*
+ * ST Microelectronics Opcodes for Serial Flash
+ */
+
+#define STM_OP_WR_ENABLE 0x06 /* Write Enable */
+#define STM_OP_WR_DISABLE 0x04 /* Write Disable */
+#define STM_OP_RD_STATUS 0x05 /* Read Status */
+#define STM_OP_WR_STATUS 0x01 /* Write Status */
+#define STM_OP_RD_DATA 0x03 /* Read Data */
+#define STM_OP_FAST_RD_DATA 0x0b /* Fast Read Data */
+#define STM_OP_PAGE_PGRM 0x02 /* Page Program */
+#define STM_OP_SECTOR_ERASE 0xd8 /* Sector Erase */
+#define STM_OP_BULK_ERASE 0xc7 /* Bulk Erase */
+#define STM_OP_DEEP_PWRDOWN 0xb9 /* Deep Power-Down Mode */
+#define STM_OP_RD_SIG 0xab /* Read Electronic Signature */
+
+#define STM_STATUS_WIP 0x01 /* Write-In-Progress */
+#define STM_STATUS_WEL 0x02 /* Write Enable Latch */
+#define STM_STATUS_BP0 0x04 /* Block Protect 0 */
+#define STM_STATUS_BP1 0x08 /* Block Protect 1 */
+#define STM_STATUS_BP2 0x10 /* Block Protect 2 */
+#define STM_STATUS_SRWD 0x80 /* Status Register Write Disable */
+
+/*
+ * SPI Flash Interface Registers
+ */
+
+#define SPI_FLASH_CTL 0x00
+#define SPI_FLASH_OPCODE 0x04
+#define SPI_FLASH_DATA 0x08
+
+#define SPI_CTL_START 0x00000100
+#define SPI_CTL_BUSY 0x00010000
+#define SPI_CTL_TXCNT_MASK 0x0000000f
+#define SPI_CTL_RXCNT_MASK 0x000000f0
+#define SPI_CTL_TX_RX_CNT_MASK 0x000000ff
+#define SPI_CTL_SIZE_MASK 0x00060000
+
+#define SPI_CTL_CLK_SEL_MASK 0x03000000
+#define SPI_OPCODE_MASK 0x000000ff
+
+#define SPI_STATUS_WIP STM_STATUS_WIP
+
+#endif
--- a/arch/mips/ath25/ar2315.c
+++ b/arch/mips/ath25/ar2315.c
@@ -218,6 +218,28 @@ static struct platform_device ar2315_gpi
.num_resources = ARRAY_SIZE(ar2315_gpio_res)
};
+static struct resource ar2315_spiflash_res[] = {
+ {
+ .name = "spiflash_read",
+ .flags = IORESOURCE_MEM,
+ .start = AR2315_SPI_READ_BASE,
+ .end = AR2315_SPI_READ_BASE + AR2315_SPI_READ_SIZE - 1,
+ },
+ {
+ .name = "spiflash_mmr",
+ .flags = IORESOURCE_MEM,
+ .start = AR2315_SPI_MMR_BASE,
+ .end = AR2315_SPI_MMR_BASE + AR2315_SPI_MMR_SIZE - 1,
+ },
+};
+
+static struct platform_device ar2315_spiflash = {
+ .id = 0,
+ .name = "ar2315-spiflash",
+ .resource = ar2315_spiflash_res,
+ .num_resources = ARRAY_SIZE(ar2315_spiflash_res)
+};
+
void __init ar2315_init_devices(void)
{
/* Find board configuration */
@@ -228,6 +250,8 @@ void __init ar2315_init_devices(void)
ar2315_gpio_res[1].end = ar2315_gpio_res[1].start;
platform_device_register(&ar2315_gpio);
+ platform_device_register(&ar2315_spiflash);
+
ar2315_eth_data.macaddr = ath25_board.config->enet0_mac;
ath25_add_ethernet(0, AR2315_ENET0_BASE, "eth0_mii",
AR2315_ENET0_MII_BASE, AR2315_IRQ_ENET0,

View File

@ -1,277 +0,0 @@
--- /dev/null
+++ b/drivers/watchdog/ar2315-wtd.c
@@ -0,0 +1,209 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
+ *
+ * Copyright (C) 2008 John Crispin <blogic@openwrt.org>
+ * Based on EP93xx and ifxmips wdt driver
+ */
+
+#include <linux/interrupt.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/types.h>
+#include <linux/miscdevice.h>
+#include <linux/watchdog.h>
+#include <linux/fs.h>
+#include <linux/ioport.h>
+#include <linux/notifier.h>
+#include <linux/reboot.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/io.h>
+#include <linux/uaccess.h>
+
+#define DRIVER_NAME "ar2315-wdt"
+
+#define CLOCK_RATE 40000000
+#define HEARTBEAT(x) (x < 1 || x > 90 ? 20 : x)
+
+#define WDT_REG_TIMER 0x00
+#define WDT_REG_CTRL 0x04
+
+#define WDT_CTRL_ACT_NONE 0x00000000 /* No action */
+#define WDT_CTRL_ACT_NMI 0x00000001 /* NMI on watchdog */
+#define WDT_CTRL_ACT_RESET 0x00000002 /* reset on watchdog */
+
+static int wdt_timeout = 20;
+static int started;
+static int in_use;
+static void __iomem *wdt_base;
+
+static inline void ar2315_wdt_wr(unsigned reg, u32 val)
+{
+ iowrite32(val, wdt_base + reg);
+}
+
+static void
+ar2315_wdt_enable(void)
+{
+ ar2315_wdt_wr(WDT_REG_TIMER, wdt_timeout * CLOCK_RATE);
+}
+
+static ssize_t
+ar2315_wdt_write(struct file *file, const char __user *data, size_t len,
+ loff_t *ppos)
+{
+ if (len)
+ ar2315_wdt_enable();
+ return len;
+}
+
+static int
+ar2315_wdt_open(struct inode *inode, struct file *file)
+{
+ if (in_use)
+ return -EBUSY;
+ ar2315_wdt_enable();
+ in_use = 1;
+ started = 1;
+ return nonseekable_open(inode, file);
+}
+
+static int
+ar2315_wdt_release(struct inode *inode, struct file *file)
+{
+ in_use = 0;
+ return 0;
+}
+
+static irqreturn_t
+ar2315_wdt_interrupt(int irq, void *dev)
+{
+ struct platform_device *pdev = (struct platform_device *)dev;
+
+ if (started) {
+ dev_crit(&pdev->dev, "watchdog expired, rebooting system\n");
+ emergency_restart();
+ } else {
+ ar2315_wdt_wr(WDT_REG_CTRL, 0);
+ ar2315_wdt_wr(WDT_REG_TIMER, 0);
+ }
+ return IRQ_HANDLED;
+}
+
+static struct watchdog_info ident = {
+ .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
+ .identity = "ar2315 Watchdog",
+};
+
+static long
+ar2315_wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+ int new_wdt_timeout;
+ int ret = -ENOIOCTLCMD;
+
+ switch (cmd) {
+ case WDIOC_GETSUPPORT:
+ ret = copy_to_user((void __user *)arg, &ident, sizeof(ident)) ?
+ -EFAULT : 0;
+ break;
+ case WDIOC_KEEPALIVE:
+ ar2315_wdt_enable();
+ ret = 0;
+ break;
+ case WDIOC_SETTIMEOUT:
+ ret = get_user(new_wdt_timeout, (int __user *)arg);
+ if (ret)
+ break;
+ wdt_timeout = HEARTBEAT(new_wdt_timeout);
+ ar2315_wdt_enable();
+ break;
+ case WDIOC_GETTIMEOUT:
+ ret = put_user(wdt_timeout, (int __user *)arg);
+ break;
+ }
+ return ret;
+}
+
+static const struct file_operations ar2315_wdt_fops = {
+ .owner = THIS_MODULE,
+ .llseek = no_llseek,
+ .write = ar2315_wdt_write,
+ .unlocked_ioctl = ar2315_wdt_ioctl,
+ .open = ar2315_wdt_open,
+ .release = ar2315_wdt_release,
+};
+
+static struct miscdevice ar2315_wdt_miscdev = {
+ .minor = WATCHDOG_MINOR,
+ .name = "watchdog",
+ .fops = &ar2315_wdt_fops,
+};
+
+static int
+ar2315_wdt_probe(struct platform_device *dev)
+{
+ struct resource *mem_res, *irq_res;
+ int ret = 0;
+
+ if (wdt_base)
+ return -EBUSY;
+
+ irq_res = platform_get_resource(dev, IORESOURCE_IRQ, 0);
+ if (!irq_res) {
+ dev_err(&dev->dev, "no IRQ resource\n");
+ return -ENOENT;
+ }
+
+ mem_res = platform_get_resource(dev, IORESOURCE_MEM, 0);
+ wdt_base = devm_ioremap_resource(&dev->dev, mem_res);
+ if (IS_ERR(wdt_base))
+ return PTR_ERR(wdt_base);
+
+ ret = devm_request_irq(&dev->dev, irq_res->start, ar2315_wdt_interrupt,
+ 0, DRIVER_NAME, dev);
+ if (ret) {
+ dev_err(&dev->dev, "failed to register inetrrupt\n");
+ goto out;
+ }
+
+ ret = misc_register(&ar2315_wdt_miscdev);
+ if (ret)
+ dev_err(&dev->dev, "failed to register miscdev\n");
+
+out:
+ return ret;
+}
+
+static int
+ar2315_wdt_remove(struct platform_device *dev)
+{
+ misc_deregister(&ar2315_wdt_miscdev);
+ return 0;
+}
+
+static struct platform_driver ar2315_wdt_driver = {
+ .probe = ar2315_wdt_probe,
+ .remove = ar2315_wdt_remove,
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ },
+};
+
+module_platform_driver(ar2315_wdt_driver);
+
+MODULE_DESCRIPTION("Atheros AR2315 hardware watchdog driver");
+MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:" DRIVER_NAME);
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -1829,6 +1829,13 @@ config PIC32_DMT
To compile this driver as a loadable module, choose M here.
The module will be called pic32-dmt.
+config AR2315_WDT
+ tristate "Atheros AR2315+ WiSoCs Watchdog Timer"
+ depends on ATH25
+ help
+ Hardware driver for the built-in watchdog timer on the Atheros
+ AR2315/AR2316 WiSoCs.
+
# PARISC Architecture
# POWERPC Architecture
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -161,6 +161,7 @@ obj-$(CONFIG_JZ4740_WDT) += jz4740_wdt.o
obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o
obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o
obj-$(CONFIG_AR7_WDT) += ar7_wdt.o
+obj-$(CONFIG_AR2315_WDT) += ar2315-wtd.o
obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o
octeon-wdt-y := octeon-wdt-main.o octeon-wdt-nmi.o
--- a/arch/mips/ath25/ar2315.c
+++ b/arch/mips/ath25/ar2315.c
@@ -218,6 +218,24 @@ static struct platform_device ar2315_gpi
.num_resources = ARRAY_SIZE(ar2315_gpio_res)
};
+static struct resource ar2315_wdt_res[] = {
+ {
+ .flags = IORESOURCE_MEM,
+ .start = AR2315_RST_BASE + AR2315_WDT_TIMER,
+ .end = AR2315_RST_BASE + AR2315_WDT_TIMER + 8 - 1,
+ },
+ {
+ .flags = IORESOURCE_IRQ,
+ }
+};
+
+static struct platform_device ar2315_wdt = {
+ .id = 0,
+ .name = "ar2315-wdt",
+ .resource = ar2315_wdt_res,
+ .num_resources = ARRAY_SIZE(ar2315_wdt_res)
+};
+
static struct resource ar2315_spiflash_res[] = {
{
.name = "spiflash_read",
@@ -250,6 +268,11 @@ void __init ar2315_init_devices(void)
ar2315_gpio_res[1].end = ar2315_gpio_res[1].start;
platform_device_register(&ar2315_gpio);
+ ar2315_wdt_res[1].start = irq_create_mapping(ar2315_misc_irq_domain,
+ AR2315_MISC_IRQ_WATCHDOG);
+ ar2315_wdt_res[1].end = ar2315_wdt_res[1].start;
+ platform_device_register(&ar2315_wdt);
+
platform_device_register(&ar2315_spiflash);
ar2315_eth_data.macaddr = ath25_board.config->enet0_mac;

View File

@ -1,60 +0,0 @@
--- a/drivers/mtd/parsers/redboot.c
+++ b/drivers/mtd/parsers/redboot.c
@@ -16,6 +16,8 @@
#include <linux/mtd/partitions.h>
#include <linux/module.h>
+#define BOARD_CONFIG_PART "boardconfig"
+
struct fis_image_desc {
unsigned char name[16]; // Null terminated name
u32 flash_base; // Address within FLASH of image
@@ -73,6 +75,7 @@ static int parse_redboot_partitions(stru
const struct mtd_partition **pparts,
struct mtd_part_parser_data *data)
{
+ unsigned long max_offset = 0;
int nrparts = 0;
struct fis_image_desc *buf;
struct mtd_partition *parts;
@@ -239,14 +242,15 @@ nogood:
}
}
#endif
- parts = kzalloc(sizeof(*parts) * nrparts + nulllen + namelen, GFP_KERNEL);
+ parts = kzalloc(sizeof(*parts) * (nrparts + 1) + nulllen + namelen +
+ sizeof(BOARD_CONFIG_PART), GFP_KERNEL);
if (!parts) {
ret = -ENOMEM;
goto out;
}
- nullname = (char *)&parts[nrparts];
+ nullname = (char *)&parts[nrparts + 1];
#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
if (nulllen > 0)
strcpy(nullname, nullstring);
@@ -264,6 +268,8 @@ nogood:
}
#endif
for ( ; i < nrparts; i++) {
+ if (max_offset < buf[i].flash_base + buf[i].size)
+ max_offset = buf[i].flash_base + buf[i].size;
parts[i].size = fl->img->size;
parts[i].offset = fl->img->flash_base;
parts[i].name = names;
@@ -297,6 +303,13 @@ nogood:
fl = fl->next;
kfree(tmp_fl);
}
+ if (master->size - max_offset >= master->erasesize) {
+ parts[nrparts].size = master->size - max_offset;
+ parts[nrparts].offset = max_offset;
+ parts[nrparts].name = names;
+ strcpy(names, BOARD_CONFIG_PART);
+ nrparts++;
+ }
ret = nrparts;
*pparts = parts;
out:

View File

@ -1,44 +0,0 @@
--- a/drivers/mtd/parsers/redboot.c
+++ b/drivers/mtd/parsers/redboot.c
@@ -94,12 +94,18 @@ static int parse_redboot_partitions(stru
parse_redboot_of(master);
+ buf = vmalloc(master->erasesize);
+ if (!buf)
+ return -ENOMEM;
+
+restart:
if (directory < 0) {
offset = master->size + directory * master->erasesize;
while (mtd_block_isbad(master, offset)) {
if (!offset) {
nogood:
pr_notice("Failed to find a non-bad block to check for RedBoot partition table\n");
+ vfree(buf);
return -EIO;
}
offset -= master->erasesize;
@@ -112,10 +118,6 @@ nogood:
goto nogood;
}
}
- buf = vmalloc(master->erasesize);
-
- if (!buf)
- return -ENOMEM;
pr_notice("Searching for RedBoot partition table in %s at offset 0x%lx\n",
master->name, offset);
@@ -187,6 +189,11 @@ nogood:
}
if (i == numslots) {
/* Didn't find it */
+ if (offset + master->erasesize < master->size) {
+ /* not at the end of the flash yet, maybe next block */
+ directory++;
+ goto restart;
+ }
pr_notice("No RedBoot partition table detected in %s\n",
master->name);
ret = 0;

View File

@ -1,83 +0,0 @@
--- a/drivers/mtd/parsers/redboot.c
+++ b/drivers/mtd/parsers/redboot.c
@@ -71,6 +71,22 @@ static void parse_redboot_of(struct mtd_
directory = dirblock;
}
+static uint32_t mtd_get_offset_erasesize(struct mtd_info *mtd, uint64_t offset)
+{
+ struct mtd_erase_region_info *regions = mtd->eraseregions;
+ int i;
+
+ for (i = 0; i < mtd->numeraseregions; i++) {
+ if (regions[i].offset +
+ regions[i].numblocks * regions[i].erasesize <= offset)
+ continue;
+
+ return regions[i].erasesize;
+ }
+
+ return mtd->erasesize;
+}
+
static int parse_redboot_partitions(struct mtd_info *master,
const struct mtd_partition **pparts,
struct mtd_part_parser_data *data)
@@ -87,6 +103,7 @@ static int parse_redboot_partitions(stru
int namelen = 0;
int nulllen = 0;
int numslots;
+ int first_slot;
unsigned long offset;
#ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
static char nullstring[] = "unallocated";
@@ -134,7 +151,9 @@ nogood:
}
numslots = (master->erasesize / sizeof(struct fis_image_desc));
- for (i = 0; i < numslots; i++) {
+ first_slot = (buf[i].flash_base & (master->erasesize - 1)) /
+ sizeof(struct fis_image_desc);
+ for (i = first_slot; i < first_slot + numslots; i++) {
if (!memcmp(buf[i].name, "FIS directory", 14)) {
/* This is apparently the FIS directory entry for the
* FIS directory itself. The FIS directory size is
@@ -200,7 +219,10 @@ nogood:
goto out;
}
- for (i = 0; i < numslots; i++) {
+ first_slot = (buf[i].flash_base & (master->erasesize - 1)) /
+ sizeof(struct fis_image_desc);
+
+ for (i = first_slot; i < first_slot + numslots; i++) {
struct fis_list *new_fl, **prev;
if (buf[i].name[0] == 0xff) {
@@ -275,12 +297,13 @@ nogood:
}
#endif
for ( ; i < nrparts; i++) {
- if (max_offset < buf[i].flash_base + buf[i].size)
- max_offset = buf[i].flash_base + buf[i].size;
parts[i].size = fl->img->size;
parts[i].offset = fl->img->flash_base;
parts[i].name = names;
+ if (max_offset < parts[i].offset + parts[i].size)
+ max_offset = parts[i].offset + parts[i].size;
+
strcpy(names, fl->img->name);
#ifdef CONFIG_MTD_REDBOOT_PARTS_READONLY
if (!memcmp(names, "RedBoot", 8) ||
@@ -310,7 +333,9 @@ nogood:
fl = fl->next;
kfree(tmp_fl);
}
- if (master->size - max_offset >= master->erasesize) {
+
+ if (master->size - max_offset >=
+ mtd_get_offset_erasesize(master, max_offset)) {
parts[nrparts].size = master->size - max_offset;
parts[nrparts].offset = max_offset;
parts[nrparts].name = names;

View File

@ -1,71 +0,0 @@
--- a/arch/mips/ath25/Makefile
+++ b/arch/mips/ath25/Makefile
@@ -8,7 +8,7 @@
# Copyright (C) 2006-2009 Felix Fietkau <nbd@openwrt.org>
#
-obj-y += board.o prom.o devices.o
+obj-y += board.o prom.o devices.o reset.o
obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
--- /dev/null
+++ b/arch/mips/ath25/reset.c
@@ -0,0 +1,57 @@
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+#include <linux/gpio_keys.h>
+#include <linux/input.h>
+#include <ath25_platform.h>
+#include "devices.h"
+
+static int __init
+ar231x_init_reset(void)
+{
+ struct platform_device *pdev;
+ struct gpio_keys_platform_data pdata;
+ struct gpio_keys_button *p;
+ int err;
+
+ if (ath25_board.config->reset_config_gpio == 0xffff)
+ return -ENODEV;
+
+ p = kzalloc(sizeof(*p), GFP_KERNEL);
+ if (!p)
+ goto err;
+
+ p->desc = "reset";
+ p->type = EV_KEY;
+ p->code = KEY_RESTART;
+ p->debounce_interval = 60;
+ p->gpio = ath25_board.config->reset_config_gpio;
+
+ memset(&pdata, 0, sizeof(pdata));
+ pdata.poll_interval = 20;
+ pdata.buttons = p;
+ pdata.nbuttons = 1;
+
+ pdev = platform_device_alloc("gpio-keys-polled", 0);
+ if (!pdev)
+ goto err_free;
+
+ err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
+ if (err)
+ goto err_put_pdev;
+
+ err = platform_device_add(pdev);
+ if (err)
+ goto err_put_pdev;
+
+ return 0;
+
+err_put_pdev:
+ platform_device_put(pdev);
+err_free:
+ kfree(p);
+err:
+ return -ENOMEM;
+}
+
+device_initcall(ar231x_init_reset);

View File

@ -1,111 +0,0 @@
--- a/drivers/net/ethernet/atheros/ar231x/ar231x.c
+++ b/drivers/net/ethernet/atheros/ar231x/ar231x.c
@@ -133,6 +133,7 @@ static int ar231x_mdiobus_write(struct m
static int ar231x_mdiobus_reset(struct mii_bus *bus);
static int ar231x_mdiobus_probe(struct net_device *dev);
static void ar231x_adjust_link(struct net_device *dev);
+static bool no_phy;
#ifndef ERR
#define ERR(fmt, args...) printk("%s: " fmt, __func__, ##args)
@@ -164,6 +165,32 @@ static const struct net_device_ops ar231
#endif
};
+static int get_phy_id(struct mii_bus *bus, int addr, u32 *phy_id)
+{
+ int phy_reg;
+
+ /**
+ * Grab the bits from PHYIR1, and put them
+ * in the upper half.
+ */
+ phy_reg = mdiobus_read(bus, addr, MII_PHYSID1);
+
+ if (phy_reg < 0)
+ return -EIO;
+
+ *phy_id = (phy_reg & 0xffff) << 16;
+
+ /* Grab the bits from PHYIR2, and put them in the lower half */
+ phy_reg = mdiobus_read(bus, addr, MII_PHYSID2);
+
+ if (phy_reg < 0)
+ return -EIO;
+
+ *phy_id |= (phy_reg & 0xffff);
+
+ return 0;
+}
+
static int ar231x_probe(struct platform_device *pdev)
{
struct net_device *dev;
@@ -271,6 +298,24 @@ static int ar231x_probe(struct platform_
mdiobus_register(sp->mii_bus);
+ /**
+ * Workaround for Micrel switch, which is only available on
+ * one PHY and cannot be configured through MDIO.
+ */
+ if (!no_phy) {
+ u32 phy_id = 0;
+
+ get_phy_id(sp->mii_bus, 1, &phy_id);
+ if (phy_id == 0x00221450)
+ no_phy = true;
+ }
+ if (no_phy) {
+ sp->link = 1;
+ netif_carrier_on(dev);
+ return 0;
+ }
+ no_phy = true;
+
if (ar231x_mdiobus_probe(dev) != 0) {
printk(KERN_ERR "%s: mdiobus_probe failed\n", dev->name);
rx_tasklet_cleanup(dev);
@@ -324,8 +369,10 @@ static int ar231x_remove(struct platform
rx_tasklet_cleanup(dev);
ar231x_init_cleanup(dev);
unregister_netdev(dev);
- mdiobus_unregister(sp->mii_bus);
- mdiobus_free(sp->mii_bus);
+ if (sp->mii_bus) {
+ mdiobus_unregister(sp->mii_bus);
+ mdiobus_free(sp->mii_bus);
+ }
kfree(dev);
return 0;
}
@@ -868,7 +915,8 @@ static int ar231x_open(struct net_device
sp->eth_regs->mac_control |= MAC_CONTROL_RE;
- phy_start(sp->phy_dev);
+ if (sp->phy_dev)
+ phy_start(sp->phy_dev);
return 0;
}
@@ -949,7 +997,8 @@ static int ar231x_close(struct net_devic
#endif
- phy_stop(sp->phy_dev);
+ if (sp->phy_dev)
+ phy_stop(sp->phy_dev);
return 0;
}
@@ -993,6 +1042,9 @@ static int ar231x_ioctl(struct net_devic
{
struct ar231x_private *sp = netdev_priv(dev);
+ if (!sp->phy_dev)
+ return -ENODEV;
+
switch (cmd) {
case SIOCGMIIPHY:
case SIOCGMIIREG:

View File

@ -1,116 +0,0 @@
--- a/arch/mips/ath25/ar2315.c
+++ b/arch/mips/ath25/ar2315.c
@@ -24,6 +24,7 @@
#include <linux/reboot.h>
#include <linux/delay.h>
#include <linux/gpio.h>
+#include <linux/leds.h>
#include <asm/bootinfo.h>
#include <asm/reboot.h>
#include <asm/time.h>
@@ -258,6 +259,50 @@ static struct platform_device ar2315_spi
.num_resources = ARRAY_SIZE(ar2315_spiflash_res)
};
+#ifdef CONFIG_LEDS_GPIO
+static struct gpio_led ar2315_leds[6];
+static struct gpio_led_platform_data ar2315_led_data = {
+ .leds = (void *)ar2315_leds,
+};
+
+static struct platform_device ar2315_gpio_leds = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev = {
+ .platform_data = (void *)&ar2315_led_data,
+ }
+};
+
+static void __init ar2315_init_gpio_leds(void)
+{
+ static char led_names[6][6];
+ int i, led = 0;
+
+ ar2315_led_data.num_leds = 0;
+ for (i = 1; i < 8; i++) {
+ if ((i == AR2315_RESET_GPIO) ||
+ (i == ath25_board.config->reset_config_gpio))
+ continue;
+
+ if (i == ath25_board.config->sys_led_gpio)
+ strcpy(led_names[led], "wlan");
+ else
+ sprintf(led_names[led], "gpio%d", i);
+
+ ar2315_leds[led].name = led_names[led];
+ ar2315_leds[led].gpio = i;
+ ar2315_leds[led].active_low = 0;
+ led++;
+ }
+ ar2315_led_data.num_leds = led;
+ platform_device_register(&ar2315_gpio_leds);
+}
+#else
+static inline void ar2315_init_gpio_leds(void)
+{
+}
+#endif
+
void __init ar2315_init_devices(void)
{
/* Find board configuration */
@@ -268,6 +313,8 @@ void __init ar2315_init_devices(void)
ar2315_gpio_res[1].end = ar2315_gpio_res[1].start;
platform_device_register(&ar2315_gpio);
+ ar2315_init_gpio_leds();
+
ar2315_wdt_res[1].start = irq_create_mapping(ar2315_misc_irq_domain,
AR2315_MISC_IRQ_WATCHDOG);
ar2315_wdt_res[1].end = ar2315_wdt_res[1].start;
--- a/arch/mips/ath25/ar5312.c
+++ b/arch/mips/ath25/ar5312.c
@@ -24,6 +24,7 @@
#include <linux/mtd/physmap.h>
#include <linux/reboot.h>
#include <linux/gpio.h>
+#include <linux/leds.h>
#include <asm/bootinfo.h>
#include <asm/reboot.h>
#include <asm/time.h>
@@ -228,6 +229,23 @@ static struct platform_device ar5312_gpi
.num_resources = ARRAY_SIZE(ar5312_gpio_res),
};
+#ifdef CONFIG_LEDS_GPIO
+static struct gpio_led ar5312_leds[] = {
+ { .name = "wlan", .gpio = 0, .active_low = 1, },
+};
+
+static const struct gpio_led_platform_data ar5312_led_data = {
+ .num_leds = ARRAY_SIZE(ar5312_leds),
+ .leds = (void *)ar5312_leds,
+};
+
+static struct platform_device ar5312_gpio_leds = {
+ .name = "leds-gpio",
+ .id = -1,
+ .dev.platform_data = (void *)&ar5312_led_data,
+};
+#endif
+
static void __init ar5312_flash_init(void)
{
void __iomem *flashctl_base;
@@ -298,6 +316,11 @@ void __init ar5312_init_devices(void)
platform_device_register(&ar5312_gpio);
+#ifdef CONFIG_LEDS_GPIO
+ ar5312_leds[0].gpio = config->sys_led_gpio;
+ platform_device_register(&ar5312_gpio_leds);
+#endif
+
/* Fix up MAC addresses if necessary */
if (is_broadcast_ether_addr(config->enet0_mac))
ether_addr_copy(config->enet0_mac, config->enet1_mac);

View File

@ -1,23 +0,0 @@
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -96,6 +96,10 @@ config IP17XX_PHY
tristate "Driver for IC+ IP17xx switches"
select SWCONFIG
+config MVSWITCH_PHY
+ tristate "Driver for Marvell 88E6060 switches"
+ select ETHERNET_PACKET_MANGLE
+
config PSB6970_PHY
tristate "Lantiq XWAY Tantos (PSB6970) Ethernet switch"
select SWCONFIG
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -31,6 +31,7 @@ ar8xxx-y += ar8216.o
ar8xxx-y += ar8327.o
obj-$(CONFIG_SWCONFIG_B53) += b53/
obj-$(CONFIG_IP17XX_PHY) += ip17xx.o
+obj-$(CONFIG_MVSWITCH_PHY) += mvswitch.o
obj-$(CONFIG_PSB6970_PHY) += psb6970.o
obj-$(CONFIG_RTL8306_PHY) += rtl8306.o
obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi.o

View File

@ -1,13 +0,0 @@
# SPDX-License-Identifier: GPL-2.0-only
#
# Copyright (C) 2011 OpenWrt.org
define Profile/Default
NAME:=Default Profile
PRIORITY:=1
endef
define Profile/Default/Description
Default package set compatible with most boards.
endef
$(eval $(call Profile,Default))

View File

@ -11,7 +11,6 @@
aliases {
mdio-gpio1 = &mdio2;
serial0 = &uart;
};
keys {

View File

@ -171,10 +171,6 @@
};
};
&uart {
status = "okay";
};
&mdio0 {
status = "okay";

View File

@ -11,7 +11,6 @@
model = "COMFAST CF-E380AC";
aliases {
serial0 = &uart;
label-mac-device = &eth1;
led-boot = &led_lan;
led-failsafe = &led_lan;

View File

@ -16,7 +16,6 @@
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
serial0 = &uart;
};
keys {

View File

@ -5,29 +5,6 @@
/ {
compatible = "elecom,wab-i1750-ps", "qca,qca9558";
model = "ELECOM WAB-I1750-PS";
ahb {
apb {
/* "SERIAL" port (RJ-45) on the case */
uart1: uart@18500000 {
compatible = "qca,ar9330-uart";
reg = <0x18500000 0x14>;
pinctrl-names = "default";
pinctrl-0 = <&pmx_uart1_in_pins &pmx_uart1_out_pins
&jtag_disable_pins>;
interrupts = <6>;
interrupt-parent = <&miscintc>;
clocks = <&pll ATH79_CLK_UART1>;
clock-names = "uart";
/* QCA955x HS UART is not supported */
status = "disabled";
};
};
};
};
&gpio {
@ -67,3 +44,11 @@
pinctrl-single,bits = <0x3c 0x3010000 0xffff0000>;
};
};
/* "SERIAL" port (RJ-45) on the case */
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pmx_uart1_in_pins &pmx_uart1_out_pins
&jtag_disable_pins>;
status = "okay";
};

View File

@ -10,7 +10,6 @@
led-boot = &led_user;
led-failsafe = &led_user;
led-upgrade = &led_user;
serial0 = &uart;
};
leds {

View File

@ -10,7 +10,6 @@
led-boot = &led_user;
led-failsafe = &led_user;
led-upgrade = &led_user;
serial0 = &uart;
};
leds {

View File

@ -12,7 +12,6 @@
};
aliases {
serial0 = &uart;
led-boot = &led_status_green;
led-failsafe = &led_status_green;
led-running = &led_status_green;

View File

@ -12,7 +12,6 @@
};
aliases {
serial0 = &uart;
led-boot = &led_power_blue;
led-failsafe = &led_power_blue;
led-running = &led_power_blue;

View File

@ -15,7 +15,6 @@
};
aliases {
serial0 = &uart;
led-boot = &led_power_blue;
led-failsafe = &led_power_blue;
led-running = &led_power_blue;

View File

@ -15,7 +15,6 @@
};
aliases {
serial0 = &uart;
led-boot = &led_power_blue;
led-failsafe = &led_power_blue;
led-running = &led_power_blue;

View File

@ -8,6 +8,11 @@
#address-cells = <1>;
#size-cells = <1>;
aliases {
serial0 = &uart0;
serial1 = &uart1;
};
chosen {
bootargs = "console=ttyS0,115200n8";
};
@ -41,7 +46,7 @@
#qca,ddr-wb-channel-cells = <1>;
};
uart: uart@18020000 {
uart0: uart@18020000 {
compatible = "ns16550a";
reg = <0x18020000 0x20>;
@ -178,6 +183,18 @@
#reset-cells = <1>;
};
uart1: uart@18500000 {
compatible = "qca,ar9330-uart";
reg = <0x18500000 0x14>;
interrupts = <6>;
clocks = <&pll ATH79_CLK_REF>;
clock-names = "uart";
status = "disabled";
};
};
gmac: gmac@18070000 {

View File

@ -227,10 +227,6 @@
};
};
&uart {
status = "okay";
};
&usb_phy0 {
status = "okay";
};

View File

@ -86,7 +86,7 @@ SVN-Revision: 35130
} while (word != stop);
return csum_fold(csum);
@@ -182,73 +186,6 @@ static inline __sum16 ip_compute_csum(co
@@ -182,74 +186,6 @@ static inline __sum16 ip_compute_csum(co
return csum_fold(csum_partial(buff, len, 0));
}
@ -152,7 +152,8 @@ SVN-Revision: 35130
- " .set pop"
- : "=&r" (sum), "=&r" (tmp)
- : "r" (saddr), "r" (daddr),
- "0" (htonl(len)), "r" (htonl(proto)), "r" (sum));
- "0" (htonl(len)), "r" (htonl(proto)), "r" (sum)
- : "memory");
-
- return csum_fold(sum);
-}
@ -336,7 +337,7 @@ SVN-Revision: 35130
#endif /* _LINUX_TYPES_H */
--- a/net/ipv4/af_inet.c
+++ b/net/ipv4/af_inet.c
@@ -1477,8 +1477,8 @@ struct sk_buff *inet_gro_receive(struct
@@ -1480,8 +1480,8 @@ struct sk_buff *inet_gro_receive(struct
if (unlikely(ip_fast_csum((u8 *)iph, 5)))
goto out_unlock;

View File

@ -45,7 +45,7 @@ Submitted-by: Christopher Hill <ch6574@gmail.com>
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -2176,6 +2176,14 @@ config RAVE_SP_CORE
@@ -2177,6 +2177,14 @@ config RAVE_SP_CORE
Select this to get support for the Supervisory Processor
device found on several devices in RAVE line of hardware.

View File

@ -1,44 +0,0 @@
From 9fb90ae6cae7f8fe4fbf626945f32cd9da2c3892 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Mon, 20 Sep 2021 16:10:23 +0200
Subject: [PATCH] ARM: dts: BCM53573: Describe on-SoC BCM53125 rev 4 switch
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
BCM53573 family SoC have Ethernet switch connected to the first Ethernet
controller (accessible over MDIO).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm53573.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
--- a/arch/arm/boot/dts/bcm53573.dtsi
+++ b/arch/arm/boot/dts/bcm53573.dtsi
@@ -183,6 +183,24 @@
gmac0: ethernet@5000 {
reg = <0x5000 0x1000>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ switch: switch@1e {
+ compatible = "brcm,bcm53125";
+ reg = <0x1e>;
+
+ status = "disabled";
+
+ /* ports are defined in board DTS */
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+ };
};
gmac1: ethernet@b000 {

View File

@ -781,7 +781,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
@@ -39,7 +39,7 @@
@@ -38,7 +38,7 @@
gpio-keys {
compatible = "gpio-keys";
@ -792,7 +792,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
@@ -49,7 +49,7 @@
@@ -47,7 +47,7 @@
gpio-keys {
compatible = "gpio-keys";

View File

@ -1514,7 +1514,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
};
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
@@ -23,13 +23,13 @@
@@ -23,12 +23,12 @@
leds {
compatible = "gpio-leds";
@ -1522,7 +1522,6 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+ led-wlan {
label = "bcm53xx:blue:wlan";
gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
- system {
@ -1532,7 +1531,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
linux,default-trigger = "timer";
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
@@ -20,26 +20,26 @@
@@ -20,25 +20,25 @@
reg = <0x00000000 0x08000000>;
};
@ -1544,7 +1543,6 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+ led-5ghz {
label = "bcm53xx:blue:5ghz";
gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
- system {
@ -1563,7 +1561,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
+ led-2ghz {
label = "bcm53xx:blue:2ghz";
gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
--- a/arch/arm/boot/dts/bcm47189-tenda-ac9.dts
+++ b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts
@@ -20,37 +20,37 @@

View File

@ -1,57 +0,0 @@
From be7e1e5b0f67c58ec4be0a54db23b6a4fa6e2116 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 13:40:01 +0200
Subject: [PATCH] ARM: dts: BCM53573: Drop nonexistent "default-off" LED
trigger
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
There is no such trigger documented or implemented in Linux. It was a
copy & paste mistake.
This fixes:
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dtb: leds: led-wlan:linux,default-trigger: 'oneOf' conditional failed, one must be fixed:
'default-off' is not one of ['backlight', 'default-on', 'heartbeat', 'disk-activity', 'disk-read', 'disk-write', 'timer', 'pattern', 'audio-micmute', 'audio-mute', 'bluetooth-power', 'flash', 'kbd-capslock', 'mtd', 'nand-disk', 'none', 'torch', 'usb-gadget', 'usb-host', 'usbport']
'default-off' does not match '^cpu[0-9]*$'
'default-off' does not match '^hci[0-9]+-power$'
'default-off' does not match '^mmc[0-9]+$'
'default-off' does not match '^phy[0-9]+tx$'
From schema: Documentation/devicetree/bindings/leds/leds-gpio.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707114004.2740-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dts | 1 -
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-810.dts | 2 --
2 files changed, 3 deletions(-)
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts
@@ -26,7 +26,6 @@
led-wlan {
label = "bcm53xx:blue:wlan";
gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
- linux,default-trigger = "default-off";
};
led-system {
--- a/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
+++ b/arch/arm/boot/dts/bcm47189-luxul-xap-810.dts
@@ -26,7 +26,6 @@
led-5ghz {
label = "bcm53xx:blue:5ghz";
gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "default-off";
};
led-system {
@@ -42,7 +41,6 @@
led-2ghz {
label = "bcm53xx:blue:2ghz";
gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "default-off";
};
};

View File

@ -1,32 +0,0 @@
From 05d2c3d552b8c92fc397377d9d1112fc58e2cd59 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 7 Jul 2023 13:40:02 +0200
Subject: [PATCH] ARM: dts: BCM53573: Drop nonexistent #usb-cells
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Such property simply doesn't exist (is not documented or used anywhere).
This fixes:
arch/arm/boot/dts/broadcom/bcm47189-luxul-xap-1440.dtb: usb@d000: Unevaluated properties are not allowed ('#usb-cells' was unexpected)
From schema: Documentation/devicetree/bindings/usb/generic-ohci.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20230707114004.2740-2-zajec5@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
---
arch/arm/boot/dts/broadcom/bcm53573.dtsi | 2 --
1 file changed, 2 deletions(-)
--- a/arch/arm/boot/dts/bcm53573.dtsi
+++ b/arch/arm/boot/dts/bcm53573.dtsi
@@ -159,8 +159,6 @@
};
ohci: usb@d000 {
- #usb-cells = <0>;
-
compatible = "generic-ohci";
reg = <0xd000 0x1000>;
interrupt-parent = <&gic>;

View File

@ -109,7 +109,7 @@ it on BCM4708 family.
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1908,6 +1908,7 @@ struct xhci_hcd {
@@ -1907,6 +1907,7 @@ struct xhci_hcd {
#define XHCI_RESET_TO_DEFAULT BIT_ULL(44)
#define XHCI_ZHAOXIN_TRB_FETCH BIT_ULL(45)
#define XHCI_ZHAOXIN_HOST BIT_ULL(46)

View File

@ -73,7 +73,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -1298,6 +1298,14 @@ config ARCH_HAS_ELFCORE_COMPAT
@@ -1299,6 +1299,14 @@ config ARCH_HAS_ELFCORE_COMPAT
config ARCH_HAS_PARANOID_L1D_FLUSH
bool

View File

@ -538,7 +538,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
(1UL << PG_private | 1UL << PG_private_2)
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -911,6 +911,10 @@ struct task_struct {
@@ -907,6 +907,10 @@ struct task_struct {
#ifdef CONFIG_MEMCG
unsigned in_user_fault:1;
#endif

View File

@ -31,15 +31,15 @@ Signed-off-by: Vinod Koul <vkoul@kernel.org>
--- a/drivers/ata/ahci.h
+++ b/drivers/ata/ahci.h
@@ -241,8 +241,6 @@ enum {
@@ -240,8 +240,6 @@ enum {
as default lpm_policy */
AHCI_HFLAG_SUSPEND_PHYS = BIT(26), /* handle PHYs during
suspend/resume */
- AHCI_HFLAG_IGN_NOTSUPP_POWER_ON = BIT(27), /* ignore -EOPNOTSUPP
- from phy_power_on() */
AHCI_HFLAG_NO_SXS = BIT(28), /* SXS not supported */
AHCI_HFLAG_43BIT_ONLY = BIT(29), /* 43bit DMA addr limit */
/* ap->flags bits */
--- a/drivers/ata/ahci_mvebu.c
+++ b/drivers/ata/ahci_mvebu.c
@@ -227,7 +227,7 @@ static const struct ahci_mvebu_plat_data

View File

@ -138,7 +138,7 @@ Signed-off-by: Vinod Koul <vkoul@kernel.org>
.init_quirk = xhci_mvebu_a3700_init_quirk,
};
@@ -341,14 +330,7 @@ static int xhci_plat_probe(struct platfo
@@ -344,14 +333,7 @@ static int xhci_plat_probe(struct platfo
hcd->tpl_support = of_usb_host_tpl_support(sysdev->of_node);
xhci->shared_hcd->tpl_support = hcd->tpl_support;

View File

@ -726,7 +726,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
* to advertise both, only report advertising at 2500BaseX.
--- a/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
+++ b/drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c
@@ -6352,15 +6352,14 @@ static void mvpp2_phylink_validate(struc
@@ -6377,15 +6377,14 @@ static void mvpp2_phylink_validate(struc
goto empty_set;
}

View File

@ -71,7 +71,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
ret = stmmac_hw_setup(dev, true);
if (ret < 0) {
netdev_err(priv->dev, "%s: Hw setup failed\n", __func__);
@@ -6430,6 +6423,7 @@ void stmmac_enable_rx_queue(struct stmma
@@ -6410,6 +6403,7 @@ void stmmac_enable_rx_queue(struct stmma
return;
}
@ -79,7 +79,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
stmmac_clear_rx_descriptors(priv, queue);
stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
@@ -6491,6 +6485,7 @@ void stmmac_enable_tx_queue(struct stmma
@@ -6471,6 +6465,7 @@ void stmmac_enable_tx_queue(struct stmma
return;
}
@ -87,7 +87,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
stmmac_clear_tx_descriptors(priv, queue);
stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
@@ -7415,6 +7410,25 @@ int stmmac_suspend(struct device *dev)
@@ -7398,6 +7393,25 @@ int stmmac_suspend(struct device *dev)
}
EXPORT_SYMBOL_GPL(stmmac_suspend);
@ -113,7 +113,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
/**
* stmmac_reset_queues_param - reset queue parameters
* @priv: device pointer
@@ -7425,22 +7439,11 @@ static void stmmac_reset_queues_param(st
@@ -7408,22 +7422,11 @@ static void stmmac_reset_queues_param(st
u32 tx_cnt = priv->plat->tx_queues_to_use;
u32 queue;

View File

@ -1033,7 +1033,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
/* Data payload appended into SKB */
page_pool_release_page(rx_q->page_pool, buf->sec_page);
@@ -5768,11 +5768,13 @@ static irqreturn_t stmmac_safety_interru
@@ -5758,11 +5758,13 @@ static irqreturn_t stmmac_safety_interru
static irqreturn_t stmmac_msi_intr_tx(int irq, void *data)
{
struct stmmac_tx_queue *tx_q = (struct stmmac_tx_queue *)data;
@ -1046,9 +1046,9 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+ dma_conf = container_of(tx_q, struct stmmac_dma_conf, tx_queue[chan]);
+ priv = container_of(dma_conf, struct stmmac_priv, dma_conf);
if (unlikely(!data)) {
netdev_err(priv->dev, "%s: invalid dev pointer\n", __func__);
@@ -5812,10 +5814,12 @@ static irqreturn_t stmmac_msi_intr_tx(in
/* Check if adapter is up */
if (test_bit(STMMAC_DOWN, &priv->state))
@@ -5797,10 +5799,12 @@ static irqreturn_t stmmac_msi_intr_tx(in
static irqreturn_t stmmac_msi_intr_rx(int irq, void *data)
{
struct stmmac_rx_queue *rx_q = (struct stmmac_rx_queue *)data;
@ -1060,9 +1060,9 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+ dma_conf = container_of(rx_q, struct stmmac_dma_conf, rx_queue[chan]);
+ priv = container_of(dma_conf, struct stmmac_priv, dma_conf);
if (unlikely(!data)) {
netdev_err(priv->dev, "%s: invalid dev pointer\n", __func__);
@@ -5846,10 +5850,10 @@ static void stmmac_poll_controller(struc
/* Check if adapter is up */
if (test_bit(STMMAC_DOWN, &priv->state))
@@ -5826,10 +5830,10 @@ static void stmmac_poll_controller(struc
if (priv->plat->multi_msi_en) {
for (i = 0; i < priv->plat->rx_queues_to_use; i++)
@ -1075,7 +1075,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
} else {
disable_irq(dev->irq);
stmmac_interrupt(dev->irq, dev);
@@ -6030,34 +6034,34 @@ static int stmmac_rings_status_show(stru
@@ -6010,34 +6014,34 @@ static int stmmac_rings_status_show(stru
return 0;
for (queue = 0; queue < rx_count; queue++) {
@ -1116,7 +1116,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
}
}
@@ -6404,7 +6408,7 @@ void stmmac_disable_rx_queue(struct stmm
@@ -6384,7 +6388,7 @@ void stmmac_disable_rx_queue(struct stmm
void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue)
{
@ -1125,7 +1125,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
struct stmmac_channel *ch = &priv->channel[queue];
unsigned long flags;
u32 buf_size;
@@ -6441,7 +6445,7 @@ void stmmac_enable_rx_queue(struct stmma
@@ -6421,7 +6425,7 @@ void stmmac_enable_rx_queue(struct stmma
rx_q->queue_index);
} else {
stmmac_set_dma_bfsize(priv, priv->ioaddr,
@ -1134,7 +1134,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
rx_q->queue_index);
}
@@ -6467,7 +6471,7 @@ void stmmac_disable_tx_queue(struct stmm
@@ -6447,7 +6451,7 @@ void stmmac_disable_tx_queue(struct stmm
void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue)
{
@ -1143,7 +1143,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
struct stmmac_channel *ch = &priv->channel[queue];
unsigned long flags;
int ret;
@@ -6517,7 +6521,7 @@ void stmmac_xdp_release(struct net_devic
@@ -6497,7 +6501,7 @@ void stmmac_xdp_release(struct net_devic
stmmac_disable_all_queues(priv);
for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)
@ -1152,7 +1152,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
/* Free the IRQ lines */
stmmac_free_irq(dev, REQ_IRQ_ERR_ALL, 0);
@@ -6576,7 +6580,7 @@ int stmmac_xdp_open(struct net_device *d
@@ -6556,7 +6560,7 @@ int stmmac_xdp_open(struct net_device *d
/* DMA RX Channel Configuration */
for (chan = 0; chan < rx_cnt; chan++) {
@ -1161,7 +1161,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
rx_q->dma_rx_phy, chan);
@@ -6594,7 +6598,7 @@ int stmmac_xdp_open(struct net_device *d
@@ -6574,7 +6578,7 @@ int stmmac_xdp_open(struct net_device *d
rx_q->queue_index);
} else {
stmmac_set_dma_bfsize(priv, priv->ioaddr,
@ -1170,7 +1170,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
rx_q->queue_index);
}
@@ -6603,7 +6607,7 @@ int stmmac_xdp_open(struct net_device *d
@@ -6583,7 +6587,7 @@ int stmmac_xdp_open(struct net_device *d
/* DMA TX Channel Configuration */
for (chan = 0; chan < tx_cnt; chan++) {
@ -1179,7 +1179,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
tx_q->dma_tx_phy, chan);
@@ -6636,7 +6640,7 @@ int stmmac_xdp_open(struct net_device *d
@@ -6616,7 +6620,7 @@ int stmmac_xdp_open(struct net_device *d
irq_error:
for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)
@ -1188,7 +1188,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
stmmac_hw_teardown(dev);
init_error:
@@ -6663,8 +6667,8 @@ int stmmac_xsk_wakeup(struct net_device
@@ -6643,8 +6647,8 @@ int stmmac_xsk_wakeup(struct net_device
queue >= priv->plat->tx_queues_to_use)
return -EINVAL;
@ -1199,7 +1199,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
ch = &priv->channel[queue];
if (!rx_q->xsk_pool && !tx_q->xsk_pool)
@@ -6924,8 +6928,8 @@ int stmmac_reinit_ringparam(struct net_d
@@ -6904,8 +6908,8 @@ int stmmac_reinit_ringparam(struct net_d
if (netif_running(dev))
stmmac_release(dev);
@ -1210,7 +1210,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
if (netif_running(dev))
ret = stmmac_open(dev);
@@ -7360,7 +7364,7 @@ int stmmac_suspend(struct device *dev)
@@ -7343,7 +7347,7 @@ int stmmac_suspend(struct device *dev)
stmmac_disable_all_queues(priv);
for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)
@ -1219,7 +1219,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
if (priv->eee_enabled) {
priv->tx_path_in_lpi_mode = false;
@@ -7412,7 +7416,7 @@ EXPORT_SYMBOL_GPL(stmmac_suspend);
@@ -7395,7 +7399,7 @@ EXPORT_SYMBOL_GPL(stmmac_suspend);
static void stmmac_reset_rx_queue(struct stmmac_priv *priv, u32 queue)
{
@ -1228,7 +1228,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
rx_q->cur_rx = 0;
rx_q->dirty_rx = 0;
@@ -7420,7 +7424,7 @@ static void stmmac_reset_rx_queue(struct
@@ -7403,7 +7407,7 @@ static void stmmac_reset_rx_queue(struct
static void stmmac_reset_tx_queue(struct stmmac_priv *priv, u32 queue)
{

View File

@ -1045,7 +1045,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
/* Disable the MAC Rx/Tx */
stmmac_mac_set(priv, priv->ioaddr, false);
@@ -6403,7 +6519,7 @@ void stmmac_disable_rx_queue(struct stmm
@@ -6383,7 +6499,7 @@ void stmmac_disable_rx_queue(struct stmm
spin_unlock_irqrestore(&ch->lock, flags);
stmmac_stop_rx_dma(priv, queue);
@ -1054,7 +1054,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
}
void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue)
@@ -6414,21 +6530,21 @@ void stmmac_enable_rx_queue(struct stmma
@@ -6394,21 +6510,21 @@ void stmmac_enable_rx_queue(struct stmma
u32 buf_size;
int ret;
@ -1080,7 +1080,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
rx_q->dma_rx_phy, rx_q->queue_index);
@@ -6466,7 +6582,7 @@ void stmmac_disable_tx_queue(struct stmm
@@ -6446,7 +6562,7 @@ void stmmac_disable_tx_queue(struct stmm
spin_unlock_irqrestore(&ch->lock, flags);
stmmac_stop_tx_dma(priv, queue);
@ -1089,7 +1089,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
}
void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue)
@@ -6476,21 +6592,21 @@ void stmmac_enable_tx_queue(struct stmma
@@ -6456,21 +6572,21 @@ void stmmac_enable_tx_queue(struct stmma
unsigned long flags;
int ret;
@ -1115,7 +1115,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
tx_q->dma_tx_phy, tx_q->queue_index);
@@ -6530,7 +6646,7 @@ void stmmac_xdp_release(struct net_devic
@@ -6510,7 +6626,7 @@ void stmmac_xdp_release(struct net_devic
stmmac_stop_all_dma(priv);
/* Release and free the Rx/Tx resources */
@ -1124,7 +1124,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
/* Disable the MAC Rx/Tx */
stmmac_mac_set(priv, priv->ioaddr, false);
@@ -6555,14 +6671,14 @@ int stmmac_xdp_open(struct net_device *d
@@ -6535,14 +6651,14 @@ int stmmac_xdp_open(struct net_device *d
u32 chan;
int ret;
@ -1141,7 +1141,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
if (ret < 0) {
netdev_err(dev, "%s: DMA descriptors initialization failed\n",
__func__);
@@ -6644,7 +6760,7 @@ irq_error:
@@ -6624,7 +6740,7 @@ irq_error:
stmmac_hw_teardown(dev);
init_error:
@ -1150,7 +1150,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
dma_desc_error:
return ret;
}
@@ -7507,7 +7623,7 @@ int stmmac_resume(struct device *dev)
@@ -7490,7 +7606,7 @@ int stmmac_resume(struct device *dev)
stmmac_reset_queues_param(priv);
stmmac_free_tx_skbufs(priv);

View File

@ -4158,15 +4158,12 @@ CONFIG_NET_IPGRE_BROADCAST=y
CONFIG_NET_RX_BUSY_POLL=y
# CONFIG_NET_SB1000 is not set
CONFIG_NET_SCHED=y
# CONFIG_NET_SCH_ATM is not set
# CONFIG_NET_SCH_CAKE is not set
# CONFIG_NET_SCH_CBQ is not set
# CONFIG_NET_SCH_CBS is not set
# CONFIG_NET_SCH_CHOKE is not set
# CONFIG_NET_SCH_CODEL is not set
CONFIG_NET_SCH_DEFAULT=y
# CONFIG_NET_SCH_DRR is not set
# CONFIG_NET_SCH_DSMARK is not set
# CONFIG_NET_SCH_ETF is not set
# CONFIG_NET_SCH_ETS is not set
CONFIG_NET_SCH_FIFO=y

View File

@ -2184,6 +2184,7 @@ CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_FORCE_NR_CPUS is not set
CONFIG_FORTIFY_SOURCE=y
# CONFIG_FPGA is not set
# CONFIG_FPROBE is not set
# CONFIG_FRAMEBUFFER_CONSOLE is not set
# CONFIG_FRAMEBUFFER_CONSOLE_DEFERRED_TAKEOVER is not set
# CONFIG_FRAMEBUFFER_CONSOLE_LEGACY_ACCELERATION is not set
@ -4318,15 +4319,12 @@ CONFIG_NET_IPGRE_BROADCAST=y
CONFIG_NET_RX_BUSY_POLL=y
# CONFIG_NET_SB1000 is not set
CONFIG_NET_SCHED=y
# CONFIG_NET_SCH_ATM is not set
# CONFIG_NET_SCH_CAKE is not set
# CONFIG_NET_SCH_CBQ is not set
# CONFIG_NET_SCH_CBS is not set
# CONFIG_NET_SCH_CHOKE is not set
# CONFIG_NET_SCH_CODEL is not set
CONFIG_NET_SCH_DEFAULT=y
# CONFIG_NET_SCH_DRR is not set
# CONFIG_NET_SCH_DSMARK is not set
# CONFIG_NET_SCH_ETF is not set
# CONFIG_NET_SCH_ETS is not set
CONFIG_NET_SCH_FIFO=y

View File

@ -98,7 +98,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
obj-$(CONFIG_NETFILTER_XT_TARGET_LED) += xt_LED.o
--- /dev/null
+++ b/net/netfilter/xt_FLOWOFFLOAD.c
@@ -0,0 +1,698 @@
@@ -0,0 +1,701 @@
+/*
+ * Copyright (C) 2018-2021 Felix Fietkau <nbd@nbd.name>
+ *
@ -544,10 +544,15 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+ break;
+ }
+
+ nf_route(xt_net(par), &other_dst, &fl, false, xt_family(par));
+ if (!other_dst)
+ if (!dst_hold_safe(this_dst))
+ return -ENOENT;
+
+ nf_route(xt_net(par), &other_dst, &fl, false, xt_family(par));
+ if (!other_dst) {
+ dst_release(this_dst);
+ return -ENOENT;
+ }
+
+ nf_default_forward_path(route, this_dst, dir, devs);
+ nf_default_forward_path(route, other_dst, !dir, devs);
+
@ -622,8 +627,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+ if (!flow)
+ goto err_flow_alloc;
+
+ if (flow_offload_route_init(flow, &route) < 0)
+ goto err_flow_add;
+ flow_offload_route_init(flow, &route);
+
+ if (tcph) {
+ ct->proto.tcp.seen[0].flags |= IP_CT_TCP_FLAG_BE_LIBERAL;
@ -642,13 +646,12 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+ xt_flowoffload_check_device(table, devs[0]);
+ xt_flowoffload_check_device(table, devs[1]);
+
+ dst_release(route.tuple[!dir].dst);
+
+ return XT_CONTINUE;
+
+err_flow_add:
+ flow_offload_free(flow);
+err_flow_alloc:
+ dst_release(route.tuple[dir].dst);
+ dst_release(route.tuple[!dir].dst);
+err_flow_route:
+ clear_bit(IPS_OFFLOAD_BIT, &ct->status);
@ -807,7 +810,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#include <net/netfilter/nf_flow_table.h>
#include <net/netfilter/nf_conntrack.h>
#include <net/netfilter/nf_conntrack_core.h>
@@ -380,8 +379,7 @@ flow_offload_lookup(struct nf_flowtable
@@ -373,8 +372,7 @@ flow_offload_lookup(struct nf_flowtable
}
EXPORT_SYMBOL_GPL(flow_offload_lookup);
@ -817,7 +820,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
void (*iter)(struct nf_flowtable *flowtable,
struct flow_offload *flow, void *data),
void *data)
@@ -435,6 +433,7 @@ static void nf_flow_offload_gc_step(stru
@@ -428,6 +426,7 @@ static void nf_flow_offload_gc_step(stru
nf_flow_offload_stats(flow_table, flow);
}
}

View File

@ -106,7 +106,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
}
--- a/scripts/link-vmlinux.sh
+++ b/scripts/link-vmlinux.sh
@@ -257,6 +257,10 @@ kallsyms()
@@ -262,6 +262,10 @@ kallsyms()
kallsymopt="${kallsymopt} --base-relative"
fi

View File

@ -16,7 +16,7 @@ Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
+config MTD_MYLOADER_PARTS
+ tristate "MyLoader partition parsing"
+ depends on ADM5120 || ATH25 || ATH79
+ depends on ADM5120 || ATH79
+ help
+ MyLoader is a bootloader which allows the user to define partitions
+ in flash devices, by putting a table in the second erase block

View File

@ -1,32 +0,0 @@
From cb1d41b99e4afa062f904339666fae2578559718 Mon Sep 17 00:00:00 2001
From: Namjae Jeon <linkinjeon@kernel.org>
Date: Mon, 15 Jan 2024 10:24:54 +0900
Subject: [PATCH] ksmbd: only v2 leases handle the directory
When smb2 leases is disable, ksmbd can send oplock break notification
and cause wait oplock break ack timeout. It may appear like hang when
accessing a directory. This patch make only v2 leases handle the
directory.
Cc: stable@vger.kernel.org
Signed-off-by: Namjae Jeon <linkinjeon@kernel.org>
Signed-off-by: Steve French <stfrench@microsoft.com>
---
fs/ksmbd/oplock.c | 6 ++++++
1 file changed, 6 insertions(+)
--- a/fs/ksmbd/oplock.c
+++ b/fs/ksmbd/oplock.c
@@ -1191,6 +1191,12 @@ int smb_grant_oplock(struct ksmbd_work *
bool prev_op_has_lease;
__le32 prev_op_state = 0;
+ /* Only v2 leases handle the directory */
+ if (S_ISDIR(file_inode(fp->filp)->i_mode)) {
+ if (!lctx || lctx->version != 2)
+ return 0;
+ }
+
opinfo = alloc_opinfo(work, pid, tid);
if (!opinfo)
return -ENOMEM;

View File

@ -275,8 +275,8 @@ Signed-off-by: Steven Barth <cyrus@openwrt.org>
static int __ip6_tnl_rcv(struct ip6_tnl *tunnel, struct sk_buff *skb,
const struct tnl_ptk_info *tpi,
struct metadata_dst *tun_dst,
@@ -843,6 +969,27 @@ static int __ip6_tnl_rcv(struct ip6_tnl
skb_reset_network_header(skb);
@@ -857,6 +983,27 @@ static int __ip6_tnl_rcv(struct ip6_tnl
memset(skb->cb, 0, sizeof(struct inet6_skb_parm));
+ if (tpi->proto == htons(ETH_P_IP) && tunnel->parms.fmrs &&
@ -303,7 +303,7 @@ Signed-off-by: Steven Barth <cyrus@openwrt.org>
__skb_tunnel_rx(skb, tunnel->dev, tunnel->net);
err = dscp_ecn_decapsulate(tunnel, ipv6h, skb);
@@ -994,6 +1141,7 @@ static void init_tel_txopt(struct ipv6_t
@@ -1004,6 +1151,7 @@ static void init_tel_txopt(struct ipv6_t
opt->ops.opt_nflen = 8;
}
@ -311,7 +311,7 @@ Signed-off-by: Steven Barth <cyrus@openwrt.org>
/**
* ip6_tnl_addr_conflict - compare packet addresses to tunnel's own
* @t: the outgoing tunnel device
@@ -1274,6 +1422,7 @@ ipxip6_tnl_xmit(struct sk_buff *skb, str
@@ -1284,6 +1432,7 @@ ipxip6_tnl_xmit(struct sk_buff *skb, str
u8 protocol)
{
struct ip6_tnl *t = netdev_priv(dev);
@ -319,7 +319,7 @@ Signed-off-by: Steven Barth <cyrus@openwrt.org>
struct ipv6hdr *ipv6h;
const struct iphdr *iph;
int encap_limit = -1;
@@ -1373,6 +1522,18 @@ ipxip6_tnl_xmit(struct sk_buff *skb, str
@@ -1383,6 +1532,18 @@ ipxip6_tnl_xmit(struct sk_buff *skb, str
fl6.flowi6_uid = sock_net_uid(dev_net(dev), NULL);
dsfield = INET_ECN_encapsulate(dsfield, orig_dsfield);
@ -338,7 +338,7 @@ Signed-off-by: Steven Barth <cyrus@openwrt.org>
if (iptunnel_handle_offloads(skb, SKB_GSO_IPXIP6))
return -1;
@@ -1526,6 +1687,14 @@ ip6_tnl_change(struct ip6_tnl *t, const
@@ -1536,6 +1697,14 @@ ip6_tnl_change(struct ip6_tnl *t, const
t->parms.link = p->link;
t->parms.proto = p->proto;
t->parms.fwmark = p->fwmark;
@ -353,7 +353,7 @@ Signed-off-by: Steven Barth <cyrus@openwrt.org>
dst_cache_reset(&t->dst_cache);
ip6_tnl_link_config(t);
return 0;
@@ -1564,6 +1733,7 @@ ip6_tnl_parm_from_user(struct __ip6_tnl_
@@ -1574,6 +1743,7 @@ ip6_tnl_parm_from_user(struct __ip6_tnl_
p->flowinfo = u->flowinfo;
p->link = u->link;
p->proto = u->proto;
@ -361,7 +361,7 @@ Signed-off-by: Steven Barth <cyrus@openwrt.org>
memcpy(p->name, u->name, sizeof(u->name));
}
@@ -1950,6 +2120,15 @@ static int ip6_tnl_validate(struct nlatt
@@ -1960,6 +2130,15 @@ static int ip6_tnl_validate(struct nlatt
return 0;
}
@ -377,7 +377,7 @@ Signed-off-by: Steven Barth <cyrus@openwrt.org>
static void ip6_tnl_netlink_parms(struct nlattr *data[],
struct __ip6_tnl_parm *parms)
{
@@ -1987,6 +2166,46 @@ static void ip6_tnl_netlink_parms(struct
@@ -1997,6 +2176,46 @@ static void ip6_tnl_netlink_parms(struct
if (data[IFLA_IPTUN_FWMARK])
parms->fwmark = nla_get_u32(data[IFLA_IPTUN_FWMARK]);
@ -424,7 +424,7 @@ Signed-off-by: Steven Barth <cyrus@openwrt.org>
}
static bool ip6_tnl_netlink_encap_parms(struct nlattr *data[],
@@ -2102,6 +2321,12 @@ static void ip6_tnl_dellink(struct net_d
@@ -2112,6 +2331,12 @@ static void ip6_tnl_dellink(struct net_d
static size_t ip6_tnl_get_size(const struct net_device *dev)
{
@ -437,7 +437,7 @@ Signed-off-by: Steven Barth <cyrus@openwrt.org>
return
/* IFLA_IPTUN_LINK */
nla_total_size(4) +
@@ -2131,6 +2356,24 @@ static size_t ip6_tnl_get_size(const str
@@ -2141,6 +2366,24 @@ static size_t ip6_tnl_get_size(const str
nla_total_size(0) +
/* IFLA_IPTUN_FWMARK */
nla_total_size(4) +
@ -462,7 +462,7 @@ Signed-off-by: Steven Barth <cyrus@openwrt.org>
0;
}
@@ -2138,6 +2381,9 @@ static int ip6_tnl_fill_info(struct sk_b
@@ -2148,6 +2391,9 @@ static int ip6_tnl_fill_info(struct sk_b
{
struct ip6_tnl *tunnel = netdev_priv(dev);
struct __ip6_tnl_parm *parm = &tunnel->parms;
@ -472,7 +472,7 @@ Signed-off-by: Steven Barth <cyrus@openwrt.org>
if (nla_put_u32(skb, IFLA_IPTUN_LINK, parm->link) ||
nla_put_in6_addr(skb, IFLA_IPTUN_LOCAL, &parm->laddr) ||
@@ -2147,9 +2393,27 @@ static int ip6_tnl_fill_info(struct sk_b
@@ -2157,9 +2403,27 @@ static int ip6_tnl_fill_info(struct sk_b
nla_put_be32(skb, IFLA_IPTUN_FLOWINFO, parm->flowinfo) ||
nla_put_u32(skb, IFLA_IPTUN_FLAGS, parm->flags) ||
nla_put_u8(skb, IFLA_IPTUN_PROTO, parm->proto) ||
@ -501,7 +501,7 @@ Signed-off-by: Steven Barth <cyrus@openwrt.org>
if (nla_put_u16(skb, IFLA_IPTUN_ENCAP_TYPE, tunnel->encap.type) ||
nla_put_be16(skb, IFLA_IPTUN_ENCAP_SPORT, tunnel->encap.sport) ||
nla_put_be16(skb, IFLA_IPTUN_ENCAP_DPORT, tunnel->encap.dport) ||
@@ -2189,6 +2453,7 @@ static const struct nla_policy ip6_tnl_p
@@ -2199,6 +2463,7 @@ static const struct nla_policy ip6_tnl_p
[IFLA_IPTUN_ENCAP_DPORT] = { .type = NLA_U16 },
[IFLA_IPTUN_COLLECT_METADATA] = { .type = NLA_FLAG },
[IFLA_IPTUN_FWMARK] = { .type = NLA_U32 },

View File

@ -10,7 +10,7 @@ Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
--- a/net/netfilter/nf_flow_table_core.c
+++ b/net/netfilter/nf_flow_table_core.c
@@ -613,13 +613,41 @@ void nf_flow_table_free(struct nf_flowta
@@ -606,13 +606,41 @@ void nf_flow_table_free(struct nf_flowta
}
EXPORT_SYMBOL_GPL(nf_flow_table_free);
@ -55,7 +55,7 @@ Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
--- a/net/netfilter/nft_flow_offload.c
+++ b/net/netfilter/nft_flow_offload.c
@@ -446,47 +446,14 @@ static struct nft_expr_type nft_flow_off
@@ -455,47 +455,14 @@ static struct nft_expr_type nft_flow_off
.owner = THIS_MODULE,
};

View File

@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
@@ -7752,7 +7752,7 @@ static int nft_register_flowtable_net_ho
@@ -7763,7 +7763,7 @@ static int nft_register_flowtable_net_ho
err = flowtable->data.type->setup(&flowtable->data,
hook->ops.dev,
FLOW_BLOCK_BIND);

View File

@ -17,7 +17,7 @@ Signed-off-by: Alexander Duyck <alexanderduyck@fb.com>
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -4358,6 +4358,15 @@ int skb_gro_receive(struct sk_buff *p, s
@@ -4359,6 +4359,15 @@ int skb_gro_receive(struct sk_buff *p, s
if (unlikely(p->len + len >= 65536 || NAPI_GRO_CB(skb)->flush))
return -E2BIG;

View File

@ -20,7 +20,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
--- a/drivers/bus/mhi/host/main.c
+++ b/drivers/bus/mhi/host/main.c
@@ -891,6 +891,7 @@ int mhi_process_ctrl_ev_ring(struct mhi_
@@ -896,6 +896,7 @@ int mhi_process_ctrl_ev_ring(struct mhi_
switch (event) {
case MHI_EE_SBL:
st = DEV_ST_TRANSITION_SBL;

View File

@ -33,7 +33,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
/*
* The Mellanox Tavor device gives false positive parity errors. Disable
* parity error reporting.
@@ -3365,6 +3366,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
@@ -3368,6 +3369,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
@ -42,7 +42,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
/*
* Ivytown NTB BAR sizes are misreported by the hardware due to an erratum.
* To work around this, query the size it should be configured to by the
@@ -3390,6 +3393,8 @@ static void quirk_intel_ntb(struct pci_d
@@ -3393,6 +3396,8 @@ static void quirk_intel_ntb(struct pci_d
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb);
@ -51,7 +51,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
/*
* Some BIOS implementations leave the Intel GPU interrupts enabled, even
* though no one is handling them (e.g., if the i915 driver is never
@@ -3428,6 +3433,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
@@ -3431,6 +3436,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);

View File

@ -16,7 +16,7 @@ Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
+config MTD_MYLOADER_PARTS
+ tristate "MyLoader partition parsing"
+ depends on ADM5120 || ATH25 || ATH79
+ depends on ADM5120 || ATH79
+ help
+ MyLoader is a bootloader which allows the user to define partitions
+ in flash devices, by putting a table in the second erase block

View File

@ -51,7 +51,7 @@ Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
#define read_vpe_c0_status() mftc0(12, 0)
--- a/arch/mips/include/asm/vpe.h
+++ b/arch/mips/include/asm/vpe.h
@@ -124,4 +124,13 @@ void cleanup_tc(struct tc *tc);
@@ -123,4 +123,13 @@ void cleanup_tc(struct tc *tc);
int __init vpe_module_init(void);
void __exit vpe_module_exit(void);
@ -67,15 +67,7 @@ Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
#endif /* _ASM_VPE_H */
--- a/arch/mips/kernel/vpe-mt.c
+++ b/arch/mips/kernel/vpe-mt.c
@@ -29,6 +29,7 @@ int vpe_run(struct vpe *v)
struct vpe_notifications *notifier;
unsigned int vpeflags;
struct tc *t;
+ unsigned long physical_memsize = 0L;
/* check we are the Master VPE */
local_irq_save(flags);
@@ -416,6 +417,8 @@ int __init vpe_module_init(void)
@@ -415,6 +415,8 @@ int __init vpe_module_init(void)
}
v->ntcs = hw_tcs - aprp_cpu_index();
@ -84,7 +76,7 @@ Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
/* add the tc to the list of this vpe's tc's. */
list_add(&t->tc, &v->tc);
@@ -519,3 +522,47 @@ void __exit vpe_module_exit(void)
@@ -518,3 +520,47 @@ void __exit vpe_module_exit(void)
release_vpe(v);
}
}
@ -178,7 +170,7 @@ Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
{
--- a/arch/mips/lantiq/prom.c
+++ b/arch/mips/lantiq/prom.c
@@ -34,10 +34,14 @@ unsigned long physical_memsize = 0L;
@@ -28,10 +28,14 @@ EXPORT_SYMBOL_GPL(ebu_lock);
*/
static struct ltq_soc_info soc_info;

View File

@ -10,7 +10,7 @@ Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
--- a/arch/mips/kernel/vpe-mt.c
+++ b/arch/mips/kernel/vpe-mt.c
@@ -132,7 +132,10 @@ int vpe_run(struct vpe *v)
@@ -130,7 +130,10 @@ int vpe_run(struct vpe *v)
* kernels need to turn it on, even if that wasn't the pre-dvpe() state.
*/
#ifdef CONFIG_SMP

View File

@ -39,7 +39,7 @@ Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
--- a/arch/mips/lantiq/prom.c
+++ b/arch/mips/lantiq/prom.c
@@ -37,6 +37,14 @@ static struct ltq_soc_info soc_info;
@@ -31,6 +31,14 @@ static struct ltq_soc_info soc_info;
/* for Multithreading (APRP), vpe.c will use it */
unsigned long cp0_memsize;
@ -54,7 +54,7 @@ Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
const char *get_system_type(void)
{
return soc_info.sys_type;
@@ -93,6 +101,17 @@ void __init device_tree_init(void)
@@ -87,6 +95,17 @@ void __init device_tree_init(void)
unflatten_and_copy_device_tree();
}
@ -72,7 +72,7 @@ Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
void __init prom_init(void)
{
/* call the soc specific detetcion code and get it to fill soc_info */
@@ -104,7 +123,10 @@ void __init prom_init(void)
@@ -98,7 +117,10 @@ void __init prom_init(void)
prom_init_cmdline();
#if defined(CONFIG_MIPS_MT_SMP)

View File

@ -18,7 +18,7 @@ Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
--- a/arch/mips/lantiq/prom.c
+++ b/arch/mips/lantiq/prom.c
@@ -123,10 +123,9 @@ void __init prom_init(void)
@@ -117,10 +117,9 @@ void __init prom_init(void)
prom_init_cmdline();
#if defined(CONFIG_MIPS_MT_SMP)

View File

@ -8,9 +8,20 @@
compatible = "xiaomi,redmi-router-ax6000-ubootmod", "mediatek,mt7986a";
};
&chosen {
rootdisk = <&ubi_rootdisk>;
};
&partitions {
partition@580000 {
label = "ubi";
compatible = "linux,ubi";
reg = <0x580000 0x7a80000>;
label = "ubi";
volumes {
ubi_rootdisk: ubi-volume-fit {
volname = "fit";
};
};
};
};

View File

@ -16,7 +16,7 @@
led-upgrade = &led_status_rgb;
};
chosen {
chosen: chosen {
stdout-path = "serial0:115200n8";
};
@ -202,12 +202,19 @@
led_status_rgb: led@0 {
reg = <0>;
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RGB>;
color-index = <LED_COLOR_ID_RED LED_COLOR_ID_GREEN LED_COLOR_ID_BLUE>;
color-intensity = <0 255 0>; /* GREEN */
};
led_network_rgb: led@1 {
reg = <1>;
/* Hardcoding here for backward compatibility */
function = "network";
color = <LED_COLOR_ID_RGB>;
color-index = <LED_COLOR_ID_RED LED_COLOR_ID_GREEN LED_COLOR_ID_BLUE>;
color-intensity = <0 0 255>; /* BLUE */
};

View File

@ -82,7 +82,8 @@ platform_do_upgrade() {
;;
bananapi,bpi-r3|\
bananapi,bpi-r3-mini|\
bananapi,bpi-r4)
bananapi,bpi-r4|\
xiaomi,redmi-router-ax6000-ubootmod)
[ -e /dev/fit0 ] && fitblk /dev/fit0
[ -e /dev/fitrw ] && fitblk /dev/fitrw
bootdev="$(fitblk_get_bootdev)"
@ -132,8 +133,7 @@ platform_do_upgrade() {
tplink,tl-xdr6086|\
tplink,tl-xdr6088|\
xiaomi,mi-router-ax3000t-ubootmod|\
xiaomi,mi-router-wr30u-ubootmod|\
xiaomi,redmi-router-ax6000-ubootmod)
xiaomi,mi-router-wr30u-ubootmod)
CI_KERNPART="fit"
nand_do_upgrade "$1"
;;

View File

@ -12,6 +12,7 @@ FEATURES:=squashfs ramdisk nand
SUBTARGETS:=p1010 p1020 p2020
KERNEL_PATCHVER:=5.15
KERNEL_TESTING_PATCHVER:=6.1
KERNELNAME:=zImage

View File

@ -0,0 +1,292 @@
# CONFIG_40x is not set
# CONFIG_44x is not set
# CONFIG_ADVANCED_OPTIONS is not set
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
CONFIG_ARCH_MMAP_RND_BITS=11
CONFIG_ARCH_MMAP_RND_BITS_MAX=17
CONFIG_ARCH_MMAP_RND_BITS_MIN=11
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
CONFIG_ARCH_SPLIT_ARG64=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y
CONFIG_ASN1=y
CONFIG_AUDIT_ARCH=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BOOKE=y
CONFIG_BOOKE_OR_40x=y
CONFIG_BOOKE_WDT=y
# CONFIG_BR200_WP is not set
# CONFIG_BSC9131_RDB is not set
# CONFIG_BSC9132_QDS is not set
# CONFIG_C293_PCIE is not set
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CLZ_TAB=y
CONFIG_CMDLINE="console=ttyS0,115200"
CONFIG_CMDLINE_FROM_BOOTLOADER=y
# CONFIG_CMDLINE_OVERRIDE is not set
# CONFIG_COMMON_CLK is not set
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
# CONFIG_CORENET_GENERIC is not set
# CONFIG_CPM2 is not set
CONFIG_CPU_BIG_ENDIAN=y
# CONFIG_CRYPTO_AES_PPC_SPE is not set
CONFIG_CRYPTO_AUTHENC=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
# CONFIG_CRYPTO_MD5_PPC is not set
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RSA=y
# CONFIG_CRYPTO_SHA1_PPC is not set
# CONFIG_CRYPTO_SHA1_PPC_SPE is not set
# CONFIG_CRYPTO_SHA256_PPC_SPE is not set
CONFIG_DATA_SHIFT=24
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_INFO=y
CONFIG_DNOTIFY=y
CONFIG_DTC=y
CONFIG_E500_CPU=y
CONFIG_EARLY_PRINTK=y
CONFIG_EDAC=y
CONFIG_EDAC_ATOMIC_SCRUB=y
# CONFIG_EDAC_DEBUG is not set
CONFIG_EDAC_LEGACY_SYSFS=y
CONFIG_EDAC_MPC85XX=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
# CONFIG_FIREBOX_T10 is not set
CONFIG_FIXED_PHY=y
# CONFIG_FSL_DPAA2_SWITCH is not set
CONFIG_FSL_EMB_PERFMON=y
# CONFIG_FSL_FMAN is not set
CONFIG_FSL_LBC=y
CONFIG_FSL_PCI=y
CONFIG_FSL_PQ_MDIO=y
CONFIG_FSL_SOC=y
CONFIG_FSL_SOC_BOOKE=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GCC11_NO_ARRAY_BOUNDS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_ISA_DMA=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GEN_RTC=y
# CONFIG_GE_IMP3A is not set
CONFIG_GIANFAR=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_MPC8XXX=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
# CONFIG_HIVEAP_330 is not set
CONFIG_HW_RANDOM=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_MPC=y
CONFIG_ILLEGAL_POINTER_VALUE=0
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_ISA_DMA_API=y
CONFIG_KERNEL_START=0xc0000000
# CONFIG_KSI8560 is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOWMEM_CAM_NUM=9
CONFIG_LOWMEM_SIZE=0x30000000
CONFIG_LXT_PHY=y
# CONFIG_MATH_EMULATION is not set
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEMFD_CREATE=y
CONFIG_MIGRATION=y
CONFIG_MMU_GATHER_MERGE_VMAS=y
CONFIG_MMU_GATHER_PAGE_SIZE=y
CONFIG_MODULES_USE_ELF_RELA=y
# CONFIG_MPC8536_DS is not set
# CONFIG_MPC8540_ADS is not set
# CONFIG_MPC8560_ADS is not set
# CONFIG_MPC85xx_CDS is not set
# CONFIG_MPC85xx_DS is not set
# CONFIG_MPC85xx_MDS is not set
# CONFIG_MPC85xx_RDB is not set
CONFIG_MPIC=y
# CONFIG_MPIC_MSGR is not set
CONFIG_MPIC_TIMER=y
CONFIG_MPILIB=y
# CONFIG_MTD_CFI is not set
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPI_NOR=y
# CONFIG_MVME2500 is not set
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NET_SELFTESTS=y
CONFIG_NLS=y
CONFIG_NR_CPUS=1
CONFIG_NR_IRQS=512
CONFIG_NVMEM=y
# CONFIG_NVMEM_QORIQ_EFUSE is not set
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_DMA_DEFAULT_COHERENT=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND=y
# CONFIG_P1010_RDB is not set
# CONFIG_P1022_DS is not set
# CONFIG_P1022_RDK is not set
# CONFIG_P1023_RDB is not set
CONFIG_PAGE_OFFSET=0xc0000000
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
# CONFIG_PANDA is not set
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEASPM=y
CONFIG_PCIEASPM_DEFAULT=y
# CONFIG_PCIEASPM_PERFORMANCE is not set
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
CONFIG_PCIEPORTBUS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYSICAL_ALIGN=0x04000000
CONFIG_PHYSICAL_START=0x00000000
# CONFIG_PHYS_64BIT is not set
# CONFIG_PMU_SYSFS is not set
# CONFIG_PPA8548 is not set
CONFIG_PPC=y
CONFIG_PPC32=y
# CONFIG_PPC64 is not set
CONFIG_PPC_85xx=y
# CONFIG_PPC_8xx is not set
CONFIG_PPC_ADV_DEBUG_DACS=2
CONFIG_PPC_ADV_DEBUG_DVCS=0
CONFIG_PPC_ADV_DEBUG_IACS=2
CONFIG_PPC_ADV_DEBUG_REGS=y
CONFIG_PPC_BARRIER_NOSPEC=y
# CONFIG_PPC_BOOK3S_32 is not set
CONFIG_PPC_DOORBELL=y
CONFIG_PPC_E500=y
# CONFIG_PPC_E500MC is not set
# CONFIG_PPC_EARLY_DEBUG is not set
CONFIG_PPC_INDIRECT_PCI=y
CONFIG_PPC_KUAP=y
# CONFIG_PPC_KUAP_DEBUG is not set
CONFIG_PPC_KUEP=y
CONFIG_PPC_MMU_NOHASH=y
CONFIG_PPC_PAGE_SHIFT=12
# CONFIG_PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT is not set
# CONFIG_PPC_QEMU_E500 is not set
CONFIG_PPC_SMP_MUXED_IPI=y
CONFIG_PPC_UDBG_16550=y
CONFIG_PPC_WERROR=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QE_GPIO=y
CONFIG_QUICC_ENGINE=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RAS=y
# CONFIG_RED_15W_REV1 is not set
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_GENERIC=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTC_MC146818_LIB=y
# CONFIG_SCOM_DEBUGFS is not set
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
# CONFIG_SERIAL_QE is not set
# CONFIG_SOCRATES is not set
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPE=y
CONFIG_SPE_POSSIBLE=y
CONFIG_SPI=y
CONFIG_SPI_FSL_ESPI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SRCU=y
# CONFIG_STATIC_CALL_SELFTEST is not set
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_STX_GP3 is not set
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_TARGET_CPU="8540"
CONFIG_TARGET_CPU_BOOL=y
CONFIG_TASK_SIZE=0xc0000000
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_THREAD_SHIFT=13
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TINY_SRCU=y
# CONFIG_TL_WDR4900_V1 is not set
# CONFIG_TOOLCHAIN_DEFAULT_CPU is not set
# CONFIG_TQM8540 is not set
# CONFIG_TQM8541 is not set
# CONFIG_TQM8548 is not set
# CONFIG_TQM8555 is not set
# CONFIG_TQM8560 is not set
# CONFIG_TWR_P102x is not set
CONFIG_UCC=y
CONFIG_UCC_FAST=y
CONFIG_UCC_GETH=y
# CONFIG_UGETH_TX_ON_DEMAND is not set
CONFIG_USB_SUPPORT=y
CONFIG_VDSO32=y
# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WS_AP3710I is not set
# CONFIG_WS_AP3715I is not set
# CONFIG_WS_AP3825I is not set
# CONFIG_XES_MPC85xx is not set
CONFIG_XZ_DEC_BCJ=y
CONFIG_XZ_DEC_POWERPC=y

View File

@ -27,11 +27,105 @@
spi0 = &spi0;
};
chosen {
/*
* not yet implemented.
* stdout-path = &serial0 ":9600n8";
* <https://www.spinics.net/lists/devicetree-compiler/msg02487.html>
*
* this should work... but it doesn't because CONFIG_CMDLINE in our
* OpenWrt's target config sets "console=ttyS0,115200"
* stdout-path = "/soc@ffe00000/serial@4500:9600n8";
*/
bootargs = "console=ttyS0,9600n8";
};
cpus {
PowerPC,P1020@0 {
i-cache-sets = <0x80>;
i-cache-size = <0x8000>;
i-cache-block-size = <0x20>;
d-cache-sets = <0x80>;
d-cache-size = <0x8000>;
d-cache-block-size = <0x20>;
status = "okay";
clock-frequency = <533333328>; /* 533.33 MHz */
bus-frequency = <266666664>; /* 266.66 MHz */
timebase-frequency = <33333333>; /* 33.33 MHz */
};
PowerPC,P1020@1 {
i-cache-sets = <0x80>;
i-cache-size = <0x8000>;
i-cache-block-size = <0x20>;
d-cache-sets = <0x80>;
d-cache-size = <0x8000>;
d-cache-block-size = <0x20>;
cpu-release-addr = <0x00 0xffff240>;
enable-method = "spin-table";
status = "disabled";
clock-frequency = <533333328>;
bus-frequency = <266666664>;
timebase-frequency = <33333333>;
};
};
memory {
#address-cells = <2>;
#size-cells = <2>;
reg = <0x00 0x00 0x00 0x10000000>;
device_type = "memory";
};
/*
* Usually, u-boot provided /memreserve/ properties by adding them during boot.
* these have been converted to reserved-memory entries.
*/
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/*
* /memreserve/ 0x0000000000ffa000 0x0000000000004000;
* The kernel complains when booting:
*
* | OF: fdt: Reserved memory: failed to reserve memory for node
* 'firmware@ffa000': base 0x00ffa000, size 0 MiB
*
* But this likely uboot's bootargs + modified DTB. And if so, we don't care.
* This is because we rely on our own dtb that's in the simpleImage.
*
* Note: This is backed up by u-boot. just before the kernel executes
* it prints this final line:
* | Loading Device Tree to 00ff9000, end 00fff1c4 ... OK
*
* firmware@ffa000 {
* reg = <0x0 0xffa000 0x0 0x4000>;
* no-map;
* };
*/
// /memreserve/ 0x000000000fe2f000 0x0000000000000021;
firmware@fe2f000 {
reg = <0x0 0xfe2f000 0x0 0x21>;
no-map;
};
/*
* /memreserve/ 0x000000000ffff000 0x0000000000001000;
* that's the spin-table - see second CPU core binding.
*/
firmware@ffff000 {
reg = <0x0 0xffff000 0x0 0x1000>;
no-map;
};
};
board_lbc: lbc: localbus@ffe05000 {
bus-frequency = <16666666>; /* 16.66 MHz */
reg = <0 0xffe05000 0 0x1000>;
ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
@ -117,8 +211,12 @@
board_soc: soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
bus-frequency = <266666664>;
spi0: spi@7000 {
#address-cells = <1>;
#size-cells = <0>;
temperature-sensor@1 {
compatible = "ti,tmp125";
reg = <1>;
@ -136,6 +234,9 @@
compatible = "national,lp5521";
reg = <0x32>;
clock-mode = /bits/ 8 <2>;
#address-cells = <1>;
#size-cells = <0>;
#if 1
led_fault_red: led@0 {
reg = <0>;
@ -230,6 +331,9 @@
};
enet0: ethernet@b0000 {
rx-stash-idx = <0x00>;
rx-stash-len = <0x60>;
bd-stash;
status = "okay";
phy-handle = <&phy0>;
phy-connection-type = "rgmii-id";
@ -242,6 +346,9 @@
};
enet2: ethernet@b2000 {
rx-stash-idx = <0x00>;
rx-stash-len = <0x60>;
bd-stash;
status = "okay";
phy-handle = <&phy1>;
phy-connection-type = "rgmii-id";
@ -264,31 +371,22 @@
pci0: pcie@ffe09000 {
reg = <0x0 0xffe09000 0x0 0x1000>;
ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0x0 0xffc30000 0x0 0x10000>;
ranges = <0x2000000 0x0 0xa0000000 0x0 0xa0000000 0x0 0x20000000>,
<0x1000000 0x0 0x00000000 0x0 0xffc30000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xa0000000
0x2000000 0x0 0xa0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
ranges = <0x2000000 0x0 0xa0000000 0x2000000 0x0 0xa0000000 0x0 0x20000000>,
<0x1000000 0x0 0x00000000 0x1000000 0x0 0x00000000 0x0 0x00100000>;
};
};
pci1: pcie@ffe0a000 {
reg = <0x0 0xffe0a000 0x0 0x1000>;
ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xc0000000
0x2000000 0x0 0xc0000000
0x0 0x20000000
ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000>,
<0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
pcie@0 {
ranges = <0x2000000 0x0 0xc0000000 0x2000000 0x0 0xc0000000 0x0 0x20000000>,
<0x1000000 0x0 0x00000000 0x1000000 0x0 0x00000000 0x0 0x00100000>;
};
};
@ -302,7 +400,15 @@
};
};
};
/include/ "fsl/p1020si-post.dtsi"
&serial0 {
clock-frequency = <266666664>;
};
&serial1 {
clock-frequency = <266666664>;
};
/*
* For the OpenWrt 22.03 release, since Linux 5.10.138 now uses

View File

@ -121,11 +121,8 @@ machine_arch_initcall(tl_wdr4900_v1, mpc85xx_common_publish_devices);
*/
static int __init tl_wdr4900_v1_probe(void)
{
unsigned long root = of_get_flat_dt_root();
if (of_flat_dt_is_compatible(root, "tplink,tl-wdr4900-v1"))
if (of_machine_is_compatible("tplink,tl-wdr4900-v1"))
return 1;
return 0;
}

View File

@ -21,8 +21,8 @@ define Device/aerohive_br200-wp
KERNEL_NAME := simpleImage.br200-wp
KERNEL := kernel-bin | uImage none
KERNEL_INITRAMFS := kernel-bin | uImage none
KERNEL_ENTRY := 0x1000000
KERNEL_LOADADDR := 0x1000000
KERNEL_ENTRY := 0x1500000
KERNEL_LOADADDR := 0x1500000
KERNEL_SIZE := 8m
IMAGES := fdt.bin sysupgrade.bin
IMAGE/fdt.bin := append-dtb
@ -39,8 +39,8 @@ define Device/enterasys_ws-ap3715i
DEVICE_MODEL := WS-AP3715i
BLOCKSIZE := 64k
KERNEL_NAME := simpleImage.ws-ap3715i
KERNEL_ENTRY := 0x1000000
KERNEL_LOADADDR := 0x1000000
KERNEL_ENTRY := 0x1500000
KERNEL_LOADADDR := 0x1500000
KERNEL = kernel-bin | lzma | uImage lzma
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata
@ -60,8 +60,8 @@ define Device/tplink_tl-wdr4900-v1
KERNEL_NAME := simpleImage.tl-wdr4900-v1
KERNEL_INITRAMFS :=
KERNEL := kernel-bin | uImage none -M 0x4f4b4c49 | spi-loader-okli $(1)
KERNEL_ENTRY := 0x1000000
KERNEL_LOADADDR := 0x1000000
KERNEL_ENTRY := 0x1500000
KERNEL_LOADADDR := 0x1500000
SUPPORTED_DEVICES += tl-wdr4900-v1
COMPILE := loader-$(1)
COMPILE/loader-$(1) := spi-loader-okli-compile

View File

@ -18,9 +18,14 @@ define Device/aerohive_hiveap-330
DEVICE_PACKAGES := kmod-tpm-i2c-atmel kmod-hwmon-lm70
BLOCKSIZE := 128k
KERNEL := kernel-bin | uImage none
KERNEL_INITRAMFS := kernel-bin | MultiImage none
KERNEL_INITRAMFS := kernel-bin | uImage none
KERNEL_NAME := simpleImage.hiveap-330
KERNEL_SIZE := 16m
IMAGES := sysupgrade.bin
KERNEL_ENTRY := 0x1500000
KERNEL_LOADADDR := 0x1500000
# append-dtb is still needed, as otherwise u-boot bootm complains
# about not having a FDT to edit.
IMAGE/sysupgrade.bin := append-dtb | pad-to 256k | append-kernel | \
append-rootfs | pad-rootfs | check-size | append-metadata
IMAGE_SIZE = 63m

View File

@ -1,5 +1,5 @@
BOARDNAME:=P1020
KERNEL_IMAGES:=simpleImage.ws-ap3825i
KERNEL_IMAGES:=simpleImage.ws-ap3825i simpleImage.hiveap-330
define Target/Description
Build firmware images for Freescale P1020 based boards.

View File

@ -44,7 +44,7 @@ Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
;;
+simpleboot-tl-wdr4900-v1)
+ platformo="$object/fixed-head.o $object/simpleboot.o"
+ link_address='0x1000000'
+ link_address='0x1500000'
+ binary=y
+ ;;
simpleboot-*)

View File

@ -28,3 +28,31 @@
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -163,6 +163,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie
src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S
src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
+src-plat-$(CONFIG_HIVEAP_330) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_PPC_MICROWATT) += fixed-head.S microwatt.c
@@ -344,6 +345,7 @@ image-$(CONFIG_TQM8548) += cuImage.tqm
image-$(CONFIG_TQM8555) += cuImage.tqm8555
image-$(CONFIG_TQM8560) += cuImage.tqm8560
image-$(CONFIG_KSI8560) += cuImage.ksi8560
+image-$(CONFIG_HIVEAP_330) += simpleImage.hiveap-330
image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1
# Board ports in arch/powerpc/platform/86xx/Kconfig
image-$(CONFIG_MVME7100) += dtbImage.mvme7100
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -339,6 +339,7 @@ adder875-redboot)
platformo="$object/fixed-head.o $object/redboot-8xx.o"
binary=y
;;
+simpleboot-hiveap-330|\
simpleboot-tl-wdr4900-v1)
platformo="$object/fixed-head.o $object/simpleboot.o"
link_address='0x1500000'

View File

@ -37,17 +37,17 @@ WS-AP3825i AP.
obj-$(CONFIG_RED_15W_REV1) += red15w_rev1.o
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -164,6 +164,7 @@ src-plat-$(CONFIG_PPC_POWERNV) += pserie
src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
@@ -165,6 +165,7 @@ src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) +=
src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
src-plat-$(CONFIG_HIVEAP_330) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
+src-plat-$(CONFIG_WS_AP3825I) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_PPC_MICROWATT) += fixed-head.S microwatt.c
@@ -345,6 +346,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm
image-$(CONFIG_TQM8560) += cuImage.tqm8560
@@ -347,6 +348,7 @@ image-$(CONFIG_TQM8560) += cuImage.tqm
image-$(CONFIG_KSI8560) += cuImage.ksi8560
image-$(CONFIG_HIVEAP_330) += simpleImage.hiveap-330
image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1
+image-$(CONFIG_WS_AP3825I) += simpleImage.ws-ap3825i
# Board ports in arch/powerpc/platform/86xx/Kconfig
@ -55,11 +55,11 @@ WS-AP3825i AP.
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -339,6 +339,7 @@ adder875-redboot)
platformo="$object/fixed-head.o $object/redboot-8xx.o"
@@ -340,6 +340,7 @@ adder875-redboot)
binary=y
;;
simpleboot-hiveap-330|\
+simpleboot-ws-ap3825i|\
simpleboot-tl-wdr4900-v1)
platformo="$object/fixed-head.o $object/simpleboot.o"
link_address='0x1000000'
link_address='0x1500000'

View File

@ -30,9 +30,9 @@
obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -346,6 +346,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm
image-$(CONFIG_TQM8560) += cuImage.tqm8560
@@ -348,6 +348,7 @@ image-$(CONFIG_TQM8560) += cuImage.tqm
image-$(CONFIG_KSI8560) += cuImage.ksi8560
image-$(CONFIG_HIVEAP_330) += simpleImage.hiveap-330
image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1
+image-$(CONFIG_WS_AP3715I) += simpleImage.ws-ap3715i
image-$(CONFIG_WS_AP3825I) += simpleImage.ws-ap3825i
@ -40,10 +40,10 @@
image-$(CONFIG_MVME7100) += dtbImage.mvme7100
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -339,6 +339,7 @@ adder875-redboot)
platformo="$object/fixed-head.o $object/redboot-8xx.o"
@@ -340,6 +340,7 @@ adder875-redboot)
binary=y
;;
simpleboot-hiveap-330|\
+simpleboot-ws-ap3715i|\
simpleboot-ws-ap3825i|\
simpleboot-tl-wdr4900-v1)

View File

@ -34,17 +34,17 @@
src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
+src-plat-$(CONFIG_BR200_WP) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_HIVEAP_330) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_WS_AP3825I) += simpleboot.c fixed-head.S
@@ -345,6 +346,7 @@ image-$(CONFIG_TQM8548) += cuImage.tqm
@@ -346,6 +347,7 @@ image-$(CONFIG_TQM8548) += cuImage.tqm
image-$(CONFIG_TQM8555) += cuImage.tqm8555
image-$(CONFIG_TQM8560) += cuImage.tqm8560
image-$(CONFIG_KSI8560) += cuImage.ksi8560
+image-$(CONFIG_BR200_WP) += simpleImage.br200-wp
image-$(CONFIG_HIVEAP_330) += simpleImage.hiveap-330
image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1
image-$(CONFIG_WS_AP3715I) += simpleImage.ws-ap3715i
image-$(CONFIG_WS_AP3825I) += simpleImage.ws-ap3825i
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -339,6 +339,7 @@ adder875-redboot)
@ -52,6 +52,6 @@
binary=y
;;
+simpleboot-br200-wp|\
simpleboot-hiveap-330|\
simpleboot-ws-ap3715i|\
simpleboot-ws-ap3825i|\
simpleboot-tl-wdr4900-v1)

View File

@ -16,7 +16,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -274,7 +274,6 @@ image-$(CONFIG_PPC_CHRP) += zImage.chrp
@@ -275,7 +275,6 @@ image-$(CONFIG_PPC_CHRP) += zImage.chrp
image-$(CONFIG_PPC_EFIKA) += zImage.chrp
image-$(CONFIG_PPC_PMAC) += zImage.pmac
image-$(CONFIG_PPC_HOLLY) += dtbImage.holly
@ -24,7 +24,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
image-$(CONFIG_EPAPR_BOOT) += zImage.epapr
#
@@ -409,15 +408,6 @@ $(obj)/dtbImage.%: vmlinux $(wrapperbits
@@ -411,15 +410,6 @@ $(obj)/dtbImage.%: vmlinux $(wrapperbits
$(obj)/vmlinux.strip: vmlinux
$(STRIP) -s -R .comment $< -o $@

View File

@ -0,0 +1,10 @@
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -30,6 +30,7 @@ static const struct of_device_id mpc85xx
{ .compatible = "fsl,mpc8548-guts", },
/* Probably unnecessary? */
{ .compatible = "gpio-leds", },
+ { .compatible = "gpio-keys", },
/* For all PCI controllers */
{ .compatible = "fsl,mpc8540-pci", },
{ .compatible = "fsl,mpc8548-pcie", },

View File

@ -0,0 +1,83 @@
From 1d9f596e572917772b87a2a37e1680902964782f Mon Sep 17 00:00:00 2001
From: Gabor Juhos <juhosg@openwrt.org>
Date: Wed, 20 Feb 2013 08:40:33 +0100
Subject: [PATCH] powerpc: 85xx: add support for the TP-Link TL-WDR4900 v1
board
This patch adds support for the TP-Link TL-WDR4900 v1
concurrent dual-band wireless router. The devices uses
the Freescale P1014 SoC.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
---
arch/powerpc/boot/Makefile | 3 ++-
arch/powerpc/boot/wrapper | 5 +++++
arch/powerpc/platforms/85xx/Kconfig | 12 ++++++++++++
arch/powerpc/platforms/85xx/Makefile | 1 +
4 files changed, 20 insertions(+), 1 deletion(-)
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -179,6 +179,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie
src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S
src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
+src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_PPC_MICROWATT) += fixed-head.S microwatt.c
@@ -359,7 +360,7 @@ image-$(CONFIG_TQM8548) += cuImage.tqm
image-$(CONFIG_TQM8555) += cuImage.tqm8555
image-$(CONFIG_TQM8560) += cuImage.tqm8560
image-$(CONFIG_KSI8560) += cuImage.ksi8560
-
+image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1
# Board ports in arch/powerpc/platform/86xx/Kconfig
image-$(CONFIG_MVME7100) += dtbImage.mvme7100
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -341,6 +341,11 @@ adder875-redboot)
platformo="$object/fixed-head.o $object/redboot-8xx.o"
binary=y
;;
+simpleboot-tl-wdr4900-v1)
+ platformo="$object/fixed-head.o $object/simpleboot.o"
+ link_address='0x1500000'
+ binary=y
+ ;;
simpleboot-*)
platformo="$object/fixed-head.o $object/simpleboot.o"
binary=y
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -163,6 +163,18 @@ config STX_GP3
select CPM2
select DEFAULT_UIMAGE
+config TL_WDR4900_V1
+ bool "TP-Link TL-WDR4900 v1"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ select SWIOTLB
+ help
+ This option enables support for the TP-Link TL-WDR4900 v1 board.
+
+ This board is a Concurrent Dual-Band wireless router with a
+ Freescale P1014 SoC.
+
config TQM8540
bool "TQ Components TQM8540"
help
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_TWR_P102x) += twr_p102x.o
obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o
obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o
obj-$(CONFIG_STX_GP3) += stx_gp3.o
+obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o
obj-$(CONFIG_TQM85xx) += tqm85xx.o
obj-$(CONFIG_PPA8548) += ppa8548.o
obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o

View File

@ -0,0 +1,58 @@
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -40,6 +40,17 @@ config BSC9132_QDS
and dual StarCore SC3850 DSP cores.
Manufacturer : Freescale Semiconductor, Inc
+config HIVEAP_330
+ bool "Aerohive HiveAP-330"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the Aerohive HiveAP-330 board.
+
+ This board is a Concurrent Dual-Band wireless access point with a
+ Freescale P1020 SoC.
+
config MPC8540_ADS
bool "Freescale MPC8540 ADS"
select DEFAULT_UIMAGE
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -12,6 +12,7 @@ obj-y += common.o
obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
obj-$(CONFIG_BSC9132_QDS) += bsc913x_qds.o
obj-$(CONFIG_C293_PCIE) += c293pcie.o
+obj-$(CONFIG_HIVEAP_330) += hiveap-330.o
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -179,6 +179,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie
src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S
src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
+src-plat-$(CONFIG_HIVEAP_330) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_PPC_MICROWATT) += fixed-head.S microwatt.c
@@ -360,6 +361,7 @@ image-$(CONFIG_TQM8548) += cuImage.tqm
image-$(CONFIG_TQM8555) += cuImage.tqm8555
image-$(CONFIG_TQM8560) += cuImage.tqm8560
image-$(CONFIG_KSI8560) += cuImage.ksi8560
+image-$(CONFIG_HIVEAP_330) += simpleImage.hiveap-330
image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1
# Board ports in arch/powerpc/platform/86xx/Kconfig
image-$(CONFIG_MVME7100) += dtbImage.mvme7100
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -341,6 +341,7 @@ adder875-redboot)
platformo="$object/fixed-head.o $object/redboot-8xx.o"
binary=y
;;
+simpleboot-hiveap-330|\
simpleboot-tl-wdr4900-v1)
platformo="$object/fixed-head.o $object/simpleboot.o"
link_address='0x1500000'

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