Merge Official Source

Signed-off-by: Tianling Shen <i@cnsztl.eu.org>
This commit is contained in:
Tianling Shen 2024-10-18 15:18:34 +08:00
commit 02d897efeb
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
34 changed files with 247 additions and 132 deletions

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@ -77,7 +77,7 @@ endef
define ImageConfigOptions
mkdir -p $(1)/lib/preinit
echo 'pi_suppress_stderr="$(CONFIG_TARGET_PREINIT_SUPPRESS_STDERR)"' >$(1)/lib/preinit/00_preinit.conf
echo 'fs_failsafe_wait_timeout=$(if $(CONFIG_TARGET_PREINIT_TIMEOUT),$(CONFIG_TARGET_PREINIT_TIMEOUT),2)' >>$(1)/lib/preinit/00_preinit.conf
echo 'fs_failsafe_wait_timeout=$(if $(CONFIG_TARGET_PREINIT_TIMEOUT),$(CONFIG_TARGET_PREINIT_TIMEOUT),4)' >>$(1)/lib/preinit/00_preinit.conf
echo 'pi_init_path="$(TARGET_INIT_PATH)"' >>$(1)/lib/preinit/00_preinit.conf
echo 'pi_init_env=$(if $(CONFIG_TARGET_INIT_ENV),$(CONFIG_TARGET_INIT_ENV),"")' >>$(1)/lib/preinit/00_preinit.conf
echo 'pi_init_cmd=$(if $(CONFIG_TARGET_INIT_CMD),$(CONFIG_TARGET_INIT_CMD),"/sbin/init")' >>$(1)/lib/preinit/00_preinit.conf

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@ -44,7 +44,7 @@ config TARGET_PREINIT_DISABLE_FAILSAFE
config TARGET_PREINIT_TIMEOUT
int
prompt "Failsafe/Debug wait timeout" if PREINITOPT
default 2
default 4
help
How long to wait for failsafe mode to be entered or for
a debug option to be pressed before continuing with a

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@ -8,13 +8,13 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=ath11k-firmware
PKG_SOURCE_DATE:=2024-03-14
PKG_SOURCE_VERSION:=795809c7041582bd51bdfaa1f548b916ae8d4382
PKG_MIRROR_HASH:=d93edc651b641a97ec4f5ed329e15ac110928f863b4afbaae7fcb25953d04544
PKG_RELEASE:=2
PKG_SOURCE_DATE:=2024-10-14
PKG_SOURCE_VERSION:=15f050122da5ef5bef2cc8c7c19dfb7f98060a49
PKG_MIRROR_HASH:=e7a89d1570f32552ade539376181494724b5eafb31d00451ff2dcf5a2922a0cb
PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://github.com/quic/upstream-wifi-fw.git
PKG_SOURCE_URL:=https://git.codelinaro.org/clo/ath-firmware/ath11k-firmware.git
PKG_LICENSE_FILES:=LICENSE.qca_firmware
@ -51,38 +51,27 @@ define Build/Compile
endef
QCN9074_BOARD_REV:=8e140c65f36137714b6d8934e09dcd73cb05c2f6
QCN9074_BOARD_FILE:=board-2.bin.$(QCN9074_BOARD_REV)
define Download/qcn9074-board
URL:=https://git.codelinaro.org/clo/ath-firmware/ath11k-firmware/-/raw/main/QCN9074/hw1.0/
URL_FILE:=board-2.bin
FILE:=$(QCN9074_BOARD_FILE)
HASH:=dbf0ca14aa1229eccd48f26f1026901b9718b143bd30b51b8ea67c84ba6207f1
endef
$(eval $(call Download,qcn9074-board))
define Package/ath11k-firmware-ipq6018/install
$(INSTALL_DIR) $(1)/lib/firmware/IPQ6018
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/ath11k-firmware/IPQ6018/hw1.0/2.5.0.1/WLAN.HK.2.5.0.1-03982-QCAHKSWPL_SILICONZ-3/* \
$(PKG_BUILD_DIR)/IPQ6018/hw1.0/2.5.0.1/WLAN.HK.2.5.0.1-03982-QCAHKSWPL_SILICONZ-3/* \
$(1)/lib/firmware/IPQ6018/
endef
define Package/ath11k-firmware-ipq8074/install
$(INSTALL_DIR) $(1)/lib/firmware/IPQ8074
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/ath11k-firmware/IPQ8074/hw2.0/2.9.0.1/WLAN.HK.2.9.0.1-01977-QCAHKSWPL_SILICONZ-1/* \
$(PKG_BUILD_DIR)/IPQ8074/hw2.0/2.9.0.1/WLAN.HK.2.9.0.1-02146-QCAHKSWPL_SILICONZ-1/* \
$(1)/lib/firmware/IPQ8074/
endef
define Package/ath11k-firmware-qcn9074/install
$(INSTALL_DIR) $(1)/lib/firmware/ath11k/QCN9074/hw1.0
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/ath11k-firmware/QCN9074/hw1.0/2.9.0.1/WLAN.HK.2.9.0.1-01977-QCAHKSWPL_SILICONZ-1/* \
$(PKG_BUILD_DIR)/QCN9074/hw1.0/2.9.0.1/WLAN.HK.2.9.0.1-02146-QCAHKSWPL_SILICONZ-1/* \
$(1)/lib/firmware/ath11k/QCN9074/hw1.0/
$(INSTALL_BIN) \
$(DL_DIR)/$(QCN9074_BOARD_FILE) $(1)/lib/firmware/ath11k/QCN9074/hw1.0/board-2.bin
$(PKG_BUILD_DIR)/QCN9074/hw1.0/board-2.bin $(1)/lib/firmware/ath11k/QCN9074/hw1.0/board-2.bin
endef
$(eval $(call BuildPackage,ath11k-firmware-ipq6018))

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@ -9,13 +9,13 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=firewall
PKG_RELEASE:=3
PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/firewall3.git
PKG_SOURCE_DATE:=2022-02-17
PKG_SOURCE_VERSION:=4cd7d4f36bea731bf901cb067456f1d460294926
PKG_MIRROR_HASH:=d48a1937328b4a46b4771839d7f281a0e95e024169caa02253fc216a0907d0b9
PKG_SOURCE_DATE:=2024-10-18
PKG_SOURCE_VERSION:=1aef9791a21e3d15d4357060f09a7bb9ed3d6e4e
PKG_MIRROR_HASH:=61a4f03a34edf5bf25c13b7ae04e4be40ecbaebff77b9f2d1e730dcaa2c77143
PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
PKG_LICENSE:=ISC

View File

@ -11,7 +11,7 @@ PKG_FLAGS:=essential
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=https://www.busybox.net/downloads \
http://sources.buildroot.net
https://sources.buildroot.net/$(PKG_NAME)
PKG_HASH:=b8cc24c9574d809e7279c3be349795c5d5ceb6fdf19ca709f80cde50e47de314
PKG_BUILD_DEPENDS:=BUSYBOX_CONFIG_PAM:libpam

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@ -0,0 +1,32 @@
From c283782fc5d60c4d8169137c6f955aa3553d3b3d Mon Sep 17 00:00:00 2001
From: Hui Wang <hui.wang@canonical.com>
Date: Fri, 27 Sep 2024 19:46:10 +0800
Subject: [PATCH] net: phy: realtek: Check the index value in
led_hw_control_get
Just like rtl8211f_led_hw_is_supported() and
rtl8211f_led_hw_control_set(), the rtl8211f_led_hw_control_get() also
needs to check the index value, otherwise the caller is likely to get
an incorrect rules.
Fixes: 17784801d888 ("net: phy: realtek: Add support for PHY LEDs on RTL8211F")
Signed-off-by: Hui Wang <hui.wang@canonical.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Link: https://patch.msgid.link/20240927114610.1278935-1-hui.wang@canonical.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/phy/realtek.c | 3 +++
1 file changed, 3 insertions(+)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -527,6 +527,9 @@ static int rtl8211f_led_hw_control_get(s
{
int val;
+ if (index >= RTL8211F_LED_COUNT)
+ return -EINVAL;
+
val = phy_read_paged(phydev, 0xd04, RTL8211F_LEDCR);
if (val < 0)
return val;

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@ -0,0 +1,67 @@
From a6ad589c1d118f9d5b1bc4c6888d42919f830340 Mon Sep 17 00:00:00 2001
From: Heiner Kallweit <hkallweit1@gmail.com>
Date: Mon, 7 Oct 2024 11:57:41 +0200
Subject: [PATCH] net: phy: realtek: Fix MMD access on RTL8126A-integrated PHY
All MMD reads return 0 for the RTL8126A-integrated PHY. Therefore phylib
assumes it doesn't support EEE, what results in higher power consumption,
and a significantly higher chip temperature in my case.
To fix this split out the PHY driver for the RTL8126A-integrated PHY
and set the read_mmd/write_mmd callbacks to read from vendor-specific
registers.
Fixes: 5befa3728b85 ("net: phy: realtek: add support for RTL8126A-integrated 5Gbps PHY")
Cc: stable@vger.kernel.org
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/phy/realtek.c | 24 +++++++++++++++++++++++-
1 file changed, 23 insertions(+), 1 deletion(-)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -1081,6 +1081,16 @@ static int rtl8221b_vn_cg_c45_match_phy_
return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);
}
+static int rtl8251b_c22_match_phy_device(struct phy_device *phydev)
+{
+ return rtlgen_is_c45_match(phydev, RTL_8251B, false);
+}
+
+static int rtl8251b_c45_match_phy_device(struct phy_device *phydev)
+{
+ return rtlgen_is_c45_match(phydev, RTL_8251B, true);
+}
+
static int rtlgen_resume(struct phy_device *phydev)
{
int ret = genphy_resume(phydev);
@@ -1418,7 +1428,7 @@ static struct phy_driver realtek_drvs[]
.suspend = genphy_c45_pma_suspend,
.resume = rtlgen_c45_resume,
}, {
- PHY_ID_MATCH_EXACT(0x001cc862),
+ .match_phy_device = rtl8251b_c45_match_phy_device,
.name = "RTL8251B 5Gbps PHY",
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
@@ -1428,6 +1438,18 @@ static struct phy_driver realtek_drvs[]
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
}, {
+ .match_phy_device = rtl8251b_c22_match_phy_device,
+ .name = "RTL8126A-internal 5Gbps PHY",
+ .get_features = rtl822x_get_features,
+ .config_aneg = rtl822x_config_aneg,
+ .read_status = rtl822x_read_status,
+ .suspend = genphy_suspend,
+ .resume = rtlgen_resume,
+ .read_page = rtl821x_read_page,
+ .write_page = rtl821x_write_page,
+ .read_mmd = rtl822x_read_mmd,
+ .write_mmd = rtl822x_write_mmd,
+ }, {
PHY_ID_MATCH_EXACT(0x001ccad0),
.name = "RTL8224 2.5Gbps PHY",
.get_features = rtl822x_c45_get_features,

View File

@ -1,39 +1,29 @@
From 66d82d3f04623e9c096e12c10ca51141c345ee84 Mon Sep 17 00:00:00 2001
From 081c9c0265c91b8333165aa6230c20bcbc6f7cbf Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Tue, 8 Oct 2024 20:59:51 +0100
Subject: [PATCH] net: phy: realtek: read duplex and gbit master from PHYSR
Date: Thu, 10 Oct 2024 14:07:16 +0100
Subject: [PATCH 3/5] net: phy: realtek: read duplex and gbit master from PHYSR
register
The PHYSR MMD register is present and defined equally for all RTL82xx
Ethernet PHYs.
Read duplex and gbit master bits from rtlgen_decode_speed() and rename
Read duplex and Gbit master bits from rtlgen_decode_speed() and rename
it to rtlgen_decode_physr().
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://patch.msgid.link/b9a76341da851a18c985bc4774fa295babec79bb.1728565530.git.daniel@makrotopia.org
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
drivers/net/phy/realtek.c | 48 ++++++++++++++++++++++++++++++++-------
1 file changed, 40 insertions(+), 8 deletions(-)
drivers/net/phy/realtek.c | 41 +++++++++++++++++++++++++++++++--------
1 file changed, 33 insertions(+), 8 deletions(-)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -80,20 +80,24 @@
@@ -80,15 +80,18 @@
#define RTL822X_VND2_GANLPAR 0xa414
-#define RTL822X_VND2_PHYSR 0xa434
-
#define RTL8221B_PHYCR1 0xa430
#define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN BIT(12)
+#define RTL_VND2_PHYSR 0xa434
+#define RTL_VND2_PHYSR_LINK BIT(2)
+#define RTL_VND2_PHYSR_DUPLEX BIT(3)
+#define RTL_VND2_PHYSR_SPEEDL GENMASK(5, 4)
+#define RTL_VND2_PHYSR_SPEEDH GENMASK(10, 9)
+#define RTL_VND2_PHYSR_MASTER BIT(11)
+#define RTL_VND2_PHYSR_SPEED_MASK (RTL_VND2_PHYSR_SPEEDL | RTL_VND2_PHYSR_SPEEDH)
+
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@ -41,11 +31,16 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
#define RTL9000A_GINMR_LINK_STATUS BIT(4)
-#define RTLGEN_SPEED_MASK 0x0630
-
+#define RTL_VND2_PHYSR 0xa434
+#define RTL_VND2_PHYSR_DUPLEX BIT(3)
+#define RTL_VND2_PHYSR_SPEEDL GENMASK(5, 4)
+#define RTL_VND2_PHYSR_SPEEDH GENMASK(10, 9)
+#define RTL_VND2_PHYSR_MASTER BIT(11)
+#define RTL_VND2_PHYSR_SPEED_MASK (RTL_VND2_PHYSR_SPEEDL | RTL_VND2_PHYSR_SPEEDH)
#define RTL_GENERIC_PHYID 0x001cc800
#define RTL_8211FVD_PHYID 0x001cc878
#define RTL_8221B_VB_CG 0x001cc849
@@ -661,9 +665,24 @@ static int rtl8366rb_config_init(struct
@@ -660,9 +663,18 @@ static int rtl8366rb_config_init(struct
}
/* get actual speed to cover the downshift case */
@ -53,12 +48,6 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+static void rtlgen_decode_physr(struct phy_device *phydev, int val)
{
- switch (val & RTLGEN_SPEED_MASK) {
+ /* bit 2
+ * 0: Link not OK
+ * 1: Link OK
+ */
+ phydev->link = !!(val & RTL_VND2_PHYSR_LINK);
+
+ /* bit 3
+ * 0: Half Duplex
+ * 1: Full Duplex
@ -72,7 +61,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
case 0x0000:
phydev->speed = SPEED_10;
break;
@@ -685,6 +704,19 @@ static void rtlgen_decode_speed(struct p
@@ -684,6 +696,19 @@ static void rtlgen_decode_speed(struct p
default:
break;
}
@ -92,7 +81,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
}
static int rtlgen_read_status(struct phy_device *phydev)
@@ -702,7 +734,7 @@ static int rtlgen_read_status(struct phy
@@ -701,7 +726,7 @@ static int rtlgen_read_status(struct phy
if (val < 0)
return val;
@ -101,7 +90,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
return 0;
}
@@ -1030,11 +1062,11 @@ static int rtl822x_c45_read_status(struc
@@ -1007,11 +1032,11 @@ static int rtl822x_c45_read_status(struc
return 0;
/* Read actual speed from vendor register. */

View File

@ -1,7 +1,7 @@
From eaca24de0c0e64145c130759207da32594d2e5d1 Mon Sep 17 00:00:00 2001
From 68d5cd09e8919679ce13b85950debea4b2e98e04 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Tue, 8 Oct 2024 21:05:47 +0100
Subject: [PATCH 2/3] net: phy: realtek: change order of calls in C22
Date: Thu, 10 Oct 2024 14:07:26 +0100
Subject: [PATCH 4/5] net: phy: realtek: change order of calls in C22
read_status()
Always call rtlgen_read_status() first, so genphy_read_status() which
@ -9,14 +9,17 @@ is called by it clears bits in case auto-negotiation has not completed.
Also clear 10GBT link-partner advertisement bits in case auto-negotiation
is disabled or has not completed.
Suggested-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://patch.msgid.link/b15929a41621d215c6b2b57393368086589569ec.1728565530.git.daniel@makrotopia.org
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
drivers/net/phy/realtek.c | 22 +++++++++++++++-------
1 file changed, 15 insertions(+), 7 deletions(-)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -979,17 +979,25 @@ static void rtl822xb_update_interface(st
@@ -949,17 +949,25 @@ static void rtl822xb_update_interface(st
static int rtl822x_read_status(struct phy_device *phydev)
{

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@ -1,7 +1,7 @@
From 8b137d1e405dc90300ba577db44c70f0e026636e Mon Sep 17 00:00:00 2001
From 5cb409b3960e75467cbb0a8e1e5596b4490570e3 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Tue, 8 Oct 2024 21:09:19 +0100
Subject: [PATCH 3/3] net: phy: realtek: clear 1000Base-T link partner
Date: Thu, 10 Oct 2024 14:07:39 +0100
Subject: [PATCH 5/5] net: phy: realtek: clear 1000Base-T link partner
advertisement
Clear 1000Base-T link partner advertisement bits in Clause-45
@ -9,13 +9,15 @@ read_status() function in case auto-negotiation is disabled or has not
been completed.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Link: https://patch.msgid.link/9dc9b47b2d675708afef3ad366bfd78eb584d958.1728565530.git.daniel@makrotopia.org
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
drivers/net/phy/realtek.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -1056,6 +1056,10 @@ static int rtl822x_c45_read_status(struc
@@ -1026,6 +1026,10 @@ static int rtl822x_c45_read_status(struc
if (ret < 0)
return ret;

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@ -15,7 +15,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -1325,6 +1325,7 @@ static struct phy_driver realtek_drvs[]
@@ -1375,6 +1375,7 @@ static struct phy_driver realtek_drvs[]
}, {
.name = "RTL8226 2.5Gbps PHY",
.match_phy_device = rtl8226_match_phy_device,
@ -23,7 +23,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.read_status = rtl822x_read_status,
@@ -1337,6 +1338,7 @@ static struct phy_driver realtek_drvs[]
@@ -1387,6 +1388,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc840),
.name = "RTL8226B_RTL8221B 2.5Gbps PHY",
@ -31,7 +31,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
@@ -1351,6 +1353,7 @@ static struct phy_driver realtek_drvs[]
@@ -1401,6 +1403,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc838),
.name = "RTL8226-CG 2.5Gbps PHY",
@ -39,7 +39,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.read_status = rtl822x_read_status,
@@ -1361,6 +1364,7 @@ static struct phy_driver realtek_drvs[]
@@ -1411,6 +1414,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc848),
.name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
@ -47,7 +47,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
@@ -1373,6 +1377,7 @@ static struct phy_driver realtek_drvs[]
@@ -1423,6 +1427,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@ -55,7 +55,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
@@ -1385,6 +1390,7 @@ static struct phy_driver realtek_drvs[]
@@ -1435,6 +1440,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@ -63,7 +63,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
.get_features = rtl822x_c45_get_features,
@@ -1395,6 +1401,7 @@ static struct phy_driver realtek_drvs[]
@@ -1445,6 +1451,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@ -71,7 +71,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
.config_init = rtl822xb_config_init,
@@ -1407,6 +1414,7 @@ static struct phy_driver realtek_drvs[]
@@ -1457,6 +1464,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",

View File

@ -20,7 +20,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -786,8 +786,8 @@ static int rtl822x_write_mmd(struct phy_
@@ -814,8 +814,8 @@ static int rtl822x_write_mmd(struct phy_
static int rtl822xb_config_init(struct phy_device *phydev)
{
bool has_2500, has_sgmii;
@ -30,7 +30,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
has_2500 = test_bit(PHY_INTERFACE_MODE_2500BASEX,
phydev->host_interfaces) ||
@@ -837,7 +837,29 @@ static int rtl822xb_config_init(struct p
@@ -865,7 +865,29 @@ static int rtl822xb_config_init(struct p
if (ret < 0)
return ret;

View File

@ -18,7 +18,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -1052,9 +1052,11 @@ static bool rtlgen_supports_2_5gbps(stru
@@ -1092,9 +1092,11 @@ static bool rtlgen_supports_2_5gbps(stru
{
int val;

View File

@ -13,9 +13,9 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -82,6 +82,10 @@
@@ -80,6 +80,10 @@
#define RTL822X_VND2_PHYSR 0xa434
#define RTL822X_VND2_GANLPAR 0xa414
+#define RTL8221B_PHYCR1 0xa430
+#define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
@ -24,8 +24,8 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -1102,6 +1106,25 @@ static int rtl8221b_vn_cg_c45_match_phy_
return rtlgen_is_c45_match(phydev, RTL_8221B_VN_CG, true);
@@ -1152,6 +1156,25 @@ static int rtl8251b_c45_match_phy_device
return rtlgen_is_c45_match(phydev, RTL_8251B, true);
}
+static int rtl822x_probe(struct phy_device *phydev)
@ -50,7 +50,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
static int rtlgen_resume(struct phy_device *phydev)
{
int ret = genphy_resume(phydev);
@@ -1377,6 +1400,7 @@ static struct phy_driver realtek_drvs[]
@@ -1427,6 +1450,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc838),
.name = "RTL8226-CG 2.5Gbps PHY",
@ -58,7 +58,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
@@ -1388,6 +1412,7 @@ static struct phy_driver realtek_drvs[]
@@ -1438,6 +1462,7 @@ static struct phy_driver realtek_drvs[]
}, {
PHY_ID_MATCH_EXACT(0x001cc848),
.name = "RTL8226B-CG_RTL8221B-CG 2.5Gbps PHY",
@ -66,7 +66,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
@@ -1401,6 +1426,7 @@ static struct phy_driver realtek_drvs[]
@@ -1451,6 +1476,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@ -74,7 +74,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
@@ -1414,6 +1440,7 @@ static struct phy_driver realtek_drvs[]
@@ -1464,6 +1490,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@ -82,7 +82,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.soft_reset = genphy_soft_reset,
.config_init = rtl822xb_config_init,
.get_rate_matching = rtl822xb_get_rate_matching,
@@ -1425,6 +1452,7 @@ static struct phy_driver realtek_drvs[]
@@ -1475,6 +1502,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@ -90,7 +90,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
.config_aneg = rtl822x_config_aneg,
@@ -1438,6 +1466,7 @@ static struct phy_driver realtek_drvs[]
@@ -1488,6 +1516,7 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",

View File

@ -14,7 +14,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: Mieczyslaw Nalewaj <namiltd@yahoo.com>
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -1080,10 +1080,32 @@ static int rtl8226_match_phy_device(stru
@@ -1120,10 +1120,32 @@ static int rtl8226_match_phy_device(stru
static int rtlgen_is_c45_match(struct phy_device *phydev, unsigned int id,
bool is_c45)
{

View File

@ -12,7 +12,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -1282,6 +1282,51 @@ static irqreturn_t rtl9000a_handle_inter
@@ -1332,6 +1332,51 @@ static irqreturn_t rtl9000a_handle_inter
return IRQ_HANDLED;
}
@ -64,7 +64,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
static struct phy_driver realtek_drvs[] = {
{
PHY_ID_MATCH_EXACT(0x00008201),
@@ -1448,6 +1493,8 @@ static struct phy_driver realtek_drvs[]
@@ -1498,6 +1543,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c22_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C22)",
@ -73,7 +73,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
.probe = rtl822x_probe,
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
@@ -1462,6 +1509,8 @@ static struct phy_driver realtek_drvs[]
@@ -1512,6 +1559,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vb_cg_c45_match_phy_device,
.name = "RTL8221B-VB-CG 2.5Gbps PHY (C45)",
@ -82,7 +82,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
.probe = rtl822x_probe,
.soft_reset = genphy_soft_reset,
.config_init = rtl822xb_config_init,
@@ -1474,6 +1523,8 @@ static struct phy_driver realtek_drvs[]
@@ -1524,6 +1573,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c22_match_phy_device,
.name = "RTL8221B-VM-CG 2.5Gbps PHY (C22)",
@ -91,7 +91,7 @@ Signed-off-by: Jianhui Zhao <zhaojh329@gmail.com>
.probe = rtl822x_probe,
.soft_reset = genphy_soft_reset,
.get_features = rtl822x_get_features,
@@ -1488,6 +1539,8 @@ static struct phy_driver realtek_drvs[]
@@ -1538,6 +1589,8 @@ static struct phy_driver realtek_drvs[]
}, {
.match_phy_device = rtl8221b_vn_cg_c45_match_phy_device,
.name = "RTL8221B-VN-CG 2.5Gbps PHY (C45)",

View File

@ -13,8 +13,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
--- a/drivers/net/phy/intel-xway.c
+++ b/drivers/net/phy/intel-xway.c
@@ -229,6 +229,51 @@ static int xway_gphy_rgmii_init(struct p
XWAY_MDIO_MIICTRL_TXSKEW_MASK, val);
@@ -278,6 +278,51 @@ static int xway_gphy_init_leds(struct ph
return 0;
}
+#if IS_ENABLED(CONFIG_OF_MDIO)
@ -64,8 +64,8 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
+
static int xway_gphy_config_init(struct phy_device *phydev)
{
int err;
@@ -280,6 +325,7 @@ static int xway_gphy_config_init(struct
struct device_node *np = phydev->mdio.dev.of_node;
@@ -299,6 +344,7 @@ static int xway_gphy_config_init(struct
if (err)
return err;

View File

@ -18,7 +18,7 @@ Signed-off-by: Yangyu Chen <cyy@cyyself.name>
--- a/drivers/net/phy/realtek.c
+++ b/drivers/net/phy/realtek.c
@@ -86,6 +86,12 @@
@@ -84,6 +84,12 @@
#define RTL8221B_PHYCR1_ALDPS_EN BIT(2)
#define RTL8221B_PHYCR1_ALDPS_XTAL_OFF_EN BIT(12)
@ -31,7 +31,7 @@ Signed-off-by: Yangyu Chen <cyy@cyyself.name>
#define RTL8366RB_POWER_SAVE 0x15
#define RTL8366RB_POWER_SAVE_ON BIT(12)
@@ -787,6 +793,45 @@ static int rtl822x_write_mmd(struct phy_
@@ -815,6 +821,45 @@ static int rtl822x_write_mmd(struct phy_
return ret;
}
@ -77,7 +77,7 @@ Signed-off-by: Yangyu Chen <cyy@cyyself.name>
static int rtl822xb_config_init(struct phy_device *phydev)
{
bool has_2500, has_sgmii;
@@ -863,7 +908,7 @@ static int rtl822xb_config_init(struct p
@@ -891,7 +936,7 @@ static int rtl822xb_config_init(struct p
if (ret < 0)
return ret;

View File

@ -11,11 +11,6 @@ preinit_set_mac_address() {
ip link set dev eth0 address $(mtd_get_mac_ascii cfg1 ethaddr)
ip link set dev eth1 address $(mtd_get_mac_ascii cfg1 eth1addr)
;;
watchguard,firebox-t10)
ip link set dev eth0 address "$(mtd_get_mac_text "device_id" 0x1830)"
ip link set dev eth1 address "$(mtd_get_mac_text "device_id" 0x1844)"
ip link set dev eth2 address "$(mtd_get_mac_text "device_id" 0x1858)"
;;
esac
}

View File

@ -21,6 +21,9 @@
led-failsafe = &led_failover;
led-running = &led_mode;
led-upgrade = &led_attention;
/delete-property/ ethernet0;
/delete-property/ ethernet1;
/delete-property/ ethernet2;
};
memory {
@ -105,6 +108,30 @@
reg = <0xc0000 0x40000>;
label = "device_id";
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_device_id_1830: mac-address@1830 {
compatible = "mac-base";
reg = <0x1830 0x11>;
#nvmem-cell-cells = <1>;
};
macaddr_device_id_1844: mac-address@1844 {
compatible = "mac-base";
reg = <0x1844 0x11>;
#nvmem-cell-cells = <1>;
};
macaddr_device_id_1858: mac-address@1858 {
compatible = "mac-base";
reg = <0x1858 0x11>;
#nvmem-cell-cells = <1>;
};
};
};
};
};
@ -149,18 +176,27 @@
enet0: ethernet@b0000 {
phy-handle = <&phy1>;
phy-connection-type = "rgmii-id";
nvmem-cells = <&macaddr_device_id_1830 0>;
nvmem-cell-names = "mac-address";
};
enet1: ethernet@b1000 {
tbi-handle = <&tbi_phy1>;
phy-handle = <&phy2>;
phy-connection-type = "sgmii";
nvmem-cells = <&macaddr_device_id_1844 0>;
nvmem-cell-names = "mac-address";
};
enet2: ethernet@b2000 {
tbi-handle = <&tbi_phy2>;
phy-handle = <&phy3>;
phy-connection-type = "sgmii";
nvmem-cells = <&macaddr_device_id_1858 0>;
nvmem-cell-names = "mac-address";
};
sdhc@2e000 {

View File

@ -2,7 +2,9 @@ CONFIG_BR200_WP=y
CONFIG_CMDLINE_OVERRIDE=y
CONFIG_FIREBOX_T10=y
# CONFIG_FSL_CORENET_CF is not set
CONFIG_FSL_IFC=y
CONFIG_GPIO_74X164=y
CONFIG_MEMORY=y
CONFIG_MTD_CFI=y
CONFIG_MTD_NAND_FSL_IFC=y
CONFIG_MTD_PHYSMAP=y

View File

@ -21,7 +21,7 @@ Submitted-by: John Crispin <john@phrozen.org>
--- a/include/linux/phy.h
+++ b/include/linux/phy.h
@@ -1180,6 +1180,10 @@ struct phy_driver {
@@ -1181,6 +1181,10 @@ struct phy_driver {
*/
int (*led_polarity_set)(struct phy_device *dev, int index,
unsigned long modes);

View File

@ -21,7 +21,7 @@ Submitted-by: John Crispin <john@phrozen.org>
--- a/drivers/net/phy/phylink.c
+++ b/drivers/net/phy/phylink.c
@@ -2491,6 +2491,11 @@ int phylink_ethtool_ksettings_set(struct
@@ -2503,6 +2503,11 @@ int phylink_ethtool_ksettings_set(struct
* the presence of a PHY, this should not be changed as that
* should be determined from the media side advertisement.
*/
@ -33,7 +33,7 @@ Submitted-by: John Crispin <john@phrozen.org>
return phy_ethtool_ksettings_set(pl->phydev, &phy_kset);
}
@@ -2793,8 +2798,11 @@ int phylink_ethtool_get_eee(struct phyli
@@ -2805,8 +2810,11 @@ int phylink_ethtool_get_eee(struct phyli
ASSERT_RTNL();
@ -46,7 +46,7 @@ Submitted-by: John Crispin <john@phrozen.org>
return ret;
}
@@ -2811,8 +2819,11 @@ int phylink_ethtool_set_eee(struct phyli
@@ -2823,8 +2831,11 @@ int phylink_ethtool_set_eee(struct phyli
ASSERT_RTNL();

View File

@ -17,7 +17,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20230731110012.2913742-7-jag
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -1120,6 +1120,59 @@ static const struct vop_data rk3328_vop
@@ -1122,6 +1122,59 @@ static const struct vop_data rk3328_vop
.max_output = { 4096, 2160 },
};
@ -77,7 +77,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20230731110012.2913742-7-jag
static const struct of_device_id vop_driver_dt_match[] = {
{ .compatible = "rockchip,rk3036-vop",
.data = &rk3036_vop },
@@ -1147,6 +1200,8 @@ static const struct of_device_id vop_dri
@@ -1149,6 +1202,8 @@ static const struct of_device_id vop_dri
.data = &rk3228_vop },
{ .compatible = "rockchip,rk3328-vop",
.data = &rk3328_vop },

View File

@ -39,7 +39,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20230621223311.2239547-3-jon
.reset = drm_atomic_helper_plane_reset,
.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
@@ -1610,11 +1605,6 @@ static const struct drm_crtc_helper_func
@@ -1614,11 +1609,6 @@ static const struct drm_crtc_helper_func
.atomic_disable = vop_crtc_atomic_disable,
};
@ -51,7 +51,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20230621223311.2239547-3-jon
static struct drm_crtc_state *vop_crtc_duplicate_state(struct drm_crtc *crtc)
{
struct rockchip_crtc_state *rockchip_state;
@@ -1722,7 +1712,7 @@ vop_crtc_verify_crc_source(struct drm_cr
@@ -1726,7 +1716,7 @@ vop_crtc_verify_crc_source(struct drm_cr
static const struct drm_crtc_funcs vop_crtc_funcs = {
.set_config = drm_atomic_helper_set_config,
.page_flip = drm_atomic_helper_page_flip,
@ -60,7 +60,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20230621223311.2239547-3-jon
.reset = vop_crtc_reset,
.atomic_duplicate_state = vop_crtc_duplicate_state,
.atomic_destroy_state = vop_crtc_destroy_state,
@@ -1973,7 +1963,7 @@ static void vop_destroy_crtc(struct vop
@@ -1977,7 +1967,7 @@ static void vop_destroy_crtc(struct vop
*/
list_for_each_entry_safe(plane, tmp, &drm_dev->mode_config.plane_list,
head)

View File

@ -108,7 +108,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20231023173718.188102-3-jona
VOP_WIN_SET(vop, win, uv_vir, DIV_ROUND_UP(fb->pitches[1], 4));
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -186,6 +186,7 @@ struct vop_win_phy {
@@ -187,6 +187,7 @@ struct vop_win_phy {
struct vop_reg enable;
struct vop_reg gate;
struct vop_reg format;
@ -145,7 +145,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20231023173718.188102-3-jona
static const uint64_t format_modifiers_win_full[] = {
DRM_FORMAT_MOD_LINEAR,
DRM_FORMAT_MOD_INVALID,
@@ -627,11 +647,12 @@ static const struct vop_scl_regs rk3288_
@@ -629,11 +649,12 @@ static const struct vop_scl_regs rk3288_
static const struct vop_win_phy rk3288_win01_data = {
.scl = &rk3288_win_full_scl,
@ -160,7 +160,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20231023173718.188102-3-jona
.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
.uv_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 15),
.act_info = VOP_REG(RK3288_WIN0_ACT_INFO, 0x1fff1fff, 0),
@@ -936,13 +957,38 @@ static const struct vop_win_yuv2yuv_data
@@ -938,13 +959,38 @@ static const struct vop_win_yuv2yuv_data
};
@ -202,7 +202,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20231023173718.188102-3-jona
.rb_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 12),
.uv_swap = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 15),
.x_mir_en = VOP_REG(RK3288_WIN0_CTRL0, 0x1, 21),
@@ -965,9 +1011,9 @@ static const struct vop_win_phy rk3399_w
@@ -967,9 +1013,9 @@ static const struct vop_win_phy rk3399_w
* AFBC on the primary plane.
*/
static const struct vop_win_data rk3399_vop_win_data[] = {
@ -214,7 +214,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20231023173718.188102-3-jona
.type = DRM_PLANE_TYPE_OVERLAY },
{ .base = 0x00, .phy = &rk3368_win23_data,
.type = DRM_PLANE_TYPE_OVERLAY },
@@ -1099,11 +1145,11 @@ static const struct vop_intr rk3328_vop_
@@ -1101,11 +1147,11 @@ static const struct vop_intr rk3328_vop_
};
static const struct vop_win_data rk3328_vop_win_data[] = {

View File

@ -114,7 +114,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20231211115627.1784735-1-and
struct iommu_domain;
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -277,18 +277,6 @@ struct vop_data {
@@ -278,18 +278,6 @@ struct vop_data {
/* dst alpha ctrl define */
#define DST_FACTOR_M0(x) (((x) & 0x7) << 6)

View File

@ -156,7 +156,7 @@ Link: https://lore.kernel.org/r/20231023032251.164775-1-luben.tuikov@amd.com
init_completion(&entity->entity_idle);
@@ -533,7 +545,7 @@ void drm_sched_entity_select_rq(struct d
@@ -535,7 +547,7 @@ void drm_sched_entity_select_rq(struct d
spin_lock(&entity->rq_lock);
sched = drm_sched_pick_best(entity->sched_list, entity->num_sched_list);

View File

@ -22,7 +22,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
--- a/drivers/gpu/drm/scheduler/sched_entity.c
+++ b/drivers/gpu/drm/scheduler/sched_entity.c
@@ -370,7 +370,7 @@ static void drm_sched_entity_wakeup(stru
@@ -372,7 +372,7 @@ static void drm_sched_entity_wakeup(stru
container_of(cb, struct drm_sched_entity, cb);
drm_sched_entity_clear_dep(f, cb);
@ -31,7 +31,7 @@ Signed-off-by: Luben Tuikov <ltuikov89@gmail.com>
}
/**
@@ -602,7 +602,7 @@ void drm_sched_entity_push_job(struct dr
@@ -604,7 +604,7 @@ void drm_sched_entity_push_job(struct dr
if (drm_sched_policy == DRM_SCHED_POLICY_FIFO)
drm_sched_rq_update_fifo(entity, submit_ts);

View File

@ -20,7 +20,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20231110000123.72565-2-ltuik
--- a/drivers/gpu/drm/scheduler/sched_entity.c
+++ b/drivers/gpu/drm/scheduler/sched_entity.c
@@ -370,7 +370,7 @@ static void drm_sched_entity_wakeup(stru
@@ -372,7 +372,7 @@ static void drm_sched_entity_wakeup(stru
container_of(cb, struct drm_sched_entity, cb);
drm_sched_entity_clear_dep(f, cb);
@ -29,7 +29,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20231110000123.72565-2-ltuik
}
/**
@@ -602,7 +602,7 @@ void drm_sched_entity_push_job(struct dr
@@ -604,7 +604,7 @@ void drm_sched_entity_push_job(struct dr
if (drm_sched_policy == DRM_SCHED_POLICY_FIFO)
drm_sched_rq_update_fifo(entity, submit_ts);

View File

@ -63,7 +63,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
}
}
EXPORT_SYMBOL_GPL(rockchip_clk_register_plls);
@@ -585,7 +579,7 @@ void rockchip_clk_register_branches(stru
@@ -586,7 +580,7 @@ void rockchip_clk_register_branches(stru
continue;
}
@ -72,7 +72,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
}
}
EXPORT_SYMBOL_GPL(rockchip_clk_register_branches);
@@ -609,7 +603,7 @@ void rockchip_clk_register_armclk(struct
@@ -610,7 +604,7 @@ void rockchip_clk_register_armclk(struct
return;
}

View File

@ -58,7 +58,7 @@ Signed-off-by: jensen <jensenhuang@friendlyarm.com>
plat->axi = stmmac_axi_setup(pdev);
--- a/include/linux/stmmac.h
+++ b/include/linux/stmmac.h
@@ -300,6 +300,7 @@ struct plat_stmmacenet_data {
@@ -299,6 +299,7 @@ struct plat_stmmacenet_data {
int rss_en;
int mac_port_sel_speed;
int has_xgmac;

View File

@ -8,7 +8,7 @@
#include <linux/tcp.h>
#include <linux/interrupt.h>
#include <linux/dma-mapping.h>
@@ -5331,6 +5332,7 @@ static int rtl_init_one(struct pci_dev *
@@ -5371,6 +5372,7 @@ static int rtl_init_one(struct pci_dev *
int jumbo_max, region, rc;
enum mac_version chipset;
struct net_device *dev;
@ -16,7 +16,7 @@
u32 txconfig;
u16 xid;
@@ -5338,6 +5340,9 @@ static int rtl_init_one(struct pci_dev *
@@ -5378,6 +5380,9 @@ static int rtl_init_one(struct pci_dev *
if (!dev)
return -ENOMEM;

View File

@ -17,7 +17,7 @@ Subject: [PATCH] net: phy: realtek: add LED configuration from OF for 8211f
#define RTL8211F_LEDCR 0x10
#define RTL8211F_LEDCR_MODE BIT(15)
#define RTL8211F_LEDCR_ACT_TXRX BIT(4)
@@ -376,6 +377,7 @@ static int rtl8211f_config_init(struct p
@@ -379,6 +380,7 @@ static int rtl8211f_config_init(struct p
struct rtl821x_priv *priv = phydev->priv;
struct device *dev = &phydev->mdio.dev;
u16 val_txdly, val_rxdly;
@ -25,7 +25,7 @@ Subject: [PATCH] net: phy: realtek: add LED configuration from OF for 8211f
int ret;
ret = phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1,
@@ -442,6 +444,15 @@ static int rtl8211f_config_init(struct p
@@ -445,6 +447,15 @@ static int rtl8211f_config_init(struct p
val_rxdly ? "enabled" : "disabled");
}