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Merge Official Source

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2024-11-24 14:18:21 +08:00
commit 19db70f6b4
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GPG Key ID: 6850B6345C862176
99 changed files with 7112 additions and 800 deletions
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4
include/kernel-6.6
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@ -1,2 +1,2 @@
LINUX_VERSION-6.6 = .61
LINUX_KERNEL_HASH-6.6.61 = 418fc24df9190f1c3ed9906dc3b7651c2a2eae5c1cb9ab4a6348e20faf047c0b
LINUX_VERSION-6.6 = .63
LINUX_KERNEL_HASH-6.6.63 = d1054ab4803413efe2850f50f1a84349c091631ec50a1cf9e891d1b1f9061835

113
include/optee-os.mk Normal file
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@ -0,0 +1,113 @@
include $(INCLUDE_DIR)/prereq.mk
PKG_NAME ?= optee-os
ifndef PKG_SOURCE_PROTO
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL_FILE:=$(PKG_VERSION).tar.gz
PKG_SOURCE_URL = https://github.com/OP-TEE/optee_os/archive/refs/tags/
TAR_OPTIONS+= --transform 's/optee_os/$(PKG_NAME)/'
endif
PKG_BUILD_DIR = $(BUILD_DIR)/$(PKG_NAME)-$(BUILD_VARIANT)/$(PKG_NAME)-$(PKG_VERSION)
PKG_TARGETS := bin
PKG_FLAGS:=nonshared
PKG_LICENSE:=BSD 2-Clause
PKG_LICENSE_FILES:=LICENSE
PKG_BUILD_PARALLEL ?= 1
$(eval $(call TestHostCommand,python3-cryptography, \
Please install the Python3 cryptography module, \
$(STAGING_DIR_HOST)/bin/python3 -c 'import cryptography'))
$(eval $(call TestHostCommand,python3-pyelftools, \
Please install the Python3 pyelftools module, \
$(STAGING_DIR_HOST)/bin/python3 -c 'import elftools'))
export GCC_HONOUR_COPTS=s
define Package/optee-os/install/default
$(CP) $(patsubst %,$(PKG_BUILD_DIR)/out/arm-plat-$(PLAT)/core/%,$(OPTEE_IMAGE)) $(1)/
endef
Package/optee-os/install = $(Package/optee-os/install/default)
define Optee-os/Init
BUILD_TARGET:=
BUILD_SUBTARGET:=
BUILD_DEVICES:=
NAME:=
DEPENDS:=
HIDDEN:=
DEFAULT:=
VARIANT:=$(1)
PLAT:=$(1)
PLAT_FLAVOR:=
OPTEE_IMAGE:=tee-header_v2.bin tee-pager_v2.bin tee-pageable_v2.bin
endef
TARGET_DEP = TARGET_$(BUILD_TARGET)$(if $(BUILD_SUBTARGET),_$(BUILD_SUBTARGET))
define Build/Optee-os/Target
$(eval $(call Optee-os/Init,$(1)))
$(eval $(call Optee-os/Default,$(1)))
$(eval $(call Optee-os/$(1),$(1)))
define Package/optee-os-$(1)
SECTION:=boot
CATEGORY:=Boot Loaders
TITLE:=OPTEE-OS for $(NAME)
VARIANT:=$(VARIANT)
DEPENDS:=@!IN_SDK $(DEPENDS)
HIDDEN:=$(HIDDEN)
ifneq ($(BUILD_TARGET),)
DEPENDS += @$(TARGET_DEP)
ifneq ($(BUILD_DEVICES),)
DEFAULT := y if ($(TARGET_DEP)_Default \
$(patsubst %,|| $(TARGET_DEP)_DEVICE_%,$(BUILD_DEVICES)) \
$(patsubst %,|| $(patsubst TARGET_%,TARGET_DEVICE_%,$(TARGET_DEP))_DEVICE_%,$(BUILD_DEVICES)))
endif
endif
$(if $(DEFAULT),DEFAULT:=$(DEFAULT))
URL:=https://optee.readthedocs.io
endef
define Package/optee-os-$(1)/install
$$(Package/optee-os/install)
endef
endef
define Build/Configure/Optee-os
endef
define Build/Compile/Optee-os
+$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) \
PATH=$(LINUX_DIR)/scripts/dtc/:$(PATH) \
CROSS_COMPILE=$(TARGET_CROSS) \
CROSS_COMPILE_core="$(TARGET_CROSS)" \
CROSS_COMPILE_ta_arm64="$(TARGET_CROSS)" \
CROSS_COMPILE_ta_arm32="$(TARGET_CROSS)" \
$(if $(CONFIG_ARCH_64BIT), CFG_ARM64_core=y CFG_USER_TA_TARGETS=ta_arm64, CFG_ARM32_core=y) \
PLATFORM="$(PLAT)" \
PLATFORM_FLAVOR="$(call qstrip,$(PLAT_FLAVOR))" \
$(OPTEE_MAKE_FLAGS)
endef
define BuildPackage/Optee-os/Defaults
Build/Configure/Default = $$$$(Build/Configure/Optee-os)
Build/Compile/Default = $$$$(Build/Compile/Optee-os)
endef
define BuildPackage/Optee-os
$(eval $(call BuildPackage/Optee-os/Defaults))
$(foreach type,$(if $(DUMP),$(OPTEE_TARGETS),$(BUILD_VARIANT)), \
$(eval $(call Build/Optee-os/Target,$(type)))
)
$(eval $(call Build/DefaultTargets))
$(foreach type,$(if $(DUMP),$(OPTEE_TARGETS),$(BUILD_VARIANT)), \
$(call BuildPackage,optee-os-$(type))
)
endef

63
package/boot/arm-trusted-firmware-stm32/Makefile Normal file
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@ -0,0 +1,63 @@
#
# Copyright (C) 2024 Bootlin
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_VERSION:=2.10
PKG_RELEASE:=1
PKG_HASH:=88215a62291b9ba87da8e50b077741103cdc08fb6c9e1ebd34dfaace746d3201
PKG_MAINTAINER:=Thomas Richard <thomas.richard@bootlin.com>
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/trusted-firmware-a.mk
include $(INCLUDE_DIR)/package.mk
define Trusted-Firmware-A/Default
BUILD_TARGET:=stm32
BUILD_DEVICES:=$(1)
DEPENDS:=+u-boot-$(1) +optee-os-$(1)
endef
define Trusted-Firmware-A/stm32mp1
BUILD_SUBTARGET:=stm32mp1
PLAT:=stm32mp1
MAKE_ARGS += BL32_EXTRA2=$(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-tee-pageable_v2.bin \
STM32MP_USB_PROGRAMMER=1 \
STM32MP1_OPTEE_IN_SYSRAM=1 \
ARM_ARCH_MAJOR=7
endef
define Trusted-Firmware-A/stm32mp135f-dk
$(call Trusted-Firmware-A/stm32mp1)
NAME:=STM32MP135F-DK
DTB_FILE_NAME=stm32mp135f-dk.dtb
endef
TFA_TARGETS := stm32mp135f-dk
TFA_MAKE_FLAGS += \
ARCH=aarch32 AARCH32_SP=optee \
BL32=$(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-tee-header_v2.bin \
BL32_EXTRA1=$(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-tee-pager_v2.bin \
BL33=$(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-u-boot.bin \
BL33_CFG=$(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-u-boot.dtb \
DTB_FILE_NAME=$(DTB_FILE_NAME) \
STM32MP_SDMMC=1 \
TARGET_BOARD="" \
$(MAKE_ARGS) \
all fip
define Package/trusted-firmware-a/install
$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
$(CP) $(PKG_BUILD_DIR)/build/$(PLAT)/release/tf-a-$(BUILD_VARIANT).stm32 \
$(STAGING_DIR_IMAGE)/tf-a-$(BUILD_VARIANT).stm32
$(CP) $(PKG_BUILD_DIR)/build/$(PLAT)/release/fip.bin \
$(STAGING_DIR_IMAGE)/fip-$(BUILD_VARIANT).bin
endef
$(eval $(call BuildPackage/Trusted-Firmware-A))

49
package/boot/optee-os-stm32/Makefile Normal file
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@ -0,0 +1,49 @@
#
# Copyright (C) 2024 Bootlin
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_VERSION:=4.3.0
PKG_RELEASE:=1
PKG_HASH:=390b271905c828d6def9fa6a77bbaa425f3b434d733c8eb18f582ccbc6896096
PKG_MAINTAINER:=Thomas Richard <thomas.richard@bootlin.com>
OPTEE_USE_INTREE_DTC:=1
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/optee-os.mk
include $(INCLUDE_DIR)/package.mk
define Optee-os/Default
BUILD_TARGET:=stm32
endef
define Optee-os/stm32mp1
BUILD_SUBTARGET:=stm32mp1
PLAT:=stm32mp1
endef
define Optee-os/stm32mp135f-dk
$(call Optee-os/stm32mp1)
NAME:=STM32MP135F-DK
PLAT_FLAVOR:=135F_DK
endef
OPTEE_TARGETS := stm32mp135f-dk
define Package/optee-os/install/default
endef
define Build/InstallDev
$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
$(foreach img,$(OPTEE_IMAGE), \
$(CP) $(PKG_BUILD_DIR)/out/arm-plat-$(PLAT)/core/$(img) $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-$(img); \
)
endef
$(eval $(call BuildPackage/Optee-os))

17
package/boot/uboot-envtools/files/mediatek_filogic
View File

@ -53,6 +53,16 @@ xiaomi,redmi-router-ax6000-ubootmod|\
zyxel,ex5601-t0-ubootmod)
ubootenv_add_ubi_default
;;
acer,predator-w6|\
acer,predator-w6d|\
acer,vero-w6m|\
glinet,gl-mt2500|\
glinet,gl-mt6000|\
glinet,gl-x3000|\
glinet,gl-xe3000)
local envdev=$(find_mmc_part "u-boot-env")
ubootenv_add_uci_config "$envdev" "0x0" "0x80000"
;;
asus,rt-ax59u)
ubootenv_add_uci_config "/dev/mtd0" "0x100000" "0x20000" "0x20000"
;;
@ -95,13 +105,6 @@ dlink,aquila-pro-ai-m30-a1)
gatonetworks,gdsp)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x10000"
;;
glinet,gl-x3000|\
glinet,gl-xe3000|\
glinet,gl-mt2500|\
glinet,gl-mt6000)
local envdev=$(find_mmc_part "u-boot-env")
ubootenv_add_uci_config "$envdev" "0x0" "0x80000"
;;
glinet,gl-mt3000)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x80000" "0x20000"
;;

51
package/boot/uboot-stm32/Makefile Normal file
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@ -0,0 +1,51 @@
#
# Copyright (C) 2024 Bootlin
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_VERSION:=2024.07
PKG_RELEASE:=1
PKG_HASH:=f591da9ab90ef3d6b3d173766d0ddff90c4ed7330680897486117df390d83c8f
PKG_MAINTAINER:=Thomas Richard <thomas.richard@bootlin.com>
UBOOT_USE_INTREE_DTC:=1
include $(INCLUDE_DIR)/u-boot.mk
include $(INCLUDE_DIR)/package.mk
define U-Boot/Default
BUILD_TARGET:=stm32
UBOOT_IMAGE:=u-boot.bin u-boot.dtb
endef
define U-Boot/stm32mp13
BUILD_SUBTARGET:=stm32mp1
UBOOT_CONFIG:=stm32mp13
endef
define U-Boot/stm32mp135f-dk
$(call U-Boot/stm32mp13)
NAME:=STM32MP135F-DK
DEVICE_TREE:=stm32mp135f-dk
endef
UBOOT_TARGETS := stm32mp135f-dk
UBOOT_MAKE_FLAGS += DEVICE_TREE=$(DEVICE_TREE)
define Build/InstallDev
$(INSTALL_DIR) $(STAGING_DIR_IMAGE)
$(foreach img,$(UBOOT_IMAGE), \
$(CP) $(PKG_BUILD_DIR)/$(img) $(STAGING_DIR_IMAGE)/$(BUILD_VARIANT)-$(img); \
)
endef
define Package/u-boot/install/default
endef
$(eval $(call BuildPackage/U-Boot))

8
package/firmware/linux-firmware/intel.mk
View File

@ -199,6 +199,14 @@ define Package/iwlwifi-firmware-ax210/install
endef
$(eval $(call BuildPackage,iwlwifi-firmware-ax210))
Package/iwlwifi-firmware-ax411 = $(call Package/firmware-default,Intel AX411 firmware)
define Package/iwlwifi-firmware-ax411/install
$(INSTALL_DIR) $(1)/lib/firmware
$(INSTALL_DATA) $(PKG_BUILD_DIR)/iwlwifi-so-a0-gf4-a0-89.ucode $(1)/lib/firmware
$(INSTALL_DATA) $(PKG_BUILD_DIR)/iwlwifi-so-a0-gf4-a0.pnvm $(1)/lib/firmware
endef
$(eval $(call BuildPackage,iwlwifi-firmware-ax411))
Package/iwlwifi-firmware-be200 = $(call Package/firmware-default,Intel BE200 firmware)
define Package/iwlwifi-firmware-be200/install
$(INSTALL_DIR) $(1)/lib/firmware

57
package/firmware/murata-firmware/Makefile Normal file
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@ -0,0 +1,57 @@
#
# Copyright (C) 2024 Bootlin
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=murata-firmware
PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2024-09-12
PKG_SOURCE_URL:=https://github.com/murata-wireless/cyw-fmac-fw.git
PKG_MIRROR_HASH:=26f8a2df800666daab183b2842e5b3d591b1e5b31769d5429f9d70527f43d152
PKG_SOURCE_VERSION:=50ac17bb65b2342cd954d49d9bc492709d431c3c
PKG_MAINTAINER:=Thomas Richard <thomas.richard@bootlin.com>
PKG_LICENSE_FILES:=LICENCE
include $(INCLUDE_DIR)/package.mk
define Package/murata-firmware-default
SECTION:=firmware
CATEGORY:=Firmware
URL:=https://community.murata.com/
endef
define Build/Compile
endef
define Package/murata-firmware-43430-sdio
$(Package/murata-firmware-default)
TITLE:=BCM43430 FullMac SDIO firmware
CONFLICTS:=cypress-firmware-43430-sdio
endef
define Package/murata-firmware-43430-sdio/install
$(INSTALL_DIR) $(1)/lib/firmware/murata
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/cyfmac43430-sdio.bin \
$(1)/lib/firmware/murata/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/cyfmac43430-sdio.1DX.clm_blob \
$(1)/lib/firmware/murata/
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(LN) \
../murata/cyfmac43430-sdio.bin \
$(1)/lib/firmware/brcm/brcmfmac43430-sdio.bin
$(LN) \
../murata/cyfmac43430-sdio.1DX.clm_blob \
$(1)/lib/firmware/brcm/brcmfmac43430-sdio.clm_blob
endef
$(eval $(call BuildPackage,murata-firmware-43430-sdio))

48
package/firmware/murata-nvram/Makefile Normal file
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@ -0,0 +1,48 @@
#
# Copyright (C) 2024 Bootlin
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=murata-nvram
PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2024-09-28
PKG_SOURCE_URL:=https://github.com/murata-wireless/cyw-fmac-nvram.git
PKG_MIRROR_HASH:=e2fc6f1f9898edfd67f5495e615882700f03b42a75efa2e3f4e2d524aed0efb8
PKG_SOURCE_VERSION:=255819aab07572d87576a13329ef9d4c654167aa
PKG_MAINTAINER:=Thomas Richard <thomas.richard@bootlin.com>
PKG_LICENSE_FILES:=LICENCE.cypress
include $(INCLUDE_DIR)/package.mk
define Package/murata-nvram-default
SECTION:=firmware
CATEGORY:=Firmware
URL:=https://community.murata.com/
endef
define Build/Compile
endef
define Package/murata-nvram-43430-sdio
$(Package/murata-nvram-default)
TITLE:=BCM43430 SDIO NVRAM
CONFLICTS:=brcmfmac-nvram-43430-sdio
endef
define Package/murata-nvram-43430-sdio/install
$(INSTALL_DIR) $(1)/lib/firmware/brcm
$(INSTALL_DATA) ./files/cyfmac43430-sdio.1DX.stm32.txt \
$(1)/lib/firmware/brcm/
$(LN) \
cyfmac43430-sdio.1DX.stm32.txt \
$(1)/lib/firmware/brcm/brcmfmac43430-sdio.st,stm32mp135f-dk.txt
endef
$(eval $(call BuildPackage,murata-nvram-43430-sdio))

47
package/firmware/murata-nvram/files/cyfmac43430-sdio.1DX.stm32.txt Executable file
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@ -0,0 +1,47 @@
# This NVRAM file is based on cyfmac43430-sdio.1DX.txt, except that the muxenab
# parameter was unset to enable IB IRQ (OOB IRQ is not stable on STM32
# platforms).
# 2.4 GHz, 20 MHz BW mode
manfid=0x2d0
prodid=0x0726
vendid=0x14e4
devid=0x43e2
boardtype=0x0726
boardrev=0x1202
boardnum=22
macaddr=00:90:4c:c5:12:38
sromrev=11
boardflags=0x00404201
boardflags3=0x08000000
xtalfreq=37400
nocrc=1
ag0=0
aa2g=1
ccode=ALL
#pa0itssit=0x20
extpagain2g=0
pa2ga0=-145,6667,-751
AvVmid_c0=0x0,0xc8
cckpwroffset0=2
maxp2ga0=74
#txpwrbckof=6
cckbw202gpo=0
legofdmbw202gpo=0x88888888
mcsbw202gpo=0xaaaaaaaa
propbw202gpo=0xdd
ofdmdigfilttype=18
ofdmdigfilttypebe=18
papdmode=1
papdvalidtest=1
pacalidx2g=48
papdepsoffset=-22
papdendidx=58
il0macaddr=00:90:4c:c5:12:38
wl0id=0x431b
# muxenab defined to enable OOB IRQ. Level sensitive interrupt via WL_HOST_WAKE line.
# muxenab=0x10
#BT COEX deferral limit setting
#btc_params 8 45000
#btc_params 10 20000
#spurconfig=0x3
# End of NVRAM - do not remove this line #

9
package/kernel/linux/modules/crypto.mk
View File

@ -249,6 +249,15 @@ endef
$(eval $(call KernelPackage,crypto-echainiv))
define KernelPackage/crypto-engine
TITLE:=Crypto engine
KCONFIG:=CONFIG_CRYPTO_ENGINE
FILES:=$(LINUX_DIR)/crypto/crypto_engine.ko
AUTOLOAD:=$(call AutoLoad,09,crypto_engine)
$(call AddDepends/crypto, +kmod-crypto-rsa +kmod-crypto-kpp)
endef
$(eval $(call KernelPackage,crypto-engine))
define KernelPackage/crypto-essiv
TITLE:=ESSIV support for block encryption

32
package/kernel/linux/modules/iio.mk
View File

@ -46,6 +46,38 @@ endef
$(eval $(call KernelPackage,iio-kfifo-buf))
define KernelPackage/industrialio-hw-consumer
TITLE:=Provides a bonding way to an other device in hardware
KCONFIG:=CONFIG_IIO_BUFFER_HW_CONSUMER
FILES:=$(LINUX_DIR)/drivers/iio/buffer/industrialio-hw-consumer.ko
AUTOLOAD:=$(call AutoLoad,55,industrialio-hw-consumer)
$(call AddDepends/iio,+kmod-iio-kfifo-buf)
endef
define KernelPackage/industrialio-hw-consumer/description
Provides a way to bonding when an IIO device has a direct connection
to another device in hardware. In this case buffers for data transfers
are handled by hardware.
endef
$(eval $(call KernelPackage,industrialio-hw-consumer))
define KernelPackage/industrialio-buffer-cb
TITLE:=Provides callback buffer used for push in-kernel interfaces
KCONFIG:=CONFIG_IIO_BUFFER_CB
FILES:=$(LINUX_DIR)/drivers/iio/buffer/industrialio-buffer-cb.ko
AUTOLOAD:=$(call AutoLoad,55,industrialio-triggered-buffer-cb)
$(call AddDepends/iio)
endef
define KernelPackage/industrialio-buffer-cb/description
Should be selected by any drivers that do in-kernel push usage.
endef
$(eval $(call KernelPackage,industrialio-buffer-cb))
define KernelPackage/industrialio-triggered-buffer
TITLE:=Provides helper functions for setting up triggered buffers.
DEPENDS:=+kmod-iio-kfifo-buf

18
package/kernel/linux/modules/netsupport.mk
View File

@ -42,6 +42,24 @@ endef
$(eval $(call KernelPackage,atmtcp))
define KernelPackage/appletalk
SUBMENU:=$(NETWORK_SUPPORT_MENU)
TITLE:=Appletalk protocol support
KCONFIG:= \
CONFIG_ATALK \
CONFIG_DEV_APPLETALK \
CONFIG_IPDDP=n
FILES:=$(LINUX_DIR)/net/appletalk/appletalk.ko
AUTOLOAD:=$(call AutoLoad,40,appletalk)
endef
define KernelPackage/appletalk/description
Kernel module for AppleTalk protocol.
endef
$(eval $(call KernelPackage,appletalk))
define KernelPackage/bonding
SUBMENU:=$(NETWORK_SUPPORT_MENU)
TITLE:=Ethernet bonding driver

1
package/kernel/linux/modules/other.mk
View File

@ -962,6 +962,7 @@ define KernelPackage/thermal
CONFIG_THERMAL=y \
CONFIG_THERMAL_OF=y \
CONFIG_CPU_THERMAL=y \
CONFIG_DEVFREQ_THERMAL=n \
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y \
CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE=n \
CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE=n \

11
package/kernel/linux/modules/sound.mk
View File

@ -314,6 +314,17 @@ endef
$(eval $(call KernelPackage,sound-soc-spdif))
define KernelPackage/sound-soc-dmic
TITLE:=Generic Digital Microphone CODEC
KCONFIG:=CONFIG_SND_SOC_DMIC
FILES:=$(LINUX_DIR)/sound/soc/codecs/snd-soc-dmic.ko
AUTOLOAD:=$(call AutoProbe,snd-soc-dmic)
$(call AddDepends/sound,+kmod-sound-soc-core)
endef
$(eval $(call KernelPackage,sound-soc-dmic))
define KernelPackage/pcspkr
DEPENDS:=@TARGET_x86 +kmod-input-core
TITLE:=PC speaker support

1
package/kernel/linux/modules/usb.mk
View File

@ -576,6 +576,7 @@ define KernelPackage/usb-audio
CONFIG_SND_USB_AUDIO
$(call AddDepends/usb)
$(call AddDepends/sound)
DEPENDS+=kmod-media-controller
FILES:= \
$(LINUX_DIR)/sound/usb/snd-usbmidi-lib.ko \
$(LINUX_DIR)/sound/usb/snd-usb-audio.ko

44
package/kernel/linux/modules/video.mk
View File

@ -12,6 +12,28 @@ V4L2_DIR=v4l2-core
V4L2_USB_DIR=usb
V4L2_MEM2MEM_DIR=platform
#
# Media
#
define KernelPackage/media-controller
SUBMENU:=$(VIDEO_MENU)
TITLE:=Media Controller API
KCONFIG:= \
CONFIG_MEDIA_SUPPORT \
CONFIG_MEDIA_CONTROLLER=y
FILES:= \
$(LINUX_DIR)/drivers/media/mc/mc.ko
AUTOLOAD:=$(call AutoProbe,mc)
endef
define KernelPackage/media-controller/description
Kernel modules for media controller API used to query media devices
internal topology and configure it dynamically.
endef
$(eval $(call KernelPackage,media-controller))
#
# Video Display
#
@ -694,9 +716,8 @@ $(eval $(call KernelPackage,drm-radeon))
define KernelPackage/video-core
SUBMENU:=$(VIDEO_MENU)
TITLE=Video4Linux support
DEPENDS:=+PACKAGE_kmod-i2c-core:kmod-i2c-core
DEPENDS:=+PACKAGE_kmod-i2c-core:kmod-i2c-core +kmod-media-controller
KCONFIG:= \
CONFIG_MEDIA_SUPPORT \
CONFIG_MEDIA_CAMERA_SUPPORT=y \
CONFIG_VIDEO_DEV \
CONFIG_V4L_PLATFORM_DRIVERS=y \
@ -752,6 +773,25 @@ endef
$(eval $(call KernelPackage,video-videobuf2))
define KernelPackage/video-async
TITLE:=V4L2 ASYNC support
KCONFIG:=CONFIG_V4L2_ASYNC
FILES:=$(LINUX_DIR)/drivers/media/$(V4L2_DIR)/v4l2-async.ko
$(call AddDepends/video)
AUTOLOAD:=$(call AutoProbe,v4l2-async)
endef
$(eval $(call KernelPackage,video-async))
define KernelPackage/video-fwnode
TITLE:=V4L2 FWNODE support
KCONFIG:=CONFIG_V4L2_FWNODE
FILES:=$(LINUX_DIR)/drivers/media/$(V4L2_DIR)/v4l2-fwnode.ko
$(call AddDepends/video,+kmod-video-async)
AUTOLOAD:=$(call AutoProbe,v4l2-fwnode)
endef
$(eval $(call KernelPackage,video-fwnode))
define KernelPackage/video-cpia2
TITLE:=CPIA2 video driver

1
package/kernel/mac80211/broadcom.mk
View File

@ -437,6 +437,7 @@ define KernelPackage/brcmfmac/config
default y if TARGET_starfive
default y if TARGET_rockchip
default y if TARGET_sunxi
default y if TARGET_stm32
default n
help
Enable support for cards attached to an SDIO bus.

2
package/network/config/wifi-scripts/files/lib/netifd/wireless/mac80211.sh
View File

@ -208,7 +208,7 @@ mac80211_hostapd_setup_base() {
dsss_cck_40:1
ht_cap_mask=0
for cap in $(iw phy "$phy" info | grep 'Capabilities:' | cut -d: -f2); do
for cap in $(iw phy "$phy" info | grep -E '^\s*Capabilities:' | cut -d: -f2); do
ht_cap_mask="$(($ht_cap_mask | $cap))"
done

151
target/linux/ath79/dts/qca9563_tplink_cpe710-v1.dts
View File

@ -1,151 +1,13 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca956x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
#include "qca9563_tplink_cpe710.dtsi"
/ {
model = "TP-Link CPE710 v1";
compatible = "tplink,cpe710-v1", "qca,qca9563";
aliases {
label-mac-device = &eth0;
led-boot = &led_lan;
led-failsafe = &led_lan;
led-upgrade = &led_lan;
};
leds {
compatible = "gpio-leds";
led_lan: lan {
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_BLUE>;
gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
};
wlan5g {
label = "blue:wlan5g";
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&pcie {
status = "okay";
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&precal_art_5000>, <&macaddr_info_8>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
};
partition@50000 {
label = "partition-table";
reg = <0x050000 0x010000>;
read-only;
};
info: partition@60000 {
label = "info";
reg = <0x060000 0x010000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_info_8: macaddr@8 {
reg = <0x8 0x6>;
};
};
};
partition@70000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x070000 0xf50000>;
};
partition@fc0000 {
label = "config";
reg = <0xfc0000 0x030000>;
read-only;
};
partition@ff0000 {
label = "art";
reg = <0xff0000 0x010000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
precal_art_5000: pre-calibration@5000 {
reg = <0x5000 0x2f20>;
};
};
};
};
};
};
&pinmux {
mdio_pins: mdio_pins {
/* GPIO 10 as MDIO(0x20), GPIO 8 as MDC(0x21) */
pinctrl-single,bits = <0x8 0x00200021 0x00ff00ff>;
};
};
&mdio0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
phy4: ethernet-phy@4 {
reg = <4>;
reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
@ -153,17 +15,6 @@
};
&eth0 {
status = "okay";
phy-handle = <&phy4>;
phy-mode = "sgmii";
nvmem-cells = <&macaddr_info_8>;
nvmem-cell-names = "mac-address";
qca956x-serdes-fixup;
gmac-config {
device = <&gmac>;
};
};

20
target/linux/ath79/dts/qca9563_tplink_cpe710-v2.dts Normal file
View File

@ -0,0 +1,20 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca9563_tplink_cpe710.dtsi"
/ {
model = "TP-Link CPE710 v2";
compatible = "tplink,cpe710-v2", "qca,qca9563";
};
&mdio0 {
phy0: ethernet-phy@0 {
reg = <0>;
reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
};
&eth0 {
phy-handle = <&phy0>;
phy-mode = "sgmii";
};

160
target/linux/ath79/dts/qca9563_tplink_cpe710.dtsi Normal file
View File

@ -0,0 +1,160 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca956x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
aliases {
led-boot = &led_lan;
led-failsafe = &led_lan;
led-upgrade = &led_lan;
label-mac-device = &eth0;
};
leds {
compatible = "gpio-leds";
led_lan: lan {
function = LED_FUNCTION_LAN;
color = <LED_COLOR_ID_BLUE>;
gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
};
wlan5g {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_WLAN_5GHZ;
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&pcie {
status = "okay";
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&precal_art_5000>, <&macaddr_info_8>;
nvmem-cell-names = "pre-calibration", "mac-address";
};
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <40000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
read-only;
};
partition@50000 {
label = "partition-table";
reg = <0x050000 0x010000>;
read-only;
};
partition@60000 {
label = "info";
reg = <0x060000 0x010000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_info_8: macaddr@8 {
reg = <0x8 0x6>;
};
};
};
partition@70000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x070000 0xf50000>;
};
partition@fc0000 {
label = "config";
reg = <0xfc0000 0x030000>;
read-only;
};
partition@ff0000 {
label = "art";
reg = <0xff0000 0x010000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
precal_art_5000: pre-calibration@5000 {
reg = <0x5000 0x2f20>;
};
};
};
};
};
};
&pinmux {
mdio_pins: mdio_pins {
/* GPIO 10 as MDIO(0x20), GPIO 8 as MDC(0x21) */
pinctrl-single,bits = <0x8 0x00200021 0x00ff00ff>;
};
};
&mdio0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
};
&eth0 {
status = "okay";
nvmem-cells = <&macaddr_info_8>;
nvmem-cell-names = "mac-address";
qca956x-serdes-fixup;
gmac-config {
device = <&gmac>;
};
};

3
target/linux/ath79/generic/base-files/etc/board.d/01_leds
View File

@ -222,7 +222,8 @@ openmesh,mr900-v1|\
openmesh,mr900-v2|\
openmesh,mr1750-v1|\
openmesh,mr1750-v2|\
tplink,cpe710-v1)
tplink,cpe710-v1|\
tplink,cpe710-v2)
ucidef_set_led_netdev "lan" "LAN" "blue:lan" "eth0"
;;
compex,wpj344-16m|\

1
target/linux/ath79/generic/base-files/etc/board.d/02_network
View File

@ -89,6 +89,7 @@ ath79_setup_interfaces()
tplink,cpe610-v1|\
tplink,cpe610-v2|\
tplink,cpe710-v1|\
tplink,cpe710-v2|\
tplink,eap225-outdoor-v1|\
tplink,eap225-outdoor-v3|\
tplink,eap225-v1|\

11
target/linux/ath79/image/generic-tp-link.mk
View File

@ -392,6 +392,17 @@ define Device/tplink_cpe710-v1
endef
TARGET_DEVICES += tplink_cpe710-v1
define Device/tplink_cpe710-v2
$(Device/tplink-safeloader-uimage)
SOC := qca9563
IMAGE_SIZE := 15680k
DEVICE_MODEL := CPE710
DEVICE_VARIANT := v2
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9888-ct
TPLINK_BOARD_ID := CPE710V2
endef
TARGET_DEVICES += tplink_cpe710-v2
define Device/tplink-eap2x5
$(Device/tplink-safeloader)
LOADER_TYPE := elf

4
target/linux/ath79/patches-6.6/900-unaligned_access_hacks.patch
View File

@ -557,7 +557,7 @@ SVN-Revision: 35130
static inline struct neighbour *__ipv6_neigh_lookup_noref(struct net_device *dev, const void *pkey)
--- a/net/sched/cls_u32.c
+++ b/net/sched/cls_u32.c
@@ -157,7 +157,7 @@ next_knode:
@@ -167,7 +167,7 @@ next_knode:
data = skb_header_pointer(skb, toff, 4, &hdata);
if (!data)
goto out;
@ -566,7 +566,7 @@ SVN-Revision: 35130
n = rcu_dereference_bh(n->next);
goto next_knode;
}
@@ -208,8 +208,8 @@ check_terminal:
@@ -218,8 +218,8 @@ check_terminal:
&hdata);
if (!data)
goto out;

2
target/linux/bcm27xx/patches-6.6/950-0169-hid-usb-Add-device-quirks-for-Freeway-Airmouse-T3-an.patch
View File

@ -33,7 +33,7 @@ Signed-off-by: Jonathan Bell <jonathan@raspberrypi.org>
#define USB_VENDOR_ID_BELKIN 0x050d
#define USB_DEVICE_ID_FLIP_KVM 0x3201
@@ -1404,6 +1407,9 @@
@@ -1405,6 +1408,9 @@
#define USB_VENDOR_ID_XIAOMI 0x2717
#define USB_DEVICE_ID_MI_SILENT_MOUSE 0x5014

4
target/linux/bcm27xx/patches-6.6/950-0184-staging-vchiq_arm-Register-vcsm-cma-as-a-platform-dr.patch
View File

@ -22,7 +22,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
struct vchiq_drvdata {
const unsigned int cache_line_size;
@@ -1838,6 +1839,7 @@ static int vchiq_probe(struct platform_d
@@ -1825,6 +1826,7 @@ static int vchiq_probe(struct platform_d
goto error_exit;
}
@ -30,7 +30,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
bcm2835_camera = vchiq_register_child(pdev, "bcm2835-camera");
bcm2835_audio = vchiq_register_child(pdev, "bcm2835_audio");
@@ -1853,6 +1855,7 @@ static void vchiq_remove(struct platform
@@ -1840,6 +1842,7 @@ static void vchiq_remove(struct platform
{
platform_device_unregister(bcm2835_audio);
platform_device_unregister(bcm2835_camera);

4
target/linux/bcm27xx/patches-6.6/950-0185-staging-vchiq_arm-Register-bcm2835-codec-as-a-platfo.patch
View File

@ -22,7 +22,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
static struct platform_device *vcsm_cma;
struct vchiq_drvdata {
@@ -1840,6 +1841,7 @@ static int vchiq_probe(struct platform_d
@@ -1827,6 +1828,7 @@ static int vchiq_probe(struct platform_d
}
vcsm_cma = vchiq_register_child(pdev, "vcsm-cma");
@ -30,7 +30,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
bcm2835_camera = vchiq_register_child(pdev, "bcm2835-camera");
bcm2835_audio = vchiq_register_child(pdev, "bcm2835_audio");
@@ -1855,6 +1857,7 @@ static void vchiq_remove(struct platform
@@ -1842,6 +1844,7 @@ static void vchiq_remove(struct platform
{
platform_device_unregister(bcm2835_audio);
platform_device_unregister(bcm2835_camera);

2
target/linux/bcm27xx/patches-6.6/950-0190-staging-vchiq_arm-Set-up-dma-ranges-on-child-devices.patch
View File

@ -18,7 +18,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
@@ -1790,6 +1790,12 @@ vchiq_register_child(struct platform_dev
@@ -1777,6 +1777,12 @@ vchiq_register_child(struct platform_dev
child = NULL;
}

4
target/linux/bcm27xx/patches-6.6/950-0191-staging-vchiq-Use-the-old-dma-controller-for-OF-conf.patch
View File

@ -17,7 +17,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
@@ -1776,6 +1776,7 @@ vchiq_register_child(struct platform_dev
@@ -1763,6 +1763,7 @@ vchiq_register_child(struct platform_dev
{
struct platform_device_info pdevinfo;
struct platform_device *child;
@ -25,7 +25,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
memset(&pdevinfo, 0, sizeof(pdevinfo));
@@ -1791,10 +1792,20 @@ vchiq_register_child(struct platform_dev
@@ -1778,10 +1779,20 @@ vchiq_register_child(struct platform_dev
}
/*

2
target/linux/bcm27xx/patches-6.6/950-0194-staging-vchiq_arm-Give-vchiq-children-DT-nodes.patch
View File

@ -16,7 +16,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
@@ -1785,12 +1785,20 @@ vchiq_register_child(struct platform_dev
@@ -1772,12 +1772,20 @@ vchiq_register_child(struct platform_dev
pdevinfo.id = PLATFORM_DEVID_NONE;
pdevinfo.dma_mask = DMA_BIT_MASK(32);

4
target/linux/bcm27xx/patches-6.6/950-0209-staging-vchiq-Load-bcm2835_isp-driver-from-vchiq.patch
View File

@ -21,7 +21,7 @@ Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
struct vchiq_drvdata {
const unsigned int cache_line_size;
@@ -1869,6 +1870,7 @@ static int vchiq_probe(struct platform_d
@@ -1856,6 +1857,7 @@ static int vchiq_probe(struct platform_d
bcm2835_codec = vchiq_register_child(pdev, "bcm2835-codec");
bcm2835_camera = vchiq_register_child(pdev, "bcm2835-camera");
bcm2835_audio = vchiq_register_child(pdev, "bcm2835_audio");
@ -29,7 +29,7 @@ Signed-off-by: Naushir Patuck <naush@raspberrypi.com>
return 0;
@@ -1880,6 +1882,7 @@ error_exit:
@@ -1867,6 +1869,7 @@ error_exit:
static void vchiq_remove(struct platform_device *pdev)
{

30
target/linux/bcm27xx/patches-6.6/950-0297-staging-vchiq_arm-Add-36-bit-address-support.patch
View File

@ -36,10 +36,10 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
+ .use_36bit_addrs = true,
+};
+
struct vchiq_2835_state {
int inited;
struct vchiq_arm_state arm_state;
@@ -147,10 +153,12 @@ static void __iomem *g_regs;
struct vchiq_pagelist_info {
struct pagelist *pagelist;
size_t pagelist_buffer_size;
@@ -142,10 +148,12 @@ static void __iomem *g_regs;
* of 32.
*/
static unsigned int g_cache_line_size = 32;
@ -52,7 +52,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
static DEFINE_SEMAPHORE(g_free_fragments_mutex, 1);
@@ -180,7 +188,7 @@ static void
@@ -175,7 +183,7 @@ static void
cleanup_pagelistinfo(struct vchiq_instance *instance, struct vchiq_pagelist_info *pagelistinfo)
{
if (pagelistinfo->scatterlist_mapped) {
@ -61,7 +61,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
pagelistinfo->num_pages, pagelistinfo->dma_dir);
}
@@ -340,7 +348,7 @@ create_pagelist(struct vchiq_instance *i
@@ -335,7 +343,7 @@ create_pagelist(struct vchiq_instance *i
count -= len;
}
@ -70,7 +70,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
scatterlist,
num_pages,
pagelistinfo->dma_dir);
@@ -354,22 +362,61 @@ create_pagelist(struct vchiq_instance *i
@@ -349,22 +357,61 @@ create_pagelist(struct vchiq_instance *i
/* Combine adjacent blocks for performance */
k = 0;
@ -148,7 +148,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
}
/* Partial cache lines (fragments) require special measures */
@@ -413,7 +460,7 @@ free_pagelist(struct vchiq_instance *ins
@@ -408,7 +455,7 @@ free_pagelist(struct vchiq_instance *ins
* NOTE: dma_unmap_sg must be called before the
* cpu can touch any of the data/pages.
*/
@ -157,7 +157,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
pagelistinfo->num_pages, pagelistinfo->dma_dir);
pagelistinfo->scatterlist_mapped = 0;
@@ -468,6 +515,7 @@ free_pagelist(struct vchiq_instance *ins
@@ -463,6 +510,7 @@ free_pagelist(struct vchiq_instance *ins
static int vchiq_platform_init(struct platform_device *pdev, struct vchiq_state *state)
{
struct device *dev = &pdev->dev;
@ -165,7 +165,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
struct vchiq_drvdata *drvdata = platform_get_drvdata(pdev);
struct rpi_firmware *fw = drvdata->fw;
struct vchiq_slot_zero *vchiq_slot_zero;
@@ -489,6 +537,24 @@ static int vchiq_platform_init(struct pl
@@ -484,6 +532,24 @@ static int vchiq_platform_init(struct pl
g_cache_line_size = drvdata->cache_line_size;
g_fragments_size = 2 * g_cache_line_size;
@ -190,7 +190,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
/* Allocate space for the channels in coherent memory */
slot_mem_size = PAGE_ALIGN(TOTAL_SLOTS * VCHIQ_SLOT_SIZE);
frag_mem_size = PAGE_ALIGN(g_fragments_size * MAX_FRAGMENTS);
@@ -501,13 +567,14 @@ static int vchiq_platform_init(struct pl
@@ -496,13 +562,14 @@ static int vchiq_platform_init(struct pl
}
WARN_ON(((unsigned long)slot_mem & (PAGE_SIZE - 1)) != 0);
@ -206,7 +206,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
vchiq_slot_zero->platform_data[VCHIQ_PLATFORM_FRAGMENTS_COUNT_IDX] =
MAX_FRAGMENTS;
@@ -541,7 +608,6 @@ static int vchiq_platform_init(struct pl
@@ -536,7 +603,6 @@ static int vchiq_platform_init(struct pl
}
/* Send the base address of the slots to VideoCore */
@ -214,7 +214,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
err = rpi_firmware_property(fw, RPI_FIRMWARE_VCHIQ_INIT,
&channelbase, sizeof(channelbase));
if (err) {
@@ -555,6 +621,8 @@ static int vchiq_platform_init(struct pl
@@ -550,6 +616,8 @@ static int vchiq_platform_init(struct pl
return -ENXIO;
}
@ -223,7 +223,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
vchiq_log_info(vchiq_arm_log_level, "vchiq_init - done (slots %pK, phys %pad)",
vchiq_slot_zero, &slot_phys);
@@ -1768,6 +1836,7 @@ void vchiq_platform_conn_state_changed(s
@@ -1755,6 +1823,7 @@ void vchiq_platform_conn_state_changed(s
static const struct of_device_id vchiq_of_match[] = {
{ .compatible = "brcm,bcm2835-vchiq", .data = &bcm2835_drvdata },
{ .compatible = "brcm,bcm2836-vchiq", .data = &bcm2836_drvdata },
@ -231,7 +231,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
{},
};
MODULE_DEVICE_TABLE(of, vchiq_of_match);
@@ -1800,22 +1869,8 @@ vchiq_register_child(struct platform_dev
@@ -1787,22 +1856,8 @@ vchiq_register_child(struct platform_dev
child->dev.of_node = np;

2
target/linux/bcm27xx/patches-6.6/950-0298-staging-vchiq_arm-children-inherit-DMA-config.patch
View File

@ -15,7 +15,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
--- a/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
+++ b/drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c
@@ -1869,8 +1869,18 @@ vchiq_register_child(struct platform_dev
@@ -1856,8 +1856,18 @@ vchiq_register_child(struct platform_dev
child->dev.of_node = np;

14
target/linux/bcm27xx/patches-6.6/950-0299-staging-vchiq_arm-Usa-a-DMA-pool-for-small-bulks.patch
View File

@ -37,7 +37,7 @@ Signed-off-by: Oliver Gjoneski <ogjoneski@gmail.com>
/* Override the default prefix, which would be vchiq_arm (from the filename) */
#undef MODULE_PARAM_PREFIX
#define MODULE_PARAM_PREFIX DEVICE_NAME "."
@@ -133,6 +136,7 @@ struct vchiq_pagelist_info {
@@ -128,6 +131,7 @@ struct vchiq_pagelist_info {
struct pagelist *pagelist;
size_t pagelist_buffer_size;
dma_addr_t dma_addr;
@ -45,7 +45,7 @@ Signed-off-by: Oliver Gjoneski <ogjoneski@gmail.com>
enum dma_data_direction dma_dir;
unsigned int num_pages;
unsigned int pages_need_release;
@@ -153,6 +157,7 @@ static void __iomem *g_regs;
@@ -148,6 +152,7 @@ static void __iomem *g_regs;
* of 32.
*/
static unsigned int g_cache_line_size = 32;
@ -53,7 +53,7 @@ Signed-off-by: Oliver Gjoneski <ogjoneski@gmail.com>
static unsigned int g_use_36bit_addrs = 0;
static unsigned int g_fragments_size;
static char *g_fragments_base;
@@ -195,8 +200,13 @@ cleanup_pagelistinfo(struct vchiq_instan
@@ -190,8 +195,13 @@ cleanup_pagelistinfo(struct vchiq_instan
if (pagelistinfo->pages_need_release)
unpin_user_pages(pagelistinfo->pages, pagelistinfo->num_pages);
@ -69,7 +69,7 @@ Signed-off-by: Oliver Gjoneski <ogjoneski@gmail.com>
}
static inline bool
@@ -231,6 +241,7 @@ create_pagelist(struct vchiq_instance *i
@@ -226,6 +236,7 @@ create_pagelist(struct vchiq_instance *i
u32 *addrs;
unsigned int num_pages, offset, i, k;
int actual_pages;
@ -77,7 +77,7 @@ Signed-off-by: Oliver Gjoneski <ogjoneski@gmail.com>
size_t pagelist_size;
struct scatterlist *scatterlist, *sg;
int dma_buffers;
@@ -260,8 +271,14 @@ create_pagelist(struct vchiq_instance *i
@@ -255,8 +266,14 @@ create_pagelist(struct vchiq_instance *i
/* Allocate enough storage to hold the page pointers and the page
* list
*/
@ -94,7 +94,7 @@ Signed-off-by: Oliver Gjoneski <ogjoneski@gmail.com>
vchiq_log_trace(vchiq_arm_log_level, "%s - %pK", __func__, pagelist);
@@ -282,6 +299,7 @@ create_pagelist(struct vchiq_instance *i
@@ -277,6 +294,7 @@ create_pagelist(struct vchiq_instance *i
pagelistinfo->pagelist = pagelist;
pagelistinfo->pagelist_buffer_size = pagelist_size;
pagelistinfo->dma_addr = dma_addr;
@ -102,7 +102,7 @@ Signed-off-by: Oliver Gjoneski <ogjoneski@gmail.com>
pagelistinfo->dma_dir = (type == PAGELIST_WRITE) ?
DMA_TO_DEVICE : DMA_FROM_DEVICE;
pagelistinfo->num_pages = num_pages;
@@ -622,6 +640,13 @@ static int vchiq_platform_init(struct pl
@@ -617,6 +635,13 @@ static int vchiq_platform_init(struct pl
}
g_dma_dev = dma_dev ?: dev;

2
target/linux/bcm27xx/patches-6.6/950-0359-mm-page_alloc-cma-introduce-a-customisable-threshold.patch
View File

@ -48,7 +48,7 @@ Signed-off-by: David Plowman <david.plowman@raspberrypi.com>
/*
* A cached value of the page's pageblock's migratetype, used when the page is
* put on a pcplist. Used to avoid the pageblock migratetype lookup when
@@ -2095,12 +2116,13 @@ __rmqueue(struct zone *zone, unsigned in
@@ -2094,12 +2115,13 @@ __rmqueue(struct zone *zone, unsigned in
if (IS_ENABLED(CONFIG_CMA)) {
/*
* Balance movable allocations between regular and CMA areas by

10
target/linux/bcm27xx/patches-6.6/950-1340-mm-numa-Allow-override-of-kernel-s-default-NUMA-poli.patch
View File

@ -23,7 +23,7 @@ Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
--- a/mm/mempolicy.c
+++ b/mm/mempolicy.c
@@ -2974,7 +2974,9 @@ void __init numa_policy_init(void)
@@ -2963,7 +2963,9 @@ void __init numa_policy_init(void)
/* Reset policy of current process to default */
void numa_default_policy(void)
{
@ -34,7 +34,7 @@ Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
}
/*
@@ -2992,7 +2994,6 @@ static const char * const policy_modes[]
@@ -2981,7 +2983,6 @@ static const char * const policy_modes[]
};
@ -42,7 +42,7 @@ Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
/**
* mpol_parse_str - parse string to mempolicy, for tmpfs mpol mount option.
* @str: string containing mempolicy to parse
@@ -3005,13 +3006,18 @@ static const char * const policy_modes[]
@@ -2994,13 +2995,18 @@ static const char * const policy_modes[]
*/
int mpol_parse_str(char *str, struct mempolicy **mpol)
{
@ -62,7 +62,7 @@ Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
if (flags)
*flags++ = '\0'; /* terminate mode string */
@@ -3090,9 +3096,16 @@ int mpol_parse_str(char *str, struct mem
@@ -3079,9 +3085,16 @@ int mpol_parse_str(char *str, struct mem
goto out;
}
@ -82,7 +82,7 @@ Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
/*
* Save nodes for mpol_to_str() to show the tmpfs mount options
@@ -3125,7 +3138,29 @@ out:
@@ -3114,7 +3127,29 @@ out:
*mpol = new;
return err;
}

2
target/linux/mediatek/dts/mt7981b-cudy-ap3000outdoor-v1.dts
View File

@ -11,7 +11,7 @@
compatible = "cudy,ap3000outdoor-v1", "mediatek,mt7981-spim-snand-rfb";
aliases {
label-mac-device = &gmac1;
label-mac-device = &wifi;
led-boot = &led_status_green;
led-failsafe = &led_status_red;
led-running = &led_status_green;

283
target/linux/mediatek/dts/mt7981b-cudy-wr3000s-v1.dts Normal file
View File

@ -0,0 +1,283 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include "mt7981.dtsi"
/ {
model = "Cudy WR3000S v1";
compatible = "cudy,wr3000s-v1", "mediatek,mt7981-spim-snand-rfb";
aliases {
label-mac-device = &gmac0;
led-boot = &led_status;
led-failsafe = &led_status;
led-running = &led_status;
led-upgrade = &led_status;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_status: led@0 {
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
led_internet {
function = LED_FUNCTION_WAN_ONLINE;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 11 GPIO_ACTIVE_LOW>;
};
led_wps {
function = LED_FUNCTION_WPS;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
led_wlan2g {
function = LED_FUNCTION_WLAN_2GHZ;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 6 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
led_wlan5g {
function = LED_FUNCTION_WLAN_5GHZ;
color = <LED_COLOR_ID_WHITE>;
gpios = <&pio 7 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_bdinfo_de00 0>;
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-cal-enable;
spi-cal-mode = "read-data";
spi-cal-datalen = <7>;
spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
spi-cal-addrlen = <5>;
spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x00000 0x0100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x0100000 0x0080000>;
read-only;
};
factory: partition@180000 {
label = "Factory";
reg = <0x180000 0x0200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
};
};
partition@380000 {
label = "bdinfo";
reg = <0x380000 0x0040000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_bdinfo_de00: macaddr@de00 {
compatible = "mac-base";
reg = <0xde00 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@3C0000 {
label = "FIP";
reg = <0x3C0000 0x0200000>;
read-only;
};
partition@580000 {
label = "ubi";
reg = <0x5C0000 0x4000000>;
compatible = "linux,ubi";
};
};
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "wan";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_bdinfo_de00 1>;
};
port@1 {
reg = <1>;
label = "lan1";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan3";
};
port@4 {
reg = <4>;
label = "lan4";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&wifi {
status = "okay";
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

20
target/linux/mediatek/dts/mt7981b-routerich-ax3000.dts
View File

@ -226,25 +226,7 @@
partition@580000 {
label = "ubi";
reg = <0x580000 0x4000000>;
};
partition@4580000 {
label = "firmware_backup";
reg = <0x4580000 0x2000000>;
read-only;
};
partition@6580000 {
label = "zrsave";
reg = <0x6580000 0x100000>;
read-only;
};
partition@6680000 {
label = "config2";
reg = <0x6680000 0x100000>;
read-only;
reg = <0x580000 0x7000000>;
};
};
};

573
target/linux/mediatek/dts/mt7986a-acer-predator-w6.dts
View File

@ -1,473 +1,149 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include "mt7986a.dtsi"
#include "mt7986a-acer-w6-common.dtsi"
/ {
model = "Acer Predator W6";
model = "Acer Predator Connect W6";
compatible = "acer,predator-w6", "mediatek,mt7986a";
aliases {
serial0 = &uart0;
led-boot = &led_status;
led-failsafe = &led_status;
led-running = &led_status;
led-upgrade = &led_status;
led-boot = &led_status_blue;
led-failsafe = &led_status_blue;
led-running = &led_status_green;
led-upgrade = &led_status_red;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "dm-mod.create=\"dm-verity,,,ro,0 31544 verity 1 PARTLABEL=rootfs PARTLABEL=rootfs 4096 4096 3943 3944 sha256 2f969fa9e9e4e20b37746f22633e85b178f5db7c143e11f92733a704299cc933 2dd56e34b15c6c84573cf26c4392028421061d2c808975217b45e9a5b49d2087\" rootfstype=squashfs,ext4 rootwait root=/dev/mmcblk0p6 fstools_ignore_partname=1";
};
memory {
reg = <0 0x40000000 0 0x20000000>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
reg_5v: regulator-5v {
compatible = "regulator-fixed";
regulator-name = "fixed-5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
gpio-keys {
compatible = "gpio-keys";
factory {
label = "factory";
linux,code = <KEY_RESTART>;
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_status: led@0 {
label = "ant0:red";
led_status_red: led-0 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
function-enumerator = <0>;
gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@1 {
label = "ant0:green";
led_status_green: led-1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
function-enumerator = <0>;
gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@2 {
label = "ant0:blue";
led_status_blue: led-2 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
function-enumerator = <0>;
gpios = <&pio 36 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@3 {
label = "ant1:red";
led-3 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
function-enumerator = <1>;
gpios = <&pio 35 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@4 {
label = "ant1:green";
led-4 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
function-enumerator = <1>;
gpios = <&pio 34 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@5 {
label = "ant1:blue";
led-5 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
function-enumerator = <1>;
gpios = <&pio 33 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@6 {
label = "ant2:red";
led-6 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
function-enumerator = <2>;
gpios = <&pio 38 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@7 {
label = "ant2:green";
led-7 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
function-enumerator = <2>;
gpios = <&pio 37 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@8 {
label = "ant2:blue";
led-8 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
function-enumerator = <2>;
gpios = <&pio 26 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@9 {
label = "ant3:red";
led-9 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
function-enumerator = <3>;
gpios = <&pio 25 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@10 {
label = "ant3:green";
led-10 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
function-enumerator = <3>;
gpios = <&pio 24 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@11 {
label = "ant3:blue";
led-11 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
function-enumerator = <3>;
gpios = <&pio 23 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@12 {
label = "ant4:red";
led-12 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
function-enumerator = <4>;
gpios = <&pio 28 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@13 {
label = "ant4:green";
led-13 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
function-enumerator = <4>;
gpios = <&pio 27 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@14 {
label = "ant4:blue";
led-14 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
function-enumerator = <4>;
gpios = <&pio 32 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@15 {
label = "ant5:red";
led-15 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
function-enumerator = <5>;
gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@16 {
label = "ant5:green";
led-16 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
function-enumerator = <5>;
gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
led@17 {
label = "ant5:blue";
led-17 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
function-enumerator = <5>;
gpios = <&pio 43 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
};
&eth {
status = "okay";
gmac0: mac@0 {
/* LAN */
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
/* WAN */
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "2500base-x";
phy-handle = <&phy6>;
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
};
};
&mdio {
phy6: phy@6 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <6>;
reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
/* LED0: nc ; LED1: nc ; LED2: Amber ; LED3: Green */
mxl,led-config = <0x0 0x0 0x370 0x80>;
};
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
};
};
&pio {
mmc0_pins_default: mmc0-pins {
mux {
function = "emmc";
groups = "emmc_51";
};
conf-cmd-dat {
pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
};
mmc0_pins_uhs: mmc0-uhs-pins {
mux {
function = "emmc";
groups = "emmc_51";
};
conf-cmd-dat {
pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
};
pcie_pins: pcie-pins {
mux {
function = "pcie";
groups = "pcie_pereset";
};
};
wf_2g_5g_pins: wf_2g_5g-pins {
mux {
function = "wifi";
groups = "wf_2g", "wf_5g";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
};
};
wf_dbdc_pins: wf-dbdc-pins {
mux {
function = "wifi";
groups = "wf_dbdc";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "game";
phy-handle = <&swphy0>;
};
port@1 {
reg = <1>;
label = "lan1";
phy-handle = <&swphy1>;
};
port@2 {
reg = <2>;
label = "lan2";
phy-handle = <&swphy2>;
};
port@3 {
reg = <3>;
label = "lan3";
phy-handle = <&swphy3>;
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
swphy0: phy@0 {
reg = <0>;
mediatek,led-config = <
0x21 0x8009 /* BASIC_CTRL */
0x22 0x0c00 /* ON_DURATION */
0x23 0x1400 /* BLINK_DURATION */
0x24 0xc001 /* LED0_ON_CTRL */
0x25 0x0000 /* LED0_BLINK_CTRL */
0x26 0xc007 /* LED1_ON_CTRL */
0x27 0x003f /* LED1_BLINK_CTRL */
>;
};
swphy1: phy@1 {
reg = <1>;
mediatek,led-config = <
0x21 0x8009 /* BASIC_CTRL */
0x22 0x0c00 /* ON_DURATION */
0x23 0x1400 /* BLINK_DURATION */
0x24 0xc001 /* LED0_ON_CTRL */
0x25 0x0000 /* LED0_BLINK_CTRL */
0x26 0xc007 /* LED1_ON_CTRL */
0x27 0x003f /* LED1_BLINK_CTRL */
>;
};
swphy2: phy@2 {
reg = <2>;
mediatek,led-config = <
0x21 0x8009 /* BASIC_CTRL */
0x22 0x0c00 /* ON_DURATION */
0x23 0x1400 /* BLINK_DURATION */
0x24 0xc001 /* LED0_ON_CTRL */
0x25 0x0000 /* LED0_BLINK_CTRL */
0x26 0xc007 /* LED1_ON_CTRL */
0x27 0x003f /* LED1_BLINK_CTRL */
>;
};
swphy3: phy@3 {
reg = <3>;
mediatek,led-config = <
0x21 0x8009 /* BASIC_CTRL */
0x22 0x0c00 /* ON_DURATION */
0x23 0x1400 /* BLINK_DURATION */
0x24 0xc001 /* LED0_ON_CTRL */
0x25 0x0000 /* LED0_BLINK_CTRL */
0x26 0xc007 /* LED1_ON_CTRL */
0x27 0x003f /* LED1_BLINK_CTRL */
>;
};
};
};
&wifi {
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
pinctrl-names = "default", "dbdc";
pinctrl-0 = <&wf_2g_5g_pins>;
pinctrl-1 = <&wf_dbdc_pins>;
status = "okay";
};
&trng {
status = "okay";
};
&watchdog {
status = "okay";
};
&crypto {
status = "okay";
};
&uart0 {
status = "okay";
};
&ssusb {
@ -476,74 +152,45 @@
status = "okay";
};
&nvmem {
eeprom_factory_a0000: eeprom@a0000 {
reg = <0xa0000 0x1000>;
};
};
&slot0 {
radio0: mt7915@0,0 {
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_factory_a0000>;
nvmem-cell-names = "eeprom";
};
};
&usb_phy {
status = "okay";
};
&mmc0 {
status = "okay";
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc0_pins_default>;
pinctrl-1 = <&mmc0_pins_uhs>;
bus-width = <0x08>;
max-frequency = <200000000>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
hs400-ds-delay = <0x14014>;
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_1p8v>;
non-removable;
no-sd;
no-sdio;
card@0 {
compatible = "mmc-card";
reg = <0>;
block {
compatible = "block-device";
partitions {
block-partition-factory {
partname = "factory";
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
eeprom_factory_a0000: eeprom@a0000 {
reg = <0xa0000 0x1000>;
};
};
};
};
};
&eth {
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "2500base-x";
phy-handle = <&phy6>;
};
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
status = "okay";
slot0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
radio0: mt7915@0,0 {
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_factory_a0000>;
nvmem-cell-names = "eeprom";
};
&mdio {
phy6: phy@6 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <6>;
reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
/* LED0: nc ; LED1: nc ; LED2: amber ; LED3: green */
mxl,led-config = <0x0 0x0 0x370 0x380>;
};
};
&pcie_phy {
status = "okay";
&swport0 {
label = "game";
};

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target/linux/mediatek/dts/mt7986a-acer-predator-w6d.dts Normal file
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@ -0,0 +1,182 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7986a-acer-w6-common.dtsi"
/ {
model = "Acer Predator Connect W6d";
compatible = "acer,predator-w6d", "mediatek,mt7986a";
aliases {
serial0 = &uart0;
led-boot = &led_status_blue;
led-failsafe = &led_status_blue;
led-running = &led_status_green;
led-upgrade = &led_status_red;
};
leds {
compatible = "gpio-leds";
led_status_red: led-0 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
function-enumerator = <0>;
gpios = <&pio 1 GPIO_ACTIVE_HIGH>;
};
led_status_green: led-1 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
function-enumerator = <0>;
gpios = <&pio 2 GPIO_ACTIVE_HIGH>;
};
led_status_blue: led-2 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
function-enumerator = <0>;
gpios = <&pio 36 GPIO_ACTIVE_HIGH>;
};
led-3 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
function-enumerator = <1>;
gpios = <&pio 35 GPIO_ACTIVE_HIGH>;
};
led-4 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
function-enumerator = <1>;
gpios = <&pio 34 GPIO_ACTIVE_HIGH>;
};
led-5 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
function-enumerator = <1>;
gpios = <&pio 33 GPIO_ACTIVE_HIGH>;
};
led-6 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
function-enumerator = <2>;
gpios = <&pio 38 GPIO_ACTIVE_HIGH>;
};
led-7 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
function-enumerator = <2>;
gpios = <&pio 37 GPIO_ACTIVE_HIGH>;
};
led-8 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
function-enumerator = <2>;
gpios = <&pio 26 GPIO_ACTIVE_HIGH>;
};
led-9 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
function-enumerator = <3>;
gpios = <&pio 25 GPIO_ACTIVE_HIGH>;
};
led-10 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
function-enumerator = <3>;
gpios = <&pio 24 GPIO_ACTIVE_HIGH>;
};
led-11 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
function-enumerator = <3>;
gpios = <&pio 23 GPIO_ACTIVE_HIGH>;
};
led-12 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
function-enumerator = <4>;
gpios = <&pio 28 GPIO_ACTIVE_HIGH>;
};
led-13 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
function-enumerator = <4>;
gpios = <&pio 27 GPIO_ACTIVE_HIGH>;
};
led-14 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
function-enumerator = <4>;
gpios = <&pio 32 GPIO_ACTIVE_HIGH>;
};
led-15 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
function-enumerator = <5>;
gpios = <&pio 45 GPIO_ACTIVE_HIGH>;
};
led-16 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
function-enumerator = <5>;
gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
};
led-17 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
function-enumerator = <5>;
gpios = <&pio 43 GPIO_ACTIVE_HIGH>;
};
};
};
&ssusb {
vusb33-supply = <&reg_3p3v>;
vbus-supply = <&reg_5v>;
status = "okay";
};
&usb_phy {
status = "okay";
};
&eth {
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "2500base-x";
phy-handle = <&phy6>;
};
};
&mdio {
phy6: phy@6 {
compatible = "ethernet-phy-ieee802.3-c45";
reg = <6>;
reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
/* LED0: nc ; LED1: nc ; LED2: amber ; LED3: green */
mxl,led-config = <0x0 0x0 0x370 0x380>;
};
};
&swport0 {
label = "game";
};

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target/linux/mediatek/dts/mt7986a-acer-vero-w6m.dts Normal file
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@ -0,0 +1,66 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7986a-acer-w6-common.dtsi"
/ {
model = "Acer Connect Vero W6m";
compatible = "acer,vero-w6m", "mediatek,mt7986a";
aliases {
serial0 = &uart0;
led-boot = &led_status;
led-failsafe = &led_status;
led-running = &led_status;
led-upgrade = &led_status;
};
};
&i2c0 {
led-controller@30 {
compatible = "kinetic,ktd2026";
reg = <0x30>;
vin-supply = <&reg_5v>;
vio-supply = <&reg_3p3v>;
led_status: multi-led {
color = <LED_COLOR_ID_RGB>;
function = LED_FUNCTION_STATUS;
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
color = <LED_COLOR_ID_RED>;
};
led@1 {
reg = <1>;
color = <LED_COLOR_ID_GREEN>;
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_BLUE>;
};
};
};
};
&nvmem {
eeprom_factory_a0000: eeprom@a0000 {
reg = <0xa0000 0x1000>;
};
};
&slot0 {
radio0: mt7915@0,0 {
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_factory_a0000>;
nvmem-cell-names = "eeprom";
};
};
&swport0 {
label = "internet";
};

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@ -0,0 +1,400 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include "mt7986a.dtsi"
/ {
chosen {
stdout-path = "serial0:115200n8";
bootargs = "dm-mod.create=\"acer,,,ro,0 1 zero 1 0 0 0\" rootfstype=squashfs,ext4 rootwait root=/dev/mmcblk0p6 fstools_ignore_partname=1";
};
memory@0 {
reg = <0 0x40000000 0 0x20000000>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
reg_5v: regulator-5v {
compatible = "regulator-fixed";
regulator-name = "fixed-5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
gpio-keys {
compatible = "gpio-keys";
factory {
label = "factory";
linux,code = <KEY_RESTART>;
gpios = <&pio 9 GPIO_ACTIVE_LOW>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 10 GPIO_ACTIVE_LOW>;
};
};
};
&watchdog {
status = "okay";
};
&pio {
mmc0_pins_default: mmc0-pins {
mux {
function = "emmc";
groups = "emmc_51";
};
conf-cmd-dat {
pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
};
mmc0_pins_uhs: mmc0-uhs-pins {
mux {
function = "emmc";
groups = "emmc_51";
};
conf-cmd-dat {
pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
};
pcie_pins: pcie-pins {
mux {
function = "pcie";
groups = "pcie_pereset";
};
};
wf_2g_5g_pins: wf_2g_5g-pins {
mux {
function = "wifi";
groups = "wf_2g", "wf_5g";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
};
};
wf_dbdc_pins: wf-dbdc-pins {
mux {
function = "wifi";
groups = "wf_dbdc";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
};
};
i2c_pins: i2c-pins {
mux {
function = "i2c";
groups = "i2c";
};
};
};
&trng {
status = "okay";
};
&crypto {
status = "okay";
};
&uart0 {
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c_pins>;
status = "okay";
};
&mmc0 {
status = "okay";
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc0_pins_default>;
pinctrl-1 = <&mmc0_pins_uhs>;
bus-width = <0x08>;
max-frequency = <200000000>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
hs400-ds-delay = <0x14014>;
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_1p8v>;
non-removable;
no-sd;
no-sdio;
#address-cells = <1>;
#size-cells = <0>;
card@0 {
compatible = "mmc-card";
reg = <0>;
block {
compatible = "block-device";
partitions {
block-partition-factory {
partname = "factory";
nvmem: nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
};
};
};
};
};
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
status = "okay";
slot0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
#address-cells = <0x03>;
#size-cells = <0x02>;
};
};
&pcie_phy {
status = "okay";
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
reset-assert-us = <10000>;
reset-deassert-us = <10000>;
ports {
#address-cells = <1>;
#size-cells = <0>;
swport0: port@0 {
reg = <0>;
phy-handle = <&swphy0>;
};
port@1 {
reg = <1>;
label = "lan1";
phy-handle = <&swphy1>;
};
port@2 {
reg = <2>;
label = "lan2";
phy-handle = <&swphy2>;
};
port@3 {
reg = <3>;
label = "lan3";
phy-handle = <&swphy3>;
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
swphy0: phy@0 {
reg = <0>;
mediatek,led-config = <
0x21 0x8008 /* BASIC_CTRL */
0x22 0x0c00 /* ON_DURATION */
0x23 0x1400 /* BLINK_DURATION */
0x24 0xc001 /* LED0_ON_CTRL */
0x25 0x0003 /* LED0_BLINK_CTRL */
0x26 0xc006 /* LED1_ON_CTRL */
0x27 0x003c /* LED1_BLINK_CTRL */
>;
};
swphy1: phy@1 {
reg = <1>;
mediatek,led-config = <
0x21 0x8008 /* BASIC_CTRL */
0x22 0x0c00 /* ON_DURATION */
0x23 0x1400 /* BLINK_DURATION */
0x24 0xc001 /* LED0_ON_CTRL */
0x25 0x0003 /* LED0_BLINK_CTRL */
0x26 0xc006 /* LED1_ON_CTRL */
0x27 0x003c /* LED1_BLINK_CTRL */
>;
};
swphy2: phy@2 {
reg = <2>;
mediatek,led-config = <
0x21 0x8008 /* BASIC_CTRL */
0x22 0x0c00 /* ON_DURATION */
0x23 0x1400 /* BLINK_DURATION */
0x24 0xc001 /* LED0_ON_CTRL */
0x25 0x0003 /* LED0_BLINK_CTRL */
0x26 0xc006 /* LED1_ON_CTRL */
0x27 0x003c /* LED1_BLINK_CTRL */
>;
};
swphy3: phy@3 {
reg = <3>;
mediatek,led-config = <
0x21 0x8008 /* BASIC_CTRL */
0x22 0x0c00 /* ON_DURATION */
0x23 0x1400 /* BLINK_DURATION */
0x24 0xc001 /* LED0_ON_CTRL */
0x25 0x0003 /* LED0_BLINK_CTRL */
0x26 0xc006 /* LED1_ON_CTRL */
0x27 0x003c /* LED1_BLINK_CTRL */
>;
};
};
};
};
};
&wifi {
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
pinctrl-names = "default", "dbdc";
pinctrl-0 = <&wf_2g_5g_pins>;
pinctrl-1 = <&wf_dbdc_pins>;
status = "okay";
};

12
target/linux/mediatek/filogic/base-files/etc/board.d/02_network
View File

@ -21,9 +21,13 @@ mediatek_setup_interfaces()
acelink,ew-7886cax)
ucidef_set_interface_lan "eth0" "dhcp"
;;
acer,predator-w6)
acer,predator-w6|\
acer,predator-w6d)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 game" eth1
;;
acer,vero-w6m)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" internet
;;
arcadyan,mozart)
ucidef_set_interfaces_lan_wan "lan0 eth1" eth2
;;
@ -139,6 +143,12 @@ mediatek_setup_macs()
local label_mac=""
case $board in
acer,predator-w6|\
acer,predator-w6d|\
acer,vero-w6m)
wan_mac=$(mmc_get_mac_ascii u-boot-env WANMAC)
lan_mac=$(mmc_get_mac_ascii u-boot-env LANMAC)
;;
bananapi,bpi-r3|\
bananapi,bpi-r3-mini|\
bananapi,bpi-r4)

3
target/linux/mediatek/filogic/base-files/etc/board.d/05_compat-version
View File

@ -11,6 +11,9 @@ case "$(board_name)" in
livinet,zr-3020-ubootmod)
ucidef_set_compat_version "1.2"
;;
routerich,ax3000)
ucidef_set_compat_version "1.1"
;;
esac
board_config_flush

15
target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
View File

@ -17,11 +17,15 @@ case "$board" in
[ "$PHYNBR" = "0" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_setbit_la $addr > /sys${DEVPATH}/macaddress
;;
acer,predator-w6)
key_path="/var/qcidata/data"
[ "$PHYNBR" = "0" ] && cat $key_path/2gMAC > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && cat $key_path/6gMAC > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "2" ] && cat $key_path/5gMAC > /sys${DEVPATH}/macaddress
acer,predator-w6|\
acer,vero-w6m)
[ "$PHYNBR" = "0" ] && mmc_get_mac_ascii u-boot-env 2gMAC > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && mmc_get_mac_ascii u-boot-env 6gMAC > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "2" ] && mmc_get_mac_ascii u-boot-env 5gMAC > /sys${DEVPATH}/macaddress
;;
acer,predator-w6d)
[ "$PHYNBR" = "0" ] && mmc_get_mac_ascii u-boot-env 2gMAC > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && mmc_get_mac_ascii u-boot-env 5gMAC > /sys${DEVPATH}/macaddress
;;
asus,rt-ax59u)
CI_UBIPART="UBI_DEV"
@ -72,6 +76,7 @@ case "$board" in
;;
cudy,ap3000outdoor-v1|\
cudy,m3000-v1|\
cudy,wr3000s-v1|\
cudy,wr3000-v1)
addr=$(mtd_get_mac_binary bdinfo 0xde00)
# Originally, phy0 is phy1 mac with LA bit set. However, this would conflict

25
target/linux/mediatek/filogic/base-files/lib/preinit/05_extract_factory_data.sh
View File

@ -1,25 +0,0 @@
. /lib/functions/system.sh
predator_w6_factory_extract() {
local mmc_part
mmc_part="$(find_mmc_part qcidata)"
mkdir -p /var/qcidata/data
mkdir -p /var/qcidata/mount
mount -r "$mmc_part" /var/qcidata/mount
cp /var/qcidata/mount/factory/*MAC "/var/qcidata/data/"
umount "/var/qcidata/mount"
}
preinit_extract_factory() {
case $(board_name) in
acer,predator-w6)
predator_w6_factory_extract
;;
esac
}
boot_hook_add preinit_main preinit_extract_factory

24
target/linux/mediatek/filogic/base-files/lib/preinit/10_fix_eth_mac.sh
View File

@ -2,13 +2,23 @@
preinit_set_mac_address() {
case $(board_name) in
acer,predator-w6)
key_path="/var/qcidata/data"
ip link set dev lan1 address "$(cat $key_path/LANMAC)"
ip link set dev lan2 address "$(cat $key_path/LANMAC)"
ip link set dev lan3 address "$(cat $key_path/LANMAC)"
ip link set dev game address "$(cat $key_path/LANMAC)"
ip link set dev eth1 address "$(cat $key_path/WANMAC)"
acer,predator-w6|\
acer,predator-w6d)
$(mmc_get_mac_ascii u-boot-env WANMAC)
$(mmc_get_mac_ascii u-boot-env LANMAC)
ip link set dev lan1 address "$lan_mac"
ip link set dev lan2 address "$lan_mac"
ip link set dev lan3 address "$lan_mac"
ip link set dev game address "$lan_mac"
ip link set dev eth1 address "$wan_mac"
;;
acer,vero-w6m)
wan_mac=$(mmc_get_mac_ascii u-boot-env WANMAC)
lan_mac=$(mmc_get_mac_ascii u-boot-env LANMAC)
ip link set dev lan1 address "$lan_mac"
ip link set dev lan2 address "$lan_mac"
ip link set dev lan3 address "$lan_mac"
ip link set dev internet address "$wan_mac"
;;
asus,tuf-ax4200|\
asus,tuf-ax6000)

16
target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
View File

@ -96,7 +96,13 @@ platform_do_upgrade() {
fit_do_upgrade "$1"
;;
acer,predator-w6|\
acer,predator-w6d|\
acer,vero-w6m|\
arcadyan,mozart|\
glinet,gl-mt2500|\
glinet,gl-mt6000|\
glinet,gl-x3000|\
glinet,gl-xe3000|\
smartrg,sdg-8612|\
smartrg,sdg-8614|\
smartrg,sdg-8622|\
@ -120,14 +126,6 @@ platform_do_upgrade() {
yuncore,ax835)
default_do_upgrade "$1"
;;
glinet,gl-mt2500|\
glinet,gl-mt6000|\
glinet,gl-x3000|\
glinet,gl-xe3000)
CI_KERNPART="kernel"
CI_ROOTPART="rootfs"
emmc_do_upgrade "$1"
;;
mercusys,mr90x-v1|\
tplink,re6000xd)
CI_UBIPART="ubi0"
@ -200,6 +198,8 @@ platform_check_image() {
platform_copy_config() {
case "$(board_name)" in
acer,predator-w6|\
acer,predator-w6d|\
acer,vero-w6m|\
arcadyan,mozart|\
glinet,gl-mt2500|\
glinet,gl-mt6000|\

54
target/linux/mediatek/image/filogic.mk
View File

@ -152,7 +152,7 @@ TARGET_DEVICES += acelink_ew-7886cax
define Device/acer_predator-w6
DEVICE_VENDOR := Acer
DEVICE_MODEL := Predator W6
DEVICE_MODEL := Predator Connect W6
DEVICE_DTS := mt7986a-acer-predator-w6
DEVICE_DTS_DIR := ../dts
DEVICE_DTS_LOADADDR := 0x47000000
@ -166,6 +166,36 @@ define Device/acer_predator-w6
endef
TARGET_DEVICES += acer_predator-w6
define Device/acer_predator-w6d
DEVICE_VENDOR := Acer
DEVICE_MODEL := Predator Connect W6d
DEVICE_DTS := mt7986a-acer-predator-w6d
DEVICE_DTS_DIR := ../dts
DEVICE_DTS_LOADADDR := 0x47000000
DEVICE_PACKAGES := kmod-usb3 kmod-mt7915e kmod-mt7916-firmware kmod-mt7986-firmware mt7986-wo-firmware e2fsprogs f2fsck mkf2fs
IMAGES := sysupgrade.bin
KERNEL := kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
KERNEL_INITRAMFS := kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += acer_predator-w6d
define Device/acer_vero-w6m
DEVICE_VENDOR := Acer
DEVICE_MODEL := Connect Vero W6m
DEVICE_DTS := mt7986a-acer-vero-w6m
DEVICE_DTS_DIR := ../dts
DEVICE_DTS_LOADADDR := 0x47000000
DEVICE_PACKAGES := kmod-leds-ktd202x kmod-mt7915e kmod-mt7916-firmware kmod-mt7986-firmware mt7986-wo-firmware e2fsprogs f2fsck mkf2fs
IMAGES := sysupgrade.bin
KERNEL := kernel-bin | lzma | fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
KERNEL_INITRAMFS := kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += acer_vero-w6m
define Device/adtran_smartrg
DEVICE_VENDOR := Adtran
DEVICE_DTS_DIR := ../dts
@ -694,6 +724,23 @@ define Device/cudy_wr3000-v1
endef
TARGET_DEVICES += cudy_wr3000-v1
define Device/cudy_wr3000s-v1
DEVICE_VENDOR := Cudy
DEVICE_MODEL := WR3000S
DEVICE_VARIANT := v1
DEVICE_DTS := mt7981b-cudy-wr3000s-v1
DEVICE_DTS_DIR := ../dts
SUPPORTED_DEVICES += R59
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGE_SIZE := 65536k
KERNEL_IN_UBI := 1
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware
endef
TARGET_DEVICES += cudy_wr3000s-v1
define Device/dlink_aquila-pro-ai-m30-a1
DEVICE_VENDOR := D-Link
DEVICE_MODEL := AQUILA PRO AI M30
@ -1373,6 +1420,11 @@ define Device/routerich_ax3000
DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware kmod-usb3 automount
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb
DEVICE_COMPAT_VERSION := 1.1
DEVICE_COMPAT_MESSAGE := Partition layout has been changed. Bootloader MUST be \
upgraded to avoid data corruption and getting bricked. \
Please, contact your vendor and follow the guide: \
https://openwrt.org/toh/routerich/ax3000#web_ui_method
endef
TARGET_DEVICES += routerich_ax3000

10
target/linux/mvebu/patches-6.6/902-drivers-mfd-Add-a-driver-for-IEI-WT61P803-PUZZLE-MCU.patch
View File

@ -54,7 +54,7 @@ Cc: Robert Marko <robert.marko@sartura.hr>
obj-$(CONFIG_INTEL_SOC_PMIC_BXTWC) += intel_soc_pmic_bxtwc.o
--- /dev/null
+++ b/drivers/mfd/iei-wt61p803-puzzle.c
@@ -0,0 +1,908 @@
@@ -0,0 +1,912 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/* IEI WT61P803 PUZZLE MCU Driver
+ * System management microcontroller for fan control, temperature sensor reading,
@ -894,8 +894,12 @@ Cc: Robert Marko <robert.marko@sartura.hr>
+ mcu->serdev = serdev;
+ mcu->dev = dev;
+ init_completion(&mcu->reply->received);
+ mutex_init(&mcu->reply_lock);
+ mutex_init(&mcu->lock);
+ ret = devm_mutex_init(dev, &mcu->reply_lock);
+ if (ret)
+ return ret;
+ ret = devm_mutex_init(dev, &mcu->lock);
+ if (ret)
+ return ret;
+
+ /* Setup UART interface */
+ serdev_device_set_drvdata(serdev, mcu);

6
target/linux/mvebu/patches-6.6/903-drivers-hwmon-Add-the-IEI-WT61P803-PUZZLE-HWMON-driv.patch
View File

@ -53,7 +53,7 @@ Cc: Robert Marko <robert.marko@sartura.hr>
obj-$(CONFIG_SENSORS_IBMPOWERNV)+= ibmpowernv.o
--- /dev/null
+++ b/drivers/hwmon/iei-wt61p803-puzzle-hwmon.c
@@ -0,0 +1,445 @@
@@ -0,0 +1,447 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/* IEI WT61P803 PUZZLE MCU HWMON Driver
+ *
@ -457,7 +457,9 @@ Cc: Robert Marko <robert.marko@sartura.hr>
+
+ mcu_hwmon->mcu = mcu;
+ platform_set_drvdata(pdev, mcu_hwmon);
+ mutex_init(&mcu_hwmon->lock);
+ ret = devm_mutex_init(dev, &mcu_hwmon->lock);
+ if (ret)
+ return ret;
+
+ hwmon_dev = devm_hwmon_device_register_with_info(dev, "iei_wt61p803_puzzle",
+ mcu_hwmon,

6
target/linux/mvebu/patches-6.6/910-drivers-leds-wt61p803-puzzle-improvements.patch
View File

@ -47,7 +47,7 @@
ret = iei_wt61p803_puzzle_write_command(priv->mcu, led_power_cmd,
sizeof(led_power_cmd),
@@ -90,39 +106,166 @@ static enum led_brightness iei_wt61p803_
@@ -90,39 +106,168 @@ static enum led_brightness iei_wt61p803_
return led_state;
}
@ -194,7 +194,9 @@
+ goto put_child_node;
+ }
+
+ mutex_init(&priv->lock);
+ ret = devm_mutex_init(dev, &priv->lock);
+ if (ret)
+ goto put_child_node;
+
+ dev_set_drvdata(dev, priv);
+

5
target/linux/mxs/config-6.6
View File

@ -53,6 +53,7 @@ CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_PM=y
CONFIG_CPU_THUMB_CAPABLE=y
@ -70,6 +71,7 @@ CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_DEBUG_ALIGN_RODATA=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
CONFIG_DMADEVICES=y
CONFIG_DMA_ENGINE=y
@ -84,6 +86,7 @@ CONFIG_EXTCON=y
CONFIG_FEC=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FORCE_NR_CPUS=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FUNCTION_ALIGNMENT=0
@ -206,6 +209,7 @@ CONFIG_PPS=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RATIONAL=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
@ -231,6 +235,7 @@ CONFIG_SPI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MXS=y
CONFIG_SPLIT_PTLOCK_CPUS=999999
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
CONFIG_STMP3XXX_RTC_WATCHDOG=y
CONFIG_STMP_DEVICE=y
CONFIG_SWPHY=y

27
target/linux/ramips/dts/mt7620a.dtsi
View File

@ -32,13 +32,6 @@
compatible = "mti,cpu-interrupt-controller";
};
mmc_clk: mmc-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
clock-accuracy = <100>;
};
mmc_reg_1v8: regulator-1v8 {
compatible = "regulator-fixed";
@ -80,7 +73,7 @@
compatible = "ralink,rt2880-timer";
reg = <0x100 0x20>;
clocks = <&sysc 5>;
clocks = <&sysc 7>;
interrupt-parent = <&intc>;
interrupts = <1>;
@ -90,7 +83,7 @@
compatible = "ralink,rt2880-wdt";
reg = <0x120 0x10>;
clocks = <&sysc 6>;
clocks = <&sysc 8>;
resets = <&sysc 8>;
reset-names = "wdt";
@ -122,7 +115,7 @@
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0x500 0x100>;
clocks = <&sysc 7>;
clocks = <&sysc 9>;
resets = <&sysc 12>;
@ -216,7 +209,7 @@
compatible = "ralink,rt2880-i2c";
reg = <0x900 0x100>;
clocks = <&sysc 8>;
clocks = <&sysc 10>;
resets = <&sysc 16>;
reset-names = "i2c";
@ -234,7 +227,7 @@
compatible = "mediatek,mt7620-i2s";
reg = <0xa00 0x100>;
clocks = <&sysc 9>;
clocks = <&sysc 11>;
resets = <&sysc 17>;
reset-names = "i2s";
@ -256,7 +249,7 @@
compatible = "ralink,rt2880-spi";
reg = <0xb00 0x40>;
clocks = <&sysc 10>;
clocks = <&sysc 12>;
resets = <&sysc 18>;
reset-names = "spi";
@ -274,7 +267,7 @@
compatible = "ralink,rt2880-spi";
reg = <0xb40 0x60>;
clocks = <&sysc 11>;
clocks = <&sysc 13>;
resets = <&sysc 18>;
reset-names = "spi";
@ -292,7 +285,7 @@
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
clocks = <&sysc 12>;
clocks = <&sysc 14>;
resets = <&sysc 19>;
@ -539,7 +532,7 @@
cap-mmc-highspeed;
cap-sd-highspeed;
clocks = <&mmc_clk>, <&mmc_clk>;
clocks = <&sysc 15>, <&sysc 15>;
clock-names = "source", "hclk";
disable-wp;
@ -645,7 +638,7 @@
compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
reg = <0x10180000 0x40000>;
clocks = <&sysc 13>;
clocks = <&sysc 16>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;

14
target/linux/ramips/dts/mt7620n.dtsi
View File

@ -51,7 +51,7 @@
compatible = "ralink,rt2880-timer";
reg = <0x100 0x20>;
clocks = <&sysc 5>;
clocks = <&sysc 7>;
interrupt-parent = <&intc>;
interrupts = <1>;
@ -61,7 +61,7 @@
compatible = "ralink,rt2880-wdt";
reg = <0x120 0x10>;
clocks = <&sysc 6>;
clocks = <&sysc 8>;
resets = <&sysc 8>;
reset-names = "wdt";
@ -171,7 +171,7 @@
compatible = "ralink,rt2880-i2c";
reg = <0x900 0x100>;
clocks = <&sysc 8>;
clocks = <&sysc 10>;
resets = <&sysc 16>;
reset-names = "i2c";
@ -189,7 +189,7 @@
compatible = "ralink,rt2880-spi";
reg = <0xb00 0x40>;
clocks = <&sysc 10>;
clocks = <&sysc 12>;
resets = <&sysc 18>;
reset-names = "spi";
@ -207,7 +207,7 @@
compatible = "ralink,rt2880-spi";
reg = <0xb40 0x60>;
clocks = <&sysc 11>;
clocks = <&sysc 13>;
resets = <&sysc 18>;
reset-names = "spi";
@ -225,7 +225,7 @@
compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
clocks = <&sysc 12>;
clocks = <&sysc 14>;
resets = <&sysc 19>;
@ -372,7 +372,7 @@
compatible = "ralink,rt7620-wmac", "ralink,rt2880-wmac";
reg = <0x10180000 0x40000>;
clocks = <&sysc 13>;
clocks = <&sysc 16>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;

23
target/linux/ramips/dts/mt7628an.dtsi
View File

@ -30,13 +30,6 @@
compatible = "mti,cpu-interrupt-controller";
};
mmc_clk: mmc-clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
clock-accuracy = <100>;
};
mmc_reg_1v8: regulator-1v8 {
compatible = "regulator-fixed";
@ -121,7 +114,7 @@
compatible = "mediatek,mt7621-i2c";
reg = <0x900 0x100>;
clocks = <&sysc 7>;
clocks = <&sysc 9>;
clock-names = "i2c";
resets = <&sysc 16>;
@ -140,7 +133,7 @@
compatible = "mediatek,mt7628-i2s";
reg = <0xa00 0x100>;
clocks = <&sysc 8>;
clocks = <&sysc 10>;
resets = <&sysc 17>;
reset-names = "i2s";
@ -162,7 +155,7 @@
compatible = "ralink,mt7621-spi";
reg = <0xb00 0x100>;
clocks = <&sysc 9>;
clocks = <&sysc 11>;
clock-names = "spi";
resets = <&sysc 18>;
@ -185,7 +178,7 @@
reg-io-width = <4>;
no-loopback-test;
clocks = <&sysc 11>;
clocks = <&sysc 13>;
resets = <&sysc 12>;
@ -204,7 +197,7 @@
reg-io-width = <4>;
no-loopback-test;
clocks = <&sysc 12>;
clocks = <&sysc 14>;
resets = <&sysc 19>;
@ -225,7 +218,7 @@
reg-io-width = <4>;
no-loopback-test;
clocks = <&sysc 13>;
clocks = <&sysc 15>;
resets = <&sysc 20>;
@ -393,7 +386,7 @@
cap-mmc-highspeed;
cap-sd-highspeed;
clocks = <&mmc_clk>, <&mmc_clk>;
clocks = <&sysc 16>, <&sysc 16>;
clock-names = "source", "hclk";
disable-wp;
@ -516,7 +509,7 @@
compatible = "mediatek,mt7628-wmac";
reg = <0x10300000 0x100000>;
clocks = <&sysc 14>;
clocks = <&sysc 17>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;

183
target/linux/ramips/dts/mt7628an_zbtlink_zbt-we2426-b.dts Normal file
View File

@ -0,0 +1,183 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7628an.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
compatible = "zbtlink,zbt-we2426-b", "mediatek,mt7628an-soc";
model = "Zbtlink ZBT-WE2426-B";
aliases {
led-boot = &led_wlan;
led-failsafe = &led_wlan;
led-upgrade = &led_wlan;
label-mac-device = &wmac;
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 38 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
lan1 {
gpios = <&gpio 43 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <1>;
};
lan2 {
gpios = <&gpio 42 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <2>;
};
lan3 {
gpios = <&gpio 41 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <3>;
};
lan4 {
gpios = <&gpio 40 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_LAN;
function-enumerator = <4>;
};
wan {
gpios = <&gpio 39 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN;
};
led_wlan: wlan2g {
gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN;
linux,default-trigger = "phy0tpt";
};
};
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <10000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x30000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x30000 0x10000>;
read-only;
};
factory: partition@40000 {
label = "factory";
reg = <0x40000 0x10000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x400>;
};
eeprom_factory_8000: eeprom@8000 {
reg = <0x8000 0x200>;
};
macaddr_factory_28: macaddr@28 {
reg = <0x28 0x6>;
};
};
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0x7b0000>;
};
};
};
};
&state_default {
gpio {
groups = "i2s", "refclk", "wdt", "p4led_an",
"p3led_an", "p2led_an",
"p1led_an", "p0led_an",
"wled_an";
function = "gpio";
};
};
&pcie {
status = "okay";
};
&pcie0 {
wifi@0,0 {
compatible = "mediatek,mt76";
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_factory_8000>;
nvmem-cell-names = "eeprom";
ieee80211-freq-limit = <5000000 6000000>;
led {
led-sources = <2>;
led-active-low;
};
};
};
&wmac {
status = "okay";
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};
&ethernet {
nvmem-cells = <&macaddr_factory_28>;
nvmem-cell-names = "mac-address";
};
&esw {
mediatek,portmap = <0x2f>;
};
&sdhci {
status = "okay";
};

20
target/linux/ramips/dts/rt3883.dtsi
View File

@ -51,7 +51,7 @@
compatible = "ralink,rt2880-timer";
reg = <0x100 0x20>;
clocks = <&sysc 4>;
clocks = <&sysc 5>;
interrupt-parent = <&intc>;
interrupts = <1>;
@ -61,7 +61,7 @@
compatible = "ralink,rt2880-wdt";
reg = <0x120 0x10>;
clocks = <&sysc 5>;
clocks = <&sysc 6>;
resets = <&sysc 8>;
reset-names = "wdt";
@ -93,7 +93,7 @@
compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0x500 0x100>;
clocks = <&sysc 6>;
clocks = <&sysc 7>;
resets = <&sysc 12>;
@ -187,7 +187,7 @@
compatible = "ralink,rt2880-i2c";
reg = <0x900 0x100>;
clocks = <&sysc 7>;
clocks = <&sysc 8>;
resets = <&sysc 16>;
reset-names = "i2c";
@ -205,7 +205,7 @@
compatible = "ralink,rt3883-i2s";
reg = <0xa00 0x100>;
clocks = <&sysc 8>;
clocks = <&sysc 9>;
resets = <&sysc 17>;
reset-names = "i2s";
@ -229,7 +229,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&sysc 9>;
clocks = <&sysc 10>;
resets = <&sysc 18>;
reset-names = "spi";
@ -246,7 +246,7 @@
#address-cells = <1>;
#size-cells = <0>;
clocks = <&sysc 10>;
clocks = <&sysc 11>;
resets = <&sysc 18>;
reset-names = "spi";
@ -261,7 +261,7 @@
compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
reg = <0xc00 0x100>;
clocks = <&sysc 11>;
clocks = <&sysc 12>;
resets = <&sysc 19>;
@ -343,7 +343,7 @@
#size-cells = <0>;
reg = <0x10100000 0x10000>;
clocks = <&sysc 12>;
clocks = <&sysc 13>;
resets = <&sysc 21>;
reset-names = "fe";
@ -463,7 +463,7 @@
compatible = "ralink,rt3883-wmac", "ralink,rt2880-wmac";
reg = <0x10180000 0x40000>;
clocks = <&sysc 13>;
clocks = <&sysc 14>;
interrupt-parent = <&cpuintc>;
interrupts = <6>;

8
target/linux/ramips/image/mt76x8.mk
View File

@ -1163,6 +1163,14 @@ define Device/zbtlink_zbt-we1226
endef
TARGET_DEVICES += zbtlink_zbt-we1226
define Device/zbtlink_zbt-we2426-b
IMAGE_SIZE := 7872k
DEVICE_VENDOR := Zbtlink
DEVICE_MODEL := ZBT-WE2426-B
DEVICE_PACKAGES := kmod-mt76x2 kmod-usb2 kmod-usb-ohci
endef
TARGET_DEVICES += zbtlink_zbt-we2426-b
define Device/zyxel_keenetic-extra-ii
IMAGE_SIZE := 29824k
DEVICE_VENDOR := Zyxel

7
target/linux/ramips/mt76x8/base-files/etc/board.d/01_leds
View File

@ -186,6 +186,13 @@ zbtlink,zbt-we1226)
ucidef_set_led_switch "lan2" "LAN2" "green:lan2" "switch0" "0x02"
ucidef_set_led_switch "wan" "WAN" "green:wan" "switch0" "0x10"
;;
zbtlink,zbt-we2426-b)
ucidef_set_led_switch "wan" "wan" "green:wan" "switch0" "0x10"
ucidef_set_led_switch "lan1" "lan1" "green:lan-1" "switch0" "0x01"
ucidef_set_led_switch "lan2" "lan2" "green:lan-2" "switch0" "0x02"
ucidef_set_led_switch "lan3" "lan3" "green:lan-3" "switch0" "0x04"
ucidef_set_led_switch "lan4" "lan4" "green:lan-4" "switch0" "0x08"
;;
zyxel,keenetic-extra-ii)
ucidef_set_led_netdev "wifi_led" "wifi" "green:wifi" "wlan0"
ucidef_set_led_switch "internet" "internet" "green:internet" "switch0" "0x01"

6
target/linux/ramips/mt76x8/base-files/etc/board.d/02_network
View File

@ -148,7 +148,8 @@ ramips_setup_interfaces()
netgear,r6020|\
netgear,r6080|\
netgear,r6120|\
wavlink,wl-wn531a3)
wavlink,wl-wn531a3|\
zbtlink,zbt-we2426-b)
ucidef_add_switch "switch0" \
"0:lan:4" "1:lan:3" "2:lan:2" "3:lan:1" "4:wan" "6@eth0"
;;
@ -244,7 +245,8 @@ ramips_setup_macs()
hilink,hlk-7688a|\
wavlink,wl-wn531a3|\
wavlink,wl-wn577a2|\
wavlink,wl-wn578a2)
wavlink,wl-wn578a2|\
zbtlink,zbt-we2426-b)
wan_mac=$(mtd_get_mac_binary factory 0x2e)
label_mac=$(mtd_get_mac_binary factory 0x4)
;;

15
target/linux/ramips/patches-6.6/100-clk-ralink-mtmips-fix-clock-plan-for-Ralink-SoC-RT3883.patch → target/linux/ramips/patches-6.6/002-01-v6.13-clk-ralink-mtmips-fix-clock-plan-for-Ralink-SoC-RT38.patch
View File

@ -1,6 +1,7 @@
Subject: [PATCH] clk: ralink: mtmips: fix clock plan for Ralink SoC RT3883
Date: Tue, 6 Aug 2024 16:29:02 +0200
Message-Id: <20240806142902.224164-1-sergio.paracuellos@gmail.com>
From 33239152305567b3e9bf052f71fd4baecd626341 Mon Sep 17 00:00:00 2001
From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Date: Tue, 10 Sep 2024 06:40:22 +0200
Subject: [PATCH 1/3] clk: ralink: mtmips: fix clock plan for Ralink SoC RT3883
Clock plan for Ralink SoC RT3883 needs an extra 'periph' clock to properly
set some peripherals that has this clock as their parent. When this driver
@ -14,6 +15,8 @@ properly working clock plan for this SoC.
Fixes: 6f3b15586eef ("clk: ralink: add clock and reset driver for MTMIPS SoCs")
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20240910044024.120009-2-sergio.paracuellos@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
---
drivers/clk/ralink/clk-mtmips.c | 9 +++++++--
1 file changed, 7 insertions(+), 2 deletions(-)
@ -24,7 +27,7 @@ Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
CLK_FIXED("xtal", NULL, 40000000)
};
+static struct mtmips_clk_fixed rt3383_fixed_clocks[] = {
+static struct mtmips_clk_fixed rt3883_fixed_clocks[] = {
+ CLK_FIXED("xtal", NULL, 40000000),
+ CLK_FIXED("periph", "xtal", 40000000)
+};
@ -38,8 +41,8 @@ Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
.num_clk_base = ARRAY_SIZE(rt3883_clks_base),
- .clk_fixed = rt305x_fixed_clocks,
- .num_clk_fixed = ARRAY_SIZE(rt305x_fixed_clocks),
+ .clk_fixed = rt3383_fixed_clocks,
+ .num_clk_fixed = ARRAY_SIZE(rt3383_fixed_clocks),
+ .clk_fixed = rt3883_fixed_clocks,
+ .num_clk_fixed = ARRAY_SIZE(rt3883_fixed_clocks),
.clk_factor = NULL,
.num_clk_factor = 0,
.clk_periph = rt5350_pherip_clks,

124
target/linux/ramips/patches-6.6/002-02-v6.13-clk-ralink-mtmips-fix-clocks-probe-order-in-oldest-r.patch Normal file
View File

@ -0,0 +1,124 @@
From d34db686a3d74bd564bfce2ada15011c556269fc Mon Sep 17 00:00:00 2001
From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Date: Tue, 10 Sep 2024 06:40:23 +0200
Subject: [PATCH 2/3] clk: ralink: mtmips: fix clocks probe order in oldest
ralink SoCs
Base clocks are the first in being probed and are real dependencies of the
rest of fixed, factor and peripheral clocks. For old ralink SoCs RT2880,
RT305x and RT3883 'xtal' must be defined first since in any other case,
when fixed clocks are probed they are delayed until 'xtal' is probed so the
following warning appears:
WARNING: CPU: 0 PID: 0 at drivers/clk/ralink/clk-mtmips.c:499 rt3883_bus_recalc_rate+0x98/0x138
Modules linked in:
CPU: 0 PID: 0 Comm: swapper Not tainted 6.6.43 #0
Stack : 805e58d0 00000000 00000004 8004f950 00000000 00000004 00000000 00000000
80669c54 80830000 80700000 805ae570 80670068 00000001 80669bf8 00000000
00000000 00000000 805ae570 80669b38 00000020 804db7dc 00000000 00000000
203a6d6d 80669b78 80669e48 70617773 00000000 805ae570 00000000 00000009
00000000 00000001 00000004 00000001 00000000 00000000 83fe43b0 00000000
...
Call Trace:
[<800065d0>] show_stack+0x64/0xf4
[<804bca14>] dump_stack_lvl+0x38/0x60
[<800218ac>] __warn+0x94/0xe4
[<8002195c>] warn_slowpath_fmt+0x60/0x94
[<80259ff8>] rt3883_bus_recalc_rate+0x98/0x138
[<80254530>] __clk_register+0x568/0x688
[<80254838>] of_clk_hw_register+0x18/0x2c
[<8070b910>] rt2880_clk_of_clk_init_driver+0x18c/0x594
[<8070b628>] of_clk_init+0x1c0/0x23c
[<806fc448>] plat_time_init+0x58/0x18c
[<806fdaf0>] time_init+0x10/0x6c
[<806f9bc4>] start_kernel+0x458/0x67c
---[ end trace 0000000000000000 ]---
When this driver was mainlined we could not find any active users of old
ralink SoCs so we cannot perform any real tests for them. Now, one user
of a Belkin f9k1109 version 1 device which uses RT3883 SoC appeared and
reported some issues in openWRT:
- https://github.com/openwrt/openwrt/issues/16054
Thus, define a 'rt2880_xtal_recalc_rate()' just returning the expected
frequency 40Mhz and use it along the old ralink SoCs to have a correct
boot trace with no warnings and a working clock plan from the beggining.
Fixes: 6f3b15586eef ("clk: ralink: add clock and reset driver for MTMIPS SoCs")
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20240910044024.120009-3-sergio.paracuellos@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
---
drivers/clk/ralink/clk-mtmips.c | 21 +++++++++++++--------
1 file changed, 13 insertions(+), 8 deletions(-)
--- a/drivers/clk/ralink/clk-mtmips.c
+++ b/drivers/clk/ralink/clk-mtmips.c
@@ -263,10 +263,6 @@ err_clk_unreg:
.rate = _rate \
}
-static struct mtmips_clk_fixed rt305x_fixed_clocks[] = {
- CLK_FIXED("xtal", NULL, 40000000)
-};
-
static struct mtmips_clk_fixed rt3883_fixed_clocks[] = {
CLK_FIXED("xtal", NULL, 40000000),
CLK_FIXED("periph", "xtal", 40000000)
@@ -371,6 +367,12 @@ static inline struct mtmips_clk *to_mtmi
return container_of(hw, struct mtmips_clk, hw);
}
+static unsigned long rt2880_xtal_recalc_rate(struct clk_hw *hw,
+ unsigned long parent_rate)
+{
+ return 40000000;
+}
+
static unsigned long rt5350_xtal_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
@@ -682,10 +684,12 @@ static unsigned long mt76x8_cpu_recalc_r
}
static struct mtmips_clk rt2880_clks_base[] = {
+ { CLK_BASE("xtal", NULL, rt2880_xtal_recalc_rate) },
{ CLK_BASE("cpu", "xtal", rt2880_cpu_recalc_rate) }
};
static struct mtmips_clk rt305x_clks_base[] = {
+ { CLK_BASE("xtal", NULL, rt2880_xtal_recalc_rate) },
{ CLK_BASE("cpu", "xtal", rt305x_cpu_recalc_rate) }
};
@@ -695,6 +699,7 @@ static struct mtmips_clk rt3352_clks_bas
};
static struct mtmips_clk rt3883_clks_base[] = {
+ { CLK_BASE("xtal", NULL, rt2880_xtal_recalc_rate) },
{ CLK_BASE("cpu", "xtal", rt3883_cpu_recalc_rate) },
{ CLK_BASE("bus", "cpu", rt3883_bus_recalc_rate) }
};
@@ -751,8 +756,8 @@ err_clk_unreg:
static const struct mtmips_clk_data rt2880_clk_data = {
.clk_base = rt2880_clks_base,
.num_clk_base = ARRAY_SIZE(rt2880_clks_base),
- .clk_fixed = rt305x_fixed_clocks,
- .num_clk_fixed = ARRAY_SIZE(rt305x_fixed_clocks),
+ .clk_fixed = NULL,
+ .num_clk_fixed = 0,
.clk_factor = rt2880_factor_clocks,
.num_clk_factor = ARRAY_SIZE(rt2880_factor_clocks),
.clk_periph = rt2880_pherip_clks,
@@ -762,8 +767,8 @@ static const struct mtmips_clk_data rt28
static const struct mtmips_clk_data rt305x_clk_data = {
.clk_base = rt305x_clks_base,
.num_clk_base = ARRAY_SIZE(rt305x_clks_base),
- .clk_fixed = rt305x_fixed_clocks,
- .num_clk_fixed = ARRAY_SIZE(rt305x_fixed_clocks),
+ .clk_fixed = NULL,
+ .num_clk_fixed = 0,
.clk_factor = rt305x_factor_clocks,
.num_clk_factor = ARRAY_SIZE(rt305x_factor_clocks),
.clk_periph = rt305x_pherip_clks,

101
target/linux/ramips/patches-6.6/002-03-v6.13-clk-ralink-mtmips-add-mmc-related-clocks-for-SoCs-MT.patch Normal file
View File

@ -0,0 +1,101 @@
From 198675bbc03d437fb80a35d781ad13d622d0ff68 Mon Sep 17 00:00:00 2001
From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Date: Tue, 10 Sep 2024 06:40:24 +0200
Subject: [PATCH 3/3] clk: ralink: mtmips: add mmc related clocks for SoCs
MT7620, MT7628 and MT7688
Original architecture clock code from where this driver was derived did not
include nothing related to mmc clocks. OpenWRT people started to use mtk-sd
upstream driver recently and they were forced to use a dts 'fixed-clock'
node with 48 MHz clock:
- https://github.com/openwrt/openwrt/pull/15896
The proper thing to do to avoid that is to add the mmc related clocks to the
driver to avoid a dts with fixed clocks nodes. The minimal documentation in
the mt7620 programming guide says that there is a BBP_PLL clock of 480 MHz
derived from the 40 MHz XTAL and from there a clock divider by ten produces
the desired SDHC clock of 48 MHz for the mmc. Hence add a fixed clock 'bbppll'
and factor clock 'sdhc' ten divider child to properly set the 'mmc' peripheral
clock with the desired 48 Mhz rate.
Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
Link: https://lore.kernel.org/r/20240910044024.120009-4-sergio.paracuellos@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
---
drivers/clk/ralink/clk-mtmips.c | 30 +++++++++++++++++++++++-------
1 file changed, 23 insertions(+), 7 deletions(-)
--- a/drivers/clk/ralink/clk-mtmips.c
+++ b/drivers/clk/ralink/clk-mtmips.c
@@ -207,6 +207,7 @@ static struct mtmips_clk mt7620_pherip_c
{ CLK_PERIPH("10000b00.spi", "bus") },
{ CLK_PERIPH("10000b40.spi", "bus") },
{ CLK_PERIPH("10000c00.uartlite", "periph") },
+ { CLK_PERIPH("10130000.mmc", "sdhc") },
{ CLK_PERIPH("10180000.wmac", "xtal") }
};
@@ -220,6 +221,7 @@ static struct mtmips_clk mt76x8_pherip_c
{ CLK_PERIPH("10000c00.uart0", "periph") },
{ CLK_PERIPH("10000d00.uart1", "periph") },
{ CLK_PERIPH("10000e00.uart2", "periph") },
+ { CLK_PERIPH("10130000.mmc", "sdhc") },
{ CLK_PERIPH("10300000.wmac", "xtal") }
};
@@ -272,8 +274,13 @@ static struct mtmips_clk_fixed rt3352_fi
CLK_FIXED("periph", "xtal", 40000000)
};
+static struct mtmips_clk_fixed mt7620_fixed_clocks[] = {
+ CLK_FIXED("bbppll", "xtal", 480000000)
+};
+
static struct mtmips_clk_fixed mt76x8_fixed_clocks[] = {
- CLK_FIXED("pcmi2s", "xtal", 480000000),
+ CLK_FIXED("bbppll", "xtal", 480000000),
+ CLK_FIXED("pcmi2s", "bbppll", 480000000),
CLK_FIXED("periph", "xtal", 40000000)
};
@@ -328,6 +335,15 @@ static struct mtmips_clk_factor rt305x_f
CLK_FACTOR("bus", "cpu", 1, 3)
};
+static struct mtmips_clk_factor mt7620_factor_clocks[] = {
+ CLK_FACTOR("sdhc", "bbppll", 1, 10)
+};
+
+static struct mtmips_clk_factor mt76x8_factor_clocks[] = {
+ CLK_FACTOR("bus", "cpu", 1, 3),
+ CLK_FACTOR("sdhc", "bbppll", 1, 10)
+};
+
static int mtmips_register_factor_clocks(struct clk_hw_onecell_data *clk_data,
struct mtmips_clk_priv *priv)
{
@@ -811,10 +827,10 @@ static const struct mtmips_clk_data rt53
static const struct mtmips_clk_data mt7620_clk_data = {
.clk_base = mt7620_clks_base,
.num_clk_base = ARRAY_SIZE(mt7620_clks_base),
- .clk_fixed = NULL,
- .num_clk_fixed = 0,
- .clk_factor = NULL,
- .num_clk_factor = 0,
+ .clk_fixed = mt7620_fixed_clocks,
+ .num_clk_fixed = ARRAY_SIZE(mt7620_fixed_clocks),
+ .clk_factor = mt7620_factor_clocks,
+ .num_clk_factor = ARRAY_SIZE(mt7620_factor_clocks),
.clk_periph = mt7620_pherip_clks,
.num_clk_periph = ARRAY_SIZE(mt7620_pherip_clks),
};
@@ -824,8 +840,8 @@ static const struct mtmips_clk_data mt76
.num_clk_base = ARRAY_SIZE(mt76x8_clks_base),
.clk_fixed = mt76x8_fixed_clocks,
.num_clk_fixed = ARRAY_SIZE(mt76x8_fixed_clocks),
- .clk_factor = rt305x_factor_clocks,
- .num_clk_factor = ARRAY_SIZE(rt305x_factor_clocks),
+ .clk_factor = mt76x8_factor_clocks,
+ .num_clk_factor = ARRAY_SIZE(mt76x8_factor_clocks),
.clk_periph = mt76x8_pherip_clks,
.num_clk_periph = ARRAY_SIZE(mt76x8_pherip_clks),
};

24
target/linux/stm32/Makefile Normal file
View File

@ -0,0 +1,24 @@
# SPDX-License-Identifier: GPL-2.0-only
#
# Copyright (C) 2024 Bootlin
#
include $(TOPDIR)/rules.mk
BOARD:=stm32
BOARDNAME:=STMicroelectronics STM32
FEATURES:=boot-part emmc ext4 gpio rtc usb
SUBTARGETS:=stm32mp1
CPU_TYPE:=
KERNEL_PATCHVER:=6.6
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += blockdev kmod-gpio-button-hotplug
define Target/Description
Build firmware image for STM32 devices
endef
$(eval $(call BuildTarget))

18
target/linux/stm32/base-files/etc/board.d/02_network Normal file
View File

@ -0,0 +1,18 @@
. /lib/functions/uci-defaults.sh
. /lib/functions.sh
. /lib/functions/system.sh
board_config_update
board=$(board_name)
case "$board" in
st,stm32mp135f-dk)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
;;
esac
board_config_flush
exit 0

15
target/linux/stm32/base-files/lib/preinit/79_move_config Normal file
View File

@ -0,0 +1,15 @@
move_config() {
. /lib/upgrade/common.sh
. /lib/upgrade/platform.sh
if export_bootdevice && export_partdevice partdev 4; then
mount -t ext4 -o rw,noatime "/dev/$partdev" /mnt
if [ -f "/mnt/$BACKUP_FILE" ]; then
mv -f "/mnt/$BACKUP_FILE" /
fi
umount /mnt
fi
}
boot_hook_add preinit_mount_root move_config

181
target/linux/stm32/base-files/lib/upgrade/platform.sh Normal file
View File

@ -0,0 +1,181 @@
REQUIRE_IMAGE_METADATA=1
UBOOT_ENV_PART=3
BOOT_PART=4
ROOTFS_PART=5
RAMFS_COPY_BIN='blockdev'
export_bootdevice() {
local cmdline uuid blockdev uevent line class
local MAJOR MINOR DEVNAME DEVTYPE
local rootpart="$(cmdline_get_var root)"
case "$rootpart" in
PARTUUID=????????-????-????-????-??????????0?/PARTNROFF=1 | \
PARTUUID=????????-????-????-????-??????????05)
uuid="${rootpart#PARTUUID=}"
uuid="${uuid%/PARTNROFF=1}"
uuid="${uuid%0?}00"
for disk in $(find /dev -type b); do
set -- $(dd if=$disk bs=1 skip=568 count=16 2>/dev/null | hexdump -v -e '8/1 "%02x "" "2/1 "%02x""-"6/1 "%02x"')
if [ "$4$3$2$1-$6$5-$8$7-$9" = "$uuid" ]; then
uevent="/sys/class/block/${disk##*/}/uevent"
break
fi
done
;;
esac
if [ -e "$uevent" ]; then
while read line; do
export -n "$line"
done < "$uevent"
export BOOTDEV_MAJOR=$MAJOR
export BOOTDEV_MINOR=$MINOR
return 0
fi
return 1
}
platform_check_image() {
local diskdev partdev diff
[ "$#" -gt 1 ] && return 1
export_bootdevice && export_partdevice diskdev 0 || {
v "platform_check_image: Unable to determine upgrade device"
return 1
}
get_partitions "/dev/$diskdev" bootdisk
v "Extract the boot sector from the image"
get_image_dd "$1" of=/tmp/image.bs count=63 bs=512b
get_partitions /tmp/image.bs image
#compare tables
diff="$(grep -F -x -v -f /tmp/partmap.bootdisk /tmp/partmap.image)"
rm -f /tmp/image.bs /tmp/partmap.bootdisk /tmp/partmap.image
if [ -n "$diff" ]; then
echo "Partition layout has changed. Full image will be written."
ask_bool 0 "Abort" && exit 1
return 0
fi
}
platform_do_upgrade() {
local diskdev partdev diff partlabel
export_bootdevice && export_partdevice diskdev 0 || {
v "platform_do_upgrade: Unable to determine upgrade device"
return 1
}
sync
if [ "$UPGRADE_OPT_SAVE_PARTITIONS" = "1" ]; then
get_partitions "/dev/$diskdev" bootdisk
v "Extract boot sector from the image"
get_image_dd "$1" of=/tmp/image.bs count=63 bs=512b
get_partitions /tmp/image.bs image
#compare tables
diff="$(grep -F -x -v -f /tmp/partmap.bootdisk /tmp/partmap.image)"
else
diff=1
fi
if [ -n "$diff" ]; then
rm -rf /tmp/ubootenv
if export_partdevice partdev $UBOOT_ENV_PART; then
v "Saving u-boot env (/dev/$partdev) before to write image"
get_image_dd "/dev/$partdev" of=/tmp/ubootenv
fi
v "Writing image to /dev/$diskdev..."
get_image_dd "$1" of="/dev/$diskdev" conv=fsync
blockdev --rereadpt "/dev/$diskdev"
[ -f /tmp/ubootenv ] && {
# iterate over each partition from the image to find the
# u-boot-env partition and restore u-boot env.
while read part start size; do
if export_partdevice partdev $part; then
while read line; do
eval "local l$line"
done < "/sys/class/block/$partdev/uevent"
[ "$lPARTNAME" = "u-boot-env" ] || continue
v "Writting u-boot env to /dev/$partdev"
get_image_dd /tmp/ubootenv of="/dev/$partdev" conv=fsync
return 0
fi
done < /tmp/partmap.image
}
return 0
fi
#iterate over each partition from the image and write it to the boot disk
while read part start size; do
if export_partdevice partdev $part; then
# do not erase u-boot env
[ "$part" = "$UBOOT_ENV_PART" ] && continue
v "Writing image to /dev/$partdev..."
v "Normal partition, doing DD"
get_image_dd "$1" of="/dev/$partdev" ibs=512 obs=1M skip="$start" \
count="$size" conv=fsync
else
v "Unable to find partition $part device, skipped."
fi
done < /tmp/partmap.image
if export_partdevice partdev "$BOOT_PART"; then
mount -t ext4 -o rw,noatime "/dev/$partdev" /mnt
local partuuid="$(cmdline_get_var root)"
v "Setting rootfs ${partuuid}"
sed -i "s/PARTUUID=[a-f0-9-]\+/${partuuid}/ig" \
/mnt/extlinux/extlinux.conf
umount /mnt
fi
}
platform_copy_config() {
local partdev
# Iterate over each partition from the image to find the boot partition
# and copy the config tarball.
# The partlabel is used to find the partition.
# An hardcoded partition number cannot be used, as it could be wrong if
# the partition table changed, and the full image was written.
while read part start size; do
# config is copied in the boot partition, as for squashfs image, the
# rootfs partition is not writable.
if export_partdevice partdev "$part"; then
while read line; do
eval "local l$line"
done < "/sys/class/block/$partdev/uevent"
[ "$lPARTNAME" = "boot" ] || continue
mount -t ext4 -o rw,noatime "/dev/$partdev" /mnt
cp -af "$UPGRADE_BACKUP" "/mnt/$BACKUP_FILE"
umount /mnt
return 0
else
v "ERROR: Unable to find partition to copy config data to"
fi
done < /tmp/partmap.image
}

63
target/linux/stm32/image/Makefile Normal file
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@ -0,0 +1,63 @@
# SPDX-License-Identifier: GPL-2.0-only
#
# Copyright (C) 2024 Bootlin
#
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/image.mk
define Build/boot-img-ext4
rm -fR $@.boot
mkdir -p $@.boot
$(foreach dts,$(DEVICE_DTS), $(CP) $(KDIR)/image-$(dts).dtb $@.boot/$(dts).dtb;)
$(CP) $(IMAGE_KERNEL) $@.boot/$(KERNEL_IMG)
$(INSTALL_DIR) $@.boot/extlinux
$(CP) ./extlinux.conf $@.boot/extlinux/
$(SED) 's/@KERNEL@/$(KERNEL_IMG)/' $@.boot/extlinux/extlinux.conf
$(SED) 's/@DEVICE@/$(DEVICE_NAME)/' $@.boot/extlinux/extlinux.conf
$(SED) 's/@DTS@/$(DEVICE_DTS)/' $@.boot/extlinux/extlinux.conf
$(SED) 's/@ROOT@/PARTUUID=$(shell echo $(IMG_PART_DISKGUID) | sed 's/00$$/05/')/' $@.boot/extlinux/extlinux.conf
make_ext4fs -J -L kernel -l $(CONFIG_TARGET_KERNEL_PARTSIZE)M \
$(if $(SOURCE_DATE_EPOCH),-T $(SOURCE_DATE_EPOCH)) \
$@.bootimg $@.boot
endef
define Build/sdcard-img
GUID=$(IMG_PART_DISKGUID) ./gen_stm32_sdcard_img.sh \
$@ $(STAGING_DIR_IMAGE)/tf-a-$(DEVICE_NAME).stm32 \
$(STAGING_DIR_IMAGE)/fip-$(DEVICE_NAME).bin $@.bootimg $(IMAGE_ROOTFS) \
$(ENV_SIZE) $(CONFIG_TARGET_KERNEL_PARTSIZE) $(CONFIG_TARGET_ROOTFS_PARTSIZE)
endef
define Device/Default
PROFILES := Default
DEVICE_VENDOR := STMicroelectronics
IMAGES := factory.img.gz sysupgrade.img.gz
IMAGE/factory.img.gz := boot-img-ext4 | sdcard-img | gzip
IMAGE/sysupgrade.img.gz := boot-img-ext4 | sdcard-img | gzip | append-metadata
KERNEL := kernel-bin
KERNEL_NAME := zImage
KERNEL_IMG := zImage
DEVICE_DTS_DIR := $(DTS_DIR)/st
ENV_SIZE := 0x200000
DEVICE_PACKAGES := kmod-brcmfmac \
murata-firmware-43430-sdio \
murata-nvram-43430-sdio \
wpad-basic-mbedtls \
kmod-phy-stm32-usbphyc \
kmod-usb2 \
kmod-usb-storage \
kmod-usb-ledtrig-usbport \
-mtd
endef
define Device/stm32mp135f-dk
DEVICE_MODEL := STM32MP135F-DK
DEVICE_DTS := stm32mp135f-dk
SUPPORTED_DEVICES := st,stm32mp135f-dk
endef
TARGET_DEVICES += stm32mp135f-dk
$(eval $(call BuildImage))

4
target/linux/stm32/image/extlinux.conf Normal file
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@ -0,0 +1,4 @@
label @DEVICE@-openwrt
kernel /@KERNEL@
devicetree /@DTS@.dtb
append root=@ROOT@ rootwait

35
target/linux/stm32/image/gen_stm32_sdcard_img.sh Executable file
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#!/bin/sh
# Copyright (C) 2024 Bootlin
set -ex
[ $# -eq 8 ] || {
echo "SYNTAX: $0 <file> <fsbl> <fip> <bootfs image> <rootfs image> <env size> <bootfs size> <rootfs size>"
exit 1
}
OUTPUT="${1}"
FSBL="${2}"
FIP="${3}"
BOOTFS="${4}"
ROOTFS="${5}"
ENVSIZE="$((${6} / 1024))"
BOOTFSSIZE="${7}"
ROOTFSSIZE="${8}"
set $(ptgen -o "${OUTPUT}" -g -a 4 -l 2048 -G ${GUID} -N fsbla -p 2M -N fip -p 3M -N u-boot-env -p "${ENVSIZE}" -N boot -p${BOOTFSSIZE}M -N rootfs -p ${ROOTFSSIZE}M)
FSBLAOFFSET="$((${1} / 512))"
FSBLASIZE="$((${2} / 512))"
FIPOFFSET="$((${3} / 512))"
FIPSIZE="$((${4} / 512))"
ENVOFFSET="$((${5} / 512))"
ENVSIZE="$((${6} / 512))"
BOOTFSOFFSET="$((${7} / 512))"
BOOTFSSIZE="$((${8} / 512))"
ROOTFSOFFSET="$((${9} / 512))"
ROOTFSSIZE="$((${10} / 512))"
dd bs=512 if="${FSBL}" of="${OUTPUT}" seek="${FSBLAOFFSET}" conv=notrunc
dd bs=512 if="${FIP}" of="${OUTPUT}" seek="${FIPOFFSET}" conv=notrunc
dd bs=512 if=/dev/zero of="${OUTPUT}" seek="${ENVOFFSET}" count="${ENVSIZE}" conv=notrunc
dd bs=512 if="${BOOTFS}" of="${OUTPUT}" seek="${BOOTFSOFFSET}" conv=notrunc
dd bs=512 if="${ROOTFS}" of="${OUTPUT}" seek="${ROOTFSOFFSET}" conv=notrunc

256
target/linux/stm32/modules.mk Normal file
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@ -0,0 +1,256 @@
# SPDX-License-Identifier: GPL-2.0-only
#
# Copyright (C) 2024 Bootlin
define KernelPackage/phy-stm32-usbphyc
TITLE:=STM32 USB HS PHY Controller driver
DEPENDS:=@TARGET_stm32
KCONFIG:=CONFIG_PHY_STM32_USBPHYC
FILES:=$(LINUX_DIR)/drivers/phy/st/phy-stm32-usbphyc.ko
AUTOLOAD:=$(call AutoProbe,phy-stm32-usbphyc,)
endef
define KernelPackage/phy-stm32-usbphyc/description
Kernel module for STM32 USB HS PHY Controller
endef
$(eval $(call KernelPackage,phy-stm32-usbphyc))
define KernelPackage/bxcan
TITLE:=STM32 Basic Extended CAN (bxCAN) devices
KCONFIG:=CONFIG_CAN_BXCAN
FILES=$(LINUX_DIR)/drivers/net/can/bxcan.ko
AUTOLOAD:=$(call AutoProbe,bxcan)
$(call AddDepends/can,@TARGET_stm32)
endef
$(eval $(call KernelPackage,bxcan))
define KernelPackage/spi-stm32
SUBMENU=$(SPI_MENU)
TITLE:=STM32 SPI controller
DEPENDS:=@TARGET_stm32
KCONFIG:=CONFIG_SPI_STM32 \
CONFIG_SPI=y \
CONFIG_SPI_MASTER=y \
CONFIG_SPI_SLAVE_TIME=n \
CONFIG_SPI_SLAVE_SYSTEM_CONTROL=n
FILES=$(LINUX_DIR)/drivers/spi/spi-stm32.ko
AUTOLOAD:=$(call AutoProbe,spi-stm32)
endef
define KernelPackage/spi-stm32/description
SPI driver for STMicroelectronics STM32 SoCs.
endef
$(eval $(call KernelPackage,spi-stm32))
define KernelPackage/scmi-hwmon
TITLE:=ARM SCMI Sensors
KCONFIG:=CONFIG_SENSORS_ARM_SCMI
FILES:=$(LINUX_DIR)/drivers/hwmon/scmi-hwmon.ko
AUTOLOAD:=$(call AutoProbe,scmi-hwmon)
$(call AddDepends/hwmon,@TARGET_stm32 +kmod-thermal)
endef
$(eval $(call KernelPackage,scmi-hwmon))
define KernelPackage/stm32-dcmi
TITLE:=STM32 Digital Camera Memory Interface support
KCONFIG:=CONFIG_VIDEO_STM32_DCMI
FILES:=$(LINUX_DIR)/drivers/media/platform/st/stm32/stm32-dcmi.ko
AUTOLOAD:=$(call AutoProbe,stm32-dcmi)
$(call AddDepends/video,@TARGET_stm32 +kmod-video-videobuf2 +kmod-video-dma-contig +kmod-video-async +kmod-video-fwnode)
endef
$(eval $(call KernelPackage,stm32-dcmi))
define KernelPackage/sound-soc-stm32-sai
TITLE:=STM32 SAI interface (Serial Audio Interface) support
KCONFIG:=CONFIG_SND_SOC_STM32_SAI
FILES:=$(LINUX_DIR)/sound/soc/stm/snd-soc-stm32-sai-sub.ko \
$(LINUX_DIR)/sound/soc/stm/snd-soc-stm32-sai.ko
AUTOLOAD:=$(call AutoProbe,snd-soc-stm32-sai-sub snd-soc-stm32-sai)
$(call AddDepends/sound,@TARGET_stm32 +kmod-sound-soc-core)
endef
$(eval $(call KernelPackage,sound-soc-stm32-sai))
define KernelPackage/sound-soc-stm32-i2s
TITLE:=STM32 I2S interface (SPI/I2S block) support
KCONFIG:=CONFIG_SND_SOC_STM32_I2S
FILES:=$(LINUX_DIR)/sound/soc/stm/snd-soc-stm32-i2s.ko
AUTOLOAD:=$(call AutoProbe,snd-soc-stm32-i2s)
$(call AddDepends/sound,@TARGET_stm32 +kmod-sound-soc-core)
endef
$(eval $(call KernelPackage,sound-soc-stm32-i2s))
define KernelPackage/sound-soc-stm32-spdifrx
TITLE:=STM32 S/PDIF receiver (SPDIFRX) support
KCONFIG:=CONFIG_SND_SOC_STM32_SPDIFRX
FILES:=$(LINUX_DIR)/sound/soc/stm/snd-soc-stm32-spdifrx.ko
AUTOLOAD:=$(call AutoProbe,snd-soc-stm32-spdifrx)
$(call AddDepends/sound,@TARGET_stm32 +kmod-sound-soc-core)
endef
$(eval $(call KernelPackage,sound-soc-stm32-spdifrx))
define KernelPackage/sound-soc-stm32-dfsdm
TITLE:=SoC Audio support for STM32 DFSDM
KCONFIG:=CONFIG_SND_SOC_STM32_DFSDM
FILES:=$(LINUX_DIR)/sound/soc/stm/stm32_adfsdm.ko
AUTOLOAD:=$(call AutoProbe,stm32_adfsdm)
$(call AddDepends/sound,@TARGET_stm32 +kmod-sound-soc-core +kmod-stm32-dfsdm-adc +kmod-industrialio-buffer-cb)
endef
$(eval $(call KernelPackage,sound-soc-stm32-dfsdm))
define KernelPackage/stm32-timers
TITLE:=STM32 Timers
DEPENDS:=@TARGET_stm32 +kmod-mfd
KCONFIG:=CONFIG_MFD_STM32_TIMERS
FILES:=$(LINUX_DIR)/drivers/mfd/stm32-timers.ko
AUTOLOAD:=$(call AutoProbe,stm32-timers)
endef
$(eval $(call KernelPackage,stm32-timers))
define KernelPackage/stm32-timer-trigger
TITLE:=STM32 Timer Trigger
KCONFIG:=CONFIG_IIO_STM32_TIMER_TRIGGER
FILES:=$(LINUX_DIR)/drivers/iio/trigger/stm32-timer-trigger.ko
AUTOLOAD:=$(call AutoProbe,stm32-timer-trigger)
$(call AddDepends/iio,@TARGET_stm32 +kmod-stm32-timers)
endef
$(eval $(call KernelPackage,stm32-timer-trigger))
define KernelPackage/stm32-adc
TITLE:=STM32 ADC
KCONFIG:=CONFIG_STM32_ADC_CORE \
CONFIG_STM32_ADC
FILES:=$(LINUX_DIR)/drivers/iio/adc/stm32-adc-core.ko \
$(LINUX_DIR)/drivers/iio/adc/stm32-adc.ko
AUTOLOAD:=$(call AutoProbe,stm32-adc-core stm32-adc)
$(call AddDepends/iio,@TARGET_stm32 +kmod-stm32-timer-trigger +kmod-industrialio-triggered-buffer)
endef
$(eval $(call KernelPackage,stm32-adc))
define KernelPackage/stm32-dfsdm-adc
TITLE:=STM32 DFSDM ADC
KCONFIG:=CONFIG_STM32_DFSDM_CORE \
CONFIG_STM32_DFSDM_ADC
FILES:=$(LINUX_DIR)/drivers/iio/adc/stm32-dfsdm-core.ko \
$(LINUX_DIR)/drivers/iio/adc/stm32-dfsdm-adc.ko
AUTOLOAD:=$(call AutoProbe,stm32-dfsdm-core stm32-dfsdm-adc)
$(call AddDepends/iio,@TARGET_stm32 +kmod-stm32-timer-trigger +kmod-industrialio-triggered-buffer +kmod-industrialio-hw-consumer)
endef
$(eval $(call KernelPackage,stm32-dfsdm-adc))
define KernelPackage/scmi-iio
TITLE:=IIO SCMI
KCONFIG=CONFIG_IIO_SCMI
FILES:=$(LINUX_DIR)/drivers/iio/common/scmi_sensors/scmi_iio.ko
AUTOLOAD:=$(call AutoProbe,scmi_iio)
$(call AddDepends/iio,@TARGET_stm32 +kmod-iio-kfifo-buf)
endef
$(eval $(call KernelPackage,scmi-iio))
define KernelPackage/stm32-dac
TITLE:=STM32 DAC
DEPENDS:=@TARGET_stm32
KCONFIG:=CONFIG_STM32_DAC_CORE \
CONFIG_STM32_DAC
FILES:=$(LINUX_DIR)/drivers/iio/dac/stm32-dac-core.ko \
$(LINUX_DIR)/drivers/iio/dac/stm32-dac.ko
AUTOLOAD:=$(call AutoProbe,stm32-dac-core stm32-dac)
$(call AddDepends/iio,@TARGET_stm32)
endef
$(eval $(call KernelPackage,stm32-dac))
define KernelPackage/nvmem-stm32-romem
SUBMENU:=$(OTHER_MENU)
TITLE:=STM32 factory-programmed memory support
DEPENDS:=@TARGET_stm32
KCONFIG:=CONFIG_NVMEM_STM32_ROMEM
FILES:=$(LINUX_DIR)/drivers/nvmem/nvmem_stm32_romem.ko
AUTOLOAD:=$(call AutoProbe,nvmem-stm32-romem)
endef
$(eval $(call KernelPackage,nvmem-stm32-romem))
define KernelPackage/stm32-crc32
TITLE:=Support for STM32 crc accelerators
KCONFIG:=CONFIG_CRYPTO_DEV_STM32_CRC \
CONFIG_CRYPTO_HW=y
FILES:=$(LINUX_DIR)/drivers/crypto/stm32/stm32-crc32.ko
AUTOLOAD:=$(call AutoProbe,stm32-crc32)
$(call AddDepends/crypto,@TARGET_stm32 +kmod-crypto-crc32)
endef
$(eval $(call KernelPackage,stm32-crc32))
define KernelPackage/stm32-hash
SUBMENU:=$(CRYPTO_MENU)
TITLE:=Support for STM32 hash accelerators
DEPENDS:=@TARGET_stm32 \
+kmod-crypto-md5 \
+kmod-crypto-sha1 \
+kmod-crypto-sha256 \
+kmod-crypto-sha3 \
+kmod-crypto-rsa
KCONFIG:=CONFIG_CRYPTO_DEV_STM32_HASH \
CONFIG_CRYPTO_ENGINE=y \
FILES:=$(LINUX_DIR)/drivers/crypto/stm32/stm32-hash.ko
AUTOLOAD:=$(call AutoProbe,stm32-hash)
endef
$(eval $(call KernelPackage,stm32-hash))
define KernelPackage/stm32-cryp
TITLE:=Support for STM32 cryp accelerators
KCONFIG:=CONFIG_CRYPTO_DEV_STM32_CRYP \
CONFIG_CRYPTO_LIB_DES=y
FILES:=$(LINUX_DIR)/drivers/crypto/stm32/stm32-cryp.ko
AUTOLOAD:=$(call AutoProbe,stm32-cryp)
$(call AddDepends/crypto,@TARGET_stm32 +kmod-crypto-hash +kmod-crypto-des +kmod-crypto-engine)
endef
$(eval $(call KernelPackage,stm32-cryp))
define KernelPackage/st-thermal
SUBMENU:=$(OTHER_MENU)
TITLE:=Thermal sensors on STMicroelectronics STi series of SoCs
KCONFIG:=CONFIG_ST_THERMAL \
CONFIG_ST_THERMAL_MEMMAP
DEPENDS:=@TARGET_stm32 +kmod-thermal
FILES:=$(LINUX_DIR)/drivers/thermal/st/st_thermal.ko \
$(LINUX_DIR)/drivers/thermal/st/st_thermal_memmap.ko
AUTOLOAD:=$(call AutoProbe,st_thermal st_thermal_memmap)
endef
$(eval $(call KernelPackage,st-thermal))

69
target/linux/stm32/patches-6.6/001-net-stmmac-dwmac-stm32-use-devm_stmmac_probe_config_.patch Normal file
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@ -0,0 +1,69 @@
From 1ddced59ac1f7c739f21e930d87b126a30c561bb Mon Sep 17 00:00:00 2001
From: Jisheng Zhang <jszhang@kernel.org>
Date: Sat, 16 Sep 2023 15:58:23 +0800
Subject: [PATCH 1/8] net: stmmac: dwmac-stm32: use
devm_stmmac_probe_config_dt()
Simplify the driver's probe() function by using the devres
variant of stmmac_probe_config_dt().
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
.../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 17 ++++++-----------
1 file changed, 6 insertions(+), 11 deletions(-)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -372,21 +372,18 @@ static int stm32_dwmac_probe(struct plat
if (ret)
return ret;
- plat_dat = stmmac_probe_config_dt(pdev, stmmac_res.mac);
+ plat_dat = devm_stmmac_probe_config_dt(pdev, stmmac_res.mac);
if (IS_ERR(plat_dat))
return PTR_ERR(plat_dat);
dwmac = devm_kzalloc(&pdev->dev, sizeof(*dwmac), GFP_KERNEL);
- if (!dwmac) {
- ret = -ENOMEM;
- goto err_remove_config_dt;
- }
+ if (!dwmac)
+ return -ENOMEM;
data = of_device_get_match_data(&pdev->dev);
if (!data) {
dev_err(&pdev->dev, "no of match data provided\n");
- ret = -EINVAL;
- goto err_remove_config_dt;
+ return -EINVAL;
}
dwmac->ops = data;
@@ -395,14 +392,14 @@ static int stm32_dwmac_probe(struct plat
ret = stm32_dwmac_parse_data(dwmac, &pdev->dev);
if (ret) {
dev_err(&pdev->dev, "Unable to parse OF data\n");
- goto err_remove_config_dt;
+ return ret;
}
plat_dat->bsp_priv = dwmac;
ret = stm32_dwmac_init(plat_dat);
if (ret)
- goto err_remove_config_dt;
+ return ret;
ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
if (ret)
@@ -412,8 +409,6 @@ static int stm32_dwmac_probe(struct plat
err_clk_disable:
stm32_dwmac_clk_disable(dwmac);
-err_remove_config_dt:
- stmmac_remove_config_dt(pdev, plat_dat);
return ret;
}

241
target/linux/stm32/patches-6.6/002-net-stmmac-dwmac-stm32-refactor-clock-config.patch Normal file
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@ -0,0 +1,241 @@
From 73c350e3fb32e9598b66f61081c7e06a7fba49f8 Mon Sep 17 00:00:00 2001
From: Ben Wolsieffer <ben.wolsieffer@hefring.com>
Date: Mon, 9 Oct 2023 10:59:04 -0400
Subject: [PATCH 2/8] net: stmmac: dwmac-stm32: refactor clock config
Currently, clock configuration is spread throughout the driver and
partially duplicated for the STM32MP1 and STM32 MCU variants. This makes
it difficult to keep track of which clocks need to be enabled or disabled
in various scenarios.
This patch adds symmetric stm32_dwmac_clk_enable/disable() functions
that handle all clock configuration, including quirks required while
suspending or resuming. syscfg_clk and clk_eth_ck are not present on
STM32 MCUs, but it is fine to try to configure them anyway since NULL
clocks are ignored.
Signed-off-by: Ben Wolsieffer <ben.wolsieffer@hefring.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
.../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 113 +++++++-----------
1 file changed, 45 insertions(+), 68 deletions(-)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -98,7 +98,6 @@ struct stm32_dwmac {
struct stm32_ops {
int (*set_mode)(struct plat_stmmacenet_data *plat_dat);
- int (*clk_prepare)(struct stm32_dwmac *dwmac, bool prepare);
int (*suspend)(struct stm32_dwmac *dwmac);
void (*resume)(struct stm32_dwmac *dwmac);
int (*parse_data)(struct stm32_dwmac *dwmac,
@@ -107,62 +106,55 @@ struct stm32_ops {
bool clk_rx_enable_in_suspend;
};
-static int stm32_dwmac_init(struct plat_stmmacenet_data *plat_dat)
+static int stm32_dwmac_clk_enable(struct stm32_dwmac *dwmac, bool resume)
{
- struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
int ret;
- if (dwmac->ops->set_mode) {
- ret = dwmac->ops->set_mode(plat_dat);
- if (ret)
- return ret;
- }
-
ret = clk_prepare_enable(dwmac->clk_tx);
if (ret)
- return ret;
+ goto err_clk_tx;
- if (!dwmac->ops->clk_rx_enable_in_suspend ||
- !dwmac->dev->power.is_suspended) {
+ if (!dwmac->ops->clk_rx_enable_in_suspend || !resume) {
ret = clk_prepare_enable(dwmac->clk_rx);
- if (ret) {
- clk_disable_unprepare(dwmac->clk_tx);
- return ret;
- }
+ if (ret)
+ goto err_clk_rx;
}
- if (dwmac->ops->clk_prepare) {
- ret = dwmac->ops->clk_prepare(dwmac, true);
- if (ret) {
- clk_disable_unprepare(dwmac->clk_rx);
- clk_disable_unprepare(dwmac->clk_tx);
- }
+ ret = clk_prepare_enable(dwmac->syscfg_clk);
+ if (ret)
+ goto err_syscfg_clk;
+
+ if (dwmac->enable_eth_ck) {
+ ret = clk_prepare_enable(dwmac->clk_eth_ck);
+ if (ret)
+ goto err_clk_eth_ck;
}
return ret;
+
+err_clk_eth_ck:
+ clk_disable_unprepare(dwmac->syscfg_clk);
+err_syscfg_clk:
+ if (!dwmac->ops->clk_rx_enable_in_suspend || !resume)
+ clk_disable_unprepare(dwmac->clk_rx);
+err_clk_rx:
+ clk_disable_unprepare(dwmac->clk_tx);
+err_clk_tx:
+ return ret;
}
-static int stm32mp1_clk_prepare(struct stm32_dwmac *dwmac, bool prepare)
+static int stm32_dwmac_init(struct plat_stmmacenet_data *plat_dat, bool resume)
{
- int ret = 0;
+ struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
+ int ret;
- if (prepare) {
- ret = clk_prepare_enable(dwmac->syscfg_clk);
+ if (dwmac->ops->set_mode) {
+ ret = dwmac->ops->set_mode(plat_dat);
if (ret)
return ret;
- if (dwmac->enable_eth_ck) {
- ret = clk_prepare_enable(dwmac->clk_eth_ck);
- if (ret) {
- clk_disable_unprepare(dwmac->syscfg_clk);
- return ret;
- }
- }
- } else {
- clk_disable_unprepare(dwmac->syscfg_clk);
- if (dwmac->enable_eth_ck)
- clk_disable_unprepare(dwmac->clk_eth_ck);
}
- return ret;
+
+ return stm32_dwmac_clk_enable(dwmac, resume);
}
static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)
@@ -252,13 +244,15 @@ static int stm32mcu_set_mode(struct plat
dwmac->ops->syscfg_eth_mask, val << 23);
}
-static void stm32_dwmac_clk_disable(struct stm32_dwmac *dwmac)
+static void stm32_dwmac_clk_disable(struct stm32_dwmac *dwmac, bool suspend)
{
clk_disable_unprepare(dwmac->clk_tx);
- clk_disable_unprepare(dwmac->clk_rx);
+ if (!dwmac->ops->clk_rx_enable_in_suspend || !suspend)
+ clk_disable_unprepare(dwmac->clk_rx);
- if (dwmac->ops->clk_prepare)
- dwmac->ops->clk_prepare(dwmac, false);
+ clk_disable_unprepare(dwmac->syscfg_clk);
+ if (dwmac->enable_eth_ck)
+ clk_disable_unprepare(dwmac->clk_eth_ck);
}
static int stm32_dwmac_parse_data(struct stm32_dwmac *dwmac,
@@ -397,7 +391,7 @@ static int stm32_dwmac_probe(struct plat
plat_dat->bsp_priv = dwmac;
- ret = stm32_dwmac_init(plat_dat);
+ ret = stm32_dwmac_init(plat_dat, false);
if (ret)
return ret;
@@ -408,7 +402,7 @@ static int stm32_dwmac_probe(struct plat
return 0;
err_clk_disable:
- stm32_dwmac_clk_disable(dwmac);
+ stm32_dwmac_clk_disable(dwmac, false);
return ret;
}
@@ -421,7 +415,7 @@ static void stm32_dwmac_remove(struct pl
stmmac_dvr_remove(&pdev->dev);
- stm32_dwmac_clk_disable(priv->plat->bsp_priv);
+ stm32_dwmac_clk_disable(dwmac, false);
if (dwmac->irq_pwr_wakeup >= 0) {
dev_pm_clear_wake_irq(&pdev->dev);
@@ -431,18 +425,7 @@ static void stm32_dwmac_remove(struct pl
static int stm32mp1_suspend(struct stm32_dwmac *dwmac)
{
- int ret = 0;
-
- ret = clk_prepare_enable(dwmac->clk_ethstp);
- if (ret)
- return ret;
-
- clk_disable_unprepare(dwmac->clk_tx);
- clk_disable_unprepare(dwmac->syscfg_clk);
- if (dwmac->enable_eth_ck)
- clk_disable_unprepare(dwmac->clk_eth_ck);
-
- return ret;
+ return clk_prepare_enable(dwmac->clk_ethstp);
}
static void stm32mp1_resume(struct stm32_dwmac *dwmac)
@@ -450,14 +433,6 @@ static void stm32mp1_resume(struct stm32
clk_disable_unprepare(dwmac->clk_ethstp);
}
-static int stm32mcu_suspend(struct stm32_dwmac *dwmac)
-{
- clk_disable_unprepare(dwmac->clk_tx);
- clk_disable_unprepare(dwmac->clk_rx);
-
- return 0;
-}
-
#ifdef CONFIG_PM_SLEEP
static int stm32_dwmac_suspend(struct device *dev)
{
@@ -468,6 +443,10 @@ static int stm32_dwmac_suspend(struct de
int ret;
ret = stmmac_suspend(dev);
+ if (ret)
+ return ret;
+
+ stm32_dwmac_clk_disable(dwmac, true);
if (dwmac->ops->suspend)
ret = dwmac->ops->suspend(dwmac);
@@ -485,7 +464,7 @@ static int stm32_dwmac_resume(struct dev
if (dwmac->ops->resume)
dwmac->ops->resume(dwmac);
- ret = stm32_dwmac_init(priv->plat);
+ ret = stm32_dwmac_init(priv->plat, true);
if (ret)
return ret;
@@ -500,13 +479,11 @@ static SIMPLE_DEV_PM_OPS(stm32_dwmac_pm_
static struct stm32_ops stm32mcu_dwmac_data = {
.set_mode = stm32mcu_set_mode,
- .suspend = stm32mcu_suspend,
.syscfg_eth_mask = SYSCFG_MCU_ETH_MASK
};
static struct stm32_ops stm32mp1_dwmac_data = {
.set_mode = stm32mp1_set_mode,
- .clk_prepare = stm32mp1_clk_prepare,
.suspend = stm32mp1_suspend,
.resume = stm32mp1_resume,
.parse_data = stm32mp1_parse_data,

125
target/linux/stm32/patches-6.6/003-net-stmmac-dwmac-stm32-Separate-out-external-clock-r.patch Normal file
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@ -0,0 +1,125 @@
From 23c08dc4ff28b5ca1aa5ee745a5e9688561e8f6a Mon Sep 17 00:00:00 2001
From: Marek Vasut <marex@denx.de>
Date: Tue, 11 Jun 2024 10:36:00 +0200
Subject: [PATCH 3/8] net: stmmac: dwmac-stm32: Separate out external clock
rate validation
Pull the external clock frequency validation into a separate function,
to avoid conflating it with external clock DT property decoding and
clock mux register configuration. This should make the code easier to
read and understand.
This does change the code behavior slightly. The clock mux PMCR register
setting now depends solely on the DT properties which configure the clock
mux between external clock and internal RCC generated clock. The mux PMCR
register settings no longer depend on the supplied clock frequency, that
supplied clock frequency is now only validated, and if the clock frequency
is invalid for a mode, it is rejected.
Previously, the code would switch the PMCR register clock mux to internal
RCC generated clock if external clock couldn't provide suitable frequency,
without checking whether the RCC generated clock frequency is correct. Such
behavior is risky at best, user should have configured their clock correctly
in the first place, so this behavior is removed here.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
.../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 51 +++++++++++++++----
1 file changed, 41 insertions(+), 10 deletions(-)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -157,25 +157,54 @@ static int stm32_dwmac_init(struct plat_
return stm32_dwmac_clk_enable(dwmac, resume);
}
+static int stm32mp1_validate_ethck_rate(struct plat_stmmacenet_data *plat_dat)
+{
+ struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
+ const u32 clk_rate = clk_get_rate(dwmac->clk_eth_ck);
+
+ switch (plat_dat->mac_interface) {
+ case PHY_INTERFACE_MODE_MII:
+ case PHY_INTERFACE_MODE_GMII:
+ if (clk_rate == ETH_CK_F_25M)
+ return 0;
+ break;
+ case PHY_INTERFACE_MODE_RMII:
+ if (clk_rate == ETH_CK_F_25M || clk_rate == ETH_CK_F_50M)
+ return 0;
+ break;
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ if (clk_rate == ETH_CK_F_25M || clk_rate == ETH_CK_F_125M)
+ return 0;
+ break;
+ default:
+ break;
+ }
+
+ dev_err(dwmac->dev, "Mode %s does not match eth-ck frequency %d Hz",
+ phy_modes(plat_dat->mac_interface), clk_rate);
+ return -EINVAL;
+}
+
static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)
{
struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
- u32 reg = dwmac->mode_reg, clk_rate;
- int val;
+ u32 reg = dwmac->mode_reg;
+ int val, ret;
- clk_rate = clk_get_rate(dwmac->clk_eth_ck);
dwmac->enable_eth_ck = false;
switch (plat_dat->mac_interface) {
case PHY_INTERFACE_MODE_MII:
- if (clk_rate == ETH_CK_F_25M && dwmac->ext_phyclk)
+ if (dwmac->ext_phyclk)
dwmac->enable_eth_ck = true;
val = SYSCFG_PMCR_ETH_SEL_MII;
pr_debug("SYSCFG init : PHY_INTERFACE_MODE_MII\n");
break;
case PHY_INTERFACE_MODE_GMII:
val = SYSCFG_PMCR_ETH_SEL_GMII;
- if (clk_rate == ETH_CK_F_25M &&
- (dwmac->eth_clk_sel_reg || dwmac->ext_phyclk)) {
+ if (dwmac->eth_clk_sel_reg || dwmac->ext_phyclk) {
dwmac->enable_eth_ck = true;
val |= SYSCFG_PMCR_ETH_CLK_SEL;
}
@@ -183,8 +212,7 @@ static int stm32mp1_set_mode(struct plat
break;
case PHY_INTERFACE_MODE_RMII:
val = SYSCFG_PMCR_ETH_SEL_RMII;
- if ((clk_rate == ETH_CK_F_25M || clk_rate == ETH_CK_F_50M) &&
- (dwmac->eth_ref_clk_sel_reg || dwmac->ext_phyclk)) {
+ if (dwmac->eth_ref_clk_sel_reg || dwmac->ext_phyclk) {
dwmac->enable_eth_ck = true;
val |= SYSCFG_PMCR_ETH_REF_CLK_SEL;
}
@@ -195,8 +223,7 @@ static int stm32mp1_set_mode(struct plat
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_TXID:
val = SYSCFG_PMCR_ETH_SEL_RGMII;
- if ((clk_rate == ETH_CK_F_25M || clk_rate == ETH_CK_F_125M) &&
- (dwmac->eth_clk_sel_reg || dwmac->ext_phyclk)) {
+ if (dwmac->eth_clk_sel_reg || dwmac->ext_phyclk) {
dwmac->enable_eth_ck = true;
val |= SYSCFG_PMCR_ETH_CLK_SEL;
}
@@ -209,6 +236,10 @@ static int stm32mp1_set_mode(struct plat
return -EINVAL;
}
+ ret = stm32mp1_validate_ethck_rate(plat_dat);
+ if (ret)
+ return ret;
+
/* Need to update PMCCLRR (clear register) */
regmap_write(dwmac->regmap, reg + SYSCFG_PMCCLRR_OFFSET,
dwmac->ops->syscfg_eth_mask);

132
target/linux/stm32/patches-6.6/004-net-stmmac-dwmac-stm32-Separate-out-external-clock-s.patch Normal file
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@ -0,0 +1,132 @@
From d23ba64e733580db2809e6f6dbf6f093fbd1b91b Mon Sep 17 00:00:00 2001
From: Marek Vasut <marex@denx.de>
Date: Tue, 11 Jun 2024 10:36:01 +0200
Subject: [PATCH 4/8] net: stmmac: dwmac-stm32: Separate out external clock
selector
Pull the external clock selector into a separate function, to avoid
conflating it with external clock rate validation and clock mux
register configuration. This should make the code easier to read and
understand.
The dwmac->enable_eth_ck variable in the end indicates whether the MAC
clock are supplied by external oscillator (true) or internal RCC clock
IP (false). The dwmac->enable_eth_ck value is set based on multiple DT
properties, some of them deprecated, some of them specific to bus mode.
The following DT properties and variables are taken into account. In
each case, if the property is present or true, MAC clock is supplied
by external oscillator.
- "st,ext-phyclk", assigned to variable dwmac->ext_phyclk
- Used in any mode (MII/RMII/GMII/RGMII)
- The only non-deprecated DT property of the three
- "st,eth-clk-sel", assigned to variable dwmac->eth_clk_sel_reg
- Valid only in GMII/RGMII mode
- Deprecated property, backward compatibility only
- "st,eth-ref-clk-sel", assigned to variable dwmac->eth_ref_clk_sel_reg
- Valid only in RMII mode
- Deprecated property, backward compatibility only
The stm32mp1_select_ethck_external() function handles the aforementioned
DT properties and sets dwmac->enable_eth_ck accordingly.
The stm32mp1_set_mode() is adjusted to call stm32mp1_select_ethck_external()
first and then only use dwmac->enable_eth_ck to determine hardware clock mux
settings.
No functional change intended.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
.../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 50 ++++++++++++++-----
1 file changed, 38 insertions(+), 12 deletions(-)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -157,6 +157,37 @@ static int stm32_dwmac_init(struct plat_
return stm32_dwmac_clk_enable(dwmac, resume);
}
+static int stm32mp1_select_ethck_external(struct plat_stmmacenet_data *plat_dat)
+{
+ struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
+
+ switch (plat_dat->mac_interface) {
+ case PHY_INTERFACE_MODE_MII:
+ dwmac->enable_eth_ck = dwmac->ext_phyclk;
+ return 0;
+ case PHY_INTERFACE_MODE_GMII:
+ dwmac->enable_eth_ck = dwmac->eth_clk_sel_reg ||
+ dwmac->ext_phyclk;
+ return 0;
+ case PHY_INTERFACE_MODE_RMII:
+ dwmac->enable_eth_ck = dwmac->eth_ref_clk_sel_reg ||
+ dwmac->ext_phyclk;
+ return 0;
+ case PHY_INTERFACE_MODE_RGMII:
+ case PHY_INTERFACE_MODE_RGMII_ID:
+ case PHY_INTERFACE_MODE_RGMII_RXID:
+ case PHY_INTERFACE_MODE_RGMII_TXID:
+ dwmac->enable_eth_ck = dwmac->eth_clk_sel_reg ||
+ dwmac->ext_phyclk;
+ return 0;
+ default:
+ dwmac->enable_eth_ck = false;
+ dev_err(dwmac->dev, "Mode %s not supported",
+ phy_modes(plat_dat->mac_interface));
+ return -EINVAL;
+ }
+}
+
static int stm32mp1_validate_ethck_rate(struct plat_stmmacenet_data *plat_dat)
{
struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
@@ -194,28 +225,25 @@ static int stm32mp1_set_mode(struct plat
u32 reg = dwmac->mode_reg;
int val, ret;
- dwmac->enable_eth_ck = false;
+ ret = stm32mp1_select_ethck_external(plat_dat);
+ if (ret)
+ return ret;
+
switch (plat_dat->mac_interface) {
case PHY_INTERFACE_MODE_MII:
- if (dwmac->ext_phyclk)
- dwmac->enable_eth_ck = true;
val = SYSCFG_PMCR_ETH_SEL_MII;
pr_debug("SYSCFG init : PHY_INTERFACE_MODE_MII\n");
break;
case PHY_INTERFACE_MODE_GMII:
val = SYSCFG_PMCR_ETH_SEL_GMII;
- if (dwmac->eth_clk_sel_reg || dwmac->ext_phyclk) {
- dwmac->enable_eth_ck = true;
+ if (dwmac->enable_eth_ck)
val |= SYSCFG_PMCR_ETH_CLK_SEL;
- }
pr_debug("SYSCFG init : PHY_INTERFACE_MODE_GMII\n");
break;
case PHY_INTERFACE_MODE_RMII:
val = SYSCFG_PMCR_ETH_SEL_RMII;
- if (dwmac->eth_ref_clk_sel_reg || dwmac->ext_phyclk) {
- dwmac->enable_eth_ck = true;
+ if (dwmac->enable_eth_ck)
val |= SYSCFG_PMCR_ETH_REF_CLK_SEL;
- }
pr_debug("SYSCFG init : PHY_INTERFACE_MODE_RMII\n");
break;
case PHY_INTERFACE_MODE_RGMII:
@@ -223,10 +251,8 @@ static int stm32mp1_set_mode(struct plat
case PHY_INTERFACE_MODE_RGMII_RXID:
case PHY_INTERFACE_MODE_RGMII_TXID:
val = SYSCFG_PMCR_ETH_SEL_RGMII;
- if (dwmac->eth_clk_sel_reg || dwmac->ext_phyclk) {
- dwmac->enable_eth_ck = true;
+ if (dwmac->enable_eth_ck)
val |= SYSCFG_PMCR_ETH_CLK_SEL;
- }
pr_debug("SYSCFG init : PHY_INTERFACE_MODE_RGMII\n");
break;
default:

71
target/linux/stm32/patches-6.6/005-net-stmmac-dwmac-stm32-Extract-PMCR-configuration.patch Normal file
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@ -0,0 +1,71 @@
From bb7ab910631ee0ade0758a3c4aa8dadc3b6934b6 Mon Sep 17 00:00:00 2001
From: Marek Vasut <marex@denx.de>
Date: Tue, 11 Jun 2024 10:36:02 +0200
Subject: [PATCH 5/8] net: stmmac: dwmac-stm32: Extract PMCR configuration
Pull the PMCR clock mux configuration into a separate function. This is
the final change of three, which moves external clock rate validation,
external clock selector decoding, and clock mux configuration into
separate functions. This should make the code easier to understand.
No functional change intended.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
.../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 27 ++++++++++++-------
1 file changed, 17 insertions(+), 10 deletions(-)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -219,15 +219,11 @@ static int stm32mp1_validate_ethck_rate(
return -EINVAL;
}
-static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)
+static int stm32mp1_configure_pmcr(struct plat_stmmacenet_data *plat_dat)
{
struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
u32 reg = dwmac->mode_reg;
- int val, ret;
-
- ret = stm32mp1_select_ethck_external(plat_dat);
- if (ret)
- return ret;
+ int val;
switch (plat_dat->mac_interface) {
case PHY_INTERFACE_MODE_MII:
@@ -262,10 +258,6 @@ static int stm32mp1_set_mode(struct plat
return -EINVAL;
}
- ret = stm32mp1_validate_ethck_rate(plat_dat);
- if (ret)
- return ret;
-
/* Need to update PMCCLRR (clear register) */
regmap_write(dwmac->regmap, reg + SYSCFG_PMCCLRR_OFFSET,
dwmac->ops->syscfg_eth_mask);
@@ -275,6 +267,21 @@ static int stm32mp1_set_mode(struct plat
dwmac->ops->syscfg_eth_mask, val);
}
+static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)
+{
+ int ret;
+
+ ret = stm32mp1_select_ethck_external(plat_dat);
+ if (ret)
+ return ret;
+
+ ret = stm32mp1_validate_ethck_rate(plat_dat);
+ if (ret)
+ return ret;
+
+ return stm32mp1_configure_pmcr(plat_dat);
+}
+
static int stm32mcu_set_mode(struct plat_stmmacenet_data *plat_dat)
{
struct stm32_dwmac *dwmac = plat_dat->bsp_priv;

83
target/linux/stm32/patches-6.6/006-net-stmmac-dwmac-stm32-Clean-up-the-debug-prints.patch Normal file
View File

@ -0,0 +1,83 @@
From 0476213f50452446fedd1a918b7bc72eb39a4c46 Mon Sep 17 00:00:00 2001
From: Marek Vasut <marex@denx.de>
Date: Tue, 11 Jun 2024 10:36:03 +0200
Subject: [PATCH 6/8] net: stmmac: dwmac-stm32: Clean up the debug prints
Use dev_err()/dev_dbg() and phy_modes() to print PHY mode instead of
pr_debug() and hand-written PHY mode decoding. This way, each debug
print has associated device with it and duplicated mode decoding is
removed.
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
.../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 18 ++++++++----------
1 file changed, 8 insertions(+), 10 deletions(-)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -228,19 +228,16 @@ static int stm32mp1_configure_pmcr(struc
switch (plat_dat->mac_interface) {
case PHY_INTERFACE_MODE_MII:
val = SYSCFG_PMCR_ETH_SEL_MII;
- pr_debug("SYSCFG init : PHY_INTERFACE_MODE_MII\n");
break;
case PHY_INTERFACE_MODE_GMII:
val = SYSCFG_PMCR_ETH_SEL_GMII;
if (dwmac->enable_eth_ck)
val |= SYSCFG_PMCR_ETH_CLK_SEL;
- pr_debug("SYSCFG init : PHY_INTERFACE_MODE_GMII\n");
break;
case PHY_INTERFACE_MODE_RMII:
val = SYSCFG_PMCR_ETH_SEL_RMII;
if (dwmac->enable_eth_ck)
val |= SYSCFG_PMCR_ETH_REF_CLK_SEL;
- pr_debug("SYSCFG init : PHY_INTERFACE_MODE_RMII\n");
break;
case PHY_INTERFACE_MODE_RGMII:
case PHY_INTERFACE_MODE_RGMII_ID:
@@ -249,15 +246,16 @@ static int stm32mp1_configure_pmcr(struc
val = SYSCFG_PMCR_ETH_SEL_RGMII;
if (dwmac->enable_eth_ck)
val |= SYSCFG_PMCR_ETH_CLK_SEL;
- pr_debug("SYSCFG init : PHY_INTERFACE_MODE_RGMII\n");
break;
default:
- pr_debug("SYSCFG init : Do not manage %d interface\n",
- plat_dat->mac_interface);
+ dev_err(dwmac->dev, "Mode %s not supported",
+ phy_modes(plat_dat->mac_interface));
/* Do not manage others interfaces */
return -EINVAL;
}
+ dev_dbg(dwmac->dev, "Mode %s", phy_modes(plat_dat->mac_interface));
+
/* Need to update PMCCLRR (clear register) */
regmap_write(dwmac->regmap, reg + SYSCFG_PMCCLRR_OFFSET,
dwmac->ops->syscfg_eth_mask);
@@ -291,19 +289,19 @@ static int stm32mcu_set_mode(struct plat
switch (plat_dat->mac_interface) {
case PHY_INTERFACE_MODE_MII:
val = SYSCFG_MCU_ETH_SEL_MII;
- pr_debug("SYSCFG init : PHY_INTERFACE_MODE_MII\n");
break;
case PHY_INTERFACE_MODE_RMII:
val = SYSCFG_MCU_ETH_SEL_RMII;
- pr_debug("SYSCFG init : PHY_INTERFACE_MODE_RMII\n");
break;
default:
- pr_debug("SYSCFG init : Do not manage %d interface\n",
- plat_dat->mac_interface);
+ dev_err(dwmac->dev, "Mode %s not supported",
+ phy_modes(plat_dat->mac_interface));
/* Do not manage others interfaces */
return -EINVAL;
}
+ dev_dbg(dwmac->dev, "Mode %s", phy_modes(plat_dat->mac_interface));
+
return regmap_update_bits(dwmac->regmap, reg,
dwmac->ops->syscfg_eth_mask, val << 23);
}

101
target/linux/stm32/patches-6.6/007-net-stmmac-dwmac-stm32-Mask-support-for-PMCR-configu.patch Normal file
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@ -0,0 +1,101 @@
From 796669a85c5c4fa80cb8790e9adcccbbd99750e8 Mon Sep 17 00:00:00 2001
From: Christophe Roullier <christophe.roullier@foss.st.com>
Date: Tue, 11 Jun 2024 10:36:05 +0200
Subject: [PATCH 7/8] net: stmmac: dwmac-stm32: Mask support for PMCR
configuration
Add possibility to have second argument in syscon property to manage
mask. This mask will be used to address right BITFIELDS of PMCR register.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
.../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 28 +++++++++++++------
1 file changed, 19 insertions(+), 9 deletions(-)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -90,6 +90,7 @@ struct stm32_dwmac {
int eth_ref_clk_sel_reg;
int irq_pwr_wakeup;
u32 mode_reg; /* MAC glue-logic mode register */
+ u32 mode_mask;
struct regmap *regmap;
u32 speed;
const struct stm32_ops *ops;
@@ -102,8 +103,8 @@ struct stm32_ops {
void (*resume)(struct stm32_dwmac *dwmac);
int (*parse_data)(struct stm32_dwmac *dwmac,
struct device *dev);
- u32 syscfg_eth_mask;
bool clk_rx_enable_in_suspend;
+ u32 syscfg_clr_off;
};
static int stm32_dwmac_clk_enable(struct stm32_dwmac *dwmac, bool resume)
@@ -256,13 +257,16 @@ static int stm32mp1_configure_pmcr(struc
dev_dbg(dwmac->dev, "Mode %s", phy_modes(plat_dat->mac_interface));
+ /* Shift value at correct ethernet MAC offset in SYSCFG_PMCSETR */
+ val <<= ffs(dwmac->mode_mask) - ffs(SYSCFG_MP1_ETH_MASK);
+
/* Need to update PMCCLRR (clear register) */
- regmap_write(dwmac->regmap, reg + SYSCFG_PMCCLRR_OFFSET,
- dwmac->ops->syscfg_eth_mask);
+ regmap_write(dwmac->regmap, dwmac->ops->syscfg_clr_off,
+ dwmac->mode_mask);
/* Update PMCSETR (set register) */
return regmap_update_bits(dwmac->regmap, reg,
- dwmac->ops->syscfg_eth_mask, val);
+ dwmac->mode_mask, val);
}
static int stm32mp1_set_mode(struct plat_stmmacenet_data *plat_dat)
@@ -303,7 +307,7 @@ static int stm32mcu_set_mode(struct plat
dev_dbg(dwmac->dev, "Mode %s", phy_modes(plat_dat->mac_interface));
return regmap_update_bits(dwmac->regmap, reg,
- dwmac->ops->syscfg_eth_mask, val << 23);
+ SYSCFG_MCU_ETH_MASK, val << 23);
}
static void stm32_dwmac_clk_disable(struct stm32_dwmac *dwmac, bool suspend)
@@ -348,8 +352,15 @@ static int stm32_dwmac_parse_data(struct
return PTR_ERR(dwmac->regmap);
err = of_property_read_u32_index(np, "st,syscon", 1, &dwmac->mode_reg);
- if (err)
+ if (err) {
dev_err(dev, "Can't get sysconfig mode offset (%d)\n", err);
+ return err;
+ }
+
+ dwmac->mode_mask = SYSCFG_MP1_ETH_MASK;
+ err = of_property_read_u32_index(np, "st,syscon", 2, &dwmac->mode_mask);
+ if (err)
+ dev_dbg(dev, "Warning sysconfig register mask not set\n");
return err;
}
@@ -540,8 +551,7 @@ static SIMPLE_DEV_PM_OPS(stm32_dwmac_pm_
stm32_dwmac_suspend, stm32_dwmac_resume);
static struct stm32_ops stm32mcu_dwmac_data = {
- .set_mode = stm32mcu_set_mode,
- .syscfg_eth_mask = SYSCFG_MCU_ETH_MASK
+ .set_mode = stm32mcu_set_mode
};
static struct stm32_ops stm32mp1_dwmac_data = {
@@ -549,7 +559,7 @@ static struct stm32_ops stm32mp1_dwmac_d
.suspend = stm32mp1_suspend,
.resume = stm32mp1_resume,
.parse_data = stm32mp1_parse_data,
- .syscfg_eth_mask = SYSCFG_MP1_ETH_MASK,
+ .syscfg_clr_off = 0x44,
.clk_rx_enable_in_suspend = true
};

94
target/linux/stm32/patches-6.6/008-net-stmmac-dwmac-stm32-add-management-of-stm32mp13-f.patch Normal file
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@ -0,0 +1,94 @@
From 8d28aaf5d5dbfd1f452286fa6ac571df0bcf00ad Mon Sep 17 00:00:00 2001
From: Christophe Roullier <christophe.roullier@foss.st.com>
Date: Tue, 11 Jun 2024 10:36:06 +0200
Subject: [PATCH 8/8] net: stmmac: dwmac-stm32: add management of stm32mp13 for
stm32
Add Ethernet support for STM32MP13.
STM32MP13 is STM32 SOC with 2 GMACs instances.
GMAC IP version is SNPS 4.20.
GMAC IP configure with 1 RX and 1 TX queue.
DMA HW capability register supported
RX Checksum Offload Engine supported
TX Checksum insertion supported
Wake-Up On Lan supported
TSO supported
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
.../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 32 ++++++++++++++++---
1 file changed, 28 insertions(+), 4 deletions(-)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -104,6 +104,7 @@ struct stm32_ops {
int (*parse_data)(struct stm32_dwmac *dwmac,
struct device *dev);
bool clk_rx_enable_in_suspend;
+ bool is_mp13;
u32 syscfg_clr_off;
};
@@ -224,11 +225,18 @@ static int stm32mp1_configure_pmcr(struc
{
struct stm32_dwmac *dwmac = plat_dat->bsp_priv;
u32 reg = dwmac->mode_reg;
- int val;
+ int val = 0;
switch (plat_dat->mac_interface) {
case PHY_INTERFACE_MODE_MII:
- val = SYSCFG_PMCR_ETH_SEL_MII;
+ /*
+ * STM32MP15xx supports both MII and GMII, STM32MP13xx MII only.
+ * SYSCFG_PMCSETR ETH_SELMII is present only on STM32MP15xx and
+ * acts as a selector between 0:GMII and 1:MII. As STM32MP13xx
+ * supports only MII, ETH_SELMII is not present.
+ */
+ if (!dwmac->ops->is_mp13) /* Select MII mode on STM32MP15xx */
+ val |= SYSCFG_PMCR_ETH_SEL_MII;
break;
case PHY_INTERFACE_MODE_GMII:
val = SYSCFG_PMCR_ETH_SEL_GMII;
@@ -359,8 +367,12 @@ static int stm32_dwmac_parse_data(struct
dwmac->mode_mask = SYSCFG_MP1_ETH_MASK;
err = of_property_read_u32_index(np, "st,syscon", 2, &dwmac->mode_mask);
- if (err)
- dev_dbg(dev, "Warning sysconfig register mask not set\n");
+ if (err) {
+ if (dwmac->ops->is_mp13)
+ dev_err(dev, "Sysconfig register mask must be set (%d)\n", err);
+ else
+ dev_dbg(dev, "Warning sysconfig register mask not set\n");
+ }
return err;
}
@@ -560,12 +572,24 @@ static struct stm32_ops stm32mp1_dwmac_d
.resume = stm32mp1_resume,
.parse_data = stm32mp1_parse_data,
.syscfg_clr_off = 0x44,
+ .is_mp13 = false,
+ .clk_rx_enable_in_suspend = true
+};
+
+static struct stm32_ops stm32mp13_dwmac_data = {
+ .set_mode = stm32mp1_set_mode,
+ .suspend = stm32mp1_suspend,
+ .resume = stm32mp1_resume,
+ .parse_data = stm32mp1_parse_data,
+ .syscfg_clr_off = 0x08,
+ .is_mp13 = true,
.clk_rx_enable_in_suspend = true
};
static const struct of_device_id stm32_dwmac_match[] = {
{ .compatible = "st,stm32-dwmac", .data = &stm32mcu_dwmac_data},
{ .compatible = "st,stm32mp1-dwmac", .data = &stm32mp1_dwmac_data},
+ { .compatible = "st,stm32mp13-dwmac", .data = &stm32mp13_dwmac_data},
{ }
};
MODULE_DEVICE_TABLE(of, stm32_dwmac_match);

1192
target/linux/stm32/patches-6.6/009-ARM-dts-stm32-add-ETZPC-as-a-system-bus-for-STM32MP1.patch Normal file
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265
target/linux/stm32/patches-6.6/010-ARM-dts-stm32-put-ETZPC-as-an-access-controller-for-.patch Normal file
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@ -0,0 +1,265 @@
From 21ca3d7c59595d76237faebeff4f6a979cf7ae82 Mon Sep 17 00:00:00 2001
From: Alexandre Torgue <alexandre.torgue@foss.st.com>
Date: Fri, 5 Apr 2024 13:45:24 +0200
Subject: [PATCH 2/5] ARM: dts: stm32: put ETZPC as an access controller for
STM32MP13x boards
Reference ETZPC as an access-control-provider.
For more information on which peripheral is securable or supports MCU
isolation, please read the STM32MP13 reference manual
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
---
arch/arm/boot/dts/st/stm32mp131.dtsi | 28 ++++++++++++++++++++++++++-
arch/arm/boot/dts/st/stm32mp133.dtsi | 1 +
arch/arm/boot/dts/st/stm32mp13xc.dtsi | 1 +
arch/arm/boot/dts/st/stm32mp13xf.dtsi | 1 +
4 files changed, 30 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/dts/st/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
@@ -886,10 +886,11 @@
};
etzpc: bus@5c007000 {
- compatible = "simple-bus";
+ compatible = "st,stm32-etzpc", "simple-bus";
reg = <0x5c007000 0x400>;
#address-cells = <1>;
#size-cells = <1>;
+ #access-controller-cells = <1>;
ranges;
adc_2: adc@48004000 {
@@ -902,6 +903,7 @@
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ access-controllers = <&etzpc 33>;
status = "disabled";
adc2: adc@0 {
@@ -949,6 +951,7 @@
dr_mode = "otg";
otg-rev = <0x200>;
usb33d-supply = <&scmi_usb33>;
+ access-controllers = <&etzpc 34>;
status = "disabled";
};
@@ -962,6 +965,7 @@
dmas = <&dmamux1 41 0x400 0x5>,
<&dmamux1 42 0x400 0x1>;
dma-names = "rx", "tx";
+ access-controllers = <&etzpc 16>;
status = "disabled";
};
@@ -975,6 +979,7 @@
dmas = <&dmamux1 43 0x400 0x5>,
<&dmamux1 44 0x400 0x1>;
dma-names = "rx", "tx";
+ access-controllers = <&etzpc 17>;
status = "disabled";
};
@@ -986,6 +991,7 @@
dmas = <&dmamux1 83 0x400 0x01>,
<&dmamux1 84 0x400 0x01>;
dma-names = "rx", "tx";
+ access-controllers = <&etzpc 13>;
status = "disabled";
};
@@ -1000,6 +1006,7 @@
dmas = <&dmamux1 83 0x400 0x01>,
<&dmamux1 84 0x400 0x01>;
dma-names = "rx", "tx";
+ access-controllers = <&etzpc 18>;
status = "disabled";
};
@@ -1014,6 +1021,7 @@
dmas = <&dmamux1 85 0x400 0x01>,
<&dmamux1 86 0x400 0x01>;
dma-names = "rx", "tx";
+ access-controllers = <&etzpc 19>;
status = "disabled";
};
@@ -1032,6 +1040,7 @@
dma-names = "rx", "tx";
st,syscfg-fmp = <&syscfg 0x4 0x4>;
i2c-analog-filter;
+ access-controllers = <&etzpc 20>;
status = "disabled";
};
@@ -1050,6 +1059,7 @@
dma-names = "rx", "tx";
st,syscfg-fmp = <&syscfg 0x4 0x8>;
i2c-analog-filter;
+ access-controllers = <&etzpc 21>;
status = "disabled";
};
@@ -1068,6 +1078,7 @@
dma-names = "rx", "tx";
st,syscfg-fmp = <&syscfg 0x4 0x10>;
i2c-analog-filter;
+ access-controllers = <&etzpc 22>;
status = "disabled";
};
@@ -1080,6 +1091,7 @@
interrupt-names = "global";
clocks = <&rcc TIM12_K>;
clock-names = "int";
+ access-controllers = <&etzpc 23>;
status = "disabled";
pwm {
@@ -1104,6 +1116,7 @@
interrupt-names = "global";
clocks = <&rcc TIM13_K>;
clock-names = "int";
+ access-controllers = <&etzpc 24>;
status = "disabled";
pwm {
@@ -1128,6 +1141,7 @@
interrupt-names = "global";
clocks = <&rcc TIM14_K>;
clock-names = "int";
+ access-controllers = <&etzpc 25>;
status = "disabled";
pwm {
@@ -1157,6 +1171,7 @@
<&dmamux1 107 0x400 0x1>,
<&dmamux1 108 0x400 0x1>;
dma-names = "ch1", "up", "trig", "com";
+ access-controllers = <&etzpc 26>;
status = "disabled";
pwm {
@@ -1184,6 +1199,7 @@
dmas = <&dmamux1 109 0x400 0x1>,
<&dmamux1 110 0x400 0x1>;
dma-names = "ch1", "up";
+ access-controllers = <&etzpc 27>;
status = "disabled";
pwm {
@@ -1211,6 +1227,7 @@
dmas = <&dmamux1 111 0x400 0x1>,
<&dmamux1 112 0x400 0x1>;
dma-names = "ch1", "up";
+ access-controllers = <&etzpc 28>;
status = "disabled";
pwm {
@@ -1235,6 +1252,7 @@
clocks = <&rcc LPTIM2_K>;
clock-names = "mux";
wakeup-source;
+ access-controllers = <&etzpc 1>;
status = "disabled";
pwm {
@@ -1269,6 +1287,7 @@
clocks = <&rcc LPTIM3_K>;
clock-names = "mux";
wakeup-source;
+ access-controllers = <&etzpc 2>;
status = "disabled";
pwm {
@@ -1297,6 +1316,7 @@
resets = <&rcc HASH1_R>;
dmas = <&mdma 30 0x2 0x1000a02 0x0 0x0>;
dma-names = "in";
+ access-controllers = <&etzpc 41>;
status = "disabled";
};
@@ -1305,6 +1325,7 @@
reg = <0x54004000 0x400>;
clocks = <&rcc RNG1_K>;
resets = <&rcc RNG1_R>;
+ access-controllers = <&etzpc 40>;
status = "disabled";
};
@@ -1320,6 +1341,7 @@
#size-cells = <1>;
clocks = <&rcc FMC_K>;
resets = <&rcc FMC_R>;
+ access-controllers = <&etzpc 54>;
status = "disabled";
nand-controller@4,0 {
@@ -1353,6 +1375,7 @@
dma-names = "tx", "rx";
clocks = <&rcc QSPI_K>;
resets = <&rcc QSPI_R>;
+ access-controllers = <&etzpc 55>;
status = "disabled";
};
@@ -1367,6 +1390,7 @@
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <130000000>;
+ access-controllers = <&etzpc 50>;
status = "disabled";
};
@@ -1381,6 +1405,7 @@
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <130000000>;
+ access-controllers = <&etzpc 51>;
status = "disabled";
};
@@ -1394,6 +1419,7 @@
resets = <&rcc USBPHY_R>;
vdda1v1-supply = <&scmi_reg11>;
vdda1v8-supply = <&scmi_reg18>;
+ access-controllers = <&etzpc 5>;
status = "disabled";
usbphyc_port0: usb-phy@0 {
--- a/arch/arm/boot/dts/st/stm32mp133.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp133.dtsi
@@ -47,6 +47,7 @@
#interrupt-cells = <1>;
#address-cells = <1>;
#size-cells = <0>;
+ access-controllers = <&etzpc 32>;
status = "disabled";
adc1: adc@0 {
--- a/arch/arm/boot/dts/st/stm32mp13xc.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp13xc.dtsi
@@ -11,6 +11,7 @@
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CRYP1>;
resets = <&rcc CRYP1_R>;
+ access-controllers = <&etzpc 42>;
status = "disabled";
};
};
--- a/arch/arm/boot/dts/st/stm32mp13xf.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp13xf.dtsi
@@ -11,6 +11,7 @@
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rcc CRYP1>;
resets = <&rcc CRYP1_R>;
+ access-controllers = <&etzpc 42>;
status = "disabled";
};
};

126
target/linux/stm32/patches-6.6/011-ARM-dts-stm32-add-ethernet1-2-RMII-pins-for-STM32MP1.patch Normal file
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@ -0,0 +1,126 @@
From b1468a44e0c0f43a06e027efeff4183b3aee0cf7 Mon Sep 17 00:00:00 2001
From: Christophe Roullier <christophe.roullier@foss.st.com>
Date: Mon, 10 Jun 2024 10:03:08 +0200
Subject: [PATCH 3/5] ARM: dts: stm32: add ethernet1/2 RMII pins for
STM32MP13F-DK board
Those pins are used for Ethernet 1 and 2 on STM32MP13F-DK board.
ethernet1: RMII with crystal.
ethernet2: RMII without crystal.
Add analog gpio pin configuration ("sleep") to manage power mode on
stm32mp13.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
---
arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi | 98 +++++++++++++++++++++
1 file changed, 98 insertions(+)
--- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi
@@ -13,6 +13,104 @@
};
};
+ eth1_rgmii_pins_a: eth1-rgmii-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_RGMII_TXD0 */
+ <STM32_PINMUX('G', 14, AF11)>, /* ETH_RGMII_TXD1 */
+ <STM32_PINMUX('C', 2, AF11)>, /* ETH_RGMII_TXD2 */
+ <STM32_PINMUX('E', 5, AF10)>, /* ETH_RGMII_TXD3 */
+ <STM32_PINMUX('B', 11, AF11)>, /* ETH_RGMII_TX_CTL */
+ <STM32_PINMUX('C', 1, AF11)>, /* ETH_RGMII_GTX_CLK */
+ <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
+ <STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <2>;
+ };
+
+ pins2 {
+ pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RGMII_RXD0 */
+ <STM32_PINMUX('C', 5, AF11)>, /* ETH_RGMII_RXD1 */
+ <STM32_PINMUX('B', 0, AF11)>, /* ETH_RGMII_RXD2 */
+ <STM32_PINMUX('B', 1, AF11)>, /* ETH_RGMII_RXD3 */
+ <STM32_PINMUX('A', 7, AF11)>, /* ETH_RGMII_RX_CTL */
+ <STM32_PINMUX('D', 7, AF10)>; /* ETH_RGMII_RX_CLK */
+ bias-disable;
+ };
+
+ };
+
+ eth1_rmii_pins_a: eth1-rmii-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH_RMII_TXD0 */
+ <STM32_PINMUX('G', 14, AF11)>, /* ETH_RMII_TXD1 */
+ <STM32_PINMUX('B', 11, AF11)>, /* ETH_RMII_TX_EN */
+ <STM32_PINMUX('A', 1, AF11)>, /* ETH_RMII_REF_CLK */
+ <STM32_PINMUX('A', 2, AF11)>, /* ETH_MDIO */
+ <STM32_PINMUX('G', 2, AF11)>; /* ETH_MDC */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <1>;
+ };
+
+ pins2 {
+ pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH_RMII_RXD0 */
+ <STM32_PINMUX('C', 5, AF11)>, /* ETH_RMII_RXD1 */
+ <STM32_PINMUX('C', 1, AF10)>; /* ETH_RMII_CRS_DV */
+ bias-disable;
+ };
+
+ };
+
+ eth1_rmii_sleep_pins_a: eth1-rmii-sleep-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH_RMII_TXD0 */
+ <STM32_PINMUX('G', 14, ANALOG)>, /* ETH_RMII_TXD1 */
+ <STM32_PINMUX('B', 11, ANALOG)>, /* ETH_RMII_TX_EN */
+ <STM32_PINMUX('A', 1, ANALOG)>, /* ETH_RMII_REF_CLK */
+ <STM32_PINMUX('A', 2, ANALOG)>, /* ETH_MDIO */
+ <STM32_PINMUX('G', 2, ANALOG)>, /* ETH_MDC */
+ <STM32_PINMUX('C', 4, ANALOG)>, /* ETH_RMII_RXD0 */
+ <STM32_PINMUX('C', 5, ANALOG)>, /* ETH_RMII_RXD1 */
+ <STM32_PINMUX('C', 1, ANALOG)>; /* ETH_RMII_CRS_DV */
+ };
+ };
+
+ eth2_rmii_pins_a: eth2-rmii-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('F', 7, AF11)>, /* ETH_RMII_TXD0 */
+ <STM32_PINMUX('G', 11, AF10)>, /* ETH_RMII_TXD1 */
+ <STM32_PINMUX('G', 8, AF13)>, /* ETH_RMII_ETHCK */
+ <STM32_PINMUX('F', 6, AF11)>, /* ETH_RMII_TX_EN */
+ <STM32_PINMUX('B', 2, AF11)>, /* ETH_MDIO */
+ <STM32_PINMUX('G', 5, AF10)>; /* ETH_MDC */
+ bias-disable;
+ drive-push-pull;
+ slew-rate = <1>;
+ };
+
+ pins2 {
+ pinmux = <STM32_PINMUX('F', 4, AF11)>, /* ETH_RMII_RXD0 */
+ <STM32_PINMUX('E', 2, AF10)>, /* ETH_RMII_RXD1 */
+ <STM32_PINMUX('A', 12, AF11)>; /* ETH_RMII_CRS_DV */
+ bias-disable;
+ };
+ };
+
+ eth2_rmii_sleep_pins_a: eth2-rmii-sleep-0 {
+ pins1 {
+ pinmux = <STM32_PINMUX('F', 7, ANALOG)>, /* ETH_RMII_TXD0 */
+ <STM32_PINMUX('G', 11, ANALOG)>, /* ETH_RMII_TXD1 */
+ <STM32_PINMUX('G', 8, ANALOG)>, /* ETH_RMII_ETHCK */
+ <STM32_PINMUX('F', 6, ANALOG)>, /* ETH_RMII_TX_EN */
+ <STM32_PINMUX('B', 2, ANALOG)>, /* ETH_MDIO */
+ <STM32_PINMUX('G', 5, ANALOG)>, /* ETH_MDC */
+ <STM32_PINMUX('F', 4, ANALOG)>, /* ETH_RMII_RXD0 */
+ <STM32_PINMUX('E', 2, ANALOG)>, /* ETH_RMII_RXD1 */
+ <STM32_PINMUX('A', 12, ANALOG)>; /* ETH_RMII_CRS_DV */
+ };
+ };
+
i2c1_pins_a: i2c1-0 {
pins {
pinmux = <STM32_PINMUX('D', 12, AF5)>, /* I2C1_SCL */

108
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From fcf6ca2da4650d0a7a9cd62c8c72341860931159 Mon Sep 17 00:00:00 2001
From: Christophe Roullier <christophe.roullier@foss.st.com>
Date: Mon, 10 Jun 2024 10:03:07 +0200
Subject: [PATCH 4/5] ARM: dts: stm32: add ethernet1 and ethernet2 support on
stm32mp13
Both instances ethernet based on GMAC SNPS IP on stm32mp13.
GMAC IP version is SNPS 4.20.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
---
arch/arm/boot/dts/st/stm32mp131.dtsi | 38 ++++++++++++++++++++++++++++
arch/arm/boot/dts/st/stm32mp133.dtsi | 31 +++++++++++++++++++++++
2 files changed, 69 insertions(+)
--- a/arch/arm/boot/dts/st/stm32mp131.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp131.dtsi
@@ -883,6 +883,12 @@
ts_cal2: calib@5e {
reg = <0x5e 0x2>;
};
+ ethernet_mac1_address: mac1@e4 {
+ reg = <0xe4 0x6>;
+ };
+ ethernet_mac2_address: mac2@ea {
+ reg = <0xea 0x6>;
+ };
};
etzpc: bus@5c007000 {
@@ -1409,6 +1415,38 @@
status = "disabled";
};
+ ethernet1: ethernet@5800a000 {
+ compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
+ reg = <0x5800a000 0x2000>;
+ reg-names = "stmmaceth";
+ interrupts-extended = <&intc GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
+ <&exti 68 1>;
+ interrupt-names = "macirq", "eth_wake_irq";
+ clock-names = "stmmaceth",
+ "mac-clk-tx",
+ "mac-clk-rx",
+ "ethstp",
+ "eth-ck";
+ clocks = <&rcc ETH1MAC>,
+ <&rcc ETH1TX>,
+ <&rcc ETH1RX>,
+ <&rcc ETH1STP>,
+ <&rcc ETH1CK_K>;
+ st,syscon = <&syscfg 0x4 0xff0000>;
+ snps,mixed-burst;
+ snps,pbl = <2>;
+ snps,axi-config = <&stmmac_axi_config_1>;
+ snps,tso;
+ access-controllers = <&etzpc 48>;
+ status = "disabled";
+
+ stmmac_axi_config_1: stmmac-axi-config {
+ snps,blen = <0 0 0 0 16 8 4>;
+ snps,rd_osr_lmt = <0x7>;
+ snps,wr_osr_lmt = <0x7>;
+ };
+ };
+
usbphyc: usbphyc@5a006000 {
#address-cells = <1>;
#size-cells = <0>;
--- a/arch/arm/boot/dts/st/stm32mp133.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp133.dtsi
@@ -68,4 +68,35 @@
};
};
};
+
+ ethernet2: ethernet@5800e000 {
+ compatible = "st,stm32mp13-dwmac", "snps,dwmac-4.20a";
+ reg = <0x5800e000 0x2000>;
+ reg-names = "stmmaceth";
+ interrupts-extended = <&intc GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ clock-names = "stmmaceth",
+ "mac-clk-tx",
+ "mac-clk-rx",
+ "ethstp",
+ "eth-ck";
+ clocks = <&rcc ETH2MAC>,
+ <&rcc ETH2TX>,
+ <&rcc ETH2RX>,
+ <&rcc ETH2STP>,
+ <&rcc ETH2CK_K>;
+ st,syscon = <&syscfg 0x4 0xff000000>;
+ snps,mixed-burst;
+ snps,pbl = <2>;
+ snps,axi-config = <&stmmac_axi_config_2>;
+ snps,tso;
+ access-controllers = <&etzpc 49>;
+ status = "disabled";
+
+ stmmac_axi_config_2: stmmac-axi-config {
+ snps,blen = <0 0 0 0 16 8 4>;
+ snps,rd_osr_lmt = <0x7>;
+ snps,wr_osr_lmt = <0x7>;
+ };
+ };
};

58
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From b255afeeb33efaa974b1b2454b1f58252d783b67 Mon Sep 17 00:00:00 2001
From: Christophe Roullier <christophe.roullier@foss.st.com>
Date: Mon, 10 Jun 2024 10:03:09 +0200
Subject: [PATCH 5/5] ARM: dts: stm32: add ethernet1 for STM32MP135F-DK board
Ethernet1: RMII with crystal
Ethernet2: RMII with no cristal, need "phy-supply" property to work,
today this property was managed by Ethernet glue, but should be present
and managed in PHY node. So I will push second Ethernet in next step.
PHYs used are SMSC (LAN8742A)
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
---
arch/arm/boot/dts/st/stm32mp135f-dk.dts | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
--- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
@@ -19,6 +19,7 @@
compatible = "st,stm32mp135f-dk", "st,stm32mp135";
aliases {
+ ethernet0 = &ethernet1;
serial0 = &uart4;
serial1 = &usart1;
serial2 = &uart8;
@@ -92,6 +93,28 @@
};
};
};
+
+&ethernet1 {
+ status = "okay";
+ pinctrl-0 = <&eth1_rmii_pins_a>;
+ pinctrl-1 = <&eth1_rmii_sleep_pins_a>;
+ pinctrl-names = "default", "sleep";
+ phy-mode = "rmii";
+ phy-handle = <&phy0_eth1>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+
+ phy0_eth1: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0007.c131";
+ reg = <0>;
+ reset-gpios = <&mcp23017 9 GPIO_ACTIVE_LOW>;
+ wakeup-source;
+ };
+ };
+};
&i2c1 {
pinctrl-names = "default", "sleep";

166
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From 1bcfbfd7c9aa716f61a01682345a1b329f6a6e66 Mon Sep 17 00:00:00 2001
From: Christophe Kerello <christophe.kerello@foss.st.com>
Date: Wed, 8 Nov 2023 15:16:37 +0100
Subject: [PATCH] mmc: mmci: stm32: add SDIO in-band interrupt mode
Add the support of SDIO in-band interrupt mode for STM32 and Ux500
variants.
It allows the SD I/O card to interrupt the host on SDMMC_D1 data line.
It is not enabled by default on Ux500 variant as this is unstable and
Ux500 users should use out-of-band IRQs.
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20231108141637.119497-1-yann.gautier@foss.st.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
---
drivers/mmc/host/mmci.c | 69 +++++++++++++++++++++++++++++++++++++++--
drivers/mmc/host/mmci.h | 2 ++
2 files changed, 69 insertions(+), 2 deletions(-)
--- a/drivers/mmc/host/mmci.c
+++ b/drivers/mmc/host/mmci.c
@@ -272,6 +272,7 @@ static struct variant_data variant_stm32
.datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN,
.stm32_idmabsize_mask = GENMASK(12, 5),
.stm32_idmabsize_align = BIT(5),
+ .supports_sdio_irq = true,
.busy_timeout = true,
.busy_detect = true,
.busy_detect_flag = MCI_STM32_BUSYD0,
@@ -299,6 +300,7 @@ static struct variant_data variant_stm32
.datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN,
.stm32_idmabsize_mask = GENMASK(16, 5),
.stm32_idmabsize_align = BIT(5),
+ .supports_sdio_irq = true,
.dma_lli = true,
.busy_timeout = true,
.busy_detect = true,
@@ -327,6 +329,7 @@ static struct variant_data variant_stm32
.datactrl_mask_sdio = MCI_DPSM_ST_SDIOEN,
.stm32_idmabsize_mask = GENMASK(16, 6),
.stm32_idmabsize_align = BIT(6),
+ .supports_sdio_irq = true,
.dma_lli = true,
.busy_timeout = true,
.busy_detect = true,
@@ -420,8 +423,9 @@ void mmci_write_pwrreg(struct mmci_host
*/
static void mmci_write_datactrlreg(struct mmci_host *host, u32 datactrl)
{
- /* Keep busy mode in DPSM if enabled */
- datactrl |= host->datactrl_reg & host->variant->busy_dpsm_flag;
+ /* Keep busy mode in DPSM and SDIO mask if enabled */
+ datactrl |= host->datactrl_reg & (host->variant->busy_dpsm_flag |
+ host->variant->datactrl_mask_sdio);
if (host->datactrl_reg != datactrl) {
host->datactrl_reg = datactrl;
@@ -1761,6 +1765,25 @@ static irqreturn_t mmci_pio_irq(int irq,
return IRQ_HANDLED;
}
+static void mmci_write_sdio_irq_bit(struct mmci_host *host, int enable)
+{
+ void __iomem *base = host->base;
+ u32 mask = readl_relaxed(base + MMCIMASK0);
+
+ if (enable)
+ writel_relaxed(mask | MCI_ST_SDIOITMASK, base + MMCIMASK0);
+ else
+ writel_relaxed(mask & ~MCI_ST_SDIOITMASK, base + MMCIMASK0);
+}
+
+static void mmci_signal_sdio_irq(struct mmci_host *host, u32 status)
+{
+ if (status & MCI_ST_SDIOIT) {
+ mmci_write_sdio_irq_bit(host, 0);
+ sdio_signal_irq(host->mmc);
+ }
+}
+
/*
* Handle completion of command and data transfers.
*/
@@ -1805,6 +1828,9 @@ static irqreturn_t mmci_irq(int irq, voi
mmci_data_irq(host, host->data, status);
}
+ if (host->variant->supports_sdio_irq)
+ mmci_signal_sdio_irq(host, status);
+
/*
* Busy detection has been handled by mmci_cmd_irq() above.
* Clear the status bit to prevent polling in IRQ context.
@@ -2041,6 +2067,35 @@ static int mmci_sig_volt_switch(struct m
return ret;
}
+static void mmci_enable_sdio_irq(struct mmc_host *mmc, int enable)
+{
+ struct mmci_host *host = mmc_priv(mmc);
+ unsigned long flags;
+
+ if (enable)
+ /* Keep the SDIO mode bit if SDIO irqs are enabled */
+ pm_runtime_get_sync(mmc_dev(mmc));
+
+ spin_lock_irqsave(&host->lock, flags);
+ mmci_write_sdio_irq_bit(host, enable);
+ spin_unlock_irqrestore(&host->lock, flags);
+
+ if (!enable) {
+ pm_runtime_mark_last_busy(mmc_dev(mmc));
+ pm_runtime_put_autosuspend(mmc_dev(mmc));
+ }
+}
+
+static void mmci_ack_sdio_irq(struct mmc_host *mmc)
+{
+ struct mmci_host *host = mmc_priv(mmc);
+ unsigned long flags;
+
+ spin_lock_irqsave(&host->lock, flags);
+ mmci_write_sdio_irq_bit(host, 1);
+ spin_unlock_irqrestore(&host->lock, flags);
+}
+
static struct mmc_host_ops mmci_ops = {
.request = mmci_request,
.pre_req = mmci_pre_request,
@@ -2316,6 +2371,16 @@ static int mmci_probe(struct amba_device
mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY;
}
+ if (variant->supports_sdio_irq && host->mmc->caps & MMC_CAP_SDIO_IRQ) {
+ mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD;
+
+ mmci_ops.enable_sdio_irq = mmci_enable_sdio_irq;
+ mmci_ops.ack_sdio_irq = mmci_ack_sdio_irq;
+
+ mmci_write_datactrlreg(host,
+ host->variant->datactrl_mask_sdio);
+ }
+
/* Variants with mandatory busy timeout in HW needs R1B responses. */
if (variant->busy_timeout)
mmc->caps |= MMC_CAP_NEED_RSP_BUSY;
--- a/drivers/mmc/host/mmci.h
+++ b/drivers/mmc/host/mmci.h
@@ -331,6 +331,7 @@ enum mmci_busy_state {
* register.
* @opendrain: bitmask identifying the OPENDRAIN bit inside MMCIPOWER register
* @dma_lli: true if variant has dma link list feature.
+ * @supports_sdio_irq: allow SD I/O card to interrupt the host
* @stm32_idmabsize_mask: stm32 sdmmc idma buffer size.
*/
struct variant_data {
@@ -376,6 +377,7 @@ struct variant_data {
u32 start_err;
u32 opendrain;
u8 dma_lli:1;
+ bool supports_sdio_irq;
u32 stm32_idmabsize_mask;
u32 stm32_idmabsize_align;
void (*init)(struct mmci_host *host);

189
target/linux/stm32/patches-6.6/030-rtc-stm32-add-pinctrl-and-pinmux-interfaces.patch Normal file
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@ -0,0 +1,189 @@
From c15671ce05a038b8c92a6f1e24b0b850a154ba59 Mon Sep 17 00:00:00 2001
From: Valentin Caron <valentin.caron@foss.st.com>
Date: Mon, 22 Jul 2024 18:00:20 +0200
Subject: [PATCH] rtc: stm32: add pinctrl and pinmux interfaces
STM32 RTC is capable to handle 3 specific pins of the soc.
"out1, out2 and out2_rmp". To handle this, we use pinctrl framework.
There is a single pin per group.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240722160022.454226-3-valentin.caron@foss.st.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
---
drivers/rtc/Kconfig | 5 ++
drivers/rtc/rtc-stm32.c | 120 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 125 insertions(+)
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1887,6 +1887,11 @@ config RTC_DRV_STM32
tristate "STM32 RTC"
select REGMAP_MMIO
depends on ARCH_STM32 || COMPILE_TEST
+ depends on OF
+ depends on PINCTRL
+ select PINMUX
+ select PINCONF
+ select GENERIC_PINCONF
help
If you say yes here you get support for the STM32 On-Chip
Real Time Clock.
--- a/drivers/rtc/rtc-stm32.c
+++ b/drivers/rtc/rtc-stm32.c
@@ -12,6 +12,9 @@
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinconf-generic.h>
+#include <linux/pinctrl/pinmux.h>
#include <linux/platform_device.h>
#include <linux/pm_wakeirq.h>
#include <linux/regmap.h>
@@ -94,6 +97,14 @@
/* STM32 RTC driver time helpers */
#define SEC_PER_DAY (24 * 60 * 60)
+/* STM32 RTC pinctrl helpers */
+#define STM32_RTC_PINMUX(_name, _action, ...) { \
+ .name = (_name), \
+ .action = (_action), \
+ .groups = ((const char *[]){ __VA_ARGS__ }), \
+ .num_groups = ARRAY_SIZE(((const char *[]){ __VA_ARGS__ })), \
+}
+
struct stm32_rtc;
struct stm32_rtc_registers {
@@ -149,6 +160,106 @@ static void stm32_rtc_wpr_lock(struct st
writel_relaxed(RTC_WPR_WRONG_KEY, rtc->base + regs->wpr);
}
+enum stm32_rtc_pin_name {
+ NONE,
+ OUT1,
+ OUT2,
+ OUT2_RMP
+};
+
+static const struct pinctrl_pin_desc stm32_rtc_pinctrl_pins[] = {
+ PINCTRL_PIN(OUT1, "out1"),
+ PINCTRL_PIN(OUT2, "out2"),
+ PINCTRL_PIN(OUT2_RMP, "out2_rmp"),
+};
+
+static int stm32_rtc_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
+{
+ return ARRAY_SIZE(stm32_rtc_pinctrl_pins);
+}
+
+static const char *stm32_rtc_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
+ unsigned int selector)
+{
+ return stm32_rtc_pinctrl_pins[selector].name;
+}
+
+static int stm32_rtc_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
+ unsigned int selector,
+ const unsigned int **pins,
+ unsigned int *num_pins)
+{
+ *pins = &stm32_rtc_pinctrl_pins[selector].number;
+ *num_pins = 1;
+ return 0;
+}
+
+static const struct pinctrl_ops stm32_rtc_pinctrl_ops = {
+ .dt_node_to_map = pinconf_generic_dt_node_to_map_all,
+ .dt_free_map = pinconf_generic_dt_free_map,
+ .get_groups_count = stm32_rtc_pinctrl_get_groups_count,
+ .get_group_name = stm32_rtc_pinctrl_get_group_name,
+ .get_group_pins = stm32_rtc_pinctrl_get_group_pins,
+};
+
+struct stm32_rtc_pinmux_func {
+ const char *name;
+ const char * const *groups;
+ const unsigned int num_groups;
+ int (*action)(struct pinctrl_dev *pctl_dev, unsigned int pin);
+};
+
+static const struct stm32_rtc_pinmux_func stm32_rtc_pinmux_functions[] = {
+};
+
+static int stm32_rtc_pinmux_get_functions_count(struct pinctrl_dev *pctldev)
+{
+ return ARRAY_SIZE(stm32_rtc_pinmux_functions);
+}
+
+static const char *stm32_rtc_pinmux_get_fname(struct pinctrl_dev *pctldev, unsigned int selector)
+{
+ return stm32_rtc_pinmux_functions[selector].name;
+}
+
+static int stm32_rtc_pinmux_get_groups(struct pinctrl_dev *pctldev, unsigned int selector,
+ const char * const **groups, unsigned int * const num_groups)
+{
+ *groups = stm32_rtc_pinmux_functions[selector].groups;
+ *num_groups = stm32_rtc_pinmux_functions[selector].num_groups;
+ return 0;
+}
+
+static int stm32_rtc_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int selector,
+ unsigned int group)
+{
+ struct stm32_rtc_pinmux_func selected_func = stm32_rtc_pinmux_functions[selector];
+ struct pinctrl_pin_desc pin = stm32_rtc_pinctrl_pins[group];
+
+ /* Call action */
+ if (selected_func.action)
+ return selected_func.action(pctldev, pin.number);
+
+ return -EINVAL;
+}
+
+static const struct pinmux_ops stm32_rtc_pinmux_ops = {
+ .get_functions_count = stm32_rtc_pinmux_get_functions_count,
+ .get_function_name = stm32_rtc_pinmux_get_fname,
+ .get_function_groups = stm32_rtc_pinmux_get_groups,
+ .set_mux = stm32_rtc_pinmux_set_mux,
+ .strict = true,
+};
+
+static struct pinctrl_desc stm32_rtc_pdesc = {
+ .name = DRIVER_NAME,
+ .pins = stm32_rtc_pinctrl_pins,
+ .npins = ARRAY_SIZE(stm32_rtc_pinctrl_pins),
+ .owner = THIS_MODULE,
+ .pctlops = &stm32_rtc_pinctrl_ops,
+ .pmxops = &stm32_rtc_pinmux_ops,
+};
+
static int stm32_rtc_enter_init_mode(struct stm32_rtc *rtc)
{
const struct stm32_rtc_registers *regs = &rtc->data->regs;
@@ -723,6 +834,7 @@ static int stm32_rtc_probe(struct platfo
{
struct stm32_rtc *rtc;
const struct stm32_rtc_registers *regs;
+ struct pinctrl_dev *pctl;
int ret;
rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
@@ -834,6 +946,14 @@ static int stm32_rtc_probe(struct platfo
goto err;
}
+ ret = devm_pinctrl_register_and_init(&pdev->dev, &stm32_rtc_pdesc, rtc, &pctl);
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret, "pinctrl register failed");
+
+ ret = pinctrl_enable(pctl);
+ if (ret)
+ return dev_err_probe(&pdev->dev, ret, "pinctrl enable failed");
+
/*
* If INITS flag is reset (calendar year field set to 0x00), calendar
* must be initialized

253
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@ -0,0 +1,253 @@
From 229476a4de2e237ebadddca8a82d20afa9298f71 Mon Sep 17 00:00:00 2001
From: Valentin Caron <valentin.caron@foss.st.com>
Date: Mon, 22 Jul 2024 18:00:21 +0200
Subject: [PATCH] rtc: stm32: add Low Speed Clock Output (LSCO) support
RTC is able to output on a pin the "LSE" internal clock.
STM32 RTC is now registered as a clock provider.
It provides rtc_lsco clock, that means RTC_LSCO is output on either
RTC_OUT1 or RTC_OUT2_RMP, depending on pinmux DT property.
The clock is marked as CLK_IGNORE_UNUSED and CLK_IS_CRITICAL because
RTC_LSCO can be early required by devices needed it to init.
Add LSCO in pinmux functions.
Add "stm32_rtc_clean_outs" to disable LSCO. As RTC is part of "backup"
power domain, it is not reset during shutdown or reboot. So force LSCO
disable at probe.
Co-developed-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Link: https://lore.kernel.org/r/20240722160022.454226-4-valentin.caron@foss.st.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
---
drivers/rtc/Kconfig | 1 +
drivers/rtc/rtc-stm32.c | 99 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 100 insertions(+)
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -1892,6 +1892,7 @@ config RTC_DRV_STM32
select PINMUX
select PINCONF
select GENERIC_PINCONF
+ depends on COMMON_CLK
help
If you say yes here you get support for the STM32 On-Chip
Real Time Clock.
--- a/drivers/rtc/rtc-stm32.c
+++ b/drivers/rtc/rtc-stm32.c
@@ -6,6 +6,7 @@
#include <linux/bcd.h>
#include <linux/clk.h>
+#include <linux/clk-provider.h>
#include <linux/errno.h>
#include <linux/iopoll.h>
#include <linux/ioport.h>
@@ -44,6 +45,10 @@
#define STM32_RTC_CR_FMT BIT(6)
#define STM32_RTC_CR_ALRAE BIT(8)
#define STM32_RTC_CR_ALRAIE BIT(12)
+#define STM32_RTC_CR_OSEL GENMASK(22, 21)
+#define STM32_RTC_CR_COE BIT(23)
+#define STM32_RTC_CR_TAMPOE BIT(26)
+#define STM32_RTC_CR_OUT2EN BIT(31)
/* STM32_RTC_ISR/STM32_RTC_ICSR bit fields */
#define STM32_RTC_ISR_ALRAWF BIT(0)
@@ -80,6 +85,12 @@
/* STM32_RTC_SR/_SCR bit fields */
#define STM32_RTC_SR_ALRA BIT(0)
+/* STM32_RTC_CFGR bit fields */
+#define STM32_RTC_CFGR_OUT2_RMP BIT(0)
+#define STM32_RTC_CFGR_LSCOEN GENMASK(2, 1)
+#define STM32_RTC_CFGR_LSCOEN_OUT1 1
+#define STM32_RTC_CFGR_LSCOEN_OUT2_RMP 2
+
/* STM32_RTC_VERR bit fields */
#define STM32_RTC_VERR_MINREV_SHIFT 0
#define STM32_RTC_VERR_MINREV GENMASK(3, 0)
@@ -117,6 +128,7 @@ struct stm32_rtc_registers {
u16 wpr;
u16 sr;
u16 scr;
+ u16 cfgr;
u16 verr;
};
@@ -131,6 +143,7 @@ struct stm32_rtc_data {
bool has_pclk;
bool need_dbp;
bool need_accuracy;
+ bool has_lsco;
};
struct stm32_rtc {
@@ -143,6 +156,7 @@ struct stm32_rtc {
struct clk *rtc_ck;
const struct stm32_rtc_data *data;
int irq_alarm;
+ struct clk *clk_lsco;
};
static void stm32_rtc_wpr_unlock(struct stm32_rtc *rtc)
@@ -209,7 +223,68 @@ struct stm32_rtc_pinmux_func {
int (*action)(struct pinctrl_dev *pctl_dev, unsigned int pin);
};
+static int stm32_rtc_pinmux_lsco_available(struct pinctrl_dev *pctldev, unsigned int pin)
+{
+ struct stm32_rtc *rtc = pinctrl_dev_get_drvdata(pctldev);
+ struct stm32_rtc_registers regs = rtc->data->regs;
+ unsigned int cr = readl_relaxed(rtc->base + regs.cr);
+ unsigned int cfgr = readl_relaxed(rtc->base + regs.cfgr);
+ unsigned int calib = STM32_RTC_CR_COE;
+ unsigned int tampalrm = STM32_RTC_CR_TAMPOE | STM32_RTC_CR_OSEL;
+
+ switch (pin) {
+ case OUT1:
+ if ((!(cr & STM32_RTC_CR_OUT2EN) &&
+ ((cr & calib) || cr & tampalrm)) ||
+ ((cr & calib) && (cr & tampalrm)))
+ return -EBUSY;
+ break;
+ case OUT2_RMP:
+ if ((cr & STM32_RTC_CR_OUT2EN) &&
+ (cfgr & STM32_RTC_CFGR_OUT2_RMP) &&
+ ((cr & calib) || (cr & tampalrm)))
+ return -EBUSY;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ if (clk_get_rate(rtc->rtc_ck) != 32768)
+ return -ERANGE;
+
+ return 0;
+}
+
+static int stm32_rtc_pinmux_action_lsco(struct pinctrl_dev *pctldev, unsigned int pin)
+{
+ struct stm32_rtc *rtc = pinctrl_dev_get_drvdata(pctldev);
+ struct stm32_rtc_registers regs = rtc->data->regs;
+ struct device *dev = rtc->rtc_dev->dev.parent;
+ u8 lscoen;
+ int ret;
+
+ if (!rtc->data->has_lsco)
+ return -EPERM;
+
+ ret = stm32_rtc_pinmux_lsco_available(pctldev, pin);
+ if (ret)
+ return ret;
+
+ lscoen = (pin == OUT1) ? STM32_RTC_CFGR_LSCOEN_OUT1 : STM32_RTC_CFGR_LSCOEN_OUT2_RMP;
+
+ rtc->clk_lsco = clk_register_gate(dev, "rtc_lsco", __clk_get_name(rtc->rtc_ck),
+ CLK_IGNORE_UNUSED | CLK_IS_CRITICAL,
+ rtc->base + regs.cfgr, lscoen, 0, NULL);
+ if (IS_ERR(rtc->clk_lsco))
+ return PTR_ERR(rtc->clk_lsco);
+
+ of_clk_add_provider(dev->of_node, of_clk_src_simple_get, rtc->clk_lsco);
+
+ return 0;
+}
+
static const struct stm32_rtc_pinmux_func stm32_rtc_pinmux_functions[] = {
+ STM32_RTC_PINMUX("lsco", &stm32_rtc_pinmux_action_lsco, "out1", "out2_rmp"),
};
static int stm32_rtc_pinmux_get_functions_count(struct pinctrl_dev *pctldev)
@@ -664,6 +739,7 @@ static const struct stm32_rtc_data stm32
.has_pclk = false,
.need_dbp = true,
.need_accuracy = false,
+ .has_lsco = false,
.regs = {
.tr = 0x00,
.dr = 0x04,
@@ -674,6 +750,7 @@ static const struct stm32_rtc_data stm32
.wpr = 0x24,
.sr = 0x0C, /* set to ISR offset to ease alarm management */
.scr = UNDEF_REG,
+ .cfgr = UNDEF_REG,
.verr = UNDEF_REG,
},
.events = {
@@ -686,6 +763,7 @@ static const struct stm32_rtc_data stm32
.has_pclk = true,
.need_dbp = true,
.need_accuracy = false,
+ .has_lsco = false,
.regs = {
.tr = 0x00,
.dr = 0x04,
@@ -696,6 +774,7 @@ static const struct stm32_rtc_data stm32
.wpr = 0x24,
.sr = 0x0C, /* set to ISR offset to ease alarm management */
.scr = UNDEF_REG,
+ .cfgr = UNDEF_REG,
.verr = UNDEF_REG,
},
.events = {
@@ -717,6 +796,7 @@ static const struct stm32_rtc_data stm32
.has_pclk = true,
.need_dbp = false,
.need_accuracy = true,
+ .has_lsco = true,
.regs = {
.tr = 0x00,
.dr = 0x04,
@@ -727,6 +807,7 @@ static const struct stm32_rtc_data stm32
.wpr = 0x24,
.sr = 0x50,
.scr = 0x5C,
+ .cfgr = 0x60,
.verr = 0x3F4,
},
.events = {
@@ -743,6 +824,19 @@ static const struct of_device_id stm32_r
};
MODULE_DEVICE_TABLE(of, stm32_rtc_of_match);
+static void stm32_rtc_clean_outs(struct stm32_rtc *rtc)
+{
+ struct stm32_rtc_registers regs = rtc->data->regs;
+
+ if (regs.cfgr != UNDEF_REG) {
+ unsigned int cfgr = readl_relaxed(rtc->base + regs.cfgr);
+
+ cfgr &= ~STM32_RTC_CFGR_LSCOEN;
+ cfgr &= ~STM32_RTC_CFGR_OUT2_RMP;
+ writel_relaxed(cfgr, rtc->base + regs.cfgr);
+ }
+}
+
static int stm32_rtc_init(struct platform_device *pdev,
struct stm32_rtc *rtc)
{
@@ -946,6 +1040,8 @@ static int stm32_rtc_probe(struct platfo
goto err;
}
+ stm32_rtc_clean_outs(rtc);
+
ret = devm_pinctrl_register_and_init(&pdev->dev, &stm32_rtc_pdesc, rtc, &pctl);
if (ret)
return dev_err_probe(&pdev->dev, ret, "pinctrl register failed");
@@ -992,6 +1088,9 @@ static void stm32_rtc_remove(struct plat
const struct stm32_rtc_registers *regs = &rtc->data->regs;
unsigned int cr;
+ if (!IS_ERR_OR_NULL(rtc->clk_lsco))
+ clk_unregister_gate(rtc->clk_lsco);
+
/* Disable interrupts */
stm32_rtc_wpr_unlock(rtc);
cr = readl_relaxed(rtc->base + regs->cr);

31
target/linux/stm32/patches-6.6/032-ARM-dts-stm32-rtc-add-pin-to-provide-LSCO-on-stm32mp.patch Normal file
View File

@ -0,0 +1,31 @@
From 92483a156238078562d187f527de6b358cb53a08 Mon Sep 17 00:00:00 2001
From: Valentin Caron <valentin.caron@foss.st.com>
Date: Tue, 27 Aug 2024 16:04:48 +0200
Subject: [PATCH] ARM: dts: stm32: rtc, add pin to provide LSCO on
stm32mp13
Declare pin for LSCO in stm32-pinctrl provider node to reserve this pin
for RTC OUT2_RMP, in stm32mp13-pinctrl.dtsi.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
---
arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
--- a/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi
+++ b/arch/arm/boot/dts/st/stm32mp13-pinctrl.dtsi
@@ -212,6 +212,13 @@
};
};
+ /omit-if-no-ref/
+ rtc_rsvd_pins_a: rtc-rsvd-0 {
+ pins {
+ pinmux = <STM32_PINMUX('I', 1, ANALOG)>; /* RTC_OUT2_RMP */
+ };
+ };
+
sdmmc1_b4_pins_a: sdmmc1-b4-0 {
pins {
pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */

34
target/linux/stm32/patches-6.6/033-ARM-dts-stm32-rtc-add-LSCO-to-WLAN-BT-module-on-stm3.patch Normal file
View File

@ -0,0 +1,34 @@
From d6e424f926397e682fc44a952d5b3a1e34b2cd73 Mon Sep 17 00:00:00 2001
From: Valentin Caron <valentin.caron@foss.st.com>
Date: Tue, 27 Aug 2024 16:04:50 +0200
Subject: [PATCH] ARM: dts: stm32: rtc, add LSCO to WLAN/BT module on
stm32mp135f-dk
On stm32mp135f-dk board, WLAN/BT module LPO_IN pin is wired to
RTC OUT2_RMP pin.
Provide a pinctrl configuration to enable LSCO on OUT2_RMP.
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
---
arch/arm/boot/dts/st/stm32mp135f-dk.dts | 7 +++++++
1 file changed, 7 insertions(+)
--- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
@@ -184,7 +184,14 @@
};
&rtc {
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_rsvd_pins_a>;
status = "okay";
+
+ rtc_lsco_pins_a: rtc-lsco-0 {
+ pins = "out2_rmp";
+ function = "lsco";
+ };
};
&scmi_regu {

84
target/linux/stm32/patches-6.6/034-ARM-dts-stm32-add-support-of-WLAN-BT-on-stm32mp135f-.patch Normal file
View File

@ -0,0 +1,84 @@
From 6b44fdef4c7ad112e17d7cbd64d7d522a426d6e4 Mon Sep 17 00:00:00 2001
From: Christophe Roullier <christophe.roullier@foss.st.com>
Date: Tue, 27 Aug 2024 16:04:52 +0200
Subject: [PATCH] ARM: dts: stm32: add support of WLAN/BT on stm32mp135f-dk
Add support of WLAN/BT Murata Type 1DX module:
- usart2 is used for Bluetooth interface
- sdmmc2 is used for WLAN (sdio) interface
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
---
arch/arm/boot/dts/st/stm32mp135f-dk.dts | 45 +++++++++++++++++++++++++
1 file changed, 45 insertions(+)
--- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
@@ -67,6 +67,19 @@
default-state = "off";
};
};
+
+ v3v3_ao: v3v3-ao {
+ compatible = "regulator-fixed";
+ regulator-name = "v3v3_ao";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ };
+
+ wifi_pwrseq: wifi-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ reset-gpios = <&mcp23017 11 GPIO_ACTIVE_LOW>;
+ };
};
&adc_1 {
@@ -230,6 +243,30 @@
status = "okay";
};
+/* Wifi */
+&sdmmc2 {
+ pinctrl-names = "default", "opendrain", "sleep";
+ pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_clk_pins_a>;
+ pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_clk_pins_a>;
+ pinctrl-2 = <&sdmmc2_b4_sleep_pins_a>;
+ non-removable;
+ cap-sdio-irq;
+ st,neg-edge;
+ bus-width = <4>;
+ vmmc-supply = <&v3v3_ao>;
+ mmc-pwrseq = <&wifi_pwrseq>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ brcmf: bcrmf@1 {
+ reg = <1>;
+ compatible = "brcm,bcm4329-fmac";
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtc_lsco_pins_a>;
+ };
+};
+
&spi5 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&spi5_pins_a>;
@@ -332,6 +369,14 @@
pinctrl-2 = <&usart2_idle_pins_a>;
uart-has-rtscts;
status = "okay";
+
+ bluetooth {
+ shutdown-gpios = <&mcp23017 13 GPIO_ACTIVE_HIGH>;
+ compatible = "brcm,bcm43438-bt";
+ max-speed = <3000000>;
+ vbat-supply = <&v3v3_ao>;
+ vddio-supply = <&v3v3_ao>;
+ };
};
&usbh_ehci {

106
target/linux/stm32/patches-6.6/700-net-stmmac-dwmac-stm32-add-support-of-phy-supply-pro.patch Normal file
View File

@ -0,0 +1,106 @@
From 7bfe3404a02923ca3858abf56b18a098b4be33b2 Mon Sep 17 00:00:00 2001
From: Christophe Roullier <christophe.roullier@st.com>
Date: Wed, 10 Nov 2021 17:39:40 +0100
Subject: [PATCH] net: ethernet: stmmac: stm32: support the phy-supply
regulator binding
Configure the phy regulator if defined by the "phy-supply" DT phandle.
Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
---
.../net/ethernet/stmicro/stmmac/dwmac-stm32.c | 51 ++++++++++++++++++-
1 file changed, 50 insertions(+), 1 deletion(-)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
+++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-stm32.c
@@ -14,6 +14,7 @@
#include <linux/of_net.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
#include <linux/pm_wakeirq.h>
#include <linux/regmap.h>
#include <linux/slab.h>
@@ -92,6 +93,7 @@ struct stm32_dwmac {
u32 mode_reg; /* MAC glue-logic mode register */
u32 mode_mask;
struct regmap *regmap;
+ struct regulator *regulator;
u32 speed;
const struct stm32_ops *ops;
struct device *dev;
@@ -374,6 +376,16 @@ static int stm32_dwmac_parse_data(struct
dev_dbg(dev, "Warning sysconfig register mask not set\n");
}
+ dwmac->regulator = devm_regulator_get_optional(dev, "phy");
+ if (IS_ERR(dwmac->regulator)) {
+ if (PTR_ERR(dwmac->regulator) == -EPROBE_DEFER) {
+ dev_dbg(dev, "phy regulator is not available yet, deferred probing\n");
+ return -EPROBE_DEFER;
+ }
+ dev_dbg(dev, "no regulator found\n");
+ dwmac->regulator = NULL;
+ }
+
return err;
}
@@ -439,6 +451,28 @@ static int stm32mp1_parse_data(struct st
return err;
}
+static int phy_power_on(struct stm32_dwmac *bsp_priv, bool enable)
+{
+ int ret;
+ struct device *dev = bsp_priv->dev;
+
+ if (!bsp_priv->regulator)
+ return 0;
+
+ if (enable) {
+ ret = regulator_enable(bsp_priv->regulator);
+ if (ret)
+ dev_err(dev, "fail to enable phy-supply\n");
+ } else {
+ ret = regulator_disable(bsp_priv->regulator);
+ if (ret)
+ dev_err(dev, "fail to disable phy-supply\n");
+ }
+
+ return 0;
+}
+
+
static int stm32_dwmac_probe(struct platform_device *pdev)
{
struct plat_stmmacenet_data *plat_dat;
@@ -480,12 +514,18 @@ static int stm32_dwmac_probe(struct plat
if (ret)
return ret;
- ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
+ ret = phy_power_on(plat_dat->bsp_priv, true);
if (ret)
goto err_clk_disable;
+ ret = stmmac_dvr_probe(&pdev->dev, plat_dat, &stmmac_res);
+ if (ret)
+ goto err_gmac_powerdown;
+
return 0;
+err_gmac_powerdown:
+ phy_power_on(plat_dat->bsp_priv, false);
err_clk_disable:
stm32_dwmac_clk_disable(dwmac, false);
@@ -506,6 +546,8 @@ static void stm32_dwmac_remove(struct pl
dev_pm_clear_wake_irq(&pdev->dev);
device_init_wakeup(&pdev->dev, false);
}
+
+ phy_power_on(priv->plat->bsp_priv, false);
}
static int stm32mp1_suspend(struct stm32_dwmac *dwmac)

53
target/linux/stm32/patches-6.6/900-ARM-dts-stm32-add-ethernet2-for-STM32MP135F-DK-board.patch Normal file
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@ -0,0 +1,53 @@
From 63c84f846ec5b794a6c90a1c5813cdb0ae75daf6 Mon Sep 17 00:00:00 2001
From: Thomas Richard <thomas.richard@bootlin.com>
Date: Thu, 26 Sep 2024 16:48:52 +0200
Subject: [PATCH] ARM: dts: stm32: add ethernet2 for STM32MP135F-DK board
This patch is based on the stm32mp135f-dk devicetree from 6.6 ST kernel.
Signed-off-by: Thomas Richard <thomas.richard@bootlin.com>
---
arch/arm/boot/dts/st/stm32mp135f-dk.dts | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
--- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
@@ -20,6 +20,7 @@
aliases {
ethernet0 = &ethernet1;
+ ethernet1 = &ethernet2;
serial0 = &uart4;
serial1 = &usart1;
serial2 = &uart8;
@@ -129,6 +130,30 @@
};
};
+&ethernet2 {
+ status = "okay";
+ pinctrl-0 = <&eth2_rmii_pins_a>;
+ pinctrl-1 = <&eth2_rmii_sleep_pins_a>;
+ pinctrl-names = "default", "sleep";
+ phy-mode = "rmii";
+ phy-handle = <&phy0_eth2>;
+ st,ext-phyclk;
+ phy-supply = <&scmi_v3v3_sw>;
+
+ mdio1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy0_eth2: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0007.c131";
+ reset-gpios = <&mcp23017 10 GPIO_ACTIVE_LOW>;
+ reg = <0>;
+ };
+ };
+};
+
+
+
&i2c1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c1_pins_a>;

485
target/linux/stm32/stm32mp1/config-6.6 Normal file
View File

@ -0,0 +1,485 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_FORCE_MAX_ORDER=12
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_V6_V7=y
CONFIG_ARCH_MULTI_V7=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_STM32=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
CONFIG_ARM_CPU_SUSPEND=y
CONFIG_ARM_ERRATA_430973=y
CONFIG_ARM_ERRATA_643719=y
CONFIG_ARM_ERRATA_720789=y
CONFIG_ARM_ERRATA_754322=y
CONFIG_ARM_ERRATA_754327=y
CONFIG_ARM_ERRATA_764369=y
CONFIG_ARM_ERRATA_775420=y
CONFIG_ARM_ERRATA_798181=y
CONFIG_ARM_ERRATA_814220=y
CONFIG_ARM_GIC=y
CONFIG_ARM_HAS_GROUP_RELOCS=y
# CONFIG_ARM_HIGHBANK_CPUIDLE is not set
CONFIG_ARM_L1_CACHE_SHIFT=6
CONFIG_ARM_L1_CACHE_SHIFT_6=y
CONFIG_ARM_PATCH_IDIV=y
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARM_PL172_MPMC is not set
CONFIG_ARM_PSCI=y
CONFIG_ARM_PSCI_CPUIDLE=y
CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y
CONFIG_ARM_PSCI_FW=y
CONFIG_ARM_SCMI_CPUFREQ=y
CONFIG_ARM_SCMI_HAVE_MSG=y
CONFIG_ARM_SCMI_HAVE_SHMEM=y
CONFIG_ARM_SCMI_HAVE_TRANSPORT=y
# CONFIG_ARM_SCMI_POWER_CONTROL is not set
CONFIG_ARM_SCMI_POWER_DOMAIN=y
CONFIG_ARM_SCMI_PROTOCOL=y
# CONFIG_ARM_SCMI_RAW_MODE_SUPPORT is not set
CONFIG_ARM_SCMI_TRANSPORT_OPTEE=y
CONFIG_ARM_SCMI_TRANSPORT_SMC=y
# CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE is not set
CONFIG_ARM_SMCCC_SOC_ID=y
CONFIG_ARM_SMC_WATCHDOG=y
# CONFIG_ARM_SMMU is not set
CONFIG_ARM_THUMB=y
CONFIG_ARM_THUMBEE=y
CONFIG_ARM_UNWIND=y
CONFIG_ARM_VIRT_EXT=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
# CONFIG_BLK_DEV_INITRD is not set
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_PM=y
CONFIG_BOUNCE=y
CONFIG_BUFFER_HEAD=y
# CONFIG_CACHE_L2X0 is not set
CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_CHR_DEV_SG=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLKSRC_STM32=y
CONFIG_CLK_ICST=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMA=y
CONFIG_CMA_ALIGNMENT=8
CONFIG_CMA_AREAS=7
# CONFIG_CMA_DEBUG is not set
# CONFIG_CMA_DEBUGFS is not set
CONFIG_CMA_SIZE_MBYTES=64
# CONFIG_CMA_SIZE_SEL_MAX is not set
CONFIG_CMA_SIZE_SEL_MBYTES=y
# CONFIG_CMA_SIZE_SEL_MIN is not set
# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set
# CONFIG_CMA_SYSFS is not set
CONFIG_CMDLINE_PARTITION=y
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_SCMI=y
CONFIG_COMMON_CLK_STM32MP135=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CONTIG_ALLOC=y
CONFIG_COREDUMP=y
CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
CONFIG_CPUFREQ_DT=y
CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_32v7=y
CONFIG_CPU_ABRT_EV7=y
CONFIG_CPU_CACHE_V7=y
CONFIG_CPU_CACHE_VIPT=y
CONFIG_CPU_COPY_V6=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_HAS_ASID=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
CONFIG_CPU_ISOLATION=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_PABRT_V7=y
CONFIG_CPU_PM=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_SPECTRE=y
CONFIG_CPU_THUMB_CAPABLE=y
CONFIG_CPU_TLB_V7=y
CONFIG_CPU_V7=y
CONFIG_CRC16=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CURRENT_POINTER_IN_TPIDRURO=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_ALIGN_RODATA=y
CONFIG_DEBUG_INFO=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
CONFIG_DEVFREQ_GOV_PASSIVE=y
# CONFIG_DEVFREQ_GOV_PERFORMANCE is not set
# CONFIG_DEVFREQ_GOV_POWERSAVE is not set
CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y
# CONFIG_DEVFREQ_GOV_USERSPACE is not set
CONFIG_DMADEVICES=y
CONFIG_DMA_CMA=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_OF=y
CONFIG_DMA_OPS=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DNOTIFY=y
CONFIG_DTC=y
CONFIG_DT_IDLE_GENPD=y
CONFIG_DT_IDLE_STATES=y
CONFIG_DUMMY_CONSOLE=y
CONFIG_DWMAC_DWC_QOS_ETH=y
CONFIG_DWMAC_GENERIC=y
CONFIG_DWMAC_STM32=y
CONFIG_DW_DMAC=y
CONFIG_DW_DMAC_CORE=y
CONFIG_EDAC=y
CONFIG_EDAC_ATOMIC_SCRUB=y
# CONFIG_EDAC_DEBUG is not set
CONFIG_EDAC_LEGACY_SYSFS=y
CONFIG_EDAC_SUPPORT=y
CONFIG_ELF_CORE=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_EXT4_FS=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FREEZER=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FWNODE_MDIO=y
CONFIG_FW_CACHE=y
# CONFIG_FW_LOADER_USER_HELPER is not set
CONFIG_GCC10_NO_ARRAY_BOUNDS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ARCH_TOPOLOGY=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_VDSO_32=y
CONFIG_GLOB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GPIO_SYSCON=y
# CONFIG_GPIO_SYSFS is not set
CONFIG_HARDEN_BRANCH_PREDICTOR=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAVE_SMP=y
CONFIG_HIGHMEM=y
CONFIG_HIGHPTE=y
CONFIG_HOTPLUG_CORE_SYNC=y
CONFIG_HOTPLUG_CORE_SYNC_DEAD=y
CONFIG_HOTPLUG_CPU=y
CONFIG_HW_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_OPTEE=y
# CONFIG_HW_RANDOM_STM32 is not set
CONFIG_HZ_FIXED=0
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_DEMUX_PINCTRL=y
CONFIG_I2C_HELPER_AUTO=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_GPIO=y
CONFIG_I2C_MUX_PCA954x=y
CONFIG_I2C_MUX_PINCTRL=y
CONFIG_I2C_SLAVE=y
# CONFIG_I2C_SLAVE_TESTUNIT is not set
CONFIG_I2C_SMBUS=y
# CONFIG_I2C_STM32F4 is not set
CONFIG_I2C_STM32F7=y
CONFIG_INPUT=y
# CONFIG_IOMMUFD is not set
# CONFIG_IOMMU_DEBUGFS is not set
CONFIG_IOMMU_IO_PGTABLE=y
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
CONFIG_IOMMU_IO_PGTABLE_LPAE=y
# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set
CONFIG_IOMMU_SUPPORT=y
CONFIG_IRQCHIP=y
CONFIG_IRQSTACKS=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_JBD2=y
CONFIG_KERNEL_GZIP=y
# CONFIG_KERNEL_XZ is not set
CONFIG_KMAP_LOCAL=y
CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y
# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set
# CONFIG_LEDS_CLASS_MULTICOLOR is not set
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_TRIGGER_CPU=y
CONFIG_LEDS_TRIGGER_ONESHOT=y
CONFIG_LEDS_TRIGGER_TRANSIENT=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LOG_BUF_SHIFT=16
# CONFIG_LRU_GEN is not set
CONFIG_LZO_DECOMPRESS=y
CONFIG_MACH_STM32MP13=y
# CONFIG_MACH_STM32MP157 is not set
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_SERIAL=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
# CONFIG_MDIO_GPIO is not set
CONFIG_MEMORY=y
CONFIG_MEMORY_ISOLATION=y
# CONFIG_MFD_STM32_LPTIMER is not set
# CONFIG_MFD_STM32_TIMERS is not set
CONFIG_MFD_SYSCON=y
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
CONFIG_MMC_ARMMMCI=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=16
CONFIG_MMC_STM32_SDMMC=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SRCU_NMI_SAFE=y
CONFIG_NEON=y
CONFIG_NET_EGRESS=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_INGRESS=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=2
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_DYNAMIC=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_OVERLAY=y
CONFIG_OF_RESOLVE=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_OPTEE=y
CONFIG_PADATA=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PAGE_POOL=y
CONFIG_PAGE_POOL_STATS=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
# CONFIG_PANIC_ON_OOPS is not set
CONFIG_PANIC_ON_OOPS_VALUE=0
CONFIG_PANIC_TIMEOUT=0
CONFIG_PCPU_DEV_REFCNT=y
CONFIG_PCS_XPCS=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
# CONFIG_PHY_STM32_USBPHYC is not set
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MCP23S08=y
CONFIG_PINCTRL_MCP23S08_I2C=y
CONFIG_PINCTRL_STM32=y
CONFIG_PINCTRL_STM32MP135=y
# CONFIG_PL353_SMC is not set
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_PM_DEVFREQ=y
CONFIG_PM_DEVFREQ_EVENT=y
CONFIG_PM_GENERIC_DOMAINS=y
CONFIG_PM_GENERIC_DOMAINS_OF=y
CONFIG_PM_GENERIC_DOMAINS_SLEEP=y
CONFIG_PM_OPP=y
CONFIG_PM_SLEEP=y
CONFIG_PM_SLEEP_SMP=y
CONFIG_POSIX_MQUEUE=y
CONFIG_POSIX_MQUEUE_SYSCTL=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO=y
CONFIG_POWER_RESET_GPIO_RESTART=y
CONFIG_POWER_RESET_SYSCON=y
CONFIG_POWER_RESET_SYSCON_POWEROFF=y
CONFIG_POWER_SUPPLY=y
CONFIG_PPS=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PRINTK_TIME=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RAS=y
CONFIG_RATIONAL=y
# CONFIG_RAVE_SP_CORE is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_ARM_SCMI=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
# CONFIG_REGULATOR_STM32_BOOSTER is not set
# CONFIG_REGULATOR_STM32_PWR is not set
# CONFIG_REGULATOR_STM32_VREFBUF is not set
CONFIG_RESET_CONTROLLER=y
CONFIG_RESET_SCMI=y
CONFIG_RESET_SIMPLE=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_RTC_CLASS=y
# CONFIG_RTC_DRV_CMOS is not set
# CONFIG_RTC_DRV_OPTEE is not set
CONFIG_RTC_DRV_STM32=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_DEV_BUS=y
CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_STM32=y
CONFIG_SERIAL_STM32_CONSOLE=y
CONFIG_SERIO=y
CONFIG_SERIO_LIBPS2=y
CONFIG_SERIO_SERPORT=y
CONFIG_SGL_ALLOC=y
CONFIG_SG_POOL=y
CONFIG_SMP=y
CONFIG_SMP_ON_UP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SOC_BUS=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSE_IRQ=y
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
# CONFIG_SQUASHFS_EMBEDDED is not set
CONFIG_SQUASHFS_FILE_CACHE=y
# CONFIG_SQUASHFS_FILE_DIRECT is not set
CONFIG_SQUASHFS_LZO=y
CONFIG_SQUASHFS_ZLIB=y
CONFIG_STM32_DMA=y
CONFIG_STM32_DMAMUX=y
CONFIG_STM32_EXTI=y
# CONFIG_STM32_FMC2_EBI is not set
CONFIG_STM32_MDMA=y
CONFIG_STM32_WATCHDOG=y
CONFIG_STMMAC_ETH=y
CONFIG_STMMAC_PLATFORM=y
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_SWPHY=y
CONFIG_SWP_EMULATE=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_TEE=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_TRUSTED_FOUNDATIONS=y
# CONFIG_UCLAMP_TASK is not set
# CONFIG_UEVENT_HELPER is not set
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_UNWINDER_ARM=y
CONFIG_USB_SUPPORT=y
CONFIG_USELIB=y
CONFIG_USE_OF=y
CONFIG_VFP=y
CONFIG_VFPv3=y
CONFIG_VMAP_STACK=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_VT_CONSOLE_SLEEP=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
CONFIG_XPS=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y

12
target/linux/stm32/stm32mp1/target.mk Normal file
View File

@ -0,0 +1,12 @@
# SPDX-License-Identifier: GPL-2.0-only
#
# Copyright (C) 2024 Bootlin
#
BOARDNAME:=STM32MP1 boards
ARCH:=arm
CPU_TYPE:=cortex-a7
CPU_SUBTYPE=neon-vfpv4
FEATURES+=fpu
KERNEL_IMAGES:=zImage

2
target/linux/x86/base-files/etc/board.d/02_network
View File

@ -58,7 +58,7 @@ gowin-solution-co-ltd-gw-mb-u01)
ucidef_set_network_device_path_port "sfp2" "$sfp_device/$sfp_port" "0"
fi
ucidef_set_interface_lan "eth1 eth2 eth3 eth4"
ucidef_set_interfaces_lan_wan "eth1 eth2 eth3 eth4 poe" "sfp1 sfp2"
;;
pc-engines-apu1|pc-engines-apu2|pc-engines-apu3)
ucidef_set_interfaces_lan_wan "eth1 eth2" "eth0"