Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2024-04-22 15:04:31 +08:00
commit 252d16387c
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
120 changed files with 3552 additions and 1937 deletions

View File

@ -2,6 +2,8 @@ name: Bug report
description: Create a bug report to help us improve description: Create a bug report to help us improve
labels: labels:
- bug - bug
- bug-report
- to-triage
body: body:
- type: textarea - type: textarea
id: description id: description

View File

@ -1,2 +1,2 @@
LINUX_VERSION-5.15 = .153 LINUX_VERSION-5.15 = .155
LINUX_KERNEL_HASH-5.15.153 = d7ddb1e144a88773b56a5b4a71baea0b241f3996d446be45290537c6997c84bc LINUX_KERNEL_HASH-5.15.155 = c85859b86d2e6d1fc91ca1be8b44f24a9b5bb9f86869b04a8665a3a6559126e4

View File

@ -1,11 +1,7 @@
[ "$(uci -q get network.globals.ula_prefix)" != "auto" ] && exit 0 [ "$(uci -q get network.globals.ula_prefix)" != "auto" ] && exit 0
r1=$(dd if=/dev/urandom bs=1 count=1 |hexdump -e '1/1 "%02x"')
r2=$(dd if=/dev/urandom bs=2 count=1 |hexdump -e '2/1 "%02x"')
r3=$(dd if=/dev/urandom bs=2 count=1 |hexdump -e '2/1 "%02x"')
uci -q batch <<-EOF >/dev/null uci -q batch <<-EOF >/dev/null
set network.globals.ula_prefix=fd$r1:$r2:$r3::/48 set network.globals.ula_prefix="$(hexdump -vn 5 -e '"fd" 1/1 "%02x:" 2/2 "%x:"' /dev/urandom):/48"
commit network commit network
EOF EOF

View File

@ -8,10 +8,10 @@
include $(TOPDIR)/rules.mk include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk include $(INCLUDE_DIR)/kernel.mk
PKG_VERSION:=2023.07.02 PKG_VERSION:=2024.04
PKG_RELEASE:=1 PKG_RELEASE:=1
PKG_HASH:=6b6a48581c14abb0f95bd87c1af4d740922406d7b801002a9f94727fdde021d5 PKG_HASH:=18a853fe39fad7ad03a90cc2d4275aeaed6da69735defac3492b80508843dd4a
include $(INCLUDE_DIR)/u-boot.mk include $(INCLUDE_DIR)/u-boot.mk
include $(INCLUDE_DIR)/package.mk include $(INCLUDE_DIR)/package.mk

View File

@ -1,54 +0,0 @@
From 8621f6d22a9589651c6f25742294dd19a26db430 Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr>
Date: Thu, 3 Aug 2023 13:34:13 +0200
Subject: [PATCH 1/3] arm: mvebu: Espressobin: move FDT fixup into a separate
function
Currently, Esspresobin FDT is being fixed up directly in ft_board_setup()
which makes it hard to add support for any other board to be fixed up.
So, lets just move the FDT fixup code to a separate function and call it
if compatible matches, there should be no functional change.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
board/Marvell/mvebu_armada-37xx/board.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -359,18 +359,14 @@ int last_stage_init(void)
#endif
#ifdef CONFIG_OF_BOARD_SETUP
-int ft_board_setup(void *blob, struct bd_info *bd)
+static int espressobin_fdt_setup(void *blob)
{
-#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
int ret;
int spi_off;
int parts_off;
int part_off;
/* Fill SPI MTD partitions for Linux kernel on Espressobin */
- if (!of_machine_is_compatible("globalscale,espressobin"))
- return 0;
-
spi_off = fdt_node_offset_by_compatible(blob, -1, "jedec,spi-nor");
if (spi_off < 0)
return 0;
@@ -455,6 +451,14 @@ int ft_board_setup(void *blob, struct bd
return 0;
}
+ return 0;
+}
+
+int ft_board_setup(void *blob, struct bd_info *bd)
+{
+#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
+ if (of_machine_is_compatible("globalscale,espressobin"))
+ return espressobin_fdt_setup(blob);
#endif
return 0;
}

View File

@ -1,53 +0,0 @@
From 3f8c18894a50fd45b81a807f217893f289500bc6 Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr>
Date: Thu, 3 Aug 2023 14:24:31 +0200
Subject: [PATCH 2/3] arm: mvebu: Espressobin: move network setup into a
separate function
Currently, Esspresobin switch is being setup directly in last_stage_init()
which makes it hard to add support for any other board to be setup.
So, lets just move the switch setup code to a separate function and call it
if compatible matches, there should be no functional change.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
board/Marvell/mvebu_armada-37xx/board.c | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -300,15 +300,11 @@ static int mii_multi_chip_mode_write(str
return 0;
}
-/* Bring-up board-specific network stuff */
-int last_stage_init(void)
+static int espressobin_last_stage_init(void)
{
struct udevice *bus;
ofnode node;
- if (!of_machine_is_compatible("globalscale,espressobin"))
- return 0;
-
node = ofnode_by_compatible(ofnode_null(), "marvell,orion-mdio");
if (!ofnode_valid(node) ||
uclass_get_device_by_ofnode(UCLASS_MDIO, node, &bus) ||
@@ -356,6 +352,16 @@ int last_stage_init(void)
return 0;
}
+
+/* Bring-up board-specific network stuff */
+int last_stage_init(void)
+{
+
+ if (of_machine_is_compatible("globalscale,espressobin"))
+ return espressobin_last_stage_init();
+
+ return 0;
+}
#endif
#ifdef CONFIG_OF_BOARD_SETUP

View File

@ -1,297 +0,0 @@
From 83c00ee665b8dde813458b2b07cf97ce8409248d Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr>
Date: Fri, 4 Aug 2023 22:39:06 +0200
Subject: [PATCH 3/3] arm: mvebu: eDPU: support new board revision
There is a new eDPU revision that uses Marvell 88E6361 switch onboard.
We can rely on detecting the switch to enable and fixup the Linux DTS
so a single DTS can be used.
There is currently no support for the 88E6361 switch and thus no working
networking in U-Boot, so we disable both ports.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
arch/arm/dts/armada-3720-eDPU-u-boot.dtsi | 13 ++-
arch/arm/dts/armada-3720-eDPU.dts | 47 ++++++++
board/Marvell/mvebu_armada-37xx/board.c | 125 ++++++++++++++++++++++
configs/eDPU_defconfig | 2 +
4 files changed, 182 insertions(+), 5 deletions(-)
--- a/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
+++ b/arch/arm/dts/armada-3720-eDPU-u-boot.dtsi
@@ -32,14 +32,17 @@
bootph-all;
};
-&eth0 {
- /* G.hn does not work without additional configuration */
- status = "disabled";
-};
-
&eth1 {
fixed-link {
speed = <1000>;
full-duplex;
};
};
+
+/*
+ * eDPU v2 has a MV88E6361 switch on the MDIO bus and U-boot is used
+ * to patch the Linux DTS if its found so enable MDIO by default.
+ */
+&mdio {
+ status = "okay";
+};
--- a/arch/arm/dts/armada-3720-eDPU.dts
+++ b/arch/arm/dts/armada-3720-eDPU.dts
@@ -12,3 +12,50 @@
&eth0 {
phy-mode = "2500base-x";
};
+
+/*
+ * External MV88E6361 switch is only available on v2 of the board.
+ * U-Boot will enable the MDIO bus and switch nodes.
+ */
+&mdio {
+ status = "disabled";
+ pinctrl-names = "default";
+ pinctrl-0 = <&smi_pins>;
+
+ /* Actual device is MV88E6361 */
+ switch: switch@0 {
+ compatible = "marvell,mv88e6190";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "cpu";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ ethernet = <&eth0>;
+ };
+
+ port@9 {
+ reg = <9>;
+ label = "downlink";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ };
+
+ port@a {
+ reg = <10>;
+ label = "uplink";
+ phy-mode = "2500base-x";
+ managed = "in-band-status";
+ sfp = <&sfp_eth1>;
+ };
+ };
+ };
+};
--- a/board/Marvell/mvebu_armada-37xx/board.c
+++ b/board/Marvell/mvebu_armada-37xx/board.c
@@ -13,6 +13,7 @@
#include <mmc.h>
#include <miiphy.h>
#include <phy.h>
+#include <fdt_support.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
@@ -49,6 +50,7 @@ DECLARE_GLOBAL_DATA_PTR;
/* Single-chip mode */
/* Switch Port Registers */
#define MVEBU_SW_LINK_CTRL_REG (1)
+#define MVEBU_SW_PORT_SWITCH_ID (3)
#define MVEBU_SW_PORT_CTRL_REG (4)
#define MVEBU_SW_PORT_BASE_VLAN (6)
@@ -56,6 +58,8 @@ DECLARE_GLOBAL_DATA_PTR;
#define MVEBU_G2_SMI_PHY_CMD_REG (24)
#define MVEBU_G2_SMI_PHY_DATA_REG (25)
+#define SWITCH_88E6361_PRODUCT_NUMBER 0x2610
+
/*
* Memory Controller Registers
*
@@ -72,6 +76,27 @@ DECLARE_GLOBAL_DATA_PTR;
#define A3700_MC_CTRL2_SDRAM_TYPE_DDR3 2
#define A3700_MC_CTRL2_SDRAM_TYPE_DDR4 3
+static bool is_edpu_plus(void)
+{
+ struct udevice *bus;
+ ofnode node;
+ int val;
+
+ node = ofnode_by_compatible(ofnode_null(), "marvell,orion-mdio");
+ if (!ofnode_valid(node) ||
+ uclass_get_device_by_ofnode(UCLASS_MDIO, node, &bus) ||
+ device_probe(bus)) {
+ printf("Cannot find MDIO bus\n");
+ return -ENODEV;
+ }
+
+ val = dm_mdio_read(bus, 0x0, MDIO_DEVAD_NONE, MVEBU_SW_PORT_SWITCH_ID);
+ if (val == SWITCH_88E6361_PRODUCT_NUMBER)
+ return true;
+ else
+ return false;
+}
+
int board_early_init_f(void)
{
return 0;
@@ -353,6 +378,41 @@ static int espressobin_last_stage_init(v
return 0;
}
+static int edpu_plus_last_stage_init(void)
+{
+ struct udevice *dev;
+ int ret;
+
+ if (is_edpu_plus()) {
+ ret = uclass_get_device_by_name(UCLASS_ETH,
+ "ethernet@40000",
+ &dev);
+ if (!ret) {
+ device_remove(dev, DM_REMOVE_NORMAL);
+ device_unbind(dev);
+ }
+
+ /* Currently no networking support on the eDPU+ board */
+ ret = uclass_get_device_by_name(UCLASS_ETH,
+ "ethernet@30000",
+ &dev);
+ if (!ret) {
+ device_remove(dev, DM_REMOVE_NORMAL);
+ device_unbind(dev);
+ }
+ } else {
+ ret = uclass_get_device_by_name(UCLASS_ETH,
+ "ethernet@30000",
+ &dev);
+ if (!ret) {
+ device_remove(dev, DM_REMOVE_NORMAL);
+ device_unbind(dev);
+ }
+ }
+
+ return 0;
+}
+
/* Bring-up board-specific network stuff */
int last_stage_init(void)
{
@@ -360,6 +420,9 @@ int last_stage_init(void)
if (of_machine_is_compatible("globalscale,espressobin"))
return espressobin_last_stage_init();
+ if (of_machine_is_compatible("methode,edpu"))
+ return edpu_plus_last_stage_init();
+
return 0;
}
#endif
@@ -460,12 +523,74 @@ static int espressobin_fdt_setup(void *b
return 0;
}
+static int edpu_plus_fdt_setup(void *blob)
+{
+ const char *ports[] = { "downlink", "uplink" };
+ uint8_t mac[ETH_ALEN];
+ const char *path;
+ int i, ret;
+
+ if (is_edpu_plus()) {
+ ret = fdt_set_status_by_compatible(blob,
+ "marvell,orion-mdio",
+ FDT_STATUS_OKAY);
+ if (ret)
+ printf("Failed to enable MDIO!\n");
+
+ ret = fdt_set_status_by_alias(blob,
+ "ethernet1",
+ FDT_STATUS_DISABLED);
+ if (ret)
+ printf("Failed to disable ethernet1!\n");
+
+ path = fdt_get_alias(blob, "ethernet0");
+ if (path)
+ do_fixup_by_path_string(blob, path, "phy-mode", "2500base-x");
+ else
+ printf("Failed to update ethernet0 phy-mode to 2500base-x!\n");
+
+ ret = fdt_set_status_by_compatible(blob,
+ "marvell,mv88e6190",
+ FDT_STATUS_OKAY);
+ if (ret)
+ printf("Failed to enable MV88E6361!\n");
+
+ /*
+ * MAC-s for Uplink and Downlink ports are stored under
+ * non standard variable names, so lets manually fixup the
+ * switch port nodes to have the desired MAC-s.
+ */
+ for (i = 0; i < 2; i++) {
+ if (eth_env_get_enetaddr(ports[i], mac)) {
+ do_fixup_by_prop(blob,
+ "label",
+ ports[i],
+ strlen(ports[i]) + 1,
+ "mac-address",
+ mac, ARP_HLEN, 1);
+
+ do_fixup_by_prop(blob,
+ "label",
+ ports[i],
+ strlen(ports[i]) + 1,
+ "local-mac-address",
+ mac, ARP_HLEN, 1);
+ }
+ }
+ }
+
+ return 0;
+}
+
int ft_board_setup(void *blob, struct bd_info *bd)
{
#ifdef CONFIG_ENV_IS_IN_SPI_FLASH
if (of_machine_is_compatible("globalscale,espressobin"))
return espressobin_fdt_setup(blob);
#endif
+ if (of_machine_is_compatible("methode,edpu"))
+ return edpu_plus_fdt_setup(blob);
+
return 0;
}
#endif
--- a/configs/eDPU_defconfig
+++ b/configs/eDPU_defconfig
@@ -17,12 +17,14 @@ CONFIG_DEBUG_UART=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
CONFIG_FIT=y
CONFIG_FIT_VERBOSE=y
+CONFIG_OF_BOARD_SETUP=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
CONFIG_BOARD_EARLY_INIT_F=y
+CONFIG_LAST_STAGE_INIT=y
CONFIG_SYS_MAXARGS=32
CONFIG_SYS_PBSIZE=1048
# CONFIG_CMD_ELF is not set

View File

@ -1,85 +0,0 @@
From 1dbc6d3739869af38e6157cd8b9bc4314ca3c9fe Mon Sep 17 00:00:00 2001
From: Josua Mayer <josua@solid-run.com>
Date: Mon, 18 Jul 2022 20:04:54 +0300
Subject: [PATCH 1/2] arm: mvebu: clearfog: read number of ddr channels from
tlv data
Extend the existing tlv vendor extension used for ram size by one byte to
also store the number of ddr channels.
The length of the tlv entry can indicate whether the new information is
present. If not default to single channel.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
board/solidrun/clearfog/clearfog.c | 14 +++++++++++++-
board/solidrun/common/tlv_data.c | 7 ++++++-
board/solidrun/common/tlv_data.h | 1 +
3 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
index 6edb4221551..4f4532b537e 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -36,7 +36,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define BOARD_GPP_POL_LOW 0x0
#define BOARD_GPP_POL_MID 0x0
-static struct tlv_data cf_tlv_data;
+static struct tlv_data cf_tlv_data = { 0 };
static void cf_read_tlv_data(void)
{
@@ -168,6 +168,18 @@ struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)
break;
}
+ switch (cf_tlv_data.ram_channels) {
+ default:
+ case 1:
+ for (uint8_t i = 0; i < 5; i++)
+ ifp->as_bus_params[i].cs_bitmask = 0x1;
+ break;
+ case 2:
+ for (uint8_t i = 0; i < 5; i++)
+ ifp->as_bus_params[i].cs_bitmask = 0x3;
+ break;
+ }
+
/* Return the board topology as defined in the board code */
return &board_topology_map;
}
diff --git a/board/solidrun/common/tlv_data.c b/board/solidrun/common/tlv_data.c
index 11d6e4a1380..cf5824886c3 100644
--- a/board/solidrun/common/tlv_data.c
+++ b/board/solidrun/common/tlv_data.c
@@ -45,9 +45,14 @@ static void parse_tlv_vendor_ext(struct tlvinfo_tlv *tlv_entry,
if (val[4] != SR_TLV_CODE_RAM_SIZE)
return;
- if (tlv_entry->length != 6)
+ if (tlv_entry->length < 6)
return;
td->ram_size = val[5];
+
+ /* extension with additional data field for number of ddr channels */
+ if (tlv_entry->length >= 7) {
+ td->ram_channels = val[6];
+ }
}
static void parse_tlv_data(u8 *eeprom, struct tlvinfo_header *hdr,
diff --git a/board/solidrun/common/tlv_data.h b/board/solidrun/common/tlv_data.h
index a1432e4b8e1..be3f782ac4a 100644
--- a/board/solidrun/common/tlv_data.h
+++ b/board/solidrun/common/tlv_data.h
@@ -10,6 +10,7 @@ struct tlv_data {
/* Store product name of both SOM and carrier */
char tlv_product_name[2][32];
unsigned int ram_size;
+ uint8_t ram_channels;
};
void read_tlv_data(struct tlv_data *td);
--
2.35.3

View File

@ -1,31 +0,0 @@
From b1b4941c2e3e16a21dc15604220725cf7f2de7c5 Mon Sep 17 00:00:00 2001
From: Josua Mayer <josua@solid-run.com>
Date: Wed, 20 Jul 2022 19:10:56 +0300
Subject: [PATCH 2/2] arm: mvebu: clearfog: support 512MB memory size from tlv
eeprom
Handle 2GBit memory size value "2" from tlv eeprom on ddr
initialisation, to support SoMs with 512MB ddr memory.
Signed-off-by: Josua Mayer <josua@solid-run.com>
---
board/solidrun/clearfog/clearfog.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/board/solidrun/clearfog/clearfog.c b/board/solidrun/clearfog/clearfog.c
index 4f4532b537e..6fa2fe5fe3e 100644
--- a/board/solidrun/clearfog/clearfog.c
+++ b/board/solidrun/clearfog/clearfog.c
@@ -159,6 +159,9 @@ struct mv_ddr_topology_map *mv_ddr_topology_map_get(void)
cf_read_tlv_data();
switch (cf_tlv_data.ram_size) {
+ case 2:
+ ifp->memory_size = MV_DDR_DIE_CAP_2GBIT;
+ break;
case 4:
default:
ifp->memory_size = MV_DDR_DIE_CAP_4GBIT;
--
2.35.3

View File

@ -2,13 +2,13 @@ include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/version.mk include $(INCLUDE_DIR)/version.mk
PKG_NAME:=ipq-wifi PKG_NAME:=ipq-wifi
PKG_RELEASE:=2 PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware/qca-wireless.git PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware/qca-wireless.git
PKG_SOURCE_DATE:=2024-03-20 PKG_SOURCE_DATE:=2024-04-16
PKG_SOURCE_VERSION:=87717baa8a7c922942f4202a0ec3de3cb5643941 PKG_SOURCE_VERSION:=1d51799e6768a304da7840b8346e7487efd77f49
PKG_MIRROR_HASH:=a88124db0cd9a386d2cbd905e48408e7131f057240bcc7da93f7c5fc10ea4892 PKG_MIRROR_HASH:=9cf0917532283c1a1708643022a5ed1ec4af6bb9ebaff57fc2f0f2c229f2469e
PKG_FLAGS:=nonshared PKG_FLAGS:=nonshared
include $(INCLUDE_DIR)/package.mk include $(INCLUDE_DIR)/package.mk
@ -52,6 +52,7 @@ ALLWIFIBOARDS:= \
yyets_le1 \ yyets_le1 \
yuncore_ax880 \ yuncore_ax880 \
yuncore_fap650 \ yuncore_fap650 \
zbtlink_zbt-z800ax \
zte_mf269 \ zte_mf269 \
zte_mf287 \ zte_mf287 \
zte_mf287plus \ zte_mf287plus \
@ -170,6 +171,7 @@ $(eval $(call generate-ipq-wifi-package,xiaomi_ax9000,Xiaomi AX9000))
$(eval $(call generate-ipq-wifi-package,yyets_le1,YYeTs LE1)) $(eval $(call generate-ipq-wifi-package,yyets_le1,YYeTs LE1))
$(eval $(call generate-ipq-wifi-package,yuncore_ax880,Yuncore AX880)) $(eval $(call generate-ipq-wifi-package,yuncore_ax880,Yuncore AX880))
$(eval $(call generate-ipq-wifi-package,yuncore_fap650,Yuncore FAP650)) $(eval $(call generate-ipq-wifi-package,yuncore_fap650,Yuncore FAP650))
$(eval $(call generate-ipq-wifi-package,zbtlink_zbt-z800ax,Zbtlink ZBT-Z800AX))
$(eval $(call generate-ipq-wifi-package,zte_mf269,ZTE MF269)) $(eval $(call generate-ipq-wifi-package,zte_mf269,ZTE MF269))
$(eval $(call generate-ipq-wifi-package,zte_mf287,ZTE MF287)) $(eval $(call generate-ipq-wifi-package,zte_mf287,ZTE MF287))
$(eval $(call generate-ipq-wifi-package,zte_mf287plus,ZTE MF287Plus)) $(eval $(call generate-ipq-wifi-package,zte_mf287plus,ZTE MF287Plus))

View File

@ -1,26 +0,0 @@
From dd3b9c59cfa1e9e0b73a575f4646be905691eaef Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Sat, 16 Oct 2021 19:34:10 +0200
Subject: [PATCH 241/241] ath11k: Disable coldboot calibration for IPQ8074
There is a bug with the remoteproc reset after coldboot calibration,
so until that is resolved disabled it to allow using the radio.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
drivers/net/wireless/ath/ath11k/core.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/net/wireless/ath/ath11k/core.c
+++ b/drivers/net/wireless/ath/ath11k/core.c
@@ -86,8 +86,8 @@ static const struct ath11k_hw_params ath
.supports_shadow_regs = false,
.idle_ps = false,
.supports_sta_ps = false,
- .coldboot_cal_mm = true,
- .coldboot_cal_ftm = true,
+ .coldboot_cal_mm = false,
+ .coldboot_cal_ftm = false,
.cbcal_restart_fw = true,
.fw_mem_mode = 0,
.num_vdevs = 16 + 1,

View File

@ -1,7 +1,7 @@
include $(TOPDIR)/rules.mk include $(TOPDIR)/rules.mk
PKG_NAME:=qca-nss-dp PKG_NAME:=qca-nss-dp
PKG_RELEASE:=2 PKG_RELEASE:=3
PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/nss-dp.git PKG_SOURCE_URL:=https://git.codelinaro.org/clo/qsdk/oss/lklm/nss-dp.git
PKG_SOURCE_PROTO:=git PKG_SOURCE_PROTO:=git

View File

@ -0,0 +1,43 @@
From c318c90b824c59539bf2e33618e381293398616c Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Tue, 16 Apr 2024 15:02:49 +0200
Subject: [PATCH 1/6] edma_v1: rework hw_reset logic to permit rmmod and insmod
Rework hw_reset logic for edma v1 to permit rmmod and insmod by using
get_exclusive_released variant (assuming the reset control was released)
and manually acquire and release it.
This permits rmmod and insmod without triggering warning or receiving
-EBUSY errors.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
hal/dp_ops/edma_dp/edma_v1/edma_cfg.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
--- a/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_cfg.c
@@ -719,18 +719,22 @@ int edma_hw_reset(struct edma_hw *ehw)
struct reset_control *rst;
struct platform_device *pdev = ehw->pdev;
- rst = devm_reset_control_get(&pdev->dev, EDMA_HW_RESET_ID);
+ rst = devm_reset_control_get_exclusive_released(&pdev->dev, EDMA_HW_RESET_ID);
if (IS_ERR(rst)) {
pr_warn("DTS Node: %s does not exist\n", EDMA_HW_RESET_ID);
return -EINVAL;
}
+ reset_control_acquire(rst);
+
reset_control_assert(rst);
udelay(100);
reset_control_deassert(rst);
udelay(100);
+ reset_control_release(rst);
+
pr_info("EDMA HW Reset completed succesfully\n");
return 0;

View File

@ -0,0 +1,59 @@
From 079bfe441b274a8c06474be82e4ccc88599a5e0e Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Tue, 16 Apr 2024 16:08:46 +0200
Subject: [PATCH 2/6] nss_dp_switchdev: correctly unregister notifier on
dp_remove
Correctly unregister notifier on dp_remove to fix kernel panic on system
reboot.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
include/nss_dp_dev.h | 1 +
nss_dp_main.c | 4 ++++
nss_dp_switchdev.c | 13 +++++++++++++
3 files changed, 18 insertions(+)
--- a/include/nss_dp_dev.h
+++ b/include/nss_dp_dev.h
@@ -312,6 +312,7 @@ void nss_dp_set_ethtool_ops(struct net_d
*/
#ifdef CONFIG_NET_SWITCHDEV
void nss_dp_switchdev_setup(struct net_device *dev);
+void nss_dp_switchdev_remove(struct net_device *dev);
bool nss_dp_is_phy_dev(struct net_device *dev);
#endif
--- a/nss_dp_main.c
+++ b/nss_dp_main.c
@@ -913,6 +913,10 @@ static int nss_dp_remove(struct platform
if (!dp_priv)
continue;
+ #ifdef CONFIG_NET_SWITCHDEV
+ nss_dp_switchdev_remove(dp_priv->netdev);
+ #endif
+
dp_ops = dp_priv->data_plane_ops;
hal_ops = dp_priv->gmac_hal_ops;
--- a/nss_dp_switchdev.c
+++ b/nss_dp_switchdev.c
@@ -635,4 +635,17 @@ void nss_dp_switchdev_setup(struct net_d
switch_init_done = true;
}
+
+void nss_dp_switchdev_remove(struct net_device *dev)
+{
+ if (!switch_init_done)
+ return;
+
+ if (nss_dp_sw_ev_nb)
+ unregister_switchdev_notifier(nss_dp_sw_ev_nb);
+
+ unregister_switchdev_blocking_notifier(&nss_dp_switchdev_notifier);
+
+ switch_init_done = false;
+}
#endif

View File

@ -0,0 +1,35 @@
From ab7b1a361d51157118e1a61ce6530a59bcef4b61 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Tue, 16 Apr 2024 16:10:09 +0200
Subject: [PATCH 3/6] nss_dp_main: swap dp_exit function call
First unregister nss_dp platform devices then cleanup the HAL.
This is to fix kernel panic by cleaning data that needs to be used by
platform driver unregister functions.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
nss_dp_main.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/nss_dp_main.c
+++ b/nss_dp_main.c
@@ -1082,6 +1082,8 @@ int __init nss_dp_init(void)
*/
void __exit nss_dp_exit(void)
{
+ platform_driver_unregister(&nss_dp_drv);
+
/*
* TODO Move this to soc_ops
*/
@@ -1089,8 +1091,6 @@ void __exit nss_dp_exit(void)
nss_dp_hal_cleanup();
dp_global_ctx.common_init_done = false;
}
-
- platform_driver_unregister(&nss_dp_drv);
}
module_init(nss_dp_init);

View File

@ -0,0 +1,35 @@
From 33dd3aa6d0f9cd240d63f53a49157ae44ebccf87 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Tue, 16 Apr 2024 16:12:11 +0200
Subject: [PATCH 4/6] nss_dp_main: call unregister_netdev first in dp_remove
and carrifer_off
In dp_remove move unregister_netdev up before calling exit and deinit
and first call netif_carrier_off to stop any traffic from happening and
prevent kernel panics for napi in the middle of transfer.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
nss_dp_main.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
--- a/nss_dp_main.c
+++ b/nss_dp_main.c
@@ -920,6 +920,9 @@ static int nss_dp_remove(struct platform
dp_ops = dp_priv->data_plane_ops;
hal_ops = dp_priv->gmac_hal_ops;
+ netif_carrier_off(dp_priv->netdev);
+ unregister_netdev(dp_priv->netdev);
+
if (dp_priv->phydev)
phy_disconnect(dp_priv->phydev);
@@ -931,7 +934,6 @@ static int nss_dp_remove(struct platform
#endif
hal_ops->exit(dp_priv->gmac_hal_ctx);
dp_ops->deinit(dp_priv->dpc);
- unregister_netdev(dp_priv->netdev);
free_netdev(dp_priv->netdev);
dp_global_ctx.nss_dp[i] = NULL;
}

View File

@ -0,0 +1,26 @@
From 655b07b701271bc00952fe64aeb14f993a48a50e Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Tue, 16 Apr 2024 16:17:36 +0200
Subject: [PATCH 5/6] nss_dp_main: use phy_detach instead of disconnect in
dp_remove
Use phy_detach instead of disconnect in dp_remove. On Module remove, phy
are already disconnected but they need to be detached to be correctly
reattached later with an insmod.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
nss_dp_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/nss_dp_main.c
+++ b/nss_dp_main.c
@@ -924,7 +924,7 @@ static int nss_dp_remove(struct platform
unregister_netdev(dp_priv->netdev);
if (dp_priv->phydev)
- phy_disconnect(dp_priv->phydev);
+ phy_detach(dp_priv->phydev);
#if defined(NSS_DP_PPE_SUPPORT)
/*

View File

@ -0,0 +1,37 @@
From c7c59c6097d94dbab8fc68dae798017bdbc5b3b9 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Tue, 16 Apr 2024 16:22:32 +0200
Subject: [PATCH 6/6] edma_v1: skip edma_disable_port in edma_cleanup
subsequent run
Skip edma_disable_port in edma_cleanup subsequent run as it will cause
the kernel panic as the regs are already freed by previous run of
edma_cleanup. It's use it's not clear but the call is already done in
the first run of edma_cleanup. Maybe an oversight never dropped?
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
---
hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c | 12 +++++++++---
1 file changed, 9 insertions(+), 3 deletions(-)
--- a/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
+++ b/hal/dp_ops/edma_dp/edma_v1/edma_data_plane.c
@@ -326,9 +326,15 @@ void edma_cleanup(bool is_dp_override)
* Disable EDMA only at module exit time, since NSS firmware
* depends on this setting.
*/
- if (!is_dp_override) {
- edma_disable_port();
- }
+ /* This call will make the kernel panic as reg used by
+ * edma_disable_port are already freed by previous call of
+ * edma_cleanup. Logic is not clear of WHY this is called.
+ * Keep this here for reference if someone EVER wants
+ * to investigate.
+ */
+ // if (!is_dp_override) {
+ // edma_disable_port();
+ // }
return;
}

View File

@ -5,9 +5,9 @@ PKG_RELEASE=1
PKG_SOURCE_PROTO:=git PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/uclient.git PKG_SOURCE_URL=$(PROJECT_GIT)/project/uclient.git
PKG_MIRROR_HASH:=21c95854c60757007edacc579ce874999d2d536f682b0e636a8d19bc75e70da5 PKG_MIRROR_HASH:=0a0ea0752d534db87f2a13342d1b1b33fb94e43b934bdd015f96f19c635aa08c
PKG_SOURCE_DATE:=2024-04-05 PKG_SOURCE_DATE:=2024-04-19
PKG_SOURCE_VERSION:=6c16331e4bf542fbb538d62a6b5bf3d286ecbf2c PKG_SOURCE_VERSION:=e8780fa7792aaa2d68af21c0df91cd9c05e1f73a
CMAKE_INSTALL:=1 CMAKE_INSTALL:=1
PKG_BUILD_DEPENDS:=ustream-ssl PKG_BUILD_DEPENDS:=ustream-ssl

View File

@ -5,9 +5,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/ustream-ssl.git PKG_SOURCE_URL=$(PROJECT_GIT)/project/ustream-ssl.git
PKG_SOURCE_DATE:=2024-04-07 PKG_SOURCE_DATE:=2024-04-19
PKG_SOURCE_VERSION:=d61493a4420417cbf9931ffee8c862faf04f2967 PKG_SOURCE_VERSION:=524a76e5af78fa577c46e0d24bdedd4254e07cd4
PKG_MIRROR_HASH:=a420d775ad4928836e33e0d9423486fe4904555dbbfff283cd96370a49cf9659 PKG_MIRROR_HASH:=638a3143013c7b60faa0e92f466a4245c635b72a7a61baa84dc9fca000991999
CMAKE_INSTALL:=1 CMAKE_INSTALL:=1
PKG_LICENSE:=ISC PKG_LICENSE:=ISC

View File

@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=lldpd PKG_NAME:=lldpd
PKG_VERSION:=1.0.17 PKG_VERSION:=1.0.17
PKG_RELEASE:=3 PKG_RELEASE:=4
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/lldpd/lldpd/releases/download/$(PKG_VERSION)/ PKG_SOURCE_URL:=https://github.com/lldpd/lldpd/releases/download/$(PKG_VERSION)/

View File

@ -80,12 +80,20 @@ get_config_cid_ifaces() {
config_get _ifaces 'config' "$2" config_get _ifaces 'config' "$2"
local _iface _ifnames="" local _iface _ifnames=""
# Set noglob to prevent '*' capturing diverse file names in the for ... in
set -o noglob
for _iface in $_ifaces; do for _iface in $_ifaces; do
local _ifname=""
if network_get_device _ifname "$_iface" || [ -e "/sys/class/net/$_iface" ]; then local _l2device=""
append _ifnames "${_ifname:-$_iface}" "," if network_get_physdev _l2device "$_iface" || [ -e "/sys/class/net/$_iface" ]; then
append _ifnames "${_l2device:-$_iface}" ","
else
# Glob case (interface is e.g. '!eth1' or 'eth*' or '*')
append _ifnames "$_iface" ","
fi fi
done done
# Turn noglob off i.e. enable glob again
set +o noglob
export -n "${1}=$_ifnames" export -n "${1}=$_ifnames"
} }

View File

@ -19,6 +19,7 @@ proto_ncm_init_config() {
proto_config_add_string delay proto_config_add_string delay
proto_config_add_string mode proto_config_add_string mode
proto_config_add_string pdptype proto_config_add_string pdptype
proto_config_add_boolean sourcefilter
proto_config_add_int profile proto_config_add_int profile
proto_config_add_defaults proto_config_add_defaults
} }
@ -29,7 +30,7 @@ proto_ncm_setup() {
local manufacturer initialize setmode connect finalize devname devpath ifpath local manufacturer initialize setmode connect finalize devname devpath ifpath
local device ifname apn auth username password pincode delay mode pdptype profile $PROTO_DEFAULT_OPTIONS local device ifname apn auth username password pincode delay mode pdptype profile $PROTO_DEFAULT_OPTIONS
json_get_vars device ifname apn auth username password pincode delay mode pdptype profile $PROTO_DEFAULT_OPTIONS json_get_vars device ifname apn auth username password pincode delay mode pdptype sourcefilter profile $PROTO_DEFAULT_OPTIONS
local context_type local context_type
@ -202,6 +203,7 @@ proto_ncm_setup() {
json_add_string ifname "@$interface" json_add_string ifname "@$interface"
json_add_string proto "dhcpv6" json_add_string proto "dhcpv6"
json_add_string extendprefix 1 json_add_string extendprefix 1
[ "$sourcefilter" = "0" ] && json_add_boolean sourcefilter "0"
proto_add_dynamic_defaults proto_add_dynamic_defaults
[ -n "$zone" ] && { [ -n "$zone" ] && {
json_add_string zone "$zone" json_add_string zone "$zone"

View File

@ -9,12 +9,12 @@ include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=ipset PKG_NAME:=ipset
PKG_VERSION:=7.17 PKG_VERSION:=7.21
PKG_RELEASE:=1 PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=https://ipset.netfilter.org PKG_SOURCE_URL:=https://ipset.netfilter.org
PKG_HASH:=be49c9ff489dd6610cad6541e743c3384eac96e9f24707da7b3929d8f2ac64d8 PKG_HASH:=e2c6ce4fcf3acb3893ca5d35c86935f80ad76fc5ccae601185842df760e0bc69
PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io> PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
PKG_LICENSE:=GPL-2.0 PKG_LICENSE:=GPL-2.0

View File

@ -0,0 +1,12 @@
--- a/src/ipset.c
+++ b/src/ipset.c
@@ -6,8 +6,8 @@
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
-#define _GNU_SOURCE
#include <assert.h> /* assert */
+#include <libgen.h> /* basename */
#include <stdio.h> /* fprintf */
#include <stdlib.h> /* exit */
#include <string.h> /* strcmp */

View File

@ -22,6 +22,7 @@ proto_mbim_init_config() {
[ -e /proc/sys/net/ipv6 ] && proto_config_add_string ipv6 [ -e /proc/sys/net/ipv6 ] && proto_config_add_string ipv6
proto_config_add_string dhcp proto_config_add_string dhcp
proto_config_add_string dhcpv6 proto_config_add_string dhcpv6
proto_config_add_boolean sourcefilter
proto_config_add_string pdptype proto_config_add_string pdptype
proto_config_add_int mtu proto_config_add_int mtu
proto_config_add_defaults proto_config_add_defaults
@ -47,7 +48,7 @@ _proto_mbim_setup() {
local device apn pincode delay auth username password allow_roaming allow_partner local device apn pincode delay auth username password allow_roaming allow_partner
local dhcp dhcpv6 pdptype ip4table ip6table mtu $PROTO_DEFAULT_OPTIONS local dhcp dhcpv6 pdptype ip4table ip6table mtu $PROTO_DEFAULT_OPTIONS
json_get_vars device apn pincode delay auth username password allow_roaming allow_partner json_get_vars device apn pincode delay auth username password allow_roaming allow_partner
json_get_vars dhcp dhcpv6 pdptype ip4table ip6table mtu $PROTO_DEFAULT_OPTIONS json_get_vars dhcp dhcpv6 sourcefilter pdptype ip4table ip6table mtu $PROTO_DEFAULT_OPTIONS
[ ! -e /proc/sys/net/ipv6 ] && ipv6=0 || json_get_var ipv6 ipv6 [ ! -e /proc/sys/net/ipv6 ] && ipv6=0 || json_get_var ipv6 ipv6
@ -263,6 +264,7 @@ _proto_mbim_setup() {
echo "mbim[$$]" "Starting DHCPv6 on $ifname" echo "mbim[$$]" "Starting DHCPv6 on $ifname"
json_add_string proto "dhcpv6" json_add_string proto "dhcpv6"
json_add_string extendprefix 1 json_add_string extendprefix 1
[ "$sourcefilter" = "0" ] && json_add_boolean sourcefilter "0"
fi fi
[ "$peerdns" = 0 -a "$dhcpv6" != 1 ] || { [ "$peerdns" = 0 -a "$dhcpv6" != 1 ] || {

View File

@ -23,6 +23,7 @@ proto_qmi_init_config() {
proto_config_add_int v6profile proto_config_add_int v6profile
proto_config_add_boolean dhcp proto_config_add_boolean dhcp
proto_config_add_boolean dhcpv6 proto_config_add_boolean dhcpv6
proto_config_add_boolean sourcefilter
proto_config_add_boolean autoconnect proto_config_add_boolean autoconnect
proto_config_add_int plmn proto_config_add_int plmn
proto_config_add_int timeout proto_config_add_int timeout
@ -41,7 +42,7 @@ proto_qmi_setup() {
local profile_pdptype local profile_pdptype
json_get_vars device apn v6apn auth username password pincode delay modes json_get_vars device apn v6apn auth username password pincode delay modes
json_get_vars pdptype profile v6profile dhcp dhcpv6 autoconnect plmn ip4table json_get_vars pdptype profile v6profile dhcp dhcpv6 sourcefilter autoconnect plmn ip4table
json_get_vars ip6table timeout mtu $PROTO_DEFAULT_OPTIONS json_get_vars ip6table timeout mtu $PROTO_DEFAULT_OPTIONS
[ "$timeout" = "" ] && timeout="10" [ "$timeout" = "" ] && timeout="10"
@ -441,6 +442,7 @@ proto_qmi_setup() {
proto_add_dynamic_defaults proto_add_dynamic_defaults
# RFC 7278: Extend an IPv6 /64 Prefix to LAN # RFC 7278: Extend an IPv6 /64 Prefix to LAN
json_add_string extendprefix 1 json_add_string extendprefix 1
[ "$sourcefilter" = "0" ] && json_add_boolean sourcefilter "0"
[ -n "$zone" ] && json_add_string zone "$zone" [ -n "$zone" ] && json_add_string zone "$zone"
json_close_object json_close_object
ubus call network add_dynamic "$(json_dump)" ubus call network add_dynamic "$(json_dump)"

View File

@ -194,6 +194,7 @@ ifndef DUMP
endif endif
else else
ifeq ($(CONFIG_NATIVE_TOOLCHAIN),) ifeq ($(CONFIG_NATIVE_TOOLCHAIN),)
-include $(TOOLCHAIN_DIR)/info.mk
TARGET_CROSS:=$(call qstrip,$(CONFIG_TOOLCHAIN_PREFIX)) TARGET_CROSS:=$(call qstrip,$(CONFIG_TOOLCHAIN_PREFIX))
TOOLCHAIN_ROOT_DIR:=$(call qstrip,$(CONFIG_TOOLCHAIN_ROOT)) TOOLCHAIN_ROOT_DIR:=$(call qstrip,$(CONFIG_TOOLCHAIN_ROOT))
TOOLCHAIN_BIN_DIRS:=$(patsubst ./%,$(TOOLCHAIN_ROOT_DIR)/%,$(call qstrip,$(CONFIG_TOOLCHAIN_BIN_PATH))) TOOLCHAIN_BIN_DIRS:=$(patsubst ./%,$(TOOLCHAIN_ROOT_DIR)/%,$(call qstrip,$(CONFIG_TOOLCHAIN_BIN_PATH)))

View File

@ -10,7 +10,7 @@ Signed-off-by: Abhimanyu Vishwakarma <Abhimanyu.Vishwakarma@imgtec.com>
--- a/drivers/mtd/spi-nor/core.c --- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c
@@ -2942,12 +2942,19 @@ static void spi_nor_set_mtd_info(struct @@ -2964,12 +2964,19 @@ static void spi_nor_set_mtd_info(struct
{ {
struct mtd_info *mtd = &nor->mtd; struct mtd_info *mtd = &nor->mtd;
struct device *dev = nor->dev; struct device *dev = nor->dev;

View File

@ -552,7 +552,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
--- a/kernel/bounds.c --- a/kernel/bounds.c
+++ b/kernel/bounds.c +++ b/kernel/bounds.c
@@ -22,6 +22,11 @@ int main(void) @@ -22,6 +22,11 @@ int main(void)
DEFINE(NR_CPUS_BITS, ilog2(CONFIG_NR_CPUS)); DEFINE(NR_CPUS_BITS, bits_per(CONFIG_NR_CPUS));
#endif #endif
DEFINE(SPINLOCK_SIZE, sizeof(spinlock_t)); DEFINE(SPINLOCK_SIZE, sizeof(spinlock_t));
+#ifdef CONFIG_LRU_GEN +#ifdef CONFIG_LRU_GEN

View File

@ -1251,7 +1251,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
get_scan_count(lruvec, sc, nr); get_scan_count(lruvec, sc, nr);
/* Record the original scan target for proportional adjustments later */ /* Record the original scan target for proportional adjustments later */
@@ -3372,6 +4142,9 @@ static void snapshot_refaults(struct mem @@ -3375,6 +4145,9 @@ static void snapshot_refaults(struct mem
struct lruvec *target_lruvec; struct lruvec *target_lruvec;
unsigned long refaults; unsigned long refaults;
@ -1261,7 +1261,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
target_lruvec = mem_cgroup_lruvec(target_memcg, pgdat); target_lruvec = mem_cgroup_lruvec(target_memcg, pgdat);
refaults = lruvec_page_state(target_lruvec, WORKINGSET_ACTIVATE_ANON); refaults = lruvec_page_state(target_lruvec, WORKINGSET_ACTIVATE_ANON);
target_lruvec->refaults[0] = refaults; target_lruvec->refaults[0] = refaults;
@@ -3736,12 +4509,16 @@ unsigned long try_to_free_mem_cgroup_pag @@ -3739,12 +4512,16 @@ unsigned long try_to_free_mem_cgroup_pag
} }
#endif #endif
@ -1280,7 +1280,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
if (!can_age_anon_pages(pgdat, sc)) if (!can_age_anon_pages(pgdat, sc))
return; return;
@@ -4058,12 +4835,11 @@ restart: @@ -4061,12 +4838,11 @@ restart:
sc.may_swap = !nr_boost_reclaim; sc.may_swap = !nr_boost_reclaim;
/* /*

View File

@ -149,7 +149,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
--- a/fs/exec.c --- a/fs/exec.c
+++ b/fs/exec.c +++ b/fs/exec.c
@@ -1013,6 +1013,7 @@ static int exec_mmap(struct mm_struct *m @@ -1014,6 +1014,7 @@ static int exec_mmap(struct mm_struct *m
active_mm = tsk->active_mm; active_mm = tsk->active_mm;
tsk->active_mm = mm; tsk->active_mm = mm;
tsk->mm = mm; tsk->mm = mm;
@ -157,7 +157,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
/* /*
* This prevents preemption while active_mm is being loaded and * This prevents preemption while active_mm is being loaded and
* it and mm are being updated, which could cause problems for * it and mm are being updated, which could cause problems for
@@ -1028,6 +1029,7 @@ static int exec_mmap(struct mm_struct *m @@ -1029,6 +1030,7 @@ static int exec_mmap(struct mm_struct *m
tsk->mm->vmacache_seqnum = 0; tsk->mm->vmacache_seqnum = 0;
vmacache_flush(tsk); vmacache_flush(tsk);
task_unlock(tsk); task_unlock(tsk);

View File

@ -31,7 +31,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
--- a/fs/exec.c --- a/fs/exec.c
+++ b/fs/exec.c +++ b/fs/exec.c
@@ -1013,7 +1013,6 @@ static int exec_mmap(struct mm_struct *m @@ -1014,7 +1014,6 @@ static int exec_mmap(struct mm_struct *m
active_mm = tsk->active_mm; active_mm = tsk->active_mm;
tsk->active_mm = mm; tsk->active_mm = mm;
tsk->mm = mm; tsk->mm = mm;
@ -39,7 +39,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
/* /*
* This prevents preemption while active_mm is being loaded and * This prevents preemption while active_mm is being loaded and
* it and mm are being updated, which could cause problems for * it and mm are being updated, which could cause problems for
@@ -1028,6 +1027,7 @@ static int exec_mmap(struct mm_struct *m @@ -1029,6 +1028,7 @@ static int exec_mmap(struct mm_struct *m
local_irq_enable(); local_irq_enable();
tsk->mm->vmacache_seqnum = 0; tsk->mm->vmacache_seqnum = 0;
vmacache_flush(tsk); vmacache_flush(tsk);

View File

@ -354,7 +354,7 @@ Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
static void mem_cgroup_css_free(struct cgroup_subsys_state *css) static void mem_cgroup_css_free(struct cgroup_subsys_state *css)
--- a/mm/page_alloc.c --- a/mm/page_alloc.c
+++ b/mm/page_alloc.c +++ b/mm/page_alloc.c
@@ -7661,6 +7661,7 @@ static void __init free_area_init_node(i @@ -7663,6 +7663,7 @@ static void __init free_area_init_node(i
pgdat_set_deferred_range(pgdat); pgdat_set_deferred_range(pgdat);
free_area_init_core(pgdat); free_area_init_core(pgdat);

View File

@ -32,7 +32,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/MAINTAINERS --- a/MAINTAINERS
+++ b/MAINTAINERS +++ b/MAINTAINERS
@@ -11783,6 +11783,14 @@ L: netdev@vger.kernel.org @@ -11790,6 +11790,14 @@ L: netdev@vger.kernel.org
S: Maintained S: Maintained
F: drivers/net/ethernet/mediatek/ F: drivers/net/ethernet/mediatek/

View File

@ -25,7 +25,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/MAINTAINERS --- a/MAINTAINERS
+++ b/MAINTAINERS +++ b/MAINTAINERS
@@ -11895,6 +11895,7 @@ M: Landen Chao <Landen.Chao@mediatek.com @@ -11902,6 +11902,7 @@ M: Landen Chao <Landen.Chao@mediatek.com
M: DENG Qingfang <dqfext@gmail.com> M: DENG Qingfang <dqfext@gmail.com>
L: netdev@vger.kernel.org L: netdev@vger.kernel.org
S: Maintained S: Maintained

View File

@ -28,7 +28,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/MAINTAINERS --- a/MAINTAINERS
+++ b/MAINTAINERS +++ b/MAINTAINERS
@@ -11893,9 +11893,11 @@ MEDIATEK SWITCH DRIVER @@ -11900,9 +11900,11 @@ MEDIATEK SWITCH DRIVER
M: Sean Wang <sean.wang@mediatek.com> M: Sean Wang <sean.wang@mediatek.com>
M: Landen Chao <Landen.Chao@mediatek.com> M: Landen Chao <Landen.Chao@mediatek.com>
M: DENG Qingfang <dqfext@gmail.com> M: DENG Qingfang <dqfext@gmail.com>

View File

@ -21,7 +21,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/MAINTAINERS --- a/MAINTAINERS
+++ b/MAINTAINERS +++ b/MAINTAINERS
@@ -12694,6 +12694,7 @@ F: include/uapi/linux/meye.h @@ -12701,6 +12701,7 @@ F: include/uapi/linux/meye.h
MOTORCOMM PHY DRIVER MOTORCOMM PHY DRIVER
M: Peter Geis <pgwipeout@gmail.com> M: Peter Geis <pgwipeout@gmail.com>

View File

@ -0,0 +1,30 @@
From 2203718c2f59ffdd6c78d54e5add594aebb4461e Mon Sep 17 00:00:00 2001
From: Georgi Valkov <gvalkov@gmail.com>
Date: Wed, 7 Jun 2023 15:56:59 +0200
Subject: [PATCH 1/4] usbnet: ipheth: fix risk of NULL pointer deallocation
The cleanup precedure in ipheth_probe will attempt to free a
NULL pointer in dev->ctrl_buf if the memory allocation for
this buffer is not successful. While kfree ignores NULL pointers,
and the existing code is safe, it is a better design to rearrange
the goto labels and avoid this.
Signed-off-by: Georgi Valkov <gvalkov@gmail.com>
Signed-off-by: Foster Snowhill <forst@pen.gy>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/usb/ipheth.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/usb/ipheth.c
+++ b/drivers/net/usb/ipheth.c
@@ -510,8 +510,8 @@ err_register_netdev:
ipheth_free_urbs(dev);
err_alloc_urbs:
err_get_macaddr:
-err_alloc_ctrl_buf:
kfree(dev->ctrl_buf);
+err_alloc_ctrl_buf:
err_endpoints:
free_netdev(netdev);
return retval;

View File

@ -0,0 +1,35 @@
From 3e65efcca87a9bb5f3b864e0a43d167bc0a8688c Mon Sep 17 00:00:00 2001
From: Foster Snowhill <forst@pen.gy>
Date: Wed, 7 Jun 2023 15:57:00 +0200
Subject: [PATCH 2/4] usbnet: ipheth: transmit URBs without trailing padding
The behaviour of the official iOS tethering driver on macOS is to not
transmit any trailing padding at the end of URBs. This is applicable
to both NCM and legacy modes, including older devices.
Adapt the driver to not include trailing padding in TX URBs, matching
the behaviour of the official macOS driver.
Signed-off-by: Foster Snowhill <forst@pen.gy>
Tested-by: Georgi Valkov <gvalkov@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/usb/ipheth.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
--- a/drivers/net/usb/ipheth.c
+++ b/drivers/net/usb/ipheth.c
@@ -373,12 +373,10 @@ static netdev_tx_t ipheth_tx(struct sk_b
}
memcpy(dev->tx_buf, skb->data, skb->len);
- if (skb->len < IPHETH_BUF_SIZE)
- memset(dev->tx_buf + skb->len, 0, IPHETH_BUF_SIZE - skb->len);
usb_fill_bulk_urb(dev->tx_urb, udev,
usb_sndbulkpipe(udev, dev->bulk_out),
- dev->tx_buf, IPHETH_BUF_SIZE,
+ dev->tx_buf, skb->len,
ipheth_sndbulk_callback,
dev);
dev->tx_urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;

View File

@ -0,0 +1,326 @@
From a2d274c62e44b1995c170595db3865c6fe701226 Mon Sep 17 00:00:00 2001
From: Foster Snowhill <forst@pen.gy>
Date: Wed, 7 Jun 2023 15:57:01 +0200
Subject: [PATCH 3/4] usbnet: ipheth: add CDC NCM support
Recent iOS releases support CDC NCM encapsulation on RX. This mode is
the default on macOS and Windows. In this mode, an iOS device may include
one or more Ethernet frames inside a single URB.
Freshly booted iOS devices start in legacy mode, but are put into
NCM mode by the official Apple driver. When reconnecting such a device
from a macOS/Windows machine to a Linux host, the device stays in
NCM mode, making it unusable with the legacy ipheth driver code.
To correctly support such a device, the driver has to either support
the NCM mode too, or put the device back into legacy mode.
To match the behaviour of the macOS/Windows driver, and since there
is no documented control command to revert to legacy mode, implement
NCM support. The device is attempted to be put into NCM mode by default,
and falls back to legacy mode if the attempt fails.
Signed-off-by: Foster Snowhill <forst@pen.gy>
Tested-by: Georgi Valkov <gvalkov@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/usb/ipheth.c | 180 +++++++++++++++++++++++++++++++++------
1 file changed, 155 insertions(+), 25 deletions(-)
--- a/drivers/net/usb/ipheth.c
+++ b/drivers/net/usb/ipheth.c
@@ -52,6 +52,7 @@
#include <linux/ethtool.h>
#include <linux/usb.h>
#include <linux/workqueue.h>
+#include <linux/usb/cdc.h>
#define USB_VENDOR_APPLE 0x05ac
@@ -59,8 +60,12 @@
#define IPHETH_USBINTF_SUBCLASS 253
#define IPHETH_USBINTF_PROTO 1
-#define IPHETH_BUF_SIZE 1514
#define IPHETH_IP_ALIGN 2 /* padding at front of URB */
+#define IPHETH_NCM_HEADER_SIZE (12 + 96) /* NCMH + NCM0 */
+#define IPHETH_TX_BUF_SIZE ETH_FRAME_LEN
+#define IPHETH_RX_BUF_SIZE_LEGACY (IPHETH_IP_ALIGN + ETH_FRAME_LEN)
+#define IPHETH_RX_BUF_SIZE_NCM 65536
+
#define IPHETH_TX_TIMEOUT (5 * HZ)
#define IPHETH_INTFNUM 2
@@ -71,6 +76,7 @@
#define IPHETH_CTRL_TIMEOUT (5 * HZ)
#define IPHETH_CMD_GET_MACADDR 0x00
+#define IPHETH_CMD_ENABLE_NCM 0x04
#define IPHETH_CMD_CARRIER_CHECK 0x45
#define IPHETH_CARRIER_CHECK_TIMEOUT round_jiffies_relative(1 * HZ)
@@ -97,6 +103,8 @@ struct ipheth_device {
u8 bulk_out;
struct delayed_work carrier_work;
bool confirmed_pairing;
+ int (*rcvbulk_callback)(struct urb *urb);
+ size_t rx_buf_len;
};
static int ipheth_rx_submit(struct ipheth_device *dev, gfp_t mem_flags);
@@ -116,12 +124,12 @@ static int ipheth_alloc_urbs(struct iphe
if (rx_urb == NULL)
goto free_tx_urb;
- tx_buf = usb_alloc_coherent(iphone->udev, IPHETH_BUF_SIZE,
+ tx_buf = usb_alloc_coherent(iphone->udev, IPHETH_TX_BUF_SIZE,
GFP_KERNEL, &tx_urb->transfer_dma);
if (tx_buf == NULL)
goto free_rx_urb;
- rx_buf = usb_alloc_coherent(iphone->udev, IPHETH_BUF_SIZE + IPHETH_IP_ALIGN,
+ rx_buf = usb_alloc_coherent(iphone->udev, iphone->rx_buf_len,
GFP_KERNEL, &rx_urb->transfer_dma);
if (rx_buf == NULL)
goto free_tx_buf;
@@ -134,7 +142,7 @@ static int ipheth_alloc_urbs(struct iphe
return 0;
free_tx_buf:
- usb_free_coherent(iphone->udev, IPHETH_BUF_SIZE, tx_buf,
+ usb_free_coherent(iphone->udev, IPHETH_TX_BUF_SIZE, tx_buf,
tx_urb->transfer_dma);
free_rx_urb:
usb_free_urb(rx_urb);
@@ -146,9 +154,9 @@ error_nomem:
static void ipheth_free_urbs(struct ipheth_device *iphone)
{
- usb_free_coherent(iphone->udev, IPHETH_BUF_SIZE + IPHETH_IP_ALIGN, iphone->rx_buf,
+ usb_free_coherent(iphone->udev, iphone->rx_buf_len, iphone->rx_buf,
iphone->rx_urb->transfer_dma);
- usb_free_coherent(iphone->udev, IPHETH_BUF_SIZE, iphone->tx_buf,
+ usb_free_coherent(iphone->udev, IPHETH_TX_BUF_SIZE, iphone->tx_buf,
iphone->tx_urb->transfer_dma);
usb_free_urb(iphone->rx_urb);
usb_free_urb(iphone->tx_urb);
@@ -160,15 +168,106 @@ static void ipheth_kill_urbs(struct iphe
usb_kill_urb(dev->rx_urb);
}
-static void ipheth_rcvbulk_callback(struct urb *urb)
+static int ipheth_consume_skb(char *buf, int len, struct ipheth_device *dev)
{
- struct ipheth_device *dev;
struct sk_buff *skb;
- int status;
+
+ skb = dev_alloc_skb(len);
+ if (!skb) {
+ dev->net->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_put_data(skb, buf, len);
+ skb->dev = dev->net;
+ skb->protocol = eth_type_trans(skb, dev->net);
+
+ dev->net->stats.rx_packets++;
+ dev->net->stats.rx_bytes += len;
+ netif_rx(skb);
+
+ return 0;
+}
+
+static int ipheth_rcvbulk_callback_legacy(struct urb *urb)
+{
+ struct ipheth_device *dev;
+ char *buf;
+ int len;
+
+ dev = urb->context;
+
+ if (urb->actual_length <= IPHETH_IP_ALIGN) {
+ dev->net->stats.rx_length_errors++;
+ return -EINVAL;
+ }
+ len = urb->actual_length - IPHETH_IP_ALIGN;
+ buf = urb->transfer_buffer + IPHETH_IP_ALIGN;
+
+ return ipheth_consume_skb(buf, len, dev);
+}
+
+static int ipheth_rcvbulk_callback_ncm(struct urb *urb)
+{
+ struct usb_cdc_ncm_nth16 *ncmh;
+ struct usb_cdc_ncm_ndp16 *ncm0;
+ struct usb_cdc_ncm_dpe16 *dpe;
+ struct ipheth_device *dev;
+ int retval = -EINVAL;
char *buf;
int len;
dev = urb->context;
+
+ if (urb->actual_length < IPHETH_NCM_HEADER_SIZE) {
+ dev->net->stats.rx_length_errors++;
+ return retval;
+ }
+
+ ncmh = urb->transfer_buffer;
+ if (ncmh->dwSignature != cpu_to_le32(USB_CDC_NCM_NTH16_SIGN) ||
+ le16_to_cpu(ncmh->wNdpIndex) >= urb->actual_length) {
+ dev->net->stats.rx_errors++;
+ return retval;
+ }
+
+ ncm0 = urb->transfer_buffer + le16_to_cpu(ncmh->wNdpIndex);
+ if (ncm0->dwSignature != cpu_to_le32(USB_CDC_NCM_NDP16_NOCRC_SIGN) ||
+ le16_to_cpu(ncmh->wHeaderLength) + le16_to_cpu(ncm0->wLength) >=
+ urb->actual_length) {
+ dev->net->stats.rx_errors++;
+ return retval;
+ }
+
+ dpe = ncm0->dpe16;
+ while (le16_to_cpu(dpe->wDatagramIndex) != 0 &&
+ le16_to_cpu(dpe->wDatagramLength) != 0) {
+ if (le16_to_cpu(dpe->wDatagramIndex) >= urb->actual_length ||
+ le16_to_cpu(dpe->wDatagramIndex) +
+ le16_to_cpu(dpe->wDatagramLength) > urb->actual_length) {
+ dev->net->stats.rx_length_errors++;
+ return retval;
+ }
+
+ buf = urb->transfer_buffer + le16_to_cpu(dpe->wDatagramIndex);
+ len = le16_to_cpu(dpe->wDatagramLength);
+
+ retval = ipheth_consume_skb(buf, len, dev);
+ if (retval != 0)
+ return retval;
+
+ dpe++;
+ }
+
+ return 0;
+}
+
+static void ipheth_rcvbulk_callback(struct urb *urb)
+{
+ struct ipheth_device *dev;
+ int retval, status;
+
+ dev = urb->context;
if (dev == NULL)
return;
@@ -191,25 +290,27 @@ static void ipheth_rcvbulk_callback(stru
dev->net->stats.rx_length_errors++;
return;
}
- len = urb->actual_length - IPHETH_IP_ALIGN;
- buf = urb->transfer_buffer + IPHETH_IP_ALIGN;
- skb = dev_alloc_skb(len);
- if (!skb) {
- dev_err(&dev->intf->dev, "%s: dev_alloc_skb: -ENOMEM\n",
- __func__);
- dev->net->stats.rx_dropped++;
+ /* RX URBs starting with 0x00 0x01 do not encapsulate Ethernet frames,
+ * but rather are control frames. Their purpose is not documented, and
+ * they don't affect driver functionality, okay to drop them.
+ * There is usually just one 4-byte control frame as the very first
+ * URB received from the bulk IN endpoint.
+ */
+ if (unlikely
+ (((char *)urb->transfer_buffer)[0] == 0 &&
+ ((char *)urb->transfer_buffer)[1] == 1))
+ goto rx_submit;
+
+ retval = dev->rcvbulk_callback(urb);
+ if (retval != 0) {
+ dev_err(&dev->intf->dev, "%s: callback retval: %d\n",
+ __func__, retval);
return;
}
- skb_put_data(skb, buf, len);
- skb->dev = dev->net;
- skb->protocol = eth_type_trans(skb, dev->net);
-
- dev->net->stats.rx_packets++;
- dev->net->stats.rx_bytes += len;
+rx_submit:
dev->confirmed_pairing = true;
- netif_rx(skb);
ipheth_rx_submit(dev, GFP_ATOMIC);
}
@@ -310,6 +411,27 @@ static int ipheth_get_macaddr(struct iph
return retval;
}
+static int ipheth_enable_ncm(struct ipheth_device *dev)
+{
+ struct usb_device *udev = dev->udev;
+ int retval;
+
+ retval = usb_control_msg(udev,
+ usb_sndctrlpipe(udev, IPHETH_CTRL_ENDP),
+ IPHETH_CMD_ENABLE_NCM, /* request */
+ 0x41, /* request type */
+ 0x00, /* value */
+ 0x02, /* index */
+ NULL,
+ 0,
+ IPHETH_CTRL_TIMEOUT);
+
+ dev_info(&dev->intf->dev, "%s: usb_control_msg: %d\n",
+ __func__, retval);
+
+ return retval;
+}
+
static int ipheth_rx_submit(struct ipheth_device *dev, gfp_t mem_flags)
{
struct usb_device *udev = dev->udev;
@@ -317,7 +439,7 @@ static int ipheth_rx_submit(struct iphet
usb_fill_bulk_urb(dev->rx_urb, udev,
usb_rcvbulkpipe(udev, dev->bulk_in),
- dev->rx_buf, IPHETH_BUF_SIZE + IPHETH_IP_ALIGN,
+ dev->rx_buf, dev->rx_buf_len,
ipheth_rcvbulk_callback,
dev);
dev->rx_urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
@@ -365,7 +487,7 @@ static netdev_tx_t ipheth_tx(struct sk_b
int retval;
/* Paranoid */
- if (skb->len > IPHETH_BUF_SIZE) {
+ if (skb->len > IPHETH_TX_BUF_SIZE) {
WARN(1, "%s: skb too large: %d bytes\n", __func__, skb->len);
dev->net->stats.tx_dropped++;
dev_kfree_skb_any(skb);
@@ -448,6 +570,8 @@ static int ipheth_probe(struct usb_inter
dev->net = netdev;
dev->intf = intf;
dev->confirmed_pairing = false;
+ dev->rx_buf_len = IPHETH_RX_BUF_SIZE_LEGACY;
+ dev->rcvbulk_callback = ipheth_rcvbulk_callback_legacy;
/* Set up endpoints */
hintf = usb_altnum_to_altsetting(intf, IPHETH_ALT_INTFNUM);
if (hintf == NULL) {
@@ -479,6 +603,12 @@ static int ipheth_probe(struct usb_inter
if (retval)
goto err_get_macaddr;
+ retval = ipheth_enable_ncm(dev);
+ if (!retval) {
+ dev->rx_buf_len = IPHETH_RX_BUF_SIZE_NCM;
+ dev->rcvbulk_callback = ipheth_rcvbulk_callback_ncm;
+ }
+
INIT_DELAYED_WORK(&dev->carrier_work, ipheth_carrier_check_work);
retval = ipheth_alloc_urbs(dev);

View File

@ -0,0 +1,36 @@
From 0c6e9d32ef0ccfcf2d875cbcff23bf345a54d585 Mon Sep 17 00:00:00 2001
From: Foster Snowhill <forst@pen.gy>
Date: Wed, 7 Jun 2023 15:57:02 +0200
Subject: [PATCH 4/4] usbnet: ipheth: update Kconfig description
This module has for a long time not been limited to iPhone <= 3GS.
Update description to match the actual state of the driver.
Remove dead link from 2010, instead reference an existing userspace
iOS device pairing implementation as part of libimobiledevice.
Signed-off-by: Foster Snowhill <forst@pen.gy>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/usb/Kconfig | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
--- a/drivers/net/usb/Kconfig
+++ b/drivers/net/usb/Kconfig
@@ -582,12 +582,10 @@ config USB_IPHETH
default n
help
Module used to share Internet connection (tethering) from your
- iPhone (Original, 3G and 3GS) to your system.
- Note that you need userspace libraries and programs that are needed
- to pair your device with your system and that understand the iPhone
- protocol.
-
- For more information: http://giagio.com/wiki/moin.cgi/iPhoneEthernetDriver
+ iPhone to your system.
+ Note that you need a corresponding userspace library/program
+ to pair your device with your system, for example usbmuxd
+ <https://github.com/libimobiledevice/usbmuxd>.
config USB_SIERRA_NET
tristate "USB-to-WWAN Driver for Sierra Wireless modems"

View File

@ -19,7 +19,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
--- a/MAINTAINERS --- a/MAINTAINERS
+++ b/MAINTAINERS +++ b/MAINTAINERS
@@ -17959,6 +17959,11 @@ L: netdev@vger.kernel.org @@ -17966,6 +17966,11 @@ L: netdev@vger.kernel.org
S: Maintained S: Maintained
F: drivers/net/ethernet/dlink/sundance.c F: drivers/net/ethernet/dlink/sundance.c

View File

@ -57,7 +57,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
--- a/MAINTAINERS --- a/MAINTAINERS
+++ b/MAINTAINERS +++ b/MAINTAINERS
@@ -12358,6 +12358,14 @@ S: Supported @@ -12365,6 +12365,14 @@ S: Supported
F: Documentation/devicetree/bindings/mtd/atmel-nand.txt F: Documentation/devicetree/bindings/mtd/atmel-nand.txt
F: drivers/mtd/nand/raw/atmel/* F: drivers/mtd/nand/raw/atmel/*

View File

@ -132,7 +132,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
imx_ocotp_nvmem_config.priv = priv; imx_ocotp_nvmem_config.priv = priv;
--- a/drivers/nvmem/meson-efuse.c --- a/drivers/nvmem/meson-efuse.c
+++ b/drivers/nvmem/meson-efuse.c +++ b/drivers/nvmem/meson-efuse.c
@@ -93,6 +93,7 @@ static int meson_efuse_probe(struct plat @@ -74,6 +74,7 @@ static int meson_efuse_probe(struct plat
econfig->dev = dev; econfig->dev = dev;
econfig->name = dev_name(dev); econfig->name = dev_name(dev);

View File

@ -0,0 +1,117 @@
From 773bbe10449731c9525457873e0c2342e5cf883b Mon Sep 17 00:00:00 2001
From: Michael Walle <michael@walle.cc>
Date: Thu, 11 Aug 2022 00:06:53 +0200
Subject: [PATCH] mtd: spi-nor: add generic flash driver
Our SFDP parsing is everything we need to support all basic operations
of a flash device. If the flash isn't found in our in-kernel flash
database, gracefully fall back to a driver described solely by its SFDP
tables.
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Link: https://lore.kernel.org/r/20220810220654.1297699-7-michael@walle.cc
---
drivers/mtd/spi-nor/core.c | 26 ++++++++++++++++++++++++--
drivers/mtd/spi-nor/core.h | 1 +
drivers/mtd/spi-nor/sfdp.c | 27 +++++++++++++++++++++++++++
3 files changed, 52 insertions(+), 2 deletions(-)
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -1636,6 +1636,16 @@ static const struct spi_nor_manufacturer
&spi_nor_xmc,
};
+static const struct flash_info spi_nor_generic_flash = {
+ .name = "spi-nor-generic",
+ /*
+ * JESD216 rev A doesn't specify the page size, therefore we need a
+ * sane default.
+ */
+ .page_size = 256,
+ .parse_sfdp = true,
+};
+
static const struct flash_info *spi_nor_match_id(struct spi_nor *nor,
const u8 *id)
{
@@ -1669,6 +1679,14 @@ static const struct flash_info *spi_nor_
}
info = spi_nor_match_id(nor, id);
+
+ /* Fallback to a generic flash described only by its SFDP data. */
+ if (!info) {
+ ret = spi_nor_check_sfdp_signature(nor);
+ if (!ret)
+ info = &spi_nor_generic_flash;
+ }
+
if (!info) {
dev_err(nor->dev, "unrecognized JEDEC id bytes: %*ph\n",
SPI_NOR_MAX_ID_LEN, id);
@@ -2105,8 +2123,12 @@ static int spi_nor_select_pp(struct spi_
* spi_nor_select_uniform_erase() - select optimum uniform erase type
* @map: the erase map of the SPI NOR
* @wanted_size: the erase type size to search for. Contains the value of
- * info->sector_size or of the "small sector" size in case
- * CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is defined.
+ * info->sector_size, the "small sector" size in case
+ * CONFIG_MTD_SPI_NOR_USE_4K_SECTORS is defined or 0 if
+ * there is no information about the sector size. The
+ * latter is the case if the flash parameters are parsed
+ * solely by SFDP, then the largest supported erase type
+ * is selected.
*
* Once the optimum uniform sector erase command is found, disable all the
* other.
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -708,6 +708,8 @@ int spi_nor_controller_ops_read_reg(stru
int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode,
const u8 *buf, size_t len);
+int spi_nor_check_sfdp_signature(struct spi_nor *nor);
+
static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd)
{
return container_of(mtd, struct spi_nor, mtd);
--- a/drivers/mtd/spi-nor/sfdp.c
+++ b/drivers/mtd/spi-nor/sfdp.c
@@ -1250,6 +1250,33 @@ static void spi_nor_post_sfdp_fixups(str
}
/**
+ * spi_nor_check_sfdp_signature() - check for a valid SFDP signature
+ * @nor: pointer to a 'struct spi_nor'
+ *
+ * Used to detect if the flash supports the RDSFDP command as well as the
+ * presence of a valid SFDP table.
+ *
+ * Return: 0 on success, -errno otherwise.
+ */
+int spi_nor_check_sfdp_signature(struct spi_nor *nor)
+{
+ u32 signature;
+ int err;
+
+ /* Get the SFDP header. */
+ err = spi_nor_read_sfdp_dma_unsafe(nor, 0, sizeof(signature),
+ &signature);
+ if (err < 0)
+ return err;
+
+ /* Check the SFDP signature. */
+ if (le32_to_cpu(signature) != SFDP_SIGNATURE)
+ return -EINVAL;
+
+ return 0;
+}
+
+/**
* spi_nor_parse_sfdp() - parse the Serial Flash Discoverable Parameters.
* @nor: pointer to a 'struct spi_nor'
*

View File

@ -0,0 +1,30 @@
From 2203718c2f59ffdd6c78d54e5add594aebb4461e Mon Sep 17 00:00:00 2001
From: Georgi Valkov <gvalkov@gmail.com>
Date: Wed, 7 Jun 2023 15:56:59 +0200
Subject: [PATCH 1/4] usbnet: ipheth: fix risk of NULL pointer deallocation
The cleanup precedure in ipheth_probe will attempt to free a
NULL pointer in dev->ctrl_buf if the memory allocation for
this buffer is not successful. While kfree ignores NULL pointers,
and the existing code is safe, it is a better design to rearrange
the goto labels and avoid this.
Signed-off-by: Georgi Valkov <gvalkov@gmail.com>
Signed-off-by: Foster Snowhill <forst@pen.gy>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/usb/ipheth.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/usb/ipheth.c
+++ b/drivers/net/usb/ipheth.c
@@ -510,8 +510,8 @@ err_register_netdev:
ipheth_free_urbs(dev);
err_alloc_urbs:
err_get_macaddr:
-err_alloc_ctrl_buf:
kfree(dev->ctrl_buf);
+err_alloc_ctrl_buf:
err_endpoints:
free_netdev(netdev);
return retval;

View File

@ -0,0 +1,35 @@
From 3e65efcca87a9bb5f3b864e0a43d167bc0a8688c Mon Sep 17 00:00:00 2001
From: Foster Snowhill <forst@pen.gy>
Date: Wed, 7 Jun 2023 15:57:00 +0200
Subject: [PATCH 2/4] usbnet: ipheth: transmit URBs without trailing padding
The behaviour of the official iOS tethering driver on macOS is to not
transmit any trailing padding at the end of URBs. This is applicable
to both NCM and legacy modes, including older devices.
Adapt the driver to not include trailing padding in TX URBs, matching
the behaviour of the official macOS driver.
Signed-off-by: Foster Snowhill <forst@pen.gy>
Tested-by: Georgi Valkov <gvalkov@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/usb/ipheth.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
--- a/drivers/net/usb/ipheth.c
+++ b/drivers/net/usb/ipheth.c
@@ -373,12 +373,10 @@ static netdev_tx_t ipheth_tx(struct sk_b
}
memcpy(dev->tx_buf, skb->data, skb->len);
- if (skb->len < IPHETH_BUF_SIZE)
- memset(dev->tx_buf + skb->len, 0, IPHETH_BUF_SIZE - skb->len);
usb_fill_bulk_urb(dev->tx_urb, udev,
usb_sndbulkpipe(udev, dev->bulk_out),
- dev->tx_buf, IPHETH_BUF_SIZE,
+ dev->tx_buf, skb->len,
ipheth_sndbulk_callback,
dev);
dev->tx_urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;

View File

@ -0,0 +1,326 @@
From a2d274c62e44b1995c170595db3865c6fe701226 Mon Sep 17 00:00:00 2001
From: Foster Snowhill <forst@pen.gy>
Date: Wed, 7 Jun 2023 15:57:01 +0200
Subject: [PATCH 3/4] usbnet: ipheth: add CDC NCM support
Recent iOS releases support CDC NCM encapsulation on RX. This mode is
the default on macOS and Windows. In this mode, an iOS device may include
one or more Ethernet frames inside a single URB.
Freshly booted iOS devices start in legacy mode, but are put into
NCM mode by the official Apple driver. When reconnecting such a device
from a macOS/Windows machine to a Linux host, the device stays in
NCM mode, making it unusable with the legacy ipheth driver code.
To correctly support such a device, the driver has to either support
the NCM mode too, or put the device back into legacy mode.
To match the behaviour of the macOS/Windows driver, and since there
is no documented control command to revert to legacy mode, implement
NCM support. The device is attempted to be put into NCM mode by default,
and falls back to legacy mode if the attempt fails.
Signed-off-by: Foster Snowhill <forst@pen.gy>
Tested-by: Georgi Valkov <gvalkov@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/usb/ipheth.c | 180 +++++++++++++++++++++++++++++++++------
1 file changed, 155 insertions(+), 25 deletions(-)
--- a/drivers/net/usb/ipheth.c
+++ b/drivers/net/usb/ipheth.c
@@ -52,6 +52,7 @@
#include <linux/ethtool.h>
#include <linux/usb.h>
#include <linux/workqueue.h>
+#include <linux/usb/cdc.h>
#define USB_VENDOR_APPLE 0x05ac
@@ -59,8 +60,12 @@
#define IPHETH_USBINTF_SUBCLASS 253
#define IPHETH_USBINTF_PROTO 1
-#define IPHETH_BUF_SIZE 1514
#define IPHETH_IP_ALIGN 2 /* padding at front of URB */
+#define IPHETH_NCM_HEADER_SIZE (12 + 96) /* NCMH + NCM0 */
+#define IPHETH_TX_BUF_SIZE ETH_FRAME_LEN
+#define IPHETH_RX_BUF_SIZE_LEGACY (IPHETH_IP_ALIGN + ETH_FRAME_LEN)
+#define IPHETH_RX_BUF_SIZE_NCM 65536
+
#define IPHETH_TX_TIMEOUT (5 * HZ)
#define IPHETH_INTFNUM 2
@@ -71,6 +76,7 @@
#define IPHETH_CTRL_TIMEOUT (5 * HZ)
#define IPHETH_CMD_GET_MACADDR 0x00
+#define IPHETH_CMD_ENABLE_NCM 0x04
#define IPHETH_CMD_CARRIER_CHECK 0x45
#define IPHETH_CARRIER_CHECK_TIMEOUT round_jiffies_relative(1 * HZ)
@@ -97,6 +103,8 @@ struct ipheth_device {
u8 bulk_out;
struct delayed_work carrier_work;
bool confirmed_pairing;
+ int (*rcvbulk_callback)(struct urb *urb);
+ size_t rx_buf_len;
};
static int ipheth_rx_submit(struct ipheth_device *dev, gfp_t mem_flags);
@@ -116,12 +124,12 @@ static int ipheth_alloc_urbs(struct iphe
if (rx_urb == NULL)
goto free_tx_urb;
- tx_buf = usb_alloc_coherent(iphone->udev, IPHETH_BUF_SIZE,
+ tx_buf = usb_alloc_coherent(iphone->udev, IPHETH_TX_BUF_SIZE,
GFP_KERNEL, &tx_urb->transfer_dma);
if (tx_buf == NULL)
goto free_rx_urb;
- rx_buf = usb_alloc_coherent(iphone->udev, IPHETH_BUF_SIZE + IPHETH_IP_ALIGN,
+ rx_buf = usb_alloc_coherent(iphone->udev, iphone->rx_buf_len,
GFP_KERNEL, &rx_urb->transfer_dma);
if (rx_buf == NULL)
goto free_tx_buf;
@@ -134,7 +142,7 @@ static int ipheth_alloc_urbs(struct iphe
return 0;
free_tx_buf:
- usb_free_coherent(iphone->udev, IPHETH_BUF_SIZE, tx_buf,
+ usb_free_coherent(iphone->udev, IPHETH_TX_BUF_SIZE, tx_buf,
tx_urb->transfer_dma);
free_rx_urb:
usb_free_urb(rx_urb);
@@ -146,9 +154,9 @@ error_nomem:
static void ipheth_free_urbs(struct ipheth_device *iphone)
{
- usb_free_coherent(iphone->udev, IPHETH_BUF_SIZE + IPHETH_IP_ALIGN, iphone->rx_buf,
+ usb_free_coherent(iphone->udev, iphone->rx_buf_len, iphone->rx_buf,
iphone->rx_urb->transfer_dma);
- usb_free_coherent(iphone->udev, IPHETH_BUF_SIZE, iphone->tx_buf,
+ usb_free_coherent(iphone->udev, IPHETH_TX_BUF_SIZE, iphone->tx_buf,
iphone->tx_urb->transfer_dma);
usb_free_urb(iphone->rx_urb);
usb_free_urb(iphone->tx_urb);
@@ -160,15 +168,106 @@ static void ipheth_kill_urbs(struct iphe
usb_kill_urb(dev->rx_urb);
}
-static void ipheth_rcvbulk_callback(struct urb *urb)
+static int ipheth_consume_skb(char *buf, int len, struct ipheth_device *dev)
{
- struct ipheth_device *dev;
struct sk_buff *skb;
- int status;
+
+ skb = dev_alloc_skb(len);
+ if (!skb) {
+ dev->net->stats.rx_dropped++;
+ return -ENOMEM;
+ }
+
+ skb_put_data(skb, buf, len);
+ skb->dev = dev->net;
+ skb->protocol = eth_type_trans(skb, dev->net);
+
+ dev->net->stats.rx_packets++;
+ dev->net->stats.rx_bytes += len;
+ netif_rx(skb);
+
+ return 0;
+}
+
+static int ipheth_rcvbulk_callback_legacy(struct urb *urb)
+{
+ struct ipheth_device *dev;
+ char *buf;
+ int len;
+
+ dev = urb->context;
+
+ if (urb->actual_length <= IPHETH_IP_ALIGN) {
+ dev->net->stats.rx_length_errors++;
+ return -EINVAL;
+ }
+ len = urb->actual_length - IPHETH_IP_ALIGN;
+ buf = urb->transfer_buffer + IPHETH_IP_ALIGN;
+
+ return ipheth_consume_skb(buf, len, dev);
+}
+
+static int ipheth_rcvbulk_callback_ncm(struct urb *urb)
+{
+ struct usb_cdc_ncm_nth16 *ncmh;
+ struct usb_cdc_ncm_ndp16 *ncm0;
+ struct usb_cdc_ncm_dpe16 *dpe;
+ struct ipheth_device *dev;
+ int retval = -EINVAL;
char *buf;
int len;
dev = urb->context;
+
+ if (urb->actual_length < IPHETH_NCM_HEADER_SIZE) {
+ dev->net->stats.rx_length_errors++;
+ return retval;
+ }
+
+ ncmh = urb->transfer_buffer;
+ if (ncmh->dwSignature != cpu_to_le32(USB_CDC_NCM_NTH16_SIGN) ||
+ le16_to_cpu(ncmh->wNdpIndex) >= urb->actual_length) {
+ dev->net->stats.rx_errors++;
+ return retval;
+ }
+
+ ncm0 = urb->transfer_buffer + le16_to_cpu(ncmh->wNdpIndex);
+ if (ncm0->dwSignature != cpu_to_le32(USB_CDC_NCM_NDP16_NOCRC_SIGN) ||
+ le16_to_cpu(ncmh->wHeaderLength) + le16_to_cpu(ncm0->wLength) >=
+ urb->actual_length) {
+ dev->net->stats.rx_errors++;
+ return retval;
+ }
+
+ dpe = ncm0->dpe16;
+ while (le16_to_cpu(dpe->wDatagramIndex) != 0 &&
+ le16_to_cpu(dpe->wDatagramLength) != 0) {
+ if (le16_to_cpu(dpe->wDatagramIndex) >= urb->actual_length ||
+ le16_to_cpu(dpe->wDatagramIndex) +
+ le16_to_cpu(dpe->wDatagramLength) > urb->actual_length) {
+ dev->net->stats.rx_length_errors++;
+ return retval;
+ }
+
+ buf = urb->transfer_buffer + le16_to_cpu(dpe->wDatagramIndex);
+ len = le16_to_cpu(dpe->wDatagramLength);
+
+ retval = ipheth_consume_skb(buf, len, dev);
+ if (retval != 0)
+ return retval;
+
+ dpe++;
+ }
+
+ return 0;
+}
+
+static void ipheth_rcvbulk_callback(struct urb *urb)
+{
+ struct ipheth_device *dev;
+ int retval, status;
+
+ dev = urb->context;
if (dev == NULL)
return;
@@ -191,25 +290,27 @@ static void ipheth_rcvbulk_callback(stru
dev->net->stats.rx_length_errors++;
return;
}
- len = urb->actual_length - IPHETH_IP_ALIGN;
- buf = urb->transfer_buffer + IPHETH_IP_ALIGN;
- skb = dev_alloc_skb(len);
- if (!skb) {
- dev_err(&dev->intf->dev, "%s: dev_alloc_skb: -ENOMEM\n",
- __func__);
- dev->net->stats.rx_dropped++;
+ /* RX URBs starting with 0x00 0x01 do not encapsulate Ethernet frames,
+ * but rather are control frames. Their purpose is not documented, and
+ * they don't affect driver functionality, okay to drop them.
+ * There is usually just one 4-byte control frame as the very first
+ * URB received from the bulk IN endpoint.
+ */
+ if (unlikely
+ (((char *)urb->transfer_buffer)[0] == 0 &&
+ ((char *)urb->transfer_buffer)[1] == 1))
+ goto rx_submit;
+
+ retval = dev->rcvbulk_callback(urb);
+ if (retval != 0) {
+ dev_err(&dev->intf->dev, "%s: callback retval: %d\n",
+ __func__, retval);
return;
}
- skb_put_data(skb, buf, len);
- skb->dev = dev->net;
- skb->protocol = eth_type_trans(skb, dev->net);
-
- dev->net->stats.rx_packets++;
- dev->net->stats.rx_bytes += len;
+rx_submit:
dev->confirmed_pairing = true;
- netif_rx(skb);
ipheth_rx_submit(dev, GFP_ATOMIC);
}
@@ -310,6 +411,27 @@ static int ipheth_get_macaddr(struct iph
return retval;
}
+static int ipheth_enable_ncm(struct ipheth_device *dev)
+{
+ struct usb_device *udev = dev->udev;
+ int retval;
+
+ retval = usb_control_msg(udev,
+ usb_sndctrlpipe(udev, IPHETH_CTRL_ENDP),
+ IPHETH_CMD_ENABLE_NCM, /* request */
+ 0x41, /* request type */
+ 0x00, /* value */
+ 0x02, /* index */
+ NULL,
+ 0,
+ IPHETH_CTRL_TIMEOUT);
+
+ dev_info(&dev->intf->dev, "%s: usb_control_msg: %d\n",
+ __func__, retval);
+
+ return retval;
+}
+
static int ipheth_rx_submit(struct ipheth_device *dev, gfp_t mem_flags)
{
struct usb_device *udev = dev->udev;
@@ -317,7 +439,7 @@ static int ipheth_rx_submit(struct iphet
usb_fill_bulk_urb(dev->rx_urb, udev,
usb_rcvbulkpipe(udev, dev->bulk_in),
- dev->rx_buf, IPHETH_BUF_SIZE + IPHETH_IP_ALIGN,
+ dev->rx_buf, dev->rx_buf_len,
ipheth_rcvbulk_callback,
dev);
dev->rx_urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
@@ -365,7 +487,7 @@ static netdev_tx_t ipheth_tx(struct sk_b
int retval;
/* Paranoid */
- if (skb->len > IPHETH_BUF_SIZE) {
+ if (skb->len > IPHETH_TX_BUF_SIZE) {
WARN(1, "%s: skb too large: %d bytes\n", __func__, skb->len);
dev->net->stats.tx_dropped++;
dev_kfree_skb_any(skb);
@@ -448,6 +570,8 @@ static int ipheth_probe(struct usb_inter
dev->net = netdev;
dev->intf = intf;
dev->confirmed_pairing = false;
+ dev->rx_buf_len = IPHETH_RX_BUF_SIZE_LEGACY;
+ dev->rcvbulk_callback = ipheth_rcvbulk_callback_legacy;
/* Set up endpoints */
hintf = usb_altnum_to_altsetting(intf, IPHETH_ALT_INTFNUM);
if (hintf == NULL) {
@@ -479,6 +603,12 @@ static int ipheth_probe(struct usb_inter
if (retval)
goto err_get_macaddr;
+ retval = ipheth_enable_ncm(dev);
+ if (!retval) {
+ dev->rx_buf_len = IPHETH_RX_BUF_SIZE_NCM;
+ dev->rcvbulk_callback = ipheth_rcvbulk_callback_ncm;
+ }
+
INIT_DELAYED_WORK(&dev->carrier_work, ipheth_carrier_check_work);
retval = ipheth_alloc_urbs(dev);

View File

@ -0,0 +1,36 @@
From 0c6e9d32ef0ccfcf2d875cbcff23bf345a54d585 Mon Sep 17 00:00:00 2001
From: Foster Snowhill <forst@pen.gy>
Date: Wed, 7 Jun 2023 15:57:02 +0200
Subject: [PATCH 4/4] usbnet: ipheth: update Kconfig description
This module has for a long time not been limited to iPhone <= 3GS.
Update description to match the actual state of the driver.
Remove dead link from 2010, instead reference an existing userspace
iOS device pairing implementation as part of libimobiledevice.
Signed-off-by: Foster Snowhill <forst@pen.gy>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/usb/Kconfig | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
--- a/drivers/net/usb/Kconfig
+++ b/drivers/net/usb/Kconfig
@@ -583,12 +583,10 @@ config USB_IPHETH
default n
help
Module used to share Internet connection (tethering) from your
- iPhone (Original, 3G and 3GS) to your system.
- Note that you need userspace libraries and programs that are needed
- to pair your device with your system and that understand the iPhone
- protocol.
-
- For more information: http://giagio.com/wiki/moin.cgi/iPhoneEthernetDriver
+ iPhone to your system.
+ Note that you need a corresponding userspace library/program
+ to pair your device with your system, for example usbmuxd
+ <https://github.com/libimobiledevice/usbmuxd>.
config USB_SIERRA_NET
tristate "USB-to-WWAN Driver for Sierra Wireless modems"

View File

@ -4279,6 +4279,7 @@ CONFIG_NEW_LEDS=y
# CONFIG_NFC is not set # CONFIG_NFC is not set
# CONFIG_NFP is not set # CONFIG_NFP is not set
# CONFIG_NFSD is not set # CONFIG_NFSD is not set
# CONFIG_NFSD_V2 is not set
# CONFIG_NFSD_V2_ACL is not set # CONFIG_NFSD_V2_ACL is not set
CONFIG_NFSD_V3=y CONFIG_NFSD_V3=y
# CONFIG_NFSD_V3_ACL is not set # CONFIG_NFSD_V3_ACL is not set

View File

@ -27,8 +27,8 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+#define SYMTAB_DISCARD_GPL +#define SYMTAB_DISCARD_GPL
+#endif +#endif
+ +
/* Align . to a 8 byte boundary equals to maximum function alignment. */ /* Align . function alignment. */
#define ALIGN_FUNCTION() . = ALIGN(8) #define ALIGN_FUNCTION() . = ALIGN(CONFIG_FUNCTION_ALIGNMENT)
@@ -485,14 +495,14 @@ @@ -485,14 +495,14 @@
/* Kernel symbol table: Normal symbols */ \ /* Kernel symbol table: Normal symbols */ \

View File

@ -43,7 +43,7 @@ Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support
#define QUECTEL_VENDOR_ID 0x2c7c #define QUECTEL_VENDOR_ID 0x2c7c
/* These Quectel products use Quectel's vendor ID */ /* These Quectel products use Quectel's vendor ID */
@@ -1147,6 +1152,11 @@ static const struct usb_device_id option @@ -1152,6 +1157,11 @@ static const struct usb_device_id option
{ USB_DEVICE(QUALCOMM_VENDOR_ID, 0x0023)}, /* ONYX 3G device */ { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x0023)}, /* ONYX 3G device */
{ USB_DEVICE(QUALCOMM_VENDOR_ID, 0x9000), /* SIMCom SIM5218 */ { USB_DEVICE(QUALCOMM_VENDOR_ID, 0x9000), /* SIMCom SIM5218 */
.driver_info = NCTRL(0) | NCTRL(1) | NCTRL(2) | NCTRL(3) | RSVD(4) }, .driver_info = NCTRL(0) | NCTRL(1) | NCTRL(2) | NCTRL(3) | RSVD(4) },
@ -55,7 +55,7 @@ Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support
/* Quectel products using Qualcomm vendor ID */ /* Quectel products using Qualcomm vendor ID */
{ USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC15)}, { USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC15)},
{ USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC20), { USB_DEVICE(QUALCOMM_VENDOR_ID, QUECTEL_PRODUCT_UC20),
@@ -1188,6 +1198,11 @@ static const struct usb_device_id option @@ -1193,6 +1203,11 @@ static const struct usb_device_id option
.driver_info = ZLP }, .driver_info = ZLP },
{ USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96), { USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96),
.driver_info = RSVD(4) }, .driver_info = RSVD(4) },

View File

@ -29,7 +29,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/fs/locks.c --- a/fs/locks.c
+++ b/fs/locks.c +++ b/fs/locks.c
@@ -2953,6 +2953,8 @@ static const struct seq_operations locks @@ -3008,6 +3008,8 @@ static const struct seq_operations locks
static int __init proc_locks_init(void) static int __init proc_locks_init(void)
{ {

View File

@ -19,7 +19,7 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
--- a/drivers/base/core.c --- a/drivers/base/core.c
+++ b/drivers/base/core.c +++ b/drivers/base/core.c
@@ -1562,7 +1562,7 @@ static void device_links_purge(struct de @@ -1577,7 +1577,7 @@ static void device_links_purge(struct de
#define FW_DEVLINK_FLAGS_RPM (FW_DEVLINK_FLAGS_ON | \ #define FW_DEVLINK_FLAGS_RPM (FW_DEVLINK_FLAGS_ON | \
DL_FLAG_PM_RUNTIME) DL_FLAG_PM_RUNTIME)

View File

@ -71,7 +71,7 @@ Signed-off-by: Tobias Wolf <dev-NTEO@vplace.de>
--- a/mm/page_alloc.c --- a/mm/page_alloc.c
+++ b/mm/page_alloc.c +++ b/mm/page_alloc.c
@@ -7620,7 +7620,7 @@ static void __init alloc_node_mem_map(st @@ -7622,7 +7622,7 @@ static void __init alloc_node_mem_map(st
if (pgdat == NODE_DATA(0)) { if (pgdat == NODE_DATA(0)) {
mem_map = NODE_DATA(0)->node_mem_map; mem_map = NODE_DATA(0)->node_mem_map;
if (page_to_pfn(mem_map) != pgdat->node_start_pfn) if (page_to_pfn(mem_map) != pgdat->node_start_pfn)

View File

@ -0,0 +1,75 @@
From 52d14545d2fc276b1bf9ccf48d4612fab6edfb6a Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Thu, 6 May 2021 17:49:55 +0200
Subject: [PATCH] mtd: spi-nor: Add support for BoHong bh25q128as
Add MTD support for the BoHong bh25q128as SPI NOR chip.
The chip has 16MB of total capacity, divided into a total of 256
sectors, each 64KB sized. The chip also supports 4KB sectors.
Additionally, it supports dual and quad read modes.
Functionality was verified on an Tenbay WR1800K / MTK MT7621 board.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
drivers/mtd/spi-nor/Makefile | 1 +
drivers/mtd/spi-nor/bohong.c | 21 +++++++++++++++++++++
drivers/mtd/spi-nor/core.c | 1 +
drivers/mtd/spi-nor/core.h | 1 +
4 files changed, 24 insertions(+)
create mode 100644 drivers/mtd/spi-nor/bohong.c
--- a/drivers/mtd/spi-nor/Makefile
+++ b/drivers/mtd/spi-nor/Makefile
@@ -2,6 +2,7 @@
spi-nor-objs := core.o sfdp.o swp.o otp.o sysfs.o
spi-nor-objs += atmel.o
+spi-nor-objs += bohong.o
spi-nor-objs += catalyst.o
spi-nor-objs += eon.o
spi-nor-objs += esmt.o
--- /dev/null
+++ b/drivers/mtd/spi-nor/bohong.c
@@ -0,0 +1,21 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2005, Intec Automation Inc.
+ * Copyright (C) 2014, Freescale Semiconductor, Inc.
+ */
+
+#include <linux/mtd/spi-nor.h>
+
+#include "core.h"
+
+static const struct flash_info bohong_parts[] = {
+ /* BoHong Microelectronics */
+ { "bh25q128as", INFO(0x684018, 0, 64 * 1024, 256)
+ NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
+};
+
+const struct spi_nor_manufacturer spi_nor_bohong = {
+ .name = "bohong",
+ .parts = bohong_parts,
+ .nparts = ARRAY_SIZE(bohong_parts),
+};
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -2001,6 +2001,7 @@ int spi_nor_sr2_bit7_quad_enable(struct
static const struct spi_nor_manufacturer *manufacturers[] = {
&spi_nor_atmel,
+ &spi_nor_bohong,
&spi_nor_catalyst,
&spi_nor_eon,
&spi_nor_esmt,
--- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h
@@ -631,6 +631,7 @@ struct sfdp {
/* Manufacturer drivers. */
extern const struct spi_nor_manufacturer spi_nor_atmel;
+extern const struct spi_nor_manufacturer spi_nor_bohong;
extern const struct spi_nor_manufacturer spi_nor_catalyst;
extern const struct spi_nor_manufacturer spi_nor_eon;
extern const struct spi_nor_manufacturer spi_nor_esmt;

View File

@ -31,7 +31,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/drivers/mtd/spi-nor/Makefile --- a/drivers/mtd/spi-nor/Makefile
+++ b/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile
@@ -17,6 +17,7 @@ spi-nor-objs += sst.o @@ -18,6 +18,7 @@ spi-nor-objs += sst.o
spi-nor-objs += winbond.o spi-nor-objs += winbond.o
spi-nor-objs += xilinx.o spi-nor-objs += xilinx.o
spi-nor-objs += xmc.o spi-nor-objs += xmc.o
@ -59,7 +59,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+}; +};
--- a/drivers/mtd/spi-nor/core.c --- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c
@@ -1860,6 +1860,7 @@ static const struct spi_nor_manufacturer @@ -1861,6 +1861,7 @@ static const struct spi_nor_manufacturer
&spi_nor_winbond, &spi_nor_winbond,
&spi_nor_xilinx, &spi_nor_xilinx,
&spi_nor_xmc, &spi_nor_xmc,
@ -69,7 +69,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
static const struct flash_info * static const struct flash_info *
--- a/drivers/mtd/spi-nor/core.h --- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h
@@ -489,6 +489,7 @@ extern const struct spi_nor_manufacturer @@ -490,6 +490,7 @@ extern const struct spi_nor_manufacturer
extern const struct spi_nor_manufacturer spi_nor_winbond; extern const struct spi_nor_manufacturer spi_nor_winbond;
extern const struct spi_nor_manufacturer spi_nor_xilinx; extern const struct spi_nor_manufacturer spi_nor_xilinx;
extern const struct spi_nor_manufacturer spi_nor_xmc; extern const struct spi_nor_manufacturer spi_nor_xmc;

View File

@ -91,7 +91,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
for (i = sizeof(struct ipt_entry); for (i = sizeof(struct ipt_entry);
i < e->target_offset; i < e->target_offset;
i += m->u.match_size) { i += m->u.match_size) {
@@ -1222,12 +1259,15 @@ compat_copy_entry_to_user(struct ipt_ent @@ -1224,12 +1261,15 @@ compat_copy_entry_to_user(struct ipt_ent
compat_uint_t origsize; compat_uint_t origsize;
const struct xt_entry_match *ematch; const struct xt_entry_match *ematch;
int ret = 0; int ret = 0;

View File

@ -18,7 +18,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/net/netfilter/nf_tables_api.c --- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c +++ b/net/netfilter/nf_tables_api.c
@@ -7770,7 +7770,7 @@ static int nft_register_flowtable_net_ho @@ -7803,7 +7803,7 @@ static int nft_register_flowtable_net_ho
err = flowtable->data.type->setup(&flowtable->data, err = flowtable->data.type->setup(&flowtable->data,
hook->ops.dev, hook->ops.dev,
FLOW_BLOCK_BIND); FLOW_BLOCK_BIND);

View File

@ -17,7 +17,7 @@ Signed-off-by: Alexander Duyck <alexanderduyck@fb.com>
--- a/net/core/skbuff.c --- a/net/core/skbuff.c
+++ b/net/core/skbuff.c +++ b/net/core/skbuff.c
@@ -4359,6 +4359,15 @@ int skb_gro_receive(struct sk_buff *p, s @@ -4360,6 +4360,15 @@ int skb_gro_receive(struct sk_buff *p, s
if (unlikely(p->len + len >= 65536 || NAPI_GRO_CB(skb)->flush)) if (unlikely(p->len + len >= 65536 || NAPI_GRO_CB(skb)->flush))
return -E2BIG; return -E2BIG;

View File

@ -25,7 +25,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
--- a/drivers/pci/quirks.c --- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c
@@ -206,6 +206,7 @@ static void quirk_mmio_always_on(struct @@ -207,6 +207,7 @@ static void quirk_mmio_always_on(struct
DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID, DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on); PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on);
@ -33,7 +33,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
/* /*
* The Mellanox Tavor device gives false positive parity errors. Disable * The Mellanox Tavor device gives false positive parity errors. Disable
* parity error reporting. * parity error reporting.
@@ -3368,6 +3369,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I @@ -3369,6 +3370,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
@ -42,7 +42,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
/* /*
* Ivytown NTB BAR sizes are misreported by the hardware due to an erratum. * Ivytown NTB BAR sizes are misreported by the hardware due to an erratum.
* To work around this, query the size it should be configured to by the * To work around this, query the size it should be configured to by the
@@ -3393,6 +3396,8 @@ static void quirk_intel_ntb(struct pci_d @@ -3394,6 +3397,8 @@ static void quirk_intel_ntb(struct pci_d
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb); DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb);
@ -51,7 +51,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
/* /*
* Some BIOS implementations leave the Intel GPU interrupts enabled, even * Some BIOS implementations leave the Intel GPU interrupts enabled, even
* though no one is handling them (e.g., if the i915 driver is never * though no one is handling them (e.g., if the i915 driver is never
@@ -3431,6 +3436,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN @@ -3432,6 +3437,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);

View File

@ -202,7 +202,7 @@ Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
return !!nor->params->erase_map.uniform_erase_type; return !!nor->params->erase_map.uniform_erase_type;
} }
@@ -2158,6 +2160,7 @@ static int spi_nor_select_erase(struct s @@ -2180,6 +2182,7 @@ static int spi_nor_select_erase(struct s
{ {
struct spi_nor_erase_map *map = &nor->params->erase_map; struct spi_nor_erase_map *map = &nor->params->erase_map;
const struct spi_nor_erase_type *erase = NULL; const struct spi_nor_erase_type *erase = NULL;
@ -210,7 +210,7 @@ Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
struct mtd_info *mtd = &nor->mtd; struct mtd_info *mtd = &nor->mtd;
u32 wanted_size = nor->info->sector_size; u32 wanted_size = nor->info->sector_size;
int i; int i;
@@ -2190,8 +2193,9 @@ static int spi_nor_select_erase(struct s @@ -2212,8 +2215,9 @@ static int spi_nor_select_erase(struct s
*/ */
for (i = SNOR_ERASE_TYPE_MAX - 1; i >= 0; i--) { for (i = SNOR_ERASE_TYPE_MAX - 1; i >= 0; i--) {
if (map->erase_type[i].size) { if (map->erase_type[i].size) {
@ -222,7 +222,7 @@ Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
} }
} }
@@ -2199,6 +2203,9 @@ static int spi_nor_select_erase(struct s @@ -2221,6 +2225,9 @@ static int spi_nor_select_erase(struct s
return -EINVAL; return -EINVAL;
mtd->erasesize = erase->size; mtd->erasesize = erase->size;

View File

@ -68,7 +68,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+ &spi_nor_xtx, + &spi_nor_xtx,
}; };
static const struct flash_info *spi_nor_match_id(struct spi_nor *nor, static const struct flash_info spi_nor_generic_flash = {
--- a/drivers/mtd/spi-nor/core.h --- a/drivers/mtd/spi-nor/core.h
+++ b/drivers/mtd/spi-nor/core.h +++ b/drivers/mtd/spi-nor/core.h
@@ -633,6 +633,7 @@ extern const struct spi_nor_manufacturer @@ -633,6 +633,7 @@ extern const struct spi_nor_manufacturer

View File

@ -487,7 +487,6 @@
qcom,coexist-support = <1>; qcom,coexist-support = <1>;
qcom,coexist-gpio-pin = <0x34>; qcom,coexist-gpio-pin = <0x34>;
ieee80211-freq-limit = <2401000 2473000>;
qcom,ath10k-calibration-variant = "linksys-whw03v2"; qcom,ath10k-calibration-variant = "linksys-whw03v2";
nvmem-cell-names = "pre-calibration", "mac-address"; nvmem-cell-names = "pre-calibration", "mac-address";
@ -497,7 +496,7 @@
&wifi1 { &wifi1 {
status = "okay"; status = "okay";
ieee80211-freq-limit = <5170000 5250000>; ieee80211-freq-limit = <5170000 5330000>;
qcom,ath10k-calibration-variant = "linksys-whw03v2"; qcom,ath10k-calibration-variant = "linksys-whw03v2";
nvmem-cell-names = "pre-calibration", "mac-address"; nvmem-cell-names = "pre-calibration", "mac-address";
@ -507,7 +506,7 @@
&wifi2 { &wifi2 {
status = "okay"; status = "okay";
ieee80211-freq-limit = <5735000 5835000>; ieee80211-freq-limit = <5490000 5835000>;
qcom,ath10k-calibration-variant = "linksys-whw03v2"; qcom,ath10k-calibration-variant = "linksys-whw03v2";
nvmem-cell-names = "pre-calibration", "mac-address"; nvmem-cell-names = "pre-calibration", "mac-address";

View File

@ -487,7 +487,6 @@
qcom,coexist-support = <1>; qcom,coexist-support = <1>;
qcom,coexist-gpio-pin = <0x34>; qcom,coexist-gpio-pin = <0x34>;
ieee80211-freq-limit = <2401000 2473000>;
qcom,ath10k-calibration-variant = "linksys-whw03v2"; qcom,ath10k-calibration-variant = "linksys-whw03v2";
nvmem-cell-names = "pre-calibration", "mac-address"; nvmem-cell-names = "pre-calibration", "mac-address";
@ -497,7 +496,7 @@
&wifi1 { &wifi1 {
status = "okay"; status = "okay";
ieee80211-freq-limit = <5170000 5250000>; ieee80211-freq-limit = <5170000 5330000>;
qcom,ath10k-calibration-variant = "linksys-whw03v2"; qcom,ath10k-calibration-variant = "linksys-whw03v2";
nvmem-cell-names = "pre-calibration", "mac-address"; nvmem-cell-names = "pre-calibration", "mac-address";
@ -507,7 +506,7 @@
&wifi2 { &wifi2 {
status = "okay"; status = "okay";
ieee80211-freq-limit = <5735000 5835000>; ieee80211-freq-limit = <5490000 5835000>;
qcom,ath10k-calibration-variant = "linksys-whw03v2"; qcom,ath10k-calibration-variant = "linksys-whw03v2";
nvmem-cell-names = "pre-calibration", "mac-address"; nvmem-cell-names = "pre-calibration", "mac-address";

View File

@ -5524,7 +5524,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
(transaction layer end-to-end CRC checking). (transaction layer end-to-end CRC checking).
--- a/include/linux/pci.h --- a/include/linux/pci.h
+++ b/include/linux/pci.h +++ b/include/linux/pci.h
@@ -1482,6 +1482,8 @@ void pci_walk_bus(struct pci_bus *top, i @@ -1483,6 +1483,8 @@ void pci_walk_bus(struct pci_bus *top, i
void *userdata); void *userdata);
int pci_cfg_space_size(struct pci_dev *dev); int pci_cfg_space_size(struct pci_dev *dev);
unsigned char pci_bus_max_busnr(struct pci_bus *bus); unsigned char pci_bus_max_busnr(struct pci_bus *bus);

View File

@ -26,7 +26,7 @@ Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
--- a/drivers/mtd/spi-nor/core.c --- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c
@@ -2900,6 +2900,18 @@ static const struct flash_info *spi_nor_ @@ -2922,6 +2922,18 @@ static const struct flash_info *spi_nor_
return NULL; return NULL;
} }
@ -45,7 +45,7 @@ Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
static const struct flash_info *spi_nor_get_flash_info(struct spi_nor *nor, static const struct flash_info *spi_nor_get_flash_info(struct spi_nor *nor,
const char *name) const char *name)
{ {
@@ -3003,6 +3015,9 @@ int spi_nor_scan(struct spi_nor *nor, co @@ -3025,6 +3037,9 @@ int spi_nor_scan(struct spi_nor *nor, co
if (!nor->bouncebuf) if (!nor->bouncebuf)
return -ENOMEM; return -ENOMEM;

View File

@ -0,0 +1,147 @@
From 967da67a745fb73fd0fc7aa61fd197b76fceb273 Mon Sep 17 00:00:00 2001
From: Daniel Golle <daniel@makrotopia.org>
Date: Fri, 21 Apr 2023 00:23:21 +0100
Subject: [PATCH] pwm: mediatek: Add support for MT7981
The PWM unit on MT7981 uses different register offsets than previous
MediaTek PWM units. Add support for these new offsets and add support
for PWM on MT7981 which has 3 PWM channels, one of them is typically
used for a temperature controlled fan.
While at it, also reorder pwm_mediatek_of_data entries to restore
alphabetic order.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
---
drivers/pwm/pwm-mediatek.c | 39 ++++++++++++++++++++++++++++++--------
1 file changed, 31 insertions(+), 8 deletions(-)
--- a/drivers/pwm/pwm-mediatek.c
+++ b/drivers/pwm/pwm-mediatek.c
@@ -38,6 +38,7 @@ struct pwm_mediatek_of_data {
unsigned int num_pwms;
bool pwm45_fixup;
bool has_ck_26m_sel;
+ const unsigned int *reg_offset;
};
/**
@@ -59,10 +60,14 @@ struct pwm_mediatek_chip {
const struct pwm_mediatek_of_data *soc;
};
-static const unsigned int pwm_mediatek_reg_offset[] = {
+static const unsigned int mtk_pwm_reg_offset_v1[] = {
0x0010, 0x0050, 0x0090, 0x00d0, 0x0110, 0x0150, 0x0190, 0x0220
};
+static const unsigned int mtk_pwm_reg_offset_v2[] = {
+ 0x0080, 0x00c0, 0x0100, 0x0140, 0x0180, 0x01c0, 0x0200, 0x0240
+};
+
static inline struct pwm_mediatek_chip *
to_pwm_mediatek_chip(struct pwm_chip *chip)
{
@@ -111,7 +116,7 @@ static inline void pwm_mediatek_writel(s
unsigned int num, unsigned int offset,
u32 value)
{
- writel(value, chip->regs + pwm_mediatek_reg_offset[num] + offset);
+ writel(value, chip->regs + chip->soc->reg_offset[num] + offset);
}
static int pwm_mediatek_config(struct pwm_chip *chip, struct pwm_device *pwm,
@@ -285,60 +290,77 @@ static const struct pwm_mediatek_of_data
.num_pwms = 8,
.pwm45_fixup = false,
.has_ck_26m_sel = false,
+ .reg_offset = mtk_pwm_reg_offset_v1,
};
static const struct pwm_mediatek_of_data mt6795_pwm_data = {
.num_pwms = 7,
.pwm45_fixup = false,
.has_ck_26m_sel = false,
+ .reg_offset = mtk_pwm_reg_offset_v1,
};
static const struct pwm_mediatek_of_data mt7622_pwm_data = {
.num_pwms = 6,
.pwm45_fixup = false,
.has_ck_26m_sel = true,
+ .reg_offset = mtk_pwm_reg_offset_v1,
};
static const struct pwm_mediatek_of_data mt7623_pwm_data = {
.num_pwms = 5,
.pwm45_fixup = true,
.has_ck_26m_sel = false,
+ .reg_offset = mtk_pwm_reg_offset_v1,
};
static const struct pwm_mediatek_of_data mt7628_pwm_data = {
.num_pwms = 4,
.pwm45_fixup = true,
.has_ck_26m_sel = false,
+ .reg_offset = mtk_pwm_reg_offset_v1,
};
static const struct pwm_mediatek_of_data mt7629_pwm_data = {
.num_pwms = 1,
.pwm45_fixup = false,
.has_ck_26m_sel = false,
+ .reg_offset = mtk_pwm_reg_offset_v1,
};
-static const struct pwm_mediatek_of_data mt8183_pwm_data = {
- .num_pwms = 4,
+static const struct pwm_mediatek_of_data mt7981_pwm_data = {
+ .num_pwms = 3,
.pwm45_fixup = false,
.has_ck_26m_sel = true,
+ .reg_offset = mtk_pwm_reg_offset_v2,
};
-static const struct pwm_mediatek_of_data mt8365_pwm_data = {
- .num_pwms = 3,
+static const struct pwm_mediatek_of_data mt7986_pwm_data = {
+ .num_pwms = 2,
.pwm45_fixup = false,
.has_ck_26m_sel = true,
+ .reg_offset = mtk_pwm_reg_offset_v1,
};
-static const struct pwm_mediatek_of_data mt7986_pwm_data = {
- .num_pwms = 2,
+static const struct pwm_mediatek_of_data mt8183_pwm_data = {
+ .num_pwms = 4,
+ .pwm45_fixup = false,
+ .has_ck_26m_sel = true,
+ .reg_offset = mtk_pwm_reg_offset_v1,
+};
+
+static const struct pwm_mediatek_of_data mt8365_pwm_data = {
+ .num_pwms = 3,
.pwm45_fixup = false,
.has_ck_26m_sel = true,
+ .reg_offset = mtk_pwm_reg_offset_v1,
};
static const struct pwm_mediatek_of_data mt8516_pwm_data = {
.num_pwms = 5,
.pwm45_fixup = false,
.has_ck_26m_sel = true,
+ .reg_offset = mtk_pwm_reg_offset_v1,
};
static const struct of_device_id pwm_mediatek_of_match[] = {
@@ -348,6 +370,7 @@ static const struct of_device_id pwm_med
{ .compatible = "mediatek,mt7623-pwm", .data = &mt7623_pwm_data },
{ .compatible = "mediatek,mt7628-pwm", .data = &mt7628_pwm_data },
{ .compatible = "mediatek,mt7629-pwm", .data = &mt7629_pwm_data },
+ { .compatible = "mediatek,mt7981-pwm", .data = &mt7981_pwm_data },
{ .compatible = "mediatek,mt7986-pwm", .data = &mt7986_pwm_data },
{ .compatible = "mediatek,mt8183-pwm", .data = &mt8183_pwm_data },
{ .compatible = "mediatek,mt8365-pwm", .data = &mt8365_pwm_data },

View File

@ -0,0 +1,44 @@
From eb58bf4afd708eb3c64c7b9b2c5fbfacdcdee3e5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 14 Feb 2024 15:04:54 +0100
Subject: [PATCH] pwm: mediatek: add support for MT7988
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
MT7988 uses new registers layout just like MT7981 but it supports 8 PWM
interfaces.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240214140454.6438-2-zajec5@gmail.com
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
drivers/pwm/pwm-mediatek.c | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/drivers/pwm/pwm-mediatek.c
+++ b/drivers/pwm/pwm-mediatek.c
@@ -342,6 +342,13 @@ static const struct pwm_mediatek_of_data
.reg_offset = mtk_pwm_reg_offset_v1,
};
+static const struct pwm_mediatek_of_data mt7988_pwm_data = {
+ .num_pwms = 8,
+ .pwm45_fixup = false,
+ .has_ck_26m_sel = false,
+ .reg_offset = mtk_pwm_reg_offset_v2,
+};
+
static const struct pwm_mediatek_of_data mt8183_pwm_data = {
.num_pwms = 4,
.pwm45_fixup = false,
@@ -372,6 +379,7 @@ static const struct of_device_id pwm_med
{ .compatible = "mediatek,mt7629-pwm", .data = &mt7629_pwm_data },
{ .compatible = "mediatek,mt7981-pwm", .data = &mt7981_pwm_data },
{ .compatible = "mediatek,mt7986-pwm", .data = &mt7986_pwm_data },
+ { .compatible = "mediatek,mt7988-pwm", .data = &mt7988_pwm_data },
{ .compatible = "mediatek,mt8183-pwm", .data = &mt8183_pwm_data },
{ .compatible = "mediatek,mt8365-pwm", .data = &mt8365_pwm_data },
{ .compatible = "mediatek,mt8516-pwm", .data = &mt8516_pwm_data },

View File

@ -0,0 +1,44 @@
From eb58bf4afd708eb3c64c7b9b2c5fbfacdcdee3e5 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 14 Feb 2024 15:04:54 +0100
Subject: [PATCH] pwm: mediatek: add support for MT7988
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
MT7988 uses new registers layout just like MT7981 but it supports 8 PWM
interfaces.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240214140454.6438-2-zajec5@gmail.com
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
---
drivers/pwm/pwm-mediatek.c | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/drivers/pwm/pwm-mediatek.c
+++ b/drivers/pwm/pwm-mediatek.c
@@ -341,6 +341,13 @@ static const struct pwm_mediatek_of_data
.reg_offset = mtk_pwm_reg_offset_v1,
};
+static const struct pwm_mediatek_of_data mt7988_pwm_data = {
+ .num_pwms = 8,
+ .pwm45_fixup = false,
+ .has_ck_26m_sel = false,
+ .reg_offset = mtk_pwm_reg_offset_v2,
+};
+
static const struct pwm_mediatek_of_data mt8183_pwm_data = {
.num_pwms = 4,
.pwm45_fixup = false,
@@ -371,6 +378,7 @@ static const struct of_device_id pwm_med
{ .compatible = "mediatek,mt7629-pwm", .data = &mt7629_pwm_data },
{ .compatible = "mediatek,mt7981-pwm", .data = &mt7981_pwm_data },
{ .compatible = "mediatek,mt7986-pwm", .data = &mt7986_pwm_data },
+ { .compatible = "mediatek,mt7988-pwm", .data = &mt7988_pwm_data },
{ .compatible = "mediatek,mt8183-pwm", .data = &mt8183_pwm_data },
{ .compatible = "mediatek,mt8365-pwm", .data = &mt8365_pwm_data },
{ .compatible = "mediatek,mt8516-pwm", .data = &mt8516_pwm_data },

View File

@ -12,6 +12,7 @@ CPU_TYPE:=arm926ej-s
SUBTARGETS:=generic SUBTARGETS:=generic
KERNEL_PATCHVER:=6.1 KERNEL_PATCHVER:=6.1
KERNEL_TESTING_PATCHVER:=6.6
KERNELNAME:=zImage dtbs KERNELNAME:=zImage dtbs

269
target/linux/mxs/config-6.6 Normal file
View File

@ -0,0 +1,269 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_CPU_AUTO=y
# CONFIG_ARCH_MULTI_V4 is not set
# CONFIG_ARCH_MULTI_V4T is not set
CONFIG_ARCH_MULTI_V4_V5=y
CONFIG_ARCH_MULTI_V5=y
CONFIG_ARCH_MXS=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
CONFIG_ARM_CPU_SUSPEND=y
CONFIG_ARM_HAS_GROUP_RELOCS=y
CONFIG_ARM_L1_CACHE_SHIFT=5
CONFIG_ARM_PATCH_PHYS_VIRT=y
CONFIG_ARM_THUMB=y
CONFIG_ARM_UNWIND=y
CONFIG_ATAGS=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
CONFIG_BLK_PM=y
CONFIG_BUFFER_HEAD=y
CONFIG_CC_HAVE_STACKPROTECTOR_TLS=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_CLKSRC_MMIO=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="console=ttyAMA0,115200 root=/dev/mmcblk0p2 rw rootwait"
CONFIG_CMDLINE_FROM_BOOTLOADER=y
CONFIG_COMMON_CLK=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_COREDUMP=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5TJ=y
CONFIG_CPU_ARM926T=y
# CONFIG_CPU_CACHE_ROUND_ROBIN is not set
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_V4WB=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_PM=y
CONFIG_CPU_THUMB_CAPABLE=y
CONFIG_CPU_TLB_V4WBI=y
CONFIG_CPU_USE_DOMAINS=y
CONFIG_CRC16=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_DEV_MXS_DCP=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_DEBUG_ALIGN_RODATA=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
CONFIG_DMADEVICES=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_OF=y
CONFIG_DMA_OPS=y
CONFIG_DTC=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_EXT4_FS=y
CONFIG_EXTCON=y
CONFIG_FEC=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GCC11_NO_ARRAY_BOUNDS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
# CONFIG_GIANFAR is not set
CONFIG_GLOB=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GPIO_MXS=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HID_SUPPORT=y
CONFIG_HZ_FIXED=0
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_ALGOPCA=y
CONFIG_I2C_ALGOPCF=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_MUX=y
CONFIG_I2C_MUX_PINCTRL=y
CONFIG_I2C_MXS=y
CONFIG_IIO=y
CONFIG_IIO_BUFFER=y
CONFIG_IIO_KFIFO_BUF=y
CONFIG_IIO_SYSFS_TRIGGER=y
CONFIG_IIO_TRIGGER=y
# CONFIG_IIO_TRIGGERED_BUFFER is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=y
CONFIG_IRQCHIP=y
CONFIG_IRQSTACKS=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MXS=y
CONFIG_IRQ_WORK=y
# CONFIG_ISDN is not set
CONFIG_JBD2=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEMFD_CREATE=y
CONFIG_MFD_CORE=y
CONFIG_MFD_MXS_LRADC=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_MXS=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MXS_DMA=y
# CONFIG_MXS_LRADC_ADC is not set
CONFIG_MXS_TIMER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_KUSER_HELPERS=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_EGRESS=y
CONFIG_NET_INGRESS=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NLS=y
CONFIG_NVMEM=y
CONFIG_NVMEM_LAYOUTS=y
CONFIG_NVMEM_MXS_OCOTP=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX23=y
CONFIG_PINCTRL_IMX28=y
CONFIG_PINCTRL_MXS=y
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PM=y
CONFIG_PM_CLK=y
CONFIG_POWER_SUPPLY=y
CONFIG_PPS=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_RATIONAL=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_STMP=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTC_MC146818_LIB=y
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_AMBA_PL011=y
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_MXS_AUART=y
CONFIG_SERIAL_MXS_AUART_CONSOLE=y
CONFIG_SMSC_PHY=y
CONFIG_SOC_BUS=y
CONFIG_SOC_IMX23=y
CONFIG_SOC_IMX28=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MXS=y
CONFIG_SPLIT_PTLOCK_CPUS=999999
CONFIG_STMP3XXX_RTC_WATCHDOG=y
CONFIG_STMP_DEVICE=y
CONFIG_SWPHY=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TINY_SRCU=y
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_UNWINDER_ARM=y
CONFIG_USB=y
CONFIG_USB_CHIPIDEA=y
CONFIG_USB_CHIPIDEA_HOST=y
CONFIG_USB_CHIPIDEA_IMX=y
CONFIG_USB_CHIPIDEA_UDC=y
CONFIG_USB_COMMON=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_EHCI_HCD_PLATFORM is not set
CONFIG_USB_GADGET=y
CONFIG_USB_MXS_PHY=y
CONFIG_USB_OTG=y
CONFIG_USB_PHY=y
CONFIG_USB_ROLE_SWITCH=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_ULPI_BUS=y
CONFIG_USE_OF=y
# CONFIG_VFP is not set
CONFIG_WATCHDOG_CORE=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0
CONFIG_ZBOOT_ROM_TEXT=0

View File

@ -39,6 +39,9 @@ define Device/Default
KERNEL_NAME := zImage KERNEL_NAME := zImage
KERNEL := kernel-bin | uImage none KERNEL := kernel-bin | uImage none
IMAGES := sdcard.img.gz IMAGES := sdcard.img.gz
ifneq ($(KERNEL),6.1)
DTS_DIR := $(DTS_DIR)/nxp/mxs
endif
DEVICE_DTS = $$(SOC)-$(lastword $(subst _, ,$(1))) DEVICE_DTS = $$(SOC)-$(lastword $(subst _, ,$(1)))
endef endef

View File

@ -14,7 +14,7 @@ Signed-off-by: Tim Harvey <tharvey@gateworks.com>
--- a/drivers/pci/quirks.c --- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c
@@ -25,6 +25,7 @@ @@ -26,6 +26,7 @@
#include <linux/ktime.h> #include <linux/ktime.h>
#include <linux/mm.h> #include <linux/mm.h>
#include <linux/nvme.h> #include <linux/nvme.h>
@ -22,10 +22,10 @@ Signed-off-by: Tim Harvey <tharvey@gateworks.com>
#include <linux/platform_data/x86/apple.h> #include <linux/platform_data/x86/apple.h>
#include <linux/pm_runtime.h> #include <linux/pm_runtime.h>
#include <linux/suspend.h> #include <linux/suspend.h>
@@ -5900,3 +5901,34 @@ static void nvidia_ion_ahci_fixup(struct @@ -6000,3 +6001,34 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
pdev->dev_flags |= PCI_DEV_FLAGS_HAS_MSI_MASKING; DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0xa73f, dpc_log_size);
} DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0xa76e, dpc_log_size);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, 0x0ab8, nvidia_ion_ahci_fixup); #endif
+ +
+#ifdef CONFIG_PCI_HOST_THUNDER_PEM +#ifdef CONFIG_PCI_HOST_THUNDER_PEM
+/* +/*

View File

@ -12,8 +12,7 @@ CPU_TYPE:=24kc
CPU_SUBTYPE:=24kf CPU_SUBTYPE:=24kf
SUBTARGETS:=generic SUBTARGETS:=generic
KERNEL_PATCHVER:=5.15 KERNEL_PATCHVER:=6.1
KERNEL_TESTING_PATCHVER:=6.1
include $(INCLUDE_DIR)/target.mk include $(INCLUDE_DIR)/target.mk

View File

@ -1,333 +0,0 @@
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_SD=y
# CONFIG_BOARD_INGENIC is not set
CONFIG_BOARD_SCACHE=y
CONFIG_BUILTIN_DTB=y
CONFIG_CEVT_R4K=y
CONFIG_CLKSRC_MIPS_GIC=y
CONFIG_CLKSRC_PISTACHIO=y
CONFIG_CLOCKSOURCE_WATCHDOG=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_PISTACHIO=y
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONNECTOR=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_DIEI=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
# CONFIG_CPU_HAS_SMARTMIPS is not set
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_MICROMIPS is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
# CONFIG_CPU_MIPS32_R6 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
# CONFIG_CPU_MIPS64_R6 is not set
CONFIG_CPU_MIPSR2=y
CONFIG_CPU_MIPSR2_IRQ_EI=y
CONFIG_CPU_MIPSR2_IRQ_VI=y
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
CONFIG_CPU_PM=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CPU_SUPPORTS_MSA=y
CONFIG_CRC16=y
CONFIG_CRC_CCITT=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_CSRC_R4K=y
CONFIG_DMADEVICES=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_OF=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DTC=y
CONFIG_DWMAC_GENERIC=y
CONFIG_EXT4_FS=y
# CONFIG_FIT_IMAGE_FDT_BOSTON is not set
# CONFIG_FIT_IMAGE_FDT_JAGUAR2 is not set
# CONFIG_FIT_IMAGE_FDT_LUTON is not set
CONFIG_FIT_IMAGE_FDT_MARDUK=y
# CONFIG_FIT_IMAGE_FDT_NI169445 is not set
# CONFIG_FIT_IMAGE_FDT_OCELOT is not set
# CONFIG_FIT_IMAGE_FDT_SERVAL is not set
# CONFIG_FIT_IMAGE_FDT_XILFPGA is not set
CONFIG_FIXED_PHY=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_FIND_FIRST_BIT=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_LIB_ASHLDI3=y
CONFIG_GENERIC_LIB_ASHRDI3=y
CONFIG_GENERIC_LIB_CMPDI2=y
CONFIG_GENERIC_LIB_LSHRDI3=y
CONFIG_GENERIC_LIB_UCMPDI2=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HOTPLUG_CPU=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_IMG=y
CONFIG_IMGPDC_WDT=y
CONFIG_IMG_MDC_DMA=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
CONFIG_JBD2=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_PWM=y
# CONFIG_LEGACY_BOARD_OCELOT is not set
# CONFIG_LEGACY_BOARD_SEAD3 is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOG_BUF_SHIFT=18
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEMFD_CREATE=y
CONFIG_MFD_SYSCON=y
CONFIG_MICREL_PHY=y
CONFIG_MIGRATION=y
CONFIG_MIPS=y
CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
CONFIG_MIPS_AUTO_PFN_OFFSET=y
CONFIG_MIPS_CLOCK_VSYSCALL=y
CONFIG_MIPS_CM=y
CONFIG_MIPS_CMDLINE_DTB_EXTEND=y
# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
CONFIG_MIPS_CPC=y
CONFIG_MIPS_CPS=y
# CONFIG_MIPS_CPS_CPUIDLE is not set
# CONFIG_MIPS_CPS_NS16550_BOOL is not set
CONFIG_MIPS_CPS_PM=y
CONFIG_MIPS_CPU_SCACHE=y
CONFIG_MIPS_EBPF_JIT=y
CONFIG_MIPS_GENERIC=y
CONFIG_MIPS_GENERIC_KERNEL=y
CONFIG_MIPS_GIC=y
CONFIG_MIPS_L1_CACHE_SHIFT=7
CONFIG_MIPS_L1_CACHE_SHIFT_7=y
CONFIG_MIPS_LD_CAN_LINK_VDSO=y
CONFIG_MIPS_MT=y
CONFIG_MIPS_MT_FPAFF=y
CONFIG_MIPS_MT_SMP=y
CONFIG_MIPS_NO_APPENDED_DTB=y
CONFIG_MIPS_NR_CPU_NR_MAP=4
CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y
CONFIG_MIPS_SPRAM=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_DW=y
# CONFIG_MMC_DW_BLUEFIELD is not set
# CONFIG_MMC_DW_EXYNOS is not set
# CONFIG_MMC_DW_HI3798CV200 is not set
# CONFIG_MMC_DW_K3 is not set
CONFIG_MMC_DW_PLTFM=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_SPI_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SELFTESTS=y
CONFIG_NLS=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NR_CPUS=4
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_PADATA=y
CONFIG_PAGE_POOL=y
CONFIG_PCI_DRIVERS_GENERIC=y
CONFIG_PCS_XPCS=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLINK=y
CONFIG_PHY_PISTACHIO_USB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_PISTACHIO=y
CONFIG_POWER_SUPPLY=y
CONFIG_PPS=y
CONFIG_PRINTK_TIME=y
CONFIG_PROC_EVENTS=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_PWM=y
CONFIG_PWM_IMG=y
CONFIG_PWM_SYSFS=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_SPI=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RESET_PISTACHIO=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_SCHEDSTATS=y
CONFIG_SCHED_INFO=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
CONFIG_SCSI_SPI_ATTRS=y
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_8250_DWLIB=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_SC16IS7XX=y
CONFIG_SERIAL_SC16IS7XX_CORE=y
# CONFIG_SERIAL_SC16IS7XX_I2C is not set
CONFIG_SERIAL_SC16IS7XX_SPI=y
CONFIG_SGL_ALLOC=y
CONFIG_SG_POOL=y
CONFIG_SMP=y
CONFIG_SMP_UP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SPI=y
CONFIG_SPI_IMG_SPFI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SRAM=y
CONFIG_SRCU=y
CONFIG_STMMAC_ETH=y
CONFIG_STMMAC_PLATFORM=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_SWPHY=y
CONFIG_SYNC_R4K=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_CPU_MIPS32_R6=y
CONFIG_SYS_HAS_CPU_MIPS64_R1=y
CONFIG_SYS_HAS_CPU_MIPS64_R2=y
CONFIG_SYS_HAS_CPU_MIPS64_R6=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_HIGHMEM=y
CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_SYS_SUPPORTS_MICROMIPS=y
CONFIG_SYS_SUPPORTS_MIPS16=y
CONFIG_SYS_SUPPORTS_MIPS_CPS=y
CONFIG_SYS_SUPPORTS_MULTITHREADING=y
CONFIG_SYS_SUPPORTS_RELOCATABLE=y
CONFIG_SYS_SUPPORTS_SCHED_SMT=y
CONFIG_SYS_SUPPORTS_SMARTMIPS=y
CONFIG_SYS_SUPPORTS_SMP=y
CONFIG_SYS_SUPPORTS_ZBOOT=y
CONFIG_TARGET_ISA_REV=2
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_UBIFS_FS=y
CONFIG_UHI_BOOT=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_COMMON=y
CONFIG_USB_DWC2=y
CONFIG_USB_DWC2_DUAL_ROLE=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_EHCI_HCD_PLATFORM is not set
CONFIG_USB_GADGET=y
CONFIG_USB_ROLE_SWITCH=y
CONFIG_USB_STORAGE=y
CONFIG_USB_SUPPORT=y
CONFIG_USE_OF=y
# CONFIG_VIRT_BOARD_RANCHU is not set
CONFIG_WATCHDOG_CORE=y
CONFIG_WEAK_ORDERING=y
CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZSMALLOC=y
# CONFIG_ZSMALLOC_STAT is not set
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y

View File

@ -1,68 +0,0 @@
From a2dd154377c9aa6ddda00d39b8c7c334e4fa16ff Mon Sep 17 00:00:00 2001
From: Damien Horsley <damien.horsley@imgtec.com>
Date: Tue, 22 Mar 2016 12:46:09 +0000
Subject: dmaengine: img-mdc: Handle early status read
It is possible that mdc_tx_status may be called before the first
node has been read from memory.
In this case, the residue value stored in the register is undefined.
Return the transfer size instead.
Signed-off-by: Damien Horsley <damien.horsley@imgtec.com>
---
drivers/dma/img-mdc-dma.c | 40 ++++++++++++++++++++++++----------------
1 file changed, 24 insertions(+), 16 deletions(-)
--- a/drivers/dma/img-mdc-dma.c
+++ b/drivers/dma/img-mdc-dma.c
@@ -618,25 +618,33 @@ static enum dma_status mdc_tx_status(str
(MDC_CMDS_PROCESSED_CMDS_DONE_MASK + 1);
/*
- * If the command loaded event hasn't been processed yet, then
- * the difference above includes an extra command.
+ * If the first node has not yet been read from memory,
+ * the residue register value is undefined
*/
- if (!mdesc->cmd_loaded)
- cmds--;
- else
- cmds += mdesc->list_cmds_done;
-
- bytes = mdesc->list_xfer_size;
- ldesc = mdesc->list;
- for (i = 0; i < cmds; i++) {
- bytes -= ldesc->xfer_size + 1;
- ldesc = ldesc->next_desc;
- }
- if (ldesc) {
- if (residue != MDC_TRANSFER_SIZE_MASK)
- bytes -= ldesc->xfer_size - residue;
+ if (!mdesc->cmd_loaded && !cmds) {
+ bytes = mdesc->list_xfer_size;
+ } else {
+ /*
+ * If the command loaded event hasn't been processed yet, then
+ * the difference above includes an extra command.
+ */
+ if (!mdesc->cmd_loaded)
+ cmds--;
else
+ cmds += mdesc->list_cmds_done;
+
+ bytes = mdesc->list_xfer_size;
+ ldesc = mdesc->list;
+ for (i = 0; i < cmds; i++) {
bytes -= ldesc->xfer_size + 1;
+ ldesc = ldesc->next_desc;
+ }
+ if (ldesc) {
+ if (residue != MDC_TRANSFER_SIZE_MASK)
+ bytes -= ldesc->xfer_size - residue;
+ else
+ bytes -= ldesc->xfer_size + 1;
+ }
}
}
spin_unlock_irqrestore(&mchan->vc.lock, flags);

View File

@ -1,198 +0,0 @@
From cd2a6af51553d38072cd31699b58d16ca6176ef5 Mon Sep 17 00:00:00 2001
From: Ionela Voinescu <ionela.voinescu@imgtec.com>
Date: Thu, 2 Feb 2017 16:46:14 +0000
Subject: spi: img-spfi: Implement dual and quad mode
For dual and quad modes to work the SPFI controller needs
to have information about command/address/dummy bytes in the
transaction register. This information is not relevant for
single mode, and therefore it can have any value in the
allowed range. Therefore, for any read or write transfers of less
than 8 bytes (cmd = 1 byte, addr up to 7 bytes), SPFI will be
configured, but not enabled (unless it is the last transfer in
the queue). The transfer will be enabled by the subsequent tranfer.
A pending transfer is determined by the content of the transaction
register: if command part is set and tsize is not.
This way we ensure that for dual and quad transactions
the command request size will apear in the command/address part
of the transaction register, while the data size will be in
tsize, all data being sent/received in the same transaction (as
set up in the transaction register).
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
---
drivers/spi/spi-img-spfi.c | 96 ++++++++++++++++++++++++++++++++++++++++------
1 file changed, 85 insertions(+), 11 deletions(-)
--- a/drivers/spi/spi-img-spfi.c
+++ b/drivers/spi/spi-img-spfi.c
@@ -36,7 +36,8 @@
#define SPFI_CONTROL_SOFT_RESET BIT(11)
#define SPFI_CONTROL_SEND_DMA BIT(10)
#define SPFI_CONTROL_GET_DMA BIT(9)
-#define SPFI_CONTROL_SE BIT(8)
+#define SPFI_CONTROL_SE BIT(8)
+#define SPFI_CONTROL_TX_RX BIT(1)
#define SPFI_CONTROL_TMODE_SHIFT 5
#define SPFI_CONTROL_TMODE_MASK 0x7
#define SPFI_CONTROL_TMODE_SINGLE 0
@@ -47,6 +48,10 @@
#define SPFI_TRANSACTION 0x18
#define SPFI_TRANSACTION_TSIZE_SHIFT 16
#define SPFI_TRANSACTION_TSIZE_MASK 0xffff
+#define SPFI_TRANSACTION_CMD_SHIFT 13
+#define SPFI_TRANSACTION_CMD_MASK 0x7
+#define SPFI_TRANSACTION_ADDR_SHIFT 10
+#define SPFI_TRANSACTION_ADDR_MASK 0x7
#define SPFI_PORT_STATE 0x1c
#define SPFI_PORT_STATE_DEV_SEL_SHIFT 20
@@ -83,6 +88,7 @@
*/
#define SPFI_32BIT_FIFO_SIZE 64
#define SPFI_8BIT_FIFO_SIZE 16
+#define SPFI_DATA_REQUEST_MAX_SIZE 8
struct img_spfi {
struct device *dev;
@@ -99,6 +105,8 @@ struct img_spfi {
struct dma_chan *tx_ch;
bool tx_dma_busy;
bool rx_dma_busy;
+
+ bool complete;
};
static inline u32 spfi_readl(struct img_spfi *spfi, u32 reg)
@@ -115,9 +123,11 @@ static inline void spfi_start(struct img
{
u32 val;
- val = spfi_readl(spfi, SPFI_CONTROL);
- val |= SPFI_CONTROL_SPFI_EN;
- spfi_writel(spfi, val, SPFI_CONTROL);
+ if (spfi->complete) {
+ val = spfi_readl(spfi, SPFI_CONTROL);
+ val |= SPFI_CONTROL_SPFI_EN;
+ spfi_writel(spfi, val, SPFI_CONTROL);
+ }
}
static inline void spfi_reset(struct img_spfi *spfi)
@@ -130,12 +140,21 @@ static int spfi_wait_all_done(struct img
{
unsigned long timeout = jiffies + msecs_to_jiffies(50);
+ if (!(spfi->complete))
+ return 0;
+
while (time_before(jiffies, timeout)) {
u32 status = spfi_readl(spfi, SPFI_INTERRUPT_STATUS);
if (status & SPFI_INTERRUPT_ALLDONETRIG) {
spfi_writel(spfi, SPFI_INTERRUPT_ALLDONETRIG,
SPFI_INTERRUPT_CLEAR);
+ /*
+ * Disable SPFI for it not to interfere with
+ * pending transactions
+ */
+ spfi_writel(spfi, spfi_readl(spfi, SPFI_CONTROL)
+ & ~SPFI_CONTROL_SPFI_EN, SPFI_CONTROL);
return 0;
}
cpu_relax();
@@ -441,9 +460,32 @@ static void img_spfi_config(struct spi_m
struct spi_transfer *xfer)
{
struct img_spfi *spfi = spi_master_get_devdata(spi->master);
- u32 val, div;
+ u32 val, div, transact;
+ bool is_pending;
/*
+ * For read or write transfers of less than 8 bytes (cmd = 1 byte,
+ * addr up to 7 bytes), SPFI will be configured, but not enabled
+ * (unless it is the last transfer in the queue).The transfer will
+ * be enabled by the subsequent transfer.
+ * A pending transfer is determined by the content of the
+ * transaction register: if command part is set and tsize
+ * is not
+ */
+ transact = spfi_readl(spfi, SPFI_TRANSACTION);
+ is_pending = ((transact >> SPFI_TRANSACTION_CMD_SHIFT) &
+ SPFI_TRANSACTION_CMD_MASK) &&
+ (!((transact >> SPFI_TRANSACTION_TSIZE_SHIFT) &
+ SPFI_TRANSACTION_TSIZE_MASK));
+
+ /* If there are no pending transactions it's OK to soft reset */
+ if (!is_pending) {
+ /* Start the transaction from a known (reset) state */
+ spfi_reset(spfi);
+ }
+
+ /*
+ * Before anything else, set up parameters.
* output = spfi_clk * (BITCLK / 512), where BITCLK must be a
* power of 2 up to 128
*/
@@ -456,20 +498,52 @@ static void img_spfi_config(struct spi_m
val |= div << SPFI_DEVICE_PARAMETER_BITCLK_SHIFT;
spfi_writel(spfi, val, SPFI_DEVICE_PARAMETER(spi->chip_select));
- spfi_writel(spfi, xfer->len << SPFI_TRANSACTION_TSIZE_SHIFT,
- SPFI_TRANSACTION);
+ if (!list_is_last(&xfer->transfer_list, &master->cur_msg->transfers) &&
+ /*
+ * For duplex mode (both the tx and rx buffers are !NULL) the
+ * CMD, ADDR, and DUMMY byte parts of the transaction register
+ * should always be 0 and therefore the pending transfer
+ * technique cannot be used.
+ */
+ (xfer->tx_buf) && (!xfer->rx_buf) &&
+ (xfer->len <= SPFI_DATA_REQUEST_MAX_SIZE) && !is_pending) {
+ transact = (1 & SPFI_TRANSACTION_CMD_MASK) <<
+ SPFI_TRANSACTION_CMD_SHIFT;
+ transact |= ((xfer->len - 1) & SPFI_TRANSACTION_ADDR_MASK) <<
+ SPFI_TRANSACTION_ADDR_SHIFT;
+ spfi->complete = false;
+ } else {
+ spfi->complete = true;
+ if (is_pending) {
+ /* Keep setup from pending transfer */
+ transact |= ((xfer->len & SPFI_TRANSACTION_TSIZE_MASK) <<
+ SPFI_TRANSACTION_TSIZE_SHIFT);
+ } else {
+ transact = ((xfer->len & SPFI_TRANSACTION_TSIZE_MASK) <<
+ SPFI_TRANSACTION_TSIZE_SHIFT);
+ }
+ }
+ spfi_writel(spfi, transact, SPFI_TRANSACTION);
val = spfi_readl(spfi, SPFI_CONTROL);
val &= ~(SPFI_CONTROL_SEND_DMA | SPFI_CONTROL_GET_DMA);
- if (xfer->tx_buf)
+ /*
+ * We set up send DMA for pending transfers also, as
+ * those are always send transfers
+ */
+ if ((xfer->tx_buf) || is_pending)
val |= SPFI_CONTROL_SEND_DMA;
- if (xfer->rx_buf)
+ if (xfer->tx_buf)
+ val |= SPFI_CONTROL_TX_RX;
+ if (xfer->rx_buf) {
val |= SPFI_CONTROL_GET_DMA;
+ val &= ~SPFI_CONTROL_TX_RX;
+ }
val &= ~(SPFI_CONTROL_TMODE_MASK << SPFI_CONTROL_TMODE_SHIFT);
- if (xfer->tx_nbits == SPI_NBITS_DUAL &&
+ if (xfer->tx_nbits == SPI_NBITS_DUAL ||
xfer->rx_nbits == SPI_NBITS_DUAL)
val |= SPFI_CONTROL_TMODE_DUAL << SPFI_CONTROL_TMODE_SHIFT;
- else if (xfer->tx_nbits == SPI_NBITS_QUAD &&
+ else if (xfer->tx_nbits == SPI_NBITS_QUAD ||
xfer->rx_nbits == SPI_NBITS_QUAD)
val |= SPFI_CONTROL_TMODE_QUAD << SPFI_CONTROL_TMODE_SHIFT;
val |= SPFI_CONTROL_SE;

View File

@ -1,64 +0,0 @@
From 905ee06a9966113fe51d6bad1819759cb30fd0bd Mon Sep 17 00:00:00 2001
From: Ionela Voinescu <ionela.voinescu@imgtec.com>
Date: Tue, 9 Feb 2016 10:18:31 +0000
Subject: spi: img-spfi: use device 0 configuration for all devices
Given that we control the chip select line externally
we can use only one parameter register (device 0 parameter
register) and one set of configuration bits (port configuration
bits for device 0) for all devices (all chip select lines).
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
---
drivers/spi/spi-img-spfi.c | 23 ++++++++++++++++-------
1 file changed, 16 insertions(+), 7 deletions(-)
--- a/drivers/spi/spi-img-spfi.c
+++ b/drivers/spi/spi-img-spfi.c
@@ -429,18 +429,23 @@ static int img_spfi_prepare(struct spi_m
struct img_spfi *spfi = spi_master_get_devdata(master);
u32 val;
+ /*
+ * The chip select line is controlled externally so
+ * we can use the CS0 configuration for all devices
+ */
val = spfi_readl(spfi, SPFI_PORT_STATE);
+
+ /* 0 for device selection */
val &= ~(SPFI_PORT_STATE_DEV_SEL_MASK <<
SPFI_PORT_STATE_DEV_SEL_SHIFT);
- val |= msg->spi->chip_select << SPFI_PORT_STATE_DEV_SEL_SHIFT;
if (msg->spi->mode & SPI_CPHA)
- val |= SPFI_PORT_STATE_CK_PHASE(msg->spi->chip_select);
+ val |= SPFI_PORT_STATE_CK_PHASE(0);
else
- val &= ~SPFI_PORT_STATE_CK_PHASE(msg->spi->chip_select);
+ val &= ~SPFI_PORT_STATE_CK_PHASE(0);
if (msg->spi->mode & SPI_CPOL)
- val |= SPFI_PORT_STATE_CK_POL(msg->spi->chip_select);
+ val |= SPFI_PORT_STATE_CK_POL(0);
else
- val &= ~SPFI_PORT_STATE_CK_POL(msg->spi->chip_select);
+ val &= ~SPFI_PORT_STATE_CK_POL(0);
spfi_writel(spfi, val, SPFI_PORT_STATE);
return 0;
@@ -492,11 +497,15 @@ static void img_spfi_config(struct spi_m
div = DIV_ROUND_UP(clk_get_rate(spfi->spfi_clk), xfer->speed_hz);
div = clamp(512 / (1 << get_count_order(div)), 1, 128);
- val = spfi_readl(spfi, SPFI_DEVICE_PARAMETER(spi->chip_select));
+ /*
+ * The chip select line is controlled externally so
+ * we can use the CS0 parameters for all devices
+ */
+ val = spfi_readl(spfi, SPFI_DEVICE_PARAMETER(0));
val &= ~(SPFI_DEVICE_PARAMETER_BITCLK_MASK <<
SPFI_DEVICE_PARAMETER_BITCLK_SHIFT);
val |= div << SPFI_DEVICE_PARAMETER_BITCLK_SHIFT;
- spfi_writel(spfi, val, SPFI_DEVICE_PARAMETER(spi->chip_select));
+ spfi_writel(spfi, val, SPFI_DEVICE_PARAMETER(0));
if (!list_is_last(&xfer->transfer_list, &master->cur_msg->transfers) &&
/*

View File

@ -1,59 +0,0 @@
From 56466f505f58f44b69feb7eaed3b506842800456 Mon Sep 17 00:00:00 2001
From: Ionela Voinescu <ionela.voinescu@imgtec.com>
Date: Tue, 1 Mar 2016 17:49:45 +0000
Subject: spi: img-spfi: RX maximum burst size for DMA is 8
The depth of the FIFOs is 16 bytes. The DMA request line is tied
to the half full/empty (depending on the use of the TX or RX FIFO)
threshold. For the TX FIFO, if you set a burst size of 8 (equal to
half the depth) the first burst goes into FIFO without any issues,
but due the latency involved (the time the data leaves the DMA
engine to the time it arrives at the FIFO), the DMA might trigger
another burst of 8. But given that there is no space for 2 additonal
bursts of 8, this would result in a failure. Therefore, we have to
keep the burst size for TX to 4 to accomodate for an extra burst.
For the read (RX) scenario, the DMA request line goes high when
there is at least 8 entries in the FIFO (half full), and we can
program the burst size to be 8 because the risk of accidental burst
does not exist. The DMA engine will not trigger another read until
the read data for all the burst it has sent out has been received.
While here, move the burst size setting outside of the if/else branches
as they have the same value for both 8 and 32 bit data widths.
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
---
drivers/spi/spi-img-spfi.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
--- a/drivers/spi/spi-img-spfi.c
+++ b/drivers/spi/spi-img-spfi.c
@@ -338,12 +338,11 @@ static int img_spfi_start_dma(struct spi
if (xfer->len % 4 == 0) {
rxconf.src_addr = spfi->phys + SPFI_RX_32BIT_VALID_DATA;
rxconf.src_addr_width = 4;
- rxconf.src_maxburst = 4;
} else {
rxconf.src_addr = spfi->phys + SPFI_RX_8BIT_VALID_DATA;
rxconf.src_addr_width = 1;
- rxconf.src_maxburst = 4;
}
+ rxconf.src_maxburst = 8;
dmaengine_slave_config(spfi->rx_ch, &rxconf);
rxdesc = dmaengine_prep_slave_sg(spfi->rx_ch, xfer->rx_sg.sgl,
@@ -362,12 +361,11 @@ static int img_spfi_start_dma(struct spi
if (xfer->len % 4 == 0) {
txconf.dst_addr = spfi->phys + SPFI_TX_32BIT_VALID_DATA;
txconf.dst_addr_width = 4;
- txconf.dst_maxburst = 4;
} else {
txconf.dst_addr = spfi->phys + SPFI_TX_8BIT_VALID_DATA;
txconf.dst_addr_width = 1;
- txconf.dst_maxburst = 4;
}
+ txconf.dst_maxburst = 4;
dmaengine_slave_config(spfi->tx_ch, &txconf);
txdesc = dmaengine_prep_slave_sg(spfi->tx_ch, xfer->tx_sg.sgl,

View File

@ -1,120 +0,0 @@
From 5fcca3fd4b621d7b5bdeca18d36dfc6ca6cfe383 Mon Sep 17 00:00:00 2001
From: Ionela Voinescu <ionela.voinescu@imgtec.com>
Date: Wed, 10 Aug 2016 11:42:26 +0100
Subject: spi: img-spfi: finish every transfer cleanly
Before this change, the interrupt status bit that signaled
the end of a tranfers was cleared in the wait_all_done
function. That functionality triggered issues for DMA
duplex transactions where the wait function was called
twice, in both the TX and RX callbacks.
In order to fix the issue, clear all interrupt data bits
at the end of a PIO transfer or at the end of both TX and RX
duplex transfers, if the transfer is not a pending tranfer
(command waiting for data). After that, the status register
is checked for new incoming data or new data requests to be
signaled. If SPFI finished cleanly, no new interrupt data
bits should be set.
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
---
drivers/spi/spi-img-spfi.c | 49 +++++++++++++++++++++++++++++++++-------------
1 file changed, 35 insertions(+), 14 deletions(-)
--- a/drivers/spi/spi-img-spfi.c
+++ b/drivers/spi/spi-img-spfi.c
@@ -79,6 +79,14 @@
#define SPFI_INTERRUPT_SDE BIT(1)
#define SPFI_INTERRUPT_SDTRIG BIT(0)
+#define SPFI_INTERRUPT_DATA_BITS (SPFI_INTERRUPT_SDHF |\
+ SPFI_INTERRUPT_SDFUL |\
+ SPFI_INTERRUPT_GDEX32BIT |\
+ SPFI_INTERRUPT_GDHF |\
+ SPFI_INTERRUPT_GDFUL |\
+ SPFI_INTERRUPT_ALLDONETRIG |\
+ SPFI_INTERRUPT_GDEX8BIT)
+
/*
* There are four parallel FIFOs of 16 bytes each. The word buffer
* (*_32BIT_VALID_DATA) accesses all four FIFOs at once, resulting in an
@@ -136,6 +144,23 @@ static inline void spfi_reset(struct img
spfi_writel(spfi, 0, SPFI_CONTROL);
}
+static inline void spfi_finish(struct img_spfi *spfi)
+{
+ if (!(spfi->complete))
+ return;
+
+ /* Clear data bits as all transfers(TX and RX) have finished */
+ spfi_writel(spfi, SPFI_INTERRUPT_DATA_BITS, SPFI_INTERRUPT_CLEAR);
+ if (spfi_readl(spfi, SPFI_INTERRUPT_STATUS) & SPFI_INTERRUPT_DATA_BITS) {
+ dev_err(spfi->dev, "SPFI did not finish transfer cleanly.\n");
+ spfi_reset(spfi);
+ }
+ /* Disable SPFI for it not to interfere with pending transactions */
+ spfi_writel(spfi,
+ spfi_readl(spfi, SPFI_CONTROL) & ~SPFI_CONTROL_SPFI_EN,
+ SPFI_CONTROL);
+}
+
static int spfi_wait_all_done(struct img_spfi *spfi)
{
unsigned long timeout = jiffies + msecs_to_jiffies(50);
@@ -144,19 +169,9 @@ static int spfi_wait_all_done(struct img
return 0;
while (time_before(jiffies, timeout)) {
- u32 status = spfi_readl(spfi, SPFI_INTERRUPT_STATUS);
-
- if (status & SPFI_INTERRUPT_ALLDONETRIG) {
- spfi_writel(spfi, SPFI_INTERRUPT_ALLDONETRIG,
- SPFI_INTERRUPT_CLEAR);
- /*
- * Disable SPFI for it not to interfere with
- * pending transactions
- */
- spfi_writel(spfi, spfi_readl(spfi, SPFI_CONTROL)
- & ~SPFI_CONTROL_SPFI_EN, SPFI_CONTROL);
+ if (spfi_readl(spfi, SPFI_INTERRUPT_STATUS) &
+ SPFI_INTERRUPT_ALLDONETRIG)
return 0;
- }
cpu_relax();
}
@@ -288,6 +303,8 @@ static int img_spfi_start_pio(struct spi
}
ret = spfi_wait_all_done(spfi);
+ spfi_finish(spfi);
+
if (ret < 0)
return ret;
@@ -303,8 +320,10 @@ static void img_spfi_dma_rx_cb(void *dat
spin_lock_irqsave(&spfi->lock, flags);
spfi->rx_dma_busy = false;
- if (!spfi->tx_dma_busy)
+ if (!spfi->tx_dma_busy) {
+ spfi_finish(spfi);
spi_finalize_current_transfer(spfi->master);
+ }
spin_unlock_irqrestore(&spfi->lock, flags);
}
@@ -317,8 +336,10 @@ static void img_spfi_dma_tx_cb(void *dat
spin_lock_irqsave(&spfi->lock, flags);
spfi->tx_dma_busy = false;
- if (!spfi->rx_dma_busy)
+ if (!spfi->rx_dma_busy) {
+ spfi_finish(spfi);
spi_finalize_current_transfer(spfi->master);
+ }
spin_unlock_irqrestore(&spfi->lock, flags);
}

View File

@ -1,49 +0,0 @@
From 3642843a06025ec333d7e92580cf52cb8db2a652 Mon Sep 17 00:00:00 2001
From: Govindraj Raja <Govindraj.Raja@imgtec.com>
Date: Fri, 8 Jan 2016 16:36:07 +0000
Subject: clk: pistachio: Fix wrong SDHost card speed
The SDHost currently clocks the card 4x slower than it
should do, because there is fixed divide by 4 in the
sdhost wrapper that is not present in the clock tree.
To model this add a fixed divide by 4 clock node in
the SDHost clock path.
This will ensure the right clock frequency is selected when
the mmc driver tries to configure frequency on card insert.
Signed-off-by: Govindraj Raja <Govindraj.Raja@imgtec.com>
---
drivers/clk/pistachio/clk-pistachio.c | 3 ++-
include/dt-bindings/clock/pistachio-clk.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
--- a/drivers/clk/pistachio/clk-pistachio.c
+++ b/drivers/clk/pistachio/clk-pistachio.c
@@ -41,7 +41,7 @@ static struct pistachio_gate pistachio_g
GATE(CLK_AUX_ADC_INTERNAL, "aux_adc_internal", "sys_internal_div",
0x104, 22),
GATE(CLK_AUX_ADC, "aux_adc", "aux_adc_div", 0x104, 23),
- GATE(CLK_SD_HOST, "sd_host", "sd_host_div", 0x104, 24),
+ GATE(CLK_SD_HOST, "sd_host", "sd_host_div4", 0x104, 24),
GATE(CLK_BT, "bt", "bt_div", 0x104, 25),
GATE(CLK_BT_DIV4, "bt_div4", "bt_div4_div", 0x104, 26),
GATE(CLK_BT_DIV8, "bt_div8", "bt_div8_div", 0x104, 27),
@@ -51,6 +51,7 @@ static struct pistachio_gate pistachio_g
static struct pistachio_fixed_factor pistachio_ffs[] __initdata = {
FIXED_FACTOR(CLK_WIFI_DIV4, "wifi_div4", "wifi_pll", 4),
FIXED_FACTOR(CLK_WIFI_DIV8, "wifi_div8", "wifi_pll", 8),
+ FIXED_FACTOR(CLK_SDHOST_DIV4, "sd_host_div4", "sd_host_div", 4),
};
static struct pistachio_div pistachio_divs[] __initdata = {
--- a/include/dt-bindings/clock/pistachio-clk.h
+++ b/include/dt-bindings/clock/pistachio-clk.h
@@ -18,6 +18,7 @@
/* Fixed-factor clocks */
#define CLK_WIFI_DIV4 16
#define CLK_WIFI_DIV8 17
+#define CLK_SDHOST_DIV4 18
/* Gate clocks */
#define CLK_MIPS 32

View File

@ -1,47 +0,0 @@
From 981c1d416af45eff207227aec106381ac23aac99 Mon Sep 17 00:00:00 2001
From: Ian Pozella <Ian.Pozella@imgtec.com>
Date: Mon, 20 Feb 2017 10:00:52 +0000
Subject: MIPS: DTS: img: marduk: switch mmc to 1 bit mode
The mmc block in Pistachio allows 1 to 8 data bits to be used.
Marduk uses 4 bits allowing the upper 4 bits to be allocated
to the Mikrobus ports. However these bits are still connected
internally meaning the mmc block recieves signals on all data lines
and seems the internal HW CRC checks get corrupted by this erroneous
data.
We cannot control what data is sent on these lines because they go
to external ports. 1 bit mode does not exhibit the issue hence the
safe default is to use this. If a user knows that in their use case
they will not use the upper bits then they can set to 4 bit mode in
order to improve performance.
Also make sure that the upper 4 bits don't get allocated to the mmc
driver (the default is to assign all 8 pins) so they can be allocated
to other drivers. Allocating all 4 despite setting 1 bit mode as this
matches what is there in hardware.
Signed-off-by: Ian Pozella <Ian.Pozella@imgtec.com>
---
arch/mips/boot/dts/img/pistachio_marduk.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -118,7 +118,7 @@
&sdhost {
status = "okay";
- bus-width = <4>;
+ bus-width = <1>;
disable-wp;
};
@@ -128,6 +128,7 @@
&pin_sdhost_data {
drive-strength = <2>;
+ pins = "mfio17", "mfio18", "mfio19", "mfio20";
};
&pwm {

View File

@ -1,54 +0,0 @@
From f32bc2aa01edcba2f2ed5db151cf183eac9ef919 Mon Sep 17 00:00:00 2001
From: Abhimanyu Vishwakarma <Abhimanyu.Vishwakarma@imgtec.com>
Date: Sat, 25 Feb 2017 16:42:50 +0000
Subject: mtd: nor: support mtd name from device tree
Signed-off-by: Abhimanyu Vishwakarma <Abhimanyu.Vishwakarma@imgtec.com>
---
drivers/mtd/spi-nor/spi-nor.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
--- a/drivers/mtd/spi-nor/core.c
+++ b/drivers/mtd/spi-nor/core.c
@@ -3108,6 +3108,7 @@ int spi_nor_scan(struct spi_nor *nor, co
struct device *dev = nor->dev;
struct mtd_info *mtd = &nor->mtd;
struct device_node *np = spi_nor_get_flash_node(nor);
+ const char __maybe_unused *of_mtd_name = NULL;
int ret;
int i;
@@ -3162,7 +3163,12 @@ int spi_nor_scan(struct spi_nor *nor, co
if (ret)
return ret;
- if (!mtd->name)
+#ifdef CONFIG_MTD_OF_PARTS
+ of_property_read_string(np, "linux,mtd-name", &of_mtd_name);
+#endif
+ if (of_mtd_name)
+ mtd->name = of_mtd_name;
+ else if (!mtd->name)
mtd->name = dev_name(dev);
mtd->priv = nor;
mtd->type = MTD_NORFLASH;
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -870,6 +870,17 @@ out_error:
*/
static void mtd_set_dev_defaults(struct mtd_info *mtd)
{
+#ifdef CONFIG_MTD_OF_PARTS
+ const char __maybe_unused *of_mtd_name = NULL;
+ struct device_node *np;
+
+ np = mtd_get_of_node(mtd);
+ if (np && !mtd->name) {
+ of_property_read_string(np, "linux,mtd-name", &of_mtd_name);
+ if (of_mtd_name)
+ mtd->name = of_mtd_name;
+ } else
+#endif
if (mtd->dev.parent) {
if (!mtd->owner && mtd->dev.parent->driver)
mtd->owner = mtd->dev.parent->driver->owner;

View File

@ -1,30 +0,0 @@
From 0023c706f7e0f0f02bd48a63a2f3c04c839532ae Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sat, 15 Aug 2020 16:04:53 +0200
Subject: [PATCH 901/904] MIPS: DTS: img: marduk: Add SPI NAND flash
Add Gigadevice GD5F4GQ4UCYIGT SPI NAND flash to the device tree.
The NAND flash chip is connected with quad SPI, but reading currently
fails in quad SPI mode.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
arch/mips/boot/dts/img/pistachio_marduk.dts | 6 ++++++
1 file changed, 6 insertions(+)
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -89,6 +89,12 @@
reg = <0>;
spi-max-frequency = <50000000>;
};
+
+ flash@1 {
+ compatible = "spi-nand";
+ reg = <1>;
+ spi-max-frequency = <50000000>;
+ };
};
&uart0 {

View File

@ -1,43 +0,0 @@
From b7700154d75e8d7c9a2022f09c2d5430137606fa Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sat, 15 Aug 2020 16:05:25 +0200
Subject: [PATCH 902/904] MIPS: DTS: img: marduk: Add Cascoda CA8210 6LoWPAN
Add Cascoda CA8210 6LoWPAN controller to device tree.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
arch/mips/boot/dts/img/pistachio_marduk.dts | 22 +++++++++++++++++++++
1 file changed, 22 insertions(+)
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -76,6 +76,28 @@
VDD-supply = <&internal_dac_supply>;
};
+&spfi0 {
+ status = "okay";
+ pinctrl-0 = <&spim0_pins>, <&spim0_cs0_alt_pin>, <&spim0_cs2_alt_pin>, <&spim0_cs3_alt_pin>, <&spim0_cs4_alt_pin>;
+ pinctrl-names = "default";
+
+ cs-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>, <&gpio0 2 GPIO_ACTIVE_HIGH>,
+ <&gpio1 12 GPIO_ACTIVE_HIGH>, <&gpio1 13 GPIO_ACTIVE_HIGH>;
+
+ ca8210: ca8210@0 {
+ status = "okay";
+ compatible = "cascoda,ca8210";
+ reg = <0>;
+ spi-max-frequency = <4000000>;
+ spi-cpol;
+ reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ irq-gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
+ extclock-enable;
+ extclock-freq = <16000000>;
+ extclock-gpio = <2>;
+ };
+};
+
&spfi1 {
status = "okay";

View File

@ -1,81 +0,0 @@
From ad4eba0c36ce8af6ab9ea1bc163e4c1ac7c271c3 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sat, 15 Aug 2020 16:09:02 +0200
Subject: [PATCH 903/904] MIPS: DTS: img: marduk: Add NXP SC16IS752IPW
Add NXP SC16IS752IPW SPI-UART controller to device tree.
This controller drives 2 UARTs and 7 LEDs on the board.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
arch/mips/boot/dts/img/pistachio_marduk.dts | 51 +++++++++++++++++++++
1 file changed, 51 insertions(+)
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -46,6 +46,46 @@
regulator-max-microvolt = <1800000>;
};
+ /* EXT clock from ca8210 is fed to sc16is752 */
+ ca8210_ext_clk: ca8210-ext-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <16000000>;
+ clock-output-names = "ca8210_ext_clock";
+ };
+
+ gpioleds {
+ compatible = "gpio-leds";
+ user1 {
+ label = "marduk:red:user1";
+ gpios = <&sc16is752 0 GPIO_ACTIVE_LOW>;
+ };
+ user2 {
+ label = "marduk:red:user2";
+ gpios = <&sc16is752 1 GPIO_ACTIVE_LOW>;
+ };
+ user3 {
+ label = "marduk:red:user3";
+ gpios = <&sc16is752 2 GPIO_ACTIVE_LOW>;
+ };
+ user4 {
+ label = "marduk:red:user4";
+ gpios = <&sc16is752 3 GPIO_ACTIVE_LOW>;
+ };
+ user5 {
+ label = "marduk:red:user5";
+ gpios = <&sc16is752 4 GPIO_ACTIVE_LOW>;
+ };
+ user6 {
+ label = "marduk:red:user6";
+ gpios = <&sc16is752 5 GPIO_ACTIVE_LOW>;
+ };
+ user7 {
+ label = "marduk:red:user7";
+ gpios = <&sc16is752 6 GPIO_ACTIVE_LOW>;
+ };
+ };
+
led-controller {
compatible = "pwm-leds";
@@ -96,6 +136,17 @@
extclock-freq = <16000000>;
extclock-gpio = <2>;
};
+
+ sc16is752: sc16is752@1 {
+ compatible = "nxp,sc16is752";
+ reg = <1>;
+ clocks = <&ca8210_ext_clk>;
+ spi-max-frequency = <4000000>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
&spfi1 {

View File

@ -1,27 +0,0 @@
From ff0e950b605047bf50d470023e0fb2fc2003a0f0 Mon Sep 17 00:00:00 2001
From: Ian Pozella <Ian.Pozella@imgtec.com>
Date: Mon, 20 Feb 2017 10:38:07 +0000
Subject: [PATCH 904/904] MIPS: DTS: img: marduk: Add partition name
Signed-off-by: Ian Pozella <Ian.Pozella@imgtec.com>
---
arch/mips/boot/dts/img/pistachio_marduk.dts | 2 ++
1 file changed, 2 insertions(+)
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -161,12 +161,14 @@
compatible = "spansion,s25fl016k", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
+ linux,mtd-name = "spi-nor";
};
flash@1 {
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <50000000>;
+ linux,mtd-name = "spi-nand";
};
};

View File

@ -1,27 +0,0 @@
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -19,6 +19,11 @@
ethernet0 = &enet;
spi0 = &spfi0;
spi1 = &spfi1;
+
+ led-boot = &led_heartbeat;
+ led-failsafe = &led_heartbeat;
+ led-running = &led_heartbeat;
+ led-upgrade = &led_heartbeat;
};
chosen {
@@ -89,11 +94,10 @@
led-controller {
compatible = "pwm-leds";
- led-1 {
+ led_heartbeat: heartbeat {
label = "marduk:red:heartbeat";
pwms = <&pwm 3 300000>;
max-brightness = <255>;
- linux,default-trigger = "heartbeat";
};
};

View File

@ -12,6 +12,7 @@ FEATURES:=boot-part ext4 fpu legacy-sdcard powerpc64 ramdisk rootfs-part rtc sou
SUBTARGETS:=generic SUBTARGETS:=generic
KERNEL_PATCHVER:=5.15 KERNEL_PATCHVER:=5.15
KERNEL_TESTING_PATCHVER:=6.1
KERNELNAME:=zImage KERNELNAME:=zImage

View File

@ -113,7 +113,6 @@ CONFIG_FSL_CORENET_CF=y
CONFIG_FSL_CORENET_RCPM=y CONFIG_FSL_CORENET_RCPM=y
CONFIG_FSL_DMA=y CONFIG_FSL_DMA=y
CONFIG_FSL_DPAA=y CONFIG_FSL_DPAA=y
# CONFIG_FSL_DPAA2_SWITCH is not set
# CONFIG_FSL_DPAA_CHECKING is not set # CONFIG_FSL_DPAA_CHECKING is not set
CONFIG_FSL_DPAA_ETH=y CONFIG_FSL_DPAA_ETH=y
CONFIG_FSL_EMB_PERFMON=y CONFIG_FSL_EMB_PERFMON=y
@ -132,6 +131,7 @@ CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y CONFIG_FS_POSIX_ACL=y
CONFIG_FTL=y CONFIG_FTL=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FUNCTION_ERROR_INJECTION=y CONFIG_FUNCTION_ERROR_INJECTION=y
CONFIG_FWNODE_MDIO=y CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_FW_LOADER_PAGED_BUF=y

View File

@ -0,0 +1,422 @@
CONFIG_64BIT=y
CONFIG_ALTIVEC=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_FORCE_MAX_ORDER=13
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
CONFIG_ARCH_MMAP_RND_BITS=18
CONFIG_ARCH_MMAP_RND_BITS_MAX=32
CONFIG_ARCH_MMAP_RND_BITS_MIN=18
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y
CONFIG_ASN1=y
CONFIG_ASYNC_TX_ENABLE_CHANNEL_SWITCH=y
CONFIG_AUDIT_ARCH=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_PM=y
CONFIG_BOOKE=y
CONFIG_BOOKE_OR_40x=y
CONFIG_BOOKE_WDT=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_CLK_QORIQ=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CLZ_TAB=y
CONFIG_COMMON_CLK=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
# CONFIG_COMPAT_32BIT_TIME is not set
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CORENET_GENERIC=y
# CONFIG_CPUFREQ_DT is not set
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_FREQ=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
# CONFIG_CPU_FREQ_STAT is not set
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_TEO=y
CONFIG_CPU_ISOLATION=y
CONFIG_CPU_RMAP=y
CONFIG_CRC16=y
CONFIG_CRYPTO_AUTHENC=y
CONFIG_CRYPTO_CRC32=y
CONFIG_CRYPTO_CRC32C=y
# CONFIG_CRYPTO_CRC32C_VPMSUM is not set
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_DEV_FSL_CAAM=y
CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API=y
CONFIG_CRYPTO_DEV_FSL_CAAM_AHASH_API_DESC=y
CONFIG_CRYPTO_DEV_FSL_CAAM_COMMON=y
CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API=y
CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_DESC=y
CONFIG_CRYPTO_DEV_FSL_CAAM_CRYPTO_API_QI=y
# CONFIG_CRYPTO_DEV_FSL_CAAM_DEBUG is not set
# CONFIG_CRYPTO_DEV_FSL_CAAM_INTC is not set
CONFIG_CRYPTO_DEV_FSL_CAAM_JR=y
CONFIG_CRYPTO_DEV_FSL_CAAM_PKC_API=y
CONFIG_CRYPTO_DEV_FSL_CAAM_PRNG_API=y
CONFIG_CRYPTO_DEV_FSL_CAAM_RINGSIZE=9
CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_API=y
# CONFIG_CRYPTO_DEV_NX is not set
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_ENGINE=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_DES=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_UTILS=y
# CONFIG_CRYPTO_MD5_PPC is not set
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RSA=y
# CONFIG_CRYPTO_SHA1_PPC is not set
CONFIG_CRYPTO_XTS=y
CONFIG_DATA_SHIFT=12
CONFIG_DEBUG_INFO=y
CONFIG_DEFAULT_UIMAGE=y
CONFIG_DMADEVICES=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_OF=y
CONFIG_DMA_OPS=y
CONFIG_DMA_OPS_BYPASS=y
CONFIG_DTC=y
CONFIG_DUMMY_CONSOLE=y
# CONFIG_E5500_CPU is not set
CONFIG_E6500_CPU=y
CONFIG_EARLY_PRINTK=y
CONFIG_EDAC=y
CONFIG_EDAC_ATOMIC_SCRUB=y
# CONFIG_EDAC_CPC925 is not set
# CONFIG_EDAC_DEBUG is not set
CONFIG_EDAC_LEGACY_SYSFS=y
CONFIG_EDAC_MPC85XX=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EPAPR_PARAVIRT=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_F2FS_FS=y
CONFIG_FIXED_PHY=y
# CONFIG_FSL_BMAN_TEST is not set
CONFIG_FSL_CORENET_CF=y
CONFIG_FSL_CORENET_RCPM=y
CONFIG_FSL_DMA=y
CONFIG_FSL_DPAA=y
# CONFIG_FSL_DPAA_CHECKING is not set
CONFIG_FSL_DPAA_ETH=y
CONFIG_FSL_EMB_PERFMON=y
CONFIG_FSL_FMAN=y
CONFIG_FSL_GUTS=y
CONFIG_FSL_IFC=y
CONFIG_FSL_LBC=y
CONFIG_FSL_MPIC_TIMER_WAKEUP=y
CONFIG_FSL_PAMU=y
CONFIG_FSL_PCI=y
# CONFIG_FSL_QMAN_TEST is not set
CONFIG_FSL_SOC=y
CONFIG_FSL_SOC_BOOKE=y
CONFIG_FSL_XGMAC_MDIO=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_FTL=y
CONFIG_FUNCTION_ERROR_INJECTION=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GCC10_NO_ARRAY_BOUNDS=y
CONFIG_GCC_ASM_GOTO_OUTPUT_WORKAROUND=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_ISA_DMA=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
# CONFIG_GEN_RTC is not set
# CONFIG_GIANFAR is not set
CONFIG_GLOB=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_MPC8XXX=y
CONFIG_GRO_CELLS=y
# CONFIG_HANGCHECK_TIMER is not set
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HWMON=y
CONFIG_HW_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_MPC=y
CONFIG_ILLEGAL_POINTER_VALUE=0x5deadbeef0000000
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=y
CONFIG_IOMMU_API=y
# CONFIG_IOMMU_DEBUGFS is not set
# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set
CONFIG_IOMMU_DEFAULT_DMA_STRICT=y
# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set
CONFIG_IOMMU_HELPER=y
CONFIG_IOMMU_SUPPORT=y
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_ISA_DMA_API=y
CONFIG_JBD2=y
CONFIG_JUMP_LABEL=y
CONFIG_JUMP_LABEL_FEATURE_CHECKS=y
# CONFIG_JUMP_LABEL_FEATURE_CHECK_DEBUG is not set
CONFIG_KALLSYMS=y
CONFIG_KERNEL_GZIP=y
CONFIG_KERNEL_START=0xc000000000000000
CONFIG_KPROBES=y
CONFIG_KRETPROBES=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MARVELL_PHY=y
CONFIG_MATH_EMULATION=y
# CONFIG_MATH_EMULATION_FULL is not set
CONFIG_MATH_EMULATION_HW_UNIMPLEMENTED=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEMFD_CREATE=y
CONFIG_MEMORY=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_DEBUG=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
CONFIG_MMC_SDHCI_OF_ESDHC=y
# CONFIG_MMC_SDHCI_PCI is not set
CONFIG_MMC_SDHCI_PLTFM=y
# CONFIG_MMC_WBSD is not set
CONFIG_MMIOWB=y
CONFIG_MMU_GATHER_MERGE_VMAS=y
CONFIG_MMU_GATHER_PAGE_SIZE=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_MPIC=y
CONFIG_MPIC_MSGR=y
CONFIG_MPIC_TIMER=y
CONFIG_MPILIB=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_NAND_FSL_IFC=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_MV88E6XXX=y
CONFIG_NET_DSA_TAG_DSA=y
CONFIG_NET_DSA_TAG_DSA_COMMON=y
CONFIG_NET_DSA_TAG_EDSA=y
CONFIG_NET_DSA_TAG_OCELOT=y
CONFIG_NET_DSA_TAG_TRAILER=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NLS=y
CONFIG_NONSTATIC_KERNEL=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=24
CONFIG_NR_IRQS=512
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_DMA_DEFAULT_COHERENT=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IOMMU=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OLD_SIGSUSPEND=y
CONFIG_OPTPROBES=y
CONFIG_PACKING=y
CONFIG_PADATA=y
CONFIG_PAGE_OFFSET=0xc000000000000000
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PAHOLE_HAS_LANG_EXCLUDE=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_ARCH_FALLBACKS=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
CONFIG_PCS_LYNX=y
CONFIG_PGTABLE_LEVELS=4
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
CONFIG_PHYSICAL_START=0x00000000
CONFIG_PHYS_64BIT=y
CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_PM=y
# CONFIG_PMU_SYSFS is not set
CONFIG_PM_CLK=y
CONFIG_PPC=y
CONFIG_PPC64=y
CONFIG_PPC64_ELF_ABI_V1=y
CONFIG_PPC_ADV_DEBUG_DACS=2
CONFIG_PPC_ADV_DEBUG_DVCS=0
CONFIG_PPC_ADV_DEBUG_IACS=2
CONFIG_PPC_ADV_DEBUG_REGS=y
CONFIG_PPC_BARRIER_NOSPEC=y
CONFIG_PPC_BOOK3E_64=y
# CONFIG_PPC_BOOK3S_64 is not set
CONFIG_PPC_DAWR=y
CONFIG_PPC_DOORBELL=y
CONFIG_PPC_E500=y
CONFIG_PPC_E500MC=y
# CONFIG_PPC_EARLY_DEBUG is not set
CONFIG_PPC_EPAPR_HV_PIC=y
CONFIG_PPC_FPU=y
CONFIG_PPC_FPU_REGS=y
CONFIG_PPC_INDIRECT_PCI=y
# CONFIG_PPC_IRQ_SOFT_MASK_DEBUG is not set
CONFIG_PPC_KUAP=y
# CONFIG_PPC_KUAP_DEBUG is not set
CONFIG_PPC_KUEP=y
CONFIG_PPC_MMU_NOHASH=y
CONFIG_PPC_MSI_BITMAP=y
CONFIG_PPC_OF_BOOT_TRAMPOLINE=y
CONFIG_PPC_PAGE_SHIFT=12
# CONFIG_PPC_QEMU_E500 is not set
CONFIG_PPC_QUEUED_SPINLOCKS=y
CONFIG_PPC_SMP_MUXED_IPI=y
CONFIG_PPC_UDBG_16550=y
CONFIG_PPC_WERROR=y
CONFIG_PPS=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PTE_64BIT=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_PTP_1588_CLOCK_QORIQ=y
CONFIG_QORIQ_CPUFREQ=y
CONFIG_QORIQ_THERMAL=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RAS=y
CONFIG_RATIONAL=y
# CONFIG_RAVE_SP_CORE is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_RELOCATABLE=y
# CONFIG_RELOCATABLE_TEST is not set
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
# CONFIG_SCOM_DEBUGFS is not set
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_DEV_BUS=y
CONFIG_SERIAL_DEV_CTRL_TTYPORT=y
CONFIG_SERIAL_FSL_LINFLEXUART=y
CONFIG_SERIAL_FSL_LINFLEXUART_CONSOLE=y
CONFIG_SERIAL_FSL_LPUART=y
CONFIG_SERIAL_FSL_LPUART_CONSOLE=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SG_POOL=y
CONFIG_SMP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SOC_BUS=y
CONFIG_SOFTIRQ_ON_OWN_STACK=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_FSL_ESPI=y
CONFIG_SPI_MASTER=y
CONFIG_SRCU=y
CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_TARGET_CPU="e6500"
CONFIG_TARGET_CPU_BOOL=y
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_OF=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_THREAD_SHIFT=14
# CONFIG_TOOLCHAIN_DEFAULT_CPU is not set
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
# CONFIG_UACCE is not set
# CONFIG_UCLAMP_TASK is not set
CONFIG_USB=y
CONFIG_USB_COMMON=y
CONFIG_USB_EHCI_FSL=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_EHCI_HCD_PLATFORM is not set
CONFIG_USB_STORAGE=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_UAS=y
CONFIG_VGA_CONSOLE=y
CONFIG_VIRT_CPU_ACCOUNTING=y
CONFIG_VIRT_CPU_ACCOUNTING_NATIVE=y
CONFIG_VT=y
CONFIG_VT_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
CONFIG_WATCHDOG_CORE=y
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
CONFIG_XPS=y
CONFIG_ZLIB_DEFLATE=y

View File

@ -0,0 +1,454 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "ipq8074.dtsi"
#include "ipq8074-hk-cpu.dtsi"
#include "ipq8074-ess.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
model = "Zbtlink ZBT-Z800AX";
compatible = "zbtlink,zbt-z800ax", "qcom,ipq8074";
aliases {
led-boot = &led_net;
led-failsafe = &led_net;
led-upgrade = &led_net;
serial0 = &blsp1_uart5;
/*
* Aliases as required by u-boot
* to patch MAC addresses
*/
ethernet0 = &dp1;
ethernet1 = &dp2;
ethernet2 = &dp3;
ethernet3 = &dp4;
ethernet4 = &dp5;
label-mac-device = &dp1;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs-append = " root=/dev/ubiblock0_1";
};
gpio-export {
compatible = "gpio-export";
lte-power {
gpio-export,name = "lte_power";
gpio-export,output = <1>;
gpios = <&tlmm 55 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_net: net {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WAN_ONLINE;
gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
};
module {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_MOBILE;
gpios = <&tlmm 30 GPIO_ACTIVE_HIGH>;
};
wlan2g {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN_2GHZ;
gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy1radio";
};
wlan5g {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_WLAN_5GHZ;
gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0radio";
};
};
};
&tlmm {
button_pins: button-pins {
mux {
pins = "gpio34", "gpio46";
function = "gpio";
drive-strength = <8>;
bias-pull-up;
};
};
mdio_pins: mdio-pins {
mdc {
pins = "gpio68";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mdio {
pins = "gpio69";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
};
&blsp1_spi1 {
pinctrl-0 = <&spi_0_pins>;
pinctrl-names = "default";
cs-select = <0>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "0:sbl1";
reg = <0x0 0x50000>;
read-only;
};
partition@50000 {
label = "0:mibib";
reg = <0x50000 0x10000>;
read-only;
};
partition@60000 {
label = "0:bootconfig";
reg = <0x60000 0x20000>;
read-only;
};
partition@80000 {
label = "0:bootconfig1";
reg = <0x80000 0x20000>;
read-only;
};
partition@a0000 {
label = "0:qsee";
reg = <0xa0000 0x180000>;
read-only;
};
partition@220000 {
label = "0:qsee_1";
reg = <0x220000 0x180000>;
read-only;
};
partition@3a0000 {
label = "0:devcfg";
reg = <0x3a0000 0x10000>;
read-only;
};
partition@3b0000 {
label = "0:devcfg_1";
reg = <0x3b0000 0x10000>;
read-only;
};
partition@3c0000 {
label = "0:apdp";
reg = <0x3c0000 0x10000>;
read-only;
};
partition@3d0000 {
label = "0:apdp_1";
reg = <0x3d0000 0x10000>;
read-only;
};
partition@3e0000 {
label = "0:rpm";
reg = <0x3e0000 0x40000>;
read-only;
};
partition@420000 {
label = "0:rpm_1";
reg = <0x420000 0x40000>;
read-only;
};
partition@460000 {
label = "0:cdt";
reg = <0x460000 0x10000>;
read-only;
};
partition@470000 {
label = "0:cdt_1";
reg = <0x470000 0x10000>;
read-only;
};
partition@480000 {
label = "0:appsblenv";
reg = <0x480000 0x10000>;
};
partition@490000 {
label = "0:appsbl";
reg = <0x490000 0xa0000>;
read-only;
};
partition@530000 {
label = "0:appsbl_1";
reg = <0x530000 0xa0000>;
read-only;
};
partition@5d0000 {
label = "0:art";
reg = <0x5d0000 0x40000>;
read-only;
};
partition@610000 {
label = "0:ethphyfw";
reg = <0x610000 0x80000>;
read-only;
};
};
};
};
&blsp1_uart5 {
status = "okay";
};
&cryptobam {
status = "okay";
};
&crypto {
status = "okay";
};
&prng {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
status = "okay";
partitions {
status = "disabled";
};
nand@0 {
reg = <0>;
nand-ecc-strength = <8>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "rootfs";
reg = <0x0000000 0x3400000>;
};
partition@3400000 {
label = "0:wififw";
reg = <0x3400000 0x0800000>;
read-only;
};
partition@3c00000 {
label = "rootfs_1";
reg = <0x3c00000 0x3400000>;
};
partition@7000000 {
label = "0:wififw_1";
reg = <0x7000000 0x0800000>;
read-only;
};
};
};
};
&qusb_phy_0 {
status = "okay";
};
&qusb_phy_1 {
status = "okay";
};
&ssphy_0 {
status = "okay";
};
&ssphy_1 {
status = "okay";
};
&usb_0 {
status = "okay";
};
&usb_1 {
status = "okay";
};
&mdio {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
ethernet-phy-package@0 {
compatible = "qcom,qca8075-package";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
qca8075_0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
qca8075_1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
qca8075_2: ethernet-phy@2 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <2>;
};
qca8075_3: ethernet-phy@3 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <3>;
};
qca8075_4: ethernet-phy@4 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <4>;
};
};
};
&switch {
status = "okay";
switch_lan_bmp = <(ESS_PORT1 | ESS_PORT2 | ESS_PORT3 | ESS_PORT4)>;
switch_wan_bmp = <ESS_PORT5>;
switch_mac_mode = <MAC_MODE_PSGMII>;
qcom,port_phyinfo {
port@1 {
port_id = <1>;
phy_address = <0>;
};
port@2 {
port_id = <2>;
phy_address = <1>;
};
port@3 {
port_id = <3>;
phy_address = <2>;
};
port@4 {
port_id = <4>;
phy_address = <3>;
};
port@5 {
port_id = <5>;
phy_address = <4>;
};
};
};
&edma {
status = "okay";
};
&dp1 {
status = "okay";
phy-handle = <&qca8075_0>;
label = "lan1";
};
&dp2 {
status = "okay";
phy-handle = <&qca8075_1>;
label = "lan2";
};
&dp3 {
status = "okay";
phy-handle = <&qca8075_2>;
label = "lan3";
};
&dp4 {
status = "okay";
phy-handle = <&qca8075_3>;
label = "lan4";
};
&dp5 {
status = "okay";
phy-handle = <&qca8075_4>;
label = "wan";
};
&wifi {
status = "okay";
qcom,ath11k-calibration-variant = "ZBT-Z800AX";
};

View File

@ -324,6 +324,21 @@ define Device/yuncore_ax880
endef endef
TARGET_DEVICES += yuncore_ax880 TARGET_DEVICES += yuncore_ax880
define Device/zbtlink_zbt-z800ax
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := Zbtlink
DEVICE_MODEL := ZBT-Z800AX
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_DTS_CONFIG := config@hk09
SOC := ipq8072
DEVICE_PACKAGES := ipq-wifi-zbtlink_zbt-z800ax
IMAGES += factory.bin
IMAGE/factory.bin := append-ubi | qsdk-ipq-factory-nand
endef
TARGET_DEVICES += zbtlink_zbt-z800ax
define Device/zte_mf269 define Device/zte_mf269
$(call Device/FitImage) $(call Device/FitImage)
$(call Device/UbiFit) $(call Device/UbiFit)

View File

@ -64,6 +64,9 @@ yuncore,ax880)
ucidef_set_led_netdev "wan-port-link" "WAN-PORT-LINK" "90000.mdio-1:18:green:wan" "wan" "tx rx link_10 link_100 link_1000 link_2500" ucidef_set_led_netdev "wan-port-link" "WAN-PORT-LINK" "90000.mdio-1:18:green:wan" "wan" "tx rx link_10 link_100 link_1000 link_2500"
ucidef_set_led_netdev "lan-port-link" "LAN-PORT-LINK" "90000.mdio-1:1c:green:lan" "lan" "tx rx link_10 link_100 link_1000 link_2500" ucidef_set_led_netdev "lan-port-link" "LAN-PORT-LINK" "90000.mdio-1:1c:green:lan" "lan" "tx rx link_10 link_100 link_1000 link_2500"
;; ;;
zbtlink,zbt-z800ax)
ucidef_set_led_netdev "internet" "Internet" "green:wan-online" "wan"
;;
esac esac
board_config_flush board_config_flush

View File

@ -15,7 +15,8 @@ ipq807x_setup_interfaces()
buffalo,wxr-5950ax12|\ buffalo,wxr-5950ax12|\
dynalink,dl-wrx36|\ dynalink,dl-wrx36|\
linksys,mx5300|\ linksys,mx5300|\
xiaomi,ax9000) xiaomi,ax9000|\
zbtlink,zbt-z800ax)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan" ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
;; ;;
cmcc,rm2-6) cmcc,rm2-6)

View File

@ -30,6 +30,7 @@ case "$FIRMWARE" in
xiaomi,ax3600-stock|\ xiaomi,ax3600-stock|\
xiaomi,ax9000|\ xiaomi,ax9000|\
yuncore,ax880|\ yuncore,ax880|\
zbtlink,zbt-z800ax|\
zte,mf269|\ zte,mf269|\
zyxel,nbg7815) zyxel,nbg7815)
caldata_extract "0:art" 0x1000 0x20000 caldata_extract "0:art" 0x1000 0x20000

View File

@ -30,6 +30,10 @@ case "$board" in
[ "$PHYNBR" = "1" ] && macaddr_add $label_mac 1 > /sys${DEVPATH}/macaddress [ "$PHYNBR" = "1" ] && macaddr_add $label_mac 1 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "2" ] && macaddr_add $label_mac 3 > /sys${DEVPATH}/macaddress [ "$PHYNBR" = "2" ] && macaddr_add $label_mac 3 > /sys${DEVPATH}/macaddress
;; ;;
zbtlink,zbt-z800ax)
[ "$PHYNBR" = "0" ] && macaddr_add $(get_mac_label) -1 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $(get_mac_label) -2 > /sys${DEVPATH}/macaddress
;;
zte,mf269-stock) zte,mf269-stock)
mac_addr="$(mtd_get_mac_binary mac 0x0)" mac_addr="$(mtd_get_mac_binary mac 0x0)"
[ "$mac_addr" != "00:00:00:00:00:00" ] || mac_addr="$(get_mac_binary "$(find_mtd_chardev mac)" 0x20000)" [ "$mac_addr" != "00:00:00:00:00:00" ] || mac_addr="$(get_mac_binary "$(find_mtd_chardev mac)" 0x20000)"

View File

@ -51,7 +51,8 @@ platform_do_upgrade() {
netgear,rax120v2|\ netgear,rax120v2|\
netgear,wax218|\ netgear,wax218|\
netgear,wax620|\ netgear,wax620|\
netgear,wax630) netgear,wax630|\
zbtlink,zbt-z800ax)
nand_do_upgrade "$1" nand_do_upgrade "$1"
;; ;;
buffalo,wxr-5950ax12) buffalo,wxr-5950ax12)

Some files were not shown because too many files have changed in this diff Show More