mediatek: initial cmcc a10 support
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen
parent
66a4cb971a
commit
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245
target/linux/mediatek/dts/mt7981b-cmcc-a10-ubootmod.dts
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245
target/linux/mediatek/dts/mt7981b-cmcc-a10-ubootmod.dts
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@ -0,0 +1,245 @@
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/*
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* Copyright (C) 2023 Tianling Shen <cnsztl@immortalwrt.org>
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "mt7981.dtsi"
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/ {
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model = "CMCC A10 (custom U-Boot layout)";
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compatible = "cmcc,a10-ubootmod", "mediatek,mt7981";
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aliases {
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led-boot = &boot_led;
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led-failsafe = &boot_led;
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led-running = &running_led;
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led-upgrade = &running_led;
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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memory {
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reg = <0 0x40000000 0 0x10000000>;
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};
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gpio-keys {
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compatible = "gpio-keys";
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button-reset {
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label = "reset";
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linux,code = <KEY_RESTART>;
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gpios = <&pio 1 GPIO_ACTIVE_LOW>;
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};
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button-wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-leds {
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compatible = "gpio-leds";
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led-0 {
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label = "blue:status";
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gpios = <&pio 9 GPIO_ACTIVE_LOW>;
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};
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running_led: led-1 {
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label = "green:status";
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gpios = <&pio 10 GPIO_ACTIVE_LOW>;
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};
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boot_led: led-2 {
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label = "red:status";
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gpios = <&pio 11 GPIO_ACTIVE_LOW>;
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};
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};
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};
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ð {
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status = "okay";
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gmac0: mac@0 {
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compatible = "mediatek,eth-mac";
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reg = <0>;
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phy-mode = "2500base-x";
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nvmem-cells = <&macaddr_factory_2a 0>;
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nvmem-cell-names = "mac-address";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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&mdio_bus {
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switch: switch@0 {
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compatible = "mediatek,mt7531";
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reg = <31>;
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reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&pio>;
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interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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&spi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_flash_pins>;
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status = "okay";
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spi_nand: flash@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-nand";
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reg = <0>;
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spi-max-frequency = <52000000>;
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spi-tx-bus-width = <4>;
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spi-rx-bus-width = <4>;
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mediatek,nmbm;
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mediatek,bmt-max-ratio = <1>;
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mediatek,bmt-max-reserved-blocks = <64>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "BL2";
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reg = <0x00000 0x100000>;
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read-only;
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};
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partition@100000 {
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label = "u-boot-env";
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reg = <0x100000 0x80000>;
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};
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factory: partition@180000 {
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label = "Factory";
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reg = <0x180000 0x200000>;
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compatible = "nvmem-cells";
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_factory_24: macaddr@24 {
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compatible = "mac-base";
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reg = <0x24 0x6>;
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#nvmem-cell-cells = <1>;
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};
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macaddr_factory_2a: macaddr@2a {
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compatible = "mac-base";
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reg = <0x2a 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@380000 {
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label = "FIP";
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reg = <0x380000 0x200000>;
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};
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partition@580000 {
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label = "ubi";
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reg = <0x580000 0x7000000>;
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};
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};
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};
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};
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&switch {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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label = "lan1";
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};
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port@2 {
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reg = <2>;
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label = "lan2";
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};
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port@3 {
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reg = <3>;
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label = "lan3";
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};
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port@4 {
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reg = <4>;
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label = "wan";
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nvmem-cells = <&macaddr_factory_24 0>;
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nvmem-cell-names = "mac-address";
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};
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port@6 {
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reg = <6>;
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ethernet = <&gmac0>;
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phy-mode = "2500base-x";
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fixed-link {
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speed = <2500>;
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full-duplex;
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pause;
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};
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};
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};
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};
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&pio {
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spi0_flash_pins: spi0-pins {
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mux {
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function = "spi";
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groups = "spi0", "spi0_wp_hold";
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};
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conf-pu {
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pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
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};
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conf-pd {
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pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
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drive-strength = <MTK_DRIVE_8mA>;
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bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
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};
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};
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};
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&uart0 {
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status = "okay";
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};
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&watchdog {
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status = "okay";
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};
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&wifi {
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status = "okay";
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mediatek,mtd-eeprom = <&factory 0x0>;
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};
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@ -34,6 +34,7 @@ mediatek_setup_interfaces()
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;;
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cetron,ct3003-stock|\
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cetron,ct3003-ubootmod|\
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cmcc,a10-ubootmod|\
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cudy,wr3000-v1|\
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jcg,q30-ubootmod|\
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livinet,zr-3020|\
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@ -41,6 +41,10 @@ case "$board" in
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[ "$PHYNBR" = "0" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress
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[ "$PHYNBR" = "1" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
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;;
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cmcc,a10-ubootmod|\
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cmcc,rax3000m-nand-ubootmod)
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[ "$PHYNBR" = "1" ] && mtd_get_mac_binary Factory 0xa > /sys${DEVPATH}/macaddress
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;;
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cmcc,rax3000m)
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case "$(cmdline_get_var root)" in
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/dev/mmc*)
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@ -55,9 +59,6 @@ case "$board" in
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cmcc,rax3000m-emmc-ubootmod)
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[ "$PHYNBR" = "1" ] && mmc_get_mac_binary factory 0xa > /sys${DEVPATH}/macaddress
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;;
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cmcc,rax3000m-nand-ubootmod)
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[ "$PHYNBR" = "1" ] && mtd_get_mac_binary Factory 0xa > /sys${DEVPATH}/macaddress
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;;
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cudy,wr3000-v1)
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addr=$(mtd_get_mac_binary bdinfo 0xde00)
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# Originally, phy0 is phy1 mac with LA bit set. However, this would conflict
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@ -247,6 +247,27 @@ define Device/cetron_ct3003-ubootmod
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endef
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TARGET_DEVICES += cetron_ct3003-ubootmod
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define Device/cmcc_a10-ubootmod
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DEVICE_VENDOR := CMCC
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DEVICE_MODEL := A10 (custom U-Boot layout)
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DEVICE_DTS := mt7981b-cmcc-a10-ubootmod
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DEVICE_DTS_DIR := ../dts
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DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
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UBINIZE_OPTS := -E 5
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BLOCKSIZE := 128k
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PAGESIZE := 2048
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IMAGE_SIZE := 114688k
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KERNEL_IN_UBI := 1
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IMAGES += factory.bin
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IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
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IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
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KERNEL = kernel-bin | lzma | \
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fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
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KERNEL_INITRAMFS = kernel-bin | lzma | \
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fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd
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endef
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TARGET_DEVICES += cmcc_a10-ubootmod
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define Device/cmcc_rax3000m
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DEVICE_VENDOR := CMCC
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DEVICE_MODEL := RAX3000M (OpenWrt U-Boot layout)
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