Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2023-05-14 11:31:16 +08:00
commit 42b32ffddc
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
86 changed files with 2394 additions and 4469 deletions

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@ -1,2 +1,2 @@
LINUX_VERSION-5.15 = .110
LINUX_KERNEL_HASH-5.15.110 = 9829fcc77b9978dce97a26980dec445caf2410024696625dbb2314ead4830b5b
LINUX_VERSION-5.15 = .111
LINUX_KERNEL_HASH-5.15.111 = 77ceea259c0158dd624304871170d09b2e59ed612f3a4d436fe0f07362dcaec2

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@ -0,0 +1,37 @@
--- a/src/drv_mei_cpe_linux.c
+++ b/src/drv_mei_cpe_linux.c
@@ -67,7 +67,7 @@
#if (MEI_SUPPORT_DEBUG_LOGGER == 1)
#include <linux/skbuff.h>
#include <linux/netlink.h>
-#include <net/sock.h>
+#include <net/netlink.h>
#endif
/* add MEI CPE debug/printout part */
@@ -1718,8 +1718,8 @@ static void MEI_MeminfoProcPerDevGet(struct seq_file *s)
", CRC = 0x%08X"
#endif
MEI_DRV_CRLF,
- chunkIdx, pChunk[chunkIdx].pImageChunk_aligned,
- pChunk[chunkIdx].pImageChunk_allocated,
+ chunkIdx, (unsigned int)pChunk[chunkIdx].pImageChunk_aligned,
+ (unsigned int)pChunk[chunkIdx].pImageChunk_allocated,
pChunk[chunkIdx].imageChunkSize_byte,
pChunk[chunkIdx].eImageChunkType
#if (MEI_SUPPORT_OPTIMIZED_FW_DL == 1)
--- a/src/drv_mei_cpe_download_vrx.c
+++ b/src/drv_mei_cpe_download_vrx.c
@@ -3139,9 +3139,9 @@ IFX_int32_t MEI_DEV_IoctlFirmwareDownload(
{
IFX_int32_t ret = 0;
MEI_DEV_T *pMeiDev = pMeiDynCntrl->pMeiDev;
-#if (MEI_EXPORT_INTERNAL_API == 1) && (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1)
- MEI_TC_Reset_t tc_reset = {0};
-#endif
+// #if (MEI_EXPORT_INTERNAL_API == 1) && (MEI_DRV_ATM_PTM_INTERFACE_ENABLE == 1)
+// MEI_TC_Reset_t tc_reset = {0};
+// #endif
#if (MEI_SUPPORT_OPTIMIZED_FW_DL == 1)
IFX_boolean_t bChunksReuse = IFX_FALSE;
#endif

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@ -0,0 +1,36 @@
--- a/src/common/drv_dsl_cpe_api.c
+++ b/src/common/drv_dsl_cpe_api.c
@@ -1922,7 +1922,7 @@ DSL_Error_t DSL_DRV_AutobootControlSet(
}
/* no break */
/* ... pass to restart*/
-
+ fallthrough;
case DSL_AUTOBOOT_CTRL_RESTART:
case DSL_AUTOBOOT_CTRL_RESTART_FULL:
if (bAutobootDisable && pData->data.nCommand == DSL_AUTOBOOT_CTRL_RESTART)
--- a/src/pm/drv_dsl_cpe_pm_core.c
+++ b/src/pm/drv_dsl_cpe_pm_core.c
@@ -2325,16 +2325,18 @@ DSL_Error_t DSL_DRV_PM_CountersReset(
}
#endif /* #ifdef INCLUDE_DSL_CPE_PM_HISTORY*/
- if (ResetType == DSL_PM_RESET_HISTORY)
- break;
+ if (ResetType == DSL_PM_RESET_HISTORY)
+ break;
+ fallthrough;
case DSL_PM_RESET_TOTAL:
#ifdef INCLUDE_DSL_CPE_PM_TOTAL_COUNTERS
memset(EpData.pRecTotal, nFillValue, EpData.nEpRecElementSize);
#endif /* #ifdef INCLUDE_DSL_CPE_PM_TOTAL_COUNTERS*/
- if (ResetType == DSL_PM_RESET_TOTAL)
- break;
+ if (ResetType == DSL_PM_RESET_TOTAL)
+ break;
+ fallthrough;
case DSL_PM_RESET_HISTORY_SHOWTIME:
#ifdef INCLUDE_DSL_CPE_PM_SHOWTIME_COUNTERS
nErrCode = DSL_DRV_PM_HistoryDelete(pContext, EpData.pHistShowtime );

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@ -0,0 +1,132 @@
--- a/src/common/drv_dsl_cpe_os_linux.c
+++ b/src/common/drv_dsl_cpe_os_linux.c
@@ -54,7 +54,7 @@ static int DSL_DRV_Release(DSL_DRV_inode_t * ino, DSL_DRV_file_t * fil);
static DSL_uint_t DSL_DRV_Poll(DSL_DRV_file_t *pFile, DSL_DRV_Poll_Table_t *wait);
-#ifdef INCLUDE_DSL_CPE_DEBUG_LOGGER_SUPPORT
+#if defined(INCLUDE_DSL_CPE_DEBUG_LOGGER_SUPPORT) && !defined(DSL_DEBUG_DISABLE)
static void DSL_DRV_NlSendMsg(DSL_char_t* pMsg);
#endif
@@ -368,10 +368,10 @@ int DSL_DRV_debug_printf(DSL_Context_t const *pContext, DSL_char_t const *fmt, .
{
DSL_int_t nRet = 0;
#ifndef _lint
- DSL_int_t nLength = 0;
- DSL_boolean_t bPrint = DSL_FALSE;
#ifdef INCLUDE_DSL_CPE_DEBUG_LOGGER_SUPPORT
#ifndef DSL_DEBUG_DISABLE
+ DSL_int_t nLength = 0;
+ DSL_boolean_t bPrint = DSL_FALSE;
DSL_char_t debugString[DSL_DBG_MAX_DEBUG_PRINT_CHAR + 1] = {0};
va_list ap; /* points to each unnamed arg in turn */
@@ -406,6 +406,8 @@ int DSL_DRV_debug_printf(DSL_Context_t const *pContext, DSL_char_t const *fmt, .
#endif /* DSL_DEBUG_DISABLE */
return nRet;
#else
+ DSL_int_t nLength = 0;
+ DSL_boolean_t bPrint = DSL_FALSE;
DSL_char_t msg[DSL_DBG_MAX_DEBUG_PRINT_CHAR + 1] = "\0";
va_list ap; /* points to each unnamed arg in turn */
@@ -1172,7 +1174,7 @@ static void DSL_DRV_DebugInit(void)
return;
}
-#ifdef INCLUDE_DSL_CPE_DEBUG_LOGGER_SUPPORT
+#if defined(INCLUDE_DSL_CPE_DEBUG_LOGGER_SUPPORT) && !defined(DSL_DEBUG_DISABLE)
static void DSL_DRV_NlSendMsg(DSL_char_t* pMsg)
{
struct nlmsghdr *pNlMsgHdr;
@@ -1261,7 +1263,7 @@ void __exit DSL_ModuleCleanup(void)
printk("Module will be unloaded"DSL_DRV_CRLF);
device_destroy(dsl_class, dsl_devt);
- dsl_devt = NULL;
+ dsl_devt = 0;
class_destroy(dsl_class);
dsl_class = NULL;
--- a/src/device/drv_dsl_cpe_msg_vrx.c
+++ b/src/device/drv_dsl_cpe_msg_vrx.c
@@ -2456,32 +2456,32 @@ DSL_Error_t DSL_DRV_VRX_SendMsgSnrPerGroupesGet(
#endif /* defined(INCLUDE_DSL_G997_PER_TONE) || defined(INCLUDE_DSL_DELT)*/
#ifdef INCLUDE_DSL_DELT
-static DSL_Error_t DSL_DRV_VRX_SpreadArray(
- DSL_void_t* pArray,
- DSL_uint16_t valueSize,
- DSL_uint16_t valueCount,
- DSL_uint16_t multiplier)
-{
- DSL_void_t* pSrc = pArray + valueSize * (valueCount - 1);
- DSL_void_t* pDst = pArray + valueSize * (valueCount*multiplier - 1);
-
- if (pArray == DSL_NULL)
- {
- return DSL_ERROR;
- }
-
- for (; valueCount; --valueCount, pSrc -= valueSize)
- {
- DSL_uint16_t i;
-
- for ( i = multiplier; i; --i, pDst -= valueSize)
- {
- memcpy(pDst,pSrc,valueSize);
- }
- }
-
- return DSL_SUCCESS;
-}
+// static DSL_Error_t DSL_DRV_VRX_SpreadArray(
+// DSL_void_t* pArray,
+// DSL_uint16_t valueSize,
+// DSL_uint16_t valueCount,
+// DSL_uint16_t multiplier)
+// {
+// DSL_void_t* pSrc = pArray + valueSize * (valueCount - 1);
+// DSL_void_t* pDst = pArray + valueSize * (valueCount*multiplier - 1);
+
+// if (pArray == DSL_NULL)
+// {
+// return DSL_ERROR;
+// }
+
+// for (; valueCount; --valueCount, pSrc -= valueSize)
+// {
+// DSL_uint16_t i;
+
+// for ( i = multiplier; i; --i, pDst -= valueSize)
+// {
+// memcpy(pDst,pSrc,valueSize);
+// }
+// }
+
+// return DSL_SUCCESS;
+// }
/**
This function requests a set of up to 60 entries of the DELT data.
--- a/src/device/drv_dsl_cpe_device_vrx.c
+++ b/src/device/drv_dsl_cpe_device_vrx.c
@@ -3356,7 +3356,9 @@ static DSL_Error_t DSL_DRV_VRX_TestParametersFeUpdate(
DSL_Error_t nErrCode = DSL_SUCCESS;
DSL_uint16_t i = 0;
DSL_uint16_t nDataLen = 0;
+#ifndef DSL_DEBUG_DISABLE
DSL_uint16_t nMsgId = EVT_PMD_TESTPARAMSGET;
+#endif /* DSL_DEBUG_DISABLE */
DSL_DEBUG( DSL_DBG_MSG,
(pContext, SYS_DBG_MSG"DSL[%02d]: IN - DSL_DRV_VRX_TestParametersFeUpdate"
@@ -8312,6 +8314,7 @@ DSL_Error_t DSL_DRV_DEV_AutobootHandleTraining(
(pContext, SYS_DBG_MSG"DSL[%02d]: ORDERLY_SHUTDOWN state reached"
DSL_DRV_CRLF, DSL_DEV_NUM(pContext)));
/* do not use break here, continue handling */
+ fallthrough;
#endif /* INCLUDE_DSL_CPE_API_VRX */
case DSL_LINESTATE_EXCEPTION:
if (!bPreFail)

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@ -0,0 +1,69 @@
--- a/src/vectoring/ifxmips_vectoring.c
+++ b/src/vectoring/ifxmips_vectoring.c
@@ -298,7 +298,7 @@ static int proc_write_dbg(struct file *file, const char __user *buf, size_t coun
DBG_ENABLE_MASK_ALL
};
- char str[2048];
+ char *str;
char *p;
int len, rlen;
@@ -306,6 +306,10 @@ static int proc_write_dbg(struct file *file, const char __user *buf, size_t coun
int f_enable = 0;
int i;
+ str = kcalloc(2048, sizeof(*str), GFP_KERNEL);
+ if (!str)
+ return -ENOMEM;
+
len = count < sizeof(str) ? count : sizeof(str) - 1;
rlen = len - copy_from_user(str, buf, len);
while ( rlen && str[rlen - 1] <= ' ' )
@@ -365,6 +369,8 @@ static int proc_write_dbg(struct file *file, const char __user *buf, size_t coun
}
}
+ kfree(str);
+
return count;
}
--- a/src/vectoring/ifxmips_vectoring_test.c
+++ b/src/vectoring/ifxmips_vectoring_test.c
@@ -3,6 +3,7 @@
#include <linux/module.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
+#include <linux/slab.h>
#include "ifxmips_vectoring_stub.h"
@@ -46,13 +47,17 @@ static int proc_write_vectoring(struct file *file, const char __user *buf, size_
{
char *p;
int len;
- char local_buf[1024];
+ char *local_buf;
unsigned long pkt_len;
int ret;
unsigned long sys_flag;
unsigned long start, end;
+ local_buf = kcalloc(1024, sizeof(*local_buf), GFP_KERNEL);
+ if (!local_buf)
+ return -ENOMEM;
+
len = sizeof(local_buf) < count ? sizeof(local_buf) - 1 : count;
len = len - copy_from_user(local_buf, buf, len);
local_buf[len] = 0;
@@ -81,6 +86,8 @@ static int proc_write_vectoring(struct file *file, const char __user *buf, size_
else
printk("echo send <size> > /proc/driver/vectoring_test\n");
+ kfree(local_buf);
+
return count;
}

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@ -20,7 +20,7 @@ define Package/nu801
SECTION:=utils
CATEGORY:=Utilities
SUBMENU:=Userspace GPIO Drivers
DEPENDS:=@(TARGET_x86||TARGET_bcm53xx)
DEPENDS:=@(TARGET_ath79_nand||TARGET_bcm53xx||TARGET_x86)
KCONFIG:=CONFIG_GPIO_CDEV=y
TITLE:=NU801 LED Driver
endef

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@ -15,7 +15,7 @@ define Build/MerakiAdd-dtb
@mv $@.new $@
endef
define Build/MerakiNAND
define Build/meraki-header
-$(STAGING_DIR_HOST)/bin/mkmerakifw \
-B $(BOARD_NAME) -s \
-i $@ \
@ -32,7 +32,7 @@ define Device/meraki_mr24
IMAGES := sysupgrade.bin
DTB_SIZE := 64512
IMAGE_SIZE := 8191k
KERNEL := kernel-bin | lzma | uImage lzma | MerakiAdd-dtb | MerakiNAND
KERNEL := kernel-bin | lzma | uImage lzma | MerakiAdd-dtb | meraki-header
KERNEL_INITRAMFS := kernel-bin | lzma | dtb | MuImage-initramfs lzma
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
UBINIZE_OPTS := -E 5

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@ -87,6 +87,7 @@
status = "okay";
nand-ecc-mode = "soft";
nand-ecc-step-size = <2048>;
qca,nand-swap-dma;
qca,nand-scan-fixup;

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@ -0,0 +1,203 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qca955x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
compatible = "meraki,mr18", "qca,qca9558";
model = "Meraki MR18";
aliases {
label-mac-device = &eth0;
led-boot = &white;
led-failsafe = &orange;
led-running = &green;
led-upgrade = &white;
};
leds {
compatible = "gpio-leds";
white: white {
label = "white:power";
gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
};
orange: orange {
label = "orange:power";
gpios = <&gpio 21 GPIO_ACTIVE_HIGH>;
panic-indicator;
};
};
uleds {
compatible = "virtual-leds";
#if 0
/*
* RGB leds are not supported by uleds driver.
* but this is what the definitions for a as
* of yet unwritten leds_nu801 would look like.
*/
rgbled-0 {
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_RGB>;
#address-cells = <1>;
#size-cells = <0>;
led@0 {
reg = <0>;
color = <LED_COLOR_ID_RED>;
};
green: led@1 {
reg = <1>;
color = <LED_COLOR_ID_GREEN>;
};
led@2 {
reg = <2>;
color = <LED_COLOR_ID_BLUE>;
};
};
#else
red {
label = "red:tricolor";
color = <LED_COLOR_ID_RED>;
};
green: green {
label = "green:tricolor";
color = <LED_COLOR_ID_GREEN>;
};
blue {
label = "blue:tricolor";
color = <LED_COLOR_ID_BLUE>;
};
#endif
};
button {
compatible = "gpio-keys";
reset {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&nand {
status = "okay";
nand-ecc-mode = "soft";
nand-ecc-algo = "bch";
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-is-boot-medium;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "nandloader";
reg = <0x0 0x80000>;
read-only;
};
partition@80000 {
label = "kernel";
reg = <0x80000 0x800000>;
};
partition@880000 {
label = "recovery";
reg = <0x880000 0x800000>;
};
partition@1080000 {
label = "ubi";
reg = <0x1080000 0x6f00000>;
};
partition@7fe0000 {
/*
* This is not always present. And if
* it is, then Meraki (or contractor)
* used a different ecc method than
* the one we need for the UBI partition.
* Reading this causes various reading
* errors.
*
* As a result: Please don't convert
* this to nvmem-cells. Instead there's
* a ubi-volume "caldata" that has the
* necessary data.
*/
label = "odm-caldata";
reg = <0x7fe0000 0x20000>;
read-only;
};
};
};
&pcie0 {
status = "okay";
wifi@0,0 {
compatible = "pci168c,0033";
reg = <0x0000 0 0 0 0>;
qca,no-eeprom;
};
};
&pcie1 {
status = "okay";
wifi@0,0 {
compatible = "pci168c,0033";
reg = <0x0000 0 0 0 0>;
qca,no-eeprom;
};
};
&uart {
status = "okay";
};
&mdio0 {
status = "okay";
phy: ethernet-phy@3 {
reg = <3>;
};
};
&eth0 {
status = "okay";
pll-data = <0xa6000000 0xa0000101 0x80001313>;
phy-handle = <&phy>;
gmac-config {
device = <&gmac>;
rgmii-enabled = <1>;
rxd-delay = <3>;
rxdv-delay = <3>;
};
};
&wmac {
status = "okay";
qca,no-eeprom;
};

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@ -150,6 +150,7 @@
status = "okay";
nand-ecc-mode = "soft";
nand-ecc-step-size = <2048>;
qca,nand-swap-dma;
qca,nand-scan-fixup;

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@ -1325,10 +1325,10 @@ static int ar934x_nfc_attach_chip(struct nand_chip *nand)
if (ret)
return ret;
if (nand->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST) {
if (mtd->writesize == 2048)
nand->options |= NAND_NO_SUBPAGE_WRITE;
if (nand->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_HOST) {
ret = ar934x_nfc_setup_hwecc(nfc);
if (ret)
return ret;

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@ -128,6 +128,17 @@
#define AR9300_OTP_STATUS_SM_BUSY 0x1
#define AR9300_OTP_READ_DATA 0x15f1c
#define QCA955X_OTP_BASE (AR71XX_APB_BASE + 0x00130000)
#define QCA955X_OTP_REG_MEM_0 0x0000
#define QCA955X_OTP_REG_INTF2 0x1008
#define QCA955X_OTP_REG_STATUS0 0x1018
#define QCA955X_OTP_STATUS0_EFUSE_VALID BIT(2)
#define QCA955X_OTP_REG_STATUS1 0x101c
#define QCA955X_OTP_REG_LDO_CTRL 0x1024
#define QCA955X_OTP_REG_LDO_STATUS 0x102c
#define QCA955X_OTP_LDO_STATUS_POWER_ON BIT(0)
/*
* DDR_CTRL block
*/
@ -344,6 +355,7 @@
#define QCA955X_RESET_REG_BOOTSTRAP 0xb0
#define QCA955X_RESET_REG_EXT_INT_STATUS 0xac
#define QCA955X_RESET_REG_RESET_MODULE 0x1c
#define MISC_INT_ETHSW BIT(12)
#define MISC_INT_TIMER4 BIT(10)
@ -436,6 +448,9 @@
#define AR934X_RESET_MBOX BIT(1)
#define AR934X_RESET_I2S BIT(0)
#define QCA955X_RESET_SGMII_ANALOG BIT(12)
#define QCA955X_RESET_SGMII BIT(8)
#define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18)
#define AR933X_BOOTSTRAP_EEPBUSY BIT(4)
#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
@ -722,4 +737,6 @@
#define QCA955X_ETH_CFG_RGMII_GMAC0 BIT(0)
#define QCA955X_ETH_CFG_SGMII_GMAC0 BIT(6)
#define QCA955X_GMAC_REG_SGMII_SERDES 0x0018
#endif /* __ASM_MACH_AR71XX_REGS_H */

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@ -10,6 +10,7 @@
#include <stddef.h>
#include "config.h"
#include "printf.h"
#include "ar71xx_regs.h"
#define READREG(r) *(volatile unsigned int *)(r)
@ -50,7 +51,139 @@ static void tlwr1043nd_init(void)
static inline void tlwr1043nd_init(void) {}
#endif
#ifdef CONFIG_BOARD_MERAKI_MR18
static int mr18_extract_sgmii_res_cal(void)
{
unsigned int base;
unsigned int reversed_sgmii_value;
unsigned int otp_value, otp_per_val, rbias_per, read_data;
unsigned int rbias_pos_or_neg;
unsigned int sgmii_res_cal_value;
int res_cal_val;
base = KSEG1ADDR(QCA955X_OTP_BASE);
WRITEREG(base + QCA955X_OTP_REG_INTF2, 0x7d);
WRITEREG(base + QCA955X_OTP_REG_LDO_CTRL, 0x00);
while (READREG(base + QCA955X_OTP_REG_LDO_STATUS) &
QCA955X_OTP_LDO_STATUS_POWER_ON)
;
READREG(base + QCA955X_OTP_REG_MEM_0 + 4);
while (!(READREG(base + QCA955X_OTP_REG_STATUS0) &
QCA955X_OTP_STATUS0_EFUSE_VALID))
;
read_data = READREG(base + QCA955X_OTP_REG_STATUS1);
if (!(read_data & 0x1fff))
return 0;
if (read_data & 0x00001000)
otp_value = (read_data & 0xfc0) >> 6;
else
otp_value = read_data & 0x3f;
if (otp_value > 31) {
otp_per_val = 63 - otp_value;
rbias_pos_or_neg = 1;
} else {
otp_per_val = otp_value;
rbias_pos_or_neg = 0;
}
rbias_per = otp_per_val * 15;
if (rbias_pos_or_neg == 1)
res_cal_val = (rbias_per + 34) / 21;
else if (rbias_per > 34)
res_cal_val = -((rbias_per - 34) / 21);
else
res_cal_val = (34 - rbias_per) / 21;
sgmii_res_cal_value = (8 + res_cal_val) & 0xf;
reversed_sgmii_value = (sgmii_res_cal_value & 8) >> 3;
reversed_sgmii_value |= (sgmii_res_cal_value & 4) >> 1;
reversed_sgmii_value |= (sgmii_res_cal_value & 2) << 1;
reversed_sgmii_value |= (sgmii_res_cal_value & 1) << 3;
printf("SGMII cal value = 0x%x\n", reversed_sgmii_value);
return reversed_sgmii_value;
}
#define QCA955X_SGMII_SERDES_RES_CALIBRATION BIT(23)
#define QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK 0xf
#define QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT 23
#define QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS BIT(15)
#define QCA955X_PLL_ETH_SGMII_SERDES_LOCK_DETECT BIT(2)
#define QCA955X_PLL_ETH_SGMII_SERDES_PLL_REFCLK BIT(1)
#define QCA955X_PLL_ETH_SGMII_SERDES_EN_PLL BIT(0)
#define QCA955X_PLL_CLK_CTRL_REG 0x08
#define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28
#define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48
#define QCA955X_PLL_ETH_SGMII_SERDES_REG 0x4c
static void qca955x_device_reset_clear(unsigned int mask)
{
unsigned int t, reg;
reg = KSEG1ADDR(AR71XX_RESET_BASE +
QCA955X_RESET_REG_RESET_MODULE);
t = READREG(reg);
WRITEREG(reg, t & ~mask);
}
static void mr18_setup_qca955x_eth_serdes_cal(unsigned int sgmii_value)
{
unsigned int ethbase, pllbase, t;
ethbase = KSEG1ADDR(QCA955X_GMAC_BASE);
pllbase = KSEG1ADDR(AR71XX_PLL_BASE);
/* To Check the locking of the SGMII PLL */
t = READREG(ethbase + QCA955X_GMAC_REG_SGMII_SERDES);
t &= ~(QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK <<
QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT);
t |= (sgmii_value & QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK) <<
QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT;
WRITEREG(ethbase + QCA955X_GMAC_REG_SGMII_SERDES, t);
WRITEREG(pllbase + QCA955X_PLL_ETH_SGMII_SERDES_REG,
QCA955X_PLL_ETH_SGMII_SERDES_LOCK_DETECT |
QCA955X_PLL_ETH_SGMII_SERDES_PLL_REFCLK |
QCA955X_PLL_ETH_SGMII_SERDES_EN_PLL)
;
qca955x_device_reset_clear(QCA955X_RESET_SGMII_ANALOG);
qca955x_device_reset_clear(QCA955X_RESET_SGMII);
while (!(READREG(ethbase + QCA955X_GMAC_REG_SGMII_SERDES) &
QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS))
;
}
static inline void mr18_init(void)
{
int res;
printf("Meraki MR18\n");
res = mr18_extract_sgmii_res_cal();
if (res >= 0)
mr18_setup_qca955x_eth_serdes_cal(res);
}
#else
static inline void mr18_init(void) { }
#endif
void board_init(void)
{
tlwr1043nd_init();
mr18_init();
}

View File

@ -11,6 +11,14 @@ define Build/dongwon-header
mv $@.tmp $@
endef
define Build/meraki-header
-$(STAGING_DIR_HOST)/bin/mkmerakifw \
-B $(1) -s \
-i $@ \
-o $@.new
@mv $@.new $@
endef
# attention: only zlib compression is allowed for the boot fs
define Build/zyxel-buildkerneljffs
mkdir -p $@.tmp/boot
@ -260,6 +268,23 @@ define Device/linksys_ea4500-v3
endef
TARGET_DEVICES += linksys_ea4500-v3
define Device/meraki_mr18
SOC := qca9557
DEVICE_VENDOR := Meraki
DEVICE_MODEL := MR18
DEVICE_PACKAGES := kmod-spi-gpio nu801
KERNEL_SIZE := 8m
BLOCKSIZE := 128k
PAGESIZE := 2048
LOADER_TYPE := bin
KERNEL := kernel-bin | append-dtb | lzma | loader-kernel | meraki-header MR18
# Initramfs-build fails due to size issues
# KERNEL_INITRAMFS := $$(KERNEL)
KERNEL_INITRAMFS :=
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += meraki_mr18
# fake rootfs is mandatory, pad-offset 64 equals (1 * uimage_header)
define Device/netgear_ath79_nand
DEVICE_VENDOR := NETGEAR

View File

@ -8,7 +8,8 @@ ath79_setup_interfaces()
case "$board" in
aerohive,hiveap-121|\
glinet,gl-e750)
glinet,gl-e750|\
meraki,mr18)
ucidef_set_interface_lan "eth0"
;;
domywifi,dw33d)
@ -102,6 +103,9 @@ ath79_setup_macs()
wan_mac=$(mtd_get_mac_binary art 0x0)
lan_mac=$(macaddr_add "$wan_mac" 1)
;;
meraki,mr18)
lan_mac=$(mtd_get_mac_binary_ubi board-config 102)
;;
netgear,wndr3700-v4|\
netgear,wndr4300|\
netgear,wndr4300sw|\

View File

@ -12,6 +12,50 @@ case "$FIRMWARE" in
8dev,rambutan)
caldata_extract "caldata" 0x1000 0x800
;;
meraki,mr18)
. /lib/upgrade/nand.sh
if [ -n "$(nand_find_volume ubi0 caldata)" ]; then
caldata_extract_ubi "caldata" 0x1000 0x440
else
caldata_extract "odm-caldata" 0x1000 0x440
fi
ath9k_patch_mac $(macaddr_add $(mtd_get_mac_binary_ubi board-config 102) 1)
;;
*)
caldata_die "board $board is not supported yet"
;;
esac
;;
"ath9k-eeprom-pci-0000:00:00.0.bin")
case $board in
meraki,mr18)
. /lib/upgrade/nand.sh
if [ -n "$(nand_find_volume ubi0 caldata)" ]; then
caldata_extract_ubi "caldata" 0x5000 0x440
else
caldata_extract "odm-caldata" 0x5000 0x440
fi
ath9k_patch_mac $(macaddr_add $(mtd_get_mac_binary_ubi board-config 102) 2)
;;
*)
caldata_die "board $board is not supported yet"
;;
esac
;;
"ath9k-eeprom-pci-0000:01:00.0.bin")
case $board in
meraki,mr18)
. /lib/upgrade/nand.sh
if [ -n "$(nand_find_volume ubi0 caldata)" ]; then
caldata_extract_ubi "caldata" 0x9000 0x440
else
caldata_extract "odm-caldata" 0x9000 0x440
fi
ath9k_patch_mac $(macaddr_add $(mtd_get_mac_binary_ubi board-config 102) 3)
;;
*)
caldata_die "board $board is not supported yet"
;;

View File

@ -8,6 +8,7 @@ CONFIG_LZO_DECOMPRESS=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_AR934X=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC_SW_BCH=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPI_NAND=y
CONFIG_MTD_UBI=y

View File

@ -39,7 +39,7 @@ Changes from v1:
--- a/drivers/gpu/drm/drm_probe_helper.c
+++ b/drivers/gpu/drm/drm_probe_helper.c
@@ -795,6 +795,86 @@ void drm_kms_helper_poll_fini(struct drm
@@ -796,6 +796,86 @@ void drm_kms_helper_poll_fini(struct drm
}
EXPORT_SYMBOL(drm_kms_helper_poll_fini);
@ -126,7 +126,7 @@ Changes from v1:
/**
* drm_helper_hpd_irq_event - hotplug processing
* @dev: drm_device
@@ -808,9 +888,10 @@ EXPORT_SYMBOL(drm_kms_helper_poll_fini);
@@ -809,9 +889,10 @@ EXPORT_SYMBOL(drm_kms_helper_poll_fini);
* interrupts for each connector.
*
* Drivers which support hotplug interrupts for each connector individually and
@ -140,7 +140,7 @@ Changes from v1:
*
* This function must be called from process context with no mode
* setting locks held.
@@ -822,9 +903,7 @@ bool drm_helper_hpd_irq_event(struct drm
@@ -823,9 +904,7 @@ bool drm_helper_hpd_irq_event(struct drm
{
struct drm_connector *connector;
struct drm_connector_list_iter conn_iter;
@ -150,7 +150,7 @@ Changes from v1:
if (!dev->mode_config.poll_enabled)
return false;
@@ -832,37 +911,8 @@ bool drm_helper_hpd_irq_event(struct drm
@@ -833,37 +912,8 @@ bool drm_helper_hpd_irq_event(struct drm
mutex_lock(&dev->mode_config.mutex);
drm_connector_list_iter_begin(dev, &conn_iter);
drm_for_each_connector_iter(connector, &conn_iter) {

View File

@ -30043,7 +30043,7 @@ index 11eae3e3a944..5a90727064ee 100644
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2710-rpi-cm3.dtb
+dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-cm4.dtb
subdir-y += bcm4908
subdir-y += bcmbca
subdir-y += northstar2
subdir-y += stingray
+

View File

@ -11,11 +11,11 @@ This matches nand-controller.yaml requirements.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 2 +-
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -298,7 +298,7 @@
status = "okay";
};

View File

@ -1,81 +0,0 @@
From d0e68d354f345873e15876a7b35be1baaf5e3ec9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 5 Nov 2021 11:14:13 +0100
Subject: [PATCH] arm64: dts: broadcom: bcm4908: add DT for Netgear RAXE500
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It's a home router based on BCM4908 SoC. It has: 1 GiB of RAM, 512 MiB
NAND flash, 6 Ethernet ports and 3 x BCM43684 (WiFi). One of Ethernet
ports is "2.5 G Multi-Gig port" that isn't described yet (it isn't known
how it's wired up).
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/Makefile | 1 +
.../bcm4908/bcm4908-netgear-raxe500.dts | 50 +++++++++++++++++++
2 files changed, 51 insertions(+)
create mode 100644 arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-netgear-raxe500.dts
--- a/arch/arm64/boot/dts/broadcom/bcm4908/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/Makefile
@@ -2,3 +2,4 @@
dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-netgear-r8000p.dtb
dtb-$(CONFIG_ARCH_BCM4908) += bcm4906-tplink-archer-c2300-v1.dtb
dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-asus-gt-ac5300.dtb
+dtb-$(CONFIG_ARCH_BCM4908) += bcm4908-netgear-raxe500.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-netgear-raxe500.dts
@@ -0,0 +1,50 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "bcm4908.dtsi"
+
+/ {
+ compatible = "netgear,raxe500", "brcm,bcm4908";
+ model = "Netgear RAXE500";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00 0x00 0x00 0x40000000>;
+ };
+};
+
+&ehci {
+ status = "okay";
+};
+
+&ohci {
+ status = "okay";
+};
+
+&xhci {
+ status = "okay";
+};
+
+&ports {
+ port@0 {
+ label = "lan4";
+ };
+
+ port@1 {
+ label = "lan3";
+ };
+
+ port@2 {
+ label = "lan2";
+ };
+
+ port@3 {
+ label = "lan1";
+ };
+
+ port@7 {
+ reg = <7>;
+ phy-mode = "internal";
+ phy-handle = <&phy12>;
+ label = "wan";
+ };
+};

View File

@ -11,11 +11,11 @@ Describe pinmux block with its maps.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 135 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm4908.dtsi | 135 ++++++++++++++++++
1 file changed, 135 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -289,6 +289,141 @@
gpio-controller;
};

View File

@ -12,11 +12,11 @@ binding which matches the first SoC with that block.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 9 +++++++++
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -278,6 +278,15 @@
twd: timer-mfd@400 {
compatible = "brcm,bcm4908-twd", "simple-mfd", "syscon";

View File

@ -11,11 +11,11 @@ BCM4908 uses the same I2C hw as BCM63xx / BCM67xx / BCM68xx SoCs.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 9 +++++++++
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -458,6 +458,15 @@
};
};

View File

@ -1,199 +0,0 @@
From 076dcedc6628c6bf92bd17bfcf8fb7b1af62bfb6 Mon Sep 17 00:00:00 2001
From: William Zhang <william.zhang@broadcom.com>
Date: Wed, 1 Jun 2022 15:56:51 -0700
Subject: [PATCH] arm64: dts: Add DTS files for bcmbca SoC BCM63158
Add DTS for ARMv8 based broadband SoC BCM63158. bcm63158.dtsi is the
SoC description DTS header and bcm963158.dts is a simple DTS file for
Broadcom BCM963158 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/Makefile | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 2 +
.../boot/dts/broadcom/bcmbca/bcm63158.dtsi | 128 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm963158.dts | 30 ++++
4 files changed, 161 insertions(+)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/Makefile
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts
--- a/arch/arm64/boot/dts/broadcom/Makefile
+++ b/arch/arm64/boot/dts/broadcom/Makefile
@@ -7,5 +7,6 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rp
bcm2837-rpi-cm3-io3.dtb
subdir-y += bcm4908
+subdir-y += bcmbca
subdir-y += northstar2
subdir-y += stingray
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -0,0 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0
+dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm63158.dtsi
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm63158", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>,
+ <&B53_2>, <&B53_3>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ uart_clk: uart-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x800000>;
+
+ uart0: serial@12000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x12000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&uart_clk>, <&uart_clk>;
+ clock-names = "uartclk", "apb_pclk";
+ status = "disabled";
+ };
+ };
+};
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm963158.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm63158.dtsi"
+
+/ {
+ model = "Broadcom BCM963158 Reference Board";
+ compatible = "brcm,bcm963158", "brcm,bcm63158", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};

View File

@ -1,191 +0,0 @@
From 1ba56aeb391401c4cb2126c39f90b3cdbfabdb3f Mon Sep 17 00:00:00 2001
From: William Zhang <william.zhang@broadcom.com>
Date: Wed, 1 Jun 2022 13:17:34 -0700
Subject: [PATCH] arm64: dts: Add DTS files for bcmbca SoC BCM4912
Add DTS for ARMv8 based broadband SoC BCM4912. bcm4912.dtsi is the
SoC description DTS header and bcm94912.dts is a simple DTS file for
Broadcom BCM94912 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm4912.dtsi | 128 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm94912.dts | 30 ++++
3 files changed, 160 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb
+dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dtb \
+ bcm963158.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912.dtsi
@@ -0,0 +1,128 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm4912", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a53-pmu";
+ interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>,
+ <&B53_2>, <&B53_3>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ uart_clk: uart-clk {
+ compatible = "fixed-factor-clock";
+ #clock-cells = <0>;
+ clocks = <&periph_clk>;
+ clock-div = <4>;
+ clock-mult = <1>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x800000>;
+
+ uart0: serial@12000 {
+ compatible = "arm,pl011", "arm,primecell";
+ reg = <0x12000 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&uart_clk>, <&uart_clk>;
+ clock-names = "uartclk", "apb_pclk";
+ status = "disabled";
+ };
+ };
+};
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm94912.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm4912.dtsi"
+
+/ {
+ model = "Broadcom BCM94912 Reference Board";
+ compatible = "brcm,bcm94912", "brcm,bcm4912", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};

View File

@ -1,184 +0,0 @@
From e663e06bd3f21e64bc2163910f626af68add6308 Mon Sep 17 00:00:00 2001
From: Anand Gore <anand.gore@broadcom.com>
Date: Wed, 1 Jun 2022 13:19:56 -0700
Subject: [PATCH] ARM64: dts: Add DTS files for bcmbca SoC BCM6858
Add DTS for ARMv8 based broadband SoC BCM6858. bcm6858.dtsi is the SoC
description DTS header and bcm96858.dts is a simple DTS file for
Broadcom BCM96858 Reference board that only enables the UART port.
Signed-off-by: Anand Gore <anand.gore@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm6858.dtsi | 121 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm96858.dts | 30 +++++
3 files changed, 153 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -1,3 +1,4 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dtb \
- bcm963158.dtb
+ bcm963158.dtb \
+ bcm96858.dtb
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm6858", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>,
+ <&B53_2>, <&B53_3>;
+ };
+
+ clocks: clocks {
+ periph_clk:periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x1000 0x1000>, /* GICD */
+ <0x2000 0x2000>, /* GICC */
+ <0x4000 0x2000>, /* GICH */
+ <0x6000 0x2000>; /* GICV */
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x62000>;
+
+ uart0: serial@640 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x640 0x18>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&periph_clk>;
+ clock-names = "refclk";
+ status = "disabled";
+ };
+ };
+};
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6858.dtsi"
+
+/ {
+ model = "Broadcom BCM96858 Reference Board";
+ compatible = "brcm,bcm96858", "brcm,bcm6858", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};

View File

@ -19,9 +19,9 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -1,4 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dtb \
@@ -7,4 +7,5 @@ dtb-$(CONFIG_ARCH_BCMBCA) += \
bcm4912-asus-gt-ax6000.dtb \
bcm94912.dtb \
bcm963158.dtb \
- bcm96858.dtb
+ bcm96858.dtb \

View File

@ -19,8 +19,8 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -2,4 +2,5 @@
dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dtb \
@@ -8,4 +8,5 @@ dtb-$(CONFIG_ARCH_BCMBCA) += \
bcm94912.dtb \
bcm963158.dtb \
bcm96858.dtb \
- bcm963146.dtb

View File

@ -19,7 +19,7 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -3,4 +3,5 @@ dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dt
@@ -9,4 +9,5 @@ dtb-$(CONFIG_ARCH_BCMBCA) += \
bcm963158.dtb \
bcm96858.dtb \
bcm963146.dtb \

View File

@ -9,12 +9,12 @@ The node names should be generic and DT schema expects certain pattern
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-6-krzysztof.kozlowski@linaro.org
---
.../broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts | 8 ++++----
.../boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts | 8 ++++----
.../broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts | 8 ++++----
.../boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts | 8 ++++----
2 files changed, 8 insertions(+), 8 deletions(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts
@@ -83,25 +83,25 @@
compatible = "gpio-keys-polled";
poll-interval = <100>;
@ -45,8 +45,8 @@ Link: https://lore.kernel.org/r/20220616005333.18491-6-krzysztof.kozlowski@linar
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio0 23 GPIO_ACTIVE_LOW>;
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts
@@ -18,25 +18,25 @@
compatible = "gpio-keys-polled";
poll-interval = <100>;

View File

@ -11,11 +11,11 @@ Fixes: c8b404fb05dc ("arm64: dts: broadcom: bcm4908: add BCM4906 Netgear R8000P
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi | 8 ++++++++
arch/arm64/boot/dts/broadcom/bcmbca/bcm4906.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906.dtsi
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906.dtsi
@@ -17,6 +17,14 @@
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};

View File

@ -1,54 +0,0 @@
From f3f575c4bef95384e68de552c7b29938fd0d9201 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Wed, 13 Jul 2022 22:03:51 +0200
Subject: [PATCH] arm64: dts: Add base DTS file for bcmbca device Asus
GT-AX6000
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
It's a home router with 1 GiB of RAM, 6 Ethernet ports, 2 USB ports.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20220713200351.28526-2-zajec5@gmail.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 4 +++-
.../bcmbca/bcm4912-asus-gt-ax6000.dts | 19 +++++++++++++++++++
2 files changed, 22 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm4912-asus-gt-ax6000.dts
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -1,5 +1,7 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_ARCH_BCMBCA) += bcm94912.dtb \
+dtb-$(CONFIG_ARCH_BCMBCA) += \
+ bcm4912-asus-gt-ax6000.dtb \
+ bcm94912.dtb \
bcm963158.dtb \
bcm96858.dtb \
bcm963146.dtb \
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4912-asus-gt-ax6000.dts
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+
+#include "bcm4912.dtsi"
+
+/ {
+ compatible = "asus,gt-ax6000", "brcm,bcm4912", "brcm,bcmbca";
+ model = "Asus GT-AX6000";
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00 0x00 0x00 0x40000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};

View File

@ -12,11 +12,11 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20220718132100.13277-1-zajec5@gmail.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../boot/dts/broadcom/bcm4908/bcm4908.dtsi | 75 +++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm4908.dtsi | 75 +++++++++++++++++++
1 file changed, 75 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -352,6 +352,61 @@
groups = "led_9_grp_a";
};

View File

@ -13,11 +13,11 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20220718132100.13277-2-zajec5@gmail.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 8 ++++++++
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -517,6 +517,14 @@
status = "okay";
};

View File

@ -12,11 +12,11 @@ Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20220718132100.13277-3-zajec5@gmail.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
.../bcm4908/bcm4908-asus-gt-ac5300.dts | 48 +++++++++++++++++++
.../bcmbca/bcm4908-asus-gt-ac5300.dts | 48 +++++++++++++++++++
1 file changed, 48 insertions(+)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts
@@ -2,6 +2,7 @@
#include <dt-bindings/gpio/gpio.h>

View File

@ -14,14 +14,14 @@ Acked-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/r/20220803175455.47638-4-william.zhang@broadcom.com
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts | 2 +-
.../dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts | 2 +-
arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts | 2 +-
.../arm64/boot/dts/broadcom/bcm4908/bcm4908-netgear-raxe500.dts | 2 +-
arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts | 2 +-
.../dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts | 2 +-
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts | 2 +-
.../arm64/boot/dts/broadcom/bcmbca/bcm4908-netgear-raxe500.dts | 2 +-
4 files changed, 4 insertions(+), 4 deletions(-)
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-netgear-r8000p.dts
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-netgear-r8000p.dts
@@ -7,7 +7,7 @@
#include "bcm4906.dtsi"
@ -31,8 +31,8 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
model = "Netgear R8000P";
memory@0 {
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4906-tplink-archer-c2300-v1.dts
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4906-tplink-archer-c2300-v1.dts
@@ -7,7 +7,7 @@
#include "bcm4906.dtsi"
@ -42,8 +42,8 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
model = "TP-Link Archer C2300 V1";
memory@0 {
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-asus-gt-ac5300.dts
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-asus-gt-ac5300.dts
@@ -7,7 +7,7 @@
#include "bcm4908.dtsi"
@ -53,8 +53,8 @@ Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
model = "Asus GT-AC5300";
memory@0 {
--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-netgear-raxe500.dts
+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908-netgear-raxe500.dts
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-netgear-raxe500.dts
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-netgear-raxe500.dts
@@ -3,7 +3,7 @@
#include "bcm4908.dtsi"

View File

@ -1,33 +0,0 @@
From 5cca02449490e767289bda38db1577e2c375c084 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 28 Feb 2023 15:43:58 +0100
Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: fix NAND interrupt
name
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This fixes:
arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dtb: nand-controller@1800: interrupt-names:0: 'nand_ctlrdy' was expected
From schema: Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dtb: nand-controller@1800: Unevaluated properties are not allowed ('interrupt-names' was unexpected)
From schema: Documentation/devicetree/bindings/mtd/brcm,brcmnand.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/all/20230228144400.21689-1-zajec5@gmail.com/
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -556,7 +556,7 @@
reg = <0x1800 0x600>, <0x2000 0x10>;
reg-names = "nand", "nand-int-base";
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "nand";
+ interrupt-names = "nand_ctlrdy";
status = "okay";
nandcs: nand@0 {

View File

@ -1,30 +0,0 @@
From f16a8294dd7a02c7ad042cd2e3acc5ea06698dc1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Tue, 28 Feb 2023 15:44:00 +0100
Subject: [PATCH] arm64: dts: broadcom: bcmbca: bcm4908: fix procmon nodename
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This fixes:
arch/arm64/boot/dts/broadcom/bcmbca/bcm94908.dtb: syscon@280000: $nodename:0: 'syscon@280000' does not match '^([a-z][a-z0-9\\-]+-bus|bus|localbus|soc|axi|ahb|apb)(@.+)?$'
From schema: schemas/simple-bus.yaml
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Link: https://lore.kernel.org/all/20230228144400.21689-3-zajec5@gmail.com/
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
@@ -260,7 +260,7 @@
};
};
- procmon: syscon@280000 {
+ procmon: bus@280000 {
compatible = "simple-bus";
reg = <0x280000 0x1000>;
ranges;

View File

@ -25,7 +25,7 @@ Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -1229,6 +1229,34 @@ int __get_mtd_device(struct mtd_info *mt
@@ -1236,6 +1236,34 @@ int __get_mtd_device(struct mtd_info *mt
EXPORT_SYMBOL_GPL(__get_mtd_device);
/**

View File

@ -31,7 +31,7 @@ Link: https://lore.kernel.org/linux-mtd/20220629125737.14418-2-kernel@kempniu.pl
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -1669,6 +1669,9 @@ int mtd_read_oob(struct mtd_info *mtd, l
@@ -1676,6 +1676,9 @@ int mtd_read_oob(struct mtd_info *mtd, l
if (!master->_read_oob && (!master->_read || ops->oobbuf))
return -EOPNOTSUPP;
@ -41,7 +41,7 @@ Link: https://lore.kernel.org/linux-mtd/20220629125737.14418-2-kernel@kempniu.pl
if (mtd->flags & MTD_SLC_ON_MLC_EMULATION)
ret_code = mtd_io_emulated_slc(mtd, from, true, ops);
else
@@ -1686,6 +1689,8 @@ int mtd_read_oob(struct mtd_info *mtd, l
@@ -1693,6 +1696,8 @@ int mtd_read_oob(struct mtd_info *mtd, l
return ret_code;
if (mtd->ecc_strength == 0)
return 0; /* device lacks ecc */

View File

@ -1,43 +0,0 @@
From 1cd9ceaa5282ff10ea20a7fbadde5a476a1cc99e Mon Sep 17 00:00:00 2001
From: Michael Walle <michael@walle.cc>
Date: Wed, 8 Mar 2023 09:20:18 +0100
Subject: [PATCH] mtd: core: provide unique name for nvmem device, take two
Commit c048b60d39e1 ("mtd: core: provide unique name for nvmem device")
tries to give the nvmem device a unique name, but fails badly if the mtd
device doesn't have a "struct device" associated with it, i.e. if
CONFIG_MTD_PARTITIONED_MASTER is not set. This will result in the name
"(null)-user-otp", which is not unique. It seems the best we can do is
to use the compatible name together with a unique identifier added by
the nvmem subsystem by using NVMEM_DEVID_AUTO.
Fixes: c048b60d39e1 ("mtd: core: provide unique name for nvmem device")
Cc: stable@vger.kernel.org
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20230308082021.870459-1-michael@walle.cc
---
drivers/mtd/mtdcore.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -895,8 +895,8 @@ static struct nvmem_device *mtd_otp_nvme
/* OTP nvmem will be registered on the physical device */
config.dev = mtd->dev.parent;
- config.name = kasprintf(GFP_KERNEL, "%s-%s", dev_name(&mtd->dev), compatible);
- config.id = NVMEM_DEVID_NONE;
+ config.name = compatible;
+ config.id = NVMEM_DEVID_AUTO;
config.owner = THIS_MODULE;
config.type = NVMEM_TYPE_OTP;
config.root_only = true;
@@ -912,7 +912,6 @@ static struct nvmem_device *mtd_otp_nvme
nvmem = NULL;
of_node_put(np);
- kfree(config.name);
return nvmem;
}

View File

@ -1,47 +0,0 @@
From 8bd1d24e6ca3c599dd455b0e1b22f77bab8290eb Mon Sep 17 00:00:00 2001
From: Michael Walle <michael@walle.cc>
Date: Wed, 8 Mar 2023 09:20:19 +0100
Subject: [PATCH] mtd: core: fix nvmem error reporting
The master MTD will only have an associated device if
CONFIG_MTD_PARTITIONED_MASTER is set, thus we cannot use dev_err() on
mtd->dev. Instead use the parent device which is the physical flash
memory.
Fixes: 4b361cfa8624 ("mtd: core: add OTP nvmem provider support")
Cc: stable@vger.kernel.org
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20230308082021.870459-2-michael@walle.cc
---
drivers/mtd/mtdcore.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -946,6 +946,7 @@ static int mtd_nvmem_fact_otp_reg_read(v
static int mtd_otp_nvmem_add(struct mtd_info *mtd)
{
+ struct device *dev = mtd->dev.parent;
struct nvmem_device *nvmem;
ssize_t size;
int err;
@@ -959,7 +960,7 @@ static int mtd_otp_nvmem_add(struct mtd_
nvmem = mtd_otp_nvmem_register(mtd, "user-otp", size,
mtd_nvmem_user_otp_reg_read);
if (IS_ERR(nvmem)) {
- dev_err(&mtd->dev, "Failed to register OTP NVMEM device\n");
+ dev_err(dev, "Failed to register OTP NVMEM device\n");
return PTR_ERR(nvmem);
}
mtd->otp_user_nvmem = nvmem;
@@ -977,7 +978,7 @@ static int mtd_otp_nvmem_add(struct mtd_
nvmem = mtd_otp_nvmem_register(mtd, "factory-otp", size,
mtd_nvmem_fact_otp_reg_read);
if (IS_ERR(nvmem)) {
- dev_err(&mtd->dev, "Failed to register OTP NVMEM device\n");
+ dev_err(dev, "Failed to register OTP NVMEM device\n");
err = PTR_ERR(nvmem);
goto err;
}

View File

@ -1,55 +0,0 @@
From e0489f6e221f5ddee6cb3bd51b992b790c5fa4b9 Mon Sep 17 00:00:00 2001
From: Michael Walle <michael@walle.cc>
Date: Wed, 8 Mar 2023 09:20:20 +0100
Subject: [PATCH] mtd: core: fix error path for nvmem provider
If mtd_otp_nvmem_add() fails, the partitions won't be removed
because there is simply no call to del_mtd_partitions().
Unfortunately, add_mtd_partitions() will print all partitions to
the kernel console. If mtd_otp_nvmem_add() returns -EPROBE_DEFER
this would print the partitions multiple times to the kernel
console. Instead move mtd_otp_nvmem_add() to the beginning of the
function.
Fixes: 4b361cfa8624 ("mtd: core: add OTP nvmem provider support")
Cc: stable@vger.kernel.org
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20230308082021.870459-3-michael@walle.cc
---
drivers/mtd/mtdcore.c | 13 ++++++++++---
1 file changed, 10 insertions(+), 3 deletions(-)
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -1031,10 +1031,14 @@ int mtd_device_parse_register(struct mtd
mtd_set_dev_defaults(mtd);
+ ret = mtd_otp_nvmem_add(mtd);
+ if (ret)
+ goto out;
+
if (IS_ENABLED(CONFIG_MTD_PARTITIONED_MASTER)) {
ret = add_mtd_device(mtd);
if (ret)
- return ret;
+ goto out;
}
/* Prefer parsed partitions over driver-provided fallback */
@@ -1069,9 +1073,12 @@ int mtd_device_parse_register(struct mtd
register_reboot_notifier(&mtd->reboot_notifier);
}
- ret = mtd_otp_nvmem_add(mtd);
-
out:
+ if (ret) {
+ nvmem_unregister(mtd->otp_user_nvmem);
+ nvmem_unregister(mtd->otp_factory_nvmem);
+ }
+
if (ret && device_is_registered(&mtd->dev))
del_mtd_device(mtd);

View File

@ -901,7 +901,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static void axienet_mac_pcs_get_state(struct phylink_config *config,
--- a/drivers/net/pcs/pcs-xpcs.c
+++ b/drivers/net/pcs/pcs-xpcs.c
@@ -646,7 +646,7 @@ void xpcs_validate(struct dw_xpcs *xpcs,
@@ -637,7 +637,7 @@ void xpcs_validate(struct dw_xpcs *xpcs,
if (state->interface == PHY_INTERFACE_MODE_NA)
return;

View File

@ -71,7 +71,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
ret = stmmac_hw_setup(dev, true);
if (ret < 0) {
netdev_err(priv->dev, "%s: Hw setup failed\n", __func__);
@@ -6424,6 +6417,7 @@ void stmmac_enable_rx_queue(struct stmma
@@ -6430,6 +6423,7 @@ void stmmac_enable_rx_queue(struct stmma
return;
}
@ -79,7 +79,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
stmmac_clear_rx_descriptors(priv, queue);
stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
@@ -6485,6 +6479,7 @@ void stmmac_enable_tx_queue(struct stmma
@@ -6491,6 +6485,7 @@ void stmmac_enable_tx_queue(struct stmma
return;
}
@ -87,7 +87,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
stmmac_clear_tx_descriptors(priv, queue);
stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
@@ -7411,6 +7406,25 @@ int stmmac_suspend(struct device *dev)
@@ -7417,6 +7412,25 @@ int stmmac_suspend(struct device *dev)
}
EXPORT_SYMBOL_GPL(stmmac_suspend);
@ -113,7 +113,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
/**
* stmmac_reset_queues_param - reset queue parameters
* @priv: device pointer
@@ -7421,22 +7435,11 @@ static void stmmac_reset_queues_param(st
@@ -7427,22 +7441,11 @@ static void stmmac_reset_queues_param(st
u32 tx_cnt = priv->plat->tx_queues_to_use;
u32 queue;

View File

@ -1116,7 +1116,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
}
}
@@ -6398,7 +6402,7 @@ void stmmac_disable_rx_queue(struct stmm
@@ -6404,7 +6408,7 @@ void stmmac_disable_rx_queue(struct stmm
void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue)
{
@ -1125,7 +1125,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
struct stmmac_channel *ch = &priv->channel[queue];
unsigned long flags;
u32 buf_size;
@@ -6435,7 +6439,7 @@ void stmmac_enable_rx_queue(struct stmma
@@ -6441,7 +6445,7 @@ void stmmac_enable_rx_queue(struct stmma
rx_q->queue_index);
} else {
stmmac_set_dma_bfsize(priv, priv->ioaddr,
@ -1134,7 +1134,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
rx_q->queue_index);
}
@@ -6461,7 +6465,7 @@ void stmmac_disable_tx_queue(struct stmm
@@ -6467,7 +6471,7 @@ void stmmac_disable_tx_queue(struct stmm
void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue)
{
@ -1143,7 +1143,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
struct stmmac_channel *ch = &priv->channel[queue];
unsigned long flags;
int ret;
@@ -6511,7 +6515,7 @@ void stmmac_xdp_release(struct net_devic
@@ -6517,7 +6521,7 @@ void stmmac_xdp_release(struct net_devic
stmmac_disable_all_queues(priv);
for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)
@ -1152,7 +1152,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
/* Free the IRQ lines */
stmmac_free_irq(dev, REQ_IRQ_ERR_ALL, 0);
@@ -6570,7 +6574,7 @@ int stmmac_xdp_open(struct net_device *d
@@ -6576,7 +6580,7 @@ int stmmac_xdp_open(struct net_device *d
/* DMA RX Channel Configuration */
for (chan = 0; chan < rx_cnt; chan++) {
@ -1161,7 +1161,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
rx_q->dma_rx_phy, chan);
@@ -6588,7 +6592,7 @@ int stmmac_xdp_open(struct net_device *d
@@ -6594,7 +6598,7 @@ int stmmac_xdp_open(struct net_device *d
rx_q->queue_index);
} else {
stmmac_set_dma_bfsize(priv, priv->ioaddr,
@ -1170,7 +1170,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
rx_q->queue_index);
}
@@ -6597,7 +6601,7 @@ int stmmac_xdp_open(struct net_device *d
@@ -6603,7 +6607,7 @@ int stmmac_xdp_open(struct net_device *d
/* DMA TX Channel Configuration */
for (chan = 0; chan < tx_cnt; chan++) {
@ -1179,7 +1179,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
tx_q->dma_tx_phy, chan);
@@ -6630,7 +6634,7 @@ int stmmac_xdp_open(struct net_device *d
@@ -6636,7 +6640,7 @@ int stmmac_xdp_open(struct net_device *d
irq_error:
for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)
@ -1188,7 +1188,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
stmmac_hw_teardown(dev);
init_error:
@@ -6657,8 +6661,8 @@ int stmmac_xsk_wakeup(struct net_device
@@ -6663,8 +6667,8 @@ int stmmac_xsk_wakeup(struct net_device
queue >= priv->plat->tx_queues_to_use)
return -EINVAL;
@ -1199,7 +1199,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
ch = &priv->channel[queue];
if (!rx_q->xsk_pool && !tx_q->xsk_pool)
@@ -6918,8 +6922,8 @@ int stmmac_reinit_ringparam(struct net_d
@@ -6924,8 +6928,8 @@ int stmmac_reinit_ringparam(struct net_d
if (netif_running(dev))
stmmac_release(dev);
@ -1210,7 +1210,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
if (netif_running(dev))
ret = stmmac_open(dev);
@@ -7357,7 +7361,7 @@ int stmmac_suspend(struct device *dev)
@@ -7363,7 +7367,7 @@ int stmmac_suspend(struct device *dev)
stmmac_disable_all_queues(priv);
for (chan = 0; chan < priv->plat->tx_queues_to_use; chan++)
@ -1219,7 +1219,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
if (priv->eee_enabled) {
priv->tx_path_in_lpi_mode = false;
@@ -7408,7 +7412,7 @@ EXPORT_SYMBOL_GPL(stmmac_suspend);
@@ -7414,7 +7418,7 @@ EXPORT_SYMBOL_GPL(stmmac_suspend);
static void stmmac_reset_rx_queue(struct stmmac_priv *priv, u32 queue)
{
@ -1228,7 +1228,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
rx_q->cur_rx = 0;
rx_q->dirty_rx = 0;
@@ -7416,7 +7420,7 @@ static void stmmac_reset_rx_queue(struct
@@ -7422,7 +7426,7 @@ static void stmmac_reset_rx_queue(struct
static void stmmac_reset_tx_queue(struct stmmac_priv *priv, u32 queue)
{

View File

@ -1045,7 +1045,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
/* Disable the MAC Rx/Tx */
stmmac_mac_set(priv, priv->ioaddr, false);
@@ -6397,7 +6513,7 @@ void stmmac_disable_rx_queue(struct stmm
@@ -6403,7 +6519,7 @@ void stmmac_disable_rx_queue(struct stmm
spin_unlock_irqrestore(&ch->lock, flags);
stmmac_stop_rx_dma(priv, queue);
@ -1054,7 +1054,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
}
void stmmac_enable_rx_queue(struct stmmac_priv *priv, u32 queue)
@@ -6408,21 +6524,21 @@ void stmmac_enable_rx_queue(struct stmma
@@ -6414,21 +6530,21 @@ void stmmac_enable_rx_queue(struct stmma
u32 buf_size;
int ret;
@ -1080,7 +1080,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
stmmac_init_rx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
rx_q->dma_rx_phy, rx_q->queue_index);
@@ -6460,7 +6576,7 @@ void stmmac_disable_tx_queue(struct stmm
@@ -6466,7 +6582,7 @@ void stmmac_disable_tx_queue(struct stmm
spin_unlock_irqrestore(&ch->lock, flags);
stmmac_stop_tx_dma(priv, queue);
@ -1089,7 +1089,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
}
void stmmac_enable_tx_queue(struct stmmac_priv *priv, u32 queue)
@@ -6470,21 +6586,21 @@ void stmmac_enable_tx_queue(struct stmma
@@ -6476,21 +6592,21 @@ void stmmac_enable_tx_queue(struct stmma
unsigned long flags;
int ret;
@ -1115,7 +1115,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
stmmac_init_tx_chan(priv, priv->ioaddr, priv->plat->dma_cfg,
tx_q->dma_tx_phy, tx_q->queue_index);
@@ -6524,7 +6640,7 @@ void stmmac_xdp_release(struct net_devic
@@ -6530,7 +6646,7 @@ void stmmac_xdp_release(struct net_devic
stmmac_stop_all_dma(priv);
/* Release and free the Rx/Tx resources */
@ -1124,7 +1124,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
/* Disable the MAC Rx/Tx */
stmmac_mac_set(priv, priv->ioaddr, false);
@@ -6549,14 +6665,14 @@ int stmmac_xdp_open(struct net_device *d
@@ -6555,14 +6671,14 @@ int stmmac_xdp_open(struct net_device *d
u32 chan;
int ret;
@ -1141,7 +1141,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
if (ret < 0) {
netdev_err(dev, "%s: DMA descriptors initialization failed\n",
__func__);
@@ -6638,7 +6754,7 @@ irq_error:
@@ -6644,7 +6760,7 @@ irq_error:
stmmac_hw_teardown(dev);
init_error:
@ -1150,7 +1150,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
dma_desc_error:
return ret;
}
@@ -7503,7 +7619,7 @@ int stmmac_resume(struct device *dev)
@@ -7509,7 +7625,7 @@ int stmmac_resume(struct device *dev)
stmmac_reset_queues_param(priv);
stmmac_free_tx_skbufs(priv);

View File

@ -26,7 +26,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
return -ENODEV;
/* Name & Type */
@@ -369,7 +369,7 @@ int of_device_uevent_modalias(struct dev
@@ -372,7 +372,7 @@ int of_device_uevent_modalias(struct dev
{
int sl;

View File

@ -18,7 +18,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
--- a/drivers/of/device.c
+++ b/drivers/of/device.c
@@ -378,6 +378,8 @@ int of_device_uevent_modalias(struct dev
@@ -381,6 +381,8 @@ int of_device_uevent_modalias(struct dev
sl = of_device_get_modalias(dev, &env->buf[env->buflen-1],
sizeof(env->buf) - env->buflen);

View File

@ -1,70 +0,0 @@
From b19a4266c52de78496fe40f0b37580a3b762e67d Mon Sep 17 00:00:00 2001
From: Miquel Raynal <miquel.raynal@bootlin.com>
Date: Tue, 4 Apr 2023 18:21:09 +0100
Subject: [PATCH] of: Fix modalias string generation
The helper generating an OF based modalias (of_device_get_modalias())
works fine, but due to the use of snprintf() internally it needs a
buffer one byte longer than what should be needed just for the entire
string (excluding the '\0'). Most users of this helper are sysfs hooks
providing the modalias string to users. They all provide a PAGE_SIZE
buffer which is way above the number of bytes required to fit the
modalias string and hence do not suffer from this issue.
There is another user though, of_device_request_module(), which is only
called by drivers/usb/common/ulpi.c. This request module function is
faulty, but maybe because in most cases there is an alternative, ULPI
driver users have not noticed it.
In this function, of_device_get_modalias() is called twice. The first
time without buffer just to get the number of bytes required by the
modalias string (excluding the null byte), and a second time, after
buffer allocation, to fill the buffer. The allocation asks for an
additional byte, in order to store the trailing '\0'. However, the
buffer *length* provided to of_device_get_modalias() excludes this extra
byte. The internal use of snprintf() with a length that is exactly the
number of bytes to be written has the effect of using the last available
byte to store a '\0', which then smashes the last character of the
modalias string.
Provide the actual size of the buffer to of_device_get_modalias() to fix
this issue.
Note: the "str[size - 1] = '\0';" line is not really needed as snprintf
will anyway end the string with a null byte, but there is a possibility
that this function might be called on a struct device_node without
compatible, in this case snprintf() would not be executed. So we keep it
just to avoid possible unbounded strings.
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Peter Chen <peter.chen@kernel.org>
Fixes: 9c829c097f2f ("of: device: Support loading a module with OF based modalias")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Link: https://lore.kernel.org/r/20230404172148.82422-2-srinivas.kandagatla@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
drivers/of/device.c | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
--- a/drivers/of/device.c
+++ b/drivers/of/device.c
@@ -290,12 +290,15 @@ int of_device_request_module(struct devi
if (size < 0)
return size;
- str = kmalloc(size + 1, GFP_KERNEL);
+ /* Reserve an additional byte for the trailing '\0' */
+ size++;
+
+ str = kmalloc(size, GFP_KERNEL);
if (!str)
return -ENOMEM;
of_device_get_modalias(dev, str, size);
- str[size] = '\0';
+ str[size - 1] = '\0';
ret = request_module(str);
kfree(str);

View File

@ -30,7 +30,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#define PACKET_FANOUT_LB 1
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -1825,6 +1825,7 @@ static int packet_rcv_spkt(struct sk_buf
@@ -1826,6 +1826,7 @@ static int packet_rcv_spkt(struct sk_buf
{
struct sock *sk;
struct sockaddr_pkt *spkt;
@ -38,7 +38,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
/*
* When we registered the protocol we saved the socket in the data
@@ -1832,6 +1833,7 @@ static int packet_rcv_spkt(struct sk_buf
@@ -1833,6 +1834,7 @@ static int packet_rcv_spkt(struct sk_buf
*/
sk = pt->af_packet_priv;
@ -46,7 +46,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
/*
* Yank back the headers [hope the device set this
@@ -1844,7 +1846,7 @@ static int packet_rcv_spkt(struct sk_buf
@@ -1845,7 +1847,7 @@ static int packet_rcv_spkt(struct sk_buf
* so that this procedure is noop.
*/
@ -55,7 +55,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
goto out;
if (!net_eq(dev_net(dev), sock_net(sk)))
@@ -2092,12 +2094,12 @@ static int packet_rcv(struct sk_buff *sk
@@ -2093,12 +2095,12 @@ static int packet_rcv(struct sk_buff *sk
unsigned int snaplen, res;
bool is_drop_n_account = false;
@ -71,7 +71,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (!net_eq(dev_net(dev), sock_net(sk)))
goto drop;
@@ -2223,12 +2225,12 @@ static int tpacket_rcv(struct sk_buff *s
@@ -2224,12 +2226,12 @@ static int tpacket_rcv(struct sk_buff *s
BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h2)) != 32);
BUILD_BUG_ON(TPACKET_ALIGN(sizeof(*h.h3)) != 48);
@ -87,7 +87,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (!net_eq(dev_net(dev), sock_net(sk)))
goto drop;
@@ -3339,6 +3341,7 @@ static int packet_create(struct net *net
@@ -3342,6 +3344,7 @@ static int packet_create(struct net *net
mutex_init(&po->pg_vec_lock);
po->rollover = NULL;
po->prot_hook.func = packet_rcv;
@ -96,7 +96,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (sock->type == SOCK_PACKET)
po->prot_hook.func = packet_rcv_spkt;
@@ -3979,6 +3982,16 @@ packet_setsockopt(struct socket *sock, i
po->xmit = val ? packet_direct_xmit : dev_queue_xmit;
WRITE_ONCE(po->xmit, val ? packet_direct_xmit : dev_queue_xmit);
return 0;
}
+ case PACKET_RECV_TYPE:
@ -128,7 +128,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
break;
--- a/net/packet/internal.h
+++ b/net/packet/internal.h
@@ -137,6 +137,7 @@ struct packet_sock {
@@ -136,6 +136,7 @@ struct packet_sock {
int (*xmit)(struct sk_buff *skb);
struct packet_type prot_hook ____cacheline_aligned_in_smp;
atomic_t tp_drops ____cacheline_aligned_in_smp;

View File

@ -1,51 +0,0 @@
From 8fafb7e5c041814876266259e5e439f93571dcef Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Thu, 7 Jul 2022 03:09:40 +0200
Subject: [PATCH 6/8] ARM: dts: qcom: ipq8064: reduce pci IO size to 64K
The current value for pci IO is problematic for ath10k wifi card
commonly connected to ipq8064 SoC.
The current value is probably a typo and is actually uncommon to find
1MB IO space even on a x86 arch. Also with recent changes to the pci
driver, pci1 and pci2 now fails to function as any connected device
fails any reg read/write. Reduce this to 64K as it should be more than
enough and 3 * 64K of total IO space doesn't exceed the IO_SPACE_LIMIT
hardcoded for the ARM arch.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Jonathan McDowell <noodles@earth.li>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220707010943.20857-7-ansuelsmth@gmail.com
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -885,7 +885,7 @@
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00100000 /* downstream I/O */
+ ranges = <0x81000000 0 0x0fe00000 0x0fe00000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x08000000 0x08000000 0 0x07e00000>; /* non-prefetchable memory */
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
@@ -936,7 +936,7 @@
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00100000 /* downstream I/O */
+ ranges = <0x81000000 0 0x31e00000 0x31e00000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x2e000000 0x2e000000 0 0x03e00000>; /* non-prefetchable memory */
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
@@ -987,7 +987,7 @@
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00100000 /* downstream I/O */
+ ranges = <0x81000000 0 0x35e00000 0x35e00000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x32000000 0x32000000 0 0x03e00000>; /* non-prefetchable memory */
interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;

View File

@ -35,7 +35,7 @@ Link: https://lore.kernel.org/r/20220704113318.623102-1-robimarko@gmail.com
watchdog: watchdog@b017000 {
compatible = "qcom,kpss-wdt";
reg = <0xb017000 0x1000>;
@@ -857,4 +849,12 @@
@@ -853,4 +845,12 @@
status = "disabled";
};
};

View File

@ -37,7 +37,7 @@ Link: https://lore.kernel.org/r/20220818220245.338396-5-robimarko@gmail.com
cryptobam: dma-controller@704000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x00704000 0x20000>;
@@ -878,4 +888,90 @@
@@ -874,4 +884,90 @@
<GIC_PPI 4 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};

View File

@ -19,7 +19,7 @@ Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
--- a/drivers/spmi/spmi.c
+++ b/drivers/spmi/spmi.c
@@ -387,6 +387,23 @@ static struct bus_type spmi_bus_type = {
@@ -388,6 +388,23 @@ static struct bus_type spmi_bus_type = {
};
/**

View File

@ -30,7 +30,7 @@ Reviewed-by: Stephen Boyd <swboyd@chromium.org>
struct qcom_pcie {
struct dw_pcie *pci;
void __iomem *parf; /* DT parf */
@@ -1469,6 +1473,38 @@ static const struct qcom_pcie_ops ops_1_
@@ -1467,6 +1471,38 @@ static const struct qcom_pcie_ops ops_1_
.config_sid = qcom_pcie_config_sid_sm8250,
};
@ -69,7 +69,7 @@ Reviewed-by: Stephen Boyd <swboyd@chromium.org>
static const struct dw_pcie_ops dw_pcie_ops = {
.link_up = qcom_pcie_link_up,
.start_link = qcom_pcie_start_link,
@@ -1480,6 +1516,7 @@ static int qcom_pcie_probe(struct platfo
@@ -1478,6 +1514,7 @@ static int qcom_pcie_probe(struct platfo
struct pcie_port *pp;
struct dw_pcie *pci;
struct qcom_pcie *pcie;
@ -77,7 +77,7 @@ Reviewed-by: Stephen Boyd <swboyd@chromium.org>
int ret;
pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
@@ -1501,7 +1538,13 @@ static int qcom_pcie_probe(struct platfo
@@ -1499,7 +1536,13 @@ static int qcom_pcie_probe(struct platfo
pcie->pci = pci;
@ -92,7 +92,7 @@ Reviewed-by: Stephen Boyd <swboyd@chromium.org>
pcie->reset = devm_gpiod_get_optional(dev, "perst", GPIOD_OUT_HIGH);
if (IS_ERR(pcie->reset)) {
@@ -1557,16 +1600,17 @@ err_pm_runtime_put:
@@ -1555,16 +1598,17 @@ err_pm_runtime_put:
}
static const struct of_device_id qcom_pcie_match[] = {

View File

@ -70,7 +70,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
};
struct qcom_pcie;
@@ -1282,6 +1292,112 @@ static void qcom_pcie_post_deinit_2_7_0(
@@ -1280,6 +1290,112 @@ static void qcom_pcie_post_deinit_2_7_0(
clk_disable_unprepare(res->pipe_clk);
}
@ -183,7 +183,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
static int qcom_pcie_link_up(struct dw_pcie *pci)
{
u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
@@ -1473,6 +1589,15 @@ static const struct qcom_pcie_ops ops_1_
@@ -1471,6 +1587,15 @@ static const struct qcom_pcie_ops ops_1_
.config_sid = qcom_pcie_config_sid_sm8250,
};
@ -199,7 +199,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
static const struct qcom_pcie_cfg apq8084_cfg = {
.ops = &ops_1_0_0,
};
@@ -1505,6 +1630,10 @@ static const struct qcom_pcie_cfg sc7280
@@ -1503,6 +1628,10 @@ static const struct qcom_pcie_cfg sc7280
.ops = &ops_1_9_0,
};
@ -210,7 +210,7 @@ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com>
static const struct dw_pcie_ops dw_pcie_ops = {
.link_up = qcom_pcie_link_up,
.start_link = qcom_pcie_start_link,
@@ -1611,6 +1740,7 @@ static const struct of_device_id qcom_pc
@@ -1609,6 +1738,7 @@ static const struct of_device_id qcom_pc
{ .compatible = "qcom,pcie-sdm845", .data = &sdm845_cfg },
{ .compatible = "qcom,pcie-sm8250", .data = &sm8250_cfg },
{ .compatible = "qcom,pcie-sc7280", .data = &sc7280_cfg },

View File

@ -13,7 +13,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -1735,6 +1735,7 @@ static const struct of_device_id qcom_pc
@@ -1733,6 +1733,7 @@ static const struct of_device_id qcom_pc
{ .compatible = "qcom,pcie-apq8064", .data = &ipq8064_cfg },
{ .compatible = "qcom,pcie-msm8996", .data = &msm8996_cfg },
{ .compatible = "qcom,pcie-ipq8074", .data = &ipq8074_cfg },

View File

@ -21,9 +21,9 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
compatible = "arm,gic-v2m-frame";
msi-controller;
reg = <0x0 0xffd>;
@@ -813,8 +813,7 @@
<0x82000000 0 0x10220000 0x10220000
0 0xfde0000>; /* non-prefetchable memory */
@@ -811,8 +811,7 @@
ranges = <0x81000000 0x0 0x00000000 0x10200000 0x0 0x10000>, /* I/O */
<0x82000000 0x0 0x10220000 0x10220000 0x0 0xfde0000>; /* MEM */
- interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi";
@ -31,9 +31,9 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0x7>;
interrupt-map = <0 0 0 1 &intc 0 142
@@ -877,8 +876,7 @@
<0x82000000 0 0x20220000 0x20220000
0 0xfde0000>; /* non-prefetchable memory */
@@ -873,8 +872,7 @@
ranges = <0x81000000 0x0 0x00000000 0x20200000 0x0 0x10000>, /* I/O */
<0x82000000 0x0 0x20220000 0x20220000 0x0 0xfde0000>; /* MEM */
- interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "msi";

View File

@ -61,7 +61,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
spmi_bus: spmi@200f000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0x0200f000 0x001000>,
@@ -917,6 +948,56 @@
@@ -913,6 +944,56 @@
"axi_s_sticky";
status = "disabled";
};

View File

@ -15,7 +15,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -998,6 +998,117 @@
@@ -994,6 +994,117 @@
};
};
};

View File

@ -1,218 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Endian 4i Edge 200 Board Description
* Note: Endian UTM Mini is hardware clone of Endian Edge 200
* Copyright 2021 Pawel Dembicki <paweldembicki@gmail.com>
*/
/dts-v1/;
#include "kirkwood.dtsi"
#include "kirkwood-6281.dtsi"
/ {
model = "Endian 4i Edge 200";
compatible = "endian,4i-edge-200", "marvell,kirkwood-88f6281", "marvell,kirkwood";
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>;
};
aliases {
led-boot = &led_status_green;
led-failsafe = &led_status_orange;
led-running = &led_status_green;
led-upgrade = &led_status_orange;
};
chosen {
bootargs = "console=ttyS0,115200n8";
stdout-path = &uart0;
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&pmx_led49 &pmx_led35 &pmx_led34>;
pinctrl-names = "default";
led_status_green: status_green {
label = "green:status";
gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
};
led_status_orange: status_orange {
label = "orange:status";
gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
};
sdcard {
label = "orange:sdcard";
gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
};
};
};
&eth0 {
status = "okay";
};
&eth0port {
speed = <1000>;
duplex = <1>;
};
&eth1 {
status = "okay";
};
&eth1port {
phy-handle = <&ethphyb>;
};
&mdio {
status = "okay";
ethphyb: ethernet-phy@b {
reg = <0x0b>;
marvell,reg-init =
/* link-activity, bi-color mode 4 */
<3 0x10 0xfff0 0xf>; /* Reg 3,16 <- 0xzzzf */
};
switch0: switch@11 {
compatible = "marvell,mv88e6085";
reg = <0x11>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "port1";
};
port@1 {
reg = <1>;
label = "port2";
};
port@2 {
reg = <2>;
label = "port3";
};
port@3 {
reg = <3>;
label = "port4";
};
port@5 {
reg = <5>;
phy-mode = "rgmii-id";
ethernet = <&eth0port>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
&nand {
status = "okay";
pinctrl-0 = <&pmx_nand>;
pinctrl-names = "default";
partition@0 {
label = "u-boot";
reg = <0x00000000 0x000a0000>;
read-only;
};
partition@a0000 {
label = "u-boot-env";
reg = <0x000a0000 0x00060000>;
read-only;
};
partition@100000 {
label = "kernel";
reg = <0x00100000 0x00400000>;
};
partition@500000 {
label = "ubi";
reg = <0x00500000 0x1fb00000>;
};
};
&pciec {
status = "okay";
};
&pcie0 {
status = "okay";
};
&pinctrl {
pinctrl-0 = <&pmx_sysrst>;
pinctrl-names = "default";
pmx_sysrst: pmx-sysrst {
marvell,pins = "mpp6";
marvell,function = "sysrst";
};
pmx_sdio_cd: pmx-sdio-cd {
marvell,pins = "mpp28";
marvell,function = "gpio";
};
pmx_led34: pmx_led34 {
marvell,pins = "mpp34";
marvell,function = "gpio";
};
pmx_led35: pmx_led35 {
marvell,pins = "mpp35";
marvell,function = "gpio";
};
pmx_led49: pmx_led49 {
marvell,pins = "mpp49";
marvell,function = "gpio";
};
};
&rtc {
status = "okay";
};
&sata_phy0 {
status = "disabled";
};
&sata_phy1 {
status = "disabled";
};
&sdio {
pinctrl-0 = <&pmx_sdio_cd>;
pinctrl-names = "default";
status = "okay";
cd-gpios = <&gpio0 28 9>;
};
&uart0 {
status = "okay";
};
&usb0 {
status = "okay";
};

View File

@ -1,303 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Ctera C200 V1 Board Description
* Copyright 2021 Pawel Dembicki <paweldembicki@gmail.com>
*/
/dts-v1/;
#include "kirkwood.dtsi"
#include "kirkwood-6281.dtsi"
/ {
model = "Ctera C200 V1";
compatible = "ctera,c200-v1", "marvell,kirkwood-88f6281", "marvell,kirkwood";
aliases {
led-boot = &led_status_green;
led-failsafe = &led_status_red;
led-running = &led_status_green;
led-upgrade = &led_status_red;
};
chosen {
bootargs = "console=ttyS0,115200";
stdout-path = &uart0;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x20000000>;
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&pmx_buttons>;
pinctrl-names = "default";
power {
label = "Power Button";
linux,code = <KEY_POWER>;
gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
};
reset {
label = "Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
};
usb1 {
label = "USB1 Button";
linux,code = <BTN_0>;
gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
};
usb2 {
label = "USB2 Button";
linux,code = <BTN_1>;
gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
};
};
gpio-poweroff {
compatible = "gpio-poweroff";
pinctrl-0 = <&pmx_poweroff>;
pinctrl-names = "default";
gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&pmx_leds>;
pinctrl-names = "default";
led_status_green: status-green {
label = "green:status";
gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
};
led_status_red: status-red {
label = "red:status";
gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
};
cloud-blue {
label = "blue:cloud";
gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
};
disk1-green {
label = "green:disk1";
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
linux,default-trigger = "ata1";
};
disk1-red {
label = "red:disk1";
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
};
disk2-green {
label = "green:disk2";
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
linux,default-trigger = "ata2";
};
disk2-red {
label = "red:disk2";
gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
};
disk-fail-green {
label = "green:disk-fail";
gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
};
disk-fail-red {
label = "red:disk-fail";
gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
};
usb1-green {
label = "green:usb1";
gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "usbport";
trigger-sources = <&hub_port2>;
};
usb1-red {
label = "red:usb1";
gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
};
usb2-green {
label = "green:usb2";
gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
linux,default-trigger = "usbport";
trigger-sources = <&hub_port1>;
};
usb2-red {
label = "red:usb2";
gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
};
};
};
&eth0 {
status = "okay";
};
&eth0port {
phy-handle = <&ethphy9>;
};
&i2c0 {
status = "okay";
rtc@30 {
compatible = "s35390a";
reg = <0x30>;
};
lm63@4c {
compatible = "national,lm63";
reg = <0x4c>;
};
};
&mdio {
status = "okay";
ethphy9: ethernet-phy@9 {
reg = <9>;
};
};
&nand {
status = "okay";
chip-delay = <40>;
partition@0 {
label = "uboot";
reg = <0x0000000 0x200000>;
};
partition@200000 {
label = "certificate";
reg = <0x0200000 0x100000>;
};
partition@300000 {
label = "preset_cfg";
reg = <0x0300000 0x100000>;
};
partition@400000 {
label = "dev_params";
reg = <0x0400000 0x100000>;
};
partition@500000 {
label = "active_bank";
reg = <0x0500000 0x0100000>;
};
partition@600000 {
label = "magic";
reg = <0x0600000 0x0100000>;
};
partition@700000 {
label = "bank1";
reg = <0x0700000 0x2800000>;
};
partition@2f00000 {
label = "bank2";
reg = <0x2f00000 0x2800000>;
};
/* 0x5700000-0x5a00000 undefined in vendor firmware */
partition@5a00000 {
label = "reserved";
reg = <0x5a00000 0x2000000>;
};
partition@7a00000 {
label = "ubi";
reg = <0x7a00000 0x8600000>;
};
};
&pciec {
status = "okay";
};
&pcie0 {
status = "okay";
};
&pinctrl {
/* buzzer gpios are connected to two pins of buzzer
* leave it as is due lack of proper driver
*/
pmx_buzzer: pmx-buzzer {
marvell,pins = "mpp12", "mpp13";
marvell,function = "gpio";
};
pmx_leds: pmx-leds {
marvell,pins = "mpp14", "mpp15", "mpp16", "mpp17", "mpp38",
"mpp39", "mpp40", "mpp42", "mpp43", "mpp44",
"mpp45", "mpp46", "mpp47";
marvell,function = "gpio";
};
pmx_buttons: pmx-buttons {
marvell,pins = "mpp28", "mpp29", "mpp48", "mpp49";
marvell,function = "gpio";
};
pmx_poweroff: pmx-poweroff {
marvell,pins = "mpp34";
marvell,function = "gpio";
};
};
&rtc {
status = "disabled";
};
&sata {
status = "okay";
nr-ports = <2>;
};
&uart0 {
status = "okay";
};
&usb0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
#trigger-source-cells = <0>;
hub_port1: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
hub_port2: port@2 {
reg = <2>;
#trigger-source-cells = <0>;
};
};
};

View File

@ -1,271 +0,0 @@
// SPDX-License-Identifier: GPL-2.0-only
/dts-v1/;
#include "kirkwood.dtsi"
#include "kirkwood-6281.dtsi"
/ {
model = "ZyXEL NSA310S";
compatible = "zyxel,nsa310s", "marvell,kirkwood-88f6702", "marvell,kirkwood";
aliases {
led-boot = &led_green_sys;
led-failsafe = &led_red_sys;
led-running = &led_green_sys;
led-upgrade = &led_red_sys;
};
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>;
};
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk";
stdout-path = &uart0;
};
ocp@f1000000 {
pinctrl: pin-controller@10000 {
pinctrl-names = "default";
pmx_usb_power: pmx-usb-power {
marvell,pins = "mpp21";
marvell,function = "gpio";
};
pmx_pwr_off: pmx-pwr-off {
marvell,pins = "mpp27";
marvell,function = "gpio";
};
pmx_btn_reset: pmx-btn-reset {
marvell,pins = "mpp24";
marvell,function = "gpio";
};
pmx_btn_copy: pmx-btn-copy {
marvell,pins = "mpp25";
marvell,function = "gpio";
};
pmx_btn_power: pmx-btn-power {
marvell,pins = "mpp26";
marvell,function = "gpio";
};
pmx_led_usb_green: pmx-led-usb-green {
marvell,pins = "mpp15";
marvell,function = "gpio";
};
pmx_led_copy_green: pmx-led-copy-green {
marvell,pins = "mpp22";
marvell,function = "gpio";
};
pmx_led_copy_red: pmx-led-copy-red {
marvell,pins = "mpp23";
marvell,function = "gpio";
};
pmx_led_sys_green: pmx-led-sys-green {
marvell,pins = "mpp28";
marvell,function = "gpio";
};
pmx_led_sys_red: pmx-led-sys-red {
marvell,pins = "mpp29";
marvell,function = "gpio";
};
pmx_led_hdd1_green: pmx-led-hdd1-green {
marvell,pins = "mpp16";
marvell,function = "gpio";
};
pmx_led_hdd1_red: pmx-led-hdd1-red {
marvell,pins = "mpp13";
marvell,function = "gpio";
};
pmx_pwr_sata1: pmx-pwr-sata1 {
marvell,pins = "mpp33";
marvell,function = "gpio";
};
};
i2c@11000 {
status = "okay";
rtc@68 {
compatible = "htk,ht1382";
reg = <0x68>;
};
};
serial@12000 {
status = "okay";
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pmx_usb_power &pmx_pwr_sata1>;
pinctrl-names = "default";
usb0_power: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
regulator-name = "USB Power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio0 21 GPIO_ACTIVE_HIGH>;
};
sata1_power: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
regulator-name = "SATA1 Power";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&pmx_btn_reset &pmx_btn_copy &pmx_btn_power>;
pinctrl-names = "default";
power {
label = "Power Button";
linux,code = <KEY_POWER>;
gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
};
copy {
label = "Copy Button";
linux,code = <KEY_COPY>;
gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
};
reset {
label = "Reset Button";
linux,code = <KEY_RESTART>;
gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_green_sys: green-sys {
label = "nsa310s:green:sys";
gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
led_red_sys: red-sys {
label = "nsa310s:red:sys";
gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
};
green-hdd1 {
label = "nsa310s:green:hdd1";
gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "ata1";
};
red-hdd1 {
label = "nsa310s:red:hdd1";
gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
};
green-usb {
label = "nsa310s:green:usb";
gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "usb-host";
};
green-copy {
label = "nsa310s:green:copy";
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
};
red-copy {
label = "nsa310s:red:copy";
gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
};
};
gpio_poweroff {
compatible = "gpio-poweroff";
pinctrl-0 = <&pmx_pwr_off>;
pinctrl-names = "default";
gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
};
};
&eth0 {
status = "okay";
ethernet0-port@0 {
phy-handle = <&ethphy0>;
};
};
&mdio {
status = "okay";
ethphy0: ethernet-phy@1 {
reg = <1>;
phy-mode = "rgmii-id";
marvell,reg-init = <0x1 0x16 0x0 0x3>,
<0x1 0x10 0x0 0x1017>,
<0x1 0x11 0x0 0x4408>,
<0x1 0x16 0x0 0x0>;
};
};
&nand {
status = "okay";
chip-delay = <35>;
partition@0 {
label = "uboot";
reg = <0x0000000 0x00c0000>;
read-only;
};
partition@c0000 {
label = "uboot_env";
reg = <0x00c0000 0x0080000>;
};
partition@140000 {
label = "ubi";
reg = <0x0140000 0x7ec0000>;
};
};
&pciec {
status = "okay";
};
&pcie0 {
status = "okay";
};
&sata {
status = "okay";
nr-ports = <1>;
};

View File

@ -0,0 +1,350 @@
From 5fc74dbdf8f640a7ca7fb92345ac6fbeaa078d65 Mon Sep 17 00:00:00 2001
From: Pawel Dembicki <paweldembicki@gmail.com>
Date: Tue, 15 Feb 2022 17:39:22 +0100
Subject: [PATCH] ARM: dts: kirkwood: Add Ctera C-200 V1 board
Ctera C200 V1 is kirkwood-based 2-Bay NAS.
Hardware:
- SoC: Marvell 88F6281-A1 ARMv5TE Processor 1.2GHz
- Ram: 512MB (4x Nanya NT5TU128M8GE-AC)
- NAND Flash: 256MB (Samsung 216 K9F2G08U0C)
- Lan: 1x GBE (Marvell 88E1116R-NNC1)
- Storage: 2x SATA HDD 3.5" Slot
- USB: 2x USB 2.0 port
- Console: Internal J3 connector (1: Vcc, 2: Rx, 3: Tx, 4: GND)
- LEDs: 13x GPIO controlled
- Buttons: 2x GPIO controlled
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/kirkwood-c200-v1.dts | 310 +++++++++++++++++++++++++
2 files changed, 311 insertions(+)
create mode 100644 arch/arm/boot/dts/kirkwood-c200-v1.dts
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -267,6 +267,7 @@ dtb-$(CONFIG_ARCH_KEYSTONE) += \
dtb-$(CONFIG_MACH_KIRKWOOD) += \
kirkwood-b3.dtb \
kirkwood-blackarmor-nas220.dtb \
+ kirkwood-c200-v1.dtb \
kirkwood-cloudbox.dtb \
kirkwood-d2net.dtb \
kirkwood-db-88f6281.dtb \
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-c200-v1.dts
@@ -0,0 +1,310 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Ctera C200 V1 Board Description
+ * Copyright 2021-2022 Pawel Dembicki <paweldembicki@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "kirkwood.dtsi"
+#include "kirkwood-6281.dtsi"
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "Ctera C200 V1";
+ compatible = "ctera,c200-v1", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+ chosen {
+ bootargs = "console=ttyS0,115200";
+ stdout-path = &uart0;
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+ pinctrl-0 = <&pmx_buttons>;
+ pinctrl-names = "default";
+
+ power {
+ label = "Power Button";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
+ };
+
+ reset {
+ label = "Reset Button";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
+ };
+
+ usb1 {
+ label = "USB1 Button";
+ linux,code = <BTN_0>;
+ gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
+ };
+
+ usb2 {
+ label = "USB2 Button";
+ linux,code = <BTN_1>;
+ gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ gpio-poweroff {
+ compatible = "gpio-poweroff";
+ pinctrl-0 = <&pmx_poweroff>;
+ pinctrl-names = "default";
+ gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&pmx_leds>;
+ pinctrl-names = "default";
+
+ led-0 {
+ function = LED_FUNCTION_DISK;
+ function-enumerator = <2>;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
+ };
+
+ led-1 {
+ function = LED_FUNCTION_DISK;
+ function-enumerator = <1>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+ };
+
+ led-2 {
+ function = LED_FUNCTION_DISK;
+ function-enumerator = <2>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+ };
+
+ led-3 {
+ function = LED_FUNCTION_DISK;
+ function-enumerator = <1>;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
+ };
+
+ led-4 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
+ };
+
+ led-5 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
+ };
+
+ led-6 {
+ function = LED_FUNCTION_INDICATOR;
+ color = <LED_COLOR_ID_BLUE>;
+ gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
+ };
+
+ led-7 {
+ function = LED_FUNCTION_DISK_ERR;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
+ };
+
+ led-8 {
+ function = LED_FUNCTION_DISK_ERR;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
+ };
+
+ led-9 {
+ function = LED_FUNCTION_USB;
+ function-enumerator = <1>;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
+ };
+
+ led-10 {
+ function = LED_FUNCTION_USB;
+ function-enumerator = <1>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio1 13 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "usbport";
+ trigger-sources = <&hub_port2>;
+ };
+
+ led-11 {
+ function = LED_FUNCTION_USB;
+ function-enumerator = <2>;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
+ };
+
+ led-12 {
+ function = LED_FUNCTION_USB;
+ function-enumerator = <2>;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "usbport";
+ trigger-sources = <&hub_port1>;
+ };
+ };
+};
+
+&eth0 {
+ status = "okay";
+};
+
+&eth0port {
+ phy-handle = <&ethphy9>;
+};
+
+&i2c0 {
+ status = "okay";
+
+ rtc@30 {
+ compatible = "s35390a";
+ reg = <0x30>;
+ };
+
+ lm63@4c {
+ compatible = "national,lm63";
+ reg = <0x4c>;
+ };
+};
+
+&mdio {
+ status = "okay";
+
+ ethphy9: ethernet-phy@9 {
+ reg = <9>;
+ };
+};
+
+&nand {
+ status = "okay";
+ chip-delay = <40>;
+
+ partition@0 {
+ label = "uboot";
+ reg = <0x0000000 0x200000>;
+ };
+
+ partition@200000 {
+ label = "certificate";
+ reg = <0x0200000 0x100000>;
+ };
+
+ partition@300000 {
+ label = "preset_cfg";
+ reg = <0x0300000 0x100000>;
+ };
+
+ partition@400000 {
+ label = "dev_params";
+ reg = <0x0400000 0x100000>;
+ };
+
+ partition@500000 {
+ label = "active_bank";
+ reg = <0x0500000 0x0100000>;
+ };
+
+ partition@600000 {
+ label = "magic";
+ reg = <0x0600000 0x0100000>;
+ };
+
+ partition@700000 {
+ label = "bank1";
+ reg = <0x0700000 0x2800000>;
+ };
+
+ partition@2f00000 {
+ label = "bank2";
+ reg = <0x2f00000 0x2800000>;
+ };
+
+ /* 0x5700000-0x5a00000 undefined in vendor firmware */
+
+ partition@5a00000 {
+ label = "reserved";
+ reg = <0x5a00000 0x2000000>;
+ };
+
+ partition@7a00000 {
+ label = "rootfs";
+ reg = <0x7a00000 0x8600000>;
+ };
+};
+
+&pinctrl {
+ /* Buzzer gpios are connected to two pins of buzzer.
+ * This buzzer require a modulated signal from gpio.
+ * Leave it as is due lack of proper driver.
+ */
+ pmx_buzzer: pmx-buzzer {
+ marvell,pins = "mpp12", "mpp13";
+ marvell,function = "gpio";
+ };
+
+ pmx_leds: pmx-leds {
+ marvell,pins = "mpp14", "mpp15", "mpp16", "mpp17", "mpp38",
+ "mpp39", "mpp40", "mpp42", "mpp43", "mpp44",
+ "mpp45", "mpp46", "mpp47";
+ marvell,function = "gpio";
+ };
+
+ pmx_buttons: pmx-buttons {
+ marvell,pins = "mpp28", "mpp29", "mpp48", "mpp49";
+ marvell,function = "gpio";
+ };
+
+ pmx_poweroff: pmx-poweroff {
+ marvell,pins = "mpp34";
+ marvell,function = "gpio";
+ };
+};
+
+&rtc {
+ status = "disabled";
+};
+
+&sata {
+ status = "okay";
+ nr-ports = <2>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&usb0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ port@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ #trigger-source-cells = <0>;
+
+ hub_port1: port@1 {
+ reg = <1>;
+ #trigger-source-cells = <0>;
+ };
+
+ hub_port2: port@2 {
+ reg = <2>;
+ #trigger-source-cells = <0>;
+ };
+ };
+};

View File

@ -0,0 +1,301 @@
From e977a103840c57d72b52cbc8c17f87f86ef9aa8d Mon Sep 17 00:00:00 2001
From: Pawel Dembicki <paweldembicki@gmail.com>
Date: Sat, 29 Oct 2022 22:57:38 +0200
Subject: [PATCH] ARM: dts: kirkwood: Add Zyxel NSA310S board
Zyxel NSA310S is a NAS based on Marvell kirkwood SoC.
Specification:
- Processor Marvell 88F6702 1 GHz
- 256MB RAM
- 128MB NAND
- 1x GBE LAN port (PHY: Marvell 88E1318)
- 2x USB 2.0
- 1x SATA
- 3x button
- 7x leds
- serial on J1 connector (115200 8N1) (GND-NOPIN-RX-TX-VCC)
Tested-by: Tony Dinh <mibodhi@gmail.com>
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Acked-by: Adam Baker <linux@baker-net.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/kirkwood-nsa310s.dts | 259 +++++++++++++++++++++++++
2 files changed, 260 insertions(+)
create mode 100644 arch/arm/boot/dts/kirkwood-nsa310s.dts
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -320,6 +320,7 @@ dtb-$(CONFIG_MACH_KIRKWOOD) += \
kirkwood-ns2mini.dtb \
kirkwood-nsa310.dtb \
kirkwood-nsa310a.dtb \
+ kirkwood-nsa310s.dtb \
kirkwood-nsa320.dtb \
kirkwood-nsa325.dtb \
kirkwood-openblocks_a6.dtb \
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-nsa310s.dts
@@ -0,0 +1,259 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * ZyXEL NSA310S Board Description
+ * Copyright 2020-2022 Pawel Dembicki <paweldembicki@gmail.com>
+ * Copyright (c) 2015-2021, Tony Dinh <mibodhi@gmail.com>
+ * Copyright (c) 2014, Adam Baker <linux@baker-net.org.uk>
+ * Based upon the board setup file created by Peter Schildmann
+ */
+/dts-v1/;
+
+#include "kirkwood.dtsi"
+#include "kirkwood-6281.dtsi"
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "ZyXEL NSA310S";
+ compatible = "zyxel,nsa310s", "marvell,kirkwood-88f6702", "marvell,kirkwood";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8 earlyprintk";
+ stdout-path = &uart0;
+ };
+
+ gpio_poweroff {
+ compatible = "gpio-poweroff";
+ pinctrl-0 = <&pmx_pwr_off>;
+ pinctrl-names = "default";
+ gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
+ };
+
+ keys {
+ compatible = "gpio-keys";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ pinctrl-0 = <&pmx_buttons>;
+ pinctrl-names = "default";
+
+ power {
+ label = "Power Button";
+ linux,code = <KEY_POWER>;
+ gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
+ };
+
+ copy {
+ label = "Copy Button";
+ linux,code = <KEY_COPY>;
+ gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
+ };
+
+ reset {
+ label = "Reset Button";
+ linux,code = <KEY_RESTART>;
+ gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&pmx_leds>;
+ pinctrl-names = "default";
+
+ led-1 {
+ function = LED_FUNCTION_DISK_ERR;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-2 {
+ function = LED_FUNCTION_USB;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "usb-host";
+ };
+
+ led-3 {
+ function = LED_FUNCTION_DISK;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "ata1";
+ };
+
+ led-4 {
+ function = LED_FUNCTION_INDICATOR;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-5 {
+ function = LED_FUNCTION_INDICATOR;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-6 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "default-on";
+ };
+
+ led-7 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_RED>;
+ gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
+ };
+ };
+
+ usb0_power: regulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "USB Power";
+
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&gpio0 21 GPIO_ACTIVE_HIGH>;
+ };
+
+ sata1_power: regulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "SATA1 Power";
+
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&gpio1 1 GPIO_ACTIVE_HIGH>;
+ };
+
+ thermal-zones {
+ disk-thermal {
+ polling-delay = <20000>;
+ polling-delay-passive = <2000>;
+
+ thermal-sensors = <&hdd_temp>;
+
+ trips {
+ disk_alert: disk-alert {
+ temperature = <40000>;
+ hysteresis = <5000>;
+ type = "active";
+ };
+ disk_crit: disk-crit {
+ temperature = <60000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+ };
+ };
+};
+
+
+&eth0 {
+ status = "okay";
+
+ ethernet0-port@0 {
+ phy-handle = <&ethphy0>;
+ };
+};
+
+&i2c0 {
+ status = "okay";
+
+ rtc@68 {
+ compatible = "htk,ht1382";
+ reg = <0x68>;
+ };
+};
+
+&mdio {
+ status = "okay";
+
+ ethphy0: ethernet-phy@1 {
+ reg = <1>;
+ phy-mode = "rgmii-id";
+ marvell,reg-init = <0x1 0x16 0x0 0x3>,
+ <0x1 0x10 0x0 0x1017>,
+ <0x1 0x11 0x0 0x4408>,
+ <0x1 0x16 0x0 0x0>;
+ };
+};
+
+&nand {
+ status = "okay";
+ chip-delay = <35>;
+
+ partition@0 {
+ label = "uboot";
+ reg = <0x0000000 0x00c0000>;
+ read-only;
+ };
+ partition@c0000 {
+ label = "uboot_env";
+ reg = <0x00c0000 0x0080000>;
+ };
+ partition@140000 {
+ label = "ubi";
+ reg = <0x0140000 0x7ec0000>;
+ };
+};
+
+&pciec {
+ status = "okay";
+};
+
+&pcie0 {
+ status = "okay";
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+
+ pmx_buttons: pmx-buttons {
+ marvell,pins = "mpp24", "mpp25", "mpp26";
+ marvell,function = "gpio";
+ };
+
+ pmx_leds: pmx-leds {
+ marvell,pins = "mpp13", "mpp15", "mpp16", "mpp22", "mpp23",
+ "mpp28", "mpp29";
+ marvell,function = "gpio";
+ };
+
+ pmx_power: pmx-power {
+ marvell,pins = "mpp21", "mpp33";
+ marvell,function = "gpio";
+ };
+
+ pmx_pwr_off: pmx-pwr-off {
+ marvell,pins = "mpp27";
+ marvell,function = "gpio";
+ };
+};
+
+&rtc {
+ status = "disabled";
+};
+
+&sata {
+ status = "okay";
+ nr-ports = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hdd_temp: sata-port@0 {
+ reg = <0>;
+ #thermal-sensor-cells = <0>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};

View File

@ -0,0 +1,249 @@
From 5668d088ee4ea05db9daaae0645d1d1f579b20f9 Mon Sep 17 00:00:00 2001
From: Pawel Dembicki <paweldembicki@gmail.com>
Date: Mon, 3 Oct 2022 09:34:43 +0200
Subject: ARM: dts: kirkwood: Add Endian 4i Edge 200 board
Add Endian 4i Edge 200 is 5-port firewall.
It have also clone: Endian UTM Mini (The same hardware, with added WLAN
card).
Hardware:
- SoC: Marvell 88F6281-A1 ARMv5TE Processor 1.2GHz
- Ram: 512MB (4x Nanya NT5TU128M8GE-AC)
- NAND Flash: 512MB (Micron 29F4G08AAC)
- Lan 1-4: 4x GBE (Marvell 88E6171R-TFJ2)
- Lan 5: 1x GBE (Marvell 88E1116R-NNC1)
- Storage: MicroSD Slot
- MCPIE: MiniPCIe Slot present [fitted with SparkLan WPEA-110N/E
(Atheros AR9280 chipset) in Endian UTM Mini WLAN only]
- USB: 1x USB 2.0 port
- Console: RJ-45 port
- LEDs: 3x GPIO controlled
Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/kirkwood-4i-edge-200.dts | 205 +++++++++++++++++++++++++++++
2 files changed, 206 insertions(+)
create mode 100644 arch/arm/boot/dts/kirkwood-4i-edge-200.dts
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -265,6 +265,7 @@ dtb-$(CONFIG_ARCH_KEYSTONE) += \
keystone-k2g-evm.dtb \
keystone-k2g-ice.dtb
dtb-$(CONFIG_MACH_KIRKWOOD) += \
+ kirkwood-4i-edge-200.dtb \
kirkwood-b3.dtb \
kirkwood-blackarmor-nas220.dtb \
kirkwood-c200-v1.dtb \
--- /dev/null
+++ b/arch/arm/boot/dts/kirkwood-4i-edge-200.dts
@@ -0,0 +1,205 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Endian 4i Edge 200 Board Description
+ * Note: Endian UTM Mini is hardware clone of Endian Edge 200
+ * Copyright 2021-2022 Pawel Dembicki <paweldembicki@gmail.com>
+ */
+
+/dts-v1/;
+
+#include "kirkwood.dtsi"
+#include "kirkwood-6281.dtsi"
+#include <dt-bindings/leds/common.h>
+
+/ {
+ model = "Endian 4i Edge 200";
+ compatible = "endian,4i-edge-200", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x20000000>;
+ };
+
+ chosen {
+ bootargs = "console=ttyS0,115200n8";
+ stdout-path = &uart0;
+ };
+
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-0 = <&pmx_led>;
+ pinctrl-names = "default";
+
+ led-1 {
+ function = LED_FUNCTION_SD;
+ color = <LED_COLOR_ID_AMBER>;
+ gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
+ };
+
+ led-2 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_AMBER>;
+ gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
+ };
+
+ led-3 {
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_GREEN>;
+ gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;
+ };
+ };
+};
+
+&eth0 {
+ status = "okay";
+};
+
+&eth0port {
+ speed = <1000>;
+ duplex = <1>;
+};
+
+&eth1 {
+ status = "okay";
+};
+
+&eth1port {
+ phy-handle = <&ethphyb>;
+};
+
+&mdio {
+ status = "okay";
+
+ ethphyb: ethernet-phy@b {
+ reg = <0x0b>;
+
+ marvell,reg-init =
+ /* link-activity, bi-color mode 4 */
+ <3 0x10 0xfff0 0xf>; /* Reg 3,16 <- 0xzzzf */
+ };
+
+ switch0: switch@11 {
+ compatible = "marvell,mv88e6085";
+ reg = <0x11>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "port1";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "port2";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "port3";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "port4";
+ };
+
+ port@5 {
+ reg = <5>;
+ phy-mode = "rgmii-id";
+ ethernet = <&eth0port>;
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
+};
+
+&nand {
+ status = "okay";
+ pinctrl-0 = <&pmx_nand>;
+ pinctrl-names = "default";
+
+ partition@0 {
+ label = "u-boot";
+ reg = <0x00000000 0x000a0000>;
+ read-only;
+ };
+
+ partition@a0000 {
+ label = "u-boot-env";
+ reg = <0x000a0000 0x00060000>;
+ read-only;
+ };
+
+ partition@100000 {
+ label = "kernel";
+ reg = <0x00100000 0x00400000>;
+ };
+
+ partition@500000 {
+ label = "ubi";
+ reg = <0x00500000 0x1fb00000>;
+ };
+};
+
+&pciec {
+ status = "okay";
+};
+
+&pcie0 {
+ status = "okay";
+};
+
+&pinctrl {
+ pinctrl-0 = <&pmx_sysrst>;
+ pinctrl-names = "default";
+
+ pmx_sysrst: pmx-sysrst {
+ marvell,pins = "mpp6";
+ marvell,function = "sysrst";
+ };
+
+ pmx_sdio_cd: pmx-sdio-cd {
+ marvell,pins = "mpp28";
+ marvell,function = "gpio";
+ };
+
+ pmx_led: pmx-led {
+ marvell,pins = "mpp34", "mpp35", "mpp49";
+ marvell,function = "gpio";
+ };
+};
+
+&rtc {
+ status = "okay";
+};
+
+&sata_phy0 {
+ status = "disabled";
+};
+
+&sata_phy1 {
+ status = "disabled";
+};
+
+&sdio {
+ pinctrl-0 = <&pmx_sdio_cd>;
+ pinctrl-names = "default";
+ status = "okay";
+ cd-gpios = <&gpio0 28 9>;
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};

View File

@ -0,0 +1,51 @@
--- a/arch/arm/boot/dts/kirkwood-c200-v1.dts
+++ b/arch/arm/boot/dts/kirkwood-c200-v1.dts
@@ -14,6 +14,14 @@
model = "Ctera C200 V1";
compatible = "ctera,c200-v1", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+ aliases {
+ led-boot = &led_status_green;
+ led-failsafe = &led_status_red;
+ led-running = &led_status_green;
+ led-upgrade = &led_status_red;
+ };
+
chosen {
bootargs = "console=ttyS0,115200";
stdout-path = &uart0;
@@ -78,6 +86,7 @@
function-enumerator = <1>;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata1";
};
led-2 {
@@ -85,6 +94,7 @@
function-enumerator = <2>;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio0 16 GPIO_ACTIVE_LOW>;
+ linux,default-trigger = "ata2";
};
led-3 {
@@ -94,13 +104,15 @@
gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
};
- led-4 {
+ led_status_red: led-4 {
+ label = "red:status";
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
};
- led-5 {
+ led_status_green: led-5 {
+ label = "green:status";
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;

View File

@ -0,0 +1,35 @@
--- a/arch/arm/boot/dts/kirkwood-nsa310s.dts
+++ b/arch/arm/boot/dts/kirkwood-nsa310s.dts
@@ -16,6 +16,13 @@
model = "ZyXEL NSA310S";
compatible = "zyxel,nsa310s", "marvell,kirkwood-88f6702", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_green_sys;
+ led-failsafe = &led_red_sys;
+ led-running = &led_green_sys;
+ led-upgrade = &led_red_sys;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>;
@@ -96,14 +103,16 @@
gpios = <&gpio0 23 GPIO_ACTIVE_HIGH>;
};
- led-6 {
+ led_green_sys: led-6 {
+ label = "nsa310s:green:sys";
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
- led-7 {
+ led_red_sys: led-7 {
+ label = "nsa310s:red:sys";
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_RED>;
gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;

View File

@ -0,0 +1,34 @@
--- a/arch/arm/boot/dts/kirkwood-4i-edge-200.dts
+++ b/arch/arm/boot/dts/kirkwood-4i-edge-200.dts
@@ -20,6 +20,13 @@
reg = <0x00000000 0x20000000>;
};
+ aliases {
+ led-boot = &led_status_green;
+ led-failsafe = &led_status_orange;
+ led-running = &led_status_green;
+ led-upgrade = &led_status_orange;
+ };
+
chosen {
bootargs = "console=ttyS0,115200n8";
stdout-path = &uart0;
@@ -37,13 +44,15 @@
linux,default-trigger = "mmc0";
};
- led-2 {
+ led_status_orange: led-2 {
+ label = "orange:status";
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_AMBER>;
gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
};
- led-3 {
+ led_status_green: led-3 {
+ label = "green:status";
function = LED_FUNCTION_STATUS;
color = <LED_COLOR_ID_GREEN>;
gpios = <&gpio1 17 GPIO_ACTIVE_HIGH>;

View File

@ -10,7 +10,7 @@
#define UART_BUG_TXEN BIT(1) /* UART has buggy TX IIR status */
--- a/drivers/tty/serial/8250/8250_port.c
+++ b/drivers/tty/serial/8250/8250_port.c
@@ -288,7 +288,7 @@ static const struct serial8250_config ua
@@ -289,7 +289,7 @@ static const struct serial8250_config ua
.tx_loadsz = 16,
.fcr = UART_FCR_ENABLE_FIFO |
UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
@ -19,7 +19,7 @@
},
[PORT_NPCM] = {
.name = "Nuvoton 16550",
@@ -2756,6 +2756,11 @@ serial8250_do_set_termios(struct uart_po
@@ -2760,6 +2760,11 @@ serial8250_do_set_termios(struct uart_po
unsigned long flags;
unsigned int baud, quot, frac = 0;

View File

@ -42,7 +42,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
/*
* The first read of a sensor often contains very high bogus
@@ -1075,6 +1073,11 @@ static int mtk_thermal_probe(struct plat
@@ -1085,6 +1083,11 @@ static int mtk_thermal_probe(struct plat
mtk_thermal_release_periodic_ts(mt, auxadc_base);
}

View File

@ -210,7 +210,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.compatible = "mediatek,mt8183-thermal",
.data = (void *)&mt8183_thermal_data,
}, {
@@ -1068,15 +1186,24 @@ static int mtk_thermal_probe(struct plat
@@ -1078,15 +1196,24 @@ static int mtk_thermal_probe(struct plat
goto err_disable_clk_auxadc;
}

View File

@ -9,6 +9,9 @@ board_config_update
board=$(board_name)
case "$board" in
aerohive,br200-wp)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
;;
aerohive,hiveap-330|\
enterasys,ws-ap3715i)
ucidef_set_interfaces_lan_wan "eth1" "eth0"

View File

@ -20,6 +20,7 @@ CONFIG_AUDIT_ARCH=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BOOKE=y
CONFIG_BOOKE_WDT=y
# CONFIG_BR200_WP is not set
# CONFIG_BSC9131_RDB is not set
# CONFIG_BSC9132_QDS is not set
# CONFIG_C293_PCIE is not set
@ -58,6 +59,7 @@ CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_LEGACY_SYSFS=y
CONFIG_EDAC_MPC85XX=y
CONFIG_EDAC_SUPPORT=y
# CONFIG_FIREBOX_T10 is not set
CONFIG_FIXED_PHY=y
CONFIG_FSL_BOOKE=y
# CONFIG_FSL_DPAA2_SWITCH is not set
@ -265,4 +267,3 @@ CONFIG_WATCHDOG_CORE=y
# CONFIG_XES_MPC85xx is not set
CONFIG_XZ_DEC_BCJ=y
CONFIG_XZ_DEC_POWERPC=y
# CONFIG_FIREBOX_T10 is not set

View File

@ -0,0 +1,373 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Aerohive BR200-WP Device Tree Source
*
* Based on: Aerohive HiveAP-330 Device Tree Source
*
* Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
* Copyright (C) 2023 Pawel Dembicki <paweldembicki@gmail.com>
*/
#include <dt-bindings/leds/common.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
/include/ "fsl/p1020si-pre.dtsi"
/ {
model = "Aerohive BR200-WP";
compatible = "aerohive,br200-wp";
chosen {
bootargs = "console=ttyS0,9600";
bootargs-override = "console=ttyS0,9600 noinitrd";
};
aliases {
led-boot = &led_attention;
led-failsafe = &led_attention;
led-running = &led_status;
led-upgrade = &led_status;
label-mac-device = &enet0;
};
memory {
device_type = "memory";
};
cpus {
/delete-property/ PowerPC,P1020@1; /* P1011 have one core only */
};
board_lbc: lbc: localbus@ffe05000 {
reg = <0 0xffe05000 0 0x1000>;
ranges = <0x0 0x0 0x0 0xec000000 0x4000000>;
nor@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x4000000>;
bank-width = <2>;
device-width = <1>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
reg = <0x0 0x40000>;
label = "dtb";
};
partition@40000 {
reg = <0x40000 0x40000>;
label = "initramfs";
};
partition@80000 {
reg = <0x80000 0x27c0000>;
label = "rootfs";
};
partition@2840000 {
reg = <0x2840000 0x800000>;
label = "kernel";
};
partition@3040000 {
reg = <0x3040000 0xec0000>;
label = "stock-jffs2";
read-only;
};
partition@3f00000 {
reg = <0x3f00000 0x20000>;
label = "hw-info";
read-only;
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_hwinfo_0: macaddr@0 {
reg = <0x0 0x6>;
};
};
partition@3f20000 {
reg = <0x3f20000 0x20000>;
label = "boot-info";
read-only;
};
partition@3f40000 {
reg = <0x3f40000 0x20000>;
label = "boot-info-backup";
read-only;
};
partition@3f60000 {
reg = <0x3f60000 0x20000>;
label = "u-boot-env";
};
partition@3f80000 {
reg = <0x3f80000 0x80000>;
label = "u-boot";
read-only;
};
firmware@0 {
reg = <0x0 0x3040000>;
label = "firmware";
};
};
};
};
board_soc: soc: soc@ffe00000 {
ranges = <0x0 0x0 0xffe00000 0x100000>;
mdio@24000 {
phy_port1: phy@0 {
reg = <0>;
};
phy_port2: phy@1 {
reg = <1>;
};
phy_port3: phy@2 {
reg = <2>;
};
phy_port4: phy@3 {
reg = <3>;
};
phy_port5: phy@4 {
reg = <4>;
};
switch@10 {
compatible = "qca,qca8327";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x10>;
reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
label = "lan1";
phy-handle = <&phy_port1>;
nvmem-cells = <&macaddr_hwinfo_0>;
nvmem-cell-names = "mac-address";
mac-address-increment = <2>;
};
port@2 {
reg = <2>;
label = "lan2";
phy-handle = <&phy_port2>;
nvmem-cells = <&macaddr_hwinfo_0>;
nvmem-cell-names = "mac-address";
mac-address-increment = <3>;
};
port@3 {
reg = <3>;
label = "lan3";
phy-handle = <&phy_port3>;
nvmem-cells = <&macaddr_hwinfo_0>;
nvmem-cell-names = "mac-address";
mac-address-increment = <4>;
};
port@4 {
reg = <4>;
label = "lan4";
phy-handle = <&phy_port4>;
nvmem-cells = <&macaddr_hwinfo_0>;
nvmem-cell-names = "mac-address";
mac-address-increment = <5>;
};
port@5 {
reg = <5>;
label = "wan";
phy-handle = <&phy_port5>;
nvmem-cells = <&macaddr_hwinfo_0>;
nvmem-cell-names = "mac-address";
};
port@6 {
reg = <6>;
ethernet = <&enet0>;
phy-mode = "rgmii-id";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
mdio@25000 {
status = "disabled";
};
mdio@26000 {
status = "disabled";
};
enet0: ethernet@b0000 {
status = "okay";
phy-connection-type = "rgmii-id";
nvmem-cells = <&macaddr_hwinfo_0>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;
};
};
enet1: ethernet@b1000 {
status = "disabled";
};
enet2: ethernet@b2000 {
status = "disabled";
};
gpio0: gpio-controller@fc00 {
};
usb@22000 {
phy_type = "ulpi";
dr_mode = "host";
};
usb@23000 {
status = "disabled";
};
};
pci0: pcie@ffe09000 {
status = "disabled";
};
pci1: pcie@ffe0a000 {
reg = <0x0 0xffe0a000 0x0 0x1000>;
ranges = <0x2000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0x0 0xffc20000 0x0 0x10000>;
reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;
pcie@0 {
ranges = <0x2000000 0x0 0xc0000000
0x2000000 0x0 0xc0000000
0x0 0x20000000
0x1000000 0x0 0x0
0x1000000 0x0 0x0
0x0 0x100000>;
ath9k: wifi@0,0 {
reg = <0x0000 0 0 0 0>;
#gpio-cells = <2>;
gpio-controller;
nvmem-cells = <&macaddr_hwinfo_0>;
nvmem-cell-names = "mac-address";
mac-address-increment = <16>;
};
};
};
leds {
compatible = "gpio-leds";
led_attention: led-0 {
gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
label = "amber:status";
color = <LED_COLOR_ID_AMBER>;
function = LED_FUNCTION_STATUS;
};
led_status: led-1 {
gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
label = "white:status";
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_STATUS;
};
};
buttons {
compatible = "gpio-keys";
reset {
label = "Reset button";
gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
/include/ "fsl/p1020si-post.dtsi"
/ {
chosen {
linux,stdout-path = "/soc@ffe00000/serial@4500";
};
cpus {
PowerPC,P1020@0 {
i-cache-sets = <0x80>;
i-cache-size = <0x8000>;
i-cache-block-size = <0x20>;
d-cache-sets = <0x80>;
d-cache-size = <0x8000>;
d-cache-block-size = <0x20>;
clock-frequency = <0x2756cd00>;
bus-frequency = <0x13ab6680>;
timebase-frequency = <0x2756cd0>;
};
};
memory {
reg = <0x00 0x00 0x00 0x10000000>;
};
localbus@ffe05000 {
bus-frequency = <0x13ab668>;
};
soc@ffe00000 {
bus-frequency = <0x13ab6680>;
serial@4500 {
clock-frequency = <0x13ab6680>;
};
serial@4600 {
clock-frequency = <0x13ab6680>;
};
};
pcie@ffe09000 {
clock-frequency = <0x1fca055>;
};
pcie@ffe0a000 {
clock-frequency = <0x1fca055>;
};
};

View File

@ -0,0 +1,82 @@
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Aerohive BR200-WP Board Setup
* Copyright (C) 2023 Pawel Dembicki <paweldembicki@gmail.com>
*
* Based on:
* hiveap-330.c:
* Aerohive HiveAP-330 Board Setup
* Copyright (C) 2017 Chris Blake <chrisrblake93@gmail.com>
*/
#include <linux/stddef.h>
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/of_platform.h>
#include <asm/time.h>
#include <asm/machdep.h>
#include <asm/pci-bridge.h>
#include <mm/mmu_decl.h>
#include <asm/prom.h>
#include <asm/udbg.h>
#include <asm/mpic.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
#include "smp.h"
#include "mpc85xx.h"
void __init br200_wp_pic_init(void)
{
struct mpic *mpic;
mpic = mpic_alloc(NULL, 0,
MPIC_BIG_ENDIAN |
MPIC_SINGLE_DEST_CPU,
0, 256, " OpenPIC ");
BUG_ON(mpic == NULL);
mpic_init(mpic);
}
/*
* Setup the architecture
*/
static void __init br200_wp_setup_arch(void)
{
if (ppc_md.progress)
ppc_md.progress("br200_wp_setup_arch()", 0);
fsl_pci_assign_primary();
pr_info("br200-wp board from Aerohive\n");
}
machine_arch_initcall(br200_wp, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
*/
static int __init br200_wp_probe(void)
{
if (of_machine_is_compatible("aerohive,br200-wp"))
return 1;
return 0;
}
define_machine(br200_wp) {
.name = "P1020 RDB",
.probe = br200_wp_probe,
.setup_arch = br200_wp_setup_arch,
.init_IRQ = br200_wp_pic_init,
#ifdef CONFIG_PCI
.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
.pcibios_fixup_phb = fsl_pcibios_fixup_phb,
#endif
.get_irq = mpic_get_irq,
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};

View File

@ -14,6 +14,26 @@ define Build/spi-loader-okli
mv "$@.new" "$@"
endef
define Device/aerohive_br200-wp
DEVICE_VENDOR := Aerohive
DEVICE_MODEL := BR200-WP
BLOCKSIZE := 128k
KERNEL_NAME := simpleImage.br200-wp
KERNEL := kernel-bin | uImage none
KERNEL_INITRAMFS := kernel-bin | uImage none
KERNEL_ENTRY := 0x1000000
KERNEL_LOADADDR := 0x1000000
KERNEL_SIZE := 8m
IMAGES := fdt.bin sysupgrade.bin
IMAGE/fdt.bin := append-dtb
IMAGE/sysupgrade.bin := append-dtb | pad-to 256k | check-size 256k | \
append-uImage-fakehdr ramdisk | pad-to 256k | check-size 512k | \
append-rootfs | pad-rootfs $$(BLOCKSIZE) | pad-to 41216k | check-size 41216k | \
append-kernel | append-metadata
IMAGE_SIZE = 63m
endef
TARGET_DEVICES += aerohive_br200-wp
define Device/enterasys_ws-ap3715i
DEVICE_VENDOR := Enterasys
DEVICE_MODEL := WS-AP3715i

View File

@ -1,8 +1,12 @@
CONFIG_AT803X_PHY=y
CONFIG_BR200_WP=y
CONFIG_CMDLINE_OVERRIDE=y
CONFIG_FIREBOX_T10=y
# CONFIG_FSL_CORENET_CF is not set
CONFIG_GPIO_74X164=y
CONFIG_MTD_CFI=y
CONFIG_MTD_NAND_FSL_IFC=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_TPLINK_FW=y
CONFIG_MTD_SPLIT_UIMAGE_FW=y
@ -24,4 +28,3 @@ CONFIG_SPI_GPIO=y
CONFIG_TL_WDR4900_V1=y
CONFIG_UBIFS_FS=y
CONFIG_WS_AP3715I=y
CONFIG_FIREBOX_T10=y

View File

@ -1,5 +1,5 @@
BOARDNAME:=P1010
KERNEL_IMAGES:=simpleImage.tl-wdr4900-v1 simpleImage.ws-ap3715i
KERNEL_IMAGES:=simpleImage.br200-wp simpleImage.tl-wdr4900-v1 simpleImage.ws-ap3715i
define Target/Description
Build firmware images for P1010 based boards.

View File

@ -0,0 +1,57 @@
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -49,6 +49,16 @@ config BSC9132_QDS
and dual StarCore SC3850 DSP cores.
Manufacturer : Freescale Semiconductor, Inc
+config BR200_WP
+ bool "Aerohive BR200-WP"
+ select DEFAULT_UIMAGE
+ select ARCH_REQUIRE_GPIOLIB
+ select GPIO_MPC8XXX
+ help
+ This option enables support for the Aerohive BR200-WP board.
+
+ This board is a wireless router with a Freescale P1011 SoC.
+
config HIVEAP_330
bool "Aerohive HiveAP-330"
select DEFAULT_UIMAGE
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -12,6 +12,7 @@ obj-y += common.o
obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
obj-$(CONFIG_BSC9132_QDS) += bsc913x_qds.o
obj-$(CONFIG_C293_PCIE) += c293pcie.o
+obj-$(CONFIG_BR200_WP) += br200-wp.o
obj-$(CONFIG_HIVEAP_330) += hiveap-330.o
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -163,6 +163,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie
src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S
src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S
src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c
+src-plat-$(CONFIG_BR200_WP) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S
src-plat-$(CONFIG_WS_AP3825I) += simpleboot.c fixed-head.S
@@ -345,6 +346,7 @@ image-$(CONFIG_TQM8548) += cuImage.tqm
image-$(CONFIG_TQM8555) += cuImage.tqm8555
image-$(CONFIG_TQM8560) += cuImage.tqm8560
image-$(CONFIG_KSI8560) += cuImage.ksi8560
+image-$(CONFIG_BR200_WP) += simpleImage.br200-wp
image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1
image-$(CONFIG_WS_AP3715I) += simpleImage.ws-ap3715i
image-$(CONFIG_WS_AP3825I) += simpleImage.ws-ap3825i
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -326,6 +326,7 @@ adder875-redboot)
platformo="$object/fixed-head.o $object/redboot-8xx.o"
binary=y
;;
+simpleboot-br200-wp|\
simpleboot-ws-ap3715i|\
simpleboot-ws-ap3825i|\
simpleboot-tl-wdr4900-v1)

View File

@ -16,7 +16,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -273,7 +273,6 @@ image-$(CONFIG_PPC_CHRP) += zImage.chrp
@@ -274,7 +274,6 @@ image-$(CONFIG_PPC_CHRP) += zImage.chrp
image-$(CONFIG_PPC_EFIKA) += zImage.chrp
image-$(CONFIG_PPC_PMAC) += zImage.pmac
image-$(CONFIG_PPC_HOLLY) += dtbImage.holly
@ -24,7 +24,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
image-$(CONFIG_EPAPR_BOOT) += zImage.epapr
#
@@ -407,15 +406,6 @@ $(obj)/dtbImage.%: vmlinux $(wrapperbits
@@ -409,15 +408,6 @@ $(obj)/dtbImage.%: vmlinux $(wrapperbits
$(obj)/vmlinux.strip: vmlinux
$(STRIP) -s -R .comment $< -o $@

View File

@ -9,7 +9,7 @@ include $(INCLUDE_DIR)/target.mk
PKG_NAME:=fortify-headers
PKG_VERSION:=1.1
PKG_RELEASE=2
PKG_RELEASE=3
PKG_SOURCE_URL:=https://dl.2f30.org/releases
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz

View File

@ -5,7 +5,7 @@
}
-#ifdef _GNU_SOURCE
+#if defined(_GNU_SOURCE) && !_REDIR_TIME64
+#if defined(_GNU_SOURCE) && !(defined(_REDIR_TIME64) && _REDIR_TIME64)
#undef ppoll
_FORTIFY_FN(ppoll) int ppoll(struct pollfd *__f, nfds_t __n, const struct timespec *__s,
const sigset_t *__m)