diff --git a/Makefile b/Makefile index 39ab3ae4a5..d85df6c3cf 100644 --- a/Makefile +++ b/Makefile @@ -14,7 +14,7 @@ $(if $(findstring $(space),$(TOPDIR)),$(error ERROR: The path to the OpenWrt dir world: -DISTRO_PKG_CONFIG:=$(shell which -a pkg-config | grep -E '\/usr' | head -n 1) +DISTRO_PKG_CONFIG:=$(shell $(TOPDIR)/scripts/command_all.sh pkg-config | grep -E '\/usr' | head -n 1) export PATH:=$(TOPDIR)/staging_dir/host/bin:$(PATH) ifneq ($(OPENWRT_BUILD),1) diff --git a/config/Config-images.in b/config/Config-images.in index ea99690633..eaef360321 100644 --- a/config/Config-images.in +++ b/config/Config-images.in @@ -296,7 +296,7 @@ menu "Target Images" config TARGET_ROOTFS_PARTSIZE int "Root filesystem partition size (in MiB)" - depends on USES_ROOTFS_PART || TARGET_ROOTFS_EXT4FS || TARGET_omap || TARGET_sunxi || TARGET_uml + depends on USES_ROOTFS_PART || TARGET_ROOTFS_EXT4FS default 160 help Select the root filesystem partition size. diff --git a/include/bpf.mk b/include/bpf.mk index ce30e24434..7d0cfbd76d 100644 --- a/include/bpf.mk +++ b/include/bpf.mk @@ -10,7 +10,7 @@ ifneq ($(CONFIG_USE_LLVM_HOST),) else BPF_PATH:=$(PATH) endif - CLANG:=$(firstword $(shell PATH='$(BPF_PATH)' which clang clang-13 clang-12 clang-11)) + CLANG:=$(firstword $(shell PATH='$(BPF_PATH)' command -v clang clang-13 clang-12 clang-11)) LLVM_VER:=$(subst clang,,$(notdir $(CLANG))) endif ifneq ($(CONFIG_USE_LLVM_PREBUILT),) diff --git a/include/cmake.mk b/include/cmake.mk index b9a7e36dee..9b169b0693 100644 --- a/include/cmake.mk +++ b/include/cmake.mk @@ -24,7 +24,7 @@ MAKE_PATH = $(firstword $(CMAKE_BINARY_SUBDIR) .) ifeq ($(CONFIG_EXTERNAL_TOOLCHAIN),) cmake_tool=$(TOOLCHAIN_DIR)/bin/$(1) else - cmake_tool=$(shell which $(1)) + cmake_tool=$(shell command -v $(1)) endif ifeq ($(CONFIG_CCACHE),) diff --git a/include/host-build.mk b/include/host-build.mk index b68c8c4536..7f76eb1a2f 100644 --- a/include/host-build.mk +++ b/include/host-build.mk @@ -51,6 +51,7 @@ HOST_CONFIGURE_VARS = \ CFLAGS="$(HOST_CFLAGS)" \ CXX="$(HOSTCXX)" \ CPPFLAGS="$(HOST_CPPFLAGS)" \ + CXXFLAGS="$(HOST_CXXFLAGS)" \ LDFLAGS="$(HOST_LDFLAGS)" \ CONFIG_SHELL="$(SHELL)" diff --git a/include/image-commands.mk b/include/image-commands.mk index 913e1c2411..158af853a5 100644 --- a/include/image-commands.mk +++ b/include/image-commands.mk @@ -196,6 +196,10 @@ define Build/check-size } endef +define Build/copy-file + cat "$(1)" > "$@" +endef + define Build/elecom-product-header $(eval product=$(word 1,$(1))) $(eval fw=$(if $(word 2,$(1)),$(word 2,$(1)),$@)) diff --git a/include/kernel-5.10 b/include/kernel-5.10 index e816698dec..677a470e89 100644 --- a/include/kernel-5.10 +++ b/include/kernel-5.10 @@ -1,2 +1,2 @@ -LINUX_VERSION-5.10 = .90 -LINUX_KERNEL_HASH-5.10.90 = 945e4264c014a3d9dfc0a4639309dd1ec2fb545416556421f931b95da78c2725 +LINUX_VERSION-5.10 = .92 +LINUX_KERNEL_HASH-5.10.92 = d5750380a51d3f1d7ab1dd64451752e321c987e0b0099bcd452187d9a76ebb52 diff --git a/include/kernel-5.4 b/include/kernel-5.4 index e85b7ad68e..5f9ef17a7d 100644 --- a/include/kernel-5.4 +++ b/include/kernel-5.4 @@ -1,2 +1,2 @@ -LINUX_VERSION-5.4 = .170 -LINUX_KERNEL_HASH-5.4.170 = b09f74e0cf5fc7cf5de6aa932fe654c962cb10118bdbbdddb397022c6e6d382c +LINUX_VERSION-5.4 = .172 +LINUX_KERNEL_HASH-5.4.172 = b19e890b67e8293008262d3518cab47be58462c63da43f2c9832d63644886ce4 diff --git a/include/prereq.mk b/include/prereq.mk index 23d5ded9b2..0033535e78 100644 --- a/include/prereq.mk +++ b/include/prereq.mk @@ -49,7 +49,7 @@ endef define RequireCommand define Require/$(1) - which $(1) + command -v $(1) endef $$(eval $$(call Require,$(1),$(2))) @@ -103,7 +103,7 @@ define SetupHostCommand $(call QuoteHostCommand,$(11)) $(call QuoteHostCommand,$(12)); do \ if [ -n "$$$$$$$$cmd" ]; then \ bin="$$$$$$$$(PATH="$(subst $(space),:,$(filter-out $(STAGING_DIR_HOST)/%,$(subst :,$(space),$(PATH))))" \ - which "$$$$$$$${cmd%% *}")"; \ + command -v "$$$$$$$${cmd%% *}")"; \ if [ -x "$$$$$$$$bin" ] && eval "$$$$$$$$cmd" >/dev/null 2>/dev/null; then \ mkdir -p "$(STAGING_DIR_HOST)/bin"; \ ln -sf "$$$$$$$$bin" "$(STAGING_DIR_HOST)/bin/$(strip $(1))"; \ diff --git a/package/boot/uboot-envtools/files/ath79 b/package/boot/uboot-envtools/files/ath79 index b01a713705..7aa992e458 100644 --- a/package/boot/uboot-envtools/files/ath79 +++ b/package/boot/uboot-envtools/files/ath79 @@ -103,6 +103,7 @@ netgear,wndr4300tn|\ netgear,wndr4300sw) ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x40000" "0x20000" ;; +openmesh,om2p-v1|\ openmesh,om2p-v2|\ openmesh,om2p-v4|\ openmesh,om2p-hs-v1|\ diff --git a/package/boot/uboot-envtools/files/mediatek_mt7623 b/package/boot/uboot-envtools/files/mediatek_mt7623 index 863c8bc211..fd2a01006a 100644 --- a/package/boot/uboot-envtools/files/mediatek_mt7623 +++ b/package/boot/uboot-envtools/files/mediatek_mt7623 @@ -17,6 +17,10 @@ bananapi,bpi-r2) export_bootdevice export_partdevice ubootpart 1 ubootenv_add_uci_config "/dev/$ubootpart" "0xb0000" "0x10000" "0x10000" "1" + ;; +unielec,u7623-02) + ubootenv_add_uci_config "/dev/mmcblk0p1" "0xc0000" "0x10000" "0x10000" "1" + ;; esac config_load ubootenv diff --git a/package/boot/uboot-mediatek/Makefile b/package/boot/uboot-mediatek/Makefile index 5d9459d461..bd380702db 100644 --- a/package/boot/uboot-mediatek/Makefile +++ b/package/boot/uboot-mediatek/Makefile @@ -1,8 +1,8 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk -PKG_VERSION:=2021.10 -PKG_HASH:=cde723e19262e646f2670d25e5ec4b1b368490de950d4e26275a988c36df0bd4 +PKG_VERSION:=2022.01 +PKG_HASH:=81b4543227db228c03f8a1bf5ddbc813b0bb8f6555ce46064ef721a6fc680413 PKG_BUILD_DEPENDS:=arm-trusted-firmware-tools/host include $(INCLUDE_DIR)/u-boot.mk @@ -78,7 +78,7 @@ endef define U-Boot/mt7623a_unielec_u7623 NAME:=UniElec U7623 (mt7623) - BUILD_DEVICES:=unielec_u7623-emmc unielec_u7623-02-emmc-512m-legacy + BUILD_DEVICES:=unielec_u7623-02 BUILD_SUBTARGET:=mt7623 UBOOT_CONFIG:=mt7623a_unielec_u7623_02 endef diff --git a/package/boot/uboot-mediatek/patches/000-mtk-01-Revert-clk-Add-debugging-for-return-values.patch b/package/boot/uboot-mediatek/patches/000-mtk-01-Revert-clk-Add-debugging-for-return-values.patch index 30558611c8..1a0c1ce5b4 100644 --- a/package/boot/uboot-mediatek/patches/000-mtk-01-Revert-clk-Add-debugging-for-return-values.patch +++ b/package/boot/uboot-mediatek/patches/000-mtk-01-Revert-clk-Add-debugging-for-return-values.patch @@ -10,7 +10,7 @@ This reverts commit 5c5992cb90cf9ca4d51e38d9a95a13c293904df5. --- a/drivers/clk/clk-uclass.c +++ b/drivers/clk/clk-uclass.c -@@ -87,7 +87,7 @@ static int clk_get_by_index_tail(int ret +@@ -88,7 +88,7 @@ static int clk_get_by_index_tail(int ret if (ret) { debug("%s: uclass_get_device_by_of_offset failed: err=%d\n", __func__, ret); @@ -19,7 +19,7 @@ This reverts commit 5c5992cb90cf9ca4d51e38d9a95a13c293904df5. } clk->dev = dev_clk; -@@ -100,15 +100,14 @@ static int clk_get_by_index_tail(int ret +@@ -101,15 +101,14 @@ static int clk_get_by_index_tail(int ret ret = clk_of_xlate_default(clk, args); if (ret) { debug("of_xlate() failed: %d\n", ret); @@ -37,7 +37,7 @@ This reverts commit 5c5992cb90cf9ca4d51e38d9a95a13c293904df5. } static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name, -@@ -127,7 +126,7 @@ static int clk_get_by_indexed_prop(struc +@@ -128,7 +127,7 @@ static int clk_get_by_indexed_prop(struc if (ret) { debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n", __func__, ret); @@ -46,7 +46,7 @@ This reverts commit 5c5992cb90cf9ca4d51e38d9a95a13c293904df5. } -@@ -502,7 +501,6 @@ int clk_free(struct clk *clk) +@@ -501,7 +500,6 @@ int clk_free(struct clk *clk) ulong clk_get_rate(struct clk *clk) { const struct clk_ops *ops; @@ -54,7 +54,7 @@ This reverts commit 5c5992cb90cf9ca4d51e38d9a95a13c293904df5. debug("%s(clk=%p)\n", __func__, clk); if (!clk_valid(clk)) -@@ -512,11 +510,7 @@ ulong clk_get_rate(struct clk *clk) +@@ -511,11 +509,7 @@ ulong clk_get_rate(struct clk *clk) if (!ops->get_rate) return -ENOSYS; diff --git a/package/boot/uboot-mediatek/patches/000-mtk-09-board-mediatek-add-more-network-configurations.patch b/package/boot/uboot-mediatek/patches/000-mtk-09-board-mediatek-add-more-network-configurations.patch index d189735754..50c2ac2e42 100644 --- a/package/boot/uboot-mediatek/patches/000-mtk-09-board-mediatek-add-more-network-configurations.patch +++ b/package/boot/uboot-mediatek/patches/000-mtk-09-board-mediatek-add-more-network-configurations.patch @@ -14,7 +14,7 @@ Signed-off-by: Weijie Gao --- a/include/configs/mt7622.h +++ b/include/configs/mt7622.h -@@ -36,6 +36,7 @@ +@@ -30,6 +30,7 @@ /* Ethernet */ #define CONFIG_IPADDR 192.168.1.1 @@ -25,7 +25,7 @@ Signed-off-by: Weijie Gao #endif --- a/include/configs/mt7623.h +++ b/include/configs/mt7623.h -@@ -54,6 +54,7 @@ +@@ -45,6 +45,7 @@ /* Ethernet */ #define CONFIG_IPADDR 192.168.1.1 #define CONFIG_SERVERIP 192.168.1.2 @@ -35,7 +35,7 @@ Signed-off-by: Weijie Gao --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h -@@ -52,5 +52,6 @@ +@@ -45,5 +45,6 @@ /* Ethernet */ #define CONFIG_IPADDR 192.168.1.1 #define CONFIG_SERVERIP 192.168.1.2 diff --git a/package/boot/uboot-mediatek/patches/000-mtk-14-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch b/package/boot/uboot-mediatek/patches/000-mtk-14-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch index d743035813..dead0db174 100644 --- a/package/boot/uboot-mediatek/patches/000-mtk-14-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch +++ b/package/boot/uboot-mediatek/patches/000-mtk-14-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch @@ -38,15 +38,15 @@ Signed-off-by: Weijie Gao --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig -@@ -109,6 +109,8 @@ config HBMC_AM654 - This is the driver for HyperBus controller on TI's AM65x and - other SoCs +@@ -116,6 +116,8 @@ config STM32_FLASH + This is the driver of embedded flash for some STMicroelectronics + STM32 MCU. +source "drivers/mtd/mtk-snand/Kconfig" + source "drivers/mtd/nand/Kconfig" - source "drivers/mtd/spi/Kconfig" + config SYS_NAND_MAX_CHIPS --- a/drivers/mtd/Makefile +++ b/drivers/mtd/Makefile @@ -39,3 +39,5 @@ obj-$(CONFIG_$(SPL_TPL_)SPI_FLASH_SUPPOR @@ -1145,7 +1145,7 @@ Signed-off-by: Weijie Gao +} --- /dev/null +++ b/drivers/mtd/mtk-snand/mtk-snand-mtd.c -@@ -0,0 +1,526 @@ +@@ -0,0 +1,524 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2020 MediaTek Inc. All Rights Reserved. @@ -1225,9 +1225,7 @@ Signed-off-by: Weijie Gao + else + instr->state = MTD_ERASE_DONE; + -+ if (!ret) -+ mtd_erase_callback(instr); -+ else ++ if (ret) + ret = -EIO; + + return ret; diff --git a/package/boot/uboot-mediatek/patches/000-mtk-16-env-add-support-for-generic-MTD-device.patch b/package/boot/uboot-mediatek/patches/000-mtk-16-env-add-support-for-generic-MTD-device.patch index 11eccb8a3b..d4f3460614 100644 --- a/package/boot/uboot-mediatek/patches/000-mtk-16-env-add-support-for-generic-MTD-device.patch +++ b/package/boot/uboot-mediatek/patches/000-mtk-16-env-add-support-for-generic-MTD-device.patch @@ -19,7 +19,7 @@ Signed-off-by: Weijie Gao --- a/cmd/nvedit.c +++ b/cmd/nvedit.c -@@ -50,6 +50,7 @@ DECLARE_GLOBAL_DATA_PTR; +@@ -48,6 +48,7 @@ DECLARE_GLOBAL_DATA_PTR; defined(CONFIG_ENV_IS_IN_MMC) || \ defined(CONFIG_ENV_IS_IN_FAT) || \ defined(CONFIG_ENV_IS_IN_EXT4) || \ @@ -27,7 +27,7 @@ Signed-off-by: Weijie Gao defined(CONFIG_ENV_IS_IN_NAND) || \ defined(CONFIG_ENV_IS_IN_NVRAM) || \ defined(CONFIG_ENV_IS_IN_ONENAND) || \ -@@ -64,7 +65,7 @@ DECLARE_GLOBAL_DATA_PTR; +@@ -62,7 +63,7 @@ DECLARE_GLOBAL_DATA_PTR; #if !defined(ENV_IS_IN_DEVICE) && \ !defined(CONFIG_ENV_IS_NOWHERE) @@ -47,7 +47,7 @@ Signed-off-by: Weijie Gao help Define this if you don't want to or can't have an environment stored on a storage medium. In this case the environment will still exist -@@ -207,6 +207,27 @@ config ENV_IS_IN_MMC +@@ -208,6 +208,27 @@ config ENV_IS_IN_MMC This value is also in units of bytes, but must also be aligned to an MMC sector boundary. @@ -75,7 +75,7 @@ Signed-off-by: Weijie Gao config ENV_IS_IN_NAND bool "Environment in a NAND device" depends on !CHAIN_OF_TRUST -@@ -534,10 +555,16 @@ config ENV_ADDR_REDUND +@@ -535,10 +556,16 @@ config ENV_ADDR_REDUND Offset from the start of the device (or partition) of the redundant environment location. @@ -93,7 +93,7 @@ Signed-off-by: Weijie Gao default 0x3f8000 if ARCH_ROCKCHIP && ENV_IS_IN_MMC default 0x140000 if ARCH_ROCKCHIP && ENV_IS_IN_SPI_FLASH default 0x88000 if ARCH_SUNXI -@@ -582,6 +609,12 @@ config ENV_SECT_SIZE +@@ -583,6 +610,12 @@ config ENV_SECT_SIZE help Size of the sector containing the environment. @@ -389,7 +389,7 @@ Signed-off-by: Weijie Gao +}; --- a/include/env_internal.h +++ b/include/env_internal.h -@@ -131,6 +131,7 @@ enum env_location { +@@ -130,6 +130,7 @@ enum env_location { ENVL_FAT, ENVL_FLASH, ENVL_MMC, diff --git a/package/boot/uboot-mediatek/patches/000-mtk-17-board-mt7629-add-support-for-booting-from-SPI-NAND.patch b/package/boot/uboot-mediatek/patches/000-mtk-17-board-mt7629-add-support-for-booting-from-SPI-NAND.patch index 1bfa639bc6..4ee3d6f320 100644 --- a/package/boot/uboot-mediatek/patches/000-mtk-17-board-mt7629-add-support-for-booting-from-SPI-NAND.patch +++ b/package/boot/uboot-mediatek/patches/000-mtk-17-board-mt7629-add-support-for-booting-from-SPI-NAND.patch @@ -85,49 +85,6 @@ Signed-off-by: Weijie Gao snor: snor@11014000 { compatible = "mediatek,mtk-snor"; reg = <0x11014000 0x1000>; ---- a/board/mediatek/mt7629/Kconfig -+++ b/board/mediatek/mt7629/Kconfig -@@ -12,6 +12,39 @@ config MTK_SPL_PAD_SIZE - - config MTK_BROM_HEADER_INFO - string -- default "media=nor" -+ default "media=nor" if BOOT_FROM_SNOR -+ default "media=snand;nandinfo=2k+64" if BOOT_FROM_SNAND_2K_64 -+ default "media=snand;nandinfo=2k+128" if BOOT_FROM_SNAND_2K_128 -+ default "media=snand;nandinfo=4k+128" if BOOT_FROM_SNAND_4K_128 -+ default "media=snand;nandinfo=4k+256" if BOOT_FROM_SNAND_4K_256 -+ -+choice -+ prompt "Boot device" -+ default BOOT_FROM_SNOR -+ -+config BOOT_FROM_SNOR -+ bool "SPI-NOR" -+ -+config BOOT_FROM_SNAND_2K_64 -+ bool "SPI-NAND (2K+64)" -+ select MT7629_BOOT_FROM_SNAND -+ -+config BOOT_FROM_SNAND_2K_128 -+ bool "SPI-NAND (2K+128)" -+ select MT7629_BOOT_FROM_SNAND -+ -+config BOOT_FROM_SNAND_4K_128 -+ bool "SPI-NAND (4K+128)" -+ select MT7629_BOOT_FROM_SNAND -+ -+config BOOT_FROM_SNAND_4K_256 -+ bool "SPI-NAND (4K+256)" -+ select MT7629_BOOT_FROM_SNAND -+ -+endchoice -+ -+config MT7629_BOOT_FROM_SNAND -+ bool -+ default n - - endif --- /dev/null +++ b/configs/mt7629_nand_rfb_defconfig @@ -0,0 +1,111 @@ @@ -244,7 +201,7 @@ Signed-off-by: Weijie Gao +# CONFIG_EFI_LOADER is not set --- a/include/configs/mt7629.h +++ b/include/configs/mt7629.h -@@ -30,12 +30,19 @@ +@@ -25,12 +25,19 @@ /* Defines for SPL */ #define CONFIG_SPL_STACK 0x106000 diff --git a/package/boot/uboot-mediatek/patches/000-mtk-18-board-mt7622-use-new-spi-nand-driver.patch b/package/boot/uboot-mediatek/patches/000-mtk-18-board-mt7622-use-new-spi-nand-driver.patch index 241e873497..84101d0ef9 100644 --- a/package/boot/uboot-mediatek/patches/000-mtk-18-board-mt7622-use-new-spi-nand-driver.patch +++ b/package/boot/uboot-mediatek/patches/000-mtk-18-board-mt7622-use-new-spi-nand-driver.patch @@ -55,7 +55,7 @@ Signed-off-by: Weijie Gao reg = <0x11014000 0x1000>; --- a/configs/mt7622_rfb_defconfig +++ b/configs/mt7622_rfb_defconfig -@@ -15,6 +15,7 @@ CONFIG_LOG=y +@@ -16,6 +16,7 @@ CONFIG_LOG=y CONFIG_SYS_PROMPT="MT7622> " CONFIG_CMD_BOOTMENU=y CONFIG_CMD_MMC=y @@ -63,7 +63,7 @@ Signed-off-by: Weijie Gao CONFIG_CMD_PCI=y CONFIG_CMD_SF_TEST=y CONFIG_CMD_PING=y -@@ -27,6 +28,10 @@ CONFIG_SYSCON=y +@@ -28,6 +29,10 @@ CONFIG_SYSCON=y CONFIG_CLK=y CONFIG_MMC_HS200_SUPPORT=y CONFIG_MMC_MTK=y diff --git a/package/boot/uboot-mediatek/patches/000-mtk-19-configs-mt7629-remove-unused-options-and-add-dm-comm.patch b/package/boot/uboot-mediatek/patches/000-mtk-19-configs-mt7629-remove-unused-options-and-add-dm-comm.patch index a1e656d59c..69ea2b0fef 100644 --- a/package/boot/uboot-mediatek/patches/000-mtk-19-configs-mt7629-remove-unused-options-and-add-dm-comm.patch +++ b/package/boot/uboot-mediatek/patches/000-mtk-19-configs-mt7629-remove-unused-options-and-add-dm-comm.patch @@ -14,7 +14,7 @@ Signed-off-by: Weijie Gao --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig -@@ -28,9 +28,14 @@ CONFIG_SPL_WATCHDOG=y +@@ -29,9 +29,14 @@ CONFIG_SPL_WATCHDOG=y CONFIG_HUSH_PARSER=y CONFIG_SYS_PROMPT="U-Boot> " CONFIG_CMD_BOOTMENU=y diff --git a/package/boot/uboot-mediatek/patches/000-mtk-20-configs-mt7622-enable-environment-for-mt7622_rfb.patch b/package/boot/uboot-mediatek/patches/000-mtk-20-configs-mt7622-enable-environment-for-mt7622_rfb.patch index c38b7bbe67..c66451dce9 100644 --- a/package/boot/uboot-mediatek/patches/000-mtk-20-configs-mt7622-enable-environment-for-mt7622_rfb.patch +++ b/package/boot/uboot-mediatek/patches/000-mtk-20-configs-mt7622-enable-environment-for-mt7622_rfb.patch @@ -21,7 +21,7 @@ Signed-off-by: Weijie Gao CONFIG_DEBUG_UART_BASE=0x11002000 CONFIG_DEBUG_UART_CLOCK=25000000 CONFIG_DEBUG_UART=y -@@ -21,6 +23,9 @@ CONFIG_CMD_SF_TEST=y +@@ -22,6 +24,9 @@ CONFIG_CMD_SF_TEST=y CONFIG_CMD_PING=y CONFIG_CMD_SMC=y CONFIG_ENV_OVERWRITE=y diff --git a/package/boot/uboot-mediatek/patches/110-no-kwbimage.patch b/package/boot/uboot-mediatek/patches/110-no-kwbimage.patch index d904c4d280..65d14f5bec 100644 --- a/package/boot/uboot-mediatek/patches/110-no-kwbimage.patch +++ b/package/boot/uboot-mediatek/patches/110-no-kwbimage.patch @@ -1,6 +1,6 @@ --- a/tools/Makefile +++ b/tools/Makefile -@@ -118,7 +118,6 @@ dumpimage-mkimage-objs := aisimage.o \ +@@ -119,7 +119,6 @@ dumpimage-mkimage-objs := aisimage.o \ imximage.o \ imx8image.o \ imx8mimage.o \ diff --git a/package/boot/uboot-mediatek/patches/120-use-xz-instead-of-lzma.patch b/package/boot/uboot-mediatek/patches/120-use-xz-instead-of-lzma.patch index 627b3a7839..c13871b71a 100644 --- a/package/boot/uboot-mediatek/patches/120-use-xz-instead-of-lzma.patch +++ b/package/boot/uboot-mediatek/patches/120-use-xz-instead-of-lzma.patch @@ -1,6 +1,6 @@ --- a/Makefile +++ b/Makefile -@@ -1051,7 +1051,7 @@ quiet_cmd_pad_cat = CAT $@ +@@ -1045,7 +1045,7 @@ quiet_cmd_pad_cat = CAT $@ cmd_pad_cat = $(cmd_objcopy) && $(append) || { rm -f $@; false; } quiet_cmd_lzma = LZMA $@ diff --git a/package/boot/uboot-mediatek/patches/200-cmd-add-imsz-and-imszb.patch b/package/boot/uboot-mediatek/patches/200-cmd-add-imsz-and-imszb.patch index f45de1cc54..5dce177cfa 100644 --- a/package/boot/uboot-mediatek/patches/200-cmd-add-imsz-and-imszb.patch +++ b/package/boot/uboot-mediatek/patches/200-cmd-add-imsz-and-imszb.patch @@ -66,9 +66,9 @@ static int do_iminfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { ---- a/common/image-fit.c -+++ b/common/image-fit.c -@@ -1962,6 +1962,51 @@ static const char *fit_get_image_type_pr +--- a/boot/image-fit.c ++++ b/boot/image-fit.c +@@ -1993,6 +1993,51 @@ static const char *fit_get_image_type_pr return "unknown"; } @@ -122,7 +122,7 @@ int arch, int image_type, int bootstage_id, --- a/include/image.h +++ b/include/image.h -@@ -996,6 +996,7 @@ int fit_parse_subimage(const char *spec, +@@ -952,6 +952,7 @@ int fit_parse_subimage(const char *spec, ulong *addr, const char **image_name); int fit_get_subimage_count(const void *fit, int images_noffset); diff --git a/package/boot/uboot-mediatek/patches/220-cmd-env-readmem.patch b/package/boot/uboot-mediatek/patches/220-cmd-env-readmem.patch index 530a413ef3..f7f2021652 100644 --- a/package/boot/uboot-mediatek/patches/220-cmd-env-readmem.patch +++ b/package/boot/uboot-mediatek/patches/220-cmd-env-readmem.patch @@ -1,6 +1,6 @@ --- a/cmd/Kconfig +++ b/cmd/Kconfig -@@ -484,6 +484,12 @@ config CMD_ENV_EXISTS +@@ -483,6 +483,12 @@ config CMD_ENV_EXISTS Check if a variable is defined in the environment for use in shell scripting. @@ -15,7 +15,7 @@ help --- a/cmd/nvedit.c +++ b/cmd/nvedit.c -@@ -473,6 +473,60 @@ int do_env_ask(struct cmd_tbl *cmdtp, in +@@ -408,6 +408,60 @@ int do_env_ask(struct cmd_tbl *cmdtp, in } #endif @@ -76,7 +76,7 @@ #if defined(CONFIG_CMD_ENV_CALLBACK) static int print_static_binding(const char *var_name, const char *callback_name, void *priv) -@@ -1377,6 +1431,9 @@ static struct cmd_tbl cmd_env_sub[] = { +@@ -1189,6 +1243,9 @@ static struct cmd_tbl cmd_env_sub[] = { U_BOOT_CMD_MKENT(load, 1, 0, do_env_load, "", ""), #endif U_BOOT_CMD_MKENT(print, CONFIG_SYS_MAXARGS, 1, do_env_print, "", ""), @@ -86,7 +86,7 @@ #if defined(CONFIG_CMD_RUN) U_BOOT_CMD_MKENT(run, CONFIG_SYS_MAXARGS, 1, do_run, "", ""), #endif -@@ -1465,6 +1522,9 @@ static char env_help_text[] = +@@ -1277,6 +1334,9 @@ static char env_help_text[] = #if defined(CONFIG_CMD_NVEDIT_EFI) "env print -e [-guid guid] [-n] [name ...] - print UEFI environment\n" #endif @@ -96,7 +96,7 @@ #if defined(CONFIG_CMD_RUN) "env run var [...] - run commands in an environment variable\n" #endif -@@ -1574,6 +1634,17 @@ U_BOOT_CMD( +@@ -1386,6 +1446,17 @@ U_BOOT_CMD( ); #endif diff --git a/package/boot/uboot-mediatek/patches/300-mt7622-generic-reset-button-ignore-env.patch b/package/boot/uboot-mediatek/patches/300-mt7622-generic-reset-button-ignore-env.patch index f45462eeab..43270a7a72 100644 --- a/package/boot/uboot-mediatek/patches/300-mt7622-generic-reset-button-ignore-env.patch +++ b/package/boot/uboot-mediatek/patches/300-mt7622-generic-reset-button-ignore-env.patch @@ -17,13 +17,12 @@ DECLARE_GLOBAL_DATA_PTR; -@@ -20,7 +27,20 @@ int board_init(void) +@@ -20,7 +27,19 @@ int board_init(void) int board_late_init(void) { - gd->env_valid = 1; //to load environment variable from persistent store + struct udevice *dev; -+ int ret; + + if (!button_get_by_label(CONFIG_RESET_BUTTON_LABEL, &dev)) { + puts("reset button found\n"); @@ -39,11 +38,11 @@ env_relocate(); return 0; } ---- a/board/mediatek/mt7622/Kconfig -+++ b/board/mediatek/mt7622/Kconfig -@@ -14,4 +14,8 @@ config MTK_BROM_HEADER_INFO - string - default "media=nor" +--- a/arch/arm/mach-mediatek/Kconfig ++++ b/arch/arm/mach-mediatek/Kconfig +@@ -115,4 +115,8 @@ config MTK_BROM_HEADER_INFO + default "media=emmc" if TARGET_MT8516 || TARGET_MT8365 || TARGET_MT8183 + default "lk=1" if TARGET_MT7623 +config RESET_BUTTON_LABEL + string "Button to trigger factory reset" diff --git a/package/boot/uboot-mediatek/patches/301-mt7623-generic-reset-button-ignore-env.patch b/package/boot/uboot-mediatek/patches/301-mt7623-generic-reset-button-ignore-env.patch new file mode 100644 index 0000000000..e144f42c47 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/301-mt7623-generic-reset-button-ignore-env.patch @@ -0,0 +1,43 @@ +--- a/board/mediatek/mt7623/mt7623_rfb.c ++++ b/board/mediatek/mt7623/mt7623_rfb.c +@@ -4,8 +4,17 @@ + */ + + #include ++#include ++#include ++#include ++#include + #include + #include ++#include ++ ++#ifndef CONFIG_RESET_BUTTON_LABEL ++#define CONFIG_RESET_BUTTON_LABEL "reset" ++#endif + + DECLARE_GLOBAL_DATA_PTR; + +@@ -41,3 +50,22 @@ int mmc_get_env_dev(void) + return mmc_get_boot_dev(); + } + #endif ++ ++int board_late_init(void) ++{ ++ struct udevice *dev; ++ ++ if (!button_get_by_label(CONFIG_RESET_BUTTON_LABEL, &dev)) { ++ puts("reset button found\n"); ++#ifdef CONFIG_RESET_BUTTON_SETTLE_DELAY ++ mdelay(CONFIG_RESET_BUTTON_SETTLE_DELAY); ++#endif ++ if (button_get_state(dev) == BUTTON_ON) { ++ puts("button pushed, resetting environment\n"); ++ gd->env_valid = ENV_INVALID; ++ } ++ } ++ ++ env_relocate(); ++ return 0; ++} diff --git a/package/boot/uboot-mediatek/patches/350-add-support-for-Winbond-W25Q512JV.patch b/package/boot/uboot-mediatek/patches/350-add-support-for-Winbond-W25Q512JV.patch index 8ad4fc412d..50df49d823 100644 --- a/package/boot/uboot-mediatek/patches/350-add-support-for-Winbond-W25Q512JV.patch +++ b/package/boot/uboot-mediatek/patches/350-add-support-for-Winbond-W25Q512JV.patch @@ -1,6 +1,6 @@ --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c -@@ -353,6 +353,8 @@ const struct flash_info spi_nor_ids[] = +@@ -369,6 +369,8 @@ const struct flash_info spi_nor_ids[] = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, { INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, diff --git a/package/boot/uboot-mediatek/patches/400-update-bpir2-defconfig.patch b/package/boot/uboot-mediatek/patches/400-update-bpir2-defconfig.patch index 6a78a88fd0..01a550b301 100644 --- a/package/boot/uboot-mediatek/patches/400-update-bpir2-defconfig.patch +++ b/package/boot/uboot-mediatek/patches/400-update-bpir2-defconfig.patch @@ -1,6 +1,6 @@ --- a/configs/mt7623n_bpir2_defconfig +++ b/configs/mt7623n_bpir2_defconfig -@@ -4,52 +4,137 @@ CONFIG_ARCH_MEDIATEK=y +@@ -4,53 +4,138 @@ CONFIG_ARCH_MEDIATEK=y CONFIG_SYS_TEXT_BASE=0x81e00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 @@ -12,6 +12,7 @@ +CONFIG_DEFAULT_DEVICE_TREE="mt7623n-bananapi-bpi-r2" +CONFIG_USE_DEFAULT_ENV_FILE=y CONFIG_DISTRO_DEFAULTS=y + CONFIG_SYS_LOAD_ADDR=0x84000000 CONFIG_FIT=y -CONFIG_FIT_VERBOSE=y +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y @@ -243,60 +244,3 @@ }; ð { ---- a/board/mediatek/mt7623/mt7623_rfb.c -+++ b/board/mediatek/mt7623/mt7623_rfb.c -@@ -6,6 +6,17 @@ - #include - #include - #include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#ifndef CONFIG_RESET_BUTTON_LABEL -+#define CONFIG_RESET_BUTTON_LABEL "reset" -+#endif - - DECLARE_GLOBAL_DATA_PTR; - -@@ -17,6 +28,25 @@ int board_init(void) - return 0; - } - -+int board_late_init(void) -+{ -+ struct udevice *dev; -+ -+ if (!button_get_by_label(CONFIG_RESET_BUTTON_LABEL, &dev)) { -+ puts("reset button found\n"); -+#ifdef CONFIG_RESET_BUTTON_SETTLE_DELAY -+ mdelay(CONFIG_RESET_BUTTON_SETTLE_DELAY); -+#endif -+ if (button_get_state(dev) == BUTTON_ON) { -+ puts("button pushed, resetting environment\n"); -+ gd->env_valid = ENV_INVALID; -+ } -+ } -+ -+ env_relocate(); -+ return 0; -+} -+ - #ifdef CONFIG_MMC - int mmc_get_boot_dev(void) - { ---- a/board/mediatek/mt7623/Kconfig -+++ b/board/mediatek/mt7623/Kconfig -@@ -10,4 +10,8 @@ config MTK_BROM_HEADER_INFO - string - default "lk=1" - -+config RESET_BUTTON_LABEL -+ string "Button to trigger factory reset" -+ default "reset" -+ - endif diff --git a/package/boot/uboot-mediatek/patches/401-update-u7623-defconfig.patch b/package/boot/uboot-mediatek/patches/401-update-u7623-defconfig.patch index 89208b4723..ac870b8614 100644 --- a/package/boot/uboot-mediatek/patches/401-update-u7623-defconfig.patch +++ b/package/boot/uboot-mediatek/patches/401-update-u7623-defconfig.patch @@ -1,15 +1,202 @@ --- a/configs/mt7623a_unielec_u7623_02_defconfig +++ b/configs/mt7623a_unielec_u7623_02_defconfig -@@ -51,3 +51,12 @@ CONFIG_TIMER=y - CONFIG_MTK_TIMER=y - CONFIG_WDT_MTK=y - CONFIG_LZMA=y +@@ -4,51 +4,135 @@ CONFIG_ARCH_MEDIATEK=y + CONFIG_SYS_TEXT_BASE=0x81e00000 + CONFIG_SYS_MALLOC_F_LEN=0x4000 + CONFIG_NR_DRAM_BANKS=1 +-CONFIG_ENV_SIZE=0x1000 ++CONFIG_ENV_SIZE=0x10000 + CONFIG_ENV_OFFSET=0x100000 + CONFIG_DEFAULT_DEVICE_TREE="mt7623a-unielec-u7623-02-emmc" ++CONFIG_USE_DEFAULT_ENV_FILE=y + CONFIG_TARGET_MT7623=y + CONFIG_DISTRO_DEFAULTS=y + CONFIG_SYS_LOAD_ADDR=0x84000000 + CONFIG_FIT=y +-CONFIG_FIT_VERBOSE=y ++CONFIG_FIT_ENABLE_SHA256_SUPPORT=y ++CONFIG_LED=y ++CONFIG_LED_BLINK=y ++CONFIG_LED_GPIO=y ++CONFIG_LOGLEVEL=7 ++CONFIG_LOG=y ++CONFIG_AUTOBOOT_KEYED=y ++CONFIG_AUTOBOOT_MENU_SHOW=y ++CONFIG_BOARD_LATE_INIT=y + CONFIG_BOOTDELAY=3 ++CONFIG_BOOTP_SEND_HOSTNAME=y + CONFIG_DEFAULT_FDT_FILE="mt7623a-unielec-u7623-02-emmc.dtb" + CONFIG_SYS_CONSOLE_IS_IN_ENV=y ++CONFIG_DEFAULT_ENV_FILE="unielec_u7623-02_env" ++CONFIG_BUTTON=y ++CONFIG_BUTTON_GPIO=y ++CONFIG_RESET_BUTTON_LABEL="factory" ++CONFIG_CFB_CONSOLE_ANSI=y ++CONFIG_CMD_ENV_FLAGS=y + # CONFIG_DISPLAY_BOARDINFO is not set +-CONFIG_SYS_PROMPT="U-Boot> " ++CONFIG_SYS_PROMPT="MT7623> " + CONFIG_CMD_BOOTMENU=y ++CONFIG_CMD_BOOTP=y +CONFIG_CMD_BOOTZ=y -+CONFIG_OF_LIBFDT_OVERLAY=y -+#enables savenenv-command -+CONFIG_ENV_IS_IN_FAT=y -+CONFIG_ENV_FAT_INTERFACE="mmc" -+CONFIG_ENV_FAT_DEVICE_AND_PART="0:2" -+CONFIG_ENV_FAT_FILE="uboot.env" ++CONFIG_CMD_BUTTON=y ++CONFIG_CMD_CACHE=y ++CONFIG_CMD_CDP=y ++CONFIG_CMD_DHCP=y ++CONFIG_CMD_DM=y ++CONFIG_CMD_DNS=y ++CONFIG_CMD_ECHO=y ++CONFIG_CMD_ENV_READMEM=y ++CONFIG_CMD_ERASEENV=y ++CONFIG_CMD_EXT4=y ++CONFIG_CMD_FAT=y ++CONFIG_CMD_FS_GENERIC=y ++CONFIG_CMD_FS_UUID=y + # CONFIG_CMD_ELF is not set + # CONFIG_CMD_XIMG is not set + CONFIG_CMD_GPIO=y +-CONFIG_CMD_GPT=y ++# CONFIG_CMD_GPT is not set ++CONFIG_CMD_HASH=y ++CONFIG_CMD_ITEST=y ++CONFIG_CMD_LED=y ++CONFIG_CMD_LICENSE=y ++CONFIG_CMD_LINK_LOCAL=y ++CONFIG_CMD_MBR=y + CONFIG_CMD_MMC=y +-CONFIG_CMD_READ=y +-# CONFIG_CMD_SETEXPR is not set + # CONFIG_CMD_NFS is not set +-CONFIG_ENV_IS_IN_MMC=y ++CONFIG_CMD_PCI=y ++CONFIG_CMD_SF_TEST=y ++CONFIG_CMD_PING=y ++CONFIG_CMD_PXE=y ++CONFIG_CMD_PWM=y ++CONFIG_CMD_SMC=y ++CONFIG_CMD_TFTPBOOT=y ++CONFIG_CMD_TFTPSRV=y +CONFIG_CMD_ASKENV=y ++CONFIG_CMD_PART=y ++CONFIG_CMD_RARP=y ++CONFIG_CMD_SATA=y +CONFIG_CMD_SETEXPR=y ++CONFIG_CMD_SLEEP=y ++CONFIG_CMD_SNTP=y ++CONFIG_CMD_SOURCE=y ++CONFIG_CMD_STRINGS=y ++CONFIG_CMD_USB=y ++CONFIG_CMD_UUID=y ++CONFIG_CMD_READ=y ++CONFIG_CMD_SCSI=y ++CONFIG_DISPLAY_CPUINFO=y ++CONFIG_DM_ETH=y ++CONFIG_DM_GPIO=y ++CONFIG_DM_SCSI=y ++CONFIG_DM_MMC=y ++CONFIG_DM_MTD=y ++CONFIG_DM_REGULATOR=y ++CONFIG_DM_REGULATOR_FIXED=y ++CONFIG_DM_SERIAL=y ++CONFIG_DM_REGULATOR_GPIO=y ++CONFIG_DM_USB=y ++CONFIG_DM_PCI=y ++CONFIG_DM_PWM=y ++CONFIG_AHCI=y ++CONFIG_AHCI_PCI=y ++CONFIG_SCSI_AHCI=y ++CONFIG_SCSI=y ++CONFIG_PWM_MTK=y ++CONFIG_HUSH_PARSER=y + CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_SYS_MMC_ENV_DEV=0 ++CONFIG_ENV_OVERWRITE=y ++CONFIG_ENV_IS_IN_MMC=y + CONFIG_NET_RANDOM_ETHADDR=y ++CONFIG_NETCONSOLE=y + CONFIG_REGMAP=y + CONFIG_SYSCON=y + CONFIG_CLK=y ++CONFIG_LZMA=y ++CONFIG_MEDIATEK_ETH=y + # CONFIG_MMC_QUIRKS is not set + CONFIG_SUPPORT_EMMC_BOOT=y + CONFIG_MMC_HS400_SUPPORT=y + CONFIG_MMC_MTK=y ++CONFIG_MTK_POWER_DOMAIN=y ++CONFIG_MTK_SERIAL=y ++CONFIG_MTK_TIMER=y ++CONFIG_OF_LIBFDT_OVERLAY=y ++CONFIG_PARTITION_UUIDS=y ++CONFIG_PCI=y ++CONFIG_PCIE_MEDIATEK=y ++CONFIG_PHY=y + CONFIG_PHY_FIXED=y +-CONFIG_DM_ETH=y +-CONFIG_MEDIATEK_ETH=y + CONFIG_PINCTRL=y + CONFIG_PINCONF=y + CONFIG_PINCTRL_MT7623=y + CONFIG_POWER_DOMAIN=y +-CONFIG_MTK_POWER_DOMAIN=y +-CONFIG_DM_SERIAL=y +-CONFIG_MTK_SERIAL=y ++CONFIG_RANDOM_UUID=y ++CONFIG_REGEX=y + CONFIG_SYSRESET=y + CONFIG_SYSRESET_WATCHDOG=y + CONFIG_TIMER=y +-CONFIG_MTK_TIMER=y ++CONFIG_VERSION_VARIABLE=y + CONFIG_WDT_MTK=y +-CONFIG_LZMA=y +--- /dev/null ++++ b/unielec_u7623-02_env +@@ -0,0 +1,47 @@ ++ipaddr=192.168.1.1 ++serverip=192.168.1.254 ++loadaddr=0x88000000 ++dtaddr=0x83f00000 ++console=earlycon=uart8250,mmio32,0x11004000 console=ttyS0,115200 ++initrd_high=0xafffffff ++part_default=3 ++part_recovery=2 ++bootcmd=run boot_mmc ++bootdelay=0 ++bootfile=openwrt-mediatek-mt7623-unielec_u7623-02-initramfs-recovery.itb ++bootfile_upg=openwrt-mediatek-mt7623-unielec_u7623-02-squashfs-sysupgrade.itb ++bootled_rec=u7623-01:green:led3 ++bootmenu_confirm_return=askenv - Press ENTER to return to menu ; bootmenu 60 ++bootmenu_default=0 ++bootmenu_delay=0 ++bootmenu_title= ( ( ( OpenWrt ) ) ) ++bootmenu_0=Initialize environment.=run _firstboot ++bootmenu_0d=Run default boot command.=run boot_default ++bootmenu_1=Boot system via TFTP.=run boot_tftp ; run bootmenu_confirm_return ++bootmenu_2=Boot production system from eMMC.=run boot_production ; run bootmenu_confirm_return ++bootmenu_3=Boot recovery system from eMMC.=run boot_recovery ; run bootmenu_confirm_return ++bootmenu_4=Load production system via TFTP then write to eMMC.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_production ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return ++bootmenu_5=Load recovery system via TFTP then write to eMMC.=setenv noboot 1 ; setenv replacevol 1 ; run boot_tftp_recovery ; setenv noboot ; setenv replacevol ; run bootmenu_confirm_return ++bootmenu_6=Reboot.=reset ++bootmenu_7=Reset all settings to factory defaults.=run reset_factory ; reset ++boot_default=if env exists flag_recover ; then else run bootcmd ; fi ; run boot_recovery ; setenv replacevol 1 ; run boot_tftp_forever ++boot_first=if button factory ; then led $bootled_rec on ; run boot_tftp_recovery ; setenv flag_recover 1 ; run boot_default ; fi ; bootmenu ++boot_production=run emmc_read_production && bootm $loadaddr ++boot_recovery=run emmc_read_recovery && bootm $loadaddr ++boot_tftp_forever=led bpi-r64:pio:blue on ; while true ; do run boot_tftp_recovery ; sleep 1 ; done ++boot_tftp_production=tftpboot $loadaddr $bootfile_upg && env exists replacevol && iminfo $loadaddr && run emmc_write_production ; if env exists noboot ; then else bootm $loadaddr ; fi ++boot_tftp_recovery=tftpboot $loadaddr $bootfile && env exists replacevol && iminfo $loadaddr && run emmc_write_recovery ; if env exists noboot ; then else bootm $loadaddr ; fi ++boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr ++boot_mmc=run boot_production ; run boot_recovery ++emmc_write_production=mmc dev 0 0 ; iminfo $loadaddr && part start mmc 0 $part_default part_addr && part size mmc 0 $part_default part_size && run mmc_write_vol ++emmc_write_recovery=mmc dev 0 0 ; iminfo $loadaddr && part start mmc 0 $part_recovery part_addr && part size mmc 0 $part_recovery part_size && run mmc_write_vol ++emmc_read_production=mmc dev 0 0 ; part start mmc 0 $part_default part_addr && part size mmc 0 $part_default part_size && run mmc_read_vol ++emmc_read_recovery=mmc dev 0 0 ; part start mmc 0 $part_recovery part_addr && part size mmc 0 $part_recovery part_size && run mmc_read_vol ++mmc_write_vol=imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc erase 0x$part_addr 0x$part_size && mmc write $loadaddr 0x$part_addr 0x$image_size ++mmc_read_vol=mmc read $loadaddr $part_addr 0x8 && imszb $loadaddr image_size && test 0x$image_size -le 0x$part_size && mmc read $loadaddr 0x$part_addr 0x$image_size && setexpr filesize $image_size * 0x200 ++reset_factory=eraseenv && reset ++_init_env=setenv _init_env ; saveenv ; saveenv ++_firstboot=setenv _firstboot ; run _switch_to_menu _update_bootdev _init_env boot_first ++_update_bootdev=setenv _update_bootdev ; setenv bootargs "$console root=/dev/mmcblk0p65" ++_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title ++_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver" diff --git a/package/boot/uboot-mediatek/patches/404-add-bananapi_bpi-r64_defconfigs.patch b/package/boot/uboot-mediatek/patches/404-add-bananapi_bpi-r64_defconfigs.patch index 9e694c9c8b..5ce3a7cd2a 100644 --- a/package/boot/uboot-mediatek/patches/404-add-bananapi_bpi-r64_defconfigs.patch +++ b/package/boot/uboot-mediatek/patches/404-add-bananapi_bpi-r64_defconfigs.patch @@ -1,12 +1,13 @@ --- /dev/null +++ b/configs/mt7622_bananapi_bpi-r64-sdmmc_defconfig -@@ -0,0 +1,158 @@ +@@ -0,0 +1,159 @@ +CONFIG_ARM=y +CONFIG_POSITION_INDEPENDENT=y +CONFIG_ARCH_MEDIATEK=y +CONFIG_TARGET_MT7622=y +CONFIG_SYS_TEXT_BASE=0x41e00000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 ++CONFIG_SYS_LOAD_ADDR=0x40080000 +CONFIG_USE_DEFAULT_ENV_FILE=y +CONFIG_BOARD_LATE_INIT=y +CONFIG_BOOTP_SEND_HOSTNAME=y @@ -246,13 +247,14 @@ +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver" --- /dev/null +++ b/configs/mt7622_bananapi_bpi-r64-emmc_defconfig -@@ -0,0 +1,145 @@ +@@ -0,0 +1,146 @@ +CONFIG_ARM=y +CONFIG_POSITION_INDEPENDENT=y +CONFIG_ARCH_MEDIATEK=y +CONFIG_TARGET_MT7622=y +CONFIG_SYS_TEXT_BASE=0x41e00000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 ++CONFIG_SYS_LOAD_ADDR=0x40080000 +CONFIG_USE_DEFAULT_ENV_FILE=y +CONFIG_BOARD_LATE_INIT=y +CONFIG_BOOTP_SEND_HOSTNAME=y @@ -453,12 +455,13 @@ +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver" --- /dev/null +++ b/configs/mt7622_bananapi_bpi-r64-snand_defconfig -@@ -0,0 +1,139 @@ +@@ -0,0 +1,140 @@ +CONFIG_ARM=y +CONFIG_POSITION_INDEPENDENT=y +CONFIG_ARCH_MEDIATEK=y +CONFIG_SYS_TEXT_BASE=0x41e00000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 ++CONFIG_SYS_LOAD_ADDR=0x40080000 +CONFIG_USE_DEFAULT_ENV_FILE=y +CONFIG_BOARD_LATE_INIT=y +CONFIG_BOOTP_SEND_HOSTNAME=y diff --git a/package/boot/uboot-mediatek/patches/410-add-linksys-e8450.patch b/package/boot/uboot-mediatek/patches/410-add-linksys-e8450.patch index 04646d7625..fde679f386 100644 --- a/package/boot/uboot-mediatek/patches/410-add-linksys-e8450.patch +++ b/package/boot/uboot-mediatek/patches/410-add-linksys-e8450.patch @@ -1,12 +1,13 @@ --- /dev/null +++ b/configs/mt7622_linksys_e8450_defconfig -@@ -0,0 +1,135 @@ +@@ -0,0 +1,136 @@ +CONFIG_ARM=y +CONFIG_POSITION_INDEPENDENT=y +CONFIG_ARCH_MEDIATEK=y +CONFIG_TARGET_MT7622=y +CONFIG_SYS_TEXT_BASE=0x41e00000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 ++CONFIG_SYS_LOAD_ADDR=0x40080000 +CONFIG_USE_DEFAULT_ENV_FILE=y +CONFIG_BOARD_LATE_INIT=y +CONFIG_BOOTP_SEND_HOSTNAME=y @@ -336,7 +337,7 @@ +}; --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -1104,6 +1104,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ +@@ -1133,6 +1133,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt7622-rfb.dtb \ mt7623a-unielec-u7623-02-emmc.dtb \ mt7622-bananapi-bpi-r64.dtb \ diff --git a/package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch b/package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch index 6cb0a26c7f..09a727422a 100644 --- a/package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch +++ b/package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch @@ -1,12 +1,13 @@ --- /dev/null +++ b/configs/mt7622_ubnt_unifi-6-lr_defconfig -@@ -0,0 +1,140 @@ +@@ -0,0 +1,141 @@ +CONFIG_ARM=y +CONFIG_POSITION_INDEPENDENT=y +CONFIG_ARCH_MEDIATEK=y +CONFIG_TARGET_MT7622=y +CONFIG_SYS_TEXT_BASE=0x41e00000 +CONFIG_SYS_MALLOC_F_LEN=0x4000 ++CONFIG_SYS_LOAD_ADDR=0x40080000 +CONFIG_USE_DEFAULT_ENV_FILE=y +CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:128k(bl2),640k(fip),64k(u-boot-env),256k(factory),64k(eeprom),15232k(recovery),-(firmware)" +CONFIG_ENV_IS_IN_MTD=y @@ -348,7 +349,7 @@ +}; --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -1105,6 +1105,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ +@@ -1134,6 +1134,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt7623a-unielec-u7623-02-emmc.dtb \ mt7622-bananapi-bpi-r64.dtb \ mt7622-linksys-e8450-ubi.dtb \ @@ -411,7 +412,7 @@ +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver" --- a/common/board_r.c +++ b/common/board_r.c -@@ -77,6 +77,7 @@ +@@ -78,6 +78,7 @@ #ifdef CONFIG_EFI_SETUP_EARLY #include #endif @@ -419,7 +420,7 @@ DECLARE_GLOBAL_DATA_PTR; -@@ -416,6 +417,21 @@ static int initr_onenand(void) +@@ -417,6 +418,21 @@ static int initr_onenand(void) } #endif diff --git a/package/boot/uboot-mediatek/patches/500-board-mt7623-fix-mmc-detect.patch b/package/boot/uboot-mediatek/patches/500-board-mt7623-fix-mmc-detect.patch new file mode 100644 index 0000000000..2f0ed85e53 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/500-board-mt7623-fix-mmc-detect.patch @@ -0,0 +1,21 @@ +--- a/board/mediatek/mt7623/mt7623_rfb.c ++++ b/board/mediatek/mt7623/mt7623_rfb.c +@@ -9,6 +9,7 @@ + #include + #include + #include ++#include + #include + #include + +@@ -31,8 +32,9 @@ int mmc_get_boot_dev(void) + { + int g_mmc_devid = -1; + char *uflag = (char *)0x81DFFFF0; ++ struct blk_desc *desc; + +- if (!find_mmc_device(1)) ++ if (blk_get_device_by_str("mmc", "1", &desc) < 0) + return 0; + + if (strncmp(uflag,"eMMC",4)==0) { diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile index b1e6541e61..5d8c04b7d8 100644 --- a/package/firmware/ipq-wifi/Makefile +++ b/package/firmware/ipq-wifi/Makefile @@ -27,6 +27,7 @@ endef ALLWIFIBOARDS:= \ 8dev_habanero-dvk \ aruba_ap-303 \ + asus_rt-ac42u \ avm_fritzrepeater-1200 \ buffalo_wtr-m2133hp \ cellc_rtl30vw \ @@ -116,6 +117,7 @@ endef $(eval $(call generate-ipq-wifi-package,8dev_habanero-dvk,8devices Habanero DVK)) $(eval $(call generate-ipq-wifi-package,aruba_ap-303,Aruba AP-303)) +$(eval $(call generate-ipq-wifi-package,asus_rt-ac42u,ASUS RT-AC42U)) $(eval $(call generate-ipq-wifi-package,avm_fritzrepeater-1200,AVM FRITZRepeater 1200)) $(eval $(call generate-ipq-wifi-package,buffalo_wtr-m2133hp,Buffalo WTR-M2133HP)) $(eval $(call generate-ipq-wifi-package,cellc_rtl30vw, Cell C RTL30VW)) diff --git a/package/firmware/ipq-wifi/board-asus_rt-ac42u.qca4019 b/package/firmware/ipq-wifi/board-asus_rt-ac42u.qca4019 new file mode 100644 index 0000000000..cf6b9e0538 Binary files /dev/null and b/package/firmware/ipq-wifi/board-asus_rt-ac42u.qca4019 differ diff --git a/package/firmware/ipq-wifi/board-asus_rt-ac42u.qca9984 b/package/firmware/ipq-wifi/board-asus_rt-ac42u.qca9984 new file mode 100644 index 0000000000..ea123a3a63 Binary files /dev/null and b/package/firmware/ipq-wifi/board-asus_rt-ac42u.qca9984 differ diff --git a/package/kernel/lantiq/ltq-vdsl-mei/patches/030-no-static-linking.patch b/package/kernel/lantiq/ltq-vdsl-mei/patches/030-no-static-linking.patch new file mode 100644 index 0000000000..8d4fca1eb1 --- /dev/null +++ b/package/kernel/lantiq/ltq-vdsl-mei/patches/030-no-static-linking.patch @@ -0,0 +1,47 @@ +This removes -static compile option. The -static option tells GCC to +link this statically with the libc, which we do not want in OpenWrt. We +want to link everything dynamically to the libc. This fixes a compile +problem with glibc. + +--- a/src/Makefile.am ++++ b/src/Makefile.am +@@ -198,10 +198,10 @@ AM_CFLAGS = -Wall -Wimplicit -Wunused -W + + if IFXOS_ENABLE + AM_LDFLAGS= \ +- -Bstatic -dn -static @IFXOS_LIBRARY_PATH@ ++ -Bstatic -dn @IFXOS_LIBRARY_PATH@ + else + AM_LDFLAGS= \ +- -Bstatic -dn -static ++ -Bstatic -dn + endif + + # +@@ -304,7 +304,7 @@ mei_cpe_appl_ldflags= $(ADD_APPL_LDFLAGS + else + if TARGET_ADM5120_MIPSEL + mei_cpe_appl_cflags = -O1 -g +-mei_cpe_appl_ldflags = -static ++mei_cpe_appl_ldflags = + else + mei_cpe_appl_cflags = -DPPC + endif +@@ -318,7 +318,7 @@ mei_cpe_drv_test_CPPFLAGS = -I@srcdir@\ + mei_cpe_drv_test_CFLAGS = $(mei_cpe_app_common_cflags) \ + $(mei_cpe_appl_cflags) $(MEI_DRV_TARGET_OPTIONS) + +-mei_cpe_drv_test_LDFLAGS = $(mei_cpe_appl_ldflags) -Bstatic -dn -static @IFXOS_LIBRARY_PATH@ ++mei_cpe_drv_test_LDFLAGS = $(mei_cpe_appl_ldflags) -Bstatic -dn @IFXOS_LIBRARY_PATH@ + + mei_cpe_drv_test_LDADD = -lifxos + endif +@@ -333,7 +333,7 @@ mei_cpe_drv_dbg_strm_dmp_CPPFLAGS = -I@s + -I@KERNEL_INCL_PATH@ $(IFXOS_INCLUDE_PATH) + mei_cpe_drv_dbg_strm_dmp_CFLAGS = $(mei_cpe_app_common_cflags) \ + $(mei_cpe_appl_cflags) $(MEI_DRV_TARGET_OPTIONS) +-mei_cpe_drv_dbg_strm_dmp_LDFLAGS = $(mei_cpe_appl_ldflags) -Bstatic -dn -static @IFXOS_LIBRARY_PATH@ ++mei_cpe_drv_dbg_strm_dmp_LDFLAGS = $(mei_cpe_appl_ldflags) -Bstatic -dn @IFXOS_LIBRARY_PATH@ + mei_cpe_drv_dbg_strm_dmp_LDADD = -lifxos + + # linux 2.6 kernel object - dummy to force dependencies diff --git a/package/kernel/linux/modules/hwmon.mk b/package/kernel/linux/modules/hwmon.mk index 226ecec31d..943b87cd4c 100644 --- a/package/kernel/linux/modules/hwmon.mk +++ b/package/kernel/linux/modules/hwmon.mk @@ -348,6 +348,21 @@ endef $(eval $(call KernelPackage,hwmon-nct6775)) +define KernelPackage/hwmon-nct7802 + TITLE:=NCT7802Y and compatibles monitoring support + KCONFIG:=CONFIG_SENSORS_NCT7802 + FILES:=$(LINUX_DIR)/drivers/hwmon/nct7802.ko + AUTOLOAD:=$(call AutoProbe,nct7802) + $(call AddDepends/hwmon,+kmod-regmap-i2c) +endef + +define KernelPackage/hwmon-nct7802/description + Kernel module for NCT7802Y thermal monitor chip +endef + +$(eval $(call KernelPackage,hwmon-nct7802)) + + define KernelPackage/hwmon-pc87360 TITLE:=PC87360 monitoring support KCONFIG:=CONFIG_SENSORS_PC87360 diff --git a/package/kernel/linux/modules/usb.mk b/package/kernel/linux/modules/usb.mk index 6c815cdd76..6fec50b185 100644 --- a/package/kernel/linux/modules/usb.mk +++ b/package/kernel/linux/modules/usb.mk @@ -1713,7 +1713,8 @@ define KernelPackage/usb3 +TARGET_bcm53xx:kmod-usb-bcma \ +TARGET_bcm53xx:kmod-phy-bcm-ns-usb3 \ +TARGET_ramips_mt7621:kmod-usb-xhci-mtk \ - +(TARGET_apm821xx_nand&&LINUX_5_10):kmod-usb-xhci-pci-renesas + +(TARGET_apm821xx_nand&&LINUX_5_10):kmod-usb-xhci-pci-renesas \ + +TARGET_mvebu_cortexa9:kmod-usb-xhci-pci-renesas KCONFIG:= \ CONFIG_USB_PCI=y \ CONFIG_USB_XHCI_PCI \ diff --git a/package/libs/ustream-ssl/Makefile b/package/libs/ustream-ssl/Makefile index f762c89d29..7d9e830381 100644 --- a/package/libs/ustream-ssl/Makefile +++ b/package/libs/ustream-ssl/Makefile @@ -1,13 +1,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ustream-ssl -PKG_RELEASE:=2 +PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/ustream-ssl.git -PKG_SOURCE_DATE:=2020-12-10 -PKG_SOURCE_VERSION:=68d09243b6fd4473004b27ff6483352e76e6af1a -PKG_MIRROR_HASH:=a620090dee08c0624d167c10e9e45d54aa2b953a1f356eff7325a8fe53c622e6 +PKG_SOURCE_DATE:=2022-01-16 +PKG_SOURCE_VERSION:=868fd8812f477c110f9c6c5252c0bd172167b94c +PKG_MIRROR_HASH:=dd28d5e846b391917cf83d66176653bdfa4e8a0d5b11144b65a012fe7693ddeb CMAKE_INSTALL:=1 PKG_LICENSE:=ISC diff --git a/package/network/config/ipip/Makefile b/package/network/config/ipip/Makefile index c262182558..4494e1b81f 100644 --- a/package/network/config/ipip/Makefile +++ b/package/network/config/ipip/Makefile @@ -8,7 +8,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ipip -PKG_RELEASE:=3 +PKG_RELEASE:=4 PKG_LICENSE:=GPL-2.0 include $(INCLUDE_DIR)/package.mk diff --git a/package/network/config/ipip/files/ipip.sh b/package/network/config/ipip/files/ipip.sh index 15b1c978e3..c433ee0de4 100755 --- a/package/network/config/ipip/files/ipip.sh +++ b/package/network/config/ipip/files/ipip.sh @@ -12,7 +12,7 @@ proto_ipip_setup() { local remoteip local df ipaddr peeraddr tunlink ttl tos zone mtu - json_get_vars df ipaddr peeraddr tunlink ttl tos zone mtu + json_get_vars df ipaddr peeraddr tunlink ttl tos zone mtu nohostroute [ -z "$peeraddr" ] && { proto_notify_error "$cfg" "MISSING_PEER_ADDRESS" @@ -32,7 +32,9 @@ proto_ipip_setup() { break done - ( proto_add_host_dependency "$cfg" "$peeraddr" "$tunlink" ) + if [ "${nohostroute}" != "1" ]; then + ( proto_add_host_dependency "$cfg" "$peeraddr" "$tunlink" ) + fi [ -z "$ipaddr" ] && { local wanif="$tunlink" @@ -84,6 +86,7 @@ proto_ipip_init_config() { proto_config_add_string "ipaddr" proto_config_add_string "peeraddr" proto_config_add_boolean "df" + proto_config_add_boolean "nohostroute" } [ -n "$INCLUDE_ONLY" ] || { diff --git a/package/network/config/netifd/Makefile b/package/network/config/netifd/Makefile index 0969c7718f..a93a2b0f72 100644 --- a/package/network/config/netifd/Makefile +++ b/package/network/config/netifd/Makefile @@ -5,9 +5,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/netifd.git -PKG_SOURCE_DATE:=2022-01-14 -PKG_SOURCE_VERSION:=3043206e94da412eb19dd72ea68edcaca545d84c -PKG_MIRROR_HASH:=2bf5a59e93968b00f69b8b7ebbdfd28353c36bc5e7f72225d725c24d0ac7265f +PKG_SOURCE_DATE:=2022-01-22 +PKG_SOURCE_VERSION:=ed7187684685430ee6de49e551775badbee39761 +PKG_MIRROR_HASH:=f26e968c79e61b1a4495b29f51e4adfb2238ede16c0d7349cce38ac009b72969 PKG_MAINTAINER:=Felix Fietkau PKG_LICENSE:=GPL-2.0 diff --git a/package/utils/mtd-utils/Makefile b/package/utils/mtd-utils/Makefile index 5a4b03da96..74380022a5 100644 --- a/package/utils/mtd-utils/Makefile +++ b/package/utils/mtd-utils/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=mtd-utils -PKG_VERSION:=2.1.2 +PKG_VERSION:=2.1.4 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 -PKG_SOURCE_URL:=ftp://ftp.infradead.org/pub/mtd-utils/ -PKG_HASH:=8ad4c5f34716d40646aa28724a2f5616d325a6f119254f914e26976f1f76e9d6 +PKG_SOURCE_URL:=https://infraroot.at/pub/mtd/ +PKG_HASH:=2c6711d15d282c47cb3867b6857340597e26d332c238465134c602e5eef71b99 PKG_INSTALL:=1 PKG_FIXUP:=autoreconf diff --git a/package/utils/mtd-utils/patches/130-lzma_jffs2.patch b/package/utils/mtd-utils/patches/130-lzma_jffs2.patch index 9778aa6d0a..55930ddc86 100644 --- a/package/utils/mtd-utils/patches/130-lzma_jffs2.patch +++ b/package/utils/mtd-utils/patches/130-lzma_jffs2.patch @@ -1,6 +1,6 @@ --- a/jffsX-utils/Makemodule.am +++ b/jffsX-utils/Makemodule.am -@@ -4,11 +4,19 @@ mkfs_jffs2_SOURCES = \ +@@ -4,7 +4,10 @@ mkfs_jffs2_SOURCES = \ jffsX-utils/compr_zlib.c \ jffsX-utils/compr.h \ jffsX-utils/rbtree.c \ @@ -10,7 +10,12 @@ + jffsX-utils/lzma/LzmaEnc.c \ + jffsX-utils/lzma/LzmaDec.c \ jffsX-utils/compr.c \ - jffsX-utils/compr_rtime.c + jffsX-utils/compr_rtime.c \ + jffsX-utils/compr.h \ +@@ -12,8 +15,13 @@ mkfs_jffs2_SOURCES = \ + jffsX-utils/summary.h \ + include/linux/jffs2.h \ + include/mtd/jffs2-user.h + +if !WITHOUT_LZO +mkfs_jffs2_SOURCES += jffsX-utils/compr_lzo.c @@ -20,7 +25,7 @@ -mkfs_jffs2_CPPFLAGS = $(AM_CPPFLAGS) $(ZLIB_CFLAGS) $(LZO_CFLAGS) +mkfs_jffs2_CPPFLAGS = $(AM_CPPFLAGS) $(ZLIB_CFLAGS) $(LZO_CFLAGS) -I./include/linux/lzma - jffs2reader_SOURCES = jffsX-utils/jffs2reader.c + jffs2reader_SOURCES = jffsX-utils/jffs2reader.c include/mtd/jffs2-user.h jffs2reader_LDADD = libmtd.a $(ZLIB_LIBS) $(LZO_LIBS) --- a/jffsX-utils/compr.c +++ b/jffsX-utils/compr.c diff --git a/package/utils/ucode/Makefile b/package/utils/ucode/Makefile index 2c11fe05be..beafb94bb4 100644 --- a/package/utils/ucode/Makefile +++ b/package/utils/ucode/Makefile @@ -8,7 +8,7 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ucode -PKG_RELEASE:=1 +PKG_RELEASE:=2 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=https://github.com/jow-/ucode.git diff --git a/package/utils/ucode/patches/100-fix-int-format-on-32bit-system.patch b/package/utils/ucode/patches/100-fix-int-format-on-32bit-system.patch new file mode 100644 index 0000000000..c557d0c1bd --- /dev/null +++ b/package/utils/ucode/patches/100-fix-int-format-on-32bit-system.patch @@ -0,0 +1,11 @@ +--- a/lib.c ++++ b/lib.c +@@ -1438,7 +1438,7 @@ uc_printf_common(uc_vm_t *vm, size_t nar + + switch (t) { + case UC_INTEGER: +- ucv_stringbuf_printf(buf, sfmt, arg.n); ++ ucv_stringbuf_printf(buf, sfmt, (int)arg.n); + break; + + case UC_DOUBLE: diff --git a/package/utils/util-linux/Makefile b/package/utils/util-linux/Makefile index 74f3f17469..ded653e2c0 100644 --- a/package/utils/util-linux/Makefile +++ b/package/utils/util-linux/Makefile @@ -443,6 +443,15 @@ define Package/swap-utils/description contains: mkswap, swaplabel endef +define Package/taskset +$(call Package/util-linux/Default) + TITLE:=set or retrieve a process's CPU affinity +endef + +define Package/taskset/description + contains: taskset +endef + define Package/unshare $(call Package/util-linux/Default) TITLE:=unshare userspace tool @@ -761,6 +770,11 @@ define Package/swap-utils/install $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/swaplabel $(1)/usr/sbin/ endef +define Package/taskset/install + $(INSTALL_DIR) $(1)/usr/bin + $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/taskset $(1)/usr/bin/ +endef + define Package/unshare/install $(INSTALL_DIR) $(1)/usr/bin $(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/bin/unshare $(1)/usr/bin/ @@ -829,6 +843,7 @@ $(eval $(call BuildPackage,script-utils)) $(eval $(call BuildPackage,setterm)) $(eval $(call BuildPackage,sfdisk)) $(eval $(call BuildPackage,swap-utils)) +$(eval $(call BuildPackage,taskset)) $(eval $(call BuildPackage,unshare)) $(eval $(call BuildPackage,uuidd)) $(eval $(call BuildPackage,uuidgen)) diff --git a/rules.mk b/rules.mk index 45b58614f1..57c3bca7d9 100644 --- a/rules.mk +++ b/rules.mk @@ -240,6 +240,7 @@ export PKG_CONFIG HOSTCC:=gcc HOSTCXX:=g++ HOST_CPPFLAGS:=-I$(STAGING_DIR_HOST)/include $(if $(IS_PACKAGE_BUILD),-I$(STAGING_DIR_HOSTPKG)/include -I$(STAGING_DIR)/host/include) +HOST_CXXFLAGS:= HOST_CFLAGS:=-O2 $(HOST_CPPFLAGS) HOST_LDFLAGS:=-L$(STAGING_DIR_HOST)/lib $(if $(IS_PACKAGE_BUILD),-L$(STAGING_DIR_HOSTPKG)/lib -L$(STAGING_DIR)/host/lib) diff --git a/scripts/command_all.sh b/scripts/command_all.sh new file mode 100755 index 0000000000..452b66f092 --- /dev/null +++ b/scripts/command_all.sh @@ -0,0 +1,11 @@ +#! /bin/sh +# SPDX-License-Identifier: GPL-2.0-or-later +# Reduced version of which -a using command utility + +case $PATH in + (*[!:]:) PATH="$PATH:" ;; +esac + +for ELEMENT in $(echo $PATH | tr ":" "\n"); do + PATH=$ELEMENT command -v "$@" +done diff --git a/scripts/download.pl b/scripts/download.pl index e204d38497..64f1dcc58d 100755 --- a/scripts/download.pl +++ b/scripts/download.pl @@ -54,10 +54,8 @@ sub localmirrors { sub which($) { my $prog = shift; - my $res = `which $prog`; + my $res = `command -v $prog`; $res or return undef; - $res =~ /^no / and return undef; - $res =~ /not found/ and return undef; return $res; } diff --git a/scripts/feeds b/scripts/feeds index bbfd832c45..f63b4f0951 100755 --- a/scripts/feeds +++ b/scripts/feeds @@ -14,7 +14,7 @@ chdir $ENV{TOPDIR}; $ENV{GIT_CONFIG_PARAMETERS}="'core.autocrlf=false'"; $ENV{GREP_OPTIONS}=""; -my $mk=`which gmake 2>/dev/null`; # select the right 'make' program +my $mk=`command -v gmake 2>/dev/null`; # select the right 'make' program chomp($mk); # trim trailing newline $mk or $mk = "make"; # default to 'make' diff --git a/scripts/ubinize-image.sh b/scripts/ubinize-image.sh index 0195695240..323eae547a 100755 --- a/scripts/ubinize-image.sh +++ b/scripts/ubinize-image.sh @@ -134,7 +134,7 @@ if [ ! -r "$rootfs" -a ! -r "$kernel" -a ! "$outfile" ]; then exit 1 fi -ubinize="$( which ubinize )" +ubinize="$( command -v ubinize )" if [ ! -x "$ubinize" ]; then echo "ubinize tool not found or not usable" exit 1 diff --git a/target/linux/apm821xx/image/Makefile b/target/linux/apm821xx/image/Makefile index 2737a32436..f4701e9f26 100644 --- a/target/linux/apm821xx/image/Makefile +++ b/target/linux/apm821xx/image/Makefile @@ -28,10 +28,6 @@ define Build/boot-script $@.scr endef -define Build/copy-file - cat "$(1)" > "$@" -endef - define Build/dtb $(call Image/BuildDTB,../dts/$(DEVICE_DTS).dts,$@.dtb,,--space $(DTB_SIZE)) endef diff --git a/target/linux/at91/base-files/etc/config/firewall b/target/linux/at91/base-files/etc/config/firewall deleted file mode 100644 index f9c860e3d6..0000000000 --- a/target/linux/at91/base-files/etc/config/firewall +++ /dev/null @@ -1,6 +0,0 @@ -config defaults - option syn_flood 1 - option input ACCEPT - option output ACCEPT - option forward REJECT - diff --git a/target/linux/ath79/config-5.10 b/target/linux/ath79/config-5.10 index 12f51b08ce..53f444c68b 100644 --- a/target/linux/ath79/config-5.10 +++ b/target/linux/ath79/config-5.10 @@ -74,6 +74,7 @@ CONFIG_GPIO_74X164=y CONFIG_GPIO_ATH79=y CONFIG_GPIO_GENERIC=y # CONFIG_GPIO_LATCH is not set +# CONFIG_GPIO_RB91X_KEY is not set CONFIG_HANDLE_DOMAIN_IRQ=y CONFIG_HARDWARE_WATCHPOINTS=y CONFIG_HAS_DMA=y diff --git a/target/linux/ath79/dts/ar7240_openmesh_om2p-v1.dts b/target/linux/ath79/dts/ar7240_openmesh_om2p-v1.dts new file mode 100644 index 0000000000..456724a750 --- /dev/null +++ b/target/linux/ath79/dts/ar7240_openmesh_om2p-v1.dts @@ -0,0 +1,170 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "ar7240.dtsi" + +#include +#include + +/ { + compatible = "openmesh,om2p-v1", "qca,ar7240"; + model = "OpenMesh OM2P v1"; + + chosen { + /delete-property/ bootargs; + }; + + aliases { + led-boot = &led_power_blue; + led-failsafe = &led_power_blue; + led-running = &led_power_blue; + led-upgrade = &led_power_blue; + label-mac-device = ð0; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + pinctrl-names = "default"; + pinctrl-0 = <&switch_led_disable_pins>; + + led_power_blue: power_blue { + label = "blue:power"; + gpios = <&gpio 0 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + + wifi_green { + label = "green:wifi"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + wifi_red { + label = "red:wifi"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + + wifi_yellow { + label = "yellow:wifi"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + + lan_blue { + label = "blue:lan"; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + + wan_blue { + label = "blue:wan"; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + }; + }; + + watchdog { + compatible = "linux,wdt-gpio"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + hw_algo = "toggle"; + /* hw_margin_ms is actually 300s but driver limits it to 60s */ + hw_margin_ms = <60000>; + always-running; + }; +}; + +&spi { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + linux,mtd-name = "ar7240-nor0"; + + /* partitions are passed via bootloader */ + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x000000 0x040000>; + read-only; + }; + + partition@40000 { + label = "u-boot-env"; + reg = <0x040000 0x040000>; + }; + + partition@80000 { + label = "custom"; + reg = <0x080000 0x140000>; + read-only; + }; + + partition@1c0000 { + label = "inactive"; + reg = <0x1c0000 0x700000>; + }; + + partition@8c0000 { + label = "inactive2"; + reg = <0x8c0000 0x700000>; + }; + + art: partition@fc0000 { + label = "ART"; + reg = <0xfc0000 0x040000>; + read-only; + }; + }; + }; +}; + +ð0 { + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; +}; + +ð1 { + status = "okay"; + + nvmem-cells = <&macaddr_art_6>; + nvmem-cell-names = "mac-address"; +}; + +&pcie { + status = "okay"; + + wifi@0,0 { + compatible = "pci168c,002a"; + reg = <0x0000 0 0 0 0>; + qca,no-eeprom; + #gpio-cells = <2>; + gpio-controller; + }; +}; + +&art { + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_art_6: macaddr@6 { + reg = <0x6 0x6>; + }; +}; diff --git a/target/linux/ath79/dts/ar9342_mikrotik_routerboard-912uag-2hpnd.dts b/target/linux/ath79/dts/ar9342_mikrotik_routerboard-912uag-2hpnd.dts index 77a0d29113..b7ab1cacdb 100644 --- a/target/linux/ath79/dts/ar9342_mikrotik_routerboard-912uag-2hpnd.dts +++ b/target/linux/ath79/dts/ar9342_mikrotik_routerboard-912uag-2hpnd.dts @@ -16,6 +16,13 @@ led-upgrade = &led_power; }; + gpio_key: gpio_key { + compatible = "mikrotik,gpio-rb91x-key"; + gpio-controller; + #gpio-cells = <2>; + gpio = <&gpio 15 GPIO_ACTIVE_HIGH>; + }; + gpio_latch: gpio_latch { compatible = "gpio-latch"; gpio-controller; @@ -27,7 +34,7 @@ <0>, /* Not connected */ <&gpio 13 GPIO_ACTIVE_HIGH>, <&gpio 14 GPIO_ACTIVE_HIGH>, - <&gpio 15 GPIO_ACTIVE_HIGH>, + <&gpio_key 0 GPIO_ACTIVE_HIGH>, <&gpio 11 GPIO_ACTIVE_LOW>; /* Latch Enable */ }; @@ -40,7 +47,8 @@ <&gpio_latch 6 GPIO_ACTIVE_HIGH>, /* Command Latch Enable (CLE) */ <&gpio_latch 7 GPIO_ACTIVE_HIGH>, /* Address Latch Enable (ALE) */ <&gpio 12 GPIO_ACTIVE_LOW>, /* Read/Write Enable (nRW) */ - <&gpio_latch 8 GPIO_ACTIVE_LOW>; /* Latch Enable (nLE) */ + <&gpio_latch 8 GPIO_ACTIVE_LOW>, /* Latch Enable (nLE) */ + <&gpio_key 2 GPIO_ACTIVE_HIGH>; /* Key poll disable */ partitions { compatible = "fixed-partitions"; @@ -64,6 +72,17 @@ }; }; + keys { + compatible = "gpio-keys-polled"; + poll-interval = <20>; + + button@0 { + label = "reset"; + linux,code = ; + gpios = <&gpio_key 1 GPIO_ACTIVE_LOW>; + }; + }; + leds { compatible = "gpio-leds"; diff --git a/target/linux/ath79/dts/qca9531_glinet_gl-xe300.dts b/target/linux/ath79/dts/qca9531_glinet_gl-xe300.dts new file mode 100644 index 0000000000..59344917ad --- /dev/null +++ b/target/linux/ath79/dts/qca9531_glinet_gl-xe300.dts @@ -0,0 +1,168 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qca953x.dtsi" + +#include +#include + +/ { + compatible = "glinet,gl-xe300", "qca,qca9531"; + model = "GL.iNet GL-XE300"; + + gpio-export { + compatible = "gpio-export"; + + gpio_lte_power { + gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; + gpio-export,name = "lte_power"; + gpio-export,output = <1>; + }; + + gpio_sd_detect { + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + gpio-export,name = "sd_detect"; + gpio-export,output = <0>; + }; + }; + + keys { + compatible = "gpio-keys"; + + pinctrl-names = "default"; + pinctrl-0 = <&jtag_disable_pins>; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + lan { + gpios = <&gpio 10 GPIO_ACTIVE_LOW>; + label = "green:lan"; + }; + + wan { + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + label = "green:wan"; + }; + + wlan { + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + label = "green:wlan"; + linux,default-trigger = "phy0tpt"; + }; + + lte { + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + label = "green:lte"; + }; + }; +}; + +&pcie0 { + status = "okay"; +}; + +&usb0 { + status = "okay"; +}; + +&usb_phy { + status = "okay"; +}; + +&spi { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x40000>; + read-only; + }; + + partition@40000 { + label = "u-boot-env"; + reg = <0x40000 0x10000>; + }; + + art: partition@50000 { + label = "art"; + reg = <0x50000 0x10000>; + read-only; + }; + + partition@60000 { + label = "kernel"; + reg = <0x60000 0x400000>; + }; + + partition@460000 { + label = "nor_reserved"; + reg = <0x460000 0xba0000>; + }; + }; + }; + + flash@1 { + compatible = "spi-nand"; + reg = <1>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "ubi"; + reg = <0x0 0x8000000>; + }; + }; + }; +}; + +ð0 { + status = "okay"; + + phy-handle = <&swphy4>; + + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; + mtd-mac-address-increment = <1>; +}; + +ð1 { + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; +}; + +&wmac { + status = "okay"; + + mtd-cal-data = <&art 0x1000>; +}; + +&art { + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; +}; diff --git a/target/linux/ath79/dts/qca9558_openmesh_om5p-ac-v2.dts b/target/linux/ath79/dts/qca9558_openmesh_om5p-ac-v2.dts index b4d452dda1..91a53343ae 100644 --- a/target/linux/ath79/dts/qca9558_openmesh_om5p-ac-v2.dts +++ b/target/linux/ath79/dts/qca9558_openmesh_om5p-ac-v2.dts @@ -7,26 +7,34 @@ / { compatible = "openmesh,om5p-ac-v2", "qca,qca9558"; - model = "OpenMesh OM5P-AC V2"; + model = "OpenMesh OM5P-AC v2"; - extosc: ref { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-output-names = "ref"; - clock-frequency = <40000000>; + chosen { + /delete-property/ bootargs; + }; + + aliases { + serial0 = &uart; + led-boot = &led_power_blue; + led-failsafe = &led_power_blue; + led-running = &led_power_blue; + led-upgrade = &led_power_blue; + label-mac-device = ð0; }; leds { compatible = "gpio-leds"; - power { - label = "blue:power"; - gpios = <&gpio 14 GPIO_ACTIVE_LOW>; - }; - wifi_green { label = "green:wifi"; gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + led_power_blue: power_blue { + label = "blue:power"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + default-state = "on"; }; wifi_yellow { @@ -50,6 +58,32 @@ }; }; + i2c { + compatible = "i2c-gpio"; + gpios = <&gpio 19 GPIO_ACTIVE_HIGH /* sda */ + &gpio 18 GPIO_ACTIVE_HIGH /* scl */ + >; + #address-cells = <1>; + #size-cells = <0>; + + i2c-gpio,scl-open-drain; + i2c-gpio,sda-open-drain; + + tmp423a@4e { + compatible = "ti,tmp423"; + reg = <0x4e>; + }; + }; + + watchdog { + compatible = "linux,wdt-gpio"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + hw_algo = "toggle"; + /* hw_margin_ms is actually 300s but driver limits it to 60s */ + hw_margin_ms = <60000>; + always-running; + }; + gpio-export { compatible = "gpio-export"; #size-cells = <0>; @@ -69,11 +103,11 @@ &pinmux { pinmux_pa_dcdc_pins { - pinctrl-single,bits = <0x0 0xff00 0x0>; + pinctrl-single,bits = <0x0 0x0 0xff0000>; }; pinmux_pa_high_pins { - pinctrl-single,bits = <0x10 0xff 0x0>; + pinctrl-single,bits = <0x10 0x0 0xff>; }; }; @@ -81,10 +115,6 @@ status = "okay"; }; -&pll { - clocks = <&extosc>; -}; - &spi { status = "okay"; @@ -93,6 +123,7 @@ reg = <0>; spi-max-frequency = <25000000>; + /* partitions are passed via bootloader */ partitions { compatible = "fixed-partitions"; #address-cells = <1>; @@ -104,19 +135,29 @@ read-only; }; - partition@1 { + partition@40000 { label = "u-boot-env"; reg = <0x040000 0x010000>; }; - partition@2 { - compatible = "denx,uimage"; - label = "firmware"; + partition@50000 { + label = "custom"; + reg = <0x050000 0x060000>; + read-only; + }; + + partition@b0000 { + label = "inactive"; + reg = <0x0b0000 0x7a0000>; + }; + + partition@850000 { + label = "inactive2"; reg = <0x850000 0x7a0000>; }; - partition@3 { - label = "art"; + art: partition@ff0000 { + label = "ART"; reg = <0xff0000 0x010000>; read-only; }; @@ -127,18 +168,25 @@ &mdio0 { status = "okay"; + phy-mask = <0x10>; + phy4: ethernet-phy@4 { reg = <4>; - phy-mode = "rgmii-id"; + eee-broken-100tx; + eee-broken-1000t; }; }; &mdio1 { status = "okay"; + phy-mask = <0x2>; + phy1: ethernet-phy@1 { reg = <1>; - phy-mode = "sgmii"; + eee-broken-100tx; + eee-broken-1000t; + at803x-override-sgmii-link-check; }; }; @@ -147,7 +195,20 @@ pll-data = <0x82000101 0x80000101 0x80001313>; + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; + + phy-mode = "rgmii-id"; phy-handle = <&phy4>; + + gmac-config { + device = <&gmac>; + rgmii-enabled = <1>; + rxd-delay = <2>; + rxdv-delay = <2>; + txd-delay = <0>; + txen-delay = <0>; + }; }; ð1 { @@ -155,5 +216,33 @@ pll-data = <0x03000101 0x80000101 0x80001313>; + nvmem-cells = <&macaddr_art_6>; + nvmem-cell-names = "mac-address"; + + qca955x-sgmii-fixup; + phy-handle = <&phy1>; }; + +&wmac { + status = "okay"; + + mtd-cal-data = <&art 0x1000>; + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <2>; +}; + +&art { + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; + + macaddr_art_6: macaddr@6 { + reg = <0x6 0x6>; + }; +}; diff --git a/target/linux/ath79/dts/qca9563_asus_rp-ac66.dts b/target/linux/ath79/dts/qca9563_asus_rp-ac66.dts index b1317d55ec..39c96127e6 100644 --- a/target/linux/ath79/dts/qca9563_asus_rp-ac66.dts +++ b/target/linux/ath79/dts/qca9563_asus_rp-ac66.dts @@ -15,6 +15,7 @@ led-failsafe = &led_orange; led-running = &led_power; led-upgrade = &led_orange; + label-mac-device = ð0; }; leds { diff --git a/target/linux/ath79/files/drivers/gpio/gpio-latch.c b/target/linux/ath79/files/drivers/gpio/gpio-latch.c index f3545a663e..976e683230 100644 --- a/target/linux/ath79/files/drivers/gpio/gpio-latch.c +++ b/target/linux/ath79/files/drivers/gpio/gpio-latch.c @@ -62,7 +62,7 @@ gpio_latch_get(struct gpio_chip *gc, unsigned offset) int ret; gpio_latch_lock(glc, false); - ret = gpiod_get_value(glc->gpios[offset]); + ret = gpiod_get_raw_value_cansleep(glc->gpios[offset]); gpio_latch_unlock(glc, false); return ret; @@ -81,7 +81,7 @@ gpio_latch_set(struct gpio_chip *gc, unsigned offset, int value) } gpio_latch_lock(glc, enable_latch); - gpiod_set_raw_value(glc->gpios[offset], value); + gpiod_set_raw_value_cansleep(glc->gpios[offset], value); gpio_latch_unlock(glc, disable_latch); } @@ -133,8 +133,10 @@ static int gpio_latch_probe(struct platform_device *pdev) glc->gpios[i] = devm_gpiod_get_index_optional(dev, NULL, i, GPIOD_OUT_LOW); if (IS_ERR(glc->gpios[i])) { - dev_err(dev, "failed to get gpio %d: %d\n", i, - PTR_ERR(glc->gpios[i])); + if (PTR_ERR(glc->gpios[i]) != -EPROBE_DEFER) { + dev_err(dev, "failed to get gpio %d: %d\n", i, + PTR_ERR(glc->gpios[i])); + } return PTR_ERR(glc->gpios[i]); } } diff --git a/target/linux/ath79/files/drivers/gpio/gpio-rb91x-key.c b/target/linux/ath79/files/drivers/gpio/gpio-rb91x-key.c new file mode 100644 index 0000000000..ee8359e774 --- /dev/null +++ b/target/linux/ath79/files/drivers/gpio/gpio-rb91x-key.c @@ -0,0 +1,218 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Driver for reset key gpio line on MikroTik RB91x board series. + * This line is shared between NAND ALE (goes through a latch), + * NAND IO7 and reset key. We make 3 virtual gpio lines from the + * single physical one: + * 1) Capable output one for NAND, + * 2) Capable input one for reset key, + * 3) And capable output one, aka "key-poll-disable", + * for NAND -- to syncronise NAND operation and key polling. + * + * Copyright (C) 2021 Denis Kalashnikov + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define GPIO_RB91X_KEY_DRIVER_NAME "gpio-rb91x-key" + +enum gpio_rb91x_key_gpios { + GPIO_RB91X_KEY_NAND, + GPIO_RB91X_KEY_POLL, + GPIO_RB91X_KEY_PDIS, + + GPIO_RB91X_KEY_NGPIOS, +}; + +struct gpio_rb91x_key { + struct gpio_chip gc; + struct mutex mutex; + struct mutex poll_mutex; + int polling_disabled; + struct gpio_desc *gpio; +}; + +static inline struct gpio_rb91x_key *to_gpio_rb91x_key(struct gpio_chip *gc) +{ + return container_of(gc, struct gpio_rb91x_key, gc); +} + +static int gpio_rb91x_key_get(struct gpio_chip *gc, unsigned offset) +{ + struct gpio_rb91x_key *drvdata = to_gpio_rb91x_key(gc); + struct gpio_desc *gpio = drvdata->gpio; + int val, bak_val; + + switch (offset) { + case GPIO_RB91X_KEY_NAND: + mutex_lock(&drvdata->mutex); + val = gpiod_get_value_cansleep(gpio); + mutex_unlock(&drvdata->mutex); + break; + case GPIO_RB91X_KEY_PDIS: + mutex_lock(&drvdata->mutex); + val = drvdata->polling_disabled; + mutex_unlock(&drvdata->mutex); + break; + case GPIO_RB91X_KEY_POLL: + mutex_lock(&drvdata->poll_mutex); + mutex_lock(&drvdata->mutex); + bak_val = gpiod_get_raw_value_cansleep(gpio); + gpiod_direction_input(gpio); + /* + * Without this delay nothing works. Get it + * from mikrotik RouterOS linux kernel patches. + */ + udelay(200); + val = gpiod_get_raw_value_cansleep(gpio); + gpiod_direction_output_raw(gpio, bak_val); + mutex_unlock(&drvdata->mutex); + mutex_unlock(&drvdata->poll_mutex); + break; + default: + return -EINVAL; + } + + return val; +} + +static int gpio_rb91x_key_direction_input(struct gpio_chip *gc, unsigned offset) +{ + switch (offset) { + case GPIO_RB91X_KEY_POLL: + return 0; + default: + return -EINVAL; + } +} + +static void gpio_rb91x_key_set(struct gpio_chip *gc, unsigned offset, int value) +{ + struct gpio_rb91x_key *drvdata = to_gpio_rb91x_key(gc); + struct gpio_desc *gpio = drvdata->gpio; + + mutex_lock(&drvdata->mutex); + + switch (offset) { + case GPIO_RB91X_KEY_NAND: + gpiod_set_raw_value_cansleep(gpio, value); + break; + case GPIO_RB91X_KEY_PDIS: + if (value) { + if (!drvdata->polling_disabled) { + mutex_lock(&drvdata->poll_mutex); + drvdata->polling_disabled = 1; + } + } else { + if (drvdata->polling_disabled) { + mutex_unlock(&drvdata->poll_mutex); + drvdata->polling_disabled = 0; + } + } + break; + default: + break; + } + + mutex_unlock(&drvdata->mutex); +} + +static int gpio_rb91x_key_direction_output(struct gpio_chip *gc, unsigned offset, + int value) +{ + switch (offset) { + case GPIO_RB91X_KEY_NAND: + case GPIO_RB91X_KEY_PDIS: + gpio_rb91x_key_set(gc, offset, value); + return 0; + default: + return -EINVAL; + } +} + +static int gpio_rb91x_key_probe(struct platform_device *pdev) +{ + struct gpio_rb91x_key *drvdata; + struct gpio_chip *gc; + struct device *dev = &pdev->dev; + struct device_node *of_node = dev->of_node; + int r; + + drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + mutex_init(&drvdata->mutex); + mutex_init(&drvdata->poll_mutex); + + drvdata->gpio = devm_gpiod_get(dev, NULL, GPIOD_OUT_LOW); + if (IS_ERR(drvdata->gpio)) { + if (PTR_ERR(drvdata->gpio) != -EPROBE_DEFER) { + dev_err(dev, "failed to get gpio: %ld\n", + PTR_ERR(drvdata->gpio)); + } + return PTR_ERR(drvdata->gpio); + } + + gc = &drvdata->gc; + gc->label = GPIO_RB91X_KEY_DRIVER_NAME; + gc->can_sleep = 1; + gc->base = -1; + gc->ngpio = GPIO_RB91X_KEY_NGPIOS; + gc->get = gpio_rb91x_key_get; + gc->set = gpio_rb91x_key_set; + gc->direction_output = gpio_rb91x_key_direction_output; + gc->direction_input = gpio_rb91x_key_direction_input; + gc->of_node = of_node; + + platform_set_drvdata(pdev, drvdata); + + r = gpiochip_add(&drvdata->gc); + if (r) { + dev_err(dev, "gpiochip_add() failed: %d\n", r); + return r; + } + + return 0; +} + +static int gpio_rb91x_key_remove(struct platform_device *pdev) +{ + struct gpio_rb91x_key *drvdata = platform_get_drvdata(pdev); + + gpiochip_remove(&drvdata->gc); + return 0; +} + +static const struct of_device_id gpio_rb91x_key_match[] = { + { .compatible = "mikrotik,"GPIO_RB91X_KEY_DRIVER_NAME }, + {}, +}; + +MODULE_DEVICE_TABLE(of, gpio_rb91x_key_match); + +static struct platform_driver gpio_rb91x_key_driver = { + .probe = gpio_rb91x_key_probe, + .remove = gpio_rb91x_key_remove, + .driver = { + .name = GPIO_RB91X_KEY_DRIVER_NAME, + .owner = THIS_MODULE, + .of_match_table = gpio_rb91x_key_match, + }, +}; + +module_platform_driver(gpio_rb91x_key_driver); + +MODULE_DESCRIPTION("Driver for reset key gpio line shared with NAND for MikroTik RB91x board series."); +MODULE_AUTHOR("Denis Kalashnikov "); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:" GPIO_RB91X_KEY_DRIVER_NAME); diff --git a/target/linux/ath79/files/drivers/mtd/nand/raw/rb91x_nand.c b/target/linux/ath79/files/drivers/mtd/nand/raw/rb91x_nand.c index ac9a2ac8ac..244fd27590 100644 --- a/target/linux/ath79/files/drivers/mtd/nand/raw/rb91x_nand.c +++ b/target/linux/ath79/files/drivers/mtd/nand/raw/rb91x_nand.c @@ -40,6 +40,7 @@ enum rb91x_nand_gpios { RB91X_NAND_ALE, /* Address Latch Enable */ RB91X_NAND_NRW, /* Read/Write. Active low */ RB91X_NAND_NLE, /* Latch Enable. Active low */ + RB91X_NAND_PDIS, /* Reset Key Poll Disable. Active high */ RB91X_NAND_GPIOS, }; @@ -57,6 +58,12 @@ static inline void rb91x_nand_latch_lock(struct rb91x_nand_drvdata *drvdata, gpiod_set_value_cansleep(drvdata->gpio[RB91X_NAND_NLE], lock); } +static inline void rb91x_nand_rst_key_poll_disable(struct rb91x_nand_drvdata *drvdata, + int disable) +{ + gpiod_set_value_cansleep(drvdata->gpio[RB91X_NAND_PDIS], disable); +} + static int rb91x_ooblayout_ecc(struct mtd_info *mtd, int section, struct mtd_oob_region *oobregion) { @@ -115,6 +122,7 @@ static void rb91x_nand_write(struct rb91x_nand_drvdata *drvdata, unsigned i; rb91x_nand_latch_lock(drvdata, 1); + rb91x_nand_rst_key_poll_disable(drvdata, 1); oe_reg = __raw_readl(base + AR71XX_GPIO_REG_OE); out_reg = __raw_readl(base + AR71XX_GPIO_REG_OUT); @@ -146,6 +154,7 @@ static void rb91x_nand_write(struct rb91x_nand_drvdata *drvdata, /* Flush write */ __raw_readl(base + AR71XX_GPIO_REG_OUT); + rb91x_nand_rst_key_poll_disable(drvdata, 0); rb91x_nand_latch_lock(drvdata, 0); } @@ -162,6 +171,7 @@ static void rb91x_nand_read(struct rb91x_nand_drvdata *drvdata, gpiod_set_value_cansleep(drvdata->gpio[RB91X_NAND_READ], 1); rb91x_nand_latch_lock(drvdata, 1); + rb91x_nand_rst_key_poll_disable(drvdata, 1); /* Save registers */ oe_reg = __raw_readl(base + AR71XX_GPIO_REG_OE); @@ -199,6 +209,7 @@ static void rb91x_nand_read(struct rb91x_nand_drvdata *drvdata, /* Flush write */ __raw_readl(base + AR71XX_GPIO_REG_OUT); + rb91x_nand_rst_key_poll_disable(drvdata, 0); rb91x_nand_latch_lock(drvdata, 0); /* Disable read mode */ @@ -274,8 +285,11 @@ static int rb91x_nand_probe(struct platform_device *pdev) gpios = gpiod_get_array(dev, NULL, GPIOD_OUT_LOW); if (IS_ERR(gpios)) { - dev_err(dev, "failed to get gpios: %d\n", (int)gpios); - return -EINVAL; + if (PTR_ERR(gpios) != -EPROBE_DEFER) { + dev_err(dev, "failed to get gpios: %d\n", + PTR_ERR(gpios)); + } + return PTR_ERR(gpios); } if (gpios->ndescs != RB91X_NAND_GPIOS) { diff --git a/target/linux/ath79/generic/base-files/etc/board.d/01_leds b/target/linux/ath79/generic/base-files/etc/board.d/01_leds index 8e38b24eb1..ccacca0e30 100644 --- a/target/linux/ath79/generic/base-files/etc/board.d/01_leds +++ b/target/linux/ath79/generic/base-files/etc/board.d/01_leds @@ -271,6 +271,10 @@ openmesh,om2p-hs-v4) ucidef_set_led_netdev "wan" "WAN" "blue:wan" "eth0" ucidef_set_led_switch "lan" "LAN" "blue:lan" "switch0" "0x02" ;; +openmesh,om2p-v1) + ucidef_set_led_netdev "wan" "WAN" "blue:wan" "eth0" + ucidef_set_led_switch "lan" "LAN" "blue:lan" "switch0" "0x10" + ;; openmesh,om5p-ac-v1) ucidef_set_led_netdev "lan" "LAN" "blue:lan" "eth0" ucidef_set_led_netdev "wan" "WAN" "blue:wan" "eth1" diff --git a/target/linux/ath79/generic/base-files/etc/board.d/02_network b/target/linux/ath79/generic/base-files/etc/board.d/02_network index ff4c13d8fd..2b29741aa9 100644 --- a/target/linux/ath79/generic/base-files/etc/board.d/02_network +++ b/target/linux/ath79/generic/base-files/etc/board.d/02_network @@ -188,6 +188,7 @@ ath79_setup_interfaces() compex,wpj531-16m|\ openmesh,a40|\ openmesh,a60|\ + openmesh,om2p-v1|\ openmesh,om2p-v4|\ openmesh,om2p-hs-v4|\ plasmacloud,pa300|\ @@ -535,10 +536,6 @@ ath79_setup_macs() lan_mac=$(macaddr_setbit $base_mac 29) [ $lan_mac = $base_mac ] && lan_mac=$(macaddr_unsetbit $base_mac 29) ;; - asus,rp-ac66) - lan_mac=$(mtd_get_mac_binary art 0x1002) - label_mac=$lan_mac - ;; avm,fritz1750e|\ avm,fritz450e|\ avm,fritzdvbc) diff --git a/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom b/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom index 10421c2e28..31b872e618 100644 --- a/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom +++ b/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom @@ -131,6 +131,9 @@ case "$FIRMWARE" in openmesh,om5p-an) caldata_extract "ART" 0x5000 0x440 ;; + openmesh,om2p-v1) + caldata_extract "ART" 0x1000 0x440 + ;; wd,mynet-n600|\ wd,mynet-n750) caldata_extract "art" 0x5000 0x440 diff --git a/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata index 270d4c07d8..bfc83c829a 100644 --- a/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata +++ b/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata @@ -17,10 +17,6 @@ case "$FIRMWARE" in caldata_extract "art" 0x5000 0x844 ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary art 0x0) 2) ;; - avm,fritz1750e|\ - avm,fritzdvbc) - caldata_extract "urlader" 0x198a 0x844 - ;; asus,rp-ac66|\ comfast,cf-wr650ac-v1|\ comfast,cf-wr650ac-v2|\ @@ -50,6 +46,10 @@ case "$FIRMWARE" in yuncore,a770) caldata_extract "art" 0x5000 0x844 ;; + avm,fritz1750e|\ + avm,fritzdvbc) + caldata_extract "urlader" 0x198a 0x844 + ;; devolo,dvl1200e|\ devolo,dvl1200i|\ devolo,dvl1750c|\ @@ -105,12 +105,9 @@ case "$FIRMWARE" in openmesh,a40|\ openmesh,a60|\ openmesh,mr1750-v1|\ - openmesh,mr1750-v2) - caldata_extract "ART" 0x5000 0x844 - ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) 16) - ;; + openmesh,mr1750-v2|\ openmesh,om5p-ac-v2) - caldata_extract "art" 0x5000 0x844 + caldata_extract "ART" 0x5000 0x844 ath10k_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) 16) ;; qihoo,c301) diff --git a/target/linux/ath79/generic/base-files/lib/upgrade/platform.sh b/target/linux/ath79/generic/base-files/lib/upgrade/platform.sh index 3d953d7982..67e53c5fde 100644 --- a/target/linux/ath79/generic/base-files/lib/upgrade/platform.sh +++ b/target/linux/ath79/generic/base-files/lib/upgrade/platform.sh @@ -73,6 +73,7 @@ platform_do_upgrade() { openmesh,mr900-v2|\ openmesh,mr1750-v1|\ openmesh,mr1750-v2|\ + openmesh,om2p-v1|\ openmesh,om2p-v2|\ openmesh,om2p-v4|\ openmesh,om2p-hs-v1|\ @@ -82,6 +83,7 @@ platform_do_upgrade() { openmesh,om2p-lc|\ openmesh,om5p|\ openmesh,om5p-ac-v1|\ + openmesh,om5p-ac-v2|\ openmesh,om5p-an) PART_NAME="inactive" platform_do_upgrade_openmesh "$1" diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk index b73b88ceb8..67f304819f 100644 --- a/target/linux/ath79/image/generic.mk +++ b/target/linux/ath79/image/generic.mk @@ -361,6 +361,7 @@ define Device/asus_rp-ac66 SOC := qca9563 DEVICE_VENDOR := ASUS DEVICE_MODEL := RP-AC66 + IMAGE_SIZE := 15488k IMAGES += factory.bin IMAGE/factory.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | \ append-rootfs | pad-rootfs @@ -1871,6 +1872,16 @@ define Device/openmesh_mr1750-v2 endef TARGET_DEVICES += openmesh_mr1750-v2 +define Device/openmesh_om2p-v1 + $(Device/openmesh_common_256k) + SOC := ar7240 + DEVICE_MODEL := OM2P + DEVICE_VARIANT := v1 + OPENMESH_CE_TYPE := OM2P + SUPPORTED_DEVICES += om2p +endef +TARGET_DEVICES += openmesh_om2p-v1 + define Device/openmesh_om2p-v2 $(Device/openmesh_common_256k) SOC := ar9330 @@ -1961,12 +1972,12 @@ endef TARGET_DEVICES += openmesh_om5p-ac-v1 define Device/openmesh_om5p-ac-v2 + $(Device/openmesh_common_64k) SOC := qca9558 - DEVICE_VENDOR := OpenMesh DEVICE_MODEL := OM5P-AC DEVICE_VARIANT := v2 - DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca988x-ct om-watchdog - IMAGE_SIZE := 7808k + DEVICE_PACKAGES += kmod-ath10k-ct ath10k-firmware-qca988x-ct + OPENMESH_CE_TYPE := OM5PAC SUPPORTED_DEVICES += om5p-acv2 DEFAULT := n endef diff --git a/target/linux/ath79/image/nand.mk b/target/linux/ath79/image/nand.mk index 91fd7ec301..b8006c6d0c 100644 --- a/target/linux/ath79/image/nand.mk +++ b/target/linux/ath79/image/nand.mk @@ -195,6 +195,22 @@ define Device/glinet_gl-e750 endef TARGET_DEVICES += glinet_gl-e750 +define Device/glinet_gl-xe300 + SOC := qca9531 + DEVICE_VENDOR := GL.iNet + DEVICE_MODEL := GL-XE300 + DEVICE_PACKAGES := kmod-usb2 block-mount kmod-usb-serial-ch341 + KERNEL_SIZE := 4096k + IMAGE_SIZE := 131072k + PAGESIZE := 2048 + VID_HDR_OFFSET := 2048 + BLOCKSIZE := 128k + IMAGES += factory.img + IMAGE/factory.img := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata +endef +TARGET_DEVICES += glinet_gl-xe300 + # fake rootfs is mandatory, pad-offset 129 equals (2 * uimage_header + 0xff) define Device/netgear_ath79_nand DEVICE_VENDOR := NETGEAR @@ -301,8 +317,9 @@ define Device/zyxel_nbg6716 KERNEL_SIZE := 4096k BLOCKSIZE := 128k PAGESIZE := 2048 - KERNEL := kernel-bin | append-dtb | uImage none | zyxel-buildkerneljffs | \ - check-size 4096k + LOADER_TYPE := bin + KERNEL := kernel-bin | append-dtb | lzma | loader-kernel | uImage none | \ + zyxel-buildkerneljffs | check-size 4096k IMAGES := sysupgrade.tar sysupgrade-4M-Kernel.bin factory.bin IMAGE/sysupgrade.tar/squashfs := append-rootfs | pad-to $$$$(BLOCKSIZE) | \ sysupgrade-tar rootfs=$$$$@ | append-metadata @@ -311,6 +328,5 @@ define Device/zyxel_nbg6716 IMAGE/factory.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi | \ zyxel-factory UBINIZE_OPTS := -E 5 - DEFAULT := n endef TARGET_DEVICES += zyxel_nbg6716 diff --git a/target/linux/ath79/mikrotik/config-default b/target/linux/ath79/mikrotik/config-default index ee2e4ebe9a..2ff8a14f1d 100644 --- a/target/linux/ath79/mikrotik/config-default +++ b/target/linux/ath79/mikrotik/config-default @@ -1,6 +1,7 @@ CONFIG_CRC16=y CONFIG_CRYPTO_DEFLATE=y CONFIG_GPIO_LATCH=y +CONFIG_GPIO_RB91X_KEY=y CONFIG_GPIO_RB4XX=y CONFIG_GPIO_WATCHDOG=y CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y diff --git a/target/linux/ath79/patches-5.10/401-mtd-nor-support-mtd-name-from-device-tree.patch b/target/linux/ath79/patches-5.10/401-mtd-nor-support-mtd-name-from-device-tree.patch new file mode 100644 index 0000000000..b85ecef383 --- /dev/null +++ b/target/linux/ath79/patches-5.10/401-mtd-nor-support-mtd-name-from-device-tree.patch @@ -0,0 +1,54 @@ +From f32bc2aa01edcba2f2ed5db151cf183eac9ef919 Mon Sep 17 00:00:00 2001 +From: Abhimanyu Vishwakarma +Date: Sat, 25 Feb 2017 16:42:50 +0000 +Subject: mtd: nor: support mtd name from device tree + +Signed-off-by: Abhimanyu Vishwakarma +--- + drivers/mtd/spi-nor/spi-nor.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +--- a/drivers/mtd/spi-nor/core.c ++++ b/drivers/mtd/spi-nor/core.c +@@ -3189,6 +3189,7 @@ int spi_nor_scan(struct spi_nor *nor, co + struct device *dev = nor->dev; + struct mtd_info *mtd = &nor->mtd; + struct device_node *np = spi_nor_get_flash_node(nor); ++ const char __maybe_unused *of_mtd_name = NULL; + int ret; + int i; + +@@ -3243,7 +3244,12 @@ int spi_nor_scan(struct spi_nor *nor, co + if (ret) + return ret; + +- if (!mtd->name) ++#ifdef CONFIG_MTD_OF_PARTS ++ of_property_read_string(np, "linux,mtd-name", &of_mtd_name); ++#endif ++ if (of_mtd_name) ++ mtd->name = of_mtd_name; ++ else if (!mtd->name) + mtd->name = dev_name(dev); + mtd->priv = nor; + mtd->type = MTD_NORFLASH; +--- a/drivers/mtd/mtdcore.c ++++ b/drivers/mtd/mtdcore.c +@@ -778,6 +778,17 @@ out_error: + */ + static void mtd_set_dev_defaults(struct mtd_info *mtd) + { ++#ifdef CONFIG_MTD_OF_PARTS ++ const char __maybe_unused *of_mtd_name = NULL; ++ struct device_node *np; ++ ++ np = mtd_get_of_node(mtd); ++ if (np && !mtd->name) { ++ of_property_read_string(np, "linux,mtd-name", &of_mtd_name); ++ if (of_mtd_name) ++ mtd->name = of_mtd_name; ++ } else ++#endif + if (mtd->dev.parent) { + if (!mtd->owner && mtd->dev.parent->driver) + mtd->owner = mtd->dev.parent->driver->owner; diff --git a/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch b/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch index 5bbab93c51..4f4344b40f 100644 --- a/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch +++ b/target/linux/ath79/patches-5.10/939-mikrotik-rb91x.patch @@ -14,6 +14,17 @@ config GPIO_LOGICVC tristate "Xylon LogiCVC GPIO support" depends on MFD_SYSCON && OF +@@ -495,6 +502,10 @@ config GPIO_REG + A 32-bit single register GPIO fixed in/out implementation. This + can be used to represent any register as a set of GPIO signals. + ++config GPIO_RB91X_KEY ++ tristate "MikroTik RB91x board series reset key support" ++ depends on ATH79 ++ + config GPIO_SAMA5D2_PIOBU + tristate "SAMA5D2 PIOBU GPIO support" + depends on MFD_SYSCON --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -72,6 +72,7 @@ obj-$(CONFIG_GPIO_IT87) += gpio-it87.o @@ -24,6 +35,14 @@ obj-$(CONFIG_GPIO_LOGICVC) += gpio-logicvc.o obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o +@@ -121,6 +122,7 @@ obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio + obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o + obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o + obj-$(CONFIG_GPIO_RB4XX) += gpio-rb4xx.o ++obj-$(CONFIG_GPIO_RB91X_KEY) += gpio-rb91x-key.o + obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o + obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o + obj-$(CONFIG_GPIO_RDA) += gpio-rda.o --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -571,4 +571,10 @@ config MTD_NAND_RB4XX diff --git a/target/linux/bcm27xx/patches-5.10/950-0138-usb-add-plumbing-for-updating-interrupt-endpoint-int.patch b/target/linux/bcm27xx/patches-5.10/950-0138-usb-add-plumbing-for-updating-interrupt-endpoint-int.patch index a168528edf..b541c0cb12 100644 --- a/target/linux/bcm27xx/patches-5.10/950-0138-usb-add-plumbing-for-updating-interrupt-endpoint-int.patch +++ b/target/linux/bcm27xx/patches-5.10/950-0138-usb-add-plumbing-for-updating-interrupt-endpoint-int.patch @@ -27,7 +27,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/core/hcd.c +++ b/drivers/usb/core/hcd.c -@@ -1945,6 +1945,16 @@ reset: +@@ -1952,6 +1952,16 @@ reset: return ret; } diff --git a/target/linux/bcm27xx/patches-5.10/950-0579-drm-vc4-Fix-VEC-address-for-BCM2711-in-the-devicetre.patch b/target/linux/bcm27xx/patches-5.10/950-0579-drm-vc4-Fix-VEC-address-for-BCM2711-in-the-devicetre.patch index e4f84cc2ca..ae036000c2 100644 --- a/target/linux/bcm27xx/patches-5.10/950-0579-drm-vc4-Fix-VEC-address-for-BCM2711-in-the-devicetre.patch +++ b/target/linux/bcm27xx/patches-5.10/950-0579-drm-vc4-Fix-VEC-address-for-BCM2711-in-the-devicetre.patch @@ -55,7 +55,7 @@ Signed-off-by: Mateusz Kwiatkowski reg = <0x7e807000 0x100>; --- a/arch/arm/boot/dts/bcm283x.dtsi +++ b/arch/arm/boot/dts/bcm283x.dtsi -@@ -488,14 +488,6 @@ +@@ -490,14 +490,6 @@ status = "disabled"; }; diff --git a/target/linux/bcm27xx/patches-5.10/950-0697-ARM-dts-bcm2711-fold-in-the-correct-interrupt.patch b/target/linux/bcm27xx/patches-5.10/950-0697-ARM-dts-bcm2711-fold-in-the-correct-interrupt.patch index 6720d08872..5965d1c1dc 100644 --- a/target/linux/bcm27xx/patches-5.10/950-0697-ARM-dts-bcm2711-fold-in-the-correct-interrupt.patch +++ b/target/linux/bcm27xx/patches-5.10/950-0697-ARM-dts-bcm2711-fold-in-the-correct-interrupt.patch @@ -23,7 +23,7 @@ Signed-off-by: Phil Elwell status = "disabled"; }; -@@ -1112,7 +1112,3 @@ +@@ -1114,7 +1114,3 @@ &usb { interrupts = ; }; diff --git a/target/linux/bcm53xx/patches-5.10/180-usb-xhci-add-support-for-performing-fake-doorbell.patch b/target/linux/bcm53xx/patches-5.10/180-usb-xhci-add-support-for-performing-fake-doorbell.patch index c497db727f..573bf3c91a 100644 --- a/target/linux/bcm53xx/patches-5.10/180-usb-xhci-add-support-for-performing-fake-doorbell.patch +++ b/target/linux/bcm53xx/patches-5.10/180-usb-xhci-add-support-for-performing-fake-doorbell.patch @@ -19,7 +19,7 @@ it on BCM4708 family. --- a/drivers/usb/host/xhci-plat.c +++ b/drivers/usb/host/xhci-plat.c -@@ -87,6 +87,8 @@ static int xhci_priv_resume_quirk(struct +@@ -77,6 +77,8 @@ static int xhci_priv_resume_quirk(struct static void xhci_plat_quirks(struct device *dev, struct xhci_hcd *xhci) { struct xhci_plat_priv *priv = xhci_to_priv(xhci); @@ -28,7 +28,7 @@ it on BCM4708 family. /* * As of now platform drivers don't provide MSI support so we ensure -@@ -94,6 +96,9 @@ static void xhci_plat_quirks(struct devi +@@ -84,6 +86,9 @@ static void xhci_plat_quirks(struct devi * dev struct in order to setup MSI */ xhci->quirks |= XHCI_PLAT | priv->quirks; diff --git a/target/linux/generic/backport-5.10/850-v5.17-0001-PCI-pci-bridge-emul-Add-description-for-class_revisi.patch b/target/linux/generic/backport-5.10/850-v5.17-0001-PCI-pci-bridge-emul-Add-description-for-class_revisi.patch new file mode 100644 index 0000000000..118606a791 --- /dev/null +++ b/target/linux/generic/backport-5.10/850-v5.17-0001-PCI-pci-bridge-emul-Add-description-for-class_revisi.patch @@ -0,0 +1,44 @@ +From 9319230ac147067652b58fe849ffe0ceec098665 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Tue, 30 Nov 2021 18:29:03 +0100 +Subject: [PATCH] PCI: pci-bridge-emul: Add description for class_revision + field +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The current assignment to the class_revision member + + class_revision |= cpu_to_le32(PCI_CLASS_BRIDGE_PCI << 16); + +can make the reader think that class is at high 16 bits of the member and +revision at low 16 bits. + +In reality, class is at high 24 bits, but the class for PCI Bridge Normal +Decode is PCI_CLASS_BRIDGE_PCI << 8. + +Change the assignment and add a comment to make this clearer. + +Link: https://lore.kernel.org/r/20211130172913.9727-2-kabel@kernel.org +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Signed-off-by: Lorenzo Pieralisi +--- + drivers/pci/pci-bridge-emul.c | 6 +++++- + 1 file changed, 5 insertions(+), 1 deletion(-) + +--- a/drivers/pci/pci-bridge-emul.c ++++ b/drivers/pci/pci-bridge-emul.c +@@ -265,7 +265,11 @@ int pci_bridge_emul_init(struct pci_brid + { + BUILD_BUG_ON(sizeof(bridge->conf) != PCI_BRIDGE_CONF_END); + +- bridge->conf.class_revision |= cpu_to_le32(PCI_CLASS_BRIDGE_PCI << 16); ++ /* ++ * class_revision: Class is high 24 bits and revision is low 8 bit of this member, ++ * while class for PCI Bridge Normal Decode has the 24-bit value: PCI_CLASS_BRIDGE_PCI << 8 ++ */ ++ bridge->conf.class_revision |= cpu_to_le32((PCI_CLASS_BRIDGE_PCI << 8) << 8); + bridge->conf.header_type = PCI_HEADER_TYPE_BRIDGE; + bridge->conf.cache_line_size = 0x10; + bridge->conf.status = cpu_to_le16(PCI_STATUS_CAP_LIST); diff --git a/target/linux/generic/backport-5.10/850-v5.17-0002-PCI-pci-bridge-emul-Add-definitions-for-missing-capa.patch b/target/linux/generic/backport-5.10/850-v5.17-0002-PCI-pci-bridge-emul-Add-definitions-for-missing-capa.patch new file mode 100644 index 0000000000..2d8557b3f4 --- /dev/null +++ b/target/linux/generic/backport-5.10/850-v5.17-0002-PCI-pci-bridge-emul-Add-definitions-for-missing-capa.patch @@ -0,0 +1,73 @@ +From 8ea673a8b30b4a32516b8adabb15e2a68ff02ec8 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Tue, 30 Nov 2021 18:29:04 +0100 +Subject: [PATCH] PCI: pci-bridge-emul: Add definitions for missing + capabilities registers +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +pci-bridge-emul driver already allocates buffer for capabilities up to the +PCI_EXP_SLTSTA2 register, but does not define bit access behavior for these +registers. Add these missing definitions. + +Link: https://lore.kernel.org/r/20211130172913.9727-3-kabel@kernel.org +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Signed-off-by: Lorenzo Pieralisi +--- + drivers/pci/pci-bridge-emul.c | 43 +++++++++++++++++++++++++++++++++++ + 1 file changed, 43 insertions(+) + +--- a/drivers/pci/pci-bridge-emul.c ++++ b/drivers/pci/pci-bridge-emul.c +@@ -251,6 +251,49 @@ struct pci_bridge_reg_behavior pcie_cap_ + .ro = GENMASK(15, 0) | PCI_EXP_RTSTA_PENDING, + .w1c = PCI_EXP_RTSTA_PME, + }, ++ ++ [PCI_EXP_DEVCAP2 / 4] = { ++ /* ++ * Device capabilities 2 register has reserved bits [30:27]. ++ * Also bits [26:24] are reserved for non-upstream ports. ++ */ ++ .ro = BIT(31) | GENMASK(23, 0), ++ }, ++ ++ [PCI_EXP_DEVCTL2 / 4] = { ++ /* ++ * Device control 2 register is RW. Bit 11 is reserved for ++ * non-upstream ports. ++ * ++ * Device status 2 register is reserved. ++ */ ++ .rw = GENMASK(15, 12) | GENMASK(10, 0), ++ }, ++ ++ [PCI_EXP_LNKCAP2 / 4] = { ++ /* Link capabilities 2 register has reserved bits [30:25] and 0. */ ++ .ro = BIT(31) | GENMASK(24, 1), ++ }, ++ ++ [PCI_EXP_LNKCTL2 / 4] = { ++ /* ++ * Link control 2 register is RW. ++ * ++ * Link status 2 register has bits 5, 15 W1C; ++ * bits 10, 11 reserved and others are RO. ++ */ ++ .rw = GENMASK(15, 0), ++ .w1c = (BIT(15) | BIT(5)) << 16, ++ .ro = (GENMASK(14, 12) | GENMASK(9, 6) | GENMASK(4, 0)) << 16, ++ }, ++ ++ [PCI_EXP_SLTCAP2 / 4] = { ++ /* Slot capabilities 2 register is reserved. */ ++ }, ++ ++ [PCI_EXP_SLTCTL2 / 4] = { ++ /* Both Slot control 2 and Slot status 2 registers are reserved. */ ++ }, + }; + + /* diff --git a/target/linux/generic/backport-5.10/850-v5.17-0003-PCI-aardvark-Add-support-for-DEVCAP2-DEVCTL2-LNKCAP2.patch b/target/linux/generic/backport-5.10/850-v5.17-0003-PCI-aardvark-Add-support-for-DEVCAP2-DEVCTL2-LNKCAP2.patch new file mode 100644 index 0000000000..b98c0d16c9 --- /dev/null +++ b/target/linux/generic/backport-5.10/850-v5.17-0003-PCI-aardvark-Add-support-for-DEVCAP2-DEVCTL2-LNKCAP2.patch @@ -0,0 +1,61 @@ +From 1d3e170344dff2cef8827db6c09909b78cbc11d7 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Tue, 30 Nov 2021 18:29:05 +0100 +Subject: [PATCH] PCI: aardvark: Add support for DEVCAP2, DEVCTL2, LNKCAP2 and + LNKCTL2 registers on emulated bridge +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +PCI aardvark hardware supports access to DEVCAP2, DEVCTL2, LNKCAP2 and +LNKCTL2 configuration registers of PCIe core via PCIE_CORE_PCIEXP_CAP. +Export them via emulated software root bridge. + +Link: https://lore.kernel.org/r/20211130172913.9727-4-kabel@kernel.org +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Signed-off-by: Lorenzo Pieralisi +--- + drivers/pci/controller/pci-aardvark.c | 15 +++++++++++---- + 1 file changed, 11 insertions(+), 4 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -882,8 +882,13 @@ advk_pci_bridge_emul_pcie_conf_read(stru + case PCI_CAP_LIST_ID: + case PCI_EXP_DEVCAP: + case PCI_EXP_DEVCTL: ++ case PCI_EXP_DEVCAP2: ++ case PCI_EXP_DEVCTL2: ++ case PCI_EXP_LNKCAP2: ++ case PCI_EXP_LNKCTL2: + *value = advk_readl(pcie, PCIE_CORE_PCIEXP_CAP + reg); + return PCI_BRIDGE_EMUL_HANDLED; ++ + default: + return PCI_BRIDGE_EMUL_NOT_HANDLED; + } +@@ -897,10 +902,6 @@ advk_pci_bridge_emul_pcie_conf_write(str + struct advk_pcie *pcie = bridge->data; + + switch (reg) { +- case PCI_EXP_DEVCTL: +- advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg); +- break; +- + case PCI_EXP_LNKCTL: + advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg); + if (new & PCI_EXP_LNKCTL_RL) +@@ -922,6 +923,12 @@ advk_pci_bridge_emul_pcie_conf_write(str + advk_writel(pcie, new, PCIE_ISR0_REG); + break; + ++ case PCI_EXP_DEVCTL: ++ case PCI_EXP_DEVCTL2: ++ case PCI_EXP_LNKCTL2: ++ advk_writel(pcie, new, PCIE_CORE_PCIEXP_CAP + reg); ++ break; ++ + default: + break; + } diff --git a/target/linux/generic/backport-5.10/850-v5.17-0004-PCI-aardvark-Clear-all-MSIs-at-setup.patch b/target/linux/generic/backport-5.10/850-v5.17-0004-PCI-aardvark-Clear-all-MSIs-at-setup.patch new file mode 100644 index 0000000000..dc01c5f85d --- /dev/null +++ b/target/linux/generic/backport-5.10/850-v5.17-0004-PCI-aardvark-Clear-all-MSIs-at-setup.patch @@ -0,0 +1,59 @@ +From 7d8dc1f7cd007a7ce94c5b4c20d63a8b8d6d7751 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Tue, 30 Nov 2021 18:29:06 +0100 +Subject: [PATCH] PCI: aardvark: Clear all MSIs at setup +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +We already clear all the other interrupts (ISR0, ISR1, HOST_CTRL_INT). + +Define a new macro PCIE_MSI_ALL_MASK and do the same clearing for MSIs, +to ensure that we don't start receiving spurious interrupts. + +Use this new mask in advk_pcie_handle_msi(); + +Link: https://lore.kernel.org/r/20211130172913.9727-5-kabel@kernel.org +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Signed-off-by: Lorenzo Pieralisi +--- + drivers/pci/controller/pci-aardvark.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -114,6 +114,7 @@ + #define PCIE_MSI_ADDR_HIGH_REG (CONTROL_BASE_ADDR + 0x54) + #define PCIE_MSI_STATUS_REG (CONTROL_BASE_ADDR + 0x58) + #define PCIE_MSI_MASK_REG (CONTROL_BASE_ADDR + 0x5C) ++#define PCIE_MSI_ALL_MASK GENMASK(31, 0) + #define PCIE_MSI_PAYLOAD_REG (CONTROL_BASE_ADDR + 0x9C) + #define PCIE_MSI_DATA_MASK GENMASK(15, 0) + +@@ -577,6 +578,7 @@ static void advk_pcie_setup_hw(struct ad + advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG); + + /* Clear all interrupts */ ++ advk_writel(pcie, PCIE_MSI_ALL_MASK, PCIE_MSI_STATUS_REG); + advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_REG); + advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG); + advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG); +@@ -589,7 +591,7 @@ static void advk_pcie_setup_hw(struct ad + advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG); + + /* Unmask all MSIs */ +- advk_writel(pcie, 0, PCIE_MSI_MASK_REG); ++ advk_writel(pcie, ~(u32)PCIE_MSI_ALL_MASK, PCIE_MSI_MASK_REG); + + /* Enable summary interrupt for GIC SPI source */ + reg = PCIE_IRQ_ALL_MASK & (~PCIE_IRQ_ENABLE_INTS_MASK); +@@ -1397,7 +1399,7 @@ static void advk_pcie_handle_msi(struct + + msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG); + msi_val = advk_readl(pcie, PCIE_MSI_STATUS_REG); +- msi_status = msi_val & ~msi_mask; ++ msi_status = msi_val & ((~msi_mask) & PCIE_MSI_ALL_MASK); + + for (msi_idx = 0; msi_idx < MSI_IRQ_NUM; msi_idx++) { + if (!(BIT(msi_idx) & msi_status)) diff --git a/target/linux/generic/backport-5.10/850-v5.17-0005-PCI-aardvark-Comment-actions-in-driver-remove-method.patch b/target/linux/generic/backport-5.10/850-v5.17-0005-PCI-aardvark-Comment-actions-in-driver-remove-method.patch new file mode 100644 index 0000000000..45df1b9695 --- /dev/null +++ b/target/linux/generic/backport-5.10/850-v5.17-0005-PCI-aardvark-Comment-actions-in-driver-remove-method.patch @@ -0,0 +1,34 @@ +From a4ca7948e1d47275f8f3e5023243440c40561916 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Tue, 30 Nov 2021 18:29:07 +0100 +Subject: [PATCH] PCI: aardvark: Comment actions in driver remove method +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Add two more comments into the advk_pcie_remove() method. + +Link: https://lore.kernel.org/r/20211130172913.9727-6-kabel@kernel.org +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Signed-off-by: Lorenzo Pieralisi +--- + drivers/pci/controller/pci-aardvark.c | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1696,11 +1696,13 @@ static int advk_pcie_remove(struct platf + struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie); + int i; + ++ /* Remove PCI bus with all devices */ + pci_lock_rescan_remove(); + pci_stop_root_bus(bridge->bus); + pci_remove_root_bus(bridge->bus); + pci_unlock_rescan_remove(); + ++ /* Remove IRQ domains */ + advk_pcie_remove_msi_irq_domain(pcie); + advk_pcie_remove_irq_domain(pcie); + diff --git a/target/linux/generic/backport-5.10/850-v5.17-0006-PCI-aardvark-Disable-bus-mastering-when-unbinding-dr.patch b/target/linux/generic/backport-5.10/850-v5.17-0006-PCI-aardvark-Disable-bus-mastering-when-unbinding-dr.patch new file mode 100644 index 0000000000..5959d80592 --- /dev/null +++ b/target/linux/generic/backport-5.10/850-v5.17-0006-PCI-aardvark-Disable-bus-mastering-when-unbinding-dr.patch @@ -0,0 +1,41 @@ +From a46f2f6dd4093438d9615dfbf5c0fea2a9835dba Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Tue, 30 Nov 2021 18:29:08 +0100 +Subject: [PATCH] PCI: aardvark: Disable bus mastering when unbinding driver +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Ensure that after driver unbind PCIe cards are not able to forward +memory and I/O requests in the upstream direction. + +Link: https://lore.kernel.org/r/20211130172913.9727-7-kabel@kernel.org +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Signed-off-by: Lorenzo Pieralisi +--- + drivers/pci/controller/pci-aardvark.c | 6 ++++++ + 1 file changed, 6 insertions(+) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1694,6 +1694,7 @@ static int advk_pcie_remove(struct platf + { + struct advk_pcie *pcie = platform_get_drvdata(pdev); + struct pci_host_bridge *bridge = pci_host_bridge_from_priv(pcie); ++ u32 val; + int i; + + /* Remove PCI bus with all devices */ +@@ -1702,6 +1703,11 @@ static int advk_pcie_remove(struct platf + pci_remove_root_bus(bridge->bus); + pci_unlock_rescan_remove(); + ++ /* Disable Root Bridge I/O space, memory space and bus mastering */ ++ val = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG); ++ val &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); ++ advk_writel(pcie, val, PCIE_CORE_CMD_STATUS_REG); ++ + /* Remove IRQ domains */ + advk_pcie_remove_msi_irq_domain(pcie); + advk_pcie_remove_irq_domain(pcie); diff --git a/target/linux/generic/backport-5.10/850-v5.17-0007-PCI-aardvark-Mask-all-interrupts-when-unbinding-driv.patch b/target/linux/generic/backport-5.10/850-v5.17-0007-PCI-aardvark-Mask-all-interrupts-when-unbinding-driv.patch new file mode 100644 index 0000000000..130bb701f8 --- /dev/null +++ b/target/linux/generic/backport-5.10/850-v5.17-0007-PCI-aardvark-Mask-all-interrupts-when-unbinding-driv.patch @@ -0,0 +1,48 @@ +From 13bcdf07cb2ecff5d45d2c141df2539b15211448 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Tue, 30 Nov 2021 18:29:09 +0100 +Subject: [PATCH] PCI: aardvark: Mask all interrupts when unbinding driver +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Ensure that no interrupt can be triggered after driver unbind. + +Link: https://lore.kernel.org/r/20211130172913.9727-8-kabel@kernel.org +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Signed-off-by: Lorenzo Pieralisi +--- + drivers/pci/controller/pci-aardvark.c | 21 +++++++++++++++++++++ + 1 file changed, 21 insertions(+) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1708,6 +1708,27 @@ static int advk_pcie_remove(struct platf + val &= ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); + advk_writel(pcie, val, PCIE_CORE_CMD_STATUS_REG); + ++ /* Disable MSI */ ++ val = advk_readl(pcie, PCIE_CORE_CTRL2_REG); ++ val &= ~PCIE_CORE_CTRL2_MSI_ENABLE; ++ advk_writel(pcie, val, PCIE_CORE_CTRL2_REG); ++ ++ /* Clear MSI address */ ++ advk_writel(pcie, 0, PCIE_MSI_ADDR_LOW_REG); ++ advk_writel(pcie, 0, PCIE_MSI_ADDR_HIGH_REG); ++ ++ /* Mask all interrupts */ ++ advk_writel(pcie, PCIE_MSI_ALL_MASK, PCIE_MSI_MASK_REG); ++ advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_MASK_REG); ++ advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG); ++ advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_MASK_REG); ++ ++ /* Clear all interrupts */ ++ advk_writel(pcie, PCIE_MSI_ALL_MASK, PCIE_MSI_STATUS_REG); ++ advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_REG); ++ advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG); ++ advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG); ++ + /* Remove IRQ domains */ + advk_pcie_remove_msi_irq_domain(pcie); + advk_pcie_remove_irq_domain(pcie); diff --git a/target/linux/generic/backport-5.10/850-v5.17-0008-PCI-aardvark-Fix-memory-leak-in-driver-unbind.patch b/target/linux/generic/backport-5.10/850-v5.17-0008-PCI-aardvark-Fix-memory-leak-in-driver-unbind.patch new file mode 100644 index 0000000000..74d25d508b --- /dev/null +++ b/target/linux/generic/backport-5.10/850-v5.17-0008-PCI-aardvark-Fix-memory-leak-in-driver-unbind.patch @@ -0,0 +1,33 @@ +From 2f040a17f5061457ae95035326d3159eddc1e5cc Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Tue, 30 Nov 2021 18:29:10 +0100 +Subject: [PATCH] PCI: aardvark: Fix memory leak in driver unbind +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Free config space for emulated root bridge when unbinding driver to fix +memory leak. Do it after disabling and masking all interrupts, since +aardvark interrupt handler accesses config space of emulated root +bridge. + +Link: https://lore.kernel.org/r/20211130172913.9727-9-kabel@kernel.org +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Signed-off-by: Lorenzo Pieralisi +--- + drivers/pci/controller/pci-aardvark.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1733,6 +1733,9 @@ static int advk_pcie_remove(struct platf + advk_pcie_remove_msi_irq_domain(pcie); + advk_pcie_remove_irq_domain(pcie); + ++ /* Free config space for emulated root bridge */ ++ pci_bridge_emul_cleanup(&pcie->bridge); ++ + /* Disable outbound address windows mapping */ + for (i = 0; i < OB_WIN_COUNT; i++) + advk_pcie_disable_ob_win(pcie, i); diff --git a/target/linux/generic/backport-5.10/850-v5.17-0009-PCI-aardvark-Assert-PERST-when-unbinding-driver.patch b/target/linux/generic/backport-5.10/850-v5.17-0009-PCI-aardvark-Assert-PERST-when-unbinding-driver.patch new file mode 100644 index 0000000000..26d8afdddd --- /dev/null +++ b/target/linux/generic/backport-5.10/850-v5.17-0009-PCI-aardvark-Assert-PERST-when-unbinding-driver.patch @@ -0,0 +1,33 @@ +From 1f54391be8ce0c981d312cb93acdc5608def576a Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Tue, 30 Nov 2021 18:29:11 +0100 +Subject: [PATCH] PCI: aardvark: Assert PERST# when unbinding driver +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Put the PCIe card into reset by asserting PERST# signal when unbinding +driver. It doesn't make sense to leave the card working if it can't +communicate with the host. This should also save some power. + +Link: https://lore.kernel.org/r/20211130172913.9727-10-kabel@kernel.org +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Signed-off-by: Lorenzo Pieralisi +--- + drivers/pci/controller/pci-aardvark.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1736,6 +1736,10 @@ static int advk_pcie_remove(struct platf + /* Free config space for emulated root bridge */ + pci_bridge_emul_cleanup(&pcie->bridge); + ++ /* Assert PERST# signal which prepares PCIe card for power down */ ++ if (pcie->reset_gpio) ++ gpiod_set_value_cansleep(pcie->reset_gpio, 1); ++ + /* Disable outbound address windows mapping */ + for (i = 0; i < OB_WIN_COUNT; i++) + advk_pcie_disable_ob_win(pcie, i); diff --git a/target/linux/generic/backport-5.10/850-v5.17-0010-PCI-aardvark-Disable-link-training-when-unbinding-dr.patch b/target/linux/generic/backport-5.10/850-v5.17-0010-PCI-aardvark-Disable-link-training-when-unbinding-dr.patch new file mode 100644 index 0000000000..23346a9284 --- /dev/null +++ b/target/linux/generic/backport-5.10/850-v5.17-0010-PCI-aardvark-Disable-link-training-when-unbinding-dr.patch @@ -0,0 +1,34 @@ +From 759dec2e3dfdbd261c41d2279f04f2351c971a49 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Tue, 30 Nov 2021 18:29:12 +0100 +Subject: [PATCH] PCI: aardvark: Disable link training when unbinding driver +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Disable link training circuit in driver unbind sequence. We want to +leave link training in the same state as it was before the driver was +probed. + +Link: https://lore.kernel.org/r/20211130172913.9727-11-kabel@kernel.org +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Signed-off-by: Lorenzo Pieralisi +--- + drivers/pci/controller/pci-aardvark.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1740,6 +1740,11 @@ static int advk_pcie_remove(struct platf + if (pcie->reset_gpio) + gpiod_set_value_cansleep(pcie->reset_gpio, 1); + ++ /* Disable link training */ ++ val = advk_readl(pcie, PCIE_CORE_CTRL0_REG); ++ val &= ~LINK_TRAINING_EN; ++ advk_writel(pcie, val, PCIE_CORE_CTRL0_REG); ++ + /* Disable outbound address windows mapping */ + for (i = 0; i < OB_WIN_COUNT; i++) + advk_pcie_disable_ob_win(pcie, i); diff --git a/target/linux/generic/backport-5.10/850-v5.17-0011-PCI-aardvark-Disable-common-PHY-when-unbinding-drive.patch b/target/linux/generic/backport-5.10/850-v5.17-0011-PCI-aardvark-Disable-common-PHY-when-unbinding-drive.patch new file mode 100644 index 0000000000..a7d5c014ab --- /dev/null +++ b/target/linux/generic/backport-5.10/850-v5.17-0011-PCI-aardvark-Disable-common-PHY-when-unbinding-drive.patch @@ -0,0 +1,30 @@ +From fdbbe242c15a8f2cd0e3ad8a56cd0a447b771d0d Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Tue, 30 Nov 2021 18:29:13 +0100 +Subject: [PATCH] PCI: aardvark: Disable common PHY when unbinding driver +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Disable the PCIe PHY when unbinding driver. This should save some power. + +Link: https://lore.kernel.org/r/20211130172913.9727-12-kabel@kernel.org +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Signed-off-by: Lorenzo Pieralisi +--- + drivers/pci/controller/pci-aardvark.c | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1749,6 +1749,9 @@ static int advk_pcie_remove(struct platf + for (i = 0; i < OB_WIN_COUNT; i++) + advk_pcie_disable_ob_win(pcie, i); + ++ /* Disable phy */ ++ advk_pcie_disable_phy(pcie); ++ + return 0; + } + diff --git a/target/linux/generic/backport-5.10/851-v5.15-0001-phy-marvell-phy-mvebu-a3700-comphy-Rename-HS-SGMMI-t.patch b/target/linux/generic/backport-5.10/851-v5.15-0001-phy-marvell-phy-mvebu-a3700-comphy-Rename-HS-SGMMI-t.patch new file mode 100644 index 0000000000..4f867724ac --- /dev/null +++ b/target/linux/generic/backport-5.10/851-v5.15-0001-phy-marvell-phy-mvebu-a3700-comphy-Rename-HS-SGMMI-t.patch @@ -0,0 +1,67 @@ +From 40da06da15c1718b02072687bbfb2d08f5eb9399 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Fri, 27 Aug 2021 11:27:52 +0200 +Subject: [PATCH] phy: marvell: phy-mvebu-a3700-comphy: Rename HS-SGMMI to + 2500Base-X +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Comphy phy mode 0x3 is incorrectly named. It is not SGMII but rather +2500Base-X mode which runs at 3.125 Gbps speed. + +Rename macro names and comments to 2500Base-X. + +Signed-off-by: Pali Rohár +Fixes: 9695375a3f4a ("phy: add A3700 COMPHY support") +Signed-off-by: David S. Miller +--- + drivers/phy/marvell/phy-mvebu-a3700-comphy.c | 10 +++++----- + 1 file changed, 5 insertions(+), 5 deletions(-) + +--- a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c ++++ b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c +@@ -29,7 +29,7 @@ + + #define COMPHY_FW_MODE_SATA 0x1 + #define COMPHY_FW_MODE_SGMII 0x2 +-#define COMPHY_FW_MODE_HS_SGMII 0x3 ++#define COMPHY_FW_MODE_2500BASEX 0x3 + #define COMPHY_FW_MODE_USB3H 0x4 + #define COMPHY_FW_MODE_USB3D 0x5 + #define COMPHY_FW_MODE_PCIE 0x6 +@@ -40,7 +40,7 @@ + + #define COMPHY_FW_SPEED_1_25G 0 /* SGMII 1G */ + #define COMPHY_FW_SPEED_2_5G 1 +-#define COMPHY_FW_SPEED_3_125G 2 /* SGMII 2.5G */ ++#define COMPHY_FW_SPEED_3_125G 2 /* 2500BASE-X */ + #define COMPHY_FW_SPEED_5G 3 + #define COMPHY_FW_SPEED_5_15625G 4 /* XFI 5G */ + #define COMPHY_FW_SPEED_6G 5 +@@ -84,14 +84,14 @@ static const struct mvebu_a3700_comphy_c + MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_SGMII, 1, + COMPHY_FW_MODE_SGMII), + MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_2500BASEX, 1, +- COMPHY_FW_MODE_HS_SGMII), ++ COMPHY_FW_MODE_2500BASEX), + /* lane 1 */ + MVEBU_A3700_COMPHY_CONF_GEN(1, PHY_MODE_PCIE, 0, + COMPHY_FW_MODE_PCIE), + MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_SGMII, 0, + COMPHY_FW_MODE_SGMII), + MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_2500BASEX, 0, +- COMPHY_FW_MODE_HS_SGMII), ++ COMPHY_FW_MODE_2500BASEX), + /* lane 2 */ + MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_SATA, 0, + COMPHY_FW_MODE_SATA), +@@ -205,7 +205,7 @@ static int mvebu_a3700_comphy_power_on(s + COMPHY_FW_SPEED_1_25G); + break; + case PHY_INTERFACE_MODE_2500BASEX: +- dev_dbg(lane->dev, "set lane %d to HS SGMII mode\n", ++ dev_dbg(lane->dev, "set lane %d to 2500BASEX mode\n", + lane->id); + fw_param = COMPHY_FW_NET(fw_mode, lane->port, + COMPHY_FW_SPEED_3_125G); diff --git a/target/linux/generic/backport-5.10/851-v5.15-0002-phy-marvell-phy-mvebu-a3700-comphy-Remove-unsupporte.patch b/target/linux/generic/backport-5.10/851-v5.15-0002-phy-marvell-phy-mvebu-a3700-comphy-Remove-unsupporte.patch new file mode 100644 index 0000000000..99f56f1c57 --- /dev/null +++ b/target/linux/generic/backport-5.10/851-v5.15-0002-phy-marvell-phy-mvebu-a3700-comphy-Remove-unsupporte.patch @@ -0,0 +1,40 @@ +From e1dbe9ecf621b6f71f3d2df3e50731d583f3d27f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Fri, 27 Aug 2021 11:27:53 +0200 +Subject: [PATCH] phy: marvell: phy-mvebu-a3700-comphy: Remove unsupported + modes +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Armada 3700 does not support RXAUI, XFI and neither SFI. Remove unused +macros for these unsupported modes. + +Signed-off-by: Pali Rohár +Fixes: 9695375a3f4a ("phy: add A3700 COMPHY support") +Signed-off-by: David S. Miller +--- + drivers/phy/marvell/phy-mvebu-a3700-comphy.c | 6 ------ + 1 file changed, 6 deletions(-) + +--- a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c ++++ b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c +@@ -33,18 +33,12 @@ + #define COMPHY_FW_MODE_USB3H 0x4 + #define COMPHY_FW_MODE_USB3D 0x5 + #define COMPHY_FW_MODE_PCIE 0x6 +-#define COMPHY_FW_MODE_RXAUI 0x7 +-#define COMPHY_FW_MODE_XFI 0x8 +-#define COMPHY_FW_MODE_SFI 0x9 + #define COMPHY_FW_MODE_USB3 0xa + + #define COMPHY_FW_SPEED_1_25G 0 /* SGMII 1G */ + #define COMPHY_FW_SPEED_2_5G 1 + #define COMPHY_FW_SPEED_3_125G 2 /* 2500BASE-X */ + #define COMPHY_FW_SPEED_5G 3 +-#define COMPHY_FW_SPEED_5_15625G 4 /* XFI 5G */ +-#define COMPHY_FW_SPEED_6G 5 +-#define COMPHY_FW_SPEED_10_3125G 6 /* XFI 10G */ + #define COMPHY_FW_SPEED_MAX 0x3F + + #define COMPHY_FW_MODE(mode) ((mode) << 12) diff --git a/target/linux/generic/pending-5.10/402-mtd-spi-nor-write-support-for-minor-aligned-partitions.patch b/target/linux/generic/pending-5.10/402-mtd-spi-nor-write-support-for-minor-aligned-partitions.patch index fe92530081..eaf96e9534 100644 --- a/target/linux/generic/pending-5.10/402-mtd-spi-nor-write-support-for-minor-aligned-partitions.patch +++ b/target/linux/generic/pending-5.10/402-mtd-spi-nor-write-support-for-minor-aligned-partitions.patch @@ -214,11 +214,9 @@ Reported-by: Dan Carpenter include/linux/mtd/mtd.h | 2 ++ 4 files changed, 60 insertions(+), 14 deletions(-) -diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c -index 665fd9020b76..fe7626b5020e 100644 --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c -@@ -38,10 +38,11 @@ static struct mtd_info *allocate_partition(struct mtd_info *parent, +@@ -40,10 +40,11 @@ static struct mtd_info *allocate_partiti struct mtd_info *master = mtd_get_master(parent); int wr_alignment = (parent->flags & MTD_NO_ERASE) ? master->writesize : master->erasesize; @@ -231,7 +229,7 @@ index 665fd9020b76..fe7626b5020e 100644 char *name; u64 tmp; -@@ -143,6 +144,7 @@ static struct mtd_info *allocate_partition(struct mtd_info *parent, +@@ -145,6 +146,7 @@ static struct mtd_info *allocate_partiti int i, max = parent->numeraseregions; u64 end = child->part.offset + child->part.size; struct mtd_erase_region_info *regions = parent->eraseregions; @@ -239,7 +237,7 @@ index 665fd9020b76..fe7626b5020e 100644 /* Find the first erase regions which is part of this * partition. */ -@@ -153,15 +155,24 @@ static struct mtd_info *allocate_partition(struct mtd_info *parent, +@@ -155,15 +157,24 @@ static struct mtd_info *allocate_partiti if (i > 0) i--; @@ -265,7 +263,7 @@ index 665fd9020b76..fe7626b5020e 100644 } /* -@@ -169,26 +180,43 @@ static struct mtd_info *allocate_partition(struct mtd_info *parent, +@@ -171,26 +182,43 @@ static struct mtd_info *allocate_partiti * exposes several regions with different erasesize. Adjust * wr_alignment accordingly. */ @@ -319,8 +317,6 @@ index 665fd9020b76..fe7626b5020e 100644 } child->size = child->part.size; -diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig -index 24cd25de2b8b..09df9f1a8127 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -10,6 +10,16 @@ menuconfig MTD_SPI_NOR @@ -340,11 +336,9 @@ index 24cd25de2b8b..09df9f1a8127 100644 config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y -diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c -index bd2c7717eb10..43d9b54e7edd 100644 --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c -@@ -1262,6 +1262,8 @@ static u8 spi_nor_convert_3to4_erase(u8 opcode) +@@ -1075,6 +1075,8 @@ static u8 spi_nor_convert_3to4_erase(u8 static bool spi_nor_has_uniform_erase(const struct spi_nor *nor) { @@ -353,7 +347,7 @@ index bd2c7717eb10..43d9b54e7edd 100644 return !!nor->params->erase_map.uniform_erase_type; } -@@ -2381,6 +2383,7 @@ static int spi_nor_select_erase(struct spi_nor *nor) +@@ -2560,6 +2562,7 @@ static int spi_nor_select_erase(struct s { struct spi_nor_erase_map *map = &nor->params->erase_map; const struct spi_nor_erase_type *erase = NULL; @@ -361,7 +355,7 @@ index bd2c7717eb10..43d9b54e7edd 100644 struct mtd_info *mtd = &nor->mtd; u32 wanted_size = nor->info->sector_size; int i; -@@ -2413,8 +2416,9 @@ static int spi_nor_select_erase(struct spi_nor *nor) +@@ -2592,8 +2595,9 @@ static int spi_nor_select_erase(struct s */ for (i = SNOR_ERASE_TYPE_MAX - 1; i >= 0; i--) { if (map->erase_type[i].size) { @@ -373,7 +367,7 @@ index bd2c7717eb10..43d9b54e7edd 100644 } } -@@ -2422,6 +2426,8 @@ static int spi_nor_select_erase(struct spi_nor *nor) +@@ -2601,6 +2605,8 @@ static int spi_nor_select_erase(struct s return -EINVAL; mtd->erasesize = erase->size; @@ -382,11 +376,9 @@ index bd2c7717eb10..43d9b54e7edd 100644 return 0; } -diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h -index a89955f3cbc8..33eafa27da50 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h -@@ -243,6 +243,8 @@ struct mtd_info { +@@ -242,6 +242,8 @@ struct mtd_info { * information below if they desire */ uint32_t erasesize; diff --git a/target/linux/generic/pending-5.10/470-mtd-spi-nor-support-limiting-4K-sectors-support-base.patch b/target/linux/generic/pending-5.10/470-mtd-spi-nor-support-limiting-4K-sectors-support-base.patch index d000094e1d..2748192dd2 100644 --- a/target/linux/generic/pending-5.10/470-mtd-spi-nor-support-limiting-4K-sectors-support-base.patch +++ b/target/linux/generic/pending-5.10/470-mtd-spi-nor-support-limiting-4K-sectors-support-base.patch @@ -19,7 +19,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig -@@ -24,6 +24,17 @@ config MTD_SPI_NOR_USE_4K_SECTORS +@@ -34,6 +34,17 @@ config MTD_SPI_NOR_USE_4K_SECTORS Please note that some tools/drivers/filesystems may not work with 4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum). @@ -39,7 +39,7 @@ Signed-off-by: Felix Fietkau endif # MTD_SPI_NOR --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c -@@ -2786,6 +2786,21 @@ static void spi_nor_info_init_params(str +@@ -2792,6 +2792,21 @@ static void spi_nor_info_init_params(str */ erase_mask = 0; i = 0; @@ -61,7 +61,7 @@ Signed-off-by: Felix Fietkau if (info->flags & SECT_4K_PMC) { erase_mask |= BIT(i); spi_nor_set_erase_type(&map->erase_type[i], 4096u, -@@ -2797,6 +2812,7 @@ static void spi_nor_info_init_params(str +@@ -2803,6 +2818,7 @@ static void spi_nor_info_init_params(str SPINOR_OP_BE_4K); i++; } diff --git a/target/linux/generic/pending-5.10/479-mtd-spi-nor-add-xtx-xt25f128b.patch b/target/linux/generic/pending-5.10/479-mtd-spi-nor-add-xtx-xt25f128b.patch index 9ff6ffae58..796bf6becb 100644 --- a/target/linux/generic/pending-5.10/479-mtd-spi-nor-add-xtx-xt25f128b.patch +++ b/target/linux/generic/pending-5.10/479-mtd-spi-nor-add-xtx-xt25f128b.patch @@ -59,7 +59,7 @@ Signed-off-by: Felix Fietkau +}; --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c -@@ -2026,6 +2026,7 @@ static const struct spi_nor_manufacturer +@@ -2028,6 +2028,7 @@ static const struct spi_nor_manufacturer &spi_nor_winbond, &spi_nor_xilinx, &spi_nor_xmc, diff --git a/target/linux/generic/pending-5.10/481-mtd-spi-nor-rework-broken-flash-reset-support.patch b/target/linux/generic/pending-5.10/481-mtd-spi-nor-rework-broken-flash-reset-support.patch index 5cb85172fb..d0e9963b93 100644 --- a/target/linux/generic/pending-5.10/481-mtd-spi-nor-rework-broken-flash-reset-support.patch +++ b/target/linux/generic/pending-5.10/481-mtd-spi-nor-rework-broken-flash-reset-support.patch @@ -19,7 +19,7 @@ Signed-off-by: Chuanhong Guo --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c -@@ -1447,6 +1447,23 @@ destroy_erase_cmd_list: +@@ -1449,6 +1449,23 @@ destroy_erase_cmd_list: return ret; } @@ -43,7 +43,7 @@ Signed-off-by: Chuanhong Guo /* * Erase an address range on the nor chip. The address range may extend * one or more erase sectors. Return an error is there is a problem erasing. -@@ -1474,6 +1491,10 @@ static int spi_nor_erase(struct mtd_info +@@ -1476,6 +1493,10 @@ static int spi_nor_erase(struct mtd_info if (ret) return ret; @@ -54,7 +54,7 @@ Signed-off-by: Chuanhong Guo /* whole-chip erase? */ if (len == mtd->size && !(nor->flags & SNOR_F_NO_OP_CHIP_ERASE)) { unsigned long timeout; -@@ -1533,6 +1554,7 @@ static int spi_nor_erase(struct mtd_info +@@ -1535,6 +1556,7 @@ static int spi_nor_erase(struct mtd_info ret = spi_nor_write_disable(nor); erase_err: @@ -62,7 +62,7 @@ Signed-off-by: Chuanhong Guo spi_nor_unlock_and_unprep(nor); return ret; -@@ -1872,7 +1894,9 @@ static int spi_nor_lock(struct mtd_info +@@ -1874,7 +1896,9 @@ static int spi_nor_lock(struct mtd_info if (ret) return ret; @@ -72,7 +72,7 @@ Signed-off-by: Chuanhong Guo spi_nor_unlock_and_unprep(nor); return ret; -@@ -1887,7 +1911,9 @@ static int spi_nor_unlock(struct mtd_inf +@@ -1889,7 +1913,9 @@ static int spi_nor_unlock(struct mtd_inf if (ret) return ret; @@ -82,7 +82,7 @@ Signed-off-by: Chuanhong Guo spi_nor_unlock_and_unprep(nor); return ret; -@@ -1902,7 +1928,9 @@ static int spi_nor_is_locked(struct mtd_ +@@ -1904,7 +1930,9 @@ static int spi_nor_is_locked(struct mtd_ if (ret) return ret; @@ -92,7 +92,7 @@ Signed-off-by: Chuanhong Guo spi_nor_unlock_and_unprep(nor); return ret; -@@ -2095,6 +2123,10 @@ static int spi_nor_read(struct mtd_info +@@ -2097,6 +2125,10 @@ static int spi_nor_read(struct mtd_info if (ret) return ret; @@ -103,7 +103,7 @@ Signed-off-by: Chuanhong Guo while (len) { loff_t addr = from; -@@ -2118,6 +2150,7 @@ static int spi_nor_read(struct mtd_info +@@ -2120,6 +2152,7 @@ static int spi_nor_read(struct mtd_info ret = 0; read_err: @@ -111,7 +111,7 @@ Signed-off-by: Chuanhong Guo spi_nor_unlock_and_unprep(nor); return ret; } -@@ -2140,6 +2173,10 @@ static int spi_nor_write(struct mtd_info +@@ -2142,6 +2175,10 @@ static int spi_nor_write(struct mtd_info if (ret) return ret; @@ -122,7 +122,7 @@ Signed-off-by: Chuanhong Guo for (i = 0; i < len; ) { ssize_t written; loff_t addr = to + i; -@@ -2182,6 +2219,7 @@ static int spi_nor_write(struct mtd_info +@@ -2184,6 +2221,7 @@ static int spi_nor_write(struct mtd_info } write_err: @@ -130,7 +130,7 @@ Signed-off-by: Chuanhong Guo spi_nor_unlock_and_unprep(nor); return ret; } -@@ -2977,9 +3015,13 @@ static int spi_nor_init(struct spi_nor * +@@ -2983,9 +3021,13 @@ static int spi_nor_init(struct spi_nor * * reboots (e.g., crashes). Warn the user (or hopefully, system * designer) that this is bad. */ diff --git a/target/linux/generic/pending-5.10/495-mtd-core-add-get_mtd_device_by_node.patch b/target/linux/generic/pending-5.10/495-mtd-core-add-get_mtd_device_by_node.patch index 22c3ba56d4..d5db5fdd54 100644 --- a/target/linux/generic/pending-5.10/495-mtd-core-add-get_mtd_device_by_node.patch +++ b/target/linux/generic/pending-5.10/495-mtd-core-add-get_mtd_device_by_node.patch @@ -64,7 +64,7 @@ Reviewed-by: Miquel Raynal mutex_lock(&mtd_table_mutex); --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h -@@ -696,6 +696,8 @@ extern struct mtd_info *get_mtd_device(s +@@ -698,6 +698,8 @@ extern struct mtd_info *get_mtd_device(s extern int __get_mtd_device(struct mtd_info *mtd); extern void __put_mtd_device(struct mtd_info *mtd); extern struct mtd_info *get_mtd_device_nm(const char *name); diff --git a/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch index 350a0f4596..a2d84ac9a1 100644 --- a/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch +++ b/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch @@ -185,7 +185,7 @@ Signed-off-by: Jonas Gorski cfg->fc_flags |= RTF_REJECT; if (rtm->rtm_type == RTN_LOCAL) -@@ -6099,6 +6130,8 @@ static int ip6_route_dev_notify(struct n +@@ -6127,6 +6158,8 @@ static int ip6_route_dev_notify(struct n #ifdef CONFIG_IPV6_MULTIPLE_TABLES net->ipv6.ip6_prohibit_entry->dst.dev = dev; net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev); @@ -194,7 +194,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_blk_hole_entry->dst.dev = dev; net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev); #endif -@@ -6110,6 +6143,7 @@ static int ip6_route_dev_notify(struct n +@@ -6138,6 +6171,7 @@ static int ip6_route_dev_notify(struct n in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev); #ifdef CONFIG_IPV6_MULTIPLE_TABLES in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev); @@ -202,7 +202,7 @@ Signed-off-by: Jonas Gorski in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev); #endif } -@@ -6301,6 +6335,8 @@ static int __net_init ip6_route_net_init +@@ -6329,6 +6363,8 @@ static int __net_init ip6_route_net_init #ifdef CONFIG_IPV6_MULTIPLE_TABLES net->ipv6.fib6_has_custom_rules = false; @@ -211,7 +211,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template, sizeof(*net->ipv6.ip6_prohibit_entry), GFP_KERNEL); -@@ -6311,11 +6347,21 @@ static int __net_init ip6_route_net_init +@@ -6339,11 +6375,21 @@ static int __net_init ip6_route_net_init ip6_template_metrics, true); INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached); @@ -234,7 +234,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops; dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst, ip6_template_metrics, true); -@@ -6342,6 +6388,8 @@ out: +@@ -6370,6 +6416,8 @@ out: return ret; #ifdef CONFIG_IPV6_MULTIPLE_TABLES @@ -243,7 +243,7 @@ Signed-off-by: Jonas Gorski out_ip6_prohibit_entry: kfree(net->ipv6.ip6_prohibit_entry); out_ip6_null_entry: -@@ -6361,6 +6409,7 @@ static void __net_exit ip6_route_net_exi +@@ -6389,6 +6437,7 @@ static void __net_exit ip6_route_net_exi kfree(net->ipv6.ip6_null_entry); #ifdef CONFIG_IPV6_MULTIPLE_TABLES kfree(net->ipv6.ip6_prohibit_entry); @@ -251,7 +251,7 @@ Signed-off-by: Jonas Gorski kfree(net->ipv6.ip6_blk_hole_entry); #endif dst_entries_destroy(&net->ipv6.ip6_dst_ops); -@@ -6438,6 +6487,9 @@ void __init ip6_route_init_special_entri +@@ -6466,6 +6515,9 @@ void __init ip6_route_init_special_entri init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev; init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); diff --git a/target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch b/target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch new file mode 100644 index 0000000000..c6d964eaa9 --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0001-PCI-aardvark-Replace-custom-PCIE_CORE_INT_-macros-wi.patch @@ -0,0 +1,40 @@ +From 43f3f187e6f62ca40802afe39495c8a3e20b4bfa Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Mon, 10 Jan 2022 01:50:50 +0100 +Subject: [PATCH] PCI: aardvark: Replace custom PCIE_CORE_INT_* macros with + PCI_INTERRUPT_* +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Header file linux/pci.h defines enum pci_interrupt_pin with corresponding +PCI_INTERRUPT_* values. + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 6 +----- + 1 file changed, 1 insertion(+), 5 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -37,10 +37,6 @@ + #define PCIE_CORE_ERR_CAPCTL_ECRC_CHK_TX_EN BIT(6) + #define PCIE_CORE_ERR_CAPCTL_ECRC_CHCK BIT(7) + #define PCIE_CORE_ERR_CAPCTL_ECRC_CHCK_RCV BIT(8) +-#define PCIE_CORE_INT_A_ASSERT_ENABLE 1 +-#define PCIE_CORE_INT_B_ASSERT_ENABLE 2 +-#define PCIE_CORE_INT_C_ASSERT_ENABLE 3 +-#define PCIE_CORE_INT_D_ASSERT_ENABLE 4 + /* PIO registers base address and register offsets */ + #define PIO_BASE_ADDR 0x4000 + #define PIO_CTRL (PIO_BASE_ADDR + 0x0) +@@ -967,7 +963,7 @@ static int advk_sw_pci_bridge_init(struc + bridge->conf.pref_mem_limit = cpu_to_le16(PCI_PREF_RANGE_TYPE_64); + + /* Support interrupt A for MSI feature */ +- bridge->conf.intpin = PCIE_CORE_INT_A_ASSERT_ENABLE; ++ bridge->conf.intpin = PCI_INTERRUPT_INTA; + + /* Indicates supports for Completion Retry Status */ + bridge->pcie_conf.rootcap = cpu_to_le16(PCI_EXP_RTCAP_CRSVIS); diff --git a/target/linux/generic/pending-5.10/850-0002-PCI-aardvark-Fix-reading-MSI-interrupt-number.patch b/target/linux/generic/pending-5.10/850-0002-PCI-aardvark-Fix-reading-MSI-interrupt-number.patch new file mode 100644 index 0000000000..b2d32f5566 --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0002-PCI-aardvark-Fix-reading-MSI-interrupt-number.patch @@ -0,0 +1,57 @@ +From a29a7d01cd778854e08108461cba321a63d98871 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Fri, 2 Jul 2021 16:39:47 +0200 +Subject: [PATCH] PCI: aardvark: Fix reading MSI interrupt number +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +In advk_pcie_handle_msi() the authors expect that when bit i in the W1C +register PCIE_MSI_STATUS_REG is cleared, the PCIE_MSI_PAYLOAD_REG is +updated to contain the MSI number corresponding to index i. + +Experiments show that this is not so, and instead PCIE_MSI_PAYLOAD_REG +always contains the number of the last received MSI, overall. + +Do not read PCIE_MSI_PAYLOAD_REG register for determining MSI interrupt +number. Since Aardvark already forbids more than 32 interrupts and uses +own allocated hwirq numbers, the msi_idx already corresponds to the +received MSI number. + +Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver") +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 13 ++++++------- + 1 file changed, 6 insertions(+), 7 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1391,7 +1391,7 @@ static void advk_pcie_remove_irq_domain( + static void advk_pcie_handle_msi(struct advk_pcie *pcie) + { + u32 msi_val, msi_mask, msi_status, msi_idx; +- u16 msi_data; ++ int virq; + + msi_mask = advk_readl(pcie, PCIE_MSI_MASK_REG); + msi_val = advk_readl(pcie, PCIE_MSI_STATUS_REG); +@@ -1401,13 +1401,12 @@ static void advk_pcie_handle_msi(struct + if (!(BIT(msi_idx) & msi_status)) + continue; + +- /* +- * msi_idx contains bits [4:0] of the msi_data and msi_data +- * contains 16bit MSI interrupt number +- */ + advk_writel(pcie, BIT(msi_idx), PCIE_MSI_STATUS_REG); +- msi_data = advk_readl(pcie, PCIE_MSI_PAYLOAD_REG) & PCIE_MSI_DATA_MASK; +- generic_handle_irq(msi_data); ++ virq = irq_find_mapping(pcie->msi_inner_domain, msi_idx); ++ if (virq) ++ generic_handle_irq(virq); ++ else ++ dev_err_ratelimited(&pcie->pdev->dev, "unexpected MSI 0x%02x\n", msi_idx); + } + + advk_writel(pcie, PCIE_ISR0_MSI_INT_PENDING, diff --git a/target/linux/generic/pending-5.10/850-0003-PCI-aardvark-Fix-support-for-MSI-interrupts.patch b/target/linux/generic/pending-5.10/850-0003-PCI-aardvark-Fix-support-for-MSI-interrupts.patch new file mode 100644 index 0000000000..0f1183ac4e --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0003-PCI-aardvark-Fix-support-for-MSI-interrupts.patch @@ -0,0 +1,72 @@ +From bb03b126ea6c9e57177b537dd022246fa5dbef16 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Fri, 12 Feb 2021 16:24:07 +0100 +Subject: [PATCH] PCI: aardvark: Fix support for MSI interrupts +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Aardvark hardware supports Multi-MSI and MSI_FLAG_MULTI_PCI_MSI is already +set for the MSI chip. But when allocating MSI interrupt numbers for +Multi-MSI, the numbers need to be properly aligned, otherwise endpoint +devices send MSI interrupt with incorrect numbers. + +Fix this issue by using function bitmap_find_free_region() instead of +bitmap_find_next_zero_area(). + +To ensure that aligned MSI interrupt numbers are used by endpoint devices, +we cannot use Linux virtual irq numbers (as they are random and not +properly aligned). Instead we need to use the aligned hwirq numbers. + +This change fixes receiving MSI interrupts on Armada 3720 boards and +allows using NVMe disks which use Multi-MSI feature with 3 interrupts. + +Without this NVMe disks freeze booting as linux nvme-core.c is waiting +60s for an interrupt. + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 16 ++++++---------- + 1 file changed, 6 insertions(+), 10 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1187,7 +1187,7 @@ static void advk_msi_irq_compose_msi_msg + + msg->address_lo = lower_32_bits(msi_msg); + msg->address_hi = upper_32_bits(msi_msg); +- msg->data = data->irq; ++ msg->data = data->hwirq; + } + + static int advk_msi_set_affinity(struct irq_data *irq_data, +@@ -1204,15 +1204,11 @@ static int advk_msi_irq_domain_alloc(str + int hwirq, i; + + mutex_lock(&pcie->msi_used_lock); +- hwirq = bitmap_find_next_zero_area(pcie->msi_used, MSI_IRQ_NUM, +- 0, nr_irqs, 0); +- if (hwirq >= MSI_IRQ_NUM) { +- mutex_unlock(&pcie->msi_used_lock); +- return -ENOSPC; +- } +- +- bitmap_set(pcie->msi_used, hwirq, nr_irqs); ++ hwirq = bitmap_find_free_region(pcie->msi_used, MSI_IRQ_NUM, ++ order_base_2(nr_irqs)); + mutex_unlock(&pcie->msi_used_lock); ++ if (hwirq < 0) ++ return -ENOSPC; + + for (i = 0; i < nr_irqs; i++) + irq_domain_set_info(domain, virq + i, hwirq + i, +@@ -1230,7 +1226,7 @@ static void advk_msi_irq_domain_free(str + struct advk_pcie *pcie = domain->host_data; + + mutex_lock(&pcie->msi_used_lock); +- bitmap_clear(pcie->msi_used, d->hwirq, nr_irqs); ++ bitmap_release_region(pcie->msi_used, d->hwirq, order_base_2(nr_irqs)); + mutex_unlock(&pcie->msi_used_lock); + } + diff --git a/target/linux/generic/pending-5.10/850-0004-PCI-aardvark-Rewrite-IRQ-code-to-chained-IRQ-handler.patch b/target/linux/generic/pending-5.10/850-0004-PCI-aardvark-Rewrite-IRQ-code-to-chained-IRQ-handler.patch new file mode 100644 index 0000000000..e6ae3602ca --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0004-PCI-aardvark-Rewrite-IRQ-code-to-chained-IRQ-handler.patch @@ -0,0 +1,125 @@ +From 0cd5141d1866afb23286fe90cd846441fe7aeb39 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Sat, 27 Mar 2021 14:44:11 +0100 +Subject: [PATCH] PCI: aardvark: Rewrite IRQ code to chained IRQ handler +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Rewrite the code to use irq_set_chained_handler_and_data() handler with +chained_irq_enter() and chained_irq_exit() processing instead of using +devm_request_irq(). + +advk_pcie_irq_handler() reads IRQ status bits and calls other functions +based on which bits are set. These functions then read its own IRQ status +bits and calls other aardvark functions based on these bits. Finally +generic_handle_domain_irq() with translated linux IRQ numbers are called. + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 48 +++++++++++++++------------ + 1 file changed, 26 insertions(+), 22 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -275,6 +275,7 @@ struct advk_pcie { + u32 actions; + } wins[OB_WIN_COUNT]; + u8 wins_count; ++ int irq; + struct irq_domain *irq_domain; + struct irq_chip irq_chip; + raw_spinlock_t irq_lock; +@@ -1440,21 +1441,26 @@ static void advk_pcie_handle_int(struct + } + } + +-static irqreturn_t advk_pcie_irq_handler(int irq, void *arg) ++static void advk_pcie_irq_handler(struct irq_desc *desc) + { +- struct advk_pcie *pcie = arg; +- u32 status; ++ struct advk_pcie *pcie = irq_desc_get_handler_data(desc); ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ u32 val, mask, status; + +- status = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG); +- if (!(status & PCIE_IRQ_CORE_INT)) +- return IRQ_NONE; ++ chained_irq_enter(chip, desc); + +- advk_pcie_handle_int(pcie); ++ val = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG); ++ mask = advk_readl(pcie, HOST_CTRL_INT_MASK_REG); ++ status = val & ((~mask) & PCIE_IRQ_ALL_MASK); + +- /* Clear interrupt */ +- advk_writel(pcie, PCIE_IRQ_CORE_INT, HOST_CTRL_INT_STATUS_REG); ++ if (status & PCIE_IRQ_CORE_INT) { ++ advk_pcie_handle_int(pcie); + +- return IRQ_HANDLED; ++ /* Clear interrupt */ ++ advk_writel(pcie, PCIE_IRQ_CORE_INT, HOST_CTRL_INT_STATUS_REG); ++ } ++ ++ chained_irq_exit(chip, desc); + } + + static void __maybe_unused advk_pcie_disable_phy(struct advk_pcie *pcie) +@@ -1521,7 +1527,7 @@ static int advk_pcie_probe(struct platfo + struct advk_pcie *pcie; + struct pci_host_bridge *bridge; + struct resource_entry *entry; +- int ret, irq; ++ int ret; + + bridge = devm_pci_alloc_host_bridge(dev, sizeof(struct advk_pcie)); + if (!bridge) +@@ -1609,17 +1615,9 @@ static int advk_pcie_probe(struct platfo + if (IS_ERR(pcie->base)) + return PTR_ERR(pcie->base); + +- irq = platform_get_irq(pdev, 0); +- if (irq < 0) +- return irq; +- +- ret = devm_request_irq(dev, irq, advk_pcie_irq_handler, +- IRQF_SHARED | IRQF_NO_THREAD, "advk-pcie", +- pcie); +- if (ret) { +- dev_err(dev, "Failed to register interrupt\n"); +- return ret; +- } ++ pcie->irq = platform_get_irq(pdev, 0); ++ if (pcie->irq < 0) ++ return pcie->irq; + + pcie->reset_gpio = devm_gpiod_get_from_of_node(dev, dev->of_node, + "reset-gpios", 0, +@@ -1668,11 +1666,14 @@ static int advk_pcie_probe(struct platfo + return ret; + } + ++ irq_set_chained_handler_and_data(pcie->irq, advk_pcie_irq_handler, pcie); ++ + bridge->sysdata = pcie; + bridge->ops = &advk_pcie_ops; + + ret = pci_host_probe(bridge); + if (ret < 0) { ++ irq_set_chained_handler_and_data(pcie->irq, NULL, NULL); + advk_pcie_remove_msi_irq_domain(pcie); + advk_pcie_remove_irq_domain(pcie); + return ret; +@@ -1720,6 +1721,9 @@ static int advk_pcie_remove(struct platf + advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG); + advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG); + ++ /* Remove IRQ handler */ ++ irq_set_chained_handler_and_data(pcie->irq, NULL, NULL); ++ + /* Remove IRQ domains */ + advk_pcie_remove_msi_irq_domain(pcie); + advk_pcie_remove_irq_domain(pcie); diff --git a/target/linux/generic/pending-5.10/850-0005-PCI-aardvark-Check-return-value-of-generic_handle_do.patch b/target/linux/generic/pending-5.10/850-0005-PCI-aardvark-Check-return-value-of-generic_handle_do.patch new file mode 100644 index 0000000000..66e9b32e4d --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0005-PCI-aardvark-Check-return-value-of-generic_handle_do.patch @@ -0,0 +1,31 @@ +From 69c1f2c6f45a556361fd8e8d2d4eb20e2c8d3d95 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Thu, 18 Mar 2021 17:04:32 +0100 +Subject: [PATCH] PCI: aardvark: Check return value of + generic_handle_domain_irq() when processing INTx IRQ +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +It is possible that we receive spurious INTx interrupt. Check for the +return value of generic_handle_domain_irq() when processing INTx IRQ. + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1437,7 +1437,9 @@ static void advk_pcie_handle_int(struct + PCIE_ISR1_REG); + + virq = irq_find_mapping(pcie->irq_domain, i); +- generic_handle_irq(virq); ++ if (generic_handle_irq(virq) == -EINVAL) ++ dev_err_ratelimited(&pcie->pdev->dev, "unexpected INT%c IRQ\n", ++ (char)i + 'A'); + } + } + diff --git a/target/linux/generic/pending-5.10/850-0006-PCI-aardvark-Make-MSI-irq_chip-structures-static-dri.patch b/target/linux/generic/pending-5.10/850-0006-PCI-aardvark-Make-MSI-irq_chip-structures-static-dri.patch new file mode 100644 index 0000000000..13734cd8fa --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0006-PCI-aardvark-Make-MSI-irq_chip-structures-static-dri.patch @@ -0,0 +1,93 @@ +From 5eb36a6b9508da442aac80f4df23e3951bbfa7aa Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Marek=20Beh=C3=BAn?= +Date: Mon, 10 Jan 2022 00:03:41 +0100 +Subject: [PATCH] PCI: aardvark: Make MSI irq_chip structures static driver + structures +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Marc Zyngier says [1] that we should use struct irq_chip as a global +static struct in the driver. Even though the structure currently +contains a dynamic member (parent_device), Marc says [2] that he plans +to kill it and make the structure completely static. + +Convert Aardvark's priv->msi_bottom_irq_chip and priv->msi_irq_chip to +static driver structure. + +[1] https://lore.kernel.org/linux-pci/877dbcvngf.wl-maz@kernel.org/ +[2] https://lore.kernel.org/linux-pci/874k6gvkhz.wl-maz@kernel.org/ + +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 26 ++++++++++++-------------- + 1 file changed, 12 insertions(+), 14 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -281,8 +281,6 @@ struct advk_pcie { + raw_spinlock_t irq_lock; + struct irq_domain *msi_domain; + struct irq_domain *msi_inner_domain; +- struct irq_chip msi_bottom_irq_chip; +- struct irq_chip msi_irq_chip; + struct msi_domain_info msi_domain_info; + DECLARE_BITMAP(msi_used, MSI_IRQ_NUM); + struct mutex msi_used_lock; +@@ -1197,6 +1195,12 @@ static int advk_msi_set_affinity(struct + return -EINVAL; + } + ++static struct irq_chip advk_msi_bottom_irq_chip = { ++ .name = "MSI", ++ .irq_compose_msi_msg = advk_msi_irq_compose_msi_msg, ++ .irq_set_affinity = advk_msi_set_affinity, ++}; ++ + static int advk_msi_irq_domain_alloc(struct irq_domain *domain, + unsigned int virq, + unsigned int nr_irqs, void *args) +@@ -1213,7 +1217,7 @@ static int advk_msi_irq_domain_alloc(str + + for (i = 0; i < nr_irqs; i++) + irq_domain_set_info(domain, virq + i, hwirq + i, +- &pcie->msi_bottom_irq_chip, ++ &advk_msi_bottom_irq_chip, + domain->host_data, handle_simple_irq, + NULL, NULL); + +@@ -1283,29 +1287,23 @@ static const struct irq_domain_ops advk_ + .xlate = irq_domain_xlate_onecell, + }; + ++static struct irq_chip advk_msi_irq_chip = { ++ .name = "advk-MSI", ++}; ++ + static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie) + { + struct device *dev = &pcie->pdev->dev; + struct device_node *node = dev->of_node; +- struct irq_chip *bottom_ic, *msi_ic; + struct msi_domain_info *msi_di; + phys_addr_t msi_msg_phys; + + mutex_init(&pcie->msi_used_lock); + +- bottom_ic = &pcie->msi_bottom_irq_chip; +- +- bottom_ic->name = "MSI"; +- bottom_ic->irq_compose_msi_msg = advk_msi_irq_compose_msi_msg; +- bottom_ic->irq_set_affinity = advk_msi_set_affinity; +- +- msi_ic = &pcie->msi_irq_chip; +- msi_ic->name = "advk-MSI"; +- + msi_di = &pcie->msi_domain_info; + msi_di->flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | + MSI_FLAG_MULTI_PCI_MSI; +- msi_di->chip = msi_ic; ++ msi_di->chip = &advk_msi_irq_chip; + + msi_msg_phys = virt_to_phys(&pcie->msi_msg); + diff --git a/target/linux/generic/pending-5.10/850-0007-PCI-aardvark-Make-msi_domain_info-structure-a-static.patch b/target/linux/generic/pending-5.10/850-0007-PCI-aardvark-Make-msi_domain_info-structure-a-static.patch new file mode 100644 index 0000000000..54cb4cf790 --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0007-PCI-aardvark-Make-msi_domain_info-structure-a-static.patch @@ -0,0 +1,64 @@ +From c092ab8994f1f777054c0179a9deb40b87ee606f Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Marek=20Beh=C3=BAn?= +Date: Mon, 10 Jan 2022 00:10:46 +0100 +Subject: [PATCH] PCI: aardvark: Make msi_domain_info structure a static driver + structure +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Make Aardvark's msi_domain_info structure into a private driver structure. +Domain info is same for every potential instatination of a controller. + +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -281,7 +281,6 @@ struct advk_pcie { + raw_spinlock_t irq_lock; + struct irq_domain *msi_domain; + struct irq_domain *msi_inner_domain; +- struct msi_domain_info msi_domain_info; + DECLARE_BITMAP(msi_used, MSI_IRQ_NUM); + struct mutex msi_used_lock; + u16 msi_msg; +@@ -1291,20 +1290,20 @@ static struct irq_chip advk_msi_irq_chip + .name = "advk-MSI", + }; + ++static struct msi_domain_info advk_msi_domain_info = { ++ .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | ++ MSI_FLAG_MULTI_PCI_MSI, ++ .chip = &advk_msi_irq_chip, ++}; ++ + static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie) + { + struct device *dev = &pcie->pdev->dev; + struct device_node *node = dev->of_node; +- struct msi_domain_info *msi_di; + phys_addr_t msi_msg_phys; + + mutex_init(&pcie->msi_used_lock); + +- msi_di = &pcie->msi_domain_info; +- msi_di->flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | +- MSI_FLAG_MULTI_PCI_MSI; +- msi_di->chip = &advk_msi_irq_chip; +- + msi_msg_phys = virt_to_phys(&pcie->msi_msg); + + advk_writel(pcie, lower_32_bits(msi_msg_phys), +@@ -1320,7 +1319,8 @@ static int advk_pcie_init_msi_irq_domain + + pcie->msi_domain = + pci_msi_create_irq_domain(of_node_to_fwnode(node), +- msi_di, pcie->msi_inner_domain); ++ &advk_msi_domain_info, ++ pcie->msi_inner_domain); + if (!pcie->msi_domain) { + irq_domain_remove(pcie->msi_inner_domain); + return -ENOMEM; diff --git a/target/linux/generic/pending-5.10/850-0008-PCI-aardvark-Use-dev_fwnode-instead-of-of_node_to_fw.patch b/target/linux/generic/pending-5.10/850-0008-PCI-aardvark-Use-dev_fwnode-instead-of-of_node_to_fw.patch new file mode 100644 index 0000000000..7676855816 --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0008-PCI-aardvark-Use-dev_fwnode-instead-of-of_node_to_fw.patch @@ -0,0 +1,40 @@ +From 59029739d42b439628e2f64f3d8f2db9be97deff Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Marek=20Beh=C3=BAn?= +Date: Mon, 10 Jan 2022 00:15:17 +0100 +Subject: [PATCH] PCI: aardvark: Use dev_fwnode() instead of + of_node_to_fwnode(dev->of_node) +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Use simple + dev_fwnode(dev) +instead of + struct device_node *node = dev->of_node; + of_node_to_fwnode(node) +especially since the node variable is not used elsewhere in the function. + +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 3 +-- + 1 file changed, 1 insertion(+), 2 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1299,7 +1299,6 @@ static struct msi_domain_info advk_msi_d + static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie) + { + struct device *dev = &pcie->pdev->dev; +- struct device_node *node = dev->of_node; + phys_addr_t msi_msg_phys; + + mutex_init(&pcie->msi_used_lock); +@@ -1318,7 +1317,7 @@ static int advk_pcie_init_msi_irq_domain + return -ENOMEM; + + pcie->msi_domain = +- pci_msi_create_irq_domain(of_node_to_fwnode(node), ++ pci_msi_create_irq_domain(dev_fwnode(dev), + &advk_msi_domain_info, + pcie->msi_inner_domain); + if (!pcie->msi_domain) { diff --git a/target/linux/generic/pending-5.10/850-0009-PCI-aardvark-Refactor-unmasking-summary-MSI-interrup.patch b/target/linux/generic/pending-5.10/850-0009-PCI-aardvark-Refactor-unmasking-summary-MSI-interrup.patch new file mode 100644 index 0000000000..6cdaddc51c --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0009-PCI-aardvark-Refactor-unmasking-summary-MSI-interrup.patch @@ -0,0 +1,44 @@ +From 98feaf97bc64fc640a6c5b1394cd18fc7cd7dac8 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Sun, 28 Mar 2021 14:34:49 +0200 +Subject: [PATCH] PCI: aardvark: Refactor unmasking summary MSI interrupt +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Refactor the masking of ISR0/1 Sources and unmasking of summary MSI interrupt +so that it corresponds to the comments: +- first mask all ISR0/1 +- then unmask all MSIs +- then unmask summary MSI interrupt + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 10 ++++++---- + 1 file changed, 6 insertions(+), 4 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -578,15 +578,17 @@ static void advk_pcie_setup_hw(struct ad + advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG); + + /* Disable All ISR0/1 Sources */ +- reg = PCIE_ISR0_ALL_MASK; +- reg &= ~PCIE_ISR0_MSI_INT_PENDING; +- advk_writel(pcie, reg, PCIE_ISR0_MASK_REG); +- ++ advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_MASK_REG); + advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG); + + /* Unmask all MSIs */ + advk_writel(pcie, ~(u32)PCIE_MSI_ALL_MASK, PCIE_MSI_MASK_REG); + ++ /* Unmask summary MSI interrupt */ ++ reg = advk_readl(pcie, PCIE_ISR0_MASK_REG); ++ reg &= ~PCIE_ISR0_MSI_INT_PENDING; ++ advk_writel(pcie, reg, PCIE_ISR0_MASK_REG); ++ + /* Enable summary interrupt for GIC SPI source */ + reg = PCIE_IRQ_ALL_MASK & (~PCIE_IRQ_ENABLE_INTS_MASK); + advk_writel(pcie, reg, HOST_CTRL_INT_MASK_REG); diff --git a/target/linux/generic/pending-5.10/850-0010-PCI-aardvark-Add-support-for-masking-MSI-interrupts.patch b/target/linux/generic/pending-5.10/850-0010-PCI-aardvark-Add-support-for-masking-MSI-interrupts.patch new file mode 100644 index 0000000000..bc4cc7b4fc --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0010-PCI-aardvark-Add-support-for-masking-MSI-interrupts.patch @@ -0,0 +1,117 @@ +From 7f353accca6e4a3222991c65b1a6801503973bd3 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Fri, 2 Jul 2021 16:44:10 +0200 +Subject: [PATCH] PCI: aardvark: Add support for masking MSI interrupts +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +We should not unmask MSIs at setup, but only when kernel asks for them +to be unmasked. + +At setup, mask all MSIs, and implement IRQ chip callbacks for masking +and unmasking particular MSIs. + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 54 ++++++++++++++++++++++++--- + 1 file changed, 49 insertions(+), 5 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -281,6 +281,7 @@ struct advk_pcie { + raw_spinlock_t irq_lock; + struct irq_domain *msi_domain; + struct irq_domain *msi_inner_domain; ++ raw_spinlock_t msi_irq_lock; + DECLARE_BITMAP(msi_used, MSI_IRQ_NUM); + struct mutex msi_used_lock; + u16 msi_msg; +@@ -577,12 +578,10 @@ static void advk_pcie_setup_hw(struct ad + advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG); + advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG); + +- /* Disable All ISR0/1 Sources */ ++ /* Disable All ISR0/1 and MSI Sources */ + advk_writel(pcie, PCIE_ISR0_ALL_MASK, PCIE_ISR0_MASK_REG); + advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_MASK_REG); +- +- /* Unmask all MSIs */ +- advk_writel(pcie, ~(u32)PCIE_MSI_ALL_MASK, PCIE_MSI_MASK_REG); ++ advk_writel(pcie, PCIE_MSI_ALL_MASK, PCIE_MSI_MASK_REG); + + /* Unmask summary MSI interrupt */ + reg = advk_readl(pcie, PCIE_ISR0_MASK_REG); +@@ -1196,10 +1195,52 @@ static int advk_msi_set_affinity(struct + return -EINVAL; + } + ++static void advk_msi_irq_mask(struct irq_data *d) ++{ ++ struct advk_pcie *pcie = d->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(d); ++ unsigned long flags; ++ u32 mask; ++ ++ raw_spin_lock_irqsave(&pcie->msi_irq_lock, flags); ++ mask = advk_readl(pcie, PCIE_MSI_MASK_REG); ++ mask |= BIT(hwirq); ++ advk_writel(pcie, mask, PCIE_MSI_MASK_REG); ++ raw_spin_unlock_irqrestore(&pcie->msi_irq_lock, flags); ++} ++ ++static void advk_msi_irq_unmask(struct irq_data *d) ++{ ++ struct advk_pcie *pcie = d->domain->host_data; ++ irq_hw_number_t hwirq = irqd_to_hwirq(d); ++ unsigned long flags; ++ u32 mask; ++ ++ raw_spin_lock_irqsave(&pcie->msi_irq_lock, flags); ++ mask = advk_readl(pcie, PCIE_MSI_MASK_REG); ++ mask &= ~BIT(hwirq); ++ advk_writel(pcie, mask, PCIE_MSI_MASK_REG); ++ raw_spin_unlock_irqrestore(&pcie->msi_irq_lock, flags); ++} ++ ++static void advk_msi_top_irq_mask(struct irq_data *d) ++{ ++ pci_msi_mask_irq(d); ++ irq_chip_mask_parent(d); ++} ++ ++static void advk_msi_top_irq_unmask(struct irq_data *d) ++{ ++ pci_msi_unmask_irq(d); ++ irq_chip_unmask_parent(d); ++} ++ + static struct irq_chip advk_msi_bottom_irq_chip = { + .name = "MSI", + .irq_compose_msi_msg = advk_msi_irq_compose_msi_msg, + .irq_set_affinity = advk_msi_set_affinity, ++ .irq_mask = advk_msi_irq_mask, ++ .irq_unmask = advk_msi_irq_unmask, + }; + + static int advk_msi_irq_domain_alloc(struct irq_domain *domain, +@@ -1289,7 +1330,9 @@ static const struct irq_domain_ops advk_ + }; + + static struct irq_chip advk_msi_irq_chip = { +- .name = "advk-MSI", ++ .name = "advk-MSI", ++ .irq_mask = advk_msi_top_irq_mask, ++ .irq_unmask = advk_msi_top_irq_unmask, + }; + + static struct msi_domain_info advk_msi_domain_info = { +@@ -1303,6 +1346,7 @@ static int advk_pcie_init_msi_irq_domain + struct device *dev = &pcie->pdev->dev; + phys_addr_t msi_msg_phys; + ++ raw_spin_lock_init(&pcie->msi_irq_lock); + mutex_init(&pcie->msi_used_lock); + + msi_msg_phys = virt_to_phys(&pcie->msi_msg); diff --git a/target/linux/generic/pending-5.10/850-0011-PCI-aardvark-Fix-setting-MSI-address.patch b/target/linux/generic/pending-5.10/850-0011-PCI-aardvark-Fix-setting-MSI-address.patch new file mode 100644 index 0000000000..b5ddfdd97d --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0011-PCI-aardvark-Fix-setting-MSI-address.patch @@ -0,0 +1,91 @@ +From fa73c200f181436eab859374657c53a73778d8ad Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Fri, 26 Mar 2021 17:35:44 +0100 +Subject: [PATCH] PCI: aardvark: Fix setting MSI address +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +MSI address for receiving MSI interrupts needs to be correctly set before +enabling processing of MSI interrupts. + +Move code for setting PCIE_MSI_ADDR_LOW_REG and PCIE_MSI_ADDR_HIGH_REG +from advk_pcie_init_msi_irq_domain() to advk_pcie_setup_hw(), before +enabling PCIE_CORE_CTRL2_MSI_ENABLE. + +After this we can remove the now unused member msi_msg, which was used +only for MSI doorbell address. MSI address can be any address which cannot +be used to DMA to. So change it to the address of the main struct advk_pcie. + +Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver") +Signed-off-by: Pali Rohár +Acked-by: Marc Zyngier +Signed-off-by: Marek Behún +Cc: stable@vger.kernel.org # f21a8b1b6837 ("PCI: aardvark: Move to MSI handling using generic MSI support") +--- + drivers/pci/controller/pci-aardvark.c | 21 +++++++++------------ + 1 file changed, 9 insertions(+), 12 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -284,7 +284,6 @@ struct advk_pcie { + raw_spinlock_t msi_irq_lock; + DECLARE_BITMAP(msi_used, MSI_IRQ_NUM); + struct mutex msi_used_lock; +- u16 msi_msg; + int link_gen; + struct pci_bridge_emul bridge; + struct gpio_desc *reset_gpio; +@@ -479,6 +478,7 @@ static void advk_pcie_disable_ob_win(str + + static void advk_pcie_setup_hw(struct advk_pcie *pcie) + { ++ phys_addr_t msi_addr; + u32 reg; + int i; + +@@ -567,6 +567,11 @@ static void advk_pcie_setup_hw(struct ad + reg |= LANE_COUNT_1; + advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG); + ++ /* Set MSI address */ ++ msi_addr = virt_to_phys(pcie); ++ advk_writel(pcie, lower_32_bits(msi_addr), PCIE_MSI_ADDR_LOW_REG); ++ advk_writel(pcie, upper_32_bits(msi_addr), PCIE_MSI_ADDR_HIGH_REG); ++ + /* Enable MSI */ + reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG); + reg |= PCIE_CORE_CTRL2_MSI_ENABLE; +@@ -1182,10 +1187,10 @@ static void advk_msi_irq_compose_msi_msg + struct msi_msg *msg) + { + struct advk_pcie *pcie = irq_data_get_irq_chip_data(data); +- phys_addr_t msi_msg = virt_to_phys(&pcie->msi_msg); ++ phys_addr_t msi_addr = virt_to_phys(pcie); + +- msg->address_lo = lower_32_bits(msi_msg); +- msg->address_hi = upper_32_bits(msi_msg); ++ msg->address_lo = lower_32_bits(msi_addr); ++ msg->address_hi = upper_32_bits(msi_addr); + msg->data = data->hwirq; + } + +@@ -1344,18 +1349,10 @@ static struct msi_domain_info advk_msi_d + static int advk_pcie_init_msi_irq_domain(struct advk_pcie *pcie) + { + struct device *dev = &pcie->pdev->dev; +- phys_addr_t msi_msg_phys; + + raw_spin_lock_init(&pcie->msi_irq_lock); + mutex_init(&pcie->msi_used_lock); + +- msi_msg_phys = virt_to_phys(&pcie->msi_msg); +- +- advk_writel(pcie, lower_32_bits(msi_msg_phys), +- PCIE_MSI_ADDR_LOW_REG); +- advk_writel(pcie, upper_32_bits(msi_msg_phys), +- PCIE_MSI_ADDR_HIGH_REG); +- + pcie->msi_inner_domain = + irq_domain_add_linear(NULL, MSI_IRQ_NUM, + &advk_msi_domain_ops, pcie); diff --git a/target/linux/generic/pending-5.10/850-0012-PCI-aardvark-Enable-MSI-X-support.patch b/target/linux/generic/pending-5.10/850-0012-PCI-aardvark-Enable-MSI-X-support.patch new file mode 100644 index 0000000000..6c80091a80 --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0012-PCI-aardvark-Enable-MSI-X-support.patch @@ -0,0 +1,38 @@ +From 735a4ac9782b96fbe1543c578aa8334364f21abd Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Fri, 2 Apr 2021 14:05:24 +0200 +Subject: [PATCH] PCI: aardvark: Enable MSI-X support +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +According to PCI 3.0 specification, sending both MSI and MSI-X interrupts +is done by DWORD memory write operation to doorbell message address. The +write operation for MSI has zero upper 16 bits and the MSI interrupt number +in the lower 16 bits, while the write operation for MSI-X contains a 32-bit +value from MSI-X table. + +Since the driver only uses interrupt numbers from range 0..31, the upper +16 bits of the DWORD memory write operation to doorbell message address +are zero even for MSI-X interrupts. Thus we can enable MSI-X interrupts. + +Testing proves that kernel can correctly receive MSI-X interrupts from PCIe +cards which supports both MSI and MSI-X interrupts. + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1342,7 +1342,7 @@ static struct irq_chip advk_msi_irq_chip + + static struct msi_domain_info advk_msi_domain_info = { + .flags = MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | +- MSI_FLAG_MULTI_PCI_MSI, ++ MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX, + .chip = &advk_msi_irq_chip, + }; + diff --git a/target/linux/generic/pending-5.10/850-0013-PCI-aardvark-Add-support-for-ERR-interrupt-on-emulat.patch b/target/linux/generic/pending-5.10/850-0013-PCI-aardvark-Add-support-for-ERR-interrupt-on-emulat.patch new file mode 100644 index 0000000000..5beca606d0 --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0013-PCI-aardvark-Add-support-for-ERR-interrupt-on-emulat.patch @@ -0,0 +1,100 @@ +From 7f3e55a3890fa26d15e2e4e90213962d1a7f6df9 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Fri, 12 Feb 2021 20:32:55 +0100 +Subject: [PATCH] PCI: aardvark: Add support for ERR interrupt on emulated + bridge +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +ERR interrupt is triggered when corresponding bit is unmasked in both ISR0 +and PCI_EXP_DEVCTL registers. Unmasking ERR bits in PCI_EXP_DEVCTL register +is not enough. This means that currently the ERR interrupt is never +triggered. + +Unmask ERR bits in ISR0 register at driver probe time. ERR interrupt is not +triggered until ERR bits are unmasked also in PCI_EXP_DEVCTL register, +which is done by AER driver. So it is safe to unconditionally unmask all +ERR bits in aardvark probe. + +Aardvark HW sets PCI_ERR_ROOT_AER_IRQ to zero and when corresponding bits +in ISR0 and PCI_EXP_DEVCTL are enabled, the HW triggers a generic interrupt +on GIC. Chain this interrupt to PCIe interrupt 0 with +generic_handle_domain_irq() to allow processing of ERR interrupts. + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 36 ++++++++++++++++++++++++++- + 1 file changed, 35 insertions(+), 1 deletion(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -97,6 +97,10 @@ + #define PCIE_MSG_PM_PME_MASK BIT(7) + #define PCIE_ISR0_MASK_REG (CONTROL_BASE_ADDR + 0x44) + #define PCIE_ISR0_MSI_INT_PENDING BIT(24) ++#define PCIE_ISR0_CORR_ERR BIT(11) ++#define PCIE_ISR0_NFAT_ERR BIT(12) ++#define PCIE_ISR0_FAT_ERR BIT(13) ++#define PCIE_ISR0_ERR_MASK GENMASK(13, 11) + #define PCIE_ISR0_INTX_ASSERT(val) BIT(16 + (val)) + #define PCIE_ISR0_INTX_DEASSERT(val) BIT(20 + (val)) + #define PCIE_ISR0_ALL_MASK GENMASK(31, 0) +@@ -785,11 +789,15 @@ advk_pci_bridge_emul_base_conf_read(stru + case PCI_INTERRUPT_LINE: { + /* + * From the whole 32bit register we support reading from HW only +- * one bit: PCI_BRIDGE_CTL_BUS_RESET. ++ * two bits: PCI_BRIDGE_CTL_BUS_RESET and PCI_BRIDGE_CTL_SERR. + * Other bits are retrieved only from emulated config buffer. + */ + __le32 *cfgspace = (__le32 *)&bridge->conf; + u32 val = le32_to_cpu(cfgspace[PCI_INTERRUPT_LINE / 4]); ++ if (advk_readl(pcie, PCIE_ISR0_MASK_REG) & PCIE_ISR0_ERR_MASK) ++ val &= ~(PCI_BRIDGE_CTL_SERR << 16); ++ else ++ val |= PCI_BRIDGE_CTL_SERR << 16; + if (advk_readl(pcie, PCIE_CORE_CTRL1_REG) & HOT_RESET_GEN) + val |= PCI_BRIDGE_CTL_BUS_RESET << 16; + else +@@ -815,6 +823,19 @@ advk_pci_bridge_emul_base_conf_write(str + break; + + case PCI_INTERRUPT_LINE: ++ /* ++ * According to Figure 6-3: Pseudo Logic Diagram for Error ++ * Message Controls in PCIe base specification, SERR# Enable bit ++ * in Bridge Control register enable receiving of ERR_* messages ++ */ ++ if (mask & (PCI_BRIDGE_CTL_SERR << 16)) { ++ u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG); ++ if (new & (PCI_BRIDGE_CTL_SERR << 16)) ++ val &= ~PCIE_ISR0_ERR_MASK; ++ else ++ val |= PCIE_ISR0_ERR_MASK; ++ advk_writel(pcie, val, PCIE_ISR0_MASK_REG); ++ } + if (mask & (PCI_BRIDGE_CTL_BUS_RESET << 16)) { + u32 val = advk_readl(pcie, PCIE_CORE_CTRL1_REG); + if (new & (PCI_BRIDGE_CTL_BUS_RESET << 16)) +@@ -1464,6 +1485,19 @@ static void advk_pcie_handle_int(struct + isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG); + isr1_status = isr1_val & ((~isr1_mask) & PCIE_ISR1_ALL_MASK); + ++ /* Process ERR interrupt */ ++ if (isr0_status & PCIE_ISR0_ERR_MASK) { ++ advk_writel(pcie, PCIE_ISR0_ERR_MASK, PCIE_ISR0_REG); ++ ++ /* ++ * Aardvark HW returns zero for PCI_ERR_ROOT_AER_IRQ, so use ++ * PCIe interrupt 0 ++ */ ++ virq = irq_find_mapping(pcie->irq_domain, 0); ++ if (generic_handle_irq(virq) == -EINVAL) ++ dev_err_ratelimited(&pcie->pdev->dev, "unhandled ERR IRQ\n"); ++ } ++ + /* Process MSI interrupts */ + if (isr0_status & PCIE_ISR0_MSI_INT_PENDING) + advk_pcie_handle_msi(pcie); diff --git a/target/linux/generic/pending-5.10/850-0014-PCI-aardvark-Fix-reading-PCI_EXP_RTSTA_PME-bit-on-em.patch b/target/linux/generic/pending-5.10/850-0014-PCI-aardvark-Fix-reading-PCI_EXP_RTSTA_PME-bit-on-em.patch new file mode 100644 index 0000000000..4a2cd77144 --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0014-PCI-aardvark-Fix-reading-PCI_EXP_RTSTA_PME-bit-on-em.patch @@ -0,0 +1,44 @@ +From 5f354992eeef9a51c67796dc9f7f578d3584baa2 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Wed, 8 Dec 2021 05:57:54 +0100 +Subject: [PATCH] PCI: aardvark: Fix reading PCI_EXP_RTSTA_PME bit on emulated + bridge +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The emulated bridge returns incorrect value for PCI_EXP_RTSTA register +during readout in advk_pci_bridge_emul_pcie_conf_read() function: the +correct bit is BIT(16), but we are setting BIT(23), because the code +does + *value = (isr0 & PCIE_MSG_PM_PME_MASK) << 16 +where + PCIE_MSG_PM_PME_MASK +is + BIT(7). + +The code should probably have been something like + *value = (!!(isr0 & PCIE_MSG_PM_PME_MASK)) << 16, +but we are better of using an if() and using the proper macro for this +bit. + +Fixes: 8a3ebd8de328 ("PCI: aardvark: Implement emulated root PCI bridge config space") +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 4 +++- + 1 file changed, 3 insertions(+), 1 deletion(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -874,7 +874,9 @@ advk_pci_bridge_emul_pcie_conf_read(stru + case PCI_EXP_RTSTA: { + u32 isr0 = advk_readl(pcie, PCIE_ISR0_REG); + u32 msglog = advk_readl(pcie, PCIE_MSG_LOG_REG); +- *value = (isr0 & PCIE_MSG_PM_PME_MASK) << 16 | (msglog >> 16); ++ *value = msglog >> 16; ++ if (isr0 & PCIE_MSG_PM_PME_MASK) ++ *value |= PCI_EXP_RTSTA_PME; + return PCI_BRIDGE_EMUL_HANDLED; + } + diff --git a/target/linux/generic/pending-5.10/850-0015-PCI-aardvark-Optimize-writing-PCI_EXP_RTCTL_PMEIE-an.patch b/target/linux/generic/pending-5.10/850-0015-PCI-aardvark-Optimize-writing-PCI_EXP_RTCTL_PMEIE-an.patch new file mode 100644 index 0000000000..9b4c6ef233 --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0015-PCI-aardvark-Optimize-writing-PCI_EXP_RTCTL_PMEIE-an.patch @@ -0,0 +1,52 @@ +From 3fe0073d116d9902df08761c1cf0d733dd4c38fc Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Wed, 8 Dec 2021 06:03:50 +0100 +Subject: [PATCH] PCI: aardvark: Optimize writing PCI_EXP_RTCTL_PMEIE and + PCI_EXP_RTSTA_PME on emulated bridge +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +To optimize advk_pci_bridge_emul_pcie_conf_write() code, touch +PCIE_ISR0_REG and PCIE_ISR0_MASK_REG registers only when it is really +needed, when processing PCI_EXP_RTCTL_PMEIE and PCI_EXP_RTSTA_PME bits. + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 20 +++++++++++--------- + 1 file changed, 11 insertions(+), 9 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -933,19 +933,21 @@ advk_pci_bridge_emul_pcie_conf_write(str + advk_pcie_wait_for_retrain(pcie); + break; + +- case PCI_EXP_RTCTL: { ++ case PCI_EXP_RTCTL: + /* Only mask/unmask PME interrupt */ +- u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG) & +- ~PCIE_MSG_PM_PME_MASK; +- if ((new & PCI_EXP_RTCTL_PMEIE) == 0) +- val |= PCIE_MSG_PM_PME_MASK; +- advk_writel(pcie, val, PCIE_ISR0_MASK_REG); ++ if (mask & PCI_EXP_RTCTL_PMEIE) { ++ u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG); ++ if (new & PCI_EXP_RTCTL_PMEIE) ++ val &= ~PCIE_MSG_PM_PME_MASK; ++ else ++ val |= PCIE_MSG_PM_PME_MASK; ++ advk_writel(pcie, val, PCIE_ISR0_MASK_REG); ++ } + break; +- } + + case PCI_EXP_RTSTA: +- new = (new & PCI_EXP_RTSTA_PME) >> 9; +- advk_writel(pcie, new, PCIE_ISR0_REG); ++ if (new & PCI_EXP_RTSTA_PME) ++ advk_writel(pcie, PCIE_MSG_PM_PME_MASK, PCIE_ISR0_REG); + break; + + case PCI_EXP_DEVCTL: diff --git a/target/linux/generic/pending-5.10/850-0016-PCI-aardvark-Add-support-for-PME-interrupts.patch b/target/linux/generic/pending-5.10/850-0016-PCI-aardvark-Add-support-for-PME-interrupts.patch new file mode 100644 index 0000000000..920178b4a6 --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0016-PCI-aardvark-Add-support-for-PME-interrupts.patch @@ -0,0 +1,47 @@ +From 7acd8ef92e8789e10b5d736d73cea3b625087f26 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Wed, 8 Dec 2021 06:07:44 +0100 +Subject: [PATCH] PCI: aardvark: Add support for PME interrupts +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Currently enabling PCI_EXP_RTSTA_PME bit in PCI_EXP_RTCTL register does +nothing. This is because PCIe PME driver expects to receive PCIe interrupt +defined in PCI_EXP_FLAGS_IRQ register, but aardvark hardware does not +trigger PCIe INTx/MSI interrupt for PME event, rather it triggers custom +aardvark interrupt which this driver is not processing yet. + +Fix this issue by handling PME interrupt in advk_pcie_handle_int() and +chaining it to PCIe interrupt 0 with generic_handle_domain_irq() (since +aardvark sets PCI_EXP_FLAGS_IRQ to zero). With this change PCIe PME driver +finally starts receiving PME interrupt. + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1489,6 +1489,19 @@ static void advk_pcie_handle_int(struct + isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG); + isr1_status = isr1_val & ((~isr1_mask) & PCIE_ISR1_ALL_MASK); + ++ /* Process PME interrupt */ ++ if (isr0_status & PCIE_MSG_PM_PME_MASK) { ++ /* ++ * Do not clear PME interrupt bit in ISR0, it is cleared by IRQ ++ * receiver by writing to the PCI_EXP_RTSTA register of emulated ++ * root bridge. Aardvark HW returns zero for PCI_EXP_FLAGS_IRQ, ++ * so use PCIe interrupt 0. ++ */ ++ virq = irq_find_mapping(pcie->irq_domain, 0); ++ if (generic_handle_irq(virq) == -EINVAL) ++ dev_err_ratelimited(&pcie->pdev->dev, "unhandled PME IRQ\n"); ++ } ++ + /* Process ERR interrupt */ + if (isr0_status & PCIE_ISR0_ERR_MASK) { + advk_writel(pcie, PCIE_ISR0_ERR_MASK, PCIE_ISR0_REG); diff --git a/target/linux/generic/pending-5.10/850-0017-PCI-aardvark-Fix-support-for-PME-requester-on-emulat.patch b/target/linux/generic/pending-5.10/850-0017-PCI-aardvark-Fix-support-for-PME-requester-on-emulat.patch new file mode 100644 index 0000000000..04c4bd6f57 --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0017-PCI-aardvark-Fix-support-for-PME-requester-on-emulat.patch @@ -0,0 +1,173 @@ +From 68727b545332327b4c2f9c0f8d006be8970e7832 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Fri, 19 Feb 2021 14:22:22 +0100 +Subject: [PATCH] PCI: aardvark: Fix support for PME requester on emulated + bridge +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Enable aardvark PME interrupt unconditionally by unmasking it and read PME +requester ID to emulated bridge config space immediately after receiving +interrupt. + +PME requester ID is stored in the PCIE_MSG_LOG_REG register, which contains +the last inbound message. So when new inbound message is received by HW +(including non-PM), the content in PCIE_MSG_LOG_REG register is replaced by +a new value. + +PCIe specification mandates that subsequent PMEs are kept pending until the +PME Status Register bit is cleared by software by writing a 1b. + +Support for masking/unmasking PME interrupt on emulated bridge via +PCI_EXP_RTCTL_PMEIE bit is now implemented only in emulated bridge config +space, to ensure that we do not miss any aardvark PME interrupt. + +Reading of PCI_EXP_RTCAP and PCI_EXP_RTSTA registers is simplified as final +value is now always stored into emulated bridge config space by the +interrupt handler, so there is no need to implement support for these +registers in read_pcie callback. + +Clearing of W1C bit PCI_EXP_RTSTA_PME is now also simplified as it is done +by pci-bridge-emul.c code for emulated bridge config space. So there is no +need to implement support for clearing this bit in write_pcie callback. + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 94 +++++++++++++++------------ + 1 file changed, 52 insertions(+), 42 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -597,6 +597,11 @@ static void advk_pcie_setup_hw(struct ad + reg &= ~PCIE_ISR0_MSI_INT_PENDING; + advk_writel(pcie, reg, PCIE_ISR0_MASK_REG); + ++ /* Unmask PME interrupt for processing of PME requester */ ++ reg = advk_readl(pcie, PCIE_ISR0_MASK_REG); ++ reg &= ~PCIE_MSG_PM_PME_MASK; ++ advk_writel(pcie, reg, PCIE_ISR0_MASK_REG); ++ + /* Enable summary interrupt for GIC SPI source */ + reg = PCIE_IRQ_ALL_MASK & (~PCIE_IRQ_ENABLE_INTS_MASK); + advk_writel(pcie, reg, HOST_CTRL_INT_MASK_REG); +@@ -863,22 +868,11 @@ advk_pci_bridge_emul_pcie_conf_read(stru + *value = PCI_EXP_SLTSTA_PDS << 16; + return PCI_BRIDGE_EMUL_HANDLED; + +- case PCI_EXP_RTCTL: { +- u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG); +- *value = (val & PCIE_MSG_PM_PME_MASK) ? 0 : PCI_EXP_RTCTL_PMEIE; +- *value |= le16_to_cpu(bridge->pcie_conf.rootctl) & PCI_EXP_RTCTL_CRSSVE; +- *value |= PCI_EXP_RTCAP_CRSVIS << 16; +- return PCI_BRIDGE_EMUL_HANDLED; +- } +- +- case PCI_EXP_RTSTA: { +- u32 isr0 = advk_readl(pcie, PCIE_ISR0_REG); +- u32 msglog = advk_readl(pcie, PCIE_MSG_LOG_REG); +- *value = msglog >> 16; +- if (isr0 & PCIE_MSG_PM_PME_MASK) +- *value |= PCI_EXP_RTSTA_PME; +- return PCI_BRIDGE_EMUL_HANDLED; +- } ++ /* ++ * PCI_EXP_RTCTL and PCI_EXP_RTSTA are also supported, but do not need ++ * to be handled here, because their values are stored in emulated ++ * config space buffer, and we read them from there when needed. ++ */ + + case PCI_EXP_LNKCAP: { + u32 val = advk_readl(pcie, PCIE_CORE_PCIEXP_CAP + reg); +@@ -933,22 +927,19 @@ advk_pci_bridge_emul_pcie_conf_write(str + advk_pcie_wait_for_retrain(pcie); + break; + +- case PCI_EXP_RTCTL: +- /* Only mask/unmask PME interrupt */ +- if (mask & PCI_EXP_RTCTL_PMEIE) { +- u32 val = advk_readl(pcie, PCIE_ISR0_MASK_REG); +- if (new & PCI_EXP_RTCTL_PMEIE) +- val &= ~PCIE_MSG_PM_PME_MASK; +- else +- val |= PCIE_MSG_PM_PME_MASK; +- advk_writel(pcie, val, PCIE_ISR0_MASK_REG); +- } ++ case PCI_EXP_RTCTL: { ++ u16 rootctl = le16_to_cpu(bridge->pcie_conf.rootctl); ++ /* Only emulation of PMEIE and CRSSVE bits is provided */ ++ rootctl &= PCI_EXP_RTCTL_PMEIE | PCI_EXP_RTCTL_CRSSVE; ++ bridge->pcie_conf.rootctl = cpu_to_le16(rootctl); + break; ++ } + +- case PCI_EXP_RTSTA: +- if (new & PCI_EXP_RTSTA_PME) +- advk_writel(pcie, PCIE_MSG_PM_PME_MASK, PCIE_ISR0_REG); +- break; ++ /* ++ * PCI_EXP_RTSTA is also supported, but does not need to be handled ++ * here, because its value is stored in emulated config space buffer, ++ * and we write it there when needed. ++ */ + + case PCI_EXP_DEVCTL: + case PCI_EXP_DEVCTL2: +@@ -1450,6 +1441,34 @@ static void advk_pcie_remove_irq_domain( + irq_domain_remove(pcie->irq_domain); + } + ++static void advk_pcie_handle_pme(struct advk_pcie *pcie) ++{ ++ u32 requester = advk_readl(pcie, PCIE_MSG_LOG_REG) >> 16; ++ int virq; ++ ++ advk_writel(pcie, PCIE_MSG_PM_PME_MASK, PCIE_ISR0_REG); ++ ++ /* ++ * PCIE_MSG_LOG_REG contains the last inbound message, so store ++ * the requester ID only when PME was not asserted yet. ++ * Also do not trigger PME interrupt when PME is still asserted. ++ */ ++ if (!(le32_to_cpu(pcie->bridge.pcie_conf.rootsta) & PCI_EXP_RTSTA_PME)) { ++ pcie->bridge.pcie_conf.rootsta = cpu_to_le32(requester | PCI_EXP_RTSTA_PME); ++ ++ /* ++ * Trigger PME interrupt only if PMEIE bit in Root Control is set. ++ * Aardvark HW returns zero for PCI_EXP_FLAGS_IRQ, so use PCIe interrupt 0. ++ */ ++ if (!(le16_to_cpu(pcie->bridge.pcie_conf.rootctl) & PCI_EXP_RTCTL_PMEIE)) ++ return; ++ ++ virq = irq_find_mapping(pcie->irq_domain, 0); ++ if (generic_handle_irq(virq) == -EINVAL) ++ dev_err_ratelimited(&pcie->pdev->dev, "unhandled PME IRQ\n"); ++ } ++} ++ + static void advk_pcie_handle_msi(struct advk_pcie *pcie) + { + u32 msi_val, msi_mask, msi_status, msi_idx; +@@ -1489,18 +1508,9 @@ static void advk_pcie_handle_int(struct + isr1_mask = advk_readl(pcie, PCIE_ISR1_MASK_REG); + isr1_status = isr1_val & ((~isr1_mask) & PCIE_ISR1_ALL_MASK); + +- /* Process PME interrupt */ +- if (isr0_status & PCIE_MSG_PM_PME_MASK) { +- /* +- * Do not clear PME interrupt bit in ISR0, it is cleared by IRQ +- * receiver by writing to the PCI_EXP_RTSTA register of emulated +- * root bridge. Aardvark HW returns zero for PCI_EXP_FLAGS_IRQ, +- * so use PCIe interrupt 0. +- */ +- virq = irq_find_mapping(pcie->irq_domain, 0); +- if (generic_handle_irq(virq) == -EINVAL) +- dev_err_ratelimited(&pcie->pdev->dev, "unhandled PME IRQ\n"); +- } ++ /* Process PME interrupt as the first one to do not miss PME requester id */ ++ if (isr0_status & PCIE_MSG_PM_PME_MASK) ++ advk_pcie_handle_pme(pcie); + + /* Process ERR interrupt */ + if (isr0_status & PCIE_ISR0_ERR_MASK) { diff --git a/target/linux/generic/pending-5.10/850-0018-PCI-aardvark-Use-separate-INTA-interrupt-for-emulate.patch b/target/linux/generic/pending-5.10/850-0018-PCI-aardvark-Use-separate-INTA-interrupt-for-emulate.patch new file mode 100644 index 0000000000..7f4d7a1bad --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0018-PCI-aardvark-Use-separate-INTA-interrupt-for-emulate.patch @@ -0,0 +1,161 @@ +From db305233136f5aa2444a8287a279384e8458c458 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Thu, 1 Apr 2021 20:12:48 +0200 +Subject: [PATCH] PCI: aardvark: Use separate INTA interrupt for emulated root + bridge +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Emulated root bridge currently provides only one Legacy INTA interrupt +which is used for reporting PCIe PME and ERR events and handled by kernel +PCIe PME and AER drivers. + +Aardvark HW reports these PME and ERR events separately, so there is no +need to mix real INTA interrupt and emulated INTA interrupt for PCIe PME +and AER drivers. + +Register a new advk-RP (as in Root Port) irq chip and a new irq domain +for emulated root bridge and use this new separate irq domain for +providing INTA interrupt from emulated root bridge for PME and ERR events. + +The real INTA interrupt from real devices is now separate. + +A custom map_irq callback function on PCI host bridge structure is used to +allocate IRQ mapping for emulated root bridge from new irq domain. Original +callback of_irq_parse_and_map_pci() is used for all other devices as before. + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 69 ++++++++++++++++++++++++++- + 1 file changed, 67 insertions(+), 2 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -280,6 +280,7 @@ struct advk_pcie { + } wins[OB_WIN_COUNT]; + u8 wins_count; + int irq; ++ struct irq_domain *rp_irq_domain; + struct irq_domain *irq_domain; + struct irq_chip irq_chip; + raw_spinlock_t irq_lock; +@@ -1441,6 +1442,44 @@ static void advk_pcie_remove_irq_domain( + irq_domain_remove(pcie->irq_domain); + } + ++static struct irq_chip advk_rp_irq_chip = { ++ .name = "advk-RP", ++}; ++ ++static int advk_pcie_rp_irq_map(struct irq_domain *h, ++ unsigned int virq, irq_hw_number_t hwirq) ++{ ++ struct advk_pcie *pcie = h->host_data; ++ ++ irq_set_chip_and_handler(virq, &advk_rp_irq_chip, handle_simple_irq); ++ irq_set_chip_data(virq, pcie); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops advk_pcie_rp_irq_domain_ops = { ++ .map = advk_pcie_rp_irq_map, ++ .xlate = irq_domain_xlate_onecell, ++}; ++ ++static int advk_pcie_init_rp_irq_domain(struct advk_pcie *pcie) ++{ ++ pcie->rp_irq_domain = irq_domain_add_linear(NULL, 1, ++ &advk_pcie_rp_irq_domain_ops, ++ pcie); ++ if (!pcie->rp_irq_domain) { ++ dev_err(&pcie->pdev->dev, "Failed to add Root Port IRQ domain\n"); ++ return -ENOMEM; ++ } ++ ++ return 0; ++} ++ ++static void advk_pcie_remove_rp_irq_domain(struct advk_pcie *pcie) ++{ ++ irq_domain_remove(pcie->rp_irq_domain); ++} ++ + static void advk_pcie_handle_pme(struct advk_pcie *pcie) + { + u32 requester = advk_readl(pcie, PCIE_MSG_LOG_REG) >> 16; +@@ -1463,7 +1502,7 @@ static void advk_pcie_handle_pme(struct + if (!(le16_to_cpu(pcie->bridge.pcie_conf.rootctl) & PCI_EXP_RTCTL_PMEIE)) + return; + +- virq = irq_find_mapping(pcie->irq_domain, 0); ++ virq = irq_find_mapping(pcie->rp_irq_domain, 0); + if (generic_handle_irq(virq) == -EINVAL) + dev_err_ratelimited(&pcie->pdev->dev, "unhandled PME IRQ\n"); + } +@@ -1520,7 +1559,7 @@ static void advk_pcie_handle_int(struct + * Aardvark HW returns zero for PCI_ERR_ROOT_AER_IRQ, so use + * PCIe interrupt 0 + */ +- virq = irq_find_mapping(pcie->irq_domain, 0); ++ virq = irq_find_mapping(pcie->rp_irq_domain, 0); + if (generic_handle_irq(virq) == -EINVAL) + dev_err_ratelimited(&pcie->pdev->dev, "unhandled ERR IRQ\n"); + } +@@ -1566,6 +1605,21 @@ static void advk_pcie_irq_handler(struct + chained_irq_exit(chip, desc); + } + ++static int advk_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) ++{ ++ struct advk_pcie *pcie = dev->bus->sysdata; ++ ++ /* ++ * Emulated root bridge has its own emulated irq chip and irq domain. ++ * Argument pin is the INTx pin (1=INTA, 2=INTB, 3=INTC, 4=INTD) and ++ * hwirq for irq_create_mapping() is indexed from zero. ++ */ ++ if (pci_is_root_bus(dev->bus)) ++ return irq_create_mapping(pcie->rp_irq_domain, pin - 1); ++ else ++ return of_irq_parse_and_map_pci(dev, slot, pin); ++} ++ + static void __maybe_unused advk_pcie_disable_phy(struct advk_pcie *pcie) + { + phy_power_off(pcie->phy); +@@ -1769,14 +1823,24 @@ static int advk_pcie_probe(struct platfo + return ret; + } + ++ ret = advk_pcie_init_rp_irq_domain(pcie); ++ if (ret) { ++ dev_err(dev, "Failed to initialize irq\n"); ++ advk_pcie_remove_msi_irq_domain(pcie); ++ advk_pcie_remove_irq_domain(pcie); ++ return ret; ++ } ++ + irq_set_chained_handler_and_data(pcie->irq, advk_pcie_irq_handler, pcie); + + bridge->sysdata = pcie; + bridge->ops = &advk_pcie_ops; ++ bridge->map_irq = advk_pcie_map_irq; + + ret = pci_host_probe(bridge); + if (ret < 0) { + irq_set_chained_handler_and_data(pcie->irq, NULL, NULL); ++ advk_pcie_remove_rp_irq_domain(pcie); + advk_pcie_remove_msi_irq_domain(pcie); + advk_pcie_remove_irq_domain(pcie); + return ret; +@@ -1828,6 +1892,7 @@ static int advk_pcie_remove(struct platf + irq_set_chained_handler_and_data(pcie->irq, NULL, NULL); + + /* Remove IRQ domains */ ++ advk_pcie_remove_rp_irq_domain(pcie); + advk_pcie_remove_msi_irq_domain(pcie); + advk_pcie_remove_irq_domain(pcie); + diff --git a/target/linux/generic/pending-5.10/850-0019-PCI-aardvark-Remove-irq_mask_ack-callback-for-INTx-i.patch b/target/linux/generic/pending-5.10/850-0019-PCI-aardvark-Remove-irq_mask_ack-callback-for-INTx-i.patch new file mode 100644 index 0000000000..dc6503b2dd --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0019-PCI-aardvark-Remove-irq_mask_ack-callback-for-INTx-i.patch @@ -0,0 +1,29 @@ +From 8c9eef96e24f34ff8b62b230700416b822691a37 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Thu, 1 Apr 2021 14:24:12 +0200 +Subject: [PATCH] PCI: aardvark: Remove irq_mask_ack callback for INTx + interrupts +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Callback for irq_mask_ack is the same as for irq_mask. As there is no +special handling for irq_ack, there is no need to define irq_mask_ack too. + +Signed-off-by: Pali Rohár +Acked-by: Marc Zyngier +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 1 - + 1 file changed, 1 deletion(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1420,7 +1420,6 @@ static int advk_pcie_init_irq_domain(str + } + + irq_chip->irq_mask = advk_pcie_irq_mask; +- irq_chip->irq_mask_ack = advk_pcie_irq_mask; + irq_chip->irq_unmask = advk_pcie_irq_unmask; + + pcie->irq_domain = diff --git a/target/linux/generic/pending-5.10/850-0020-PCI-aardvark-Don-t-mask-irq-when-mapping.patch b/target/linux/generic/pending-5.10/850-0020-PCI-aardvark-Don-t-mask-irq-when-mapping.patch new file mode 100644 index 0000000000..c26e7e5b9d --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0020-PCI-aardvark-Don-t-mask-irq-when-mapping.patch @@ -0,0 +1,27 @@ +From dc01fca5a9d9c09ce9a3fb2bc2e7715c37ff3bd9 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Thu, 1 Apr 2021 14:30:06 +0200 +Subject: [PATCH] PCI: aardvark: Don't mask irq when mapping +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +By default, all Legacy INTx interrupts are masked, so there is no need to +mask this interrupt during irq_map callback. + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 1 - + 1 file changed, 1 deletion(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1337,7 +1337,6 @@ static int advk_pcie_irq_map(struct irq_ + { + struct advk_pcie *pcie = h->host_data; + +- advk_pcie_irq_mask(irq_get_irq_data(virq)); + irq_set_status_flags(virq, IRQ_LEVEL); + irq_set_chip_and_handler(virq, &pcie->irq_chip, + handle_level_irq); diff --git a/target/linux/generic/pending-5.10/850-0021-PCI-aardvark-Drop-__maybe_unused-from-advk_pcie_disa.patch b/target/linux/generic/pending-5.10/850-0021-PCI-aardvark-Drop-__maybe_unused-from-advk_pcie_disa.patch new file mode 100644 index 0000000000..79ea7a8d78 --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0021-PCI-aardvark-Drop-__maybe_unused-from-advk_pcie_disa.patch @@ -0,0 +1,28 @@ +From a511c99262ce19ee06908d27212b39ec4c5aeb17 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Marek=20Beh=C3=BAn?= +Date: Wed, 8 Dec 2021 04:40:29 +0100 +Subject: [PATCH] PCI: aardvark: Drop __maybe_unused from + advk_pcie_disable_phy() +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This function is now always used in driver remove method, drop the +__maybe_unused attribute. + +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1618,7 +1618,7 @@ static int advk_pcie_map_irq(const struc + return of_irq_parse_and_map_pci(dev, slot, pin); + } + +-static void __maybe_unused advk_pcie_disable_phy(struct advk_pcie *pcie) ++static void advk_pcie_disable_phy(struct advk_pcie *pcie) + { + phy_power_off(pcie->phy); + phy_exit(pcie->phy); diff --git a/target/linux/generic/pending-5.10/850-0022-PCI-aardvark-Update-comment-about-link-going-down-af.patch b/target/linux/generic/pending-5.10/850-0022-PCI-aardvark-Update-comment-about-link-going-down-af.patch new file mode 100644 index 0000000000..74769e7f5b --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0022-PCI-aardvark-Update-comment-about-link-going-down-af.patch @@ -0,0 +1,35 @@ +From bafda858364003a70b9cda84282f9761587f8033 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Marek=20Beh=C3=BAn?= +Date: Mon, 10 Jan 2022 00:47:38 +0100 +Subject: [PATCH] PCI: aardvark: Update comment about link going down after + link-up +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Update the comment about what happens when link goes down after we have +checked for link-up. If a PIO request is done while link-down, we have +a serious problem. + +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1003,8 +1003,12 @@ static bool advk_pcie_valid_device(struc + return false; + + /* +- * If the link goes down after we check for link-up, nothing bad +- * happens but the config access times out. ++ * If the link goes down after we check for link-up, we have a problem: ++ * if a PIO request is executed while link-down, the whole controller ++ * gets stuck in a non-functional state, and even after link comes up ++ * again, PIO requests won't work anymore, and a reset of the whole PCIe ++ * controller is needed. Therefore we need to prevent sending PIO ++ * requests while the link is down. + */ + if (!pci_is_root_bus(bus) && !advk_pcie_link_up(pcie)) + return false; diff --git a/target/linux/generic/pending-5.10/850-0023-PCI-aardvark-Make-main-irq_chip-structure-a-static-d.patch b/target/linux/generic/pending-5.10/850-0023-PCI-aardvark-Make-main-irq_chip-structure-a-static-d.patch new file mode 100644 index 0000000000..d5fbcdc787 --- /dev/null +++ b/target/linux/generic/pending-5.10/850-0023-PCI-aardvark-Make-main-irq_chip-structure-a-static-d.patch @@ -0,0 +1,102 @@ +From 663b9f99bb35dbc0c7b685f71ee3668a60d31320 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Marek=20Beh=C3=BAn?= +Date: Mon, 10 Jan 2022 02:02:00 +0100 +Subject: [PATCH] PCI: aardvark: Make main irq_chip structure a static driver + structure +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Marc Zyngier says [1] that we should use struct irq_chip as a global +static struct in the driver. Even though the structure currently +contains a dynamic member (parent_device), Marc says [2] that he plans +to kill it and make the structure completely static. + +We have already converted others irq_chip structures in this driver in +this way, but we omitted this one because the .name member is +dynamically created from device's name, and the name is displayed in +sysfs, so changing it would break sysfs ABI. + +The rationale for changing the name (to "advk-INT") in spite of sysfs +ABI, and thus allowing to convert to a static structure, is that after +the other changes we made in this series, the IRQ chip is basically +something different: it no logner generates ERR and PME interrupts (they +are generated by emulated bridge's rp_irq_chip). + +[1] https://lore.kernel.org/linux-pci/877dbcvngf.wl-maz@kernel.org/ +[2] https://lore.kernel.org/linux-pci/874k6gvkhz.wl-maz@kernel.org/ + +Signed-off-by: Marek Behún +--- + drivers/pci/controller/pci-aardvark.c | 25 +++++++------------------ + 1 file changed, 7 insertions(+), 18 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -282,7 +282,6 @@ struct advk_pcie { + int irq; + struct irq_domain *rp_irq_domain; + struct irq_domain *irq_domain; +- struct irq_chip irq_chip; + raw_spinlock_t irq_lock; + struct irq_domain *msi_domain; + struct irq_domain *msi_inner_domain; +@@ -1336,14 +1335,19 @@ static void advk_pcie_irq_unmask(struct + raw_spin_unlock_irqrestore(&pcie->irq_lock, flags); + } + ++static struct irq_chip advk_irq_chip = { ++ .name = "advk-INT", ++ .irq_mask = advk_pcie_irq_mask, ++ .irq_unmask = advk_pcie_irq_unmask, ++}; ++ + static int advk_pcie_irq_map(struct irq_domain *h, + unsigned int virq, irq_hw_number_t hwirq) + { + struct advk_pcie *pcie = h->host_data; + + irq_set_status_flags(virq, IRQ_LEVEL); +- irq_set_chip_and_handler(virq, &pcie->irq_chip, +- handle_level_irq); ++ irq_set_chip_and_handler(virq, &advk_irq_chip, handle_level_irq); + irq_set_chip_data(virq, pcie); + + return 0; +@@ -1402,7 +1406,6 @@ static int advk_pcie_init_irq_domain(str + struct device *dev = &pcie->pdev->dev; + struct device_node *node = dev->of_node; + struct device_node *pcie_intc_node; +- struct irq_chip *irq_chip; + int ret = 0; + + raw_spin_lock_init(&pcie->irq_lock); +@@ -1413,28 +1416,14 @@ static int advk_pcie_init_irq_domain(str + return -ENODEV; + } + +- irq_chip = &pcie->irq_chip; +- +- irq_chip->name = devm_kasprintf(dev, GFP_KERNEL, "%s-irq", +- dev_name(dev)); +- if (!irq_chip->name) { +- ret = -ENOMEM; +- goto out_put_node; +- } +- +- irq_chip->irq_mask = advk_pcie_irq_mask; +- irq_chip->irq_unmask = advk_pcie_irq_unmask; +- + pcie->irq_domain = + irq_domain_add_linear(pcie_intc_node, PCI_NUM_INTX, + &advk_pcie_irq_domain_ops, pcie); + if (!pcie->irq_domain) { + dev_err(dev, "Failed to get a INTx IRQ domain\n"); + ret = -ENOMEM; +- goto out_put_node; + } + +-out_put_node: + of_node_put(pcie_intc_node); + return ret; + } diff --git a/target/linux/generic/pending-5.10/851-0001-phy-marvell-phy-mvebu-a3700-comphy-Remove-port-from-.patch b/target/linux/generic/pending-5.10/851-0001-phy-marvell-phy-mvebu-a3700-comphy-Remove-port-from-.patch new file mode 100644 index 0000000000..4a963be952 --- /dev/null +++ b/target/linux/generic/pending-5.10/851-0001-phy-marvell-phy-mvebu-a3700-comphy-Remove-port-from-.patch @@ -0,0 +1,217 @@ +From a719f7ba7fcba05d85801c6f0267f389a21627c1 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Fri, 24 Sep 2021 13:03:02 +0200 +Subject: [PATCH] phy: marvell: phy-mvebu-a3700-comphy: Remove port from driver + configuration +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Port number is encoded into argument for SMC call. It is zero for SATA, +PCIe and also both USB 3.0 PHYs. It is non-zero only for Ethernet PHY +(incorrectly called SGMII) on lane 0. Ethernet PHY on lane 1 also uses zero +port number. + +So construct "port" bits for SMC call argument can be constructed directly +from PHY type and lane number. + +Change driver code to always pass zero port number for non-ethernet PHYs +and for ethernet PHYs determinate port number from lane number. This +simplifies the driver. + +As port number from DT PHY configuration is not used anymore, remove whole +driver code which parses it. This also simplifies the driver. + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Reviewed-by: Miquel Raynal +--- + drivers/phy/marvell/phy-mvebu-a3700-comphy.c | 62 +++++++++----------- + 1 file changed, 29 insertions(+), 33 deletions(-) + +--- a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c ++++ b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c +@@ -20,7 +20,6 @@ + #include + + #define MVEBU_A3700_COMPHY_LANES 3 +-#define MVEBU_A3700_COMPHY_PORTS 2 + + /* COMPHY Fast SMC function identifiers */ + #define COMPHY_SIP_POWER_ON 0x82000001 +@@ -45,51 +44,47 @@ + #define COMPHY_FW_NET(mode, idx, speed) (COMPHY_FW_MODE(mode) | \ + ((idx) << 8) | \ + ((speed) << 2)) +-#define COMPHY_FW_PCIE(mode, idx, speed, width) (COMPHY_FW_NET(mode, idx, speed) | \ ++#define COMPHY_FW_PCIE(mode, speed, width) (COMPHY_FW_NET(mode, 0, speed) | \ + ((width) << 18)) + + struct mvebu_a3700_comphy_conf { + unsigned int lane; + enum phy_mode mode; + int submode; +- unsigned int port; + u32 fw_mode; + }; + +-#define MVEBU_A3700_COMPHY_CONF(_lane, _mode, _smode, _port, _fw) \ ++#define MVEBU_A3700_COMPHY_CONF(_lane, _mode, _smode, _fw) \ + { \ + .lane = _lane, \ + .mode = _mode, \ + .submode = _smode, \ +- .port = _port, \ + .fw_mode = _fw, \ + } + +-#define MVEBU_A3700_COMPHY_CONF_GEN(_lane, _mode, _port, _fw) \ +- MVEBU_A3700_COMPHY_CONF(_lane, _mode, PHY_INTERFACE_MODE_NA, _port, _fw) ++#define MVEBU_A3700_COMPHY_CONF_GEN(_lane, _mode, _fw) \ ++ MVEBU_A3700_COMPHY_CONF(_lane, _mode, PHY_INTERFACE_MODE_NA, _fw) + +-#define MVEBU_A3700_COMPHY_CONF_ETH(_lane, _smode, _port, _fw) \ +- MVEBU_A3700_COMPHY_CONF(_lane, PHY_MODE_ETHERNET, _smode, _port, _fw) ++#define MVEBU_A3700_COMPHY_CONF_ETH(_lane, _smode, _fw) \ ++ MVEBU_A3700_COMPHY_CONF(_lane, PHY_MODE_ETHERNET, _smode, _fw) + + static const struct mvebu_a3700_comphy_conf mvebu_a3700_comphy_modes[] = { + /* lane 0 */ +- MVEBU_A3700_COMPHY_CONF_GEN(0, PHY_MODE_USB_HOST_SS, 0, ++ MVEBU_A3700_COMPHY_CONF_GEN(0, PHY_MODE_USB_HOST_SS, + COMPHY_FW_MODE_USB3H), +- MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_SGMII, 1, ++ MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_SGMII, + COMPHY_FW_MODE_SGMII), +- MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_2500BASEX, 1, ++ MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_2500BASEX, + COMPHY_FW_MODE_2500BASEX), + /* lane 1 */ +- MVEBU_A3700_COMPHY_CONF_GEN(1, PHY_MODE_PCIE, 0, +- COMPHY_FW_MODE_PCIE), +- MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_SGMII, 0, ++ MVEBU_A3700_COMPHY_CONF_GEN(1, PHY_MODE_PCIE, COMPHY_FW_MODE_PCIE), ++ MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_SGMII, + COMPHY_FW_MODE_SGMII), +- MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_2500BASEX, 0, ++ MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_2500BASEX, + COMPHY_FW_MODE_2500BASEX), + /* lane 2 */ +- MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_SATA, 0, +- COMPHY_FW_MODE_SATA), +- MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_USB_HOST_SS, 0, ++ MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_SATA, COMPHY_FW_MODE_SATA), ++ MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_USB_HOST_SS, + COMPHY_FW_MODE_USB3H), + }; + +@@ -98,7 +93,6 @@ struct mvebu_a3700_comphy_lane { + unsigned int id; + enum phy_mode mode; + int submode; +- int port; + }; + + static int mvebu_a3700_comphy_smc(unsigned long function, unsigned long lane, +@@ -120,7 +114,7 @@ static int mvebu_a3700_comphy_smc(unsign + } + } + +-static int mvebu_a3700_comphy_get_fw_mode(int lane, int port, ++static int mvebu_a3700_comphy_get_fw_mode(int lane, + enum phy_mode mode, + int submode) + { +@@ -132,7 +126,6 @@ static int mvebu_a3700_comphy_get_fw_mod + + for (i = 0; i < n; i++) { + if (mvebu_a3700_comphy_modes[i].lane == lane && +- mvebu_a3700_comphy_modes[i].port == port && + mvebu_a3700_comphy_modes[i].mode == mode && + mvebu_a3700_comphy_modes[i].submode == submode) + break; +@@ -153,7 +146,7 @@ static int mvebu_a3700_comphy_set_mode(s + if (submode == PHY_INTERFACE_MODE_1000BASEX) + submode = PHY_INTERFACE_MODE_SGMII; + +- fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, lane->port, mode, ++ fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, mode, + submode); + if (fw_mode < 0) { + dev_err(lane->dev, "invalid COMPHY mode\n"); +@@ -172,9 +165,10 @@ static int mvebu_a3700_comphy_power_on(s + struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); + u32 fw_param; + int fw_mode; ++ int fw_port; + int ret; + +- fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, lane->port, ++ fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, + lane->mode, lane->submode); + if (fw_mode < 0) { + dev_err(lane->dev, "invalid COMPHY mode\n"); +@@ -191,17 +185,18 @@ static int mvebu_a3700_comphy_power_on(s + fw_param = COMPHY_FW_MODE(fw_mode); + break; + case PHY_MODE_ETHERNET: ++ fw_port = (lane->id == 0) ? 1 : 0; + switch (lane->submode) { + case PHY_INTERFACE_MODE_SGMII: + dev_dbg(lane->dev, "set lane %d to SGMII mode\n", + lane->id); +- fw_param = COMPHY_FW_NET(fw_mode, lane->port, ++ fw_param = COMPHY_FW_NET(fw_mode, fw_port, + COMPHY_FW_SPEED_1_25G); + break; + case PHY_INTERFACE_MODE_2500BASEX: + dev_dbg(lane->dev, "set lane %d to 2500BASEX mode\n", + lane->id); +- fw_param = COMPHY_FW_NET(fw_mode, lane->port, ++ fw_param = COMPHY_FW_NET(fw_mode, fw_port, + COMPHY_FW_SPEED_3_125G); + break; + default: +@@ -212,8 +207,7 @@ static int mvebu_a3700_comphy_power_on(s + break; + case PHY_MODE_PCIE: + dev_dbg(lane->dev, "set lane %d to PCIe mode\n", lane->id); +- fw_param = COMPHY_FW_PCIE(fw_mode, lane->port, +- COMPHY_FW_SPEED_5G, ++ fw_param = COMPHY_FW_PCIE(fw_mode, COMPHY_FW_SPEED_5G, + phy->attrs.bus_width); + break; + default: +@@ -247,17 +241,20 @@ static struct phy *mvebu_a3700_comphy_xl + struct of_phandle_args *args) + { + struct mvebu_a3700_comphy_lane *lane; ++ unsigned int port; + struct phy *phy; + +- if (WARN_ON(args->args[0] >= MVEBU_A3700_COMPHY_PORTS)) +- return ERR_PTR(-EINVAL); +- + phy = of_phy_simple_xlate(dev, args); + if (IS_ERR(phy)) + return phy; + + lane = phy_get_drvdata(phy); +- lane->port = args->args[0]; ++ ++ port = args->args[0]; ++ if (port != 0 && (port != 1 || lane->id != 0)) { ++ dev_err(lane->dev, "invalid port number %u\n", port); ++ return ERR_PTR(-EINVAL); ++ } + + return phy; + } +@@ -302,7 +299,6 @@ static int mvebu_a3700_comphy_probe(stru + lane->mode = PHY_MODE_INVALID; + lane->submode = PHY_INTERFACE_MODE_NA; + lane->id = lane_id; +- lane->port = -1; + phy_set_drvdata(phy, lane); + } + diff --git a/target/linux/generic/pending-5.10/851-0002-phy-marvell-phy-mvebu-a3700-comphy-Add-native-kernel.patch b/target/linux/generic/pending-5.10/851-0002-phy-marvell-phy-mvebu-a3700-comphy-Add-native-kernel.patch new file mode 100644 index 0000000000..73ead1e16c --- /dev/null +++ b/target/linux/generic/pending-5.10/851-0002-phy-marvell-phy-mvebu-a3700-comphy-Add-native-kernel.patch @@ -0,0 +1,1564 @@ +From 9d276da259cce20b2ed7a868b6e6a6a205f7bb04 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Thu, 23 Sep 2021 19:20:13 +0200 +Subject: [PATCH] phy: marvell: phy-mvebu-a3700-comphy: Add native kernel + implementation +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Remove old RPC implementation and add a new native kernel implementation. + +The old implementation uses ARM SMC API to issue RPC calls to ARM Trusted +Firmware which provides real implementation of PHY configuration. + +But older versions of ARM Trusted Firmware do not provide this PHY +configuration functionality, simply returning: operation not supported; or +worse, some versions provide the configuration functionality incorrectly. + +For example the firmware shipped in ESPRESSObin board has this older +version of ARM Trusted Firmware and therefore SATA, USB 3.0 and PCIe +functionality do not work with newer versions of Linux kernel. + +Due to the above reasons, the following commits were introduced into Linux, +to workaround these issues by ignoring -EOPNOTSUPP error code from +phy-mvebu-a3700-comphy driver function phy_power_on(): + +commit 45aefe3d2251 ("ata: ahci: mvebu: Make SATA PHY optional for Armada +3720") +commit 3241929b67d2 ("usb: host: xhci: mvebu: make USB 3.0 PHY optional for +Armada 3720") +commit b0c6ae0f8948 ("PCI: aardvark: Fix initialization with old Marvell's +Arm Trusted Firmware") + +Replace this RPC implementation with proper native kernel implementation, +which is independent on the firmware. Never return -EOPNOTSUPP for proper +arguments. + +This should solve multiple issues with real-world boards, where it is not +possible or really inconvenient to change the firmware. Let's eliminate +these issues. + +This implementation is ported directly from Armada 3720 comphy driver found +in newest version of ARM Trusted Firmware source code, but with various +fixes of register names, some added comments, some refactoring due to the +original code not conforming to kernel standards. Also PCIe mode poweroff +support was added here, and PHY reset support. These changes are also going +to be sent to ARM Trusted Firmware. + +Signed-off-by: Pali Rohár +Acked-by: Miquel Raynal +[ Pali did the porting from ATF. + I (Marek) then fixed some register names, some various other things, + added some comments and refactored the code to kernel standards. Also + fixed PHY poweroff and added PHY reset. ] +Signed-off-by: Marek Behún +--- + drivers/phy/marvell/phy-mvebu-a3700-comphy.c | 1351 ++++++++++++++++-- + 1 file changed, 1234 insertions(+), 117 deletions(-) + +--- a/drivers/phy/marvell/phy-mvebu-a3700-comphy.c ++++ b/drivers/phy/marvell/phy-mvebu-a3700-comphy.c +@@ -5,12 +5,16 @@ + * Authors: + * Evan Wang + * Miquèl Raynal ++ * Pali Rohár ++ * Marek Behún + * + * Structure inspired from phy-mvebu-cp110-comphy.c written by Antoine Tenart. +- * SMC call initial support done by Grzegorz Jaszczyk. ++ * Comphy code from ARM Trusted Firmware ported by Pali Rohár ++ * and Marek Behún . + */ + +-#include ++#include ++#include + #include + #include + #include +@@ -18,103 +22,1147 @@ + #include + #include + #include ++#include + +-#define MVEBU_A3700_COMPHY_LANES 3 ++#define PLL_SET_DELAY_US 600 ++#define COMPHY_PLL_SLEEP 1000 ++#define COMPHY_PLL_TIMEOUT 150000 ++ ++/* Comphy lane2 indirect access register offset */ ++#define COMPHY_LANE2_INDIR_ADDR 0x0 ++#define COMPHY_LANE2_INDIR_DATA 0x4 ++ ++/* SATA and USB3 PHY offset compared to SATA PHY */ ++#define COMPHY_LANE2_REGS_BASE 0x200 ++ ++/* ++ * When accessing common PHY lane registers directly, we need to shift by 1, ++ * since the registers are 16-bit. ++ */ ++#define COMPHY_LANE_REG_DIRECT(reg) (((reg) & 0x7FF) << 1) ++ ++/* COMPHY registers */ ++#define COMPHY_POWER_PLL_CTRL 0x01 ++#define PU_IVREF_BIT BIT(15) ++#define PU_PLL_BIT BIT(14) ++#define PU_RX_BIT BIT(13) ++#define PU_TX_BIT BIT(12) ++#define PU_TX_INTP_BIT BIT(11) ++#define PU_DFE_BIT BIT(10) ++#define RESET_DTL_RX_BIT BIT(9) ++#define PLL_LOCK_BIT BIT(8) ++#define REF_FREF_SEL_MASK GENMASK(4, 0) ++#define REF_FREF_SEL_SERDES_25MHZ FIELD_PREP(REF_FREF_SEL_MASK, 0x1) ++#define REF_FREF_SEL_SERDES_40MHZ FIELD_PREP(REF_FREF_SEL_MASK, 0x3) ++#define REF_FREF_SEL_SERDES_50MHZ FIELD_PREP(REF_FREF_SEL_MASK, 0x4) ++#define REF_FREF_SEL_PCIE_USB3_25MHZ FIELD_PREP(REF_FREF_SEL_MASK, 0x2) ++#define REF_FREF_SEL_PCIE_USB3_40MHZ FIELD_PREP(REF_FREF_SEL_MASK, 0x3) ++#define COMPHY_MODE_MASK GENMASK(7, 5) ++#define COMPHY_MODE_SATA FIELD_PREP(COMPHY_MODE_MASK, 0x0) ++#define COMPHY_MODE_PCIE FIELD_PREP(COMPHY_MODE_MASK, 0x3) ++#define COMPHY_MODE_SERDES FIELD_PREP(COMPHY_MODE_MASK, 0x4) ++#define COMPHY_MODE_USB3 FIELD_PREP(COMPHY_MODE_MASK, 0x5) ++ ++#define COMPHY_KVCO_CAL_CTRL 0x02 ++#define USE_MAX_PLL_RATE_BIT BIT(12) ++#define SPEED_PLL_MASK GENMASK(7, 2) ++#define SPEED_PLL_VALUE_16 FIELD_PREP(SPEED_PLL_MASK, 0x10) ++ ++#define COMPHY_DIG_LOOPBACK_EN 0x23 ++#define SEL_DATA_WIDTH_MASK GENMASK(11, 10) ++#define DATA_WIDTH_10BIT FIELD_PREP(SEL_DATA_WIDTH_MASK, 0x0) ++#define DATA_WIDTH_20BIT FIELD_PREP(SEL_DATA_WIDTH_MASK, 0x1) ++#define DATA_WIDTH_40BIT FIELD_PREP(SEL_DATA_WIDTH_MASK, 0x2) ++#define PLL_READY_TX_BIT BIT(4) ++ ++#define COMPHY_SYNC_PATTERN 0x24 ++#define TXD_INVERT_BIT BIT(10) ++#define RXD_INVERT_BIT BIT(11) ++ ++#define COMPHY_SYNC_MASK_GEN 0x25 ++#define PHY_GEN_MAX_MASK GENMASK(11, 10) ++#define PHY_GEN_MAX_USB3_5G FIELD_PREP(PHY_GEN_MAX_MASK, 0x1) ++ ++#define COMPHY_ISOLATION_CTRL 0x26 ++#define PHY_ISOLATE_MODE BIT(15) ++ ++#define COMPHY_GEN2_SET2 0x3e ++#define GS2_TX_SSC_AMP_MASK GENMASK(15, 9) ++#define GS2_TX_SSC_AMP_4128 FIELD_PREP(GS2_TX_SSC_AMP_MASK, 0x20) ++#define GS2_VREG_RXTX_MAS_ISET_MASK GENMASK(8, 7) ++#define GS2_VREG_RXTX_MAS_ISET_60U FIELD_PREP(GS2_VREG_RXTX_MAS_ISET_MASK,\ ++ 0x0) ++#define GS2_VREG_RXTX_MAS_ISET_80U FIELD_PREP(GS2_VREG_RXTX_MAS_ISET_MASK,\ ++ 0x1) ++#define GS2_VREG_RXTX_MAS_ISET_100U FIELD_PREP(GS2_VREG_RXTX_MAS_ISET_MASK,\ ++ 0x2) ++#define GS2_VREG_RXTX_MAS_ISET_120U FIELD_PREP(GS2_VREG_RXTX_MAS_ISET_MASK,\ ++ 0x3) ++#define GS2_RSVD_6_0_MASK GENMASK(6, 0) ++ ++#define COMPHY_GEN3_SET2 0x3f ++ ++#define COMPHY_IDLE_SYNC_EN 0x48 ++#define IDLE_SYNC_EN BIT(12) ++ ++#define COMPHY_MISC_CTRL0 0x4F ++#define CLK100M_125M_EN BIT(4) ++#define TXDCLK_2X_SEL BIT(6) ++#define CLK500M_EN BIT(7) ++#define PHY_REF_CLK_SEL BIT(10) ++ ++#define COMPHY_SFT_RESET 0x52 ++#define SFT_RST BIT(9) ++#define SFT_RST_NO_REG BIT(10) ++ ++#define COMPHY_MISC_CTRL1 0x73 ++#define SEL_BITS_PCIE_FORCE BIT(15) ++ ++#define COMPHY_GEN2_SET3 0x112 ++#define GS3_FFE_CAP_SEL_MASK GENMASK(3, 0) ++#define GS3_FFE_CAP_SEL_VALUE FIELD_PREP(GS3_FFE_CAP_SEL_MASK, 0xF) ++ ++/* PIPE registers */ ++#define COMPHY_PIPE_LANE_CFG0 0x180 ++#define PRD_TXDEEMPH0_MASK BIT(0) ++#define PRD_TXMARGIN_MASK GENMASK(3, 1) ++#define PRD_TXSWING_MASK BIT(4) ++#define CFG_TX_ALIGN_POS_MASK GENMASK(8, 5) ++ ++#define COMPHY_PIPE_LANE_CFG1 0x181 ++#define PRD_TXDEEMPH1_MASK BIT(15) ++#define USE_MAX_PLL_RATE_EN BIT(9) ++#define TX_DET_RX_MODE BIT(6) ++#define GEN2_TX_DATA_DLY_MASK GENMASK(4, 3) ++#define GEN2_TX_DATA_DLY_DEFT FIELD_PREP(GEN2_TX_DATA_DLY_MASK, 2) ++#define TX_ELEC_IDLE_MODE_EN BIT(0) ++ ++#define COMPHY_PIPE_LANE_STAT1 0x183 ++#define TXDCLK_PCLK_EN BIT(0) ++ ++#define COMPHY_PIPE_LANE_CFG4 0x188 ++#define SPREAD_SPECTRUM_CLK_EN BIT(7) ++ ++#define COMPHY_PIPE_RST_CLK_CTRL 0x1C1 ++#define PIPE_SOFT_RESET BIT(0) ++#define PIPE_REG_RESET BIT(1) ++#define MODE_CORE_CLK_FREQ_SEL BIT(9) ++#define MODE_PIPE_WIDTH_32 BIT(3) ++#define MODE_REFDIV_MASK GENMASK(5, 4) ++#define MODE_REFDIV_BY_4 FIELD_PREP(MODE_REFDIV_MASK, 0x2) ++ ++#define COMPHY_PIPE_TEST_MODE_CTRL 0x1C2 ++#define MODE_MARGIN_OVERRIDE BIT(2) ++ ++#define COMPHY_PIPE_CLK_SRC_LO 0x1C3 ++#define MODE_CLK_SRC BIT(0) ++#define BUNDLE_PERIOD_SEL BIT(1) ++#define BUNDLE_PERIOD_SCALE_MASK GENMASK(3, 2) ++#define BUNDLE_SAMPLE_CTRL BIT(4) ++#define PLL_READY_DLY_MASK GENMASK(7, 5) ++#define CFG_SEL_20B BIT(15) ++ ++#define COMPHY_PIPE_PWR_MGM_TIM1 0x1D0 ++#define CFG_PM_OSCCLK_WAIT_MASK GENMASK(15, 12) ++#define CFG_PM_RXDEN_WAIT_MASK GENMASK(11, 8) ++#define CFG_PM_RXDEN_WAIT_1_UNIT FIELD_PREP(CFG_PM_RXDEN_WAIT_MASK, 0x1) ++#define CFG_PM_RXDLOZ_WAIT_MASK GENMASK(7, 0) ++#define CFG_PM_RXDLOZ_WAIT_7_UNIT FIELD_PREP(CFG_PM_RXDLOZ_WAIT_MASK, 0x7) ++#define CFG_PM_RXDLOZ_WAIT_12_UNIT FIELD_PREP(CFG_PM_RXDLOZ_WAIT_MASK, 0xC) ++ ++/* ++ * This register is not from PHY lane register space. It only exists in the ++ * indirect register space, before the actual PHY lane 2 registers. So the ++ * offset is absolute, not relative to COMPHY_LANE2_REGS_BASE. ++ * It is used only for SATA PHY initialization. ++ */ ++#define COMPHY_RESERVED_REG 0x0E ++#define PHYCTRL_FRM_PIN_BIT BIT(13) + +-/* COMPHY Fast SMC function identifiers */ +-#define COMPHY_SIP_POWER_ON 0x82000001 +-#define COMPHY_SIP_POWER_OFF 0x82000002 +-#define COMPHY_SIP_PLL_LOCK 0x82000003 +- +-#define COMPHY_FW_MODE_SATA 0x1 +-#define COMPHY_FW_MODE_SGMII 0x2 +-#define COMPHY_FW_MODE_2500BASEX 0x3 +-#define COMPHY_FW_MODE_USB3H 0x4 +-#define COMPHY_FW_MODE_USB3D 0x5 +-#define COMPHY_FW_MODE_PCIE 0x6 +-#define COMPHY_FW_MODE_USB3 0xa +- +-#define COMPHY_FW_SPEED_1_25G 0 /* SGMII 1G */ +-#define COMPHY_FW_SPEED_2_5G 1 +-#define COMPHY_FW_SPEED_3_125G 2 /* 2500BASE-X */ +-#define COMPHY_FW_SPEED_5G 3 +-#define COMPHY_FW_SPEED_MAX 0x3F +- +-#define COMPHY_FW_MODE(mode) ((mode) << 12) +-#define COMPHY_FW_NET(mode, idx, speed) (COMPHY_FW_MODE(mode) | \ +- ((idx) << 8) | \ +- ((speed) << 2)) +-#define COMPHY_FW_PCIE(mode, speed, width) (COMPHY_FW_NET(mode, 0, speed) | \ +- ((width) << 18)) ++/* South Bridge PHY Configuration Registers */ ++#define COMPHY_PHY_REG(lane, reg) (((1 - (lane)) * 0x28) + ((reg) & 0x3f)) ++ ++/* ++ * lane0: USB3/GbE1 PHY Configuration 1 ++ * lane1: PCIe/GbE0 PHY Configuration 1 ++ * (used only by SGMII code) ++ */ ++#define COMPHY_PHY_CFG1 0x0 ++#define PIN_PU_IVREF_BIT BIT(1) ++#define PIN_RESET_CORE_BIT BIT(11) ++#define PIN_RESET_COMPHY_BIT BIT(12) ++#define PIN_PU_PLL_BIT BIT(16) ++#define PIN_PU_RX_BIT BIT(17) ++#define PIN_PU_TX_BIT BIT(18) ++#define PIN_TX_IDLE_BIT BIT(19) ++#define GEN_RX_SEL_MASK GENMASK(25, 22) ++#define GEN_RX_SEL_VALUE(val) FIELD_PREP(GEN_RX_SEL_MASK, (val)) ++#define GEN_TX_SEL_MASK GENMASK(29, 26) ++#define GEN_TX_SEL_VALUE(val) FIELD_PREP(GEN_TX_SEL_MASK, (val)) ++#define SERDES_SPEED_1_25_G 0x6 ++#define SERDES_SPEED_3_125_G 0x8 ++#define PHY_RX_INIT_BIT BIT(30) ++ ++/* ++ * lane0: USB3/GbE1 PHY Status 1 ++ * lane1: PCIe/GbE0 PHY Status 1 ++ * (used only by SGMII code) ++ */ ++#define COMPHY_PHY_STAT1 0x18 ++#define PHY_RX_INIT_DONE_BIT BIT(0) ++#define PHY_PLL_READY_RX_BIT BIT(2) ++#define PHY_PLL_READY_TX_BIT BIT(3) ++ ++/* PHY Selector */ ++#define COMPHY_SELECTOR_PHY_REG 0xFC ++/* bit0: 0: Lane1 is GbE0; 1: Lane1 is PCIe */ ++#define COMPHY_SELECTOR_PCIE_GBE0_SEL_BIT BIT(0) ++/* bit4: 0: Lane0 is GbE1; 1: Lane0 is USB3 */ ++#define COMPHY_SELECTOR_USB3_GBE1_SEL_BIT BIT(4) ++/* bit8: 0: Lane0 is USB3 instead of GbE1, Lane2 is SATA; 1: Lane2 is USB3 */ ++#define COMPHY_SELECTOR_USB3_PHY_SEL_BIT BIT(8) + + struct mvebu_a3700_comphy_conf { + unsigned int lane; + enum phy_mode mode; + int submode; +- u32 fw_mode; + }; + +-#define MVEBU_A3700_COMPHY_CONF(_lane, _mode, _smode, _fw) \ ++#define MVEBU_A3700_COMPHY_CONF(_lane, _mode, _smode) \ + { \ + .lane = _lane, \ + .mode = _mode, \ + .submode = _smode, \ +- .fw_mode = _fw, \ + } + +-#define MVEBU_A3700_COMPHY_CONF_GEN(_lane, _mode, _fw) \ +- MVEBU_A3700_COMPHY_CONF(_lane, _mode, PHY_INTERFACE_MODE_NA, _fw) ++#define MVEBU_A3700_COMPHY_CONF_GEN(_lane, _mode) \ ++ MVEBU_A3700_COMPHY_CONF(_lane, _mode, PHY_INTERFACE_MODE_NA) + +-#define MVEBU_A3700_COMPHY_CONF_ETH(_lane, _smode, _fw) \ +- MVEBU_A3700_COMPHY_CONF(_lane, PHY_MODE_ETHERNET, _smode, _fw) ++#define MVEBU_A3700_COMPHY_CONF_ETH(_lane, _smode) \ ++ MVEBU_A3700_COMPHY_CONF(_lane, PHY_MODE_ETHERNET, _smode) + + static const struct mvebu_a3700_comphy_conf mvebu_a3700_comphy_modes[] = { + /* lane 0 */ +- MVEBU_A3700_COMPHY_CONF_GEN(0, PHY_MODE_USB_HOST_SS, +- COMPHY_FW_MODE_USB3H), +- MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_SGMII, +- COMPHY_FW_MODE_SGMII), +- MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_2500BASEX, +- COMPHY_FW_MODE_2500BASEX), ++ MVEBU_A3700_COMPHY_CONF_GEN(0, PHY_MODE_USB_HOST_SS), ++ MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_SGMII), ++ MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_1000BASEX), ++ MVEBU_A3700_COMPHY_CONF_ETH(0, PHY_INTERFACE_MODE_2500BASEX), + /* lane 1 */ +- MVEBU_A3700_COMPHY_CONF_GEN(1, PHY_MODE_PCIE, COMPHY_FW_MODE_PCIE), +- MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_SGMII, +- COMPHY_FW_MODE_SGMII), +- MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_2500BASEX, +- COMPHY_FW_MODE_2500BASEX), ++ MVEBU_A3700_COMPHY_CONF_GEN(1, PHY_MODE_PCIE), ++ MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_SGMII), ++ MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_1000BASEX), ++ MVEBU_A3700_COMPHY_CONF_ETH(1, PHY_INTERFACE_MODE_2500BASEX), + /* lane 2 */ +- MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_SATA, COMPHY_FW_MODE_SATA), +- MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_USB_HOST_SS, +- COMPHY_FW_MODE_USB3H), ++ MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_SATA), ++ MVEBU_A3700_COMPHY_CONF_GEN(2, PHY_MODE_USB_HOST_SS), ++}; ++ ++struct mvebu_a3700_comphy_priv { ++ void __iomem *comphy_regs; ++ void __iomem *lane0_phy_regs; /* USB3 and GbE1 */ ++ void __iomem *lane1_phy_regs; /* PCIe and GbE0 */ ++ void __iomem *lane2_phy_indirect; /* SATA and USB3 */ ++ spinlock_t lock; /* for PHY selector access */ ++ bool xtal_is_40m; + }; + + struct mvebu_a3700_comphy_lane { ++ struct mvebu_a3700_comphy_priv *priv; + struct device *dev; + unsigned int id; + enum phy_mode mode; + int submode; ++ bool invert_tx; ++ bool invert_rx; ++ bool needs_reset; ++}; ++ ++struct gbe_phy_init_data_fix { ++ u16 addr; ++ u16 value; ++}; ++ ++/* Changes to 40M1G25 mode data required for running 40M3G125 init mode */ ++static struct gbe_phy_init_data_fix gbe_phy_init_fix[] = { ++ { 0x005, 0x07CC }, { 0x015, 0x0000 }, { 0x01B, 0x0000 }, ++ { 0x01D, 0x0000 }, { 0x01E, 0x0000 }, { 0x01F, 0x0000 }, ++ { 0x020, 0x0000 }, { 0x021, 0x0030 }, { 0x026, 0x0888 }, ++ { 0x04D, 0x0152 }, { 0x04F, 0xA020 }, { 0x050, 0x07CC }, ++ { 0x053, 0xE9CA }, { 0x055, 0xBD97 }, { 0x071, 0x3015 }, ++ { 0x076, 0x03AA }, { 0x07C, 0x0FDF }, { 0x0C2, 0x3030 }, ++ { 0x0C3, 0x8000 }, { 0x0E2, 0x5550 }, { 0x0E3, 0x12A4 }, ++ { 0x0E4, 0x7D00 }, { 0x0E6, 0x0C83 }, { 0x101, 0xFCC0 }, ++ { 0x104, 0x0C10 } + }; + +-static int mvebu_a3700_comphy_smc(unsigned long function, unsigned long lane, +- unsigned long mode) ++/* 40M1G25 mode init data */ ++static u16 gbe_phy_init[512] = { ++ /* 0 1 2 3 4 5 6 7 */ ++ /*-----------------------------------------------------------*/ ++ /* 8 9 A B C D E F */ ++ 0x3110, 0xFD83, 0x6430, 0x412F, 0x82C0, 0x06FA, 0x4500, 0x6D26, /* 00 */ ++ 0xAFC0, 0x8000, 0xC000, 0x0000, 0x2000, 0x49CC, 0x0BC9, 0x2A52, /* 08 */ ++ 0x0BD2, 0x0CDE, 0x13D2, 0x0CE8, 0x1149, 0x10E0, 0x0000, 0x0000, /* 10 */ ++ 0x0000, 0x0000, 0x0000, 0x0001, 0x0000, 0x4134, 0x0D2D, 0xFFFF, /* 18 */ ++ 0xFFE0, 0x4030, 0x1016, 0x0030, 0x0000, 0x0800, 0x0866, 0x0000, /* 20 */ ++ 0x0000, 0x0000, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, /* 28 */ ++ 0xFFFF, 0xFFFF, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* 30 */ ++ 0x0000, 0x0000, 0x000F, 0x6A62, 0x1988, 0x3100, 0x3100, 0x3100, /* 38 */ ++ 0x3100, 0xA708, 0x2430, 0x0830, 0x1030, 0x4610, 0xFF00, 0xFF00, /* 40 */ ++ 0x0060, 0x1000, 0x0400, 0x0040, 0x00F0, 0x0155, 0x1100, 0xA02A, /* 48 */ ++ 0x06FA, 0x0080, 0xB008, 0xE3ED, 0x5002, 0xB592, 0x7A80, 0x0001, /* 50 */ ++ 0x020A, 0x8820, 0x6014, 0x8054, 0xACAA, 0xFC88, 0x2A02, 0x45CF, /* 58 */ ++ 0x000F, 0x1817, 0x2860, 0x064F, 0x0000, 0x0204, 0x1800, 0x6000, /* 60 */ ++ 0x810F, 0x4F23, 0x4000, 0x4498, 0x0850, 0x0000, 0x000E, 0x1002, /* 68 */ ++ 0x9D3A, 0x3009, 0xD066, 0x0491, 0x0001, 0x6AB0, 0x0399, 0x3780, /* 70 */ ++ 0x0040, 0x5AC0, 0x4A80, 0x0000, 0x01DF, 0x0000, 0x0007, 0x0000, /* 78 */ ++ 0x2D54, 0x00A1, 0x4000, 0x0100, 0xA20A, 0x0000, 0x0000, 0x0000, /* 80 */ ++ 0x0000, 0x0000, 0x0000, 0x7400, 0x0E81, 0x1000, 0x1242, 0x0210, /* 88 */ ++ 0x80DF, 0x0F1F, 0x2F3F, 0x4F5F, 0x6F7F, 0x0F1F, 0x2F3F, 0x4F5F, /* 90 */ ++ 0x6F7F, 0x4BAD, 0x0000, 0x0000, 0x0800, 0x0000, 0x2400, 0xB651, /* 98 */ ++ 0xC9E0, 0x4247, 0x0A24, 0x0000, 0xAF19, 0x1004, 0x0000, 0x0000, /* A0 */ ++ 0x0000, 0x0013, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* A8 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /* B0 */ ++ 0x0000, 0x0000, 0x0000, 0x0060, 0x0000, 0x0000, 0x0000, 0x0000, /* B8 */ ++ 0x0000, 0x0000, 0x3010, 0xFA00, 0x0000, 0x0000, 0x0000, 0x0003, /* C0 */ ++ 0x1618, 0x8200, 0x8000, 0x0400, 0x050F, 0x0000, 0x0000, 0x0000, /* C8 */ ++ 0x4C93, 0x0000, 0x1000, 0x1120, 0x0010, 0x1242, 0x1242, 0x1E00, /* D0 */ ++ 0x0000, 0x0000, 0x0000, 0x00F8, 0x0000, 0x0041, 0x0800, 0x0000, /* D8 */ ++ 0x82A0, 0x572E, 0x2490, 0x14A9, 0x4E00, 0x0000, 0x0803, 0x0541, /* E0 */ ++ 0x0C15, 0x0000, 0x0000, 0x0400, 0x2626, 0x0000, 0x0000, 0x4200, /* E8 */ ++ 0x0000, 0xAA55, 0x1020, 0x0000, 0x0000, 0x5010, 0x0000, 0x0000, /* F0 */ ++ 0x0000, 0x0000, 0x5000, 0x0000, 0x0000, 0x0000, 0x02F2, 0x0000, /* F8 */ ++ 0x101F, 0xFDC0, 0x4000, 0x8010, 0x0110, 0x0006, 0x0000, 0x0000, /*100 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*108 */ ++ 0x04CF, 0x0000, 0x04CF, 0x0000, 0x04CF, 0x0000, 0x04C6, 0x0000, /*110 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*118 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*120 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*128 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*130 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*138 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*140 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*148 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*150 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*158 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*160 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*168 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*170 */ ++ 0x0000, 0x0000, 0x0000, 0x00F0, 0x08A2, 0x3112, 0x0A14, 0x0000, /*178 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*180 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*188 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*190 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*198 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*1A0 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*1A8 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*1B0 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*1B8 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*1C0 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*1C8 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*1D0 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*1D8 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*1E0 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*1E8 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, /*1F0 */ ++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 /*1F8 */ ++}; ++ ++static inline void comphy_reg_set(void __iomem *addr, u32 data, u32 mask) + { +- struct arm_smccc_res res; +- s32 ret; ++ u32 val; + +- arm_smccc_smc(function, lane, mode, 0, 0, 0, 0, 0, &res); +- ret = res.a0; ++ val = readl(addr); ++ val = (val & ~mask) | (data & mask); ++ writel(val, addr); ++} + +- switch (ret) { +- case SMCCC_RET_SUCCESS: +- return 0; +- case SMCCC_RET_NOT_SUPPORTED: +- return -EOPNOTSUPP; ++static inline void comphy_reg_set16(void __iomem *addr, u16 data, u16 mask) ++{ ++ u16 val; ++ ++ val = readw(addr); ++ val = (val & ~mask) | (data & mask); ++ writew(val, addr); ++} ++ ++/* Used for accessing lane 2 registers (SATA/USB3 PHY) */ ++static void comphy_set_indirect(struct mvebu_a3700_comphy_priv *priv, ++ u32 offset, u16 data, u16 mask) ++{ ++ writel(offset, ++ priv->lane2_phy_indirect + COMPHY_LANE2_INDIR_ADDR); ++ comphy_reg_set(priv->lane2_phy_indirect + COMPHY_LANE2_INDIR_DATA, ++ data, mask); ++} ++ ++static void comphy_lane_reg_set(struct mvebu_a3700_comphy_lane *lane, ++ u16 reg, u16 data, u16 mask) ++{ ++ if (lane->id == 2) { ++ /* lane 2 PHY registers are accessed indirectly */ ++ comphy_set_indirect(lane->priv, ++ reg + COMPHY_LANE2_REGS_BASE, ++ data, mask); ++ } else { ++ void __iomem *base = lane->id == 1 ? ++ lane->priv->lane1_phy_regs : ++ lane->priv->lane0_phy_regs; ++ ++ comphy_reg_set16(base + COMPHY_LANE_REG_DIRECT(reg), ++ data, mask); ++ } ++} ++ ++static int comphy_lane_reg_poll(struct mvebu_a3700_comphy_lane *lane, ++ u16 reg, u16 bits, ++ ulong sleep_us, ulong timeout_us) ++{ ++ int ret; ++ ++ if (lane->id == 2) { ++ u32 data; ++ ++ /* lane 2 PHY registers are accessed indirectly */ ++ writel(reg + COMPHY_LANE2_REGS_BASE, ++ lane->priv->lane2_phy_indirect + ++ COMPHY_LANE2_INDIR_ADDR); ++ ++ ret = readl_poll_timeout(lane->priv->lane2_phy_indirect + ++ COMPHY_LANE2_INDIR_DATA, ++ data, (data & bits) == bits, ++ sleep_us, timeout_us); ++ } else { ++ void __iomem *base = lane->id == 1 ? ++ lane->priv->lane1_phy_regs : ++ lane->priv->lane0_phy_regs; ++ u16 data; ++ ++ ret = readw_poll_timeout(base + COMPHY_LANE_REG_DIRECT(reg), ++ data, (data & bits) == bits, ++ sleep_us, timeout_us); ++ } ++ ++ return ret; ++} ++ ++static void comphy_periph_reg_set(struct mvebu_a3700_comphy_lane *lane, ++ u8 reg, u32 data, u32 mask) ++{ ++ comphy_reg_set(lane->priv->comphy_regs + COMPHY_PHY_REG(lane->id, reg), ++ data, mask); ++} ++ ++static int comphy_periph_reg_poll(struct mvebu_a3700_comphy_lane *lane, ++ u8 reg, u32 bits, ++ ulong sleep_us, ulong timeout_us) ++{ ++ u32 data; ++ ++ return readl_poll_timeout(lane->priv->comphy_regs + ++ COMPHY_PHY_REG(lane->id, reg), ++ data, (data & bits) == bits, ++ sleep_us, timeout_us); ++} ++ ++/* PHY selector configures with corresponding modes */ ++static int ++mvebu_a3700_comphy_set_phy_selector(struct mvebu_a3700_comphy_lane *lane) ++{ ++ u32 old, new, clr = 0, set = 0; ++ unsigned long flags; ++ ++ switch (lane->mode) { ++ case PHY_MODE_SATA: ++ /* SATA must be in Lane2 */ ++ if (lane->id == 2) ++ clr = COMPHY_SELECTOR_USB3_PHY_SEL_BIT; ++ else ++ goto error; ++ break; ++ ++ case PHY_MODE_ETHERNET: ++ if (lane->id == 0) ++ clr = COMPHY_SELECTOR_USB3_GBE1_SEL_BIT; ++ else if (lane->id == 1) ++ clr = COMPHY_SELECTOR_PCIE_GBE0_SEL_BIT; ++ else ++ goto error; ++ break; ++ ++ case PHY_MODE_USB_HOST_SS: ++ if (lane->id == 2) ++ set = COMPHY_SELECTOR_USB3_PHY_SEL_BIT; ++ else if (lane->id == 0) ++ set = COMPHY_SELECTOR_USB3_GBE1_SEL_BIT; ++ else ++ goto error; ++ break; ++ ++ case PHY_MODE_PCIE: ++ /* PCIE must be in Lane1 */ ++ if (lane->id == 1) ++ set = COMPHY_SELECTOR_PCIE_GBE0_SEL_BIT; ++ else ++ goto error; ++ break; ++ ++ default: ++ goto error; ++ } ++ ++ spin_lock_irqsave(&lane->priv->lock, flags); ++ ++ old = readl(lane->priv->comphy_regs + COMPHY_SELECTOR_PHY_REG); ++ new = (old & ~clr) | set; ++ writel(new, lane->priv->comphy_regs + COMPHY_SELECTOR_PHY_REG); ++ ++ spin_unlock_irqrestore(&lane->priv->lock, flags); ++ ++ dev_dbg(lane->dev, ++ "COMPHY[%d] mode[%d] changed PHY selector 0x%08x -> 0x%08x\n", ++ lane->id, lane->mode, old, new); ++ ++ return 0; ++error: ++ dev_err(lane->dev, "COMPHY[%d] mode[%d] is invalid\n", lane->id, ++ lane->mode); ++ return -EINVAL; ++} ++ ++static int ++mvebu_a3700_comphy_sata_power_on(struct mvebu_a3700_comphy_lane *lane) ++{ ++ u32 mask, data, ref_clk; ++ int ret; ++ ++ /* Configure phy selector for SATA */ ++ ret = mvebu_a3700_comphy_set_phy_selector(lane); ++ if (ret) ++ return ret; ++ ++ /* Clear phy isolation mode to make it work in normal mode */ ++ comphy_lane_reg_set(lane, COMPHY_ISOLATION_CTRL, ++ 0x0, PHY_ISOLATE_MODE); ++ ++ /* 0. Check the Polarity invert bits */ ++ data = 0x0; ++ if (lane->invert_tx) ++ data |= TXD_INVERT_BIT; ++ if (lane->invert_rx) ++ data |= RXD_INVERT_BIT; ++ mask = TXD_INVERT_BIT | RXD_INVERT_BIT; ++ comphy_lane_reg_set(lane, COMPHY_SYNC_PATTERN, data, mask); ++ ++ /* 1. Select 40-bit data width */ ++ comphy_lane_reg_set(lane, COMPHY_DIG_LOOPBACK_EN, ++ DATA_WIDTH_40BIT, SEL_DATA_WIDTH_MASK); ++ ++ /* 2. Select reference clock(25M) and PHY mode (SATA) */ ++ if (lane->priv->xtal_is_40m) ++ ref_clk = REF_FREF_SEL_SERDES_40MHZ; ++ else ++ ref_clk = REF_FREF_SEL_SERDES_25MHZ; ++ ++ data = ref_clk | COMPHY_MODE_SATA; ++ mask = REF_FREF_SEL_MASK | COMPHY_MODE_MASK; ++ comphy_lane_reg_set(lane, COMPHY_POWER_PLL_CTRL, data, mask); ++ ++ /* 3. Use maximum PLL rate (no power save) */ ++ comphy_lane_reg_set(lane, COMPHY_KVCO_CAL_CTRL, ++ USE_MAX_PLL_RATE_BIT, USE_MAX_PLL_RATE_BIT); ++ ++ /* 4. Reset reserved bit */ ++ comphy_set_indirect(lane->priv, COMPHY_RESERVED_REG, ++ 0x0, PHYCTRL_FRM_PIN_BIT); ++ ++ /* 5. Set vendor-specific configuration (It is done in sata driver) */ ++ /* XXX: in U-Boot below sequence was executed in this place, in Linux ++ * not. Now it is done only in U-Boot before this comphy ++ * initialization - tests shows that it works ok, but in case of any ++ * future problem it is left for reference. ++ * reg_set(MVEBU_REGS_BASE + 0xe00a0, 0, 0xffffffff); ++ * reg_set(MVEBU_REGS_BASE + 0xe00a4, BIT(6), BIT(6)); ++ */ ++ ++ /* Wait for > 55 us to allow PLL be enabled */ ++ udelay(PLL_SET_DELAY_US); ++ ++ /* Polling status */ ++ ret = comphy_lane_reg_poll(lane, COMPHY_DIG_LOOPBACK_EN, ++ PLL_READY_TX_BIT, COMPHY_PLL_SLEEP, ++ COMPHY_PLL_TIMEOUT); ++ if (ret) { ++ dev_err(lane->dev, "Failed to lock SATA PLL\n"); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static void comphy_gbe_phy_init(struct mvebu_a3700_comphy_lane *lane, ++ bool is_1gbps) ++{ ++ int addr, fix_idx; ++ u16 val; ++ ++ fix_idx = 0; ++ for (addr = 0; addr < 512; addr++) { ++ /* ++ * All PHY register values are defined in full for 3.125Gbps ++ * SERDES speed. The values required for 1.25 Gbps are almost ++ * the same and only few registers should be "fixed" in ++ * comparison to 3.125 Gbps values. These register values are ++ * stored in "gbe_phy_init_fix" array. ++ */ ++ if (!is_1gbps && gbe_phy_init_fix[fix_idx].addr == addr) { ++ /* Use new value */ ++ val = gbe_phy_init_fix[fix_idx].value; ++ if (fix_idx < ARRAY_SIZE(gbe_phy_init_fix)) ++ fix_idx++; ++ } else { ++ val = gbe_phy_init[addr]; ++ } ++ ++ comphy_lane_reg_set(lane, addr, val, 0xFFFF); ++ } ++} ++ ++static int ++mvebu_a3700_comphy_ethernet_power_on(struct mvebu_a3700_comphy_lane *lane) ++{ ++ u32 mask, data, speed_sel; ++ int ret; ++ ++ /* Set selector */ ++ ret = mvebu_a3700_comphy_set_phy_selector(lane); ++ if (ret) ++ return ret; ++ ++ /* ++ * 1. Reset PHY by setting PHY input port PIN_RESET=1. ++ * 2. Set PHY input port PIN_TX_IDLE=1, PIN_PU_IVREF=1 to keep ++ * PHY TXP/TXN output to idle state during PHY initialization ++ * 3. Set PHY input port PIN_PU_PLL=0, PIN_PU_RX=0, PIN_PU_TX=0. ++ */ ++ data = PIN_PU_IVREF_BIT | PIN_TX_IDLE_BIT | PIN_RESET_COMPHY_BIT; ++ mask = data | PIN_RESET_CORE_BIT | PIN_PU_PLL_BIT | PIN_PU_RX_BIT | ++ PIN_PU_TX_BIT | PHY_RX_INIT_BIT; ++ comphy_periph_reg_set(lane, COMPHY_PHY_CFG1, data, mask); ++ ++ /* 4. Release reset to the PHY by setting PIN_RESET=0. */ ++ data = 0x0; ++ mask = PIN_RESET_COMPHY_BIT; ++ comphy_periph_reg_set(lane, COMPHY_PHY_CFG1, data, mask); ++ ++ /* ++ * 5. Set PIN_PHY_GEN_TX[3:0] and PIN_PHY_GEN_RX[3:0] to decide COMPHY ++ * bit rate ++ */ ++ switch (lane->submode) { ++ case PHY_INTERFACE_MODE_SGMII: ++ case PHY_INTERFACE_MODE_1000BASEX: ++ /* SGMII 1G, SerDes speed 1.25G */ ++ speed_sel = SERDES_SPEED_1_25_G; ++ break; ++ case PHY_INTERFACE_MODE_2500BASEX: ++ /* 2500Base-X, SerDes speed 3.125G */ ++ speed_sel = SERDES_SPEED_3_125_G; ++ break; + default: ++ /* Other rates are not supported */ ++ dev_err(lane->dev, ++ "unsupported phy speed %d on comphy lane%d\n", ++ lane->submode, lane->id); + return -EINVAL; + } ++ data = GEN_RX_SEL_VALUE(speed_sel) | GEN_TX_SEL_VALUE(speed_sel); ++ mask = GEN_RX_SEL_MASK | GEN_TX_SEL_MASK; ++ comphy_periph_reg_set(lane, COMPHY_PHY_CFG1, data, mask); ++ ++ /* ++ * 6. Wait 10mS for bandgap and reference clocks to stabilize; then ++ * start SW programming. ++ */ ++ mdelay(10); ++ ++ /* 7. Program COMPHY register PHY_MODE */ ++ data = COMPHY_MODE_SERDES; ++ mask = COMPHY_MODE_MASK; ++ comphy_lane_reg_set(lane, COMPHY_POWER_PLL_CTRL, data, mask); ++ ++ /* ++ * 8. Set COMPHY register REFCLK_SEL to select the correct REFCLK ++ * source ++ */ ++ data = 0x0; ++ mask = PHY_REF_CLK_SEL; ++ comphy_lane_reg_set(lane, COMPHY_MISC_CTRL0, data, mask); ++ ++ /* ++ * 9. Set correct reference clock frequency in COMPHY register ++ * REF_FREF_SEL. ++ */ ++ if (lane->priv->xtal_is_40m) ++ data = REF_FREF_SEL_SERDES_50MHZ; ++ else ++ data = REF_FREF_SEL_SERDES_25MHZ; ++ ++ mask = REF_FREF_SEL_MASK; ++ comphy_lane_reg_set(lane, COMPHY_POWER_PLL_CTRL, data, mask); ++ ++ /* 10. Program COMPHY register PHY_GEN_MAX[1:0] ++ * This step is mentioned in the flow received from verification team. ++ * However the PHY_GEN_MAX value is only meaningful for other interfaces ++ * (not SERDES). For instance, it selects SATA speed 1.5/3/6 Gbps or ++ * PCIe speed 2.5/5 Gbps ++ */ ++ ++ /* ++ * 11. Program COMPHY register SEL_BITS to set correct parallel data ++ * bus width ++ */ ++ data = DATA_WIDTH_10BIT; ++ mask = SEL_DATA_WIDTH_MASK; ++ comphy_lane_reg_set(lane, COMPHY_DIG_LOOPBACK_EN, data, mask); ++ ++ /* ++ * 12. As long as DFE function needs to be enabled in any mode, ++ * COMPHY register DFE_UPDATE_EN[5:0] shall be programmed to 0x3F ++ * for real chip during COMPHY power on. ++ * The step 14 exists (and empty) in the original initialization flow ++ * obtained from the verification team. According to the functional ++ * specification DFE_UPDATE_EN already has the default value 0x3F ++ */ ++ ++ /* ++ * 13. Program COMPHY GEN registers. ++ * These registers should be programmed based on the lab testing result ++ * to achieve optimal performance. Please contact the CEA group to get ++ * the related GEN table during real chip bring-up. We only required to ++ * run though the entire registers programming flow defined by ++ * "comphy_gbe_phy_init" when the REF clock is 40 MHz. For REF clock ++ * 25 MHz the default values stored in PHY registers are OK. ++ */ ++ dev_dbg(lane->dev, "Running C-DPI phy init %s mode\n", ++ lane->submode == PHY_INTERFACE_MODE_2500BASEX ? "2G5" : "1G"); ++ if (lane->priv->xtal_is_40m) ++ comphy_gbe_phy_init(lane, ++ lane->submode != PHY_INTERFACE_MODE_2500BASEX); ++ ++ /* ++ * 14. [Simulation Only] should not be used for real chip. ++ * By pass power up calibration by programming EXT_FORCE_CAL_DONE ++ * (R02h[9]) to 1 to shorten COMPHY simulation time. ++ */ ++ ++ /* ++ * 15. [Simulation Only: should not be used for real chip] ++ * Program COMPHY register FAST_DFE_TIMER_EN=1 to shorten RX training ++ * simulation time. ++ */ ++ ++ /* ++ * 16. Check the PHY Polarity invert bit ++ */ ++ data = 0x0; ++ if (lane->invert_tx) ++ data |= TXD_INVERT_BIT; ++ if (lane->invert_rx) ++ data |= RXD_INVERT_BIT; ++ mask = TXD_INVERT_BIT | RXD_INVERT_BIT; ++ comphy_lane_reg_set(lane, COMPHY_SYNC_PATTERN, data, mask); ++ ++ /* ++ * 17. Set PHY input ports PIN_PU_PLL, PIN_PU_TX and PIN_PU_RX to 1 to ++ * start PHY power up sequence. All the PHY register programming should ++ * be done before PIN_PU_PLL=1. There should be no register programming ++ * for normal PHY operation from this point. ++ */ ++ data = PIN_PU_PLL_BIT | PIN_PU_RX_BIT | PIN_PU_TX_BIT; ++ mask = data; ++ comphy_periph_reg_set(lane, COMPHY_PHY_CFG1, data, mask); ++ ++ /* ++ * 18. Wait for PHY power up sequence to finish by checking output ports ++ * PIN_PLL_READY_TX=1 and PIN_PLL_READY_RX=1. ++ */ ++ ret = comphy_periph_reg_poll(lane, COMPHY_PHY_STAT1, ++ PHY_PLL_READY_TX_BIT | ++ PHY_PLL_READY_RX_BIT, ++ COMPHY_PLL_SLEEP, COMPHY_PLL_TIMEOUT); ++ if (ret) { ++ dev_err(lane->dev, "Failed to lock PLL for SERDES PHY %d\n", ++ lane->id); ++ return ret; ++ } ++ ++ /* ++ * 19. Set COMPHY input port PIN_TX_IDLE=0 ++ */ ++ comphy_periph_reg_set(lane, COMPHY_PHY_CFG1, 0x0, PIN_TX_IDLE_BIT); ++ ++ /* ++ * 20. After valid data appear on PIN_RXDATA bus, set PIN_RX_INIT=1. To ++ * start RX initialization. PIN_RX_INIT_DONE will be cleared to 0 by the ++ * PHY After RX initialization is done, PIN_RX_INIT_DONE will be set to ++ * 1 by COMPHY Set PIN_RX_INIT=0 after PIN_RX_INIT_DONE= 1. Please ++ * refer to RX initialization part for details. ++ */ ++ comphy_periph_reg_set(lane, COMPHY_PHY_CFG1, ++ PHY_RX_INIT_BIT, PHY_RX_INIT_BIT); ++ ++ ret = comphy_periph_reg_poll(lane, COMPHY_PHY_STAT1, ++ PHY_PLL_READY_TX_BIT | ++ PHY_PLL_READY_RX_BIT, ++ COMPHY_PLL_SLEEP, COMPHY_PLL_TIMEOUT); ++ if (ret) { ++ dev_err(lane->dev, "Failed to lock PLL for SERDES PHY %d\n", ++ lane->id); ++ return ret; ++ } ++ ++ ret = comphy_periph_reg_poll(lane, COMPHY_PHY_STAT1, ++ PHY_RX_INIT_DONE_BIT, ++ COMPHY_PLL_SLEEP, COMPHY_PLL_TIMEOUT); ++ if (ret) { ++ dev_err(lane->dev, "Failed to init RX of SERDES PHY %d\n", ++ lane->id); ++ return ret; ++ } ++ ++ return 0; + } + +-static int mvebu_a3700_comphy_get_fw_mode(int lane, ++static int ++mvebu_a3700_comphy_usb3_power_on(struct mvebu_a3700_comphy_lane *lane) ++{ ++ u32 mask, data, cfg, ref_clk; ++ int ret; ++ ++ /* Set phy seclector */ ++ ret = mvebu_a3700_comphy_set_phy_selector(lane); ++ if (ret) ++ return ret; ++ ++ /* ++ * 0. Set PHY OTG Control(0x5d034), bit 4, Power up OTG module The ++ * register belong to UTMI module, so it is set in UTMI phy driver. ++ */ ++ ++ /* ++ * 1. Set PRD_TXDEEMPH (3.5db de-emph) ++ */ ++ data = PRD_TXDEEMPH0_MASK; ++ mask = PRD_TXDEEMPH0_MASK | PRD_TXMARGIN_MASK | PRD_TXSWING_MASK | ++ CFG_TX_ALIGN_POS_MASK; ++ comphy_lane_reg_set(lane, COMPHY_PIPE_LANE_CFG0, data, mask); ++ ++ /* ++ * 2. Set BIT0: enable transmitter in high impedance mode ++ * Set BIT[3:4]: delay 2 clock cycles for HiZ off latency ++ * Set BIT6: Tx detect Rx at HiZ mode ++ * Unset BIT15: set to 0 to set USB3 De-emphasize level to -3.5db ++ * together with bit 0 of COMPHY_PIPE_LANE_CFG0 register ++ */ ++ data = TX_DET_RX_MODE | GEN2_TX_DATA_DLY_DEFT | TX_ELEC_IDLE_MODE_EN; ++ mask = PRD_TXDEEMPH1_MASK | TX_DET_RX_MODE | GEN2_TX_DATA_DLY_MASK | ++ TX_ELEC_IDLE_MODE_EN; ++ comphy_lane_reg_set(lane, COMPHY_PIPE_LANE_CFG1, data, mask); ++ ++ /* ++ * 3. Set Spread Spectrum Clock Enabled ++ */ ++ comphy_lane_reg_set(lane, COMPHY_PIPE_LANE_CFG4, ++ SPREAD_SPECTRUM_CLK_EN, SPREAD_SPECTRUM_CLK_EN); ++ ++ /* ++ * 4. Set Override Margining Controls From the MAC: ++ * Use margining signals from lane configuration ++ */ ++ comphy_lane_reg_set(lane, COMPHY_PIPE_TEST_MODE_CTRL, ++ MODE_MARGIN_OVERRIDE, 0xFFFF); ++ ++ /* ++ * 5. Set Lane-to-Lane Bundle Clock Sampling Period = per PCLK cycles ++ * set Mode Clock Source = PCLK is generated from REFCLK ++ */ ++ data = 0x0; ++ mask = MODE_CLK_SRC | BUNDLE_PERIOD_SEL | BUNDLE_PERIOD_SCALE_MASK | ++ BUNDLE_SAMPLE_CTRL | PLL_READY_DLY_MASK; ++ comphy_lane_reg_set(lane, COMPHY_PIPE_CLK_SRC_LO, data, mask); ++ ++ /* ++ * 6. Set G2 Spread Spectrum Clock Amplitude at 4K ++ */ ++ comphy_lane_reg_set(lane, COMPHY_GEN2_SET2, ++ GS2_TX_SSC_AMP_4128, GS2_TX_SSC_AMP_MASK); ++ ++ /* ++ * 7. Unset G3 Spread Spectrum Clock Amplitude ++ * set G3 TX and RX Register Master Current Select ++ */ ++ data = GS2_VREG_RXTX_MAS_ISET_60U; ++ mask = GS2_TX_SSC_AMP_MASK | GS2_VREG_RXTX_MAS_ISET_MASK | ++ GS2_RSVD_6_0_MASK; ++ comphy_lane_reg_set(lane, COMPHY_GEN3_SET2, data, mask); ++ ++ /* ++ * 8. Check crystal jumper setting and program the Power and PLL Control ++ * accordingly Change RX wait ++ */ ++ if (lane->priv->xtal_is_40m) { ++ ref_clk = REF_FREF_SEL_PCIE_USB3_40MHZ; ++ cfg = CFG_PM_RXDLOZ_WAIT_12_UNIT; ++ } else { ++ ref_clk = REF_FREF_SEL_PCIE_USB3_25MHZ; ++ cfg = CFG_PM_RXDLOZ_WAIT_7_UNIT; ++ } ++ ++ data = PU_IVREF_BIT | PU_PLL_BIT | PU_RX_BIT | PU_TX_BIT | ++ PU_TX_INTP_BIT | PU_DFE_BIT | COMPHY_MODE_USB3 | ref_clk; ++ mask = PU_IVREF_BIT | PU_PLL_BIT | PU_RX_BIT | PU_TX_BIT | ++ PU_TX_INTP_BIT | PU_DFE_BIT | PLL_LOCK_BIT | COMPHY_MODE_MASK | ++ REF_FREF_SEL_MASK; ++ comphy_lane_reg_set(lane, COMPHY_POWER_PLL_CTRL, data, mask); ++ ++ data = CFG_PM_RXDEN_WAIT_1_UNIT | cfg; ++ mask = CFG_PM_OSCCLK_WAIT_MASK | CFG_PM_RXDEN_WAIT_MASK | ++ CFG_PM_RXDLOZ_WAIT_MASK; ++ comphy_lane_reg_set(lane, COMPHY_PIPE_PWR_MGM_TIM1, data, mask); ++ ++ /* ++ * 9. Enable idle sync ++ */ ++ comphy_lane_reg_set(lane, COMPHY_IDLE_SYNC_EN, ++ IDLE_SYNC_EN, IDLE_SYNC_EN); ++ ++ /* ++ * 10. Enable the output of 500M clock ++ */ ++ comphy_lane_reg_set(lane, COMPHY_MISC_CTRL0, CLK500M_EN, CLK500M_EN); ++ ++ /* ++ * 11. Set 20-bit data width ++ */ ++ comphy_lane_reg_set(lane, COMPHY_DIG_LOOPBACK_EN, ++ DATA_WIDTH_20BIT, 0xFFFF); ++ ++ /* ++ * 12. Override Speed_PLL value and use MAC PLL ++ */ ++ data = SPEED_PLL_VALUE_16 | USE_MAX_PLL_RATE_BIT; ++ mask = 0xFFFF; ++ comphy_lane_reg_set(lane, COMPHY_KVCO_CAL_CTRL, data, mask); ++ ++ /* ++ * 13. Check the Polarity invert bit ++ */ ++ data = 0x0; ++ if (lane->invert_tx) ++ data |= TXD_INVERT_BIT; ++ if (lane->invert_rx) ++ data |= RXD_INVERT_BIT; ++ mask = TXD_INVERT_BIT | RXD_INVERT_BIT; ++ comphy_lane_reg_set(lane, COMPHY_SYNC_PATTERN, data, mask); ++ ++ /* ++ * 14. Set max speed generation to USB3.0 5Gbps ++ */ ++ comphy_lane_reg_set(lane, COMPHY_SYNC_MASK_GEN, ++ PHY_GEN_MAX_USB3_5G, PHY_GEN_MAX_MASK); ++ ++ /* ++ * 15. Set capacitor value for FFE gain peaking to 0xF ++ */ ++ comphy_lane_reg_set(lane, COMPHY_GEN2_SET3, ++ GS3_FFE_CAP_SEL_VALUE, GS3_FFE_CAP_SEL_MASK); ++ ++ /* ++ * 16. Release SW reset ++ */ ++ data = MODE_CORE_CLK_FREQ_SEL | MODE_PIPE_WIDTH_32 | MODE_REFDIV_BY_4; ++ mask = 0xFFFF; ++ comphy_lane_reg_set(lane, COMPHY_PIPE_RST_CLK_CTRL, data, mask); ++ ++ /* Wait for > 55 us to allow PCLK be enabled */ ++ udelay(PLL_SET_DELAY_US); ++ ++ ret = comphy_lane_reg_poll(lane, COMPHY_PIPE_LANE_STAT1, TXDCLK_PCLK_EN, ++ COMPHY_PLL_SLEEP, COMPHY_PLL_TIMEOUT); ++ if (ret) { ++ dev_err(lane->dev, "Failed to lock USB3 PLL\n"); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static int ++mvebu_a3700_comphy_pcie_power_on(struct mvebu_a3700_comphy_lane *lane) ++{ ++ u32 mask, data, ref_clk; ++ int ret; ++ ++ /* Configure phy selector for PCIe */ ++ ret = mvebu_a3700_comphy_set_phy_selector(lane); ++ if (ret) ++ return ret; ++ ++ /* 1. Enable max PLL. */ ++ comphy_lane_reg_set(lane, COMPHY_PIPE_LANE_CFG1, ++ USE_MAX_PLL_RATE_EN, USE_MAX_PLL_RATE_EN); ++ ++ /* 2. Select 20 bit SERDES interface. */ ++ comphy_lane_reg_set(lane, COMPHY_PIPE_CLK_SRC_LO, ++ CFG_SEL_20B, CFG_SEL_20B); ++ ++ /* 3. Force to use reg setting for PCIe mode */ ++ comphy_lane_reg_set(lane, COMPHY_MISC_CTRL1, ++ SEL_BITS_PCIE_FORCE, SEL_BITS_PCIE_FORCE); ++ ++ /* 4. Change RX wait */ ++ data = CFG_PM_RXDEN_WAIT_1_UNIT | CFG_PM_RXDLOZ_WAIT_12_UNIT; ++ mask = CFG_PM_OSCCLK_WAIT_MASK | CFG_PM_RXDEN_WAIT_MASK | ++ CFG_PM_RXDLOZ_WAIT_MASK; ++ comphy_lane_reg_set(lane, COMPHY_PIPE_PWR_MGM_TIM1, data, mask); ++ ++ /* 5. Enable idle sync */ ++ comphy_lane_reg_set(lane, COMPHY_IDLE_SYNC_EN, ++ IDLE_SYNC_EN, IDLE_SYNC_EN); ++ ++ /* 6. Enable the output of 100M/125M/500M clock */ ++ data = CLK500M_EN | TXDCLK_2X_SEL | CLK100M_125M_EN; ++ mask = data; ++ comphy_lane_reg_set(lane, COMPHY_MISC_CTRL0, data, mask); ++ ++ /* ++ * 7. Enable TX, PCIE global register, 0xd0074814, it is done in ++ * PCI-E driver ++ */ ++ ++ /* ++ * 8. Check crystal jumper setting and program the Power and PLL ++ * Control accordingly ++ */ ++ ++ if (lane->priv->xtal_is_40m) ++ ref_clk = REF_FREF_SEL_PCIE_USB3_40MHZ; ++ else ++ ref_clk = REF_FREF_SEL_PCIE_USB3_25MHZ; ++ ++ data = PU_IVREF_BIT | PU_PLL_BIT | PU_RX_BIT | PU_TX_BIT | ++ PU_TX_INTP_BIT | PU_DFE_BIT | COMPHY_MODE_PCIE | ref_clk; ++ mask = 0xFFFF; ++ comphy_lane_reg_set(lane, COMPHY_POWER_PLL_CTRL, data, mask); ++ ++ /* 9. Override Speed_PLL value and use MAC PLL */ ++ comphy_lane_reg_set(lane, COMPHY_KVCO_CAL_CTRL, ++ SPEED_PLL_VALUE_16 | USE_MAX_PLL_RATE_BIT, ++ 0xFFFF); ++ ++ /* 10. Check the Polarity invert bit */ ++ data = 0x0; ++ if (lane->invert_tx) ++ data |= TXD_INVERT_BIT; ++ if (lane->invert_rx) ++ data |= RXD_INVERT_BIT; ++ mask = TXD_INVERT_BIT | RXD_INVERT_BIT; ++ comphy_lane_reg_set(lane, COMPHY_SYNC_PATTERN, data, mask); ++ ++ /* 11. Release SW reset */ ++ data = MODE_CORE_CLK_FREQ_SEL | MODE_PIPE_WIDTH_32; ++ mask = data | PIPE_SOFT_RESET | MODE_REFDIV_MASK; ++ comphy_lane_reg_set(lane, COMPHY_PIPE_RST_CLK_CTRL, data, mask); ++ ++ /* Wait for > 55 us to allow PCLK be enabled */ ++ udelay(PLL_SET_DELAY_US); ++ ++ ret = comphy_lane_reg_poll(lane, COMPHY_PIPE_LANE_STAT1, TXDCLK_PCLK_EN, ++ COMPHY_PLL_SLEEP, COMPHY_PLL_TIMEOUT); ++ if (ret) { ++ dev_err(lane->dev, "Failed to lock PCIE PLL\n"); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static void ++mvebu_a3700_comphy_usb3_power_off(struct mvebu_a3700_comphy_lane *lane) ++{ ++ /* ++ * Currently the USB3 MAC sets the USB3 PHY to low state, so we do not ++ * need to power off USB3 PHY again. ++ */ ++} ++ ++static void ++mvebu_a3700_comphy_sata_power_off(struct mvebu_a3700_comphy_lane *lane) ++{ ++ /* Set phy isolation mode */ ++ comphy_lane_reg_set(lane, COMPHY_ISOLATION_CTRL, ++ PHY_ISOLATE_MODE, PHY_ISOLATE_MODE); ++ ++ /* Power off PLL, Tx, Rx */ ++ comphy_lane_reg_set(lane, COMPHY_POWER_PLL_CTRL, ++ 0x0, PU_PLL_BIT | PU_RX_BIT | PU_TX_BIT); ++} ++ ++static void ++mvebu_a3700_comphy_ethernet_power_off(struct mvebu_a3700_comphy_lane *lane) ++{ ++ u32 mask, data; ++ ++ data = PIN_RESET_CORE_BIT | PIN_RESET_COMPHY_BIT | PIN_PU_IVREF_BIT | ++ PHY_RX_INIT_BIT; ++ mask = data; ++ comphy_periph_reg_set(lane, COMPHY_PHY_CFG1, data, mask); ++} ++ ++static void ++mvebu_a3700_comphy_pcie_power_off(struct mvebu_a3700_comphy_lane *lane) ++{ ++ /* Power off PLL, Tx, Rx */ ++ comphy_lane_reg_set(lane, COMPHY_POWER_PLL_CTRL, ++ 0x0, PU_PLL_BIT | PU_RX_BIT | PU_TX_BIT); ++} ++ ++static int mvebu_a3700_comphy_reset(struct phy *phy) ++{ ++ struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); ++ u16 mask, data; ++ ++ dev_dbg(lane->dev, "resetting lane %d\n", lane->id); ++ ++ /* COMPHY reset for internal logic */ ++ comphy_lane_reg_set(lane, COMPHY_SFT_RESET, ++ SFT_RST_NO_REG, SFT_RST_NO_REG); ++ ++ /* COMPHY register reset (cleared automatically) */ ++ comphy_lane_reg_set(lane, COMPHY_SFT_RESET, SFT_RST, SFT_RST); ++ ++ /* PIPE soft and register reset */ ++ data = PIPE_SOFT_RESET | PIPE_REG_RESET; ++ mask = data; ++ comphy_lane_reg_set(lane, COMPHY_PIPE_RST_CLK_CTRL, data, mask); ++ ++ /* Release PIPE register reset */ ++ comphy_lane_reg_set(lane, COMPHY_PIPE_RST_CLK_CTRL, ++ 0x0, PIPE_REG_RESET); ++ ++ /* Reset SB configuration register (only for lanes 0 and 1) */ ++ if (lane->id == 0 || lane->id == 1) { ++ u32 mask, data; ++ ++ data = PIN_RESET_CORE_BIT | PIN_RESET_COMPHY_BIT | ++ PIN_PU_PLL_BIT | PIN_PU_RX_BIT | PIN_PU_TX_BIT; ++ mask = data | PIN_PU_IVREF_BIT | PIN_TX_IDLE_BIT; ++ comphy_periph_reg_set(lane, COMPHY_PHY_CFG1, data, mask); ++ } ++ ++ return 0; ++} ++ ++static bool mvebu_a3700_comphy_check_mode(int lane, + enum phy_mode mode, + int submode) + { +@@ -122,7 +1170,7 @@ static int mvebu_a3700_comphy_get_fw_mod + + /* Unused PHY mux value is 0x0 */ + if (mode == PHY_MODE_INVALID) +- return -EINVAL; ++ return false; + + for (i = 0; i < n; i++) { + if (mvebu_a3700_comphy_modes[i].lane == lane && +@@ -132,27 +1180,30 @@ static int mvebu_a3700_comphy_get_fw_mod + } + + if (i == n) +- return -EINVAL; ++ return false; + +- return mvebu_a3700_comphy_modes[i].fw_mode; ++ return true; + } + + static int mvebu_a3700_comphy_set_mode(struct phy *phy, enum phy_mode mode, + int submode) + { + struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); +- int fw_mode; +- +- if (submode == PHY_INTERFACE_MODE_1000BASEX) +- submode = PHY_INTERFACE_MODE_SGMII; + +- fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, mode, +- submode); +- if (fw_mode < 0) { ++ if (!mvebu_a3700_comphy_check_mode(lane->id, mode, submode)) { + dev_err(lane->dev, "invalid COMPHY mode\n"); +- return fw_mode; ++ return -EINVAL; + } + ++ /* Mode cannot be changed while the PHY is powered on */ ++ if (phy->power_count && ++ (lane->mode != mode || lane->submode != submode)) ++ return -EBUSY; ++ ++ /* If changing mode, ensure reset is called */ ++ if (lane->mode != PHY_MODE_INVALID && lane->mode != mode) ++ lane->needs_reset = true; ++ + /* Just remember the mode, ->power_on() will do the real setup */ + lane->mode = mode; + lane->submode = submode; +@@ -163,76 +1214,68 @@ static int mvebu_a3700_comphy_set_mode(s + static int mvebu_a3700_comphy_power_on(struct phy *phy) + { + struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); +- u32 fw_param; +- int fw_mode; +- int fw_port; + int ret; + +- fw_mode = mvebu_a3700_comphy_get_fw_mode(lane->id, +- lane->mode, lane->submode); +- if (fw_mode < 0) { ++ if (!mvebu_a3700_comphy_check_mode(lane->id, lane->mode, ++ lane->submode)) { + dev_err(lane->dev, "invalid COMPHY mode\n"); +- return fw_mode; ++ return -EINVAL; ++ } ++ ++ if (lane->needs_reset) { ++ ret = mvebu_a3700_comphy_reset(phy); ++ if (ret) ++ return ret; ++ ++ lane->needs_reset = false; + } + + switch (lane->mode) { + case PHY_MODE_USB_HOST_SS: + dev_dbg(lane->dev, "set lane %d to USB3 host mode\n", lane->id); +- fw_param = COMPHY_FW_MODE(fw_mode); +- break; ++ return mvebu_a3700_comphy_usb3_power_on(lane); + case PHY_MODE_SATA: + dev_dbg(lane->dev, "set lane %d to SATA mode\n", lane->id); +- fw_param = COMPHY_FW_MODE(fw_mode); +- break; ++ return mvebu_a3700_comphy_sata_power_on(lane); + case PHY_MODE_ETHERNET: +- fw_port = (lane->id == 0) ? 1 : 0; +- switch (lane->submode) { +- case PHY_INTERFACE_MODE_SGMII: +- dev_dbg(lane->dev, "set lane %d to SGMII mode\n", +- lane->id); +- fw_param = COMPHY_FW_NET(fw_mode, fw_port, +- COMPHY_FW_SPEED_1_25G); +- break; +- case PHY_INTERFACE_MODE_2500BASEX: +- dev_dbg(lane->dev, "set lane %d to 2500BASEX mode\n", +- lane->id); +- fw_param = COMPHY_FW_NET(fw_mode, fw_port, +- COMPHY_FW_SPEED_3_125G); +- break; +- default: +- dev_err(lane->dev, "unsupported PHY submode (%d)\n", +- lane->submode); +- return -ENOTSUPP; +- } +- break; ++ dev_dbg(lane->dev, "set lane %d to Ethernet mode\n", lane->id); ++ return mvebu_a3700_comphy_ethernet_power_on(lane); + case PHY_MODE_PCIE: + dev_dbg(lane->dev, "set lane %d to PCIe mode\n", lane->id); +- fw_param = COMPHY_FW_PCIE(fw_mode, COMPHY_FW_SPEED_5G, +- phy->attrs.bus_width); +- break; ++ return mvebu_a3700_comphy_pcie_power_on(lane); + default: + dev_err(lane->dev, "unsupported PHY mode (%d)\n", lane->mode); +- return -ENOTSUPP; ++ return -EOPNOTSUPP; + } +- +- ret = mvebu_a3700_comphy_smc(COMPHY_SIP_POWER_ON, lane->id, fw_param); +- if (ret == -EOPNOTSUPP) +- dev_err(lane->dev, +- "unsupported SMC call, try updating your firmware\n"); +- +- return ret; + } + + static int mvebu_a3700_comphy_power_off(struct phy *phy) + { + struct mvebu_a3700_comphy_lane *lane = phy_get_drvdata(phy); + +- return mvebu_a3700_comphy_smc(COMPHY_SIP_POWER_OFF, lane->id, 0); ++ switch (lane->mode) { ++ case PHY_MODE_USB_HOST_SS: ++ mvebu_a3700_comphy_usb3_power_off(lane); ++ return 0; ++ case PHY_MODE_SATA: ++ mvebu_a3700_comphy_sata_power_off(lane); ++ return 0; ++ case PHY_MODE_ETHERNET: ++ mvebu_a3700_comphy_ethernet_power_off(lane); ++ return 0; ++ case PHY_MODE_PCIE: ++ mvebu_a3700_comphy_pcie_power_off(lane); ++ return 0; ++ default: ++ dev_err(lane->dev, "invalid COMPHY mode\n"); ++ return -EINVAL; ++ } + } + + static const struct phy_ops mvebu_a3700_comphy_ops = { + .power_on = mvebu_a3700_comphy_power_on, + .power_off = mvebu_a3700_comphy_power_off, ++ .reset = mvebu_a3700_comphy_reset, + .set_mode = mvebu_a3700_comphy_set_mode, + .owner = THIS_MODULE, + }; +@@ -256,13 +1299,75 @@ static struct phy *mvebu_a3700_comphy_xl + return ERR_PTR(-EINVAL); + } + ++ lane->invert_tx = args->args[1] & BIT(0); ++ lane->invert_rx = args->args[1] & BIT(1); ++ + return phy; + } + + static int mvebu_a3700_comphy_probe(struct platform_device *pdev) + { ++ struct mvebu_a3700_comphy_priv *priv; + struct phy_provider *provider; + struct device_node *child; ++ struct resource *res; ++ struct clk *clk; ++ int ret; ++ ++ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ spin_lock_init(&priv->lock); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "comphy"); ++ priv->comphy_regs = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(priv->comphy_regs)) ++ return PTR_ERR(priv->comphy_regs); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, ++ "lane1_pcie_gbe"); ++ priv->lane1_phy_regs = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(priv->lane1_phy_regs)) ++ return PTR_ERR(priv->lane1_phy_regs); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, ++ "lane0_usb3_gbe"); ++ priv->lane0_phy_regs = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(priv->lane0_phy_regs)) ++ return PTR_ERR(priv->lane0_phy_regs); ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, ++ "lane2_sata_usb3"); ++ priv->lane2_phy_indirect = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(priv->lane2_phy_indirect)) ++ return PTR_ERR(priv->lane2_phy_indirect); ++ ++ /* ++ * Driver needs to know if reference xtal clock is 40MHz or 25MHz. ++ * Old DT bindings do not have xtal clk present. So do not fail here ++ * and expects that default 25MHz reference clock is used. ++ */ ++ clk = clk_get(&pdev->dev, "xtal"); ++ if (IS_ERR(clk)) { ++ if (PTR_ERR(clk) == -EPROBE_DEFER) ++ return -EPROBE_DEFER; ++ dev_warn(&pdev->dev, "missing 'xtal' clk (%ld)\n", ++ PTR_ERR(clk)); ++ } else { ++ ret = clk_prepare_enable(clk); ++ if (ret) { ++ dev_warn(&pdev->dev, "enabling xtal clk failed (%d)\n", ++ ret); ++ } else { ++ if (clk_get_rate(clk) == 40000000) ++ priv->xtal_is_40m = true; ++ clk_disable_unprepare(clk); ++ } ++ clk_put(clk); ++ } ++ ++ dev_set_drvdata(&pdev->dev, priv); + + for_each_available_child_of_node(pdev->dev.of_node, child) { + struct mvebu_a3700_comphy_lane *lane; +@@ -277,7 +1382,7 @@ static int mvebu_a3700_comphy_probe(stru + continue; + } + +- if (lane_id >= MVEBU_A3700_COMPHY_LANES) { ++ if (lane_id >= 3) { + dev_err(&pdev->dev, "invalid 'reg' property\n"); + continue; + } +@@ -295,11 +1400,21 @@ static int mvebu_a3700_comphy_probe(stru + return PTR_ERR(phy); + } + ++ lane->priv = priv; + lane->dev = &pdev->dev; + lane->mode = PHY_MODE_INVALID; + lane->submode = PHY_INTERFACE_MODE_NA; + lane->id = lane_id; ++ lane->invert_tx = false; ++ lane->invert_rx = false; + phy_set_drvdata(phy, lane); ++ ++ /* ++ * To avoid relying on the bootloader/firmware configuration, ++ * power off all comphys. ++ */ ++ mvebu_a3700_comphy_reset(phy); ++ lane->needs_reset = false; + } + + provider = devm_of_phy_provider_register(&pdev->dev, +@@ -323,5 +1438,7 @@ static struct platform_driver mvebu_a370 + module_platform_driver(mvebu_a3700_comphy_driver); + + MODULE_AUTHOR("Miquèl Raynal "); ++MODULE_AUTHOR("Pali Rohár "); ++MODULE_AUTHOR("Marek Behún "); + MODULE_DESCRIPTION("Common PHY driver for A3700"); + MODULE_LICENSE("GPL v2"); diff --git a/target/linux/generic/pending-5.10/851-0003-arm64-dts-marvell-armada-37xx-Add-xtal-clock-to-comp.patch b/target/linux/generic/pending-5.10/851-0003-arm64-dts-marvell-armada-37xx-Add-xtal-clock-to-comp.patch new file mode 100644 index 0000000000..33203a154d --- /dev/null +++ b/target/linux/generic/pending-5.10/851-0003-arm64-dts-marvell-armada-37xx-Add-xtal-clock-to-comp.patch @@ -0,0 +1,31 @@ +From 66c51c39fd4bf05e99debf0e71de5704231c57dc Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Thu, 23 Sep 2021 19:26:26 +0200 +Subject: [PATCH] arm64: dts: marvell: armada-37xx: Add xtal clock to comphy + node +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Kernel driver phy-mvebu-a3700-comphy.c needs to know the rate of the +reference xtal clock. So add missing xtal clock source into comphy device +tree node. If the property is not present, the driver defaults to 25 MHz +xtal rate (which, as far as we know, is used by all the existing boards). + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +--- + arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi ++++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +@@ -265,6 +265,8 @@ + "lane2_sata_usb3"; + #address-cells = <1>; + #size-cells = <0>; ++ clocks = <&xtalclk>; ++ clock-names = "xtal"; + + comphy0: phy@0 { + reg = <0>; diff --git a/target/linux/generic/pending-5.10/851-0004-Revert-ata-ahci-mvebu-Make-SATA-PHY-optional-for-Arm.patch b/target/linux/generic/pending-5.10/851-0004-Revert-ata-ahci-mvebu-Make-SATA-PHY-optional-for-Arm.patch new file mode 100644 index 0000000000..3c994d2548 --- /dev/null +++ b/target/linux/generic/pending-5.10/851-0004-Revert-ata-ahci-mvebu-Make-SATA-PHY-optional-for-Arm.patch @@ -0,0 +1,61 @@ +From 750bb44dbbe9dfb4ba3e1f8a746b831b39ba3cd9 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Thu, 23 Sep 2021 19:35:57 +0200 +Subject: [PATCH] Revert "ata: ahci: mvebu: Make SATA PHY optional for Armada + 3720" +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This reverts commit 45aefe3d2251e4e229d7662052739f96ad1d08d9. + +Armada 3720 PHY driver (phy-mvebu-a3700-comphy.c) does not return +-EOPNOTSUPP from phy_power_on() callback anymore. + +So remove AHCI_HFLAG_IGN_NOTSUPP_POWER_ON flag from Armada 3720 plat data. + +AHCI_HFLAG_IGN_NOTSUPP_POWER_ON is not used by any other ahci driver, so +remove this flag completely. + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Acked-by: Miquel Raynal +--- + drivers/ata/ahci.h | 2 -- + drivers/ata/ahci_mvebu.c | 2 +- + drivers/ata/libahci_platform.c | 2 +- + 3 files changed, 2 insertions(+), 4 deletions(-) + +--- a/drivers/ata/ahci.h ++++ b/drivers/ata/ahci.h +@@ -240,8 +240,6 @@ enum { + as default lpm_policy */ + AHCI_HFLAG_SUSPEND_PHYS = (1 << 26), /* handle PHYs during + suspend/resume */ +- AHCI_HFLAG_IGN_NOTSUPP_POWER_ON = (1 << 27), /* ignore -EOPNOTSUPP +- from phy_power_on() */ + AHCI_HFLAG_NO_SXS = (1 << 28), /* SXS not supported */ + + /* ap->flags bits */ +--- a/drivers/ata/ahci_mvebu.c ++++ b/drivers/ata/ahci_mvebu.c +@@ -227,7 +227,7 @@ static const struct ahci_mvebu_plat_data + + static const struct ahci_mvebu_plat_data ahci_mvebu_armada_3700_plat_data = { + .plat_config = ahci_mvebu_armada_3700_config, +- .flags = AHCI_HFLAG_SUSPEND_PHYS | AHCI_HFLAG_IGN_NOTSUPP_POWER_ON, ++ .flags = AHCI_HFLAG_SUSPEND_PHYS, + }; + + static const struct of_device_id ahci_mvebu_of_match[] = { +--- a/drivers/ata/libahci_platform.c ++++ b/drivers/ata/libahci_platform.c +@@ -59,7 +59,7 @@ int ahci_platform_enable_phys(struct ahc + } + + rc = phy_power_on(hpriv->phys[i]); +- if (rc && !(rc == -EOPNOTSUPP && (hpriv->flags & AHCI_HFLAG_IGN_NOTSUPP_POWER_ON))) { ++ if (rc) { + phy_exit(hpriv->phys[i]); + goto disable_phys; + } diff --git a/target/linux/generic/pending-5.10/851-0005-Revert-usb-host-xhci-mvebu-make-USB-3.0-PHY-optional.patch b/target/linux/generic/pending-5.10/851-0005-Revert-usb-host-xhci-mvebu-make-USB-3.0-PHY-optional.patch new file mode 100644 index 0000000000..b8a3e880ce --- /dev/null +++ b/target/linux/generic/pending-5.10/851-0005-Revert-usb-host-xhci-mvebu-make-USB-3.0-PHY-optional.patch @@ -0,0 +1,163 @@ +From 9f0dfb279b1dd505d5e10b10e4a78a62030978d8 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Thu, 23 Sep 2021 19:40:06 +0200 +Subject: [PATCH] Revert "usb: host: xhci: mvebu: make USB 3.0 PHY optional for + Armada 3720" +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This reverts commit 3241929b67d28c83945d3191c6816a3271fd6b85. + +Armada 3720 phy driver (phy-mvebu-a3700-comphy.c) does not return +-EOPNOTSUPP from phy_power_on() callback anymore. + +So remove XHCI_SKIP_PHY_INIT flag from xhci_mvebu_a3700_plat_setup() and +then also whole xhci_mvebu_a3700_plat_setup() function which is there just +to handle -EOPNOTSUPP for XHCI_SKIP_PHY_INIT. + +xhci plat_setup callback is not used by any other xhci plat driver, so +remove this callback completely. + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Acked-by: Miquel Raynal +--- + drivers/usb/host/xhci-mvebu.c | 42 ----------------------------------- + drivers/usb/host/xhci-mvebu.h | 6 ----- + drivers/usb/host/xhci-plat.c | 20 +---------------- + drivers/usb/host/xhci-plat.h | 1 - + 4 files changed, 1 insertion(+), 68 deletions(-) + +--- a/drivers/usb/host/xhci-mvebu.c ++++ b/drivers/usb/host/xhci-mvebu.c +@@ -8,7 +8,6 @@ + #include + #include + #include +-#include + + #include + #include +@@ -74,47 +73,6 @@ int xhci_mvebu_mbus_init_quirk(struct us + + return 0; + } +- +-int xhci_mvebu_a3700_plat_setup(struct usb_hcd *hcd) +-{ +- struct xhci_hcd *xhci = hcd_to_xhci(hcd); +- struct device *dev = hcd->self.controller; +- struct phy *phy; +- int ret; +- +- /* Old bindings miss the PHY handle */ +- phy = of_phy_get(dev->of_node, "usb3-phy"); +- if (IS_ERR(phy) && PTR_ERR(phy) == -EPROBE_DEFER) +- return -EPROBE_DEFER; +- else if (IS_ERR(phy)) +- goto phy_out; +- +- ret = phy_init(phy); +- if (ret) +- goto phy_put; +- +- ret = phy_set_mode(phy, PHY_MODE_USB_HOST_SS); +- if (ret) +- goto phy_exit; +- +- ret = phy_power_on(phy); +- if (ret == -EOPNOTSUPP) { +- /* Skip initializatin of XHCI PHY when it is unsupported by firmware */ +- dev_warn(dev, "PHY unsupported by firmware\n"); +- xhci->quirks |= XHCI_SKIP_PHY_INIT; +- } +- if (ret) +- goto phy_exit; +- +- phy_power_off(phy); +-phy_exit: +- phy_exit(phy); +-phy_put: +- of_phy_put(phy); +-phy_out: +- +- return 0; +-} + + int xhci_mvebu_a3700_init_quirk(struct usb_hcd *hcd) + { +--- a/drivers/usb/host/xhci-mvebu.h ++++ b/drivers/usb/host/xhci-mvebu.h +@@ -12,18 +12,12 @@ struct usb_hcd; + + #if IS_ENABLED(CONFIG_USB_XHCI_MVEBU) + int xhci_mvebu_mbus_init_quirk(struct usb_hcd *hcd); +-int xhci_mvebu_a3700_plat_setup(struct usb_hcd *hcd); + int xhci_mvebu_a3700_init_quirk(struct usb_hcd *hcd); + #else + static inline int xhci_mvebu_mbus_init_quirk(struct usb_hcd *hcd) + { + return 0; + } +- +-static inline int xhci_mvebu_a3700_plat_setup(struct usb_hcd *hcd) +-{ +- return 0; +-} + + static inline int xhci_mvebu_a3700_init_quirk(struct usb_hcd *hcd) + { +--- a/drivers/usb/host/xhci-plat.c ++++ b/drivers/usb/host/xhci-plat.c +@@ -44,16 +44,6 @@ static void xhci_priv_plat_start(struct + priv->plat_start(hcd); + } + +-static int xhci_priv_plat_setup(struct usb_hcd *hcd) +-{ +- struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd); +- +- if (!priv->plat_setup) +- return 0; +- +- return priv->plat_setup(hcd); +-} +- + static int xhci_priv_init_quirk(struct usb_hcd *hcd) + { + struct xhci_plat_priv *priv = hcd_to_xhci_priv(hcd); +@@ -121,7 +111,6 @@ static const struct xhci_plat_priv xhci_ + }; + + static const struct xhci_plat_priv xhci_plat_marvell_armada3700 = { +- .plat_setup = xhci_mvebu_a3700_plat_setup, + .init_quirk = xhci_mvebu_a3700_init_quirk, + }; + +@@ -341,14 +330,7 @@ static int xhci_plat_probe(struct platfo + + hcd->tpl_support = of_usb_host_tpl_support(sysdev->of_node); + xhci->shared_hcd->tpl_support = hcd->tpl_support; +- +- if (priv) { +- ret = xhci_priv_plat_setup(hcd); +- if (ret) +- goto disable_usb_phy; +- } +- +- if ((xhci->quirks & XHCI_SKIP_PHY_INIT) || (priv && (priv->quirks & XHCI_SKIP_PHY_INIT))) ++ if (priv && (priv->quirks & XHCI_SKIP_PHY_INIT)) + hcd->skip_phy_initialization = 1; + + if (priv && (priv->quirks & XHCI_SG_TRB_CACHE_SIZE_QUIRK)) +--- a/drivers/usb/host/xhci-plat.h ++++ b/drivers/usb/host/xhci-plat.h +@@ -13,7 +13,6 @@ + struct xhci_plat_priv { + const char *firmware_name; + unsigned long long quirks; +- int (*plat_setup)(struct usb_hcd *); + void (*plat_start)(struct usb_hcd *); + int (*init_quirk)(struct usb_hcd *); + int (*suspend_quirk)(struct usb_hcd *); diff --git a/target/linux/generic/pending-5.10/851-0006-Revert-PCI-aardvark-Fix-initialization-with-old-Marv.patch b/target/linux/generic/pending-5.10/851-0006-Revert-PCI-aardvark-Fix-initialization-with-old-Marv.patch new file mode 100644 index 0000000000..7741502b20 --- /dev/null +++ b/target/linux/generic/pending-5.10/851-0006-Revert-PCI-aardvark-Fix-initialization-with-old-Marv.patch @@ -0,0 +1,36 @@ +From 9a352062b7e3857742389dff6f64393481dc755e Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pali=20Roh=C3=A1r?= +Date: Thu, 23 Sep 2021 19:37:05 +0200 +Subject: [PATCH] Revert "PCI: aardvark: Fix initialization with old Marvell's + Arm Trusted Firmware" +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This reverts commit b0c6ae0f8948a2be6bf4e8b4bbab9ca1343289b6. + +Armada 3720 phy driver (phy-mvebu-a3700-comphy.c) does not return +-EOPNOTSUPP from phy_power_on() callback anymore. + +So remove dead code which handles -EOPNOTSUPP return value. + +Signed-off-by: Pali Rohár +Signed-off-by: Marek Behún +Acked-by: Miquel Raynal +--- + drivers/pci/controller/pci-aardvark.c | 4 +--- + 1 file changed, 1 insertion(+), 3 deletions(-) + +--- a/drivers/pci/controller/pci-aardvark.c ++++ b/drivers/pci/controller/pci-aardvark.c +@@ -1635,9 +1635,7 @@ static int advk_pcie_enable_phy(struct a + } + + ret = phy_power_on(pcie->phy); +- if (ret == -EOPNOTSUPP) { +- dev_warn(&pcie->pdev->dev, "PHY unsupported by firmware\n"); +- } else if (ret) { ++ if (ret) { + phy_exit(pcie->phy); + return ret; + } diff --git a/target/linux/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch index 8cf36addeb..d21258e590 100644 --- a/target/linux/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch +++ b/target/linux/generic/pending-5.4/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch @@ -185,7 +185,7 @@ Signed-off-by: Jonas Gorski cfg->fc_flags |= RTF_REJECT; if (rtm->rtm_type == RTN_LOCAL) -@@ -6056,6 +6087,8 @@ static int ip6_route_dev_notify(struct n +@@ -6084,6 +6115,8 @@ static int ip6_route_dev_notify(struct n #ifdef CONFIG_IPV6_MULTIPLE_TABLES net->ipv6.ip6_prohibit_entry->dst.dev = dev; net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev); @@ -194,7 +194,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_blk_hole_entry->dst.dev = dev; net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev); #endif -@@ -6067,6 +6100,7 @@ static int ip6_route_dev_notify(struct n +@@ -6095,6 +6128,7 @@ static int ip6_route_dev_notify(struct n in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev); #ifdef CONFIG_IPV6_MULTIPLE_TABLES in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev); @@ -202,7 +202,7 @@ Signed-off-by: Jonas Gorski in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev); #endif } -@@ -6259,6 +6293,8 @@ static int __net_init ip6_route_net_init +@@ -6287,6 +6321,8 @@ static int __net_init ip6_route_net_init #ifdef CONFIG_IPV6_MULTIPLE_TABLES net->ipv6.fib6_has_custom_rules = false; @@ -211,7 +211,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template, sizeof(*net->ipv6.ip6_prohibit_entry), GFP_KERNEL); -@@ -6269,11 +6305,21 @@ static int __net_init ip6_route_net_init +@@ -6297,11 +6333,21 @@ static int __net_init ip6_route_net_init ip6_template_metrics, true); INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached); @@ -234,7 +234,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops; dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst, ip6_template_metrics, true); -@@ -6297,6 +6343,8 @@ out: +@@ -6325,6 +6371,8 @@ out: return ret; #ifdef CONFIG_IPV6_MULTIPLE_TABLES @@ -243,7 +243,7 @@ Signed-off-by: Jonas Gorski out_ip6_prohibit_entry: kfree(net->ipv6.ip6_prohibit_entry); out_ip6_null_entry: -@@ -6316,6 +6364,7 @@ static void __net_exit ip6_route_net_exi +@@ -6344,6 +6392,7 @@ static void __net_exit ip6_route_net_exi kfree(net->ipv6.ip6_null_entry); #ifdef CONFIG_IPV6_MULTIPLE_TABLES kfree(net->ipv6.ip6_prohibit_entry); @@ -251,7 +251,7 @@ Signed-off-by: Jonas Gorski kfree(net->ipv6.ip6_blk_hole_entry); #endif dst_entries_destroy(&net->ipv6.ip6_dst_ops); -@@ -6393,6 +6442,9 @@ void __init ip6_route_init_special_entri +@@ -6421,6 +6470,9 @@ void __init ip6_route_init_special_entri init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev; init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); diff --git a/target/linux/ipq40xx/base-files/etc/board.d/01_leds b/target/linux/ipq40xx/base-files/etc/board.d/01_leds index 16039c8c42..bc2ec58806 100644 --- a/target/linux/ipq40xx/base-files/etc/board.d/01_leds +++ b/target/linux/ipq40xx/base-files/etc/board.d/01_leds @@ -12,6 +12,12 @@ case "$board" in alfa-network,ap120c-ac) ucidef_set_led_netdev "wan" "WAN" "amber:wan" "eth1" ;; +asus,rt-ac42u) + ucidef_set_led_switch "lan1" "LAN1" "blue:lan-1" "switch0" "0x02" + ucidef_set_led_switch "lan2" "LAN2" "blue:lan-2" "switch0" "0x04" + ucidef_set_led_switch "lan3" "LAN3" "blue:lan-3" "switch0" "0x08" + ucidef_set_led_switch "lan4" "LAN4" "blue:lan-4" "switch0" "0x10" + ;; asus,rt-ac58u) ucidef_set_led_netdev "wan" "WAN" "blue:wan" "eth1" ucidef_set_led_switch "lan" "LAN" "blue:lan" "switch0" "0x1e" diff --git a/target/linux/ipq40xx/base-files/etc/board.d/02_network b/target/linux/ipq40xx/base-files/etc/board.d/02_network index 7e83d6f917..8566877490 100644 --- a/target/linux/ipq40xx/base-files/etc/board.d/02_network +++ b/target/linux/ipq40xx/base-files/etc/board.d/02_network @@ -50,6 +50,7 @@ ipq40xx_setup_interfaces() openmesh,a62) ucidef_set_interfaces_lan_wan "eth1" "eth0" ;; + asus,rt-ac42u|\ asus,rt-ac58u|\ mikrotik,hap-ac2|\ mikrotik,hap-ac3|\ @@ -153,7 +154,6 @@ ipq40xx_setup_macs() label_mac=$(mtd_get_mac_binary "ART" 0x1006) ;; asus,rt-ac58u) - CI_UBIPART=UBI_DEV wan_mac=$(mtd_get_mac_binary_ubi Factory 0x1006) lan_mac=$(mtd_get_mac_binary_ubi Factory 0x5006) label_mac=$wan_mac diff --git a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata index bec146fb63..2cb61c8af0 100644 --- a/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata +++ b/target/linux/ipq40xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata @@ -9,9 +9,6 @@ board=$(board_name) case "$FIRMWARE" in "ath10k/cal-pci-0000:01:00.0.bin") case "$board" in - glinet,gl-b2200) - caldata_extract "ART" 0x9000 0x2f20 - ;; meraki,mr33) caldata_extract_ubi "ART" 0x9000 0x844 caldata_valid "4408" || caldata_extract "ART" 0x9000 0x844 @@ -26,6 +23,9 @@ case "$FIRMWARE" in ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \ /lib/firmware/ath10k/QCA9888/hw2.0/board.bin ;; + asus,rt-ac42u) + caldata_extract_ubi "Factory" 0x9000 0x2f20 + ;; avm,fritzrepeater-3000) /usr/bin/fritz_cal_extract -i 1 -s 0x3D000 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \ /usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader0") || \ @@ -34,11 +34,6 @@ case "$FIRMWARE" in /usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \ /usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x212 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") ;; - buffalo,wtr-m2133hp) - caldata_extract "ART" 0x9000 0x2f20 - ath10k_patch_mac $(mtd_get_mac_binary ORGDATA 0x32) - ;; - engenius,eap2200 |\ openmesh,a62 |\ plasmacloud,pa2200) caldata_extract "0:ART" 0x9000 0x2f20 @@ -63,32 +58,12 @@ case "$FIRMWARE" in ;; "ath10k/pre-cal-ahb-a000000.wifi.bin") case "$board" in - 8dev,habanero-dvk |\ - 8dev,jalapeno |\ - alfa-network,ap120c-ac |\ - cilab,meshpoint-one |\ - glinet,gl-ap1300 |\ - glinet,gl-b1300 |\ - glinet,gl-b2200 |\ - glinet,gl-s1300 |\ - linksys,ea6350v3 |\ - mobipromo,cm520-79f |\ - p2w,r619ac-64m |\ - p2w,r619ac-128m |\ qcom,ap-dk01.1-c1) caldata_extract "ART" 0x1000 0x2f20 ;; - aruba,ap-303 |\ - aruba,ap-303h |\ - aruba,ap-365) - caldata_extract "ART" 0x1000 0x2f20 - ath10k_patch_mac $(mtd_get_mac_binary mfginfo 0x1D) - ;; - asus,map-ac2200) - caldata_extract_ubi "Factory" 0x1000 0x2f20 - ;; + asus,map-ac2200|\ + asus,rt-ac42u|\ asus,rt-ac58u) - CI_UBIPART=UBI_DEV caldata_extract_ubi "Factory" 0x1000 0x2f20 ;; avm,fritzbox-4040) @@ -104,25 +79,10 @@ case "$FIRMWARE" in /usr/bin/fritz_cal_extract -i 1 -s 0x3C800 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \ /usr/bin/fritz_cal_extract -i 1 -s 0x3D000 -e 0x207 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") ;; - buffalo,wtr-m2133hp) - caldata_extract "ART" 0x1000 0x2f20 - ath10k_patch_mac $(mtd_get_mac_binary ORGDATA 0x26) - ;; - cellc,rtl30vw |\ - compex,wpj419 |\ - compex,wpj428 |\ - edgecore,ecw5211 |\ - edgecore,oap100 |\ - engenius,eap1300 |\ - engenius,eap2200 |\ - luma,wrtq-329acn|\ openmesh,a42 |\ openmesh,a62 |\ plasmacloud,pa1200 |\ - plasmacloud,pa2200 |\ - qxwlan,e2600ac-c1 |\ - qxwlan,e2600ac-c2 |\ - unielec,u4019-32m) + plasmacloud,pa2200) caldata_extract "0:ART" 0x1000 0x2f20 ;; devolo,magic-2-wifi-next) @@ -168,14 +128,6 @@ case "$FIRMWARE" in caldata_extract_mmc "0:ART" 0x1000 0x2f20 ath10k_patch_mac $(mmc_get_mac_binary ARTMTD 0x0) ;; - netgear,wac510) - caldata_extract "0:ART" 0x1000 0x2f20 - ath10k_patch_mac $(mtd_get_mac_binary "0:MANUDATA" 0x6) - ;; - teltonika,rutx10) - caldata_extract "0:ART" 0x1000 0x2f20 - ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary "0:CONFIG" 0x0) 2) - ;; zyxel,nbg6617 |\ zyxel,wre6606) caldata_extract "ART" 0x1000 0x2f20 @@ -185,32 +137,11 @@ case "$FIRMWARE" in ;; "ath10k/pre-cal-ahb-a800000.wifi.bin") case "$board" in - 8dev,habanero-dvk |\ - 8dev,jalapeno |\ - alfa-network,ap120c-ac |\ - cilab,meshpoint-one |\ - glinet,gl-ap1300 |\ - glinet,gl-b1300 |\ - glinet,gl-b2200 |\ - glinet,gl-s1300 |\ - linksys,ea6350v3 |\ - mobipromo,cm520-79f |\ - p2w,r619ac-64m |\ - p2w,r619ac-128m |\ qcom,ap-dk01.1-c1) caldata_extract "ART" 0x5000 0x2f20 ;; - aruba,ap-303 |\ - aruba,ap-303h |\ - aruba,ap-365) - caldata_extract "ART" 0x5000 0x2f20 - ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary mfginfo 0x1D) 1) - ;; - asus,map-ac2200) - caldata_extract_ubi "Factory" 0x5000 0x2f20 - ;; + asus,map-ac2200|\ asus,rt-ac58u) - CI_UBIPART=UBI_DEV caldata_extract_ubi "Factory" 0x5000 0x2f20 ;; avm,fritzbox-4040) @@ -226,25 +157,10 @@ case "$FIRMWARE" in /usr/bin/fritz_cal_extract -i 1 -s 0x3D000 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") || \ /usr/bin/fritz_cal_extract -i 1 -s 0x3C000 -e 0x208 -l 12064 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader1") ;; - buffalo,wtr-m2133hp) - caldata_extract "ART" 0x5000 0x2f20 - ath10k_patch_mac $(mtd_get_mac_binary ORGDATA 0x2c) - ;; - cellc,rtl30vw |\ - compex,wpj419 |\ - compex,wpj428 |\ - edgecore,ecw5211 |\ - edgecore,oap100 |\ - engenius,eap1300 |\ - engenius,eap2200 |\ - luma,wrtq-329acn|\ openmesh,a42 |\ openmesh,a62 |\ plasmacloud,pa1200 |\ - plasmacloud,pa2200 |\ - qxwlan,e2600ac-c1 |\ - qxwlan,e2600ac-c2 |\ - unielec,u4019-32m) + plasmacloud,pa2200) caldata_extract "0:ART" 0x5000 0x2f20 ;; devolo,magic-2-wifi-next) @@ -291,14 +207,6 @@ case "$FIRMWARE" in caldata_extract_mmc "0:ART" 0x5000 0x2f20 ath10k_patch_mac $(mmc_get_mac_binary ARTMTD 0xc) ;; - netgear,wac510) - caldata_extract "0:ART" 0x5000 0x2f20 - ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary "0:MANUDATA" 0x6) 16) - ;; - teltonika,rutx10) - caldata_extract "0:ART" 0x5000 0x2f20 - ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary "0:CONFIG" 0x0) 3) - ;; zyxel,nbg6617 |\ zyxel,wre6606) caldata_extract "ART" 0x5000 0x2f20 diff --git a/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh b/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh index d1fcd804d9..2609a55d27 100644 --- a/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh +++ b/target/linux/ipq40xx/base-files/lib/preinit/05_set_iface_mac_ipq40xx.sh @@ -7,6 +7,10 @@ preinit_set_mac_address() { ip link set dev eth0 address $(macaddr_add "$base_mac" 1) ip link set dev eth1 address $(macaddr_add "$base_mac" 3) ;; + asus,rt-ac42u) + ip link set dev eth0 address $(mtd_get_mac_binary_ubi Factory 0x1006) + ip link set dev eth1 address $(mtd_get_mac_binary_ubi Factory 0x9006) + ;; engenius,eap2200) base_mac=$(cat /sys/class/net/eth0/address) ip link set dev eth1 address $(macaddr_add "$base_mac" 1) diff --git a/target/linux/ipq40xx/base-files/lib/preinit/06_set_preinit_iface_ipq40xx.sh b/target/linux/ipq40xx/base-files/lib/preinit/06_set_preinit_iface_ipq40xx.sh index e97133f105..18c13c602c 100644 --- a/target/linux/ipq40xx/base-files/lib/preinit/06_set_preinit_iface_ipq40xx.sh +++ b/target/linux/ipq40xx/base-files/lib/preinit/06_set_preinit_iface_ipq40xx.sh @@ -3,6 +3,7 @@ set_preinit_iface() { case $(board_name) in aruba,ap-303| \ + asus,rt-ac42u| \ asus,rt-ac58u| \ avm,fritzbox-4040| \ ezviz,cs-w3-wd1200g-eup| \ diff --git a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh index 7c02a4840b..b4cc2d2d45 100644 --- a/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh +++ b/target/linux/ipq40xx/base-files/lib/upgrade/platform.sh @@ -6,8 +6,8 @@ RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock' platform_check_image() { case "$(board_name)" in + asus,rt-ac42u |\ asus,rt-ac58u) - CI_UBIPART="UBI_DEV" local ubidev=$(nand_find_ubi $CI_UBIPART) local asus_root=$(nand_find_volume $ubidev jffs2) @@ -117,8 +117,8 @@ platform_do_upgrade() { CI_KERNPART="linux" nand_do_upgrade "$1" ;; + asus,rt-ac42u |\ asus,rt-ac58u) - CI_UBIPART="UBI_DEV" CI_KERNPART="linux" nand_do_upgrade "$1" ;; diff --git a/target/linux/ipq40xx/config-5.10 b/target/linux/ipq40xx/config-5.10 index 64f0e54d41..b944c11d16 100644 --- a/target/linux/ipq40xx/config-5.10 +++ b/target/linux/ipq40xx/config-5.10 @@ -225,6 +225,7 @@ CONFIG_LEDS_LP5523=y CONFIG_LEDS_LP5562=y CONFIG_LEDS_LP55XX_COMMON=y CONFIG_LEDS_TLC591XX=y +CONFIG_LED_TRIGGER_PHY=y CONFIG_LIBFDT=y CONFIG_LOCK_DEBUGGING_SUPPORT=y CONFIG_LOCK_SPIN_ON_OWNER=y diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts index c35ce5ccc4..b2d8aa4999 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ap120c-ac.dts @@ -211,6 +211,17 @@ label = "ART"; reg = <0x00170000 0x00010000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; partition@180000 { @@ -342,9 +353,13 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; }; &wifi1 { status = "okay"; qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ea6350v3.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ea6350v3.dts index cfaba0f411..a99aa90b61 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ea6350v3.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ea6350v3.dts @@ -116,15 +116,18 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; qcom,ath10k-calibration-variant = "linksys-ea6350v3"; }; &wifi1 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; qcom,ath10k-calibration-variant = "linksys-ea6350v3"; }; - &blsp_dma { status = "okay"; }; @@ -207,6 +210,17 @@ label = "ART"; reg = <0x00160000 0x00010000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; u_env@170000 { label = "u_env"; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-eap1300.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-eap1300.dts index f08ddd0abe..6a7f4e5b0f 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-eap1300.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-eap1300.dts @@ -188,6 +188,17 @@ label = "0:ART"; reg = <0x00180000 0x00010000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; partition8@190000 { compatible = "denx,fit"; @@ -226,10 +237,14 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; qcom,ath10k-calibration-variant = "EnGenius-EAP1300"; }; &wifi1 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; qcom,ath10k-calibration-variant = "EnGenius-EAP1300"; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts index 0ee8d1a52e..6f4d7b5f32 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-ecw5211.dts @@ -240,6 +240,17 @@ label = "0:ART"; reg = <0x00170000 0x00010000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; }; @@ -306,11 +317,14 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; }; &wifi1 { status = "okay"; - + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC"; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts index f643882725..fa81bfbf52 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-gl-ap1300.dts @@ -189,6 +189,17 @@ label = "ART"; reg = <0x00170000 0x00010000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; }; @@ -260,10 +271,14 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; qcom,ath10k-calibration-variant = "GL-AP1300"; }; &wifi1 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; qcom,ath10k-calibration-variant = "GL-AP1300"; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi index 3af6de1f60..da09e53cc3 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-jalapeno.dtsi @@ -195,6 +195,17 @@ label = "ART"; reg = <0x00170000 0x00010000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; }; @@ -246,13 +257,15 @@ &wifi0 { status = "okay"; - + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; qcom,ath10k-calibration-variant = "8devices-Jalapeno"; }; &wifi1 { status = "okay"; - + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; qcom,ath10k-calibration-variant = "8devices-Jalapeno"; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts index bd0c6b71df..ac4d4a139c 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rt-ac58u.dts @@ -21,10 +21,6 @@ led-upgrade = &led_power; }; - chosen { - bootargs-append = " ubi.mtd=UBI_DEV"; - }; - soc { rng@22000 { status = "okay"; @@ -272,12 +268,7 @@ #size-cells = <1>; partition@0 { - /* - * TODO: change to label = "ubi" once we drop 4.14. - * also drop the bootargs-append and all the - * userspace CI_UBIPART="UBI_DEV" remains. - */ - label = "UBI_DEV"; + label = "ubi"; reg = <0x00000000 0x08000000>; }; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi index 3673a13430..ebb2d08e73 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-rutx.dtsi @@ -188,12 +188,30 @@ label = "0:ART"; reg = <0x2e0000 0x10000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; config: partition@2f0000 { label = "0:CONFIG"; reg = <0x2f0000 0x10000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_config_0: macaddr@0 { + reg = <0x0 0x6>; + }; }; partition@300000 { @@ -249,3 +267,15 @@ pinctrl-names = "default"; phy-reset-gpio = <&tlmm 62 0>; }; + +&wifi0 { + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&macaddr_config_0>; + mac-address-increment = <2>; +}; + +&wifi1 { + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&macaddr_config_0>; + mac-address-increment = <3>; +}; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wac510.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wac510.dts index 20e12855f4..699e2e28b4 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wac510.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wac510.dts @@ -273,12 +273,30 @@ label = "0:MANUDATA"; reg = <0x001e0000 0x00010000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_manudata_6: macaddr@6 { + reg = <0x6 0x6>; + }; }; partition@1f0000 { label = "0:ART"; reg = <0x001f0000 0x00010000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; }; @@ -348,13 +366,16 @@ &wifi0 { status = "okay"; - + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&macaddr_manudata_6>; qcom,ath10k-calibration-variant = "Netgear-WAC510"; }; &wifi1 { status = "okay"; - + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&macaddr_manudata_6>; + mac-address-increment = <16>; qcom,ath10k-calibration-variant = "Netgear-WAC510"; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts index 2465348a82..5b0c8cf106 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4018-wrtq-329acn.dts @@ -178,6 +178,17 @@ label = "0:ART"; reg = <0x170000 0x010000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; }; @@ -264,12 +275,14 @@ &wifi0 { status = "okay"; - + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; qcom,ath10k-calibration-variant = "Luma-WRTQ-329ACN"; }; &wifi1 { status = "okay"; - + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; qcom,ath10k-calibration-variant = "Luma-WRTQ-329ACN"; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-cm520-79f.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-cm520-79f.dts index be252ccaad..15698065d4 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-cm520-79f.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-cm520-79f.dts @@ -230,6 +230,25 @@ label = "ART"; reg = <0xb00000 0x80000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + macaddr_art_1006: macaddr@1006 { + reg = <0x1006 0x6>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + + macaddr_art_5006: macaddr@5006 { + reg = <0x5006 0x6>; + }; }; partition@b80000 { @@ -293,24 +312,14 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; qcom,ath10k-calibration-variant = "CM520-79F"; }; &wifi1 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; qcom,ath10k-calibration-variant = "CM520-79F"; }; - -&art { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_art_1006: macaddr@1006 { - reg = <0x1006 0x6>; - }; - - macaddr_art_5006: macaddr@5006 { - reg = <0x5006 0x6>; - }; -}; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c1.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c1.dts index df1df2529a..a50ee4a84e 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c1.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c1.dts @@ -68,6 +68,17 @@ label = "0:ART"; reg = <0x170000 0x10000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; partition@180000 { compatible = "denx,fit"; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c2.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c2.dts index 9348ef4eec..ce54ce9f9b 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c2.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac-c2.dts @@ -68,6 +68,17 @@ label = "0:ART"; reg = <0x170000 0x10000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac.dtsi index 57d607849a..45681b19bb 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac.dtsi +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-e2600ac.dtsi @@ -257,10 +257,14 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; qcom,ath10k-calibration-variant = "Qxwlan-E2600AC"; }; &wifi1 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; qcom,ath10k-calibration-variant = "Qxwlan-E2600AC"; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-eap2200.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-eap2200.dts index 95e616695c..c8112c04fe 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-eap2200.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-eap2200.dts @@ -159,6 +159,21 @@ label = "0:ART"; reg = <0x00170000 0x00010000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + + precal_art_9000: precal@9000 { + reg = <0x9000 0x2f20>; + }; }; }; }; @@ -216,6 +231,8 @@ wifi2: wifi@1,0 { compatible = "qcom,ath10k"; reg = <0x00010000 0 0 0 0>; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_9000>; ieee80211-freq-limit = <5470000 5875000>; qcom,ath10k-calibration-variant = "EnGenius-EAP2200"; }; @@ -272,11 +289,15 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; qcom,ath10k-calibration-variant = "EnGenius-EAP2200"; }; &wifi1 { status = "okay"; ieee80211-freq-limit = <5170000 5350000>; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; qcom,ath10k-calibration-variant = "EnGenius-EAP2200"; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts index 339a1e0f72..243dcb84d6 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-gl-b2200.dts @@ -207,6 +207,21 @@ label = "ART"; reg = <0x170000 0x10000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + + cal_art_9000: cal@9000 { + reg = <0x9000 0x2f20>; + }; }; }; }; @@ -348,6 +363,9 @@ status = "okay"; compatible = "qcom,ath10k"; reg = <0x00010000 0 0 0 0>; + /* vendor said 9886 wave-2? Is this correct? */ + nvmem-cell-names = "calibration"; + nvmem-cells = <&cal_art_9000>; qcom,ath10k-calibration-variant = "GL-B2200"; }; }; @@ -355,10 +373,14 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; qcom,ath10k-calibration-variant = "GL-B2200"; }; &wifi1 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; qcom,ath10k-calibration-variant = "GL-B2200"; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-habanero-dvk.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-habanero-dvk.dts index 49cf2cabfa..2a2cfb9ac2 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-habanero-dvk.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-habanero-dvk.dts @@ -284,6 +284,17 @@ label = "ART"; reg = <0x00170000 0x00010000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; partition@180000 { label = "cfg"; @@ -334,13 +345,15 @@ &wifi0 { status = "okay"; - + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; qcom,ath10k-calibration-variant = "8devices-Habanero"; }; &wifi1 { status = "okay"; - + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; qcom,ath10k-calibration-variant = "8devices-Habanero"; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100.dts index 69423ce02b..bdcc31fef7 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-oap100.dts @@ -278,6 +278,17 @@ label = "0:ART"; reg = <0x00170000 0x00010000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; }; @@ -318,11 +329,15 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; qcom,ath10k-calibration-variant = "Edgecore OAP100"; }; &wifi1 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; qcom,ath10k-calibration-variant = "Edgecore OAP100"; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi index 41294e1931..33be77ec36 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi @@ -186,6 +186,17 @@ label = "ART"; reg = <0x170000 0x10000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; }; @@ -340,10 +351,14 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; qcom,ath10k-calibration-variant = "P&W R619AC"; }; &wifi1 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; qcom,ath10k-calibration-variant = "P&W R619AC"; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rt-ac42u.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rt-ac42u.dts new file mode 100644 index 0000000000..3d58eac09e --- /dev/null +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rt-ac42u.dts @@ -0,0 +1,309 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "qcom-ipq4019.dtsi" +#include +#include +#include +#include + +/ { + model = "ASUS RT-AC42U"; + compatible = "asus,rt-ac42u"; + + memory { + device_type = "memory"; + reg = <0x80000000 0x10000000>; /* 256MB */ + }; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + soc { + rng@22000 { + status = "okay"; + }; + + mdio@90000 { + status = "okay"; + }; + + ess-psgmii@98000 { + status = "okay"; + }; + + tcsr@1949000 { + compatible = "qcom,tcsr"; + reg = <0x1949000 0x100>; + qcom,wifi_glb_cfg = ; + }; + + tcsr@194b000 { + compatible = "qcom,tcsr"; + reg = <0x194b000 0x100>; + qcom,usb-hsphy-mode-select = ; + }; + + ess_tcsr@1953000 { + compatible = "qcom,tcsr"; + reg = <0x1953000 0x1000>; + qcom,ess-interface-select = ; + }; + + tcsr@1957000 { + compatible = "qcom,tcsr"; + reg = <0x1957000 0x100>; + qcom,wifi_noc_memtype_m0_m2 = ; + }; + + usb3@8af8800 { + status = "okay"; + + dwc3@8a00000 { + #address-cells = <1>; + #size-cells = <0>; + + usb3_port1: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; + + usb3_port2: port@2 { + reg = <2>; + #trigger-source-cells = <0>; + }; + }; + }; + + crypto@8e3a000 { + status = "okay"; + }; + + watchdog@b017000 { + status = "okay"; + }; + + ess-switch@c000000 { + status = "okay"; + }; + + edma@c080000 { + status = "okay"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&tlmm 18 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&tlmm 11 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power: led-0 { + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&tlmm 40 GPIO_ACTIVE_LOW>; + label = "blue:status"; + }; + + led-1 { + color = ; + function = LED_FUNCTION_WAN; + gpios = <&tlmm 61 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "90000.mdio-1:04:link"; + }; + + led-2 { + color = ; + function = LED_FUNCTION_WAN; + gpios = <&tlmm 68 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "none"; + }; + + led-3 { + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <0>; + gpios = <&tlmm 52 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + led-4 { + color = ; + function = LED_FUNCTION_WLAN; + function-enumerator = <1>; + gpios = <&tlmm 54 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + led-5 { + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <1>; + gpios = <&tlmm 45 GPIO_ACTIVE_LOW>; + }; + + led-6 { + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <2>; + gpios = <&tlmm 43 GPIO_ACTIVE_LOW>; + }; + + led-7 { + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <3>; + gpios = <&tlmm 42 GPIO_ACTIVE_LOW>; + }; + + led-8 { + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <4>; + gpios = <&tlmm 49 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&cryptobam { + status = "okay"; +}; + +&blsp_dma { + status = "okay"; +}; + +&qpic_bam { + status = "okay"; +}; + +&tlmm { + serial_0_pins: serial0_pinmux { + mux { + pins = "gpio16", "gpio17"; + function = "blsp_uart0"; + bias-disable; + }; + }; + + nand_pins: nand_pins { + pullups { + pins = "gpio53", "gpio58", "gpio59"; + function = "qpic"; + bias-pull-up; + }; + + pulldowns { + pins = "gpio55", "gpio56", "gpio57", "gpio60", + "gpio62", "gpio63", "gpio64", "gpio65", + "gpio66", "gpio67", "gpio69"; + function = "qpic"; + bias-pull-down; + }; + }; +}; + +&blsp1_uart1 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&nand { + pinctrl-0 = <&nand_pins>; + pinctrl-names = "default"; + status = "okay"; + + nand@0 { + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "SBL1"; + reg = <0x00000000 0x00080000>; + read-only; + }; + partition@80000 { + label = "MIBIB"; + reg = <0x00080000 0x00080000>; + read-only; + }; + partition@100000 { + label = "QSEE"; + reg = <0x00100000 0x00100000>; + read-only; + }; + partition@200000 { + label = "CDT"; + reg = <0x00200000 0x00080000>; + read-only; + }; + partition@280000 { + label = "APPSBL"; + reg = <0x00280000 0x00140000>; + read-only; + }; + partition@3C0000 { + label = "APPSBLENV"; + reg = <0x003C0000 0x00040000>; + read-only; + }; + partition@400000 { + label = "ubi"; + reg = <0x00400000 0x07C00000>; + }; + }; + }; +}; + +&usb3_ss_phy { + status = "okay"; +}; + +&usb3_hs_phy { + status = "okay"; +}; + +&wifi0 { + status = "okay"; + qcom,ath10k-calibration-variant = "ASUS-RT-AC42U"; +}; + +&pcie0 { + status = "okay"; + perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>; + wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>; + clkreq-gpio = <&tlmm 39 GPIO_ACTIVE_LOW>; + + bridge@0,0 { + reg = <0x00000000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + + wifi2: wifi@1,0 { + compatible = "qcom,ath10k"; + reg = <0x00010000 0 0 0 0>; + + qcom,ath10k-calibration-variant = "ASUS-RT-AC42U"; + }; + }; +}; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts index 0caa0255d0..dcbe95c526 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-rtl30vw.dts @@ -267,6 +267,17 @@ label = "0:ART"; reg = <0x170000 0x10000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; partition@180000 { @@ -376,10 +387,14 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; qcom,ath10k-calibration-variant = "cellc,rtl30vw"; }; &wifi1 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; qcom,ath10k-calibration-variant = "cellc,rtl30vw"; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019-32m.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019-32m.dts index 811c82b9c5..4efcdaf394 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019-32m.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019-32m.dts @@ -65,6 +65,17 @@ label = "0:ART"; reg = <0x170000 0x10000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; partition@180000 { compatible = "denx,fit"; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019.dtsi index 4435d1fd28..ece80571bd 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019.dtsi +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-u4019.dtsi @@ -217,8 +217,12 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; }; &wifi1 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wpj419.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wpj419.dts index fe329c1d43..09cbfaca91 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wpj419.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wpj419.dts @@ -206,6 +206,17 @@ label = "0:ART"; reg = <0x170000 0x010000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; }; }; @@ -378,8 +389,12 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; }; &wifi1 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wtr-m2133hp.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wtr-m2133hp.dts index fb0cec59f7..1f8c830d90 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wtr-m2133hp.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wtr-m2133hp.dts @@ -254,7 +254,8 @@ wifi@0,0 { compatible = "qcom,ath10k"; reg = <0 0 0 0 0>; - + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_9000>, <&macaddr_orgdata_32>; qcom,ath10k-calibration-variant = "Buffalo-WTR-M2133HP"; }; }; @@ -340,10 +341,25 @@ read-only; }; - art: partition@b00000 { + partition@b00000 { label = "ART"; reg = <0x0b00000 0x0080000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; + + precal_art_9000: precal@9000 { + reg = <0x5000 0x2f20>; + }; }; partition@b80000 { @@ -356,6 +372,22 @@ label = "ORGDATA"; reg = <0x0c00000 0x0080000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_orgdata_20: macaddr@20 { + reg = <0x20 0x6>; + }; + macaddr_orgdata_26: macaddr@26 { + reg = <0x26 0x6>; + }; + macaddr_orgdata_2c: macaddr@2c { + reg = <0x2c 0x6>; + }; + macaddr_orgdata_32: macaddr@32 { + reg = <0x32 0x6>; + }; }; partition@c80000 { @@ -386,12 +418,16 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&macaddr_orgdata_26>; qcom,ath10k-calibration-variant = "Buffalo-WTR-M2133HP"; ieee80211-freq-limit = <2400000 2483000>; }; &wifi1 { status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&macaddr_orgdata_2c>; qcom,ath10k-calibration-variant = "Buffalo-WTR-M2133HP"; }; @@ -419,13 +455,3 @@ &usb3_hs_phy { status = "okay"; }; - -&orgdata { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_orgdata_20: macaddr@20 { - reg = <0x20 0x6>; - }; -}; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts index 79f4c04edf..3892c9bd81 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4028-wpj428.dts @@ -231,6 +231,17 @@ label = "0:ART"; reg = <0x00170000 0x00010000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; partition6@180000 { compatible = "denx,fit"; @@ -281,8 +292,12 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; }; &wifi1 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts index 13f89d810c..6cbfa8f37d 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts @@ -118,6 +118,17 @@ label = "ART"; reg = <0xe0000 0x10000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; partition@f0000 { @@ -130,6 +141,13 @@ label = "mfginfo"; reg = <0x1e0000 0x10000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_mfginfo_1d: macaddr@1d { + reg = <0x1d 0x6>; + }; }; partition@1f0000 { diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303h.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303h.dts index 707ed18e3b..201ce97cd9 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303h.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-303h.dts @@ -325,6 +325,17 @@ label = "ART"; reg = <0x1f0000 0x10000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; partition@1f0000 { @@ -349,6 +360,13 @@ label = "mfginfo"; reg = <0x390000 0x10000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_mfginfo_1d: macaddr@1d { + reg = <0x1d 0x6>; + }; }; partition@3a0000 { @@ -413,9 +431,16 @@ &wifi0 { status = "okay"; qcom,ath10k-calibration-variant = "Aruba-AP-303"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&macaddr_mfginfo_1d>; + qcom,ath10k-calibration-variant = "Aruba-AP-303"; }; &wifi1 { status = "okay"; qcom,ath10k-calibration-variant = "Aruba-AP-303"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&macaddr_mfginfo_1d>; + mac-address-increment = <1>; + qcom,ath10k-calibration-variant = "Aruba-AP-303"; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-365.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-365.dts index 988a4421b5..d3cc73f388 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-365.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-ap-365.dts @@ -150,6 +150,17 @@ label = "ART"; reg = <0x1f0000 0x10000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; partition@200000 { @@ -174,6 +185,13 @@ label = "mfginfo"; reg = <0x390000 0x10000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_mfginfo_1d: macaddr@1d { + reg = <0x1d 0x6>; + }; }; partition@3a0000 { diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-aruba-glenmorangie.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-aruba-glenmorangie.dtsi index 9d0823f3ef..0b94aafc83 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-aruba-glenmorangie.dtsi +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-aruba-glenmorangie.dtsi @@ -242,10 +242,15 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_1000>, <&macaddr_mfginfo_1d>; qcom,ath10k-calibration-variant = "Aruba-AP-303"; }; &wifi1 { status = "okay"; + nvmem-cell-names = "pre-calibration", "mac-address"; + nvmem-cells = <&precal_art_5000>, <&macaddr_mfginfo_1d>; + mac-address-increment = <1>; qcom,ath10k-calibration-variant = "Aruba-AP-303"; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts index a735d8e3ac..6e087ba024 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-b1300.dts @@ -208,6 +208,17 @@ label = "ART"; reg = <0x170000 0x10000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; firmware@180000 { @@ -271,10 +282,14 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; qcom,ath10k-calibration-variant = "GL-B1300"; }; &wifi1 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; qcom,ath10k-calibration-variant = "GL-B1300"; }; diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts index fa859b73a3..e9490c2690 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4029-gl-s1300.dts @@ -207,6 +207,17 @@ label = "ART"; reg = <0x170000 0x10000>; read-only; + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + precal_art_1000: precal@1000 { + reg = <0x1000 0x2f20>; + }; + + precal_art_5000: precal@5000 { + reg = <0x5000 0x2f20>; + }; }; firmware@180000 { @@ -347,10 +358,14 @@ &wifi0 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_1000>; qcom,ath10k-calibration-variant = "GL-S1300"; }; &wifi1 { status = "okay"; + nvmem-cell-names = "pre-calibration"; + nvmem-cells = <&precal_art_5000>; qcom,ath10k-calibration-variant = "GL-S1300"; }; diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk index 332fff7f45..b22d261d65 100644 --- a/target/linux/ipq40xx/image/generic.mk +++ b/target/linux/ipq40xx/image/generic.mk @@ -57,6 +57,10 @@ define Build/append-rutx-metadata }' | fwtool -I - $@ endef +define Build/copy-file + cat "$(1)" > "$@" +endef + define Build/mkmylofw_32m $(eval device_id=$(word 1,$(1))) $(eval revision=$(word 2,$(1))) @@ -196,14 +200,42 @@ define Device/asus_map-ac2200 endef TARGET_DEVICES += asus_map-ac2200 +# WARNING: this is an initramfs image that gets you half of the way there +# you need to delete the jffs2 ubi volume and sysupgrade to the final image +# to get a "trx" you can flash via web UI for ac42u/ac58u: +# - change call Device/FitImageLzma to Device/FitImage +# - add the following below UIMAGE_NAME +# UIMAGE_MAGIC := 0x27051956 +# IMAGES += factory.trx +# IMAGE/factory.trx := copy-file $(KDIR)/tmp/$$(KERNEL_INITRAMFS_IMAGE) | uImage none +define Device/asus_rt-ac42u + $(call Device/FitImageLzma) + DEVICE_VENDOR := ASUS + DEVICE_MODEL := RT-AC42U + DEVICE_ALT0_VENDOR := ASUS + DEVICE_ALT0_MODEL := RT-ACRH17 + SOC := qcom-ipq4019 + BLOCKSIZE := 128k + PAGESIZE := 2048 + IMAGE_SIZE := 20439364 + FILESYSTEMS := squashfs +# RT-AC82U is nowhere to be found online +# Rather, this device is a/k/a RT-AC42U +# But we'll go with what the vendor firmware has... + UIMAGE_NAME:=$(shell echo -e '\03\01\01\01RT-AC82U') + DEVICE_PACKAGES := ath10k-firmware-qca9984-ct ipq-wifi-asus_rt-ac42u kmod-usb-ledtrig-usbport +endef +TARGET_DEVICES += asus_rt-ac42u + define Device/asus_rt-ac58u $(call Device/FitImageLzma) DEVICE_VENDOR := ASUS DEVICE_MODEL := RT-AC58U + DEVICE_ALT0_VENDOR := ASUS + DEVICE_ALT0_MODEL := RT-ACRH13 SOC := qcom-ipq4018 BLOCKSIZE := 128k PAGESIZE := 2048 - DTB_SIZE := 65536 IMAGE_SIZE := 20439364 FILESYSTEMS := squashfs # Someone - in their infinite wisdom - decided to put the firmware diff --git a/target/linux/ipq40xx/patches-5.10/901-arm-boot-add-dts-files.patch b/target/linux/ipq40xx/patches-5.10/901-arm-boot-add-dts-files.patch index b641251423..b76b1a30bb 100644 --- a/target/linux/ipq40xx/patches-5.10/901-arm-boot-add-dts-files.patch +++ b/target/linux/ipq40xx/patches-5.10/901-arm-boot-add-dts-files.patch @@ -10,7 +10,7 @@ Signed-off-by: John Crispin --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile -@@ -902,11 +902,71 @@ dtb-$(CONFIG_ARCH_QCOM) += \ +@@ -902,11 +902,72 @@ dtb-$(CONFIG_ARCH_QCOM) += \ qcom-apq8074-dragonboard.dtb \ qcom-apq8084-ifc6540.dtb \ qcom-apq8084-mtp.dtb \ @@ -65,6 +65,7 @@ Signed-off-by: John Crispin + qcom-ipq4019-r619ac-128m.dtb \ + qcom-ipq4019-rbr50.dtb \ + qcom-ipq4019-rbs50.dtb \ ++ qcom-ipq4019-rt-ac42u.dtb \ + qcom-ipq4019-rtl30vw.dtb \ + qcom-ipq4019-srr60.dtb \ + qcom-ipq4019-srs60.dtb \ diff --git a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts index 940e01439d..16a6ca0076 100644 --- a/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts +++ b/target/linux/ipq806x/files/arch/arm/boot/dts/qcom-ipq8064-d7800.dts @@ -7,10 +7,17 @@ compatible = "netgear,d7800", "qcom,ipq8064"; memory@0 { - reg = <0x42000000 0xe000000>; + reg = <0x42000000 0x1e000000>; device_type = "memory"; }; + reserved-memory { + rsvd@5fe00000 { + reg = <0x5fe00000 0x200000>; + reusable; + }; + }; + aliases { mdio-gpio0 = &mdio0; @@ -217,6 +224,13 @@ }; }; +&pcie2 { + status = "okay"; + reset-gpio = <&qcom_pinmux 63 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&pcie2_pins>; + pinctrl-names = "default"; +}; + &nand_controller { status = "okay"; diff --git a/target/linux/lantiq/image/ar9.mk b/target/linux/lantiq/image/ar9.mk index d30e1ee492..434dacb121 100644 --- a/target/linux/lantiq/image/ar9.mk +++ b/target/linux/lantiq/image/ar9.mk @@ -8,7 +8,7 @@ define Device/avm_fritz7312 kmod-ltq-adsl-ar9-mei kmod-ltq-adsl-ar9 \ kmod-ltq-adsl-ar9-fw-b kmod-ltq-atm-ar9 \ ltq-adsl-app ppp-mod-pppoa \ - -swconfig + kmod-ltq-deu-ar9 -swconfig endef TARGET_DEVICES += avm_fritz7312 @@ -24,7 +24,7 @@ define Device/avm_fritz7320 kmod-ltq-adsl-ar9-mei kmod-ltq-adsl-ar9 \ kmod-ltq-adsl-ar9-fw-b kmod-ltq-atm-ar9 \ ltq-adsl-app ppp-mod-pppoa \ - kmod-usb-dwc2 -swconfig + kmod-ltq-deu-ar9 kmod-usb-dwc2 -swconfig SUPPORTED_DEVICES += FRITZ7320 endef TARGET_DEVICES += avm_fritz7320 @@ -40,6 +40,7 @@ define Device/bt_homehub-v3a DEVICE_PACKAGES := kmod-usb-dwc2 \ kmod-ltq-adsl-ar9-mei kmod-ltq-adsl-ar9 \ kmod-ltq-adsl-ar9-fw-a kmod-ltq-atm-ar9 \ + kmod-ltq-deu-ar9 \ ltq-adsl-app ppp-mod-pppoa \ kmod-ath9k kmod-owl-loader wpad-basic-wolfssl \ uboot-envtools @@ -108,7 +109,7 @@ define Device/netgear_dgn3500 kmod-ath9k kmod-owl-loader wpad-basic-wolfssl \ kmod-ltq-adsl-ar9-mei kmod-ltq-adsl-ar9 \ kmod-ltq-adsl-ar9-fw-a kmod-ltq-atm-ar9 \ - ltq-adsl-app ppp-mod-pppoa + kmod-ltq-deu-ar9 ltq-adsl-app ppp-mod-pppoa SUPPORTED_DEVICES += DGN3500 endef TARGET_DEVICES += netgear_dgn3500 @@ -130,7 +131,7 @@ define Device/netgear_dgn3500b kmod-ath9k kmod-owl-loader wpad-basic-wolfssl \ kmod-ltq-adsl-ar9-mei kmod-ltq-adsl-ar9 \ kmod-ltq-adsl-ar9-fw-b kmod-ltq-atm-ar9 \ - ltq-adsl-app ppp-mod-pppoa + kmod-ltq-deu-ar9 ltq-adsl-app ppp-mod-pppoa SUPPORTED_DEVICES += DGN3500B endef TARGET_DEVICES += netgear_dgn3500b @@ -143,7 +144,7 @@ define Device/zte_h201l DEVICE_PACKAGES := kmod-ath9k-htc wpad-basic-wolfssl \ kmod-ltq-adsl-ar9-mei kmod-ltq-adsl-ar9 \ kmod-ltq-adsl-ar9-fw-b kmod-ltq-atm-ar9 \ - ltq-adsl-app ppp-mod-pppoe \ + kmod-ltq-deu-ar9 ltq-adsl-app ppp-mod-pppoe \ kmod-usb-dwc2 kmod-usb-ledtrig-usbport \ kmod-ltq-tapi kmod-ltq-vmmc SUPPORTED_DEVICES += H201L @@ -159,7 +160,7 @@ define Device/zyxel_p-2601hn DEVICE_PACKAGES := kmod-rt2800-usb wpad-basic-wolfssl \ kmod-ltq-adsl-ar9-mei kmod-ltq-adsl-ar9 \ kmod-ltq-adsl-ar9-fw-b kmod-ltq-atm-ar9 \ - ltq-adsl-app ppp-mod-pppoe \ + kmod-ltq-deu-ar9 ltq-adsl-app ppp-mod-pppoe \ kmod-usb-dwc2 SUPPORTED_DEVICES += P2601HNFX endef diff --git a/target/linux/lantiq/image/danube.mk b/target/linux/lantiq/image/danube.mk index 9b37bfb595..9cafd2b258 100644 --- a/target/linux/lantiq/image/danube.mk +++ b/target/linux/lantiq/image/danube.mk @@ -192,7 +192,7 @@ define Device/bt_homehub-v2b DEVICE_PACKAGES := kmod-usb-dwc2 \ kmod-ltq-adsl-danube-mei kmod-ltq-adsl-danube \ kmod-ltq-adsl-danube-fw-a kmod-ltq-atm-danube \ - ltq-adsl-app ppp-mod-pppoa \ + kmod-ltq-deu-danube ltq-adsl-app ppp-mod-pppoa \ kmod-ath9k kmod-owl-loader wpad-basic-wolfssl SUPPORTED_DEVICES += BTHOMEHUBV2B DEFAULT := n diff --git a/target/linux/lantiq/patches-5.10/0702-v5.16-net-lantiq-add-support-for-jumbo-frames.patch b/target/linux/lantiq/patches-5.10/0702-v5.16-net-lantiq-add-support-for-jumbo-frames.patch new file mode 100644 index 0000000000..5bbf752dba --- /dev/null +++ b/target/linux/lantiq/patches-5.10/0702-v5.16-net-lantiq-add-support-for-jumbo-frames.patch @@ -0,0 +1,145 @@ +From 998ac358019e491217e752bc6dcbb3afb2a6fa3e Mon Sep 17 00:00:00 2001 +From: Aleksander Jan Bajkowski +Date: Sun, 19 Sep 2021 20:24:28 +0200 +Subject: [PATCH] net: lantiq: add support for jumbo frames + +Add support for jumbo frames. Full support for jumbo frames requires +changes in the DSA switch driver (lantiq_gswip.c). + +Tested on BT Hone Hub 5A. + +Signed-off-by: Aleksander Jan Bajkowski +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/lantiq_xrx200.c | 64 +++++++++++++++++++++++++--- + 1 file changed, 57 insertions(+), 7 deletions(-) + +--- a/drivers/net/ethernet/lantiq_xrx200.c ++++ b/drivers/net/ethernet/lantiq_xrx200.c +@@ -14,13 +14,15 @@ + #include + #include + ++#include ++ + #include + #include + + #include + + /* DMA */ +-#define XRX200_DMA_DATA_LEN 0x600 ++#define XRX200_DMA_DATA_LEN (SZ_64K - 1) + #define XRX200_DMA_RX 0 + #define XRX200_DMA_TX 1 + +@@ -106,7 +108,8 @@ static void xrx200_flush_dma(struct xrx2 + break; + + desc->ctl = LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) | +- XRX200_DMA_DATA_LEN; ++ (ch->priv->net_dev->mtu + VLAN_ETH_HLEN + ++ ETH_FCS_LEN); + ch->dma.desc++; + ch->dma.desc %= LTQ_DESC_NUM; + } +@@ -154,19 +157,20 @@ static int xrx200_close(struct net_devic + + static int xrx200_alloc_skb(struct xrx200_chan *ch) + { ++ int len = ch->priv->net_dev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN; + struct sk_buff *skb = ch->skb[ch->dma.desc]; + dma_addr_t mapping; + int ret = 0; + + ch->skb[ch->dma.desc] = netdev_alloc_skb_ip_align(ch->priv->net_dev, +- XRX200_DMA_DATA_LEN); ++ len); + if (!ch->skb[ch->dma.desc]) { + ret = -ENOMEM; + goto skip; + } + + mapping = dma_map_single(ch->priv->dev, ch->skb[ch->dma.desc]->data, +- XRX200_DMA_DATA_LEN, DMA_FROM_DEVICE); ++ len, DMA_FROM_DEVICE); + if (unlikely(dma_mapping_error(ch->priv->dev, mapping))) { + dev_kfree_skb_any(ch->skb[ch->dma.desc]); + ch->skb[ch->dma.desc] = skb; +@@ -179,8 +183,7 @@ static int xrx200_alloc_skb(struct xrx20 + wmb(); + skip: + ch->dma.desc_base[ch->dma.desc].ctl = +- LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) | +- XRX200_DMA_DATA_LEN; ++ LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) | len; + + return ret; + } +@@ -340,10 +343,57 @@ err_drop: + return NETDEV_TX_OK; + } + ++static int ++xrx200_change_mtu(struct net_device *net_dev, int new_mtu) ++{ ++ struct xrx200_priv *priv = netdev_priv(net_dev); ++ struct xrx200_chan *ch_rx = &priv->chan_rx; ++ int old_mtu = net_dev->mtu; ++ bool running = false; ++ struct sk_buff *skb; ++ int curr_desc; ++ int ret = 0; ++ ++ net_dev->mtu = new_mtu; ++ ++ if (new_mtu <= old_mtu) ++ return ret; ++ ++ running = netif_running(net_dev); ++ if (running) { ++ napi_disable(&ch_rx->napi); ++ ltq_dma_close(&ch_rx->dma); ++ } ++ ++ xrx200_poll_rx(&ch_rx->napi, LTQ_DESC_NUM); ++ curr_desc = ch_rx->dma.desc; ++ ++ for (ch_rx->dma.desc = 0; ch_rx->dma.desc < LTQ_DESC_NUM; ++ ch_rx->dma.desc++) { ++ skb = ch_rx->skb[ch_rx->dma.desc]; ++ ret = xrx200_alloc_skb(ch_rx); ++ if (ret) { ++ net_dev->mtu = old_mtu; ++ break; ++ } ++ dev_kfree_skb_any(skb); ++ } ++ ++ ch_rx->dma.desc = curr_desc; ++ if (running) { ++ napi_enable(&ch_rx->napi); ++ ltq_dma_open(&ch_rx->dma); ++ ltq_dma_enable_irq(&ch_rx->dma); ++ } ++ ++ return ret; ++} ++ + static const struct net_device_ops xrx200_netdev_ops = { + .ndo_open = xrx200_open, + .ndo_stop = xrx200_close, + .ndo_start_xmit = xrx200_start_xmit, ++ .ndo_change_mtu = xrx200_change_mtu, + .ndo_set_mac_address = eth_mac_addr, + .ndo_validate_addr = eth_validate_addr, + }; +@@ -454,7 +504,7 @@ static int xrx200_probe(struct platform_ + net_dev->netdev_ops = &xrx200_netdev_ops; + SET_NETDEV_DEV(net_dev, dev); + net_dev->min_mtu = ETH_ZLEN; +- net_dev->max_mtu = XRX200_DMA_DATA_LEN; ++ net_dev->max_mtu = XRX200_DMA_DATA_LEN - VLAN_ETH_HLEN - ETH_FCS_LEN; + + /* load the memory ranges */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); diff --git a/target/linux/lantiq/patches-5.10/0703-net-lantiq-enable-jumbo-frames-on-GSWIP.patch b/target/linux/lantiq/patches-5.10/0703-net-lantiq-enable-jumbo-frames-on-GSWIP.patch new file mode 100644 index 0000000000..9ff0baed43 --- /dev/null +++ b/target/linux/lantiq/patches-5.10/0703-net-lantiq-enable-jumbo-frames-on-GSWIP.patch @@ -0,0 +1,101 @@ +From 24a43ae2ac0ea06c474b1c80dc75651294d49321 Mon Sep 17 00:00:00 2001 +From: Thomas Nixon +Date: Sat, 2 Oct 2021 00:48:05 +0100 +Subject: [PATCH 2/2] net: lantiq: enable jumbo frames on GSWIP + +This enables non-standard MTUs on a per-port basis, with the overall +frame size set based on the CPU port. + +When the MTU is not changed, this should have no effect. + +Long packets crash the switch with MTUs of greater than 2526, so the +maximum is limited for now. + +Signed-off-by: Thomas Nixon +--- + drivers/net/dsa/lantiq_gswip.c | 46 +++++++++++++++++++++++++++++++--- + 1 file changed, 42 insertions(+), 4 deletions(-) + +--- a/drivers/net/dsa/lantiq_gswip.c ++++ b/drivers/net/dsa/lantiq_gswip.c +@@ -238,6 +238,11 @@ + + #define XRX200_GPHY_FW_ALIGN (16 * 1024) + ++/* maximum packet size supported by the switch; in theory this should be 9600, ++ * but long packets currently cause lock-ups with an MTU of over 2526 ++ */ ++#define GSWIP_MAX_PACKET_LENGTH 2556 ++ + struct gswip_hw_info { + int max_ports; + int cpu_port; +@@ -851,10 +856,6 @@ static int gswip_setup(struct dsa_switch + gswip_switch_mask(priv, 0, GSWIP_PCE_PCTRL_0_INGRESS, + GSWIP_PCE_PCTRL_0p(cpu_port)); + +- gswip_switch_mask(priv, 0, GSWIP_MAC_CTRL_2_MLEN, +- GSWIP_MAC_CTRL_2p(cpu_port)); +- gswip_switch_w(priv, VLAN_ETH_FRAME_LEN + 8 + ETH_FCS_LEN, +- GSWIP_MAC_FLEN); + gswip_switch_mask(priv, 0, GSWIP_BM_QUEUE_GCTRL_GL_MOD, + GSWIP_BM_QUEUE_GCTRL); + +@@ -871,6 +872,8 @@ static int gswip_setup(struct dsa_switch + return err; + } + ++ ds->mtu_enforcement_ingress = true; ++ + gswip_port_enable(ds, cpu_port, NULL); + return 0; + } +@@ -1433,6 +1436,39 @@ static int gswip_port_fdb_dump(struct ds + return 0; + } + ++static int gswip_port_max_mtu(struct dsa_switch *ds, int port) ++{ ++ /* includes 8 bytes for special header */ ++ return GSWIP_MAX_PACKET_LENGTH - VLAN_ETH_HLEN - ETH_FCS_LEN; ++} ++ ++static int gswip_port_change_mtu(struct dsa_switch *ds, int port, int new_mtu) ++{ ++ struct gswip_priv *priv = ds->priv; ++ int cpu_port = priv->hw_info->cpu_port; ++ ++ /* cpu port always has maximum mtu of user ports, so use it to set ++ * switch frame size, including 8 byte special header ++ */ ++ if (port == cpu_port) { ++ new_mtu += 8; ++ gswip_switch_w(priv, VLAN_ETH_HLEN + new_mtu + ETH_FCS_LEN, ++ GSWIP_MAC_FLEN); ++ } ++ ++ /* enable MLEN for ports with non-standard MTUs, including the special ++ * header on the CPU port added above ++ */ ++ if (new_mtu != ETH_DATA_LEN) ++ gswip_switch_mask(priv, 0, GSWIP_MAC_CTRL_2_MLEN, ++ GSWIP_MAC_CTRL_2p(port)); ++ else ++ gswip_switch_mask(priv, GSWIP_MAC_CTRL_2_MLEN, 0, ++ GSWIP_MAC_CTRL_2p(port)); ++ ++ return 0; ++} ++ + static void gswip_phylink_validate(struct dsa_switch *ds, int port, + unsigned long *supported, + struct phylink_link_state *state) +@@ -1776,6 +1812,8 @@ static const struct dsa_switch_ops gswip + .port_fdb_add = gswip_port_fdb_add, + .port_fdb_del = gswip_port_fdb_del, + .port_fdb_dump = gswip_port_fdb_dump, ++ .port_change_mtu = gswip_port_change_mtu, ++ .port_max_mtu = gswip_port_max_mtu, + .phylink_validate = gswip_phylink_validate, + .phylink_mac_config = gswip_phylink_mac_config, + .phylink_mac_link_down = gswip_phylink_mac_link_down, diff --git a/target/linux/lantiq/patches-5.10/0704-v5.16-net-lantiq_xrx200-increase-buffer-reservation.patch b/target/linux/lantiq/patches-5.10/0704-v5.16-net-lantiq_xrx200-increase-buffer-reservation.patch new file mode 100644 index 0000000000..77c0eb6354 --- /dev/null +++ b/target/linux/lantiq/patches-5.10/0704-v5.16-net-lantiq_xrx200-increase-buffer-reservation.patch @@ -0,0 +1,122 @@ +From 1488fc204568f707fe2a42a913788c00a95af30e Mon Sep 17 00:00:00 2001 +From: Aleksander Jan Bajkowski +Date: Fri, 17 Dec 2021 01:07:40 +0100 +Subject: [PATCH] net: lantiq_xrx200: increase buffer reservation + +If the user sets a lower mtu on the CPU port than on the switch, +then DMA inserts a few more bytes into the buffer than expected. +In the worst case, it may exceed the size of the buffer. The +experiments showed that the buffer should be a multiple of the +burst length value. This patch rounds the length of the rx buffer +upwards and fixes this bug. The reservation of FCS space in the +buffer has been removed as PMAC strips the FCS. + +Fixes: 998ac358019e ("net: lantiq: add support for jumbo frames") +Reported-by: Thomas Nixon +Signed-off-by: Aleksander Jan Bajkowski +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/lantiq_xrx200.c | 34 ++++++++++++++++++++-------- + 1 file changed, 24 insertions(+), 10 deletions(-) + +--- a/drivers/net/ethernet/lantiq_xrx200.c ++++ b/drivers/net/ethernet/lantiq_xrx200.c +@@ -70,6 +70,8 @@ struct xrx200_priv { + struct xrx200_chan chan_tx; + struct xrx200_chan chan_rx; + ++ u16 rx_buf_size; ++ + struct net_device *net_dev; + struct device *dev; + +@@ -96,6 +98,16 @@ static void xrx200_pmac_mask(struct xrx2 + xrx200_pmac_w32(priv, val, offset); + } + ++static int xrx200_max_frame_len(int mtu) ++{ ++ return VLAN_ETH_HLEN + mtu; ++} ++ ++static int xrx200_buffer_size(int mtu) ++{ ++ return round_up(xrx200_max_frame_len(mtu), 4 * XRX200_DMA_BURST_LEN); ++} ++ + /* drop all the packets from the DMA ring */ + static void xrx200_flush_dma(struct xrx200_chan *ch) + { +@@ -108,8 +120,7 @@ static void xrx200_flush_dma(struct xrx2 + break; + + desc->ctl = LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) | +- (ch->priv->net_dev->mtu + VLAN_ETH_HLEN + +- ETH_FCS_LEN); ++ ch->priv->rx_buf_size; + ch->dma.desc++; + ch->dma.desc %= LTQ_DESC_NUM; + } +@@ -157,21 +168,21 @@ static int xrx200_close(struct net_devic + + static int xrx200_alloc_skb(struct xrx200_chan *ch) + { +- int len = ch->priv->net_dev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN; + struct sk_buff *skb = ch->skb[ch->dma.desc]; ++ struct xrx200_priv *priv = ch->priv; + dma_addr_t mapping; + int ret = 0; + +- ch->skb[ch->dma.desc] = netdev_alloc_skb_ip_align(ch->priv->net_dev, +- len); ++ ch->skb[ch->dma.desc] = netdev_alloc_skb_ip_align(priv->net_dev, ++ priv->rx_buf_size); + if (!ch->skb[ch->dma.desc]) { + ret = -ENOMEM; + goto skip; + } + +- mapping = dma_map_single(ch->priv->dev, ch->skb[ch->dma.desc]->data, +- len, DMA_FROM_DEVICE); +- if (unlikely(dma_mapping_error(ch->priv->dev, mapping))) { ++ mapping = dma_map_single(priv->dev, ch->skb[ch->dma.desc]->data, ++ priv->rx_buf_size, DMA_FROM_DEVICE); ++ if (unlikely(dma_mapping_error(priv->dev, mapping))) { + dev_kfree_skb_any(ch->skb[ch->dma.desc]); + ch->skb[ch->dma.desc] = skb; + ret = -ENOMEM; +@@ -183,7 +194,7 @@ static int xrx200_alloc_skb(struct xrx20 + wmb(); + skip: + ch->dma.desc_base[ch->dma.desc].ctl = +- LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) | len; ++ LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) | priv->rx_buf_size; + + return ret; + } +@@ -355,6 +366,7 @@ xrx200_change_mtu(struct net_device *net + int ret = 0; + + net_dev->mtu = new_mtu; ++ priv->rx_buf_size = xrx200_buffer_size(new_mtu); + + if (new_mtu <= old_mtu) + return ret; +@@ -374,6 +386,7 @@ xrx200_change_mtu(struct net_device *net + ret = xrx200_alloc_skb(ch_rx); + if (ret) { + net_dev->mtu = old_mtu; ++ priv->rx_buf_size = xrx200_buffer_size(old_mtu); + break; + } + dev_kfree_skb_any(skb); +@@ -504,7 +517,8 @@ static int xrx200_probe(struct platform_ + net_dev->netdev_ops = &xrx200_netdev_ops; + SET_NETDEV_DEV(net_dev, dev); + net_dev->min_mtu = ETH_ZLEN; +- net_dev->max_mtu = XRX200_DMA_DATA_LEN - VLAN_ETH_HLEN - ETH_FCS_LEN; ++ net_dev->max_mtu = XRX200_DMA_DATA_LEN - xrx200_max_frame_len(0); ++ priv->rx_buf_size = xrx200_buffer_size(ETH_DATA_LEN); + + /* load the memory ranges */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); diff --git a/target/linux/lantiq/patches-5.10/0705-v5.17-net-lantiq_xrx200-add-ingress-SG-DMA-support.patch b/target/linux/lantiq/patches-5.10/0705-v5.17-net-lantiq_xrx200-add-ingress-SG-DMA-support.patch new file mode 100644 index 0000000000..f2c36952fc --- /dev/null +++ b/target/linux/lantiq/patches-5.10/0705-v5.17-net-lantiq_xrx200-add-ingress-SG-DMA-support.patch @@ -0,0 +1,104 @@ +From c3e6b2c35b34214c58c1e90d65dab5f5393608e7 Mon Sep 17 00:00:00 2001 +From: Aleksander Jan Bajkowski +Date: Mon, 3 Jan 2022 20:43:16 +0100 +Subject: [PATCH] net: lantiq_xrx200: add ingress SG DMA support + +This patch adds support for scatter gather DMA. DMA in PMAC splits +the packet into several buffers when the MTU on the CPU port is +less than the MTU of the switch. The first buffer starts at an +offset of NET_IP_ALIGN. In subsequent buffers, dma ignores the +offset. Thanks to this patch, the user can still connect to the +device in such a situation. For normal configurations, the patch +has no effect on performance. + +Signed-off-by: Aleksander Jan Bajkowski +Signed-off-by: David S. Miller +--- + drivers/net/ethernet/lantiq_xrx200.c | 47 +++++++++++++++++++++++----- + 1 file changed, 40 insertions(+), 7 deletions(-) + +--- a/drivers/net/ethernet/lantiq_xrx200.c ++++ b/drivers/net/ethernet/lantiq_xrx200.c +@@ -26,6 +26,9 @@ + #define XRX200_DMA_RX 0 + #define XRX200_DMA_TX 1 + ++#define XRX200_DMA_PACKET_COMPLETE 0 ++#define XRX200_DMA_PACKET_IN_PROGRESS 1 ++ + /* cpu port mac */ + #define PMAC_RX_IPG 0x0024 + #define PMAC_RX_IPG_MASK 0xf +@@ -61,6 +64,9 @@ struct xrx200_chan { + struct ltq_dma_channel dma; + struct sk_buff *skb[LTQ_DESC_NUM]; + ++ struct sk_buff *skb_head; ++ struct sk_buff *skb_tail; ++ + struct xrx200_priv *priv; + }; + +@@ -204,7 +210,8 @@ static int xrx200_hw_receive(struct xrx2 + struct xrx200_priv *priv = ch->priv; + struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; + struct sk_buff *skb = ch->skb[ch->dma.desc]; +- int len = (desc->ctl & LTQ_DMA_SIZE_MASK); ++ u32 ctl = desc->ctl; ++ int len = (ctl & LTQ_DMA_SIZE_MASK); + struct net_device *net_dev = priv->net_dev; + int ret; + +@@ -220,12 +227,36 @@ static int xrx200_hw_receive(struct xrx2 + } + + skb_put(skb, len); +- skb->protocol = eth_type_trans(skb, net_dev); +- netif_receive_skb(skb); +- net_dev->stats.rx_packets++; +- net_dev->stats.rx_bytes += len; + +- return 0; ++ /* add buffers to skb via skb->frag_list */ ++ if (ctl & LTQ_DMA_SOP) { ++ ch->skb_head = skb; ++ ch->skb_tail = skb; ++ } else if (ch->skb_head) { ++ if (ch->skb_head == ch->skb_tail) ++ skb_shinfo(ch->skb_tail)->frag_list = skb; ++ else ++ ch->skb_tail->next = skb; ++ ch->skb_tail = skb; ++ skb_reserve(ch->skb_tail, -NET_IP_ALIGN); ++ ch->skb_head->len += skb->len; ++ ch->skb_head->data_len += skb->len; ++ ch->skb_head->truesize += skb->truesize; ++ } ++ ++ if (ctl & LTQ_DMA_EOP) { ++ ch->skb_head->protocol = eth_type_trans(ch->skb_head, net_dev); ++ netif_receive_skb(ch->skb_head); ++ net_dev->stats.rx_packets++; ++ net_dev->stats.rx_bytes += ch->skb_head->len; ++ ch->skb_head = NULL; ++ ch->skb_tail = NULL; ++ ret = XRX200_DMA_PACKET_COMPLETE; ++ } else { ++ ret = XRX200_DMA_PACKET_IN_PROGRESS; ++ } ++ ++ return ret; + } + + static int xrx200_poll_rx(struct napi_struct *napi, int budget) +@@ -240,7 +271,9 @@ static int xrx200_poll_rx(struct napi_st + + if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) { + ret = xrx200_hw_receive(ch); +- if (ret) ++ if (ret == XRX200_DMA_PACKET_IN_PROGRESS) ++ continue; ++ if (ret != XRX200_DMA_PACKET_COMPLETE) + return ret; + rx++; + } else { diff --git a/target/linux/lantiq/patches-5.10/0710-v5.16-net-lantiq-configure-the-burst-length-in-ethernet-dr.patch b/target/linux/lantiq/patches-5.10/0710-v5.16-net-lantiq-configure-the-burst-length-in-ethernet-dr.patch index bf3b903616..4fb7d0767b 100644 --- a/target/linux/lantiq/patches-5.10/0710-v5.16-net-lantiq-configure-the-burst-length-in-ethernet-dr.patch +++ b/target/linux/lantiq/patches-5.10/0710-v5.16-net-lantiq-configure-the-burst-length-in-ethernet-dr.patch @@ -75,7 +75,7 @@ Signed-off-by: David S. Miller priv->txch.netdev = dev; --- a/drivers/net/ethernet/lantiq_xrx200.c +++ b/drivers/net/ethernet/lantiq_xrx200.c -@@ -71,6 +71,9 @@ struct xrx200_priv { +@@ -81,6 +81,9 @@ struct xrx200_priv { struct net_device *net_dev; struct device *dev; @@ -85,7 +85,7 @@ Signed-off-by: David S. Miller __iomem void *pmac_reg; }; -@@ -316,8 +319,8 @@ static netdev_tx_t xrx200_start_xmit(str +@@ -363,8 +366,8 @@ static netdev_tx_t xrx200_start_xmit(str if (unlikely(dma_mapping_error(priv->dev, mapping))) goto err_drop; @@ -96,7 +96,7 @@ Signed-off-by: David S. Miller desc->addr = mapping - byte_offset; /* Make sure the address is written before we give it to HW */ -@@ -369,7 +372,7 @@ static int xrx200_dma_init(struct xrx200 +@@ -465,7 +468,7 @@ static int xrx200_dma_init(struct xrx200 int ret = 0; int i; @@ -105,7 +105,7 @@ Signed-off-by: David S. Miller ch_rx->dma.nr = XRX200_DMA_RX; ch_rx->dma.dev = priv->dev; -@@ -487,6 +490,18 @@ static int xrx200_probe(struct platform_ +@@ -584,6 +587,18 @@ static int xrx200_probe(struct platform_ if (err) eth_hw_addr_random(net_dev); diff --git a/target/linux/lantiq/patches-5.10/0711-v5.16-net-lantiq_xrx200-Hardcode-the-burst-length-value.patch b/target/linux/lantiq/patches-5.10/0711-v5.16-net-lantiq_xrx200-Hardcode-the-burst-length-value.patch index 0b68179a48..7448af8c26 100644 --- a/target/linux/lantiq/patches-5.10/0711-v5.16-net-lantiq_xrx200-Hardcode-the-burst-length-value.patch +++ b/target/linux/lantiq/patches-5.10/0711-v5.16-net-lantiq_xrx200-Hardcode-the-burst-length-value.patch @@ -15,15 +15,15 @@ Signed-off-by: David S. Miller --- a/drivers/net/ethernet/lantiq_xrx200.c +++ b/drivers/net/ethernet/lantiq_xrx200.c -@@ -23,6 +23,7 @@ - #define XRX200_DMA_DATA_LEN 0x600 +@@ -25,6 +25,7 @@ + #define XRX200_DMA_DATA_LEN (SZ_64K - 1) #define XRX200_DMA_RX 0 #define XRX200_DMA_TX 1 +#define XRX200_DMA_BURST_LEN 8 - /* cpu port mac */ - #define PMAC_RX_IPG 0x0024 -@@ -71,9 +72,6 @@ struct xrx200_priv { + #define XRX200_DMA_PACKET_COMPLETE 0 + #define XRX200_DMA_PACKET_IN_PROGRESS 1 +@@ -81,9 +82,6 @@ struct xrx200_priv { struct net_device *net_dev; struct device *dev; @@ -33,7 +33,7 @@ Signed-off-by: David S. Miller __iomem void *pmac_reg; }; -@@ -320,7 +318,7 @@ static netdev_tx_t xrx200_start_xmit(str +@@ -367,7 +365,7 @@ static netdev_tx_t xrx200_start_xmit(str goto err_drop; /* dma needs to start on a burst length value aligned address */ @@ -42,7 +42,7 @@ Signed-off-by: David S. Miller desc->addr = mapping - byte_offset; /* Make sure the address is written before we give it to HW */ -@@ -372,7 +370,8 @@ static int xrx200_dma_init(struct xrx200 +@@ -468,7 +466,8 @@ static int xrx200_dma_init(struct xrx200 int ret = 0; int i; @@ -52,7 +52,7 @@ Signed-off-by: David S. Miller ch_rx->dma.nr = XRX200_DMA_RX; ch_rx->dma.dev = priv->dev; -@@ -490,18 +489,6 @@ static int xrx200_probe(struct platform_ +@@ -587,18 +586,6 @@ static int xrx200_probe(struct platform_ if (err) eth_hw_addr_random(net_dev); diff --git a/target/linux/lantiq/patches-5.10/0713-MIPS-lantiq-dma-increase-descritor-count.patch b/target/linux/lantiq/patches-5.10/0713-MIPS-lantiq-dma-increase-descritor-count.patch new file mode 100644 index 0000000000..37ed1d4f31 --- /dev/null +++ b/target/linux/lantiq/patches-5.10/0713-MIPS-lantiq-dma-increase-descritor-count.patch @@ -0,0 +1,28 @@ +From 5112e9234bbb89f8dd15c983206bd9107b8436d5 Mon Sep 17 00:00:00 2001 +From: Aleksander Jan Bajkowski +Date: Tue, 4 Jan 2022 16:11:42 +0100 +Subject: [PATCH 713/715] MIPS: lantiq: dma: increase descritor count + +NAT Performance results on BT Home Hub 5A (kernel 5.10.89, mtu 1500): + + Down Up +Before 539 Mbps 599 Mbps +After 545 Mbps 625 Mbps + +Signed-off-by: Aleksander Jan Bajkowski +Signed-off-by: Jakub Kicinski +--- + arch/mips/include/asm/mach-lantiq/xway/xway_dma.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h ++++ b/arch/mips/include/asm/mach-lantiq/xway/xway_dma.h +@@ -8,7 +8,7 @@ + #define LTQ_DMA_H__ + + #define LTQ_DESC_SIZE 0x08 /* each descriptor is 64bit */ +-#define LTQ_DESC_NUM 0x40 /* 64 descriptors / channel */ ++#define LTQ_DESC_NUM 0xC0 /* 192 descriptors / channel */ + + #define LTQ_DMA_OWN BIT(31) /* owner bit */ + #define LTQ_DMA_C BIT(30) /* complete bit */ diff --git a/target/linux/lantiq/patches-5.10/0714-net-lantiq_xrx200-increase-napi-poll-weigth.patch b/target/linux/lantiq/patches-5.10/0714-net-lantiq_xrx200-increase-napi-poll-weigth.patch new file mode 100644 index 0000000000..1fa49f406e --- /dev/null +++ b/target/linux/lantiq/patches-5.10/0714-net-lantiq_xrx200-increase-napi-poll-weigth.patch @@ -0,0 +1,32 @@ +From 768818d772d5d4ddc0c7eb2e62848929270ab7a3 Mon Sep 17 00:00:00 2001 +From: Aleksander Jan Bajkowski +Date: Tue, 4 Jan 2022 16:11:43 +0100 +Subject: [PATCH 714/715] net: lantiq_xrx200: increase napi poll weigth + +NAT Performance results on BT Home Hub 5A (kernel 5.10.89, mtu 1500): + + Down Up +Before 545 Mbps 625 Mbps +After 577 Mbps 648 Mbps + +Signed-off-by: Aleksander Jan Bajkowski +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/lantiq_xrx200.c | 6 ++++-- + 1 file changed, 4 insertions(+), 2 deletions(-) + +--- a/drivers/net/ethernet/lantiq_xrx200.c ++++ b/drivers/net/ethernet/lantiq_xrx200.c +@@ -606,8 +606,10 @@ static int xrx200_probe(struct platform_ + PMAC_HD_CTL); + + /* setup NAPI */ +- netif_napi_add(net_dev, &priv->chan_rx.napi, xrx200_poll_rx, 32); +- netif_tx_napi_add(net_dev, &priv->chan_tx.napi, xrx200_tx_housekeeping, 32); ++ netif_napi_add(net_dev, &priv->chan_rx.napi, xrx200_poll_rx, ++ NAPI_POLL_WEIGHT); ++ netif_tx_napi_add(net_dev, &priv->chan_tx.napi, xrx200_tx_housekeeping, ++ NAPI_POLL_WEIGHT); + + platform_set_drvdata(pdev, priv); + diff --git a/target/linux/lantiq/patches-5.10/0715-net-lantiq_xrx200-convert-to-build_skb.patch b/target/linux/lantiq/patches-5.10/0715-net-lantiq_xrx200-convert-to-build_skb.patch new file mode 100644 index 0000000000..b2b014832c --- /dev/null +++ b/target/linux/lantiq/patches-5.10/0715-net-lantiq_xrx200-convert-to-build_skb.patch @@ -0,0 +1,206 @@ +From e015593573b3e3f74bd8a63c05fa92902194a354 Mon Sep 17 00:00:00 2001 +From: Aleksander Jan Bajkowski +Date: Tue, 4 Jan 2022 16:11:44 +0100 +Subject: [PATCH 715/715] net: lantiq_xrx200: convert to build_skb + +We can increase the efficiency of rx path by using buffers to receive +packets then build SKBs around them just before passing into the network +stack. In contrast, preallocating SKBs too early reduces CPU cache +efficiency. + +NAT Performance results on BT Home Hub 5A (kernel 5.10.89, mtu 1500): + + Down Up +Before 577 Mbps 648 Mbps +After 624 Mbps 695 Mbps + +Signed-off-by: Aleksander Jan Bajkowski +Signed-off-by: Jakub Kicinski +--- + drivers/net/ethernet/lantiq_xrx200.c | 56 ++++++++++++++++++---------- + 1 file changed, 36 insertions(+), 20 deletions(-) + +--- a/drivers/net/ethernet/lantiq_xrx200.c ++++ b/drivers/net/ethernet/lantiq_xrx200.c +@@ -63,7 +63,11 @@ struct xrx200_chan { + + struct napi_struct napi; + struct ltq_dma_channel dma; +- struct sk_buff *skb[LTQ_DESC_NUM]; ++ ++ union { ++ struct sk_buff *skb[LTQ_DESC_NUM]; ++ void *rx_buff[LTQ_DESC_NUM]; ++ }; + + struct sk_buff *skb_head; + struct sk_buff *skb_tail; +@@ -78,6 +82,7 @@ struct xrx200_priv { + struct xrx200_chan chan_rx; + + u16 rx_buf_size; ++ u16 rx_skb_size; + + struct net_device *net_dev; + struct device *dev; +@@ -115,6 +120,12 @@ static int xrx200_buffer_size(int mtu) + return round_up(xrx200_max_frame_len(mtu), 4 * XRX200_DMA_BURST_LEN); + } + ++static int xrx200_skb_size(u16 buf_size) ++{ ++ return SKB_DATA_ALIGN(buf_size + NET_SKB_PAD + NET_IP_ALIGN) + ++ SKB_DATA_ALIGN(sizeof(struct skb_shared_info)); ++} ++ + /* drop all the packets from the DMA ring */ + static void xrx200_flush_dma(struct xrx200_chan *ch) + { +@@ -173,30 +184,29 @@ static int xrx200_close(struct net_devic + return 0; + } + +-static int xrx200_alloc_skb(struct xrx200_chan *ch) ++static int xrx200_alloc_buf(struct xrx200_chan *ch, void *(*alloc)(unsigned int size)) + { +- struct sk_buff *skb = ch->skb[ch->dma.desc]; ++ void *buf = ch->rx_buff[ch->dma.desc]; + struct xrx200_priv *priv = ch->priv; + dma_addr_t mapping; + int ret = 0; + +- ch->skb[ch->dma.desc] = netdev_alloc_skb_ip_align(priv->net_dev, +- priv->rx_buf_size); +- if (!ch->skb[ch->dma.desc]) { ++ ch->rx_buff[ch->dma.desc] = alloc(priv->rx_skb_size); ++ if (!ch->rx_buff[ch->dma.desc]) { + ret = -ENOMEM; + goto skip; + } + +- mapping = dma_map_single(priv->dev, ch->skb[ch->dma.desc]->data, ++ mapping = dma_map_single(priv->dev, ch->rx_buff[ch->dma.desc], + priv->rx_buf_size, DMA_FROM_DEVICE); + if (unlikely(dma_mapping_error(priv->dev, mapping))) { +- dev_kfree_skb_any(ch->skb[ch->dma.desc]); +- ch->skb[ch->dma.desc] = skb; ++ skb_free_frag(ch->rx_buff[ch->dma.desc]); ++ ch->rx_buff[ch->dma.desc] = buf; + ret = -ENOMEM; + goto skip; + } + +- ch->dma.desc_base[ch->dma.desc].addr = mapping; ++ ch->dma.desc_base[ch->dma.desc].addr = mapping + NET_SKB_PAD + NET_IP_ALIGN; + /* Make sure the address is written before we give it to HW */ + wmb(); + skip: +@@ -210,13 +220,14 @@ static int xrx200_hw_receive(struct xrx2 + { + struct xrx200_priv *priv = ch->priv; + struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc]; +- struct sk_buff *skb = ch->skb[ch->dma.desc]; ++ void *buf = ch->rx_buff[ch->dma.desc]; + u32 ctl = desc->ctl; + int len = (ctl & LTQ_DMA_SIZE_MASK); + struct net_device *net_dev = priv->net_dev; ++ struct sk_buff *skb; + int ret; + +- ret = xrx200_alloc_skb(ch); ++ ret = xrx200_alloc_buf(ch, napi_alloc_frag); + + ch->dma.desc++; + ch->dma.desc %= LTQ_DESC_NUM; +@@ -227,19 +238,21 @@ static int xrx200_hw_receive(struct xrx2 + return ret; + } + ++ skb = build_skb(buf, priv->rx_skb_size); ++ skb_reserve(skb, NET_SKB_PAD); + skb_put(skb, len); + + /* add buffers to skb via skb->frag_list */ + if (ctl & LTQ_DMA_SOP) { + ch->skb_head = skb; + ch->skb_tail = skb; ++ skb_reserve(skb, NET_IP_ALIGN); + } else if (ch->skb_head) { + if (ch->skb_head == ch->skb_tail) + skb_shinfo(ch->skb_tail)->frag_list = skb; + else + ch->skb_tail->next = skb; + ch->skb_tail = skb; +- skb_reserve(ch->skb_tail, -NET_IP_ALIGN); + ch->skb_head->len += skb->len; + ch->skb_head->data_len += skb->len; + ch->skb_head->truesize += skb->truesize; +@@ -395,12 +408,13 @@ xrx200_change_mtu(struct net_device *net + struct xrx200_chan *ch_rx = &priv->chan_rx; + int old_mtu = net_dev->mtu; + bool running = false; +- struct sk_buff *skb; ++ void *buff; + int curr_desc; + int ret = 0; + + net_dev->mtu = new_mtu; + priv->rx_buf_size = xrx200_buffer_size(new_mtu); ++ priv->rx_skb_size = xrx200_skb_size(priv->rx_buf_size); + + if (new_mtu <= old_mtu) + return ret; +@@ -416,14 +430,15 @@ xrx200_change_mtu(struct net_device *net + + for (ch_rx->dma.desc = 0; ch_rx->dma.desc < LTQ_DESC_NUM; + ch_rx->dma.desc++) { +- skb = ch_rx->skb[ch_rx->dma.desc]; +- ret = xrx200_alloc_skb(ch_rx); ++ buff = ch_rx->rx_buff[ch_rx->dma.desc]; ++ ret = xrx200_alloc_buf(ch_rx, netdev_alloc_frag); + if (ret) { + net_dev->mtu = old_mtu; + priv->rx_buf_size = xrx200_buffer_size(old_mtu); ++ priv->rx_skb_size = xrx200_skb_size(priv->rx_buf_size); + break; + } +- dev_kfree_skb_any(skb); ++ skb_free_frag(buff); + } + + ch_rx->dma.desc = curr_desc; +@@ -476,7 +491,7 @@ static int xrx200_dma_init(struct xrx200 + ltq_dma_alloc_rx(&ch_rx->dma); + for (ch_rx->dma.desc = 0; ch_rx->dma.desc < LTQ_DESC_NUM; + ch_rx->dma.desc++) { +- ret = xrx200_alloc_skb(ch_rx); ++ ret = xrx200_alloc_buf(ch_rx, netdev_alloc_frag); + if (ret) + goto rx_free; + } +@@ -511,7 +526,7 @@ rx_ring_free: + /* free the allocated RX ring */ + for (i = 0; i < LTQ_DESC_NUM; i++) { + if (priv->chan_rx.skb[i]) +- dev_kfree_skb_any(priv->chan_rx.skb[i]); ++ skb_free_frag(priv->chan_rx.rx_buff[i]); + } + + rx_free: +@@ -528,7 +543,7 @@ static void xrx200_hw_cleanup(struct xrx + + /* free the allocated RX ring */ + for (i = 0; i < LTQ_DESC_NUM; i++) +- dev_kfree_skb_any(priv->chan_rx.skb[i]); ++ skb_free_frag(priv->chan_rx.rx_buff[i]); + } + + static int xrx200_probe(struct platform_device *pdev) +@@ -554,6 +569,7 @@ static int xrx200_probe(struct platform_ + net_dev->min_mtu = ETH_ZLEN; + net_dev->max_mtu = XRX200_DMA_DATA_LEN - xrx200_max_frame_len(0); + priv->rx_buf_size = xrx200_buffer_size(ETH_DATA_LEN); ++ priv->rx_skb_size = xrx200_skb_size(priv->rx_buf_size); + + /* load the memory ranges */ + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); diff --git a/target/linux/lantiq/xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom b/target/linux/lantiq/xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom index e4683af960..c6bacb8d3c 100644 --- a/target/linux/lantiq/xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom +++ b/target/linux/lantiq/xrx200/base-files/etc/hotplug.d/firmware/12-ath9k-eeprom @@ -25,8 +25,8 @@ case "$FIRMWARE" in ;; avm,fritz7412|\ avm,fritz7430) - /usr/bin/fritz_cal_extract -i 1 -s 0x1e000 -e 0x207 -l 4096 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader") || \ - /usr/bin/fritz_cal_extract -i 1 -s 0x1e800 -e 0x207 -l 4096 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader") + /usr/bin/fritz_cal_extract -i 1 -s 0x1e000 -e 0x207 -l 5120 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader") || \ + /usr/bin/fritz_cal_extract -i 1 -s 0x1e800 -e 0x207 -l 5120 -o /lib/firmware/$FIRMWARE $(find_mtd_chardev "urlader") ;; bt,homehub-v5a) caldata_extract_ubi "caldata" 0x1000 0x1000 diff --git a/target/linux/lantiq/xrx200/target.mk b/target/linux/lantiq/xrx200/target.mk index 55299f632f..8813de8d04 100644 --- a/target/linux/lantiq/xrx200/target.mk +++ b/target/linux/lantiq/xrx200/target.mk @@ -10,6 +10,7 @@ DEFAULT_PACKAGES+=kmod-leds-gpio \ kmod-ltq-vdsl-vr9-mei \ kmod-ltq-vdsl-vr9 \ kmod-ltq-atm-vr9 \ + kmod-ltq-deu-vr9 \ kmod-ltq-ptm-vr9 \ ltq-vdsl-app \ dsl-vrx200-firmware-xdsl-a \ diff --git a/target/linux/layerscape/Makefile b/target/linux/layerscape/Makefile index 8b8ca29317..5bdbb5bfcd 100644 --- a/target/linux/layerscape/Makefile +++ b/target/linux/layerscape/Makefile @@ -6,7 +6,7 @@ include $(TOPDIR)/rules.mk BOARD:=layerscape BOARDNAME:=NXP Layerscape -KERNEL_PATCHVER:=5.4 +KERNEL_PATCHVER:=5.10 KERNEL_TESTING_PATCHVER:=5.10 FEATURES:=squashfs nand usb pcie gpio fpu ubifs ext4 rootfs-part boot-part SUBTARGETS:=armv8_64b armv7 diff --git a/target/linux/layerscape/patches-5.4/820-usb-0014-MLK-17380-3-usb-move-EH-SINGLE_STEP_SET_FEATURE-impl.patch b/target/linux/layerscape/patches-5.4/820-usb-0014-MLK-17380-3-usb-move-EH-SINGLE_STEP_SET_FEATURE-impl.patch index f5bf467154..8361a8771c 100644 --- a/target/linux/layerscape/patches-5.4/820-usb-0014-MLK-17380-3-usb-move-EH-SINGLE_STEP_SET_FEATURE-impl.patch +++ b/target/linux/layerscape/patches-5.4/820-usb-0014-MLK-17380-3-usb-move-EH-SINGLE_STEP_SET_FEATURE-impl.patch @@ -20,7 +20,7 @@ Signed-off-by: Peter Chen --- a/drivers/usb/core/hcd.c +++ b/drivers/usb/core/hcd.c -@@ -2104,6 +2104,140 @@ int usb_hcd_get_frame_number (struct usb +@@ -2111,6 +2111,140 @@ int usb_hcd_get_frame_number (struct usb } /*-------------------------------------------------------------------------*/ diff --git a/target/linux/mediatek/Makefile b/target/linux/mediatek/Makefile index fb2951cc9b..466fe6dee2 100644 --- a/target/linux/mediatek/Makefile +++ b/target/linux/mediatek/Makefile @@ -6,7 +6,7 @@ ARCH:=arm BOARD:=mediatek BOARDNAME:=MediaTek Ralink ARM SUBTARGETS:=mt7622 mt7623 mt7629 -FEATURES:=dt-overlay emmc fpu gpio nand pci pcie separate_ramdisk squashfs usb +FEATURES:=dt-overlay emmc fpu gpio nand pci pcie rootfs-part separate_ramdisk squashfs usb KERNEL_PATCHVER:=5.10 diff --git a/target/linux/mediatek/base-files/etc/uci-defaults/99_fwenv-store-ethaddr.sh b/target/linux/mediatek/base-files/etc/uci-defaults/99_fwenv-store-ethaddr.sh new file mode 100644 index 0000000000..b078b8f8ce --- /dev/null +++ b/target/linux/mediatek/base-files/etc/uci-defaults/99_fwenv-store-ethaddr.sh @@ -0,0 +1,14 @@ +[ ! -e /etc/fw_env.config ] && exit 0 + +. /lib/functions.sh + +case "$(board_name)" in +bananapi,bpi-r2|\ +bananapi,bpi-r64|\ +unielec,u7623-02) + [ -z "$(fw_printenv -n ethaddr 2>/dev/null)" ] && + fw_setenv ethaddr "$(cat /sys/class/net/eth0/address)" + ;; +esac + +exit 0 diff --git a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts index 822ca3fd49..609bb8f109 100644 --- a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts +++ b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc-512m.dts @@ -4,11 +4,15 @@ */ /dts-v1/; -#include "mt7623a-unielec-u7623-02-emmc.dtsi" +#include "mt7623a-unielec-u7623-02.dtsi" / { - model = "UniElec U7623-02 eMMC (512M RAM)"; - compatible = "unielec,u7623-02-emmc-512m", "unielec,u7623-02-emmc", "mediatek,mt7623"; + model = "UniElec U7623-02 eMMC (legacy loader, 512M RAM)"; + compatible = "unielec,u7623-02-emmc-512m", "unielec,u7623-02", "mediatek,mt7623"; + + chosen { + bootargs = "root=/dev/mmcblk0p2 rootfstype=squashfs,f2fs console=ttyS0,115200 blkdevparts=mmcblk0:3M@6M(recovery),256M@9M(root)"; + }; memory@80000000 { device_type = "memory"; diff --git a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dts b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dts new file mode 100644 index 0000000000..bcd81ba6da --- /dev/null +++ b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dts @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Copyright 2018 Kristian Evensen + */ + +/dts-v1/; +#include "mt7623a-unielec-u7623-02.dtsi" + +/ { + model = "UniElec U7623-02 eMMC"; + compatible = "unielec,u7623-02", "mediatek,mt7623"; +}; diff --git a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi similarity index 95% rename from target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi rename to target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi index 1c5a18de02..50c7f3e88e 100644 --- a/target/linux/mediatek/dts/mt7623a-unielec-u7623-02-emmc.dtsi +++ b/target/linux/mediatek/dts/mt7623a-unielec-u7623-02.dtsi @@ -8,15 +8,20 @@ #include "mt6323.dtsi" / { - compatible = "unielec,u7623-02-emmc", "mediatek,mt7623"; + compatible = "unielec,u7623-02", "mediatek,mt7623"; aliases { - serial2 = &uart2; + serial0 = &uart2; + ethernet0 = &gmac0; + mmc0 = &mmc0; + led-boot = &led3_green; + led-failsafe = &led3_green; + led-running = &led3_green; + led-upgrade = &led3_green; }; chosen { - bootargs = "root=/dev/mmcblk0p2 rootfstype=squashfs,f2fs console=ttyS0,115200 blkdevparts=mmcblk0:3M@6M(recovery),256M@9M(root)"; - stdout-path = "serial2:115200n8"; + stdout-path = "serial0:115200n8"; }; cpus { @@ -81,7 +86,7 @@ pinctrl-names = "default"; pinctrl-0 = <&led_pins_unielec>; - led3 { + led3_green: led3 { label = "u7623-01:green:led3"; gpios = <&pio 14 GPIO_ACTIVE_LOW>; }; diff --git a/target/linux/mediatek/image/Config.in b/target/linux/mediatek/image/Config.in deleted file mode 100644 index 63329d386a..0000000000 --- a/target/linux/mediatek/image/Config.in +++ /dev/null @@ -1,4 +0,0 @@ -config MTK_BOOT_PARTSIZE - int "Boot (SD Card/eMMC) filesystem partition size (in MiB)" - depends on TARGET_mediatek_mt7623_DEVICE_unielec_u7623-emmc || TARGET_DEVICE_mediatek_mt7623_DEVICE_unielec_u7623-emmc - default 32 diff --git a/target/linux/mediatek/image/Makefile b/target/linux/mediatek/image/Makefile index 7aa7a7285c..4c17e5845a 100644 --- a/target/linux/mediatek/image/Makefile +++ b/target/linux/mediatek/image/Makefile @@ -6,17 +6,7 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/image.mk -define Build/sysupgrade-emmc - rm -f $@.recovery - mkfs.fat -C $@.recovery 3070 - - ./gen_$(SUBTARGET)_emmc_img.sh $@ \ - $(IMAGE_KERNEL) \ - $@.recovery \ - $(IMAGE_ROOTFS) -endef - -# default all platform image(fit) build +# default all platform image(fit) build define Device/Default PROFILES = Default $$(DEVICE_NAME) KERNEL_NAME := Image diff --git a/target/linux/mediatek/image/gen_mt7623_emmc_img.sh b/target/linux/mediatek/image/gen_mt7623_emmc_img.sh deleted file mode 100755 index b9eedf80b4..0000000000 --- a/target/linux/mediatek/image/gen_mt7623_emmc_img.sh +++ /dev/null @@ -1,30 +0,0 @@ -#!/bin/sh -# -# This script is used only to create the "legacy" image for UniElec U7623, -# suitable for upgrading from the vendor OpenWrt or from OpenWrt 19.07. -# -OUTPUT_FILE=$1 -KERNEL_FILE=$2 -RECOVERY_FILE=$3 -ROOTFS_FILE=$4 - -BS=512 - -# These two offsets are relative to the absolute location of the kernel on the mmc -# (0xA00), so their position in the image is -2560 blocks -# -# They must be kept in sync with the default command line for U7623. -# blkdevparts=mmcblk0:3M@6M(recovery),256M@9M(root)" -# -# For upgrading from the vendor firmware, the total image must fit in its -# MTD 'firmware' partition, which is typically 36MiB. - -# In the legacy image, the uImage starts at block 0xa00. Allow 4864 KiB (9728) blocks. -RECOVERY_OFFSET=9728 -# The recovery image is 3MiB, or 6144 blocks. -ROOTFS_OFFSET=15872 - -dd bs="$BS" of="$OUTPUT_FILE" if="$KERNEL_FILE" -dd bs="$BS" of="$OUTPUT_FILE" if="$RECOVERY_FILE" seek="$RECOVERY_OFFSET" -dd bs="$BS" of="$OUTPUT_FILE" if="$ROOTFS_FILE" seek="$ROOTFS_OFFSET" -dd if=/dev/zero of="$OUTPUT_FILE" bs=128k count=1 oflag=append conv=notrunc diff --git a/target/linux/mediatek/image/gen_mtk_mmc_img.sh b/target/linux/mediatek/image/gen_mtk_mmc_img.sh deleted file mode 100755 index 7e19e1a39e..0000000000 --- a/target/linux/mediatek/image/gen_mtk_mmc_img.sh +++ /dev/null @@ -1,147 +0,0 @@ -#!/bin/bash -# SPDX-License-Identifier: GPL-2.0-only -# -# Copyright © 2019 Alexey Loukianov -# Copyright © 2020 David Woodhouse - -# Generates a bootable SD card image for Banana Pi R2 (and probably -# other similar boards) as documented at -# http://www.fw-web.de/dokuwiki/doku.php?id=en:bpi-r2:storage -# -# The first sector must contain the SDMMC_BOOT header shown -# below, and also contains the MBR partition table in the end -# of the sector. The partition table must contain no active -# partitions. -# -# The second sector must contain the BRLYT header, and the -# special preloader image goes in sector 4; 2KiB into the image. -# -# The preloader loads U-Boot from sector 640; 320KiB into the image. -# The location and the size (512KiB) are fixed and not read from -# the partition table. We set up a partition for it merely for -# our own convenience for upgrades, etc. -# -# The second partition is a FAT file system containing the kernel -# image and a uboot.env file, which is provided to this script as -# $4 (bootfs image). Its size is configurable with the -# CONFIG_MTK_BOOT_PARTSIZE option; by default 32MiB. -# -# The root filesystem comes next in the third partition. -# -# -# ------------------------ Sector Offset -# | MBR + SDMMC_BOOT | 0 0x0 -# |----------------------| -# | BRLYT header | 1 0x200 -# |----------------------| -# . . -# . . -# |----------------------| -# | | 4 0x800 -# | | -# | Preloader | -# . . -# . . -# | | 639 -# |----------------------| -# | MBR partition #1 | 640 0x50000 -# | | -# | U-Boot | -# . . -# . . -# | | 1663 -# |----------------------| -# | MBR partition #2 | -# | | -# | FAT partition | ( MTK_BOOT_PARTSIZE -# . . default 32MiB ) -# . (kernel, uEnv) . -# | | -# |----------------------| -# | MBR partition #3 | -# | | -# | Root partition | -# | | ( TARGET_ROOTFS_PARTSIZE -# | (squashfs+overlay | default 104MiB ) -# . or ext4, etc.) . -# . . -# | | -# ------------------------ -# -# For eMMC boot, everything up to and including the preloader must be -# written to /dev/mmcblk0boot0, with the SDMMC_BOOT header changed to -# read EMMC_BOOT\0 instead. -# -# The contents of the main eMMC are identical to the SD card layout, -# with the preloader loading 512KiB of U-Boot starting at 0x50000. - -usage() { - echo "SYNTAX: $0 sd " - echo " OR: $0 emmc " - exit 1 -} - -set -e - -PRELOADER_OFFSET=2 # 2KiB - -SDMMC_BOOT="SDMMC_BOOT\x00\x00\x01\x00\x00\x00\x00\x02\x00\x00" -EMMC_BOOT="EMMC_BOOT\x00\x00\x00\x01\x00\x00\x00\x00\x02\x00\x00" -BRLYT="BRLYT\x00\x00\x00\x01\x00\x00\x00\x00\x08\x00\x00\ -\x00\x08\x00\x00\x42\x42\x42\x42\x08\x00\x01\x00\x00\x08\x00\x00\ -\x00\x08\x00\x00\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00" - -case $1 in - sd) - [ $# -eq 9 ] || usage - OUTPUT="$2" - PRELOADER="$3" - UBOOT="$4" - UBOOTOFS="$5" - BOOTFS="$6" - ROOTFS="$7" - BOOTFSSIZE="$8" - ROOTFSSIZE="$9" - - head=4 - sect=63 - - set $(ptgen -o $OUTPUT -h $head -s $sect -a 0 -l 1024 \ - -t 41 -p 512k@${UBOOTOFS} \ - -t c -p ${BOOTFSSIZE}M \ - -t 83 -p ${ROOTFSSIZE}M ) - - UBOOT_OFFSET="$(($1 / 512))" - UBOOT_SIZE="$(($2 / 512))" - BOOTFS_OFFSET="$(($3 / 512))" - BOOTFS_SIZE="$(($4 / 512))" - ROOTFS_OFFSET="$(($5 / 512))" - ROOTFS_SIZE="$(($6 / 512))" - - echo -en "${SDMMC_BOOT}" | dd bs=1 of="${OUTPUT}" seek=0 conv=notrunc - echo -en "${BRLYT}" | dd bs=1 of="${OUTPUT}" seek=512 conv=notrunc - - # For eMMC-only boards like U7623 the preloader doesn't need to be included in the - # main image as it's only ever needed in the eMMC boot partition. - if [ -r ${PRELOADER} ]; then - dd bs=1024 if="${PRELOADER}" of="${OUTPUT}" seek="${PRELOADER_OFFSET}" conv=notrunc - fi - dd bs=512 if="${UBOOT}" of="${OUTPUT}" seek="${UBOOT_OFFSET}" conv=notrunc - dd bs=512 if="${BOOTFS}" of="${OUTPUT}" seek="${BOOTFS_OFFSET}" conv=notrunc - dd bs=512 if="${ROOTFS}" of="${OUTPUT}" seek="${ROOTFS_OFFSET}" conv=notrunc - dd bs=128k if=/dev/zero of="${OUTPUT}" count=1 oflag=append conv=notrunc - ;; - emmc) - [ $# -eq 3 ] || usage - OUTPUT="$2" - PRELOADER="$3" - - echo -en "${EMMC_BOOT}" | dd bs=1 of="${OUTPUT}" seek=0 - echo -en "${BRLYT}" | dd bs=1 of="${OUTPUT}" seek=512 conv=notrunc - - dd bs=1024 if="${PRELOADER}" of="${OUTPUT}" seek="${PRELOADER_OFFSET}" conv=notrunc - ;; - *) - usage - ;; -esac diff --git a/target/linux/mediatek/image/mt7622.mk b/target/linux/mediatek/image/mt7622.mk index 3b0afa98df..3517748510 100644 --- a/target/linux/mediatek/image/mt7622.mk +++ b/target/linux/mediatek/image/mt7622.mk @@ -48,10 +48,10 @@ define Build/mt7622-gpt -N recovery -r -p 32M@6M \ $(if $(findstring sdmmc,$1), \ -N install -r -p 7M@38M \ - -t 0x2e -N production -p 211M@45M \ + -t 0x2e -N production -p $(CONFIG_TARGET_ROOTFS_PARTSIZE)M@45M \ ) \ $(if $(findstring emmc,$1), \ - -t 0x2e -N production -p 980M@40M \ + -t 0x2e -N production -p $(CONFIG_TARGET_ROOTFS_PARTSIZE)M@40M \ ) cat $@.tmp >> $@ rm $@.tmp diff --git a/target/linux/mediatek/image/mt7623.mk b/target/linux/mediatek/image/mt7623.mk index 9a938662c3..89c771e5a0 100644 --- a/target/linux/mediatek/image/mt7623.mk +++ b/target/linux/mediatek/image/mt7623.mk @@ -1,5 +1,5 @@ KERNEL_LOADADDR := 0x80008000 -DEVICE_VARS += UBOOT_TARGET UBOOT_OFFSET UBOOT_ENVSIZE +DEVICE_VARS += UBOOT_TARGET UBOOT_OFFSET UBOOT_IMAGE # The bootrom of MT7623 expects legacy MediaTek headers present in # exactly the location also used for the primary GPT partition table. @@ -55,13 +55,13 @@ DEVICE_VARS += UBOOT_TARGET UBOOT_OFFSET UBOOT_ENVSIZE define Build/mt7623-mbr cp $@ $@.tmp 2>/dev/null || true ptgen -o $@.tmp -h 4 -s 63 -a 0 -l 1024 \ - -t 0x41 -N uboot -p 3584k@320k \ + -t 0x41 -N uboot -p 1M@$(UBOOT_OFFSET) \ -t 0xea -N recovery -p 40M@4M \ $(if $(findstring sdmmc,$1), \ - -t 0x2e -N production -p 208M@48M \ + -t 0x2e -N production -p $(CONFIG_TARGET_ROOTFS_PARTSIZE)M@48M \ ) \ $(if $(findstring emmc,$1), \ - -t 0x2e -N production -p 976M@48M \ + -t 0x2e -N production -p $(CONFIG_TARGET_ROOTFS_PARTSIZE)M@48M \ ) echo -en \ @@ -81,63 +81,7 @@ define Build/append-preloader endef define Build/append-bootloader - cat $(STAGING_DIR_IMAGE)/$1-u-boot.bin >> $@ -endef - -define Device/bananapi_bpi-r2 - DEVICE_VENDOR := Bananapi - DEVICE_MODEL := BPi-R2 - DEVICE_DTS := mt7623n-bananapi-bpi-r2 - DEVICE_PACKAGES := mkf2fs e2fsprogs kmod-usb3 kmod-ata-ahci - UBOOT_ENVSIZE := 0x10000 - UBOOT_OFFSET := 320k - UBOOT_TARGET := mt7623n_bpir2 - UBOOT_PATH := $(STAGING_DIR_IMAGE)/mt7623n_bpir2-u-boot.bin - IMAGES := sysupgrade.itb - KERNEL := kernel-bin | gzip - KERNEL_INITRAMFS_SUFFIX := -recovery.itb - KERNEL_INITRAMFS := kernel-bin | gzip | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb with-initrd - IMAGE/sysupgrade.itb := append-kernel | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb external-static-with-rootfs | append-metadata - ARTIFACT/preloader.bin := append-preloader $$(UBOOT_TARGET) - ARTIFACT/u-boot.bin := append-uboot - ARTIFACT/sdcard.img.gz := mt7623-mbr sdmmc |\ - pad-to 2k | append-preloader $$(UBOOT_TARGET) |\ - pad-to 320k | append-bootloader $$(UBOOT_TARGET) |\ - pad-to 4092k | mt7623-mbr emmc |\ - pad-to 4M | append-image-stage initramfs-recovery.itb |\ - pad-to 48M | append-image squashfs-sysupgrade.itb |\ - gzip - ARTIFACTS = u-boot.bin preloader.bin scatter.txt sdcard.img.gz - SUPPORTED_DEVICES := bananapi,bpi-r2 -endef -TARGET_DEVICES += bananapi_bpi-r2 - - -ifneq ($(CONFIG_MTK_BOOT_PARTSIZE),) -BOOTFS_BLOCK_SIZE := 1024 -BOOTFS_BLOCKS := $(shell echo $$(($(CONFIG_MTK_BOOT_PARTSIZE)*1024*1024/$(BOOTFS_BLOCK_SIZE)))) -endif - -define Build/mtk-mmc-img - rm -f $@.boot - mkfs.fat -C $@.boot $(BOOTFS_BLOCKS) - - if [ -r $(STAGING_DIR_IMAGE)/$(UBOOT_TARGET)-preloader.bin ]; then \ - ./gen_mtk_mmc_img.sh emmc $@.emmc \ - $(STAGING_DIR_IMAGE)/$(UBOOT_TARGET)-preloader.bin; \ - mcopy -i $@.boot $@.emmc ::eMMCboot.bin; \ - fi - mkenvimage -s $(UBOOT_ENVSIZE) -o $(STAGING_DIR_IMAGE)/$(UBOOT_TARGET)-uboot.env $(UBOOT_TARGET)-uEnv.txt - mcopy -i $@.boot $(STAGING_DIR_IMAGE)/$(UBOOT_TARGET)-uboot.env ::uboot.env - mcopy -i $@.boot $(IMAGE_KERNEL) ::uImage - ./gen_mtk_mmc_img.sh sd $@ \ - $(STAGING_DIR_IMAGE)/$(UBOOT_TARGET)-preloader.bin \ - $(STAGING_DIR_IMAGE)/$(UBOOT_TARGET)-u-boot*.bin \ - $(UBOOT_OFFSET) \ - $@.boot \ - $(IMAGE_ROOTFS) \ - $(CONFIG_MTK_BOOT_PARTSIZE) \ - 104 + cat $(STAGING_DIR_IMAGE)/$1-$(UBOOT_IMAGE) >> $@ endef define Build/scatterfile @@ -145,28 +89,74 @@ define Build/scatterfile $(subst -scatter.txt,,$(notdir $@)) "$(DEVICE_TITLE)" > $@ endef +define Device/bananapi_bpi-r2 + DEVICE_VENDOR := Bananapi + DEVICE_MODEL := BPi-R2 + DEVICE_DTS := mt7623n-bananapi-bpi-r2 + DEVICE_PACKAGES := mkf2fs e2fsprogs kmod-usb3 kmod-ata-ahci + UBOOT_OFFSET := 320k + UBOOT_TARGET := mt7623n_bpir2 + UBOOT_IMAGE := u-boot.bin + UBOOT_PATH := $(STAGING_DIR_IMAGE)/$$(UBOOT_TARGET)-$$(UBOOT_IMAGE) + IMAGES := sysupgrade.itb + KERNEL := kernel-bin | gzip + KERNEL_INITRAMFS_SUFFIX := -recovery.itb + KERNEL_INITRAMFS := kernel-bin | gzip | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb with-initrd + IMAGE/sysupgrade.itb := append-kernel | fit gzip $$(DTS_DIR)/$$(DEVICE_DTS).dtb external-static-with-rootfs | append-metadata + ARTIFACT/preloader.bin := mt7623-mbr emmc |\ + pad-to 2k | append-preloader $$(UBOOT_TARGET) + ARTIFACT/u-boot.bin := append-uboot + ARTIFACT/sdcard.img.gz := mt7623-mbr sdmmc |\ + pad-to 2k | append-preloader $$(UBOOT_TARGET) |\ + pad-to $$(UBOOT_OFFSET) | append-bootloader $$(UBOOT_TARGET) |\ + pad-to 4092k | mt7623-mbr emmc |\ + pad-to 4M | append-image-stage initramfs-recovery.itb |\ + pad-to 48M | append-image squashfs-sysupgrade.itb |\ + gzip + ARTIFACTS := u-boot.bin preloader.bin sdcard.img.gz + SUPPORTED_DEVICES := bananapi,bpi-r2 +endef +TARGET_DEVICES += bananapi_bpi-r2 -# Full eMMC image including U-Boot and partition table -define Device/unielec_u7623-emmc +define Device/unielec_u7623-02 DEVICE_VENDOR := UniElec - DEVICE_MODEL := U7623 - DEVICE_VARIANT := eMMC + DEVICE_MODEL := U7623-02 # When we use FIT images, U-Boot will populate the /memory node with the correct # memory size discovered from the preloader, so we don't need separate builds. - DEVICE_DTS := mt7623a-unielec-u7623-02-emmc-512m + DEVICE_DTS := mt7623a-unielec-u7623-02 DEVICE_DTS_DIR := ../dts - SUPPORTED_DEVICES := unielec,u7623-02-emmc-512m - UBOOT_ENVSIZE := 0x1000 + DEVICE_PACKAGES := kmod-fs-vfat kmod-nls-cp437 kmod-nls-iso8859-1 kmod-mmc \ + mkf2fs e2fsprogs kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci UBOOT_OFFSET := 256k UBOOT_TARGET := mt7623a_unielec_u7623 - IMAGES := img.gz - IMAGE/img.gz := mtk-mmc-img | gzip | append-metadata - DEVICE_PACKAGES := kmod-fs-vfat kmod-nls-cp437 kmod-nls-iso8859-1 kmod-mmc \ - mkf2fs e2fsprogs kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk - ARTIFACT/scatter.txt := scatterfile $$(firstword $$(FILESYSTEMS))-$$(firstword $$(IMAGES)) - ARTIFACTS := scatter.txt + UBOOT_IMAGE := u-boot-mtk.bin + UBOOT_PATH := $(STAGING_DIR_IMAGE)/$$(UBOOT_TARGET)-$$(UBOOT_IMAGE) + IMAGES := sysupgrade.itb + KERNEL := kernel-bin | gzip + KERNEL_INITRAMFS_SUFFIX := -recovery.itb + KERNEL_INITRAMFS := kernel-bin | gzip | fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd + IMAGE/sysupgrade.itb := append-kernel | fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-static-with-rootfs | append-metadata + ARTIFACT/u-boot.bin := append-uboot +# vendor Preloader seems not to care about SDMMC_BOOT/EMMC_BOOT header, +# but OpenWrt expects 'SDMM' magic for sysupgrade. + ARTIFACT/emmc.img.gz := mt7623-mbr sdmmc |\ + pad-to $$(UBOOT_OFFSET) | append-bootloader $$(UBOOT_TARGET) |\ + pad-to 4M | append-image-stage initramfs-recovery.itb |\ + pad-to 48M | append-image squashfs-sysupgrade.itb |\ + gzip | append-metadata + ARTIFACT/scatter.txt := scatterfile emmc.img.gz + ARTIFACTS := u-boot.bin scatter.txt emmc.img.gz + SUPPORTED_DEVICES += unielec,u7623-02-emmc-512m +endef +TARGET_DEVICES += unielec_u7623-02 + + +# Legacy helper for U7623 board +define Build/fat-recovery-fs + rm -f $@.recovery + mkfs.fat -C $@.recovery 3070 + cat $@.recovery >> $@ endef -TARGET_DEVICES += unielec_u7623-emmc # Legacy partial image for U7623 # This preserves the vendor U-Boot and starts with a uImage at 0xA00 @@ -180,9 +170,13 @@ define Device/unielec_u7623-02-emmc-512m-legacy KERNEL := kernel-bin | append-dtb | uImage none KERNEL_INITRAMFS := kernel-bin | append-dtb | uImage none DEVICE_PACKAGES := kmod-fs-vfat kmod-nls-cp437 kmod-nls-iso8859-1 kmod-mmc \ - mkf2fs e2fsprogs kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk - IMAGES := sysupgrade-emmc.bin.gz - IMAGE/sysupgrade-emmc.bin.gz := sysupgrade-emmc | gzip | append-metadata + mkf2fs e2fsprogs kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk \ + partx-utils + IMAGES := sysupgrade.bin.gz + IMAGE/sysupgrade.bin.gz := append-kernel |\ + pad-to 4864k | fat-recovery-fs |\ + pad-to 7936k | append-rootfs |\ + gzip | append-metadata SUPPORTED_DEVICES := unielec,u7623-02-emmc-512m endef TARGET_DEVICES += unielec_u7623-02-emmc-512m-legacy diff --git a/target/linux/mediatek/image/mt7623a_unielec_u7623-uEnv.txt b/target/linux/mediatek/image/mt7623a_unielec_u7623-uEnv.txt deleted file mode 100644 index 5e5f8cae73..0000000000 --- a/target/linux/mediatek/image/mt7623a_unielec_u7623-uEnv.txt +++ /dev/null @@ -1,20 +0,0 @@ -# Boot menu for UniElec U7623 -# Copyright © 2020 David Woodhouse - -kernel=uImage -loadaddr=0x88000000 -dtaddr=0x83f00000 -fdt_high=0xafffffff - -console=ttyS0,115200 -bootopts=rootfstype=squashfs,ext4 rootwait - -# Create the command line (with appropriate root=) and boot the Linux FIT image. -boot1=setenv bootargs "console=${console} root=${rootdev} ${bootopts}";printenv bootargs;\ - fatload mmc ${partition} ${loadaddr} ${kernel}; bootm - -bootmenu_0=Boot from eMMC.=setenv partition 0:2;setenv rootdev /dev/mmcblk0p3;run boot1 -bootmenu_default=0 - -bootdelay=0 -bootcmd=bootmenu diff --git a/target/linux/mediatek/mt7623/base-files/etc/board.d/02_network b/target/linux/mediatek/mt7623/base-files/etc/board.d/02_network index 2006248530..aeab04001a 100644 --- a/target/linux/mediatek/mt7623/base-files/etc/board.d/02_network +++ b/target/linux/mediatek/mt7623/base-files/etc/board.d/02_network @@ -9,6 +9,7 @@ mediatek_setup_interfaces() case $board in bananapi,bpi-r2|\ + unielec,u7623-02|\ unielec,u7623-02-emmc-512m) ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" "wan" ;; @@ -20,6 +21,8 @@ mediatek_setup_macs() local board="$1" case $board in + bananapi,bpi-r2|\ + unielec,u7623-02|\ unielec,u7623-02-emmc-512m) ucidef_set_interface_macaddr "wan" "$(cat /sys/class/net/wan/address)" ;; diff --git a/target/linux/mediatek/mt7623/base-files/lib/preinit/07_set_iface_mac b/target/linux/mediatek/mt7623/base-files/lib/preinit/07_set_iface_mac index 7b165df565..424fe50be2 100644 --- a/target/linux/mediatek/mt7623/base-files/lib/preinit/07_set_iface_mac +++ b/target/linux/mediatek/mt7623/base-files/lib/preinit/07_set_iface_mac @@ -42,22 +42,8 @@ preinit_set_mac_address() { local rootpart case $(board_name) in - bananapi,bpi-r2|\ unielec,u7623-02-emmc-512m) - rootpart=$(cat /proc/cmdline) - rootpart="${rootpart##*root=}" - rootpart="${rootpart%% *}" - case $rootpart in - /dev/mmcblk0p2) # Legacy U7623 image - set_recovery_mac_address /dev/mmcblk0p1 - ;; - /dev/mmcblk0p3) # U7623 or Banana Pi R2 eMMC - set_recovery_mac_address /dev/mmcblk0p2 - ;; - /dev/mmcblk1p3) # Banana Pi R2 SD - set_recovery_mac_address /dev/mmcblk1p2 - ;; - esac + set_recovery_mac_address /dev/mmcblk0p1 ;; esac } diff --git a/target/linux/mediatek/mt7623/base-files/lib/upgrade/platform.sh b/target/linux/mediatek/mt7623/base-files/lib/upgrade/platform.sh index 452a533db0..e885f460e9 100755 --- a/target/linux/mediatek/mt7623/base-files/lib/upgrade/platform.sh +++ b/target/linux/mediatek/mt7623/base-files/lib/upgrade/platform.sh @@ -2,8 +2,8 @@ REQUIRE_IMAGE_METADATA=1 RAMFS_COPY_BIN='fwtool' -# Full system upgrade including preloader for MediaTek SoCs on eMMC or SD -mtk_mmc_full_upgrade() { +# Legacy full system upgrade including preloader for MediaTek SoCs on eMMC or SD +legacy_mtk_mmc_full_upgrade() { local diskdev partdev diff oldrecovery if grep -q root=/dev/mmcblk0p2 /proc/cmdline; then @@ -26,7 +26,7 @@ mtk_mmc_full_upgrade() { fi sync - if [ "$SAVE_PARTITIONS" = "1" ]; then + if [ "$UPGRADE_OPT_SAVE_PARTITIONS" = "1" ]; then get_partitions "/dev/$diskdev" bootdisk #extract the boot sector from the image @@ -83,18 +83,18 @@ platform_do_upgrade() { local board=$(board_name) case "$board" in - bananapi,bpi-r2) + bananapi,bpi-r2|\ + unielec,u7623-02) export_bootdevice export_partdevice fitpart 3 [ "$fitpart" ] || return 1 EMMC_KERN_DEV="/dev/$fitpart" emmc_do_upgrade "$1" ;; - unielec,u7623-02-emmc-512m) local magic="$(get_magic_long "$1")" if [ "$magic" = "53444d4d" ]; then - mtk_mmc_full_upgrade "$1" + legacy_mtk_mmc_full_upgrade "$1" else # Old partial image starting with uImage # Keep the persistent random mac address (if it exists) recoverydev=mmcblk0p1 @@ -120,17 +120,14 @@ platform_do_upgrade() { esac } -PART_NAME=firmware - platform_check_image() { - local board=$(board_name) local magic="$(get_magic_long "$1")" - local diskdev partdev diff [ "$#" -gt 1 ] && return 1 - case "$board" in - bananapi,bpi-r2) + case "$(board_name)" in + bananapi,bpi-r2|\ + unielec,u7623-02) [ "$magic" != "d00dfeed" ] && { echo "Invalid image type." return 1 @@ -140,19 +137,17 @@ platform_check_image() { # Can always upgrade to the new-style full image [ "$magic" = "53444d4d" ] && return 0 + # need to update to new bootchain via full image first + [ "$magic" = "d00dfeed" ] && { + echo "Please use full eMMC image to update bootloader first." + return 1 + } + # Legacy uImage directly at 0xA00 on the eMMC. [ "$magic" != "27051956" ] && { echo "Invalid image type." return 1 } - rootpart=$(cat /proc/cmdline) - rootpart="${rootpart##*root=}" - rootpart="${rootpart%% *}" - [ "$rootpart" != "/dev/mmcblk0p2" ] && { - echo "Cannot downgrade to legacy image." - return 1 - } - return 0 ;; *) echo "Sysupgrade is not supported on your board yet." @@ -165,7 +160,8 @@ platform_check_image() { platform_copy_config() { case "$(board_name)" in - bananapi,bpi-r2) + bananapi,bpi-r2|\ + unielec,u7623-02) emmc_copy_config ;; unielec,u7623-02-emmc-512m) diff --git a/target/linux/mediatek/mt7623/config-5.10 b/target/linux/mediatek/mt7623/config-5.10 index 054c724255..4155a39bdd 100644 --- a/target/linux/mediatek/mt7623/config-5.10 +++ b/target/linux/mediatek/mt7623/config-5.10 @@ -392,7 +392,6 @@ CONFIG_MODULES_USE_ELF_REL=y # CONFIG_MOUSE_PS2 is not set # CONFIG_MOUSE_SERIAL is not set # CONFIG_MOUSE_VSXXXAA is not set -CONFIG_MTD_BLOCK2MTD=y CONFIG_MTD_CMDLINE_PARTS=y # CONFIG_MTD_NAND_MTK_BMT is not set # CONFIG_MTD_PARSER_TRX is not set diff --git a/target/linux/mpc85xx/image/Makefile b/target/linux/mpc85xx/image/Makefile index b9582a2552..2b81884032 100644 --- a/target/linux/mpc85xx/image/Makefile +++ b/target/linux/mpc85xx/image/Makefile @@ -3,10 +3,6 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/image.mk -define Build/copy-file - cat "$(1)" > "$@" -endef - define Device/Default PROFILES := Default DEVICE_DTS := $(lastword $(subst _, ,$(1))) diff --git a/target/linux/mvebu/config-5.10 b/target/linux/mvebu/config-5.10 index 1017ee5eed..86d8784c74 100644 --- a/target/linux/mvebu/config-5.10 +++ b/target/linux/mvebu/config-5.10 @@ -53,6 +53,7 @@ CONFIG_ATA_LEDS=y CONFIG_AUTO_ZRELADDR=y CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_NVME=y CONFIG_BLK_DEV_SD=y CONFIG_BLK_MQ_PCI=y CONFIG_BLK_SCSI_REQUEST=y @@ -290,6 +291,10 @@ CONFIG_NLS=y CONFIG_NOP_USB_XCEIV=y CONFIG_NR_CPUS=4 CONFIG_NVMEM=y +CONFIG_NVME_CORE=y +# CONFIG_NVME_HWMON is not set +# CONFIG_NVME_MULTIPATH is not set +# CONFIG_NVME_TCP is not set CONFIG_OF=y CONFIG_OF_ADDRESS=y CONFIG_OF_EARLY_FLATTREE=y @@ -320,7 +325,7 @@ CONFIG_PHYLIB=y CONFIG_PHYLINK=y # CONFIG_PHY_MVEBU_A3700_COMPHY is not set # CONFIG_PHY_MVEBU_A3700_UTMI is not set -CONFIG_PHY_MVEBU_A38X_COMPHY=y +# CONFIG_PHY_MVEBU_A38X_COMPHY is not set # CONFIG_PHY_MVEBU_CP110_COMPHY is not set CONFIG_PINCTRL=y CONFIG_PINCTRL_ARMADA_370=y @@ -332,6 +337,9 @@ CONFIG_PJ4B_ERRATA_4742=y CONFIG_PL310_ERRATA_753970=y CONFIG_PLAT_ORION=y CONFIG_PM_OPP=y +CONFIG_POWER_RESET=y +CONFIG_POWER_RESET_GPIO=y +# CONFIG_POWER_RESET_QNAP is not set CONFIG_PRINTK_SAFE_LOG_BUF_SHIFT=11 CONFIG_PWM=y CONFIG_PWM_SYSFS=y @@ -345,7 +353,7 @@ CONFIG_RFS_ACCEL=y CONFIG_RPS=y CONFIG_RTC_CLASS=y CONFIG_RTC_DRV_ARMADA38X=y -CONFIG_RTC_DRV_MV=y +# CONFIG_RTC_DRV_MV is not set CONFIG_RTC_I2C_AND_SPI=y CONFIG_RTC_MC146818_LIB=y CONFIG_RWSEM_SPIN_ON_OWNER=y diff --git a/target/linux/mvebu/cortexa53/config-5.10 b/target/linux/mvebu/cortexa53/config-5.10 index 78373ad732..79f815b6d2 100644 --- a/target/linux/mvebu/cortexa53/config-5.10 +++ b/target/linux/mvebu/cortexa53/config-5.10 @@ -18,6 +18,8 @@ CONFIG_ARM64_TAGGED_ADDR_ABI=y CONFIG_ARM64_VA_BITS=39 CONFIG_ARM64_VA_BITS_39=y CONFIG_ARMADA_37XX_CLK=y +CONFIG_ARMADA_37XX_WATCHDOG=y +CONFIG_ARMADA_37XX_RWTM_MBOX=y CONFIG_ARMADA_AP806_SYSCON=y CONFIG_ARMADA_AP_CP_HELPER=y CONFIG_ARMADA_CP110_SYSCON=y @@ -40,6 +42,8 @@ CONFIG_GENERIC_CSUM=y CONFIG_GENERIC_PINCONF=y CONFIG_HOLES_IN_ZONE=y CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 +CONFIG_MAILBOX=y +# CONFIG_MAILBOX_TEST is not set CONFIG_MFD_SYSCON=y CONFIG_MMC_SDHCI_XENON=y CONFIG_MODULES_USE_ELF_RELA=y @@ -74,6 +78,7 @@ CONFIG_SWIOTLB=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_SYS_SUPPORTS_HUGETLBFS=y CONFIG_THREAD_INFO_IN_TASK=y +CONFIG_TURRIS_MOX_RWTM=y CONFIG_UNMAP_KERNEL_AT_EL0=y CONFIG_VMAP_STACK=y CONFIG_ZONE_DMA32=y diff --git a/target/linux/mvebu/cortexa9/base-files/etc/board.d/01_leds b/target/linux/mvebu/cortexa9/base-files/etc/board.d/01_leds index 381596d85d..2b045d0945 100644 --- a/target/linux/mvebu/cortexa9/base-files/etc/board.d/01_leds +++ b/target/linux/mvebu/cortexa9/base-files/etc/board.d/01_leds @@ -11,6 +11,10 @@ board=$(board_name) boardname="${board##*,}" case "$board" in +ctera,c200-v2) + ucidef_set_led_usbport "usb2" "USB2" "green:usb-2" "usb1-port1" "usb2-port1" + ucidef_set_led_usbport "usb3" "USB3" "green:usb-1" "usb1-port2" "usb2-port2" + ;; kobol,helios4) ucidef_set_led_usbport "USB" "USB" "helios4:green:usb" "usb1-port1" "usb2-port1" "usb3-port1" "usb4-port1" "usb5-port1" ;; diff --git a/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network b/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network index ad61dbea43..36769e8c18 100644 --- a/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network +++ b/target/linux/mvebu/cortexa9/base-files/etc/board.d/02_network @@ -12,6 +12,9 @@ mvebu_setup_interfaces() local board="$1" case "$board" in + ctera,c200-v2) + ucidef_set_interface_lan "eth0" "dhcp" + ;; cznic,turris-omnia) ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3 lan4" "eth2" ;; @@ -58,6 +61,10 @@ mvebu_setup_macs() buffalo,ls421de) lan_mac=$(mtd_get_mac_ascii u-boot-env eth1addr) ;; + ctera,c200-v2) + label_mac=$(mtd_get_mac_ascii dev_params mac) + lan_mac=$label_mac + ;; linksys,wrt1200ac|\ linksys,wrt1900ac-v2|\ linksys,wrt1900acs|\ diff --git a/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh b/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh index 5e69374837..030e66e699 100755 --- a/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh +++ b/target/linux/mvebu/cortexa9/base-files/lib/upgrade/platform.sh @@ -3,7 +3,7 @@ # Copyright (C) 2016 LEDE-Project.org # -RAMFS_COPY_BIN='fw_printenv fw_setenv' +RAMFS_COPY_BIN='fw_printenv fw_setenv strings' RAMFS_COPY_DATA='/etc/fw_env.config /var/lock/fw_printenv.lock' REQUIRE_IMAGE_METADATA=1 @@ -26,6 +26,17 @@ platform_do_upgrade() { buffalo,ls421de) nand_do_upgrade "$1" ;; + ctera,c200-v2) + part=$(find_mtd_part "active_bank") + + if [ -n "$part" ]; then + CI_KERNPART="$(strings $part | grep bank)" + nand_do_upgrade "$1" + else + echo "active_bank partition missed!" + return 1 + fi + ;; cznic,turris-omnia|\ kobol,helios4|\ solidrun,clearfog-base-a1|\ diff --git a/target/linux/mvebu/cortexa9/config-5.10 b/target/linux/mvebu/cortexa9/config-5.10 new file mode 100644 index 0000000000..b737c44d42 --- /dev/null +++ b/target/linux/mvebu/cortexa9/config-5.10 @@ -0,0 +1,2 @@ +CONFIG_PHY_MVEBU_A38X_COMPHY=y +CONFIG_RTC_DRV_MV=y diff --git a/target/linux/mvebu/files/arch/arm/boot/dts/armada-370-c200-v2.dts b/target/linux/mvebu/files/arch/arm/boot/dts/armada-370-c200-v2.dts new file mode 100644 index 0000000000..c1c227a5e9 --- /dev/null +++ b/target/linux/mvebu/files/arch/arm/boot/dts/armada-370-c200-v2.dts @@ -0,0 +1,426 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) +/* + * Device Tree file for Ctera C200-V2 + * + * Copyright (C) 2021 Pawel Dembicki + */ + +/dts-v1/; + +#include "armada-370.dtsi" +#include +#include +#include +#include + +/ { + model = "Ctera C200 V2"; + compatible = "ctera,c200-v2", "marvell,armada370", "marvell,armada-370-xp"; + + aliases { + led-boot = &led_status_green; + led-failsafe = &led_status_red; + led-running = &led_status_green; + led-upgrade = &led_status_red; + }; + + chosen { + bootargs = "console=ttyS0,115200"; + stdout-path = "serial0:115200n8"; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x40000000>; /* 1024 MB */ + }; + + soc { + ranges = ; + }; + + thermal-zones { + ethphy-thermal { + polling-delay = <20000>; + polling-delay-passive = <2000>; + + thermal-sensors = <ðphy0>; + + trips { + ethphy_alert1: trip1 { + temperature = <65000>; + hysteresis = <4000>; + type = "passive"; + }; + + ethphy_crit: trip2 { + temperature = <100000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + }; + + keys { + compatible = "gpio-keys"; + pinctrl-0 = <&pmx_buttons>; + pinctrl-names = "default"; + + power { + label = "Power Button"; + linux,code = ; + gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>; + }; + + reset { + label = "Reset Button"; + linux,code = ; + gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; + }; + + usb1 { + label = "USB1 Button"; + linux,code = ; + gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; + }; + + usb2 { + label = "USB2 Button"; + linux,code = ; + gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; + }; + }; + + gpio-poweroff { + compatible = "gpio-poweroff"; + pinctrl-0 = <&pmx_poweroff>; + pinctrl-names = "default"; + gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-0 = <&pmx_leds1 &pmx_leds2>; + pinctrl-names = "default"; + + led-0 { + function = LED_FUNCTION_USB; + function-enumerator = <2>; + color = ; + gpios = <&gpio0 12 GPIO_ACTIVE_LOW>; + }; + + led-1 { + function = LED_FUNCTION_USB; + function-enumerator = <2>; + color = ; + gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + linux,default-trigger = "usbport"; + trigger-sources = <&usb1_port 1>, <&usb2_port 1>; + }; + + led-2 { + function = LED_FUNCTION_USB; + function-enumerator = <1>; + color = ; + gpios = <&gpio0 15 GPIO_ACTIVE_LOW>; + }; + + led-3 { + function = LED_FUNCTION_USB; + function-enumerator = <1>; + color = ; + gpios = <&gpio0 16 GPIO_ACTIVE_LOW>; + linux,default-trigger = "usbport"; + trigger-sources = <&usb1_port 2>, <&usb2_port 2>; + }; + + led-4 { + function = LED_FUNCTION_DISK; + function-enumerator = <2>; + color = ; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + linux,default-trigger = "ata2"; + }; + + led-5 { + function = LED_FUNCTION_DISK; + function-enumerator = <1>; + color = ; + gpios = <&gpio1 18 GPIO_ACTIVE_LOW>; + }; + + led-6 { + function = LED_FUNCTION_DISK; + function-enumerator = <2>; + color = ; + gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; + }; + + led-7 { + function = LED_FUNCTION_INDICATOR; + color = ; + gpios = <&gpio1 20 GPIO_ACTIVE_HIGH>; + }; + + led-8 { + function = LED_FUNCTION_DISK_ERR; + color = ; + gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; + }; + + led-9 { + function = LED_FUNCTION_DISK_ERR; + color = ; + gpios = <&gpio1 23 GPIO_ACTIVE_LOW>; + }; + + led_status_red: led-10 { + label = "red:status"; + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio1 24 GPIO_ACTIVE_LOW>; + }; + + led-11 { + function = LED_FUNCTION_DISK; + function-enumerator = <1>; + color = ; + gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; + linux,default-trigger = "ata1"; + }; + + led_status_green: led-12 { + label = "green:status"; + function = LED_FUNCTION_STATUS; + color = ; + gpios = <&gpio1 26 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&coherencyfab { + broken-idle; +}; + +ð1 { + pinctrl-0 = <&ge1_rgmii_pins>; + pinctrl-names = "default"; + status = "okay"; + phy-handle = <ðphy0>; + phy-connection-type = "rgmii-id"; +}; + +&i2c0 { + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + clock-frequency = <100000>; + status = "okay"; + + hwmon@2a { + compatible = "nuvoton,nct7802"; + reg = <0x2a>; + }; + + rtc@30 { + compatible = "sii,s35390a"; + reg = <0x30>; + }; +}; + +&mdio { + pinctrl-0 = <&mdio_pins>; + pinctrl-names = "default"; + + ethphy0: ethernet-phy@0 { /* Marvell 88E1318 */ + reg = <0>; + #thermal-sensor-cells = <0>; + }; +}; + +&nand_controller { + status = "okay"; + + nand@0 { + reg = <0>; + label = "pxa3xx_nand-0"; + nand-rb = <0>; + marvell,nand-keep-config; + nand-on-flash-bbt; + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "uboot"; + reg = <0x0000000 0x200000>; + read-only; + }; + + partition@200000 { + label = "certificate"; + reg = <0x0200000 0x100000>; + read-only; + }; + + partition@300000 { + label = "preset_cfg"; + reg = <0x0300000 0x100000>; + read-only; + }; + + partition@400000 { + label = "dev_params"; + reg = <0x0400000 0x100000>; + read-only; + }; + partition@500000 { + label = "active_bank"; + reg = <0x0500000 0x0100000>; + }; + + partition@600000 { + label = "magic"; + reg = <0x0600000 0x0100000>; + read-only; + }; + + partition@700000 { + label = "bank1"; + reg = <0x0700000 0x2800000>; + }; + + partition@2f00000 { + label = "bank2"; + reg = <0x2f00000 0x2800000>; + }; + + /* 0x5700000-0x5a00000 undefined in vendor firmware */ + + partition@5a00000 { + label = "reserved"; + reg = <0x5a00000 0x2000000>; + }; + + partition@7a00000 { + label = "ubi"; + reg = <0x7a00000 0x8600000>; + }; + }; + }; +}; + +&pciec { + status = "okay"; + + pcie@1,0 { + pinctrl-0 = <&pmx_pcie>; + pinctrl-names = "default"; + status = "okay"; + reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; + + /* -[0000:00]---01.0-[01]----00.0 */ + /* usbport trigger won't work */ + bridge@0,1 { + compatible = "pci11ab,6710"; + reg = <0x3800 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + + usb@1,0 { + /* Renesas uPD720202 */ + compatible = "pci1912,0015"; + reg = <0x1000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + + usb1_port: port@1 { + reg = <1>; + #trigger-source-cells = <1>; + }; + + usb2_port: port@2 { + reg = <2>; + #trigger-source-cells = <1>; + }; + }; + }; + }; +}; + +&pinctrl { + pmx_poweroff: pmx-poweroff { + marvell,pins = "mpp7"; + marvell,function = "gpo"; + }; + + pmx_power_cpu: pmx-power-cpu { + marvell,pins = "mpp4"; + marvell,function = "vdd"; + }; + + pmx_buttons: pmx-buttons { + marvell,pins = "mpp6", "mpp10", "mpp14", "mpp32"; + marvell,function = "gpio"; + }; + + pmx_leds1: pmx-leds1 { + marvell,pins = "mpp47"; + marvell,function = "gpo"; + }; + + pmx_leds2: pmx-leds2 { + marvell,pins = "mpp12", "mpp13", "mpp15", "mpp16", "mpp50", "mpp51", + "mpp52", "mpp53", "mpp55", "mpp56", "mpp57", "mpp58"; + marvell,function = "gpio"; + }; + + pmx_pcie: pmx-pcie { + marvell,pins = "mpp59"; + marvell,function = "gpio"; + }; + + /* this gpio is connected to the pin of buzzer + * leave it as is due lack of proper driver + */ + pmx_buzzer: pmx-buzzer { + marvell,pins = "mpp63"; + marvell,function = "gpio"; + }; +}; + +&pmsu { + pinctrl-0 = <&pmx_power_cpu>; + pinctrl-names = "default"; +}; + +&rtc { + status = "disabled"; +}; + +&sata { + nr-ports = <2>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + hdd0_temp: sata-port@0 { + reg = <0>; + #thermal-sensor-cells = <0>; + }; + + hdd1_temp: sata-port@1 { + reg = <1>; + #thermal-sensor-cells = <0>; + }; +}; + +&uart0 { + status = "okay"; +}; diff --git a/target/linux/mvebu/image/Makefile b/target/linux/mvebu/image/Makefile index 9220c6c9f1..44e66a5f87 100644 --- a/target/linux/mvebu/image/Makefile +++ b/target/linux/mvebu/image/Makefile @@ -51,6 +51,63 @@ define Build/buffalo-kernel-jffs2 rm -rf $(KDIR)/kernel_jffs2 $@.fakerd endef +# Some info about Ctera firmware: +# 1. It's simple tar file (GNU standard), but it must have ".firm" suffix. +# 2. It contains two images: kernel and romdisk. Both are required. +# 3. Every image has header and trailer file. +# 4. The struct of tar firmware is: header kernel trailer header romdisk trailer +# 5. In header file are some strings used to describe image. It was decoded from +# factory image. +# 6. Version format in header file is restricted by Original FW. +# 7. Trailer file contains MD5 sum string of header and image file. +# 8. Firmware file must have <=24MB size. + +define Build/ctera-firmware + mkdir -p $@.tmp + + # Prepare header and trailer file for kernel + echo "# CTera firmware information file" > $@.tmp/header + echo "image_type=kernel" >> $@.tmp/header + echo "arch=ARM" >> $@.tmp/header + echo "board=2Drive_A" >> $@.tmp/header + echo "version=5.5.165.61499" >> $@.tmp/header + echo "kernel_cmd=console=ttyS0,115200 earlycon" >> $@.tmp/header + echo "date=$$(date $(if $(SOURCE_DATE_EPOCH),-d@$(SOURCE_DATE_EPOCH)))" \ + >> $@.tmp/header + + cp $@ $@.tmp/kernel + + echo "MD5=$$(cat $@.tmp/header $@.tmp/kernel | $(MKHASH) md5)" \ + > $@.tmp/trailer + + tar $(if $(SOURCE_DATE_EPOCH),--mtime="@$(SOURCE_DATE_EPOCH)") \ + -H gnu -C $@.tmp -cf $@.tar header kernel trailer + + # Prepare header and trailer file for fake romdisk + echo "# CTera firmware information file" > $@.tmp/header + echo "image_type=romdisk" >> $@.tmp/header + echo "initrd=yes" >> $@.tmp/header + echo "arch=ARM" >> $@.tmp/header + echo "board=2Drive_A" >> $@.tmp/header + echo "version=5.5.165.61499" >> $@.tmp/header + echo "date=$$(date $(if $(SOURCE_DATE_EPOCH),-d@$(SOURCE_DATE_EPOCH)))" \ + >> $@.tmp/header + + rm -f $@ + touch $@ + $(call Build/append-uImage-fakehdr, ramdisk) + cp $@ $@.tmp/romdisk + + echo "MD5=$$(cat $@.tmp/header $@.tmp/romdisk | $(MKHASH) md5)" \ + > $@.tmp/trailer + + tar $(if $(SOURCE_DATE_EPOCH),--mtime="@$(SOURCE_DATE_EPOCH)") \ + -H gnu -C $@.tmp -rf $@.tar header romdisk trailer + + mv $@.tar $@ + rm -rf $@.tmp +endef + define Build/sdcard-img SIGNATURE="$(IMG_PART_SIGNATURE)" \ ./gen_mvebu_sdcard_img.sh $@ \ diff --git a/target/linux/mvebu/image/cortexa9.mk b/target/linux/mvebu/image/cortexa9.mk index 3f227259ee..06252670ab 100644 --- a/target/linux/mvebu/image/cortexa9.mk +++ b/target/linux/mvebu/image/cortexa9.mk @@ -31,6 +31,24 @@ define Device/buffalo_ls421de endef TARGET_DEVICES += buffalo_ls421de +define Device/ctera_c200-v2 + PAGESIZE := 2048 + SUBPAGESIZE := 512 + BLOCKSIZE := 128k + DEVICE_VENDOR := Ctera + DEVICE_MODEL := C200 + DEVICE_VARIANT := V2 + SOC := armada-370 + KERNEL := kernel-bin | append-dtb | uImage none | ctera-firmware + KERNEL_IN_UBI := + KERNEL_SUFFIX := -factory.firm + DEVICE_PACKAGES := \ + kmod-gpio-button-hotplug kmod-hwmon-drivetemp kmod-hwmon-nct7802 \ + kmod-rtc-s35390a kmod-usb3 kmod-usb-ledtrig-usbport + IMAGES := sysupgrade.bin +endef +TARGET_DEVICES += ctera_c200-v2 + define Device/cznic_turris-omnia DEVICE_VENDOR := CZ.NIC DEVICE_MODEL := Turris Omnia diff --git a/target/linux/omap/Makefile b/target/linux/omap/Makefile index bc20f2eddc..c7a904bbe5 100644 --- a/target/linux/omap/Makefile +++ b/target/linux/omap/Makefile @@ -7,7 +7,7 @@ include $(TOPDIR)/rules.mk ARCH:=arm BOARD:=omap BOARDNAME:=TI OMAP3/4/AM33xx -FEATURES:=usb usbgadget ext4 targz fpu audio display nand squashfs +FEATURES:=usb usbgadget ext4 targz fpu audio display nand rootfs-part squashfs CPU_TYPE:=cortex-a8 CPU_SUBTYPE:=vfpv3 diff --git a/target/linux/omap/config-5.10 b/target/linux/omap/config-5.10 index 10cd0b0159..8699cae9aa 100644 --- a/target/linux/omap/config-5.10 +++ b/target/linux/omap/config-5.10 @@ -266,6 +266,8 @@ CONFIG_HSI=y CONFIG_HSI_BOARDINFO=y # CONFIG_HSI_CHAR is not set CONFIG_HWMON=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_OMAP=y CONFIG_HZ_FIXED=0 CONFIG_I2C=y CONFIG_I2C_ALGOBIT=y diff --git a/target/linux/pistachio/patches-5.10/401-mtd-nor-support-mtd-name-from-device-tree.patch b/target/linux/pistachio/patches-5.10/401-mtd-nor-support-mtd-name-from-device-tree.patch index e8cb2f2fe1..b85ecef383 100644 --- a/target/linux/pistachio/patches-5.10/401-mtd-nor-support-mtd-name-from-device-tree.patch +++ b/target/linux/pistachio/patches-5.10/401-mtd-nor-support-mtd-name-from-device-tree.patch @@ -10,7 +10,7 @@ Signed-off-by: Abhimanyu Vishwakarma --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c -@@ -3183,6 +3183,7 @@ int spi_nor_scan(struct spi_nor *nor, co +@@ -3189,6 +3189,7 @@ int spi_nor_scan(struct spi_nor *nor, co struct device *dev = nor->dev; struct mtd_info *mtd = &nor->mtd; struct device_node *np = spi_nor_get_flash_node(nor); @@ -18,7 +18,7 @@ Signed-off-by: Abhimanyu Vishwakarma int ret; int i; -@@ -3237,7 +3238,12 @@ int spi_nor_scan(struct spi_nor *nor, co +@@ -3243,7 +3244,12 @@ int spi_nor_scan(struct spi_nor *nor, co if (ret) return ret; diff --git a/target/linux/ramips/dts/mt7620a_humax_e2.dts b/target/linux/ramips/dts/mt7620a_humax_e2.dts new file mode 100644 index 0000000000..2a2ad9043d --- /dev/null +++ b/target/linux/ramips/dts/mt7620a_humax_e2.dts @@ -0,0 +1,142 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7620a.dtsi" + +#include +#include +#include + +/ { + compatible = "humax,e2", "ralink,mt7620a-soc"; + model = "HUMAX E2"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + label-mac-device = ðernet; + }; + + leds { + compatible = "gpio-leds"; + + led_power: power { + label = "green:power"; + gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; + }; + + pairing { + label = "green:pairing"; + gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; + }; + + wlan { + label = "green:wlan"; + gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; + }; + + lan { + label = "green:lan"; + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "green:wps"; + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&gpio1 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <50000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "u-boot-env"; + reg = <0x30000 0x10000>; + read-only; + }; + + factory: partition@40000 { + label = "factory"; + reg = <0x40000 0x30000>; + read-only; + + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_factory_10007: macaddr@10007 { + reg = <0x10007 0x6>; + }; + }; + + partition@70000 { + compatible = "openwrt,uimage", "denx,uimage"; + openwrt,offset = ; + openwrt,partition-magic = ; + label = "firmware"; + reg = <0x70000 0x790000>; + }; + }; + }; +}; + +ðernet { + nvmem-cells = <&macaddr_factory_10007>; + nvmem-cell-names = "mac-address"; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x8000>; + ieee80211-freq-limit = <5000000 6000000>; + }; +}; + +&wmac { + ralink,mtd-eeprom = <&factory 0x0>; +}; + +&state_default { + gpio { + groups = "rgmii1"; + function = "gpio"; + }; +}; diff --git a/target/linux/ramips/dts/mt7620a_youku_yk-l1.dts b/target/linux/ramips/dts/mt7620a_youku_yk-l1.dts index 5155318b0c..3a607ee5fa 100644 --- a/target/linux/ramips/dts/mt7620a_youku_yk-l1.dts +++ b/target/linux/ramips/dts/mt7620a_youku_yk-l1.dts @@ -7,6 +7,10 @@ model = "Youku YK-L1"; }; +&flash0 { + broken-flash-reset; +}; + &firmware { reg = <0x50000 0x1fb0000>; }; diff --git a/target/linux/ramips/dts/mt7620a_youku_yk-l1.dtsi b/target/linux/ramips/dts/mt7620a_youku_yk-l1.dtsi index 937a41d54b..ac874cef3d 100644 --- a/target/linux/ramips/dts/mt7620a_youku_yk-l1.dtsi +++ b/target/linux/ramips/dts/mt7620a_youku_yk-l1.dtsi @@ -56,7 +56,7 @@ &spi0 { status = "okay"; - flash@0 { + flash0: flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <80000000>; diff --git a/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we1026-h-32m.dts b/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we1026-h-32m.dts index 0fc8fc60e4..577e7e05e9 100644 --- a/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we1026-h-32m.dts +++ b/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we1026-h-32m.dts @@ -8,6 +8,10 @@ model = "Zbtlink ZBT-WE1026-H (32M)"; }; +&flash0 { + broken-flash-reset; +}; + &firmware { reg = <0x50000 0x1fb0000>; }; diff --git a/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we1026.dtsi b/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we1026.dtsi index cdbdfbd38c..57f3b4b7a6 100644 --- a/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we1026.dtsi +++ b/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we1026.dtsi @@ -30,7 +30,7 @@ &spi0 { status = "okay"; - flash@0 { + flash0: flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <10000000>; diff --git a/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we826-32m.dts b/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we826-32m.dts index c86890193d..8c4eb31988 100644 --- a/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we826-32m.dts +++ b/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we826-32m.dts @@ -5,6 +5,10 @@ model = "Zbtlink ZBT-WE826 (32M)"; }; +&flash0 { + broken-flash-reset; +}; + &firmware { reg = <0x50000 0x1fb0000>; }; diff --git a/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we826-e.dts b/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we826-e.dts index 3808538ab8..fe54148154 100644 --- a/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we826-e.dts +++ b/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we826-e.dts @@ -33,6 +33,10 @@ }; }; +&flash0 { + broken-flash-reset; +}; + &firmware { reg = <0x50000 0x1fb0000>; }; diff --git a/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we826.dtsi b/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we826.dtsi index 8e781aa505..27876fc140 100644 --- a/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we826.dtsi +++ b/target/linux/ramips/dts/mt7620a_zbtlink_zbt-we826.dtsi @@ -52,7 +52,7 @@ &spi0 { status = "okay"; - flash@0 { + flash0: flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <10000000>; diff --git a/target/linux/ramips/dts/mt7621_glinet_gl-mt1300.dts b/target/linux/ramips/dts/mt7621_glinet_gl-mt1300.dts index 8c1d2788c1..384da1bfa9 100644 --- a/target/linux/ramips/dts/mt7621_glinet_gl-mt1300.dts +++ b/target/linux/ramips/dts/mt7621_glinet_gl-mt1300.dts @@ -69,6 +69,7 @@ reg = <0>; spi-max-frequency = <80000000>; m25p,fast-read; + broken-flash-reset; partitions { compatible = "fixed-partitions"; diff --git a/target/linux/ramips/dts/mt7621_iptime_a6004ns-m.dts b/target/linux/ramips/dts/mt7621_iptime_a6004ns-m.dts new file mode 100644 index 0000000000..8138cc31a7 --- /dev/null +++ b/target/linux/ramips/dts/mt7621_iptime_a6004ns-m.dts @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621_iptime_a6004ns-m.dtsi" + +/ { + compatible = "iptime,a6004ns-m", "mediatek,mt7621-soc"; + model = "ipTIME A6004NS-M"; +}; diff --git a/target/linux/ramips/dts/mt7621_iptime_a6004ns-m.dtsi b/target/linux/ramips/dts/mt7621_iptime_a6004ns-m.dtsi new file mode 100644 index 0000000000..a033d7f665 --- /dev/null +++ b/target/linux/ramips/dts/mt7621_iptime_a6004ns-m.dtsi @@ -0,0 +1,180 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7621.dtsi" + +#include +#include + +/ { + aliases { + led-boot = &led_cpu; + led-failsafe = &led_cpu; + led-running = &led_cpu; + led-upgrade = &led_cpu; + label-mac-device = &gmac0; + }; + + leds { + compatible = "gpio-leds"; + + usb { + label = "blue:usb"; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + trigger-sources = <&xhci_ehci_port1>; + linux,default-trigger = "usbport"; + }; + + wlan5g { + label = "blue:wlan5g"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0radio"; + }; + + wlan2g { + label = "blue:wlan2g"; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1radio"; + }; + + led_cpu: cpu { + label = "blue:cpu"; + gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + wps { + label = "wps"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + reset { + label = "reset"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <80000000>; + m25p,fast-read; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + uboot: partition@0 { + label = "u-boot"; + reg = <0x0 0x20000>; + read-only; + }; + + partition@20000 { + label = "config"; + reg = <0x20000 0x10000>; + read-only; + }; + + factory: partition@30000 { + label = "factory"; + reg = <0x30000 0x10000>; + read-only; + }; + + partition@40000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x40000 0xfc0000>; + }; + }; + }; +}; + +&state_default { + gpio { + groups = "i2c", "uart3", "jtag", "wdt"; + function = "gpio"; + }; +}; + +&gmac0 { + nvmem-cells = <&macaddr_uboot_1fc20>; + nvmem-cell-names = "mac-address"; +}; + +&switch0 { + ports { + port@0 { + status = "okay"; + label = "wan"; + nvmem-cells = <&macaddr_uboot_1fc40>; + nvmem-cell-names = "mac-address"; + }; + + port@1 { + status = "okay"; + label = "lan1"; + }; + + port@2 { + status = "okay"; + label = "lan2"; + }; + + port@3 { + status = "okay"; + label = "lan3"; + }; + + port@4 { + status = "okay"; + label = "lan4"; + }; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x0>; + ieee80211-freq-limit = <5000000 6000000>; + }; +}; + +&pcie1 { + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x8000>; + ieee80211-freq-limit = <2400000 2500000>; + }; +}; + +&uboot { + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_uboot_1fc20: macaddr@1fc20 { + reg = <0x1fc20 0x6>; + }; + + macaddr_uboot_1fc40: macaddr@1fc40 { + reg = <0x1fc40 0x6>; + }; +}; diff --git a/target/linux/ramips/dts/mt7621_iptime_a6ns-m.dts b/target/linux/ramips/dts/mt7621_iptime_a6ns-m.dts index b3efe557e2..f83340e64a 100644 --- a/target/linux/ramips/dts/mt7621_iptime_a6ns-m.dts +++ b/target/linux/ramips/dts/mt7621_iptime_a6ns-m.dts @@ -1,183 +1,8 @@ // SPDX-License-Identifier: GPL-2.0-or-later OR MIT -#include "mt7621.dtsi" - -#include -#include +#include "mt7621_iptime_a6004ns-m.dtsi" / { compatible = "iptime,a6ns-m", "mediatek,mt7621-soc"; model = "ipTIME A6ns-M"; - - aliases { - led-boot = &led_cpu; - led-failsafe = &led_cpu; - led-running = &led_cpu; - led-upgrade = &led_cpu; - label-mac-device = &gmac0; - }; - - leds { - compatible = "gpio-leds"; - - usb { - label = "blue:usb"; - gpios = <&gpio 7 GPIO_ACTIVE_LOW>; - trigger-sources = <&xhci_ehci_port1>; - linux,default-trigger = "usbport"; - }; - - wlan5g { - label = "blue:wlan5g"; - gpios = <&gpio 14 GPIO_ACTIVE_LOW>; - linux,default-trigger = "phy0radio"; - }; - - wlan2g { - label = "blue:wlan2g"; - gpios = <&gpio 17 GPIO_ACTIVE_LOW>; - linux,default-trigger = "phy1radio"; - }; - - led_cpu: cpu { - label = "blue:cpu"; - gpios = <&gpio 18 GPIO_ACTIVE_LOW>; - }; - }; - - keys { - compatible = "gpio-keys"; - - wps { - label = "wps"; - gpios = <&gpio 3 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - - reset { - label = "reset"; - gpios = <&gpio 4 GPIO_ACTIVE_LOW>; - linux,code = ; - }; - }; -}; - -&spi0 { - status = "okay"; - - flash@0 { - compatible = "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <80000000>; - m25p,fast-read; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - uboot: partition@0 { - label = "u-boot"; - reg = <0x0 0x20000>; - read-only; - }; - - partition@20000 { - label = "config"; - reg = <0x20000 0x10000>; - read-only; - }; - - factory: partition@30000 { - label = "factory"; - reg = <0x30000 0x10000>; - read-only; - }; - - partition@40000 { - compatible = "denx,uimage"; - label = "firmware"; - reg = <0x40000 0xfc0000>; - }; - }; - }; -}; - -&state_default { - gpio { - groups = "i2c", "uart3", "jtag", "wdt"; - function = "gpio"; - }; -}; - -&gmac0 { - nvmem-cells = <&macaddr_uboot_1fc20>; - nvmem-cell-names = "mac-address"; -}; - -&switch0 { - ports { - port@0 { - status = "okay"; - label = "wan"; - nvmem-cells = <&macaddr_uboot_1fc40>; - nvmem-cell-names = "mac-address"; - }; - - port@1 { - status = "okay"; - label = "lan1"; - }; - - port@2 { - status = "okay"; - label = "lan2"; - }; - - port@3 { - status = "okay"; - label = "lan3"; - }; - - port@4 { - status = "okay"; - label = "lan4"; - }; - }; -}; - -&pcie { - status = "okay"; -}; - -&pcie0 { - wifi@0,0 { - compatible = "mediatek,mt76"; - reg = <0x0000 0 0 0 0>; - mediatek,mtd-eeprom = <&factory 0x0>; - ieee80211-freq-limit = <5000000 6000000>; - }; -}; - -&pcie1 { - wifi@0,0 { - compatible = "mediatek,mt76"; - reg = <0x0000 0 0 0 0>; - mediatek,mtd-eeprom = <&factory 0x8000>; - ieee80211-freq-limit = <2400000 2500000>; - }; -}; - -&uboot { - compatible = "nvmem-cells"; - #address-cells = <1>; - #size-cells = <1>; - - macaddr_uboot_1fc20: macaddr@1fc20 { - reg = <0x1fc20 0x6>; - }; - - macaddr_uboot_1fc40: macaddr@1fc40 { - reg = <0x1fc40 0x6>; - }; }; diff --git a/target/linux/ramips/dts/mt7621_tenbay_t-mb5eu-v01.dts b/target/linux/ramips/dts/mt7621_tenbay_t-mb5eu-v01.dts index 6e5f5772be..4be80f4836 100644 --- a/target/linux/ramips/dts/mt7621_tenbay_t-mb5eu-v01.dts +++ b/target/linux/ramips/dts/mt7621_tenbay_t-mb5eu-v01.dts @@ -118,8 +118,9 @@ wan_port: port@0 { status = "okay"; label = "wan"; - nvmem-cells = <&macaddr_factory_28>; + nvmem-cells = <&macaddr_factory_4>; nvmem-cell-names = "mac-address"; + mac-address-increment = <(-2)>; }; port@1 { @@ -205,8 +206,4 @@ macaddr_factory_4: macaddr@4 { reg = <0x4 0x6>; }; - - macaddr_factory_28: macaddr@28 { - reg = <0x28 0x6>; - }; }; diff --git a/target/linux/ramips/dts/mt7621_xiaoyu_xy-c5.dts b/target/linux/ramips/dts/mt7621_xiaoyu_xy-c5.dts index c1f10ac55e..0027bc96fe 100644 --- a/target/linux/ramips/dts/mt7621_xiaoyu_xy-c5.dts +++ b/target/linux/ramips/dts/mt7621_xiaoyu_xy-c5.dts @@ -47,6 +47,7 @@ compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <25000000>; + broken-flash-reset; partitions { compatible = "fixed-partitions"; diff --git a/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg3526-32m.dts b/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg3526-32m.dts index fe4bc72f39..66a762289d 100644 --- a/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg3526-32m.dts +++ b/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg3526-32m.dts @@ -5,6 +5,10 @@ model = "Zbtlink ZBT-WG3526 (32M)"; }; +&flash0 { + broken-flash-reset; +}; + &firmware { reg = <0x50000 0x1fb0000>; }; diff --git a/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg3526.dtsi b/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg3526.dtsi index 87f9e2243c..01269e1c1c 100644 --- a/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg3526.dtsi +++ b/target/linux/ramips/dts/mt7621_zbtlink_zbt-wg3526.dtsi @@ -49,7 +49,7 @@ &spi0 { status = "okay"; - flash@0 { + flash0: flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <10000000>; diff --git a/target/linux/ramips/dts/mt7628an_comfast_cf-wr758ac-v1.dts b/target/linux/ramips/dts/mt7628an_comfast_cf-wr758ac-v1.dts new file mode 100644 index 0000000000..b4740355bf --- /dev/null +++ b/target/linux/ramips/dts/mt7628an_comfast_cf-wr758ac-v1.dts @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7628an_comfast_cf-wr758ac.dtsi" + +/ { + compatible = "comfast,cf-wr758ac-v1", "mediatek,mt7628an-soc"; + model = "COMFAST CF-WR758AC V1"; +}; diff --git a/target/linux/ramips/dts/mt7628an_comfast_cf-wr758ac-v2.dts b/target/linux/ramips/dts/mt7628an_comfast_cf-wr758ac-v2.dts new file mode 100644 index 0000000000..bc476f2617 --- /dev/null +++ b/target/linux/ramips/dts/mt7628an_comfast_cf-wr758ac-v2.dts @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT + +#include "mt7628an_comfast_cf-wr758ac.dtsi" + +/ { + compatible = "comfast,cf-wr758ac-v2", "mediatek,mt7628an-soc"; + model = "COMFAST CF-WR758AC V2"; +}; diff --git a/target/linux/ramips/dts/mt7628an_joowin_jw-wr758ac.dtsi b/target/linux/ramips/dts/mt7628an_comfast_cf-wr758ac.dtsi similarity index 96% rename from target/linux/ramips/dts/mt7628an_joowin_jw-wr758ac.dtsi rename to target/linux/ramips/dts/mt7628an_comfast_cf-wr758ac.dtsi index 97845cf02b..6ac53adf52 100644 --- a/target/linux/ramips/dts/mt7628an_joowin_jw-wr758ac.dtsi +++ b/target/linux/ramips/dts/mt7628an_comfast_cf-wr758ac.dtsi @@ -6,7 +6,7 @@ #include / { - compatible = "joowin,jw-wr758ac", "mediatek,mt7628an-soc"; + compatible = "comfast,cf-wr758ac", "mediatek,mt7628an-soc"; keys { compatible = "gpio-keys"; diff --git a/target/linux/ramips/dts/mt7628an_hak5_wifi-pineapple-mk7.dts b/target/linux/ramips/dts/mt7628an_hak5_wifi-pineapple-mk7.dts index 0b21724b1a..2901a2af51 100644 --- a/target/linux/ramips/dts/mt7628an_hak5_wifi-pineapple-mk7.dts +++ b/target/linux/ramips/dts/mt7628an_hak5_wifi-pineapple-mk7.dts @@ -81,6 +81,7 @@ compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <50000000>; + broken-flash-reset; partitions { compatible = "fixed-partitions"; diff --git a/target/linux/ramips/dts/mt7628an_hilink_hlk-7688a.dts b/target/linux/ramips/dts/mt7628an_hilink_hlk-7688a.dts index 231aa15bfc..2c7299af72 100644 --- a/target/linux/ramips/dts/mt7628an_hilink_hlk-7688a.dts +++ b/target/linux/ramips/dts/mt7628an_hilink_hlk-7688a.dts @@ -61,6 +61,7 @@ compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <40000000>; + broken-flash-reset; partitions { compatible = "fixed-partitions"; diff --git a/target/linux/ramips/dts/mt7628an_joowin_jw-wr758ac-v1.dts b/target/linux/ramips/dts/mt7628an_joowin_jw-wr758ac-v1.dts deleted file mode 100644 index c3b52c82c1..0000000000 --- a/target/linux/ramips/dts/mt7628an_joowin_jw-wr758ac-v1.dts +++ /dev/null @@ -1,8 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - -#include "mt7628an_joowin_jw-wr758ac.dtsi" - -/ { - compatible = "joowin,jw-wr758ac-v1", "mediatek,mt7628an-soc"; - model = "Joowin WR758AC V1"; -}; diff --git a/target/linux/ramips/dts/mt7628an_joowin_jw-wr758ac-v2.dts b/target/linux/ramips/dts/mt7628an_joowin_jw-wr758ac-v2.dts deleted file mode 100644 index 1cc0d5d38d..0000000000 --- a/target/linux/ramips/dts/mt7628an_joowin_jw-wr758ac-v2.dts +++ /dev/null @@ -1,8 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - -#include "mt7628an_joowin_jw-wr758ac.dtsi" - -/ { - compatible = "joowin,jw-wr758ac-v2", "mediatek,mt7628an-soc"; - model = "Joowin WR758AC V2"; -}; diff --git a/target/linux/ramips/dts/mt7628an_jotale_js76x8-32m.dts b/target/linux/ramips/dts/mt7628an_jotale_js76x8-32m.dts index 07e8be7848..75ee98836a 100644 --- a/target/linux/ramips/dts/mt7628an_jotale_js76x8-32m.dts +++ b/target/linux/ramips/dts/mt7628an_jotale_js76x8-32m.dts @@ -7,6 +7,10 @@ model = "Jotale JS76x8 (32M)"; }; +&flash0 { + broken-flash-reset; +}; + &firmware { reg = <0x50000 0x1fb0000>; }; diff --git a/target/linux/ramips/dts/mt7628an_jotale_js76x8.dtsi b/target/linux/ramips/dts/mt7628an_jotale_js76x8.dtsi index 03de21224b..2d2f8a58b8 100644 --- a/target/linux/ramips/dts/mt7628an_jotale_js76x8.dtsi +++ b/target/linux/ramips/dts/mt7628an_jotale_js76x8.dtsi @@ -58,7 +58,7 @@ pinctrl-names = "default"; pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>; - flash@0 { + flash0: flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <40000000>; diff --git a/target/linux/ramips/dts/mt7628an_onion_omega2.dtsi b/target/linux/ramips/dts/mt7628an_onion_omega2.dtsi index 742c975d66..b10d448a30 100644 --- a/target/linux/ramips/dts/mt7628an_onion_omega2.dtsi +++ b/target/linux/ramips/dts/mt7628an_onion_omega2.dtsi @@ -95,7 +95,7 @@ pinctrl-names = "default"; pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>; - flash@0 { + flash0: flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <40000000>; diff --git a/target/linux/ramips/dts/mt7628an_onion_omega2p.dts b/target/linux/ramips/dts/mt7628an_onion_omega2p.dts index 4ec07dbd91..5694576974 100644 --- a/target/linux/ramips/dts/mt7628an_onion_omega2p.dts +++ b/target/linux/ramips/dts/mt7628an_onion_omega2p.dts @@ -5,6 +5,10 @@ model = "Onion Omega2+"; }; +&flash0 { + broken-flash-reset; +}; + &firmware { reg = <0x50000 0x1fb0000>; }; diff --git a/target/linux/ramips/dts/mt7628an_widora_neo-32m.dts b/target/linux/ramips/dts/mt7628an_widora_neo-32m.dts index c2387984c8..9fe13eb549 100644 --- a/target/linux/ramips/dts/mt7628an_widora_neo-32m.dts +++ b/target/linux/ramips/dts/mt7628an_widora_neo-32m.dts @@ -5,6 +5,10 @@ model = "Widora-NEO (32M)"; }; +&flash0 { + broken-flash-reset; +}; + &firmware { reg = <0x50000 0x1fb0000>; }; diff --git a/target/linux/ramips/dts/mt7628an_widora_neo.dtsi b/target/linux/ramips/dts/mt7628an_widora_neo.dtsi index 74f865aac9..fd146e9264 100644 --- a/target/linux/ramips/dts/mt7628an_widora_neo.dtsi +++ b/target/linux/ramips/dts/mt7628an_widora_neo.dtsi @@ -52,7 +52,7 @@ pinctrl-names = "default"; pinctrl-0 = <&spi_pins>, <&spi_cs1_pins>; - flash@0 { + flash0: flash@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <40000000>; diff --git a/target/linux/ramips/dts/mt7628an_wiznet_wizfi630s.dts b/target/linux/ramips/dts/mt7628an_wiznet_wizfi630s.dts index 3f5db4441f..9ce585021e 100644 --- a/target/linux/ramips/dts/mt7628an_wiznet_wizfi630s.dts +++ b/target/linux/ramips/dts/mt7628an_wiznet_wizfi630s.dts @@ -97,6 +97,7 @@ compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <40000000>; + broken-flash-reset; partitions { compatible = "fixed-partitions"; diff --git a/target/linux/ramips/dts/mt7628an_wrtnode_wrtnode2.dtsi b/target/linux/ramips/dts/mt7628an_wrtnode_wrtnode2.dtsi index 9024fb711b..bb35357808 100644 --- a/target/linux/ramips/dts/mt7628an_wrtnode_wrtnode2.dtsi +++ b/target/linux/ramips/dts/mt7628an_wrtnode_wrtnode2.dtsi @@ -28,6 +28,7 @@ compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <10000000>; + broken-flash-reset; partitions { compatible = "fixed-partitions"; diff --git a/target/linux/ramips/dts/mt7628an_zyxel_keenetic-extra-ii.dts b/target/linux/ramips/dts/mt7628an_zyxel_keenetic-extra-ii.dts index 50094a82da..d292b211af 100644 --- a/target/linux/ramips/dts/mt7628an_zyxel_keenetic-extra-ii.dts +++ b/target/linux/ramips/dts/mt7628an_zyxel_keenetic-extra-ii.dts @@ -86,6 +86,7 @@ compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <10000000>; + broken-flash-reset; partitions { compatible = "fixed-partitions"; diff --git a/target/linux/ramips/image/mt7620.mk b/target/linux/ramips/image/mt7620.mk index 33249efda0..674a7d1136 100644 --- a/target/linux/ramips/image/mt7620.mk +++ b/target/linux/ramips/image/mt7620.mk @@ -526,6 +526,20 @@ define Device/hnet_c108 endef TARGET_DEVICES += hnet_c108 +define Device/humax_e2 + SOC := mt7620a + IMAGE_SIZE := 7744k + DEVICE_VENDOR := HUMAX + DEVICE_MODEL := E2 + DEVICE_ALT0_VENDOR := HUMAX + DEVICE_ALT0_MODEL := QUANTUM E2 + IMAGE/sysupgrade.bin := append-kernel | append-rootfs | \ + edimax-header -s CSYS -m RN75 -f 0x70000 -S 0x01100000 | pad-rootfs | \ + check-size | append-metadata + DEVICE_PACKAGES := kmod-mt76x0e +endef +TARGET_DEVICES += humax_e2 + define Device/sunvalley_filehub_common SOC := mt7620n IMAGE_SIZE := 6144k diff --git a/target/linux/ramips/image/mt7621.mk b/target/linux/ramips/image/mt7621.mk index a863ab258e..2b750c7a56 100644 --- a/target/linux/ramips/image/mt7621.mk +++ b/target/linux/ramips/image/mt7621.mk @@ -786,6 +786,17 @@ define Device/iptime_a3004t endef TARGET_DEVICES += iptime_a3004t +define Device/iptime_a6004ns-m + $(Device/dsa-migration) + IMAGE_SIZE := 16128k + UIMAGE_NAME := a6004nm + DEVICE_VENDOR := ipTIME + DEVICE_MODEL := A6004NS-M + DEVICE_PACKAGES := kmod-mt7615e kmod-mt7615-firmware kmod-usb3 \ + kmod-usb-ledtrig-usbport +endef +TARGET_DEVICES += iptime_a6004ns-m + define Device/iptime_a6ns-m $(Device/dsa-migration) IMAGE_SIZE := 16128k diff --git a/target/linux/ramips/image/mt76x8.mk b/target/linux/ramips/image/mt76x8.mk index 423715d035..5e6a2b36b0 100644 --- a/target/linux/ramips/image/mt76x8.mk +++ b/target/linux/ramips/image/mt76x8.mk @@ -79,6 +79,32 @@ define Device/buffalo_wcr-1166ds endef TARGET_DEVICES += buffalo_wcr-1166ds +define Device/comfast_cf-wr758ac + IMAGE_SIZE := 7872k + DEVICE_VENDOR := COMFAST + DEVICE_MODEL := CF-WR758AC + DEVICE_ALT0_VENDOR := Joowin + DEVICE_ALT0_MODEL := JW-WR758AC +endef + +define Device/comfast_cf-wr758ac-v1 + $(Device/comfast_cf-wr758ac) + DEVICE_PACKAGES := kmod-mt76x2 + DEVICE_VARIANT := V1 + DEVICE_ALT0_VARIANT := V1 + SUPPORTED_DEVICES += joowin,jw-wr758ac-v1 +endef +TARGET_DEVICES += comfast_cf-wr758ac-v1 + +define Device/comfast_cf-wr758ac-v2 + $(Device/comfast_cf-wr758ac) + DEVICE_PACKAGES := kmod-mt7615e kmod-mt7663-firmware-ap + DEVICE_VARIANT := V2 + DEVICE_ALT0_VARIANT := V2 + SUPPORTED_DEVICES += joowin,jw-wr758ac-v2 +endef +TARGET_DEVICES += comfast_cf-wr758ac-v2 + define Device/cudy_wr1000 IMAGE_SIZE := 7872k IMAGES += factory.bin @@ -221,26 +247,6 @@ define Device/iptime_a604m endef TARGET_DEVICES += iptime_a604m -define Device/joowin_jw-wr758ac - IMAGE_SIZE := 7872k - DEVICE_VENDOR := Joowin - DEVICE_MODEL := WR758AC -endef - -define Device/joowin_jw-wr758ac-v1 - $(Device/joowin_jw-wr758ac) - DEVICE_PACKAGES := kmod-mt76x2 - DEVICE_VARIANT := V1 -endef -TARGET_DEVICES += joowin_jw-wr758ac-v1 - -define Device/joowin_jw-wr758ac-v2 - $(Device/joowin_jw-wr758ac) - DEVICE_PACKAGES := kmod-mt7615e kmod-mt7663-firmware-ap - DEVICE_VARIANT := V2 -endef -TARGET_DEVICES += joowin_jw-wr758ac-v2 - define Device/jotale_js76x8 DEVICE_VENDOR := Jotale DEVICE_MODEL := JS76x8 diff --git a/target/linux/ramips/mt7620/base-files/etc/board.d/01_leds b/target/linux/ramips/mt7620/base-files/etc/board.d/01_leds index 694f3d1541..8d438538fc 100644 --- a/target/linux/ramips/mt7620/base-files/etc/board.d/01_leds +++ b/target/linux/ramips/mt7620/base-files/etc/board.d/01_leds @@ -125,6 +125,9 @@ hnet,c108) ucidef_set_led_netdev "lan" "lan" "green:lan" "eth0" ucidef_set_led_netdev "modem" "modem" "green:modem" "wwan0" ;; +humax,e2) + ucidef_set_led_netdev "lan" "lan" "green:lan" "eth0" + ;; iodata,wn-ac1167gr|\ iodata,wn-ac733gr3) ucidef_set_led_wlan "wlan5g" "WLAN5G" "green:wlan5g" "phy0radio" diff --git a/target/linux/ramips/mt7620/base-files/etc/board.d/02_network b/target/linux/ramips/mt7620/base-files/etc/board.d/02_network index a64891f94a..ea8394ec59 100644 --- a/target/linux/ramips/mt7620/base-files/etc/board.d/02_network +++ b/target/linux/ramips/mt7620/base-files/etc/board.d/02_network @@ -100,7 +100,8 @@ ramips_setup_interfaces() "0:lan:1" "1:lan:2" "2:lan:3" "3:lan:4" "4:wan:5" "6@eth0" ;; comfast,cf-wr800n|\ - hnet,c108) + hnet,c108|\ + humax,e2) ucidef_add_switch "switch0" \ "4:lan" "6@eth0" ;; diff --git a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac index 3c3b1e62e7..242e1e6efe 100644 --- a/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac +++ b/target/linux/ramips/mt7621/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac @@ -47,7 +47,6 @@ case "$board" in ;; tenbay,t-mb5eu-v01) hw_mac_addr="$(mtd_get_mac_binary factory 0x4)" - [ "$PHYNBR" = "0" ] && macaddr_add $hw_mac_addr "1" > /sys${DEVPATH}/macaddress - [ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr "-1" > /sys${DEVPATH}/macaddress + [ "$PHYNBR" = "1" ] && macaddr_add $hw_mac_addr "0x100000" > /sys${DEVPATH}/macaddress ;; esac diff --git a/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network b/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network index 43d2647cf0..ab068ce150 100644 --- a/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network +++ b/target/linux/ramips/mt76x8/base-files/etc/board.d/02_network @@ -53,6 +53,13 @@ ramips_setup_interfaces() ucidef_add_switch "switch0" \ "3:lan" "4:wan" "6@eth0" ;; + comfast,cf-wr758ac-v1|\ + comfast,cf-wr758ac-v2|\ + tplink,tl-wr902ac-v3|\ + wavlink,wl-wn576a2) + ucidef_add_switch "switch0" \ + "4:lan" "6@eth0" + ;; cudy,wr1000) ucidef_add_switch "switch0" \ "2:lan:2" "3:lan:1" "4:wan" "6@eth0" @@ -129,13 +136,6 @@ ramips_setup_interfaces() ucidef_add_switch "switch0" \ "0:lan" "1:lan" "2:lan" "3:wan" "6@eth0" ;; - joowin,jw-wr758ac-v1|\ - joowin,jw-wr758ac-v2|\ - tplink,tl-wr902ac-v3|\ - wavlink,wl-wn576a2) - ucidef_add_switch "switch0" \ - "4:lan" "6@eth0" - ;; vocore,vocore2|\ vocore,vocore2-lite) ucidef_add_switch "switch0" \ diff --git a/target/linux/ramips/patches-5.10/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch b/target/linux/ramips/patches-5.10/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch index 4c762925fb..4fbfae02af 100644 --- a/target/linux/ramips/patches-5.10/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch +++ b/target/linux/ramips/patches-5.10/405-mtd-spi-nor-Add-support-for-BoHong-bh25q128as.patch @@ -55,7 +55,7 @@ Signed-off-by: David Bauer +}; --- a/drivers/mtd/spi-nor/core.c +++ b/drivers/mtd/spi-nor/core.c -@@ -2038,6 +2038,7 @@ int spi_nor_sr2_bit7_quad_enable(struct +@@ -2040,6 +2040,7 @@ int spi_nor_sr2_bit7_quad_enable(struct static const struct spi_nor_manufacturer *manufacturers[] = { &spi_nor_atmel, diff --git a/target/linux/ramips/patches-5.10/810-uvc-add-iPassion-iP2970-support.patch b/target/linux/ramips/patches-5.10/810-uvc-add-iPassion-iP2970-support.patch index 4708076e89..230c5e1a5a 100644 --- a/target/linux/ramips/patches-5.10/810-uvc-add-iPassion-iP2970-support.patch +++ b/target/linux/ramips/patches-5.10/810-uvc-add-iPassion-iP2970-support.patch @@ -13,7 +13,7 @@ Signed-off-by: John Crispin --- a/drivers/media/usb/uvc/uvc_driver.c +++ b/drivers/media/usb/uvc/uvc_driver.c -@@ -3009,6 +3009,18 @@ static const struct usb_device_id uvc_id +@@ -3004,6 +3004,18 @@ static const struct usb_device_id uvc_id .bInterfaceSubClass = 1, .bInterfaceProtocol = 0, .driver_info = UVC_INFO_META(V4L2_META_FMT_D4XX) }, diff --git a/target/linux/sunxi/Makefile b/target/linux/sunxi/Makefile index bdc39a585f..2129029591 100644 --- a/target/linux/sunxi/Makefile +++ b/target/linux/sunxi/Makefile @@ -7,7 +7,7 @@ include $(TOPDIR)/rules.mk ARCH:=arm BOARD:=sunxi BOARDNAME:=Allwinner A1x/A20/A3x/H3/H5/R40 -FEATURES:=fpu usb ext4 display rtc squashfs +FEATURES:=fpu usb ext4 display rootfs-part rtc squashfs SUBTARGETS:=cortexa8 cortexa7 cortexa53 KERNEL_PATCHVER:=5.10 diff --git a/target/linux/uml/Makefile b/target/linux/uml/Makefile index ec662989ec..5c884fb9a0 100644 --- a/target/linux/uml/Makefile +++ b/target/linux/uml/Makefile @@ -11,7 +11,7 @@ ifeq ($(HOST_OS),Linux) ARCH:=x86_64 BOARD:=uml BOARDNAME:=User Mode Linux -FEATURES:=squashfs ext4 audio +FEATURES:=audio ext4 rootfs-part squashfs KERNEL_PATCHVER:=5.10 diff --git a/target/sdk/files/Makefile b/target/sdk/files/Makefile index 2f89ce0cf8..a710ca5f51 100644 --- a/target/sdk/files/Makefile +++ b/target/sdk/files/Makefile @@ -14,7 +14,7 @@ export TOPDIR LC_ALL LANG SDK world: -DISTRO_PKG_CONFIG:=$(shell which -a pkg-config | grep -E '\/usr' | head -n 1) +DISTRO_PKG_CONFIG:=$(shell $(TOPDIR)/scripts/command_all.sh pkg-config | grep -E '\/usr' | head -n 1) export PATH:=$(TOPDIR)/staging_dir/host/bin:$(PATH) ifneq ($(OPENWRT_BUILD),1) diff --git a/tools/firmware-utils/Makefile b/tools/firmware-utils/Makefile index 0586cce732..f6c699bd28 100644 --- a/tools/firmware-utils/Makefile +++ b/tools/firmware-utils/Makefile @@ -11,9 +11,9 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/firmware-utils.git -PKG_SOURCE_DATE:=2022-01-14 -PKG_SOURCE_VERSION:=84dbf8ee49f522d3a4528763c9473cf3dd7c8c52 -PKG_MIRROR_HASH:=aabf70dbc155d10175ee3b25f375953bef31bf7e25a2391fda8687aa93ea79e6 +PKG_SOURCE_DATE:=2022-01-16 +PKG_SOURCE_VERSION:=d885b49436b18cb423b4612465e10ea2b3f5db79 +PKG_MIRROR_HASH:=a35791aa76d2da1c66a57c0189804cad65e63e58910233cc8bd87496e3cc01df include $(INCLUDE_DIR)/host-build.mk include $(INCLUDE_DIR)/cmake.mk